diff --git a/data2/text/range/0-5000/1000341.txt b/data2/text/range/0-5000/1000341.txt new file mode 100644 index 0000000000000000000000000000000000000000..aeb0b271e2ea0d01666e358bd28d7be2f850b537 --- /dev/null +++ b/data2/text/range/0-5000/1000341.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2SXBTQABCRQ1 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 1. How many watchdog timers in TDA2SXBTQABCRQ1 and where? 2. The MPU has its own watchdog timer that is different from watchdog timer in the PRCM? 3.IPU and DSP use the watchdog in the PRCM? If so, how to distinguish the error output by watchdog? 4. The following picture is from TDA2 technical reference manual chapter 18.4.6. When T is not within threshold low to threshold high, the output alert maybe do not be asserted to 1, like the blue arrow in the picture. Why? thank you! + +Responses: +1. 2 watchdog timers. 1x system watchdog and 1x MPU watchdog timer. 2. yes. 3. One watchdog timer can only be used by either IPU or DSP. You can also use GP Timer as watchdog timer. 4. Alert (Temp too high) is generated first when the temp goes above the high threshold and the next alert (Temp is safe) is generated only when the temp goes below the low threshold. In between this two events is where you have to do thermal management to lower the temp to avoid thermal shutdown. + diff --git a/data2/text/range/0-5000/1000797.txt b/data2/text/range/0-5000/1000797.txt new file mode 100644 index 0000000000000000000000000000000000000000..0984da8e7b30800a8057f1eb23682d85e6358de3 --- /dev/null +++ b/data2/text/range/0-5000/1000797.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HV: TI support of QEMU for TDA2 APP + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hi there, 1. Does QEMU support TDA2 APP? I have been searching for some time but in QEMU says that if the TDA2 machine is not listed than is very unlikely to be supported. 2. Is there any emulator support to test app without a board? I need it for testing. The board can be damaged by a quick test. 3. Can I convert my Application Image back to ELF? In my opinion, it is converted to ELF -> Application Image(RPRC) using the following command. ``` out2rprc.exe ``` Please let me know if it supported. Any guidance would be appreciated. Regards, + +Responses: +Hi, 1. No. We don't have QEMU support on TDA2. 2. No. We don't have emulator for TDA2. 3. No. We don't have utility to covert AppImage back to multiple Elf files. Regards, Stanley + diff --git a/data2/text/range/0-5000/1001310.txt b/data2/text/range/0-5000/1001310.txt new file mode 100644 index 0000000000000000000000000000000000000000..2df5fbbd6d87a9ed999c4e5ae1ee5622a9fd4c94 --- /dev/null +++ b/data2/text/range/0-5000/1001310.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: How to use I2C high speed mode? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi expert, We have a requirement to use I2C5 to communicate between TDA2 SOC and MCU. I checked the Source code and found the I2C API path. Would this API support high speed mode and is easy to apply on the vision sdk? If it is not applicable, is there any other sample code? C:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\drv\stw_lld\i2clld\src\lld_hsi2c.c + +Responses: +Hi, The supported i2c bus speed is 100Khz and 400Khz for this I2C driver. It doesn't support HS mode. We don't have example i2c driver for HS mode. However, the I2C hardware on TDA2 is capable of running HS mode. Regards, Stanley + diff --git a/data2/text/range/0-5000/1001510.txt b/data2/text/range/0-5000/1001510.txt new file mode 100644 index 0000000000000000000000000000000000000000..ef1da5c6f1eadd2fc8a4cd30e4945129d197d57d --- /dev/null +++ b/data2/text/range/0-5000/1001510.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HV: CLANG and LLVM build support + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hello Does the tda processor support "clang" builds? If applying, where should I edit it? + +Responses: +Hi, Not supported and no plans to add it for TDA2. Note : There is a plan to add support for TDA4 devices in next release Regards Vineet + diff --git a/data2/text/range/0-5000/1001590.txt b/data2/text/range/0-5000/1001590.txt new file mode 100644 index 0000000000000000000000000000000000000000..c4f2d330e1d157d1da663453b0c435c945901842 --- /dev/null +++ b/data2/text/range/0-5000/1001590.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: Problems with the TIDL library import tool + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello, I am trying to use TIDL library on TDA2PX EVM to run DNNs on EVE and DSP cores. I am using TensorFlow as a framework. I am following the user guide with the title " TI Deep learning Library on TDAx " - November 2019. The user guide states that " TIDL supports slim based tensorflow models ". Does TIDL library supports only slim based TensorFlow models ? Does it mean that I can not import models trained in TensorFlow, not TensorFlow slim? I have tried to import MobileNet V2 from TensorFlow Keras applications using the TIDL library, but I get error mesages saying that "Pad Layer is not supported by TIDL and cannot be merged into any TIDL layer". Moreover, I need to know where I can find the file "optimize_for_inference.py". Thanks, Ahmed Anwar + +Responses: +Hi Ahmed, >> Does it mean that I can not import models trained in TensorFlow, not TensorFlow slim? Yes, TIDL on TDA2 can import only TensorFlow slim models. On TDA4 we support TensorFlow models also. >> but I get error mesages saying that "Pad Layer is not supported by TIDL and cannot be merged into any TIDL layer" This is because of Pad layer is not supported, refer to datasheet for all the supported layers >> I need to know where I can find the file "optimize_for_inference.py" This is available in "tensorflow/python/tools" folder Thanks, Praveen + +Hello Praveen, Thank you for your reply. I have a question regarding the TensorFlow slim models. In the user guide, there is an example of a Keras/TensorFlow model which can be found here. This example uses Keras from TensorFlow, not TensorFlow slim, to build a simple CNN, which can be used as an input to the TIDL import tool. Does this mean that I can use Keras from TensorFlow, not TensorFlow slim, to build a CNN and use it as an input to the TIDL import tool ? I just need to understand this point better, as most of my development is already in Keras/TensorFlow, and the example that I mentioned also uses Keras/TensorFlow. However, based on your reply, "TIDL on TDA2 can import only TensorFlow slim models". Would you please illustrate how this example uses Keras/TensorFlow if only TensorFlow slim models are supported on TDA2 ? Thanks, Ahmed Anwar + +Yes, We have limited layers support for Tesnsoflow in TDA2, where as most of the layers are supported with Caffe/Tensorflow slim models. Please refer to below comment in the user guide section 3.6.5. " We have developed/defined TIDL library layers based on the layer types Caffe framework. Most of our test cases (Layer level and network level) and demos are based caffe framework. With respect to Tensorflow, we have validated two pre-trained models from tensorflow github (Slim based Mobilenet V1 and Googlenet/inceptionetV1), this covers most of the CNN layers (Convolution, Max Pooling , Average pooling, Batch norm, Fully connected layer, softmax, Relu, Relu6, concate etc). " Thanks, Praveen + diff --git a/data2/text/range/0-5000/1002851.txt b/data2/text/range/0-5000/1002851.txt new file mode 100644 index 0000000000000000000000000000000000000000..e63498c9f9b9f4a830fa600a294fb5dd1d402dd9 --- /dev/null +++ b/data2/text/range/0-5000/1002851.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: Counting an external signal edge + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: MMWCAS-DSP-EVM Hello. I need to count the rise or falling edges of an external clock signal which frequency is up to 300 kHz using the TDA2xx on the MMWCAS-DSP-EVM board (I just use the Ethernet peripheral so I can unmount lot of components if necessary). As you can imagine using an interrupt approach is not reliable at such high frequency, so, I intend to use a counter module that directly writes into a register the number of time the specific edge arrives. I took a look into "Timers" chapter inside TRM document (SPRUI29G) but it seams there is no way to increment the counter register using an external source. Could somebody provide me some guide? Which other module can I use to reach my goal? Thanks in advice, Pablo. + +Responses: +Hi, You can refer to TRM Ch 28 PWM which has eCAP to capture input signal. However, you have to check if EVM has exposed any pin which is routed to eCAP. https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components/Kernel/Kernel_Drivers/Display/PWM.html Regards, Stanley + diff --git a/data2/text/range/0-5000/1004827.txt b/data2/text/range/0-5000/1004827.txt new file mode 100644 index 0000000000000000000000000000000000000000..b22f4d44df04828d2f8872eb0ad3fadc82319f47 --- /dev/null +++ b/data2/text/range/0-5000/1004827.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: Linux OS memory size + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hello Jacinto team, My customer is considering TDA4 for its Automotive Vision application, and they are asking me about the size that Linux OS takes on theTDA4 SoC: from previous experience with TDA2, they know Linux took ~1Gb of Flash memory. Do you know what is the memory requirement for Linux OS on TDA4 ? Best regards, Antoine + +Responses: +Hi Antoine, This is the output of free command on our latest 7.3 Linux SDK. So ~1 GB with Linux. ~3GB is free out of total 4GB DDR on board. If no other questions please click verify answer. Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/1005296.txt b/data2/text/range/0-5000/1005296.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3f8be8db9bcf39a3317a5ed98e558f0644651e3 --- /dev/null +++ b/data2/text/range/0-5000/1005296.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: how to use Image pyramid algorithm link in vision sdk for tda2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 I want to use Image pyramid algorithm link in vision sdk for tda2, this algorithm link is supported on M4, but the comment for this algorithm link in algorithmLink.h says: "Image pyramid algorithm link. Only valid for TDA3x" typedef enum { ALGORITHM_LINK_IPU_ALG_DMA_SWMS = 0, /**< Alg to DMA based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_OBJECT_DRAW = 1, /**< Alg to draw rectangles on the image (Needed by PD) */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB = 2, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB1 = 3, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_HW_CRC = 4, /**< CRC for checking Frame Freeze Detect on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_IMG_PYRAMID = 5, /**< Image pyramid algorithm link. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_SCENE_OBSTRUCTION_DETECT = 6, /** < Alg to perform SCENE obstruction detection */ ALGORITHM_LINK_IPU_ALG_DEWARP = 7, /**< Plugin to that supports DeWarpping of images, depends on SIMCOP/TDA3x*/ ALGORITHM_LINK_IPU_ALG_RADAR_PROCESS = 8, /**< Alg to perform radar processing */ ALGORITHM_LINK_IPU_ALG_RVC_DIAGNOSTIC = 9, /**< Plugin to support Robust RVC diagnostics register only for TDA2xx */ ALGORITHM_LINK_IPU_ALG_OPENVX = 10, /**< Pluging to support OpenVX */ ALGORITHM_LINK_IPU_ALG_TIDLPREPROC = 11, /**< Alg to do TIDL Pre Process */ ALGORITHM_LINK_IPU_ALG_VPE_SWMS = 12, /**< Alg to VPE based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB2 = 13, /**< AEWB for ISS running on IPU1-0 in SRV demo. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_OPENVX_TIDL = 14, /**< Pluging to support OpenVX TIDL */ ALGORITHM_LINK_IPU_ALG_MAXNUM = 15, /**< Should be the last value of this enumeration. * Will be used by Link/driver for validating the input parameters. */ ALGORITHM_LINK_IPU_ALG_FORCE32BITS = 0x7FFFFFFF /**< This should be the last value after the max enumeration value. * This is to make sure enum size defaults to 32 bits always regardless * of compiler. */ } AlgorithmLink_IpuAlgorithmId; I don't know why this link is not valid for tda2x. If I want to use this LINK for tda2x , how to do ? thanks + +Responses: +This is duplicate of below thread, so closing this thread. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1005297/tda2sx-how-to-use-image-pyramid-algorithm-link-in-vision-sdk-for-tda2 Regards, Brijesh + diff --git a/data2/text/range/0-5000/1005297.txt b/data2/text/range/0-5000/1005297.txt new file mode 100644 index 0000000000000000000000000000000000000000..9806a87783864b9e5ba235d9dc1c38371c402168 --- /dev/null +++ b/data2/text/range/0-5000/1005297.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: how to use Image pyramid algorithm link in vision sdk for tda2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 I want to use Image pyramid algorithm link in vision sdk for tda2, this algorithm link is supported on M4, but the comment for this algorithm link in algorithmLink.h says: "Image pyramid algorithm link. Only valid for TDA3x" typedef enum { ALGORITHM_LINK_IPU_ALG_DMA_SWMS = 0, /**< Alg to DMA based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_OBJECT_DRAW = 1, /**< Alg to draw rectangles on the image (Needed by PD) */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB = 2, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB1 = 3, /**< AEWB for ISS running on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_HW_CRC = 4, /**< CRC for checking Frame Freeze Detect on IPU1-0. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_IMG_PYRAMID = 5, /**< Image pyramid algorithm link. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_SCENE_OBSTRUCTION_DETECT = 6, /** < Alg to perform SCENE obstruction detection */ ALGORITHM_LINK_IPU_ALG_DEWARP = 7, /**< Plugin to that supports DeWarpping of images, depends on SIMCOP/TDA3x*/ ALGORITHM_LINK_IPU_ALG_RADAR_PROCESS = 8, /**< Alg to perform radar processing */ ALGORITHM_LINK_IPU_ALG_RVC_DIAGNOSTIC = 9, /**< Plugin to support Robust RVC diagnostics register only for TDA2xx */ ALGORITHM_LINK_IPU_ALG_OPENVX = 10, /**< Pluging to support OpenVX */ ALGORITHM_LINK_IPU_ALG_TIDLPREPROC = 11, /**< Alg to do TIDL Pre Process */ ALGORITHM_LINK_IPU_ALG_VPE_SWMS = 12, /**< Alg to VPE based SW Mosaic */ ALGORITHM_LINK_IPU_ALG_ISS_AEWB2 = 13, /**< AEWB for ISS running on IPU1-0 in SRV demo. Only valid for TDA3x */ ALGORITHM_LINK_IPU_ALG_OPENVX_TIDL = 14, /**< Pluging to support OpenVX TIDL */ ALGORITHM_LINK_IPU_ALG_MAXNUM = 15, /**< Should be the last value of this enumeration. * Will be used by Link/driver for validating the input parameters. */ ALGORITHM_LINK_IPU_ALG_FORCE32BITS = 0x7FFFFFFF /**< This should be the last value after the max enumeration value. * This is to make sure enum size defaults to 32 bits always regardless * of compiler. */ } AlgorithmLink_IpuAlgorithmId; I don't know why this link is not valid for tda2x. If I want to use this LINK for tda2x , how to do ? thanks + +Responses: +Hi, It was initially implemented using resizer, which is available on TDA3x. But could you please if it internally uses VPE driver? Then it can even be enabled on TDA2x. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1006960.txt b/data2/text/range/0-5000/1006960.txt new file mode 100644 index 0000000000000000000000000000000000000000..b4b5822fd9a89c639e666a2065c8dab66d208d2d --- /dev/null +++ b/data2/text/range/0-5000/1006960.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2SG: TDA2 LCD2 BT656 signal + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi Sir : TDA2 output BT.656 signal, when converted to BT.601 signal. Hsync will output all the time. If Vsync is low and Hsync is low, how do I set it? + +Responses: +Hi, Do you mean, you dont want hsync to be toggling when vsync is low? If this is the case, you could treat DE signal as inverted hsync. DE will toggle only during active video portion. Regards, Brijesh + +Hi Brijesh : The hardware only has Hsync and Vsync and PCLK and ATA [7:0] pins, no DE output. The image had the output I wanted. + +Hi Pierre Hsieh, hsync will toggle during vsync, this cannot be changed. In this case, you need to use DE line. Regards, Brijesh + +Hi Brijesh : I cannot modify the BT656 configuration of TDA2 to output the desired signal? + +Hi Pierre Hsieh, Hsync is supposed to toggle even during vsync inactive period.. This behavior cannot be changed. Regards, Brijesh + +Hi Brijesh : BT.656 does not have a DE Line specification. How can I convert to BT.601 with DE Line? + +Hi Pierre Hsieh, BT656 does not even output hsync and vsync, so we cannot use hsync/vsync signals for BT656. We have to use discrete sync output mode in order to get sync signals. and when we enable discrete sync signals, we will also get DE signal. Regards, Brijesh + +Hi Brijesh : This TDA2 hardware configuration, Display Subsystem DPI2 output BT.656, only output Data and PCLK signal lines. Analyze Bt.656, there will still be H Active in V Blanking. TDA2 can output on BT.656, the V Blanking signal is only H Blanking? + +Hi Pierre Hsieh, When you say BT656, it is embedded sync output format, and in this format, DSS does not output sync signals, so there will not be any hsync or vsync signals in bt656 output. So can you check if you are configuring DSS for discrete sync output? Regards, Brijesh + +Hi Brijesh : BT.605 does not have Hsync and Vsync, so I converted it to BT601 using FPGA. I used FPGA to convert TDA2 output BT.656 signal into BT.601 signal. I found that VBlanking has a HActive signal for BT.601 signal. + +Hi Pierre Hsieh, ok, in this case, you need to change FPGA. FPGA should out hsync correctly. This is not DSS question. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1008079.txt b/data2/text/range/0-5000/1008079.txt new file mode 100644 index 0000000000000000000000000000000000000000..8a1c1524054271f5bf047c5c49f840e43d201f71 --- /dev/null +++ b/data2/text/range/0-5000/1008079.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2SG: How can output yuv422 format in the display + +Query Text: +Part Number: TDA2SG Hi ,expert: My system has three overlay in the display,like this : 1,VID1: BGRA32_8888 2.VID2: YUV420SP 3.GFX: BGRA32_8888 general, TDA2s use the rgb888 output to display, and my system is work ok,Now I want to use the yuv422( YUYV) to the display, I see the "dssm2mwb" link ,I found this link may need "sync" link and then use buftype of "SYSTEM_BUFFER_TYPE_VIDEO_FRAME_CONTAINER". I have the question as follow: 1,sync need 3 overlay framerate is same,but my system is not satisfy and overlay has different display framesrate, so i think this solution may not very well . 2,Is There other solution to yuv422 display output thanks! + +Responses: +Hi, do you mean yuv422 over embedded sync output interface? Rgds, Brijesh + +no, I mean if i use sync link ,if one of queue has no video ,sync will no send cmd to process ,so I think this solution is not suit. Now I want to checkout the problem: 1,VID1: BGRA32_8888 ->YUYV 2.VID2: YUV420SP 3.GFX: BGRA32_8888 ->YUYV overlay like this,the display can work? 2) Is there some usecase of yuv422 output I can refer + +hi, #1, in this case, you would require to change sync link to support this feature. Currently it is not supported. sync link does not output if one of the input is not available. #2, do you mean to use 3 video pipelines, each with different data type? yes, display will work with this combination #3, where yuv422 do you require? Is it at the output of capture link or input to the display link? Regards, Brijesh + +output in the dispaly link , if i dont want to use "sync",I will do as follow: change RGBA328888 to YUYV format and it will make 3 video pipeline dataformat to 1,VID1: YUYV 2.VID2: YUV420SP 3.GFX: YUYV is the display link support "YUYV" and "YUV420sp" format output. + +Yes, display link supports both of these formats. Rgds, Brijesh + +I use capture_dsswb link ,and set vout format BT656 and DISPC_VP1_CONTROL.TDMENABLE = 0x1: TDM enabled DISPC_VP1_CONTROL. TDMPARALLELMODE = 0x0: 8-bit parallel output interface selected DISPC_VP1_CONTROL. TDMCYCLEFORMAT = 0x2: 2 cycles for 1 pixel DISPC_DATA1_CYCLE1 = 0x8 DISPC_DATA1_CYCLE2 = 0x8 DISPC_DATA1_CYCLE3 = 0x0 but my capture_dsswb has no video data,so I think writeback pipeline do not well work. how can I use writeback? + +Hi, these two things are different and independent. could you help me with what exactly you are trying to enable? - are the three input video pipelines enabled? - why are you enabling TDM for BT656 output? - why are you enabling dss wb path? Regards, Brijesh + diff --git a/data2/text/range/0-5000/1011115.txt b/data2/text/range/0-5000/1011115.txt new file mode 100644 index 0000000000000000000000000000000000000000..789a29de36bc6b37fa857bcf3adcdedddcc87052 --- /dev/null +++ b/data2/text/range/0-5000/1011115.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4VM: TDA4 RTOS SDK network utilities + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, In TDA4 RTOS SDK, do we have something similar as the TDA2.TDA3's network_rx, network_tx tools ? I saw that we have some ETHFW demo involving Plex media server but I just need a simple client/server example app that is able to save a file on PC over ethernet. regards, Victor + +Responses: +Hi Victor, No simple utility on RTOS of the kind you are looking for. Can you spell out your requirement : Do you want to stream a file from your EVM to your PC ? or do you want to use the CPSW 9G as a switch and connect multiple devices over it ? Regards Vineet + +Hi Vineet, I actually implemented the tool since it didn't exist on TDA4. The ticket can be closed. Thanks. regards, Victor + diff --git a/data2/text/range/0-5000/1012640.txt b/data2/text/range/0-5000/1012640.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ca24ce6946f6cc9bb1dbbbb047cb90c4ee367f4 --- /dev/null +++ b/data2/text/range/0-5000/1012640.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: TDA2SXBU PMIC Selection + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Expert, Could TDA2SXBU PMIC Select TPS659039-O9039A387? If TDA2SXBU PMIC could not select TPS659039-O9039A387,do you have any suggestions? Thanks Daniel + +Responses: +Hi Daniel, Sorry for the delay. Is this issue still open ? Regards Vineet + +Hi Vineet Issue is still open. Could you help me? Thanks Daniel + +Hi Daniel, Will take a look at this internally and get back. Regards Vineet + +Vineet, We recommend the PMIC that is implemented on the TDA2 EVM. Regards, Kyle + diff --git a/data2/text/range/0-5000/1013160.txt b/data2/text/range/0-5000/1013160.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c1912ae96ccac932212da354ef0290d1aad4b5b --- /dev/null +++ b/data2/text/range/0-5000/1013160.txt @@ -0,0 +1,43 @@ +Ticket Name: TDA2SX: Tda2s SPI slave mode reception problem + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hello, expert Tda2s is SPI slave mode. If the master sends a 1MHz clock and sends 140 bytes every 20ms, it will get stuck after receiving several times. If it sends 32 bytes every time, it will not get stuck. If it sends 32 bytes every 10ms, it will still receive several times of data and it will get stuck. dmesg1.txt 146 root 0:00 [kworker/0:1H] + 148 root 0:00 cat /proc/kmsg + 149 root 0:00 ps +root@dra7xx-evm:/app# +root@dra7xx-evm:/app# +root@dra7xx-evm:/app# +root@dra7xx-evm:/app# +root@dra7xx-evm:/app# ./spi_rev_tool_32 -D /dev/spidev1.0 -s 1000000 -b 8 +[ 36.808325] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0 +[ 36.809212] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0 +[ 36.810092] spidev spi1.0: setup mode 0, 8 bits/w, 1000000 Hz max --> 0 +<7>[ 36.808304] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal +<4>[ 36.808325] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0 +<7>[ 36.809182] spidev spi1.0: spi mode 0 +<7>[ 36.809198] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal +<4>[ 36.809212] spidev spi1.0: setup mode 0, 8 bits/w, 48000000 Hz max --> 0 +<7>[ 36.810065] spidev spi1.0: 8 bits per word +<7>[ 36.810079] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal +<4>[ 36.810092] spidev spi1.0: setup mode 0, 8 bits/w, 1000000 Hz max --> 0 +<7>[ 36.810946] spidev spi1.0: xfer len 32 rx tx 8bits 0 usec 1000000Hz +<7>[ 36.810973] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal +RX | 4D 56 00 00 10 9A 00 00 | MV...?. +RX | 01 01 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +RX | 00 00 00 00 00 00 00 00 | ........ +<7>[ 36.826262] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal +<7>[ 36.826462] spidev spi1.0: xfer len 32 rx tx 8bits 0 usec 1000000Hz +<7>[ 36.826487] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal +<7>[ 36.827021] spidev spi1.0: setup: speed 48000000, sample leading edge, clk normal +<7>[ 36.827126] spidev spi1.0: xfer len 32 rx tx 8bits 0 usec 1000000Hz +<7>[ 36.827149] spidev spi1.0: setup: speed 1000000, sample leading edge, clk normal + I add printing when I can't receive hand data, it's stuck in SPI_ transfer_ one_ message()---->master-transfer_ one(). How to find the problem? The problem of the master side has been ruled out, and the measurement SPI CLK CS is normal. + +Responses: +Hi, Our Linux SDK doesn't support SPI slave mode. It has not been validated on TDA2 EVM. Regards, Stanley + diff --git a/data2/text/range/0-5000/1013586.txt b/data2/text/range/0-5000/1013586.txt new file mode 100644 index 0000000000000000000000000000000000000000..dac74681342e9be2f60945cdca24618dc0ff4bd6 --- /dev/null +++ b/data2/text/range/0-5000/1013586.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: Installing ROS on TDA2PXEVM after building Yocto filesystem + +Query Text: +Part Number: TDA2PXEVM Hello all, I have built Yocto filesystem on my TDA2Px using this guide: https://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/wiki/Processor%20SDK%20Linux%20Automotive%20Software%20Developers%20Guide%20-%20Texas%20Instruments%20Wiki.pdf I want to know how can I add ROS layer and build Yocto again with ROS installed and have ROS running on my TDA2Px-EVM. Or in other word how can I customize a ROS layer or is there any guide for that? Thank you, Best Regards, Kirollos Henry + +Responses: +Kirollos, It seems like you have made progress on the ROS image already: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1013431/tda2pxevm-roscore-run-error-on-my-tda2px-evm-due-to-python-version. There is no guide for integrating ROS with TDA2Px - most of our experiments with ROS were experimental and since both TI SDK and ROS were moving quite a bit we didn't snapshot a stable version and document the same. Lets continue discussion on the newer thread. Closing this one for now. Regards Karthik + diff --git a/data2/text/range/0-5000/1014661.txt b/data2/text/range/0-5000/1014661.txt new file mode 100644 index 0000000000000000000000000000000000000000..8b47ed3c4dbdfa18457ac15602ced271935cdcb2 --- /dev/null +++ b/data2/text/range/0-5000/1014661.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SA: Is there a Code Composer Studio(CCS) project existing to build the "VISION SDK/project" on OS (Linux/or windows) Platform ? + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Hi Expert, My platform is TDA2 I want to confirm again. Is there a Code Composer Studio(CCS) project existing to build the "VISION SDK/project" on OS (Linux/or windows) Platform ? Thanks Daniel + +Responses: +Hi Expert Is there any update? Thanks Daniel + +Hi, No, we use commend line and makefile to build Vision SDK. CCS build takes longer time than command-line build/makefile build. Regards, Stanley + diff --git a/data2/text/range/0-5000/1015551.txt b/data2/text/range/0-5000/1015551.txt new file mode 100644 index 0000000000000000000000000000000000000000..6f0e23c8f5ba1b5398c90233dff7989161e89f85 --- /dev/null +++ b/data2/text/range/0-5000/1015551.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: pressure test script / software + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi At present, we are preparing to do tda2sx ddr3l pressure test,Do you have tda2 ddr3l pressure test script / software? If there is no script, what should I do for stress testing?If we want to develop stress testing software, how to raise the corresponding software requirements? Please help me give some advice. Thank you! + +Responses: +Hi, There is nothing provided outside of what may exist in the SDKs. What operating system does your application use? Thanks, Kevin + diff --git a/data2/text/range/0-5000/1015553.txt b/data2/text/range/0-5000/1015553.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9b3fbd9af4098b110d45ffb60c8d5a8c9efea00 --- /dev/null +++ b/data2/text/range/0-5000/1015553.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2P-ACD: Custom calibration tool for 2D SRV + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hi all, I am trying to make a custom calibration tool for 2D surround view in Python with OpenCV that would match the existing one developed in Matlab. So far, I managed to implement the same workflow and to obtain the parameters of initial perspective metrices for 4 cameras with stitched bird view as shown in the image below. As can be seen, the bird view image is decent. However, when I provide the obtained perspective matrices (scaled to match Q11.20 format that I believe is used in GeometricAlignment and Sythesis algorithms), I get the result which is not even comparable to the one shown above, i.e., everything is distorted. This indicates that matrix parameters are wrong or incorrectly interpreted. To confirm that the perspective matrix coefficients are correct I used the same values in another framework (Octave) and I get nice bird view for each camera (I provide a view for front camera below). The question is what I am doing wrong and why I do not get (at least to some extent) correct bird view on the target? Best regards, Mladen + +Responses: +Just an additional note. I also tried to use perspective matrix generated by the tool for provided sample images in both Python and Octave. All I got is also distorted indicating that the TI tool does not provide the matrix coefficients expected by OpenCV warpPerspective() and Octave imperspectivewarp(). + +Did you compare bin files from your python with the bin files from TI tool? + +Hi Do-Kyoung Kwon, I am not sure what bin files are you referring to. Currently, I am trying to get initial perspective matrices that would be comparable with the one obtained from TI tool. So far I found out that OpenCV and Octave functions returns forward mapped homographies, however, the SV algorithm is based on back-mapping. Therefore, I tried to use inverse matrices, but it seems that it does not work either. Now I suspect it has something with translating the image center to 0 instead of (width/2, height/2). + +Oh.. I now realized that you are working on SRV on TDA2. I thought you are working on SRV on TDA4. + +Right. It is 2D surround view running on C66. + +I think image center could be a reason. There might be no issue with perspective matrices give that you got the right reconstruction for the upper part of SRV. But it seems hard to say without debugging. + +Actually, I got the right reconstruction on all 4 views as you can see in the first image (this is an output from Python tool). The issue arises when I provide the obtained matrices to the usecase (GeometricAlignment link) or to the Surroundview.exe tool for further perspective matrices tuning. It seems that those initial matrices are not in the form expected by the current implementation. I will also check for the image centers, but anyway, thank you for your time. + +Great to hear that you resolve the issue. + +No, the issue is still unresolved. I am chasing the way to adjust the perspective matrices to match the required format. + +I figured this out. Image centers are just one side of the coin. Input images relative to output view orientation should be considered as well. Obviously, a rule for feature points (corners selected in reference image and input images) correspondence I used in my custom tool is different from the one in the TI tool, so I had to add some rotations to the input images (and output results) to match them. It is very specific to my case, but it would be informative if you could share somewhere in the documentation how the corners selected in the tool on reference image corresponds to the corners selected on the input images for each camera view. + +Great! Thanks for the suggestion, too! + diff --git a/data2/text/range/0-5000/1015916.txt b/data2/text/range/0-5000/1015916.txt new file mode 100644 index 0000000000000000000000000000000000000000..10d9838123c14ad9a79e08e050d014dd75b53428 --- /dev/null +++ b/data2/text/range/0-5000/1015916.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4 capture output YUV420 format + +Query Text: +Other Parts Discussed in Thread: TDA2 We use TDA4 and connect YUV422 camera. TDA2 can set capture input format YUV422 and capture output format YUV420. Can TDA4 set capture input format YUV422 and capture output format YUV420 ? + +Responses: +Hi, No, VIP module in TDA2x can convert YUV422 to YUV420, but CSIRX cannot convert YUV422 to YUV420. You will require to use some other module like LDC or DSS for this conversion. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1016368.txt b/data2/text/range/0-5000/1016368.txt new file mode 100644 index 0000000000000000000000000000000000000000..a5c7cc9a86371baa804eb626e2a6dcb59e63f356 --- /dev/null +++ b/data2/text/range/0-5000/1016368.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2HF: About import tool sampleInData + +Query Text: +Part Number: TDA2HF Hello， I have two questions about import configuration parameters: (1).does sampleInData support video input or multiple images ? (2).if sampleInData support,how to set and how to prepare the video and images? and other question about caffe-jacinto quantize test: I test the imagenet_jacintonet11v2_iter_160000.caffemodel and set quantize: true in deploy.prototxt, save the output of pool5, and then remove quantize: true only,save the output of pool5 again, the results are same."quantize: true" doesn't seem to work.So if quantize: true does work,What happens to the output? Thanks, chen poca + +Responses: +Hi Chen poca, 1. You can set "numSampleInData" variable in the import config file and set "numFrames" variable in the infer config file for running multiple images. 2. You can concatenate multiple images to prepare the multiple image input The test results with and without quantize are available here in "caffe_jacinto_models\trained\image_classification\imagenet_jacintonet11v2" folder in the github (https://github.com/tidsp/caffe-jacinto-models), please refer to "run.log" in "test_quantize" and "test" folders. Thanks, Praveen + +hello, thank you for your replying. my reason to setting numSampleInData variable >1 is for import process not for inference.if numSampleInData>1,can I set sampleInData to multiple images? + +Yes + +so how to set multiple image to the sample InData ？using the txt file to list image path？or concatenate multiple images to one .y file？ + +Concatenate multiple images to one .y file + +Sorry for the late reply and thank you for your answer.I have another question,if using multiple images to the sampleInData,would this improve the effect and generalization ability of the quantization? + +No + diff --git a/data2/text/range/0-5000/1016451.txt b/data2/text/range/0-5000/1016451.txt new file mode 100644 index 0000000000000000000000000000000000000000..847175e8d371cc16d32180b498be2ba5371354ed --- /dev/null +++ b/data2/text/range/0-5000/1016451.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: Connect TDAPx-EVM to the internet + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello all, I have TDAPx-EVM board and I was able to build Yocto file system and boot the board using the built yocto file system. I want to connect it to the internet, after connecting it to an Ethernet cable there is still no internet connection, so I want to know is anything I have to configure or what should I do to have and internet connection on my TDAPx-EVM Thank You, Best regards, Kirollos Henry + +Responses: +Hi, Could you share the log from boot to linux kernel and the log from "ifconfig"? Did you change Linux kernel default config used by TDA2 SDK? Ethernet should be enabled already from the default config. Regards, Stanley + diff --git a/data2/text/range/0-5000/1027878.txt b/data2/text/range/0-5000/1027878.txt new file mode 100644 index 0000000000000000000000000000000000000000..2198c516f486163c9393bbdb7b7159a959fb446a --- /dev/null +++ b/data2/text/range/0-5000/1027878.txt @@ -0,0 +1,73 @@ +Ticket Name: TDA2HG: [Opengl] -- the cube usage in fbo + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 hi: I have a question about the usage of cubemap in fbo; the simple code as bellow: { glGenFramebuffers(1, &fboID); glBindFramebuffer(GL_FRAMEBUFFER,fboID); glGenTextures(1, &cubemapID); glBindTexture(GL_TEXTURE_CUBE_MAP, cubemapID); for (unsigned int i = 0; i < 6; ++i) { glTexImage2D(GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, 0, GL_RGB, 256, 256, 0, GL_RGB, GL_UNSIGNED_BYTE, nullptr); } glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MAG_FILTER, GL_LINEAR); glUniform.. //update the uniform variable glViewport(0, 0, 256, 256); for (unsigned int i = 0; i < 6; ++i) { glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, cubemapID, 0); if (glCheckFramebufferStatus(GL_FRAMEBUFFER) != GL_FRAMEBUFFER_COMPLETE) { printf("glCheckFramebufferStatus error!\n"); } glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT); renderCube(); } } when i test the code, it works well on windows, but when i move it to the tda2 platform, the question is comming, sometimes the effiect is black , or is white, or white and black , or other colors, it's change every time. how is this? and how to resolved it? thanks + +Responses: +Hello, Can you try and see if this works: // Setup texture for cubemap + glGenTextures(1, &textureCubeMap); + char buffer0[CUBEMAP_TEX_LEN * CUBEMAP_TEX_LEN * 6]; + + glBindTexture(GL_TEXTURE_CUBE_MAP, textureCubeMap); + memset((void *)buffer0, 0x50, CUBEMAP_TEX_LEN*CUBEMAP_TEX_LEN*6); + for(GLuint i = 0; i < 6; i++) + { + glTexImage2D( + GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, + 0, GL_RGBA8, CUBEMAP_TEX_LEN, CUBEMAP_TEX_LEN, + 0, GL_RGBA, GL_UNSIGNED_BYTE, (char *)buffer0 + ); + } + + glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MAG_FILTER, GL_LINEAR); + glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_MIN_FILTER, GL_LINEAR); + glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE); + glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE); + glTexParameteri(GL_TEXTURE_CUBE_MAP, GL_TEXTURE_WRAP_R, GL_CLAMP_TO_EDGE); + + // Setup Framebuffer for cubemap + glGenFramebuffers(1, &fbCubeMap); + + + // Rendering part + GLint current_fbo; + glGetIntegerv(GL_FRAMEBUFFER_BINDING, ¤t_fbo); + glBindFramebuffer(GL_FRAMEBUFFER, fbCubeMap); + + // Render to cubemap + for (int i = 0; i < 6; i++) + { + glFramebufferTexture2D(GL_FRAMEBUFFER, + GL_COLOR_ATTACHMENT0, + GL_TEXTURE_CUBE_MAP_POSITIVE_X + i, + textureCubeMap, + 0); + glClear(GL_COLOR_BUFFER_BIT|GL_DEPTH_BUFFER_BIT); + //.... draw/render to cube map surface + } + + // Bind the original frame buffer + glBindFramebuffer(GL_FRAMEBUFFER, current_fbo); + + // Use cubemap texture + glBindTexture(GL_TEXTURE_CUBE_MAP, textureCubeMap); + + //... draw to the final framebuffer using cubemap + // In the shader code, use samplerCube to sample texture + // e.g: + // uniform samplerCube skybox; + // ... + // vec4 colorval = texture(skybox, direction); + + + + + + + + + + + + If it still doesn't work, can you try and use glGetError to check for any errors? Regards Hemant + diff --git a/data2/text/range/0-5000/1028256.txt b/data2/text/range/0-5000/1028256.txt new file mode 100644 index 0000000000000000000000000000000000000000..6562b1898b7e19a6961fa8fe39fda9e83ece2d75 --- /dev/null +++ b/data2/text/range/0-5000/1028256.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: Is Reshape/Permute layer supported on TDA2X with CaffeImportTool? + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi ! When convert shufflenetv2 caffemodel to tidl bin/param using REL.TIDL.01.01.03.00, it failed. EEROR LOG: TIDL returned with error code : -1100, refer to interface header file for error code details Error at line: 1578 : in file .\.\src\tidl_tb.c, of function : test_ti_dl_ivison End of config list found ! But I check that reshape layer and permute layer work well in SSD model. So how can I make separate reshape layer and permute layer work ? + +Responses: +Hi, Reshape, Permute layers are supported only in the context of SSD network. They are not supported as standalone layers. Thanks, Praveen + +Hi Praveen Thanks for you replay. So currently, channel shuffle can not work on TIDL(both tda2 / 4). These requirements will be supported in the futures? + +Hi, It can work on TDA4 TIDL but not in TDA2 TIDL, please note that both are different code bases and TDA4 can support much more netwroks and frame works compare to TIDL on TDA2 , please try with TIDL on TDA4 (https://www.ti.com/tool/download/PROCESSOR-SDK-RTOS-J721E/08.00.00.12). Thanks, Praveen + diff --git a/data2/text/range/0-5000/1028549.txt b/data2/text/range/0-5000/1028549.txt new file mode 100644 index 0000000000000000000000000000000000000000..13c0d05ce69e97efc2bf3b3d006deb9e29ae1bb5 --- /dev/null +++ b/data2/text/range/0-5000/1028549.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: Is there a way to build yocto but not thud on TDA2Px-EVM to build python3 Tensorflow-lite + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello all, I Have TDA2Px-EVM board and I was able to build yocto file system on using this guide: http://software-dl.ti.com/processor-sdk-linux/esd/docs/06_00_00_07/linux/Overview_Building_the_SDK.html I was also able to customize the image as i have added some layers like meta-ros, meta-scipy and I was also able to create custom layer to install and build some libraries, packages and package groups. I was installing some python packages and the changes I made to the image allowed me to install most of the needed python3 packages using pip3. I am currently facing a problem in installing tensorflow or tensorflow-lite when I added meta-tensorflow-lite layer https://github.com/NobuoTsukamoto/meta-tensorflow-lite/ and appended to my image recipe IMAGE_INSTALL += " python3-tensorflow-lite " I have got "ERROR: Layer meta-tensorflow-lite is not compatible with the core layer which only supports these series: thud" So I am currently facing a problem as processor sdk 6.x are all based on thud and this distro is not supported in the tensorflow-lite meta layer and When I tried to build a different version of processor SDK there was a toolchain error "ERROR: Failed to parse external Linaro toolchain version from: gcc version 8.3.0 " as probably the other versions of processor SDK doesn't support "dra7xx-evm". My problem shortly is there any way to build yocto file system on TDA2Px-EVM based on another yocto distro rather than thud or is there a way to build and install python3 tensorflow or tensorflow-lite on TDA2Px-EVM using the built and working yocto with this version of processor SDK. Thanks in Advance. Best regards, Kirollos Henry + +Responses: +Hi Kirollos, Apologies for the delay in the response to this. Kirollos Henry said: is there any way to build yocto file system on TDA2Px-EVM based on another yocto distro rather than thud The short answer is no, thud is the last release with a completely validated offering with DRA7/TDA2. You will have to take care of the migration at your end. Kirollos Henry said: is there a way to build and install python3 tensorflow or tensorflow-lite on TDA2Px-EVM using the built and working yocto with this version of processor SDK. I dont think anyone in TI has spent time on this problem, therefore we are unable to provide you with any further instructions. Regards Karthik + diff --git a/data2/text/range/0-5000/1030453.txt b/data2/text/range/0-5000/1030453.txt new file mode 100644 index 0000000000000000000000000000000000000000..6daf20ad747cae270d25179e1b0467f0bbf3e700 --- /dev/null +++ b/data2/text/range/0-5000/1030453.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EG-17: Can a thread share works to dual core? + +Query Text: +Part Number: TDA2EG-17 Hello this article: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/692229/linux-tda2-hao-can-i-use-2-a15 said that "You can think as a single A15 core with CPU clock/frequency doubled" for dual core. But this article: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/862271/tda2hg-why-the-a15-usage-just-50-can-not-up-to-90 said one thread can only run in one core. So it means multi-threads will be separated to dual core automatically, but one thread can't. Is it? Thanks. BR, Jeff + +Responses: +Jeff, One thread can be scheduled only on one CPU. - Keerthy + diff --git a/data2/text/range/0-5000/1030791.txt b/data2/text/range/0-5000/1030791.txt new file mode 100644 index 0000000000000000000000000000000000000000..f789f20c43bea18cb1c866984b5825b2eb4673ac --- /dev/null +++ b/data2/text/range/0-5000/1030791.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: PROCESSOR_SDK_VISION_03_05 tidl_OD usecase layer limitations ? + +Query Text: +Part Number: TDA2SX Hi I tried to use tidl_model_import.out to get bin file. I used stats_tool_out.bin and trace_dump_0_512x512.y file to check test image detection result. Test image showed model can detect object. test image detection result: But I ran on tdasx, it cannot detect any object. I suspect tdasx cannot run too many layers model. The number of layersGroupId are 157 and number of parameters are 3.5M. Do tdasx have any limitations about layers or parameters count? thanks yumei + +Responses: +Hi Yumei, Below are the SSD limitations listed in the TIDL datasheet : – Only Caffe-Jacinto based SSD network is validated. – Reshape, Permute layers are supported only in the context of SSD network. – “share_location” has to be true – Tested with 4 and 5 heads. – SaveOutputParameter is ignored in TIDL inference. – code_type is only tested with CENTER_SIZE. Please try the suggestions mentioned in the below thread in OD use case to get the detections in the output : https://e2e.ti.com/support/processors-group/processors/f/processors-forum/689617/tda2-how-to-run-ssd-based-tidl-od-use-case-in-vision-sdk-with-pre-trained-model Thanks, Praveen + +Hi Praveen I confused about Tested with 4 and 5 heads. Did it mean about 4 and 5 anchor box result? Thanks, yumei + +Yes + diff --git a/data2/text/range/0-5000/1032151.txt b/data2/text/range/0-5000/1032151.txt new file mode 100644 index 0000000000000000000000000000000000000000..b873cffe6b8a583d0acf7916e05823a0030ddd1f --- /dev/null +++ b/data2/text/range/0-5000/1032151.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: How can I extract two CNN output tensors on TIDL (TDA2) + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi sir! My network have two (maybe more) output layers (CxHxW) : Cx56x56 & Cx28x28. How can I get two outputs from TDIL? + +Responses: +Hi IIuo, Sorry for the delay. This is not supported in TIDL on TDA2. Thanks, Praveen + +Hi Praveen I proposed a method to solve this problem ： using Transpose Conv and Concat. Step 1. I add a Transposed Conv layer with 4x4 kernel, stride 2 to the small size layer (for upsampling : Cx28x28 -> Cx56x56) Step 2. I fill filter manually to make Transposed Conv layer working as insert 0 between original output elements [e11 e12 -> [ e11 0 e12 0 e21 e22] 0 0 0 0 e21 0 e22 0 0 0 0 0 ] Step 3. I use Concat layer to get my output tensor : 2Cx56x56 So I can simply add stride =1 / 2 to decode different output tensor. Those works have been tested on Caffe. Hope that can help others. + +Thanks for sharing. + diff --git a/data2/text/range/0-5000/1033681.txt b/data2/text/range/0-5000/1033681.txt new file mode 100644 index 0000000000000000000000000000000000000000..737b8940e4abcd5ab4c069fc6a36a61ec43086ec --- /dev/null +++ b/data2/text/range/0-5000/1033681.txt @@ -0,0 +1,8 @@ +Ticket Name: CCSTUDIO: Using CCS scripting with Lauterbach debugger. + +Query Text: +Part Number: CCSTUDIO Other Parts Discussed in Thread: TDA2 Hi, I have a TDA2XX-EVM on which i'm loading and running few binaries of different cores. Here i'm using Spectrum Digital XDS560V2 STM USB Emulator. Also i'm using scripts to launch ccxml, load and run binaries. But i need to use Lauterbach debugger instead of this spectrum digital debugger. But i could'nt find any example scripts with respect to Lauterbach debugger. Can anyone please tell me or send me a reference links that specifies the use of Lauterbach debugger for my TDA2XX regards, Likhith + +Responses: +-0- Which TDA2 chip are you using? Does it have a single A15 or a dual-A15? I do have TRACE32 CMMs which are converted versions of GELs which I use. Typically these are shared via TI-CDDS. If you have access I could upload there. If you tell exactly which CPU you have I can see about uploading a subset here. -1- Lauterbach on their website (and in their release images) has simplified scripts which allow running code on TDA2 systems. It might be one of these is sufficient for whatever you are trying to run. https://www.lauterbach.com/scripts/hardware/arm~tda2x~vayu_evm/hardware-arm-tda2x-vayu_evm_20200205093516_all_files.zip https://www.lauterbach.com/scripts/hardware/arm~dra72x~j6_eco_evm/hardware-arm-dra72x-j6_eco_evm_20200205093452_all_files.zip https://www.lauterbach.com/scripts/hardware/arm~dra7xx/hardware-arm-dra7xx_20200205093452_all_files.zip Regards, Richard W. + diff --git a/data2/text/range/0-5000/1035356.txt b/data2/text/range/0-5000/1035356.txt new file mode 100644 index 0000000000000000000000000000000000000000..da2e4dc610795ae06b4543fcb62c3e0844f9599f --- /dev/null +++ b/data2/text/range/0-5000/1035356.txt @@ -0,0 +1,38 @@ +Ticket Name: TDA2EXEVM: TDA2 DSP2 XDC ASSERT + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: SYSBIOS We run our algorithm on DSP2. Sometimes DSP2 will have XDC Assert message and then DSP2 will crash. How can we solve it? Log: [DSP2 ] 11173.232111 s: ### XDC ASSERT - ERROR CALLBACK START ### [DSP2 ] 11173.232141 s: [DSP2 ] 11173.232202 s: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details. [DSP2 ] 11173.232233 s: [DSP2 ] 11173.232233 s: ### XDC ASSERT - ERROR CALLBACK END ### + +Responses: +Have any update? + +Hi, Please refer to BIOS API doc for GateMutex. Or, you can find the source under ~/bios_6_46_06_00/packages/ti/sysbios/gates/GateMutex.c. You are hitting the below error where GateMutex_enter() is called in HWI or SWI context. /* + * ======== GateMutex_enter ======== + * Returns FIRST_ENTER when it gets the gate, returns NESTED_ENTER + * on nested calls. + * + * During startup, Task_self returns NULL. So all calls to the + * GateMutex_enter look like it is a nested call, so nothing done. + * Then the leave's will do nothing either. + */ +IArg GateMutex_enter(GateMutex_Object *obj) +{ + Semaphore_Handle sem; + + /* make sure we're not calling from Hwi or Swi context */ + Assert_isTrue(((BIOS_getThreadType() == BIOS_ThreadType_Task) || + (BIOS_getThreadType() == BIOS_ThreadType_Main)), + GateMutex_A_badContext); + + if (obj->owner != Task_self()) { + sem = GateMutex_Instance_State_sem(obj); + Semaphore_pend(sem, BIOS_WAIT_FOREVER); + + obj->owner = Task_self(); + + return (FIRST_ENTER); + } + + return (NESTED_ENTER); +} Regards, Stanley + diff --git a/data2/text/range/0-5000/1037669.txt b/data2/text/range/0-5000/1037669.txt new file mode 100644 index 0000000000000000000000000000000000000000..371b13cded189c3eef9d7340584deb0371321e1c --- /dev/null +++ b/data2/text/range/0-5000/1037669.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2HG: tda2 anti-aliasing + +Query Text: +Part Number: TDA2HG hello: usecase: render a model, but the alias is obvious, so i need to use the anti-aliasing. when the egl chooseconfig, i add the EGL_SAMPLE_BUFFERS, 1 and EGL_SAMPLES,4 to the attribs, it works better, but not enough, so i change the EGL_SAMPLES, 8, the result is eglCreateContex failed! it seems doesn't support. do you have other methods? thanks ~ + +Responses: +Hello, That is correct. 8 is not supported. 4 is the max value for EGL_SAMPLES. Regards Hemant + +how about TDA4, the max value? + +Hello, TDA4VMid also supports upto 4 - but of course, you will need to keep overall performance in mind. Regards Hemant + +got it, thank you~ + diff --git a/data2/text/range/0-5000/1038392.txt b/data2/text/range/0-5000/1038392.txt new file mode 100644 index 0000000000000000000000000000000000000000..f11b614f45a7c58f5c6c9d2037b75112541fe75e --- /dev/null +++ b/data2/text/range/0-5000/1038392.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Memory access error when EVE read address more than 512MB DDR + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi expert, Customer used 512MB on TDA2 before while they increased DDR3 to 1GB recently. After modified EMIF and DMM configuration in gel file, we could access 0xB5000000 on DSP and ARM in CCS memory watch page. But on EVE, it reported error as below. Could you please suggest what we need to do to make EVE access correct? Thank you. + +Responses: +Hi, You have to update the EVE MMU mapping in GEL file. The max page size per entry in EVE MMU is only 16MB. Regards, Stanley + diff --git a/data2/text/range/0-5000/1038804.txt b/data2/text/range/0-5000/1038804.txt new file mode 100644 index 0000000000000000000000000000000000000000..a3603992d309dc687d03499a8b32d4d715ea65be --- /dev/null +++ b/data2/text/range/0-5000/1038804.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: How to use remote service on TDA2 + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 The customer would like to get serializer and deserializer‘s register information in usecase code, but that information is on another core, so he intends to use remote service to get the information which is on another core. The customer would like to know how to use remote service function on TDA2, and could you you please offer an example? Thanks. Best Regards, Cherry Zhou + +Responses: +Hi, The latest update as follows: The customer also would like to have an example about how to use remote service function based on TDA2 SDK. Thanks again! Best Regards, Cherry Zhou + +Hi, May I know is there any update? Thanks! Best Regards, Cherry Zhou + +Hi Cherry, Could you give some details about the customer system? What OS is used on A15? Which core will have the SerDes driver? Which core does need to get the register info via remote calls? Regards, Stanley + diff --git a/data2/text/range/0-5000/1040319.txt b/data2/text/range/0-5000/1040319.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c6be44ae5c0cf4af17516b382f3b7bc978c7a45 --- /dev/null +++ b/data2/text/range/0-5000/1040319.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4VM: Does TDA4 ISP support RGB-IR sensor ? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 The TDA2/TDA3 vision SDK 3.8 has the demosaicing function implemented on c66x . Was wondering if the TDA4 ISP is flexible enough to avoid using the DSP for such pixel intensive task. regards, Victor + +Responses: +Hi Victor, There are 2 kinds of RGB-Ir sensors 1. 2x2 CFA : This type is natively supported by TDA4 ISP. Any 2x2 CFA is supported. 2. 4x4 CFA : This requires a pre-processing step similar to what was done on TDA2P and TDA3. Regards, Mayank + +Thanks ! + diff --git a/data2/text/range/0-5000/1041010.txt b/data2/text/range/0-5000/1041010.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec6d2c76f540f8146d069b54e8d31c72af6dc420 --- /dev/null +++ b/data2/text/range/0-5000/1041010.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ABZ: Does this board support Deep learning accelaration (TIDL)? + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 I'm trying to figure out if our boards will get any speedup from going through the TIDL conversion, on one hand https://training.ti.com/overview-ti-deep-learning-tda2-and-tda3-adas-platforms this link this claim accleration, on the other hand in the TIDL userguide , https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/07_00_00_11/exports/docs/tidl_j7_01_02_00_09/ti_dl/docs/user_guide_html/md_tidl_overview.html, it lists only TD4 as deep learning accelerated. Can anyone shed some info? + +Responses: +Hi Joseph, TDA2 and TDA3 are old generation boards which can do TIDL conversion, but on these boards there is no active TIDL development and limited support. TDA4 is our new generation more capable device with active TIDL development and also supports huge variety of DL networks with different frameworks. We would suggest to evaluate TDA4 for DL acceleration. Thanks, Praveen + diff --git a/data2/text/range/0-5000/1042093.txt b/data2/text/range/0-5000/1042093.txt new file mode 100644 index 0000000000000000000000000000000000000000..d9f24beebfc87e5b013c82f6dc2b634162e2ebd2 --- /dev/null +++ b/data2/text/range/0-5000/1042093.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: NDK Change static IP configuration + +Query Text: +Part Number: TDA2SX Hi, TI Experts! We use TDA2X custom board with PROCESSOR_SDK_RADAR_03_07_00_00 and set up IP configuration in PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\cfg\NDK_config.cfg Can we change static IP configuration in our application at runtime? Can you advice any examples? Best Regards, Dmitry + +Responses: +Hi, Please refer to the below thread. https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/681655/ccs-msp432e401y-how-does-the-udpecho-sample-code-configure-static-ip Regards, Stanley + +Thanks a lot! + diff --git a/data2/text/range/0-5000/1045963.txt b/data2/text/range/0-5000/1045963.txt new file mode 100644 index 0000000000000000000000000000000000000000..b43255440c9e38b45c2914aa9fee2836ffc455fe --- /dev/null +++ b/data2/text/range/0-5000/1045963.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA4VM: porting hardware surround view interface to app_srv_camera demo display unexpect + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 porting hardware surround view interface to app_srv_camera demo display unexpect Dear expert, I porting my surround view interface into app_srv_camera demo, add my init interface to tivxGlSrvCreate, which need 3 paramters (display, surface, context), replace render_renderFrame with my UpdataApp interface for doing surround view function, in my interface, there are create serval framebuffers use glGenFramebuffer, and when the app run, call glBindFramebuffer bind texture to each framebuffer, then glBindFramebuffer (GL_FRAMEBUFFER, 0) render all the contents to the window provided framebuffer, now on tda4vm linux sdk, because the surface is null, I don't know where the display content store and how to get it when do glBindFramebuffer (GL_FRAMEBUFFER, 0) . In tivxGlSrvProcess, I found appEglBindFramebuffer call glBindFramebuffer bind the display buffer , so I modify my UpdataApp interface , delete all glBindFramebuffer code line, after do that I can see one part of my materials dispaly on screen . my question: 1) if tda4vm can create surface for render, how to do it, I try to call eglCreatePbufferSurface to create it , but it failed 2) if can't create surface, how to modify my interface for dispaly all the materials or how to get the content buffer after render finish. sdk vision: 07_03_00_07 OS: Linux Thanks! + +Responses: +Hello, In case of TI's TDA4 surround view implementation, the display is controlled using R5 and the OpenVX display node abstracts this out. Look at vision_apps/utils/opengl/src/a72/app_gl_egl_utils_linux.c. There is a function to create render surface/texture from a pre-allocated dmabuf - appEglWindowCreateIMG. This function basically takes a dmabuf fd and creates an EGL Image that can be rendered to. This is used as a frame buffer in appEglBindFrameBuffer (in the same file). You can follow the same procedure. What are you trying to do in your use case? Do you need to send your GPU rendered buffer to R5 display? You can also look at a simpler example - vision_apps/apps/basic_demos/app_linux_arm_opengl_mosaic Regards Hemant + +Thanks！ Yes， I need to send my GPU rendered buffer to R5 dispaly, but I don't know how to do it, I try to use glReadPixel read my gpu output to output_target_ptr, but it failed and return 0x506 error report. As you discribe I follow app_gl_egl_utils_linux.c , use the same procedure, in my own case which run on tda2 before, which need input 4 camera capture frames and load some other materials, then do surround view function and display the output render buffer. + +hi， expert As my described， my function interface have many materials and textures need scale/render to one surface, It's hard for me modify the process flow, so I want to create a surface with pbuffer which can pass to function interface or use a opengl interface like glReadPixel copy the output buffer to display buffer. This problem bothered me for a long time, I need you help. Thanks! + +Hello, glReadPixels should work - not sure why you are seeing that error. Can you please review all the arguments and make sure they are okay? But please know that glReadPixels may have a performance hit - but should certainly get you the required data. As I mentioned in my previous post, app_linux_arm_opengl_mosaic shows how to handle GPU to display. Regards Hemant + +Thanks for your reply! I am already reference the app_linux_arm_opengl_mosaic demo, I modified my program, replace the function code call glBindFramebuffer (GL_FRAMEBUFFER, 0) to glBindFramebuffer (GL_FRAMEBUFFER, disp_fb), then call glFramebufferTexture2D bind the texture need render to current framebuffer, but there are some errors arised， This is the log ### glCheckFramebufferStatus not completed! status 36054 GL: after eglSwapBuffers() glError (0x506) If I deleted glFramebufferTexture2D , no error log print out, but there is also no display. If I keep call glBindFramebuffer (GL_FRAMEBUFFER, 0) in my app, the glCheckFramebufferStatus also report error, is't means there is no default framebuffer ? + +hello: I did some test of that , when glBindFramebuffer(GL_FRAMEBUFFER, 0) glCheckFramebufferStatus return 0x8219 which GL_FRAMEBUFFER_UNDEFINED, so EGL_NO_SURFACE which means no default framebuffer, so I call glBindFramebuffer (GL_FRAMEBUFFER, fboid) and glFramebufferTexture2D , fixed some bugs of my app, glCheckFramebufferStatus return ok, and I can see some color output to my screen（but not correct）, I think this is because my default render flow not suitable the new draw flow。 I know on tda4vm QNX can create a surface with buffer, which can pass to my app, so there is't need modify the render flow. so my question is can I create a surface with a buffer on linux? + +resolved! please close it! + diff --git a/data2/text/range/0-5000/1046205.txt b/data2/text/range/0-5000/1046205.txt new file mode 100644 index 0000000000000000000000000000000000000000..7f45dc3b8a09bd1bf8e10392602719d6d0d629d4 --- /dev/null +++ b/data2/text/range/0-5000/1046205.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: How to change the DDR memory size on the tda2? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, Two DDRs are used in our own tda2 board, each of which is 2GB, with a total of 4GB. It is found that the default memory node in DTS is 1GB. After changing it to 4GB, it is found that the kernel cannot be started. How can I use all 4GB of memory? + +Responses: +Hi, Can you please let me know on how you confirmed on the total of 4GB? Do you have a custom board or you are using standard TI TDA2SX EVM? The max that can be supported can be upto 4GB but I believe on the TI Board it is 2GB DDR. Can you share the links on 4GB DDR? Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/1046305.txt b/data2/text/range/0-5000/1046305.txt new file mode 100644 index 0000000000000000000000000000000000000000..99aaa9d80bd29d890814a1422c9496cbac7ca67c --- /dev/null +++ b/data2/text/range/0-5000/1046305.txt @@ -0,0 +1,61 @@ +Ticket Name: TDA2HF: Set DSS parameter failed when Display_Link was creating + +Query Text: +Part Number: TDA2HF In PROCESSOR_SDK_VISION_03_08_00_00,i builded a chain: capture->vpe->display vpe params was set as below: +static Void chains_vipSingleCam_Enc_Dec_SgxDisplay_SetVPEPrms( +VpeLink_CreateParams *pPrm, +UInt32 numLvdsCh, +UInt32 displayWidth, +UInt32 displayHeight, +UInt32 inputWidth, +UInt32 inputHeight +) +{ +UInt16 chId; + +pPrm->enableOut[0] = TRUE; + +for(chId = 0; chId < numLvdsCh; chId++) +{ +pPrm->chParams[chId].outParams[0].numBufsPerCh = +VPE_LINK_NUM_BUFS_PER_CH_DEFAULT; + +pPrm->chParams[chId].outParams[0].width = displayWidth; +pPrm->chParams[chId].outParams[0].height = displayHeight; +pPrm->chParams[chId].outParams[0].dataFormat =SYSTEM_DF_RGB24_888 ; + +pPrm->chParams[chId].scCfg.bypass = FALSE; +pPrm->chParams[chId].scCfg.nonLinear = FALSE; +pPrm->chParams[chId].scCfg.stripSize = 0; + +pPrm->chParams[chId].scCropCfg.cropStartX = 32; +pPrm->chParams[chId].scCropCfg.cropStartY = 24; +pPrm->chParams[chId].scCropCfg.cropWidth = inputWidth-32; +pPrm->chParams[chId].scCropCfg.cropHeight = inputHeight-24; +} +} + then i got assert as below: [HOST] [IPU1-0] 57.923595 s: CaptureLink_drvAllocAndQueueFrames:1553:FVID2_queue: captureVipHandle=0x9f11b880, frameList.numFrames=6, streamId=0 + [HOST] [IPU1-0] 57.923961 s: CAPTURE: Create Done !!! + [HOST] [IPU1-0] 57.924388 s: VPE: Create in progress !!! + [HOST] [IPU1-0] 57.925242 s: wwlog:vpe set flag=82176,format=20 + [HOST] [IPU1-0] 58.164765 s: VPE: Loading Down-scaling Co-effs + [HOST] [IPU1-0] 58.164978 s: VPE: Co-effs Loading ... DONE !!! + [HOST] [IPU1-0] 58.165222 s: VPE: Create Done !!! + [HOST] [IPU1-0] 58.165649 s: DISPLAY: Create in progress !!! + [HOST] [IPU1-0] 58.165954 s: wwlog: repliEnalbe is false before set!!!!! + [HOST] [IPU1-0] 58.166046 s: wwlog: repliEnalbe set true + [HOST] [IPU1-0] 58.166107 s: wwlog: display get flag= 82176,format=20 + [HOST] [IPU1-0] 58.166168 s: wwlog: display will create in SYSTEM_DF_RGB24_888!!!!! + [HOST] [IPU1-0] 58.166320 s: hal/src/vpshal_dssDispcVid.c @ Line 1023: + [HOST] [IPU1-0] 58.166412 s: Invalid Data format + [HOST] [IPU1-0] 58.166595 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: + [HOST] [IPU1-0] 58.166687 s: Set DSS parameter failed + [HOST] [IPU1-0] 58.166748 s: Assertion @ Line: 474 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! But when i use capture->vpe->sgxFmcpy(A15)->display,display_link can run normal in SYSTEM_DF_BGRA16_4444 . I want to know why dispaly_link cant be creanted in SYSTEM_DF_RGB24_888,or how to make display_link run in SYSTEM_DF_RGB24_888 . + +Responses: +Hi, I think DSS does not support RGB24_888 format, ie R in lower byte, followed by G, followed by B. DSS supports BGR24_888 format, So can you try changing it to system_df_BGR24_888 format? Regards, Brijesh + +Thanks for your reply. Dont know why ,but display does run normal with BGR24_888, + +Because it is only supported in the DSS. The other RGB packed format is not supported. + diff --git a/data2/text/range/0-5000/1046872.txt b/data2/text/range/0-5000/1046872.txt new file mode 100644 index 0000000000000000000000000000000000000000..8227b80810b3376a6a26a3a953f19452baf64bc4 --- /dev/null +++ b/data2/text/range/0-5000/1046872.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: TDA2XSBTQABCRQ1 Display output YUV422 hardware schematic review + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Dear experts, Our customer want to output YUV422 but not sure whether this connection correct according to TDA2 TRM. Can you help review this? + +Responses: +Hi Dong, It really depends on the output interface that they are going to use. If output interface is going to be BT656, then you could use 10bit output lines, ie D0 to D9 or 8bit output data lines D9 to D2. If output interface is going to be discrete sync (BT601, yuv22 discrete sync), then 8bit data would be on D7-D0 data lines.. Regards, Brijesh + +Hi Brijesh, Thanks for your reply. It's very helpful to me. They have another question is how to configure BT656 or BT601 output in the SDK code. + +Hi Dong, Unfortunately, EVM does not support BT656 or BT601 output interface, so SDK does not support or have any usease to demonstrate it. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1048217.txt b/data2/text/range/0-5000/1048217.txt new file mode 100644 index 0000000000000000000000000000000000000000..c1e485b947c2de15c4f99b7b88aa707e4e06ddca --- /dev/null +++ b/data2/text/range/0-5000/1048217.txt @@ -0,0 +1,24 @@ +Ticket Name: PROCESSOR-SDK-TDAX: "AR12XX: FAULT: BSS CPU fault!!" seen frequently, forcing user to reboot radar + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: MMWCAS-DSP-EVM, MMWCAS-RF-EVM, AWR2243, AWR1243, TDA2 Hello, I have an MMWCAS-RF-EVM mounted on MMWCAS-DSP-EVM. I'm using PROCESSOR_SDK_RADAR_ 3.08 and often times I'm seeing this error on my terminal window. [IPU1-0] 1300.877569 s: radar_ar12xx/src/bspdrv_ar12xxPriv.c @ Line 541: [IPU1-0] 1300.877691 s: AR12XX: FAULT: BSS CPU fault!! [IPU1-0] 1300.877783 s: radar_ar12xx/src/bspdrv_ar12xxPriv.c @ Line 545: [IPU1-0] 1300.877844 s: AR12XX: FAULT: ESM fault!! [IPU1-0] 1301.117214 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.117336 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.117458 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150216 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150369 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large [IPU1-0] 1301.150460 s: SyncLink: dropping frame due to time delta(-2084364888ms) too large I am forced to reboot the radar if I want to continue working with it. The hardware version reported by the serial terminal is ES3.0. I don't seem to have this problem happen this frequently in the ES1.0 hardware that I have. Please tell me how to isolate and fix this problem? Is there a firmware update I'm missing? Thanks Asher + +Responses: +Hi, ES1.0 and ES2.0 have different version of radar firmware. During radar init, it should try to check the revision of radar and download the corresponding firmware. You can check the log to see if the ES version of radar was detected correctly. Regards, Stanley + +Hi Stanley, We have 2 Cascade RF boards where both boards have AWR2243 transceivers. However one board has hwMajor of 1 and the other has hwMajor 3. We believe these numbers represent ES1.0 and ES3.0. Since we have 2 AWR FW binary files for AWR1243 and AWR2243, Both cascade boards are downloaded with 2243 FW disregards whether one is an ES1.0 and the other is an ES3.0. That's how we modified the TDA2 bootup code to detect and behave. Please tell us if that assumption is correct. Now back to the BSS and ESM Faults above, we've seen this error showed up very often on the ES3.0 HW version vs the ES1.0 HW version even though both are running with same 2243 FW. So we are wondering if ES3.0 HW version has an updated FW for it to be used that fixes above errors seen? Thank you, --Khai + +Hi Khai, I have forwarded this question to our Radar team to comment. In Radar SDK, only AWR1243 ES1.0 and 2.0 firmware have been tested. Regards, Stanley + +Hi, Unfortunately, as mentioned by Stanley the Radar Processor SDK demo is not validated with AWR2243. There are some patches available in this forum provided by some forum members but they are not validated by TI We would have to open this question to the forum community for further support thank you Cesar + +Hi Khai, If you refer mmWave DFP 2.2.3.1 example, where same code works for both AWR2243 ES1.0 and ES1.1 based on HW version. You need to implement similar logic in your application C:\ti\mmwave_dfp_02_02_03_01\ti\example\mmWaveLink_SingleChip_Example\mmw_example.c retVal = rlDeviceGetMssVersion(deviceMap, &mssFwVer); /* For AWR2243 ES1.0 MSS ROM FW version '2.2.0.3' and ES1.1: '2.2.1.7' */ if ((mssFwVer.fwBuild == 1) && (mssFwVer.fwDebug == 7)) { gMmwaveSensorEs1_1 = AWR2243_ES1_1; } else { gMmwaveSensorEs1_1 = AWR2243_ES1_0; } Similar way you can check first the AWR1243 MSS ROM version which will have some definite value for ES1.0/2.0/3.0 Silicon samples and based on that select the matching FW version to download. Regards, Jitendra + +Hi Jiten, So is there a ES3.0 AWR2243 FW you can send us? In the HW detection, what parameters constitute to AWR2243 ES3.0 device? Thanks, --Khai + +There is no AWR2243ES 3.0, only ES 1.0 and ES 1.1 There was an AWR1243 ES3.0 Thank you Cesar + +Hi Jiten, Thanks for the clarification. So we have 2 FWs built into the AppImage in TDA2. One for 1243 and one for 2243 since we have both Cascade RF board in 1243 and 2243. My questions are: 1. What is the logic to detect AWR models (1243 or 2243)? 2. If it's 1243, would the same 1243 FW be compatible with all ESx version? 3. If it's 2243, would the same 2243 FW be compatible with all ES1.0 or 1.1 version? Thanks, --Khai + +The FW release are usually not compatible. The DFP release notes mention the ES supported. Thank you Cesar + diff --git a/data2/text/range/0-5000/1049699.txt b/data2/text/range/0-5000/1049699.txt new file mode 100644 index 0000000000000000000000000000000000000000..a93204ff3968613e81467e52711e52fd34951bd9 --- /dev/null +++ b/data2/text/range/0-5000/1049699.txt @@ -0,0 +1,8 @@ +Ticket Name: DRA756: EMMC linux driver issue + +Query Text: +Part Number: DRA756 Hi. sdk: PROCESSOR_SDK_VISION_03_05_00_00 For the same software, only the SOC of the two boards is different. One uses tda2s and the other uses dra756. Tda2s can use EMMC ddr50 mode.while dra756 cannot use ddr50 mode,Dra756 can use EMMC HS mode dts: &mmc2 { status = "okay"; vmmc-supply = <&evm_3v3_sw>; bus-width = <8>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v","ddr50"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev11_conf>; pinctrl-3 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev20_conf>; pinctrl-4 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev11_conf>; pinctrl-5 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev20_conf>; }; dr756 emmc ddr50 mode log: [ 1.072168] ldousb: disabling [ 1.073427] omap8250 4806a000.serial: failed to request DMA [ 1.074258] Waiting for root device PARTUUID=dda7f685-03... [ 1.163294] mmc0: host does not support reading read-only switch, assuming write-enable [ 1.168022] mmc0: new ultra high speed DDR50 SDHC card at address aaaa [ 1.169218] mmcblk0: mmc0:aaaa SS08G 7.40 GiB [ 1.174636] mmcblk0: p1 p2 p3 p4 < p5 p6 p7 p8 p9 > [ 1.220299] mmc1: MAN_BKOPS_EN bit is not set [ 1.223227] mmc1: new DDR MMC card at address 0001 [ 1.224159] mmcblk1: mmc1:0001 8GUF4R 7.28 GiB [ 1.224893] mmcblk1boot0: mmc1:0001 8GUF4R partition 1 31.9 MiB [ 1.225796] mmcblk1boot1: mmc1:0001 8GUF4R partition 2 31.9 MiB [ 1.226886] omap_hsmmc 480b4000.mmc: ADMA err: ST_TFR, desc at 0xfe441008 follows the erroneous one [ 1.228069] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00 [ 1.229261] mmcblk1: retrying using single block read [ 1.229960] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0 [ 1.231130] blk_update_request: I/O error, dev mmcblk1, sector 0 [ 1.231951] mmcblk1: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 [ 1.233120] blk_update_request: I/O error, dev mmcblk1, sector 1 [ 1.233945] mmcblk1: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0 [ 1.235114] blk_update_request: I/O error, dev mmcblk1, sector 2 [ 1.235931] mmcblk1: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0 [ 1.237100] blk_update_request: I/O error, dev mmcblk1, sector 3 [ 1.237917] mmcblk1: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0 [ 1.239084] blk_update_request: I/O error, dev mmcblk1, sector 4 [ 1.239903] mmcblk1: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0 [ 1.241072] blk_update_request: I/O error, dev mmcblk1, sector 5 [ 1.241890] mmcblk1: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0 [ 1.243057] blk_update_request: I/O error, dev mmcblk1, sector 6 [ 1.243873] mmcblk1: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0 [ 1.245057] blk_update_request: I/O error, dev mmcblk1, sector 7 [ 1.245822] Buffer I/O error on dev mmcblk1, logical block 0, async page read [ 1.246800] omap_hsmmc 480b4000.mmc: ADMA err: ST_TFR, desc at 0xfe441008 follows the erroneous one [ 1.247980] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00 [ 1.249170] mmcblk1: retrying using single block read [ 1.249869] mmcblk1: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0 [ 1.251036] blk_update_request: I/O error, dev mmcblk1, sector 0 [ 1.251859] mmcblk1: error -84 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 [ 1.253027] blk_update_request: I/O error, dev mmcblk1, sector 1 [ 1.253845] mmcblk1: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0 [ 1.255082] mmcblk1: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0 [ 1.256310] mmcblk1: error -84 transferring data, sector 4, nr 4, cmd response 0x900, card status 0x0 [ 1.257532] mmcblk1: error -84 transferring data, sector 5, nr 3, cmd response 0x900, card status 0x0 [ 1.258760] mmcblk1: error -84 transferring data, sector 6, nr 2, cmd response 0x900, card status 0x0 [ 1.259982] mmcblk1: error -84 transferring data, sector 7, nr 1, cmd response 0x900, card status 0x0 [ 1.261153] Buffer I/O error on dev mmcblk1, logical block 0, async page read [ 1.262070] mmcblk1: unable to read partition table [ 1.532364] EXT4-fs (mmcblk0p3): recovery complete + +Responses: +Hi GJ, Is this still an open issue for you or were you able to resolve the issue yourself? regards Suman + diff --git a/data2/text/range/0-5000/1049857.txt b/data2/text/range/0-5000/1049857.txt new file mode 100644 index 0000000000000000000000000000000000000000..6962d0581d24101402beb7fcdd620f4f45c660a4 --- /dev/null +++ b/data2/text/range/0-5000/1049857.txt @@ -0,0 +1,10 @@ +Ticket Name: PROCESSOR-SDK-TDAX: Is there a way to program the user Programmable LEDs in TIDEP-01017? + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Hi, I'm using MMWCAS_DSP_EVM with Processor SDK Radar 3.08 and according to the User guide of the board, these LEDs(in Table) are user-programmable. I was wondering if I can get guidance on how to program these LEDs from the Radar SDK. I would greatly appreciate it. + +Responses: +Hi, These LEDs are connected to GPIO expander output. The same GPIO expander is also configured in Bsp_boardTda2xxCascadeEnableSdAndEth() under ~\ti_components\drivers\pdk\packages\ti\drv\vps\src\boards\src\bsp_boardTda2xx.c. You can refer to that function to see how to configure the specific output of the GPIO Expander via I2C command. Regards, Stanley + +Hi Stanley, Thank you for the response. We were able to run this example located in ~\ti_components\drivers\pdk_01_10_04_05\packages\ti\csl\example\i2c\i2c_led_blink\main.c After modifying the slave address for the correct Port Expander (0x76 instead of 0x20), and were able to blink all those LEDs. Although we had to modify the sample code based on the datasheet(configuring the ports to become output before switching them ON/OFF). + diff --git a/data2/text/range/0-5000/1050651.txt b/data2/text/range/0-5000/1050651.txt new file mode 100644 index 0000000000000000000000000000000000000000..a89832756be5cefc5c428218e94423f72757157d --- /dev/null +++ b/data2/text/range/0-5000/1050651.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Video data conversion + +Query Text: +Part Number: TDA2SX Hi TI Expert, 1.HDMI interface: We known HDMI output display video stream in YUV422/YUV420/RGB565/RGB666/RGB888 format from TDA2x datasheet. we do not see HDMI transfer raw data stream, please confirm whether HDMI can not transfer raw data ? or TDA2S video processing engine can not make raw data packets in raw data 8bit/12bit format ? 2.MIPI DSI/MIPI CSI: we want MIPI DSI as video source simulator, what is the difference between MIPI DSI and MIPI CSI ? Are these difference physical layer, data packet protocol, or others? please confirm whether MIPI CSI can receive video source from MIPI DSI ? Thanks + +Responses: +Hi Wang, Please find answers to your questions. Jiacai Wang said: we do not see HDMI transfer raw data stream, please confirm whether HDMI can not transfer raw data ? or TDA2S video processing engine can not make raw data packets in raw data 8bit/12bit format ? No, typically, raw data is not transmitter over HDMI. In fact, DSS, from where HDMI gets its input, does not support raw data.. Jiacai Wang said: 2.MIPI DSI/MIPI CSI: we want MIPI DSI as video source simulator, what is the difference between MIPI DSI and MIPI CSI ? Are these difference physical layer, data packet protocol, or others? please confirm whether MIPI CSI can receive video source from MIPI DSI ? No, Please refer to DSI and CSI specs for more details. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1051700.txt b/data2/text/range/0-5000/1051700.txt new file mode 100644 index 0000000000000000000000000000000000000000..3c2a902bd10b616ca76dcbd3014017e9bdddf985 --- /dev/null +++ b/data2/text/range/0-5000/1051700.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-J721E: Migrating sensor support from J6 to J7 SDK + +Query Text: +Part Number: PROCESSOR-SDK-J721E Other Parts Discussed in Thread: TDA2 Hello, My customer would like to use the OV2311 sensor along with TDA4 as he was formerly using it with TDA2 processors. Do we have any plan to support OV2311 or OV2312 in a J7 SDK? If not, what would it take for one to migrate the driver from the J6 SDK to the J7 SDK? Thank you. Best regards, François. + +Responses: +OV231x is not planned in J7 SDK. To add new sensor, please follow the steps at http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/developer_notes_image_sensor.html + diff --git a/data2/text/range/0-5000/1052029.txt b/data2/text/range/0-5000/1052029.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5476340768119ad2c6407a3544a002da9b03bc1 --- /dev/null +++ b/data2/text/range/0-5000/1052029.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HF: Program on M4 auto start when i load program by CCS + +Query Text: +Part Number: TDA2HF Processor :TDA2X SDK: VISION_SDK_3.8 According to the <> ,i load the progarm : On ARP32_EVE_4, load the binary, “vision_sdk_arp32_4_release.xearp32F”. On ARP32_EVE_3, load the binary, “vision_sdk_arp32_3_release.xearp32F”. On ARP32_EVE_2, load the binary, “vision_sdk_arp32_2_release.xearp32F”. On ARP32_EVE_1, load the binary, “vision_sdk_arp32_1_release.xearp32F”. On C66xx_DSP2, load the binary, “vision_sdk_c66xdsp_2_release.xe66”. On C66xx_DSP1, load the binary, “vision_sdk_c66xdsp_1_release.xe66”. On Cortex_M4_IPU1_C0, load the binary, “vision_sdk_ipu1_0_release.xem4”. On Cortex_M4_IPU1_C1, load the binary, “vision_sdk_ipu1_1_release.xem4”. On CortexA15_0, load the binary, "vision_sdk_a15_0_debug.xa15fg”. But there is something worng. I can see main() on DSP,and do start or set break point.CCS‘s screenshot was shown below: I cant start or set break point on M4,the porgram start automaticly., there is console message: Cortex_M4_IPU1_C0: Can't Run Target CPU: (Error -1268 @ 0x1090001) Device is locked up in Hard Fault or in NMI. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.4.0.00006) I want to set break point on M4 ,and start it from main(),what should i do? + +Responses: +Hi, It appears that IPU1_0 M4 has crashed. If you loaded the binaries from your build, there might be something wrong with them. Maybe build configurations were not set correctly. I suggest you to try again with pre-built binary first and see if it works correctly. You can download the binary from SDK download page. Regards, Stanley + diff --git a/data2/text/range/0-5000/1054887.txt b/data2/text/range/0-5000/1054887.txt new file mode 100644 index 0000000000000000000000000000000000000000..95694b139f754c03a881c61025a820612b5863f8 --- /dev/null +++ b/data2/text/range/0-5000/1054887.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM-Q1: bootmode for auto select primary boot device + +Query Text: +Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: TDA2 Hi : The TDA2 have the BOOTMODE。for example ,The first device is SD ,the second is EMMC ,it is convenient to use . however .The tda4 , I need to change bootmode every time for different primary boot device .(SD /EMMC ) So does the tda4 have the same bootmode function as the tda2.? and how to set the bootmode + +Responses: +Hi, On TDA4 as well there is a way to select secondary and primary boot mode with a single set of dip switches. So if ROM code is not able to find a valid bootloader from Primary boot media, it will attempt to boot from secondary boot mode. Now that being said, the options for primary boot mode are limited and Section 4.3.2.2 Backup Boot Mode Selection When MCU Only = 0 of the TRM lists them. From the table above, eMMC as backup boot mode is not supported however MMC/SD is. Regards Karan + +thanks for your reply. so i understand i can not use a bootmode to achive my idea "the primary boot mode is MMC/SD, the second boot mode is EMMC " it must use a dip switches to change different bootmode . Regards kong + +Hi Kong, xiangxu kong said: so i understand i can not use a bootmode to achive my idea "the primary boot mode is MMC/SD, the second boot mode is EMMC " That is correct. The SoC doesn't support booting from a backup boot media of eMMC boot partition. Regards Karan + diff --git a/data2/text/range/0-5000/1056057.txt b/data2/text/range/0-5000/1056057.txt new file mode 100644 index 0000000000000000000000000000000000000000..1dcec3c999cec8dec929385584f338ce952c86b0 --- /dev/null +++ b/data2/text/range/0-5000/1056057.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-TDAX: when I debuged the app_tidl(vision_apps/apps/dl_demos/app_tidl), I have some questions + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 question1: In the file of vision_apps/utils/ipc/src/app_ipc_linux_rpmsg_char.c, I found that obj->ipc_notify_handler was a function pointer to the type of app_ipc_notify_handler_f.But,I don't know it pointer to which function when call obj->ipc_notify_handler(app_cpu_id, payload),the function show as below. typedef struct { app_ipc_init_prm_t prm; void *hw_spin_lock_addr; app_ipc_notify_handler_f ipc_notify_handler; int tx_fds[APP_IPC_CPU_MAX]; uint32_t local_endpt[APP_IPC_CPU_MAX]; rpmsg_char_dev_t *rcdev[APP_IPC_CPU_MAX]; pthread_t task; int unblockfd; } app_ipc_obj_t; static void appIpcRpmsgRxHandler(uint32_t app_cpu_id, uint32_t payload) { app_ipc_obj_t *obj = &g_app_ipc_obj; if(app_cpu_id %s (port %d) msg = 0x%08x\n", appIpcGetCpuName(app_cpu_id), appIpcGetCpuName(appIpcGetSelfCpuId()), (uint32_t)obj->local_endpt[app_cpu_id], payload); #endif if((payload & 0xFFFF0000) == 0xDEAD0000) { /* echo message dont send to handler */ printf("IPC: RX: %s -> %s (port %d) msg = 0x%08x\n", appIpcGetCpuName(app_cpu_id), appIpcGetCpuName(appIpcGetSelfCpuId()), (uint32_t)obj->prm.tiovx_rpmsg_port_id, payload); } else { if(obj->ipc_notify_handler) { obj->ipc_notify_handler(app_cpu_id, payload); } } } } then I found a suspectable call in the function (void tivxObjDescInit(void)),detail definition showed as below , I can't confirm that,because I added some printf information("======") ,but it didn't show in the terminal. void tivxObjDescInit(void)(tiovx/source/framework/vx_obj_desc.c) { printf("=====================================\n"); tivxPlatformGetObjDescTableInfo(&g_obj_desc_table); tivxIpcRegisterHandler(tivxObjDescIpcHandler); printf("=====================================\n"); } question2: I found that there are four definitions about the function tivxInit(void), in order to determine which tivxInit() function to be called , so I added some printf information(printf("from file : %s ; from function: %s\n", __FILE__, __FUNCTION__);) in every tivxInit() function, before called the tivxInit(void) ,I added printf("++++++++++++++++++++++++++\n"); But there are nothing about from file : %s ; from function: %s\n", __FILE__, __FUNCTION__ ,Only show the "+++++++++++++++++++++++++++" in the terminal. So don't kown why? + +Responses: +Hi, Although there are 4 tivxInit, they are used for different purpose/platform. The one defined in vision_sdk/linux (biod)/tivx_init.c was used on TDA2/3x devices, so you could ignore them. The one defined in pc/common/tivx_init.c is used in PC emulation mode. The one defined in psdk_j7/common/tivx_init.c is actually used on TDA4x.. For the first question, yes, this is where IPC handler is registers. The call flow is tivxIpcHandler -> g_ipc_handler. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1056834.txt b/data2/text/range/0-5000/1056834.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e5eec0d3b5c2d08e3d4cea7444359e7a08c5b8c --- /dev/null +++ b/data2/text/range/0-5000/1056834.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: automatically inserts VLAN tags when sending Ethernet packets + +Query Text: +Part Number: TDA2SX Hi TI experts, we use custom board with TDA2x and sending multicast packets, but we can't recieve it. After capturing packets through wireshark we discovered VLAN tags in packets header. We didn't enable VLAN Tagging at code or any configuration file. What's way to disable VLAN tags from Ethernet packets? Some additional information: 1) Device: TDA2x custom board 2) Operation system: TI RTOS 3) SDK version: PROCESSOR_SDK_RADAR_03_07_00_00 4) Ethernet interface: Configured at Eth0 + +Responses: +I just add a some new information. When we change destination IP from 239.168.1.50 to 192.168.1.100 VLAN Tagging is gone. I can't understand why is multicast IP add VLAN tag? + +Dmitry, there are similar report about the issue. we are investigating the driver. sorry for the extended delays. jian + +Jian, Thanks a lot! I will wait for feedback. + +Dmitry, I am putting a TI internal link here for internal reference. sorry you will not be able to see the ticket. I will close the ticket for now. If the issue is blocking your project, please reopen. Otherwise it will stay closed till the JIRA is resolved, then an update will be posted here. https://jira.itg.ti.com/browse/LCPD-28065 Jian + diff --git a/data2/text/range/0-5000/1060928.txt b/data2/text/range/0-5000/1060928.txt new file mode 100644 index 0000000000000000000000000000000000000000..a87f7c124343d7f94b8b5a6e00f2ebbc1444e5ec --- /dev/null +++ b/data2/text/range/0-5000/1060928.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: Binaries directory for running TIDL demo semantic segmentation + +Query Text: +Part Number: TDA2EVM5777 Hi Team, Good day! I am posting this in behalf of the customer. Could you please help. As described in the following video for TDA2x-EVM training.ti.com/tda2-evm-series-part-3-0 For illustration of TIDL demo using semantic segmentation, I am unable to find the binaries directory that contains DLNet.bin,DLPRM.bin, Indata, and In header files defined in it. Please share the link for the same, on an urgent basis. Thank you for your support. Best regards, Jonathan + +Responses: +Hi, Myself Nikunj. I only posted this query. Request the team to share the zip folder for all the files required to run TIDL demo as illustrated in TDA2x-EVM tutorial,using Semantic Segmentation on TDA2x-EVM board. + diff --git a/data2/text/range/0-5000/1061203.txt b/data2/text/range/0-5000/1061203.txt new file mode 100644 index 0000000000000000000000000000000000000000..89c5f989b6e8dc13289f0d97d72d83faf7f1b224 --- /dev/null +++ b/data2/text/range/0-5000/1061203.txt @@ -0,0 +1,10 @@ +Ticket Name: DRA726: 360 degree surround view support + +Query Text: +Part Number: DRA726 Other Parts Discussed in Thread: TDA2E, , TDA2, TDA4VM Hello all, I'm working on an automotive DRA726 based design and I have asked about the possibility of implementing 360º surround view in this processor. I know this is more related with TDA2e than with DRA726 as it is an ADAS function, but I would like to know if there is any HW or SW limitation that makes impossible/hard to implement this function in a DRA726. (IE: no SW native support, HW limitation...) Thank you very much for your time. + +Responses: +Hello, DRA72x has the same GPU as TDA2 and you should be able to support 3D Surround View. You can also consider newer TDA4VM with newer graphics engine. Regards Hemant + +Hello Hemant, I have discussed with the customer. Their application is a DRA72x infotainment one built onto the DRA7x Linux SDK 6.0.0.3. They want to add onto it a surround view application from our TDAx Vision SDK 3.8.0.0. Do you expect any compatibility issue there? These 2 SDKs have been released in December 2019 and seem to include the same versions of the software components, but maybe one needs more than just matching versions to use a Vision SDK example in the DRA7x SDK environment. Thank you. Best regards, François. + diff --git a/data2/text/range/0-5000/1063353.txt b/data2/text/range/0-5000/1063353.txt new file mode 100644 index 0000000000000000000000000000000000000000..bbdec73bbbef757e9440a4ce2b1519013cad8aab --- /dev/null +++ b/data2/text/range/0-5000/1063353.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA4VM: How to modify Encode to support 2560x1920 resolution video coding? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi TI, Is there any way to configure Encode to support the encoding of 2560x1920 resolution video? (We've implemented it on TDA2) According to the user guaid of Encode, the upper limit of the resolution supported by Encode is 2048x2048. Could you please give me some advice on how to expand this restriction? Thanks & Regards Damon + +Responses: +Hi Damon, which sdk release are you using? As far as i remember, the max resolution tested is 1080p (1920x1080).. Beyond this resolution, it is not validated.. Regards, Brijesh + +Hi Brijesh, My sdk is 07_03. I'm sorry I was wrong about the max resolution stated in user guaid。 It is indeed 1920x1080 However, according to the log error message and the settings in the code, it seems that the max resolution is 2048x2048(this may be the case of low frame rate?) But what I am most concerned about is whether we can make Encode support 2560x1920 through some special modification? Although it may be necessary to sacrifice a little frame rate. Regards, Damon + +Hi Damon, As i said, we have not really tested more than 1920 frame width. This may also changes in the OpenVX/Vision_apps to provide memory, in addition to encoder support.. Regards, Brijesh + +Hi, On latest SDK 07_ 03_ 00_ 07, it is tested for resolutions upto 1920x1080. There is an example standalone test-application inside SDK (ti-processor-sdk-rtos-j721e-evm-07_03_00_07/video_codec/examples/apps/encoder/app_encoder_test.c) You can refer to code with macro "TWO_SLICE_ENCODING". That might help you try encoder higher resolutions with multi slice enabled. You can try adapting those changes in your use case. Again, only the multi slice functionality was validated here and not the higher resolutions beyond 1920x1080. + +Hi, Can we close this if the answer has resolved the query? + diff --git a/data2/text/range/0-5000/1063809.txt b/data2/text/range/0-5000/1063809.txt new file mode 100644 index 0000000000000000000000000000000000000000..12ebb0f893e6ff72d1ec509c6d23293ee66fabad --- /dev/null +++ b/data2/text/range/0-5000/1063809.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Http server out of memory error + +Query Text: +Part Number: TDA2SX Hi TI experts, we use custom board with TDA2x and run http server. Errors occur when opening the web interface: [IPU1-0] 23.601994 s: ### XDC ASSERT - ERROR CALLBACK START ### [IPU1-0] 23.602055 s: [IPU1-0] 23.602238 s: out of memory: handle=0x86c72264, size=65544 [IPU1-0] 23.602330 s: [IPU1-0] 23.602360 s: ### XDC ASSERT - ERROR CALLBACK END ### + +Responses: +Problem was solved by increasing heapMemParams.size in Ipu1_0.cfg. + diff --git a/data2/text/range/0-5000/1064702.txt b/data2/text/range/0-5000/1064702.txt new file mode 100644 index 0000000000000000000000000000000000000000..593f919f4b22193183709a8921fcee06dc3587ec --- /dev/null +++ b/data2/text/range/0-5000/1064702.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: TDA2 for MDIO "Clause 45" PHY support + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi there We are working on the TDA2 platform and we want to use 10000BASET1 automotive ethernet. Currently the phy chip we are working with is Marvell 88Q2112 but it only supports configurations through the Clause 45 register set. We are trying to implement the Clause 22 Access to Clause 45 Registers indirect access read/write on top of your MDIO_USERACCESS0 register but unable to make it work. The data we read back with correct phy addr and correct sequences always with 0xffff. We are wondering if anyone make a MDIO Clause 45 PHY work on TDA2? Thanks, Li + +Responses: +Hi, MDIO Clause 45 is NOT supported on TDA2. Please refer to the TRM as shown below for the support MDIO frame format. Regards, Stanley + +Thanks..... but my colleagues made it work 2 months ago.... + diff --git a/data2/text/range/0-5000/1066818.txt b/data2/text/range/0-5000/1066818.txt new file mode 100644 index 0000000000000000000000000000000000000000..a724f1a50046da6fd0eb9650303b63b3f76ab2bf --- /dev/null +++ b/data2/text/range/0-5000/1066818.txt @@ -0,0 +1,10 @@ +Ticket Name: TMDSEVM572X: floating output after importing model + +Query Text: +Part Number: TMDSEVM572X Other Parts Discussed in Thread: AM5728, TDA2 SDK: 06_03_00_106 Hello, TI! I read Victor Cheng's answer in this thread https://e2e.ti.com/support/processors-group/processors/f/processors-forum/892591/tda4vm-tidl-how-can-i-get-out-q-values-scale-factors-of-layers-after-model-import/3300978?tisearch=e2e-sitesearch&keymatch=dataq#3300978. The answer said the floating output is (integer output) / (dataQ factor) / (2^quantized bit, like Q8 format, 256). Just want to make sure if this formula is also applicable to the TIDL library in the processor sdk for AM5728? Thanks! + +Responses: +Hi, yes, AM57x is a similar device as TDA2. So you can use Victor's answer for TDA2 Thank you, Paula + +Thank you very much Paula. + diff --git a/data2/text/range/0-5000/1072738.txt b/data2/text/range/0-5000/1072738.txt new file mode 100644 index 0000000000000000000000000000000000000000..18454a745dccb66933386ce79adbc4bee8e23128 --- /dev/null +++ b/data2/text/range/0-5000/1072738.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: Processors forum + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 This is actually a follow up question for E2E ticket - https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1000532/tda2exevm-communication-with-another-spi-slave/3736466 The above ticket was asked 7 months ago. We are now in integration and begin activating the SPI instance 0 to communicate with our slave device. We are hoping to have a small consultation time instead of asking questions thru E2E to minimize on the back and forth before a point is getting across. A half an hour call would do us a great deal and get us over the hurdle since our integration schedule is tight. Please respond to this ticket and let us know if our requested is granted. Thank you and looking forward to hearing from you. + +Responses: +Stanley Wrote in above e2e link in quote below: " If yes, radar SPI driver is implemented in ~/pdk_xx_xx_xx_xx/packages/ti/drv/vps/src/devices/radar_ar12xx/src/bspdrv_ar12xxMcspiCfgPriv.c. Only Utils_mcspiInit() is called from use case to add the McSPI instace to GIO device and configure crossbar for interrupt. The instance will be opened later by radar SPI driver in PDK. To configure radar, we use radar APIs from rl_sensor.c in ~/mmwave_dfp/ti/control/mmwavelink/src/rl_sensor.c, which has the callback hooked to radar SPI driver. " From what you said in quote above, the usecase application does not interact with the SPI driver directly (ie: it doesn't gain access to the commHdl of the SPI channel instance). Is there a way to gain access to the commHdl of a SPI instance so we can close its commHdl to free up channel resource for another SPI slave using the same SPI instance? Thank you. + +Hi, I am looping in TDA2 experts to answer the above query. Khai Trinh said: We are now in integration and begin activating the SPI instance 0 to communicate with our slave device. Meanwhile, can you please share the details on what issues are you facing? Regards, Parth + diff --git a/data2/text/range/0-5000/1078099.txt b/data2/text/range/0-5000/1078099.txt new file mode 100644 index 0000000000000000000000000000000000000000..27794e40204f34917f2cb5921bef837d50c8aa7a --- /dev/null +++ b/data2/text/range/0-5000/1078099.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ABZ: How to run neural networks on this board + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Hi, I developed a couple of neural network and I would like to run them on this board. At first I would like to run an example model with and without EVE support. I have downloaded and installed the SDK from here: https://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html But I cant any real guide on how to move forward. I understand I have to use TIDL (which to my understanding is deprecated now so maybe edge Ai?). Is there a step by guide to running models on the this platform? Thanks. + +Responses: +Hi, You can refer to user guide mentioned in the Docs folder for the build and run steps. Also, refer to these VSDK training videos to get more details on the sdk, I would recommend to go over these videos first to get overall idea before start building the SDK, https://training.ti.com/introduction-processor-sdk-vision Thanks, Praveen + +Can you please refer me to a guide to how I can convert my own models so that I will be able to run them on the TDA2 EVE? + +Hi Arik, Please refer to section "3.6 Running a Model trained by user" in the TIDL user guide (TIDeepLearningLibrary_UserGuide.pdf located in ti_dl\docs folder) for more details. Thanks, Praveen + diff --git a/data2/text/range/0-5000/1078426.txt b/data2/text/range/0-5000/1078426.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec20dc89fead45965da64ba2c93a950d6ae0830b --- /dev/null +++ b/data2/text/range/0-5000/1078426.txt @@ -0,0 +1,10 @@ +Ticket Name: CCSTUDIO: How to have the dip switch sys-boot configured for debug mode for TDA2? + +Query Text: +Part Number: CCSTUDIO Hi Expert, https://e2e.ti.com/support/processors-group/processors/f/processors-forum/701991/ccs-tda2-ccs-7-4-tda2x-evm-jtag-connection-issue Alex say: In addition to the above suggestion, make sure you have the dip switch sys-boot configured for debug mode. See e2e.ti.com/.../2557345 but the Page Not Found. Could you help me to make sure I have the dip switch sys-boot configured for debug mode? Thanks Daniel + +Responses: +Hi Expert, Could you help me to set the dip switch sys-boot configured for debug mod? Thanks Daniel + +It is documented in Vision SDK User guide. You can download Vision SDK package https://www.ti.com/tool/PROCESSOR-SDK-TDAX. Or, you can just download the document from the above link. + diff --git a/data2/text/range/0-5000/1078762.txt b/data2/text/range/0-5000/1078762.txt new file mode 100644 index 0000000000000000000000000000000000000000..79d4bd9e40eb81e9c8da8e039795b066ff960618 --- /dev/null +++ b/data2/text/range/0-5000/1078762.txt @@ -0,0 +1,10 @@ +Ticket Name: DRA76P: can ti RTOS support cache flush for a certain address for tda2/dra76x + +Query Text: +Part Number: DRA76P Other Parts Discussed in Thread: TDA2 customer have video processing issues on DRA762/TDA2, when use VPE to process video data, vide data in buffer will be cached, after using hardware accelerate feature，parts of data in the cache is not flushed to data buffer, question: 1. is there any API in PDK to flush data cache by manual, when there has new data update in cache, flush it to data buffer by manual 2. if vide data in data buffer is cached, VPE enable HW acceleration function, is it possible that data update in CACHE not flush to DDR? if yes, is there any method to avoid Thanks + +Responses: +this is customer issue, please help check it and give solution, thanks + +Hi Semon, VPE doesn’t have cache. Data is moved to DDR via VPDMA. TI-RTOS provide APIs for cache operations on M4 or C66x DSP. Regards, Stanley + diff --git a/data2/text/range/0-5000/1078894.txt b/data2/text/range/0-5000/1078894.txt new file mode 100644 index 0000000000000000000000000000000000000000..44c14774f7e9a581568df1e71f09a4bad7e955e9 --- /dev/null +++ b/data2/text/range/0-5000/1078894.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2SX: automatically inserts VLAN tags when sending Ethernet packets + +Query Text: +Part Number: TDA2SX Hi TI experts, I still have a problem with VLAN tags from related question. Have you any ideas? Best Regards, Dmitry + +Responses: diff --git a/data2/text/range/0-5000/1079861.txt b/data2/text/range/0-5000/1079861.txt new file mode 100644 index 0000000000000000000000000000000000000000..18f4132ca4ca18c8b4f443bca9c642f34f6687c8 --- /dev/null +++ b/data2/text/range/0-5000/1079861.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: TDA2PXEVM: TIDL Host hmulation build + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello According to the TIDL guide $ make CORE=eve TARGET_PLAT FORM=PC TARGET_BUILD=release was conducted on the $TIDL_INSTALL_PATH/ti_dl during work, but the following error phrase was found. g++: error: ../../ti_dl/lib/PC/eve/release/tidl_algo.lib: No such file or directory /home/slgpu2/Mywork/TI/tda2/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:599: recipe for target 'outfile' failed When I looked up the official answer related to this in the TI support forums, there were the following answers. Source release of TIDL is available as standalone release via CDDS. Please work with your local TI representative to get access to the same. "First you need to sign NDA document with your TI representative and then he will create the CDDS account." How can I get a PC-related tidl_algo.lib? + +Responses: +Hi, TIDL host emulation build libraries are not available publicly, so you need have a NDA with TI to get access to them, so please check with local TI FAE for more details. Thanks, Praveen + diff --git a/data2/text/range/0-5000/1080139.txt b/data2/text/range/0-5000/1080139.txt new file mode 100644 index 0000000000000000000000000000000000000000..81eca0a3c77fea9f8b8067d9cd39008c7e1f0087 --- /dev/null +++ b/data2/text/range/0-5000/1080139.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: TDA2 modify memory map + +Query Text: +Part Number: TDA2E Dear experts, As they DSP&EVE core not used, so our customer want modify TDA2E memory map to increase A15 DDR space, but it failed. could you please help solve this problem? they have proposed a ticket on E2E show as blew:TDA2E: 【TDA2XX】Remove DSP and EVE to increase A15 Linux memory space - Processors forum - Processors - TI E2E support forums + +Responses: +Please refer to below application note for memory map customization. ~/vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf + diff --git a/data2/text/range/0-5000/1080720.txt b/data2/text/range/0-5000/1080720.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2bfca8e9457eeb318a26a99a1bfaf6b6be70732 --- /dev/null +++ b/data2/text/range/0-5000/1080720.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: eMMC replacement + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Team, In customer SOP project uses TDA2SXBTQABCRQ1 Due to the current shortage of eMMC, customer would like to replace the eMMC model to: Samsung KLMBG4GEUF-B04Q Need to confirm with you, does TDA2 support this series of eMMC models? Is there a driver or something that needs to be matched? Is there a list of eMMCs supported by TDA2 that can be provided to customer? + +Responses: +Hi Ti Team, could you please help confirm the question? thanks. + +Hi, Any emmc part compliant with JEDEC 4.5 spec should work without any change. Regards, Vishal + diff --git a/data2/text/range/0-5000/1081052.txt b/data2/text/range/0-5000/1081052.txt new file mode 100644 index 0000000000000000000000000000000000000000..f46a0b357ce9149c0ff2dbcb6a0b59d3daa2d81a --- /dev/null +++ b/data2/text/range/0-5000/1081052.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: Does the configuration of DDR in the MLO file prevent entry to BOOT？ + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi team, Here's an issue from the customer may need your help: Log info of the TDA2S DEMO board: DRAM: 4 GiB. And the self-made reference board is only 2GB. The customer suspect this will cause the system to enter a dead loop after BOOT is up, and DDR on the DEMO board to EMIF1 also does not work. Is this possible? Modify the configuration of DDR in the TDA2 MLO file to be configured as one EMIF interface. How to modify the MLO? Source code: PROCESSOR-SDK-VISION_03.07.01.00 | TI.com Could you help check this case? Thanks. Best Regards, Cherry + +Responses: +Hi, May I know is there any update? Thanks, Cherry + +Hi Cherry, Is your customer booting Linux or RTOS on A15? If Linux, they have to modify SPL/u-boot to update the DDR config. If RTOS, they have to update DDR config in SBL. Please refer to EMIF config tool. https://www.ti.com/lit/pdf/sprac36 Regards, Stanley + diff --git a/data2/text/range/0-5000/1084107.txt b/data2/text/range/0-5000/1084107.txt new file mode 100644 index 0000000000000000000000000000000000000000..f16477c0490aae2dc56c685a7341335a4f65cd08 --- /dev/null +++ b/data2/text/range/0-5000/1084107.txt @@ -0,0 +1,25 @@ +Ticket Name: TDA2EXEVM: Enable Only 2AWRs on Cascade Board + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi E2e Support Team, We would like to use the TDA2 Cascade Board with 3.08 Radar SDK and enable only 2AWR to chirp and collect data in return. We understand this is more tricky to do than it looks. In an effort to try to understand a bit further how the SDK supports in Cascade board, I have the following questions: 1. If we only desire to enable 2AWRs out of 4 (ie: Master and Slave2), what needs to be done in AWR config Bsp_Ar12xxConfigObj? 2. Will there be changes required in configuring the 4 onboard FPGA (ie: in ChainsCommon_fpgaPowerUp() and ChainsCommon_fpgaStart())? 3. Currently when all 4AWRs are enable each with 4RX channels, there is a total of 16RX channel data feeding the 4EVEs for Range and Doppler FFT processing. If only 2 AWRs are enabled, there will essentially be only 8 RX channels going into the 4EVEs, how are the 8 channels divided amongst the 4EVEs? My guess is that only EVE1 and EVE2 will be actively processing the ADC data while EVE3 and EVE4 will be idled. 4. If only 2AWRs are enabled, will the links in a processing chain be required to be changed? Would it be smart enough to pick that up and automatically scale based on the number of available RX channels? Thank You, + +Responses: +We have provision to allow use case to define how many radars are used. /** + * \brief Structure which holds the AR12xx configuration parameters. + */ +typedef struct { + + UInt32 numRadars; + /**< Number of Radars being connected */ + ChainsCommon_RadarParams radarParams[CHAINS_MAX_NUM_RADARS]; + /**< Parameters per Radar */ + UInt32 frameType; + /**< 0 - Normal Frame, 1 - Advanced Frame */ + UInt32 fusionEnabled; + /**< Flag to show if Fusion is enabled or not */ + UInt32 enableTestSource; + /**< Flag to enable synthetic input from Radar */ +} ChainsCommon_Ar12xxConfigOut; However, we have only validated the full cascade radar processing chain with 4 radars configuration. + +Hi Stanley, I know there is such a data structure to tell the AWR how many Radars we would like to use. Would you please spend a few minutes understanding the 4 questions I outlined above and give some feedback to each. Thanks, --Khai + diff --git a/data2/text/range/0-5000/1085371.txt b/data2/text/range/0-5000/1085371.txt new file mode 100644 index 0000000000000000000000000000000000000000..a6ebf3cf63f869d88f9d55a51c7d2be9c7603fa7 --- /dev/null +++ b/data2/text/range/0-5000/1085371.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2E: What is maximum Image sensor resolution and frame rate + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi Sir, What is the maximum image sensor resolution and frame rate that TDA2E can receive, This project may use MIPI 2-lane or DVP interface, image data format is RAW data, Sensor frame rate is 30fps. Is TDA2X able to receive RAW data of image resolution 8M or higher? Thanks. Ranny. + +Responses: +Hi Ranny, TDA2 plus may support up to 1.5Gbps per lane, but ISP can only support image width up to 2816 pixels. Please refer to TDA2 TRM for more details. + +Hi Gang Hua, I got, thanks. Ranny. + diff --git a/data2/text/range/0-5000/1088946.txt b/data2/text/range/0-5000/1088946.txt new file mode 100644 index 0000000000000000000000000000000000000000..c8c437df87a402d09c375550cfee6715b7500e90 --- /dev/null +++ b/data2/text/range/0-5000/1088946.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2SA: ISO21434 Compliance with TDA2 family + +Query Text: +Part Number: TDA2SA Hi, could you share me the TDA2x documents about Security(SPRUHS7) and Cryptographic(SPRUHS8) addendums? we need to modify design to compliance with ISO21434, Thanks + +Responses: diff --git a/data2/text/range/0-5000/1089342.txt b/data2/text/range/0-5000/1089342.txt new file mode 100644 index 0000000000000000000000000000000000000000..f36d2eb5a5efe851564f279dd4cc975ef84b797f --- /dev/null +++ b/data2/text/range/0-5000/1089342.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2EG-17: VSDK V03.08 has year 2038 issue for HLOS + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 This thread is related follow thread (https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1071329/am3356-year-2038-problem-for-processor-linux-sdk-v7-03?tisearch=e2e-sitesearch&keymatch=rtc%202038#) Hello, We're using VSDK (v03.07/03.08) for TDA2/TDA2EG17, but the Linux kernel seems to have the same year's issue with the AM35xx SDK, Our product is a mirror with DVR feature, but the Linux date system only seems to support the past 2038 years date. Is there any patch from TI to fix this issue? Will the same problem happen with the next-gen SDK(TDA4)? + +Responses: diff --git a/data2/text/range/0-5000/1092379.txt b/data2/text/range/0-5000/1092379.txt new file mode 100644 index 0000000000000000000000000000000000000000..e6d3a5a74ad47d409df498963ebad8be8c724842 --- /dev/null +++ b/data2/text/range/0-5000/1092379.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM-Q1: TIDL/Host Emulation performance is poor, how to improve? + +Query Text: +Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: TDA2, TDA4VM Hi, We have similar issue with https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1092091/tda4vm-psdk-rtos-j721e-tidl-inference-host-emulation-execution-time We're using SDK 7.3 but I think it's a common issue no matter which SDK is using now. Now we're running multiple images at the same time on top of multi-core CPU to accelerate but it consumes a lot of computing resources. Please help to clarify whether there are other ways to speed up host emulation. Previously in TDA2, tidl provided a special nature C operation model. This mode provides better host emulation. Customer can also get the same results as on the board. Any similar approach on TDA4VM? Thank you. + +Responses: +Hi, James Austrial said: We have similar issue with https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1092091/tda4vm-psdk-rtos-j721e-tidl-inference-host-emulation-execution-time The solution is same as what is mentioned in the above thread. Regards, Anshu + diff --git a/data2/text/range/0-5000/1093599.txt b/data2/text/range/0-5000/1093599.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d2dc2d23b478addd9e42487e123f8de9940a033 --- /dev/null +++ b/data2/text/range/0-5000/1093599.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2XX : radar usecase.sample width=512,doppler point =512,2tx enable + +Query Text: +Other Parts Discussed in Thread: TDA2 (1)Hi expert: vision SDK 3.8,four awr1243 + TDA2 CHAINS_CASCADE_BF_RADAR_PROFILE1_RADAR_WIDTH ( 511U ) :.sample width CHAINS_CASCADE_BF_RADAR_RADAR_HEIGHT (512 U ) doppler point =512 2tx enable: TDM-MIMO EVE can work,but DSP core can't get linkipc data. could you help me with my problem? + +Responses: diff --git a/data2/text/range/0-5000/1095689.txt b/data2/text/range/0-5000/1095689.txt new file mode 100644 index 0000000000000000000000000000000000000000..47a52a95f9e67adede645117f6f3708d9c79cfef --- /dev/null +++ b/data2/text/range/0-5000/1095689.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA4VM: Is there a kernel that can mix two images? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi TI, I want to draw an icon on an image. I use DrawIcon link to achieve this on tda2 platform. So Is there an kernel like DrawIcon on tda4? Regards， Damon. + +Responses: +Additionnal: I mean using CPU to do pixel-blending not GPU + +Hi Damon, Do you mean to blend two images? I think there is no existing kernel, but you could use DSS, two input pipelines and overlay manager could be used to overlay/blend two images and send it out to the display. Regards, Brijesh + +Hi Brijesh, Thank you and yes, I want to blend two images.If so, I will try to add an userkernel to do this job.Using DSS may not be the right choice as it will take up two channels and can't send the output image to other node. Regards, Damon + +Thanks Damon, closing this ticket. + +Could you please take a look at my other question? https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1096110/tda4vm-how-can-i-add-a-new-kernel-running-on-r5f + +Sure, lets continue our discussion on the other ticket. + diff --git a/data2/text/range/0-5000/1096998.txt b/data2/text/range/0-5000/1096998.txt new file mode 100644 index 0000000000000000000000000000000000000000..75cfe9bc19fcae62815842bfe2743e8b0e3718ce --- /dev/null +++ b/data2/text/range/0-5000/1096998.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA4VM: Is there any solution for early boot? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Is there any solution for early boot? I'm checking up TDA4VM PSDKRA and PSDKLA. I want the same as early boot solution in VISION SDK of TDA2. The below functions are that I applied in TDA2. 1. Receive video from camera. 2. Make and display surround view. 3. Start H.264 encoding and store the encoded data in DRAM during booting. 4. Run QT after booting linux and display QT gui using DispDistSrc link. The functions 1, 2 and 3 are executed in 4 or 5 seconds. Of course, these are executed in IPU before booting linux. If there are solution, patch, or guide for above functions, let me know that. Best Regards, Yousik Kim. + +Responses: +Hi Yousik Kim, 1 and 2 should be possible in less than 4 to 5 seconds. Let me check and get back to you on this. Regards, Brijesh + +Hi Yousik Kim, 3 and 4 seems to be tough to achieve, since these features require Linux to be up.. Regards, Brijesh + +Hi Brijesh, Thank you for your reply. I understood about 3 and 4. I want to apply even 1 and 2. But currently in SDK, it is possible after booting linux. I think below contents are needed. 1. mcu2_0 must be OpenVX host and has to manage shared memory before booting linux. 2. OpenVX host must be changed from mcu2_0 to mpu and mpu has to manage shared memory after booting linux. Could you provide the guide to apply that? + +Hi, I think you dont really require to move OpenVX Host to R5F. If you use 1, SBL to boot Linux 2, use OSPI boot mode 3, use eMMC for filesystem storage. 4, Remove/disable unnecessary modules 5, Limit logging in Linux You should be able to achieve first frame to display in 4 seconds. I will let my colleague Keerthy J to provide more information on this. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1097878.txt b/data2/text/range/0-5000/1097878.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a29346e2fe15345db3ef3eb6fedff17d2b1d8be --- /dev/null +++ b/data2/text/range/0-5000/1097878.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2SX: is it suitable to port/migrate the application to TDA4VM? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, TDA4VM, SK-TDA4VM Hi, we are working with cascade imagine radar apps and use cases in the MMWCAS-DSP (TDA2) + MMWCAS-RF and I would like to know how difficult could be the migration from my solution to a TDA4VM (SK-TDA4VM), does exist any critical risk, compatibility or requirement (hardware, software, architecture, etc) that I should take into account? Thanks + +Responses: diff --git a/data2/text/range/0-5000/1100801.txt b/data2/text/range/0-5000/1100801.txt new file mode 100644 index 0000000000000000000000000000000000000000..d0d75809d4375f150fdb5e9cf2a3815d7a14ab79 --- /dev/null +++ b/data2/text/range/0-5000/1100801.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: L3 RAM issue + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi team, "Up to 2.5MB of on-chip L3 RAM" via TDA2 Datasheet", the customer would like to know where can they configure or check the "L3 RAM" part? Could you help check this case? Thanks. Best Regards, Cherry + +Responses: +Cherry, The TDA2 data manual Device Comparison table shows that all of the standard variants of TDA2 include 2.5 MB: The TRM Memory Map shows where those RAMs are located: Regards, Kyle + +Hi Kyle, Thanks for your help. Is there any specific example or a modified case for reference? Thanks and regards, Cherry + +The SDK will use this memory. Or, you can use CCS to view this memory directly. Regards, Kyle + diff --git a/data2/text/range/0-5000/1100976.txt b/data2/text/range/0-5000/1100976.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c9efd47c6b538e556ab8776c5879183b6e780eb --- /dev/null +++ b/data2/text/range/0-5000/1100976.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM: Is there response time data for TDA4? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2, Hi Expert, My customer concern the delay time very much, especially they experience long delay time of TDA2. Any delay time performance of TDA4 and AM62A that can show to my customer ? Thanks Daniel + +Responses: +Hello Daniel, Can you explain which delay time performance you are referencing? Is there a particular module such as memory (e.g. DDR) or perhaps CPU performance numbers? So we can find the right person to reply. Regards, Erick + +Hello Erick, i'm the customer Daniel mentioned, we used 2 camera to detect object, such as car, person, bike, our usecase was changed from tidl_od, each ssd model(0.64GMACS) run on 2 EVEs, we used tda2sxbu with plus mode, ddr was configured as DDR3-1066 ,2 EMIF(256M+256M+256M+256M) ， the fps of alg_tidl_dsp link was 24~25 the system average delay time we calculated was about 0.15s so when bike speed up to 10km/hr, the detection results rectangle will be behind the bike, now we want to know if we porting the whole usecase to tda4VM or AM62A, Will it still be the same situation? It means that the application of AI model detection, how much the basic delay time? BR, Jay + +TDA 2x supported less than 0.25 TOPS only, The TDA4VM supports 8 TOPS, so the latency would be much better in these devices compared to TDA2x + diff --git a/data2/text/range/0-5000/1101231.txt b/data2/text/range/0-5000/1101231.txt new file mode 100644 index 0000000000000000000000000000000000000000..64b645a771abfb956869697ae548e8d3ca7bd99c --- /dev/null +++ b/data2/text/range/0-5000/1101231.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: Searching TI solution + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, TVP5147 Hi Team There is good new that we could DIN our device! RD need CVBS Decoder for TDA2! Is there NTSC(VGA) Video Signal [CVBS+, CVBS-] to BT656(8Bits) [D0~D7, PCLK, Hsync, Vsync], and adopt the Video conversion IC that I2C issues the control command? (The input of TDA2 is the requirement of CVBS Decoder, the mode of CVBS to BT656 (8Bits).) + +Responses: +Hi, Yes, you could check TVP5147 device. It supports CVBS input for NTSC/PAL signals and can convert into 8bit BT656 signal, which can be received by TDA2x. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1101928.txt b/data2/text/range/0-5000/1101928.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3b4f7d959b6abd62bc7a830eb90cef7d62ee394 --- /dev/null +++ b/data2/text/range/0-5000/1101928.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: tda2 rtos i2c enable issue + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi team, Here's an issue from the customer may need your help: Regarding TDA2 M4 I2C, bsp_device.c / bsp_deviceI2c.c / bsp_boardTda2xx.c has been modified. The interrupt is in the system_bsp_init.c file according to the chip manual. The customer tries to enable 12C2 on rtos, and the problem is as follows: [HOST] [IPU1-0] 4.918440 s: [HOST] [IPU1-0] 4.918471 s: ### XDC ASSERT - ERROR CALLBACK START ### [HOST] [IPU1-0] 4.918562 s: [HOST] [IPU1-0] 4.918684 s: E_notFound: i2c2 name not found [HOST] [IPU1-0] 4.918745 s: [HOST] [IPU1-0] 4.918776 s: ### XDC ASSERT - ERROR CALLBACK END ### SDK: 03.08.00. PDK: pdk_01_10_04_05. Under the bsp_boardTda2xx.c file, modify as follows: static Bsp_BoardI2cData gBoardTda2xxI2cData = { /* numI2c */ (sizeof (gBoardTda2xxI2cInstData) / sizeof (Bsp_BoardI2cInstData)), /* i2cData */ gBoardTda2xxI2cInstData, /* probeInstId */ #if defined (SOC_TDA2PX) BSP_DEVICE_I2C_INST_ID_4, #else BSP_DEVICE_I2C_INST_ID_2, #endif }; Changing BSP_DEVICE_I2C_INST_ID_1 into BSP_DEVICE_I2C_INST_ID_2 Interrupt configuration: system_bsp_init.c is modified as follows： * XBAR I2C5_IRQ to IPU1_42 - I2C5_IRQ (55 or 0x37) */ BspOsal_irqXbarConnect(XBAR_INST_IPU1_IRQ_41, 51); BspOsal_irqXbarConnect(XBAR_INST_IPU1_IRQ_42, 52); BspOsal_irqXbarConnect(XBAR_INST_IPU1_IRQ_42, 55); #endif /* XBAR I2C4_IRQ (57) to IPU1_48 */ Added BspOsal_irqXbarConnect(XBAR_INST_IPU1_IRQ_42, 52); Could you help check this case? Thanks. Best Regards, Cherry + +Responses: +Hi, May I know is there any update? Thanks and regards, Cherry + diff --git a/data2/text/range/0-5000/1102674.txt b/data2/text/range/0-5000/1102674.txt new file mode 100644 index 0000000000000000000000000000000000000000..e47525ba7fbda8401b134f9d79bc3c8411fa26eb --- /dev/null +++ b/data2/text/range/0-5000/1102674.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: Vision apps license terms + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear TI user, I have some questions about the license terms of TI License: https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/08_02_00_05/exports/docs/psdk_rtos/PROCESSOR_SDK_RTOS_J721E_manifest.html * any redistribution and use of the source code, including any resulting derivative works, are licensed by TI for use only with TI Devices. * any redistribution and use of any object code compiled from the source code and any resulting derivative works, are licensed by TI for use only with TI Devices. What is a TI Device mean ? For my case, my customer want to design theirs hardware by their own, if only using TDA4VM Jacinto Processors and DS90UB960, DS90UB953 from TI. Their designed hardware, is it TI device ? If so , they want to modify and commercial distributors the TI's Vision Applications and TI's Imaging projects (the projects at the link below) , is that permitted ? If that is permitted, so they just need to keep the existing copyright notices, is it correct ? Thanks. https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/vision_apps/docs/user_guide/index.html https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/imaging/docs/user_guide/index.html + +Responses: +Phan Chinh said: What is a TI Device mean ? TI Device is any SoC/device that is made by Texas Instruments such as TDA2/3/4 and its variants. Phan Chinh said: TDA4VM Jacinto Processors and DS90UB960, DS90UB953 from TI. Their designed hardware, is it TI device ? Yes, these are TI devices. Phan Chinh said: If so , they want to modify and commercial distributors the TI's Vision Applications and TI's Imaging projects (the projects at the link below) , is that permitted ? If that is permitted, so they just need to keep the existing copyright notices, is it correct ? Yes, it is permitted and you retain existing notices as applicable. Regards Karthik + diff --git a/data2/text/range/0-5000/1104638.txt b/data2/text/range/0-5000/1104638.txt new file mode 100644 index 0000000000000000000000000000000000000000..027113075330c39a195c344e23b1a89a215b572e --- /dev/null +++ b/data2/text/range/0-5000/1104638.txt @@ -0,0 +1,66 @@ +Ticket Name: TDA2SX: nptrs = backtrace(buffer, BT_BUF_SIZE); returned nptrs is 0; + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 HI. backtrace returns 0, which is the same source code. I work in tda4 Linux x86 linux. Can return stack calls. tda2 Linux backtrace returns 0 tad2x linux : compile: gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -rdynamic call_stack.c -o progtda2 run: ./ progtda2 3 backtrace() returned 0 addresses tad4x: gcc-arm-9.2-2019.12-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-gcc -rdynamic call_stack.c -o prog run: root@j7-evm:~# ./prog 3 backtrace() returned 8 addresses ./prog(myfunc3+0x18) [0x400c04] ./prog() [0x400ca8] ./prog(myfunc+0x2c) [0x400ce0] ./prog(myfunc+0x24) [0x400cd8] ./prog(myfunc+0x24) [0x400cd8] ./prog(main+0x60) [0x400d4c] /lib/libc.so.6(__libc_start_main+0xe4) [0xffff9b890fac] ./prog() [0x400b2c] root@j7-evm:~# ./prog 3 backtrace() returned 8 addresses ./prog(myfunc3+0x18) [0x400c04] ./prog() [0x400ca8] ./prog(myfunc+0x2c) [0x400ce0] ./prog(myfunc+0x24) [0x400cd8] ./prog(myfunc+0x24) [0x400cd8] ./prog(main+0x60) [0x400d4c] /lib/libc.so.6(__libc_start_main+0xe4) [0xffffb6510fac] ./prog() [0x400b2c] Why does tda2 Linux run without stack call information? call_stack.c #include +#include +#include +#include + +#define BT_BUF_SIZE 100 + +void +myfunc3(void) +{ + int j, nptrs; + void *buffer[BT_BUF_SIZE]; + char **strings; + + nptrs = backtrace(buffer, BT_BUF_SIZE); + printf("backtrace() returned %d addresses\n", nptrs); + + /* The call backtrace_symbols_fd(buffer, nptrs, STDOUT_FILENO) + would produce similar output to the following: */ + + strings = backtrace_symbols(buffer, nptrs); + if (strings == NULL) { + perror("backtrace_symbols"); + exit(EXIT_FAILURE); + } + + for (j = 0; j < nptrs; j++) + printf("%s\n", strings[j]); + free(strings); +} + +static void /* "static" means don't export the symbol... */ +myfunc2(void) +{ + myfunc3(); +} + +void +myfunc(int ncalls) +{ + if (ncalls > 1) + myfunc(ncalls - 1); + else + myfunc2(); +} + +int +main(int argc, char *argv[]) +{ + if (argc != 2) { + fprintf(stderr, "%s num-calls\n", argv[0]); + exit(EXIT_FAILURE); + } + + myfunc(atoi(argv[1])); + exit(EXIT_SUCCESS); +} + +Responses: +Hello, This is probably generic for arm32 and not specific to TDA2. Can you check if this works: gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ -g -rdynamic -funwind-tables -g call_stack.c -o prog Regards Hemant + +Hello Hemant Thank you for your reply. The problem has been solved. Regards gj + diff --git a/data2/text/range/0-5000/1106138.txt b/data2/text/range/0-5000/1106138.txt new file mode 100644 index 0000000000000000000000000000000000000000..a6166f87ed88d9b15504e30c308b93f251a278bf --- /dev/null +++ b/data2/text/range/0-5000/1106138.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HF: tda2 Resetn and PORz + +Query Text: +Part Number: TDA2HF Other Parts Discussed in Thread: TDA2 Hello team, Acoording to the TDA2 Data manual，RESETn and PORz should be deasserted simultaneously during power-up. If no, what will be affected.The system will run unstable or not. I have a case,RESETn and PORz released not simultaneously.Will this be a problem. + +Responses: +Hello, It should not be a problem. Regards, Kyle + diff --git a/data2/text/range/0-5000/1107013.txt b/data2/text/range/0-5000/1107013.txt new file mode 100644 index 0000000000000000000000000000000000000000..58b6418b0ab9eb214bcb1a9795ae21daa1e25228 --- /dev/null +++ b/data2/text/range/0-5000/1107013.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA4VM: Is there any node in TIOVX execute the function as Null link in TDA2 VSDK? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi team, Is there any node in TIOVX execute the function as Null link in TDA2 VSDK? which could be used do something in A72? In TDA2 VSDK, there is Null link which could do some process at A15 core and by callback function when receiving the images from other link while there isn't any node could do the similar thing on TIOVX, so it's difficult to process the image from camera in A72. The customer would like to know how to create new node to process image such as Null link in VSDK? Or is there any other nodes in TIOVX could do the similar thing on TIOVX? Best Regards, Cherry + +Responses: +Hi, May I know is there any update? Thanks and regards, Cherry + +Hi Cherry, Cherry Zhou said: Is there any node in TIOVX execute the function as Null link in TDA2 VSDK? which could be used do something in A72? No there is no null node in TIOVX. Cherry Zhou said: In TDA2 VSDK, there is Null link which could do some process at A15 core and by callback function when receiving the images from other link while there isn't any node could do the similar thing on TIOVX, so it's difficult to process the image from camera in A72. Do you mean null-sink link? i dont recollect if null-sink was doing any processing.. It can just receive input some other link and return the input as it is back.. There is not any node like this in TIOVX, but you could have output of node unconnected or can declare it as graph parameter and can get this output in the application. The above graph could be realized by opening capture node two times, one for 4 channels and second for 1 channel. 4-channels can be for encode and mosaic and fifth channel for the dms path. Regards, Brijesh + +Hello Brijesh Nice to communicate with you. I'm the one post the question. and now this issue is fixed and closed by using a select node which created by PyTIOVX tools. But I'm not sure this is the best solution for this certain question. on the other side, it seems interesting to solve this question by opening capture node twice. could you kindly give the example code ? I wanna know how to implement this. Thanks and best rgds! have a good weekend. + +Hi henry o, There is only one example in sdk, where multiple instance of the capture node are created. You could find this example in the file ti-processor-sdk-rtos-j721e-evm-08_02_00_05\tiovx\kernels_j7\hwa\test\test_csitx_csirx.c. This essentially is CSITX -> CSIRX example, where separate node instance is created for each input channel.. henry o said: I'm the one post the question. and now this issue is fixed and closed by using a select node which created by PyTIOVX tools. But I'm not sure this is the best solution for this certain question. That's interesting. Could you please help me understand what this select node is? If possible, can you share this node, so that it would be helpful? Regards, Brijesh + +Hello Brijesh, Thanks for your kindly help and response. For select node, the input is object array contrains image frames which comes from capture node or something else, the output the another object array consists of images. e.g. there are 5 camera, channel [0,1,2,3,4], every one produce image frames at certain rate. and the first four should send their output into encode node and the fifth one should send to process the image. then we could create two select node, both of them take the 5 cameras' output as input, and the first select node choose the first four channel frames and copy the frame to output object array. the second select node choose the fifth channel frame and copy it to output object array. this select node works as the select link in vision sdk (or processor sdk in tda2x). wish it's helpful. best rgds. + +Hello henry o, Thanks for the explanation. Just one more question, how do you copy images from input to output object arrays? Are just copying buffer pointer or images using DMA? Regards, Brijesh + +Hello Brijesh, since it's a little difficult to use DMA copying the image buffer data, the memcpy is used here to copy the image. furthermore, I take account of copying buffer pointer, but it seems that it will bring the coupling issue, e.g. the pipeline could be blocked or slow down when some node processes the buffer pointer slower than expected. so, at last, the memcpy is chosen. Regards, Henry + +ok understood, thanks. Please close this ticket if your question is answered. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1108985.txt b/data2/text/range/0-5000/1108985.txt new file mode 100644 index 0000000000000000000000000000000000000000..2081a8ef6d87a4a5ce89cc744ad8280d072c5a5f --- /dev/null +++ b/data2/text/range/0-5000/1108985.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EXEVM: the detection result of PC and tda2 is different + +Query Text: +Part Number: TDA2EXEVM Hi, Team. I trained a SSD Caffemodel to detect the targets on the road. The test results on the PC are basically normal, as shown in Figure 1. However, when the model is converted with TDA2XX and then tested, the results are abnormal, as shown in Figure 2. In Figure 2, the red box is the ground truth, and the green box is the detection result. The result box of the class obstacle at the top right is very wide. Could you please help me with this problem? Thanks. + +Responses: +Did you trine the model using, Caffe-jacinto? If not please train the model using the caffe-jacinto quantization aware training to get better accuracy on target. Would it be possible for you to share details on your Project and requirements? Wanted to make sure, your target application can be supported on TDA2x/3x, or will it be better to try TDA4x devices If it helps, can you consider trying your model with our TDA4x/AM2x-based tools available here https://github.com/TexasInstruments/edgeai-tidl-tools https://www.ti.com/tool/SK-TDA4VM https://www.ti.com/tool/SK-AM62 + diff --git a/data2/text/range/0-5000/1109883.txt b/data2/text/range/0-5000/1109883.txt new file mode 100644 index 0000000000000000000000000000000000000000..5cb47d651d81493053ed3ee220b4eba9a76a8d3d --- /dev/null +++ b/data2/text/range/0-5000/1109883.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM: How to display chinese charactors on the screen with the Draw2D String function. + +Query Text: +Part Number: TDA4VM HI ti: We are working on the TDA4 EVM. Now we need to display chinese charactors on our screen. I found that , there are several ASCII charactors fonts. Is there any tools to generate the *_font.c file ? Please help us. Tks a lot ! + +Responses: +Hi Wang, There is not any utility to convert font. Font files just contains RGB565 value of the font.. You could search on below link to understand how to convert them. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/811499/rtos-tda2-string-font-setting https://e2e.ti.com/support/processors-group/processors/f/processors-forum/770547/tda3xevm-font-property Regards, Brijesh + +Hi Brijesh, I have realized this function. Steps as below: 1、Use spacial tool to generate the chinese font 2、Compare the string to the font 3、Follow the font instructionst to draw the pixel. And if anyone want to get the c source file .Please click here. https://gitee.com/tda4/ti-tda4/tree/feature/ Also the chinese blog link is as below： blog.csdn.net/.../125503932 Good luck and best wishes ! + +In the upper left corner. 雨 means : rain 雾 means : fog + diff --git a/data2/text/range/0-5000/1111594.txt b/data2/text/range/0-5000/1111594.txt new file mode 100644 index 0000000000000000000000000000000000000000..3aa355aef3b109a0c91b6bc20403dae25319aa4f --- /dev/null +++ b/data2/text/range/0-5000/1111594.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: How to implement gateway configuration support + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi team, Here's an issue from the customer may need your help: GateWay IP configuration in TDA2x is required to implemented and the customer has tried the the following modifications: /* * Add the default gateway. Since it is the default, the * destination address and mask are both zero (we go ahead * and show the assignment for clarity). */ bzero(&RT, sizeof(RT)); RT.IPDestAddr = 0; RT.IPDestMask = 0; RT.IPGateAddr = inet_addr(GatewayIP); CfgAddEntry(hCfg, CFGTAG_ROUTE, 0, 0, sizeof(CI_ROUTE), (UINT8 *)&RT, 0) Does modifying the GateWayIP values above correctly modify the GateWay IP? Thanks and regards, Cherry + +Responses: +Cherry, Unfortunately this post does not have any information of the SDK being used or the component that is being modfied. We cannot answer this question until more information is provided. Regards Karthik + +Hi Karthik, Thanks for your support. NDK version in NetWorking:ndk_2_24_02_31 NSP version: nsp_gmacsw_4_16_01_01 The GateWay IP is modified in the stackInitHookDynEth1() function in NDK_nsp_hook.C. And the issue is how is the GateWay IP configured in TDA2? Please let me know if you need any further information. Thanks and regards, Cherry + +Hi, May I know is there any update? Thanks and regards, Cherry + diff --git a/data2/text/range/0-5000/1111603.txt b/data2/text/range/0-5000/1111603.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d0dfb6e7b7a156096d563272b01ae37fad690ce --- /dev/null +++ b/data2/text/range/0-5000/1111603.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: How to implement IPv6 functionality in TDA2 before sending message data over UDP? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi team, Here's an issue from the customer may need your help: The IPv6 address protocol is used in TDA2 to send UDP message data. By creating a SOCKet, but failed, the code is as follows: static char src[] = "fd11::100"; static char dst[] = "fd11::200"; void main_Tx() { int udp6_socket, ret, ttl, on, addr_len; struct sockaddr_in6 saddr; struct sockaddr_in6 daddr; char buffer[] = "Hello World6"; Vps_printf(" DanS-----Network: start IPv6 interface main\n"); if ((inet_pton(AF_INET6, (char *)&src[0], &saddr.sin6_addr)) != 1) { Vps_printf("invalid ipv6 addr \r\n"); return ; } if ((inet_pton(AF_INET6, (char *)&dst[0], &daddr.sin6_addr)) != 1) { Vps_printf("invalid ipv6 addr \r\n"); return ; } addr_len = sizeof(struct sockaddr_in6); saddr.sin6_family = AF_INET6; saddr.sin6_port = htons(30000); daddr.sin6_family = AF_INET6; daddr.sin6_port = htons(40000); udp6_socket = socket(AF_INET6, SOCK_DGRAM, IPPROTO_UDP); if (udp6_socket == -1) { Vps_printf("create udp6_socket fail\r\n");//the codes are run and printed here Vps_printf("failed socket create (%d)\n",fdError()); return; } if (bind(udp6_socket, (struct sockaddr *)&saddr, addr_len)) { Vps_printf("udp6 bind addr fail, err : %d\r\n", 0); if( udp6_socket != (-1) ) fdClose( udp6_socket ); Vps_printf("\n== End Timeout Test ==\n\n"); //close(udp6_socket); return; } /* transmit */ ret = sendto(udp6_socket, &buffer[0], sizeof(buffer), 0, (struct sockaddr *)&daddr, addr_len); if (ret > 0) { Vps_printf("udp6 send %d bytes success \r\n", ret); } fdClose( udp6_socket ); //close(udp6_socket); return; } The error is reported in yellow section. a. The NDK_enable_IPv6 switch for the corresponding usecase has been turned on in TDA2. b. What else needs to be modified for IPv6 to function properly? Could you help give an example? Could you help check this case? Thanks. Best Regards, Cherry + +Responses: +Hi, Quick update: NDK version in NetWorking: ndk_2_24_02_31/NSP version: nsp_gmacsw_4_16_01_01. And may I know is there any update? Thanks and regards, Cherry + diff --git a/data2/text/range/0-5000/1112267.txt b/data2/text/range/0-5000/1112267.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0a492e4b48528f89c91d00ffbb67fd75a928966 --- /dev/null +++ b/data2/text/range/0-5000/1112267.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2SX: Running image radar on TDA2, what's the best performance we can get? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi experts, This seems to be an obvious question that should have been frequently asked.... but I couldn't find any concrete answer in the forum. Does TI or anybody know what's the best radar-performance we can get out of TDA2sx running 4-chip cascade radar? TI has the great image radar reference design with 4-AWR2243s and TDA2sx, the reference code is good enough to get us started but left a lot to be desired. We are now able to run relatively smooth 10fps point-cloud MIMO with 256-range-bins, 64-velocity bins and 256 azimuth bins on TDA2sx, and we are trying to stretch the performance. Even though TI has a spreadsheet (ProcessorSDKRadar_SystemPlanner) that helps calculate the TDA2 resources based on radar parameters, we found it somewhat over-simplifying the calculation? We just wonder if anyone knows first hand what the TDA2 is capable of as the image radar center processor, or what's the most performance, in terms of radar specs, that the TDA2 could achieve. Thanks! Li + +Responses: diff --git a/data2/text/range/0-5000/1113655.txt b/data2/text/range/0-5000/1113655.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e6ad7619e449aa772c96092fb338412020e8918 --- /dev/null +++ b/data2/text/range/0-5000/1113655.txt @@ -0,0 +1,8 @@ +Ticket Name: AM625: Comparison of gpu performance between AM625 and tda2 + +Query Text: +Part Number: AM625 Other Parts Discussed in Thread: TDA2, Hi Expert, Is there a gpu performance comparison between AM625 and tda2? Thanks Daniel + +Responses: +Hi Daniel, Here are the GPU specs of AM625: https://dev.ti.com/tirex/explore/node?node=AElcVr5KOuYgL.MzoxnzDw__XaWts8R__LATEST. I believe tda2 has SGX544 and it has more GFLOPS/Pixel fillrate compared to AM625 but it cannot support OpenGLES3.1 and Vulkan. Regards, Krunal + diff --git a/data2/text/range/0-5000/1114742.txt b/data2/text/range/0-5000/1114742.txt new file mode 100644 index 0000000000000000000000000000000000000000..99b09b509ff354a9dde1dcc0530e4b5ccd677b70 --- /dev/null +++ b/data2/text/range/0-5000/1114742.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Spec for TDA2 gpu? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Expert, Is there spec for TDA2 GPU? How many GFLOPS? Thanks Daniel + +Responses: +Hi Daniel, The GPU used in TDA2 is a dual core SGX544 GPU, and at 532 MHz, it performs at 34 GFLOPS. Regards, Takuma + diff --git a/data2/text/range/0-5000/1114899.txt b/data2/text/range/0-5000/1114899.txt new file mode 100644 index 0000000000000000000000000000000000000000..3ef1e028080064746f82c8c696e4aba2263bc927 --- /dev/null +++ b/data2/text/range/0-5000/1114899.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2 TIDL Quantization + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, Expert, For TDA2 TIDL, Can you pls help to share the quantization ? do we support both of per layer or per channel ? How to change that ? Thanks Regards, Fredy Zhang + +Responses: +in TDA we support only Per Layer quantization. We do not support per-channel quantization. Only 8-bits are supported for features, 8 -12 bits are supported for weight/Parameter quantizations. Users can set the same in import config files + diff --git a/data2/text/range/0-5000/1119944.txt b/data2/text/range/0-5000/1119944.txt new file mode 100644 index 0000000000000000000000000000000000000000..4b1db08d31bf56ecee1f4dabb9adacdffaeb4fc7 --- /dev/null +++ b/data2/text/range/0-5000/1119944.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2EVM5777: No rule to make target + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi Team, A customer is building the vision SDK for the TDA2 EVM but is having errors below: D:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\build>gmake -s -j gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_avb_rx] Error 2 gmake[4]: *** Waiting for unfinished jobs.... gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_avb_tx] Error 2 gmake[4]: *** [links_common_algorithm] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_dup] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_gate] Error 2 gmake[4]: *** [links_common_ipcIn] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_ipcOut] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_merge] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_network_rx] Error 2 gmake[4]: *** [links_common_nullSrc] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_null] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_tfdtp_rx] Error 2 gmake[4]: *** [links_common_network_tx] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_sync] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_display] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_select] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_vip_capture] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_vpe] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_dssM2mWb] Error 2 gmake[4]: *** [links_ipu_display_ctrl] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_system] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_a15_system] Error 2 gmake[4]: *** [links_dsp_system] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_eve_system] Error 2 gmake[4]: *** [links_common_system] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_ipu_iva] Error 2 gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [utils_common] Error 2 gmake[3]: *** [libs] Error 2 gmake[2]: *** [links_fw_libs] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 I am hoping you can help. Regards, Marvin + +Responses: diff --git a/data2/text/range/0-5000/1121423.txt b/data2/text/range/0-5000/1121423.txt new file mode 100644 index 0000000000000000000000000000000000000000..b1c33c80a185022f05fc336162037496f2d0dd29 --- /dev/null +++ b/data2/text/range/0-5000/1121423.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA4VM: Is there any way to control the switch of a stream in the graph? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi TI: I integrated multiple streams in one graph: PSD/OD/SRV/DVR..Now I want to control the on/off state of one of the streams, just like the Gate link in J6（TDA2） platform. Is there a kernel like Gate link in the J7 platform? Or is there any way to achieve this? Regards, Damon + +Responses: +Hi TI: Supplementary Instructions: I want to dynamically control the switch of a certain stream during the running process of the app. For example： After app started: at time_1, I want run 'SemSeg' stream only; Time_2,,I want run 'PSD' stream only; Time_2,,I want run 'PSD' and 'VD' stream; + +Hi Damon, No, unfortunately, there is no gate link like feature available in the OpenVX framework. You would have to add it in the framework or at the node level.. Like add a control command in the node, when you want to stop processing and then in process function, just skip processing. Again resume it again on second control command.. Regards, Brijesh + +Hi Brijesh, Yep.I tried this and found that: if I just send stop cmd to pre_proc node, it dis stop. But it's downstream nodes will still execute processing instead of blocking. Form this it seems that I need to add and send stop cmd to every node in this stream(pre-proc/tidl/post-proc), right? Regards, Damon + +Hi Damon, Yes, require to add this command to all downstream modules, and whenever you want to change processing, you probably need to start from the last node in that path.. Regards, Brijesh + +Hi Brijesh, Thank you! And I wander will TI consider providing a convenient solution for this requirement in subsequent releases? Regards, Damon + diff --git a/data2/text/range/0-5000/1163144.txt b/data2/text/range/0-5000/1163144.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a46da17c7d8df20d83bdf3f7e26d59fd47e1ebe --- /dev/null +++ b/data2/text/range/0-5000/1163144.txt @@ -0,0 +1,6 @@ +Ticket Name: TDA2E: Error: Module ti.sysbios.knl.Task does not exist in the application's configuration - ROV + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi, I am trying to debug an application in our custom board wich uses a TDA2, I use CCS only for debug, my source code is build using our tools, these are the steps I perform: debugger = Blackhawk XDS560 v2 System Trace 1.- I create a new target configuration choosing the debugger and platform, then launch that configuration 2.-I load the symbols (vision_sdk_ipu1_0_release.xem4) only for 1 core, IPU 1_0 in this case, then I connect the target the target is running 3.- then I open ROV but I get this error how could I solve this?, thanks + +Responses: diff --git a/data2/text/range/0-5000/1167794.txt b/data2/text/range/0-5000/1167794.txt new file mode 100644 index 0000000000000000000000000000000000000000..20f3613961e7d8e4a1aefdfb9265445e1376682f --- /dev/null +++ b/data2/text/range/0-5000/1167794.txt @@ -0,0 +1,16 @@ +Ticket Name: TI-RTOS-PROC: Event module - what does "Only a single Task can pend on an Event object at a time." means? + +Query Text: +Part Number: TI-RTOS-PROC Other Parts Discussed in Thread: TDA2, SYSBIOS Hi, does this means that two tasks can´t wait for the same event? Thanks + +Responses: +Hi Jairo, Can you please share more details like which device and which SDK you are using? Regards, Parth + +Hi, a TDA2 and Processor SDK-Vision + +It is design by contract. Please refer to SYSBIOS API reference guide available under docs/ folder in SYSBIOS. + +"Unlike semaphores, Only a single Task can pend on an Event object", could you explain this please? + +The API is designed that way. If that doesn't fit your need, please use some other method. In our experience, Semaphore should serve most of the use cases and is more widely used. + diff --git a/data2/text/range/0-5000/1167811.txt b/data2/text/range/0-5000/1167811.txt new file mode 100644 index 0000000000000000000000000000000000000000..7cf77de19cb27e5be4c3a23a0e3a07c8e83f4aff --- /dev/null +++ b/data2/text/range/0-5000/1167811.txt @@ -0,0 +1,12 @@ +Ticket Name: TI-RTOS-PROC: Can I use the synchronization modules from the differents cores of a SMP application? + +Query Text: +Part Number: TI-RTOS-PROC Other Parts Discussed in Thread: SYSBIOS, TDA2 Hi, lets suppose we have TI RTOS running an A53 with 4 cores, the synchronization modules you provide have effect over all the cores, for example, a mutex used in the task 1 running in the core 1 could block the task 2 running in the core 2? the doubt is because of this: "Mailboxes can be used to pass buffers from one task to another on the same processor." only in the mailboxes you said this, the other modules does not mention this, and I don´t know what do you understand for processor, for example, in a cluster of an A53 of 4 cores someone could say that we have 4 processors A53_0, A53_1, etc, do you call processor to the cluster of cores or to each core? + +Responses: +Hi Jairo, What SDK are you using and what SoC are you talking about? The references you used are from SYS/BIOS or TI-RTOS. The ti.sysbios.knl.Mailbox primarily provides a queueing functionality of messages with capabilities to wake-up another thread. The context obviously is all within the same RTOS. So, if you are running different TI RTOS instances on each of the above 4 cores, then this really can't be used. If you are running a single SMP-version of the RTOS, you can use the above. In anycase, we no longer support the TI-RTOS or any other RTOS on A72 cores in the SDKs (8.x for sure, 7.3 SDK may have limited support). regards Suman + +Hi, a TDA2 and Processor SDK-Vision + +Please refer to below link regarding SMP support in TI-RTOS. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/946557/faq-where-can-i-find-details-on-smp-with-sys-bios + diff --git a/data2/text/range/0-5000/1168150.txt b/data2/text/range/0-5000/1168150.txt new file mode 100644 index 0000000000000000000000000000000000000000..89d5ddc4da03fc769516c230a50bde67ee6c32cd --- /dev/null +++ b/data2/text/range/0-5000/1168150.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ACD: [valeo BYD project] camera image is not properly received + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 hi, TI experts: I use TDA2PX soc, the video pipeline is camera->933->962->soc. we have two kind of camera, both have ISP in image sensor and the output format is YUYV(8bit), the difference is one resoluton is 1280*960, and another is 1100*880. when we use 1280*960 camera, we can get proper image, and our config is below: PCapIssCalcfg->inFmt[StreamId].width = VIDEO_IP_RAW_CAPTURE_WIDTH*2; PCapIssCalcfg->inFmt[StreamId].height = AR_CAMERA_ACTIVE_VIDEO_IP_RAW_CAPTURE_HEIGHT; PCapIssCalcfg->inFmt[StreamId].pitch[0] = VIDEO_IP_RAW_CAPTURE_WIDTH*2; PCapIssCalcfg->inFmt[StreamId].dataFormat = 0x0U; PCapIssCalcfg->csi2DataFormat[StreamId] = VPS_ISS_CAL_CSI2_YUV422_8B; PCapIssCalcfg->inFmt[StreamId].bpp = FVID2_BPP_BITS16; /* Input stream from which camera channel */ PCapIssCalcfg->csi2VirtualChanNo[StreamId] = StreamId; PCapIssCalcfg->streamType[StreamId] = VPS_ISS_CAL_TAG_PIX_DATA; PCapIssCalcfg->isBysOutCfgValid[StreamId] = FALSE; PCapIssCalcfg->bysInEnable[StreamId] = FALSE; /* CSI2 and other */ PCapIssCalcfg->isVportCfgValid[StreamId] = FALSE; PCapIssCalcfg->writeToMem[StreamId] = TRUE; PCapIssCalcfg->pixProcCfg[StreamId].extract = VPS_ISS_CAL_PIX_EXRCT_B16_LE;/*VPS_ISS_CAL_PIX_EXRCT_B16_LE*/ PCapIssCalcfg->isPixProcCfgValid[StreamId] = TRUE ;/*TRUE*/ PCapIssCalcfg->pixProcCfg[StreamId].decCodec = VPS_ISS_CAL_DPCM_DEC_BYPASS; PCapIssCalcfg->pixProcCfg[StreamId].enableDpcmInitContext = FALSE; PCapIssCalcfg->pixProcCfg[StreamId].encCodec = VPS_ISS_CAL_DPCM_ENC_BYPASS; PCapIssCalcfg->pixProcCfg[StreamId].pack = VPS_ISS_CAL_PIX_PACK_B16;/*VPS_ISS_CAL_PIX_PACK_B16*/ PCapIssCalcfg->pixProcCfg[StreamId].addr = 0X0u; PCapIssCalcfg->pixProcCfg[StreamId].offSet = 0X0u; PCapIssCalcfg->pixProcCfg[StreamId].contextToBeUsed = FALSE ; retVal = Fvid2_control(pCamObj->pInstObj->drvHandle, IOCTL_VPS_CAPT_SET_ISS_PARAMS, PCapIssCalcfg , NULL); when use 1100*880 camera, we only change the MACRO VIDEO_IP_RAW_CAPTURE_WIDTH, AR_CAMERA_ACTIVE_VIDEO_IP_RAW_CAPTURE_HEIGHT from 1280,960 to 1100,880 but the image is not ok, you can see it, so what's the issue? SX + +Responses: + + +Xu, I assume that you are using TDA2 LInks and chains framework. So the camera input is a link. Can you share your modification? Additionally, Can you pls help to capture the camera data from camera link and share the image ? Thanks. Regards, Fredy Zhang + +Xu, I checked your input Data. The width is 1088. So suggest that you can set the width to 1088. Thanks. Regards, Fredy Zhang + diff --git a/data2/text/range/0-5000/1171228.txt b/data2/text/range/0-5000/1171228.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d9ce3abd72b718a1ebd5dc872e254ce4c070cd5 --- /dev/null +++ b/data2/text/range/0-5000/1171228.txt @@ -0,0 +1,16 @@ +Ticket Name: phy network card not work in tda2(dra7-evm.dts) platform + +Query Text: +Hi, My sdk version is "Version 03.06.00", I want to use phy that type is 88q1011 of mavell, then I add some device tree config in arch/arm/boot/dts/dra7-evm.dts like this: &mac { status = "okay"; dual_emac; }; &davinci_mdio { phy3: ethernet-phy@3 { reg = <3>; }; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <2>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; fixed-link { speed = <1000>; full-duplex; }; }; &cpsw_emac1 { phy_handle = <&phy3>; phy_id = <&davinci_mdio>, <3>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; /*fixed-link { speed = <100>; full-duplex; };*/ }; But it does not work,if I use fixed-link attribute,then can use this phy. But I don't want to use fixed-link ,So what should I config something else. + +Responses: +Hi, nie mingwang said: But it does not work,if I use fixed-link attribute,then can use this phy. Can you elaborate what you by does not work? Is the link not up or link is up but you are unable to ping? Can you confirm what is the rx and tx delay set-up in the phy? Depending on this you might have to change the phy-mode used. Regards, Tanmay + +Hi, the link is not up, it can not get the phyid by mdio interface in davinci_mdio.c file. And how do I can confirm rx and tx delay set-up? + +"phy_handle = <&phy3>;" actual is "phy-handle = <&phy3>;", I copy this error + +But link is still not up + +Hi, Sorry for the Delay. nie mingwang said: And how do I can confirm rx and tx delay set-up? This will be bootstrapped in the hardware design. Ideally the Schematic should have this detail. There should also be some phy register with this detail. You will have to check it in its datasheet. Can you please share the linux kernel log. Regards, Tanmay + diff --git a/data2/text/range/0-5000/1173538.txt b/data2/text/range/0-5000/1173538.txt new file mode 100644 index 0000000000000000000000000000000000000000..47855904339936fed2dadb20a3560774fa380e71 --- /dev/null +++ b/data2/text/range/0-5000/1173538.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: TDA2x: VISION SDK OPENVX Support + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, Expert, I want to confirm if VISION SDK support OPENVX or not ? Do we have any guide for reference.? Thanks. Regards, Fredy Zhang + +Responses: +Hi Fredy, Yes, but it was just support for OpenVX framework and some OpenVX standard kernels running on C66x. Most of the other modules were supported only in vision sdk. So i really doubt framework along would be useful. Regards, Brijesh + +Brijesh, Thanks. Do we support OpenCV on TDA2? any guide ?Thanks. Regards, Fredy Zhang + +Hi Fredy, Please check vision sdk release notes/user guide. As far as i recollect, we did not support OpenCV on TDA2. Regards, Brijesh + +Brijesh, I check the release notes : 1. VISION SDK support OPENCV : https://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/03_07_00_00/exports/VisionSDK_ReleaseNotes.pdf 2. OpenCV support on kernel 4.4. and didn't support on 4.19. https://processors.wiki.ti.com/index.php/Processor_SDK_Linux_Automotive_Release_Notes Regards, Fredy Zhang + diff --git a/data2/text/range/0-5000/1173617.txt b/data2/text/range/0-5000/1173617.txt new file mode 100644 index 0000000000000000000000000000000000000000..7bf23844fbfa24785f194ba18ea645310613c71a --- /dev/null +++ b/data2/text/range/0-5000/1173617.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM-Q1: TDA4VM : Display YUV422 BT601 Support + +Query Text: +Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: TDA2, TDA4VM Hi, Expert, As our TDA2 VOUT interface can support BT601. Can you pls let me know if we can use the same way on TDA4VM to support BT601 ？ Thanks. TDA2 Guide is here： https://www.ti.com/lit/an/spracg3/spracg3.pdf Regards, Fredy Zhang + +Responses: +Hi Fredy, Yes, we can use same mechanism, but there is another better way, using two video ports outputs, we can get BT601 output and this does not even require usage of DSS M2M. Regards, Brijesh + +Brijesh, Thanks, That's great . Do have have reference for two video port to support BT601 ? Thanks. Regards, Fredy Zhang + +Fredy, Although driver supports this interface, there is not reference example in SDK. Customers have brought up BT601 on their platform using this method. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1174647.txt b/data2/text/range/0-5000/1174647.txt new file mode 100644 index 0000000000000000000000000000000000000000..508c5be48e14f8d87611be754ac51ec2f020a5f8 --- /dev/null +++ b/data2/text/range/0-5000/1174647.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2 Quantization Mobilenetv2 Models + +Query Text: +Part Number: TDA2SX I use ptyorch to train the UNet model. The backbone network is mobilenetv2. The pytorch model was transferred to the onnx model, and the onnx model was transferred to the caffe model and quantified. However,the quantification failed. What is the reason?modles.zip + +Responses: +TDA2x devices support only a limited set of models fo development. Please refer to the user guide for supported/Validated models. Could you please share more details about your project and application requirements to suggest one of our latest devices? BTW, Please refer below for more details the TDA4x and AM62 github.com/.../edgeai-tidl-tools + diff --git a/data2/text/range/0-5000/1175677.txt b/data2/text/range/0-5000/1175677.txt new file mode 100644 index 0000000000000000000000000000000000000000..82392be40591afcdb314394c1cb4b5fe452ca8d8 --- /dev/null +++ b/data2/text/range/0-5000/1175677.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: Is it OK to mix VIN(VIP) pin groups? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Due to routing constraint, we cannot have a group of consecutive pins (for example VOUT1_D0 to VOUT1_D7) on the TDA2 to be assigned to the same VIN(VIP) group input. Is it OK to break the group? For example, as the picture below indicated, we have some of them assigned to VIN3 and some of them assigned to VIN4. Based on the TDA2 datasheet, all these pins can be mux-ed to either to VIN3 or VIN4. we couldn't find any document confirm or disconfirm if the pin groups can be mixed and matched. We have our product on the line waiting for this... we'd really appreciate you guys input! Li + +Responses: +Hi LI, Well, this depends really on your input data format. If your input data format is YUV422, which requires just D0 to D15 datalines, it should be ok. But if your input data format on VIN3A is RGB888, then it is not possible to mix the data lines as shown above. Also please check pinmux and see if above VIN4A datalines also support missing VIN3A datalines, there is a possibility to mix them. Regards, Brijesh + +Hi Brijesh, Thanks for your reply. We are using this in image radar application where all 24 bit data lines are being used. (which is similar to your RGB888 example. We did checked the TDA2's pinmux and they support the above-mentioned pin functions. Could you please elaborate why in RGB888 case we cannot mix data lines? THanks Li + +Hi LI, Li Niu said: Could you please elaborate why in RGB888 case we cannot mix data lines? Because then we need to use two VIN ports to capture data and then need to manually merge the captured data.. I would not recommend doing this. Instead, if single VIN port can be used for capturing RGB888 format, by changing pinmux, it would be easier. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1176676.txt b/data2/text/range/0-5000/1176676.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a1bc5b160a5f127b7d0bd9e36071a61378375e1 --- /dev/null +++ b/data2/text/range/0-5000/1176676.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3XEVM: I configured 1243 through TDA3x. The parameters are workable, but an error was reported. With the same parameters, everything was normal on DCA1000 + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2, AWR1243 Hi Team, With the same parameter configuration, TDA3x reported an error (radar-framecopy instance was used). Parameter configuration comparison: mmwavestudio： The “chains_common_sample_ar12xx_config.c” part of the TDA3x routine: Best regards, Katherine + +Responses: +Hi Katherine, We won't be able to support Radar with TDA2 or TDA3. Please consider moving the other radar devices based on the below link. https://www.ti.com/sensors/mmwave-radar/overview.html Regards, Stanley + +Hello Stanley, How were parameters such as Idle Time of AWR1243 calculated based on the sampling rate and slope? Is there any requirement for minimum precision? Because I found that the parameters I set randomly could easily lead to false targets. Regards, Katherine + +Hi Stanley, Could you please follow up on my issue? Regards, Katherine + +Hi Katherine, As indicated by Stanley, we will not be able to support the Radar SDK with TDA2/TDA3. These SDK's are fairly old and there are newer/better options that exist. Kindly consider moving to the newer offerings from TI. Regards Karthik + diff --git a/data2/text/range/0-5000/1178546.txt b/data2/text/range/0-5000/1178546.txt new file mode 100644 index 0000000000000000000000000000000000000000..bc865094f460755df855ee73d2c90d31e3353539 --- /dev/null +++ b/data2/text/range/0-5000/1178546.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: I2C bitbanging + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Dear Supporter, Due to short of I2C ports, we try to take I2C bitbanging solution. Is there any example of software demonstrated ways to implement such feature on TDA2? Thank you very much. Best Regards, Wilson Hung + +Responses: +Hi Wilson, We do NOT have any reference implementation on this. - Keerthy + diff --git a/data2/text/range/0-5000/1186187.txt b/data2/text/range/0-5000/1186187.txt new file mode 100644 index 0000000000000000000000000000000000000000..b29e3dd4c4310e1f51b974e367f9d09420d1ef29 --- /dev/null +++ b/data2/text/range/0-5000/1186187.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM-Q1: does RTOS Processor SDK for Radar support TDA4? + +Query Text: +Part Number: TDA4VM-Q1 Other Parts Discussed in Thread: TDA2 TI PROCESSOR-SDK-RADAR supports TDA2x & TDA3x does it support TDA4x? do you have plan to support TDA4X? we plan to design 4D imaging radar using cascaded mmWave sensor. what kind of processor is the best choice? TDA2, TDA3, or TDA4? what is the life cycle of TDA2 and TDA3? Thanks + +Responses: +Hi, There is no plan to create Radar SDK for TDA4. You can connect Radar to TDA4 to get object data with UART/SPI, but not raw data via CSI2. We don't have device driver support for Radar on TDA4. For TDA2 and TDA3, we are no longer making any more SDK release. However, our Radar BU is actively supporting cascade radar solution. I would recommend you to reach out to our Radar team for device selection. Regards, Stanley + diff --git a/data2/text/range/0-5000/1191584.txt b/data2/text/range/0-5000/1191584.txt new file mode 100644 index 0000000000000000000000000000000000000000..44b8cfdc6a56090e15d307df48c854b467837bb0 --- /dev/null +++ b/data2/text/range/0-5000/1191584.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ABZ: ISP difference to TDA3 + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Hi Experts, can you confirm if the TDA2 plus and the TDA3 have the same ISP? Or are there changes necessary if you want to reuse the software? BR Simon + +Responses: +Hi Simon, From the ISP design perspective, there is no difference between TDA2p and TDA3. + diff --git a/data2/text/range/0-5000/1213467.txt b/data2/text/range/0-5000/1213467.txt new file mode 100644 index 0000000000000000000000000000000000000000..90b049aa8b490db6f203a0ea6dbbe3e3b83b8fda --- /dev/null +++ b/data2/text/range/0-5000/1213467.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: How to initialize McSPI in the IPU1_1 core + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hello, engineer （Based on the（PROCESSOR_SDK_RADAR_03_08_00_00）framework） I initialized McSPI in the IPU1_0 kernel， I use the API in the file utils_mcspi.c， and it worked properly.When I calling the same code on IPU1_1, code compilation passed normally, but there was an exception during startup, The code startup phase stops after the log “Putting MPU in Retention...” 。 I tried the following modifications （1）add utils_mcspi.c \ into SRCS_ipu1_1 in file vision_sdk\links_fw\src\rtos\utils_common\src\SRC_FILES.MK （2）add ipu1_1 into bsp_mcspi_default_SOCLIST in file ti_components\drivers\pdk_01_10_04_05\packages\ti\drv\bsp_lld\mcspi\bsp_mcspi_component.mk But neither operation works. So how can I use McSPI in the IPU1_1 kernel? Could you please give me some guidance and suggestions. Thank you. + +Responses: +TDA2 is new to me. Could you please provide some debugging suggestions，thank you. + +now，the code can startup from sd card, when McSPI used in the IPU1_1 core, but when call "Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_1)" , the IPU1_1 core crash. the log as follow: + diff --git a/data2/text/range/0-5000/1228994.txt b/data2/text/range/0-5000/1228994.txt new file mode 100644 index 0000000000000000000000000000000000000000..30218ad2717f9807d0862be5f136fb1c94630c28 --- /dev/null +++ b/data2/text/range/0-5000/1228994.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VH-Q1: Performance gain when using C7x instead of C66x DSP for non-TI-optimized code + +Query Text: +Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: TDA2, Dear TI experts, we are currently using TDA2 (C66x DSP @ 1Ghz) to run C code that is not optimized w.r.t. TI intrinsics etc.The code has complex data structures and performs many operations in nested loops. We basically fully rely on the compiler optimizations (O3 level) to make best out of the DSP's capacity. We are now considering to switch to TDA4VH-Q1 (C7x DSP @ 1 GHz). In that context I have the following questions: 1) I know that C7x has a wider SIMD data path compared to C6x (512 bit vs 64 bit). Much much would we benefit from that given the same i.e. non-TI-optimized code? Meaning, will the compiler generally be able to make use of that in our case? 2) How could we take more advantage from the C7x (compared to C66x)? Would introducing the TI intrinsics etc. improve the performance a lot? What else would be helpful here? + +Responses: +Hi, 1) it becomes difficult to do parallelization when SIMD width is higher, so in the case of c7x. Non optimized code may not show any improvement on c7x. It may degrade as well in some cases 2) First thing for DSP optimization is that, most of the compute should happen in loops which can be software pipelined. Then on top of that using intrisics helps in optimizing it further. Hence having loops is first and foremost requirement for DSP optimization. in case of nested loops, only inner most loop will be software pipelined. There are plenty of documents available online for C66x software pipelining, and most of the concept/requirements of optimization of C66x applies to c7x. Regards Deepak Poddar + diff --git a/data2/text/range/0-5000/1240612.txt b/data2/text/range/0-5000/1240612.txt new file mode 100644 index 0000000000000000000000000000000000000000..042507d0df362ddc1183973e3f80a12cfc2d89e6 --- /dev/null +++ b/data2/text/range/0-5000/1240612.txt @@ -0,0 +1,12 @@ +Ticket Name: SK-TDA4VM: TIDLRT multiple outputs + +Query Text: +Part Number: SK-TDA4VM Other Parts Discussed in Thread: TDA2 Hi, I'm trying to deploy a model with multiple output tensors, I noticed this similar thread, my questions are: 1. I'm not confident about how to access multiple output tensors, based on this thread, the key is changing of "j" right? 2. I remember a long time ago, when deploying models, I need to deal with the paddings (both inputs and outputs) but I didn't find anything in this tidlrt code. 3. I also remember I need to deal with de-quantization scalar, how to get this number for each output tensor? My model is in caffe format and I had a hard time converting it to onnx, so have to stick with tidlrt. I guess a standard 3 output tensor OD example would cover all these questions, can someone help? Thanks, Neal + +Responses: +Hi Neal, 1. You will need to allocate an output tensor and then assign a pointer that TIDL-RT can use for copying memory out from the accelerator. 2. For paddings, could you give an example to clarify? The input tensor shape needs to match the model - this can be accomplished several ways, including padding, resizing/interpolation. For the outputs, do you mean paddings from the end of one output tensor to the next one if everything is in the same area of contiguous memory? If you're assigning output memory locations like above, then padding shouldn't be an issue 3. I don't believe you need to apply a de-quantization function on the output; that should already be handled on the output of TIDL. The outputs are most likely in fp32 Link to TIDL-RT documentation (this is sometimes difficult to find or search shows old versions): software-dl.ti.com/.../index.html Best -Reese + +Thank you for the detailed information, I guess point 2 and 3 are tda2 era deployment routine. I don't have questions for now, I will try to follow your instructions first. + +Sure Neal. Closing this thread. Regards, Pratik + diff --git a/data2/text/range/0-5000/1244744.txt b/data2/text/range/0-5000/1244744.txt new file mode 100644 index 0000000000000000000000000000000000000000..15cf3c875bb8110b58289f1839c55edcfd539f6f --- /dev/null +++ b/data2/text/range/0-5000/1244744.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2EVM5777: Error on eglInitialize + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Dear Experts, I am using version 03.08 Vision SDK in TDA2EVM5777 and only change the MAKECONFIG to tda2xx_evm_linux_all to enable the platform to Linux in Rules.make. I want to use GLES in this environment, but I got some error messages in below program: int main(int argc, char *argv[]) +{ + EGLDisplay display = eglGetDisplay(EGL_DEFAULT_DISPLAY); + + if (display == EGL_NO_DISPLAY) + { + fprintf(stdout, "eglGetDiaply ERR\n"); + } + + EGLint majorVer, minorVer; + + eglInitialize(display, &majorVer, &minorVer); //error happened and return EGL_NOT_INITIALIZED + + return 0; +} Error messages: PVR:(Error): WSEGL_InitialiseDisplay: Failed to create output [0, ] The same problem is also happened on the built-in commands "eglinfo", "gles1test1", and "gles2test1". Is there any prerequisite setting for the above commands and GLES lib in the platform? Best Regards, David + +Responses: +Hello David, Yes, there is a distinction here between the GPU drivers. By default, we provide the Windowing System GPU drivers (WS) and by default this will usually run weston/wayland. I'm not familiar with the TDA2 Vision SDK, but I would assume that by default when you boot up the board you see weston come up on the display? Or perhaps do you see anything on the display? The program that you are trying to run would not be using the windowing system's display, but rather a native EGL display, which is not the default driver we provide. Can you please confirm what comes up on your display when you boot up the board? And the boot logs as well? Thanks, Erick + diff --git a/data2/text/range/0-5000/1251668.txt b/data2/text/range/0-5000/1251668.txt new file mode 100644 index 0000000000000000000000000000000000000000..45cce45c1d38801e3ef9b02709bc854a14d38efe --- /dev/null +++ b/data2/text/range/0-5000/1251668.txt @@ -0,0 +1,22 @@ +Ticket Name: PROCESSOR-SDK-AM62A: How to create a graphic layer for display ? + +Query Text: +Part Number: PROCESSOR-SDK-AM62A Other Parts Discussed in Thread: TDA2 Hello !! We want to create a graphic layer, like OSD, to overlay the display, video layer, with transparency attribute. It looks like the Display_GrpxLink on the TDA2 platform. https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-edgeai/AM62AX/latest/exports/docs/common/configuration_file.html Based on the above URL, I only found the display sink(kmssink) node. Do you know how to create the gst node or to construct the overlay graphic layer ? Thank you very much ! Regards, Eten + +Responses: +Hello Eten, Could you please share the example that was used on the TDA2 platform? On AM62A, we do not have a graphics layer as an input to the DSS. We have two input pipelines and DSS has the following properties that it can support with two pipelines: https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/09_00_00_03/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Display/DSS7.html#tidss-properties Regards, Krunal + +Hi Krunal, In TDA4 SDK, the graphic initialization source code is in located in "vision_apps/utils/grpx/src/app_grpx.c". How can I perform the same function in AM62A by gstreamer? Regards, Eten + +Hi Eten, I am not sure I understand the request. There is no graphics core on AM62A so the above feature would not port. Regards, Krunal + +Hi Krunal, Based on your mentioned URL, https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/09_00_00_03/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Display/DSS7.html#tidss-properties I guess that the graphic layer should be the "plane" object (connector ID 31 & 40). The following image is the HDMI output screen after executing"modetest -M tidss -P 40@37:1920x1080 -w 40:zpos:1 -w 40:alpha:32768". When using plane#31, the color will be filled on screen without alpha blending. We want to draw something on the plane#40 by ARGB888 and let it display asynchronously to overlap the screen (CRTCs). So how to set the system and to construct the corresponding gstream pipeline string. Regards, Eten + +Hi Eten, You can do something like this: gst-launch-1.0 videotestsrc ! video/x-raw,width=1920,height=1080 ! kmssink driver-name=tidss plane-properties="prop,zpos=1" Regards, Krunal + +Hi Krunal, Do I need to assign plane number ? How to set the global alpha blending value? Thank you !! Regards, Eten + +Hi Eten, You need to do gst-inspect-1.0 kmssink or waylandsink to see if those properties are exposed. Regards, Krunal + +Hi Krunal, Thanks for your support !! Regards, Eten + diff --git a/data2/text/range/0-5000/1264951.txt b/data2/text/range/0-5000/1264951.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e5492a64e520b4436d21445dea0a6ecb67c3947 --- /dev/null +++ b/data2/text/range/0-5000/1264951.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: I am getting I2C error please do help i am stuck here for more than a month + +Query Text: +Part Number: TDA2EVM5777 [HOST] [IPU2 ] 72.047215 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 72.050173 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 72.051698 s: src/bsp_deviceI2c.c @ Line 789: [HOST] [IPU2 ] 72.051820 s: I2C1: DEV 0x30: RD 0x300a ... ERROR Here is our error!!! [HOST] [IPU2 ] 72.052125 s: src/bsp_deviceI2c.c @ Line 862: [HOST] [IPU2 ] 72.052217 s: I2C1: Error timeout 1 ms!!! [HOST] [IPU2 ] 72.053528 s: Assertion @ Line: 512 in /home/ee212844/Desktop/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +Responses: +This is failing in trying to configure one video sensor, can you check which video sensor you are using and if it is properly mounted? Please refer to vision sdk user guide for more details. Regards, Brijesh + +Hi Brijesh, Thank you for responding. We have checked the video sensor it is working fine but don't know how to configure I2C, as there are many dts files and its confusing. If you have any idea please do help. we are following the vision sdk user guide only. For you reference we are getting this error mentioned in the below link https://e2e.ti.com/support/processors-group/processors/f/processors-forum/770984/rtos-tda2-i2c-error-using-sat0089-daughter-board-after-connecting-ov10635-camera-module Looking forward for your reply. + +Hi Sankalp, Not exactly sure where the issue is. Are you able to talk with deserializer over i2c? If you probe i2c lines, do you see deserializer probed correctly? Lets first check if deserializer and then if serializer is working fine. Regards, Brijesh + diff --git a/data2/text/range/0-5000/1276190.txt b/data2/text/range/0-5000/1276190.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba6ed96505bef09ffc469f72e786c539c4d5265a --- /dev/null +++ b/data2/text/range/0-5000/1276190.txt @@ -0,0 +1,12 @@ +Ticket Name: AM5728: DSP transfer bandwidth and latencies across L3 to on-chip SRAM and DDR + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2 We are experiencing excessive interrupt latency on the DSP which is running a TI-RTOS application. Please help us with answers to the following questions, assuming the initiator of the transfer is one of the C66x cores: What is the maximum data transfer bandwidth and expected latency across the L3 Interconnect fabric itself (assuming L3 fabric is configured for max clock which I think is 256 MHz)? What is the maximum data transfer bandwidth and expected latency across the L3 interconnect-to-OCMC_RAM (i.e. the on-chip Level 3 memory)? What is the maximum data transfer bandwidth and expected latency across the L3 interconnect-to-DMM (Dynamic Memory Manager)-to-EMIF interface-to-external DDR3-1066 SDRAM? Thanks + +Responses: +Hi Rperezti, Due to a holiday in India, half of our team is currently out of office. Please expect a 1~2 day delay in responses. Apologies for the delay, and thank you for you patience. Regards, Takuma + +Hello Rperezti, Please see the detailed performance document for the TDA2 which will be very similar performance for AM5728x: https://www.ti.com/lit/an/sprac21a/sprac21a.pdf Please let us know if you have any additional questions. -Josue + +Thank you Josue. This document is helpful. We may need additional help to debug the interrupt latency problem in the system but we will open a separate thread for further questions. + diff --git a/data2/text/range/0-5000/1294536.txt b/data2/text/range/0-5000/1294536.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3941517951dd84a0bcea5992672bd2fecfc9a43 --- /dev/null +++ b/data2/text/range/0-5000/1294536.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: AM5729 (similar to the TDA2) + +Query Text: +Part Number: TDA2SX Hi Stanley, I'm trying to solve the same issue, I need to disable the EVEs in the bootloader. I reviewed the provided VisionSDK documents but I cannot find a section that addresses this topic. Thank you Casey + +Responses: +Is there a way to disable the EVEs without turning off the VDD_DSP power rail to the EVE, IVU, and GPU? + +As long as there is no EVE image in your multi-core AppImage, SBL (bootloader) will not load any code or boot EVE. + diff --git a/data2/text/range/0-5000/1296624.txt b/data2/text/range/0-5000/1296624.txt new file mode 100644 index 0000000000000000000000000000000000000000..692d26015ca6f74a6cb8133107f464411f6940e2 --- /dev/null +++ b/data2/text/range/0-5000/1296624.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: The TDA2SX processor on MMWCAS-DSP-EVM does not enable the USB3.0 port + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: MMWCAS-DSP-EVM, , TDA2, MMWCAS-RF-EVM, AM68, AM69 Hi, I am using the PROCESSOR-SDK-VISION Version: 03.08.00.00 to build a custom firmware for the MMWCAS-DSP-EVM. The goal is to use the USB3.0 available on the MMWCAS-DSP-EVM as shown in the figure below. The issue is the USB3.0 port seems not working. I compiled the PROCESSOR-SDK-RADAR, then the PROCESSOR-SDK-VISION, yet the USB3.0 is not enabled on both SDKs. Going more in details, I understand that the USB3.0 port can operate as OTG. I tried in both "gadget" and "host" mode, yet the port seems not functioning. Going through the design files, the port is powered from the TDA2SX processor as shown in the three below figures. The USB1_DRVBUS (AB10) pin on the TDA2 processor should be high to enable the TPS chip and power up the USB stick (gadget) on the USB3.0 port. Yet, when I probed the TDA_USB1_DRVBUS wire using a multi-meter on the board, the signal is low. I followed this thread which succeeded in connecting an external Hard drive to the TDA2x Demo board. Even after modifying the linux kernel using kernel_menuconfig to load USB related drivers on boot, it still does not work. I am wondering if the pin is faulty or disabled by design? If it is disabled, can you provide a way to modify the firmware to enable it. Thank you, + +Responses: +Hi, USB was not validated on this EVM and there is no plan to support it in SDK. Regards, Stanley + +Hi, There is no plan to support USB on this EVM. Regards, Ajay + +Hi, I understand it is not supported. Can you point out which is the closest evaluation board and SDK compatible with the MMWCAS-RF-EVM and has USB3.0 support? Based on this reply (Link) seems that all TDA2x boards have USB3.0 support enabled by default on the SDK. Does that mean that USB3.0 can be enabled from the SDK? Thank you, + +Hi, USB support is available on DRA7x/TDA2x EVM. However, DRA7x/TDA2x device family is our previous generation device. Have you evaluated our current generation AM68/AM69 device family? I highly recommend you to consider the new device which has more active development/support. https://www.ti.com/product/AM68 Regards, Stanley + diff --git a/data2/text/range/0-5000/1298769.txt b/data2/text/range/0-5000/1298769.txt new file mode 100644 index 0000000000000000000000000000000000000000..da2e272aeafdb4ddce09794e2aa85c9a82878641 --- /dev/null +++ b/data2/text/range/0-5000/1298769.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2E: MMWCAS-DSP-EVM + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, MMWCAS-DSP-EVM I am using MMWCAS-DSP-EVM and want to program the DSP inside TDA2. I can connect the A15 with no problem but not the DSPs.How to connect DSP using JTAG/? + +Responses: +Hello, I am directing your inquiry to the domain engineer best able to support you. Best, Kelvin + +Hi Kelvin Thanks! BR Jack + +Hi Kelivin For how long I can get the result? Thanks! BR Jack + +Hi Chung, Can you confirm if you have followed all the steps from section 3.9 of the following document? PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/docs/UserGuides/VisionSDK_UserGuide_TDA2xx.pdf Regards, Kaushik + +Hi Sir It is not working for me. Please advice what I can do for next step. Sorry, I do need help on this. BR Jack + +Hi Sir I also gotthis. BR Jack + +I did not find the zip field in my folder. BR Jack + +Hi Chung, Please find the link below: https://software-dl.ti.com/sdo/sdo_apps_public_sw/CCSv9/auto_rvp_rsp_device_support_1.1.8.zip You should get the required GEL files from this package. Alternatively, you can add this product (TDA2) on the latest version of CCS installation as well. Regards, Kaushik + +Hi Kaushik It is stil not working for me. I got the message for connection test through CCS12. [Start: Spectrum Digital XDSPRO USB Emulator] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ C:\Users\jackho\AppData\Local\TEXASI~1\CCS\ ccs1250\0\0\BrdDat\testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 560/2xx-class product. This utility will load the program 'sd560v2u.out'. The library build date was 'Sep 6 2023'. The library build time was '14:41:42'. The library package version is '9.13.0.00201'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '6' (0x00000006). The controller has an insertion length of '0' (0x00000000). The cable+pod has a version number of '8' (0x00000008). The cable+pod has a capability number of '7423' (0x00001cff). This utility will attempt to reset the controller. A error occurred while attempting to reset the controller. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-128' (0xffffff80). The title is 'SC_ERR_CMD_INVALID_MULT'. The explanation is: Unified-SCIF is operating in multiple client mode. The operation being attempted is invalid in this mode. It is likely a problem with `SC_CMD' in SMG_call(). [End: Spectrum Digital XDSPRO USB Emulator] + +hI Kaushik I got them all connected. thanks! + diff --git a/data2/text/range/0-5000/1306816.txt b/data2/text/range/0-5000/1306816.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a1f737d5050ffc385002a00bdb49a9cad93bf36 --- /dev/null +++ b/data2/text/range/0-5000/1306816.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2E: How I can access CDDS for necessary doc to learn how to program TDA2 ? + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi Sir Is any one can provide us a way to access CDDS for nessary docs? BR Jack + +Responses: +Hi Jack, Which document are you looking for? Most of TDA2 documents are on ti.com under the product folder. Regards, Stanley + +Hi Stanley I need many docs from CDDS. But, I need these docs for now. Thanks BR Jack + +Hi Jack, I will close this ticket and follow up with you offline. Regards, Stanley + +ok, thx + diff --git a/data2/text/range/0-5000/1307341.txt b/data2/text/range/0-5000/1307341.txt new file mode 100644 index 0000000000000000000000000000000000000000..67968db3838a88aa33b2008702480cf06635cb7c --- /dev/null +++ b/data2/text/range/0-5000/1307341.txt @@ -0,0 +1,12 @@ +Ticket Name: CCSTUDIO: How to compile a imported makefile project for EVE in CCS12? + +Query Text: +Part Number: CCSTUDIO Hi Sir I imported a makefile project from EVE startware example, eve_bfswtch_arp32_error_intr. 1.I can compile it use CCS termimal with make command. 2. I got errors with the same makefile using CCS build in compile. - I do not know what it is and how to change the compiler. I attached the screen shot to show the makefile, the imported project, termimal compiled result and the compile error shows in console window. Thanks BR Jack + +Responses: +Hello Chung, Thank you for reaching out to Texas Instruments E2E support forum. I have taken your inputs and working on it. Please allow some time to revert back. Best Regards, Tushar + +Hello Chung, Apologies for the delayed response. Can you please specify which device are you using? Regards, Tushar + +Hi Looks like you are discussing this with the right product group on the following E2E https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307552/ccstudio-compile-eve-starterware-fail-can-not-find-rts6740-lib/4969901#4969901 So will mark this one closed. + diff --git a/data2/text/range/0-5000/1307552.txt b/data2/text/range/0-5000/1307552.txt new file mode 100644 index 0000000000000000000000000000000000000000..fab9ba02eb4b16c333bf95c1ac377dfb0b4b4894 --- /dev/null +++ b/data2/text/range/0-5000/1307552.txt @@ -0,0 +1,24 @@ +Ticket Name: CCSTUDIO: Compile EVE starterware fail. Can not find RTS6740.lib + +Query Text: +Part Number: CCSTUDIO Other Parts Discussed in Thread: TDA2 Hi Sir I compiled the EVE starterware example project "mailbox_eve1_to_dsp1" But, it failed and show it short of rts6740.lib. Thanks BR Jack Ho + +Responses: +Hello, What TI processor are you writing code for? Regards, Nick + +Hi Nick It is TDA2X Jack + +Hello Jack, Got it. Sending your thread other to the TDA2 team. Please note that responses may be delayed due to the holidays. Regards, Nick + +If you are building SDK example from CCS project, it is not supported. You need to use makefile system with commend-line build from commend prompt. Please refer to the PDK user guide in SDK for details. + +Hi Stanley Thanks, I got it work on CCS. But, I need more doc to get more inside of EVE. Please help me withe access of CDDS. Thanks BR Jack Ho + + + +CDDS access requires signed NDA with TI. Please contact our local Sale office to assist with that. + +Hi Stanley Could you provide me the contact info? BR Jack + +Will share the contact offline. + diff --git a/data2/text/range/0-5000/1308087.txt b/data2/text/range/0-5000/1308087.txt new file mode 100644 index 0000000000000000000000000000000000000000..d1b70e6e66606625f5980d0ae13e2ef6971ad7f5 --- /dev/null +++ b/data2/text/range/0-5000/1308087.txt @@ -0,0 +1,12 @@ +Ticket Name: PROCESSOR-SDK-TDAX: Where I can find "algorithms\src\isp\src\isp_graph.c"? + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Hi Sir, Is any one can point me where to find "algorithms\src\isp\src\isp_graph.c" ? This is from "BA M Algorithm Framework User’s Guide". Thanks BR Jack + +Responses: +Hi, This is not released in the source form. Please contact your local TI support team for this. Regards, Brijesh + +Hi Brijesh Thanks, I guess I found it in SDK. BR Jack Ho + +Thanks, then closing this ticket. + diff --git a/data2/text/range/0-5000/1327309.txt b/data2/text/range/0-5000/1327309.txt new file mode 100644 index 0000000000000000000000000000000000000000..5f8511d3ea966846d53be1cdec77e41fc1254ddd --- /dev/null +++ b/data2/text/range/0-5000/1327309.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2SX + +Query Text: +Part Number: TDA2SX Incidental TDA2s chips in my project cannot be successfully after performing a warm reset operation, such as using the devmem2 0x4ae07D00 w 1 and reboot - f instructions. The specific manifestation is that the system current does not increase again after decreasing, while other chips can succeed. May I ask what the reason is? + +Responses: +Hello, Please provide full details of your project including what TI EVM you are using and the TI SDK being used here. If it is a custom platform, we suggest you contact your hardware team to ensure they have followed the proper guidelines of TDA2s SOC on the platform. Thanks. + diff --git a/data2/text/range/0-5000/1332484.txt b/data2/text/range/0-5000/1332484.txt new file mode 100644 index 0000000000000000000000000000000000000000..7963dcd0bcaaead7bd919c3a8e3e6e50fa24bdf3 --- /dev/null +++ b/data2/text/range/0-5000/1332484.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: TDA2S USB related issues + +Query Text: +Part Number: TDA2SX Hi，Ti We want to transplant ADB function in TDA2S. Does TDA2S support OTG? If supported, how do we need to modify the driver? Regards Kong + +Responses: +Hello Kong, What is the TI SDK being used for the TDA2S project you are using for the above query? Thanks. + +Hi Praveen, The version we are using is V3.6. Thanks + +Hello Kong, Thanks for the version, but was checking the SDK being used. Is it PROCESSOR-SDK-RADAR or PROCESSOR-SDK-VISION - We are assuming you are using PROCESSOR-SDK-VISION. Note that TDA2S does "not" support OTG, but it does support "dual-role" mode. Please note that "OTG" is an often misused term. By "OTG", if you meant the OTG protocols, such as HNP or SRP, those are not supported. But if you meant the "dual-role" mode, in which the USB port can work in either device mode or host mode based on the USB cable connection, this is supported. For more details, refer to chapter 23.6 in the TRM https://www.ti.com/lit/pdf/sprui29 Regarding ADB support, this is not supported in the PROCESSOR-SDK-VISION. Thanks. + +Hello Praveen, We are using PROCESS SDK VISION.How should we set up the USB OTG interface and gadget driver in the kernel, in addition to setting dr_mode on the device tree. Thanks. + +Hello Kong. Support of the USB "dual-role" is already enabled in the Linux kernel that is provided with PROCESS SDK VISION. The device tree's dr_mode = "otg" is sufficient for this. Thanks. + diff --git a/data2/text/range/0-5000/1337906.txt b/data2/text/range/0-5000/1337906.txt new file mode 100644 index 0000000000000000000000000000000000000000..799da177a26c2e98222ed408684d50c91f227232 --- /dev/null +++ b/data2/text/range/0-5000/1337906.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EG-17: Does SOC support qspi interface that can output and input in both falling and rising edge? + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Hi, Customer they met one urgent issue, they choose a GD flash that only support the mode, from which that input data is latched on the rising edge of SCLK and data shifts out on the falling edge of SCLK. I searched the TRM but there are only 4 modes QSPI supported(mode 1 and mode2 is not supported), all of them only support input and output either on falling edge or rising edge. Is there any methods that can enable our SOC to support output and input on different edge? This issue is urgent, please help to debug. Thanks Regards Zekun + +Responses: +Hi Zekun, We will have to check with the HW team, i will start email on this and will keep you posted. Regards, Brijesh + +Zekun, It appears that Mode 0 matches what you're looking for? Thanks, Kyle + +Zekun, Please ignore my last reply. I see you're asking about TDA2 (not J7). Regards, Kyle + +Zekun, Can you share the datasheet of the selected QSPI device? Thanks, Kyle + +Hi, Kyle I think we don't support the feature I asked. But now customer's issue has been closed. So close the ticket. Regards Zekun + diff --git a/data2/text/range/0-5000/1358731.txt b/data2/text/range/0-5000/1358731.txt new file mode 100644 index 0000000000000000000000000000000000000000..d59c9daf7e0cf419f67e75ebaa6fc7cd046841f6 --- /dev/null +++ b/data2/text/range/0-5000/1358731.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ACD: Resolution and frame rate auto-switching issue + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Dear TI Colleagues I have a question about the Display Subsystem (DSS) module. I would like to ask if the parallel video outputs can switch from 1280*720@30fps to 1980*1080@15fps multiple times to each other when the device is powered on? This kind of output switching needs to re-initialize the system? Regarding the configuration of the TI chip which initializations need to be redone and what needs to be turned off before doing so? + +Responses: +hi, Well, if you can stop the display, reconfigure for the new resolution and restart, it's possible. No need to restart the entire SoC. Regards, Brijesh + +hi，Brijesh Jadav I have several questions. 1. How to stop/config/start DSS, which API? and how to restart the OpenVX graph？ 2. Is there a successful case to refer to in tda2, is there a demo to refer to? Look forward to your reply. + +Well, you could stop the vision sdk chain, reconfigure the DSS and then restart the chain. That's one way. What do you mean by OpenVX graph? TDA2Px uses vision sdk link-chain framework, so there is no OpenVX graph. Regarding TDA2x demo, yes, you can go to settings->display settings and change the display resolution and then re-run the vision sdk usecase. Regards, Brijesh + diff --git a/data2/text/range/0-5000/462114.txt b/data2/text/range/0-5000/462114.txt new file mode 100644 index 0000000000000000000000000000000000000000..445f90388bc16b36bff8217c671f6fe0c505678c --- /dev/null +++ b/data2/text/range/0-5000/462114.txt @@ -0,0 +1,8 @@ +Ticket Name: bare metal interrupt handler + +Query Text: +Other Parts Discussed in Thread: TDA2 is there info or samples for bare metal interrupt handling? I am trying to use interrupts on the C66x DSP1 core on the TDA2 (XC5777X CPU BOARD). I have tried the timer example from the starterware and it configures the timer and interrupt functions, but I get exactly one interrupt. The timer is in auto reload mode and seems to be counting and reloading properly. I can’t make sense of the interrupt though. In previous C64xx projects I have had a vector.asm file that contained the reset, nmi and 12 vectors for the chip interrupts. On the C66x with the starterware code there is a lot added to configure the interrupt crosspoint and handlers. I’m not sure if it needs the vector.asm or not. When I add the vector.asm it is getting located at 0x00800000 and the ISTP is set to the same. When the first interrupt occurs, it branches to a vector at 0x00800220. The DSP ISR is showing a value of 0x0040 indicating vector 6. With a vector for ISR6, I would expect it to be at 0x00800060. What I can’t find documented is whether this should dispatch through some predefined function that uses the inth_handler table or whether I should just branch to my handler directly. I "think" the starterware is assuming dsp-bios is running but it is not in this case. Scott + +Responses: +Hi Scott, Welcome to the TI keystone E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature. We do not have Starterware package/support for C66xx (Keystone ) DSP's. The only support available for C66xx DSP's (Keystone I) is MCSDK 2.x. Please find the latest MCSDK and user guide link below my signature. is there info or samples for bare metal interrupt handling? I am trying to use interrupts on the C66x DSP1 core on the TDA2 (XC5777X CPU BOARD). We are not familiar with this platforms however i can point you to some CSL based examples for interrupt on C66xx keystone devices. By understanding that, you can be able to develop your own example. Thank you. + diff --git a/data2/text/range/0-5000/482769.txt b/data2/text/range/0-5000/482769.txt new file mode 100644 index 0000000000000000000000000000000000000000..3fdccfae3a18acb02e383072c3295ca3378ffc66 --- /dev/null +++ b/data2/text/range/0-5000/482769.txt @@ -0,0 +1,10 @@ +Ticket Name: Toolchain for compiling Qt application for TDA2 board? + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello All, I am looking for information on how to compile a Qt application for deployment on TI's TDA2 (ARM A15 based) board. In particular which toolchain should be used? I've found Qt documentation for other boards, but nothing specific to the TDA2. Any pointers on how to get started with this board would be greatly appreciated. Regards, Eric Gilbertson ejg@peloton-tech.com + +Responses: +Hello, I am not aware with TDA2 but have you tried with CodeSourcery? processors.wiki.ti.com/.../Building_Qt BR Margarita + +Here is the qmake.conf I used for the TDA2. Note, I'm still having a problem with GLES2 but I believe that is unrelated to the conf settings. HTH, Eric G. qmake.conf for TDA2: include(../common/linux_device_pre.conf) DISTRO_OPTS += hard-float QMAKE_INCDIR += $$[QT_SYSROOT]/usr/include QMAKE_LIBDIR += $$[QT_SYSROOT]/usr/lib \ $$[QT_SYSROOT]/lib/arm-linux-gnueabihf \ $$[QT_SYSROOT]/usr/lib/arm-linux-gnueabihf QMAKE_LFLAGS += -Wl,-rpath-link,$$[QT_SYSROOT]/usr/lib \ -Wl,-rpath-link,$$[QT_SYSROOT]/usr/lib/arm-linux-gnueabihf \ -Wl,-rpath-link,$$[QT_SYSROOT]/lib/arm-linux-gnueabihf TDA2_CFLAGS = -mtune=cortex-a15 -mfloat-abi=hard -mfpu=vfpv3-d16 QMAKE_CFLAGS += $$TDA2_CFLAGS QMAKE_CXXFLAGS += $$TDA2_CFLAGS include(../common/linux_arm_device_post.conf) load(qt_config) ~ + diff --git a/data2/text/range/0-5000/527984.txt b/data2/text/range/0-5000/527984.txt new file mode 100644 index 0000000000000000000000000000000000000000..a2809dcb42832a5b042ac15b1f74f11f1c8b8159 --- /dev/null +++ b/data2/text/range/0-5000/527984.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2 Initialisation via JTAG + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello, We are having issues finding any information on how to access a TDA2 device (specifically TDA2HGBRAQ) via JTAG. We don't use a 3rd party tool, but are building the JTAG communications ourselves. The steps we would follow are: 1. Physically connect to JTAG pins on TDA2 device. 2. Trigger TDA2 reset (or JTAG reset) and initialise the device via JTAG (halt core(s), setup memory, etc.). 3. Upload a boot loader to the RAM of the device and execute it. Steps 1 and 3 aren't really the issue, but we need help with step 2. We can access this same target device with a Lauterbach, so the information for how to do this initialisation via JTAG must be available. As of yet, we haven't been able to find the right contact and/or documentation for this. If someone can help us find the correct contact and/or documentation, that would be very helpful. + +Responses: +To use the correct terminology, I am looking for the JTAG scan path details for third party programming support. + +Hello Daniel, How about refering to the CCS device scan chain tree (attached) for example. The xml clearly shows processor sub-paths. TDA2x.xml You may also refer to "30.6 Power, Reset, and Clock Management Debug Support" in the device TRM and in general to the "Chapter 30 On-Chip Debug Support" for additional JTAG debug support details. Hope it helps, thanks, Alex + +Hello Alex, Thank you for this information. We've tried to use it, but still encounter some issues. Primarily, we need to know how to navigate to IcePick-D so that we can access the Cortex core. Currently we can't find any information on the correct TAP states or flow we need to reach this goal. We've "guessed" some values to shift and seem to get some limited data when we clock out in the shift state, but this is just trail and error with no real understanding of what the commands we send and receive really are. Do you know where we can find the information to access the Cortex via IcePick-D? TAP states, Shift-IR commands, Shift-DR data, etc? Once we have access to the Cortex, the reading/wring of RAM (and registers) becomes trivial. Thanks in advance, Daniel. + +Hello Daniel, Could you please also refer to the following doc then. Looks like it has enough information to enable a third party debugger on the processor JTAG test access ports (TAPs) connected to the ICEPick-D. Let me know thanks, Alex + +Hello Alex, Thanks for this. We use this sequence with a P value of 15 and Q value of 0. The P value we estimated based on ADAS reference manuals, the Q is just taken from practice. Are these correct? After we do these initialisation steps, we try to setup the Cortex-A15. However, at this point, we have really no information. Currently we are trying to perform similar commands as we did for Cortex-A9, but even the A9 commands were a kind of guess work. Are you able to provide any documentation at this point, so that we can ensure proper access to the Cortex and read/write the RAM. Thanks, Daniel. + +Hi Daniel, I think you are correct: P = 15 (dec); Q = 0 (dec); P is for tap number, Q for Core number, and referring to TRM debug chapter, your values look correct (see attached screenshot) Thanks, Alex + +Hi Alex, The attached screenshot didn't work, but thanks for clarifying. Regarding the point about setting up the Cortex-A15 after the ICEPick-D initialisation; do you have any documents or contacts who could support us? + +Hi Daniel, Reattached screenshot. Moreover, I received feedback that the Emulation developer community has this information and you should have access to the below url. Could you please check there if more docs are available for you to clarify your questions? https://www.ti.com/securesoftware/docs/securesoftwarehome.tsp Thanks, Alex + +Hello Alex, Thanks for the help. We'll look through the documentation in the Emulation Developer Community and see what we can find. Regards, Daniel. + diff --git a/data2/text/range/0-5000/529898.txt b/data2/text/range/0-5000/529898.txt new file mode 100644 index 0000000000000000000000000000000000000000..82d816a34a868e3c197d3fdb466fcf1edc43932b --- /dev/null +++ b/data2/text/range/0-5000/529898.txt @@ -0,0 +1,18 @@ +Ticket Name: 8CH 720P capture on TDA2 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi all, I want to capture 8CH 720P with YUV422 8bit discrete sync mode on TDA2. My scenario is 4CH for 3D AVM, 2CH for side view, 1CH for front camera and 1CH for rear camera. It should be no problem when run in different situation. Otherwise, the above scenario happens simultaneously. I think the ddr bandwith should be the limitation. Could you please help to comment more about it? Thanks in advance. B.R. OC + +Responses: +Hi, Your question has been forwarded to an expert. Best regards Lucy + +Hi Lucy, Any update? B.R. OC + +Hi, Just sent a reminder. Best regards Lucy + +OC, Sorry for late reply. I think this is doable with VIP1 and VIP2 as far as its 8bit YUV (Port B on each slice supports only 8 bit). DDR bw would also depend upon how your algorithms are operating, you can configure bootloader in dual emif interleaved mode to get maximum DDR banwidth if you want to run all this simultaneously. But when its not all simultaneously, I don't see a problem. + +Please note that if you are using discrete syncs, 2 pins for each ports are available. and if you are using embedded sync, sync codes must be in bt656 format. BT1120 codes over 8bit interface is not supported. Rgds, brijesh + +Hi Yogesh, Thanks so much for your input. It's clear to me. B.R. OC + diff --git a/data2/text/range/0-5000/530602.txt b/data2/text/range/0-5000/530602.txt new file mode 100644 index 0000000000000000000000000000000000000000..fc79f620693953b599390cce6352ff6b419ac8c6 --- /dev/null +++ b/data2/text/range/0-5000/530602.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2 ARM Cortex M4 Floating point support FPv4SPD16 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I am using Code Composer Studio 5.4.0.00091 In my project, I have enabled floating point support FPv4SPD16(ARM compiler processor option) for CortexM4 in TDA2. After i build my project, I checked .asm file. It is showing --float_support=vfplib Why compiler has not generated asm file for FPv4SPD16? Jagan + +Responses: +Jagan, I will FW this here to CCS experts . thanks, Alex + +Jagan, The TDA2x Cortex M4 does not have a floating point hardware. Only vfplib is supported. Regards, Chaitanya + diff --git a/data2/text/range/0-5000/531906.txt b/data2/text/range/0-5000/531906.txt new file mode 100644 index 0000000000000000000000000000000000000000..7e0719007eb35d3e7c663b2cc08c81a435416711 --- /dev/null +++ b/data2/text/range/0-5000/531906.txt @@ -0,0 +1,14 @@ +Ticket Name: Differences between TDA2XX and TDA3XX + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi I am trying to port source code that works on TDA2xx on TDA3xx.I have following doubts: 1.Master core in TDA2XX is a15 and in TDA3XX it is m4,so we have to shift all modules that are being used by a15 in TDA2XX to m4 in TDA3xx. 2.Modules on which the functionality like ethernet,camera capture depends in TDA2xx.At the bare minimum i want ethernet and camera capture functionality to be working on TDA3xx. 3.vip module uses tda2xx video driver which has 12 capture,but tda3xx supports 4 camera,this needs to be identified where all changes are required. Regards Mayank + +Responses: +Hi, Moving your post to right forum to be better answered. Thanks & regards, Sivaraj K + +Mayank, You could start with Vision SDK. It already supports Ethernet, camera capture and other drivers on TDA2 and TDA3. In both cases the SW runs on the M4. On TDA2 the physical master is the A15, which will launch the secondary boot loader (SBL). The SBL will load and start the code from the M4. + +Hi Ejs, Thanks for your mail.I am proceeding the following steps: 1. Take all the TI packages namely bios,starterware,edma,ipc,xdc,bsp from Vision SDK and compile them for TDA3XX.(I could do this for starterware and bsp only.For other packages are they compatible with TDA3xx as they are for TDA2XX or they also need separate compilation) 2.Compile my application code with tda3xx toolchain. I still have following doubts; 1. Will i have to shift modules running on a15 core to dsp/m4 core or simply disabling a15 compilation while compiling the application for tda3xx will work. 2.Will tda3xx compilation require altogether different toolchain from what i was using when compiling for tda2xx. 3.Bootloader packages will be generated from starterware module using sbl user guide and using that will boot the board. 4.If i compile the code for dsp and m4 cores and then generate the combined disc image and flash it in tda3xx,will it work or i have to make other changes. Regards Mayank + +Hi Mayank, All TI packages are compatible with TDA3xx. In case you have designed your application to run some particular operations on A15, you will need to shift it to dsp/m4. You can refer to Vision SDK as an example. TDA3xx compilation uses same tool chains as TDA2xx. M4 uses TMS470, DSP uses C6000 and EVE uses TI ARP32 compiler. You can create multi-core application image including both dsp and m4 cores (you can follow steps given in SBL user guide) and it will work. Regards, Rishabh + diff --git a/data2/text/range/0-5000/532505.txt b/data2/text/range/0-5000/532505.txt new file mode 100644 index 0000000000000000000000000000000000000000..10bbdf9ac11d9990a5303ef6517d39258e5a8253 --- /dev/null +++ b/data2/text/range/0-5000/532505.txt @@ -0,0 +1,26 @@ +Ticket Name: Deep Learning and Inference accelerated on DSPs + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, With the multitude of DSPs built into the processors from J6 -> Sitara -> Multicore ARM+DSP, is TI working on or already supporting Deep Learning inference acceleration support? Specially as it applies to applications very similar to the ADAS and autonomous navigation applications targeted by the Jacinto series? + +Responses: +Hi Anup, I will ask our experts to comment on the keystone device support on "Deep Learning inference acceleration" and road map if any. For Jacinto, I knew it is for automotive devices. Can you please post it on Automotive forum for appropriate and faster response. Thank you. + +Hi Anoop, We have the vision library - VLIB 3.3 ( software-dl.ti.com/.../index_FDS.html) supporting some of the important kernels of deep learning (convolution, maxpooling, Fully connected) - please refer the library and documentation. This library is for C6x DSP and can be used on any TI device with C6x DSP. We have on our roadmap to add more functions for deep learning and appropriate framework support. On Jacinto family (specifically ADAS parts like TDA2/3x) we offer this as part of vision SDK. Please get in touch with TI field representative to get access to vision SDK. Thanks, With Regards, Pramod + +Hi Pramod, Thanks a lot for the pointers. We will check out the VLIB, and get in touch with the local FAE at an appropriate juncture. Wish to see a lot more proofs of concepts to add confidence on TI DSPs though! :) + +I wouldn't hold my breath ... the C66x architecture is quite old by now. It does not have enough processing power for most deep learning algorithms. -Robby + +HI Robby, TI SOCs have hetrogenous processors (EVE and DSP) and multiple instances of those which gives a good horse power for many applications using deep learning technologies. Stay tuned to see some cool demos on this technology at CES - Jan 2017 @ TI booth Thanks, With Regards, Pramod + +That's good to know. I'd be interested to seeing those demos. -Robby + +Dear Champs, TIDL (TI deep learining library) was introduced in CES2017 (Youtube link below). Could you share more info about TIDL? Is there a landing web page for TIDL? + +Hi Luke, We are planning to release it and you should see more documentation and information with that. The releases will be during 1Q and 2Q this year. Thanks, with Regards, Pramod + +Hello Pramod, Is the TI Deep Learning library available for usage? I am planning to use this on J6 (DRA75x) EVM running Android. Can you please let me know if this is possible? From the video of TI demo at CES 2017, it seems that the demo was on TDA2 and not on J6 but from the spec of TDA2 it seems similar to J6. Regards, Pavan D + +HI Pavan, On J6 we have 2xEVE and this demo was done using 4xEVE on TDA2x. You can run the demo on J6 with half the speed. Thanks, with Regards, Pramod + diff --git a/data2/text/range/0-5000/533643.txt b/data2/text/range/0-5000/533643.txt new file mode 100644 index 0000000000000000000000000000000000000000..bd918c9eca817d04a231340616de3d7fa8e3197c --- /dev/null +++ b/data2/text/range/0-5000/533643.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2 and TDA3 + +Query Text: +Other Parts Discussed in Thread: TDA2 Can you please advise regarding the customer questions below? Please see the latest update from the customer: What can you tell me about the TDA2 and TDA3x processors? Can they / do they run Linux? (I’m guessing yes) www.ti.com/.../technicaldocuments The information on the web seems a bit sketchy. Are there available evaluation boards? What cost? What are the capabilities of the evaluation board? This link has a picture of a TDA2x “evaluation board” but the ability to purchase it seems somewhat lacking. www.ti.com/.../sprt681.pdf Same document for TDA3x www.ti.com/.../sprt708a.pdf Here is a datasheet for the TDA3 but again not very detailed; www.ti.com/.../tda3.pdf We are very interested in multiple FPD (LVDS) links on a board. There is also a TI automotive camera evaluation displayed but again very little information regarding it: www.ti.com/.../PMP9351 Can I purchase this as an “evaluation module”? + +Responses: +We have moved your post to the appropriate forum. + diff --git a/data2/text/range/0-5000/533689.txt b/data2/text/range/0-5000/533689.txt new file mode 100644 index 0000000000000000000000000000000000000000..febd3160bb9acc9c45273a10c3e8b37880cd88da --- /dev/null +++ b/data2/text/range/0-5000/533689.txt @@ -0,0 +1,10 @@ +Ticket Name: Porting application code from TDA2x to TDA3x + +Query Text: +Other Parts Discussed in Thread: MATHLIB, TDA2 Hi, I am working on porting the application from tda2x to tda3x. Currently the application runs fine on tda2x.The application uses bios,xdc,ipc,bsp,edma,ivahd,eve,vlib,mathlib packages from vision sdk. On tda2 physical master is a15 that launches the secondary bootloader.The sbl will load and start the code from m4. On tda3 what will be the scenario since tda3 does not support a15. a) How the secondary bootloader launches on TDA3x b)Is it fine to port the software modules running on a15 in TDA2 on m4 in TDA3x. c)Does disabling a15 support from whole application,compiling the ti packages with TDA3 and then generating the application image is right procedure. d)How should i proceed for porting application from tda2x to tda3x. Regards Mayank + +Responses: +a - secondary bootloader is launched from M4 on TDA3x b - Yes it is fine, which peripherals / subsystems are these modules on A15 working on? It also depends on that. You need to see if you have driver on M4 + bios for the same. c- Yes, in vision_sdk when you select platfor as TDA3XX_EVM in Rules.make, this happens automatically. d - Please give details of your usecase and peripherals you are using on TDA2X so we can discuss further. + +Hi Yogesh, Kindly can you guide me, where can I find source code for vision sdk for TDA3x ? What I got is http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/latest/index_FDS.html, but it only contains the prebuilt binaries. I do have NDA and license for CCS. Regards, Waleed + diff --git a/data2/text/range/0-5000/533854.txt b/data2/text/range/0-5000/533854.txt new file mode 100644 index 0000000000000000000000000000000000000000..783b361a09dc9ed12cf7331a2c151947acdbbc23 --- /dev/null +++ b/data2/text/range/0-5000/533854.txt @@ -0,0 +1,12 @@ +Ticket Name: Regarding USB KEYBOARD/MOUSE/WEBCAM NOT DETECTING on TI J6 Dra7xx board + +Query Text: +Hi, Keyboard/MouIse/Webcam are not getting detected on DRA7XX board. I have enabled all the required drivers like USB keyboard driver and USB mouse driver on both kernel and root file system. I have also enabled USB host side drivers in kernel and USB OTG, When I type lsusb , the command returns nothing. When I give lspci, It does not show any USB controller. Request help on this, as I m stuck, Also request to share .config file of kernel, in which USB drivers are working. Thanks n Regards Shalini KP + +Responses: +Hi, Your question has been forwarded to an SW expert. Additionally provide info if you are using custom board or J6 EVM and what is the kernel version. Meanwhile, for more info you can check also below link: processors.wiki.ti.com/.../USB_General_Guide_Linux_v3.8 Best regards Lucy + +Thank you for the reply. The issue is sorted after enabling all the USB host side drivers. + +Hi What is the release version you are using ? In general each usb port USB1, USB2 is configured to particular mode (host, peripheral, drd/otg), the dr_mode field in usb device tree node need to set appropriately. Please arch/arm/boot/dts/dra7-evm.dts, if the dr_mode for USB1 port is set as "otg", then you need to insert the gadget module. You can insert any gadget like g_zero. (modprobe g_zero). For host only configuration you can force dr_mode property of USBx node to "host" in DT(device tree). Regards Ravi + diff --git a/data2/text/range/0-5000/537108.txt b/data2/text/range/0-5000/537108.txt new file mode 100644 index 0000000000000000000000000000000000000000..e53b33f13d8712587c95dca01e9214ac38d1eac7 --- /dev/null +++ b/data2/text/range/0-5000/537108.txt @@ -0,0 +1,24 @@ +Ticket Name: [TDA3] Stereo camera solution + +Query Text: +Other Parts Discussed in Thread: TDA2 Dear we will develop stereo camera system in car sysem. Presently we select the TDA3 solution. But we are not sure whether you can use TDA3 that can meet the effectiveness of stereo camera. From TI ADAS SoC solution get 1. Stereo Front Camera Hight Level Block of of TDA2 can support stereo camera solution, but TDA3 doesn't have this. TDA3 is a cost-down solution, so we worry it cannot meet the stereo camera performance requirement. Can you check the TDA3 or you suggest to use TDA2? And tell me why is main reason. 2. From Stereo Front Camera Hight Level Block of TDA2 can see, you use a FPGA(optional) to link from camera IF to TDA2. Can you tell us what is his main function? If it is "must", who can provide this image of FPGA? Or TI has support this (or provide this SW code) Br. Ivan Wu ivan.wu@tungthih.com.tw + +Responses: +Can I add a question? 3. About stereo camera, VIN1a and VIN2a of TDA3 can input the video signal of 2 camera at the same time? + +You can interface up to four cameras through each VIN (Internally each VIN has 2 slices and each slice has 2 ports). I think what matters here is resolution, fps and data format of stream you are capturing. There shouldn't be any problem for two signals. + +Hi, Yogesh Thank your response But I don't know can Camera 1 and Camera 2 be worked at the same time or they are use "Time division multiplexing"? Br. Ivan Wu + +Hi Ivan, TDA3x can do stereo but the maximum resolution and the maximum number of disparities it can handle, will be less than what TDA2x can handle. What is the target resolution, frame rate and maximum disparity you are trying to achieve in your system ? regards, Victor Cheng + +Hi, Victor Presently we would plan to use HD (720p) resolution, and this fps criteria should be defined at 30 ~ 60 fps. About this, do you have any suggestion? Br. Ivan Wu + +Hi Ivan, For 720P, the maximum frame rate TDA3x can handle would be 7.5 fps with a maximum number of disparities of 32. regards, Victor Cheng + +Ivan, If you have Vision SDK, you can refer to the data sheet under vision_sdk\docs. It explains stereo usecase in detail and how much processing is needed for 640x360@30 fps processing on TDA2x (Capture is still 1280 x 720 from two cameras on xCAM) this info can be used to extrapolate for tda3x in your case but as Victor said for tda3x 720p stereo would yield very low fps. + +Hi Ivan Wu, The VIP in both TDA3x & TDA2x can receive multiple video streams. VIP1 & VIP2 are two separate instances of VIP. This allows SoC to receive multiple video streams simultaneously. Depending on the camera interface & other system needs (width of parallel port, display width, etc...) we can check on the feasibility. Regards, Sujith + +Ivan, For that you either need external logic or use TDA's gpio's to sync between two camera using features provided by sensors. This is done on one of our reference designs but with TDA2x www.radiumboards.com/TI_TDA2x_Based_xCAM_Platform.php + diff --git a/data2/text/range/0-5000/539137.txt b/data2/text/range/0-5000/539137.txt new file mode 100644 index 0000000000000000000000000000000000000000..da717e8143690c8ac075b36fa6f91cef2a626dba --- /dev/null +++ b/data2/text/range/0-5000/539137.txt @@ -0,0 +1,14 @@ +Ticket Name: PWM control external drive buzzer on TDA2 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi all, My code base is VisionSDK_2_10 and use TDA2 custom board. I want to use PWM to control external drive buzzer. The two function pins could be choose from TDA2. One is ehrpwm and another one is timer to configure to PWM output. But I checked bsp driver (VISION_SDK_02_10_00_00\ti_components\drivers\bsp_01_06_00_11\src) that did not have the example code for ehrpwm or timer. Could you please indicate where has the example code for this function? Thanks a lot. B.R. OC + +Responses: +HI, Your question has been forwarded to the Vision SDK team Best regards Lucy + +Hi are you looking for a timer configuration sample code or something else? regards, Shiju + +PWM module is not supported in VSDK or Starterware + +Hi Sivaraj, Shiju, Let move to private forum for discussion. Thanks a lot. B.R. OC + diff --git a/data2/text/range/0-5000/539230.txt b/data2/text/range/0-5000/539230.txt new file mode 100644 index 0000000000000000000000000000000000000000..1eb1d726310b802af028f2be8628bea967a89615 --- /dev/null +++ b/data2/text/range/0-5000/539230.txt @@ -0,0 +1,12 @@ +Ticket Name: Does TDA2 vout support bt656 8-bit mode? + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi all, My code base is VisionSDK_v2.08 and use TDA2 custom board. My vout data pin connect as "TDA2_Vout_D[0~7] -> DS90UB913Q_DIN[2~9]" and data format is "BT656, YUV422, 800x480". In VisionSDK_v2.08, I modify some settings in vision_sdk\examples\tda2xx\src\usecases\common\chains_common.c "ChainsCommon_SetDctrlConfig() " as below "RED". But nothing display on panel. ------------------------------------------------------------------------------------------------------------------------------ if(displayType == CHAINS_DISPLAY_TYPE_LCD_7_INCH) { pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD1; pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI1_OUTPUT; pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; /* Below are of dont care for EVM LCD */ pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; pVInfo->mInfo.width = displayWidth; pVInfo->mInfo.height = displayHeight; pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; pVInfo->mInfo.pixelClock = 29232u; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hFrontPorch = 40u; pVInfo->mInfo.hBackPorch = 40u; pVInfo->mInfo.hSyncLen = 48u; pVInfo->mInfo.vFrontPorch = 13u; pVInfo->mInfo.vBackPorch = 29u; pVInfo->mInfo.vSyncLen = 3u; pVInfo->vencDivisorInfo.divisorLCD = 1; if(Bsp_platformIsTda3xxFamilyBuild()) { pVInfo->vencDivisorInfo.divisorPCD = 1; } else { pVInfo->vencDivisorInfo.divisorPCD = 4; } pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_YUV422I_YUYV;// SYSTEM_DF_RGB24_888; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_BT656_EMBSYNC; // SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_8BIT;//SYSTEM_VIFW_24BIT; pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; /* Configure overlay params */ ovlyPrms->vencId = SYSTEM_DCTRL_DSS_VENC_LCD1; } ------------------------------------------------------------------------------------------------------------------------------ I find the description in TDA2 TRM(as below), could TDA2 support 8-bit mode? Or am I missing any settings? Please give me some hints. – Displays supported: • Active matrix color: 12-, 16-, 18-, and 24-bit panel interface support (replicated or dithered encoded pixel values) Thanks in advance. + +Responses: +Hi Sherry, I think also pins [9:2] from TDA2 side should be used (instead of [7:0]). See the TRM note below. Regards, Stan + +Hi Stan, Thank you for your reply that H/W pin design. In the SW for display setting, I set it as below: pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_YUV422I_YUYV; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_BT656_EMBSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_8BIT; and get error message as below dispdrv/src/vpsdrv_dctrl.c @ Line 713: Core control: Set venc output failed!! Assertion @ Line: 719 in links_ipu/display_ctrl/displayCtrlLink_drv.c: retVal == SYSTEM_LINK_STATUS_SOK : failed !!! I change videoIfWidth = SYSTEM_VIFW_10BIT and get the same error message. But set videoIfWidth = SYSTEM_VIFW_12BIT is OK! How do I set display venc's parameter for BT656? Kuve + +Hi Kuve, I don't have much knowledge in DSS software, therefore I cannot tell the exact settings. Regarding "But set videoIfWidth = SYSTEM_VIFW_12BIT is OK!" : there are no sub-12-bit settings available , because it reflects register bits DISPC_CONTROL1[9:8] TFTDATALINES, which in turn configures the data with in RGB mode. That is, it is irrelevant to BT656 and therefore you can leave it at default (12-bit). Because most of the other settings above are related to DSS registers, you can refer to Table 11-150. DISPC Configure BT.656 or BT.1120 Mode, and other tables in the same section of TRM. Regards, Stan + diff --git a/data2/text/range/0-5000/540822.txt b/data2/text/range/0-5000/540822.txt new file mode 100644 index 0000000000000000000000000000000000000000..26cc4d110de2dc131de532f1c241e56719ec4969 --- /dev/null +++ b/data2/text/range/0-5000/540822.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2x EVM (Vayu EVM): DDR3 reset signal and VTT turn off + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello team, I have two questions about DDR3 reference schematic in Vayu EVM (516582G4_VAYU_EVM_03MAR_2015A.pdf). 1. In Vayu reference schematic, DDR3 reset signals (DDR1_RST, DDR2_RST) come from 1V35_DDR power, not from TDA2 DDR reset singals (AG21,R24). Is there any specific reason not to use TDA2 DDR reset signals? 2. In Vayu reference schematic, VTT regulation LOD includes TR circuit on VTT supply. It looks to discharge VTT supply when it is off. What is the specific reason to add this kinds of circuit, and is it the mendatory for VTT supply? Best regards, Lloyd + +Responses: +Hello Lloyd, All this is to support Suspend-To-RAM (STR), aka Fast Suspend-Resume (FSR). During STR the DDR3 memories must of course remain powered while the SoC is entirely off (except for possibly its RTC domains), and they must NOT be in reset (otherwise the memory chips shall exit the Suspend state and loose their contents). Therefore the DDRx_RST signals are derived from the PG output of the memory subsystem power buck (if you notice, the DDR3 supply for the SoC goes through a switch that is off during suspend, but the buck stays on). The SoC reset outputs pull low while it is off and would reset the chips if they were used for this purpose. On the other hand, the memory chips must see a stable low on CKE while in suspend. Therefore we actively discharge VTT, so that no glitches occur on CKE during the power-down (upon suspend entry) and power-up (upon resume) sequences - these are possible through the termination resistors of the other C/A bus signals. If STR/FSR is not a design requirement, the active discharge circuit is not needed, and the DDR3 resets can be driven by the SoC. Hope this answers your questions. Best regards, Lubo + diff --git a/data2/text/range/0-5000/540982.txt b/data2/text/range/0-5000/540982.txt new file mode 100644 index 0000000000000000000000000000000000000000..d8a42e93a263c7be439d138d1ae01931590da13c --- /dev/null +++ b/data2/text/range/0-5000/540982.txt @@ -0,0 +1,12 @@ +Ticket Name: XDS560V2 Emulator connection failure + +Query Text: +Other Parts Discussed in Thread: TDA2 Our project is developing in Linux environment. We have custom TDA3 board. I have connected Spectrum Digial XDS560V2 STM JTAG Emulator with our custom board. I try to launch debug configuration. I checked the all connection and initialized the gel files. After few minutes i got the following error. Error initializing emulator: (Error -2083 @ 0x0) Unable to communicate with the emulator. Confirm emulator configuration and connections, reset the emulator, and retry the operation. (Emulation package 5.1.73.0) + +Responses: +Hi Jaganathan, Did you try to eliminate the host PC factor? I mean did you try on another PC? Also, the front PC ports are often using cheap wires to the main board and fail to communicate. Rear USBs are always preferred. You can also try with another known good USB cable. Also, do you use known good power supply for the debugger unit? Regards, Stan + +Hi Stan, Same XDS560V2 JTAG Emulator is using in TDA2 EVM board. It is working in windows environment. I did test connection. Below are report generated by Code Composer Studio [Start: Spectrum Digital XDS560V2 STM USB Emulator_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/gnanaveluj/.ti/ti/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 560/2xx-class product. This utility will load the program 'sd560v2u.out'. E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Open::dtc_conf Download failed for file /home/gnanaveluj/ti/ccsv6/ccs_base/common/uscif/./././././xds560v2.out An error occurred while soft opening the controller. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-250' (0xffffff06). The title is 'SC_ERR_ECOM_EMUNAME'. The explanation is: An attempt to access the debug probe via USCIF ECOM has failed. [End: Spectrum Digital XDS560V2 STM USB Emulator_0] + +Hi, I resolved the issue. My laptop was connected with docking station. So it was not connected. I removed from docking station. Now i can able to connect with the board. + diff --git a/data2/text/range/0-5000/542041.txt b/data2/text/range/0-5000/542041.txt new file mode 100644 index 0000000000000000000000000000000000000000..923c87b57263e3adc9ca2b8bc08bac49ad705aa5 --- /dev/null +++ b/data2/text/range/0-5000/542041.txt @@ -0,0 +1,14 @@ +Ticket Name: Linker command files for CCS + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello, I am using CCS v6.2 to check simple program for each core on TDA2 Vayu EVM. However, CCS project (Selected “Empty project w/ main.c”) does not provide linker command files. How can I get the command files for A15, C66 and M4? Best regards, Kenshow + +Responses: +Hello Kenshow, Try the attached one. You may include it in \ccsv6\ccs_base\c6000\include. TDA2x_C66.cmd Hope it helps, thanks, Alex + +Hi Alex, Thanks for C66x command file. Also, I would like to need command files of A15 (gcc base) and M4. Can I get them? Best regards, Kenshow + +Sure, attached. TDA2x.lds TDA2x_CM4.cmd Thanks, Alex + +Hi Alex, Thank you very much for useful files. I 'll be able to check my programs on each cores. Best regards, Kenshow + diff --git a/data2/text/range/0-5000/543489.txt b/data2/text/range/0-5000/543489.txt new file mode 100644 index 0000000000000000000000000000000000000000..37e95924318f1fc46fc08bfe674dfa6c2a66acde --- /dev/null +++ b/data2/text/range/0-5000/543489.txt @@ -0,0 +1,10 @@ +Ticket Name: How to use IPU1_0 instead of A15_0 to process NDK in TDA2x-EVM + +Query Text: +Hi all, When NDK_PROC_TO_USE=a15_0 by default, the target works normally. But when I set NDK_PROC_TO_USE=ipu1_0, the target halts after run. ipu1_0 is halted at Network_waitConnect() and the return status is 0. Meanwhile, there is no longer any response from UART when I try to send cmd to it. I have tried ipu1_1, the same result appeared. I did have done "gmake -s depend" before "gmake -s" as the guide metioned. my VSDK version is 2.08 I wonder if someone could help me. Thanks a lot. + +Responses: +Hello Benz, Can you send output of gmake -config after configuring NDK_PROC_TO_USE=ipu1_1? Also have you tried doing clean build after making changes? (remove binaries folder) Regards, Prasad + +Hello Prasad, Thank you for you tips. I did "gmake -s clean" before build cmd, and the target works well. + diff --git a/data2/text/range/0-5000/544217.txt b/data2/text/range/0-5000/544217.txt new file mode 100644 index 0000000000000000000000000000000000000000..319e3c31ce4ca7857cdc44d52bd74469aa233130 --- /dev/null +++ b/data2/text/range/0-5000/544217.txt @@ -0,0 +1,14 @@ +Ticket Name: Realtime clock (RTC) subsystem time and calendar register not writeable? + +Query Text: +We are trying the TDA2xx RTC subsystem for time and calendar (TC) use. There appear to be problems writing to the TC registers. At the same time I can write to the a SCRATCH register and later read the correct value from it. I cannot do this for the TC registers, even the SECONDS register does not store the values. In addition the seconds is not counting since reading from that register is always '0'. Are there differences between setting up the TC registers and SCRATCH registers? We are configuring using the internal clock source. Thanks + +Responses: +Hi Dan, Do you use func clock from the PRCM or from the external rtc_osc_xi_clkin32 pin? What values you have in the below two registers? CM_RTC_CLKSTCTRL CM_RTC_RTCSS_CLKCTRL Make sure you follow the below TDA2x TRM sections: 23.4.1 Clock Source 23.4.3.3 OCP MMR Spurious Write Protection 23.4.3.5 Modifying the TC Registers 23.5.1.2 RTC Module Global Initialization Regards, Pavel + +Hi Pavel, Yes, first we are using the PRCM and wanted to pull the rtc_osc_xi_clkin32 pin low as suggested, however cannot find the actual pin pad location. It is not in the TRM. I am checking the other items you suggest, I have looked at those things. First is the RTC_STATUS_REG returns 0x0, which I was thinking it should be 0x2, which indicates the RTC is running. Am checking further. Thanks, Dan + +Dan, Dan Zulaica said: Yes, first we are using the PRCM and wanted to pull the rtc_osc_xi_clkin32 pin low as suggested, however cannot find the actual pin pad location. It is not in the TRM. Pad locations are documented in DM (data manual), not TRM. For TDA2Hx-17 (SPRS952A), rtc_osc_xi_clkin32 is at AA13. Regards, Pavel + +Hi Dan, I would like to highlight some spots that Pavel already pointed to. 1. Make sure RTC is enabled in PRCM - CM_RTC_CLKSTCTRL[1:0] CLKTRCTRL = 0x3 - CM_RTC_RTCSS_CLKCTRL[1:0] MODULEMODE = 0x2 2. Make sure RTC Register protection is turned off - RTC_KICK0_REG = 0x83E70B13 - RTC_KICK1_REG = 0x95A4F1E0 3. Select internal clock - RTC_OSC_REG[3] 32KCLK_SEL = 0 4. Enable clock -RTC_OSC_REG[6] 32KCLK_EN = 1 5. Start RTC runnig - RTC_CTRL_REG[0] STOP_RTC =1 6. Check RTC is running - RTC_STATUS_REG[1] RUN == 1 OR - See if seconds are updating Please be aware that internal 32-k clock is made of SYS_CLK1 div 610 and will be close to 32,768kHz only if you use SYS_CLK1 @20MHz. Best regards, Stan + diff --git a/data2/text/range/0-5000/563747.txt b/data2/text/range/0-5000/563747.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2c946bec5406c43393642a680410c1766f1aa2e --- /dev/null +++ b/data2/text/range/0-5000/563747.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: which os systems are supported on this platfrom? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, SYSBIOS Tool/software: TI-RTOS Dear, Now We want to use TDA2EVM5777 platform to develope project. Because there are 2-cortexA15 arm cores,2-C66X DSP cores. 2x Dual Cortex-M4. I want to know if the whole platfrom is supported by SYS/BIOS? if so,we can debug project for every cores in SYS/BIOS by emulator? by the way, if there are some others OS systems for this platform,such linux,IOS,and so on? BRS, Meng + +Responses: +Hi Meng, Are you using Vision SDK for this platform? It does support SYS/BIOS for all the cores. Please refer to Vision SDK White paper, figure 4 for the software stack diagram ( www.ti.com/.../spry260.pdf). Regarding the question about emulator support and other OSes support, we would have to move this thread to the device forum for a faster response from the TDA2 platform experts. Vikram + +Dear Vikram, Thank you for your reply. I shall browse through the document mentioned by you. BRS, Meng + +Dear Vikram, Thank you for your reply. There are some others questions about this platfrom,could you give me help? Thank you in advance. The following picture is TI vision SDK software frame. I want to know which ccs version is used for TI vision SDK software? which sysbios version is used for TI vision SDK software? The software use IPC3.0 for Inter-core communiation,where I can download this IPC version? It is suggested for sysbios version,IPC version and XDCtools from the following website: software-dl.ti.com/.../index.html For IPC3.0, which sysbios version and Xdctools and ccs version are suggested? by the way,my current OS is WIN7. CCS6.0 version and above can be installed in WIn7 OS? T Thanks a lot! BRS, Meng + +Hi Meng you do not need to download each components like Sys-bios, IPC, XDC separately, VSDK is a single installer contain all these packages, just download VSDK and follow the User guide to build and test. CCS version 6.0.1.00040 or higher should be used along with vision SDK 2.10 or 2.11 release. Regards, Shiju + diff --git a/data2/text/range/0-5000/563807.txt b/data2/text/range/0-5000/563807.txt new file mode 100644 index 0000000000000000000000000000000000000000..992a9c7d441b5bd3ca68f4d84a33d0bbd8c6cd89 --- /dev/null +++ b/data2/text/range/0-5000/563807.txt @@ -0,0 +1,12 @@ +Ticket Name: Embedded Xvisor for Ti platforms + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi All, Is possible to port xvisor on any of TI platform like DM8148 , TDA2x ? If so then what are steps to port ? Regards, Vinayak + +Responses: +Hello Vinayak, Let me move this to the TDAxx forum, they might be able to help you. Regards, Karl + +Hi, Experts are notified and will write directly in the thread. Regards, Mariya + +Hi Vinayak, In general, Hypervisor is an offering from TI 3rd parties. TI does not have an inhouse solution for Hypervisor. Specifically, there are current working solutions on Xen and COQOS from 3Ps. I haven't seen an XVisor port on TI platform. Nevertheless, since Xvisor supports ARMv8, it should be possible to enable it on J6 / TDA2. However, we wouldn't be able to guide you directly on this. We can put you in touch with our 3Ps. Please contact your FAE for 3P details. Regards, Anand + diff --git a/data2/text/range/0-5000/565961.txt b/data2/text/range/0-5000/565961.txt new file mode 100644 index 0000000000000000000000000000000000000000..9efee60394815555781b7aadb5156aca9ee5a97e --- /dev/null +++ b/data2/text/range/0-5000/565961.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2SX: Please help in determining capture to display latency in TDA2 for automotive applications + +Query Text: +Part Number: TDA2SX Hi, I have a question on how the latency between a camera capture and display, can be measured. I came across an article on TI wiki, that defines what i need: http://processors.wiki.ti.com/index.php/Latency_Measurement_on_Capture_Encode_Decode_Display_Demo. I would like to know if the same solutions exist for TDA2x processors and If yes, can you please share. Thank you in advance. Mahima + +Responses: +Hi Mahima, Are you using vision sdk? If yes, it prints latency from the capture to display when you print stats. Regards, Brijesh + +Just to add.. You would see the local link level latency and the source to link latency (which is equivalent to capture to particular link latency) in these statistics printed out from Vision SDK. Example is as below: [IPU1-0] 176.749191 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [IPU1-0] 176.749313 s: Source to Link Latency : Avg = 32971 us, Min = 32971 us, Max = 32971 us, Regards, Piyali + +Thanks Brijesh. Yes, vision sdk is used; but, in development environment. Please let me explain my set-up, with more clarity: 1. I have to measure glass to glass latency on a bench setup using 4 cameras. The camera output goes to the ECU which has a TDA2x processor. The output images from the ECU, goes over LVDS to a monitor. 2. I only have access to M4-0 and A15 core logs thru a serial board. The rest are not accessible while testing the product. 3. I went thru the vision sdk user guide and it outlines a separate hardware setup to execute the example use cases. This, I do not have. Is it possible, barring the above limitations, to capture the glass to glass latency? I’m pretty new to this. Sorry, If I’ve not asked the right question. Thank you once again -Mahima + +Thanks Piyali, for taking time out to answer. I've outlined, with more clarity, the limitations associated with capturing the latency in my setup. Kindly go thru, and let me know your suggestions. Thanks again. -Mahima + +Mahima, If you are using vision sdk, just press 'p' when usecase is running, it will print all statistics including latency from the capture to display. This is the latency from capture link to the display link. There will be additional 2 to 3 frames latency in capture and display, which is not counted in this stats. The other way to measure the latency is by keeping a counting clock in front of the camera and take a picture of clock and display output in single shot. The latency is difference between time in clock and display. Regards, Brijesh + +Thanks Brijesh. I think the system we use is a little different. we have a renderer in between the capture and display. I think vision sdk loses the frame once it goes inside the renderer. But the second method would give us a fair estimate though. So, thanks again for the help. + +Hi Mahima, It is possible even if you have rendered in between. You just need to copy srctimestamp from source frame to target frame in your rendered link. Regards, Brijesh + +Thanks Brijesh. I will try this on my system and let you know if I could capture the same. + diff --git a/data2/text/range/0-5000/566481.txt b/data2/text/range/0-5000/566481.txt new file mode 100644 index 0000000000000000000000000000000000000000..04b6ce1f9a348b6660539eba1a3c944513f18c7a --- /dev/null +++ b/data2/text/range/0-5000/566481.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Cannot save uBoot env + +Query Text: +Other Parts Discussed in Thread: TDA2, SYSBIOS Hi all, I want to boot TDA2 EVM with NFS. I follow the document, VisionSDK_LinuxUserGuide.pdf, and do followinf steps: setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.24.170.60:/datalocal/user/abc/vision_sdk/linux/targetfs rootwait ip=dhcp mem=1024M' setenv fdt_high 0x84000000 setenv bootcmd 'load mmc 0 0x825f0000 dra7-evm-infoadas.dtb;load mmc 0 0x80300000 zImage;bootz 0x80300000 - 0x825f0000' save But it shows error message: Saving Environment to MMC... MMC init failed zImage, dra7-evm-infoadas.dtb, MLO and u-boot.img are already copied to SD card. Is there anything I missed? My environment is TDA2, Linux + sysbios, Vision SDK v2.10. Thanks. Kevin Tsai + +Responses: +Hi, Kevin, VSDK expert is notified for your questions. Regards, Mariya + +hi, I guess you have to set your NFS server address correctly below one is for TI NFS server nfsroot=172.24.170.60:/datalocal/user/abc/vision_sdk/linux/targetfs pick the file uenv_nfs.txt, modify with your NFS server address, rename to uenv.txt and copy to SD card. regards, Shiju + +Hi Shiju, Thanks for your reply. I did change NFS address and path when I typed the command in console. But I forgot to change it when I typed this post. I am sorry for that. The error message mentions "MMC init failed". So I think something like pinmux should be modified. But the document does not describe about this. By the way, your sugestion is modifying uenv.txt directly instead of typing command at uboot, right? I will try it. Thanks. Kevin Tsai + diff --git a/data2/text/range/0-5000/567692.txt b/data2/text/range/0-5000/567692.txt new file mode 100644 index 0000000000000000000000000000000000000000..16f7fc367fea7fb2054e5fb964d842dcfffe69f5 --- /dev/null +++ b/data2/text/range/0-5000/567692.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: EDMA3 Emulator/Simulator for Desktop PC + +Query Text: +Part Number: TDA2E Dear Experts, is there some kind of an emulator/simulator available for EDMA3 for Host PC, similar to EVE SW which can be compiled for Host PC? I am not aware of anything like that. Could You please confirm? Many thanks and best regards, ROGERG + +Responses: +Hi, Your question has been forwarded to a customer support lead. Regards, Mariya + +Hi Rogerg, We do not have standalone EDMA simulator. However, EVE simulator includes the internal EDMA module so you can simulate EDMA functionality with EVE simulator. Regards, Stanley + +The dmautils similar to EVE are also provided on DSP which can be used for host emulation. You can find the package at VISION_SDK_XX_XX_XX_XX\ti_components\algorithms_codecs\200.V.OD.C66X.xx.xx\dmautils Note that here OD is an example, which is object deetction algorithm. But the directory also exists under the other algorithm directory such as CLR, LD, SFM, etc. Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/571580.txt b/data2/text/range/0-5000/571580.txt new file mode 100644 index 0000000000000000000000000000000000000000..65c016aa14dd79a694fd77f89fe3cc9eebf9a6b8 --- /dev/null +++ b/data2/text/range/0-5000/571580.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2SX: Link VLIB in visionSDK + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, Where can I include VLib Libraries (common.lib, vlib.lib, vlib_cn.lib) to build on visionSDK2.10? I would like to to know which setting file to set these libraries. If I use VLib functions on frameCopyAlgoLocalDma.c, the build has link errors as follows: # Linking into C:/VisionSDK/VISION_SDK_02_10_00_00/vision_sdk/binaries/vision_sd k/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... warning: creating output section ".sram_start" without a SECTIONS specification undefined first referenced symbol in file --------- ---------------- _sram_start C:\VisionSDK\VISION_SDK_02_10_00_00\ti_components\algorithms_codecs \vlib_c66x_3_3_0_3\packages\ti\vlib\lib\common.ae66 error: unresolved symbols remain error: errors encountered during linking; "C:/VisionSDK/VISION_SDK_02_10_00_00/vision_sdk/binaries/vision_sdk/bin/tda2 xx-evm/vision_sdk_c66xdsp_1_release.xe66" not built gmake[6]: *** [C:/VisionSDK/VISION_SDK_02_10_00_00/vision_sdk/binaries/vision_sd k/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 gmake[5]: *** [c66xdsp_1] Error 2 gmake[4]: *** [apps_dsp1] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps] Error 2 gmake[1]: *** [vision_sdk_apps] Error 2 gmake: *** [vision_sdk] Error 2 Thanks, Kenshow + +Responses: +Hi, Kenshow, Your question has been forwarded to VSDK experts with a copy to VLIB expert. They will commnet directly here. Regards, Mariya + +Hi you can list these libs in either \vision_sdk\build\makerules\rules_66.mk (if its some kernel libs) or \vision_sdk\examples\MAKEFILE.MK (if they are application specific libs) regards, Shiju + +Hi Shiju, The default file of makerules_66.mk has already set the lib path. Also, should I add the path in \vision_sdk\examples\MAKEFILE.MK ? [vision_sdk\build\makerules\rules_66.mk] (Line-223): LIB_PATHS += $(vlib_PATH)/packages/ti/vlib/lib/vlib.ae66 (Line-224): LIB_PATHS += $(vlib_PATH)/packages/ti/vlib/lib/vlib_cn.ae66 (Line-225): LIB_PATHS += $(vlib_PATH)/packages/ti/vlib/lib/common.lib In this case, I just added vlib function into a file, C:\VISION_SDK_02_10_00_00\vision_sdk\examples\tda2xx\src\alg_plugins\framecopy\frameCopyAlgoLocalDma.c Should I set the lib path any more? and which file? Regards, Kenshow + +Kenshow no, you do not need to add this in any other files. One more thing is, include the VLIB header file that defines these functions in framecopy\frameCopyAlgoLocalDma.c regards, Shiju + +Hi Shiji, I had already defined the header. And, it seems link error. my AlgoLocalDma.c file is follows: --------------------------- : : #include #include #include Int32 Alg_FrameCopyProcess(Alg_FrameCopy_Obj *algHandle, UInt32 *inPtr[], UInt32 *outPtr[], UInt32 width, UInt32 height, UInt32 inPitch[], UInt32 outPitch[], UInt32 dataFormat, Uint32 copyMode ) { Int32 rowIdx; Int32 colIdx; UInt32 *inputPtr; UInt32 *outputPtr; UInt32 numPlanes; UInt32 wordWidth; UInt32 lineSizeInBytes; UInt32 opt; uint16_t tccStatus; Alg_FrameCopyDma_Obj * pAlgHandle; pAlgHandle = (Alg_FrameCopyDma_Obj *)algHandle; // TEST VLIB LINK VLIB_cache_init(); : : --------------------------- Regards, Kenshow + +The common.lib is intended to test VLIB in stand-alone, bare metal DSP environment. When you integrate VLIB into an application in VSDK, you don't need common.lib or the functions associated with them. For example, VLIB_cache_init() shouldn't be used if the VSDK has already initialized the cache, and VLIB_malloc() should not be used as this is just the testbench way of allocating memory. In your example above, you probably don't need VLIB_cache_init() or the 3 common header files you included. Is there some reason you feel that you need these? + diff --git a/data2/text/range/0-5000/572635.txt b/data2/text/range/0-5000/572635.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d60b482e9efec78c93261a7d88d7cdc80bd2bcd --- /dev/null +++ b/data2/text/range/0-5000/572635.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: Is it impossible to boot from the SD card with NDK on Vayu board? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, I am using vayu board with visionSDK2.8. On line 617 of the file C: \ VISION_SDK_ 02_ 08 _ 00 _ 00 \ vision_sdk \ Rules.make is written # When NDK is enabled, FATFS can not be used to to MMCSD conflict Dose it mean that it is impossible to boot from the SD card with NDK on Vayu board? Regards, Kenshow + +Responses: +Hi kenshow, Vision SDK experts have been notified to comment here. Thanks, Alex + +Hello Kenshow, This only applies to TDA3xx due to pin mux conflicts for using port1. But if it is necessary on TDA3xx as well we can enable FATFS and NDK together with the help of daughter board. For TDA2/2ex you should be able to use both FATFS and NDK together. + diff --git a/data2/text/range/0-5000/573203.txt b/data2/text/range/0-5000/573203.txt new file mode 100644 index 0000000000000000000000000000000000000000..662eab168b3beec6ee5d9df907e09c645821d0e4 --- /dev/null +++ b/data2/text/range/0-5000/573203.txt @@ -0,0 +1,16 @@ +Ticket Name: Cannot run use cases while TDA2 boot from eMMC + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, If I boot TDA2 from SD card and run use cases, everything is OK. Now I boot it from eMMC and run the same code, there is something wrong with use cases. ASSERT (system_ipc.c|System_ipcInit|63) [IPU1-0] 8.081711 s: ***** IPU1_0 Firmware build time 13:26:09 Feb 9 2017 [IPU1-0] 8.081894 s: *** SYSTEM: CPU Frequency , [IPU1-0] 8.201244 s: SYSTEM: System Common Init in progress !!! [IPU1-0] 8.202128 s: SYSTEM: IPC init in progress !!! [IPU1-0] 8.202372 s: SYSTEM: Attaching to [IPU2] ... [HOST ] 11.728485 s: SYSTEM: System A15 Init in progress !!! [HOST ] 11.728546 s: SYSTEM: IPC: Init in progress !!! [HOST ] 11.728546 s: SYSTEM: IPC: Notify init in progress !!! [HOST ] 11.730804 s: SYSTEM: IPC: [IPU1-0] socket bind failed (Invalid argument, 22) !!! [HOST ] 11.730834 s: SYSTEM: IPC: [IPU1-0] Notify RX channel create failed (endpoint = 81) !!! [DSP1 ] 8.184133 s: ***** DSP1 Firmware build time 09:58:42 Jan 9 2017 [DSP1 ] 8.184194 s: *** SYSTEM: CPU Frequency , [DSP1 ] 8.200817 s: SYSTEM: System Common Init in progress !!! [DSP1 ] 8.201030 s: SYSTEM: IPC init in progress !!! [DSP1 ] 8.201091 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 9.200817 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 10.200847 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 11.200878 s: SYSTEM: Attaching to [IPU1-0] ... [EVE1 ] 8.767248 s: ***** EVE Firmware build time 09:58:43 Jan 9 2017 [EVE1 ] 8.768834 s: *** SYSTEM: CPU Frequency , [EVE1 ] 8.771426 s: SYSTEM: System Common Init in progress !!! [EVE1 ] 8.774019 s: SYSTEM: IPC init in progress !!! [EVE1 ] 8.776123 s: SYSTEM: Attaching to [IPU1-0] ... [EVE2 ] 8.767370 s: ***** EVE Firmware build time 09:58:44 Jan 9 2017 [EVE2 ] 8.768956 s: *** SYSTEM: CPU Frequency , [EVE2 ] 8.771518 s: SYSTEM: System Common Init in progress !!! [EVE2 ] 8.774171 s: SYSTEM: IPC init in progress !!! [EVE2 ] 8.776276 s: SYSTEM: Attaching to [IPU1-0] ... [IPU2 ] 8.730464 s: [IPU2 ] EVE1 Image Load Completed [IPU2 ] 8.754376 s: [IPU2 ] EVE2 Image Load Completed [IPU2 ] 8.754498 s: [IPU2 ] EVE MMU configuration completed [IPU2 ] 8.754559 s: [IPU2 ] EVE MMU configuration completed [IPU2 ] 8.754651 s: ***** IPU2 Firmware build time 13:26:10 Feb 9 2017 [IPU2 ] 8.754773 s: *** SYSTEM: CPU Frequency , [IPU2 ] 8.756786 s: [IPU2 ] 8.756877 s: ### XDC ASSERT - ERROR CALLBACK START ### [IPU2 ] 8.756938 s: [IPU2 ] 8.757213 s: assertion failure [IPU2 ] 8.757274 s: [IPU2 ] 8.757304 s: ### XDC ASSERT - ERROR CALLBACK END ### [IPU2 ] 8.757365 s: [DSP1 ] 12.200908 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 13.200939 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 14.200939 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 15.200969 s: SYSTEM: Attaching to [IPU1-0] ... [DSP1 ] 16.201000 s: SYSTEM: Attaching to [IPU1-0] ... Message will show "SYSTEM: Attaching to [IPU1-0]" continuously. BTW, the memory size is also different between the two booting mode. Booting from SD card: root@dra7xx-evm:~# free total used free shared buffers Mem: 634348 163636 470712 0 10260 -/+ buffers: 153376 480972 Swap: 0 0 0 Booting from eMMC: root@dra7xx-evm:~# free total used free shared buffers Mem: 2046540 143512 1903028 0 2892 -/+ buffers: 140620 1905920 Swap: 0 0 0 What is the different between SD card booting mode and eMMC booting mode? How can I run use cases while boot from eMMC? I am working on TDA2xx with VSDK v2.10. A15 OS is Linux. Thanks, Kevin Tsai + +Responses: +Hi, Kevin, Your question has been forwarded to VSDK expert. Regards, Mariya + +ravi can you please respond? regards, Shiju + +Hi Kevin, There should be no difference in memory and running usecases whether you are using SD/EMMC. This could be either related to filesystem or boot parameters. Are you using pre-built binaries or compiled? Please share boot parameters . You could print the boot environment in u-boot Stop at U-boot prompt (when it says hit any key to stop autoboot) and use command "printenv". Also did you copy the uenv.txt file to boot partition? If you modified uenv.txt, please share it. Regards, RK + +Hi Ravikumar, I make a copy of uenv.txt and rename it as uenv-emmc.txt. Now, I can run usecase. Thanks for your reminding. Kevin + +Hi Kevin, Thanks for updating the status of the thread. I will mark it as closed, if you have any other issues, you can write here. Regards, Yordan + diff --git a/data2/text/range/0-5000/574868.txt b/data2/text/range/0-5000/574868.txt new file mode 100644 index 0000000000000000000000000000000000000000..be429e8d3cd05ee83267c6cae4fbbe1a39e6febc --- /dev/null +++ b/data2/text/range/0-5000/574868.txt @@ -0,0 +1,21 @@ +Ticket Name: Linux/TDA2E: multiple video nodes possible on usb webcam(g_webcam)? + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi Guys, Scenario: If i have multiple video source with different nodes say(/dev/video0...n) and i'm using usb webcam gadget mode. 1-> Is it possible to assign multiple video node to single usb port? or Do we have to unload webcam driver for assigning different node everytime? 2-> what about switching of video nodes. is it possible and how much time it can take to switch between video nodes? regards, Ganesh + +Responses: +Hi Ganseh, I have forwarded your question to the expert. Regards, Yordan + +Hi Yordan Kamenov , Is their any update? regards, Ganesh + +Hi Ganesh, I have pinged them. Regards, Yordan + +Hello, Just to clarify This question is comepletely related to V4L2 and USB It does not deal with the capture interfaces on the TDA2 platform. Now to answer your question, V4L2 USB driver would register video devices for as many webcams connected. The device numbers change only if you disconnect and reconnect cameras. You can always find the right device by-path /dev/v4l/by-path This way, you can identify a specific device without worrying about thr order of probing. I hope this helps Regards, Nikhil D + +Hi Nikhil Devshatwar, V4L2 USB driver would register video devices for as many webcams connected. + The device numbers change only if you disconnect and reconnect cameras. What you are telling is for usb host mode right?. what i'm asking is for usb device in uvc gadget mode. Just to clarify: I'm using VISION_SDK_02_12 with kernel 4.4. I have TDA2Ex EVM board, on that board two cameras are mounted on two CSI bus. Now i want webcam gadget mode i.e EVM as device mode. As their are two camera so their will be two device node will be created(say /dev/videoX & /dev/videoY) when we load camera driver. So to make EVM as webcam gadget we load usb_f_uvc.ko it will take only one video device node right? 1-> how can we make it possible to assign multiple camera output to single usb port by using usb_f_uvc(configfs). so that host side i can access multiple video device node? 2-> If not multiple video device node on single usb port then one camera output at a time? switching using configfs? but then how can we assign different camera output every time? regards, Ganesh + +Hello, your question is quiet confusing. First, the usb_f_uvc driver does not USE existing v4l2 CAPTURE device. It rather registers a NEW v4l2 OUTPUT device. Which means, application is supposed to dump buffers into it which internally sent from USB as a webcam gadget. The v4l2 device related to the USB port is a OUTPUT device. It is completely irrelevent to the v4l2 capture device registered from the CAL/CSI drivers. You need to write an application which takes data from v4l2 capture device (you can choose video1 or video2 from the CSI device) and then feed this into the v4l2 output device (video3 registered from USB driver) Application will have full control to decide and switch between the capture devices What you want is a USB gadget driver which somehow uses an existing V4L2 driver to send data over USB This sounds like application code, so I am not sure if this even exists as a kernel driver. I hope I clarified your concerns. Regards, Nikhil D + +Hi Nikhil Devshatwar , Thanks for your reply, i just needed that clarification only. I was looking for any mechanism available at kernel side to switch with your answer it is clarified their is no such mechanism at kernel side. uvc-gadget is a test application which can be used for testing uvc gadget webcam for single v4l2 capture to v4l2 output. regards, Ganesh + diff --git a/data2/text/range/0-5000/581287.txt b/data2/text/range/0-5000/581287.txt new file mode 100644 index 0000000000000000000000000000000000000000..b754ed6fe748c570627ca92abcb8b0a722b7ca45 --- /dev/null +++ b/data2/text/range/0-5000/581287.txt @@ -0,0 +1,14 @@ +Ticket Name: How to boot TDA2 from eMMC whether SD card is inserted or not? + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I boot TDA2 EVM from eMMC. In file "uenv-emmc.txt", I have to define "root". But something make me confused. If SD card is inserted while booting, it will be defined as /dev/mmcblk0 and eMMC will be defined as /dev/mmcblk1. If SD card is not inserted while booting, eMMC will be defined as /dev/mmcblk0. How to define "root" if I want to boot from eMMC whether SD card is inserted or not? Or I can fix eMMC as /dev/mmcblk0? And how to do it? Thanks, Kevin Tsai + +Responses: +Hi Kevin, I have forwarded your question to VisionSDK expert. Regards, Yordan + +Kevin Please provide the details of kernel release version you are using. In linux kernel, eMMC is enumarated as the mmcblk0 and SD card as mmcblk1. Regards Ravi + +Hi Ravi, Following is my Linux kernel version: Linux dra7xx-evm 3.14.63-00013-gcb5f01e-dirty #11 SMP PREEMPT Wed Mar 15 11:40:54 CST 2017 armv7l GNU/Linux BTW, where can I verify the enumaration of eMMC? Thanks, Kevin + +Kevin The mmcblk0 or mmcblk1 depends on order in which the devices are enumerated and valid device found. Another option is use UUID (Universally unique identifier), refer to TI-release, Check u-boot scripts, environment variables args_mmc, which setups the UUID for specific mmc boot partition. # part uuid mmc 0:2 uuid # run args_mmc # pri boot_args Regards Ravi + diff --git a/data2/text/range/0-5000/583648.txt b/data2/text/range/0-5000/583648.txt new file mode 100644 index 0000000000000000000000000000000000000000..f20b1f60d296f6fc7cfa894fe9e24f26d70a5ec3 --- /dev/null +++ b/data2/text/range/0-5000/583648.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2HA-17: Q: Should the power consumption for TDA2x ES2.0 and ES1.1 be equivalent or 'the same' assuming identical configuration? + +Query Text: +Part Number: TDA2HA-17 Question: Should the power consumption for TDA2x ES2.0 and ES1.1 be equivalent or 'the same' assuming identical configuration? Alternatively, should a TI EVM with a TDA2x ES2.0 device have the same or similar power consumption as a TI EVM with a TDA2x ES1.1 device? Alternatively, should a customer target board with a TDA2x ES2.0 device have the same or similar power consumption as a customer target board with a TDA2x ES1.1 device? Does TI have available a spreadsheet that calculates power consumption for a set of used components and IP? Is there a version for TDA2x ES2.0 and TDA ES1.1? Or are they available separately? Many thanks! + +Responses: +Hi Jason, I have forwarded the question to an expert to help. Regards, Yordan + +Jason, Yordan, Generally speaking, the power consumption for TDA2x ES2.0 and ES1.1 are the same. There are die to die differences that exist due to normal manufacturing variations. Regards Kyle + diff --git a/data2/text/range/0-5000/584994.txt b/data2/text/range/0-5000/584994.txt new file mode 100644 index 0000000000000000000000000000000000000000..61723f616635b8bdd163db04a017526d0e72df5b --- /dev/null +++ b/data2/text/range/0-5000/584994.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2E: Power Rail current requirements for TDA2+ and TDA2E + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, Is there any documentation that i can reference that show's current requirements for each rail for TDA2+ and TDA2E. + +Responses: +Hi Julio, Current requirements will depend on many factors. I'm not sure we have study for those SoCs. But I'm sure the results would be very similar to these: processors.wiki.ti.com/.../AM57xx_Power_Consumption_Summary Regards, Stan + +Stan, Yes this is what i was looking for. Just a power consumption summary for typical use cases with TDA nothing too specific. Best, Julio + diff --git a/data2/text/range/0-5000/585063.txt b/data2/text/range/0-5000/585063.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b3484553143abce35ca20b83f37bd559fd5db7c --- /dev/null +++ b/data2/text/range/0-5000/585063.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: Data logging on TDA...best/most developed method? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Team, Regarding algorithm validation via data logging on TDA2 series of parts, which is the recommended/typical interface and why? (i.e. ethernet, straight to SD card, USB to PC)? Do we have any software tools on the PC side already developed to receive video data? I'm aware of example Ethernet usecase which sends one frame at a time, but wondering if we have something more advanced. Best, + +Responses: +Hi Lina, I have forwarded your question to VisionSDK experts to comment. Regards, Yordan + +Hello Lina, In vision SDK we have 'null' link which can be used for data logging. Currently it supports Ethernet, SD card and memory write. The choice of interface depends on throughput requirement of use-case. Ethernet supports higher bandwidth (upto 600Mbps TCP/IP) where as SD(~10Mbps) and memory are limited. If you want to log only few frames you can use SD card but for large video Ethernet is recommended. You can use opensource tools like ffmpeg, yuvplayer etc. for analyzing the post processed data. + +Hi Prasad, Thanks for the information. What about USB? Have you seen that implementation with a PC? Best, Lina + +Hello Lina, USB/PCIE are not supported with current implementation of null link. + diff --git a/data2/text/range/0-5000/586455.txt b/data2/text/range/0-5000/586455.txt new file mode 100644 index 0000000000000000000000000000000000000000..0505434448c7246e39336d46116ff703657e3226 --- /dev/null +++ b/data2/text/range/0-5000/586455.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: TDA2Eco and TDA2x be pin-compatible + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi We have plans to create the TDA2x Board for AVM Applications. And TDA2x Board will be shared with TDA2x and TDA2Eco. Can TDA2Eco and TDA2x be pin-compatible? Regards, JP Park + +Responses: +Hi JP Park, TDA2x and TDA2Eco are pin-for-pin compatible, you can check the note in the bottom of the table here: www.ti.com/.../overview.page Regards, Yordan + +Hi, I want to add that the note can be somewhat misleading. The two devices are NOT pin-to-pin equivalent, but it IS possible that PCB is designed so it can accommodate the one or the other SoC. For example, TDA2 has no CSI2 interface, that is, those pins are acting as other interface pins (I think VIN pins). + +Hi, Thank you for your quick reply. the problem is solved thanks to you. Regards, JP Park + diff --git a/data2/text/range/0-5000/587995.txt b/data2/text/range/0-5000/587995.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ab1b73d58ec8e5f198da9ac7ca9cedc2129197e --- /dev/null +++ b/data2/text/range/0-5000/587995.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2E: NDK LLDP and SNMP support + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, CC3200 Tool/software: TI-RTOS Hello Experts, One of our customers is looking for LLDP support with TDA2 devices. Does TI NDK support LLDP and SNMP? If not is there any plans to add that support? Thanks! + +Responses: +Hi Prasad, TI does not have SNMP support, but we've partnered with InterNiche who does supply it. We even have an example on processors.wiki.ti.com, but for the TM4C device (but still with the NDK). We basically supply just the binary to proof it works. processors.wiki.ti.com/.../TI-RTOS_SNMP We don't have source code since that needs to be worked out with InterNiche. InterNiche's contact information is on the examples page. Todd + +Hello Todd, Thanks for your reply. Looks like SNTP offering from InterNiche is based on UDP and not LLDP. I will ask my customer to check SNMP offering from InterNiche. By any chance is there any plans to add LLDP support in NDK? + +No current plans. + +Hello Prasad, DMH Software offers SNMP-Agent implementation for the TI-RTOS SimpleLink platform. We built and tested the SNMP-Agent for TI-RTOS on the CC3200 Dev. Board. Please see more information here: www.dmhsoftware.com/ti-simplelink-iot-platform Please contact DMH for more information: info@dmhsoftware.com We will be happy to provide an evaluation SDK. Yigal Hochberg DMH Software + diff --git a/data2/text/range/0-5000/590092.txt b/data2/text/range/0-5000/590092.txt new file mode 100644 index 0000000000000000000000000000000000000000..34374738654f45bc483bb16d483441684e59b10b --- /dev/null +++ b/data2/text/range/0-5000/590092.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: TDA2+ ACD Package information? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Where can i find information regarding the packaging of the TDA2 plus ACD package. + +Responses: +Hi Julio, I wasn't able to find an ACD package for TDA2x. Did you mean ABC? + +Hi Stanislav, Sure, can you point me to that information. + +Hi, Julio, The information is in chapter 10 Mechanical Packaging and Orderable Information in Data Manual. You can download the data manual for the appropriate silicon revision from: Regards, Mariya + +Mariya Petkova, Thank you for the information, i found out my question was on an unreleased device. Thank you, Julio + diff --git a/data2/text/range/0-5000/590369.txt b/data2/text/range/0-5000/590369.txt new file mode 100644 index 0000000000000000000000000000000000000000..662769af128961897c7f324e8cee5f7bc06a49d3 --- /dev/null +++ b/data2/text/range/0-5000/590369.txt @@ -0,0 +1,32 @@ +Ticket Name: AM5718: 13MP camera on MIPI interface + +Query Text: +Part Number: AM5718 Other Parts Discussed in Thread: TDA2 Hello, I have been read the Document for AM571x Processor but i have below query. I have been checked "AM571x Industrial Development Kit" User's Guide. but this Development kit does not support mipi csi-2 camera interface. it has only provision for parallel camera interface. is there any another development kit which support USB 3.0 and Camera MIPI interface Support? Can we interface 13MP Camera on MIPI CSI-2 interface on AM571x Processor? Please provide us the support as soon as possible. Thanks & Best Support. + +Responses: +Hi, 1. No, there is no other EVM for AM571x. 2. The AM571x CSI interface is described in section 8 of the AM571x TRM Rev. E. + +Thanks for your reply. 2. I have been check AM571x TRM Rev. E. Document but there is no any description for Camera support(How much Mega Pixel). I mean this processor is capable to interface the 13MP Camera? + +What is the video format of your camera - resolution, frames per second? + +Thanks for your reply. We don't required the video streaming. We captured the raw data of image (8bit/pixel) from camera. We have some query as below. is there possible to get the line by line raw image data instead of whole image data? is there any Evolution board which support the USB 3.0 and camera (MIPI) interface? Thanks & Best Regards; + +Gentle Reminder.. Thanks & Best Regards; + +Sorry about this delay. I have escalated this to the factory team. + +Gentle Reminder.. Thanks & Best Regards; + +Hello: Regarding to USB3 camera support: The USB driver in the SDK may support standard Linux USB3 camera modules, though there is no examples in the SDK. You may reference to www.ti.com/.../tidep0076 where a PointGrey ( https://www.ptgrey.com/) camera module was used with an AM57 EVM. You may also want to check if the camera vendor support UVC driver or not. Regarding to 13MP support over CSI-2: Please confirm the spec of the camera module CSI-2 interface, with respect to required clock speed and number of lanes. This will allow us to confirm if the CSI-2 PHY is compatible with the camera. In the meantime, I am confirming maximum line width of our internal buffers to ensure it can support 4k pixel line width. regards jian + +Hi jian, Thanks for your quick answer. We have not concern with USB3.0 camera. We are asking for is there any evolution kit which support USB 3.0 (usb core (host+device)) and camera mipi CSI-2 interface support. Best Regards; Nikunj Patel + +gentle reminder. Thanks & Best Regards; Nikunj Patel + +Hello everyone; I want to download the "ti-processor-sdk-linux-automotive-omap5-uevm-6.04.00.02-installer.bin" sdk for Omap5432 evm board. Please provide me the link for that. Thanks & Best Regards; Nikunj Patel + +Hello everyone; Gentle reminder. Thanks & Best Regards; Nikunj Patel. + +Hi Nikunj Sorry for keeping you waiting on this thread. Unfortunately no one on the team supporting these forums are familiar with OMAP5 SDK etc, and will likely not be able to support any queries on it. To your original query on TI EVM supporting MIPI CSI , unfortunately currently none of the AM57x family EVMs have support for this. You can look at the following post e2e.ti.com/.../2262820 You can search for the TDA2 family evaluation boards, available from Spectrum Digital. Hope this helps some. Regards Mukul + diff --git a/data2/text/range/0-5000/597423.txt b/data2/text/range/0-5000/597423.txt new file mode 100644 index 0000000000000000000000000000000000000000..7c2b18bb5bcd6a85967e687f7ca166b43f746649 --- /dev/null +++ b/data2/text/range/0-5000/597423.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: How to divide the input and ouput image into several blocks for reaching 30fps + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, In surround view camera system, we tried to load our own LUT and divide the input and output images into blocks according to the reference manual, and use DMA to transmit data, but the frame rate is less than 30 frames. we have some questions to ask, Q1, does the output image in DDR also need to be transferred with DMA from L2 SRAM? Q2, how to divide the image, whether the 880*1080 image is divided into small slices of 10*18 or large slices to ensure the width of each block is long enough? + +Responses: +Hi, I have forwarded your question to an imaging expert. Regards, Yordan + +Can you please confirm your device (TDA2 or TDA3?) and SW version (BIOS or Linux)? Please mention Vision SDK version number. + diff --git a/data2/text/range/0-5000/599158.txt b/data2/text/range/0-5000/599158.txt new file mode 100644 index 0000000000000000000000000000000000000000..098b992bef57663f2f4be1dd043d46bb25cb5a0c --- /dev/null +++ b/data2/text/range/0-5000/599158.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2HV: How to interpolate inter video frames from 30 fps to 60 fps + +Query Text: +Part Number: TDA2HV Dear experts, is there a way to interpolate (reconstruct or calculate) inter frames, from 30 fps to 60 fps? Similar to the way as of h.264 encoding (b-frames), by bidirectional motion estimation. Could IVAHD being (re)used for this? Or could you think of any other valid approach? Note: We do not just want to double the frames. + +Responses: +Hi Ewald, I have forwarded your question to an expert to comment. Regards, Yordan + +This kind of interpolation can be done by a custom algorithm. IVA-HD does not support this since this is not a art of any codec specification. But you maybe able to develop an algorithm on DSP or EVE. + diff --git a/data2/text/range/0-5000/599794.txt b/data2/text/range/0-5000/599794.txt new file mode 100644 index 0000000000000000000000000000000000000000..e4e4668853a25ead67ef752554b2ed196fcccdf0 --- /dev/null +++ b/data2/text/range/0-5000/599794.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS: SYS/BIOS: TDA2xx platform missing + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello, I have tried multiple versions of SYS/BIOS and I could not find a TDA2xx platform among offered ones. However, there is a TDA3xx one as can be seen in this image: Is there any version of SYS/BIOS where I can find the TDA2xx and if not where can I acquire it or which platform can I use that is equivalent? Thank you. + +Responses: +Hello Nick, Not an SYS/BIOS expert, however an equivalent platform that you may try with is AM572x. Thanks, Alex + +Hello Alex, Thank you for the suggestion, I'll give it a try. + +Nick, SYS/BIOS platform information for TDA2 and TDA3 is not included in CCS releases today. For TDA2 or TDA3 development you could start with Vision SDK (under NDA). In this case please contact your local TI representative. + diff --git a/data2/text/range/0-5000/600601.txt b/data2/text/range/0-5000/600601.txt new file mode 100644 index 0000000000000000000000000000000000000000..32cd4f76d105c795ab6be20b7da56370d2f16d99 --- /dev/null +++ b/data2/text/range/0-5000/600601.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P CTT - When will it be available? + +Query Text: +Other Parts Discussed in Thread: TDA2 Team, Please advise when the TDA2P Clock Tree Tool (CTT) will be released. Can the TDA2 CTT be used (i.e. what are the differences in the clock tree)? Best, + +Responses: +Hi, Lina, The TDA2Px will be released mid July in Auto Package. In general, the differences in clock tree between TDA2Px and TDA2x will be only in the supported modules of the devices - add modules with their clocks or remove modules. You can compare Data Manuals to figure out the differences. For existing modules in both family of devices, I think that for now you can use TDA2x CTT. Also, there is a released Sitara Plus CTT under NDA, if you want I can sent you in a private mail. Regards, Mariya + +Hi Mariya, I'm not familiar with the Sitara Plus. Will the clock tree tool be the same for both? If so, please send via email. Best, + +Hi, The CTT was sent via mail. I will close the thread. Regards, Mariya + diff --git a/data2/text/range/0-5000/604515.txt b/data2/text/range/0-5000/604515.txt new file mode 100644 index 0000000000000000000000000000000000000000..6b810366290829a6c951de4c9342ef7c45bc6946 --- /dev/null +++ b/data2/text/range/0-5000/604515.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: VOUT spread spectrum feature + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hello Team, My customer asked that Spread spectrum feature is supported on VOUT1 port due to EMI issue at VOUT1 PCLK frequency. In TDA2 TRM (TDA2x_SR2.0_SR1.x_NDA_TRM_vAD.pdf), there is a register (PLL_SSC_CONFIGURATION1) which can enable SSC feature on DPLL_VIDEO1 as below. On the other hand, it is noted that "SSC feature is not supported." Customer would like to know that they can use SSC feature on DPLL_VIDEO1 by enabling "PLL_SSC_CONFIGURATION1[EN_SSC]" register. How it would work when EN_SSC is enabled? + +Responses: +Hi Lloyd, SSC was not tested for one reason or another. Your customer may try it and use it if everything is fine, but TI will not be able to support them. Regards, Stan + diff --git a/data2/text/range/0-5000/605559.txt b/data2/text/range/0-5000/605559.txt new file mode 100644 index 0000000000000000000000000000000000000000..46983799ac297cb93f537a276aeee721ad78c2bf --- /dev/null +++ b/data2/text/range/0-5000/605559.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/DRA744: RGMII-ID ( Internal delay) setting.... + +Query Text: +Part Number: DRA744 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi , I use the RGMII interface connect with Marvell Ethernet SW (88E6390). I set RGMII delay setting enable ( rgmii-id ) but it seems not work. Below is my device setting... &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; fixed-link = <1 1000 0 0>; }; How to ensure the RGMII-ID enable setting is correct? + +Responses: +Hi Shawn, which is the version of your SDK/Linux kernel? Regards, Yordan + +GLSDK 7.04.03. Linux dra7xx-evm 3.14.63 + +Hi Shawn, I have forwarded your question to an ethernet expert. Regards, Yordan + +Shawn, Till Linux Ethernet expert helps you, can you please refer to http://www.ti.com/lit/an/snla243/snla243.pdf for RGMII delay settings? + +I find the RGMII features that only SR2.0 can enable or disable internal TXC delay. and I got the Chip Revision by dev2mem command 0x1B99002F --> SR 1.1 Is that mean i can not use RGMII-ID setting???? + +The RGMII-ID is not supported on SR1.1. The internal TXC delays are always enabled on this and remote side/PHY needs to take care of not reapplying the delay for Rx lines as TDA2 has already applied it. + +TXC delay is always enable..but it still have no delay on by board Below image is J6 RGMII TXC and TXD0 and do not connect anything. + +Could you check DRA7x Ethernet statistics registers? Is there any error bits set? Also check on PHY side too if any align/CRC issues. + diff --git a/data2/text/range/0-5000/608451.txt b/data2/text/range/0-5000/608451.txt new file mode 100644 index 0000000000000000000000000000000000000000..f974794188cf30a9047d9b8e17da00e962f9eff8 --- /dev/null +++ b/data2/text/range/0-5000/608451.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2x (ADAS) Ethernet problems + +Query Text: +Other Parts Discussed in Thread: TDA2 Dear support, I am trying to get Ethernet working on a TDA2 SoC with a DP83848Q PHY. I have reuesed the Ethernet driver from the VISION_SDK_02_08_00_00; I think this driver should run on the Vayu board. On my board I got receive and transmit working with this driver, but I have noticed that there are packets lost on both directions (receice and transmit). On my board only D0 and D1 is connected for transmit and receive to the DP83848Q. The connection is direct with a 22Ohms series resistor and not with a multiplexer in between as on the Vayu board. For the TDA2 SoC I have reused the pad configuration from the SDK. I have verified the 50MHz clock for the DP83848Q and TDA2 (RMII0_MHZ_50_CLK) is fine, the reset and power supply of DP83848Q is stable. Do you have any idea what I could try or what could cause the packet loss on my setup? For testing I would like to try to set the PHY to loopback mode; How do we have to setup the GMACSW_Config structure to enable the loopback mode in PHY? Best regards, Erwin + +Responses: +Hi Erwin, First, do you have all connections in place described in TRM Figure 24-178. RMII Interface Typical Application? Also, did you setup the CPSW for RMII mode? And did you check the PHY is discoverable via MDIO? Regards, Stan + +Hi Stan, Yes, all the connections are there; RMII mode is setup and the PHY is discoverable. When connecting with a PC via crossed over cable the link will be established. Data transfer works in both direction, but packets are lost in both direction. Best regards, Erwin + +Ok, can you post your strap pins configuration defined in PHY datasheet, 3.8 Strap Options? You said you use a crossed-over cable. Did you try with straight cable? Both should be ok, but just in case. '22-ohm termination' Where did this requirement came from? I could find 50-ohm recommendation in the datasheet. But first you may want to capture the waveforms and compare them vs. . Section 7 RMII Interface Timing Requirements. Regards, Stan + diff --git a/data2/text/range/0-5000/611062.txt b/data2/text/range/0-5000/611062.txt new file mode 100644 index 0000000000000000000000000000000000000000..e09b4d922ee4e255f44f1f84c85fa8d9bf4c1c2f --- /dev/null +++ b/data2/text/range/0-5000/611062.txt @@ -0,0 +1,10 @@ +Ticket Name: time measurement for each frame in EVE + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello, I have to integrate EVE Sparse optical flow into our project in TDA2. I ran the sparse optical flow test bench. Test video has 5 frames. In the console, i get the TSC cycle and SCTM VCOP BUSY cycles at every frame. I would like to calculate the time consuming to perform the optical flow in every frame. Can you please tell me to compute the time for each frame. Jagan + +Responses: +Hi Jagan, I have forwarded your question to the EVE experts to comment. Regards, Yordan + +Hi Jagan, Once you have the TSC cycles per frame ( in terms of VCOP cycles) you can convert it to time by just dividing the cycles by the frequency at which EVE (VCOP) is running ( typically this value is 500MHz). Regards, Anshu + diff --git a/data2/text/range/0-5000/614776.txt b/data2/text/range/0-5000/614776.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a6a7ef07d8a477c4be73852eb1b91b7e2f6bbb6 --- /dev/null +++ b/data2/text/range/0-5000/614776.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: OpenVX + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 What accelerator does the OpenVX implementation supports? I know that your demos won’t be moved over to OpenVX but how stable is the OpenVX implementation if we wanted to implement our algorithms with OpenVX for the TDA2 family? + +Responses: +Aaron, Thanks for your questions. 1. Supported targets: As of today, all of the OpenVX kernels are implemented on C66 DSPs, so they are certainly supported as available targets. Connectivity to user kernels on EVE target has been verified using a TI extension "Harris Corners" kernel. And the ARM M4s and A15s are also supported targets. 2. OpenVX is currently in beta for TDA2x family. What we mean by this is that it passes the OpenVX conformance tests, as well as additional robustness tests, but it hasn't been internally tested in non-trivial algorithm demos/applications yet. We intend to do this internally by the time we make our end of year release, and in the mean time we also intend to continue to add features (such as graph pipelining) and support bug fixes on TDA2x platform. Algorithms which could benefit from graph pipelining will function, but not as optimally as will be the case when graph pipelinining is supported. Adding custom kernels can be done by following the pattern from existing OpenVX kernels, and one of the tutorials shows how to do this. We are also planning on adding scripts and specific app notes for this in the next few months which facilitate this effort. Please let me know if you have any more questions. Jesse + diff --git a/data2/text/range/0-5000/614777.txt b/data2/text/range/0-5000/614777.txt new file mode 100644 index 0000000000000000000000000000000000000000..0310f13e3e29b1f818b8c9cef98e4687aeb97c7a --- /dev/null +++ b/data2/text/range/0-5000/614777.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: Vulcan support + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Does the GPU on the TDA2 support the Vulcan API? + +Responses: +Hello Aaron Seibold , The TDA2x GPU is SGX544 core. On the 3rd party support page this core is listed as "not supported". Furthermore, this 3rd party API is also not listed as supported in the TRM. Here is what's supported officially: – OpenGL® - ES 1.1 and 2.0 – OpenCL™-EP 1.1 – Direct3D® Feature Level 9.3 Thanks, Alex + diff --git a/data2/text/range/0-5000/615108.txt b/data2/text/range/0-5000/615108.txt new file mode 100644 index 0000000000000000000000000000000000000000..6a29cdceba260eabb77d9359bbabb68e281e2083 --- /dev/null +++ b/data2/text/range/0-5000/615108.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: Number of GFLOPS , DLOPS? How to calculate the computing power of TDA2x + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, 66AK2H12, Hi TI Experts, 1. We have some ADAS customers asking about the computing power of TDA2 series SoCs. I cannot find an official document listing the computing power of TDA2x in GFLOPS/ TFLOPS from TI, Where can we find or how to calculate that number? The ADAS application requires the use of deep learning algorithms, in comparison, we get to know that Mobile Eye says that the EyeQ3 delivers ~300 GFLOPS, while EyeQ4 push that number to 2.5 TFLOPS. On TI DSP overview page http://www.ti.com/processors/dsp/overview.html, I find this information, saying that the TI C66x DSP core delivers 32 GMACs and 16 GFLOPS per core at 1 GHz. And, I find the efficiency of ARM Cortex-A15 is around 6.9FLOPS/GHz/Core (https://devtalk.nvidia.com/default/topic/813318/jetson-tk1/flops-for-jetson-host/ ), So, I did the math for 66AK2H12(4* ARM Cortex-A15@1.4GHz，8* C66x @1.2GHz), the total computing power should be around 4*1.4 GHz * 6.9 GFLOPS/GHz + 8*1.2 GHz * 16 GFLOPS/GHz = 38GFLOPS + 153.6GFLOPS = 191.6 GFLOPS, which is quite close to the 200GFLOPS on the TI DSP overview page. In the very same way, we can calculate the GFLOPS of TDA2SX(2* ARM Cortex-A15@1.176GHz，2* C66x @0.75GHz ) it's 2*1.176 GHz*6.9 GFLOPS/GHz + 2*0.75 GHz*16 GFLOPS/GHz = 16+24 =40 GFLOPS In the meanwhile, I found a video from youtube (www.youtube.com/watch saying that the computing power of TDA2 is 266 Giga DLOPs 2. Can you explain what DLOPs(I'm guessing "Deep Learning Operations" ) means? what its relationship with FLOPS? 3. Since the EyeQx uses MIPS CPUs, which has a comparable efficiency to ARM Cortex-A CPU, I doubt that a 3 Watt Soc will deliver 300 GFLOPS or even 2.5 TFLOPS, while TI TDA2x only delivers 40 GFLOPS... So, Is that in deep learning field, people define FLOPS differently? I found people discussing that in deep learning algorithms, only half-precision floating point operation is needed, but regularly, when people talk about FLOPS, they mean single-precision floating point(see https://teslamotorsclub.com/tmc/threads/ap2-0-cameras-capabilities-and-limitations.86430/page-20 #396). + +Responses: +Hi Nestor, I have forwarded your question to Deep Learning experts. Regards, Yordan + +Hi Yordan, Is there any feedback? Thanks. + +Hi Yordan, Can you help to ask the Deep Learning experts for progress? Thanks. + +Hi Nestor, sorry for the delay, I will ping them. Regards, Yordan + +Hi Nestor, Let me first define the terminology (at least used by me in my response) FLOPS: Single precision Floating point operations MAC: Multiply + Accumulate operation. 1 MAC is equivalent to 2 operations DLOPS: In Deep learning, as you said half float or even 8-bit fixed point data type is sufficient. So in the above slide DLOPS refers to 8-bit arithmetic or conditional operation (Multiply/Add/Compare). So you can assume 1 MAC = 2 DLOPS Many researchers have suggested that 8-bit or 16-bit fixed point data type is suffice for deep learning and TI also believe that so I will focus on GMAC (or DLOPS now) in regard to the above slide TDA2x (Theoretical performance) for 8-bit or 16-bit fixed point data type 2x C6x DSP @ 1000 GHz = 2*32 GMACS = 64 GMACS 4xEVE @900 MHz = 4*16*900 MMACS = 57.6 GMACS 2xA15 @1800 MHz = 2* 8 * 1800 MMACS = 28.8 GMACS Total = 150.4 GMACs = 300 GDLOPS Now the actual throughput depends a lot on network structure, so I will not be able to comment on a single number. The slide referred by you mentions the performance of a semantic segmentation application using deep learning network. IN this we use only 4xEVE cores and that’s why the power consumption is 2.5 W!!! Now the question remains open is that the theoretical best of 4xEVE is 57.6 GMAC (115.2 GDLOPS) then how could 266 GDLOPS are achieved. And here also the point is the network property. If you look at the network and count the DLOPS, it is 266 GDLOPS but the TI Deep learning library identifies some redundant operations and avoids performing them and that’s why it can run a complex network having 266 GDLOPS on 4xEVE. Hope this clarifies… Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/616139.txt b/data2/text/range/0-5000/616139.txt new file mode 100644 index 0000000000000000000000000000000000000000..93059f15dd8b5e0c2a4b9024e0d343da99126fbf --- /dev/null +++ b/data2/text/range/0-5000/616139.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: Latest Linux Kernel available? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello! I've got a problem using linux on DRA7xxx (XC5777X Board): The "remoteproc" is not usable in SDK "Vision_SDK_2_12_02_00". The Kernel used in this SDK is a special patched linux-4.4.45 without generating the "sys/class/remoteproc" - control stuff! The mainline Kernel 4.13.0 is far away from the kernel used in the SDK, so backporting will not be as easy... but remoteproc is fully integrated. (Without any kind of TDA2 ipu or dsp support...? At least I can not not find any usable dts-file, or any supporting code... ) Do you have a newer linux kernel than 4.4 dealing with TDA2 subcores and fully suppored remoteproc? I have to work with M4 and DSP in TDA2 bare metal, so controlling the subcores with remoteproc (start, stop, etc...) is needed. Thank you... Marco. + +Responses: +The solution: patchwork.kernel.org/.../ + +Hi Marco, it's great you solved the issue and thanks for sharing the solution. Regards, Yordan + diff --git a/data2/text/range/0-5000/617712.txt b/data2/text/range/0-5000/617712.txt new file mode 100644 index 0000000000000000000000000000000000000000..0f40530ad36df3c66ee48c5f64704a91acad93e2 --- /dev/null +++ b/data2/text/range/0-5000/617712.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: How to build ELF firmware working with remoteproc using GNU tools? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello *! I'm using the XC5777x Board with TDA2 Processor. Now I have to realize a baseline concept which fullfill the following requirements: A15 Core runs Linux and wil be the "Master" of the system. (This is works great!) All other cores have to be programmed "real bare metal", which means: no proprietary tools. No TI-Compiler, BIOS, RTOS... But I am not able to create any kind of working "ELF" file, which will be loaded and started successfully by remoteproc (Linux). All I got is "write error: Cannot allocate memory". This points to the kernel driver of remoteproc and crahes, if the section ".resource_table" can not be found or is empty, filled with garbish... ? But I can see such a section using "readelf"... But it do not work at all. I can put this section whereever I want... no success at all. I used some linker script and header-files from visual_sdk to generate such a section... but withous success. The linux runs well, because a "Prebuild" (!!) example, without sourcecode... works fine! (messageq_single.xem4) Do anybody ever build a firmware successfully for C66x and M4 subcore which works fine using remoteproc? Please help me out with an example of how it work. (Linker .lds file, header files, simple main.c, startup code (*.asm), Makefile... using GCC... no CCS, no SDK, please...) Thank you: Marco + +Responses: +I've notified the sw team. Their feedback will be posted here. Best Regards, Yordan + +Ok.. Thank you very much. Additional informations can be found HERE: e2e.ti.com/.../2288499 TNX - Marco + diff --git a/data2/text/range/0-5000/623418.txt b/data2/text/range/0-5000/623418.txt new file mode 100644 index 0000000000000000000000000000000000000000..cb832ad2000115a1095136a0abd99ba792464b8f --- /dev/null +++ b/data2/text/range/0-5000/623418.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: phy is often automatically disconnected and soon connected automatically + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi all, I'm now running networktx demo to test network function with a TDA2x EVB(Vayu).But I find a problem that phy is often automatically disconnected and soon connected automatically. My VisionSDK version is 2.9.1.0. And I use BIOS only on all cores. Here's the log. [IPU1-0] 9550.666564 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-0] 9917.376166 s: NDK: Link Status: No Link on PHY 2 [IPU1-0] 9920.269718 s: send failed (55) [IPU1-0] 9920.303086 s: send failed (55) [IPU1-0] 9920.369700 s: send failed (55) [IPU1-0] 9920.403068 s: send failed (55) [IPU1-0] 9920.436344 s: send failed (55) [IPU1-0] 9920.503050 s: send failed (55) [IPU1-0] 9920.536326 s: send failed (55) [IPU1-0] 9920.569663 s: send failed (55) [IPU1-0] 9920.636308 s: send failed (55) [IPU1-0] 9920.669615 s: send failed (55) [IPU1-0] 9920.703013 s: send failed (55) [IPU1-0] 9920.769596 s: send failed (55) [IPU1-0] 9920.802964 s: send failed (55) [IPU1-0] 9920.836271 s: send failed (55) [IPU1-0] 9920.902946 s: send failed (55) [IPU1-0] 9920.936283 s: send failed (55) [IPU1-0] 9920.969560 s: send failed (55) [IPU1-0] 9921.036234 s: send failed (55) [IPU1-0] 9921.069511 s: send failed (55) [IPU1-0] 9921.102909 s: send failed (55) [IPU1-0] 9921.169493 s: send failed (55) [IPU1-0] 9921.176569 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-0] 9978.377844 s: NDK: Link Status: No Link on PHY 2 [IPU1-0] 9981.221069 s: send failed (55) [IPU1-0] 9981.254346 s: send failed (55) [IPU1-0] 9981.321051 s: send failed (55) [IPU1-0] 9981.354328 s: send failed (55) [IPU1-0] 9981.387695 s: send failed (55) [IPU1-0] 9981.454279 s: send failed (55) [IPU1-0] 9981.487677 s: send failed (55) [IPU1-0] 9981.521106 s: send failed (55) [IPU1-0] 9981.587628 s: send failed (55) [IPU1-0] 9981.621088 s: send failed (55) [IPU1-0] 9981.654242 s: send failed (55) [IPU1-0] 9981.721100 s: send failed (55) [IPU1-0] 9981.754224 s: send failed (55) [IPU1-0] 9981.787592 s: send failed (55) [IPU1-0] 9981.854175 s: send failed (55) [IPU1-0] 9981.887573 s: send failed (55) [IPU1-0] 9981.921094 s: send failed (55) [IPU1-0] 9981.987525 s: send failed (55) [IPU1-0] 9982.021045 s: send failed (55) [IPU1-0] 9982.054138 s: send failed (55) [IPU1-0] 9982.120996 s: send failed (55) [IPU1-0] 9982.154120 s: send failed (55) [IPU1-0] 9982.178185 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-0] 10012.478740 s: NDK: Link Status: No Link on PHY 2 [IPU1-0] 10015.745684 s: send failed (55) [IPU1-0] 10015.779906 s: send failed (55) [IPU1-0] 10015.812389 s: send failed (55) [IPU1-0] 10015.879887 s: send failed (55) [IPU1-0] 10015.912249 s: send failed (55) [IPU1-0] 10015.945647 s: send failed (55) [IPU1-0] 10016.012230 s: send failed (55) [IPU1-0] 10016.045598 s: send failed (55) [IPU1-0] 10016.079942 s: send failed (55) [IPU1-0] 10016.145580 s: send failed (55) [IPU1-0] 10016.180015 s: send failed (55) [IPU1-0] 10016.212194 s: send failed (55) [IPU1-0] 10016.279448 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-0] 10287.886201 s: NDK: Link Status: No Link on PHY 2 [IPU1-0] 10290.643018 s: send failed (55) [IPU1-0] 10290.676325 s: send failed (55) [IPU1-0] 10290.742969 s: send failed (55) [IPU1-0] 10290.776276 s: send failed (55) [IPU1-0] 10290.809613 s: send failed (55) [IPU1-0] 10290.876227 s: send failed (55) [IPU1-0] 10290.909595 s: send failed (55) Thanks. + +Responses: +Hi, I have forwarded your question to networking experts. Regards, Yordan + +Hello, What is Vayu EVM revision you working on? Also kindly share TDA2 silicon revision. Some of TDA2 EVM revisions has known stability issues with 1000Mbps link. You can try connecting 100Mbps connection and see if you see same behavior. + +Hi，Prasad. Vayu EVM revision is 2.0.I did some test yesterday, and we have some of the findings. That's what happens when I connect this EVM to the router, and when I get to the LAN, the problem doesn't show up + diff --git a/data2/text/range/0-5000/627217.txt b/data2/text/range/0-5000/627217.txt new file mode 100644 index 0000000000000000000000000000000000000000..146bff269ca8bf09feab718f1e63348bece589e6 --- /dev/null +++ b/data2/text/range/0-5000/627217.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: Object Detection Algorithm + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I have got tda2 application board and run the sample code. It's work. My question is if I want to change the algorithm of Object Detection where should I edit. I find the file path C:\PROCESSOR_SDK_VISION_03_00_00_00\ti_components\algorithms\REL.200.V.OD.C66X.00.06.00.00\200.V.OD.C66X.00.06\common under this path I don't know which one should I edit if I want to change the algorithm of Object Detection The sample code's structure is too big to understand. Can anyone help me thanks Best Regards Andy + +Responses: +Hi, Andy Dong, Expert was notified about your question. Regards, Mariya + +Andy The source code of the Algorithms are not included in the VSDK release package. only the lib (binary) version is included please contact your respective TI sales or field support to get the Algo in source format regards, Shiju + +Hi, Shiju I install REL.200.V.OD.C66X.00.06.00.00.exe and then the documents are the same as in the path C:\PROCESSOR_SDK_VISION_03_00_00_00\ti_components\...\REL.200.V.OD.C66X.00.06.00.00 . This ( PROCESSOR_SDK_VISION_03_00_00_00 ) package , I download from Ti's website. so where can I edit the algorithm of Object Detection Thanks a lot. Regards, Andy + +HI Andy, This is public forum of TI and since TI has not released the source as part of public release of vision SDK, we will not be able to help you here. There are private forums for the users of the algorithm source code and you should be asking this question in private forum. Please talk to respective TI sales or field support engineer of your region to assist you. Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/628330.txt b/data2/text/range/0-5000/628330.txt new file mode 100644 index 0000000000000000000000000000000000000000..2de068c9226b5714815eb510982897c46794c4e3 --- /dev/null +++ b/data2/text/range/0-5000/628330.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2/TDA3: Is there any Power Consumption Spreadsheet for TDA2x and TDA3x processors? + +Query Text: +I need to find a suitable processor for a new project and I need to know their power consumption info. But I cannot find anything tells me about it, can anyone help? + +Responses: +Hi, I have forwarded your question to a power expert for comment. Regards, Yordan + +Same question for me... + +Hello I would be interested in power figures in srandard kind of benchmarks (idel, video encode/decode, audio processing, GFX benchmark). Whom should I contact ? Thanks + diff --git a/data2/text/range/0-5000/630117.txt b/data2/text/range/0-5000/630117.txt new file mode 100644 index 0000000000000000000000000000000000000000..660b79f2c447db1080a628026aa11a95069c7919 --- /dev/null +++ b/data2/text/range/0-5000/630117.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2HV: TDA2HVBRQABCRQ1 Sleep mode/ Power down mode + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hi Support Team, We are used TDA2HVBRQABCRQ1 TI TDA2HV processor in our one of the automotive product. But we facing the issue that if we want to run up our system on sleep mode or power down mode to reduce the boot up time and use of battery . which pin are available in this TDA2HVBRQABCRQ1 part. Please provide any reference for that. Hope positive response from you + +Responses: +Hi Dhaval, Can you please tell a little more about your use case? For example when (e.g. ignition at MAR but car not started, etc.) you would like to put TDA2 in sleep mode, for how long time, etc.? Unfortunately there is no magic pin to put TDA2 in sleep (I wish it had) . It is a combination of software and hardware (SoC, PMIC, DDR) to enable low-power modes. Regards, Stan + +Hi, DHAVAL SHAH, I am not quite sure what kind of issue you are facing? Please, specify. Also, what kind of pins you are trying to locate? Regards, Mariya + +Hi Stan, Thanks For you valuable reply. Actually we want to give facilities in our hardware. So we want to know how it will be implement in hardware side, software side guys are at definition stage. As our discussion you said that It is a combination of software and hardware (SoC, PMIC, DDR) to enable low-power modes. In PMIC there is PMIC_SLEEP# Pin which help full to run the PMIC in sleep mode but What we do on TDA2X side & DDR3 side to run the processor in low power mode /sleep mode? Best Regards Dhaval Shah + +Hi Mariya, Thanks For your reply Actually we want to give facilities in our hardware. So we want to know how it will be implement in hardware side, Software side guys are at definition stage. Best Regards Dhaval Shah + +Hi Dhaval, Since I didn't knew your exact PMIC part number, I took a random PMIC. The SLEEP pin may be on another position than this one. I've highlighted the pins you need to put the SoC in RTC mode (lowest possible). RTC mode is defined as everything but RTC domain is off. DDR can be in self-refresh ( this must be double checked though) . One can exit RTC power mode through a RTC alarm or an WAKEUP pin transition. Note that it is possible to wake up through DCAN RX pin i.e. upon a CAN bus activity. I.e. DCAN RX pin is muxed with an WAKEUP pin internally. Regards, Stan + diff --git a/data2/text/range/0-5000/632418.txt b/data2/text/range/0-5000/632418.txt new file mode 100644 index 0000000000000000000000000000000000000000..5464be67119f6ea9633d96c72b8432cc511588e7 --- /dev/null +++ b/data2/text/range/0-5000/632418.txt @@ -0,0 +1,16 @@ +Ticket Name: Please anybody suggestion best algorithm to detect the algorithm like only Pedestrians, Vehicles, Traffic Signs + +Query Text: +Hi , Please anybody suggestion or link to best way detect the algorithm like only Pedestrians, Vehicles, Traffic Signs . Regards , Sunil + +Responses: +Hello Sunil, Can you provide some additional detail on this request, please? Is this a vehicle-mounted sensor? One sensor or multiple sensors? What type of sensor? Any additional information you can provide will be very helpful to determine a solution. At your service, ~Leonard + +Hello Sunil, you can run your algorithms very efficiently in terms of computational performance and in respect to power on TDA2x and TDA3x device families. Please check https://e2e.ti.com/blogs_/b/behind_the_wheel/archive/2017/01/05/tda-adas-solutions-enable-a-safer-driver-experience + +Its vehicle mounted sensor ( camera ) , type of sensor is camera .. we mounted camera in car bumper for forward collision warning . presently we are using open cv to find pedestrian , vehicles Using C++ ..I am curious about best algorithm suitable for above case using C in TDA2x + +Hi Sunil, you can check here: \ti_components\algorithms\REL.200.V.OD.C66X.00.06.00.00\200.V.OD.C66X.00.06 to find object detection module for DSP. In the subdirectories you can find documentation and test examples. Regards, Yordan + +Thank You Yordan + diff --git a/data2/text/range/0-5000/635984.txt b/data2/text/range/0-5000/635984.txt new file mode 100644 index 0000000000000000000000000000000000000000..cdc3a2ecfdb9c54edb54ffd2a7677eb1dafd6be0 --- /dev/null +++ b/data2/text/range/0-5000/635984.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: Vision SDK usecase code tracing + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, I'm new to the vision SDK,and now i use the version 3_01. I built the usecase and see the demo on my TDA2. Then I try to understand the usecase by tracing the source code of it inside the usecase folder. I trace to the algPlugin.c file and see the process function as below. \PROCESSOR_SDK_VISION_03_01_00_00\vision_sdk\apps\src\rtos\alg_plugins\tidl\tidlLink_algPlugin and then i try to find the algorithm but finally i find this: \PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.00\common\ivision.h It seems like most of the algorithm of the usecase link to here. Where is the algorithm?Is it available?is it packed to another format? and is my question related to the key word - Xdais ? I have already read some documents inside the Vision SDK. The doc i read only mention that we need to build our own algorithm link and plugin function,but i don't kown what should i do clearly. If i want to build my own algorithm,is there any doc or example ? If anyone know the answer,please share with me. Thank you! + +Responses: +Hi Jimmy, Algorithms source is not released in Vision SDK. They are available in the library form. Please contact your local TI FAE to help you. Rgds, Brijesh + +Hello Brijesh, thank you for your answer. i want to know where is the library file ? is it inside the algorithm of the TIDL?(\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.00\modules\ti_dl\lib\eve\debug\) Can you give me more information about how to connect our algorithm with the process as above? and what is the xdais?is it necessary? thank you! Regards, Jimmy Lai + +HiJimmy, In this case, i think you could add your own algorithm link and then use it in the usecase. These algorithms are based on the xdais framework, so if you just replace function, it may not work. Rgds, Brijesh + +Hi Brijesh, so i can directly code my algorithm inside a algorithm link plugin.c file without xdais,right? Regards, Jimmy Lai + +Hi Jimmy, Ideally, it is preferable to create your own Alg Plugin link and use it. But for the time being, you could code your algo in one of the existing plugin link, will not require xdais. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/636472.txt b/data2/text/range/0-5000/636472.txt new file mode 100644 index 0000000000000000000000000000000000000000..047545982a40b6817ca7036d9f2fc89e0100664f --- /dev/null +++ b/data2/text/range/0-5000/636472.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: Where can I find documentation about the Device Security Features? + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2, Hello, I actually want to use the TDA2+, but the answer might be the same as for TDA2HG.(I was not able to select TDA2+ in the "Part Number" field.) Where can I find documentation about the device security features? I want to make sure that we can protect our software: Software will be stored encrypted in external eMMC Flash and will be loaded by the bootloader. Is there a way to store a key inside the SOC. I read "Secure ROM and boot" in the Data Sheet. But there is no further information about that. Best regards, Michael. + +Responses: +Hi, Michael K, For security documents are under NDA, and you should contact your local TI representative to get it. Regards, Mariya + diff --git a/data2/text/range/0-5000/639528.txt b/data2/text/range/0-5000/639528.txt new file mode 100644 index 0000000000000000000000000000000000000000..75906513946a09ff7b734541c9e7c447dd7d8aa5 --- /dev/null +++ b/data2/text/range/0-5000/639528.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: Adaboost object detection training tool + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, everyone I saw Adaboost object detection training tool (Matlab based) is publicly available at https://github.com/tidsp/acf-jacinto And I download the Adaboost object detection training tool I have some questions 1. the training data's format should be .vbb .mp4 .seq ? Is .jpeg ( picture's format ) ok ? 2. What kind of file will be created if I use training tool to train the model ? (.xml or .bin or .....?) 3. If I want to use this file in TDA2 , where should I put ? Thanks Regards, Andy + +Responses: +Hi Andy, I have forwarded your question to an expert for comment. Regards, Yordan + +Hi Yordan, Is there any reply? Thanks! Regards, Andy + +You need to provide both images and annotations. 1. The tool currently takes in .seq or .mp4 files for images. (It should be possible to modify the code to be able to specify a folder containing images instead of .seq or .mp4) 2. Annotation format supported is .vbb You can fiund lots of .seq files (with the corresponding .vbb annotations) here. http://www.vision.caltech.edu/Image_Datasets/CaltechPedestrians/ An annotations/labelling code (matlab based) is also available in the above link. An enhanced version of the same labeling tool (supporting annotation of .mp4 files) is also provided here: https://github.com/tidsp/acf-jacinto/blob/master/vbb/vbbLabeler.m Note - you don't have to annotate all the frames. acf-jacinto is intelligent to understand which are the annotated frames and use only those for training. This feature is especially useful when dealing with .mp4 videos. After you do the training a .descriptor file will be written out. You can use this file in TDA2 VisionSDK Object Detection module. You can get more details in the documentation for the Object Detection module. Best regards, + +HI Andy, Manu answered q1 and q2. Regarding your 3rd question, there is a utility to convert from the descriptor format to a a binary file which can be understand by OD module, The utility is unfortunately not packaged as part of object detection module, but let me see how can I get you access to the utility. Thanks, with Regards, Pramod + diff --git a/data2/text/range/0-5000/639885.txt b/data2/text/range/0-5000/639885.txt new file mode 100644 index 0000000000000000000000000000000000000000..246df8a346753e65f354d264f61bbbdc04b9adea --- /dev/null +++ b/data2/text/range/0-5000/639885.txt @@ -0,0 +1,18 @@ +Ticket Name: Compiler/TDA2EVM5777: How to bring up C6xx on TDA2 outside SDK using remoteproc + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hello *! I need to bring up the DSPs of the TDA2 using firmware mechanism of linux (remoteproc) outside the SDK, without using CCS and SYS/BIOS/RTOS. What Do I need and where do I find it in the visual-sdk provided by TI? (Of course, the cl6x will be needed to build the ELF, a custom mapping table for the remoteproc, something like a "startup code" setting IRQ-vector-table and jump to "main" of the C-Code... ) Are there any example available? + +Responses: +Hi Marco, I have forwarded your question to an expert for comment. Regards, Yordan + +You can find information on remoteproc here: lwn.net/.../ The image needs to have a resource table for remoteproc to load the DSP ELF image. For example images that use SYS/BIOS and load with remoteproc, you can check the IPC3.x code: gitorious.ti.com/.../ipcdev processors.wiki.ti.com/.../IPC_Users_Guide You might find this other similar e2e query useful as well e2e.ti.com/.../948787 Thanks, Angela + +Hello Angela, Thank you for the links, but this is not exactly what I need to getting started. A few weeks ago I took the things I thought I need to bring up the DSP: The resource table have almost been linked into the ELF file, I took the "interrupt.c" and "intvecs.asm" as something like a "startup code" and I wrote a very simple "main.c" containing a counting infinity loop... At a first look, there is no reason why it shouldn't work, but all I got is a "MMU fault" from the DSPs MMU. I think, the L3-preparation of the carveout memory works, but the stuff I took off the "visual SDK" is not adapted correctly and until now I try to find, what I did wrong. So I need help, but all I get in Forum or my FAE at TI are links to "IPCxxx" and I can't believe that there is no very simple example available, which do not use SYS/BIOS, RTOS-fragments... complex build environments to use dozens of SOCs over XDC... most code is designed to run without MMU... and of course the CL6X toolchain is very powerful, a lot of possibility... and, again: No idea what went wrong. So I need help to bring up the DSP realy bare metal, using only the TI toolchain and remoteproc. INTENTIONS: The requirements of my use-case are embedded in the need of very safe code (DSP, IPU and EVE - Linux only used a comfortable gateway...). So I have to implement only code, which is really needed. A universal BIOS or Bootloader in the DSPs and Subcores is forbidden. I did this for IPU successfully, but now I cut my teeth doing the same with the DSP... so I need help... urgently. Thank you for your dedication: Marco + +Hi Marco, you can also check this E2E thread with discussion of similar topic: e2e.ti.com/.../640064 Regards, Yordan + +Hi Yordan... *LOL* It's a little bit funny: Needhu is my "direct" contact at TI ;-) + +PROBLEM SOLVED: After reviewing the whole code without finding any kind of mistakes, I took a look to the CALL of the CL6X and its linker-options: I read the ELF with readelf -a and saw, that the ENTRY-POINT points to symbol which don't make sense. I'm wondering about the decision of the CL6X setting this address... so I read the manual again: downloads.ti.com/.../linker_description.html I can set the entry point manually: --entry_point=... and the code I took out of the SDK, the DSP have to jump into "_vector0" to boot. This solved the problem, the DSP boot. + diff --git a/data2/text/range/0-5000/644760.txt b/data2/text/range/0-5000/644760.txt new file mode 100644 index 0000000000000000000000000000000000000000..4f9f4b12f541a85072c1c107bb9a2a38422cec56 --- /dev/null +++ b/data2/text/range/0-5000/644760.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux: Do we have support of HDMI on "Linux+ Bios" with TDA2XX SOC?. + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi There, I am using "VSDK_03_01_00_00" version of "VSDK" with TDA2XX SOC and able to build "VSDK" successfully for "Linux + Bios" platform . After that I have tried to execute below mentioned use case. "NullSrc + Decode + Display". For executing this use case I have followed below mentioned steps. 1. I did some configuration for Display and Capture by using "Setting" option(S) (Here I have selected "HDMI 1080P60 for Capture" and "HDMI 1080P60 for Display"). 2. Ran the "NullSrc + Decode + Display" use case and used the "H.264 " codec. 3. During the execution of use case I got "ASSERT (nullSrcLink_tsk.c|NullSrcLink_fillData|202)" on the console. I read somewhere that "Linux+ Bios" doesn't have HDMI" support and I am not sure is this the case with Linux build. Could someone please give clarification on this?. Regards, Anshul Jain. + +Responses: +Hi Anshul, the Linux version of VisionSDK supports HDMI (also in ver 3.01 was added support for LCD). Your problem looks more like issue with reading the input file. I have pinged VisonSDK experts to help. Regards, Yordan + +Yes, Yordan is correct. VSDK_03_01_00_00 support HDMI display for both "Bios only" and "Linux + Bios" builds. HDMI capture is not supported in VSDK Linux+Bios, and this feature is available only with Bios only version regards, Shiju + +Hi Shiju, Thank you for your response. As you have confirmed that HDMI capture is not supported in VSDK Linux+Bios. So in the same environment, can we have a input from "AVB" port and see the output on HDMI display. Regards, Anshul Jain. + +Anshual Yes, AVB capture and HDMI display is supported on VSDK Linux+Bios. please refer Linux user guide to build binaries and set-up for AVB regards, Shiju + +Hi Shiju, Thanks for the inputs. Regards, Anshul Jain. + +Hi Shiju, wanted to check, if HDMI supported on "TDA3x " and "TDA2+" soc with Linux+Bios config on VSDK_03_01_00_00? Thanks, Mohammed + +Hi No HDMI capture is not supported with vision SDK Linux (Linux+Bios) on any TDAxx. HDMI caprure is supported on TDA3x and TDA2x with VSDK Bios only cnfig. This is available with VSDK_03_01_00_00. for TDA2+, HDMI capture will be supported in next VSDK release version VSDK_03_02_00_00 regards, Shiju + +Thanks Shiju, it helps. regards, Mohammed + diff --git a/data2/text/range/0-5000/649911.txt b/data2/text/range/0-5000/649911.txt new file mode 100644 index 0000000000000000000000000000000000000000..402f228bf7eea35023555365077469fea9f38812 --- /dev/null +++ b/data2/text/range/0-5000/649911.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: DESIGN FILE REQUEST TDA2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2EVM5777 Hello We're Planning To Use TDA2X For Our Next Vehicular Machine Vision EVS Project. And When We Try To Look Up TI Website For Design Files Find No Results At All. The DSN File Is Really Important For Hardware Engineer To Prevent Starting Project From Scratch. The Rough Manual Work To Build Symbol For Such A Complicated Device Will Be Possible To Make Mistakes. So I'm Here Writing My Problem To Ask For Relative Files. Basically We Need You To Do Following Favors: TDA2EVM5777 (Complete Schematics / Schematics / Schematics / Schematics / Schematics DSN File) + +Responses: +Hi Bright, Please check this link! There is a Design Files section under EVM page that you may also want to check. Thanks, Dian + +Hi Bright, Did you get what you want? I have same requirement as you. If you got it, could you tell me how to get it. Thanks, Seven + +Seven I Don't Think I Get Required Support For Wanted Files. In Fact Here Are Only Non-OrCAD File Upon Product Page And I Don't Know How To Transfer It Into What I Want Import To OrCAD. And Considering Software Support And Following Code Jobs Efforts We Have Move Our Project To Use NXP S32V In Stead Of TDA2X. So As You See I Don't Follow Up The Thread And Continue To Request The Files. Bright + diff --git a/data2/text/range/0-5000/650394.txt b/data2/text/range/0-5000/650394.txt new file mode 100644 index 0000000000000000000000000000000000000000..00446c71a670be97d70cb44361d5b5db3e940780 --- /dev/null +++ b/data2/text/range/0-5000/650394.txt @@ -0,0 +1,10 @@ +Ticket Name: AM5708: Video DPLL SSC support + +Query Text: +Part Number: AM5708 Other Parts Discussed in Thread: TDA2 Hi, My customer is working om AM5708 design and has done some EMC measurements and some radiated emission levels of the display interface are to high. He looked at the DPLL_VIDEO Registers and found in table 11-48 PLL_SSC_CONFIGURATION1 a reference to the SSC feature, with a note that the SSC feature is not supported. His questions: 1) Is this going to be supported in the future? 2) Is the feature available but not tested/supported? 3) can customer use this function? Thanks in advance, Best regards, Patrick ps: why is this non supported feature part of the documentation? (On e2e i found other references to this feature in TDA2 and DRA72X devices, but also not supported. quit confusing) + +Responses: +Hi Patrick, SSC feature is available, but not tested, thus not verified by TI. See the below e2e threads for more info: e2e.ti.com/.../565566 e2e.ti.com/.../1964650 e2e.ti.com/.../604515 e2e.ti.com/.../633615 Regards, Pavel + +Patrick Verkennis said: 1) Is this going to be supported in the future? I can not confirm. You should check in any new version of the AM57x documents regarding the status of SSC. Patrick Verkennis said: 2) Is the feature available but not tested/supported? Yes Patrick Verkennis said: 3) can customer use this function? The customer can use it, but at his own risk. The customer should fully test and validate that feature on his custom board. TI do not recommend that feature usage, if possible you should avoid it. Regards, Pavel + diff --git a/data2/text/range/0-5000/651208.txt b/data2/text/range/0-5000/651208.txt new file mode 100644 index 0000000000000000000000000000000000000000..67fe5ab37a4701006036e6c469c100f0db1a9263 --- /dev/null +++ b/data2/text/range/0-5000/651208.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2SX: VPE scale function + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS We use hardware VPE scale successfully on TDA2. We want to simulate VPE scale function on PC side. Do you have VPE scale function by C code. + +Responses: +Hi Joe, I have forwarded your question to an expert for comment. Regards, Yordan + +Unfortunately, no we don't have PC code for VPE. Please talk to your local FAE to see if there is any way. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/651568.txt b/data2/text/range/0-5000/651568.txt new file mode 100644 index 0000000000000000000000000000000000000000..2f6a753f57024746a7cd3f412eb0da17f4ee629a --- /dev/null +++ b/data2/text/range/0-5000/651568.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: TIDL algorithm + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hello, I am new to TDA2 also TIDL. I used caffe model and the model import tool to generate two .BIN files. How to use this two .BIN files to get the model output?? I found inside the TIDL/algo/ and TIDL/inc folders,there are a lot of layers definition. But it's huge and complex for me. Is there any example or resource about this part? If there is any useful information,please share with me. Thank you in advance. + +Responses: +Please refer the users guide for details on the importing a model and executing the same on device. Users guide is part of release package. We also have sample test bench (Part of TIDL release package) configuring the library. By default the sample stand alone test bench runs example model (net and params bin file from testvecs folder) and generates output. Refer these for more details. Thanks and Regards, kumar.D + +Hello Kumar, Thank you for your response. I have already read the user_guide for importing the model and success. also i can run the sample test bench, and get the ourput .bin files. but actually i didn't know how it works. how the test bench generate the .bin files and how i use my own files?? Thank you. + +Please refer the section "3.6 Running a Model trained by user" in the users guide to generate *.bin files from your own files. Thanks and Regrads, Kumar.D + diff --git a/data2/text/range/0-5000/653445.txt b/data2/text/range/0-5000/653445.txt new file mode 100644 index 0000000000000000000000000000000000000000..e5d8694b1fd212684d1c6901b004d8831e561d4a --- /dev/null +++ b/data2/text/range/0-5000/653445.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS/TDA2PXEVM: 2MP SV DEMO UG and HW information for TDA2PxEVM + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2, TIDA-01130 Tool/software: TI-RTOS Dear Champs, My customer want to evaluate 2MP SV DEMO using TDA2Px EVM and I found there is new update for this in VisionSDK3.02, but I could not find any UserGuide and details for this. I only find below in the Release notes and 'ProcessorSDK_Vision_IssSensor_TestMatrix.xls', but could not find any other details. Could you please let me know where I can find details for 2MP SV DEMO? And also could you please let me know HW configuration for 2MP SV DEMO? It seemed it was implemented on Fusion board. Is this right? Is it possible to run it on Vision board also? Is additional deserializer needed? Thanks and Best Regards, SI. + +Responses: +Hi SI, This demo is actually supported on Linux build and uses ISS drivers. It captures RAW images from the OV2775 or IMX390 sensors, uses ISS to convert RAW data into YUV and then it uses SGX to stitch the images. It uses fusion board to capture four camera input over CSI2 interface. There is a TIDA1130 module, which supports OV2775 sensor and D3 module, supporting IMX390 sensor. Let me know if you want more information. Rgds, Brijesh + +Hi, Sung-IL, The query has been forwarded to the VSDK lead. Regards, Mariya + +Hi Brijesh, Is it 3D SV DEMO? To run this DEMO, should they use Fusion application Daughter Board? Is it possible to use Vision application Daughter Board to run this DEMO? If not, is there any plan to release 2MP SV DEMO for Vision applicaiton Daughter Board in future releases? Is there any plan to release 2MP 2D SV DEMO running on TI-RTOS? When we will release detailed document for this 2MP DEMO? When customer buy TDA2+ EVM, can they set-up 2MP DEMO by themselves using VisionSDKv3.02? Thanks and Best Regards, SI. + +Hi SI, yes, it is 3D SV demo. No This demo is not supported on Vision board, it is supported only on Fusion board and as of now, AFAIK, there is no plan to support 2MP SRV demo using vision daughter card. Vision card outputs only on parallel interface and one of the advantage of J6+ is that it support capture over CSI2 serial interface. We are using CSI interface to get 2MP 4Ch data. As such, most of the documentation should be available, Let me check what is missing in documents. yes, customer can setup 2mp demo using TDA2x+ EVM, fusion board and TIDA1130/IMX390 sensors. They need to use VSDK 3.02 release. Regards, Brijesh + +Hi Brijesh, I checked it again, but I could not find any related document. It seemed the 'VisionSDK_UserGuide_2MP_3D_SurroundView.pdf' is not updated yet. the title of 'VisionSDK_UserGuide_2MP_3D_SurroundView' is a 'Vision SDK TDA2xx 2MP 3D Surround View User Guide', not TDA2Px. Thanks and Best Regards, SI. + +SI VisionSDK_UserGuide_2MP_3D_SurroundView.pdf is currently for TDApx based 2MP SRV, No section added for TDA2Px 2MP SRV, where ISS is getting used. Sorry, we do not have any seperate user guide for TDA2Px 2MP 3D SRV, will add one section the same for next release. regards, Shiju + +Hi Shiju, Could you please release instruction how customer can try it? my customer is willing to buy TDA2P EVM to run this 2D SV DEMO. Is it OK to buy Fusion Kit and TIDA-01130 OV2775 camera module only? or other kit will be required? Could you please explain about HW setup at least? Thanks and Best Regards, SI. + +SI You need below HW to set-up 2MP SRV demo on TDA2Px 1. TDA2Px EVM - 1 2. Fusion Card/EVM - 1 3. TIDA OV2775 cameras - 4 (with Fakra cables) separate power supply is required for Fusion Card Regards, Shiju + +SI please make sure you order TIDA OV2775 cameras with Fisheye lens. Sometimes, spectrum digital ship only sensor without lens module regards, Shiju + diff --git a/data2/text/range/0-5000/653544.txt b/data2/text/range/0-5000/653544.txt new file mode 100644 index 0000000000000000000000000000000000000000..7f0ff699ab73c28cb629ddf6499046310bb47423 --- /dev/null +++ b/data2/text/range/0-5000/653544.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2EVM5777: How to Delay SPI Slave to Master Response in Vision SDK + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi , Please guide me how to delay slave to master response in Vision SDK by one clock ? I am missing MSB in MISO and wave form shows that when clock starts first bit is already passed so it starts reading from second MSB. Thanks, + +Responses: +Hi, Have you configured the TDA2 in master or slave mode? In case of slave mode, the TDA2 device does not control the clock. It only responds to the clock sent by the external master. Regards, Prasad + +Rajesh, Are both master and slave operating in the same SPI mode 0/1/2/3? + +Hi, Sorry for the delay in reply. TDA2x is configured in slave mode and both are using SPI mode 3. I have attached a screen shot for the slave to master communication for data 0111 0000 and the problem is our MSB gets lost because delay in clock signal and we are receiving 1110 0000 on MCU side. We are using SPI mode 3 for this communication and using GIO_issue and GIO_reclaim API's given by Vision SDK. Could you please guide us here how we can sync clock signal so that we will not loose first bit (MSB) while doing communication from slave to MCU. MCU to slave no issue. Thanks, + +Hi Rajesh, Can you post or send by email the part of schematic diagram related to SPI? Stan + +Hi, Please check your email for the SPI related schematic diagram. Thanks + +Hi Rajesh, did you resolved your issue? If you have further question please write here or send mail to Stan. Regards, Yordan + diff --git a/data2/text/range/0-5000/656521.txt b/data2/text/range/0-5000/656521.txt new file mode 100644 index 0000000000000000000000000000000000000000..001e0a895e100d646172051e48dfe9982c009bb6 --- /dev/null +++ b/data2/text/range/0-5000/656521.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2SX: VPE output format for TDA2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS We need VPE output formant (YUV444p or RGB888p) for TDA2. Does TDA2 support this function ? How can I implement it ? + +Responses: +Yes, VPE does support RGB888 output format. Why do you require YUV444? Regards, Brijesh + +Our algorithm input format must be YUV444P and scaled. We want use VPE scaled and output (YUV444P or RGB888) format. But we find vpelink.h. System_VideoDataFormat dataFormat; /**< Output Frame data Format. * VPE link is validated only for the following output dataformats * 1. SYSTEM_DF_YUV422I_YUYV * 2. SYSTEM_DF_YUV420SP_UV So, do you have any sample about VPE scaled output format(YUV444P or RGB888). Thanks + +YUV444I is supported by the driver. You need to add support in the VPE link. Note: VPE outputs in YUV444 interleaved and not YUV444 planar. + +Hi, Is the RGB888 planar or interleaved? Charles + +RGB888 is also interleaved. Rgds, Brijesh + +Sorry typo, RGB888 is also interleaved. Rgds, Brijesh + +Thanks. + diff --git a/data2/text/range/0-5000/659129.txt b/data2/text/range/0-5000/659129.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2095202a98c231b63f0d6b2afcd7cd40a899550 --- /dev/null +++ b/data2/text/range/0-5000/659129.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: I2C Internal FIFO buffers depth + +Query Text: +Part Number: TDA2SX Hi, In TDA2X TRM, I could see the internal FIFO depth is 64-bytes (reset value). But when I read back the I2C_BUFSTAT register after reset, it is set to 16-bytes. Have something been changed or should we revise the TRM? Regards, James + +Responses: +Hi James, Looks like a document bug. I've also read 0x1 (16 bytes) on a AM572x board. I will file an incident to correct this. Regards, Stan + diff --git a/data2/text/range/0-5000/663784.txt b/data2/text/range/0-5000/663784.txt new file mode 100644 index 0000000000000000000000000000000000000000..80f330f15d082d422e41156f074685ca38904109 --- /dev/null +++ b/data2/text/range/0-5000/663784.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SG: RSTOUTn release during power up + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hello team, Customer tried two experiments about RSTOUTn -1) If RESETn is released before PORz, RSTOUTn outputs 2ms after PORz. -2) If RESETn is released after PORz, RSTOUTn outputs 2ms after PORz not RSTOUTn. According to the power up sequence in TDA2 data manual, RESETn to RSTOUTn delay is 2ms. But based on observation, RSTOUTn comes after PORz not RESETn. Please make clear which one between RESETn and PORz will make RSTOUTn release during power-up. The probed plot is attached in PPT file. Thanks, Lloyd Question about TDA2 RSTOUTn.pptx + +Responses: +Hi Lloyd, - PORz pin is a power-on, global cold reset. (i.e. system is being powered) - RESETn pin is a global warm reset (system was powered before, no need to reset everything again) - RSTOUTn pin allows other ICs in the system to get reset. This pin is asserted (low) on every global reset (warm or cold, software or hardware). The low signal gets extended for some milliseconds. In both of your cases 1) and 2), you are issuing a global cold reset. That's why RSTOUT gets deasserted after PORz. (not RESETn). Kindly try asserting a warm reset. This can be done by asserting low RESETn while system is running, and then desserting it. You should observe RSTOUT assertion, and deassertion with delay. Please note also that Data manual requires RESETn and PORz to be deasserted simultaneously during power-up. Therefore, it is no matter if note (14) says 'delay after resetn' or 'after porz', but in fact it is after PORz , so I will request documentation team to update the note. Thanks, Stan + diff --git a/data2/text/range/0-5000/664392.txt b/data2/text/range/0-5000/664392.txt new file mode 100644 index 0000000000000000000000000000000000000000..28824378b3c7422b33dd477f5422533f13b09aa0 --- /dev/null +++ b/data2/text/range/0-5000/664392.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EXEVM: QSPI usage + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I am using TDA2Ex SoC. As mentioned in TRM, there are two QSPI parts: QSPI_ADDRSP0 (Config port) and QSPI_ADDRSP1(memeory mapped port). My understanding is QSPI_ADDRSP0 can be used to configure, write to flash. but I am unable to understand the use of QSPI_ADDRSP1. How does it help memory mapping, etc. Looking forward for the response. Thanks in advance, Priyanka Zadge + +Responses: +Hi Priyanka, QSPI_ADDRSP1 allows to view a QSPI flash contents in a CPU address space similarly to NAND or NOR flash memories. This address space is located at: QSPI_ADDRSP1 | 0x5C00_0000-0x5FFF_FFFF | 64 MiB | QSPI CS0/CS1/CS2/CS3 space (Maddrspace 1) I don't have much experience with that though. Regards, Stan + +Hi Stan, [QSPI_ADDRSP1 allows to view a QSPI flash contents in a CPU address space similarly to NAND or NOR flash memories.]: meaning, this part of QSPI is useful to see the contents of external flash only, correct? Regards, Priyanka + +Yes, but QSPI is most useful with flash memories. If you need SPI as a control interface, better option is the MCSPI peripherals of TDA2. Regards, Stan + +Hi Priyanka, In additional to what Stan said QSPI can operate in two modes: Memory mapped Mode and Config mode. QSPI_ADDRSP0 is used while operating in config mode and QSPI_ADDRSP1 in memory mapped mode. Memory mapped mode allows user to read QSPI as a flat memory similar to DDR/OCMC. You can search for SOC_QSPI_ADDRSP1_BASE and SOC_QSPI_ADDRSP0_BASE in \packages\ti\boot\ folder to see how both spaces are used. Regards, Rishabh + diff --git a/data2/text/range/0-5000/664414.txt b/data2/text/range/0-5000/664414.txt new file mode 100644 index 0000000000000000000000000000000000000000..95626fca352b7462f1e3f77145635ba894fa9011 --- /dev/null +++ b/data2/text/range/0-5000/664414.txt @@ -0,0 +1,22 @@ +Ticket Name: RTOS/TDA2HG: HW SHORT occurred on TDA2 vision-kit and de-serializer board when 4 Cameras were connected + +Query Text: +Part Number: TDA2HG Tool/software: TI-RTOS Dear Champs, My customer failed to run SV demo with VisionSDK_UserGuide_TDA2xx.pdf using pre-built image. When they connected 3 cameras, there was no issue to run DEMO, but they failed to run DEMO with 4 cameras. At this failure, they observed high 'current' in their power supply like HW SHORT. So, they sent de-serializer board to repair it, but they failed again even with new board. Could you please let me know your idea what should be checked in this case? SW is Vision-SDK v3.02.00.00. Thanks and Best Regards, SI. + +Responses: +Hi, I have forwarded your question to an expert for comment. Regards, Yordan + +SI Are they tried 2D SRV on TDA2x EVM + Vision daughter card + OV10635 Camera ? or any other demo. Please check they used the right power supply (the one shipped along with EVM kit) regards, Shiju + +Hi Shiju, Yes. they tried 2D SRV on TDA2x EVM + Vision daughter card + de-serializer board + OV10635 cameras. There was no power supply in the EVM package, and they used power supply. Thanks and Best Regards, SI. + +SI Please check with spectrum digital on the power supply. power supply specification Input: 100-240V Output: 12V, 7A regards, Shiju + +Hi Shiju, I’m checking the specification of power supply, and it seemed it’s max output is only 3A. Do you think 3A is OK? BR, SI. + +SI no, I checked by power supply, it should be Output: 12V, 7A regards, Shiju + +this issue was resolved after using new power supply(12V, 10A). Thanks for your support! Thanks and Best Regards, SI. + +SI Thanks for the confirmation regards, Shiju + diff --git a/data2/text/range/0-5000/665627.txt b/data2/text/range/0-5000/665627.txt new file mode 100644 index 0000000000000000000000000000000000000000..0459b7d7061fe655243cb625319c57a45ca3dbcc --- /dev/null +++ b/data2/text/range/0-5000/665627.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: Setting for SV DEMO on TDA2 EVM + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Dear Champs, My customer is trying to run SV DEMO on TDA2 EVM using pre-built image included in VisionSDK v3.02 and successfully to run DEMO display, but there is only 1 camera displayed in SV DEMO. Could you please let me know settings of Vision daughter board and deserialize board to run SV DEMO? in my customer's display, camera1 and 3 - blank. camera2 - green(only green color displayed) camera4 - display When I changed cameras each other, same situation occurred as above.(only camera4 was displayed and camera2 was green) customer's SW3 of Vision board is as below. and deserializer board is as below. Thanks and Best Regards, SI. + +Responses: +Hi SI, I have forwarded your question to VisionSDK experts. Regards, Yordan + +SI the SW3 switch setting in SW3 on TDA2xx Vision Application Board is not correct refer \vision_sdk\docs\UserGuides\VisionSDK_UserGuide_TDA2xx.pdf. section : 2.3.2 LVDS MCV Use-case Hardware Setup and 2.3.3 Capture Pin Settings SW3 should be set as below for 4ch LVDS setting (used in SRV) LVDS OFF OFF ON OFF OFF ON OFF ON regards, Shiju + +Hi Shiju, After changing SW3 setting, I found DEMO ran well. Thanks for your support. I have a question for de-serializer board setting. I found DEMO worked well with below default setting. Is this normal? Is there any detailed document for de-serializer board? I could not find any document for de-serializer board in the Spectrum Digital's web. Thanks and Best Regards, SI. + +SI The default jumper setting would work as of today we do not have any document for this, will plan to add a picture of the same regards, Shiju + diff --git a/data2/text/range/0-5000/666398.txt b/data2/text/range/0-5000/666398.txt new file mode 100644 index 0000000000000000000000000000000000000000..06f184ebbc2cb577af2388808626293e60df3a7c --- /dev/null +++ b/data2/text/range/0-5000/666398.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA3XEVM: C66x CPU clock in the platform + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: SYSBIOS, TDA2 Tool/software: TI-RTOS Hello, I have imported the example project "benchmark_TDA3x_C66xx" into the CCS 7.4 and selected the platform of TDA3EVM. This platform is taken from SYS/BIOS 6.53.1.03. I am wondering, why the CPU clock is set to 600 MHz. The C66x of the TDA3 is specified to 500 MHz. What is wrong here? By the way, the following includes in the benchloop.c file must be changed from /* POSIX module Headers */ #include #include in to #include #include Best regards, Milan + +Responses: +Hi Milan, I have forwarded your question to an expert for comment. Regards, Yordan + +Hi Milan, This comes from a default definition from bios_6_XX_XX_XX\packages\ti\platforms\evmTDA3XX\package\ti_platforms_evmTDA3XX.java po.addFld("DSP", (Proto)om.findStrict("xdc.platform.IExeContext.Cpu", "ti.platforms.evmTDA3XX"), Global.newObject("id", "0", "clockRate", 600.0, "catalogName", "ti.catalog.c6000", "deviceName", "TDA3XX", "revision", "1.0"), "rh"); You are free to modify this in the project specific CFG file by setting: var BIOS = xdc.useModule('ti.sysbios.BIOS'); BIOS.cpuFreq.hi = 0; BIOS.cpuFreq.lo = 500000000; This will take effect for calculating the DSP software frequency. BTW, note niether of these settings actually dial up the PLL. I am not aware of the project benchmark_TDA3x_C66xx you mention. Can you please highlight where you have got this project from? Thanks and Regards, Piyali + +Hi Piyali, thank you for your answer. I think the 600 MHz entry in the platform is an copy and paste error from TDA2 clocks. The project "benchmark_TDA3x_C66xx" comes from the TI Resource Explorer: I know, it is possible to set the clocks and memory settings with the SYS/BIOS cfg script. Is it possible to compile the software without the default platform or with a simple linker file? The separate platform handling makes the workflow too complicated. Best regards, Milan + +Hi Milan, Thanks for pointing out the source. Since this is a BIOS based project, the first thing it will try to run is the XDC configuro step which looks for a platform. You can additionally add your own linker files but a base linker file will be created by this configuro step from the platform. It would help us, if you could kindly elaborate how you intend to use this project. We can check if there are any alternatives based on your feedback. Regarding the earlier comment regarding posix headers, you are right. It seems the example include paths correspond to older BIOS releases. I will inform our BIOS team to update this. Thanks and Regards, Piyali + +Hi Piyali, I have chosen this project, because I want optimize an algorithm for the C66x with time measuring possibility. By this way I recognized that the CPU clock was set wrong in the platform, so that the time measurement can not be correct. The DSP runs with 500 MHz. Additional the CPU clock is also set wrong in the SYS/BIOS config. This is why I ask for to bypass the platform completely and to disable the XDC configuro. I would like to handle this configurations in the SYS/BIOS config and additionally in the linker file. In case of multicore processors the best way for clear configuration (CPU-Clock, memory, sections,...) would be in a single file. Is it possible? Best regards, Milan + +Hi Milan, If you are looking only for measuring the time for an algorithm on the DSP and do not really have any BIOS dependency, you can also use a standalone non RTSC based CCS project. For profiling you can use the TSC timers in the C66x which run a the C66x frequency. I am copying the assembly code to read the timers for quick reference: .global _CSL_tscEnable .global CSL_tscEnable _CSL_tscEnable: BNOP B3, 4 ; MVC A4, TSCL ; Initiate CPU Timer by writing to TSCL .global _CSL_tscRead .global CSL_tscRead .sect ".text:cslsys_section:tsc" _CSL_tscRead: BNOP B3, 2 ; Branch Return Pointer MVC TSCL, B0 ; Read TSCL MVC TSCH, B1 ; Read TSCH || MV B0, A4 MV B1, A5 extern void CSL_tscEnable(void); extern CSL_Uint64 CSL_tscRead (void); Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/668000.txt b/data2/text/range/0-5000/668000.txt new file mode 100644 index 0000000000000000000000000000000000000000..daff7872739e1a01008d0c6ee60f7d0e72333355 --- /dev/null +++ b/data2/text/range/0-5000/668000.txt @@ -0,0 +1,38 @@ +Ticket Name: TDA2SG: TDA2SG EMIF1 ECC + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2, AM5728 The current ECC architecture of aligned cache line writes, on EMIF1, (for TDA2SGBRQ (AM5728)) from only the core initiators (no IO initiators supported) is to limiting and not able to support the memory interface access schemes we have implemented. Is there a form, fit and function TDA2 device (pin compatible) supported by TI that would support non-aligned cache line writes from both core and IO initiators? I am getting the above information on ECC scheme for EMIF1 from Errata i922 + +Responses: +Hi, Dean Hogle, Check this thread if it can help: Regards, Mariya + +Hi Mariya- The link you gave me is my issue that Barend (FAE TI) told me to enter into this portal. Based on the link only quanta sized lines (full cache lines) can be written with ECC and only from ARM and DSP not IO. This is our issue, we want to have the ability to carry ECC on the DDR interface from all initiators and not be restricted to full cache line writes, meaning we need the capability to do read/modify/writes. Is there pin compatible TDA2 solutions that provide this solution? or other options? Thanks Dean + +Hi Dean, can you check if this application report can help you: www.ti.com/.../sprac42a.pdf Regards, Yordan + +Hi Dean, Read modify write with ECC enabled is not supported on TDA2xx device. You can use TDA2Px SoC which has a version that is pin compatible with TDA2xx. Regards, Rishabh + +Review of the sprac42a App note confirms the short comings of the EMIF 1 ECC implementation but does not resolve or help my initial request which is a pin compatible replacement or other options. Thanks Dean + +Hi Dean, As I stated in my previous reply you can see TDA2Px-ABZ which is pin compatible with TDA2xx and supports ECC with read modify write functionality. Regards, Rishabh + +HI Rishabh- Can you confirm if the the TDA2Px-ABZ supports ECC with RMW from all memory sources (core and IO initiators)? Thanks Dean + +Hi Dean, If the ECC referred here is EMIF ECC then the answer is yes. Regards, Rishabh + +Rishabh- I did a quick comparison of the TDA2XX datasheet to the TDA2Px and it appears that secure boot and ISS are additional features and besides that the chips are identical, can you confirm? Is there a app note or white paper that documents this that you can share with me? Do you have any information on pricing, is the TDA2XX and TDA2Px on par with each other? Thanks Dean + +Hi Dean, These are pin compatible chips, not identical. TDA2Px has more features/IPs. Please contact TI FAE for pricing. This information is documented in chapter 1 of TDA2Px TRM: www.ti.com/.../spruif0a.pdf. Regards, Rishabh + +Hi Rishabh- The link you provided does not allow me to see the .pdf, says document not found. Can you update link. Also is there an app note that documents the ECC implementation for the TDA2Px that you can share? Thanks Dean + +Hi Dean, Can you try this link: www.ti.com/.../getliterature.tsp From implementation perspective everything is same as TDA2xx. Only addition is RMW bit (REG_RMW_EN) that needs to be enabled in EMIF_ECC_CTRL_REG. Unfortunately the ECC app note is not updated for TDA2Px implementation. Regards, Rishabh + +Dean, It seems that "." is getting attached to the hyperlink at the end. Kindly remove it and try: www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=SPRUIF0&fileType=pdf Regards, Rishabh + +Hi Dean, I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out) Regards, Rishabh + +Hi Rishabh- The TDA2P appears to have the ECC coverage we need. I am in the process now of understanding the production availability of the device. Thank you for your help/support on this. + +Hi, Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/0-5000/668556.txt b/data2/text/range/0-5000/668556.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa7b94adde5af77bbbfaf68e378d5520b99795f4 --- /dev/null +++ b/data2/text/range/0-5000/668556.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2P-ABZ: TDA2P-ABZ + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 We're using IS25LP512M flash memory device in TDA2P based design. This device supports different modes such as Standard SPI, Fast, Dual, Dual I/O, Quad, Quad I/O, SPI DTR, Dual I/O DTR, Quad I/O DTR, and QPI Could you please recommend which mode is preferred when we interface this device with TDA2PHGrRQACD(R)-Q1 device? Please note that there will be single flash memory device interfaced over QSPI. + +Responses: +Hi, According to TDA2 TRM, QSPI interface supports Quad read mode and one-bit write mode. Regards, Stan + +Hi, QSPI supports one bit read as well. Regards, Rishabh + diff --git a/data2/text/range/0-5000/668876.txt b/data2/text/range/0-5000/668876.txt new file mode 100644 index 0000000000000000000000000000000000000000..d939411ddf6dfc8eceb461f2ecef2630a616808d --- /dev/null +++ b/data2/text/range/0-5000/668876.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EG-17: Whether we can delete TDA2E-17 QSPI1_RTCLK signal when QSPI memory work at Mode 3? + +Query Text: +Part Number: TDA2EG-17 Hi Expert: At TRM 24.5.2 table 24-355 gave the QSPI signal description. Because we are using spansion and Micron QSPI work at 4-bits QSPI mode. It is follow SPI mode 3. We want to remove the QSPI1_RTCLK signal ( pin H3 at TDA2E-17 ) , just connect QSPI1_SCLK signal to spainsion QSPI memory. Does it can work at TDA2E-17? Best Regards! han tao + +Responses: +Hi Tao, On TDA2-17x17 you also should not need to connect qspi1_sclk to qspi1_rtclk (in mode 3). Regards, Yordan + +Hi Yordan: Thanks for help me confirm it. Best Regards! Han Tao + diff --git a/data2/text/range/0-5000/670844.txt b/data2/text/range/0-5000/670844.txt new file mode 100644 index 0000000000000000000000000000000000000000..63153ea99b0f6988276320cb65a8345cd522e91e --- /dev/null +++ b/data2/text/range/0-5000/670844.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2EVM5777: calibration for 3D SV DEMO + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Dear Champs, I would like to check how Calibration can be run for 3D SV DEMO, and have 2 questions especially as below. * 4 camera image capture should be done in the target board and it should be input to calibration tool on the PC, right? How 4 camera image capture should be done in target board? * in the userguide, there should be 'TDA2x' directory on the SD/MMC card. where this directory should be created? is it on the root directory of root filesystem? or is it on the boot partition? Thanks and Best Regards, SI. + +Responses: +Hi SI, Can i which version of SDK are you using? also any particular reason for manual calibration? Regards, Sujith + +Oh..sorry. VisionSDK v3.2. BR, SI. + +Hi SI, If you are using D3 Skateboard and chart, it best to perform automatic calibration. You will have to create a folder in mmc/sd root folder itself. i.e. the folder when you have MLO/uenv.txt Regards, Sujith + +Thanks Sujith, Their HW is TDA2 EVM + Vision Kit + OV10635(x 4) camera. is it possible to perform automatic calibration in this case? There is no specific reason to run manual calibration. it is OK just to run 3D SV DEMO. For directory, do you mean to create TDA2x directory in the boot partition with MLO? They failed to run automatic calibration when they create TDA2x directory in the boot partition. Thanks and Best Regards, SI. + +Hi SI, For auto-calibration, customer should use the chart provided and ensure cameras are mounted as described in VisionSDK_UserGuide_2D_SurroundView_Demo.pdf, section 2.3 Mounting Cameras The lens play a significant role, please determine the lens that's being used. For some of the fish-lenses the LENS.BIN is provided in the visionsdk. We could generate the LENS.BIN by following steps listed in "VisionSDK_UserGuide_3D_SurroundView_Manual_CalibTool.pdf" Various tables required for calibration is expected to be stored in mmc/sd card. Yes, you will require create a folder named "TDA2x". Below is a snap shot of my mmc/sd Regards, Sujith + +Sujith, And for directory, should there 'uenv.txt'? I'm wondering why my customer's directory was not worked. my customer created the directory in the boot partition as you mentioned and the log is below. [HOST] [HOST ] 631.756877 s: CHAINS: -------------------------------------------------- [HOST] [HOST ] 631.756877 s: CHAINS: TDA2X Folder not present in MMC/SD [HOST] [HOST ] 631.756908 s: CHAINS: Create TDA2X folder and copy the following files from [HOST] [HOST ] 631.756908 s: CHAINS: '/vision_sdk/tools/surround_vision_tools/Srv_LUTs': [HOST] [HOST ] 631.756908 s: CHAINS: 1. CHARTPOS.BIN [HOST] [HOST ] 631.756908 s: CHAINS: 2. LENS.BIN [HOST] [HOST ] 631.756908 s: CHAINS: 3. LENS_2D.BIN [HOST] [HOST ] 631.756938 s: CHAINS: -------------------------------------------------- Thanks and Best Regards, SI. + +Hi SI, Can you please check "VisionSDK_Linux_UserGuide.pdf" section 4.2 Regards, Sujith + +Hi Sujith, Thanks for your support. I found there was some difference in the file name and it works well after correcting file name. Thanks and Best Regards, SI. + +Hi SI, Thanks for the confirmation. Regards, Sujith + diff --git a/data2/text/range/0-5000/671327.txt b/data2/text/range/0-5000/671327.txt new file mode 100644 index 0000000000000000000000000000000000000000..23b96f15a8d0a6344aac7444ba1339412497088d --- /dev/null +++ b/data2/text/range/0-5000/671327.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2P-ABZ: linux version 4.14.24 Crashes + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi, Could you please answer a question from a customer. I try to bring up linux version 4.14.24 (ti-git repository) on our homebrew device, but it will not boot into linux kernel and crashes very early, so this way will not bring success. So there is still no Board Support Package, which captures all features of the TDA2+, right? (I tried out linux 4.4.84, out of visual sdk, before, but sadly I was missing timer12. RNG and MCAN support.) Thanks, -Needhu + +Responses: +Hi, I would recommend customer to use the kernel and u-boot from here Vision SDK and add selected features from the latest kernel. Latest kernel and u-boot can be found here Kernel: git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git Branch: ti-lsk-linux-4.14.y U-boot: git://git.ti.com/ti-u-boot/ti-u-boot.git Branch: ti-u-boot-2017.01 Regards, RK + diff --git a/data2/text/range/0-5000/672848.txt b/data2/text/range/0-5000/672848.txt new file mode 100644 index 0000000000000000000000000000000000000000..f08540bd588f224acb0594aaa81e7b2d8bc70c9e --- /dev/null +++ b/data2/text/range/0-5000/672848.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: About Deep learning application + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi Sir we used TDA2 for development and knew SDK supports Caffe/TensorFlow training frame works. we would like to know that VGG, SSD, Yolo, Yolo v2 can be implemented in TDA2 or not? please advise and thanks BR Yimin + +Responses: +Object detection layers are not supported in the current release (01.00). SSD will be supported in the next release 01.01 (March end release) Regards, Kumar.D + diff --git a/data2/text/range/0-5000/673287.txt b/data2/text/range/0-5000/673287.txt new file mode 100644 index 0000000000000000000000000000000000000000..11e5403f220cfff55fd812391c34b31649c5b367 --- /dev/null +++ b/data2/text/range/0-5000/673287.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2EG: System_linkControl_local/System_sendLinkCmd_local Issue + +Query Text: +Part Number: TDA2EG Hi I am studying on the Link. In the "vision_sdk\links_fw\src\rtos\links_common\system\system_linkApi_local.c", the System_linkControl_local/System_sendLinkCmd_local are all implemented by mailbox. Here, "local" should means communication on the same processor, but according to the technical reference manual of TDA2, mailbox is designed for two processors communication. So why VSDK use mailbox to do the local communication? Thanks xuanbo + +Responses: +Hi xuanbo, This mail box is implemented using simple queue and semaphores, it does not use hardware mail box. For inter processor communication, it uses IPC. Regards, Brijesh + +Hi Brijesh So the software mailbox is totally different with hardware mailbox. As a Link is a OS thread, could i treat the mailbox implemented with semaphore as the way to do the inner thread communication? By the way, where can i find the implement or definition code of mailbox in the VSDK? Thanks xuanbo + +Queue related: Utils_mbxCreate function at "\vision_sdk\links_fw\src\rtos\utils_common\src\utils_mbx.c"; semaphores related: Utils_queCreate function at "vision_sdk\links_fw\src\rtos\utils_common\src\utils_que.c" right? Thanks xuanbo + +xuanbo, Well, yes, utils_mbx.c uses queue and semaphores to implement mail/message box. Rgds, Brijesh + +Hi xuanbo, Yes, it is different from hardware mailbox. Yes, it is used for inter-link communications.. Regards, Brijesh + +Hi Brijesh OK, i got it, Thank you~ Regards xuanbo + diff --git a/data2/text/range/0-5000/674061.txt b/data2/text/range/0-5000/674061.txt new file mode 100644 index 0000000000000000000000000000000000000000..a659622505ff3473b5a1eacd7089f3bfcbaddbd4 --- /dev/null +++ b/data2/text/range/0-5000/674061.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SG: recommended pcb pad size of TDA2 bga + +Query Text: +Part Number: TDA2SG Hello team, My customer would like to know if the PCB pad size(land pattern size of BGA) is acceptable. The ball size of TDA2x ABC (23mmx23mm) looks typ. 0.50Φ according to data manual as following. The customer is designing the PCB pad size with 0.40Φ. 0.40Φ pad size is acceptable? . What would be the recommended pad size for BGA? regards, Lloyd + +Responses: +Refer to the following appnote for background: www.ti.com/.../spraa99b.pdf The solder ball dia that the POD shows is not the key parameter that should be used in determining the PCB’s ball land diameter. The package’s Solder Mask Opening (SMO) for each ball is the parameter that drives PCB ball land dia. Optimally SMO = Ball Land for best mechanical robustness, see Table 1 of attached. It recommends 0.4mm ball land dia for 0.8mm pitch BGAs assuming the standard package side SMO = 0.4mm. For TDA2x and DRA74x/75x we recommend 0.4mm ball land dia. Regards, Kyle + diff --git a/data2/text/range/0-5000/675342.txt b/data2/text/range/0-5000/675342.txt new file mode 100644 index 0000000000000000000000000000000000000000..b492b41fd68b34ee437445151789df06531f090f --- /dev/null +++ b/data2/text/range/0-5000/675342.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Vision SDK TDA2xx v03.02.00 + +Query Text: +Part Number: TDA2 Hello everyone: Here are my environment: Hardware: 1. TDA2xx EVM 2. TDA2xx Vision Application Board 3. 6 channel FPD-Link III FMC Daughter Board 4. 2 x OV10635 Sensor SDK: Vision SDK 3.0.2 I can run use case "vip_single_cam_sgx_display" with single OV10635 connected to P1. Now, I'm trying to run use case "lvds_vip_multi_cam_view_sgx_display". BUT when I'm using daughter board that two OV10635 camera connected to, the kernel stop at "[ OK ] Started Synchronize System and HW clocks." and then reboot again and agin. I try to remove one of the camera and there is no problem at all. And I also try to use Automotive SDK, the result is the same. My question is "Can I use only two cameras? How can I do that?" Thanks in advance + +Responses: +Hi, Multi cam usecase uses 4 camera, the buffers get displayed on screen only when all four cameras are feeding video. This won't work with 2 camera only. Single cam usecase uses only 1 camera, connect it to the cam6 port of the multides board. This will get the single cam usecase working. Refer to the user guide for more details on camera connections Regards, Nikhil D + diff --git a/data2/text/range/0-5000/675408.txt b/data2/text/range/0-5000/675408.txt new file mode 100644 index 0000000000000000000000000000000000000000..4042f711571c4685b225432ae94ea91679a722c2 --- /dev/null +++ b/data2/text/range/0-5000/675408.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: TIDL library from vison SDK profiling cycles doesn't match with the prescribed cycles in the data sheet + +Query Text: +Part Number: TDA2 I'm using TDA2X vision high board. I built the test application provided along with the TI deep learning library TIDL for EVE and loaded it on the EVE core from Debugger. The profiling results i got was: TEST_REPORT_INIT_PROFILE_DATA : TSC cycles = 1045023112, SCTM VCOP BUSY cycles = 0, SCTM VCOP Overhead = 0 TSC cycles are 1045023112 which is way higher than the promised cycles in the datasheet. What am I doing wrong. Please guide. + +Responses: +Hi Srinidhi, The number that you are observing the initialization cycles (it is one-time cycle, not the process cycle). The test execution is not complete. At end of execution below print is expected from TIDL test bench. below highlited is the cyclee required for one inference process TEST_REPORT_INIT_PROFILE_DATA : TSC cycles = 1090612854, SCTM VCOP BUSY cycles = 0, SCTM VCOP Overhead = 0 I/O Bytes : 183972592 ( 12396776 + 171575816 ) : 0 ( 0 + 0 ) Processing Frame Number : 0 TEST_REPORT_PROCESS_PROFILE_DATA : TSC cycles = 159966840, SCTM VCOP BUSY cycles = 115715684, SCTM VCOP Overhead = 0 I/O Bytes : 93366432 ( 61884464 + 31481968 ) : 197540112 ( 170210288 + 27329824 ) End of config list found ! + +Hi kumar, Yes this is in line with the numbers with the datasheet. But in "Embedded low-power deep learning with TIDL" document it says: It says at 0.700giga cycles(700 mega cycles) time was 194.44 ms. How to achieve this performance. Was this on EVE core? On vision High board i consider EVE at 535Mhz. What was the clock speed at which this was achieved? Thanks + +The original question was for datasheet numbers in the TIDL SW release package. Regarding the new question abou the above table, this is for 4xEVEs running at 900Mhz. The model used for the abiove table is diffrenet from the one available in the TIDL SW. The above mentioned sparse model takes 188 mega cycles for one frame inference (Againt the 159 Mega cycles for the one in TIDL SW release opackage). The dense model number 700 mega cycles is for reference. I hope this clarifies your new question. Regards, Kumar.D + +Hi Kumar, When will be the Single-shot detector based libraries out? Any date that we can expect of? Thanks + +Refer here e2e.ti.com/.../675785 + diff --git a/data2/text/range/0-5000/675500.txt b/data2/text/range/0-5000/675500.txt new file mode 100644 index 0000000000000000000000000000000000000000..11977284de4c5d858fbb3388c5bf84c66ce1225b --- /dev/null +++ b/data2/text/range/0-5000/675500.txt @@ -0,0 +1,17 @@ +Ticket Name: RTOS/TDA2: Use Case generation error in VisionSDK while executing ./vsdk_linux.out + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I am trying to create a use case & referring the document (VisionSDK_UserGuide_UsecaseGen.pdf , present in docs folder of vision_sdk.) While executing the file "vsdk_linux.out". I followed following steps: 1.Created the simple use case file. chains_capture_display.txt (attached the file) . 2. I tried to Run the executable “vsdk_linux.out” for linux platform using following command. ./vsdk_linux.out /home/varshavanga/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/rtos/usecases/chains_capture_display.txt -img -file -path /home/varshavanga/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/rtos/usecases/ I received the following errors: /usr/lib/libstdc++.so.6: version ``GLIBCXX_3.4.20' not found & /usr/lib/libstdc++.so.6: version ``GLIBCXX_3.4.21'not found Executed following commands to overcome those errors: 1. $ sudo add-apt-repository ppa:ubuntu-toolchain-r/test 2. $ sudo apt-get update 3. $ sudo apt-get install libstdc++6-4.7-dev After executing above commands encountered following error. ./vsdk_linux.out: relocation error: ./vsdk_linux.out: symbol _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EPKcRKS3_, version GLIBCXX_3.4.21 not defined in file libstdc++.so.6 with link time reference Do I need to install any other packages or dependencies to eliminate this error? -Thanks, Varsha chains_capture_display.txt UseCase: chains_capture_display +Capture -> Display + +Responses: +Hi Varsha, did you have installed the libs mentioned in "2.2.3 Other mandatory software packages for build" of VisionSDK_Linux_UserGuide.pdf: Ensure these packages/tools are installed on the installation machine uname, sed, mkimage, dos2unix, dtrx, mono-complete, git, lib32z1 lib32ncurses5 lib32bz2-1.0 libc6:i386 libc6-i386 libstdc++6:i386 libncurses5:i386 libz1:i386 libc6-dev-i386 device-tree-compiler mono-complete Regards, Yordan + +Hi Yordan, I have installed the libs mentioned in "2.2.3". All the libs are installed successfully except "uname" & "mkimage". When i try to install them, i encounter the following errors: E: Unable to locate package uname E: Unable to locate package mkimage Working on Ubuntu 14.04 LTS (64 bit) . Is there something else I am missing to install ? And how can i overcome the above errors. Thanks & Regards, Varsha + +Hi Varsha, for 'mkimage' you should install 'u-boot-tools' package and you should already have 'uname' installed. It seems that error is caused by another reason, I have pinged VisionSDK experts to provide help. Regards, Yordan + +Hello Yordan, Thanks for your quick reply, I have installed u-boot-tools package & uname is already installed, but still I encounter the same errors: "relocation error" as well as "E: Unable to locate package uname & E: Unable to locate package mkimage". Yes, there might be some other reason. Waiting for the help. Thanks & regards, Varsha + +Varsha Can you please follow VisionSDK_Linux_UserGuide.pdf section 2.2.3 Other mandatory software packages for build regards, Shiju + diff --git a/data2/text/range/0-5000/675785.txt b/data2/text/range/0-5000/675785.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce4efe385cbeb4d6a8143e94758765218daf7ceb --- /dev/null +++ b/data2/text/range/0-5000/675785.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TI DL : Support for SSD on EVE for TDA2x + +Query Text: +Part Number: TDA2 Hi.. Currently the latest release is TIDL.01.00.00.00 . Does this support SSD(Single Shot MultiBox Detector) now? Regards Shashi + +Responses: +No. TIDL.01.01.00.00 will support Caffe based SSD. TIDL.01.01.00.00 will be available via SDK release by April 6 Regards, Kumar.D + +I Interpret this as TIDL.01.01.00.00 doesnot support Caffe based SSD. + +Current release TIDL.01.00.00.00 does not support Caffe based SSD Next release TIDL.01.01.00.00 will support Caffe based SSD + diff --git a/data2/text/range/0-5000/676166.txt b/data2/text/range/0-5000/676166.txt new file mode 100644 index 0000000000000000000000000000000000000000..0508e1c45f75938311f94b74503da3cc387f3495 --- /dev/null +++ b/data2/text/range/0-5000/676166.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA3MV: Dual memory controller PCB tracing (with ECC) + +Query Text: +Part Number: TDA3MV Other Parts Discussed in Thread: TDA2, Hello, we making designs of some ADAS devices on TDA2, TDA3. Sure we have NDA. We want use dual memory controller configuration. But all that we seen before (EVM and other designs) using only one memory controller. Where can we get PCB tracing (design or recommendations) for dual controller + ECC? Recommendation about tracing of FCBGA 784 (ABZ package) will be useful too. + +Responses: +Hi, TDA3MV does not support a dual memory controller configuration. For TDA2, you can check under the "Technical Documents" on the product page for the reference design files as shown below. Please let us know if this does not answer your question; thanks! Best regards, Kevin + diff --git a/data2/text/range/0-5000/676191.txt b/data2/text/range/0-5000/676191.txt new file mode 100644 index 0000000000000000000000000000000000000000..a01854713e9a4eda5a5bfb11354ed1ae6e7105a7 --- /dev/null +++ b/data2/text/range/0-5000/676191.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: ABC package height after soldering + +Query Text: +Part Number: TDA2 Hello, The customer would like to know the min/max height of TDA2 ABC package after soldering. They want to know exact thickness of TDA2 ABC to attach thermal pad. In TDA2 ABC data manual, min/max height is 2.62/2.96 and seating plane is 0.15. Hence, the min/max height after soldering TDA2 should be 2.47/2.81. correct? Thanks, Lloyd + +Responses: +The min/max height after soldering is 2.47 to 2.96. The logic is that the min height may be reduced by the maximum height of the seating plane (2.62-0.15) whereas the max height may be reduced by the minimum height of the seating plane (2.96-0). Regards, Kyle + diff --git a/data2/text/range/0-5000/676205.txt b/data2/text/range/0-5000/676205.txt new file mode 100644 index 0000000000000000000000000000000000000000..3223ddbb1cbfb3fff2d1ef405a22203f244a91cd --- /dev/null +++ b/data2/text/range/0-5000/676205.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: Omnivision Sensors with Vision SDK + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, We are having following queries for sensors/lenses with Vision SDK: Query 1: We understand from that Vision board only one sensor can be connected to TDA2x. We plan to use the Omnivision sensors / lenses to connect to Vision board. (Not using multides) Can you please confirm that capture link from VisionSDK would be able to capture video frame from camera connected to directly to VisionSDK ? Query 2: Has TI used IR camera for any of the test cases ? Do you see any compatibility issues in using IR camera sensor with VisionSDK, capture link ? Please provide your views. Thanks, Abhishek + +Responses: +Hi Abhishek, Q1: Yes. Vision SDK supports OV10635 camera module which is connected directly to TDA2 EVM. Q2: You can connect camera module with IR filter on TDA2. You can check out this DM demo with IR camera done by our 3rd party using Vision SDK. www.youtube.com/watch Regards, Stanley + diff --git a/data2/text/range/0-5000/676481.txt b/data2/text/range/0-5000/676481.txt new file mode 100644 index 0000000000000000000000000000000000000000..8a20d8cd2e11d48db82af89378767873ccdd93e3 --- /dev/null +++ b/data2/text/range/0-5000/676481.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2: EVE can not perform simple DMA transfer after executing TIDL + +Query Text: +Part Number: TDA2 Hi, When EVE tries to perform the simple 1-D DMA transfer from external memory to IBUFA after executing TIDL library, the simple 1-D DMA transfer does not work. . In our case EVE first runs our simple 1-D DMA transfer and it performs well, then EVE runs TIDL and later EVE run our simple 1-D DMA transfer again and it does not work. (the data in external memory is not actually copied to IBUFA on the completion of the simple 1-D DMA transfer) Our module implemented the simple 1-D DMA transfer by following the source code in eve_sw_01_12_00_00\starterware\examples\edma_simple_eve\src\main.c, which uses register level CSL for edma to setup single 1D -> 1D transfer. However, the TIDL uses DMA_UTILS to perform auto-increment DMA and somehow it nullifies the later our simple 1-D DMA transfer. Even we change our 1-D DMA transfer by not using register level CSL APIs but using DMA_UTILS APIs. our 1-D DMA still did not work after running TIDL. We wonder if there is a universal method to implement our 1-D DMA (moreover, 1D -> 2D, 2D -> 1D DMA) and work well with other coexistent module using DMA such as TIDL? Mark. + +Responses: +Hi Mark, Can you check the status of edmaCC->IPR register after executing TIDL? Regards, Anshu + +Hi Mark, We haven't heard from you on this. Is this issue resolved? Regards, Anshu + +Hi Mark, We haven't heard back from you on this issue. We are closing this issue, if you still have problems you can reopen it again. Regards, Anshu + +Hi Anshu, We try three test cases and two scenarios and get the same interesting result. DMA works well when source and destination are both DRAM, but DMA fails at 2nd time when destination is IBUFA(EVE internal RAM). So the problem could be related to why IBUFA can't be accessed by DMA after executing TIDL. We doubt TIDL does not restore EVE internal buffer switch so that DMA can't not access IBUFA. Our test cases and scenarios are: [test A] use our simple 1D dma to do the test step 1: run our simple 1D DMA. step 2: run TIDL. step 3: run our simple 1D DMA again. [test B] use the example the same as file REL.DMAUTILS.00.08.00.02\dmautils\test\edma_utils_autoincrement_1d_test\src\edma_utils_autoincrement_1d_test.c to do the test step 1: run edma_utils_autoincrement_1d_test. step 2: run TIDL. step 3: run edma_utils_autoincrement_1d_test again. (OK for DMA transfer from DRAM to DRAM. Fail for DMA transfer from DRAM to EVE IBUF_A) [test C]: use the API EDMA_UTILS_memcpy2D() to do the test step 1: run EDMA_UTILS_memcpy2D(). step 2: run TIDL. step 3: run EDMA_UTILS_memcpy2D() again. : DMA transfer from DRAM to DRAM, for all three tests. DMA transfer OK in step 1. DMA transfer OK in step 3. : DMA transfer from DRAM to IBUFA, for all three tests. DMA transfer OK in step 1. DMA transfer fails in step 3. (but the return code of DMA function shows no error) Mark. + +Hi Mark, As requested earlier can you check the value IPR register before and after executing TIDL just to check if there are any interrupts pending in EDMA. You can see the value of this register using CSL overlay structure for EDMA (CSL_EdmaccRegsOvly->IPR). Also can you mention the version of TIDL which you are using? Regards, Anshu + +Hi Anshu, The version of TIDL we used is REL.TIDLSRC.01.00.00.00 Mark. + +Mark, Can you read the value (32bits) at the following memory location before and after executing TIDL 0x400A1068 ( This corresponds to IPR register)? Regards, Anshu + +Hi Anshu, I use the following code to get the content of IPR register: volatile unsigned int IPR_value; volatile unsigned int *pEDMA_CC_IPR = (volatile unsigned int *) 0x400A1068; IPR_value = *pEDMA_CC_IPR; printf("EDMA_CC_IPR(0x%08x) = 0x%08x \r\n", pEDMA_CC_IPR, IPR_value); And the results are: Before running TIDL: EDMA_CC_IPR(0x400a1068) = 0x00000000 After running TIDL: EDMA_CC_IPR(0x400a1068) = 0x00000000 Mark. + +Hi Mark, I dont see any issue which could cause the behavior which you are observing. Can you share you simple DMA code so that we can try it at our end? Regards, Anshu + +Hi Anshu, We find out the root cause is not only related to EDMA but also EVE IBUF switch. After switching to correct IBUF view, EDMA can transfer from DRAM to IBUFA correctly in [test B] and [test C]. Mark. + diff --git a/data2/text/range/0-5000/676905.txt b/data2/text/range/0-5000/676905.txt new file mode 100644 index 0000000000000000000000000000000000000000..6a4dba68241bb5d2e8d4fed048e724533ebc5554 --- /dev/null +++ b/data2/text/range/0-5000/676905.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: NDK 2_24_02_31 debug print + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello everyone! I am trying to do some modifications within the TCP source files. I am using VISION_SDK_02_12_01_00 for Windows. In order to do some debugging, I have used "DbgPrintf" and "printf" functions. However, when one of these functions gets invoked, I cannot see an appropriate output on the serial port. At first, I have used a MicroSD card to load the AppImage and I could not see any output of these functions. After that, I have loaded the AppImage using JTAG connection and CCS and I have not noticed the output neither on the UART console nor on the CCS console. Is there any solution to debug the NDK code using debug prints that would be visible on the UART console, or as the second solution, to be visible on the CCS console? I would like that solution not to imply using any application beyond the VSDK, i.e. I would just like to run the AppImage and to get the desired print outputs. Thanks in advance, Marko + +Responses: +Hello Marko, The NDK debug prints (using printf and dbgprintf) are not routed to serial port and are only console prints. These will only come on CCS console. We don't support serial prints in NDK as it is independent package. There are 2 options 1. After loading appimage and before running use-case, connect CCS and load symbols. After this you should get prints on console. 2. If you are sure that your debug code won't run before initialization of VSDK, you can directly Vps_printf function of VSDK (define prototype locally & declare it as extern). + +Thanks, Prasad. Linking the Vps_printf function with NDK resolved my issue. + diff --git a/data2/text/range/0-5000/677285.txt b/data2/text/range/0-5000/677285.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a648bcd9048dce3ab822e8743c48676299de593 --- /dev/null +++ b/data2/text/range/0-5000/677285.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: Interfacing with AWR1642BOOST EVM (Radar Sensor) + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: AWR1642BOOST, AWR1642, TDA2 Hi, We are looking at connecting the AWR1642BOOST EVM to the TDA2X EVM through CAN. However, we noticed that the AWR1642BOOST EVM has a single CAN-FD port while the TDA2X EVM has a single Classic CAN port. Can the AWR1642BOOST EVM be configured to send plain Classic CAN messages via the CAN-FD port? If not, what is the recommended method for interfacing the AWR1642BOOST EVM to the TDA2X EVM via CAN? Regards, Ranjith + +Responses: +Hi Ranjith, I'm not familiar with the AWR1642BOOST EVM. I just checked the EVM datasheet: www.ti.com/.../swrs203 There are described 2 CAN ports: one CAN-FD and one classic. Can you please check again documents and inspect your board for a second CAN? Also, what is the version of your board? Regards, Stan + +Hi Stan, Thanks for quick response. The datasheet link present in your comment is of the AWR1642 Radar Sensor, not of the EVM. Datasheet of AWR1642BOOST EVM is available at www.ti.com/.../swru508a.pdf This document mentions of only one CAN-FD Connector in Topic 1.2 Key Features, as well as in Figure 1. EVM (Front). So, It looks like the EVM board is exposing only CAN-FD interface, out of the 2 CAN Interfaces provided by AWR1642 Radar Sensor. Regards, Ranjith + +Hi Ranjith, Sorry, I didn't realize that I was looking at the chip datasheet. I've checked also the EVM document. It looks like classic CAN can be reached on one of the connectors (e.g. J1). CAN is muxed with SPIA_CS and SPIA_CLK internally, hence CAN must be selected in software. CAN is also available on other 2 pins: TRACE_DATA_12 and TRACE_DATA_13 which are also routed to J1. Note that you will need an external CAN PHY transceiver module/PCB, because the 2 pins are a simple, CMOS RX/TX pair. (CAN-FD has onboard PHY) Regards, Stan P.S. Now I recall that if you need only the two nodes on the network (AWR and TDA2), it could be possible to connect them PHY-less. I.e. TX ----> RX RX <------TX , provided that voltage levels match. I didn't try this however. + diff --git a/data2/text/range/0-5000/677296.txt b/data2/text/range/0-5000/677296.txt new file mode 100644 index 0000000000000000000000000000000000000000..583cf096fa0be843bcc44fb3f34ea6e64bfb6ba0 --- /dev/null +++ b/data2/text/range/0-5000/677296.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: TDA2H and TDA3x ：DSP benchmarks + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI experts， When i run below test code on dsp，i found out the TDA3x's DSP is more efficient. Test Code: #define TSC_getDelay(preTSC) ((unsigned int)((0xFFFFFFFFl+TSCL)-(unsigned long long)preTSC)+ 1) short *T0; T0 = (short*) Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR, 10240, 8U); //DDR { int t=0; int t0_time; int pclk; TSCL=0; pclk=TSCL; for(t =0;t<10240;t++) { T0[t] = t; } t0_time= TSC_getDelay(pclk); Vps_printf("DEBUG:---DDR = %d Result = %d ",t0_time,T0[1024]); } Result: [DSP1 ] 38.649484 s: DEBUG:---DDR = 12412 Result = 1024 //TDA3X with 709M DSP ;VSDK2.12 [HOST] [DSP2 ] 58.513542 s: DEBUG:---DDR = 43946 Result = 1024 //TDA2H with 750M DSP; VSDK2.12 linux Any ideas what is going on? Thank you. Best Regards Sid + +Responses: +Have you checked if they are both built in release mode? You can double check the asm file generated for this file and see that the ASM code for this code section is the same for both. + +also make sure no task preemption during the execution of this code, it can be assured by interrupt disable and enable before and after the code as below UInt hwiKey = Hwi_disable(); :::::::::::::::::::::::::::::::::::: code ::::::::::::::::::::::::::::::::::: Hwi_restore(hwiKey); regards, Shiju + +Hi Jesse & Shiju, Thanks . I found out when run the test code before my usecase started on tda2x, the result will be close to tda3x. The tda3x is only run a simple chains for test. when my usecase start on tda2x, there will have other three alg plugin links also run on dsp2, therefore the test code will consume more times to run. I think i need Optimization my alg code. Best Regards Sid + diff --git a/data2/text/range/0-5000/677488.txt b/data2/text/range/0-5000/677488.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b3dd6b6670210054118c4718bc2097080c982f2 --- /dev/null +++ b/data2/text/range/0-5000/677488.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: video input raw bayer(RGGB) 12bit to RGB888 + +Query Text: +Hi all, Now I'm using TDA2xx and VisionSDK 2.9. The video sensor is AR0132 whose format is RGGB 12bit parallel. But the algorithm needs RGB888 format as input. Does anyone know how to convert the raw bayer data to RGB data? The ideal solution is that TDA2xx itself has the hardware modules for format converting. Thanks. + +Responses: +Hi Hu, There is no HW module in TDA2x to convert Bayer to RGB888. You could use ISP module to convert from Bayer to RGB888, but it is supported on TDA3x and TDA2Px. Regards, Brijesh + +Hi Brijesh, Actually, we are planning to use TDA2Px. Could you tell me more details about how to convert the data format with ISP module? It's better to give us the user manual of TDA2Px. Thanks. + +Hi Rooney, You could go through the ISS based usecases on TDA2PX in VSDK. These usecases captures bayer data from sensors like OV10640 and uses ISP convert Bayer into YUV420. Regads, Brijesh + +Hi Brijesh, Which version of VSDK support TDA2PX ? If there is a usecase that support the conversion from bayer to RGB888 inside VSDK? + +Hi rooney, Starting from VSDK 3.2 release supports TDA2Px platform and there are ISS usecases in VSDK which uses ISP to convert Bayer to YUV420.. Regards, Brijesh + diff --git a/data2/text/range/0-5000/677875.txt b/data2/text/range/0-5000/677875.txt new file mode 100644 index 0000000000000000000000000000000000000000..87271c7f59e242e9e940f8b3328ef3f7981ba7c6 --- /dev/null +++ b/data2/text/range/0-5000/677875.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: Compatibility of ISP and CMOS Image sensor + +Query Text: +Part Number: TDA2 how we can say that this ISP is compatible with this CMOS image sensor?? + +Responses: +Hi Harsh, ISP is not supported on TDA2x.. It is available on TDA3x and TDA2Px. Regards, Brijesh + +Hi Brijesh, If i work on TDA3x then if i want to choose an ISP for my cmos sensor like OV10640, then how will i choose a perfect ISP for that. How we can say that ov490 is compatible with OV10640. how we compare different ISP's ? + +Hi Harsh, ISP is HW module and is internal to TDA3x. OV490 is ISP from omnivision. Go through the details of each ISP and then you could compare.. Regards, Brijesh + +Harsh, I am assuming that there are no further questions and so closing this thread. You can reopen it if you have any more questions.. Rgds, Brijesh + +Hi Brijesh, As you say that TDA3x has its own internal ISP. So, do we need any external ISP for frame based functions ? + +Hi Harsh, Yes, TDA3x has its own internal ISP, so you dont require external ISP for Bayer to YUV conversion.. Regards, Brijesh + +Hi Brijesh, For image stablization or for noise reduction should i need external ISP? + +Harsh, There is a noise filter in ISP, but for image stabilization, you need to develop algorithm. Rgds, Brijesh + +Brijesh, Thank you Regards, harshgarg + diff --git a/data2/text/range/0-5000/678527.txt b/data2/text/range/0-5000/678527.txt new file mode 100644 index 0000000000000000000000000000000000000000..01a93bb5ca0ce5f76a6e3e1eff8e6e508e31a018 --- /dev/null +++ b/data2/text/range/0-5000/678527.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: I want to buy a ADAS Development board + +Query Text: +Part Number: TDA2 Dear: I want to buy a ADAS Development board. Can you give me some video of LDW,FCW,TSR,,PDS base on TDA3x and TDA2x , My Email address is welcomezyh@163.com. Zhang + +Responses: +Hi - You may find some CES youtube videos for these demo. https://www.youtube.com/watch?v=lBXmCEYdqio TI www also has details for EVM purchase etc. regards yashwant + diff --git a/data2/text/range/0-5000/679030.txt b/data2/text/range/0-5000/679030.txt new file mode 100644 index 0000000000000000000000000000000000000000..16841c11a234cb9980950957555b0dd26a2cfc1f --- /dev/null +++ b/data2/text/range/0-5000/679030.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2: EDMA_UTILS_globalReset(); how to use + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio In my project, there are 7 parts. Each part needs to move data from DDR to L2 by DMA and then do operations. I imitates the pingpang pattern in SDK_VISION_03_02_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils\test\edma_utils_autoincrement_test. A EDMA_UTILS_globalReset () is called when the project is initialized; but the first two parts are normal when the int status = biasDmaAutoIncrement__Init returns a value, and the back value of the next 5 parts is a -1 description of the configuration failure. Then I call EDMA_UTILS_globalReset () once at the beginning of each part; the latter part can work, and finally I want to ask EDMA_UTILS_globalReset (); should it be called once or when you need to use it again? + +Responses: +Hi Shuai, Can you explain what you mean by parts? Does it mean that you have 7 transfers which you want to do for each trigger? EDMA_UTILS_globalReset () is supposed to be called only once per frame. Regards, Anshu + +Hi Anshu cpu reset start main , Initialization mem , read a image , call fun1, call fun2, call fun3，call fun4，call fun5，call fun6，call fun7 return. in each fun copy data from DDR to L2 and copy data to DDR. I think EDMA_UTILS_globalReset () should call once in Initialization ?? BESTWISHES + +Shuai, Basically if you call EDMA_UTILS_globalReset for each function then it will release all the resources and re-allocate for each of the fun*. So it should be ok only to call it once before fun1. In this case each of the transfer will happen on different DMA channel. Regards, Anshu + diff --git a/data2/text/range/0-5000/679667.txt b/data2/text/range/0-5000/679667.txt new file mode 100644 index 0000000000000000000000000000000000000000..c33633389e1213312ccc2508ffae23e8d947cff4 --- /dev/null +++ b/data2/text/range/0-5000/679667.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: NDK 2_24_02_31 TCP slow start + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello everyone! We are wondering about slow start conditions, within the source file: VISION_SDK_02_12_01_00\ti_components\networking\ndk_2_24_02_31\packages\ti\ndk\stack\tcp\tcpout.c We have probably understood the meaning of the first slow start condition: pt->snd_una==pt->snd_max so, that means that the sequence number within the lastly sent TCP header (within the segment that is not acknowledged) is equal to the sequence number of the last segment of the current window. Please, correct me if I am not right about this. Another contition is the following: pt->t_tidle > (pt->t_trtx<<2) We are wondering about these tick counts: t_tidle and t_trtx, what exactly thay represent. We have observed the snd_cwnd value and it holds the maximum value (65535) during the whole time of the communication. After we had decreased the bandwidth on the router, we have noticed that snd_cwnd sometimes decreases. Also, we have added some prints within the slow start IF statement and we have not noticed any occurence of the true slow start condition. We hawe also noticed that this TCP does not perform the slow start at the beginning of the data transfer, but it immediately sets the maximum 16-bit window size. What would be the best way to trigger the slow start? Thanks in advance, Marko + +Responses: +Hello Marko, Kindly give us some time to come back on your issue. I have asked our NDK expert to comment, he will check possible issue and let you know. Sorry for the inconvenience. + +Hi Marko, There are no configuration for the slow start mechanism in the stack. Unfortunately, we simply don't have the staff to go into the implementation details. If you are seeing an issue with the feature (from a black box perspective), please include a test case (with description). Todd + +Thank you Todd, During the long testing time we have noticed that the slow start condition never gets satisfied, so we have suspected that there is some missfunction involving this mechanism. Nevertheless, after another couple of experiments, we have succeeded to trigger the slow start. We observed the cwnd value and indeed it gets set to one MSS, thus proving its functionality. Best regards, Marko Gostovic + diff --git a/data2/text/range/0-5000/679675.txt b/data2/text/range/0-5000/679675.txt new file mode 100644 index 0000000000000000000000000000000000000000..e53dc265cfca3413dc8cf429cdf257385adb4e6a --- /dev/null +++ b/data2/text/range/0-5000/679675.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: No communication on SATA interface + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi everyone, I am using VSDK Linux configuration running on TDA2x SoC and trying to have communication between TDA2x and hard disk drive via SATA interface. However, I have no communication at all. All 4 signals on SATA connectors are on 0 level. During the u-boot execution I noticed messages SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode and during kernel execution message SATA link down (SStatus 0 SControl 300). Can someone explain me what these messages mean? Also, I noticed that result of command parted -l is giving me only partitions on SD card from which system is run, but there is no SATA device. Should there be some change in configuration of linux kernel so SATA interface is active? Thanks in advance, Sasa + +Responses: +Hi Sasa, If I remember well, most EVMs do not have a power supply for the hdd. Can you check the hdd spins and all necessary power supplies are in place (they should be described on the hdd itself) . Most probably you will need to provide power externally. Thanks, Stan + +Hi Stan, we are using custom board with SATA interface on it. Power supply for HDD is external and it is working properly. Best regards, Sasa + +Hi Sasa, sorry for the delayed response. I have pinged a Linux expert to help. Regards, Yordan + +Hi Sasa We have not been testing SATA connectivity as part of our SDK releases for some time now(not much of customer traction for SATA in automotive) Can you clarify on the SDK version that you are testing and also attach a full kernel bootup log - can review and provide feedback. In general SATA link down message indicates that the link establishment did not work - need to check for potential connectivity issues. As Yprdan asked before, can you confirm if the external HDD is independently powered and you see the HDD spinning up as part of the init sequence? + +Hi Sriram, problem was SATA connector which was soldered in wrong way(turned for 180 degrees around). Thank you for your effort. Regards, Sasa + diff --git a/data2/text/range/0-5000/680262.txt b/data2/text/range/0-5000/680262.txt new file mode 100644 index 0000000000000000000000000000000000000000..c1231212d193ac9e7873fb522d135235279ae29b --- /dev/null +++ b/data2/text/range/0-5000/680262.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: [TIDL] JDetNet_SSD output format + +Query Text: +Part Number: TDA2 Hi, I ran JDetNet_SSD with tidl_config_jdetnet.txt in TIDL 01.01.00.00 and stats_tool_out_eve.bin (stats_tool_out_eve.bin.zip) was outputted in folder ./modules/ti_dl/test/out. What is data format of stats_tool_out_eve.bin ? Best regards, + +Responses: +Please refer to below thread.. e2e.ti.com/.../2503936 + diff --git a/data2/text/range/0-5000/680405.txt b/data2/text/range/0-5000/680405.txt new file mode 100644 index 0000000000000000000000000000000000000000..07a642f20dee8f795ea797e2b29d5abea23c63c0 --- /dev/null +++ b/data2/text/range/0-5000/680405.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: The resolution limited of TDA2X + +Query Text: +Part Number: TDA2 Hi We need to use two LCD(LCD1 & LCD2) to output two different videos. The resolution of the two videos if 1920*1080@30fps & 1280*720@30fps. We want to confirm that , dId it has the limitation of the resolution & fps of the DSS module ? And what's the MAX resolution & fps can the DSS support? Please take a look. Thanks. + +Responses: +Hi, Can you please refer chapter 1 of TDA2xx TRM. Thanks. Regards, Rishabh + +Three LCD outputs, each one with dedicated overlay manager, for support of active matrix color displays (up to 24-bit interface). Maximum listed resolutions are not supported concurrently on all outputs. • First main LCD output delivered on MIPI® DPI 1.0 LCD pixel interface, supporting up to WUXGA (1920 x 1200) with reduced blanking periods. • Second and third LCD outputs delivered on MIPI DPI 2.0 LCD pixel interfaces, supporting up to WUXGA (1920 x 1200) with reduced blanking periods. I saw this description , we just want to confirm that does it will has diference when we use two LCD at the same time ? Or , it can support 1920*1200 no matter how many LCDs we used, right? + +Hi User, Yes, DSS can output two independent resolutions ie 1920x1080@30fps and 1280x720@30fps on LCD1 and LCD2 outputs.. it is possible. Regards, Brijesh + diff --git a/data2/text/range/0-5000/680421.txt b/data2/text/range/0-5000/680421.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c7ca0904225c3aa6e69ccedce99b44207fbab8e --- /dev/null +++ b/data2/text/range/0-5000/680421.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: VIP & CSI2 + +Query Text: +Part Number: TDA2 HI As the TRM shown, there are VIP modules & CAL-CSI2 module. Does the VIP modules & CSI2 module could work simultaneously? Thx. + +Responses: +Hi, First, TDA2x does not have CSI2 input. TDA3x, TDA2Px and TDA2Ex support CSI2 input. On these devices, yes VIP and CSI2 input can run simultaneously. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/680584.txt b/data2/text/range/0-5000/680584.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ce2dd405989ddfcc702d8c67c249bc05f28b809 --- /dev/null +++ b/data2/text/range/0-5000/680584.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EX17EVM: BT656 For TDA2Ex + +Query Text: +Part Number: TDA2EX17EVM Tool/software: Linux Dear Sirs: We use latest Processor SDK Vision. We want to make sure the BT656 is really working on TDA2 so we did the following test: 1. We use J6E Board with a VAYU VISION board with the OV10635 sensor 2. When using BT601 with OV 1063x setting setting 0x4700 and 0x4708 inside the PSDK, the code working fine. 3. When using BT656 with OV 1063x setting setting 0x4700 and 0x4708 inside the PSDK and modify the related OV video setting to be a)pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_ES; b)pPortCfg->syncType = SYSTEM_VIP_SYNC_TYPE_EMB_SINGLE_422_YUV; and other setting remain same as before i.e. pInstPrm->videoIfWidth = SYSTEM_VIFW_8BIT; pInprms->dataFormat = SYSTEM_DF_YUV422P; pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; ... Please refer to PROCESSOR_SDK_VISION_03_02_00_00\vision_sdk\apps\src\hlos\common\chains_common.c where captureSrc == CHAINS_CAPTURE_SRC_OV10635 The above OV BT656 setting is working in our DM81xx board, but not in J6 Entry. Do you have any idea to know what could be the problem to no VIDEO input in BT656 mode? Regards, /ckhsu + +Responses: +Forgot to said, the above setting we set the pixelClk to RISING, and we also test on the FALLING and both not working. And we also use another J6Entry board and attach a TVP5158 to it, with setting BT656 on it, no matter what setting on 1CH/4CH, interlace, 8 bit, none of them work in BT656 mode. Please let me know what could be my problem. Regards, /ckhsu + +Hi hsu, Can you please VIP register? I am interested in in mode and data size register.. As the config looks correct, but can you also check the board muxes are set correctly.. Regards, Brijesh + +Since OV 10635 is 10 bits output in VISION board, to prevent the BT656 signal from OV is in fact from D9 to D2, we also create a H/W connector to make OV D9 to D2 is connected to D7 to D0 in J6E board. However the result is still the same. We will post the register values later after we dump it. Regards, /ckhsu + +The problem is solved. This problem is only in PSDK Linux version but not in BIOS version. + diff --git a/data2/text/range/0-5000/680976.txt b/data2/text/range/0-5000/680976.txt new file mode 100644 index 0000000000000000000000000000000000000000..e498f0bc5372ff25b3fb8a65577e151109b4892f --- /dev/null +++ b/data2/text/range/0-5000/680976.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: How to make TIDL Test Clips + +Query Text: +Part Number: TDA2 Hi, Our customer has an avi file that records the road. Our customer would like to use this file as a TIDL Test file instead of the inData_semseg file provided by TI. Please let me know how to make an avi file the TIDL Test Clips(inData_semseg file). Thanks JP Park + +Responses: +Hi JP Park, can you check if that thread can help you: e2e.ti.com/.../660676 Regards, Yordan + +Hi Yordan Kamenov Thanks to you, the problem has been solved. Thanks for your reply. Regards, JP Park + diff --git a/data2/text/range/0-5000/681009.txt b/data2/text/range/0-5000/681009.txt new file mode 100644 index 0000000000000000000000000000000000000000..e57e1eb2a19e9560619500d25bef7b2041a23e4d --- /dev/null +++ b/data2/text/range/0-5000/681009.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: RVP Linux usecase for OpenCV + +Query Text: +Part Number: TDA2 Tool/software: Linux Is OpenCV support in TDA2X RVP board? example as in TDA2 EVM OpenCV Canny example? + +Responses: +Hi Krishnakumar, We haven't validate OpenCV in TDA2X RVP board, We validated on TDA2X EVM I am checking with team what all validated on TDA2X RVP board & will get back to you ? Regards Suryamani Jena + +Hi Krishnakumar, Are you facing any issues on running OpenCV on TDA2X RVP board ? + +Hi OpenCV is not supported on TDA2x RVP board regards, Shiju + +Hello Shiju, Thank for the information, We need to run standard VisionSDK OpenCV usecases on RVP board. What is the best approach? Regards, KK + +Hello, While there are no usecases built for OpenCV out of the box, it is possible to add OpenCV to RVP usecases. The biggest difference between RVP and EVM in this regard is all capture on RVP is via FPD Link III. OpenCV usecases must be modified to use the multichannel lvds capture initialization instead of the single camera VIP initialization. Basically, look at a usecase that works with RVP and use the same camera setup initialization in the openCV usecases. Hopefully that is all you need to change, but I have not tested these exact steps here. Cheers, Ben + +Hello Ben, Thanks for your inputs, Considering that we have link-and-chains, is it sufficient that I set capture mode to be "Camera", so that data comes to my Algorithm module? Alternatively, I have ethernet based input, which can receive YUV or RGB data. Capture of data is of less conern. My concern is, 1. Do we need build OpenCV libraries? or the libraries built for EVM A15 core, can be used as it is for RVP A15 core.? 2. We need to change the .cfg, makefile, etc, so that libraries can be linked to algorithm to run the OpenCV example on RVP, in this context tutorial/guidance will be helpful. Regards, KK + +Hi you do not need to rebuild the OpenCV libs, But VSDK apps needs to be rebuild after making below changes 1. Add Open CV UC in TDA2x RVP config (D:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\configs\tda2xx_rvp_linux_all) 2. Modify the OpenCV UC to use FPD link cameras as Ben suggetsed How to build and run OpenCV is documemted in VisionSDK_UserGuide_opencx.pdf regards, Shiju + diff --git a/data2/text/range/0-5000/681137.txt b/data2/text/range/0-5000/681137.txt new file mode 100644 index 0000000000000000000000000000000000000000..61c48822d7f77d284df3b7c0cd6a4e92c986e7b5 --- /dev/null +++ b/data2/text/range/0-5000/681137.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Files needed for running SemSeg Semantic Segmentation usecase (Vision SDK, tidl) + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, We have a TDA2X dev board and using Vision SDK 3.2.0.0 If I understand it correctly, we need additional files (besides the code in AppImage) to run this example: 1) Input video and header files. At this point we would love to have sample files, but I do not have access to CDDS yet. Is there a specific requirements for video format, resolution required, etc? I saw some info and even sample files 700x400 in another thread here, but now sure if this video works or not. I can try. 2) Since SemSeg uses TIDL, we probably need the right converted model files like NET.BIN, PRM.BIN, etc ? Right? Where can I find them? There are some example files in vision_sdk\apps\tools\TIDL_files folder, but I do not think these are the right ones for SemSeg usecase... Thanks, Mikhail + +Responses: +Hi, 1. You can further refer to below thread e2e.ti.com/.../660676 2. Please refer section 3.6 in TIDeepLearningLibrary_UserGuide.pdf to generate model files like NET.BIN, PRM.BIN for your trained models or inputs. Thanks, Praveen + +Hi Praveen, Thanks you! I understand part 1. We can try to generate our own video or wait for CDDS access to get the sample one. Regarding part 2 (NET.BIN, etc). At this moment, our model cannot be converted to TIDL (not supported). I was under impression that there is a sample model from TI specifically for the Semantic Segmentation usecase. Am I wrong? Thanks, Mikhail + +Hi Mikhail, I mean to say there are some sample model bin files in TIDL package to run Semantic Segmentation usecase, but if you want to run a caffe model trained by you then you need to generate these bin files. Thanks, Praveen + +Hi Praveen, Do you know where I can get some sample model bin files for SemSeg usecase? Through CDDS ? I could not find anything in Vision SDK itself. Thanks, Mikhail + +Hi Mikhail, The model files like NET.BIN, PRM.BIN for SemSeg usecase are in Vision SDK in the below folder.. "REL.TIDL.01.01.00.00\modules\ti_dl\test\testvecs\config\tidl_models\jsegnet21" tidl_net_jsegnet21v2.bin tidl_param_jsegnet21v2.bin Thanks, Praveen + +Thank you! SemSeg example works! Mikhail + diff --git a/data2/text/range/0-5000/681162.txt b/data2/text/range/0-5000/681162.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c1d1d8f380f1aa4c5a231f98b58efe8a906beef --- /dev/null +++ b/data2/text/range/0-5000/681162.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: How SPI+emda is configured and used in vision SDK + +Query Text: +Part Number: TDA2 Suppose I'm working on SPI salve+edma under IPU2 in startware, can it work when transplant it to IPU2 （main app） under VISION SDK, but i find it cannot work for the EDMA conflict, because each core call UtilsEdma_init under VISION, how should I avoid conflict, or how to configure EDMA +spi in VISION SDK, thank you very much! + +Responses: +Hi, You should replace the starterware EDMA calls with EDMA LLD calls in order to use the same by the main app in Vision SDK. I hope you understand that you can't make it a use case as you don't have any link for SPI slave + edma. Regards, Rishabh + +HI,Rishabh THANK you for your Reply! I want to create a always running task for spi receive ,not in link. I have some problem as follows : 1，can i use the BSP example "bsp_examples_mcspiLoopback_target" transplant it to IPU2 （main app） under VISION SDK 2，BSP example "bsp_examples_mcspiLoopback_target" why can work well in IPU1 ，but Work is not normal in IPU2，so I want to know how to set in order can work in different core。 Regards, KOKO + +Hi, First you should try to port bsp_examples_mcspiLoopback_target to IPU2 and run it using gel. You might need to set up AMMU, interrupts, etc. Then you should try to run it from Vision SDK. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/681184.txt b/data2/text/range/0-5000/681184.txt new file mode 100644 index 0000000000000000000000000000000000000000..5fcbd0ff88aae37bba645f719b4592a841998b97 --- /dev/null +++ b/data2/text/range/0-5000/681184.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: YUV422 for discrete sync + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS We want to display YUV422 Discrete Sync. Discrete sync Valid pixel in D[7:0]. But Our HW layout Data pin is connected to D[9:2]. How can I set SW to display YUV422 Discrete Sync? + +Responses: +Hi, In DSS, there is no way to shift the output. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/681661.txt b/data2/text/range/0-5000/681661.txt new file mode 100644 index 0000000000000000000000000000000000000000..e9c75fcb9c08b8a6f365136e66082ed94e7c0acb --- /dev/null +++ b/data2/text/range/0-5000/681661.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA3LA: Software/tools required to develop radar software + +Query Text: +Part Number: TDA3LA Other Parts Discussed in Thread: TDA2, AWR1243 Tool/software: Code Composer Studio Dear experts! I recently joined new automotive radar project in which we are trying to use AWR1243 + TDA2/TDA3. Because I'm not still familiar with TI's MCU series, I would like to ask you some simple question. To develope the software of radar using AWR 1243+TDAx, which softwares and tools are required. I mean to develop the software, we need to compile source codes, write a binary onto MCU and debug them. So we might need a compiler and tools, etc. for example, "code composer" and "Trace32". Could you anyone list up which softwares and tools are required to develop the radar software for TI radar? We need to prepare a budget for the new project and our project is the radar + +Responses: +Hello coolguy , For the compiler and debugger tool certainly use the Code Coposer Studio, free download here: processors.wiki.ti.com/.../Download_CCS For the binary that you need to compile, there is entire Radar (and Vision) SDK with use cases, documentation, examples, and lots of help in this forum, free download: www.ti.com/.../processor-sdk-vision Start from there, study the docs and come back for help if you need any. Hope it helps Thanks, Alex + +Thanks for the answer. Then, how can a TI radar system be connected to a PC with the code composer installed? USB? UART?, etc.? + +coolguy , You will need a JTAG for that. For TDA3x connection you can use various Blackhawk, Spectrum Digital, and TI XDS emulators. Thanks, Alex + +Thank Alex. Sorry for bothering you. It might be a dumb question to you, but could you let me which one among 4 (Blackhawk, Spectrum Digital, and TI XDS emulators) is the best from your perspective? + +Hello, Not a dumb question at all actually. You need to define what's best for you. Is it if it's cheap and supported, or is it if it more expensive but faster and with additional features? It all depends. For complex projects, it's always good to have a couple different ones to cross-check drifts in the results. I personally use the Blackhawk, it fast enough for me and well supported, never had issues with it. See more comments on the topic from the community over at the CCS forum: Hope it helps, Alex + +Thanks for your answer. All my wonder cleared. + diff --git a/data2/text/range/0-5000/681691.txt b/data2/text/range/0-5000/681691.txt new file mode 100644 index 0000000000000000000000000000000000000000..6e14c305449ae2d48ee6068a1236a2887e487049 --- /dev/null +++ b/data2/text/range/0-5000/681691.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TIDL Normalize Layer + +Query Text: +Part Number: TDA2 Hello, I am trying to convert Caffe-Jacinto model with TIDL convert tool. Problem that I have is that Normalize Layer (from Caffe-Jacinto) is not supported with current version of TIDL (1.1). My question is will it be supported in future TIDL releases and could I use some other norm layers instead? Thanks, Mladen Stupar RT-RK + +Responses: +TIDL supports Batch Normalization layer please use the same. As of now, no plan to support Norm Layer. + diff --git a/data2/text/range/0-5000/681697.txt b/data2/text/range/0-5000/681697.txt new file mode 100644 index 0000000000000000000000000000000000000000..b8b636e893c17fbe96b344fd24d344927ea224bf --- /dev/null +++ b/data2/text/range/0-5000/681697.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: RTOS/TDA2 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, I has Vayu EVM board (Rev.H) + SDK 03_03_00_00 and will drive GPIO_5[8] to output high or low. I refer PDK document "API_Documentation.html" to know how to program it. -------------------------------------------------------------------------------------- Programming sequence of gpio module is: Enable the functional clocks for the required GPIO instance. Perform a pin multiplexing for the required GPIO pin. Enable the GPIO module using the API GPIOModuleEnable. Perform a module reset of the GPIO module using the API GPIOModuleReset. When GPIO is input pin, following configuration is used Enable/disable debouncing feature for the specified input GPIO pin if required, using the API GPIODebounceFuncControl. Program the debouncing time, if required using the API GPIODebounceTimeConfig. Interrupt trigger conditions need to be configured using the API GPIOIntTypeSet. Enable GPIO to generate interrupts on detection of the specified transitions on the decided GPIO pin using the API GPIOPinIntEnable. When GPIO is output pin, following configuration is used A logic HIGH or a logic LOW could be driven on the specified GPIO pin by invoking the API GPIOPinWrite. -------------------------------------------------------------------------------------- my sample code as below: // a. Enable the functional clocks for the required GPIO instance. /* Set the access to the GPMC registers - Enable GPMC Clock */ HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_GPIO5_CLKCTRL, 0x101); while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_GPIO5_CLKCTRL) & (0x00030000U)) != 0x0) { ; } // b. Perform a pin multiplexing for the required GPIO pin. HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE + CTRL_CORE_PAD_MCASP1_AXR6, (0x60000U | CTRL_CORE_PAD_MCASP1_AXR6_MCASP1_AXR6_MUXMODE_GPIO5_8_14)); //C12 GPIODirModeSet(SOC_GPIO5_BASE, 8, GPIO_DIR_OUTPUT); //C12 // c. Enable the GPIO module using the API GPIOModuleEnable. GPIOModuleEnable(SOC_GPIO5_BASE); // d. Perform a module reset of the GPIO module using the API GPIOModuleReset. GPIOModuleReset(SOC_GPIO5_BASE); // Set C12 to high. GPIOPinWrite(SOC_GPIO5_BASE, 8, GPIO_PIN_HIGH); //C12 The sample code still can't drive GPIO_5[8], could you please give me some suggestion. Thanks. + +Responses: +Hi, You should refer to gpio app in \packages\ti\csl\example\gpio folder. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh, I refer gpio sample code and get Luke.Lin (TI technical support of Taiwan ) support. Now GPIO control is workable. Thanks. + diff --git a/data2/text/range/0-5000/682145.txt b/data2/text/range/0-5000/682145.txt new file mode 100644 index 0000000000000000000000000000000000000000..027f7bc1c13aca8b90f876656277542d7d9510bb --- /dev/null +++ b/data2/text/range/0-5000/682145.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: what SL2_SRAM ？ + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 L1D_SRAM : origin = 0x00F00000, len = 0x4000 /* 16 KB SRAM */ L1D_CACHE : origin = 0x00F00000, len = 0x4000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x28000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ L2_CACHE : origin = 0x00828000, len = 0x20000 /* Cache for L2, which is configured as 128 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x08000000 /* DSP Used cachable area */ } SL2_SRAM : origin = 0x5B000000, len = 0x40000 what is SL2_SRAM mean？ + +Responses: +Hi Shuai, This is an internal memory within the IVAHD subsystem. More details are available in the IVA Subsystem chapter in the TRM. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/682517.txt b/data2/text/range/0-5000/682517.txt new file mode 100644 index 0000000000000000000000000000000000000000..fad883854cefa818288d31cd9a9531872f18321f --- /dev/null +++ b/data2/text/range/0-5000/682517.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Power management: LPM(standby) and wakeup support for TDA2XX + +Query Text: +Part Number: TDA2 Hello: this document(http://www.ti.com.cn/cn/lit/an/sprac22/sprac22.pdf) introduce the power manage for TDA2xx about the standby and wakeup. my question is : 1. Can one of M4 core control the MPU(A15) step into standby mode and wakeup it? after wakeup, can A15(linux) recover and continue to run properly? 2. Can one of M4 core also control other IPU DSP step into standby mode? and wake up them sequencely ? 3. Is there external PINs to control the whole TDA2xx SOC step into standby mode and wakeup? Thanks! + +Responses: +Hi Andy, The MPU (A15) would need to exceute the WFI instruction to enter into the standby mode. Additionally any MPU_LPRM registers to be programmed depending on what power mode you would like to enter from the A15 should be programmed by the A15 itself as these registers are not programmable from IPU M4. The IPU could potentially only program the SoC level PRCM MPU registers. I would imagine a potential scheme to be IPU sends a message to the A15 to enter Standby. The A15 programs the SoC PRCM, LPRM and runs the WFI instruction to enter standby. (This may involve some other steps to make sure other tasks on the A15 are quiescent, if there is a peripheral interaction that the A15 talks to and likely to generate interrupts that too is kept quiescent). When the IPU wants to wake up the A15 it can send a message over mailbox. The interrupt of the Mailbox will then wakeup the A15 to restore and continue to run. Again for the DSP case, the DSP itself needs to run the IDLE instruction and write to the PWRCMD register in the C66x corepac. IPU could potentially program the SoC PRCM registers. A similar scheme as the A15 described above can be used. Note the lowest power state of the DSP is power domain off state. If you try to "wakeup" the DSP from this state, you would need to restart the C66x DSP. HW_AUTO (clock gated) state does not require a C66x restart. The code can continue from where it entered clock gate state. TDA2xx does not support gating the clocks of the Core power domain IPs. The external pin can be used to tie up to an interrupt which is routed to the desired core in order to wake up the device. For example, one of the GPIO lines can be used to take an input and the GPIO interrupt can then be routed to the A15/IPU . This interrupt can be used to wakeup the CPU core which then wakes up the rest of the device. Thanks and Regards, Piyali + +Hi Piyali: Thanks . Just one more to confirm that if any cores wakeup, all context will restore and continue to run, no exception? + +Hi Andy, If you are going to HW_AUTO clock gated state or Retention (in the case of A15), all the context is retained even after low power mode. No Exceptions from the hardware behavior. If you are going to PD_OFF state, then you would need to restart that particular CPU. Thanks and Regards, Piyali + +Hi Piyali: Thanks very much. + diff --git a/data2/text/range/0-5000/682746.txt b/data2/text/range/0-5000/682746.txt new file mode 100644 index 0000000000000000000000000000000000000000..40f40fa782fab05ff3461ff7e82bb847f3321dbf --- /dev/null +++ b/data2/text/range/0-5000/682746.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Hello World Example Blinking LEDs No Communication + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, We're having issues running the NDK Hello World example for IPU1 that's included in NSP_GMACSW_4_15_00_00 and uses NDK_2_24_02_31. The software is running on a Vayu EVM and we're using PHY2 on the board. When we run the original example and connect the evm to a linux laptop running Ubuntu 14 the example runs correctly and we can ping it. We can also run the companion helloWorld.c client software successfully. When we connect the evm to a switch we're seeing the LEDs on the PHY2 (P5 on the board) light up and blink indefinitely until power-off. Once the LEds start blinking in this pattern ping or client software will not work even when connected back to the Ubuntu laptop. We've tried other switches as well as other embedded linux devices in place of the Ubuntu laptop and only the ubuntu laptop seems to work. What do the blinking LEDs mean? Once the LEDs start blinking only a power cycle will make them stop. Is there a way to reset something from the TDA and avoid a total power cycle? Thanks, Juan + +Responses: +Hello Juan, Do you have 100Mbps sticker on RJ45 connector of your EVM? If yes, please check below note for this issue in VSDK TDA2xx user guide. The workaround is to configure remote end for 100Mbps. + +Hello Prasad, There are no stickers on our EVM. Also when 1Gbps link is established it seems to work the same as 100Mbps link. Thank you + +Hello, Can you please share use-case logs when you run the hello world application? + +Hi Jmg65, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/683084.txt b/data2/text/range/0-5000/683084.txt new file mode 100644 index 0000000000000000000000000000000000000000..f6b41f323869503685aec7387f9656e8c0fa9fe1 --- /dev/null +++ b/data2/text/range/0-5000/683084.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: TDA2X: PVR:(Error): WSEGL_InitialiseDisplay: Failed to open primary device: No such file or directory [0, ] + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi We are using tda2x self-designed boad , vision sdk (PROCESSOR_SDK_VISION_03_02_00_00). First we run the demo NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) everythig is ok. But when we run the demo 1CH VIP capture + SGX Copy + DISPLAY , we got error log as follows: [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY[liuke Removed SGX Copy] [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 53.101018 s: [HOST] [IPU2 ] 53.106783 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 53.107210 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [HOST ] 53.229091 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 53.227993 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 53.228512 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 53.228817 s: IPC_OUT_0 : Create Done !!! [HOST] [HOST ] 53.229518 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 53.229610 s: SGXFRMCPY: Create in progress for resolution: 1920x1080 !!! [HOST] [HOST ] 53.229671 s: SYSTEM_PVRSCOPE: FIFO /opt/vision_sdk/gpufifo opened successfully PVR:(Error): WSEGL_InitialiseDisplay: Failed to open primary device: No such file or directory [0, ] EGL: eglInitialize() returned 0 EGL: after eglInitialize() eglError (0x3001) ASSERT (sgxFrmcpyLink_drv.c|SgxFrmcpyLink_drvDoProcessEglInfo|219) [HOST] [HOST ] 53.484322 s: EGL: version 6.1745188 [HOST] [HOST ] 53.484322 s: EGL: eglInitialize() failed !!! highly appreciate your help, thanks. !!! + +Responses: +hi NullSrc + Decode + Display does not use GPU and any camera capture. Are you using TDA2x EVM? what is the camera module;e you use? did you built the VSDK Linux as per the UG - VisionSDK_Linux_UserGuide.pdf, please check again regards, Shiju + diff --git a/data2/text/range/0-5000/683277.txt b/data2/text/range/0-5000/683277.txt new file mode 100644 index 0000000000000000000000000000000000000000..d43a58c13977ec440dd42972c3ea9438fe19d647 --- /dev/null +++ b/data2/text/range/0-5000/683277.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: How to configure for EDMA_UTILS_TRANSFER_OUT + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio EDMA_UTILS_autoIncrement_initParam_v2 initParamV2; i configure for EDMA_UTILS_TRANSFER_IN and EDMA_UTILS_TRANSFER_INOUT is work, this time for EDMA_UTILS_TRANSFER_OUT status=0 but it dosenot work , No data is copied to extmem. initParamV2.initParams.numInTransfers = 0; initParamV2.initParams.numOutTransfers = 1; //parameters for ping transfer from external to internal memory and vice versa initParamV2.initParams.transferType = EDMA_UTILS_TRANSFER_OUT; //parameters for in transfer - ping //initParamV2.initParams.transferProp[0].roiWidth = width * 2; //initParamV2.initParams.transferProp[0].roiHeight = height*channels; //initParamV2.initParams.transferProp[0].roiOffset = 0; //initParamV2.initParams.transferProp[0].blkWidth = width * 2; //initParamV2.initParams.transferProp[0].blkHeight = height; //initParamV2.initParams.transferProp[0].blkOffset = 0; //initParamV2.initParams.transferProp[0].extBlkIncrementX = 0; //initParamV2.initParams.transferProp[0].extBlkIncrementY = height; //initParamV2.initParams.transferProp[0].intBlkIncrementX = 0; //initParamV2.initParams.transferProp[0].intBlkIncrementY = 0; //initParamV2.initParams.transferProp[0].extMemPtrStride = width * 4; //initParamV2.initParams.transferProp[0].interMemPtrStride = blkWidth * 4; //initParamV2.initParams.transferProp[0].extMemPtr = (uint8_t *)(inBufExt); //initParamV2.initParams.transferProp[0].interMemPtr = (uint8_t *)(inBufInt[0]); //initParamV2.initParams.transferProp[0].dmaQueNo = 0; //parameters for out transfer - ping initParamV2.initParams.transferProp[1].roiWidth = width * 2; initParamV2.initParams.transferProp[1].roiHeight = height * channels; initParamV2.initParams.transferProp[1].roiOffset = 0; initParamV2.initParams.transferProp[1].blkWidth = width * 2; initParamV2.initParams.transferProp[1].blkHeight = height; initParamV2.initParams.transferProp[1].blkOffset = 0; initParamV2.initParams.transferProp[1].extBlkIncrementX = 0; initParamV2.initParams.transferProp[1].extBlkIncrementY = height; initParamV2.initParams.transferProp[1].intBlkIncrementX = 0; initParamV2.initParams.transferProp[1].intBlkIncrementY = 0; initParamV2.initParams.transferProp[1].extMemPtrStride = width * 2; initParamV2.initParams.transferProp[1].interMemPtrStride = width * 2; initParamV2.initParams.transferProp[1].extMemPtr = (uint8_t *)(outBufExt); initParamV2.initParams.transferProp[1].interMemPtr = (uint8_t *)(outBufInt[0]); initParamV2.initParams.transferProp[1].dmaQueNo = 1; //configure EDMA for ping set both Ext -> Int and Int -> Ext EDMA_UTILS_autoIncrement_init_v2(dmaAutoContextInOut, &initParamV2); status = EDMA_UTILS_autoIncrement_configure_v2(dmaAutoContextInOut, EDMA_UTILS_TRANSFER_OUT); + +Responses: +Hi, Which software package you are using and which version? Regards, Prasad + +Hi Shuai, When you configured OUT have you already configure IN channels? Regards, Anshu + +Hi: Anshu its like this ! if in _fun1 no EDMA_UTILS_globalReset(); then call fun1 6times dmaQue is over, so i must add EDMA_UTILS_globalReset in fun1 ,but this will break dmaAutoContextOut. fun1( out,indata) { EDMA_UTILS_globalReset(); ////////////// EDMA_UTILS_autoIncrement_triggerInChannel_v2(dmaAutoContextInOut); for (j= 0; j < 16; j++) { fun2( out,indata_in[bufIdx ]); EDMA_UTILS_autoIncrement_waitInChannel_v2(dmaAutoContextIn); EDMA_UTILS_autoIncrement_triggerInChannel_v2(dmaAutoContextIn); bufIdx ^= 1; } } for (j= 0; j < 32; j++) { EDMA_UTILS_autoIncrement_waitOutChannel_v2(dmaAutoContextOut); fun1( out[bufIdx],indata); EDMA_UTILS_autoIncrement_triggerOutChannel_v2(dmaAutoContextOut); bufIdx ^= 1; } BESTWISHES SHUAI + +Hi Shuai, This is looking like a different question then the original question you asked. In general following should be the flow 1. EDMA_UTILS_globalReset() -> Call this only once for your frame processing. 2. Setup(init) input channels ( EDMA_UTILS_TRANSFER_IN) 3. Setup(init) output channels ( EDMA_UTILS_TRANSFER_OUT) At this stage we have not touched the hardware 4. Configure input channels ( EDMA_UTILS_TRANSFER_IN) 5. Configure output channels ( EDMA_UTILS_TRANSFER_OUT) Step 4 and 5 are the ones which will go and configure the hardware as per the transfer properties described in the init parameters. It is important to note that number of blocks in input transfer and number of blocks in output transfer should be same. Once this setup is done then you can call trigger and wait as required. I see that in your code you are calling input and output transfers with different frequency . For this case I would suggest you to use two different dmautils context for input and output channels. Configure first context with EDMA_UTILS_TRANSFER_IN and configure second context with EDMA_UTILS_TRANSFER_INOUT and give number of input channels as 0. Then you will not need to call global reset for the output transfer. Regards, anshu + diff --git a/data2/text/range/0-5000/683437.txt b/data2/text/range/0-5000/683437.txt new file mode 100644 index 0000000000000000000000000000000000000000..540935a1bc7fa2540f961444e056369ce9f63d45 --- /dev/null +++ b/data2/text/range/0-5000/683437.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: How can I verify SSD model be used in SDK v3.03 ? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS 1. How can I verify SSD model be used in SDK v3.03 ? 2.Has any document can verify the algorithm add SSD model is better than old one? I can't find any document . So I want to know the answer of this question. Thanks. + +Responses: +Hi Allen , Are you looking for how to run the usecase or SSD model .? to run the usecase we have it documented at VisionSDK_UserGuide_TI_DeepLearning.pdf under vision_sdk\docs\FeatureSpecificUserGuides sections: 3. TIDL file I/O use case 4. Build and Run Semantic Segmentation use case 5. Build and Run TIDL Object detect use case explains how to use / verify SSD model usecase Regards Chetan.M + +Hi Allen, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +Hi, I Have the user guide suggested files. but I cannot run the TIDL_OD use case How can I run the TIDL_OD use case? and what configuration I must to setting? + +Hi Allen, this topic will be discussed in this thread: e2e.ti.com/.../688587 Regards, Yordan + diff --git a/data2/text/range/0-5000/683534.txt b/data2/text/range/0-5000/683534.txt new file mode 100644 index 0000000000000000000000000000000000000000..5039bfa23ead44740e5d0b21a20343eec082ca8e --- /dev/null +++ b/data2/text/range/0-5000/683534.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: About Deep Learning Issue + +Query Text: +Part Number: TDA2 Hi Sir we have issues about TI deep learning in PROCESSOR-SDK-VISION V3.03.00 1, Does TI have SSD design guide (design flow, what kind of framework tool?) 2, Libray can be released? 3. How to implement new model (algorithm) into use case of TI TDA2 EVM? 4.Except SSD, will TI will support Yolo v2/v3? If yes, please provide the detail information (schedule, datasheet…) thanks for the reply. BR Yimin + +Responses: +Hi Yimin, 1. SSD supported TIDL is trained by caffe-jacinto framework. 2. Yes. TIDL library is part vision SDK release ( software-dl.ti.com/.../index_FDS.html) 3. Refer to section 3.6 in user guide (TIDeepLearningLibrary_UserGuide.pdf) 4. Please check the supported layers by TIDL in the data sheet (TIDeepLearningLibrary_DataSheet.pdf). Thanks, Praveen + diff --git a/data2/text/range/0-5000/683774.txt b/data2/text/range/0-5000/683774.txt new file mode 100644 index 0000000000000000000000000000000000000000..94dc0cf7c4b6b175572576b1c677a1ca78db9ad1 --- /dev/null +++ b/data2/text/range/0-5000/683774.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: where can i get vsdk_win64 + +Query Text: +Part Number: TDA2 I'm trying to generate usecase by using generator I installed the lastest version of vision sdk(ver3.30) though, I can't find vsdk_win64.exe The only thing I can find is vsdk_win32.exe, and it does not compitible with my OS... where can i get vsdk_win64.exe ? + +Responses: +Hi Habit, You may refer below post. Currently vsdk_win64.exe is not included in the SDK, but you can build it from source code on your own. Below I attached mine for your convenience. I built it on my own using Cygwin. vsdk_win64_v3.3.zip (Update) Somehow the exe generated by cygwin can not recognize Windows' path. JPG won't be generated because "dot.exe" (included in graphvz) can not be called. The solution is to input "dot -Tjpg xxx_img.txt -o xxx.jpg" to generate JPG manually. + +Thanks a lot (quick answer also) + diff --git a/data2/text/range/0-5000/683854.txt b/data2/text/range/0-5000/683854.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1aa7718400bf0db5b3c772d01b8673fe8045b75 --- /dev/null +++ b/data2/text/range/0-5000/683854.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Power Estimation software + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TPS65917-Q1, TPS659039-Q1 Hi, I'm trying to estimate power consumption of TDA2SX and found multiple mentions of power estimation tool spreadsheed for TDA2xx (Vayu_Power_Spreadsheet_v1p5), where i can find this tool? If its possible i would like to have have some advice on PMIC selection TDA2SX, TPS659039-Q1 from EVM looks rather unattractive due to BGA package and additional power routing "complications", but I'm unsure if single TPS65917-Q1 will suffice under heavy load, so i'm drawn toward TDA2Pxx recomended combination LP87565C-Q1 + TPS65917-Q1? + +Responses: +Alexander, Let's take this question to direct chat. I'll contact you via your e2e account. Thanks, Kyle + diff --git a/data2/text/range/0-5000/684260.txt b/data2/text/range/0-5000/684260.txt new file mode 100644 index 0000000000000000000000000000000000000000..6e955cf14bfaa681415868d2f5735c6db1845ed8 --- /dev/null +++ b/data2/text/range/0-5000/684260.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler: xCAM Reference Design with TDA2 + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler I seen Mr Yogesh Marathe, He explain about the xCAM Reference Design with TDA2. I want to use the module and likely to adopt this in my concept. + +Responses: +Kindly reply, I want to buy immediately. + +Hi Yuvaraj , Latest Vision SDK doesn't support XCAM . Last supported version was 2.11 TI Doesn't Support sales of XCAM directly. Please look at the below link to find TI supported devices www.ti.com/.../tools-software.html Regards Chetan.M + +any updates on this thread , can we close the same + diff --git a/data2/text/range/0-5000/684296.txt b/data2/text/range/0-5000/684296.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff062f5de9cedf48855e985b2c9d6d83d33b68d7 --- /dev/null +++ b/data2/text/range/0-5000/684296.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: Encode link latency variations + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello everyone! We have two issues regarding Encode link latencies. Issue 1: We have created two use cases with the excerpts given in the images attached below. Namely, in the case of the first image, we use one instance of Select link, that forms the output consisting of one queue comprising four channels. This output is fed into the Encode link instance, that performs H.264 encoding on all of the four input channels. We have set the following intra-frame interval (between two I-frames): pLinkDynPrm->intraFrameInterval = 10; The Encode link feeds one instance of Null link. The latency measured by the "Print statistics" option (P key) outputs the value of ~36 ms for the Encode link. In the case of the second image, instead of using one instance of Null link for all of the 4 channels, we use 4 instances of Null link (one Null link per channel). Hence, the output from the Encode link (1 Q, 4 CHs) is firstly fed into a Select link that forms 4 Qs, each comprising 1 CH. The latency measured by the "Print statistics" option (P key) outputs the value of ~86 ms for the Encode link. Issue 2: In the case we set the intra-frame interval to the value 1 (every output frame is an I-frame): pLinkDynPrm->intraFrameInterval = 1; the latency of the Encode link is ~18 ms when encoding one Q with 4 CHs. Hence, we can notice that the encoding latency is greater when generating P-frames. Is there any explanation of these two issues and is there any configuration that might be performed on the Encode link to decrease these latencies below 20 ms when generating P-frames? Best regards, Marko + +Responses: +Hi Issue <1> I expect encode latency to be the same in both cases. BTW, what are you doing in Null link, just a termination or some File write etc.? If the output buffers are not fed back to encode link the latency numbers might shows high Please use single null link with 4ch. Issue <2> Yes, this is expected, encoding with P and B frames will take more processing cycles compared with I frame only encode. with P and B frames we can achieve lower bit-rates (higher compression) and hence more processing cycles regards, Shiju + +Hi, Shiju! Thanks for your reply. We use multiple Null links to transmit four video streams to four individual devices. So, in our case, the Null link(s) perform outputs on the Ethernet. If I understand well, there is some kind of bufferbloat between the Encode link and Null links since the Null links are not able to output buffers to the Ethernet opportunely? If this is the case, it is possible to occur in our environment. Regarding the second issue, I have to note that we are not allowed to generate B frames, so we generate only I and P frames. Is there any solution to reduce this latency when generating frames of these two types only? Best regards, Marko + +Hi Marko <1> yes, if the null links are not able to fee-up the output buffers of encoder link, you might see higher latency numbers. <2> Not powerful options, but you can try below encode option change pLinkChPrm->encodingPreset = SYSTEM_XDM_MED_SPEED_HIGH_QUALITY; to SYSTEM_XDM_HIGH_SPEED or SYSTEM_XDM_HIGH_SPEED_MED_QUALITY But please note that this will not give any big boost. regards, Shiju + +Hi, Shiju, Thank you for your response. We will perform the observation of the free buffer get function results from the Encode link to get aware of free buffers availability during the execution. Also, we will set the proposed "encodingPreset" parameter flags and compare the statistical data with our current set-up. Best regards, Marko + +Hi, Shiju! We have set the "encodingPreset" parameter SYSTEM_XDM_HIGH_SPEED and we have succeeded to speed up the encoding process, thus decreasing the latency from 88ms to 16ms. Best regards, Marko + diff --git a/data2/text/range/0-5000/684646.txt b/data2/text/range/0-5000/684646.txt new file mode 100644 index 0000000000000000000000000000000000000000..dfa600bd02bf45ee68bd65ccd81dd63c6fbaf868 --- /dev/null +++ b/data2/text/range/0-5000/684646.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2: Embed TIDL model bin into IPU image to run without SD card ? + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi, Is it possible to convert TIDL or SemSeg example to run from flash, without SD card ? i can change the input link to take video from a camera or HDMI, but I still need to supply NET.BIN and PRM.BIN model files to TIDL somehow without SD card. Model parsing functions can be changed to read net and prm from arrays in memory instead of files, but what would be the easiest way to place them into memory (flash) ? i.e. maybe link with IPU 1-0 code somehow? I am reading documentation for ti-cgt-arm_16.9.2.LTS tools, but cannot figure out how to join the code with model data. Total size of model bin files is about 3Mb. Thanks, Mikhail + +Responses: +I understand how to do that through conversion of the binary file to a C-array, but that means converting 3Mb bin to approximately 15Mb c-file. It would be nice if there is an option to do that through linker directly. Mikhail + +Hi Mikhail , i can change the input link to take video from a camera or HDMI, but I still need to supply NET.BIN and PRM.BIN model files to TIDL somehow without SD card. Model parsing functions can be changed to read net and prm from arrays in memory instead of files, but what would be the easiest way to place them into memory (flash) ? You can always place it into QSPI flash . API for the same can be found in src/rtos/utils_common/include/utils_qspi.h Its used to dump the calib tables in following file for reference vision_sdk\apps\src\rtos\common_srv\chains_common_surround_view.c Regards Chetan.M + +Hi Chetan, Thank you for the advice. I will try QSPI flash soon. Do you know if there are any code examples that use eMMC flash (with FAT FS) instead of SD card? I guess the difference between emmc and sdcard should be very small. Mikhail + +Hi Mikhail , Can we close the thread , I am not sure if we have a pdk driver to access emmc . Regards Chetan.M + +Yes. Thanks! + diff --git a/data2/text/range/0-5000/684769.txt b/data2/text/range/0-5000/684769.txt new file mode 100644 index 0000000000000000000000000000000000000000..0421fdb6ead531f0af7bf8fd92800b6a803f5c82 --- /dev/null +++ b/data2/text/range/0-5000/684769.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE + +Query Text: +Part Number: TDA2 Dear， Very thanks. I want to know whether TI DSP support caffe2 or the cnn model and algorithm in the caffe/caffe2 framework？ If not，when it can？ BR + +Responses: +Hi, TI ADAS SOCs (TDAx family) support the cnn models trained using caffe . Please refer the SDK from TI to get more details. www.ti.com/.../PROCESSOR-SDK-TDAX Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/685360.txt b/data2/text/range/0-5000/685360.txt new file mode 100644 index 0000000000000000000000000000000000000000..39f4b0f825c7c5947c02e9775ea7b1820b0e088e --- /dev/null +++ b/data2/text/range/0-5000/685360.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: Dual Emif interleave 1GiB configuration + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, Using an MLO that configures the two EMIFs on the TDA2 Vayu EVM in interleaved mode with 1GB total (2x512MB) how is the full 1GB addressed? We know 0x8000.0000 - 0xA000.0000 is part of the DDR range and we can access it but that's only 512MB. How do would you access the other 512MB of memory? Thank you Juan + +Responses: +Hi Juan, You should be able to access the other 512 MB from 0xA0000000-0xC0000000. Are you facing any issues with this? Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/685827.txt b/data2/text/range/0-5000/685827.txt new file mode 100644 index 0000000000000000000000000000000000000000..2841eb39d1f3606b720e55239aa723d7c0937927 --- /dev/null +++ b/data2/text/range/0-5000/685827.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Running a model on multiple cores + +Query Text: +Part Number: TDA2 Hi, As per my understanding in the config file, we have option to select EVE or DSP core by selecting layersGroupId(1 for EVE and 2 for DSP). In case, if the model is to be run on multiple EVE cores, say EVE1 and EVE2(first few layers on EVE1 and next few layers on EVE2), is there any way to mention this from the config file? Thanks in advance, Navinprashath.R.R + +Responses: +Yes, we can do that by assigning unique layersGroupId for each of the cores, let's say 1 for EVE1, 2 for EVE2, 3 for EVE3 and 4 for DSP. Note that this layersGroupIds 1 for EVE and 2 for DSP is just an example, you can assign any unique layersGroupId and same mapping should used in running inference. Thanks, Praveen + diff --git a/data2/text/range/0-5000/686013.txt b/data2/text/range/0-5000/686013.txt new file mode 100644 index 0000000000000000000000000000000000000000..912e3f6d1ca43f758e509f4a60d47cfd67c55cb0 --- /dev/null +++ b/data2/text/range/0-5000/686013.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2: SSD different result between quantStatusTool and TDA2EXVEM + +Query Text: +Part Number: TDA2 Hi: I traine a SSD model changed on "github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/object_detection/voc0712". With quantStatusTool,the result is good,almost every target object is detected,But when I run the model on TDA2EXEVM,some object could't be detected in some frames.for example,as below this result is runned with quantStatusTool;but the "1" object couldn't be detected with TIDL_OD usecase when runned on TDA2EXEVM. And with quantStatusTool,I found the "1" object's confidence is 0.316087,so I set the "scoreThreshold" to 0.3 in TIDL_OD usecase,but the "1" object still couldn't be detected. Is there something I missed? My import config file is below: # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 25 numParamBits = 8 # 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 inElementType = 0 inputNetFile = "..\..\test\testvecs\config\caffe_modesl\ssd480x192\sparse\deploy.prototxt inputParamsFile = "..\..\test\testvecs\config\caffe_modesl\ssd480x192\sparse\ssd480x192_sparse_iter_100000.caffemodel" outputNetFile = "..\..\test\testvecs\config\tidl_models\tidl_net_jdetNet_480x192_ssd.bin" outputParamsFile = "..\..\test\testvecs\config\tidl_models\tidl_param_jdetNet_480x192_ssd.bin" rawSampleInData = 1 preProcType = 4 sampleInData = "..\..\test\testvecs\input\trace_480x192.y" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 2 2 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 #conv2dKernelType = 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Regards + +Responses: +Hi Lee, Can you please share the caffe model and prototxt to replicate the issue at our end? Thanks, Praveen + +Hi: there is my caffe model and prototxt.My model only detect 1 calss:car. models&prototxt.7z Looking forward to your reply. Regards + +Hi, Can you please also share the input image that you used to replicate the issue quickly? Thanks, Praveen + +Hi: there is some images from my test video;I test part of them:In most of images ,the object could be detected with quantStatusTool,but couldn't be on on TDA2EXEVM with TIDL_OD.for example,the image "cqh20.jpg". test imgs.7z + +Hi, Thanks for sharing the input. I could replicate the issue. I will debug and send you the fix. Thanks, Praveen + +Hi Lee, Did you run single image (or frame) on TIDL use case and comparing the output with import tool output and detentions are not matching ? or If you running a video and output (some dectections) are not matching with import tool detentions, then this is expected as there could be some issue with quantization and this output will come to stable after some time. Please refer to section 3.8 Matching TIDL inference result in the user guide on how to set the quantization parameters for a video sequence. Thanks, Praveen + +Hi: I run a video;and I tryed the "quantHistoryParam1"、"quantHistoryParam2" and "quantMargin" with several different values,like "quantHistoryParam1 = 20(or 0,10); quantHistoryParam2 = 10(or 0,5) ; quantMargin = 20(or 0,10)" But result is stille same:in some frame of input video,the "1" object can't be detected. What value shoule I set for the the "quantHistoryParam1"、"quantHistoryParam2" and "quantMargin"? there is a clip of my test video data and header: data&header.7z Regards + +Hi Lee, To debug this issue, first we need to replicate it on the single image instead of video. Could please first run the input image (used to import the models) on the EVM using standalone and check the issue is observed on not? Please refer to section 3.3.5 in the user guide to run on the standalone. Thanks, Praveen + +sorry I don't have a "USB Emulator";I only can work as "Load using SD card". + +Hi Lee, Okay, I will try to replicate the issue in VSDK at our end and will let you know. Thanks, Praveen + +Hi Lee, There is no problem in the code for this issue. This issue may be because of quantization , for this kind of issues, use first frame of the video for quant stats collection in the import and then use those for inference, first frame detection's will match exactly and will take some time for the rest of the frames for quantization to stabilise. Thanks, Praveen + +Hi: Thanks very much. But then what could I do to resolve this object detection lost problem? Regards + +Hi, Did you try matching the first frame that you imported? I would recommend you to try our training model shared on github , the link is below.. github.com/.../JDetNet Thanks, Praveen + diff --git a/data2/text/range/0-5000/686394.txt b/data2/text/range/0-5000/686394.txt new file mode 100644 index 0000000000000000000000000000000000000000..d9c42d4b6a2b505f64dc5d8045c0171b5cedc257 --- /dev/null +++ b/data2/text/range/0-5000/686394.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Use case generate tool + +Query Text: +Part Number: TDA2 Hi, I use VSDK v3.3 + TDA2x. I want to test use case generate tool but I find vsdk.exe can't run on win7 64 bits version. I can find vsdk.exe for 64 bits version on SDK v3.2(C:\PROCESSOR_SDK_VISION_03_02_00_00\vision_sdk\build\rtos\scripts\vsdk_win32.exe(1,954 KB, 2017/12/22 19:04)) But SDK v3.3 total have 3 files they both can't run on Win7 64 bits OS. 1st : PROCESSOR_SDK_VISION_03_02_00_00\vision_sdk\build\rtos\scripts\vsdk_win32.exe(1,954 KB, 2017/12/22 19:04) 2nd : PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\tools\vision_sdk_usecase_gen\bin\vsdk_win32.exe(895 KB, 2018/4/6 19:29) 3rd : PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\src\rtos\usecases\vip_single_cam_display_metadata\vsdk_win32.exe(1,976 KB, 2018/4/6 19:29) Could you please check it? Thanks. + +Responses: +Hi, You should use the tool present in PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\tools\vision_sdk_usecase_gen\ folder. As the source of the tool is present here you should rebuild the tool for 64 bit machine. Regards, Rishabh + diff --git a/data2/text/range/0-5000/686810.txt b/data2/text/range/0-5000/686810.txt new file mode 100644 index 0000000000000000000000000000000000000000..df1cdcef4e6eb0035a16dbf053173928e366573e --- /dev/null +++ b/data2/text/range/0-5000/686810.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: how to integrate vision SDK to autonomous drive application + +Query Text: +Part Number: TDA2 Hi, I have read the chain and link mechanism. And also run sample_app successfully, go through most of documents of TI vison SDK, but still struggling. My question is how to integrate my autonomous drive application to TI Vision SDK? i have sensor fusion , decision and planning modules, etc. Based on my understanding to sdk, i should put each module as a algorithm module ,integrate with a algorithm link. Maybe also develop some common link to receive and send data as interface with peripherals. Am i right? does TI have any general document to guide users in high level how to integrate TI vision SDK, not fall down in details at the beginning. Thank you in advance. Best regards HUI + +Responses: +Hi HUI, did you checked the documents in "vision_sdk\docs\Architecture", there you can find higher level overview of VsiionSDK's architecture. Regards, Yordan + diff --git a/data2/text/range/0-5000/686930.txt b/data2/text/range/0-5000/686930.txt new file mode 100644 index 0000000000000000000000000000000000000000..837129338957a3650323957dc606e2e7e5243b64 --- /dev/null +++ b/data2/text/range/0-5000/686930.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: source ./vision_sdk_load.sh error report + +Query Text: +Part Number: TDA2 Hi , when i try to run examples, following sdk guild document, firstly do "source ./vision_sdk_load.sh", there is some error as below, however sample app can also run. root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 Best regards HUI + +Responses: +Hello HUI , These need to be ignored , this is non fatal error and mentioned in FAQ doc . Regards Chetan.M + diff --git a/data2/text/range/0-5000/687027.txt b/data2/text/range/0-5000/687027.txt new file mode 100644 index 0000000000000000000000000000000000000000..47b754876f43f385bd9508aa931c6981af25558f --- /dev/null +++ b/data2/text/range/0-5000/687027.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Executing TIDL on TDA2x + +Query Text: +Part Number: TDA2 Hi, These are the steps I'm following to run the dsp_test_dl_algo.out. 1.Open CCS. Launch Selected Configuration. 2.Select A15_0. Go to Run->Reset->System Reset. Right click-> Connect Target. Go to Scripts->TDA2xx MULTICORE Initialization->TDA2xx_MULTICORE_EnableAllCores 3.Select C6xx_DSP1. Right click->Connect Target. 4.Go to Run->Load->Load Program. Select the path of dsp_test_dl_algo.out. file and click Ok. 5.Click on Resume button. In the console I am seeing these logs. [C66xx_DSP1] Processing config file ..\testvecs\config\infer\tidl_config_jseg21.txt ! and nothing after that. Do any more configuration need to be done or is there anything wrong with the configuration I am currently setting? Thanks in advance, Navinprashath.R.R + +Responses: +Hi Navin, Hold on for some time, at that time input file reading is happening and will take up to an hour based on the file size. Thanks, Praveen + diff --git a/data2/text/range/0-5000/687292.txt b/data2/text/range/0-5000/687292.txt new file mode 100644 index 0000000000000000000000000000000000000000..6144c5d009cfa301f1290f3dcc6af225113592c2 --- /dev/null +++ b/data2/text/range/0-5000/687292.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Data flow of TIDL Object detect use case? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dears, I see the data flow of File Input/Output TI Deep Learning (TIDL) use case on TDA2XX Did you have the data flow of TIDL Object detect use case on TDA2XX ? thanks for the reply. Allen + +Responses: +Hello , Data Flow for the TIDL Object Detect is not documented in datasheet , Its data flow can be obtained in the usecase folder , vision_sdk\apps\src\rtos\usecases\tidl_OD\chains_tidlOD.jpg Regards Chetan.M + +Hi OK, I see the pic. but it should be contained Lane Departure warning (LDW)、Vehicle Detection (VD)、Pedestrian, Bi-cyclist and Powered Two Wheeler Detection etc... Does't it? but I doesn't see them in the flow. Can you tell me where they going? + +No , This is object detect only , Lane Departure warning is not present. Only Vehicle Detect and Traffic sign is trained . Regards Chetan.M + +It is trained for Pedestrians also. Regards, Kumar.D + +so, TIDL algorithm can classify the road ,Right? But TIDL_OD use case does't contain Lane Departure warning (LDW) I'm right ? + +The default usecase doesn't Regards Chetan.M + diff --git a/data2/text/range/0-5000/687319.txt b/data2/text/range/0-5000/687319.txt new file mode 100644 index 0000000000000000000000000000000000000000..786779b77558e440904e3444395ab57bfbf5e2e0 --- /dev/null +++ b/data2/text/range/0-5000/687319.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: fish eye lens holder for SV demo + +Query Text: +Part Number: TDA2 Dear Champs, Could you please let me know exact lens holder part name we used in our SV DEMO of Vision SDK? From the web site of DSL219D, there were 2 holders recommended to use with DSL219D lens as below and these holders have different size. do you think any holders in below can show similar DEMO quality? Thanks and Best Regards, SI. + +Responses: +Hi SI, It seems like the second part number is a recent addition, I am trying to check on this. I will reply as soon as its clarified. Regards, Sujith + +Hi Sujith, Have you checked this? Thanks and Best Regards, SI. + +Can you please give more details of the demo setup you are using? SoC name Sensor name Camera module version It will help if you can attach a picture. + +They are using our SV DEMO on TDA2 using TDA2 EVM as below. SoC name : Vision28 CPU EVM and Vision Apps Board Sensor name : omnivision image sensor board(Multides Surround View Kit, OV10635-EAAE-AA0A) Camera module version : OV10635-EAAE-AA0A www.spectrumdigital.com/.../ Thanks and Best Regards, SI. + +This is a Spectrum Digital product. Please contact Spectrum Digital. + +Hi, I'm asking about DEMO configuration in VisionSDK, not about product. which lens holder have been used in SV DEMO of VisionSDK? I believe all other configurations should be same in the DEMO described in the VisionSDK, but there was no information about Lens holder. Thanks and Best Regards, SI. + +Lens holder is not a part of Vision SDK. This is a part of the camera module sold by Spectrum Digital. + +Do you mean Lens holder will not be impact on the DEMO quality? Thanks and Best Regards, SI. + +Please contact Spectrum Digital for lens holder details. + diff --git a/data2/text/range/0-5000/687481.txt b/data2/text/range/0-5000/687481.txt new file mode 100644 index 0000000000000000000000000000000000000000..ad4bf76238219ac53a9cc20b61849d8b672b46ee --- /dev/null +++ b/data2/text/range/0-5000/687481.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Usecase inputdata file(inData_OD) and usecase input header file(inHeader_OD) for object detection(Vision SDK_03.03.00.00) + +Query Text: +Part Number: TDA2 Hi, In the VisionSDK_UserGuide_TI_DeepLearning.pdf it mentioned that for the object detection usecase it is mentioned that 4 file are needed. o TIDL OD Network file (NET_OD.bin) o TIDL OD Parameter file (PRM_OD.bin) o TIDL OD Usecase input data file (inData_OD) o TIDL OD Usecase input header file (inHeader_OD) In case of semantic segmentation usecase 2 more files are needed i.e. TIDLCFG.TXT and Input file. I have few questions regarding these files: 1) Network file and Parameter file can be generated by the import tool from TIDL. How to generate the Usecase data input file and usecase input header file? 2) Is the usecase data input file generated from Input file? If yes, why both Input file and Usecase data input file are needed for semantic segmentation usecase? Thanks in advance, Navinprashath.R.R + +Responses: +Hi, From these links (https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/660676 and https://e2e.ti.com/support/arm/automotive_processors/f/1021/p/639881/2391227#pi239031350filter=all&pi239031350scroll=false&pi239031350=2), I am able to found out that inData_OD and inHeader_OD can be generated with the help of ffmpeg. a)inData_OD generation >ffmpeg -i output.avi -y -c:v libx264 -vframes 50 inData_OD b)inHeader_OD generation >ffprobe -show_packets ./inData_OD >index.idx >PAT=size >sed -n "/$PAT/p" index.idx | cut -d' ' -f3 >> size_extracted.txt After this step, size_extracted.txt will contain size of the frames. Remove the string "size=" from each line in the file and save only the numbers in size_extracted_jelly.txt. >cat size_extracted_jelly.txt | perl -n -e 'printf("%08x\n",$_)' | sed 's/\(..\)\(..\)\(..\)\(..\)/0x\4\n0x\3\n0x\2\n0x\1/' | xxd -r -p > Size_test.bin && du -b Size_test.bin >cp Size_test.bin inHeader_OD + +Hi Navin, thanks for sharing your findings. Regards, Yordan + diff --git a/data2/text/range/0-5000/687657.txt b/data2/text/range/0-5000/687657.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c0b7d5ea4aba3788a6c5ab602fd30c1988a2fd0 --- /dev/null +++ b/data2/text/range/0-5000/687657.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Data flow of TIDL Object detect use case? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi OK, I see the pic. but it should be contained Lane Departure warning (LDW)、Vehicle Detection (VD)、Pedestrian, Bi-cyclist and Powered Two Wheeler Detection etc... Does't it ? but I doesn't see them in the flow. Can you tell me where they going? + +Responses: +No , This is object detect only , Lane Departure warning is not present. Only Vehicle Detect and Traffic sign is trained . Regards Chetan.M + diff --git a/data2/text/range/0-5000/687671.txt b/data2/text/range/0-5000/687671.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d88cd13ccc7577b52c007c7e016a9aba7381b30 --- /dev/null +++ b/data2/text/range/0-5000/687671.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA2: biasDmaAutoIncrement_DMA_in_Init Execution time anomaly + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio In my project, there were 5 places that used EDMA. I found an anomaly in one place. I find that the EDMA configuration function in this place has a lot of time to use 1MS, and I think it should be a very small time, where the function of the configuration function is not included in the functions that actually carry the data. static int32_t biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init( uint8_t *dmaAutoContextInOut, short *inBufExt, short *inBufInt[2], int16_t in_width, int16_t in_height, int16_t width, int16_t height, int channels) { int32_t status = 1; EDMA_UTILS_autoIncrement_initParam_v2 initParamV2; initParamV2.pingPongOffset[0] = (uint32_t)inBufInt[1] - (uint32_t)inBufInt[0]; initParamV2.pingPongOffset[1] = initParamV2.pingPongOffset[0]; initParamV2.initParams.numInTransfers = 1; initParamV2.initParams.numOutTransfers = 0; //parameters for ping transfer from external to internal memory and vice versa initParamV2.initParams.transferType = EDMA_UTILS_TRANSFER_IN; //parameters for out transfer - ping initParamV2.initParams.transferProp[0].roiWidth = width * 2; initParamV2.initParams.transferProp[0].roiHeight = height * channels; initParamV2.initParams.transferProp[0].roiOffset = 0; initParamV2.initParams.transferProp[0].blkWidth = width * 2; initParamV2.initParams.transferProp[0].blkHeight = height; initParamV2.initParams.transferProp[0].blkOffset = 0; initParamV2.initParams.transferProp[0].extBlkIncrementX = 0; initParamV2.initParams.transferProp[0].extBlkIncrementY = height; initParamV2.initParams.transferProp[0].intBlkIncrementX = 0; initParamV2.initParams.transferProp[0].intBlkIncrementY = 0; initParamV2.initParams.transferProp[0].extMemPtrStride = width * 2; initParamV2.initParams.transferProp[0].interMemPtrStride = in_width * 2; initParamV2.initParams.transferProp[0].extMemPtr = (uint8_t *)(inBufExt); initParamV2.initParams.transferProp[0].interMemPtr = (uint8_t *)(inBufInt[0]); initParamV2.initParams.transferProp[0].dmaQueNo = 1; //configure EDMA for ping set both Ext -> Int and Int -> Ext EDMA_UTILS_autoIncrement_init_v2(dmaAutoContextInOut,&initParamV2); status = EDMA_UTILS_autoIncrement_configure_v2(dmaAutoContextInOut,EDMA_UTILS_TRANSFER_IN); return status; } unsigned long long WH_time[10]; double WH_cost[10]; TSCH = 0; TSCL = 0; WH_time[0] = _itoll(TSCH,TSCL); int status = biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init( dmaAutoContextInOut, indata, pInBufInt, in_width, in_height, width, height, channels); WH_time[1] = _itoll(TSCH,TSCL); WH_cost[0] = (double)(WH_time[1] - WH_time[0]) / 1000000.0; printf("biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init= %f ms\n",WH_cost[0]); + +Responses: +Hi Shuai, If I understood your question correctly, you mean biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init function is taking 1ms of time. Looking at your code you are using _itoll(TSCH,TSCL) instruction to read the counters. These counters only gives you the cycles consumed and doesnt give you time directly. To measure the time you need to divide this number by the frequency at which the DSP core is running. Regards, Anshu + +Hi Shuai, I am hoping that this resolved your issue and hence I am closing this thread. You can revisit it if you have more question. Regards, Anshu + +HI Anshu C66 of TDA2X frequency is 500MHZ you mean actual time is like this ??? WH_time[1] = _itoll(TSCH,TSCL); WH_cost[0] = (double)(WH_time[1] - WH_time[0])*1000 / (1000000.0*500); printf("biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init= %f ms\n",WH_cost[0]); shuai + +HI Anshu so biasDmaAutoIncrement_conv3x3short_ti_multi_DMA_in_Init function is taking 2ms of time , i think is too big ，i think it should be 0.01MS shuai + +Hi Shuai, Can you profile inside of the function to figure out which part is taking more time? Regards, Anshu + +Hi Shuai, Were you able to make progress in this issue? If yes kindly close this thread. Regards, Anshu + diff --git a/data2/text/range/0-5000/687732.txt b/data2/text/range/0-5000/687732.txt new file mode 100644 index 0000000000000000000000000000000000000000..633260445f0b6f8df0e8bb786316a21d9edbfd3b --- /dev/null +++ b/data2/text/range/0-5000/687732.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: [TDA / opencv / usecase modification] want to implement my code by modifying the opencvopencldilation usecase + +Query Text: +Part Number: TDA2 (vision SDK version : PROCESSOR_SDK_VISION_03_03_00_00) Hi I'm newbie of using TDA2x evb board and vision App board I'd like to implement my algorithm which is using openCV and implement it by modifying the sample usecase&alg_plugins ( vip_single_cam_opencvopencldilation / opencvopencldilation) [ Question ] I want to apply my alogirhtm code and display it to the monitor. Where the points that I should modify the code? I started modifying like below, however when I remove the "cv::dilate" code, it displays black image with processor usage. prior code modified code void* openclDilationThreadFunc(void* args) { while(1) { cv::Mat openCLDilationInputMat; cv::Mat openCLDilationOutputMat; cv::UMat openCLDilationInputUMat; cv::UMat openCLDilationOutputUMat; if(!gOpenCLDilationThreadStarted) { cv::ocl::setUseOpenCL(1); gOpenCLDilationThreadStarted = 1; } /* wait for the produce thread to point to the current input * and output buffers */ while(!g_cac) { usleep(1000); } pthread_mutex_lock(&gOpenCLDilationMtx); /* * \brief Compute using OpenCV */ openCLDilationInputMat = cv::cvarrToMat(gOpenCLDilationKernelArgs.inputImage, false); openCLDilationOutputMat = cv::cvarrToMat(gOpenCLDilationKernelArgs.outputImage, false); openCLDilationInputUMat = openCLDilationInputMat.getUMat(cv::ACCESS_RW); openCLDilationOutputUMat = openCLDilationOutputMat.getUMat(cv::ACCESS_RW); cv::dilate(openCLDilationInputUMat, openCLDilationOutputUMat, cv::Mat()); openCLDilationInputUMat.release(); openCLDilationOutputUMat.release(); openCLDilationInputMat.release(); openCLDilationOutputMat.release(); g_cac = 0; pthread_mutex_unlock(&gOpenCLDilationMtx); } pthread_exit(&gOpenCLDilationThreadRtn); return ((void*) 0); } void* openclDilationThreadFunc(void* args) { while(1) { cv::Mat openCLDilationInputMat; cv::Mat openCLDilationOutputMat; cv::UMat openCLDilationInputUMat; cv::UMat openCLDilationOutputUMat; if(!gOpenCLDilationThreadStarted) { cv::ocl::setUseOpenCL(1); gOpenCLDilationThreadStarted = 1; } /* wait for the produce thread to point to the current input * and output buffers */ while(!g_cac) { usleep(1000); } pthread_mutex_lock(&gOpenCLDilationMtx); /* * \brief Compute using OpenCV */ openCLDilationInputMat = cv::cvarrToMat(gOpenCLDilationKernelArgs.inputImage, false); openCLDilationOutputMat = cv::cvarrToMat(gOpenCLDilationKernelArgs.outputImage, false); openCLDilationInputUMat = openCLDilationInputMat.getUMat(cv::ACCESS_RW); openCLDilationOutputUMat = openCLDilationOutputMat.getUMat(cv::ACCESS_RW); openCLDilationOutputUMat = openCLDilationInputUMat; openCLDilationOutputMat = openCLDilationInputMat; openCLDilationInputUMat.release(); openCLDilationOutputUMat.release(); openCLDilationInputMat.release(); openCLDilationOutputMat.release(); g_cac = 0; pthread_mutex_unlock(&gOpenCLDilationMtx); } pthread_exit(&gOpenCLDilationThreadRtn); return ((void*) 0); } + +Responses: +Whats the image you were seeing before any change? + diff --git a/data2/text/range/0-5000/687751.txt b/data2/text/range/0-5000/687751.txt new file mode 100644 index 0000000000000000000000000000000000000000..0123f9738e7099a47891a0db9915e66901eb4c1c --- /dev/null +++ b/data2/text/range/0-5000/687751.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: System_linkControl_local function Question + +Query Text: +Part Number: TDA2 Hi, I am using PROCESSOR_SDK_VISION_03_02_00_00, and have some confusion on function of System_linkControl_local My question is why prmSize is never been used, how receiver know the parameter size. Second, i go through all low level function, did not see any memcpy, if pPrm is a stack address, how to send? Int32 System_linkControl_local(UInt32 linkId, UInt32 cmd, Void * pPrm, UInt32 prmSize, Bool waitAck) { Int32 status; Utils_MbxHndl *pToMbx; Utils_TskHndl *pTsk; UInt32 flags = 0; linkId = SYSTEM_GET_LINK_ID(linkId); UTILS_assert(linkId < SYSTEM_LINK_ID_MAX); pTsk = (Utils_TskHndl*) gSystem_objCommon.linkObj[linkId].pTsk; if(pTsk==NULL) { Vps_printf(" SYSTEM: ERROR: No link registered at link ID [%d] !!!\n", linkId); status = SYSTEM_LINK_STATUS_EFAIL; } else { pToMbx = &pTsk->mbx; if (waitAck) { flags = UTILS_MBX_FLAG_WAIT_ACK; } status = Utils_mbxSendMsg(&gSystem_objCommon.mbx, pToMbx, cmd, pPrm, flags); } return status; } Thank you in advance BR HUI + +Responses: +Hi HUI, Typically control command has fixed parameter and is known to sender and receiver. So no need to use param size. Are you facing some issue because of no use of prmsize? Rgds, Brijesh + +Hi Brijesh, Thank you for your reply. I try to use it for other purpose , just ask. BR HUI + diff --git a/data2/text/range/0-5000/687753.txt b/data2/text/range/0-5000/687753.txt new file mode 100644 index 0000000000000000000000000000000000000000..12e1ed760cf18caf784a483a97083f66d85b1398 --- /dev/null +++ b/data2/text/range/0-5000/687753.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: does ti rtos provide standard socket interface like linux + +Query Text: +Part Number: TDA2 Hi, I am using TI Vision SDK PROCESSOR_SDK_VISION_03_02_00_00 does ti rtos provide standard socket interface like linux? BR HUI + +Responses: +Hi HUI, You will need to include NDK for socket support. There are already some utility function and socket being used in vision_sdk\links_fw\src\rtos\utils_common\src\network_api.c Rgds, Brijesh + +Hi Brijesh, I found this below configuration, # Supported values: ipu1_0 ipu1_1 ipu2 a15_0 none NDK_PROC_TO_USE=none my question is whether dsp support socket? if yes , how to enable it. And also i read vision_sdk\links_fw\src\rtos\utils_common\src\network_api.c it is tcp socket, does TI has udp socket, alternatively, does ti rtos support all socket interface like linux? Thank you in advance. BR HUI + +And also how to configure the ip address in rtos , in order to make socket work. My purpose is that A15 DSP IPU , each core has one ip , then communicate with each other through socket. Is it possible? + +Hi HUI, IP Address cannot be assigned to each core. It is assigned to ethernet ip. Also i think NDK is not supported in DSP. Btw, why do you want to use socket to communicate across cores? You could use IPC. There are IPC links in the vision sdk to communicate across different cores.. Rgds, Brijesh + +Hi Brijesh, I am struggling on link, based on business team, they do not want chain. Ex: there are three link in three different core, like A15, DSP , IPU. They want to send data to any core between each other at any time any place, similar to socket, if i have destination ip and port, i can send data to it rather than defining chain. I am trying to understand whether current sdk support it. Meanwhile, if each core has one ethernet ip, and also rtos support socket. I can easily do it. Please let me know your idea. Thank you. BR HUI + +Hi HUI, Even in Sockets, you need to connect port on each cores. This is similar, even in links, you could have link running on each core and communicate with any core. First i think you need to come up with your data flow, we could suggest/help in creating usecase. Rgds, Brijesh + +In udp socket, there is one function , sendto, if you know the destination ip and port , you can send. In receive side, just need bind to one udp port, then do recvfrom. I want the similar things in IPC. Business team did not share data flow, they said it is still in discussing. They give me an example, A B C three tasks in three cores , communicate with each other. they do not want to define any chain. They want to define three links ,then each link can talk with each other. Can current sdk support this process? + +Hi Brijesh, where can i find some documents to introduce the mechanism of System_ipcMsgQSendMsg ? How does different cores send msg to each other? It looks in A15 linux using rpmsg socket, and how about rtos (Notify_sendEvent)? Thank you in advance. BR Richard + +Hi Richard, we cannot use socked for this. We have support for NDK, but it can enabled only on one core and so cannot be used in this way. I think you could use shared memory and hard mail box to communicate across cores. This is what VSDK internally uses to communicate with different cores. Please have a look into System_ipcSendMessage API to understand how it works. Regards, Brijesh + diff --git a/data2/text/range/0-5000/687766.txt b/data2/text/range/0-5000/687766.txt new file mode 100644 index 0000000000000000000000000000000000000000..3e0a004991454baab2ee5431cec84e5252681274 --- /dev/null +++ b/data2/text/range/0-5000/687766.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: modifying demo usecase of visionSDK (ver 3.3) + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm trying to implement my application into the TDA2x by using demo application Since my application uses openCV, I will use vip_single_cam_opencvopencldilation usecase. When using demo application, what variables or structure and which function should I refer ? - I want to crop the input image frame - I want to apply my image processing algorithm to the cropped image - I want to display the result image frame I tried it for a week........ but I failed ...... please help me + +Responses: +Hi please note that OpenCV in Vision SDK is a preliminary release with limited features and testing (Alpha Quality). It does not have the functions/features you are looking for. So I suggest you to use native VSDK links and chain architecture and not OpenCV . All the features you listed above can be supported with native VSDK links and chain architecture regards, Shiju + diff --git a/data2/text/range/0-5000/687784.txt b/data2/text/range/0-5000/687784.txt new file mode 100644 index 0000000000000000000000000000000000000000..9513ad6aeb0dcd2db323b35a0cfff6a2e408ec05 --- /dev/null +++ b/data2/text/range/0-5000/687784.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Network_RX dumping mjpeg files from network usecase + +Query Text: +Part Number: TDA2 Hey, I have set up the capture_encode_network_rx usecase on the TDA2. All the captured frames are written into a file. I am able to open the written file with VLC but then I get only a single frame. According to the network documentation the network_rx command saves the data as mjpeg, thus I should be able to play it as a video when converting to avi or something. This does not seem to work though. How can I run that file seeing the captured video? best regards, nico + +Responses: +Hi Nicolas, Try playing with ffmpeg player Regards Surya + diff --git a/data2/text/range/0-5000/687812.txt b/data2/text/range/0-5000/687812.txt new file mode 100644 index 0000000000000000000000000000000000000000..6cca2c3d9339bae15e7d113acbbecd4486fb4f13 --- /dev/null +++ b/data2/text/range/0-5000/687812.txt @@ -0,0 +1,16 @@ +Ticket Name: DRA746: Boundary Scan test + +Query Text: +Part Number: DRA746 Other Parts Discussed in Thread: TDA2 Dear Sir, We're trying to run the boundary scan test on the board that is using DRA746 and DDR3 (MT41K256M16). We're using the bsdl file "vayu.23x23.bsdl". The ID of the DRA746 can be recognized properly but when testing the interconnect test and the memory test by IEEE1149.1. All the nets of the DDR3 interface has been sensed as "0". Are there any setting that will impact this? Please help to reply. Thanks, Pricilla + +Responses: +Pricilla, I am not aware of existing occurrences of DDR1 nets resting at 0 during bscan testing. Are DDR1 nets the only ones whose values were not sensed correctly? Can you help provide a sequence of how your tests were executed, including all the test instructions used? Moreover, please double check in the BSDL file header that the chip revision matches the chip you are using. Best Regards, Shiou Mei + +Hi Pricilla, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +Dear Shiou Mei, The bsdl file that we use is TDA2x_bsdl_23mm.bsdl and the IC part name is TDA2SGBRQABCRQ1 PBGA2.0. Is it the correct one? The DDR3 and Nor Flash still can't test properly. We aware that it is mentioned that "Device security features\JTAG® lock" in the TDA2 datasheet, but there is no detailed info. for it. Is it possible that this feature has been enabled? or any suggestions for boundary scan test ? Thanks, Pricilla ---------------------------------------------------------------------- -- TDA2x Boundary Scan ---------------------------------------------------------------------- -- Supported Devices: TDA2x Revision 1.0 -- -- Derived from parent device BSDL file -- -- Does NOT apply to TDA2Ex -- ---------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- BSDL Revision : 1.1 -- -- -- -- BSDL Status : Preliminary -- -- Package : 23x23 -- -- Date Created : 03 September 2013 -- -- -- ---------------------------------------------------------------------- + +Pricilla, I tested BSDL with a TDA2x PG2.0 reference unit on my bench and was not able to reproduce the issue. Can you help provide more information on your fail mode: Is result reproducible on multiple units? What are all the nets with improper values (i.e. address, data, etc)? Can you help provide a sequence of how your tests were executed, including all the test instructions used? Thanks & Regards, Shiou Mei (pending Manoj feedback) + +Hi Pricilla, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/687877.txt b/data2/text/range/0-5000/687877.txt new file mode 100644 index 0000000000000000000000000000000000000000..e46947081c1de8b1a86effef6a036c053ed5f002 --- /dev/null +++ b/data2/text/range/0-5000/687877.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Can we use our model by GoogleNet + Yolo V3? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Our model target is doing GoogleNet + Yolo V3, so we need TI to help us clarify the following questions. Current SDK v3.03 is using SSD model, is there any possible to replace SSD in TIDL module, for example, Yolo V3 (You Only Look Once: Unified, Real-Time Object Detection, CVPR 2016) If yes, we can replace SSD by our own model Fig.1 is TI TDA2 architecture what we supposed and the yellow block is our customized model. Q1: if TI architecture is not like above diagram, can you provide your architecture for our reference? Fig.1 Q2: How can we implement our model into TI TDA2? For TIDL input and output, can you point me two issues solution. l We need to know Input BGR input file format and seg_out.bin output file format l We need API function such as CUDA level in TI platform for hardware accelerate. 2.If not, we can NOT replace SSD by our own model and both issues of Q2 cannot be resolved Q3: when does TI platform will release Yolo algorithm? If not, how can we build our Yolo library module in TI platform? Q4: how can we apply other (Squeezent、Googlenet、Mobilent) in TI platform, any other example. If possible, can we apply yolo+(google net or VGG) in TI platform? + +Responses: +Refer "3.7 Input and Output Data Formats" in user guide for input and output format. Input in our use case is BGR planar. it could different in another use case. Refer Below for seg_out.bin output file format e2e.ti.com/.../685817 Regarding Object detection, We support only caffe-based SSD for complete object detection (Image to Bound boxes). Yolo is not supported and not planned. You can train Yolo based object detection network (Yolo+Squeezenet or googlenet or mobile net) using caffe / caffe-jacinto and run all the layers on TIDL except the last layer which can be executed later on DSP/EVE as a C function (Detections to Bounding boxes). Refer data sheet for supported layers. We don't provide CUDA like interface for CNN acceleration. With TIDL you run a CNN network (Series of layers, could be a portion a big CNN network) on TI device. Thanks and Regards, Kumar.D + diff --git a/data2/text/range/0-5000/688447.txt b/data2/text/range/0-5000/688447.txt new file mode 100644 index 0000000000000000000000000000000000000000..d8f114cdd25c6698f6bcd69fc3dc8c020f69f3a1 --- /dev/null +++ b/data2/text/range/0-5000/688447.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Linking Error. the usecase with a OpenCV alg_plugin + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, all Refer to vip_single_cam_opencvcanny_sgx_display, I write a usecase with a OpenCV alg_plugin. I got some error in Linking. it looks like something invoked opencl, but I do not enable opencl in cfg.mk. how can I locate the problem? best regards, John ----------------------------------------------------------------- cfg.mk # # Enable below macro to enable OPENVX into Vision SDK # OPENVX_INCLUDE=yes CIO_REDIRECT=yes HS_DEVICE=no DEFAULT_UBOOT_CONFIG := dra7xx_evm_vision_config DEFAULT_KERNEL_CONFIG := omap2plus_defconfig # For TDA2x DEFAULT_DTB := dra7-evm-infoadas.dtb # add by John # Enable macro for OpenCV ENABLE_OPENCV=yes CMEM_INCLUDE=yes BUILD_OPENCV_SRC=no BUILD_LLVM=no ----------------------------------------------------------------- Err info: open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `int cv::ocl::getStringInfo(int (*)(_cl_device_id*, unsigned int, unsigned int, void*, unsigned int*), _cl_device_id*, unsigned int, std::__cxx11::basic_string, std::allocator >&) [clone .constprop.320]': ocl.cpp:(.text._ZN2cv3ocl13getStringInfoIPFiP13_cl_device_idjjPvPjES3_EEiT_T0_jRNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE.constprop.320[_ZN2cv3ocl7Context4Impl10setDefaultEv]+0x26): undefined reference to `clGetPlatformInfo' ocl.cpp:(.text._ZN2cv3ocl13getStringInfoIPFiP13_cl_device_idjjPvPjES3_EEiT_T0_jRNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE.constprop.320[_ZN2cv3ocl7Context4Impl10setDefaultEv]+0x5e): undefined reference to `clGetPlatformInfo' /opt/proj/e0800/apa_r04/bsw/platform/ti/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::OpenCLBufferPoolBaseImpl::freeAllReservedBuffers()': ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE22freeAllReservedBuffersEv[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE22freeAllReservedBuffersEv]+0x4a): undefined reference to `clReleaseMemObject' + +Responses: +Hi John, Could you please share some more details like which release version of SDK you are using ? Also to build Linux opencv app, refer tda2xx_evm_linux_opencx config (all required configs are already enabled) Regards Suryamani Jena + +Hi Suryamani, Thanks, The version of SDK is PROCESSOR_SDK_VISION_03_00_00_00. The config refer to tda2xx_evm_linux_all. and I tried tda2xx_evm_linux_opencx. Regards, John + +Hi Suryamani, another question, there are some info about IPU2( in cfg.mk) "IPU1 (core 0 & 1 are) not supported when IPU_PRIMARY_CORE=ipu2" Is that meaning ,if IPU_PRIMARY_CORE= ipu2, PROC_IPU1_0_INCLUDE=yes is conflict with PROC_IPU2_INCLUDE=yes? But in the srv usecase(Linux), IPU1_0 is used to capture and display. Why? Regards, John + +Hi John we have used only on IPU subsystem when Linux is running on A15. it can be either IPU1 (with IPU1-0 & IPu1-1) or IPU2 (with IPU2-0 & IPu2-1) in SMP mode. when you select IPU_PRIMARY_CORE= ipu2, all capture, display etc. are run on IPU2. This mapping from IPU1 to IPU2 is done inside VSDK regards, Shiju + diff --git a/data2/text/range/0-5000/688490.txt b/data2/text/range/0-5000/688490.txt new file mode 100644 index 0000000000000000000000000000000000000000..d88aeefde7796bbf1ee89164685e21853502042e --- /dev/null +++ b/data2/text/range/0-5000/688490.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Running a different model using TIDL_OD usecase + +Query Text: +Part Number: TDA2 Hi, I am trying run our model using TIDL_OD usecase. I have generated inHeader_OD,inData_OD, NET_OD.BIN and PRM_OD.BIN for our network and copied to the SD card.The model is not yet trained completely. The network takes input of size 512x512. In the chains_tidlOD.c I have modified some parameters as follows. #define TIDL_OD_INPUT_WIDTH (512) #define TIDL_OD_INPUT_HEIGHT (512) #define DEC_OUT_WIDTH (512) #define DEC_OUT_HEIGHT (512) For display resolution, I am maintaining the same as for default model 768x320(scaled by 2 for display). #define TIDL_OD_DISPLAY_WIDTH (1536) #define TIDL_OD_DISPLAY_HEIGHT (640) When I run the model, there are no errors, but the video is black. Even if the model contains dummy parameters, I believe we should be able to see the input video(with wrong or no detection boxes). Am I right? Do any more parameters need to be set? Thanks in advance, Navinprashath.R.R + +Responses: +Hi Navin, you are correct you should see something on the video , Can you run print statics "p" options and share the logs , You need to find where the frames are dropped . Regards Chetan.M + +Hi Chethan, Please find the teraterm logs and the inHeader_OD.(Renamed to inHeader_OD.123 for sharing). Regards, Navinprashath.R.R inHeader_OD.123 1884.teraterm.log + +Hi NavinPrashant, Can you reduce the READ fps to 5 and try , looks the frames are dropped in processing . Also change the threshold according to the performance Regards Chetan.M + diff --git a/data2/text/range/0-5000/688528.txt b/data2/text/range/0-5000/688528.txt new file mode 100644 index 0000000000000000000000000000000000000000..ddd41d7e67add5ab903f2e084a610f86f4eddd85 --- /dev/null +++ b/data2/text/range/0-5000/688528.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: why Utils_DmaCopy1D work not ok + +Query Text: +Part Number: TDA2 HI: I want to use mem copy with dma ,use function Utils_dmaCopy1D,but I find the dest memory is not work ok. the data is always 0. ( dma callback can be work,but the data is not right); how can i let it work right with Utils_DmaCopy1D. THANK YOU! the code as follow below: void dma_memtest() { Utils_DmaChCreateParams dmaChPrm; Utils_DmaChObj dmaobj; Utils_DmaCopy1D dmaParams; Int32 status; dmaChPrm.eventQ = 0; Utils_DmaChCreateParams_Init(&dmaChPrm); status = Utils_dmaCreateCh( &dmaobj, &dmaChPrm ); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); gspidestBUf = Utils_memAlloc ( UTILS_HEAPID_DDR_CACHED_SR, 1024, 4 ); gspisrcBUf = Utils_memAlloc ( UTILS_HEAPID_DDR_CACHED_SR, 1024, 4 ); memset(gspisrcBUf,0x77,300); dmaParams.destAddr = gspidestBUf; dmaParamsrcAddr =(Ptr)gspisrcBUf;//(Ptr)0x4809a13C; dmaParams.length =32; Utils_dmaCopy1D(&dmaobj, &dmaParams); Utils_dmaDeleteCh(&dmaobj); HexToStr(tmp,gspisrcBUf,32); Vps_printf("\r\nsrc:"); Vps_printf((const char*)tmp); Vps_printf("\r\n"); HexToStr(tmp,gspidestBUf,32); Vps_printf("\r\ndst:"); Vps_printf((const char*)tmp); Vps_printf("\r\n"); } + +Responses: +Hi , Can you disable cache and try this out , i.e alloc the buffer from non cached region . Regards Chetan.M + +thank you! i try it! I have a question as follow: when i use edma ,cpu can access memory until edma complete？or it can work during this time？ + +Hi , Yes CPU can access memory but not advisable to write to the same memory which dma is been performed . Cpu is not blocked till dma complete . Regards Chetan.M + +thank you! it is mean cpu can write if i write the different memory when edma is not complete？ and the last your reply means cpu is blocked? but if cpu is blocked,how it can access memory.or you means cpu is not blocked？i think cpu may not blocked your mean. + +Cpu is not blocked till dma complete i mentioned NOT Blocked Regards Chetan.M + diff --git a/data2/text/range/0-5000/688587.txt b/data2/text/range/0-5000/688587.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ab00943c9e4ab23977ef724ab03209aea00308b --- /dev/null +++ b/data2/text/range/0-5000/688587.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS / TDA2： How to run TIDL_OD usecase? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I try to run TIDL_OD usecase but I got fail Can you tell anything to me? How do I do? Can you provide guide for our reference? + +Responses: +VisionSDK_UserGuide_TI_DeepLearning.pdf describes the section 5 Build and Run TIDL Object detect use case Before running the Vision SDK binary,  Make sure the following files are present in the MMC/SD card: o TIDL OD Network file (NET_OD.bin) o TIDL OD Parameter file (PRM_OD.bin) o TIDL OD Usecase input data file (inData_OD) o TIDL OD Usecase input header file (inHeader_OD) The error is seen as the files are not copied into SD card . Please copy the input files and rerun the usecase . Regards Chetan.M + +Allen, Are you able to test with the given changes , If not please mention what is the error you are facing. Regards Chetan.M + +Oh ,thanks I can run the TIDL_OD use case. but, Can we use the frame by camera capture for input data in TIDL_OD use case? If yes, How do I do? Can you provide any guide for our reference? If no I want to run TIDL_OD Demo with OV Sensors. How can I to do this? + +Hi Allen , Please close this thread and start another thread for running TIDL on live camera, You can always modify the use-case to remove the null src and have capture source and set the params accordingly I am not sure how to train the model and other details Regards Chetan.M + diff --git a/data2/text/range/0-5000/688868.txt b/data2/text/range/0-5000/688868.txt new file mode 100644 index 0000000000000000000000000000000000000000..30a385ecc8071d8eec8cb180ba0946eb4f15cb9e --- /dev/null +++ b/data2/text/range/0-5000/688868.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: whether TI has plan to do ASIL-B qualification of any TDA2/3 + +Query Text: +Part Number: TDA2 Whether TI has plan to do ASIL-B qualification of any TDA2/3? TI only mention that it pass the ISO26262 standard but not mention ASIL-B. Thanks. + +Responses: +Hi Terry, please check it this can help you: e2e.ti.com/.../2189966 e2e.ti.com/.../2129037 Regards, Yordan + +Hi Terry, I haven't heard back from you, I'm hope your query is resolved. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/688936.txt b/data2/text/range/0-5000/688936.txt new file mode 100644 index 0000000000000000000000000000000000000000..28477e92aca4eab258616eb5045dc8cbc02c3360 --- /dev/null +++ b/data2/text/range/0-5000/688936.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: DDR DQ signal swapping rules + +Query Text: +Part Number: TDA2 In the DDR2/DDR3 interface design, can we swap DQs with in the same byte? is there any rules on this? such as dq0 swapped with dq3 dq2 with dq7, etc Thanks Jianming + +Responses: +Hi, Yes, it is okay to swap DQ bits within the same byte on the TDA2x DDR2/DDR3 interface. The only rule for DQ bit swapping on the TDA2x DDR2/DDR3 interface is that the DQ bits must be routed with their associated strobe (DQS) and mask (DM). (i.e, all signals within a byte of the TDA2x must be routed to the same byte of the DDR2/3 memory). Best regards, Kevin + diff --git a/data2/text/range/0-5000/688944.txt b/data2/text/range/0-5000/688944.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf64ceafbc32a9f374dcf9b6e748d1135c5f4fe2 --- /dev/null +++ b/data2/text/range/0-5000/688944.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2: Fail to linking openCV file (objdetect) + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi experts, I'm trying to implement application code that is using openCV However, when I try to compile it, linking error occurs ( undefined reference error ) I checked header file declaration and it exists in proper directory It seems that using has a problem. Using and works well... Please help me.. application.cpp--------------------------------------------------------------------------------------------------------------------------------------- .. #include "DMS_Algo_Typedef.h" ... void* openclDilationThreadFunc(void* args) { sDMS *DMS = new sDMS; .... } DMS_Algo_Typedef.h------------------------------------------------------------------------------------------------------------------------------- typedef struct sFaceDetector { sParam_faceDetector param_init; sParam_faceDetector param; cv::Rect faceROI; cv::Mat faceRoiImage; cv::CascadeClassifier classifier; cv::Rect face; unsigned char fFaceDetect; } sFaceDetector; ... typedef struct sDMS { // Face detection sFaceDetector faceDetector; // Eye detection sEyeDetector eyeDetector; // Object management sGlobalObject objects; // Image cv::Mat inputFrame; cv::Size imgSize; // State unsigned char detectState; } sDMS; + +Responses: +Are you using BIOS/Linux? + +I'm using BIOS ~! + +Hi Please refer ti_components\open_compute\opencv\opencv-3.1.0\docs\vayu_arm_bios_opencv_test_report.xlsx and use the modules which are listed in this report as pass and verified. Object detect module is not listed in this and hence has not verified so you should avoid using these. Thanks, Pramod + +I should modify my code. Thanks a lot ! + diff --git a/data2/text/range/0-5000/689034.txt b/data2/text/range/0-5000/689034.txt new file mode 100644 index 0000000000000000000000000000000000000000..3d9728af7d31837d53c2b2007408a361a8241a5c --- /dev/null +++ b/data2/text/range/0-5000/689034.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: HDMI connect detected + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TPD12S016 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on the custom PCBA. TDA2 can do HDMI or LCD1 output. Need to add a mechanism to judge whether there is connection to HDMI. If there is a connection then HDMI output. If not, switch to LCD display. Is it GPIO to read the TPD12S016 "HDMI_HPD_A" state? Or are there other ways to tell if HDMI is connected? Thanks in advance. + +Responses: +Hi, Yes, you can read GPIO to find out HDMI connected state. In linux driver, we follow this sequence write 1 to HDMI_CT_HPD sleep 500 microseconds read HDMI_HPD write 0 to HDMI_CT_HPD But I think you can skip steps 1, 2 and 4 Regards, Subhajit + diff --git a/data2/text/range/0-5000/689086.txt b/data2/text/range/0-5000/689086.txt new file mode 100644 index 0000000000000000000000000000000000000000..894740f0a044c0c0727df17ac92c4f20253617ee --- /dev/null +++ b/data2/text/range/0-5000/689086.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Does visionSDK support ????? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm trying to compile the code which is using the cascadeClassifier in . However when refering to .structure or whatever it is in, the compile error occurs So, my question is Does visionSDK support ????? + +Responses: +duplicate question. refer to post with subject Compiler/TDA2: Fail to linking openCV file (objdetect) e2e.ti.com/.../688944 Thanks, Pramod + diff --git a/data2/text/range/0-5000/690108.txt b/data2/text/range/0-5000/690108.txt new file mode 100644 index 0000000000000000000000000000000000000000..a4421e0193ad6c7b36cf8b2aa786b181ef067f2d --- /dev/null +++ b/data2/text/range/0-5000/690108.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: miss zlib when build opencv + +Query Text: +Part Number: TDA2 Hi, I want to build opencv on tda2 board and VSDK 3.0. clone the file on http://git.ti.com/opencv Then, got some error message like this Linking C static library ../lib/libzlib.a Error running link command: No such file or directory make[2]: *** [3rdparty/lib/libzlib.a] Error 2 make[1]: *** [3rdparty/zlib/CMakeFiles/zlib.dir/all] Error 2 make: *** [all] Error 2 although, i didn't choose build_zlib How can i fix this problem? + +Responses: +Hi, could you try to apply the patches for opencl as described in chapter "2.4.2.2.4 Opencl supported package" in VisionSDK_Linux_UserGuide.pdf and try to rebuild? Regards, Yordan + diff --git a/data2/text/range/0-5000/690348.txt b/data2/text/range/0-5000/690348.txt new file mode 100644 index 0000000000000000000000000000000000000000..e591b0fd20a1489ba1e5b41e9864db42f4d41700 --- /dev/null +++ b/data2/text/range/0-5000/690348.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: How to verify OV10635 raw data same as capture link setting. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We change video source of TIDL_OD use case from SD card to VIP(OV10635) port. And set VIP output parameter(CaptureLink) same as original VPE output parameter of TIDL_OD. We can get video display by HDMI but output video not any object be draw. First, we want to verify video raw data from memory. Could you please give some advice to me? Thanks for your support. Links chart as below + +Responses: +Hello TI TIDL OD lib is trained to work only with one pre-recorded clip. You might need to train the same to work with real camera capture and that is why you did not see any object be draw regards, Shiju + +Hi Shiju, Thanks for your reply. Could you please advice us how to train with real camera capture? Have any document can study? Thanks. + +Please refer the below for training CNN network with your dataset. github.com/.../caffe-jacinto + +Thanks for Mr.Kumar advice. We will study first. Have a nice day :) + diff --git a/data2/text/range/0-5000/690397.txt b/data2/text/range/0-5000/690397.txt new file mode 100644 index 0000000000000000000000000000000000000000..e5082cac5ef7a7b4844890048847613f22a457c3 --- /dev/null +++ b/data2/text/range/0-5000/690397.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: ERROR of TIDL_OD usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi we want to run TIDL_OD use case but I got an ERROR below Can you tell anything to us? How do we do? Can you provide guide for our reference? And we create another thread below https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/689655 but we got the reply never Can you answer these two thread for us? + +Responses: +Hello what is the vision SDK version you use, try to use 3.3 version and TDA2x EVM. refer guide \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_TI_DeepLearning.pdf to build and run TIDL demos from VSDK regards, Shiju + +Hi, I use the SDK v3.03 version and TDA2x EVM And the other thread has any reply? + +OK, please refer guide \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_TI_DeepLearning.pdf to build and run TIDL demos from VSDK regards, Shiju + +OK please help me to resolve the other thread question + diff --git a/data2/text/range/0-5000/690455.txt b/data2/text/range/0-5000/690455.txt new file mode 100644 index 0000000000000000000000000000000000000000..41575649e75c427f43324427b02760a3dea41274 --- /dev/null +++ b/data2/text/range/0-5000/690455.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: OSA_timerCreate function question + +Query Text: +Part Number: TDA2 Hi, For function OSA_timerCreate Int32 OSA_timerCreate(OSA_TimerHndl *hndl,OSA_TimerCb cbf,union sigval value) Is it a hardware timer, will callback function run in interrupt context? I found in the callback function of TI user case example, there is wait function inside. If it is hardware timer, it will cause disaster, could you explain about it? Also where can i find the definition of timer_create? I want to make sure it has no problem before we use it at large scale commercially. ex： inside callback func System_sendLinkCmd(pObj->tskId, SYSTEM_CMD_NEW_DATA, NULL) is used, finally it will go to OSA_msgqSend int OSA_msgqSend(OSA_MsgqHndl *hndl, OSA_MsgHndl *msg, Uint32 timeout) { int status = OSA_EFAIL; pthread_mutex_lock(&hndl->lock); while(1) { if( hndl->count < hndl->len ) { hndl->queue[hndl->curWr] = msg; hndl->curWr = (hndl->curWr+1)%hndl->len; hndl->count++; status = OSA_SOK; pthread_cond_signal(&hndl->condRd); break; } else { if(timeout == OSA_TIMEOUT_NONE) break; status = pthread_cond_wait(&hndl->condWr, &hndl->lock); } } pthread_mutex_unlock(&hndl->lock); return status; } Best regards HUI + +Responses: +Hi Hui, Timer_Create is standard Linux API to create based on the given clock id. It uses high resolution hrtimer. Now since the timer the callback is in application space, it isnot really running in interrupt context. Where do you see wait in the timer callback? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/690561.txt b/data2/text/range/0-5000/690561.txt new file mode 100644 index 0000000000000000000000000000000000000000..08333487716cdfaa80a04405684639c171ef0d69 --- /dev/null +++ b/data2/text/range/0-5000/690561.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Modifying linkercmd files + +Query Text: +Part Number: TDA2 Hi, In Vision SDK, the linkercmd files are autogenerated. If I need to add a new section or edit the existing sections how to do it? Regards, Navinprashath.R.R + +Responses: +Hi Navin, You require to change bld file to add a new section and then inform about the new section to the BIOS. Then you could redirect the data structure to these memory section. You could refer to HDVPSS_DESC_MEM data section. It creates a new memory section of 2MB size, which is used for storing HDVPSS descriptors. Regards, Brijesh + +hi for example, <1> to add/modify a section refer file - \vision_sdk\apps\build\tda2xx\mem_segment_definition_bios.xs <2> to redirect the data structure to these memory section (for core IPU1-0) - refer file \vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\ipu1_0\Ipu1_0.cfg for DSP1 - refer \vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\dsp1\Dsp1.cfg regards, Shiju + diff --git a/data2/text/range/0-5000/690606.txt b/data2/text/range/0-5000/690606.txt new file mode 100644 index 0000000000000000000000000000000000000000..5579ef4e6ab9d0a8a2ceaf9cc9c1efc0de9c9cf6 --- /dev/null +++ b/data2/text/range/0-5000/690606.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: H.264 low lantancy encode + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, We are trying to enable low latency encoding by setting parameters for sliced mode on encoder link, but we keep getting errors in creation phase. Our video input is 1280x720. We are not sure about the slice size as well, so we are open to suggestions. Note: We are using TDA2xx chip and vision_sdk_2.12. This is what we changed so far: In usecase: pLinkChPrm->encodingPreset = SYSTEM_XDM_USER_DEFINED; pLinkChPrm->rateControlPreset = SYSTEM_IVIDEO_USER_DEFINED; In encLink_h264.c: staticParams->videnc2Params.inputDataMode = IVIDEO_NUMROWS; staticParams->videnc2Params.outputDataMode = IVIDEO_SLICEMODE; staticParams->sliceCodingParams.sliceCodingPreset = 1; //IH264_SLICECODING_USERDEFINED; staticParams->sliceCodingParams.sliceMode = 1; //IH264_SLICEMODE_MBUNIT; staticParams->sliceCodingParams.sliceUnitSize = 6; staticParams->sliceCodingParams.streamFormat = IH264_BYTE_STREAM; dynamicParams->videnc2DynamicParams.ignoreOutbufSizeFlag = XDAS_TRUE; dynamicParams->videnc2DynamicParams.getBufferFxn = enclink_h264_get_buffer_fxn; static XDAS_Int32 enclink_h264_get_buffer_fxn(XDM_DataSyncHandle dataSyncHandle, XDM_DataSyncDesc *dataSyncDesc) { dataSyncDesc->baseAddr = NULL; dataSyncDesc->numBlocks = 1;//gConfigOrg.numBlocks[block_count]; dataSyncDesc->varBlockSizesFlag = 1; dataSyncDesc->blockSizes = (XDAS_Int32*)Input_BlockSizeArray; return ENC_LINK_S_SUCCESS; } The error occurs at enclink_h264_control call with XDM_SETPARAMS. Thank you, Marijana + +Responses: +Hi Marijana, Please refer below sections in Encoder User Guide here: git.ti.com/.../docs Table 4-12: Default and Supported Values for IH264ENC_SliceCodingParams. Appendix G: Low Latency / Sub Frame Level Synchronization And Sample test application provided in the codec package @ path: ..\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\test\src Please refer putDataFxn & getDataFxn implementation. + diff --git a/data2/text/range/0-5000/690852.txt b/data2/text/range/0-5000/690852.txt new file mode 100644 index 0000000000000000000000000000000000000000..35a288b4b728b5538ce1cade65fd442c97e7819d --- /dev/null +++ b/data2/text/range/0-5000/690852.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: Error of create an new use case + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi We fallow the user guide and want to create an new use case but We got an error below Can you tell us what's wrong with the error? How can we fix this error? Allen + +Responses: +Hi Allen, is this "Chains_tidlODPrimax" function added by you in the new usecase? Can you check how function "Chains_tidlOD" is defined in "vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD.c" and declared as prototype in "vision_sdk/apps/src/include/chains.h" and do similar thing with your function? (I guess you already has it defined in your usecase and just need to add it to "vision_sdk/apps/src/include/chains.h") Regards, Yordan + +OK, we resolve this question. And, we have another thread and have not received a response for two days can you help us to resolve the thread below? e2e.ti.com/.../689655 Thanks Allen + +Hi Allen, thanks for confirming. I will ping the experts to comment on the other thread. Regards, Yordan + diff --git a/data2/text/range/0-5000/690959.txt b/data2/text/range/0-5000/690959.txt new file mode 100644 index 0000000000000000000000000000000000000000..1bdbcbb290c55ec916353774a8f8de1fdf5d2c64 --- /dev/null +++ b/data2/text/range/0-5000/690959.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: Can access the camera via v4l2 on TDA2PX + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello: we want to porting some demo to TDA2PX which using v4l2 to capture the video, for TDA2Px,using IMI modules (OV10640 Rev E sensor) & LVDS cables to connect camera modules to UB960 application board. can we access the camera by v4l2? if possible, any sample? Thanks! + +Responses: +Hello, We do not support raw cameras from Linux. - Linux CSI driver does not support virtual channel feature - Cannot connect more than one camera via one CSI port using UB960 - Does not have ISS driver for any raw image processing to be done from Linux The M4 based capture model is designed to exercise one set of FPDlink drivers, CSI drivers, ISS drivers, algorithms, etc TI recommends to use the capture from M4 itself. You can get the video to A15 by connecting the capture link to any of the link running on A15 Linux Regards, NIkhil D + +Hi: got it and thanks. + diff --git a/data2/text/range/0-5000/690992.txt b/data2/text/range/0-5000/690992.txt new file mode 100644 index 0000000000000000000000000000000000000000..86e9249b0e7531fdd414b2eb0a4ecc74d6218fc9 --- /dev/null +++ b/data2/text/range/0-5000/690992.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I'm studying the TDA2 EVM circuit , and I want to build up a ADAS by 1 camera input via mipi interface but it looks no mipi interface in TDA2, just only parallel interface is there mipi interface in TDA2 video input? which document can I refer to the information I need? thank you + +Responses: +No, TDA2 does not support MIPI interface. Rgds, Brijesh + +So the video input of TDA2 support just only parallel interface? thank you~ + +Yes, no support for serial interface at least for Video. only parallel interface. Rgds, Brijesh + +Got it ! Thank you very much~ + diff --git a/data2/text/range/0-5000/691430.txt b/data2/text/range/0-5000/691430.txt new file mode 100644 index 0000000000000000000000000000000000000000..e240703af50b9e89c597cd6712e19d27ac75c5c9 --- /dev/null +++ b/data2/text/range/0-5000/691430.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: TCP ACK segments comprising payload + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi everyone! We have established a set-up in the following manner: We are using two of TDA2x SoCs. The first SoC is a TX side device. We run a use case that captures video contents from cameras, encodes the data using H.264 encoder and pushes the data to the network by Null link. The second SoC is an RX side device. We have created a new link that is the same as the NullSrc link, with one exception, which implies that the link initiates a TCP connection (by default, the NullSrc link waits for a connection request from a PC, but in our case it sends a connection request). This means that our modified NullSrc link sends SYN segments to the TX device's Null link. The video contents are decoded and previewed using Display links. We performed network traffic observation between these two devices using Wireshark. During the observation we have noticed that TCP ACK segments comprise payload data. We suspect that this issue induces the bufferbloat effect on the sending side's TCP TX buffer. The latency between cameras (TX side) and displays (RX side) sometimes reaches 2 to 3 seconds. Is is necessary for ACK segments to comprise payload and is there any option to disable payload transmission within ACK segments? Best regards, Marko Gostović + +Responses: +Hi Marko, Marko Gostovic said: Is is necessary for ACK segments to comprise payload and is there any option to disable payload transmission within ACK segments? Yes, ACK segments are needed for TCP. I will check about disabling payload transmission. Have you tried using the TCP_NODELAY option to decrease this latency? Thanks, Gerardo + +Marko, I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out) Prasad Jondhale Sr. Software Engineer, Automotive Processors, TI India + +Hi, Prasad! We have invoked the setsockopt function with TCP_NODELAY flag and got similar behaviour. However, we omitted that the ACK segments comprising payload have been generated on the stream sending side, not on the receiving side. The ACK segments on the receiving side have been correctly generated with size of ~60 bytes. We succeeded to achieve the stream with acceptable performance running on the other test environment, so the size of segments is currently not important. Since there are ACK flags set within the forward-way stream segments (from video capture device to the stream acceptor device), we are wondering whether it is required for these flags to get set and is there any way to disable this issue in order to avoid the generation of segments with slightly confusing header contents? Best regards, Marko + +Hi Marko, On TCP all packets after the initial SYN packet should have the ACK flag set. Unless the ACK was being sent without payload data (just the header), then this is the correct behavior. BR, Gerardo + diff --git a/data2/text/range/0-5000/691442.txt b/data2/text/range/0-5000/691442.txt new file mode 100644 index 0000000000000000000000000000000000000000..a2783f75c0d1aa75e0acaab4d6fdbf6050671ca3 --- /dev/null +++ b/data2/text/range/0-5000/691442.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I'm building a ADAS with TDA2 the OV10640 is in the TDA2 AVL but I want to use OV10642 the only difference between them is the optical filter so can I use OV10642 in TDA2? if yes is now TDA2 support parallel interface to OV10642? or when could TDA2 support parallel interface to OV10642? thank you + +Responses: +Hi, TDA2x supports only parallel interface as input interface. So you need to connect OV10642, which outputs over parallel interface. Please note that there is no ISP on TDA2x, so you could capture Bayer data, but there is no HW module to convert it into YUV format. Regards, Brijesh + +Hi So TDA2x support OV10642 ,although it is not in AVL? thank you~ + +Again, only capture can be supported over parallel interface. you will require to add all other processing for this sensor on TDA2x Regards, Brijesh + +I understand , OV10642 support parallel output is there OV10640 or OV10642 booting file for reference? thank you~ + +Hi, What is booting file? we have some register settings for OV10640 in folder VSDK_3_2\vision_sdk\apps\src\rtos\iss\src\sensor\ov10640. Rgds, Brijesh + +Hello the difference between OV10642 & OV10640 is only RCCC & RGGB filter so we can use OV10642 by using the register settings for OV10640 in the SDK folder? thank you~ + +You need to check with omnivision, i am not sure what changes are required for OV10642.. Rgds, Brijesh + +Hello OmniVision told us that OV10642 & OV10640 are same in register setting so could we use OV10642 by using OV10640 settings in SDK? thank you~ + +Yes, if omnivision says so. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/691451.txt b/data2/text/range/0-5000/691451.txt new file mode 100644 index 0000000000000000000000000000000000000000..37577936bc61ae075dd1cda60416f3e54e320816 --- /dev/null +++ b/data2/text/range/0-5000/691451.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: wlan0 no wireless extensions + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on the custom PCBA. Check ASUS USB-N13 rev A1, kernel modules is rt2800usb. Select ralink driver. Check driver is loaded. When plug usb-N13, log is below: But, wlan0 no wireless extensions. why? wlan0 try restart, and print: IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready should I be solved "wlan0 no wireless extensions" first? Could you please give some suggestion here? Thanks in advance. + +Responses: +Make sure you have enabled CFG80211_WEXT configuration in your Kernel. It would be under -> Networking support -> Wireless -> cfg80211 - wireless configuration API -> cfg80211 wireless extensions compatibility + diff --git a/data2/text/range/0-5000/691483.txt b/data2/text/range/0-5000/691483.txt new file mode 100644 index 0000000000000000000000000000000000000000..7bbb74b87060e9788cac51cfc1795c946f1e64a2 --- /dev/null +++ b/data2/text/range/0-5000/691483.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: how to set tda2x's DSP clock in uboot ? + +Query Text: +Part Number: TDA2 Hi We are using tda2x self-designed board, the default value of dsp clock of tda2x is 750MHZ,Now we want to set the tda2x's DSP clock to 500MHZ in uboot, how to do that ? Thanks + +Responses: +Hi, can you try to modify the "dra7_opp_dsp_clk_rates" structure in /arch/arm/cpu/armv7/omap5/fdt.c with your new values. Regards, Yordan + +As a side note, I suggest using the Clock Tree Tool (CTT) to understand the TDA2x clocks better. The CTT can be downloaded free of charge here: www.ti.com/.../clocktreetool thanks, Alex + diff --git a/data2/text/range/0-5000/691724.txt b/data2/text/range/0-5000/691724.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c68e06fbe43553cbc204eaf7cb5e6d898cd5e55 --- /dev/null +++ b/data2/text/range/0-5000/691724.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: what is Video Capture and AVB Capture mean? + +Query Text: +Part Number: TDA2 Tool/software: Linux Excuse me! i am build visionsdk follow VisionSDK_Linux_UserGuide.pdf, 3.1 Build Linux Vision SDK for Video Capture and Display use-cases 3.2 Build Linux Vision SDK for AVB Capture, Decode and Display UCs But I don't know what the difference between 3.1 and 3.2 ? what is Video Capture mean? what is AVB Capture mean? + +Responses: +Hi , There are some modules disabled in kernel and built for certain usecases . AVB is one of them 3.1 The usecase chain will have capture / null src as input source for the stream . Hence the steps to be followed to build application for all capture usecase , 3,2 The usecase uses AVB (network) as capture source, Here Networking is disabled from kernel and handled at ipu . Hence changes to be done to disable ethernet from kernel. Regards Chetan.M + +Hi:Chetan.M execute make –s –j depend For a moment, the virtual machine is automatically restarted. After restarting execute make –s –j is also have this problem , and no application’s .out file in ti_components/os_tools/linux/targetfs/opt/vision_sdk BESTWISHES shuai + +Hi Shuai , There is another thread for the build issue please use that thread , You can close the thread and mark answered if above issue is solved . Regards Chetan.M + +Hi Chetan.M insufficient memory YOURS shuai + +Hi Chetan.M I want to read a.AVI video file as an input, then i should use 3.1?? Regards shuai + +Yes you need to use null src as input , 3.1 is the build you need to use. Regards Chetan.M + +Hi Chetan.M null_src_decode_display this one ，but where should i add my code of open file? BESETWISHES SHUAI + +Hi Shuai, I see other thread by you with same question on null src. Can you please close the thread and marked answer . Regards Chetan.M + diff --git a/data2/text/range/0-5000/691735.txt b/data2/text/range/0-5000/691735.txt new file mode 100644 index 0000000000000000000000000000000000000000..957422b69d8f32ee76a74b069fd74a3342813dca --- /dev/null +++ b/data2/text/range/0-5000/691735.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Dual partition layout for enhanced software upgrade and support rolback + +Query Text: +Part Number: TDA2 Hello: For safety software upgrade, we expect to use two partition, partition A and B based on NAND. A and B both contain the whole image when A is active, new software is download to B,and then active B. my question: does current TI has the sample solution for this ? does the u-boot already support this to read the partitions alternatively and load image correctly? For linux image in each partition, we also expect to use dual FS partition for linux upgrade, please have look at https://wiki.yoctoproject.org/wiki/System_Update does TI already support it in SDK Any sample for share? Thanks! + +Responses: +Hi, Sorry for the delay in my response! Regarding software upgrade, what we support on our platform today is available at processors.wiki.ti.com/.../6AO.1.0_Application_Notes You may also take a look at the specific patch at review.omapzoom.org/ that enabled the recovery mode and ability to update firmware. It shows one way of how u-boot can decide which image to load at run time. We flash both the regular boot image and recovery image when flashing full image to EVM. I would request you to please go through the above information and let us know if you have more questions. Regards, Somnath + diff --git a/data2/text/range/0-5000/691786.txt b/data2/text/range/0-5000/691786.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ed9482e5099f831b227d2704df55e9d0ae3f125 --- /dev/null +++ b/data2/text/range/0-5000/691786.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: vision_sdk build failed + +Query Text: +Part Number: TDA2 Tool/software: Linux Excuse me ： i am building vision_sdk follow VisionSDK_Linux_UserGuide 3.1 Build Linux Vision SDK for Video Capture and Display use-cases step 5. Build the sdk $>make –s –j depend $>make –s –j execute make –s –j depend For a moment, the virtual machine is automatically restarted. After restarting, the reexecution will be wrong. execute make –s –j is also have this problem , and no application’s .out file , and no respectively in ti_components/os_tools/linux/targetfs/opt/vision_sdk + +Responses: +Hi , The virtual machine is automatically restarted might be for some other reason. Check the permissions of the folders and size allocated . For linux you need to build the kernel , follow user guide make linux, make linux_install make -s -j depend make -s -j Regards Chetan.M + +virtual machine insufficient memory + +Please run all the steps after increasing the memory and then tar the filesystem Regards Chetan.M + diff --git a/data2/text/range/0-5000/692229.txt b/data2/text/range/0-5000/692229.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba7aac914e89c903637fc84177a0ca8b0fc04512 --- /dev/null +++ b/data2/text/range/0-5000/692229.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: HAO CAN i use 2 A15 + +Query Text: +Part Number: TDA2 Tool/software: Linux I HAVE build vision_sdk,and run it , but in use case use only one A15 ,i have to use 2 A15 , what can i do ? in file configs\tda2xx_evm_linux_all cfg.mk PROC_IPU1_0_INCLUDE=no PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes should i add PROC_A15_1_INCLUDE=yes thanks + +Responses: +Hello By default VSDK Linux uses both the A15 in SMP mode, no need to do any separate configuration here. Even if the cfg file has set PROC_A15_0_INCLUDE=yes, the Linux kernel uses both the A15 cores and this is abstracted from the application. regards, Shiju + +Hi Shiju which usecase in the visonSDK use both A15? Can refer to！ regards, shuai + +Hello All the demos of vision SDK HLOS (Linux) uses dual A15. For the user/application its appears to be as a single A15 core, but underneath the OS uses both A15 cores in SMP mode. You can think as a single A15 core with CPU clock/frequency doubled. regards, Shiju + +thankyou! + diff --git a/data2/text/range/0-5000/692274.txt b/data2/text/range/0-5000/692274.txt new file mode 100644 index 0000000000000000000000000000000000000000..e6658ae648d190878b780877e374bea199d590be --- /dev/null +++ b/data2/text/range/0-5000/692274.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: null_src_decode_display run problem + +Query Text: +Part Number: TDA2 Tool/software: Linux i have build visionsdk and run ,i sellect 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) but fail follow is print inf Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 5 [HOST] [HOST ] 902.534290 s: [HOST] [HOST ] 902.534320 s: [HOST] [HOST ] [HOST] [HOST ] ========================================= [HOST] [HOST ] Chains Run-time Codec Type Selection Menu [HOST] [HOST ] ========================================= [HOST] [HOST ] [HOST] [HOST ] Enter '0' for MJPEG [HOST] [HOST ] [HOST] [HOST ] Enter '1' for H.264 [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 ASSERT (nullSrcLink_tsk.c|NullSrcLink_create|1083) + +Responses: +Hi, Did you copy the input files to home folder of file system or not ? Regards Suryamani Jena + +Hi Suryamani Jena 1920x1080_00.hdr 1920x1080_00.h264 where is this tow file? Regards shuai + +Hi Shuai, It should be available in CDDS (refer below link) Vision SDK demo clips are available at cdds.ext.ti.com/.../emxNavigator.jsp Regards Suryamani Jena + +Hi Suryamani Jena but i have no cdds , i have .h264 file for test , How to get the correspond .hdr file? BESTWISHES SHUAI + +Hi shuai, I replied in below thread (Please refer) e2e.ti.com/.../2551636 Regards Suryamani Jena + +Hi Suryamani Jena can the file put /opt/704X400_00/704X400_00.h264 or need to /home/704X400_00/704X400_00.h264 ? BESTWESHES SHUAI + +Hi Shuai, It should be under /home of rootfs partition Refer Usecase You need to copy files to /home/704X400_00.hdr & /home/704X400_00.h264 Regards Suryamani Jena + diff --git a/data2/text/range/0-5000/692297.txt b/data2/text/range/0-5000/692297.txt new file mode 100644 index 0000000000000000000000000000000000000000..408930609dd987cbd6465d0a9f469e889f10ab16 --- /dev/null +++ b/data2/text/range/0-5000/692297.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: TDA2X reading large data onto Memory + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi, I'm working on TI TDA 2x and my C program requires large data file to be loaded onto memory. Originally in desktop, I loaded the required a file which is amount to 50~150MB binary data file(Most data is comprised of Integer) using fread(). But I'm afraid that the file maybe takes too long time to read in TDA board. To be simply, my C code reads arrays including innumerable Integers amount to 50~150MB. Is there a useful way to load large file? Is there someone who has experience about similar situation? Thank you. + +Responses: +hello Yes this can be one option - where you embedded the data file (as arrays/constants) in the executable. But this will increases the binary size. Another option - you can use CCS to load the file into memory SD card read or network read are other options - these are supported in vision SDK 3.3 release regards, Shiju + diff --git a/data2/text/range/0-5000/692303.txt b/data2/text/range/0-5000/692303.txt new file mode 100644 index 0000000000000000000000000000000000000000..f6a66352410fd457666aa03e0b6b6b318ed9d0f8 --- /dev/null +++ b/data2/text/range/0-5000/692303.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: what is /home/1920x1080_00.hdr + +Query Text: +Part Number: TDA2 Tool/software: Linux in usecases\null_src_decode_display\chains_nullSrc_Display.c strncpy(pPrm->channelParams[chId].nameDataFile, "/home/1920x1080_00.h264", 260); i think is in put src vedio strncpy(pPrm->channelParams[chId].nameIndexFile, "/home/1920x1080_00.hdr", 260); but what is this ? for what ? + +Responses: +Hi, .h264 file -> input src file .hdr file -> Index file (size of each frame of input src file) Regards Suryamani Jena + +Hi Suryamani Jena but how can i get .hdr file ,i only have .h264 vedio Regards shuai + +i think in the SDK should give some file as an example! + +Hi shuai, You can generate .hdr file from .h264 file (follow below steps) Required software: FFmpeg ----------------------------------------- Creating index file from input src file ----------------------------------------- Create index file ffprobe.exe -show_packets input.h264 > index.idx On Linux machine: Extract just "Size" from above generated index file with sed command. PAT=size sed -n "/$PAT/p" index.idx | cut -d' ' -f3 >> size_extracted.txt Now generate binary file from size extracted file, with below command. Please note that " size_extracted.txt should not contain any string just numbers i.e size of frame " cat size_extracted.txt | perl -n -e 'printf("%08x\n",$_)' | sed 's/\(..\)\(..\)\(..\)\(..\)/0x\4\n0x\3\n0x\2\n0x\1/' | xxd -r -p > Size_test.bin && du -b Size_test.bin Rename Size_test.bin as input.hdr and use it as index file Regards Suryamani Jena + diff --git a/data2/text/range/0-5000/692436.txt b/data2/text/range/0-5000/692436.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ab207102cd3928bc5e45c0ee777fbbd401f5abf --- /dev/null +++ b/data2/text/range/0-5000/692436.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: usecases\null_src_decode_display change + +Query Text: +Part Number: TDA2 Tool/software: Linux if i change some code of usecases\null_src_decode_display , i just make -s -j ? need make -s -j depend ? + +Responses: +Hi Shuai, to rebuild the usecase you need just "make -s -j". You can check chapter "3.2 Building the application" of VisionSDK_UserGuide_TDA2xx.pdf for more details when "make -s -j" and "make -s -j depend" is used (in general the "make -s -j depend" command is used when some configs or something in ti_components has changed). Regards, Yordan + diff --git a/data2/text/range/0-5000/692653.txt b/data2/text/range/0-5000/692653.txt new file mode 100644 index 0000000000000000000000000000000000000000..dc3b0d5180cf8cc012aae6b6723f9675d10fd4d1 --- /dev/null +++ b/data2/text/range/0-5000/692653.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: what is OCMC memory? + +Query Text: +Part Number: TDA2 Tool/software: Linux in VisionSDK_DevelopmentGuide.pdf tell me. Algorithm might need some memory for its operation, which is internal to the algorithm. This memory might be present in DDR / OCMC / L2. Such memory requests for the algorithm needs to be catered to in create plug in function. but what is OCMC memory? + +Responses: +Hi OCMC is an On Chip Memory Controller, its an internal memory accessible from all CPUs regards, Shiju + +Hi :Shiju is there any DOC talk about OCMC? BESTWISHES SHUAI + +Hi SHUAI sorry, what is DOC? regards, Shiju + +Hi: Shiju document pdf， for exmample CorePac_guide talk about C66 core and memery! BESTWISHES SHUAI + +Hi SHUAI please refer the TRM (technical reference Manuel) of the TDA device for all SoC related details regards, Shiju + diff --git a/data2/text/range/0-5000/692767.txt b/data2/text/range/0-5000/692767.txt new file mode 100644 index 0000000000000000000000000000000000000000..c2839be23a6e30f99ce70d9d64813fd67365eb89 --- /dev/null +++ b/data2/text/range/0-5000/692767.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EVM5777: About Opencv building issue in VisionSDK 3.2 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi Sir we used TDA2 platform for development and would like to build opencv function. we can build default tda2xx_evm_linux_opencx use case successfully. But if we set BUILD_OPENCV_SRC=yes, the build procedure fails. My procedure is described below. Download opencv source from git://git.ti.com/opencv/tiopencv.git Install cmake by "apt-get install cmake". make -s opencv ==> fail In /vision_sdk/build/hlos/makerules/linux/build_opencv.mk, the cmake file is not found in the downloaded opencv source. $(CMAKE) -DCMAKE_TOOLCHAIN_FILE=../platforms/linux/arm-gnueabi.toolchain_vsdk.cmake -DBUILD_DOCS:BOOL=OFF -DBUILD_PACKAGE:BOOL=OFF -DBUILD_PERF_TESTS:BOOL=OFF -DBUILD_SHARED_LIBS:BOOL=OFF -DBUILD_TESTS:BOOL=OFF -DBUILD_WITH_DEBUG_INFO:BOOL=ON -DBUILD_opencv_apps:BOOL=OFF -DCMAKE_BUILD_TYPE:STRING=Debug -DCMAKE_VERBOSE_MAKEFILE:BOOL=TRUE -DENABLE_NEON:BOOL=ON -DWITH_1394:BOOL=OFF -DWITH_CUFFT:BOOL=OFF -DWITH_EIGEN:BOOL=OFF -DWITH_FFMPEG:BOOL=OFF -DWITH_GIGEAPI:BOOL=OFF -DWITH_GSTREAMER:BOOL=OFF -DWITH_JASPER:BOOL=OFF -DWITH_JPEG:BOOL=OFF -DWITH_MATLAB:BOOL=OFF -DWITH_OPENCL:BOOL=ON WITH_OPENCLAMDBLAS:BOOL=OFF -DWITH_OPENCLAMDFFT:BOOL=OFF -DWITH_OPENEXR:BOOL=OFF -DWITH_PNG:BOOL=OFF -DWITH_PTHREADS_PF:BOOL=ON -DWITH_PVAPI:BOOL=OFF -DWITH_TIFF:BOOL=OFF -DWITH_WEBP:BOOL=OFF ../ please advise and thanks for your help BR Yimin + +Responses: +HI Yimin, Please use pre-built library of openCV. It will not be possible to support you on how to build it because the openCV support infrastructure is deprecated. Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/692787.txt b/data2/text/range/0-5000/692787.txt new file mode 100644 index 0000000000000000000000000000000000000000..bafbac03baca3a0c7ecd9eda80287537a6283a89 --- /dev/null +++ b/data2/text/range/0-5000/692787.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: Radar SDK v3.3 usecase generation tool error + +Query Text: +Part Number: TDA2 Hi, I am trying to use the Usecase generation tool to create the .jpg file in radar SDK. I am using the following command to create these files(usecase_name.priv.c , usecase_name.priv.h, usecase_name.jpg files) Command is: vsdk_win32.exe PATH_TO_USECASE_FOLDER/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER/ I was able to create all the files successfully in Vision-SDK, But here I came across with an error saying about the compatibility issue since my system is of 64 bit. (Didnt come across this error while in Vision-SDK ) When I use vsdk_win64.exe trying with the same command, jpeg file is not created and the rest of the files are being created. And when I use executable "vsdk_win32.exe" present in visionSDK 3.2 and provide the usecase of RADAR-SDK , the jpeg is being created. Command is: vsdk_win32.exe PATH_TO_USECASE_FOLDER_IN_RADAR-SDK/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER_IN_RADAR-SDK In all the cases I have set the PATH to the Graphviz tool. I do not understand what is the issue with the RADAR-SDK's vsdk_win32 .exe Thanks & Regards, Varsha + +Responses: +Varsha, The usecase generation tool is the same between Processor SDK Radar and Processor SDK Vision. The summary of the question I am understanding from 3.2 release to 3.3 release you are seeing a difference in the behavior. I will ask one of my collegues to check this and get back to you. Regards, Piyali + +Hi Varsha, We followed procedures mentioned by you & we didn't face any issues Below are few more experiments we did & no issues observed Exp1: cmd prompt - 32 bit UC gen tool - 32 bit cmd - vsdk_win32.exe PATH_TO_USECASE_FOLDER/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER/ observation - no issues Exp2: cmd prompt - 32 bit UC gen tool - 64 bit cmd - vsdk_win64.exe PATH_TO_USECASE_FOLDER/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER/ observation - no issues Exp3: cmd prompt - 64 bit UC gen tool - 64 bit cmd - vsdk_win64.exe PATH_TO_USECASE_FOLDER/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER/ observation - no issues Could you please check once in your end & let us know your observations Are you still facing issues ? Regards Surya + +Hi Surya, Thanks for the informative reply. Are these observations made by using vsdk_win32.exe present in Processor VisionSDK version-3.2? I faced no issues when I was using the tool from VisionSDK. But when I tried the same thing in RadarSDK version-3.3 I faced issues with the tool present in RadarSDK. And my windows versions is of 64-bit These are my experiments: Exp 1:vsdk_win32.exe present in VisionSDK UC generation tool: 32 bit command: vsdk_win32.exe PATH_TO_USECASE_FOLDER_IN_VisionSDK/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER_VisionSDK observation: No issues Exp2: vsdk_win32.exe present in RadarSDK UC generation tool: 32 bit command: vsdk_win32.exe PATH_TO_USECASE_FOLDER_IN_RADARSDK/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER_IN_RADARSDK observation: compatibility issues Exp3: vsdk_win32.exe present in VisionSDK and usecase in RadarSDK UC generation tool: 32 bit command: vsdk_win32.exe PATH_TO_USECASE_FOLDER_IN_RADARSDK/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER_IN_RADARSDK observations: works fine. jpg file also created. Exp 4: vsdk_win64 in vision SDK UC generation tool: 64 bit command: vsdk_win64.exe PATH_TO_USECASE_FOLDER_IN_RADARSDK/usecase.txt -img -file -path PATH_TO_USECASE_FOLDER_IN_RADARSDK observations: All files are created except .jpg file Thanks & regards, Varsha + +Hi Varsha, For Exp2, Could you please check with the binary file "vsdk_win32" present under "apps\tools\vision_sdk_usecase_gen\bin" folder (Don't use the binary file "vsdk_win32" present under "build\rtos\scripts" folder ) For Exp4, Regarding UC generation tool 64 bit, did you recompile the src on a 64 bit machine & generate the "vsdk_win64" or how is it ? Regards Surya + +Hi Surya, For Exp2, I tried with the binary file from the folder you suggested. But still I encounter the same error. For Exp4, I did not recompile it. I downloaded it from one of the threads in the e2e forum. I also read about the following command to manually create the jpg file: dot chains_new_usecase_img.txt -o chains_new_usecase.jpg Thanks & regards, Varsha + +Hi Varsha, Could you please try with attached binary file "vsdk_win64" ? vsdk_win64.zip Regards Surya + +Hi, Yes, This worked!!! But, why 32 bit file of RADAR SDK gives an error and not of Vision SDK? regards, Varsha + +Hi Varsha, Can you try building the use-case gen tool ? Please refer UG under "apps\tools\vision_sdk_usecase_gen\docs" folder Regards Surya + diff --git a/data2/text/range/0-5000/692809.txt b/data2/text/range/0-5000/692809.txt new file mode 100644 index 0000000000000000000000000000000000000000..3413ca6d268fb1d298719fe5faa573292e75d182 --- /dev/null +++ b/data2/text/range/0-5000/692809.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: OV490 VIP input , split Link seems not to work. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi all, The SDK version is PROCESSOR_SDK_VISION_03_00_00_00 . There are 4CH OV10640 capture via OV490 on my TDA2xx board， i tested with lvds_vip_multi_cam_view_sgx_display usecase under linux. The changes as below: 1. change capture settings with 2560 width; 2. add the split link. capture -> split ->sync -> sgxfrmcpy -> display and it can display 2 camera video. I changed the sgxFrmcpyLink_drv.c with texProp.width * 2 (line 321:) ,the output video as below; it seems split link doesnot work? In sgxFrmcpyLink_drv.c, texYuv[] = System_eglGetTexYuv(&pObj->eglObj, &texProp, pVideoFrame->dmaFd[0]); I note that It used the dma transfer. Query: How can I split the video correctly? + +Responses: +Hi John, Let us check it out in the release. Rgds, Brijesh + +Hi John, Can you please just tell us what are you trying to achieve with split link or what problem are you trying to solve with split link ? Regards Surya + diff --git a/data2/text/range/0-5000/692810.txt b/data2/text/range/0-5000/692810.txt new file mode 100644 index 0000000000000000000000000000000000000000..077cff1f242e42b51001aedeb132f1dbda4ba8e7 --- /dev/null +++ b/data2/text/range/0-5000/692810.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: Booting from NAND, how to manage the application images + +Query Text: +Part Number: TDA2 Hello: For the TDA2-EVM board, it boot from the sdcard with the ext2 file system, for our product which will use the nand for persistent storage. and seem little document introduce how to boot from nand. My question are: 1. For nand, should we organise the multiple app image based on file system like booting from sd card? 2. <> under ti_components\drivers\pdk_01_09_00_17\packages\ti\boot\sbl_auto\docs\internal , introduce the tiimage file, is that based raw data or file system? 3. if boot from nand, seem the ubifs is the better, consider above, shall we make the multiple app image into an ubifs partition for u-boot to load multiple app images? 4. what's the different between connecting nand to emmc and connecting nand to GPMC? Thanks very much! + +Responses: +There is no support for NAND in PDK (RTOS) and there is no plan to use NAND in the future as well. The RTOS SBL supports only MMC, NOR and QSPI boot media. If you need NAND support use need to use Linux driver stack. + +Hi, In addition to what Sivaraj said, NAND boot is supported for AM335x device: processors.wiki.ti.com/.../AM437x. You can use this as a reference in case you want to develop SBL for NAND boot. Kindly note that SBL and u-boot are two different boot loaders. It is not very clear from the question whether you are using linux (i.e. u-boot) or RTOS (i.e. SBL) as both are being referred in the question. Regards, Rishabh + +Hello Both: As we'are new to the TDA2xx, maybe the question is not very clear. let me clarify it again. we'are using TDA2PX as our product, which will use the NAND as the boot media. the A15 will run the linux. the evem demo board use vision SDK and introduce the uboot and booting from the sdcard, so we are looking how we can boot from the NAND. 1. uboot is not SBL, if using SBL, tiimage format must be used for multiple app images? 2. uboot is for linux and SBL for RTOS? 3. for our case, we should use the uboot, and treat multiple app images like files and pack them into a filesystem? 4. the evem board boot from sdcard with ext4 filesystem, and for boot from nand, ubifs is better? BTW,what's the MLO under boot partition of the sdcard? + +Hi, Yes you are correct that uboot is for linux and SBL is for RTOS. It seems that you are using Processor SDK Linux. Please let me know if this is not the case. Uboot does not claim NAND flash support for TDA2Px device. However uboot supports NAND boot for TDA2Ex. You can refer to below commits: git.ti.com/.../ git.ti.com/.../ git.ti.com/.../ You can also refer to below e2e threads on the same topic: e2e.ti.com/.../655887 e2e.ti.com/.../2165108 Regards, Rishabh + +Hi, You should also note that TDA2xx, TDA2Px and TDA2Ex belong to the same SoC family but they are different SoCs. Regards, Rishabh + +Hi Rishabh: we are using TDA2PHG and use NAND for boot media. + +Hi, As explained above you need to implement the NAND boot for TDA2Px. Uboot does not claim NAND flash support for TDA2Px device. Regards, Rishabh + +Hi Rishabh: Can give it more details about implement the NAND boot for TDA2Px. As my understanding, with the linux, only the Uboot is the only way to bring up the kernel. If the Uboot does not calin NAND flash support for TDA2Px device, should we focus on Uboot, and implement the NAND boot in Uboot? + +Hi, Yes Uboot is needed to bring up Kernel. I have already shared the NAND support git patches for TDA2Ex device. You should refer to them and implement the same for TDA2Px. Regards, Rishabh + +Hi Rishabh: Appreciate so much! + +Hi, Glad to help. Kindly mark the post that resolved your query as "This resolved my issue". Feel free to ask any follow-up questions by creating a new thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/692824.txt b/data2/text/range/0-5000/692824.txt new file mode 100644 index 0000000000000000000000000000000000000000..06d1a08837b829a10a74a363af957d6c0ce5273a --- /dev/null +++ b/data2/text/range/0-5000/692824.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: CAN bus protocol sample code + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, TI have any CAN bus protocol sample code for reference? (CANopen, SAE J1939 or etc) + +Responses: +Hi Prince, SAE J1939 standard is supported by MCAN module which is available on TDA2Px only. MCAN sample example is available at: '\ti_components\drivers\pdk_xx\packages\ti\csl\example\mcan'. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Mr.Vivek, Understand and thank for your support. + diff --git a/data2/text/range/0-5000/692866.txt b/data2/text/range/0-5000/692866.txt new file mode 100644 index 0000000000000000000000000000000000000000..05bd647c025162fe0f4177f3802d4ec1b815cff6 --- /dev/null +++ b/data2/text/range/0-5000/692866.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EVM5777: TDA2EVM5777 to Radar interface + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, AWR1243 Tool/software: Linux Hello What interface is there TDA2x provide to link the mmWave Radar for sensor fusion? is there any reference circuit for connecting radar? thank you~ + +Responses: +TDA2 has VIP port, so inorder to connect the AWR1243 to TDA2 you would need to convert the CSI to VIP port using some sort of CSI to parallel converter like an FPGA. TI has a plan to launch a TI design for cascade radar processing with TDA2x in Q3 2018. You can use this as a reference. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/692870.txt b/data2/text/range/0-5000/692870.txt new file mode 100644 index 0000000000000000000000000000000000000000..1b74e996e382f9dd7f3e5b7c12082656941edfe9 --- /dev/null +++ b/data2/text/range/0-5000/692870.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2EVM5777: Power consumption of TDA2X + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello Why in the TDA2EVM5777 the total power output of the PMIC(SMPS1.2.3+SMPS4.5+SMPS6...etc) is larger than the input power(3V3_EVM)? is there power consumption test report in SDK for reference? thank you~ + +Responses: +Hello Which exact 3.3 V rail are you observing? There are multiple 3.3 V lines on the board. How are you measuring the power? Is it through the on board INAs? Regards, Piyali + +Hello I didn't measure the power. I study from the document "J6 EVM Power Integrity Analysis" Only VDD_MPU+VDD_DSPEVE will be 10.814W the source of PMIC "PS_EVM_3V3" is feed from TPS43351 buckA which has the maximum 3A output it can only provide 3Ax3.3V=9.9W that is smaller than PMIC output + +Hello Could you provide the power consumption of TDA2 when just running a usecase? Maybe like LDWS,FCW,or TSR Thank you~ + +Hi, Unfortunately, we would not be able to share the power measurements for the SDK usecases. The measured power is usually dependent on the sample type, device junction temperature, type of usecase being run etc. If you would like to know about the worst case power for the device for a particular usecase you have in mind, you can get in touch with your TI representative with the details regarding the CPU Core loading and interfaces being used. If you would like to perform the measurements yourself you can also run the Processor SDK Vision Usecases on the TI EVM and measure the power using the shunt resistors and INAs provided on the TI EVM. Could you please share what activity are you involved in at the moment? Are you working towards creating your own board based on the TI reference? If yes, I can try and get the EVM experts to help you here. Thanks and Regards, Piyali + +Hello Yes,I am now designing our own board based on TI's reference. But the power consumption is unknown, and the total power output of PMIC is larger than inputs shown on the reference. Our TI representative told us the output of PMIC in reference is the maximum value ,the output should not exceed the input in actual using. But if there is no information of real using power consumption, how could I make sure that our power design is ok? thank you + +Hello, There is a power estimation sheet which for a given application and temperature can allow you to estimate the worst case power consumed. You should get in touch with your TI representative to have access to the output of this excel sheet. Thanks and Regards, Piyali + +Hello Thank you for your information , I got the power estimation sheet form our TI representative but I have another question here. Do you know what value should I fit to the sheet if I use just only LDWS function? thank you~ + +Hello, For the CPU loading information regarding LDW and other related algorithms, you can refer to the Processor SDK Vision software package. This contains the document vision_sdk\docs\VisionSDK_DataSheet.pdf which gives detailed analysis of the device loading for different usecase scenarios. In particular you can look at the "Single Channel Analytics2 on TDA2xx & TDA3xx - EUNCAP usecase" section to get the values for fitting into the sheet. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/692871.txt b/data2/text/range/0-5000/692871.txt new file mode 100644 index 0000000000000000000000000000000000000000..29262b24ada4b02bd5a1941140c3df3023e61637 --- /dev/null +++ b/data2/text/range/0-5000/692871.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: GPIO list of TDA2EVM5777 + +Query Text: +Part Number: TDA2EVM5777 Hello Is there GPIO list of TDA2EVM5777 for design reference? thank you~ + +Responses: +Hi, You should check the device datasheet www.ti.com/.../tda2.pdf for GPIO list. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/692872.txt b/data2/text/range/0-5000/692872.txt new file mode 100644 index 0000000000000000000000000000000000000000..d5e1de50d905396274b1104b90bcf10fffc6796f --- /dev/null +++ b/data2/text/range/0-5000/692872.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Links and Chains Document support? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, Do you have more about Links and Chains Document support? Thanks Walter + +Responses: +Walter, You could find documentation in the doc folder.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/692924.txt b/data2/text/range/0-5000/692924.txt new file mode 100644 index 0000000000000000000000000000000000000000..098c5faca6532eb61f4d5d164c512aa612dddc4a --- /dev/null +++ b/data2/text/range/0-5000/692924.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: what databuf do when ipc out ipc in + +Query Text: +Part Number: TDA2 Tool/software: Linux a15 ipcout c66ipcin In the process of IPC, is the data need to be copied from A15buf to c66buf, or buf is shared by A15 and C66, without copying data. + +Responses: +Hello No need to copy, the buffer memory is shared and you can just use the sane on C66x without any copy regards, Shiju + diff --git a/data2/text/range/0-5000/693083.txt b/data2/text/range/0-5000/693083.txt new file mode 100644 index 0000000000000000000000000000000000000000..ea83af78102c12579483bfaba767ba5f9b11bbda --- /dev/null +++ b/data2/text/range/0-5000/693083.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: vision_sdk\links_fw\src\hlos\links_a15 this links only for A15 or common? + +Query Text: +Part Number: TDA2 Tool/software: Linux in vision_sdk\links_fw\src\hlos\links_a15 have some links , this links only for A15 or common? i think i can run IPCOUT on A15 and IPCIN on C66 CORE, should i ?? + +Responses: +Hi Shuai, the links in "vision_sdk\links_fw\src\hlos\links_a15" are for High Level OS (e.g. Linux) which can run only on A15. The links in "vision_sdk\links_fw\src\rtos" are for Bios and can run on the other cores. In particular you can check "vision_sdk\links_fw\src\rtos\links_common\ipcOut" and "vision_sdk\links_fw\src\rtos\links_common\ipcIn". Regards, Yordan + diff --git a/data2/text/range/0-5000/693101.txt b/data2/text/range/0-5000/693101.txt new file mode 100644 index 0000000000000000000000000000000000000000..6994315269484ce96668c7c0ca55b9f9ee906765 --- /dev/null +++ b/data2/text/range/0-5000/693101.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Can provide more use case using the source from SD card, not the camera + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, as title we using version 3.03 SDK on TDA2 Can provide more use case using the source from SD card, not the camera BR Allen + +Responses: +Hi Allen, Refer below UCs (under vision_sdk\apps\src\rtos\usecases) which uses source from SD card 1. null_src_display UC 2. null_src_dec_display UC 3. tidl UC 4.tidl_OD UC Regards Suryamani Jena + +Hi Have any more use case? BR Allen + +Hi Allen, You can modify existing UCs which all are using capture source as camera to SD card Regenerate UCs with Null Source as capture source Set Null Source params for file read (refer null_src_dec_display UC) Ensure the output from NullSrc link is in correct format for next link to process Regards Suryamani Jena + +Hi Allen, If you are able to generate & test with Null Source as capture source Can we close this thread ? You can open a new thread anytime you need any assistance & will be glad to help you Regards Suryamani Jena + diff --git a/data2/text/range/0-5000/693143.txt b/data2/text/range/0-5000/693143.txt new file mode 100644 index 0000000000000000000000000000000000000000..6b7c04bf2385278916b199b45aca5b00c56a14ad --- /dev/null +++ b/data2/text/range/0-5000/693143.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: SEL_HDMI_I2C2 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I'm studying the schematics of TDA2EVM5777 Why RU108 select for HDMI I2C is connected to TDA2 ball E15 I checked the MUXMODE of ball E15 there's no GPIO function in E15 which function do E15 use to select HDMI I2C? thanks~ + +Responses: +Hi, I have forwarded your question to an expert for comment. Regards, Yordan + +Hi user3829173, Could you please show me the TDA2EVM5777 schematic that you exploring? According to Vision Application Board Schematic Rev D.pdf - link - www.ti.com/.../sprr225 (TDA2EVM5777), the HDMI SCL/SDA pins of RU108 must be connected to F17 (i2c2_scl) and C25 (i2c2_sda). Regards, Lyuben. + +Hi Lyuben The schematics file name is "516582H_VAYU_EVM_13NOV2015_H",but I don't know how to provide you the link. What I confused is not I2C scl & sda,but the select pin of RU108 Pin1 of RU108 is connected to ball E15 of TDA2 but there is no GPIO function in ball E15 , why can E15 control the select pin of RU108? Thank you~ + +user3829173, If you want to attach files, links, etc. go to the right corner under the replay box and push Insert Code, Attached Files and more Regards, Mariya + +I found the answer in the VAYU_CPU_User_Guide_1_320151029 p34 thank you + diff --git a/data2/text/range/0-5000/693148.txt b/data2/text/range/0-5000/693148.txt new file mode 100644 index 0000000000000000000000000000000000000000..6227dc0408f231b08f23d09074e6f8fde9ab7b21 --- /dev/null +++ b/data2/text/range/0-5000/693148.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2: diffrent of vision_sdk\apps\src\rtos\alg_plugins and vision_sdk\apps\src\hlos\adas\src\alg_plugins + +Query Text: +Part Number: TDA2 Tool/software: Linux in vision_sdk\apps\src\rtos\alg_plugins have so many link but vision_sdk\apps\src\hlos\adas\src\alg_plugins poor ,so how can i move vision_sdk\apps\src\rtos\alg_plugins link to vision_sdk\apps\src\hlos\adas\src\alg_plugins ? + +Responses: +Hi Why do you want to do this? Are you looking for any specific Alg plug-in? Many of the Algorithms can only work on DSP or EVE, moving those to A15 doesn't make any sense regards, Shiju + +Hi Shiju i have run null_src_decode_display in vision_sdk\apps\src\hlos\adas\src\usecases successful ， in this case have 6 links UInt32 NullSourceLinkID; UInt32 IPCOut_A15_0_IPU1_0_0LinkID; UInt32 IPCIn_IPU1_0_A15_0_0LinkID; UInt32 DecodeLinkID; where is this link code ?? UInt32 VPELinkID; where is this link code ?? UInt32 DisplayLinkID; where is this link code ?? i have not found in hlos , and in vision_sdk\links_fw\src\rtos\links_ipu\iva\iva_dec have DecodeLink . but i donot know links Under the RTOS directory should be use by hlos . SO i try to add some print inf in decLink_h264.c , when i run null_src_decode_display the inf i add in decLink_h264.c doesnot out. where is DecodeLink?? BESTWISHES SHUAI + +Hi Shuai, Not all links will be on A15 , Links will be on different cores depending on hardware and drivers access . Please have a look at the jpg image in the usecase folder to get a better idea as which link is on which core. IPC links help in transfer of frame buffer pointers from one core to another The usecase you have mentioned has the following img which shows the details regards Chetan.M + +Hi : Chetan.M I have read the image , i donnot know where is the souce code of decode link ! BEST WISHES SHUAI + +Hi Shuai, vision_sdk\links_fw\src\rtos\links_ipu\iva\iva_dec The decode and encode links use IVA hardware Hence its under iva folder of links_ipu Regards Chetan.M + +Hi Chetan.M vision_sdk\links_fw\src\rtos\links_ipu\iva\iva_dec this is in RTOS also can be used by hlos? BESTWISHIS SHUAI + +SHUAI yes, you can use the IVA (enc/dec) links from HLOS also, please refer the below HLOS UC \vision_sdk\apps\src\hlos\adas\src\usecases\vip_single_cam_enc_dec_sgx_display regards, Shiju + +Hi Shiju should i use links ( vision_sdk\apps\src\rtos\alg_plugins ) in HOLS ?? BESTWISHES shuai + +SHUAI Yes, many of this Alg links can be used from a A15 Usecases as well. In all cases, These Alg links will be running on native DSP or EVE cores, but the same can be created and controlled from a usecase on A15 Linux. regards, Shiju + diff --git a/data2/text/range/0-5000/693296.txt b/data2/text/range/0-5000/693296.txt new file mode 100644 index 0000000000000000000000000000000000000000..d15cb0c6e94035153b549feee18ffa07f7f36ae1 --- /dev/null +++ b/data2/text/range/0-5000/693296.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Bit-stream input files for running NullSrc, Decode and Display UC of VSDK Linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Bit-stream input files for running NullSrc, Decode and Display UC of VSDK Linux + +Responses: +streams.zip + +Closed + +Hi Shiju, thanks for sharing this. Regards, Yordan + +streams_1280x720.zipstreams_1920x1080.zip + diff --git a/data2/text/range/0-5000/693319.txt b/data2/text/range/0-5000/693319.txt new file mode 100644 index 0000000000000000000000000000000000000000..428c8c89c522f8b7f07026fc7039d51282495d2f --- /dev/null +++ b/data2/text/range/0-5000/693319.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Error when importing Lenet model + +Query Text: +Part Number: TDA2 Hi, I'm importing the Caffe LeNet model and the tool crashes when processing Fully Connected Layer 1. The inputs to the fc1 layer is 9216 (64x12x12 Flattened) and num of outputs are 1024. Here is the import file. # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 25 numParamBits = 8 # 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 inElementType = 0 inputNetFile = "..\..\test\testvecs\config\pp_lenet_model\lenet.prototxt" inputParamsFile = "..\..\test\testvecs\config\pp_lenet_model\lenet.caffemodel" outputNetFile = "..\..\test\testvecs\config\tidl_models\NET_OD.BIN" outputParamsFile = "..\..\test\testvecs\config\tidl_models\PRM_OD.BIN" rawSampleInData = 1 preProcType = 4 sampleInData = "..\..\test\testvecs\input\lenet_48_48.y" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" Regards, Navinprashath.R.R + +Responses: +Hi, Can please try with caffe jacinto model first, may be cifar10. Thanks, Praveen + +Hi Praveen, In one of the documents, I found that the maximum number of input or output nodes supported for FC layer in TIDL is 4096. So I made a workaround by slicing input nodes(Instead of one FC, now I have 3 FC layers). Regards, Navinprashath.R.R + diff --git a/data2/text/range/0-5000/693529.txt b/data2/text/range/0-5000/693529.txt new file mode 100644 index 0000000000000000000000000000000000000000..a222a99323300227a92e1de2b30ea87dc98ac9bb --- /dev/null +++ b/data2/text/range/0-5000/693529.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: How to do neon optimization for the link on the A15 core + +Query Text: +Part Number: TDA2 Tool/software: Linux How to do neon optimization for the link on the A15 core in SDK_VISION_03_02_00_00\ti_components\algorithms have examples of optimizes for eve and C66! on A15core some code have to do neon optimization , is there any examples for this ? + +Responses: +Hi In VSDK, we do not have any real Algos on A15 and hence not used any neon optimization, I have kept below compiler flag to enable neon -mfpu=neon But not sure if this is sufficient to enable neon optimization on A15. Please check with GCC documentation/tutorials regards, Shiju + +Hi Shiju thankS shuai + +Hi Shiju where can i get GCC documentation/tutorials and i want to add -ldl for A15 Compilation options where should i add ？ thanks shuai + +Hi shuai Please search on internet for GCC related queries regards, Shiju + diff --git a/data2/text/range/0-5000/693699.txt b/data2/text/range/0-5000/693699.txt new file mode 100644 index 0000000000000000000000000000000000000000..bbf9d0b985c859b77686901dbe6e7fea1eb9cbe9 --- /dev/null +++ b/data2/text/range/0-5000/693699.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: TDA2XX\usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS i am a newer in TDA2xx，when i Generate a usecase gen tool by vsdk_win32.exe –img –file configFile，what should i do to next？ and about these Generated file，how to compile them？ Thanks for being able to answer。 + +Responses: +Hi, You should refer to VisionSDK_UserGuide_UsecaseGen.pdf and VisionSDK_UserGuide_BuildSystem.pdf on how to write the use case function and how to add it to build. Regards, Rishabh + +Thank you for giving me great help + diff --git a/data2/text/range/0-5000/693786.txt b/data2/text/range/0-5000/693786.txt new file mode 100644 index 0000000000000000000000000000000000000000..7942f65421b461f2e7ed87851650193c94312482 --- /dev/null +++ b/data2/text/range/0-5000/693786.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: Output dimension of argmax layer is same as input layer + +Query Text: +Part Number: TDA2 Hi, I am using LeNet model for classification. The final layer is argmax with input of 1x1x1x40. When I import the model, the output of argmax is also 1x1x1x40. I expected it to be 1x1x1x1. And all the values of the argmax layer are zero. Regards, Navinprashath.R.R + +Responses: +Hi Navin, Please check the limitations of ArgMax layer in the section 3.9 (TIDL Limitation) of the user guide. Thanks, Praveen + +Hi Praveen, Thanks. Looks like argmax is supported only across the channels. Regards, Navinprashath.R.R + +Also for the same network, if I change the numParamBits from 8 to 12 import fails. Any idea why this is happening? Regards, Navinprashath.R.R + +Hi Navin, I am not sure, ideally it should work. What kind of failure are you seeing? Thanks, Praveen + +Also, can you try with numParamBits = 10 ? Thanks, Praveen + +With numParamBits= 10 also, the import module throws error. I get a windows pop up telling eve_test_dl_algo.out.exe has stopped working. The default CIFAR10 example works fine with both 8 and 12 bits. Regards, Navinprashath.R.R + +Hi Praveen, Compared to the usual LeNet network, we have two Eltwise Sum layers. Regards, Navinprashath.R.R + +The issue your observing may be because of the limitation mentioned in the below thread. Update your network to handle this e2e.ti.com/.../694032 + diff --git a/data2/text/range/0-5000/693872.txt b/data2/text/range/0-5000/693872.txt new file mode 100644 index 0000000000000000000000000000000000000000..f225c875558204975bf185bd6316e99874885e74 --- /dev/null +++ b/data2/text/range/0-5000/693872.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: What IP can receive PWM signal and calculate duty percentage? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, I need receive PWM signal from external device. Seem like timer IO can achieve it. Could you please advice me what IP can support this request? Many thanks, + +Responses: +Hi Prince, For some simple use-cases, I think you can use timers indeed. Otherwise you can leverage the features of a specialized module called Enhanced Capture (eCAP) Module. You can see hardware details in the TDA2x TRM document. Regards, Stan + +Hi Stan, Understand, thanks. + diff --git a/data2/text/range/0-5000/693992.txt b/data2/text/range/0-5000/693992.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf6e128f54771bcb35117534a045dbbf0d108436 --- /dev/null +++ b/data2/text/range/0-5000/693992.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Linux + BIOS mode build a new use-cases + +Query Text: +Part Number: TDA2 Tool/software: Linux When I refer to the documentation VisionSDK_UserGuide_BuildSystem.pdf to build my own usecase in Linux + BIOS mode，I have already completed step 9 （Open file \vision_sdk\apps\src\hlos\adas\src\common\chains_main.c） ，then i make -s -j to build，but There was an error （ error: implicit declaration of function 'MY_usecase_run' [-Werror=implicit-function-declaration] MY_usecase_run(&gChains_usecaseCfg); ）.I want to know more detail about function MY_usecase_run()，how to write the function of MY_usecase_run(). The Second problem is when i Generate usecase files use ./vsdk.exe –file configFile ，the next step is to write chains_newTestDisplay.c file ？ and how to write the chains_newTestDisplay.c file？ Thank you very much for answering me. + +Responses: +Hi, MY_usecase_run() (or you can choose a more descriptive name for your usecase) function is the entry point of your usecase and should be located in your chains_newTestDisplay.c file. You can take as example the function chains_vipSingleCam_SgxDisplay() which is called from vision_sdk\apps\src\hlos\adas\src\common\chains_main.c when certain menu item is selected (it is not called directly, but via Chains_menuSingleCameraRun() function, but you can get the idea). You can look how chains_vipSingleCam_SgxDisplay() and the usecase vip_single_cam_sgx_display (or any other usecase) is implemented to get directions how to implement your new usecase. You can also check chapter 2 "Use Case Development" in vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_DevelopmentGuide.pdf. Regards, Yordan + +Hi, i have resolved my first problem by refer to the chains_vipSingleCam_SgxDisplay() . my new chain is UseCase: chains_newTestDisplay, NullSource (A15) -> Decode -> Alg_FrameCopy (A15) -> VPE -> Display . i refer to chains_nullSrc_Display.c to write my chains_newTestDisplay.c file, but when i run my usecase on the HW platform it crashed. the crash info is: [HOST] [HOST ] 806.707100 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 806.707161 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 806.707344 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 806.708534 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 806.708930 s: DECODE: Create in progress ... !!! ASSERT (frameCopyLink_algPlugin.c|AlgorithmLink_frameCopyCreate|369) [HOST] [HOST ] 806.938479 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 806.938937 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 806.938998 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [IPU2 ] 806.934697 s: DECODE: Creating CH0 of 1280 x 720 [1] [0],target bitrate = 10000 Kbps ... i want to know the rules or more detail to write the chains_newTestDisplay.c file. looking forward to answering me. Regards, Xie Baojian + +Hi, there is a new thread about this issue: e2e.ti.com/.../694186 Experts has been notified and will reply there. I will close this one. Regards, Yordan + diff --git a/data2/text/range/0-5000/694032.txt b/data2/text/range/0-5000/694032.txt new file mode 100644 index 0000000000000000000000000000000000000000..84af35123319754ae05f92eae5645f0579584f4b --- /dev/null +++ b/data2/text/range/0-5000/694032.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: TIDL Eltwise Layer output not matching with caffe output + +Query Text: +Part Number: TDA2 Hi, I have Convolutional layers, InnerProduct and Eltwise layers in my model. The caffe ouput and tidl outputs of the convolutional layer and innerproduct layers are matching. But in the elwise layer, some of the elements of the tidl matrix vary too much with the elements of caffe output. For example, let's say Eltwise layer adds two blobs of size 1x5. Here is how the caffe and tidl output looks like: Caffe output: [22.24 -2.33 -15.85 -14.89 -11.05] TIDL output: [21.29 59.05 -15.00 -14.03 -10.16] As you could see the [1] element vary too much. To convert the data to floating point, I am dividing the output data by the OutQ in the logs as mentioned in this thread(e2e.ti.com/.../2370081 Regards, Navinprashath.R.R + +Responses: +Please find the prototxt and caffe model file. The tidl and caffe outputs of the second Eltwise layer are not matching. Also the logs during the import and the input files(lenet_48_48.y) are also attached. PS: The weights here not used in the actual model. But the similar error can be reproduced with this network. Regards, Navinprashath.R.R Not able to upload file because of size attaching drive link. https://drive.google.com/file/d/19Zt7PlV5-yIpD-inALszIwhuxHDUwrPz/view?usp=sharing + +Hi, The problem occurs when the input to the Eltwise layer is of opposite signs. Regards, Navinprashath.R.R + +Hi Naveen, We don't support this combination. Thanks, Praveen + +Hi Praveen, Thanks Praveen. Could we expect this combination support in future release? It is for the same network I am not able to increase the numParamBits to 12. Is it related to this issue? Regards, Navinprashath.R.R + +There is no plan to add support for this combination now. + diff --git a/data2/text/range/0-5000/694162.txt b/data2/text/range/0-5000/694162.txt new file mode 100644 index 0000000000000000000000000000000000000000..d949806a27017d1a56d90306be43f1517eb76b68 --- /dev/null +++ b/data2/text/range/0-5000/694162.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: CCS simulator memory allocation and fread problem + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi, I'm trying to handle large data using C code in CCS with DSP simulator. however I challenged with two problems. 1. Allocation of large memory (dynamic allocation) I tried to allocate heap memory using malloc(). But when I tried large size of memory(for example, more than 300,000 Integers' array) it made problem and I found that the malloc() was failed because no address value has been allocated in the target array pointer. Is there any limitation for using heap memory at one time and can I modify it? Maybe I'll need many integers amount to 20~50MB. 2. Load Memory in real board I used 'Load Memory' tool in CSS simulator to load binary data onto memory. But if the size of data is reached almost 90MB. Then, what method is needed when I load the program on the real TDA2x board? Can I use 'Load Memory' on TDA2x board? Because I'm just using CCS simulator yet. I've heard about using SD card to load data onto memory. Which manual explains well about the load data from SD card? Thank you. + +Responses: +Hello Dongmin Cha, For the malloc failing are you making sure the linker command file of your project has a heap size which is larger than what you are allocating. For Load Memory: Yes the TDA2x board supports CCS Load Memory. Regards, Piyali + diff --git a/data2/text/range/0-5000/694178.txt b/data2/text/range/0-5000/694178.txt new file mode 100644 index 0000000000000000000000000000000000000000..4cb69d8a2aaa0fad7116414c596cfd7b835b6d04 --- /dev/null +++ b/data2/text/range/0-5000/694178.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: how to make link from A15 lib + +Query Text: +Part Number: TDA2 Tool/software: Linux now i have a A15 lib mylib.a and header file mylib.h How can i make a A15 alg_plugins link ,where can i load mylib.a , and how to include mylib.h . any example? + +Responses: +Hi Please refer the sample HLOS Alg plug-in \vision_sdk\apps\src\hlos\adas\src\alg_plugins\framecopy regards, Shiju + +Hi Shiju i try to add mylib in framecopy for test include $(vision_sdk_PATH)/build/hlos/makerules/linux/common_header_a15.mk INCLUDE+= -I$(vision_sdk_PATH)/mylibs/include -I$(ipc_PATH)/hlos_common/include -I$(ipc_PATH)/packages -I$(kernel_PATH)/include/generated/uapi $(OSA_INC) -I$(ipc_PATH)/linux/include -I$($(MAKEAPPNAME)_PATH) LIBS += $(vision_sdk_PATH)/mylibs/libarcsoft_face_base.a LIBS += $(vision_sdk_PATH)/mylibs/libarcsoft_face_detection.a LIBS += $(vision_sdk_PATH)/mylibs/mpbase.a LIBS += $(LIB_BASE_DIR)/vision_sdk_linux_demo.a LIBS += $(shell cat $(DEST_ROOT)/appLiblist_a15_0.txt) include $(vision_sdk_PATH)/build/hlos/makerules/linux/common_footer_a15.mk have follow problem /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(frameCopyAlgoCpu.o): In function `Alg_FrameCopyProcess': frameCopyAlgoCpu.c:(.text+0xda): undefined reference to `MMemMgrCreate' frameCopyAlgoCpu.c:(.text+0xea): undefined reference to `AFD_InitialFaceEngine' frameCopyAlgoCpu.c:(.text+0x152): undefined reference to `AFD_StillImageFaceDetection' frameCopyAlgoCpu.c:(.text+0x164): undefined reference to `AFD_UninitialFaceEngine' frameCopyAlgoCpu.c:(.text+0x16a): undefined reference to `MMemMgrDestroy' + +This is a duplicated thread of e2e.ti.com/.../694486 will replay on other thread + +HI Shiju SO I WAIT for it ! + diff --git a/data2/text/range/0-5000/694186.txt b/data2/text/range/0-5000/694186.txt new file mode 100644 index 0000000000000000000000000000000000000000..a63167828905bdb04b271d8ca6da7355fbb932ab --- /dev/null +++ b/data2/text/range/0-5000/694186.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: TDA2xx\linux build my own usecase + +Query Text: +Part Number: TDA2 Tool/software: Linux i am a newer to learn TI\TDA2xx ， i have write a new usecase ，the config file is： UseCase: chains_newTestDisplay NullSource (A15) -> Decode -> Alg_FrameCopy (A15) -> VPE -> Display and i refer to the example of chains_nullSrc_Display.c to write my chains_newTestDisplay.c file typedef struct { UInt32 NullSourceLinkID; UInt32 IPCOut_A15_0_IPU1_0_0LinkID; UInt32 IPCIn_IPU1_0_A15_0_0LinkID; UInt32 DecodeLinkID; UInt32 IPCOut_IPU1_0_A15_0_0LinkID; UInt32 IPCIn_A15_0_IPU1_0_0LinkID; UInt32 Alg_FrameCopyLinkID; UInt32 IPCOut_A15_0_IPU1_0_1LinkID; UInt32 IPCIn_IPU1_0_A15_0_1LinkID; UInt32 VPELinkID; UInt32 DisplayLinkID; NullSrcLink_CreateParams NullSourcePrm; IpcLink_CreateParams IPCOut_A15_0_IPU1_0_0Prm; IpcLink_CreateParams IPCIn_IPU1_0_A15_0_0Prm; DecLink_CreateParams DecodePrm; IpcLink_CreateParams IPCOut_IPU1_0_A15_0_0Prm; IpcLink_CreateParams IPCIn_A15_0_IPU1_0_0Prm; AlgorithmLink_FrameCopyCreateParams Alg_FrameCopyPrm; IpcLink_CreateParams IPCOut_A15_0_IPU1_0_1Prm; IpcLink_CreateParams IPCIn_IPU1_0_A15_0_1Prm; VpeLink_CreateParams VPEPrm; DisplayLink_CreateParams DisplayPrm; } chains_newTestDisplayObj; But when i run my usecase on the HW environment，it crashed ，the info is： [HOST] [HOST ] 806.707100 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 806.707161 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 806.707344 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 806.708534 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 806.708930 s: DECODE: Create in progress ... !!! ASSERT (frameCopyLink_algPlugin.c|AlgorithmLink_frameCopyCreate|369) [HOST] [HOST ] 806.938479 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 806.938937 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 806.938998 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [IPU2 ] 806.934697 s: DECODE: Creating CH0 of 1280 x 720 [1] [0],target bitrate = 10000 Kbps ... I want to know the rules and more details of how to write the file of chains_nullSrc_Display.c，Is I missing some functions in chains_nullSrc_Display.c？ when i change my ALG（Alg_FrameCopy），How to modify my file of chains_nullSrc_Display.c？ Looking forward to answering me，thank you very much！ + +Responses: +Hi , Please refer the frame copy usecase and set the required framecopy alg id in usecase. vision_sdk\apps\src\rtos\usecases\vip_single_cam_frame_copy Regards Chetan.M + diff --git a/data2/text/range/0-5000/694190.txt b/data2/text/range/0-5000/694190.txt new file mode 100644 index 0000000000000000000000000000000000000000..b1b9bde1fc0db3c9672d9815d5d2d5c14dc73356 --- /dev/null +++ b/data2/text/range/0-5000/694190.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TIDL: Using Caffe_Jacinto framework + +Query Text: +Part Number: TDA2 I want to get the Caffe-jacinto framework and run training on out custom dataset. So train around for 100 images, Will we be needing a GPU or a simple non-GPU system will work. + +Responses: +You can get the caffe-jacinto framework and scrits by clonning the following two repositories: github.com/.../caffe-jacinto github.com/.../caffe-jacinto-models Please navigate to those links in your browser and read through the documentation provided to understand the usage. If you face any specific issue related to the code or scripts, you can file an issue using the github repository "issues" link in the above repositories. + +Yes, I understand that. I wanted know if a system without a GPU is used, approximately how long it'll take to train for say 100 images? Is it recommended. + +Training on CPU can be 30x or more slower compared to training on GPU. Exactly how much time will be needed will depend on the size of the image, complexity of the network and the problem that you are trying to solve. Why don't you try to train on CPU - that will give you an estimate of the time required. But whether you conclude to use CPU or GPU for training, I would highly recommend to more images for training. Deep learning cannot learn to generalize with just 100 images and any model or conclusion that you make using that dataset may not work outside the laboratory. + diff --git a/data2/text/range/0-5000/694391.txt b/data2/text/range/0-5000/694391.txt new file mode 100644 index 0000000000000000000000000000000000000000..de572e5c95dbcbe124d5fed4a505a199996e5234 --- /dev/null +++ b/data2/text/range/0-5000/694391.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello, For the RTOS PCIE RC to RTOS PCIE EP example developed for the AM5728 IDK, can I use this example for the TDA2EVM5777. If so, what do I need to change? Thanks, -iFer + +Responses: +Hi, Yes you can use this example. Maybe some basic porting will be needed. You might need to change lane configuration if number of lanes is different on two boards, pin mux changes. Regards, Rishabh + +Hello Rishabh, thank you for the reply. Using CCS, I imported the TI RTOS project "PCIE_idkAM572x_wSoCFile_armExampleProject" of the PCIE example found here: C:\ti\pdk_am57xx_1_0_10\packages\ti\drv\pcie\example\sample\am572x I built the project successfully. I have a known working CCS/Target Config File setup with the TDA2x EVM5777 board, so without changing any pinmux or porting variables, I loaded the default project onto the TDA2 using JTAG. When loading the project .out file through JTAG onto the TDA2x EVM5777 board, I get an exception shortly after hitting play. I am noticing that the exception is happening when the function Task_create() is ran. Once the exception gets thrown, I see in the console window "CortexA15_0: Unhandled ADP_Stopped exception 0x20023". This should just be a BIOS configuration, correct? If I place a breakpoint on any line after Task_create() it never gets called. Any suggestions for determining what in Task_create would cause the exception? With respect to porting between EVMs, I looked at the current configurations in the idkAM572x CIE_idkAM572x_wSoCFile_armExampleProject and the registers being accessed on the AM572x look to be the same on the TDA2. The only address that seems odd is 0x48447000 which is for VCP1_CFG_TARG. That address is defined as a peripheral base in the idkAM572x example but the TDA2 has that address under Reserved space. The AM572x TRM though has a note saying that VCP is not supported in this family of devices so is it just defined and not used? For the number of PCIE lanes, the base example looks to be doing only 1 lane so that shouldn't be a problem with TDA2. Is that correct? + +Hi, TDA2xx EVM has single lane and hence it should not be a problem. I would suggest you to first download Processor SDK Vision release for TDAx devices from www.ti.com/.../PROCESSOR-SDK-TDAX This release has a makefile based PCIE RC to EP example in PROCESSOR_SDK_VISION_03_03_00_00\ti_components\drivers\pdk_01_09_00_17\packages\ti\csl\example\pcie\write_loopback. You can look at build instructions here: processors.wiki.ti.com/.../PDK_TDA_Software_Developer_Guide I made a wrong assumption with the previous reply that you are using CSL example. PCIe RTOS driver has not been validated on TDA2x device. In order to get the PCIe RTOS example from AM57xx to TDA2xx you will need to port the driver which will be an involved effort. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/694393.txt b/data2/text/range/0-5000/694393.txt new file mode 100644 index 0000000000000000000000000000000000000000..484494d24fb2d33a1e9f363cb16211db68cfa494 --- /dev/null +++ b/data2/text/range/0-5000/694393.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Error of create an new use case + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi We fallow the user guide and want to create an new use case but We got an error below ========================================================================== undefined first referenced symbol in file --------- ---------------- Chains_tidlODPrimax C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/app s/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bio s_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4" not built gmake[7]: *** [C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2 xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error 1 gmake[6]: *** [ipu1_0] Error 2 gmake[5]: *** [apps_ipu1_0] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 ========================================================================== Can you tell us what's wrong with the error? How can we fix this error? BR Allen + +Responses: +Hi Allen, when you run make command can you try to run it without "-j" option (this option creates several build processes and some dependencies might not get calculated correctly). Regards, Yordan + +Hi I retry to run it without "-j" option but I get same error Even I make a clean build (rm rf binary and gmake clean) what's mean with the error? How do we do? BR Allen + +Hi Have any solution? Our new use case is want to read the source from SD card and do the lane detect so we reference "vip_single_cam_lane_detection" and "null_src_dec_display" two use case but we got the error Do you know we have any problem? BR Allen + +Hi Allen, I pinged VisionSDK experts for further help. Regards, Yordan + +Hi Allen , Are there changes done in the code or its out of release . ? Regards Chetan.M + +Hi I solve this problem,but I got the another problem I post a new question below Can you help us to solve the question? BR Allen + diff --git a/data2/text/range/0-5000/694403.txt b/data2/text/range/0-5000/694403.txt new file mode 100644 index 0000000000000000000000000000000000000000..e1e0bc920f4506049a69e356c638ab4b50453e0e --- /dev/null +++ b/data2/text/range/0-5000/694403.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: HOW us vision_sdk\links_fw\src\rtos\links_common\nullSrc + +Query Text: +Part Number: TDA2 Tool/software: Linux i have run this case (vision_sdk\apps\src\hlos\adas\src\usecases\null_src_decode_display ) successul ! this case have 6 links pObj->NullSourceLinkID = A15_0_LINK (SYSTEM_LINK_ID_NULL_SRC_0); pObj->IPCOut_A15_0_IPU1_0_0LinkID = A15_0_LINK (SYSTEM_LINK_ID_IPC_OUT_0); pObj->IPCIn_IPU1_0_A15_0_0LinkID = IPU1_0_LINK (SYSTEM_LINK_ID_IPC_IN_0); pObj->DecodeLinkID = SYSTEM_LINK_ID_VDEC_0; pObj->VPELinkID = SYSTEM_LINK_ID_VPE_0; pObj->DisplayLinkID = SYSTEM_LINK_ID_DISPLAY_0; A15_0_LINK (SYSTEM_LINK_ID_NULL_SRC_0); is use this (vision_sdk\links_fw\src\hlos\links_a15\nullSrc) link i found in vision_sdk\links_fw\src\rtos\links_common\nullSrc is also a nullSrc link , can i use this nullsrc_link replace？ + +Responses: +Hi Shuai, You can use the null src of the core where you are running the null src link. If you are reading from the file then it has to be in hlos only as file system is controlled by hlos, If you are running bios then it can be either A15 or M4 , depending you need to change the cfg file. vision_sdk\apps\configs\ Regards Chetan.M + +Hi Chetan.M i want to run null src link on M4 I am use LINUX system by hlos . BESTWISHES shuai + +shuai when you run Linux on A15, both SD card and network will be controlled from A15 linux, so the NullSRc on M4 can not access these devices. regards, Shiju + diff --git a/data2/text/range/0-5000/694414.txt b/data2/text/range/0-5000/694414.txt new file mode 100644 index 0000000000000000000000000000000000000000..4431c6457daceeb06ac964a2bf1b2e24e743db55 --- /dev/null +++ b/data2/text/range/0-5000/694414.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: RTOS / TDA2： What's the entire procedure for running TIDL_OD usecase? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, As title, I have read VisionSDK_UserGuide_TI_DeepLearning & TIDeepLearningLibrary_UserGuide I know I have to present this four files ( NET_OD.bin、PRM_OD.bin、inData_OD、inHeader_OD ) in the SD card But, how to generate this four files ? and I read TIDeepLearningLibrary_UserGuide 3.6.5 Importing Tensorflow Models Where should I put the file which generated by doing the all steps from 3.6.5 ? Sincerely, Andy + +Responses: +Hi Andy , Please follow the below posts for your questions e2e.ti.com/.../687481 Regards Chetan.M + diff --git a/data2/text/range/0-5000/694485.txt b/data2/text/range/0-5000/694485.txt new file mode 100644 index 0000000000000000000000000000000000000000..26165448d175b1bddde18309fc8e6ec07d8b82ca --- /dev/null +++ b/data2/text/range/0-5000/694485.txt @@ -0,0 +1,32 @@ +Ticket Name: RTOS/TDA2: How to flash FW file(AppImage) to eMMC of TDA2x. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, As title, I want to know how to flash FW file(AppImage) to eMMC of TDA2x. Could you please advice us how to achieve it. Many thanks, + +Responses: +If you are running RTOS on A15, the boot modes supported are SD, QSPI flash, and NOR flash. eMMC boot mode is not supported. However, eMMC boot mode is supported by uboot with Linux running on A15. Regards, Stanley + +Hi Stanley, Understand and thanks. + +Hi Sir, 1. RTOS doesn't support eMMC boot, but we can boot from NOR flash via QSPI and run the algorithm in eMMC (use eMMC to be storage), is it correct? 2. Could we know the detail what's limitation why RTOS doesn't support eMMC boot? Is it OS or driver or HW issue? 3. Base on item2, if it is driver issue, will TI have plan for the driver support in the future? Thank you. Sidney + +Hi, Yes you can use eMMC for storage. There is no SW support for eMMC boot on RTOS side and the same is not planned for future as well. Regards, Rishabh + +Hi Rishabh, On RTOS how can we storage data(or algorithm ) in eMMC ? Have any sample code or document can refer? Many thanks, + +Hi, You can refer to mmc app present here: PROCESSOR_SDK_VISION_03_03_00_00\ti_components\drivers\pdk_01_09_00_17\packages\ti\csl\example\mmcsd\mmc_raw_access\. We don't have a lot of SW support for eMMC on RTOS side. I would recommend you to use QSPI or NOR flash for storing data instead of eMMC. Regards, Rishabh + +Hi Rishabh, Understand , thanks for your support. + +Hi Prince, If you don't have any further questions shall I close the thread? Regards, Rishabh + +Hi Rishabh, I have last question . Can we separate AppImage to algorithm and application two parts and save to different memory(algorithm to eMMC, application to QSPI)? If yes how can we booting system and reload algorithm? Could you please give us some advice? Thanks for your support. + +Hi, From RBL perspective you can boot only from single boot media. Then the control is with SBL. You can modify SBL to achieve what you want. Assume that you have SBL in QSPI memory. Then you can load and parse a multicore App Image present in QSPI memory first (say application). Then you can initialize another memory say eMMC and load/parse App Image present on that (say Algorithm). Following this approach will need concrete effort as you need to define read/write API library for eMMC and modify SBL. I would suggest you to rather have two app images on same boot media (QSPI or NOR) and flash them at a different locations. Then you will only need to modify SBL to parse the two images. Regards, Rishabh + +Hi Rishabh, Thanks for your support. + +Hi Rishabh, Many thanks. + +Hi Prince, Closing this thread as query has been answered. Regards, Rishabh + diff --git a/data2/text/range/0-5000/694486.txt b/data2/text/range/0-5000/694486.txt new file mode 100644 index 0000000000000000000000000000000000000000..2f8625cf9f725be86c818ae57cbd90f4c2629d52 --- /dev/null +++ b/data2/text/range/0-5000/694486.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: add lib + +Query Text: +Part Number: TDA2 Tool/software: Linux i try to add mylib in framecopy link for test include $(vision_sdk_PATH)/build/hlos/makerules/linux/common_header_a15.mk INCLUDE+= -I$(vision_sdk_PATH)/mylibs/include -I$(ipc_PATH)/hlos_common/include -I$(ipc_PATH)/packages -I$(kernel_PATH)/include/generated/uapi $(OSA_INC) -I$(ipc_PATH)/linux/include -I$($(MAKEAPPNAME)_PATH) LIBS += $(vision_sdk_PATH)/mylibs/libarcsoft_face_base.a LIBS += $(vision_sdk_PATH)/mylibs/libarcsoft_face_detection.a LIBS += $(vision_sdk_PATH)/mylibs/mpbase.a LIBS += $(LIB_BASE_DIR)/vision_sdk_linux_demo.a LIBS += $(shell cat $(DEST_ROOT)/appLiblist_a15_0.txt) include $(vision_sdk_PATH)/build/hlos/makerules/linux/common_footer_a15.mk have follow problem /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(frameCopyAlgoCpu.o): In function `Alg_FrameCopyProcess': frameCopyAlgoCpu.c:(.text+0xda): undefined reference to `MMemMgrCreate' frameCopyAlgoCpu.c:(.text+0xea): undefined reference to `AFD_InitialFaceEngine' frameCopyAlgoCpu.c:(.text+0x152): undefined reference to `AFD_StillImageFaceDetection' frameCopyAlgoCpu.c:(.text+0x164): undefined reference to `AFD_UninitialFaceEngine' frameCopyAlgoCpu.c:(.text+0x16a): undefined reference to `MMemMgrDestroy + +Responses: +Hello changes in \vision_sdk\apps\src\hlos\adas\src\alg_plugins\openclframecopy\MAKEFILE.MK are correct. please check you placed your libs and header files under $(vision_sdk_PATH)/mylibs/include and $(vision_sdk_PATH)/mylibs/ regards, Shiju + +If still not working try to include your libs in \vision_sdk\build\hlos\makerules\linux\common_footer_a15.mk regards, Shiju + +Hi: Shiju check you placed your libs and header files under $(vision_sdk_PATH)/mylibs/include and $(vision_sdk_PATH)/mylibs/ i have check this . include my libs in \vision_sdk\build\hlos\makerules\linux\common_footer_a15.mk you mean like this ?? ////////////////// ifndef $(COMMON_FOOTER_MK) COMMON_FOOTER_MK = 1 OBJS=$(subst .c,.o, $(FILES) ) OBJSCPP=$(subst .cpp,.o, $(FILESCPP) ) OBJ_DIR=$(OBJ_BASE_DIR) vpath %.o $(OBJ_DIR) LIB = $(MODNAME).a LIB += $(vision_sdk_PATH)/mylibs/libarcsoft_face_detection.a LIB += $(vision_sdk_PATH)/mylibs/libarcsoft_face_base.a LIB += $(vision_sdk_PATH)/mylibs/mpbase.a //////////////////////////////// thanks shuai + +Hi: Shiju add in common_footer_a15.mk but still the same LIB += $(vision_sdk_PATH)/mylibs/libarcsoft_face_detection.a LIB += $(vision_sdk_PATH)/mylibs/libarcsoft_face_base.a LIB += $(vision_sdk_PATH)/mylibs/mpbase.a BEST WISHES SHUAI + +Hello Try to add similar way of "OPENCV_LIBS" are included in \vision_sdk\build\hlos\makerules\linux\common_footer_a15.mk This is the way we have included various libraries regards, Shiju + diff --git a/data2/text/range/0-5000/694520.txt b/data2/text/range/0-5000/694520.txt new file mode 100644 index 0000000000000000000000000000000000000000..7dbf3dc9f7a8f61d482f92d55212050c0bcaca49 --- /dev/null +++ b/data2/text/range/0-5000/694520.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Max objects count using AWR1243. + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Hi, We are working on AWR1243 with TDA2px board. We just want to know what is the maximum number of objects, can be detected by AWR1243. + +Responses: +Hi Vasantha, The maximum number of objects is a function of the memory and processing power. It is usually an application defined requirement. You can use the Radar System planner available in the Processor SDK Radar release package to analyze the processing power and memory bandwidth requirement for the number of objects you are looking at. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/694580.txt b/data2/text/range/0-5000/694580.txt new file mode 100644 index 0000000000000000000000000000000000000000..80271773aa858083bfdbf1a7c453869272f9144d --- /dev/null +++ b/data2/text/range/0-5000/694580.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: TDA2xx compile opencl usecase error + +Query Text: +Part Number: TDA2 Tool/software: Linux i wrote a usecase to use Alg_OpenClFrameCopy，the config file is： UseCase: chains_openclFrameCopy NullSource (A15) -> Decode -> Alg_OpenClFrameCopy (A15) -> VPE -> Display And the Automatically generated .h and .c files is : typedef struct { UInt32 NullSourceLinkID; UInt32 IPCOut_A15_0_IPU1_0_0LinkID; UInt32 IPCIn_IPU1_0_A15_0_0LinkID; UInt32 DecodeLinkID; UInt32 IPCOut_IPU1_0_A15_0_0LinkID; UInt32 IPCIn_A15_0_IPU1_0_0LinkID; UInt32 Alg_OpenClFrameCopyLinkID; UInt32 IPCOut_A15_0_IPU1_0_1LinkID; UInt32 IPCIn_IPU1_0_A15_0_1LinkID; UInt32 VPELinkID; UInt32 DisplayLinkID; NullSrcLink_CreateParams NullSourcePrm; IpcLink_CreateParams IPCOut_A15_0_IPU1_0_0Prm; IpcLink_CreateParams IPCIn_IPU1_0_A15_0_0Prm; DecLink_CreateParams DecodePrm; IpcLink_CreateParams IPCOut_IPU1_0_A15_0_0Prm; IpcLink_CreateParams IPCIn_A15_0_IPU1_0_0Prm; AlgorithmLink_OpenClFrameCopyCreateParams Alg_OpenClFrameCopyPrm; IpcLink_CreateParams IPCOut_A15_0_IPU1_0_1Prm; IpcLink_CreateParams IPCIn_IPU1_0_A15_0_1Prm; VpeLink_CreateParams VPEPrm; DisplayLink_CreateParams DisplayPrm; } chains_openclFrameCopyObj; When I write a complete case to compile, I get the following error： chains_openclFrameCopy_priv.h:103:8: error: unknown type name 'AlgorithmLink_OpenClFrameCopyCreateParams' AlgorithmLink_OpenClFrameCopyCreateParams Alg_OpenClFrameCopyPrm; ^ In file included from chains_openclFrameCopy_priv.c:70:0: chains_openclFrameCopy_priv.h:103:8: error: unknown type name 'AlgorithmLink_OpenClFrameCopyCreateParams' AlgorithmLink_OpenClFrameCopyCreateParams Alg_OpenClFrameCopyPrm; I have added a header file in chains_openclFrameCopy_priv.h，but it still error. #include How can i resolve this problem？ + +Responses: +Hi Can you give some more information like which MAKECONFIG are you using ? & Is OPENCL_INCLUDE flag is enabled in that config ? Regards Surya + +Hi my vision_sdk/build/Rules.make config mode is :MAKECONFIG?= tda2xx_evm_linux_all ; and i check that vision_sdk\apps\configs\tda2xx_evm_linux_all\cfg.mk has not define OPENCL_INCLUDE=yes. Thank you for giving me great help. Regards Xie Baojian + +Hi Xie Baojian, When using OPENCL better to use MAKECONFIG= tda2xx_evm_linux_opencx Regards Surya + +Hi, OK, i will try it, thanks. Regards Xie Baojian + diff --git a/data2/text/range/0-5000/694596.txt b/data2/text/range/0-5000/694596.txt new file mode 100644 index 0000000000000000000000000000000000000000..cadda24bfa95b0686f115cda1f4564aa899ca765 --- /dev/null +++ b/data2/text/range/0-5000/694596.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: CDDS link about TIDL ON TDA2X + +Query Text: +Part Number: TDA2 hi, I could not open the link "cdds.ext.ti.com/.../emxNavigator.jsp 30602.25095 " from the user guide paper, could you please send the CDDS link to me? Or could you please send me the video to my email 530294114@qq.com? I want to bring up the tda2x board with the TIDL. Looking forward to your reply! BR + +Responses: +Hi, TIDL Object release is part of TI’s processor software development (SDK) for vision. You can download this from below link, www.ti.com/.../PROCESSOR-SDK-TDAX In the vision SDK, you’ll find TIDL with documents at \ti_components\algorithms\. Source release of TIDL is available as standalone release via CDDS. Please work with your local TI representative to get access to the same. Thanks, Praveen + diff --git a/data2/text/range/0-5000/694599.txt b/data2/text/range/0-5000/694599.txt new file mode 100644 index 0000000000000000000000000000000000000000..ded05ec4ac886afb45844d77aa5d6ae5a32edfe1 --- /dev/null +++ b/data2/text/range/0-5000/694599.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: TDA2xx How to compile opencl + +Query Text: +Part Number: TDA2 Tool/software: Linux I want to use opencl encapsulation in my algorithm， I added " OPENCL_INCLUDE=yes " in the configuration file (vision_sdk\apps\configs\tda2xx_evm_linux_all\cfg.mk) . But compiled failed. How can I make the “OPENCL_INCLUDE“ effective？ + +Responses: +Hi, can you try to set MAKECONFIG to tda2xx_evm_linux_opencx in vision_sdk/build/Rules.make? (Or compare the contents of vision_sdk/apps/configs/tda2xx_evm_linux_opencx and vision_sdk/apps/configs/tda2xx_evm_linux_all/) Regards, Yordan + diff --git a/data2/text/range/0-5000/694605.txt b/data2/text/range/0-5000/694605.txt new file mode 100644 index 0000000000000000000000000000000000000000..1040279581e7fc5d3c4623118f38a6a3bc04b896 --- /dev/null +++ b/data2/text/range/0-5000/694605.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: TDA2xx vision_sdk Compile Error + +Query Text: +Part Number: TDA2 Tool/software: Linux when i make -s -j to compile vision_sdk，The following error occurred： # Linking into /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... undefined first referenced symbol in file --------- ---------------- EDMA3_semCreate /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 EDMA3_semDelete /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 edma3OsProtectEntry /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsProtectExit /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemGive /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemTake /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 error: unresolved symbols remain error: errors encountered during linking; "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2 xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 " not built make[7]: *** [/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 make[6]: *** [c66xdsp_1] Error 2 make[5]: *** [apps_dsp1] Error 2 make[5]: *** Waiting for unfinished jobs.... # # /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 created. # make[4]: *** [apps] Error 2 make[3]: *** [apps] Error 2 make[2]: *** [apps_exe] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 How can I solve this error? + +Responses: +Hi, Can you let us know what all other commands you run before running "make -s -j" Regards Surya + +Hi, before running "make -s -j" ，i just run "make -s -j depend". Regards Xie Baojian + +Hi Xie Baojian, Is there any change in SDK site or is it a plain SDK ? Regards Surya + +Hi, i have no change in SDK ,but when i delete DIR/vision_sdk/binaries/$(MAKEAPPNAME)/$(MAKECONFIG) folder and compiled again，it Compiled successfully. i don't know why... Regards Xie Baojian + +Hi Xie, Sometimes using -j creates a problem as one of the build targets would have failed due to dependencies, system load, etc. E.g. The error message you have shared above shows issue with EDMA LLD build. Typically you should not use -j while building for the first time, -j should be mostly used with incremental builds. Regards, Rishabh + diff --git a/data2/text/range/0-5000/694669.txt b/data2/text/range/0-5000/694669.txt new file mode 100644 index 0000000000000000000000000000000000000000..0dff1b72c2e05dadd5284c484d25b353fad0c346 --- /dev/null +++ b/data2/text/range/0-5000/694669.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: Comparison between Sparse and Dense Model ? + +Query Text: +Part Number: TDA2EVM5777 Hi, I have copied object detection trained models from caffe-jacinto-models github repo ( github.com/.../ssd512x512_ds_PSP_dsFac_32_fc_0_hdDS8_1_kerMbox_3_1stHdSameOpCh_1) And i am trying to compare the execustion time for Dense Model and Sparse Model. As per the datasheet, Sparse model execution must be faster than dense model. But, I am getting different result. Setup : 1. TDA2x EVM Board is connected to CCS using XDS560 JTAG. 2. Build and generated eve_test_dl_algo.out (release mode) for test app (in tidl folder) 3. Using CCS Load Program eve_test_dl_algo.out executed on EVE Output: 1. Sparse Model: TEST_REPORT_INIT_PROFILE_DATA : TSC cycles = 2117750600, SCTM VCOP BUSY cycles = 0, SCTM VCOP Overhead = 0 I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) Processing Frame Number : 0 TEST_REPORT_PROCESS_PROFILE_DATA : TSC cycles = 69244619476, SCTM VCOP BUSY cycles = 108141852, SCTM VCOP Overhead = 0 I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) - Execution Time = TSC cycles / EVE Frequncy - Considering only PROCESS PROFILE DATA - Execution Time: 129.4291953 seconds (EVE Frequncy: 535 MHz) 2. Dense Model: TEST_REPORT_INIT_PROFILE_DATA : TSC cycles = 3165035504, SCTM VCOP BUSY cycles = 0, SCTM VCOP Overhead = 0 I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) Processing Frame Number : 0 TEST_REPORT_PROCESS_PROFILE_DATA : TSC cycles = 62898624182, SCTM VCOP BUSY cycles = 275218342, SCTM VCOP Overhead = 0 I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) - Execution Time = TSC cycles / EVE Frequncy - Considering only PROCESS PROFILE DATA - Execution Time: 117.5675218 seconds (EVE Frequncy: 535 MHz) Whether this setup is correct ? Sparse Model execution time is more that Dense Model ? Regards, Sagar Attached Log: tidl_object_detection_eve_JTAG_emulation_log.zip + +Responses: +Hi Sagar, >>As per the datasheet, Sparse model execution must be faster than dense model. But, I am getting different result. Yes, but this not true for small image sizes as we optimised the dense convolution kernels (1x1 and 3x3) for small ROI processing. Please refer to FAQ 8 in the user guide for more information on these. Thanks, Praveen + +Hi Praveen, If i want to reproduce the same result that TI has provided in the datasheet, Which models shall i compare and what should be procedure? Can you please provide me the link for Initial Model and Sparse Model ? And whether my setup (with JTAG) is correct to validate the same? Regards, Sagar + +Hi Sagar, Please use the segmentation model bin files (jsegnet21) available in the release package to reproduce the profile numbers in datasheet. Link for models is github.com/.../caffe-jacinto-models. Yes, your setup looks fine. Thanks, Praveen + +Hi I will check segmentation model files. But, I am specifically interested in object detection model comparison. Can you please share the link for that ? And I also While Importing, We get GigaMacs requirement for the model. Can we calculate the execution time for that model on EVE/DSP ? Assume that for a model GigaMacs requirement is 1.6 GMacs. And according to EVE datasheet , EVE can process 16 MACs per Cycle. So, Considering EVE Freq = 535MHz Execution Time = (Total Macs required / 16 ) * (1 / 535MHz) secs = 1.6 G /( 16 * 535 M) = 0.18 seconds Whether the above calculation is correct and Can we assume we will get actual execution time on board same or nearby to this value? Regards, Sagar + +>> I am specifically interested in object detection model comparison. Can you please share the link for that ? Github link that I shared has both segmentation and SSD models. >> Whether the above calculation is correct and Can we assume we will get actual execution time on board same or nearby to this value? Yes, the calculation is correct, but considering the 16 MACs per Cycle is not correct, please refer to datasheet for actual MACs/cycle for different layers with different configuration. Do consider those values for calculating the execution time. Thanks, Praveen + diff --git a/data2/text/range/0-5000/694836.txt b/data2/text/range/0-5000/694836.txt new file mode 100644 index 0000000000000000000000000000000000000000..8e059e2538e952f1002f6298b83460b6e13968d6 --- /dev/null +++ b/data2/text/range/0-5000/694836.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Have image sensor driver sample code can provide to refer? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, As CMOS Image Sensor Solutions pdf from TI we know TDA2 support AR0136 of OnSemi and OV10640 of Omnivison. Have AR0136 or OV10640 image sensor driver sample code can provide to us refer? Thanks for your support. P.S We can find seem like image sensor driver sample code at ($SDKv3.3_INSTALL)\ti_components\drivers\pdk_01_09_00_17\packages\ti\drv\vps\src\devices. + +Responses: +Hi, Yes, you could find the code for the sensor in VSDK under path vision_sdk\apps\src\rtos\iss\src\sensor\ov10640\iss_sensor_ov10640.c or in the PDK drivers.. Rgds, Brijesh + +Hi Brijesh, I find it, thanks. Which one sample code can refer if we want to control AR0136 ? + +Hi, AR0136 is not supported in VSDK. Rgds, Brijesh + +Understand, thanks. + diff --git a/data2/text/range/0-5000/694881.txt b/data2/text/range/0-5000/694881.txt new file mode 100644 index 0000000000000000000000000000000000000000..843b77e98d2f62b113d01fa9692a0f57d65df0ad --- /dev/null +++ b/data2/text/range/0-5000/694881.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/TDA2: about nullSrcLink_tsk.c + +Query Text: +Part Number: TDA2 Tool/software: Linux I add some print it in the file of vision_sdk\links_fw\src\rtos\links_common\nullSrc\nullSrcLink_tsk.c ,then i run "make -s -j depend" and "make -s -j", and i run the apps.out on the HW environment ，But The print information I added was not printed out. It seems that the file nullSrcLink_tsk.c I changed is not compiled. it only print: [HOST] [IPU2 ] 43.077167 s: Assertion @ Line: 1500 in nullSrcLink_tsk.c: pObj->fpDataStream[chId] != SYSTEM_LINK_STATUS_EFAIL : failed !!! How can I print out the printed information on the file nullSrcLink_tsk.c? + +Responses: +Hi Xie, You should use Vps_printf for print logs. Regards, Rishabh + +Hi Rishabh, i used Vps_printf , but it seems the change of nullSrcLink_tsk.c has no effect, It seems to be compiled and not updated. I want to know my chain (NullSource (IPU1_0) -> Decode -> Alg_FrameCopy (A15) -> VPE -> Display ) Will execute this nullSrcLink_tsk.c file? or it execute other nullSrcLink_tsk.c？ Regards Xie Baojian + +Hi, Can you share the updated nullSrcLink_tsk.c. Regards, Rishabh + +Hi, My change part as follows: Vps_printf("##############\n"); Vps_printf("xbj filename = %s \n", (Char *)pPrm->channelParams[chId].nameDataFile); strncpy((Char *)pPrm->channelParams[chId].nameDataFile, "./1920_1080/1280_720_1.h264", 260); UTILS_assert( (pPrm->channelParams[chId].nameDataFile[0] != (char)'\0')); pObj->fpDataStream[chId] = File_open((Char *)pPrm->channelParams[chId].nameDataFile, "r"); UTILS_assert(pObj->fpDataStream[chId] != SYSTEM_LINK_STATUS_EFAIL); the I added the first three lines In order to locate a mistake. Regards, Xie Baojian + +Hi Xie, Do you have the above mentioned file ./1920_1080/1280_720_1.h264. Can you give absolute path and try. Regards, Rishabh + +Hi， OK,i will try the absolute path, but It's strange that printing does not execute. thanks. Regards, Xie Baojian + +Hi Xie, Agreed it is strange. Let's first try to resolve the assert issue. Regards, Rishabh + +Hi Regards, the assert issue Says file open failed, Because there is no print information to locate，I don't know why the file opened failed. Regards, Xie Baojian + +Hi Xie, Did you try the absolute path? Regards, Rishabh + +Hi Xie , I see in the query Tool/software: Linux But you are using nullSrc in bios , Please note if you are using Linux as hlos please change the usecase and add nullSrc on A15. Please refer the following thread If you are using bios on A15, Please verify if the files are present in the drive . Regards Chetan.M + +Hi Chetan.M, I am using tda2xx_evm_linux_all mode ，so i cannot use NullSource (IPU2)? Can only use NullSource (A15)？ Is that right? Regards, Xie Baojian + +Yes , Fatfs and network will be in control of hlos core. Please close the thread Regards Chetan.M + diff --git a/data2/text/range/0-5000/694908.txt b/data2/text/range/0-5000/694908.txt new file mode 100644 index 0000000000000000000000000000000000000000..6030fff77fe3f33fb3d6763c9a193b2e4df14170 --- /dev/null +++ b/data2/text/range/0-5000/694908.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: IPv6 API header file + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, When including the IPv6 support I am getting errorfor missing prototype for IPv6 interface functions. I have included netmain.h, servers.h & console.h. # Compiling tda3xx-evm:ipu1_1:release:utils_common: ndk/ndk_nsp_hooks.c "ndk/ndk_nsp_hooks.c", line 807: error: function "IPv6InterfaceInit" declared implicitly "ndk/ndk_nsp_hooks.c", line 858: error: function "IPv6InterfaceDeInit" declared implicitly Including ti/ndk/inc/stack/inc/ip6if.h causes variable undefined errors. error: identifier "IPV6HDR" is undefined error: identifier "PSEUDOV6" is undefined Which header file contains the prototypes for IPv6 APIs? + +Responses: +Prasad, You need to add the following include: #include <_stack.h> Best Regards, Gerardo + diff --git a/data2/text/range/0-5000/694960.txt b/data2/text/range/0-5000/694960.txt new file mode 100644 index 0000000000000000000000000000000000000000..dd7c3e5e029c1305f7f680d66bed9d125e22f264 --- /dev/null +++ b/data2/text/range/0-5000/694960.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: MAKECONFIG?= tda2xx_evm_linux_opencl make fail + +Query Text: +Part Number: TDA2 Tool/software: Linux i want try MAKECONFIG?= tda2xx_evm_linux_opencl in visionsdk but when build make -s -j have problem , cg_tools/linux/ti-cgt-c6000_8.1.0 no ti-cgt-c6000_8.1.0 exist ， The C6000 compiler installation specified by TI_OCL_CGT_INSTALL does not exist: /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0 make[7]: *** [copy.dsp_h] Error 1 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 + +Responses: +Hi Shuai, With VSDK 3.2 release the compiler version for C6000 was 7.4.2. Can you check if you have the folder C6000_7.4.2 in path PROCESSOR_SDK_VISION_03_02_00_00\ti_components\cg_tools\linux\C6000_7.4.2. Regards, Rishabh + +Hi Rishabh yes ti_components\cg_tools\linux\C6000_7.4.2 BESTWISHES shuai + +Hi Shuai, Can you download the ti-cgt-c6000_8.1.0 from www.ti.com/.../8.1.0 and install it in ti_components\cg_tools\linux\ folder and then try the build. Regards, Rishabh + diff --git a/data2/text/range/0-5000/695027.txt b/data2/text/range/0-5000/695027.txt new file mode 100644 index 0000000000000000000000000000000000000000..7eaf38a9c01e232f22a51562b70f642d34d801aa --- /dev/null +++ b/data2/text/range/0-5000/695027.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: TDA2xx Compile Opencl usecase + +Query Text: +Part Number: TDA2 Tool/software: Linux when i compile opencl usecase ,There is a mistake as follows: Compiling OpenCL file copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure make[7]: *** [copy.dsp_h] Error 255 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 Do anyone know how to do it? + +Responses: +Hi Xie Baojian, What all commands you run till now? Regards Surya + +Hi Xie Baojian, If the compilation issue is resolved, Can you close this thread ? Regards Surya + +Hi Surya, the issue is resolved, thank you very much. Regards, Xie Baojian + diff --git a/data2/text/range/0-5000/695244.txt b/data2/text/range/0-5000/695244.txt new file mode 100644 index 0000000000000000000000000000000000000000..32ffce7f9d5c804c1e07ef33c4b179ee2a8bf9c2 --- /dev/null +++ b/data2/text/range/0-5000/695244.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: the detailed about Sgx3Dsrv + +Query Text: +Part Number: TDA2 hi， Could you please tell me the output of the Sgx3Dsrv module？ What is the format of the output of the Sgx3Dsrv？ I mean is it YUV raw data or h264 compressed data？ What is the protocol of that packed stream data？ And the response data struct of code？ + +Responses: +Hi Th output of Sgx3Dsrv module from the GPU (SGX core) is ARGB32, which is fed to the display HW of TDA2x SoC. No protocol for any packed stream data is used here, just elementary video stream is generated and displayed regards, Shiju + diff --git a/data2/text/range/0-5000/695331.txt b/data2/text/range/0-5000/695331.txt new file mode 100644 index 0000000000000000000000000000000000000000..688cb505290d99a48bda0c63fa77dd1fa06408ae --- /dev/null +++ b/data2/text/range/0-5000/695331.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TIDL Benchmarks + +Query Text: +Part Number: TDA2 Hey, are there more benchmarks for TIDL tests that maybe also don´t only work with CNN models? Are there additional benchmakrs for TDA2x? cheers NIco + +Responses: +Refer the TIDL data sheet and users guide for suported layer types and their benchmarks. + +yea I checked that, but it appears everything was done using CNN models. Are there other tests where non-image inputs were used? + +No. We have used image based inputs only + diff --git a/data2/text/range/0-5000/695383.txt b/data2/text/range/0-5000/695383.txt new file mode 100644 index 0000000000000000000000000000000000000000..53397a9a95ff5062c14839741d769de41d8cd7ac --- /dev/null +++ b/data2/text/range/0-5000/695383.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 NAND flash & NOR flash + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I study form the EVM schematics that data pins of nand flash & nor flash is all connected to SW2 & SW3 in page23, which will be set to pull down by 10k or pull up by 1k. why the data pin can be pull up by 1k? is there no problem when SoC is communicating with nand or nor flash? data pin can be pull low when communicating although it is strongly pull up by SW2 or SW3? thank you~ + +Responses: +Hi, EVM has so many switches, jumpers, and muxes so that as much as possible of the SoC features can be tested or debugged. For the field design, much of the switches will not be needed, therefore much of those kind schematics will not be seen. In most of the cases, only the pull-ups, only pull-downs, or none will be on the board. Particularly for the overriding with a 1k the 10k, yes, it is neither an efficient nor good idea, but it is simple and it is working okay in practice for an EVM. Regards, Stan + +Hello If we use just only eMMC & SPI flash,could we remove SW5 & U57? What is the purpose of U57? read the SW5 status by software? thank you~ + +Hi, Typically it is rare to need in real life design: - switches - some that are needed can be replaced with jumpers or resistor jumpers. typically that are the sysboot pin configs and some user configs if any. - muxing ICs - logic ICs - GPIO expander ICs (like U57) Please note that everything depends on design needs, peripheral needs and many other decisions that should be taken during design time. Regards, Stan + +Hello We have no need of GPIO expander(U57) bu we don't know what is the purpose of U57 in EVM what is the function of U57 in EVM? for SoC to read SW5's status? thank you + +For P10-P17, I think they only monitor SW5 for software. However every signal must be evaluated individually. For example, P17 (FORCE_EMU) is a signal to software only. The other 7 go directly to hardware muxes to do the job, and software can monitor them through U57. P0 (SEL_GPMC_AD_VID_S0), on the other hand, is controlled THROUGH software (output from U57) . Similar is for P3-P5, however for P3, P4, there are some notes on the diagram saying it is not supported for them in software. As I already recommended - every signal must be evaluated individually. Regards, Stan + +Hi Stan I have no need to monitor the SW5 by software,and there is no need to use RU33,RU88,RU89 cause I removed them from our design. So I don't need the P0 of U57, I didn't use USB function, so I don't need P1&P2,I didn't use I2C3 ,CAN2 & Ethernet, so I don't need P3&P4. I control the MMC_PWR directly from GPIO pin, so I don't need P5. So I can remove the U57 directly,right? thank you~ + +Sure. I hope you will manage to remove as much as possible of those discrete muxes and logic. TDA2 contains a sophisticated internal muxing covering most of the use-cases in the field. Regards, Stan + diff --git a/data2/text/range/0-5000/695468.txt b/data2/text/range/0-5000/695468.txt new file mode 100644 index 0000000000000000000000000000000000000000..55b9252a5fe908583ac0936249dc898229be3387 --- /dev/null +++ b/data2/text/range/0-5000/695468.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY run fail + +Query Text: +Part Number: TDA2 Tool/software: Linux i build tda2xx_evm_linux_opencx and try to run OpenCL Usecases but failed! MAKECONFIG?= tda2xx_evm_linux_opencx [HOST] [HOST ] OpenCompute Usecases [HOST] [HOST ] ---------------------------- [HOST] [HOST ] 2: OpenCV Usecases [HOST] [HOST ] 3: OpenCL Usecases [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 3 [HOST] [HOST ] 284.193070 s: [HOST] [HOST ] 284.193100 s: [HOST] [HOST ] [HOST] [HOST ] OpenCL Usecases [HOST] [HOST ] ---------------------------- [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 288.289208 s: [HOST] [IPU2 ] 288.289361 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 288.289910 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 288.386933 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [HOST] [IPU2 ] 288.387268 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 288.402183 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 288.402580 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) [HOST] [HOST ] 288.525071 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 288.525498 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 288.525559 s: ALG: ERROR: No alg create function specified (algId = 6) !!! [HOST] [IPU2 ] 288.523973 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 288.524461 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 288.524827 s: IPC_OUT_0 : Create Done !!! ▒OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment + +Responses: +CMEM Error: init: Failed to open /dev/cmem: 'No such file or directory' TIOCL FATAL: The cmemk kernel module is not installed. Consult the OpenCL UserGuide at software-dl.ti.com/.../index.html + +Hi Shuai, did you followed "vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_opencx.pdf"? There is a chapter about installing cmem module. Regards, Yordan + diff --git a/data2/text/range/0-5000/695618.txt b/data2/text/range/0-5000/695618.txt new file mode 100644 index 0000000000000000000000000000000000000000..aab63ce24b86b94a73340d4374681c6fe277abc3 --- /dev/null +++ b/data2/text/range/0-5000/695618.txt @@ -0,0 +1,28 @@ +Ticket Name: Linux/TDA2: About lvds_vip_multi_cam_3d_srv Demo data dump + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I'm using the PROCESSOR_SDK_VISION_03_03_00_00_setuplinux.bin. I want to dump data base on the lvds_vip_multi_cam_3d_srv demo. It's link tree is as below. Questions: a.If i add my link tree（ipc -> a15 -> null）at (1)， and the demo can run and all 4 camera have image display on screen. But the callback function never being called. Even the callback only have a vps_print(), and there is nothing out. And also i add a callback for the demo's null link. It's also not called. Anyone give me some suggestions? b.If i add my link tree at (2) (same with link tree above). There is still images displayed on screen. The demo looks not work well. Is the image data can be dumped after sync_link? c.I boot system&app from MMC/SD. After i build my app. I need to plug-out my SD & write new app by host. Is there a easy way? Line ethernet? + +Responses: +My build choice is tda2xx_evm_linux_all. And it's configuration is default. + +Add one more question, d. Is sync_link -> dup_link ->null_link OK? + +Hi , a.If i add my link tree（ipc -> a15 -> null）at (1)， and the demo can run and all 4 camera have image display on screen. But the callback function never being called. Even the callback only have a vps_print(), and there is nothing out. And also i add a callback for the demo's null link. It's also not called. Anyone give me some suggestions? Ans : This needs to work , Do you have null in ipu or in A15. ? you can check printing the stats (p option) and see if null link is really receiving the frames , b.If i add my link tree at (2) (same with link tree above). There is still images displayed on screen. The demo looks not work well. Is the image data can be dumped after sync_link? Ans: Image can be dumped after sync also , but atfer sync the buffer will be composite buffer you need to properly figure out the video buffer payload and dump . c.I boot system&app from MMC/SD. After i build my app. I need to plug-out my SD & write new app by host. Is there a easy way? Line ethernet? Ans: you can use nfs boot , refer user guide. d. Is sync_link -> dup_link ->null_link OK? Ans: This data path is also Ok , Please ensure you free the buffers in all the null link else the system will slowdown . Regards Chetan.M + +Hi Chetan, Thanks for you reply. I will try it and check my code. And i can dump sync data now. Like picture below. Does it make sense. Regards Zhang + +Zhang, Can you view the file in yuv viewer and check the format. Regards Chetan.M + +Hi Chetan, In fact it's a H264 video. I use links like this: ->sync_link->encode link-> null link I dump h264 data in null_link. Is this usage correct? Best, Zhang + +I am not sure why the croma is not correct, Why do you need to dump h264 video . ? Regards Chetan.M + +Hi Chetan, Because the card write speed is a little slow. If i dump YUV data. The video may drop frames. BTW. I will try to dump yuv data later. Thanks for you help. Best, Zhang + +Hi Zhang , Please try to dump one frame to ensure the data is correct and later you can check the frame size when you are recording h264 and also check the play options Regards Chetan.M + +Hi Chetan, Thanks. I will check my settings. I have a new question. I'm bringup D3's OV10640+OV490 camera module on TDA2x. And the demo can run and no error information output. But there is no image out on display. What's the possible reason? Regards Zhang + +Hi Zhang, Please close the current thread and open a new thread for D3's OV10640 + OV490 issue , Regards Chetan.M + diff --git a/data2/text/range/0-5000/695706.txt b/data2/text/range/0-5000/695706.txt new file mode 100644 index 0000000000000000000000000000000000000000..d26f7ec8d2458fc8e456425d56b2f5435a1e8a0f --- /dev/null +++ b/data2/text/range/0-5000/695706.txt @@ -0,0 +1,36 @@ +Ticket Name: Linux/TDA2: some question about add some code in origin sample code + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, i want to add some code with own head & c file. I include head file in origin code and add the file path in the NAKEFILE.MK, then make them i got "undefined reference to 'function_name' ". Should i need modify other files to make sure compiler link correctly? thanks, Chen-Wei + +Responses: +Hi Chen-Wei , Which location are you adding . Have you verified if the file is compiling after addition in the make file . Share more details so that we can help you better. Regards Chetan.M + +Hi Chetan, My sample code is opencvcanny. Put my own code (head file and source code)in the folder of canny and add the path to MAKEFILE.MK after include just like " INCLUDE+= -I$(ipc_PATH)/hlos_common/include -I$(ipc_PATH)/packages -I$(kernel_PATH)/include/generated/uapi $(OSA_INC) -I$(ipc_PATH)/linux/include -I$($(MAKEAPPNAME)_PATH) -I$(OPENCV_INCLUDE) -I$(vision_sdk_PATH)/apps/src/hlos/adas/src/alg_plugins/opencvcanny/include " i checked my code is compiled after addition in the make file, but can't link to my function. Thanks, Chen-Wei + +Hi Chen-Wei, All OPENCV_LIBS are linked in "common_footer_a15.mk" file under vision_sdk\build\hlos\makerules\linux folder Regards Surya + +Hi, Surya Thanks for told me OPENCV_LIBS are linked in where, but in my situation is i want add some own function in the sample code of canny. It means that we want do some modify in the sample code(call other sub function in a new head file, which is created by me). which files should i need to modify to avoid the error i meet ? thanks, Chen-Wei + +Chen Wei , Do you mean canny algorithm .. ? Or canny alg plugin. can you please send the entire error Regards Chetan.M + +Hi Chetan, i want to add some code to the origin code in canny usecase, origin modify #include "iCanny.h" #include "iCanny.h" #include "opencv2/imgproc.hpp" #include "opencv2/imgproc.hpp" #include "/tda/vision_sdk/apps/src/hlos/adas/src/alg_plugins /opencvcanny/include/hllow_world.h" void iCanny(IplImage *inputImage, IplImage *outputImage) void iCanny(IplImage *inputImage, IplImage *outputImage) { { UInt32 lowThresh; UInt32 lowThresh; UInt32 highThresh; UInt32 highThresh; cv::Mat inputMat = cv::cvarrToMat(inputImage, false); cv::Mat inputMat = cv::cvarrToMat(inputImage, false); cv::Mat outputMat = cv::cvarrToMat(outputImage, false); cv::Mat outputMat = cv::cvarrToMat(outputImage, false); lowThresh = 30; lowThresh = 30; highThresh = lowThresh * 3; highThresh = lowThresh * 3; cv::Canny(inputMat, outputMat, lowThresh, highThresh, 3); cv::Canny(inputMat, outputMat, lowThresh, highThresh, 3); hw(); } } and entire error is : /tda/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/apps.a(canny.o): In function `iCanny': canny.cpp:(.text+0x5e): undefined reference to `hw()' Thanks, Chen-Wei + +Hi , Where is the function hw() Regards Chetan.M + +Hi Chetan, the function hw() is in /tda/vision_sdk/apps/src/hlos/adas/src/alg_plugins/opencvcanny/include/hllow_world.h and i also add " /tda/vision_sdk/apps/src/hlos/adas/src/alg_plugins/opencvcanny/include/" in MAKEFILE.MK thanks, Chen-Wei + +where is it implemented .? Its present in which .a lib . Regards Chetan.M + +Hi Chetan, this is created by myself. Should i need to build them as a .a or .lib file and add them in MAKEFILE.MK? Thanks, Chen-Wei + +Chen-Wei sorry for repeated asking same question , where is the hw() declared and where is it defined . ? Regards Chetan.M + +Hi Chetan, i declared it in /tda/vision_sdk/apps/src/hlos/adas/src/alg_plugins/opencvcanny/include/hllow_world.h and defined it in /tda/vision_sdk/apps/src/hlos/adas/src/alg_plugins/opencvcanny/hllow_world.c Thanks, Chen-Wei + +Hi Chen-Wei, I see a C and CPP file combination , Have you taken care of extern c and other parameters in your hllow_world files .? Try google search and see if some thing missed. stackoverflow.com/.../call-a-c-function-from-c-code Regards Chetan.M + +Hi, Chetan Thanks for your suggest, and i add the extern C in my code. I think maybe i need to compile them first, just like the website you gave build my code into a .o file and link them, or maybe not. If i build my code, i don't know the path of .o file should add in which file to make them linked. if i don't build them first, i still got the same error Should i need modify any files? Thanks, Chen-Wei + +Please try a clean build + diff --git a/data2/text/range/0-5000/695744.txt b/data2/text/range/0-5000/695744.txt new file mode 100644 index 0000000000000000000000000000000000000000..67967ba5013caffc2624029af607888a233813ae --- /dev/null +++ b/data2/text/range/0-5000/695744.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Something wrong in new use case + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I change the "vip_single_cam_lane_detection" use case with the video as input I got the output below,but It seen look something wrong Can you tell us where is wrong? BR Allen + +Responses: +Hi Allen , From the video it looks the input resolution is not correct . It is less than the required . Any changes in the usecase .? If no changes Please verify source (player) video resolution . Regards Chetan.M + +Hi, We use the input resolution is 768x320, and output resolution is 1920x1080 but, we use the same file being input resolution in "null_src_dec_display" use case We can get the right result (full screen) How can we get the full screen in this question? Where setting we should to change? BR Allen + +Please verify the decoder output width and height ,and input parameters of the algorithm. Regards Chetan.M + +Hi, I got the right result Thanks a lot Allen + diff --git a/data2/text/range/0-5000/695757.txt b/data2/text/range/0-5000/695757.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2e013f5fc825c52ee0ddf797b0cf13c59f38812 --- /dev/null +++ b/data2/text/range/0-5000/695757.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux BUILD_OPENCV_SRC + +Query Text: +Part Number: TDA2 Tool/software: Linux MAKECONFIG?= tda2xx_evm_linux_opencx, my vision_sdk/apps/configs/tda2xx_evm_linux_opencx/cfg.mk file is : # IPU1 (core 0 & 1 are) not supported when IPU_PRIMARY_CORE=ipu2 PROC_IPU1_0_INCLUDE=no PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=no PROC_DSP2_INCLUDE=no PROC_EVE1_INCLUDE=no PROC_EVE2_INCLUDE=no PROC_EVE3_INCLUDE=no PROC_EVE4_INCLUDE=no VSDK_BOARD_TYPE=TDA2XX_EVM # Supported values: DDR_MEM_1024M DDR_MEM=DDR_MEM_1024M # Supported values: ipu1_0 ipu1_1 a15_0 none NDK_PROC_TO_USE=none # # Used to control building of algorithm source. # By default algorithm source not included in Vision SDK # BUILD_ALGORITHMS=no # # Applies profile to all cores # # Supported profiles: release debug #PROFILE=debug PROFILE ?= release PROFILE_ipu1_0 ?= $(PROFILE) PROFILE_ipu1_1 ?= $(PROFILE) PROFILE_ipu2 ?= $(PROFILE) PROFILE_c66xdsp_1 ?= $(PROFILE) PROFILE_c66xdsp_2 ?= $(PROFILE) PROFILE_arp32_1 ?= $(PROFILE) PROFILE_arp32_2 ?= $(PROFILE) PROFILE_arp32_3 ?= $(PROFILE) PROFILE_arp32_4 ?= $(PROFILE) PROFILE_a15_0 ?= $(PROFILE) # # For TDA2xx & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem # For TDA3xx - We have only IPU1 and hence IPU1 is the only option # Select IPU primary core from the available IPU1 & IPU2 subsytems # # Supported values: ipu1_0 ipu2 IPU_PRIMARY_CORE=ipu2 IPU_SECONDARY_CORE=ipu1_0 # # Set A15_TARGET_OS # A15 can run Linux or Bios # # A15_TARGET_OS support # Platform BIOS Linux # # TDA2XX_EVM yes yes # TDA3XX_EVM yes no # TDA2EX_EVM yes yes # # Supported values: Bios Linux A15_TARGET_OS=Linux IVAHD_INCLUDE=no VPE_INCLUDE=no DSS_INCLUDE=yes AVB_INCLUDE=no # # Enable below macro to enable DCAN integration into Vision SDK. # DCAN_INCLUDE=no CPU_IDLE_ENABLED=yes # # Enable below macro to view the bandwidth used by different IPs in the device # as a graphical plot on the display screen. # DATA_VIS_INCLUDE=no OPENCL_INCLUDE=yes TREAT_WARNINGS_AS_ERROR = yes HS_DEVICE=no DEFAULT_UBOOT_CONFIG := dra7xx_evm_vision_config DEFAULT_KERNEL_CONFIG := omap2plus_defconfig # For TDA2x DEFAULT_DTB := dra7-evm-infoadas.dtb # # Enable macro for OpenCV # ENABLE_OPENCV=yes CMEM_INCLUDE=yes BUILD_OPENCV_SRC=yes BUILD_LLVM=no include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk When I turn on the switch BUILD_OPENCV_SRC=yes and Then compile，The following error occurred: # osa: tda2xx-evm: Creating archive osa.a In file included from opencvCannyAlgo.c:84:0: iOpenCVCannyAlgo.h:82:28: fatal error: opencv/highgui.h: No such file or directory compilation terminated. In file included from opencvCannyLink_priv.h:104:0, from opencvCannyLink_algPlugin.c:77: iOpenCVCannyAlgo.h:82:28: fatal error: opencv/highgui.h: No such file or directory compilation terminated. In file included from canny.cpp:85:0: iCanny.h:81:28: fatal error: opencv/highgui.h: No such file or directory compilation terminated. make[6]: *** [depend] Error 1 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 Is there anything else I need to set up? + +Responses: +Hi, I see you set BUILD_OPENCV_SRC=yes. Please check this thread: e2e.ti.com/.../692767 Regards, Yordan + diff --git a/data2/text/range/0-5000/695758.txt b/data2/text/range/0-5000/695758.txt new file mode 100644 index 0000000000000000000000000000000000000000..57d9e8aa149bab787bef438369cc33294cf4f41c --- /dev/null +++ b/data2/text/range/0-5000/695758.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: CortexA15 exception vector base address when boot + +Query Text: +Part Number: TDA2 Hi， I have already known the device boot from the internal 48K ROM by the master Cortex A15 when reset. My question is that if the default A15 exception vector base address is the same as base address of the internal ROM. If not, how can A15 boot from the internal ROM? Thanks & regards. + +Responses: +Hi Yang Wang, There is a hardware tie off in the Cortex A15 subsystem which says when the A15 generates an access to 0x0 Address, the access is directed to the ROM region. On boot, the MMU is not enabled. Hence the 0x0 generated by the A15 on the address bus is sent to the ROM as a result of the tie off. Thanks and Regards, Piyali + +Hi Piyali, Thanks very much for your reply! About this tie-off, which document can I refer to? Is this tie-off configurable? If not, how should A15 access GPMC space(since GPMC space starts from 0x0)? Thanks and regards + +Hi, The Tie Off is not configurable. You can set up the A15 MMU to map the 0x0 to the GPMC memory location. Thanks and Regards, Piyali + +Hi Piyali, Is the tie off specific to virtual address or physical adress? + +And where can I find introduction to the tie off? Thanks and regards. + +Hi Yang, This information is not present in the TRM. I will take an action to inform our TRM team. The tie off is such that when ever a physical address 0x0 reaches the A15 subsystem, it will re-direct to the ROM. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/695764.txt b/data2/text/range/0-5000/695764.txt new file mode 100644 index 0000000000000000000000000000000000000000..f2d7ce3cd9f8748427ee09f754195cc92e3124a9 --- /dev/null +++ b/data2/text/range/0-5000/695764.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Could we storage DL files on other memory? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, From DL document tutorial, we can save AppImage(FW file) and NET.bin + PRM.bin(DL files) to SD card and boot up system. Because we need more space to storage DL files. We are not sure whether can storage above files(FW and DL) to separate memory device and load to DDR? Could you give us some advice? Thanks for your support. + +Responses: +Hi , Please look at the following you can use qspi itself to store the files e2e.ti.com/.../2527927 Regards Chetan.M + +Hi Chetan.M, Sorry for the late reply. Above link show we can storage DL files to QSPI. But we would storage FW to QSPI and DL files to SD card (because DL model file will large after traning). Is workable if we storage FW and DL on different memory? (booting from QSPI , reload DL from SD card) Many thanks. + +Ya , You can always have the Appimage in QSPI and read the DL form SD card . Regards Chetan.M + +Many thanks , + diff --git a/data2/text/range/0-5000/695962.txt b/data2/text/range/0-5000/695962.txt new file mode 100644 index 0000000000000000000000000000000000000000..581ae0a72982601ec59cf333d323d7126591a12a --- /dev/null +++ b/data2/text/range/0-5000/695962.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux load_cmem_ko.sh + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi， When I follow document VisionSDK_UserGuide_opencx.pdf，In the 1.2 step ./load_cmem_ko.sh. But in my vision_sdk there is no this file. How can I get load_cmem_ko.sh？ Thanks + +Responses: +Hi Xie Baojian, This file is present under "vision_sdk\build\hlos\scripts\linux" folder When you build any linux configuration (like tda2xx_evm_linux_all or tda2xx_evm_linux_opencx) , this file is copied to file system path (/opt/vision_sdk) Regrads Surya + +Hi Surya, there is no load_cmem_ko.sh in my "vision_sdk\build\hlos\scripts\linux" folder. What's the problem? How can I get the load_cmem_ko.sh？ Regrads, Xie Baojian + +Hi Xie Baojian, Which version of Vision SDK are you using ? Regards Surya + +Hi Surya, my vision SDK is PROCESSOR_SDK_VISION_03_02_00_00. Regards, Xie Baojian + +Hi Xie Baojian, This is the file which will load cmem "load_ocl_kos.sh" Regards Surya + diff --git a/data2/text/range/0-5000/696203.txt b/data2/text/range/0-5000/696203.txt new file mode 100644 index 0000000000000000000000000000000000000000..34210889d2b4766950b3f85d9f9a32e750042d52 --- /dev/null +++ b/data2/text/range/0-5000/696203.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: MPU system secure state switch + +Query Text: +Part Number: TDA2 Hi, ROM code provides some service for user by Secure Monitor Call. So is ROM code responsible for setting Monitor vector table? Can user redirect Monitro vector table? And it seems that ROM code doesn't provide a service to switch MPU to non-secure state, so how can I do this? Thanks and regards. + +Responses: +Hi, For security features please contact your sales representative. We cannot discuss them in a public forum. Best regards, Stan + diff --git a/data2/text/range/0-5000/696386.txt b/data2/text/range/0-5000/696386.txt new file mode 100644 index 0000000000000000000000000000000000000000..4ee2a1749dd01595d6b38175bfa3f2374d34ca51 --- /dev/null +++ b/data2/text/range/0-5000/696386.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: What is B15 of TDA2 relative with vision board ? + +Query Text: +Part Number: TDA2 Hi Sir, We will design new EVM board and use Cam1 port to capture image frame(parallel to parallel). But we don't know what relative B15 of TDA2 with Cam1 ~ Cam6 of vision board. Could you please give us advice or more information? Thanks for your support. + +Responses: +Hi, Prince Kuo, I am not sure that I understood your question. Numerations B15, A15, etc. are the BALL NUMBERs. BALL NAMEs are mcasp2_axr0, mcasp2_axr1. For all list of the correspondence between BALL NUMBER and BALL NAME see the Table 4-2. Ball Characters in Data Manual document. Regards, Mariya + +Hi Mariya B15 in EVM looks like to be use as a detection of vision board if we don't need to detect the the vision board because we put camera & SoC on the same board, the function of detecting vision board could be turned off by software? thank you + +Hi, We do not use this pin. For detecting the multi deserializer board we do a probe one of the slaves in the multi deserializer board at address 0x25. You can refer the Bsp_boardGetIdTda2xx() function in \packages\ti\drv\vps\src\boards\src\bsp_boardTda2xx.c. Regards, Prasad + diff --git a/data2/text/range/0-5000/696635.txt b/data2/text/range/0-5000/696635.txt new file mode 100644 index 0000000000000000000000000000000000000000..1f8402a1f3792028071a6b7a77902fe5c6f29877 --- /dev/null +++ b/data2/text/range/0-5000/696635.txt @@ -0,0 +1,83 @@ +Ticket Name: RTOS/TDA2: how to save encoded h.264 data and play on pc ?? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS my platform is tda2pxx , I had run the usecase "capture > encode > decode > diplay" now I want to record some frames video. so i write the usecase "capture > encode > null_save" , in null_save callback . i save the h.264 data to file . but i can't play it on pc using elecard streameye . the file code.txt is the callback func, i write , is there some wrong ?IDR.txt 0042.code.txt UInt32 idrCnt=0; +static Void capEncFrameCb(System_LinkChInfo *pChInfo, Void *pBuf, Void *arg) +{ + System_Buffer *pFrameBuf = (System_Buffer*)pBuf; + System_BitstreamBuffer *pBitFrame; + System_VideoFrameBuffer *pVidFrame; + System_MetaDataBuffer *pMetFrame; + Chains_csi2CalMultiCamAppObj *pObj = (Chains_csi2CalMultiCamAppObj*)arg; + Int32 re=-1; + UInt32 offset; + +// BspOsal_semWait(pObj->frameSync, BSP_OSAL_WAIT_FOREVER); + +// Vps_printf(" bufType=%d\n",pFrameBuf->bufType); + switch(pFrameBuf->bufType) + { + case SYSTEM_BUFFER_TYPE_VIDEO_FRAME: + Vps_printf(" SYSTEM_BUFFER_TYPE_VIDEO_FRAME\n"); + pVidFrame = (System_VideoFrameBuffer*)pFrameBuf->payload; + Vps_printf(" SAVE_ENC_FRAME: Writing frame to file ...length=%d\n",pVidFrame->metaFillLength); + break; + case SYSTEM_BUFFER_TYPE_BITSTREAM: +// Vps_printf(" SYSTEM_BUFFER_TYPE_BITSTREAM\n"); + pBitFrame = (System_BitstreamBuffer*)pFrameBuf->payload; + break; + case SYSTEM_BUFFER_TYPE_METADATA: + Vps_printf(" SYSTEM_BUFFER_TYPE_METADATA\n"); + pMetFrame = (System_MetaDataBuffer*)pFrameBuf->payload; + Vps_printf(" SAVE_ENC_FRAME: Writing frame to file ...length=%d\n",pMetFrame->metaFillLength); + break; + } + + + if(TRUE == pObj->encFrame) + { +// Vps_printf(" firstIdrFrame=%d\n",pObj->firstIdrFrame); + if(FALSE == pObj->firstIdrFrame) + { + if(1 == System_Bitstream_Buffer_Flag_Get_Is_Keyframe(pBitFrame->flags)) + { + idrCnt++; + Vps_printf(" First IDR frame found Cnt=%d\n",idrCnt); + +// if(idrCnt >= 2) + { + pObj->firstIdrFrame = TRUE; + } + } + } + + if(TRUE == pObj->firstIdrFrame) + { + Vps_printf(" SAVE_ENC_FRAME: Writing frame to file ...bufsize=%d,length=%d\n",pBitFrame->bufSize,pBitFrame->fillLength); +// re = ChainsCommon_Osal_fileWrite( +// pObj->fp, +// (UInt8*)pBitFrame->bufAddr, +// pBitFrame->fillLength); + +// re = Utils_fileWriteFile( fileName11, (UInt8*)pBitFrame->bufAddr, pBitFrame->fillLength); + re = User_fileWrite( pObj->fp, (UInt8*)pBitFrame->bufAddr, pBitFrame->fillLength); + offset = 5; + Vps_printf(" offset = %d, data0-5=%x,%x,%x,%x,%x\n", + offset, + *((UInt8*)pBitFrame->bufAddr+offset), + *((UInt8*)pBitFrame->bufAddr+offset+1), + *((UInt8*)pBitFrame->bufAddr+offset+2), + *((UInt8*)pBitFrame->bufAddr+offset+3), + *((UInt8*)pBitFrame->bufAddr+offset+4)); + Vps_printf(" SAVE_ENC_FRAME: Writing Encode frame to file DONE,return = %d,Frame ID=%d\n",re,pFrameBuf->frameId); +// pObj->encFrame = FALSE; + BspOsal_semPost(pObj->frameSync); + } + +// pObj->encFrame = FALSE; + } +} the file IDR.txt is idr h264 data, can you help me to check if the data is right ? i checked many frames , the start code of each frame is 00 00 00 01 , there is no other nalu type, why? + +Responses: +Hi This file dump and playing with VLC media player is already validated For the Null link file write set below configuration. pUcObj->NullPrm.dumpDataType = NULL_LINK_COPY_TYPE_FILE; strcpy(pUcObj->NullPrm.nameDataFile[0], "stream.h264"); I assume you use VSDK 3.3 release regards, Shiju + diff --git a/data2/text/range/0-5000/696746.txt b/data2/text/range/0-5000/696746.txt new file mode 100644 index 0000000000000000000000000000000000000000..c4425f7aae5b8a8f0545d95fffd3343d4aa2ad7b --- /dev/null +++ b/data2/text/range/0-5000/696746.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: I2C2 & HDMI I2C in EVM + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello Why HDMI I2C & I2C2's SDL & SDA are swap in TDA2? There is a RU108 to uncross the I2C2 & HDMI I2C in EVM. Could I use I2C2 to read hdmi I2C directly? thank you + +Responses: +Hi user3829173, This swap is in TDA2Ex and rev e version of EVM provides a option swap these lines. To use I2C2 to read the EDID, you would require to perform board modification to swap these lines. Please ensure the swap is applicable for HDMI only. Regards, Sujith + +Hello Sujith Our design is connecting I2C2 to image sensor & HDMI i2c, we use I2C2 to read both image sensor & EDID　 is it working? thank you + +Hi user3829173, If the electrical characteristics are aligned then it should work. Regards, Sujith + +Hi Sujith There is a level shift between SoC & HDMI connector, so it shout work. Thank you + +Thanks user3829173, Regards, Sujith + diff --git a/data2/text/range/0-5000/696838.txt b/data2/text/range/0-5000/696838.txt new file mode 100644 index 0000000000000000000000000000000000000000..345b1fd63f39e2c7eac4d95c06b532444e40a374 --- /dev/null +++ b/data2/text/range/0-5000/696838.txt @@ -0,0 +1,81 @@ +Ticket Name: RTOS/TDA2: No result for new use case + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, we reference "vip_single_cam_lane_detection" and "null_src_dec_display" two use case and create a use case we call "null_src_lane_detection" Now, we reference "null_src_lane_detection" and "tidl_OD" two use case for our new use case I got the output below,but It looks have no result Can you tell us where is wrong? BR Allen + +Responses: +Hi Allen, Please verify if all the usecase and algo parameters are set . As the default usecase works there will be no issue in algo or framework, Please re verify the usecase Regards Chetan.M + +Hi, I think I set all parameters I can run these two use cases separately but when I integrate these two use cases It have no result Is there anything I didn't notice? BR Allen + +Can you please send the usecase flow what is all connected in the chain + +Hi The below document is the use case I create chains_tidlODPrimax.txt UseCase: chains_tidlODPrimax + +NullSource -> Decode -> VPE -> Dup -> Merge_alg + + +//TIDL_OD +Dup -> Alg_tidlpreproc (A15) + +Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) + +Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) +Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) +Alg_tidl_Eve3 (EVE3) -> Merge_OD (DSP1) +Alg_tidl_Eve4 (EVE4) -> Merge_OD (DSP1) +Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge_alg + +//LD +Dup -> VPE_LD -> Alg_ImagePreProcess (EVE1) -> Alg_ImgPyramid -> Alg_LaneDetect (DSP1) -> Merge_alg + + +//Display +Merge_alg -> Sync_alg (DSP1) -> Alg_ObjectDraw (DSP1) -> Display_alg + + +//GrpxSrc -> Display_Grpx + +Can you verify the output of each algorithm , And also the alg_draw parameters Regards Chetan.M + +Hi, Can you explain it in more detail? So, Is the problem occurred in the flow below? the pic below is the linking flow Is it has any problem? + +Hi, Have any update? BR Allen + +Allen , can you print the usecase stats 'p' and share it , Not able to suspect on the issue with the available inputs. Regards Chetan.M + +Hi, It is the use case stats below 2438.session.log BR Allen + +I see many times there are complete frame drops , Some times there is output but not consistent can you share the img file of the usecase . ? Regards chetan.M + +Hi, It is the img file of our use case below BR Allen + +Hi, Have any update? Is our flow wrong? BR Allen + +Hi Allen , What is the load of each core , Is the system overloaded and dropping the frames . Do you have a local TI FAE .? So that we can arrange for a call and see how we can debug further .? Regards Chetan.M + +Hi,Chetan Our FAE told to us we can't use the flow below is it really? he told us to another flow but I got errors after we try We'll post a new question for the error but, we want to know the answer about this. Is really true we can't use this flow for our customized use case? + +Hi, Have any update? Is really true we can't use this flow for our customized use case? BR Allen + +Allen , We will need to debug and find why the usecase is not up , There can be timing issue which is causing algo not to update . Can you try reducing the fps of read to 5 and try . Regards Chetan.M + +Hi, Chetan I am not getting your answer. Can you please elaborate? BR Allen + +Allen, In the usecase there are multiple paths from source (file read) to display, One of the path operates at lower fps then the frames are dropped , If you change the sync threshold to a high value then sync link will not synchronize the frames and hence it might be dropping many frames. We can debug this issue with a lower pfs , Reduce the read FPS to 5 and try running the usecase . Regards Chetan.M + +Hi, Chetan We try to reduce the read FPS to 5 but we got the same result Is right what I did? It is the use case stats below 5008.session.log BR Allen + +Hi, Chetan Have any update? If we change something setting wrong, please tell us BR Allen + +No the settings look correct, In this usecase many links are utilized and there might be delay in some links which is causing the usecase to fail , You will have to debug this and route cause the slower link Regards Chetan.M + +Hi, Chetan I am not getting your answer. Can you please elaborate? BR Allen + +Hi Allen, You will have to debug each path of the usecase by adding a null terminator in each path and check the output. Then keep the entire usecase running bypassing the algo and ensure chain is up Regards Chetan.M + +Hi, Did you able to resolve your issue. can you close this thread if resolved. Regards, Anuj + diff --git a/data2/text/range/0-5000/697104.txt b/data2/text/range/0-5000/697104.txt new file mode 100644 index 0000000000000000000000000000000000000000..bc8ce2574e2b9c98543335582d6afbbf2cf6bcd5 --- /dev/null +++ b/data2/text/range/0-5000/697104.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: Where can i learn SoC programming + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi TI, I am a newbie for SoC platform. I used to do programming on micro-controller (other brand) which i believe its a totally new platform. i need some help to get things started hope TI is able to advise me how to do some. Plus i am totally new on this CCS IDE as well Regard Willson + +Responses: +Hi Wilson, you can start your familiarization with CCS from here: dev.ti.com/.../ (you can find Documentation and Trainings for CCS there). You can check also "A Guide to Debugging With CCS on the DRA7x, TDA2x and TDA3x Family of Devices" here: www.ti.com/.../sprac17b.pdf You can download VisionSDK here: software-dl.ti.com/.../index_FDS.html when you install it in the "doc" directory you can find quite comprehensive documentation for the SDK, and you can also look at it's source code. Regards, Yordan + diff --git a/data2/text/range/0-5000/697127.txt b/data2/text/range/0-5000/697127.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1fc7df1f55fb6946086d095c21057c90000f609 --- /dev/null +++ b/data2/text/range/0-5000/697127.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: ERROR in convert caffe model to bin format + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi I use import tool to convert caffe model to bin format. I use the sample model from "github.com/.../sparse ", The config file as follow randParams = 0 modelType = 0 quantizationStyle = 1 quantRoundAdd = 25 numParamBits = 8 inputNetFile = "A.prototxt" inputParamsFile = "A.caffemodel" outputNetFile = "NET_OD.BIN" outputParamsFile = "PRM_OD.BIN" conv2dKernelType = 1 rawSampleInData = 1 sampleInData = "000100_1024x512_bgr.y" tidlStatsTool = "tidl_model_import.out.exe", However, I got the error as shown in the following figure. Could you point me how to fix this error? Thanks. BR Allen + +Responses: +Hi Allen, Please refer to first post in below thread and it also has import config file to use.. e2e.ti.com/.../689617 Thanks, Praveen + +Hi, Praveen We fixed the error and NET and PRM files was been generateed . but why the logs still show "Couldn't open inputNetFile file" ? BR Allen + +Hi Allen, Please attach import config file and log file to check the problem. Thanks, Praveen + +Hi, Praveen we find something wrong and already solve and we have some post which doesn't receive respond form E2E the link as below can you help us? thanks a lot Allen + diff --git a/data2/text/range/0-5000/697450.txt b/data2/text/range/0-5000/697450.txt new file mode 100644 index 0000000000000000000000000000000000000000..71905e04f565dd44f2a057948469012cbd74fc51 --- /dev/null +++ b/data2/text/range/0-5000/697450.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: TDA2 Memory AVL + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I'm designing our own ADAS on TDA2 platform is there memory (DDR,eMMC..etc) AVL for reference? thank you + +Responses: +Hi user3829173, Can you please check www.ti.com/.../sprr211 & www.ti.com/.../TDA2EVM5777 Regards, Sujith + +Hi Sujith is MT41K512M8DA-107 AIT:P suitable for TDA2? + +Hi, Thanks for your query! Could you please elaborate a little bit more on what exactly are you looking for? Are you looking for some DDR part numbers that you can interface with TDA2? TDA2 DDR interface is compliant with JEDEC specifications, so you can interface it with *any* DDR devices that are JEDEC compliant. The total density and number of DDR devices that can connected to TDA2 is specified in the device data manual. Please let me know if this answers your question or if you have more specific questions. Again, Thanks for writing to us. Best Regards Rajesh Veettil + diff --git a/data2/text/range/0-5000/697564.txt b/data2/text/range/0-5000/697564.txt new file mode 100644 index 0000000000000000000000000000000000000000..b4ebf9fd10940e0e923290c90309437dae5058cd --- /dev/null +++ b/data2/text/range/0-5000/697564.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: Recommended RTOS for TDA2x ADAS + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Dear TI I would like to check with you which OS is highly recommended to use for ADAS. + +Responses: +Hi Wilson, it is the VisionSDK (current ver 3.03): www.ti.com/.../processor-sdk-tdax Regards, Yordan + +This is a very generic question. It is totally your choice depending on your system needs, our Sdk comes with TI SYSBIOS and Linux. These OS are not safety certified but we have customers who have built upto ASIL B system using them. You can either use them or get a OS from vendors like mentor, Windriver, QNX etc. regards yashwant + diff --git a/data2/text/range/0-5000/697682.txt b/data2/text/range/0-5000/697682.txt new file mode 100644 index 0000000000000000000000000000000000000000..4392cd705ceb9c7d73fb33d3aef3f4b793d460b9 --- /dev/null +++ b/data2/text/range/0-5000/697682.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: EMIF Register definitions in CCS + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi It seems that the Register Definition of the EMIF in CCS are not only incomplete (PHY_STATUS_2-19 missing), but also wrong for the existing register definitions: So in CCS it says 0x018C for STATUS_20 but the TRM specifies 0x0190 Are there newer Register definitions available for our device? Do they ship with CCS or where could I get a update of these? Regards, Daneil + +Responses: +Daniel, Looks like you are using an older defective device support package (i.e the package that loads those registers). Try using the latest version (Automotive v1.0.6) Here is the wiki processors.wiki.ti.com/.../Device_support_files or you can use Help->Install New software -> select CCS update site->Select latest auto package. Thanks, Alex + diff --git a/data2/text/range/0-5000/698024.txt b/data2/text/range/0-5000/698024.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6e50da440c1f6c79db78cd0bb99c0bc7b84e56e --- /dev/null +++ b/data2/text/range/0-5000/698024.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: [Vision_SDK 03.03.00.00] TIDL OD usecese input video + +Query Text: +Part Number: TDA2 Hi, To run TIDL OD usecase, followinfg 4 files are required. TIDL OD Network file (NET_OD.bin) TIDL OD Parameter file (PRM_OD.bin) TIDL OD Usece input data file (inData_OD) TIDL OD Usecase input header file (inHeader_OD) SDK already contains NET_OD.bin & PRM_OD.bin in ./vision_sdk/apps/tools/TIDL_files. Those network is for 768x320 input image size. How do we get 768x320 video file to translate to inData_OD / inHeader_OD ? I am referring follwing e2e. However, FullHD or 4K files are only seen in http://jell.yfish.us/ . https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/689617 e2e.ti.com/.../687481 Best regards, Saito + +Responses: +Hi Saito The TI trained (default) files will be part of cdds . Vision SDK demo clips are available at cdds.ext.ti.com/.../emxNavigator.jsp Regards Chetan.M + +HI Cheta.M, Thanks. TI OD usecase is running well. Best regards, Saito + diff --git a/data2/text/range/0-5000/698104.txt b/data2/text/range/0-5000/698104.txt new file mode 100644 index 0000000000000000000000000000000000000000..f2f749af93e6f8ed146ecc146fdc75ee0bbbc3ec --- /dev/null +++ b/data2/text/range/0-5000/698104.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TIDL Host emulation tool convolution output issues + +Query Text: +Part Number: TDA2 Issue with the convolutional output in the function : TIDL_refConv2d_i8u_032s_cn in tidl_conv2d_base.c First, the test setup: A simple convolutional network with 3x3 kernel and bias with 2 output channels. The first kernel has all zeros and the second kernel has all ones. Bias for first channel is 1 and second channel is 2. Now all the variables involved: input raw rgb = 255 (all 1s) inQuantFactor = 65280 weightsQ = 65536 biasQ = 4194304 biasQFact = 255 rgb size input = 3x3x3 num of output channels = 2 In foating point: input = 1.0 weights = [0, 1] (1st kernel all weights are zero, and second kernel all weights are 1) bias = [ 1, 2] The convolved output of the first channel should be 1. Just bias, because all weights are zero. The convolved output of the second channel should be : 1.0 * (3x3x3) *1 + 2 = 29. Ti fixed point: weights having values[0,1] becomes approximately: [0,1]*weightsQ/255 = [0, 255]. biases [1, 2] becomes approximately: [1, 2]*biasQ/255 = [16384,32767]. Now checking the convolution in TIDL_refConv2d_i8u_032s_cn function: There, pInChannel contains inputs which is uint8, and all the values are 255. Bias is multiplied by the biasQFact (255). I understand this is because of the inQuantFactor, and the bias needs to be scaled. convolution happens as: input * weights + bias*biasQFact for first channel, output is = bias*biasQFact = 4177920 for second channel: 255* (3*3*3)*255 + 32767*255 = 10111260 So floating point 1 is represented as 4177920 and 29 is represented as 10111260 which is wrong. Since the bias and weights are not represented by the same Q factor, the output will match only when the input also has a QFactor, With inout Q factor, second channel should be: 255*64 * (3*3*3)*255 + 32767*255 = 120718785, which should be the output. What am i missing here? I have attached the model and inputs to reproduce this problem. ti.zip + +Responses: +Hi Vijay, Please refer to below e2e thread, where we had one simple cifar net example to understand the tidl layers. I would recommend to start with this to better understand the input,weights and output Q formats. Then on top of it you try your experiments to get the better results. e2e.ti.com/.../689876 Thanks, Praveen + +Hi Praveen, The above example is created in such a way that one can figure out what the issue is without doing into the code to debug. Anyway, I went and fixed the TIDL_importQuantLayerParams function in tidl_tfimport.cpp to make the above toy example work. The issue arises when the min - max range of weights and bias are not same. By the way, the cifar net example also didnt match (TIDL .01.01). I loaded the model shared in the above link and obtained outputs from each of the layers to compare with the host emulation output. Outputs doesnt match. I have attached all the tools required to reproduce the issue, in case you guys want to try it. tidl_keras_example.zip + +Hi Vijay, Thanks for pointing this. I am closing this thread as you could fix the issue and you can feel free to open this thread or create a new thread if you face any issues. Regards, Praveen + diff --git a/data2/text/range/0-5000/698136.txt b/data2/text/range/0-5000/698136.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ae58432cea57b9c3e134c477ac56623946899e6 --- /dev/null +++ b/data2/text/range/0-5000/698136.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: SDK ov10635 I2C address not make sense with datasheet. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, I find OV10635 salve device default address is 0x30. But I found SDK use 0x38 to communication with OV10635. (Vision board cam1 <-> OV10635) Why they are different? + +Responses: +Hi, The lower 3 bits of the i2c address is controlled by GPIO[2:0]/SID[2:0] pins. so because of them, i2c address can change. Rgds, Brijesh + +Hi Brijesh, Thanks for your reply. I know you mean. But same camera module just connect to different CAM port of vision board that will change I2C address of camera module.(Seem not relative with GPIO[2:0] or SID[2:0]) FW log show SOC use 0x38 to communication with OV10635 Do you know why use 0x38 (0x70 /2) ? + +These are aliased I2C address. In case of multi-deserializer board, the sensor is connected to the serializer at the remote end through the FPD link. There is no sensors directly connected to the I2C bus on the EVM end. The communication is done through the deserializer, serializer and then to the sensor. We can program a suitable I2C address in the desrializer. Once the programming is done, any read/write to this aliased address is communicated to the remote sensor via the FPD link. The addresses are chosen in a such a way that it doesn't conflict with any of the I2C address connected to this I2C bus in the EVM side. For more details go through 913/914 reference manual. + +Hi Sivaraj R3681, Understand. Many thanks. + diff --git a/data2/text/range/0-5000/698490.txt b/data2/text/range/0-5000/698490.txt new file mode 100644 index 0000000000000000000000000000000000000000..eff74dca0b17778dc309fae3b0d3fb6aea18702b --- /dev/null +++ b/data2/text/range/0-5000/698490.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: how to enable uart2 on linux os of ti sdk + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I'm newbie to use TI's tda2xx evm board with Vision SDK. I am using linux os with tda2xx_evm_linux_all config. After I added PlatformUART2SetPinMux() in Bsp_boardTda2xxInit(), I am able to send strings with uart2 by typing "echo 123 > /dev/ttyS1" in uart1 terminal. The correct waveform on uart2 tx can be seen on the oscilloscope. Then I connected uart2 rx to uart2 tx, sent a string by "echo 123 > /dev/ttyS1" , then "cat /dev/ttyS1": I got nothing. Seems nothing is recieved from uart2. Did I miss anything to use uart2 on linux? Is there documents about my issue? thanks very much. Dong + +Responses: +Hi It is unclear where you want to control the UART instance from and the overall intent of what you are trying to implement Can you be more specific in terms of the resource usage from Linux vs BIOS + +Hi, I want to verify UART2 function first in whichever method, so I take /dev/ttyS1 using Linux os. The final goal is to use LIN bus through UART2. The resource usage from Linux vs BIOS is not considered yet. Currently my problem is that UART2 data can't be received by "cat /dev/ttyS1". If TI has no support about UART2 on Linux os (tda2xx_evm_linux_all config), any other guide to quickly verify UART2 using Vision SDK(PROCESSOR_SDK_VISION_03_01_00_00) is appreciated. + +It seems that the pin mux register setting of uart2 is not correct: the macro CTRL_CORE_PAD_UART2_RXD_UART2_RXD_MUXMODE_UART2_RXD_0 in PlatformUART2SetPinMux() function does not match what's described in tda2x manual about UART2_RXD_MUXMODE. (P5149, TDA2x SoC for Advanced Driver Assistance Systems (ADAS), Silicon Revision 2.0, 1.x Texas Instruments ADAS Family of Products, Technical Reference Manual) After I change CTRL_CORE_PAD_UART2_RXD_UART2_RXD_MUXMODE_UART2_RXD_0 to CTRL_CORE_PAD_UART2_RXD_UART2_RXD_MUXMODE_UART2_RXD_4, uart2 rx function is correct. Please fix this bug in TI VISION SDK in case other developers using uart2 are having the same problem. Thanks! + diff --git a/data2/text/range/0-5000/698561.txt b/data2/text/range/0-5000/698561.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf071542839b2b2f05c78af49713dd0190e21d55 --- /dev/null +++ b/data2/text/range/0-5000/698561.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: TDA2X UART Speed + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello What is the max speed of UART in TDA2? I read in Spec that the speed is up to 12Mbps? so if we use 20MHz functional clock,uart speed will be 1.25M? + +Responses: +Hi, Theoretically yes - 1.25 Mbps, but you must be aware that 48 Mhz and 192 MHz clocks are also used for many other peripherals in the SoC which makes it almost impossible to set one of that clocks to 20Mhz. Regards, Stan PS See Figure 3-45. CM_CORE_AON Overview (b) in the TDA2 TRM document. + diff --git a/data2/text/range/0-5000/698563.txt b/data2/text/range/0-5000/698563.txt new file mode 100644 index 0000000000000000000000000000000000000000..20bc53d760d677c40439ff709697fd61f25019a3 --- /dev/null +++ b/data2/text/range/0-5000/698563.txt @@ -0,0 +1,12 @@ +Ticket Name: about the omap x5777 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I have a VAYU EVM XC5777C CPU BOARD, however I can't find the reference documents about the omap x5777 on 'www.ti.com' online. Could you give some help, Thanks. + +Responses: +Hi, This is TDA2xx EVM. You can see the documents on TDA2 here: www.ti.com/.../tda2. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Dear Rishab, Thanks for your reply, it resolve my question. Thanks a lot. Regards, Tianxing + diff --git a/data2/text/range/0-5000/698674.txt b/data2/text/range/0-5000/698674.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0bed3ca0fc243850b05ca622f86775b58df965d --- /dev/null +++ b/data2/text/range/0-5000/698674.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/TDA2: -mfpu=neon where to add + +Query Text: +Part Number: TDA2 Tool/software: Linux /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h -mfpu=neon where to add? + +Responses: +Hi Shuai , Are you getting this error while building vision sdk or linux . ? What build stage you have this error . ? Regards Chetan.M + +Hi Chetan.M make -s -j i add some code use neon so error ! so -mfpu=neon where to add? + +if its in bios cores i.e ipu , dsp , eve then add it in corresponding make rules vision_sdk\build\rtos\makerules for hlos cores vision_sdk\build\hlos\makerules\linux Regards Chetan.M + +Hi Chetan.M for hlos cores PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux$ common_header_a15.mk ？？ How can it ，please specific? BESTWISHES SHUAI + +Hi Shuai , CC_OPTS=-c -Wall -Warray-bounds -fPIC -mfpu=neon Regards Chetan.M + +i find in SDK_VISION_03_02_00_00\vision_sdk\apps\src\hlos\MAKEFILE_adam_car.MK have -mfpu=neon and i add -mfloat-abi=softfp here ,but still error /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h how to solve this ? BESTWISHES SHUAI + +Hi Chetan.M this (-mfloat-abi=softfp ) is not need?? thanks shuai + +Hi Chetan.M i add like this CC_OPTS=-c -Wall -Warray-bounds -fPIC -mfpu=neon stille error, neon is not support? /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h BESTWISHES SHUAI + +Shuai , CC_OPTS is the compiler c flags location . if you add the flags required here it is used while compilation . if you build without -s option you can see the expansion of all compiler option and macro . Regards Chetan.M + +HI Chetan.M help me please /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h i add CC_OPTS=-c -Wall -Warray-bounds -fPIC -mfloat-abi=softfp -mfpu=neon but no done! how can i solve it? BESTWISHES SHUAI + +Hi Shuai , i am not sure if its looking for flags in linking stage , you can add the flags at LD_OPTS=-lpthread and try , Else please look at arm compiler documentation Regards Chetan.M + +"CC_OPTS="-c -Wall -Warray-bounds -fPIC -mfloat-abi=hard -mfpu=neon -w "CC_OPTS="-c -Wall -Warray-bounds -fPIC -mfloat-abi=hard -mfpu=neon -w In file included from conv11.h:2:0, from Arcsoft_AHD_Config.h:68, from Arcsoft_AHD_Utils.h:13, from Arcsoft_AHD_Net.h:4, from Arcsoft_AHD_Net.c:1: /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.3.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h + diff --git a/data2/text/range/0-5000/698759.txt b/data2/text/range/0-5000/698759.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9b8fb60a1d9fa223baa826d9858ee5e6c380d14 --- /dev/null +++ b/data2/text/range/0-5000/698759.txt @@ -0,0 +1,10 @@ +Ticket Name: Can TDA2 plus ISP handle RCCB format? + +Query Text: +Hello, Can ISP handle RCCB raw format? If not possible, is it limitation of HW or SW? Best regards, Wilson. + +Responses: +Hi Wilson, I think it can, have a look at the AppNote @ www.ti.com/.../spraca8.pdf Regards, Brijesh + +Brijesh, Thanks very much. + diff --git a/data2/text/range/0-5000/698847.txt b/data2/text/range/0-5000/698847.txt new file mode 100644 index 0000000000000000000000000000000000000000..a39628c6ede09c7d3ea2c5802db28a1ed232cac2 --- /dev/null +++ b/data2/text/range/0-5000/698847.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Inquiry TDA2 feature : 2 or 3 camera signal input and process in the same time performance + +Query Text: +Part Number: TDA2 Dear Sir/Madam I have an inquiry on this TDA2. I would like to check with you is this TDA2 able to support 2 to 3 camera signal input and is it able to process is all at the same time? + +Responses: +Yes, Have look into the SRV usecase, it processes 4 1MP cameras. Rgds, Brijesh + +Dear Brijesh So another you able to do computer vision processing on to 4 x 1MP cameras as the same time ? + +Hi Wilson, Well, it depends on what algorithms you are using and what processing requires your algorithm? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/698848.txt b/data2/text/range/0-5000/698848.txt new file mode 100644 index 0000000000000000000000000000000000000000..772cc974819ceb1ac488b3b2c0b63ce86bf0a3af --- /dev/null +++ b/data2/text/range/0-5000/698848.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: SerDes DS90UB933 can pair with DS90UB914 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, I see below from "Camera SerDes Overview" of TI web. I have TDA2 that mount DS90UB914Q deserializers and target camera module use DS90UB933 serializers. Because I have not EE resource can support. Could you please check can they pair? Is Pair the DS90UB933 serializers with DS90UB914Q deserializers? Thanks for your support. + +Responses: +Hi Prince, Atleast the 933 specs does not mention the support for 914 deserializer, so it will not work.. Rgds, Brijesh + +Hi Brijesh, Understand. Thanks for your reply. + diff --git a/data2/text/range/0-5000/698942.txt b/data2/text/range/0-5000/698942.txt new file mode 100644 index 0000000000000000000000000000000000000000..abff51d3eab88a9034d4423bde35e27c7c3ba96b --- /dev/null +++ b/data2/text/range/0-5000/698942.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Caffe SSD model output does not match TIDL output + +Query Text: +Part Number: TDA2 Hi, I'm running our own ssd model(not caffe-jacinto based) using the eve host emulation.The input resolution of the image is 480x270. The SSD network contains four heads. I have set keep_top_k as 5 to output only five boxes. My detection layer is as follows: layer { name: "detection_out" type: "DetectionOutput" bottom: "mbox_loc" bottom: "mbox_conf_flatten" bottom: "mbox_priorbox" top: "detection_out" include { phase: TEST } detection_output_param { num_classes: 2 share_location: true background_label_id: 0 nms_param { nms_threshold: 0.45 top_k: 100 } code_type: CENTER_SIZE keep_top_k: 5 confidence_threshold: 0.1 } } This is the python script being used to read and print the SSD output from Bin file: import numpy as np bbox = np.fromfile("trace_dump_54_140x1.y", dtype=np.float32) reshapedbox = np.reshape(bbox,[5,7]) print reshapedbox When I run the script, the output is as follows: [[0. 1. 0.9999695 0.49767017 0.86217594 0.50364757 1.0235895 ] [1. 1. 0.9999695 0.4310913 0.8820838 0.4368931 1.0036817 ] [2. 1. 0.9999695 0.36486337 0.8434374 0.36978766 0.9579961 ] [3. 1. 0.9999695 0.2893248 0.8660821 0.29530218 0.98064077] [4. 1. 0.9999695 0.24571767 0.8706877 0.25169504 0.9869671 ]] The caffe output I got from the model is: [[[[0. 1. 0.9980788 0.8675699 0.4135536 0.921327 0.5036046 ] [0. 1. 0.9775522 0.7183735 0.4759325 0.754390 0.5347565]]]] Both in tidl and caffe the last four index corresponds to the coordinates xmin, ymin, xmax and ymax. As you could see the outputs are too different. Is it expected when models are not trained using caffe-jacinto? I verified the caffe output by plotting the bounding box over the image and it's correct. Thanks in advance, Navinprashath.R.R + +Responses: +We have validated the models trained using caffe-jacinto only. The detection layer is implemented as per the definition of caffe-jacinto layer Use caffe-jacinto and eaxmple models in caffe-jacito-models folder to used SSD feature of TIDL + diff --git a/data2/text/range/0-5000/699186.txt b/data2/text/range/0-5000/699186.txt new file mode 100644 index 0000000000000000000000000000000000000000..55e7dbf834bcae4bd57255153733158af112d94e --- /dev/null +++ b/data2/text/range/0-5000/699186.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: Problems with integrating existing framecopy algorithm into existing NetworkRxDecDisplay UseCase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, We are working on a TDA2xx EVM with Bios (tda2xx_evm_bios_all) We tried to integrate the framecopy algorithm into the NetworkRxDecDisplay UseCase. (See picture) The defaul unedited NetworkRxDecDisplay UseCase is working fine, but the new edited UseCase doesn't work. It starts, but when we start to stream the data from the pc to the Board, this error occurs: PC side: Does anyone know, how we can fix that? Kind Regards + +Responses: +Hi , On which core are you running networking .? A15 or ipu1_1 From figure it shows a15 but from log it says ipu1_1 Regards Chetan.M + +Hello, we set NDK_proc_to_use to ipu1_1 in build-config Regards + +but the usecase you have generated network rx on A15 . ? Can you try changing it on ipu ( core where you have networking enabled) . ? Regards Chetan.M + +But the standard NetworkRxDecDisplay UseCase (without the framecopy) works fine. We can send video data with the network tx tool and it's displaying on the display without an error Regards + +Sorry this use case is a bit confusing... In the use case Picture, it seems to indicate the NetworkRx is running on A15 but it will actually be overwritten in chains_networkRxDecDisplay_SetAppPrms() depending on where the NDK_proc_to_use is set. So, in reality, since NDK_proc_to_use=ipu1_1, the NetworkRx link will be running on IPU1_1. We do that because we want to make the same use case code working wherever NDK resides. When you create your own use case, you have to create NetworkRx Link on the same core as the NDK_proc_to_use is set. + +Hello, ok, thanks for the explanation . We will try it with the NetworkRx link created on ipu1_1 and let you know if it works then. Thanks and regards + +Did it solve the issue , Please close the thread if the issue is solved Regards Chetan.M + diff --git a/data2/text/range/0-5000/699476.txt b/data2/text/range/0-5000/699476.txt new file mode 100644 index 0000000000000000000000000000000000000000..6775b68100a209a0850940aa0152716e94d5aa11 --- /dev/null +++ b/data2/text/range/0-5000/699476.txt @@ -0,0 +1,40 @@ +Ticket Name: Linux/TDA2: How to get the serial number of the chip of tda2x + +Query Text: +Part Number: TDA2 Tool/software: Linux How to get the serial number of the chip of tda2x + +Responses: +Hi, shuai wang32, Please refer to 1.5 TDA2x Device Identification section in Technical Reference Manual. Regards, Mariya + +Hi, Please refer to Table 1-2. DIE_ID in the device TRM. Although not explicitly stated, I think DIE_ID is a unique die ID identificator. Regards, Stan + +Hi Stan I'm going to use the only chip ID to encrypt it. Table 1-2. DIE_ID Is it appropriate？ shuai + +Hi Shuai, Yes this is correct. Regards, Rishabh + +HI Rishabh: HOW CAN I get the DIE_ID number on A15 in linux! unsigned int chipid[4]; chipid[0]=STD_FUSE_DIE_ID_0; chipid[1]=STD_FUSE_DIE_ID_1; chipid[2]=STD_FUSE_DIE_ID_2; chipid[3]=STD_FUSE_DIE_ID_3; printf("chipid[0]=%d ,chipid[1]=%d,chipid[2]=%d,chipid[3]=%d\n",chipid[0],chipid[1],chipid[2],chipid[3]); chains_main.c:142:12: error: 'STD_FUSE_DIE_ID_1' undeclared (first use in this function) + +Hi Shuai, These are registers in the Control Module. Search for CTRL_WKUP_STD_FUSE_DIE_ID_0(0x4AE0 C200) in Control Module chapter in TRM. Regards, Rishabh + +Hi You will not be able to just access the device physical registers on Linux Linux uses a full fledged MMU to ensure isolation between Kernel and user mode access Accessing device register from an User application is typically not allowed unless you are writing a user space driver for a peripheral If it is for some debug you can use tools such as omapconf( github.com/.../wiki) to temporarily map the device registers and read/write to it + +I have a A15 algorithm link needs to be encrypted and used for users, I want to use chip ID to correspond to encrypted files, so how do I get the chip ID in the A15's algorithm LINK? In this way, I can verify whether the chip ID matches the encrypted file. + +Hi Are you suggesting that you would like to use the chip ID as an input for the encryption process - is the encryption based on the chip id itself or a device unique key + +Hi Sriram based on the chip id itself ！ BESTwishes shuai + +Using a emulator can look at the register of ID ， also read Physical Address, but canot read Physical Address in code of linux. + +****** Segmentation fault caught .... Faulty address is 0x4ae0c200, called from 0xb6c4d1a9 Totally Obtained 0 stack frames. signal number =11 Signal number = 11, Signal errno = 0 SI code = 1 (Address not mapped to object) Fault addr = 0x4ae0c200 [bt] Execution path: + +Hi Can you clarify where will you need to read the chip id from If it is from user space, you have to resort to one of the following 1. Read from RTOS(on M4) , pass this information as part of IPC to application on A15 2. On A15 Use tool like omapconf and some scripting to pass this information to your application 3. Emulate ompaconf type mapping from a custom driver to map and read the device id information + +Hi：Sriram i want to read chip id on A15 algorithm link ! + +Hi：Sriram On A15 Use tool like omapconf is there any sample or document for guide ! shuai + +Hi For omapconf usage refer wiki link : github.com/.../wiki + +Hi Shuai, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/699500.txt b/data2/text/range/0-5000/699500.txt new file mode 100644 index 0000000000000000000000000000000000000000..f2cdbe3932aaac76c600fa6aefb8177200ab9c27 --- /dev/null +++ b/data2/text/range/0-5000/699500.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: what's format the video data (yuv420sp_uv) in buffer? + +Query Text: +Part Number: TDA2 Tool/software: Linux i write a algorithm plugin , and it had run. but my algorithm not work. so i want save one frame data to debug in algorithmLink_process function. there is a problem i occured . the slice of my code as follow, the data is YUV420SP_UV format , but i can't play it use yuv player on pc for(bufCntr = 0; bufCntr < numBuffs; bufCntr++) { OSA_memCacheInv((unsigned int) pSysVideoFrameBufferInput->bufAddr[bufCntr], (unsigned int) bufSize[bufCntr]); } frame_count--; if(frame_count == 0) { fp_out = fopen("/home/30.yuv", "wb"); fwrite(pSysVideoFrameBufferInput->bufAddr[0], pInputChInfo->width*pInputChInfo->height, 1, fp_out); fwrite(pSysVideoFrameBufferInput->bufAddr[1], pInputChInfo->width*pInputChInfo->height/2, 1, fp_out); fflush(fp_out); fclose(fp_out); } so , i guess the data storage format in memory is not linear . is right ? can you explain the details to me ? thanks a lot + +Responses: +and i run the algorithm plugin on A15 + +Hi, The data is linear format only. But typically none of the YUV player support YUV420SP format. Can you please confirm if your player support it? Also can you check if luma only looks correct? Rgds, Brijesh + +the file is dum_yuv.txt , it seems like that stroge format is tile .dump_yuv.txt + +there is the pictures. + +Hi, Can you please check the pitch/line offset of the luma and chroma portion of the image? it seems it is different. Also if possible, can you share this dumped image? Rgds, Brijesh + +i had upload the dumped file , it is dump_yuv.txt . res is 1280*800. the pitch should equal the width, but i will check it . the chains is NullSource (A15) -> Decode -> Alg_dms (A15) -> Display i dumped the data at Alg_dms Link, before the alg called . + +May be decoder output is not correct, can you check before decoder if nullSource output is correct? Rgds, Brijesh + +thanks , i solved this problem , the pitch value is not equal 1280 , it is 2048 . + diff --git a/data2/text/range/0-5000/699766.txt b/data2/text/range/0-5000/699766.txt new file mode 100644 index 0000000000000000000000000000000000000000..3cb37d0d765740f0313b1025b1ef56f78c188032 --- /dev/null +++ b/data2/text/range/0-5000/699766.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EVM5777: AdaBoost Training + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I have used Adaboost object detection training tool (Matlab based github.com/.../acf-jacinto) to generate .descriptor My dataset is download from https://goo.gl/sVtBm2 (.avi) and youtube (.mp4) I annotated my dataset by acf-jacinto-master vbbLabeler.m I only change the dataset (Boat) to train the model and convert .descriptor and use it in TDA2 But it didn't work when I run 1: Single Camera Usecases f: 1CH VIP capture (HDMI) + FrontCam Analytic 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx,EVEx) + Display(HDMI) and e: 1CH VIP capture (HDMI) + Pedestrian, Traffic Sign, Vehicle Detect 2 (EVE1 + DSP1) + Display 3: Enable Vehicle Detect (VD) note: I change the VD weights with mine (boat weights) Best Regards, Andy Dong + +Responses: +Hi Andy, Can you play with softCascadeTh and strongCascadeTh in object_detection.cfg and see if you get any detections? Try a lower value for both. Currently for VD its set at -2. Regards, Shyam + +Hi, sorry for late reply I change softCascadeTh and strongCascadeTh to -5 but it still not work when I run the usecase the sreen like below picture https://goo.gl/bbSHVa Regards, Andy Dong + +Hi Andy, Even if the classifier is not detecting anything, it should atleast display the video on the screen. What happens when you replace the weights back to the original one? Can you share your descriptor file? Regards, Shyam + +Hi, I had already tried to replace the weights(the original VD_weights) back and it work below is my descriptor drive.google.com/.../view Regards, Andy Dong + +Hi Andy, Your descriptor file looks correct to me. Unfortunately, the maximum number of cascade trees for "VD" type is 1280. In your descriptor, the number of cascade trees is 2048. So this could be the reason. Can you try using your descriptor in place of "PD"? For "PD" type the maximum number of trees is 2048. Regards, Shyam + +Hi, when I replace PD with boat weights , it works But I found something weird, it never happened before I change the weight the system become easily crashed when I do below steps 1. connect HDMI 2. start the system, choose 1: Single Camera Usecases -> f: 1CH VIP capture (HDMI) + FrontCam Analytic 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx,EVEx) + Display(HDMI) the boat wieghts works depend on doing step 2 -> step 1 Regards, Andy Dong + +Hi Andy, Let me connect you with one of our system experts. He might have an answer for you. Regards, Shya, + +Hi Andy let me try to understand Case1: if you follow below steps it works 1. start the system, choose 1: Single Camera Usecases -> f: 1CH VIP capture (HDMI) + FrontCam Analytic 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx,EVEx) + Display(HDMI) 2. connect HDMI Case2: But If you follow below steps it doesn't work for you 1. connect HDMI 2. start the system, choose 1: Single Camera Usecases -> f: 1CH VIP capture (HDMI) + FrontCam Analytic 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx,EVEx) + Display(HDMI) can you please confirm my understanding is right? regards, Shiju + +Hi,Shiju Yes, you are right. In Case2 the screen is like below picture https://goo.gl/bbSHVa Regards, Andy Dong + +Hello Andy Dong we have not noticed any such issue, the HDMI player we used works in both cases. I would doubt one thing with the player you use as it may be try to to EDID with board and it works only if you started the demo and connect the player later. As we support only 1080p @60 capture , please check if you have a way to force the player to output 1080p (1920x1080 @60fps), then I guess both case1 and case2 will work regards, Shiju + diff --git a/data2/text/range/0-5000/699806.txt b/data2/text/range/0-5000/699806.txt new file mode 100644 index 0000000000000000000000000000000000000000..fbd0d56cb56c4be5db8abe67bcac63912cdeb3b3 --- /dev/null +++ b/data2/text/range/0-5000/699806.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: Can C66 use multithreading to optimize performance + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Can C66 use multithreading to optimize performance and how to do ?? + +Responses: +Hi Shuai, The C66x core is essentially a single CPU. You can use TI RTOS for multithreading tasks on the single core but essentially they will be time multiplexed. If your idea is to run threads in parallel that would not be possible on the C66x. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/700085.txt b/data2/text/range/0-5000/700085.txt new file mode 100644 index 0000000000000000000000000000000000000000..b2a3ecaba42edbb2c7fadd701700d9c0c612ed3a --- /dev/null +++ b/data2/text/range/0-5000/700085.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 DDR data pin connection + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello Why in TDA2EVM , DDR data pin connection are not in sequence? for example: U65 DQ15(A3) connect to DDR_D14 , DQ14(B8) connect to DDR_D9? thank you + +Responses: +Hi, When interfacing TDA2 to DDR3, the DQ bits can be swapped within a byte lane to ease routing on the PCB. Thus, the EVM design routed DQ15(A3) to DDR_D14 and DQ14(B8) to DDR_D9 , etc. because these mappings alleviated the challenges of the PCB routing. Please note that DQ bit swapping can only be done within a byte lane. Best regards, Kevin + diff --git a/data2/text/range/0-5000/700101.txt b/data2/text/range/0-5000/700101.txt new file mode 100644 index 0000000000000000000000000000000000000000..540a80750266de700babd565e9b44f0e621f13ce --- /dev/null +++ b/data2/text/range/0-5000/700101.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: TDA2 EVM DDR VTT Enable + +Query Text: +Part Number: TDA2EVM5777 Hello Why the EVM connect the SPI1_CS1n(ball A22) to DDR VTT? is there any scenario to turn off VTT by SoC? thank you + +Responses: +Hi, Yes, this pin could turn off VTT during , thus saving power. I'm not aware if/how it is used in software. Hope it will be answered here soon. Regards, Stan + +Hi @user3829173, which SDK you use? Regards, Yordan + +Hi Yordan 01.09.00.00 thanks + +Hi Stan Got it! thanks + diff --git a/data2/text/range/0-5000/700470.txt b/data2/text/range/0-5000/700470.txt new file mode 100644 index 0000000000000000000000000000000000000000..d9a0e1cae3dd1bb38b3852c9752970a775bb9df4 --- /dev/null +++ b/data2/text/range/0-5000/700470.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS / TDA2：video format RCCC to YUV420SP + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, We using TDA2XX on our product and we have two question to confirm 1. Can we transform RCCC raw data to YUV420SP in TDA2 SOC? 2. We would like to integrate TIDL_OD and deep learning Lane Detection we develop. but if we transform the video format by using TDA2 SOC . Will it lead to has less computing power? + +Responses: +Cheng, I can answer part of the question. There is no hardware support for converting RCCC to YUV420, but you could have your own algorithm running on DSP/EVE to do this conversion. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/700475.txt b/data2/text/range/0-5000/700475.txt new file mode 100644 index 0000000000000000000000000000000000000000..1b5dd370270951242f43c6a4068dd0d1978df62e --- /dev/null +++ b/data2/text/range/0-5000/700475.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: TDA2 EVM XO_OSC1 + +Query Text: +Part Number: TDA2EVM5777 Hello I read from TDA2x_SR2.0 TRM that xi_osc1 frequency should be (19.2/32)MHz, but why osc in 516582H_VAYU_EVM_13NOV2015_H is 22.5792MHz? thank you + +Responses: +Hi, user3829173 (3829173), (19.2 ÷ 32) MHz means range from 19.2 to 32 MHz. So 22.5792 is within the range. Regards, Mariya + diff --git a/data2/text/range/0-5000/700528.txt b/data2/text/range/0-5000/700528.txt new file mode 100644 index 0000000000000000000000000000000000000000..ac13f0023f3fa63024b4c9119cfeb5e6da2ec5c8 --- /dev/null +++ b/data2/text/range/0-5000/700528.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: fail of a new use case + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, Our FAE told us a new flow below for our use case It's img file below but we got the error below Can you tell us where is wrong? BR Allen + +Responses: +Hi Allen , If you trace the error , the return of Draw2D_setBufInfo is SYSTEM_LINK_STATUS_EINVALID_PARAMS the function is defined in draw2d.c file Please go through the function and verify if all the required parameters are set fine . Regards Chetan.M + diff --git a/data2/text/range/0-5000/700555.txt b/data2/text/range/0-5000/700555.txt new file mode 100644 index 0000000000000000000000000000000000000000..fb34f987980caf50425f30631ab8ea38dece16bb --- /dev/null +++ b/data2/text/range/0-5000/700555.txt @@ -0,0 +1,8 @@ +Ticket Name: video input port(VIP) : connect camera number + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi， I have a question about the vip. the tda2x soc have some video input port, for example tda2xx have 3 video input port modules, and support for up to 10 multiplexed input ports, that means we can connect 10 cameras simultaneously? I want to be sure the max camera number we can connect. Thanks, Tianxing + +Responses: +You many not be able to connect all 10 comera to TDA2 because of pinmux limitations. For example some of the VIP pins are muxed with DSS pins. So kindly go through the device datasheet to check feasibility based on your board layout or usecase. + diff --git a/data2/text/range/0-5000/700668.txt b/data2/text/range/0-5000/700668.txt new file mode 100644 index 0000000000000000000000000000000000000000..a20c146e94c57333230124885492d0c84e4d97bc --- /dev/null +++ b/data2/text/range/0-5000/700668.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: Can't add log string to "bsputils_lvds.c" and display it + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, As title. I studying SerDes control from CSL of SDK v3.3. I add "Vps_printf()" at BspUtils_appConfSerDeSer() to output debug string and information to console port. (I'm sure system has run to BspUtils_appConfSerDeSer() of bsputils_lvds.c) I run the use case "2. Multi-Camera LVDS Usecases -> 1: 4CH VIP Capture + Mosaic Display -> 0: For Single channel mode". And I can see image has received from CAM1 of vision board and displayed to monitor but can't see debug string from console port. Maybe I call the wrong API. Could you give me some suggestion? Many thanks. Debug string as below: Int32 BspUtils_appConfSerDeSer(UInt32 devDrvId, UInt32 devInstId) { Int32 retVal = BSP_SOK; UInt32 serI2cDevAddr; UInt32 ovInstId; Vps_printf("Enter: %s\n", __FUNCTION__); ....Hiden..... Vps_printf("Exit: %s\n", __FUNCTION__); return (retVal); } + +Responses: +Hi Prince, can you check if this helps: e2e.ti.com/.../2531375 Regards, Yordan + +Hi Yordan, I will check first. Many thanks. + +Hi Sir, I find just call GT_xTrace() if want to output debug information from CSL layer. + +Hi Prince, GT Trace can be used in VPS drivers but not in CSL. Regards, Rishabh + +I see, thanks for your feedback :) + diff --git a/data2/text/range/0-5000/700794.txt b/data2/text/range/0-5000/700794.txt new file mode 100644 index 0000000000000000000000000000000000000000..1f70011d893fd5c860cf11e94f2e0e82f4b34883 --- /dev/null +++ b/data2/text/range/0-5000/700794.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: CMEM Error: init: major version mismatch between interface and driver. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, When i start to run opencv sample, i got following error. CMEM Error: init: major version mismatch between interface and driver. CMEM Error: needs driver version 0x4130001, got 0x4120000 TIOCL FATAL: The cmemk kernel module is not installed. Consult the OpenCL UserGuide at http://software-dl.ti.com/mctools/esd/docs/opencl/index.html i follow the step in VisionSDK_UserGuide_opencx.pdf How can i solve this problem? Thanks, Chen-Wei + +Responses: +Hi Chen-Wei, Did you followed chapter "2.4.2.1.1 Clone kernel" from VisionSDK_Linux_UserGuide.pdf to clone and checkout the correct version of cmem? (from other E2E threads with the same error it looks that this might happen because the userspace library that uses cmem is build against different version of cmem.ko module) Regards, Yordan + diff --git a/data2/text/range/0-5000/700952.txt b/data2/text/range/0-5000/700952.txt new file mode 100644 index 0000000000000000000000000000000000000000..60adebc11ddc51de73739747a43f5b3f6db1732b --- /dev/null +++ b/data2/text/range/0-5000/700952.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2 DDR3L Circuit Design Changes + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: X5777BXGABC We made the following design changes for the DDR3L circuit in the TDA2 DEMO board: 1. X5777BXGABC only use DDR1 interface, do not use DDR2 interface; 2. Two 8Gb @16bit DDR3 SDRAM: Changed the manufacturer, the chip specification is the same as the DEMO board, the frequency is up to 1066 MHz, and the rate is 1600MT/s; 3. A 2Gb @8bit DDR as an ECC extension: Changed the manufacturer, the chip's capacity is different from the DEMO board (DEMO board 4Gb, more than 2Gb with an A15 address line), the highest frequency of 1066 MHz, the rate of 1600MT/s 4. pcb layout with DEMO board Please ask: 1. Does the X5777BXGABC software need to be adapted? 2. What software is available for DDR3 board level calibration and stress test tools? + +Responses: +It is possible that the software needs to be modified. For instance, the DMM and MPU memory adapter settings will need to be modified such that only EMIF1 is accessed when read/write requests are initiated by the CPUs, especially if the two EMIFs were previously interleaved. In addition, a larger density memory on ECC will impact the refresh timing such as tRFC. However in this case, tRFC should be calculated based off of the 8Gb part attached to data, which appears to match the DEMO board. It is recommended that you confirm register settings using the EMIF tools .xls : http://www.ti.com/lit/zip/sprac36 For calibration of the DLL ratios, it is recommended that you use hardware leveling. Best regards, Kevin + diff --git a/data2/text/range/0-5000/700955.txt b/data2/text/range/0-5000/700955.txt new file mode 100644 index 0000000000000000000000000000000000000000..70b51317a929ca28d4dd0feba90e20ef80a98c22 --- /dev/null +++ b/data2/text/range/0-5000/700955.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: compiler Error : undefined + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, We create an new use case it is the flow below but when I do "gmake -s -j" it show the error below where should I define them? BR Allen + +Responses: +Hi Allen , In the sdk we support only one instance of file read hence the 2nd instance throws a error 2 file read is not tested in the sdk . Regards Chetan.M + diff --git a/data2/text/range/0-5000/700975.txt b/data2/text/range/0-5000/700975.txt new file mode 100644 index 0000000000000000000000000000000000000000..351660097e332060b46f1fc3fcff15fc582cb974 --- /dev/null +++ b/data2/text/range/0-5000/700975.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: On the optimization of tda2x + +Query Text: +Part Number: TDA2 The tda2x platform can Implementation pipeline between multiple cores, such as capture.....algorithm1(dsp1)->algorithm2(dsp2)->algorithm3(eve1 and eve2)......dispay frame(1) frame(2) -> frame(1) frame(3) -> frame(2) -> frame(1) frame(4) -> frame(3) -> frame(2) Is my idea feasible? Thanks! Mary + +Responses: +Hi Mary , is it that the same frame needs to be passed to alg 1 on dsp1 , alg 2 on dsp2 , alg 3 on eve1 , alg 4 on eve 4 and then to display . ? Yes it can be done , Regards Chetan.M + +Hi, Chetan.M Yes, same frame needs to be passed to alg 1 on dsp1 , alg 2 on dsp2 , alg 3 on eve1 , alg 4 on eve 4 and then to display. 1280x720*3 (RGB) size image, data transfer between different cores. such as from dsp(1) to eve(1), How long will it take? Thanks! Mary. + +Hi Mary, IPC latency between cores will be less than 1 millisec Regards Chetan.M + +Hi Chetan.M, Thank you very much for your reply Optimization method: 1. sparse matrix 2. floating-point to fixed-point ， Data aligned read and write 3. application instruction set 4. use DMA to external memory (SDRAM) data transmission to L2 5. single cycle, pipeline. The above is the optimization of DSP. Are there any other optimization methods besides these? How can EVE be optimized? thanks! Mary + +Hi Mary , Please close this thread and start another thread for optimization , DSP and EVE experts will help you out . You can also refer the the user guide and developer guide in docs folder for more details of components Regards Chetan.M + diff --git a/data2/text/range/0-5000/701398.txt b/data2/text/range/0-5000/701398.txt new file mode 100644 index 0000000000000000000000000000000000000000..0f13383b5605d801315c63b9f887becf32808ba5 --- /dev/null +++ b/data2/text/range/0-5000/701398.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: Can't find schematic of LVDS MCV board (6 channel FPD-Link III FMC SV600964 Daughter Board) . + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We are tracing LVDS setting from VPS of SDK v3.3 and need LVDS MCV schematic to refer. HW is TDA2 + vision board + FMC SV600964 Daughter Board. But we can't find FMC SV600964 Daughter Board schematic. Could you please tell us how to get it? Thanks. + +Responses: +Hi Sir, Seem like below link. support.spectrumdigital.com/.../Schematic Prints.PDF Could you please confirm for us? Thanks. + +Hi Prince, The schematics look correct. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/701916.txt b/data2/text/range/0-5000/701916.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d522ae86e81eef0f1f50568e83b0a74f0e86c4c --- /dev/null +++ b/data2/text/range/0-5000/701916.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: TDA2 QSPI flash size support + +Query Text: +Part Number: TDA2EVM5777 Hello I found the QSPI flash on the EVM is S25FL256SAGMFV001 what is the max qspi size TDA support? could I replace to "1 Gbit (128 Mbyte) S79FL01GS Dual-Quad SPI NOR Flash" ? thank you + +Responses: +Hi, You can access 128 MB QSPI flash in CFG mode. From L3's view only 64 MB is available to QSPI (0x5c00_0000 to 0x5fff_ffff) so the maximum QSPI memory that you can access in memory mapped mode at given point of time is 64 MB only. In case you want to connect 128 MB flash part and access the second 64 MB region then you need to configure the flash so that all accesses go to the second section of the flash. These settings are provided in the flash's datasheet. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/701946.txt b/data2/text/range/0-5000/701946.txt new file mode 100644 index 0000000000000000000000000000000000000000..c30be269ef2407b6b36a39c2d45cdc766eb5b1de --- /dev/null +++ b/data2/text/range/0-5000/701946.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: modify bootpart, mmcdev with uEnv.txt + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on TDA2Ex. To eMMC start, In the boot mode: => setenv bootpart 1:2 => setenv mmcdev 1 => saveenv The result is shown in Figure 1. To SD card start, In the boot mode: => setenv bootpart 0:2 => setenv mmcdev 0 => saveenv The result is shown in Figure 2. Fig1. eMMC start. Fig2. SD card start. I hope to modify bootpart, mmcdev with uEnv.txt. Do not need to enter the boot mode to manually modify. The contents of uEnv.txt are as follows: fdtfile=dra72-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" bootcmd=bootpart 0:2; mmcdev 0; uenvcmd=boot Orange is new add but it has not changed. Could you please give some suggestion here? Thanks in advance. + +Responses: +Hi, If i understand correctly, you are trying to automate booting either from eMMC or SD card, using the script uEnv.txt. Is that right? What priority/order do you want to set? Regards, Somnath + +Hi, Yes, using the uEnv.txt. sd card first, eMMC second. Thanks in advance. + +Hi, Please refer include/configs/ti_omap5_common.h 1. Modify the CONFIG_EXTRA_ENV_SETTINGS to include "emmc_linux_boot" as follows: "emmc_linux_boot=" \ "echo Trying to boot Linux from eMMC ...; " \ "setenv mmcdev 1; " \ "setenv bootpart 1:2; " \ "setenv mmcroot /dev/mmcblk0p2 rw; " \ You can add the above after the definition of "emmc_android_boot=" \ 2. And then, do the following: Change definition of CONFIG_BOOTCOMMAND: replace the following line "run emmc_android_boot; " \ by "run emmc_linux_boot; " \ This should solve your problem. Let me know if you have any further query on this? Regards, Somnath + diff --git a/data2/text/range/0-5000/701991.txt b/data2/text/range/0-5000/701991.txt new file mode 100644 index 0000000000000000000000000000000000000000..4cfd625d896f19a7f267562ccb39a10ba6bd563f --- /dev/null +++ b/data2/text/range/0-5000/701991.txt @@ -0,0 +1,30 @@ +Ticket Name: CCS/TDA2: CCS 7.4/ TDA2X EVM JTAG connection issue + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hello everyone. while connecting TDA2 EVM board with XDS560v2 STM TRAVELER emulator , JTAG connection is not detected. I have attached the log related to the issue: [Start: Spectrum Digital XDS560V2 STM TRAVELER Emulator_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/tiautomotive/.ti/ti/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 560/2xx-class product. This utility will load the program 'sd560v2u.out'. E_RPCENV_IO_ERROR(-6) No connection: DTC_IO_Open::dtc_conf Download failed for file /home/tiautomotive/ti/ccsv7/ccs_base/common/uscif/./././././xds560v2.out An error occurred while soft opening the controller. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-250' (0xffffff06). The title is 'SC_ERR_ECOM_EMUNAME'. The explanation is: An attempt to access the debug probe via USCIF ECOM has failed. [End: Spectrum Digital XDS560V2 STM TRAVELER Emulator_0] So i request you to look this issue & help us as soon as possible because of this our project is on hold. Regards Surbhi + +Responses: +Hi Surbhi, can you check this: software-dl.ti.com/.../ccsv7_debugging_jtag_connectivity_issues.html there are some guidelines how to debug JTAG connection problems. Regards, Yordan + +Hello, In addition to the above suggestion, make sure you have the dip switch sys-boot configured for debug mode. See thanks, Alex + +Hi Yordan, I have already gone through this : software-dl.ti.com/.../ccsv7_debugging_jtag_connectivity_issues.html the suggested tips, i tried. I also installed drivers for CCS. But didn't find any change in my issue (attached log earlier). So is, their is any issue with OS as i am using UBUNTU14.04. Regards Surbhi + +Hi, I have checked with the dip switch sys-boot & it too is configured for debug mode. I have followed the instruction mentioned in "PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/docs/UserGuides" section 3.4. thanks. Surbhi + +Hello, Just for clarification, are you creating a new target configuration and click "Test connection"? Is that when the error appear? Or are you trying to fire up the cores and connect to one of them? thanks Alex + +Also make sure you don't boot an OS or you won't be able to debug with Jtag, see my post from here: e2e.ti.com/.../2500613 thanks, Alex + +Hi Surbhi, Can you check if correct XDS560 emulator is selected in target configuration? One is supposed to be used through LAN and other through USB. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hello everyone, I have attached the image of JTAG which i am using for my project, & i have also checked for the correct XDS560 traveler emulator which is selected in target configuration. " Just for clarification, are you creating a new target configuration and click "Test connection"? Is that when the error appear? Or are you trying to fire up the cores and connect to one of them? " --> yes i have created the new target configuration & after that i have checked for the "Test connection" then that error (log is been attached earlier) occurs. --> As i thought it might be the issue of CCS, so i updated & re-installed the drivers for CCS. still that issue is there. Regards Surbhi + +OK, can you also try the suggested workaround here: thanks Alex + +Hello, I haven't heard back from you, I hope you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Thanks, Alex + +Hello, Yes, the issue was resolved. I simply uninstalled the CCS & again installed & updated it. It seems the issue was due to CCS. Thank you guys. Regards Surbhi + diff --git a/data2/text/range/0-5000/702104.txt b/data2/text/range/0-5000/702104.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7a5eb42790050676fa598ab8eea80590ae70fad --- /dev/null +++ b/data2/text/range/0-5000/702104.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: VisionSDK_UserGuide_TDA2px help + +Query Text: +Part Number: TDA2 I am following the VisionSDK_UserGuide_TDA2px.pdf and have difficulties building the application. I have downloaded CCS, A15, and the vision SDK and set up my environmental variable path to C:\ti\ti_components\os_tools\windows\xdctools_3_32_01_22_core. I am trying to follow step 4a. however I get the message "gmake: *** No rule to make target `depend'. Stop." I also don't see a "binaries" folder created in the vision_sdk file. What should I do ? + +Responses: +From which folder you are sending this command? it should be done from vision_sdk\build folder.. Rgds, Brijesh + +I sent it from the vision_sdk folder. In the user guide, it just says to do it from the vision_sdk directory. Is my environment variables set up correctly? + +Hi Sally, The environment variables look ok. You need to go to the path vision_sdk\build from windows command prompt and then invoke "gmake -s depend" command. Usually this path is C:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\build. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh, I am having a different error when I try to use the gmake command. + +Hi Sally, this happens when there is mismatch between installation path of A15 compiler and variable CODEGEN_PATH_A15 from "vision_sdk/build/tools_path.mk". You can rename the compiler path to "/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3" (by default when installed A15 compiler directory is named something like "4_9-2015q3") or modify the value of CODEGEN_PATH_A15 to match your path. Please check those threads for the same issue: e2e.ti.com/.../703809 e2e.ti.com/.../2545614 Regards, Yordan + +Hi Sally, It looks like windows limitation only (even though file present in installation path but still give an error file not found in the specified path) Refer below thread e2e.ti.com/.../2601535 Regards Surya + +Hi Sally, I am closing this thread as the issue is resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/702113.txt b/data2/text/range/0-5000/702113.txt new file mode 100644 index 0000000000000000000000000000000000000000..cdb7b50568f9dc33be19f5621d24dd3b50b0fdbf --- /dev/null +++ b/data2/text/range/0-5000/702113.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EVM5777: Linux Process CPU Affinity Isolation + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hello, I am running PROCESSOR_SDK_VISION_03_01_00_00 Linux running on the tda2evm5777 and I need to set all linux processes to a single A15 (A15_0), including and in particular, the ethernet driver. This is so I can expect less interrupts from Linux when running my own applications on the second A15 (A15_1) When I run the taskset command to set the cpu affinity for all of the processes in linux to go on A15_0, some processes do not change cpu affinity. I have tried isolcpus, but not all processes get changed to be on A15_0. How can I force all processes to be on A15_0, including the ethernet driver, so I can run my own program,on A15_1 and have those be the only things running in linux on that core? How can I set the ethernet driver to run only on A15_0? + +Responses: +Hi bulk of the packet reception and handling runs from interrupt context and bottom-half (softirq) context for networking. For this, you will need to set the interrupt affinity as in https://www.kernel.org/doc/Documentation/IRQ-affinity.txt Additionally the end application that generates/consumes the data also may need to be pinned - you can use cpuset to achieve this https://github.com/lpechacek/cpuset/blob/master/doc/tutorial.txt + diff --git a/data2/text/range/0-5000/702258.txt b/data2/text/range/0-5000/702258.txt new file mode 100644 index 0000000000000000000000000000000000000000..d47400f9505d28bcff71974f23f8a5392f62b4c9 --- /dev/null +++ b/data2/text/range/0-5000/702258.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Deep learning issue + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, My target is implement entire yolo network (at least tiny yolo) on TDA2. here is my question Q1. my current SDK vision is 3.0.0, should i use v3.03? Q2 could i implement it without TIDL, just like we create a new usecase? Q3. In TIDeepLearningLibrary_UserGuide.pdf, all step is based on windows and CCS. If we want to install it and build it on Linux and without CCS, What should we do? Thanks for your reply, Chen-Wei Lai + +Responses: +Hi, 1. It is always recommended to use the latest version as it could fix some issues found older versions. 2. Please post this question in a new thread as I am not expert to answer this question 3. TIDL does not build and run in Linux. Thanks, Praveen + diff --git a/data2/text/range/0-5000/702309.txt b/data2/text/range/0-5000/702309.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b481401e14ce480c8632bd006d67165baf261eb --- /dev/null +++ b/data2/text/range/0-5000/702309.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS / TDA2：TDA2xx eve platform Run TDA3 usecase by RTOS + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear All, I have tda2xx eve platform, how to run tda3xx RTOS usecase by tda2xx? + +Responses: +Hi Owen, What is the SW package you are using? Regards, Rishabh + +Dear Rishabh, i use sdk is PROCESSOR_SDK_VISION_03_03_00_00, i wnat to run tda3 3D avm by tda2xx eve platform + +Hi Owen, TDA3 surround view is based on in built ISP whereas TDA2xx supports GPU based surround view. You can refer to Vision SDK release notes for more details on demos that are supported on each platform. Regards, Rishabh + +Dear Rishabh, i know TDA2xx can support 3D AVM but its in linux base, i want to use RTOS base. Can use 3D AVM in RTOS base by tda2xx? + +Hi Owen, 3D surround view is not supported on TDA2xx. There is no ISP hardware in TDA2xx. TDA2xx does have a 2D surround view that use RTOS. Please refer to PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\src\rtos\usecases\lvds_vip_sv_standalone\. Regards, Rishabh + +Dear Rishabh, thank your information, i have one more question : can run linux base 3D in tda2xx(4CH VIP LVDS capture + 3D SRV (SGX/A15) + DISPLAY - Only HDMI 1080p display supported)? + +Yes this is correct. You can run linux based 3D surround view. Regards, Rishabh + +Dear Rishabh, Thank you + +Hi Owen, Kindly mark the post that answers your query as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/702317.txt b/data2/text/range/0-5000/702317.txt new file mode 100644 index 0000000000000000000000000000000000000000..8de1c93d240b8091b96d334d8bb235739dbaea56 --- /dev/null +++ b/data2/text/range/0-5000/702317.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: How to use TDA3 RTOS usecase by tda2xx eve platform + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear All, i have tda2xx eve platform, How to use TDA3 RTOS usecase by tda2xx eve platform? + +Responses: +Hi Owen, This question is asked here as well: e2e.ti.com/.../702309 Please don't start duplicate threads. Regards, Rishabh + diff --git a/data2/text/range/0-5000/702499.txt b/data2/text/range/0-5000/702499.txt new file mode 100644 index 0000000000000000000000000000000000000000..fe5d06380f597c6f6f58f3905f854e12eb9bb803 --- /dev/null +++ b/data2/text/range/0-5000/702499.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Classification model on TDA2X + +Query Text: +Part Number: TDA2 Hi, I am trying to run the classification model using object detection usecase. I replaced the NET_OD.BIN and PRM_OD.BIN with classification network and parameter. Based on the classification output from the model, I will change the position of box being drawn on the image. I am getting the pointer to the output of softmax buffer on ObjectDrawPlugin as follows: metaDataAddr = pCompositeBuffer->bufAddr[0][1]; //ChId 0 contains the image. bufferOffset = ((44+8)*4) + 4; // Due to the padding of 4 on the borders classPtr = ((UInt8 *)((char *)metaDataAddr)) + bufferOffset; But the classid I'm getting is not proper. How to get the classification output at the next layer? When I tried to run the model using TIDL FILE IO Usecase it dumped 2304 bytes instead of 44bytes(44 class model). Regards, Navinprashath.R.R + +Responses: +Hi, Are you getting proper Classid in the standalone setup? If not first we will try to fix this issue in the standalone. Thanks, Praveen + +Hi Praveen, I was able to run in the standalone mode in TIDL and the output dumped was proper. I am getting correct classid and only 44 bytes have been dumped. Regards, Navinprashath.R.R + +Hi Navinprashath, If you are getting proper output on standalone and not in VSDK, then I need to check this issue with VSDK team. Meanwhile can you check if you can see these 44 bytes of proper output anywhere in the VSDK dumped 2304 bytes. Thanks, Praveen + +Hi Praveen, I am able to resolve the issue in TIDL OD usecase. It seems to be a buffer handling issue from my side. I will check in TIDL FILE I/O usecase once again and update here. Regards, Navinprashath.R.R + diff --git a/data2/text/range/0-5000/702651.txt b/data2/text/range/0-5000/702651.txt new file mode 100644 index 0000000000000000000000000000000000000000..affe843b984c8b784b19455b71131b3e9a15d446 --- /dev/null +++ b/data2/text/range/0-5000/702651.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Some question about implement deep learning algorithm by ourselves + +Query Text: +Part Number: TDA2 Hi, I found that if we want to implement deep learning algorithm by ourselves, we must need to use TIDL. But if i implement it directly without TIDL, and just run it by CPU, it seems that i can't do this? I know that TIDL can help us accelerate the algorithm, but i just want to know that if i don't use this library and run on CPU can i implement my neural network on this board ? + +Responses: +Hi Chen-Wei, you can create new deep learning algorithm and integrate it in your usecase. You can check documentation at vision_sdk\docs to get idea how to add new links/chains and new usecases. But please note that if you implement your deep learning algorithm on CPU you might not get very good performance (for example TIDL runs on DSP or EVE which are better suited for such calculations). Regards, Yordan + +Hi Yordan, i have this question because i modify the original usecase, replace the original function(canny) with tiny-YOLO and get the following result So, i think maybe i can't implement it on CPU. I think the best way to solve this problem is creating a new usecase rather than modifying the original usecase right? Thanks for your reply, Chen-Wei Lai + +Hi Chen-Wei , I have pinged VisionSDK experts for further help. Regards, Yordan + +Hi Yordan, There is no further reply for so many days, should i keep waiting or just open another thread for this issue? Thanks, Chen-Wei Lai + +darket net is not suported by TIDL. You may create nw uses case with out using TIDl + diff --git a/data2/text/range/0-5000/702823.txt b/data2/text/range/0-5000/702823.txt new file mode 100644 index 0000000000000000000000000000000000000000..51e31107fe7b3f801305caa26fc4a5c3c50441eb --- /dev/null +++ b/data2/text/range/0-5000/702823.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: complie tda2xx_evm_linux_opencx error + +Query Text: +Part Number: TDA2 the error info ,is as flow: where i Can get ti/opencl/bin/x86/clocl ??? # Configuro done! # Making tda2xx-evm:ipu2:release:vision_sdk_lib... # Linking into /home/disk4/install_dir/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # # # /home/disk4/install_dir/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # ‘/home/disk4/install_dir/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h’ -> ‘/home/disk4/install_dir/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h’ # system: tda2xx-evm: Compiling system_ipc.c # osa: tda2xx-evm: Compiling osa_mem.c # osa: tda2xx-evm: Compiling osa_remote_log_client.c # osa: tda2xx-evm: Compiling osa_remote_log_server.c # system: tda2xx-evm: Creating archive system.a # osa: tda2xx-evm: Creating archive osa.a Compiling OpenCL file copy.cl make[7]: /home/disk4/install_dir/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found make[7]: *** [copy.dsp_h] Error 127 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 + +Responses: +Hi, you need to apply file system patch and clone some components. Please follow chapter "2.4.2.2.4 Opencl supported package" from VisionSDK_Linux_UserGuide.pdf. Regards, Yordan + +hello , i installed the opencl support package . but it still error. the error msg as follow: # links_a15_sgxFrmcpy: tda2xx-evm: Creating archive links_a15_sgxFrmcpy.a # links_a15_sync: tda2xx-evm: Creating archive links_a15_sync.a # osa: tda2xx-evm: Creating archive osa.a # system: tda2xx-evm: Creating archive system.a # links_a15_nullSrc: tda2xx-evm: Creating archive links_a15_nullSrc.a Compiling OpenCL file copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/disk4/install_dir/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/disk4/install_dir/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/disk4/install_dir/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure make[7]: *** [copy.dsp_h] Error 255 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 + +Hi, can you download ti-cgt-c6000_8.1.0 ( www.ti.com/.../8.1.0), place it under /ti_components/cg_tools/linux and add it to the path (export PATH=/bin:$PATH) and give a try? Regards, Yordan + +i sloved this problem , thanks a lot + diff --git a/data2/text/range/0-5000/702856.txt b/data2/text/range/0-5000/702856.txt new file mode 100644 index 0000000000000000000000000000000000000000..166becf09cc6afc201a816bfbd4c63f20e91d5cf --- /dev/null +++ b/data2/text/range/0-5000/702856.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ACD: DRA7x: How to boot from eMMC Boot Partitions (e.g. mmcblk1boot0/)? + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hello *! I'm not able to boot DRA7x (TDAX) from special eMMC bootloader partitions. I can create a vfat formatted partition on user-area of the eMMC, but this is suboptimal. Is there any possibility to boot from e.g. mmcblk1boot0 ? + +Responses: +Hi Marco, which SDK you use? Regards, Yordan + +Sorry, but what has the SDK to do with my question? We do not use any TI-SDK, because it's too far away from our requirements. My question was: Is it possible on DRA7x to boot from mmcblk1boot0 ? => First, this is a question of the ROM-Code capabilities in the Chip. Let me ask my question more clearly: Is the ROM-Code of DRA7x able to boot from the special "boot" partitions on an eMMC? + +Hi Marco, TDA2 supports these eMMC modes by ROM: • Raw (Boot): The booting image is read from one of the selectable partitions in raw mode (this mode is also called Alternative Boot Operation mode and applies to eMMC only). • Raw (UDA): The booting image is read from the user data area (eMMC and SD). • File system (FAT12/16/32 with or without master boot record): The image data is read from a booting file within a file system in the user data area (eMMC and SD). NOTE: File system mode is only supported when booting in the eMMC user area. It is not supported in the eMMC boot area. Regards, Stan + diff --git a/data2/text/range/0-5000/702859.txt b/data2/text/range/0-5000/702859.txt new file mode 100644 index 0000000000000000000000000000000000000000..45c0bd51ece216eb4cf5980a8ecd7d59bbde0751 --- /dev/null +++ b/data2/text/range/0-5000/702859.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: For the Development Boot Mode + +Query Text: +Part Number: TDA2 Tool/software: Linux For the Development Boot Mode We have learned that TDA's QSPI Development Boot Mode requires the resources of MMC/SD . As the following information: Only MLO and u-boot.img are stored in QSPI flash memory. DTB & uImage are stored in MMC/SD boot parition. The rootfs is mounted from MMC/SD partition 2 Please tell us whether NorFLASH or Nandflash Development Boot Mode also needs to possess MMC/SD resources? Where can I find this information? If we do not want to use the MMC/SD hardware to store booting-related content, how can we solve it? + +Responses: +Hi, Can you please check the following links if you haven't checked it already? processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide By default in our SDK, we don't support NOR boot mode on TI EVM h/w. Please refer processors.wiki.ti.com/.../Linux_Core_U-Boot_User's_Guide Also note that NAND bot mode is currently supported for DRA71x EVM. The Linux software on DRA71x EVM is portable on TDA2Ex EVM. Let me know if you have any follow-up questions? Regards, Somnath + +Hi， For The Development Boot Mode, The QSPI Development Boot Mode linked on the following page mentions that boot needs to use MMC/SD. Why can't it all be stored in QSPI? We use the TDA2S series。If We can't use QSPI storage alone, do you recommend independent storage with NAND flash or NOR flash? processors.wiki.ti.com/index.php + +Hi, The main reason why we use the production boot mode is when we need a faster kernel + App boot time. We get better throughput from a QSPI flash, if the kernel is stored there and also bypass the second stage of the boot process. However, this requires a bigger flash (bigger cost) depending upon the size of all the binaries you want to store in QSPI and what you want to quick start. You can store the Linux Fs in eMMC flash. And have your initial binaries (BL+ Kernel + f/w mages) stored in QSPI. Does that address your question? Regards, Somnath + +Our Linux Fs and initial binaries (BL+ Kernel + f/w mages) probably only need less than 30MB capacity, so we think it would be enough to choose a 64MB QSPI FLASH. In addition, if we use TI's vision library on a SOC like Parking line detection and MOD function, will it take up more resources of FLASH? + +yes, if you add more libs (like Parking line detection and MOD function) it will increases your firmware size, depends on the the code/data and const used in the libs + diff --git a/data2/text/range/0-5000/703077.txt b/data2/text/range/0-5000/703077.txt new file mode 100644 index 0000000000000000000000000000000000000000..1229d38df922711c9f8e401bcc0fae8be12606c2 --- /dev/null +++ b/data2/text/range/0-5000/703077.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: Problem of allocation of heap in core using Vision SDK + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: Code Composer Studio Hi, I'm using Vision SDK 3 for loading my program onto tda2x. At first, I could read necessary binary file and save it into memory during Use-case initailization proces. I guess it is contained in DDR heap memory. However, when I tried to allocate memory in DSP1 (C66) using malloc(), I got a message. ' ti.sysbios.heaps.heapmem line 221 out of memory: handle=.... size-.... ' How can I increase heap size in each core when I'm using Vision SDK? I tried to understand the memory mapping guide but it wasn't easy. I'm using A15, DSP1, DSP2 core to load program on them and sometime I may need to allocate large amount of heap memories during each program(Use-case). Thank you. + +Responses: +Hi , Please use Utils_memAlloc when allocating a larger buffer Regards Chetan.M + diff --git a/data2/text/range/0-5000/703169.txt b/data2/text/range/0-5000/703169.txt new file mode 100644 index 0000000000000000000000000000000000000000..33ad52d63b2ded2cabf659ee51c1343797a482ac --- /dev/null +++ b/data2/text/range/0-5000/703169.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h + +Query Text: +Part Number: TDA2 Tool/software: Linux /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.4.1-2017.05-x86_64_arm-linux-gnueabihf/lib/gcc/arm-linux-gnueabihf/5.4.1/include/arm_neon.h:31:2: error: #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h #error You must enable NEON instructions (e.g. -mfloat-abi=softfp -mfpu=neon) to use arm_neon.h this is my option CC_OPTS=-c -Wall -Warray-bounds -fPIC -pie -fPIE -march=armv7-a -mcpu=cortex-a15 -mfloat-abi=hard -mfpu=neon-vfpv4 how to solve this problem + +Responses: +Hi Shuai, As mentioned in the below e2e.ti.com/.../698674 Please look for compiler support As the required flags are passed to the compiler for SDK Regards Chetan.M + +Hi Chetan.M ok thanks! shuai + diff --git a/data2/text/range/0-5000/703304.txt b/data2/text/range/0-5000/703304.txt new file mode 100644 index 0000000000000000000000000000000000000000..94ea65558f2b08a44a296c24f28c85c11f7cade8 --- /dev/null +++ b/data2/text/range/0-5000/703304.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: TDA2 FPD link Fakra connector + +Query Text: +Part Number: TDA2EVM5777 Hello I saw the Fakra connector on the FPD link board as below CN15 is male Fakra, and is the CN16(NOPOP) female Fakra? we are finding the female Fakra connector,is there any vendor information of female Fakra? thank you + +Responses: +Hi, can you check here: www.rosenberger.com/.../fakra.php www.amphenolrf.com/connectors.html Regards, Yordan + diff --git a/data2/text/range/0-5000/703568.txt b/data2/text/range/0-5000/703568.txt new file mode 100644 index 0000000000000000000000000000000000000000..19d4e01bd9607068988a796f22602b979402b8b5 --- /dev/null +++ b/data2/text/range/0-5000/703568.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: TDA2xx The running effect of usecase is wrong + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi， My environment is PROCESSOR_SDK_VISION_03_02_00_00 , My configuration is tda2xx_evm_linux_all, and i run through NFS mode。 The first usecase-1 I created was： NullSource (A15) -> Decode -> Alg_FrameCopy (A15) -> VPE -> Display and it is running normally： But I modified usecase-2 based on usecase-1，the usecase-2 is: NullSource (A15) -> Decode -> Alg_FrameCopy (DSP1) -> VPE -> Display its running results are as follows: I just changed Alg_FrameCopy running on DSP1 core form A15 core. I want to running Alg_FrameCopy correct on DSP core. + +Responses: +Hi , Can you dump the video buffer after decoder and verify . Regards Chetan.M + +Hi Chetan.M, How can i dump the video buffer after decoder？ Which interface should I operate on? Regards Xie Baojian + +HI Chetan.M, Also want to ask about Which alg_plugins directory is running when i run the usecase-2？ I have add some printf info in the directory \vision_sdk\apps\src\hlos\adas\src\alg_plugins\framecopy and \vision_sdk\apps\src\rtos\alg_plugins\framecopy， But no printouts come out. Regards Xie Baojian + +where is the alg created , i mean which core, If its hlos (a15) then apps\src\hlos\adas\src\alg_plugins\framecopy if in other than a15 then apps\src\rtos\alg_plugins\framecopy To dump the frame you need to use ccs and halt in process function of the alg and dump the buffer regards Chetan.M + +Hi, Are you able to resolve the issue? Regards, Anuj + diff --git a/data2/text/range/0-5000/703591.txt b/data2/text/range/0-5000/703591.txt new file mode 100644 index 0000000000000000000000000000000000000000..0180880bf71d09abcce84f3a6313fe990582cb4b --- /dev/null +++ b/data2/text/range/0-5000/703591.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: EDA2x EVM CPU Board + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: X5777BXGABC, Hi, I was looking into the evaluation Board TDA2x EVM CPU Board. (Literature Number: SPRUI51) The Processor in the EVM CPU Board is X5777BXGABC ( Jacinto 6) which is not TDA2x (TDA2SG or TDA2P) Can I use the Schematics and Layout reference on This EVM as Reference Design for my Hardware PCB Schematics design? Are Both Pin To Pin, drive strength, thermal Compatiable? + +Responses: +Hi Lee, You are free to borrow good ideas from EVMs, however keep in mind that EVMs are designed to evaluate as much of SoC functions as possible. They are full of discrete logic and muxing which normally are not needed in a field design. X5777 is a pre-production, test device, therefore drive strength and thermal are not compatible with production devices. I think they are pin-to-pin compatible, but kindly check your TDA2's silicon revision pins in the respective datasheet. Or, use an EVM schematic with your silicon revision SoC. Regards, Stan + +Hi Stan, Just to verify , X5777 is a pre-production for TDA2? Presently, the system and software guys use the existing EVM CPU Board ( with X5777BXGABC) to test all the necessary features. The EVM is connected to 4 cameras. 1. If my HW is build with TDA2AG (I re- use the sDDR3 and VIP inputs as EVM ) will the system speed performance affected ? 2. The software can just port in to my TDA2AG Board without modification? + +Hi, Correct, X5777 timings, thermal, and performance are not all characterized and may not meet those of TDA2. This is an early silicon for software test. 1. Speed performance - as per TDA2AG datasheet. 2. I think yes. Provided that same TDA2 pins are used on the new board. Otherwise pinmux will need to be modified as required. Regards, Stan + diff --git a/data2/text/range/0-5000/703622.txt b/data2/text/range/0-5000/703622.txt new file mode 100644 index 0000000000000000000000000000000000000000..8ebe425dad7e416d558d1f065769ad52b67ced13 --- /dev/null +++ b/data2/text/range/0-5000/703622.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: New version of OpenCV library (v3.4.1) for Cortex A15 in TDA2x. + +Query Text: +Part Number: TDA2 Dear Sir, Vision SDK (and later PROCESSOR_SDK_VISION_03_03_00_00) contains OpenCV pre-built library for Cortex A15 and currently available version of OpenCV library is v3.1.0. Here are my questions: (1) There are two pre-built OpenCV v3.1.0 libraries, one is for Linux and the other is for SYS-BIOS. Does that mean thoseTI pre-built OpenCV library itself may call some OS-dependent specific software component? (2) Is there Open CV 3.4.1 pre-built library for Cortex A15 in TDA2x? If not, does TI have plan to support it? Best reagards. Mark. + +Responses: +Hi Mark Yes, TI has 2 separate pre-built OpenCV library, one is for Linux and the other is for SYS-BIOS. This is because on RTOS (BIOS) side we need a couple of additional patches and some OS dependent implementations. TI do not have any plans to support/migrate Open CV 3.4.1 Please use the current pre-built library of openCV. It will not be possible to support you on how to migrate/re-build it because the openCV support infrastructure is deprecated. regards, Shiju + diff --git a/data2/text/range/0-5000/703640.txt b/data2/text/range/0-5000/703640.txt new file mode 100644 index 0000000000000000000000000000000000000000..76d87039ced2ed0768429dd13935011cb004ce65 --- /dev/null +++ b/data2/text/range/0-5000/703640.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: TDA2x ADAS data flow -LVDS surround view could not output display + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, We would like to run the use-case via 4 LVDS cameras capture (OV10635 sensor) in Vision SDK to output display on TDA2X boards. But it outputs black screen even though burned prebuilt image(software-dl.ti.com/.../index_FDS.html) Could you help provide some suggestion to look into the problem? Thanks. BTW, my configuration: "tda2xx_evm_linux_all", why the default config (tda2xx_evm_linux_all/cfg.mk) is "no"? PROC_IPU1_0_INCLUDE=no PROC_IPU1_1_INCLUDE=no Could you also help teach me how to makeconfig for the use-case? Thanks. regards, Sam Hsieh + +Responses: + + +In case of linux we have moved code running on ipu 1_0 and ipu1_1 to ipu2 ipu2 operates in smp mode. Please check the pin settings of video conf to check why blan screen. Refer user guide Regards Chetan.M + +log_app.txtHi @Chetan.M I don't understand clearly how to migrate from ipu1 dual core to ipu2, and ipu2 operated in smp mode. Could you help instruct me how to configure it in details ? Thanks. As user guide descripted : modify the tda2xx_evm_linux_all/cfg.mk , Include: PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=yes PROC_IPU2_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes PROC_A15_0_INCLUDE=yes but it got the compilation failure which error message as attached: At the same time, I observed that the comment in cfg.mk file # IPU1 (core 0 & 1 are) not supported when IPU_PRIMARY_CORE=ipu2 Do you think whether if I need to modify the IPU_PRIMARY_CORE & IPU_SECONDARY_CORE ? BR, Sam Hsieh >>>>> Compilation failure /home/sam/ADAS/VISION_SDKv3_3/vision_sdk/build/rtos/makerules/rules_m4.mk:172: recipe for target '/home/sam/ADAS/VISION_SDKv3_3/visi 1877 make[6]: *** [/home/sam/ADAS/VISION_SDKv3_3/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_ipu_iva/tda2xx-evm/ipu2/release/ 1878 make[6]: Leaving directory '/home/sam/ADAS/VISION_SDKv3_3/vision_sdk/links_fw/src/rtos/links_ipu/iva' 1879 /home/sam/ADAS/VISION_SDKv3_3/vision_sdk/build/rtos/makerules/common.mk:235: recipe for target 'ipu2' failed 1880 make[5]: *** [ipu2] Error 2 1881 make[5]: Leaving directory '/home/sam/ADAS/VISION_SDKv3_3/vision_sdk/links_fw/src/rtos/links_ipu/iva' 1882 Makefile:19: recipe for target 'links_ipu_iva' failed >>>> + +In case of linux , IPU1_0 and ipu1_1 should be disabled . IPU2 is enabled . Your device has 2 dual core ipu hence in case of linux we enable the ipu2 as SMP . User need not change any configuration . Regards Chetan.M + +Hi @Chetan.M, It shows error message when configured "PROC_IPU1_0_INCLUDE=no" ERROR: IPU1_0 MUST be included in application: and I observed that "NEED_PROC_IPU1_0=yes" in vision_sdk/apps/src/rtos/usercases/lvds_vip_multi_cam_vie/cfg.mk. It seems like the configuration of use-case is conflict. Could you help correct me if there is any mistake in the configuration? Thanks. BR, Sam Hsieh + +Sam, These errors can be ignored , In case of linux IPU1_0 and ipu1_1 will not be used , it is disabled . Internally there are changes in the code which will run all the links created on IPU1_0 and ipu1_1 to ipu2 Regards Chetan.M + +Hi @Chetan.M, Thanks for your suggestion. I disabled IPU1_0 and IPU1_1, try to move the codes implementation from IPU1 to IPU2 then try to rebuild it. If there is any further update, I also post the result. BR, Sam Hsieh + +Hi @Chetan.M, I observed that there is some package (PDK) default core "ipu1_0" which configured in cfg.mk Then revise it by CORE=ipu2 But I still got the compiling failure when make links_fw_libs: make[5]: *** [arp32_4] Error 2 make[5]: Leaving directory '/home/sam/ADAS/VISION_SDKv3_3/vision_sdk/links_fw/src/rtos/links_common/system' Makefile:19: recipe for target 'links_common_system' failed make[4]: *** [links_common_system] Error 2 Could you help solve the compiler failure ? Thanks. BR,log_app_07_05_2018.txt Sam Hsieh + +Hello Sam Hsieh Can you please help me understand , You are trying to run the default usecase .? Please revert all the changes and do a build and run . Regards Chetan.M + +Hi @Chetan.M, I could rebuild successfully after refresh install all packages. including tda2xx_evm_bios_all and tda2xx_evm_linux_all usecase. But I don't why the compileration failure occurred, it perhaps I made a mistake in makerules. Thanks for your instruction. :) regards, Sam. + diff --git a/data2/text/range/0-5000/703672.txt b/data2/text/range/0-5000/703672.txt new file mode 100644 index 0000000000000000000000000000000000000000..3578b7a4e236d0593c81627abf982563dd150c30 --- /dev/null +++ b/data2/text/range/0-5000/703672.txt @@ -0,0 +1,37 @@ +Ticket Name: Linux/TDA2: TDA2xx Linux make install error + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear All, I have a problem, when i set make linux_install command have error ; this is my error, sdk vision: PROCESSOR_SDK_VISION_03_03_00_00 , felllow doc : VisionSDK_Linux_UserGuide.pdf log_tda2error.txt owen@owen-VirtualBox:~/Desktop/TDA2/Linux/vision_sdk/build$ make linux | grep "error" + WRAP tools/lib/libfdt/fdt_strerror.c + HOSTCC tools/lib/libfdt/fdt_strerror.o + CC lib/libfdt/fdt_strerror.o + CC spl/lib/libfdt/fdt_strerror.o + CC lib/fdt_strerror.o + CC [M] drivers/scsi/scsi_error.o +configure: WARNING: If you wanted to set the --build type, don't use --host. + If a cross compiler is detected then cross compile mode will be used. +owen@owen-VirtualBox:~/Desktop/TDA2/Linux/vision_sdk/build$ make linux_install | grep "error" +/bin/sh: 1: mkimage: not found +make[1]: *** [kernel_install] Error 127 +make: *** [linux_install] Error 2 +owen@owen-VirtualBox:~/Desktop/TDA2/Linux/vision_sdk/build$ make linux_install +make -C ./hlos/makerules/linux -f build_kernel.mk kernel_install +make[1]: Entering directory `/home/owen/Desktop/TDA2/Linux/vision_sdk/build/hlos/makerules/linux' +make -fbuild_kernel.mk kernel_build KERNEL_TARGET=modules_install INSTALL_MOD_PATH=/home/owen/Desktop/TDA2/Linux/vision_sdk/../ti_components/os_tools/linux/targetfs +make[2]: Entering directory `/home/owen/Desktop/TDA2/Linux/vision_sdk/build/hlos/makerules/linux' +make -C /home/owen/Desktop/TDA2/Linux/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm CROSS_COMPILE=/home/owen/Desktop/TDA2/Linux/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- modules_install +make[3]: Entering directory `/home/owen/Desktop/TDA2/Linux/ti_components/os_tools/linux/kernel/omap' + +Responses: +Hi Owen, it seems that the problem was caused by missing 'mkimage' program. Please follow chapter "2.2.3 Other mandatory software packages for build" from VisionSDK_Linux_UserGuide.pdf to install additional packages needed for Linux build. Regards, Yordan + +Hi Owen, The "mkimage" tool is built by "make uboot" If it still could not fix the issue, recommend you had better "make clean" and manually delete $INSTALL_DIR/vision_sdk/binaries/$(MAKEAPPNAME)/$(MAKECONFIG) then rebuilt it. BR, Sam Hsieh + +Dear Sam & Yordan, thanks ur information. i'm install sudo apt-get install u-boot-tools cansolve this problem + +Dear Sam & Yordan, thanks ur information. i'm install sudo apt-get install u-boot-tools cansolve this problem delete and rebuild, can ignored warning message or not? + +Hi Owen, As for solved by install u-boot-tools, remind you that compile successfully, not means that run ok. you had better to build it by the cross compiler (ARM) and refer to the Vision SDK(v03.03.00) Linux User Guide. BR, Sam Hsieh + +Dear Sam, I'm fellow sdk3.3.0 to build & run , thanks for your valuable suggestion. + diff --git a/data2/text/range/0-5000/703809.txt b/data2/text/range/0-5000/703809.txt new file mode 100644 index 0000000000000000000000000000000000000000..c8084727210b749d8c6729850769da18852b19df --- /dev/null +++ b/data2/text/range/0-5000/703809.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2: Vision SDK TDA2xx (v03.03.00) + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hello, I am referring to Vision SDK TDA2xx (v03.03.00) User Guide 2 System Requirements 2.1 Windows Installation 2.1.2.1 A15 Compiler, Linker The windows installer for the GCC ARM tools should be downloaded from below link launchpad.net/.../4.9-2015-q3-update The tools need to be installed under “/ti_components/cg_tools/windows/”. IMPORTANT NOTE: A15 Compiler and linker MUST be installed before proceeding else compile will fail. Also make sure the compiler is installed at the exact path mentioned above Observing error while creating dependencies as shown in log: --- $ gmake -s -j depend # makeconfig: Config is [ tda2xx_evm_bios_all ] # makeconfig: Output file is @ C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/sample_app/tda2xx_evm_bios_all/system_cfg.h # makeconfig: Input file is @ C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk # makeconfig: Generating header ... # makeconfig: Generating alg plugin config ... # makeconfig: Generating usecase config ... # makeconfig: Generating footer ... # makeconfig: Done !!! # # CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: A15_0 can be excluded from application # # CPUs that are required but not included in config [ tda2xx_evm_bios_all ], # # # Edit C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application # # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_init.c # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_basic.c process_begin: CreateProcess(NULL, C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_basic.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/sample_app/tda2xx_evm_bios_all -o C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_basic.oa15fg src/edma3_drv_basic.c, ...) failed. make (e=2): The system cannot find the file specified. --- Default installation creates a path: /ti_components/cg_tools/windows/4_9-2015q3 But the folder 4_9-2015q3 should be renamed to "gcc-arm-none-eabi-4_9-2015q3". This creates a path as: /ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3 With this new path, the command is working okay. Could you review, if this okay? Regards, KK + +Responses: +Hi KK, Renaming the directory to "gcc-arm-none-eabi-4_9-2015q3" is correct solution. You can check CODEGEN_PATH_A15 variable which is set to point to this path in file "vision_sdk/build/tools_path.mk". Regards, Yordan + +Hello Yordan, The information about the variable and the path is helpful. Thank you for confirming that rename is requried. Hope TI team will be info the users to rename to "gcc-arm-none-eabi-4_9-2015q3" in default user guide. Since the renaming is confirmed to be correct. I resolve the issue. Regards, KK + diff --git a/data2/text/range/0-5000/704385.txt b/data2/text/range/0-5000/704385.txt new file mode 100644 index 0000000000000000000000000000000000000000..d082dbe2542eecd1a5dbcceba44d298b2675904b --- /dev/null +++ b/data2/text/range/0-5000/704385.txt @@ -0,0 +1,105 @@ +Ticket Name: Linux/TDA2: Build first Linux set make –s –j have error + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear All, When I set make -s have this question how can solve? SDK: PROCESSOR_SDK_VISION_03_03_00_00_setuplinux 2742.Rules.make.txt # file name: Rules.make +# set up the build environment + +ifeq ($(vision_sdk_PATH), ) + +# +# Application to build for +# +# Supported Applications are: +# sample_app +# apps + +MAKEAPPNAME?=apps + +# +# Config to use +# +# Selecting a config selects the system config and modules to include +# in the build +# +# Edit the detailed config in file +# $(vision_sdk_PATH)/$(MAKEAPPNAME)/configs/$(MAKECONFIG)/cfg.mk +# +# Supported "out of box" configs are listed below +# - TDA2x Configs, +# tda2xx_evm_bios_all +# tda2xx_evm_bios_opencx +# tda2xx_evm_bios_radar +# tda2xx_evm_linux_all +# tda2xx_rvp_linux_all +# tda2xx_evm_linux_infoadas +# tda2xx_evm_linux_opencl +# tda2xx_evm_linux_opencx +# tda2xx_evm_robust_rvc +# +# - TDA3x Configs, +# tda3xx_alps_bios_radar +# tda3xx_evm_bios_all +# tda3xx_evm_bios_radar +# tda3xx_rvp_bios_all +# tda3xx_evm_bios_iss +# tda3xx_rvp_bios_iss +# +# - TDA2Ex Configs, +# tda2ex_17x17_evm_linux_all +# tda2ex_evm_bios_all +# tda2ex_evm_linux_all +# tda2ex_evm_linux_infoadas +# tda2ex_evm_robust_rvc +# +# - TDA2Px Configs, +# tda2px_evm_bios_all +# tda2px_evm_bios_radar +# tda2px_evm_linux_all +# tda2px_evm_linux_infoadas +# tda2px_evm_bios_iss +# +# +MAKECONFIG?=tda2xx_evm_linux_all + +# Default build environment +# Options: Windows_NT or Linux +BUILD_OS ?= Linux +ifeq ($(OS),Windows_NT) + BUILD_OS=Windows_NT +endif + +# +# Set BUILD_MACHINE to 32BIT as required, this is needed only +# if A15_TARGET_OS is going to be Linux +# +# Options: 32BIT or 64BIT +BUILD_MACHINE ?= 64BIT + +vision_sdk_RELPATH = vision_sdk +vision_sdk_PATH := $(abspath ..) + +# Application paths +$(MAKEAPPNAME)_PATH := $(vision_sdk_PATH)/$(MAKEAPPNAME) + +include $($(MAKEAPPNAME)_PATH)/configs/defaults.mk +include $($(MAKEAPPNAME)_PATH)/configs/cfg.mk +include $($(MAKEAPPNAME)_PATH)/configs/autorules_header_cfg.mk +include $(vision_sdk_PATH)/build/tools_path.mk +include $($(MAKEAPPNAME)_PATH)/configs/autorules_footer_cfg.mk + +endif + +include $(MAKERULEDIR)/build_config.mk +include $(MAKERULEDIR)/platform.mk +include $(MAKERULEDIR)/env.mk +include $(MAKERULEDIR)/component.mk + +export MAKEAPPNAME +export $(MAKEAPPNAME)_PATH +export MAKECONFIG + +Responses: +refer linux user guide 2.4.2.1.4 File system patch for Vision SDK Copy “install-extra.tar.gz” from $INSTALL_DIR/ti_components/os_tools/linux/kernel/linux-kernel-addon/fs-patches into $ INSTALL_DIR/ti_components/os_tools/linux/targetfs and untar tar –xvzf install-extra.tar.gz + +Hi Owen, thanks for updating the thread. Regards, Yordan + diff --git a/data2/text/range/0-5000/704519.txt b/data2/text/range/0-5000/704519.txt new file mode 100644 index 0000000000000000000000000000000000000000..95412a5f03ffd38119cc3224119136779ae9c343 --- /dev/null +++ b/data2/text/range/0-5000/704519.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: how does the four eve cores compute in parallel? and what does the link Alg_tidl_Dsp doing? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS + +Responses: +Each EVE core is running TIDL inference of SSD based objectedtion CNN network (expect the detection output layer). 4 images in parallel The last layer in the network ( detection output) layer is executed by DSP. For 4 images in sequentail. + +Thank you, Kumer, I have trained a small CNN network (based on JacintoNet, with less layers and channels), which can run in 40ms on a EVE core. As you recommended, the DetectionOut layer should run on the DSP, My use case is as follows, is it right? Thank you, Jianjun. + +Yes. This looks right + diff --git a/data2/text/range/0-5000/704537.txt b/data2/text/range/0-5000/704537.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0288b37cb097d6cc6c8fc7b30dd625078aa926c --- /dev/null +++ b/data2/text/range/0-5000/704537.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: TDA2xx Run in mnt mode， how to update the firmware + +Query Text: +Part Number: TDA2 Tool/software: Linux I run the apps.out by mount my virtual machine path to my board，and my Startup script is: ifconfig eth0 172.17.123.117 netmask 255.255.224.0 mount -t nfs -o nolock,nfsvers=3,vers=3 172.17.123.14:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs /mnt cd /mnt/opt/vision_sdk/ ./load_ocl_kos.sh source ./vision_sdk_load.sh ./apps.out and my SD card uenv.txt file is fdtfile=dra7-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" But Only usecase level changes can be displayed in this way. When I modify the file under the path \vision_sdk\apps\src\rtos\alg_plugins，My changes don't work. E.g I added the print does not come out。 But I put the folder under the path \ti_components\os_tools\linux\targetfs copy to the path of rootfs in SD card，My plus print can print it out. It seems that something compiled under alg_plugins is not mounted， or when the system is running, it didn't go to my mount path to find firware. I want that what I am modifying under the path can take effect by means of mounting. Because it takes too long to copy the targets folder to SD card every time. How should I do? + +Responses: +Please use nfs boot mode + +Hi, I have changed to nfs mode ， my uenv.txt file is： fdtfile=dra7-evm-infoadas.dtb args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.38:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' But in this mode i cannot log in the system， the info is ： | _ |__ __ __ _ | |__ __ |_|__ __| |_ | | | .'| . | . | | | | . | | | -_| | | |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root Login incorrect dra7xx-evm login: it report Login incorrect. Regards， Xie Baojian + +when you created the file system you have given full permission to the files within the filesystem . You need to give permission to targetfs folder alone. 2.4.2.1.4 Download and untar file system Download Linux file system tisdk-rootfs-image-dra7xx-evm_vsdk_3_4.tar.xz, from ti.com - http://softwaredl. ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html And keep under following directory $INSTALL_DIR/ti_components/os_tools/linux/targetfs Untar file system $> bash $> export INSTALL_DIR= $> cd $INSTALL_DIR/ti_components/os_tools/linux/targetfs $> chmod 777 ../targetfs NOTE: Only targetfs folder needs to have full permission not the files within $> tar xf tisdk-rootfs-image-dra7xx-evm_vsdk_3_4.tar.xz $> exit Regards Chetan.M + +Hello , Any updates on this thread Regards Chetan M + +Hi Chetan M, I am sure that i have done the 2.4.2.1.4 Download and untar file system， and have chmod 777 ../targetfs. and i have done env default -fa saveenv in uboot stage But it still cannot log in use root. Is it logged in with another account in the mnt mode? Regards, Xie Baojian + +No , This issue is seen if there are permission mismatch , Please retry with a new filesystem folder Regards Chetan.M + diff --git a/data2/text/range/0-5000/704578.txt b/data2/text/range/0-5000/704578.txt new file mode 100644 index 0000000000000000000000000000000000000000..620d5a196bb7d34e5a5cbd57d1bc374d6ddca34f --- /dev/null +++ b/data2/text/range/0-5000/704578.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2 DDR3 layout rule + +Query Text: +Part Number: TDA2 Hello I read from DM that routing specification about DDR the Table 8-51 mention the length between SoC & DDR3, but the unit is in ps. How to transfer the ps to mil ? thank you + +Responses: +Hi, can you check the answer in this thread for the same question: e2e.ti.com/.../611865 Regards, Yordan + diff --git a/data2/text/range/0-5000/704630.txt b/data2/text/range/0-5000/704630.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ed8dbbde4e19f43d9d104c73160ecb30a2367db --- /dev/null +++ b/data2/text/range/0-5000/704630.txt @@ -0,0 +1,63 @@ +Ticket Name: RTOS/TDA2: DCAN2 external loopback test mode stuck at Utils_dcanWaitForTxComplete() + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm using dcan example with tda2xx_evm_bios_all config on tda2xx evm board with Vision SDK (PROCESSOR_SDK_VISION_03_01_00_00). After turning on DCAN_INCLUDE(DCAN_INCLUDE=yes) in vision_sdk\apps\configs\tda2xx_evm_bios_all\ cfg.mk, dcan1 can be tested as expected in external loopback mode. In order to test dcan2, vision_sdk\apps\src\rtos\modules\dcan\utils_dcan.c is modified, since utils_dcan.c only support dcan1 . The modification can be seen bellow. But it seems that the dcan ISR is not entered, causing the code stuck at Utils_dcanWaitForTxComplete(). Is the modification correct? Did I miss some configuration? Thanks! --- utils_dcan_original.c 2018-06-14 18:05:18.280695070 +0800 ++++ utils_dcan_modified.c 2018-06-14 18:09:01.520685249 +0800 +@@ -121,7 +121,8 @@ +-#define UTILS_DCAN_INST (SOC_DCAN1_BASE) ++#define UTILS_DCAN_INST (SOC_DCAN2_BASE) + +@@ -553,7 +554,9 @@ + Utils_dcanWaitForIfReg(UTILS_DCAN_INST, UTILS_DCAN_TX_IF_REG); ++ Vps_printf("Utils_dcanWaitForTxComplete\n"); + Utils_dcanWaitForTxComplete(mbxIndex); ++ Vps_printf("Utils_dcanWaitForTxComplete done\n"); + + +@@ -1088,13 +1091,19 @@ + PlatformUnlockMMR(); + + /* Clock Configuration. */ +- PlatformDCAN1PrcmEnable(); ++ if(UTILS_DCAN_INST == SOC_DCAN1_BASE) ++ PlatformDCAN1PrcmEnable(); ++ else ++ PlatformDCAN2PrcmEnable(); + + /* Perform the DCAN pinmux. */ +- PlatformDCAN1SetPinMux(); ++ if(UTILS_DCAN_INST == SOC_DCAN1_BASE) ++ PlatformDCAN1SetPinMux(); ++ else ++ PlatformDCAN2SetPinMux(); + + /* Initialize the DCAN message RAM. */ +- PlatformDcanMessageRamInit(0); ++ PlatformDcanMessageRamInit(UTILS_DCAN_INST == SOC_DCAN1_BASE? 0 : 1); + } + + /** +@@ -1638,7 +1647,7 @@ + UInt32 cookie = 0; + const UInt32 intrId = dcanConfig.dcanCntrlIntrId; + +- IntXbar_connectIRQ(intrId, DCAN1_IRQ_INT1); ++ IntXbar_connectIRQ(intrId, UTILS_DCAN_INST == SOC_DCAN1_BASE? DCAN1_IRQ_INT1 : DCAN2_IRQ_INT1); + + /* Disabling the global interrupts */ + cookie = Hwi_disable(); +@@ -1785,6 +1794,7 @@ + ++ Vps_printf("dqy dcan: init can%d!!!\n", UTILS_DCAN_INST == SOC_DCAN1_BASE? 1 : 2); ++ PlatformDcanClkConfig(UTILS_DCAN_INST == SOC_DCAN1_BASE? 0 : 1); + + Utils_dcanPlatformInit(); + /* Register Crossbars and IRQ numbers */ + Utils_dcanConfigIntr(); + Dong + +Responses: +Hi Dong, Is it possible for you to take a dump of DCAN2 registers and DCAN2 message RAM? Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Dong, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/704912.txt b/data2/text/range/0-5000/704912.txt new file mode 100644 index 0000000000000000000000000000000000000000..756b891acfb3e98e81b2fb5f553ee1ffeeacbbbb --- /dev/null +++ b/data2/text/range/0-5000/704912.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2: Advantage and disadvantage using JTAG XDS110 vs XDS560v2 on TDA2 platform and other question. + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Dear TI, i am currently doing some development on this TDA2 EVM board and i am not sure which debugger kit is useful on it. Question 1) i found currently there are 2, XDS110 and XDS560v2 are you able to help to list the advantage over it? so i am able to decided which one to purchase over it. Question 2) is it a must to use the debugger in order to do programming onto the in EVM? + +Responses: +Hello Willson Toh59, Willson Toh59 said: Question 1) i found currently there are 2, XDS110 and XDS560v2 are you able to help to list the advantage over it? so i am able to decided which one to purchase over it. See my post here. It should give you guidance deciding over which jtag to buy. Willson Toh59 said: Question 2) is it a must to use the debugger in order to do programming onto the in EVM? Without Jtag, the CCS leverages and debugging options are very limited. Though, you should be able to use a UART console for example. Thanks, Alex + +Hi, In addition to what Alex said I would suggest you to prefer XDS560v2 over XDS100 during development phase due to considerable speed advantage while loading big applications on multiple CPUs. Regards, Rishabh + +Dear Rishabh So i other word i can still do the development by using the existing demo project to edit and re-compile and generate the MLO and Applmage and transfer it to the SDcard as well without the JTAG. I am correct? + +Hi Wilson, Yes this is correct. But you need JTAG in case you want to single step in order to debug. Regards, Rishabh + diff --git a/data2/text/range/0-5000/704913.txt b/data2/text/range/0-5000/704913.txt new file mode 100644 index 0000000000000000000000000000000000000000..8ce000b92bfb8d621e7847f017a1884e69c7d95f --- /dev/null +++ b/data2/text/range/0-5000/704913.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: a15 and c66 optimization which is faster for algorithm + +Query Text: +Part Number: TDA2 Tool/software: Linux The same algorithm was optimized in A15 (NEON multithreading) and C66 (data DMA to L2 and Instruction Optimization) respectively. The result is obviously fast on A15. Is this normal? C66 should be specialized in making algorithms faster. + +Responses: +Hi Shuai, can you check this answer by Jesse for a list of documents related to DSP optimization and see if you can improve the performance of your DSP algorithm: e2e.ti.com/.../2371691 Regards, Yordan + diff --git a/data2/text/range/0-5000/705002.txt b/data2/text/range/0-5000/705002.txt new file mode 100644 index 0000000000000000000000000000000000000000..cd53189b333478f92295d6ec31ea6071bd0ee553 --- /dev/null +++ b/data2/text/range/0-5000/705002.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2P functional safety + +Query Text: +Part Number: TDA2 As we know TDA2P-ACD pass ISO26262 ASIL B functional safety, if the product comply with ISO26262 ASIL B, which application notes for hardware and software design ? Could you please provide relevant functional safety documents to us? + +Responses: +Joseph, You can start with www.ti.com/.../sprui16a.pdf Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/705137.txt b/data2/text/range/0-5000/705137.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d4662e68a8af90f9c251202645fd9812c477750 --- /dev/null +++ b/data2/text/range/0-5000/705137.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: c66 how to save file + +Query Text: +Part Number: TDA2 Tool/software: Linux i am use PROCESSOR_SDK_VISION_03_02_00_00 ,in DSP link i want to save imgdata in a file FILE * landmarks_data = fopen("./handdata_dsp.txt", "wb"); but i cannot find the file , how to save file in DSP link? + +Responses: +Hi Shuai , As filesystem is in A15 , you will have to get the buffer to write to A15 using null in A15 and write the buffer. DSP Link | | DUP Link | | | | Orig path | | Null (a15) ( do file write here) Regards Chetan.M + diff --git a/data2/text/range/0-5000/705474.txt b/data2/text/range/0-5000/705474.txt new file mode 100644 index 0000000000000000000000000000000000000000..d519ed5a116deb1fa82ec34b60c2fc7385c775d4 --- /dev/null +++ b/data2/text/range/0-5000/705474.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: TDA2 PCB footprint + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I found package outline of TDA2 on the spec. But I don't know how to build a pcb footprint of it. Is there PCB recommend document? thank you + +Responses: +Hi, Here is the TDA2's PCB: www.ti.com/.../sprr209 Regards, Yordan + +Hello I have this PCB file. But the outline of TDA footprint is too big , the board space is too small to place all components in. If we don't need the 4 NPTH holes on the outline due to there is no necessary to put on the heat sink, what is the clearance "x" should be? thank you + +Hi, sorry for the delayed response. We are working on this and will update as soon as we have results. Regards, Yordan + +The CAD/CAE symbols are now available on the web at http://www.ti.com/product/TDA2/pinout-quality The .bxl file can now be downloaded from https://webench.ti.com/cad/dlbxl.cgi/TI_BXL/TDA2_ABC_760.bxl Let us know if that doesn't meet your needs. Regards, Kyle + diff --git a/data2/text/range/0-5000/705475.txt b/data2/text/range/0-5000/705475.txt new file mode 100644 index 0000000000000000000000000000000000000000..81d14851becfd5a96ce916b583f54d77400bf21a --- /dev/null +++ b/data2/text/range/0-5000/705475.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EXEVM: Object Detection on DSP + +Query Text: +Part Number: TDA2EXEVM Tool/software: Linux Dear Sir: Base on the usecase lvds_vip_single_cam_analytics inside VSDK 03_03_00_00, the Object Detection algorithm running on the DSP always needs the FPCompute output from the EVE processor. Is it possible to run the FPCompute on DSP? Does TI have any plane to move the FPCompute into DSP? If the EVE is necessary, it seems that the OD demo can not run on a DRA71x/72x EVM board Am I correct? Regards, /ckhsu + +Responses: +Yes EVE is necessary for OD demo. + diff --git a/data2/text/range/0-5000/705576.txt b/data2/text/range/0-5000/705576.txt new file mode 100644 index 0000000000000000000000000000000000000000..03005e3d796bbc1a3527d0f1ee873b6dcd0deb1a --- /dev/null +++ b/data2/text/range/0-5000/705576.txt @@ -0,0 +1,57 @@ +Ticket Name: RTOS/TDA2: Running a model on multiple cores + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I can not find the use of "coreID" on the vision sdk. I want to know when I read the NET.BIN and the PRM.bin, what is the role of the "coreID"? If I set the layersGroupId = 4, what's the mean on the vision sdk? Thank you. BR, Tianxing + +Responses: +Hi, This "coreID" is not used in VSDK for TIDL usecases, so you can ignore it. The "layersGropuId" is not a single value, it indicates group of layers in the net are processed together, so this parameter needs to be set for all the layers in the net. Please refer to config files in TIDL OD usecase + +Hi, Could I set the layer execute on the dsp or eve, when the tidl usecase run? Thank you. + +Hi, That depends on the use case, for TIDL OD usecase you can set all layers to run on EVE except Concat, Flatten and detectionOutput layers. How set this is shown in the import config files of SSD. Thanks, Praveen + +Hi Praveen, Could you give me a sample, thank you. BR, Tianxing + +Attached the sample import config file.. tidl_import_JDetNet.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 25 + +numParamBits = 8 +# 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 +inElementType = 0 + +inputNetFile = "..\..\test\testvecs\config\caffe_jacinto_models\trained\image_detection\jdetNet_768x320\deploy.prototxt +inputParamsFile = "..\..\test\testvecs\config\caffe_jacinto_models\trained\image_detection\jdetNet_768x320\ti-jdetNet_768x320.caffemodel" +outputNetFile = "..\..\test\testvecs\config\tidl_models\jdetnet\tidl_net_jdetNet_ssd.bin" +outputParamsFile = "..\..\test\testvecs\config\tidl_models\jdetnet\tidl_param_jdetNet_ssd.bin" + +rawSampleInData = 1 +preProcType = 4 +sampleInData = "..\..\test\testvecs\input\trace_dump_0_768x320.y" +tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" +layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 2 2 2 0 +conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + + + Thanks, Praveen + +Hi Praveen, If means that layer run on which core to be set by the layersGroupId of the config file, I see the 1 for EVE and the 2 for DSP? When I read the source code of tidlModelImport, the layersGroupId is assignment to coreID as follow: tIDLNetStructure.TIDLLayers[tiLayerIndex].coreID = gParams.layersGroupId[tiLayerIndex]; tIDLNetStructure.TIDLLayers[tiLayerIndex].layersGroupId = gParams.layersGroupId[tiLayerIndex]; On line 4161 of function caffe_import() Could I set the layers run on EVE1, EVE2 or DSP1, DSP2 by the layerGroupId. BR, Tianxing + +Yes, you can do that by assigning unique layersGroupId for each of the cores. For example, if you wish to run your network on two EVE and two DSP cores, then you can assign layersGroupId as follows.. 1 for EVE1, 2 for EVE2, 3 for EVE3, 4 for DSP. Please note that same mapping should used in running inference. Thanks, Praveen + +Hi Praveen, Thank you for your reply. What' s the mean that "same mapping should used in running inference"? That' s mean when I create chain, I should used the EVE1, EVE2, DSP1 and DSP2? Best Regard, Tianxing + +Yes. Thanks, Praveen + +Hi Praveen, However, I can't find the relationship between the config fie and sdk code. Best Regards, Tianxing + +Please refer to tidl and VSDK documents to better understanding. Also, search in the e2e forum you may get some more information you are looking for. Thanks, Praveen + diff --git a/data2/text/range/0-5000/705767.txt b/data2/text/range/0-5000/705767.txt new file mode 100644 index 0000000000000000000000000000000000000000..49cabceae8151c70f8ba480a47ff3c183c7fd581 --- /dev/null +++ b/data2/text/range/0-5000/705767.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: TDA2xx: null source decode display issue + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I using the SDK 3.03 version now How can I get the sizeBin.exe this tool? Is it exist in SDK 3.03? BR Allen + +Responses: +Please find attached. Remove .txt from the executable name. /cfs-file/__key/communityserver-discussions-components-files/791/5657.sizeBin.exe.txt + +hi, Prasad we can't get the executable file have other method can download it?or can you provide different resolution inData and inHeader BR Allen + +Hello Allen, Can you please try below? If this doesnt work i will upload on TI dropbox and share link. Thanks /cfs-file/__key/communityserver-discussions-components-files/791/2844.sizeBin.txt + +Hi, Prasad Yes I can download it but it look not like an executable file BR Allen + +Hi Allen, Please rename it to sizeBin.exe (the forum engine do not allow to attach .exe files) Regards, Yordan + diff --git a/data2/text/range/0-5000/706400.txt b/data2/text/range/0-5000/706400.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3715ad9d31e99802fe4aeed71f42436c3df984d --- /dev/null +++ b/data2/text/range/0-5000/706400.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS/TDA2: ddr l2 l1 Speed comparison + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio from spna165.pdf L1 cache 600 MHz L2 cache 300 MHz External memory~100 MHZ memory so i test this use the same function ,change site of the in put buffer and comparison use cycles this is the cmd -stack 0x4000 -heap 0x2000000 MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 L1D_SRAM : origin = 0x00F00000, len = 0x8000 /* 16 KB SRAM */ // L1D_CACHE : origin = 0x00F04000, len = 0x4000 /* 16 KB cache */ // L1D_CACHE : origin = 0x00F00000, len = 0x8000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x48000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ // L2_CACHE : origin = 0x00828000, len = 0x20000 /* Cache for L2, which is configured as 128 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x06000000 /* DSP Used cachable area */ EXT_MEM_heap : origin = 0x86000000, len = 0x02000000 /* DSP Used cachable area */ } SECTIONS { vectors :> EXT_MEM_CACHE .cio :> EXT_MEM_CACHE .bss :> EXT_MEM_CACHE ////usually reserves space for uninitialized variables .text :> EXT_MEM_CACHE //////contains executable code .cinit :> EXT_MEM_CACHE .const :> EXT_MEM_CACHE .far :> EXT_MEM_CACHE .fardata :> EXT_MEM_CACHE /////usually contains initialized data .neardata :> EXT_MEM_CACHE ///////usually contains initialized data .rodata :> EXT_MEM_CACHE .sysmem :> EXT_MEM_CACHE .switch :> EXT_MEM_CACHE .L2SramSect :> L2_SRAM .stack :> L2_SRAM .heap :> EXT_MEM_heap } input = (int *)0x00F00000; for L1 1300000 input = (int *)0x00800000; for L2 1300000 input = (int *)0x80000000; for DDR 12000000 result is L1 and L2 same DDR much more so problem is why L1 not faster than L2? + +Responses: +The cycles depend very much on what we are trying to do in the function. If you have to measure acutal cycles then you need to write a specific test case. For measuring L1D performance, 1. Partition L1D as SRAM and cache. 2. Declare an array of lengh (say 1KB) and pipe it to L1DSRAM using #pragma DATA_SECTION 3. Verify in .map file that array is piped to L1DSRAM section. 4. Write a function which reads the array in a loop and accumulate contents. Send the accumulated value as the return value of the funciton. 5. Profile the function. For measuring L2 performance, 1. Partition L1D and L2 as SRAM and cache. 2. Declare an array of lengh (say 1KB) and pipe it to L2SRAM using #pragma DATA_SECTION 3. Verify in .map file that array is piped to L2SRAM section. 4. Write a function which reads the array in a loop and accumulate contents. Send the accumulated value as the return value of the funciton. 5. Profile the function. For measuring DDR performance, 1. Partition L1D and L2 as SRAM and cahe. 2. Cache DDR space by setting appropriate MAR bits 3. Declare an array of lengh (say 1KB) and pipe it to L2SRAM using #pragma DATA_SECTION 4. Verify in .map file that array is piped to L2SRAM section. 5. Write a function which reads the array in a loop and accumulate contents. Send the accumulated value as the return value of the funciton. 6. Profile the function. Hope this shows the difference bettwen L1D, L2 and DDR performance. The performance can vary depending on L1D, L2 cache sizes and also if DDR cached or not. + +Have you confirmed that you can properly read/write proper data in L1 and L2? The reason I ask is because access to these is dependent on the configuration. For example, at reset, the L1D is configured as full cache. The L2SRAM is configured as full RAM. So unless you change the configuration, L1D is not accessible as memory mapped RAM. If you are seeing same for L1D and L2, it might be because the L1D access is not actually reading/writing to the L1D RAM. Without seeing your code, I can only ask the question. I would also expect the L1D access to be faster than the L2 access. + diff --git a/data2/text/range/0-5000/706734.txt b/data2/text/range/0-5000/706734.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d0257c773f113141c7609e49c13de76abbdc05f --- /dev/null +++ b/data2/text/range/0-5000/706734.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: For upgrading and booting + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: X5777BXGABC Tool/software: Linux Because the OTA function requires software to handle the bad block capability of NAND FLASH, Question 1:the TDA2 software supports the ability to store Linux Fs in NAND FLASH, right? Question 2: What is the flow diagram of the Ethernet OTA function on TDA2? + +Responses: +Hi Can you clarify the exact part number for your device. NAND flash is not supported out of the box for the Linux SDK For the Ethernet OTA function - is this being exercised from Linux? Liux SDK also does not support OTA functionality, customers typically build this on their own + +part number: X5777BXGABC But why is there a NANDFLASH on the (DRA74*) DEMO board? + +Hi for supporting NANDFLASH out of the box, we need to select pin mux configuration that overlaps with some of the peripherals that we would like to support out of the box from SDK perspective. Also, most customers use eMMC for their non-volatile storage needs - hence we have not enabled/validated support for NAND in our SDK releases + diff --git a/data2/text/range/0-5000/706851.txt b/data2/text/range/0-5000/706851.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa11636025620d8f10d2d9b6343c72442ed51f4c --- /dev/null +++ b/data2/text/range/0-5000/706851.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Facing issue while building Vision SDK 3.03 + +Query Text: +Part Number: TDA2 Tool/software: Linux While I trying to build vision SDK 3.03, we were getting the following errors, after following the steps of installation provided : system_gbm_allocator.c: In function 'gbm_wrap_native_buffers': system_gbm_allocator.c:175:9: error: implicit declaration of function 'gbm_surface_import' [-Werror=implicit-function-declaration] surf = gbm_surface_import(dev, ^ system_gbm_allocator.c:175:7: error: assignment makes pointer from integer without a cast [-Werror=int-conversion] surf = gbm_surface_import(dev, why? I have already tar the " install-extra.tar.gz” into $ INSTALL_DIR/ti_components/os_tools/linux/targetfs . using tar –xvzf install-extra.tar.gz Thanks and regards. ^ + +Responses: +Hi Jacinda, Can you send me this file from your targetfs? /usr/include/gbm/gbm.h Regards Surya + +Hi Surya I have solve this problem. Thanks and Regards Jacinda + +Good to hear that issue is resolved Could you please post how you solved the issue ? It will help others Regards Surya + diff --git a/data2/text/range/0-5000/707418.txt b/data2/text/range/0-5000/707418.txt new file mode 100644 index 0000000000000000000000000000000000000000..4fdcf2db05ca42e712aa35b225aba4d3557a28f6 --- /dev/null +++ b/data2/text/range/0-5000/707418.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Windows CCS failed to connect to the board through the emulator + +Query Text: +Part Number: TDA2 Tool/software: Linux hi, Windows CCS failed to connect to the board through the emulator， the error info is ： The explanation is: The controller has detected a target power loss. The user must turn-on or connect the power supply for the target. How to solve the problem of power loss? + +Responses: +Can you make sure the board is powered correctly, also power cycle it? Can you try first the "Test connection" option while creating the target configuration first? Thanks, Alex + diff --git a/data2/text/range/0-5000/707490.txt b/data2/text/range/0-5000/707490.txt new file mode 100644 index 0000000000000000000000000000000000000000..16dae018b6604711e3ebc541122fb58e0736e779 --- /dev/null +++ b/data2/text/range/0-5000/707490.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: SSD based TIDL OD use case in Vision SDK with pre-trained model + +Query Text: +Part Number: TDA2 Hi, In this thread https://e2e.ti.com/support/arm/automotive_processors/f/1021/p/689617/2542976?tisearch=e2e-sitesearch#pi320098=2 It said (original use case had only 4 classes, but this new model as 21 classes) so it need to change like below File : vision_sdk\apps\src\rtos\alg_plugins\objectdetection\objectDrawLink_algPlugin.c Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1)%3; How to decide which class you want to detect in TDA2x ? The original have 21 classes , TDA2x only can detect 4 classes If I don't want to detect car 、pedestrian、traffic sign How can I do to choose 4 classes in the other 17 classes ? Best Regards, Andy Dong + +Responses: +Hi Andy Dong, It is not that TIDL will not detect 21 classes, TIDL usecase can detect 21 classes but can only display first four classes. So, you can train a model to have your interested 4 classes or have them as first 4 classes. Thanks, Praveen + +Hi, Praveen 1. Is there a way to show another 4 classes not just the first 4 classes ? 2. Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1)%3; the output of this line will be 0~3 ( 0~2 ? ) Is the number match classes with 0~3 or just mean it can display 4 classes ? If output be 4~7 , is it possible to display another 4 classes not the first 4 classes ? 3. How can I do to display more than 4 classes on TIDL usecase ? Thanks! Andy Dong + +Hi, Is there any updates ? Thanks Andy Dong + +Hi Andy, To answer your questions, let me start with explain what below line of code will do, >> Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1)%3; This modulo 3 is because, currently VSDK supports only four colour codes for display. This means it can display all the 21 objects but can use only 4 colours as below, Class 0, 4 , 8... uses first colour Class 1, 5, 9... uses second colour Class 2, 6, 10..uses third colour Class 3, 7, 11... uses the fourth colour coding. Hope this explanation answer all your questions. Thanks, Praveen + diff --git a/data2/text/range/0-5000/708105.txt b/data2/text/range/0-5000/708105.txt new file mode 100644 index 0000000000000000000000000000000000000000..b447e22e48f63c046fd3adc90138cb8443953347 --- /dev/null +++ b/data2/text/range/0-5000/708105.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS/TDA2: CCS Load test_eveMedianFilter.eve.out no response + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi， I load the test_eveMedianFilter.eve.out in the path of \PROCESSOR_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\apps\median_filter\test\elf_out by the windows CCS， But it is nothing printed out，and Resume Button No change to green. But My colleague's machine is able to run and print out, and his Resume Button is green after load. What is wrong with my environment? + +Responses: +Hi, Have you followed all steps to load and run the binary on CCS as mentioned in evesw_getting_started.pdf? Before loading the binary you should reset the EVE core, let me know if you have done this step? Regards, Anshu + +Hi I have solved this problem ， I forget to modify the config file. Thanks, Xie Baojian + diff --git a/data2/text/range/0-5000/708145.txt b/data2/text/range/0-5000/708145.txt new file mode 100644 index 0000000000000000000000000000000000000000..b062b42dde0c53c68fdf48afbb7820c5afaf0a53 --- /dev/null +++ b/data2/text/range/0-5000/708145.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2EX17EVM: I want to start system from USB like SD card,what should I do? + +Query Text: +Part Number: TDA2EX17EVM Tool/software: Linux Hi: Now the EVM board can start from SD card normally.But I want to start from USB now,So what should I do? 1.Which usb port should I insert USB into？USB1 or USB2 port? 2.If the EVM board can detect USB,where will it be mounted after bringing up? + +Responses: +Hi, TDA2 ROM bootloader does not support loading SBL from an USB pen drive. Regards, Stan + +Hi, But I find that it can boot linux from USB storage in the Linux Core U-Boot User's Guide P14, + +Yes, this should be possible, but first you need to load SBL/u-boot from different source. Regards, Stan + +Hi Stanislav: So you mean SBL/u-boot should be located in SD or emmc,and kernel can be loaded from USB device? And another question is that my custom board cannot detect USB device.After it comes into Uboot,the log is as following: => usb reset resetting USB... USB0: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus 0 for devices... Kyle:tries == MAX_TRIES error!!! cannot reset port 1!? 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found In EVM board,I find that there is a signal called DET_USB2_VBUS.Does the TDA2 will detect the signal? I also want to know how EVM board will detect USB device after I excute "usb start" ,which signals does EVM will detect? Thanks ! + +HI, Could you help to answer my question? + +HI, Sorry,I still have some questions to ask you! + +Hi, Do you observe the 5 volts on the USB connector after usb initializes? + +Yes, I measure VBUS's voltage,it will become 5V from 0V + +Hi, It is possible to boot direct using USB. Note there are 2 stages as described in the link: http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User's_Guide#Using_USB_Device_Firmware_Upgrade_.28DFU.29:1230:0 . In the above method, the TDA2x EVM is configured as USB device and the PC is the USB host. As mentioned previously in the above thread, alternative to this is to boot the SBL/U-Boot using other boot mode (like SDcard), and then connect USB pen-drive to load the kernel. Here we trying to configure TDA2x EVM is configured as USB host which interacts with the device (USB pen-drive). See this link for more details: http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User's_Guide#Booting_Linux_from_USB_storage This answers the original question of this post. The subsequent question on the " cannot detect USB device" when calling "usb reset" is being discussed here: https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/711806 . + +HI, Thanks for your reply!Because I realized that the question "cannot detect USB device" is different from the original question,so I create another thread.Could you help to answer my new question on e2e.ti.com/.../711806 . Kyle + diff --git a/data2/text/range/0-5000/708176.txt b/data2/text/range/0-5000/708176.txt new file mode 100644 index 0000000000000000000000000000000000000000..78cf488590ae2762f7c344386f6e5bfc457db981 --- /dev/null +++ b/data2/text/range/0-5000/708176.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: DDR address signal swapping rules + +Query Text: +Part Number: TDA2 Hello TDA2 support DDR DQ pin swap for better PCB routing, But the address also can be swap? What is swap rule? Thank you + +Responses: +Hi, Address pins cannot be swapped because they are used to program the DDR Mode Registers. Only data pins can be swapped and they can only be swapped within a byte. As an example, DQ0 could be swapped with any of the pins DQ1 - DQ7. Best regards, Kevin + diff --git a/data2/text/range/0-5000/708182.txt b/data2/text/range/0-5000/708182.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e062a59d7e474619c262ddd25f07141203f2c12 --- /dev/null +++ b/data2/text/range/0-5000/708182.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Error in building tda2pxx vision sdk + +Query Text: +Part Number: TDA2 Hi, I am building TDA2PXX vision sdk but i am getting the following error: Nothing to be done for tda2px a15_0 bsp_uart Nothing to be done for tda2px a15_0 bsp_mcspi /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[2]: *** [depend] Error 2 gmake[1]: *** [links_fw_depend] Error 2 gmake: *** [depend] Error 2 C:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\build> I have followed each and every step in vision sdk user guide. I have tried many approaches to fix the above error but i am still getting it. Regards Mayank + +Responses: +Hi Mayank, Can you run build command "gmake depend" without -s & -j and share ? Note: gmake path should point to xdc path under ti_components (run where gmake & confirm) Regards Surya + +Hi Surya, Thanks for your mail. Please find below the output after running the command suggested by you. C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/rm -rf C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2px_evm_bi gmake -fMAKEFILE.MK HeaderCORE=ipu1_0 header ; gmake -fMAKEFILE.MK HeaderCORE=ipu1_1 header ; gmake -fMAKEFILE.MK HeaderCORE=ipu2 header ; gmake -fMAKEFILE.MK HeaderCORE=a15_0 header ; gma gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[2]: *** [depend] Error 2 gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' gmake[1]: *** [links_fw_depend] Error 2 gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build' gmake: *** [depend] Error 2 C:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\build> Regards Mayank + +Hi Mayank, There could be 2 issues 1. gmake path is incorrect 2. windows 8191 characters limitation 1. set gmake path on cmd prompt where you are building vision_sdk set PATH=C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;%PATH% 2. From logs, I can see few characters are missing, In such case try git bash to build C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/rm -rf C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2px_evm_bi gmake -fMAKEFILE.MK HeaderCORE=ipu1_0 header ; gmake -fMAKEFILE.MK HeaderCORE=ipu1_1 header ; gmake -fMAKEFILE.MK HeaderCORE=ipu2 header ; gmake -fMAKEFILE.MK HeaderCORE=a15_0 header ; gma gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/src/rtos' /bin/echo: not found gmake[3]: *** [header] Error 127 Regards Surya + +Hi Mayank, If the issue is resolved, Can we close this thread ? Regards Surya + diff --git a/data2/text/range/0-5000/708212.txt b/data2/text/range/0-5000/708212.txt new file mode 100644 index 0000000000000000000000000000000000000000..3173dda1993b9c651e3e0b46a061e5c95dbe52a0 --- /dev/null +++ b/data2/text/range/0-5000/708212.txt @@ -0,0 +1,52 @@ +Ticket Name: Linux: USB 3.0 device tree configuration + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi, We have custom tda2px board and want to enable USB 3.0 in device tree. This is schematic for USB module: I have 5V on VBUS on CN8. Is everything ok with schematic? If everything is ok which changes should I implement in device tree to enable this module? Regards, Suzana Komarcevski + +Responses: +Hi Suzana, One little comment about the schematic - USB2.0 data pins also need an ESD protection. Regards, Stan + +Hi Suzana, Few questions: Looking at the schematics, it has the USB-A 3.0 receptacle. So we assume you are planning to have the USB Host mode functionality only. Is that correct? To comment on the device tree entries, Can you tell us which TI SDK release version are you using/referring. So that we can point you to the correct file to refer? Thanks, Praveen + +Hi Praveen, Yes, you are correct. We are planning to have host mode functionality only. We are using PROCESSOR_SDK_VISION_03_03_00_00. Thanks, Suzana + +Hi Suzana, I am assuming that along with the PROCESSOR_SDK_VISION_03_03_00_00,you are using one of the TI Linux SDKs to run the Linux OS on the A15 core. If this is correct, then the device tree files can be found in the the Linux Kernel path ./arch/arm/boot/dts. Please identify the correct dts files to use for your platform. Please refer the vision sdk release documentation for this information. For USB1 DT entry example: Refer to dra7.dtsi file - Search for the section start with line: omap_dwc3_1: omap_dwc3_1@48880000 { The only change required for your case is: dr_mode = "host"; Thanks, Praveen + +Hi, I made following change in dra76-evm.dts but usb device is not detected: &usb1 { dr_mode = "host"; }; When I plug in usb 2.0 (4GB) this is the output of lsusb and lsblk commands: Do I need to set USB1_DRV_VBUS as GPIO in oreder to get 5V output? Do I need to use extcon driver? Regards, Suzana + +Suzana, In your initial post you said: "I have 5V on VBUS on CN8. ". Did you mean "I don't have..."? + +Stanislav, I have 5V when I change muxmode for USB1_DRV_VBUS to 14. Sorry, my mistake, I did not explain well. + +Suzana, The default muxmode 0 for USB1_DRVVBUS is sufficient to get the VBUS ON. Once the USB1 is configured in host mode, the usb1_drvvbus line is asserted such that it enables the external charge pump/power switch. There is no need to configure it is as GPIO (muxmode 14). In your case, extcon driver is not need. This is only required if there is a need for vbus detect and/or ID detect logic. In the attached schematics we does not see that this is present. Since your need is to have the USB1 is host mode only, this is not necessary. For more detailed undersanding, please refer the "Figure 24-142. SuperSpeed USB Controller Application: USB3.0 DRD" of the TDA2 TRM. Regarding the usb device not getting detected , have you made sure that the clock and power to the USB2 PHY are properly taken care? Can you share the kernel log by running "dmesg"? Thanks, Praveen + +Praveen, I refered to Linux_kernel _path/arch/arm/boot/dts/dra72-evm-common.dtsi and made similar changes in dra76-evm.dts: extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + +&dra7_pmx_core { + gpio6_pins: gpio6_pins { + pinctrl-single,pins = < + 0x280 (PIN_OUTPUT_PULLUP | MUX_MODE14) + >; + }; +}; + +&gpio6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio6_pins>; +}; + +&omap_dwc3_1 { + status = "okay"; + extcon = <&extcon_usb1>; +}; + +&usb1 { + dr_mode = "host"; +}; This resolved my issue. From your previous post I conclude that this is the wrong way but it works in my case, so my question is should I leave it like this or not? Thanks, Suzana + +Suzana, Good to know that the issue is resolved. Would like to leave the decision to you if you want to go with this or analyze further why this works. In case, you are happy with the resolution, suggest you to close this thread. Thanks, Praveen + diff --git a/data2/text/range/0-5000/708263.txt b/data2/text/range/0-5000/708263.txt new file mode 100644 index 0000000000000000000000000000000000000000..16bcbf1ad73089da70558b221066835c4908c114 --- /dev/null +++ b/data2/text/range/0-5000/708263.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: TDA2SXBTQABCRQ1 + +Query Text: +Part Number: TDA2 We are using SOC TDA2SXBTQABCRQ1 in our ADAS project. Could you please provide AVS voltage (typ, min & Max), current and power dissipation for all voltage rails. Camera Interface: 4 Camera 4XDe-Serializer data format: 1280X800@30fps YUV422 BT.656 format 1XSerializer: LVDS out 1024X768@30fps RGB888 Please find the attached document to know the operating frequency for all the core. + +Responses: +Hi Raja, the attached documents is not visible, can you try to reattach it? Regards, Yordan + +TDA2SXBTQABCRQ1.pdf Hi Yordan, Please check now. + +Hi Raja, they are visible now. I have pinged power experts to comment. Regards, Yordan + +Hi Yordan, Thanks. Actually this information is blocking the PI simulation. If possible please provide ASAP. + +Raju, For the AVS values for the different OPPs: The AVS voltages are device-dependent, voltage domain-dependent, and OPP-dependent. They must be read from the STD_FUSE_OPP. For information about STD_FUSE_OPP Registers address, please refer to Control Module Section of the TRM. The power supply should be adjustable over the following ranges for each required OPP: – OPP_NOM for MPU: 0.85 V - 1.15 V – OPP_NOM for CORE and Others: 0.85 V - 1.15 V – OPP_OD: 0.885 V - 1.15 V – OPP_HIGH: 0.95 V - 1.25 V The AVS voltages will be within the above specified ranges For the power dissipation based on the usecase, can you please post this question with your TI contact? We can help you evaluate the power dissipation through the private forums. Thanks and Regards, Piyali + +Hi Piyali, Thanks. I will request power dissipation to our TI contact. I need exact min, Typ and Max voltage for all the cores. Is it possible to provide these values If I share STD_FUSE_OPP Registers settings? Kind Regards, Raja + +Hi Raja, The min and max is as per the data manual information I had shared in the earlier post. I see from the picture of the table you are looking at OPP_HIGH configuration. The min for all rails for OPP_HIGH is 0.95 V, the max for OPP_HIGH is 1.25 V. The distribution is usually like a gaussian bell curve, so the "typ" value is concentrated near the mid point of these two values. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/708303.txt b/data2/text/range/0-5000/708303.txt new file mode 100644 index 0000000000000000000000000000000000000000..a9a4e2814d7e7cf5a2d509291d1fb63dc9f64aa5 --- /dev/null +++ b/data2/text/range/0-5000/708303.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Error in building TestAppOmap4 from ivahd_h264enc_02_00_09_01_production package + +Query Text: +Part Number: TDA2 Hi I am trying to build the TestAppOmap4 from ivahd_h264enc_02_00_09_01_production package but i am getting the following error: C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\codecs\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\build\TestAppOmap4\make>gmake -s deps Scaning dependencies... process_begin: CreateProcess(NULL, del /f libs.dep, ...) failed. make (e=2): The system cannot find the file specified. Some_path/Local/Temp/make10828-1.sh: 1: Syntax error: "(" unexpected gmake: *** [deps] Error 2 I am following the instructions as mentioned in H264_Encoder_HDVICP2_UserGuide.pdf for build steps. Please help in resolving the issue. Regards Mayank + +Responses: +Hi Mayank, I Hope all the environmental variable setting done as mentioned in ReleaseNotes. from path : \h264enc\app\build\TestAppOmap4\make gmake -s -k clean gmake -s -k deps gmake -s -k all -> This will build the TestAppEncoder.out @ ..\h264enc\app\build\TestAppOmap4\out I have verified building this at my setup. + +Hi Prasanth, Thanks for your reply. After executing the commands you have listed in your mail i got the following output: C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\codecs\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\build\TestAppOmap4\make>gmake -s -k clean process_begin: CreateProcess(NULL, del /f alg_control.PP alg_create.PP alg_malloc.PP buffermanager.PP h264enc_ti_config.PP h264enc.PP H264EncRmanConfig.PP H264EncTest.PP h264enc_ti_trace.PP t libs.dep, ...) failed. make (e=2): The system cannot find the file specified. C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\codecs\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\build\TestAppOmap4\make>gmake -s -k deps Scaning dependencies... C:/Users/magarwa1/AppData/Local/Temp/make2336-1.sh: 1: Syntax error: "(" unexpected gmake: *** [deps] Error 2 C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\codecs\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\build\TestAppOmap4\make>gmake -s -k all Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\alg_control.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\alg_create.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\alg_malloc.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\buffermanager.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\h264enc_ti_config.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\h264enc.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\H264EncRmanConfig.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\H264EncTest.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\h264enc_ti_trace.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\InterruptVecTable.obj] Error 127 Compiling C:ticgtoolsbinarmcl: not found gmake: *** [..\..\..\..\app\Build\TestAppOMAP4\Obj\h264e_host_scalingmatrix.obj] Error 127 gmake: Target `all' not remade because of errors. C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\codecs\ivahd_h264enc_02_00_09_01_production\packages\ti\sdo\codecs\h264enc\app\build\TestAppOmap4\make> Regards Mayank + +Hi Mayank, I will let Prashant look into this further. However, my two cents is that the "/" does not seem to be taking effect in your case. Notice "C:ticgtoolsbinarmcl" Thanks and Regards, Piyali + +Hi Mayank, Please check the environmental variables(said in the release notes) are set correct and the paths set have taken effect. + +Hi, Thanks Prashanth and Piyali.I am able to build now. Regards Mayank + diff --git a/data2/text/range/0-5000/708306.txt b/data2/text/range/0-5000/708306.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c8680b307b434f1bd77b0b4e23997aa586035da --- /dev/null +++ b/data2/text/range/0-5000/708306.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: #pragma DATA_SECTION (L2SRAM,"DSP1_L2_SRAM_ADDR"); + +Query Text: +Part Number: TDA2 Tool/software: Linux i add my algorithm code in (vision_sdk\sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c ) ,after copy do my algorithm. but int BUFFER_SIZE = (1024 * 1024 * 20 * sizeof(char)); failed canot get buffer. another problem is #pragma DATA_SECTION (L2SRAM,"DSP1_L2_SRAM_ADDR"); warning: creating output section "DSP1_L2_SRAM_ADDR" without a SECTIONS specification Does this warning need to be ignored? + +Responses: +Hi, Please refer to the below threads to get more idea about #pragma DATA_SECTION e2e.ti.com/.../277661 e2e.ti.com/.../773554 Regards, Anuj + +Hi: Anuj then how about int BUFFER_SIZE = (1024 * 1024 * 20 * sizeof(char)); //3M is OK g_pBuffer = (unsigned char *)malloc(BUFFER_SIZE); i try to get buffer in vision_sdk\sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c Alg_FrameCopyProcess function but failed! cloud you give me some advice? BESTWISHES! shuai + +Hi, You are trying to allocate a large memory using malloc which is not correct. Please use Utils_memAlloc() API to allocate large buffers. Regards, Anuj + +Hi Anuj in ccs this is my CMD , #pragma DATA_SECTION (L2SRAM,".L2SramSect"); is successful! -stack 0x4000 -heap 0x2000000 MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 L1D_SRAM : origin = 0x00F00000, len = 0x4000 /* 16 KB SRAM */ L1D_CACHE : origin = 0x00F04000, len = 0x4000 /* 16 KB cache */ // L1D_CACHE : origin = 0x00F00000, len = 0x8000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x48000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ // L2_CACHE : origin = 0x00828000, len = 0x20000 /* Cache for L2, which is configured as 128 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x06000000 /* DSP Used cachable area */ EXT_MEM_heap : origin = 0x86000000, len = 0x02000000 /* DSP Used cachable area */ } SECTIONS { vectors :> EXT_MEM_CACHE .cio :> EXT_MEM_CACHE .bss :> EXT_MEM_CACHE ////usually reserves space for uninitialized variables .text :> EXT_MEM_CACHE //////contains executable code .cinit :> EXT_MEM_CACHE .const :> EXT_MEM_CACHE .far :> EXT_MEM_CACHE .fardata :> EXT_MEM_CACHE /////usually contains initialized data .neardata :> EXT_MEM_CACHE ///////usually contains initialized data .rodata :> EXT_MEM_CACHE .sysmem :> EXT_MEM_CACHE .switch :> EXT_MEM_CACHE .L2SramSect :> L2_SRAM .stack :> L2_SRAM .heap :> EXT_MEM_heap } but in the SDK #pragma DATA_SECTION(L2SRAM, ".bss:taskStackSection") it have some problem ,,follow is the log [HOST] [DSP1 ] 91.979930 s: wordWidth2: DMA: height2 CH (TCC) = 192 (576) [HOST] [DSP1 ] 91.980021 s: L2SRAM: DMA: L2TMP CH (TCC) = a16646e0 (a85.545478] omap-iommu 40d01000.mmu: iommu fault: da 0x20202020 flags 0x0 [ 85.622270] remoteproc1: crash detected in 40800000.dsp: type mmufault [ 85.628923] omap-iommu 40d01000.mmu: 40d01000.mmu: errs:0x00000002 da:0x20202020 pgd:0xed514808 *pgd:px00000000 616c6e0) [ 85.639260] remoteproc1: handling crash #1 in 40800000.dsp (TCC) = 84600000 (84600000) [HOST] [DSP1 ] 92.229488 s: ppu8Plane[0]: DMA: height4 C (TCC) = 8448b000 (576) [HOST] [DSP1 ] 92.229518 s: wordWidth42: DMA: height42 CH (TCC) = 192 (576) [ 85.653811] remoteproc1: recovering 40800000.dsp [ 85.681217] omap_hwmod: timer5: _wait_target_disable failed [ HOST] [HOST ] 92.359635 s: SYSTEM: IPC: [DSP1] Notify recfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 92.359665 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 92.359665 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 92.359665 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! i dont know what is problem mean! BESTWISHES! SHUAI + +Hi Anuj get buf is like this? g_pBuffer=Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_LOCAL,BUFFER_SIZE,32); BESTWISHES shuai + +Hi Anuj g_pBuffer=Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_LOCAL,BUFFER_SIZE,32); have ERROR out of memory: handle=0xa1561ab0, size=20971520 BESTWISHES shuai + +Hi Shuai, Please try this g_pBuffer=Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR,BUFFER_SIZE,32); And in the below line your buffer size is 20M not 3M int BUFFER_SIZE = (1024 * 1024 * 20 * sizeof(char)); //3M is OK Please replace the 20 with 3. Regards, Anuj + diff --git a/data2/text/range/0-5000/708316.txt b/data2/text/range/0-5000/708316.txt new file mode 100644 index 0000000000000000000000000000000000000000..aa46048fbace42dfffcaf0db5eb51d9fb98e2656 --- /dev/null +++ b/data2/text/range/0-5000/708316.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: cannot print inf + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: Linux i add my algorithm code in (vision_sdk\sample_app\src\rtos\alg_plugins\mycode.c ) make is pass , in frameCopyAlgoLocalDma.c i add Vps_printf(" wordWidth: DMA: height CH (TCC) = %d (%d)\n", pAlgHandle->frameCopyObj.maxWidth,pAlgHandle->frameCopyObj.maxHeight ) is done, but in mycode.c i use Vps_printf never print anything! + +Responses: +Please add a sleep after the print and see if it appears Regards Chetan.M + +Hi Chetan.M but sleep is undifined, Regards shuai + +Hi, Use Task_sleep() Regards, Anuj + +Hi: Anuj I use Task_sleep(),but undefined symbol Task_sleep , i have add #include #include Regards, shuai + +Hi, I did not understand your question. if you are getting any compilation error then please take a refrence of a file where TAsk_sleep has been used. Regards, Anuj + +Hi:Anuj Task_sleep() is undefined , What header should be included？ Regards, Shuai + +#include Regards, Anuj + diff --git a/data2/text/range/0-5000/708405.txt b/data2/text/range/0-5000/708405.txt new file mode 100644 index 0000000000000000000000000000000000000000..c304c2808a5a866cafdc7d709dad9915f2abf9b1 --- /dev/null +++ b/data2/text/range/0-5000/708405.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: TDA2xx rvp: Null source + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear All, We are working on TI TDA2X (Both RVP and EVM). So far: 1. Able to run "apps" use cases. 2. Able to run "sample_app" config use case. i.e The "sample_apps" i.e. from file of /vision_sdk/sample_app/src/rtos/* has "NullSource -> Alg_FrameCopy (DSP1) ->Display" We are able to see the "TI logo" in the center of the HDMI output display. Question: Where is the nullsource center "TI logo" frame buffer or source buffer? We tried to look into the links of nullsrc i.e. links_fw/src/rtos/links_common/nullSrc/nullSrcLink_tsk.c but not much progress could be made. Need your support in explaining the "NullSource" input buffer and where is the buffer filled for the first time. Knowing this would help us to give our own predefined test scenario buffer data. Regards, KK + +Responses: +Ti Logo is included as a static array from the following header file #include Regards Chetan.M + +Hello Chetan, The information was helpful, I see that : null_src_display/chains_nullSrcDisplay.c 223 static Void fillSrcBuf(chains_nullSrcDisplayObj *pObj) 224 { ... 236 status = System_linkControl( 237 pObj->NullSourceLinkID, 238 NULL_SRC_LINK_CMD_GET_BUF_INFO, 239 &getBufInfoPrm, 240 sizeof(NullSrcLink_GetBufInfoParams), //==> where is this destination buf created? 241 TRUE); 244 for (bufCnt = 0;bufCnt < getBufInfoPrm.numBuf;bufCnt ++) 245 { 262 offset = (logoStartY * NULLSRC_OUT_WIDTH) + logoStartX; 263 dstAddr = (UInt8*)((UInt32)pVideoFrame->bufAddr[0] + offset); //==>destination buffer address. 264 srcAddr = tiLogo_640_224; //==> This is where it is used as a source .. 283 Cache_wb(); //==> What is the role of this? 294 } 295 } Thanks, KK + +Hi KK, Please find answers below: Que 1 : where is this destination buf created? destination buffers has been created by the Null_src link at the create time. In line no 240 its a size of buffer information structures. by calling the api at line 236 with the given params its asking the link about how many no of buffers has been created and information of all buffers. Que 2 : destination buffer address. this is the destination address from where the Ti logo will start. Que 3 : This is where it is used as a source Yes that is the address of source buffer. Que 4 : What is the role of this? this api is called to write back the cache data on the ddr so that it will be shown to other cores as well. Regards, Anuj + +Thanks Anuj, The information was helpful and understood Q2 , Q3, Q4. Que 1 : where is this destination buf created? "its asking the link about how many no of buffers has been created and information of all buffers." Q 1.1. Which source file should we refer to understand the NullSource link. Q1.2. If design needs to change the Number of buffer and the size of the buffer, where/what is the procedure? Thanks for the support, Regards, KK + +Hi, Q 1.1. Which source file should we refer to understand the NullSource link vision_sdk\links_fw\src\rtos\links_common\nullSrc\ vision_sdk\links_fw\include\link_api\nullSrcLink.h Q1.2. If design needs to change the Number of buffer and the size of the buffer, where/what is the procedure This things you need to change in usecase file (vision_sdk\apps\src\rtos\usecases\null_src_display\chains_nullSrcDisplay.c) check the implemetation of this function chains_nullSrcDisplay_SetAppPrms() Please go through the below doc for more information vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf Regards, Anuj + +Hello Anuj, Information about the SetAppPrms and document is helpful. I will read through the document and will get back if still there are some questions. Thanks, KK + diff --git a/data2/text/range/0-5000/708594.txt b/data2/text/range/0-5000/708594.txt new file mode 100644 index 0000000000000000000000000000000000000000..99226d50910bede4a40c097fc18d21a8adeee274 --- /dev/null +++ b/data2/text/range/0-5000/708594.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Running a model on multiple cores + +Query Text: +Part Number: TDA2 Need more clarification on this: From Previous Conversation: Yes, we can do that by assigning unique layersGroupId for each of the cores, let's say 1 for EVE1, 2 for EVE2, 3 for EVE3 and 4 for DSP. Note that this layersGroupIds 1 for EVE and 2 for DSP is just an example, you can assign any unique layersGroupId and same mapping should used in running inference. Query: How to map it? Where i need to define it 1 for EVE1, 2 for EVE2, 3 for EVE3, 4 for EVE4, 5 for DSP1 and 6 for DSP2. Regards, Sagar + +Responses: +Hi Sagar, We had explained about this in the user guide of TIDL latest release (REL.TIDL.01.01.01.00). Refer to FAQ 21 and 22 in the user guide, where the example considered only two cores but it can be applicable to any number of cores. Thanks, Praveen + +No. It is not explained in the UserGuide, not the case which i am referring. I am quoting your reply from previous conversation https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/685827 : "Yes, we can do that by assigning unique layersGroupId for each of the cores, let's say 1 for EVE1, 2 for EVE2, 3 for EVE3 and 4 for DSP. Note that this layersGroupIds 1 for EVE and 2 for DSP is just an example, you can assign any unique layersGroupId and same mapping should used in running inference." Please Consider following Example (first few layers on EVE1 and next few layers on EVE2 and last layer on DSP1): Layer 1 : EVE1 Layer 2: EVE1 Layer 3: EVE2 Layer 4: EVE2 Layer 5: DSP So, while importing this model I will update import config file layersGroupId = 1 1 2 2 4 Is this right ? How 4 will be identified as to use DSP. Because, in the current version of TIDL layersGroupId 1 means EVE and layersGroupId 2 means DSP. Regards, Sagar + +>> So, while importing this model I will update import config file >> layersGroupId = 1 1 2 2 4 >> Is this right ? Yes. This is right. >> How 4 will be identified as to use DSP. Because, in the current version of TIDL layersGroupId 1 means EVE and layersGroupId 2 means DSP This is not correct, that is just an example. We need to mention in infer config as below to run on EVE1, EVE2 and DSP to run above configuration, 1. Set layersGroupId = 1, runFullNet = 0 in the infer config file for EVE1, this will execute only layer1 and layer2 on this core. 2. Set layersGroupId = 2, runFullNet = 0 in the infer config file for EVE2, this will execute only layer3 and layer4 on this core. 3. Set layersGroupId = 4, runFullNet = 0 in the infer config file for DSP, this will execute only layer5 on this core. So, this layersGroupId is just a number to map between import and inference. So, number used in import for specific layers will run together on that specified core. Thanks, Praveen + diff --git a/data2/text/range/0-5000/708658.txt b/data2/text/range/0-5000/708658.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a6ba84e33ae7a5dace85df5f4aebe69aa3dfd59 --- /dev/null +++ b/data2/text/range/0-5000/708658.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/TDA2: Bit-stream input files for running NullSrc, Decode and Display UC of VSDK Linux + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, We are using the standard TDA2 RVP image and execute the network use cases. We are able to capture and stream the RAW/YUV and MJPEG format to TDA2 RVP board. Now we would like to execute H246 format. Found the related ticket and H246 binary "streams_1920x1080/1920x1080_00.h264" at "e2e.ti.com/.../693296" We are able to see the video using VLC with H246 demux. On TDA2 RVP: Selected: " 2: Network RX + Decode + Display (TDA2x ONLY)" On PC tool side exectued command: ./network_tx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29171 --verbose --files ./streams_1920x1080/1920x1080_00.h264 We are getting following errors: [IPU1-0] 407.492954 s: DECLINK:ERROR in Declink_jpegDecodeFrame.Status[-1] [IPU1-0] 407.507350 s: DECODE: ERROR: ALGPROCESS FAILED (status=0xffffffff) !!! [IPU1-0] 407.507472 s: DECLINK:ERROR in Declink_jpegDecodeFrame.Status[-1] [IPU1-0] 407.569389 s: DECODE: ERROR: ALGPROCESS FAILED (status=0xffffffff) !!! [IPU1-0] 407.569541 s: DECLINK:ERROR in Declink_jpegDecodeFrame.Status[-1] [IPU1-0] 407.588696 s: DECODE: ERROR: ALGPROCESS FAILED (status=0xffffffff) Please let us know how to execute the H246 data steaming. Thanks, KK + +Responses: +KK The streams that you used is meant for below Vision SDK Linux UC 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) for Bios based file read from SD card or Network, you need the .hdr file in binary format. so I would suggest you to first try 4: 1CH VIP Capture + Encode + Network TX (TDA2x ONLY) get the bit stream files stored on PC, use this files to run 2: Network RX + Decode + Display (TDA2x ONLY) regards, Shiju + +Hello Shiju, Thanks for the information, As mentioned, I am able to work with YUV and MJPEG. Out test trials can be found in ticket: e2e.ti.com/.../707133 Is H246 support available in BIOS or only in Linux? Regards, KK + +Hi KK H264 is available on both VSDK Bios and Linux regards, Shiju + +Hello Shiju, Thanks for the information, Could you provide steps to test the H246 (receive and transmit) on BIOS. Thanks, KK + +Hi KK please refer VisionSDK_UserGuide_NetworkTools.pdf regards, Shiju + +Hello Shiju, We read through the doc vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_NetworkTools.pdf We have info about RAW/YUV/MJPEG, which we have tested okay, We were not able to find H246 (Tx and Rx)details, let us know the section or the procedure. Thanks, KK + +KK please refer the UC under \vision_sdk\apps\src\rtos\usecases\network_rx_tx how run is explained in VisionSDK_UserGuide_NetworkTools.pdf regards, Shiju + +Hello Shiju, UC tried under \vision_sdk\apps\src\rtos\usecases\network_rx_tx are: 1. networkRxDisplay 2. networkRxDecDisplay 3. networkTxCapture 4. networkTxEncCapture Dec and Enc uses MJPEG format. All this are working okay, please refer to link : e2e.ti.com/.../707133 We did not find H246 in doc of VisionSDK_UserGuide_NetworkTools.pdf. Could you please guide us Thanks, KK + +since the discussion is in progress, it is not yet resolved. + +Hi KK You are right the Network UC 2. networkRxDecDisplay only support MJPEG decode as of today. But the FW support both H264 and MJPEG, its only a matter of modifying the UC to use H264. Please modify 2. networkRxDecDisplay UC to use H264 instead of MJPEG Please refer another UC \vision_sdk\apps\src\rtos\usecases\vip_single_cam_view_encdec, file name" chains_vipSingleCam_EncDec_Display.c to know how you can configure H264 code. regards, Shiju + diff --git a/data2/text/range/0-5000/708705.txt b/data2/text/range/0-5000/708705.txt new file mode 100644 index 0000000000000000000000000000000000000000..c88c0e81305017721c2dc270411c5620e733c554 --- /dev/null +++ b/data2/text/range/0-5000/708705.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 EVM_3V3_SD + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello Why the R823 in TDA2 EVM is no-pop? Why the TPD2E001DRL need power supply? And why shouldn't R823 connect to EVM_3V3 for continue power for card detection function but EVM_3V3_SD? Thank you + +Responses: +Hi, I'm not aware of the exact reason, my presumption is that INSERT pins being a card-present-contact away from human fingers would not need ESD protection. See more about SD card ESD here: Regards, Stan + diff --git a/data2/text/range/0-5000/708850.txt b/data2/text/range/0-5000/708850.txt new file mode 100644 index 0000000000000000000000000000000000000000..374a0803e007991d17353e2a6e286ef225946df8 --- /dev/null +++ b/data2/text/range/0-5000/708850.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2PXEVM: Missing binary file for CortexA15_0 + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI C/C++ Compiler Hello TI Applications Engineers, I am currently developing on the TDA2PXEVM with fusion application board using the vision SDK, and attempting to interface with the DS90UB953EVM. By loading the prebuilt binaries for version 3.04 of the SDK onto an SD card, I can reach the demo usecases menu via serial terminal. However, when I try to run Single Camera Usecases -> 1 CH UIP Capture + Display to talk to the image sensor on the DS90UB953EVM, I get the error "i2c4 transfer to slave address 0x30 failed". This is after setting up the DS90UB953EVM according to its user guide. I tried modifying the slave ID and slave ID alias registers on the DS90UB953EVM via Analog Launchpad, but that didn't seem to help. My thought was that the deserializer i2c addressing registers on the fusion application board need to be configured to match those of the serializer on the DS90UB953EVM. I attempted to gain access to these registers by loading version 3.03 of the SDK (version 3.04 failed to compile, I kept getting "system cannot find file specified" errors) from CCS (version 8.1.0) rather than booting from SD card. Following the user guide, I was able to load all the specified binaries onto their respective cores, except for "vision_sdk_a15_0_debug.xa15fg", which is supposed to go on CortexA15_0, but doesn't show up when I search for it in windows explorer. Any help with these issues would be greatly appreciated. Thanks, Richard + +Responses: +Hi Richard, Which version of vision sdk are you trying to build? Which config have you selected in Rules.make for building it for TDA2Px? Can you check in cfg.mk file whether you A15 core is included or not? Have you made any changes in vision sdk? if yes.then can you brief all those changes. Regards, Anuj + +Hi Anuj, I am trying to build version 3.03 of the vision SDK. I am using the config "tda2xx_evm_bios_all". Yes, I have included the A15 core in the cfg.mk file. I have not made any changes in vision sdk. Thanks, Richard + +Hi Richard, Can you check if you have vision_sdk_a15_0_release.xa15fg in the binary folder. Regards, Rishabh + +Hi Rishabh, I do have that file in the binary folder, I will try loading it alongside the others. Thanks, Richard + +Hi Richard, I would suggest you to build Vision SDK in debug mode in order to debug as it will have all symbols and compiler would not have optimized the code. You should set PROFILE in vision_sdk\apps\configs\tda2xx_evm_bios_all\cfg.mk to debug for this. Regards, Rishabh + diff --git a/data2/text/range/0-5000/708924.txt b/data2/text/range/0-5000/708924.txt new file mode 100644 index 0000000000000000000000000000000000000000..53de8a4fc50a197725b735b17bd59fe834f98a6c --- /dev/null +++ b/data2/text/range/0-5000/708924.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: PROCESSOR_SDK_VISION_03_03_00_00 when i do : make linux , it ouucr /autorules_footer_cfg.mk:69: *** CODEGEN_PATH_M4 does not exist! + +Query Text: +Part Number: TDA2 Tool/software: Linux Afterr i install the PROCESSOR as the VisionSDK_Linux_UserGuide.pdf write , I find that i don't have the directory : $INSTALL_DIR/ti_components/codecs . and when i build as chapter 3.1 make linux ,it oucur this error blow : /home/fee/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:69: *** CODEGEN_PATH_M4 does not exist! (/home/fee/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS). Stop. thanks! + +Responses: +Hi Jacinda, It looks like some issue during installation. Can you please download the installer again and retry. Regards, Rishabh + +Hi Jacinda, Can we close the thread if this issue is resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/708990.txt b/data2/text/range/0-5000/708990.txt new file mode 100644 index 0000000000000000000000000000000000000000..7f7788542fb80fc9d5c2a0bc066c8240477afbc0 --- /dev/null +++ b/data2/text/range/0-5000/708990.txt @@ -0,0 +1,38 @@ +Ticket Name: Compiler/TDA2: Open the Demo project onto CCS + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Dear TI Can you advise how can i open the demo project file which is generated by you onto the CCS IDE platform + +Responses: +Hello, Which demo project are you looking at? If it's a binary, you can create a target configuration, connect to a core and load the binary to run it on. thanks Alex + +Hi Alex I sorry to say still dont understand your reply as i am new in this SOC area. Could you explain further. As for which demo project, there is no specify i am trying to link the function together to understand the codes. So i have where to modify on the codes to develop my own project. + +Ok, are you going to be using the Vision SDK? Can you try some Vision SDK demos? You can download it from here www.ti.com/.../PROCESSOR-SDK-TDAX, after you install it there are gettings started gides in vision_sdk\docs\UserGuides. Perhaps it will help you boost your understanding of the code and demos. Please try it and let us know. Thanks, Alex + +Hello Willson Toh , We have not heard back from you on this one. I assume you were able to move ahead. Please let us know if otherwise. The thread would be closed automatically if there is no reply. Thanks, Alex + +Dear Alex We would like to know which is the 1st file that TDA2 execute upon power up as we are trying to remove some of the un-used component for our project to make the board smaller. + +Willson Toh59 said: We would like to know which is the 1st file that TDA2 execute upon power up I am not sure about that, we will bring in more experts for help on this. They will comment here directly soon. thanks Alex + +Hi Wilson, As such there is no file that is executed. When the TDA device is powered up first code that is executed is RBL. RBL (present on SoC itself) will initialize the device depending on the SYSBOOT. RBL will then load the SBL depending on boot mode. In case you load using CCS and there are gel files in the target configuration then gel files will initialize SoC. Regards, Rishabh + +Dear Rishabh I would like to know how should we go about which components we are able to remove to implement for our project development. + +Hi Wilson, It is not very clear to me what you want to do. You can remove all SW components except RBL. If you set the SYSBOOT to one of the reserved boot modes, SBL won't be loaded. Please see Initialization chapter from the TRM. Regards, Rishabh + +Dear Rishabh, My colleague is now working on a new hardware based on TDA2x evaluation kit design. You mentioned that RBL (present on SoC) will initialize the device depending on the SYSBOOT. For proper boot up of our new hardware, do we need to do any programming on this SoC? Can we safely assume that this part of first code for SoC is already programmed by TI when we purchase the SoC component from TI? + +Hi, RBL is already present inside the SoC. Can you please read chapter Initialization from the TRM. Regards, Rishabh + +Dear Rishabh, Where to find the initialization chapter from the TRM? + +Hi, It is chapter 29 from TDA2 TRM. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +noted. thanks + +Hi, Kindly mark the post that answers your query as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/709049.txt b/data2/text/range/0-5000/709049.txt new file mode 100644 index 0000000000000000000000000000000000000000..22dc05398b9af83462f74a7ffcf9545754a4e77f --- /dev/null +++ b/data2/text/range/0-5000/709049.txt @@ -0,0 +1,18 @@ +Ticket Name: Compiler/TDA2: TDA2 + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi, I made new usecase one. But, the log shows below. [HOST] [EVE1 ] 77.188769 s: IPC_IN_0 : Create in progress !!! [HOST] [EVE1 ] 77.189867 s: IPC_IN_0 : Create Done !!! [HOST] [EVE1 ] 77.190752 s: ALG: ERROR: No alg create function specified (algId = 6) !!! [HOST] [IPU2 ] 77.187915 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 77.188251 s: IPC_OUT_0 : Create Done !!! The algID 6 is census algorithm. In cfg.mk, I added ALG_census = yes. So, In App_init(), AlgorithmLink_census_initPlugin() will be called. What is problem? Thanks, Best regards, Heechang + +Responses: +Hi Heechang, Please use the below command to check whether your algorithm is getting build or not? make showconfig Please follow the below doc to know how to build or integrate an algorithm link. vision_sdk\docs\FeatureSpecificUserGuides (section 4) + +Hi Anuj >make showconfig ....... ....... # Alg plugins included in build, # ALG_autocalibration ALG_census ALG_disparityhamdist ALG_dmaSwMs ALG_framecopy ALG_remapmerge ALG_sceneobstruction ALG_stereo_postprocessing ALG_surroundview ALG_iss_aewb # # Use-cases included in build, # UC_iss_capture_isp_simcop_display UC_srv_calibration UC_iss_multi_capture_isp_simcop_stereo UC_lvds_vip_multi_cam_3d_srv UC_csi2Cal_multi_cam_3d_srv UC_csi2Cal_multi_cam_view UC_lvds_vip_multi_cam_view_sgx_display UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display UC_iss_multi_cam_isp_sgx_3d_srv_display UC_iss_multi_cam_isp_sgx_2mp_3d_srv UC_iss_multi_cam_isp_sgx_2mp_3d_srv_adaptive Algorithms is getting build(ALG_census) and my use-case is getting build too. The status return value is -7 when the census algorithm link is created. And, the census algorithm parameters are below. [HOST] [HOST ] 126.605319 s: imDim->disparityInputImageWidth:720, imDim->disparityInputImageHeight:376 [HOST] [HOST ] 126.605319 s: imDim->disparityInputLeftImageStartX:68, imDim->disparityInputLeftImageStartY:5 [HOST] [HOST ] 126.605319 s: imDim->disparityInputRightImageStartX:5, imDim->disparityInputRightImageStartY:5 [HOST] [HOST ] 126.605349 s: imDim->censusOutputRoiWidth:720, imDim->censusOutputRoiHeight:376 [HOST] [HOST ] 126.605349 s: imDim->censusInputImageWidth:800, imDim->censusInputImageHeight:384 [HOST] [HOST ] 126.605349 s: imDim->censusInputImageStartX:4, imDim->censusInputImageStartY:4 [HOST] [HOST ] 126.605349 s: imDim->remapImageWidth:800, imDim->remapImageHeight:384 [HOST] [HOST ] 126.605349 s: imDim->origRoiStartX:72, imDim->origRoiStartY:9 Thanks, Best regards, Heechang + +Hi, This error will come when it do not find the create function of the algorithm. Can you make sure by adding some logs inside AlgorithmLink_census_initPlugin() whether the create function is null or not? Please make sure you have added the algorithm as yes in usecase cfg.mk Regards, Anuj + +Hi, I cannot see log though I inserted the print log in App_init(). I have a question. The Census Algorithm run on EVE. In case of A15(Linux) <-> IPU(BIOS) <->EVE(BIOS), should I modify makefile for this case(using EVE and linux build)? Thanks, Best regards, Heechang + +Hi, To run linux on A15 please follow the below doc vision_sdk\docs\Linux\VisionSDK_Linux_UserGuide.pdf And please add log inside AlgorithmLink_census_initPlugin() to verify whether create is called or not. Regards, Anuj + +Hi, I resolved this issue by uploading EVE firmware which is modified. Thanks, Best regards, Heechang + diff --git a/data2/text/range/0-5000/709062.txt b/data2/text/range/0-5000/709062.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc7092ec96080561557a28b45818b10022f30ad6 --- /dev/null +++ b/data2/text/range/0-5000/709062.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: How to capture image and record video + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Using TDA2x with TI-RTOS, we can get live hdmi output. May I know 1) How to capture an image to sdcard? 2) How to capture an video to sdcard? Thank you very much. + +Responses: +Hi, You can use a null link in your usecase to dump the video into your sd card. Please refer to null_src_display usecase. In images what you want to dump? Encoded frame or a raw yuv frame? Regards, Anuj + +Hi, Are you able to dump the video. If yes then please close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/709091.txt b/data2/text/range/0-5000/709091.txt new file mode 100644 index 0000000000000000000000000000000000000000..5ee7e6c865c6837ebb16b0314fc06849381b5bdf --- /dev/null +++ b/data2/text/range/0-5000/709091.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: Use case generate tool + +Query Text: +Part Number: TDA2 Hi Rishabh, I am from the previous post by you what doing u mean by rebuilt 64bit machine? + +Responses: +Hi Wilson, The executable present is for a 32 bit machine. In order to run it on 64 bit machine the tool needs to be recompiled. See e2e.ti.com/.../692787 Regards, Rishabh + +Dear Rishabh I have error while generating the file + +Hi Wilson, You need to install GraphViz. See requirements chapter in vision_sdk\apps\tools\vision_sdk_usecase_gen\docs\VisionSDK_UserGuide_UsecaseGen.docx. Regards, Rishabh + +Hi Wilson, Try without "-img" option, without this option the image will not be generated but the usecase would be. Regards, Sujith + +Dear Rishabh I have already installed the software when executing it. + +Dear Rishabh Can i also ask i am suppose to use this (usecase) method to develop to algorithmic example face recognition ? + +Hi Wilson, Did you try after removing "-img" as suggested by Sujith. Regards, Rishabh + +Hi Rishabh I just manage to settle it by setting the PATH of GraphViz dot then after that execute with the win64.exe and it is able to generate most of the files including the img. This problem is due the GraphViz have to set the PATH pointing to "dot" . So can i ask i am suppose to follow this usecase to develop my own program? Because it quite difficult platform to understand + +Hi Wilson, This is use case generation tool. This tool will not generate algorithms for you. I would suggest you to go through the documentation. Also Vision SDK does not support face recognition algorithm. Regards, Rishabh + +Dear Rishabh I understand that the algorithm is not support and we have to code it in. My question was is this the place to being to write the program for my project. + +Hi Wilson, Kindly go through PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf on how to develop a new algorithm link in Vision SDK. Regards, Rishabh + diff --git a/data2/text/range/0-5000/709101.txt b/data2/text/range/0-5000/709101.txt new file mode 100644 index 0000000000000000000000000000000000000000..dad52a1ac9f72dc8d1edd49dbad0154068817caa --- /dev/null +++ b/data2/text/range/0-5000/709101.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2: Measuring load + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on TDA2Ex. run usecase: "chains_lvdsVipMultiCam_Sgx3Dsrv" Can get the load of DSP1 and M4-2 as the picture below. But the value of A15 is fixed, How to modify? grpxSrcLink_svStandalone_layout.c Int32 GrpxSrcLink_displaySurroundViewStandaloneStats(GrpxSrcLink_Obj *pObj) Delete line 449, 450, The value of A15 is 0. Could you please give some suggestion here? Thanks in advance. + +Responses: +Hi, Currently there isn't support in the VSDK-Linux framework to measure the B/W of A15. To measure the load of A15, Linux itself provides several tools such as top, htop, vmstat etc. It is feasible to monitor the CPU load while the application is running by launching a separate session (using telnet, ssh etc.) and running these commands. Regards Shravan + +HI, It is expected to use the "load average" in the "top" command as the A15 load monitoring. But don't know how to convert "load average" to percentage(%). How does the value in the top command translate to the load percentage? Figure1，red line → load average: 0.43 Figure2，red line → load average: 14.82 Figure3，red line → load average: 157.15 Figure1，Before executing app.out. Figure2，After executing app.out Figure3，Execute many bc commands Thanks in advance. + +Hi, You may find the script provided in this link useful. github.com/.../How-Linux-CPU-Usage-Time-and-Percentage-is-calculated Regards Shravan + +Hi, Use the script inside the link, The result is the same as the "mpuload" command. 100% directly after opening app.out, should this be "usage rate"? I need to know if there is a load limit that has been reached? How much can be used? Figure1，executing app.out. Figure2，exit app.out Thanks in advance. + +Hi, This means the load on the CPU is 100%. When you run apps.out, there is some code running on A15, which makes the load 100%. Regards Shravan + +Hi, As shown below, the load is already 100% when app.out is executed, but the bc command can still be executed. It will only reduce the CPU usage of the app.out(81% → 3.8%) and bc commands. Why is the load already 100% still able to execute other commands? How do evaluate the performance of A15 on app.out? Thanks in advance. + +Hi, I'm not sure what your exact use-case is, however, if you take the VSDK release as is, and run 'apps.out' the A15 load is expected to be 2-3%. 'bc' commands are still able to run, despite 'apps.out' being 100% load, because the scheduler in Linux, schedules processes to run on the core, using various factors. You can find more information here. To determine the load on A15, please use the top command, and the value (100-idle) (present at the head of the top command), will give you the CPU load. Regards Shravan + +Hi, test bc command: # Echo "scale=5000; 4*a(1)" | bc -l -q As shown in Figure 1, A15 does not execute the bc command. As shown in Figure 2 below, A15 executes a bc command. As shown in Figure 3 below, A15 executes multiple bc commands. How do know how many bc commands can execute on A15? Thanks in advance. + +Hi, Theoretically it should be possible to run as many tasks as possible, however beyond a certain number of processes more time is spend switching process than executing it. I think the issue pertaining to measuring load on A15 has been addressed. For any further queries, please create a new thread. Regards Shravan + diff --git a/data2/text/range/0-5000/709140.txt b/data2/text/range/0-5000/709140.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a662f548d0834ef31b004f808f53cebfcbfad9a --- /dev/null +++ b/data2/text/range/0-5000/709140.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2EVM5777: TDA2 EVM TMDS single end 60 ohm + +Query Text: +Part Number: TDA2EVM5777 Hello I read from GPIO_Revision 2.0 8.5.4.2 TMDS General Routing Guidelines single end impedance control should be 60 ohm, why is 60 ohm not 50 ohm? thank you + +Responses: +Hi, I've pinged documentation team and they said 60 ohm is correct. By the way, HDMI spec doesn't specify the single-end impedance. It only specifies the differential impedance of 100 ohms. Regards, Stan + +Hello So the document says the 60 ohm, what signal should we follow the 60 ohm impedance? thank you + +I'm not sure I understand enough your question. If it is related to routing, I find this guidance in the EVM schematic: DIFFERENTIAL PAIR 100 OHM DIFFERENTIAL IMPEDANCE SHORT AND STRAIGHT AS POSSIBLE, MINIMUM NUMBER OF VIAS + +Hello So there is no HDMI trace need to route in 60 ohm ? Thanks + +Locust, From 'HDMI Board Design and Layout Guidelines' section of the TDA2x Data Manual: "The TMDS differential signal traces must be routed to achieve 100 Ohms (+/- 10%) differential impedance and 60 ohms (+/-10%) single ended impedance. Single ended impedance control is required because differential signals can’t be closely coupled on PCBs and therefore single ended impedance becomes important." I think there is a misunderstanding between single ended impedance and differential impedance, in your original question. -Colin -Colin + +Hi Locust, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/709147.txt b/data2/text/range/0-5000/709147.txt new file mode 100644 index 0000000000000000000000000000000000000000..703c9c21e1e1a01b7ffc7d1c762c2b55a10f2704 --- /dev/null +++ b/data2/text/range/0-5000/709147.txt @@ -0,0 +1,82 @@ +Ticket Name: RTOS/TDA2: VIP, Monochrome Sensor Capture and Display + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear Champs, My customer is developing DMS (driver monitoring system) on TDA2x. A monochrome sensor will be used for this application. The output format of this sensor is 12-bit raw (luma-only) with discrete sync. 1. My customer did below settings on VIP to capture the output. Could you help check if the setting can work or not? SDK: PPROCESSOR_SDK_VISION_03_04_00_00. File: \vision_sdk\apps\src\rtos\usecases\common\chains_common_vision.c Original: + + pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_DS_HSYNC_VSYNC; + pInstPrm->videoIfWidth = SYSTEM_VIFW_8BIT; + pInstPrm->bufCaptMode = SYSTEM_CAPT_BCM_FRM_DROP; + pInstPrm->numStream = 1; + + pInprms->width = captureInWidth; + pInprms->height = captureInHeight; + pInprms->dataFormat = SYSTEM_DF_YUV422P; + pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; + + + pOutprms->width = captureOutWidth; + pOutprms->height = captureOutHeight; + pOutprms->dataFormat = SYSTEM_DF_YUV420SP_UV; + pOutprms->maxWidth = pOutprms->width; + pOutprms->maxHeight = pOutprms->height; + + + pPortCfg->syncType = SYSTEM_VIP_SYNC_TYPE_DIS_SINGLE_YUV; + pPortCfg->ancCropEnable = FALSE; + pPortCfg->intfCfg.clipActive = FALSE; + pPortCfg->intfCfg.clipBlank = FALSE; + pPortCfg->intfCfg.intfWidth = SYSTEM_VIFW_16BIT; + + +Modified: + + pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_DS_HSYNC_VSYNC; + pInstPrm->videoIfWidth = SYSTEM_VIFW_12BIT; // modified for 12-bit + pInstPrm->bufCaptMode = SYSTEM_CAPT_BCM_FRM_DROP; + pInstPrm->numStream = 1; + + pInprms->width = captureInWidth; + pInprms->height = captureInHeight; + pInprms->dataFormat = SYSTEM_DF_RAW12; // modified for 12-bit RAW + pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; + + + pOutprms->width = captureOutWidth; + pOutprms->height = captureOutHeight; + pOutprms->dataFormat = SYSTEM_DF_RAW12; //modified to prevent VIP from processing data + pOutprms->maxWidth = pOutprms->width; + pOutprms->maxHeight = pOutprms->height; + + pPortCfg->syncType = SYSTEM_VIP_SYNC_TYPE_DIS_SINGLE_YUV; // should this be changed too? + pPortCfg->ancCropEnable = FALSE; + pPortCfg->intfCfg.clipActive = FALSE; + pPortCfg->intfCfg.clipBlank = FALSE; + pPortCfg->intfCfg.intfWidth = SYSTEM_VIFW_16BIT; // should this be changed too? + + + I attached original and modified files for your convenience to compare. chains_common_vision.zip 2. The captured 12-bit raw data will not only be proceed in DSP but also be sent to Display. Unfortunately the display controller supports only RGB or YUV input. Is there any hardware (like VPE) can be used to convert 12-bit raw to YUV/RGB? Thanks. + +Responses: +The VIP natively doesn't support 12-bit capture. Kindly configure VIP for 16-bit capture. In this case the upper 4-bit MSB will be set to zero in the buffer. Kindly use below settings. Also there is no other HW block in the system that can convert 12-bit to 16-bit or 8-bit pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_DS_HSYNC_VSYNC; + pInstPrm->videoIfWidth = SYSTEM_VIFW_16BIT; pInstPrm->bufCaptMode = SYSTEM_CAPT_BCM_FRM_DROP; + pInstPrm->numStream = 1; + + pInprms->width = captureInWidth; + pInprms->height = captureInHeight; + pInprms->dataFormat = SYSTEM_DF_RAW16; + pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; + + pOutprms->width = captureOutWidth; + pOutprms->height = captureOutHeight; + pOutprms->dataFormat = SYSTEM_DF_RAW16; + pOutprms->maxWidth = pOutprms->width; + pOutprms->maxHeight = pOutprms->height; + + pPortCfg->syncType = SYSTEM_VIP_SYNC_TYPE_DIS_SINGLE_YUV; + pPortCfg->ancCropEnable = FALSE; + pPortCfg->intfCfg.clipActive = FALSE; + pPortCfg->intfCfg.clipBlank = FALSE; + pPortCfg->intfCfg.intfWidth = SYSTEM_VIFW_16BIT; + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Sivaraj R + diff --git a/data2/text/range/0-5000/709397.txt b/data2/text/range/0-5000/709397.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff02ce00ef2f06e3c1045d31fa90018f7e96537b --- /dev/null +++ b/data2/text/range/0-5000/709397.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: remoteproc1: handling crash #1 in 40800000.dsp omap_hwmod: timer5: _wait_target_disable failed + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using SDK_VISION_03_02_00_00\vision_sdk\sample_app\src\rtos\alg_plugins\framecopy , i add my work after framecopy, #define L2SRAM_SIZE (32*1024) unsigned char L2SRAM[L2SRAM_SIZE]; #define L2TMP_SIZE (180*1024) unsigned char L2TMP[L2TMP_SIZE]; this can cause some problem , log is follow [ 52.906434] remoteproc1: crash detected in 40800000.dsp: type mmufault [ 52.913086] omap-iommu 40d01000.mmu: 40d01000.mmu: errs:0x00000002 da:0x20202020 pgd:0xed7bc808 *pgd:px00000000 000) [ 52.923429] remoteproc1: handling crash #1 in 40800000.dsp (TCC) = 8448b000 (8448b000) + +Responses: +Hi, These variables names has been used by the system. so please do not use them. What are you modifying inside SDK_VISION_03_02_00_00\vision_sdk\sample_app\src\rtos\alg_plugins\framecopy ? Regards, Anuj + +Hi Anuj I test my algorithm using this link . I have find it cause by follow code. i get cycles in many place like this in my code. but why it handling crash? //unsigned long long WH_time[10]; // double WH_cost[10]; // TSCH = 0; //TSCL = 0; // WH_time[0] = _itoll(TSCH, TSCL); Image_Resize(pHandle, (ASVLOFFSCREEN*)psImgSrc); // WH_time[1] = _itoll(TSCH, TSCL); //WH_cost[0] = (double)(WH_time[1] - WH_time[0]) / 1000000.0; // printf("Image_Resize = %f ms\n", WH_cost[0]); // Vps_printf("forward_neImage_Resize = %f ms\n",WH_cost[0]); Regards, shuai + +Hi, I did not understand your last message. Can you explain in more detail. And what are you trying to do in this link. Can you share the changes. Regards, Anuj + +Hi: Anuj in framecopy link, i add my algorithm Interface function after framecopy is done， Initialization add in Alg_FrameCopyCreate . it Include 10 .c file and 8 .h file , i add .c file name in SRC_FILES.MK to Compile them. but in the 10 .c i add follow code to get functions cycles in many place . and i think this caused the problem, now it move away my algorithm is run successful. unsigned long long WH_time[10]; double WH_cost[10]; TSCH = 0; TSCL = 0; WH_time[0] = _itoll(TSCH, TSCL); WH_time[1] = _itoll(TSCH, TSCL); WH_cost[0] = (double)(WH_time[1] - WH_time[0]) / 1000000.0 befor this i use ccs Compile the 10 .c and 8.h ,create my.lib. i make a lib Folder in framecopy and put my.lib in it . but when i Compile the sdk it looks like canot find functions in my.lib so i changed i add all souce code in . then can you tell me what is the problem? i think make a lib first is nice . BESTWISHES SHUAI + diff --git a/data2/text/range/0-5000/709464.txt b/data2/text/range/0-5000/709464.txt new file mode 100644 index 0000000000000000000000000000000000000000..28c0ce3976e533bdc3c699fdb336d0e433d6f2fc --- /dev/null +++ b/data2/text/range/0-5000/709464.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Load program failed for TestAppEncoder.out file for TDA2PX device + +Query Text: +Part Number: TDA2 Hi, I am getting the following error on loading the TestAppEncoder.out file from h264enc\app\build\TestAppDM816x\out in ti ivahd_h264 encoder package. CortexA15_0: File Loader: Verification failed: Values at address 0x00000000 do not match Please verify target memory and memory map. Code Composer Studio Version Used 8.0 Target configuration file TDA2PX device Please help me to resolve this error. Regards Mayank + +Responses: +Hi Mayank, Data Verification errors are described here: software-dl.ti.com/.../troubleshooting-data_verification_errors.html Can you check if you can find any directions for resolving your issue in this document? Regards, Yordan + +Hi Mayank, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/709572.txt b/data2/text/range/0-5000/709572.txt new file mode 100644 index 0000000000000000000000000000000000000000..232142155c6e7107766143c620bc131d333553c2 --- /dev/null +++ b/data2/text/range/0-5000/709572.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Unable to clone opencv source + +Query Text: +Part Number: TDA2 Dear TI I am able to clone the opencv source from the give link from the document The given link is from page 5 pointer 1.4 of document VisionSDK_UserGuide_opencx. please advise + +Responses: +Hi Willson, can you try to clone from http://git.ti.com/opencv: git clone git://git.ti.com/opencv/tiopencv.git Regards, Yordan + diff --git a/data2/text/range/0-5000/709640.txt b/data2/text/range/0-5000/709640.txt new file mode 100644 index 0000000000000000000000000000000000000000..955deba89ac5032ecdbb34f40cfd6bfb879f4668 --- /dev/null +++ b/data2/text/range/0-5000/709640.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: TDA2X Booting process + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear All, We are using EVM and RVP board for Objection detection and data logger project. Due to required customization, need to understand the booting processing of TDA2X. We did not find the document which can provide the booting flow procedure, we attempted to analyze the source code. Considering the DSP1 core got the flow as: vision_sdk/sample_app/src/common/main_app/tda2xx/dsp1/src/main_c6xdsp1.c 91 /** 92 ******************************************************************************* 93 * 94 * \brief This is the main() implementation of DSP1. 95 * 96 * This is the first function and entry point to DSP1, does 97 * - Set the correct/required CPU frequency 98 * - Call the System_start with C6XDSP_main() and loops there 99 * 100 * \return SYSTEM_LINK_STATUS_SOK 101 * 102 ******************************************************************************* 103 */ 104 Int32 main(void) 105 { 106 Uint32 status; 107 108 status = main_common(); 109 110 return (status); 111 } This in turn calls main_common_c6xdsp1.c, i.e. vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1/src/main_common_c6xdsp1.c 167 Int32 main_common(void) 168 { 169 /* This is for debug purpose- see the description of function header */ 170 StartupEmulatorWaitFxn(); . . . //code truncated 207 System_start(C6XDSP_main); 208 BIOS_start(); // Q1: Where is the defination of BIOS_start() function? 209 210 return (SYSTEM_LINK_STATUS_SOK); 211 } Q2. Document or guide on the booting process of DSP or EVE to the point where application is started. Thanks, KK + +Responses: +Hi, Please find your answers below Q1: Where is the defination of BIOS_start() function? This function will start the TI-RTOS and do the necessary initializationfor DSP core. Q2. Document or guide on the booting process of DSP or EVE to the point where application is started. There is no such document which explains about the details of all files. you can start with Chains_main() function available in vision_sdk\apps\src\rtos\common\chains_main_bios_vision.c for bios_all config. And main() available in vision_sdk\apps\src\hlos\adas\src\common\chains_main.c file for linux all config. These are the files from where the usecases starts. Regards, Anuj + +Hello Anuj, Q1. Could you guide us to the source code? Q2. The source path and the description are helpful. We will go through it and get back. Thanks, KK + +Hi, These are c codes and that you need to go through yourself. If you face any issue in running any usecase or in order to modify that usecase , you can post a new question. Regards, Anuj + +Hello Anuj, We will go through the C code, we have expertise on it. Q1. Was referring to " BIOS_start() function definition. We could not find it. Could you guide us to the file containing the function BIOS_start() definition?. Regards, KK + +Hi, BIOS_start() is a library function. Please go through the below docs to understand the VSDK framework VisionSDK_SW_Architecture_Overview.pdf VisionSDK_SW_Architecture_Details.pdf VisionSDK_DevelopmentGuide.pdf Regards, Anuj + diff --git a/data2/text/range/0-5000/709811.txt b/data2/text/range/0-5000/709811.txt new file mode 100644 index 0000000000000000000000000000000000000000..2da184f99159e046f818e2da9a61893d884b1fc2 --- /dev/null +++ b/data2/text/range/0-5000/709811.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: BGA Ball footprint + +Query Text: +Part Number: TDA2 Hello expert, Customer asked a question about footprint of TDA2 BGA (TDA2_ABC 23x23mm package S-PBGA-N760). Can you send the below footprint information regarding PCB design? 1. To design PCB, how much size of ball footprint is recommended? 0.35mm ~ 0.45mm would be okay? 2. There is no description about NSMD (Non-Solder Mask Defined) or SMD (Solder Mask Defined) in data manual. Is it okay to design PCB with SMD type? Thanks, Lloyd + +Responses: +Recommended ball footprint is 0.35mm. If SMD, recommended opening is 0.35mm. Thanks Robert + diff --git a/data2/text/range/0-5000/709833.txt b/data2/text/range/0-5000/709833.txt new file mode 100644 index 0000000000000000000000000000000000000000..5efa68dd000fd89a9da4a1276cf3368dcbb4522e --- /dev/null +++ b/data2/text/range/0-5000/709833.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Some issues about the usage of TIDL + +Query Text: +Part Number: TDA2 Hello, I met some problems when using TIDL, 1. Convolution Layer 1.1 Can numGroups support from 1 to size of kernel(eg, kernel size is 3*3*32, numGroups can support from 1 to 32) ? 1.2 The dilation is the same thing to rate of atrous convolution? (eg, in the flowing case, dilation should be 1, 2, 4 ) 2 Spatial Pooling layer 2.1 In TIDL user guide, pooling can support with strideW 4, but in the spatial_pooling.cpp, strideW 4 is not supported. If I modify the cpp code to supporting strideW 4(similar to strideH), is it OK? 3 In tidl_ModelImport tool, it can generate the trace_dump file ,such as trace_dump_0_32x32.y. Then how can I get the similar file in TIDL(tidl_tb.c)? For I get the different result between tidl_ModelImport tool and TIDL, I want to do some checks. Thanks~ + +Responses: +Hi, 1.1 TIDL can support numGroups from 1 to 32, but we did not tested with larger number of groups. 1.2 TIDL can support dilation values 1, 2, 4 2.1 Pooling can support with stride 4. Please try modifying the code though we did not tested, it should work. 3. Change #define ENABLE_TRACE_DUMP (0) to #define ENABLE_TRACE_DUMP (1) at line no 40 in tidl_alg.c file to dump traces from TIDL. Thanks, Praveen + +Hi, Do you use the CCS in using TIDL? + +Can I ask where do find the spatial_pooling.cpp file, is it in the PROCESSOR_SDK_VISION_03_04_00_00? + +Hi, Source files will not be released as part of VISION SDK. For source file access you should get the source releases of each component from TI, for that please contact your local TI FAE. Thanks, Praveen + diff --git a/data2/text/range/0-5000/709889.txt b/data2/text/range/0-5000/709889.txt new file mode 100644 index 0000000000000000000000000000000000000000..9211c6350c6b759aaaf041adc6d31396da52ea06 --- /dev/null +++ b/data2/text/range/0-5000/709889.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: IVAHD encoder sample application hangs at H264ENC_create + +Query Text: +Part Number: TDA2 Hi I am trying to generate the encoded output file by running the TI ivahd encoder sample application TestAppDM816x/TestAppOmap4 on TDA2PX evm board but the application hangs at handle[insChanid] = H264ENC_create((H264ENC_Fxns *)&H264ENC_TI_IH264ENC, &gParams[insChanid]); I haven't modified any encoder configuration and i am running the default application. On suspend the running i am seeing the following error message in diassembly window: Memory map prevented reading 0xFEF4000C [code=0x20000] Any workarounds so that i should be able to generate the output file. Regards Mayank + +Responses: +Hi Mayank, Can you please single step through the code to localize where inside the H264ENC_create you are crashing? Typical reasons for a crash would be access to a memory space which is not mapped/understood by the CPU core. Thanks and Regards, Piyali + +Hi, It is hanging in AlgInit function.Currently i am trying to run it on A15 core. Is there any procedure to run the sample application on multiple core or any other particular core. I tried running it on m4_0 and m4_1 core but with both it is giving similar results. Has anybody tried successfully running it.Please write in detail the procedure. Regards Mayank + +Hi Mayank, I think you will have modify the Base address in \codecs\h264enc\app\test\inc\h264enc_ti_config.h The existing is for OMAP4 & NETRA. #define M3_HZ change this;//(250000000) #define MEM_BASE_IVAHD0 change this;//0xBB000000 #define REG_BASE_IVAHD0 change this;//0xBA000000 #define RST_CNTL_BASE_IVAHD0 change this;//0xAA306F10 + +Hi Prashant, Thanks for your mail.You mentioned in your mail that the above macros needs to be changed. Currently i am working on TDA2PX evm board,what would be the correct values of above macros for the evm that i am using. Regards Mayank + +Hi Mayank, The base address will be present in the TRM of this target. Do you have the TRM? + +Hi Mayank, The TRM is at http://www.ti.com/lit/ug/spruif0a/spruif0a.pdf The addresses would be #define MEM_BASE_IVAHD0 change this;//0x5B000000 #define REG_BASE_IVAHD0 change this;//0x5A000000 #define RST_CNTL_BASE_IVAHD0 change this;//0x4AE06F10 Regards, Piyali + +Hi Prashant, Thanks for your continuous support. In the TRM that i am having for TDA2PX evm in the iva subssytem following lines are mentioned: NOTE: The IVA-HD subsystem is a set of video encoder and decoder hardware accelerators. The list of supported codecs can be found in the software development kit (SDK) documentation. The IVA-HD subsystem availability is device part number dependent. Refer to device Data Manual, for more information I could not find the register settings that you have mentioned in the TRM. Are you sure that these register settings will fix the crash issue. Regards Mayank + +Hi Mayank, Please refer the above post from Piyali on the Address you need to set. I have not tried running the sample testapp on TDA2PX. But to run this code on different targets we will be using respective Base address. So, theoretically it should work. + +Hi Prashant, Thanks for your continuous support.I configured the register settings as suggested by Piyali but i am getting the same crash at H264Enc_Create. Regards Mayank + +Hi Mayank, Can you tell me the detailed procedure you followed to run this on TDA2PX? It would help to debug further. + +Hi Mayank, We have not heard back from you on this one. I assume you were able to move ahead. Please let us know if otherwise. The thread would be closed automatically if there is no reply. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/709917.txt b/data2/text/range/0-5000/709917.txt new file mode 100644 index 0000000000000000000000000000000000000000..a090028adc988d50a1046c471c607e804a53939a --- /dev/null +++ b/data2/text/range/0-5000/709917.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: can not add --debug_software_pipeline + +Query Text: +Part Number: TDA2 Tool/software: Linux i test my code use CCS and get the cycle， then i add this code in vision sdk ,but the same code use more cycles , i may be diffrent Linker options and rules. so i thy to change rules_66.mk according CCS options, LNKFLAGS_INTERNAL_COMMON i add some options here fatal error #10000: invalid option: --symdebug:none fatal error #10000: invalid option: --debug_software_pipeline this is my CCS options -mv6600 -O3 --opt_for_speed=5 --symdebug:none --diag_warning=225 --diag_wrap=off --display_error_number --debug_software_pipeline --sat_reassoc=off --program_level_compile --auto_inline=1 --gen_opt_info=2 -z + +Responses: +Hi, This could happen if the toolchain use by ccs and vision are different. Please 1st make sure the toolchains are same. Regards, Anuj + +Hi Anuj CCS is C6000_8.2.2 and vision SDK is cg_tools/linux/ti-cgt-c6000_8.1.0 , how can i update cg_tools/linux/ to c6000_8.2.2?? Regards, shuai + +Hi, Its not recomended to change the toolchain of VSDK. So please try to change your CCS version or change the ttolchain of ccs and have the same toolchain as VSDK. And we do not recommend to build using CCS. CCS is being used only for debug purpose. Regards, Anuj + diff --git a/data2/text/range/0-5000/710219.txt b/data2/text/range/0-5000/710219.txt new file mode 100644 index 0000000000000000000000000000000000000000..8b736fd6d3658ed52107fe62e8160f29b6a76d07 --- /dev/null +++ b/data2/text/range/0-5000/710219.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2P functional safety + +Query Text: +Part Number: TDA2 Dear, Please provide safety analysis reports and FMEDAs ? Thanks + +Responses: +Hello Joseph, Can you please get in touch with your TI representative for these details? You would need an NDA to access this information. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/710313.txt b/data2/text/range/0-5000/710313.txt new file mode 100644 index 0000000000000000000000000000000000000000..6f4a4462ea1c3aa32d69068042ad2b3f973566b9 --- /dev/null +++ b/data2/text/range/0-5000/710313.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: 3D surround view Camera Calibration tool + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I am using TDA2X vision EVM board to develop 3D surround view function. We run the calibration using the calibration tool. We found front and rear cameras can not be calibrated perfectly. Look at the picture below. The straight line becomes curved when it passes the front camera. I think it is because the lens distortion is not completely corrected. In the lens LUT generation tool, the maximum angles are limited to below 90. Will this be a problem? In another thread, you said you can provide the calibration tool source code. Can you provide that to me so we can debug what is wrong? Thanks. 1. front camera can not be calibrated perfectly. + +Responses: +Another strange thing is that the birdview image generated by calibration tool is good. But the online birdview image has distortion. This picture is generated by calibration tool. The numbers in red circle has no distortion. This picture is captured online, the numbers in red circle has large distortion + +Those above pictures are captured in 3d adaptive surround view function (has bowl view). I also captured some images in normal 3D surround view. There are also distortions in front and rear camera area. But the curve direction is opposite to that in 3D adaptive view. Following is the picture. Notice the curve direction in red circle. Theoretically, bird view of normal surround view should have no distortion. Why it still has distortion? Thanks. + +Hi Tao, For access to SRV calibration source code, please ask the respective region TI Field representative to raise a request with me. We can pass it through the approval system and provide it to you. (I can provide the source code in public forum). This would be the source code of the embedded calibration tool. Regarding your questions Limiting the FOV to 90degrees is not an issue, this is the radial angle, so the FOV of the lens we would capture would be 180 degrees Its hard for me to debug this just looking at pictures, and I'm not sure why the calibration works fine on the offline tool but not on the device. It maybe related to the bowl shape, please make sure the bowl shape is as flat by extending the offsets to the far regions (Typically around +/-400 or so) and keep the adaptive logic turned off.Can you also mention which two usecases you tried on the device and more information on your setup (Which sensor/camera etc) Regards Shashank + +Hi Shashank , I have figured out the cause of issues listed above. It is because the limitation of the max angle. After I remove that limitation. Those issue disappears. But the stitched image is still not so good. Please look at the image attached below. I am using the cameras from spectrumdigital in this link: www.spectrumdigital.com/.../. The cameras don't have lenses. We bought the that and installed by ourselves. According to your experience, will those cameras be a problem? Thanks. + +Hi Tao, Typically you need machine aligned camera modules to get good calibration. Hand screwed lenses may have issues but you may be able to get better calibration than this. You can try running the lens center detection tool from the manual calibration tool prior to generating the LENS.bin. In this case, the Lens.bin will encode the centers (I am assuming the image center and lens center do not align in this case). Modifying the lens center with the tool might help. Regards Shashank + diff --git a/data2/text/range/0-5000/710784.txt b/data2/text/range/0-5000/710784.txt new file mode 100644 index 0000000000000000000000000000000000000000..39d1b03c16364d3be7810605ae496a306197fa0e --- /dev/null +++ b/data2/text/range/0-5000/710784.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Direct connection VIN signal into VIP without isolation? + +Query Text: +Part Number: TDA2 1. Can I connect VIN signal directly into VIP without isolation using SN74CBTLV16212GR? Does SN74CBTLV16212GR served any purpose, like isolation from backflow current, other than multiplexer? + +Responses: +In case of TI EVM, this is used as both a mux as well as a driver buffer. Depending on the drive capacity of the sensor/decoder you may have this or not in your board. + diff --git a/data2/text/range/0-5000/711215.txt b/data2/text/range/0-5000/711215.txt new file mode 100644 index 0000000000000000000000000000000000000000..125ce84c6184e3f97cf6c1bd535967f7a61b15bd --- /dev/null +++ b/data2/text/range/0-5000/711215.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Enquiry on TI device translator tool and other question + +Query Text: +Part Number: TDA2 Dear TI Below are some of my question. Q1) We are try to using some of the third party software like caffe and tensorflow. I had read one of your document "Embedded low-power deep learning with TIDL" there is tool call TI device translator tool where can i find these tools? Q2) On top do we are try to bring Dlib and RPPG to the TDA2 are we able to accomplish using the TIDL deceive translator tool? Q3) Where can i find this TIDL deceive translator tool user guide? Q4) What is the latest version use in VisionSDK for opencv and are we to upgrade the opencv to the lastest version which is 3.3.1 ? + +Responses: +Hi, 1) This tool is name is "tidlModelImport" and is part of TIDL component in VSDK release and you can find this in "ti_dl\utils" folder in TIDL 2) Please refer to "TIDeepLearningLibrary_DataSheet.pdf" for supported layers with this tool and with TIDL library. Note that this tool source code is also available in the package so that it can be extended as per your requirements. 3) For this, refer to section 3.6 in the "TIDeepLearningLibrary_UserGuide.pdf". 4) Refer to user guide in latest Vision SDK release( www.ti.com/.../PROCESSOR-SDK-TDAX) Thanks, Praveen + +Dear Praveen The link for answer 4 is unable to be found please advise + +I think it is adding extra closing brace at the end, so not opening, try this.. www.ti.com/.../PROCESSOR-SDK-TDAX Thanks, Praveen + +Dear Praveen As for the reply for question 2 you mean that i am able to import DLib and rppg to this TDA2 ? + +Hi, I don't know the network layers structure used in Dlib and rppg, so as long as any network which has the layers supported by tool (mentioned in the user guide), then our tool can import those networks. More ever source code is open to user, so any one can add any missing layers for this tool to import their own models. Thanks, Praveen + diff --git a/data2/text/range/0-5000/711232.txt b/data2/text/range/0-5000/711232.txt new file mode 100644 index 0000000000000000000000000000000000000000..d1f1256ba9c0ef6f04513efa63fdf0ddaddccd48 --- /dev/null +++ b/data2/text/range/0-5000/711232.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: How to Updating latest vision sdk + +Query Text: +Part Number: TDA2 Dear TI I just notice you are just release a newer visionsdk version 3.4. I am using 3.3 are you able to advise how is should update to this latest vision? + +Responses: +Hi Wilson, You should refer to release notes for the list of new features, upgrade and compatibility information, etc. The release notes can be downloaded here: software-dl.ti.com/.../VisionSDK_ReleaseNotes.pdf Regards, Rishabh + +Dear Rishabh I mean i want to update my version from 3.3 to version 3.4. Can i just copy the file and replace with the old version just like that? + +Hi Wilson, Have you made any changes on top of Vision SDK 3.3 or you are using default SDK. Regards, Rishabh + +Dear Rishabh There is no changes but it compile to for see the demo + +Hi WIlson, In that case you can just download SDK 3.4 and install it in a different folder as compared to SDK 3.3. By default the folders should be PROCESSOR_SDK_VISION_03_03_00_00 and PROCESSOR_SDK_VISION_03_04_00_00. Regards, Rishabh + +Hi Wilson, Is this issue resolved? Can we close the thread. Regards, Rishabh + +Yes i just close this + +Ok thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/0-5000/711320.txt b/data2/text/range/0-5000/711320.txt new file mode 100644 index 0000000000000000000000000000000000000000..39a59590a2afd5f531c8e44eb69d4cb8338b0f38 --- /dev/null +++ b/data2/text/range/0-5000/711320.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: a15 Multithreading + +Query Text: +Part Number: TDA2 Tool/software: Linux i run my algorithm on A15 ,double thread time is half of Single thread. thread num is 4 or 8 time is same with double thread. Multithreading is use 2 A15 is run ? + +Responses: +Hi, If you're using a TDA2x then there's a dual-core A15, which enables running a thread on each core, so you should almost see a linear decrease in the time. However, when the number of threads increases, they are scheduled between the two cores, and there may not necessarily be a linear decrease in time. Regards Shravan + +Hi Shravan what about TDA2Ex? a dual-core A15 also? BESTWISHES SHUAI + +Hi Shuai, TDA2Ex is single core A15. Regards Shravan + diff --git a/data2/text/range/0-5000/711806.txt b/data2/text/range/0-5000/711806.txt new file mode 100644 index 0000000000000000000000000000000000000000..54d1eec52e99619c7377a12825988225abc3d607 --- /dev/null +++ b/data2/text/range/0-5000/711806.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2EG-17: Cannot detect USB flash disk in host mode ! + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2, PCF8575 Tool/software: Linux Hi, Now I have a problem that my custom board cannot detect USB flash disk in host mode when excuted "usb start" in Uboot mode.The log is attached. And I open debug in Uboot mode .How can I resolve it ? Uboot_with_debug2.txt + +Responses: +Hello, Can you confirm the USB flash disk is connected to the USB2 port on your custom board? Also can you please tell us what kind of USB flash disk is used here? Manufacture, make, speed? Is this flash disk working properly when connected to PC? Also, have you tried different USB flash disk? Looking at the u-boot log provided, the USB host driver in the u-boot got initialized properly and from you debug log, we could see that the device enumerate did not start at all. So are you seeing VBUS on the USB connection once the "usb start" is called? Thanks. + +Hi, 1. Yes,USB falsh disk is connected to USB2 port.And USB flash disk can be detected on TDA2EG17 EVM board,also it can work properly on PC. So it is not that USB causes the problem 2. The differences between EVM board and our custom board is that: 2.1 First,in our custom board,TDA2 don't detect the level of USB2_VBUS; 2.2 Second,in our custom board,TDA2 detects ID pin of USB port ,but we don't use PCF8575,we use AA3 as following picture. 2.3 After I excute "USB start",I measure VBUS's voltage,it will become 5V from 0V + +Hi, Good to know the VBUS voltage is proper. Since the USB mode we trying is HOST, the ID pin is not a concern. Can you share the complete schematic of USB connection b/n the TDA2 and the USB port. Also, what kind of USB receptacle is used on the board? Have you tried connecting USB flash driver after the kernel boots up? Or you still at the u-boot level? Thanks. + +Hi, 1. The complete schematic of USB connection is as following: 2.The type of USB receptacle is Micro USB as following: 3. I also have tried to connect USB after kernel boots up,it also failed.So I'd like to start to resolve it from Uboot mode. I am looking forward to your reply. Thanks! + +Thanks for the details and sharing the schematics. I am checking with the h/w expert to confirm the schematics are fine, especially the requirements to have choke and esd are properly taken care. Thanks + +Hi, Could you give some advise?And I think it's not the hardware which causes the problem,I still doubt the detection of ID pin. + +The detection of ID pin is required only if the USB is configured for OTG mode. For Host mode functionality, this pin is not used. BTW, are you still seeing the issue? As previously noted, the device was not detected by the USB2 configured as HOST. You would notice in the u-boot log that the portstatus always return value 0x101 and stayed at FULLSPEED. In case of device detection, the value returned will be 0x503 (USB_PORT_STAT_ENABLE=1) and speed will switch to HIGHSPEED. This clearly says that the device was not detected by the USB controller. Suggest you to connect the USB protocol analyzer between the USB port an the USB flash drive and provided us the protocol log to analyze the issue. Thanks. + +Hi Praveen: Yes,I'm still seeing the issue.But I cannot provide the log because I don't have USB protocol analyzer. + +Looking at your log, it looks like the USB goes into Full speed. We will need USB protocol logs to understand why high speed fails and full speed is entered, otherwise it limits our debug. Also I noticed you mention you are connecting to USB2 port, but your schematic s showing USB1, can you share the USB2 schematic? + +Hi! I haven't heard back from you in awhile, so I am assuming you have resolved your issue. If not just post a reply (or new thread if this thread if locked) Best Regards, Yining + diff --git a/data2/text/range/0-5000/711968.txt b/data2/text/range/0-5000/711968.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0eb71c75d509c5a05a7f046b3e8ae70e5ffe5da --- /dev/null +++ b/data2/text/range/0-5000/711968.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: how to use lib in alg_plugins + +Query Text: +Part Number: TDA2 Tool/software: Linux vision_sdk\sample_app\src\rtos\alg_plugins\framecopy in framecopy link, i add my algorithm Interface function after framecopy is done， Initialization add in Alg_FrameCopyCreate . it Include 10 .c file and 8 .h file , i add .c file name in SRC_FILES.MK to Compile them. so add my souce code is success， now i first use ccs Compile my souce code create my.lib. then in vision_sdk\sample_app\MAKEFILE.MK i add APP_LIBS_c66xdsp_1 += $(ROOTDIR)/my.lib APP_LIBS_c66xdsp_2 += $(ROOTDIR)/my.lib but failed follow is the log # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... make[7]: *** No rule to make target `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/my.lib', needed by `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66'. Stop. make[6]: *** [c66xdsp_1] Error 2 make[5]: *** [apps_dsp1] Error 2 make[5]: *** Waiting for unfinished jobs.... # Making tda2xx-evm:arp32_2:release:vision_sdk_lib... # Configuro done! # Configuro done! BESTWISHES! + +Responses: +Hi, What you want to do? 1> Build your lib using your .c and .h files? 2> Use the lib built by CCS in framecopy algorithm? Regards, Anuj + +Hi: Anuj framecopy algorithm is a algorithm link ,now it done framecopy algorithm then add myself algorithm. so i donot have to make a new algorithm link. Now do you understand what i have to do ? then i put all my source file(10 .c file and 8 .h file) in vision_sdk\sample_app\src\rtos\alg_plugins\framecopy , i add .c file name in SRC_FILES.MK to Compile them , i add my algorithm Interface function after framecopy is done， Initialization of my algorithm add in Alg_FrameCopyCreate . this way is success, my algorithm is run ,result is correct. promblem is come in. i have to compile my source into libraries, in framecopy algorithm call the lib(i use CCS compiled it and creat my.lib, and put my.lib in vision_sdk Folder), in vision_sdk\sample_app\MAKEFILE.MK i add APP_LIBS_c66xdsp_1 += $(ROOTDIR)/my.lib APP_LIBS_c66xdsp_2 += $(ROOTDIR)/my.lib when i make the vision_sdk it have some problem follow is the LOG. # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... make[7]: *** No rule to make target `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/my.lib', needed by `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66'. Stop. make[6]: *** [c66xdsp_1] Error 2 make[5]: *** [apps_dsp1] Error 2 make[5]: *** Waiting for unfinished jobs.... # Making tda2xx-evm:arp32_2:release:vision_sdk_lib... # Configuro done! # Configuro done! do you know what is my problem? BESTWISHES! shuai + +Hi, 1st thing where you have added your lib in makefile thats not correct. If you add there then it will try to create that lib using your source file. Please go through the makefiles and try to undertsand how it works. 2nd thing, you said that you are building your library in ccs so that is not right way as CCS might use different toolchain than VSDK. So try to create your library using VSK toolchains only 3rd if you want to use your lib in a link then take reference of encoder module, How an encoder link uses encoder lib. You can find the path of encoder libs in build/tools_path.mk Please go through below docs vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf Regards, Anuj + diff --git a/data2/text/range/0-5000/711973.txt b/data2/text/range/0-5000/711973.txt new file mode 100644 index 0000000000000000000000000000000000000000..65ea13e0222e4476860d02c070e55ba87a0efc44 --- /dev/null +++ b/data2/text/range/0-5000/711973.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Object detection usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone, I am working on Object detection usecase with VSDK 3.1 on TDA2X , I need to add some more objects to detect . 1) i wanted to know how to train / add new object data for the usecase to run 2) I have tried tidl od usecase with some random videos I had and default bin files (NET.BIN,PRM.BIN) from the PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/tools/TIDL_files path , it created the output bin file but I am not sure what to do with it ?? 3) I couldn't find any documents other than VisionSDK_UserGuide_TI_DeepLearning.pdf in feature specific guides in the docs , is there any other documents available for deep learning in tda2x processor ? Thanks & regards , V.B.Surendar + +Responses: +Hi, Please migrate to latest VSDK release from www.ti.com/.../PROCESSOR-SDK-TDAX 1. Please refer to the steps mentioned here ( github.com/.../caffe-jacinto-models ) 2. Refer to below e2e thread for visualisation code, use that to visualise the output. e2e.ti.com/.../2502331 3. Please refer to FAQ's in "TIDeepLearningLibrary_UserGuide.pdf " in TIDL package. Thanks, Praveen + diff --git a/data2/text/range/0-5000/712236.txt b/data2/text/range/0-5000/712236.txt new file mode 100644 index 0000000000000000000000000000000000000000..b666b7a2093e03e0e83e35e1647126a5ec3b9bd5 --- /dev/null +++ b/data2/text/range/0-5000/712236.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: Math.h and vector file advise + +Query Text: +Part Number: TDA2 Dear TI Hi I would like to ask there since to have a few math.h and vector file in the visionsdk but i am not sure which one i should be using. Are you able to advise which math.h and vector file i am suppose to use ? + +Responses: +Hi, You can find these inside code generation tool paths for your sdk. Please check vision_sdk/build/tools_path.mk and check for the cg_tools, in that path you will find all the necessary header files. Regrads, Anuj + +Dear Anuj Thanks for the reply but may question was there are different math.h and vector file under these folder (cg_tool/window/)but i am not sure which one i am suppose to use or these different math.h and vector file under these different. On top of these follow what does folder name referring to? Is it the processor ? folder : arp32_1.0.7 ,C6000_7.4.2, gcc-arm_none_eabi-4_9-2015q3 and ti-cgt-arm_16.9.2.LTS + +Hi, arp32_1.0.7 ,C6000_7.4.2 -> Eve core C6000_7.4.2 -> DSP core gcc-arm_none_eabi-4_9-2015q3 -> A15 ti-cgt-arm_16.9.2.LTS -> M4 All the 4 toolchains are 4 different cores So it depends on which core you are adding these header files,it will be picked from restective toolchains. Regards, Anuj + +Dear Anuj If i am running a new usecase but the algo is running on A15 core but require a math.h and vector, it i possible if i use math.h and vector under DSP core ? + +Hi, if the algorithm link is running on DSP and uses any math or vector header file then it will able to pick up from toolchain of DSP. Regards, Anuj + +Dear Anuj In another words, if i run my algorithm link on A15 ( as i am using to opencv) then i cant just simply just include the header file as shown below ? #include #include + +Hi, Have to tried to add only ? Fir all cores this toolchain paths are already defined, so it will automatically pick from the respective toolchain. you do not need to specify the path explicitly. Regards, Anuj + diff --git a/data2/text/range/0-5000/712342.txt b/data2/text/range/0-5000/712342.txt new file mode 100644 index 0000000000000000000000000000000000000000..4b543d91a33d2a4a68dfc948e84bf7a5871ecf6b --- /dev/null +++ b/data2/text/range/0-5000/712342.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: How to configure VIN1A, VIN3A and VIN5A for direct use without making use of multiplexer control logic block? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS My colleague is now making a hardware based on TDA2x reference design. It is presumed that we can still make use VIN1A, VIN3A and VIN5A if we do not add in the multiplexer control logic block in our hardware circuitry. In this case, how do we configure VIN1A, VIN3A and VIN5A in this case? Thanks + +Responses: +When you say multiplexer logic, you meant the mux present in TI EVM? In this case there is no special programming required. You can connect the VIN pins directly to TDA2xx and configure the pinmux accordingly. + +Hi Sivaraj, Thanks. Basically my colleague intends to remove the MUX hardware block entirely. With Vin directly connect to TDA2x directly, do we need to do any special configuration? Does this type of hardware change will impact on our use on TI SDK? + +No impact. We need to just bypass the mux programming (IO expander) code in SDK board module. + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Sivaraj R + +Thanks for the reply. I see your reply is to bypass the mux programming (IO expander) code in SDK board module. I can only try it out when the board being modified by my colleague, is ready for my testing + +I will close this thread. You can create a new one if you have any further queries + diff --git a/data2/text/range/0-5000/712517.txt b/data2/text/range/0-5000/712517.txt new file mode 100644 index 0000000000000000000000000000000000000000..3de30366549bce12e87a6b0d7ad77c95d85c0fa2 --- /dev/null +++ b/data2/text/range/0-5000/712517.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: EVE/VCOP/KernelC : I am new to VCOP Programming, How the VCOP Kernel-C code taking Less time than Natural-C. + +Query Text: +Part Number: TDA2 # 2D Block Addition for Unsigned Byte Arrays : Natural C Code : -------------------------------------------------------------------------------- void vcop_vec_array_add_uns_char_cn (unsigned char a[], unsigned char b[], unsigned char c[], int blk_h, int blk_w) { int i3; int i4; for (i3=0; i3dataFormat = SYSTEM_DF_YUV422I_VYUY; : pOutprms->dataFormat = SYSTEM_DF_YUV422I_YUYV; vpscore_vip.c if (FVID2_DF_YUV422I_VYUY == pathObj->srcColorSpace) { /* Special handling for 420SP and 422SP only for UV order. * Y and UV channel swap will be done in * VpsCore_vipPathCheck422SPOut() */ if (FVID2_DF_YUV422I_YUYV == pathObj->dstColorSpace[strm]) { pathObj->dstColorSpace[strm] = FVID2_DF_YUV422I_YVYU; -> FVID2_DF_YUV422I_YUYV : modify } However, it has not been converted to the normal color format. Regards, JP Park + +Can you test once again without changing any driver and just by setting output data format to FVID2_DF_YUV422I_VYUY? VIP assumes 8-bit data to come in as U0 Y0 V1 Y1. When we select FVID2_DF_YUV422I_VYUY output format, we typically get V1 Y0 U0 Y1. Since your inout is U and V swapped (V0 Y0 U1 Y1), when you do this you should get U1 Y0 V0 Y1. That is 422I_UYVY. + +Hi Sivaraj I have tried to set output data format to FVID2_DF_YUV422I_VYUY but occuerrd format error in display driver. So i tried as below. if (FVID2_DF_YUV422I_YUYV == pathObj->dstColorSpace[strm]) { pathObj->dstColorSpace[strm] = FVID2_DF_YUV422I_YVYU; -> FVID2_DF_YUV422I_YUYV : modify } and i have tried to modify various format but failed. Please give me other infrom solving VYUY input format. e2e.ti.com/.../2629593 Regards, JP Park. + +Park, Display does not support this format. First can you check if are you able to capture correct data with the suggested format? Then we need to modify display link to change format accordingly. Rgds, Brijesh + +Hi JP, I am closing thread due to inactivity. Please open it if you have further questions. Rgds, Brijesh + +Hi Brijesh, I have tested it with the following modifications, but this problem has not been solved. - chains_common_vison.c pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_DS_HSYNC_VSYNC; pInstPrm->videoIfWidth = SYSTEM_VIFW_8BIT; pInstPrm->bufCaptMode = SYSTEM_CAPT_BCM_FRM_DROP; pInstPrm->numStream = 1; pInprms = &pInstPrm->inParams; pInprms->width = captureInWidth; pInprms->height = captureInHeight; pInprms->dataFormat = SYSTEM_DF_YUV422P; pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; for (streamId = 0; streamId < CAPTURE_LINK_MAX_OUTPUT_PER_INST; streamId++) { pOutprms = &pInstPrm->outParams[streamId]; pOutprms->width = pInprms->width; pOutprms->height = pInprms->height; pOutprms->dataFormat = SYSTEM_DF_YUV422I_VYUY; //modify pOutprms->maxWidth = pOutprms->width; pOutprms->maxHeight = pOutprms->height; pOutprms->scEnable = FALSE; - and modify displayLink_drv.c to avoid display format error dssPrms->inFmt.height = pInChInfo->height; dssPrms->inFmt.pitch[0u] = pInChInfo->pitch[0]; dssPrms->inFmt.pitch[1u] = pInChInfo->pitch[1]; dssPrms->inFmt.pitch[2u] = pInChInfo->pitch[2]; dssPrms->inFmt.dataFormat = SYSTEM_DF_YUV422I_UYVY; //modify //System_Link_Ch_Info_Get_Flag_Data_Format(pInChInfo->flags); if(dssPrms->inFmt.dataFormat == SYSTEM_DF_ARGB32_8888) { /* Convert to equivalent Display format */ dssPrms->inFmt.dataFormat = SYSTEM_DF_BGRA32_8888; } dssPrms->inFmt.fieldMerged[0] = FALSE; dssPrms->inFmt.scanFormat = FVID2_SF_PROGRESSIVE; if (pObj->createArgs.displayScanFormat == SYSTEM_SF_INTERLACED) { dssPrms->inFmt.fieldMerged[0] = (UInt32)TRUE; dssPrms->inFmt.scanFormat = FVID2_SF_INTERLACED; } Do you support the VYUY format ? Regards, JP Park. + +Hi Park, It seems to be supported. Can you please dump one capture frame and share it across? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/713232.txt b/data2/text/range/0-5000/713232.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba33548ea2db43c5506a1ebf328a34971fc1e29d --- /dev/null +++ b/data2/text/range/0-5000/713232.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: VPE scale function + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS We successfully used the hardware VPE on the TDA2 to scale the image. We want to simulate VPE scaling on the PC side. Can you provide me with the C code or algorithm principle for analog VPE image scaling? + +Responses: +We don;t have C model for VPE + diff --git a/data2/text/range/0-5000/713318.txt b/data2/text/range/0-5000/713318.txt new file mode 100644 index 0000000000000000000000000000000000000000..9362ea4ddb157d0f9536f8acf8bf7464d35fea2b --- /dev/null +++ b/data2/text/range/0-5000/713318.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: tda2x + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1642, AWR1243, Dear officer, We are developing both tda2x and mmWave sensor module AWR1642, and I notice that the tda2x support radar input module AWR1243 from the tda2x doc. So What is main difference between AWR1642 and AWR1243? It is true that AWR1642 will do all the data process such as range, velocity and angle etc by itself while AWR1243 will only output raw data to tda2x and let tda2x to perform the data processing? Thanks and best regards He Wei Team leader for System architectures and Deep learning. + +Responses: +Hi He Wei, The nut shell description is correct. The AWR16 does the processing in the integrated C67x DSP and can send processed data output to TDA2 via CAN/SPI. AWR12 would sendout raw data out through CSI. You would need to convert the CSI format to VIP to capture on TDA2, or directly connect to the CSI interface on TDA3x/TDA2px. A high level comparisson between AWR16 and AWR12 is as below: www.ti.com/.../compare.html Thanks and Regards, Piyali + +Dear Piyali, Thanks a lot for the clear explanation. Thanks and best regards He Wei Team leader for System architectures and Deep learning LiteOn Singapore Automotive Electronics + +Hi He wei, Glad your query is resolved. Please feel free to mark the post which answered your question for the benefit of others and post any new questions in a separate post. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/713332.txt b/data2/text/range/0-5000/713332.txt new file mode 100644 index 0000000000000000000000000000000000000000..c4e76a186053dbbba4ef66c47b602f9ddbd3e2a9 --- /dev/null +++ b/data2/text/range/0-5000/713332.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Matrix transposed + +Query Text: +Part Number: TDA2 Tool/software: Linux how can i make Matrix transposed fast can EDMA done? 256*64 to 64*256 thanks! + +Responses: +Hi Shuai, can you check this post and see if it can give you some directions: e2e.ti.com/.../1447538 Regards, Yordan + diff --git a/data2/text/range/0-5000/713650.txt b/data2/text/range/0-5000/713650.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e28c3736dff20ab2bf74b6c43dfb43562edd6e3 --- /dev/null +++ b/data2/text/range/0-5000/713650.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: TDA2 supported Image Format + +Query Text: +Part Number: TDA2 Tool/software: Linux Does TDA2 support output format of AR0132AT6C00XPEA0 as below, 30fps? Does it need any buffer in between? + +Responses: +Hi, Well it can capture these RAW images formats, but it cannot convert into YUV. There is no hardware module to convert RAW to YUV. You need to write your own SW algo for the same. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/713737.txt b/data2/text/range/0-5000/713737.txt new file mode 100644 index 0000000000000000000000000000000000000000..eeea9ea7b27f6b77d863a64cb0c30a702e63b284 --- /dev/null +++ b/data2/text/range/0-5000/713737.txt @@ -0,0 +1,20 @@ +Ticket Name: Compiler/TDA2: Fail to linking openCV file (objdetect) + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Dear TI So in another words if i need to use objdetect then i have to use it in linux. am i correct? In future will TI look into this area to enable bios to use objdetect? + +Responses: +Hi, TI does not support object detection using OPENCV and there is no such plan in future to add support for it. If you want to use object detection then you can use BIOS usecases vip_single_cam_lane_detection vip_single_cam_object_detection2 Regards, Anuj + +Dear Anuj Just to verify then if we using linux instead we should be able to use objdetect.hpp in openCV + +Hi, In VSDK we have a prebuilt OPENCV library. We do not support building of OPENCV library. regards, Anuj + +Dear Anuj I am working in same team as Winson, I got 3 questions: 1. Because BIOS did't support object detection, so we want to build SDK in Linux host, i.e. using OpenCV in Linux version, Can I confirm if the openCV in TI Linux build will support object detection? 2. As suggested, to use openCV in TI linux build, we follow the VisionSDK_UserGuide_opencx.pdf, but this doc tell us that we need to rebuild the OpenCV from source code and also need to rebuild cmem, Do we really need to rebuild these from source code? 3. In my Linux host, I set the build config as: MAKECONFIG=tda2xx_evm_linux_opencx, The error is that it can not find the clocl cmd in the below path: home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found Should I install the "clocl" cmd in that path and build? Please advise Thanks and best regards He Wei + +Hi, TI does not support object detection using OPENCV. Bios suppport object detection using some algorithm running on bios. Please use the above suggested usecases. Regards, Anuj + +Dear Anuj So we won't get any additional openCV features support if switching from TI Bios build to TI Linux build, am I right? Based on the test report from ti_components\open_compute\opencv\opencv-3.1.0\docs: there is one sheet "objdetect" in vayu_arm_linux_opencv_test_report.xlsx but this sheet is not shown in vayu_arm_bios_opencv_test_report.xlsx. Actually this is the reason we thought objection detection is supported in Linux build . So this is not the case? Thanks and best regards He Wei + +Yes, you are right. If its been supported in VSDk then a supported usecase will be there for linux. Regards, Anuj + diff --git a/data2/text/range/0-5000/713749.txt b/data2/text/range/0-5000/713749.txt new file mode 100644 index 0000000000000000000000000000000000000000..d64d8447e2b8c84b9fe35299e94d1f3baad6889c --- /dev/null +++ b/data2/text/range/0-5000/713749.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: dsp and eve real-time control and algorithm partition + +Query Text: +Part Number: TDA2 Hi , One question, is there any paper or link about how to code into both dsp and eve together? I mean some example code and the responding detailed paper. Even more, I want to run many tasks onto both dsp and eve, so how to partition so many task or algorithm to different cores？ Could you please show me the paper and code about what I am so interested in？ Looking forward to your reply！ Yours Lv + +Responses: +Any one can answer this question？ + +Hi, I can not provide you some paper but you can take refrence of some docs available with vision sdk and understand the MCFW framework. You have to develope your link which can run on both dsp and eve cores. For code you can refer to vision_sdk\apps\src\rtos\alg_plugins\tidl For docs vision_sdk\docs\Architecture vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf Regards, Anuj + diff --git a/data2/text/range/0-5000/714068.txt b/data2/text/range/0-5000/714068.txt new file mode 100644 index 0000000000000000000000000000000000000000..17febe32d874c0ba04609fc490f5d5a23062caf7 --- /dev/null +++ b/data2/text/range/0-5000/714068.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2: Tda2x VisionSDK + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Dear Officer, Understood TI provide 2 set of build system: one is bios/rtos and another one is Linux. Can I check if I can build Linux option in windows environment by gmake? e.g. Is this below case OK? In Rules.make, set: MAKECONFIG=tda2xx_evm_linux_opencx Then go to Windows cmd prompt and run "gmake" Or all the Linux configuration must be build in native Linux host machine? Thanks and best regards He Wei Team leader for System Architectures and deep learning + +Responses: +Hi He Wei, you can build VisionSDK Linux only on Linux host (but you should be able to use virtual machine). You can build VisionSDK BIOS on either Linux or Windows. Regards, Yordan + diff --git a/data2/text/range/0-5000/714276.txt b/data2/text/range/0-5000/714276.txt new file mode 100644 index 0000000000000000000000000000000000000000..a78ca78d9f0a5012f325f90e428657e26e9079da --- /dev/null +++ b/data2/text/range/0-5000/714276.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/TDA2: tidl_OD Usecase error + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone, I am trying to run "TIDL OD usecase" on VSDK 3.4 , I believe the following bin files are required for the successful execution of usecase > TIDL OD Network file (NET_OD.bin) > TIDL OD Parameter file (PRM_OD.bin) > TIDL OD Usecase input data file (inData_OD) > TIDL OD Usecase input header file (inHeader_OD) For the network file and parameter file I have copied below files from the path , vision_sdk\apps\tools\TIDL_files\ > tidl_net_jdetNet_ssd.bin > tidl_param_jdetNet_ssd.bin For the Use case input data , I have downloaded the clip files from CDDS (currently trying with clip2.avi under single_cam_video_input_clips) and followed the below procedure to generate header file and data file 1) inData_OD generation > ffmpeg -i clip2.avi -y -c:v libx264 -vframes 50 inData_OD 2) inHeader_OD generation >ffprobe -show_packets ./inData_OD >index.idx >PAT=size >sed -n "/$PAT/p" index.idx | cut -d' ' -f3 >> size_extracted.txt After this step, size_extracted.txt will contain size of the frames. Remove the string "size=" from each line in the file and save only the numbers in size_extracted_jelly.txt. >cat size_extracted_jelly.txt | perl -n -e 'printf("%08x\n",$_)' | sed 's/\(..\)\(..\)\(..\)\(..\)/0x\4\n0x\3\n0x\2\n0x\1/' | xxd -r -p > Size_test.bin && du -b Size_test.bin >cp Size_test.bin inHeader_OD I have also copied the respective text file with below details TIDL Configuration parameters ----------------------------- inputWidth=736 inputHeight=320 inputFile=inData_OD inputHDRFile=inHeader_OD netFileName=tidl_net_jdetNet_ssd.bin paramFileName=tidl_param_jdetNet_ssd.bin fps=30 threshold=0.3 However , I am getting following error while running the usecase DECODE: ERROR: ALGPROCESS FAILED (status=0x20208001) !!! DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x20208001 DEC_LINK: Sequence called number 1 Kindly help me on resolving this issue . I have tried same for Semantic segmentation usecase with net and param bin files from the path /ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/test/testvecs/config/tidl_models/jsegnet21/ but i got the same error. I have referred below forum links for it + +Responses: +Hi Surendra, Could you please verify inputWidth & inputHeight of the file you generated is same as you are passing in .txt file ? TIDL inData_OD & inHeader_OD file also available in CDDS Could you please download & verify with that ? cdds.ext.ti.com/.../emxNavigator.jsp Regards Surya + +Hi Surya, I have used input files from the same CDDS link which you mentioned only , I am using single cam video input files for my testing . I have performed the steps I mentioned before to create the inData and inHeader files . I couldn't find inHeader_OD files in the link so I have generated it . In .txt file I have metioned the width and height as 736 & 320 respectively . The resolution of the video is 1920x1080 will that cause issue . Regards, Surendar + +Hi Surya , I have fousnd inHeader and inData under xcam folder , I am not sure whether that is the file you are mentioning about . Anyway I have renamed both as inHeader_OD and inData_OD and copied into SD card . When I ran the tidl_OD usecase I am getting the following error : Assertion @ Line: 220 in nullSrcLink_tsk.c: frameLength < bitstreamBuf->bufSize : failed !!! Regards, Surendar + +Hi, The difference in resolution will cause issue. You can find the files in below link cdds.ext.ti.com/.../emxNavigator.jsp Regards, Anuj + +Hi Anuj , I have downloaded the files from the link you mentioned only , I am using clips under "single cam video input" . I am maintaining the resolution of the video in txt file as 736x320 , if I change that to 1920 x 1080 which is resolution of the clips given in the link , assertion is throwing out as below Set DSS parameter failed [IPU1-0] 26.733910 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! [IPU1-0] 26.734398 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! Kindly help me in sorting out this issue + +Hi Anuj & Surya, Is there any update on this Regards, V.B.Surendar + +Hi, Please check for the correct files in that link. You are using wrong files. Regards, Anuj + +Hi Anuj, I have used the files from the following path , please verify it is wrong or not : VISION_SDK_02.XX.XX.XX_INPUTS -> single_cam_video_input_clips -> clip2.avi I have used clip2.avi as inData_OD and also created inHeader_OD using this . Kindly guide me on this Regards , Surendar + +Yes. This is wrong. You are searching in wrong folder.there will be a TIDl_files folder. In That folder you will find inData_OD. You do not need to rename any file. Regards, Anuj + +Hi Anuj , Thank you , it is working as you said the files are wrong Regards, surendar + diff --git a/data2/text/range/0-5000/714677.txt b/data2/text/range/0-5000/714677.txt new file mode 100644 index 0000000000000000000000000000000000000000..88d0575a4197c3a8ae3a7c2939b8dd52b1375930 --- /dev/null +++ b/data2/text/range/0-5000/714677.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Dynamic changes for VPE + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone , We are working on requirement to dynamically zoom in particular region of the output we are capturing. we have a VPE link in TDA2 which will perform the cropping and resizing , I like to know whether it is possible to change the crop parameters dynamically on runtime for VPE link . If that is possible , kindly suggest me if there are another ways to crop dynamically without rebooting . + +Responses: +Hi Surendar, At which rate do you want to change the parameters? Regards, Brijesh + +Hi Brijesh , I could not understand what you mentioned by "rate" , is it FPS or is it something else . Can you please elaborate on that. Regards, Surendar + +Surendar, I meant, do you want to change it on every frame submission? Regards, Brijesh + +Hi Brijesh, Yes , on every frame submission I want to change the parameters Regards , Surendar + +Hi Surendar, ok, i would suggest you to have a look into the API VpeLink_drvUpdateInputRtPrm in VPE link. This will give idea for how you could change the VPE crop parameters per frame. Rgds, Brijesh + +Hi Brijesh , Thank you , I will check and update you on this Regards , Surendar + diff --git a/data2/text/range/0-5000/714689.txt b/data2/text/range/0-5000/714689.txt new file mode 100644 index 0000000000000000000000000000000000000000..92f301b304d1a2fd9ba570b28cea1776298f7622 --- /dev/null +++ b/data2/text/range/0-5000/714689.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Measure execution time in A15 link on TDA2xx + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I am using TDA2xx and Vision SDK 3.02, build machine is Ubuntu 16.04 with kernel 4.16.7. I have a VSDK link running on A15 core with Linux and would like to find out the execution time of one of the functions. This link used to run on RTOS before and Utils_getCurTimeInUsec() was used. However, I cannot find equivalent function to use with HLOS. Thank you in advance. Regards, Nick + +Responses: +Hi Nick, on HLOS there is "OSA_getCurTimeInMsec" (defined in vision_sdk/links_fw/src/hlos/osa/src/osa.c). If you need microseconds, I think you can use also standard gettimeofday() from "sys/time.h" (OSA_getCurTimeInMsec is implemented using gettimeofday). Regards, Yordan + diff --git a/data2/text/range/0-5000/714767.txt b/data2/text/range/0-5000/714767.txt new file mode 100644 index 0000000000000000000000000000000000000000..7475979dd8075b76247743268943665785669652 --- /dev/null +++ b/data2/text/range/0-5000/714767.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: TIDL-1.1 SSD model test application in host emulation mode encountered memory leak + +Query Text: +Part Number: TDA2 Dear all: Recently we use TIDL01.01.00.00 doing vehicle detect, we trained a ssd model. We have an input video, using the ssd model detect vehicles in the video, on the target platform the program runs successfully, but in host emulation mode, with the program running, the PC memory usage increasingly, then after some frames, the program dies. After our analysis, we found the memory leak happing in "tidl_conv2d_base.c" file at line 2370 as follow graph: hope your answers, thanks. + +Responses: +Hi, Could you please try with TIDL latest release TIDL01.01.01.00 ? If you still face the issue with new release also, please share your model and prototxt to replicate the issue. Thanks, Praveen + +Dear Praveen: Now we don't have TIDL01.01.01.00 sources, so we couldn't build tidl_alg.lib for pc. + +Hi, Could you please download it from the same CDDS link and try? It is good to have latest release as fixed couple of bugs. Thanks, Praveen + +thanks, i have solved the problem. + diff --git a/data2/text/range/0-5000/714922.txt b/data2/text/range/0-5000/714922.txt new file mode 100644 index 0000000000000000000000000000000000000000..53e0f23a9391fe152a1eff52f9835818821d6b0c --- /dev/null +++ b/data2/text/range/0-5000/714922.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: TDA2xx Vision SDK Build Error: CODEGEN_PATH_A15 does not exist! + +Query Text: +Part Number: TDA2EVM5777 Hello, I am trying to install and start compiling using the PROCESSOR_SDK_VERSION_03_04_00_00 Linux. When following the Linux User Guide, I was able to compile just fine the first time (running make linux, make linux_install, make -s -j depends, make -s -j all worked just fine initially). After going away for a while and coming back to it, I get a compile error saying: /home/user01/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:69: *** CODEGEN_PATH_A15 does not exist! (/home/user01/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/gcc-arm-none-eabi-4_9-2015q3). Stop. I have another installation of PROCECSSOR_SDK_VISION_03_01_00_00 and I can compile just fine without gcc-arm-none-eabi-4_9-2015q3 in the directory /home/user01/PROCESSOR_SDK_VISION_03_01_00_00/ti_components/cg_tools/linux/. For reference, here is what the linux user guide says in section 2.2.1 A15 Compiler Linker for PROCESSOR_SDK_VISION_03_04_00_00 The Linux installer for the GCC Linaro tools should be downloaded from below link https://releases.linaro.org/components/toolchain/binaries/5.3-2016.02/arm-linux-gnueabihf/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf.tar.xz The tools need to be installed under $INSTALL_DIR/ti_components/os_tools/linux/linaro/ IMPORTANT NOTE: A15 Compiler and linker MUST be installed before initiating the build else compilation will fail. Also make sure the compiler is installed at the exact path mentioned above after installation of vision sdk. Use following steps to install the toolchain $> cd $INSTALL_DIR/ti_components/os_tools/linux/linaro $> tar –xvf gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf.tar.xz I noticed that there was no mention of the directory $INSTALL_DIR/ti_components/cg_tools/linux or the file gcc-arm-none-eabi-4_9-2015q3 anywhere in the user guide. What steps must I take to get passed this issue? Thank you, -iFer + +Responses: +Hello, I was successfully able to compile. The reason I had the error before was because on a new installation of PROCESSOR_SDK_VISION_03_04_00_00 the Rules.make file under $INSTALL_DIR/vision_sdk/build/ directory was defaulted to MAKECONFIG?=tda2xx_evm_bios_all. I needed it to be MAKECONFIG?=tda2xx_evm_linux_all otherwise I would run into that error. Thank you, -iFer + +Hi iFer, thanks for updating the thread. Regards, Yordan + diff --git a/data2/text/range/0-5000/714981.txt b/data2/text/range/0-5000/714981.txt new file mode 100644 index 0000000000000000000000000000000000000000..35be6a5a859a43bb92a2a6f4fd97aafdde27d1ce --- /dev/null +++ b/data2/text/range/0-5000/714981.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: function of the IPU1 and IPU2 + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi , I found the following description on TDA2x Technical Reference Manual SPRUI29D chapter 7.1.1: The device instantiates two dual Cortex®-M4 image processor unit (IPU) subsystems. • IPU1 subsystem is available for general purpose usage • IPU2 subsystem is dedicated to IVA support and is not available for other processing And, on the vision_sdk links_fw/include/link_api/system_linkId.h, I can see only the IPU1_0's link id, for example, SYSTEM_LINK_ID_DISPLAY_0, SYSTEM_LINK_ID_VENC_0, SYSTEM_LINK_ID_VDEC_0. What's the function each IPU? Could I create the IPU2 link id to work? Thanks. Regards, Tianxing + +Responses: +Hi Tianxing, Both the IPUs are available for general purpose usage. This paragraph is leftover from a previous generation device and will be removed from the TRM. Regards, Rishabh + +Hi Rishabh, Thanks, that's mean I can used IPU1 and IPU2 equivalent . However, vision sdk has not defined the IPU2 link. For example, SYSTEM_LINK_ID_CAPTURE_0, SYSTEM_LINK_ID_VDEC_0, it only belong to IPU1_0. If I want to used IPU2 to capture or decode, maybe I should define the link used IPU2_LINK? Regards, Tianxing + +Hi Tianxing, Any link that is supported on IPU can be run on either IPU1 or IPU2. Capture, display are supported on both IPUs. Regards, Rishabh + +Hi Rishabh, My question is that, should I define a decode link, display link or capture link id used the macro define: #define IPU2_LINK(x) (SYSTEM_MAKE_LINK_ID(SYSTEM_PROC_IPU2 , (x))) Thanks, Tianxing + +Hi Tianxing, You need to change anything here. You should change only the primary core in cfg.mk and rest will be taken care depending on it. Regards, Rishabh + +Hi Rishabh, Now, I set as follow: PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes IPU_PRIMARY_CORE=ipu1_0 IPU_SECONDARY_CORE=ipu2 I think if I want to create link on ipu2, I should define the ipu2 link Id, is right? And If I only set the ipu2 as primary, I need not care the link id. Regards, Tianxing + +Hi Tianxing, Yes you need not care about the link id. Changing primary core is sufficient. Regards, Rishabh + +Hi Rishabh, The another question is that if I used IPU2 and IPU1 both, the IPU2 link Id maybe defined, is right? Regards, Tianxing + +Hi Tianxing, Please find the new TDA TRM here: www.ti.com/.../sprui29e.pdf Regards, Rishabh + +Hi Tianxing, Is there an update on this issue? Regards, Rishabh + diff --git a/data2/text/range/0-5000/715085.txt b/data2/text/range/0-5000/715085.txt new file mode 100644 index 0000000000000000000000000000000000000000..f261e7283416ee3b8d440b179f88b3acffe09cb7 --- /dev/null +++ b/data2/text/range/0-5000/715085.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: 2D SRV Calibration issue in TDA2X + +Query Text: +Part Number: TDA2 I followed "VisionSDK_UserGuide_SurroundView_Calibration_TDA2xx.pdf" , and updated CHARTPOS.BIN for actual dimensions of the chart used for calibration by using "3d_calibration_tool". The result of Auto Calibration for 3D SRV was good after I replaced CHARTPOS.BIN in Micro SD card. However, the result of Auto Calibration for 2D SRV was worse than before the default CHARTPOS.BIN was replaced. 3D SRV ran on HLOS while 2D SRV ran on RTOS. What should I do next? Regards, Daniel + +Responses: +Hi Daniel, The usecase will work if you follow everything described on the document. Please contact the respective TI field agent assigned to your account. Regards Shashank + +Hi Shashank All right, Thanks for your reply. Regards Daniel + diff --git a/data2/text/range/0-5000/715125.txt b/data2/text/range/0-5000/715125.txt new file mode 100644 index 0000000000000000000000000000000000000000..eac37bfc74a611e1d874c6c7b2ee6416bba728d9 --- /dev/null +++ b/data2/text/range/0-5000/715125.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Rear Collision and Detection without RADAR + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone, Is there any use case available in Vision SDK for "rear collision and detection" for TDA2x EVM board without radar fusion . If not available I like to know if there is any algorithm implementation can be done for "Rear Collision and Detection " in TDA2X EVM board . I like to know if there is any possibility to execute the collision and detection without using RADAR data . Regards , Surendar + +Responses: +Hi, Can you check the below usecase vision_sdk\apps\src\rtos\usecases\vip_single_rvc_cam_view_crc vision_sdk\apps\src\rtos\usecases\vip_single_cam_object_detection2 Regards, Anuj + +Hi Anuj, I am trying to run both the usecases on TDA2X board , object detection works fine without any issues . However I could not run the rvc_cam_view_crc usecase in tda2xx board . I have followed following steps for the same. 1) Enabled the usecase in uc_cfg.mk in tda2xx_evm_bios_all 2) Added an option for the usecase in chains common file for selecting the particular usecase 3) changed the SW3 dip switch pin#1 to 1 , previously it was 0 When I ran the usecase , I couldn't find any assertions or error in the console . In the HDMI display I am getting green lines all over the screen Kindly guide me on how to make this usecase work on TDA2xx EVM board. Regards , Surendar + +Hi, You will not be able to run that usecase. You can take refrence from the above 2 usecases and create your own. Regards, Anuj + +Hi, If the issue is resolved then can you close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/715156.txt b/data2/text/range/0-5000/715156.txt new file mode 100644 index 0000000000000000000000000000000000000000..4bff78fbc2a265852dd9d33bcb32578e0a84ba4a --- /dev/null +++ b/data2/text/range/0-5000/715156.txt @@ -0,0 +1,18 @@ +Ticket Name: Compiler/TDA2: DSP2 crashed after __c_init00 , before main() was called + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler We use TAD2x Hardware platform, VisionSDK 3_03, all Bios system, DSP compiler ti-cgt-c6000_8.1.3. We have an algorithm run on DSP2 within a link. When the DSP2 's program was loaded into DDR and started run from __c_init00, the DSP2 will crash before main() was called (I debug it by JTAG). There is no error when I compile it. When I comment off all the call of our algorithm functions in the link 's "_init: and "_process", DSP2 starts OK. This algorithm runs fine on TDA2x 's DSP1 with visionSDK 2_10, DSP compiler ti-cgt-c6000_8.1.3. Please help me! The DSP2's binary and map file was attached.tda2xx-evm_DSP2_binary_map_file.rar + +Responses: +Hi, Do you get the same result with compiler version 7.4.2? I would suggest you to use the same compiler versions that were used to validate the particular release. Regards, Rishabh + +Dear Rishabh, We can't use compiler C6000_7.4.2 or c6000_7.4.14 in our project. Our project use Opencv 2.3.1 on DSP. Compiler C6000_7.4.2 can't compile Opencv2.3.1 and our algorithm code successful. Compiler C6000_7.4.2 don't support many syntax, but compiler ti-cgt-c6000_8.1.3 support. So, I use compiler ti-cgt-c6000_8.1.3 on visionSDK_2_10 in our project. Now, I need to transplant our algorithm to visionSDK_3_03. When I use compiler ti-cgt-c6000_8.1.3 replace compiler C6000_7.4.2 in visionSDK_3_03, after "make clean", and rebuild again, the system can't bootup(I think the DSP1 and DSP2 both crashed), although I don't add any algorithm in the usercase. When I don't "make clean", just add our algorithm into the usercase, the DSP2 crashed before main. Is it possilbe for me to use compiler ti-cgt-c6000_8.1.3 in the whole visionSDK_3_03, just recompile some basic lib to make it work in short time? This issue have blocked our project for 3 weeks. Please help me. Thank you very much. + +Hi Bao, One point to keep in mind is that compiler change alone is not sufficient in most of the cases. BIOS, XDC and IPC versions usually change when compiler versions are changed. In SDK 2.10 there might be a different version of these components as compared to 3.3 release. Hence I would suggest you to stick to the old SDK version for time being in your project and continue your development. We are moving to C6000_8.2.4 for Vision SDK 3.5 release which will happen at the end of 3Q 2018. You should migrate to this release once it is available on ti.com. Regards, Rishabh + +Hi, I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh, I 'm thinking other solution for our project temporay. After VisionSDK 3.5 released, I will switch back to DSP. Thanks for your help. + +Hi, Okay thanks for the update. Regards, Rishabh + diff --git a/data2/text/range/0-5000/715270.txt b/data2/text/range/0-5000/715270.txt new file mode 100644 index 0000000000000000000000000000000000000000..5486d4eca342399e9e26fb7ed7b5c8fc26f3ad20 --- /dev/null +++ b/data2/text/range/0-5000/715270.txt @@ -0,0 +1,28 @@ +Ticket Name: RTOS/TDA2: ndk_2_24_00_11 jumbo packet support + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, One of customer is trying to enable jumbo packet support on their custom board. They referred to the NDK wiki (http://processors.wiki.ti.com/index.php/Enabling_Jumbo_Packet_Support_for_C6678#NDK_modifications) and also made NSP changes. They see application crashing with this changes. Jumbo is validated on TDA2xx EVM by us but with ndk_2_24_02_31. Customer is using ndk_2_24_00_11 Just wondering if jumbo is supported on this version. Thanks. + +Responses: +Upon further debug, the application fails in the PTP stack which uses NDK Raw socket APIs. Any dependency of raw sockets on jumbo? + +Hi Prasad, Someone will look into this. Todd + +Hello Todd, Just to update, we have jumbo packet working on customer board. But it fails once PTP stack is enabled. + +Prasad, Jumbo packet support should have been working in NDK 2.24.00.11, but we don't validate that. There were many bug fixes between that release and NDK 2.42.02.31. Could be that one of those fixed jumbo packets, but nothing obvious stands out. Jumbo packets should also work with RAW sockets. I guess you already figured that out. Not familiar with PTP stack. Is that Precision Time Protocol? Is customer implementing that on top of NDK RAW sockets with jumbo packets enabled? We don't have any experience with that setup. I don't have much to offer. Let us know more details on the failure, and hopefully we can advise. ~Ramsey + +Hello Ramsey, Do you have the list of releases and bug fixes? Can you please point me to that? Yes, PTP is precision time protocol stack, the customer has implemented it on the top on NDK RAW sockets. It works normally without Jumbo but fails when jumbo enabled. Customer is looking if any issue in their stack. Meanwhile I wanted to check if any known issues with Jumbo and RAW sockets combination. + +Hello Ramsey, New information from customer - In PTP, there is a Raw Ethernet communication using the NDK's api 'recvnc()' which always returns -1. res=recvnc(sockfd, (void **)&ncbuf, MSG_DONTWAIT, &ncbufh); As the raw ethernet receive fails, it tries to re-initialise every time and hence it gets stuck there. Note: Without jumbo frames enabled, this functionality was working normally. Does this NDK package support jumbo frames (for raw ethernet mode) ? + +Prasad, Our expectation is that NDK RAW sockets should work with jumbo Ethernet frames. What is the error code when recvnc() returns -1? Please use the fdError() function (serrno.h) to retrieve the error code. Thanks, ~Ramsey + +Ramsey, Error code returned from fdError() is '9'. I guess this indicates 'Bad file descriptor' ? Regards, Pradyumna + +Pradyumna, I've looked at the code, but I don't see an obvious reason that recvnc() would set error to NDK_EBADF. As this error always happens on the first call to recvnc(), would it be possible to run in the debugger? This would allow you to step through the code and see why an error is being raised. Please note this function is an inline, the actual function name is NDK_recvnc() in the file /ti/ndk/stack/fdt/socket.c. If this is not possible, you will need to instrument the code by adding calls to DbgPrintf(). Then you will need to rebuild the NDK libraries. This post might help with the details. ~Ramsey + +Did this get resolved? + +Hi Ramsey, The issue with recvnc() is resolved. Ethernet frame data buffer was not long enough for incoming packets and the socket was being overwritten with garbage values. Thanks for the support. Regards, Pradyumna + diff --git a/data2/text/range/0-5000/715378.txt b/data2/text/range/0-5000/715378.txt new file mode 100644 index 0000000000000000000000000000000000000000..8993f7ace9e953e573174ce33f3edc7baa51adba --- /dev/null +++ b/data2/text/range/0-5000/715378.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: HDMI signals are not connected via companion IC TPD12S016RKTR + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TPD1E05U06 Is there any special reason why HDMI differential signal pairs CPU_HDMI_TX[0-2] and CPU_HDMI_TXC do not go through companion IC TPD12S016RKTR prior to external connector? + +Responses: +Hi Lim, Let me check on the reason and get back to you. Regards, Sujith + +The TPD12S016RKTR had too much capacitance for the TDA2 HDMI signals, and could not meet the HDMI electrical specifications. TPS12S016 data sheets states typical capacitance is 1.2pF. The ESD components used on the EVM (TPD1E05U06) has typical capacitance of 0.42pF. Additionally, the EVM implements voids in the ground plane beneath the ESD diodes to minimize the capacitance even more. Thanks Robert + diff --git a/data2/text/range/0-5000/715550.txt b/data2/text/range/0-5000/715550.txt new file mode 100644 index 0000000000000000000000000000000000000000..becc0b5f6dcbbda48291bafd7c3b390722162533 --- /dev/null +++ b/data2/text/range/0-5000/715550.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Usecase problem with logs over network + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, If somebody could help me with logs over network when linux runs on A15.. I am using PROCESSOR_SDK_VISION_03.03.00.00 on our custom board (RT-RK ALPHA board ). Trying to have logs over network (which I have now) and to run some of the Use-Cases, also over network. I have changed defaults.mk file, where now logs over network are enabled and logs over uart are disabled.. Also, there was no files like network_cons_tsk.c and network_cons_ipc.c linux, so i made them (sendig those as atachment), as proper makefile in same directory.. I looked in RTOS files and made conclusion that there are also 2 more functions that should be implemented in osa_ipc_que.c file (those are: Int32 OSA_ipcQueWriteString(OSA_IpcQueHandle * handle, const char pString[]); and Int32 OSA_ipcQueReadString(OSA_IpcQueHandle * handle, char pString[], UInt32 *strSize);) Problem appeared is that Use-Cases do not start every time i try to run them (when logs go over UART everything works fine). I have menu, but on the command to start UC nothing happends.. UC starts in one of 10 or more attempts, so, could you help me to figure out why is that happening? Thx a lot, Best regards, Nebojsa 1200.files.zip + +Responses: +Hello Nebojsa, Thanks for providing all details, this is useful for debug. I will check and let you know if any issues in porting the console tool. Meanwhile can you please try reducing priority of console threads instead of OSA_THR_PRI_DEFAULT? BTW can we please debug this issue on original thread? I see these two are exactly same. We can close this one. + +Hey, Thx for your quick answer. I'll try your suggestion (to reduce priority of console threads) and will keep you informed about the results. Yes, we can close this thread and continue to work in original one.. Regards, Nebojsa + +I'm continuing to write in the main thread e2e.ti.com/.../714772 + diff --git a/data2/text/range/0-5000/715584.txt b/data2/text/range/0-5000/715584.txt new file mode 100644 index 0000000000000000000000000000000000000000..ad6c3ad2a37d6260eed7ae9e0c55663e6c7511d9 --- /dev/null +++ b/data2/text/range/0-5000/715584.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA2: CCS5.4 crashes when launching the target configurations ( Vayu simulator, ubuntu 14.04) + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi, I have installed CCS5.4 on ubuntu 14.04, along with the Vayu simulator. When I try to launch a target configuration with Vayu, sometimes CCS crashes without any error and the other times gives the following error. The same scenario happens for Windows as well. I tried making new target configurations but the results are the same. I had posted the same question on CCS forum, but they directed me to ask this in TDA2x. Can anyone please help me resolve this issue? Regards, Shruti Joshi + +Responses: +Hello, Can you try with the latest CCS device support? Download it from here and install it. Hopefully, that will fix the problem, if not we can dig further. processors.wiki.ti.com/.../Device_support_files Thanks, Alex + +Hi Alex, I tried by installing the latest device support files, but I continue to see the problem. Can you please help me with that? One more query , on the device support files page, I downloaded the files for Automotive. But in the targetdb folder I do not see support files for module EVE. The error that I get is for EVE. Are there any latest packages available for EVE? Thanks, Shruti + +Hello Shruti, That I was afraid of. Unfortunately, CCSv5 along with the simulators are not supported/outdated with the latest register. However, it may be possible to fix this. That particular error you see, can you find the to TMS700C4X_regid.xml and delete the vcop.xml references? see if that will work, or you can even replace the reference with \ccs_base\common\targetdb\Modules\TDA2x\EVE1_VCOP.xml which is the latest xml. thanks Alex + +Hello Shruti, Did you manage to solve your issue? Can we close this thread? thanks, Alex + +Hi Alex, Sorry for the late response. Thanks a lot for the help. The issue is resolved and now the simulator is working fine. I had to remove some references from the 'vcop_sim_regs.xml' file as it was giving the same error for other registers as well. After these changes, the simulator started working. Below are the changes which I made: Will these changes affect any other functionality? Once again, thank you for helping me get this issue resolved. Thanks & Regards, Shruti + +Hello Shruti, Shruti Joshi said: Will these changes affect any other functionality? Once again, thank you for helping me get this issue resolved. Sure no problem, glad you got it fixed and thanks for confirming. Regarding the deleted reference: No, the simulator work shouldn't be affected by this as far as I know. Basically, these references are linking to xmls that are used by the CCS register view to display those registers. So if you are using the register view, you won't see the deleted registers(well because they are missing anyway). Thanks, Alex + diff --git a/data2/text/range/0-5000/715862.txt b/data2/text/range/0-5000/715862.txt new file mode 100644 index 0000000000000000000000000000000000000000..b654edf6350eb4eec60db2ce587ed5ae2bf98ef6 --- /dev/null +++ b/data2/text/range/0-5000/715862.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Compatible automotive gigabit ethernet phy + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DP83848Q-Q1 Does TI have any compatible automotive gigabit ethernet phy that works with TDA2SG? What I find in TI with automotive grade is DP83848Q-Q1 but is 100Mbps. + +Responses: +Hello Lim, Please give me some time. I am checking with our PHY team, will let you know once get details from them. Thanks. + +Prasad Jondhale said: I am checking with our PHY team Hello Lim, Can you please let us know the timeline by which you need the auto qualified PHY? + +Hi Prasad, We need it by 2nd week of Oct 2018. If it is not possible to have it by that time, we may consider to use DP83848Q-Q1 for this prototype and change it to Gigabit PHY in next design phase. Has DP83848Q-Q1 been tested with TDA2X? Regards Lim + +Hello Lim, Can you please drop me a mail at a0132233@ti.com so I can share TI auto PHYavailability details? Just want to confirm the our PHY timelines and if it aligns with your schedule. Thanks for understanding. + +Closing this thread as discussions ongoing on mail. + diff --git a/data2/text/range/0-5000/715926.txt b/data2/text/range/0-5000/715926.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d10eb6bee0c0c600dce0436bce2bf4456509c1d --- /dev/null +++ b/data2/text/range/0-5000/715926.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Lane Detection Algorithm in Rear Camera view + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone , I am trying to understand Lane Detection algorithm and I am referring to the "LaneDetection_DSP_Userguide.pdf" . I like to know whether it is possible to implement Lane detection algorithm in rear view camera . Is there any limitations if we implement the Lane detection algorithm in rear view camera . Regards , Surendar + +Responses: +It is designed for Front Camera configuration. If you have rear view similar to front camera view is should work. However it is not tested for rear view. If you have fisheye lens distortion, you may need to correct it before using this lane detect. + diff --git a/data2/text/range/0-5000/716142.txt b/data2/text/range/0-5000/716142.txt new file mode 100644 index 0000000000000000000000000000000000000000..2d6684f5e357336062965a641742a8e706bfc484 --- /dev/null +++ b/data2/text/range/0-5000/716142.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: tidl_OD Usecase on Linux platform + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Everyone , I like to know whether it is possible to run tidl_OD use case in TDA2xx EVM linux platform . If we could run , I like to know if there is anything we need to modify in the Usecase level to achieve this Regards , Surendar + +Responses: +Hi, Support for tidl_OD usecase is not been integrated in linux. You have run this on bios. Regards, Anuj + diff --git a/data2/text/range/0-5000/716159.txt b/data2/text/range/0-5000/716159.txt new file mode 100644 index 0000000000000000000000000000000000000000..4196e18c21eee367bb5b5adddd841d6c95120aae --- /dev/null +++ b/data2/text/range/0-5000/716159.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: VCOP and memory access + +Query Text: +Part Number: TDA2 Hi, Following is environment detail : Platform - TDA2X - EVM. VisionSDK 3.x I have a Link that runs on EVE and accesses the buffer allocated from shared memory (Say camera buffer from SDRAM) -- allocated via Vision SDK Link and Chain framework. I wanted to use write VCOP kernel and call it from EVE/ARP32, which would execute algorithm/computation on this buffer on VCOP and get the result back on EVE . However, it seems that: 1. VCOP would work always on IBUFLA, IBUFLB, IBUFHA, IBUFHB and WBUF internal memory. 2. VCOP Can not access DMEM of ARP32 3. EVE can access IBUFLA, IBUFLB, IBUFHA, IBUFHB and WBUF Queries : Q1. Can you please confirm understanding on #1, #2 #3? Q2. If this is the case, then is it expected to do memcpy/dma from external memory to VCOP internal memory before executing kernel on VCOP ? Q3. Is there is way to avoid this memory copy / block copy ? Thanks, Uday + +Responses: +Hi Uday, Please find my answers as follows: Q1. Can you please confirm understanding on #1, #2 #3? Understanding of #1 and #2 are correct. Regarding #3, what do you mean by EVE can access? If you meant ARP32 then yes ARP32 can access all the internal memories ( including DMEM) but the access is still dependent on the ownership of the buffer. Both ARP32 and VCOP cannot simultaneously access the same buffer. Q2. If this is the case, then is it expected to do memcpy/dma from external memory to VCOP internal memory before executing kernel on VCOP ? Yes, you need to DMA the data first from external memory to internal memories of EVE subsystem before VCOP can process it. Q3. Is there is way to avoid this memory copy / block copy ? No, this cannot be avoided as VCOP can only work with data being in internal memory of EVE (IBUF's and WBUF). Regards, Anshu + +Hello Uday, Please refer to the attached presentation. It covers the topics you are referring to: Q1. Can you please confirm understanding on #1, #2 #3? Your understanding is correct for #1, #2. For #3, I assume you meant ARP32 can access IBUFLA, IBUFLB, IBUFHA, IBUFHB and WBUF. Q2. If this is the case, then is it expected to do memcpy/dma from external memory to VCOP internal memory before executing kernel on VCOP ? Yes, this is correct. Q3. Is there is way to avoid this memory copy / block copy ? No there isn't any other way for VCOP to access external memory as there is no data cache, neither any direct access to memories other than the image buffers and working buffer. However the copy can be done concurrently with VCOP processing so you are not wasting any cycles as long as your compute cycles exceed the transfer cycles. Implementation of an EVE App.pdf + diff --git a/data2/text/range/0-5000/716319.txt b/data2/text/range/0-5000/716319.txt new file mode 100644 index 0000000000000000000000000000000000000000..f04662f6aeebe262f1fb9c165d0c242a7bfc5f1c --- /dev/null +++ b/data2/text/range/0-5000/716319.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2: TDA2X: monitor can't display any signal. can't install PROCESSOR_SDK_VISION program. + +Query Text: +Part Number: TDA2 To TI supporter, Our company bought TDA2X system that serial number is VA1 707002(TDA2X), the systematic tool has PCBA, monitor and power adaptor. Our purpose is success to run PROCESSOR_SDK_VISION program that include board test. However, we hit a dead end and need your help: The monitor is always black (no signal output) after system power on/boot up. How to let the system work and display the information on the screen?(We suspected that the system is boot up because the controller became hotter after power on. We do not know how to let the information output on the monitor.) How to install PROCESSOR_SDK_VISION program then execute board test program? We would like to have your fully support to setup TDA2X system. Looking forward to hearing from you soon. Thank you. + +Responses: +Hi, You can download Processor SDK Vision from: http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html Look at VisionSDK_Getting_Started_Guide.pdf and VisionSDK_UserGuide_TDA2xx.pdf on how to run Vision SDK. Regards, Rishabh + +Hi Rishabh, Thanks your answer, but my monitor can't display any signal(black screen), how can i do? Regards, Ken Huang + +Hi, Have you gone through the docs as suggested by Rishabh. You first need to build the sdk and prepare sd card then using that you can run the usecase ans see the same on monitor. Regards, Anuj + +Hi Anuj, Ok, got it. I want to know where can find VisionSDK_Getting_Started_Guide.pdf and VisionSDK_UserGuide_TDA2xx.pdf. Thanks Regards, Ken Huang + +Hi, It is in the docs folder. You need to install Vision SDK (both linux and windows versions are available in link given above). Regards, Rishabh + +Hi, Ok, so i just need to install PROCESSOR_SDK_VISION_03_04_00_00.exe by sd card, then the monitor can run. is right? Regards, Ken Huang + +Hi, You need to install and build Vision SDK. Then you should copy MLO and AppImage to SD card and boot TDA2 in SD boot mode. As I mentioned previously refer to docs for details. Regards, Rishabh + +Hi, Sorry, can more detail? I can't understand from docs. can you teach me at here? What is install and build Vision SDK, MLO and AppImage? Thanks Regards, Ken Huang + +Ken, Can you be specific what exactly you did not understand from the docs. I have clearly specified the documents you need to read. "What is install and build Vision SDK, MLO and AppImage?" You need to install PROCESSOR_SDK_VISION_03_04_00_00.exe. Then you need to build the source code. MLO and AppImage are executable generated on building SDK. Regards, Rishabh + +Hi, About "Build VISION SDK" is use computer to run(folder TI components)? Then i can acquire MLO and Applmage,and copy these to SD card. Thanks Regards, Ken Huang + +Hi Ken, You need to build Vision SDK from PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\build folder. Detailed instructions are given in "Chapter 3 Build and Run" of VisionSDK_UserGuide_TDA2xx.pdf. After that you need to copy MLO and AppImage to SD card and boot the EVM in SD boot mode. Regards, Rishabh + +Hi Rishabh, I only have version of PROCESSOR_SDK_VISION_03_03_00_00 now, i can't found VisionSDK_UserGuide_TDA2xx.pdf from PROCESSOR_SDK_VISION_03_03_00_00_Docs_Only. And this version's install step is same ? Thanks Regaeds, Ken Huang + +Hi Ken, You need to download and install PROCESSOR_SDK_VISION_03_04_00_00.exe from software-dl.ti.com/.../index_FDS.html Regards, Rishabh + +Hi Ken, There has been no activity on this thread for many days. Can we close the thread? Regards, Rishabh + diff --git a/data2/text/range/0-5000/716329.txt b/data2/text/range/0-5000/716329.txt new file mode 100644 index 0000000000000000000000000000000000000000..0b7bfbeacfb8d054f6db3996afddc23b017e55bc --- /dev/null +++ b/data2/text/range/0-5000/716329.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3XEVM: DCAN Assertion issue.. + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2, SYSBIOS Hello team, One of my customer who are using TDA2/TDA3x is facing issue for DCAN assertion. The issue is similar to the below e2e issue. But they are not resolved after modified that below post recommended. Here're the logs below. [IPU1-1] 30.071188 s: Id[0x739] [IPU1-1] 30.071646 s: Id[0x73A] [IPU1-1] 30.073110 s: Id[0x73B] [IPU1-1] 30.101201 s: Id[0x73C] [IPU1-1] 30.101659 s: Id[0x73D] [IPU1-1] 30.103123 s: Id[0x73E] [IPU1-1] 30.131184 s: Id[0x73F] [IPU1-1] 30.171201 s: Id[0x739] [IPU1-1] 30.171628 s: Id[0x73A] [IPU1-1] 30.173122 s: Id[0x73B] [IPU1-1] 30.201213 s: Id[0x73C] [IPU1-1] 30.202403 s: Id[0x73D] [IPU1-1] 31.102360 s: Assertion @ Line: 400 in C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/modules/dcan/utils_dcan.c: status == 0 : failed !!! [IPU1-1] 31.102574 s: [IPU1-1] 31.102635 s: ### XDC ASSERT - ERROR CALLBACK START ### [IPU1-1] 31.102696 s: [IPU1-1] 31.102848 s: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details. [IPU1-1] 31.102940 s: [IPU1-1] 31.102970 s: ### XDC ASSERT - ERROR CALLBACK END ### [IPU1-1] 31.103062 s: [IPU1-1] 31.103367 s: ti.sysbios.gates.GateMutex: line 99: ti.sysbios.gates.GateMutex: line 99: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details. [IPU1-1] 31.103580 s: xdc.runtime.Error.raise: terminating execution Could you please to guide how to fix it? Best Regards, Ernest + +Responses: +Hi Ernest, Can you please ask the customer to step through the code and see where exactly it is failing? Also ask them to increase 'freeQ' and 'rxMsgQ' size to 50 and try it. Please let me know their observation after this. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +H Ernest, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek, Sorry for late response and thank you for your consideration. They already did your guides but the issue still happened. But they solved this issue by modifying below. - SDK reference CAN source use 1 mailbox and receive 1 message, so they modified it to use 8 mailbox and changed msgIdentifierMask. Thank you. Best Regards, Ernest + diff --git a/data2/text/range/0-5000/716332.txt b/data2/text/range/0-5000/716332.txt new file mode 100644 index 0000000000000000000000000000000000000000..9436a0b2186b3cec673e87e065627dbce792dce5 --- /dev/null +++ b/data2/text/range/0-5000/716332.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: Host emulation build for SDK0304 + +Query Text: +Part Number: TDA2 hi,dear In the paper called deep learning user guide , I could not bringup the host emulation mode ,the ref information and the error as following: The command is so simple, however it did not work. Could you please help me figure out how to set it ? BR + +Responses: +Hi, You need source code release of TIDL to build in host emulation mode. Do you have access to it? Thanks, Praveen + +No,I did not have that code. However I really saw the makefile. There is the ./src directory in the make process. Could you please kind enough to offer me the code? I want to research that and do some important examples to show the capability of tda2x processer. If it can do well (especially DL related algorithm) and develop easily , there will be more cooperation. + +Hi, Source code will be shared only through CDDS. Please contact you local TI FAE to get access to CDDS account and source code release. Thanks, Praveen + +Any other method? The communication process of the FAE in China is too Inefficient. Let me offer you the order of your company's TDA2x EVM, is it OK ? + +No, I cannot help here further. Please contact your local TI representative only, that is the only way many customer got the source code. Thanks, Praveen + +In fact, the representative delayed me so long. I could not get the feedback from him/her. How can I get forward to my work? Could I talk the manager with yours or the departmant manager? + +Hi , The TIDL Host emulation is NOT needed for running a CNN network on TI device (It is only needed for de-bugging purpose). The binary release available in VSDK package could run CNN inference in TI devices, use this binary release for your network deployment. Regards, Kumar.D + +hi, dear Now although I bought serveral tda2x boards, I have only got part service from the TI tech support in Shanghai of China. I could not get the source code of TIDL. So if I want to run my improved cnn model , I can only run it on the tda2x board not on PC simulator. I have imported the cnn model to the bin format which is suitable for TIDL. Yet the input data need to be resize to 368 X 368，and I should resize it by myself( It has to be the TI method to resize). Even worse, the configuration file (only seg , ssd detection included)on the tda2x board looks like that below: TIDL Configuration parameters ----------------------------- ################################################################################ IMP: Make sure the size of the file names (excluding extension) is not more than 8 characters. ################################################################################ inputWidth=1024 inputHeight=512 inputFile=IN.RGB outputFile=OUT.BIN netFileName=NET.BIN paramFileName=PRM.BIN My cnn net is not for detection or classifcation, but pose recognition. I do not know if I can use this demo cfg file to run my cnn model successfully on the tda2x. If not , could you please be kind enough to offer me new cfg file or make some change for me to run? tks, looking forward to your reply. + +Hi, this question is discussed here: e2e.ti.com/.../723315 I will close this thread. Regards, Yordan + diff --git a/data2/text/range/0-5000/716448.txt b/data2/text/range/0-5000/716448.txt new file mode 100644 index 0000000000000000000000000000000000000000..2e47be24f7e209641eebe6fef49a83e98c2f3892 --- /dev/null +++ b/data2/text/range/0-5000/716448.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TDA2X: monitor can't display any signal. can't install PROCESSOR_SDK_VISION program. + +Query Text: +Part Number: TDA2 To TI suporter: How to install SDK VISION program. I can't understand from docs. What is install and build Vision SDK, MLO and AppImage? We would like to have your fully support to setup TDA2X system. Looking forward to hearing from you soon. Thank you. Regards, Ken Huang + +Responses: +Hi Ken, This query is already supported in another thread. Kindly don't start new threads on same topic. Regards, Rishabh + +Hi, Ok, sorry. I worried about another thread is be resovled and not notice. you can delete it. Regards, Ken Huang + +Hi Ken, Ok I am closing this thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/716456.txt b/data2/text/range/0-5000/716456.txt new file mode 100644 index 0000000000000000000000000000000000000000..57ea77139ec43ab6934e60c657807ff944c824b4 --- /dev/null +++ b/data2/text/range/0-5000/716456.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: null_src_decode_display test problem + +Query Text: +Part Number: TDA2 Tool/software: Linux I tried to test null src test case for H.264, but it failed and showed error. 1: Single Camera Usecases 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported)\ Enter '1' for H.264 1 ASSERT (nullSrcLink_tsk.c|NullSrcLink_create|1083) The print log showed the data file is 1920x1080_00.h264 and index file is 1920x1080_00.hdr. [HOST] [HOST ] FILEREAD NOT DISABLE [HOST] [HOST ] Data file:/home/1920x1080_00.h264 [HOST] [HOST ] Index file:/home/1920x1080_00.hdr Could you please let me know where to get these test files? I had test files 1280x720, or maybe you can let me know how to change the file path? root@dra7xx-evm:/home# ls -al -rw-rw-rw- 1 1000 pulse 615343 Nov 18 2017 1280x720_00.h264 -rw-rw-rw- 1 1000 pulse 200 Nov 18 2017 1280x720_00.hdr Any help will be appreciated. Thank you. Regards, Ellen Shiu + +Responses: +Hi, Please check here where to get .h264 stream and how to generate corresponding index file (.hdr): e2e.ti.com/.../2551574 e2e.ti.com/.../2551636 Regards, Yordan + diff --git a/data2/text/range/0-5000/716621.txt b/data2/text/range/0-5000/716621.txt new file mode 100644 index 0000000000000000000000000000000000000000..2f0f1ef228c7ee4acc4b8038c1c1b7d5d73ac8ad --- /dev/null +++ b/data2/text/range/0-5000/716621.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: NOR FLASH using TDA2XX and QNX + +Query Text: +Part Number: TDA2 hi, I am using TDA2XX board an qnx software.sd boot is working here but i try to boot based on NOR flash using QNX in tda2xx , its not working so please can u share switch settings for NOR flashing. i tried our vision sdk datasheet and QNX datasheet for NOR FLASH. thanks kalai + +Responses: +The DIP switch on EVM represents the setting for SYSBOOT0~15. Please refer to page 7539 in TDA2x ADAS Applications Processor Public Technical Reference Manual (Rev. E) www.ti.com/.../sprui29 You should find SYSBOOT[5:0] = 110101 is for NOR Flash boot. + +HI, thanks for your reply. NOR FLASH IN TDA2xx with QNX this pin setting is not working .i used TDA2xx vayu evm xc5777x cpu board assy 516580 REV H board, so please tell the pin settings SW2,SW3 and SW5. thanks kalai + +HI, thanks for your reply. NOR FLASH IN TDA2xx with QNX this pin setting is not working .i used TDA2xx vayu evm xc5777x cpu board assy 516580 REV H board, so please tell the pin settings SW2,SW3 and SW5. thanks kalai + +HI , i made all switch combination of this board .i got error like this,so please give the solution. thanks kalai + +Hi Kalai, This is QSPI NOR flash. Hence you should try QSPI boot. Also can you have one thread instead of multiple threads with similar questions. Regards, Rishabh + diff --git a/data2/text/range/0-5000/716752.txt b/data2/text/range/0-5000/716752.txt new file mode 100644 index 0000000000000000000000000000000000000000..fc8d9aca8102c68cd4551cd08ab0bc8ca75f12c7 --- /dev/null +++ b/data2/text/range/0-5000/716752.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: TDA2x + +Query Text: +Part Number: TDA2 Dear TI, We are working on TIDL now, refer to: VisionSDK_UserGuide_TI_DeepLearning.pdf, I can't access the link: https://cdds.ext.ti.com/ematrix/common/emxNavigator.jsp?objectId=28670.42872.30602.25095 stated inside this doc. due to lack of "CDDS user account". Can you advise us how to get the CDDS account? Thanks and best regards He Wei Team leader for System Architectures and Deep Learning + +Responses: +Dear TI, In addition, to try on the TIDL use case in the VSDK, it require the configure file, network file, parameter file and usecase input file, Where can I get these files? He Wei Team leader for System Architectures and Deep Learning + +Hi He Wei, you need to contact your local TI FAE to get access to CDDS (it requires NDA to be signed). The example files for TIDL Usecase can be found in "PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\tools\TIDL_files". Regards, Yordan + diff --git a/data2/text/range/0-5000/716968.txt b/data2/text/range/0-5000/716968.txt new file mode 100644 index 0000000000000000000000000000000000000000..5bde397c2d1d48e16d406b35a5678767dff4e1e1 --- /dev/null +++ b/data2/text/range/0-5000/716968.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: assembly optimization + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: MATHLIB Tool/software: Linux is there any examples of assembly optimization in SDK? vlib_c66x_3_3_0_3 and vxlib_c66x_1_1_1_0 there examples are use Inline instruction！ so i am thy to assembly optimization some fuction,but no sample to follow! + +Responses: +Hi Shuai, Since you are looking at vxlib I assume you are interested in DSP optimization. If so please check this post by Jesse for a list of DSP optimization reference guides and trainings: e2e.ti.com/.../2371691 Regards, Yordan + +Hi: Yordan this is a sample function , document have give out its Linear Assembly code. c code c code i just call it , Assembly code how to call , i put Assembly code in .asm file ? int dot(short a[], short b[]) { int sum0 = 0, sum1 = 0, sum, I; for (I = 0; I < 100/2; I+= 2) { sum0 += a[i] * b[i]; sum1 += a[i + 1] * b[i + 1]; } return sum0 + sum1; } Linear Assembly for Dot Product _dot: .cproc a, b .reg sum0, sum1, I .reg val1, val2, prod1, prod2 MVK 50,i ; I = 100/2 ZERO sum0 ; multiply result = 0 ZERO sum1 ; multiply result = 0 loop: .trip 50 LDW *a++,val1 ; load a[0-1] bank0 LDW *b++,val2 ; load b[0-1] bank2 MPY val1,val2,prod1 ; a[0] * b[0] MPYH val1,val2,prod2 ; a[1] * b[1] ADD prod1,sum0,sum0 ; sum0 += a[0] * b[0] ADD prod2,sum1,sum1 ; sum1 += a[1] * b[1] [I] ADD -1,i,i ; I-- [I] B loop ; if (!I) goto loop ADD sum0,sum1,A4 ; compute final result .return A4 .endproc BESTWISHES SHUAI + +Hi Shuai, you can use separate .asm file for your assembly code or include it in .c file with: asm(" Some Assembly \n\t" " Some Assembly \n\t" ... " Some Assembly \n\t" ); but this option is better suited for small fragments of assembly code. You can check for example "/ti_components/algorithms/mathlib_c66x_3_1_0_0/" - there are quite a lot functions implemented in .asm files. Regards, Yordan + diff --git a/data2/text/range/0-5000/717196.txt b/data2/text/range/0-5000/717196.txt new file mode 100644 index 0000000000000000000000000000000000000000..e308fe89f0c8bb5a4521ba274f2979b9d6c520a8 --- /dev/null +++ b/data2/text/range/0-5000/717196.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: ABB mode + +Query Text: +Hi sir, Could you pls explain the ABB feature of LDO in detail? Tks so much BR jason_Koo + +Responses: +Please provide complete details - what device are you asking about? + +it is TDA2x， picture as attachment. + +Hi jason_Koo, can you check if you can find what you look for in "ADAS Power Management" application note: www.ti.com.cn/.../sprac22.pdf and also this training: training.ti.com/introduction-adas-power-management-software Regards, Yordan + +Hi Yordan， Thank you for help! BR Jason Koo + diff --git a/data2/text/range/0-5000/717323.txt b/data2/text/range/0-5000/717323.txt new file mode 100644 index 0000000000000000000000000000000000000000..a902cc528b7b70a3738632417e440b1dee1ab6c2 --- /dev/null +++ b/data2/text/range/0-5000/717323.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Vision SDK 3.03 DDR test resets the board + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello all, When I run Vision SDK 3.03 PDK example for DDR test on TDA2px board, and when test gets to particular address on EMIF1 (0x9BFF1000) or EMIF2 (0xBDFF1000), it restarts the board and starts executing the test again. When I run DDR test example from Vision SDK 2.12. it executes with no problems. Do you maybe know why that happens, is there a problem with SBL or with the test? Best regards, Bosko + +Responses: +Hi, This looks like a watchdog timer reset. Can you check if watchdog timer is disabled. Regards, Rishabh + diff --git a/data2/text/range/0-5000/717612.txt b/data2/text/range/0-5000/717612.txt new file mode 100644 index 0000000000000000000000000000000000000000..4144f0b179af1da0c2af036e102c3d6c5e9241e4 --- /dev/null +++ b/data2/text/range/0-5000/717612.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EVM5777: Install Packages in VisionSDK Linux + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Helllo, I am running PROCESSOR_SDK_VISION_03_03_00_00 Linux on TDA2x and I need to install packages like minicom or nano. Is it possible to install packages into the rootfs in the compile environment? What is the correct way to install packages into VisionSDK Linux? I attempted two different methods to install packages and was unsuccessful in both methods. Method 1: I attempted to use opkg, but when I try to use the command opkg update the command gives me wget errors: root@dra7xx-evm:~# opkg update Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Downloading lcpd.gt.design.ti.com/.../Packages.gz. wget: bad address 'lcpd.gt.design.ti.com' Collected errors: * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. * opkg_download_backend: Failed to download lcpd.gt.design.ti.com/.../Packages.gz, wget returned 1. root@dra7xx-evm:~# Method 2: When I attempt to cross compile the packages on my development computer by downloading them and using ./configure && make, I would get errors where I would need to install something like coreutils, and when I attempt to install that, I would get lower level errors. Thank you, -iFer + +Responses: +Hi iFer, Regarding the Method 1: although the file system supports the ability to derive from Yocto feeds and do an update like the "opkg update", you would need to point it to a relevant publicly accessible feed or a private feed that you set up. As far as I know, there is no public feed that can help you achieve the desired result in this method. Please let me know if you are aware of any public feeds that I can try. Regarding the Method 2: I need more details to comment on the errors that you are facing. but this method wouldn't be my recommendation. The easiest method would be to just add the minicom and nano packages into your Yocto filesystem image, and generate the opkg and transfer/install to the target. Regards Karthik + diff --git a/data2/text/range/0-5000/717622.txt b/data2/text/range/0-5000/717622.txt new file mode 100644 index 0000000000000000000000000000000000000000..9af430521de66596b4c3ff1bcbef1c7d4893d08e --- /dev/null +++ b/data2/text/range/0-5000/717622.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: TIDL: NET_OD.bin and PRM_OD.bin are missing in SDK v3.4 + +Query Text: +Part Number: TDA2 Dear support staff, NET_OD.bin and PRM_OD.bin are required to run TIDL OD demo. They could be found in SDK v3.3 but there are missing in SDK v3.4. Could you help check? Below lists the files under \PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\tools\TIDL_files IN.RGB NET.BIN NET_SEMSEG.BIN PRM.BIN PRM_SEMSEG.BIN Ref_out.bin TIDLCFG.TXT tidl_net_jdetNet_ssd.bin tidl_param_jdetNet_ssd.bin TIDL_SSD_CFG.TXT Below lists the files under \PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\apps\tools\TIDL_files IN.RGB NET.BIN NET_OD.BIN NET_SEMSEG.BIN PRM.BIN PRM_OD.BIN PRM_SEMSEG.BIN Ref_out.bin TIDLCFG.TXT + +Responses: +Hi Luke, TIDL OD use-case uses TIDL_SSD_CFG.TXT file to read & parse information of required input files You can specify the netFileName & paramFileName depending on which one you want to use With VSDK 3.4 release below files are used netFileName - tidl_net_jdetNet_ssd.bin paramFileName - tidl_param_jdetNet_ssd.bin Regards Surya + +Surya, Thanks for the prompt reply. I'm not aware of the change in SDK v3.4, sorry. + diff --git a/data2/text/range/0-5000/717657.txt b/data2/text/range/0-5000/717657.txt new file mode 100644 index 0000000000000000000000000000000000000000..99899aca00a148fb93d41b7d54f5b1857d0c4d30 --- /dev/null +++ b/data2/text/range/0-5000/717657.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: TDA2 - 'Undefined reference Error' + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I am working with VisionSDK 3.1. I am trying to add a new usecase in vision_sdk/apps/src/hlos/adas/src/usecases. The main function that I have used is Void chains_lvdsVipMultiCam_opencvcanny_SgxDisplay(Chains_Ctrl *chainsCfg) which is defined in the corresponding usecase .c file. This function was called in vision_sdk/apps/src/hlos/adas/src/common/chains_main.c which includes a header #include . The function was declared in the above mentioned header. While compiling I am getting the following error. # apps: tda2xx-evm: Creating archive apps.a # apps: tda2xx-evm: Linking /home/vkchlt0160/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(chains_main.o): In function `main': chains_main.c:(.text.startup+0x1ee): undefined reference to `chains_lvdsVipMultiCam_opencvcanny_SgxDisplay' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/links_a15_algorithm.a(algorithmLink_cfg.o): In function `AlgorithmLink_initAlgPlugins': algorithmLink_cfg.c:(.text+0x18): undefined reference to `AlgorithmLink_OpenCVCanny_initPlugin' collect2: error: ld returned 1 exit status make[6]: *** [exe] Error 1 make[5]: *** [demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 How can I solve this. + +Responses: +Hi Blessy, Better to use tda2xx_evm_linux_opencx config while building OpenCV applications Ensure your new use-case added to uc_cfg.mk file & to LINUX_TDA2XX_UC_LIST under vision_sdk\apps\configs\cfg.mk file Regards Surya + +Hi Surya, I tried compiling with tda2xx_evm_linux_opencx. I am still facing the same issue. Infact the number of errors increased. Usecase is defined in cfg.mk and uc_cfg.mk # apps: tda2xx-evm: Linking /home/vkchlt0160/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/apps.a(chains_main.o): In function `main': chains_main.c:(.text.startup+0x1b6): undefined reference to `chains_lvdsVipMultiCam_opencvcanny_SgxDisplay' chains_main.c:(.text.startup+0x1fa): undefined reference to `chains_vipSingleCamOpenCVOpenCLDilationSgxDisplay' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_algorithm.a(algorithmLink_cfg.o): In function `AlgorithmLink_initAlgPlugins': algorithmLink_cfg.c:(.text+0x14): undefined reference to `AlgorithmLink_FrameCopy_initPlugin' algorithmLink_cfg.c:(.text+0x18): undefined reference to `AlgorithmLink_OpenCVCanny_initPlugin' algorithmLink_cfg.c:(.text+0x1c): undefined reference to `AlgorithmLink_OpenCVOpenCLDilation_initPlugin' + +Hi Blessy, You need to add "chains_lvdsVipMultiCam_opencvcanny_SgxDisplay" to MAKEFILE_adas.MK file under vision_sdk/apps/src/hlos All algorthim link init plugins are under #ifdef in algorithmLink_cfg.c file Could you share your cfg.mk file in use-case folder (need to check which all ALG enabled) ? Regards Surya + +Hi Surya, The new use-case i have added is "lvds_vip_multi_cam_opencvcanny_sgx_display". I have included this use-case in MAKEFILE_adas.MK as ifeq ($(UC_lvds_vip_multi_cam_opencvcanny_sgx_display),yes) $(MAKE) -fMAKEFILE.MK -C$($(MAKEAPPNAME)_PATH)/src/hlos/adas/src/usecases/lvds_vip_multi_cam_opencvcanny_sgx_display MODNAME=$(MAKEAPPNAME) CORE=a15_0 $(TARGET) endif I am not able to attach the cfg. mk file. Below are the contents of cfg.mk ALG_dmaSwMs=yes ALG_opencvcanny=yes NEED_PROC_IPU1_0=yes NEED_PROC_A15_0=yes + +Hi, 1st make sure your build system is not broken. Try a clean build without adding the new usecase. I hope after changing any cfg file you are doing a clean build. Please share the output of make showconfig. Regards, Anuj + +Hi, Is the issue resolved? If yes, then please close the thread as there is no activity since a long time. Regards, Anuj + diff --git a/data2/text/range/0-5000/717713.txt b/data2/text/range/0-5000/717713.txt new file mode 100644 index 0000000000000000000000000000000000000000..b267774324a056bcc95b1b035c639c3701a8f202 --- /dev/null +++ b/data2/text/range/0-5000/717713.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2EVM5777: how to add new sensor to TDA2 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, TDA2PXEVM Dear TI I would like to include in new sensor to the TDA2. How or where can i create it to do that? + +Responses: +Hi Wilson, You can check this Application Note: processors.wiki.ti.com/.../PDK_Application_Notes_Video_Driver_Porting and also Chapter 3 in "vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_ISS_SensorFrameWork.pdf" Regards, Yordan + +Hi Yordan Can i ask what is ISS stands for? + +Hi Wilson, It's Imaging Sub-System. Regards, Yordan + +Hi Yordan I wouls like to ask what is the follow abbreviation DCC H3A GLBCE AEWB Also is it a must for me to code them? On top of this ISS is it suitable to run in TAD2EVM5777 if i am going to add this new sensor? From the VisionSDK it seem like its for the TDA3xxEVm and TDA2PxEVM instead. + +Hi Wilson, These components are used in the ISS usecase, ISS is present in TDA3x and TDA2Px It is not supported in TDA2Ex. DCC = Dynamic Camera Configuration H3A = Statistics generation module for AE and AWB. GLBCE = Global and Local Contrast and brightness Enhancement AEWB = Auto Exposure and White Balance Rgds, Brijesh + +Hi Brijesh So if that the case how can i should i go about for the a new sensor then? + +Wilson, You could capture from RAW Bayer data from the new sensor on TDA2x/TDA2Ex, but since there is no ISS, you will require SW solution to process and convert RAW data into YUV. The other way is, you could use YUV sensor. Rgds, Brijesh + +The Brijesh in other words can i say there is no algo in the SDK to help us to process this Ray Bayer. I have to code it myself. + +yes + +Dear Brijesh I notice there are 2 type of yuv which format i should be convering the bayer to? + +Wilson, DSS supports both YUV420 (Semi-planar) and YUV422 (Interleaved) data format. So if you could convert RAW to one of these data format, dss will be able to display it. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/717777.txt b/data2/text/range/0-5000/717777.txt new file mode 100644 index 0000000000000000000000000000000000000000..c1283b095d850b11766575adcb973a2c12810d98 --- /dev/null +++ b/data2/text/range/0-5000/717777.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVM footprint library file + +Query Text: +Part Number: TDA2 Could TI share with me the EVM footprint library file to ease my development with time saving by re-use the footprint? + +Responses: +Hi, You can find EVM's Design files (PCB drawings, assembly drawing, schematic, etc.) here: www.ti.com/.../tda2evm5777 Regards, Yordan + diff --git a/data2/text/range/0-5000/717790.txt b/data2/text/range/0-5000/717790.txt new file mode 100644 index 0000000000000000000000000000000000000000..70eb44d82cec7680750e8f11bc656462c0971f38 --- /dev/null +++ b/data2/text/range/0-5000/717790.txt @@ -0,0 +1,14 @@ +Ticket Name: DRA74: TDP of DRA74 + +Query Text: +Part Number: DRA74 For the TDP on DRA74 or TDA2 If we already have the power consumption of the chip, how do we get the TDP value? What is the conversion efficiency between the two? We downloaded the model data of TDA2 on the official website as follows, can the Power(W) value of 2.568 be fixed? Should we fill in the power consumption or TDP? + +Responses: +waiting + +Feng, The thermal design power estimate should be based on a realistic load for your application running on the SoC, generally considering a run-time in the 'minutes' range. You should contact your local TI representative to fill out a "resource loading" for your application, and we can use that to provide a power estimate. Is that how you got the 2.568W number that you quote? Regards, Kyle + +Hi Kyle 2.568W is a default value in the thermal simulation model of the official website. We have already filled in the "resource loading" you mentioned. According to the basic principle of the circuit, power (P) = current (A) × voltage (V).we calculate that the total power (P) is 15W. But you know, thermal design power (TDP) is not the same as power (P). TDP refers to the thermal effect of CPU current and other forms of heat. We want to know the TDP value for the thermal design. + +Feng, We do not specify a single TDP value for the SoC. You are right that 15W is almost certainly too high of a power estimate to make sense for thermal analysis. In general, the Resource Loading (and resulting power estimate) can be populated with different analysis types in mind. From a PMIC capacity perspective, the load on any given processor(s) and domain(s) whether concurrent or serialized must be met by the PMIC so in this case configuring all cores active with relatively high load may make sense. From a thermal analysis perspective, a different approach should be followed. There is no single right answer. You can either reduce the utilization for each core to a value that makes sense over an extended period of time (minutes). Or you can define multiple resource loadings representing different time slices of activity for the SoC (1 second high activity, 5 second moderate activity 10 second idle, repeat...). This must be done with a knowledge of the application, and can't simply be derated based on a TDP value. Regards, Kyle + diff --git a/data2/text/range/0-5000/717841.txt b/data2/text/range/0-5000/717841.txt new file mode 100644 index 0000000000000000000000000000000000000000..013f717b2d973920ce3abbbf42a35cdb164785dd --- /dev/null +++ b/data2/text/range/0-5000/717841.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: How configured the message object for receive data frame + +Query Text: +Part Number: TDA2 Hi , I used vision sdk 03.03.00.00, and I want to know how configured the message object for receive data frame. As followed the TRM chapter 24.9.4.7.3, I must set the arbitration bits (ID[28:0] and Xtd bit) before I received the frame. However, I could not know the identifier of the frame. Regards, Tianxing + +Responses: +Hi Tianxing, VSDK have DCAN demo available. You can enable it by 'DCAN_INCLUDE=yes' in '\vision_sdk\apps\configs\tda2xx_evm_bios_all\cfg.mk' This demo is available in '\vision_sdk\apps\src\rtos\modules\dcan'. Please refer this for more details as it contains how to configure DCAN message RAM/mailboxes. This will also have CAN messages IDs for sent and received messages. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/718022.txt b/data2/text/range/0-5000/718022.txt new file mode 100644 index 0000000000000000000000000000000000000000..6c326a913d9e26660b16025f9633040b52b18087 --- /dev/null +++ b/data2/text/range/0-5000/718022.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Dose TDA2X have an autorun script? + +Query Text: +Part Number: TDA2 Hi, I want TDA2X to be able to select sensor I specify and load SRV usecase automatically when power on. What do I need to do? \ Regards, Daniel + +Responses: +Hi, Do you want to enable in case of BIOS or Linux ? Regards Surya + +Hi, Surya, Both of them are needed. Regards, Daniel + +Hi Daniel, No such script is there But with few modifications i.e by disabling read char and hard coding the demo use-case number you can still do it In case of BIOS: ------------------------- 1. Define CHAINS_DISABLE_GET_CHAR in file chains_main_bios.c (under vision_sdk\apps\src\rtos\common) 2. Copy the SRV UC config (refer chains_main_bios_multi_cam.c --> switch case 2) inside below block in file chains_main_bios_viison.c (under vision_sdk\apps\src\rtos\common) #ifdef CHAINS_DISABLE_GET_CHAR #endif 3. Rebuild the vision_sdk In case of Linux: ------------------------- 1. Instead of ch = getchar() in file chains_main.c (under vision_sdk\apps\src\hlos\adas\src\common) hard code the demo use-case number ch = 2 (to select mulicam uc ) ch = 3 (to select srv uc) 2. Rebuild the vision sdk Regards Surya + +Hi Surya, Thanks for your reply. I will try it. Regards, Daniel + diff --git a/data2/text/range/0-5000/718243.txt b/data2/text/range/0-5000/718243.txt new file mode 100644 index 0000000000000000000000000000000000000000..58d6b813c89e9a435685fce631362fb1d4ee8f06 --- /dev/null +++ b/data2/text/range/0-5000/718243.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Print Statics is not showing results about A15 core + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Everyone, I am running linux platform VSDK 3.4 on TDA2XX ,Usecases and all are working fine without any hassles . However when I try to print performance statics after every usecase ("P" in the console) I am not getting logs usage statics on A15 core and it starts from DSP1 only . How can I get A15 core usage statics or is there any limitations in VSDK3.4 . Regards , Surendar + +Responses: +Hi Surendar, Linux itself provides multiple tools to display the A15 load (such as top, mpuload etc.). Thus, the print-statistics option on VSDK doesn't record the load on A15. You may find this thread useful. e2e.ti.com/.../709101 Regards Shravan + diff --git a/data2/text/range/0-5000/718244.txt b/data2/text/range/0-5000/718244.txt new file mode 100644 index 0000000000000000000000000000000000000000..5ec749aea071f08ebe58df5fc725786dbe9e0201 --- /dev/null +++ b/data2/text/range/0-5000/718244.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Why crystal for xi_osc1 input is different from xi_osc0? + +Query Text: +Part Number: TDA2 I am referring to VAYU EVM schematic, is there any special reason why xi_osc1 uses 22.5792MHz crystal but not 20MHz crystal, same as what is used at xi_osc0? Notice that the 20MHz crystal specification can fulfill the requirements stated for xi_osc1. + +Responses: +Hi, OSC1 is optional and only OSC0 is mandatory for the device. OSC1 is useful for on-chip audio peripherals and allows you to use an 'audio frequency', one example of such is 22.5792MHz. If you are currently designing a PCB, place a crystal footprint for OSC1 - you can decide for the crystal frequency or for no-pop at later time. Regards, Stan + diff --git a/data2/text/range/0-5000/718362.txt b/data2/text/range/0-5000/718362.txt new file mode 100644 index 0000000000000000000000000000000000000000..b5fdc59fcb8b8b047419997e381db2a7f42e753f --- /dev/null +++ b/data2/text/range/0-5000/718362.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Source code of SFM + +Query Text: +Part Number: TDA2 Recently，I have been reading the vision SDK of TDA2 ，and know TI has finished SFM（structure-from-motion）algorithm based eve and DSP，I found some core module is not open source，and some question to ask as shown below 1.Whether or not all code of SFM is open soure , and any open plan? 2.How can I get down these open source? Thank you ! + +Responses: +SFM algorithm only available as object form (Libarary). No plans to make it open source. Regards, Kumar.D + diff --git a/data2/text/range/0-5000/718464.txt b/data2/text/range/0-5000/718464.txt new file mode 100644 index 0000000000000000000000000000000000000000..e066b230ea6683836a62b448ea15ef4c27b36ac7 --- /dev/null +++ b/data2/text/range/0-5000/718464.txt @@ -0,0 +1,27 @@ +Ticket Name: Linux/TDA2: How to run demo program (apps.out) automatically after boot up? + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear Support, I'm running Processor SDK Vision Linux on TDA2x. The following are the steps to run demo program, 1. login as root 2. manually input below commands a. cd /opt/vision_sdk b. source ./vision_sdk_load.sh c. ./apps.out Is there any way to run the program automatically after boot up? If yes, could you provide a verified example? I'm seeing the following similar post (for AM437x) but I'm not sure if it is applicable for TDA2x. + +Responses: +Hi, Which VSDK version are you using? Regards, Anuj + +Hi, Anuj I'm using Processor SDK Vision Linux v3.4. The steps to run demo program is the same since v3.1. + +Hi, Attached a couple of files that need to be copied to the root-fs to autolaunch the VSDK app on startup (remove the .txt from the filenames from both files when adding to the file-system). Please note the logs don’t show up on UART and the VSDK app needs to be modified to select a chain by default and user input needs to be disabled (else the menu will keep printing in a loop and increase CPU load). The vsdk.service file needs to be copied to /etc/systemd/system/multi-user.target.wants/ and the autorun.sh needs to be copied to /opt/vision_sdk/. Ensure both files have executable permissions. The logs are redirected to /tmp/vsdk.log. Regards Shravan vsdk.service.txt [Unit] +Description=Launching Vision SDK App +After=rc.pvr + +[Service] +ExecStart=/bin/sh /opt/vision_sdk/autorun.sh +Restart=always +Type=simple + +[Install] +WantedBy=multi-user-target + + autorun.sh.txt echo "Inside the script" > /tmp/vsdk.log +cd /opt/vision_sdk +./vision_sdk_load.sh >> /tmp/vsdk.log +./apps.out >> /tmp/vsdk.log + diff --git a/data2/text/range/0-5000/718574.txt b/data2/text/range/0-5000/718574.txt new file mode 100644 index 0000000000000000000000000000000000000000..b1c596148272e8258915ba3bd49260f2fba4272e --- /dev/null +++ b/data2/text/range/0-5000/718574.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2PXEVM: Video display and network transmission runtime error + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, I am developing with the fusion application board and SDI OV2775 camera module. My objective is to read in the video stream from the image sensor at 1080p 30 fps and simultaneously send it to the HDMI output for display and over Ethernet to be saved on my computer. Below is configuration file I have used to generate this usecase: I was running into the procId < SYSTEM_PROC_MAX error, but I was able to resolve that thanks to the previous related post. However, now I am stuck on a runtime error in which the video displayed is very dark i.e., overhead fluorescent lights appear as dim neon green strips. When I run the included 1 channel ISS usecase, the video looks normal. My bigger issue, however, is that when I run the network RX tool to save the incoming frames, then try to view the resulting YUV files, they show up as completely blank, unlike the dark images that are displayed on the monitor. Attached are the associated files for my usecase: chains_iss_Capture_NetworkTx.zip Help with either of these issues would be greatly appreciated. Thanks, Richard + +Responses: +Hi Richard, Please note that the capture output is in Bayer Raw format, so it might not be viewable, unless sensor has good exposure. Are you sure that adding network link is causing artifacts in the output? Can you disable network write (essentially do not connect) and see if it gives good output? Rgds, Brijesh + +Hi Brijesh, I am aware that the IssCapture output is in Bayer Raw format, which is why I feed its output into the IssM2mIsp, which converts into YUV format, which can be displayed? Would I need to also add the IssM2mSimcop link to increase exposure? I am not saying that adding the network link is causing artifacts in the output, I am saying that the frames I save over the network while my usecase is running don't seem to contain viewable data. Attached is such a frame: 2318.test.zip The display output is the same when I disable the network write. Thanks, Richard + +Hi Brijesh, After adding the AEWB link, the video feed looks fine now. However, now I am no longer able to save frames over the network at all, when I try to do so, the following connnection error appears: At first I thought I had neglected to enable the relevant output queue, but my app_util_iss.c settings looked fine: I know the RSZ_A and H3A queues are working because the video feed is displayed and the automatic exposure/white balance is applied. Would a data transmission rate greater than that supported by the connection cause the server connect failure? Currently both my PC and TDA2 board are on a 100 Mbps network, but streaming 1080p video at 30 fps would take up ~1 Gbps? I have tried adding in both MJPEG and H264 compression before transmission, but I get the same error. Attached are the files for my usecase: iss_capture_network_tx.zip Thanks, Richard + +Richard, Yes, without AEWB, the output will not look good. Could you please check if NDK is enabled in your build? Please note that NDK and SD card both can not be enabled. Please check this. Rgds, Brijesh + +Hi Brijesh, NDK was enabled in my build, and now I have disabled the FAT. However, the network error persists. Thanks, Richard + +Hi Brijesh, My usecase is working now, I think my problem was a combination of missing some analagous code from the example usecases and having some unnecessary analagous code from the example usecases. Thanks, Richard + diff --git a/data2/text/range/0-5000/718622.txt b/data2/text/range/0-5000/718622.txt new file mode 100644 index 0000000000000000000000000000000000000000..73a484ed37d61be2294c26bb661b21e69d5b2364 --- /dev/null +++ b/data2/text/range/0-5000/718622.txt @@ -0,0 +1,40 @@ +Ticket Name: Linux/TDA2: Difference between vip_Single_Cam_objectdetection2 and tidl_OD + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi , I have few questions to get clarified on 1) I like to know what is difference between vip_Single_Cam_objectdetection2 and tidl_OD . I believe both are doing the same TSR+PD+VD ? On what basis it is differentiated 2) Vip_single_cam_object detection2 requires any bin file? (like NET.prm which we use in tild_OD). If it requires I like to know where it is used in the usecase. if not how it is detecting the vehicles 3) Is it possible to port vip_Single_Cam_objectdetection2 into linux platform? is there any dependencies on this + +Responses: +1. vip_Single_Cam_objectdetection2 Uses HOG + Adaboost for Object detction , tidl_OD uses SSD for object detction. 2. No it Vip_single_cam_object detection2 does not need net NET.prm 3. Yes you can. Refer the vip_Single_Cam_objectdetection2 use case doc for modules and used by this use case + +Hi Kumar , thank you for clarifying it , I like to know whether it is possible to port tidl_OD in linux . We feel that tidl_OD will be better than objectdetection2 . So can you kindly suggest that porting tidl_OD is possible or not in linux . Regards, Surendar + +Hi, Porting of tidl_OD usecase on linux is not been integrated or tested. If you want to do then you can start and let me know if you face any issue. Regards, Anuj + +Hi, There is no update on this thread since a long time. Is there issue resolved? Regards, Anuj + +Hi , I am working on it , if there is any issues Ill update on this same thread Regards , Surendar + +Hi Anuj , I have followed following steps to run tidl_OD usecase on linux platform 1) Copied tidl_OD usecase and paste it in under adas/src/usecase folder 2) Copied object detection and tidl algplugins and paste it in under adas/src/alg_plugins 3) for the above folders I have modified the makefile respectively 4) In apps/src/hlos/adas/include/chains.h added "Chains_tidlOD" 5) in vision_sdk/apps/src/hlos/MAKEFILE_adas.mk added the path for tidl usecase like below $(MAKE) -fMAKEFILE.MK -C$($(MAKEAPPNAME)_PATH)/src/hlos/adas/src/usecases/tidl_OD MODNAME=$(MAKEAPPNAME) CORE=a15_0 $(TARGET) 6) in vsdk/apps/configs/tda2xx_evm_linux_all/uc_cfg.mk added tidl_OD folder usecase as "yes" 7) in vsdk/apps/configs/cfg.mk added tidl_OD usecae under "LINUX_TDA2XX_UC_LIST" when i compiled using "make -s -j depend && make -s -j " I am getting the following error : PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/include/chains.h:125:55: fatal error: ti/drv/vps/include/platforms/bsp_platform.h: No such file or directory kindly help me in resolving this issue Regards, Surendar + +Hi , I resolved that issue by changing the path of header files from to . Now I got the following error PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/include/chains_common_tidl.h:92:22: fatal error: itidl_ti.h: No such file or directory This has to do the with path , I have set the environment for tidl in /home/vkchlt0206/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux/env.mk as same below tidl_INCLUDE= $(tidl_PATH)/modules/ti_dl/inc export tidl_INCLUDE Still I am getting the same error . Kindly advise did I miss any thing Regards , Surendar + +Hi, Any updates on this + +Hi, Have you added the tidl path as include in includes_a15.mk file. You have to add as -I option. Please take rtos reference. Regards, Anuj + +Hi Anuj , can you tell me rtos reference file so that i could add tidl path as similar to that in includes_A15 file. I couldn't find the path Regards , Surendar + +Hi Anuj , Any updates on this Regards, Surendar + +Hi Anuj , Any updates on this + +Hi, Sorry for the delayed reply. Please add below line in includes_a15.mk as done in rules_m4.mk INCLUDES += -I$(tidl_INCLUDE) Regards, Anuj + +Hi Anuj, I have added the line you mentioned in includes_a15.mk . I have clean compiled and still I am getting the same error as below /PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/include/chains_common_tidl.h:92:22: fatal error: itidl_ti.h: No such file or directory I have also tried adding the line in the UC MAKEFILE.MK and I am getiing the same error . Kindly advise me where I went wrong Regards , Surendar. + +Hi, Try to build without -s option and check while building chains_tidlOD.c what all package are getting include. Check how the path for those packages has been provided in the makerules and add similarly for the tidl. Regards, Anuj + +Hi, Are you able to resolve the issue. Regards, Anuj + +Hi Anuj , I am not currently working on this . So we can close this issue as of now + diff --git a/data2/text/range/0-5000/718669.txt b/data2/text/range/0-5000/718669.txt new file mode 100644 index 0000000000000000000000000000000000000000..c7344161a1894e7e496809c3551bd7d08e9e0148 --- /dev/null +++ b/data2/text/range/0-5000/718669.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Are there any step by step tutorials regarding how to use TI's deep learning Libs + +Query Text: +Part Number: TDA2 Hi, I'm new in TDA2. So far, I'd like to use TI's deep learning Libs to fulfil some applications. Are there any step by step tutorials regarding how to use this Libs or any suggestions? Thanks. + +Responses: +Hi, Refer below User guides 1. \ti_components\algorithms\REL.TIDL.01.01.01.00\modules\ti_dl\docs\TIDeepLearningLibrary_UserGuide.pdf 2. \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_TI_DeepLearning.pdf Regards Surya + +Hi, Referring User guides, are you able to build & integrate TIDL libs to your application ? Can We close this thread ? Regards Surya + +Yes, thanks. + diff --git a/data2/text/range/0-5000/718684.txt b/data2/text/range/0-5000/718684.txt new file mode 100644 index 0000000000000000000000000000000000000000..1d553ed20660a296f76837ca5898d4cc7bf7151b --- /dev/null +++ b/data2/text/range/0-5000/718684.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TDA2x TIDL Deep learning setup + +Query Text: +Part Number: TDA2 Dear TI, I am trying to setup the TIDL deep learning framework. Firstly I set up the below from github in Linux Ubuntu: caffe-jacinto caffe-jacinto-models Based on the instruction, I need to build (make) for caffe-jacinto but face face different build error due to various dependency from either cuDNN or other dependncy, e.g. the current error is: CXX src/caffe/blob.cpp In file included from ./include/caffe/common.hpp:48:0, from ./include/caffe/util/cudnn.hpp:7, from src/caffe/blob.cpp:4: ./include/caffe/util/device_alternate.hpp:10:20: fatal error: nvml.h: No such file or directory #include ^ compilation terminated. Can you provide a pre-build package? (So we can focus on our the DL traning and parameter generation) Thanks and best regards He Wei + +Responses: +Hi He Wei, TIDL prebuilt libs are part of Vision SDK release You can find in below folder \ti_components\algorithms\REL.TIDL.01.01.01.00 Regards Surya + +Hi He Wei, Are you able to get VSDK working with TIDL prebuilt package ? Regards Surya + +Dear Surya, We decide to use general Caffe and TensorFlow on PC Host for training due to some limitation on TIDL caffe-jacinto, e.g. must be in Linux and must use GPU.. Thanks and best regards He Wei + diff --git a/data2/text/range/0-5000/718698.txt b/data2/text/range/0-5000/718698.txt new file mode 100644 index 0000000000000000000000000000000000000000..2699865fd652985c1366dcc7ca85f32f1f2a56fc --- /dev/null +++ b/data2/text/range/0-5000/718698.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2PXEVM: TDA2P custom board - NVMe SSD - DMA Usage + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Hi TI, we are having issues while writing files to SSD (Intel Optane 900P) over NVMe using our custom TDA2P board. Write speed is good but the CPU load is around 80 percent. We would like to see if we are using DMA/eDMA for this transfer. The SW running on TDA2p is linux/SDK. Do you have propositions for lowering this CPU load? Regards, Stefan. + +Responses: +Hi Stefan, Can you please provide the commands used to write to SSD? Reason I ask is if commands such as dd are used it could involve mem copy increasing the load. Also can you provide a snapshot of top when the writes are performed. DMA can be used to write to the SSD, however with the SSD servicing as an EP the DMA writes must be triggered by the SSD (most end-points trigger DMA read / writes, host only programs registers to trigger events such as DMA copy). Regards Shravan + +Hey Shravan, we are writing to a preallocated 8GB file (fallocate) and then just write (system write) to it. root@dra7xx-evm:/# top top - 12:01:23 up 6 min, 2 users, load average: 1.50, 0.66, 0.27 Tasks: 106 total, 3 running, 103 sleeping, 0 stopped, 0 zombie %Cpu(s): 0.2 us, 85.4 sy, 0.0 ni, 12.1 id, 2.1 wa, 0.0 hi, 0.2 si, 0.0 st KiB Mem : 1819728 total, 133908 free, 58388 used, 1627432 buff/cache KiB Swap: 0 total, 0 free, 0 used. 1715276 avail Mem PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND 1214 root 20 0 1208 456 288 R 75.0 0.0 0:35.31 a.out 75 root 20 0 0 0 0 R 70.1 0.0 0:08.41 kworker/u4:3 Regards, Stefan. + +Hi Stefan, Can you confirm that you're A15 is running at 1.8GHz? Please set the scaling governor to "performance" by running the below command. echo "performance" > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor Regards Shravan + +Hi Shravan, we have modified our .dts file so it runs on 1800MHz. Please note the bolded part of the following command. root@dra7xx-evm:~# omapconf show opp OMAPCONF (rev v1.73-17-g578778b built Thu Aug 31 13:16:54 IST 2017) HW Platform: Generic DRA74X (Flattened Device Tree) DRA76X ES1.0 GP Device (STANDARD performance (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.4.84 Author: root@rtrkn096-lin Toolchain: gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) Type: #5 SMP PREEMPT Date: Thu Aug 16 14:47:18 CEST 2018 |-----------------------------------------------------------------------------------| | | Temperature | Voltage | Frequency | OPerating Point | |-----------------------------------------------------------------------------------| | VDD_CORE / VDD_CORE0 | 42C / 107F | NA | | NOM | | L3 | | | 266 MHz | | | DMM | | | 266 MHz | | | EMIF1 | | | 266 MHz | | | EMIF2 | | | 266 MHz | | | LP-DDR2 | | | 666 MHz | | | L4 | | | 266 MHz | | | IPU1 | | | (2128 MHz) (1) | | | Cortex-M4 Cores | | | (1064 MHz) (1) | | | IPU2 | | | 2128 MHz | | | Cortex-M4 Cores | | | 1064 MHz | | | DSS | | | 192 MHz | | | BB2D | | | (2128 MHz) (1) | | | | | | | | | VDD_MPU / VDD_CORE1 | 43C / 109F | NA | | PLUS | | MPU (CPU1 ON) | | | 1800 MHz | | | | | | | | | VDD_GPU / VDD_CORE2 | 42C / 107F | NA | | HIGH | | GPU | | | 532 MHz | | | | | | | | | VDD_DSPEVE / VDD_CORE3 | 41C / 105F | NA | | NOM | | DSP1 | | | 750 MHz | | | DSP2 | | | 750 MHz | | | EVE1 | | | 535 MHz | | | EVE2 | | | 535 MHz | | | | | | | | | VDD_IVA / VDD_CORE4 | 43C / 109F | NA | | HIGH | | IVA | | | 532 MHz | | | | | | | | |-----------------------------------------------------------------------------------| Notes: (1) Module is disabled, rate may not be relevant. Regards, Stefan. + +Hi Stefan, I've had the look at the driver and below are some observations / comments: 1. I don't think using DMA will decrease the sytem load. Since the SSD card acts as an endpoint, DMA is initiated from the SSD (and not the TDA2P board) 2. The load in the system could be due to the copies involved between user and kernel space To avoid user-space copies, you can use the splice commands. In your final use-case, you want to write camera streams to the SSD, the data from the camera streams is exported to Linux as a DMA-buf file-descriptor (refer Documentation/virt-mem-export.txt in the Linux kernel and /hlos/src/links/ipcIn/ipcInLink_drv.c in VSDK). Since the input is also a file, splice is a classic command to copy data between two files without copy between user-space and kernel space. You can find more information here. blog.plenz.com/.../so-you-want-to-write-to-a-file-real-fast.html Please note let the output file (file written to SSD), needs to still be pre-allocated using fallocate (in-fact comparison with and without fallocate is mentioned in the above blog-post). Regards Shravan + diff --git a/data2/text/range/0-5000/719019.txt b/data2/text/range/0-5000/719019.txt new file mode 100644 index 0000000000000000000000000000000000000000..acbbb8a8beb61fe86f61282713f2cf8fef9eb079 --- /dev/null +++ b/data2/text/range/0-5000/719019.txt @@ -0,0 +1,34 @@ +Ticket Name: RTOS/TDA2: What HDMI output seem like has crop when TDA2 receive 12 bits data from DVP of image sensor. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We need receive 12 bits data from DVP of image sensor. I refer VIP Input Data Width section of PDK_Application_Notes_Video_Driver_Porting.pdf to modify videoIfWidth parameter to FVID2_VIFW_16BIT. But seem like image has crop as below Could you please give me some advise? Many thanks. + +Responses: +P.S. VIP port : 1A VSDK revision : V03.04.00(04-Jul-2018) Test use case : Chains_vipSingleCam_Display(); + +Hi, You mean, it captures full frame over 8bit interface, but crops it in 16bit interface?? Could you please help me understand issue. Rgds, Brijesh + +Hi Brijesh, Yes we image sensor will output YUV420SP + 12 bits data width from DVP port. As TI document suggest if we need receive data width more than 8 bits that need to changing "videoIfWidth" to FVID2_VIFW_16BIT.(Original is FVID2_VIFW_8BIT) Image sending frame to TDA2 but crops just occurs when "videoIfWidth" has modified FVID2_VIFW_16BIT.(FVID2_VIFW_8BIT is OK) Hope above will help we in same page. + +Update information as below. We use OV10635 to output YUV 8 by DVP interface and modify "videoWidth" parameter to compare. videoIfWidth = FVID2_VIFW_8BIT => DVP data width = 8bits videoIfWidth = FVID2_VIFW_16BIT => DVP data width = 10 bits, 12 bits, 14 bits When "videoWidth = FVID2_VIFW_16BIT" seem like frame has crops. Test environment: + +Hi, How are displaying 12/10 bit YUV data? Display does not support YUV422 in 10bit. Also please note that 10/12bit YUV422 will be stored in 16bit container. You need to convert it into 8bit packed as supported by display.. Rgds, Brijesh + +Hi Brijesh, Thanks for replying. I don't change any setting of display link. I just change all FVID2_VIFW_8BIT setting to FVID2_VIFW_16BIT of capture link. About data stored in container have any document can sharing? + +Hi, It is not about changing display link. Display HW does not support 10bit YUV data. You need to convert it into 8bit YUV data.. Data will be stored as shown below in 16bit container. Here 'x' is your bit value 000000xx xxxxxxxx Rgds, Brijesh + +Hi Brijesh, Do you mean what ever I receive YUV 8 or 12 bits width data from DVP of image sensor finally that all needs to convert to 8 bits YUV data if we want pass it to display link? Could you please show me where are data container in SDK? Thanks for your support. + +Yes, Display does not support more than 8bits per color component. Rgds, Brijesh + +Hi Brijesh, Last question is where are capture data container in SDK? I will create new ticket if have any concern. Many thanks. + +Hi, I did not get the question.. Regards, Brijesh + +Hi Brijesh, My question is what function or data structure of SDK that are you say image frame container? I can trace the function or data structure to study. Hope above description is helpful. + +Hi Prince, From the VIP point of view, VIP supports only 8bit per component data type. For more than 8bit per color component, we treat 10/12 bit each component as if it is YUV422 and configure VIP accordingly. This is why the output is in 16bit container. Rgds, Brijesh + +Hi Brijesh, Thanks for your support. I will create new ticket if I have any concern. Have nice day~~ + diff --git a/data2/text/range/0-5000/719338.txt b/data2/text/range/0-5000/719338.txt new file mode 100644 index 0000000000000000000000000000000000000000..073b0019f3699813a1f307868e037b32d2991dbb --- /dev/null +++ b/data2/text/range/0-5000/719338.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2: TDA2x SD BOOT : + +Query Text: +Part Number: TDA2 How does the video display and ALG_TIDL run asynchronously? Meaning is, the video real-time display frame rate of 25, ALG_TIDL can not be real-time frame rate of about 10. + +Responses: +Hi, Please press p after 2 min of running your usecase. You will get all links statistics. Regards, Anuj + +Hi, Anuj Gupta You may not understand what I mean, I want the display and algorithm to be time-sharing. I don't know how to achieve it. Thanks! Mary + +Hi, Can you please elaborate what you want to know. video display and ALG_TIDL are running synchronously. Means the output of ALG_TIDL will go to video display. If ALG_TIDL is running at 5 fps the video display will be running also at 5 fps. Regards, Anuj + +Hi, Anuj Now the usecase run is synchronous, just like you said “video display and ALG_TIDL are running synchronously”.But I want to implement asynchronous, that is, the display of the video is not synchronized with TIDL. The video display runs separately and TIDL runs alone. Thanks! Mary + +Hi, Running them asynchronous is not possible as the links are interlinked to each other i.e. the output of 1 link is connected to the input of other link. If ALG_TIDL will not give output at suppose 30 fps the display will not get data at 30 FPS so display will not be able to run at that speed. Regards, Anuj + +Hi, Anuj Whether the results can be output through global variables, the result of multi-frame TIDL may be the same. That is, TIDLlink is not connected to the display link. The output of TIDL simply changes the value of a global variable. I tried it and it seems that it is not feasible. Thanks! Mary + +Hi, UInt32 frameSkipMask = 0x24924924; // 20 fps Frame skipping is to skip the frame when it is displayed, or to skip the frame when it is captured.Can you tell me how to use this parameter(frameSkipMask )? Thanks! Mary + +Hi, frameSkipMask is to skip the frame while capturing /**< * Frame Skip Mask (bit0..bit29) bitN = 1 Skip frame, * bitN = 0 DO NOT skip frame * Example, 0x0 for no frame skip, 0x2AAAAAAA for skipping * alternate frames. Regards, Anuj + +Hi, Thank you for your answer！ Mary + +Hi, If it answers your question then please close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/719341.txt b/data2/text/range/0-5000/719341.txt new file mode 100644 index 0000000000000000000000000000000000000000..84052be560d6e1c58cd4637943d96781229f10ae --- /dev/null +++ b/data2/text/range/0-5000/719341.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: TDA2x + +Query Text: +Part Number: TDA2 SD card boot, run ALG_TIDL on the DSP, what should you pay attention to? How to set “ Void chains_tidlDsp_SetAppPrms(chains_tidlDspObj *pUcObj, Void *appObj) ”like this : Void chains_tidlDsp_SetAppPrms(chains_tidlDspObj *pUcObj, Void *appObj) { chains_tidlAppObj *pObj = (chains_tidlAppObj*)appObj; /* Null Source Parameters */ setNullSrcPrm(pObj); /* TIDL Pre Process */ pUcObj->Alg_tidlpreprocPrm.outPad = TIDL_MAX_PAD_SIZE; pUcObj->Alg_tidlpreprocPrm.numOutputQueues = NUM_PIPELINES; pUcObj->Alg_tidlpreprocPrm.procMode = TIDLPREPROC_LINK_PROCMODE_RGBPAD; /* * Set the TIDL algorithm parameters for all the 'NUM_PIPELINES' instances. */ /* TIDL on DSP1 */ pUcObj->Alg_tidl_1Prm.cacheInvInBuf = 1; pUcObj->Alg_tidl_1Prm.cacheWbOutBuf = 1; pUcObj->Alg_tidl_1Prm.pAlgCreateParams = pObj->pAlgCreateParams; //pUcObj->Alg_tidl_1Prm.curCoreId = TIDL_COREID_EVE1;//myz pUcObj->Alg_tidl_1Prm.curCoreId = TIDL_COREID_EVE1; //pUcObj->Alg_tidl_1Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE1;//myz pUcObj->Alg_tidl_1Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE1; pUcObj->Alg_tidl_1Prm.ocmcAddr = NULL; /* Null Link */ if(TRUE == pObj->enableOutFileWrite) { pUcObj->NullPrm.appCb = dumpOutCb; pUcObj->NullPrm.appCbArg = pObj; } else { pUcObj->NullPrm.appCb = NULL; pUcObj->NullPrm.appCbArg = NULL; } } + +Responses: +Hi, Sorry, I did not under stand your question. the above function is used to set app prms for usecase running on dsp. Regards, Anuj + +Hi, Anuj Yes, I set app prms for usecase running on dsp, but DSP operation results are wrong . Thanks, Mary + +Hi, Actual TIDL alg runs on EVE only i.e. different convolution layers. Regards, Anuj + +Hi, Anuj When I chose to run TIDL on eve, the result was correct. When I chose DSP to run TIDL, the result was wrong. I do not know why. For a simple example, when I run TIDL, I use usecase f: TIDL Usecase, and then select "1: DSP" to run the result is wrong, but when I choose "2: EVE", the result is correct. Thanks! Mary + +Hi, TIDL running on eve will give the proper result as it does the complete processing there. If you run TIDL on DSP then it will not do the complete processing for different layers so result is not proper. If you want to know the difference in processing of TIDL while running on DSP vs EVE. Then please raise a new thread with a proper subject and proper explanation of your question. Regards, Anuj + +Hi, OK, Thanks! Mary + +Hi, Please close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/719722.txt b/data2/text/range/0-5000/719722.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5ef5a831cf7552e0b5e333248ce72d1ac47b2fe --- /dev/null +++ b/data2/text/range/0-5000/719722.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: O9039A387IZWSRQ1 Design Specifications + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TPS659039-Q1 Are you able to provide the design specifications of O9039A387IZWSRQ1, similar to what have been stated in datasheet TPS659039-Q1 as below? Thanks. + +Responses: +Hello CTY, The latest settings of the TPS659039-Q1 are listed in this user's guide: www.ti.com/.../swcu175 OTP 0x87 is the same as OTP 0x44 except SMPS123 (MPU) and SMPS7 (CORE) have default voltages of 1.15V. Regards, Karl + +I guess you meant SMPS123 and SMPS7 voltages are changed to 1.15V, right? Thank you for the user guide, it clears my doubt. + +Hi, Yes, it should be SMPS123 and SMPS7. Thanks, Nastasha + diff --git a/data2/text/range/0-5000/719860.txt b/data2/text/range/0-5000/719860.txt new file mode 100644 index 0000000000000000000000000000000000000000..c3eac9af7bc35922e922afdb908ea4c2c3feffea --- /dev/null +++ b/data2/text/range/0-5000/719860.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Integrating multi kernel + +Query Text: +Part Number: TDA2 Hi guys, I am trying to integrate two kernel in the eve applet with BAM,but the graph creation fails with this error message: printf("Graph construction failed!!! Decrease the value of BLK_WIDTH or BLK_HEIGHT\n"); I tried with: --> block width =8 & block_height=8 -->node list,edge list & the parameters i checked. Any help is appreciated. Regards Surbhi + +Responses: +Hi Surbhi, This indicates that with current block sizes the internal memory is not enough. Given that you are already trying a very small block size I am suspecting that some of the parameter's for the BAM node is not correct. Can put a break point at BAM_autoAllocMemRec function and step in to see which parameter is in-correct. This is the function where all the internal memories are allocated. Regards, Anshu + +Hi Surbhi, Were you able to make progress on this issue? Regards, Anshu + diff --git a/data2/text/range/0-5000/720135.txt b/data2/text/range/0-5000/720135.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c2d0058d75045a087839af04759f2fc560a7c95 --- /dev/null +++ b/data2/text/range/0-5000/720135.txt @@ -0,0 +1,32 @@ +Ticket Name: RTOS/TDA2: PROCESSOR_SDK_VISION_03_04_00_00 link error + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, Recently found a problem with PROCESSOR VISION_SDK_V03_04 That is, in EVE_sw_01_19_00_00_00/apps_nonmam, I base on evelib_fir_filter_2d.c, add a few new eve programs, use eve_algo_dma_auto_incr.c It contains the following functions, and packaged into libeveapps.eve.lib EVELIB_getBestBlockDimensions, EVELIB_algoDMAAutoIncrInit, EVELIB_algoDMAAutoIncrDeInit, EVELIB_algoDMAAutoIncrConcurrent,EVELIB_algoDMAAutoIncrSequential, EVELIB_algoDMAAutoIncrProcess When you make, you find the following problem. It seems that libeveapps_opticalflow.eve.lib also includes these programs of the same name, and it does not have source code, but it is needed in the alg-_plugins algorithm. How can I solve it?! Now I just disable denseopticalflow all function . + +Responses: +Hi Casper, Dense optical flow is not release as part of EVE SW and it turns out that denseopticalflow library has same name for some of the functions which are used in apps_nonbam. If you are trying to link both the libraries together you will have this issue. Can you just rename the names of the function in any one of them so that there is no conflict. Regards, Anshu + +Anshu, For short term solution , it's good suggest. But next EVE version , TI must corrected. Regards, Casper + +Casper, The functions present in apps_nonbam folder are example functions and are there mostly for reference. Please refer other applets outside apps_nonbam folder to develop any new applets. These API's will not have conflicts with any existing applets. We don't have any plan to fix this in future. Regards, Anshu + +I don't think so. This TI release SOP ? Our own function is base on this development. One a little bug still bug. IT's TI ? IT's TI? NO SOP ? + +These Dense optical flow applet already conflicts with MY applets. These Dense optical flow applet already conflicts with MY applets. + +These Dense optical flow applet already conflicts with MY applets. + +Dear Casper, Thanks for identifying the behavior. Can you help me understand your usage: 1. Do you want to use dense optical flow library in your product? Please note that from TI it is delivered as a reference demo library from our partner network. If you are using it in your product, you should make sure that we get you in touch with that partner. 2a. If the answer to above question is yes, then while you work with the partner for productization of the library, you can also work on making sure that the symbols being used by dense optical flow library don't conflict 2b. If the answer to above question is NO, then I understand that the issue doesn't impact you now. Thanks, With Regards, Pramod + +The conflicting program is placed in the EVE function library, and the library of the optical flow function uses the same name as the previous appnonbam. The correct method should use the original function instead of adding one. 2b. If the answer to above question is NO, then I understand that the issue doesn't impact you now. NO, But dense optical flow library impact my own applet. Please "NOTE" 2a and 2b you question is same "NOT IMPACT" + +2A and 2B is same question. + +TI expert, When you understand that this is wrong, not to fix this problem, but to dig a hole to solve, the next time you will be dig another hole. Is your TI SOP ? And TI demo source code just for demo , can't production and need to find tune or create our own algorithm and applet . I have question , how about TI SW release SOP ? For example , I use TI vision sdk 4 years. I found same place variable in each different version, have uppercase or lowercase issue. Why change ? I think, it's NOT need to change. It is depend on you programmer like or not. It is not right. It is my personal suggest and ask my own. By the way, may be other TI customer will as same question to you when them use app_nonbam. Casper Tu + +Pramod, Please post your comments/questions on the same thread. Regards Karthik + +Hi Caser, We will fix in DOF library the usage of symbols in upcoming SDK release. Thanks, With Regards, Pramod + +Hi Casper, Processor SDK-Vision (aka Vision SDK) v3.06 addresses this issue www.ti.com/.../processor-sdk-tdax Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/720198.txt b/data2/text/range/0-5000/720198.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c76f542d1ba3cb7916aeb166e0208c23b998fb5 --- /dev/null +++ b/data2/text/range/0-5000/720198.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: horizontal flip support on TDA2x + +Query Text: +Part Number: TDA2 Hi, I know that ISS ISP RSZ in TDA3x supports horizontal flip. Does VPE or Other Block in TDA2x support horizontal flip function? Regards JP Park + +Responses: +Hi JP, VPE in itself does not support any flipping. But you could use Tiler to flip the images.. Rgds, Brijesh + +Hi Brijesh, Thank you for your reply. ok. I will try the flipping using Tiler. Regards JP Park + diff --git a/data2/text/range/0-5000/720231.txt b/data2/text/range/0-5000/720231.txt new file mode 100644 index 0000000000000000000000000000000000000000..73bb9dc61880be4b351d03177ad36cbc0c598926 --- /dev/null +++ b/data2/text/range/0-5000/720231.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TIDL import tensorflow model issue + +Query Text: +Part Number: TDA2 hi，dear The same question with " https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/692723 The detailed infor lists as following: I referred the section 3.6.5, optimized frozen graphs for MobileNet and tried to run the generated .pb but it's also showing error in tidl_log.txt file as : " TF Model File : ..\..\test\testvecs\config\tensorflow_models\mobilenet\mobilenet_v1_1.0_224_final.pb Could not find the requested input Data : MobilenetV1/MobilenetV1/Conv2d_0/Relu6 !! " It seems TIDL does not support the layer "MobilenetV1/MobilenetV1/Conv2d_0/Relu6" , right? Looking forward to your reply! + +Responses: +Yes, we may not have support in import tools, but TIDL library has support for Rlu6. So, you can modify import tool to import this Relu6 layer. Thanks, Praveen + diff --git a/data2/text/range/0-5000/720259.txt b/data2/text/range/0-5000/720259.txt new file mode 100644 index 0000000000000000000000000000000000000000..3eeb2193418998ba820baaedfd7fc4c66883fcdc --- /dev/null +++ b/data2/text/range/0-5000/720259.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Recommended way to use EDMA in HLOS usecase + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I'm using Processor SDK 3.03 on Linux with kernel 4.16.7, building for custom board with TDA2 chip. I was wondering what is the recommended way to use EDMA in a HLOS usecase. While working with RTOS I used utils_dma.c but I can't seem to find anything like that in HLOS. Thank you in advance. Regards, Nick + +Responses: +Nick, Can you please confirm on the Linux kernel version - have you been referring to the Processor SDK Linux Automotive releases - these are based on kernel version 4.4 Typically for HLOS use case, the DMA is programmable from within the kernel as you would be programming the Physical address es for DMA parameters and you would want this to be validated and programmed from the kernel. On linux we have dmaengine I/F www.kernel.org/.../index.html and implementation for EDMA that subscribes to this interface on TI platforms. Various device drivers inside the kernel use dmaengine I/F. There are no direct API for using DMA from userspace applications on Linux + +Hi Sriram, The kernel 4.16.7 is on my build machine and the one that is built and ran on the board is the one present in PSDK 3.03 (4.4.84). Is there any good example among the device drivers where I can see how dmaengine is used? Also, the link you provided is dead. Thank you in advance. Nick + +NIck For the link itself, there is an appended ")" at the end of the URL which needs to be removed. I tried fixing it on the previous post, but somehow it is not taking effect. More details on the implementation, device driver usage and testing is described under www.kernel.org/.../provider.html www.kernel.org/.../client.html www.kernel.org/.../dmatest.html + diff --git a/data2/text/range/0-5000/720326.txt b/data2/text/range/0-5000/720326.txt new file mode 100644 index 0000000000000000000000000000000000000000..26a9149d631b030507582656e9c35ad3da634bc1 --- /dev/null +++ b/data2/text/range/0-5000/720326.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: Use vout1_fld as Vin3a_clk0 + +Query Text: +Part Number: TDA2 Hi, We will use Vin3a pin and vout1 pin like below. - Will use Display output Pin with discrete sync mode - vout1_clk (ball : D11), vout1_d0(ball : F11)...... vout1_d22(ball : B9). vout1_d23(ball : A10), vout1_de(ball : B10), vout1_hsync(ball : C11), out1_vsync(ball : E11), - We want to use vout1_fld as Vin3a_clk0 of VIN3A. - VIN3A Input : Vin3a_clk0 (ball : B11),vout3_d0(ball : M6), vout3_d1(ball : M2).... Can I use the vout1_fld pin as the Vin3a_clk0 pin of VIN3A while using the display output pin(vout1) with discrete sync mode? Regards JP Park + +Responses: +Hi JP, Please check the pinmux sheet, it will tell what is possible. Rgds, Brijesh + +Hi Brijesh, I have checked that pinmux is possible with vout1_fld pin(MUXMODE 0) to Vin3a_clk0 pin(MUXMODE 4) : (ball : B11) I want to know if it can be used as an Vin3a_clk0 pin of VIN3A while using the display output pin(vout1) with discrete sync mode? Regards JP Park + +Hi JP, The same pin cannot be used for two purpose. Rgds, Brijesh + +Hi Brijesh, I think there is some confusion. The same pin is not used for two purpose. Will use the vout1_clk (ball : D11), vout1_d0(ball : F11)...... vout1_d22(ball : B9). vout1_d23(ball : A10) .... for display output except for vout1_fld pin. Will use vout1_fld pin as Vin3a_clk0 (Set to MUX MODE4 for use with Vin3a_clk0) for Vin3a. I will use vout1_fld pin as Vin3a_clk0 function for Vin3a instead of vout1_fld function for display output. Is this possible? I'm sorry, I would like to ask you again. Regards JP Park + +Hi JP, Yes, it looks fine to me, if your display is progressive, there is no need for the fld output and fld pin can be used for the different purpose. Rgds, Brijesh + +Hi Brijesh, Thanks for your reply. Thanks to you, the problem is solved. Regards JPPark + +Hi Brijesh, We had plan to use the vin3a pins as shown below, but looking at the IOSET view of the pad conf tool, it seemed that ball B11 could not be used for the vin3a_clk0 pin function. Is it possible using differrent IOSET Pin ? Regards JP Park + +Hi Park, Which SoC are you using? On TDA2x, i see there are three pins which can be used for VIN3A_CLK input. These are CTRL_CORE_PAD_GPMC_CS3, CTRL_CORE_PAD_VIN1B_CLK1 and CTRL_CORE_PAD_VOUT1_FLD. Regards, Brijesh + +Hi Brijesh, Thank you for your quick reply. Yes, I am using TDA2x. I know that there are other pins for VIN3A_CLK . I want to know if it is possible using together IOSET1 (Ball M6 for vin3a_D0,Ball M2 for vin3a_D1 ) and IOSET4 (Ball B11 for vin3a_clk0) for vin3a pins. Regards, + +JP Park95, Suggest you try the pin mux tool (https://dev.ti.com/pinmux). It will show you clearly with warnings/errors what's possible and what not. thanks Alex + +In addition, I see from your previous post you are using our other NDA tool (the Pad Config Tool), which is fine too, but more recently we have migrated devices to the public pinmux tool I mentioned (which will give you same warnings about the ioset violation). Basically, if you violate and mix iosets you are risking to not meet the ioset's timing. The device has been characterized with these precise iosets to meet the timing requirements, switching characteristics, and iodelay manual/virtual modes. Here is the excerpt from the datasheet: CAUTION: The IO timings provided in this section are applicable for all combinations of signals for vin1. However, the timings are only valid for vin2, vin3, and vin4 if signals within a single IOSET are used. The IOSETs are defined in the Table 7- 4, Table 7-5 and Table 7-6. + diff --git a/data2/text/range/0-5000/720711.txt b/data2/text/range/0-5000/720711.txt new file mode 100644 index 0000000000000000000000000000000000000000..f09af8ddc339fd70776da4f3e9b23ef1e4f04b65 --- /dev/null +++ b/data2/text/range/0-5000/720711.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: TDA2x MonsterCam + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DM388, TVP5158 Tool/software: TI-RTOS From log and code, i can see TDA2x MonsterCam, What is MonsterCam? Capture Source "Sensor OV10635 1280x720 @ 30fps - VIP, YUV422", "HDMI RX 1280x720 @ 60fps - VIP, YUV422", "HDMI RX 1920x1080 @ 60fps - VIP, YUV422", "Sensor AR0132 1280x720 @ 30fps - VIP, RCCC (TDA2x MonsterCam ONLY)", "Sensor AR0132 1280x720 @ 60fps - VIP, Bayer, Ext. ISP (TDA2x MonsterCam ONLY)", "Sensor OV10640 1280x720 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor OV10640 1280x720 @ 30fps - ISS CPI , Bayer (TDA3x EVM ONLY)", "Sensor AR0132 1280x720 @ 60fps - ISS CPI , Bayer (TDA3x EVM ONLY)", "Sensor AR0132 1280x720 @ 60fps - ISS CPI , Monochrome (TDA3x EVM ONLY)", "Sensor AR0140 1280x800 @ 30fps - ISS CPI , Bayer (TDA3x EVM ONLY)", "Sensor IMX224 1280x960 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor AR0132 DM388 1280x720 @ 60fps - VIP, YUV422 (TDA2x MonsterCam ONLY)", "Sensor AR0140 TIDA00262 1280x720 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor OV10635 1280x720 @ 60fps - LVDS (TDA3x EVM ONLY)", "Sensor OV10640 IMI 1280x720 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor SAT0088 (OV10635) @ 30fps - CAL CSI2, YUV422 (TDA2Ex EVM ONLY)", "CHAINS_CAPTURE_SRC_VIDDEC_TVP5158 , THIS ENTRY WAS MISSING BECAUSE OF A BUG)", "Sensor OV2775 1920x1080 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor AR0143 MARS 1280x800 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)", "Sensor IMX290", "Ethernet AVB Cam 1280x720 @ 30fps - (TDA2Ex ETH SRV BOARD ONLY)", + +Responses: +Hi, Chee Peng Tham, After a search in web and in E2E FORUM, I believe this is the company producer of the camera connected to TDA2x. Make a search and also see the thread: Regards, Mariya + diff --git a/data2/text/range/0-5000/720725.txt b/data2/text/range/0-5000/720725.txt new file mode 100644 index 0000000000000000000000000000000000000000..1fb0c5b3adf76bc70579d5e2950aa6e6ca930e3d --- /dev/null +++ b/data2/text/range/0-5000/720725.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: TDA2SG + +Query Text: +Part Number: TDA2 Tool/software: Linux Does TDA2 support hypervisor? Or any kind of container technology? + +Responses: +HI TI supports bootloader, kernel changes required for enabling interworking with a hypervisor. Hypervsior enablement is done by our 3 party ecosystem. A number of hypervisor vendors like Greenhills(integrity), OpenSynergy, Qnx and GlobalLogic(Xen) provide support for hypervisor enablement on TDA2 + diff --git a/data2/text/range/0-5000/720763.txt b/data2/text/range/0-5000/720763.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d4e4677a5b9ee7178ddc33e4c1a57adb11241d0 --- /dev/null +++ b/data2/text/range/0-5000/720763.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: EVE/BAM/writing short int data back to external memory : + +Query Text: +Part Number: TDA2 Hi guys, i am trying to write int16_t (short int) type data output to the sink node, but the Pointer to external memory buffer is of uint8_t type. --> So can i use another pointer of type int16_t which could hold the output data --> why it is specific of type uint8_t ? typedef struct { uint16_t roiWidth; uint16_t roiHeight; uint16_t blkWidth; uint16_t blkHeight; uint16_t extBlkIncrementX; uint16_t extBlkIncrementY; uint16_t intBlkIncrementX; uint16_t intBlkIncrementY; uint32_t roiOffset; uint16_t blkOffset; uint8_t *extMemPtr; uint8_t *interMemPtr; uint16_t extMemPtrStride; uint16_t interMemPtrStride; uint8_t dmaQueNo; }EDMA_UTILS_autoIncrement_transferProperties; Regards Surbhi + +Responses: +Surbhi, Its just a pointer so its original type doesn't matter. Just typecast your pointer to uint8_t * and provide all the other parameters in terms of bytes as mentioned in the interface file. Regards, Anshu + +okay, but i need uint8_t type pointer for my input data at source side & for output data i require a pointer of int16_t type. + +DMA just transfer data from one memory location to other irrespective of its data type ( all the DMA parameters are in terms of bytes). So I am not sure what exactly you are asking? As mentioned earlier you just have to provide the pointer to the location from where to where you want to transfer. How you use these pointers is upto you, you can treat them as uint8_t or int16_t. Regards, Anshu + diff --git a/data2/text/range/0-5000/721070.txt b/data2/text/range/0-5000/721070.txt new file mode 100644 index 0000000000000000000000000000000000000000..44f35ec9f8e690926bb6a89f994040710e239ffa --- /dev/null +++ b/data2/text/range/0-5000/721070.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: How many ethernet phy chips can be supported on TDA2X? + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DP83865, DP83640 Tool/software: Linux Dear TI, We found DP83865 ethernet phy chip on EVM board. Is there another ethernet phy chip can be supported on TDA2X? Which driver is ready? Thanks a lot! waley + +Responses: +Hello Waley, Selection of PHY would depend on your use-case requirements. Can you please let us know your use-case? On TI TDA EVMs we are using DP83867 (http://www.ti.com/product/DP83867IR). + +Dear Prasad, For our case, 10/100M baseband is enough, it seems DP83640 is ok. But I'm not sure if we need to change driver code when we replaced the phy chip to another one. waley + +Waley Are you planning to use ethernet from Linux or from TI BIOS(on M4 core). Linux includes a generic phy driver that should work for most cases. Additionally there are specific PHY drivers if there needs to be PHY specific configuration. List of PHY drivers and their supported versions can be found under drivers/net/phy/Kconfig file under the kernel sources. If the specific PHY part has a driver, you need to enable the same in kernel and update the phy binding string in the device tree for the board that you are using + diff --git a/data2/text/range/0-5000/721493.txt b/data2/text/range/0-5000/721493.txt new file mode 100644 index 0000000000000000000000000000000000000000..60f013972a4653599d2a9781cdd7a415b3392241 --- /dev/null +++ b/data2/text/range/0-5000/721493.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: if the board can connected with the sensors?which type of the interface this board support? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 1.TDA2/TDA2P/TDA3.What are the main differences between these three series? 2.Does the corresponding EVM product purchase include a software support package? 3.Are external sensors currently supported by camera, laser radar, ultrasonic radar and millimeter-wave radars? What is the corresponding interface type? 4.If we need to be based on the current EVM to do software adaptation and two development, TI can provide technical support? 5.Only buy CPU board can be used or must be used in conjunction with other supporting board? 6.What is the initial estimate of the cost? How long is the purchase cycle? 3ks~~~~ + +Responses: +hi, user5786212 , 1. Check Device Comparison tables of all devices to figure out the differences. 2. Vision SDK and processor SDK you can download from ti.com. 3. Will ping an expert to answer. 4. You can relay on the forum for support. 5. will ping 6. Contact TI representative for information about cost and purchase cycle. Best regards, Mariya + +Hi, Answers for other questions. There are many different EVMs or boards available for these platforms. More details of boards are at www.ti.com/.../tools-software.html Optional boards / sensors for EVM available are listed at www.ti.com/.../tda2pxevm 3. Based on the board Image sensor and TI mmWave sensors can be connected. 5. That depends on the usecase for development. If an image sensor / LCD display is needed that board needs to be used. Again please refer to the link above for details on various options. + diff --git a/data2/text/range/0-5000/721962.txt b/data2/text/range/0-5000/721962.txt new file mode 100644 index 0000000000000000000000000000000000000000..be41d4fe0c224c8698235685dc6a3e594abffef7 --- /dev/null +++ b/data2/text/range/0-5000/721962.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE/BAM/writing short int data back to external memory : + +Query Text: +Part Number: TDA2 I tried this but somewhere i missed things. But now its working. Thank you! Regards surbhi + +Responses: +Hi, surbhi kumari, It seems that this is an answer for I will close this unintentionally opened thread. Regards, Mariy + diff --git a/data2/text/range/0-5000/722222.txt b/data2/text/range/0-5000/722222.txt new file mode 100644 index 0000000000000000000000000000000000000000..031641c25556fe5ee17a57087409820f9c25170a --- /dev/null +++ b/data2/text/range/0-5000/722222.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Why TIDL is NOT supported with Linux? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Team, Quick high-level question, why TIDL is NOT supported with Linux? Does it related to EDMA issue? + +Responses: +Hi, Please check below thread.. e2e.ti.com/.../702847 Thanks, Praveen + diff --git a/data2/text/range/0-5000/722329.txt b/data2/text/range/0-5000/722329.txt new file mode 100644 index 0000000000000000000000000000000000000000..0085c21856d8671f92838cd8611d6c0738474c7c --- /dev/null +++ b/data2/text/range/0-5000/722329.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: How does dual core C66 parallel the same CNN? + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TDA3MA Tool/software: Linux The development board I use now is TDA2X, and SDK uses SDK_VISION_03_02_00_00. But we're going to use TDA3MA, which has two C66 and one EVE, and I don't know how these three cores work together. I have four CNNs to implement, and my idea is that I make a C66 link in which I will implement three CNNs (two C66 in parallel) and build an EVE LINK and the last CNN to implement in EVE, right? Then a LINK uses a single C66 to implement a CNN I know how to do it, but how about two C66 processes a CNN in parallel? Is there a sample use dual core parallel processing a algorithm in SDK? + +Responses: +Hi, Refer below User guides of TIDL in VSDK, we had TIDL OD use case which uses multiple EVE cores and C66 for processing. 1. \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_TI_DeepLearning.pdf \vision_sdk\vision_sdk\apps\src\rtos\usecases\tidl_OD\chains_tidlOD.jpg 2. \ti_components\algorithms\REL.TIDL.01.01.01.00\modules\ti_dl\docs\TIDeepLearningLibrary_UserGuide.pdf Thanks, Praveen + +Hi Praveen: in my sdk have ti_SDK_VISION_03_02_00_00\vision_sdk\apps\src\rtos\usecases\tidl no vision_sdk\vision_sdk\apps\src\rtos\usecases\tidl_OD tidl is tidl_OD the same ??? in tidl have chains_tidlEveTda3x.jpg use eve1 only + +in VisionSDK_UserGuide_TI_DeepLearning.pdf Entire input frame is processed on a single core and there are 2 processing pipelines which process the input frames alternatively: this mean the same frame is copy processed same time by DSP1 and DSP2 ,DSP1 is done cnn1 and cnn2 ? + +Hi, Please refer to latest VSDK release ti_SDK_VISION_03_04_00_00 , the mentioned use case is not there in the ti_SDK_VISION_03_02_00_00 release. Thanks, Praveen + +Hi:Praveen in VisionSDK_UserGuide_TI_DeepLearning.pdf Entire input frame is processed on a single core and there are 2 processing pipelines which process the input frames alternatively: this mean the same frame is copy processed same time by DSP1 and DSP2 ,DSP1 is done cnn1 and cnn2 ? Shuai + +Hi Shuai, Yes, your understanding is right. Thanks, Praveen + diff --git a/data2/text/range/0-5000/722389.txt b/data2/text/range/0-5000/722389.txt new file mode 100644 index 0000000000000000000000000000000000000000..8bc5b2f45d69402878c084e886e1972df86486a8 --- /dev/null +++ b/data2/text/range/0-5000/722389.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: Linux OpenCV Canny no video out + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, SDK 3.04. Build tda2xx_evm_linux_opencx Compilation OK. Run Single camera usecase OV10635 1CH VIP capture and display to HDMI output. OK. No problem. But when run OpenCV Canny usecase got error and no video out. Any idea? [HOST] [HOST ] OpenCV Usecases [HOST] [HOST ] ---------------------------- [HOST] [HOST ] 1: 1CH VIP capture + OpenCV Canny (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + OpenCV OpenCL Dilation (A15 + DSP) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 73.112304 s: [HOST] [IPU2 ] 73.112487 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 73.113036 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 73.210364 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [HOST] [IPU2 ] 73.210699 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 73.217104 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 73.217470 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! ASSERT (chains_vipSingleCamOpenCVCannySgxDisplay_priv.c|chains_vipSingleCamOpenCVCannySgxDisplay_Create|166) [HOST] [HOST ] 73.339931 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 73.340328 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 73.340389 s: ALG: ERROR: No alg create function specified (algId = 5) !!! [HOST] [IPU2 ] 73.338894 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 73.339291 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 73.339687 s: IPC_OUT_0 : Create Done !!! + +Responses: +Hi Chee Peng, Due to CMEM dependency, this issue is observed & same has been reported & documented in release note of VSDK 3.4 release ADASVISION-1894 : [TDA2xx Linux] OpenCL UC, Cmem initialization fails However if you don't have any dependency on Linux, then you can try BIOS config for openCV (working fine with 3.4 release) Otherwise you can try on old VSDK release (3.1 release) where it is working fine Regards Surya + +Hi Surya, May I have VSDK release 3.1 download link? Thank you very much regards chee peng + +I found vsdk 3.01. software-dl.ti.com/.../index_FDS.html I try first. thank you + +Hi Surya I tried VSDK 3.01 Strange, i can compile successful for tda2xx_evm_linux_all But compile fail for tda2xx_evm_linux_opencx Do you have any idea? Best regards Chee Peng cheepeng@ubuntu:~/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/build$ make -s -j # Invoking configuro... # Configuro done! # Making tda2xx-evm:ipu2:release:vision_sdk_lib... # Linking into /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # # # /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # ‘/home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h’ -> ‘/home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h’ # system: tda2xx-evm: Compiling system_ipc.c # osa: tda2xx-evm: Compiling osa_mem.c # osa: tda2xx-evm: Compiling osa_remote_log_client.c # osa: tda2xx-evm: Compiling osa_remote_log_server.c # system: tda2xx-evm: Creating archive system.a # osa: tda2xx-evm: Creating archive osa.a In file included from /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/include/chains_common_osal.h:86:0, from /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/include/chains_common_surround_view.h:83, from /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/hlos/common/chains_common.h:147, from /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/apps/src/hlos/adas/include/chains.h:101, from chains_vipSingleCamOpenCLFrameCopySgxDisplay.c:99: /home/cheepeng/PROCESSOR_SDK_VISION_03_01_00_00/vision_sdk/links_fw/src/hlos/system/system_priv_ipc.h:100:30: fatal error: ti/ipc/MultiProc.h: No such file or directory compilation terminated. + +Hi Chee Peng, Did you install all components with 3.1 release or not ? Could you please check "MultiProc.h" file is present in below folder or not ? ti_components\os_tools\ipc_3_45_00_00\packages\ti\ipc Regards Surya + +Hi Chee Peng, The issue "ASSERT (chains_vipSingleCamOpenCVCannySgxDisplay_priv.c|chains_vipSingleCamOpenCVCannySgxDisplay_Create|166)" has been resolved & will be available with next vision sdk release Regards Surya + diff --git a/data2/text/range/0-5000/722487.txt b/data2/text/range/0-5000/722487.txt new file mode 100644 index 0000000000000000000000000000000000000000..68e00cba98a5bc93d646bd7c20f9cea0340c1743 --- /dev/null +++ b/data2/text/range/0-5000/722487.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: About reading XML file + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir We used VisionSDk RTOS version for development on TDA2. Do you know how to read xml file by using application program ? thanks BR Yimin + +Responses: +Hi, Vision SDK support normal file read or write operation and you can open any file using that. Please check the below file for the supported apis vision_sdk\links_fw\src\rtos\utils_common\src\file_api.c Regards, Anuj + diff --git a/data2/text/range/0-5000/722617.txt b/data2/text/range/0-5000/722617.txt new file mode 100644 index 0000000000000000000000000000000000000000..4bf94f05400a647b191440857adf3178ba74c7a0 --- /dev/null +++ b/data2/text/range/0-5000/722617.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2P-ACD: GMAC_SW + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi Team, Can you please answer the following question, is it in general possible to configure the 3—Port GMAC_SW, that the data can be routed directly between port1 to port2? If yes, does this produce any CPU load? Thanks, Needhu + +Responses: +Yes the TDA2x supports a full featured L2 switch and it is possible to switch frame directly between external port1 and port2. The switching is done in hardware and does not cause any CPU load. Refer TDA2 TRM Gigabit Ethernet Switch section ,specifially Address Lookup Engine subsection section for understanding switch functionality + diff --git a/data2/text/range/0-5000/722643.txt b/data2/text/range/0-5000/722643.txt new file mode 100644 index 0000000000000000000000000000000000000000..1239cff317bd74acaa33cd8f8cbeea1b0fa474e3 --- /dev/null +++ b/data2/text/range/0-5000/722643.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Can camera data input pins be changed from D2~D9 to D0 ~D7 with UB913/UB914 ? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, I am using TDA2x CPU board + Vision Board + daughter board + OV1652x sensor and SDK is PROCESSOR_SDK_VISION_03_03_00_00 with TDA2XX_EVM_LINUX_ALL define. I changed the sensor from "OV1653x" to "AR0140+AP0102", then I add a new driver to initial the new sensor. Using the Muti-cam -< surround view use-case, I can see the camera image on monitor, but the color is wrong, all image is close to green color. I checked the schematic of OV10635 sensor board and found that the data pins are connecting to UB913 D2 ~ D9. My design for AR0140+AP0102 is connected D0 ~ D7, I am not sure if that's the reason cause the image shows green. My I set the VIP port input pins form D2 ~ D9 to D0 ~ D7 ? + +Responses: +Hi User, Please note that there is board mux between sensor and vip port, which shifts data lines by 2 bits. If you have direct connect, you need to disable this shifting in the board mux. Regards, Brijesh + +Hi Brijesh, I change the sensor data output form 8 bits to 10 bits format and the problem is solved. By the way, how to disable the data shifting of board mux. Thanks. Ranny. + +Hi Ranny, There is a CPLD between sensor and VIP, we will have to change CPLD firmware to remove this shifting.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/722652.txt b/data2/text/range/0-5000/722652.txt new file mode 100644 index 0000000000000000000000000000000000000000..d765a5690fabbe453962713c1019fa6f9e823eff --- /dev/null +++ b/data2/text/range/0-5000/722652.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Where is the image data memory location of camera source? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, I am using TDA2x CPU board + Vision Board + daughter board + OV1652x sensor and SDK is PROCESSOR_SDK_VISION_03_03_00_00 with TDA2XX_EVM_LINUX_ALL define. I want to do some image change, but I didn't find the image data buffer for OV16530 image source. I use surround view use-case, there should be 4 image memory locate address? My you tell me which code structure is recoding image buffer address or which document descripts this part ? Thanks. Ranny. + +Responses: +Hi Ranny, What exactly do you want to change in the image buffers? The buffers are allocated in the capture VIP link and passed across links.. You could get the addresses of these buffers from the capture link. But if you would like to perform some image processing, then i would suggest you write alg plugin and process the images in your alg plugin. You could refer to frame copy alg plugin and write a new one for your algorithm. Rgds, Brijesh + +Hi Sir, Thank you for reply. because of the sensor data passes through the Vision board to CPU board, I want to make sure the data in image buffer is corrected that same as I expect format from image sensor. I already checked the buffer and the image data has no problem, I will use the plugin rule to add the algorithm process next step. Thank you. Ranny. + +ok thanks for the update. + diff --git a/data2/text/range/0-5000/722794.txt b/data2/text/range/0-5000/722794.txt new file mode 100644 index 0000000000000000000000000000000000000000..7c49fcfb833585af8531bc69e0fdc99251880fef --- /dev/null +++ b/data2/text/range/0-5000/722794.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: Does the board support fusion of camera data and radar data? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 1,the EVM of the camera data access is through the Vision application Board Fpd_link access and then incoming CPU Board? 2, laser radar is generally ETH interface, can directly through the CPU board two Gbit ETH interface access it? 3, Vision Application board can interface is what to do? Can I use it for ultrasonic radar/millimeter-wave data access? 4, CPU Borad of the 2 Dcan interface can only be used to receive headers? Do you support the output of vehicle control information? + +Responses: +I am not sure I understood all your questions. Kindly help me understand the system: 1. What is the camera interface you are trying to use FPD Link --> VIP? 2. I understand Lidar is via Ethernet. So it is possible to use the TDA2 EVM 3. For Ultra-sonic and Radar what is the interface you are looking at? 4. CAN interface can be used for both input and output . Thanks and Regards, Piyali + +1.is the VIP an abbreviation for Video Input Port? 3.For Ultra-sonic and Radar what is the interface you are looking at?------CAN + +Yes.. the VIP is Video Input port. The TDA2xx EVM support 2 can interfaces. On the DCAN1 there is an on-board transciever. On the DCAN2 interface you would need to connect an external tranciever. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/722848.txt b/data2/text/range/0-5000/722848.txt new file mode 100644 index 0000000000000000000000000000000000000000..3461ab9997ef91becc5d926566c36dd551a37e15 --- /dev/null +++ b/data2/text/range/0-5000/722848.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: TDA2xx use 964 deserializers? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear All, I have TDA2xx & 933 camera. How to use 933 serializers camera in TDA2xx? have any deserializers 964 board to TDA2xx? + +Responses: +Hi, This serializer is not validated on TDA2x. Also UB964 cannot be used on TDA2x, as TDA2x does not support CSI input. Rgds, Brijesh + +Hi Brijesh, thank you, i have one more question. can the deserializers 914 link serializers 933 or not? + +Hi Owen, At least 933 specs does not mention support for 914, so it does not look like possible. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/723082.txt b/data2/text/range/0-5000/723082.txt new file mode 100644 index 0000000000000000000000000000000000000000..583f687eff9e55d3afd44762b3efb958003e423f --- /dev/null +++ b/data2/text/range/0-5000/723082.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Import Vision SDK to Visual Studio + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, Is there any way import vision sdk to Visual Studio for linux app development use interprocess communication intarfaces? + +Responses: +Hi, Nobody has tried or tested such feature. And TI also does not support importing VSDK to Visual Studio. Regards, Anuj + diff --git a/data2/text/range/0-5000/723263.txt b/data2/text/range/0-5000/723263.txt new file mode 100644 index 0000000000000000000000000000000000000000..6b1daa5c95e556020807c2c84615d7b1c6493363 --- /dev/null +++ b/data2/text/range/0-5000/723263.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: run the user cnn model with TIDL on tda2x + +Query Text: +Part Number: TDA2 hi, dear Now although I bought serveral tda2x boards, I have only got part service from the TI tech support in Shanghai of China. I could not get the source code of TIDL. So if I want to run my improved cnn model , I can only run it on the tda2x board not on PC simulator. I have imported the cnn model to the bin format which is suitable for TIDL. Yet the input data need to be resize to 368 X 368，and I should resize it by myself( It has to be the TI method to resize). Even worse, the configuration file (only seg , ssd detection included)on the tda2x board looks like that below: TIDL Configuration parameters ----------------------------- ################################################################################ IMP: Make sure the size of the file names (excluding extension) is not more than 8 characters. ################################################################################ inputWidth=1024 inputHeight=512 inputFile=IN.RGB outputFile=OUT.BIN netFileName=NET.BIN paramFileName=PRM.BIN My cnn net is not for detection or classifcation, but pose recognition. I do not know if I can use this demo cfg file to run my cnn model successfully on the tda2x. If not , could you please be kind enough to offer me new cfg file or make some change for me to run? tks, looking forward to your reply. + +Responses: +Hi, It looks like duplicate thread to below thread, hence closing this thread e2e.ti.com/.../723315 Thanks, Praveen + diff --git a/data2/text/range/0-5000/723315.txt b/data2/text/range/0-5000/723315.txt new file mode 100644 index 0000000000000000000000000000000000000000..04be33231845d55a363e6e84c446a3ca4cebee13 --- /dev/null +++ b/data2/text/range/0-5000/723315.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: run the user cnn model with TIDL on tda2x + +Query Text: +Part Number: TDA2 hi, dear Now although I bought serveral tda2x boards, I have only got part service from the TI tech support in Shanghai of China. I could not get the source code of TIDL. So if I want to run my improved cnn model , I can only run it on the tda2x board not on PC simulator. I have imported the cnn model to the bin format which is suitable for TIDL. Yet the input data need to be resize to 368 X 368，and I should resize it by myself( It has to be the TI method to resize). Even worse, the configuration file (only seg , ssd detection included)on the tda2x board looks like that below: TIDL Configuration parameters ----------------------------- ################################################################################ IMP: Make sure the size of the file names (excluding extension) is not more than 8 characters. ################################################################################ inputWidth=1024 inputHeight=512 inputFile=IN.RGB outputFile=OUT.BIN netFileName=NET.BIN paramFileName=PRM.BIN My cnn net is not for detection or classifcation, but pose recognition. I do not know if I can use this demo cfg file to run my cnn model successfully on the tda2x. If not , could you please be kind enough to offer me new cfg file or make some change for me to run? I mean could you offer me a new in_Data_OD and in_header_OD sized 368 x 368 for my pose recognitation? I will replace the bin to run the video demo. tks, looking forward to your reply. + +Responses: +Hi, Did you check below thread where we explained how to run TIDL OD use cases? e2e.ti.com/.../689617 Thanks, Praveen + +MY TIDL OD use cases ran sucessfully. Yet the new usr model not validated which is for pose recognition require the input image size 368 X368， we couldnot get the input data in the vision sdk with this size. And could you think of a method to change the OD demo cfg file to run my pose model recognition demo? + +Please refer below thread for generating indata and inHeader e2e.ti.com/.../687481 Thanks, Praveen + +In fact, in my case only, if I use this case called "chanis_tidl – File IO based use case to validate user model ", it is better to bring up? If so, could you offer me some tips for changing this demo to my own pose mode recog demo?This case is similar to my pose reg demo, and I want to test the performance of the mode only, not for accuracy which maybe need only one image like in.RGB, right? And how to translate my jpg image to the in.RGB format? Good luck, tks! + +Beside these facts above, the output of my pose model is not the limited classification but arbitrarily float32 value. So from the link that you offer me before, I do not know if it will work successfully by just commenting the classfications.(this Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1); need to be changed to " (label - 1)%3 ") Any other change should be made? + +Hi, We answered this in below thread, e2e.ti.com/.../723674 No need to create multiple threads for the same topic, we can discuss and follow up in the same thread. Thanks, Praveen + +What about the semseg usecase of TIDL？ How to generate the indata and inHeader for semseg case？ + +Hi, Please refer to below thread for generating indata and inHeader for TIDL use case, e2e.ti.com/.../660676 Thanks, Praveen + diff --git a/data2/text/range/0-5000/723410.txt b/data2/text/range/0-5000/723410.txt new file mode 100644 index 0000000000000000000000000000000000000000..d006a0b17f3a86476c7de261b7e461af1e101bd5 --- /dev/null +++ b/data2/text/range/0-5000/723410.txt @@ -0,0 +1,59 @@ +Ticket Name: RTOS/TDA2P-ACD: Changing IP address of TDA2P in Runtime + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello All, Is there a way to change the IP address of EVM in Vision SDK 03.03. We want to change the IP address for testing NulSrc + Display Usecase. We do not want to set the IP address everytime in NDK.cfg file. We want user to input the IP from usecase menu. Is it possible to achieve this ? Thanks, Abhay + +Responses: +Hi Abhay, First off you will need your app to start off with no ip address. In your *.cfg file do you have the following line? Global.enableCodeGeneration = false; Based on your answer it will change what we need to do next. Regards, Dalton + +Hi Dalton, Thanks for your reply. I searched for "Global.enableCodeGeneration" in my "NDK.cfg" file at "\links_fw\src\rtos\bios_app_common\tda2px\cfg\NDK_config.cfg". This line is not present in this file. Regards, Abhay + +Hi Abhay, Okay that's great. You can then go ahead and add the following line to your *.cfg file: Ip.address = "none"; This will setup the app to neither use DHCP or a static ip address on startup. With this setup you can create a C function in your app to setup an IP address. The function would look like this: /* Static IP Address settings */ +char *LocalIPAddr = "192.168.1.4"; +char *LocalIPMask = "255.255.255.0"; +char *GatewayIP = "192.168.1.1"; +char *DomainName = "demo.net"; + +void changeIP() +{ + /* Configure IP address manually on interface 1 */ + CI_IPNET NA; + CI_ROUTE RT; + /* Setup manual IP address */ + memset(&NA, 0, sizeof(NA)); + NA.IPAddr = inet_addr(LocalIPAddr); + NA.IPMask = inet_addr(LocalIPMask); + strcpy(NA.Domain, DomainName); + NA.NetType = 0; + + CfgAddEntry(0, CFGTAG_IPNET, 1, 0, + sizeof(CI_IPNET), (unsigned char *)&NA, 0); + + /* + * Add the default gateway. Since it is the default, the + * destination address and mask are both zero (we go ahead + * and show the assignment for clarity). + */ + memset(&RT, 0, sizeof(RT)); + RT.IPDestAddr = 0; + RT.IPDestMask = 0; + RT.IPGateAddr = inet_addr(GatewayIP); + + CfgAddEntry(0, CFGTAG_ROUTE, 0, 0, + sizeof(CI_ROUTE), (unsigned char *)&RT, 0); +} The IP address does not need to be global, I just wrote it that way for illustrative purposes. I'm not familiar with how Display Usecase works, but I'm guessing you could have it call this C function? Regards, Dalton + +Hi Dalton, I have now added the similar function in my code which I call from the usecase menu of Vision SDK. But while compiling I get following linking errors, " undefined first referenced symbol in file --------- ---------------- CfgAddEntry /home/abhay/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/lib/tda2px-evm/ipu1_0/debug/app_libs.aem4 inet_addr /home/abhay/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/lib/tda2px-evm/ipu1_0/debug/app_libs.aem4 " One thing I want to mention, I have set "NDK_PROC_TO_USE=a15_0" in our configuration file. Regards, Abhay + +Hi Abhay, My apologies, I didn't tell you what includes you will need for this. The inet_addr function needs the following include: #include Another one that would work would be this include: #include However, netmain.h essentially brings the whole ndk world in with it, so that might be a bit overkill. As for the "NDK_PROC_TO_USE" setting, that shouldn't impact what we are doing here. Regards, Dalton + +Can I mark this as closed? Todd + +Hi Dalton, I included both the headers but still getting the same linking error as above. Regards, Abhay + +Todd I am not able to fix this yet. Regards, Abhay + +Hi Abhay, Can you upload your full verbose build output when you get these linker errors? If a linker.cmd file is being generated can you upload that as well? Regards, Dalton + +Hi Dalton, We were able to fix the linking issue as well as we are able to set IP address to our TDA2P in runtime. As we are using NDK on A15 core, we need to compile the function given by you on A15 core itself. Also went through the linker.cmd file for both A15 and IPU cores, and we could see that paths for NDK were set in the A15's linker.cmd file. Thanks for your help. I will close this thread. Regards, Abhay + diff --git a/data2/text/range/0-5000/723674.txt b/data2/text/range/0-5000/723674.txt new file mode 100644 index 0000000000000000000000000000000000000000..92f5fa889fc90541c70496e9db6ac3a55547a158 --- /dev/null +++ b/data2/text/range/0-5000/723674.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: How to run pose model based TIDL SEG use case in Vision SDK with pre-trained model + +Query Text: +Part Number: TDA2 hi, dear 1， Is there any tips about changing the seg configuration files to run user model like my pose reg model? 2， Beside these facts above, the output of my pose model is not the limited classification but arbitrarily float32 value. So from the link that you offer me before, I do not know if it will work successfully by just commenting the classfications.(this Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1); need to be changed to " (label - 1)%3 ") Any other change should be made? 3，In fact, in my case only, if I use this case called "chanis_tidl – File IO based use case to validate user model ", it is better to bring up? If so, could you offer me some tips for changing this demo to my own pose mode recog demo?This case is similar to my pose reg demo, and I want to test the performance of the mode only, not for accuracy which maybe need only one image like in.RGB, right? And how to translate my jpg image to the in.RGB format? Good luck, tks! + +Responses: +Hi, 1. I will check and come back on this. 2. Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1)%3; This modulo 3 is because, currently VSDK supports only four colour codes for display. This means it can display all the 21 objects but can use only 4 colours as below, Class 0, 4 , 8... uses first colour Class 1, 5, 9... uses second colour Class 2, 6, 10..uses third colour Class 3, 7, 11... uses the fourth colour coding. 3. I recommend standalone setup (using CCS and TIDL .out file) to validate your model first, once you confirm that it is working on standalone then you can run it on VSDK use case. Thanks, Praveen + +Tks for sharing. 1. The key point that I care is which file contains the line “tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1)%3”？ 2. I think running on the ccs with the simulator may be useful and convenient to validate, yet I said many times, I can not get the source code of TIDL from the representative in shanghai. If I have not got that code, could I just use the limited tools for debugging on CCS? I had better get the source code for building the tools and debugging on CCS ? Right? + +1. File location is shared in this thread e2e.ti.com/.../723749 2. For running on the ccs with the simulator and validation, source code may not required. It may be required if you want to add new layers and debugging. Thanks, Praveen + diff --git a/data2/text/range/0-5000/723749.txt b/data2/text/range/0-5000/723749.txt new file mode 100644 index 0000000000000000000000000000000000000000..6360e68f96294f4eb9a40f20a878d196a2d1dd9f --- /dev/null +++ b/data2/text/range/0-5000/723749.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Usecase inputdata file(inData_OD) and usecase input header file(inHeader_OD) for object detection(Vision SDK_03.03.00.00) + +Query Text: +Part Number: TDA2 hi，dear Could you tell where is this line below ？ which file？ this Line : tempoutPutList->objDesc[tempoutPutList->numObjects].objType = (label - 1); need to be changed to " (label - 1)%3 " when use case had 4 Classes change to 21 classes ? Tks + +Responses: +Hi, Please change in below file vision_sdk\apps\src\rtos\alg_plugins\objectdetection\objectDrawLink_algPlugin.c Regards Surya + +Tks for sharing. I got the location with that line. And could you please show the location of the TIDL segmentation example ? + +All Vision sdk examples are available in below folder vision_sdk\apps\src\rtos\usecases For TIDL Semantic segmentation UC -> semSeg For TIDL OD UC -> tidl_OD For TIDL File IO UC -> tidl Regards Surya + diff --git a/data2/text/range/0-5000/723758.txt b/data2/text/range/0-5000/723758.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d8cec461a052542f41dc51ec90150e27c1e7854 --- /dev/null +++ b/data2/text/range/0-5000/723758.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: user mode failing on tda2x with TIDL + +Query Text: +Part Number: TDA2 Hi，dear I changed the cfg and used my pose model with TIDL. My pose model is imported successfully by TIDI import tool. However when running on the tda2x board, it failed with logs below. And I snapshot the file where error occurs . Could you tell me what is wrong with my pose recog model? The output of my model is arbitrarily float32 value or int32 value. + +Responses: +And if I want to show the output of my pose model which is a value matrix? Is there any tools for writing these output to the file? + +Hi, You can refer to the overlay code (used for visualisation of segmentation output) in "AlgorithmLink_tidlpostprocProcess" function located in "apps\src\rtos\alg_plugins\tidl\tidlpostprocLink_algPlugin.c" file. Regarding the error from log, did you change anything in the config? If so please share config file and complete log for analysis? Thanks, Praveen + +Tks for your advice. 1. We should concern one key point , my cnn case is pose regcog which you can just consider it as some input image data going through the pose model then output one float32/int32 value 2d matrix. Note that it is different from any mature case in TIDL. So please evaluate the change. 2. I just replace the ssd para/net bin with my pose cnn model para/net bin . Also I replace the segmentation para/net bin with my cnn model. Nothing else has been changed. 3. The log file shows the error which is nearly the same. You can see the picture above which shows the dos command window. F.Y.I + diff --git a/data2/text/range/0-5000/723796.txt b/data2/text/range/0-5000/723796.txt new file mode 100644 index 0000000000000000000000000000000000000000..58fe5e71b6d7bdb96a9d7fd08ac2ece821941d5e --- /dev/null +++ b/data2/text/range/0-5000/723796.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: Cannot EDMA transfer between OSA_memAllocSR() and aligned_alloc() allocated buffers + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I'm using Processor SDK 3.03, building for custom board with TDA2 chip. So far I have successfully transferred data between two buffers allocated using OSA_memAllocSR() in a PSDK usecase. I did this by calling OSA_memVirt2Phys() to get physical addresses of those buffers and forwarded that information to an EDMA utility driver that I've written. Now, I need to transfer data between a buffer allocated with OSA_memAllocSR() and a buffer allocated with aligned_alloc() from POSIX. However, I don't know how to get physical address of the one allocated with aligned_alloc(). I would like to know how it could be done so that the EDMA transfer can work. Thank you in advance. Regards, Nick + +Responses: +Hi, What you're trying to achieve isn't possible through a simple aligned_alloc() call. The aligned_alloc call provides a scattered list, which isn't continous. You need a special allocator such as a CMA which provides a continuous memory region. Please refer this link for more information. lwn.net/.../ The reason OSA_memVirt2Phys() works is because the allocation happens from M4 where the physical to virtual address mapping is 1-1, but this isn't the case on Linux. If you intend to use EDMA from Linux, then you will need to use CMA for allocation. You also need a way to inteface your application with the EDMA driver (in vision-SDK EDMA is on M4). If you intend to use EDMA from M4, I would recommend allocating from SR and passing the buffer to M4. Regards Shravan + +Hi Shravan, Can you confirm that the CMA is integrated into the DMA subsystem of ARM in kernel 4.4.84 which is used in PSDK 3.03? If yes, then I suppose it is only a matter of allocating memory with dma_alloc_coherent(). Regards, Nick + +Hi Nick, Sorry about the delayed response, I was on leave. Yes you can use dma_alloc_coherent, and if the device is NULL / the device doesn't have a dedicated dma pool, it will allocate from CMA. You can then use this to program the EDMA (the call as such returns a virtual address, but one of the arguments passed contains the physical address). Regards Shravan + +Hi Shravan, I managed to use dma_alloc_coherent() and perform an EDMA transfer between that and the one allocated with OSA_memAllocSR() so that worked out great. The next problem that I'm having is that the buffer allocated with dma_alloc_coherent() cannot be written to a file on SSD opened with O_DIRECT flag. I have posted on a few Linux related forums since I don't think it is related to TI specifically any more but I have got no answers. Do you have any experience with this? I will post this as a new question if you have an answer. Looking forward to hearing from you. Regards, Nick + +Hi Nick, I don't think this is permitted since it security flaw to allow I/O on kernel pages mapped to user-space. There will have to be a copy into kernel space which can then be written through O_DIRECT. Regards Shravan + +Hi Shravan, We have tried to write to SSD directly from the dma_alloc_coherent() buffers from a kernel module but we have found that writing to disk from kernel space is not encouraged and is only available via certain hacks so we gave up on that. What I would like to know now is something else but I will make another thread and link it here if you would like to look at it, basically we would like to write to SSD directly from OSA_memAllocSR buffers (which is the original problem that drove us into this one) but more details on the thread. It can be found here: https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/729926 Regards, Nick + diff --git a/data2/text/range/0-5000/723800.txt b/data2/text/range/0-5000/723800.txt new file mode 100644 index 0000000000000000000000000000000000000000..1738bacc38b8e46111f81de5b765daa2881dcea5 --- /dev/null +++ b/data2/text/range/0-5000/723800.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: Saving video in SD card of TDA2xx + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Everyone , I am working on a usecase which could save display videos on the SDcard in TDA2xx , I have created a usecase as below : Capture->VPE->Sync->SGXFramecopy->dup dup -> Display dup -> Encode -> Null We wanted to save video after framecopy block , we know that SGXframecopy output results to RGB32 data and also encode block supports only yuv data . I like to know the following things : 1) How can we save video data as mpeg / h264 data format in sdcard after framecopy directly. ? 2) If not , I like to know how to convert RGB32 data to YUV to give to encoder so that we can convert YUV to mpeg ? Regards, Surendar + +Responses: +Hi, If you want to save encoded data then do not use SGXFramecopy. Even sync is also not required. You can use below usecase Capture->VPE->dup dup-> Display Dup -> Encoder -> Null 1) How can we save video data as mpeg / h264 data format in sdcard after framecopy directly. ? Ans- Output of framecopy is not encoded so you will not be able to save data as mpeg / h264 data format in sdcard after framecopy directly Regards, Anuj + +Hi Anuj , We want to save the output of framecopy , kindly suggest me is there any way to save the video output of sgxframecopy. Is there any converter block ? . We are using 4 cameras , i like to save the video after stitching so I wanted to know whether it is possible or not Regards, Surendar + +Hi, You can save the data after sgxframecopy using Null link but that will be in SYSTEM_DF_ABGR32_8888 format. Regards, Anuj + +Hi Anuj , I understand that it will be in BGR format , is there any converter block to convert this to h264 /mpeg . I am not sure about this , Can we use any linux commands inside the usecase that will convert this data? . Regards , Surendar + +Hi Surendar You could DSS WB M2M to convert RGB to YUV format. Rgds, Brijesh + +Hi Anuj & Brijesh , It is working using DSS WB M2M block , we used following framework : Capture -> VPE -> Sync (A15) -> SgxFrmcpy (A15) -> Dup Dup -> DssM2mWb - > Encode -> Null (A15) Dup -> Display Now we can save video on sd card after framecopy . + diff --git a/data2/text/range/0-5000/723811.txt b/data2/text/range/0-5000/723811.txt new file mode 100644 index 0000000000000000000000000000000000000000..bc1bb79c222a0fe785e8e25e9b2ca972b3e65b50 --- /dev/null +++ b/data2/text/range/0-5000/723811.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: about vcop_sobel_xy + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi : in vcop_sobel_xy vcop_sobel_xy_tb.c have compared vcop_sobelXY_3x3_separable_uchar and vcop_sobelXY_3x3_separable_uchar_cn src of vcop_sobelXY_3x3_separable_uchar is a vector function (src_kernelC/vcop_sobel_xy_kernel.k) i canot finde the source code of vcop_sobelXY_3x3_separable_uchar_cn + +Responses: +Hi Shuai, The natural C code is released only in library form. For natural C source code you will need to get full source release of EVE SW. Regards, Anshu + diff --git a/data2/text/range/0-5000/723812.txt b/data2/text/range/0-5000/723812.txt new file mode 100644 index 0000000000000000000000000000000000000000..9344780ac78e45427d2445019e6ac485f86387f6 --- /dev/null +++ b/data2/text/range/0-5000/723812.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: About File Reading issue + +Query Text: +Part Number: TDA2 Hi Sir We used Vision-SDK (RTOS) for TDA2 platform. we met below issue We use File_open() and File_mkdir() api and write them in vision_sdk\apps\src\rtos\common\chains_main_bios_single_cam.c. We can read the content of our file in the root of SDCARD. if we put this feature in the canny.cpp of usecases selections "OpenCV Canny (A15) + Display". It always returns 0. Does TI have any suggestion? or we miss some steps? BR Yimin + +Responses: +Hi SIr We ChainsCommon_Osal_fileOpen and File_open to open file. 1. In chains_main_bios_single_cam.c -> it works 2. in canny.cpp -> it failed Does it have any rule ? BR Yimin + +Hi Yimin, what exactly is the return value of File_open()? It should return -1 if file could not be opened, else file handle. Regards, Yordan + +Hi SIr Yes. the result is 01 when I use the api in canny.c file in Alg_OpenCVCanny stage. our final purpose is to read xml file by using cascadeClassifier of opencv. cv::CascadeClassifier face_det; status = face_det.load(std::string("file.xml")); please advise BR Yimin + +Hi SIr BTW , we found some issue in file_api.c in below definitation #if ( defined(FATFS_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ ( defined(FATFS_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ ( defined(FATFS_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ ( defined(FATFS_PROC_TO_USE_A15_0) && defined(BUILD_A15)) In alg stage (while running canny.cpp), we found that all of File_XXX were defined to return SYSTEM_LINK_STATUS_EFAIL in file_api.c. we have the question why we cannot use filesystem in this stage ? please advise BR Yimin + +Hi, What is value of FATFS_PROC_TO_USE is your cfg file and where are you running Alg_OpenCVCanny link? Regards, Anuj + +Hi, Is there any update on this thread? Regards, Anuj + diff --git a/data2/text/range/0-5000/723921.txt b/data2/text/range/0-5000/723921.txt new file mode 100644 index 0000000000000000000000000000000000000000..541b76c2d8fb4b01426ab3dfa807a6c5b2094875 --- /dev/null +++ b/data2/text/range/0-5000/723921.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: what does NDK_PROC_TO_USE mean? + +Query Text: +Part Number: TDA2 Hi, I'm new for SOCs and vision sdk, and often meet NDK_PROC_TO_USE (Supported values: ipu1_0 ipu1_1 a15_0 none) parameter. But I can't find its function and how it influence. Where should I find any information about NDK_PROC_TO_USE parameter? + +Responses: +Hi Danil, NDK_PROC_TO_USE selects the CPU on which NDK (Network Developer's Kit) runs. “none” means NDK is disabled. On TDA3x SoC due to pinmux conflict when MMCSD is enabled (FATFS_PROC_TO_USE != none) NDK is disabled automatically by build system. Recommended values, On TDA3x, ipu1_0 On TDA2x, TDA2Ex - BIOS ONLY mode and AVB is enabled, ipu1_1 - BIOS ONLY mode and AVB is disabled, a15_0 - Linux+BIOS mode and AVB is enabled, ipu2 - Linux+BIOS mode and AVB is disabled, none You can check VisionSDK_UserGuide_BuildSystem.pdf and VisionSDK_UserGuide_NetworkTools.pdf in VisionSDK docs folder for details. Regards, Yordan + diff --git a/data2/text/range/0-5000/724097.txt b/data2/text/range/0-5000/724097.txt new file mode 100644 index 0000000000000000000000000000000000000000..d7b02226bf2405fb68bf5ebda84ad4b13784176f --- /dev/null +++ b/data2/text/range/0-5000/724097.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: cores parallel + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TDA3MA Tool/software: Linux The development board I use now is TDA2X, and SDK uses SDK_VISION_03_02_00_00. But we're going to use TDA3MA, which has two C66 and one EVE . I have four CNNs to implement, and my idea is follow m4 link capture + dsp1 a c66 link (1cnn) +dsp2 a c66 link (1cnn) +eve1 a eve link (2cnn) +m4 link display i think like this 3 cores parallel but there processing on diffrent frame. right? can i do like this ? + +Responses: +Yes. You can do this. Provided, your CNN compute requirements are with in the MACs bugdets of DSP and EVE clocks. Please refer the TIDl datasheet for DSP and EVE CNN layer level performances. + diff --git a/data2/text/range/0-5000/724271.txt b/data2/text/range/0-5000/724271.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f04159a862355129be4f056d992b5355b985e00 --- /dev/null +++ b/data2/text/range/0-5000/724271.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: A15 (Linux) EVE chain. How does it works? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I have read in manual that A15 can't get acsess directly to EVE cores, and using IPU is recomended to organize link to EVE. When I set chain from A15 to EVE, vision sdk (I use 3.4) automatically connect cores throw IPU or I should do this manually? And I have quenstion about EVE configuration under Linux. In manuals is next steps: 1. Get .xearp32F 2. Convert .xearp32F -> .h (bin to hex converter utility was used). It means convert binary to header file like for TI Logo is used in sample app? bin to hex converter utility was used is uncluded in vision sdk? 3. What finction I should call to load program to EVE from IPU? + +Responses: +Hello For "vision SDK Bios only" version EVE cores are handled same as any other cores like DSP or M4. With "vision SDK Linux" EVE loading and all inter processor communication between A15 and EVE are automatically taken care by EVE loader of VSDK, Its routed via IPU, Integreator/App need not to do anything special to address this. EVE firmware .xearp32F is embedded in IPU2 binary, yes, you are correct, SDK had tools to Convert .xearp32F -> .h (bin to hex converter utility used). you do not need to do anything special on IPU to program EVE, just port your Algos to EVE, create the UC on A15 as usual and build VSDK Linux, rest all are taken care in VSDK regards, Shiju + diff --git a/data2/text/range/0-5000/724529.txt b/data2/text/range/0-5000/724529.txt new file mode 100644 index 0000000000000000000000000000000000000000..c01aec723e6c71dffdebeb6d901a986205d7f177 --- /dev/null +++ b/data2/text/range/0-5000/724529.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: About 3D Surround View Issue + +Query Text: +Part Number: TDA2 Hi SIr We could preview 4 CHs camera streaming with our AR0140 sensor board on TV via HDMI by using TDA2 EVM with latest linux vision SDK. But we met a 3D surround view (SUR) issue which the stitched images are not acceptable after car rotated around. As the guide of “SurroundView_demo” described: Even though without calibration parameters on TDA2 board, SUR would stitches them together to provide a realistic image of the surroundings to the driver. It should be related to the camera calibration parameters. Do you have any suggestion what we should do in next step ? BR Yimin + +Responses: +Hi Yimin, I cannot provide any more feedback based on the input you have provided. We have tried surround-view on TDA2 board with multiple views and have not faced any issue. Can you provide some more details with images etc? REgards Shashank + diff --git a/data2/text/range/0-5000/724604.txt b/data2/text/range/0-5000/724604.txt new file mode 100644 index 0000000000000000000000000000000000000000..22276052af90fba67c020a5ee9c7b8943b3fda2b --- /dev/null +++ b/data2/text/range/0-5000/724604.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: TDAx ADAS SOCs Forum + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We refer the ticket http://e2e.ti.com/support/arm/automotive_processors/f/1021/t/709147 to modify DVP data width to 12 bits (original are 8 bits). But HDMI output will get black screen, could you please check for us? We data flow as below: Please find attachment to get modify code. VIP receive 12 bits image.rar We upload real output record to YouTube as below: >> TDA2 receive 12bits YUV by AVNET suggestion : https://www.youtube.com/watch?v=ntxlkS3cra4 >> TDA2 receive 8bits YUV : https://www.youtube.com/watch?v=fk_aExrFOZk Many thanks. + +Responses: +Hi, Note that the display doesn't support 16-bit RAW input. Since we are programming 16-bit RAW video format to VIP, the input format to the display needs to be changed to YUV422. Also did you get any error message on the UART/CCS console? Regards Sivaraj R + +Hi Sivaraj, Thanks for your reply. We image sensor output format is YUV422 and DVP 12 bits. But TDA2 need separate two component to receive more than 8 bits data. (8 bits/component) Now we receive YUV422 frame by DVP 12 bits but we just see half frame from HDMI output. (Please refer before create ticket : e2e.ti.com/.../2656778 As i know VPS storage 12bits data seem like below: Component 1(data 0~7) : xxxxxxx Component 2(data 8~15) : 0000xxxx (12~15 zero pending ) but how to setting output 2 component data to HDMI? Have any use case or sample code can refer if we needs receive? + +Hi, Your understanding of 16 bit storage in memory by VIP is right. Did you dump the VIP frame to a file through CCS and then analyze the image is proper with external viewer? Note that the DSS supports only 8bit YUV data. So the 16-bit YUV should be first converted to 8-bit data. If you really need 12-bit input then, you need to convert this in CPU (DSP). If not then you can configure the VIP to receive only the MSB 8-bit data. Regards Sivaraj R + +Hi Sivaraj , Thanks for your reply. + diff --git a/data2/text/range/0-5000/724696.txt b/data2/text/range/0-5000/724696.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0f4d9b1ba02ca43c18fc8560afb2603c61d6d09 --- /dev/null +++ b/data2/text/range/0-5000/724696.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: how to get EVE cmd file + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio i make a new EVE project i copy this cmd file to my project ,but it no do (SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\common\linker.cmd ) i am Success in c66 project i copy CMD from ti_SDK_VISION_03_02_00_00\ti_components\algorithms\vlib_c66x_3_3_0_3\packages\ti\vlib\src\common\c66 so what can i do ? + +Responses: +Hi Shuai, Can you explain what are you trying to do? What do you mean by success here? Are you seeing some build failures? Regards, Anshu + +Hi Anshu i have to run a algorithm ON eve. I have run it on C66 success now. i have not run EVE a go so i try to do a simple project 3*3 medfilter i think if this is success i can do my work! i found in SDK sample SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\Median_filter_col\src_kernelC eve code is in a .k file , if in my project have 5 kernels i have to make 5 .k file? or just 1 .k put them together? + +Hi Anshu cannot find reset_handler BESTWISHES! + +Shuai, You need to add boot_arp32.asm file to your build. This file is also located at SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\common\boot_arp32.asm Regards, Anshu + diff --git a/data2/text/range/0-5000/724922.txt b/data2/text/range/0-5000/724922.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d0e11488373897a9272ca9d76d3d8c34ad6c68f --- /dev/null +++ b/data2/text/range/0-5000/724922.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2: None of the currently selected products s...try using a pre-3.30 version of XDCtools. + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio i make a new eve project use this SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3 if i add testvecs\config this file in to the project, IDE tips it need the XDC tools , i sellect yes! then the project cannot compile. this is the probelm xdc.tools.configuro: Error: no target named: please use -t, -b, or --cb .xdchelp /eve_exmple1 line 52 C/C++ Problem None of the currently selected products s...try using a pre-3.30 version of XDCtools. in my v7 there are 2 xdctools ti_ccsv7\xdctools_3_32_02_25_core ti_ccsv7\xdctools_3_50_04_43_core + +Responses: +Shuai, What do you mean by "if i add testvecs\config this file in to the project". This folder contains various testcases config and none of the files inside it needs to be included in the build. These are only used when you try to execute the testcase. Regards, Anshu + +Hi Anshu IDE tips it need the XDC tools , i sellect no! then it is ok ! NOW ccs and vc both ok! thanks! shuai + +Hi Shuai, If your issue is resolved, can we close this thread? Regards, Anshu + diff --git a/data2/text/range/0-5000/724939.txt b/data2/text/range/0-5000/724939.txt new file mode 100644 index 0000000000000000000000000000000000000000..e78fa1f202c9709c81dbfd3a15018ebc50719e4f --- /dev/null +++ b/data2/text/range/0-5000/724939.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: how can i do eve work in Visual Studio? + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio use c_intrinsics_host_port-0_91_00-Setup.exe i can emulation C66 code in Visual Studio. now i am do a eve project ，i am plan to do this in Visual Studio first then i have to move the code into CCS project and run it on the evm board! i make a new Visual Studio project and i put ti_ccsv7\ccsv7\tools\compiler\arp32_1.0.9\include\vcop\vcop.h in the project as many eve function is emulat is vcop.h #define VCOP_HOST_EMULATION 1. arp32.h and vcopmem.h also put in the project but complie have many problems in arp32.h vcop.h 179 IntelliSense: 未定义标识符 "VCOP_MEMVIEW" e:\ti6657\vc_program\eve_sample\eve_sample\vcop.h 2323 22 eve_sample 170 IntelliSense: 未定义标识符 "builtin" e:\ti6657\vc_program\eve_sample\eve_sample\arp32.h 108 14 eve_sample 153 IntelliSense: 不允许使用不完整的类型 e:\ti6657\vc_program\eve_sample\eve_sample\arp32.h 83 14 eve_sample 147 IntelliSense: 不允许使用不完整的类型 e:\ti6657\vc_program\eve_sample\eve_sample\arp32.h 73 14 eve_sample 错误 107 error C2374: “__attribute__”: 重定义；多次初始化 e:\ti6657\vc_program\eve_sample\eve_sample\arp32.h 82 1 eve_sample + +Responses: +Shuai, For visual studio build you only need to include vcop.h and define VCOP_HOST_EMUlATION in the build. EVE SW build system already supports host emulation build and you can use the following command ( after setting all the environment variables and visual studio environment variables) : gmake TARGET_PLATFORM=PC ( run this command from the top most directory of EVE SW). Regards, Anshu + + + +Hi Anshu I am no want to build all the eve SW . i make a new Visual Studio project , in this try to run median3x3. i move code in the Visual Studio project (ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3) like the image upstairs post. + +Shuai, As mentioned earlier you need to define in your build VCOP_HOST_EMULATION = 1 for host emulation build. Regards, Anshu + diff --git a/data2/text/range/0-5000/725003.txt b/data2/text/range/0-5000/725003.txt new file mode 100644 index 0000000000000000000000000000000000000000..0dc6aaf4439d95a943048175c0c84d9544e1647d --- /dev/null +++ b/data2/text/range/0-5000/725003.txt @@ -0,0 +1,22 @@ +Ticket Name: Compiler/TDA2: gmake gmake[5]: *** No rule to make target `;'. Stop. + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Dear TI, During the VSDK3.4 compile in RTOS windows mode, gmake give me this error: gmake[5]: Entering directory `D:/TI_VSDK_03_04/vision_sdk/links_fw/src/rtos/links_common/algorithm' gmake[5]: *** No rule to make target `;'. Stop. gmake[5]: Leaving directory `D:/TI_VSDK_03_04/vision_sdk/links_fw/src/rtos/links_common/algorithm' gmake[4]: *** [links_common_algorithm] Error 2 gmake[4]: Leaving directory `D:/TI_VSDK_03_04/vision_sdk/links_fw/src/rtos' gmake[3]: *** [libs] Error 2 gmake[3]: Leaving directory `D:/TI_VSDK_03_04/vision_sdk/links_fw/src/rtos' gmake[2]: *** [links_fw_libs] Error 2 gmake[2]: Leaving directory `D:/TI_VSDK_03_04/vision_sdk/build' gmake[1]: *** [apps] Error 2 gmake[1]: Leaving directory `D:/TI_VSDK_03_04/vision_sdk/build' gmake: *** [vision_sdk] Error 2 Actually it is working successfully before but failed to due to the above error. Can you advise how to debug on it? Thanks and best regards He Wei + +Responses: +Hi, He wei, I am not familiar with the SDK, but It seems that the problem is the same as described in: %20Error%202:1230:0] Please, also check the following threads: https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/636297?tisearch=e2e-sitesearch&keymatch=No%20rule%20to%20make%20target%20`;%27.%20Stop. Regards, Mariya + +Hi, Can you check if you are using gmake from xdctools. Regards, Rishabh + +Dear Rishabh, yes. the path is correct: D:\TI_VSDK_03_04\vision_sdk\build>where gmake D:\TI_VSDK_03_04\ti_components\os_tools\windows\xdctools_3_32_01_22_core\gmake.exe + +Hi, Can you specify what all build commands you are running. Regards, Rishabh + +Dear Rishabh, I am using " gmake -s -j depend" cmd. In addition, I use the git bash too based on one thread information, it doesn't have this " *** No rule to make target `;'. Stop." error but got the "Permission" error. Thanks and best regards He Wei + +Hi, Can you try only "make -s depend". Also please share the permissions error you are getting. Regards, Rishabh + +Dear Rishabh, 1. In windows cmd, I still get same error when run "gmake -s depend". 2. It is ok now in git bash after running as admin. But Window cmd still got the issue. and don't what is the cause? Thanks and best regards He Wei + +Hi, Glad that the issue is resolved. Can you try running from command prompt in admin mode. Also are you trying a clean build when you are facing this issue? Regards, Rishabh + diff --git a/data2/text/range/0-5000/725163.txt b/data2/text/range/0-5000/725163.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c0b8eba5a23f2819c15b1a0c51b59fe4107b09b --- /dev/null +++ b/data2/text/range/0-5000/725163.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: step of EVE Optimized + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio i have function have to do EVE Optimized, could you tell the step how can i do the work? + +Responses: +HI, You can refer some examples in EVE software librray released by TI to get some idea. Also please refer the TRM for EVE architecture, instruction set to corelate the software examples with the hardware architecture Thanks, With Regards, Pramod + +Hi :Pramod could you guide some pdf about TRM for EVE architecture? + +Pramod, Please post your comments/questions on the same thread. Regards Karthik + +EVE is documented in the TRM in Ch 8: www.ti.com/.../sprui29e.pdf Thanks, With Regards, Pramod + diff --git a/data2/text/range/0-5000/725489.txt b/data2/text/range/0-5000/725489.txt new file mode 100644 index 0000000000000000000000000000000000000000..1952d74dcfcccbed43082d1d303afba2552462c3 --- /dev/null +++ b/data2/text/range/0-5000/725489.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Update appimage by SD card + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Expert, I'm running PROCESSOR SDK VISION V3.04 RTOS on xc5777x evm. Using the "Load using QSPI" to launch the board, how do I update the appimage with the sd card? Could you please give some suggestion here? Thanks in advance. + +Responses: +Hi, Can you look at "Load using SD card" section of VisionSDK_UserGuide_TDA2xx.pdf. Regards, Rishabh + +Hi, I need the sd card to update the appimage inside the QSPI flash. "Load using SD card" section only boot? Thanks in advance. + +Hi, Unfortunately we don't have any application that will read the image from SD card and flash it to QSPI. You need to write this application yourself by referring to PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\drv\stw_lld\examples\mmcsd\sd_file_io and PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\boot\sbl_auto\qspiflash\examples\qspi_flash_writer. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/725543.txt b/data2/text/range/0-5000/725543.txt new file mode 100644 index 0000000000000000000000000000000000000000..b50bccc6f205bf6ec502cb585ef93bc4bc1fe948 --- /dev/null +++ b/data2/text/range/0-5000/725543.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: How to capture image and record video + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, Using TDA2x with TI-RTOS, we can get live hdmi output. Our SDK version is 3.04 May I know 1) How to save the frame as an image to sdcard? 2) How to capture an video to sdcard? Thank you very much. + +Responses: +Hi, Please go through below thread e2e.ti.com/.../709062 Regards, Anuj + diff --git a/data2/text/range/0-5000/725583.txt b/data2/text/range/0-5000/725583.txt new file mode 100644 index 0000000000000000000000000000000000000000..91e95a660a5d9510c550907909762720c99b5af9 --- /dev/null +++ b/data2/text/range/0-5000/725583.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Request for minimal .config + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I'm using PSDK 3.03. Since the initial Linux build takes a long time, is there any .config that includes only basic features regarding TDA2xx/TDA2px SoC? Regards, Nick + +Responses: +Hi Nick To enable TDA2x/TDA2Px with Processor SDK Vision you need to do the dependency component build at least one time, like make -j linux make linux_install make -j depend make -j any subsequent build need only "make -j" (provided no changes in Linux Kernel/uboot and any ti-components) please refer \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf for hints to optimize the build time regards, Shiju + diff --git a/data2/text/range/0-5000/725596.txt b/data2/text/range/0-5000/725596.txt new file mode 100644 index 0000000000000000000000000000000000000000..e570537f8d8c8e79749380b9cc72a1353599867f --- /dev/null +++ b/data2/text/range/0-5000/725596.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: BIOS API function descriprion + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm new in vision sdk and TI processors. Could you tel me where I can find list and discriptions functions like: Vps_printf(), Utils_memAlloc(), ChainsCommon_Osal_fileOpen()? + +Responses: +Hi Danil, You can grep for these APIs in Vision SDK. E.g. Vps_printf is defined in links_fw/include/link_api/system_trace.h. For more documentation you can refer to PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\docs\VisionSDK_ApiGuide.CHM. Regards, Rishabh + diff --git a/data2/text/range/0-5000/725798.txt b/data2/text/range/0-5000/725798.txt new file mode 100644 index 0000000000000000000000000000000000000000..b7562b0298fcc394596d35dbbef08c5ec0f4cfae --- /dev/null +++ b/data2/text/range/0-5000/725798.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS/TDA2: Vision SDK 3.03, arp32 linker flags zero_init=on + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, Below is what I set, diff --git a/vision_sdk/build/rtos/makerules/rules_arp32.mk b/vision_sdk/build/rtos/makerules/rules_arp32.mk index 346a0c8..6ca47ee 100755 --- a/vision_sdk/build/rtos/makerules/rules_arp32.mk +++ b/vision_sdk/build/rtos/makerules/rules_arp32.mk @@ -237,7 +237,7 @@ ifneq "$(or $(OBJ_PATHS),$(OBJ_PATHS_ASM),$(OBJ_PATHS_CPP))""" endif # Linker options and rules -LNKFLAGS_INTERNAL_COMMON = --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=off --rom_model +LNKFLAGS_INTERNAL_COMMON = --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=on --rom_model # Assemble Linker flags from all other LNKFLAGS definitions _LNKFLAGS = $(LNKFLAGS_INTERNAL_COMMON) $(LNKFLAGS_INTERNAL_PROFILE) $(LNKFLAGS_GLOBAL_$(CORE)) $(LNKFLAGS_LOCAL_COMMON) $(LNKFLAGS_LOCAL_$(CORE)) When I load binaries over CCS v7 onto TDA2X ES1.0 EVM for EVE cores, the core starts running by default. If I try to pause it, I see this error on CCS v7 Console: ARP32_EVE_1: Trouble Halting Target CPU: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.0.27.9) SD Card boot also fails similarly, only with above patch. If I revert the above patch, sample_app usecase works fine. + +Responses: +Hi, Can you check if any MMU fault error is generated with this. Regards, Anshu + +Hi Anshu, How would I be able to do the same ? and if it does turn out to be a MMU fault what does it convey, since I have not touched anything else. This patch works fine on Vision SDK 2.09 + +Can you check the value of following register from A15 after the issue. MMU_IRQSTATUS : (0x40281018 : This is for EVE 1) Regards, Anshu + +The value reads 0x00000002 As shown in snapshot + +Hi, Can you share the following gel file with us : \ccs_base\emulation\gel\TDA2x\TDA2xx_multicore_reset.gel Regards, Anshu + +Attached is the files you requested: TDA2xx_multicore_reset.gel + +Hello, Any thoughts on this issue? + +Hello It seems like EVE CPU is crashed, BTW, are you seeing this issue only when you set zero_init=on? with zero_init=on, I have fixed a bug in VSDK and this fix will be available in next release (3.5) FYI here is the patch you need to apply this in all EVE_x.cfg files under links_fw/src/rtos/bios_app_common/tda2xx/eve1/Eve1.cfg, Eve2.cfg, Eve3.cfg & Eve4.cfg Program.sectMap["ttbSection"] = new Program.SectionSpec(); Program.sectMap["ttbSection"].loadSegment = "EVE1_DATA_MEM"; Program.sectMap["ttbSection"].type = "NOINIT"; regards, Shiju + +Hi Shiju, Yes I was seeing this issue only when setting zero_init=on in rules_arp32.mk. I tried the patch you suggested and looks like it has fixed the eve crash I was noticing. Let me know if you see any risks if I plan to have this setting in all makefiles of all cores. Thanks and Regards, Vivek + diff --git a/data2/text/range/0-5000/726199.txt b/data2/text/range/0-5000/726199.txt new file mode 100644 index 0000000000000000000000000000000000000000..14a5dd0c1fae87ac1b3e1121c2baacaef00054ca --- /dev/null +++ b/data2/text/range/0-5000/726199.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Schematic Review + +Query Text: +Part Number: TDA2 Does TI help to review customer's schematic? + +Responses: +Hi Lim, Kindly get in touch with your TI contact regarding reviewing schematics. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/726260.txt b/data2/text/range/0-5000/726260.txt new file mode 100644 index 0000000000000000000000000000000000000000..90211953ed5933336bfdbcadafbfd5e710e5e4e8 --- /dev/null +++ b/data2/text/range/0-5000/726260.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Use EDMA similarly to EDMA LLD on RTOS? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, EDMA Low Level Driver for RTOS is defined very well and easy to use. It provides enough flexibility regarding usage of A/B/CCNT, indexing, linking and chaining. I need that flexibility in Linux. However the only thing I managed to do is use DMA engine which is awfully limited in its features (only contiguous memcpy). I found that in 'edma.c' file there is a lot of well known API for EDMA usage. However, there is a lot of functions there and the steps that need to be taken are not intuitive. I would like an example of a simple code that I can run in a kernel module that enables me to reserve a few channels and param sets, possibly link the param sets and start a transfer. I find it such a shame that there are no examples for advanced EDMA usage on Linux whereas there are tons of examples for RTOS. Thank you in advance. Regards, Nick + +Responses: +Nick Linux includes a generic framework for DMA drivers which is "dmaengine" , the EDMA implementation plugs in to this framework. Drivers within the kernel use the dmaengine API for data movement primitives. You can look for more information on its usage inside the Kernel documentation folders : www.kernel.org/.../ + +Hi Sriram, Sorry but this does not answer my question. I said that I already use the "dmaengine" and that I'm not satisfied with what I can do with it. As I can see it is limited to contiguous memory transfers. But what if I have jumps that have to be made, I need the flexibility of EDMA's BIDX and CIDX parameters. With "dmaengine" I cannot do anything like that which is a pitty because EDMA can do so much more. I have just found this: processors.wiki.ti.com/.../EDMA_sample_test_application but it does not build successfully because it is for DaVinci boards. Is there anything like this for TDA2 boards? Or even better, if all EDMA features can be used with "dmaengine" I would like to know how to do it. Thank you in advance. Regards, Nick + +Nick The Linux side implementation only supports the DMAengine interface currently - and this is abstracted to handle a number of DMA implementations , hence you get only the common subset of features + diff --git a/data2/text/range/0-5000/726293.txt b/data2/text/range/0-5000/726293.txt new file mode 100644 index 0000000000000000000000000000000000000000..0107ba8382986aefd741eeb5d884761f68805d1d --- /dev/null +++ b/data2/text/range/0-5000/726293.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: tild_od usecase build error with MobileNet + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi All, I am building vsdk3.3.0 to test the proven the mobilenet in TIDL and get an error like below. It look like this error is related to "GRAPHICS_HEIGHT" size. # Compiling tda2px-evm:ipu1_0:release:app_libs: c:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/rtos/useca ses/tidl_OD/chains_tidlOD.c "c:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD.c", line 439: error: integer conversion resulted in a change of sign "c:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD.c", line 447: error: integer conversion resulted in a change of sign 2 errors detected in the compilation of "c:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/rtos/usecases/tid l_OD/chains_tidlOD.c". >> Compilation failure gmake[5]: *** [c:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2p x-evm/ipu1_0/release/chains_tidlOD.oem4] Error 1 gmake[4]: *** [ipu1_0] Error 2 gmake[3]: *** [app_libs] Error 2 gmake[2]: *** [apps_libs] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 For reference, the test video resolution is 512x512 and the code changes are as follows. #define TIDL_OD_INPUT_WIDTH (512)//(768) #define TIDL_OD_INPUT_HEIGHT (512)//(320) #define DEC_OUT_WIDTH (512)//(768) #define DEC_OUT_HEIGHT (512)//(320) I found a similar problem in the e2e community as below but I did not get a solution. #link Please let me know what i do to fix. BR, Khethan + +Responses: +Hi all, There is not link-url on above so I attach the link as below. e2e.ti.com/.../721606 BR, Khethan + +Hi, Can you try with any input having resolution less than 512 Regards, Anuj + +Hi, have you tried with a lower resolution. Can you change TIDL_OD_DISPLAY_STARTY to 32 and try. Regards, Anuj + diff --git a/data2/text/range/0-5000/726496.txt b/data2/text/range/0-5000/726496.txt new file mode 100644 index 0000000000000000000000000000000000000000..a2d9ec75f47dd3c9276ad5b5f0e2c2e975361919 --- /dev/null +++ b/data2/text/range/0-5000/726496.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2EXEVM: ssd mdoel in tidl have high latency + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi: Now, we use SSD model in TIDL to do object detection tasks. But the latency in one eve is about 190ms, how I can refine the code to improve the processing speed, in order to decrease the latency. hope your advise. + +Responses: +Hi, Yes, this 190 ms latency is expected for running SSD model on EVE, I do not think we can reduce it further by simply refining the code. I will confirm. Thanks, Praveen + +Hi Praveen: thanks for your reply, I want to know when the model is fixed, what can I do to decrease the latency. hope your further answer. + +With a given network configuration, the current latency that you are observing is for one EVE. In TDA2 we have four EVEs. The latency can be reduced by partitioning the computation across all 4xEVEs. For, a dense model is it is recommended to split processing spatially (Feature/Activation in height wise). For sparse model also the same logic can be used. When the feature vector size is small, the overheads will be high for sparse flow. So when feature width /height is small, it is recommended to split the processing channels wise. The current VSDK demos are not using this partitioning, this can be done with current TIDL library. Thanks and Regards, Kumar.D + +Hi, I don't completely understand your idea. For example, we have trained the model with size of 640x320, in your opinion, i can use one eve to calculate the top half image 640x160, with another eve calculating the bottom half image 640x160? Is there any example I can refer? thanks. + +Hi, Yes, your understanding is correct if feature sizes are large. For small feature sizes, split the channels instead of height and use one eve to process some channels, and another eve process remaining channels. We don't have any code to refer for this implementation. Thanks, Praveen + diff --git a/data2/text/range/0-5000/726693.txt b/data2/text/range/0-5000/726693.txt new file mode 100644 index 0000000000000000000000000000000000000000..2fe189cc7307a7289b2e5a194d0e7e334e387c05 --- /dev/null +++ b/data2/text/range/0-5000/726693.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: Two Encoder Link For video Saving + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Every one, I am working on a use case that could save video on SD card in TDA2xx. For that I am using Two Encode link. I have created the usecase as below :- Capture -> VPE -> Dup_vpe -> SgxFrmcpy (A15) ->Dup_sgx Dup_vpe -> Encode_vpe -> Null_vpe (A15) Dup_sgx -> DssM2mWb - > Encode_sgx -> Null_sgx (A15) Dup_sgx -> Display_M4 (IPU1_0) GrpxSrc -> Display_Grpx while compiling , it show an error : 'SYSTEM_LINK_ID_VENC_1' undeclared 1) How can i solve this problem ? 2) Can i define SYSTEM_LINK_ID_VENC_1 and how ? Regards, Renjith + +Responses: +Hi, You can use only 1 instance of encoder link. Multiple instances are not supported for encoder link. Regards, Anuj + +Hi Anuj, Thank you for your reply.. Is there any other option for this ? Can i use one Encoder link instead of using two ? How its possible ? + +Hi, Please modify usecase as below Capture -> VPE -> Dup_vpe -> SgxFrmcpy (A15) ->Dup_sgx Dup_vpe -> Merge Dup_sgx -> DssM2mWb - > Merge Merge -> Encode -> Select -> Null_vpe (A15) Select -> Null_sgx (A15) Dup_sgx -> Display_M4 (IPU1_0) GrpxSrc -> Display_Grpx Regards, Anuj + +Hi Anuj, 1) By using this usecase can i save both videos at the same time ? 2) How to configure the 'Select' ? + +Hi, Please take reference of the usecase where select link is used. Regards, Anuj + +Hi, Is the issue resolved? Regards, Anuj + +Hi Anuj, Sorry for the late reply, While running i got this error Assertion @ Line: 700 in iva_enc/encLink_common.c: 0 : failed !!! + +Hi, Have you set pLinkChPrm->format params? Please take a reference of encoder link params from the below usecase file. vision_sdk\apps\src\rtos\usecases\vip_single_cam_view_encdec\chains_vipSingleCam_EncDec_Display.c Regards, Anuj + diff --git a/data2/text/range/0-5000/726818.txt b/data2/text/range/0-5000/726818.txt new file mode 100644 index 0000000000000000000000000000000000000000..9eb33eb2b25faf073d97cb1dfb4de19927f88d53 --- /dev/null +++ b/data2/text/range/0-5000/726818.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: dlib on TI TDA2X + +Query Text: +Part Number: TDA2 Dear all, Is there any example that we can cross-compile dlib on ARM and used on TDA2X? Thanks and best regards He Wei + +Responses: +Hi Wei, What do you mean by dlib ? Are you referring to TI deep learning library? Thanks, Praveen + +Dear Praveen, I am referring to open source lib: http://dlib.net/compile.html Thanks and best regards He Wei + +Hi He Wei, Sorry, we don't have any example or reference. Thanks, Praveen + diff --git a/data2/text/range/0-5000/726834.txt b/data2/text/range/0-5000/726834.txt new file mode 100644 index 0000000000000000000000000000000000000000..95be5e5cb42eb3d2b7dc0feb2298e19d6d87c789 --- /dev/null +++ b/data2/text/range/0-5000/726834.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: EDMA + +Query Text: +Part Number: TDA2 How EDMA is related to the QSPI? In my TI driver's code, RPRC image is read from the external SDF, in which EDMA is used. And EDMA is using the QSPI. I am not able to get how these two are related? Please Clarify. THanks in Advance! Regards, Sagar + +Responses: +Hi Sagar, There are two options for reading app Image from QSPI :CPU copy and EDMA. EDMA performs high-performance data transfers between two memories without CPU's intervention. Hence SBL uses EDMA. Hope this clarifies. Regards, Rishabh + +Hi Rishabh, Thanks for reply. I want to clarify that whether EDMA uses the same pin which QSPI uses or different. In my SBL source code void QSPI_ReadSectors_edma(void *dstAddr, uint32_t srcOffsetAddr, uint32_t length, uint32_t edma_ch_num) this is the function which is used for reading from external SDF. Inside this function following function is called uint32_t EDMA3EnableTransfer(uint32_t baseAddr, uint32_t chNum,uint32_t trigMode) { uint32_t retVal = FALSE; switch (trigMode) { case EDMA3_TRIG_MODE_MANUAL: if (chNum < SOC_EDMA3_NUM_DMACH) { EDMA3SetEvt(baseAddr, chNum); retVal = (uint32_t) TRUE; } break; case EDMA3_TRIG_MODE_QDMA: if (chNum < SOC_EDMA3_NUM_QDMACH) { EDMA3EnableQdmaEvt(baseAddr, chNum); retVal = (uint32_t) TRUE; } break; case EDMA3_TRIG_MODE_EVENT: if (chNum < SOC_EDMA3_NUM_DMACH) { /*clear SECR & EMCR to clean any previous NULL request */ EDMA3ClrMissEvt(baseAddr, chNum); /* Set EESR to enable event */ EDMA3EnableDmaEvt(baseAddr, chNum); retVal = (uint32_t) TRUE; } break; default: retVal = (uint32_t) FALSE; break; } return retVal; } If you have the edma.c then please explain me how this function works. Also what is the meaning of shadow region? Thanks! Regards, Sagar + +Hi Sagar, I would suggest you to go through EDMA chapter from TDA2 TRM. Regards, Rishabh + diff --git a/data2/text/range/0-5000/726840.txt b/data2/text/range/0-5000/726840.txt new file mode 100644 index 0000000000000000000000000000000000000000..5468d29675cd20f19f26e4215ad0fd1dbf715ee3 --- /dev/null +++ b/data2/text/range/0-5000/726840.txt @@ -0,0 +1,55 @@ +Ticket Name: RTOS/TDA2P-ACD: DCAN module board to board test + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi Sir, I has test CAN TX, RX function by loopbackTest(TX send to RX of TDA2) by setting "DCAN_INCLUDE=yes" . loopbackTest setting as below: /** \brief Used for enabling board-to-board DCAN */ +//#define ENABLE_B2B_DCAN_TEST (1U) + +static Void System_dcanInitCfgStruct(dcanConfig_t * dcanConfig) +{ + Int i; + UInt8 msgData[] = {0xAA,0xEE,0xBB,0xFF,0xCC,0xDD,0x55,0xAA}; + +#if ENABLE_B2B_DCAN_TEST + dcanConfig->enableLoopback = FALSE; +#else + dcanConfig->enableLoopback = TRUE; +#endif + dcanConfig->enablePeriodicTx = TRUE; + dcanConfig->rxMsgId = 0xC1; + dcanConfig->txMsgId = 0xC2; + dcanConfig->enableSendRxAck = TRUE; + dcanConfig->enableReceiveRxAck = TRUE; + dcanConfig->txAckMsgId = 0xC4; + dcanConfig->rxAckMsgId = 0xC5; + dcanConfig->rxMsgCb = System_dcanRxMsgHandler; + dcanConfig->rxAckMsgCb = System_dcanRxAckMsgHandler; + dcanConfig->txMsgPeriod_ms = SYSTEM_DCAN_TX_PRD_MS; + dcanConfig->dcanCntrlIntrId = SYSTEM_DCAN_INTR_ID; + dcanConfig->dcanTxTskPri = SYSTEM_DCAN_TX_TSK_PRI; + dcanConfig->dcanRxTskPri = SYSTEM_DCAN_RX_TSK_PRI; + dcanConfig->dcanInputClk_hz = SYSTEM_DCAN_INPUT_CLK; + dcanConfig->dcanBaudRate_hz = SYSTEM_DCAN_BIT_RATE; + dcanConfig->enableTxMsgCycle = TRUE; + dcanConfig->dcanTxPrdMsg.dataLength = UTILS_ARRAYSIZE(msgData); + for ( i = 0 ; i < UTILS_ARRAYSIZE(msgData); i++) + { + dcanConfig->dcanTxPrdMsg.msgData[i] = msgData[i]; + } +} + I can log TX and RX of TDA2 communication data by PCAN-USB-FD Adaptor. I got some issue that is when I send test packet [CAN-ID=0xC2, Data = 0xAF, 0xF3, 0xC0, 0x04, 0xD1, 0XE2, 0x5A, 0xAF] to TDA2. The issue seem like TDA2 can't receive data from PCAN-USB-FD Adaptor. Could you please give me some advise? Many thanks. + +Responses: +Hi Prince, You need not to comment out 'ENABLE_B2B_DCAN_TEST' macro. Can you please un-comment it and try it again? From your logs, it looks like you are able to receive some messages form TDA2. Please confirm this. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek , Thanks for your feedback. I comment out 'ENABLE_B2B_DCAN_TEST' macro still get same error when send test data by PCAN-USB-FD Adaptor. Have any document or tutorial to description DCAN of TDA2? + +Hi Vivek , Update information. a. External loop back test mode can transmit test data to PCAN-USB-FD Adaptor - comment out 'ENABLE_B2B_DCAN_TEST' macro. - pDcanCfgPrms->testModeEnable = TRUE - pDcanCfgPrms->testMode = DCAN_TEST_MODE_EXT_LPBACK - Tx pad is workable - Rx pad is open - Tx and Rx ISR is workable. b. Silent mode can't receive test data from PCAN-USB-FD Adaptor. - comment out 'ENABLE_B2B_DCAN_TEST' macro. - pDcanCfgPrms->testModeEnable = TRUE - Modify pDcanCfgPrms->testMode = DCAN_TEST_MODE_SILENT - Tx pad is open - Rx pad can't receive test data from PCAN-USB-FD Adaptor. - Rx ISR is not workable. c. Normal operation mode can't receive/transmit test data with PCAN-USB-FD Adaptor. - Open 'ENABLE_B2B_DCAN_TEST' macro. - pDcanCfgPrms->testModeEnable = FALSE - pDcanCfgPrms->testMode = DCAN_TEST_MODE_NONE - Tx pad can't transmit test data to PCAN-USB-FD Adaptor. - Rx pad can't receive test data from PCAN-USB-FD Adaptor. - TX and Rx ISR is not workable. I trace all DCAN code but can't find why normal mode is not workable. Could you please give me some suggestion? Many thanks. + +Hi Vivek, I use SDK version is V03.04.00(04-Jul-2018). + +Hi Vivek, Have any update? + +Hi Prince, Looks like there is an issue with Rx pin. Since you are able to receive message on PCAN when DCAN is operating in external loopback mode which means Tx pin is OK. Can you do following: 1. In case b, can you look at PCAN error and value of 'DCAN_ES' register? 2. In case c, send only one message from PCAN, and look at PCAN error and value of 'DCAN_ES' register. 3. In case c, send only one message from TDA2P(in another run), and look at PCAN error and value of 'DCAN_ES' register. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek , Thanks for your reply. I find result why the RX pad not working. SDK pad config is different with TDA2x EVM. Need modify "platform_tda2xx_pad_config.c" setting to modify RX pin of DCAN form AD17 (Wakeup0) to G19(dcan1_rx) if use TDA2x EVM. Update for all user reference. + diff --git a/data2/text/range/0-5000/726849.txt b/data2/text/range/0-5000/726849.txt new file mode 100644 index 0000000000000000000000000000000000000000..497cb9a47e02ade0c5fa0c5840646343127723c1 --- /dev/null +++ b/data2/text/range/0-5000/726849.txt @@ -0,0 +1,8 @@ +Ticket Name: Functional Safety ADAS + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I am relating to that thread: https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/595646?TDA2HV-Functional-Safety-ADAS I am wondering why TI decided to not develop the TDA2x in compliance with ISO 26262 considering that everyone else is doing so. Is there a specific reason? Thanks and best regards, Samir + +Responses: +Samir, TI Jacinto TDAx automotive processors have a number of safety and security features supported in hardware including: Auxiliary Arm® Cortex™-M4 MPUs Hardware firewalls MMUs Memory ECC support Display write-back path Security accelerators Additionally, the TDA3 family includes: Clock, voltage and interrupt monitors Hardware CRC block Window watchdog timers and Other enhanced safety mechanisms for safe computation and AUTOSAR. The safety features enable customers to design systems that can achieve ASIL-B or higher safety levels. Could you help us understand the end equipment you are looking at ? We can help you map your safety and processing requirements to one of the devices of the TDA2/3 family of devices. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/726862.txt b/data2/text/range/0-5000/726862.txt new file mode 100644 index 0000000000000000000000000000000000000000..c4259befe63fd6c96f1be15ca13917e7f0b99911 --- /dev/null +++ b/data2/text/range/0-5000/726862.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Utils_memAlloc memory aligment + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm new in SoC and heterogen memory systems. How I should choose memory alignment parameter for Utils_memAlloc, if uint8_t, uint16_t element size is used? How does memory alignment influence? + +Responses: +Hi, Alignment will depend where you want to use that allocated memory. For ex if you are using it to contain the video data then it should be 32 byte aligned. Regards, Anuj + diff --git a/data2/text/range/0-5000/727093.txt b/data2/text/range/0-5000/727093.txt new file mode 100644 index 0000000000000000000000000000000000000000..ddf4ec47f820fe035e7ae528c5513ea4b032f06c --- /dev/null +++ b/data2/text/range/0-5000/727093.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: Send i2c to camera + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I using TDA2x + multideserializer. My camera have Device Address 0x20 I modified as follow and tried to send i2c but unsuccessful. Can you please assist? + +Responses: +Hi Chee Peng, You will have to set BSPUTILS_OV1063x_I2C_ADDR to 0x10 also note that the sensor should be accessible at address BSPUTILS_OV1063x_1_ALIAS_I2C_ADDR, which is 0x38. Regards, Sujith + +Hi Chee Peng, Is your query answered? Regards, Sujith + +Yes. I can communicate with my camera thru i2c. Thank you + diff --git a/data2/text/range/0-5000/727106.txt b/data2/text/range/0-5000/727106.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a298e8541076406e323d6529f7a858340cc96c4 --- /dev/null +++ b/data2/text/range/0-5000/727106.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2: Available memory ranges: + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi: i do not know what is the problem! vision_sdk\sample_app\src\rtos\alg_plugins\framecopy this link is use c66xdsp_1 I think ! why c66xdsp_2 have problem? and what is the problem? "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/linker_mod.cmd", line 247: error: program will not fit into available memory. placement with alignment fails for section ".fardata" size 0xc11ae6 . Available memory ranges: DSP2_DATA_MEM size: 0xa00000 unused: 0x9d79db max hole: 0x9d749f thanks! shuai + +Responses: +Hi : i load a lib is big about 26MB THANKS shuai + +Hi Shuai, you may need to change DSP2_DATA_MEM in your memory map. Please refer "vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf" for details. Regards, Yordan + diff --git a/data2/text/range/0-5000/727164.txt b/data2/text/range/0-5000/727164.txt new file mode 100644 index 0000000000000000000000000000000000000000..5fbc589d48eb9410facdc5c6ee40a918b9eccaad --- /dev/null +++ b/data2/text/range/0-5000/727164.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: MAKECONFIG?= tda2xx_evm_linux_opencl make fail on VSDK3.4 + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear Officer, I have update the c6000 to 8.1.0. but still got the below error: make[7]: Entering directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy/kernel' echo Compiling OpenCL file copy.cl Compiling OpenCL file copy.cl /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl -t copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure make[7]: *** [copy.dsp_h] Error 255 make[7]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy/kernel' make[6]: *** [opencl_build] Error 2 make[6]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy' make[5]: *** [vision_sdk_linux_demo] Error 2 make[5]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/hlos' make[4]: *** [apps] Error 2 make[4]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/hlos' make[3]: *** [apps_exe_hlos] Error 2 make[3]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make[2]: *** [apps_hlos] Error 2 make[2]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make[1]: *** [apps] Error 2 make[1]: Leaving directory `/home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make: *** [vision_sdk] Error 2 Please advise. Thanks and best regards He Wei + +Responses: +Dear TI, After set the PATH to c6000 to 8.1.0/bin, issue is resolved. Thanks and best regards He Wei + +Hi He Wei, thanks for sharing the solution of the problem. Regards, Yordan + diff --git a/data2/text/range/0-5000/727190.txt b/data2/text/range/0-5000/727190.txt new file mode 100644 index 0000000000000000000000000000000000000000..a3c1800f9254fa4a28e45c4c2cf7f78f4b1b3dcf --- /dev/null +++ b/data2/text/range/0-5000/727190.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: OpenCV, OpenCL and openCX + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear Officer, I am working on TDA2x with VSDK3.4. and notice there are OpenCV, OpenCL and OpenCX in VSDK: 1. There is pre-build openCV libs in folder \ti_components\open_compute\opencv\opencv-3.1.0\libs_linux ( I am more interested on Linux version) 2. Make option : tda2xx_evm_linux_opencl 3. Make option: tda2xx_evm_linux_opencx What is the relationship in TI for these 3 options? My target is trying to use the pre-build Linux OpenCV lib, Should I enable to OpenCX or OpenCL build option to get OpenCV? (There is no make option for OpenCV). Thanks and best regards He Wei + +Responses: +Hi He Wei, 1. There is pre-build openCV libs in folder \ti_components\open_compute\opencv\opencv-3.1.0\libs_linux ( I am more interested on Linux version) [Surya] Yes, use this pre-built openCV libs while building linux side openCV applications 2. Make option : tda2xx_evm_linux_opencl [Surya] MAKECOFIG=tda2xx_evm_linux_opencl will build OpenCL applications only 3. Make option: tda2xx_evm_linux_opencx [Surya] MAKECOFIG=tda2xx_evm_linux_opencx will build both OpenCV & OpenCL applications, Since OpenCV has some dependency over openCL, so no separate make option for OpenCV You should enable OpenCX option to get OpenCV Regards Surya + diff --git a/data2/text/range/0-5000/727251.txt b/data2/text/range/0-5000/727251.txt new file mode 100644 index 0000000000000000000000000000000000000000..7190b59dd7f5277dc166591034f7433a2fe971fe --- /dev/null +++ b/data2/text/range/0-5000/727251.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: OpenCL use case running Failed (Build via Linux) + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI: After build the OpenCL successfully ((Linux) and run the OpenCL use case , I got the below issue: [HOST] [HOST ] 194.371225 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.371225 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.371225 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.403922 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.403922 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.403922 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.403952 s: Kernel Set Arg Error: -48 [HOST] [HOST ] 194.403952 s: Kernel Set Arg Error: -48 Please advise. Thanks and best regards He Wei + +Responses: +Wei please refer VisionSDK_UserGuide_opencx.pdf to build and run openCL demos. Did you make any chances in VSDK or just trying to rebuild and run the demos? BTW, which openCL Usecase/demo you are trying out? regards, Shiju + +Dear Shiju, You means we need to rebuild the openCL demos? Currently I am following VisionSDK_Linux_UserGuide.pdf to build with: MAKECONFIG=tda2xx_evm_linux_opencl After build successfully, and launching on sd card as: $> cd /opt/vision_sdk $> ./load_ocl_kos.sh (needed only for opencl usecases) $> source ./opencl_env.sh (needed only for opencl usecases) $> source ./vision_sdk_load.sh $> ./$(MAKEAPPNAME).out Then I select the 1st available OpenCL use case to run. So this will not work if not rebuild OpenCL demo following VisionSDK_UserGuide_opencx.pdf ? Thanks and best regards He Wei + +He Wei Sorry, We had an issue with OpenCL, as the openCL demos on A15 Linux are broken from VSDK 3.2 onward due a non-compatibility issue between Linux Kernel and openCL pre-built package. OpenCL on A15 linux is depreciated from VSDK 3.2 release onwards regards, Shiju + diff --git a/data2/text/range/0-5000/727262.txt b/data2/text/range/0-5000/727262.txt new file mode 100644 index 0000000000000000000000000000000000000000..72c1484a50adea9b0c8ba95a69cf5ee52b86dae3 --- /dev/null +++ b/data2/text/range/0-5000/727262.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2: OpenCV use case running Failed (Build via Linux) + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI: By configure as OpenCX, I got the OpenCV use case (in Linux in VSDK3.4) but got assertion when running the openCV use case: [HOST] [IPU2 ] 222.668974 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! ASSERT (chains_vipSingleCamOpenCVCannySgxDisplay_priv.c|chains_vipSingleCamOpenCVCannySgxDisplay_Create|166) Please advise. Thanks and best regards He Wei + +Responses: +More logs: ASSERT (chains_vipSingleCamOpenCVCannySgxDisplay_priv.c|chains_vipSingleCamOpenCVCannySgxDisplay_Create|166) [HOST] [HOST ] 90.233239 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 90.233605 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 90.233697 s: ALG: ERROR: No alg create function specified (algId = 5) !!! + +Hi He Wei, The issue has been fixed & will be available with next vision sdk release Regards Surya + +Dear Surya, Thanks for the update. Can I have the patch first? (And what is the schedule for next VSDK release?) Thanks and best regards He Wei + +Hi He Wei, PFA patch Follow the steps mentioned in Readme.txt file OpenCV_Fix.zip Regards Surya + +Hi He Wei, VSDK next release will be available by mid of October Regards Surya + +Dear Surya, Thanks a lot. it works now!! And just to confirm: the entire OpenCV 3.1.0 is pre-built (including object detection libs for linux) is in VSDK already? Thanks and best regards H e Wei + +Yes, OpenCV 3.1.0 packaged with VSDK release contains pre-built libs only Regards Surya + +Dear Surya, May I know the list of the openCV "pre-build libs"module for Linux? especially if it contains the object detection lib? I am trying to search in targetfs but can't find any libopencv*.a. And I try to build with object detection function but face error: "undefined reference to `cvHaarDetectObjects'" I have include the relevant header file. but no idea to check if the actual relevant libs are included in VSDK or not. I am bit stuck here. Please advise. Thanks and best regards He Wei + +Dear Surya, I found in makefile. Thanks and best regards He Wei + diff --git a/data2/text/range/0-5000/727307.txt b/data2/text/range/0-5000/727307.txt new file mode 100644 index 0000000000000000000000000000000000000000..5d9e99f89aae4e7d1d45a1b2f7666b3badfe3c28 --- /dev/null +++ b/data2/text/range/0-5000/727307.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2: Ethernet Issue + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler hi, ethernet is not working properly. its connecting and disconnecting everytime thanks kalaiventhan + +Responses: +Hello Kalaiventhan, Can you please give more information about the platform and software used? Regards, Prasad + +hi, i tried through QNX software for load some file one board working with Ethernet(1 gbs) ,another board is not working i think this board (100 mbs only) thanks kalai + +Hello Kalai, I will ask our Linux/QNX expert to comment. + +Hi Please provide additional information - the HW platform details(TI EVm vs customer board) , any failure logs (link status information etc) Usually the link negotiation part is in HW, SW only sets up the initial configuration. It would be good to review the HW schematics if it is for a new board design + +Hi Kalai, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not please provide additional info that Sriram requested. Regards, Yordan + diff --git a/data2/text/range/0-5000/727405.txt b/data2/text/range/0-5000/727405.txt new file mode 100644 index 0000000000000000000000000000000000000000..6bbccefb25623a1f9324a0938537fe5491fa4565 --- /dev/null +++ b/data2/text/range/0-5000/727405.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: Code example for reading and saving CSI-2 data in TDA2x + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Tool/software: TI-RTOS Hello, I am new to designing the ADAS solutions using TDA2x board. I want to integrate 4 cascaded radar sensors with my TDA-2 processor for my application. I read few posts on TI's website which mentions about using DS90UB960 Deserializer Hub which receives 4 inputs and transmits into one (or two) CSI-2 output port. This interleaved data is then set to TDA2 processor. Is there any example code on how to decode this interleaved data on the TDA2 processor end and store it somewhere( maybe in SD card or PC) so that I can use this CSI-2 data to perform few radar algorithms? Thank you! + +Responses: +Hi Nishant, TDA2x dosen't have CSI2, The CAL driver (hw) performs the de-interleaving. Please refer any of the SRV demos. Regards, Sujith + +Thank you Sujith! I shall look into it and get back to you if I have any questions. Do you have the link for the SRV demos? Best Regards, Nishant + +Hello Sujith, Referring to the answer given by Piyali to this post: https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/662898, where can I find the "single AWR 4 Rx 3Tx de-interleaving done by the EVE FFT functions on the TDA " reference document? I tried searching online but I couldn't find it. Also could you mention the best sources for reading more about the Camera Adaptation Layer (CAL) drivers? Best Regards, Nishant + +Hi Nishant, For CAL details, can i ask you to refer the TRM (Data Manual) of TDA2Px or TDA3x. For the demo applications please refer \apps\src\rtos\usecases\iss_mult_capture_isp_dewarp_3dsv_tda3xx I will have to check on the AWR and get back to you. Regards, Sujith + +Hello Sujith, Thank you for providing the file location for understanding CAL implementation. I have a related question to my original question I asked before, can CSI-2 data be read directly by the TDA3 processor? In Fig 2.7 of the "ProcessorSDKRadar_UserGuide.pdf", there is an image where the CSI-2 Data from AWR1243 is directly connected to TDA3X. I had asked my local TI engineer for help in designing the hardware for the connection board (DIB+VAB boards) for interfacing AWR1243 with TDA3 and she asked me to refer fig 2.7 to create my own customized board for it. So do we need CAL driver hardware only for TDA2 or does TDA3 also require it for collecting data from various sensors? Thank you, Nishant + +Hi Nishant, TDA2x dosen't come with a CSI2 receiver. Only TDA2Px, TDA2Ex and TDA3x has this hardware. Regards, Sujith + +Thank you! Best Regards, Nishant + diff --git a/data2/text/range/0-5000/727688.txt b/data2/text/range/0-5000/727688.txt new file mode 100644 index 0000000000000000000000000000000000000000..7696d67706c5540ef76ed3c231108fbc317695ac --- /dev/null +++ b/data2/text/range/0-5000/727688.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: How to check availability of opencv lib/module in VSDK (Linux)? + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI: There are list of pre-build OpenCV libs in VSDK3.4 folder: PROCESSOR_SDK_VISION_03_04_00_00\ti_components\open_compute\opencv\opencv-3.1.0\libs_linux: libopencv_calib3d.a libopencv_objdetect.a .. I enable the opencx and build and run the OpenCV use case successfully under Linux, but I can't find any libopencv* (listed above) in targetfs. How to check which module is available inside the VSDK? ( I am trying to use openCV object detection API but failed and wonder if there is opencv objdetect lib available in VSDK Linux)? Thanks and best regards He Wei + +Responses: +I found it in makefile. Thanks and best regard He Wei + +Hi He Wei, thanks for updating the thread! Regards, Yordan + diff --git a/data2/text/range/0-5000/727958.txt b/data2/text/range/0-5000/727958.txt new file mode 100644 index 0000000000000000000000000000000000000000..6dce68baaa252c69e7cade61d60a7684cbfb69bb --- /dev/null +++ b/data2/text/range/0-5000/727958.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Does TDA2SG support HDMI out, DDR3L and have Gigabit switch? + +Query Text: +Part Number: TDA2 Does TDA2SG support HDMI out, DDR3L and have Gigabit switch? It shows that they are not supported in parametric table. However, in TDA2x datasheet, 'Table 3-1 Device Comparison', it shows that they are supported. Which specifications are valid? http://www.ti.com/product/TDA2?keyMatch=tda2&tisearch=Search-EN-Everything http://www.ti.com/processors/automotive-processors/tdax-adas-socs/products.html + +Responses: +Hi, The Data Manual is correct - TDA2SG supports HDMI out, DDR3L and Gigabit switch. We will work to get table on the products page fixed. Regards, Yordan + diff --git a/data2/text/range/0-5000/728080.txt b/data2/text/range/0-5000/728080.txt new file mode 100644 index 0000000000000000000000000000000000000000..077537383a328b569dc68697aa4a92d0a8cf255f --- /dev/null +++ b/data2/text/range/0-5000/728080.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: VSDK/OpenCV on RTOS: Running error when imported the pre-build libopencv_objdetect.a and libopencv_highgui.a + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI: Building environment: VSDK3.4 and RTOS. add these 2 libs in makefile: _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_objdetect.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_highgui.a Modify the OpenCV use case and build succeeded but encounter error when runing OpenCV: [HOST ] 39.341731 s: IPC_IN_0 : Create in progress !!! [HOST ] 39.342036 s: IPC_IN_0 : Create Done !!! [HOST ] 39.342127 s: ALGORITHM: Create in progress (algId = 5) !!! [HOST ] 39.346977 s: ALGORITHM: Create Done (algId = 5) !!! [HOST ] 39.347068 s: IPC_OUT_0 : Create in progress !!! [HOST ] 39.347068 s: hewei: prevLinkQueId=0, numQue=1 [HOST ] 39.347099 s: IPC_OUT_0 : Create Done !!! [HOST ] 40.864667 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 40.864667 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 100663296 B (98304 KB), Free size = 100078392 B (97732 KB) [HOST ] 41.075672 s: OpenCV Error: Unspecified error (The storage is not opened) in icvGets, file /datalocal/ti_components/open_compute/opencv_src/tiopencv/modules/core/src/persistence.cpp, line 299 [HOST ] 41.075825 s: Unhandled Exception: [HOST ] 41.075855 s: Exception occurred in ThreadType_Task [HOST ] 41.075855 s: Exception occured in A15 with exception type 18 [HOST ] 41.075855 s: handle: 0x89549ac8. [HOST ] 41.075886 s: stack base: 0x89554df0. [HOST ] 41.075886 s: stack size: 0x4000. [HOST ] 41.075886 s: R0 = 0x72830b0b R8 = 0x89363734 [HOST ] 41.075916 s: R1 = 0x0000093b R9 = 0x00000000 [HOST ] 41.075916 s: R2 = 0x88ec97e6 R10 = 0x89559020 [HOST ] 41.075916 s: R3 = 0x00000000 R11 = 0x89557994 [HOST ] 41.075947 s: R4 = 0x89559ca0 R12 = 0x89547744 [HOST ] 41.075947 s: R5 = 0x893b39f8 SP(R13) = 0x88e13294 [HOST ] 41.075947 s: R6 = 0x89547710 LR(R14) = 0x8f4e2314 [HOST ] 41.075947 s: R7 = 0x8954790c PC(R15) = 0x88e13294 [HOST ] 41.075977 s: PSR = 0x00000000 [HOST ] 41.075977 s: DFSR = 0x00000206 [HOST ] 41.075977 s: IFSR = 0x00000000 [HOST ] 41.075977 s: DFAR = 0x72830b0b [HOST ] 41.076008 s: IFAR = 0x00000000 [HOST ] 41.076008 s: Terminating Execution... [HOST ] 41.076008 s: [HOST ] 41.076038 s: ### XDC ASSERT - ERROR CALLBACK START ### [HOST ] 41.076038 s: [HOST ] 41.076069 s: E_dataAbort: pc = 0x88e13294, lr = 0x8f4e2314. [HOST ] 41.076069 s: [HOST ] 41.076069 s: ### XDC ASSERT - ERROR CALLBACK END ### [HOST ] 41.076069 s: [DSP1 ] 40.864972 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 40.865003 s: SYSTEM: Heap = LOCAL_L2 @ 0x876ac3a4, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 40.865064 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 518264 B (506 KB) Any suggestion on " OpenCV Error: Unspecified error (The storage is not opened) in icvGets, file /datalocal/ti_components/open_compute/opencv_src/tiopencv/modules/core/src/persistence.cpp, line 299"? thanks and best regards He Wei + +Responses: +Hi He Wei, I am working with team on this to get more information. Will back to you soon Regards, Kumar.D + +Dear Kumar, Thanks in advance. Just to give you more information: we had try both in linux and RTOS environment for the OpenCV, if either one is working, it is good enough for us but either one will give us some issue. We don't need the entire OpenCV libs but at least the libobjdetecion lib shall be working. I have searched around, seems the static lib (.a) need to have "proper" order when linking in makefile to avoid any dependency issue but I can't find what is this proper order. We are new to TI TDA2x and this is really crucial for our development if we can break through it. Thanks and best regards He Wei + +Kumar, Please post your comments/questions on the same thread. Regards Karthik + +Hi He Wei, We have limited support for openCV. We are not actively supporting addition of new openCV libraries. Please refer our Object detection demos using the TI libraries for any specific application. Regards, Kumar.D + diff --git a/data2/text/range/0-5000/728093.txt b/data2/text/range/0-5000/728093.txt new file mode 100644 index 0000000000000000000000000000000000000000..ccecff73ccfd9b48932fd038d799e1e7196da163 --- /dev/null +++ b/data2/text/range/0-5000/728093.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: EVE Kernel C code in vision SDK + +Query Text: +Part Number: TDA2 Hi, I try understand how to use VCOP and ARP32 in vision sdk. I read guides for EVE and found next steps: 1. Write kernel .k file 2. Get .obj file by cl-arp32 3. Compile ELF file I have some questions: 1. I have .k file. I have simple algorith in Vision SDK, that works on ARP32. What should I do to connect .k file with vision SDK algorithm plugin? 2. What is AlgIvision? It is used in EVE algPlugins run precompiled EVE library, it's right? Where I can read about it? 3. Also I met *.eve.lib in SDK, how can I get if i have .k file? Thank you for answers. + +Responses: +I have found answer on first question: 1. Add *.k file in SRC_FILES.MK like " SRCS_K_arp32_1 += .k " and define function prototype in .c file where it is called. + +Hi Danil, Please find my answer's inline 1. I have .k file. I have simple algorith in Vision SDK, that works on ARP32. What should I do to connect .k file with vision SDK algorithm plugin? >>> refer answe for point 3. 2. What is AlgIvision? It is used in EVE algPlugins run precompiled EVE library, it's right? Where I can read about it? >>> Can you point to the file or folder which you are referring here? 3. Also I met *.eve.lib in SDK, how can I get if i have .k file? >>> These are the library generated when you build eve sw library. The same is located at ti_components\algorithms\eve_sw_01_xx_xx_xx. You can refer evesw_getting_started.pdf to see how to build these. If you add your kernel to the kernels\kernels_list.txt file it will get build and be part of libevekernels.eve.lib. This procedure can also be used for your first question Regards, Anshu + +Hi, I found reference on AlgIvision in censusLink_algPlugin.c, functions AlgIvision_create(), AlgIvision_process() + +Hi, You can refer ti_components\algorithms\eve_sw_01_xx_xx_xx\apps\docs\EVE_Applets_UserGuide.pdf chapter 2 to understand the ivision API's used in these functions. Regards, anshu + diff --git a/data2/text/range/0-5000/728362.txt b/data2/text/range/0-5000/728362.txt new file mode 100644 index 0000000000000000000000000000000000000000..4f26ab085d430c922ac9a4faebe3a0f2563063a0 --- /dev/null +++ b/data2/text/range/0-5000/728362.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2: EVE/KernelC :- Optimization techniques + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hello There, What are the EVE and/or kernel C optimization techniques ?? Do we have any document for the same?? Regards, Kajal + +Responses: +Hi Kajal, You can refer some examples in EVE software library released by TI to get some idea. Also please refer the TRM for EVE architecture, instruction set to correlate the software examples with the hardware architecture. Regards, Anshu + +Hello Anshu, For now we don't have the TRM for EVE, once we get that we will go through it. But in meanwhile can you please tell us how to reduce the clock cycles in terms of cache & hardware memory utilization. In case of kernel C programming, we have optimized using 16 SIMD width. Do we have any further scope for optimization in Kernel C programming?? Regards, Kajal + +Hi Kajal, EVE doesn't have data cache so there is nothing in terms of cache which can improve performance. Once you have optimized kernels ready then next step would be to set up DMA/ VCOP pipeline in such a way that you can find the data movement via DMA behind VCOP compute. You can refer app\morphology applet to see how it is done. Regarding kernel C optimization I would request you to go though EVE's programmers guide. To get access to this document please contact your local TI contact person. Regards, Anshu + +Hi Kajal, We haven't heard back from you on this thread. Were you able to make progress? If yes please close this thread. Regards, Anshu + diff --git a/data2/text/range/0-5000/728605.txt b/data2/text/range/0-5000/728605.txt new file mode 100644 index 0000000000000000000000000000000000000000..cb22e320b5f55332b7e5b412de3c7edf78a88766 --- /dev/null +++ b/data2/text/range/0-5000/728605.txt @@ -0,0 +1,30 @@ +Ticket Name: CCS/TDA2PXEVM: Hwi_disable() function definition + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi, I'm trying to test whether interrupts are enabled for a vision SDK usecase by setting a breakpoint at Hwi_disable(), but I can't seem to find the function definition? Thanks, Richard + +Responses: +Hi Richard, Hwi_disable is a BIOS API. You will have to build SDK in debug mode and step into BIOS APIs to see the definition. You are trying this on which CPU? Regards, Rishabh + +Hi Rishabh, I'm not interested in the internals of hwi_disable per se, I just wanted to be able to set a breakpoint there for debugging. Since it's a BIOS API, does this mean I can't set a breakpoint at its definition? I am trying this for the camera + radar combo usecase, which registers the interrupt handler to GPIO7_9 on the TDA2PxEVM board. However, I am not sure which CPU GPIO7_9 corresponds to. My problem is that when I probe GPIO7_9, I can see the interrupt request come over. In the software for the usecase, the interrupt handler is also registered to GPIO7_9. However, when I add a breakpoint at and printf() to the interrupt handler, I can tell that it's never invoked. Alternatively, is there some better way for me to verify whether interrupts are enabled correctly for this usecase, rather than stepping through the code and examining every call to hwi_enable and hwi_disable? Thanks, Richard + +Hi Richard, GPIO7_9 does not correspond to any CPU. User decides to run on a particular CPU for a particular use case. Can you point to the name of exact use case which you are trying to run. Regards, Rishabh + +Hi Rishabh, I am running the "Camera and Radar Capture + Radar Processing (DSP1) + Display (HDMI)" usecase, under "Camera and Radar Combo Use Cases". Based on the usecase files, it looks like the CPUs IPU1_0 and DSP1 are used. Thanks, Richard + +Hi Richard, You need to know what is the exact CPU where you are running this code. In case you want to check if interrupt is getting set you should check the GPIO registers for IPR bit. In case IPR is set in GPIO you should make sure that crossbar is configured correctly. Regards, Rishabh + +Hi Rishabh, The IPU1_0 is the CPU running this code. Here is what my CCS registers tab looks like: How can I tell which are the GPIO registers? Thanks, Richard + +Hi Richard, Ok so you are running on IPU. Can you refer to TRM for GPIO7 registers. Regards, Rishabh + +Hi Rishabh, I looked in the TRM and found the "PM_L4PER_GPIO7_WKDEP" register. Is this the relevant interrupt enable register? When I view the register after loading binaries onto the TDA2 board, the value indicates all wakeup dependencies are disabled. When I try to view it again once the code has progressed to the point at which it's waiting for the interrupt, I get a "target failed to read" error. Are there additional settings I need to configure in order to view the register once the code has begun to execute? In addition, I don't see any reference to an IPR bit for any of the GPIO registers. Thanks, Richard + +Hi Rishabh, I figured out that the interrupts were correctly enabled. Thanks, Richard + +Hi Richard, It is not clear to me if the issue is resolved or not. Can you let me know what was the root cause? Regards, Rishabh + +Hi Rishabh, I rolled back my modified Vision SDK to an earlier version, added only the essential modifications from the current version, and interrupts from the radar chip were successfully detected. I was not able to identify a specific root cause. Thanks, Richard + +Ok thanks. I will close this thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/728749.txt b/data2/text/range/0-5000/728749.txt new file mode 100644 index 0000000000000000000000000000000000000000..31baec5c48016e0caea09268b18cb6e5ad8d4bc3 --- /dev/null +++ b/data2/text/range/0-5000/728749.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: DDR3 Routing Specifications + +Query Text: +Part Number: TDA2 Referring to TDA2 data sheet, Table 8-52, are there typo errors in unit? Example, should the A1+A2 length in mil instead of ps? Or how to correlate the max 500ps to signal length? + +Responses: +Hi, The units ("ps") are correct. Determining the max signal length (in mils) will be dependent on the material of the PCB and whether the signals are routed as microstrip or stripline. Best regards, Kevin + diff --git a/data2/text/range/0-5000/728768.txt b/data2/text/range/0-5000/728768.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3b5183ffccc8d342858754a730a62a86aa47452 --- /dev/null +++ b/data2/text/range/0-5000/728768.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2 CPU Selection Issues + +Query Text: +Part Number: TDA2 Dear E2E: Project: streaming media rearview mirror project, Now it was in selection station. Due to the inconsistent camera resolution and LCD resolution,it need to do some processing. The current competitor is Renesas Iw8836 720p/iw8845 1080p, customers ask TI whether there are similar cost-effective product recommendations. Thank you. Customer needs are as follows Camera input signal 1280*800, LCD resolution is about 1280*400. The Camera image can be converted to the LCD with integrated storage. Video ICs or CPUs with integrated Video ICs are fine. thanks . + +Responses: +hello, You can refer to this page for guidance and additional details for your use-case http://www.ti.com/processors/automotive-processors/tdax-adas-socs/applications/mirror-replacement-system.html I would recommend TDA3x for the system you describe. regards Kedar + diff --git a/data2/text/range/0-5000/728814.txt b/data2/text/range/0-5000/728814.txt new file mode 100644 index 0000000000000000000000000000000000000000..09a8eac10cf523c261581b0d9b1288972fcc78c7 --- /dev/null +++ b/data2/text/range/0-5000/728814.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: Part number selection + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, Now we are using TDA2x part number is TDA2SXBTQABCQ1 to implement TIDL OD, LD and TSR, but could we use TDA2SGBRQABCQ1 (only 1xA15, the rest of functions are the same) or lower version (e.g. TDA2HGBRQABCQ1) for cost saving w/o performance degradation? Please refer to the attachment to help double check what's minimum version of HW chipset for PROCESSOR SDK-VISION-03.04 OD, LD and TSR (we are combining OD, LD and TSR functions). Thank you. SidneyADAS TDA2 Part number.xlsx + +Responses: +Hi Sidney, The TDA2x part number selection depends on your use case and fps requirement. We provide the performance of our modules in Mega Cycles in their respective data sheets and from these numbers you can calculate the performance and can choose required TDA2x part number. For example, TIDL OD usecase need "96.24 Mcycles" on EVE and need "5.87 Mcycles" on DSP, mentioned in the data sheet. Thanks, Praveen + +Hi Praveen, I can not find it from datasheet (Silicon Revision 2.0), could you advise me which one document to show TIDL OD usecase need "96.24 Mcycles" on EVE and need "5.87 Mcycles" on DSP ? BTW, except EVE and DSP, will it also tell me when we need 2xA15 or 1xA15 only due to local FAE informed me TIDL OD needs 2xA15? Sidney + +Hi Sidney, You can find this document (TIDeepLearningLibrary_DataSheet.pdf) in VSDK at \ti_components\algorithms\REL.TIDL.01.01.01.00\modules\ti_dl\docs folder. Also, this A15 core details will be given in use case chains and this can be find in VSDK at "\vision_sdk\apps\src\rtos\usecases\tidl_OD\chains_tidlOD.jpg". Thanks, Praveen + +Hi Praveen, Thank you for prompt reply. For EVE and DSP, I can learn from the document of TIDeepLearningLibrary_DataSheet.pdf. But from chains_tidlOD.jpg, there is only one A15 on the diagram, does it mean TIDL OD just needs one A15? Now we are using TDA2x part number is TDA2SXBTQABCQ1 (2xA15) to implement TIDL OD, LD and TSR, but we would like to change to use TDA2SGBRQABCQ1 (only 1xA15) and not sure it is available for TIDL OD, LD and TSR applications. Thank you. Sidney + +>> But from chains_tidlOD.jpg, there is only one A15 on the diagram, does it mean TIDL OD just needs one A15? Yes, correct. TIDL OD needs one A15 core. For other use cases also you can check the use case diagrams. Thanks, Praveen + diff --git a/data2/text/range/0-5000/728915.txt b/data2/text/range/0-5000/728915.txt new file mode 100644 index 0000000000000000000000000000000000000000..c8bda8ab29eba60f8fbffd225580822d504f6b94 --- /dev/null +++ b/data2/text/range/0-5000/728915.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Complete TDA2 part number in TDA2Px-ACD CPU EVM Board + +Query Text: +Part Number: TDA2 Hi, What's complete part number in TDA2Px-ACD CPU EVM Board? Where could get schematic? + +Responses: +Hi, the CPU on the EVM is a "superset" part that can be configured as particular TDA2Px device. You can find EVM schematics (along with other documents) here: www.ti.com/.../tda2pxevm Regards, Yordan + diff --git a/data2/text/range/0-5000/729194.txt b/data2/text/range/0-5000/729194.txt new file mode 100644 index 0000000000000000000000000000000000000000..154a3a63cf0183580cd5b31783045e133aabb16a --- /dev/null +++ b/data2/text/range/0-5000/729194.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: Any limit for eltwise in tidl? + +Query Text: +Part Number: TDA2 Hi, I use the the following block in cifar-10 network, but it always go wrong. And I try to change it to the following block, and it works well, but accuracy has a large drop There is something wrong with the first block or something limits for eltwise block? Thanks + +Responses: +Both the cases are suported by TIDL. are your using caffe or tensorflow trained model? For the first case are you oberserving import issue or wrong inference output? Can you share the model, we will have look. Rgerda, Kumar.D + +Hi, Please help to check the model, thanks eltwise_without_relu_previous.tar.gzeltwise_with_relu_previous.tar.gz + +Hi , Do you have any updates about this issue? Thanks. Jerry + +Hi Jerry, I am working on it, I will post my response here as soon as I have some update. Thanks for your patience. Regards, Praveen + +Hi Jerry, As indicated in the TIDL user guide section 3.9 TIDL Limitation, Eltwise layer only supported on inputs of same types, but in the first case (eltwise_without_relu_previous), one input "layer_64_1_bn3" is signed and other input "conv1_pool" unsigned, so it is not supported and hence not working. Please make sure both the input should be of same type (either both are unsigned or signed inputs). Thanks, Praveen + +Hi Praveen, Got it. I'll modify the net structure to satisfy this limitation, and make a validation later. thanks for your help. Thanks, Jerry + diff --git a/data2/text/range/0-5000/729225.txt b/data2/text/range/0-5000/729225.txt new file mode 100644 index 0000000000000000000000000000000000000000..9c4699dcf3a59d575fe4a6a1a098fb217f40e399 --- /dev/null +++ b/data2/text/range/0-5000/729225.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: how to creat vcop_median3x3_kernel.c and vcop_median3x3_kernel.h from vcop_median3x3_kernel.k + +Query Text: +Part Number: TDA2 Tool/software: Linux in SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3 have vcop_median3x3_kernel.k how can i creat vcop_median3x3_kernel.h? thanks shuai + +Responses: +Shuai, We have already discussed this in the following thread : e2e.ti.com/.../2676382 Is it still not clear? Regards, Anshu + +Hi Anshu yes ,i cannot generate vcop_median3x3_kernel.h from vcop_median3x3_kernel.k i compile SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3 by gmake also cannot generate vcop_median3x3_kernel.h. BESTWISHES shuai + +Are you using makefiles which comes as part of EVESW? Can you explain how are you building? Regards, Anshu + +Hi Anshu cmd to D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test then run gmake target, in D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test\elf_out creat vcop_median3x3_kernelC.out. follow is the log ! D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test>gmake target D:\ti_ccsv7\ccsv7\utils\cygwin\mkdir -p ".\elf_out" || cd ".\elf_out" "D:\ti_SDK_VISION_03_02_00_00\ti_components\cg_tools\windows\arp32_1.0.7"\bin\cl-arp32 -O3 --opt_for_speed=5 -kh --silicon_version=v210 -lu --display_error_number --diag_suppress=26066 --diag_suppress=10063 -I"D:\ti_SDK_VISION_03_02_00_00\ti_components\cg_tools\windows\arp32_1.0.7"\include -I"D:\ti_SDK_VISION_03_02_00_00\ti_components\cg_tools\windows\arp32_1.0.7"\include\vcop -I . -I"..\..\..\..\common" -I"..\..\..\common" -I"..\..\..\..\starterware\inc" -I"..\..\..\..\star terware\inc\baseaddress\vayu\eve" -I"..\..\..\inc" -I"..\inc" vcop_median3x3_config.c vcop_median3x3_tb.c "..\..\..\..\common\configparser.c" "..\..\..\..\common\eve_profile.c" "..\..\..\..\common\curve_fitting.c" "..\..\..\..\common\ti_stats_collector.c" ..\..\..\common\boot_arp32.obj -z -l ..\src_kernelC\vcop_median3x3_kernel.obj -l..\..\..\lib\release\libevenatckernels.eve.lib -l"..\..\..\common\linker_boot_cama.cmd" -l"D:\ti_SDK_VISION_03_02_00_00\ti_components\cg_tools\ windows\arp32_1.0.7"/lib/rtsarp32_v200.lib -l"..\..\..\..\starterware\libs\vayu\eve\release\libevestarterware_eve.lib" -m ".\elf_out"\vcop_median3x3_kernelC.map -o ".\elf_out"/vcop_median3x3_kernelC.out [vcop_median3x3_config.c] [vcop_median3x3_tb.c] [configparser.c] [eve_profile.c] [curve_fitting.c] [ti_stats_collector.c] BESTWISHES shuai + +Shuai, The header vcop_median3x3_kernelC.h will be generated inside /kernels/inc directory. Please check if you can find it there. Regards, Anshu + +Hi Anshu befor i compile in D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\inc have vcop_median3x3_kernelc.h and vcop_median3x3_kernelc.c , i move them and rebuild generate vcop_median3x3_kernel.h. so this thread is over! thanks ! shuai + +Can we close this thread? Regards, Anshu + +Hi: Anshu Of course! Regards, shuai + diff --git a/data2/text/range/0-5000/729258.txt b/data2/text/range/0-5000/729258.txt new file mode 100644 index 0000000000000000000000000000000000000000..4603b27e4df866a1644c37f4a973743a4a6ee30a --- /dev/null +++ b/data2/text/range/0-5000/729258.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: How to exchange data between IPU1_0 and IPU1_1 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, I have a global variable "Var" at IPU 1-1. How to exchange "Var" to IPU1-0 if need? Could you please give me advise? Thanks. + +Responses: +Hi Prince, You need to allocate the buffer from the shared memory space. This shared memory space will be accessible on all cores.. Rgds, Brijesh + +Hi Brijesh, Thanks for your reply. Have any links or utils of SDK can study? + +Hi Prince, Look the usage of the object gSystemLinkStatsCoreObj in the vision sdk. This object is allocated from non-cached shared section and accessed from all cores. Rgds, brijesh + +Thanks for your support. + diff --git a/data2/text/range/0-5000/729324.txt b/data2/text/range/0-5000/729324.txt new file mode 100644 index 0000000000000000000000000000000000000000..e90432bd3f854429581a76e3475300dcf878dc00 --- /dev/null +++ b/data2/text/range/0-5000/729324.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: TIDL-1.1 SSD model test application in host emulation mode encountered memory leak + +Query Text: +Part Number: TDA2 Hi 1.Now, when i use below configuration on pc to do ssd, I encounter memory leak problem. beause i want use pc simulate eve to do ssd, so I build the tidl_alg.lib use command: gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve all 2.I track the code, finding that when comment each other the below two code slice, memory no longer leaks, (1) (2) 3. i use model within the tidl package, below is the model jdetnet.zip + +Responses: +configuration is as below #if defined(HOST_EMULATION) || (VCOP_HOST_EMULATION) #define ENABLE_TRACE_PROFILE (0) #define ENABLE_REF_COMPARISION (0) /* To enable the natural C-code for the optimized C66x kernels */ #define ENABLE_CN_CODE (0) #define ENABLE_PRINTFS (0) + +Hi, What is the TIDL release version you are using? What kind of memory leak you are observing? Can you please share some screenshot of the memory leak ? Thanks, Praveen + +i use tidl 01.01.00.00 the memory leak as follow, with the program runnig, it used memory increasingly as follows: some time later, as follows finally, the program exit. + +Hi, Can you please check with latest TIDL release version tidl 01.01.01.00 ? Because we fixed similar issue in this release. Thanks, Praveen + +Hi: I can not get latest tidl version, can you build a pc version lib for me. with command:gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve all thanks + +can you tell me what result in this memory leak, i want to solve this with tidl 01.01.00.00. because our cdds account expired, can not get 01.01.01.00. + +Hi, Sorry, couple of files are modified for this fix and also we can not share source code here. Please contact your local TI FAE for getting access to CDDS as it is good to have latest releases and also we do provide releases regularly. Thanks, Praveen + diff --git a/data2/text/range/0-5000/729366.txt b/data2/text/range/0-5000/729366.txt new file mode 100644 index 0000000000000000000000000000000000000000..89290b5e69b476914c90b997534ff93ab7f74e6a --- /dev/null +++ b/data2/text/range/0-5000/729366.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/TDA2: OV490 video output issue in VSDK 3.04. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi , I am using a custom Board and running VSDK 3.04 with Linux usecase. In VSDK 3.04 ,the ov490 video output via chains like this: IPU capture -> split ->IPC -> A15 -> SGX -> IPU display. and in IPC Link , the Video BufAddr export to dmaFd ,mapped to tex[]. THE ISSUE is that SPLIT LINK using address manipulation only , the stitched two video exported to the same dmaFd, so it cannot split the video frame. Any clues to help me split the stitched video buf ? Best regards, John + +Responses: +Hi, Split link splits vertically the incoming video data to multiple channel in its output queue by changing the buffer address. Can you tell me exactly what you want to do so that i can help you properly. Regards, Anuj + +i think it splits the frame horizontally. Essentially, for same input buffer, it gives out two buffer pointer, one for the start address and other middle of the line.. It does not really do any buffer copy, just buffer pointer manipulation What exactly your requirement? Regards, Brijesh + +thanks for reply. I tested the srv linux usecase with ov490 ISP. But the 4 textures displayed 2 camera videos with 2 duplicated ones. as below. I checked the code, the tex[0], tex[1] mapped the same dmaFd. So did the tex[2], tex[3]. I want 4 camera videos to displayed. regards, John + +Hi, Can you explain your complete setup. As the above usecase has been designed by Ti for a specific customer which uses 4 cameras capturing at 1280*720 and 2 cameras going to OV490 which gives a total of 2 output of 2560*720 for 4 cameras input. So if you have similar kind of setup then only use the above usecase. Regards, Anuj + +Hi, Anuj Thanks for reply. It is the same kind of setup . A total of 2 output of 2560*720 for 4 cameras input. I check the code about vmem and egl. And print out the address before dma-export. But I cannot find how to print out the address after dma-export in egl function. How can I check the exported YUV address ? For comparing the different? Regards, John + +Hi, For debugging purpose can you try to run the similar usecase which is provided for bios for OV490 Regards, Anuj + +Hi, Why not Linux usecase? Have ti tested for linux usecase? It runs ok in Vision SDK 2.xx Regards, John + +Hi, Yes, you can go ahead with linux usecase also. For better debugging can you modifying your usecase and add merge after the 2 splits link and then display and dynamically display all channels alternatively. Above approach will be easier in debugging. Regards, Anuj + +Hi, Thanks for your suggest. I will try it. Any suggest for debugging Linux usecase? Regards, John + +Hi, You can modify your linux usecase only, no need to move to bios. Regards, Anuj + +Hi Anuj, In my board, the YUV output from OV490 like this: cam1 addr 1 | cam2 addr 2 Y1 Y2 ... Y1280 | Y1281 .... Y2560 Y2 .... ... Y720 ........ U1, V1, ... ... Now my problem is that the DMABUF export the data which 4K page aligned as a dmafd. Any offset in this page are masked. So how can I pass two address within this page to GPU? Here is my other question thread: e2e.ti.com/.../737370 Regards, John + +Close the thread as there is a new one. Regards, Yordan + diff --git a/data2/text/range/0-5000/729607.txt b/data2/text/range/0-5000/729607.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f69b810a87bca1ce5e5f1d8b906d2fd2d24e51d --- /dev/null +++ b/data2/text/range/0-5000/729607.txt @@ -0,0 +1,36 @@ +Ticket Name: RTOS/TDA2: TIDL ssd result different on EVE platform and PC + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi: I trianed an ssd model, buf found that the result is different between the eve platform and PC host emulation in some video frame + +Responses: +Hi Can you share the make command used for building PC host emulation ? + +gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve all and gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve RUN_REF_FOR_STATS=1 all i try both the above two command, but the result is similar. + +With the below command it is expedted to match with EVE target gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve all but not for the other. Can you enebale layer level trace for PC and target and locate the miamatching layer + +how i can enable layer level trace , and when enable the layer level trace what Ican see? + +do you mean I can enable layer level trace by enable below define? #define ENABLE_TRACE_DUMP (1) but when I enable this, on the eve platform i can not successfully build appimage on pc, when enable this define, i can get layer level trace data. + +Hi how i can enable layer level trace for target. thanks. + +You need to build standalone test application for EVE and run using JATG and CCS + +Hi: when i load eve_test_dl_algo.out, i encountered follow problem: ARP32_EVE_1: Trouble Reading Memory Block at 0x0 on Page 0 of Length 0xad: (Error -1065 @ 0x0) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0) can you help me to look at what the probelm. i can load dsp_test_dl_algo.out successfully. + +i use simulator to run the standalone test, but i can not get layer level trace data. And the result between standalone test and PC differs some pixels for the detected box, is this expected. + +Can you check below flag in *multicore_reset.gel for loading code in EVE #define EVE_SW_CONFIG 1 /* Applicable for EVE_SW users only * Effective only when * VISION_SDK_CONFIG == 0 */ + +Target execution shall mathc with host emualtion (gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve all) + +in which package and which directory i can find *multicore_reset.gel thanks + +thanks, i find the .gel file + +i still can not load program into eve with jtag. i changed the value you said. + +i import the same input to platform, finally we get the result with one pixel difference compared with pc. through this, we think, with the same input image, the output from vpe and tidlpreproc link is different from pc in which we use opencv get the rgb data from the input image. + diff --git a/data2/text/range/0-5000/729676.txt b/data2/text/range/0-5000/729676.txt new file mode 100644 index 0000000000000000000000000000000000000000..bf998da3cc49c70f95226d075f79d83b10a81e63 --- /dev/null +++ b/data2/text/range/0-5000/729676.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EXEVM: TDA2 ISSCAPTURE + +Query Text: +Part Number: TDA2EXEVM Tool/software: Linux Dear Sir: We are using VSDK 03_04_00_00. We try to use the CSI2 format to capture from the MIPI interface. When setting the inCsi2DataFormat to SYSTEM_CSI2_YUV422_8B, it is okay. However when trying using the SYSTEM_CSI2_YUV420_8B or SYSTEM_CSI2_YUV420_8B_LEGACY, it fail to create the ISSCAPTURE link. By tracing the code, I see that the underlying link only support SYSTEM_CSI2_YUV422_8B, but not supporting the 420 format. But if tracing the PDK driver, we can see there is no such forbidden case in the PDK. Because the heat problem in the CPU, we want to try lower down the CSI2 transmitted data to reduce the heat when 8 channel(4CH in Parallel and 4 CH in CSI-2) are using in our board. My question is that: is it possible to use YUV420_8B or 420_8B_LEGACY in the PDK? Because both of these 2 types sending less data through the CSI-2 interface. Dos PDK support it? Or does TI has any plan to support it in ISSCAPTURE link in the future? Regards, /ckhsu + +Responses: +Hi ckhsu, ISS Capture driver supports all formats, but link is limited to few formats. You could easily add support for these formats in the iss capture link. The change required are in this check data format function and buffer allocation function. Can you make the changes and try it out? Regards, Brijesh + +Hi Brijesh: I see. I paste the places that should be modified in the end of the response, please let me know whether it is correct place or not. However from what I understand, the LEGACY YUV420 8 bit frame is send through MIPI as following: U1Y1Y2 U3Y3Y4 ...... U637Y637Y638U639Y639Y640 ==> Odd line V1Y1Y2 V3Y3Y4 ...... V637Y637Y638V639Y639Y640 ==> Even line ...... In LEGACY YUV 420 8bit the pitch is fixed, it should be okay to add in the ISSCAPTURE link. But the YUV 420 8bit data in the MIPI is Y1Y2......Y639Y640 ==> Odd lines U1Y1V1Y2U3Y3V3Y4......U637Y637V637Y638U639Y639V639Y640==> Even Lines And the Odd and Even lines are in different sizes. And how this should be modify in the Link code? Or should this type be ignore in the link? Because This color space is quite different from the original UYVU422 or YUV420SP etc, I don't know how this should be done in described in the QueueInfo and Frames buffer struct. Can you give me some hints about this color space? I suppose the place to add the code is in this part inside IssCaptureLink_drvCreate. ////////////////////////////////////// for (chIdx = 0U; chIdx < pPrm->numCh; chIdx++) { pitchMul = getPitchMultiplier(&pPrm->outParams[chIdx], pObj->createArgs.videoIfMode, pObj->createArgs.videoIfWidth); pQueChInfo = &pObj->info.queInfo[0U].chInfo[chIdx]; pQueChInfo->width = pPrm->outParams[chIdx].width; pQueChInfo->height = pPrm->outParams[chIdx].height; pQueChInfo->startX = 0; pQueChInfo->startY = 0; pQueChInfo->pitch[0] = SystemUtils_align(pObj->createArgs.outParams[chIdx].maxWidth * pitchMul, ISSCAPTURE_LINK_BUF_ALIGNMENT); pQueChInfo->pitch[1] = 0; pQueChInfo->pitch[2] = 0; pQueChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pQueChInfo->flags, pObj->createArgs.outParams[chIdx].dataFormat); pQueChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pQueChInfo->flags, SYSTEM_SF_PROGRESSIVE); /* Using complex IO cont flag instead of PHY/PPI, as CAL would require an instance of complex io for an instance of PHY */ UTILS_assert(VPS_ISS_CAL_MAX_CMPLXIO_INST > pObj->createArgs.outParams[chIdx].phyInstance); } ///////////////////////////////////////// I suppose the Bualloc is in Int32 IssCaptureLink_drvAllocFrames(IssCaptureLink_Obj *pObj) And in if(System_useLinkMemAllocInfo( &pObj->createArgs.memAllocInfo)==FALSE) { fvid2Frame->addr[0][0] = Utils_memAlloc( UTILS_HEAPID_DDR_CACHED_SR, pObj->outBufSize, SYSTEM_BUFFER_ALIGNMENT ); } else { fvid2Frame->addr[0][0] = System_allocLinkMemAllocInfo( &pObj->createArgs.memAllocInfo, pObj->outBufSize, SYSTEM_BUFFER_ALIGNMENT ); } ///////////////////////////////////////////////////////////// Regards, /ckhsu + +Hi Brijesh: The MIPI 420 information can be found in the MIPI document. And there is a draft documents on net electronix.ru/.../index.php Please see the page 77 for YUV420 8 bit packet format. Regards, /ckhsu + +Hi ckhsu, You could change the pitch and set the CSI data type to capture this frame. But how do you separate luma and chroma planes. Capture modules will not be able to separate them, they will be interleaved when captured.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/729740.txt b/data2/text/range/0-5000/729740.txt new file mode 100644 index 0000000000000000000000000000000000000000..53772dc7c6faf8470c3d7ce116aaf7b2c5c1fe2b --- /dev/null +++ b/data2/text/range/0-5000/729740.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Question for VIP YUV to RGB + +Query Text: +Part Number: TDA2 Hi, The VIP input is YUV 422: 1、If we change outParams[0].dataFormat to SYSTEM_DF_RGB24_888, the capture does not work(CaptureLink_drvProcessData() has no print log). 2、If we change outParams[0].dataFormat to SYSTEM_DF_YUV420SP_UV, the capture working(CaptureLink_drvProcessData() has print log). Does any possible param set loss or other sugguestion for this issue? + +Responses: +Hi Bin Ye, Can you please check if CSC is enabled in the path? It should work. Rgds, Brijesh + +Hi Brijesh, We have some new clue for this issue: 1、In function VpsHal_dssConfVidPipe, the “vidConf->inFmt.dataFormat” is always FVID_DF_YUV420SP_UV whatever the outParams[0].dataFormat is set to SYSTEM_DF_RGB24_888 or SYSTEM_DF_YUV420SP_UV or other format. It is hard for us to find how the dataFormat coming due to the some function invoking is not explicit between ti component and vision_sdk. Could you tell us what is the source configure place for inFmt.dataFormat? 2、In function VpsHal_dssConfVidPipe, only YUV format could entry halDssVidConfCscEnable as below. Does it need to add condition for RGB? if ((vidConf->inFmt.dataFormat == FVID2_DF_YUV422I_YUYV) || (vidConf->inFmt.dataFormat == FVID2_DF_YUV420SP_UV) || (vidConf->inFmt.dataFormat == FVID2_DF_YUV422I_UYVY)) { halDssVidConfCscEnable(handle, (UInt32) 1U); } 3、In function halDssConvFvid2DataFmt, there is no case for FVID2_DF_RGB24_888(only have FVID2_DF_BGR24_888), does it means RGB888 not support? Int32 halDssConvFvid2DataFmt(UInt32 handleId, UInt32 fvid2Fmt) { Int32 fmt; Int32 dssVidPipe, dssWbPipe; dssVidPipe = VpsHal_dssIsVidPipe(handleId); dssWbPipe = VpsHal_dssIsWbPipe(handleId); if (((Int32) TRUE == dssVidPipe) || ((Int32) TRUE == dssWbPipe)) { switch (fvid2Fmt) { case FVID2_DF_YUV422I_UYVY: fmt = 0xb; break; case FVID2_DF_YUV422I_YUYV: fmt = 0xa; break; case FVID2_DF_YUV420SP_UV: fmt = 0; break; case FVID2_DF_BGR24_888: /*RGB24-888*/ fmt = 0x9; break; case FVID2_DF_XBGR_4444: /*RGBX12_4444*/ fmt = 0x1; break; case FVID2_DF_BGRX_4444: /*XRGB12_4444*/ fmt = 0x4; break; case FVID2_DF_BGRA16_4444: /* ARGB16_4444*/ fmt = 0x5; break; case FVID2_DF_ABGR16_4444: /*RGBA16_4444*/ fmt = 0x2; break; case FVID2_DF_BGRX16_5551: /*xRGB16-1555*/ fmt = 0xF; break; case FVID2_DF_BGRA16_5551: /*ARGB16-1555*/ fmt = 0x7; break; case FVID2_DF_BGR16_565: /* RGB16- 565*/ fmt = 0x6; break; case FVID2_DF_BGRX24_8888: /*xRGB24-8888*/ fmt = 0x8; break; case FVID2_DF_XBGR24_8888: /*RGBx24-8888*/ fmt = 0xE; break; case FVID2_DF_BGRA32_8888: /*ARGB32-8888*/ fmt = 0xc; break; case FVID2_DF_ABGR32_8888: /*RGBA32-8888*/ fmt = 0xd; break; case FVID2_DF_ARGB32_8888: /*BGRA32-8888*/ fmt = 0x3; break; default: fmt = BSP_EFAIL; break; } } Rgds, Ye + +Has any sugguestion for this issue? We are very puzzled... + +Hi Bin Ye, The code that you are looking at is for the DSS. DSS support YUV to RGB using CSC and it supports on BGR format.. But i guess what you are looking for is YUV to RGB conversion in VIP, isn't it? Regards, Brijesh + +Ok, we'll check it, thx. + diff --git a/data2/text/range/0-5000/729884.txt b/data2/text/range/0-5000/729884.txt new file mode 100644 index 0000000000000000000000000000000000000000..c0a8665bfd19597d7c011fa29d9378eabee8f74b --- /dev/null +++ b/data2/text/range/0-5000/729884.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2: Gmake optimization and language options + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi, I use vision sdk 3.04 for ubuntu. How could I enable optimization and c99/c11 options for gmake? Or where can I read about it? Thanks for answers. + +Responses: +Hi, You can add c flags in vision_sdk/build/rtos/makerules/ Please follow the below doc \PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf Regards, Anuj + +Hi, For example, For A15 add "CFLAGS_INTERNAL+= -std=c99 " enable c99 option, is it right? + +Hi, You can not do like that coz if you modify CFLAGS_INTERNAL it will be same for c and cpp file and for cpp files -std=c99 is not a valid flag. So add it where it compiling c files only like below $(OBJ_PATHS): $(OBJDIR)/%.$(OBJEXT): %.c $(ECHO) \# Compiling $(PLATFORM):$(CORE):$(PROFILE_$(CORE)):$(APP_NAME)$(MODULE_NAME): $< $(CC) -MD -MF $(DEPDIR)/$(basename $(notdir $<)).P -std=c99 $(_CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) -o $(OBJDIR)/$(basename $(notdir $<)).$(OBJEXT) $< Regards, Anuj + +Thank you + diff --git a/data2/text/range/0-5000/730068.txt b/data2/text/range/0-5000/730068.txt new file mode 100644 index 0000000000000000000000000000000000000000..312ba0ee67c31afe04721ec13d465c63061f7116 --- /dev/null +++ b/data2/text/range/0-5000/730068.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: [TIDL_OD + LD] + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, we use TDA2xx SDK03.04 and want to combine TIDL_OD and Lane detection but we have abnormal output. please teach us how to create this case our flow and logs are as following: case modification flow: we use 1280x720 camera as capture use dup for lane detection and tidl_OD use VPE transfer 1280x720 to 768x320 for tidl_OD Question 1: but we got wrong function result log is as following session_0915_1280.log can you tell us where is wrong? or tell us the right way . Question 2: Will lane detection or TIDL_OD output resolution equal to input resolution? ex. TIDL_OD use 768x320 as input , is it same as 768x320 after tidl_dsp ? Question 3: Has the merge links must need all inputs with same resolution? like this case , the merge has Q0、Q1、Q2 three inputs, they must need the input with same resolution? + +Responses: +Hi, TIDL_OD is not been tested with live capture. Please check the tidl_od usecase. Regards, Anuj + +Hi, so we need use Nullsource link to replace Capture link? That's fine, we can change it. But the Q2 &Q3 , can you answer us? Allen + +Hi, Q2: yes Q3: no Regards, Anuj + +Hi, ok, and we have two question about Q1 (1) Will TI combine these two usecase (Lane detection and TIDL_OD ) ? When? (2) We try to create our custom usecase. The flow is the picture but we got the wrong result: a. object draw doesn't appear b. lane detection draw is in the left-down (wrong position) in frame Can you tell us where is wrong? + +Has any response ? + +Hi, (1) Will TI combine these two usecase (Lane detection and TIDL_OD ) ? When? No, TI doesnot have any plan to combine these 2 usecase. Please use the below usecase for the object detection and lane detection Z:\ADAS\vision_sdk\apps\src\rtos\usecases\vip_single_cam_analytics2 Regards, Anuj + diff --git a/data2/text/range/0-5000/730973.txt b/data2/text/range/0-5000/730973.txt new file mode 100644 index 0000000000000000000000000000000000000000..4467d6cf45bb65bb236f976673a3b8d1cef40e82 --- /dev/null +++ b/data2/text/range/0-5000/730973.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Is Vector to scalar switching possible? + +Query Text: +Part Number: TDA2 Hi, Is it possible to switch from vector to scalar in VCOP kernel C? I want to make decisions based on the individual element value, will it be possible? Regards, Shruti + +Responses: +Hi Shruti, Can you provide some example of what you want to do? VCOP only works with vector instructions but if we know what you are trying to do we may provide some alternatives. Regards, Anshu + +Hi Anshu, I have a use case wherein, depending on the value of the element I have to set a flag. This flag can range from 0 to 7. Depending on the flag's value, I have to perform some operations. In normal C this is easy, the flag can be set for a single element, and normal if-else conditions take care of the rest. But, when using kernel C, 8 elements are processed at a time, and the flag is also a vector. So, all the elements of the flag will be in the range of 0 to 7. And for each element the operation should be different. Is there a way to handle this? Regards, Shruti Joshi + +Shruti, Can you look into select instruction of VCOP and see it helps? Regards, Anshu + +Hi Shruti, We haven't heard back on this from you. Were you able to make progress? If yes please close this thread. If not then let us know. Regards, Anshu + +Hi Anshu, We tried to use select instruction, but that does not solve the purpose. So we decided to change the code logic itself. So that we do not have to take such complex decisions. Anyways thanks for your help. Regards, Shruti + diff --git a/data2/text/range/0-5000/731224.txt b/data2/text/range/0-5000/731224.txt new file mode 100644 index 0000000000000000000000000000000000000000..02ec056a62f7b72367a2844712136258888797d2 --- /dev/null +++ b/data2/text/range/0-5000/731224.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: NEW CNN MODEL SUPPORT + +Query Text: +Part Number: TDA2 Hi， dear Could tda2x support the open-pose( you can google to find which is a kind of cnn model for pose recognition) demo？ If not， when to support it？ Or any idea for me to improve the current vision TIDL to support the pose model recognition? Looking forward to your best reply! Tks! + +Responses: +Hi, Please refer to TIDL data sheet (TIDeepLearningLibrary_DataSheet.pdf) for supported layers by TIDL. If the open pose CNN model has only layers supported TIDL then tda2x can support this model, and we don't have any plans to add new layers for TIDL. Thanks, Praveen + diff --git a/data2/text/range/0-5000/731297.txt b/data2/text/range/0-5000/731297.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0b72fee9544dc97398326af564d602592508019 --- /dev/null +++ b/data2/text/range/0-5000/731297.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: How many EMU lines of JTAG port are necessary to be connected to access all the processors? + +Query Text: +Part Number: TDA2 Due to space-constraint, I am trying to minimize the JTAG connector size. However, I have some doubts on questions below: 1. Is it enough to connect only JTAG and EMU[1:0] to TDA2SG to access all the processors using 14-pins connections? 2. What will be left non-accessible without EMU[4:2]? 3. Is nSRST a must-have connection? + +Responses: +CTY Lim said: 1. Is it enough to connect only JTAG and EMU[1:0] to TDA2SG to access all the processors using 14-pins connections? Yes, that would get you the regular jtag support. See the below excerpt from TRM chapter: " Texas Instruments supports a variety of eXtended Development System (XDS) JTAG controllers with various debug capabilities beyond only JTAG support. Because this device supports the export of processor trace and system trace over the EMU pins, if you want your target to be compatible with XDS products capable of acquiring either trace types, see the following document for guidelines: Emulation and Trace Headers (literature number SPRU655). " CTY Lim said: 2. What will be left non-accessible without EMU[4:2]? See above comment. Also, there will not be many options for concurrent debugging with only 2 emu signals (for triggering or data). See section "Concurrent Debug Modes" in the On-Chip Debug Support chapter of the Technical Reference Manual. CTY Lim said: 3. Is nSRST a must-have connection? No. This is an optional signal that if integrated into your applications power-up-reset circuit may be used to remotely reset the target board from a debugger. See this wiki for details: Thanks, Alex + +Hello, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread gets locked due to time-out). thanks, Alex + diff --git a/data2/text/range/0-5000/731427.txt b/data2/text/range/0-5000/731427.txt new file mode 100644 index 0000000000000000000000000000000000000000..a3680d9f71f6fe299657e8dbe79eecb4fcbde948 --- /dev/null +++ b/data2/text/range/0-5000/731427.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: EVE: Calculate VCOP cycles + +Query Text: +Part Number: TDA2 Hi, I saw in the data sheet (eve_sw_datasheet.pdf) that the performances for TI provided kernels and apps is given in cycles per pixel. For kernel, this is based on the block size and for apps it is based on the image size. Can you please share with us how to calculate these cycles per pixel for both apps and kernels? Do we use EVE core utilization to calculate this? What is the operating frequency of EVE? Will there be a difference in the performance metric (cycles per pixel, local link latency etc), if the application is run through VisionSDK and when run standalone? Regards, Surbhi + +Responses: +Hello, Any updates?? Regards, Surbhi + +Hi Surbhi, Please find my answers inline : Can you please share with us how to calculate these cycles per pixel for both apps and kernels? Anshu >>> Cycles per pixels are calculated by dividing the total cycles taken by the kernel/apps by the number of pixels in block/image respectively. Do we use EVE core utilization to calculate this? Anshu >>> Please refer the above answer. What is the operating frequency of EVE? Anshu >>> It depends on the part number of the SOC. For Tda2x/3x its 500MHz. Will there be a difference in the performance metric (cycles per pixel, local link latency etc), if the application is run through VisionSDK and when run standalone? Anshu >>> In standalone only EVE is accessing the DDR but in system there could be other initiators for DDR and hence there may be slight degradation when an application is running with full system. Generally if the compute on VCOP is much larger then this will have less impact but if the application is more DMA bound then it may have more impact in system. Regards, Anshu + diff --git a/data2/text/range/0-5000/731714.txt b/data2/text/range/0-5000/731714.txt new file mode 100644 index 0000000000000000000000000000000000000000..f3a0ef0642dac25271157dddfbc63b3cbb40ba9d --- /dev/null +++ b/data2/text/range/0-5000/731714.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: No reading u-boot.img + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on TDA2Ex. After completing mk-eMMC-boot.sh, the following error occurred during startup. Could you please give some suggestion here? If the sd card can start normally, but it will fail in saveenv, is it related? Thanks in advance. + +Responses: +Hi, Are you sure the boot and root-fs partitions are correctly mounted on the emmc partition? To ensure this, please follow the below steps: 1. Boot from SD card by using the below SYSBOOT settings (this is setting it to forcefully boot from SD card, you may want to halt at u-boot and run env default -fa and saveenv) : SYSBOOT[0:15]: 00001100 10000001 2. Mount the emmc boot and rootfs partitions of emmc using the mount command to ensure the boot and rootfs partitions are flashed correctly into EMMC mount /dev/mmcblkxpy /media/boot # mmcblkx is the emmc media, py is the boot partition mount /dev/mmcblkxpb /media/rootfs # mmcblkx is emmc media, pa is the rootfs partition If you're not able to mount it, please reflash the emmc 3. Once this works, please set the SYSBOOT settings to below (this is setting it to forcefully boot from EMMC, you may want to halt at u-boot and run env default -fa and saveenv): SYSBOOT[0:15]: 00011100 10000001 You should see the board boot normally. Regards Shravan + +Hi, 1. Halt at u-boot and run env default -fa and saveenv. 2. Mount the emmc boot and rootfs partitions of emmc. 3. Boot from EMMC, halt at u-boot and run env default -fa and saveenv. but the board not boot normally. Could you please give some suggestion here? Thanks in advance. + +Hi, There seems to be an issue with MLO and u-boot.img built. Can you please checkout the tag 'REL_VISION_SDK_03_02_00_00' on u-boot and rebuild it? (run make linux from Vision-SDK). Also ensure your USERCONFIG (SW5) switch-settings is as below. SW5 [1:10]: 00101 00000 Regards Shravan + diff --git a/data2/text/range/0-5000/731859.txt b/data2/text/range/0-5000/731859.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec903b0825419be979180af88f63108f2747b204 --- /dev/null +++ b/data2/text/range/0-5000/731859.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: data flow of cascade_radar_object_detect + +Query Text: +Part Number: TDA2 Hi, I am about to use TDA2 to collect and process cascaded 1243 data. I downloaded and installed the PROCESSOR_SDK_RADAR_03_04_00_00 package. For C:\ti\PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect this demo, I see the datapath is shown in the figure below: I am wondering if the Select step is to select data from different 1243 radar(Q0,Q1,Q2,Q3) and what is the order of merging the data after fft? And if possible, where could I find the source code doing this step? Thanks. + +Responses: +Hi, The order of merging is Q0, Q1, Q2, Q3. The merge would make a System_VideoFrameCompositeBuffer type container which contains the buffer addresses of individual buffer outputs in the multi-dimensional array bufAddr. If you are looking at how the data is read from these 4 separate buffer addresses captured in bufAddr, you can refer to PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspprocess\radarDspProcess.c function AlgorithmFxn_RadarDspProcessProcess onwards. Thanks and Regards, Piyali + +Thanks for the quick response. you are right that AlgorithmFxn_RadarDspProcessProcess is a good function to know how data is processed separately. But I would like to know if the source code of Merge is available in the package? Can I assume that Q0 stands for data from master device and Q1, Q2 and Q3 stand for data from slave devices 1,2 and 3? If so, the order of output data of Merge would be master, slave 1, slave 2 and slave 3. Am I right about this? Thanks. + +Hi The source for the merge is at PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\links_fw\src\rtos\links_common\merge The Q0, Q1, Q2, Q3 would be based on how the board is designed to connect the VIN channels. On the TI cascade Radar EVM, VIN1A is connected to Slave 3 (Q0) , VIN2A is Master (Q1) , VIN3A is Slave 1 (Q2) , VIN4A is Slave 2 (Q3). Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/731987.txt b/data2/text/range/0-5000/731987.txt new file mode 100644 index 0000000000000000000000000000000000000000..571665fcdf9846465c5446a934f45b8c1ae74aab --- /dev/null +++ b/data2/text/range/0-5000/731987.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Flickering is observed on displaying fisheye frame by using Opengl es in Vision Sdk 3.02 + +Query Text: +Part Number: TDA2 HI, We have a problem about displaying fisheye frames by using Opengl es in Vision Sdk 3.02. We have posted a question which is flagged as solved, but the problem is still unsolved actually. e2e.ti.com/.../2700090 We also saw a bug fix in release note for Vision Sdk 3.04. According to the description, it seems like our problem. ADASVISION-1877 [TDA2xx Linux] Flickering is observed on running back to back sgx related UC S1-Critical VISION_SDK_03_03_00_00 Can you describe this bug fix in depth? And because we have developed our system on vision sdk 3.02 a lot, can we get a patch for this bug for vision sdk 3.02. Mason Su Best regards + +Responses: +ADASVISION_1877.txtHi, PFA of the patch on top of VSDK 3.3. Regards, Anuj + diff --git a/data2/text/range/0-5000/732009.txt b/data2/text/range/0-5000/732009.txt new file mode 100644 index 0000000000000000000000000000000000000000..a4ee3a45eb7281cd1e45190754ef2cf2b6efea37 --- /dev/null +++ b/data2/text/range/0-5000/732009.txt @@ -0,0 +1,34 @@ +Ticket Name: RTOS/TDA2: How to driver UART2 to communication with PC? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, As title. I don't know how to driver UART2 on TDA2 EVM. Could you please give me some advise? Many thanks. + +Responses: +Hi Prince, Are you using TDA2 EVM or custom board? Regards, Rishabh + +Hi Rishabh, Both have.(TDA2x EVM and custom board) + +Hi Prince, On TDA2 EVM you cannot use UART2 for communication as there is no connection between UART2 pins and FTDI chip. On custom board you have to check the schematics and find out if there is a route available for UART2. You also need to set the pin mux, IO expanders, etc depending on board schematics. Regards, Rishabh + +Hi Regards, Thanks for your advise. I has setting UART2 TX, RX pin. TX = D26(UART2_TXD_0) RX = D28(UART2_RXD_4) But I don't know how to enable UART2 engine? have any example or API can use? + +Hi Prince, The simplest method will be to modify and run CSL uart test present here: PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\csl\example\uart\uart_test. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Regards, Apologies to my late response. I set Y1,V2 pin mux to UART3 function. Y1 => UART3_TXD (uart3txd[0x00020000]) V2 => UART3_RXD (uart3rxd[0x00040000]) I has read register to confirm pin mux setting. I call UARTConfigInit() to initial UART3 engine after pin mux setting finish. but system get stuck problem when I call UARTConfigInit() API; Could you please give me some advise? Many thanks. + +Hi Prince, In order to select UART3 you also need to set UART_SEL1_3 and SEL_UART3_SPI2. For more details please refer to board schematics. Regards, Rishabh + +Hi Rishabh, Now I have't TDA2 EVM board can verify. I just only have custom board that direct connection out UART3_TXD(Y1) , UART3_RXD(V2) to using. We also pull up for UART3 TX, RX pin. Have any library can use if "PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\csl\example\uart\uart_test. " can't driver UART3 engine? + +Hi Rishabh, Below schematic is UART part of coustom boart. For you reference. + +Hi Prince, Mistakenly I assumed you want to enable UART3 in my previous response. As I had replied earlier there is no connection for UART2. For custom board you need to see full schematics and FTDI chip present in the board to see if UART2 connection is possible. This should be similar to "SH58 - FTDI UART" page present in TDA2 EVM schematics. Regards, Rishabh + +Hi Rishabh, Now I will focus at UART3 of UART2 TX can transmit data that mean oscillator will capture waveform at TX pin. I has setting pin mux for UART3. But I can't find useful library or API to initial UART3. Because "PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\csl\example\uart\uart_test" library can't driver UART3 engine. Have other library can use? Thanks. + +Hi Prince, You can't source UART3 from UART2 pins. You can use UART CSL driver for UART3 as well. UART test is an example written for testing different UART serial terminal configurations. You can modify this example to program appropriate board muxes for UART3 and then test UART3 as well. Hope this clarifies. Regards, Rishabh + +Hi Rishabh, I will try to implement UART3 by UART CSL driver. Will create new ticket if I have concern. Appreciate your support. + diff --git a/data2/text/range/0-5000/732046.txt b/data2/text/range/0-5000/732046.txt new file mode 100644 index 0000000000000000000000000000000000000000..241d3718eba762835a1331c01b26aa33023d03dd --- /dev/null +++ b/data2/text/range/0-5000/732046.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/TDA2: TDA2x Pin Muxing for Linux + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742 Tool/software: Linux Hello every one, I am trying to connect a custom camera board to TDA2x board. How can I change the pin muxing for linux ? I want to connect the cameras in vin1a,vin2a,vin6a and vin1b port. How can i do the pinmuxing for the same ? Regards, Renjith + +Responses: +Hello, One way to do so is to use the pinmux tool: https://dev.ti.com/pinmux/ . You can then dump register setting to a file and use that configuration in the SDK driver (I believe it's a .dts file actually). thanks, Alex + +Hi Alex, Thank you very much for your quick reply. I want to know one more thing , Can i use PDK for developing the same ? or PDK is only for RTOS ? Regards, Renjith + +Renjith Mohan said: I want to know one more thing , Can i use PDK for developing the same ? or PDK is only for RTOS ? Let me ping PDK experts as this is slightly out of my expertise. They will reply here soon. thanks, Alex + +Helllo, TI recommends to perform all the pinmux from u-boot first stage (MLO) You should describe the required pinmux settings in the board/ti/dra7xx/mux_data.h If you are using vision SDK, you are already using PDK for basic drivers. When running with Linux, some devices are controlled from A15 Linux while other are controlled from M4 RTOS. In this case, pinmux is controllled by A15 u-boot. PDK code for pinmux should not be used since it runs on M4. Regards, Nikhil D + +Hello Nikhil, Thank you verymuch for your valuable reply.. I am working on Vision SDK in DRA74x EVM REV H.0 board, which all are the PDK drivers working with Linux ? In my case i want to connect 4 cameras , Can i use the serializer & deserializer drivers in PDK ? Do i need to configure all the things in linux ? What all are the things controlled by A15 U-boot ? Regards, Renjith + +Hii Nikhil, Could you Help me on this ? Actually my use case is connect four camera with TDA2xx in Linux , VisionSDK version 3.04. CAM1 -> VIN1A 8bit mode. CAM2-> VIN2A 8bit mode. CAM3 -> VIN6A 8bit mode. CAM4 -> VIN1B 8bit mode. I have already tried everything within my knowledge.But dont work for me. I Set the pimux changes as in file attached. What all are the changes need to do in SDK side and Kernel Side ? Could u help to solve this problem.. 6840.pin_mux.pdf + +Hi, For the camera capture, you can use the PDK drivers, it should work well. None of the cameras are controlled by Linux/Uboot so there isn't any conflict. I assume, If you are using TI EVM, then all the cameras are connected to i2c5. In this case, PDK drivers will also control the i2c ONLY pinmux and boardmux is setup by the u-boot first stage. Apart from that, everythin is controlled by PDK drivers. Regards, Nikhil D + +I reviewed your pinmux document. You should describe the required pinmux settings in the board/ti/dra7xx/mux_data.h There are macros to describe the PAD registers and muxmodes. Nikhil D + +Hi Nikhil , I am using DRA74x EVM REV H.0 board. I configured values for "dra74x_core_padconf_array, dra742_es2_0_iodelay_cfg_array" in the board/ti/dra7xx/mux_data.h But i couldn't find delay values for "dra742_es1_1_iodelay_cfg_array" in TRM/DataSheet etc. Where can i get these ioDelay values ? Regards, Renjith + +Hi, You can find the iodelay values from the data sheet. Also, you can utilize the python tool which generates the iodelay values for the pad config that is done already. https://git.ti.com/glsdk/iodelay-config I hope this is helpful Regards, Nikhil D + +Hi Nikhil, I have some more doubts regarding this, pin muxing done in board/ti/dra7xx/mux_data.h file. Where i can set the instances/port for VIP as per the requirement ? I want to change the SerDes config (linux) , Can i follow the "Video Driver Porting Guide for TDA2xx, TDA2Ex and TDA3xx" ? It would be greateful if you share an example ( how to set vin1b port instance/capture) . Regards, Renjith + +Hi Ranjit, I would suggest to close this thread and open another for VIP camera configuration. The appropriate owner shall respond on that. Regards, Nikhil D + diff --git a/data2/text/range/0-5000/732564.txt b/data2/text/range/0-5000/732564.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d537d06f7a8bdcb8908a1d5c900fd941dc7c25c --- /dev/null +++ b/data2/text/range/0-5000/732564.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: PinMuxing in TDA2XX for linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Everyone , I am working on Pin muxing for our custom board with respect to TDA2XX . Since we planned to run the board on linux system , I like to know where we can find files of Pin Muxing for LInux configuration . I am also referring to the below link : e2e.ti.com/.../2702399 but I could not find where we can do VIP port pinmuxing for linux . Is there any reference you can suggest to do the same . + +Responses: +Hi Surender, On IPU pin mux is done in board module and u-boot does the pin mux in linux. You can modify board/ti/dra7xx/mux_data.h as suggested by Nikhil in the mentioned thread. Kindly post follow up questions on the same thread instead of starting a new one. Regards, Rishabh + diff --git a/data2/text/range/0-5000/733015.txt b/data2/text/range/0-5000/733015.txt new file mode 100644 index 0000000000000000000000000000000000000000..acc07dbecf2aa63c96ca7465af47b74757ff5820 --- /dev/null +++ b/data2/text/range/0-5000/733015.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: TDA2 Network stereo on IPU1_1 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello Team, Having trust in the support team, I believe, some mistake could have happened in the previous posting, Since there was no reply for a long time. Could you please check the details in the post (730834): e2e.ti.com/.../730834 We are looking forward to your answers and suggestions. Regards, KK + +Responses: +Sorry for delay, we have replied on original thread. Kindly please close this thread. + diff --git a/data2/text/range/0-5000/733673.txt b/data2/text/range/0-5000/733673.txt new file mode 100644 index 0000000000000000000000000000000000000000..d555913207c4e2173e1615bc38ffef117e697fc0 --- /dev/null +++ b/data2/text/range/0-5000/733673.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2: EVE/VCOP Question about __agen + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi, I try release next equation for agen __agen kLeft = I1 * blockW * sizeof(*img) + I2 * VCOP_SIMD_WIDTH * sizeof(*img) - I3 * sizeof(*img); There is no problems in host emulation. But eve compiler doesn't understand "-" near I3. In programming guide it is writen example with negative adress. I rewrite next way .__agen kLeft = I3 * -sizeof(*img) + I1 * blockW * sizeof(*img) + I2 * VCOP_SIMD_WIDTH * sizeof(*img); There is no compiler errors. but still result is wrong. Could your help me, whis syntax is right in this case? + +Responses: +Also, I try use next version of agen .__agen kLeft = I3 * sizeof(*img) *(-1) + I1 * blockW * sizeof(*img) + I2 * VCOP_SIMD_WIDTH * sizeof(*img); Compiler return next error: integer conversion resulted in a change of sign in .c file + +Hi Danil, I myself have not used negative offset but following syntax should work : __agen kLeft = I3 * (- sizeof(*img) ) + I1 * blockW * sizeof(*img) + I2 * VCOP_SIMD_WIDTH * sizeof(*img); If you are seeing functional mismatch with this I would suggest you to run the kernel on EVE simulator and see if you observe the same behavior in it. If yes then you can step in and see what exactly is happening which is causing the mismatch. Regards, Anshu + diff --git a/data2/text/range/0-5000/733772.txt b/data2/text/range/0-5000/733772.txt new file mode 100644 index 0000000000000000000000000000000000000000..da03ba1eeb27c6a50830601fd081c58287a85318 --- /dev/null +++ b/data2/text/range/0-5000/733772.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: TDA2 availability + +Query Text: +Part Number: TDA2 When is the TDA2 range of automotive processors due for release, samples and volume production ? + +Responses: +Hi Mark, there are several TDA2x processors in production, please check here: www.ti.com/.../TDA2 Regards, Yordan + +The TI website states 'Refer to TI', 'No stock', 'price not available' against all of the TDA2 processor variants. Am I missing something ? + +Mark, The TDA family of processors are targeted specifically for Automotive customers and can be ordered through a TI authorized distributor based on pre-communicated demand forecast and orders covering standard lead-times for these automotive grade processors. Best regards, Joe + +Thanks for your feedback Joe. I appreciate the emphasis on the availability of data being limited to credible automotive product suppliers. Is the TDA2 family intended for applications requiring an ASIL rating (in a similar manner to the Hercules family) or is the family more suited to infotainment products for which an ASIL-based safety case is required ? Regards Mark Saunders + +'not required' that last sentence should have said. Regards Mark Saunders + +The TDAx family is targeted towards Advanced Driver Assistance Systems (ADAS) applications while the DRAx family is targeted at Infotainment/Digital Cockpit applications. While there is certainly some overlap across these two automotive spaces, the TDAx family is the primary solution typically used for ADAS systems, which generally have ASIL ratings associated with them. + diff --git a/data2/text/range/0-5000/733955.txt b/data2/text/range/0-5000/733955.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc7bedba960bc2308a3da14cee0fa59a507818f6 --- /dev/null +++ b/data2/text/range/0-5000/733955.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: What is the DDR3L RAM max size supported using 16bits data bus width at each EMIF interface? + +Query Text: +Part Number: TDA2 What is the DDR3L RAM max size supported using 16bits data bus width at each EMIF interface? Reference to the 'TDA2X Vision EVM Kit', if I change the RAM to 512MB (MT41K256M16TW-107) at each EMIF interface using only 16bits data bus width, can 16bits data bus able to support full 512MB RAM speed? Do I need to modify any software configuration setting from 'Linux and RTOS Processor SDK for Vision' to have it works upon boot up? + +Responses: +Hi, I have forwarded your question to DDR expert. For VisionSDK changes you can look at chapter "6 Memory map of the application" in VisionSDK_Linux_DevelopmentGuide.pdf and VisionSDK_UserGuide_MemoryMap.pdf in docs folder of VisionSDK and also this Application Note: www.ti.com/.../spraca1.pdf Regards, Yordan + +If you use 2 x 8Gb (8-bit width) DDR3L memories on each EMIF, you would have 4GB total memory. Note that only the MPU can access greater than 2GB DDR memory. The data bus width does not impact the DRAM frequency. + diff --git a/data2/text/range/0-5000/733995.txt b/data2/text/range/0-5000/733995.txt new file mode 100644 index 0000000000000000000000000000000000000000..618b112857e18ce9b091bb38f81646df39cfb097 --- /dev/null +++ b/data2/text/range/0-5000/733995.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: TDA2 DDR + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I am study TDA2 VAYU_EVM, there are two channel of ddr3 channel 1 connect to 2 "MT41K512M16HA-125 AIT:A" & 1 "MT41K512M8RH-125-AAT:E" which is for ECC fuction and channel 2 connect to 4 "MT41K512M8RH-125-AAT:E" could I design our own TDA2 system using only channel 1 with 2 "MT41K512M16HA-125 AIT:A" & 1 "MT41K512M8RH-125-AAT:E" ? and let channel 2 to be float? thank you + +Responses: +Hi Locust, The two DDR channels are identical and independent. I see no reason why not use only channel 1. Regards, Stan + +Hi Stan Thank you for the answer. And should I change any software setting in bootloader or another place? or I can just tear down the ddr on channel 2? thank you + +Yes, DDR configuration should be updated. regards, Stan + diff --git a/data2/text/range/0-5000/734032.txt b/data2/text/range/0-5000/734032.txt new file mode 100644 index 0000000000000000000000000000000000000000..79de3ed9f1d0464a5d70d45360bce26c4bee154b --- /dev/null +++ b/data2/text/range/0-5000/734032.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: Where to get the SCH. PDF? + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: J6EVM5777 Tool/software: Linux Dear Sir: We have a DRA7xEVM with the LG10.1" LCD, however we can not found the SCHEMATIC of that LCD board in DRA7xEVM page below. Would you please let me know where to download it? Regards, /ckhsu + +Responses: +Hi CK Hsu, please check "Design Files" here: www.ti.com/.../tda2evm5777 (LG10.1 LCD should be the one with "1280 X 800", "1920x1200" if for the OSD Panel) Regards, Yordan + +Hi Yodan: 1280 X 800 is for the AUO. And 1920x1200 is for the OSD panel, both of them are not LG. Is the SCH. file of AUO same as LG? Regards, /ckhsu + +Hi CK Hsu, I pinged an expert to help with the right documents. Regards, Yordan + +Hi Yordan: Thank you, I will wait for the response. Regards, /ckhsu + +CK, The LG 10" display is obsolete and is no longer shipping. That's why the newer display schematics are available on the ti.com link. Please send me your email address with a private message, and I can email them to you. Thanks, Kyle + diff --git a/data2/text/range/0-5000/734036.txt b/data2/text/range/0-5000/734036.txt new file mode 100644 index 0000000000000000000000000000000000000000..b8d383c9a899dec7d9c05130a5ae2c59c5892405 --- /dev/null +++ b/data2/text/range/0-5000/734036.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: IPC communication between A15 & M4 issue. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello all, We are working on VSDK 3.04 , J6 EVK platform We are trying to implement a Heart beat mechanism, where in if Linux on A15 crashes, IPU should get notified of it and should run critical app on IPU based RTOS. To do this, we have refered HeartBeat server app from RVC - VSDK 2.12 - Utils_common directory, ported it to VSDK 3.04 and called the task from IPU_primary_core_init() in ipu_primary.c. We create a task to ping between A15 and IPU through IPC mechanism as Ideally, the heartbeat should run as a separate task from the main usecase. Issue we are facing is, when the heartbeat server starts, the use case is not getting scheduled, as Heartbeat task is getting blocked in MessageQ_get(Module.slaveQue, (MessageQ_Msg *)&msg, MessageQ_FOREVER); Please help. Thanks Naren K + +Responses: +Hi Naren, MessageQ_get will block only the task in which it is running, and not other tasks. Do you have your heartbeat task separate from your use case task? Also, is your usecase doing any communication between A15 and IPU outside of the MessageQ (i.e., are there any links between A15 and IPU in your usecase)? If so, these IPC methods can unfortunately not co-exist. Either only MessageQ can do A15<->IPU communication or VSDK IPC can. This is because they both use the rpmsg-proto driver, which will allow only one registered transport per remote core. Thanks, Angela + +Hi Angela, Thanks for your support. That works for me. Regards, Naren k + diff --git a/data2/text/range/0-5000/734513.txt b/data2/text/range/0-5000/734513.txt new file mode 100644 index 0000000000000000000000000000000000000000..0c2e1cd411443e62e9d5d7c559e65f03a9b974aa --- /dev/null +++ b/data2/text/range/0-5000/734513.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: EVE/VCOP s_scatter/p_scatter store + +Query Text: +Part Number: TDA2 Hi, Could you help with s_scatter() store option. I read that load/store option take 2 ticks. how many ticks does s_scatter store take? And how does it depend from ? Also i try use p_scatter instead s_scatter, and get vcop error. Which is rules used for p_scatter? Thank you + +Responses: +Hi Danil, Both s_scatter and p_scatter are used to store each entry within a vector at an offset which is given by another vector. For example Lets say we have a vector (VOffset) with following entry VOffset = ( k1,k2....,k8) lets say the vector which we want to store has some entries as Vin = ( a, b,c,d,e,f,g,h) Lets say we perform the write as follows dst[addr].s_scatter(VOffset) = Vin The above store would write the value "a" at an offset of k1 bytes , "b" at an offset of k2 bytes, "c" at an offset of k3 bytes and so on, from the base pointer dst. s_scatter operation will take 8 cycles for this store but it doesnt have any restriction on k1,k2.. k8. On the other hand p_scatter would do the same in single cycle but it has a restriction the the offsets k1,k2... k8 should be chosen in such a way that all the 8 entries of the vector falls in a different memory bank Regards, Anshu + +Thank you for answer, Could you answer what is the size of bank for IbufL, IbufH and Wbuf? + +Each of these buffers have 8 banks with 4 bytes each. Regards, Anshu + +Did you mean 4 kbytes? + +I thought you asked about the size of each bank in memory which is 4 bytes per bank and there are total 8 such banks. But now it looks like you are asking about size of EVE internal buffers which are as follows: IBUFA = 32KB --> THis is further split into IBUFLA 16KB and IBUFHA 16KB IBUFB = 32KB --> THis is further split into IBUFLB 16KB and IBUFHB 16KB WBUF = 32 KB Regards, Anshu + diff --git a/data2/text/range/0-5000/734522.txt b/data2/text/range/0-5000/734522.txt new file mode 100644 index 0000000000000000000000000000000000000000..a51bd29c20e7f196d63dd4981fbaabb5b7952be3 --- /dev/null +++ b/data2/text/range/0-5000/734522.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE/VCOP internal memory usage + +Query Text: +Part Number: TDA2 Hi, I'm newer in VCOP programming and I try understand how to organize pipeline for VCOP -> DMA. Could you explain or where to read information and examples about usage IbufL, IbufH. 1. For memory allocation I use vcop_malloc(, ) function. In location for buffer I have to point A/B buffer is used for Ibuf. So for pipeline have I to allocate array for each A and B? 2. I have kernel Vcop function in k. file. For pipeline I should use next sequence : loop { 2.0 Wait end start_dma_(pointerA, toOutput); 2.1 kernel_k_func(pointerA); 2.2 start_dma_(pointerA, toOutput); 2.3 Wait end start_dma_(pointerB, toOutput); 2.4 kernel_k_func(pointerB); 2.5 start_dma_(pointerB, toOutput); } Is this sequency write? 3. Vcop compiler change automaticaly takes/releas A/B banks. And DMA use this option for transfer start, is it right? 4. If for 10 kB input data algorithm produce additional 1 MB ouput data, is there additional options to control A/B switch? + +Responses: +Hi Danil, Please find the attached presentation, which might find useful. Here are the answers to your question: 1. For memory allocation I use vcop_malloc(, ) function. In location for buffer I have to point A/B buffer is used for Ibuf. So for pipeline have I to allocate array for each A and B? No, if you implement ping/pong buffering, you don't need to allocate your array in each A or B buffer because both VCOP and EDMA support alias view. Please refer to chapter 10.5 of the EVE programmer's guide titled 'Simple Block Copy of an Image using EVE in Alias View'. There is a register called EVE_MEMMAP, which controls which mode (alias or full view) is applied to EDMA to VCOP. Please refer to 10.3 "EVE Memory Views and Buffer Ownership". The function VCOP_SET_MEM_VIEW(VIEW) should be called with VIEW=ALIAS_128K_VIEW to set that register accordingly. Also before using vcop_malloc(), call the function vcop_setview(mode) with mode=VCOP_MEMALIASED. 2. I have kernel Vcop function in k. file. For pipeline I should use next sequence : ... Please refer to example code in the same paragraph 10.5 of the programmer's guide or in the EVE software package, refer to apps\apps_nonbam\src\common\eve_algo_dma_auto_incr.c, function EVELIB_algoDMAAutoIncrConcurrent() and EVELIB_algoDMAAutoIncrSequential(). 3. Vcop compiler change automaticaly takes/releas A/B banks. And DMA use this option for transfer start, is it right? Yes, the functions VCOP_BUF_SWITCH_TOGGLE() or VCOP_BUF_SWITCH_SET() takes care of that. 4. If for 10 kB input data algorithm produce additional 1 MB ouput data, is there additional options to control A/B switch? Since image buffer A or B is only 32 KB, you only have 22 KB to store the output of your processing so you need to find a way to break your processing in smaller chunks since you have a 100x size ratio between input and output. May be process divide your 10 KB in chunks of 200 bytes. Each chunk of 200 bytes will produce 20 KB bytes which can be transferred to DDR. regards, Victor 3_Implementation of an EVE App.pdf + diff --git a/data2/text/range/0-5000/734635.txt b/data2/text/range/0-5000/734635.txt new file mode 100644 index 0000000000000000000000000000000000000000..0221b83b583299c9d0b53a675cadcf1855d38f1b --- /dev/null +++ b/data2/text/range/0-5000/734635.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: New version of OpenCV library (v3.4.1) for Cortex A15 in TDA2x. + +Query Text: +Part Number: TDA2 It has come to my attention that TI has deprecated the OpenCV infrastructure in its Vision SDK for TDA2x. My takeaway is that I cannot expect your support when I try to incorporate OpenCV functions (beyond version 3.1) in the code. But what about the OpenCV 3.1 library prebuilt into Vision SDK? Are the developers advised against depending on it too? Thanks + +Responses: +Hi juts for clarity , let me reiterate, From VSDK 3.2 onward OpenCV (on A15 Linux) has been completely deprecated. For VSDK 3.0 and 3.1, we support only the pre-built CV libs. So TI advice to not use open CV if you would come across to rebuilt the Open CV libs regards, Shiju + diff --git a/data2/text/range/0-5000/734730.txt b/data2/text/range/0-5000/734730.txt new file mode 100644 index 0000000000000000000000000000000000000000..bdfefae5cdc978b6ade610817dc9b50f3ab0c0eb --- /dev/null +++ b/data2/text/range/0-5000/734730.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: Synchronization time between A15 and MCU + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello, My name terence Xia from ECARX China. Our company is using the chip model of TDA2PXEVM. At present, there is a demand: the A15 use to collect video data and the MCU collects IMU data. How to synchronize the time of these two groups of data? I'm using vision SDK which released by TI. thanks. + +Responses: +Hello If you use Vision SDK (SW development Kit) from TI, we insert a unique timestamp to each and every video frames while it getting captured. This information can be used for sync-up. For MCU side also you may need to do something similar to synchronize the time of these two groups of data regards., Shiju + +Hi Shiju, I have a question about that, I'm using this function of OSA_getCurGlobalTimeInUsec to get the UTC time. When I get the time in A15, how can I send it to the external MCU, and synchronize MCU and TDA2 time. The MCU is external to TDA2,which use UART to connect with each other. + +Hello I think, you need to use the SPI if its a data path with Video. UART is fine if its only ultrasonic data. I guess you might need some kind of Fusion and I do not know where it happen, but you need to pass this time stamp information to ECU or MCU, where this fusion logic runs regards, Shiju + diff --git a/data2/text/range/0-5000/734802.txt b/data2/text/range/0-5000/734802.txt new file mode 100644 index 0000000000000000000000000000000000000000..a5c3dbaa57363174eb9f3a7754b49451ec691952 --- /dev/null +++ b/data2/text/range/0-5000/734802.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: How to disable EMIF2? + +Query Text: +Part Number: TDA2 Hi all, If we want to disable EMIF2, what configurations we should modify? Could you please help to describe it? Thanks~ + +Responses: +Hi, Can you give more details on software you are using. Regards, Rishabh + +Hi Rishabh, We use SDK_Vision_03_04_00_00 and rtos for the TDA2xx. Thanks! + +Hi, You can set MODULEMODE field in CM_EMIF_EMIF2_CLKCTRL to 0x0 to disable EMIF2 module. Regards, Rishabh + +Hi, i can't find which file has this configuration. Could you please help to tell me where is the file? And another question, does there any default setting would use EMIF2? Thanks! + +Hi, What is the build configuration you are using? Default Vision SDK BIOS uses 512 MB and EMIF1. Regards, Rishabh + +Hi, I need some times to double check the configuration in our code. So I will close this thread, and I will create a new one if I have another question. Thanks for your help! + +Ok. Thanks for the update. Regards, Rishabh + diff --git a/data2/text/range/0-5000/734868.txt b/data2/text/range/0-5000/734868.txt new file mode 100644 index 0000000000000000000000000000000000000000..01b8efcd1fcda792f45c4cb5ffd8c50d9a57687d --- /dev/null +++ b/data2/text/range/0-5000/734868.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2PXEVM: To synchronize the time between data of A15 and data of IPU1 + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Dear， We need to synchronize the time between image data collected by A15 and IMU data collected by IPU1, and then store the data for analysis. Is there any way to do that? Thank you very much! Terence Xia from ECARX China. + +Responses: +Hi Terence, You could use sync link to synchronize two or more frames, coming from different chain. but please note that you need to add time stamp in the data collected on IMU. Rgds, Brijesh + +Hi Brijesh, Is there a global time in TDA2 that can be used by all processors , including A15,IPU, DSP, etc. If so, where can I find it in the vision SDK. I need to send this time to the external device, I mean to synchronize the time with the external device.For example, an external MCU linked to TDA2. Thank you very much! Terence Xia from ECARX China. + +Yes, you could use Utils_getCurGlobalTimeInUsec API to get the current timestamp. This API uses global timer. Rgds, Brijesh + +Hi Brijesh, I have a question about that, In this code path: vision_sdk/links_fw/src/hlos/osa/src/osa_global_time.c，there is a function of OSA_getCurGlobalTimeInUsec, like Utils_getCurGlobalTimeInUsec API，Are they all getting the same timer? When I get the time, how can I send it to the external MCU, and TDA2 and MCU connected with UART. Thank you very much ! Terence Xia from ECARX China + +Hi Terence, Yes, both of them uses same UTC timer. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/735223.txt b/data2/text/range/0-5000/735223.txt new file mode 100644 index 0000000000000000000000000000000000000000..8683a91a2d5898712bcf76e1d897fea98c41d351 --- /dev/null +++ b/data2/text/range/0-5000/735223.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EXEVM: TIDL OD use+case generate wrong result with user model + +Query Text: +Part Number: TDA2EXEVM Hi TIDL experts, Thank you for your great support until now. I have a SSD-based model and i try to put it on the OD use-case. And it create unexpected result, a lot of random small boxes on the screen. I check the import layer level and also the tidl tb results , and all of them are the similar with caffe and proper. So it seems that the mismatch result is generated by the OD-usecase . Is there any suggestion or possible solution about this? The original question is this thread: e2e.ti.com/support/processors/f/791/t/729679#pi239031349=2 Thank you. Best Regards, Eric Lai + +Responses: +Hi Eric Lai, There is a new vision SDK release version 03.05.00.00 available now, can you please check with this new release and report here. Thanks, Praveen + +Hi Praveen, Okay, I will give it a try. Thank you so much. Best Regards, Eric Lai + +Hi Praveen, I tried the new version SDK. And like the previous version, the result is matching between caffe , import ,and also tidl testbench. On the use-case, finally the result is proper , the unexpected small box are gone. Thank you. But there is still some different between the video from caffe and use-case. Especially for the small object, the confidence is lower. I set the quanthistory to zero, the result is the same. Is there any possible reason about this? Best Regards, Eric Lai + +Hi Eric Lai, Can you experiment with below quant history parameters and check. createParams.quantHistoryParam1 = 5; // increase in steps of +5 createParams.quantHistoryParam2 = 5; // increase in steps of +5 createParams.quantMargin = 0; // increase in steps of +5 Thanks, Praveen + +Hi Praveen, I tried the parameters but the results are similar. It seems that it's not the reason of this issue? Any suggestion about this? Best Regards, Eric Lai + +Hi Praveen, Any update? On the use-case, the result is different. Btw, the number of layers of my model is almost 120. Maybe this is the reason why it cause this issue? Best Regards, Eric Lai + +Hi Eric Lai, How big is the difference in behaviour on the use-case verses tidl test bench. Can you please share some screen shots of the output so that I will get it reviewed with VSDK expert for quick look and suggestions. Thanks, Praveen + +Hi Praveen, Caffe , import and TIDL testbench are matching. And here is the video result on caffe and OD use-case. The confidence of the some object are lower . You can see some boxes are blinking . I have no idea about this issue. Thank you. Best Regards, Eric Lai TDA2_result.rar caffe_result.rar + +Hi Eric Lai, Can you decrease the confidence threshold and check? Thanks, Praveen + +Hi Praveen, The original threshold of caffe and usecase are the same. ( =0.3) And I follow your instruction to decrease the threshold. ( =0.1) And the result seems better but still not proper. The boxes are still blinking not like the original caffe. Best Regards, Eric Lai + diff --git a/data2/text/range/0-5000/735338.txt b/data2/text/range/0-5000/735338.txt new file mode 100644 index 0000000000000000000000000000000000000000..07037bc341c8d59e05402375547a04da7942a775 --- /dev/null +++ b/data2/text/range/0-5000/735338.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: Files needed for running SemSeg Semantic Segmentation usecase (Vision SDK, tidl) + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Ti, I'd like to run tidl use case "Semantic Segmentation" in PROCESSOR_SDK_VISION_03_05_00_00 on tda2xevm. I refer to VisionSDK_UserGuide_TI_DeepLearning.pdf: page6 It needs to prepare these 6 files. Make sure the following files are present in the MMC/SD card: o TIDLCFG.TXT (TIDL use case configuration file) o Input file o TIDL Semseg Network file (NET_Semseg.bin) o TIDL Semseg Parameter file(PRM_Semseg.bin) o TIDL Semseg Usecase input data file (inData_semSeg) o TIDL Semseg Usecase input header file (inHeader_semSeg) I put these 5 files to SD card except "input file". inData and inHeader are from https://e2e.ti.com/support/processors/f/791/p/687481/2534375?keyMatch=inHeader_OD&tisearch=Search-EN-Everything tidl_net_jsegnet21v2.bin and tidl_param_jsegnet21v2.bin are from PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/apps/tools/TIDL_files What is "input file"? Where can I get it? Can you also check my TIDLCFG.txt file? It was modified from TIDL_SSD_CFG.TXT. TIDL Configuration parameters ----------------------------- ################################################################################ IMP: Make sure the size of the file names (excluding extension) is not more than 8 characters. ################################################################################ inputWidth=768 inputHeight=320 inputFile=inData.h264 inputHDRFile=inHeader netFileName=tidl_net_jsegnet21v2.bin paramFileName=tidl_param_jsegnet21v2.bin Thank you. + +Responses: +Hi Eric, input file refer to "IN.RGB" file present inside vision_sdk/apps/tools/TIDL_files However you don't need any input file or cfg.txt file for semseg UC As in UC, the file names are hard coded, Please refer the UC file shared in below path -> vision_sdk\apps\src\rtos\usecases\semSeg\chains_semSeg.c so please rename the files accordingly For Semantic Segmentation UC, these below listed 4 files need to be present in the SD card o TIDL Semseg Network file (NET_Semseg.bin) o TIDL Semseg Parameter file(PRM_Semseg.bin) o TIDL Semseg Usecase input data file (inData_semSeg) o TIDL Semseg Usecase input header file (inHeader_semSeg) Regards Surya + +Hi Surya, What size of video do I prepare for "TIDL Semseg Usecase input data file (inData_semSeg)"? + +Hi Eric, Ensure input video width & height should be 1024x512 as in UC, it is defined as #define SEMSEG_INPUT_WIDTH (1024) #define SEMSEG_INPUT_HEIGHT (512) PSB for details of the test video We used for testing Regards Surya + diff --git a/data2/text/range/0-5000/735398.txt b/data2/text/range/0-5000/735398.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a7d396dfcd9c18d1d9e687388990acd7af419c8 --- /dev/null +++ b/data2/text/range/0-5000/735398.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Data Flow in TDA2x + +Query Text: +Part Number: TDA2 Hello, We are trying to understand the data flow in TDA2x. We have the following queries: 1. How data and control are given from IPU0 to DSP/EVE and vice-versa? 2. How does data handling happen between DSP and EVE? 3. In which layer do these communications take place in Vision SDK? 4. Through which physical interface(hardware component) does this data transfer happen? 5. How does mailbox work? Regards, Shruti + +Responses: +Hi Shruti, Please refer to Vision SDK architecture documents present in PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\docs\Architecture. Regards, Rishabh + +Hi Rishabh, Thank you. I found the answers to most of the questions in the documentation present. Still, I did not find out about the following: 4. Through which physical interface(hardware component) does this data transfer happen? Can you please help me find them? Regards, Shruti + +Hi Shruti, There is no physical interface as this is internal to SoC, the communication is using IPC where messages contain buffer pointers. Regards, Rishabh + +Thank you Rishabh. Regards, Shruti + +Hi Shruti, I am closing the thread as the issue is resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/735586.txt b/data2/text/range/0-5000/735586.txt new file mode 100644 index 0000000000000000000000000000000000000000..0b289b75b22de9455383e97521b8c04bdf89b97a --- /dev/null +++ b/data2/text/range/0-5000/735586.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: HDMI differential pairs signals routing with via + +Query Text: +Part Number: TDA2 I would like to use micro-HDMI connector in my product design due to space constraint, vias are unavoidable in routing. However, according to table 8-16 TMDS Routing Specifications, no via is allowed on each TMDS trace. Is this a mandatory specification to follow, if not, HDMI signal will be distorted? How would you advise if to use micro-HDMI connector? + +Responses: +Hi, Datasheet requirements are always mandatory unless the opposite is noted. In your case, it doesn't mean necessarily hdmi will not work, but TI will not be able to support you because a requirement was not followed. Note also that such requirements often come not only from TI but also from the relevant standard specs (HDMI). I would like to recommend you to consult with HDMI specs and hdmi.org prior to proceed. Please see also this topic: Q. What testing is required? Regards, Stan + diff --git a/data2/text/range/0-5000/735594.txt b/data2/text/range/0-5000/735594.txt new file mode 100644 index 0000000000000000000000000000000000000000..e92f9e6e8e6d33f7a73f998f9bbaedaa691b8db6 --- /dev/null +++ b/data2/text/range/0-5000/735594.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: VIP Configuration For Linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello everyone, I am working on DRA74x EVM REV H.0 board with vision SDK 3.04 in Linux, I want to connect four cameras in the ports vin1a,vin2a,vin6a,vin1b respectively in 8 bit mode. 1. What all are the changes to be done for this in Linux ? 2. I want to change SerDes config. How it can be possible? 3. Can i follow the "Video Driver Porting Guide for TDA2xx, TDA2Ex and TDA3xx" for Linux side changes? It would be greateful if you share an example ( how to set vin1b port instance/capture) Regards, Renjith + +Responses: +Hi Renjith, "Video Driver Porting Guide for TDA2xx, TDA2Ex and TDA3xx" is for RTOS drivers and not applicable to linux. I will loop in linux experts to answer other questions. Regards, Rishabh + +Hi Renjith, Please clarify if you plan for using Linux drivers or the RTOS drivers. For vision use cases, TI receommends to use all capture drivers from RTOS/PDK Nikhil D + +Hi Nikhil, I want to use the vision use cases. But system should run in Linux. Can i use the PDK drivers for Linux ? Could you tell me which all are the possible ways? Regards, Renjith + +Hi Renjith, You can use the Vision SDK linux for this where you run the linux on A15 but your VIP driver will still run on IPU. Regards, Rishabh + +Hi, My actual need is connect four cameras in the ports vin1a,vin2a,vin6a,vin1b respectively in 8 bit mode. 1. What all are the changes to be done for this in Linux ? 2. I want to change SerDes config. How it can be possible? could you help ? Regards, Renjith + +Hi Renjith, No changes required in Linux. Make sure to add the right pinmux values in u-boot. All the camera and serdes configuration is handled in the PDK drivers NikhilD + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/735608.txt b/data2/text/range/0-5000/735608.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3636cd94b40c7f82c5d4729bee44885b34b9269 --- /dev/null +++ b/data2/text/range/0-5000/735608.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: HDMI signals are not connected via companion IC TPD12S016RKTR + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: TPD1E05U06 How destructive are the HDMI signals if I am using TPD12S016RKTR for ESD protection instead of using TPD1E05U06, knowing the IO capacitance is higher (1.2pF) as compared to 0.47pF of TPD1E05U06? If I am using the HDMI port for lab-use purpose, is it good enough to use TPD12S016RKTR and DLW21SZ900HQ2L to save cost and mainly board space? + +Responses: +We cannot answer the question as we have not tested the described configuration. The higher capacitance will impact the interface at higher speeds. The amount of impact would depend on the display resolution, refresh rate, and color depth used in the application. We have seen to reach the highest speeds the interface needs to be optimally designed, including using components with lowest capacitance. It is expected the interface can operate at less than max frequency using less than optimal design components. Thanks Robert + diff --git a/data2/text/range/0-5000/735791.txt b/data2/text/range/0-5000/735791.txt new file mode 100644 index 0000000000000000000000000000000000000000..63bab26ee80259336308e1b72ed7775bf8347143 --- /dev/null +++ b/data2/text/range/0-5000/735791.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Is it possible to implement tangent function in EVE? + +Query Text: +Part Number: TDA2 Hi, I am porting an algorithm in plain C on EVE using kernel C which has 'tan' function into it. Is there a function or way to get the tan value in kernel C? Can it be implemented in VCOP? Regards, Shruti + +Responses: +Hi Shruti, You can use table lookup to implement tan function in kernelC on VCOP. You can store a 32KB table lookup in EVE memory. So if you want 16-bits fixed-point precision, you can store 16K elements. Would the loss of precision acceptable ? You could interpolate the results if you need more precision. regards, Victor + diff --git a/data2/text/range/0-5000/735798.txt b/data2/text/range/0-5000/735798.txt new file mode 100644 index 0000000000000000000000000000000000000000..d7a3a6471832fa4e11433077c7db62e8eef2c2d5 --- /dev/null +++ b/data2/text/range/0-5000/735798.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: [VISION SDK] Running a TIDL usecase in LINUX+BIOS mode. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I am trying to make very much the same thing like guys in main thread ... First, to avoid porting of tidl_preproc alg on A15, I want to run it on IPU until I have TIDL UC functional and then to port it on A15.. I am using PROCESSOR_SDK_VISON_03_03_00_00 and I am working on custom board that has TDA2xx chips on it (RT-RK Alpha board) UseCase: chains_tidlDsp NullSource (A15) -> Alg_tidlpreproc (IPU1_0) Alg_tidlpreproc (IPU1_0) -> Alg_tidl_1 (DSP1) Alg_tidl_1 (DSP1) -> Merge (IPU1_0) Merge (IPU1_0) -> Null (A15) Steps made during porting the UC are described in txt files that can be found after decompresing tar file added. Also, all changed or newadded files are placed there... Case is: -Free run option for TIDL UC forks fine, but - when runing dump out option (to dump results to the SD card) the UC never finishes... it gives the following output to the console: [HOST] [HOST ] 52.346062 s: ########## FRAME # 0, QUEUE = 0 ########### [HOST] [HOST ] 52.671384 s: ########## FRAME # 1, QUEUE = 0 ########### [HOST] [HOST ] 52.996827 s: ########## FRAME # 2, QUEUE = 0 ########### [HOST] [HOST ] 53.322576 s: ########## FRAME # 3, QUEUE = 0 ########### [HOST] [HOST ] 53.648081 s: ########## FRAME # 4, QUEUE = 0 ########### [HOST] [HOST ] 53.973464 s: ########## FRAME # 5, QUEUE = 0 ########### [HOST] [HOST ] 54.299091 s: ########## FRAME # 6, QUEUE = 0 ########### We figured it out that it is because feof function inside nullSrcLink used for checking end of data stream file never returns TRUE value, but we cannot figure out why is this happening Hope You can help me to solve this, Gretings, Nebojsa changes_in_VSDK_03_03_00_00.zip + +Responses: +Hello The nullSrc on Linux side is written in such a way to always wraparound the input file, so it never stops. You can modify the Nullsrc to with commented out rewind() calls regards, Shiju + +Hi Shiju, I have tryed youre suggestion to comment out rewind() calls, but still having the sam result... Just to describe my problem with little bit more details: I am using : IN.RGB NET.BIN PRM.BIN TIDLCFG.TXT those are provided with PROCESSOR_SDK_VISION_03_03_00_00 .... NullSrc did not support work with RGB/BGR files, so I added it in similar way it is done for rtos... When I try to dump out frames to SD card the UC never stops writing it ... If I limit amount of data to be written then sometimes I get good data on the SD card, but not always... Maybe those information can help you to better understand what is happening here ... So if you have still some suggestion for me I would be really grateful.. Thx, Nebojsa + +Hi Nebojsa My suggestion here is, if possible please create a simpler nullSRc -> Null data chain and debug your SD card write issue. regards, Shiju + +Thx, Have solved this issue... I will add modified NullSrc)tsk.c here and will start a new thread for tidl UC on hlos related questions Regards, Nebojsa 8311.nullSrcLink_tsk.c + diff --git a/data2/text/range/0-5000/736182.txt b/data2/text/range/0-5000/736182.txt new file mode 100644 index 0000000000000000000000000000000000000000..734eaa4d017abd7ccf14ef727d4a0773a1a8f9e4 --- /dev/null +++ b/data2/text/range/0-5000/736182.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: LCD output cannot display in vdrm usecase. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi , TI experter, I've used vision SDK 3.04.00, and I used the customed lcd display output via lcd1. I want to add custom lcd driver for vdrm usecase instead of default HDMI output. Can u suggest? Best regards, John + +Responses: +Hi John, Which LCD you use: is it 1280x800 LG LCD or 1920x1200 LCD? Vision SDK supports only 1280x800 LG LCD: e2e.ti.com/.../2656901 You can also check if you can find something useful in this wiki: processors.wiki.ti.com/.../Virtual_DRM_:_An_User_Guide_for_Developing_Usecases Regards, Yordan + +Hi ,Yordan thx for reply. I used a custom LCD module. The Virtual DRM wiki is about HDMI output.I check it. and I have a question, if I add a new drivers for dispc output. should I change the crtc port num? (now is 26.) or add something to vdrm0 in dra7.dtsi? best regards, John + +Hi John, I have pinged DSS expert to provide further help. Regards, Yordan + +Hi , Yordan Vision SDK supports only 1280x800 LG LCD: e2e.ti.com/.../2656901 I check it ,and had tried it. my custom LCD output is 1920x720. So I had to add new drivers for it. and refer to suggest " You can find the code to enable 1920x1200 in /drivers/gpu/drm/omapdrm/dss/(panel-dpi.c, encoder-tc358768.c) and use it as reference" ? Right ? Regards, John + +In vDRM setup, the DSS drivers run in IPU. SO you will need to add your custom LCD parameters in IPU. No change in linux kernel is required. DT should be changed to address the new resolution. No change is needed in CRTC IDs etc + diff --git a/data2/text/range/0-5000/736258.txt b/data2/text/range/0-5000/736258.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e654d7cffd88822d6cb0b332269d400a5a284b6 --- /dev/null +++ b/data2/text/range/0-5000/736258.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Does Vision SDK has tested software dynamic function use TESSY tools? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Experts: My customer are trying use TESSY automatic tools test VSDK software's dynamic function. But those tools GCC can not successful compile VSDK code. Our VSDK contain Misra-c report but customer feedback that Misra-C report just contain the static function test report. Does we have experience about use TESSY tools verify VSDK? If not use TESSY, does we have used other kinds of tool test VSDK dynamic function safety? Thanks a lot! Best Regards! Han Tao (https://www.razorcat.com/en/product-tessy.html) + +Responses: +Hello No, vision ASK is not tested with any dynamic analysis tools regards, Shiju + +Hi Shiju： Thanks for clarify it. Best Regards! Han Tao + +hello，Shiju If we want to test VSDK software's dynamic function，is there any solution？Can you give us some advice？ regards，Vivian + +Hi Vivian For any dynamic analysis, do it only for "core SDK" (only for "links_fw" folder) Apps and Sample_app are application/demo code. As I mentioned earlier, We have not done any dynamic analysis on Vision SDK. Vision SDK is not a safety compliant SW, it is only reference SW from TI, so we don’t do dynamic analysis on this SW. For safety compliant SW like MCAL we use LDRA tool for dynamic analysis. regards, Shiju + +Hi Shiju： We use Tessy perform unit dynamic test, in order to verify software unit (function) design and fulfill the code coverage target (branch coverage, statement coverage, MCDC coverage). Now in Vision SDK component, there is some handle code (our Freetech code) need call Vision SDK core code, but there is no complier support to comply VSDK in Tessy. In other words, this Tessy tool can support our Freetech code, but can't support the code call Vision SDK. We don't try to verify VSDK code, we just need to verify the code which develop by Freetech. So do you have any solution or advice on this situation? Any solution from your customer which belongs to automotive area? Which tools did they use on unit dynamic test? Thanks Vivian + +Vivian Sorry i do not have any experience with Tessy LDRA is one tool which I heard many customers used for dynamic analysis. regards, Shiju + diff --git a/data2/text/range/0-5000/736444.txt b/data2/text/range/0-5000/736444.txt new file mode 100644 index 0000000000000000000000000000000000000000..553385e18edb720133a4f067f33c2ed483bae2aa --- /dev/null +++ b/data2/text/range/0-5000/736444.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: encode link whether to support two instances + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I want to use two encode link in one chains, Can VSDK0304 supoot this? + +Responses: +Hi Default VSDK support only one instance of encode link. But encode link support multiple channels (upto 8 channels). So a single instance of encode link can be used to encode multiple video streams of same or different resolutions/codec type etc. regards, Shiju + +hi,Shiju Thanks for support. As you said, the encode links support multiple video streams. Now I have four camera input, I want to use MJPEG to take pictures while I want to go to h264 encoded video. How could I do? could you give some suggestions about how to use this encode link？ thanks， Widic + +Hi Widic This is what I understood as your requirement, please confirm? 1. You need to H264 encode of all 4 cameras 2. At the same time MJPEG encode to take snapshots (photos) for all cameras In this case you can first perform a dup for each input cameras into 2 streams (using dup link), capture (4ch) -> Dup do a merge link after dup, This will make the number of input streams to Enc link as 8. 0 & 4 for cam1 1 & 5 for cam2 2 & 6 for cam3 3 & 7 for cam4 Now ch0 set for h264 encode ch4 set for MJPEG (snapshot encode) similar config for all reaming 3 cameras Hope this would works for you regards, Shiju + +Thanks,Shiju ,this solved my issue. + diff --git a/data2/text/range/0-5000/736487.txt b/data2/text/range/0-5000/736487.txt new file mode 100644 index 0000000000000000000000000000000000000000..7993bc80de3a5ec3055c0ac779549007ba77e71c --- /dev/null +++ b/data2/text/range/0-5000/736487.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Can TDA2 use-case support 2D surround view & E-mirror demo on Linux SDK. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, I am using TDA2x EVM and SDK version is 3.4. I can find 2D+3D surround view use case on BIOS only SDK, but there is no 2D surround view use case on Linux SDK. Do you have sample code or document for me to reference to move BIOS use case to Linux SDK ? BTW, Is TDA2 SDK support E-mirror demo on Linux OS ? Thanks. Ranny. + +Responses: +Ranny No document available for moving 2D SRV UC from Bios to Linux, but you can port the UC to Linux. No E-mirror demo available on Linux vision SDK regards, Shiju + diff --git a/data2/text/range/0-5000/736570.txt b/data2/text/range/0-5000/736570.txt new file mode 100644 index 0000000000000000000000000000000000000000..379a70dca113d386ff89fe686cdaa5a750e7d038 --- /dev/null +++ b/data2/text/range/0-5000/736570.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: EVE/KernelC:- using IF condition in VCOP + +Query Text: +Part Number: TDA2 Hello, I want to use if condition inside for loop. As of now, i know that if condition should be use with LCV of the for loop. I am using the same, #define I3EQUALS2 ((I3==2)) for(int I3=0;I3<3;I3++) { if(I3EQUALS2) { //code to be execute } } But I'm getting below error on console, error #26001-D: syntax error - expected IDENTIFIER error #26001-D: syntax error near ')' error #26001-D: syntax error near '=' ,m...something like this. Please suggest solution for this!! + +Responses: +hi Kajal, Is this loop written for VCOP or ARP32? Regards, Anshu + +Loop is written for VCOP. for(int I1=0;I1 VPE -> Dup_capture -> Merge_alg + +//Dup_capture -> VPE + +//TIDL_OD + +Dup_capture -> Alg_tidlpreproc (A15) + +Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) +//Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) + +Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) +Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) +Alg_tidl_Eve3 (EVE3) -> Merge_OD (DSP1) +//Alg_tidl_Eve4 (EVE4) -> Merge_OD (DSP1) +Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge_alg + + +//Display +//Merge_alg -> Sync -> Alg_ObjectDraw -> Display + +//LD +Dup_capture -> VPE_LD -> Alg_ImagePreProcess (EVE4) -> Alg_ImgPyramid -> Alg_LaneDetect (DSP1) -> Merge_alg + + +//Display +Merge_alg -> Sync -> Alg_ObjectDraw -> Display + + +//GrpxSrc -> Display_Grpx + and the log as below session_20181015.log We have a video record about the result result.rar From the record, the object detection seen looking like working right in first frame Can you tell us why ? where is the wrong in our flow? + +Responses: +Can you share the behaviour of second frame. Is the output wrong or crash? + +Hi, kumar it looks like wrong output the result of lane detection keep working after second frame but object detection is same as first frame no new object had detected Regard Allen + +Hi, any update? Regard Allen + +Hii Allen, Is the output generated by the import tool is matching with the expected output.? Regards, Kumar.D + diff --git a/data2/text/range/0-5000/737056.txt b/data2/text/range/0-5000/737056.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b764c7e6f87b48d00b8d41b0b0c7462cfe4efde --- /dev/null +++ b/data2/text/range/0-5000/737056.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: disable EMIF2 clock + +Query Text: +Part Number: TDA2 Hi, I can disable EMIF2 clock by SW control in SBL. But when jumping to AppImage, the EMIF2 clock would be active again. 1. Is this symptom normal? 2. Does there any api can used to control this? I can not use HW_WR_REG32() in Appimage. Thanks~~ + +Responses: +Hi, You can use PMHALModuleModeSet API to set EMIF2 to off. The symptom is not normal. Can you describe how you are getting EMIF2 active? Regards, Rishabh + +Hi, I use HW_WR_REG32(0x4A008B38, 0x30000) in SBLUtilsDDR3Config(), and then check EMIF2 clock in SBL stage. The clock is off and then jump to Appimage. I check the EMIF2 clock again, it becomes active. Thanks~~ + +Hi, This means that EMIF2 is turned on somewhere in the application image. If this is a concern you need to check where you are enabling. If this is not a concern you can simply call PM API to turn EMIF2 module off. Regards, Rishabh + +Hi , Does PMHALModuleModeSet just disable EMIF2 module, but the clock is still active? Now I disable EMIF2 module by un-define BUILDCFG_PMHAL_PRCM_MOD_EMIF2 in pmhal_prcm_modinc.h. Because our board already has 2 DDR, I can not verify is it work or not. So I use EMIF2 clock to verify it, but it seems somewhere would turn on the clock even if I disable EMIF2 module in Appimage. Does my method to disable EMIF2 module correct? (un-define BUILDCFG_PMHAL_PRCM_MOD_EMIF2) What do you recommend to verify EMIF2 module disable or not base on our board? Thanks~~ + +Hi Markii, What is the exact requirement you want to implement. The method to turn off EMIF2 is disable the module by calling PMHALModuleModeSet API and not commenting code. Regards, Rishabh + +Hi, We want to use one DDR only.. So we want to disable EMIF2 module and use EMIF1 only. In your comment, we can use PMHALModuleModeSet API in AppImage to disable EMIF2, this can also achieve our requirement, right? Do I need to use this API in each core image? That is why I want to disable it in SBL stage. Thanks~~ + +Hi, Yes you can use PMHALModuleModeSet API. You should call this API from A15 or IPU (only one call is needed). Regards, Rishabh + +Hi, understand! Thanks~~ + +Hi Markii, Kindly mark the post that answers your query as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/737119.txt b/data2/text/range/0-5000/737119.txt new file mode 100644 index 0000000000000000000000000000000000000000..acc450b7af365a372f3ef9559e118c5912f76d79 --- /dev/null +++ b/data2/text/range/0-5000/737119.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Building standalone application to run on DSP (C66x core) + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: MATHLIB Hi, I am going through the Vision SDK code. I have a few queries: 1) EVE software supports building separate test bench applications for individual kernels. Does DSP software also support the same? 2) If yes, what is the procedure for building separate kernel applications for test purpose? 3) Where is the DSP executable generated? Regards, Shruti + +Responses: +Shruti To build individual EVE kernels, you need to go to those packages in \ti_components\algorithms\eve_sw_01_19_00_00 and build them. same for DSP - \ti_components\algorithms\dsplib_c66x_3_4_0_0, \ti_components\algorithms\vlib_c66x_3_3_2_0 etc. regards, Shiju + +Hi Shiju, I found the documentation to build EVE and I am able to do it successfully. But I did not find any document which describes how to build standalone kernel applications for DSP. Can you please point them out? Also, I am using Vision SDK version 3.3.0.0. But I do not find dsplib_c66x folder into it, there is only vlib_c66x_3_3_0_3. I am unable to find any makefiles or such which will help me build. Do I need to use another version of VisionSDK? Please help me out with this. Regards, Shruti + +Hi Shruti If you are in the initial phase of the project better use the latest Vision SDK (v3.5) version You can down load from - www.ti.com/.../processor-sdk-tdax below the DSP Kernel packages comes along with VSDK 1. dsplib_c66x_3_4_0_0 2. mathlib_c66x_3_1_0_0 3. vlib_c66x_3_3_2_0 4. vxlib_c66x_1_1_3_0 Please note that some of these are in full source format and a few in only lib format. regards, Shiju + +Hi Shiju, I was using VisionSDK v3.3, but it does not include dsplib package. So I downloaded v3.5 now which includes the dsplib package. It also has the documentation on how to build the individual kernels. Thank you for the help. Regards, Shruti + diff --git a/data2/text/range/0-5000/737370.txt b/data2/text/range/0-5000/737370.txt new file mode 100644 index 0000000000000000000000000000000000000000..fec1008d6c8362d48cc7330f9321fae986b9887f --- /dev/null +++ b/data2/text/range/0-5000/737370.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: question about vmem-exp + +Query Text: +Part Number: TDA2 Tool/software: Linux hi , TI experts, I am using Linux usecase (OV490 3D srv ) in vision SDK 3.04.00. Now my problem is that the display output only tex[0], tex[3], tex[1] and tex[2] are same with tex[1], tex[3]. I find out in vmem-exp.c ( kernel driver ), vmem_export_single function export the 2 video virtual addr （such as 0xa7a2b000, 0xa7a2b500） to a same dmafd. It seems like the PAGE_MASK (4K Align) mask the offset(0x500). If this, how GPU map the correct physical address ? I mean, the same dmafd get 2 different address (such as YUV 0xa7a2b000, 0xa7a2b500) ? regards, John + +Responses: +Hello, This is a standard Linux limitation in Linux. DMABUF can be used only to export certain pages from the kernel For GPU, most likely, one of the following should work - just pass one dmabuf, GPU finds out the UV offset based on the size of Y - pass the same dmabuf for both Y and UV and provide offset values Regards, Nikhil D + +Hi ,Nikhil thanks for reply. "- pass the same dmabuf for both Y and UV and provide offset values" In Vision SDK SGX drivers, I cannot find the provided offset values in System_eglWindowGetTexYuv(). For frameBuffer as below: Y1 Y2 UV1 UV2 It can only checkout the Y1 and UV1, Y2 and UV2 are missed. Can u give me more tips to find offset manipulation? regards, John + +John, are you still facing this issue? I am closing this thread. + diff --git a/data2/text/range/0-5000/737380.txt b/data2/text/range/0-5000/737380.txt new file mode 100644 index 0000000000000000000000000000000000000000..d116a83f38a497a3f23742b349a34f3704017486 --- /dev/null +++ b/data2/text/range/0-5000/737380.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2PXEVM: Regarding the accuracy of the Pedestrian Detection algorithm + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Hi, I'm testing Object Detection of your algorithm. The detection of vehicle is good for test but the detection of the pedestrian is not good. It detects the trees like pedestrian. How can I tune the parameters value? I adjust the below value but the result is not good. pObj->inArgs.pdConfig.softCascadeThPD = 0; pObj->inArgs.pdConfig.strongCascadeThPD = 1; // pObj->inArgs.pdConfig.strongCascadeThPD = -1; // pObj->inArgs.pdConfig.strongCascadeThPD = 0; Regards, Heechang + +Responses: +Hi, There is no universal adaboost descrptor that works in all images / scenarios. May be you need to train the detector for your dataset. You can use the following training to tool train your own adaboost descriptor for the detector. https://github.com/tidsp/acf-jacinto Best regards, + diff --git a/data2/text/range/0-5000/737518.txt b/data2/text/range/0-5000/737518.txt new file mode 100644 index 0000000000000000000000000000000000000000..37deea04b97111d8e552292830c11deeb306faef --- /dev/null +++ b/data2/text/range/0-5000/737518.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2: TIDL-1.1 edma utility + +Query Text: +Part Number: TDA2 Hi: in tidl src code, in the convolution layer, there are edma_utils_scatthergather and edma_utils_autoincrement, and I don't understand why use both of them, here what the difference between them. I refer the edma docs and learn the convolution layer code, but still can't understand them. + +Responses: +Hi @lin rimao, is this the document you referred: PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils\docs\DMAUtilsLibrary_UserGuide.pdf? It has quite detailed explanation of Scater/Gather and Autoincrement mechanisms. Regards, Yordan + +yes, I refered that doc. But in TIDL convolution layer, I can not understand why need both of them. And now, we have trained a ssd model, current the ssd model can run 15 frames in one sec, is there any solution I can take to run the ssd model 30 frames in one sec through refine the tidl code or something else. thanks. + +Hi, I have forwarded your question to TIDL experts for further help. Regards, Yordan + +Hi, TIDL convolution layer is a complex layer implementation in which we had integrated many data flows to support different kernel sizes and different stride and dilation cases and hence used scatter gather DMA when data is spread across different channels ( for example for input and output feature map data transfers), used auto increment when the data is in continues blocks ( for example Bias data). You can refer to each function header is documented with usage of these DMA implementation functions. Regarding the other question, did you exploit the sparsity in the model to improve the run time performance. We have a extension of caffe training framework called caffe-jacinto ( github.com/.../caffe-jacinto) which can help to induce sparsity in the model. Thanks, Praveen + +Hi Praveen: In convolution layer, I noticed for input and output feature map data transfers, both the scatter gather and autoincrement dma utility are used. I don't understand what's the relationship between them. We have exploit the sparsity used caffe-jacinto, now for 640x320 input model, on one eve the local latency is 180ms, is there any ways (for example through modify the dma tranfer or something in the tidl src code for fixed model) to reduce the latency on one eve. thanks. + +Hi, And for the bias value, if I can use TIDL_edmaCopy transfer the all bias value, but not use autoincrement dma more times, because the bias value num depend numOutCh. + +why these kernels are initialized two times? + +why are these kernels initialised two times? + +Kumar, Please check if you are able to reply now. Regards Karthik + +We ahve run kernek from both ping and pong buffer. So we are intilaizing the params in both buffers + diff --git a/data2/text/range/0-5000/737534.txt b/data2/text/range/0-5000/737534.txt new file mode 100644 index 0000000000000000000000000000000000000000..1a299b711caff228c453ce59adb165d588bc80ec --- /dev/null +++ b/data2/text/range/0-5000/737534.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Cortex-A15 cores secure state after exiting from ROM Code + +Query Text: +Part Number: TDA2 Hi, I have noticed that ROM Code provides some Secure Monitor Call interfaces to user. Why so? Is it because A15 cores enter non-secure state after exiting from ROM code? + +Responses: +Hi Yang, I think they are the only way to accomplish the respective functions on a non-secure, aka general-purpose (GP) device (SoC). I guess they are not needed on HS devices. I'm not an expert, just can recall some older threads in the forum. The TRM also states the following: The ROM code provides different services that can be called on GP devices for L1 and L2-cache maintenance, Enter in Low Power, etc. ... The following code example shows how the monitor ROM code functions can be accessed by an application running in public mode: .... Regards, Stan + diff --git a/data2/text/range/0-5000/737832.txt b/data2/text/range/0-5000/737832.txt new file mode 100644 index 0000000000000000000000000000000000000000..e01673d1e79544ac3fc4044014afa72b94ea66f8 --- /dev/null +++ b/data2/text/range/0-5000/737832.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: Vision SDK 3.04 framework and examples build fail + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Linux Hi, I got similar error while executing build command for SDK. command: make -s Error: dispDistSrcLink_tsk.c:81:45: fatal error: vdrm_controller/v_controller_if.h: No such file or directory compilation terminated. make[6]: *** [depend] Error 1 make[5]: *** [links_a15_dispDistSrc] Error 2 make[4]: *** [vision_sdk_linux_lib] Error 2 make[3]: *** [links_fw_libs_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 I checked git commit also for kernel, u-boot, sgx u-boot: 839f3f2 (HEAD, origin/ti_2.12_release, ti_2.12_release) updated library and binaries added 2e3691d debug renamed to debug 35e203d Makefile and header files added 002bee1 itsapp.mk added d9bc44b nwmanager initial version added 6619725 Debug renamed to debug , and Ipc renamed to ipc 34b4ac8 Debug renamed to debug , and Ipc renamed to ipc 21d98c8 controlapp initial version version added fad591e json,ffmpeg Dependency added 764c7cb its directory added in rootfs file sytsem 3713f24 itsapp new directory added cd424bd makefile renamed to datalogger.mk de8a247 its renamed to datalogger in rootfs 003ce5f . 429efbf read failed error fixed for wifi_reader Kernel: 839f3f2 (HEAD, origin/ti_2.12_release, ti_2.12_release) updated library and binaries added 2e3691d debug renamed to debug 35e203d Makefile and header files added 002bee1 itsapp.mk added d9bc44b nwmanager initial version added 6619725 Debug renamed to debug , and Ipc renamed to ipc 34b4ac8 Debug renamed to debug , and Ipc renamed to ipc 21d98c8 controlapp initial version version added fad591e json,ffmpeg Dependency added 764c7cb its directory added in rootfs file sytsem 3713f24 itsapp new directory added cd424bd makefile renamed to datalogger.mk de8a247 its renamed to datalogger in rootfs SGX: fd47e44 (HEAD, origin/ti-img-sgx/1.14.3699939/k4.4, sgx_dev) Revert "km: build: remove dependency on user-mode builds" 8d5305b km: remove update of sysconfig register in driver bc31285 km: fix error in calculating size of page array e68719b km: build: remove dependency on user-mode builds a5a0fe1 km: Resolve Linux build warnings c13efb7 km: disable active power management c8d280c km : use CONFIG_ZONE_DMA for LPAE 106ddd5 km: use platform specific reset APIs only for AM3/AM4 platform fed0756 (origin/ti-img-sgx/1.14.3699939/k4.1) KM: Make kernel configuration variable SUPPORT_LISR_MISR_SYNC conditional 3d5e9c9 KM: Enhance OMAP-based platform code to support AM3/4/5 devices 2d4a2cf KM: Invoke platform-specific reset API calls if available Is all source code have old version/tags?? Have i taken any wrong process? Please help to solve my problem? Thanks, Anand Kumar + +Responses: +Hi Anand, from the git log it seems that your kernel and u-boot are old versions (SGX seems to be on the right commit). Which version is you VisionSDK? Can you look at chapter "2.4.2 Install Linux Components" in VisionSDK_Linux_UserGuide.pdf how to clone and checkout the right tag of u-boot and kernel. Regards, Yordan + +Hi Yordan, i am using Vision SDK_03_04. Now, i changed to updated kernel version with help of UserGuide pdf file. Now, It is compiling successfully. Thanks, Anand Kumar + diff --git a/data2/text/range/0-5000/737971.txt b/data2/text/range/0-5000/737971.txt new file mode 100644 index 0000000000000000000000000000000000000000..f0b98878e179627af6c147c16aa470b10353fef3 --- /dev/null +++ b/data2/text/range/0-5000/737971.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/PROCESSOR-SDK-TDAX: QLinuxFbScreen::connect: Invalid argument + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Tool/software: Linux I am trying to run QT application on PROCESSOR-SDK-TDA2-3.04 that supports VDRM controller. I am getting some errors when I am running that QT app with the command ./movable -platform linuxfb -display "LinuxFb:/dev/fb0" -qws QLinuxFbScreen::connect: Invalid argument Error reading fixed information LinuxFb: driver cannot connect Aborted (core dumped) Here is my configuration. ./configure -prefix /opt/qt-4.7.1 -embedded arm -platform qws/linux-x86_64-g++ -xplatform qws/linux-vsdk304-arm-gnueabi-g++ -depths 16,24,32 -no-mmx -no-3dnow -no-sse -no-sse2 -no-glib -no-cups -no-largefile -no-accessibility -no-openssl -no-gtkstyle -qt-mouse-pc -qt-mouse-linuxtp -qt-mouse-linuxinput -plugin-mouse-linuxtp -plugin-mouse-pc -opensource -qt-gfx-linuxfb -qt-gfx-qvfb Could you please give some inputs to resolve this issue. If I am doing some thing wrong in configuration or some where else. + +Responses: +Hi Raza, SDK 3.04 with vDRM support is not validated for QT applications. The filesystem provided with vision-sdk 3.04 doesn't have QT libraries. Are you trying too use linux fbdev here? This feature is no more supported, drm is the default display + +Yes I am using fb0 that is linked to vdrm with soft link in this manner /dev/fb0 -> /dev/vdrm-controller-0 If this feature is no more supported so could you please help me out to run QT-4.7.1 application on it through VDRM, what is the procedure to get the display on the screen? + diff --git a/data2/text/range/0-5000/738358.txt b/data2/text/range/0-5000/738358.txt new file mode 100644 index 0000000000000000000000000000000000000000..ed9787d9b38bf2ab29fcd7d5ef5520f3e6c0719f --- /dev/null +++ b/data2/text/range/0-5000/738358.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: DCAN2 external loopback test mode stuck at Utils_dcanWaitForTxComplete() + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I have the same problem! It stuck at Utils_dcanWaitForTxComplete(). please help to give me some advisement Thanks~~ + +Responses: +Hi, Have you tried all the things suggested in above e2e thread? If yes and still facing same issue, can you take a dump of DCAN2 registers and DCAN2 message RAM? Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi, I found the problem. Some default usecase would use the same pin and would modify pinmux after mine. Thanks~ + diff --git a/data2/text/range/0-5000/738695.txt b/data2/text/range/0-5000/738695.txt new file mode 100644 index 0000000000000000000000000000000000000000..3569a330df76122df44f481b514f5b55668cae41 --- /dev/null +++ b/data2/text/range/0-5000/738695.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: how to send data from a15 to c66 DSP + +Query Text: +Part Number: TDA2 Tool/software: Linux now i am VISION_03_04_00_00 i read file load cnn_model in a15 , it will use by C66 , so have can i send the model_buffer to C66 dsp ？ Now I'm passing the model over the image data through IPCOut_A15_0_DSP1_0Prm, and then taking it out of the image data, and I think that's a temporary solution. can you tell me how to do this and Describe the steps？ + +Responses: +Hello If you need to pass this buffer only one time, then use of IPCOut_A15_0_DSP1_0 is not really required. You can do a file read and load this data to a buffer/memory on A15 from usecase, Then pass the physical pointer of this buffer to DSP as an Alg link (on DSP) create time parameter regards, Shiju + diff --git a/data2/text/range/0-5000/738698.txt b/data2/text/range/0-5000/738698.txt new file mode 100644 index 0000000000000000000000000000000000000000..696f19a606658ed073cbc7be7103f5c94a7a8fc1 --- /dev/null +++ b/data2/text/range/0-5000/738698.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: EVE/VCOP deinterleave(), interleave() problem + +Query Text: +Part Number: TDA2 Hi, I try release simple mean filter window 3x3. I use npt() and get the same result as host emulation (visual studio vcop.h library), but when i change npt() to deinterleave(), interleave(), the result is diffrent. __vptr_uint16 bufx, __vptr_uint8 output, w = 640; npt loops: for (int I1 = 0; I1 < blockH; I1++) { for (int I2 = 0; I2 < w / VCOP_SIMD_WIDTH; I2++) { __agen indexOut = I1 * w * sizeof(*output) + I2 * sizeof(*output) * VCOP_SIMD_WIDTH; __agen index = I1 * bufWidth * sizeof(*bufx) + I2 * sizeof(*bufx) * VCOP_SIMD_WIDTH; Vec10 = (bufx)[index].npt(); Vec20 = (bufx + 2)[index].npt(); Vec30 = (bufx + 4)[index].npt(); Vec10 += Vec20 + Vec30; Vec20 = Vec10 * VecMul; Vec30 = Vec20 << Vshift; output[indexOut].npt() = Vec30; } } deinterleave(), interleave() loops: for (int I1 = 0; I1 < blockH; I1++) { for (int I2 = 0; I2 < w / VCOP_2SIMD_WIDTH; I2++) { __agen indexout = I1 * w * sizeof(*output) + I2 * sizeof(*output) * VCOP_2SIMD_WIDTH; __agen index0 = I1 * bufWidth * sizeof(*bufx) + I2 * sizeof(*bufx) * VCOP_2SIMD_WIDTH; (Vec10, Vec11) = (bufx)[index0].deinterleave(); (Vec20, Vec21) = (bufx + sizeof(*bufx))[index0].deinterleave(); (Vec30, Vec31) = (bufx + 2 * sizeof(*bufx))[index0].deinterleave(); Vec10 += Vec20 + Vec30; Vec11 += Vec21 + Vec31; Vec20 = Vec10 * VecMul; Vec21 = Vec11 * VecMul1; Vec30 = Vec20 << Vshift; Vec31 = Vec21 << Vshift1; output[indexout].interleave() = (Vec30, Vec31); } } Where is the problem? Thank you for help. + +Responses: +The next loop for VCOP_2SIMD_WIDTH works correct. In documentation for deinterleave aligment must be for word. Word mean 4 or 2 bytes? for (int I1 = 0; I1 < blockH; I1++) { for (int I2 = 0; I2 < w / VCOP_2SIMD_WIDTH; I2++) { __agen indexout = I1 * w * sizeof(*output) + I2 * sizeof(*output) * VCOP_2SIMD_WIDTH; __agen index0 = I1 * bufWidth * sizeof(*bufx) + I2 * sizeof(*bufx) * VCOP_2SIMD_WIDTH; Vec10 = (bufx)[index0].npt(); Vec11 = (bufx + 16)[index0].npt(); Vec20 = (bufx + sizeof(*bufx ) )[index0].npt(); Vec21 = (bufx + 16 + sizeof(*bufx) )[index0].npt(); Vec30 = (bufx + 2 * sizeof(*bufx) )[index0].npt(); Vec31 = (bufx + 16 + 2 * sizeof(*bufx) )[index0].npt(); Vec10 += Vec20 + Vec30; Vec11 += Vec21 + Vec31; Vec20 = Vec10 * VecMul; Vec21 = Vec11 * VecMul1; Vec30 = Vec20 << Vshift; Vec31 = Vec21 << Vshift1; output[indexout].npt() = Vec30; (output+8)[indexout].npt() = Vec31; } } + +I have mistake, make alignment equal 2 bytes, but it must be 4 bytes. + +Hi Danil, thanks for updating the thread. Regards, Yordan + diff --git a/data2/text/range/0-5000/738706.txt b/data2/text/range/0-5000/738706.txt new file mode 100644 index 0000000000000000000000000000000000000000..ae8f492ea505ee535cfef720326238818453a72c --- /dev/null +++ b/data2/text/range/0-5000/738706.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Cannot run EVE edge detection on Linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Im trying to use existing rtos edged etection algorithm but ported on linux. Its kinda working, but very strange, and i cant find out whats wrong. The resolution is very low and it is packing multiple screens on display (you can see four screens packed next to each other on image): + +Responses: +Hello Please check video pitch and data format passed to the display after the edge detect alg. I guess you do not need any changes in ED Alg or Alg plugin as this run on EVE in both RTOS and Linux case, only the usecase need porting from rtos to Linux to get this working on Linux regards, Shiju + +Hi, I have tried changing pitch and frame format, input, output resolution, and i always get the similar result. I was thinking that maybe problem was in display setting so i saved the output from ED link and when i try to open it on my PC (using ffplay) i get this: [rawvideo @ 0x7f94b40008c0] Invalid buffer size, packet size 16384 < expected frame_size 3110400 for 1920x1080 output [rawvideo @ 0x7f69ac0008c0] Invalid buffer size, packet size 16384 < expected frame_size 1382400 for 1280x720 output [rawvideo @ 0x7f3ec80008c0] Invalid buffer size, packet size 7984 < expected frame_size 8400 for 280x20 Its like it is always compressed, or that algorithm does not give complete output, which makes no sense cause it is working perfectly fine running on sys-bios. Any thoughts on this? + +Hi ED Alg link output full frame, but only the Luma (Y) portion of the video frame. Is ED on Linux is your ultimate goal or is this a experimental UC? Can you please help me to understand your final UC/data flow? Regards, Shiju + diff --git a/data2/text/range/0-5000/739114.txt b/data2/text/range/0-5000/739114.txt new file mode 100644 index 0000000000000000000000000000000000000000..63e383405d9fd949fa572cdd167397997cc9de0d --- /dev/null +++ b/data2/text/range/0-5000/739114.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: SPI Slave driver Implementation for TDA2x + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, As per my project requirement, I need to configure one McSPI modules as SPI Slave mode for TDA2x. for this, I need SPI Slave driver to communicate with another Master Controller device. I am using Vision SDK 03_04 for this project. As my search or knowledge, i didnot find any SPI Slave driver in this SDK. Is any driver available in this SDK for TDA2x? Please help me to get any similar spi slave driver for TDA2x which is capable to communicate with master. Please provide any link/code/information regarding this. Thanks, Anand Kumar + +Responses: +Hi Anand, McSPI driver is here: PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\drv\bsp_lld\mcspi Regards, Rishabh + +Hi Rishabh, Thanks for this link. I will go through and will check it will solve my problem or not. could you Please help me to find document/forum which related to integrate this driver and application guide in Vision SDK Doc. Thanks, Anand Kumar + +Hi Anand, You can search for Utils_mcspiInit in Vision SDK and see how it is used. Regards, Rishabh + +Hi Rishabh, Thanks for support. Thanks, Anand Kumar + diff --git a/data2/text/range/0-5000/739295.txt b/data2/text/range/0-5000/739295.txt new file mode 100644 index 0000000000000000000000000000000000000000..b42dedccb4b09cc917dc900eddf446a0c0a1f460 --- /dev/null +++ b/data2/text/range/0-5000/739295.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE:Execute Single Kernel into multi EVE cores + +Query Text: +Part Number: TDA2 Hi guys, We need to execute a single kernel on different EVE cores with the following scenario. 1. The input image will be in x*y dimension. 2. It has to be broken into x1*y1, x2*y2, x3*y3 dimensions. 3. The kernel should be executed in all the EVE cores for these different image sections. 4. After the executions in all the cores completed, the individual outputs should be merged into x*y dimension single image. And, the execution can be done with or without the support of VisionSDK. Can you please suggest the steps or methodologies to do so. Regards Surbhi + +Responses: +Hello Surbhi, The first step would be to develop an applet on EVE to process any frame of dimensions x*y on one single EVE core. You can find more information on how to implement an applet by reading this post and its attached presentation: Then next step is to create a vision SDK alg-plugin that would be instantiated on 4 different cores but running the same applet with different image dimensions as parameters. Finally you need to create a merge applet and its alg-plugin to run on the 4th core. regards, Victor + diff --git a/data2/text/range/0-5000/739688.txt b/data2/text/range/0-5000/739688.txt new file mode 100644 index 0000000000000000000000000000000000000000..04bfcb3dba73035416dad7c56fbf8b76b95dfe3c --- /dev/null +++ b/data2/text/range/0-5000/739688.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: SPI Slave driver Implementation for TDA2x + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi , I gone through SPI driver as mention below: McSPI driver is here: PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\drv\bsp_lld\mcspi --This driver based on ti rtos driver (PDK Package) but i need spi slave driver based on linux (HLOS) side (VSDK part). could you please help me to get any SPI Slave driver code/examples/document related to this? Thanks, Anand Kumar + +Responses: +Hi Anand, Vision SDK package does not have spi driver for linux. If you want to use it with Vision SDK linux, you should follow approach similar to VIP and other Video peripherals (they run on M4). You should refer to linux kernel for actual SPI linux drivers. Regards, Rishabh + diff --git a/data2/text/range/0-5000/740345.txt b/data2/text/range/0-5000/740345.txt new file mode 100644 index 0000000000000000000000000000000000000000..12f7b37a802283c407b1e566dce5e6c03b31c116 --- /dev/null +++ b/data2/text/range/0-5000/740345.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Can DCAN1 run simultaneously with capture and display links? + +Query Text: +Part Number: TDA2 The problem is similar to this “e2e.ti.com/.../716329 [IPU1-1] 97.623528 s: Assertion @ Line: 505 in D:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/modules/dcan/utils_dcan.c: status == 0 : failed !!! [IPU1-1] 97.623741 s: [IPU1-1] 97.623802 s: ### XDC ASSERT - ERROR CALLBACK START ### [IPU1-1] 97.623863 s: [IPU1-1] 97.624016 s: assertion failure: A_badContext: bad calling context. See GateMutex API doc for details. [IPU1-1] 97.624107 s: [IPU1-1] 97.624168 s: ### XDC ASSERT - ERROR CALLBACK END ### static Void Utils_dcanQuePut(Utils_QueHandle * handle, struct dcanQueMsgs_s *msg, dcanQueMsgState_e state) { Int32 status; msg->state = state; status = Utils_quePut(handle,msg,BIOS_NO_WAIT); UTILS_assert(status == 0);// this assert status == 0 : failed !!! } + +Responses: +Hi Yuling, DCAN can run along with capture and display links. In previous threads, user was able to get some message before seeing this error. Is your observation same? If yes, can you try doing changes suggested in attached thread(in your previous reply). Please let know your results. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/740462.txt b/data2/text/range/0-5000/740462.txt new file mode 100644 index 0000000000000000000000000000000000000000..25e3de5be6385e965a1f32e0d9fd812a86d065b8 --- /dev/null +++ b/data2/text/range/0-5000/740462.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EXEVM: TDA2 - 'Undefined reference Error' + +Query Text: +Part Number: TDA2EXEVM Tool/software: Linux Hi there, I am using vision sdk version 2.12. I am trying to add a new usecase in vision_sdk/hlos/examples/adas/src/usecase. The main function that I have used is Void chains_multichannel_analog_dvr(Chains_Ctrl *chainsCfg); which is defined in the corresponding usecase .c file. This function was called in vision_sdk//hlos/examples/adas/src/common/chains_main.c which includes a header #include . The function was declared in the above mentioned header. While compiling I am getting the following error.(earlier there some use-cases which are working fine) ----------------------------------------------------------------------------------------------------------- # vision_sdk_linux_demo: tda2ex-evm: Compiling chains_multichannel.c # vision_sdk_linux_demo: tda2ex-evm: Compiling chains_multichannel_priv.c # vision_sdk_linux_demo: tda2ex-evm: Compiling defLinkMultich_tsk.c # vision_sdk_linux_demo: tda2ex-evm: Creating archive vision_sdk_linux_demo.a # vision_sdk_linux_demo: tda2ex-evm: Linking /home/madan/McCDVR/mccdvr/Source/vision_sdk/binaries/tda2ex_mccdvr_all/lib/a15/release/vision_sdk_linux_demo.a(chains_main.o): In function `main': chains_main.c:(.text.startup+0x3e): undefined reference to `chains_multichannel_analog_dvr' collect2: error: ld returned 1 exit status make[4]: *** [exe] Error 1 make[3]: *** [apps] Error 2 make[2]: *** [demo] Error 2 make[1]: *** [vision_sdk_linux] Error 2 make: *** [vision_sdk_linux_all] Error 2 ------------------------------------------------------------------------------------------------------------ to be informed, i have included the new use-case in the following files, in configs/cfg.mk LINUX_TDA2XX_UC_LIST = \ /*some more use-case inclusions*/ UC_vip_2CH_vdec_encode \ UC_multichannel_Analog \ in system_cfg.h #define UC_vip_2CH_vdec_encode_no #define UC_multichannel_Analog in uc_cfg.mk UC_vip_4CH_vdec_display=no UC_multichannel_Analog=yes and in MAKEFILE_adas.MK ifeq ($(UC_multichannel_Analog),yes) $(MAKE) -fMAKEFILE.MK -C$(vision_sdk_PATH)/hlos/examples/adas/src/usecases/multichannel_Analog MODULE=vision_sdk_linux_demo $(TARGET) endif and also have checked make make showconfig ans i have the below information. # Use-cases included in build, # UC_cabin_channel_dvr UC_front_channel_dvr UC_McCDVR_TriChannel UC_multichannel_Analog # How can i solve this. Regards Balaji T + +Responses: +Hi Balaji, Lets Check with an existing UC where all it has been added & you need to do similar changes for newly added UC 1. Run grep command for an existing UC folder, check where all it has been added grep -ri "vip_single_cam_sgx_display" from vision_sdk folder 2. Run grep command for an existing UC entry function name present in .c file & check where all it has been added grep -ri "chains_vipSingleCam_SgxDisplay" from vision_sdk folder 3. In similar places, you need to add your newly added UC 4. After adding in all places just do a clean build Regards Surya + +Hi Surya, Hope you are doing well. My issue got resolved, in uc_cfg.mk UC_vip_4CH_vdec_display=no UC_multichannel_Analog=yes(space)- i had given this extra space. Thank you Regards Balaji T + diff --git a/data2/text/range/0-5000/740555.txt b/data2/text/range/0-5000/740555.txt new file mode 100644 index 0000000000000000000000000000000000000000..ae6c5a42293b11b1daa6d1bfd6bcaa8e43700357 --- /dev/null +++ b/data2/text/range/0-5000/740555.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE :DIVISION OPERATION + +Query Text: +Part Number: TDA2 Hi, I want to use division operation for unsigned short(16bit) in my code, i have checked the implemented kernels regarding division i.e (kernelslib/array_div_unsword ) & ( kernelslib/array_div_unsshort_w_TLU). Is their any other method to implement division operation? Regards Surbhi + +Responses: +Hi Surbhi, If its a generic division operation then you will need to use look up table based approach. Regards, Anshu + diff --git a/data2/text/range/0-5000/740583.txt b/data2/text/range/0-5000/740583.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d3eebe7dded96cf5580841045e22ddea8d030a4 --- /dev/null +++ b/data2/text/range/0-5000/740583.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Platform supported by Processor SDK Linux Automotive 03.04 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Hi, I need information regarding PROCESSOR-SDK-LINUX-AUTOMOTIVE 03_04_00_03. Is This SDK have support for TDA2xx ? In my project, I am using TDA2xx. So, Is it good to use this SDK version? Please help to know this information. Thanks, Anand Kumar + +Responses: +Hi Anand, you can run Processor SDK Linux Automotive on TDA2x, also note that VisionSDK has Linux+BIOS version which runs Linux on A15 and SYSBIOS on other cores (Linux part is based on PSDKLA) - refer documents in "PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\docs\Linux". Regards, Yordan + +Hi Yordan, Thanks for information. Thanks, Anand Kumar + +Hi Anand, You can get this information by looking at release notes of any SW package provided by TI. Regards, Rishabh + diff --git a/data2/text/range/0-5000/740900.txt b/data2/text/range/0-5000/740900.txt new file mode 100644 index 0000000000000000000000000000000000000000..a41d8d38644565b644148057566ffdf582367669 --- /dev/null +++ b/data2/text/range/0-5000/740900.txt @@ -0,0 +1,61 @@ +Ticket Name: Linux/TDA2: PSDK3.4 can't start weston normally? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi TI, I run PSDKLA3.4 in tda2x evm. Because I want to run the QT app in it. But the weston can't start up.like this: root@dra7xx-evm:~# +root@dra7xx-evm:~# cat /var/log/weston.log +Date: 2018-10-23 UTC +[07:36:18.772] weston 1.9.0 + http://wayland.freedesktop.org + Bug reports to: bugs.freedesktop.org/enter_bug.cgi + Build: 1.8.93-2-gb05cdb8 configure.ac: bump to version 1.9.0 for the official release (2015-09-21 18:11:26 -0700) +[07:36:18.772] OS: Linux, 4.4.84-00027-g018eb62-dirty, #7 SMP PREEMPT Sat Sep 29 11:18:05 HKT 2018, armv7l +[07:36:18.775] Using config file '/etc//weston.ini' +[07:36:18.779] Loading module '/usr/lib/weston/drm-backend.so' +[07:36:18.862] Output repaint window is 7 ms maximum. +[07:36:18.862] initializing drm backend +[07:36:18.865] using /dev/dri/card0 +[07:36:18.867] Loading module '/usr/lib/weston/gl-renderer.so' +loaded module : gbm_pvr.so +found valid GBM backend : gbm_pvr.so +[07:36:19.175] warning: either no EGL_EXT_platform_base support or specific platform support; falling back to eglGetDisplay. +[07:36:19.205] failed to initialize display +[07:36:19.205] EGL error state: EGL_BAD_ALLOC (0x3003) +[07:36:19.205] failed to initialize egl +[07:36:19.205] fatal: failed to create compositor backend +PVR:(Error): OpenServices: PVRDRMOpenRender failed [0, ] +PVR:(Error): PVRSRVConnect: Unable to open connection. [0, ] +PVR:(Error): Couldn't connect to services [0, ] +root@dra7xx-evm:~# +root@dra7xx-evm:~# and the /etc/powervr.ini is : root@dra7xx-evm:~# +root@dra7xx-evm:~# cat /etc/powervr.ini +[default] +#WindowSystem=libpvrws_WAYLAND.so + +[weston] +DbmDriverName=vdrm + +[weston-simple-egl] +DbmDriverName=vdrm + +#QT app +[animatedtiles] +DbmDriverName=vdrm +root@dra7xx-evm:~# +root@dra7xx-evm:~# + And I have add the cma=128M. Have any suggestions ? Thanks! Regards, Sam. + +Responses: +Hi Sam, Are you using the PSDKLA 3.04 filesystem or vision-sdk 3.04 filesystem? Vision-sdk filesystem doesn't provide QT applications + +Hi Ramprasad, I'm using PSDKLA3.04 filesystem . Regards, Sam. + +Hi Sam, vDRM feature can be currently used only with VISION-SDK. It can not work with PSDKLA3.04. + +Hi Ramprasad, So how can I run the QT app in the PSDK3.04? The weston start up failed, as you see . Regards, Sam. + +Hi Ramprasad, Maybe I made a mistake. I just want to run a QT app by using PSDKLA3.04. Can you give me some suggestions? Thank you very much . Regards, Sam. + +Hi Sam, If you want to use only PSDKLA, please download latest SDK from this link downloads.ti.com/.../index_FDS.html and prepare SD card. This should work fine for QT application. You don't need to make any changes in powervr.ini Thanks Ram + +Hi Ram, Thanks for your reply. I'm confusing the VSDK with the PSDKLA. And now I can see the matrix-gui. Thank you ! Regards, Sam. + diff --git a/data2/text/range/0-5000/741120.txt b/data2/text/range/0-5000/741120.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d47321cbbd36a4750ff47971338b6786df633ad --- /dev/null +++ b/data2/text/range/0-5000/741120.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: tidl_src convolution layer input data tranfer + +Query Text: +Part Number: TDA2 Hi, Now we use tidl for object detection, but i don't understand the convolution layer input data tranfer. In TIDL_conv2dDmaSrcInit() function, there are both scatthergather and autoincrement dma utils as follow: in TIDL_conv2dDmaSrcAutoIncrementInit() function, what the parameter 'roiWith' 'roiHeight' 'exeMemPtr' point to, i debug the code, but i still not konw what the extMemPtr point to thanks + +Responses: +Hi, Yes, the convolution layer input data transfers require both Auto Increment and scatter gather as per our design and this is not correct place to discuss more about these details as it is a public forum. BTW, what are changes you are planning to do in this convolution layer ? Thanks, Praveen + +Hi, Now, we use ssd model to do object detecting. But the local latency in eve is about 180ms, I want to do some work to refine the convolution layer code, expecting to reduce the time. Can i use scattergather or autoincrement, one of them to do input data transfer? thanks. + +Kumar, Please check if you are able to reply now. Regards Karthik + +Convolution layers are fully optimized, we don't expect any further imporments. + diff --git a/data2/text/range/0-5000/741411.txt b/data2/text/range/0-5000/741411.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e0358e9861779491adbe9e902f9c578dee47d1f --- /dev/null +++ b/data2/text/range/0-5000/741411.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2: TIDL EVE used case not hitting breakpoint + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi, I am working on TIDL library and I have the following issue, I build the eve.out file in DEBUG mode and run it on TDA2x but the breakpoint does not hit main() function in tidl_tb.c file, instead it just runs continuously, and hence I am not able to debug the source code. Could you please tell me if I have to make changes in the GEL files. The build syntax I am using is gmake CORE=eve TARGET_BUILD=debug all Thank you Regards, Nithin + +Responses: +Hi Nithin, did you define EVE_SW_CONFIG to 1 in "TDA2xx_multicore_reset.gel" file and check?. #define EVE_SW_CONFIG 1 Thanks, Praveen + +Hi Praveen, I tried that. But then I get this error. Trouble Reading Memory Block at 0xa58427a on Page 1 of Length 0x1: (Error -1065 @ 0xA584278) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.407.3) Thanks. Regards, Nithin + +Hi Nithin, Can you try below steps and check, 1. Power-cycle the broad 2. Reset the EVE core before loading .out file Thanks, Praveen + diff --git a/data2/text/range/0-5000/741460.txt b/data2/text/range/0-5000/741460.txt new file mode 100644 index 0000000000000000000000000000000000000000..143613d9d9eea8067d9551825fabcf1ea7c300f8 --- /dev/null +++ b/data2/text/range/0-5000/741460.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Configuring MLO for TDA2x + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, By using TDA2x to do some development work, there is a need for me to make changes for configurations in MLO. The requirements are:- MLO must be built with OPP_HIGH and dual ddr interleaved mode How do I make changes on MLO for this purpose? Thanks + +Responses: +Hi, Can you refer to SBL user guide: processors.wiki.ti.com/.../TDA_SBL_UserGuide.pdf Regards, Rishabh + +Aware about this SBL user guide. it is not mentioned how to configure dual ddr interleaved mode + +Hi, You should refer to chapter 8 EMIFMODE. Option to use is SBLLIB_DUAL_EMIF_2X512MB. Regards, Rishabh + +Hi, Is this issue resolved? Regards, Rishabh + diff --git a/data2/text/range/0-5000/741519.txt b/data2/text/range/0-5000/741519.txt new file mode 100644 index 0000000000000000000000000000000000000000..c912ac19e7b590ba14e12d81f0a9f8bf2498a624 --- /dev/null +++ b/data2/text/range/0-5000/741519.txt @@ -0,0 +1,106 @@ +Ticket Name: RTOS/TDA2: vpe dei and scaling + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I want to use vpe's dei and scaling at the same time, but it's work. Please help me tto check it . // for Deinterlace static Void setVpe_deiPrm( + VpeLink_CreateParams *pPrm, + UInt32 captureOutputWidth, + UInt32 captureOutputHeight) +{ + UInt32 outId, chId; + VpeLink_ChannelParams *chPrms; + + memset(pPrm, 0, sizeof(*pPrm)); + + pPrm->enableOut[VPE_LINK_OUT_QUE_ID_0] = TRUE; + pPrm->enableOut[VPE_LINK_OUT_QUE_ID_1] = FALSE; + + for(outId=0; outIdchParams[chId]; + chPrms->outParams[outId].numBufsPerCh = + 10;//VPE_LINK_NUM_BUFS_PER_CH_DEFAULT; + chPrms->outParams[outId].inputFrameRate = 120; + chPrms->outParams[outId].outputFrameRate = 120; + + chPrms->outParams[outId].width = captureOutputWidth; + chPrms->outParams[outId].height = captureOutputHeight; + chPrms->outParams[outId].dataFormat = SYSTEM_DF_YUV420SP_UV; + + chPrms->deiCfg.bypass = FALSE; + + chPrms->deiCfg.inpMode = VPE_DEI_EDIMODE_LUMA_CHROMA; + chPrms->deiCfg.tempInpEnable = TRUE; + chPrms->deiCfg.tempInpChromaEnable = TRUE; + chPrms->deiCfg.spatMaxBypass = TRUE; + chPrms->deiCfg.tempMaxBypass = TRUE; + + chPrms->scCfg.bypass = TRUE; + chPrms->scCfg.nonLinear = FALSE; + chPrms->scCfg.stripSize = 0; + + chPrms->scCropCfg.cropStartX = 0; + chPrms->scCropCfg.cropStartY = 0; + chPrms->scCropCfg.cropWidth = 0; + chPrms->scCropCfg.cropHeight = 0; + } + } +} // for scaling static Void setVpePrm( + VpeLink_CreateParams *pPrm, + UInt32 numLvdsCh, + UInt32 OutWidth, + UInt32 OutHeight, + UInt32 inCropWidth, + UInt32 inCropHeight) +{ + UInt32 chId; + VpeLink_ChannelParams *chPrms; + UInt32 outId = 0; + + memset(pPrm, 0, sizeof(*pPrm)); + + pPrm->enableOut[0] = TRUE; + for (chId = 0; chId < numLvdsCh; chId++) + { + chPrms = &pPrm->chParams[chId]; + chPrms->outParams[outId].numBufsPerCh = + VPE_LINK_NUM_BUFS_PER_CH_DEFAULT; + + chPrms->outParams[outId].width = OutWidth; + chPrms->outParams[outId].height = OutHeight; + chPrms->outParams[outId].dataFormat = SYSTEM_DF_YUV420SP_UV; + + chPrms->scCfg.bypass = FALSE; + chPrms->scCfg.nonLinear = FALSE; + chPrms->scCfg.stripSize = 0; + + chPrms->scCropCfg.cropStartX = 0; + chPrms->scCropCfg.cropStartY = 0; + chPrms->scCropCfg.cropWidth = inCropWidth; + chPrms->scCropCfg.cropHeight = inCropHeight; + } +} + +Responses: +sorry for error.: but it does not work. + +the chains is : Capture -> VPE_dei -> Dup_rec -> VPE_swms -> Sync_swms -> Alg_DmaSwMs -> Encode -> Null_rec (A15) + +Hi, Are you trying to create 2 different instances of VPE link and using 1 for scaling and 1 for dei? Regards, Anuj + +VPE_dei and VPE.I could not understatnd your mean. Can you provided more details? My inial as below: setVpe_deiPrm( + &pUcObj->VPE_deiPrm, + pObj->captureOutWidth, + pObj->captureOutHeight); + + setVpePrm( + &pUcObj->VPE_swmsPrm, + pObj->chainsCfg->numLvdsCh, + swWinWidth, + swWinHeight, +pObj->OutWidth, +pObj->OutHight); + +Hi, Please take a reference of the below file to set Vpe_dei prm vision_sdk/apps/src/rtos/alg_plugins/objectdetection/fpcompute2/vpe_resizer.c Regards, Anuj + diff --git a/data2/text/range/0-5000/741754.txt b/data2/text/range/0-5000/741754.txt new file mode 100644 index 0000000000000000000000000000000000000000..da8348004314989f9dc765e3b3ccc7bf67f8e584 --- /dev/null +++ b/data2/text/range/0-5000/741754.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: EVE: I have written a kernel file, Is there a tool to generate the driver C file? + +Query Text: +Part Number: TDA2 Tool/software: Linux EVE: If I have written a kernel function(void kernel_func_name(full_argument_list)), Is there a tool to generate these functions: 1、kernel_func_name_init(full_argument_list, unsigned short* pblock); 2、kernel_func_name_vloops(pblock); 3、kernel_func_name_param_count(); + +Responses: +Hi, These functions will get generated when you compile the .k file with -kh and -kv option. Regards, Anshu + diff --git a/data2/text/range/0-5000/741791.txt b/data2/text/range/0-5000/741791.txt new file mode 100644 index 0000000000000000000000000000000000000000..dd4cb28dbf49cc44f13aca9bc5dd633a9ab0526f --- /dev/null +++ b/data2/text/range/0-5000/741791.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: EVE: Where can I get the original C functions of alg kernel functions? + +Query Text: +Part Number: TDA2 Tool/software: Linux EVE: I only find alg kernel functions in xx\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\algorithms\eve_sw_01_19_00_00\kernels. The head files of much original C functions only be found, but the implemented code can't be found. We only see alg kernel functions, and it's hard to understand alg kernel functions. Where here can I get those original C functions？ + +Responses: +Hi @user3591944 , EVE kernels are released as "Limited Source, Binary and documents", (please check eve_sw_01_19_00_00\docs\eve_sw_manifest.pdf). For full source code release you need to contact your local TI representative. Regards, Yordan + diff --git a/data2/text/range/0-5000/741814.txt b/data2/text/range/0-5000/741814.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2a9b1c9b1c7b10f5c38c78f119c16c638cf81b6 --- /dev/null +++ b/data2/text/range/0-5000/741814.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: PROCESSOR_SDK_RADAR_03_04_00_00_setupwin.exe + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS 1、Using gmake to compile \ti_components\algorithms\eve_sw_01_19_00_00\starterware\examples\mailbox_eve1_to_dsp1\dsp1\src there is a fatal error: illegal attempt to place ".cinit" before ".far" in "GROUP_1" Gmake: *** [dsp_mbox_eve1_to_dsp1.out] Error 1 2、Put the ".cinit" section after the ".far" section, and use gmake to compile the project with the following error. Undefined first referenced Symbol in file --------- ---------------- TSC_enable ../objs/eden_mailbox_eve1_to_gem1_gem1.obj TSC_read ../objs/eden_mailbox_eve1_to_gem1_gem1.obj __ISR_Table ../objs/intvecs.obj 3、I changed _TSC_read to TSC_read in tsc_h.asm and changed _TSC_enable to TSC_enable. Change the __ISR_Table in intvecs.asm to _ISR_Table to compile the executable file after compiling with gmake 4、I loaded the executable file of dsp1 and eve1 to the TDA2xdemo board through ccs. The data was written in the mailbox message in eve1, MAILBOX_IRQENABLE_SET_u was 0x1, but dsp1 did not receive the interrupt, and the interrupt did not respond. What should I do? + +Responses: +Hi, Have you run the cross bar gel? Please refer Chapter 4 of starterware\docs\eve_starterware_userguide.pdf Regards, Anshu + +Hi, Are you able to progress on this? If yes please close this thread, otherwise let us know if you followed the steps mentioned in previous thread. Regards, Anshu + diff --git a/data2/text/range/0-5000/741976.txt b/data2/text/range/0-5000/741976.txt new file mode 100644 index 0000000000000000000000000000000000000000..801fc8be738998bf3722cbd27aa353adcece1de1 --- /dev/null +++ b/data2/text/range/0-5000/741976.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: JAMR3 Application Board Query + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, Wanted to know if JAMR3 Application Board(EVM) supports Vision SDK version 03.05.00? Reference: (SPRUI52.pdf) Thank you! Vallabh + +Responses: +HI Vallabh, JAMR3 Application Board(EVM) not supported on Vision SDK version 03.05.00 However it is supported on Processor SDK 03.04.00.00 release Regards Surya + +Thank you Surya! Regards, Vallabh + diff --git a/data2/text/range/0-5000/742250.txt b/data2/text/range/0-5000/742250.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e8aa9d3c73b86d11d880f6409da98edda547452 --- /dev/null +++ b/data2/text/range/0-5000/742250.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EX17EVM: TDA2EX Frame Capture Mode + +Query Text: +Part Number: TDA2EX17EVM Tool/software: Linux Dear Sirs: There is a frame capture mode when the video source is interlaced video in DM81xx IPNC_RDK. I just wonder whether or not this mode is also available on TDA2 VSDK? If it is available, can you tell me where the example code snippet is? Regards, /ckhsu + +Responses: +Hi Hsu, Currently it is not supported for VIP. VIP driver uses different mechanism for TDA2 and DM81xx. Rgds, Brijesh + +Hi Brijesh: Thank you very much. Regards, /ckhsu + diff --git a/data2/text/range/0-5000/742252.txt b/data2/text/range/0-5000/742252.txt new file mode 100644 index 0000000000000000000000000000000000000000..21e8b56799b44ad8477ebf2c17419cc9901e6075 --- /dev/null +++ b/data2/text/range/0-5000/742252.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: TDA2EVM [VAYU EVM XC5777X CPU BOARD] How to set the board for capture the lvds camera by raw[0~7] ? + +Query Text: +Part Number: TDA2 Hi master: My board is TDA2EVM [VAYU EVM XC5777X CPU BOARD] The board run OV10635 camera well, the des out raw is [2~9], now we need to use another camera the des out raw is [0~7], How can I set the board? thanks. kevin.zd + +Responses: +Hi Kevin, Can you please clarify, if the question is on processing RAW data format vs YUV or connecting camera to the EVM? Regards, Sujith + +sorry. my camera is same as ov10635 camera, only output Raw pin is 0~7, the camera ov10635 is 2~9, evm board + ov10635 camera. ov10635-> ds90ub913[Din 2~9 ] - ds90ub914[Dout2-9] -> CPLD->J6 Vipx[0~7] evm board + my camera. mycamera-> ds90ub913[Din 0~7 ] - ds90ub914[Dout 0-7] -> CPLD->J6 Vipx[0~7] how set the board config SW ? Make my camera work well. + +Hi Kevin, Do you use the vision app board and multides board to connect the camera? What board settings are you using for the ov10635x camera? Regards, Prasad + +Hi Prasad: Please see my attach file pics. TI Board PIC.zip kevin.zd + +Hi Kevin, Were you able to resolve this? Regards, Sujith + diff --git a/data2/text/range/0-5000/743067.txt b/data2/text/range/0-5000/743067.txt new file mode 100644 index 0000000000000000000000000000000000000000..abbb1fbf84a8c0d002bf988d60d93b1eb6ed7351 --- /dev/null +++ b/data2/text/range/0-5000/743067.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: HOW debug use gdb + +Query Text: +Part Number: TDA2 Tool/software: Linux i have some problem in my code [ 89.228570] Alignment trap: not handling instruction edc37a00 at [<00050702>] [ 89.235743] Unhandled fault: alignment exception (0x811) at 0x00000249 [ 89.242342] pgd = edbd0000 [ 89.245148] [00000249] *pgd=be17a831 ./start: line 3: 857 Bus error (core dumped) ./sample_app.out i want to know where is the problem , how to run gdb debug? thanks! + +Responses: +Hi, GDB binary is already available with VSDK 3.5 file system. You can run this and debug in a similar way as gdb is used to debug any linux application. Regards, Anuj + +Hi: Anuj what about VSDK3.4? Could you tell me the path of GDB binary ! shuai + +Hi, Can you check in /usr/bin inside the file system. Regards, Anuj + +Hi, Is the issue resolved? Regards, Anuj + diff --git a/data2/text/range/0-5000/743118.txt b/data2/text/range/0-5000/743118.txt new file mode 100644 index 0000000000000000000000000000000000000000..b4fa9e2a7724efb614180316a1886e7ae94c971f --- /dev/null +++ b/data2/text/range/0-5000/743118.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: EVE: Where can I get the original C functions of alg kernel functions? + +Query Text: +Part Number: TDA2 Tool/software: Linux I have contact our local TI representative, and they asked me why I needed a full EVE's SDK(eve_sw_01_19_00_00); We needed a full EVE's SDK, There are two reasons: 1、We found some apps function that were different from what our algorithms required, and would like to modify it based on your original version. For example, we need that input size and output size of Median Filter is same, but original version isn't same; 2、We want to develop some new algorithms with referring to your original version. In eve_sw_01_19_00_00\docs\eve_sw_manifest.pdf, can you give us full EVE's SDK( include "Limited Source, Binary and documents" ) ? + +Responses: +Hi, Can you discuss this with your local TI representative and work with him/her to get the source release. This process cannot be done via e2e so you need to discuss with your local TI representative. Regards, Anshu + diff --git a/data2/text/range/0-5000/743136.txt b/data2/text/range/0-5000/743136.txt new file mode 100644 index 0000000000000000000000000000000000000000..44d9c193d8b88052bcd32d6321d2c57e922ba0a1 --- /dev/null +++ b/data2/text/range/0-5000/743136.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: TDA2xx record video in mp4 (original is yuv) + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, we want to record video and save in SDcard in mp4 format. does there any utils\link can be used? SDK vision is 03_04 Thanks~~ + +Responses: +Hi, .mp4 is a container format. You can save the video in .h264 format after encoding but you need to convert that and that support is not available with VSDK. Regards, Anuj + diff --git a/data2/text/range/0-5000/743370.txt b/data2/text/range/0-5000/743370.txt new file mode 100644 index 0000000000000000000000000000000000000000..daf51b478240bfab49956c99ee9d0c076f87c103 --- /dev/null +++ b/data2/text/range/0-5000/743370.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2/AM574x video stream encoder throughput + +Query Text: +Part Number: TDA2 Hello, I ask myself how much throughput the encoder for video streams can be reached on TDA2/AM574x devices. I would like store up to 8 video streams which we presumably encode best to keep the memory requirements and bandwidth to the storage medium as low as possible. From the description of the SDK (processors.wiki.ti.com/.../Processor_Training:_Multimedia) is not clear for me exactly how many streams can be processed parallel or which coding scheme has which restrictions. If I understand correctly, the VPE is used as input to the encoding. It exists on the SoC once. In the VPE description, I found nothing about multiplexing input data. However, the VPE seems to use the DSP cores for some of the encodings and those are available more than one time on some of the the mentioned SoC's. So my question is if anyone has experience in encoding more than one videostream on the mentioned SoC's? Best Regards Markus + +Responses: +Hi, Yes, you can encode multiple video stream using different channels of 1 enc link. Currently 8 channel support is there. But keep in mind that IVA can only encode upto 1080p at 60FPS. Regards, Anuj + diff --git a/data2/text/range/0-5000/743527.txt b/data2/text/range/0-5000/743527.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a5ee72203dabdacbcd655c68725c067c1e180c9 --- /dev/null +++ b/data2/text/range/0-5000/743527.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Alignment trap + +Query Text: +Part Number: TDA2 Tool/software: Linux i am use SDK_VISION_03_04_00_00 run my algorithm ，have some problem when run the program. follow is the log [ 1327.806627] Alignment trap: not handling instruction edc37a00 at [<00050702>] [ 1327.813818] Unhandled fault: alignment exception (0x811) at 0x00000249 [ 1327.822094] pgd = d8c3c000 [ 1327.824814] [00000249] *pgd=be053831 ./start: line 3: 874 Bus error (core dumped) ./sample_app.out i add some log to find where is the program. I found that there is a problem with a function, before this function to print log 1 and then enter the function to add a print log2, when the program runs, Log1 can come out, but log2 can not come out. could you analys what is the problem? + +Responses: +Hi, Please go through the below thread e2e.ti.com/.../41140 Regards, Anuj + +Hi Anuj maybe stack space is not enough， could you tell me how to adjust the size of stack space？ where is the config file？ BESTWISHES shuai + +Hi Shuai, If you want to increase the stack size used please modify the macro SYSTEM_DEFAULT_TSK_STACK_SIZE defined in links_fw/src/hlos/system/system_priv_common.h in vision-sdk. The error doesn't seem to be due to lack of stack space, but because of misaligned address access. I would suggest stepping through your code using gdb or any other debugger and finding the root-cause of the misaligned access. Regards Shravan + diff --git a/data2/text/range/0-5000/744118.txt b/data2/text/range/0-5000/744118.txt new file mode 100644 index 0000000000000000000000000000000000000000..e934f468f699ded99cd6072e8a1ec4643b50967d --- /dev/null +++ b/data2/text/range/0-5000/744118.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: Can I run two kernels on EVE simultaneously? + +Query Text: +Part Number: TDA2 Hi, I have a few questions related to EVE processing. 1. Is it possible to run two or more different kernels (vision algorithms) on the same EVE core simultaneously (not sequentially) working on the same input image? The chains will look as follows: Capture -> kernel1(EVE1) -> Display ; Capture -> kernel2(EVE1) -> Display 2. If yes, how the input and output buffers are taken care of? Regards, Shruti Joshi + +Responses: +Hi Joshi, Even through you have two chains, In reality the execution of kernel1 and kernel2 will be sequential on the EVE. Vision SDK takes care of the scheduling: task switching happens at buffer boundary and you don't have control over it. If the same captured image goes to kernel1 and kernel2, instead of 2 chains, I recommend a single chain with 2 branches: ------->kernel1----->display1 Capture--/------->kernel2----->display2 regards, Victor + +Thanks Victor for the feedback! EVE has a scalar that runs BIOS. Isnt it? So it is posisble to run multiple kernels on the same EVE core. Right? Vision SDK framework 's links can run on the EVE Scalars and multiple such links can exist on same EVE scalar. Or on any other core DSP/MCU/A15 for that matter. isnt this understanding correct? When executing 2 kernels, what shared resources need to be carefully time shared? Is there any app note on this please? Thanks & Best Regards Feroz + +Hi Feroz, Although it is possible to run multiple BIOS threads on one EVE, in practice we don't do that as it would result in very high context switch overhead. Kernels operate on per block basis. Each block of data must fit in a 16 KB memory footprint. Please refer to this post on more details about block processing: Having multiple kernels switching at a block level would be incur too much overhead. You can have task switching at each frame level but then you don't really need multi-threading on EVE itself. Your understanding is correct that the current Vision SDK framework can run have multiple links that exist on the same EVE scalar. The vision SDK would schedule each link sequentially on the same EVE scalar, with context switching happening at frame boundary. This simplifies things as so there is no resources sharing needed. regards, Victor + +Thanks a lot Victor! Best Regards Feroz + diff --git a/data2/text/range/0-5000/744120.txt b/data2/text/range/0-5000/744120.txt new file mode 100644 index 0000000000000000000000000000000000000000..f75240c5c7e5a80ca41f28513cdd013e29cbfaac --- /dev/null +++ b/data2/text/range/0-5000/744120.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Multiple outputs display in single frame + +Query Text: +Part Number: TDA2 Hi, I have different vision algorithms(kernels) running on different EVE cores. Is it possible to display the output of each on a single display simultaneously in a single frame? Will the merge link work in this case? Also, is there any example available for this? Regards, Shruti + +Responses: +Hi Shruti Yes, this is possible with vision SDK. Connect all Alg links (of different kernels) output to a merge link and then connect to a Display. If all these alg links output video frames, then you can directly display them with display link. But if these Alg links output some meta data, then a draw link which create the necessary overly can be fed to display links please refer below demos \vision_sdk\apps\src\rtos\usecases\tidl_OD \vision_sdk\apps\src\rtos\usecases\vip_single_cam_dense_optical_flow regards, Shiju + +Thank you for the clarification Shiju. Regards, Shruti + +Hello Shiju, I and Shruti working together. I have following query, If all these alg links output video frames, then you can directly display them with display link. >> We have output as video frames, but Merge link output with System_VideoFrameCompositeBuffer buffer type. Then how can we directly display them ?? As Display link support video frames. Regards, Kajal + +Hi Kajal Merge link output is System_Buffer, payload of this can be either System_VideoFrameCompositeBuffer or System_VideoFrameBuffer. If its System_VideoFrameCompositeBuffer, then just add this support in Display Link, its just getting the actual buffer pointer from System_VideoFrameCompositeBuffer. Only Sync link output System_VideoFrameCompositeBuffer format and if you do not have Sync Link in the data path, I assume your merge link output would be System_VideoFrameBuffer regards, Shiju + +Hello Shiju, Thank you for the information. I had idea about merge link output is System_Buffer but display link only supports System_VideoFrameBuffer type, that's why queried! We have to use sync link, so output will be System_VideoFrameCompositeBuffer type, will try to add this support in display link. Regards, Kajal + diff --git a/data2/text/range/0-5000/744324.txt b/data2/text/range/0-5000/744324.txt new file mode 100644 index 0000000000000000000000000000000000000000..3df14946e5ceda6fbf07e71f5083d4d6253fda8b --- /dev/null +++ b/data2/text/range/0-5000/744324.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: the temperature of SOC core + +Query Text: +Part Number: TDA2 Dear all. when I download the same program to the SOC and then after working 12 hours, we uesd PC to get the temperature of SOC CORE, and we find that two SOC have a 10℃ diffirence. I want to know what are the reasons causing this diffirence? PS: In my opinion, I think that the SOC CORE should have the same CORE temperature when they have the same program. the soc model is TDA2S. Looking forward your reply. + +Responses: +The junction temperature is related to the power dissipated, the thermal resistance from the silicon to the ambient, and the ambient temperature. Your question assumes that the ambient and thermal-resistance are equal between the two setups. And so, you, rightfully, consider why the power dissipation is also not the same between the two setups. The power dissipated is dependent upon the applied voltage. Are the CORE domains at the same voltage? The power (at a given voltage) can be broken into a dynamic part which is related to the code you are running and a leakage part which is a function of the device, its temperature (and its voltage) The leakage current of individual devices varies. This variation is a possible cause for your part-to-part variation. As identified in the description above, the voltage or differences in how the code actually runs on the parts could also contribute to the temperature difference. Kevin Lavery + diff --git a/data2/text/range/0-5000/745124.txt b/data2/text/range/0-5000/745124.txt new file mode 100644 index 0000000000000000000000000000000000000000..6baeeafc128cb2c9dcd75f2e843f821ee6737576 --- /dev/null +++ b/data2/text/range/0-5000/745124.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: How to create two vlan socket that bind same IP but different vlan-id? + +Query Text: +Part Number: TDA2PXEVM [TDA2PX]How to create two vlan socket that bind same IP but different vlan-id? (TI-RTOS) we have already added two vlan by VLANAddDevice, the default usage for vlan is bind to different IP address, we also send data success with different vlan-id socket that bind with different IP address but we need to create two vlan socket with different vlan-id that bind same IP address and this config is failure 1. we need send RTP on vlan id 5 with IP("198.18.36.96") 2. we need send other data on vlan id 12 with IP("198.18.36.96") but the NDK seems not support the two configs working at same time, we can not create one socket(vlan5) for sending RTP while create another(vlan12) for sending data, so how to solve this? + +Responses: +Hi Mi, This is not supported. Todd + diff --git a/data2/text/range/0-5000/745500.txt b/data2/text/range/0-5000/745500.txt new file mode 100644 index 0000000000000000000000000000000000000000..285c5c6317f86541bb52312536dfa585c47f001f --- /dev/null +++ b/data2/text/range/0-5000/745500.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2EVM5777: DDR Configurations for VisionSDK Linux + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hello, I am running PROCESSOR_SDK_VISION_03_03_00_00 on the TDA2EVM5777 and on custom hardware that is similar to the EVM. I can successfully boot on the new hardware with the default memory that comes with Vision SDK (note there is nothing on our custom hardware's EEPROM at this time). I need to update Linux in order to utilize the 4GB of ram on the custom hardware setup, instead of default settings. Can you please help clarify exactly what is required to allow me to use all 4GB of ram on the custom hardware? Below is what I tried/my assumptions 1. Since the custom hardware does not contain any firmware for EEPROM, and is able to boot OK, I assume its using the default settings from the u-boot source just fine, however, the Linux user space only sees 600MB of ram total (found by running the command free) where there is supposed to be 1.5GB in default settings I believe, based on dra7-evm.dts file below settings: memory { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */ }; How do I get access to more memory in user space with the default settings? 2. Since the custom hardware actually contains 4GB DDR, I want to change the bootloader to recognize the ram modules that I have, and so I followed this document. In the document, I was able to successfully use the EMIF configuration tool to generate the values necessary to update the u-boot source codes. When I finished filling out the EMIF configuration tool it generated LISA map register values to update evm.c with (the values for each LISA map register were very similar to the example for 2GB per EMIF settings given in evm.c). However, I haven't been able to successfully boot up using the updated source files yet. I didn't update the dra7-evm.dts to be 4GB yet, but unsure if that is the cause why it didn't boot. I didn't change anything in EEPROM either, since I have never had anything written to EEPROM and hoping I can just modify the default settings to be 4GB. Can you please help clarify exactly what is required to allow me to use all 4GB of ram on the custom hardware without writing to EEPROM? Thank you in advance, -iFer + +Responses: +Hi, Can you take a look at this discussion? Regards, Somnath + +Hi iFer, Did you get a chance to look at the discussion? Let me know if you have any follow up question? Regards, Somnath + +Do you need any other help on this topic? + diff --git a/data2/text/range/0-5000/745651.txt b/data2/text/range/0-5000/745651.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f8c00cd92e099dabf837ca6762022288840809e --- /dev/null +++ b/data2/text/range/0-5000/745651.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: GPIO NUMBER + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, How can i find the gpio number of a particular pin say gpio3_26 in tda2xx. I want to make that particular pin high from userspace (/sys/class/gpio). Kindly help me on this. + +Responses: +Hi Blessy, can you check if the following can help: e2e.ti.com/.../2605087 processors.wiki.ti.com/.../Linux_PSP_GPIO_Driver_Guide Regards, Yordan + +As a side note to what Yordan suggests, you can also check the pinmux tool: It will help you identify the pins and gpios on them. thanks, Alex + +Hi, Thankyou. Got it, by verifying with /sys/kernel/debug/gpio. + diff --git a/data2/text/range/0-5000/745682.txt b/data2/text/range/0-5000/745682.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a3e1f8e7ace6e57dc8e81c4d901c8cd6c669b47 --- /dev/null +++ b/data2/text/range/0-5000/745682.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2EXEVM: TDA2 - 'Undefined reference Error' + +Query Text: +Part Number: TDA2EXEVM Tool/software: TI C/C++ Compiler Hi, How can i implement IPC communication for vision_sdk? i need to implement ipc communication for vision_sdk to receive STOP, RESUME and START command from other modules. I have used the same code ipc_init, ipc_send etc in chains_main.c and included the required header files in the chains.h file. But i am getting an undefined reference error as shown below. --------------------------------------------------------------------------------------- chains_main.c:(.text+0x208): undefined reference to `vDiagPrint' chains_main.c:(.text+0x268): undefined reference to `vDiagPrint' chains_main.c:(.text+0x294): undefined reference to `vDiagPrint' chains_main.c:(.text+0x2ba): undefined reference to `vDiagPrint' chains_main.c:(.text+0x2e6): undefined reference to `vDiagPrint' /home/username/Source/vision_sdk/binaries/tda2ex_mccdvr_all/lib/a15/release/vision_sdk_linux_demo.a(chains_main.o):chains_main.c:(.text+0x33e): more undefined references to `vDiagPrint' follow /home/username/Source/vision_sdk/binaries/tda2ex_mccdvr_all/lib/a15/release/vision_sdk_linux_demo.a(chains_main.o): In function `main': chains_main.c:(.text.startup+0xe): undefined reference to `ipc_init' chains_main.c:(.text.startup+0x88): undefined reference to `vDiagPrint' --------------------------------------------------------------------------------------- can anyone pls help me to to link libraries.? Regards Balaji T + +Responses: +Hi, Ipc Initialization will be automatically done for all core included in the build. You just need to send and received event using IPC. For further implementation info please check how IPC links send informations. Regards, Anuj + diff --git a/data2/text/range/0-5000/745751.txt b/data2/text/range/0-5000/745751.txt new file mode 100644 index 0000000000000000000000000000000000000000..677f789b103536c708e982130b40eb8400491719 --- /dev/null +++ b/data2/text/range/0-5000/745751.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: How to config MPU 's frequency from 750M to 1G hz in visionSDK3 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, How to config MPU(A15) 's frequency from 750M to 1G hz in visionSDK3 ? We use bios OS on A15. + +Responses: +Hi, Please opp_high folder's MLO. Regards, Anuj + +Thank you very much. + +Hi Bao, In addition to what Anuj said kindly note that A15 will be set at 1176 MHz in case of OPP High. Regards, Rishabh + +Hi Rshabh, Actually, we use TDA2x with 17x17 package, nearly all the OPP configured the same as Nom, I modify the code to get 1G Hz. /* Configuration for DPLL MPU */ #if defined (SOC_TDA2XX) static pmhalPrcmDpllConfig_t *pDpllMpuCfg_23x23Package_20[] = { &dpllMpuCfgOppLow_20, &dpllMpuCfgOppNom_20, &dpllMpuCfgOppOd_20, &dpllMpuCfgOppOd_20, &dpllMpuCfgOppOd_20 }; static pmhalPrcmDpllConfig_t *pDpllMpuCfg_17x17Package_20[] = { &dpllMpuCfgOppLow_20, &dpllMpuCfgOppNom_20, &dpllMpuCfgOppNom_20, &dpllMpuCfgOppNom_20, &dpllMpuCfgOppNom_20 }; + +Hi Bao, You should make sure that frequency is within limits specified in Data Manual. For 17x17 package max frequency supported is 750 MHz. Regards, Rishabh + diff --git a/data2/text/range/0-5000/745768.txt b/data2/text/range/0-5000/745768.txt new file mode 100644 index 0000000000000000000000000000000000000000..c9914fb00cad314d737ee9a0650c57ee2d80c169 --- /dev/null +++ b/data2/text/range/0-5000/745768.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: remain size of SD card + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, how can I get the remain size of SD card? Thanks! + +Responses: +Hi, We dont have such support on target running with BIOS. You need to connect the sd card to pc and get it. Regards, Anuj + diff --git a/data2/text/range/0-5000/746202.txt b/data2/text/range/0-5000/746202.txt new file mode 100644 index 0000000000000000000000000000000000000000..c2f76b082778993a95bdf7c0a837e0ffb2bc5c34 --- /dev/null +++ b/data2/text/range/0-5000/746202.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: example to store SRV image on SDCARD + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear Team, Is there any example to show how SRV video image can be stored on SD-CARD? My customer want to have an example to store combined image of 4ch SRV, but any usecase would be welcome. My customer is using VisionSDKv3.0. Thanks and Best Regards, SI. + +Responses: +Hi, Please use links_fw/src/rtos/links_ipu/dss_m2mwb/ link. Take a reference of the below usecase vision_sdk\apps\src\hlos\adas\src\usecases\avbrx_sv_display_avbtx Regards, Anuj + diff --git a/data2/text/range/0-5000/746579.txt b/data2/text/range/0-5000/746579.txt new file mode 100644 index 0000000000000000000000000000000000000000..68bea3f1a6b3f3c9908572f978d65faa3aea0df0 --- /dev/null +++ b/data2/text/range/0-5000/746579.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: High performance array transposition for EVE core + +Query Text: +Part Number: TDA2 Hi, I have to transpose array for EVE next way: data1[y * width + y] to data2[y + x * height]. I try reales thes throw EDMA, but it is slow way. DMA doesn't work with TILER. What is the most efficient way to realise this procedure? + +Responses: +Hi Danil, Using EDMA to do the transpose will not be efficient. You can use VCOP to do the transpose ( look for p_scatter store instruction in VCOP). If you are doing just transpose then DMA will become bottleneck so it would be advisable if you can combine the transpose with some more processing to utilize EVE optimally. Regards, Anshu + diff --git a/data2/text/range/0-5000/747421.txt b/data2/text/range/0-5000/747421.txt new file mode 100644 index 0000000000000000000000000000000000000000..abb95b2050fd9c6e578be71b3f6f9c9814f0f86b --- /dev/null +++ b/data2/text/range/0-5000/747421.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: change C66link + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi: i am use SDK_VISION_03_04_00_00 uenv.txt is fdtfile=dra7-evm-infoadas.dtb args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.22:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' i change code of hlos just build and reboot ,but if i chage code of rtos (for exmple SDK_VISION_03_04_00_00\vision_sdk\apps\src\rtos\alg_plugins\framecopy\ frameCopyAlgoLocalDma.c ) i have to copy firmware of C66 to sd ( PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs/lib/firmware$ sudo cp dra7-* /media/hancan/rootfs/lib/firmware/ ) if not copy the chage is not done. how to solve this ? shuai + +Responses: +Hi Shuai, If you use NFS as your filesystem instead of an file-system on the SD card, then you can set the LINUX_TARGETFS in build/tools_path.mk file to point to your filesystem. Similarly you need to use the uenv_nfs file present in build/hlos/scripts/linux/ folder and update the nfsroot variable to point to the IP address and the folder on your PC. If you're having the file-system on your SD card, then you must copy the firmware every-time. Regards Shravan + diff --git a/data2/text/range/0-5000/747774.txt b/data2/text/range/0-5000/747774.txt new file mode 100644 index 0000000000000000000000000000000000000000..e40e2a691319cf0f633421b9f197b8c00b242d24 --- /dev/null +++ b/data2/text/range/0-5000/747774.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: How to config MJPEG Encoder to support lossless mode? + +Query Text: +Part Number: TDA2 Dear Champs, My customer would like to use IVAHD to encode lossless MJPEG. Per MJPEG_Encoder_HDVICP2_UserGuide.pdf (under \ti_components\codecs\ivahd_jpegvenc_01_00_16_01_production\packages\ti\sdo\codecs\jpegvenc\docs), lossless mode is supported but the config method is not mentioned all thru the user guide. Could you help provide the config method? Thanks. + +Responses: +Hi, Lossless Mode is not supported for Mjpeg Codec. Regards, Anuj + diff --git a/data2/text/range/0-5000/747944.txt b/data2/text/range/0-5000/747944.txt new file mode 100644 index 0000000000000000000000000000000000000000..57dc179a68342b72185f51d008aefb2e7b1fb4a2 --- /dev/null +++ b/data2/text/range/0-5000/747944.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: TDA2x (TDA2P) UseCase EUNCAP perfermance + +Query Text: +Part Number: TDA2 Dear All, I have some question about the performance of object detection use case (No TIDL_OD) on TDA2x (or TDA2p). 1. According VisionSDK_DataSheet.pdf Chapter 9(EUNCAP), the input video resolution is 1M(720p). What is the input(processing) resolution of the actual algorithm(PD, VD, TSR, TLR, FCW(with SFM) and processing frame rate ? 2. If using TDA2x( or TDA2p) fully, What is the Max performance such as framerate and resolution ? BR, Khethan + +Responses: +Hi, Yes the input resolution is 720p as no VPE link is used. For further info on individual algorithm, please refer the algorithm datasheet inside ti_components/algorithm/ Regards, Anuj + +Hi Thank for reply BR, Khethan + diff --git a/data2/text/range/0-5000/748456.txt b/data2/text/range/0-5000/748456.txt new file mode 100644 index 0000000000000000000000000000000000000000..cea5c49cc3ee8d41ca0f97b7bf56fbe306cb7e48 --- /dev/null +++ b/data2/text/range/0-5000/748456.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: DDR DQ signal swapping TDA2SX + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, We are working on a custom board based on TDA2SX. We did some swapping in DQs with in the same bytes (DDR1_D0-> DQ0, D1->DQ5, D2->DQ1 ....D8->DQ8,.....). We hope this swapping is fine. Could you please confirm this with relevant software changes. Thanks Akesh + +Responses: +There is no issue with swapping data bits (within a byte) when interfacing TDA2SX with either DDR2 or DDR3. No software changes are required. + diff --git a/data2/text/range/0-5000/749019.txt b/data2/text/range/0-5000/749019.txt new file mode 100644 index 0000000000000000000000000000000000000000..6d59234818c335bce17ab50c63da56eeeb9d95b7 --- /dev/null +++ b/data2/text/range/0-5000/749019.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: #pragma DATA_SECTION to UTILS_HEAPID_DDR_CACHED_SR + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi: i am useing SDK_VISION_03_04_00_00\vision_sdk in a dsp1 link i want put my model to UTILS_HEAPID_DDR_CACHED_SR, #pragma DATA_SECTION (model,UTILS_HEAPID_DDR_CACHED_SR ); MInt32 model[] = { 177, 301, 176, 321, 176, 340, 177, 359, 180, 379, 184, 398, 189, 417, 195, 435, 202, 453, 212, 471, 223, 487, 235, 502, 249, 516, 263, 529, 278, 541, 294, 553, 311, 562, 331, 568, 352, 569, 374, 566, 396, 558, 414, 547, 431, 533, 446, 519, 460, 504, 473, 488, 484, 470, 493, 451, 499, 431, 503, 412, 506, 392, 507, 373, 508, 353, 507, 334, 506, 314, 504, 294, 501, 275, 199, 272, 215, 257, 235, 253, 256, 255, 276, 260, 290, 274, 272, 273, 254, 270, 236, 268, 218, 269, 356, 267, 370, 251, 392, 243, 415, 238, 438, 238, 459, 250, 438, 252, 417, 255, 396, 260, 376, 265, 223, 308, 232, 302, 242, 298, 254, 297, 266, 299, 276, 305, 282, 314, 273, 316, 263, 318, 253, 319, 242, 317, 232, 314, 373, 305, 381, 294, 391, 287, 404, 284, 417, 284, 428, 286, 438, 293, 429, 300, 419, 304, 408, 307, 396, 307, 384, 306, 307, 302, 309, 337, 306, 373, 289, 391, 298, 412, 327, 415, 347, 413, 377, 406, 382, 384, 363, 368, 355, 333, 352, 298, 280, 461, 300, 451, 324, 443, 343, 444, 362, 438, 388, 440, 413, 445, 396, 463, 375, 476, 349, 483, 322, 482, 299, 475, 286, 462, 315, 460, 345, 458, 376, 452, 407, 447, 377, 455, 346, 461, 315, 462, 253, 309, 406, 296, 328, 301, 330, 332, 332, 362, 334, 391, 337, 414, 253, 307, 409, 294, }; can i ? Shuai + +Responses: +Hi, You can give it a try but i guess initialization of that array is not possible. Regards, Anuj + +Hi Anuj the model is too big ! i am try to read it in A15 and send it to c66. but in ccs i use nitialization of that array is ok! shuai + +Hi, Please initialize your array inside your usecase or from where it gets called or inside link init if you are using it inside a link. Do not do it globally. Regards, Anuj + diff --git a/data2/text/range/0-5000/749131.txt b/data2/text/range/0-5000/749131.txt new file mode 100644 index 0000000000000000000000000000000000000000..e04d71613903b7dd3be6a4a67f08fc7ab57a7fe8 --- /dev/null +++ b/data2/text/range/0-5000/749131.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: pass buffer_site for A15 to c66 + +Query Text: +Part Number: TDA2 Tool/software: Linux now i am VISION_03_04_00_00 char * model_fr = (char*)OSA_memAllocSR(OSA_HEAPID_DDR_CACHED_SR1, length_fr, 32); i read model file to model_fr buffer in a15 , it will use by C66 , so have can i send the model_frto C66 dsp ？ how can i pass the physical pointer of this buffer to DSP as an Alg link (on DSP) create time parameter? i am run SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\hlos\usecases\nullSrc_display , could you please illustrate how to add code take this usecase as an example . Shuai + +Responses: +Hi, You can send any structure to any link from A15 from your usecase using System_linkControl api with a command to a link provided that link supports that command. You can also provide your model_fr to a link in its create param, provided that links create param has that member to take model. Regards, Anuj + +Hi Anuj in sample_app\src\hlos\usecases\nullSrc_display\Chains_nullSrc_display this file get mem and read model then char * model_fr = (char*)OSA_memAllocSR(OSA_HEAPID_DDR_CACHED_SR1, length_fr, 32); gUcObj.Alg_FrameCopyPrm.mybuf = (void*)model_fr; i print model_fr bufsite and model data here is right. in sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c Alg_FrameCopyCreate i get the bufsite is the same, but model_data is 0 is wrong. float *model_fr = (float *)pCreateParams->mybuf; Vps_printf("rtos_model_frsite=%x,model_fr_0=%f,model_fr_1=%f \n", model_fr,model_fr[0], model_fr[1]); i donot know why ? + +Hi, Its because you are allocating the buffer from A15 which runs linux and has a virtual memory but DSP uses physical memory. So you need to get the physical address of that buffer and pass that DSP. You can use something like below buffer.payload = (void *) OSA_memVirt2Phys((UInt32)buffer.payload, OSA_MEM_REGION_TYPE_SR1); Regards, Anuj + +HI: Anuj char * model_fr = (char*)OSA_memAllocSR(OSA_HEAPID_DDR_CACHED_SR1, length_fr, 32); fread(model_fr, sizeof(char), length_fr, fp_fr); gUcObj.Alg_FrameCopyPrm.mybuf = (void*)OSA_memVirt2Phys((UInt32)model_fr ,OSA_HEAPID_DDR_CACHED_SR1); you mean like this ? Regards, SHUAI + +HI: Anuj its right now! thanks SHUAI + diff --git a/data2/text/range/0-5000/749189.txt b/data2/text/range/0-5000/749189.txt new file mode 100644 index 0000000000000000000000000000000000000000..0667ef617352db466d4078cdfa220d90b02c0ad6 --- /dev/null +++ b/data2/text/range/0-5000/749189.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TIDL convolution layer input ,output, bias are all in ibufla, can I put the output on ibufha + +Query Text: +Part Number: TDA2 Hi: Recently, I found in TIDL convolution layer, the input, output and bias value are all on ibufla, for sparse convolution, the weights value first transfered to DMEM of EVE, then from DMEM to ibufha, for dense convolution, the weights value directly transferd to ibufha. Now, I put the output on ibufha, but I can't detect object. Can I put the output on ibufha, and can I directly transfer the weights value of sparse convolution to ibufha. thanks. + +Responses: +No, Sparse convolutions nned to update the weights during kernel executions. We recommend not to update sparse convolution flow. + diff --git a/data2/text/range/0-5000/749430.txt b/data2/text/range/0-5000/749430.txt new file mode 100644 index 0000000000000000000000000000000000000000..98d05552336e49a354e4cfc76d613fad9cc9cefe --- /dev/null +++ b/data2/text/range/0-5000/749430.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3: Presbl + +Query Text: +Part Number: TDA3 Hi Sir, Is there any presbl code included like sbl in vision low TDA3x controller? Regards, Sagar + +Responses: +Hi Sagar, I did not fully understand the question. Are you talking about ROM bootloader? Regards, Rishabh + +Hi Sir, Actually in TDA2x i.e vision high there is no need to initialize QSPI while copying from external SDF. But inTDA3 i.e vision low there is need to reinitialize QSPI to do the same. Why? Also there is one presbl main function in which QSPI is initialized. So why there is again initialization of QSPI? Regards, Sagar + +Hi Sagar, SBL needs to initialize QSPI as per its need. And the same is done in both TDA2/TDA3 SBL. SBL will set QSPI in 4 bit memory mapped mode. It will also change the clock to max possible for best throughput. Hope this helps. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/749522.txt b/data2/text/range/0-5000/749522.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c444699a5438e8d5fc436eb98eaac234783910d --- /dev/null +++ b/data2/text/range/0-5000/749522.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS: Display link output statics + +Query Text: +Tool/software: TI-RTOS Hello, I want to clear doubt regarding display link statics. For any use case , when we print statics for display link there no output statics. Why is it so? Regards, Kajal. + +Responses: +Hi Kajal, There is no output from display link and hence there is no output statistic. Regards, Rishabh + +Okay. Meaning output frames are going to display drivers for displaying them. ( i. e. FVID2_Frame for that purpose) Is my understanding correct?? Regards, Kajal + +Kajal, Input frame is being used by display driver for displaying data. After the frame display is complete, the driver returns the frame to the application. You can also refer to use case diagram. Regards, Rishabh + +Hello Rishabh, About which use case digram you are talking? Regards, Kajal + +Hi Kajal, You can look at any Vision SDK use case jpg. E.g. PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\usecases\vip_single_cam_frame_copy\chains_vipSingleCameraFrameCopy.jpg Display link is the last block. The output does not go to any other link. Hope this clarifies. Regards, Rishabh + +Okay Rishabh, thank you for clarification. Regards, Kajal + +Closing the thread as issue has been resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/749561.txt b/data2/text/range/0-5000/749561.txt new file mode 100644 index 0000000000000000000000000000000000000000..96d716804d834432af38e1e1f26e65fa8f43d74f --- /dev/null +++ b/data2/text/range/0-5000/749561.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: ALG: ERROR: No alg create function specified (algId = 39) !!! + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi : i am thy to add a new Link_algPlugin in sample_app\src\rtos\alg_plugins, i add id at bottom of AlgorithmLink_DspAlgorithmId but have some problem follow is log OST] [HOST ] 78.946776 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 78.946837 s: IPC_OUT_0 : Create Done !!! [HOST] [HOST ] 78.947447 s: pObj->Alg_FrameCopy_forhandLinkID start=50331697 [HOST] [DSP1 ] 78.946928 s: IPC_IN_0 : Create in progress !!! [HOST] [DSP1 ] 78.947325 s: IPC_IN_0 : Create Done !!! [HOST] [DSP1 ] 78.947538 s: ALG: ERROR: No alg create function specified (algId = 39) !!! what is the problem? thanks shuai + +Responses: +Hi Shuai, please make sure you call your your AlgorithmLink_XXXXXX_initPlugin function in App_init() in file "vision_sdk/apps/src/common/app_init/app_init_dsp.c". You need to call this function in order to register you algorithm plugin. Regards, Yordan + diff --git a/data2/text/range/0-5000/749949.txt b/data2/text/range/0-5000/749949.txt new file mode 100644 index 0000000000000000000000000000000000000000..e533b076015350498f7593b176fa8415320248fc --- /dev/null +++ b/data2/text/range/0-5000/749949.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: compile PROCESS_SDK_3_2_0_0 appimage error + +Query Text: +Part Number: TDA2 Tool/software: Linux my host is ubuntu18.04 and I compile PROCESS_SDK_3_2_0_0 step : 1, make depend 2,make vision_sdk -s -j8 3.make appimage the step 1 and step 2 have compile finished, when i make appime is fllow err: mono VSION_SDK/ti_components/drivers/pdk_01_08_01_06/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe VSION_SDK/vision_sdk/binaries/apps/tda2xx_evm_bios_met/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg VSION_SDK/vision_sdk/binaries/apps/tda2xx_evm_bios_met/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg.rprc WARNING: The runtime version supported by this application is unavailable. Using default runtime: v4.0.30319 Unhandled Exception: System.TypeInitializationException: The type initializer for 'System.Console' threw an exception. ---> System.TypeInitializationException: The type initializer for 'System.ConsoleDriver' threw an exception. ---> System.Exception: Magic number is wrong: 542 at System.TermInfoReader.ReadHeader (System.Byte[] buffer, System.Int32& position) [0x0002b] in <8f2c484307284b51944a1a13a14c0266>:0 at System.TermInfoReader..ctor (System.String term, System.String filename) [0x00065] in <8f2c484307284b51944a1a13a14c0266>:0 at System.TermInfoDriver..ctor (System.String term) [0x00058] in <8f2c484307284b51944a1a13a14c0266>:0 at System.ConsoleDriver.CreateTermInfoDriver (System.String term) [0x00000] in <8f2c484307284b51944a1a13a14c0266>:0 at System.ConsoleDriver..cctor () [0x00062] in <8f2c484307284b51944a1a13a14c0266>:0 --- End of inner exception stack trace --- at System.Console.SetupStreams (System.Text.Encoding inputEncoding, System.Text.Encoding outputEncoding) [0x0000a] in <8f2c484307284b51944a1a13a14c0266>:0 at System.Console..cctor () [0x000a8] in <8f2c484307284b51944a1a13a14c0266>:0 --- End of inner exception stack trace --- at out2rprc.Program.Main (System.String[] args) [0x00043] in <00b942d828114f90a31f2820d23dca05>:0 [ERROR] FATAL UNHANDLED EXCEPTION: System.TypeInitializationException: The type initializer for 'System.Console' threw an exception. ---> System.TypeInitializationException: The type initializer for 'System.ConsoleDriver' threw an exception. ---> System.Exception: Magic number is wrong: 542 at System.TermInfoReader.ReadHeader (System.Byte[] buffer, System.Int32& position) [0x0002b] in <8f2c484307284b51944a1a13a14c0266>:0 at System.TermInfoReader..ctor (System.String term, System.String filename) [0x00065] in <8f2c484307284b51944a1a13a14c0266>:0 at System.TermInfoDriver..ctor (System.String term) [0x00058] in <8f2c484307284b51944a1a13a14c0266>:0 at System.ConsoleDriver.CreateTermInfoDriver (System.String term) [0x00000] in <8f2c484307284b51944a1a13a14c0266>:0 at System.ConsoleDriver..cctor () [0x00062] in <8f2c484307284b51944a1a13a14c0266>:0 --- End of inner exception stack trace --- at System.Console.SetupStreams (System.Text.Encoding inputEncoding, System.Text.Encoding outputEncoding) [0x0000a] in <8f2c484307284b51944a1a13a14c0266>:0 at System.Console..cctor () [0x000a8] in <8f2c484307284b51944a1a13a14c0266>:0 --- End of inner exception stack trace --- at out2rprc.Program.Main (System.String[] args) [0x00043] in <00b942d828114f90a31f2820d23dca05>:0 make[1]: *** [build_multi_core_image_gen.mk:147: all] Error 1 make[1]: Leaving directory 'VSION_SDK/vision_sdk/build/rtos/makerules' make: *** [Makefile:249: appimage] Error 2 + +Responses: +Hi, We have not used this tool on ubuntu 18.04. Can you try ubuntu 14.04 or ubuntu 16.04. Regards, Rishabh + +Hi, Is there an update on this? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/750262.txt b/data2/text/range/0-5000/750262.txt new file mode 100644 index 0000000000000000000000000000000000000000..3710161a2d6beb9480cf1848ffaa4cbf6d71c594 --- /dev/null +++ b/data2/text/range/0-5000/750262.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: tda2 + +Query Text: +Part Number: TDA2 Dear TI， A strange bug comes， I find that after I run the TIDL demo ， the output detection ROI coordinate is not correct！ As you see below，I printed the detected rectangle coordinate ，then check the output value of the rectangle coordinate，nearly all of those are not accurate location . Is there any constant value needed be substracted from the variable pObjectDateDesc->ypos and pObjectDateDesc->xpos ,even pObjectDateDesc->objHeight and pObjectDateDesc->objWith needed be multiplied a constan coefficient? Looking forward to your kind reply, tks dear. + +Responses: +Hi, Can you specify which demo you are running and device used? Thanks, Praveen + +object detection with TIDL on tda2x EVM board + +Can you refer to below e2e thread to understand the format of TIDL detection output and to draw the boxes, e2e.ti.com/.../679186 Thanks, Praveen + +hi，dear In fact， this page is not the right information I want。 Could you please chech the file "vision_sdk\apps\src\rtos\alg_plugins\objectdetection\objectDrawLink_algPlugin.c" ? In this file, I print the variable pObjectDateDesc->ypos and pObjectDateDesc->xpos ,even pObjectDateDesc->objHeight and pObjectDateDesc->objWith when detecting the vehicle, yet the result rectangle is far from the real vehicle objects in the image. Is there any math relation of the results coordinate？ + +Hi, Same question is discussed in the below thread and hence closing this thread. e2e.ti.com/.../751274 Thanks, Praveen + +Yet，could anybody answer my question on that link above？ + diff --git a/data2/text/range/0-5000/750967.txt b/data2/text/range/0-5000/750967.txt new file mode 100644 index 0000000000000000000000000000000000000000..526083fbd96e33bff9c3e66bad9599d9dfc9402e --- /dev/null +++ b/data2/text/range/0-5000/750967.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: PCI configuration space access is not aligned + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I have got an issue with Linux 4.4.84 from PSDK 3.03 running on TDA2xx EVA board. I have noticed that the accesses to PCI configuration space registers are not aligned to 4B boundary which results in incorrect reading of the, for example, status register. Upon implementing the accesses using pci_bus_read_config_dword they are being read correctly. Thinking that this is a problem related solely to the Linux version, I've had a look into the same code from more recent kernels and it is the same. However, on my PC where I run kernel 4.16.7 all my PCI devices' registers are correctly read using those non-aligned accesses. What I would like to ask is if this problem is in any way related to the board itself and its A15 core. I'm seeing much more non-aligned accesses which probably need to be patched. Is this a known problem when it comes to TI boards? If yes, is there any official patch for this? Thank you in advance. Nick + +Responses: +Hi Nick, There are known issues with configuration space access for registers not aligned to 4B boundary. This is documented in the DRA7xx Silicon Errata found here (Errata ID i870) www.ti.com/.../sprz398i.pdf A work around patch has been pushed and is available in later kernel versions. The patch can be accessed here. patchwork.kernel.org/.../ Regards Shravan + +Hi Shravan, This patch resolved my issue and I would just like to inform whoever uses this patch in the future to go through each of the 4 parts since this one alone is not enough, at least for kernel 4.4.84 that comes with PSDK 3.03. Another thing that is worth mentioning is that the 'pci-dra7xx.c' patch from part 4 is not directly applicable to pci-dra7xx.c of kernel 4.4.84 so I had to pick some parts manually. This leads me to the question why are there TI patches for newer kernel versions but kernel 4.4.84 without any critical patches always comes with PSDK which leads to so much unnecessary confusion and issues. Regards, Nick + +Hi Nick, Thank you for the information. We will be making a PSDK release next month which is based off K-4.14 , and this will include all these fixes, thus avoiding the confusion with back-porting some of these patches. Regards Shravan + +Hi Shravan, I'm very glad to hear that. Thank you for the help, you can now close this thread. Regards, Nick + diff --git a/data2/text/range/0-5000/751163.txt b/data2/text/range/0-5000/751163.txt new file mode 100644 index 0000000000000000000000000000000000000000..995f46ea9b067e663b1eb92fec24834d3098e437 --- /dev/null +++ b/data2/text/range/0-5000/751163.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: Cross complie opencv, missing vsdk.cmake + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear officers, I am trying to cross complie opencv following the user guide "OpenCV_cross_compile_Steps_for_A15_Linux.pdf". But the cmake file "arm-gnueabi.toolchain_vsdk.cmake" can not be found. Would you please provide the file or the download address? Thank you + +Responses: +Hi @user5863765, please check the attachment in this post: Regards, Yordan + +Hi Yordan, I have checked the post and do not find the file "arm-gnueabi.toolchain_vsdk.cmake". Do you mean "arm-gnueabi_bios.toolchain.cmake"? + +Hi @user5863765 , sorry I missed that. Did you clone the tiopencv from the git and checkout the "tiopencvrelease_3.1" branch? Can you try with "tiopencv/platforms/linux/arm-gnueabi.toolchain.cmake"? Regards, Yordan + +Hi Yordan, Sorry for response so late. I have compiled it successfully by using "tiopencv/platforms/linux/arm-gnueabi.toolchain.cmake". But how to add OpenCL/VXLIB/DSP? Can i refer to the settings in "arm-gnueabi_bios.toolchain.cmake"? + +Hi, I have pinged OpenCL experts for further help. Regards, Yordan + +Hi, please check this post: e2e.ti.com/.../2830341 Regards, Yordan + diff --git a/data2/text/range/0-5000/751274.txt b/data2/text/range/0-5000/751274.txt new file mode 100644 index 0000000000000000000000000000000000000000..bdf4cac8d02f14658dfa93c4c119b0b1cf9d18fe --- /dev/null +++ b/data2/text/range/0-5000/751274.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: tda2 TIDL SSD + +Query Text: +Part Number: TDA2 Dear TI， A strange bug comes， I find that after I run the TIDL demo ， the output detection ROI coordinate is not correct！ As you see below，I printed the detected rectangle coordinate ，then check the output value of the rectangle coordinate，nearly all of those are not accurate location . Is there any constant value needed be substracted from the variable pObjectDateDesc->ypos and pObjectDateDesc->xpos ,even pObjectDateDesc->objHeight and pObjectDateDesc->objWith needed be multiplied a constan coefficient? In fact， this page that you answer me is not the right information I want。 Could you please chech the file "vision_sdk\apps\src\rtos\alg_plugins\objectdetection\objectDrawLink_algPlugin.c" ? In this file, I print the variable pObjectDateDesc->ypos and pObjectDateDesc->xpos ,even pObjectDateDesc->objHeight and pObjectDateDesc->objWith when detecting the vehicle, yet the result rectangle is far from the real vehicle objects in the image. Is there any math relation of the results coordinate？ Looking forward to your kind reply, tks dear. + +Responses: +Hi, There is no other math required on this Draw link code, the pObjectDateDesc->ypos and pObjectDateDesc->xpos should give the detected object positions. Are you running TIDL demo as it is without any changes and getting wrong detection's? Thanks, Praveen + +Hi，Praveen If what you said is true，then I think it maybe the frame number match or synchronization problem. Is there any synchrone mechanism to match every frame's detection result？ I mean that when I saved the current frame's result， it may be running the other frame not the current one. There is a frame synchronization problem？ Is it right？ Thanks， Chenglin + +Hi, There is already a sync link in the usecase before object draw link which will take care of synchronizing of input yuv data and metadata(output of tidl) . Please 1st check with ti provided model files and check whether are you getting the proper values or not. Regards, Anuj + +Hi, I have changed the origal TIDL configuration file as following: TIDL Configuration parameters ----------------------------- inputWidth=768 inputHeight=320 inputFile=inData_OD inputHDRFile=inHeader_OD netFileName=tidl_net_jdetNet_ssd.bin paramFileName=tidl_param_jdetNet_ssd.bin fps=10 (fps = 30 changed) threshold=0.3 I guess if the change of fps cause the detected results does not match the response frame？ Is there any bug about printing the detected result ？ + +Anybody who can help me？ + +Kumar, Please check if you are able to reply now. Regards Karthik + +Hi, Is the detections working with standalone TIDL application? + +Since we haven't heard back, we hope you could find solution. Closing the thread. + diff --git a/data2/text/range/0-5000/751379.txt b/data2/text/range/0-5000/751379.txt new file mode 100644 index 0000000000000000000000000000000000000000..bca650058fbc51aed507efee0bca440a9031a9f4 --- /dev/null +++ b/data2/text/range/0-5000/751379.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE : KERNEL_C OPTIMISATION & PIPELINING + +Query Text: +Part Number: TDA2 Hi, I am writing a KERNEL_C code. I have tried the optimisations to reduce the cycles. so, want to know: - is their any other method for optimisation apart from 16 SIMD alignment? - can we do pipe-lining in the KERNEL_C? Regards Surbhi + +Responses: +Hi Surbhi, can you check if this thread can be useful: e2e.ti.com/.../2688022 Also you can contact your local TI representative to get access to EVE Programmers Guide (SPRUHC1G.pdf). Regards, Yordan + diff --git a/data2/text/range/0-5000/751554.txt b/data2/text/range/0-5000/751554.txt new file mode 100644 index 0000000000000000000000000000000000000000..61d1e73bc8dc5d8c524df212d2eeda25ac52affe --- /dev/null +++ b/data2/text/range/0-5000/751554.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Questions in radarDspProcessCfar_priv.c + +Query Text: +Part Number: TDA2 Dear respecful TI experts, I have a couple of questions regarding software logics in radarDspProcessCfar_priv.c which is included in PROCESSOR_SDK_RADAR_03_04_00_00. - Question #1 In the function named "AlgorithmFxn_RadarDspCfar_caall", the loop variable "i" is converted into i_doppler depending on whether "i" is odd/even. Could you tell me what is the purpose of this conversion or the purpose of the "i_doppler". I think there a bug which is related to i_doppler, but to get to the bottom of it, I need to detailed purpose of the variable. -Question #2 In the function named "AlgorithmFxn_RadarDspCfar_caall", below codes which are performed when pCfarCreateParams->enableSecondPassSearch == 0 seem not correct the stop condition in the second for loop should be corrected, otherwise all the variables in the for loop will be overflowed. please let me know if there is what I missed. if (tempDetected < pCfarCreateParams->maxNumDetObj) { for (j = 0; j < (Int32)tempDetected; j++) { cfarOut->noise[detected] = tempNoise[j]; cfarOut->rangeInd[detected] = tempRangeIndex[j]; cfarOut->dopplerInd[detected++] = i_doppler; } } else { for (j = 0; j < pCfarCreateParams->maxNumDetObj; j++) { cfarOut->noise[detected] = tempNoise[j]; cfarOut->rangeInd[detected] = tempRangeIndex[j]; cfarOut->dopplerInd[detected++] = i_doppler; } break; } + +Responses: +Hi, Apologies for the delayed response on this one. The i_doppler is used to perform a shift on the Doppler dimension to incorporate positive and negative relative velocties. The data is arranged after FFT and energy sum in Doppler Dim x Range Dim (The x-axis is Dopper and y-axis is Range.). The doppler bins are however 0, 1, 2, 3, and so on till the N doppler - 1. The i_doppler will loop as below assuming N doppler is 64. 0, 63, 1, 62, and so on till 31, 32 The first pass search in along the range dimension. The second pass in on the doppler dimension. During the second pass search the i_doppler is used to find the window in the positive relative velocity and negative relative velocity doppler bins for a particular detected range cell to find the noise floor in the doppler dimension and check if the energy at the first pass detected cell is indeed greater than the noise floor in the doppler direction. I am not sure I follow your second comment regarding the loops. The expectation is that if the tempDetected is less than max array size given by pCfarCreateParams->maxNumDetObj then only tempDetected number of objects is copied to the array. If not then the full array is populated till the maximum allowed objects given by pCfarCreateParams->maxNumDetObj. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/752383.txt b/data2/text/range/0-5000/752383.txt new file mode 100644 index 0000000000000000000000000000000000000000..270e657a3189235bd2691b44c3639d3a0151f51a --- /dev/null +++ b/data2/text/range/0-5000/752383.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: VXLIB Remap Performance + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi. I'm using Vision SDK 3.4 to develop 3ch 1080p vip capture -> panorama algorithm. To make panorama image to fit 1080 width, I resized each channel to 640x360. So, 1920x360 size Y-LUT and 1920x180 size CbCr-LUT is used to make panorama image. I used VXlib function , VXLIB_remapBilinear_bc_i8u_i32f_o8u. According to VXLib Test Report, remap function takes 7.5*(dst width * dst height) + 139 cycles. In my case, remap function should take about 13ms. But, actually it takes over 40ms. LUT is allocated as belows pPanoramaObj->remapBuf = Utils_memAlloc( UTILS_HEAPID_DDR_CACHED_SR, ( 1920*360*8*2 ), MY_FRAME_ALIGN /* 32u*/ ); and below is the part of remap. VXLIB_bufParams2D_t src_addr; VXLIB_bufParams2D_t dst_addr; VXLIB_bufParams2D_t remap_addr; VXLIB_STATUS vx_status; src_addr.dim_x = 1920; src_addr.dim_y = 360; src_addr.stride_y = 1920; src_addr.data_type = VXLIB_UINT8; dst_addr.dim_x = 1920; dst_addr.dim_y = 360; dst_addr.stride_y = 1920; dst_addr.data_type = VXLIB_UINT8; remap_addr.dim_x = 1920*2; remap_addr.dim_y = 360; remap_addr.stride_y = 1920*8; remap_addr.data_type = VXLIB_FLOAT32; vx_status = VXLIB_remapBilinear_bc_i8u_i32f_o8u( (UInt8*)((UInt32)pMosaicFrameBuffer->bufAddr[0] + 1920*360), &src_addr, (UInt8*)((UInt32)pOutFrameBuffer->bufAddr[0] + 1920*360), &dst_addr, (VXLIB_F32*)((UInt8*)pPanoramaObj->remapBuf), &remap_addr, 0 ); if(vx_status!=VXLIB_SUCCESS) Vps_printf("remapY result:%d\n", vx_status); remap function itself works well, and image is normal. What should I do for better performance? Thanks in advance. + +Responses: +Thanks for your question. Explanation of difference you are seeing All of the performance numbers listed in the test report reflect the core DSP performance without considering memory stalls. Therefore it is a best case performance assuming all of the code and data are in L1 memory. In reality, this is not usually possible, so these numbers give an idea of what the performance should not get better than. Now I have done some testing to see what the performance is assuming all data and memory were accessed from DDR cached memory, and this kernel which used randomly generated remap table ranged from 23 to 82 cycles per output pixel on average. When I ran the same test except put the code and data in DSP L2 memory, the performance improved to range from 10 to 30 cycles per output pixel. Here is a summary of performances: 1. CPU only (no L2/DDR memory) : 7.5 cycles 2. Code/Data in L2: 10 to 30 cycles 3. Code/Data in DDR: 23 to 82 cycles The difference between case 1 and 2 is the L1 cache miss penalty. The difference between case 2 and case 3 is the L2 cache miss penalty to DDR. The cache miss rate will vary based on remap table. For example, a unity remap table will have a high cache hit rate since subsequent input pixel accesses will be on same cache line that was already fetched. Proposal for Improvement As seen above, the best thing you can do to improve performance is to process the data from L2 RAM. Since the whole input image probably does not fit into L2 RAM, DMA the input from DDR into L2 RAM prior to calling this function. This probably requires you to pipeline the processing in a ping/pong fashion across blocks of input/output. What I mean is make a loop wherein you initiate a transfer of an input block into L2 RAM, and while the DMA is happening, call VXLIB function on a previously DMA'd block in L2. When the VXLIB function is done, initiate the next transfer, and continue on until the end of the whole frame. Since you are doing a remap, which blocks you transfer and how big the transfer is depends on the remap function you are doing. Final Questions After rereading your post, I'm curious why you are using remap for whole panorama. Is most of the remap a copy, or does most every pixel get shifted/warped relative to input? If you are primarily just appending input images together, you can use a DMA for all/most of the copy and that will be the fastest. + +As proposed, I copied LUT block in DDR to L2 using DMA. I didn't use pingpong buffer, but performance is double-graded. If I use ping/pong buffer, better result will be expected. To answer for your final questions, in my case, almost every pixel is warped into new position. So, I can't choose the way just copying image blocks. Thanks for response. + diff --git a/data2/text/range/0-5000/752472.txt b/data2/text/range/0-5000/752472.txt new file mode 100644 index 0000000000000000000000000000000000000000..5025a679e35f256ea15bf945baf64c0ac819e2a8 --- /dev/null +++ b/data2/text/range/0-5000/752472.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: how to recover from QSPI busy state + +Query Text: +Part Number: TDA2 Hello, In case of TDA2x QSPI is stalling due to busy status, how to return to non-busy staus by QSPI module configuration? I tried CM_L4PER2_QSPI_CLKCTRL.MODULEMODE = 0 (disable) then CM_L4PER2_QSPI_CLKCTRL.MODULEMODE = 1, but sometimes QSPI CS looks still in active state after this operation and still stalling... If you provide the right QSPI module reset procedure it is helpful. Regards, Takeo + +Responses: +Hello Takeo-san, The modulemode alone would not reset the internal module state. Is this condition (stalling busy) happening always (after every SPI transaction attempt) or randomly? Regards, Stan + +Also, BUSY bit is auto-clearing by hardware. Software reset of QSPI is not needed nor possible. BUSY sticked to 1 means issue with the SPI clock. One example could be missing or incorrect PCB routing of qspi1_rtclk. Kindly check the TRM chapter Quad Serial Peripheral Interface + diff --git a/data2/text/range/0-5000/752761.txt b/data2/text/range/0-5000/752761.txt new file mode 100644 index 0000000000000000000000000000000000000000..97f934946a9ceb5269e35d5f7d80541ef6fd57f4 --- /dev/null +++ b/data2/text/range/0-5000/752761.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: I can't find SFM_POSE.bin + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Single channel demos with HDMI input IMPORTANT NOTE: To demonstrate better output all single channel usecases that require HDMI input should use video clips mentioned in the table below. These clips are part of PROCESSOR_SDK_VISION_03.XX.XX.XX_INPUTS.tar.gz c: 1CH VIP capture (HDMI) + SOF (EVE1) + SFM (DSP1) + Display f: 1CH VIP capture (HDMI) + FrontCam Analytics 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx, EVEx) + Display (HDMI) SFM_POSE.bin - SFM (Usecase ‘c’) and EUNCAP demo (Usecase ‘f’) needs SFM_POSE.bin on the SD card. It is part of VISION_SDK_02.XX.XX.XX_INPUTS.tar.gz，but I can't find VISION_SDK_02.XX.XX.XX_INPUTS.tar.gz， + +Responses: +Hi @hua liu liu , VISION_SDK_02.XX.XX.XX_INPUTS.tar.gz can be found on CDDS here: https://cdds.ext.ti.com/ematrix/common/TIemxNavigator.jsp?objectId=28670.42872.37371.48714 (If you do not have access to CDDS, please contact your local TI FAE) Regards, Yordan + diff --git a/data2/text/range/0-5000/753138.txt b/data2/text/range/0-5000/753138.txt new file mode 100644 index 0000000000000000000000000000000000000000..19d2967676dba749b90c31d5e1e09b0b17f48793 --- /dev/null +++ b/data2/text/range/0-5000/753138.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: How CCS uses c++ to compile + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS 1、Using CCS8.2, create a new opencv project on the A15 module. When compiling, the following error occurs. How to solve it? C:/ti/ti_components/open_compute/opencv/opencv-3.1.0/include/opencv2/core/base.hpp:49:4: error: #error base.hpp header must be compiled as C++ # error base.hpp header must be compiled as C+ 2、Whether the opencv library can be used in the dsp module creation project, can provide the routines that opencv uses on dsp。 + +Responses: +Hi @hua liu liu , in ti_components\open_compute\opencv\opencv-3.1.0\docs there are instructions for cross compiling OpenCV (both for BIOS and Linux). Did you followed them? Regards, Yordan + diff --git a/data2/text/range/0-5000/753478.txt b/data2/text/range/0-5000/753478.txt new file mode 100644 index 0000000000000000000000000000000000000000..68507981ce244bbb72ec486ecdd76f566aa2065e --- /dev/null +++ b/data2/text/range/0-5000/753478.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TIDL SSD MODEL + +Query Text: +Part Number: TDA2 hi， Could you please share me with the TIDL ssd model formated as text t which can be imported into caffe framework and run normally ? As you can see the picture below,there is only the binary format of the ssd model and parameter, where is the text format of these two files ? Which files at the web link "https://github.com/tidsp/caffe-jacinto/tree/caffe-0.17/models/VGGNet/coco/SSD_300x300" I mean the two files "tidl_net_jdetNet_ssd.bin tidl_param_jdetNet_ssd.bin". Could we think of tidl_param_jdetNet_ssd.bin as caffemodel format file and the tidl_net_jdetNet_ssd.bin as prototxt file which shows the structure of the ssd net model？ Best, + +Responses: +tidl_net_jdetNet_ssd.bin tidl_param_jdetNet_ssd.bin are avialble binary format. Caffe-jacinto models can be found here github.com/.../JDetNet + diff --git a/data2/text/range/0-5000/753513.txt b/data2/text/range/0-5000/753513.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2471e8b2e5dcc534f707397378438b903525bf4 --- /dev/null +++ b/data2/text/range/0-5000/753513.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: The controller has detected a dead JTAG clock + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi i am using EVMx5777 board(TDA2x). but during debugging with emulator i found one error "The controller has detected a dead JTAG clock". i am using XDS560v2 STM emulator and CCS version 8.0. in the JTAG port i am using 60 PIN MIPI connector. please tell me how i can solve my this issue. + +Responses: +Hello, Can you try lowering the TCLK of your emulator? Try clocking down see if the error persists. If you are using adaptive clocking adapter try without it or setting the adaptive clocking setting in CCS as explained in this e2e: thanks, Alex + diff --git a/data2/text/range/0-5000/753578.txt b/data2/text/range/0-5000/753578.txt new file mode 100644 index 0000000000000000000000000000000000000000..aecad9acd9b7f2eaf578e21eca88fa7d0e9f65d9 --- /dev/null +++ b/data2/text/range/0-5000/753578.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: TDA2 Camera AVL + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We would like use 2M RGB-IR camera, OV2736 for TDA2 product development, but it is not in AVL. Please help me check it is available be supported by TDA2. If it is not be supported, please give me the 2M RGB-IR camera suggestion list and the latest of camera AVL for my reference. Thank you. Sidney + +Responses: +Hi Sidney, You could capture the camera output if it supports parallel output over discrete sync interface. But how do you process this RGB-IR output data? You will have write SW to process that data. Rgds, Brijesh + +Hi Sidney, I am closing the thread, since there is no reply. You could reopen it if you are still facing the issue. Regards, Rishabh + diff --git a/data2/text/range/0-5000/753603.txt b/data2/text/range/0-5000/753603.txt new file mode 100644 index 0000000000000000000000000000000000000000..f6fc63fdaae39ccb76ed10dbc0d36d5a59d70459 --- /dev/null +++ b/data2/text/range/0-5000/753603.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: A15 how to test CPU usage rate + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using SDK_VISION_03_04_00_00 i run my algorithm on a15 how to test CPU usage rate? BESTWISHES Shuai + +Responses: +Hi Shuai, in VisionSDK-Linux you would not be able to measure A15 by pressing 'p' as for the other cores. You can use any of the standard Linux tools (such as top, htop, vmstat ...). You can check this thread for more details: e2e.ti.com/.../709101 Regards, Yordan + diff --git a/data2/text/range/0-5000/753671.txt b/data2/text/range/0-5000/753671.txt new file mode 100644 index 0000000000000000000000000000000000000000..a3eff0ef804e73217dab77ae3413cb8e107a3449 --- /dev/null +++ b/data2/text/range/0-5000/753671.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE: Unaligned access in VCOP ST INTRLV operation + +Query Text: +Part Number: TDA2 HI, I have written a code in 16SIMD alignment , but while compiling the same on the simulator this warning comes EVE_1: Warning: Unaligned access in VCOP ST INTRLV operation the image resolution for which i have tested is 112x64. And because of this the output is not getting generated. Regards Surbhi + +Responses: +Surbhi, Half word interleave/de-interleave stores/loads must be word aligned ( that's the constraint with these instruction). Regards, Anshu + diff --git a/data2/text/range/0-5000/753691.txt b/data2/text/range/0-5000/753691.txt new file mode 100644 index 0000000000000000000000000000000000000000..bdd27776eb3a86aeef9e20a77935d6f6615fb6fe --- /dev/null +++ b/data2/text/range/0-5000/753691.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Why CPU utilization can't be improved anymore + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using SDK_VISION_03_04_00_00 i run my algorithm on a15 i test CPU usage rate by top . can CPU usage rate increase？ and make my algorithm fast. what is the nic 45% idle irq mean? thanks ! shuai + +Responses: +Hi Shuai, The CPU utilization depends on previous links connected to the A-15 link. If the link connected to the A-15 link sends data periodically and the A15 link is able to process the data before the next burst of data, then the CPU load will be limited. If a while loop is run in the link you will notice the A15 load also spike to 100%. Regards Shravan + +Hi Shravan i run the program in the main with out link. (sample_app\src\hlos\chains_common\chains_main.c) i do not call usecase. Regards shuai + +Hi Shuai, In an idle state the sample-app.out application runs nothing and thus the A15 load is almost 0% due to the application. You need to check what modifications you've made (most likely you're polling on the status of some content) which is causing the increased load. Regards Shravan + diff --git a/data2/text/range/0-5000/754133.txt b/data2/text/range/0-5000/754133.txt new file mode 100644 index 0000000000000000000000000000000000000000..286745907444f24ab19d89c3958b30650d47e7c7 --- /dev/null +++ b/data2/text/range/0-5000/754133.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS: Why IPC link drop the frames ? + +Query Text: +Tool/software: TI-RTOS Hello, What are possible reasons for dropping frames by IPC link ? Specifically, in my case IPC OUT link of EVE is dropping frames. Regards, Kajal + +Responses: +Any update? Regards, Kajal + +Which Processor are you using? Which SDK? + +PROCESSOR_SDK 3.0 Regards, Kajal + +And which processor are you using? + +Hello Yordan, I'm able to solve this issue. Regards, Kajal + diff --git a/data2/text/range/0-5000/754167.txt b/data2/text/range/0-5000/754167.txt new file mode 100644 index 0000000000000000000000000000000000000000..cd737181d5871d062f6fb4d496eebb4f3a304f95 --- /dev/null +++ b/data2/text/range/0-5000/754167.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2E-17: TDA2E-17 OSD + +Query Text: +Part Number: TDA2E-17 Tool/software: TI-RTOS Dear Sirs: In the DM81xx platform, there is a link SWOSD for the osd drawing inside the video. And specifically there is a library in M3 which can be used for OSD drawing inside the video with alphablending. According to this article: e2e.ti.com/.../893557 SWOSD in M3 is using a VCOP library to control it. Just want to ask: Is there any similiar library that can be called to draw osd in the video frame in TDA platform? Regards, /ckhsu + +Responses: +Hi hsu, There is no VCOP library on TDA platform. Rgds, Brijesh + +Hi Brijesh: Thank you for the reply. If there is no VCOP library in the TDA platform, is there any approach than can reach the same DMA copy with a specific transparent color/value as in the DM81xx platform? Or you can suggest me any approach that can achieve the same effect. Regards, /ckhsu + +Hi hsu, You could use display pipelines to do blending and transparency between two pipelines. Regards, Brijesh + +Hi Brijesh: Pipeline is only for display, what we want is not on the display screen, but in the captured video which would be then send to encode. Regards, /ckhsu + +Hi Hsu, You could use DSS Mem2mem path to get back the blended output from DSS into memory. This path need not be connected to the actual display. I think TDA2Ex has 4 pipelines, so you could use 2 for the actual display and other 2 with the WB pipelines to blend to video.. Regards, Brijesh + +Hi Brijesh: Thank you very much for pointing out this approach. This idea is quite fantasitic, and I think this is the best approach for us to do the same effect as in DM81xx. Sincerely, /ckhsu + diff --git a/data2/text/range/0-5000/754240.txt b/data2/text/range/0-5000/754240.txt new file mode 100644 index 0000000000000000000000000000000000000000..6c5e8232641d2a2f268eae11880fe61243f0aabb --- /dev/null +++ b/data2/text/range/0-5000/754240.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: How to utilize 4 EVE engine for TDA2 + +Query Text: +Part Number: TDA2 Hi team, My customer is evaluating TDA2 processor for a front camera application. The customer run Object Detection Usecase from Vision SDK. From the box this use case have 4 EVE cores utilized by 50-55% and give ~10fps. The customer have modified the usecase to use 2 EVE cores. The modified example utilizes 2 EVE cores by 98-100% and give same 10fps. How we can utilize 4 EVE cores by 100% and get 20fps? + +Responses: +Hi, Can you tell me which usecase are you using? As there is no object detection usecase which uses 4 EVEs. Is there any modification done on any usecase? We will be able to siggest better if you lets us know the usecase path and the modification done on that usecase. Regards, Anuj + +Hi, Its benn very long since any update on this issue, Is it still open? Regards, Anuj + diff --git a/data2/text/range/0-5000/754249.txt b/data2/text/range/0-5000/754249.txt new file mode 100644 index 0000000000000000000000000000000000000000..f153a3cb041b9310ecb926eeaae241f7a3d3986d --- /dev/null +++ b/data2/text/range/0-5000/754249.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Surround view projection on TDA2SX + +Query Text: +Part Number: TDA2 Hi team, My customer wants to use most powerful TDA2SX to combine frontcamera with sign/cars/object recognision and surround view application in one block. But they noticed that TDA2SX have no ISS block. The ISS block used to create projection for surround view application. Do we have a way to create surround view projection on TDA2SX? + +Responses: +Hi, ISS block is available only on TDA3x and TDA2Px. But you can use surround view application using the VIP capture. Please use below usecase. vision_sdk\apps\src\rtos\usecases\lvds_vip_sv_standalone Regards, Anuj + diff --git a/data2/text/range/0-5000/754589.txt b/data2/text/range/0-5000/754589.txt new file mode 100644 index 0000000000000000000000000000000000000000..117196751024c6e40f399b135019ec76a2a1d43d --- /dev/null +++ b/data2/text/range/0-5000/754589.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: "errors encountered during linking" When I call a filter in framecopy algorithm plugin + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I try to add a filter, "EVELIB_firFilter2D", in framecopy algorithm plugin in TDA2PX/vision_sdk/apps/src/rtos/alg_plugins/framecopy/frameCopyAlgoEve.c. I write a test code. But in the building process, I meet link error as below. If anybody can help? Thanks a lot! "/home/derek/TDA2PX/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/eve2/linker_cmd_eve2_debug.cmd", line 13: warning: no matching section warning: creating output section ".edmaUtilsMem" without a SECTIONS specification error: no valid memory range(null) available for placement of ".edmaUtilsMem" error: program will not fit into available memory. run placement with alignment fails for section ".edmaUtilsMem" size 0x2e4 page 0 "/home/derek/TDA2PX/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_debug.cmd", line 7: warning: no matching section "/home/derek/TDA2PX/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_debug.cmd", line 8: warning: no matching section "/home/derek/TDA2PX/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_debug.cmd", line 13: warning: no matching section + +Responses: +Hi, Can you share the changes which you have done for that link. Regards, Anuj + +Hi Anuj, Thanks for your reply. The following is my change in file vision_sdk/apps/src/rtos/alg_plugins/framecopy/frameCopyAlgoEve.c function Alg_FrameCopyProcess. char coeff[9] = {28, 28, 28, 28, 29, 28, 28, 28, 28}; uint8_t rndShift = 8; EVELIB_firFilter2D((UInt8 *)inputPtr, (wordWidth<<2), height, (wordWidth<<2), height, 1, (UInt8 *)outputPtr, (wordWidth<<2), height, (wordWidth<<2), height, 1, coeff, 3, 3, 1, 1, rndShift ); + +If there is any configure file or .cmd file need to change? + +Hi , Please add a section like below Program.sectMap[".edmaUtilsMem"] = "EVE1_DATA_MEM"; in \vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\eve1\Eve1.cfg Do the same for all other EVE cores also. Regards, Anuj + +Hi Anuj, It works. Thanks a lot! :) + diff --git a/data2/text/range/0-5000/754641.txt b/data2/text/range/0-5000/754641.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ca712703d3c3f20b8b351a6ea96e2bd5e368e03 --- /dev/null +++ b/data2/text/range/0-5000/754641.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: The main frequency of A15？ + +Query Text: +Part Number: TDA2 Tool/software: Linux i am useing tda2 evm , what is the frequency of A15？ sample_app\src\hlos\chains_common\chains_main.c in the main i move the usecase , read a img and run a cnn. There is no multithreading in CNN. In this case, is one A15 working or two A15 working at the same time? shuai + +Responses: +Hi, If you are running linux on A15 then it will always run 2 A15 in SMP mode. You can check the same by below command omapconf show opp Regards, Anuj + diff --git a/data2/text/range/0-5000/754643.txt b/data2/text/range/0-5000/754643.txt new file mode 100644 index 0000000000000000000000000000000000000000..257482d9404ef497889b74dc08d8222f88d3fd10 --- /dev/null +++ b/data2/text/range/0-5000/754643.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Performance comparison between A15 and C66 + +Query Text: +Part Number: TDA2 Tool/software: Linux i am useing tda2 evm ？ （sample_app\src\hlos\chains_common\chains_main.c ） in the main i move the usecase , read a img and run a cnn. There is no multithreading in CNN. use time is 1667ms. then i put the same cnn in (sample_app\src\rtos\alg_plugins\framecopy) done by dsp1 . buf cnn use is p_FRMem = (MVoid*)Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR, FR_MEM_BUF_SIZE, 32); this time use time is 6378ms ! A15 1667ms. and c66 6378ms. Is the result reasonable? Why C66 is so slow？how can it fast ? thanks! shuai + +Responses: +Hi, DSP clock is slow compared to A15. You can check the same by below command omapconf show opp Across what code are you measuring time. Check the time only to run CNN not for reading the image. Regards, Anuj + +Hi Anuj yes measuring time only the cnn part! clock is slow but I don't think the gap is so big. shuai + +Hi, It could be possible due to some other thread is running on DSP at the same time when you run cnn and due to task scheduling, time is increased. Regards, Anuj + diff --git a/data2/text/range/0-5000/754764.txt b/data2/text/range/0-5000/754764.txt new file mode 100644 index 0000000000000000000000000000000000000000..f362e80be35f022de5540c0316c6dd8384760e4b --- /dev/null +++ b/data2/text/range/0-5000/754764.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: TIDL File I/O Usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hey, I was able to import the tensorflow mobilenet model. Now I want to use the TIDL File I/O usecase to run the inference on the tda2x. I put the .pb files on the sd card and placed an image (.bng) that should be used for a simple classification in two classes 0,1 for cat or dog. The resulting Out.bin looks as follows. This does not show proper classification in 0,1. What am I missing? Is this usecase able to do this by just changing the net and params file and the config? best regards, nico + +Responses: + + +Hi, First check that, you are getting correct result (proper classification) while importing. Then you can check on the use case. Thanks, Praveen + +what do you mean by "while importing"? I´d like to run the inference in host emulation mode, but I can´t create eve_test_dl_algo.out.exe. When I run the gmake command to build it, it says "nothing to be done for all". Took me a while to get to this point since nowhere in the documentation is any information about the need of TIDLSRC to do this. I now tried it with TIDLSRC, but didn´t work either. Do you have any idea how I can create eve_test_dl_algo.out.exe? best regards, nico + +You need to use below command mentioned in section 3.5.2 (Building source in host emulation) in the user guide. gmake CORE=eve TARGET_PLATFORM=PC all Thanks, Praveen + +yes I know, that is what I meant above when I said I tried the gmake command, but it says nothing to be done for all. + +Okay then can you share screenshot of the build console to check this Thanks, Praveen + +Nicolas, Since we haven't heard back from you. I hope yoou could find solution for this. So closing the thread. + diff --git a/data2/text/range/0-5000/755210.txt b/data2/text/range/0-5000/755210.txt new file mode 100644 index 0000000000000000000000000000000000000000..78da91f839cc70b7839c7177abdd8672eb4b21b4 --- /dev/null +++ b/data2/text/range/0-5000/755210.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2PXEVM: How to use 2 ethernet mac port at same time in TI-RTOS(TDA2Px)? + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI-RTOS How to use 2 ethernet mac port at same time in TI-RTOS(TDA2Px)? Has TI got 2 ethernet mac port support in latest SDK? Our board is TDA2Px on TI-RTOS and SDK is [PROCESSOR_SDK_VISION_03_03_00_00] with one mac port(RMII1), but in chip manual it says there are 2 mac ports can be support, so we want to know how to use the two ethernet mac port at the same time and the download link for new SDK? document TDA2Px SoC for Advanced Driver Assistance Systems (ADAS) Silicon Revision 1.0 26.11.4.2 GMAC_SW Ports Ethernet Subsystem has three Ports. Port 0 is the Host port (internal to the Subsystem). Ports 1 and 2 are the external ports connected to G/MII, RGMII, or RMII interfaces as per the interface selected. Naming conventions followed in this chapter: • Port0 is referred to the Host Port • Port1 is referred to the interfaces GMII0/RGMII0/RMII0 • Port2 is referred to the interfaces GMII1/RGMII1/RMII1 + +Responses: +Hi Mi Zhou, The dual Ethernet port facility will be made available in a subsequent release of PROCESSOR_SDK_VISION. In the mean time, can you please let me know what exactly will be the usage of dual Ethernet ports in your application? If it turns out to be a solvable issue with the current setup, I might be able to help you. In that case, you wouldn't have to wait for the release. Regards, Anand M + +Hi Anand When could you release the PROCESSOR_SDK? We need to use both the two mac port, one for video data and another for debug data, both of two cost large data transparent. also they need full IP-Stack support(both UDP and TCP) It seems [PROCESSOR_SDK_VISION_03_03_00_00] can not support the request, so I need your new SDK. + +Hi Mi Zhou, The dual Ethernet Port feature will be made available on the next release of PROCESSOR_SDK_VISION. It will be released by mid January. Is there anything more I can help with? Regards, Anand + +OK Thanks. + diff --git a/data2/text/range/0-5000/755275.txt b/data2/text/range/0-5000/755275.txt new file mode 100644 index 0000000000000000000000000000000000000000..f5ae5354e38e467fc02a1a6ebe86328fb6f62036 --- /dev/null +++ b/data2/text/range/0-5000/755275.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: How to make changes in algorithm kernel work? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I change kernel code in ti_components/algorithms/eve_sw_01_19_00_00/kernels/imgsiglib/Filter/src_kernelC/vcop_filter_kernel.k file and build successfully. I checked the built file ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/debug/libevekernels.eve.lib, and it is updated. After that, I build with "make -s -j depend" and "make -s -j" successfully. But the changes in kernel doesn't work. The result is the same as before. How can I make the change in kernel work? Thanks! BRs Derek Yang + +Responses: +Find I change wrong function. :( + +Hi Derek, I am glad to hear that the issue is resolved and thanks for updating the thread! Regards. Yordan + diff --git a/data2/text/range/0-5000/755644.txt b/data2/text/range/0-5000/755644.txt new file mode 100644 index 0000000000000000000000000000000000000000..1d771f2f02b58261eb99557fd501b2c8dbbfac8b --- /dev/null +++ b/data2/text/range/0-5000/755644.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: System-link Buffer issue in VSDK3.04, Getting NULL pointer in "bufAddr[0]" + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I’m in the process of migrating my application running on TDA2x EVM, from VSDK3.03 to VSDK3.04. In brief, I have a chain running as shown: Null_src (A15-Linux) -> ALg_link(EVE) -> Null_sink (A15-Linux) While trying to get the input buffers in Null_sink from the Alg link (EVE), using “System_getLinksFullBuffers”, I’m observing that the bufAddr[0] in the System_VideoFrameBuffer received are pointing to Null. I’m using buffers in in-place mode. The same application is working well under VSDK3.03, however when it is built under VSDK3.04, this issue is seen. Can you please provide your inputs to resolve this issue. Thanks in advance, Regards, Ranjith Bhide + +Responses: +Hi, Can you please check the bufType of the buffer got from System_getLinksFullBuffers in NULL_Sink link. Inside your alg link running on eve, just check the bufaddr when you receive the input and check the same when you send that buffer. Is the alg link is yours or TI? Regards, Anuj + +Hi Anuj, Thanks for the response. This cause of the issue was found. There is a new member variable "hlosTranslationDisable" added to structure System_Buffer, which needs to be initialized to FALSE during init. Failing which the Physical-Virtual address translation was not happenning which was causing this issue. After setting the hlosTranslationDisable field as FALSE for all the system buffers the issue was resolved. Regards, Ranjith Bhide + diff --git a/data2/text/range/0-5000/755699.txt b/data2/text/range/0-5000/755699.txt new file mode 100644 index 0000000000000000000000000000000000000000..89463e397a22df05b97b181562ff6ae871161f48 --- /dev/null +++ b/data2/text/range/0-5000/755699.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Vision_sdk compile error + +Query Text: +Part Number: TDA2 Hello: The error info is below, I could not find TI_OD_VISION_FXNS anyway. Where can I find "TI_OD_VISION_FXNS" or which lib may be missed? regards # Linking into /home/test/vision_sdk/binaries/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_debug.xe66... undefined first referenced symbol in file --------- ---------------- TI_OD_VISION_FXNS /home/test/vision_sdk/binaries/lib/tda2xx-evm/66/debug/vision_sdk_alg_plugins.ae66 error: unresolved symbols remain error: errors encountered during linking; "/home/test/vision_sdk/binaries/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_debug.xe66" not built make[4]: *** [/home/test/vision_sdk/binaries/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_debug.xe66] Error 1 make[3]: *** [apps] Error 2 make[2]: *** [apps] Error 2 make[1]: *** [vision_sdk_apps] Error 2 make: *** [vision_sdk] Error 2 + +Responses: +Hi Bin Ye, which version is your VisionSDK and what changes you made? Regards, Yordan + +Hi Bin Ye, For "TI_OD_VISION_FXNS" - please grep inside vision_sdk/apps/src/rtos/alg_plugins/objectdetection folder And for library, Could you check inside the object_detect_PATH set in tools_path.mk file (under vision_sdk/build folder like below) ? object_detect_PATH ?= $(TI_SW_ROOT)/algorithms/REL.200.V.OD.C66X.00.06.02.00/200.V.OD.C66X.00.06 Regards Surya + +We have found lib configuration in rules_66.mk as the vision is 2.x, thanks.^_^ + diff --git a/data2/text/range/0-5000/755758.txt b/data2/text/range/0-5000/755758.txt new file mode 100644 index 0000000000000000000000000000000000000000..e79acd2f18bfcc4b85652dc1e72e33453a371828 --- /dev/null +++ b/data2/text/range/0-5000/755758.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: HDMI 1080p@60Hz capture doesn't work + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I have one question about VSDK 03.02 linux version. I'm wondering if the HDMI 1080p 60Hz capturing is works well when " tda2xx_evm_linux_all" configuration is used. When I tried to do test with "tda2xx_evm_bios_all" configuration, I could see the screen well. Of course, I set the capture source with "HDMI Capture 1080P60" and set the display device as HDMI 1080p from System Setting menu. Please let me know if I do something more. Thanks, BR, Ungsin + +Responses: +Hi Ungsin, HDMI Capture is not supported in Linux version. Please check vision_sdk/docs/VisionSDK_ReleaseNotes.pdf for which usecases are supported in Bios or Linus variants. Regards, Yordan + diff --git a/data2/text/range/0-5000/755770.txt b/data2/text/range/0-5000/755770.txt new file mode 100644 index 0000000000000000000000000000000000000000..9bb3256714a3a3d72e56952656cf79f27b07aee8 --- /dev/null +++ b/data2/text/range/0-5000/755770.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: Number of cores + +Query Text: +Part Number: TDA2 Hi Sir, I want to know how many cores are there in the TDA2xx SoC? As per my knowledge, A15(MPU_0 or a0), M4(IPU_0 or m0), M4(IPU_1 or m1), 2 DSP cores, 4 EVE cores. I am right.? Thanks in advance! Regards, Sagar K + +Responses: +Hi Sagar, It depends on the part that you are using. Superset part has the configuration you mentioned. See www.ti.com/.../products.html for details. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh, I know that it is TDA2xx but how can I know last XX digit? Like TDA2HG, TDA2HX etc among all these which one I am using how could I know that? Based one last XX I will get to know how many cores are inside. Am I right? Is there written on the SoC? Thank You, Sagar + +Hi Sagar, You can know this information by reading CTRL_WKUP_STD_FUSE_DIE_ID_2[31:24]. Please refer to Data Manual for TDA2xx for all the possible values and their meanings. Regards, Rishabh + +Hi Rishabh, As per your reply, I got these value in CTRL_WKUP_STD_FUSE_DIE_ID_2[31:24] register and referring Data Manual I didn't find any match value. As per the values please let me know which device I am using. Thank You, Sagar K + +Hi Sagar, This is a pre production super set device. Hence you see 0x3F as the value. For production parts this value will be e-fused correctly. Regards, Rishabh + +Hi Rishabh, So, how can I find it that which super set it is? Regards, Sagar + +Hi Sagar, It will match TDA2SXx. Regards, Rishabh + diff --git a/data2/text/range/0-5000/755962.txt b/data2/text/range/0-5000/755962.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a2e5907b1a1f50bfb354887f32674c0a1e72571 --- /dev/null +++ b/data2/text/range/0-5000/755962.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS/TDA2: Vision SDK 3.5 using multicoreimagegen tool happen Segmentation fault error. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi expert: I am using Vision SDK 3.5 BIOS version test power consumption. I compile the SDK at linux environment. After i use #make -s allcores at /pdk_01_10_01_06/packages/ti/build/ folder generate all PM-CORE_loading application. I want to combine all image to one APPimage at SD card. If i just use 10 file i can successful generate the image. If i use 11 file Multicoreimagegen tool at /sbl_auto/tools/v1/ folder happen segmentation fault. Could you please help me check this problem? Best Regards! Han Tao /work/vsdk/sdk305/ti_components/drivers/pdk_01_10_01_06/packages/ti/binary/pm_core_loading_app/bin/tda2xx-evm$ ./MulticoreImageGen LE 55 AppImage_LE 0 pm_core_loading_app_a15_0_release.rprc 2 pm_core_loading_app_ipu1_0_release.rprc 3 pm_core_loading_app_ipu1_1_release.rprc 5 pm_core_loading_app_ipu2_0_release.rprc 6 pm_core_loading_app_ipu2_1_release.rprc 8 pm_core_loading_app_c66xdsp_1_release.rprc 9 pm_core_loading_app_c66xdsp_2_release.rprc 10 pm_core_loading_app_arp32_1_release.rprc 11 pm_core_loading_app_arp32_2_release.rprc 12 pm_core_loading_app_arp32_3_release.rprc 13 pm_core_loading_app_arp32_4_release.rprc Number of Input Files 11 Segmentation fault (core dumped) + +Responses: +Hi Tao, Are you running this on Ubuntu 18.04? If yes can you please try the same on Ubuntu 14 or Ubuntu 16. Regards, Rishabh + +Hi Rishabh: Thanks for your quickly feedback. My PC is Ubuntu 12.04. I have copy all .rprc file to windows and use windows tools generate the 11 file's image. It did not work too. Which version of Ubuntu used at your side? I will try to install the same version of Ubuntu as you and try it again. Best Regards! Han Tao + +Hi Tao, This is actually a Multicore Image Generator Tool limitation. In PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\boot\sbl_auto\tools\multicore_image_generator\v2\MulticoreImageGen.c, MAX_INPUT_FILES is defined as 10. Can you please update this macro and generate an executable for multicore image generator tool using gcc. We will fix this in next release. Regards, Rishabh + +HI Rishabh: I change the macro to 12 and Delete MulticoreImageGen.c line 140 debug_printf(). Use Gcc compile this file it can use 11 rprc file. Now just A15-0/IPU1-0/IPU1-1/DSP-1/DSP-2/EVE1 working. IPU2-0/IPU2-1/EVE2/EVE3/EVE4/A15-1 can not run the simulate loading. Believe this problem can be set resolve and waiting you next release. Best Regards! han tao + +Hi Tao, What change did you need for debug_printf? Regards, Rishabh + +Hi Rishabh： directly compile this file have error： so I just delete this line to make the compile can work. Best Regards! han tao gcc -o MulticoreImageGen MulticoreImageGen.c MulticoreImageGen.c: In function ‘main’: MulticoreImageGen.c:140:58: error: macro "debug_print" passed 2 arguments, but takes just 1 debug_print("Number of Input Files %d\n",num_input_files); ^ MulticoreImageGen.c:140:2: error: ‘debug_print’ undeclared (first use in this function) debug_print("Number of Input Files %d\n",num_input_files); ^ MulticoreImageGen.c:140:2: note: each undeclared identifier is reported only once for each function it appears in + +Hi Tao, You are referring to V1 version. V2 version already uses printf for this particular print statement. We will update this as well. Regards, Rishabh + +Hi Rishabh: I use V1. at readme.txt said that V2 used for TDA3x and V1 used for TDA2x. So I use V1 generate tools. Best Regards! Han Tao + +Hi Tao, I am closing the thread as issue has been resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/756338.txt b/data2/text/range/0-5000/756338.txt new file mode 100644 index 0000000000000000000000000000000000000000..19d6d84ff074c69ee1a1e1490941894bc4b5df99 --- /dev/null +++ b/data2/text/range/0-5000/756338.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Error while running Object Detection use case in hlos + +Query Text: +Part Number: TDA2 Hello Everyone, I ran the use case of object detection in single camera in hlos and I got the following error: [HOST] [HOST ] 439.307417 s: [HOST] [HOST ] 439.307448 s: [HOST] [HOST ] [HOST] [HOST ] Select use-case options, [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: Enable Pedestrain Detect (PD) [HOST] [HOST ] 2: Enable Traffic Sign Regonition (TSR) [HOST] [HOST ] 3: Enable Vehicle Detect (VD) [HOST] [HOST ] 4: Enable PD+TSR+VD [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [IPU2 ] 450.403403 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 450.403800 s: CAPTURE: VIP2 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [IPU2 ] 450.403952 s: captdrv/src/vpsdrv_capturePriv.c @ Line 266: [HOST] [IPU2 ] 450.404044 s: Invalid number of streams(0) - Supported max streams 8 [HOST] [IPU2 ] 450.404135 s: Assertion @ Line: 548 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! I request you to help me in resolving this issue. Best Regards, Vijay + +Responses: +Hi, Please don't create duplicate thread. I am already looking into below thread and will provide response there Please close this thread. Regards, Anuj + +Hello Yordan/Anuj, I was able to resolve the issue.I added code for setting capture parameters for CHAINS_CAPTURE_SRC_OV490 in chains_common.c under vision_sdk/apps/src/hlos/common.I am able to do object detection and my use case detects pedestrian,vehicle and traffic signs in hlos. But the object detection stops after sometime with the following error messages displayed continuously in the terminal: SYSTEM: IPC:[DSP1] Notify recvfrom failed !!! SYSTEM: IPC:[DSP1] Notify recvfrom failed !!! SYSTEM: IPC:[DSP1] Notify recvfrom failed !!! SYSTEM: IPC:[DSP1] Notify recvfrom failed !!! I request you to resolve this issue. Best Regards, Vijay + +Hi, After how long you observed this issue? Have you made any changes in any link or the usecase ported from RTOS. Even after getting this log whats the effect on running the usecase? I will suggest to please recheck your changes and try a clean build. Regards, Anuj + +Hello Anuj, The duration was random.When the error occured the display turned green.But during my last data collection activity(I modified the chain for storage of video to a file) there was no error.We can close this thread for now.I hope I don't get this error again. Best Regards, Vijay + +Hi, Thanks for the information. Please verify the answer and close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/756492.txt b/data2/text/range/0-5000/756492.txt new file mode 100644 index 0000000000000000000000000000000000000000..686693c13ca26fc0cebd0ad643ba40d277be1d6f --- /dev/null +++ b/data2/text/range/0-5000/756492.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2: Bsp_deviceRead8 on serializer(UB913) fails with timeout. + +Query Text: +Part Number: TDA2 On my custom HW setup, TDA2X EVM + UB914DES <--> UB913SER + AR0132 Vision SDK 3.03 Communication with Serializer seems to be failing always: [IPU1-0] 9.936375 s: CHAINS: Sensor create in progress [IPU1-0] 9.936558 s: VIDEO_SENSOR: INST1 : I2C1 : I2C Addr = 0x10 [IPU1-0] 9.938052 s: Read8 I2C1: DEV 0x6c: RD 0x06 = 0xb0 [IPU1-0] 9.938418 s: Write8 I2C1: DEV 0x6c: WR 0x01 = 0x04 [IPU1-0] 9.939028 s: Write8 I2C1: DEV 0x6c: WR 0x03 = 0xed [IPU1-0] 9.940065 s: Write8 I2C1: DEV 0x6c: WR 0x06 = 0xb0 [IPU1-0] 9.941377 s: Write8 I2C1: DEV 0x6c: WR 0x07 = 0xe8 [IPU1-0] 9.942017 s: Write8 I2C1: DEV 0x6c: WR 0x08 = 0x30 [IPU1-0] 9.942993 s: Write8 I2C1: DEV 0x6c: WR 0x10 = 0x20 [IPU1-0] 9.944000 s: Write8 I2C1: DEV 0x6c: WR 0x1f = 0x12 [IPU1-0] 9.945068 s: Read8 I2C1: DEV 0x6c: RD 0x06 = 0xb0 [IPU1-0] 9.946501 s: Read8 I2C1: DEV 0x6c: RD 0x07 = 0xe8 [IPU1-0] 9.947081 s: Read8 I2C1: DEV 0x6c: RD 0x1c = 0x03 [IPU1-0] 10.558561 s: src/bsp_deviceI2c.c @ Line 386: [IPU1-0] 10.558683 s: I2C1: DEV 0x74: RD 0x06 ... ERROR !!! [IPU1-0] 10.558775 s: src/bsp_deviceI2c.c @ Line 412: [IPU1-0] 10.558897 s: I2C1: Error timeout 611 ms!!! [IPU1-0] 10.558988 s: src/bsputils_lvds.c @ Line 1083: [IPU1-0] 10.559080 s: device address - 74 i2c error - -21 Any reasons as to why such a timeout occurs in Bsp_deviceRead8 ? Regards, Vivek + +Responses: +Hi Vivek, From the log it shows that you are trying to configure the serializer1 connected on the lvds interface. the file from where the error is generated is \packages\ti\drv\vps\examples\utility\src\bsputils_lvds.c This may not be connected on your custom board and check what sensors you need to configure. Can you check on this? Regards, Prasad + +Hi Vivek, We have not heard back from you. Hope you were able proceed further. Regards, Prasad + +Custom HW is just : UB913SER + AR0132 Tda2x evm + MULTIDES is standard hardware We are still not able to understand why the i2c reads are timing out. + +Hi Vivek, Check the I2C address of the sensor, are you able to talk to UB913? Regards, Sujith + +Hi Sujith, I have not been able to talk to UB913. Whan I read the 0x1C General Status of Deserializer, it indicates Signal detect bit is set for serial input. That is the closest. I tried the same with i2c_utility. Regards, Vivek + +Okay, please check if the UB913 is powered up, use a scope and check please. Regards, Sujith + +Sujith, Cannot use scope on the UB913 since its a closed camera housing. Another piece of information which might help is, The same camera with the same set of required code modification is working fine on Vision SDK 2.09 version. Is there any change in Camera power up / bring-up sequence in newer vision SDK, or in Pin Mux Settings? Regards, Vivek + +Hi Vivek, If the sensor is working in 2.9, can you enable I2C debug flag before the sensor config and disable after that? This should print all the I2C transaction happening. You can compare this with latest version. You can enable using the API Bsp_deviceI2cDebugEnable(). Regards, Prasad + +Prasad, Did that already, no difference between working and non-working set of Read/Writes to configure Deserializer. I2C Transactions are same until write to serializer to reset happens and reading the same leads to timeouts. Regards, Vivek + +Any further Pointers ? Prasad Konnur / Sujith + +Hi Vivek, Can you please list the changes that you had to do get it going on VSDK 2.9. Regards, Sujith + +Sujith, Below is short indicator of files modified: 1. In bsputils_lvds.c a. SER & DES addressing b. gI2cExpParams c. gAR0132DesParams 2. bsp_boardTda2xx.c Not sure If I can share exact customer code. Regards, Vivek + +Hi Sujith / Prasad Konnur We seem to have found the issue. It was with the way IO expander configurations on multi-deserializer are done. I think it has been cleaned up from Vision SDK 2.9 to 3.3. We were missing this Thanks and Regards, Vivek + diff --git a/data2/text/range/0-5000/756823.txt b/data2/text/range/0-5000/756823.txt new file mode 100644 index 0000000000000000000000000000000000000000..0a0aff863723e7d40fb3c82ca2e669eeddf115e2 --- /dev/null +++ b/data2/text/range/0-5000/756823.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: genereate inHeader(.hdr) file + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I'm using TDA2x to run the usecase null Src Dec Display and TIDL Object detection using my own input data, every time I run the usecase I got the Decode Error, after reading some other threads from this forum, I noticed that my hdr file contains only zeros which probably cause the Decode Error.(Part of the error is shown below) [IPU1-0] 29.926554 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 29.926645 s: DEC_LINK: Sequence called number 1 [IPU1-0] 29.959403 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 29.959525 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 29.959616 s: DEC_LINK: Sequence called number 2 The OS I'm using is Win7 and I compiled my VSDK using MAKECONFIG=tda2xx_evm_bios_all, I download a sizeBin.exe from other thread but it's not working, so how can I generate my own input data to get the usecase to work? Thanks~! + +Responses: +Hi Lyra, can you share how you generated the header file? Also please check if this post can help you: e2e.ti.com/.../2401993 Regards, Yordan + +Hi Yordan, I found out what's wrong and I've got solution. Thanks for your reply. Just remove the string " size=" from the size_extracted.txt and then generate the .hdr + diff --git a/data2/text/range/0-5000/756974.txt b/data2/text/range/0-5000/756974.txt new file mode 100644 index 0000000000000000000000000000000000000000..638777783340d9086aed3f6f3253d866711ab465 --- /dev/null +++ b/data2/text/range/0-5000/756974.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: TDA2 utils_dcan question + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, we use utils_dcan in SDK_VISION_03_04 and found something strange. we connect our device to the car with OBD connector, we want to read the velocity. the symptom is sometimes we can read the velocity and sometimes we can not read the velocity. and when we can not read, we need to restart the device and re-connect to the car. after some tests, we found the period call function still post event, but this event seems not trigger Utils_dcanTxTsk to send the read command. could you please help to give some hints or possibility to cause this symptom Thanks~~~ + +Responses: +Hi Markii, I have few questions of this sentence 'after some tests, we found the period call function still post event, but this event seems not trigger Utils_dcanTxTsk to send the read command.' 1. Are these number of successful tests before seeing failure point same for each run? 2. This send command is actual a CAN message, right? So you seeing failure with CAN message transmission. Can you explain about the transactions happening in your CAN network? Like general flow of messages. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek, we enable periodic Tx and set txMsgPeriod_ms as 500 in dcanConfig. normally, we can get velocity every 500ms (Utils_dcanPrdCalloutFcn would do Event_post every 500ms, after event post we can read velocity from RxTsk) but sometimes we can not read the velocity suddenly (previous 500ms is ok), and if this symptom happened, we need to restart our device and re-connect to the car (unplug the connector and plug) we trace the source code and found the Utils_dcanPrdCalloutFcn still post event every 500ms, but the Utils_dcanTxMsg did not finish. and hang on Utils_dcanWaitForTxComplete. this symptom happen very often, we do not know why, could you please help to give us some advisement. Thanks~~ + +Hi Markii, By default automatic re-transmission is disabled in the DCAN demo. Can you please 'pDcanCfgPrms->autoRetransmitDisable' change from 'TRUE' to 'FALSE' in 'utils_dcan.c' file and re-try this application? Looks like your transmission is failing and transmission failing condition is not handled in the app. By enabling re-transmission, CAN controller will keep sending failed message until it succeeds. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/757822.txt b/data2/text/range/0-5000/757822.txt new file mode 100644 index 0000000000000000000000000000000000000000..289b0012b10b045b0024a4361a961451da1e214d --- /dev/null +++ b/data2/text/range/0-5000/757822.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: Does dmaSwMs link supports resizing and then display frame? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I want display two different frames at a time using dmaswms link. I observed that, dmaswms link crops the frame as per given parameter and then displays cropped frame. But I want to display a resized frame. So, does dmaSwMs link supports resizing and then display frame? Currently parameters are set as, Alg_swmsPrmObj->maxOutBufWidth = 1920; Alg_swmsPrmObj->maxOutBufHeight = 1080; Alg_swmsPrmObj->numOutBuf = 5; Alg_swmsPrmObj->useLocalEdma = FALSE; Alg_swmsPrmObj->initLayoutParams.numWin = 1; Alg_swmsPrmObj->initLayoutParams.outBufHeight = 1920; Alg_swmsPrmObj->initLayoutParams.outBufWidth = 1080; Alg_swmsPrmObj->initLayoutParams.winInfo[0].chId = 0; Alg_swmsPrmObj->initLayoutParams.winInfo[0].height = 500; Alg_swmsPrmObj->initLayoutParams.winInfo[0].width = 500; Alg_swmsPrmObj->initLayoutParams.winInfo[0].inStartX = 0; Alg_swmsPrmObj->initLayoutParams.winInfo[0].inStartY = 0; Alg_swmsPrmObj->initLayoutParams.winInfo[0].outStartX =100; Alg_swmsPrmObj->initLayoutParams.winInfo[0].outStartY =100; Regards, Kajal + +Responses: +Hi Kajal, You can resize using the display link and then use that as a input for SwMs. Which use case are you trying to run? You can see \apps\src\rtos\usecases\lvds_vip_multi_cam_view_tda3xx\chains_lvdsVipMultiCam_Display_tda3xx.c as an example. Regards, Rishabh + +Hello Rishab, As per my knowledge, vpe link do resizing. How to do resizing with display link? Also dmaswms link requires input as composite buffer. Regards, Kajal + +Hi Kajal, Both VPE and DSS can do the scaling. In display link you need to set a different tarWidth and tarHeight for scaling. Regards, Rishabh + +Hello Rishabh, You : You can resize using the display link and then use that as a input for SwMs. >>1. What about dmaSwMs link, because it requires composite buffer as input. 2. Display cannot outputs any buffer, the how come output of display link will goto dmaSwMs link? Also suggested use case by you ( \apps\src\rtos\usecases\lvds_vip_multi_cam_view_tda3xx\chains_lvdsVipMultiCam_Display_tda3xx.c) doesn't have scenario where resized output by display is given to dmaSwMs link. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// You: In display link you need to set a different tarWidth and tarHeight for scaling. >>Setting tarHeight and tarWidth parameters of display link doesn't give me resized frame. Regards, Kajal + +Hi Kajal, I meant DSS M2M WB link. Can you try to set different output width & height? One example is setting pPrm->chParams[chId].outParams[0].width in PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\usecases\lvds_vip_multi_cam_view\chains_lvdsVipMultiCam_Display.c Regards, Rishabh + +Hello Rishabh, One example is setting pPrm->chParams[chId].outParams[0].width in PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\usecases\lvds_vip_multi_cam_view\chains_lvdsVipMultiCam_Display.c >>This parameter is set for vpe link. I am working for single channel camera. First using VPE link we need to resize frame and then give it to swms link and then display link . This flow works for me. Thank you for your suggestions! Regards, Kajal + +Hi Kajal, Glad that your issue is resolved. Please mark the posts that help you to resolve the issue as "This resolved my issue". Regards, Rishabh + diff --git a/data2/text/range/0-5000/758034.txt b/data2/text/range/0-5000/758034.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2604d94408869965c59c31722df1a4e22c88c84 --- /dev/null +++ b/data2/text/range/0-5000/758034.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: EDMA3 read qspi flash + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS on TDA2S ,run RTOS, i want to use edma read qspi flash , i remap flash to 0x5C000000, used Utils_dmaCopy1D function to read flash, but read some datas is error , all error data is 0,i use pc read（memcpy) is all right, what is wrong with this? + +Responses: +Hi, You can use System_qspiReadSector API present in PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\links_fw\src\rtos\utils_common\src\utils_qspi.c. Regards, Rishabh + +HI thanks your reply, System_qspiReadSector is not used EDMA, i want to use edma, + +Hi i found mlo use QSPI_ReadSectors_edma read qspi flash ,and i compare the QSPI_ReadSectors_edma() and Utils_dmaCopy1D, these two functions have little difference , how can i used QSPI_ReadSectors_edma in appliation level? + +Hi, For EDMA you can refer to API Utils_qspiReadSectorsEdma in PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\links_fw\src\rtos\utils_common\src\tda3xx\utils_boot_slaves.c. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/758118.txt b/data2/text/range/0-5000/758118.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b48e6c78cab6ec93ae5f57de6c80b9e266c2249 --- /dev/null +++ b/data2/text/range/0-5000/758118.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: Core clock initialization + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, In VSDK3.3 example program "apps", I can not find clock initialization. In BIOS configuration script BIOS.cpuFreq is set to 750MHz, and in the C files I can only find program reads this configuration(by call BIOS_getCpuFreq), but program setting PRCM registers can not be found. So how is each core clock initialized? Thanks®ards. + +Responses: +Hi Yang, PRCM is configured by SBL using PM HAL library APIs. You need to see PROCESSOR_SDK_VISION_03_03_00_00\ti_components\drivers\pdk_01_09_00_17\packages\ti\boot\sbl_auto\sbl_app\src\tda2xx\sbl_tda2xx_main.c and see DPLL calls. Regards, Rishabh + +Hi Rishabh, OK. So BIOS.cpuFreq in BIOS configuration script is only used to tell OS that the core clock frequency configured by SBL, am I right? + +Hi Yang, BIOS.cpuFreq in BIOS configuration script is used to tell the particular CPU's frequency to the OS. It can be configured by anyone, in this case it is configured by SBL. Regards, Rishabh + +Hi Rishabh, OK. Thank you! + +Hi Yang, I am closing the thread as issue has been resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/758161.txt b/data2/text/range/0-5000/758161.txt new file mode 100644 index 0000000000000000000000000000000000000000..9962698b6088f0dcc2a76af043bdca1023323614 --- /dev/null +++ b/data2/text/range/0-5000/758161.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS/TDA2: Understanding of statistics shown by GRPX : CPU loads + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I have some queries regarding utilization of each processor/CPU in % given by statistics. 1. On what basis that % count is decided for a processor? 2. Except processing a frame , what else particular CPU do ( to increase % utilization )? 3. What is mean by each term, below highlighted part ? [IPU1-0] 67.555725 s: CPU [EVE1 ] Statistics, [IPU1-0] 67.555786 s: ************************* [IPU1-0] 67.555847 s: [IPU1-0] 67.555908 s: LOAD: CPU: 26.3% HWI: 1.5%, SWI:0.2%, Low Power: 63.5% [IPU1-0] 67.556091 s: [IPU1-0] 67.556152 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 24.4% [IPU1-0] 67.556243 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 67.556335 s: Regards, Kajal + +Responses: +Hi Kajal, CPU load is decided on basis of time when CPU is processing data vs the idle time. Total CPU utilization can be increased by adding any extra processing that you might need for your use case. It can be as simple as a CPU memcpy. Total CPU utilization is sum of HWI+SWI+SYSTEM_TSK_MULTI_MBX+MISC. Low power percentage is amount of time a particular CPU spends in low power mode. Hope this clarifies. Regards, Rishabh + +Thank you Rishabh for clear explanation. May I know meaning of HWI+SWI+SYSTEM_TSK_MULTI_MBX+MISC. Do we have any reference document for these terms? Regards, Kajal + +Hi Kajal, You can find HWI and SWI in bios documentation (search in All Modules in cdoc). SYSTEM_TSK_MULTI_MBX is defined in links_common. You can search the code to how it is used by IPC. MISC are miscellaneous tasks. Regards, Rishabh + +Hello Rishabh, In my 2nd query i.e 2. Except processing a frame , what else particular CPU do ( to increase % utilization )? I meant including processing a frame what else a processor do? so that it's utilization is increases. Regards, Kajal + +Hi Kajal, You can start more tasks on a processor to increase the utilization. You need to keep in mind that power will increase with increase in CPU load. Hope this helps. Regards, Rishabh + +Hi Rishabh, I mean in opposite way ( I don't want to increase utilization rather why it gets increase is my query). For Example. 1. capture -> alg1( EVE1) -> Display In this use case it is taking 20% EVE1 utilized . ---------------------- 2. Capture -> Dup Dup->alg1(EVE1)->Merge Dup->alg2(EVE2)->Merge->sync->Display In this use case it is taking 45% EVE1 utilized . ---------------------- I found difference in utilization( although both EVEs processing a frame, just chain structure is different). So my query is, except frame processing what else processor( EVE1 in above example) do? Hope this clarify my query. Regards, Kajal + +Hi Kajal, You can print statistics using "p" while running both use cases and find the tasks that are using EVE1 and compare. Regards, Rishabh + +Thank you for the information. Regards, Kajal + +Hi Kajal, Closing the thread as issue has been resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/758164.txt b/data2/text/range/0-5000/758164.txt new file mode 100644 index 0000000000000000000000000000000000000000..6fb4223c2aee5023ff96f2a9a5d22fb2c32ba174 --- /dev/null +++ b/data2/text/range/0-5000/758164.txt @@ -0,0 +1,30 @@ +Ticket Name: TDA2: Model import and inference on TDA2XX + +Query Text: +Part Number: TDA2 Hi, I have designed and trained my own model which is a classifier plus Jacinto SSD to detect cats & dogs in images. Following are the model's details: 1. Input resolution: 512 x 512 2. Number of layers: 50 [I have verified that configurations to all layers are within the limits mentioned in TIDeepLearningLibrary_UserGuide.pdf ] 3. Total GMACs: 1.1497 4. Processor Vision SDK version: 03.05 5. Number of classes: 2 [Cat & Dog] I can perform Caffe inference using this model on PC and the output is as expected. However, once model is imported successfully using Import Tool; it inferences erroneously on TDA2XX using TIDL OD library. I observe too many false positives. I can only see dog is getting detected NOTE: Visualisation script experienced invalid co-ordinates for detected objects. I have attached below files from my end. Please look into these and share your inputs to rectify object detection outputs. deploy.prototxt Import Config.txt [ Import Configuration File] Import Logs.txt dog_512x512.y [Input Image] cat_dog_ssd120000.caffemodel NET_OD.BIN PRM_OD.BIN Regards, Premchand Cat_Dog_SSD.zip + +Responses: +Hi, To add, the model was trained using Caffe Jacinto framework. Please find additional attachments as follows: Cat_Dog_Inference_Desktop.mp4 [Model inference using Caffe on the desktop machine.] Cat_Dog_SSD_Inference.jpg [Model inference using TIDL Inference on TDA2XX ] Regards, Premchand + +Please find attached folder for previous post. Cat_Dog_Inference.zip + +Hi, Could you try below.. 1. Can you display only strong objects from output, that is objects with score >0.3 only and check the output display 2. Can you change "quantRoundAdd" to 50 (default value) in the import config and check Thanks, Praveen + +Hi Praveen, 1. I have already been displaying strong objects i.e. score > 0.3. 2. I changed "quantRoundAdd" to 50 in import config. This did not resolve issue on TDA2X however, I observed that detected bounding boxes with visualization code are within the limit of the image of resolution. Additionally, I tried out few more combinations in import config today which are as follows: "quantRoundAdd" to 50 and "numParamBits" to 10. "quantRoundAdd" to 50 and "numParamBits" to 8. Configured layers with size less than 64 X 64 to have dense convolution. Neither of these combinations resolved my issue. Regards, Premchand + +Hi, Is there any update on this? Regards, Premchand + +Can you try setting below create time parameter createParams.quantMargin = 30; + +Hi, It did not resolve the issue. However, I observed that earlier random false detections were for Dog and now it is for Cat. FYI, I had set parameters as follows: quantHistoryParam1 = 20 quantHistoryParam2 = 10 quantMargin = 30 Please find attached image for detection results. + +Is the network produces expeted result during import step for possitive sample? Is the network produces expeted result in SDK usecase for possitive sample? Is this issue specific to false dtection in negative smaple? + +Hi Kumar, 1. The network produces somewhat positive result to positive sample during the import step. Please find below output for the same. 2. Network does not produce expected result in SDKuse case for a positive sample. Please find below output for the same. 3. The issue is not specific to just negative samples on TDA2XX, issue is also regarding reasonable detections for positive samples as well. + +Can you try this cat image with import step and confirm the behavior. + +Hi Kumar, I tried this cat image with import step but the detection is not similar to detection for cat image on TDA2XX. Please find below image. Legend for rectangle color: Green -- Dog Red -- Cat Regards, Premchand + +Refer below issue in caffe-jacinto and make sure you get expected accuray when you quantize the floating point network github.com/.../11 github.com/.../29 github.com/.../26 Ans then refer the section 3.8 in uers guide to match the result with caffe jacinto. you can aslo refer FAQ 13 + diff --git a/data2/text/range/0-5000/758255.txt b/data2/text/range/0-5000/758255.txt new file mode 100644 index 0000000000000000000000000000000000000000..6c8da0b3b00d575b913e65c96cd37eb9e95ec0b1 --- /dev/null +++ b/data2/text/range/0-5000/758255.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: how to use EDMA_UTILS_autoIncrement_triggerInChannel_v2 + +Query Text: +Part Number: TDA2 Tool/software: Linux I am using TDA2 evm SDK_VISION_03_04_00_00 i am try to copy data using pingpang EDMA biasDmaAutoIncrement_Init and EDMA_UTILS_autoIncrement_triggerInChannel_v2. in L2 pOutBufInt[2] each buffer size is width =9 height=1024 outbuf in DDR size is width =216 height=1024 how can i set biasDmaAutoIncrement_Init ? channels==24 blkWidth_out==9 blkHeight_out==1024 type of data is float. follow is what i set ,it deos not work ! initParamV2.initParams.transferProp[1].roiWidth = blkWidth_out * 4 * channels; initParamV2.initParams.transferProp[1].roiHeight = blkHeight_out ; initParamV2.initParams.transferProp[1].roiOffset = 0; initParamV2.initParams.transferProp[1].blkWidth = blkWidth_out * 4; initParamV2.initParams.transferProp[1].blkHeight = blkHeight_out; initParamV2.initParams.transferProp[1].blkOffset = 0; initParamV2.initParams.transferProp[1].extBlkIncrementX = blkWidth_out * 4; initParamV2.initParams.transferProp[1].extBlkIncrementY = 0; initParamV2.initParams.transferProp[1].intBlkIncrementX = 0; initParamV2.initParams.transferProp[1].intBlkIncrementY = 0; initParamV2.initParams.transferProp[1].extMemPtrStride = blkWidth_out * 4* channels ; initParamV2.initParams.transferProp[1].interMemPtrStride = blkWidth_out * 4; initParamV2.initParams.transferProp[1].extMemPtr = (uint8_t *)(outBufExt); initParamV2.initParams.transferProp[1].interMemPtr = (uint8_t *)(outBufInt[0]); initParamV2.initParams.transferProp[1].dmaQueNo = 1; thanks! Shuai + +Responses: +Hi Shuai, sorry for the delayed responce. Can you check chapter "4.2.2 EDMA Utility Autoincrement V2" in PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils\docs\DMAUtilsLibrary_UserGuide.pdf and also the example in "ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils\test\edma_utils_autoincrement_test" and see if it helps? Regards, Yordan + diff --git a/data2/text/range/0-5000/758617.txt b/data2/text/range/0-5000/758617.txt new file mode 100644 index 0000000000000000000000000000000000000000..47f2301e91fc7411fce600772b98408a2fa72d33 --- /dev/null +++ b/data2/text/range/0-5000/758617.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: Change IVAHD encoding method from H264 to MJPEG + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi How can i modify the IVAHD encoding parameters to enable/change encoding from H264 to mjpeg. Is there any example that shows mjpeg encoding configuration. Regards Mayank + +Responses: +Hi, Please refer the below file vision_sdk\apps\src\rtos\usecases\vip_single_cam_view_encdec\chains_vipSingleCam_EncDec_Display.c check chains_vipSingleCam_EncDec_Display_SetEncPrms() function. Regards, Anuj + +Hi, Its been since any update on this thread. I hope the issue is resolved. Regards, Anuj + diff --git a/data2/text/range/0-5000/758634.txt b/data2/text/range/0-5000/758634.txt new file mode 100644 index 0000000000000000000000000000000000000000..517ba7125f35415693eb5cd788d5f8fc7cdf1736 --- /dev/null +++ b/data2/text/range/0-5000/758634.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Issue for building the Test Application Executable through GMAKE + +Query Text: +Part Number: TDA2 Hi, I am trying to dump TIDL intermediate output in floating point by enabling "ENABLE_FLOAT_TRACE" in import tool source code. But while building test application encountered an error that is, " The system cannot find the path specified. gmake: *** [C:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.TIDL.01.01.02.00\out\vayu\eve\release\modules\ti_dl\test\.\src\report_utils.obj] Error 1 " TIDL build path: C:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.TIDL.01.01.02.00\modules\ti_dl\test Please find attached console image for your reference. Please guide to remove this error. Regards, Gouri P. + +Responses: +HI, As this is the duplicate the thread for the below thread and so closing this thread, please post follow up questions in that thread. e2e.ti.com/.../2802698 Thanks, Praveen + diff --git a/data2/text/range/0-5000/758664.txt b/data2/text/range/0-5000/758664.txt new file mode 100644 index 0000000000000000000000000000000000000000..6e863d739b28d48a40266ecb8bf101d4002b7ec8 --- /dev/null +++ b/data2/text/range/0-5000/758664.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: Bottom Part of the video cropped when running the TIDL object detection usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I'm running the TIDL object detection usecase, and usecase is running fine only with a small problem here: My original input file is .MP4 with resolution 1920*1080, and I make it to .h264 with resolution 768*320, I played the .h264 file using VLC media player and the display is good, but when I use the file to run the object detection usecase, the bottom of the video is cropped, and I'm sure there is no resolution problem in the code or the cfg file in my SD card. I've attached my .h264 file for reference(remove the .txt before use), please pay attention the bottom left part when display it.outfile.h264.txt + +Responses: +Hi, I hope you have not modified anything in usecase or any links. You just have created your input and index file and modify the names in cfg file placed in sd card. can you share a snapshot/picture of your display while running this usecase? Regards, Anuj + +Hello Anuj, Thanks for your reply, I'm sure I didn't modified anything in the usecase or links...I'm still getting familiar with it... Here is the snapshot, 1.png is the h264 data I generated on PC and I played it with VLC media player, 2.png is the photo I take when I run the TIDL usecase with TDA2, you can see from the bottom left some part is missing. snapshot.rar + +Hi, Can you try with the default provided files. Regards, Anuj + +Hi, I don't have a CDDS account so I have no default inData_OD and inHeader_OD files. Thanks. + +Hi, Can you try to run the usecase NullSrc decode display(option 1->n in usecase menu) with your input files and see there you see the full video or not? Regards, Anuj + +Hi, Its been a long time since any update on this thread. I hope this issue is resolved. Regards, Anuj + diff --git a/data2/text/range/0-5000/759364.txt b/data2/text/range/0-5000/759364.txt new file mode 100644 index 0000000000000000000000000000000000000000..8ba49316038e5c0be12d3afc9b7df604f96fc620 --- /dev/null +++ b/data2/text/range/0-5000/759364.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: sxgFrmcpy and Display buffer address issue. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, I am using sgxFrameCopy as use-case to develop a function, HW is TDA2x CPU board + Vision Board + daughter board + OV1652x sensor and SDK is PROCESSOR_SDK_VISION_03_04_00_00 with TDA2XX_EVM_LINUX_ALL define. There are two issue that need your help. 1. When sgxFrmcpy() function gets capture buffer, it uses below function to transfer capture buffer into a texYuv value, “texYuv[0] = System_eglWindowGetTexYuv(&pObj->eglWindowObj, &texProp, pVideoCompositeFrame->dmaFd[0][0]”); I found “dmaFD[]” is not the image buffer point, how do I correspond the image buffer point by “dmaFd” ? Actually I don’t know what the “texYuv[ ]” and “dmaFd[ ]” are? And how the code uses “texYuv[ ]” and “dmaFD[ ]” to get the real image buffer? 2. I try to change some image data in sgxFrmCpy and then send the data to display buffer, I trace the link between sgxFrmcpy and Display, I am not sure which information structure is sent to next link for display recognize and which parameter is for point to display buffer? I think below function is for scaling image and describe image information, including the img buffer point, but I have no idea which parameter of structure records the img buffer point? “SgxRender1x1_renderFrame1x1(&pObj->render1x1Obj, pEglWindowObj, gTriangleVertices_toplefttop, texYuv[0]);” Thanks. Ranny. + +Responses: +Hi, dmaFd is internally mapped to video data in case of linux. Please look the below comments UInt32 dmaFd; /**< userspace handle to represent buffer For 4.4 kernel all buffer handled by Linux need to be as dmaFd. Each of the bios allocaed buffer needs to be mapped to a dmaFd */ Ipc links running on A15 will take care of mapping of dmaFd. Regards, Anuj + diff --git a/data2/text/range/0-5000/759436.txt b/data2/text/range/0-5000/759436.txt new file mode 100644 index 0000000000000000000000000000000000000000..878f83646395b936741644838cd83bed89d8bbdc --- /dev/null +++ b/data2/text/range/0-5000/759436.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: thansfer data from a15 to C66 + +Query Text: +Part Number: TDA2 Tool/software: Linux I am using TDA2 evm SDK_VISION_03_04_00_00 , i run a cnn in sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c my cnn have a big model 15MB about i have to read it by a15 and send buf to C66 , i read the model file in vision_sdk\sample_app\src\hlos\usecases\nullSrc_display\chains_nullSrcDisplay.c and send the address of model buffer to c66. in frameCopyAlgoLocalDma.c\Alg_FrameCopyCreate i get the address of model buffer . in frameCopyAlgoLocalDma.c\Alg_FrameCopyProcess Everything went smoothly. but i have a problem at last. when i run the program ， some times the out put of the CNN is always right ,some times front 3-5 frames is wrong but little difference, some times front 300-500 frames is wrong but little differenc So it's uncertain how many frames the results are incorrect, sometimes more, sometimes less, but after running 500 frames, they're basically correct. Later, I found that when the CNN output was incorrect, it was because the obtained model was partially incorrect. So the results are incorrect, but the gap is not big. So I think it's risky to get the CNN model in this way. It takes a while for C66 to get the correct CNN model. What causes this problem? Is there a good way to solve it? BESTWISHES Shuai! + +Responses: +Hi, Is the data is getting corrupted from a15 to c66. I hope you are allocating that much big memory and not modifying that data anywhere. Are you allocating from shared memory. I hope the cache operation are done properly. Regards, Anuj + +Hi, Any update on this issue. Regards, Anuj + diff --git a/data2/text/range/0-5000/759440.txt b/data2/text/range/0-5000/759440.txt new file mode 100644 index 0000000000000000000000000000000000000000..b140a4e8726ee7a8dd6e7c67e9b4234813759e28 --- /dev/null +++ b/data2/text/range/0-5000/759440.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: Adding new usecase and get compiling error “unresolved symbols remain” + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello，I'm trying to add new usecase to VSDK, and when I compiled it, I got the error "unresolved symbols remain". Below is the log: ================================================================ # Making tda2xx-evm:ipu1_0:release:vision_sdk_lib... # Linking into D:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4... # undefined first referenced symbol in file --------- ---------------- Chains_lyratidlOD D:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "D:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bio s_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4" not built gmake[7]: *** [D:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error1 gmake[6]: *** [ipu1_0] Error 2 gmake[5]: *** [apps_ipu1_0] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 ================================================================ Below is what I have done: 1. I prepared all the file according the usecasegen document 2. Add the usecase to uc_cfg.mk under vision_sdk/apps/configs/tda2xx_evm_bios_all, 3. Add the usecase to cfg.mk under vision_sdk/apps/configs/cfg.mk 4. in vision_sdk/apps/Makefile, I add: -include $(MODULE_SRC_BASE_PATH)/rtos/usecases/lyra_tidl_OD/SRC_FILES.MK Then I removed the binaries directory and do gmake -s -j depend, then gmake -s -j, and then I get the error I described previously. Did I do anything wrong here? I also run the command gmake -s showconfig and I did see my usecase was built. The last one UC_lyra_tidl_OD is the usecase I added. Below is the log: =============================================================================== # Use-cases included in build, # UC_srv_calibration UC_lvds_vip_dual_cam_dual_display UC_lvds_vip_multi_cam_view UC_lvds_vip_sv_analytics_us UC_lvds_vip_sv_standalone UC_lvds_vip_single_stereo UC_lvds_vip_single_stereo_auto_calib UC_lvds_vip_single_stereo_calibration UC_network_rx_tx UC_network_stereo_display UC_null_src_dec_display UC_null_src_display UC_ov490_vip_sv_standalone UC_saveDisFrame UC_vip_single_cam_analytics2 UC_vip_single_cam_dense_optical_flow UC_vip_single_cam_dual_display UC_vip_single_cam_edge_detection UC_vip_single_cam_frame_copy UC_vip_single_cam_frame_copy_safety UC_vip_single_cam_lane_detection UC_vip_single_cam_object_detection2 UC_vip_single_cam_sfm UC_vip_single_cam_sparse_optical_flow UC_vip_single_cam_subframe_copy UC_vip_single_cam_tlr UC_vip_single_cam_view UC_vip_single_cam_view_encdec UC_tidl UC_semSeg UC_tidl_OD UC_lyra_tidl_OD # # ================================================================================= + +Responses: +Hi, Seems like you are calling Chains_lyratidlOD function from apps/src/rtos/common/chains_main_bios_tidl.c file. But have you defined your usecase entry function with the same name Chains_lyratidlOD. Please add some error in your usecase file to confirm that these are getting build. Regards, Anuj + +Hello Anuj， the problem is solved~ thanks for your reply. + diff --git a/data2/text/range/0-5000/759716.txt b/data2/text/range/0-5000/759716.txt new file mode 100644 index 0000000000000000000000000000000000000000..beea34158b647595a317e35371447a530e2efb87 --- /dev/null +++ b/data2/text/range/0-5000/759716.txt @@ -0,0 +1,12 @@ +Ticket Name: Need memory address range for onchip and external memory of TDA2x. + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I want to know the memory address range for onchip and the external DDR memory of TDA2x SOC chipset. I checked in the datasheet and unfortunately I could not find that information. Thanks, Vasanth + +Responses: +Hi Vasanth, Can you see Memory Mapping chapter in the TDA2 TRM? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh, Thank You for your reply. We can close this ticket. Thanks and Regards, Vasanth + diff --git a/data2/text/range/0-5000/759754.txt b/data2/text/range/0-5000/759754.txt new file mode 100644 index 0000000000000000000000000000000000000000..1c13e089c1a5e645bee029d674fe259c9719b4bb --- /dev/null +++ b/data2/text/range/0-5000/759754.txt @@ -0,0 +1,8 @@ +Ticket Name: TIDL/Deep Learing Benchmark Performance and Support + +Query Text: +Other Parts Discussed in Thread: TDA2, TDA2HV, TDA2HG Dear Sir, I have some queries with respect to DL model development on TI platform. Pl help me with my following questions. 1. TIDL document lists the results of a semantic-segmentation network running on the TDA2 SoC using TIDL - which version of TDA2. is it only on TDA2xP? 2. Is there Benchmark of any open source model ported on TDA2X for calculating the speed/processing time? 3. Does TIDL software package which is part of vision SDK supported on TDA2HG and TDA2HV 4. Is it possible to use custom layers which is designed by developer which are not part of TIDL package 5. Is there simulator support for TDA2H 6. Is there GPU support in TDA2H? Can we run deep learning model on GPU? or we need persist with EVE and DSP for model Inference 7. Is there simulator support for TIDL 8. Is TDA2H available for procurement in India immediately Thanks, Sachin + +Responses: +1.TIDL supported on TDA2x and TDA3x 2.Please refe out data sheet for layer level performance data also modles trained by TI. 3. TIDL is stansdalone package, Check you data manula for TDA2HG and HV. itf the part has EVE or DSP. yoyu cann run TIDL 4. You can split network into multiple partions and run with custom layer in between 5.We do not have simulator 6.Plase check yout data manula for GPU avialbilyt. TIDL does not use GPU 7.No 8.Please chack here www.ti.com/.../TDA2EVM5777 + diff --git a/data2/text/range/0-5000/759773.txt b/data2/text/range/0-5000/759773.txt new file mode 100644 index 0000000000000000000000000000000000000000..414b411e73391c3d993f6e210d38aba973c59e74 --- /dev/null +++ b/data2/text/range/0-5000/759773.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2E: A pin cannot be used as a normal GPIO + +Query Text: +Part Number: TDA2E TDA's software driver has affected the SD card power supply to remain at 3.3V, because our current hardware design: Y9 pin (sdwp) on the TDA chip is used as the SD card power driver Our software engineers feedback that sdwp has been occupied by the mmc1 software driver, and the Y9 pin cannot be used as a normal GPIO to control the power of the SD card. How do we solve this problem? PS: Our SD card only needs 3.3V running mode + +Responses: +Hi Feng, Can you please post a diagram of your hardware setup for better understanding? Also, one question in advance - is your PCB layout forzen? I.e. you are no longer allowed to make changes to the design? Thanks, Stan + +Hi，Stan Yes, we are not going to change the PCB layout The hardware diagram is as follows + +The pin mux is typically done outside any driver - in the SBL bootloader. Therefore, you should be able to change Y9 to GPIO w/o driver even knows it. This can be done in the device tree (.dts) file which SBL will reflect in the CTRL_CORE_PAD_MMC1_SDWP SoC register. There are many articles on TI.com and posts in this forum how to do this. On the other hand, the MMC driver will continue (if was enabled) to monitor the Write-Protect (WP) pin, thus this functionality may need to be disabled in the driver. I'm a hardware engineer and I don't know how MMC driver was implemented, but since WP is an optional feature, this should be possible in the driver. Regards, Stan + +We has tried the following steps: Configure the kernel's pinmux output to pull up by default, but after the file system is running, we check the status of the gpio and find that this pin attribute becomes the input drop-down. Then the next step, when we tries to manually change the direction property of the gpio, the mmc software driver will report some errors.(As shown below) We analyze the mmc driver and the gpio driver is occupied. How to solve this problem in software? + +Hi, Please check your device tree. Most likely, only the cd-gpio is described. wp-gpio is not described. You should be able to use the MMC1_SDWP pad in the GPIO mode 0x14 which will make it connect to the GPIO6_28 line. Refer TRM (CTRL_CORE_PAD_MMC1_SDWP) By default, both CD and WP pads are configured by u-boot to be in the muxmode 0x14 which will be the GPIO mode. Also, If my understanding is correct, GPIO6_28 should be registered as 32 * 6 + 28 = 220 in the /sys/class/gpio subsystem. So you should try to change that. Regards, Nikhil D + diff --git a/data2/text/range/0-5000/759792.txt b/data2/text/range/0-5000/759792.txt new file mode 100644 index 0000000000000000000000000000000000000000..855b3129d2642305cf3ef87c48edee98b382fd9b --- /dev/null +++ b/data2/text/range/0-5000/759792.txt @@ -0,0 +1,22 @@ +Ticket Name: CCS/TDA2: How to use neon in CCS + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio in tda2 runs the neon code command on ccs8.2. When running to the red flag as shown in the figure, it will enter __isr_vector in single step: LDR pc [pc, #-8] @ 0x0C Prefetch Abort Set in ccs -mfloat-abi=softfp -mfpu=neon Neon initialization : MRC p15, #0, r3, c1, c0, #2 @ Read CPACR ORR r3, r3, #0x00F00000 @ Enable access toCP10 and CP11 MCR p15, #0, r3, c1, c0, #2 @ Write CPACRsobel.rar MOV r3, #0 MOV r0, #0x40000000 FMXR FPEXC, r0 @ Set FPEXC bit 30 to enable VFP MCR p15, #0, r3, c7, c5, #4 @flush prefetch buffer because of FMXR above + +Responses: +Hi, Can you try the below sequence and see if it works for you: MRC p15, #0, r1, c1, c0, #2 @ r1 = Access Control Register +ORR r1, r1, #(0xf << 20) @ enable full access for p10,11 +MCR p15, #0, r1, c1, c0, #2 @ Access Control Register = r1 +MOV r1, #0 +MCR p15, #0, r1, c7, c5, #4 @ flush prefetch buffer +MOV r0,#0x40000000 +FMXR FPEXC, r0 @ Set Neon/VFP Enable bit Regards, Rishabh + +Hi, I use this sequence, run to the red flag as shown in the figure it will enter LDR pc, [pc,#-8] in single step __isr_vector: LDR pc, [pc,#24] @ 0x00 Reset LDR pc, [pc,#-8] @ 0x04 Undefined Instruction LDR pc, [pc,#24] @ 0x08 Supervisor Call LDR pc, [pc,#-8] @ 0x0C Prefetch Abort LDR pc, [pc,#-8] @ 0x10 Data Abort LDR pc, [pc,#-8] @ 0x14 Not used LDR pc, [pc,#-8] @ 0x18 IRQ interrupt LDR pc, [pc,#-8] @ 0x1C FIQ interrupt this is project 8867.sobel.rar + +Hi, For me the same sequence works with "mfpu=neon -mfloat-abi=hard". Can you see if the same works for you. Regards, Rishabh + +Hi, You can also refer to "Entry" definition in PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\csl\arch\a15\src\csl_a15_init.asm. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/760139.txt b/data2/text/range/0-5000/760139.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce4528cb3cf2a0dbe3054b7c96a6c0689603b77e --- /dev/null +++ b/data2/text/range/0-5000/760139.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: How to calculate the border pixels count for an image block. + +Query Text: +Part Number: TDA2 Hi, I have read the pdf attached in the following thread. e2e.ti.com/.../734522 I have a doubt in that. In slide no.16, I have read the paragraph: Offset to next block is not necessarily equal to block width in order to transfer overlapping blocks. Overlapping blocks are used in case of filtering to account for the overlapping border pixels. For instance a N taps filter needs N-1 border pixels. The border width would be (N-1)/2 pixels. Example: Offset to next block= w block_width= w + N-1 I just want to know, how to calculate the block_width for a 16*16 image block, by using the mentioned formula? It means, the number of border pixels , I need to add with the original image block. Regards, Surbhi + +Responses: +Hi Surbhi, The overlap between blocks will depend on the overlap required for processing. For example if you are doing a 3x3 Sobel kernel then between two processing you need an overlap of 2 pixels for input blocks. If instead of 3x3 if you are doing a filtering operation with 5x5 kernel then you will need an overlap of 4 pixels between 2 input blocks ( that is what is mentioned in the ppt you refereed). Now if your output block size is 16x16 then your input block size for 3x3 filter would be (16+2)x(16+2). But the jump between two input blocks will be 16 in horizontal direction and 16 in vertical direction as there is an overlap of 2 pixels required in both direction Regards, Anshu + diff --git a/data2/text/range/0-5000/760395.txt b/data2/text/range/0-5000/760395.txt new file mode 100644 index 0000000000000000000000000000000000000000..179ca46c490ae30ac938b89c656084ddac01a86a --- /dev/null +++ b/data2/text/range/0-5000/760395.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: What is the result of vector compare? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I want to check what is the output when I compare two vectors. For example, if I set vector a = [0xfff0, 0xfff1, 0xfff2, 0xfff3, 0xfff4, 0xfff5, 0xfff6, 0xfff7]; vector b = [0xfff1, 0xff01, 0xff02, 0xffff, 0xff01, 0xff02, 0xffff, 0xffff ], what is the result c = a > b ? If it is [0, 1, 1,0, 1, 1, 0, 0 ] ? Thanks a lot! BRs Yang Derek + +Responses: +Hi Derek, Comparison operation does an element wise comparison of all the 8 elements of the vectors and returns a vector holding the comparison for each elements of the vector. Regards, Anshu + diff --git a/data2/text/range/0-5000/760511.txt b/data2/text/range/0-5000/760511.txt new file mode 100644 index 0000000000000000000000000000000000000000..c880627375aae22207a43a0e00dd6e1cdf257703 --- /dev/null +++ b/data2/text/range/0-5000/760511.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: how to save vedio by VLC + +Query Text: +Part Number: TDA2 Tool/software: Linux i am use tda2 evm SDK_VISION_03_04_00_00 , now usecase in SDK_VISION_03_04_00_00 run is ok. then i am try to save some vedio by VLC, but i donot not how to do this. thanks Shuai + +Responses: +Hi, We do not support saving video using VLC. You can use null Link to save the video locally on the sd card or use network link to save it on your pc. Regards, Anuj + +Hi Anuj both , can you tell me how to do this ! Regards, Shuai + +Hi, Please refer below usecases vision_sdk\apps\src\rtos\usecases\null_src_dec_display vision_sdk\apps\src\rtos\usecases\network_rx_tx (check network Tx usecase) Saving the video on sd card will be easier if you do not have any specific requirement for network tx. Regards, Anuj + +Hi Anuj in this case （vision_sdk\apps\src\rtos\usecases\null_src_dec_display） i think data souce is not camera. in which link have save the video locally on the sd card ? thanks! Shuai + +Hi, Null Link save the video to sd card. You can modify any usecase with single camera and replace display link with null link. It will save the camera video. Regards, Anuj + diff --git a/data2/text/range/0-5000/760789.txt b/data2/text/range/0-5000/760789.txt new file mode 100644 index 0000000000000000000000000000000000000000..c7b3de7211cd9eec49940b5373092779112e5643 --- /dev/null +++ b/data2/text/range/0-5000/760789.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: How can I make change in eve kernel rebuild? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I make some changes in one of eve kernel algorithm. When I build with "gmake TARGET_PLATFORM=PC" in eve root directory, and run test app, the changes in eve kernel algorithm doesn't work. When I use make clean for the whole eve and make again, it works. But it is too slow. How can I rebuild eve kernel algorithm and make it work quickly? Thanks! Best Regards, Derek Yang + +Responses: +Hi Derek Yang, can you try the following and see if it works: follow the instructions in "eve_sw_01_19_00_00\kernels\docs\eve_kernels_userguide.pdf to rebuild just the modified kernel and then rebuild eve sw with "gmake TARGET_PLATFORM=PC". Regards, Yordan + diff --git a/data2/text/range/0-5000/760829.txt b/data2/text/range/0-5000/760829.txt new file mode 100644 index 0000000000000000000000000000000000000000..65fc811bc8b42c93b53ffce1d3ee6e121f83b392 --- /dev/null +++ b/data2/text/range/0-5000/760829.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2: Conflict in power state and its status register + +Query Text: +Part Number: TDA2 Hi Sir, As shown in the screen shot, PM_DSS_PWRSTCTRL DSS module power state is in off state but its status register showing it is in on state. Could you please explain why it is happening? Regards, Sagar + +Responses: +Hi Sagar, PM_DSS_PWRSTST is showing the reset values. Are you facing any issue? Regards, Rishabh + +Hi Rishabh, Due to unused cores are in active state the power consumption is more beyond its limit. So need to verify whether these cores are in ON state or in OFF state. Regards, Sagar + +Hi Sagar, PM_DSS_PWRSTCTRL - "This register controls the DSS power state to reach upon a domain sleep transition". So it is the state expected to be reached on domain sleep transition. It is more of configuration/control register, what state to be when domain sleep transition happens whereas PM_DSS_PWRSTST - "This register provides a status on the current DSS power domain state. [warm reset insensitive]" . This provides the current state. So it means the domain is not gone to sleep state and it is ON + +Hi Sagar, DSS is not a CPU, you should look at unused CPUs. How are you making sure that unused CPUs are in low power state/turned off? What is the software that you are using? Regards, Rishabh + +Hi Rishabh, I am checking PM_xxx_PWRSTCTRL register[1:0] POWERSTATE bits to confirm whether it is in ON or OFF state. I am using TI SBL and debugging using Lauterbach. Regards, Sagar + +Hi Sagar, Did you build SBL for prod mode? As far as DSS is concerned, the module is off here as you can see in PWRSTCTRL register. Regards, Rishabh + +Hi Rishabh, No, it is not build for prod mode. Yes, it is in off state as per PWRSTCTRL, but status register showing it is in active state. PM_xxx_PWRSTST[1:0] POWERSTATEST . Status register should be update with OFF state. Regards, Sagar + +Hi Sagar, You need to build SBL for prod mode and then try. In dev mode SBL will enable all cores and power will be high. Regards, Rishabh + +Hi Rishabh, Is PWRSTCTRL register is enough to put core in off state? Regards, Sagar + +Hi, One reason not transition to OFF can be clocks still running. PD DSS encomapasses BB2D, DSS, HDMI, and HDMI_PHY. All these must be disabled from MODULEMODE and functional clocks stopped prior to issue PD collapse. Regards, Stan + +Hi Sagar, It's not only about PWRSTCTRL register. I strong recommend that you run using SBL as suggested first. Regards, Rishabh + +Hi Sagar, Did you see any different power numbers with TI SBL? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/760834.txt b/data2/text/range/0-5000/760834.txt new file mode 100644 index 0000000000000000000000000000000000000000..69df19ee53ca20bdd4ad62fbb66569a1cf5cb646 --- /dev/null +++ b/data2/text/range/0-5000/760834.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: Disable the unused cores + +Query Text: +Part Number: TDA2 Hi Sir, In my project we are not using the EVE3, EVE4 and some other cores. So how can I disable them completely to save the power? Do I need to disable only power state or also need to disable the clock state and need to disable the module also? Best Regards, Sagar + +Responses: +Hi Sagar, Are you using TI SBL? If yes then the SBL will put unused cores (those which are not there in Multi core image) to low power state. Regards, Rishabh + +Also you could remove the unused/not required cores from vision_sdk/apps/config/select_config/cfg.mk file. Rgds, Brijesh + +Hi Brijesh, Is this vision_sdk is applied for Lauterbach also. Because I am not using CCS tool of TI. Regards, Sagar + +Hi Sagar, Not really, i was just talking from vision sdk. for CCS, you could remove unused cores in target configuration. But this is all on host side. On target side, as Rishabh mentioned, SBL, Boot loader, should know what cores required and power on and enable only them. Regards, Brijesh + +Hi Sagar, As this question is followed up in another thread e2e.ti.com/.../760829, I am closing this. Regards, Rishabh + diff --git a/data2/text/range/0-5000/760879.txt b/data2/text/range/0-5000/760879.txt new file mode 100644 index 0000000000000000000000000000000000000000..31a0b61f85ff82771b9070b460e4d84f6ea24a89 --- /dev/null +++ b/data2/text/range/0-5000/760879.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Is the external clock module needed for the AVB audio to sync with local audio clocks? + +Query Text: +Part Number: TDA2 Hi, expert: To implement AVB on J6/J6P, in case both talker and listener are needed, do we need an external clock module for the AVB audio to sync with local audio clocks? If needed, is there a reference schematic? Thanks. + +Responses: +Hi Peter, can you check if this thread can help you: e2e.ti.com/.../2691094 Regards, Yordan + +Hi Peter, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/760885.txt b/data2/text/range/0-5000/760885.txt new file mode 100644 index 0000000000000000000000000000000000000000..83226aee267190d8db9305ceec7a8491edc9c811 --- /dev/null +++ b/data2/text/range/0-5000/760885.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: algorithm causing delay + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on TDA2Ex. reference usecase: "chains_lvdsVipMultiCam_Sgx3Dsrv" Modify as below： The usual operation display is smooth. However, increasing the amount of DSP operations will a serious delay in the display. How can I continue to display images without being affected by DSP delay? Only get the left image, Capture → Sync → Dup → ipc → Sgx3Dsrv. But it has not improved delay. sgx3DsrvLink_drv.c, Int32 Sgx3DsrvLink_drvDoProcessFrames(Sgx3DsrvLink_Obj *pObj) In addition, add Vps_printf in the capture, dup, sync link to observe each link's system_sendLinkCmd (, SYSTEM_CMD_NEW_DATA, The sending interval will become longer when the DSP to increase the load. Why? Could you please give some suggestion here? Thanks in advance. + +Responses: +Hi, I did not understand your question. Which operations are you trying to do in DSP? Is that running on parallel or serially with Display. Why there is ipc link in the image. It should not be there. Regards, Anuj + +Hi, Which operations are you trying to do in DSP? DSP to do custom algorithm, it's work ok. why increasing the amount of DSP load will a serious delay in the chains? Is that running on parallel or serially with Display. I don't understand this meaning? Why there is ipc link in the image. It should not be there. Why not? It's reference usecase: "chains_lvdsVipMultiCam_Sgx3Dsrv" I try no ipc link is don't work. Thanks in advance. + +Hi, The final FPS you will get for the entire chain depend upon the max time taken by all the links. Suppose you have a chain with 2 links and 1 link run at 10 fps and 2nd one at 30 fps so chain will run at 10 fps only. So if you increase the processing time of dsp link then that will affect the entire chain. Why not? It's reference usecase: "chains_lvdsVipMultiCam_Sgx3Dsrv" IPC links are automatically introduced by vsdk_usecase generation tool and that will not be shown in img or txt file but in actual usecase c file,Ipc links will be present. Regards, Anuj + +Hi, Its been long since any update on this thread. Hoping you are able to resolve your issue with my inputs. Closing the thread. Regards, Anuj + +Hi, The final FPS for the entire chain depend upon the max time taken by all the links. Any chain style will have this phenomenon? (Such as series or parallel) Why are multiple cores still affected? Could you please provide some guide on these questions? Thanks in advance. + +Hi, A chain works in series means output of 1 link becomes input of other and so on capture -> vpe -> display If the input of a link does not depend on other chanin then its parallel capture-> display grpxsrc -> grpxdisplay Here both chain is independent of each other so they can work in parallel. Regards, Anuj + +Hi, Will it be affected if used the below design? Thanks in advance. + +Hi, Yes, suppose if your custom link is taking 100ms per frame and other link takes a max of 33ms still you wont get a 30FPS at display. you will get 10FPS as your custom link is not freeing the data and causing other links to drop frames and be in idle state. Please go through the below doc for more information on MCFW framework vision_sdk\docs\Architecture Regards, Anuj + diff --git a/data2/text/range/0-5000/760918.txt b/data2/text/range/0-5000/760918.txt new file mode 100644 index 0000000000000000000000000000000000000000..29ba6ffddbed29e8903e87f3bd422ca022a1265c --- /dev/null +++ b/data2/text/range/0-5000/760918.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: Omnivision Sensors with Vision SDK + +Query Text: +Part Number: TDA2EVM5777 Hi, From your previous response : Q1: Yes. Vision SDK supports OV10635 camera module which is connected directly to TDA2 EVM. Q2: You can connect camera module with IR filter on TDA2. You can check out this DM demo with IR camera done by our 3rd party using Vision SDK. www.youtube.com/watch In the demo video for IR camera, OV10635 camera module itself is used. But, instead of using IR Cut filter (default comes with camera) , they have used IR Pass filter on camera lens? Is my understanding correct? Regards, Sagar + +Responses: +Sagar, Youtube link seems to be incorrect. Well it can work.. but it is better first to bring up new camera with the simple example in PDK. Rgds, Brijesh + +Hi Brijesh, This is proper link: www.youtube.com/watch I have tda2x evm board which comes with OV10635 camera module by default. I am able to build camera display usecase and i can see camera output on hdmi display. My main question is whether the camera used in youtube demo is OV10635 ? Because, in OV10635 datasheet it is mentioned that it can be used for night vision. Regards, Sagar + +Sagar, I am trying to get this details, will get back to you on this. Rgds, Brijesh + +Sagar, Still have not the details, will update you as soon as i get it. Rgds, Brijesh + +Sagar, This demo uses Sony IMX290 2MP sensor. This sensor board is build by D3. Regards, Brijesh + diff --git a/data2/text/range/0-5000/761169.txt b/data2/text/range/0-5000/761169.txt new file mode 100644 index 0000000000000000000000000000000000000000..a21775a4e5b9439546d11b0933be5f0a2b2ab3f7 --- /dev/null +++ b/data2/text/range/0-5000/761169.txt @@ -0,0 +1,17 @@ +Ticket Name: TDA2: TIDL Simulator for DSP + +Query Text: +Part Number: TDA2 Hi, is there the DSP/c66 equivalent of this simualtor - eve_test_dl_algo.out sim.txt + I searched and could not find it please let me know, thank you! .luca + +Responses: +Hi Luca, there is "dsp_test_dl_algo.out", in ti_components\algorithms\REL.TIDL.01.01.02.00\modules\ti_dl\test\out directory. You can check chapter "3.3.4 Building the Test Application Executable through GMAKE" in TIDeepLearningLibrary_UserGuide.pdf for rebuilding steps if you need. Regards, Yordan + +Hi thank you Yordan ~ this helped me a lot though I'm still not able to compile fully ~ I get this - luca@doppio test make TARGET_BUILD=debug TARGET_PLATFORM=PC all g++: error: ../../ti_dl/lib/PC/dsp/debug/tidl_algo.lib: No such file or directory /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/makerules/rules.mk:603: recipe for target 'outfile' failed make: *** [outfile] Error 1 luca@doppio test g++ -o ./out/dsp_test_dl_algo.out /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/./src/report_utils.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/./src/tidl_config.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/./src/tidl_tb.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/./src/tidl_image_preproc.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/../../../common/configparser.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/../../../common/ti_draw_utils.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/../../../common/ti_mem_manager.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/../../../common/cache.obj /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/out/PC/dsp/debug/modules/ti_dl/test/../../../common/profile.obj -m32 -lstdc++ -static ""../../ti_dl"/lib/PC/dsp/debug/tidl_algo.lib" /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/PC/dsp/debug/dmautils.lib g++: error: ../../ti_dl/lib/PC/dsp/debug/tidl_algo.lib: No such file or directory -- when looking for ti_dl/lib/PC/dsp/debug/tidl_algo.lib - I cannot make it because I have no "algo" source code to build the lib -- as in here luca@doppio ti_dl pwd /home/luca/tools/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/REL.TIDL.01.01.02.00/modules/ti_dl luca@doppio ti_dl make CORE=dsp TARGET_BUILD=debug TARGET_PLATFORM=PC all . ======== tidl ALGO ================= make -C ./algo -f makefile make[1]: *** algo: No such file or directory. Stop. makefile:76: recipe for target 'all' failed make: *** [all] Error 2 luca@doppio ti_dl ls docs inc lib makefile test utils -- maybe there is a binary version I can download somewhere? also section 3.5.2 of the TIDL_UG says >> Build with below setting (in “tidl_alg_int.h” file) to build the code to run the inference faster on but I don't have that source file anywhere ~ and the doc specifically mention I need it to modify it (page 3-9) can I get help in finding a place to download those files? thank you so much! .luca + +"eve_test_dl_algo.out sim.txt" May I know what is the meaning of sim.txt here. TARGET_PLATFORM=PC is suported for source release. Only objcet release is avaialble in VSDK package. + +Hello! I also meet this problem that i cannot find the algo folder. Did you resolve this? Thank you ! + +EVE simulation will functionally match with DSP simulation. so there is no need to build the DSP version. Regarding algo folder, it is not available with object release. + diff --git a/data2/text/range/0-5000/761407.txt b/data2/text/range/0-5000/761407.txt new file mode 100644 index 0000000000000000000000000000000000000000..1193f284c69cce900d55a6decb7f86b5f0a03c59 --- /dev/null +++ b/data2/text/range/0-5000/761407.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2: TIDL: I have TIDL library, undefined symbol assembly function of arp32 + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler I have TIDL library built successfully and works fine with the test application. When I include it with my own project the Library throws the following errors. undefined first referenced symbol in file --------- ---------------- __arp32abi_addf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_cmpf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_cvtdf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_cvtfd D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_divf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_fixfi D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_fixfu D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_fltif D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_fltuf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_mpyf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_strasgi D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib __arp32abi_subf D:\LIQOR\PCA_Latest\04_Engineering\02_Development_Tools\ti_tools\compiler\arp32\lib\tidl_algo.lib These look like assembly functions that come with TI compiler. I used the same Arp32 compiler for both TIDL and my project. What could be the issue. + +Responses: +Looks like RTS library from ARP32 compiler folder is not included in your project linking. Include RTS library to your project + +I have included. + + + +I think I got the issue. I use scons to build my project, In Scons the libraries have to passed in series w.r.t their dependencies. Thanx for the support + diff --git a/data2/text/range/0-5000/762118.txt b/data2/text/range/0-5000/762118.txt new file mode 100644 index 0000000000000000000000000000000000000000..774bbbf76884ed44938018fa4401f760e82e4671 --- /dev/null +++ b/data2/text/range/0-5000/762118.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Deep learning algorithms run very slowly on DSP(TDA2xx) + +Query Text: +Part Number: TDA2 Hi, Deep learning algorithms run very slowly on DSP(TDA2xx) image size is 512x256. ### CPU [ DSP1], LinkID [ 49], [IPU1-0] 831.681815 s: [IPU1-0] 831.681845 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 831.681937 s: ****************************** [IPU1-0] 831.681998 s: [IPU1-0] 831.682028 s: Elapsed time = 633812 msec [IPU1-0] 831.682120 s: [IPU1-0] 831.682272 s: New data Recv = 0.2 fps [IPU1-0] 831.682364 s: [IPU1-0] 831.682394 s: Input Statistics, [IPU1-0] 831.682455 s: [IPU1-0] 831.682516 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 831.682577 s: | FPS | FPS | FPS | FPS [IPU1-0] 831.682669 s: -------------------------------------------------- [IPU1-0] 831.682760 s: 0 | 0. 1 0. 0 0. 0 0. 1 Computational complexity: thanks! + +Responses: +Hi, can you check this post by Kumar and update "deploy.prototxt " parameters as described and see if it improves the speed: e2e.ti.com/.../689617 Regards, Yordan + +Hi, deploy_512x256.rarAbout eep_top_k: 20 confidence_threshold: 0.15 1. I don't have these two variables in my file (deploy.prototxt) . 2. I want to run four networks on tda2x at the same time. 1camera (video input)---------->first network on DSP_1 2camera(video input)---------->the second network on DSP_2 3camera(video input)----------->the third network on EVE_1 4camera(video input)---------->the fourth network on EVE_2 EVE_3 EVE_4 The network is running slowly on the DSP. Is there any way to improve it? Thanks! + +Refer The data sheet for performance comparision between EVE and DSP. We dont see much scope the improve the performnce of DSP + diff --git a/data2/text/range/0-5000/762301.txt b/data2/text/range/0-5000/762301.txt new file mode 100644 index 0000000000000000000000000000000000000000..1c068ddc50732d1577bab1b59f117044b86cd22c --- /dev/null +++ b/data2/text/range/0-5000/762301.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: Understanding Best Suitable TDA2X processor for the Cascaded Design + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Hello, I am trying to figure out the maximum possible 2D and 3D complex FFT size possible using TDA2x and TDA2px for our application. For the cascaded design that will hopefully be released in the first quarter of 2019 by TI, could you please tell me what is the exact part number of TDA2x that you have used? Based on the datasheet of TDA2X ADAS processors, from Pg 142, TDA2xxT is the best processor to use because it has the fastest DSP and EVE processing speed. Based on pg 6, TDA2SXx and TDA2SGx of TDA2Sxx subfamily is the best processor because it suits all the hardware requirements for supporting 4 AWR1243s together. Also, could you also tell me the max datarate that the videoports of TDA2x can handle? TDA2x has only 3 VIP ports present. Then how do you connect and transfer data from four AWR1243s to the three VIP ports? Could you please give a brief explanation to it? Thank you! Best Regards, Nishant + +Responses: +Nishant, The part number we use in the board is x5777 which is the pre-production part for the TDA2x device. This supports the mazimum speed grade mentioned in the Datasheet. For the exact number of FFTs that can be performed, I would advice you to feed your system configuration in the Radar System planner to see if your required usecase would fit in the device. TDA has 3 VIP instances. For the number of ports available for capture please refer to Figure 9-2. VIP Environment of the TRM. Here you would see each VIP has a slice. We are connecting the AWR1243 to VIN 1A, 2A, 3A, 4A. The data rate we are supporting from the default FPGA image is 150 MHz 16 bits which is sufficient for 2400 Mbps (600 Mbps 4-lane AWR configuration). Thanks and Regards, Piyali + +Thank you Piyali for your help with all my questons! Best Regards, Nishant + diff --git a/data2/text/range/0-5000/762306.txt b/data2/text/range/0-5000/762306.txt new file mode 100644 index 0000000000000000000000000000000000000000..0c1e7fb831ffeae34c4ad4ee171e4f49b3f2a1bc --- /dev/null +++ b/data2/text/range/0-5000/762306.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Use-case Development for Cascaded Radar Design + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Hello, I am trying to understand the fundamental differences between different use-case and develop my own use-case for my application. In the use-case "multi_radar_capture_fft_display," you have used 'ISSCapture' algorithm process to collect CSI-2 data from AWR1243 radar sensor. However, in the use-case "cascade_radar_object_detect", you have used "Capture" algorithm process to collect CSI-2 radar data. What is the fundamental difference between these two processes? Is there any advantage of using one over another? I look forward to your reply. Thank you! Best Regards, Nishant + +Responses: +Hi Nishant, ISSCapture is using CAL driver to capture the data in the underlying link. "Capture" is using VIP driver to capture the data in the underlying link. The choice is based on how the AWR1243 is connected to the TDA (via CSI/CAL or via VIP (parallel)). Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/762448.txt b/data2/text/range/0-5000/762448.txt new file mode 100644 index 0000000000000000000000000000000000000000..fcb8534a76dbb63dfdd48e653fa7826b9e3e0916 --- /dev/null +++ b/data2/text/range/0-5000/762448.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2PXEVM: Need Information/clarity on compiling Linux applications for TI using Vision SDK framework + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi , I have got couple of qeries regarding porting Linux Application on to Vision SDK framework for which I request you to provide your inputs on it. We have got an Linux application say Sample(which is designed and working for Linux platform) which is not complete POSIX compliant but has got support for most of the POSIX features in it. Namely Pthread, Semphores, Sockets, FileSystem calls File(OPEN …), Directory(MKDIR…) and Link(UNLINK..) operations Basic(CHMOD,UMASK…) file attributes File descriptor(FCNTL..) manipulations Read/Write(READ,WIRTE..) operations Synchronized(SYNC,FSYNC..), Asynchronous(IO_SETUP,IO_DESTROY..) and Multiplexed(SELECT,EPOLL…) I/O Monitoring(INOTIFY_INIT) file events and FIFO(mkfifo..) operations IPC communications(Shared memory). As SYBIOS provides pthread support for A15 core and also NDK(Yet to explore) is built for A15 we were trying to compile/build our Linux application(Sample) for A15 core alone on Vision SDK framework. Are we on the right direction? Do you foresee any issues with it? Recent conversation with TI Engineer states we need to Port Linux on to A15 core? Does it mean porting complete Linux platform on to A15 core and post to which we should start porting our Sample on to A15? As mentioned Linux application Sample has got FileSystem calls in place. Do we have support for FileSystem on SYSBIOS? If So, how could we make use of it or do we need to look for corresponding alternatives in it? And Sample being the server component, there are the other application which communicates to Sample via Sockets or through PIPES or any file based operations. Being Sample built for A15 core, does the other applications which has to communicate to Sample should also be built for A15? Request you to pour in your inputs/thoughts on it. + +Responses: +Hi Ramesh, VisionSDK has Linux + BIOS mode on which A15 core runs Linux, while all other cores run RTOS. You can check UserGuide and DevelopmentGuide in PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\docs\Linux. Can you check if that works for you? Regards, Yordan + +Hi Yordan, Thanks, definitely I will have a look at it, will get back to you ASAP, in case if I face any issue with it. Btw when I try to compile the sources for "tda2px_evm_linux_all" I do face the below mentioned compiler issues? /tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 66: error: excess initializers are ignored "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 86: error: excess initializers are ignored 2 errors detected in the compilation of "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c". >> Compilation failure make[5]: *** [/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/iss_libs/tda2px-evm/ipu2/release/iss_sensor_ar0220.oem4] Error 1 make[5]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss' More over as mentioned earlier, my Sample application being Server component if it is build for A15 core which runs on Linux, the other use cases/applications which was built for other cores runs on RTOS is it still possible to establish the communication channel among other cores to A15 core? + +Hi Ramesh, Already 1 thread is running on this issue. So please do not create duplicate threads. I will provide answers on your running thread. Please close this one . Regards, Anuj + +Hi Anuj, I was asked to create the new thread for other topics, assuming I will not the response to it, I have started a new thread. Sure, I will close this loop and will continue to ask the queries on the thread which you have responded. Closing this all the queries will be asked under " e2e.ti.com/.../761254" Pradeep + diff --git a/data2/text/range/0-5000/762475.txt b/data2/text/range/0-5000/762475.txt new file mode 100644 index 0000000000000000000000000000000000000000..cfcbb490f5f0057763699166dee499de0f8ec8f7 --- /dev/null +++ b/data2/text/range/0-5000/762475.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/TDA2: TDA2x: Invalid MultiProc id + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I'm working with a TDA2EVM5777 and use Vision SDK version 2.5 (old Version because of legacy reason). I wrote a new link and wanted to test it in a usecase. After compiling i try to load the program but got this message in the console: [Cortex_M4_IPU1_C0] IPU1-0 Remote Log Shared Memory @ 0xa0d00000 IPU1-1 Remote Log Shared Memory @ 0xa0d04010 HOST Remote Log Shared Memory @ 0xa0d08020 DSP1 Remote Log Shared Memory @ 0xa0d0c030 DSP2 Remote Log Shared Memory @ 0xa0d10040 EVE1 Remote Log Shared Memory @ 0xa0d14050 EVE2 Remote Log Shared Memory @ 0xa0d18060 EVE3 Remote Log Shared Memory @ 0xa0d1c070 EVE4 Remote Log Shared Memory @ 0xa0d20080 ti.sdo.ipc.Ipc: line 102: ti.sdo.ipc.Ipc: line 102: assertion failure: A_invalidMultiProcId: Invalid MultiProc id xdc.runtime.Error.raise: terminating execution [C66xx_DSP1] ti.sdo.ipc.Ipc: line 101: ti.sdo.ipc.Ipc: line 101: assertion failure: A_invalidMultiProcId: Invalid MultiProc id xdc.runtime.Error.raise: terminating execution What is the reason for this failure and how can i fix this? + +Responses: +Hi Julian, Will it be possible for you to try compiling this using VSDK 3.6 software-dl.ti.com/.../index_FDS.html If not can you share the changes you have made in a zip file? Regards, Rishabh + +Thank you for the fast reply. In the used Project are links and a usecase which i need. They are not included in newer versions of vision sdk because its a project from someone else. For this reason i didn't compile it with a newer version of vision SDK. What kind of changes should I share? Only the Link i created or every file where i changed anything. + +Hi, Can you share all files you changed on top of VSDK 2.5. Regards, Rishabh + +All the files I change in the Project are in this file. I deleted the usecase to test the link. Only an unused link is left in the project. But then i get the same Error. + +Hi Julian, Can you try to build VSDK 2.5 and run without these changes to check the sanity of system. Regards, Rishabh + +Hi Rishabh, I can build and run VSDK2.5 without these changes. There is no Error in consol and I can choose the different usecases. I am sure that there are a few mistakes in my new link but I don'tunderstand why this Error happens so early without calling the new link in any usecase. Regards, Julian + +Hi Julian, At a glance code seems fine. Can you add a while loop in the start of main application for DSP1 and then connect using CCS & debug further. Regards, Rishabh + +Hi Julian, Is there an update on this? Regards, Rishabh + +Hi Rishabh, Thank you for your help. I finally found my problem. In the Function MultiProc_getId there was something strange. UInt16 MultiProc_getId(String name) { Int i; UInt16 id; Assert_isTrue(name != NULL, ti_sdo_utils_MultiProc_A_invalidProcName); id = MultiProc_INVALIDID; for (i = 0; i < ti_sdo_utils_MultiProc_numProcsInCluster; i++) { if ((ti_sdo_utils_MultiProc_nameList[i] != NULL) && (strcmp(name, ti_sdo_utils_MultiProc_nameList[i]) == 0)) { id = i + MultiProc_module->baseIdOfCluster; } } return (id); } In the debugger I observed that the Variable 'i' started in the for loop with '-1' instead of '0'. I thought that maybe there was something wrong compiled. Therefor I used 'gmake -s all' instead of 'gmake -s' to rebuild everything. This solved my Problem. Regards, Julian + +Hi Julian, Thanks for the confirmation. I am closing the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/762715.txt b/data2/text/range/0-5000/762715.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf55bac30d64bf5752d57670255b6e945827d913 --- /dev/null +++ b/data2/text/range/0-5000/762715.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: EVE: BAM buffer transfer + +Query Text: +Part Number: TDA2 Hi, Are there any limitations or guidelines to buffer transfer within a kernel, or in between different kernels? Is there any document which specifies this? I am facing issues in both inter-kernel transfers as well as within kernel buffer transfers. Regards, Shruti + +Responses: +Hi Shruti, All the requirements are specified in the BAM user's guide. What kind of issues you are facing ? regards, Victor + +Hi Victor, Yes I have gone through the BAM user guide. Following are the issues I am facing are: 1. The user guide mentions "One output of an upstream node can be connected to many inputs of a downstream node." - So I have a kernel1 which has one input and two outputs (output1 and output2) . Both of these outputs serve as an input to two different kernels kernel2 and kernel3. The code gets compiled correctly, but when I run the code, I see that one of the kernels does not get these input buffer address correctly. The addresses are zero for one of the kernel which in turn affects the output. But, when I replicate these output buffers in kernel1 (i.e. total 4 outputs given out : output1, output2, output1_1, output2_1) and give seperate outputs to respective kernels then the addresses come out correct and also the output. 2. I observe the same issue inside a kernel as well. I have a kernel1, which has multiple functions inside suppose func1(), func2() and func3(). The kernel has one input from another kernel, namely input1. If I use the same input buffer in multiple functions like func1() and func2(), then I see that func1() has the correct input data, but func2() gets some corrupted data. This thus affects the output. Again if I replicate input1 into another intermediate buffer inter1 and pass this to the next function func2() then the data is correct and the output is correct as well. Are these limitations of BAM? Or are there some bugs? Or is there any configuration to correct this behavior? Regards, Shruti + +Hi Shruti, 1. Please refer to the constrain listed in Chapter 5 'Current limitations' of BAM user's guide: Specifications of edge list. If one single port of an upstream node has more than one connection, which happens in case of a fork in the graph, then all these connections must be clustered together. For instance in the below image pyramid graph, every DS_NODE’s output port BAM_BLOCKAVERAGE2x2_OUTPUT_PORT has two connections: one to the next DS_NODE and one to SINK_NODE. These connections must appear one afte the other in edge list. If there is a connection involving another node or another port between them then graph creation would be incorrect. I hope this is the issue. 2. You should be able to pass the same input buffer to multiple functions. I assume func1() runs first. Are you seeing that the input to func2() gets corrupted after func1() is executed ? Unless func1() writes into that same buffer during execution, this should not happen. regards, Victor + +Hi Victor, 1. Thank you. This was the issue, I am able to see the correct addresses now. 2. Yes, func1() is getting executed first, and I am just reading the input and placing the output in a separate buffer. But still the input gets corrupted before the func2(). I can try to print the addresses, to check whether it was overlapping with any other intermediate buffer. Regards, Shruti + +Hello Shruti, Did you do more investigation for 2) ? regards, Victor + +I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). + diff --git a/data2/text/range/0-5000/762723.txt b/data2/text/range/0-5000/762723.txt new file mode 100644 index 0000000000000000000000000000000000000000..95a3e1a8634a8f4777532e95630d127140e25a14 --- /dev/null +++ b/data2/text/range/0-5000/762723.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: EVE application code does not execute on board + +Query Text: +Part Number: TDA2 Hi, I have created an application that should run on EVE. When I execute this application on EVE Simulator (ccs v5 Vayu simulator), it runs correctly and generates expected output. But when I try to run the same application on TDA2x board via emulator (ccs v7), it gets stuck at one point. I have some other applications, which run seamlessly through both simulator and emulator, so does not seem to be hardware issue. What are the differences between simulator and emulator environment? Is there anything in the code that needs to be changed or configured? Regards, Shruti + +Responses: +Hi Shruti, If it works on the simulator then generally it should work on the emulator. Where did it get stuck ? Please make sure you follow all the instructions in paragraph 3.6 of the eve_sw_getting_started.pdf of the EVE sw release, especially set EVE_SW_CONFIG macro to 1 in TDA2xx_multicore_reset.gel file. regards, Victor + +Hi Victor, The code works fine with the simulator. But when I run it onto the board, it gets stuck after one block of BAM execution. Can you help me figure out the problem? I tried adding the code one by one. There is a lookup table implemented in the function, and when I comment the lookup table loop, the code runs on the board. It is a simple lookup table similar to the ones given in TIs examples. The same lookup table works with another application correctly. Can this be some illegal memory access issue? or some configurational issue? Regards, Shruti + +Hi Shruti, You said it gets stuck. If you halt the CPU, where the program counter points to ? Or is the ARP32 crashed and you cannot even reconnect to it ? If it crashed, it could be that that the VCOP error register got set and if you don't clear the error bit, before VCOP is ran again, it will cause ARP32 to disconnect. You can monitor the state of the vcop_error register by selecting the Code Composer menu View->Register and click on VCOP_Status_Registers. if any bits of the vcop_error register is set, you need to clear it by writing the same value again. If you don't do that, next time, VCOP is executed, ARP32 will disconnect. Please refer to the EVE programmer's guide section 9.3 for meaning of the vcop_register's fields. regards, Victor + diff --git a/data2/text/range/0-5000/763342.txt b/data2/text/range/0-5000/763342.txt new file mode 100644 index 0000000000000000000000000000000000000000..bc5cf7174c640dc84763328d39d002850f9b57a0 --- /dev/null +++ b/data2/text/range/0-5000/763342.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA2x EVM power cord + +Query Text: +Part Number: TDA2 Hi, I purchased an tda2 evaluation module kit and i need to buy a power supplier. the shop recommends: Recommended Power Supply Options 12V, 5A, 65W compatible wall supplies Spectrum Digital Part# 701029-0001 CUI Inc. - p/n SDI65-12-U-P5 CUI Inc. - p/n SDI65-12-UD-P5 CUI Inc. - p/n SDI65-12-U-P6 CUI Inc. - p/n SDI65-12-UD-P6 Volgen America/Kaga Electronics USA - p/n KTPS65-1250DT-3P-VI-C-P1 But i need it quite urgently- can i purchase a power cord from anyone in Israel? Can i just use a random power cord that supplies the same V? also, is it the same power supplier as the TDA2 regular board? Thanks, S + +Responses: +Hi Stav, you can use a power supply with the following specs (check here: www.ti.com/.../TDA2EVM5777 ): 12V DC output 5A output Positive inner and negative outer terminals Female barrel with 2.5mm or 2.1mm inner diameter and 5.5mm outer diameter, insertion depth is 8.85mm Regards, Yordan + diff --git a/data2/text/range/0-5000/763368.txt b/data2/text/range/0-5000/763368.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0bfa111d62876a5e1ae169d4f6c9338794168b0 --- /dev/null +++ b/data2/text/range/0-5000/763368.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: Vlib old version + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi Where can we find VLIB version for host emulation？The latest VLIB version does not support host emulation, but we can not find old version of VLIB. 3.6.2 Installing VLIB package for host emulation Object detection source package relies on VLIB source package to build the target in host emulation mode. Install VLIB package and link the pre-built host emulation VLIB libraries against Object detection module. After installing VLIB, set the environment variable to “VLIB_HOST_INSTALL_DIR” to the installed directory like \packages + +Responses: +This is only available as part of the source release. If you need the source release, you can contact your local TI representative. + diff --git a/data2/text/range/0-5000/763722.txt b/data2/text/range/0-5000/763722.txt new file mode 100644 index 0000000000000000000000000000000000000000..d73a92a9ce71fc0d041ae1affba900d1af87ff7e --- /dev/null +++ b/data2/text/range/0-5000/763722.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: TIDL: How can I get DataQ value for an output tensor? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi guys, I have been studying TIDL for a while and after getting some good understanding on it now I am adding a new object detector into TIDL_OD example. TIDL_OD implemented SSD detection method but I removed SSD from it and added a Yolo V2 like detector on the base network. So now I got the output tensor from it whose size is [1 x 40 x 18 x 32] and I need to parse those blob to come up with coordinates of bounding boxes. The real problem is that I need to convert those numbers into floating values. So I dig into some threads discussing this issues. In the end, the conclusion is two piece of information. one from User Guide of TIDL and one from this web site. Here is the answer. ---- 10. What is Q format of output? The output is 8 bit fixed point representation with the scaling factor. The 8 bit value can be divided by scaling factor to get the floating point value. The scaling factor (in Q8 format) is available in dataQ of (sTIDL_DataParams_t). Import tool also prints this information for sampledata as “Out Q : X”. Related E2E query : e2e.ti.com/.../642684 ---- But when I print out the following variables from net structure right after running TIDL algorithm. It shows all zeros on dataQ fields. (sTIDL_DataParams_t). From the source code, vision_sdk/apps/src/rtos/alg_plugins/tidl/tidlLink_algPlugin.c At the function AlgorithmLink_tidlProcess(), I added the following printing lines: i from 0 to 28 , since I have 28 layers. Vps_printf("net->TIDLLayers[%d].outData[%d].dataQ = %d\n", i, 0, net->TIDLLayers[i].outData[0].dataQ); Vps_printf("net->TIDLLayers[%d].inData[%d].dataQ = %d\n", i, 0, net->TIDLLayers[i].inData[0].dataQ); I need to know that dataQ value to calculate a scale factor to convert those 8bit quantized values into floating values. Can you help me on how I can get those dataQ values for my last convolutional layer? And if I run a statical tool called quantStatTool (exe binary), it print out the Out Q values, basically how you to print those Out Q values? Thanks in advance! + +Responses: +Please find the dataQ information as part of outArgs typedef struct { IVISION_OutArgs iVisionOutArgs; int32_t numOutBufs; int32_t dataQ[TIDL_NUM_OUT_BUFS]; } TIDL_outArgs; + +Hi Kumar, Thanks a lot for your answer. Indeed I already checked the outArgs struct too since I guessed that it might has the dataQ values for output buffers (i.e., output tensors). I thought that it is the right answer, but when I print out dataQ[0] to dataQ[15] (since there are 16 buffers), only the first value has some output numbers all others (15) are zeros. This is fine since I have only one output buffer (convolutional layer), but dataQ[0] value begins from a value of 1402 and goes down to 42, and sometimes shows 0. 0 dataQ value is something wrong, isn't it? Anyway, thanks for confirming my hypothesis is indeed correct. What do you think about those zeros dataQ values sometimes? + +1402 looks reasonable to me. DataQ ero mean almos all the tensor values are zero. Is the input image is dark r staurated during this Data zero case. Are you getting the expected output during import. If yes, try to run import with more images. + diff --git a/data2/text/range/0-5000/763797.txt b/data2/text/range/0-5000/763797.txt new file mode 100644 index 0000000000000000000000000000000000000000..7763f16ff68b0bee324713a469c8b54571faf860 --- /dev/null +++ b/data2/text/range/0-5000/763797.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2PXEVM: Compiler issues while porting Linux application to A15(which runs on SYSBIOS) + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: SYSBIOS, TDA2 Tool/software: TI C/C++ Compiler Hi, As discussed under "e2e.ti.com/.../2823318 creating the new thread related to compiler issues. With the help of the patch we could compile the sources for A15 core both in module as well as in usecase. The MAKEFILE.MK file what we have at our end doesn't contain anything related to "AUTOSAR_APP". So, I haven't included those changes. ifeq ($(AUTOSAR_APP), yes) -APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 +APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_a15_0)/app_libs.aa15fg endif For your reference we are using below version of SDK "PROCESSOR_SDK_VISION_03_03_00_00" You mentioned that you are running bios on A15 but your module uses linux calls...... Yeah, but can't we not overcome those compiler errors ?redefinition errors being ---------------------- /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/posix/mqueue.h:63:0: error: "O_CREAT" redefined [-Werror] #define O_CREAT 0x200 /* TODO: sys/fcntl.h? */^ In file included from /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/sys/fcntl.h:4:0, from /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/fcntl.h:1, from /opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/modules/LibDLT/dlt_user.c:43: /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/sys/_default_fcntl.h:37:0: note: this is the location of the previous definition #define O_CREAT _FCREAT ^ ----------------------------- If you are running bios on A15 then all those answer does not hold true.... Yeah, I understand the answer doesn't hold true if either SYSBIOS runs of A15. Having it in mind I would like re-iterate the set of queries to proceed further. As Pthread support is available for A15, building pthread application for SYSBIOS would still be possible? As mentioned our application had got sockets and FILESystem calls in place, Do we have support for FileSystem and sockets on SYSBIOS? If So, how could we make use of it or do we need to look for corresponding alternatives in it? And having said Sample being the server component, there are the other applications which communicates to Sample via Sockets or through PIPES or any file based operations. Being Sample built for A15 core, does the other applications which has to communicate to Sample should also be built for A15?or IPC(shared memory) mechanism suggested still holds good for communication? So you have to try with tda2px_evm_linux_all cfg.... Could please elaborate on it, what excatly should be considered from tda2px_evm_linux_all cfg.file reason being tda2px_evm_linux_all cfg.file had got A15_TARGET_OS to Linux. Pradeep + +Responses: +Hi Yes, you can get Pthread support on A15 Bios Socket APIs are not supported on Bios, but native FATFS file system can be supported IPC is supported in a different way and not using socket APIs, BTW, which Linux code you try to port on A15 Bios? regards, Shiju + +Hi Shiju, BTW, which Linux code you try to port on A15 Bios? To be more specific we are trying to port DLT_DAEMON(which is a logging framework built for linux platform which had got most of the POSIX related calls int it) were in other components/applications use dlt interfaces to log the data to DLT-DAEMON via pipes or shared memory, and DLT-Daemon would route the data to client which runs on host machine using sockets. so, in order to acheive that we are trying to port DLT to SYSBIOS using vision SDK. ------------ Socket APIs are not supported on Bios... Then how could we communicate to external host machine(windows)? but native FATFS file system can be supported.. Could you please refer us the sample example from Vision SDK package which has got native FATFS in use? ------------ IPC is supported in a different way and not using socket APIs, .. could you please elaborate what do you mean by IPC is Supported in different way? + +Hi You can use Ethernet to communicate with external host machine(windows) for FATFS, please refer \vision_sdk\apps\src\rtos\usecases\tidl UC, it read data from SD card (using FAT FS) Please refer \vision_sdk\links_fw\src\rtos\links_common\ipcOut and ipcIn modules regards, Shiju + diff --git a/data2/text/range/0-5000/763798.txt b/data2/text/range/0-5000/763798.txt new file mode 100644 index 0000000000000000000000000000000000000000..33a619bc402868ced9eb12b16ea4b19f4d86f20f --- /dev/null +++ b/data2/text/range/0-5000/763798.txt @@ -0,0 +1,11 @@ +Ticket Name: Linux/TDA2PXEVM: Streaming data over USB + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: AWR1243, TDA2 Tool/software: Linux I have a TDA2PxEVM board mated to a custom board with cascaded AWR1243 radar chips. Currently we are streaming all the raw data from the EVM to a laptop via Gigabit Ethernet, but the data rate of the cascaded chips exceeds what Gigabit Ethernet can handle, so I want to use USB 3.0. Eventually we will do processing in the TDA2px, but for now we want to log and process the data on the laptop. I was told previously that the best way to use USB is to run Linux on the A15 core. I have a Ubuntu 18.04LTS development system. I am new to USB development and would like more specific advice about the best (and easiest) way to stream data over USB 3.0 and achieve as close to the 5 Gbps theoretical limit as possible. Questions: Is it possible/advisable to use Linux USB gadget drivers to send Ethernet traffic over USB? If so, perhaps that would minimize needed modifications to the existing code. Which is the best choice of gadget driver type to use that is supported? It appears that there are several different possible types of gadget drivers. How would I configure and use the gadget driver approach? Or, is there a better USB approach? Are custom drivers needed for the embedded or host? What practical data transfer rates should be achievable over USB 3.0? As a stopgap solution, I assume it would be easy to write to a USB SSD drive from embedded Linux? Are there any steps I would need to take to enable that (e.g. drivers to install)? Thanks! + +Responses: +Is it possible/advisable to use Linux USB gadget drivers to send Ethernet traffic over USB? If so, perhaps that would minimize needed modifications to the existing code. + Explore the option of g_ether gadget driver. It emulates ethernet over USB and you can use that to connect to PC Which is the best choice of gadget driver type to use that is supported? It appears that there are several different possible types of gadget drivers. For streaming usecase, you can use USB UVC gadget(which will have ISO endpoints, which is in theory suited for streaming usecase). You can use g_ether gadget driver(Network overhead would be there, but minimal code change for you). You can use Mass storage gadget device g_mass_storage (CONFIG_USB_MASS_STORAGE kernel config) How would I configure and use the gadget driver approach? As a stopgap solution, I assume it would be easy to write to a USB SSD drive from embedded Linux? Are there any steps I would need to take to enable that (e.g. drivers to install)? 1. Make sure USB controller at TDA2x side configured as gadget. You can check here for example : 2. Enable USB Mass Storage Gadget driver with kernel configuration: as mentioned in this link : linux-sunxi.org/.../Mass_storage 3. You can enable USB ethernet driver as mentioned here : processors.wiki.ti.com/.../Networking_over_USB Or, is there a better USB approach? Are custom drivers needed for the embedded or host? Custom drivers would take a lot of effort from both TDA2x end and the PC end. Better would be go with Mass Storage Gadget or Gadget Ethernet over USB, as mentioned above. What practical data transfer rates should be achievable over USB 3.0? Please refer here for USB performance in TDA2x : www.ti.com/.../sprac21.pdf + +This is the link to TDA2 performance document (the forum engine did not displayed it correctly in Dwarakesh's post): proddms.itg.ti.com/.../sprac21.pdf Regards, Yordan + diff --git a/data2/text/range/0-5000/763885.txt b/data2/text/range/0-5000/763885.txt new file mode 100644 index 0000000000000000000000000000000000000000..1671a511447ba21c278a1cf8ec600b67e57e2f7b --- /dev/null +++ b/data2/text/range/0-5000/763885.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: Create an RTSC project in ccs, where the cfg file calls other .cfg files. How do you do this? + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Create an RTSC project in ccs, where the cfg file calls other .cfg files, how to do this. For example, there is xdc.loadCapsule("bspCommonBIOS.cfg") in captureVip.cfg; I put both cfg files in the project directory at the same time, or how do I need to deal with them? + +Responses: +Hi, can you check it that can help you: processors.wiki.ti.com/.../Files_in_CCS_Projects Regards, Yordan + diff --git a/data2/text/range/0-5000/763914.txt b/data2/text/range/0-5000/763914.txt new file mode 100644 index 0000000000000000000000000000000000000000..43bd1e29152838c3877ec94553d2de6f5a03b376 --- /dev/null +++ b/data2/text/range/0-5000/763914.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS/TDA2: In ccs project/RTSC TOOLS/Platform/edit/view view ti.platforms.evmDRA7XX without this platform file + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Use XDCtools version:3.32.1.22_core, Targets: ti.targets.arm.elf.M4 Platforms:ti.platforms.evmDRA7XX In ccs project/RTSC TOOLS/Platform/edit/view view ti.platforms.evmDRA7XX without this platform file + +Responses: +Can you elaborate more what the issue here is? Is it not running with the default selection/configuration? thanks, Alex + +Hello, Friendly reminder, please send more details and we can discuss this further. thanks, Alex + diff --git a/data2/text/range/0-5000/764356.txt b/data2/text/range/0-5000/764356.txt new file mode 100644 index 0000000000000000000000000000000000000000..daeca1b17c20c251bb59cbcd473abd9ccd8e3c6c --- /dev/null +++ b/data2/text/range/0-5000/764356.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: Error in TI IVAHD H.264 Encode function + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi TI Experts, I am trying to encode a frame using ti ivahd encoder api but i am getting error that means: Active frame region dimensions are not matching with the encoding frame dimensions I am using APIs in the same sequence as suggested in H264enctest.c sample application. Also i am not giving input frm some file but some data as given below: #pragma DATA_SECTION(".input_buffer") uint8_t luma_buffer[176*144]; #pragma DATA_SECTION(".input_buffer") uint8_t chroma_buffer[176*144/2]; memset(&luma_buffer,0x22,sizeof(luma_buffer)); gInputBufDes[0].planeDesc[0].buf = (XDAS_Int8*)luma_buffer; memset(&chroma_buffer,0x22,sizeof(chroma_buffer)); gInputBufDes[0].planeDesc[1].buf = (XDAS_Int8*)chroma_buffer; result = H264ENC_encodeFrame(m_encHandle[0],&gInputBufDes[0],&gOutputBufDesc[0],&gInArgs[0],&gOutArgs[0]); real_error = status.videnc2Status.extendedError; real_error = 0,that suggests Active frame region dimensions are not matching with the encoding frame dimensions. If anybody suggest which parameter settings i am getting wrong or the sequence is not correct. Error suggests mismatch in frame dimensions,since i am currently working using qcif so everywhere i am setting width*height = 176*144. Thanks in advance Regards Mayank + +Responses: +Hi, Have you tried with encoder link of vision sdk? Whats your observation there? Regards, Anuj + +Hi Mayank, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/764405.txt b/data2/text/range/0-5000/764405.txt new file mode 100644 index 0000000000000000000000000000000000000000..3747f33588657f59805d382fa0ba512814d9a253 --- /dev/null +++ b/data2/text/range/0-5000/764405.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2PXEVM: RTOS/TDA2PXEVM: Support for multiple NetworkRx link instances + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi We are working on TDA2PX based Hw and vision SDK version is SDK_03_03_00_00 .Here , when we try to initiate two NetworkRx link in usecase for testing we want to send the image in one port and sensor data in another port, second NetworkRx link fails during the link creation time as below mentioned debug logs (attachment): … [HOST ]     15.723144 s: NSP GMAC: PHY 2 Found on MAC Port 0 [HOST ]     17.523851 s: NDK: Link Status: 10Mb/s Full Duplex on PHY 2 [HOST ]     17.723388 s: NDK: Link Status: No Link on PHY 2 [HOST ]     18.328951 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST ]     18.328981 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST ]     21.123589 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 … [HOST ] 33.475660 s: NETWORK_TX: NETWORK_TX: Server listening (port=29172) !!! [HOST ] 33.475873 s: SYSTEM: ERROR: No link registered at link ID [68] !!! When we further debug the code then find that, we can have maximum one NetworkRx link objects as per below mentioned sdk source code vision/platform/ti/tda2/links_fw/include/links_fw/include/link_api/networkRxLink.h #define NETWORK_RX_LINK_OBJ_MAX (1U) Can we support for multiple NetworkRx link instances in existing code base ? what are all the changes needs to be done to enable this, Is there any specific patches required for this feature. Can you please support on this ? Regards, Raj + +Responses: +Ti Raj Dual Ethernet port support was not available in VSDK 3.3 release. This is only supported with latest VSDK 3.6 (released on early Jan) please refer this link to download the same - www.ti.com/.../processor-sdk-tdax Mainly NSP package updated to support Dual Mac. VSDK also has some configuration changes and sample UC to support Dual Mac. you either move to VSDK 3.6 release or use the latest NSP package from 3.6. BTW, are you using both ports with static IP or dynamic IP config? we have an open issue for setting one port as static and other as dynamic IP. But both Static or both dynamic is functional. Regards, Shiju + diff --git a/data2/text/range/0-5000/764520.txt b/data2/text/range/0-5000/764520.txt new file mode 100644 index 0000000000000000000000000000000000000000..eed10ee57815e5051289af40b1fdceccf1b95089 --- /dev/null +++ b/data2/text/range/0-5000/764520.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: CONFIG_ARM_LPAE=n + +Query Text: +Part Number: TDA2 Tool/software: Linux am using tda2x evm i use this chain test my cnn (SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\hlos\usecases\nullSrc_display) i add CONFIG_ARM_LPAE=n in auto.cfg ,make clean then make linux make linux_install make -s -j depend make -s -j but when i restar the EVM have some problem follow is the log 2.777440] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 2.788399] devtmpfs: mounted [ 2.791566] Freeing unused kernel memory: 340K [ 2.796027] This architecture does not have kernel memory protection. /sbin/init: error while loading shared libraries: /usr/lib/libkmod.so.2: file too short [ 2.877469] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00007f00 [ 2.877469] [ 2.886647] CPU0: stopping [ 2.889368] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.84-00027-g018eb62-dirty #10 [ 2.897230] Hardware name: Generic DRA74X (Flattened Device Tree) [ 2.903348] Backtrace: [ 2.905827] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 2.913428] r7:c0931ef0 r6:20000193 r5:00000000 r4:c094f810 [ 2.919149] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 2.926406] [] (dump_stack) from [] (handle_IPI+0x184/0x198) [ 2.933829] r7:c0931ef0 r6:00000000 r5:00000000 r4:c092c424 [ 2.939545] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) [ 2.947143] r7:fa212000 r6:c0931ef0 r5:fa21200c r4:c09328ec [ 2.952857] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 2.960370] Exception stack(0xc0931ef0 to 0xc0931f38) [ 2.965442] 1ee0: 00000001 00000000 fe600000 00000000 [ 2.973655] 1f00: c0930000 c0686294 00000000 c081eb3c 00000000 c0931f60 c093250c c0931f4c [ 2.981867] 1f20: c0931f2c c0931f40 c0027f6c c0010540 60000013 ffffffff [ 2.988504] r9:c0931f60 r8:00000000 r7:c0931f24 r6:ffffffff r5:60000013 r4:c0010540 [ 2.996327] [] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) [ 3.004454] [] (default_idle_call) from [] (cpu_startup_entry+0x208/0x264) [ 3.013107] [] (cpu_startup_entry) from [] (rest_init+0x90/0x94) [ 3.020878] r7:00000000 [ 3.023433] [] (rest_init) from [] (start_kernel+0x400/0x40c) [ 3.030944] r5:c0982000 r4:c0982040 [ 3.034550] [] (start_kernel) from [<80008090>] (0x80008090) [ 3.041110] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00007f00 [ 3.041110] Regards Shuai + +Responses: +Hi Shuai, can you check the file /usr/lib/libkmod.so.2 on the rootfs? It is probably a symlink to a file which might be missing or corrupt. can you try to recreate the SD card following the Linux userguide and confirm it was created without errors. Regards, Yordan + diff --git a/data2/text/range/0-5000/764748.txt b/data2/text/range/0-5000/764748.txt new file mode 100644 index 0000000000000000000000000000000000000000..b57659ad28221b636b9fd93d619c3c88ce56906c --- /dev/null +++ b/data2/text/range/0-5000/764748.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2: How to disable the cores + +Query Text: +Part Number: TDA2 Hi Sir, How can disable power state, module state and clock state of the IPU2, GPU, IVA, EMIF2? Regards, Sagar + +Responses: +Hi Sagar, Can you please look at www.ti.com/.../sprac22.pdf Regards, Rishabh + +Hi Rishabh, Is there any other document which can explain to disable IP's power, clock, module state? Regards, Sagar + +Hi Sagar, You can refer to chapter 3 of www.ti.com/.../spruic2c.pdf Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Sir, As per this table, if I want to disable EMIF2 module only then which register should I have to configure? If I want to turn off all modules in the CD_EMIF module, then what should I do? Regards, Sagar + +Hi Sir, What does the meaning of N/A in the in clock domain? Regards, Sagar K + +Hi Sagar, You need to set CM_EMIF_EMIF2_CLKCTRL to turn off EMIF2. For clock domain turn off all modules and then turn off clock domain or put clock domain in HW_AUTO (clock will be gated automatically). Regards, Rishabh + +Sagar, PRM is the PRCM module controller itself. It does not fall under any clock domain. Regards, Rishabh + +As a side note, Sagar Kanade , you can download CTT for a good visualization on clock registers settings: Regards, Mariya + +Thanks Mariya. Sagar please use clock tree tool as suggested by Mariya. Regards, Rishabh + +Hi Rishabh, One last question. To put DSS in off state, which register I have to configure? Regards, Sagar K + +Sagar, You need to disable all modules and then clock domain. Search for _CLKCTRL and _CLKSTCTRL. Look at register manual for chapter 3 in TRM and you can find all registers. Start with DSS_CLKSTCTRL. Regards, Rishabh + +Hi Rishabh, Thanks for your support. If I called the PMHALResetAssert(PMHAL_PRCM_RG_IVA_RST); function to disable the IVA core, all the cores are in running state. I am not able to take control over any core. All are in running state. This is happened for the second ECU. Regards, Sagar + +Hi Sagar, I have already answered multiple questions in this thread. Kindly start a new thread with this specific question instead of having one generic thread with multiple questions. Please mark the posts that have answered questions as “This resolved my issue”. Thanks. Regards, Rishabh + diff --git a/data2/text/range/0-5000/764784.txt b/data2/text/range/0-5000/764784.txt new file mode 100644 index 0000000000000000000000000000000000000000..a8f1a5d8cc1e5a3d71564004104c99579fa37274 --- /dev/null +++ b/data2/text/range/0-5000/764784.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: The diagnostic function in TDAx + +Query Text: +Part Number: TDA2 Tool/software: Linux We know that the EMIF1 channel can support the 2-bit ECC DDR diagnostic function. We are worried that if the DDR has a 2-bit data error, it may cause the system to run out of track. How can SOC record this information? Our hardware design supports another MCU to communicate with the SOC through the serial port. But if the program runs away, communication may fail. For other types of diagnosis, we are worried about the same result. E.g：Dual error detection (SECDED) error correcting code (ECC) diagnostic of the on-chip RAM E.g：The L3 interconnect timeout . + +Responses: +Hi, One suggestion is to isolate the code communicating to the MCU to reside in on-chip memory. Thus, if the primary code communicating with DDR has a 2-bit error and impacts the program operation, the code running from on-chip memory would be able to detect and report to the MCU. Best regards, Kevin + diff --git a/data2/text/range/0-5000/764786.txt b/data2/text/range/0-5000/764786.txt new file mode 100644 index 0000000000000000000000000000000000000000..d5ed7786736f5be67ce545cda6d4d92e57252265 --- /dev/null +++ b/data2/text/range/0-5000/764786.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: DDR memory partition + +Query Text: +Part Number: TDA2 Tool/software: Linux Is there a recommendation for address division between the two channels of EMIF1 and EMIF2? When using two-channel DDR, can the software be designed to run the system only in the DDR of the EMIF1 channel? + +Responses: +Hi, If possible for your application, the recommendation is to interleave the two EMIFs to improve bandwidth . Please see section 18 of the following application note for more details: www.ti.com/.../SPRAC21 However, you can partition the memory such that the lower half (or upper half) of memory is all on EMIF1 or EMIF2. The application note mentioned above should give an example of how to set the EMIFs in interleaved or non-interleaved modes. If you have additional questions related to this, please let us know. Best regards, Kevin + diff --git a/data2/text/range/0-5000/764881.txt b/data2/text/range/0-5000/764881.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a349236741a4ba43e47e538be90d3be7a30a2cb --- /dev/null +++ b/data2/text/range/0-5000/764881.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: EVE: Buffer transfer between ARP32 kernel and VCP kernel. + +Query Text: +Part Number: TDA2 Hi, I have an application with three kernels, out of them kernel1 & kernel3 are in the kernel-C running on EVE_VCOP and kernel2 which is fully in natural-C running on EVE_ARP32. The execution graph is as follows: Input -> kernel1 -> kernel2 ->kernel3 -> Output. While executing kernel2, 'BAM_ARP32_computeWrapper()' function is called, wherein the buffers are used in ping pong format. So, the input and output buffer addresses are switched between IBUFHB, IBUFLB and IBUFHA, IBUFLA. The output of this kernel is passed as an input to the kernel3(). But, when I debug I see that kernel3() input address does not change according to the output. BAM has the responsibility to pass these buffer addresses but seems like it retains the addresses it got during kernel3_init() function. Is there any way to pass this addresses correctly at runtime? Also, I see that the input buffer address also toggles, but the output address of kernel1 is constant. So, will kernel2 take correct data in the alternate iterations? Regards, Shruti + +Responses: +Hi Shruti, For kernels running on EVE_VCOP, such as kernel 1 and kernel 3, it is normal that the addresses don't change. VCOP has a special memory mapping capability called ALIAS view, in which the addresses just need to point to image buffer A. The actual physical location is eventually determined by the buffer switch. Actually the upper bits are masked out, so what counts in the offset from the base address from image buffer A. For EVE_ARP32, ALIAS view is not supported so the processor needs to pass the correct addresses when calling kernel 2. So to me, the behaviour you are describing me is normal. regards, Victor + +Hi Victor, I think my problem is different. I have three Kernels running sequentially one after other. Kernel_1 (VCOP)-> O/P Buf1 ->Kernel_2 (ARP32) -> O/P Buf2 -> Kernel_3 (VCOP)-> O/P For Display Current Scenario: - Kernel_3 (VCOP) while initialization time has input as O/P Buf2 address (say Address 1). - ARP32 works in PING-PONG style. So for each block processing it toggles it's O/P buffer O/P Buf2(Say Address1 and Address2). Now my problem is - As Kernel_3 holds only single address (say Address 1) as input and it can not change to Address 2 at run time. So how to change run time input addresses for Kernel_3 to get proper inputs? + +Hi Shruti, Do you mean that all your kernels are called within one BAM node ? You will need to split into 3 BAM nodes. Node 1 executes kernel 1, Node 2 executes kernel 2 and Node 3 executes kernel 3. regards, Victor + +Hi Victor, No, they are not present in a single node. They are in 3 different nodes. Regards, Shruti + +Hi Shruti, I am affraid I don't understand the issue. Since kernel 3 is in a separate node, that executes on VCOP only, you don't need to change the address of the input since the buffer switch automatically takes care of which image buffer it accesses to, thanks to alias view. regards, Victor + +Shruti, Can you respond to Victor's queries? Regards, Anshu + +Shruti, Can you update us on this thread? Regards, anshu + +Shruti, I am closing this thread as we haven't heard back from you. Kindly re-open this thread if you have further questions. Regards, Anshu + diff --git a/data2/text/range/0-5000/765284.txt b/data2/text/range/0-5000/765284.txt new file mode 100644 index 0000000000000000000000000000000000000000..95642a88c9fd0569e9c62cc95c044816873d96a0 --- /dev/null +++ b/data2/text/range/0-5000/765284.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TI Deep Learning Library on C66x DSP and EVE: Support for original TensorFlow models + +Query Text: +Part Number: TDA2 Hello, Section 3.6.5 of the TI-DL Library User Guide from the most recent Vision SDK states that "TIDL supports slim based TensorFlow models". I am not aware of the exact difference between the TF and TF-Slim. But several Internet posts (including github.com/.../16182 suggest that the TF-Slim is now deprecated and not to be used for new development. There are two questions: 1. Do algorithm developers need to use TF-Slim API calls while creating custom models? 2. Can algorithm developers use the main/original TF API while creating custom models? Are these models supported by the model import tool? Thank you. + +Responses: +Slim is a high level API for tensorflow operators. As per tensorflow team, Slim will be replaced with keras hih level APIs in tensorflow 2.0 not in 1.x We have have validaed the only slim based mdoels. Even with Keras APIs based models or original TF layers based models most layes(Convolution , Inner producr, max Pool, eltwise ) would work in currentl import tool. there may some chnage needed the in impor tool for other oprators. Since source code for import ool is part of release package user can update tool for these mdoels. We are not planning to update import toll for this + diff --git a/data2/text/range/0-5000/765398.txt b/data2/text/range/0-5000/765398.txt new file mode 100644 index 0000000000000000000000000000000000000000..06c3a485459ac2343b8d9a3bdd6fdfe24200661e --- /dev/null +++ b/data2/text/range/0-5000/765398.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2: sxgFrmcpy and Display buffer : image data modify issue + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, My HW is TDA2x CPU board + Vision Board + daughter board + OV1652x sensor and SDK is PROCESSOR_SDK_VISION_03_04_00_00 with TDA2XX_EVM_LINUX_ALL define. I select use-case "4CH VIP LVDS capture + SGX MOSAIC + DISPLAY" . I changed the code like below steps: 1. I found the image capture buffer address in "SgxFrmcpyLink_drvDoProcessFrames" function, image point is "pVideoCompositeFrame->bufAddr[0][0]" 2. I try to modify the image data or clear data buffer in this function. ex. compostive_video_buf_addr = pVideoCompositeFrame->bufAddr[0][0]; memcpy(compostive_video_buf_addr, 0x00, 115200); or for (int i=0; i<57600; i++) compostive_video_buf_addr+i = 0xBBBBBBBBBBBBBBBB; 3. compiler and select use-case, 4.TV shows a strange image, I attached the image file. The image seems noisy and mix up the original capture image. I have no idea whta's happen and how to fix it. Ranny. + +Responses: +Hi, If you are modifying the buffer data then the output will be noisy. Still can you check inside display link when you get the data then what the value inside that. Is it same as you changed or something else. Regards, Anuj + +Hi Sir, No, I check the display link, the data isn't changed as I expect. Even I print out the data buffer in sgxFrmcpy link before I modify the data, the data is not correct either, most time is 0. + +Hi, Can you please let me know why are you changing the data. Whats the purpose for it. Regards, Anuj + +Hi Sir, Our customer asks us to do that, They need a simple demo with some image modify. I am looking for a faster way to reach the request for their demo. Thanks. Ranny. + +Hi, Can you modify the data inside display link only. Just for experiment modify the data in capture link also and check whats coming in your display link. It will be hard to identify that your changes are coming into display or not. As after modification you will get a strange image. Regards, Anuj + +Hi Sir, It's working that modifying image data inside display link, but TV display becomes serious lag. Thanks. Ranny. + +Hi, If you do some memory oprartion then it will increase the processing time of that link hence of the chain. Try to modify a small region only. Regards, Anuj + +Hi Sir, ok, thanks. Ranny. + diff --git a/data2/text/range/0-5000/765603.txt b/data2/text/range/0-5000/765603.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2b1a6a250576a95d446593e088f16e5f0322407 --- /dev/null +++ b/data2/text/range/0-5000/765603.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: PROCESSOR_SDK_VISION_03_05_00_00 TIDL , CAFFE-JACINTO MODEL IMPORTING ISSUE for .BIN file generation + +Query Text: +Part Number: TDA2 Hello Sir, I am trying to import the caffe jacinto example networks from github. I am following the TIDL_library_User Guide.pdf. section 3.6.4 Issue: 3. Now run the “importTestCases.bat” from the below path. a. {TIDL_install_path}\utils\tidlModelImport After following till step-3, Bin files are not created in the respective directory mentioned in the Process. when i tried to look to the log.txt file then it has message "Couldn't open inputParamsFile file: ..\..\test\testvecs\config\caffe_jacinto_models\trained\image_classification\imagenet_jacintonet11v2\sparse\imagenet_jacintonet11v2_iter_160000.caffemodel" I have cross-checked the path many times, but their is no issue in that. I have even checked the import text file for OutputNetfile path for .bin file, and it has also the same path,where it should generate the .bin file. Kindly do needful. Thanks and Regards, Vyom Mishra + +Responses: +Hi Vyom, you mentioned that you checked the path, but I noticed that when I clone the caffe_jacinto repo it is in directory "caffe-jacinto-models" while the document and import tool expect "caffe_jacinto_models. Can you confirm that your directory is with underscores and not dashes? Regards, Yordan + +Hello Yordan, I had edited the same before only. I have found the reason for the above thread. So Now I am able to create .bin file. Solution: I just copied RE.TIDL folder to other drive and tried to execute the .bat file, it worked. Reason I found is that, due to long paths of the folder and files, the application is not able to execute those files. So it's better to move TIDL folder to the new drive to generate .bin files. Thanks and Regards, Vyom Mishra + diff --git a/data2/text/range/0-5000/765664.txt b/data2/text/range/0-5000/765664.txt new file mode 100644 index 0000000000000000000000000000000000000000..6180ac268a6ec741de9d29e1d7fdd9be49668e9d --- /dev/null +++ b/data2/text/range/0-5000/765664.txt @@ -0,0 +1,105 @@ +Ticket Name: Linux/TDA2: QSPI 128MB 2 instances Read/Write error + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear Experts, We are using a 1Gbit(128MB) QSPI Flash(S70FL01GS) with kernel 4.4(VisionSDK 3.2). This chip is built from 2 64MB QSPI instances with 2 chip select.(correctly connected to TDA2's CS0 and CS1) When we operate on 2 instances, read/write result is incorrect. We add 2 64MB instance in linux device tree, and 2 instances are correctly recongnized by kernel from log. Here is some of our test notes: 1. kernel detect 2 chips. we only operate on any single chip, it works well. 2. kernel detect 2 chips, we read from 1, then write data to 2, then read again from 1, the result is incorrect. Read/write CS pin works well. Thanks & Best Regards! ZM + +Responses: +HI On our EVM we only have a single instance of SPI ,hence we have not validated this configuration(though it should work) Can you share the device tree snippet corresponding to the QSPI configuration From you description , you have verified that on your board the right chip select is being asserted when you access the 2 chips - please confirm Also, from your description, writes to chip2, is impacting the data present in chip1 - essentially implying that the 2 regions are being aliased, right? + +&qspi { + status = "okay"; + + spi-max-frequency = <76800000>; +#if 1 + m25p80@0 { + compatible = "s25fl512s"; + spi-max-frequency = <76800000>; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + + /* MTD partition table. + * The ROM checks the first four physical blocks + * for a valid file to boot and the flash here is + * 64KiB block size. + */ + partition@0 { + label = "QSPI.SPL"; + reg = <0x00000000 0x000040000>; + }; + partition@1 { + label = "QSPI.u-boot"; + reg = <0x00040000 0x00100000>; + }; + partition@2 { + label = "QSPI.u-boot-spl-os"; + reg = <0x00140000 0x00080000>; + }; + partition@3 { + label = "QSPI.u-boot-env"; + reg = <0x001c0000 0x00040000>; + }; + + partition@4 { + label = "QSPI.kernel"; + reg = <0x00200000 0x0500000>; + }; + partition@5 { + label = "QSPI.file-system"; + reg = <0x00700000 0x03900000>; + }; + + }; +#endif +#if 1 + m25p80@1 { + compatible = "s25fl512s"; + spi-max-frequency = <76800000>; + reg = <1>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + + /* MTD partition table. + * The ROM checks the first four physical blocks + * for a valid file to boot and the flash here is + * 64KiB block size. + */ + partition@0 { + label = "QSPI.Extern"; + reg = <0x00000000 0x04000000>; + }; + + }; +#endif +}; + Chip select pin is working correctly. Data read from chip is all zero if 2 chip is accessed. + +Hi Srirama, After onsite check, I found that chip select is not correct. Finally, I find a bug in Kernel QSPI driver: diff --git a/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c b/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c +index 3f225f959..89ec31848 100644 +--- a/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c ++++ b/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c +@@ -495,8 +495,8 @@ static void ti_qspi_enable_memory_map(struct spi_device *spi) + ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG); + if (qspi->ctrl_base) { + regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, +- MEM_CS_EN(spi->chip_select), +- MEM_CS_MASK); ++ MEM_CS_MASK, ++ MEM_CS_EN(spi->chip_select)); + } + qspi->mmap_enabled = true; + } +@@ -508,7 +508,7 @@ static void ti_qspi_disable_memory_map(struct spi_device *spi) + ti_qspi_write(qspi, 0, QSPI_SPI_SWITCH_REG); + if (qspi->ctrl_base) + regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, +- 0, MEM_CS_MASK); ++ MEM_CS_MASK, 0); + qspi->mmap_enabled = false; + } + Thanks & Best Regards! ZM + diff --git a/data2/text/range/0-5000/765669.txt b/data2/text/range/0-5000/765669.txt new file mode 100644 index 0000000000000000000000000000000000000000..e45807982e0df3220eab630391c8922b09a4baae --- /dev/null +++ b/data2/text/range/0-5000/765669.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: Issue with fps rate + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello There, I have below use case, Capture -> Dup Dup -> Alg1(EVE1) -> Alg11(DSP1) -> Merge Dup -> Alg2(EVE1) -> Alg22( DSP2) -> Merge Dup -> Alg3(EVE1) -> Alg33( DSP2) -> Merge -> Sync -> Alg_DmaSwMs -> Display Each algorithm links ( both EVE and DSP ) takes around 4 -6 ms to process one frame. So for sync link params are set as, syncDelta = 10 and syncThreshold = 40 Also there are no intermediate frame drops. Issue is whole chain is running at 50 fps 1080p resolution ( expected is 60+ fps same resolution) What can be the issue? ----------------------------------------------------------------------------------- [IPU1-0] 42.275605 s: [ CAPTURE ] Link Statistics, [IPU1-0] 42.275696 s: ****************************** [IPU1-0] 42.276459 s: [IPU1-0] 42.276550 s: Elapsed time = 13896 msec [IPU1-0] 42.276642 s: [IPU1-0] 42.276672 s: New data Recv = 60.23 fps [IPU1-0] 42.276947 s: Get Full Buf Cb = 50.8 fps [IPU1-0] 42.277130 s: Put Empty Buf Cb = 150.4 fps [IPU1-0] 42.277252 s: Driver/Notify Cb = 60.23 fps What can be the reason/s for less number for Get Full Buf Cb? ----------------------------------------------------------------------------------- I am using processor SDK 3.0 and TDA2x platform Attaching statistics logs for the reference. 7701.logs.txt Regards, Kajal + +Responses: +Hi Kajal, You are running multiple algorithms on the same core, EVE1 and DSP2, if it takes 4 to 6 ms on EVE for each algorithm, it will be too tight to run whole chain at 60fps.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/765687.txt b/data2/text/range/0-5000/765687.txt new file mode 100644 index 0000000000000000000000000000000000000000..12ff6e29a059b9ce6ac4bfac8efde3cf8cad9896 --- /dev/null +++ b/data2/text/range/0-5000/765687.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: Adaboost train + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio I used github.com/.../acf-jacinto train my data , when I used small amount of data to train,the model no problem.But if the positive image large (more than 10000), the adaboost going to happen stopping eraly. I changed the code, if not used cellSum to deal with the feature channel,the above situation would not happened,but the train weights cannot used in TDA2X object detecion .How can I deal with it or how train large dataset ? + +Responses: +I did not exactly understand the problem, but can you add one line after the line: github.com/.../acfJacintoTrainTest.m Please add the following and then do training: opts.nPos=10000; %num positive to be collected + +Thanks for you reply. Add the opts.nPos can't solve the problem. I use opts.pPyramid.pChns.pFastMode.enabled=1; %default: 0 Adaboost early stopping,train log as follows Sampling windows completed=100.0% [elapsed=35.4s / remaining~=0.0s] Sampled 30000 windows from 2048 images. Done sampling windows (time=37s). Extracting features... done (time=14s). Training AdaBoost: nWeak= 32 nFtrs=2560 pos=10150 neg=30000 i= 16 alpha=5.000 err=0.000 loss=9.03e-34 stopping early Done training err=0.0000 fp=0.0000 fn=0.0000 (t=0.3s). Done training stage 0 (time=119s). --------------------------------------------------------------------------- Training stage 1 Sampling windows completed=100.0% [elapsed=123.8s / remaining~=0.0s] Sampled 10000 windows from 10176 images. Done sampling windows (time=126s). Extracting features... done (time=13s). Training AdaBoost: nWeak=128 nFtrs=2560 pos=10150 neg=30000 i= 16 alpha=5.000 err=0.000 loss=1.80e-35 stopping early But if used opts.pPyramid.pChns.pFastMode.enabled=0; %default: 0 Adaboost train OK. On the pFastMode.enabled = 1, The adaboost train easy to appear with early stopping on my training sample. How do I handle this situation?(I check the code in chnsCompute.m,it use cellSum to deal with channel feature,Maye be caused it?) + +I am not sure about the reason for this issue as I have not faced this with the datasets that I have tried. Question 1: As I understand, this issue happens only if your positive samples are more than 10000. Can you try to manually select a smaller set of positive samples, so that this issue is not there? Is this an acceptable solution. Question 2: As I understand, you are able to train properly if you set: opts.pPyramid.pChns.pFastMode.enabled=0; Have you tried using the output descriptor (trained with this modification) in TDA2x object detection? + +Hi @user5920690 , We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/766060.txt b/data2/text/range/0-5000/766060.txt new file mode 100644 index 0000000000000000000000000000000000000000..e17a3df501d347b1cfd1531f079858d010565051 --- /dev/null +++ b/data2/text/range/0-5000/766060.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: tda2 QSPI interface + +Query Text: +Part Number: TDA2 Tool/software: Linux Can the tda2 QSPI interface support SDR or DDR mode communication? + +Responses: +Hi, QSPI is used to interface with QSPI flash. EMIF is used to interface with DDR. Regards, Rishabh + +Hi，Rishabh You mean the TDA QSPI interface only supports SDR, right? Because I found some SPI Flash ICs can support the following modes: Single Data Rate (SDR) Double Data Rate (DDR) + +Hi, If think you are referring to single and quad bit mode. QSPI supports both. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +I have already learned through other channels,TDA does not support SPI DDR mode。 thank you。 + +Hi, Can you please elaborate on the solution and “other channels “. Thanks. Regards, Rishabh + diff --git a/data2/text/range/0-5000/766270.txt b/data2/text/range/0-5000/766270.txt new file mode 100644 index 0000000000000000000000000000000000000000..963d1e40930ad2554c3dfd627c955e6825a5e8e5 --- /dev/null +++ b/data2/text/range/0-5000/766270.txt @@ -0,0 +1,10 @@ +Ticket Name: Provide MLBP documentation on TDA2 + +Query Text: +Other Parts Discussed in Thread: TDA2 hi Can you provide MLBP documentation on TDA2?Thank you. + +Responses: +Hi, Chen Melina, MLB is documented for DRA devices in the TRM book, chapter 24.12: Regards, Mariya + +Hi Mariya Thank you very much for your kindly support. + diff --git a/data2/text/range/0-5000/766672.txt b/data2/text/range/0-5000/766672.txt new file mode 100644 index 0000000000000000000000000000000000000000..be4973f121e1bd1ab9497afe9c4ada21a1037ccd --- /dev/null +++ b/data2/text/range/0-5000/766672.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: TDA2SX EMIF DDR3 + +Query Text: +Part Number: TDA2 Hi. We are ging to use this IC. So can we use only one emif1 interface with DDR3 or we must use both emif1 and emif2 with DDR3? Thnks. + +Responses: +Hi, You can use only one EMIF as well depending on the use case requirements. Regards, Rishabh + +Hi Yuri, in addition to what Rishab said: if you want to use only EMIF1 or EMIF2 you need to correctly configure the LISA_MAP registers in DMM. This is explained in section “Addressing Management with LISA” of the TDA2x TRM. Take also into account that when you use only one EMIF, the max SDRAM size is 2GB. Regards, Yordan + +Hi Yordan. I have a little question. In TRM written " In this example, assume there is 1 GiB of external memory evenly spread onto two address spaces. The address range for address space 0 must start at offset 0x2000_0000 (see Table 15-19)." Summary address space is 1 GiB in table 15-19. How can I connect 2 GiB memory to EMIF1? I want to use only EMIF1 with ECC too. I want to use 2 ICs MT41K256M16 and one IC MT41K512M8 for ECC. Is that correct configuartion? Regards, Maxim. + +Hi, If you want to use 2 GB DDR, you should set 0x7 as SYS_SIZE in LISA_MAP. For the question related to hardware parts please start a new thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/766835.txt b/data2/text/range/0-5000/766835.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce97aa71c32d88121ebeb287c15bdda5e7eeb11d --- /dev/null +++ b/data2/text/range/0-5000/766835.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TDA2P and TDA2SX + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA756, , Please help us to clarify follwoing questions: 1. TDA4 product planning and datasheet release progress? 2. DRA756 and TDA2S development board should be the same ? As we know, DRA756 focus on car entertainment, TDA2X focus on ADAS, we develop series product based on DRA756 development board, shall we use DRA756 Demo Board to develop partial funcfuntion for TDA2X ADAS ? 3. TDA2X Model confirmation: We develop sensor fusion based on TAD2P-ACD, we know TDA2P is just prototype from printscreen of TDA2x datasheet. Shall we use TDA2SXTB at mass production phase? Or we get wrong information, TDA2P-ACD and TDA2SXTB are both different orderable model of mass production. Which performance is better for TDA2P-ACD and TDA2SXTB ? Functional safety certification product model is TDA2P-ACD or TDA2SXTB ? + +Responses: +Hi Joseph, 1. TDA4 is under development. Initial datasheet is expected to be available next week. 2. Yes, you can use same EVM. 3. TDA2P-ACD and TDA2SXTB are both different orderable models of mass production. Note that they are in different packages... Device evolution stage marking is on the first position (see Device Naming Convention) Thanks, Dian + +Please provide website link of TDA2SXTB datasheet, if TDA2SXTB datasheet is same with TDA2, we have it; + +Hi, Yes the datasheet is the same. Regards, Rishabh + diff --git a/data2/text/range/0-5000/766948.txt b/data2/text/range/0-5000/766948.txt new file mode 100644 index 0000000000000000000000000000000000000000..29586a1adca776501691fa5b7da409444e6cb01b --- /dev/null +++ b/data2/text/range/0-5000/766948.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA2: EVE and DSP Utilization to run Network Layers in TDA2x/TdA3x + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hello Sir, I need to know, how to split the models across the EVEs and DSPs. Example how to utilize the 2 EVEs sequentially, utilizing 2 EVEs in parallel, EVE followed by DSP and other such configurations. I have deployed Caffe_Jacinto_SSD model on TDA2x by following TIDL_LIBRARY_USER_GUIDE.pdf to split Network layers through making some small changes in "LayergroupId" to run the model across EVE's and DSP's. Kindly suggest some important documents to understand all the configurations, their Implementations and gain Expertism in splitting Networks across EVE's and DSP's. Thanks and Regards, Vyom Mishra + +Responses: +Hi Vyom, can you check FAQ #21 and #22 in TIDeepLearningLibrary_UserGuide.pdf and see if they can help you? Regards, Yordan + +Hello Sir, I have mentioned above that, I have already deployed SSD by splitting it across the EVE and DSP, by following the FAQ 21 and 22 only. So, I am requesting you to provide more on it, If there are some more documents available, to explore. Thanks and Regards' Vyom Mishra + +Hi Viyom, Can you clarify you question further. You mentioned that you could deploy network by setting layer group ID. Is your your question specific to uses case development for the network or optimally setting layer group ID + +Hello Sir, Basic splitting of the SSD model across EVE and DSP is done by refering the User Guide(FAQ 21 and 22). Now I need your suggestions for below queries. How to utilize the 2 EVEs sequentially, utilizing 2 EVEs in parallel, EVE followed by DSP and other such configurations. Kindly suggest some important documents to understand all the configurations, their Implementations and gain Expertism in splitting Networks across EVE's and DSP's. Thanks and Regards, Vyom Mishra + +Dear Sir, I have the following queries with respect to my question above. 1. If model is floating point, In TIDL is the model converted to fixed point for inference on DSP as well? 2. Can the intermediate output of DSP be given to EVE? May not be if DSP output is floating point. Pl confirm. ex: If I have model designed and grouped to run as EVE->DSP->EVE->DSP 3. Any limitations allocation of layerGroupId in import Config 4. Is there a standard way of optimally setting layerGroupId, other than what we know from used guide. Any other doc/experiments Thanks and Regards Vyom Mishra + +1. yes. 2. Yse you can pass output of DSP to EVE. DSP also computes CNN layer in fixed point 3.No 4. Try to run all the convolution layers in EVE and Detectionoutput layer in DSP. Other layers you can either run DSP or EVE. + diff --git a/data2/text/range/0-5000/766982.txt b/data2/text/range/0-5000/766982.txt new file mode 100644 index 0000000000000000000000000000000000000000..94e883b8364a398abb0f8861383cacb36fdc2d18 --- /dev/null +++ b/data2/text/range/0-5000/766982.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Flexray Controller? + +Query Text: +Part Number: TDA2 Hi Our system design requires TDA2 to connect to Flexray communication network. From Datasheet and Technical Reference Manunal, TDA2 itself does not contain Flexray Controller. Do TI have a proven solution? Thank you. + +Responses: +Hi Chen, One potential solution is www.fujitsu.com/.../um-mb88121-am15-11201-1e.pdf which converts SPI to Flexray. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/767045.txt b/data2/text/range/0-5000/767045.txt new file mode 100644 index 0000000000000000000000000000000000000000..82b70fd838eeb1ed70002acc7233fc859561955b --- /dev/null +++ b/data2/text/range/0-5000/767045.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: TDA4x release / MP schedule + +Query Text: +Part Number: TDA2 Hi, Our customer plan to use TDA4x for the Automotive ADAS applicaiton. We want to know when it can release and mass production? thanks very much. + +Responses: +Hi Leo, Please get in touch with your TI representative for this detail. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/767065.txt b/data2/text/range/0-5000/767065.txt new file mode 100644 index 0000000000000000000000000000000000000000..d433f89a0c1f3aacdcda97ed66ae7ede81e718dd --- /dev/null +++ b/data2/text/range/0-5000/767065.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TDA2: How to Configure the GPU + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Dear i want to work on the GPU in TDA2x. please help me how i can configure GPU for the device TDA2x. + +Responses: +Hi, The programming model for GPU is via standard OpenGLES API. In addition, the GPU driver is available on Linux and can be exercised only from A72. Please let us know if you have some other question. Regards, Anand + +Thank you for reply Anand. i am using TDA2x SOC and this SOC only cortex a15, cortex M4. soc does not have any A72 core . + +Hi, Sorry for the typo. I meant the Cortex-A core on this device which is A15. The programming model for GPU is via standard OpenGLES API. In addition, the GPU driver is available on Linux and can be exercised only from A15. Did that answer the question? If you have further questions, please elaborate on exact needs. Regards, Anand + +Hi, I want to start working on OpenGL ES API using LINUX platform. Please guide me through the procedure to set up OpenGL ES API on LINUX and how to further use its functionality. If possible, please explain with an example. Regards + +Hi, Can you please open a E2E new thread? The original question was on CCS and I believe it has been answered. Regards, Anand + diff --git a/data2/text/range/0-5000/767957.txt b/data2/text/range/0-5000/767957.txt new file mode 100644 index 0000000000000000000000000000000000000000..d0e67a39ae3097cdf09a5f4a6c4530ee027471d8 --- /dev/null +++ b/data2/text/range/0-5000/767957.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2PXEVM: Implicit Declaration error while creating new usecase + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux "/home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/apps/src/rtos/common/chains_main_bios_misc.c", line 278: error: function "Chains_network_copy" declared implicitly 1 error detected in the compilation of "/home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/apps/src/rtos/common/chains_main_bios_misc.c". >> Compilation failure /home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/build/rtos/makerules/rules_m4.mk:178: recipe for target '/home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_main_bios_misc.oem4' failed make[5]: *** [/home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_main_bios_misc.oem4] Error 1 /home/ubuntuadmin/visionSDK/visionSDK/vision_sdk/build/rtos/makerules/common.mk:235: recipe for target 'ipu1_0' failed make[4]: *** [ipu1_0] Error 2 MAKEFILE.MK:277: recipe for target 'app_libs' failed make[3]: *** [app_libs] Error 2 Makefile:140: recipe for target 'apps_libs' failed make[2]: *** [apps_libs] Error 2 Makefile:38: recipe for target 'apps' failed make[1]: *** [apps] Error 2 --- Attempted and unsuccessful fixes: 1. Followed all steps mentioned in Vision_SDK_LinuxUserGuide - 2.4.2.1.4 - 'Download and untar filesystem'. 2. Followed Jacinda's solution with reference to https://e2e.ti.com/support/processors/f/791/t/706851?Linux-TDA2-Facing-issue-while-building-Vision-SDK-3-03 but I could not find the file named "install-extra.tar.gz" anywhere in TI's VisionSDK installation folder or on their Downloads page. I'm using Vision SDK Version 3.06 on Ubuntu 16.04 LTS and Spectrum Digital's TDA2PX EVM. + +Responses: +Hi Pallavi, 1. Is "Chains_network_copy" API added by you ? 2. Looking like you are building for MAKECONFIG=tda2px_evm_bios_all, but following Vision_SDK_LinuxUserGuide You should follow the steps mentioned in VisionSDK_UserGuide_TDA2px.pdf 3. For vision sdk 3.6 release, you don't need "install-extra.tar.gz" tar ball, it is part of file system now Regards Surya + +HI Suryamani Jena, thank you for the clarification about install-extra.tar.gz. "Chains_network_copy" is added by me. issue was resolved by adding declaration in chains.h + diff --git a/data2/text/range/0-5000/768227.txt b/data2/text/range/0-5000/768227.txt new file mode 100644 index 0000000000000000000000000000000000000000..ddb00fb19ca16a2cb01839f81101b5b4ee1f1a01 --- /dev/null +++ b/data2/text/range/0-5000/768227.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: The GPMC interface of TDA2 + +Query Text: +Part Number: TDA2 Hi The GPMC interface of TDA2 has four chip selectable signals (CS0-CS3). May I ask if different chip selectable signals can be configured in different interface forms? For example, CS0 is set to multiplexed and N_Flash is used for Boot; CS3 is set to non-multiplex, and normal asynchronous memory interface is used to connect external devices. Thank you! + +Responses: +Hi, Yes you can connect different interfaces using different chip selects. You will need to set GPMC configuration accordingly. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/768622.txt b/data2/text/range/0-5000/768622.txt new file mode 100644 index 0000000000000000000000000000000000000000..378887aed219972e6ccc144f4e5f5b9071cb01ab --- /dev/null +++ b/data2/text/range/0-5000/768622.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA2: How I load the Big image in DDR through Emulator (*.OUT FILE) + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Dear Sir, i want to Upload the Image size of almost 15MB in TDA2x DDR. so i just include the image in my Main.c file. now CCS now not able to build the file. so my question is that can we upload the image file in the DDR through the emulator or *.out file. please help me how i can upload the image in DDR. thank you + +Responses: +Hi, You can use loadraw command from CCS. Please refer to software-dl.ti.com/.../ccs_scripting_console.html Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +thanks for your Reply Rishabh now i am trying to upload the image through the Load command but i am facing different problem like secession not start i try with the following command script = ScriptingEnvironment.instance(); script.traceBegin("dssLog.xml"); debugServer = script.getServer("DebugServer.1"); debugServer.setConfig("D:/workarea_tda2x_new/testing_1234/targetConfigs/TDA2x.ccxml"); debugSession = debugServer.openSession(".*"); and got the following response could not open session. + +Hi Vijender, You don't need DSS scripting. You need to run below command in CCS scripting console loadRaw(0x80000000,PAGE_PROGRAM,"C:\\Work\\image.tigf",32,false); Regards, Rishabh + +thanks Rishabh now this is working fine . + +Hi Vijender, Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/0-5000/768712.txt b/data2/text/range/0-5000/768712.txt new file mode 100644 index 0000000000000000000000000000000000000000..f86be72205649d0d7c176814d1138d1d39ad11d2 --- /dev/null +++ b/data2/text/range/0-5000/768712.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Pytorch network implementation on TDA2x/4x + +Query Text: +Part Number: TDA2 I am going to implement deep learning network ESPNet on TDA2x and TDA4x(in future). ESPNet source was implemented in Pytorch framework. I found there are Caffe/Tensorflow contents in TIDL document. I have two questions. 1. how to use pytorch outputs in TIDL. Should I export pytorch outputs in ONNX format and import it to Tensoflow or Caffe, after then follow the TIDL guid? Is there any related documents? 2. If some core operations are not supported in TIDL because of TIDL limitations, Should I implement it by myself? ex)Convolution Dialition 1,2,4 only tested / Deconvolution only supported stride value is 2 / ... Then where should I start? Thanks. + +Responses: +1. ONNX mdoels are not supported in TDA2x/3x TIDL. 2. We can split caffe/tensorflow in to multiple sub TIDL models. Use TIDL for processing these mdoels and user can implements unsuported models and run them between the sub models. Please get in touch with TI representative for TDA4x related questions. + +Thanks for your answer! Then will ONNX be supported in TDA4x? Currently, What approach should I follow for using pytorch framework in TDA2x? Thanks. + +Please get in touch with your local TI support for TDA4x related questions. For TDA2x, you may try to convert the model to caffe format. + diff --git a/data2/text/range/0-5000/768763.txt b/data2/text/range/0-5000/768763.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0041781595c852ccc9d0a31954b8122a2d882f0 --- /dev/null +++ b/data2/text/range/0-5000/768763.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: stack error + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using tda2 evm and SDK_VISION_03_04_00_00 i run a case have some problem ,follow is the log , i dont know what is about ! how can i check it? [HOST] [HOST ] 54.125754 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [HOST] [HOST ] 55.353016 s: length_fr=14310568,hlos_model_fr_site=a1f5b800,model_fr_site=-1577732096 [HOST] [HOST ] 55.353016 s: hlos_model_fr_0=0.002201,model_fr_1=-0.027109 ,model_fr_2=0.124923,model_fr_3=0.056501 [HOST] [HOST ] 56.362837 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 56.362898 s: IPC_OUT_0 : Create Done !!! [HOST] [DSP1 ] 56.362990 s: IPC_IN_0 : Create in progress !!! [HOST] [DSP1 ] 56.363386 s: IPC_IN_0 : Create Done !!! [HOST] [DSP1 ] 56.363600 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [DSP1 ] 56.363752 s: [HOST] [DSP1 ] 56.363783 s: ### XDC ASSERT - ERROR CALLBACK START ### [HOST] [DSP1 ] 56.363783 s: [HOST] [DSP1 ] 56.363844 s: E_spOutOfBounds: Task 0xa19de98c stack error, SP = 0xa1b01bd8. [HOST] [DSP1 ] 56.363874 s: [HOST] [DSP1 ] 56.363874 s: ### XDC ASSERT - ERROR CALLBACK END ### [HOST] [DSP1 ] 56.363905 s: thanks Shuai + +Responses: +Hi Shuai, Which usecase you are running? From the log, it looks like it is running out of stack size. could you try increasing stack size? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/769411.txt b/data2/text/range/0-5000/769411.txt new file mode 100644 index 0000000000000000000000000000000000000000..d1dfc47f7a3dedf865de24685cc8187ee76dda39 --- /dev/null +++ b/data2/text/range/0-5000/769411.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TIDL new oobect + +Query Text: +Part Number: TDA2 Hi, I have seen from the TIDL document that the following example use-case in the sdk supports only 4 objects. 1. Road 2 Pedestrian 3 Traffic Sign 4 Vehicle can it possible to add a new object to the TIDL? Is there any support from TI for getting object files/models for the requirement? What is the type of objects used in TIDL? Is this support caffe model? Please enlighten. + +Responses: +Hi Sreerag, yes, you can use Caffe framework to add new objects for TIDL. Look at those links: github.com/.../caffe-jacinto github.com/.../caffe-jacinto-models Also you can check the userguide: PROCESSOR_SDK_VISION_03_XX_XX\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs\TIDeepLearningLibrary_UserGuide.pdf for details. Regards, Yordan + +I saw some bin file is used for object detection in the TIDL user guide. how to convert the caffe model into this .bin file? + +Hi Sreerag, do you refer to "tidl_net_*.bin" and "tidl_param_*.bin"? They are created with "importTestCases.bat" script. This is in step 3. and 4. in chapter "3.6.4 Importing Caffe-Jacinto-Models" of the userguide. Regards, Yordan + diff --git a/data2/text/range/0-5000/769455.txt b/data2/text/range/0-5000/769455.txt new file mode 100644 index 0000000000000000000000000000000000000000..2ae48d62928cad80eea7dd6181a637dabe1cca96 --- /dev/null +++ b/data2/text/range/0-5000/769455.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: TDA2x EVM Camera to work with TI SDK + +Query Text: +Part Number: TDA2 Hi, I am looking to purchase the OMNIVISION 10635 that is stated to be supported by tda2x and if i understand correctly should work right out of the box. The issue is there are many models this camera and i'm not sure which one to purchase. Can you recommend a camera that will work directly with the board? Thanks, s + +Responses: +Hello You can order the complete set from spectrum digital along with EVM and vision daughter card regards, Shiju + +Hi, Thanks for the quick reply- but that's just it- i dont want the set, i want just one camera to connect directly to the board and work. i dont require the card... + +Hi You still need a "vision daughter card" to plug an OV10635 camera directly regards, Shiju + +Hi, I got the EVM board that comes with the Vision Application Board. Do i still have to have the daughter card on addition? and where can i purchase just the camera and the card if needed? + +Hi If you have EVM and Vision Application Board, its good enough. You only need to buy OV10635 camera, check details on spectrum digital website. TI not selling any of these boards or camera directly Regards, Shiju + diff --git a/data2/text/range/0-5000/769622.txt b/data2/text/range/0-5000/769622.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a2e77df9767cb84ed01b99e90ba893824e5b31f --- /dev/null +++ b/data2/text/range/0-5000/769622.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA3: TDA3x EVE registerm map + +Query Text: +Part Number: TDA3 Hi All. Please advise, where i can find documents which contains TDA3 EVE registers map and how i can access them. It doesn't included in TDA3x TRM. There are few EVE EDC registers mentioned in "ECC/EDC on TDAxx" document, but i can't find them in TDA3x TRM. Thanks in advance, Sergey. + +Responses: +Hi Sergey, The registers are given in chapter 6.1.5.2 EVE Registers. Is there a particular register that you cannot find? Regards, Rishabh + +Dear Rishabh. Thanks for your reply. But there is not 6.1.5.2 EVE Registers chapter in latest "TDA3x Technical Reference Manual". Please advice where i can find proper document with mentioned chapter for TDA3x. Waiting for your reply, Best regards, Sergey. + +Hi Sergey, Can you share the link of the document you are referring to? Regards, Rishabh + +Please have a look at the next file: www.ti.com/.../spruie7c.pdf + +EVE details are NDA only (i.e. you won't see EVE registers in the public TRM). Contact your TI representative to obtain the NDA TRM where you can find the details you need. thanks, Alex + +OK, now i understand. Could you please send me document version with its Literature Number, so i could ask for proper document? + +Literature Number: SPRUHQ7R Version "vR" + +Thank you very much. + +Hi Sergey, I am closing the thread as issue has been resolved. Regards, Rishabh + +Yes, thanks. + +Sergey, Rishabh, We have started to expose the EVE registers publicly. The next rev of the TDA3 TRM will include the full details (not sure of planned date...). In the meantime, you can refer to the TDA2 TRM (Lit # SPRUI29F) on ti.com which already includes the full contents. The only difference is that TDA2 includes up to 4 EVEs and TDA3 only has 1. The addresses for EVE1 in the TDA2 are the same as the for the TDA3 EVE. Regards, Kyle + diff --git a/data2/text/range/0-5000/769700.txt b/data2/text/range/0-5000/769700.txt new file mode 100644 index 0000000000000000000000000000000000000000..431c36ace62c03cda9cbd753d62d05327b6b2ce6 --- /dev/null +++ b/data2/text/range/0-5000/769700.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: if i install the SDK linux under the Linux Ubuntu then how i will open the ccsV8.0 in window.? + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi i read the Vision SDK Linux User Guide. so now i understand that now i need to install the Linux Ubuntu in my laptop.so my question is that i need to install the CCSv8.0 on Linux or i already install the CCS on the window . so it mean i have to install the separate installation for linux and window . thank you + +Responses: +Hi Vijender, CCS has to separately installed in Windows and Linux. In case you are using virtual linux environment on Windows, you can work with mapped Windows drive and won't need separate CCS. Regards, Rishabh + diff --git a/data2/text/range/0-5000/769719.txt b/data2/text/range/0-5000/769719.txt new file mode 100644 index 0000000000000000000000000000000000000000..af3dea0869a93a04b1f7bf6ce9e4627a90d91bd9 --- /dev/null +++ b/data2/text/range/0-5000/769719.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: SRV using GPU + +Query Text: +Part Number: TDA2 Hello, I am trying to implement the following scenario on TDA2x EVM: (1) Transfer 4 test images from PC to EVM...I do not know how I can do this yet (2) Run OpenGL-based SRV algorithm on the 4 images...I am assuming OpenGL code can only execute on the TDA2x GPU (3) Transfer output SRV image from EVM to PC...again, not sure how this is to be done Question 1 - Can you point me to some relevant and useful references to implement this scenario? Question 2 - In your opinion, how many CPU cores from the EVM will be required at a minimum to implement this scenario? Question 3 - What is "host CPU" in the context of TDA2x EVM? Does it refer to A15 core 0? Question 4 - How is the GPU programmed on TDA2x? Is it possible to access it through SYS/BIOS? Question 5 - What should be my development environment for this implementation? Windows or Linux? Thank you. + +Responses: +Hi, Please find your answer below (1) Transfer 4 test images from PC to EVM...I do not know how I can do this yet Please use network_rx_tx link to receive or send data over network (2) Run OpenGL-based SRV algorithm on the 4 images...I am assuming OpenGL code can only execute on the TDA2x GPU yes (3) Transfer output SRV image from EVM to PC...again, not sure how this is to be done same as que (1) Question 1 - Can you point me to some relevant and useful references to implement this scenario? Please go through the below usecase vision_sdk\apps\src\hlos\adas\src\usecases\lvds_vip_multi_cam_3d_srv vision_sdk\apps\src\rtos\usecases\network_rx_tx Question 2 - In your opinion, how many CPU cores from the EVM will be required at a minimum to implement this scenario? Please check the usecase jpg file to have idea which all cores are required Question 3 - What is "host CPU" in the context of TDA2x EVM? Does it refer to A15 core 0? Yes, as you have to run vision sdk linux. Question 4 - How is the GPU programmed on TDA2x? Is it possible to access it through SYS/BIOS? Please go through the below module to have some idea about sgxmodule which uses GPU. vision_sdk\apps\src\hlos\modules\sgx3Dsrv Question 5 - What should be my development environment for this implementation? Windows or Linux? On your pc side you can have either of windows or linux as VSDK supports both OS. Regards, Anuj + diff --git a/data2/text/range/0-5000/770052.txt b/data2/text/range/0-5000/770052.txt new file mode 100644 index 0000000000000000000000000000000000000000..f55bc9830a7b22e8dc1be192930d18619700247d --- /dev/null +++ b/data2/text/range/0-5000/770052.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: TIDL sample real-time applications + +Query Text: +Part Number: TDA2 Hello, I have gone through most references available for TIDL on TDA2x. The TIDL Library User Guide and Datasheet are nice starting points to understand the deployment of neural networks on TDA2. But the deployment procedure described in the Guide works in a disjoint fashion, i.e., for a neural network whose layers are split between EVE and DSP cores, we have to first execute the layers on EVE, get the output, and then feed it to execute the layers on DSP. Obviously, this cannot happen in a practical scenario; I will have to set up the entire network in one go. I also went through the TIDL Library API described at this link. But this whole chapter appears to apply to TIDL for AMxx processors, and I did not find any equivalent reference for TDA2x processors. Can you point me to some sample applications which cover an end-to-end scenario, e.g., test image(s) fed to a neural network which is split across EVE and DSP, where the interlinking and I/O of the EVE and DSP is handled in real-time by the program, and then visualization of the final output? Thank you. + +Responses: +Hi, for the API you can check the file PROCESSOR_SDK_VISION_03_XX_XX\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs\TIDeepLearningLibrary_API.chm. I will ping experts for the other questions. Regards, Yordan + +The TIDL Library User Guide for TDA recommends creating TIDL applications based on XDAIS. On the other hand, the TIDL documentation for AMxx processors (refer link in first post) does not lay down any such guideline. The TIDL documentation for AMxx processors also appears to have many examples for different use-cases, along with code snippets to explain the network setup and execution. It kind of feels like the TIDL was initially built for AMxx devices, and later adapted for TDAxx. I would like to know how much of the network deployment concepts, programming guidelines, and examples from the [AMxx/Processor SDK for Linux] can be reused for [TDAxx/Processor SDK for Vision]. I would much appreciate it if the experts can also comment on this. + +TIDL is stand-alone OS independent library was developed part of TDAxx SDK. TDAx SDK has example use cases developed using BIOS. The AMxx SDK provides the solution to deploy network from the host (Linux) using the same TIDL library. You can refer the network deployment and calibration related documentation from both SDKs + diff --git a/data2/text/range/0-5000/770128.txt b/data2/text/range/0-5000/770128.txt new file mode 100644 index 0000000000000000000000000000000000000000..422c831a5d7c4266e0fca6938df73a69b8aed2a2 --- /dev/null +++ b/data2/text/range/0-5000/770128.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2: i installed Ubuntu 16.0 instead of Ubuntu 14.0 . will i face any problem in future? + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi i want to work on the open GL on TDA2x. so i need to install the linux on my machine but i installed ubuntu 16.0 instead of Ubuntu 14.0. because in SDK linux user manual clearly mention that installed 14.0. please suggest me what should i do now ? continue with the 16.o or remove with 16.0 thank you + +Responses: +Hi Vijender, We have done all our testing with Ubuntu 14 but Ubuntu 16 should also work. Regards, Rishabh + +Hi, Is there an update on this? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/770184.txt b/data2/text/range/0-5000/770184.txt new file mode 100644 index 0000000000000000000000000000000000000000..45d49605e676db4cbf145ebfb548a5e76d96622d --- /dev/null +++ b/data2/text/range/0-5000/770184.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: TIDL Reference executable + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Everyone , I am trying to run the TIDL reference executable by compiling the source code given under the folder REL.TIDL.01.01.03.00 in ubuntu . We are planning to import caffe model into the tool for generation of files . When I tried to make it , I am getting following error . ======== tidl ALGO ================= make -C ./algo -f makefile make[1]: *** algo: No such file or directory. Stop. makefile:76: recipe for target 'all' failed make: *** [all] Error 2 can anyone kindly guide what is the error and how to resolve this . + +Responses: +Hi Surendar, do you try to build the source release (REL.TIDLSRC.01.01.01.00) or the object release which is included in VisionSDK (REL.TIDL.01.01.03.00)? You can rebuild only the source release. I think you do not need to rebuild TIDL if you want to import caffe model, please check chapter "3.6.4 Importing Caffe-Jacinto-Models" of the userguide. Regards, Yordan + diff --git a/data2/text/range/0-5000/770548.txt b/data2/text/range/0-5000/770548.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e6fcef6e35b4ed62e814054058bf05508221fd4 --- /dev/null +++ b/data2/text/range/0-5000/770548.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: PreprocType Role + +Query Text: +Part Number: TDA2 Hello Sir, While Importing and inferring model, I came across the term PreProcType. I have explored its code from tidl_image_preproc.c As per my understanding, we have values 0-5 in which, PreProcType=0 is mentioned in comments for Caffe_jacinto models and PreProcType=1 for Caffe, other is not known. Then I looked out all the models which had 0,1,2,3 PreProcType's and came into conclusions i.e. , we have assigned PreProcType according to models and somewhere according to the Image resolution. (**kindly comment on my conclusion). I have some Queries as follow: Q1) When did we require PreProcType, while Importing or at Inference as both Import_config and Infer_config file has the information of PreProcType. Q2) I tried to split the network in 4 Sub-Networks(10 layers each) for JDetNet, I inferred the first subnetwork with PreProcType and rest three subnetworks were commented for the PreProcType, So is this the correct way or I have to not comment the PreProcType for all subnetworks. Q3) All the models except Cifar, I observed PreProcType in Inference and Import Config file were the same but Why Cifar Import_config file has PreProcType=3 and at inference_config PreProcType=0..? One more query regarding the availability of deploy.prototxt file. This path PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.TIDL.01.01.02.00\modules\ti_dl\test\testvecs\config\caffe_jacinto_models\trained\object_detection\voc0712\JDetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\sparse doesnt have Deploy.prototxt file available with .caffemodel to Import the JDetNet model. So I have used deploy.prototxt available in the below folder PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.TIDL.01.01.02.00\modules\ti_dl\test\testvecs\config\caffe_jacinto_models\trained\object_detection\voc0712\JDetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\test_quantize Q) Only this file we have to use for Importing or do we have to use some other deploy.prototxt file? If present kindly share the path.(In all models of caffe_jacinto and Caffe, I have found .caffemodel and Deploy.prototxt file were present under same folder i.e., Sparse) Kindly do the needful. Thanks and Regards Vyom mishra + +Responses: +1.PreProcType shall be used if "rawImage = 0" in both import and infer config 2.The first part can take input as either raw or jpeg. if it is jpeg then PreProcType shall be set based on the pre-processing used in training. for rest of the input shall be raw so,PreProcType is ignored 3.In infer config rawImage = 1 So PreProcType is ignored 4.You can find more models here github.com/.../trained + diff --git a/data2/text/range/0-5000/770928.txt b/data2/text/range/0-5000/770928.txt new file mode 100644 index 0000000000000000000000000000000000000000..12b46daf01e69b9a6f893caf68e713d698140c18 --- /dev/null +++ b/data2/text/range/0-5000/770928.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TDA2: Run Sample C code on DSP or EVE + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hello Sir, I have written Sample Custom layer[Relu] in C how to run on DSP or EVE. Thanks Madhav + +Responses: +Hi Madhav, Can you provide more information. Are lookin for help in compling the code or linkingiwth your applications etc? + +Hello Sir, I am trying to Run ReLu(as custom layer example) on DSP or EVE or ARM processor. My ReLu Layer will be expecting Output from one Sub-Network and output to the next Sub-Network running on other core. Firstly, So i need to know how to run the custom layer which is written in C code on DSP/EVE/ARM core separately, then i ll try to link the subnetworks to my custom layer. Thanks, Madhav + +You can compile the C code using TI compilers for DSP/EVE and then you run them standalone (refer EVE SW user guide) or in the complete system with SDK (refer SDK user guide) Refer Top Level SDK documentation to navigate to various user guides + +Hello sir, I have compiled c code using TI compiler for EVE target. when i am trying to run on TDA2x board getting this error file cant able to load. whether i need to write linker file to configure with memory. ARP32_EVE_1: Trouble Reading Memory Block at 0x6100 on Page 0 of Length 0x4: (Error -1065 @ 0x6100) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.0.903.2) ARP32_EVE_1: File Loader: Verification failed: Target failed to read 0x00006100@Program ARP32_EVE_1: GEL: File: C:\Users\Madhav\workspace_v8\rlu\Debug\rlu.out: Load failed. Thanks , Madhav + +refer below EVE doc for running code on EVE with required GEL files modules\docs\eve_sw_getting_started.pdf + diff --git a/data2/text/range/0-5000/771845.txt b/data2/text/range/0-5000/771845.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d60aa013ec169b030ff267ae6e2228fe72af0dc --- /dev/null +++ b/data2/text/range/0-5000/771845.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: can not parse the inference result file(stats_tool_out.bin) + +Query Text: +Part Number: TDA2 Hi everybody I suffered from a problem when we try to deploy tensorflow pre-trained model on td2x. Every step is fine(as described below). But, we can not parse the inference result file(stats_tool_out.bin) What is the format of 1-D vector as described in http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_TIDL.html ? How can we parse it? Does stats_tool_out.bin depend on training framework(e.g. caffe or tensorflow)? Can anyone help us? Steps are as follows: We have transformed the pre-trained model(MobileNet_v1_1.0_224) in https://github.com/tensorflow/models/tree/master/research/slim through the command below python "tensorflow\python\tools\optimize_for_inference.py" -- input=mobilenet_v1_1.0_224.pb --output=mobilenet_v1_1.0_224_final.pb -- input_names=input --output_names="softmax/Softmax" Then, we use tidl_model_import.out.exe and mobilenet_v1_1.0_224_final.pb to produce two bin files. Finally, we fed a image and the two bin files to get prediction file (stats_tool_out.bin) + +Responses: +it is raw binary file output tensors. One byte for each element in the tensor. For this case it is softmax output 1001 bytes. Refer "TIDeepLearningLibrary_UserGuide.pdf" for more information + +"One byte for each element in the tensor" <= Does it mean that each byte stands for the score of each class? + +Yes. it is fixed poitn format. refer users guide if you want to convert it to floating point + +Could I ask another question? Is the format of stats_tool_out.bin defined by TI and independent of the output format of training framework(e.g. caffe or tensorflow)? + +Yes it is independent of caffe or tensorflow. It is just biinary file. Read the file as a binary to a memory and typecast it to a byte array (signed or unsigned char based last tensor type) that all. + diff --git a/data2/text/range/0-5000/771918.txt b/data2/text/range/0-5000/771918.txt new file mode 100644 index 0000000000000000000000000000000000000000..2df79415962c585d130837a6d509271f31f8fbe7 --- /dev/null +++ b/data2/text/range/0-5000/771918.txt @@ -0,0 +1,8 @@ +Ticket Name: Boundary Scan file for TDA2SXBTQABCRQ1 + +Query Text: +Hi, We're using TDA2SXBTQABCRQ1 in our Hennessy Project. Could TI please share the boundary scan file for this please. + +Responses: +Hi Marcelino, you can find bsdl file for TDA2x here: www.ti.com/.../toolssoftware Regards, Yordan + diff --git a/data2/text/range/0-5000/772173.txt b/data2/text/range/0-5000/772173.txt new file mode 100644 index 0000000000000000000000000000000000000000..7c1e461d3d76bf1835ae153064458f01c07ac3fa --- /dev/null +++ b/data2/text/range/0-5000/772173.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: How to record VIP output data + +Query Text: +Part Number: TDA2 Dear TI, How can i dump the data output from VIP instance. The file format i expected is YUV422 with 12bit lenght per color component. Questions: 1. Which link can be used to add the dump code, capture link callback or null link callback? 2. What APIs can help me to achieve this func? Are there any constrain of these APIs in VIP output format. Regards, Liu Gan + +Responses: +Hi, You have to create a usecase capture->null. Capture link will capture the vip data and null will dump the same. Regards, Anuj + +Hi Anuj, Does capture link can be used to dump the vip data? How should i conifgure the DMA params for dump YUV 12 bit format file to SD card? Can you kindly providing me the example code? Regards, Liu Gan + +Hi Anuj, Other questions: 1. If null link is used, what params should be used at create time? 2. How should i do to make null link dump only one frame at any time during usecase running? Regards, Liu Gan + +Hi, If you want to dump any specific frame at runtime then its not supported by null link. You can use CCS to dump any specific frame from capture link. Please check any vip single cam usecase to know the create param of capture link. Regards, Anuj + +Hi Anuj, Thanks for your support. Regards, Liu Gan + diff --git a/data2/text/range/0-5000/772175.txt b/data2/text/range/0-5000/772175.txt new file mode 100644 index 0000000000000000000000000000000000000000..d29f1d044e98622fa961db75fff0c48095efb4e9 --- /dev/null +++ b/data2/text/range/0-5000/772175.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: image rotated function , how to optimize and improve efficiency? + +Query Text: +Part Number: TDA2 Hi, I am having a problem, the 640x720 image is rotated 90 degrees, running on dsp1, the efficiency is very low, fps = 3. how to optimize and improve efficiency? Thanks! + +Responses: +Hi @yuling ma , do you use an algorithm, you wrote yourself? You can check if the following documents can help you: Introduction to TMS320C6000 DSP Optimization: Optimizing Loops on the C66x DSP: Hand-Tuning Loops and Control Code on the TMS320C6000: Regards, Yordan + diff --git a/data2/text/range/0-5000/772297.txt b/data2/text/range/0-5000/772297.txt new file mode 100644 index 0000000000000000000000000000000000000000..50a003f6a85156f4fb0a4245ba37bbe591b92817 --- /dev/null +++ b/data2/text/range/0-5000/772297.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Problem in TDA2: Example to train CNN network on tensorflow and run using TIDL + +Query Text: +Part Number: TDA2 I follow the every step in https://e2e.ti.com/support/processors/f/791/t/689876 But, I failed in the last step when I performed the command below python -m tensorflow.python.tools.optimize_for_inference --input=keras_frozen.pb --output=keras_frozen_optimized.pb --input_names=conv2d_1_input --output_name=conv2d_5/BiasAdd and get the error message below. KeyError: "The following input nodes were not found: {'conv2d_1_input'}\n" It seems that the setting of conv2d_1_input is wrong. How could I set it ? + +Responses: +Hi, can you check also this post: e2e.ti.com/.../733834 For TensorFlow 1.10 the argument needs to be changed. Regards, Yordan + diff --git a/data2/text/range/0-5000/772317.txt b/data2/text/range/0-5000/772317.txt new file mode 100644 index 0000000000000000000000000000000000000000..ab97440cb7381c17f9d880d9f99c2dc72ea6833f --- /dev/null +++ b/data2/text/range/0-5000/772317.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2: GPU and EVE quantities inside TDA2H, TDA2SX and DRA756 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA756, Please see TDA2x and DRA756 functional block diagram below: 1. We know Dual-core PowerVR SGX544 3D GPU from 1.1 Features of TDA2x datasheet, but we just see PowerVR SGX544 3D GPU from 1.4 TDA2x functional block diagram; TDA2x include 1 or 2 PowerVR SGX544 3D GPU ? 2. Does DRA756 has 2 EVEs inside it ? 3. DRA756 and TDA2x use same EVB and schematics? + +Responses: +Hi Joseph, Block diagram shows the GPU subsystem. Yes there are two EVEs in DRA756. You can refer to datasheet for more details: www.ti.com/.../dra75.pdf Regards, Rishabh + +Hi Joseph, for question #3 you can find TDA2/DRA74 EVM board schematics (along with some other useful documents) in "Design Files" table here: www.ti.com/.../j6evm5777 Regards, Yordan + +1. We have DRA756 EVB in our hands, if we program Vision_SDK030600 software into DRA756 EVB, can Vision_SDK030600 software run on this DRA756 EVB ? 2. Or we remove DRA756 for DRA756 EVB, then install TDA2X on this EVB and program Vision_SDK030600. + +Hi, Vision SDK will work with both DRA756 and TDA2X but you need to make sure you update the configuration accordingly. E.g. Vision SDK BIOS all configuration assumes 4 EVEs and hence the same will not work for DRA756 part. Regards, Rishabh + diff --git a/data2/text/range/0-5000/772320.txt b/data2/text/range/0-5000/772320.txt new file mode 100644 index 0000000000000000000000000000000000000000..29bea7c50a1ed9fc48e1c6dceea83b4e0dc57a85 --- /dev/null +++ b/data2/text/range/0-5000/772320.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Building .so library + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi everyone, I'm trying to build shared object library instead of apps.out executable for VisionSDK 3.04 on Linux. As far as I can see, in common_footer_a15.mk there is a target so: and it should build shared object. However, I am unable to find out setup to build shared object instead of executable. Configuration for which I am trying to build is tda2xx_evm_linux_all. Does anyone have experience with this? Thanks in advance, Sasa + +Responses: +Hi, In VSDK we do not build .so file but you can build .a files. Please check how all a15 links has been build. Regards, Anuj + diff --git a/data2/text/range/0-5000/772340.txt b/data2/text/range/0-5000/772340.txt new file mode 100644 index 0000000000000000000000000000000000000000..c96c69382f0f07916469b0c9ae1243e2a2f1e40c --- /dev/null +++ b/data2/text/range/0-5000/772340.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: Linux/TDA2 to Jetson TX2 PCIe communication + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I have been doing for communicating Jetson TX2 and Ti TDA2X via PICe in Linux platform. I tried to workout configuring TDA2X as end point and Jetson TX2 and Host. Both have configured properly but during enumeration pci device is not detected at host side. Is there any option to configure TDA2x as generic end point device in linux? + +Responses: +Hi Sreerag, can you check this wiki and see if you can find something useful: processors.wiki.ti.com/.../Linux_Core_PCIe_EP_User's_Guide Regards, Yordan + +Hi Yordan, I have gone through the same configurations mentioned in the link. I got TDA2X as end point device. But that device is not detected in the Jetson. I am communicating between Jetson and TDA2x. + +Hi Sreerag, You may find this thread useful. You may need a modification on your board and apply the patch posted on this thread. e2e.ti.com/.../688574 Regards Shravan + +Hi, Is there any option to try the PCI test between two TDA2X boards in RTOS platform? + +Hi, We have a simple driver to configure in RC and EP mode present in PDK. Please refer to pdk\packages\ti\csl\example\pcie\write_loopback for more information. The issue pertaining to PCIe communication between Jetson TX2 and TDA2 seems to be resolved. Please create a new thread if you have any further questions. Regards Shravan + diff --git a/data2/text/range/0-5000/772587.txt b/data2/text/range/0-5000/772587.txt new file mode 100644 index 0000000000000000000000000000000000000000..923a6f4144f97b86aaa450efc2f8caf73143fe0a --- /dev/null +++ b/data2/text/range/0-5000/772587.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: system_cfg.h missing + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear , today i try to build my code but i found some error like that "system_cfg.h" is missing . please help me i am using linux platform thank you + +Responses: +Hi Vijender, Can you provide details on what you were building and the error log. Regards, Rishabh + +Hello Rishabh this is the simple code " /** * main.c */ int main(void) { //app_init_a15(); App_init(); return 0; } " Error is like that >> Compilation failure subdir_rules.mk:7: recipe for target 'app_init_a15.obj' failed "/home/vijender/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/apps/src/common/app_init/app_init_a15.c", line 81: fatal error #1965: cannot open source file "system_cfg.h" 1 catastrophic error detected in the compilation of "/home/vijender/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/apps/src/common/app_init/app_init_a15.c". Compilation terminated. gmake: *** [app_init_a15.obj] Error 1 gmake: Target 'all' not remade because of errors. **** Build Finished **** + +Hi Vijender, Were you able to build default Vision SDK Linux? Can you refer to VisionSDK_Linux_UserGuide.pdf for steps on Linux build. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/772604.txt b/data2/text/range/0-5000/772604.txt new file mode 100644 index 0000000000000000000000000000000000000000..f8d1e4c2299db271b6addc1ae503521a5b25c9fd --- /dev/null +++ b/data2/text/range/0-5000/772604.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: network speed problem + +Query Text: +Part Number: TDA2 HI， i am using tda2x/PROCESSOR_SDK_VISION_03_06_00_00.After install and build,starting run the usecase--"1CH VIP Capture + Network TX". oh,my evm board ip address is static --192.168.1.200,and pc side is 192.168.1.201.And network cable was connected to EVM board side P5 port. And then,running the command in windows cmd terminal. "network_rx --ipaddr --target_ip 192.168.1.200 --host_ip 192.168.1.201 --port 29172 -usetfdtp --files 20190214_001.yuv" my problem is the speed of network.Less than 1280*720 30fps.just about 10fps. How to improve the speed of network?thank you. + +Responses: +Hi @user3792633 , from VisionSDK_UserGuide_NetworkTools.pdf: IMPORTANT NOTE: When sending RAW/YUV frames When NDK runs on M4 CPU, one can achieve a data rate of about 2 MB/s (16Mbps) When NDK runs on A15 CPU (TDA2x or TDA2px), one can achieve a data rate of about 60 MB/s (480Mbps) Can you make sure NDK runs on A15 core? You should have NDK_PROC_TO_USE=a15_0 in the build config you use. Regards, Yordan + +hi Yordan, I am sure Ndk runs on A15 core now.Here have two pics about config. Jer + +Hi, While the transmission is going on, please check your network speed in system monitor. To match your requirement, approximately 422 Mbps network speed is required. This is theoretically possible, but this can depend on your network bandwidth. But since you are using static IP, and you're connected to the PC directly from the EVM, I wonder what could go wrong. Please let me know if the network speed you observe is sufficient for the required data transfer. Meanwhile I'll try to replicate this on my side. Regards, Anand + +Hi Anand, Network speed is 64Mbps when the usecase in running.Not able to achieve 422Mbps. Jer. + +Hi Anand, Do you have any update about this issue? Regards, Jeremy + +Hi Jeremy, I suspect that you won't be getting the desired FPS since you're working with raw data. You can try with encoding and see if you're getting the desired FPS. Since you're using static IP, network speed issues shouldn't come up. Just to get a closure on that, please check the UART console log of vision sdk and see if your connection is 1000Mbps. Regards, Anand + diff --git a/data2/text/range/0-5000/772782.txt b/data2/text/range/0-5000/772782.txt new file mode 100644 index 0000000000000000000000000000000000000000..bc34493b4aa1450a2cd3ccbe60c49d59652724a5 --- /dev/null +++ b/data2/text/range/0-5000/772782.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Is there an example(s) of keras segment(object detection) on TDA2 ? + +Query Text: +Part Number: TDA2 Hi all, I have successfully run an example of keras classification on TDA2 as provided in e2e.ti.com/.../689876. Is there any example(s) of keras segmentation(object detection) on TDA2 ? + +Responses: +We don't have any example for Tensotflow segment and object detection models. We have caffe based eamples segment and object detection. Can be found in the below pathc github.com/.../caffe-jacinto-models + diff --git a/data2/text/range/0-5000/773492.txt b/data2/text/range/0-5000/773492.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d8f36b70da9261866506b7358a8c4f6c726c223 --- /dev/null +++ b/data2/text/range/0-5000/773492.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2: FLASHING TOOLS + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear All, I would like to know some of the below question answers Q1:Way of flashing NAND/NOR for TDA2x evm - is there any tool ? Q2:What is the size of MLO, uboot, linux and filesystem, - running on our current TDA2x EVM and also on D3 board. Q3:Current DDR3 memory usage on TDA2x evm needs to be found Q4: List of various drivers involved in TDA2x evm linux - eg: i2c, usb, camera, hdmi and so on… + +Responses: +Hello, I'll let software teams comment regarding your other questions. But for Q1, one way to do it is via the flash tool. Here are a couple related forum posts: Thanks, Alex + +Hi, Q2: here are some example sizes: MLO: 125K ; u-boot.img: 819K ; zImage: 3.4M note that this sizes may vary based on your config. the default rootfs from here: software-dl.ti.com/.../index_FDS.html has size 296M, you can add more features to it and size will increase. Q3: Please follow the document /vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf for description of how to configure memory in VisionSDK. The default Linux configuration for TDA2x is 1GB. Q4: Linux version of VisionSDK is based on Processor SDK Linux Automotive (PSDKLA), so you can check the supported features in the Data Sheet: processors.wiki.ti.com/index.php Also helpful can be PSDKLA Developer guide and FAQ: processors.wiki.ti.com/index.php processors.wiki.ti.com/index.php Please let me know if you have any further questions. Regards, Yordan + +Hello Yordan, RA72x Evaluation module is same a TDA2x EVM? i.e processors.wiki.ti.com/index.php I have a some more question on TDA2x board, please find below list . ------------------------------------------------------------------------------------------ Q5:compile procedure for TDA2x rootfile system/Linux/Uboot? Q6:How to choose MLO for TDA2x? is it processor specific ? Q7:Flashing MLO/UBOOT/KERNEL/ROOTFS on NAND/NOR memory procedure? Q8:TDA2x EVM peripheral like i2c,spi,.... all soc peripherals test suite either unit/system testing procedure? ------------------------------------------------------------------------------------------ Regards, Raghu + +Raghu, vhg jgyj said: Q5:compile procedure for TDA2x rootfile system/Linux/Uboot? Q6:How to choose MLO for TDA2x? is it processor specific ? Q7:Flashing MLO/UBOOT/KERNEL/ROOTFS on NAND/NOR memory procedure? Q8:TDA2x EVM peripheral like i2c,spi,.... all soc peripherals test suite either unit/system testing procedure? Are you using Vision SDK? If so please follow the user guides provided along the SDK. There is a lot of information to answer your general questions above. thanks, Alex + +Hello Alex, I am using vision DSK, but below some question required more information or any link to cover below please send me. Q7:Flashing MLO/UBOOT/KERNEL/ROOTFS on NAND/NOR memory procedure? Q8:TDA2x EVM peripheral like i2c,spi,.... all soc peripherals test suite either unit/system testing procedure? Regards, Raghu + +Hi Raghu, can you check here for flashing to NAND: processors.wiki.ti.com/.../Linux_Core_U-Boot_User's_Guide Regards, Yordan + diff --git a/data2/text/range/0-5000/773981.txt b/data2/text/range/0-5000/773981.txt new file mode 100644 index 0000000000000000000000000000000000000000..a9127240130876f2dcb91cb422a70610022e9c38 --- /dev/null +++ b/data2/text/range/0-5000/773981.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: issue with generated tidl_net_jdetNet_ssd.bin and tidl_param_jdetNet_ssd.bin + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, While using generated tidl_net_jdetNet_ssd.bin and tidl_param_jdetNet_ssd.bin files for TIDL usecase in TDA2X, video gets stuck after first frame. The tidl_net_jdetNet_ssd.bin and tidl_param_jdetNet_ssd.bin are generated using import tool which is available in PROCESSOR_SDK_VISION_03_06_00_00 in UBUNTU 16.04. Note: 1. I have used wine to execute import _tool.exe in UBUNTU 16.04 2. Default tidl_net_jdetNet_ssd.bin and tidl_param_jdetNet_ssd.bin available in SDK works fine. 3. After referring the link I understood default bin files available in SDK was generated using corresponding prototxt and caffemodel. so using those caffemodel and prototxt I generated the bin files . Is there any problem with my bin file generation? Kindly share your comments. + +Responses: +refer below thread for this e2e.ti.com/.../689617 + diff --git a/data2/text/range/0-5000/774132.txt b/data2/text/range/0-5000/774132.txt new file mode 100644 index 0000000000000000000000000000000000000000..0b99c6bb319b133c8263d7bce31368a6e574f2fe --- /dev/null +++ b/data2/text/range/0-5000/774132.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: Build VisionSDK and have the Error -1073740791 + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi,team I build VisionSDK and have some errors.The building steps are as below and could you give me some suggestion?Thanks so much. == (1)I download,test 2 versions and install Vision SDK to windows PROCESSOR_SDK_VISION_03_06_00_00_setupwin.exe PROCESSOR_SDK_VISION_03_05_00_00_setupwin.exe (2)Use System administrator(cmd) or Cygwin to build TI-RTOS (3) Go inside the directory PROCESSOR_SDK_VISION_03_xx_xx_xx\vision_sdk\build (4) Open file \vision_sdk\build\Rules.make and set required config MAKECONFIG=tda2xx_evm_bios_all (5) Set environmental variables to PATH variables : PATH value : C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;%PATH% (6) Refer to "/vision_sdk/build/tools_path.mk" and download/install A15 toolchain to C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3 C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\cg_tools\linux\gcc-arm-none-eabi-4_9-2015q3 than the environmental variable is set C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\cg_tools\linux\gcc-arm-none-eabi-4_9-2015q3\bin;C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3\bin;C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;%PATH% (7) Build first time and run the below sequence of commands >> gmake -s -j depend (8)But there are below errors: ... ... # Archiving tda2xx:ipu1_0:release:vps_devices into C:/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/drivers/pdk_01_10_02_07/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_devices.aem4 ... gmake[3]: *** [vps_devices] Error -1073740791 gmake[2]: *** [pdk] Error 2 gmake[1]: *** [pdk] Error 2 gmake: *** [depend] Error 2 Best Regards, Jacob Lin + +Responses: +Hi Jacob, Do you get the same error with "gmake -s depend"? Regards, Rishabh + +Dear Rishabh I still get the same error with "gmake -s depend".Could you have other ideas about the problem? Thanks. ... ... ... # Archiving tda2xx:ipu1_0:release:vps_devices into C:/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/drivers/pdk_01_10_02_07/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_devices.aem4 ... # gmake[3]: *** [vps_devices] Error -1073740791 gmake[2]: *** [pdk] Error 2 gmake[1]: *** [pdk] Error 2 gmake: *** [depend] Error 2 Best Regards, Jacob Lin + +Dear Rishabh I still get the same error with "gmake -s depend".Do you have other idea about the problem?Thanks. ... ... ... # Archiving tda2xx:ipu1_0:release:vps_devices into C:/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/drivers/pdk_01_10_02_07/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_devices.aem4 ... # gmake[3]: *** [vps_devices] Error -1073740791 gmake[2]: *** [pdk] Error 2 gmake[1]: *** [pdk] Error 2 gmake: *** [depend] Error 2 Best Regards, Jacob Lin + +Hi Jacob, Can you start cmd as an administrator and try. If you are already running as admin then try vice versa. I did some search on internet for file system error 1073740791 and suggestions pointed to issue with permissions/file system. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Dear Rishabh Sorry for late response and I solved the issue until 5 hours ago. (1) Run as administrator for cmd and cygwin: still failing (2) Disable the read only for SDK folder : still failing (3) Release all permissions/file system : still failing (4) CHKDSK -r -f: still failing (5) Dism /Online /Cleanup-Image /CheckHealth : still failing (6) Dism /Online /Cleanup-Image /ScanHealth : still failing (7) Dism /Online /Cleanup-Image /RestoreHealth : still failing I directly change the PC and repeat the steps. The RTOS is built successfully. Maybe my HDD or file system is broken, I still don't know real reason. Thanks so much for your help. Best Regards, Jacob Lin + +Hi Jacob, Glad that the issue is resolved. Thanks for the update. Regards, Rishabh + diff --git a/data2/text/range/0-5000/774272.txt b/data2/text/range/0-5000/774272.txt new file mode 100644 index 0000000000000000000000000000000000000000..2cd0424038d8f643517ff7413399531c7b6957f1 --- /dev/null +++ b/data2/text/range/0-5000/774272.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: I copy some function codes form use-case and add into the others use-case. Error message : Faulty address is 0x4, called from 0x1b155. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, My HW is TDA2x CPU board + Vision Board + daughter board + LVDS sensor and SDK is PROCESSOR_SDK_VISION_03_04_00_00 with TDA2XX_EVM_LINUX_ALL define. I select use-case "4CH VIP LVDS capture + SGX MOSAIC + DISPLAY". I want to save the source image in this ues-case, then I add some function code in this case (chains_lvdsVipMultiCam_SgxDisplay.c), example "static Void mountFatFs()", "static Void saveCaptureFrames(chains_srvCalibration_DisplayAppObj *pObj)"....etc. After boot on the EVK and select this use-case, it can't be executed successfully, console mode shows below error message: ****** Segmentation fault caught .... Faulty address is 0x4, called from 0x1b155 Totally Obtained 0 stack frames. signal number =11 Signal number = 11, Signal errno = 0 SI code = 1 (Address not mapped to object) Fault addr = 0x4 [bt] Execution path: root@dra7xx-evm:/opt/vision_sdk# What does it mean? Please help and thanks. Ranny. + +Responses: +Hi Ranny, here a few things you can check: - as you take saveCaptureFrames() from another usecase, the struct which is taken as argument might have some fields that your usecase do not have (for example the saveFrameSync mutex). Can you make sure that the fields which the function access exists in the struct (you can also look for suspicious warnings when recompiling). - in saveCaptureFrames() function can you try to just open the file, write some bytes to it and close it and see if it is written correctly - this will show if FS operations work correctly. - do you see Vps_printf() messages in your log, can you add some more prints to narrow down where exactly segmentation occurs? Regards, Yordan + +Hi Sir, 1. Attachend file is the log file that I execute boot and use-case process. 2. I only go inside the use-case, I didn't execute "mountFatFs()" & "saveCaptureFrames()" function yet, console alread shows the error message. 3. I try to add the Vps_printf to check exactly issue occurs, seems after creating a new struct and then segmention occurs, - the error structure creating is: "chains_srvCalibration_DisplayAppObj srvCalib_chainsObj; " Thanks. Ranny. + +20190221_01_Save_Img-fail.txtI forget to upload the log file. Ranny. + +Hi Sir, I modify the function name "saveCaptureFrames()" as the other name, this issue is fixed. I thought this function is a internal function, so I use the same name which I copyed from, I don't know why the same function name will cause this error, even two functions are in different use-case. Anyway, I modify the function name and this error is fixed. Thanks. Ranny. + diff --git a/data2/text/range/0-5000/774364.txt b/data2/text/range/0-5000/774364.txt new file mode 100644 index 0000000000000000000000000000000000000000..637b9d03365be7b6aece7a8a305fd44e4ba28f6d --- /dev/null +++ b/data2/text/range/0-5000/774364.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA2: SD-Card booting: Jumping to MPU CPU0 Application + +Query Text: +Part Number: TDA2 Hello, I included into Vision SDK a new Link and Usecase. With the Debugger the Code works fine. I tried to boot from an SD card. The TDA2 only works until "Jumping to MPU CPU0 Application..." appears in the Terminal. The whole Terminal output is shown below. The SD card works, I tried a functional Appimage and everything was fine. I am not sure in what could be wrong. Is there anything I have to add in the Imagegenerator when I include a new Usecase? Vayu SBL Boot AVS class-0 has been completed already DPLL configuration completed PRCM clock domain force wake-up completed PRCM module enable completed TI tda2xx evm pad configuration completed DDR3 configuration completed AppImage download begins WARNING: Device Id Doesnot match MPU CPU0 image load completed IPU1 CPU0 image load completed IPU1 CPU1 image load completed DSP1 image load completed DSP2 image load completed EVE1 image load completed EVE2 image load completed EVE3 image load completed EVE4 image load completed SBL boot completed succesfully **************SBL Boot-up clock cycles******************* PMCCNTR counts once every 64 clock cycles. To get actual CPU cycle multiple by 64 VM init clock cycles - 416436 soc prcm init clock cycles - 184688 ddr3 init clock cycles - 35867 appImage load clock cycles - 35223999 slavecore bring-up clock cycles - 14292 sbl total boot-up clock cycles - 35946449 ***************************************************************** Flush DCache... Putting CPU1 in OFF... Jumping to MPU CPU0 Application... + +Responses: +Hi Julian, It seems as if IPC attach did not happen. Can you connect CCS and see which core has died? Regards, Rishabh + +Hi Rishabh, I can connect CCS and load the Code in Debuge Mode. There every core looks fine and the Programm is Code is working. Is there any other methode in CCS to see which core died, when I use SD card booting? Regards, Julian + +Hi Julian, Can you share a screenshot of CCS when all CPUs are connected. Make sure that you load symbols for all CPUs. Regards, Rishabh + +Hi Rishabh, I loaded a Program on every core. Whats the difference between load a symbol and a Programm? + +Hi Julian, Are you using the same binaries to create application image when SD boot fails? In order to debug boot failure issue you should try SD boot and then load symbols for individual CPUs to identify the problem. Regards, Rishabh + +Hi Rishabh Yes I use the same binaries to create the application image when SD boot fails. Regards, Julian + +Hi Rishabh, I am now loading symbols while booting from the SD card. I can not connect to the EVE cores in the Debugger. The screenshot shows what I can see in the Dubugger. + +Julian, Have you removed gels before connecting? Regards, Rishabh + +No I didn't remove the gels before connecting. + +Can you remove the gels and load symbols again to identify the reason. Regards, Rishabh + +Where can I find the gels? Regards, Julian + +Julian, You need to right click on the CPU, choose "Open Gel Files View" and then remove gels. This will not change the target configuration permanently. Alternatively you can modify the target configuration itself. Double click on target configuration. Go to advanced tab and remove initialization script. Regards, Rishabh + +Ok i removed the Gel before connecting with the Cores. EVE2 is still not connectible. The Screenshot shows the other Cores loaded with the symbols. + +Hi Julian, From this we know that EVE2 is having some problem. To confirm this you should disable EVE2 and then try the boot. The boot should work. Then you need to analyze what exactly EVE2 is doing after coming to main. What are the changes you have made that can cause EVE2 to crash. Does it need some additional MMU mapping? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/774385.txt b/data2/text/range/0-5000/774385.txt new file mode 100644 index 0000000000000000000000000000000000000000..ffb330d7fa9653eb7f702caa21bdec8ee12b5f41 --- /dev/null +++ b/data2/text/range/0-5000/774385.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: TDA2X BSP DRIVER UNIT/SYSTEM TESTING SAMPLE PROGRAMS + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, how to test all TDA2x BSP driver ? + +Responses: +Hi, Can you refer to processors.wiki.ti.com/.../PDK_TDA_VPS_User_Guide and processors.wiki.ti.com/.../PDK_TDA_BSPLLD_User_Guide Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/774450.txt b/data2/text/range/0-5000/774450.txt new file mode 100644 index 0000000000000000000000000000000000000000..b78a5783f01b6d8d62015416305adeaea14bfb7d --- /dev/null +++ b/data2/text/range/0-5000/774450.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: CSI2 to VIP frame definition in SDK + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 SDK detail for Cascade Radar Host Processor Board PROC055 we need the definition of the FPGA transfer function converting AWR1243 four channels stream on 4 CSI2 lanes, to the parallel 24 bit data signal of VIP input to the TDA2. + +Responses: +You would find the FPGA image which converts the CSI to 16 bit parallel in the SDK www.ti.com/.../processor-sdk-tdax under: D:\PROCESSOR_SDK_RADAR_\ti_components\drivers\pdk_\packages\ti\drv\vps\unit_test\cascadeRadarUt\fpgaimage + diff --git a/data2/text/range/0-5000/774451.txt b/data2/text/range/0-5000/774451.txt new file mode 100644 index 0000000000000000000000000000000000000000..965d7ce0d6cf3ff8f25ee45486e922515d5267de --- /dev/null +++ b/data2/text/range/0-5000/774451.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: Cascade Radar Host Processor Board to 20 channels + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Cascade Radar Host Processor Board PROC055 with TDA2 mates with the AWR1243 PROC054 and has 4 chips with 4 channels each so 16 channels. We need to add another AWR1243 so we have 20 channels. In this case we will need to add a 5th FPGA to get the VIP frame for the TDA2. On the TDA2 ports VIP5 and VIP6 are only 16 bits wide not the 24 bits wide of VIP1, VIP2, VIP3 and VIP4. How should be proceed to enable 5 AWR1243 chips radar channels per TDA2? + +Responses: +Hi Zach, We are currently using only 16 bits in the current SDK for capturing the data on the TDA to capture each of the 4 AWR1243 data. You can use the same for the 5th AWR. BTW the software which supports cascade board is available in www.ti.com/.../processor-sdk-tdax for reference. Thanks and Regards, Piyali + +Hi Piyali, If we will use 16 bit mode as you indicated here, is it the MSB 16 bits for the 24 bits for the LSB 16 bits needed? Thank you, Zach + +Hi Zach, Lower 16 bits (15:0). Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/774469.txt b/data2/text/range/0-5000/774469.txt new file mode 100644 index 0000000000000000000000000000000000000000..760b0eb83d25c0b22123a7cd3e1163a1794559b9 --- /dev/null +++ b/data2/text/range/0-5000/774469.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2: What is the performance of EVE in TDA2PX? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I want to use EVE to deal with 4 720p camera HDR. After I invested, find when I use one eve to deal with 2 720p HDR, the percentage of EVE is about 90%. I think the eve should be more powerful. I use non-bam framework. If the bam framework or non-bam framework has so much effect? And if there is any formal eve performance data? Thanks a lot! Best Regards, Derek Yang + +Responses: +Hi, When I set block width from default value, 64, into 128, and keep the height in default value, 32, the performance improve a lot. But when I increase block width into 256, and keep height in 32, the process can't run. If anybody can help on this? Thanks! Best Regards, Derek Yang + +Derek, There should not be much difference in performance of bam and non-bam applications. For performance data you can refer eve_sw_datasheet.pdf located inside docs folder of EVESW. Regards, Anshu + +Derek, Typically larger the block size you process better is the performance. But these sizes cannot be increased arbitrarily as eventually these block sizes determines how much internal memory you use which is limited. Regards, Anshu + +Hi Anshu, Thanks a lot! I find in apps/apps_nonbam/test/common, the MEMORY define is as below, .. IMEMLA: origin = 0x40050000 length = 0x4000 ... If it is possible to increase the size into 0x8000?. For the block size, I set it into 128x48=6k. If I increase it into 128x64=8k, system will block. But the memory size is 0x4000, 16k. And in EVE app document, the max block size is 32kb. How can I set the block size into bigger one, for example 8k or 16k? Thanks! BRs Derek Yang + +Derek, For all the apps we use alias mode of EVE memory which helps in implementing ping-pong buffer scheme for processing. In this mode each of the image buffer becomes half of the total to support aliasing. So both IBUFL and IBUFH becomes 16KB each. Regards, Anshu + diff --git a/data2/text/range/0-5000/774494.txt b/data2/text/range/0-5000/774494.txt new file mode 100644 index 0000000000000000000000000000000000000000..f9bc8d5270880118dd412b7c8b820e3077786f31 --- /dev/null +++ b/data2/text/range/0-5000/774494.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: EVE Computing power benchmark for deep learning, DSP benchmark for machine learning + +Query Text: +Part Number: TDA2 Tool/software: Linux As we understand, EVE Computing power is used for deep learning, DSP is used for machine learning Would you please provide EVE Computing power benchmark table for deep learning and DSP benchmark table for machine learning ? Or EVE and DSP performance comparison table with popular deep learning SOC? + +Responses: +Hi Joseph, you can check PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs\TIDeepLearningLibrary_DataSheet.pdf for TIDL performance info. Regards, Yordan + diff --git a/data2/text/range/0-5000/774575.txt b/data2/text/range/0-5000/774575.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ecd245f05db92216d103e737b740498270e1614 --- /dev/null +++ b/data2/text/range/0-5000/774575.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: DDR3 Interface pullup resistors of Address/Data Bus + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA756, , , TPS51200-Q1 We study TDA2H/TDA2S/TDA2P reference schematics, we found difference between DDR3 interface schematics: 1. There are not pullup resistors with VTT on TDA2H/TDA2S reference schematics, but some technical support engineers recommend we add pullup resistors for TDA2H/TDA2S/DRA756 schematics; 2. The reference schematics of TDA2P-ACD and TDA2P-ABZ include the following pullup resistors. Would you please help us to explain following schematic usage and function ? + +Responses: +Hi Joseph, These resistors are terminations to VTT. If the memory type is DDR3/3L, TI has validated and supports only the fly-by topology of the C/A bus for each EMIF, with termination to VTT at the bus end. This implies that a dedicated VTT source (stand-alone regulator IC, or part of a complex DDR power solution) is employed in the design and that it is supplying the termination resistors of both EMIFs (the recommended automotive-qualified part is the TPS51200-Q1; it generates also the VREF voltage). If the ECC lane of EMIF1 has been utilized in the design, usage of the VTT-terminated fly-by topology is almost unavoidable for a 32-bit system (due to the odd number of memory chips and very difficult balancing otherwise). Regards, Stan + diff --git a/data2/text/range/0-5000/774894.txt b/data2/text/range/0-5000/774894.txt new file mode 100644 index 0000000000000000000000000000000000000000..1e3adb3cf0f8751e316bd2e387997f0af405d576 --- /dev/null +++ b/data2/text/range/0-5000/774894.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS/TDA2: Is there any way to diagnose the specific PIN on a TDA2X ? + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hello I'm facing the camera data input problem to a specific PIN of VIP on a TDA2X Is there any way to diagnose the PIN with CCS v8 whether active and getting datas or just floating ? Thank you + +Responses: +You can look at the input line state through the GPIO module. Configure the corresponding pin as GPIO input and then look at the GPIO input data register (GPIO_DATAIN). + +Thank you for the answer + diff --git a/data2/text/range/0-5000/775032.txt b/data2/text/range/0-5000/775032.txt new file mode 100644 index 0000000000000000000000000000000000000000..26a2c1a3ccf1a7a7775871a5a58904cf375e17e6 --- /dev/null +++ b/data2/text/range/0-5000/775032.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Linux BSP validation testcases for TDA2x EVM + +Query Text: +Part Number: TDA2 Tool/software: Linux I’m in the process of getting my custom hardware based on TDA2x, so in this regard I’m looking for “Testcases and Test code for validating the Linux BSP” (bootloaders, drivers etc..). Can you please let me know if I can get the BSP Test cases and test codes for TDA2x EVM ? + +Responses: +Hi The test plan and scripts are not included as part of the release package - they are mainly TI internal and we rely on Test Management System to manage execution of these You can use generic driver validation tests - dd,hdparm etc for storage, iperf for network class of devices, V4l2 test for video capture, modetest for display etc + diff --git a/data2/text/range/0-5000/775092.txt b/data2/text/range/0-5000/775092.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ce502f97658901855bed31ee9f97f3598914bd0 --- /dev/null +++ b/data2/text/range/0-5000/775092.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2PXEVM: Not able to compile Network tool which is provided with SDK + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello Experts, I wanted to use the network tool provided by latest SDK. network tool is not getting compiled I have updated the RUELS.MK and COMMON_HEADER.MK file with appropriate toolchain path But still network tool is not compiling Below are the errors I am getting workspace/SDK_VISION_03_06_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc/tfdtp_api.h:80:24: fatal error: sys/socket.h: No such file or directory #include ^ compilation terminated. In file included from tfdtp_api.c:73:0: ../inc/tfdtp_api.h:80:24: fatal error: sys/socket.h: No such file or directory #include ^ compilation terminated. make[3]: *** [depend] Error 1 make[3]: Leaving directory `/data/work/rveer/workspace/SDK_VISION_03_06_00_00/vision_sdk/apps/tools/network_tools/common/src' make[2]: *** [libs] Error 2 make[2]: Leaving directory `/data/work/rveer/workspace/SDK_VISION_03_06_00_00/vision_sdk/apps/tools/network_tools/build' make[1]: *** [depend] Error 2 make[1]: Leaving directory `/data/work/rveer/workspace/SDK_VISION_03_06_00_00/vision_sdk/apps/tools/network_tools/build' Please let me know the solution for compiling network tool Regards, Chaitra + +Responses: +Hi Chaitra, can you check if you have installed all packages listed in "2.2.3 Other mandatory software packages for build" of the VisionSDK_Linux_UserGuide.pdf. (I am concerned that libc-dev package might be missing on your PC). Regards, Yordan + +Hi Yordan, All the manadtory packages are installed. Please let me know is there any other steps to compile the network tool. Regards, Chaitra + +Hi Chaitra, can you check if you have '/usr/include/sys/socket.h' file on your PC? Regards, Yordan + +HI Yordan, /usr/include/sys/socket.h is present in my system it is a system file we need to build network tool against below toolchain/pacakage sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages or sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages we have edited the source/vision/platform/ti/tda2/apps/tools/network_tools/build/RULES.MK file as mentioned below BUILD_OS=Linux ifeq ($(BUILD_OS),Linux) MAKE = make CGTOOLS_PATH=/home/chreddy/workspace/FFC_ADAS/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/gcc-arm-none-eabi-4_9-2015q3 NSP_INCLUDE_PATH=/home/chreddy/workspace/FFC_ADAS/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages/ti/ndk endif please let me know if any changes are required Regards, + +Hi Chaitra, Network Tool is a PC side tool, so for CGTOOLS_PATH you need to use path to your native gcc compiler, usually you should have: CGTOOLS_PATH=/usr/ (build system later uses CC = $(CGTOOLS_PATH)/bin/gcc , thus calling /usr/bin/gcc). For NSP_INCLUDE_PATH you need to use /ti_components/networking/nsp_gmacsw_4_15_00_00/packages, can you try with: NSP_INCLUDE_PATH=/home/chreddy/workspace/FFC_ADAS/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages Also you can check network_tools/docs/VisionSDK_UserGuide_NetworkTools.docx Regards, Yordan + diff --git a/data2/text/range/0-5000/775132.txt b/data2/text/range/0-5000/775132.txt new file mode 100644 index 0000000000000000000000000000000000000000..afc8e0b01e05a27997ba2f0dcb64d548d51816d9 --- /dev/null +++ b/data2/text/range/0-5000/775132.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: PCIe communication two boards RTOS + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I have seen example for PCIe write_loopback for EP and RC for TDA2xx RTOS. How can we make this to communicate two TDA2x boards, one EP and one RC ? + +Responses: +Hi, Can you see processors.wiki.ti.com/.../PDK_TDA_CSL_User_Guide Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, If I try to compile the example I am getting a message like this:- Nothing to be done for tda2xx-evm tda2xx a_15 csl_pcie_rc_write_loopback_app + +Hi, The CORE should be a15_0. Regards, Rishabh + +I explicitly added CORE param as a15_0 in make command , made a change in source code. cleaned the build, rebuilt, still did not compile. + +You don't need to make any changes in source code. Refer to processors.wiki.ti.com/.../PDK_TDA_Building_The_Package on how to build PDK examples. Regards, Rishabh + +Can you list the steps you are following. Also make sure that you have removed all custom changes. Regards, Rishabh + diff --git a/data2/text/range/0-5000/775180.txt b/data2/text/range/0-5000/775180.txt new file mode 100644 index 0000000000000000000000000000000000000000..272e39cfa9621316c5acfa04e4c139d86c69f445 --- /dev/null +++ b/data2/text/range/0-5000/775180.txt @@ -0,0 +1,36 @@ +Ticket Name: Linux/TDA2EVM5777: Connect KSZ989x to cpsw_emac1 ....? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello *! Connect a single PHY to one EMAC is no problem: &cpsw_emac0 { + status = "okay"; + phy_id = <&davinci_mdio>, <9>; + phy-mode = "rgmii-id"; + dual_emac_res_vlan = <1>; +}; This is working fine. But now we have to use a switch behind the cspw... therefor the "port 0" (from Linux view) of the KSZ9893 have been set to "PHY Mode" and I can see the 3 ports over MDIO: [ 1.951119] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown [ 1.959219] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver unknown [ 1.967329] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown (Driver unknown: If a use a simple homebrew driver on base of KSZ9031, it will be probed... BUT: Port0 will get something like a PHY ID: 004040FE...? The other will be shown as 221637 as expected...? Okay, only sidekick information. I go on:) There is a driver for KSZ9893 (in our case) I took from mainline Linux and backported it to our 4.4.84 Kernel. Microchip placed it to "DSA"-part of network driver. I never used a switched like this with DSA... I tried some silly first hook: &cpsw_emac1 { + status = "okay"; + switch@0 { + compatible = "microchip,ksz9897"; + port@2 { + reg = <2>; + label = "lan6"; + }; + + port@1 { + reg = <1>; + label = "lan3"; + }; + + port@0 { + reg = <0>; + label = "cpu"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + Of course... it do not work. Is somebody able to tell me, how it works using a switch behind the cpsw_emac... Maybe somebody used KSZ9897 (or similar?) behind TDA2+ and would tell little secrets? I'm running out of ideas right now... an out of time, too. So: Thank you! Every help is welcome.... + +Responses: +Hi With the native CPSW driver the connection to the external switch will need to appear as a FIxed-PHY connection (no cable connect , disconnect), operating at a fixed speed and duplexity. The device tree parameters need to be modified as such. Any additional Switch configuration is outside the scope of the CPSW driver - it would treat it as external PHY only To the ethernet device node in the device tree file, you need to add a sub device node describing the fixed link to the PHY For more details refer description in Documentation/devicetree/bindings/net/cpsw.txt, Documentation/devicetree/bindings/net/fixed-link.txt + diff --git a/data2/text/range/0-5000/775293.txt b/data2/text/range/0-5000/775293.txt new file mode 100644 index 0000000000000000000000000000000000000000..d52572a97c56d83b790565cfbae375174cc18459 --- /dev/null +++ b/data2/text/range/0-5000/775293.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2: Buying a TDA2x + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Good night! I would like to tell you where I can buy the TDA3x or TDA2x because on the site Texas instruments the sale is not available. Thank you, Hugo + +Responses: +Hi Hugo, please check: www.ti.com/.../samplebuy www.ti.com/.../samplebuy Regards, Yordan + +HI, Yordan! I thank you for your help and I had trouble to follow It looks like we’ve encountered some resistance (Sorry, the page you’re looking for can’t be found.) Regards, Hugo. + diff --git a/data2/text/range/0-5000/776346.txt b/data2/text/range/0-5000/776346.txt new file mode 100644 index 0000000000000000000000000000000000000000..43d4afa37ee14ed3c7f331c02a9da8e8138f2cbb --- /dev/null +++ b/data2/text/range/0-5000/776346.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: Where to find "Image data buffer address of capture source" ? + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Sir, My HW is TDA2x CPU board + Vision Board + daughter board + LVDS sensor and SDK is PROCESSOR_SDK_VISION_03_05_00_00 with TDA2XX_EVM_LINUX_ALL define. I select use-case "4CH VIP LVDS capture + SGX MOSAIC + DISPLAY" and I want to save the source image in this ues-case. I try to check the typedef structure in this case, but I can't find the parameters for recording the image buffer address. "structure name: Chains_lvdsVipMultiCam_SgxDisplayAppObj". May you tell me where to find the image buffer location and any document about describing the structure define ? Thanks. Ranny. + +Responses: +Hi Ranny, Probably, you could put breakpoint on the capture callback, and once it runs FVID2_Dequeue, you could get the address of the frame captured from Fvid2_frameList.frame[0].addr[0][0] field. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/776577.txt b/data2/text/range/0-5000/776577.txt new file mode 100644 index 0000000000000000000000000000000000000000..56a64326206eda5b7e36b9e4067e78ec8264634a --- /dev/null +++ b/data2/text/range/0-5000/776577.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: PCI configuration for TDA2x + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I want to know about how the PCI lines of TDA2x can be configured in linux? I have a custom board developed based on TDA2x. I have to configure PCI as two 1X1 pci .How the configurations can be done in linux? + +Responses: +Hi Sreerag, can you check those documents and see if they can give you some directions: processors.wiki.ti.com/.../Linux_Core_PCIe_EP_User's_Guide processors.wiki.ti.com/.../PCIe_Debugging Regards, Yordan + +Hi Sreerag, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/776609.txt b/data2/text/range/0-5000/776609.txt new file mode 100644 index 0000000000000000000000000000000000000000..456bdef6f99f7d1d591e2fea3ec6d02208e04658 --- /dev/null +++ b/data2/text/range/0-5000/776609.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3: TDA2/TDA3 materials + +Query Text: +Part Number: TDA3 Hello, Is there TDA2X, TDA3x introduction and development process information, materials like PPT, especially focusing on the basic development process, my customer has been evaluating the test platform. This matter is very important to customers, and it is also urgent, could sent to my email if available, thank you! + +Responses: +Hi, Multiple trainings are available on ti.com for starting TDA2/3 development: training.ti.com/tda2-and-tda3-processors-training-series Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Garg, Thanks for your suggestion! + diff --git a/data2/text/range/0-5000/776754.txt b/data2/text/range/0-5000/776754.txt new file mode 100644 index 0000000000000000000000000000000000000000..56a4a0c669aedaf33eb5a5f8a5e54e3cc29dac97 --- /dev/null +++ b/data2/text/range/0-5000/776754.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA3XEVM: Vision SDK for TDA3MA ADAS SoCs - Linux + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA3MA, TDA2 Tool/software: Linux Hi, Please help me to find guidelines to setup Yocto configuration files or Yocto set up for vision SDK for TDA3MA. Is SDK_VISION_03_06_00_00 is latest SDK for this platform Thanks and Regards Vishal Singh + +Responses: +Hi Vishal, Linux support is not available for TDA3 platform. On RTOS side we don't support Yocto builds. You can download latest SDK from software-dl.ti.com/.../index_FDS.html Regards, Rishabh + +Hi, Sorry but I am confused when by this text "Linux not supported for TDA3" As On product page under software tab I observed that Linux Filesystem binaries are attached for this platform. and docs attached also mentions about Linux development and use cases on on this board using Linux. Please refer:- http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html Let me know if I am referring something wrong. it will be really nice if you can elaborate "not support" do you mean Yocto framework not supported for this. or there is no Linux SDK support for this platform. Thanks and Regards Vishal Singh + +Hi, In addition to my last reply does in my last link SDK attached is meant for TDA2 not for TDA3. (please confirm) In this case I am sorry because same link is pointed from TDA3 product page also. Ok if this is case then can you let me know when there is possibility for TDA3 SDK and Yocto support for that. Thanks and Regards Vishal Singh + +Vishal, Linux installer for Vision SDK RTOS is available. Linux OS and Yocto support is not available. Hope this helps. Regards, Rishabh + +Hi Rishabh, Thanks I got the point. May i know what is probable date when Yocto build and Linux SDk for this platform will be available. Is TDA2 family is supported with Linux OS SDK. Thanks and Regards Vishal Singh + +Vishal, Vision SDK Linux is already available today for TDA2 platform. We are not planning to add Linux support for TDA3. Regards, Rishabh + +Hi Rishabh, Thanks for your quick reply It really helped to clarify confusion . Thanks and Regards Vishal Singh + diff --git a/data2/text/range/0-5000/776807.txt b/data2/text/range/0-5000/776807.txt new file mode 100644 index 0000000000000000000000000000000000000000..dae574d227cfa91fe4b33f08489f2f81d32297c5 --- /dev/null +++ b/data2/text/range/0-5000/776807.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: To add the 5th AWR1243 here are the pinout changes + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 To add the 5th AWR1243 here are the pinout changes we are planning to the cascade radar reference design. Can you confirm we are not using any pins incorrectly? With Muxmode = 7 Pins needed for 5th AWR1243: Pin remove add C14 open vin6a_fld0 G12 I2C5_SDA vin6a_vsyn F12 I2C5_SCL vin6a_hsyn B13 TDA_FPGA_SPI_SEL_A_GPIO5_12 VIN6A_D13 A12 TDA_FPGA_SPI_SEL_B_GPIO4_17 VIN6A_D12 E14 TDA_AWR1_GPIO0_GPIO4_18 VIN6A_D11 A13 TDA_AWR1_GPIO1_GPIO6_4 VIN6A_D10 G14 TDA_AWR1_GPIO2_GPIO6_5 VIN6A_D9 F14 open VIN6A_D8 B12 TDA_AWR2_SPI_INT_GPIO5_10 VIN6A_D15 A11 TDA_AWR3_SPI_INT_GPIO5_11 VIN6A_D14 D14 open VIN6A_DE0 A19 open VIN6A_D7 C15 open VIN6A_D5 A16 open VIN6A_D4 A18 open VIN6A_D6 B18 open VIN6A_D3 B19 open VIN6A_D1 C17 open VIN6A_D0 F15 open VIN6A_D2 E17 open VIN6A_CLK0 D18 open VIN6A_D0 Move these signals to new pins: Pin remove add AA3 TDA_VIN4A_D20 I2C5_SDA AB9 TDA_VIN4A_D21 I2C5_SCL C18 TDA_VIN4A_D16 TDA_AWR2_SPI_INT_GPIO5_10 A21 TDA_VIN4A_D17 TDA_AWR3_SPI_INT_GPIO5_11 G16 TDA_VIN4A_D18 TDA_AWR1_GPIO0_GPIO4_18 D17 TDA_VIN4A_D19 TDA_AWR1_GPIO1_GPIO6_4 AB3 TDA_VIN4A_D22 TDA_AWR1_GPIO2_GPIO6_5 R6 TDA_VIN3A_MUX_D16 TDA_FPGA_SPI_SEL_A_GPIO5_12 T9 TDA_VIN3A_MUX_D17 TDA_FPGA_SPI_SEL_B_GPIO4_17 + +Responses: +Hi Zach, Please find some feedback on the pin list below: C18 TDA_VIN4A_D16 TDA_AWR2_SPI_INT_GPIO5_10 --> Pad does not support GPIO. A21 TDA_VIN4A_D17 TDA_AWR3_SPI_INT_GPIO5_11 --> Pad does not support GPIO G16 TDA_VIN4A_D18 TDA_AWR1_GPIO0_GPIO4_18 --> Pad does not support GPIO D17 TDA_VIN4A_D19 TDA_AWR1_GPIO1_GPIO6_4 --> Pad does not support GPIO AB3 TDA_VIN4A_D22 TDA_AWR1_GPIO2_GPIO6_5 --> Pad does not support GPIO R6 TDA_VIN3A_MUX_D16 gpio7_3 T9 TDA_VIN3A_MUX_D17 gpio7_4 Others are okay. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/776941.txt b/data2/text/range/0-5000/776941.txt new file mode 100644 index 0000000000000000000000000000000000000000..df4c36f8518c48529fcb78e0f25324d69ac23868 --- /dev/null +++ b/data2/text/range/0-5000/776941.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2: TDA2 5h AWR1243 frame over PCIe + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 To achieve 32 channel radar we are putting two of the TDA2 Cascade Radar hosts together. TI has recommended these two TDA2 chips are connected together by PCI-e to facilitate synchronization for all 32 channels. Will it be possible to pass a AWR1243 4 channel VIP frame between the two TDA2 chips to process data in the center channel? + +Responses: +Pass the VIP frames over PCI-e in real time? + +Zach, what is the kind of data rates you are looking at? We have PCIe based storage to SSD which can potentially reach 400-420 MBytesps data rates. On Processor SDK 3.6 release there is a known issue for the PCIe speeds which limits the data rate to 1.6 Gbits ps, which is planned to be fixed in 3.7. Thanks and Regards, Piyali + +Hi Piyali, We are planning 30 frames per second of 128 doppler for the 1024 bits per chirp for 12 transmitter at the AWR1243 ADC resolution for 12 bits so per channel: 30 x 128 x 1024 x 128 x 12 x 12 = 566,231,040 bits per second for each channel. We have been thinking in terms for a VIP frame with we assume had 4 channel interlaced per VIP frame. So we need 4 times this number of bits per second. This is more then the 1.6 Gbps currently supported by PICe. When will SDK 3.7 release? Is this same SDK of the TDA2-AWR1243 we are on hold for? What is the PCI-e expected data rate at that time? Can we plan on taking the VIP and separate it into channels and pass just on channel each way between the two TDA2 rather then the 4 channel VIP frame? Regards, Zach + +Hi Zach, To set your expectation correctly, we don't have application level SW for board to board communication over PCIe. We have bare metal PCIe driver which can be used as your base to implement your own SW for the board to board communication. Or, we have third party who can provide board-to-board PCIe solution. The bare metal driver can transfer data between board at > 4Gbps. The 1.6Gbps throughput Piyali mentioned was the PCIe SSD card write throughput using Linux SW with block driver. We are working on improving the performance. However, this is not applicable to your usage since it doesn't have support for board to board communication. Regards, Stanley + +Thank you Stanley. Please provide the third party who can provide board-to-board PCIe solution contact information? Thank again, Zach + +You can contact RT-RK. + diff --git a/data2/text/range/0-5000/777041.txt b/data2/text/range/0-5000/777041.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d3d0b1487716d5415288824e3d5f8e0b099a399 --- /dev/null +++ b/data2/text/range/0-5000/777041.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: TDA2XX Vision SDK + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi， TDA2XEVM board have Connectors and Transceivers，with Video output interface： one HDMI Out, one FPD-Link III, one LCD. CPU Board Block Diagram have VOUT3 interface，As shown below.but I see all of the Use case in VisionSDK_DataSheet.pdf, Display on LCD or HDMI capture and HDMI display are also supported. I want to know which Use case Video output use VOUT3 interface?and I want to Let VOUT3 be the video output interface，what should I do？ Regards, YCC + +Responses: +Is any display device connected on vout3? Then it would be supported in VSDK.. Rgds, Brijesh + +because all use case use VOUT1 port (connect LCD) or HDMI port (Display can be on HDMI display via HDMI output port).They are not use VOUT3 port .So I want to know how to use VOUT3 port. Can it connect LCD or HDMI display device?Can you give me a use case that use VOUT 3 port ? Thank you! Regards, ycc + +Please check schematic and see if anything connected to LCD3 output.. It can be enabled only if some display is connected.. It can be enabled in ChainsCommon_SetDctrlConfig in the file vision_sdk\apps\src\rtos\usecases\common\chains_common.c file.. Rgds, Brijesh + +Hi，Brijesh VOUT3 connected a LVDS monitor ,The model of lvds is user-customized.Interface chip used is DS90UB940. How can I set it up？Which documents should I refer to? Regards, Ycc + +Hi，Brijesh VOUT3 connected a LVDS monitor ,The model of lvds is user-customized.Interface chip used is DS90UB940. How can I set it up？Which documents should I refer to? Regards, Ycc + +Hi， VOUT3 connected a LVDS monitor ,The model of lvds is user-customized.Interface chip used is DS90UB940. How can I set it up？Which documents should I refer to? Regards, Ycc + +Hi YCC, Give me some time, i will come up with the exact steps required for vout3 addition.. Rgds, Brijesh + +Hi Brijesh, Thank you for providing the requested information. How the work progresses about the use of VOUT3？I urgently need the help of this questions. Thank you for your attention to this matter. I am looking forward to your reply. Regards, Ycc + +Hi , I haven’t received your reply for a long time. How the work progresses about the use of VOUT3？I urgently need the help of this questions. Thank you for your attention to this matter. I am looking forward to your reply. Regards, Ycc + +Hi YCC, Could not get time to check it. Will check it tomorrow and get back to you. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/777316.txt b/data2/text/range/0-5000/777316.txt new file mode 100644 index 0000000000000000000000000000000000000000..05e4da9c1a085ba237d006ceb839c89ac414be63 --- /dev/null +++ b/data2/text/range/0-5000/777316.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2EVM5777: Is TDA2x a processor or evaluation board? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, DM505 Is TDA2EVM5777 evaluation board? What SOC or processor is on this evaluation board? + +Responses: +Hi Amer, it is evaluation board with TDA2x SoC, you can check it's page on ti.com for description: www.ti.com/.../TDA2EVM5777 Regards, Yordan + +In addition to what Yordan suggested, I wanted to clarify that the 5777 is the superset chip that contains all features of all TDA2x parts for your evaluation purposes. Thanks, Alex + +What is 5777? Is it a SOC like TDA2x? Could you provide complete part number for 5777? + +It's just labeling of the superset TDA2x SOC found on your EVM. There is no part number because you can't order it. Like I said it's for evaluation. When you decide which features you will use from the superset, then you can pick a particular TDA2 part number. thanks, Alex + +Currently, I'm unable to access TDA2 link provided above. We need to know all SOC's that are similar to DM505. We want to read about SOCs that DM505 resources such as Image Signal Processor(ISP) and Display Subsystem(DSS) but also have features such as H.264 engine and USB 3.0. Regards, Amer + +Hi Amer, you can check this page where you can filter the processors by features: www.ti.com/.../products.html Regards, Yordan + +If you really need a twin device to the DM505x, you should look at TDA3x, here is its datasheet: www.ti.com/.../tda3.pdf Or you can also look at the TDA2Px (TDA2 Plus) which is TDA2 "plus" the ISS and other stuff, here is the datashet of the ACD package: www.ti.com/.../tda2phg-acd.pdf Right now your EVM is with TDA2x superset (but still not the Plus device) which doesn't contain ISS. thanks, Alex + +TDA2 is Automotive. Are there non-automotive versions of TDA2? Like DM505 is non-automotive version of TDA3. + +Hi Amer, you can check Sitara processors: www.ti.com/.../products.html Regards, Yordan + +TDA2 Plus meets our needs. Is there a non-automotive version of this SOC. We need ISS, USB 3.0, DSS, IVA-HD Regards, Amer + +Can you contact your TI representative? There may be some Sitara parts similar to the TDA2 Plus which are not part of the public catalog right now. thanks, Alex + diff --git a/data2/text/range/0-5000/777424.txt b/data2/text/range/0-5000/777424.txt new file mode 100644 index 0000000000000000000000000000000000000000..f3b666e0ae501ad8dd2d0033d53036417ebb8776 --- /dev/null +++ b/data2/text/range/0-5000/777424.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: How does TDA2 achieve video processing? + +Query Text: +Part Number: TDA2 TDA3 SOC achieves live video processing in purely hardware using Imaging Subystem(ISS). How does TDA2 achieve live video processing? Regards, Amer + +Responses: +Amer, ISS is mainly used for converting RAW bayer data into YUV format, RAW data is captured from the bayer sensor. TDA2x does not have ISS, TDA2x uses sensors which outputs YUV data directly. Rgds, Brijesh + +RAW monochrome data will be captured from our sensor. No companding. Typically, how would TDA2x process live RAW monochrome video? Regards, Amer + +Amer, As far as i know, there is no algorithm to process monochrome data. You will need to add this algorithm. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/777428.txt b/data2/text/range/0-5000/777428.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec981e63e2544f6c812567975a0f7f097448761b --- /dev/null +++ b/data2/text/range/0-5000/777428.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2: What is purpose of VPE in TDA2x Superset? + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DM505, Is VPE in TDA2 similar to ISS in DM505? Can live video processing be achieved using VPE module? If yes, would it be purely hardware? + +Responses: +Amer, VPE is difference module on TDA2x and is not similar to ISS.. VPE can be used for the scaling and color conversion operation, whereas ISS can be used for Bayer to YUV conversion and scaling.. Rgds, Brijesh + +Hi, Amer Naseem, In addition to Brijesh's answer, please download the Technical Reference Manual books for both devices and go through chapter 7 Imaging Subsystem (for TDA2) in and Chapter 10 Video Processing Engine (for DM505) in Regards, Mariya + diff --git a/data2/text/range/0-5000/777429.txt b/data2/text/range/0-5000/777429.txt new file mode 100644 index 0000000000000000000000000000000000000000..f7f373c7e012f6964095a6e1540da526f4408cd3 --- /dev/null +++ b/data2/text/range/0-5000/777429.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: Can H.264 encoding achievable purely in hardware using IVA HD Co-Processor? + +Query Text: +Part Number: TDA2 In TDA2x Superset, can H.264 encoding achievable purely in hardware using IVA HD Co-Processor? Regards, Amer + +Responses: +Hi Amer, it can not encode directly, you need separate SW encoder. Regards, Yordan + diff --git a/data2/text/range/0-5000/777618.txt b/data2/text/range/0-5000/777618.txt new file mode 100644 index 0000000000000000000000000000000000000000..34c8988d41fcec09f1eeafde719fa3b5561cf2c5 --- /dev/null +++ b/data2/text/range/0-5000/777618.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: I2C configuration for processor as SLAVE + +Query Text: +Part Number: TDA2 Tool/software: Linux HI, How can we configure the Processor as I2C slave in TDA2x? I have I2C4 to be configured as I2Cslave . Is it possible to configure CONFIG_I2C_SLAVE? + +Responses: +Hi Sreerag, current version of I2C-omap driver do not support slave mode. You can check those posts for detailed description: e2e.ti.com/.../2151948 e2e.ti.com/.../2156908 Regards, Yordan + diff --git a/data2/text/range/0-5000/777629.txt b/data2/text/range/0-5000/777629.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6ad0fe1907f3b29af9c5d2c8bca09910ad7ae14 --- /dev/null +++ b/data2/text/range/0-5000/777629.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2EVM5777: Linux/TDA2EVM5777 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello, I cann't find pinmux file for TDA2EVM5777 evaluation board. Can you help me find it? Thanks + +Responses: +Hi, You should use the pinmux tool: https://dev.ti.com/pinmux/ Regards, Rishabh + +Helllo, I needs a *.pinmux file (for example, " TDA2EVM5777.pinmux") for corresponding EVM module. Regards, Maxim + +Hi, We don’t have sample files for TDA2 EVM. You can choose the mux mode values from tool and generate the file. You can use files for a similar device as reference: bitbucket.itg.ti.com/.../board_files Regards, Rishabh + +It's pity. P.S. Developers, which made EVM did not used PinMux utility really? + +Hi, Unfortunately Vision SDK does not use this tool. Every driver does pin mux before using the respective peripheral. Regards, Rishabh + diff --git a/data2/text/range/0-5000/777692.txt b/data2/text/range/0-5000/777692.txt new file mode 100644 index 0000000000000000000000000000000000000000..88b01c6543d4000d533c7a63f9c58f41218700c8 --- /dev/null +++ b/data2/text/range/0-5000/777692.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ACD: balls AA1,AA2,AB1,AB2,AC1,AC2 + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2, DRA77P Hi. (1) There is no mech.drawing of ACD(784-balls)-package in datasheet. Do I need to use ABC(760-balls)-package drawing as reference for my design? (Does it have the same size and pitch? Is ABC the same as ACD but only 24 balls are excluded?) (2) There are no any description about 6-balls in TDA2P-ACD-datasheet: AA1,AA2,AB1,AB2,AC1,AC2. Where I can find info about Pullup or Pulldown requirements for these balls if they are unused? These balls marked as MLBP-pins in SD TDA2P_EVM design (see picture). Is DRA7x TRM applicable for reference TDA2 MLBP description? But, do I need to use DRA7xxP datasheet for reference about these balls? --- best regards + +Responses: +Hi Arseniy, 1. As layout - yes, ACD is the same as ABC, but includes missing balls - 23 mm × 23 mm, 0.8-mm Pitch. Note that ball-mapping is different - they are not pin compatible! Please also note that ACD have different dimensions: 2. Yes, these balls are unused in TDA2P devices. You should leave them unconnected. Thanks, Dian + diff --git a/data2/text/range/0-5000/777746.txt b/data2/text/range/0-5000/777746.txt new file mode 100644 index 0000000000000000000000000000000000000000..ee37b69b67de65e9e0e47dc276182961037d4b6f --- /dev/null +++ b/data2/text/range/0-5000/777746.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2: Termination Resistors on PCI-e TX and RX + +Query Text: +Part Number: TDA2 Is the a requirement for termination resistors on TX and RX for the PCI-e layout? This PCI-e bus is chip to chip not to an off board device. I see in the recommended layout details for differential and single ended trace impedance. The is detail on the clock termination 50 ohm to GND on P and N. Other resources for PCI-e show TX and RX termination resistors both to GND and across P and N. + +Responses: +There is not much space to place the termination resistors to I am hoping I can get by without... + +Hi Zach, PCIe data lanes are internally terminated. No need for external termination. Note the need for AC-coupling capacitors on the Tx path however (on both PCIe devices). Best regards, Stan + +Regarding TDA2 clock input (LJCB): • If the clock is provided externally by a High-speed Current Steering Logic (HCSL) source, no termination at the TDA2 LJCB_CLKN and LJCB_CLKP differential input is needed, and the lines should be DC-coupled. The standard 50 Ohm single-ended termination that is inherent to HCSL should be implemented at the clock source. • If the clock is provided externally by a LVDS source, the lines must be AC-coupled and a parallel (differential) termination of 100 Ohm might be required at the receiver. In this case, check that 100 nF capacitors are present on the clock pair lines, and that a 100 Ohm resistor is connected between the TDA2 LJCB_CLKN and LJCB_CLKP pads. + +I have one TDA2 on one side and another TDA2 on the other side as well. Both have sides for the clock diff pair have 50 ohms to ground of P and N, and AC coupling caps. Do we need the 100 ohms parallel resistor in this case? + +Hi, Can you please post a diagram of the clocking? Including the clock generator IC, clock path, clock inputs of TDA2s. Thanks, Stan + + + +Hi Zach, This must be like bullet (1) from my previous post. Assuming U1A is clock source and the other TDA2 is clock consumer, then you need only R301 and R302. Other components must be removed. Regards, Stan + +Stan, Ok. Remove the capacitors as well so not AC coupled as I read in the datasheet. So my original question, the TX and RX signals. These do need to be AC coupled and don't need termination resistor just the impedance controlled trace? Thanks, Zach + +Please see summary below: + +Great! Thank you. + diff --git a/data2/text/range/0-5000/777896.txt b/data2/text/range/0-5000/777896.txt new file mode 100644 index 0000000000000000000000000000000000000000..1d545973ac94bb198e221b794dc2cf5988556257 --- /dev/null +++ b/data2/text/range/0-5000/777896.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2: how to remove symbol tables from compiler Libraries + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi : i use ccs compiler Libraries, now i want to remove symbol tables from Libraries , What compilation options should i use? + +Responses: +Hello, If I am understanding your question correctly, one way to do it is from the CCS build options menu. Sample screenshot below. Hope it helps, thanks, Alex + diff --git a/data2/text/range/0-5000/777925.txt b/data2/text/range/0-5000/777925.txt new file mode 100644 index 0000000000000000000000000000000000000000..d91af048fd782d92f77f23e21fce9df51c890b1c --- /dev/null +++ b/data2/text/range/0-5000/777925.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: Can network_tx.out in network tool be set to TCP/IP mode, not using TFDTP, how to set + +Query Text: +Part Number: TDA2 Tool/software: Linux Create a Vision SDK use-case on target side. Specify the source of data as “Network_rx” link. NDK runs on A15 CPU. NDK_PROC_TO_USE=a15_0. Set NetworkRxLink_CreateParams.dataRxMode as NETWORK_RX_LINK_DATA_RX_MODE_TCPIP I use the network tool to send image data on the pc side, Network Tx: Connecting to server 172.18.0.205:29171 ... # ERROR: NETWORK: Server connect Failed (172.18.0.205:29171)!!! # INFO: Closing connection to Server + +Responses: +Hi Hua Liu Liu, Do you want to send the captured data to the PC via the network (network_rx) or File from PC to the evm for HDMI Display (network_tx) ? These are the commands you should use respectively Network Tx ---------------- network_tx.out --target_ip --host_ip --files Network_Rx ---------------- network_tx.exe --target_ip --host_ip --files If you don't use --usetfdtp in the command, it'll use tcp/ip for default. Regards, Anand + +Hi Anand, I want to sent File from PC to the evm for HDMI Display (network_tx) , Network TX ----------------------- root@ubuntu:/home/ti/vision_sdk/apps/tools/network_tools/bin# ./network_tx.out --target_ip 172.18.0.200 --host_ip 172.18.0.156 --files airshow_1280x720_5frs.yuv # Network Tx: Connecting to server 172.18.0.200:29171 ... # ERROR: NETWORK: Server connect Failed (172.18.0.200:29171)!!! # INFO: Closing connection to Server # Network Tx: Connecting to server 172.18.0.200:29171 ... + +Hi Hua Liu Liu, Please try the ping and make sure it works before trying out a network usecase. I'm assuming you're using dynamic IP here. Regards, Anand + +Hi Anand, Thanks, In the windows environment,I sent File from PC to the evm for HDMI Display (network_tx) ,is ok. I ported the networ_rx code to Linux and it is a bit of a problem. Let me check the code myself. + +Sure, Hua Liu Liu. Let me know of any updates! Regards, Anand + +Hi Anand, NDK_PROC_TO_USE=a15_0, #define VIDEO_SENSOR_NUM_LVDS_CAMERAS (4) Camera 1, Camera 2, Camera 3 and Camera 4 are used for 4 channel LVDS use-case I joined NetworkRx (A15) in lvds_vip_sv_standalone, there is no image output in the loop, and there is a conflict when the camera is used with the network. + +Hi, What exact changes did you make when you ported the code to linux? I suppose the usecase was working for you in Windows. Have you made any additional changes? Regards, Anand + +No code changed during the migration process。I am running under windows, no problem, I am transplanted to linux to run the following problems ASSERT (chains_lvdsVipSurroundViewStandalone_priv.c|chains_lvdsVipSurroundViewStandalone_Create|332) line332：status = System_linkCreate(pObj->NetworkRxLinkID, &pObj->NetworkRxPrm, sizeof(pObj->NetworkRxPrm)); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + +Hi Hua Liu Liu, I am not sure how these changes would affect the 'TCP/IP or TFDTP' parameter. So the System_linkCreate is not successful in your linux code? I mean the assert is failing? Regards, Anand + +Hi Hua Liu Liu, It's been a while since I've heard from you. Were you able to resolve the issue? :) Regards, Anand + diff --git a/data2/text/range/0-5000/777943.txt b/data2/text/range/0-5000/777943.txt new file mode 100644 index 0000000000000000000000000000000000000000..62c66f26adaa1e269122100cd369a0ea94edb31b --- /dev/null +++ b/data2/text/range/0-5000/777943.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: How to integrate a simple application with SDK. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, i want to integrate my openGL based application with SDK . please tell me how i can do that. thank you + +Responses: +Vijender, SDK exposes standard openGL ES 2.0 EGL libraries. As long as your application uses the standard APIs, it can be integrated to the SDK - Subhajit + diff --git a/data2/text/range/0-5000/778057.txt b/data2/text/range/0-5000/778057.txt new file mode 100644 index 0000000000000000000000000000000000000000..37eac6dfdab903ae16cbd92f504ac48f1c5450c1 --- /dev/null +++ b/data2/text/range/0-5000/778057.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Linux/TDA2: I2C configuration for processor as SLAVE + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, How can we configure the Processor as I2C slave in TDA2x? I have I2C4 to be configured as I2Cslave . Is there any sample example for Multiprocessor communication or have any example for I2C slave config? + +Responses: +Hi, You can refer to PDK example app: PROCESSOR_SDK_VISION_03_06_00_00\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\stw_lld\examples\i2c\i2c_slave_app Regards, Rishabh + +Hi, Is there any document to know what the example is for? I tried it with connecting with an i2c master device. But the slave is not detected at master side. How the acknowledgment from slave to master is send in this example? + +Hi, My suggestion will be to go through printUsage API in the application. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/778365.txt b/data2/text/range/0-5000/778365.txt new file mode 100644 index 0000000000000000000000000000000000000000..400e8404ffc3722efe2b0a11b97bc08078cfe979 --- /dev/null +++ b/data2/text/range/0-5000/778365.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2: How to find the target name in "Modify Build Target" window + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi, i want to compile the u-boot in CCS linux plate form . i ref. that training link "training.ti.com/linux-board-porting-series-module-6-building-u-boot-ccs but i not able to find the Target name . please suggest the target name for TDA2x device. during build i found that error "10:52:24 **** Build of configuration Default for project u-boot **** make ARCH= arm CROSS_COMPILE=arm-linux-gnueabihf- tda2xx_evm_linux_all scripts/kconfig/conf --silentoldconfig Kconfig *** scripts/kconfig/Makefile:46: recipe for target 'silentoldconfig' failed *** Configuration file ".config" not found! Makefile:477: recipe for target 'silentoldconfig' failed *** *** Please run some configurator (e.g. "make oldconfig" or *** "make menuconfig" or "make xconfig"). *** make[2]: *** [silentoldconfig] Error 1 make[1]: *** [silentoldconfig] Error 2 make: *** No rule to make target 'arm'. Stop. 10:52:25 Build Finished (took 769ms)" + +Responses: +Hi Vijender, I am not sure how to compile u-boot in CCS, but in VisdionSDK for u-boot defconfig for TDA2x is used 'dra7xx_evm_vision_config' . Regards, Yordan + +Hi Vijender, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +thanks Yordan, Now this is working fine. + diff --git a/data2/text/range/0-5000/778597.txt b/data2/text/range/0-5000/778597.txt new file mode 100644 index 0000000000000000000000000000000000000000..82a529206f02fab3e3f23e842da7279dfaec1c94 --- /dev/null +++ b/data2/text/range/0-5000/778597.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2: [Vlib in vision sdk]. Is Vlib function thread safe ? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Ti, I am currently use Vlib with links-chain concept in the latest rtos vision SDK for TI TDA2X (2 dsp core). I have used vlib's connected component function and it works fine. Now i plane to use this function to multiple 'link'(thread) on 2 dsp cores. (2 links on 2 dsp core each. total 4 links) Problem is, this function does not work correctly when I use it with multiple link with 2 dsp cores. (It works fine if I use just one link on one dsp core.) All the memories for each connected component functions are allocated in inside of link, and, I checked that the memories not invaded each other. They have a different address. But It seems that the results of each functions are mixed. Have Vlib function tested with multiple link? Is it thread safe ? + +Responses: +No, VLIB is not thread-safe and was not designed or tested as such. This may explain the issue you are seeing. + +Thank you Jesse. + diff --git a/data2/text/range/0-5000/779150.txt b/data2/text/range/0-5000/779150.txt new file mode 100644 index 0000000000000000000000000000000000000000..f0c7a74addaaf26ad284166dd5e843c500ae9116 --- /dev/null +++ b/data2/text/range/0-5000/779150.txt @@ -0,0 +1,17 @@ +Ticket Name: Linux/TDA2: Trivially reproducible hard lockup (JTAG reports pipeline stall) with RT Linux and FIO + +Query Text: +Part Number: TDA2 Tool/software: Linux We have a Cortex-A15 based device (the TDA2) and with the RT kernel and fio 2.16-1 from Debian, I get a lockup where JTAG reports: CortexA15_0: Trouble Halting Target CPU: (Error -1323 @ 0xFFFF1044) Device failed to enter debug/halt mode because pipeline is stalled. Power-cycle the board. If error persists, confirm configuration and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.0.903.6) + This typically happens within a minute of starting the test. Because it happens with a ram based block device and not actual hardware I'm assuming this can be duplicated on hardware other than our own. I'm hoping someone else can try this test on newer RT kernel versions (we're using 4.1) and report back on whether they see issues. Here is the fio test file: [global] name=fio-verify-RW filename=fio-verify-RW rw=randrw bs=4K numjobs=1 invalidate=1 iodepth=1 loops=1 verify=crc32 [file1] filename=/dev/nullb0 I chose the null_blk device driver but any block device works, such as an actual physical block device, a loopback mounted file on tmpfs, or the ramblock driver. Writing to a file does not duplicate the issue. Not verifying the data greatly decreases the likelihood of seeing the lockup. I also can't reproduce on a non-RT kernel. + +Responses: +Hi The SDK release does not support RT kernel patches - hence we have not validated RT support on the SDK code base. Are you trying to bring this up on a different kernel version and have integrated RT patches on your own - would be quite difficult to support in which case. Though not part of the SDK, RT patches have been integrated on TI kernel branches for kernel 4.4/4.14 - refer git.ti.com/.../ti-rt-linux-4.14.y as an example. This should serve as better baseline for RT feature development, but please be aware that not all SDK features,patches would be available on this branch Finally to re-iterate SDK release does not support RT kernel patches and there are no plans to take this up + +Hi, I am not asking TI to support my specific kernel on my specific processor. I provided a test case which should be very fast to reproduce on alternate CPUs and kernels since it uses very standard software - fio - and doesn't require any specific hardware. My understanding is many TI processors are quite similar to each other, so others who are using a cortex-A15 based processor from TI, perhaps such as a Sitara 5728, and an RT kernel may want to try this test case. If so I'm hoping they will report back on what happened for them. + +Hi Did check internally on the specific tests that we run In addition to running cyclic test to measure latency, we also run block IO test(read/write to block media) to measure IO throughput in case of RT kernel. We have not run FIO tests + +We have not been able to reliably reproduce this with anything other than FIO, and only when writing directly to a block device. We write directly to block devices as part of our software update proces, but this does not reliably reproduce the hard lockup. + +Sarah Our product test team was able to run FIO tests against 4.19 kernel(TI kernel:RT and non-RT branches) and did not see any lockups Testing was carried out on AM57x platform + diff --git a/data2/text/range/0-5000/779268.txt b/data2/text/range/0-5000/779268.txt new file mode 100644 index 0000000000000000000000000000000000000000..c92cc3c939c39f44df182b515cf7fb6c318e604d --- /dev/null +++ b/data2/text/range/0-5000/779268.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2: TDA2X + +Query Text: +Part Number: TDA2 Hi, I want a boot print message for a TDA2X EVM board.Could you give me a complete Boot print log？Please send me a document.Thank you! Best regards , Ycc + +Responses: +Hi Ycc, Are you running RTOS or Linux? Regards, Rishabh + +linux + +Hi, I use SD only boot,when Create SD card boot and insert it into EVM micro SD slot.Turning on the power of TDA2XEVM，then give me a complete print log.Thank you! Best regards , Ycc + +Hi, Please find attached the logs for the application (Vision-SDK) as well the kernel logs on boot-up. Regards Shravan VSDKLinux boot logs.txt + +Hi, I have already seen your VSDKLinux boot logs.txt.I have a question.when you Log in as root on the UART console,you can run ./apps.out directly. I compiled VisionSDK according to VisionSDK_Linux_UserGuide to create SD card boot.The instructions for running the demo are as follows： I have to run load_ocl_kos.sh、opencl_env.sh、vision_sdk_load.sh first,then run apps.out.Otherwise it will give an error.As shown below root@dra7xx-evm:/opt/vision_sdk# ./apps.out ASSERT (osa_mem.c|OSA_memInit|595) Why can you run apps.out directly?What are the effects of these three documents?Finally, I attached the log record of my operation. Regards， Yccmy log.log + +Hi， I am sorry that the picture above is wrong.The instructions for running the demo in VisionSDK_Linux_UserGuide are as follows: I am looking forward to your reply. Regards, Ycc + +Hi, You have to run the vision_sdk_load.sh script before running apps.out as it loads the memcache kernel module which is used by the Vision-SDK application. If you have any further questions, please create a new thread, we will support you. Issue pertaining to the Vision-SDK logs is resolved. Thank you. Regards Shravan EDIT: You need to run the script vision-sdk-load.sh, not source it. please go to /opt/vision_sdk folder and run ./vision-sdk-load.sh. + +Hi Ycc, Even in the log shared with you, ./vision_sdk_load.sh is called. Other two scripts are needed for for opencl. The scripts are present here: PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\build\hlos\scripts\linux. I would suggest you to go through them to understand what each one is doing. Regards, Rishabh + diff --git a/data2/text/range/0-5000/779975.txt b/data2/text/range/0-5000/779975.txt new file mode 100644 index 0000000000000000000000000000000000000000..72b50444cc89b2c153e949b72cea99c0cdcca6be --- /dev/null +++ b/data2/text/range/0-5000/779975.txt @@ -0,0 +1,28 @@ +Ticket Name: Looking for a, ISP chip that can handle two 1080p60 streams + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello, I am building a stereovision setup that will use two 1080p60 camera sensors that will either use MIPI CSI-2 or (SUB) LVDS. The ISP chip should be as cheap as possible and handle the two streams so that it can give them to a main processor that will run algorithms to determine the depth. It should have these protocols: CSI-2, LVDS, USB and PCIe. + +Responses: +TDA2Px + +I see that many of the TDA2 and TDA3 chips have multi camera interfaces, how would I know that the TDA2Px chips are the best ones? I am also planning on adding an IR pattern chip like the Panasonic Grid-EYE and the SoC should include a timestamp as well. + +Hi, Both TDA3x and TDA2Px support CSI serial as well as parallel input interface. On CSI input interface, we could interleave frames from multiple camera and both of these devices can receive them and demux them.. There are multiple parallel interfaces supported and you could connect one camera to each of these parallel input paths. Rgds, Brijesh + +Thank you for the asnwer. However, I see that most camera sensors that can capture 1080p at 60 fps use the SUB LVDS serial connection, for example the Sony IMX265LQR ( www.sony-semicon.co.jp/.../industry.html) We are looking to add a third camera for NIR (which will most likely be the same sensor) or an other use. Would it still be possible to use a TDA chip to capture that simultaneously? + +You would require external device to convert from LVDS to CSI.. Rgds, Brijesh + +Sorry, you would require external module to convert from LVDS to CSI/Parallel. Three cameras are possible to capture over CSI.. Rgds, Brijesh + +Thank you for the response. As seen in paragraph 6.1 from the TDA2Px datasheet "And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB." Wouldn't this mean that I don't need the LVDS to CSI/Parallel converter? + +Hi, I think it says it supports multi-camera interface for LVDS based surround view systems, but it requires external device (ub960) to convert from lvds (FPD Link III) interface to CSI interface.. Rgds, Brijesh + +Thank you, this clarifies a lot. This chip is exactly what I need to bridge the sensors before the ISP chip. It's difficult to find an ISP that supports such inputs simultaneously without looking at FPGAs. + +Hi Petros, Please close the thread if your question is answered. Rgds, Brijesh + +I do have one more question regarding to this chip. Is FPD Link III the same as LVDS? In other words, can I directly connect a LVDS camera to the ub960 chip? + diff --git a/data2/text/range/0-5000/780118.txt b/data2/text/range/0-5000/780118.txt new file mode 100644 index 0000000000000000000000000000000000000000..ef8f9863cd06cdb0c7c0f54f82e8bb06c0bb787b --- /dev/null +++ b/data2/text/range/0-5000/780118.txt @@ -0,0 +1,36 @@ +Ticket Name: RTOS/TDA2-17: Crashing when using simple OpenCV functions + +Query Text: +Part Number: TDA2-17 Tool/software: TI-RTOS Hello everyone! I am trying to use some OpenCV functions from the precompiled libraries on A15 provided with the Vision SDK, version 3.04. These functions work within the given alg-plugin examples, such as in opencvcanny. I can even modify these plugins with other OpenCV calls successfully, as long as I keep everything contained within the "cannyThreadFunc()" in alg_plugins/opencvcanny/canny.cpp However, as soon as I try to move the OpenCV code outside of this function, it crashes with output that looks like this: [HOST ] 51.719971 s: Unhandled Exception: +[HOST ] 51.720002 s: Exception occurred in ThreadType_Task +[HOST ] 51.720002 s: Exception occured in A15 with exception type 18 +[HOST ] 51.720002 s: handle: 0x848ab5b8. +[HOST ] 51.720002 s: stack base: 0x848adb60. +[HOST ] 51.720032 s: stack size: 0x100000. +[HOST ] 51.720032 s: R0 = 0x00000000 R8 = 0x849ac670 +[HOST ] 51.720032 s: R1 = 0x00000001 R9 = 0x849adc5c +[HOST ] 51.720063 s: R2 = 0x00000098 R10 = 0x849adc34 +[HOST ] 51.720063 s: R3 = 0x048c0010 R11 = 0x849ac53c +[HOST ] 51.720063 s: R4 = 0x849ac6c8 R12 = 0x2000015f +[HOST ] 51.720093 s: R5 = 0x849ac660 SP(R13) = 0x8409c430 +[HOST ] 51.720093 s: R6 = 0x849ac670 LR(R14) = 0x8a7350e4 +[HOST ] 51.720093 s: R7 = 0x3ff00000 PC(R15) = 0x8409c430 +[HOST ] 51.720093 s: PSR = 0x849adc5c +[HOST ] 51.720124 s: DFSR = 0x00000206 +[HOST ] 51.720124 s: IFSR = 0x00000000 +[HOST ] 51.720124 s: DFAR = 0x00000010 +[HOST ] 51.720124 s: IFAR = 0x00000000 +[HOST ] 51.720154 s: Terminating Execution... +[HOST ] 51.720154 s: +[HOST ] 51.720154 s: ### XDC ASSERT - ERROR CALLBACK START ### +[HOST ] 51.720185 s: +[HOST ] 51.720185 s: E_dataAbort: pc = 0x8409c430, lr = 0x8a7350e4. +[HOST ] 51.720215 s: +[HOST ] 51.720215 s: ### XDC ASSERT - ERROR CALLBACK END ### + This particular output was caused by multiplying two cv::mat objects inside a .cpp function that was called directly from the "AlgorithmLink_xxxxProcess()" function of a custom-written plugin. Matrix addition and certain constructors were also demonstrated to fail in a similar manner. It seems that there are certain restrictions on how the precompiled OpenCV libraries should be used... or else they will crash the application. Does anyone know what exactly these restrictions are? Much appreciated, Ying + +Responses: +Update! It looks like the application is crashing because I am calling functions from two different threads. This explains why any links using OpenCV dedicate an entire, isolated thread to its use (see opencvcanny or opencvopencldilation, for example). Lesson learned: You cannot use two links that utilize OpenCV in the same chain. You will have to combine their functionality into a single link, or somehow funnel the entire chain's OpenCV usage into a single thread. + +Hi Ying, Thanks for sharing your findings. Regards, Yordan + diff --git a/data2/text/range/0-5000/780234.txt b/data2/text/range/0-5000/780234.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d44a17c6f358e4a552405ab12c3c6af7448e2dc --- /dev/null +++ b/data2/text/range/0-5000/780234.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2SG: DDR usage + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS May I know how to get the DDR usage in percentage? Thank you + +Responses: +Hi, You can see DDR usage by using print statistics “p” option on UART console when you are running Processor SDK Vision. You can see TDA2 performance app note to see theoretical max bandwidth and actual max, then calculate the percentage. Regards, Rishabh + +Hi TDA2 performance app note. Could you please pass me the url? Thank you for quick reply:) + +Hi, Here is the link: www.ti.com/.../sprac21.pdf Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/780272.txt b/data2/text/range/0-5000/780272.txt new file mode 100644 index 0000000000000000000000000000000000000000..05736654fa943fb2b83a61be66b283e390400280 --- /dev/null +++ b/data2/text/range/0-5000/780272.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2PXEVM: I want to know how to boot eMMC of TDA2PX at TI-RTOS + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, Sir As title, I want to know how to boot eMMC of TDA2PX at TI-RTOS. We are doing OS changes from linux to TI-RTOS. So. We downloaded RTOS image(appimage and MLO) in uboot. But,The log looks like this and it does not read the image in emmc. SD Boot - File open fails Valid App Image is not Available Could tou please advice us how to achieve it. Thanks, + +Responses: +Hi, SBL supports QSPI, NOR and SD boot for TDA2 devices. eMMC boot is supported only by Linux i.e. Uboot. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/780294.txt b/data2/text/range/0-5000/780294.txt new file mode 100644 index 0000000000000000000000000000000000000000..62bd4b97376e2ffa5c8131ddf9f943e918db2497 --- /dev/null +++ b/data2/text/range/0-5000/780294.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2P-ACD: RGB888 or YUV420_SP conversion to BGR565 format + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, I'm working on VisionSdk 3.5 and TDA2P-ACD board. My input is in RGB888 or YUV420_SP. I want to convert it BGR565 format. Whether is it possible to convert it to BGR565 format using VPE or dss_m2mwb link or any other link? Regards, Megha + +Responses: +Hi Megha, You can do this using DSS M2MWB. Regards, Rishabh + +Hi Rishabh, Thank you for the reply. Dss M2MWB supports all formats of Fvid2_dataformats. I checked that there is supported format named FVID2_DF_BGR16_565_A8. But I want only BGR16 565 (16 bit)and not A8 part. What should I do ? Regards, Megha + +Megha, FVID2_DF_BGR16_565 is supported for all TDA2/TDA3 devices. Please see \packages\ti\drv\vps\include\dss\vps_m2mDss.h. Regards, Rishabh + +Hi Rishabh, Thank you for the reply. It really helped a lot. Regards, Megha + +Hi Megha, Glad that your issue is resolved. Please mark relevant posts as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/780640.txt b/data2/text/range/0-5000/780640.txt new file mode 100644 index 0000000000000000000000000000000000000000..5484efb06c3eb7f57b8cb48bc2ca7cabedfe6288 --- /dev/null +++ b/data2/text/range/0-5000/780640.txt @@ -0,0 +1,34 @@ +Ticket Name: RTOS: Emulator and TDA2x has different result with TIDL(version 01.01.03). + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello, I have test my own model using TIDL(version 01.01.03). I recently found that the PC emulator and TDA2x generate different results. I have checked each layer dump , discovering a convolution layer gives different output. Furthermore, I checked the layer result which gives different output and found another strange phenomenon. My convolution layer has 96 input channels and 192 output channels with group = 8 and kernel size = 3. The output feature maps is different at 0th, 24th, 48th, 72th, 96th, 120th,144th, 178th. It seems that the first generated feature map in each group has different value. After that I extract the particular convolution layer to do the test which input is previous layer output.(ex: trace_dump7.y ). The result from PC emulator and TDA2x is different. I generate the TDA2x eve test and PC-emulator ,using below instruction respectively. "gmake TARGET_BUILD=release CORE=eve all" "gmake TARGET_BUILD=release TARGET_PLATFORM=PC CORE=eve all" All detail is in the appendix .rar file , including Convolution layer information , input data , PC_emulator result and TDA2x result. Thank you. TIDL_issue.rar + +Responses: +The PC emualtion is expected to give the same result as Target. Your build commands are right. BTW, Is the PC emualtion results matching with expected results (caffe)? Which is the first layer mismatching ? + +I just check the proto file. This has only one layer. We will look in to this get back on this . + +The rar does not contain, the caffe model file? Can you share the caffemodel also? + +The Caffe model contains only the layer which begins to generate different output.Layer_model.rar + +We have checked the output which given by PC emulator. Detection Boxes generated by PC emulator are similar to the result from Caffe. + +Hi KaiNan Hsieh, We could not re-produce this issue in latest code base. Looks line one the recent fix had solved this isse as well. We will locate the right fix and share the patch soon. + +Hi KaiNan Hsieh, We are not able to reproduce this issue in 01.01.03 release as well. Are you observing this issue when you the full network or with the attached single layer as well? + +We found this issue when we do the detection with full network , and we dumped each layer to check which layer gives the different output. Then we test the attached single layer see if it gives the same issue which we found in full network. So this issue was found in both cases. Thank you + +Hello , We have tried another case, discovering that it has different output with convolution layer on PC-simulator and TDA2x. In our test case we found the PC-simulator and TDA2x have same output when we didn't use dense convolution. Therefore , We regenerate the model by set some layer using dense convolution , and these makes the output different. Is any problem with dense convolution may cause this problem? Thank youconvolution-Issue.rar + +Hi, Last thread I have mentioned that dense convolution gives different output in some case. I have built a caffe model with only 3 convolution layer and test different setting of dense convolution.(The first model import with no dense convolution and another with all dense convolution). The results are in the attached file ,including files below: import.txt , infer.txt , caffemodel , deploy.prototxrt, input data, output data from TDA2 and PC-simulator. I used the command "gmake TARGET_BUILD=release TARGET_PLATFORM=PC CORE=eve all" to generate eve_release_out.exe and generate the PC-simulation result. Use "eve_release.out" which is existed in the testcv/out folder to generate the TDA2 result. Thank you, ti_conv_issue.rar + +Hi KaiNan Hsieh, Could you please provide the version of your TIDL? I can get incorrect result with your eve_test_dl_algo.out.exe, but get correct result with TIDL 1.1.3. Please provide your import tool binary to make sure I can reproduce it. So you mean that PC-simulation is not align with the inference on TDA2 target? Your prototxt has 3 conv layers, only the third layer can be configured as dense conv. All 3 layers are not aligned or only the third layer is incorrect? Thanks & Best Regards! ZM + +Hi, I can reproduce it now(first channel of each group of the third layer is not aligned with PC tool). and get back to you later. Thanks & Best Regards! ZM + +Thanks for your reply. The output of these 3 layers have the same result with TDA2 and PC-simulation at first and second layers.But third layer is not align with TDA2. Only the third layer is not aligned. Thank you + +Thanks, Problem is solved. + diff --git a/data2/text/range/0-5000/781535.txt b/data2/text/range/0-5000/781535.txt new file mode 100644 index 0000000000000000000000000000000000000000..c25e259ffe973a58fdca7545ccff79892e7173e2 --- /dev/null +++ b/data2/text/range/0-5000/781535.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2PXEVM: Creating folder and copying the files into the SD card using network Ctrl + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS hello, I need to create a folder in the SD card and copy the files into the folder. I am able to create the folder but not able to copy the files into it. And also if the folder is already present,it gives assertion fail. Assertion @ Line: 195 in /source/vision/platform/ti/tda2/apps/src/rtos/modules/network_ctrl/network_ctrl_handle_mmc_wr.c: 0 == status : failed !!! 1. how to create a folder into the sd card? 2. how to change the directory to copy the files into the folder created? Below is my code: status = File_getcwd(cwd, (Int32)1000); if(0 == status) { char godfolder[NETWORK_CTRL_CMD_STRLEN_MAX]={'G','O','D'}; // new folder :GOD strcat(cwd, "/GOD"); System_linkControl( linkId, SYSTEM_LINK_CMD_MAKE_DIR, godfolder, strlen(godfolder)+1, TRUE); status = File_chDir(cwd); } + +Responses: +Hi Vijeetkumar, Which version of VSDK are you using? I am supposing that the MAKE_DIR is a custom command you have added. If yes, can you please share your version of the network_ctrl_handle_mmc_wr.c(both pc side and evm side) file so that I can have a closer look at it :) Regards, Anand + +Hello Anand, I am using PROCESSOR_SDK_VISION_03_03_00_00. But anyways folder is getting created now. Thanks for the help. I want one more help on deleting the folder. I am using the below function: status = File_delete(dirPath); f_unlink(filename) is returning 7, which means access denied. FR_DENIED, /* (7) Access denied due to prohibited access or directory full */ Note: I am able to delete the file with the same api but not directory. + +Hi Vijeetkumar, This is strange. The same api should work for both file or directory delete. Can you put a breakpoint in f_unlink() and step through to find out why exactly does it go to FR_DENIED? It could be due to attempting to delete a read-only dir/file, or other reasons like that. Meanwhile, I'll try to replicate this on my side. Regards, Anand + +Hello Anand, I cant find definition for f_unlink() and also debugging is slightly difficult for me as I am not using jtag. I putting print statements for debugging. if its denying due to read-only how to make it write? were you able to replicate it? + +Hi Vijeetkumar, I have not yet been able to replicate the setup. Hmm. It is strange that you can't find the definition of f_unlink(). You should be able to find it in some of the fatfs library files. Then you can try putting printfs under each ifdef. I would recommend using a debugger though. Regards, Anand + +Hi Vijeetkumar, Were you able to find the function f_unlink()? I believe you were able to fix the issue/you don't see the issue anymore? Regards, Anand + diff --git a/data2/text/range/0-5000/781775.txt b/data2/text/range/0-5000/781775.txt new file mode 100644 index 0000000000000000000000000000000000000000..5fc678000ef1ed5fc6cbfc3ce88f35f41f853f31 --- /dev/null +++ b/data2/text/range/0-5000/781775.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2PXEVM: How to process the data what tda2 receive by yuv422_8B from ub964, but ub964 send data by raw12 + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI-RTOS my hardware is tda2p + ub964 + Camera module, the Camera module output yuv422_8B data, but it use the raw12 of ub913 and ub 964 to transmit. when i receive the data in tda2p by yuv422_8b, it it not correct. How i should process this thing. + +Responses: +Hi, You could probably work in 10bit mode for UB913 and UB964 and in Ub964 select the 8bit processing in RAW10_8BIT_CTL field. Please note that this field might not be supported in all UB964, so please check your ub964 data sheet. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/783067.txt b/data2/text/range/0-5000/783067.txt new file mode 100644 index 0000000000000000000000000000000000000000..f8ef9f2e320aab000900b775324c5832f35beacf --- /dev/null +++ b/data2/text/range/0-5000/783067.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2SX: Memory frequency how to adjust dynamically. + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: Linux hi ti The DDR memory model I used was w632gu6mb-12.I want to know how to set it to dynamically adjust the frequency according to the load. Can I use devfreq?What if I could change the device tree?I hope I get the answer. thaks. + +Responses: +Hi, It isn't recommended to update the DDR frequency dynamically. It is set as part of the bootloader and must not be modified. By default in the Linux kernel, Dynamic Voltage Frequency Scaling is enabled which modifies the frequency of the A15 depending on the system load. Regards Shravan + +hi Shravan If it has to be modified, is it possible to implement it in the kernel? What are the effects of the changes? + +thanks + +Hi, Linux runs out of DDR, so you can't modify the DDR frequency on the fly. The DDR configuration happens from U-boot (SPL), which runs from the on-chip memory. After this no configuration of DDR happens. Regards Shravan + +hi Shravan Is there a memory low power mode? thanks + +Hi, TDA2 family of SoCs don't support low power memory mode. Regards Shravan + +thanks + diff --git a/data2/text/range/0-5000/783693.txt b/data2/text/range/0-5000/783693.txt new file mode 100644 index 0000000000000000000000000000000000000000..84609cc4b7adc5dcd32c24b950f8a95703180b66 --- /dev/null +++ b/data2/text/range/0-5000/783693.txt @@ -0,0 +1,36 @@ +Ticket Name: RTOS/TDA2EVM5777: Uart data missing + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, I register Uart ISR in IPU1, to receive data from external device. it works well when data size not more than FIFO size, but will fail when data size more than FIFO size. the FIFO trigger level is set to 1, and we tried several baud rate (230.4k / 460.8k / 921.6k), the symptoms are the same. could you give me some help. Thanks~~~ + +Responses: +Hi, Can you set the FIFO trigger level to half the FIFO size and try? Also check with baudrate of 115.2K. Regards, Prasad + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, sorry to reply late. baud 115200 also not works. I found some symptoms. I register ISR in one task. when ISR can be processed, the data transmission seems already finished. so we always can receive less than FIFO size. does it mean ISR not be processed immediately ? and the INT priority is already set to 1. Thanks~~~ + +Hi Markii, Did you try setting the FIFO threshold as suggested above? Regards, Rishabh + +Hi, yes, we also check FIFO threshold to 8/16/32, but it seems no much difference. Thanks~ + +Hi Markii, I did not get from your previous reply what you mean by - "I register ISR in one task. when ISR can be processed, the data transmission seems already finished. so we always can receive less than FIFO size." Are you receiving the data from external device before the UART in SoC is configured? Regards, Prasad + +Hi, Uart config and ISR register in task's drvcreate function, before receiving the data from external device. if external device send more than 64 bytes to TDA2, I always can receive only the first 64 bytes data. that is why I think the data transmission had already finished when ISR was called. Thanks~~ + +Hi, Can you tell what version of software you are using? Also share the sequence of APIs you are using to configure UART? Regards, Prasad + +Hi, SDK version is 03_04 UART configure flow as below ***************************************************************************************************** HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_UART2_CLKCTRL,0x2); PlatformUnlockMMR(); PlatformUART2SetPinMux(); UARTConfigInit(SOC_UART2_BASE, 921600, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY, UART13x_OPER_MODE); UARTRegConfigModeEnable(SOC_UART2_BASE, UART_REG_CONFIG_MODE_B); HW_WR_REG32(SOC_UART2_BASE+UART_TLR, 0x0); UARTRegConfigModeEnable(SOC_UART2_BASE, UART_REG_OPERATIONAL_MODE); HW_WR_REG32(SOC_UART2_BASE+UART_FCR, 0x41); HW_WR_REG32(SOC_UART2_BASE+UART_LCR, 0x3); HW_WR_REG32(SOC_UART2_BASE+UART_SCR, 0x81); BspOsal_irqXbarConnect(CSL_XBAR_INST_IPU1_IRQ_60, CSL_XBAR_UART2_IRQ); BspOsal_registerIntr(CSL_XBAR_INST_IPU1_IRQ_60, (BspOsal_IntrFuncPtr)UARTIsr, NULL); Hwi_enableInterrupt(CSL_XBAR_INST_IPU1_IRQ_60); UARTIntEnable(SOC_UART2_BASE, UART_INT_RHR_CTI); ***************************************************************************************************** Thanks~~ + +Hi, Can you try to use the UART driver and check if you can receive the data? Driver handles the interrupts and fifo etc properly and its tested in multiple use cases. The uart driver is present in "\packages\ti\drv\bsp_lld\uart". You can refer the example provided. Regards, Prasad + +Hi, I am trying to understand this UART driver and use it. I have 2 questions. 1. Does this UART driver can be used in TI RTOS? 2. What's wrong of my flow and configuration? why it can not work? Thanks~~~ + +Hi Markii, This driver can be used in RTOS. The issue here is that you are trying to use CSL based UART code in Vision SDK context. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, I found the problem of my configuration. It can work now. Thanks~~ + +Hi Markii, Glad that your issue is resolved. Can you please post the solution for future references. Regards, Rishabh + diff --git a/data2/text/range/0-5000/783892.txt b/data2/text/range/0-5000/783892.txt new file mode 100644 index 0000000000000000000000000000000000000000..0692cc0e32ec56a5c8929191e8b83384105c8100 --- /dev/null +++ b/data2/text/range/0-5000/783892.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ACD: Several questions for using TDA2 with radar + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2, AWR1243, TDA2PXEVM Hello team, My customer has the plans to use TDA2 to use it with AWR1243 and perform first order FFT and second order FFT using TDA2 devices and to perform it on the 2.5MB L3 RAM On-chip (without DDR2/3). 1. could you please advise if our device can use the C66x DSP without external DDR2? 2. there is a need to have at least 2.5GB throughput of output data from the device, what is the best I/F for doing that (I think the PCIe II could do the trick)? 3. what is the PN chipset that comes with TDA2PXEVM (the customer is looking for TDA2PHF-ACD chipset EVM)? 4. Could you please advise if the upcoming TDA4 comes with higher memory (on-chip) in the L3 RAM than the TDA2 (2.5MB)? Thanks in advance Shai + +Responses: +Hi Shai, There are couple of things to look at: What is the Radar cube you are looking at? We could have C66x code running from OCMC RAM along with rest of the radar cube, but a memory partition needs to be done on what is the code/data section requirements for C66x and then plan for a DDR less system. Are there other cores you are looking at for running code out of OCMC? PCIe would do the trick if the requirement is 2.5 Gbits per second. For the PCIe if you would like to have enumeration features, the linux PCIe drivers are more mature than bare metal PDK drivers. With Linux in the picture, it would be a challenge to fit everything in a DDR less system. The EVM comes with a pre-production part DRA77xP/DRA76xP/TDA2Px (Superset SoC) . For TDA4x specific questions please contact your TI representative. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/784546.txt b/data2/text/range/0-5000/784546.txt new file mode 100644 index 0000000000000000000000000000000000000000..087b4fea2572160e4146955c48b70bfe44aff3e9 --- /dev/null +++ b/data2/text/range/0-5000/784546.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2E: Software design for connecting SOC to MMC1 to SD card + +Query Text: +Part Number: TDA2E Tool/software: Linux When the SD card is taken out, the SOC does not need to read and write the SD card, so we want to configure the MMC1 port to be a zero-level output. But the information we learned is that the software can't configure pinmux as gpio, can't set gpio function, we want to confirm whether the information is correct? . How can we set the MMC1 port output zero level when the card is pulled? Our current hardware design: SD card VCC power supply is controlled by a controllable 3.3v, SOC MMC1 I / O power supply is supplied by SOC VDDSHV8, and SOC MMC1 port is used as SDBOOT function. + +Responses: +Hi, Which pin cannot be configured as GPIO? If the pinmux has an option for GPIO, the padconf be configured to use as GPIO. Regards, Vishal + +Hi Vishal, It is not always configured as GPIO or SD/SDIO, but also needs to be switched as the TF card is inserted or removed. When the SD card is unplugged, we want to configure these pins first to exit the SD/SDIO signal mode， and then configure them to be low level output： W6, Y6, AA6, Y4, AA5, Y3 However, the SOC needs to detect the status signal that the SD card is reinserted, so this pin may still have the function of retaining the SD_CD signal : W7 We want to know if the software can implement the above functional description? + +Hi Feng Xiaoyu, The omap_hsmmc driver in Linux Kernel does pinctrl operations based on speed modes (for IODELAY reasons). You can do something similar based on when card is inserted or removed. Regards, Vishal + +Hi Feng Xiaoyu, Do you have any more questions on this? This support is not available currently in omap_hsmmc driver, you have to add the pinctrl operations needed for your design. Regards, Vishal + diff --git a/data2/text/range/0-5000/784912.txt b/data2/text/range/0-5000/784912.txt new file mode 100644 index 0000000000000000000000000000000000000000..b25a4b4580cba30dabed95cf2a3e11d759ce88f4 --- /dev/null +++ b/data2/text/range/0-5000/784912.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS / TDA2EG-17： AVM Solution on TDA serial + +Query Text: +Part Number: TDA2EG-17 Tool/software: TI-RTOS Hi TI expert I have some questions. Q1. Could i TDA2EG-17 receive 4ch 1280P or 1080P @ 30 Yuv422 (8bit) on VIP ? if can't , How about TDA2-EG or TDA2P ? Q2.Could i use D0~D7 output 1080P @30fps Yuv422 BT.601/BT.656 on the TDA2EG-17 LCD3 Port ? I implemented D0~D7 output 720P @ 30fps Yuv422 BT.601 on the TDA2EG-17 LCD 3 port. Q3.From above questions,should I use 913 and 914 to transfer data or 933 and 934 to transfer? + +Responses: +1. A single VIP port can capture 8-bit 1080p @ 30 FPS or 720p @ 30FPS. Kindly refer to the device/part manual to see if all the 4 VIP pins can be used. Also as long as the input to the VIP is less than 165 MHz, then it can capture 1920x1280p as well. 2. 1080p30 8-bit is not validated in DSS driver 3. Kindly refer to serializer manual to check if it supports the required pixel clock + diff --git a/data2/text/range/0-5000/785313.txt b/data2/text/range/0-5000/785313.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e85b8f4821fbd3af1ae33ee1e42787fbea918e2 --- /dev/null +++ b/data2/text/range/0-5000/785313.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EXEVM: File Structure and Explain the Hierarchy of Code Compilation and Execution + +Query Text: +Part Number: TDA2EXEVM Hi, I am having problem in finding the proper document to understand the whole structure of this board. How it works, rather than just using the userguides to specifically execute the specific. I would like to learn how the code process works, including the main function which executes the module and creating an independent development environment by importing the library along with their documentation. Just consider that most of the developers who are willing to use this board have no background knowledge about this or Embedded systems, I believe. Thank you. + +Responses: +Hi Owais, you can look at this training for introduction of TDAx boards and VisionSDK: training.ti.com/tda2-and-tda3-processors-training-series Regards, Yordan + diff --git a/data2/text/range/0-5000/785456.txt b/data2/text/range/0-5000/785456.txt new file mode 100644 index 0000000000000000000000000000000000000000..3e4ee56561da0f1c664b6309b0e28c90294451ec --- /dev/null +++ b/data2/text/range/0-5000/785456.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: The rstoutn function of TDAx + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux The following is a section of the TDA2 manual. Why does the manual recommend using an AND gate instead of an OR gate? We measure the waveform as shown below: The rstoutn signal we designed is used to reset to other devices connected to the SOC without any gates.When the SOC is powered up, RSTOUTn (green) is reset after PORz (yellow) and there is a glitch during PORz reset. So I think if we choose an OR gate, we can keep other SOC devices with a longer reset time. + +Responses: +Hi, user3378603, IF I understand you correctly - the signals RSTOUTn and PORn are active-low signals. That's why they must be ANDed, not ORed. Regards, Mariya + +As Mariya said, Reset signals are active-low. That's why we have an 'inverted logic', and we need an AND gate for an active reset output until both resets release. 1 AND 1 = 1 Regards, Stan + diff --git a/data2/text/range/0-5000/785906.txt b/data2/text/range/0-5000/785906.txt new file mode 100644 index 0000000000000000000000000000000000000000..f2bc0019dcca9c6c198aad64d7527844d398d6d2 --- /dev/null +++ b/data2/text/range/0-5000/785906.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: How to optimize the build time? Want to reduce the Gmake building time + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I am following the guidelines given in the userguide for tda2, gmake takes too much time to build for building new package or editing code. Almost 3,4 hours at least. How can make it, since I want to edit code more often. Moreover, if there is any package specific building, like in ROS, just to put package name next to catkin_make in order build that specific package. I believe that would be more quicker than building whole thing. Is there specific guide that explains the whole makefile thing? Thank you. With best regards, H.M. Owais + +Responses: +Hi, You should refer to chapter 3 Fast Builds from PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/787352.txt b/data2/text/range/0-5000/787352.txt new file mode 100644 index 0000000000000000000000000000000000000000..ab75a95f893781ec46c47dfe02e5b1ea00dd8a96 --- /dev/null +++ b/data2/text/range/0-5000/787352.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2SG: TDA internal pull-up/pull-down resistor + +Query Text: +Part Number: TDA2SG Tool/software: Linux Hi, We are analyzing the state of the processor's pins after reset. In which cases do I need to use an external pull-up or pull-down resistor on the GPIO input signal? What is the specific resistance value inside the GPIO pin of the processor? What are the typical and maximum current requirements for GPIO? Thanks. Best Regards, + +Responses: +Hi Feng, 1. You can find buffer types, pullup capability, and default mux mode of each pin in the Datasheet, Table 4.1 Ball Characteristics. 2. It is completely dependent on your use-case. Depends on the buffer type of the external device (push-pull, open-drain) and if this device always drives 0 or 1 (e.g. will it sleep sometimes and go tri-state, or, disconnects via a PCB connector). Depends if it drives relatively static signals: 0 to few kHz, or faster. In other words: - if you expect that external driver is always online and it is a push-pull, you can disable the internal pullup to save some power. - If external device goes tri-state or disconnect - enable an internal pullup - in most cases should be enough - If your external device is some interface (for ex,. I2C, SPI) you need pullups depending on the interface needs 3. Please check the datasheet for the internal resistance. Very roughly it is somewhere 40-70 kohms. 4. Sorry, I don't understand you question for current requirements Regards, Stan + +Hi Stan, Thank you very much for your reply, I am already clear. Two other questions: Q1: What is the difference between IOL and IIN? Does IIN refer to the injection current of PIN in tri-state? Q2: If the GPIO output is low, why is the driving capability of the 1.8V mode larger than 3.3V, is this normal? Regards, + +Q1: Note that IOL=2mA (Output current during drive Low) is only a condition to parameter VOL. Yes, IIN should be the max leakаge current with pullups/downs disabled. Q2: Driver strength is defined as nominal value of 40-Ohm in all conditions. This, however, this will result in different values for the current in 3.3V and 1.8V modes. ~8mA and 4.5mA respectively. Note that min and max driver strength wasn't defined and may vary. Best regards, Stan + +Hi Stan, We have found that two of the SOC chips in our products are overheated. The phenomenon is that the current value of one of the SOC chips fluctuates, sometimes large and sometimes small. The other SOC current value is always large. But the cores of both SOCs can run normally. One of the reasons may be that the external pull-up resistor on the given signal is not connected to the power rail that supplies the VDDSHVn domain to which the GPIO pad belongs，cause the pad to be damaged. Can we read the relevant fault point through the SOC register? How do we diagnose the point of failure? Best regards + +Hi, One possible programming method could be: 1. Switch a pin to GPIO function (it is very rare a pin to be GPIO func. by default) in the Control Module padconfig register 2. In the same Control Module register, make sure that input buffer is enabled 3. From the relevant GPIO module, switch the relevant GPIO I/O to output (OE) 4. Set the GPIO I/O to drive 1 (in the output register) , read the GPIO input to see if it is 1 5. Set the GPIO I/O to drive 0 (in the output register), read the GPIO input to see if it is 0 6. IF 4. or 5. fails, THEN this pin is damaged OR it is driven by an external device 7. GOTO 1. for the NEXT pin I think you understand the idea. Note that every pin needs evaluation - is it driven by external device on PCB, or not? If yes, then the pin could be just fine, but you will possibly see the external driven value. !Avoid using it on externally driven pins (especially for long time) because they can get damaged! No issues with external pullups/downs, however. Regards, Stan P.S. You can try also searching for a short (or partial short/low resistance) with a multimeter where possible and where you suspect a failure. + diff --git a/data2/text/range/0-5000/788122.txt b/data2/text/range/0-5000/788122.txt new file mode 100644 index 0000000000000000000000000000000000000000..abf4c1c38a79d940037e3507079f85505ccb99e9 --- /dev/null +++ b/data2/text/range/0-5000/788122.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2SG: About the electromagnetic compatibility of TDA2 + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello ， I have two questions: Q1: In addition to the EMI content mentioned in the data sheet, I would like to know if TI can provide some summary or recommendation for solving EMI problems. For example, the software code of the spread spectrum DDR3 , etc. Q2: Where can I find out the EMC test report for TDA2? Especially the part of the RE test. + +Responses: +Hello Feng, Spread spectrum is supported on the VOUT interfaces only. The suggested usage is documented in this app note: http://www.ti.com/lit/an/spraby0a/spraby0a.pdf Thanks, Kyle + diff --git a/data2/text/range/0-5000/789154.txt b/data2/text/range/0-5000/789154.txt new file mode 100644 index 0000000000000000000000000000000000000000..a40253271e724bffa0d2e2385e5771a84f6f8037 --- /dev/null +++ b/data2/text/range/0-5000/789154.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: What other RTOS can be used in TDA2x cores? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI-RTOS Hello everyone, I have a doubt about the types of RTOS that can be used in TDA2x cores, I refer to the ARMs, I know that the default OS is TI-RTOS that provide TI, but I don´t very sure if this OS is safety and recommended for automotive applications. Someone know if is possible to port some OS with certification in automotive?, because I see in TDAx ADAS SoCs - Support & training (http://www.ti.com/processors/automotive-processors/tdax-adas-socs/support.html ) a part who mention Elektrobit, is possible to have a OS safety EB in some of the cores of this DSP. I already know that this number part have multiple cores, and I'am asking for a port of some safety OS for one of them. I mean, in some of the Dual ARM M4 or ARM A15. Regards, + +Responses: +Hi, What is the end equipment you are looking at and what is the safety level for the same? You may want to explore the possibility of using QNX or GHS OS running on A15 for your safety story. Thanks and Regards, Piyali + +Mainly I want an OSEK compatible OS, like EB tresos AutoCore OS, I want to know if TI has a port of some operatng system like this. + +Hi Moises, Third party such as EB, Vector, KPIT do support TDA2xx/TDA3xx family of devices in their AUTOSAR offering. Regards, Sujith + +Thank you, this solve my question. Regards, + diff --git a/data2/text/range/0-5000/789828.txt b/data2/text/range/0-5000/789828.txt new file mode 100644 index 0000000000000000000000000000000000000000..ca418d18653b832de1e84b19b957fe063edc9e3e --- /dev/null +++ b/data2/text/range/0-5000/789828.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TIDL conversion + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi everyone, I have one model which I want to convert to be able to use it on TDA2. Model is trained in Caffe framework. Model is trained for pedestrian detection and output is represented by 100 bounding boxes where every bounding box is described by 7 attributes: 1. BBox index 2. label ID 3. confidence 4. x1/width 5. y1/height 6. x2/width 7. y2.height I did conversion with tidl_model_import.out application, model is tested with eve_test_dl_algo.out.exe application and as a result stats_tool_out.bin file is generated. What I noticed is that not all information about bounding boxes are populated. Instead of 100 bbox information, I got a lot less. For other bounding boxes, all attributes are populated with zeros instead of BBox index which have value -1. Can this be sign of not good conversion process? Output file is in attachment. stats_tool_out.7z Thanks in advance, Sasa + +Responses: +TIDL outputs list of object which are having probability (Score) higher than the requested in the deploy.prototxt. -1 in the list indicates the end of the valid object list. + diff --git a/data2/text/range/0-5000/790555.txt b/data2/text/range/0-5000/790555.txt new file mode 100644 index 0000000000000000000000000000000000000000..a6d1e5ba8a8b457ea0a8ebf223de1fbd8205fc43 --- /dev/null +++ b/data2/text/range/0-5000/790555.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2xx: SD-Card booting: Jumping to MPU CPU0 Application (BIOS) + +Query Text: +Hello, I had created two Algplugin and integrated them in my Usecase . I tried to boot from an SD card. The TDA2xx only works until "Jumping to MPU CPU0 Application..." appears in the Terminal. + +Responses: +Hi Jagadish, can you check those threads with the same issue and see if they can give you any directions: e2e.ti.com/.../576746 e2e.ti.com/.../774364 Regards, Yordan + +Hi Yordan , I had already gone through the threads and tried them, But it was not helpful. Can you give me another solution ? + +Hi, Can you put a break point inside the init function of your alg_plugin and check what is going wrong? I hope the alg_id you have created , its value is less than the max alg_id for that core. Regards, Anuj + +Hi Anuj, Thanks for ur reply , its working. The alg_id i have created is greater than the max value, i rectified it and its working... + diff --git a/data2/text/range/0-5000/792106.txt b/data2/text/range/0-5000/792106.txt new file mode 100644 index 0000000000000000000000000000000000000000..71dcd0e853d10a2705cf5302f48b0c76e83972c3 --- /dev/null +++ b/data2/text/range/0-5000/792106.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2-17: AVB surround view, Ethernet switch band width issue. + +Query Text: +Part Number: TDA2-17 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi Sir, I am running AVB surround view case. There are 4 AVB cameras through a 100/1000 base Ethernet switch to connect to TDA2 EVM. My AVB camera uses 100 Mbps phy to transmit the data. Because of this Ethernet switch limit, when connecting camera with 100 Mbps data rate, All switch port becomes 100Mbps band width. It means if amount data rate of 4 cameras is over than 100 Mbps, Ethernet switch can't handle it. May you suggest which "Ethernet switch" can handle 100 Mbps camera input and output 1000Mbps at the same time? May provide the product brand and part number. Thank you. Ranny. + +Responses: +Hi Ranny, On the TDA side, we support upto 1Gbps datarate. There shouldn't be any issues on that. Regarding the Ethernet switch problem you've mentioned, it seems rather strange, as I have never came across this rate limiting on the ports. I'm afraid we can't provide product brand or related information. I would suggest to use the TI Ethernet Surround View Board for your usecase, which wouldn't require you to use off the shelf ethernet switches. Regards, Anand + +Ok, I got. Thank you very much. Ranny. + +Hi Sir, May you provide website or web link of " TI Ethernet Surround View Board" to me? Thanks. Ranny. + +Hi Ranny, Will you be interested in the purchase of the board or do you just want to review the specifications of the board? Regards, Anand + +Hi Anand, I just want to review the specifications of the board, we will put the Ethernet switch circuit and TDA2 platform together on our own design PCB. Thanks. Ranny. + diff --git a/data2/text/range/0-5000/792498.txt b/data2/text/range/0-5000/792498.txt new file mode 100644 index 0000000000000000000000000000000000000000..f1d6e9ca291d6f5315f48c1e394a4a7973f4db07 --- /dev/null +++ b/data2/text/range/0-5000/792498.txt @@ -0,0 +1,28 @@ +Ticket Name: RTOS/TDA2SX: TDA2 A15 generic timer + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, I try to use generic timer as MPU system tick source, but I found that only IPU 1_0 boots normally. What should I do to use generic timer? Thanks&Regards. + +Responses: +Hi, can you check chapter "7.1.2 BIOS Tick and Time Stamp Provider Concerns" in vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf and see if it can give you some directions? Regards, Yordan + +Hi Yang, Can you explain what you mean by "only IPU 1_0 boots normally". Also MPU timer is used by TDA2 SBL. You can refer to the same. Regards, Rishabh + +Hi, On the UART console, I can only find logs output by IPU 1_0. + +Hi Yang, Can you share the UART log? Regards, Rishabh + +Hi, I have found the reason. When A15 idle and execute PMLIBCpuIdle function, A15 sleeps and its clock is gated. This results in generic timer stopping work, so A15 can not be waked up by system tick. + +I have another question. In function PmlibDoWFI, ACTLR.SMP is set to 0. But I can't find this bit is enabled again after wake-up. When SMP bit is set again? + +Hi Yang, Yes.. the timer inside the A15 would stop if clock gated. You should used the SoC level GP Timers for the OS Tick instead to allow the A15 to wake up from low power. Thanks and Regards, Piyali + +Yang, The SMP bit should be set again in the ISR context which after it wakes up. Are you using the dual A15 subsystem in SMP mode? If no, then you would not need to set this back to 1. However, if you are setting the A15 to work in SMP mode you would need to set the ACTLR.SMP in the ISR routine which is run after the A15 wakes up from low power. Thanks and Regards, Piyali + +Hi, Piyali Yes, I am using MPU in SMP mode. OK. So user should be responsible for setting SMP bit again. I think this is not convenient, because every ISR should do this in theory. Is it necessary that disable SMP before sleep? Is the reason for clearing SMP bit that A15 power is placed in retention state after sleep? + +Hi Yang, The clearing of ACTLR.SMP bit is required before going to retention or placing the Cortex A15 in power off mode (power down modes). You need not to place the setting of SMP in all user ISR routines. This is only required in the function which is called when IRQ or FIQ is triggered. (2 interrupts). The other user-defined ISRs are called only after this from these two functions. You can skip this if you are only getting the A15s to clock gated (power on) state. Thanks and Regards, Piyali + +Hi Piyali, OK. Thank you! By the way, I think TI should update SDK or at least make a statement about this. + diff --git a/data2/text/range/0-5000/792934.txt b/data2/text/range/0-5000/792934.txt new file mode 100644 index 0000000000000000000000000000000000000000..4bb87b1bb49dbe6f4e5d81b776d717accfefe3eb --- /dev/null +++ b/data2/text/range/0-5000/792934.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2SX: Need support for TDA2XX EVM boot from NAND + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi All, We are using VISION_SDK_03_04 source(TDA2xx). Nand support is not enabled in default u-boot source. We enabled Nand support in below paths. We added #define CONFIG_NAND 1 in include/configs/dra7xx_evm.h and modify #define CONFIG_CMD_NAND to #define CONFIG_CMD_NAND 1 in include/configs/ti_armv7_omap.h . After compiled and flash new images to EVM. We got mtdparts in u-boot. But in u-boot it shows below logs.log_NAND.txt NAND: 0 MiB And kernel log it shows "[ 1.788753] nand: No NAND device found" and "[ 2.010108] evm_3v3_sw: supplied by sysen1"No NAND device found". Please help us to solve this issue. For your reference,please find the attachment. Thanks & Regards, Sankar. + +Responses: +Hi Sankar, this topic is discussed here: e2e.ti.com/.../788250 I will close this thread. Regards, Yordan + +Hi Yordan, Thanks for quick reply. In u-boot we given mtdparts command,we got below logs. mtdparts variable not set,see 'help mtdparts' Device nand0 not found. In which files we need to modify for enable nand0. Thanks & Regards, Sankar. + +Hi Sankar, As mentioned in other thread TDA2 EVM does not have NAND flash. Regards, Rishabh + +Sorry, corrected a typo in my previous reply. Regards, Rishabh + +Hi Rishabh, You mean to say S/W support? Regards, Sankar. + +Hi Sankar, I mean the HW support. You can check the board schematics for the same. Regards, Rishabh + +0160.sprr212.pdf3107.CPU_Schematic.pdfHi Rishabh, Please find the attached schematic and layout. In schematic U6 NAND IC present in out EVM. Could you please confirm,whether we are referring correct schemtic and Source code? Regards, Sankar. + +Hi Sankar, You have a duplicate thread here: e2e.ti.com/support/processors/f/791/p/788250/2932772#2932772 Please post your queries there, I am closing this thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/792980.txt b/data2/text/range/0-5000/792980.txt new file mode 100644 index 0000000000000000000000000000000000000000..51aa0b7cf63440dc7c74ae82d7d368f45dc6bbdd --- /dev/null +++ b/data2/text/range/0-5000/792980.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: Master core + +Query Text: +Part Number: TDA2EVM5777 Hello, The Vision SDK documentation talks about master cores. If BIOS is used on the A15 core, the IPU1_0 core is treated as the master core. If Linux is used on the A15 core, then the A15 core itself is treated as the master core. What exactly does the concept of "master core" mean? Thank you. + +Responses: +Hi, The usecase and filesystem and some other key things will be controlled by the master core. Regards, Anuj + +Hello, Where can I find more information about this concept? Thank you. + +Hi, there is no specific doc for the master core. But you can check below docs vision_sdk\docs\Architecture Regards, Anuj + diff --git a/data2/text/range/0-5000/793055.txt b/data2/text/range/0-5000/793055.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a82ee6f90d132d182c77792d7adccf20f48294f --- /dev/null +++ b/data2/text/range/0-5000/793055.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2EVM5777: How to detect SD card insert/remove event in VisionSDK + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Dear Expert, I'm helping to provide a method to detect SD card(MMC1) insert/remove in VisionSDK bios_all. I'm using original VisionSDK 03.06 with TDA2XEVM5777. Here is my test: Build the original VisionSDK 3.6 bios_all, and boot to menu, dump the MMC register, then unplug sdcard, dump the MMC register. Nothing changed between before and after. Since the register is no change, I tried to call HSMMCSDIsCardInserted API, and get incorrect result. Could you please help provide some guideline to detect a SD card event on bios_all. Thanks & Best Regards! ZM + +Responses: +Hi Ming, I am not sure if we have tested the functionality for card insert/remove in RTOS. Let me check with MMC Linux experts and get back to you. Regards, Rishabh + +Hi Ming, I checked and confirmed that there is no internal card detect. Linux drivers have muxed the card detect pin as a GPIO and software uses that to detect whether a card is inserted or not. You can implement something similar in the RTOS software. Hope this helps. Regards, Rishabh + +Hi Rishabh: At PDK package just can raw read MMC2 interface eMMC card. Try to modified those project support MMC1 interface but failed at my side. We did not find MMC1 card insert detect and fat system mount example at BIOS system. Customer want to use TDA2x pin W7 (MMC1_SDCD) probe the card exist or not. Best Regards! Han Tao PDK example folder \PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\csl\example\mmcsd + +Hi Tao, MMC1 is used at multiple places in PDK for TDA2x. You can use any of these for referring to MMC1 code. 1. TDA2 SBL uses MMC1 for SD boot. 2. stw_lld has one example for MMC1 present here: PROCESSOR_SDK_VISION_03_06_00_00\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\stw_lld\examples\mmcsd\sd_file_io\main.c Fatlib code is present here: PROCESSOR_SDK_VISION_03_06_00_00\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\stw_lld\fatlib Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh: You can close this item now. If customer have updated information, I will create new request for it. Best Regards! Han Tao + +Hi Tao, Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/0-5000/793373.txt b/data2/text/range/0-5000/793373.txt new file mode 100644 index 0000000000000000000000000000000000000000..d95ba2d2b1aafce18e17c22b185b37881c4e37de --- /dev/null +++ b/data2/text/range/0-5000/793373.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux: gst-launch-1.0 filesrc location=testvideo.mpg ! tsdemux ! video/x-h264 ! h264parse ! avdec_h264 ! autovideosink sync=false + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello, I want to play *.mpg video file on TDA2, I'm using gstreamer now, I don't know how to write pipeline, Can you ask next, thank! Below is the pipeline I tried to play, but it doesn't work properly. ********************************************************************************************************************************** root@dra7xx-evm:/opt/vision_sdk# gst-launch-1.0 filesrc location=testvideo.mpg ! tsdemux ! video/x-h264 ! h264parse ! avdec_h264 ! autovideosink sync=false Setting pipeline to PAUSED ... Pipeline is PREROLLING ... ERROR: from element /GstPipeline:pipeline0/GstTSDemux:tsdemux0: Internal data stream error. Additional debug info: ../../../git/gst/mpegtsdemux/mpegtsbase.c(1347): mpegts_base_loop (): /GstPipeline:pipeline0/GstTSDemux:tsdemux0: stream stopped, reason error ERROR: pipeline doesn't want to preroll. Setting pipeline to NULL ... Freeing pipeline ... root@dra7xx-evm:/opt/vision_sdk# root@dra7xx-evm:/opt/vision_sdk# + +Responses: +Hi What is the vision-sdk version used? VISION_SDK v3.06 has support for video playback and display on waylandsink . What you are trying is an explicit pipeline and you need to know the format of the stream(h264, mpeg4 mpeg2, vc1 etc). Using playbin to playback will choose the correct parser and decoder. You can try gst-launch-1.0 playbin uri=file:///home/root/testvideo.mp4 video-sink=waylandsink or gst-play-1.0 --videosink waylandsink testvideo.mp4 will work. This will choose hardware based decoder instead of software decoders(avdec). Thanks Ramprasad + diff --git a/data2/text/range/0-5000/794522.txt b/data2/text/range/0-5000/794522.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ff45b610d8fc2818430caade48b3c4db01eb93a --- /dev/null +++ b/data2/text/range/0-5000/794522.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS: How can i import TensorFlow MobileNet V1 model to TIDL model? + +Query Text: +Tool/software: TI-RTOS Hi, I'm trying to convert TensorFlow-slim based MobileNet model(ver1) following TIDLDeepLearningLibrary.pdf section 3.6.5. I downloaded mobilenet_v1_1.0_224.ckpt.data-00000-of-00001, mobilenet_v1_1.0_224.ckpt.index, mobilenet_v1_1.0_224.ckpt.meta, mobilenet_v1_1.0_224.pb. And i ran the command to optimize mobilenet_v1_1.0_224.pb. However, these warning messages were shown. -------------------------------------------------------------------- WARNING:tensorflow:From /usr/local/lib/python3.4/dist-packages/tensorflow/python/tools/strip_unused_lib.py:86: extract_sub_graph (from tensorflow.python.framework.graph_util_impl) is deprecated and will be removed in a future version. Instructions for updating: Use tf.compat.v1.graph_util.extract_sub_graph WARNING:tensorflow:From /usr/local/lib/python3.4/dist-packages/tensorflow/python/tools/optimize_for_inference_lib.py:113: remove_training_nodes (from tensorflow.python.framework.graph_util_impl) is deprecated and will be removed in a future version. Instructions for updating: Use tf.compat.v1.graph_util.remove_training_nodes WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_1_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_2_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_3_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_4_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_5_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_6_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_7_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_8_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_9_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_10_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_11_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_12_depthwise/BatchNorm/FusedBatchNorm' WARNING:tensorflow:Didn't find expected Conv2D input to 'MobilenetV1/MobilenetV1/Conv2d_13_depthwise/BatchNorm/FusedBatchNorm' -------------------------------------------------------------------- Anyway, i ignored that messages and used result pb file to convert to TIDL model. After i executed tidl_model_import.out.exe D:\TI_TDA2x\ti_dl\test\testvecs\config\import\tidl_import_mobileNet1.txt, this error message was shown. -------------------------------------------------------------------- TF Model File : ..\..\test\testvecs\config\tensorflow_models\mobilenet\mobilenet_1_224.pb Could not find the requested input Data : MobilenetV1/MobilenetV1/Conv2d_0/Relu6 !! -------------------------------------------------------------------- Doesn't TIDL importing tool support Relu6 layer? If then, could you let me know how could you validated TF MobileNet V1 model? Thanks in advance. Yoo. + +Responses: +Please use TF version 1.1 for the freezing graph. We are yet to upgrade to the latest version of TF. + +Thank you. It works normally after i reinstalled tensorflow 1.1.0 version. Regards Yoo. + diff --git a/data2/text/range/0-5000/794885.txt b/data2/text/range/0-5000/794885.txt new file mode 100644 index 0000000000000000000000000000000000000000..b482bf924b178dc0645052a5523b990db0e5d184 --- /dev/null +++ b/data2/text/range/0-5000/794885.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: TIDL SSD model setup + +Query Text: +Part Number: TDA2SX Hi everyone, I have SSD object detection model which I want to run on SoC. During conversion eve_test_dl_algo.exe is run and I get correct results in stats_out_tool.bin file. I am running full net with eve_test_dl_algo.exe application. However, by instructions, I should run it partially on EVE and partially on DSP core. Since I don't have DSP test app, a made usecase similar to TIDL OD one where I am running 1 EVE core and 1 DSP core with TIDL algorithm link with this model. But, I am getting empty list of bounding boxes as a result. Also, I tried this model with TIDL usecase and results are the same as for the previous usecase. Does anyone know why I am getting correct results only during the conversion but only when it is not run by isntructions and on SoC not at all? Regards, Sasa + +Responses: +Did you get the model working with the original TIDL OD use case without any modification to the usecase? Most cases the difference result are observed if the input used for import and use cases are not the same. Check the input tensor passed to use case and make sure, it matches with the first tensor of import (trace_0*.y) + +Input to import and usecases are same and identical to trace_dump_0*.y . I didn't check the model with original TIDL OD usecase yet because originali it takes video input instead of singe image so modifications are necessarry. Can I somehow get output from all layers on SoC like during the import process having trace_dump_* file for all layers? + +No, generation trace on the SoC is not supported by the library. + diff --git a/data2/text/range/0-5000/795053.txt b/data2/text/range/0-5000/795053.txt new file mode 100644 index 0000000000000000000000000000000000000000..299d6b6076ad169b2f864bcc6b89f5a4b0b6624e --- /dev/null +++ b/data2/text/range/0-5000/795053.txt @@ -0,0 +1,22 @@ +Ticket Name: CCS/TDA2SG: About DDR stress test + +Query Text: +Part Number: TDA2SG Tool/software: Code Composer Studio Hi， Can you tell me what is the difference between using the CCS tool and the memtester tool for DDR stress testing? Which test method does TI recommend? why? best regards. + +Responses: +Hi Feng, What is the CCS tool that you are referring here? Regards, Rishabh + +Hi Rishabh， We use this tool: Code Composer Studio v8 . Refer to this document ：Avatar_EMIF_Tools_UserGuide.pdf + +Hi Feng, CCS is an IDE used for loading/testing the binaries. You can also create/build projects using CCS. Similarly Memtester is the program that can be run using CCS. Hope this helps. Regards, Rishabh + +Hi Rishabh， Comparing the DDR stress test results of the two tools, I want to know which test method is more comprehensive, or equivalent？ Regards, + +Hi Feng, As I explained previously memtester is the utility to test the DDR stability. Hence you should use the same. In order to run mem tester you need CCS tool. Hence you need both the tools. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh， Is my statement clear enough? You mean that the test results using Avatar EMIF Tools(CCS Memory Test Tool) and Memtester (Linux Memory Test Tool) are the same. But it seems that Memteser has higher requirements on the space of the measured memory. Regards, + +Hi Feng, Yes, both might have separate requirements due to difference in OS but the results are the same. Regards, Rishabh + diff --git a/data2/text/range/0-5000/795773.txt b/data2/text/range/0-5000/795773.txt new file mode 100644 index 0000000000000000000000000000000000000000..c3a97e450965143cb395411470c072c21d57547e --- /dev/null +++ b/data2/text/range/0-5000/795773.txt @@ -0,0 +1,24 @@ +Ticket Name: tda2x + +Query Text: +hi: i have sensor ar0132 that data type is raw. we need put raw-data output to algorithm mode. i have question: 1.Whether raw-data pass through the vip module not direct output to algorithm mode? 2.if it pass through the vip,then it can pass through which vip sub-modules? eg.repacker,parser,csc1 and son. + +Responses: +Hi, I could not understand your question completely, RAW data can be captured via VIP. In this case, internal modules like CSC, Scalar will be bypassed.. and the captured data will directly go the memory, then you could pass it to algorithm for further processing. Rgds, Brijesh + +ok,u means captured data not directly go the vpdma but go memory,didn't u? + +vpdma capture data to memory. vip outputs to vpdma and vpdma writes to memory.. + +hi brijesh : i read page 2267 of TRM .VPDMA Data Formats just support rgb and yuv types. i don't see raw data + +raw is implemented in driver using YUV422 data type. VIP ip does not support raw as a format. Rgds, Brijesh + +ok.but i don't have isp? 1.is the output to vpdma also yuv422? 2.how implement raw data in driver using YUV422？where should i find these code or file？ 3.if Algorithm interface only supported raw-data，then what should i do？ + +It is yuv422 input and yuv422 output, so essentially no other processing, the input data straight goes to memory. Just the data format to FVID2_DF_RAW, it is supported.. It is not problem, just set the data format to RAW in the driver, driver will capture the raw data and that you could use it in the algorithm. Rgds, Brijesh + +hi: i read sample code about how to set dataformat in vision_sdk_0306/ti_components/drivers/pdk_01_10_02_07/packages/ti/drv/vps/examples/vip/captureVip/src/CaptureVip_main.h 653~677 line: ar013 have 12-bit raw data type.why didn't select FVID2_DF_RAW12 but FVID2_DF_RAW16? + +There is no RAW12 because VIP does not support it. it can support 8bit or 16bit or 24bit input.. You could capture RAW12 by tying upper 4 bits to low, even in this case, output will be stored 12ibt in 16bit container.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/795786.txt b/data2/text/range/0-5000/795786.txt new file mode 100644 index 0000000000000000000000000000000000000000..b10598478b9a454950409cb333b9e38a9d428a8a --- /dev/null +++ b/data2/text/range/0-5000/795786.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: TIDL OD usecase + +Query Text: +Part Number: TDA2SX Hi, I converted SSD based object detection model and output is as expected on PC. However, when I am running this model in TIDL OD usecase, I don't get detected objects at all. I checked the output of the TIDL algorithm link on DSP and I can see that there is no valid bounding boxes detected. I scaled input to fit to expected dimensions of model (300x300), so the input shouldn't be a problem. Is there anything you can suggest me to try to figure out what makes this problem? Regards, Sasa + +Responses: +Hi Sasa, can you go thru this thread and see if you can find something useful: e2e.ti.com/.../689617 Regards, Yordan + +Hi, this thread is useful for some understanding of usecase, but as I already discovered that I don't have proper results on the output of tidl link, I hope that someone could tell me what could be making that problem. Results are ok during import, but I can't get the same results with usecase. Do you have any idea what could cause that? Regards, Sasa + +Is the input to import and use case same?n If not first try with the same input and make sure that basic integration is right. + +Input is same file. What mostly make me wondering is that I am getting good results in stats_tool_out.bin when running full net with eve_test_dl_algo.exe, even this is SSD based model. So, should it work like that in first place? + +If the model is working in the import step, Mostly it shall work in target flow also. + diff --git a/data2/text/range/0-5000/796590.txt b/data2/text/range/0-5000/796590.txt new file mode 100644 index 0000000000000000000000000000000000000000..84f9675367d09bbe497ae3c25f08780a19db0c03 --- /dev/null +++ b/data2/text/range/0-5000/796590.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: SYSBOOT and SW5 settings for EVM Rev. H + +Query Text: +Part Number: TDA2EVM5777 Hello, We recently purchased multiple VAYU XC5777X EVMs. The EVM revision is 'H'. As per SPRUI51 (TDA2x EVM CPU Board User's Guide), "ES2.0 is on CPU Board Rev H+". We are working with Vision SDK 3.06 and I am referring to VSDK User Guide for TDA2xx, section 3.5 (Boot Modes). This section does not contain the relevant settings for the TDA2xx ES2.0 device. Please advise. Thank you. + +Responses: +Hi, SYSBOOT and SW5 settings are same between TDA2xx ES1.1 and TDA2xx ES2.0. You can also refer to "Initialization" chapter from TRM. Regards, Rishabh + diff --git a/data2/text/range/0-5000/796928.txt b/data2/text/range/0-5000/796928.txt new file mode 100644 index 0000000000000000000000000000000000000000..7b4ef2540e52054711529442d31bbf258cb003a6 --- /dev/null +++ b/data2/text/range/0-5000/796928.txt @@ -0,0 +1,95 @@ +Ticket Name: Linux/TDA2PXEVM: Nullsrc read mp4 file and decode then Display. Video seems disordered + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Hi all, I use vision_sdk to build a usecase. And my chains picture is below: Then I saw Rtsp link shows video alright. But Display link show video seems like it disordered on timeline. My decode create parameter is below: UInt32 chId; + DecLink_ChCreateParams *decPrm; + + for (chId = 0; chIdchCreateParams[chId]; + + decPrm->dpbBufSizeInFrames = DEC_LINK_DPB_SIZE_IN_FRAMES_DEFAULT; + decPrm->algCreateStatus = DEC_LINK_ALG_CREATE_STATUS_CREATE; + decPrm->decodeFrameType = DEC_LINK_DECODE_ALL; + + decPrm->processCallLevel = DEC_LINK_FRAMELEVELPROCESSCALL; + decPrm->targetMaxWidth = MAX_FRAME_WIDTH; + decPrm->targetMaxHeight = MAX_FRAME_HEIGHT; + decPrm->numBufPerCh = 6; + decPrm->defaultDynamicParams.targetBitRate = 10*1000*1000; + decPrm->defaultDynamicParams.targetFrameRate = 29; + decPrm->fieldMergeDecodeEnable = FALSE; + + decPrm->format = SYSTEM_IVIDEO_H264HP; + decPrm->profile = 3; + decPrm->displayDelay = 0; + } And my mp4 detail information is below: [STREAM] +index=0 +codec_name=h264 +codec_long_name=H.264 / AVC / MPEG-4 AVC / MPEG-4 part 10 +profile=High +codec_type=video +codec_time_base=1/58 +codec_tag_string=avc1 +codec_tag=0x31637661 +width=1280 +height=964 +coded_width=1280 +coded_height=976 +has_b_frames=2 +sample_aspect_ratio=1:1 +display_aspect_ratio=320:241 +pix_fmt=yuv420p +level=32 +color_range=unknown +color_space=unknown +color_transfer=unknown +color_primaries=unknown +chroma_location=left +field_order=unknown +timecode=N/A +refs=1 +is_avc=true +nal_length_size=4 +id=N/A +r_frame_rate=29/1 +avg_frame_rate=29/1 +time_base=1/14848 +start_pts=0 +start_time=0.000000 +duration_ts=7806976 +duration=525.793103 +bit_rate=366088 +max_bit_rate=N/A +bits_per_raw_sample=8 +nb_frames=15248 +nb_read_frames=N/A +nb_read_packets=N/A +DISPOSITION:default=1 +DISPOSITION:dub=0 +DISPOSITION:original=0 +DISPOSITION:comment=0 +DISPOSITION:lyrics=0 +DISPOSITION:karaoke=0 +DISPOSITION:forced=0 +DISPOSITION:hearing_impaired=0 +DISPOSITION:visual_impaired=0 +DISPOSITION:clean_effects=0 +DISPOSITION:attached_pic=0 +DISPOSITION:timed_thumbnails=0 +TAG:language=und +TAG:handler_name=VideoHandler +[/STREAM] So did I miss something? Thanks a lot!!!! + +Responses: +Hi, You need to provide an elementary stream to decoder. Are you able to play the stream without dup and rtsp link? Regards, Anuj + +Also what is disordered? Hopefully you are removing the padding that decoder adds to the output. Rgds, Brijesh + +I modified Null link, so that it can unpacked mp4 file. Then it will send to decode link. Last night I try to use "IssCapture -> Alg_SimpleIsp (A15) -> Encode -> Null" to record video as "file.h264" and "file.hdr". Then play those as "NullSource (A15) -> Decode -> Display", it displayed no disorder. But when I use "NullSource (A15) -> Null" to record h264 file, then play it on "NullSource (A15) -> Decode -> Display", it displayed disorder. So I think it may it may NullSource unpack problem. But when I played those disordered h264 file by ffplay, it looks fine. That is so wired... Did Decode link decode file on any specify way? + +En... it is hard to explain what is disorder. People move seems like shake. And would you please explain how to remove the padding? I can't seem it in usecase:null_src_decode_display + +Sorry this is my fault. I use ffmpeg convert avi to mp4. And it insert b frame by itself. When I setting b-frame as 0, everything goes fine. Thanks all! + diff --git a/data2/text/range/0-5000/797052.txt b/data2/text/range/0-5000/797052.txt new file mode 100644 index 0000000000000000000000000000000000000000..325659afdf1833df20e5b8cae722cca809ae3040 --- /dev/null +++ b/data2/text/range/0-5000/797052.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS: Where could i find source codes for tidl preproc, EVE's computation. + +Query Text: +Tool/software: TI-RTOS Hi, I'm trying to find source codes that are implementing tidl preprocess and Alg_tidl_EveX. Could you let me know where the source codes for them in project? Thanks in advance. Regards, Yoo. + +Responses: +Which SDK are you using? Regards, Manisha + +Hi, You can find the source code for the above asked link in below path PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\apps\src\rtos\alg_plugins\tidl Regards, Anuj + diff --git a/data2/text/range/0-5000/797116.txt b/data2/text/range/0-5000/797116.txt new file mode 100644 index 0000000000000000000000000000000000000000..50f255810aac36c93ba35b12ae58e26d240e09ee --- /dev/null +++ b/data2/text/range/0-5000/797116.txt @@ -0,0 +1,24 @@ +Ticket Name: why ancillary data need ANC_SKIP_NUMPIX, ANC_SKIP_NUMLINES ? + +Query Text: +follow:https://e2e.ti.com/support/processors/f/791/p/796261/2948349#2948349 i have last question: i had read page 2211 of TRM. why is ancillary data that it need what are ANC_SKIP_NUMPIX, ANC_SKIP_NUMLINES? i think it just video data need these.why also trimmer in ancillay data? + +Responses: +It is a features, you could even trim unwanted ancillary data.. Rgds, Brijesh + +ok. if i need all ancillary data, How do I assign the following？ ANC_SKIP_NUMPIX ANC_ NUMLINES_USE ANC_SKIP_NUMLINES ANC_ USE_NUMPIX + +ok, In that case, you don't need to enable cropping for the ancillary data.. Just set the bypass bit to 1. + +hi: we have requirement that get ancillary data in vip module. + +You could capture ancillary data when vsync is active high. + +hi: i had know u say. but i had read page 2211 of TRM.the page wrote it need configure ANC_SKIP_NUMPIX,ANC_USE_NUMPIX,ANC_SKIP_NUMLINES,ANC_USE_NUMLINES for Vertical Ancillary. It makes me confused.these four registers used to crop field in frame.however The veritical ancillary store in bottom and top field in frame. so how to configure these? + +Yes, but this registers need to be configured only if you want to enable cropping.. If you dont want ancillary data cropping, then these registers need not be configured and VIP will capture entire blanking area in the memory. Rgds, brijesh + +ok,i have see vision_sdk_0306/ti_components/drivers/pdk_01_10_02_07/packages/ti/drv/vps/include/vip/vps_cfgVipParser.h follow: it choosed VPS_VIP_LINE_CAPTURE_STYLE_HSYNC can be capture Horizontal Blanking Ancillary Data. so which other choose can capture Vertical Blanking Ancillary data? + +vertical blanking data depends on the size of the vsync, no change required in VIP. + diff --git a/data2/text/range/0-5000/797520.txt b/data2/text/range/0-5000/797520.txt new file mode 100644 index 0000000000000000000000000000000000000000..5d663d8d9c3534c90258218c6700c72f319214ea --- /dev/null +++ b/data2/text/range/0-5000/797520.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler: VPE Link : Support for YUV420P + +Query Text: +Tool/software: TI C/C++ Compiler Hello Everyone, Does VPE link support SYSTEM_DF_YUV420P format? I tried converting YUV420SP to YUV420P using Vpe Link, but it fails to set it. Instead it is setting SYSTEM_DF_YUV422I_YUYV format . Dont know why? And if, VPE does not support YUV420P format ,how can we add support for it in VPE? Regards, Neha + +Responses: +Hi Neha, VPE does support YUV420 to YUV420 output.. Can you share your create parameters? Rgds, Brijesh + +Sure. Below is the function to set VPE parameters in the usecase. static Void TF_Algo_setVPEParams( VpeLink_CreateParams *pPrm, UInt32 numCh, UInt32 OutWidth, UInt32 OutHeight, UInt32 inCropWidth, UInt32 inCropHeight) { UInt32 chId; VpeLink_ChannelParams *chPrms; UInt32 outId = 0; pPrm->enableOut[0] = TRUE; for (chId = 0; chId < numCh; chId++) { chPrms = &pPrm->chParams[chId]; #ifndef TDA3XX_128MB_DDR chPrms->outParams[outId].numBufsPerCh = VPE_LINK_NUM_BUFS_PER_CH_DEFAULT; #else chPrms->outParams[outId].numBufsPerCh = 2U; #endif chPrms->outParams[outId].width = OutWidth; chPrms->outParams[outId].height = OutHeight; #ifdef YUV420P Vps_printf("YUV420P converted in VPE***********\n"); chPrms->outParams[outId].dataFormat = SYSTEM_DF_YUV420P; #endif chPrms->scCfg.bypass = FALSE; chPrms->scCfg.nonLinear = FALSE; chPrms->scCfg.stripSize = 0; chPrms->scCropCfg.cropStartX = 0; chPrms->scCropCfg.cropStartY = 0; chPrms->scCropCfg.cropWidth = inCropWidth; chPrms->scCropCfg.cropHeight = inCropHeight; } } Usecase is as follows: NetworkRx (A15) -> Decode -> Dup -> VPE -> Sync -> Alg_Plugin1 (DSP1) -> DssM2mWb -> Display_Video The dataformat received in Alg_Plugin1 is not set to SYSTEM_DF_YUV420P instead it is set to SYSTEM_DF_YUV422I_YUYV, don't know why? Please note I need to set "SYSTEM_DF_YUV420P", i.e YUV420 planar. Thanks, Neha + +Please note: I want to convert YUV420 Semi Planar to YUV420 Planar. I want to process YUV420 Planar dataformat. + +No module supports conversion from from 420SP to 420P. + diff --git a/data2/text/range/0-5000/798536.txt b/data2/text/range/0-5000/798536.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9b6c8edbc4ddfdaa38dcce3b82b378d9e959272 --- /dev/null +++ b/data2/text/range/0-5000/798536.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/PROCESSOR-SDK-DRA7X: What is the size limit for MLO ？ + +Query Text: +Part Number: PROCESSOR-SDK-DRA7X Tool/software: Linux hi first booting image store into internal RAM，MLO is second booting image，u-boot is Third booting image. I want to remove third booting image， MLO needs to do many functions，My question is whether MLO has size limitations? + +Responses: +Hi, What's the expected size of your MLO? There's a total 512KB OCM RAM in most of the devices where the MLO is first downloaded. Check the data manual of your device to know this number. However, please note about 32KB of OCM may be used by ROM at the time of booting. Regards, Somnath + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/798541.txt b/data2/text/range/0-5000/798541.txt new file mode 100644 index 0000000000000000000000000000000000000000..2a45677f57409786756fae38154207f2e371306e --- /dev/null +++ b/data2/text/range/0-5000/798541.txt @@ -0,0 +1,8 @@ +Ticket Name: Is The ancillary data have code words or head in memory? + +Query Text: +are there have code words or head in ancillary data after send to memory? similar "0x00,0xff,0xff" + +Responses: +Not really, the captured ancillary data will be exactly what is sent from the sensor.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/798744.txt b/data2/text/range/0-5000/798744.txt new file mode 100644 index 0000000000000000000000000000000000000000..0fac3c62f47d881b5acf212eebc312e566b4d3b1 --- /dev/null +++ b/data2/text/range/0-5000/798744.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2PXEVM: Decode link output has offset + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Hi all, When I use decode link, there is offset problem, please see my screenshot below which is show in RTSP. My usecase is NullSource (A15) -> Decode -> Dup Dup -> Encode ->Rtsp (A15) Dup -> Null (A15) When I dump frame use Null link, it shows: pitch: 2048, height: 964, width: 1280, startx: 32, starty: 24. Then I saw decode link had added UTILS_ENCDEC_PADX and UTILS_ENCDEC_PADY. But it is useless to set them as 0. So do you have any idea about it? Thanks a lot! + +Responses: +Which release you are using? I see UTILS_ENCDEC_PADX is set correctly to 32 and same for UTILS_ENCDEC_PADY. Rgds, Brijesh + +V3.4 And could you please tell me why Decode link add this pad? Thanks! + +Hi TI implementation of H264 decoder on IVA-HD HW need some padding around the output buffer. This can not be avoided. You can either use 1. VPE to crop or 2. SW way of manipulating the buffer start address to avoid this padding If you are connecting Display after Decode, then VSDK display link support this kind of cropping SW way of Manipulating the buffer start address = buf_addr + pitch * start_Y + start_X retards, Shiju + +And also codec implementation requires this padding area internally. Rgds, brijesh + diff --git a/data2/text/range/0-5000/798823.txt b/data2/text/range/0-5000/798823.txt new file mode 100644 index 0000000000000000000000000000000000000000..16e195310c6cc6cf385aff9290e01fc926c436ec --- /dev/null +++ b/data2/text/range/0-5000/798823.txt @@ -0,0 +1,36 @@ +Ticket Name: RTOS/TDA2EVM5777: changing PHY DP83865 to PHY DP83867IRPAP + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: DP83865, DP83867IRPAP-EVM Tool/software: TI-RTOS Background： Hardware Platform：TDA2x EVM Board Version：ASSY 516580 REV H Software Platform：SDK Version：PROCESSOR_SDK_VISION_03_04_00_00 Explanation： Originally，there are two PHY chips (DP83865) on the EVM board. When I intended to design a new board based on the EVM board，I found it’s very hard to buy the DP83865 chip. I want to verify the DP83867 can replace the DP83865 chip, so I designed a seprate new testing board used the chip DP83867IRPAP also from TI. When I removed the connection between the TDA2x chip and DP83865 chip on the EVM board, and then connect the DP83867 testing board, didn’t change any software configuration, I found it doesn’t work, printed “NDK: Link Status: 1000Mb/s Full Duplex on PHY 3”.But it didn’t establish connection successfully with PC. I want to know what can I do, I saw some codes relative with DP83867 in SDK, But I don’t know how can I use them. Can you offer me some solution? Thank you very much! + +Responses: +Hi Yongliang, If there was a connection problem, you wouldn't see the link status message. So, after printing the link status message, did it print the IP address of the EVM? Also, are you using static or dynamic IP? Regards, Anand + +Hi Yongliang, It's been a while since I have heard from you. Were you able to solve this issue? Regards, Anand + +No, I applied a DP83867IRPAP-EVM EVM board from TI, and I recieved it, and then I had a look, I found it's not very easy to solder strap resisitor on the board, and actually I don't understand why the TI can design their EVM board in that way. + +Hi Yongliang, In TDA2Ex and some other EVMs, we use the DP83867. To use this PHY, we have to specifically configure the delays for the phy. If you check inside your vision sdk folder you should find this file \ti_components\networking\nsp_gmacsw_4_15_00_00\packages\ti\ndk\j6eco\examples_ipu1\client\j6eco_init.c. You should see a function to configure delays for dp83867. You can use the same function in your existing code when you use the custom board. This is the only change in 83867 I suppose. Let me know if this helps :) Regards, Anand + +Thank you very much! I will try tomorrow, and I think I get your idea. I also compared my hardware configuration with the evm board which use dp83867. I think I can solve it next. Thank you for your quick reply. + +Hi Yongliang, I understand that you're still facing trouble trying to get the PHY to work. Are you facing a HW problem? Have you tried the changes I have recommended Regards, Anand + +I think hardware part is OK,and I also tried according your sugesstion, but it still dosn't work.I pasted the hardware board indicator video. + +Below is the log, after I insert the phy delay function into my code, but it still dosn't work. Do you have any suggestions? + +Hi Yongliang, Your logs tell me that the connection with the PHY is established. When you say your code isn't working, what exactly is the error? Are you able to get an IP printed in the console? Regards, Anand + +I used static IP, and after I insert the PHY delay configuration function in my code, I can't successfully ping(command) with the board(PHY is DP83867), then I used my another board running same code(PHY is DP83865), the PHY DP83865 still can run correctly, I can easily feed video by my labtop to the board, so I guess may be my inserted function dosn't work anymore. I confused. Thank you for your reply! + +Hi Yongliang, I believe the configureDelays function might not be getting executed. Can you put a breakpoint inside the function and see if it is hitting? Also, make sure that if there are any SoC specific if conditionals or # defines, comment them out so that the function blindly configures the delays for you. Regards, Anand + +I printed some information in the configure delay function, and I saw the information from the initialize Log. I will check the platform related compile option next, after I get the result, I will reply you. I guess may be because of some ethernet related hook, have some limitation on calling the PHY configuration function.Thank you! + +Hi Yongliang, It's been a while since I've heard from you. Were you able to go forward in this? Regards, Anand + +Hi Yongliang, Any updates on this? Regards, Anand + +Hi Yongliang, Since I have not heard back from you in a long time, I assume you have solved this issue. Regards, Anand + diff --git a/data2/text/range/0-5000/799121.txt b/data2/text/range/0-5000/799121.txt new file mode 100644 index 0000000000000000000000000000000000000000..7214645f0c782cbf15c52b8f0f9541aa1b08f454 --- /dev/null +++ b/data2/text/range/0-5000/799121.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS: Which core manages IPC in TIDL? + +Query Text: +Tool/software: TI-RTOS Hi, I'm analyzing TIDL usecase and i have 3 questions. Q1) I did read some documents for understanding IPC. As i understand, each core has message box and messages from other cores are received by that. (Is this right?) If i understand correctly, is there any main core for IPC? (I mean the core which handle the messages from each core) Q2) Does IPC1_0 executes Chains_main function? In that case, the main core of TIDL usecase is IPC1_0, is this right? Q3) In converting caffe model to TIDL by using TIDL importing tool, i saw 'LayersGroupID' parameter. Is that value existing for giving each layers of DL model to DSP/EVE? If so, where can I find the source code that provides each layer of the DL model on each core? Thanks in advance. Regards, Yoo. + +Responses: +Hi Yoo, VisionSDK experts will answer Q1 and Q2 soon. For Q3 please check FAQ #21 in PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs\TIDeepLearningLibrary_UserGuide.pdf Regards, Yordan + +Hi, Please find your answer below Q1> All cores has its message box for IPC. There is no main core for this each core can communicate with any core independently. Q2> I hope you mean IPU1_0 Yes IPU1_0 is master core when we run VSDK bios. So this core runs all usecase. Regards, Anuj + +LayersGroupID is set via import config file. refer TIDL users guide for more information + +Thank you, I understand the way to allocate each layers into DSP/EVE core. Then, the diagram below, which shows the data flow of the TIDL OD usecase, shows only the flow of the frame. And each layer operation actually is executed by DSP or EVE according to the layer groupid? or In the diagram below, first Alg_tidl_Eve executes computation of specific layers that are allocated to EVE and Alg_tidl_Dsp executes computation of other layers? + +Yes, it shows only the flow of the frame. And each layer operation actually is executed by DSP or EVE according to the layer groupid + diff --git a/data2/text/range/0-5000/799159.txt b/data2/text/range/0-5000/799159.txt new file mode 100644 index 0000000000000000000000000000000000000000..e4ea473440ad505e31722759c7b472f410272bc8 --- /dev/null +++ b/data2/text/range/0-5000/799159.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: Dears ，What is the Speed of CNN of TDA2 ， What is the XX Tops ？ What is the reference price of TDA2 ? + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Dears ，What is the Speed of CNN of TDA2 （operational capability）， What is the XX Tops ？ What is the reference price of TDA2 ? + +Responses: +Hi Andrew, for the CNN performance please check TIDeepLearningLibrary_DataSheet.pdf in "PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs" directory. For TDA2x pricing you need to contact authorized distributor: www.ti.com/.../distributors.html Regards, Yordan + +Dear Yordan Could you offer the File ,Or link , many thanks ~ + +Hi Andrew, you can install VisionSDK for TDAx processors which includes TIDL library as well as example usecases fir deep learning: I also attach the file for your reference. TIDeepLearningLibrary_DataSheet.pdf Regards, Yordan + diff --git a/data2/text/range/0-5000/799180.txt b/data2/text/range/0-5000/799180.txt new file mode 100644 index 0000000000000000000000000000000000000000..d70cd4f17b20e8103ca8d6ac7e954d9d1aa2d794 --- /dev/null +++ b/data2/text/range/0-5000/799180.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS: Why the cores(DSP, EVE, A15) initialize for NullSource link? + +Query Text: +Tool/software: TI-RTOS Hi, I saw the image that is showing the flow of TIDL OD chain. As the below image showing, the NullSource link is allocated to IPU1_0. However, in linksInclude_${core}.h, there are define instruction for nullsrc in EVE, DSP. For example, in linksInclude_a15_0.h, #ifndef linksInclude_a15_0 #define linksInclude_a15_0 #define links_common_algorithm #define links_common_dup #define links_common_gate #define links_common_ipcIn #define links_common_ipcOut #define links_common_merge #define links_common_null #define links_common_network_tx #define links_common_network_rx #define links_common_nullSrc #define links_common_select #define links_common_sync #define utils_common #define links_common_system #define links_a15_system #endif Could you tell me Why #define links_common_nullSrc is needed in a15 and DSP, EVE? + +Responses: +Hi, In TIDL_OD usecase we use NullSrc link on IPU1_0 but it is a common link which can run on any core. So we build this link for all cores but filesystem support is not available for all cores except IPU1_0 so you can not read any files using NullSrc if you run on any cores. In TIDL_OD we have to read a file so its been used on IPU1_0 cores. Regards, Anuj + diff --git a/data2/text/range/0-5000/799227.txt b/data2/text/range/0-5000/799227.txt new file mode 100644 index 0000000000000000000000000000000000000000..a4aa5e3a8695355991b9fb90550699919c721d95 --- /dev/null +++ b/data2/text/range/0-5000/799227.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2SG: About CNN Performance + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi SIr Does TI have any performance report about CNN calculation and the unit is Tops for TDA2 and TDA3. for NXP S32V23x , the CNN accelerator is about 10 Tops by using Apex V3 with 4xA53/1xM4. please advise BR Yimin + +Responses: +Hi Yimin, please check TIDeepLearningLibrary_DataSheet.pdf in "PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\docs" directory. Regards, Yordan + diff --git a/data2/text/range/0-5000/799285.txt b/data2/text/range/0-5000/799285.txt new file mode 100644 index 0000000000000000000000000000000000000000..60f9e4119ad663822ec55d10f498add2420dbfb3 --- /dev/null +++ b/data2/text/range/0-5000/799285.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2SX: Can i use HDMI input in EVM + +Query Text: +Part Number: TDA2SX Tool/software: TI-RTOS Hi, I am using TI TDA2xx EVM with Vision SDK Linux Environment. I need some clarifications about HDMI. I want to use USB Camera to capture frames. Can i connect USB camera to HDMI input port of the EVM via USB-HDMI Converter ?? if, Yes means which USECASE have to use. + +Responses: +If it supports standard HDMI output, with the supported resolution/format, it can be used. Rgds, Brijesh + +Thanks for quick response, However, We are looking to use the HDMI port present in the VIsion APP Board for receiving video input, not for sending through HDMI output port of TDA2xx EVM. We are expecting this below flow, CAMERA ---> HDMI INPUT ---> VISION SDK ---> TDA2xx Regards, ARUNKUMAR + +Hi Brijesh, Sorry for interrupting you, I understood, what you had explained. But, I want a usecase for camera capture. Flow : USB Camera --> HDMI Converter --> HDMI Input to Vision SDK Board + +As i said, if converter can convert to standard HDMI signal, it should be possible. + +Hi Brijesh Jadav, I understood, what you had answered to my question from compatibility perspective. Now I am looking for visionsdk usecase to capture and display or capture and dump to file from HDMI. For Example : TDA2xx vision SDK usecase for multides camera capture and display using the 1) "lvds_vip_multi_cam_view_sgx_display" to capture & display. 2) "lvds_vip_multi_cam_vpe_enc_null" to capture and store in file. like this above usecases, is there any usecase there to test HDMI input from visionSDK usecase ? Thanks & Regards, ARUNKUMAR V N + +Not really, but you could easily add by merging two usecases. rgds, brijesh + +Closing this thread as there is no further questions.. + diff --git a/data2/text/range/0-5000/800039.txt b/data2/text/range/0-5000/800039.txt new file mode 100644 index 0000000000000000000000000000000000000000..00691d2d68db717601f7901d99c9c477fb19bfeb --- /dev/null +++ b/data2/text/range/0-5000/800039.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2EVM5777: Ethernet framework + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Code Composer Studio Hello sir , I would like create application that has to transfer image and CAN data from PC to board over Ethernet. which document it will helpful for me to develop application using TI provided Library . Thanks and Regards, Madhav + +Responses: +Hi Madhav, Which version of Vision SDK are you using ? You can find a bunch of getting started guides under the docs folder inside the main SDK folder. Please provide more details about your SW environment. Regards, Anand + +Hello Anand, Vision SDK version 3.0.6. Windows 10 code compose studio 8.3.0 Regards, Madhav + +Hi Madhav, I see that the thread e2e.ti.com/.../2972950 is a possible duplicate of this thread. Please close this thread. We can continue discussion in the other thread. Regards, Anand + diff --git a/data2/text/range/0-5000/800491.txt b/data2/text/range/0-5000/800491.txt new file mode 100644 index 0000000000000000000000000000000000000000..293300b4da084e4f05de97741b1cffbff2324bfe --- /dev/null +++ b/data2/text/range/0-5000/800491.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS: What is SystemLink_init function for? + +Query Text: +Tool/software: TI-RTOS Hi, I couldn't understand the role of SystemLink_init function. Is it different with some links like NullsrcLink? In the source code, the comment says 'Initializes the linkObj and creates the task for SystemLink_tskMain'. Does each core have only one linkObject? Is there any guide for this question? Regards, Yoo. + +Responses: +Please provide more details to help us provide appropriate guidance: 1. What device and what version of Processor SDK RTOS are you using . What HW platform are you testing on. 2. The APIs that you are referring are not commonly used by the drivers and RTOS ...Please indicate what component and what source file you are referring to. Regards, Rahul + diff --git a/data2/text/range/0-5000/800854.txt b/data2/text/range/0-5000/800854.txt new file mode 100644 index 0000000000000000000000000000000000000000..7f47737de13963123cd0a0d5567ad4e80195f706 --- /dev/null +++ b/data2/text/range/0-5000/800854.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS: How EVE/DSP cores read the parameters of specific layers? + +Query Text: +Tool/software: TI-RTOS Hi, I have a question about TIDL usecase. In TIDL OD, how eve/dsp cores read the parameters which are belonged to specific layers in SSD? I saw the usecase reads bin files which have information of Network architecture and real parameters in tidlODInit function. However, in AlgorithmLink_tidlProcess, which is a function that actually implements eve and dsp algorithms, i couldn't find the core verify each layer is designated to itself. Could you let me know where the source code implements that part? Thanks in advance. Regards, Yoo. + +Responses: +Hi Yoo, "LayergroupID" parameter in the import config decides which layer to run on EVE or DSP cores. Please check FAQ #21 and #22 in TIDeepLearningLibrary_UserGuide.pdf for more details on this. Thanks, Praveen + +Hi, Thank you for reply. Yes, i already read that section. However, what I would like to know is how to pass each layer set in import config to eve and dsp when real TIDL OD usecase is running. In source code, there is AlgorithmLink_tidlProcess function in tidlLink_algPlugin.c file. However, i didn't find where to check each layer is set to be calculated on DSP/EVE. Could you let me know how to know DSP/EVE each layer is responsible for themselves? Thank you. Regards, Yoo. + +Hi, In AlgorithmLink_tidlProcess, we check the input buffer type and depending on that we decide its running on DSp or EVE. If buftype is video frame then it is running on EVE and if its meta buffer then it is running on DSP. Regards, Anuj + +Hi, If buffer type decides whether each layer is running on DSP or EVE, what LayerGroupID is for? Could you explain what is meta buffer? I understood the video buffer is for each frame. Then meta buffer is just for contains information of frame? So far as I understand it, check each layer group id in the AlgorithmLink_tidlCreate function. At this time, if the result of the layer assigned to eve is input to the next layer assigned to dsp, or vice versa, an input buffer and an output buffer are generated. Then, in AlgorithmLink_tidlProcess, it gets the input buffers from previous link and put them into temporary queue. The input buffers may be the input frame that is preprocessed by A15. And it prepares output buffers corresponding to input buffers. After that, it checks whether the input buffer is meta data or video frame. (which link sends meta data?) And algProcess executed using inBufs, outBufs, etc. After algProcess, it puts out buffer to queue and notify to previous link and release input buffers. Could you please let me know if i understand code incorrectly? In addition, if i understand correctly, i think it doesn't match with the flow of TIDL OD chains below image. (Maybe, i missed some point) Thanks for your reply. Regards, Yoo. + +Hi, Meta frame is a kind of buffer holder in VSDK which contains meta information. We have different kind of buffer holder, please check below file. vision_sdk\links_fw\include\link_api\system_buffer.h TIDL link running on eve gives meta buffer as output. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for different issue. Regards, Anuj + diff --git a/data2/text/range/0-5000/801060.txt b/data2/text/range/0-5000/801060.txt new file mode 100644 index 0000000000000000000000000000000000000000..1134827ee2447a10ab0de7aa126caa9ed45bc98e --- /dev/null +++ b/data2/text/range/0-5000/801060.txt @@ -0,0 +1,10 @@ +Ticket Name: RTOS/TDA2HG: 2D SRV calibration issue. + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi Sir, I followed "VisionSDK_UserGuide_SurroundView_Calibration_TDA2xx.pdf" to using "calibration_tool.exe". This tool asks me to input a reference image, I don't know how to generate a reference image and I give the "refimg.jpg" that is from "/surround_vision_tools/docs/", is it right? I input all the image files and parameters, and then follow the document to go to next step, after I go to step that select "reference image" and click "Continue", this tool will close and no next step, But if I input the sample data (from "/2D_calbration_tool/sample_data"), this tool can work correctly. Attachment are the "refimg.jpg" and I took a calbration picture by TDA2 EVM, original .yuv file is 1.31MB, I transfer it into .jpg file. FRONT_1.rarRanny, + +Responses: +Hi Sir, I change the file name form .YUV to .yuv, just rename the image extension name as small letter, calibration tool can work now. Ranny. + +Hi Ranny, thanks for updating the thread and sharing the solution. Regards, Yordan + diff --git a/data2/text/range/0-5000/801443.txt b/data2/text/range/0-5000/801443.txt new file mode 100644 index 0000000000000000000000000000000000000000..9982d4f45abb90f8605db4fc75321fbce487ea19 --- /dev/null +++ b/data2/text/range/0-5000/801443.txt @@ -0,0 +1,34 @@ +Ticket Name: RTOS/TDA2PXEVM: Global variables not initialized in IPU ( M4 ) + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS When we try to run a Algolink ( VSDK 3.03) which was earlier running on A15 in IPU on TDA2P, we see the uninitialized global variables are not getting initialized to 0. Can you tell us if there is something we need to check on the compiler/linker options which might help. + +Responses: +Hi, By default the memory map sections for VSDK is uninitialized to reduce the boot up time. If you want initialize some global variables then you can create 1 section in cfg file under bss section and map it with IPU1_0_DATA_MEM and assign its type as "INIT". And map your global variables to this new section. Please refer to autosarIpcShm section in VSDK3.5 release onwards. Regards, Anuj + +Hi Poorva FYI, there is a build option also available, but this one will apply globally to all uninitialized variables, arrays etc. and this can impact on boot time. --zero_init=on So as mentioned earlier, Zero init a specific section would be the recommended option. BTW, you do not need this logic at all, if your C code is capable of performing all the required variable initialization at run-time! regards, Shiju + +Hi Shiju, I made --zero_init=on for LNKFLAGS_GLOBAL_ipu1_0 and LNKFLAGS_GLOBAL_ipu1_1 in source\vision\platform\ti\tda2\build\rtos\makerules\build_config.mk. file. After this change I checked the global variable values again but they weren't still initialized. Could you please mention the location where the change needs to happen? Also, in the same file for LNKFLAGS_GLOBAL_a15_0, no value for zero_init was set. Is that correct? + +Hi Poorva Yes, your changes are correct, I doubt there may be some other make files overriding your changes Please do a grep in /vision_sdk/build folder and make appropriate changes if any cfg/make files overriding your changes regards, Shiju + +I searched all the places where zero_init is off for IPU1_0 in the vision_sdk/build folder, but there is no override. Any other possibility do you suspect for it to be not working? Does zero_init has to be set with any other combination of compiler/linker options? I had explored cinit_compression option but there is no effect with it's value also. + +Poorva We have used this in C66x & M4 CPUs, with TI compilers. BTW, are you trying on A15 with GCC compiler? If yes, this combination is not checked! regards, Shiju + +Hi Shiju, We are also using M4 CPU with TI compiler (i.e. cg_tools), but it doesn't work for us. Regards, Poorva + +Poorva This needs to be checked again. Meantime can you check the first option described in the beginning of the post? regards, Shiju + +Hi Anuj, I tried the solution you had mentioned, but is there any other solution that zero initializes all the global variables automatically as it is not feasible for me to initialize each one of them individually. I also tried the Shiju's solution but it does not seem to be working for us. Regards, Poorva + +Hi, I hope you are doing this for a specific section only. You can keep some value in any variable which is in that section and after boot just check that 1 variable and if that has a value of 0 then it will work for the entire session. Regards, Anuj + +Hi, zero_init flag works on DSP but not on IPU core so using that you will not be initialize variables to 0. You can try out the experiment which has been suggested earlier. You can map all your wanted variables to a section like below assuming section name is "temp" and variable name "gVar" #pragma DATA_SECTION(gVar, ".bss:temp") Then open below file links_fw/src/rtos/bios_app_common/${platform}/${core}/${core}.cfg and map your temp section to data_memory section of that core like below assuming you are doing it for IPU1_0 Program.sectMap[".bss:temp"] = "IPU1_0_DATA_MEM"; Program.sectMap[".bss:temp"].type = "INIT"; Regards, Anuj + +Hi Anuj, Thanks for the response. This resolves our query. But we want to understand the reason of this restriction for IPU. Could you please help us understand that? Regards, Poorva + +Hi Poorva, Are you asking for IPU or MPU. As the above example should work for IPU1_0 core. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for different issue. Regards, Anuj + diff --git a/data2/text/range/0-5000/801767.txt b/data2/text/range/0-5000/801767.txt new file mode 100644 index 0000000000000000000000000000000000000000..d61b0122db52217327abf920ee80cbd7819fb25c --- /dev/null +++ b/data2/text/range/0-5000/801767.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2SX: Surround view use case in TDA2x + +Query Text: +Part Number: TDA2SX Tool/software: Linux Hello, We are looking to set up a demo for Surround view use case on TDA2X board. We are looking for an out of the box solution which we can showcase. We have finalized following set up to order. Please let us know your feedback if this will work out of the box with vision SDK. Also, it will be great if we are guided with the exact use case to be run from vision SDK HLOS side. Board Link for purchase (TI or Spectrum) Project tda2x http://www.spectrumdigital.com/tda2x-vision-evaluation-module-kit/ ADAS base board + vision daughter card surround view kit http://www.spectrumdigital.com/multides-surround-view-kit/ SV kit thanks, Naren K. + +Responses: +Hi Naren, This appears the be the correct kit, however I did want to point out that this is the TDA2x part that doesn't have the ISP integrated in the SOC. If you were interested in that then there is a separate kit that comes with the TDA2PX parts. In this setup the ISP is on the ov10635 cameras that you are purchasing with the SRV kit. Regards Shashank + diff --git a/data2/text/range/0-5000/802151.txt b/data2/text/range/0-5000/802151.txt new file mode 100644 index 0000000000000000000000000000000000000000..5f39e0034d4f4b63fd86216742a2f44840d76407 --- /dev/null +++ b/data2/text/range/0-5000/802151.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2EVM5777: VLIB Test Report memory design + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Dear experts, We are using TDA2 C66 VLIB for opencv replacement. When we use profile function to calculate VLIB API performance, it differs a lot with the number in test report(about 10 times more than that number). Could you please expain more about how the test report is profiled? On L1SRAM? on L2SRAM? Can we achieve the same number as the test report on target application? Thanks & Best Regards! ZM + +Responses: +ZM, The values in the test report are obtained when running the tests using the DSP cycle accurate simulator on CCS5.x. It is effectively the performance assuming that all code, stack, data are in L1 RAM; what we call flat memory model. It only accounts for the performance of the DSP core with NO memory hierarchy stalls. As such, this is typically a best case baseline which a real world system can only hope to get close to based on how the memory system is defined. In this way, the numbers are helpful in comparing the core performance with each other, and gives an upper bound as to the performance you can get close to based on memory model optimizations, such as cache configuration or using DMA to bring in data into L2SRAM or L1D SRAM. I have attached a spreadsheet which summarizes the test performance, when run in on VLIB 3.3.0.1 release, on a sample of different memory models, to give you a better idea of what to expect based on the memory model you are using. The memory configuration number in the spreadsheet corresponds to the following legend: perf_vlib_3_3_0_1_C66_tda2.xlsx Memory configuration of test + +1. Simulator - flat memory modoel. Cycles assume all of data/code accesses are in L1 memories. This is to serve as a baseline which indicates the best possible performance on the particular DSP. + +2. L2 Cache = 256kB, all code and data in DDR - pure cache memory model. + +3. L2 Cache = 128kB, all code in DDR, data buffers in L2RAM - on TDA2x, this means 128k+32k RAM for buffers. + +4. L2 Cache = 64kB, all code in DDR, data buffers in L2RAM - on TDA2x, this means 192k+32k RAM for buffers. + +5. L2 Cache = 32kB, all code in L2RAM, data buffers in L2RAM - on TDA2x, this means 224k+32k minus size of code RAM for buffers, . I presume you are using the option 2 by default: All code and data in DDR with cache. As you can see from the spreadsheet, this is typically the worst performance (unless you have cache turned off). Options 3-5 are meant to reflect if DMA is used to move data from DDR into L2SRAM, so the processing can happen on data already in L2SRAM. This removes the expensive L2 data cache miss penalty on the data access, and leaves only the L1 cache miss penalty. Hopefully, this spreadsheet can help you determine if it is worthwhile for you to make memory movement optimizations such as using DMA to move data to L2 or L1 data. If you are still seeing a significant delta, you may want to consider the system and DDR clocks you are using, as this performance is measuring DSP clock cycles. If DDR clock is set to lower, then the number of DSP clocks may go up due to the additional memory system stall cycles imposed by lower DDR clock. I am using the default clock settings from the CCS gel file for TDA2x. Best Regards, Jesse + +Thanks Jesse. This statistic helps a lot. + diff --git a/data2/text/range/0-5000/802326.txt b/data2/text/range/0-5000/802326.txt new file mode 100644 index 0000000000000000000000000000000000000000..32c1da4706bc8ffe0b13a54cd74cb577d7ea6916 --- /dev/null +++ b/data2/text/range/0-5000/802326.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2EVM5777: How to enable 4 channels in NullSource link? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux I want NullSource link to output 4 channels video frames, who can tell me how to do it? + +Responses: +Hi, can you try to change the value of NULL_SRC_LINK_NUM_CHANNELS_DEFAULT in vision_sdk/links_fw/include/link_api/nullSrcLink.h Regards, Yordan + +/* * Validating the create params * TODO: Extend to validate width, height and pitch params also */ /* Only one channel is supported as of now */ OSA_assert(pPrm->outQueInfo.numCh == 1U); OSA_assert(pPrm->timerPeriodMilliSecs != 0); /* No support for Network RX Mode */ OSA_assert(pPrm->dataRxMode == NULLSRC_LINK_DATA_RX_MODE_FILE); it can't work. thanks. + +Hi, if you use Linux on A15, core, than you can remove this assert and it should work, please check this thread: e2e.ti.com/.../2650316 Regards, Yordan + diff --git a/data2/text/range/0-5000/802525.txt b/data2/text/range/0-5000/802525.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7b97f6913de4b9094f328af55bd549d27f186c7 --- /dev/null +++ b/data2/text/range/0-5000/802525.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: display link question + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux How to display a RGB_24_888 video frame via display link? + +Responses: +Hi, You cannot explicitly set input format for display link. You need to output frame in RGB_24_888 format from the previous link. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/802669.txt b/data2/text/range/0-5000/802669.txt new file mode 100644 index 0000000000000000000000000000000000000000..8b1746cfb5da1fdd4363adaf195b42a303f5c3a8 --- /dev/null +++ b/data2/text/range/0-5000/802669.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: Evaluation Module for TDA2SX + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2P-ACD, TDA2EVM5777, , TDA2E TI (Spectrum Digital) offers an evaluation module TDA2x Vision EVM Kit with part number TDA2EVM5777. I want to know whether its processor is TDA2P-ACD or TDA2S or TDA2H? I am interested in getting evaluation module based on TDA2S which has 4 EVE while others have 2 EVE. Regards + +Responses: +Hi, TDA2EVM5777 is a super set part and it has four EVEs. You can order this EVM for the purpose mentioned. Refer this for details - https://e2e.ti.com/support/processors/f/791/t/777316?TDA2EVM5777-Is-TDA2x-a-processor-or-evaluation-board- + +Thanks for your reply. I did not know about the concept of Super set part number. Just for further knowledge, could you please further elaborate my following query: Question: Since TDA2S is super set part number. Is there any difference between part number TDA2S and X5777x? Although part number X5777x is mentioned in datasheet of tda2sx.pdf but never mentioned in "Mechanical Packaging and Orderable Information" section of the datasheet. So my question is whether both TDA2S and X5777x are same part numbers? If not, where can I find datasheet of X5777x part number? Regards, Dr. Imran Ali + +Moreover, I guess that Pin configuration of following components is different: TDA2E, TDA2H, TDA2L, TDA2P, TDA2S. So how will X5777x serve as super set of this TDA2x family? If I purchase the development board based on X5777x, and later on I develop my own board based on any TDA2x component, I will have to make the schematic myself which would be very difficult task. Kindly reply me. Thanks in advance. + +TDA2EVM5777 is a superset part for TDA2SX/TDA2HX etc. It is not for all TDA2x devices - specifically not for for TDA2Px. Since you are looking for TDA2Sx, you can go ahead with TDA2EVM5777. If you change the part number you need, please check an EVM for that specific part. + diff --git a/data2/text/range/0-5000/802858.txt b/data2/text/range/0-5000/802858.txt new file mode 100644 index 0000000000000000000000000000000000000000..2dc83789770eb8a90372db8fed84447180def082 --- /dev/null +++ b/data2/text/range/0-5000/802858.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2EVM5777: VPE output buffer pitch is less than width + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Dear experts, In VisoinSDK 3.6 Linux_all/Bios_all on TDA2 EVM. Capture(720P) -> VPE(600x600) -> Display(600x600 inside 1080P HDMI) I ran into a problem that VPE's output buffer size is less than the width I provided. DSS init will fail because input pitch is less than 600. I found that in VPE code: vpeLink_drvCommon.c@ line 481, function VpeLink_drvCreateOutObj, /*Width aligned to satisfy encoder requirement*/ +- pFormat->width = VpsUtils_floor(pFormat->width, 16U); ++ pFormat->width = VpsUtils_align(pFormat->width, 16U); + pFormat->pitch[0] = + VpsUtils_align(pFormat->width, VPS_BUFFER_ALIGNMENT); Please help to confirm is it correct? by default it will get 592, after modification, it will get 608. Thanks & Best Regards! ZM + +Responses: +I think width is 592, but pitch will still more than width, isn't it? pitch is calculated from the aligned/floored pitch. Rgds, Brijesh + +Hi Brijesh, Our customer's algorithm wants 600x600 image. If VPE outputs 592x592, it means 8 pixels data is lost/incorrect. if output data is 608x608, it is larger than 600x600, which make sense. the algorithm can only take 600x600 from it, all 600x600 is correct. From the example in the description, displayLink is configured 600x600, this is not same with VPE, which will cause assertion. Thanks & Best Regards! ZM + +Ming, Can you show the display error? Ideally it should not. Display just works based on what is sent by the previous link. in this case, it will just display 592 pixels, if the pitch and width are correct. The last 8 pixels will be back ground color.. The other way to fix is, to change the code to make it ceil, instead of floor.. But then you need to enable inline scalar, or crop the buffer.. Is it possible to just comment out floor operation and check output? I am not sure why it is added.. I think width can be anything, does not necessarily required to be aligned to 16.. Rgds, Brijesh + +Hi Brijesh, 1. VPE must output the exact size as we want, no matter the size is 16-aligned or not. It can provide a larger buffer for us to crop, but it shouldn't provide a smaller buffer. The patch at the beginning works for this. Please help to check if this logic is correct, since all our demo are 16-aligned. 2. DisplayLink CreateParam is set from usecase, may not align with VPE. (From my understanding, we only configure displayLink's output size, input size is from previous link. There might be some debug work to do here. After changing VPE source code, this error disappear.) The error message is as follows. [HOST] [IPU2 ] 51.171140 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 51.171597 s: dispcore/src/vpscore_dss.c @ Line 1079: [HOST] [IPU2 ] 51.171719 s: Pitch less than Width [HOST] [IPU2 ] 51.171811 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: [HOST] [IPU2 ] 51.171902 s: Set DSS parameter failed [HOST] [IPU2 ] 51.171963 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! Thanks & Best Regards! ZM + +Great Ming, since the issue is resolved after changing VPE link, i am closing the thread.. + diff --git a/data2/text/range/0-5000/803902.txt b/data2/text/range/0-5000/803902.txt new file mode 100644 index 0000000000000000000000000000000000000000..bf269bc9a33fa7d43c7ab6d15af5503e5fdc1014 --- /dev/null +++ b/data2/text/range/0-5000/803902.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2EVM5777: how to use TDA2 Linux USB otg link USB Storage + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux I want to be on a Linux system use USB Storage in TDA2EVM5777 USB otg it can't work + +Responses: +Hi Martin, The USB host mode is supported on Processor-SDK Linux. You may find the below thread useful. e2e.ti.com/.../553432 Regards Shravan + diff --git a/data2/text/range/0-5000/803971.txt b/data2/text/range/0-5000/803971.txt new file mode 100644 index 0000000000000000000000000000000000000000..9cf7202887094696f6ba4e4582dbbe8c52e7fc6e --- /dev/null +++ b/data2/text/range/0-5000/803971.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2EVM5777: PHY swich,(Ndk_nsp_hook.c) + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: DP83865 Tool/software: TI-RTOS Hello, everyone! Can I ask for help about switching the DP83865 phy to DP83867 on TDA2x evm board? I found there is a old question related to it. I also had a look the file "Ndk_nsp_hook.c",but I didn't find out any idea to change it, if anyone successfully switched the phy, please give me direction,thanks a lot. + +Responses: +Hi Yongliang, I believe this thread is a duplicate to the thread e2e.ti.com/.../798823 .Kindly close this thread. We can continue discussion on the other thread. Regards, Anand + diff --git a/data2/text/range/0-5000/804373.txt b/data2/text/range/0-5000/804373.txt new file mode 100644 index 0000000000000000000000000000000000000000..7e531f77feb8d84dff074f85b76f73c731ff157d --- /dev/null +++ b/data2/text/range/0-5000/804373.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/AM5728: TIDL application note + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi. I found this document talking about TDA2 Deep Learning. https://usermanual.wiki/Document/TIDeepLearningLibraryUserGuide.1793363394.pdf My question: A. Can I follow this to test the TI Deep Learning on the AM57xx? B. If no, Why AM57xx has no this kind of APP note? BR Rio + +Responses: +Rio Chan said: A. Can I follow this to test the TI Deep Learning on the AM57xx? No, you can't follow the document that you shared above to program TIDL on AM57x. That is applicable for SDKs for TDAx. Rio Chan said: B. If no, Why AM57xx has no this kind of APP note? Please follow below documentation to program on AM57x. + +This kind of user guide cannot be easily to let customer faster get into the TIDL. Also, if you compare the TDA2 DL document, it's more clear than the AM5 User guide. At least, the TDA2 document is more specific to clearly all the steps that AM5 user guide not do so. + +Hi Manisha: If you read the TDAx2 documentation, you will find this kind of chapter: in this section: Building Sample Test Application it will tell us those useful information: DSP Code Generation Tool version 7.4.2 EVE/ARP32 Code Generation Tool version 1.0.7 XDAIS version 7.22.00.03 DMA utility Library Version 00.08.00.00 MATH LIB for C66x version 3_1_0_0 But, in the AM57 user guide, there is no such clear instruction we can follow up. With this kind of situation, how do we educate our customers? Please specify. Thanks. BR Rio + +Hi Rio, The TIDL on vision SDK is different than on Sitara Processor SDK Linux. On Sitara processor side, TIDL library is a black box. The source code on DSP or EVE side is not opened, and hence they do not need to learn about the tool chain, compiler information etc. On Sitara Processor SDK Linux, TIDL library is accessed using TIDL API (underneath uses OpenCL to offload the acceleration on DSP/EVE) and runs on host A15 side. Hope that clarifies. If you have any other concern with current document, I will be happy to learn that and feedback to my team to improve the document. Regards, Manisha + +Hi Manisha: I have read the entire TIDL several times. I have some questions, Please see the posted picture. A. There is the TIDL Import tool I can download? ( I ever sent you an email, but got no reply yet.) B. What's the OpenCV / OpenCL version that we support? C. Regarding the grey part " ML application", what's the example of it? Where we can find it? D. Component off " TIDL SW stack", what is this? I'm preparing a Training slide to our customers, and I need to have 2~3 working examples (beside the TI DL demos) runs from steps by steps clearly. Do we have a training slide for letting customers feel better than just to see a DL demo? BR Rio + diff --git a/data2/text/range/0-5000/804755.txt b/data2/text/range/0-5000/804755.txt new file mode 100644 index 0000000000000000000000000000000000000000..248a063c3616c7603ea7307462b2dadc22c79edb --- /dev/null +++ b/data2/text/range/0-5000/804755.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2SX: u-boot & kernel device tree porting + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TPS65090 Tool/software: Linux Dear TI, I am now trying to porting linux to my custom board and stucking in device tree porting. Please help me with these questions. uboot device tree: question 1: Is it nessary to use devicetree in uboot? If not, how the periferals drivers be registered? question 2: Which stage is the compiled dtb file being used in？(sbl, uboot) question 3: I have tda2x evm at hand for now. I found it so hard to get my own dts file modify from dra7x-evm-vision.dts file. Because there are so many devices , which are defined in the dtsi files, but not present on my board. So which dts file should i reference to start my own dts file? kernel device tree: question 4: Are there any rules to organize the dtsi and dts files? i.e. Which devices should be placed in dtsi file? Regards, Liu Gan + +Responses: +Hi Liu, Which version of Linux / U-boot are you using? 1. Yes, DTBs need to be ported on both u-boot and kernel. 2. The DTB file is used in the second stage boot loader (u-boot) 3. Please use dra7-evm.dts as the reference device-tree. This device-tree is written for the base EVM board. 4. dtsi files should have all the devices listed. DTS files includes dtsi files and modifies attributes for the devices defined in dtsi. Regards Shravan + +Hi Shravan Thanks for your reply. I am working with TI VSDK v3.6 and the corresponding kernel/u-boot release tags. Do i need to disable the devices descripted in the included dtsi files, but are not uesed in my custom board if i take dra7-evm.dts as reference? dts snippet from dra7-evm.dts: What are these two nodes used for? What's more i can not find the min/max-microvolt definded here in the data manual of tps65903x. So i cannot decide how to modify or delete these nodes. Does TI have any released or traning docs/videos about the dts file ? Regards, Liu Gan + +Hi Liu, It is recommended you add the status = "disabled" attribute in the final dts file for devices you aren't using. For example if you're not using uart2, please add the below in your kernel device-tree &uart2 { status = "disabled"; }; The snippet in the above post lists the voltage regulators for MMC/SD card which is adjusted depending on the mode at which the sd card operates. If you're using the tps65903x PMIC, please refer to Documentation/devicetree/bindings/regulator/tps65090.txt for the device tree bindings. Regards Shravan + diff --git a/data2/text/range/0-5000/805840.txt b/data2/text/range/0-5000/805840.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d02e8f4091949503ce3681cdb9f19e9fe1623ae --- /dev/null +++ b/data2/text/range/0-5000/805840.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2EXEVM: bios pdk + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: SYSCONFIG Tool/software: TI-RTOS hello, i have a same issue in tda2ex, details below: after runing into system, i check the gpio2 reg CM_L4PER_GPIO2_CLKCTRL = 0x00020001 GPIO_SYSCONFIG = 0x1d after i reset gpio2 by set GPIO_SYSCONFIG = 0x1f the GPIO_SYSSTATUS can't Reset completed , the value is always 0x0 the question i want ask is that : why i can't reset gpio2 again but , when i set CM_L4PER_GPIO2_CLKCTRL [8] = 1, it reset ok. can you give me some help? + +Responses: +Hi, When CM_L4PER_GPIO2_CLKCTRL = 0x00020001, GPIO is in idle state. Hence you are not able to reset the GPIO. You need to make sure that GPIO2 is fully functional i.e. CM_L4PER_GPIO2_CLKCTRL =0x00000001. Regards, Rishabh + diff --git a/data2/text/range/0-5000/807726.txt b/data2/text/range/0-5000/807726.txt new file mode 100644 index 0000000000000000000000000000000000000000..e66f04a90756c1a0467e5b51e10e8c6f509a7ad2 --- /dev/null +++ b/data2/text/range/0-5000/807726.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2EVM5777: Cannot see any output of semantic segmentation, trained based on the Caffe-Jacinto's Jsegnet + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, After successful training and testing on the PC till the sparsification stage, I used the import tool to to generate the net and prm files of jsegnet. Converted the video as well which is also based on my previous experience of testing the demo version. However, when I run these files on the tda2, all I can see is the static output frame of my video which isn't moving at all. I didn't see any error while importation and execution, so I assume that there is no problem in the network. I used the semseg usecase with default settings to run my trained model and input video, however, my model is trained on two classes rather than four as I have only two objects. Things I noticed while execution: Cannot allocate the object for sync1,2,3 and algorithm 0,1,2,3,...7. Other than this, I cannot find any possible error. Another thing is that when I pause and resume my video it runs for that particular interval without any segmentation result otherwise it is stuck. Here is the log file.2330.log.txt. Kindly respond me as soon as possible. Thank you. With best regards, H.M. Owais + +Responses: +Hi, Please refer to below two e2e threads for training and running custom data set using semantic segmentation use case e2e.ti.com/.../660676 e2e.ti.com/.../794965 Thanks, Praveen + +Hi Praveen, Thank you for your reply, however, I have already seen these threads and couldn't find any relevant solution after searching a lot on e2e threads. I am dealing with different problem. I can try to explain it again. 1. I have done successful training with my own dataset (not using cityscape). My dataset has only two objects which need pixel-wise classification. 2. I used caffe-jacinto to train and tested on the PC successfully. My test dataset shows output successfully on the PC. 3. I converted the sparsed model using the import tool and generated BIN files for parameter and network. The import tool showed successful importation and generation of files. 4. I have also converted the test video as per the given instructions. My test video works well with other models. 5. I am using the same usecase, semSeg given in the demo codes with all default settings to display the results. This is what I have done so far. Now here are my questions, 1. Why I can't see the output of my two objects? it just shows me the test video frame, nothing else. 2. Where I can find the network output in the tidl_algplugin.c? can you precisely tell me the function to display it?\ 3. I have also attached the log file in the above question, can you have a look at it and tell me where the problem is ? 4.. If there is any helpful document which contains all the information about tidl_algplugin.c. Kindly share it with me as well. Thank you. With best regards, H.M. Owais + +Hi, From the log it seems sync link is dropping frame. Can you increase SYNC_THRESHOLD to 3000 is your semseg usecase. Regards, Anuj + +Hi, Its been long since any update on this. I hope the issue is resolved, if not then please reply below or create anew thread for different issue. Regards, Anuj + +Hi Anuj, Sorry for being late in replying the answer. The issue was with the input inData file. I resolved it back then. Thank you for your response. With best regards, H.M. Owais + +Hi, You can mark any answer as it resolved your thread and close it. Regards, Anuj + diff --git a/data2/text/range/0-5000/809598.txt b/data2/text/range/0-5000/809598.txt new file mode 100644 index 0000000000000000000000000000000000000000..f611cb7457148eb4fa5d296dd7e43ccc7aa09696 --- /dev/null +++ b/data2/text/range/0-5000/809598.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/AM5728: Video encode by IVA + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2, Tool/software: TI-RTOS hi, AM5728 and TDA2 have a IVA accelerator to encode video, in TDA2 rtos sdk i finde out rtos based program for video encoding is it possible to use that for am5728 ?? because for am5728 ti support IVA just for Linux ?! + +Responses: +Hi, Sorry the AM57x RTOS driver only support VIP and DSS, not IVA. There is not plan for this. Regards, Eric + diff --git a/data2/text/range/0-5000/809599.txt b/data2/text/range/0-5000/809599.txt new file mode 100644 index 0000000000000000000000000000000000000000..cbeff4002742279712a14ac5672966a7d859e7e0 --- /dev/null +++ b/data2/text/range/0-5000/809599.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2P-ACD: Video encode by IVA + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2, AM5728 Tool/software: TI-RTOS hi, AM5728 and TDA2 have a IVA accelerator to encode video, in TDA2 rtos sdk i finde out rtos based program for video encoding is it possible to use that for am5728 ?? because for am5728 TI support IVA just for Linux ?! + +Responses: +Hello, This thread is duplicated with this one: https://e2e.ti.com/support/processors/f/791/t/809598 Please do not open multiple threads for the same question. I am closing this one. Best Regards, Margarita + diff --git a/data2/text/range/0-5000/810019.txt b/data2/text/range/0-5000/810019.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2d5ddca958741b27e2891a1315183893e9f9507 --- /dev/null +++ b/data2/text/range/0-5000/810019.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2SX: How to control gpio in linux? + +Query Text: +Part Number: TDA2SX Tool/software: Linux Hi, We use gpio7_27 to enable the CAN interface in hardware, so before using the CAN interface, we need to set the GPIO7_27 pin to low level. How do I use gpio in Linux? I am using the hardware TDA2SX, using the VSDK version of 03-06-00-00. Regards Kepei + +Responses: +Hi, You can use the GPIO hog device tree entry so that the GPIO line is driven low. Refer to Linux kernel documentation on GPIO-hog https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt NIKHIL d + +Hi NIKHIL, Thank you for you reply! So i can used this code to set the gpio to 0? gpio_enable <&gpio7 27 GPIO_ACTIVE_HIGH> Regards Kepei + +Hi NIKHIL I have tried this code in dcan node. gpio_enable <&gpio7 27 GPIO_ACTIVE_HIGH> but it is not work and i tried this code in gpio7 node line_b { gpio-hog; gpios = <27 0>; output-low line-name = "dcan-standby"; }; It is not work too. The out put of gpio7_27 is high. + +You should be getting compiler error since you are missing a ; after output-low Maybe the DTB is not updated and that's why no effect. Otherwise, the code change is almost correct Nikhil D + diff --git a/data2/text/range/0-5000/810155.txt b/data2/text/range/0-5000/810155.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c576aa50ce3d501b3525595080bf45ae3e01425 --- /dev/null +++ b/data2/text/range/0-5000/810155.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: How much the performance varies in tda2 as compared to PC + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I have recently implemented the semantic segmentation using Caffe-Jacinto's Jsegnet on PC and TDA2 successfully with my own dataset which require two objects for pixel classification. However, the results I have got on PC are pretty much better than the results I got on tda2. Can you guys tell me why the performance has gone so lower on tda2, I believe it shouldn't be that worse. Thank you. With best regards, H.M. Owais + +Responses: +Hi , Yes, you are correct, it shouldn't be worse. Please refer to TIDL datasheet where we provided the performance of most of the semantic segmentation layers on EVE and DSP cores for checking the performance. Thanks, Praveen + diff --git a/data2/text/range/0-5000/810169.txt b/data2/text/range/0-5000/810169.txt new file mode 100644 index 0000000000000000000000000000000000000000..e13f84039fa5418520e14ead5b7e109a0628f81d --- /dev/null +++ b/data2/text/range/0-5000/810169.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EXEVM: Support for LSTM and RNN to enable Speech Recognition usingTIDL + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi Kumar, We have TD2X EVM board. And till now we were working on vision side and we understood how one can use any existing Deep Learning model for object detection like face detection, car detection etc using TIDL. Now, I would like to know that if i want to add ASR (Automatic Speech Recognition) on TDA2X .What should be the approach? I understand that TIDL should support LSTM, RNN layer. Because, these layers are at core of NLP and speech recognition. Somewhere in documentation, I read that support for these layers is future scope (http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_TIDL.html) 1. Can you comment on the support for LSTM and RNN in TIDL ? 2. Is there any other existing approach of speech recognition which we can use on TDA2X ? 3. Any examples or demos available ? 4. Can you suggest any speech recognition approach other that ML or DL, for quick prototyping on TDA2X ? Regards, Sagar + +Responses: +Hi Sagar, 1. As of now, we don't have any plans for supporting LSTM and RNN in TIDL on TDA2. 2. No, we don’t have solution using TIDL. 3. No, we don't have any demos. 4. User can use tensorflow Lite or ARM NN in the Linux running on A15 Thanks, Praveen + diff --git a/data2/text/range/0-5000/810307.txt b/data2/text/range/0-5000/810307.txt new file mode 100644 index 0000000000000000000000000000000000000000..e1dc252c80b1ce4a3d1181a866b4de594f276de2 --- /dev/null +++ b/data2/text/range/0-5000/810307.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux: The performance of TIDL OD usecase are different when using different input video. + +Query Text: +Tool/software: Linux Hi, I'm testing TIDL OD usecase in linux. The format of chain is same with TIDL OD in BIOS except for TIDL Preprocessing. (It is running on DSP) The problem is the performance of that converted usecase is different each time when i use another video. The below video is normal case. And this is abnormal case. The usecase is running but all frames are dropped after showing some initial frames. And this is normal case that uses same video with upper case. I don't know why the results are different even though the input video was same. Could you suggest any cause of this problem or solution? Thanks & Regards, Yoo + +Responses: +Hi, Can you try to run preproc link on ipu and check. And lower the FPS also. Regards, Anuj + +Hi, Actually, we already tried on IPU. (in Vision SDK 3.6ver). However, the FPS was too low (about 1.2FPS in display link). We would try to that using Vision SDK 3.7ver and will update the result in this thread. If you have any other solution or reason of this problem, please tell me. BTW, there is frame reversing problem, is that caused by Sync link? Thanks & Regards, Yoo + +Hi, I tried to run preproc link on IPU in Vision_sdk 3.7ver. The boxes are drawed normally but FPS was 1~2FPS. When i run preproc link on DSP (also Vision_sdk 3.7ver), At least once every 10 times, the result is as strange as the video above. Could you please suggest any reason or solution about this prob? Thanks & Regards, Yoo + +Hi, So when you use preproc link on IPU then it works fine but on DSP its not working. Have you tried the same running on DSP with lower FPS. It will be better if you can share logs. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create anew thread for different query. Regards, Anuj + diff --git a/data2/text/range/0-5000/810744.txt b/data2/text/range/0-5000/810744.txt new file mode 100644 index 0000000000000000000000000000000000000000..1eca4cfd7600e7469bca11852be3351ca7e2c135 --- /dev/null +++ b/data2/text/range/0-5000/810744.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: Please tell me the reason why bboxPtr in ObjectDrawLink is calculated using this way. + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI-RTOS Hi, I'm doing analyze the src code of Object Draw link to know what is the buffer format of result after TIOP. In objectDrawLink_algPlugin.c file, I couldn't unserstand `bboxPtr = (float *)((char *)metaDataAddr + (bufferOffset*4)+4);` (Line 1484). Could you please tell me why bboxPtr is obtained as that way? Best Regards, Yoo + +Responses: +Hi, Its done in this way as TIDL algorithm does some padding and the actual data starts from that address. Regards, Anuj + +Hi, Anuj. If so, is there a way to know what data is in the (bufferOffset * 4) +4 space at the beginning of the metadata, including padding? I think it's too big to have only padding data in that space. Thank you & Regards, Yoo + +Hi, It should be all 0 except the 1st 4 bytes where we set offset. This padding comes from TIDL algorithm only so its been done like this in SDK. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create anew thread for different query. Regards, Anuj + diff --git a/data2/text/range/0-5000/811059.txt b/data2/text/range/0-5000/811059.txt new file mode 100644 index 0000000000000000000000000000000000000000..129efe9c44a32f3d846ace0ce44d273cdc781385 --- /dev/null +++ b/data2/text/range/0-5000/811059.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2EX17EVM: Tiler Memory in OMAPDRM + +Query Text: +Part Number: TDA2EX17EVM Tool/software: Linux Hello Sirs: We are using PSDK VISION 03_04_00_00, I saw that the tiler memory is implemented in omapdrm. I know that The VSDK uses vdrm rather than omapdrm, in your opnion, Is it possible to use it in VSDK? Regards, /ckhsu + +Responses: +It is possible to support tiler memory in VDRM, but TI does not have any plans to enable it now or in the future - Subhajit + +Dear Subhajit: How we can modify the VDRM to let it support tiler memory? Regards, /ckhsu + +please look at how omapdrm uses it. you can replicate the operations to get it working with vdrm. Once again, TI does not have any plans to support TILER memory from VDRM. I can say that it is doable, but I have not explored how much effort is required to accomplish this. I am closing this ticket now + diff --git a/data2/text/range/0-5000/811105.txt b/data2/text/range/0-5000/811105.txt new file mode 100644 index 0000000000000000000000000000000000000000..d92cb46f1fd47ceb4d66ffda33646a86c37492cd --- /dev/null +++ b/data2/text/range/0-5000/811105.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2EVM5777: About Display link in TIDL SemSeg Usecase + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI-RTOS Hi, I have a question about Display link in TIDL Semantic Segmentation Usecase. I saw the result of Alg_tidlpostproc in TIDL SemSeg usecase is YUV420_SP color map that is indicating each pixel of that map is contained some classes (None, Ped, Vehicle, ...). After processed in Merge/Sync link, the result of Alg_tidlpostproc is in Metadata and original input video frame is in Video Buf. So, the previous link (Alg_tidlpostproc_cpy) of Display link has the buffer that contains video frame and metadata(which is the result SemSeg Network). I refered FVID2 document and it is saying the FVID2 frame has 2 fields like bellow image. Then, in SemSeg usecase, the first field of FVID2 frame is for video frame and second field of FVID2 frame is for metadata? Could you please confirm that i understood correctly? + +Responses: +Hi, yes your understanding is correct but not completely. For field 1 having video buf the representation is same as attached picture but not for metadata buffer. Regards, Anuj + +Hi, Thanks for answering. I checked the sync link in TIDL SemSeg usecase adding the log. The all of log message was saying the input buffer is Video Frame data. I think the result of Alg_tidlpostproc link is video frame that is indicating each pixel is belonged to some class by using different color for different class. If this is correct, i'm curious that how the result of Alg_tidlpostproc is overlaped onto each original video frame. Regards, Yoo + +Hi, Yes the output of tidl_postproc is video frame. In semseg usecase we use 2 postproc link 1 for creating clut and other for copying it onto original image. Please check below params from usecase pUcObj->Alg_tidlpostprocPrm.outDataFormat = SYSTEM_DF_YUV420SP_UV; pUcObj->Alg_tidlpostprocPrm.outWidth = SEMSEG_INPUT_WIDTH; pUcObj->Alg_tidlpostprocPrm.outHeight = SEMSEG_INPUT_HEIGHT; pUcObj->Alg_tidlpostprocPrm.colPalette565 = pObj->colPalette; pUcObj->Alg_tidlpostprocPrm.inPad = TIDL_MAX_PAD_SIZE; pUcObj->Alg_tidlpostprocPrm.numInputQueues = NUM_PIPELINES; pUcObj->Alg_tidlpostprocPrm.mode = TIDLPOSTPROC_MODE_CLUT;; /* Y and UV copy */ pUcObj->Alg_tidlpostproc_cpyPrm.outDataFormat = SYSTEM_DF_YUV420SP_UV; pUcObj->Alg_tidlpostproc_cpyPrm.outWidth = SEMSEG_INPUT_WIDTH; pUcObj->Alg_tidlpostproc_cpyPrm.outHeight = SEMSEG_INPUT_HEIGHT; pUcObj->Alg_tidlpostproc_cpyPrm.numInputQueues = 1; pUcObj->Alg_tidlpostproc_cpyPrm.mode = TIDLPOSTPROC_MODE_COPY; Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create anew thread for different query. Regards, Anuj + diff --git a/data2/text/range/0-5000/811470.txt b/data2/text/range/0-5000/811470.txt new file mode 100644 index 0000000000000000000000000000000000000000..ac4b67e68464fc04122e33db2af8a5243aa65ea6 --- /dev/null +++ b/data2/text/range/0-5000/811470.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2-17: VSDK_03_06_00_00:enbale custom LCD + +Query Text: +Part Number: TDA2-17 Tool/software: TI-RTOS I want to use a new LCD with FDPLINK to get vedio signals.The resolution of the custom LCD is 1280*720. In this SDK, I found that there are two resolution for LCD output directly. 800*400 and 1280*800. And there is a resolution for FPD output.1280*720. This resolution is what I need.But another TI employee told me that this SDK does not support FPD output format. Now, I have already set the FPDLINK and parameters related to displayctrl. I tried two output configurations 1.use the FPD directly in the SDK. 2.use LCD ouput and change the resolution to 1280*720. Both methods don’t seem to work.Am I missing some settings? + +Responses: +Hi, Have you tried change the Video Port's configuration to 720p? Regards, Rishabh + +I want to achieve single channel output.I have changed the video outport in the ChainsCommon_StartDisplayCtrl funtion of chains_common.c + +Hi, Can you share the changes you have made. Also are you able to turn the backlight to ON state for FPD display? If you are not able to see the back light then there is some issue with the FPD driver and we don't have support for the same in SDK. You need to use linux for FPD driver. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/811497.txt b/data2/text/range/0-5000/811497.txt new file mode 100644 index 0000000000000000000000000000000000000000..220e0c8b89f47507758e6e7208d624feeba02e81 --- /dev/null +++ b/data2/text/range/0-5000/811497.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS: TDA2 RTOS bmp array heapmem + +Query Text: +Tool/software: TI-RTOS Hello, We want to create a array for bmp of RGB888, and convert it to RGB565. When creating a array [1024 * 720 *3] and compile, we will get some error. We guess they are because of HeapMem, or overflowed ...etc But we can successfully compile when we create a array [640 * 480 * 3] Q1：Can we create a array [1024*720*3], and we can successfully compile ? Q2：where could we get information of heapmem setting from code or document ? Thank, Ting + +Responses: +Hi Ting, How are you allocating the array. Are you specifying some section or allocating from stack? What is the build configuration you are using? Regards, Rishabh + +Hi Rishabh Thanks for your reply. I create a array and give it value, like "static const unsigned char bmp_test[] = { 117,104,85,69,56,37,30,19,2,73,......}" Counts of value are size of array, and now it is 1024*720*3. I have find some memory setting for A15, IPU...... But I don't know how to match my array Thank, Ting + +Hi Ting, It seems that you are allocating buffer from stack, you need to allocate from UTILS_HEAPID_DDR_CACHED_SR. You can grep the same in Vision SDK to see how to use it. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi Rishabh Thanks for your reply. Sorry, I have another thing to do, but I will grep "UTILS_HEAPID_DDR_CACHED_SR". Before I try that, maybe I can end this problem. When I get a new problem, I will ask a new question. Thanks, Ting + +Hi Ting, Thanks. I am closing the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/811499.txt b/data2/text/range/0-5000/811499.txt new file mode 100644 index 0000000000000000000000000000000000000000..5167b119cedd84c20138e7ad3b16ffa31cd4c3fa --- /dev/null +++ b/data2/text/range/0-5000/811499.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS: TDA2 string font setting + +Query Text: +Tool/software: TI-RTOS Hello, We want to create a string font for Chinese. We trace code from draw2d_fontxx.c, and get some information, like width, height, num. They have created a array, and put value of 2 bytes each of col and row. Q1：What's the Font_CharNum mean ? Q2：How does it choose value to draw pixel of 'A' or another ? Q3：Can we create a array for new font ? Q4：Can we create a array for Chinese word to draw ? Thank, Ting + +Responses: +Hi Yes, you can create a new array for new fonts, and this can be Chinese letters too. Just follow the code of any existing font array to do the same regards, Shiju + +Hi Shiju Thanks for your reply. if I have chinese letters, I can follow the code to do. before that, We have to find truetype to bmp of chinese letters. Q：Do you have advices for truetype to bmp, or someone do that once ? Thanks, Ting + +Hi Ting Sorry, I do not have any utility to convert truetype to bmp. Please check on internet. regards, Shiju + diff --git a/data2/text/range/0-5000/811776.txt b/data2/text/range/0-5000/811776.txt new file mode 100644 index 0000000000000000000000000000000000000000..b9a4c6c4088c370d47f44329db4d11d4e8703873 --- /dev/null +++ b/data2/text/range/0-5000/811776.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PSX-ACD: Functional Safety FMEDA + +Query Text: +Part Number: TDA2PSX-ACD We use the above mentioned part for our system. We had performed a FMEDA for our product and need to look more closely to the TDA2PSX-ACD. - Could you provide detail data for failure rate calculation? - Do you have an allocation of areas used for different sub-modules? - When switching to the device TDA2PHG-ACD is there anything we have to take into account from functional safety point of view? Thank you for your support. Best regards Viktor Tiederle + +Responses: +Hi Viktor, You would need to get in touch with your TI representative to understand the Failure Calculation using the FMEDA sheet. - When switching to the device TDA2PHG-ACD is there anything we have to take into account from functional safety point of view? This is little vague, do you have some specific device feature you have used in the past and curious if TDA2px supports this or not. Thanks and Regards, Piyali + +Hi Piyali, sorry for late answering. I was quite busy. First of all I need some understanding of the FMEDA calculation of the device. In our internal documentation, we have some files, e.g. J6Entry_FMEDA_r1.xlsm All of the information is password protected. Is it possible to discuss some question with you? The change of device is due to long lead time. yes, the question, what to do is vague, but the first product is highlighting the ADAS application, and the other not. This seems for me that anything could be different, that is to be taken into account with respect to functional safety. If not - that would be great. Hopefully now it is more clear for you. Best regards Viktor + +Hi Viktor, If you are moving from TDA2PSX-ACD. to TDA2PHG-ACD, there is really no change as they belong to the same family of devices. They would share the same FMEDA. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/812662.txt b/data2/text/range/0-5000/812662.txt new file mode 100644 index 0000000000000000000000000000000000000000..d03af1c794c99ba89fb3d3686a312f370fdabc48 --- /dev/null +++ b/data2/text/range/0-5000/812662.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: Whether we can provided those pin's resistor and capacitor value. + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Experts: Our customer want use Automatic test machine probe SMT TDA2x board's build failure or not. They did not provide power supply to TDA2Sx IC. just probe below pins resistor or capacitor to those power rail's Power supply or GND. Does we have those pin's resistor/capacitor value at no power supply mode? At datasheet i did not found it. Best Regards! Han TaoSoC_parameter.xlsx + +Responses: +Hi Tao Han, I'm sorry, it was a little bit difficult for me to understand your question. Can you please give one example with exact resistor/capactor and a power rail of TDA2.? Some diagram or sketch will be helpful too. Regards, Stan + +Hi Stan: Like below picture. For example. item 1: pin AA3 connect to multi-meter + and reference test point VDDSHV 1.8V power supply connect to multi-meter -. test the resistor. item 10: pin Y18 connect to + and GND connect to - test the capacitor. Customer want to know the resistor and capacitor value to verify the PCB SMT quality. Best Regards! Han Tao + +Hi, I didn't notice your attached file last time. Do you mean you want to test your boards for continuity when only SoC was mounted? There will be some resistivity and capacitance on those pins, but if also other componets are mounted (relative to those pins), then measurments will not make much sense. Also, I don't think these parameters were characterized, nor they are repeatable between two SoCs. Also, measuring resistivity and capacitance with power off, could cause damage to the SoC (depends on the measuring machine and method). Perhaps, measuring voltages on a powered board would be much safer and beneficial. This is my personal opinion, I might be missing something. Regards, Stan + +Hi Stan， We will do ICT(In-Circuit-Test) after SMT. The results will be affected by the internal resistance and capacitance of SOC. If we know the range of resistors and capacitors, we can calculate the range of ICT results. Thanks! + +Hi Stan: Thanks for your suggest. You are right customer want to test those pin's resistor or capacitor value when SOC mount at PCB. Will follow your suggest that SOC do not contain those no power supply mode pin to GND/VDDSHVx resistor and capacitor character values. Best Regards! Han Tao + diff --git a/data2/text/range/0-5000/813027.txt b/data2/text/range/0-5000/813027.txt new file mode 100644 index 0000000000000000000000000000000000000000..e826a70cf47b11a671a2aee0dbae9dd3060b94b0 --- /dev/null +++ b/data2/text/range/0-5000/813027.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA3XEVM: Building eve_test_dl_algo.out for X86 platform on UBUNTU 16.04LTS + +Query Text: +Part Number: TDA3XEVM Tool/software: Linux Hello, My question refers to visionSDK tools on linux UBUNTO 16.04. We are trying to import different Caffe networks using tidl_model_import.out tool. idl_model_import.out was successfully built by us and we manage to debug this tool, but it seems that eve_test_dl_algo.out is opaque. I managed to build eve_test_dl_algo.out for eve - based on the pdf. There exists an eve_test_dl_algo.out .exe utility, which I managed to run through wine, and with that - the imported CNN network for TI works. However, the problem is that I want to build eve_test_dl_algo.out for X86 UBUNTU16.04 platform - a version that does not need wine, and that we can debug. We need to research the operation of this tool. 1-Is it possible to build and debug this tool? If so, where are the instructions? 2-Where can I find documentation regarding the functionality of this tool? Thanks you + +Responses: +Hi, You can find the build steps in section 3.6.3 ( Building TIDL reference executable ) in the TIDL user guide. But you need source code access to build this. Thanks, Praveen + +Praveen, Thank you for your prompt response. I found this section in the pdf file - based on the reference provided by you. It seems that I followed the steps in this section - with some modifications: gmake TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve RUN_REF_FOR_STATS=1 all ARP32_TOOLS=/home/yoav/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/cg_tools/linux/arp32_1.0.7 XDAIS_PATH=/home/yoav/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/codecs/framework_components_3_40_02_07/fctools DMAUTILS_PATH=/home/yoav/PROCESSOR_SDK_VISION_03_06_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils, But got this: /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) /usr/bin/ld: ../../ti_dl/lib/eve/release/tidl_algo.lib(tidl_alg.obj): Relocations in generic ELF (EM: 143) So, it seems that something with my installation is missing or wrong. PROCESSOR_SDK_VISION_03_06_00_00_setuplinux.bin This is the visionSDK. Should I use some other repository or installation tool? Thanks, Yoav + +Hi Yoav, As mentioned in the section 3.6.3. "The tidlStatsTool can be built using the TIDL source code". Do you have access to TIDL source code? Thanks, Praveen + +Thank you Praveen, It seems that the code I have is not enough. Installing VisionSDK using PROCESSOR_SDK_VISION_03_06_00_00_setuplinux.bin - provides me with partial code base. I can create and modify algorithms and algorithm aids (for TIDL as well), build tests and build my version of AppImage. But, I can't build the utils. Trying to use BitBake to fully installed the sdk - failed because of problems with some recipes. With git://git.ti.com/tidl/tisl-utils.git - I managed to build the import tool - but I'm not sure that it is an official repository. What should we do in order to get access to the full code? Again, thank you for your prompt reply. Yoav + +Hi Yoav, You may have to contact your local TI FAE to get access to full code. Thanks, Praveen + +Thank you for your help Praveen. We will leave this issue in the meantime. + diff --git a/data2/text/range/0-5000/813624.txt b/data2/text/range/0-5000/813624.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d710d1c8237c9e187631e9b4559b219574e3829 --- /dev/null +++ b/data2/text/range/0-5000/813624.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS: TDA2 Host Emulation Build for Source Package Build error + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello, I follow "Ti Deep learning Library User Guide April 2018" to build source in host emulation. in path：C:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.00\modules\ti_dl step1 "E:\Program Files (x86)\Microsoft Visual Studio 11.0\VC\vcvarsall.bat" step2 gmake CORE=eve TARGET_BUILD=debug TARGET_PLAT=PC all then, I got error C:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.0 0\modules\ti_dl>gmake CORE=eve TARGET_BUILD=debug TARGET_PLAT=PC all . ======== tidl ALGO ================= gmake -C ./algo -f makefile gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_01_00_00/ti_components/ algorithms/REL.TIDL.00.08.00.00/modules/ti_dl/algo' /PROCESSOR_SDK_VISION_03_01_00_00/ti_components/algorithms/REL.TIDL.00.08.00.00/ makerules/rules.mk:383: *** multiple target patterns. Stop. gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_01_00_00/ti_components/a lgorithms/REL.TIDL.00.08.00.00/modules/ti_dl/algo' gmake: *** [all] Error 2 rules.mk:383: dir: $(OBJDIRS) How could I solve the error ? Thanks, Ting + +Responses: +Hello, More question Q1：Is "Ti Deep learning Library User Guide " for TDA2 RTOS or Linux ? Q2：Is Vision_SDK tidl for TDA2 RTOS or Linux ? Q3：Is tidl for RTOS and Linux ? I just build for getting net.bin and param.bin, and files for two systems to use ? Thanks, Ting + +Hi Ting, There is latest TIDL release available, please download it from VSDK from http://www.ti.com/tool/PROCESSOR-SDK-TDAX Regarding build source in host emulation, for this you need access to source release of TIDL which is not part of VSDK. You may have to contact your local TI FAE to get access to it. You do not need source release of TIDL to import your models and get net.bin and param.bin files, for this refer to section "3.6 Running a Model trained by user" in the "TI Deep learning Library User Guide". This Vision_SDK tidl is for TDA2 RTOS only. Thanks, Praveen + +Hi Praveen Thanks for your reply. I think I don't ask clearly, so I follow your reply and confirm that. Downloading the Vision_SDK, I can get the "usecases\tidl_OD" and "REL.TIDL.01.01.03.00", then first is for RTOS to recognize object and the other is for generate net.bin and param.bin Q1："Is C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\apps\src\rtos\usecases\tidl_OD" for RTOS ? Q2："Is "C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl" not build source release of TIDL? is it for Linux or RTOS ? We think it is just for generate net.bin and param.bin, we don't care about it is for linux or RTOS, right ? Q3：If we want to build linux for TDA2 and run tidl, do you have some advices or documents, or I should create a new issue for this question ? Thank, Ting + +Q1："Is C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\apps\src\rtos\usecases\tidl_OD" for RTOS ? Answer : Yes Q2："Is "C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl" not build source release of TIDL? Answer : Yes is it for Linux or RTOS ? We think it is just for generate net.bin and param.bin, we don't care about it is for linux or RTOS, right ? Answer : Yes Q3：If we want to build linux for TDA2 and run tidl, do you have some advices or documents, or I should create a new issue for this question ? Answer : You can refer to this thread https://e2e.ti.com/support/processors/f/791/t/777773 Thanks, Praveen + +Hi Praveen Thanks for your reply. Q1：About answer of Q3, Is it for rebuild DL model, like ".caffemodel", and convert to tidl for RTOS or Linux ? Q2：About answer of Q3, Is it for linux(make), I think it could also run from windows(gmake) ? is it anything different ? Q3：in RTOS, we can run "usecases/tidl/" to demo result of ObjectDetection, is any project for linux to demo result on TDA2 ? Thank, Ting + +Hi Ting, Regarding the answer of Q3, those steps are to build only import tool in the Linux. We do not have any references to run demo in Linux. Thanks, Praveen + +Hi Praveen Thanks for your reply. Thank, Ting + diff --git a/data2/text/range/0-5000/813807.txt b/data2/text/range/0-5000/813807.txt new file mode 100644 index 0000000000000000000000000000000000000000..26e46bb579ee845b25a31daa22d11a0d1ceddcb4 --- /dev/null +++ b/data2/text/range/0-5000/813807.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2SX: RadarSDK Usecase modifying to use other cores + +Query Text: +Part Number: TDA2SX Hi Experts, I am trying to figure out the processing flow of usecase below "radar_read_objectdetect_write" in Processor-SDK-Radar 3.6. I assume that each Alg_RadarProcess_fft / Alg_RadarProcess_pkDetects / Alg_RadarProcess_BeamForms uses WorkQ mechanism and all the 3 Work Threads run on EVE. Q1) How should I find out if the Alg_RadarProcess_xx uses WorkQ mechanism or not ? Do we need to check source code directly ? Q2) When we need to change the Host Thread of those to IPU1_0, is it possible ? (case-1) Q3) If Q2 can be done, is it possible to change the part of Work Thread to DSP1 ? (case-2) original: NullSource Alg_RadarProcess_fft (A15) -->[WorkQ]--> fft (EVE1) Alg_RadarProcess_pkDetect -->[WorkQ]--> peak_detect (EVE1) Alg_RadarProcess_beamForm (DSP1) -->[WorkQ]--> beam_forming (EVE1) Dup_0 (DSP1) Null case-1: NullSource Alg_RadarProcess_fft (IPU1_0) -->[WorkQ]--> fft (EVE1) Alg_RadarProcess_pkDetect (IPU1_0) -->[WorkQ]--> peak_detect (EVE1) Alg_RadarProcess_beamForm (IPU1_0) -->[WorkQ]--> beam_forming (EVE1) Dup_0 (IPU1_0) Null case-2: NullSource Alg_RadarProcess_fft (IPU1_0) -->[WorkQ]--> fft (EVE1) Alg_RadarProcess_pkDetect (IPU1_0) -->[WorkQ]--> peak_detect (DSP1) Alg_RadarProcess_beamForm (IPU1_0) -->[WorkQ]--> beam_forming (DSP1) Dup_0 (IPU1_0) Null Best regards, Saito + +Responses: +Hi, Q1) How should I find out if the Alg_RadarProcess_xx uses WorkQ mechanism or not ? Do we need to check source code directly ? Source code is available with SDK, you can find it in below location vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns Q2) When we need to change the Host Thread of those to IPU1_0, is it possible ? (case-1) In the above path for each link you will find SRC_FILES.MK file. Inside that you can check for which all core you can run this. Q3) If Q2 can be done, is it possible to change the part of Work Thread to DSP1 ? (case-2) This will not be possible. Regards, Anuj + +Hi Anuj, Thanks for the prompt rely. > Q3) If Q2 can be done, is it possible to change the part of Work Thread to DSP1 ? (case-2) > > This will not be possible. Why is the case-2 not possible ? Because peak_detect & beam_forming for DSP is not availabe or any other reason ? So let me ask further questions to clarify. Q4) Can we add frameCopy to IPU1_0 (Host thread) and to EVE1 (Work thread) as below ? (case-3) case-3: NullSource Alg_RadarProcess_fft (IPU1_0) -->[WorkQ]--> fft (EVE1) Alg_RadarProcess_pkDetect (IPU1_0) -->[WorkQ]--> peak_detect (EVE1) Alg_RadarProcess_beamForm (IPU1_0) -->[WorkQ]--> beam_forming (EVE1) Alg_RadarProcess_frameCopy (IPU1_0) -->[WorkQ]--> frame_copy (EVE1) Dup_0 (IPU1_0) Null Q5) In the original data flow for beam forming below, after DSP1 dispatches to EVE Work thread in Alg_RadarProcess_beamform, DSP1 needs to wait until Work thread beam_forming finishes with poling mechanism. Is my understanding correct ? Alg_RadarProcess_beamForm (DSP1) -->[WorkQ]--> beam_forming (EVE1) Best regards, Saito + +Hi, Basically you can not build a part of a link in1 core and other part in other core. Entire link is work as a single module and it should be build for a single core. If you want a part of any link to run on any other core then create a separate link in that core and implement your workQ in that link. Regards, Anuj + +Hi, Its been very long since any update on this thread. I hope the issue is resolved. if not then please reply below or create a new thread for different issue. Regards, Anuj + +Hi, Apologies being long time. I would like to confirm your explanation.. Is the Case-3 possible ? Host threads are moved to IPU1_0 and Alg_RadarProcess_framecopy is just added. framecopy is doing after beamForm. Thanks. Best regards, Saito + +Hi, For case 3 can you tell us which all link you want to run on which cores. Remember Host thread and work thread of a same link can not be in the different core. If you have different link then you can run that on different cores provided that core supports that link requirement. Regards, Anuj + +Hi, Case-3 is similar to chains_radarobjectnull usecase in Radar SDK. (.\vision_sdk\apps\src\rtos\radar\src\usecases\radar_objectdetect_null) The difference from the chains_radarobjectnull usecase above are: - Host thread runs on IPU1_0, instead of DSP. - Alg_RadarProces_frameCopy is inserted after Alg_RadarProcess_beamForm. Best regards, Saito + +Hi, Please follow below userguide. Apologies for the delayed response vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_WorkQ.pdf Regards, Anuj + diff --git a/data2/text/range/0-5000/814297.txt b/data2/text/range/0-5000/814297.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e00b8cb878a29b0a2e6aeddfb833583d6a8240d --- /dev/null +++ b/data2/text/range/0-5000/814297.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2SX: VIP Capture resolution changes in VisionSDK + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: DRA752 Tool/software: Linux Hi. I am using DRA752 CPU on D3 TDA2x setup with OV10635 LVDS Camera. I am new to this, I tried to change the resolution from 1280x720 to 600x400, But I am getting distorted image, unable to capture & display proper image. * I got register settings from OVT for 600x400 (YUV422 & PCLK=24MHz). * Changed the register values in BSP LVDS Structure. * Changed 600x400 in Capture link and Display link. * Written usecases for 1) Capture->Display to display 2) Capture -> Null(A15) to dump. Then, I run application to capture & display as well as capture & dump, But, i am getting distorted image in display and dump both. OVT Suggested, Receiver need to set resolution (image size) properly. Please check if the resolution (image size) setting is correct or not. Is anywhere, am i missed to set the resolution in visionSDK 3.04? I am using only VIP capture Link. I am not using SGX / Encoder also, So I changed in VIP Capture Link and usecase. Is there anywhere i missed ? Thanks & Regards ARUNKUMAR V N + +Responses: +Hi Arun, How are you displaying VGA resolution on 1080p display? Are you enabling scaling in display or just positioning it on display? Also is pitch setup correctly? If you could set the snap of the output (in yuv format), it would helpful in understanding issue. Rgds, Brijesh + +Hi Brijesh Jadav, Sorry for confusion. For capture to display, we are using the use-case lvds_vip_single_cam_view_sgx_display i.e.. [ Capture -> Sync (A15) -> SgxFrmcpy (A15) -> Display_M4 (IPU1_0) GrpxSrc -> Display_Grpx ] after changing the capture sensor width and height in use-case as well as capture link. We are assuming the said resolution change, pitch info etc are being taken care by SgxFrmcpy Link. Also, for dump use-case we have a chain [ Capture -> Encode -> NULL] and the recorded dump video is identicle to the video seen on HDMI display in former use-case. Attaching a image extracted from the dump. I can see image in background but lines are coming in foreground. With this additional information about our issue, is there any suggestions you can provide for us to move ahead. Best Regards, ARUNKUMAR V N + +Hi Brijesh, I am wating for your reply. I want to downscale 1280x720 to 600x400. I get vip_capture link yuv422 hex data, but its still shows distorted data. ( i played data hexdump from ffplay) Changed capture width and height in lvds_vip_single_cam_view_sgx_display. Changed registers to 600x400 resolution. Changed width and height in capturelink drv.c and .h After All changes display is completely distorted like above image attached CAPTURE: Map Link pVIPcreate mode = 4, width = 0, mode = 0, stream =1 CAPTURE: Map Link pVIP width = 1280, Height = 720, Dataformat = 6, Scanformat = 1 CAPTURE : Outprm width = 1280, Height = 720, Dataformat = 7 CAPTURE: Width = 1280, Height = 720, pitch 1280 1280 0 CAPTURE: framesize_after = 1382400 verbose output of D3 shows below in capture link : [HOST] [IPU2 ] 56.227414 s: CAPTURE: Frame 0: FVID2 CH 0: Link CH 0: 0x84203000, 0x842e4000, 1382400 B [HOST] [IPU2 ] 56.248917 s: CAPTURE: Frame 1: FVID2 CH 0: Link CH 0: 0x84355000, 0x84436000, 1382400 B [HOST] [IPU2 ] 56.270359 s: CAPTURE: Frame 2: FVID2 CH 0: Link CH 0: 0x844a7000, 0x84588000, 1382400 B [HOST] [IPU2 ] 56.291862 s: CAPTURE: Frame 3: FVID2 CH 0: Link CH 0: 0x845f9000, 0x846da000, 1382400 B [HOST] [IPU2 ] 56.313304 s: CAPTURE: Frame 4: FVID2 CH 0: Link CH 0: 0x8474b000, 0x8482c000, 1382400 B [HOST] [HOST ] 56.337125 s: SGXFRMCPY: Create in progress for resolution: 1920x1080 !!! [HOST] [IPU2 ] 56.334838 s: CAPTURE: Frame 5: FVID2 CH 0: Link CH 0: 0x8489d000, 0x8497e000, 1382400 B is there anything i missed ? thanks & regards ARUNKUMAR V N + +Hi Arunkumar, The config wise, it looks ok, but i am not sure which component is adding artifacts. It looks like pitch is wrong somewhere, but not sure. Can you dump the frames at the output of each block and check first output is correct, from capture, vpe.. If they are correct, then it is not configured correctly in the display alone. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/814336.txt b/data2/text/range/0-5000/814336.txt new file mode 100644 index 0000000000000000000000000000000000000000..614518692c77943f046c783559c91fca7b795f57 --- /dev/null +++ b/data2/text/range/0-5000/814336.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2-17: Creating tidl_param_jdetNet_ssd.bin and tidl_net_jdetNet_ssd.bin on PROCESSOR_SDK_VISION_03_06_00_00 + +Query Text: +Part Number: TDA2-17 Tool/software: Linux Hello, We have an installation of PROCESSOR_SDK_VISION_03_06_00_00 on UBUNTU 16.04 LTS - based on PROCESSOR_SDK_VISION_03_06_00_00_setuplinux.bin. The files tidl_net_jdetNet_ssd.bin and tidl_param_jdetNet_ssd.bin are located at PROCESSOR_SDK_VISION_03_06_00_00/ti_components/algorithms/REL.TIDL.01.01.03.00/modules/ti_dl/test/testvecs/config/tidl_models/jdetnet/ As we understand it - in order to create this files - we need to run the import tool on PROCESSOR_SDK_VISION_03_06_00_00/ti_components/algorithms/REL.TIDL.01.01.03.00/modules/ti_dl/test/testvecs/config/import/tidl_import_JDetNet.txt file. The problem is that there is no any caffe_jacinto_models/trained/image_detection directory within this installation, so - we can't create the files. Can you please help addressing this issue? + +Responses: +Hi Yoav, you need to clone this repository: please check chapter "3.6.4 Importing Caffe-Jacinto-Models" in PROCESSOR_SDK_VISION_03_06_00_00/ti_components/algorithms/REL.TIDL.01.01.03.00/modules/ti_dl/docs/TIDeepLearningLibrary_UserGuide.pdf Regards, Yordan + +Hello Praveen & Yordan, Thank you for your fast response. I already cloned this repository , but couldn't find image_detection directory. The directories image_classification, image_segmentation are there, though. https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.17/trained shows the same results. Best regards, Yoav + +Hi Yoav, You may have to update import config file with these GitHub paths to import detection models. Refer to below thread will help in this.. Thanks, Praveen + diff --git a/data2/text/range/0-5000/814536.txt b/data2/text/range/0-5000/814536.txt new file mode 100644 index 0000000000000000000000000000000000000000..d973b9e1bb26be80c08dd2bb79a5e18f550370ad --- /dev/null +++ b/data2/text/range/0-5000/814536.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2EVM5777: Does detection output layer in TIDL Network apply NMS? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI-RTOS Hi, I got a one question about detection output layer in TIDL Network (JDetNet). In deploy.prototxt file, there is nms_param and keep_top_k in detection_output_param section. Does it means detection output layer apply NMS and return the output buffer which is consists of top 20 detected objects? Besides, could you let me know what is the meaning of keep_top_k? (top_k objects in order of high confidence? or just detected order) Thanks & Regards, Yoo. + +Responses: +Hi Yoo, 1. Detection output layer apply NMS on the "top_k" elements per class in the sorted list based on the scores. 2. "keep_top_k" are final output of top 20 objects in order of high confidence across all the classes. Thanks, Praveen + diff --git a/data2/text/range/0-5000/814803.txt b/data2/text/range/0-5000/814803.txt new file mode 100644 index 0000000000000000000000000000000000000000..93803de80eb6e9614a666fa19a7fa7210b3fce4b --- /dev/null +++ b/data2/text/range/0-5000/814803.txt @@ -0,0 +1,59 @@ +Ticket Name: RTOS/TDA2SX: TDA2XX: enable OPENCV undefined reference ti_sysbios_family_arm_a15_Cache_wbInvAll__E + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hi, I would like to build image the OPENCV Usecases enable AVB_INCLUDE with the latest SDK (Ver: [DEV_VISION_SDK_03_07] on TDA2XX EVM(ES 2.0/Board Rev A). So I configured OPENCV_OPENCL=yes, AVB_INCLUDE=yes, NDK_PROC_TO_USE=Ipu1_1 in the file of cfg.mk" under tda2xx_evm_bios_all folder. Then rebuild vision_sdk, it show that the error message: /home/sam/proj/TI_SDK_VISION_V03_07/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(shmem_rw_policy_rtos.cpp.obj shmem_rw_policy_rtos.cpp:(.text+0x23c): undefined reference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E BTW, There is a 1GB DDR_MEM on TDA2XX EVM, I would like to increase the memory size by replace DDR_MEM=DDR_MEM_512M (default) with DDR_MEM_1024M. Could you help teach me how to configure for the Usecases? Thanks. regards, Sam Hsieh opencv_cfg_n_log.rar + +Responses: +Hi Sam, can you set MAKECONFIG=tda2xx_evm_bios_opencx under Rules.make and see if you face any problems? Regards, Yordan + +Hi Yordan, Thank you for your feedback. After change MAKECONFIG=tda2xx_evm_bios_opencx, I could rebuild image successfully [make depend;make vision_sdk;make appimage; make sbl;]. But It got the error message then system halts after boot from SD card. Putting MPU CPU1 in Off mode, Jumping to MPU CPU0 App ...0x8980514c Could you help teach me why it result in the MPU in Off mode, how to fix it? Thanks. regards, Sam. opencx_log_20190627.txt + TDA2xx SBL Boot + Ver:Jun 27 2019 10:28:50 + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + DSP1 Image Load Completed + + App Image Download Completed + + SBLLibMPUCPU1BringUp: Enter !! Entry:0x0 mode=0x0 + + Putting MPU CPU1 in Off mode + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 166844 (14.23 ms) + SOC Init Cycles - 170897 (14.58 ms) + DDR Config Clock Cycles - 43652 (3.72 ms) + App Image Load Cycles - 36849805 (3144.51 ms) + Slave Core Bootup Cycles - 110039 (9.38 ms) + SBL Boot-up Cycles - 37342300 (3186.54 ms) + Time at which SBL started IPU1_0 - 113350 (3459.16 ms) +***************************************************************** + + Jumping to MPU CPU0 App + +...0x8980514c + +Hi Yordan, BTW, as the answer of the question (RTOS/TDA2: A15 SMP feature conflict with OpenCX), Currently both OpenCX and A15 SMP feature not supported on Vision SDK BIOS. I traced the SBL parse & load the Applmage, it run normally before jump the entrypoint of mpuCore0EntryFuncPtr(). At the same time, I tried to dump the vision_sdk_a15_0_release.xa15fg.rprc, the address of core is OK. Why it couldn't run the AppImage normally? Could you help feedback the issue? Thanks. BRs, Sam. + +Hi, We do not support opencv or opencx since past a few releases. Still first you can try without changing your DDR_MEM config. Regards, Anuj + diff --git a/data2/text/range/0-5000/814899.txt b/data2/text/range/0-5000/814899.txt new file mode 100644 index 0000000000000000000000000000000000000000..092bf475b6933a550a2b72131a4402f51b3ba490 --- /dev/null +++ b/data2/text/range/0-5000/814899.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler: TDA2XX RTOS new usecase can not include network_api.h + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, I want to imlement a sever soceket, so create a new usecae by following step 6.1 of vision SDK Build System User Guild and include some h file =============================================================== #include #include #include #include #include #include #include #include =============================================================== but compile printf error message =============================================================== ".\src/rtos/usecases/new_usecase/new_usecase.h", line 13: fatal error: cannot o en source file "sys/socket.h" 1 catastrophic error detected in the compilation of "X:/TDA2/vision_sdk/apps/sr /rtos/common/chains_main_bios_misc.c". Compilation terminated. >> Compilation failure gmake[4]: *** [X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/app_lib /tda2xx-evm/ipu1_0/release/chains_main_bios_misc.oem4] Error 1 gmake[3]: *** [ipu1_0] Error 2 gmake[2]: *** [app_libs] Error 2 gmake[1]: *** [apps_libs] Error 2 gmake: *** [apps] Error 2 =============================================================== it seem the iclude path is not set of makefile? Where is the makefile and what's the parameter name? + +Responses: +Hi, sys/socket.h is Linux header and you should not include it if you create usecase for rtos. Can you check how "./links_fw/src/rtos/utils_common/src/network_api.c" is implemented and which headers it includes and use it in your usecase. Regards, Yordan + +Hi Yordan, thanks for your help, but it has error link message after i adding the h file according to "./links_fw/src/rtos/utils_common/src/network_api.h", fuctions of socket can't find link path the error message show below =================================== # undefined first referenced symbol in file --------- ---------------- NDK_accept X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ ipu1_0/release/app_libs.aem4 NDK_bind X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ ipu1_0/release/app_libs.aem4 NDK_listen X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ ipu1_0/release/app_libs.aem4 NDK_recv X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ ipu1_0/release/app_libs.aem4 NDK_socket X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx- evm/vision_sdk_ipu1_0_release.xem4" not built gmake[7]: *** [X:/TDA2/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/b in/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error 1 gmake[6]: *** [ipu1_0] Error 2 gmake[5]: *** [apps_ipu1_0] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 =================================== + +Hi, can you set "NDK_PROC_TO_USE=ipu1_0" in vision_sdk\apps\configs\tda2xx_evm_bios_all\cfg.mk and try (you will need to run 'make depend' after modifying cfg.mk). Regards, Yordan + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/815054.txt b/data2/text/range/0-5000/815054.txt new file mode 100644 index 0000000000000000000000000000000000000000..f842b74b30d3ede0878eeed160860a06194f1347 --- /dev/null +++ b/data2/text/range/0-5000/815054.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EVM5777: Rebuilding AVBTP package failed! + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I'm trying to insert log message into AVBTP_processRxPackets function. At first, i cleaned previous linux and app and rebuild all that. However, the log message was not occured. I found and refered avbtp_0_10_00_00_user_guide.html. In that document, it says use xdc to rebuild AVBTP package in ti_components/networking/avbtp_0_10_00_00/packages/ti/avbtp directory. So, i execute xdc command in that directory but the error message was showed as below. making package.mak (because of package.bld) ... js: "./config.bld", line 77: define NDK_ROOT! gmake: *** No rule to make target `package.mak', needed by `.interfaces'. Stop. Could you suggest the cause of this error? Regards, Yoo + +Responses: +Additionally, i tried to find /opt/ti/ccsv6 but that is not exist. Could you also tell me how can i get this? Thanks. + +Hi Yoo, can you open ti_components/networking/avbtp_0_10_00_00/Rules.mak and modify following variables according to your installation: COMPILER_DIR (this should point to tools/compiler) and XDC_ROOT NDK_ROOT BIOS_ROOT EDMA3_ROOT NSP_ROOT currently they are set as if those components are installed in /opt/ti directory. You need to point them to the right directories in VisionSDK tree. Regards, Yordan + +Hi, Then, are you meaning the AVBTP package should rebuild by CCS compiler? Regards, Yoo + +Hi Yoo, I think you can point those variables: TIARMCGT_ROOT GCC_ROOT CGT6X_ROOT to the corresponding tools installed in ti_components/cg_tools/ Regards, Yordan + diff --git a/data2/text/range/0-5000/815153.txt b/data2/text/range/0-5000/815153.txt new file mode 100644 index 0000000000000000000000000000000000000000..20099e36a5d9d806a53ec7573016633e5e803853 --- /dev/null +++ b/data2/text/range/0-5000/815153.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS: Image distortion correction + +Query Text: +Part Number: TDA Tool/software: TI-RTOS Hi, I want to correct the image distortion of fisheye lens.I've got the internal parameters and distortion parameters of the lens.I don't know how to call the Remap and Merge Applet. Thanks! + +Responses: +To do this, you will need 2 things: 1. Convert the lens parameters to LDC look up table compatible with TI ISP format. 2. Package the LUT and other LDC parameters in a tuning plugin compatible with TI software. This can be done by TI's ISP tuning tool. If you don't have access, please request it through your TI representative. + +Hi Yulin, You may refer to the link below for LDC tuning e2e.ti.com/.../2435557 tuning#2435557 + +Hi， Thank you very much for your reply. I can get the remap matrix of my camera, that is, the coordinate mapping matrix of the current image and the image after distortion correction.I tried to call remapmerge link, but it failed. How do I use link remapmerge to correct image distortion? Mary + +Hi Mary, Which target device you want to use the remap link on ? It is tda2x or tda2+ ? The remap link was originally designed to be used for stereo-vision use-case so it expects two input queues for left and right images. Is your use-case for stereo or mono-camera ? regards, Victor + +Hello Mary, Let me know if you still have any issue with that or we will close the ticket. Thanks. regards, Victor + diff --git a/data2/text/range/0-5000/816955.txt b/data2/text/range/0-5000/816955.txt new file mode 100644 index 0000000000000000000000000000000000000000..2e6951e11bc54d07b17738cfeae8b5a2d8946895 --- /dev/null +++ b/data2/text/range/0-5000/816955.txt @@ -0,0 +1,10 @@ +Ticket Name: [RadarSDK] Break point for Radar processing data layout + +Query Text: +Hi Expert, Radar proceesing data flow is described in "Appendix D: Radar Processing Data Flow" in EVE_Applets_UserGuide.pdf. Each Data layout of Radar processing is shown in following Figures. Figure 3: Output of ARxx sensor Figure 4: Output of Range FFT/Input to Doppler FFT Figure 5: Output of Doppler FFT Figure 6: Antenna Data out after Peak Detection Figure 7: CFAR CA Detection My customer wants to confirm each data above in DDR when running Radar SDK usecase with CCS. Can you please tell me the line number & file name to be set as break point and buffer name (structs and variables) to look at each DDR data in CCS memory window ? Data Layout Buffer name Break point (Line number) Filename ARxx sensor output Range-FFT output Doppler-FFT output Peak Detection output CFAR CA output RadarSDK : Processor SDK Radar 3.6 Usecase : "3: Radar (Single AR1243) Capture + Radar Object Detect (EVE1) + Display (TDA3xx Only)" Best regards, Saito + +Responses: +Hi, I am forwarding this question to a team member in the Automotive Processors group. Thank you, -Randy + +ARxx sensor output : Function: AlgorithmFxn_RadarFftProcess Address: inBufAddr File: vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarfft2\radarFft2.c Range-FFT output: Function: AlgorithmFxn_RadarFftProcess Address: pObj->intermediateBuf File: vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarfft2\radarFft2.c Doppler-FFT output: Function: AlgorithmFxn_RadarFftProcess Address: outBufAddr and (AlgorithmFxn_RadarFftBuffDescriptor *) metaDataBuffAddr File: vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarfft2\radarFft2.c Peak Detection output and CFAR CA output are the same: Function: AlgorithmFxn_RadarPkDetectProcess File: vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarpeakdetect\radarPkDetect.c Address: outBuf Beam form Output: File: vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarbeamform\radarBeamForm.c Function: AlgorithmFxn_RadarBeamFormProcess Address: outBuf Thanks and Regards, Piyali Data LayoutBuffer nameBreak point (Line number)FilenameARxx sensor outputRange-FFT outputDoppler-FFT outputPeak Detection outputCFAR CA output + diff --git a/data2/text/range/0-5000/817499.txt b/data2/text/range/0-5000/817499.txt new file mode 100644 index 0000000000000000000000000000000000000000..b803acefc2329c125221475ca69f7924df94673c --- /dev/null +++ b/data2/text/range/0-5000/817499.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2EVM5777: The VPE link couldn't receive frame from previous Select link + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, My chain is consists of --------------------------------------------------------------------------------------------------- NullSource(A15) (ch0~3) -> Merge_cap(A15) -> Decode -> VPE_cap -> Dup_cap -> Sync_cap -> SgxFrmcpy(A15) -> Display Dup_cap -> Select Select -> VPE_dl -> Dup_dl Dup_dl -> Merge_dl Dup_dl -> Alg_tidlpreproc (DSP1) Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve2 (EVE2) Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve3 (EVE3) Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve4 (EVE4) Alg_tidl_Eve1 (EVE1) -> Merge_OD(DSP1) Alg_tidl_Eve2 (EVE2) -> Merge_OD(DSP1) Alg_tidl_Eve3 (EVE3) -> Merge_OD(DSP1) Alg_tidl_Eve4 (EVE4) -> Merge_OD(DSP1) Merge_OD(DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge_dl Merge_dl -> Sync_dl -> Alg_tiop(DSP1) -> Null(A15) --------------------------------------------------------------------------------------------------- The Sgx side is working normally but the VPE link of TIDL side (that is after Select link) is not receiving any frames from Select link. When i print each link statistics, the links in TIDL side didn't show any input & output FPS. I changed the ProcessData func in Select link link below. --------------------------------------------------------------------------------------------------- if (inBufList.numBuf) { Vps_printf("SELECT : inBufList numBuf %d", inBufList.numBuf); for (bufId = 0; bufId < inBufList.numBuf; bufId++) { #if 1 pBuf = inBufList.buffers[bufId]; UTILS_assert(pBuf->chNum < SYSTEM_MAX_CH_PER_OUT_QUE); pChInfo = &pObj->inChInfo[pBuf->chNum]; pSysCompBuf = (System_VideoFrameCompositeBuffer *)pBuf->payload; for (frameId = 0; frameId < pSysCompBuf->numFrames; frameId++) { for (planeId = 0; planeId < SYSTEM_MAX_PLANES; planeId++) { pVidBuf->bufAddr[planeId] = pSysCompBuf->bufAddr[planeId][frameId]; } pVidBuf->metaBufSize = pSysCompBuf->metaBufSize; pVidBuf->metaFillLength = pSysCompBuf->metaFillLength; pVidBuf->chInfo = pSysCompBuf->chInfo; pVidBuf->flags = pSysCompBuf->flags; } pOutBuf->payload = pVidBuf; pOutBuf->bufType = SYSTEM_BUFFER_TYPE_VIDEO_FRAME; pOutBuf->payloadSize = sizeof(System_VideoFrameBuffer); pOutBuf->chNum = 1; UTILS_assert(pOutBuf != NULL); #else --------------------------------------------------------------------------------------------------- Could you please let me know whether there is any incorrect things in that? Thanks & Regards, YOO + +Responses: +Hi Yoo, what is the type of 'pVidBuf'? Is it System_VideoFrameCompositeBuffer like pSysCompBuf? If so, then shouldn't you have: pVidBuf->bufAddr[planeId][frameId] = pSysCompBuf->bufAddr[planeId][frameId]; in the inner for loop? Regards, Yordan + +The type of pVidBuf is System_VideoFrameBuffer. I refered 'SyncLink_makeCompositeBuffer' function in syncLink_tsk.c Regards, Yoo + +Hi, Usecase does not seems proper. Where is the previous link of Dup_cap. Can you share the usecase stats. And share the jpg file of the usecase also. Regards, Anuj + +My bad, previous link of Dup_cap is Vpe_cap. The actual connection was set correctly. The status of each link in SV side, input & output FPS were showed normally and displayed well. However, in TIDL side, Select link received videoComposite buffer normally from Dup link but VPE link couldn't received composite type. So, we tried to convert type from composite to videoframe buffer in Select link. Regards, Yoo + +Hi, So i hope this issue is resolved. Regards, Anuj + diff --git a/data2/text/range/0-5000/817664.txt b/data2/text/range/0-5000/817664.txt new file mode 100644 index 0000000000000000000000000000000000000000..dde5814352ab5c1ab6672890d610827176519723 --- /dev/null +++ b/data2/text/range/0-5000/817664.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: How can I improve my train recognition accuracy using subclass attributes in ssdJacintoNetV2 networks? + +Query Text: +Part Number: TDA2EXEVM Hi, There's a problem，I use the ssdJacintoNetV2 which is Ti provided Object detect net. In the identification of traffic signs, one kind of images often make mistakes, resulting in low identification errors. just show as blow. The left image is belong to the speed limit signs, which I need to recognize in my task, but the right image is very similar to the left，which not in my task. How can I strengthen my training for this situation？The right image is not marked in my sample. 1、Can I use subclass attributes to reinforce the training of the sample? 2、We want to get a good result of vehicle identification at night，For ssdJacintoNetV2 networks, I need to separate night vehicles into another one category or a subcategory，or just in the car category without subdivision？ typedef struct { uint32_t objTag; uint32_t objType; uint32_t objSubType; uint32_t xPos; uint32_t yPos; uint32_t objWidth; uint32_t objHeight; float objScore; float objScale; float reserved0; float reserved1; float reserved2; } TI_OD_objectDescriptor; + +Responses: +I don't think SSD is appropriate approach for identifying fine difference as you are looking for. + +I'm assuming this is closed. + diff --git a/data2/text/range/0-5000/817741.txt b/data2/text/range/0-5000/817741.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc596b59244b8c6f783c9fcc72cbca9aab002065 --- /dev/null +++ b/data2/text/range/0-5000/817741.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2PXEVM: How to increase size of L2SRAM memory region for DSP core in TDA2P VSDK 3.0.6 relase + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2, SYSBIOS In VSDK 3.0.6 <<.bss:heapMemL2>> region is assigned to L2SRAM memory segment, In my code I had to increase UTILS_MEM_HEAP_L2_SIZE (which is indirectly assigned to UTILS_MEM_L2RAM_SIZE) [#define UTILS_MEM_L2RAM_SIZE ((224U+32U) * 1024U)] As shown above, we had increase it to 256K(0x40000) from 224K (0x38000). . With this change, I am getting below error i.e. not able to fit memory. "/source/vision/platform/ti/tda2/binaries/apps/harman_proto_A_bios/obj/vision_sdk/harman_tda2px-proto_A/c66xdsp_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: error: program will not fit into available memory. run placement with alignment fails for section ".bss:heapMemL2" size 0x40000 . Available memory ranges: L2SRAM size: 0x38000 unused: 0x38000 max hole: 0x38000 Can you guide me where this region is defined and how to increase the region size. + +Responses: +Hi, It seems that L2SRAM size is defined as 224 KB in SDK. Can you run grep for L2SRAM in Vision SDK and change it to 256 KB. Regards, Rishabh + +I have already searched in SDK but couldnt find. + +Hi, Can you see PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\links_fw\src\rtos\links_common\system\system_rsc_table_dsp.h. Regards, Rishabh + +Yeah but I am seeing only below code, it corresponds to DSP_L2SRAM not L2SRAM. I had increased this also (see below) but it doesnt solve my issue #define DSP_L2SRAM_BASE 0x00800000 #define DSP_L2SRAM_SIZE 0x00040000 { TYPE_DEVMEM, DSP_L2SRAM_BASE, DSP_L2SRAM_BASE, DSP_L2SRAM_SIZE, 0, 0, "DSP_L2SRAM", }, + +Hi Ritesh, L2SRAM belongs to DSP only. There is on chip memory that can be used by different cores known as OCMC. I checked with our DSP expert. You can have max 256 KB of L2SRAM and 32 KB is reserved for BIOS. Hence you cannot increase the L2SRAM. Regards, Rishabh + +Will this be related to the platform configuration in BIOS packages. In BIOS user guide i see that size of L2SRAM etc can be configured from CCS. But unfortunately, Instructions are not so clear in user guide. Do let me know if you have any pointers. I am sure something needs to be done to reconfigure platform files in BIOS folder. + +Hi Ritesh, Can you please check my above reply. Regards, Rishabh + +Hi Rishabh, We are not increasing L2SRAM size beyond 256K. As mentioned in first msg, just trying to increase it from 224KB to 256KB. Regards + +Hi Ritesh, I understand that you are trying to increase L2SRAM size to 256 KB which is max allowed by hardware. In this case you are using SYSBIOS on DSP and SYSBIOS needs 32 KB for it's internal use. Hence application can have max 224 KB of L2SRAM. Same is set and used by Vision SDK. Hope this helps. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +No , it is not resolved. + +Ritesh, Can you provide details on the need of additional L2SRAM. In case you want to allocate additional buffers you can use DDR. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/818068.txt b/data2/text/range/0-5000/818068.txt new file mode 100644 index 0000000000000000000000000000000000000000..10fd9724b3329b01bdbc1bb8c878ca0c579ceeec --- /dev/null +++ b/data2/text/range/0-5000/818068.txt @@ -0,0 +1,38 @@ +Ticket Name: Linux/TDA2E: vision SDK 3.02 A15 set clock freqency SysCtlClockSet() + +Query Text: +Part Number: TDA2E Tool/software: Linux Hi, I would like to change a15 clock freqency. Can I use SysCtlClockSet() function to change clock freqency and use SysCtlClockGet() to check? If I can not use this function.Which function I can to use? Thanks yumei SysCtlClockSet() + +Responses: +Hi Yumei, do you run Linux on A15? You an check this guide how to configure A15 frequency: Also in Linux kernel Dynamic Voltage and Frequency scaling is enabled: Regards, Yordan + +Hi Yordan I run Linux on A15. I try to use CPUFreq to change frequency. I want to run below code in my sdk folder(PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/),but it is failed. make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- distclean +make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- dra7xx-evm_defconfig +make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- zImage -j8 it show error message like: make: *** No rule to make target `distclean'. Stop. make: *** No rule to make target `tisdk_dra7xx-evm_defconfig'. Stop. make: *** No rule to make target `zImage'. Stop. I see this code from this question last reply: https://e2e.ti.com/support/processors/f/791/t/648120?Linux-AM5728-CPU-frequency-scaling-support Did i run error path or error code? thanks Yumei + +Hi Yumei, You need to build the kernel from the kernel folder and not from Vision-SDK. In the kernel folder (present in ti_components/os_tools), run the following commands to make kernel: make ARCH=arm omap2plus_defconfig ./ti_config_fragments/defconfig_builder.sh -t ti_sdk_dra7x_release make zImage make modules make MOD_INSTALL_PATH= modules_install Then copy the zImage and the modules in the file-system to your target. To change the frequency you need to have CONFIG_CPU_FREQ_GOV_USERSPACE=y in the kernel config. Regards Shravan + +hi When I run make zImage to sjow some error message below. warning: (INTEL_SOC_DTS_IOSF_CORE && MMC_SDHCI_ACPI && PUNIT_ATOM_DEBUG) selects IOSF_MBI which has unmet direct dependencies (PCI) # # configuration written to .config # warning: (INTEL_SOC_DTS_IOSF_CORE && MMC_SDHCI_ACPI && PUNIT_ATOM_DEBUG) selects IOSF_MBI which has unmet direct dependencies (PCI) make: *** No rule to make target `zImage'. Stop. Do I need to set up other things before make zImage? thanks Yumei + +Hi Yumei, can you try the following: make ARCH=arm omap2plus_defconfig ./ti_config_fragments/defconfig_builder.sh -t ti_sdk_dra7x_release make ti_sdk_dra7x_release_defconfig make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- zImage make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- modules and see if you get errors? regards, Yordan + +Hi Yumei, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +Hi Yordan I still show some error message when make zImage. But I continue run other step. I confuse about whith modules I need to copy to sd card. Because I find folder name modules in my sd card not a file. Thanks Yumei + +Hi Yumei, what is the error you get? Regards, Yordan + +Hi Yotdan below message is the error,when I run make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- zImage. drivers/built-in.o: In function `hip04_mask_irq': /home/autorad/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap/drivers/irqchip/irq-hip04.c:98:(.text+0x1960): additional relocation overflows omitted from the output make: *** [vmlinux] Error 1 thanks Yumei + +Hi Yumei, what are the changes you have compared to the original tag REL_VISION_SDK_03_02_00_00? Regards, Yordan + +Hi Yoedan Do you mean to chage which file in sd card? Thanks Yumei + +Hi Yumei, what are your changes in the kernel source code, compared to the default from the SDK? Are you able to compile it without any modifications? Regards, Yordan + +Hi Yordan I cannot to compile it without any modifications. Because original code which I want to set frequency,it had been modified many times by the others. Thanks Yumei + +Hi Yordan I cannot compared to the original code,because my original code which had been modified many times by the others. Yumei + +Hi Yumei, are you able to build the kernel with "make linux" from vision_sdk/build directory? Regards, Yordan + diff --git a/data2/text/range/0-5000/818222.txt b/data2/text/range/0-5000/818222.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce7baf20bf653fb92861256e289f0e88deec7a21 --- /dev/null +++ b/data2/text/range/0-5000/818222.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2SX: TDA2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: OPT8241, TDA2 Tool/software: Linux Dear TI officer: I have a TDA2x development board and an OPT8241-CDK-EVM. Can I put the OPT8241-CDK-EVM 's SDK: Voxel SDK on the TDA2 development board compiler and execute the OPT8241 application? Thanks. + +Responses: +Dear TI Officer: Can someone answer my question? Can I add the Voxel SDK and the Point Cloud Library to the Vision SDK and compile them together? Thanks. + +Hi Finley, I am not too familiar with the Voxel SDK. I believe if this is C code and library which can be compiled for the cores on TDA2 SoC and have no dependency on any specific OS functions which is not provided as part of TI RTOS, it should be okay. Thanks and Regards, Piyali + +Dear Piyali: Thank you for your response Voxel SDK dependency on PCL-1.7.2, libusb-1.0-0-dev, libudev-dev, linux-libc-dev, G++ 4.8 or later on Ubuntu 14.04 Can it compile and run on TDA2 Linux ? Thanks + +Dear TI Officer: Can someone answer my question? Thanks. + +Hi Finley, I had tried running the PCL a long time back on the Linux on TDA2 and it was working fine. I believe you need to make sure your filesystem has the right libraries to support this. I will also let one of our Linux experts to have a look at your requirements to confirm this is indeed supported. Thanks and Regards, Piyali + +Hi Finley, The latest Linux SDK release, that can be used with TDA2, is 5.00. This has support for point-cloud-dev and all other libraries that you mentioned. Please try it out and see if you can get the Voxel SDK working. If not, we will have to look at the issues and see how we can enable you from there. Regards Karthik + +Dear Piyali and Karthik, Thank you for your response, i will try OPT8241 on TDA2x. thanks + diff --git a/data2/text/range/0-5000/818531.txt b/data2/text/range/0-5000/818531.txt new file mode 100644 index 0000000000000000000000000000000000000000..95895ee54e6699cb5aac83dbbce8a67e50eb0972 --- /dev/null +++ b/data2/text/range/0-5000/818531.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2PXEVM: How can I test the processing time of each layer on TDA + +Query Text: +Part Number: TDA2PXEVM Hi, I am running my OD net on TDA2P and the output is fine. And it shows the fps of the whole CNN model running on EVE. Now, I want to analysis and test each layer's running time. SO, how can I get each layer's processing time? + +Responses: +Hi, To get each layer's running time, you need to rebuild TIDL with enabling profile in the library which needs source code access of TIDL. But, the issue here is that performance is worse because of your are running all the layers on EVE core, as detection output layer is not optimized on EVE core, so you can see that more cycles consumed on EVE. Could you please run this last detection output layer on DSP and all the remaining layers on EVE to get better performance. For that please refer to FAQ 21 and 22 in the TIDL user guide for the import and inference steps to partition layers on EVE and DSP. Thanks, Praveen + +Hi, Praveen I have followed the FAQ 21 and 22 in user guide to set layerID and run detection output layer on DSP. My point is to test different convolution layer to see how does structure of convolution affect the performance. For example, testing whether setting group convolution is helpful for reducing running time, testing whether Nx1 + 1XN conv run faster than NXN conv, testing how much does sparse convolution help on different convolution layers. Those tests can help us a lot to run CNN on TIDL more efficiently. I am afraid the user guide is not enough for applying. So, is that possible to get source code to rebuild TIDL? Or, is there any testing tools for cnn testing? Thanks! + +Hi, Please refer to section 1.2 Performance Summery in the TIDL data sheet where we had given "Convolution Layer Performance" for different combination of kenel sizes and sparse, dense kernels, so you can refer to that table and based on those cycles you can estimate for your network. Thanks, Praveen + +Hi, Praveen Thanks for your advice. I don't have TIDL data sheet. Could you share it to me? I think it can help me a lot with estimating my network. Your replay is really helpful. Thanks again! + +Hi, This TIDL data sheet (TIDeepLearningLibrary_DataSheet.pdf) also included along with TIDL user guide in the "REL.TIDL.01.01.03.00\modules\ti_dl\docs" folder. Also, attached here for your reference. Thanks, Praveen2577.TIDeepLearningLibrary_DataSheet.pdf + diff --git a/data2/text/range/0-5000/818917.txt b/data2/text/range/0-5000/818917.txt new file mode 100644 index 0000000000000000000000000000000000000000..35133073256c8f40c7578126d928ca739c84e149 --- /dev/null +++ b/data2/text/range/0-5000/818917.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: I want to connect Null link after TIOP link. + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I'm testing the TIDL usecase in linux with changing the last two link(ObjectDraw, Display) with Null link. The null link just read meta data from TIOP link and do nothing. The usecase was executed but FPS was too slow in each link. Could you suggest any points what i missed? Regards, Yoo + +Responses: +Hi, Whats the FPS are you getting when you run without modifying the usecase? Can you share the usecase stats logs after running the usecase for 1 min. Regards, Anuj + +HI, I haven’t heard from you, I'm assuming the issue is resolved. I will close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/818984.txt b/data2/text/range/0-5000/818984.txt new file mode 100644 index 0000000000000000000000000000000000000000..69edcc7ff44a096471c9b4522e9665f9de56f731 --- /dev/null +++ b/data2/text/range/0-5000/818984.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2EVM5777: Is it possible to use only meta data in TIOP link? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I wonder that is possible to use only meta data in TIOP link. In original TIOP link, that uses Video composite buffer in algProcess. However, i don't want to use Dup link in TIDL usecase. I mean i want to see only detected bbox information. Is it possible? Regards, Yoo + +Responses: +HI, You can dump the output of tidl link running on DSP. But as TIOP link output data as composite buffer, so that will not be possible. You can modify the object draw link and dump data from there only, this should be possible. Regards, Anuj + +HI, I haven’t heard from you, I'm assuming the issue is resolved. I will close the thread. Regards, Anuj + diff --git a/data2/text/range/0-5000/819749.txt b/data2/text/range/0-5000/819749.txt new file mode 100644 index 0000000000000000000000000000000000000000..47407f50a6953b9ed38c6ff38f954df5f7c2cb80 --- /dev/null +++ b/data2/text/range/0-5000/819749.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2HV: Will TDA2 device operate properly if VDD_RTC is disconnected from VDD (RTC SS not enabled) during usage? + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 A TI customer asks the following: "We would like to know what would happen if the VDD_RTC pin of the TDA2x device is not supplied. Currently, VDD_RTC is connected to VDD. Please know that we do not use the RTC sub-system in the design. Will the SoC work properly or can it hang?" On behalf of the customer, I searched the TDA2x Data Manual and Technical Reference Manual for instances of VDD_RTC. Reviewing the documents, I do not see any warning related to the question. I do see that VDD_RTC appears in the required power-up and power-down sequencing; however, I believe the customer's concern is related to a use case after power-up and before power-down. I searched the TI Public E2E database for VDD_RTC and TDA2, but I did not find any relevant posts about the topic. So, specifically: If VDD_RTC is tied high and becomes disconnected during normal use, what would happen to the SoC? Would it damage the device? Would it cause the SoC to hang? If the customer's system does not use the RTC sub-system, does the power-up and power-down sequence matter? Currently, the VDD_RTC is held high. With kind regards, Jason + +Responses: +Hi Jason, Datasheet has a footnote to Figure 5-2. Recommended Power-Up Sequencing regarding VDD_RTC: (4) vddshv5, vdd_rtc, and vdda_rtc domains: – If RTC mode is used, then vdda_rtc, vdd_rtc and vddshv5 must be individually powered with separate power supplies and cannot be combined with other rails. – If RTC-mode is not supported then the following combinations are approved: – vdda_rtc can be combined with vdds18v – vdd_rtc can be combined with vdd – vddshv5 can be combined with other 1.8 V or 3.3 V vddshvn rails If combinations listed above are not followed then sequencing for these 3 voltage rails should follow the RTC mode timing requirements. My understanding is that these are the possible connections for VDD_RTC (when RTC low power mode used/unused) found working by TI. Everything else (like VDD_RTC droop) can lead to unpredictable outcome. Regards, Stan + +Hello Stan, I am grateful for your response; thank you! I saw the same note and considered it. However, the customer's key question has to do with momentary or prolonged disconnection of the VDD_RTC pin. Is it possible that the SoC be damaged? Is it possible that the SoC would reset or hang? I believe that because the pin is optional, the customer's configuration disables the RTC funtion and the pin is not connected the the PRCM, there would be no long-term damage or unexpected reset/hang. But I am not the expert. I only make an assumption based on past experience and what I've recently read in the Data Manual and Technical Reference Manual. Any way for you to comment? With kind regards, Jason + +Hi Jason, just to update you: Stan is currently out of office and some delay in response might be expected. Regards, Yordan + +Hi Jason, Sorry for late reply. The TI instructions are to keep all power supplies powered even if that part (e.g. RTS) will not be used. Typically, the device will operate normally, but long-term reliability WILL be affected, meaning that end-product must have this fixed (all power supplies connected and ramped as specified in datasheet). Regards, Stan + +Thank you! I have shared this response with the customer. + diff --git a/data2/text/range/0-5000/820315.txt b/data2/text/range/0-5000/820315.txt new file mode 100644 index 0000000000000000000000000000000000000000..751f64eedb058bd3fb862b94a4b71546599eae6c --- /dev/null +++ b/data2/text/range/0-5000/820315.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux: TDA2 new-usecase function + +Query Text: +Tool/software: Linux Hi I use "PROCESSOR_SDK_VISION_03_07_00_00"and, I wanted to build a new usecase. I could read and show image by opencv and did the same things by draw2d.c. I followed VisionSDK_UserGuide_BuildSystem.pdf to build usecase. But I did't know what function or program could do that things. Q1：Is any document for building new-usecase, or about read and show ? Q2：Could someone show a brief process for this case ? + +Responses: +Hi, Can you refer to PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_DevelopmentGuide.pdf Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/820575.txt b/data2/text/range/0-5000/820575.txt new file mode 100644 index 0000000000000000000000000000000000000000..e2b3af45966cfe515d320d7722ed808d0faf1c58 --- /dev/null +++ b/data2/text/range/0-5000/820575.txt @@ -0,0 +1,22 @@ +Ticket Name: DRA75P: Need direct connect CSI2 Camera Module for J6 EVM, J6+ EVEM + +Query Text: +Part Number: DRA75P Other Parts Discussed in Thread: TDA2, TVP5158 Is there an off-the-shelf CSI2 output camera module available for the J6/J6+/TDA2/TDA2+ EVM that mates directly to the CSI2 connector (J8 on J6+ EVM, J5 on J6 EVM)? That is, need a direct CSI2 connection without SERDES for development purposes. + +Responses: +Hi David, J6 does not support CSI interface, but you could connect LI based camera to LI input interface on TDA2x+ EVM. Rgds, Brijesh + +Oh, right, I forgot that J6 did not have CSI2 and those ports I mentioned are for leopard imaging parallel output sensors. TDA2x+ and J6+ EVMs do have CSI2 expansion connectors (P15/J15). Do you mean that LI has a CSI2 output camera module that mates directly to the TDA2+ EVM? + +Hi David, I dont remember exactly connectors. Is this J15 MIPI connector or LI connector? We can connect OV10640 LI based sensor on LI connector and OV2775 on MIPI connector. Rgds, Brijesh + +Brijesh, According to the Processor SDK Linux Automotive Developer Guide we support the following: Supported cameras Camera Adapter Layer is used to capture video from CSI Camera. Currently the CAL driver supports following features. Processor SDK Linux Automotive release supports following sensors/cameras/video inputs:- OV10635 sensor - YUYV sensor on Vision board OV10635 sensor - YUYV sensor connected through LVDS OV10633 sensor - YUYV sensor connected on J6 EVM TVP5158 decoder - Support for decoding single channel analog video OV10640/OV490 - 720p CSI2 raw camera connected to OV490 ISP in YUYV format Processor SDK supports following sensors/cameras + +My reply above got truncated... The OV2775 and OV10640 are both RAW output. We want YUV. Do you have experience with the OV10640/OV490 combo? Is it sold as a kit from LI? Do we have a sample configuration which sets up basic YUV output through the ISP or would customer have to figure all that out? Again, we were looking for a reference camera (CSI2, YUV, no SERDES) without needing to use the Vision SDK. Thanks, + +Hi David, It is not supported on Vision SDK. It might be supported on Linux Let me check with the Linux team. Rgds, Brijesh + +I checked with Leopard Imaging and they apparently do not offer a OV10640+OV490 combination with 36 pin connector to fit our EVM. Is someone on the Linux team familiar with the configuration mentioned in the SW Dev Guide? + +The Linux team explained that the OV10640 + OV490 was custom made for TI and not available to customers. + diff --git a/data2/text/range/0-5000/820788.txt b/data2/text/range/0-5000/820788.txt new file mode 100644 index 0000000000000000000000000000000000000000..2593f85d9aa56debcf70b7bdfba3e0c1c2aab263 --- /dev/null +++ b/data2/text/range/0-5000/820788.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: Questions regarding image processing tools and optimization of semseg on EVE's + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi Dear TI, I have some thought provoking questions regarding tda2 and tidl. I have successfully implemented semseg with 2EVEs on tda2px. Now I have these following questions for which I need detailed answers. 1. As far as I understood, I cannot use opencv due to performance issue for image processing. Therefore, the only option I am left with is either vlib or eve_sw. I wanna ask, among them, which one is more suitable and closer to opencv. This arises another question 2. If I use eve_sw, my computational requirement is already occupied by the semseg, so I believe that I can only use vlib as it is for dsp. Please put some light on it. 3. Now, the third question is: How can I optimize the semseg so that I can use only one EVE to make it run on more than 10fps. What are the possible way which can contribute to fulfill this purpose. 4. Finally, I wanna ask, how can I check the memory consumed by tda2 while running the network or any usecase. I can calculate the theoretical value by converting it from the PC memory usage while inference and converting it for the tda2. However, I actually wanna see the practical value printed by the tda2 on the fly. Thank you once again, will be waiting for your detailed answers. With best regards, H. M. Owais + +Responses: +Hi Owais, 1 & 2. You can use vlib. 3. There is no further optimization possible in the Semseg use case on one EVE, you need to more EVE's in parallel to improve fps. 4, You can refer to "tidl_tb.c" for all the allocated buffers. Thanks, Praveen + +Hi Praveen, Thank you for reply. Regarding your answer 3, as per my understanding the network structure contributes towards the performance on tda2. So I want to rephrase my question: The question is whether the network structure can enhance the performance (i.e. the fps), using the same usecase? If so, would you like to give any suggestions on it? If, we build another usecase, what are the things need to considered to increase the performance? Once again, my goal is achieve the highest fps on minimum number of EVEs. What are the possible choices do I have on your current platform. With best regards, H.M. Owais + +Hi Owais, Yes, the network structure can enhance the performance. For that you can use example scripts for training sparse models from Caffe-jacinto github link (https://github.com/tidsp/caffe-jacinto-models) and try couple of thimgs suggested below, 1. You can try to increase sparsity in the model 2. You can try to decrease the number of layers and use more convolution layers 3. You try to reduce the resolution of feature sixe if possible use sizes multiple of 32 Thanks, Praveen + diff --git a/data2/text/range/0-5000/820982.txt b/data2/text/range/0-5000/820982.txt new file mode 100644 index 0000000000000000000000000000000000000000..83d5654f93641c174233f130850d770bc861d132 --- /dev/null +++ b/data2/text/range/0-5000/820982.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2P-ABZ: rebuilding image for SDcard issues with TIDL case + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Hi everybody , I have a TI evm for TDA2 and a D3 board mounting TDA2P . using latest SDK by TI modifying rules.make as : MAKECONFIG?=tda2xx_evm_bios_all I can build generate a card which is working in TI TDA2 board . now modifying to compile for TDA2P changing rules.make as MAKECONFIG?=tda2px_evm_bios_all I can build --> D3 TDA2P can boot but TIDL use case is empty : why ? (attached screenshot) what is missing ? on top if I use TDA2P image it doesn t run on TDA2 board : why ? is tda2px reffering to superset with different package ? best regards Carlo + +Responses: +Hi Carlo, TIDL use cases are supported only on TDA2x. TDA2Px is a different device as compared to TDA2xx. Hence you can't run TDA2P image on TDA2 board. Regards, Rishabh + +Hi Rishabh , TIDL can work on TDA2P ? not supported use case means TIDL example not ported on TDA2P or no way at all to have any neural on TDA2P using tensorflow + TIDL ? thank you regards Carlo + +Hi Carlo, TIDL can work on TDA2P. Not supported means TIDL example is not ported on TDA2P. Regards, Rishabh + +Hi Rishabh ok thakn you please any directions/suggestion on how to port it on TDA2P ? I have a D3 TDA2P kit and a camera and TIDL use case as a basis will help a lot best regards Carlo + +Hi Carlo, I am not an expert on TIDL yet to help you with porting steps :) Can you please post a different thread so that TIDL experts can help you. Regards, Rishabh + diff --git a/data2/text/range/0-5000/821093.txt b/data2/text/range/0-5000/821093.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e936f5acec31bb3f4cda65eb304913caa081dd4 --- /dev/null +++ b/data2/text/range/0-5000/821093.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ABZ: TDIL use case or example for TDA2P + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Hello everybody , please VSDK does not support TIDL use case ( see my other post ) . coudl you help me on how to insert example and have something similar to TDA2 ? any instruction / example ? thank you regards Carlo + +Responses: +Hi, You can run tidl bios example on tda2px bios cfg. You just need to modify your usecase and use 2 EVE instead of 4. Regards, Anuj + +Hi Anuj, Can you please elaborate more on your answer? Since there are several files to modify (configuration files on what processors to include, use-case related files: chains_semSeg.c, chains_semSeg_priv.c). What modification should I do in order to have only 2 EVE instead of 4? Thank you Aleksander + +HI, An internal thread is going on with this. From the logs shared i hope the porting tidl usecase on tda2px is done and everything is working fine. Please close this thread and raise a new one for your camera issue with tidl. Regards, Anuj + diff --git a/data2/text/range/0-5000/821306.txt b/data2/text/range/0-5000/821306.txt new file mode 100644 index 0000000000000000000000000000000000000000..a6f68515bf84b14ff48f4b72a5603b9c67899ac4 --- /dev/null +++ b/data2/text/range/0-5000/821306.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2E: Can the kernel software support the power management of the TF card? + +Query Text: +Part Number: TDA2E Tool/software: Linux HI， How does the kernel software do the power management of the TF card: After the TF card is removed, we need to turn off the TF card power. When the TF card is reinserted, the kernel will not recognize the TF card, and then the TF card will be powered. The kernel still cannot recognize the TF card. + +Responses: +Hi, Could you provide more details, Which SDK version you are using, what issue you are facing? Regards, Vishal + +Hi Vishal, We are using the 2.02 SDK. The problem is ：After turning off the TF card power supply, how to let the kernel recognize the inserted TF card? The kernel does not recognize the TF card. When the SOC performs this process: Turn off the TF power supply → Insert the TF card → Turn on the TF card power supply → The kernel cannot recognize the TF card + +Hi, Is the TF card connected via SD card slot using MMC interface? You can either use a dedicated GPIO for card detect or the SDCD signal of MMC. If dedicated gpio is used, then "cd-gpios" property in dts is used to specify the GPIO used for this purpose. Regards, Vishal + +Hi, Are there any more questions on this? Regards, Vishal + +Hi Vishal， We use the MMC1 interface to connect the TF card through the SD card slot. The SDCD signal of MMC1 has also been used. The software uses the original SDK provided. But still has not solved the problem Regards, + +Could you share the full Kernel logs from boot time? removal of card and re-insertion of card? + +Hi vishal , The attached file may be the file you want. dmesg_tf.rar + +Hi, Correction to my previous statement. We use a separate GPIO pin for SD card detect. The omap_hsmmc driver does not support SDCD pin. Regards, Vishal + +Hi, Do you have any other question on this? Regards, Vishal + diff --git a/data2/text/range/0-5000/821424.txt b/data2/text/range/0-5000/821424.txt new file mode 100644 index 0000000000000000000000000000000000000000..3614c099ac930f4dae90a7681b1b430bf1ad4d3b --- /dev/null +++ b/data2/text/range/0-5000/821424.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux: TDA2 PROCESSOR_SDK_VISION_03_07_00_00 new-usercase draw Ti logo + +Query Text: +Tool/software: Linux Hi I builded a new usecase "my_usecase", and I wanted to draw Ti logo first a. MAKECONFIG?=tda2xx_evm_linux_all b. my_usecase.txt UseCase: my_usecase GrpxSrc -> Display_Grpx c. grpxSrcLink_my_usecase.c Int32 GrpxSrcLink_my_usecase_draw(GrpxSrcLink_Obj *pObj) { Draw2D_RegionPrm region; Draw2D_BmpPrm bmpPrm; /* fill full buffer with background color */ region.color = DISPARITY_BACKGROUND_COLOR; region.colorFormat = SYSTEM_DF_BGR16_565; region.startX = 0; region.startY = 0; region.height = pObj->info.queInfo[0].chInfo[0].height; region.width = pObj->info.queInfo[0].chInfo[0].width; Draw2D_fillRegion(pObj->draw2DHndl,®ion); /* draw bitmap's */ /* TI logo */ bmpPrm.bmpIdx = DRAW2D_BMP_IDX_TI_LOGO_1; Draw2D_drawBmp(pObj->draw2DHndl, 1600 +80, DISPARITY_FRAME_THICKNESS, &bmpPrm ); return SYSTEM_LINK_STATUS_SOK; } I had build and run apps.out, I only got "Hello" and "test" from Vps_printf of my_usecase.c in usecases. But nothing output of logo or icon . It is still show 1920*1080 and FPS from HDMI on my output device Do any link or display function not set for my usecase to draw logo ? + +Responses: +Hi, Have you looked at the application present in the sample_apps folder which displays the TI logo on the screen? This sample chain to display content to screen can be found in the sample_app/src/hlos/usecases/nullSrc_display folder and uses the nullSrc link. Regards Shravan + diff --git a/data2/text/range/0-5000/822370.txt b/data2/text/range/0-5000/822370.txt new file mode 100644 index 0000000000000000000000000000000000000000..7511da207f8aa79fadee5f8a2d2a98bc97c3e6f8 --- /dev/null +++ b/data2/text/range/0-5000/822370.txt @@ -0,0 +1,24 @@ +Ticket Name: RTOS/TDA3LX: TDA3 OPP_PLUS + +Query Text: +Part Number: TDA3LX Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, My customer wants to increase the TDA3 DSP and EVE speed. I notice that the TDA3 can run in OPP_PLUS mode. For TDA2, I think the SBL code for OPP_PLUS has been already implemented in \PROCESSOR_SDK_VISION_03_06_00_00\ti_components\drivers\pdk_01_10_02_07\packages\ti\boot\sbl_auto\sbl_app\src, but I cannot find any detail information about TDA3 OPP_PLUS. I have several questions about the SW/HW OPP_PLUS configuration. Could you please provide more details about the OPP_PLUS of the TDA3. 1. How to configure the Software for OPP_PLUS for TDA3 by using SBL? Is it same as the TDA2? 2. How to configure the Software for OPP_PLUS for TDA3 by using GEL? 3. Any special requirements for the hardware or PCB ? Thanks, Frank + +Responses: +Hi Frank, TDA3xx OPP Plus is supported on a particular part i.e. TDA3xxS. In order to configure SBL for EVE 900 MHz and DSP 1000 MHz you need to set SBL_LIB_CONFIG_DSP_1000GHZ_EVE_900MHZ to 1 in PROCESSOR_SDK_VISION_03_07_00_00\ti_components\drivers\pdk_01_10_03_07\packages\ti\boot\sbl_auto\sbl_lib\src\tda3xx\sbl_lib_config_tda3xx.h. For gel you need to call TDA3xx_PRCM_Clock_Config_OPPPLUS_TDA3xx_15x15 API. Regards, Rishabh + +Do you mean "TDA3SXX"? I can turn on the "OPP_PLUS" for the TDA3 on the D3 board now. Do I need additional cooling system for the chip? Also I notice that the video PLL will not work. Which function needs the video PLL? ISS capture? Video input port? + +Hi, Can you specify the exact part that you are using in you system. I am not aware of thermal characteristics of D3 board so for cooling you need to check with D3 Engineering. Video PLL is needed by DSS. Hence in case of OPP Plus display won't work. Regards, Rishabh + +Hi Rishabh, The part number of TDA3 on D3 board is xTDA3SXXBABFQ1. So I guess the TDA3SXX is the special part number that you were talking about, and B is the speed grade. Thanks, Frank + +Hi Frank, xTDA3SXX is the ADAS superset part. To have 900/1000 frequency you need to have part with speed grade S. Please see Device Comparison table from data manual for different parts: http://www.ti.com/document-viewer/TDA3MV/datasheet/device-comparison-int-device-comparison#int_Device_Comparison Regards, Rishabh + +Thank you. But why I can still turn on the OPP PLUS on this chip? I print the DSP and EVE frequencies by Chains_prfLoadCalcEnable(), and it shows that the DSP frequency is 1000 MHz and EVE is 900 MHz. I also can use OPP HIGH and the DSP freuqnecy = 745 MHz and EVE frequency = 666.67 MHz. + +Hi Frank, As I mentioned previously xTDA3SXX is the ADAS superset part which is used for SW development. This part can be run at max supported frequency. However this part is not meant to be used in production. For production you will need to order one of the parts mentioned in Data Manual and depending upon the speed grade you will be able to set the EVE/DSP frequency. Hope this helps. Regards, Rishabh + +Hi Rishabh, Thank you for your quick response. This could resolve my issue. Have a nice day. Best, Frank. + +Hi Frank, I am closing this thread as issue has been resolved. Regards, Rishabh + diff --git a/data2/text/range/0-5000/822782.txt b/data2/text/range/0-5000/822782.txt new file mode 100644 index 0000000000000000000000000000000000000000..7545e17fb3dcf350c53f35396d2bbf095058c3f6 --- /dev/null +++ b/data2/text/range/0-5000/822782.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2SX: About the TDA2 memory adjustment on Dual OS (Linux & RTOS) + +Query Text: +Part Number: TDA2SX Tool/software: Linux Our system does not have enough shared memory to do more algorithm, So we want to adjust the memory block position & size for increasing the SR1 size. After reading the URL http://processors.wiki.ti.com/index.php/VSDK/VisionSDK_UserGuide_MemoryMap#Memory_Map_of_the_Application, our adjustments are still fail. Even we only move the IPU1 & IPU2 position & size. ( not out of 0xA0000000 ) Could you help us ? Thank you very much. Regards, Eten + +Responses: +Hi Eten, If you don't intend M4 to perform a CPU access and all operations happen using DMA, you can add a carveout between 0xA0000000 - 0xC0000000 and use this as shared memory (refer the dra7-evm-infoadas.dts in kernel on how to add a reserved memory node). You then need to add the corresponding entry OSA_memInit to mmap this reserved region to userspace. Regards Shravan + diff --git a/data2/text/range/0-5000/823341.txt b/data2/text/range/0-5000/823341.txt new file mode 100644 index 0000000000000000000000000000000000000000..280914f2087ced98b970e8593a19edc37aa07aae --- /dev/null +++ b/data2/text/range/0-5000/823341.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EVM5777: My Custom link build error + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I'm working on a project with TDA2EVM. I created three custom links and put them in myApp's "src/hlos/modules/" and assigned Link ID at system_linkId.h (links_fw). However, during the final linking process of the build, the error "MyApp.out: No soch file or directory" appeared. I checked that each custom link worked separately. and this error occurred during the process of merge. I solved this problem by modifying "src/hlos/MAKEFILE.MK" file, but I don't know why. Do I need to write down the MAKEFILE.MK content sequentially, such as a my custom Link ID? For example, when mod1 (LinkID 76), mod2 (LinkID 77) In MAKEFILE.MK order must be mod1, mod2 to prevent the above mentioned error from occur. I think MOD1 and MOD2 are not interrelated, are they interrelated in build process? I'm confused... I'd appreciate it if you could give me the answer. Regards, Lee. + +Responses: +Hi Lee, Depending upon where you want to run these custom links the answer will vary. Is there any custom link that is meant to be run on A15? Regards, Rishabh + +Hi, Rishabh. Thanks for answer. My three custom link run on A15 core. Regards, Lee. + +Hi Lee, You need to add the link under PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\links_fw\src\hlos\links_a15. Please see of the already available links on how to add the same to the make. Regards, Rishabh + +Hi Lee, Have you been able to make progress on this issue? Regards, Rishabh + diff --git a/data2/text/range/0-5000/823534.txt b/data2/text/range/0-5000/823534.txt new file mode 100644 index 0000000000000000000000000000000000000000..1afdc8afd3841f0c392c132e4687d1be3e0087db --- /dev/null +++ b/data2/text/range/0-5000/823534.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2EVM5777: Self converted JDetNet model doesn't show same FPS with pre-installed JDetNet model + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I downloaded JDetNet model from github and converted that model. In TIDL OD usecase, the installed JDetNet model that is contained in Vision SDK showed about 20 FPS. However, the converted JDetNet model shows about 10 FPS and file size was different. Moreover, the detected box of vehicle was pink color. The color of vehicle was green when is tested with original model. I also changed objectDraw link as related post says. The path of downloaded deploy.prototxt is 'ti_dl\test\testvecs\config\caffe-jacinto-models\trained\object_detection\voc0712\JDetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\test_quantize' and the name of pretrained model is voc0712_ssdJacintoNetV2_iter_120000.caffemodel. Is it normal situation? Regards, Yoo + +Responses: +Hi Yoo, Did you update the below parameters in the “deploy.prototxt” as indicated in the original thread keep_top_k: 20 confidence_threshold: 0.15 Thanks, Praveen + +Hi Praveen, Yes, i did it. I already did all things that were refered in original question. (https://e2e.ti.com/support/processors/f/791/t/689617) Is the jetnet model that is provided when i install the vision sdk from the jdetnet model which is opened in caffe-jacinto git repo? Regards, Yoo + +Hi Yoo, The jdetnet model that is provided when install the vision sdk is not same as one in the caffe-jacinto git repo. The jdetnet comes with VSDK had only 4 classes and the one in caffe-jacinto had 21 classes. Thanks, Praveen + +Hi Praveen, Thanks for your useful information. I got a one more question about whether you used any optimization method in training JDetNet model that is provided in vision sdk. I used tidl_import_JDetNet.txt file that is provided in vision sdk. However, as i say above post, the FPS was slower 2 times when i converted JDetNet caffe model from git repo (provided JDetNet 20 FPS, self converted JDetNet 10 FPS). Is that caused only because of difference of number of classes? Regards, Yoo + +Any updates here? I also wonder whether i can get deploy.prototxt and recipe txt file of provided JDetNet. Regards, Yoo + +Hi, Yes, the degradation could be because of difference of number of classes. I am not sure that I can share that publicly here, but only difference is if had four classes. Thanks, Praven + diff --git a/data2/text/range/0-5000/823662.txt b/data2/text/range/0-5000/823662.txt new file mode 100644 index 0000000000000000000000000000000000000000..750d4e50f0e1eb41b2c922725980fa82d29520f0 --- /dev/null +++ b/data2/text/range/0-5000/823662.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2E: Flashing the TDA2 Image + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, I am using Radar TDA2 SDK (PROCESSOR_SDK_RADAR_03_07_00_00). I have compilation on windows. I have compiled the SDK with following option set MAKEAPPNAME=apps set MAKECONFIG=tda2xx_cascade_bios_radar gmake -s -j8 depend gmake -s -j8 Now next step for me is to flash this image. So i started following the VisionSDK_UserGuide_TDA2xx.pdf under section 3.6 (load using SD card) so i opted for option 3.6.1 (Option 1: Steps to prepare a bootable SD card ) and made the card bootable. So i went to step 3.6.3 (Steps to generate MLO) and than i saw a new folder comes up under C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps with name tda3xx_evm_bios_radar even thogh my compilation was for tda2xx_cascade_bios_radar. I guess it was ok. After this i did step 3.6.4 (Steps to generate appImage ). Now the document in section 3.6.5 says i need to copy this generated MLO and App files.(Once the AppImage and MLO are generated , Copy the MLO and AppImage at root folder of formatted SD Card) But i cannot able to see which App and MLO files i need to copy to root folder. My question form where i can get these files to be copied My folder structures are For vision_sdk\binaries\apps C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps>dir Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps 07/24/2019 08:26 AM . 07/24/2019 08:26 AM .. 07/23/2019 03:52 PM tda2xx_cascade_bios_radar 07/24/2019 08:36 AM tda3xx_evm_bios_radar Inside tda3xx_evm_bios_radar C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar>dir Volume in drive C is Windows Volume Serial Number is 4EAB-E65F Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar 07/24/2019 08:36 AM . 07/24/2019 08:36 AM .. 07/24/2019 08:36 AM nor_flash_writer 07/24/2019 08:35 AM qspi_flash_writer 07/24/2019 08:36 AM sbl 07/24/2019 08:29 AM ti 07/24/2019 08:26 AM vision_sdk tda3xx_evm_bios_radar\sbl C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar\sbl>dir Directory of C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda3xx_evm_bios_radar\sbl 07/24/2019 08:36 AM . 07/24/2019 08:36 AM .. 07/24/2019 08:34 AM mflash_uart 07/24/2019 08:34 AM nor 07/24/2019 08:36 AM nor_flash_writer 07/24/2019 08:31 AM qspi 07/24/2019 08:35 AM qspi_flash_writer 07/24/2019 08:32 AM qspi_sd Can someone please tell me what and which files i need to copy into root folder of the SD card to use the Sw i bring up. This is the first time i am trying to bring up this board. Br Deepak Joshi + +Responses: +Hi Deepak, My suggestion will be to change MAKECONFIG in PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\build\Rules.make. When you tried to build SBL and AppImage make would have searched for TDA3 paths and failed. There will be a folder named sd under SBL and Vision SDK will have AppImage in sbl_boot folder. Please note that Processor SDK Vision and Processor SDK Radar are quite similar wrt infrastructure. So you can find similar paths in Radar release package Regards, Rishabh + +Hi Deepak, The exact path is vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\vision_sdk\bin\tda2xx-evm\sbl_boot\AppImage and vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\sbl\sd\opp_nom\tda2xx-cascade-radar\MLO Regards, Rishabh + +Hello Rishabh, Thanks for yours reply so now under C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda2xx_evm_bios_radar, I see Sbl folder which i will copy directly to root of the SD card. Now for the AppImage i went to the path suggested by you C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\binaries\apps\tda2xx_evm_bios_radar\vision_sdk\bin\tda2xx-evm\sbl_boot. Do i need to copy only sbl_boot or the three image files which has been generated. Thanks once again for yours help. Br Deepak joshi + +Hi Deepak, You only need to copy MLO and AppImage. In my second reply I have mentioned exact files. Regards, Rishabh + +Hello Rishabh, Thanks once again checked yours second reply. Now i have MLO and AppImage. So one last question before i plug this in TDA2 Cascade board, my SD card will have only two files and it will boot up ? my SD card folder structure will look like this F:\>dir Volume in drive F has no label. Volume Serial Number is 5D38-3D40 Directory of F:\ 07/24/2019 02:32 PM 119,988 MLO 07/24/2019 02:35 PM 6,438,676 AppImage 2 File(s) 6,558,664 bytes 0 Dir(s) 61,295,820,288 bytes free So it has only two files AppImage and MLO. Br Deepak Joshi + +Hi Deepak, Yes the EVM will boot up with only these two files. Regards, Rishabh + diff --git a/data2/text/range/0-5000/824073.txt b/data2/text/range/0-5000/824073.txt new file mode 100644 index 0000000000000000000000000000000000000000..ee395ec2d5f4561953deeb26ad5729844b515429 --- /dev/null +++ b/data2/text/range/0-5000/824073.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2E: MMWCAS-DSP-EVM Bring up + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: MMWCAS-DSP-EVM, TDA2 Hello I have as MMWCAS-DSP-EVM and want to use this to run RADAR Use case under the PROCESSOR_SDK_RADAR_03_07_00_00. I have compiled the PROCESSOR_SDK_RADAR_03_07_00_00 with use case for tda2xx_cascade_bios_radar and then followed following the steps mentioned in VisionSDK_UserGuide_TDA2xx.pdf 1) section 3.6 (Load using SD card ) 2) 3.6.1 (Option 1: Steps to prepare a bootable SD card ) 3) 3.6.3 (Steps to generate MLO) 4) 3.6.4 (Steps to generate appImage) 5) 3.6.5 (SD Card setup) Now when i try to plug the SD card into the MMWCAS-DSP-EVM board doesn't boot up. If anybody can tell me what is the issue it will be really helpful for me. Br Deepak Joshi + +Responses: +Hi Deepak, What is the SoC present on this board? Can you share the link where you ordered it. Regards, Rishabh + +Hello Rishabh, It has TDA2 Soc. we didn't ordered it online but was purchased directly via our FAE. I have the photo of the board, if this helps can post that in the forum. Br Deepak Joshi + +Hi Deepak, It will be helpful if you can get the link from your FAE. Regards, Rishabh + +Hello Rishabh, Just got info from our FAE that this board is not in public domain. So i will my question to further private forum. Br Deepak Joshi + +Hi Deepak, Ok thanks for the update, you can post it on private forum. FYI you might be missing SYSBOOT settings or UART serial port settings might not be set correctly in case you do not see any logs at all. Regards, Rishabh + diff --git a/data2/text/range/0-5000/824086.txt b/data2/text/range/0-5000/824086.txt new file mode 100644 index 0000000000000000000000000000000000000000..29e8379de2dcf58e0a1ebc8aa598d069812c0694 --- /dev/null +++ b/data2/text/range/0-5000/824086.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: Interfacing with vehicle CAN + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, TI TDA2 EVM has two CAN interfaces: DCAN1 and DCAN2. I want to receive information from vehicle CAN on one of these two interfaces, and use that information in an algorithm running on the DSP core. I have the following questions: 1. How can I physically connect these interfaces (DCAN1/DCAN2) to the vehicle CAN? Is there any reference which explains how to do this? 2. Are there any use-cases in Vision SDK that show how to receive/transmit CAN data? Thank you. + +Responses: +Hi Sagar, Answers to your questions are as: 1. Please refer to http://processors.wiki.ti.com/index.php/PDK/PDK_FAQ#CAN_Controller.28DCAN.2FMCAN.29 for more details. This page will tell you careabouts CAN connection. 2. Vision SDK do have the use-case to demonstrate the usage of DCAN. To enable this use-case you have to set 'DCAN_INCLUDE' to 'yes' in respective 'cfg.mk' file. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hello Vivek, The link you shared provides some information about the DCAN and MCAN, but it does not say anything about the physical connectors. For instance, some boards have a DB9 port to receive CAN. The TDA2x EVM has no such facility. So I am wondering if I need to solder or glue the CAN+ and CAN- wires on the DCAN terminals of TDA2x. In that regard, where can I get the board schematics for TDA2x EVM to know the positive and negative terminals of each DCAN? I found the usage for 'DCAN_INCLUDE' in Vision SDK, but it just seems to build the 'dcan' module under vision_sdk/apps/src/rtos/modules. I could not locate any application use-case(s) employing CAN information. Can you point out the same to me? FYI, we are using Vision SDK 3.06. Thank you. + +Hi Sagar, I am not sure which version of EVM are you using, but you can find EVM related documents here: http://www.ti.com/tool/TDA2EVM5777#technicaldocuments TDA2 EVM does not have DB9 connector for DCAN but it does have 3 pin header for CAN_H, CAN_L and GND. For DCAN use-case, you don't need to select any specific option, it runs with all use-cases. It periodically sends out a message and on reception, it prints the message details on the console. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/824632.txt b/data2/text/range/0-5000/824632.txt new file mode 100644 index 0000000000000000000000000000000000000000..3e25356d54574437c5e7194e73ef57a8a75bba87 --- /dev/null +++ b/data2/text/range/0-5000/824632.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2SX: Angle Finding radar VSDK use case? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, AWR1243 How to customize use case with our angle finding technique for cascade TDA2 EVM? Is modifying the beam forming use case the right place to start? Is there a better choice use case for angle finding or maybe we should look at creating a new custom use case? + +Responses: +Hi Zach, Are you using MIMO or beamforming for getting the angle of arrival? You can create your own usecase using the TI out of box usecases as a reference. Thanks and Regards, Piyali + +Hi Piyali, We are using MIMO. Thanks and Regards, -Zach + +Zach We have a MIMO usecase which is part of the SDK. You can use this as a reference. Thanks and Regards Piyali + +We have cascade needed as well. We are expanding the 4 AWR1243 cascade to 8 AWR1243. How do I go about identify and quantify the changes need to get to 8 AWR1243 on TDA2s with one AWR1243 master? Which it the "MIMO" use case? + +***correction*** 8 AWR1243, 2 TDAs, one master AWR1243 + +cascade_radar_object_detect is the MIMO usecase. If each AWR1243 would have its own TDA software, you would not need to change the number of AWR1243 for each TDA. Chirp configs would only need to be in sync. + +Where is the chirp config that gets used by FxObAoA? Looks like a it read from a file handle. I don't see where this file name string and directory get set. So we can review the chirp setting in the use case. + +Where can I see and modify the chirp ramp scenario please? + +Hi Zach, There is a default chirp config built into the code in PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\apps\src\rtos\radar\src\common\chains_common_cascade_ar12xx_config_mimo.c The one you see with the file read is searching for a folder with the below name: #define RADAR_CONFIG_PARAM_DIR_NAME "radar_test_vector/" Kindly go through the section: 3.9.1.6.3 File-based Use Case Configuration Support in the file : PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\docs\Radar\ProcessorSDKRadar_UserGuide.pdf You can change the chirp configurations from the files in radar_test_vector under PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect and put this folder in an SD card to be plugged into the board. Thanks and Regards, Piyali + +For "Control Calibration" file in 3.9.1.6.1 4 AWR1243 Capture + Radar Object Detect (DSP) (MIMO) + Null from PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\docs\Radar\ProcessorSDKRadar_UserGuide.pdf : "For Control Calibration, the Calibration is sent out over Ethernet to the Matlab tool. This is saved as a CC.mat file. Once this file is generated you need to run vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect\create_calib_coefs.m to finally create the SD card based coefficients and then copy this over to the SD card for the next run." Where do I find more information about generating this CC.mat file and it's format? + +Zach You can refer to the end of the section 4.2 Data Flow of the vision_sdk\docs\Radar\ProcessorSDKRadar_DataSheet.pdf. You can look at the MATLAB scripts for more details for the format. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/825232.txt b/data2/text/range/0-5000/825232.txt new file mode 100644 index 0000000000000000000000000000000000000000..322bc26a1d3c61502153e86556abb7a62e90568f --- /dev/null +++ b/data2/text/range/0-5000/825232.txt @@ -0,0 +1,12 @@ +Ticket Name: [TDA4M] Supporting RTOS at Cortex-A in TDA4 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, Only Linux is supported at CA72 in the latest sdk v0.9 of TDA4. But in your previous TDA2, RTOS version was the main platform at CA15. When will RTOS be supported at CA72? Regards, HJ Kim + +Responses: +Hi Kim, SDK v0.9 supports RTOS on CA72 with a limited set of features. TI is still discussing internally on the roadmap for RTOS support. Regards, Rishabh + +Hi Rishabh, Thank you for your reply. One more question, it is same for the following SDK v1.0 in Oct? Regards, HJ Kim + +Hi Kim, Yes the above will remain same for SDK v1.0 release in October. Regards, Rishabh + diff --git a/data2/text/range/0-5000/825291.txt b/data2/text/range/0-5000/825291.txt new file mode 100644 index 0000000000000000000000000000000000000000..8a23e87d9d2dc35640533dd51b14c2d38011783a --- /dev/null +++ b/data2/text/range/0-5000/825291.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: Possibility evaluation of TDA2x + 1080p surrounded view cameras + ADAS + +Query Text: +Part Number: TDA2SX We known multi-channel cameras based on TDA2P MIPI interface via TI official website: TDA2P + DS90UB960 or DS90UB953; but we are familiar with TDA2S platform, we developed 720p(1280*720) surrounded view cameras and ADAS function. We want to evaluate possibility of TDA2S + 1080p(1920*1080) surrounded view cameras + ADAS: 1. Surrounded view cameras: 4pcs 1080 camera raw data; 2. Please recommend serializer and deserializer: + +Responses: +Hi, Only the TDA2Px devices have the integrated ISP needed for processing RAW data. The TDA2xx (Including TDA2Sx) devices do not have the ISP. Is there a reason why you don't want to use the TDA2Px device for this usecase? Shashank + +Because we are familiar with TDA2S plaftform and we developed mature product, TDA2S is cheaper than TDA2P, as we know TDA2P supports few CMOS sensors. if we give up integrated ISP, does TDA2S support 2 Mega surrounded view cameras ? + +Please see response in teh other thread. + diff --git a/data2/text/range/0-5000/825609.txt b/data2/text/range/0-5000/825609.txt new file mode 100644 index 0000000000000000000000000000000000000000..d1be60dfd5e791a7c969e91929892df0998e6d2d --- /dev/null +++ b/data2/text/range/0-5000/825609.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2E: linux vision SDK 3.02 dra72x scaling_governor not found + +Query Text: +Part Number: TDA2E Hi I try to run omapconf show opp,but it show scaling_governor not found. If I want to use this to chane frequency,what I need to set up? thanks Yumei + +Responses: +Hi Yumei, can you check in this doc how to enable the scaling governor: Regards, Yordan + +Hi Yordan I had been to use menuconfig to change governor. When I use menuconfig ,then use make linux_install and copy uImage to SD card. But omapconf show opp still show no find scaling governor. thanks Yumei + +HI Can you confirm if the kernel configuration used is similar to that of the Linux SDK - would help if you can mention the SDK/kernel version. You can check the kernel configuration by typing # zcat /proc/config.gz + +Hi Please confirm if your issue is still open If it is still unresolved, please check the kernel configuration and report back your findings + +Hi Sriam I am not sure path to run zcat /proc/config.gz. Do it run in the ti_components/os_tools/kernel? Thanks Yumei + +Hi You need to run the command on the target (EVM) once the kernel boots to the shell prompt + +Hi the verison is 4.4.84-00018-gd326d64-dirty I use tda2eg sdk302. thanks Yumei + +HI Were you able to verify the kernel configuration by running the "# zcat /proc/config.gz" command on the target side + +Hi Sriram I cannot to verify the kernel configuration by running the zcat /proc/config.gz. I even cannot find config.gz. file. thanks Yumei. + +Hi Config.gz file is exported at runtime if the corresponding kernel configuration option to include it the kernel image is enabled. It is enabled by default in the TI SDK - have you modified the kernel configuration at your end. If so can you verify the changes carried out - including selection of options for CPUFREQ, governors + diff --git a/data2/text/range/0-5000/825649.txt b/data2/text/range/0-5000/825649.txt new file mode 100644 index 0000000000000000000000000000000000000000..8a425dfb8e6d996cfde798c16b0b72b5c52ab44c --- /dev/null +++ b/data2/text/range/0-5000/825649.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: vision SDK 3.02 dsp change OPP_NOM to OPP_HIGH + +Query Text: +Part Number: TDA2E Hi I try to change dsp frequency from OPP_NOM to OPP_HIGH or OPP_OD. I modify DRA7_CORE_OPP from OPP_NOM to OPP_HIGH in Clock.c file.(file from ti_components/os_tools/linux/u-boot/u-boot/arch/arm/include/asm/arch-omap5/Clock.c) But I use omapconf show opp to check result,it still is OPP_NOM. Do anything I miss when I want to change dsp freqency? thanks Yumei + +Responses: +Hi Yumei, please check if this document can help you: Regards, Yordan + diff --git a/data2/text/range/0-5000/825792.txt b/data2/text/range/0-5000/825792.txt new file mode 100644 index 0000000000000000000000000000000000000000..7912e37fbf11ce3bbd6f42e6b0a8663959261de1 --- /dev/null +++ b/data2/text/range/0-5000/825792.txt @@ -0,0 +1,69 @@ +Ticket Name: TDA2PXEVM: git am ../linux-kernel-addon/earlyboot-kernel-patches/* failed + +Query Text: +Part Number: TDA2PXEVM Hi, I want to apply the earlyboot-kernel-patches for kernel.But it apply failed.My vision SDK version is 3.07. Here's the apply log. git am ../linux-kernel-addon/earlyboot-kernel-patches/* +应用：dra7xx: Kernel Optimizations for early-use-case enablement +error: 打补丁失败：ti_config_fragments/auto.cfg:50 +error: ti_config_fragments/auto.cfg：补丁未应用 +打补丁失败于 0001 dra7xx: Kernel Optimizations for early-use-case enablement +失败的补丁文件副本位于：.git/rebase-apply/patch +当您解决这一问题，执行 "git am --continue"。 +如果您想要跳过这一补丁，则执行 "git am --skip"。 +若要复原至原始分支并停止补丁操作，执行 "git am --abort"。 Could you give some help? Regards Ll + +Responses: +Hi Ll, can you make sure you have checkout the right branch as described in chapter "2.4.2.1.1 Clone kernel" of VisionSDK_Linux_UserGuide.pdf. You may need to run 'git am --abort' before you can checkout the branch. (also it could be useful if you change your local setting to English so we can read the error messages) Regards, Yordan + +Hi Yordan, I describe my steps below. 1.Checkout the right branch,I use a new branch name early_boot to distinguish origin branch. lyp@lyp-desktop:~/hd2/tda2/sdk_3.07/ti_components/os_tools/linux/kernel/omap$ git checkout -b early_boot tags/REL_VISION_SDK_03_07_00_00 +Switched to a new branch 'early_boot' +lyp@lyp-desktop:~/hd2/tda2/sdk_3.07/ti_components/os_tools/linux/kernel/omap$ git log +commit 0af2ab56214366ea1b8c1ea6ca0dae726dba083a +Author: Shravan Karthik +Date: Tue Jun 4 18:47:56 2019 +0530 + + ti_config_fragments: Add CONFIG_BLK_DEV_NVME to default config + + Cascade radar board has a NVME SSD card mounted on the board. + Add NVME driver support by default in the kernel config + + Signed-off-by: Shravan Karthik + +commit 9e4a96e876ff8cfffe8694f38f27635dfbc18f3f +Author: Shravan Karthik +Date: Tue Jun 4 18:45:32 2019 +0530 + + arm: dts: Change board name for cascade radar DTB + + Signed-off-by: Shravan Karthik + +commit 12d7cbeff8522722c1981d49b8e07d81fdd887ce +Author: Vignesh R +Date: Wed Nov 22 14:33:41 2017 +0530 + + pci: dwc: pci-dra7xx: Improve MSI IRQ handling + + We need to ensure that there are no pending MSI IRQ vector set (i.e + PCIE_MSI_INTR0_STATUS reads 0 at least once) before exiting + dra7xx_pcie_msi_irq_handler(). Else, the dra7xx PCIe wrapper will not + register new MSI IRQs even though PCIE_MSI_INTR0_STATUS shows IRQs are + pending. Therefore, keep calling dra7xx_pcie_msi_irq_handler() until it + returns IRQ_NONE, which suggests that PCIE_MSI_INTR0_STATUS is 0. +lyp@lyp-desktop:~/hd2/tda2/sdk_3.07/ti_components/os_tools/linux/kernel/omap$ git branch +* early_boot + infoadas-on-psdkla3.03 + kernel_dev + 2.Try to apply the patch,it still apply failed. lyp@lyp-desktop:~/hd2/tda2/sdk_3.07/ti_components/os_tools/linux/kernel/omap$ git am ../linux-kernel-addon/earlyboot-kernel-patches/* +Applying: dra7xx: Kernel Optimizations for early-use-case enablement +error: patch failed: ti_config_fragments/auto.cfg:50 +error: ti_config_fragments/auto.cfg: patch does not apply +Patch failed at 0001 dra7xx: Kernel Optimizations for early-use-case enablement +The copy of the patch that failed is found in: .git/rebase-apply/patch +When you have resolved this problem, run "git am --continue". +If you prefer to skip this patch, run "git am --skip" instead. +To restore the original branch and stop patching, run "git am --abort". + Regards, LI + +Hi, Can you apply patch 1 by 1 and tell us which patch is giving the error and share the output of gist status and git diff when you get the error. Regards, Anuj + +Hi LI, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/0-5000/826165.txt b/data2/text/range/0-5000/826165.txt new file mode 100644 index 0000000000000000000000000000000000000000..34cd34c59484ced33d0994277a4e736d09f8381c --- /dev/null +++ b/data2/text/range/0-5000/826165.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2PXEVM: Function to extract the masks from semseg usecase + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi TI, I have few questions regarding post image processing on tda2. 1. How to use vlib within the tidl_postproclink,c? 2. Which function of vlib can be used to extract the information of individual class mask. What I am looking for is something similar to cv2.inRange function in Vlib? 3. Is there any function to find the contours as well in vlib? Thank you. With best regards, H.M. Owais + +Responses: +Hafiz Muhammad Owais said: 1. How to use vlib within the tidl_postproclink,c? I can't find the file tidl_posproclink.c in the SDK. Is there a typo? Also, not sure I understand the question. Assuming that this link is running on DSP, then adding vlib call is like adding any other library call. You need to call into the function you want, and make sure that the header file vlib.h is included and the makefile includes the include path for this. Hafiz Muhammad Owais said: 2. Which function of vlib can be used to extract the information of individual class mask. What I am looking for is something similar to cv2.inRange function in Vlib? There is none in vlib. Hafiz Muhammad Owais said: 3. Is there any function to find the contours as well in vlib? There is none in vlib. + +Hi Jesse, Thank you for your reply. I have solved the question 1. I want to be more precise for the rest of questions. Since TI has offered a demo version for semantic segmentation which is semseg. Once we finish the semantic segmentation, let's just say for three classes bicycle, person and background. What I want to do now is to apply image processing further to extract the information regarding whether the person is sitting on the bicycle or not. I believe most of the users need such kind of post image processing for the semantic segmentation. Do you have any solution for the post processing in the vlib? With best regards, Owais + +Hi Owals, Unfortunately, no we don’t have such function that would analyze the output of semantic segmentation. However you can train another deep learning network that would analyze the output of the semantic segmentation and detect regions in which there is a person sitting on a bike. Or the original semantic segmentation model could be retrained to detect 4 classes: bicvcle alone, person alone, person sit on bicycle, background. regards, Victor + +Hi Victor, I have written post processing algorithm by myself on C which works pretty fine enough :-) without utilizing any vision library. Your suggestion is useful but it would require more time for labeling and training it again. I will keep this suggestion in my mind for other segmentation tasks. Thank you. With best regards, Owais + diff --git a/data2/text/range/0-5000/826406.txt b/data2/text/range/0-5000/826406.txt new file mode 100644 index 0000000000000000000000000000000000000000..283a1d9031f59145105911485ef162055d88a442 --- /dev/null +++ b/data2/text/range/0-5000/826406.txt @@ -0,0 +1,30 @@ +Ticket Name: PROCESSOR-SDK-DRA7X: 4ch mix in/BT.1120 16bit to VIP Capture + +Query Text: +Part Number: PROCESSOR-SDK-DRA7X Other Parts Discussed in Thread: TDA2 Dear Sir, I have a 4 Channel video sensor input to one video decoder. This decoder will output one channel YUV422 BT.1120 16bit 74.25MHz to VIP captuer in TDA2. use line mixed method I need to confirm this kind application had verified, and the performace is fine. And, please let me know how to cahnge the VIP setting on PROCESSOR_SDK_VISION_03_05_00_00. Are these parameter coorrect? SYSTEM_VIFM_MCH_LINE_MUX_ES SYSTEM_VIFW_16BIT Thanks! + +Responses: +Hi Chen, Any specific reason for using line mux mode? You could connect multiple input to different input port. Rgds, Brijesh + +Hi, Becasue the source is form MIPI, so only line mux mode. Why do you suggest to connect multiple input to different input port? + +But which device is converting from MIPI to parallel output? Rgds, Brijesh + +Hi, we use FPGA to convert MIPI to BT.1120x1 + +Hi, Can you use pixel mux mode? Regards, Rishabh + +Hi, Can it output to multiple output ports? Regards, Brijesh + +Hi, Firstly, please let me know why can't use line mux mode, then tell me the better solution. + +Hi Chen, Line mux mode is not really recommended.. The other option is to use pixel mux mode. Is it possible to get the output in pixel mux mode? Regards, Brijesh + +Hi, We refer the doc - TDA2x_Tech_Reference_Manual http://www.ti.com/lit/ug/sprui29f/sprui29f.pdf In 9.4.5.8.4 Line Multiplexing, there is descibed the Line Mux mode is supported. It's impossible to change to pixel mux mode on current board schematic design. Please confirm line mux mode is verified, and performance is fine. We only use pixel mux mode in mass production, so this information is verry important for us. + +Hi Chen, Line mux is not much tested. I am not sure there could be challenges in bringing up line mux mode.. Since you are already considering pixel mux mode for mass production, why dont you use it for the bringup also? Rgds, Brijesh + +Hi Chen, Current driver does not support line mux so please use pixel mux as suggested previously. Regards, Rishabh + +Hi, Thanks for your comment. + diff --git a/data2/text/range/0-5000/826909.txt b/data2/text/range/0-5000/826909.txt new file mode 100644 index 0000000000000000000000000000000000000000..fcdeb8a959458ea70519544d06bf2f411fdf2221 --- /dev/null +++ b/data2/text/range/0-5000/826909.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: Does TDA2S support 2 Mega surrounded view cameras ? + +Query Text: +Part Number: TDA2SX Because we are familiar with TDA2S plaftform and we developed mature product, TDA2S is cheaper than TDA2P, as we know TDA2P supports few CMOS sensors. if we give up integrated ISP, does TDA2S support 2 Mega surrounded view cameras ? + +Responses: +yes Regards Shashank + +Would you please describe in details ? 1. Serializer and deserializer chip type: DS90UB960 ? it is MIPI interface, TDA2S does not support MIPI; 2. Serializer and deserializer transmission data rate: we used DS90UB934/DS90UB934 for 1280*720 resolution, transmission data rate of 2 Mega pixel will 4 times for 1280*720p resolution. Thanks, + +1) You can use 933 serializer and 964 deserializer which allow data through parallel port VIP. You are correct in stating that TDA2S doesn't support MIPI. For the exact data rate you will have to reach out to the SERDES group , however it may be possible to reach 2 mpix with this serdes configuration (We may have to reduce frame rate if the b/w exceeds) My suggestion would be to use the TDA2P device even if you are not using the ISP since it allows for better interfaces. Regards Shashank + diff --git a/data2/text/range/0-5000/827002.txt b/data2/text/range/0-5000/827002.txt new file mode 100644 index 0000000000000000000000000000000000000000..99e41e0badf9b4d4fdf5c6fc42f2bc3fc0965fde --- /dev/null +++ b/data2/text/range/0-5000/827002.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2EVM5777: How can i capture specific frame in Sgx link? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, I'm trying to connect my camera to TDA2 board. I'm using Vision_sdk ver 3.6. In lvds_single_cam_sgx_display usecase, the captured frame has invalid data format. In capture link, i set input data format as YUV_422I_YUYV and output data format as YUV_422I_YUYV also. (I don't have exact information about this camera data format) To get valid data format, i'm going to dump the frame and get valid data format using YUV player. To do that, i add the code to save specific frame as raw file. The below is what i added in sgxFrmcpy ProcessData function. if(customTmp == 10) { FILE *fp = NULL; fp = fopen("/opt/vision_sdk/FRAME.RAW", "wb"); if (fp == NULL) { Vps_printf("[DEBUG] File not opened for capturing frame"); } else { Vps_printf("[DEBUG] File write is Started"); } fwrite(pBuffer->payload, pObj->inQueInfo.chInfo[pBuffer->chNum].width * pObj->inQueInfo.chInfo[pBuffer->chNum].height*2, 1, fp); //Vps_printf("[DEBUG] %d written", pBuffer->payloadSize); fclose(fp); } customTmp++; The usecase is going well but the file that is created by this cord is now displayed normally when i use YUV player. The below images are captured images what i refered. I changed input/output data format regarding all possible combinations. However, any one was not showed normally. Any suggestion? Regards, Yoo + +Responses: +Hi, Which camera sensor are you using? Is it a VIP capture or CSI? Can you try out with BIOS single cam display usecase. You can modify the same usecase and add dup and null link to dump that data into file to cross verify. Regards, Anuj + +Hi Anuj, I'm using VIP capture. I found the reason why the color space seems wrong. The input format of my camera is YUV422I_YVYU. However, the capture link inparams only support YUV422P, YUV444P, RGB24_888 and outparams only support YUV422I_YUYV, YUV420_SP_UV, YUV422SP_UV, RGB24_888, ARGV32_8888, RAW_VBI. And display link output only support RGB24_888, YUV422I_YUYV as following guide document. Could you suggest any solution for making possible capture link get data as YUV422I_YVYU and also output as YUV422I_YVYU in chain that is containing SgxFrmcpy, Display link? Regards, Yoo + +Hi Yoo, Sorry could not get your question. You want to capture YVYU format and get it displayed.. Typically the YUV422 format is YUYV or UYVY.. In your case, it seems chroma component is swapped.. When we say input format is YUV422P to the VIP driver, we are just information the driver that input YUV422. This is not VIP module configuration.. Using this format, VIP driver comes to know if there is any need to enable CSC in the path or not.. Are you using 8bit interface? If yes, which component comes in on the first clock cycle? Could you please help me understand your input details? I could help with the format you would need to set in capture and display.. Rgds, Brijesh + +Hi Brijesh, I solved my problem by shifting 2 YUYV data to make YVYU. Thanks for your reply. Regards, Yoo + diff --git a/data2/text/range/0-5000/827011.txt b/data2/text/range/0-5000/827011.txt new file mode 100644 index 0000000000000000000000000000000000000000..586ceca59c81da200c5c6adda8d29887ed09f0bf --- /dev/null +++ b/data2/text/range/0-5000/827011.txt @@ -0,0 +1,10 @@ +Ticket Name: PROCESSOR-SDK-TDAX: [TDA4M] What need files for running apps? + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2, SYSBIOS Hi, In TDA2, in order to run the apps, apps.out and firmware files(dra7-dsp1-fw, dsp-f2, ipu2-fw) are needed in Linux. And, in RTOS, the appimage and MLO files are needed. In TDA4M, if I build the PSDK, the out files are generated. If I'd like to run the app, just out file is needed? BR, Heechang + +Responses: +In targetfs/lib/firmware, there are many files. What need the file for running the apps in "firmware" directory? + +hi Mr Kim, After doing "make vision_apps" the .out files to load on R5F, C6x, C7x and A72 are stored here, vision_apps/out/J7/A72/LINUX/$PROFILE vision_apps/out/J7/R5F/SYSBIOS/$PROFILE vision_apps/out/J7/C66/SYSBIOS/$PROFILE vision_apps/out/J7/C71/SYSBIOS/$PROFILE The *.out files get loaded on respective CPUs. See vision_apps/docs/user_guide/BUILD_INSTRUCTIONS.html To copy to SD card do below make linux_fs_install_sd This copies the R5F, C6x, C7x .out from /lib/firmware folder in the SD card. Before copying they are renamed as shown below, ifeq ($(BUILD_CPU_MCU2_1),yes) # copy remote firmware files for mcu2_1 cp $(VISION_APPS_PATH)/out/J7/R5F/SYSBIOS/$(LINUX_APP_PROFILE)/vx_app_tirtos_linux_mcu2_1.out $(LINUX_FS_PATH)/lib/firmware/j7-main-r5f0_1-fw endif ifeq ($(BUILD_CPU_C6x_1),yes) # copy remote firmware files for c6x_1 cp $(VISION_APPS_PATH)/out/J7/C66/SYSBIOS/$(LINUX_APP_PROFILE)/vx_app_tirtos_linux_c6x_1.out $(LINUX_FS_PATH)/lib/firmware/j7-c66_0-fw endif ifeq ($(BUILD_CPU_C6x_2),yes) # copy remote firmware files for c6x_2 cp $(VISION_APPS_PATH)/out/J7/C66/SYSBIOS/$(LINUX_APP_PROFILE)/vx_app_tirtos_linux_c6x_2.out $(LINUX_FS_PATH)/lib/firmware/j7-c66_1-fw endif ifeq ($(BUILD_CPU_C7x_1),yes) # copy remote firmware files for c7x_1 cp $(VISION_APPS_PATH)/out/J7/C71/SYSBIOS/$(LINUX_APP_PROFILE)/vx_app_tirtos_linux_c7x_1.out $(LINUX_FS_PATH)/lib/firmware/j7-c71_0-fw endif The also copies A72 .out files to /opt/vision_apps. cp $(VISION_APPS_PATH)/out/J7/A72/LINUX/$(LINUX_APP_PROFILE)/*.out $(LINUX_FS_PATH)/opt/vision_apps cp $(VISION_APPS_PATH)/apps/basic_demos/app_linux_fs_files/* $(LINUX_FS_PATH)/opt/vision_apps In general see vision_apps/makerules/makefile_linux_arm.mak for more details on how things are copied from local folder/files to linux filesystem. To boot EVM additional bootloader files are needed these need to be copied as shown in below file vision_apps/docs/user_guide/RUN_INSTRUCTIONS.html During boot, uboot loads these binaries to respective CPUs. This is different from TDA2x where the linux kernel would load the binaries. Let me know if you need further information regards Kedar + diff --git a/data2/text/range/0-5000/827143.txt b/data2/text/range/0-5000/827143.txt new file mode 100644 index 0000000000000000000000000000000000000000..d903c22a2b5e12caa59068bcb71755008168b6bc --- /dev/null +++ b/data2/text/range/0-5000/827143.txt @@ -0,0 +1,22 @@ +Ticket Name: Compiler/TDA2EVM5777: run QT application error in Linux System on TDA2-evm + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi: I compiled the QT library(5.13) with opengl es2 which is provided from ti's website(http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html) in rootfs image. Then, I ported the QT library on TDA2-evm board, and created an '/dev/fb0' symbol link from '/dev/vdrm-controller-0', but I got errors when running the QT application with GUI(examples/gui/rasterwindow) on board. PVR:(Error): WSEGL_InitialiseDisplay: Failed to create output [0, ] +Could not initialize egl display So, I have some questions about QT and OpenGL library: (1) Does TI not support the QT library on TDA2-evm board? (2) Does TI not support the OpenGL library on TDA2-evm board? Please help me solve this problem, thank you. Wxchen + +Responses: +Hi Wxchen, TI has not tested QT applications with vdrm. You have mentioned /dev/fb0, fbdev is no more supported and is replaced by drm. Please first check if you can run weston-simple-egl type of applications. Refer this link for the FAQ. http://processors.wiki.ti.com/index.php/Virtual_DRM_:_An_User_Guide_for_Developing_Usecases#FAQs Thanks RamPrasad + +Hi RamPrasad: After I tried the weston-simple-egl sample program, it worked perfectly by those instructions: 1. Run the vision_sdk_load.sh from /opt/vision_sdk 2. Run the apps.out from /opt/vision_sdk 3. Choose 'single camera usecase', and select 'DispDistSrc(weston) usecase'. 4. After run the usecase, the HDMI will output an X-desktop like environment. 5. Edit powervr.ini file from /etc, and add two line at the end of file. [weston-simple-egl] +DbmDriverName=vdrm + 6. Run weston-simgle-egl, the program will rotate an triangle on the X-desktop like environment. Unfortunately, I repeated the 5-6 step to run QT sample application, and I got similar error on the terminal( in desktop environment ). PVR:(Error): WSEGL_InitialiseDisplay: Failed to create DBM device: No such device [0, ] +Could not initialize egl display Is any possible to run the QT application in the TDA2 borad? Thanks Wxchen + +Hi Wxchen, Did you modify your /etc/powervr.ini with this change? [qtApp-name] +DbmDriverName=vdrm + +Hi RamPrasad: Yes, I did modify the file with those changes: [rasterwindow] +DbmDriverName=vdrm But it not worked for me. Wxchen + +Hi WxChen, What is the vision-sdk version used here? Can you check the commit-id of omap5-sgx-ddk-um-linux? If it is 32ad0237d69eb190d5b702a0bb4fac060e4995f2 as mentioned in ti_components/os_tools/linux/kernel/linux-kernel-addon/fs-patches/yocto/meta-glsdk/0003-ddk-update-libs.patch, please upgrade the commit it to bce94b557ffddd3984f8347ec41c5bfe464dff9e or you can directly download this from git.ti.com and upgrade your filesystem and give a try. http://git.ti.com/graphics/omap5-sgx-ddk-um-linux/commit/bce94b557ffddd3984f8347ec41c5bfe464dff9e Thanks RamPrasad + diff --git a/data2/text/range/0-5000/827231.txt b/data2/text/range/0-5000/827231.txt new file mode 100644 index 0000000000000000000000000000000000000000..8b76ab0aab6359f13bcb55cc7a48390fd03b19f8 --- /dev/null +++ b/data2/text/range/0-5000/827231.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: Radar VSDK non-half-lambda antenna offest + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Using the TDA2 Cascade EVM, our custom front end has non-half-lambda antenna offset. In PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\docs\Radar\ProcessorSDKRadar_DataSheet.pdf - "3.9.1.6.3 Understanding Antenna Offsets in the board": *Here the antAzimOffs and the antElevOffs are given in half lambda spacing convention* How do we manage antenna offset in our front end where the offset distance divided by Lambda/2 are fractional not whole number? + +Responses: +Zach I would need to consult with radar experts here to help you. I will forward the question and get back to you. Thanks and Regards, Piyali + +Hi Zach I haven't heard back from the expert yet. I will continue to follow up internally on your behalf. Thanks and Regards Piyali + +Thank you Piyali, This is an open question for us still. Best, -Zach + +Hello Zach, For non lambda/2 by two spacing the processing would have to be very customized based on the exact antenna configuration you have. Could you provide the reasoning for using non lambda/2 multiple spacing? Also can you provide the exact antenna pattern? regards, vivek + +Hello Zach, any update on this? regards, Vivek + diff --git a/data2/text/range/0-5000/827377.txt b/data2/text/range/0-5000/827377.txt new file mode 100644 index 0000000000000000000000000000000000000000..4797517b52d85cf0388c48d57f96ecf324ddec71 --- /dev/null +++ b/data2/text/range/0-5000/827377.txt @@ -0,0 +1,12 @@ +Ticket Name: Is it possible to do QSPI IO ReCalibration in function [SBLUtilsScaleIODelay] ? + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi We changed QSPI to from 48MHz to 76.8MHz, also have checked code in [SBLUtilsScaleIODelay] We find [gPadDelayConfigCommon_1_0], [gPadDelayConfigGpmcPadOther_1_0], the list seems too many IO pins for us, and some pins in the list drive off some modules such as I2C, So we remove the list [gPadDelayConfigCommon_1_0], [gPadDelayConfigGpmcPadOther_1_0] and only do IO ReCalibration for QSPI as below [gPadDelayConfigGpmcPadQSPI], Then we want to know if it is possible for us only do the IO ReCalibration with [gPadDelayConfigGpmcPadQSPI]? static sblutilsPadDelayConfig_t gPadDelayConfigGpmcPadQSPI[] = { /* CTRL_CORE_PAD_GPMC_A3 -> QSPI1_CS2 (PIN_INPUT) MANUAL delaymode */ { 0x04C, 0x00070101, { 0x0000, 0, 0 }, { 0x0000, 0, 0 }, { 0x0218, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A4 -> QSPI1_CS3 (PIN_INPUT) MANUAL delaymode */ { 0x050, 0x00070101, { 0x0000, 0, 0 }, { 0x0000, 0, 0 }, { 0x0224, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A13 -> QSPI1_RTCLK (PIN_INPUT) MANUAL delaymode */ { 0x074, 0x00070101, { 0x0144, 0, 0 }, { 0x0000, 0, 0 }, { 0x0000, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A14 -> QSPI1_D3 (PIN_INPUT) MANUAL delaymode */ { 0x078, 0x00070101, { 0x0150, 0, 0 }, { 0x0000, 0, 0 }, { 0x0000, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A15 -> QSPI1_D2 (PIN_INPUT) MANUAL delaymode */ { 0x07C, 0x00070101, { 0x015C, 0, 0 }, { 0x0000, 0, 0 }, { 0x0000, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A16 -> QSPI1_D0 (PIN_INPUT) MANUAL delaymode */ { 0x080, 0x00070101, { 0x0168, 0, 0 }, { 0x0000, 0, 0 }, { 0x0170, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A17 -> QSPI1_D1 (PIN_INPUT) MANUAL delaymode */ { 0x084, 0x00070101, { 0x0174, 0, 0 }, { 0x0000, 0, 0 }, { 0x0000, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_A18 -> QSPI1_SCLK (PIN_INPUT) MANUAL delaymode */ { 0x088, 0x00070101, { 0x0000, 0, 0 }, { 0x0000, 0, 0 }, { 0x0188, 151, 0 } }, /* CTRL_CORE_PAD_GPMC_CS2 -> QSPI1_CS0 (PIN_INPUT) MANUAL delaymode */ { 0x0B8, 0x00070101, { 0x0000, 0, 0 }, { 0x0000, 0, 0 }, { 0x0374, 0, 0 } }, /* CTRL_CORE_PAD_GPMC_CS3 -> QSPI1_CS1 (PIN_INPUT) MANUAL delaymode */ { 0x0BC, 0x00070101, { 0x0000, 0, 0 }, { 0x0000, 0, 0 }, { 0x0380, 22, 0 } }, }; + +Responses: +Hi, You can do the io delay calibration for QSPI pins as you mentioned. But it is recommended to do the io delay recalibration for all the pins used in your use case at the boot loader at the start up. Also the split in multiple structures for different pads is done basically for the NOR boot mode. For QSPI boot mode you may create a single structure with all the pads to be used in your use case. Regards, Prasad + +Hi Mi, On TDA2 devices TI strongly recommends to do all the pin mux along with IO delay re-calibration and manual/virtual delay configuration in isolation in order to guarantee IO timings. Please make sure to update IO delay re-calibration code accordingly if you create a single structure. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/828694.txt b/data2/text/range/0-5000/828694.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5bdf0a53149b2f880eccf27b9f06288a4a281ab --- /dev/null +++ b/data2/text/range/0-5000/828694.txt @@ -0,0 +1,12 @@ +Ticket Name: [TDA4M] memory map & EMIF Tool + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi I have two questions. I am preparing for a TDA4M bringup. We use RTOS and Linux. We probably to prepare two OS version(RTOS and RTOS-Linux) First, I can't find the location of the memory map source. In TDA2, we modified the *.xs files in the following location vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs --> RTOS vision_sdk/apps/build/tda2px/mem_segment_definition_linux.xs --> Linux Please provide the location of the same file as the *.xs files in the TDA4 source. Second, I want to get the EMIF TOOL of TDA4.(DDR) We are designing a customer board. So, I want to receive the TDA4 EMIF tool. I wonder if in the future provide guidance that is provided When will be. Thanks + +Responses: +hello, .xs file is no longer supported. A equivalent method is to modify in a .py file, located here vision_apps/apps/basic_demos/app_tirtos/tirtos_linux/gen_linker_mem_map.py To use this you need to do below once, 1. install python3 and pip3. use 'sudo apt install python3-pip' to install pip, see google on how to install python3, mostly likely python3 should already be installed. 2. cd vision_apps/tools/PyTI_PSDK_RTOS pip install -e . You should see something like below, kedar@ubuntu:/ti/j7presi/workarea/vision_apps/tools/PyTI_PSDK_RTOS$ pip3 install -e . Obtaining file:///ti/j7presi/workarea/vision_apps/tools/PyTI_PSDK_RTOS Installing collected packages: ti-psdk-rtos-tools Running setup.py develop for ti-psdk-rtos-tools Successfully installed ti-psdk-rtos-tools Now goto below folder and run he python file, cd vision_apps/apps/basic_demos/app_tirtos/tirtos_linux ./gen_linker_mem_map.py (you may need to edit the first line of this file depending on the python version installed on your machine) This generates linker command files, .h files and Linux dts snippets based on memory map defined in gen_linker_mem_map.py It also outputs a system_memory_map.html in the same folder, open this file to see the memory map. You can update the .py files and generate a new memory map. After this step, some manual steps are still needed to copy the dts file snippets to Linux kernel dts files. Also some tweaking of MCU2-1 memory map is needed in the file vision_apps/apps/basic_demos/app_tirtos/tirtos_linux/mcu2_1/r5_mpu.xs See this note in above file /* make APP_LOG_MEM_ADDR, TIOVX_OBJ_DESC_MEM_ADDR, IPC_VRING_MEM_ADDR as non-cache */ We will document this in detail in next release update. How much DDR memory will be available in your system ? We assume atleast 2GB DDR is available, if you have 2GB DDR then no need to modify memory map. regards Kedar + +Kyungtae, I will contact you via the private message tab to help with your EMIF tool question. Thanks, Kyle + +Hello, Thank you for your answer. I check the .py file and find the memory file. I will test It. We will use 4GiB as the reference schematic. regards kyungtae + diff --git a/data2/text/range/0-5000/829834.txt b/data2/text/range/0-5000/829834.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6b4277da136556f66b4fa7ad9621c30fb75fb0f --- /dev/null +++ b/data2/text/range/0-5000/829834.txt @@ -0,0 +1,8 @@ +Ticket Name: [TDA4M] Question about the removal of AUDIO_EXT_REFCLK source + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I have a question about AUDIO_EXT_REFCLK clocks. If audio functions are not used, can you confirm that AUDIO_EXT_REFCLK0/1/2/3 clock related circuit can be removed and these audio external clocks are only used for MCASP or other usages? Regards, Soolim + +Responses: +Hi Soolim, These clocks are similar to those in TDA2/TDA3, i.e. they are used for MCASP, ATL, and AASRC and are not mandatory if you will not use all of these audio modules. Regards, Stan + diff --git a/data2/text/range/0-5000/829941.txt b/data2/text/range/0-5000/829941.txt new file mode 100644 index 0000000000000000000000000000000000000000..54e2be87b24201ef18b92a3a7add98fb353ce676 --- /dev/null +++ b/data2/text/range/0-5000/829941.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3MV: [TIDL]is there sematic segmentation, object detect usecase for TDA3? + +Query Text: +Part Number: TDA3MV Other Parts Discussed in Thread: TDA2 Dear Champs, It seems there are 'segmatic segmentation' and 'object detect' usecase only for TDA2 in VisionSDK. Can these usecase be used for TDA3? Could you please provide advice how customer can modify these usecase for TDA3 in VisionSDK? Thanks and Best Regards, SI. + +Responses: +Hi SI, Yes these use cases can be run on TDA3. The use case needs to be updated to have only one EVE and not four EVEs. Regards, Rishabh + +Rishabh, Thanks for your confirm. Then, is it possible to modify parameters of makefile or should customer modify the source to run it on IPU? When I checked the usecases, it seemed the applications will be run on A15 ARM core. Thanks and Best Regards, SI. + +Hi SI, TIDL library mainly runs on C66x and EVE cores. Customer needs to modify the use case for change in number of EVEs and it seems that source code changes will be needed for Alg plugin as well. I would suggest you to wait till next week for exact changes as use case expert is OoO this week. Regards, Rishabh + diff --git a/data2/text/range/0-5000/831892.txt b/data2/text/range/0-5000/831892.txt new file mode 100644 index 0000000000000000000000000000000000000000..8046206a89749f5fac2728b7fc70317df5fe98b5 --- /dev/null +++ b/data2/text/range/0-5000/831892.txt @@ -0,0 +1,18 @@ +Ticket Name: AM5749: TIDL model type + +Query Text: +Part Number: AM5749 Dear sir, According to TIDL web document 3.15.4.7.1, modelType "ONNX" can be set by 2. However, it seems not existing when I converted onnx file with import tools in vsdk version 3.7. Is there any version onnx can convert to TIDL? thank you, Gary + +Responses: +Hi Gary, can you clarify which device you use? Is it TDA2x (TIDL is not supported on AM5749). Regards, Yordan + +Hi Yordan, Thank you for your reply. My testing board is VAYU EVM (ES1.1) XC5777X CPU board with a vision application board. Gary + +Hi Gary, As pointed out in the original post, current TIDL 01.03 version in vsdk version 3.7 does not support importing ONNX models. We have plan to support this in next TIDL 01.04 release. Thanks, Praveen + +Hi Praveen, Thank you for your information. Do you know when will TIDL 01.04 be released? Thank you, Gary + +Hi Gary, TIDL 01.04 will be released along with next VSDK release 3.8. I will check internally about next VSDK release date and come back. Thanks, Praveen + +Hi Praveen, The next VSDK release 3.8 is planned for December 1st week. Thanks, Praveen + diff --git a/data2/text/range/0-5000/832617.txt b/data2/text/range/0-5000/832617.txt new file mode 100644 index 0000000000000000000000000000000000000000..80b3542303baee23757666e6a31e89b75efea64e --- /dev/null +++ b/data2/text/range/0-5000/832617.txt @@ -0,0 +1,8 @@ +Ticket Name: AM5728: _ + +Query Text: +Part Number: AM5728 Dear sir, Are there any documents can guide me how / where to modify the visualization for TIDL OD results? As attachment, I'm going to modify the category labels and the color of detected boxes. Thank you, Gary + +Responses: +Hi Gary, you can look at function AlgorithmLink_objectDrawRectangles() in vision_sdk/apps/src/rtos/alg_plugins/objectdetection/objectDrawLink_algPlugin.c and try to modify it according to your needs. (one note: please when creating a new thread choose TDA2x as your device - we will be able to look at your threads quicker) Regards, Yordan + diff --git a/data2/text/range/0-5000/833737.txt b/data2/text/range/0-5000/833737.txt new file mode 100644 index 0000000000000000000000000000000000000000..a291c5c245dbd45a4155c8376a7394149fbddbf0 --- /dev/null +++ b/data2/text/range/0-5000/833737.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SG: Consult about Type Selection and Application. + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2P-ACD Hi, I'm using TDA2SG now. Because of the problem of computing power, two DSPs and four EVEs are needed. But I saw only TDA2S series can satisfy these two conditions found on the official website. But there is no CSI input. Do you have any other suitable suggestions? In addition, the computing power of TDA2P-ACD is how much, our application need to achieve 50 G Macs. Or have any suggestion? thank. + +Responses: +Hi Wu Yisyuan The TDA2px may be a good option for you: 2x C6x DSP @ 1000 GHz = 2*32 GMACS = 64 GMACS 2xEVE @900 MHz = 2*16*900 MMACS = 28.8 GMACS 2xA15 @1800 MHz = 2* 8 * 1500 MMACS = 24 GMACS http://www.ti.com/lit/ds/symlink/tda2p-acd.pdf You can refer to https://e2e.ti.com/support/processors/f/791/t/615108 for the gflops calculation. Thanks and Regards, Piyali + diff --git a/data2/text/range/0-5000/833790.txt b/data2/text/range/0-5000/833790.txt new file mode 100644 index 0000000000000000000000000000000000000000..39ab7dd88e87e2810d80618d7acc221331034ca6 --- /dev/null +++ b/data2/text/range/0-5000/833790.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3LA: TDA4x + +Query Text: +Part Number: TDA3LA Other Parts Discussed in Thread: TDA2 Hello, I was going through the ISP training in the CDDS. The specified DCC tool seems to assist us with the tuning process. I found in the RTOS SDK only xml & binary file for specific cameras sensors and various modes, but Unfortunately, I haven't found the DCC tool itself. Where can I download it? does it come with documentation? Thanks, Rotem Bernstein + +Responses: +Hello Rotem, DCC tuning tool is not yet released and will be available soon. Rgds, Brijesh + +To clarify... TDA3 tool is available but TDA4 tool is under development. + +Thanks for the quick response. It was written under TDA3 because there's no "TDA4x" topic in my scroll bar yet. BTW - Could I get the DCC tool for TDA2, so I'll be able to practice it with my previous EVM until TDA4x DCC will be released? Thanks, Rotem Bernstein + +Hello Rotem, TDA2 is an ISP less device, so the tool does not apply. If you are referring to TDA2Plus, then you can use the same tool as TDA3 since the ISP is exactly the same from tuning point of view. Regards, Mayank + diff --git a/data2/text/range/0-5000/834796.txt b/data2/text/range/0-5000/834796.txt new file mode 100644 index 0000000000000000000000000000000000000000..6d5988f47606d86c5b9dcaf44b1a72bdc6546563 --- /dev/null +++ b/data2/text/range/0-5000/834796.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2HG: TDA2HG TRM + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hello, Could you give us a TDA2HG TRM.pdf. We are using this device. On the other hand, for TDA2HG, can we run the visionSDK 03 05? Thanks Terence + +Responses: +Hi, Please refer to http://www.ti.com/lit/ug/sprui29f/sprui29f.pdf Yes you can run Vision SDK 3.05 for TDA2HG. Please note that Vision SDK is not customized for paper parts, it supports TDA2 superset part. In case customer is using a part that contains lesser number of hardware accelerators or supports lower frequency as compared to superset part, they need to modify the software accordingly. Regards, Rishabh + +Hi Rishabh, I read the sprui29f.pdf. But, I can't find the information about TDA2HG. Do you have TDA2HG TRM.pdf? For example, TDA2Px TRM.pdf Thanks Terence + +Hi Terence, TDA2x is the platform and has multiple paper parts. TDA2HG is one of the paper part. Separate TRM for paper parts is not there. Similarly TDA2Px is platform with multiple paper parts. Regards, Rishabh + diff --git a/data2/text/range/0-5000/835375.txt b/data2/text/range/0-5000/835375.txt new file mode 100644 index 0000000000000000000000000000000000000000..787351402eae0459189dd8a59263f48e34ff52ba --- /dev/null +++ b/data2/text/range/0-5000/835375.txt @@ -0,0 +1,16 @@ +Ticket Name: PROCESSOR-SDK-VISION 3.7 : How to change HSYNC polarity on HDMI output + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi Expert, I am using Processor SDK Vision 3.7 (PSDKV 3.7) and trying to connect HDMI output to DLP5531 (DLPC230 used) with some modification in PSDKV 3.7. Resolution changing to 1152x576 was successful, since I conformed that 1152x576 output image was seen on HDMI monitor without any errors. However, sync error in DLP is now being faced when connecting TDA2 to DLP5531. As a result of deep investigation, it seems that HSYNC on TDA2 HDMI output needs resersal of polarity. Please see below analog waveform for HDMI output. #1: HSYNC original : #2: HSYNC reversal: Could you please tell me which source code in PSDKV 3.7 should be modified for HSYNC reversal (#2) ? Best regard, Saito + +Responses: +Hi Saito-san, Please refer to file PROCESSOR_SDK_VISION_03_07_00_00\ti_components\drivers\pdk_01_10_03_07\packages\ti\drv\vps\src\vpslib\hal\src\vpshal_dssHdmi.c. You can update halHdmiWpVideoFormatConfig to hard code the value as an experiment to make sure output works. Regards, Rishabh + +Hi Rishabh, Thank you for prompt reply. Initilized value is set as below. Is that correct ? //vpshal_dssHdmi.c VpsHal_HdmiInfo HdmiHalInfo = {{0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U}, {0U,0U,0U,0U,VPSHAL_HDMI_PACKETMODERESERVEDVALUE}, {0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U,0U}, {0U,0U,0U}}; I will try to chage HSYNC polarity. Best regards, Saito + +Hi Saito-san, I would suggest you to get these values while running the binary and then flip the one you want to modify. You can build SDK in debug mode and put a break point on halHdmiWpVideoFormatConfig API. Regards, Rishabh + +Hi Saito-san, Were you able to get this working? Regards, Rishabh + +Hi Rishabh, Closing this thread. Thanks. Best regards, Saito + diff --git a/data2/text/range/0-5000/835766.txt b/data2/text/range/0-5000/835766.txt new file mode 100644 index 0000000000000000000000000000000000000000..ceadbefccf8736a2a314a84fa600412a01f286ca --- /dev/null +++ b/data2/text/range/0-5000/835766.txt @@ -0,0 +1,22 @@ +Ticket Name: CCS/J6EVM5777: load using nor FLASH in J6-EVM but error + +Query Text: +Part Number: J6EVM5777 Tool/software: Code Composer Studio software : vision SDK 3.07 board: J6EVM(X5777) i want to load using nor , and Reference resources is doc-- "VisionSDK_UserGuide_TDA2xx.pdf" in sdk when i put sbl_nor_opp_high_a15_0_release.bin to board bu CCS, it is normal when i erase the nor flash and read file /********************************************************************/ [CortexA15_0] Starting NOR Flash Writer. CFI Query...passed. NOR Initialization: Command Set: Spansion Manufacturer: SPANSION Size: 0x40 MB Enter the file path to flash: DIR/sbl_nor_opp_high_a15_0_release.bin Erasing the NOR Flash upto range: 0xC000000 Erased through 0x8020000 ... ... ... ... Erased through 0xC000000 Erase Completed Load Options: ------------- 0 -> fread using code (RTS Library) 1 -> load raw using CCS (Scripting console) Enter Load Option: 0 Reading 101316 bytes from file... Read 16384 bytes [16%] from file... Read 32768 bytes [32%] from file... Read 49152 bytes [48%] from file... Read 65536 bytes [64%] from file... Read 81920 bytes [80%] from file... Read 98304 bytes [97%] from file... Read 101316 bytes [100%] from file. Done!! /********************************************************************/ but when writing the data to nor flash, it is comes error as follows: /********************************************************************/ Writing 0x18BC4bytes to NOR... Data verify failed. Buffered write failed @ address 0x%x Trying normal write Failed flashing @ 0x%x Normal write also failed NOR Write Failed...Aborting! ERROR: Writing NOR failed. NOR flashing failed! /********************************************************************/ + +Responses: +Hi Li, For NOR you need HW modifications. Have you done any modifications on the EVM? Regards, Rishabh + +Hi Rishabh, yes, i have adjust the SW2, SW3 and SW5 in the EVM as the document said. as following picture shows: + +SW2[1:16] -> 10101100 10000101 SW5[1:10] -> 0100100000 + +Hi Li, Please refer to chapter "6.1 TDA2xx Board Modification for NOR BOOT Mode" of SBL user guide http://processors.wiki.ti.com/images/b/b7/TDA_SBL_UserGuide.pdf Regards, Rishabh + +Hi Rishabh, thanks for your help! i have read the doc, and the EVM switch setting is right as doc ,like SW2 and SW5 but as the document discribe, that is means i should change the resistor in the borad? + +Hi Li, Yes you need to change the resistors on the board. Regards, Rishabh + +Hi Rishabh, thanks for your help, your answer is very helpful! thanks again! best regard, Li + +Hi Li, Please mark the answers that helped you in solving your issue as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/836078.txt b/data2/text/range/0-5000/836078.txt new file mode 100644 index 0000000000000000000000000000000000000000..fb0b52db2c74b507189531c9632438dd54b1e5b5 --- /dev/null +++ b/data2/text/range/0-5000/836078.txt @@ -0,0 +1,8 @@ +Ticket Name: [TDA4M] Removal of RTC oscilator HW + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, WKUP_LFOSC_XO/WKUP_LFOSC_XI external oscillator is used for low power operation. RTC OSC can be shown at HW schematic of TDA4 EVM. Q1) What is the functionality of using RTC OSC instead of using WKUP_LFOSC_XO/XI ? Q2) Should WKUP_LFOSC_XO/XI be added in my customized board? Q2) Can I remove RTC OSC HW if RTC OSC functionality which you will reply for my question is not needed ? BR, Soolim + +Responses: +Hi Soolim, Q1) TDA4, unlike TDA2/TDA3, doesn't feature an internal RTC capability thus an external HW is required if RTC function is needed. Q2) WKUP_LFOSC_XO/XI crystal is required for some of the SoC low power modes. This crystal is needed if some Timer modules need accurate 32.768k clock for your application. I would place crystal pads if not sure. Q3) RTC IC can be skipped if software doesn't need a real-rime clock function. Regards, Stan + diff --git a/data2/text/range/0-5000/838171.txt b/data2/text/range/0-5000/838171.txt new file mode 100644 index 0000000000000000000000000000000000000000..f2fa166eca4db9a86e160d5aabd7f5374247b79d --- /dev/null +++ b/data2/text/range/0-5000/838171.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2EVM5777: Display true-color on TDA2 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi: I had an requirement for displaying true-color with transparent color(RGBA8888) in TDA2's board on Linux operation system, I tried two way to accomplish this requirement. (1) I created an new usecase and specified the link to "GrpxSrc -> Display_Grpx". I successfully run the usecase with those data format: pMyObj->GrpxSrcPrm.grpxBufInfo.dataFormat = SYSTEM_DF_BGRA16_4444; +//or +pMyObj->GrpxSrcPrm.grpxBufInfo.dataFormat = SYSTEM_DF_BGR16_565; It worked on displaying transparent color in SYSTEM_DF_BGRA16_4444. (2) I created another new usecase and specified the link to "NullSource (A15) -> Display". I setup those argument before the NullSource start: NullSrcLink_CreateParams *pNullSrcPrm = &pObj->ucObj.NullSourcePrm; +System_LinkChInfo *pChInfo = &pNullSrcPrm->outQueInfo.chInfo[0]; +pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, + SYSTEM_DF_YUV420SP_UV +/*SYSTEM_DF_YUV422SP_UV*/); It worked on displaying specific image in SYSTEM_DF_YUV_420SP_UV. But I setup the pChInfo->flags to other format(ex: SYSTEM_DF_YUV422SP_UV), then the program will ASSERT on creating nullsource. From above two testing and I find the different data format(SYSTEM_DF_RGBA32_8888) in "system_const.h", I wanna ask: (1) Is there any way to display true-color with transparent color in Grpx(Grpx looks like supporting Half-color(RGB444))? (2) Is there any way to sending RGBA8888 data format to displaying true-color with transparent in "NullSource -> Display"? (3) Is TDA2's hardware support true-color with transparent displaying mode? wxchen + +Responses: +Hi, NullSource is a link which reads from a file. So there is no such format of video data file which it wont be able to read. We just have not enabled all dataformat. If you want to read any specific data format then you have to enable it in the link. Please check NullSrcLink_fillData( ) function and add your data format support. in below file links_fw/src/hlos/links_a15/nullSrc/nullSrcLink_tsk.c Similarly you can add supoort for gspx link also for your data format. And yes TDA2 hardware support true-color with transparent displaying mode Regards, Anuj + diff --git a/data2/text/range/0-5000/838433.txt b/data2/text/range/0-5000/838433.txt new file mode 100644 index 0000000000000000000000000000000000000000..cb5740391db4610817f5e7117bc0ab44f2254de1 --- /dev/null +++ b/data2/text/range/0-5000/838433.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2SA: About DDR Memory change Issue + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Hi SIr We used TDA2 for development and we change the DDR P/N and size (512MB). Where should we modify about DDR timing setting and memory size setting ? As we know , we should modify SBL first. Do we need to modify other parts to let system can boot successfully and work well. ( for example : where to modify size for app image) please advise BR Yimin + +Responses: +Hi, You need to modify PROCESSOR_SDK_VISION_03_07_00_00\ti_components\drivers\pdk_01_10_03_07\packages\ti\boot\sbl_auto\sbl_utils\src\tda2xx\sbl_utils_tda2xx_ddr_config.c for DDR timing settings. You don't need to modify app image and Vision SDK as 512 MB is supported by default. Regards, Rishabh + +Hi Sir thanks for your reply. Do you have any suggestion why it stopped in "Jumping to MPU CPU0 App" by using SDCARD/QSPI booting. We have done the DDR test without issue. BR Yimin + +Hi, Is the DDR stable? Can you check individual CPUs and see if any CPU has crashed. What are the other changes that have made in SDK application? Can you also try SBL mbx image from PROCESSOR_SDK_VISION_03_07_00_00\ti_components\drivers\pdk_01_10_03_07\packages\ti\boot\sbl_auto\prebuilt_binaries\sbl_multicore_mbx\tda2xx and see if it works. Regards, Rishabh + +Hi Yimin, You can also check the below app notes: http://www.ti.com/lit/an/spraca1/spraca1.pdf http://www.ti.com/lit/an/sprac36c/sprac36c.pdf Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi SIr We have tried to load using CCS and it can work. The Menu can show up. But it will hang at below message by using SDCARD booting. Jumping to MPU CPU0 App Do you have any suggestion BR Yimin + +Hi Yimin, Have you made any changes in the gel files when you got the custom board working? If yes you should make sure that you have made same changes in SBL DDR configuration. Also do you have any other changes in SDK? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/839391.txt b/data2/text/range/0-5000/839391.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a3829a38d1c09b7cc2be2864b039917c30cfa4a --- /dev/null +++ b/data2/text/range/0-5000/839391.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: TDA2HG run VSDK 03 05 + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2, Hello, We are ready to use the TDA2HG device. For TDA2HG，which config can we use in application/tda2_app/apps/configs based on VSDK 03 05? Is it supported by VSDK 03 05? Thanks Terence + +Responses: +Hi Terence, for TDA2HG, you need to use "tda2xx_evm_bios_all" or "tda2xx_evm_linux_all". Regards, Yordan + diff --git a/data2/text/range/0-5000/841602.txt b/data2/text/range/0-5000/841602.txt new file mode 100644 index 0000000000000000000000000000000000000000..dfd40cb7fd6ea73719f96fdcc22c6c37d0bb9041 --- /dev/null +++ b/data2/text/range/0-5000/841602.txt @@ -0,0 +1,8 @@ +Ticket Name: DRA756: dra756 custom board, Vision SDK 3.7, video capture + +Query Text: +Part Number: DRA756 Other Parts Discussed in Thread: TDA2 Hi, i have been debuging the single camera usecase. hardware structure is that: ar0231 > ap0202 > ds90ub933 > ds90ub934 > tda2(ipu2) > HDMI 1920*1080. everything goes well but displaying. The video always displayed as follows, i used the usecase "1: 1CH VIP capture + SGX Copy + DISPLAY": I have no idea to solve this problem, could you guys give me some suggestiones? Thanks a lot. + +Responses: +I solved this problem, polarity of HSYNC and VSYNC. + diff --git a/data2/text/range/0-5000/842280.txt b/data2/text/range/0-5000/842280.txt new file mode 100644 index 0000000000000000000000000000000000000000..b4d15e54dae0a5a031d732645c3b77f64d85c49e --- /dev/null +++ b/data2/text/range/0-5000/842280.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2-17: How to test FPD-Link output (P1) on JACINTO 6 ENTRY EVM? + +Query Text: +Part Number: TDA2-17 Other Parts Discussed in Thread: DS90UH926QSEVB Tool/software: TI C/C++ Compiler Hi Team, I'm testing FPD-Link output (P1) on JACINTO 6 ENTRY EVM. My Deserializer board is DS90UH926QSEVB. Which Use cases of VISION SDK can test FPD-Link output(P1) on JACINTO 6 ENTRY EVM? SDK version: PROCESSOR_SDK_VISION 03_07_00_00 (Linux) + +Responses: +Hi, There is no such usecase in VSDK which uses FPD link port shown by you. Regards, Anuj + +Hi Anuj, Is there any other way to test it? Thanks. Will Hsu + +No. We are not support this. Regards, Anuj + diff --git a/data2/text/range/0-5000/842672.txt b/data2/text/range/0-5000/842672.txt new file mode 100644 index 0000000000000000000000000000000000000000..553f6d8389407a4e3ee08182de7fcf468ff5273b --- /dev/null +++ b/data2/text/range/0-5000/842672.txt @@ -0,0 +1,14 @@ +Ticket Name: PROCESSOR-SDK-TDAX: TDA2X + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 Question 1: Hello: when I was debugging the TDA2 driver, the file directory is as follows "PROCESSOR_SDK_VISION_03_05_00_00 / vision_sdk/apps/SRC/hlos/adas/SRC/usecases/disp_dist_src_display" The file VDRM_CRTC = 26 chains_dispDistSrc_Display. C, That is: PUcObj - > DispDistSrc_westonPrm. VDrmControllerObjectId = VDRM_CRTC; * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * excuse me: VDRM_CRTC 26 here is how to determine?If HDMI LCD1, LCD2, and LCD3 are used, what should the vDrmControllerObjectId be assigned? Question 1: * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * excuse me: if the HDMI LCD1 LCD2 LCD3 used, that here I am in terminal execution "weston - flower", how to specify the HDMI, LCD1 one shown on the screen? Root @ dra7xx - evm entry: ~ # Root @ dra7xx - evm entry: ~ # Root @ dra7xx - evm entry: ~ # Root @ dra7xx - evm entry: ~ # Root @ dra7xx - evm entry: ~ # weston - flower + +Responses: +Hi, can you check this document and see if it you can find the answers to your questions: Regards, Yordan + +Hello, I just refer to the above link to do it. Now I output 4 channels, HDMI, lcd1/2, and adopt 4 independent VDRM. How do I specify weston-flower to be displayed in these 4 channels?Like HDMI, or LCD3? The document above did not seem to say!!!!! The document above did not seem to say!!!!! Here is my video card device： root@dra7xx-evm:/dev# ls -al vdr* crw------- 1 root root 246, 0 Sep 25 10:00 vdrm-controller-0 crw------- 1 root root 246, 1 Sep 25 10:00 vdrm-controller-1 crw------- 1 root root 246, 2 Sep 25 10:00 vdrm-controller-2 crw------- 1 root root 246, 3 Sep 25 10:00 vdrm-controller-3 root@dra7xx-evm:/dev# The following is the command I executed, which is displayed on HDMI. Now I want to display it on LCD2. What should I do? root@dra7xx-evm:/dev# root@dra7xx-evm:/dev# root@dra7xx-evm:/dev# weston-flower + +Hi, I have forwarded your question to DRM experts for further help. (note that some delay in response due to the holidays in India might be expected) Regards, Yordan + +Do you see weston background on the LCDs? Can you provide me the the output of "ls -l /dev", "ls -l /dev/dri" and "ls -l /dev/dri/by-path"? - Subhajit + diff --git a/data2/text/range/0-5000/842698.txt b/data2/text/range/0-5000/842698.txt new file mode 100644 index 0000000000000000000000000000000000000000..0c7029ae3fc9fabe818164091e17a817a3741403 --- /dev/null +++ b/data2/text/range/0-5000/842698.txt @@ -0,0 +1,45 @@ +Ticket Name: Compiler/TDA2EG-17: Mirror/Flip Displaying + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi: My target operation system is 'Linux'. My project have two requirements about image transformation before displaying it. One is flipping image horizontally in ARGB8888 mode, and the other is rotating image in specified angle. My project will generate an image frame buffer by using totally computing resource on A15 core, so I don't want to waste computing resource in flipping/rotating image on A15. However, I find an enumeration (vpsissRszFlipCtrl_t from $SDK_DIR/ti_components/drivers/pdk_01_10_03_07/packages/ti/drv/vps/include/iss/vps_cfgrsz.h) which seems to indicate the flipping image mode on other core. But the usecase system seem that the flipping image mode is not supporting for ARGB8888 data format ($SDK_DIR/vision_sdk/links_fw/include/link_api/vpeLink.h). Here is the definition from vpeLink.h /** + ******************************************************************************* + * \brief Ouput param representation for VPE link. + * + * + ******************************************************************************* +*/ +typedef struct +{ + UInt32 width; + /**< Width of the video frame or field in pixels. */ + + UInt32 height; + /**< Height of the video frame or field in lines. */ + + System_VideoDataFormat dataFormat; + /**< Output Frame data Format. + * VPE link is validated only for the following output dataformats + * 1. SYSTEM_DF_YUV422I_YUYV + * 2. SYSTEM_DF_YUV420SP_UV + */ + + UInt32 numBufsPerCh; + /**< Number of output buffers per channel */ + + UInt32 inputFrameRate; + /**< applicable for progressive input OR when DEI bypass is TRUE + * inputFrameRate + outputFrameRate should be set to control required fps + */ + UInt32 outputFrameRate; + /**< applicable for progressive input OR when DEI bypass is TRUE + * inputFrameRate + outputFrameRate should be set to control required fps + */ +}VpeLink_OutParams; So, I wanna ask: 1. Is Vision sdk supporting for running flipping/rotating image on other core? If yes, how to do it? 2. Is TDA2's hardware supporting for outputting flipped screen directly? Thank you + +Responses: +Hi, Please find answers to you questions below. 1, vsdk in itself does not support, but you could EDMA to do so. 2, EDMA Rgds, Brijesh + +Hi: Would you please provide some information about EDMA? Is it an software library? or an hardware device? thank you. + +Hi, EDMA is HW module in SoC. Please refer to TRM for more details on EDMA. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/843641.txt b/data2/text/range/0-5000/843641.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc08ab94db4ea5968427f9ec46d0a27d26ec02f6 --- /dev/null +++ b/data2/text/range/0-5000/843641.txt @@ -0,0 +1,12 @@ +Ticket Name: IssCapture Input Type + +Query Text: +Is it possible to use HDMI as an input instead of CSI2 in IssCapture. Thanks and Regards, Aneesh + +Responses: +Aneesh, IssCapture link support CAL module, which can receive data only from CAL, over CSI input format. For HDMI, you need to use VIP, capture link. Rgds, Brijesh + +Hi Brijesh, Can you tell me a usecase where i can see the hdmi as input to vip capture. Regards, Aneesh + +Hi Aneesh, You could use any object detection usecase, it uses HDMI as input port, where HDMI decoder output is connected to VIP. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/844208.txt b/data2/text/range/0-5000/844208.txt new file mode 100644 index 0000000000000000000000000000000000000000..43d36bad45dda61e8bc67eece61b4186c8056088 --- /dev/null +++ b/data2/text/range/0-5000/844208.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2EVM5777: How can i check cd-gpios? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI C/C++ Compiler Hi, I'm customizing the dra7-evm.dts file to boot my custom board. In dra7-evm.dts file, the cd-gpios is set as <&gpio6 27 GPIO_ACTIVE_LOW> and the below is MMC interface part of board schematic. I want to know how can i assure that SDCD signal is hardwired to gpio6 in this schematic. Thanks and Regards, Yoo + +Responses: +Hi Yoo, MMC1_SDCD pinmux is configured to GPIO, code snippet from u-boot below {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ Regards, Vishal + diff --git a/data2/text/range/0-5000/844257.txt b/data2/text/range/0-5000/844257.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c5ddfb7d99ebc0d54e1abaa06320f541af71331 --- /dev/null +++ b/data2/text/range/0-5000/844257.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA4VMXEVM: Building PSDK_RTOS_AUTO_j7_06 for TDA2pxevm + +Query Text: +Part Number: TDA4VMXEVM Hey, is it possible to build the psdk_rtos_auto_j7_06_00_01 vision apps demos for TDA2pxevm? I like to test the singlecamera usecase on the tda2pxevm. The idea is to build instead for A72 and R5F, I build the vision apps for A15 and M4. Could that work? best regards, NIco + +Responses: +Hi Nico, For TDA2P you should use Processor SDK Vision package, psdk_rtos_auto_j7_06_00_01 vision apps demos are only supported for TDA4x. Regards, Rishabh + +So you say it is not possible to use psdk_rtos_auto with tda2px? My aim is to debug the psdk_rtos_auto at the moment. best regards, Nico + +Hi Nico, Yes it is not possible to use psdk_rtos_auto with tda2px. You should debug using TDA4 EVM. Regards, Rishabh + +Hey Rishabh, so do I understand correctly that the whole concept of links and chains from psdk(for example 3.6) has been overthrown and in psdk_rtos_auto this is replaced by using tiovx? best regards, nico + +Hi Nico, Links and Chains is TI proprietary API which was present on TDA2/TDA2 whereas OpenVX is an industry standard API. Hence in line with TI's strategy to move to open standards, links and chains have been replaced by TIOVX. Regards, Rishabh + diff --git a/data2/text/range/0-5000/844506.txt b/data2/text/range/0-5000/844506.txt new file mode 100644 index 0000000000000000000000000000000000000000..b152036fa10fd1c7e19a7d94042687f4e786ff22 --- /dev/null +++ b/data2/text/range/0-5000/844506.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2EG-17: EDMA on TDA2 + +Query Text: +Part Number: TDA2EG-17 Tool/software: TI C/C++ Compiler Hi: I would like to enable other core to help my system to flip/mirror/rotate image. 1. Is EDMA(mentioned from this post) support those functions? 2. Is there any tutorial about EDMA? 3. Is there any other way to implement those function on other core? Thank you + +Responses: +Hi, EDMA is a hardware IP and look at TRM for more information. It does not support these functions by default, you will have to configure it accordingly to achieve the desired functionality. EDMA can be run from any core. Hope this helps Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/844731.txt b/data2/text/range/0-5000/844731.txt new file mode 100644 index 0000000000000000000000000000000000000000..e524a9dd2b6dacd5cd583f4c2aa45e0b058b7e89 --- /dev/null +++ b/data2/text/range/0-5000/844731.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HV: Customize TI-RTOS HWI_Disable()/HWI_Restore() APIs to toggle GPIO + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2, SYSBIOS Hello TI RTOS experts, TI RTOS runs on TDA2 on a custom board. Code base is custom and loosely based on an older Vision SDK release. A missed interrupt issue on A15 core is being debugged. One theory is that interrupts are globally disabled for too long via HWI_Disable()/HWI_Restore() APIs. Since JTAG access is not available on the board, the approach is to measure time between interrupts disabled/reenabled by toggling GPIO. The current implementation modifies low level code and adds low level GPIO register access code in multiple locations (where hwi disable is defined): in hwi.c ( "bios_6_46_04_53\packages\ti\sysbios\hal"), in file Core__epilog.h ( "bios_6_46_04_53\packages\ti\sysbios\hal"), and in ( "C:\ti\ford\bios_6_46_04_53\packages\ti\sysbios\family\arm\gic") . Is it necessary to "hit" all three locations with modifications? Are there more locations? Is there a cleaner way to implement this functionality? Basically customize HWI_Disable()/Restore() APIs to toggle a specific GPIO. Thanks in advance, Jelena + +Responses: +Jelena, User code will invoke the Hwi_disableFxn()/enableFxn/restoreFxn implementations in src/ti/sysbios/family/arm/gic/Hwi.c. When the custom SYSBIOS library is built, -Dti_sysbios_Build_useHwiMacros is added to the compile line for each source file pulled into the custom library. Defining that symbol invokes inlined versions of Hwi_enable/disable/restore to be used rather than the versions in Hwi.c. The optimized versions of those APIs are implemented in ti/sysbios/family/arm/gic/Hwi__epilogue.h and in ti/sysbios/hal/Hwi__epilogue.h. if you simply change the #ifndef ti_sysbios_Build_useHwiMacros statement in those header files to #ifdef ti_sysbios_Build_useHwiMacros Then the implementations of Hwi_enableFxn/disableFxn/restoreFxn found in ti/sysbios/family/arm/gic/Hwi.c should always be invoked. Alan + diff --git a/data2/text/range/0-5000/845612.txt b/data2/text/range/0-5000/845612.txt new file mode 100644 index 0000000000000000000000000000000000000000..b7acf7bae8f354009d9b42066b269012a34a25d0 --- /dev/null +++ b/data2/text/range/0-5000/845612.txt @@ -0,0 +1,40 @@ +Ticket Name: TDA2EVM5777: How to burn BIOS(sbl and appimage) into qspi ? + +Query Text: +Part Number: TDA2EVM5777 Hi, I want to boot bios from qspi, I reference the manual VisionSDK_UserGuide_TDA2xx.pdf - 3.7Load using QSPI.But I don't have JTAG,I cannot use ccs to download the binary. I heard there are also ways using the USB boot mode to load and execute an image from DDR3 to then run a secondary boot loader that can flash QSPI-NOR or eMMC flash. So could you indicate which documents mention this? Regards + +Responses: +Hi, You can use Mflash to flash via UART. Please see PROCESSOR_SDK_VISION_03_07_00_00\ti_components\drivers\pdk_01_10_03_07\packages\ti\boot\sbl_auto\docs\AppNote_mflash.pdf Regards, Rishabh + +Hi,Rishabh I follow the guide, I compile the sbl_mflash_tda2px-evm and copy AppImage_BE and MLO into mflash directory. And I enabled UART3 by two simple registers modification on the evm. I use below command try to download the AppImage_BE and MLO. sudo ./mflash.out -M sbl_mflash_tda2px-evm -P 0 -F AppImage_BE 0x80000 -F MLO 0x00 -C But it crash in Opening port for sbl_mflash. Here's the complete download log lyp@lyp-desktop:~/hd2/tda2/sdk_3.07/ti_components/drivers/pdk_01_10_03_07/packages/ti/boot/sbl_auto/tools/mflash$ sudo ./mflash.out -M sbl_mflash_tda2px-evm -P 0 -F AppImage_BE 0x80000 -F MLO 0x00 -C +Usage: mflash -M -P -C [optional: to clean the QSPI Flash]-F -F ... [PC] sbl_mflash sbl_mflash_tda2px-evm +[PC] File 0 AppImage_BE +[PC] Offset 0 0x80000 +[PC] File 1 MLO +[PC] Offset 1 0x00 +[PC] com /dev/ttyUSB0 +[PC] ##########Starting USB/UART Flasing Utility############## +[PC] Put UART Boot Mode, make fresh UART connection & restart +[PC] Press Enter when done... +[PC] Opening serial port successful. +[RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]21 [RBL]1 [RBL]0 [RBL]0 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41[RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]21[RBL]1 [RBL]0 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13[RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 +[PC] Requesting the ASIC ID +[RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]21 [RBL]1 [RBL]4 [RBL]1 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]4 [RBL]1 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]2 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]3 [RBL]13 [RBL]14 [RBL]21 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]4 [RBL]1 +[PC] Requesting PERI_REQ mode +[PC] Sending SBL_MFLASH filesize. +[PC] Size of sbl_mflash = 51468 +[PC] Sending SBL_MFLASH... Please wait +[PC] File Size = 51468 +[PC] # +[PC] Transfer Complete. Time = 4.000 +[PC] Opening port for sbl_mflash. + I think there are something wrong with my operation....Do you have some idea? Regards + +Hi, Your original question mentions TDA2xx whereas as per your reply you are trying to use TDA2Px. Can you confirm what is the exact SoC you are using. Regards, Rishabh + +Rishabh, It's TDA2PX. Regards + +Hi, Can you confirm if you have followed the step "Put UART Boot Mode, make fresh UART connection & restart". Regards, Rishabh + +Hi Rishabh, Yes,I sure I make this. I have to give up this way. I try to boot up in Linux and flash image into /dev/mtd0 and it success.But I meet another problem. I will ask a new question in new thread. Thanks + diff --git a/data2/text/range/0-5000/846700.txt b/data2/text/range/0-5000/846700.txt new file mode 100644 index 0000000000000000000000000000000000000000..594531fb4da21dd764792e67fd5c11940885f40a --- /dev/null +++ b/data2/text/range/0-5000/846700.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2-17: Color 3D Model in GPU Based Surroundview + +Query Text: +Part Number: TDA2-17 Hello, How do I enable a color 3D model using the TDA2xx EVM and the SGX based surroundview? All of the Car models are rendered as Grayscale despite having color texture files. Thanks + +Responses: +Hi Ben, you will need the source release of the surround view and rebuild it with CAR_YUV flag set, please check those threads for details: Regards, Yordan + diff --git a/data2/text/range/0-5000/846847.txt b/data2/text/range/0-5000/846847.txt new file mode 100644 index 0000000000000000000000000000000000000000..a26be76cf64b276c9ecf8ce61d8e32b27f8343bd --- /dev/null +++ b/data2/text/range/0-5000/846847.txt @@ -0,0 +1,30 @@ +Ticket Name: Compiler/TDA2EVM5777: How can i shift the data of frame from camera sensor? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI C/C++ Compiler Hi, I'm working with custom board. It is based on TDA2x EVM board. The lvds camera that i'm using sends data in format of YVYU. So, i want to shift 2 bytes of data to make it as YUYV format in ProcessData function of Capture Link. I reffered http://processors.wiki.ti.com/index.php/PDK/PDK_VPS_FVID2_User_Guide to know the data format of YUV422 interleaved and add the below source code in ProcessData function of Capture Link. pFrame->addr[0][0] = pFrame->addr[0][2]; pFrame->addr[1][0] = pFrame->addr[1][2]; However, it doesn't work well. Could you let me know how can i reformat the data of frame? (I mean the way how can i access the data of frame) Thanks and Regards, Yoo + +Responses: +Hi Yoo, What do you mean by shift? For YUV422, driver will always output frame in addr[0][0] location.. Regards, Brijesh + +Hi Brijesh, I mean i want to move back 2bytes of data received from camera sensor. For example, If the data from camera is arranged as Y U Y V Y U Y V, i want to remove the first Y U data from the buffer. In this case, i want to access to addr of FVID2_frame. Could you let me know whether this way is possible or acceptable? Regards, Yoo + +Hi, I checked from comment in source code and documentation that the data is arranged in single plane when the data format is YUV422 interleaved and progressive. The remain thing what i to do is make the data to start from Y V not Y U. To do this, i added this below line in CaptureLink_drvProcessData function of captureLink_drv.c . ((System_VideoFrameBuffer*)(sysBuf->payload))->bufAddr[0] += 2; I think if i add this line, the data which starts from Y U Y V Y U Y V will be reformated as Y V Y U Y V Y U. Please let me know this way is acceptable. Thanks and Regards, Yoo + +Yoo, it cannot be done in VIP. VIP cannot just shift 2 bytes. Instead of VIP doing it, can you ask sensor/decoder to drop, or shift start position? Rgds, Brijesh + +Hi Brijesh, Thanks for your help. Could you tell me more about where to modify the sensor to postpone the starting point two bytes behind? Is that part in ti_components/drivers/pdk_01_10_03_07/packages/ti/drv/vps path? Regards, Yoo + +Yoo, No, it depends on the sensor that you are using. If sensor supports it, you could shift in sensor. In VIP, you could swap the bytes, but cannot shift. Rgds, Brijesh + +Hi Brijesh, If i want to swap U data with V data, how could i access to data? In VIP, there are addr element of FVID2_frame and ((System_VideoFrameBuffer*)(sysBuf->payload))->bufAddr[0]. Which one that i need to use? Also, i really appreciate if you guide me to swap those data efficiently. Thanks again. Regards, Yoo + +Hi Yoo, FVID2_Frame address is what driver uses.. If you set the output frame format to YVYU from YUYV, then chroma is swapped. Regards, Brijesh + +Hi Brijesh, I wonder how the UV channel data is arranged in second plane of frame when the data format is YUV420_SP. I tried to set some value of output frame as 0 and checked that values were changed. At first, i thought it organized as order of U V U V U V. However, when i swapped the value of U with value of V, the output was not changed. The below line is what i used to set some value of frame as 0. memset(((System_VideoFrameBuffer*)(sysBuf->payload))->bufAddr[1], 0, sizeof(unsigned char) * 115200); And this is what i used to swap the U data with V data. for (i = 0; i < 102400; i+=2) { unsigned char tmp = (unsigned char)(*((unsigned char*)pFrame->addr[0][1] + i)); *((unsigned char*)pFrame->addr[0][1] + i) = (unsigned char)(*((unsigned char*)pFrame->addr[0][1] + i + 1)); *((unsigned char*)pFrame->addr[0][1] + i + 1) = tmp; } I think the data is not arranged as i assumed. Could you please let me know the order of U/V data in second plane? Thanks and Regards, Yoo + +Hi Yoo, Yes, for YUV420 output, chroma plane would have U followed by V and so on. When you say, it is not working, what does it mean? You don't see bytes swapped in memory? Is your buffer cached/ In that case, you would require to invalidate cache before updating buffer and then write back cache after updating. + +Hi Brijesh, Yes, i didn't see any bytes swapped. The frames that are shown in display were all same with before i apply swap the data. I applied swap in capture link of vip_capture directory. What i can't understand, if the cause of my problem is not invalidating/updating cache, why memset function works well... Anyway, I'm going to try to use cache function and reply in this thread. Thanks and Regards, Yoo + +Hi Byeongheon Yoo, Any further update on this question? Is it resolved? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/847104.txt b/data2/text/range/0-5000/847104.txt new file mode 100644 index 0000000000000000000000000000000000000000..1671cef33de0785a17f8bb463732e213c2aaf5bd --- /dev/null +++ b/data2/text/range/0-5000/847104.txt @@ -0,0 +1,24 @@ +Ticket Name: Compiler/TDA2EVM5777: How to enable/use the C++ libraries for the usecases? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI C/C++ Compiler Hi, I am trying to do the post processing on the tidl_postprocessing link and want to write my own functions on this link. I have replaced the tidl_postproc link from A15 to DSP1 to utilize my DSP. How can I simply add the libraries into the same code and kick start my post processing. Thank you. With best regards, Owais + +Responses: +HI, If you want to write your own function then go ahead and write and build the code. For adding your library please take a reference of below file \vision_sdk\apps\MAKEFILE.MK Regards, Anuj + +Hi Anuj, Thank you for your reply. I tried to add the vector library and call the std or other functions in the tild_postproc file but it gives me error. Moreover, the reference you have added, I can find the vlib added into it but still can't find the STL for C++. Can you help me with it. Thank you. With best regards, Owais + +Hi, If you want to add for dsp then add something like below DSP_ALG_LIBS += $($(MAKEAPPNAME)_PATH)/src/rtos/alg_plugins/commonutils/lib/commonutils_c66xdsp_$(PROFILE_c66xdsp_1).ae66 And build without using -s option and check while linking the lib is present. Please make sure the library you are adding is compatible with c66x architecture. Regards, Anuj + +Hi Anuj, Thank you once again for your quick response. I have added as per your suggestion but I am still having the compilation error. + +Hi, These are different error and not related to any library issue. inData_c is declared but you are not using that variable so you are getting these error. Please try to resolve this error by yourself or google it. These generic C query and not related to TI specific. Regards, Anuj + +Hi Anuj, These are not errors but are just warnings. The code works fine with these warnings. However, when I add the std function into it, it generates the error which probably either due to the proper linking of the c++ library or may be it is not supported in it. With best regards, Owais + +Hi, Is there anyone else can answer this problem. Thank you. With best regards, H.M. Owais + +Hi Owais, as Anuj is out of office I will ping other VisionSDK experts to help, they will reply here soon. Regards, Yordan + +If you are trying to build C++ file, you can follow the example under ~/vision_sdk/apps/src/rtos/alg_plugins/common/sample.cpp. You can also refer to below document regarding C++ support in C6000 compiler. You can find what's supported and what's not. + diff --git a/data2/text/range/0-5000/847218.txt b/data2/text/range/0-5000/847218.txt new file mode 100644 index 0000000000000000000000000000000000000000..9901f9e49798aad0f5cb45c795cbd74f6b75d568 --- /dev/null +++ b/data2/text/range/0-5000/847218.txt @@ -0,0 +1,27 @@ +Ticket Name: DRA756: How deal with DRA74x/TDA2x PCIe soft reset signal? + +Query Text: +Part Number: DRA756 Other Parts Discussed in Thread: PCF8575 According to the guide in the following link, http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_Kernel_Drivers.html?highlight=pcie#pcie-end-point There is no setting of the reset pin of PCIe (for EP nor RC). diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts +index eedd930..93d9f17 100644 +--- a/arch/arm/boot/dts/dra7-evm.dts ++++ b/arch/arm/boot/dts/dra7-evm.dts +@@ -1084,7 +1084,7 @@ + vdd-supply = <&smps7_reg>; + }; + +-&pcie1_rc { ++&pcie1_ep { + status = "okay"; + }; How to deal with the PCIe software reset signal on EVM? just ignore it? How about the hardware connection to RC device? + +Responses: +Hi, I can only tell about hardware details of PCIe SW reset. This signal assertion, similarly to few other features on EVM, is accomplished via an external GPIO IC. IC type: PCF8575 IC ref: U58 Connected to: I2C1 of DRA75x I2C address: 40h PCI_SW_RESETn is on pin: 14 (D hex) Hope some of these helps. + +Note that this reset will not propagate if PCI_RESET_SEL is high, which is selected by SW5-8 set to OFF. + +Thank you for your reply. I know where the PCIe-sw-reset connects on hardware, What I want to know is, how to link it with PCIe controller, especially in Linux. in reference design shown in http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_Kernel_Drivers.html?highlight=pcie#pcie-end-point &pcie1_ep { + status = "ok"; +}; No binding of the gpio to PCIe controller. + +I don't know the history for that. I hope this will get answered soon in this thread. Perhaps this wasn't implemented in Linux because Reset is not a mandatory signal for PCIe devices. Regards, Stan   + diff --git a/data2/text/range/0-5000/847737.txt b/data2/text/range/0-5000/847737.txt new file mode 100644 index 0000000000000000000000000000000000000000..d852a030abb60582f8a233bcd25b938dbf0ee048 --- /dev/null +++ b/data2/text/range/0-5000/847737.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: Exploring the Vlib and other libraries for the purpose of post processing of semantic segmentation + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Dear TI experts, Currently, I am trying to do find some useful functions for the post processing of my semantic segmentation done on the tda2. I have some questions and would love to have your expertise on it. 1. How to use the Vlib at the tild_postproc link, any example will be much appreciated. 2. Is there any similar function as convex hull algorithm in Vlib or any other library for DSP which I can utilize for the same purpose? 3. What is the purpose of function connected components and how to use it? any example would help a lot. Thank you. With best regards, Owais + +Responses: +I have forwarded this thread to the experts that may be able to help. + +Hi Owais, We dont have optimized convex hull algorithm in vlib. Connected component labelling API, gives different label to different pixel level connected object information. This API comes with sample test application in vlib package, kindly go through the provided test case there to understand the functionality in details. Regards Deepak Poddar + diff --git a/data2/text/range/0-5000/848577.txt b/data2/text/range/0-5000/848577.txt new file mode 100644 index 0000000000000000000000000000000000000000..edc4b1f995c6ba0074fed53c997e6ccec40fa63f --- /dev/null +++ b/data2/text/range/0-5000/848577.txt @@ -0,0 +1,22 @@ +Ticket Name: [TIDL_J7] Import and infer Example for jSegNet. + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, After look into the tidk_j7_00_09_01_00 package, there is no import example for jSegNet. I only see segmentation_list_x.txt in test/testvecs/config. Can TI provide an example for jSegNet import and infer ? Charles + +Responses: +Sorry, it's tidl_j7_00_09_01_00 not tidk_j7_00_09_00_00. + +Hi Charles, Can you check if you have ti_dl\test\testvecs\config\infer\internal\caffe\tidl_infer_jSegNet.txt? In case it is not there please wait for 1.0 release happening towards the end of this month. Regards, Rishabh + +Hi, The infer file is there, but there is no import file and corresponding caffe model, sample image and label files. Will these files be attached in the 1.0 release ? Charles + +Hi Charles, Sorry for the delayed response. We are using this network for internal TIDL validation and it is not a part of 1.0 release. We will validate a public version of this network and share with you. Regards, Rishabh + +Hi, Thanks. We also need an example talking about "how to import the segmentation model". I didn't see the details in the j7 tidl documents. (Only an example for classification model) We have several segmentation models already running in TDA2 and would like to test them in TDA4 EVM. Hope you can help it! Charles + +Hi, Rishabh Do you have a date for validating the public version of jSegNet? Charles + +Hi Charles, I will be able to look at this next week. Regards, Rishabh + +Hi Charles, You can download the caffe model from https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.17/trained/image_segmentation/cityscapes5_jsegnet21v2/sparse. Deploy.prototxt needs to be changed slightly. Modified file is attached 3005.deploy.prototxt Regards, Rishabh + diff --git a/data2/text/range/0-5000/849905.txt b/data2/text/range/0-5000/849905.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c5b32fb39c1411f523b0ac1ba0f22b1d5fd9435 --- /dev/null +++ b/data2/text/range/0-5000/849905.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2-17: Internal Temperature sensor Accuracy + +Query Text: +Part Number: TDA2-17 Hello Is the internal temperature sensor accuracy guaranteed to +/- 2 deg C over the entire temp range (-40degC to 125degC) ? The DM(TDA2x_AAS_SR2.0_DM_vB) does not state explicitly this. Thanks ! Regards, Cristian. + +Responses: +Christian, Yes our testing shows a +/- 2 degC accuracy over the full temperature range. Regards, Kyle + diff --git a/data2/text/range/0-5000/851004.txt b/data2/text/range/0-5000/851004.txt new file mode 100644 index 0000000000000000000000000000000000000000..8888118dadc8746bb3cfa4ef658f4aafd5946674 --- /dev/null +++ b/data2/text/range/0-5000/851004.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: How to add GrpxSrcLink_drawCpuLoad() in the usecase + +Query Text: +Part Number: TDA2EXEVM Hi sir, As your suggestion in previous thread ( e2e.ti.com/.../849828 ) to show CPU loadings by using GrpxSrcLink_drawCpuLoad(). However, there are no usecase using this function. So I have no idea how to use it. Can you provide me in more detail? I tried to add GrpxSrcLink_drawCpuLoad() into OD usecase. However, an error was occurred when compiling. It said chains_tidlODAppObj is incompatible with GrpxSrcLink_Obj. And I observed that the usecase "1CH VIP capture + Display" can show cpu load without using GrpxSrcLink_drawCpuLoad(). Can you advise me where should I add the function? Thank you, Gary + +Responses: +Hi, You need to update PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\src\rtos\modules\grpxSrc\grpxSrcLink_tidl_od_layout.c. You can grep GrpxSrcLink_drawCpuLoad in the folder PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\src\rtos\modules\grpxSrc to see how to call this API. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/851009.txt b/data2/text/range/0-5000/851009.txt new file mode 100644 index 0000000000000000000000000000000000000000..f35954292e11dcb9070063ae6b61688c6de1024c --- /dev/null +++ b/data2/text/range/0-5000/851009.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2EXEVM: How to get a single frame from camera? + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi sir, I would like to get a single frame frame camera. How can I do this in a usecase? Thank you, Gary + +Responses: +Gary, I did not get you, you want to capture single frame from camera? You could start the capture module, once first frame is captured, you could stop the capture device/camera. Rgds, Brijesh + +Gary, You can run app_single_cam demo. Once the preview is running press 's' to save RAW and YUV images to the SD card. Regards, Mayank + +Hi Mayank, I couldn't find app_single_cam in TDA2 usecase. Can you advise where to find it? Thank you, Gary + +Hi Brijesh, My goal is to get a frame into a buffer and doing further processes. eg. I have added a camera capture link in tidlOD usecase. Now, I would like to create a new buffer and put a camera frame into it. Can I do this? If yes, how should I do? Thank you, Gary + +Hi Gary, Which capture link you are using? There are two capture links, VIP Capture link and ISS capture link. I think VIP capture link does not support dumping a frame into a specific buffer. But ISS capture link supports this feature. You would require to port this feature from ISS capture link to VIP capture link.. Rgds, Brijesh + +Hi Brijesh, I'm using the VIP way to capture image. Is it possible to do this: I'll set a flag. When the flag is false, the camera will drop all the frames. When the flag is true, a function will get frames until flag is set to false. If above case is possible, how can I do this via VIP capture link. Thank you, Gary + +Hi Gary, Unfortunately no. there is no feature like flag based capture in the VIP link. You would have to add it. Another way is, you could register an application callback, start the capture and after you get this capture, dump the frame and stop the capture. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/851562.txt b/data2/text/range/0-5000/851562.txt new file mode 100644 index 0000000000000000000000000000000000000000..b96787650c0989aad3a1a92e738adbb081ef1e7c --- /dev/null +++ b/data2/text/range/0-5000/851562.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2E: 24.10 Gigabit Ethernet Switch (GMAC_SW) in Literature Number: SPRUI29F November 2015–Revised October 2018 + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 HI, We use Cortex®-A15 microprocessor unit (MPU) subsystem on TDA2x ,and we want to driver GMAC_SW on A15 (MPU) subsystem. We have PROCESSOR_SDK_VISION_03_06_00_00 soft package,and the guide document of package is attached. My question is: 1. Where is GMAC( on TDA2x) driver code in PROCESSOR_SDK_VISION_03_06_00_00 soft package? 2. How to build the GMAC driver code into .out file? Thanks Dengfei Li VisionSDK_Getting_Started_Guide.pdf + +Responses: +Hi, can you check in "PROCESSOR_SDK_VISION_03_06_00_00\ti_components\networking\nsp_gmacsw_4_16_00_00" Regards, Yordan + +HI , PROCESSOR_SDK_VISION_03_06_00_00\ti_components\networking\nsp_gmacsw_4_16_00_00" DO NOT be built into kernel in PROCESSOR_SDK_VISION_03_06_00_00 package can you solve the second question below ? 2. How to build the GMAC driver code into .out file? Thanks Dengfei Li + +There are 2 options for GMAC driver support on TDA2 running Vision SDK. - Option 1: TI RTOS GMAC driver on M4. This is provided by nsp_gmacsw_4_16_00_00 and it is pre-built. VSDK will link the libraries from NSP package. It is included by defining NDK_PROC_TO_USE=ipu1_1 under ~\vision_sdk\apps\configs\tda2xx_evm_bios_all\cfg.mk. - Option 2: Linux Ethernet driver on A15. If you build the Linux Vision SDK and run Linux on A15, the ethernet driver is provided in Linux kernel by default. Regards, Stanley + +HI Stanley, Thanks for your answers firstly. There are 2 questions to need you help below: 1. We use A15 on TDA2x,and I see "NDK_PROC_TO_USE=a15_0" in ~\vision_sdk\apps\configs\tda2xx_evm_bios_all\cfg.mk. Now I want to know: what's the directory of the ethernet driver( GMAC_SW on TDA2x soc) provided in Linux kernel by default? 2. We use realtek PHY IC(RTL9000A) to connect GMAC_SW(on TDA2x),what's the directory of PHY driver for realtek in linux kernel ? if I know dir of PHY driver in liunux kernel,I can use it as base and change it according to new RTL9000A driver code. Thanks a lot Dengfei Li + +1. This is still using TI RTOS driver under nsp. To build for Linux, please refer to ~/vision_sdk/docs/Linux/VisionSDK_Linux_UserGuide.pdf. 2. Once you follow the Linux User Guide, the Linux 4.4 kernel will be installed. Please refer to Linux kernel documentation for ethernet driver. + +HI Stanley, Sorry for your misunderstanding my meaning. I want to know exactly "detailed directory" in in Linux kernel for Option2 below: - Option 2: Linux Ethernet driver on A15. If you build the Linux Vision SDK and run Linux on A15, the ethernet driver is provided in Linux kernel by default. Thanks Dengfei + +Linux kernel documentation will provide that information. + +HI , I do not find the detail directory of GMAC( on TDA2x) driver code for A15 (MPU) subsystem in linux kernel documents Could other engineer tell the directory below? What's the detailed directory of GMAC( on TDA2x) driver code for A15 (MPU) subsystem in PROCESSOR_SDK_VISION_03_06_00_00 soft package? Thanks a lot Dengfei Li + +Please follow the Linux user guide first to clone Linux kernel from public repo. Vision SDK doesn't come with Linux kernel since it is open source. All Linux drivers are under ~/ti_components/os_tools/linux/kernel/omap/drivers/. Please note we don't provide training on Linux since it is open source. + diff --git a/data2/text/range/0-5000/851869.txt b/data2/text/range/0-5000/851869.txt new file mode 100644 index 0000000000000000000000000000000000000000..251e0e8b1eb096cd19a3118aa87f3d880c68a9e9 --- /dev/null +++ b/data2/text/range/0-5000/851869.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HV: How to build Ti-DL with PSDK on Linux ? + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hi, I found Ti-DL source code in Ti-DL . and I am using PROCESSOR_SDK_LINUX for TDA2. I unzipped the PSDK package and its has following arch: cd PROCESSOR_SDK_VISION_03_07_00_00/ ls Index.html Processor_SDK_Vision_manifest.html ti_components uninstall uninstall.dat vision_sdk VisionSDK_Getting_Started_Guide.pdf When I want to build Ti-DL code on my Linux, it tell me (in tidl-api/0makefile) : # makefile for building from the tidl-api git repo # Cross-compilation requires TARGET_ROOTDIR to be set. # E.g. # PSDK_LINUX= # TARGET_ROOTDIR=$PSDK_LINUX/linux-devkit/sysroots/armv7ahf-neon-linux-gnueabi My questions are : 1. what is PSDK , isn't my PROCESSOR_SDK_VISION_03_07_00_00 folder? 2. how to get one "PSDK" 3. if Ti-DL is in PSDK source code , how can I build it ? + +Responses: +Hi @he zhan, TIDL is included as part of VisionSDK, please check the document "PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_TI_DeepLearning.pdf". The library itself is located in folder "PROCESSOR_SDK_VISION_03_07_00_00/ti_components/algorithms/REL.TIDL.01.01.03.00". You may need first to look at "PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/docs/UserGuides/VisionSDK_UserGuide_TDA2xx.pdf" first to get familiar how to set up and build the SDK. Regards, Yordan + diff --git a/data2/text/range/0-5000/851913.txt b/data2/text/range/0-5000/851913.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b76afc8632b3ef1f4ac473e9e27a83372b0b3ce --- /dev/null +++ b/data2/text/range/0-5000/851913.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: TDA2 EVE computing power issue + +Query Text: +Part Number: TDA2SX in this problem 's response in e2e.ti.com/.../615108 "Let me first define the terminology (at least used by me in my response) FLOPS: Single precision Floating point operations MAC: Multiply + Accumulate operation. 1 MAC is equivalent to 2 operations DLOPS: In Deep learning, as you said half float or even 8-bit fixed point data type is sufficient. So in the above slide DLOPS refers to 8-bit arithmetic or conditional operation (Multiply/Add/Compare). So you can assume 1 MAC = 2 DLOPS" But, I think that (MAC: Multiply + Accumulate operation) means 2 floating operations, DLOPS: if using 8-bit fixed point data type, 1 MAC = 2 DLOPS floating operations=2 DLOPS *4 8-bit fixed point data type operations so 4EVE @900 MHz = 4*16*900 GMACS = 57.6 GMACS should be = 57.6*8=460.8Glops is that right? + +Responses: +Hi, 57.6 GMACS is already accounting for 4 EVE's, why did you again multiplied by 4 in the below calculation : DLOPS floating operations=2 DLOPS *4 Regards, Anshu + +Hi, Is this query still open? Regards, Anshu + diff --git a/data2/text/range/0-5000/852234.txt b/data2/text/range/0-5000/852234.txt new file mode 100644 index 0000000000000000000000000000000000000000..ee47c93b24e06af6c37345b7f45adeed227c1253 --- /dev/null +++ b/data2/text/range/0-5000/852234.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: TDA2s boot + +Query Text: +Part Number: TDA2SX HI。 Ｉ　ｓｅｔ　ｂｏａｒｄ　　ｂｏｏｔ　ｆｒｏｍ　ｅｍｍｃ． ｂｕｔ　ｗｈｅｎ　I　　ｗａｎｔ　ｔｏ　ｄｖｒ　ｉｎ　ｔｈｅ　ｓｄ　ｃａｒｄ，　ｔｈｅｎ　　ｉ　ｐｌｕｇ　ｔｈｅ　ｓｄ　ｃａｒｄ　，ｔｈｅ　ｂｏａｒｄ　ｃａｎ　ｎｏｔ　ｂｏｏｔ　ｆｒｏｍ　ｅｍｍｃ，ｂｅｃａｕｓｅ　ｉｔ　ｔｈｉｎｋ　ｔｈｅ　ｓｄ　ｃａｒｄ　ｉｓ　ｂｏｏｔ　ｄｅｖｉｅｃｅ．ｈｏｗ　ｃａｎ　　ｉ　ｓｌｏｖｅ　ｉｔ．（ｓｄ　ｃａｒｄ　ｉｓ　ｅｍｐｔｙ，ｓｏ　ｔｈａｔ　ｈａｓ　ｎｏ　ｂｏｏｔ　ｆｉｌｅ　ｉｎ　ｔｈｅ　ｓｄ　ｃａｒｄ）． my boot mode is : support boot from sd ,emmc . + +Responses: +Hi, can you share which SYSBOOT settings you use for emmc boot? Regards, Yordan + +hi ,i Set sysboot [5:0] 000010 + +Hi, can you try to set sysboot [5:0] to 000111. Your value sets the boot order to USB -> SD card -> eMMC, you can look at "Table 29-9. Booting Devices Order" in device's TRM: Regards, Yordan + diff --git a/data2/text/range/0-5000/853822.txt b/data2/text/range/0-5000/853822.txt new file mode 100644 index 0000000000000000000000000000000000000000..e17bc7d06b8e8a2f823aeaececedead279e3136c --- /dev/null +++ b/data2/text/range/0-5000/853822.txt @@ -0,0 +1,18 @@ +Ticket Name: CCS/TDA2EX17EVM: TDA2, Boot from SD card, and flash the image onto EMMC? + +Query Text: +Part Number: TDA2EX17EVM Tool/software: Code Composer Studio Hi Champs: I wonder if the TDA2 can Boot from SD card, and flash the image onto EMMC? If yes, where is the document to explain the detail about this? BR Rio + +Responses: +Hi Rio, Please refer here : . This is for other Boards, but steps should be similar and you can take reference from it + +Hi R. The link is for Linux. Do you have the RTOS version? BR Rio + +Hi Rio, Please refer to these links and see if it is helpful. Particularly this point : "You can refer to mmc app present here: PROCESSOR_SDK_VISION_03_03_00_00\ti_components\drivers\pdk_01_09_00_17\packages\ti\csl\example\mmcsd\mmc_raw_access\. We don't have a lot of SW support for eMMC on RTOS side. I would recommend you to use QSPI or NOR flash for storing data instead of eMMC." e2e.ti.com/.../495282 + +Hi R. So, you mean to boot from the QSPI / NOR flash directly? And dont need to use the EMMC boot? Is my understanding correct? BR Rio + +Hi Rio, Yes you can boot from QSPI flash or NOR and there is no need for eMMC boot. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/0-5000/854137.txt b/data2/text/range/0-5000/854137.txt new file mode 100644 index 0000000000000000000000000000000000000000..342deb1bd2b424f97745a03b8d14678683604940 --- /dev/null +++ b/data2/text/range/0-5000/854137.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2-17: TDA2 Linux Link from TI.com is not working + +Query Text: +Part Number: TDA2-17 http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html Hi. I try to download the rootfs / Linux Bin, those 2 links are broken. Can someone fix it? Otherwise, we cannot support the customer. THanks. BR Rio + +Responses: +Hi Rio, I have asked moderators to look at this issue. I have shared an internal link via mail from which you can download rootfs and linux bin. Regards, Rishabh + +Thank you very much, Rishabh. + diff --git a/data2/text/range/0-5000/855028.txt b/data2/text/range/0-5000/855028.txt new file mode 100644 index 0000000000000000000000000000000000000000..35258f14169d7e6ccc768a855de1356570396b56 --- /dev/null +++ b/data2/text/range/0-5000/855028.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VMXEVM: 32.768KHz + +Query Text: +Other Parts Discussed in Thread: TDA2 In PROC079E2A SCH, component U152 and Y8 can be saved if we use PROC078E5 (Locationn Y8) as SOC 32.768KHz source? One is using RTC (Coin Batt) Power and The other is using SOC standby power, right? + +Responses: +Hi Alex, TDA4 doesn't include a RTC hardware on-chip like TDA2 did. If your design requires "real" RTC function, external RTC IC/crystal/battery must be used. The 32.768k crystal connected to the SoC is for an optional oscillator used in some low-power modes, for example, for precise clocking of timer modules. Regards, Stan + diff --git a/data2/text/range/0-5000/855439.txt b/data2/text/range/0-5000/855439.txt new file mode 100644 index 0000000000000000000000000000000000000000..7523bf4f4d9c46ee596ff8bb5fb9fde19f5c7973 --- /dev/null +++ b/data2/text/range/0-5000/855439.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2-17: About TDA2 Wiki + +Query Text: +Part Number: TDA2-17 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi. http://processors.wiki.ti.com/index.php/TDA2x Most of the link on the above TDA2 Wiki are going. For ex: There is a product preview paper on TDA2x; 595-ADAS Applications Processor TDA2x System-on-Chip Technical Brief – OCTOBER 2013 http://focus.ti.com/general/docs/video/Portal.tsp?entryid=0_00ag9mtw&lang=en&DCMP=pro-ap-tda2x-131016&HQS=pro-ap-tda2x-pr-v2 Can anyone to fix the TDA2 wiki? THanks. BR Rio + +Responses: +Hi Rio, There are multiple documents for TDA2 available here: http://www.ti.com/tool/TDA2EVM5777#technicaldocuments Are you looking for a particular document that you cannot find? Regards, Rishabh + diff --git a/data2/text/range/0-5000/855954.txt b/data2/text/range/0-5000/855954.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c804eeb2d233694631e5bd061f199dd6cb223a0 --- /dev/null +++ b/data2/text/range/0-5000/855954.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: How to get a single frame from camera? + +Query Text: +Part Number: TDA2EXEVM Hi sir, As my previous thread ( ) I still not solve my problem, so I start a new post here. --- I'm using VIP way to capture image. Is it possible to do this: I'll set a flag. When the flag is false, the camera will drop all the frames. When the flag is true, a function will get frames until flag is set to false. If above case is possible, how can I do this via VIP capture link. Thank you, Gary + +Responses: +Gary, The VIP driver is a streaming model. As long as the application provide a frame for capture, the driver will capture it. If the application stops providing the buffer, the driver will drop the frames automatically. You should use this default behavior for achieving your usecase. Regards Sivaraj R + +Hi, We haven't heard back from you on this and we hope you were able to solve your issue. We are closing this thread. If you have any more follow-up, feel free to raise another thread. Regards Sivaraj R + diff --git a/data2/text/range/0-5000/856226.txt b/data2/text/range/0-5000/856226.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e9c538058d2402848c28227e5682de1063c6645 --- /dev/null +++ b/data2/text/range/0-5000/856226.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: Where and how to get the demo input clips? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Dear Sirs: We are using PROCESSOR SDK VISION 03_07_00_00. We build the TDA2 RTOS demo and run the code to test on the EVM. We want to test the case Single Camera Usecases 1CH VIP capture (HDMI) + FrontCam Analytics 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx, EVEx) + Display (HDMI) After execute, we play the input vide in NB and output to the HDMI which is connect to EVM HDMI input, however the result is not good. We know that TI has demo clips of this case, I just want to know where and how we can get it? Regards, /ckhsu + +Responses: +Hi Hsu, The demo clips are here: https://cdds.ext.ti.com/ematrix/common/emxNavigator.jsp?objectId=28670.42872.30602.25095 Thanks and Regards Piyali + +Hi Piyali: Thank you very much. Regards, /ckhsu + diff --git a/data2/text/range/0-5000/857661.txt b/data2/text/range/0-5000/857661.txt new file mode 100644 index 0000000000000000000000000000000000000000..559a73dc1ff971a454525d5539b316fd00443e46 --- /dev/null +++ b/data2/text/range/0-5000/857661.txt @@ -0,0 +1,14 @@ +Ticket Name: [TDA4M] EMIF avatar tool + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi~ I want to find the best register through DDR4 stress test. At tda2 there was an avatar EMIF TOOL.( www.ti.com/.../SITARA-DDR-CONFIG-TOOL TOOL&tisearch=Search-EN-everything) There was a 0.3 version of the EMIF tool, so I tested ddr4 on uboot. Do you have avator EMIF TOOL in tda4? And ask if you can provide it later. thanks Regards, kyungtae + +Responses: +Kyungtae, The EMIF DDR tool is available on CDDS: https://cdds.ext.ti.com/ematrix/common/emxTree.jsp?objectId=28670.42872.34616.54449&fromContent=true Regards, Kyle + +Hi, Kyle. As I mentioned, the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool.xlsm file already knows.(version 0.3) this EMIF TOOL extracts the register for the DDR I want. Create register with dts file and gel file. But what I want is AVARTAR EMIF TOOL which does DDR trainning like TDA2. At TDA2 (AVARTAR_EMIF_TOOL) creates a project in CCS to extract the optimal register after DDR stress test. I mean this Avartar emif tool. Thanks, Regards, kyungtae + +Hi Kyungtae, The TDA2x Avatar_EMIF_Tool did contain a CCS project that swept DLL values to optimize settings and account for system level timing skews. Similarly, the TDA4M has hardware algorithms inside the PHY which perform a similar function to optimize DLL values based on skews introduced in the system, such as the PCB routing. By using the hardware algorithms, this simplifies the procedure to quickly bring up new boards, and also allows each system to have unique settings and compensate for any board-to-board skew differences. The XLS tool Kyle has referenced already has the hardware training support enabled during initialization. Thus, the parameters are being optimized each boot cycle on TDA4M. Additional details regarding which parameters are trained can be found in section 8.2.4.7.9 (Memory Controllers -> DDR Subsystem -> DDRSS Functional Description -> DDR PHY Functional Description -> Training Support) of the TRM. Since hardware algorithms are used on TDA4M, the use of software (such as the Avatar EMIF Tools) is not required or supported. Best regards, Kevin + +Hi, Kevin. Thank you for the detailed explanation. Thanks. Regards, kyungtae + diff --git a/data2/text/range/0-5000/858093.txt b/data2/text/range/0-5000/858093.txt new file mode 100644 index 0000000000000000000000000000000000000000..be537c16ab633134155064d943d45c06cb331e7d --- /dev/null +++ b/data2/text/range/0-5000/858093.txt @@ -0,0 +1,30 @@ +Ticket Name: J7 TDA4 EVM - eDP Display support + +Query Text: +Other Parts Discussed in Thread: TDA2 Hello all, We have received J7 SOM , Common Processor Board and Fusion Daughter board. We don't have the fan on the heat sink . Is it required to connect the FAN ? Is display is supported in common processor board ? I find two display ports in the Common Processor board. We have a eDP connector cable. In other end what to connect ? Can I connect HDMI ? Regards, Gokul + +Responses: +Hi Gokul, In case you have heat sink, you don't need fan. You can connect Display Port to a DP monitor. For HDMI you need infotainment daughter card. Regards, Rishabh + +Hi, You can also refer to psdk_rtos_auto_j7_06_01_00_15/psdk_rtos_auto/docs/user_guide/evm_setup_j721e.html Regards, Rishabh + +Thanks Rishabh. Regarding the power supply for evm , it is mentioned that "The power supply current requires more than 1A @12V input " Is it correct ? Please confirm. Regards, Gokul + +Hi Gokul, Did you receive a power adapter with the EVM? If yes then please use the same. Regards, Rishabh + +Hi Rishabh, We have not received the power adapter. Regards, Gokul + +Gokul, I am using the same power adapter as TDA2, same should work for you as well. Regards, Rishabh + +Hi Rishabh, We do not have TDA2 EVM board. Please let me know the power specification. Is the above values are correct ? Regards, Gokul + +Hi Gokul, It seems that you were working on TDA2Px by looking at the history of your forum posts. You can use the same power supply as the one used for TDA2Px. I have contacted Mistral for exact recommendation. Regards, Rishabh + +Hi Rishabh, I were working for J6-Customized board. Regards, Gokul + +Hi Gokul, You need to use the power adapter as recommended in the HW user guide. 12V/5A is the recommended supply. DigiKey Part# Manufacturer Manufacturer Part # SDI65-12-U-P6-ND CUI Inc. SDI65-12-U-P6 SDI65-12-UD-P6-ND CUI Inc. SDI65-12-UD-P6 - Pratap. + +Thanks Pratap for the confirmation. + +Hi, I am closing the thread as confirmed by Mistral. Regards, Rishabh + diff --git a/data2/text/range/0-5000/858285.txt b/data2/text/range/0-5000/858285.txt new file mode 100644 index 0000000000000000000000000000000000000000..070baca80b0616995665060a0a978be7478bbaa6 --- /dev/null +++ b/data2/text/range/0-5000/858285.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: Create an input file for a usecase that gets SYSTEM_BUFFER_TYPE_BITSTREAM data: + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 We have a tda2 VAYU application board and PROCESSOR_SDK_VISION_03_06 installed on my Ubunu 16.04PC. We are running tidl_od usecase. Our purpose is to create a new pair of index and mpeg file, that we can use in TIDL_SSD_CFG.TXT in order to run this example. Is there any documentation on how to create it? If so, can you direct me to it? Thanks + +Responses: +Hi Yoav, please check this E2E post: Regards, Yordan + diff --git a/data2/text/range/0-5000/859624.txt b/data2/text/range/0-5000/859624.txt new file mode 100644 index 0000000000000000000000000000000000000000..a889453ef7e11a4718c15e9a60ebb8827db06573 --- /dev/null +++ b/data2/text/range/0-5000/859624.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA3XEVM: Import OpenCV algorithm on TDA3X EVM + +Query Text: +Part Number: TDA3XEVM Hello all, I have an algorithm implemented in openCV and I want to import it on TDA3X EVM? . and can you also tell me also if TDA3X support importing algorithms from Tensor flow, Thanks in advance + +Responses: +Please refer EVE SW package documentation in the SDK for computer vision-related function and integration of the same in the system. For TensorFlow - ref the TIDL (Deep learning library SW) documentation. + +Hello Kumar, For openCV , you refer me to "EVE SW package documentation" , but unfortunately I can't find it , also I try to use this use case , I assign Alg_OpennCVCanny to DSP1 instead of APU as TDA3X EVM don't have APU. When I try to build the use case the following error appears. Error: Link [Alg_OpenCVCanny] cannot be assigned to CPU [DSP1] (Valid CPUs:[A15]) !!! Shall I able to import such algorithm on TDA3x ? thanks in advance + +EVE SW documantion can be found in the below ti_components/algorithms/eve_sw_01_19_00_00/eve_sw_releasenotes.pdf + +Hello Kumar, Thank you kumar for your illustration , but my question is that openCV library is supported on TDA3x or not. + +No Opencv is not supported in TDA3x + +Does opencv supported on TDA2XX? I want to created a new Link by opencv. + +Hello dolpy, I think you can use OpenCv on TDA2x ,I think you shall only follow points 1.3 & 1.4 in this document. file:///C:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_opencx.pdf + +Thanks + diff --git a/data2/text/range/0-5000/860672.txt b/data2/text/range/0-5000/860672.txt new file mode 100644 index 0000000000000000000000000000000000000000..3ffd45c5a17fb3b875e083506145f18919570e0b --- /dev/null +++ b/data2/text/range/0-5000/860672.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2EVM5777: TIDL is slower when the input is recorded video than the input is camera captured frame + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI C/C++ Compiler Hi, I'm testing the performance of TIDL in two case. First case is using the recorded video as input and second case is using the captured frame from camera sensor. When i compare the FPS of TIDL in above two case, the FPSs were different. The resolution of input were same in both case, moreover i used VPE link before feeding frame to TIDL. The chains of two case are below. - Video input (29.4 fps) NullSource (ch 1, 2, 3, 4) -> Merge -> Decode -> VPE -> Select -> tidlPreProc -> TIDL_EVE -> TIDL_DSP -> Merge -> NullLink - Camera input (30.3 fps) Capture (ch1, 2, 3, 4) -> VPE -> Select -> tidlPreProc -> TIDL_EVE -> TIDL_DSP -> Merge -> NullLink I removed TIDL_EVE and TIDL_DSP link in both case, to confirm whether the cause of difference is from different input link. However, the fps of both case were same as 30.x fps. Could you give me any clue to resolve this problem? Regards, Yoo + +Responses: +Hi, I do not understand why you use merge link for recorded frames. Please share the stats log by pressing p after running the usecase for 1 min for both cases. Regards, Anuj + +Hi, Its been long since any update on this threads. I hope the issue is resolved. if not then please reply below or create a new thread for different issue. Regards, Anuj + diff --git a/data2/text/range/0-5000/862226.txt b/data2/text/range/0-5000/862226.txt new file mode 100644 index 0000000000000000000000000000000000000000..ccf86a0548dcec1c463e688da2e88a962a3a105a --- /dev/null +++ b/data2/text/range/0-5000/862226.txt @@ -0,0 +1,22 @@ +Ticket Name: How to cross compile tidl-api-master (with examples) from source code with gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux toolchains? + +Query Text: +How to cross compile tidl-api-master (with examples) from source code with gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux toolchains? Can anybody give me a clue about it? + +Responses: +What is the SDK version and TIDL version that you are using ? Thanks, Praveen + +Hello, My version is Vision SDK 3.04. Thanks + +Could you point this folder "tidl-api-master " in SDK ? + +Thanks for the response, How can i do that? Could you please explain a bit? Should i do it by changing Makefile under "/../PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build" directory + +Hi, Which processor platform are you using ? Because vision_sdk is the software for TDAx platform and TI-DL is accessed through openVX framework, not through tidl-api-master. tidl-api-master runs on Sitara platform. + +My platform is tda2xx. I pointed makefile of the tidl source code from sdk makefile by adding $(MAKE) -C $(vision_sdk_PATH)/tidl-api-master . But after making some environment corrections in tidl make file i get some compile errors. First opencl version used in tidl code is different from the one in vision sdk 3.04. Second boost library is used in tidl and it is not exist in sdk. I dont know any other type of inconvenience will appear. What is the compatible versions of boost and opencl libraries for tidl source code? Any suggestion will be appreciated... i compiled boost and solved appeared errors making patch in the link below. https://patches.linaro.org/patch/59550/ Thanks + +I want to use "tidl-api-master" in "TDA2xx" platform. is it possible cross compile and use it with TDA2xx platform instead of Links and Chains Concept? There are very few TIDL example in VisionSDK with Links and Chains Concept. + +No, it is not possible. The TIDL software programming and support is different in these two SDKs Thanks, Praveen + diff --git a/data2/text/range/0-5000/864209.txt b/data2/text/range/0-5000/864209.txt new file mode 100644 index 0000000000000000000000000000000000000000..0729613309a4ec838049ae08a76dc77e31034218 --- /dev/null +++ b/data2/text/range/0-5000/864209.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2SX: PROCESSOR_SDK_RADAR + +Query Text: +Part Number: TDA2SX Tool/software: TI C/C++ Compiler Hi， I have two questions about processor radar SDK： 1、 Why not provide CCS projects? The CCS project is easy to debug and the code structure is clear. 2、 How to check the code structure in makefile mode? How to debug? Thanks a lot. + +Responses: +Hi, For processor radar/vision SDK, we do not provide CCS project. Its a makefile based build system. You can export entire vision SDK folder into any editor and do code browsing its upto your choice. Using CCS you can debug. Please check userguide and check load using using CCS. There you can add breakpoints, step through the code. Even if you boot using SD card then you can connect to any core(1st remove gel files for that core) and then load symbol instead of loading the program. Regards, Anuj + +Hi, Thank you for your reply,but how can code built on makefiles be ported to CCS? Is there any guidance document? The code structure built by makefile is too complicated. How to assemble a complete CCS project? Thanks a lot + +Hi, As told in earlier post, CCS based build is not supported. So you have to proceed with makefile based build. What kind of complication you are facing when you build with makefile and you think that will be resolved using CCS? Entire radar sdk can be exported to any code editor for code browsing. Just the building part you have to use makefile. regards, Anuj + diff --git a/data2/text/range/0-5000/864222.txt b/data2/text/range/0-5000/864222.txt new file mode 100644 index 0000000000000000000000000000000000000000..50da85aaa7c92f0e76f9e425df45753c1a7e0c8b --- /dev/null +++ b/data2/text/range/0-5000/864222.txt @@ -0,0 +1,16 @@ +Ticket Name: Does TI have Deep-Learning tools : Pruning, Quantization, Compression ? + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, expert: My customer is asking whether TI has the tools as following? Pruning Quantization (both post-training quantization and quantization aware training) Compression I can find some slides about Quantization in the TIDL training slides. it seems the Quantization is part of TIDL Import tool. Please kindly share your comments. Many thanks. + +Responses: +Hi, We are planning to publish tools for quantization - both post training calibration and quantization aware training. There are also several other training examples that we are including. It is expected to be made available at the following location very soon - hopefully in just a few days: https://git.ti.com/jacinto-ai-devkit/ In each repository at that link, click on the "about" tab to read the documentation for that repository. Also, here is a collection of the e2e queries related to jacinto-ai-devkit: https://e2e.ti.com/support/j721e/f/1026/tags/jacinto_2D00_ai_2D00_devkit When you post a question, you can include: jacinto-ai-devkit in the tags as you create the query, for a faster response. Best regards, Manu. + +Hi, Manu: Many thanks for the information regarding quantization tool. How about Pruning and Compression? Thanks. + +Hi Peter, This devkit can be used to train models for Jacinto7 TDA4x. Jacinto7 TDA4x does not benefit from sparsity. The MAC throughput is quite high anyway. So there is no point in applying pruning of weight coefficients like we used to do for Jacinto6 TDA2/TDA3. We need to add pruning/weight sparsity only if we want to enable training of sparse models for Jacinto6 TDA2/TDA3 through this devkit. We do not want to rule out adding that support - but it is not in the current plan. At present, you can use caffe-jacinto for that. + +To explain further, TIDL import tool does a simple calibration. It works reasonably well for common networks, but not so well for networks have Depthwise convolution layers. These is also a plan to address these short comings and implement advanced calibration in TIDL import tool for Jacinto7, but that will take a few months to be released. You can use jacinto-ai-devkit if: - you want to use advanced calibration before it is incorporated in TIDL import tool. - you want to use quantization aware training (which may be slightly better than advanced calibration). I hope it is clear. Let me know if you have further questions. + +Hi, We have make pytorch-jacinto-ai-devkit available. Please start by reading here: https://github.com/TexasInstruments/jacinto-ai-devkit It has tools to help with Calibration for Quantization and Quantization Aware Training. Best regards, Manu + diff --git a/data2/text/range/0-5000/864270.txt b/data2/text/range/0-5000/864270.txt new file mode 100644 index 0000000000000000000000000000000000000000..a35c665fb1baa34f1f1f8d73ca50637766a37abe --- /dev/null +++ b/data2/text/range/0-5000/864270.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2EXEVM: Un supported data format (FVID2_DF_BAYER_RGGB) + +Query Text: +Part Number: TDA2EXEVM Tool/software: Code Composer Studio Hi, I use TDA2EX_EVB connect to a camera. The sensor output is Bayer RGGB 12 bit RAW data. I am making a new chain IssCapture -> (Bayer RGGB 12bit -> RGB888 or YUV420 )-> Display_video I set : pPrm->videoIfMode = SYSTEM_VIFM_SCH_CSI2; pPrm->videoIfWidth = SYSTEM_VIFW_4LANES; pPrm->bufCaptMode = SYSTEM_CAPT_BCM_LAST_FRM_REPEAT; pPrm->outParams[0].dataFormat = SYSTEM_DF_BAYER_RGGB; pPrm->outParams[0].inCsi2DataFormat = SYSTEM_CSI2_RAW12 than I get a error meaasge [IPU1-0] 27.676538 s: dispcore/src/vpscore_dss.c @ Line 1111 [IPU1-0] 27.676599 s: Un supported data format [IPU1-0] 27.676691 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: [IPU1-0] 27.676752 s: Set DSS parameter failed [IPU1-0] 27.676813 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! The error message is from static Int32 VpsCore_dssGetRowInc() because the dataFormate = 0x0056 is FVID2_DF_BAYER_RGGB Is the setting correct? Is TDA2EX supported this color convert? + +Responses: +Hi, Display does not support Bayer format. You will need to convert Bayer format into RGB or YUV to get it displayed. Rgds, Brijesh + +Hi, Brijesh, Could you show me the sample code to convert Bayer RGGB to YUV? Best Regards, Jay + +Hi Jay, We don't have SW example for this conversion. There is a HW module, ISP, on TDA3x and TDA2Px, which can do this conversion.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/865167.txt b/data2/text/range/0-5000/865167.txt new file mode 100644 index 0000000000000000000000000000000000000000..525efacc3c94dfd7f6e86a65217bfc76e7e895bf --- /dev/null +++ b/data2/text/range/0-5000/865167.txt @@ -0,0 +1,33 @@ +Ticket Name: TDA2SX: Emotion recognition - TIDL import + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi to all, I am trying to import emotion recognition model and I am facing some difficulties. Model have 7 output classes. For every input image I have same output index (same class) and same output for every input image. I looked at deploy.prototxt and added flatten layers before every InnerProduct layer. Also, I am using sparse convolution, so with kernel_size: 5 I think there shouldn't be a problem for convolution layers, should it? I don't see any other limitation that could affect me, but it will be useful if some expert take a look at model and import file to check if I missed something.emotion-recognition.7z I am using TIDL 01.01.01.00 with PSDK 03.04.00.00. There are model files in attachment. Thank you in advance and regards, Sasa + +Responses: +8637.emotion-recognition.7z + +Hi Sasa, Form the "deploy.prototxt" it looks like TIDL can support all the layers, but in the deploy.prototxt, can you use different output names for different flatten layers and try? Also, Did out check that outputs correct with caffe inference on these input images and your model? Thanks, Praveen + +Hi Sasa, Did you get a chance to try out above suggestions? Thanks, Praveen + +Hi Pravenn, I only managed to try renaming flatten layers to have different names and there was no success. I have usually class 4 detected and for some of images class 5. layer { + name: "flatten1" + type: "Flatten" + bottom: "pool_3" + top: "flatten1" + flatten_param { + axis: 1 + } +} +layer { + type: "InnerProduct" + name: "hidden_1" + inner_product_param { + num_output: 200 + } + bottom: "flatten1" + top: "hidden_1" +} These are changes made. I did the same with different names for other flatten and innerProduct pairs of layers. Also I have a question about checking correctness. This same caffe model is tried on another platform and worked correctly (same model and same inputs) . I wanted to run it on TDA2 to have comparison, so I can confirm that model is correct. + +Hi Sasa, Ideally we expect this to work properly, but not sure where the problem is. So I would suggest to check the layer level outputs from import tool against the caffe reference outputs to identify which layer is causing the issue, please refer to section 3.8 (Matching TIDL inference result) in the TIDL user guide on how to do this. Thanks, Praveen + diff --git a/data2/text/range/0-5000/865591.txt b/data2/text/range/0-5000/865591.txt new file mode 100644 index 0000000000000000000000000000000000000000..e9cb2da976b6f30cdf43d6e6f159ec7742d481c6 --- /dev/null +++ b/data2/text/range/0-5000/865591.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2EVM5777: how about the EDMA in TDA4 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio i am trying TDA4EVM , how can i using EDMA move data from DDR to L2? befor in TDA2 visonsdk i find a sample about this (ti_SDK_VISION_03_04_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02) where can i find the same dma sample in TDA4 sdk (ti-processor-sdk-linux-automotive-j7-evm-06_01_00_05-Linux-x86-Install)? thanks! shuai + +Responses: +Hi Shuai There is no EDMA in the TDA4x device. Instead there is a UDMA and DRU for data routing. You can refer to the DMAUTILS in pdk/packages/ti/drv/udma/dmautils. This is part of Processor SDK RTOS Automotive. Thanks and Regards Piyali + diff --git a/data2/text/range/0-5000/866001.txt b/data2/text/range/0-5000/866001.txt new file mode 100644 index 0000000000000000000000000000000000000000..dd34d4f9c8a2155de02acda47f6348804ec4be3c --- /dev/null +++ b/data2/text/range/0-5000/866001.txt @@ -0,0 +1,22 @@ +Ticket Name: PROCESSOR-SDK-TDAX: I can't train ssdJacintoNetV2 in caffe-jacinto-model-0.17 with 768x320 size. + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Hi , when I use train_image_object_detection.sh to train ssdJacintoNetV2 in caffe-jacinto-model-0.17 with 768x320 size, an error list: when I switch to 512x512 is OK,and also switch to caffe-jacinto-model-0.16 is OK. why? I1216 17:11:22.872642 40400 solver.cpp:229] Starting Optimization on GPU 0 I1216 17:11:22.872648 40401 solver.cpp:229] Starting Optimization on GPU 1 I1216 17:11:22.872804 40400 solver.cpp:269] [MultiGPU] Initial Test started... I1216 17:11:22.872872 40400 solver.cpp:635] Iteration 0, Testing net (#0) I1216 17:11:22.872974 40428 common.cpp:550] NVML succeeded to set CPU affinity on device 0, thread 40428 I1216 17:11:22.873769 40429 common.cpp:550] NVML succeeded to set CPU affinity on device 1, thread 40429 I1216 17:11:23.038713 40400 net.cpp:1071] Ignoring source layer mbox_loss I1216 17:11:23.060695 40401 net.cpp:1071] Ignoring source layer mbox_loss F1216 17:11:23.424778 40401 solver.cpp:668] Check failed: result[j]->width() == 5 (3 vs. 5) *** Check failure stack trace: *** @ 0x7fec048d35cd google::LogMessage::Fail() @ 0x7fec048d5433 google::LogMessage::SendToLog() @ 0x7fec048d315b google::LogMessage::Flush() @ 0x7fec048d5e1e google::LogMessageFatal::~LogMessageFatal() @ 0x7fec054921e0 caffe::Solver::TestDetection() @ 0x7fec054950f7 caffe::Solver::TestAll() F1216 17:11:23.452100 40400 solver.cpp:668] Check failed: result[j]->width() == 5 (3 vs. 5) *** Check failure stack trace: *** @ 0x7fec05496406 caffe::Solver::Step() @ 0x7fec048d35cd google::LogMessage::Fail() @ 0x7fec054973d2 caffe::Solver::Solve() @ 0x7fec048d5433 google::LogMessage::SendToLog() @ 0x7fec0590628a caffe::P2PSync::InternalThreadEntry() @ 0x7fec048d315b google::LogMessage::Flush() @ 0x7fec048d5e1e google::LogMessageFatal::~LogMessageFatal() @ 0x7fec059c538c caffe::InternalThread::entry() @ 0x7fec054921e0 caffe::Solver::TestDetection() @ 0x7fec059c73eb boost::detail::thread_data<>::run() @ 0x7fec054950f7 caffe::Solver::TestAll() @ 0x7fec02dbe5d5 (unknown) @ 0x7fec05496406 caffe::Solver::Step() @ 0x7fec0288f6ba start_thread @ 0x7fec054973d2 caffe::Solver::Solve() @ 0x7fec030da41d clone @ (nil) (unknown) + +Responses: +Can you pls set chop_num_heads to 0 in caffe-jacinto-models/scripts/train_image_object_detection.sh and try training? + +Hi， It's amazing, it can work now, but I want to know what this parameter does. Why did it work on the previous version caffe-jacinto-model-0.16? + +It was some experimental option not supposed to be used in the final release. + +Hi Soyeb： Can I ask you a question： When marking targets with marking label software, what are the functions of marking attributes, such as occluded, truncation, difficulty and pose? How do I use it on ssdJacintoNetV2? Thank you very much! + +like this: 1280 720 3 0 VehicleFull Unspecified 0 0 474 257 495 275 + +You may find information about these attributes by looking at PASCAL VOC dataset. Also you may go through some blog like the following, https://towardsdatascience.com/coco-data-format-for-object-detection-a4c5eaf518c5 + +Hi Soyeb： I know what these tags mean, but what I want to know is how do I use these tags when I train the model? I can't find any place to call these tags, right? So what exactly do these tags do? Convenient data statistics? VehicleFull Unspecified 0 0 474 257 495 275 truncated: Indicates that the bounding box specified for the object does not correspond to the full extent of the object. For example, if an object is visible partially in the image then we set truncated to 1. If the object is fully visible then set truncated to 0 difficult: An object is marked as difficult when the object is considered difficult to recognize. If the object is difficult to recognize then we set difficult to 1 else set it to 0 + +Now I understand the question better. 'pose' and 'truncated' are not used in the code. However 'difficult' is used. Pls look at the config param, use_difficult_gt. You may refer the caffe-jacinto code to find out how exactly it is used? + diff --git a/data2/text/range/0-5000/866034.txt b/data2/text/range/0-5000/866034.txt new file mode 100644 index 0000000000000000000000000000000000000000..e964a00776578785c5203009f76939a70b5ed62e --- /dev/null +++ b/data2/text/range/0-5000/866034.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/AM5749: AM574x IDK target configuration + +Query Text: +Part Number: AM5749 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Dear TI Team, There is no target configuration listed to connect IDK_AM574x board(XDS 100v2 USB debug probe) to EVE_1 or EVE_2 core. Kindly share the files needed for the configuraion. CCS version using is: Code Composer Studio 9.0.1 Thanks and Regards, Deepa + +Responses: +Hi Deepa, The EVE programming toolchain is not publicly available, and as such, we do not expose the EVE cores in CCS. Regards, Mike + +Hi Mike, We have that EVE cores available for TDA platforms. And we are having PROCESSOR_SDK_VISION_03_07_00_00 and arp32_1.0.7 cg tool as a part of it. Thanks and Regards, Deepa + +Hi Deepa, At this time programming of the EVE is not supported on the AM57xx family. AM57xx treats the EVE as a black-box module for machine learning offload through the TIDL API. TDA2 and vision SDK have a different support model. What are you trying to do? Regards, Mike + diff --git a/data2/text/range/0-5000/866655.txt b/data2/text/range/0-5000/866655.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba0ecc6a0f1f890e99f641c816a9e57cda380a7b --- /dev/null +++ b/data2/text/range/0-5000/866655.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA3XEVM: TDA3 RVP loads eve binary failed when debugging on CCS + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2 Hi sirs, I am now doing porting TIDL OD on TDA3. I met some issus (), so I try to debug on TDA3 RVP. When I loaded EVE binary file, it was failed. The error is: ARP32_EVE_1: Trouble Reading Memory Block at 0xa1000000 on Page 1 of Length 0x4: (Error -1065 @ 0xA1000000) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.3.0.00003) +ARP32_EVE_1: File Loader: Verification failed: Target failed to read 0xA1000000@Data +ARP32_EVE_1: GEL: File: C:\PROCESSOR_SDK_VISION_03_07\vision_sdk\binaries\apps\tda3xx_rvp_bios_all\vision_sdk\bin\tda3xx-rvp\vision_sdk_arp32_1_release.xearp32F: Load faile Can you give me advise to fix this problem? Thank you, Gary + +Responses: +Hi Gary, can you check if you have following macros in the GEL file: VISION_SDK_CONFIG -> 0 EVE_SW_CONFIG -> 1 You can check section "3.6 Setup EVE in CCS" in PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\eve_sw_01_20_00_00\docs\eve_sw_getting_started.pdf for detailed setup instructions. Regards, Yordan + +Hi Yordan, I check my gel file (TDA3xx_multicore_reset.gel) and change #define VISION_SDK_CONFIG -> 1. I didn't see EVE_SW_CONFIG, so I did nothing for this. The error remained the same after following steps in "3.6 Setup EVE in CCS" Is there any other way to cause this error? Does there any boot mode need to be set like TDA2? Although I don't see that on TDA3 user guide. ps. I work on TDA3 rvp board. Thank you, Gary + +Hi, To debug the EVE image of vision SDK, you need to disable all the gels because vision SDK already setups all the register when you boot from flash or SD card and choose the 'load symbol' option of CCS. regards, Victor + +Hi Victor, I'm not clear about "disable all the gels". Do you mean not to run "TDA3xx_MULTICORE_EnableAllCores" and then load program file for each core by using "load symbols"? Thank you, Gary + +Hi Gary, Some gel are automatically loaded when starting the debug configuration.The best method to avoid that is to create new TDA3x target configuration, select advanced tab and remove the default initialization script from the input 'initialization script'. box. For Cortex_M4_IPU1_C0, remove TDA3xx_cortexM4_startup.gel, for CS_DAP_DebugSS remove TDA3xx_dap_startup.gel. I have attached a snapshot of the CCS window when you create the default tda3x target configuration, it shows the presence of the initialization script. For your debugging purpose, you just need to remove the scripts before saving the configuration. regards, Victor + +Hi Victor, Thank you for your clear reply. Gary + diff --git a/data2/text/range/0-5000/866694.txt b/data2/text/range/0-5000/866694.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e08f53c3f08ca82f33583316c6dd093b87fb4e1 --- /dev/null +++ b/data2/text/range/0-5000/866694.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3XEVM: Need help on using L3 firewall to protect memory between M4 cores. + +Query Text: +Part Number: TDA3XEVM Hi, We are using TDA3X SOC. Needed help regarding L3 firewall. We are running task on both M4 core's, IPU_C0 and IPU_C1. We have a requirement where the task running on IPU_C1 should not access IPU_C0 memory buffers. We have memory buffer of 40MB allocated on IPU_C0 which should not be accessed by IPU_C1. The solution to this as per technical reference manual is L3 firewall. So as per L3 firewall we can protect certain memory of IPU core which cannot be accessed by other IPU core. I also looked into l3fw_app.c example code in vision SDK which protects SOC_OCMC_RAM1_BASE memory from being accessed by other M4 core. In the example the module instance is being given as L3FW_OCMC_RAM1_INST and target address is SOC_OCMC_RAM1_BASE. So I had few confusion as below, 1) Does L3 firewall works for IPU only on OCMC RAM. 2) Can I create L3 firewall for 40MB of buffer which should not be accessed by other M4 core. 3) As per memory map of TDA3x TRM says IPU_RAM 0x5882_0000 to 0x5882_0000 64KB of RAM, can we access only this RAM ?. What is the significance of this RAM. 4) Technical reference manual says IPU MMU has 32 entries, does this mean IPU cores can access only 32 entries(pages) of the DDR ? Best Regards, A G Megharaj. + +Responses: +Hi Megharaj, Please find answers to your questions as: No, you can use other L3 firewalls for IPU, through which you can protect other regions on L3 space. Please refer to L3 Firewall chapter in TDa3x TRM for more details. Differentiating/protecting accesses between M4 cores through Firewalls is not possible. This is an internal memory of IPUSS which has faster accesses as compared to other memories in the system. You can access any memory in the system through MMU pages but you can configure such 32 pages only. If you are programming all 32 pages for DDR access, then answer to your question is yes, you can access only 32 pages of DDR. But you won't able to access any other memory in the system in this case since all accesses are going through MMU. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek Dhande, Thank you very much for the quick response. Just needed few clarification, 1)As per safety manual document section 4.17.3 Memory isolation on cortex M4, show one possible implementation of memory isolation for multiple tasks running on the Cortex-M4. * Define memory regions in external memory using L3 firewalls * Firewalls are reconfigured to QM mode in the following cases: QM tasks entry * Firewalls are reconfigured to ASIL mode in the following cases: QM tasks exit * Perform cache flush at entry of the QM task to remove cache entries from previous permission * Require task synchronization between both the cores; ASIL task is in one core, and the other core cannot run QM task Attaching the image as described in the document. 2) Also in the safety features manual says In case of M4, FFI between ASIL/QM can only be achieved by switching MMU tables at task-switch boundaries. So as per the above information only way to achieve FFI between M4 cores is throuh ASIL/QM task switch ? Can you please point to any examples if possible. Best Regards, A G Megharaj + +Hi Megharaj, Please find answers to your questions as: Yes, that is correct. But note that these are tasks running on the same core. One M4 core cannot run the ASIL task while the other is running the QM task within the same IPUSS at the same time. Yes, it is correct. We can achieve FFI on IPU through switching MMU tables for ASIL and QM tasks as mentioned. Example for demonstrating FFI - ASIL and QM tasks is currently not available in SDK but you can refer following the link for more details about achieving FFI on IPU: http://www.ti.com/lit/an/sprac41/sprac41.pdf But, the example demonstrating FFI within DSP and A15/M4 cores is available in the SDK. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/867497.txt b/data2/text/range/0-5000/867497.txt new file mode 100644 index 0000000000000000000000000000000000000000..932532549ea7fa505a768999c51ae0cd4370fd75 --- /dev/null +++ b/data2/text/range/0-5000/867497.txt @@ -0,0 +1,24 @@ +Ticket Name: CCS/TDA3XEVM: TDA2/3 EVE tool - ARP32 cannot download? + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi Champs: By reading this doc: /ti_components/algorithms/eve_sw_01_19_00_00/docs/eve_sw_getting_started.pdf, section 3.2.1, there is an ARP tool needs to download from this link: http://software-dl.ti.com/dsps/dsps_public_sw/sdo_ccstudio/codegen/Updates/p2win32 However, this link is missed. Anyone can fix this? BR Rio + +Responses: +Hi Rio, This not a html link. You have to follow the steps as mentioned in eve_sw_getting_started.pdf to understand the installation instructions. ARP32 compiler also comes as part of SDK release and can be found at following location inside SDK : ti_components/cg_tools/arp32_1.0.7 Regards, Anshu + +Hi Anshu: Thanks, I already install the EVE compiler. 1 more question: By reading this: file:///C:/PROCESSOR_SDK_VISION_03_07_01_00/ti_components/algorithms/eve_sw_01_20_00_00/docs/eve_sw_getting_started.pdf There is only the TDA2 EVE building. Will the TDA3 EVE buidlign procedure the same with TDA2's EVE? BR Rio + +BTW, how to create / import a TDA3 project? + +Hi Rio, Both TDA2 and TDA3 have same EVE IP and hence same EVE binaries can be used for both. Regards, Anshu + +What do you mean by create/import a TDA3 project? Regards, Anshu + +Hi Anshu: Thanks for your helping. Originally, I'm the SW for Wireless + Sitara. I thought the PSDK of TDA2/3 is the same with Sitara. So, does it have the "create_project.bat" for creating the TDA2/3 proejcts? So that we can import and build the EVE? In short, my question is: once I set up the CCS5.4.0.91, how to import an existing / created project to build for EVE? The PDF didnot tell us how to import / create a project of EVE. Thanks. BR Rio BR Rio + +Hi Rio, Do you mean CCS project when you say create/import project to TDA3? Regards, Anshu + +Yes, your understanding is correct. + +Rio, We don't support CCS project as we use make based build. You can build the EVE library/test bench using the gettingStarted guide of EVE. The same can be loaded to CSS for running. If you want to create a project you can refer the makefile used for the build and create. Regards, Anshu + diff --git a/data2/text/range/0-5000/867741.txt b/data2/text/range/0-5000/867741.txt new file mode 100644 index 0000000000000000000000000000000000000000..e805a5d3ba1c24be2852d776f4a9db8db9912eee --- /dev/null +++ b/data2/text/range/0-5000/867741.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: How to support YOLOv3 with TIDL? + +Query Text: +Part Number: TDA2SX We want to running YOLOv3 model on TDA2SX to detect pedestrian and vehicle, but TIDL only support caffe model. Can TI provides support for YOLOV3 to caffe model, or where can I found some examples for this? Best Regards, Bob Deng + +Responses: +Hi Bob Deng, We haven’t validated YOLOv3, so TI can not provide support for YOLOV3 to caffe model. If the model format is caffe/tf/onnx and all the operators are supported by TIDL then they you can try importing. Thanks, Praveen + diff --git a/data2/text/range/0-5000/867872.txt b/data2/text/range/0-5000/867872.txt new file mode 100644 index 0000000000000000000000000000000000000000..de55ee0ab226f2e21c987f570bf84ac3c55b284c --- /dev/null +++ b/data2/text/range/0-5000/867872.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2SX: TIDL running multiple frames + +Query Text: +Part Number: TDA2SX Hi everyone, I am running TIDL usecase on DSP and want to use SSD model for object detection to make inference on multiple images at sequence. NullSrc is taking images one by one and sending them for preprocessing and inference. Inference on first image is correct, but for all images after the first one inference output have 26 bboxes detected and every bbox have confidence value 0.5 and values for coordinates are not as expected for any bbox. Some of them are invalid (below 0.0 and above 1.0). However, if TIDL link is restarted (System_linkStop, System_linkDelete, System_linkCreate, System_linkStart sequence of functions is called) after inference for one image and before another, results for next frame are correct. I tried same usecase with Image segmentation model and using multiple input images and there wasn't this problem. What could be the problem, why TIDL is not working correctly with my model? Regards, Sasa + +Responses: +Hi Sasa, Did you get import tool output correct for your model ? Thanks, Praveen + +Hi Praveen, Yes, import tool output is correct. Regards, Sasa + +Do you have any more suggestions? Can I at least try to have some "soft" restart for beginning? By "soft" restart I mean can I call some function at the end of AlgorithmLink_tidlProcess function to return link to initial state without taking too much time as now is the case with link restart. Thanks, Sasa + +Hi Sasa, You can try that but to root cause the issue, is it possible to run TIDL inference in standalone setup using multiple images. Thanks, Praveen + +Hi Praveen, you mean running it using debugger to download code to DSP? If that is the case, I can't because I don't have any debugger now. But I tried to have more frames as an input and after several frames the inference of multiple bboxes detected per frame, algorithm stabilizes itself and works OK for all of the frames. I wonder now why it has those few frames with bad inference?. Regards, Sasa + +Hi Sasa, Thanks for the update. You can try changing the below quantization parameters as suggested in the section 3.8 (Matching TIDL inference result) in the TIDL user guide, and check if you can see any improvement in the output. >>Set with below parameters for running on video sequence. createParams.quantHistoryParam1 = 20; createParams.quantHistoryParam2 = 10; createParams.quantMargin = 20; Thanks, Praveen + diff --git a/data2/text/range/0-5000/868080.txt b/data2/text/range/0-5000/868080.txt new file mode 100644 index 0000000000000000000000000000000000000000..bcfa52fa13f9bf2bdb4d346953332aa36d008935 --- /dev/null +++ b/data2/text/range/0-5000/868080.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: [TDA2x] Importing caffe-jacinto-model to TIDL + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, My customer is trying to run TIDL test application on TDA2. They are using TIDL 01.01.03.00 in PROCESSOR SDK VISION 03.07.00.00. (1)They want to import “ssd768x320_ds_PSP_dsFac_32_hdDS8_0” from below link. https://git.ti.com/cgit/jacinto-ai-devkit/caffe-jacinto-models/tree/trained/object_detection/voc0712/JDetNet We can find deploy.prottxt only in directory “test_quantize”. Can we use it for importing the network to TIDL? (2)After importing the network by step (1), they compared the result with JDetNet structure on Web. It looks like there are some difference in network structure between them. Example: [Layer #] [Original network] [Imported network] Layer No.8 Pooling Convolution Layer No.10 Convolution Pooling We also see the difference in parameter values. Please find attachment for details. Could you please let us know the reason of the difference? Do we need to do anything for that? TIDL_network_data.xlsx Best regards, -Shibata + +Responses: +Hi Shibata, (1) Yes, please use the deploy.prototxt from directory “test_quantize”. (2) This is expected because both the model are different, the "JDetNet structure on Web" had only 4 classes, but this model in git has 21 classes. For more details please refer to below e2e link. https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen + +Hi Praveen, Thanks a lot for your comments. Regards, -Shibata + diff --git a/data2/text/range/0-5000/868101.txt b/data2/text/range/0-5000/868101.txt new file mode 100644 index 0000000000000000000000000000000000000000..d23ab434587ab71f49b41212cc8fc34467ddc0e9 --- /dev/null +++ b/data2/text/range/0-5000/868101.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS: how to move tda2 C66 to TDA4 C66 + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio I have run our cnn on tda2 C66 , i use v7 ccs build my code creat c66 static lib and call it by visionsdk. in the lib i used EDMA to move data between L2 and DDR. now i have to run my cnn on tda4 c66, what should i do ? just using v9 ccs rebuild it? Thanks! Shuai + +Responses: +Shuai, The EDMA used in TDA2 is no longer in TDA4. You can first try to compile the lib in CCS v9 without EDMA (use cache) to see that the build, link, and run are functional. I will see who can follow up on what new DMA library you can use from the PSDKRA package. Regards, Jesse + +The DMA on TDA4x is called UDMA. You can reference how it can be used in following folder: PSDKRA: vision_apps/utils/udma Regards, Jesse + diff --git a/data2/text/range/0-5000/868369.txt b/data2/text/range/0-5000/868369.txt new file mode 100644 index 0000000000000000000000000000000000000000..e3669f0c44e88664bfe7f7f7db6264c0a07d4b7d --- /dev/null +++ b/data2/text/range/0-5000/868369.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2EX17EVM: [Build Issue] errors encountered during linking + +Query Text: +Part Number: TDA2EX17EVM Tool/software: TI C/C++ Compiler Hi TI Team I modify usecase framecopy (vision_sdk\apps\src\rtos\alg_plugins\framecopy) to be my algorithm link and add a API in "Alg_FrameCopyProcess"(frameCopyAlgoLocalDma.c).But I build SDK fail and have the errors as below: ... ... "E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2ex_evm_bios_all/obj/vision_sdk/tda2ex-evm/c66xdsp_1/release/vision_sdk_configuro/linker_mod.cmd", line 202: error: program will not fit into available memory. placement with alignment fails for section ".cinit" size 0x35c8be . Available memory ranges: DSP1_DATA_MEM size: 0xd00000 unused: 0x2db2b2 max hole: 0x2db2a4 error: errors encountered during linking; "E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 ex_evm_bios_all/vision_sdk/bin/tda2ex-evm/vision_sdk_c66xdsp_1_release.xe66" not built gmake[7]: *** [E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2ex_evm_bios_all/vision_sdk/bin/tda2ex-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 gmake[7]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2ex/dsp1' gmake[6]: *** [c66xdsp_1] Error 2 gmake[6]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2ex/dsp1' gmake[5]: *** [apps_dsp1] Error 2 gmake[5]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/links_fw/src/rtos' gmake[4]: *** [apps] Error 2 gmake[4]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: *** [apps] Error 2 gmake[3]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps' gmake[2]: *** [apps_exe] Error 2 gmake[2]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/build' gmake[1]: *** [apps] Error 2 gmake[1]: Leaving directory `E:/jacob_adb/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/build' gmake: *** [vision_sdk] Error 2 I add the same API in "Alg_FrameCopyProcess"(frameCopyAlgoCpu.c) and it's OK.Could you give me some suggestions for the issue? Thanks so much. Best Regards, Jacob Lin + +Responses: +Hi, Its better that you increase your DSP data memory in memory map file by reducing any unwanted section size. please refer below doc vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_MemoryMap.pdf Regards, Anuj + +Hi Anuj I refer the document to modify the DSP1_DATA_MEM and get another error as below: ... ... [IPU1-1] 13.359330 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 13.359482 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254984 B (249 KB) [HOST ] 13.359940 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 13.359940 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6250736 B (6104 KB) [DSP1 ] 11.861038 s: IPC_IN_0 : Create in progress !!! [DSP1 ] 11.861465 s: IPC_IN_0 : Create Done !!! [DSP1 ] 11.861648 s: ALGORITHM: Create in progress (algId = 0) !!! [DSP1 ] 11.861739 s: ALG_FRAMECOPY: DMA: Allocated CH (TCC) = 0 (0) [DSP1 ] 11.873574 s: ALGORITHM: Create Done (algId = 0) !!! [DSP1 ] 11.873726 s: IPC_OUT_0 : Create in progress !!! [DSP1 ] 11.873787 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 13.360184 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 13.360214 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 13.360245 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 504528 B (492 KB) [IPU2 ] 13.360733 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU2 ] 13.360855 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254936 B (248 KB) [DSP1 ] 13.859177 s: [DSP1 ] 13.859208 s: ### XDC ASSERT - ERROR CALLBACK START ### [DSP1 ] 13.859238 s: [DSP1 ] 13.859299 s: out of memory: handle=0x83d8b9b0, size=3686408 [DSP1 ] 13.859330 s: [DSP1 ] 13.859330 s: ### XDC ASSERT - ERROR CALLBACK END ### [DSP1 ] 13.859360 s: [DSP1 ] 13.859482 s: ti.sysbios.heaps.HeapMem: line 221: ti.sysbios.heaps.HeapMem: line 221: out of memory: handle=0x83d8b9b0, size=3686408 ... ... Do you give me suggestion again? Thanks a lot. Best Regards, Jacob Lin + +Hi, Why are you allocating 3 MB of data from DSP1 local heap. We allocate only very small data from local heap. If the data size is large then please use Ulits_memAlloc() ang provide heapId as SR1. Regards, Anuj + +Hi Anuj OK and I have resolved the issue.Thanks. Best Regards, Jacob Lin + diff --git a/data2/text/range/0-5000/868515.txt b/data2/text/range/0-5000/868515.txt new file mode 100644 index 0000000000000000000000000000000000000000..b8d9620615bcbc333a4f287da781e2554c9cc1f9 --- /dev/null +++ b/data2/text/range/0-5000/868515.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4 data padding question + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I'm confused about the data padding. In the previous TDA2 version TIDL has all 4 padding in all directions and it's easy to understand. According to the documents "ti_dl/docs/user_guide_html/md_tidl_fsg_io_tensors_format.html" , it indicates that input and output will have pad{T , L ,R ,B}. But when I' m checking some value in custom layer example, it uses padH and padW. Here's the first question: Is padH = pad Top , pad Bot? Is padW = pad Left , pad Right? Also I check the value of some variables in the custom layer I made, founding that variables have different value when running quantools(TIDL Process with REF_ONLY FLOW) and inference phase. For example : In the quantools phase: A inData has width and height with 128 ,96 respectively , and its padW and padH equal to 1. InData pitch equal to 12771 (Channel Pitch) and 129(Line Pitch). (12771 = 129 x 99). Why the Channel Pitch is 129 x 99? In inference phase : InData has {w , h , padW , padH } = {128, 96 ,0 ,0 }. InData pitch equal to 12416 (Channel Pitch) and 128(Line Pitch). (12416 = 128 x 97). Why the Channel Pitch is 128 x 97 not 128 x 96? There is a same question about outData. The outData dims should be 64x48. outData channel pitch is 3840 and line pitch is 72. 3840 isn't divisible by 72. Could you please explain how the padding method works in TIDL or some customer layer import setting I probably miss to cause this problem. Thank you, Kevin + +Responses: +Hi Kevin, Is padH = pad Top , pad Bot? Anshu >>> Yes. We assume symmetric padding in both direction so same padding is used for top and bottom of feature map. Is padW = pad Left , pad Right? Anshu >>> This padding is only in one direction ( pad left) as during computation the same padding value (of next line) is used for the right side also. This requires one extra pixel towards the end of feature map and for allocation of input/output buffers to the network we consider full line for the same. So size of a feature map is (( W + PW ) * ( H + 2PH ) )+ PW. Where W and H are width and height of the feature map, PW = padW and PH = padH. Regards, Anshu + +Thanks for your reply. Could you please elaborate in detail with some illustrations or examples? The padW part is a little sophisticated. In my case : tidlLayer->outData[0].padH , padW == 2 , 8. Output width and height are 64 and 48. outData channel pitch is 3840 and line pitch is 72. I got these pitch value from outDataParams->pitch[1] and outDataParams->pitch[2] respectively. Somehow the channel pitch is not divisible by Line pitch. I wonder if I have missed for some parameters setting in the import phase. Thank you, Kevin. + +Hi Kevin, Channel pitch need not be a multiple of line pitch. The reason is that sometimes we align channel pitch in such a way that it is more efficient from DMA/kernel access point of view. But the minimum channel pitch should be as mentioned in my previous response (( W + PW ) * ( H + 2PH )) + PW ( I just noticed that one of the bracket was in correct in my previous response, I have corrected it now). Regards, Anshu + diff --git a/data2/text/range/0-5000/869218.txt b/data2/text/range/0-5000/869218.txt new file mode 100644 index 0000000000000000000000000000000000000000..d0e18728d8f85b55f3625e0df06e9eb6305a4605 --- /dev/null +++ b/data2/text/range/0-5000/869218.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2PXEVM: TDA2PX target reset due to over temperature with SDK3.06 OPP_PLUS mode + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi , In the latest 3.06 , we observed that , TD2px based HW reset due to linear increase in current and temperature when we execute below mentioned ADAS specific HM perception use case: UseCase: chains_hm_odld_adas NetworkRx_IMG (A15) -> Decode -> Dup_capture Dup_capture -> Merge_caputre Dup_capture -> Merge_caputre Merge_caputre -> VPE -> Dup_Imgs -> Select -> Alg_SvDraw (A15) -> Display_Result Dup_Imgs -> Alg_HMEve_0 (EVE1) Dup_Imgs -> Alg_HMEve_1 (EVE2) Alg_HMEve_0(EVE1) -> Alg_HModRcnnC66 (DSP1) -> Alg_HMAdasA15 (A15) Alg_HMEve_0(EVE1) -> Alg_HMldUpsampleC66 (DSP2) -> Alg_HMldPostA15 (A15) -> Alg_HMAdasA15 (A15) Alg_HMAdasA15 (A15) -> Dup_OD -> Alg_SvDraw (A15) Alg_HMAdasA15 (A15) -> Dup_LD -> Alg_SvDraw (A15) NetworkRx_CAN (A15) -> Dup_Can Dup_Can -> Alg_HMldPostA15 (A15) Dup_Can -> Alg_HMAdasA15 (A15) Dup_OD -> NetworkTx_Od(A15) Dup_LD -> NetworkTx_Ld(A15) GrpxSrc -> Display_Grpx SDK_VISION_03_06 software and HW configuration details : [IPU1-0] 15.317117 s: Vision SDK Version : [DEV_VISION_SDK_03_06_00_09] [IPU1-0] 15.317178 s: FVID2 Version : [FVID_02_01_00_01] [IPU1-0] 15.317269 s: BSP Version : [PDK_01_10_02_xx] [IPU1-0] 15.317330 s: Platform : [EVM] [IPU1-0] 15.317391 s: SOC : [TDA2PX] [IPU1-0] 15.317483 s: SOC Revision : [ES1.0] [IPU1-0] 15.317544 s: Board Detected : [TDA3XX BASE] [IPU1-0] 15.323705 s: Base Board Revision : [REV A] [IPU1-0] 15.323766 s: Daughter Card Revision: [REV A] DPLL CONFIG : OPP_PLUS DDR Config : DUAL_EMIF_2X1GB TDA2Px DDR Configuration Two EMIFs 1GB each (Total = 2GB) Here, The board has fan-less design . We are using MLO OPP Plus image with the DDR3 interleaved configuration as our library is designed on OPP_PLUS(EVE 0.9GHz, DSP 1GHz, A15 1.5GHz) and dual EMIF environment for meet to throughput. We didn’t touch anything related to temp and power management in our usecase. As per debug console logs analysis ,we find that, all DSP (at 60%) and EVE (at 90%) load. A15 and IPU are not utilized beyond 20-25% load. Note: We didn’t observe this issue with sdk3.03 release with same SW & HW configuration. Do we need to take care any specific configuration in TD2Px HW or software to prevent form over temperature issue for above usecase? Please let me know your inputs to resolve the above issue. Regards Raj + +Responses: +Raj Couple of things to check would be 1. Are you making sure you are setting AVS for the voltage rails correctly in your setup? 2. Are you setting CPU_IDLE_ENABLED=yes in your configuration file? Thanks and Regards Piyali + +Hi Piyali, Thank you for comments. We didn't modified in AVS .Using default AVS setting for Opp_plus mode. This is provided by TI released SDK-3.6(SBL). I also crossed check about "CPU_IDLE_ENABLED=yes" flag in our SDK code base. It's already configured as below. source/vision/platform/ti/tda2/apps/configs/xxxx_proto_A_bios/cfg.mk:134:CPU_IDLE_ENABLED=yes Regards Raj + +Raj OPP_PLUS support was added in the 3.6 release so there is a good chance where the 3.3 did not have OPP_PLUS frequency. Do you need OPP_PLUS for your compute requirement? Can you review if based on the compute requirement you can reduce the OPP to HIGH or OD in your usecase? Also can you review if all the rails need OPP_PLUS or only few rails need OPP_PLUS? Also, is this being run on EVM or your own custom board? Thanks and Regards Piyali + diff --git a/data2/text/range/0-5000/869816.txt b/data2/text/range/0-5000/869816.txt new file mode 100644 index 0000000000000000000000000000000000000000..03a10096dcb2f0f735b2fb84e250d618f93f1656 --- /dev/null +++ b/data2/text/range/0-5000/869816.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: IPU EDMA configuration for slave SPI transfers + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, Using starterware/PDK and running on a TDA2 we want to have IPU10 configure the EDMA to move data between SPI module 2 and DDR. The TDA will be the SPI slave for the data transfer. Transfers start when the TDA sets a GPIO high. A version of this driver was created for the A15_0, where the A15 configured the EDMA for transfers, and is working OK. Porting it to IPU10 though has not worked. Currently on IPU10 the EDMA and SPI are configured similarly to how they are in A15_0 (where EDMA does work when A15_0 does the configuration). However, when IPU10 sets the GPIO high to initiate the SPI transfer it seems the EDMA isn't moving data. Other than not seeing the SPI data in memory, the EDMA destination address register never shows movement and remains on the initial memory address despite SPI having burst hundreds of bytes. How do you configure the EDMA from IPU10 to move data to and from SPI 2 when SPI is configured as slave? Since this works on A15_0, what are the differences when configuring EDMA and/or SPI on IPU cores instead of A15 core? (SPI was configured same on both cores but the CPU ID and corresponding interrupt xbar instance numbers were changed for EDMA on IPU instead of A15.) Thank you. + +Responses: +Hi, For configuring the EDMA from IPU there are few changes required. 1. The EDMA register space address area starting from (0x4330_0000) is a bit band region from IPU memory map. You need to do the AMMU mapping for this area and use the EDMA register space from mapped address. You can refer the PDK edma example running from IPU1_0. 2. If you are using the EDMA interrupts then you need to update the interrupt configurations. You can refer the edma example for this. 3. You need to make sure that the DMA crossbar configuration is done properly to route the SPI dma event to a dma channel and the same is configured from IPU. Regards, Prasad + +Hello Prasad, Thank you for the reply. There were some things we were already doing prior to adding this EDMA SPI driver and so we were already configuring the AMMU through the TI provided function StwUtils_appConfigIPU1DefaultAMMU(). The EDMA interrupts are being used and configured in a similar manner as when configured in A15 where they do work. Is there any difference in their configuration in IPU versus A15? I will be further reviewing the DMA crossbars on IPU. On A15 only the EDMA channel was requested and no explicit crossbar configuration was done. Thank you. + +Hi, Which software are you using for the edma configuration? edma3lld or the starterware edma? Regards, Prasad + diff --git a/data2/text/range/0-5000/869998.txt b/data2/text/range/0-5000/869998.txt new file mode 100644 index 0000000000000000000000000000000000000000..f0a8399d70d890902e0171fba813a7f0ac4f94bd --- /dev/null +++ b/data2/text/range/0-5000/869998.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4VM: TDA4 processor SDK download URL + +Query Text: +Part Number: TDA4VM Dear Sir, I am a software manager working in Longhorn Automotive Electronics Co., Ltd. at Shenzhen of China. Longhorn is Tier1 and also a TI AAA customer. We have completed 360 surround view monitor using TDA2S, but some scenarios are not handled well ,for example auto parking. Then we want to using TDA4 to doing auto parking. I find that TI has released TDA4 SDK at http://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/index_FDS.html + +Responses: +Part Number: TDA4VM Dear Sir, TI has released TDA4 processor SDK, but I can not download it, please tell me how can I get the form to fill for downloading? Your reply will be greatly appreciated。 Best Regards, Bob Deng At software-dl.ti.com/.../index_FDS.html . + +Hi, please check here: Regards, Yordan + diff --git a/data2/text/range/0-5000/870312.txt b/data2/text/range/0-5000/870312.txt new file mode 100644 index 0000000000000000000000000000000000000000..72f9b7eee08b26c449d831a81a94fcbf9be01cb7 --- /dev/null +++ b/data2/text/range/0-5000/870312.txt @@ -0,0 +1,12 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: How can I download TDA4 processor SDK? + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Dear Sir, I am a software manager working in Longhorn at Shenzhen of China ,We has implemented 360 surround view with TDA2S, but some scenes are not very good, such as APS automatic parking，so we want to using TDA4 to doing APS or AVP. I found that TI has released TDA4 processor SDK, but it can not be download, TI website tips that customer need to fill out the form for downloading。 Could you tell me how to fill form? Best Regards, Bob Deng qibao.deng@long-horn.com + +Responses: +Hi Bob, please check here: you can select Processor SDK RTOS or Linux for TDA4 device. regards, Yortdan + +Hi Yortdan, Thanks for your reply! I have another question is that, what is difference between Processor SDK RTOS and Processor SDK Linux? Whether do we need download both version to build surround view park assist system? Regards, Bob Deng + +Hello Bob, Both the PSDK RTOS and PSDK Linux are needed for the surround view application. The PSDK Linux is used in this demo because the A72 core is running Linux whereas all the remote cores are running RTOS. Therefore both of these are needed. Regards, Lucas + diff --git a/data2/text/range/0-5000/870328.txt b/data2/text/range/0-5000/870328.txt new file mode 100644 index 0000000000000000000000000000000000000000..63d0d7df0bd7beeb20f00f3937c197be696961a9 --- /dev/null +++ b/data2/text/range/0-5000/870328.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2SG: TDA2 TDA4 JTAG + +Query Text: +Part Number: TDA2SG Tool/software: TI C/C++ Compiler hi,I want to buy debug tool like XDS110 ,XDS510, my problem is can XDS110 OR XDS510 support TDA2S & TDA4 simultaneously。 can you offer me the purchase link 。 + +Responses: +Hello, Yes, XDS110 is supported on both devices (TDA2S and TDA4). However, I don't see XDS510 as an option, did you mean XDS560? If so that is fine too. XDS110 is an entry-level, slower speed, fewer features type of JTAG debugger. The XDS560 is the more advanced high-performance choice. Details can be found here https://processors.wiki.ti.com/index.php/XDS560 You may purchase both of them from ti store. For example: https://www.ti.com/tool/TMDSEMU560V2STM-U https://www.ti.com/tool/TMDSEMU110-U Lastly, you may read more discussion on Jtag emulators comparison here: https://e2e.ti.com/support/processors/f/791/p/704912/2598746 https://e2e.ti.com/support/j721e/f/1026/p/850250/3144383#3144383 Hope it helps, thanks, Alex + diff --git a/data2/text/range/0-5000/870333.txt b/data2/text/range/0-5000/870333.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0f2b987f127962e49e771af41d7f0c684803626 --- /dev/null +++ b/data2/text/range/0-5000/870333.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2SG: how XDS110 connect to jtag + +Query Text: +Part Number: TDA2SG Tool/software: TI C/C++ Compiler hi, i use CCS7 & xds110 and try to debug tda2s , but not success 。 How can I connect the pin。 + +Responses: +Hi Zhangsc, can you check if this guide can give you something useful: Regards, Yordan + diff --git a/data2/text/range/0-5000/870723.txt b/data2/text/range/0-5000/870723.txt new file mode 100644 index 0000000000000000000000000000000000000000..14eade46177a56e47f1ad9ca013a053cea67b00b --- /dev/null +++ b/data2/text/range/0-5000/870723.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2SG: Utils_setCpuFreq not work success + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2, SYSBIOS Tool/software: TI C/C++ Compiler Hi ,my eve is run in 900MHZ, when i want to dynamic adjustment ，i call the function “”Utils_setCpuFreq“” ，but that is no success。 I work in tda2s， LateAttach ，how can I do？ + +Responses: +Hi, First of all, EVE in TDA2 doesn't support Dynamic frequency and voltage scaling at run-time. The frequency and voltage has to be set at the boot time and remains static. Utils_setCpuFreq() is not actually changing frequency or voltage. It is used to pass the CPU frequency value in to TI RTOS / SYSBIOS kernel so it can calculate the CPU load correctly based on OS timer. SDK doesn't provide any API to change frequency or voltage at the run-time. At the boot time, Secondary Bootloader (SBL) can program EVE to different frequency based on OPP selected at the build time. Regards, Stanley + diff --git a/data2/text/range/0-5000/870755.txt b/data2/text/range/0-5000/870755.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a4de14b85a5eb6b2e00b9572cd94a4fcc96e4e6 --- /dev/null +++ b/data2/text/range/0-5000/870755.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2SX: I want to use GPU to accelerate my algorithm. Does tda2's GPU support opencl? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler I want to use GPU to accelerate my algorithm. Does tda2's GPU support opencl? + +Responses: +Which SDK are you using? PSDKLA / PSDKRA does not support openCL - Subhajit + +Hi Subhajit, Thanks for your reply, I am using VSDK, but VSDK support only openGL on GPU, is there any way to use GPU to accelerate general algorithms？ + +Since we do not support OpenCL, there is no method to use the GPU to perform GPGPU tasks, and therefore you cannot use TDA2X GPUs to accelerate algorithms + diff --git a/data2/text/range/0-5000/871280.txt b/data2/text/range/0-5000/871280.txt new file mode 100644 index 0000000000000000000000000000000000000000..f6c01b3c2f4d2f5274b4d69be24097c6ab93dcc6 --- /dev/null +++ b/data2/text/range/0-5000/871280.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler: how to run code on J7 C66 core + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi : befor i have run my code on c66 of TDA2 evm , I use CCS to compile our algorithm into a static library of C66 and put it into the vision SDK, which is called in the framcopy link of C66。 now i have change to J7evm . I have make sdk make vision_apps and run follow app on the EVM . but i can't run app_tirtos how to compile it ? i can not find sample usecase and framcopy links in psdk_rtos_auto_j7_06_01_00_15 . how can i run my code on c66 now ./run_app_tidl.sh - Image classification demo (needs display) ./run_app_tidl_avp2.sh - Auto valet parking demo (needs display) ./run_app_dof.sh - Dense optical flow demo (needs display) ./run_app_stereo.sh - Stereo disparity demo (needs display) ./run_app_c7x.sh - C7x sample kernel demo ./run_app_srv.sh - 3D SRV 4 camera demo (needs display, Fusion1 board, 4x IMX390 camera) ./run_app_single_cam.sh - Single camera + VISS + Display demo (needs display, Fusion1 board, 1x IMX390 or compatible camera's) thanks shuai + +Responses: +Shuai, On TDA4x we have switched to OpenVx framework from the links-and-chains framework on TDA2x. You can take a look at one of many examples in the TIOVX library for getting a kernel executed on C66 DSP. For TIOVX tutorials please start here, psdk_rtos_auto_j7_06_01_00_docs_only/tiovx/docs/user_guide/index.html The run_app_tidl_xxx variants use a mix of underlying cores such as R5Fs, HWA, C66 and C7x DSP running multiple kernels and can be run without display as well. You can set the display_option flag to 0 to turn off display and enable file write option as well to see the outputs. Please take a look at the documentation of vision_apps here, psdk_rtos_auto_j7_06_01_00_docs_only/vision_apps/docs/user_guide/index.html Regards, Shyam + diff --git a/data2/text/range/0-5000/871967.txt b/data2/text/range/0-5000/871967.txt new file mode 100644 index 0000000000000000000000000000000000000000..25a64e979c349ff6fabba68a54fd20763841530a --- /dev/null +++ b/data2/text/range/0-5000/871967.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SA: PROCESSOR_SDK_RADAR_03_07_00_00 matlab collected network port data, unable to display point cloud + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: MMWCAS-DSP-EVM, MMWCAS-RF-EVM As shown above, using MMWCAS-DSP-EVM + MMWCAS-RF-EVM, run the use case cascade_radar_object_detect and set the radar output to 01 0 1 0. , can be displayed smoothly in the GUI. When the radar output is set to 1 1 0 1 1, the display of the GUI is stuck, and and are not displayed. With Wireshark, you can see the data coming. What is the reason for this? Is there a better tool to collect and observe the network port data output by the radar? Thanks a lot. + +Responses: +Could you enable "pointCloud" only and see if the output is displayed correctly. If not, one reason could be you don't have the calibration data in the SD card. Please refer to the user guide for generating calibration data and put it on SD card. The "AzimuthHeatMap" runs very slowly in Matlab so when it is enabled, the display can be very slow. + +Thank you for your reply.But I can not find the user guide which remind the calibration method.Could you tell me the name of the document please. + +I tried to do radar calibration via HyperTerminal command"c: Control Calibration"with the parameter ：“10 1 250”.And then enable "pointCloud"only.Matlab can display point clouds, but it can only last for more than ten seconds, and then it stops there. Thank you. + +Please read the VisionSDK_Getting_Started_Guide.pdf. It tells you where to find the documents including User Guide. In the User guide, you can find the instruction regarding calibration. + diff --git a/data2/text/range/0-5000/872128.txt b/data2/text/range/0-5000/872128.txt new file mode 100644 index 0000000000000000000000000000000000000000..20f02407cf18fb2ac99fb3f43acf1b9357864851 --- /dev/null +++ b/data2/text/range/0-5000/872128.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3XEVM: Lane Detection Algorithm Calibration + +Query Text: +Part Number: TDA3XEVM Dear team, 1.For calibration Lane Detection algorithm we have followed User guide located in PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.200.V.LD.C66X.00.03.00.00\200.V.LD.C66X.00.03\modules\ti_lane_detection\docs\LaneDetection_DSP_UserGuide.pdf. Lane Detection was not smooth as we varied various parameters such as departThetaLeftMin,departThetaLeftMax,departRhoLeftMax ,etc for road with the camera holdings for different heights. Please let us know how to obtain current values (live) Theta and rho (theta1 ,theta2 ,Rho1 and Rho2) values printed on the consoles .This will help us to calibrate the road for Min and maximum values for theta1 ,theta2 ,Rho1 and Rho2 for different heights. Regards, Pradeep K + +Responses: +Dear team, 1. Any update ? 2. Do we have some calibration tool/ Reference tool to update the Theta and rho (theta1 ,theta2 ,Rho1 and Rho2) values for any given road? Currently we are not using CCES . Please let us know the above points how we can resolve? Regards, Pradeep K + +Dear team, Please respond the above query.. The theta information is provided in terms of bin and not in degrees .How we can correlate the lane detection while setting the road map information. Regards, Pradeep K + +We don't have a way to dump the running value of theta1 ,theta2 ,Rho1 and Rho2. These are not exposed by the algorithm library and we are not in a position to modify it. So, unfortunately, you need to use hit and trial to tune your parameters. Thanks, with Regards, Pramod + diff --git a/data2/text/range/0-5000/872192.txt b/data2/text/range/0-5000/872192.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c5f7df4f70918d4ee4951bca5f6c5f966678bc4 --- /dev/null +++ b/data2/text/range/0-5000/872192.txt @@ -0,0 +1,10 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: Why TIDL is disabled in TIOVX tutorial? + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Dear expert, I got the question: Why TIDL is disabled in TIOVX tutorial? Background: You can find the code in psdk_rtos_auto_j7_06_01_01_12/tiovx/tutorial/ch01_common/vx_tutorial.c #ifdef _DISABLE_TIDL printf("tidl tutorial disabled when compiled in 64-bits host-emulation, please compile in 32-bits\n"); #else vx_tutorial_tidl(); #endif Could you please give some more explanasion on this warning? Does it mean TIOVX/TIDL can only run in 32bit on host emulation? What about on TDA4(A72/R5F/C7x/C66)? Thanks & Best Regards! ZM + +Responses: +Hello ZM, The TIDL tutorial is only supported on the TDA2/3 family of devices as it uses the EVE. We will make this more clear in future releases. For TDA4, we have several TIDL apps in the vision apps project (vision_apps/apps/dl_demos) that you can reference for how to use the TIDL node. Please let us know if there is something specific that you are looking for from the tutorial. Regards, Lucas + +Thanks, Lucas. I will suggest our customer not to run it on TDA4/PSDKRA. + diff --git a/data2/text/range/0-5000/872700.txt b/data2/text/range/0-5000/872700.txt new file mode 100644 index 0000000000000000000000000000000000000000..0c9954fb1ea64e4a711044ecbdf07ef0a3cc44b9 --- /dev/null +++ b/data2/text/range/0-5000/872700.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SG: tda2 McSPI interface + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi, two questions Q1： The normal McSPI MOSI data trace should be low in the leisure state. However, some small packets have been detected on the MOSI data trace. How do we optimize software? (MOSI: see green curve, CLK: see yellow curve) TDA2 internal and external interfaces are known to be pulled up to the same power source Q2：We measured the timing of McSPI with an oscilloscope and found that the specifications were not met，How do we optimize software? TDA McSPI operation mode: PHA = 0, POL = 0 The MOSI data is based on the falling edge of the CLK clock, and SM6 = 166.4ns is measured, which does not meet the requirements of SM6 = +-5ns. + +Responses: +Hi, Which software are you using for the McSPI? Is McSPI configured as master/slave? Are you using the TI EVM or a customer board? What is connected to the McSPI? Regards, Prasad + +Hi Prasad， We use vision-sdk software version number is ROCESSOR_SDK_VISION_03_07_00_00. The McSPI interface of TDA2 is configured as the master. Tested on our own board. A level conversion chip is connected to McSPI of TDA2, and the other end of the chip is a MCU，and the waveform measured by the MCU is normal. + +Hi, Is the data sent from the McSPI/SoC is received at the mcu correctly or there is any data corruption? Also Is the data sent from mcu received by the McSPI IP/software correctly? Is the signal measurement done near to the SoC (before the level shifter)? Regards, Prasad + diff --git a/data2/text/range/0-5000/873005.txt b/data2/text/range/0-5000/873005.txt new file mode 100644 index 0000000000000000000000000000000000000000..8141773b8e96ab5ef4009a6387914431dc7e185e --- /dev/null +++ b/data2/text/range/0-5000/873005.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2EXEVM: How to write those 3 files onto the EMMC? + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi Champs: Customer is asking how to Read/Write those 3 files onto the EMMC of the TDA2? A. TIDLCFG.TXT，NET / PRM.BIN? B. And how those 3 files are generated? What are those 3 files' purpose? how to use them? Thanks. BR Rio + +Responses: +Hi Rio, These files are needed for running TIDL. We don't support eMMC driver in RTOS whereas TIDL use cases are supported only for BIOS configuration. Can you ask customer to use SD card instead of eMMC. Regards, Rishabh + diff --git a/data2/text/range/0-5000/873432.txt b/data2/text/range/0-5000/873432.txt new file mode 100644 index 0000000000000000000000000000000000000000..1acf13c30ebd1c4743fde8bda4d73cbc2499c90b --- /dev/null +++ b/data2/text/range/0-5000/873432.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: Linux : How to increase TDA2 memory on f Dual OS (Linux & RTOS) from 1GB to 2GB ? + +Query Text: +Part Number: TDA2SX Our system need more memory to do more algorithm, so our new platforms contain 2GB DDR memory. (M4 does not need to manage the memory area whose memory address is over 512MB) After reading the URL http://processors.wiki.ti.com/index.php/VSDK/VisionSDK_UserGuide_MemoryMap#Memory_Map_of_the_Application, our adjustments are still fail. Our testing code on EVE can access at 0xC0000000 ~ 0xD0000000 ( by modify "/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve_common/tlb_config_eve_common.c" ) But the same testing code on DSP1/DSP2 cannot work. ( Note : the testing code is to access the memory address directly ) There are some error message about omap-iommu fault.... Could you help us ? Thank you very much. Regards, Eten + +Responses: +Hi, By default, DSP will have access to only those sections which are defined in the below memory map file. vision_sdk\apps\build\tdaxxx\mem_segment_definition_linux.xs So if you want to access a memory section beyond C0000000 then please add a dummy section in the above file so that it will automatically get accessed from DSP. For adding a new section please refer section 6.3 of the below doc vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf Regards, Gaviraju + +Hi Gaviraju, It works. Thanks for your help. Regards, Eten + diff --git a/data2/text/range/0-5000/873670.txt b/data2/text/range/0-5000/873670.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d2a0ca9e3e1305ab4330e948eb0acd4f7a9644f --- /dev/null +++ b/data2/text/range/0-5000/873670.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2PXEVM: Usecase is crashing in IPU core with File_open() function call + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI C/C++ Compiler Hi, I was trying to create a very basic application on H264 decoding; objective was to achieve something similar to "null_src_dec_display" usecase from "Apps". So, I took the "Sample_app" as a staring point created the usecase: NullSource -> Decode -> Display On the target hardware, what i am observing is File_open() function hangs and i dont see any log, assert messages on the serial console. But the "null_src_dec_display" usecase which also deals with file input works properly. Vision SDK version: 03.07.00.00 # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=no # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=no # PROC_EVE1_INCLUDE=no # PROC_EVE2_INCLUDE=no # PROC_EVE3_INCLUDE=no # PROC_EVE4_INCLUDE=no # PROC_A15_0_INCLUDE=no # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=yes # ISS_INCLUDE=yes # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes + +Responses: +I found the issue. In "sample_app", the File_init() function not called. Following code at the beginning of ChainsCommon_Init() in chains_common.c solved the issue: #if defined(FATFS_PROC_TO_USE_IPU1_0) File_init(); #endif + +Hi Suman, thanks for the update. regards, Yordan + diff --git a/data2/text/range/0-5000/873880.txt b/data2/text/range/0-5000/873880.txt new file mode 100644 index 0000000000000000000000000000000000000000..711e82551777805766ee245bd429009ef01e9930 --- /dev/null +++ b/data2/text/range/0-5000/873880.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TMS320C6748: TMS320C6748 NOR Writer Failing OMPL-138 Nor Flash Writer ? + +Query Text: +Part Number: TMS320C6748 Other Parts Discussed in Thread: OMAP-L138, OMAPL138 Tool/software: Code Composer Studio Hai Sir, I am using TMS320C6748 processor with MT28EW512ABA1HPN NOR flash using before we used MT28EW256ABA properly working but in 512Mb problem occurring through OMAPL-138 AISGen software. Below error displayed. Starting OMAP-L138 NORWriter. CFI Query...passed. NOR Initialization: Command Set: AMD Manufacturer: INTEL Size: 0x40 MB Enter the binary AIS application file name (enter 'none' to skip): ASPB_Monitor.bin INFO: File read complete. Erasing the NOR Flash Erased through 0x60020000 Erase Completed Writing the NOR Flash Data verify failed. We are selected below method in AIS Gen Software: Device Type: d800k006 DSP Boot mode : NOR FLASH Clock Source: CRYSTAL 25MHz FLASH DATA WIDTH:16-bit CS2 setup: 0x3FFFFFFC Thanking You, Regards, Ramachandra + +Responses: +Hi, Ramachandra, Could you let us know which SDK (RTOS or Linux) you are using, and its release version? Thanks! Rex + +Hi Rex, I am using OMAPL-138 starterware not using any OS through this AISGen software i am downloaded? for 256Mb Micron previos i am worked but 512Mb first time? I am able to read Manufacture ID and Device ID while loading File L2 RAM to Flash failure occurs not writing? could you give me the any suggestions, Thanking you, Regards, Ramachandra. + +Ramachandra, If you are able to read the manufacturer ID and Device ID, can you also confirm if you can read the first 32 KB of the NOR flash ? Can you also confirm that the EMIF NOR connection with OMAPL138 matches the guidelines provided in Appendix B of the guidelines provided in the schematic review guide : Are there any code changes to the NOR flash writer that we provided. Each CS on EMIF only has 32 KB of direct address mapped in the memory map, so how are you accessing > 32KB data. Regards, Rahul + +hai sir, Based on above pdf(NOR HardwareConnectionfor 32 M x 16 Device) we have same thing used but only single chip select (CS2) used in below diagram. For us only 32MB is enough other apart not required please check in above schematic diagram then i'm able to read the device ID and size proper way but write failure occurring. Could you give me some suggestion, Thanking you, Are there any code changes to the NOR flash writer that we provided. Each CS on EMIF only has 32 KB of direct address mapped in the memory map, so how are you accessing > 32KB data.? I am not changed in nor writer code Regards, Ramachandra + +Hai sir, When i am writing to nor flash properly writing and poweron reset time it's showing 0xFFFFFFFF after soft reset data showing original data showing i checked in memory browser window of ccs. May be it's the problem of reset not occring on power on time or any problem sir. Thanking you, Reagards, Ramachandra + diff --git a/data2/text/range/0-5000/873915.txt b/data2/text/range/0-5000/873915.txt new file mode 100644 index 0000000000000000000000000000000000000000..593e31a527eedea30daa62f640e7566291b9e1dc --- /dev/null +++ b/data2/text/range/0-5000/873915.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2E: tda2x flash maximum + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi Expert, I'm expected running PROCESSOR SDK VISION v03.05.00 rtos on tda2x custom board. what is the NOR / QSPI flash maximum size support to tda2x? Can it be larger than 256 MByte? Could you please provide some guide on these questions? Thanks in advance. + +Responses: +Hi, Maximum QSPI flash size can be 64 MB. You can use a bigger NOR but TI EVM support only 32 MB NOR and so we have I haven't come across any customer who uses a bigger NOR. You will need to update the NOR timings as per the custom part. Regards, Rishabh + +Hi. Please allow me to continue this E2E Thread. #1. If using TI RTOS for TDA2, the default is boot from QSPI Nor Flash, right? #2. If booting from the QSPI Nor Flash, what’s the Maximum size that QSPI Nor can be used? #3. Do we have those below items with Maximum size for TDA2/3/4? Any document? A. Boot Flash B. DDR C. EMMC? #4. To change the QSPI Nor For Booting, is there any document to let the customer follow the process for modifying the code? #5. Can we store those TIDL files on the "Booting QSPI Nor Flash" ? NET / PRM.BIN、TIDLCFG.TXT. if no, how to store them on the EMMC and what are the APIs to access those TIDL files? BR Rio + +Hi Rio, Please note that this answer is in context of TDA2/TDA3 family, for TDA4 question please start a new thread. Actually there are two interfaces: GPMC NOR and QSPI NOR. Boot via GPMC NOR is called NOR boot and it supports XIP mode. Boot via QSPI NOR is called QSPI boot. 1. There is nothing like default boot mode. In case SYSBOOT[0:15] is set to 00000000 00000000, RBL does not boot via any interface. Hence this becomes debug boot mode. 2. The maximum size for QSPI is 64 MB. 3. Boot flash can be 64 MB, DDR is 4 GB but not all CPUs will support it. eMMC is not supported in RTOS so you need to ask a separate query for eMMC size. 4. Customers can refer to SBL user guide and Vision SDK user guide. 5. TIDL files are quite big in size, hence you will need SD card. Regards, Rishabh + +Hi, How to program TIDL files to qspi (or NOR) flash if it is within 64MB? Could you please provide some guide on these questions? Thanks in advance. + +Instead of reading the network and parameters binary files, you can convert the binary files into an array in C code and compile them into AppImage. In tidlODInit(), you will read data from the array instead of from file to fill the NetParams memory. You can find the tool to convert binary to C under ~/vision_sdk/apps/tools/misc_tools/bin2c. As for configuration txt file, you may hard-code the configuration in the use case so it doesn't need to read from file. Regards, Stanley + diff --git a/data2/text/range/0-5000/874651.txt b/data2/text/range/0-5000/874651.txt new file mode 100644 index 0000000000000000000000000000000000000000..7fec9ebc2267902f7361566645da898639b01a3b --- /dev/null +++ b/data2/text/range/0-5000/874651.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/DRA77P: Failed to boot remote proc IPU1. + +Query Text: +Part Number: DRA77P Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, In order to run RVC use case on IPU1 instead of IPU2 using TI SDK 03.02 And following to https://www.ti.com/lit/an/spracb6/spracb6.pdf The remote proc fail to boot with : [ 5.982483] remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 6706040 [ 6.009733] remoteproc0: bad phdr da 0x99000000 mem 0x4c8 [ 6.009737] remoteproc0: Failed to load program segments: -22 [ 6.012032] remoteproc0: failed to unmap 16777216/0 [ 6.012052] remoteproc0: failed to unmap 16777216/0 [ 6.012071] remoteproc0: failed to unmap 16777216/0 [ 6.034583] remoteproc0: rproc_boot() failed -22 dts changes : &ipu1_cma_pool { reg = <0x0 0x9e000000 0x0 0x02000000>; }; &mbox_ipu1_ipc3x { ti,no-reset-on-init; ti,no-idle-on-init; }; &mmu_ipu1 { ti,late-attach; ti,no-reset-on-init; ti,no-idle-on-init; }; &ipu1 { ti,late-attach; ti,no-reset-on-init; ti,no-idle-on-init; }; + +Responses: +and when I flash robust dts file : Kernel hangs at "starting kernel..." uboot logs : Core 2 ELF Image is valid Configuring IOMMU Starting the remote core loading remote core IPU1 successful Core 4 ELF Image is valid Configuring IOMMU Starting the remote core loading remote core DSP1 successful . . . Booting from eMMC ... ## Booting Android Image at 0x82000000 ... Kernel load addr 0x80008000 size 8125 KiB Kernel command line: buildvariant=userdebug RAM disk load addr 0x83000000 size 2113 KiB ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Kernel Image ... OK Loading Ramdisk to 8fdef000, end 8ffff0b9 ... OK Loading Device Tree to 8fdd2000, end 8fdee748 ... OK Using machid 0xfe6 from environment Starting kernel .. + +Hi Chokri, Just to make sure, you are using our Robust RVC Phase 6 release? It looks to me like the first issue you're seeing is that dra7-ipu1-fw.xem4 is still trying to load into the ipu2 memory region. Can you reverify all your changes through section 5 of the pdf you linked? Also, it looks like the instructions are written for TDA2 devices, not TDA2P, so please make sure you're editing the tda2px files. If possible, can you attach these files and we can double check them? PROCESSOR_SDK_VISION_03_xx/vision_sdk/build/Rules.make PROCESSOR_SDK_VISION_03_xx/vision_sdk/apps/configs/tda2px_evm_robust_rvc/cfg.mk PROCESSOR_SDK_VISION_03_xx/vision_sdk/apps/src/rtos/usecases/vip_single_rvc_ cam_view_crc/cfg.mk dra76-evm-robust-rvc.dts or dra76-evm-tfp41-0-robust-rvc.dts u-boot/include/configs/dra7xx_evm.h u-boot/common/spl/spl.c On the second issue, can I ask you to clarify what is happening? It looked like you were getting past boot in the first scenario, but after you flash the correct dtb it no longer boots? Thanks, David + +Hi David, Thanks a lot, Isuue fixed by editing PROCESSOR_SDK_VISION_03_xx/vision_sdk/apps/src/rtos/usecases/vip_single_rvc_ cam_view_crc/cfg.mk like : NEED_PROC_IPU2=no NEED_PROC_IPU1_0=yes NEED_PROC_DSP1=yes Regards, Chokri + diff --git a/data2/text/range/0-5000/874889.txt b/data2/text/range/0-5000/874889.txt new file mode 100644 index 0000000000000000000000000000000000000000..642d4bb82d0bef1dc8ed7c8a6dd9a17d7ac0fe10 --- /dev/null +++ b/data2/text/range/0-5000/874889.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2P-ACD: TIDL performance comparison between TDA2P and TDA2 + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Dear Champs, Is there any benchmark data of TIDL on TDA2P and TDA2? Do you think the TIDL performance of 2x EVE of TDA2P is similar with 4x EVEs of TDA2 because the CPU clock of TDA2P EVE is 40% higher than TDA2? My customer validated their algorithm on 4x EVEs of TDA2 using TIDL and feel there is not much CPU resource remained. Now, because of internal ISP, they are thinking of TDA2P but are afraid if their algorithm can be run on 2 x EVE of TDA2P. But, because the core clock of TDA2P EVE is higher than TDA2(900Mhz vs 650Mhz), I think the TIDL performance would be similar between 2x EVE of TDA2P and 4x EVE of TDA2. Could you please let me know your idea on this total TIDL performance of TDA2P and TDA2? Thanks and Best Regards, SI. + +Responses: +Hi SI, TIDL experts are looking at your questions, but in meantime you can check those threads for some details of TIDL performance evaluation: Regards, Yordan + +Hi, By default we are not validating TIDL_OD usecase on TDA2px so we do not have any performance number for this on TDA2px plaform. We only run this usecase on TDA2xx platform and with TI's provided input files, you can get a FPS of 22-24 of Display. As we did not run this on TDA2px so we can not comment anything related to its performance on TDA2px. But its very easy to port the usecase on TDA2px and you can check the performance yourself. Please use OPP_HIGH(Higher clock speed for cores) MLO for running this usecase for both platforms. Regards, Praveen + diff --git a/data2/text/range/0-5000/875161.txt b/data2/text/range/0-5000/875161.txt new file mode 100644 index 0000000000000000000000000000000000000000..823383303813b41883f78db8c06e74755529664c --- /dev/null +++ b/data2/text/range/0-5000/875161.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: Vision SDK installation GUI + +Query Text: +Part Number: TDA2EVM5777 Hello, I am setting up VisionSDK 3.06 on a new PC with Ubuntu 16.04. I am not able to see the installation GUI when I run the installation executable. Instead, the installation starts in the Ubuntu Terminal. Am I missing some library which enables the installation GUI? Thank you. + +Responses: +Hi, We tested on ubuntu 14.04 & we din't tried on 16.04. please try to run from the command line Thanks Gaviraju + diff --git a/data2/text/range/0-5000/875654.txt b/data2/text/range/0-5000/875654.txt new file mode 100644 index 0000000000000000000000000000000000000000..17ccb1dbad57597dbf67d24f676bc04602568433 --- /dev/null +++ b/data2/text/range/0-5000/875654.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2HG: 3D GPU SGX544 SrvInit failed (24) [47, /pvrsrvinit.c] + +Query Text: +Part Number: TDA2HG Hi, In one production fail at Client, the following errors from GPU was observed : ---------------------------------------------------------------------------------------------------- PVR_K: (FAIL) SGXInit: Unable to validate device DDK version PVR:(Error): PVRSRVInitSrvDisconnect: KM returned 24 [2638, /bridged_pvr_glue.c] PVR:(Error): PVRSRVBridgeCall: Failed to access device. Function ID:3223086861 (Bad address). [294, /pvr_bridge_u.c] PVR:(Error): SrvInit: P[ 9.127164] DMA: Module install successful, device major num = 248 VRSRVInitSrvDisconnect failed (24). See srvkm lo[ 9.137745] DRV: Module install successful g for details. [135, /srvinit.c] PVR:(Error): m[ 9.145803] DRV: Module built on Jan 23 2020 19:58:43 ain: SrvInit failed (24) [47, /pvrsrvinit.c] ------------------------------------------------------------------------------------------------- Please find attached the complete log. terminalTDA2x@RT.#1.txt Is this a GPU hw issue ? Which other hw issues can make the initialization fail ? How to debug for exact cause? Thank you. Best Regards, Mukund + +Responses: +Hi Mukund, The log shows there is some compatibility mismatch between sgx-km and sgx-um. Compiler options used for sgx-km and sgx-um seems different. The dmesg log says sgx-km is in debug mode. As TI releases always release-mode sgx-um binaries this could be the issue for the failure. Is the issue observed consistently or sometimes? Do you have any idea of commit-id of sgx-km and sgx-um used in the system? Please share the same if you have. Thanks RamPrasad + +Hi RamPrasad, Can you please elaborate on compatibility mismatch between sgx-km and sgx-um. I could not make it out from the log. Also How does the Compiler options used for sgx-km and sgx-um seem different? Where does the log say sgx-km is in debug mode? Thanks Mukund + +Hi Mukund, Default sgx-us binaries available is built with BUILD=release, but the log you shared has some PVR_K prints in sgx-km which suggests , sgx-kernel modules are built with a different options(BUILD=debug and may be some more). Please try to get information on what compiler options are used to build sgx-km. Thanks RamPrasad + diff --git a/data2/text/range/0-5000/877738.txt b/data2/text/range/0-5000/877738.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d166c28654425c668e68d07ecbbf4920f1268ea --- /dev/null +++ b/data2/text/range/0-5000/877738.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA4 different output between PC and platform + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I got the different output between PC and latform in TDA4. This model can also work normally in TDA2. The architecture is look like the figure below. The difference is begin with third layer. This layer is merged by convolution and relu. layer { name: "down2/bd" type: "Convolution" bottom: "down2/bn" top: "down2/bd" param { lr_mult: 0.0 decay_mult: 0.0 } convolution_param { num_output: 24 bias_term: false pad: 1 kernel_size: 3 group: 24 stride: 2 } } layer { name: "down2/bd_relu" type: "ReLU" bottom: "down2/bd" top: "down2/bd" } There are some files about the net and param in the last. I ask you a favor for making output become the same between PC and TDA4 platform. Thanks, Tedtidl_net.rartidl_param.rar + +Responses: +Usually, convolution and Relu layers are merged together. When you say PC, is it framework or TIDL host emulation? Do you see difference in layer level outputs? You can refer to section "steps to debug" in TIDL documentation to do layer level debug / difference analysis between framework and TIDL Can you please send zip files instead of rar files? - Subhajit + +Hi Subhajit: The PC I said, which is meaning the TIDL host emulation. I've already see the difference in layer level outputs by setting writeTraceLevel = 3 and check the trace files. The difference is start at third layer. Thanks, Ted tidl_net.zip tidl_param.zip + +Hi Ted, Can you share the deploy.prototxt, import and infer config files for me to reproduce the issue. Regards, Rishabh + +Hi Rishabh: Here is the files you need. Thanks, Ted conv_issue.zip + +Hi Ted, The model you have shared has a parameter called "blur_kernel" and cannot be imported with TIDL import tool I get an error message Error parsing text-format caffe.NetParameter: 181:16: Message type "caffe.ConvolutionParameter" has no field named "blur_kernel" Can you please share the model using which you are able to reproduce the mismatch issue with TIDL. Regards, Rishabh + +Hi Rishabh: Sorry about the wrong files. Here is the files after fixing. Thanks and Regards, Ted conv_issue.rar + +Hi Ted, TI made a new release for PSDKRA: http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/index_FDS.html Can you confirm if you see the issue with latest release. Regards, Rishabh + diff --git a/data2/text/range/0-5000/878909.txt b/data2/text/range/0-5000/878909.txt new file mode 100644 index 0000000000000000000000000000000000000000..45a2cb96303665bc8c1b276e812465aaa998746b --- /dev/null +++ b/data2/text/range/0-5000/878909.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: [TIDL] Queries about caffe-jacinto layers + +Query Text: +Part Number: TDA2EVM5777 Hi, This is regarding TIDL (REL.TIDL.01.02.00.00) I’m looking caffe-jacinto model. I would like to know the details about “DetectionOutput” layer and “PriorBox” layer. - What is done in these layer? - The meaning of each parameters (min_size, aspect_ratio, share_location, code_type, etc.) I checked TIDeepLearningLibrary_UserGuide.pdf as well as API guide TIDeepLearningLibrary_API.chm, but could not find good explanation. Are there any information? Regards, -Shibata + +Responses: +Hi, TIDL implements Single Shot Multi Box Detector (SSD). https://arxiv.org/abs/1512.02325 The layers that you mentioned were originally developed by Wei Liu, who implemented SSD in Caffe. You can see the original implementation of SSD here: https://github.com/weiliu89/caffe/tree/ssd The original implementation of the specific layers that you mentioned are: https://github.com/weiliu89/caffe/blob/ssd/src/caffe/layers/detection_output_layer.cpp https://github.com/weiliu89/caffe/blob/ssd/src/caffe/layers/prior_box_layer.cpp You can go through these files to get a better idea. [caffe-jacinto](https://github.com/tidsp/caffe-jacinto) is derived from [nvidia-caffe](https://github.com/NVIDIA/caffe), the SSD part of which is which in turn inspired by Wei Lu's implementation. Best regards, + +Hi Mathew, Thanks for sharing the information. Please close this thread. Regards, -Shibata + diff --git a/data2/text/range/0-5000/878931.txt b/data2/text/range/0-5000/878931.txt new file mode 100644 index 0000000000000000000000000000000000000000..28b35e582649248970fe0e780dcd132513cbf6b3 --- /dev/null +++ b/data2/text/range/0-5000/878931.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EVM5777: [TIDL_OD][PROCESSOR SDK VISION] Statistics with different input fps + +Query Text: +Part Number: TDA2EVM5777 Hi, This is regarding TIDL_OD running on TDA2x. Here are some experiment, running TIDL_OD with same indput data, differnt fps settings. Even though using the same input data, we see the different in Statistics printing between 1 fps and 60 fps. Please find below screenshot for details. What is the reason for the difference? Thanks, -Shibata + +Responses: +Hi DSP1(60 FPS): When the CPU load is very high(Almost close to 100%), then this will not print any statistics. IPU1(1 FPS): Some task CPU load we are not printing in our code if it's taking < 0.1 % Thanks Gaviraju + +Thanks Gaviraju. Understood. Regards, -Shibata + diff --git a/data2/text/range/0-5000/879255.txt b/data2/text/range/0-5000/879255.txt new file mode 100644 index 0000000000000000000000000000000000000000..763f9354fc61a2dbf0e58a6e01d1aab655ddfe92 --- /dev/null +++ b/data2/text/range/0-5000/879255.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA4VM: PDK/MCAN - configuration for classic CAN mode + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hello, We are transmitting data over MCAN2. For the configuration of MCAN, we referred to the Gateway demo and MCAN EVM Loopback example from PDK. Our current configuration sets the mode of MCAN to CAN-FD with nominal bit rate of 1 Mbps. We wish to change this to classic CAN operating at 500 kbps. First, we simply tested the following change, but it did not work out. In the second attempt, we configured the following values, but these changes are also not working. Are these bit timings correct? Do we need to make any other changes to the MCAN configuration? Thank you. + +Responses: +Hi, Can you please make the following changes and check - bit.Times.nomRatePrescalar = 0xFU; bit.Times.nomTimeSeg1 = 0x5U; bit.Times.nomTimeSeg2 = 0x2U; You can find how to calculate bit rate in - https://processors.wiki.ti.com/index.php/PDK/PDK_FAQ#How_is_bit-rate_calculated.3F Regards, Karan + +Hello Karan, We made your suggested changes, switched the mode to Classic CAN, and tested our vision app. The app loads and processes camera frames for 1 to 4 minutes, and after that, it freezes/hangs. We were able to reproduce this behavior 4 different times. We are able to see some CAN signals, but we did not validate whether those were correct, because that is irrelevant if the app hangs. Later, we reverted all changes, and the same application runs fine in CAN-FD mode with 1 Mbps data rate configuration. Your suggested changing one value for the MCAN_NBTP register. Do we need to make any more changes? Also, are there any changes required for the MCAN_DBTP register? Thank you. + +Hi Sagar, I suspect this to an SW timing issue. Can you please check by adding inter packet delay's. i.e. transmit every 3rd or 4th frame. 500 Kbps has been used in many usecases without any issues. Regards, Sujith + +Hello Sujith, The J7 TRM states that for MCAN functional clock (MCAN2_FCLK) frequency of 8 MHz, setting the MCAN_NBTP register to its reset value configures it to work at 500 kbps. Accordingly, we set 'fdMode' to (0x0U) and modified the bitTimes values in our vision app. But the vision app is not able to start. We will try out your suggestion and reply with our observations on this thread. In the meantime, I have two questions: 1. What is the nominal value of MCAN2 Functional Clock (FCLK) frequency? 2. Is this frequency being modified in the K3 MCAN EVM Loopback example? Thank you. + +Hello Sujith, Sujith said: Can you please check by adding inter packet delay's. i.e. transmit every 3rd or 4th frame. We tested this, first for every 3rd frame, and then for every alternate (2nd) frame. In both tests, the vision app worked fine without any hang/freeze problem. We concluded both tests at the end of around 30000 frames, but I am assuming that the app would work fine for longer durations as well. So the MCAN settings shared by Karan are working for J7 MCAN 500 kbps operation. However, we are not able to transmit our CAN packets after every frame (33 ms). How can we resolve this issue? Note that on TDA2, we were able to transmit even larger CAN packets at every 30 ms or so. The difference is we used System_LinkControl on TDA2, and we are using Remote Service API on TDA4. Since my core issue is resolved, I can close this thread and open another one for further discussion. Kindly let me know. Thank you. + +Hi Sagar, Yes, please close this thread and open a new one. Regards, Karan + +Closing this thread. Thank you. + diff --git a/data2/text/range/0-5000/880281.txt b/data2/text/range/0-5000/880281.txt new file mode 100644 index 0000000000000000000000000000000000000000..151cfbf938e71ec98b79ee820c702a7a43b3e060 --- /dev/null +++ b/data2/text/range/0-5000/880281.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EXEVM: TDA2 Processor Board + AWR RF Board Connection + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, In the ProcessorSDKRadar_UserGuide.pdf, High Level Block Diagram on page 13, there is a UART3 connection from the Processor Board to the RF Board thru a selectable MUX. Can you tell me what the 4 UART lines into the RF board is for? I know Processor communicates with RF board over SPI and not UART. We redesign the RF board and have a device on it that we need to interface with from the Processor Board. Can we use one of these 4 UART to interface with this device? If not, please recommend an interface from the Processor Board to the RF Board we can use? Thanks, --Khai + +Responses: +Hi Khai, UART port is used for programming firmware to flash. One for each radar. Regards, Stanley + +Hi Stanley, Can you recommend an interface to communicate with a new device on the RF board from the Processor board. Thanks, --Khai + +Khai, The SoC can support up to 10 UARTs if that is the interface you would like to use for this other new device. Refer to the Data Manual for proper pin locations of UARTs. Also, there is I2C going from the TDA2 Processor Board to the AWR RF Board. So depending on what device has been added there are those options. Thanks, Alec + +Alec, Please provide Data Manual. Thanks, --Khai + +Khai, I edited my initial reply shortly after to include that I2C could be an option as well for communication. Just matters what your extra device is capable of. Datasheet is available at this link for reference: http://www.ti.com/product/TDA2SA?keyMatch=TDA2S&tisearch=Search-EN-everything&usecase=part-number Thanks, Alec + diff --git a/data2/text/range/0-5000/880350.txt b/data2/text/range/0-5000/880350.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f4820386ba2d94ae3374d46b363abb5a80778a6 --- /dev/null +++ b/data2/text/range/0-5000/880350.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EX17EVM: OpenVX Support on TDA2EX17x17 + +Query Text: +Part Number: TDA2EX17EVM Dear Sir: We are using PSDK VISION 03_08_00_00 on TDA2EX17x17EVM. The OpenVX support on it is v1.1. My question is that does TI has any plan to upgrade the OpenVX support from 1.1 to 1.2 or even 1.3? Regards, /ckhsu + +Responses: +Hello, As you said, we are currently supporting OpenVX 1.1 on our J6 platforms. Is there a feature that you need from the OpenVX 1.2 or 1.3 specifications? Regards, Lucas + +Hi Lucas: In OpenVX 1.2 or 1.3, there is hough line detection api but not in 1.1. This is what we want. We have normal houghline detection algorithm in C/C++ but we need a TI optimal solution in C66 to see how fast we can reach in C66 in comparing to our C implementation. Regards, /ckhsu + +Hello, As of now, we do not have any plans to implement the hough line detection api in TIOVX. Regards, Lucas + +Hi Lucas: Thank you for the information. Regards, /ckhsu + diff --git a/data2/text/range/0-5000/880595.txt b/data2/text/range/0-5000/880595.txt new file mode 100644 index 0000000000000000000000000000000000000000..391f89db8626930a1a0ac707c6df336411bc5542 --- /dev/null +++ b/data2/text/range/0-5000/880595.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EXEVM: Understanding Processor SDK TDA2 Cascade Mode + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I am reading the code for Cascade use case running on TDA2. I am lost on the Chirp Configuration chains_common_cascade_ar12xx_config_mimo.c file. Is there a doc that explains the chirp config? 1. What's the concept of Master and Slave? 2. On line 249, rlChirpCfg_t gChains_cascadeRadarChirpCfgArgsMaster[CHAINS_RADAR_MAX_NUM_CHIRP_CFG], where CHAINS_RADAR_MAX_NUM_CHIRP_CFG = 64, but the initialization only fills 10. Same for the slave array of this structure. 3. I don't understand why txEnable is set as such in the code Thanks, --Khai + +Responses: +Also, There are two #define constant that I guess might mean the same. CHAINS_CASCADE_RADAR_RADAR_HEIGHT defines in chains_common_cascade_ar12xx_config_mimo.c - This is the number of chirps per frame CHAINS_RADAR_MAX_NUM_CHIRP_CFG defines in chains_radar.h - This is used in chains_common_cascade_ar12xx_config_mimo.c to create array of structure rlChirpCfg_t gChains_cascadeRadarChirpCfgArgsMaster[CHAINS_RADAR_MAX_NUM_CHIRP_CFG] If we desire to change number of chirps in the chirp frame, I suppose we need to change CHAINS_CASCADE_RADAR_RADAR_HEIGHT and not CHAINS_RADAR_MAX_NUM_CHIRP_CFG. But does CHAINS_RADAR_MAX_NUM_CHIRP_CFG also need to be changed if we change CHAINS_CASCADE_RADAR_RADAR_HEIGHT ? Thanks, --Khai + +Hi I will check with RADAR SDK expert & let you know. Thanks Gaviraju + +Hi Gaviraju, I have another question. In the ProcessorSDK_Radar_dataSheet.pdf chapter 4 where it mentioned "The height of the frame is Num of TDMA Tx antenna x Doppler Dimension". I understand the TX is chirping in a TDMA fashion from TX0 -> TX11 of all 4 sensors. What's not clear is that does each TX transmit chirp for the entire chirp frame (say if I have 128 chirps per frame) before the next TX chirps the next chirp frame OR all TXes only chirps 1 chirp round robinly and then the second and third chirps and so on... Thanks, --Khai + +1. Master is the AWR device providing the clock to the 3 Slave devices so the 4 AWR devices can be cascaded. 2. We just allocated the structure to accommodate the maximal number of chirp configurations as place holder. In the example, we only use 10 chirp configurations. 3. txEnable is the bit mask of which Transmitter in AWR to enable. /** * @brief Tx enable selection bit mask \n b0 Enable TX0 \n 0 Tx0 Disable \n 1 Tx0 Enable \n b1 Enable TX1 \n 0 Tx1 Disable \n 1 Tx1 Enable \n b2 Enable TX2 \n 0 Tx2 Disable \n 1 Tx2 Enable \n Note: Maximum of only 2 TX can be turned in a chirp \n */ rlUInt16_t txEnable; + diff --git a/data2/text/range/0-5000/881316.txt b/data2/text/range/0-5000/881316.txt new file mode 100644 index 0000000000000000000000000000000000000000..0924ad4cd70b9f7d3637d32d94d126a764ae5e31 --- /dev/null +++ b/data2/text/range/0-5000/881316.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EG-17: caffe-jacinto-models/script/train_image_object_detection.sh error + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Hi, After following installation instructions and solving some issue myself, when I tried to run the ./train_image_object_detection.sh to test my installation result, I got the error of: I0218 09:36:55.522869 14830 net.cpp:110] Using FLOAT as default forward math type I0218 09:36:55.522889 14830 net.cpp:116] Using FLOAT as default backward math type I0218 09:36:55.522899 14830 layer_factory.hpp:172] Creating layer 'data' of type 'AnnotatedData' I0218 09:36:55.522907 14830 layer_factory.hpp:184] Layer's types are Ftype:FLOAT Btype:FLOAT Fmath:FLOAT Bmath:FLOAT I0218 09:36:55.523039 14830 internal_thread.cpp:19] Starting 1 internal thread(s) on device 0 I0218 09:36:55.523171 14830 net.cpp:200] Created Layer data (0) I0218 09:36:55.523180 14830 net.cpp:542] data -> data I0218 09:36:55.523205 14830 net.cpp:542] data -> label I0218 09:36:55.523224 14830 data_reader.cpp:58] Data Reader threads: 1, out queues: 1, depth: 10 I0218 09:36:55.523243 14830 internal_thread.cpp:19] Starting 1 internal thread(s) on device 0 I0218 09:36:55.523627 14842 blocking_queue.cpp:40] Data layer prefetch queue empty F0218 09:36:55.523803 14843 db_lmdb.hpp:16] Check failed: mdb_status == 0 (2 vs. 0) No such file or directory *** Check failure stack trace: *** @ 0x7f7e0c8074dd google::LogMessage::Fail() @ 0x7f7e0c80f071 google::LogMessage::SendToLog() @ 0x7f7e0c806ecd google::LogMessage::Flush() @ 0x7f7e0c80876a google::LogMessageFatal::~LogMessageFatal() @ 0x7f7e0bb120ca caffe::db::LMDB::Open() @ 0x7f7e0b6936b3 caffe::DataReader<>::InternalThreadEntryN() @ 0x7f7e0b6bb19e caffe::InternalThread::entry() @ 0x7f7e0b6bcefb boost::detail::thread_data<>::run() @ 0x7f7e0ad007ee thread_proxy @ 0x7f7e098926db start_thread @ 0x7f7e09bcb88f clone @ (nil) (unknown) During make runtest, i did get some errors but I looked up online and someone mentioned these errors won't interfere training processes. But for debug references, they are: [----------] Global test environment tear-down [==========] 2101 tests from 283 test cases ran. (459627 ms total) [ PASSED ] 2094 tests. [ FAILED ] 7 tests, listed below: [ FAILED ] IOTest.TestDecodeDatum [ FAILED ] IOTest.TestCVMatToDatumReference [ FAILED ] IOTest.TestDecodeDatumNative [ FAILED ] LayerFactoryTest/0.TestCreateLayer, where TypeParam = caffe::CPUDevice [ FAILED ] LayerFactoryTest/1.TestCreateLayer, where TypeParam = caffe::CPUDevice [ FAILED ] LayerFactoryTest/2.TestCreateLayer, where TypeParam = caffe::GPUDevice [ FAILED ] LayerFactoryTest/3.TestCreateLayer, where TypeParam = caffe::GPUDevice Thank you for the time and assistance. Best regards, WeiChih + +Responses: +Hi, The following line is saying that your lmdb file (dataset file) could not be found: F0218 09:36:55.523803 14843 db_lmdb.hpp:16] Check failed: mdb_status == 0 (2 vs. 0) No such file or directory Please check the path. + +Hi Manu, Thanks for the heads up, I am able to run training script on voc0712 dataset now, but also got some questions regarding training on my own custom dataset: 1. Am I able to modify the SSD's network and still run on TDA2 fine? e.g. simplifying base VGG net's structure to my custom dataset for detecting fewer classes like 2~5 classes rather than so many classes as in voc0712? 2. Does tda2 support running other networks like Yolo? Thanks a lot & best regards, Wei + +Hi Wei, Yes - you can customize the number of classes other such similar parameters for the SSD object detector. Yolo is not supported. If you are running ./train_image_object_detection.sh, you are not using VGGNet - but a much simpler network. VGG is quite heavy for not only for TDA2x, but also for any embedded platform. Best regards, + +Hi Manu, Thanks for the swift reply. So, tuning hyper-parameters of the SSD detector, and number of classes of course, is fine as long as no changes in the network structure from ./train_image_object_detection.sh, right? Best regards, Wei + +Yes. That is fine. + diff --git a/data2/text/range/0-5000/881642.txt b/data2/text/range/0-5000/881642.txt new file mode 100644 index 0000000000000000000000000000000000000000..041c452cf776a4284ee4d4218b619aaddc03702e --- /dev/null +++ b/data2/text/range/0-5000/881642.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: Linux - eth0 device not found + +Query Text: +Part Number: TDA2EVM5777 Hi. I am trying to set up an NFS shared folder using TDA2EVM5777. I'm working in a Linux environment, but the eth0 device doesn't appear. I checked the eth0 device through the "ifconfig -a" and "ls -l /sys/class/net/" commands, but the eth0 device does not exist. ================================================================================== root@dra7xx-evm:~# ifconfig -a can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 NOARP MTU:16 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:10 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:98 lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132976/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:160 errors:0 dropped:0 overruns:0 frame:0 TX packets:160 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:12160 (11.8 KiB) TX bytes:12160 (11.8 KiB) sit0 Link encap:IPv6-in-IPv4 NOARP MTU:1480 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) root@dra7xx-evm:~# ls -l /sys/class/net/ lrwxrwxrwx 1 root root 0 May 13 19:52 can0 -> ../../devices/platform/44000000.ocp/4ae3c000.can/net/can0 lrwxrwxrwx 1 root root 0 May 13 19:52 lo -> ../../devices/virtual/net/lo lrwxrwxrwx 1 root root 0 May 13 19:52 sit0 -> ../../devices/virtual/net/sit0 ================================================================================== However, I have confirmed that the network operates with the Ping command in U-Boot. (I have set up ipaddr, gatewayip, netmask with the setenv command.) So, there seems to be a problem with Linux settings. How can I find the eth0 device on Linux? In addition, I would like to modify the VisionSDK App and build it to update to the NFS shared folder. Do I simply change the app.out file? Or do I need more work to do? Regards, Lee. + +Responses: +Hi Lee, Based on the information you have provided it looks like probe of Ethernet device failed during linux boot. Can you please share linux boot logs and the dts file you are using? Thank you Regards Santhana Bharathi + +Hi Santhana Bharathi, Attach my Linux boot log and dts files. 5432.boot.zip Regards, Lee. + +I resolved this issue. It was a problem with the settings in my dts file. (ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts) The mac setting was "disabled", and after changing to "okay", the eth0 device is output normally. ============================================================================= root@dra7xx-evm:~# ifconfig eth0 Link encap:Ethernet HWaddr F0:B5:D1:0F:22:0C inet addr:192.168.1.150 Bcast:192.168.1.255 Mask:255.255.255.0 inet6 addr: fe80::f2b5:d1ff:fe0f:220c%132400/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:12 errors:0 dropped:0 overruns:0 frame:0 TX packets:32 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:1316 (1.2 KiB) TX bytes:3132 (3.0 KiB) Interrupt:99 eth1 Link encap:Ethernet HWaddr F0:B5:D1:0F:22:0D UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132400/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:166 errors:0 dropped:0 overruns:0 frame:0 TX packets:166 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:12688 (12.3 KiB) TX bytes:12688 (12.3 KiB) ============================================================================= Regards, Lee. + diff --git a/data2/text/range/0-5000/881722.txt b/data2/text/range/0-5000/881722.txt new file mode 100644 index 0000000000000000000000000000000000000000..4ca102c2e50da0b221d61dc5fa64fc1c0e7e4fd8 --- /dev/null +++ b/data2/text/range/0-5000/881722.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: Cascade Radar AWR1243 VCO error + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: AWR1243 Hello, I am using the TI Cascade radar with 4 AWR1243 chips, for this I am using the PROCESSOR_SDK_RADAR_03_07_00_00 also the MMWave studio. I have a problem when i set the frequency to 76.566Ghz with radar slope to 14.677048 with .pfVcoSelect as 0, the SW give me an assert Assertion @ Line: 376 in C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/src/rtos/radar/src/common/chains_common_ar12xx.c: SYSTEM_LINK_STATUS_SOK == retVal : failed !!! . I debugged it with MMwave studio there it was more clear Status: Failed, Error Type: RAMP END FREQUENCY IS NOT WITHIN VCO RANGE. if we check the user guide it says following PF_VCO_Select b1 VCO_SEL 0 VCO1(77G; 76-78Ghz) Note: 2. xWR1xxx devices: there is an overlap region of 77-78Ghz in which any of the VCOs can be used, for any other regions use only the VCO ccan work in that region ..... Going by this our setting of VCO1 should have worked but seems like its giving a problem, Is there something we missed or some feature like FUSA is activated. Can somebody give me a pointer on this regard how to check this either using mmWave or PROCESSOR_SDK_RADAR_03_07_00_00 Sw. Best Regards Deepak Joshi + +Responses: +Hi I will check with RADAR expert & get back to you. Thanks Gaviraju + +Hi Deepak, It is better to debug this with mmWave Studio. Regards, Stanley + +Hi Deepak, Valid VCO frequency range is a function of chirp start_frequency and end_frequency. That bandwidth is calculated as start_freq + chip_slope * ramp_end_time. Can you please verify if the full chirp bandwidth is valid for the VCO you are selecting? I also suggest giving problems like this a run in the mmWave Studio script environment. You can easily test which VCO ranges are valid or not. Please check the DFP ICD for valid values: http://downloads.ti.com/ra-processors/esd/MMWAVE-DFP/latest/exports/mmWave-Radar-Interface-Control.pdf Thanks, -Randy + diff --git a/data2/text/range/0-5000/883285.txt b/data2/text/range/0-5000/883285.txt new file mode 100644 index 0000000000000000000000000000000000000000..fd2a07faef50d261d9d540b973de21eff0c86f52 --- /dev/null +++ b/data2/text/range/0-5000/883285.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM: BAM plugins + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hello guys, I'd like to know more about the BAM plugins in VXLIB: http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/vxlib_c66x_1_1_4_0/docs/doxygen/html/bamplugins.html What does "BAM block based processing framework" mean? Is it somehow related or similar to the User Kernel Tiling extension in OpenVX (https://www.khronos.org/registry/OpenVX/specs/1.1/html/d0/d84/page_design.html#sec_known_extensions)? Thanks for your help, Fernando A. Endo + +Responses: +Fernando, Fernando Endo said: What does "BAM block based processing framework" mean? This is a TI custom framework that uses DMA libraries to copy blocks/tiles of images into DSP L2 RAM in a ping pong fashion, and does tiling processing across a graph of supported kernels. If the graph has 3 sequential kernels, for example, then then one block of input is DMA'd to L2 RAM and processed through all 3 kernels using only L2 SRAM scratch memory for intermediate outputs, and then final output is DMA'd back to DDR. In parallel to the kernel processing, the DMA would have already retrieved the next block. This continues until the full image is processed through all 3 kernels. The benefit here is the faster processing due to data already being in L2 SRAM instead of latencies due to DDR access, as well as reduced overall DDR bandwidth as compared to doing all 3 kernels as full frame processing to/from DDR. The link you have given is from VXLIB documentation, which indicates which kernels have BAM plugins already available to be submitted in callbacks to the BAM framwork. In TIOVX documentation : you can see the TIOVX target kernel functions that are used to create BAM graphs within a target OpenVX kernel on C66. Fernando Endo said: Is it somehow related or similar to the User Kernel Tiling extension in OpenVX It is achieving a similar goal, but it is not using the Khronos Tiling extension. NOTE: As of PSDRA 6.02 release last week, the TIOVX and VXLIB components support BAM, however, the DMAUTILS component which BAM is dependent on has not been fully ported to TDA4x (this works on TDA2/3x if you want to prototype). This is planned, but since this functionality is deemed an optimization, it has been planned at lower priority to other functional features. Please let me know if you have further interest, and if you would like to use this feature, at what point will it be needed from a scheduling point of view. + +Hello Jesse, Thanks for your help and insightful explanations. Jesse Villarreal said: Please let me know if you have further interest, and if you would like to use this feature, at what point will it be needed from a scheduling point of view. It depends on how fast computation can be with BAM. Do you have any pointer of speedups achieved in TDA2/3 compared to the non-BAM kernels? Kind regards, Fernando + +In general, it depends on the kernel. If the kernel is highly bottlenecked by the memory IO latency, I have seen more than 2x improvement in performance. If the kernel is highly compute limited, then you may NOT see a big speedup. Regards, Jesse + diff --git a/data2/text/range/0-5000/883484.txt b/data2/text/range/0-5000/883484.txt new file mode 100644 index 0000000000000000000000000000000000000000..685998fd4dac65a5a9facebc7a443f44e361ab6c --- /dev/null +++ b/data2/text/range/0-5000/883484.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: Git clone ipumm error for TDA2 + +Query Text: +Part Number: TDA2E Hi to whom it may conern, I'm trying to clone ipumm from git.ti.com but got the following error fatal: unable to connect to git.ti.com: git.ti.com[0: 198.47.28.207]: errno=Connecton refused I also tried to clone the linux kernel and got the same error report. Any solution for it? Regards, Ming + +Responses: +Hi Ming, do you work behind a proxy? Can you check this guide: Regards, Yordan + diff --git a/data2/text/range/0-5000/883659.txt b/data2/text/range/0-5000/883659.txt new file mode 100644 index 0000000000000000000000000000000000000000..56cccc1b7d06a3b4b2448dc6fa96241cbba05f88 --- /dev/null +++ b/data2/text/range/0-5000/883659.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: EVE output data format with beamforming in Processor Radar SDK + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, AWR1243 Hi expert, We are working on TDA2+AWR1243 cascade board for beamforming test. There is two TX beam steering which is chirp based and frame based as below Is the EVE output data format same in these two scenarios? As mentioned in the graph as below. If not, what's the difference? Thanks a lot. Best Regards, Allen + +Responses: +Hi Allen, The figure which you mentioned is the output of Doppler FFT from the EVE processing. This will be same irrespective of the input, what will actually change is the way input is given to EVE FFT applet. The input is described using FFT_TI_BufferDescriptor structure. We have validated he first case (Chirp based). But I can see a potential problem if you use frame based sequence as TDA2X dma supports a maximum jump of 16 bit signed integer so if your frame jump is more than maximum 16 bit signed integer it will not work. Regards, Anshu + +Hi Anshu, Based on the sequence of frames, the number of frames is equal to the number of burst. In radarFft2. C, Eve is operated in the unit of burst. The input and output addresses correspond to their respective offset and width. How can I get the DMA parameters corresponding to the input and output of Doppler FFT. My Doppler FFT results are incorrect. Thanks. + +Hi Allen, DMA is programmed inside FFT_TI_dmaControl ( file : apps\fft\algo\src\fft_graph_int.c ). For doppler FFT fftDirection value will be FFT_TI_DIRECTION_VERTICAL. Regards, Anshu + diff --git a/data2/text/range/0-5000/884078.txt b/data2/text/range/0-5000/884078.txt new file mode 100644 index 0000000000000000000000000000000000000000..8fb982251b5156f434ea6ce7348e0d73668dbc20 --- /dev/null +++ b/data2/text/range/0-5000/884078.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ACD: Whether we have the AVS voltage gap between OPP_LOW/OPP_NOM/OPP_OD/OPP_PLUS + +Query Text: +Part Number: TDA2P-ACD Hi experts: Our customer want to use MCU ADC monitor the VDD_MPU/VDD_DSP/VDD_GPU PMIC voltage is match with software AVS setting. They want to know every AVS level the gap is fix or random value? It means that MCU get AVS Efuse value, they want to use fix +/-6% margin to judgement PMIC output voltage is right or wrong. As DM said the AVS range is -3.5%, +5%.We know that voltage for OPP_OD > OPP_NOM, but I believe +/-6% margin is too big. We do not know the AVS voltage distribution of TDA2P. Please help us review it? Best Regards! Han Tao + +Responses: +Hi Han Tao, I suggest the customer should compare the voltage on the rails to the EFUSE value per sample. That way the variance is only driven by the step voltage size of the PMIC which is a fixed value and one does not have to take in to account the % variance in the AVS per sample. Basically read voltage from ADC and the compare against EFUSE for sample +/- PMIC step voltage. The EFUSE value can be read from TDA2PX and passed on to MCU using SPI or I2C or which ever communication mechanism present between TDA2P and MCU. This can be a one time thing per ECU and stored in MCU flash as well. Thanks and Regards Piyali + diff --git a/data2/text/range/0-5000/885278.txt b/data2/text/range/0-5000/885278.txt new file mode 100644 index 0000000000000000000000000000000000000000..af2cd4198c47a9ebd643a9227c12711b63dfc0de --- /dev/null +++ b/data2/text/range/0-5000/885278.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/AM5728: AM5728 without HDMI port how to configure G streamer video codec things through serial port? + +Query Text: +Part Number: AM5728 Tool/software: TI C/C++ Compiler Hai sir, Before I am worked on AM5728 evaluation module through HDMI output port i have connected hdmi monitor through command prompt i have given commands? HIKVISION camera:1920x1080(25fps) a. sudo ifconfig eth1 10.10.11.85 netmask 255.255.254.0 up b.export RTSP_PATH=rtsp://admin:password@10.10.11.84:554 c.Less delay(80ms) & less frmaes missing command: Gst-launch-1.0 -v rtsp location="$RTSP_PATH" latency=0 ! rtpjitterbuffer ! rtph264depay ! h264parse ! ducatih264dec ! vpe ! videoconvert ! kmssink d.More delay(200ms) & More frmaes missing command: Gst-launch-1.0 -v rtsp location="$RTSP_PATH" latency=0 ! 'application/x-rtp, media=(string)video, clock-rate=(int)90000, encoding-name=(string)H264' ! rtpjitterbuffer ! rtph264depay ! h264parse ! ducatih264dec ! vpe ! 'video/x-raw, width=1920, height=1080, framerate=25/1, videoconvert ! kmssin Through HDMI output it will works but serial port not working? Actually through serial port i have given commands but not working any thing gstreamer error occuring but in HDMI port side it's working fine, please give me some suggestions. Thanking you, Regards, Ramachandra. + +Responses: +Hi Ramchandra, Could you share the info on the TI baseline release you are using here. Thanks, Gowtham + diff --git a/data2/text/range/0-5000/885353.txt b/data2/text/range/0-5000/885353.txt new file mode 100644 index 0000000000000000000000000000000000000000..02350fa4716e61011b59c8e128f2814684ec7880 --- /dev/null +++ b/data2/text/range/0-5000/885353.txt @@ -0,0 +1,16 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: Importing mobilenet v1 (tensorflow) into TIDL for the TDA4 + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X I tried importing mobilenet v1 224 starting from this tutorial for the TDA2: https://e2e.ti.com/support/processors/f/791/p/735984/2717341 I had to adjust many file names and many paths. In the end I've been able to convert mobilenet v1 into TIDL format. However, when I run the inference simulation, I get the following error: Processing config file #0 : testvecs/config/infer/public/tensorflow/tidl_infer_mobileNetv1.txt ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 948.16 ... A : 896, 0.0000, 0.0000, 670 .... ..... # 1 . .. T 908.94 ... A : 558, 0.0000, 0.0000, 420 .... ..... # 2 . .. T 901.69 ... A : 443, 0.0000, 0.0000, 420 .... ..... # 3 . .. T 897.74 ... A : 499, 0.0000, 0.0000, 420 .... ..... # 4 . .. T 909.30 ... A : 539, 0.0000, 0.0000, 420 .... ..... # 5 . .. T 896.48 ... A : 539, 0.0000, 0.0000, 420 .... ..... # 6Error in reading �̽��, �̽�� Can anyone point me in the right direction ? Is there any tutorial about importing tensorflow mobilenet models for the TDA4 ? I tried searching the forums but found nothing clear. Thanks + +Responses: +Hi, You need to download latest SDK from http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/index_FDS.html You should refer to TIDL user guide present here: http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tidl_j7_01_01_00_10/ti_dl/docs/user_guide_html/index.html Regards, Rishabh + +Hello Rishabh, thank you for your quick reply. Is there any turorial ? The documentation merely lists a series of parameters and I find it very difficult to start from scratch. Any useful getting started guide ? Kind regards, Guido + +Hi Guido, The same user guide has getting started tab. Please see http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tidl_j7_01_01_00_10/ti_dl/docs/user_guide_html/md_tidl_user_model_deployment.html Regards, Rishabh + +Thank you Rishabh, thanks to your indications we were able to fix our problem ! + +Hi Guido, Thanks for the confirmation. I am closing the thread. Regards, Rishabh + diff --git a/data2/text/range/0-5000/885715.txt b/data2/text/range/0-5000/885715.txt new file mode 100644 index 0000000000000000000000000000000000000000..48942e3c0bbafaf444e7af7b2797f985eedafca8 --- /dev/null +++ b/data2/text/range/0-5000/885715.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: MCU only BOOTMODE usecase of TDA4 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear Champs, My customer is very confusing on the complex boot mode in TDA4. I think the basic boot procedure is MCU boot -> Normal boot Is this right? Why MCU should be boot before Normal boot? What is the purpose of MCU only boot? Thanks and Best Regards, SI. + +Responses: +Hi SI, Think of the MCU's R5F processor as the boot master of the SoC. Note that boot master of J6/TDA2 was the A15 MPU, J6 didn't have an MCU island. The boot master runs its ROM code after reset and loads the SBL image. SBL then can load other cores images, in turn. The whole MCU island/domain is there for safety and diagnostics purposes in the automotive applications. The MCU-only boot allows sucessful boot even if main domain is not powered (due to power failure). MCU then can send message to other nodes in the vehicle that this node is not functional or can perform other tasks. The MCU-only boot is tryed only from MCU domain's peripherals, that's why it can be successful when main domain is OFF. Please refer also to section 4.2.3 Boot Process Flow of the TRM. Regards, Stan + diff --git a/data2/text/range/0-5000/885983.txt b/data2/text/range/0-5000/885983.txt new file mode 100644 index 0000000000000000000000000000000000000000..0c09f3f8570edfa5e07969117866485ea3041939 --- /dev/null +++ b/data2/text/range/0-5000/885983.txt @@ -0,0 +1,30 @@ +Ticket Name: TDA2EVM5777: How to use CAN bus in RTOS? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I want to use CAN bus in RTOS, is TI provide the driver(API) ? Regards + +Responses: +Hi, can you check if this document helps: Regards, Yordan + +Hi Wall-E, please disregard my previous answer, I missed that you are using TDA2x. You can check this example and see if it works for you: Regards, Yordan + +Hi Yordan, So sorry I reply so late. I have another question: How do I compile the example in sdk_3.07/ti_components/drivers/pdk_01_10_03_07/packages/ti/csl/example/mcan/mcanEvmLoopback ? Regards, + +Hi Wall-E, please check here: Regards, Yordan + +Hi Yordan, It seems the PDK CAN driver is independent of VisionSDK. And I have no JTAG debuger to download the binary object. Is a way to use CAN in VisionSDK? Like I can capture image from camera through IssCapute Link. I want to use CAN or other peripheral like camera. Regards. + +Hi Yordan, Could you give me some idea ? + +H Wall-E, I have pinged CAN experts, they will reply here soon. Regards, Yordan + +Hi Wall-E, TDA2 does not have an MCAN module in it. Instead of that, it has a DCAN module that does the handling of the CAN protocol. The sample application for DCAN is available here: 'pdk\packages\ti\csl\example\dcan\dcanLoopback'. You can try this application. VSDK does have a use-case available for the DCAN module which is available at '\vision_sdk\apps\src\rtos\modules\dcan'. I think this is only available/validated for TDA3x SoC. You can port the same use-case for TDA2x. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Dhande, Thank you for your reply. Regards. + +Hi Dhande, I want to port this usecase for TDA2Px, I search the topic in forum and found this: https://e2e.ti.com/support/processors/f/791/t/726840?tisearch=e2e-sitesearch&keymatch=tda2%25252525252520dcan And I meet the same problem, I cannot receive data from a external CAN device but the external CAN device can receive the data from TDA2Px when using loopback mode. The author said he resolve this problem through Need modify "platform_tda2xx_pad_config.c" setting to modify RX pin of DCAN form AD17 (Wakeup0) to G19(dcan1_rx) if use TDA2x EVM. But I still don't know how to modify because I didn't find this configuration. Perhaps we use the different VisionSDK version. Mine is 3.07. So could you tell me How to receive data from external CAN device in VisionSDK 3.07 in TDA2Px ? Regards + +Hi Wall-E, Looks like you are facing the same issue. Can you please configure DCAN-RX PAD on TDA2Px? Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Wall-E, To port existing DCAN use-case from TDA3x to TDA2Px, you need to take care of the following: Module and clock enable for the DCAN module, this probably will be same for both the SoCs IO PAD (dcan_xta nd dcan_rx) configurations interrupt configurations To do the PAD configurations: You can add your own API in the file 'ti_components\drivers\pdk_xx_xx_xx_xx\packages\ti\drv\stw_lld\platform\src\tda2xx\platform_tda2xx_pad_config.c' and call it in the application OR you can modify the existing one also. Please refer to 'PlatformDCAN1PadConfig' API present in the same file for more details. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/886171.txt b/data2/text/range/0-5000/886171.txt new file mode 100644 index 0000000000000000000000000000000000000000..e13f0ae271632e55116c8530a81aab77850f4e22 --- /dev/null +++ b/data2/text/range/0-5000/886171.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/BEAGLE-3P-BBONE-AI: what is the recommended GEL file to attach BBB AI board? + +Query Text: +Part Number: BEAGLE-3P-BBONE-AI Other Parts Discussed in Thread: TDA2, AM5729 Tool/software: Code Composer Studio Dear Champs, My customer is trying to connect BBB Ai board using CCS, and what is the recommended GEL file to attach BBB Ai board using CCS? Could you please share the GEL file for BBB Ai board? Thanks and Best Regards, SI. + +Responses: +Sung-IL, There is not a specific GEL bundled with the TI tools for the BB-AI a this time, but you can use much of the AM572x GEL files that are bundled with Code Composer Studio. Start with the gpevm_am572x, which will load the common AM572x gel files. Best regards, Dave + +Hi Dave, Is it possible to use TDA2 processor in this case? My customer succeed to connect Beaglebone AI using AM572x gel file and by reducing memory size to 1GB. When my customer tried to add AM5729, they found there was no EVE core in the processor, and want to connect EVE core when debugging issue was occurred. So, I would like to check if TDA2 processor can be used to connect Beagleboard AI. Thanks and Best Regards, SI. + +SI, Yes, you should be able to load the TDA2 gel. Best regards, Dave + diff --git a/data2/text/range/0-5000/886218.txt b/data2/text/range/0-5000/886218.txt new file mode 100644 index 0000000000000000000000000000000000000000..84baab4aaffcfda3e468b0eb37cc5040079fc256 --- /dev/null +++ b/data2/text/range/0-5000/886218.txt @@ -0,0 +1,8 @@ +Ticket Name: Vision SDK: Reading raw YUV data from NullSource link in order to avoid tidl_OD flicker problem + +Query Text: +Hi, I am trying to run tidl_OD example, although it runs, there is a lot of flickering (not related to fps as it only makes the video faster, but does not solve flickering issue). This is valid in the default tidl_OD example. I am using 3.03 currently. I have converted tidl_OD example to use Camera source and there is no flickering. UseCase: chains_tidl_OD NullSource -> Decode -> VPE -> .......... UseCase: chains_tidl_OD_cam Capture -> VPE -> ........ So, I think this means that Decode link is what's causing the flickering. I want to remove Decode link from Txt file and give raw yuv file in SD card. How do I achieve such a thing? UseCase: chains_tidl_OD_raw NullSource -> VPE -> .......... What kind of files are required in the SD card? Is there a usecase example of this? Any guidance is well appreciated. Thanks. + +Responses: +Hi, Refer TIDL use-case example. vision_sdk/apps/src/rtos/usecases/tidl Here raw data(BGR format not compressed) is reading from NullSrc link & sending it to the next link. In this example these parameter are set & modify according to your requirement. pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, SYSTEM_DF_BGR24_888); strncpy(pNullSrcPrm->channelParams[0].nameDataFile, pObj->inFileName, 260); Make sure raw data should be in the SD card Thanks Gaviraju + diff --git a/data2/text/range/0-5000/886384.txt b/data2/text/range/0-5000/886384.txt new file mode 100644 index 0000000000000000000000000000000000000000..d4f276d360620b10d87448c084d725ec30dbf258 --- /dev/null +++ b/data2/text/range/0-5000/886384.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2SG: how can the tda2 support LCD output BT656 ,BT1120 + +Query Text: +Part Number: TDA2SG Tool/software: TI C/C++ Compiler HI, LCD default output Is LVDS 。How can it support BT656，BT1120，what I Need to do？ + +Responses: +I see the detail Connect TDA2S to ADV7393, but I have a question about adv7393 support Input RGB444, TDA2S output format is RGB555,how can it work? + +Hi, You could find AppNote explaining how to interface ADV7393 with TDA2x at http://www.ti.com/lit/an/sprac23a/sprac23a.pdf. Rgds, Brijesh + +but I have a question about adv7393 support Input RGB444, TDA2S output format is RGB555,how can it work? + +Hi Zhangsc, I think RGB444 is not supported ADV7393. Could you please check again? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/886438.txt b/data2/text/range/0-5000/886438.txt new file mode 100644 index 0000000000000000000000000000000000000000..1252249f1439b77abcacc5ec41e9331cc73cc8af --- /dev/null +++ b/data2/text/range/0-5000/886438.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-TDAX: TPS659039 Power Diagnostic + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 Hi, We would like to implement Power Diagnostic via TPS659039 INT pin and reading Register Status. These status will be monitored, •VSYS_MON •HOTDIE •SHORT •WDT I have a question, if these issues happen(for example - SHORT), could TDA2 possibility work fine and read the PMIC register? Br, Yuki + +Responses: +Hi Yuki-san If the PMIC fails the TDA would not be working fine. Hence having a diagnostic from TDA in a fail situation would not be helpful. Thanks and Regards Piyali + diff --git a/data2/text/range/0-5000/886542.txt b/data2/text/range/0-5000/886542.txt new file mode 100644 index 0000000000000000000000000000000000000000..095f25c0a660525453823f689e4a80c135d64018 --- /dev/null +++ b/data2/text/range/0-5000/886542.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2PXEVM: TDA2 : About Tidl_OD usecase + +Query Text: +Part Number: TDA2PXEVM Hi Sirs, I need some advice. If my input is two-channel video, Which chain is recommended? chains_tidlOD_1 or chains_tidlOD_2? Or just use the original chains_tidlOD and run the loop twice. chains_tidlOD_1: chains_tidlOD_2: Thank you, Horace. + +Responses: +Hi, default TIDL_OD usecase is currently running with a single channel, So I'm not sure The TIDL algorithm will support multi-channel. So I will check with the team & get back. Thanks Gaviraju + +Hi, I am looking forward to your reply. Thanks. BR. Horace + +Hi, It will support multi-channel & use chains_tidlOD_1 usecase Thanks Gaviraju + +Hi, If use chains_tidlOD_1 usecase Two-channel run the same SSD model, but different weight. The alg_pluging whether to add an extra tidl, and give another alg_id. Or is there another method? Thanks Horace + diff --git a/data2/text/range/0-5000/886584.txt b/data2/text/range/0-5000/886584.txt new file mode 100644 index 0000000000000000000000000000000000000000..df2d7236933f7c86993eb492e05770f13fac3b85 --- /dev/null +++ b/data2/text/range/0-5000/886584.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2PHV-ACD: L3 Firewall + +Query Text: +Hello All, We have a Safety goal for a Buffer which is shared between DSP1 and IPU_C0. This buffer must be verified on each frame for possible corruption. It must not be corrupted once it fixed. Verifying each bit of buffer data for every frame is costly and time consuming. We are looking for an approach that can protect the Buffer against any memory corruption Instead of verifying Buffer for every frame. We are thinking to implement L3 firewall to protect this buffer. We are using TDA2PHV. If we read the code then it seems its General purpose device. Does this device support L3 firewall? Can we implement firewall to protect the buffer? Please guide us. Please let us know if you have other approach. Best regards, Naresh + +Responses: +Hi Naresh, can you check this Application Note and see if it can give you some directions: Regards, Yordan + +Dear Yordan, Thank you for the document. We are working on TDA2PHV. There is no any mentioned the L3 firewall support or not on TDA2P. Can you please help me to find out which L3 firewall will support or not on General purpose TDA2PHV? Here is the list of Variant for TDA2P and we are using TDA2PHV. • TDA2PHA • TDA2PHG • TDA2PHV • TDA2PSX Best regards, Naresh + diff --git a/data2/text/range/0-5000/887393.txt b/data2/text/range/0-5000/887393.txt new file mode 100644 index 0000000000000000000000000000000000000000..96351146ef613948ed975da2e4da658a31bfd202 --- /dev/null +++ b/data2/text/range/0-5000/887393.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2EXEVM: XDC out of memroy when running TIDLOD usecase + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi sir, I was running raw TI tidlOD usecase with 1280x720 resolution model. I got a run time error: [2020-03-10 16:41:53.578] [IPU1-0] 24.989446 s: GRPXSRC: Create in progress !!! +[2020-03-10 16:41:53.578] [IPU1-0] 24.990453 s: +[2020-03-10 16:41:53.578] [IPU1-0] 24.990514 s: ### XDC ASSERT - ERROR CALLBACK START ### +[2020-03-10 16:41:53.578] [IPU1-0] 24.990575 s: +[2020-03-10 16:41:53.578] [IPU1-0] 24.990849 s: out of memory: handle=0x86ade77c, size=4293584896 +[2020-03-10 16:41:53.578] [IPU1-0] 24.990941 s: +[2020-03-10 16:41:53.578] [IPU1-0] 24.990971 s: ### XDC ASSERT - ERROR CALLBACK END ### +[2020-03-10 16:41:53.578] [IPU1-0] 24.991032 s: +[2020-03-10 16:41:53.578] [IPU1-0] 24.991429 s: ti.sysbios.heaps.HeapMem: line 221: ti.sysbios.heaps.HeapMem: line 221: out of memory: handle=0x86ade77c, size=4293584896 +[2020-03-10 16:41:53.578] [IPU1-0] 24.991581 s: UTILS: MEM: Memory allocation failed due to insufficient free memory, requested - -1382400 +[2020-03-10 16:41:53.593] [IPU1-0] 24.991673 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-10 16:41:53.593] [IPU1-0] 24.991795 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243232 B (237 KB) +[2020-03-10 16:41:53.593] [IPU1-0] 24.991947 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[2020-03-10 16:41:53.593] [IPU1-0] 24.992100 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 65602048 B (62 MB) +[2020-03-10 16:41:53.593] [IPU1-0] 24.992283 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[2020-03-10 16:41:53.593] [IPU1-0] 24.992435 s: Assertion @ Line: 389 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/modules/grpxSrc/grpxSrcLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! +[2020-03-10 16:41:53.593] [IPU1-0] 24.993198 s: Assertion @ Line: 389 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/modules/grpxSrc/grpxSrcLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! I'm wondering why it is out of memory, what is the max resolution for model can be ran on TDA2? Can you also suggest me how to fix it? Thank you, Gary + +Responses: +Hi, [2020-03-10 16:41:53.578] [IPU1-0] 24.990849 s: out of memory: handle=0x86ade77c, size=4293584896 From the log I noticed, The size seems to be the wrong value, So please check why this parameter is set wrong value. Thanks Gaviraju + +Hi Gaviraju, Where should I check this value? Thank you, Gary + +Hi, Assertion @ Line: 389 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/modules/grpxSrc/grpxSrcLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! Please check in the above file. Thanks Gaviraju + diff --git a/data2/text/range/0-5000/888105.txt b/data2/text/range/0-5000/888105.txt new file mode 100644 index 0000000000000000000000000000000000000000..56101c32adc7b0b52de71aade9c2e066f3f3f9c9 --- /dev/null +++ b/data2/text/range/0-5000/888105.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EG-17: GPU to support "Frame Sequential 3D"? + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Hi Champs: Customer is using the TI TDA2 products for MP now. They are asking the "Frame Sequential 3D" feature from their end customer. Please see this : https://www.youtube.com/watch?v=5jv0HbhCuXI We have 2 questions: 1. How to use QT 3D studio to output the “Frame 3D Sequential” to the LCD output by using TDA2 GPU?? Any 3rd party or TI Document to address this support need? 2. Does our TDA2 EG parts supporting the 3D sequential output format? Please comment, thanks. BR Rio + +Responses: +Hi Rio, From the video link it appears that the left-right sequential content once generated are consumed by two displays (alternate frames going to each display). If the GPU is programmed to generate the alternate content it should be able to and this appears to be more of implementation details. Is there something specific that is needed here like support for an extension, specific format or etc. Thanks, Gowtham + +Hi Gowtham: The customer is willing to have this: https://www.youtube.com/watch?v=wZZ-KfNFG-I Does our TDA2 product is able to do this? If yes, how to implement? BR Rio + +https://github.com/dvdhrm/docs/blob/master/drm-howto/modeset-double-buffered.c hi Gowtham: please review the DRM on the above link. Customer can ser this buffer (dev->bufs[0]) as the left frame. And set this buffer: dev->bufs[1] as the right right frame Thus, they are capable to make a 3D Side by Side. Now, they want to have a 3D sequential frame (that mean: L/R frame will be viewed as a full screen. How to modify this code snippet as a 3D sequential frame? BR Rio + +Hi Rio, The mentioned buffers are ping-pong buffers used for display - one buffer is on the display and the other is used to ready the next frame and these roles keeps switching on every vsync. Here as there are two buffers for one frame, they would need four buffers to achieve ping-pong. Aside from above, the bulk of the changes needs to happen on the display side on how these left and right frames are submitted to the 3D display. What kind of display are they using and is this panel support been integrated to the driver. Thanks, Gowtham + diff --git a/data2/text/range/0-5000/888177.txt b/data2/text/range/0-5000/888177.txt new file mode 100644 index 0000000000000000000000000000000000000000..525c2fcd68de9f99c6d0f705b5a7afc0a4680a2c --- /dev/null +++ b/data2/text/range/0-5000/888177.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA2EXEVM: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! + +Query Text: +Part Number: TDA2EXEVM Hi sir, I ran tidlOD use case with a 1280x720 resolution model. I modified resolution relating part in tidlOD.c (such as display, grpxSrc) to fit my model. I also modify vpeLink_drvCommon.c according to this thread (). The detected process will be hung after starting detection process for a few seconds. 1. Here is the error message when detected process stops, [DSP1 ] 46.671628 s: Assertion @ Line: 782 in tiop/tiopLink_algPlugin.c: freeId != -1 : failed !!! +[DSP1 ] 169.284572 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! + 2. Here is the inBufStats status in AlgorithmLink_tiopProcess() before error, [2020-03-12 17:29:38.765] [DSP1 ] 80.356981 s: inBufStats 0 1 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357042 s: inBufStats 1 1 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357042 s: inBufStats 2 0 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357073 s: inBufStats 3 0 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357073 s: inBufStats 4 0 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357073 s: inBufStats 5 0 +[2020-03-12 17:29:38.796] [DSP1 ] 80.357103 s: inBufStats 6 0 +[2020-03-12 17:29:38.859] [DSP1 ] 80.453760 s: Assertion @ Line: 782 in tiop/tiopLink_algPlugin.c: freeId != -1 : failed !!! If I'm not misunderstanding, the buffer 2-6 are still available, but the error (tiop/tiopLink_algPlugin.c: freeId != -1) shows there is no free buffer can be used. 3. All things will be fine if I run with 768x320 model. Can you suggest me how to fix it? Thank you, Gary + +Responses: +Hi, Can you share the complete logs in text file? Thanks Gaviraju + +Hi Gaviraju, Here is the debug log 4645.logs.txt I found that when the error happened, the tiop buffer couldn't be released properly. And this was due to incorrect bufferID in tiopReleaseLockedBuffer() ( tmpId = -2010018329) This error will usually happen when the capture sense changed. Please suggest me what can I do next. Thank you, Gary + +Hi, Any suggestion? In my further testing , the tmpID should be positive. [2020-03-16 13:08:36.081] [DSP1 ] 33.191453 s: released tiopReleaseLockedBuffer in tmpID 2284948968 +[2020-03-16 13:08:36.112] [DSP1 ] 33.191484 s: released tiopReleaseLockedBuffer out tmpID 2284948967 Thank you, Gary + +Hi, You mentioned, "All things will be fine if I run with 768x320 model". So remove all your changes did for 1280x720 model then run the lowe resolution model( < 768x320) & let's see you will face the same issue or not. Thanks Gaviraju + +Hi, >> ...let's see you will face the same issue or not No, it runs correctly when removing changes. Can you advise the correct way to run tidlOD usecase with a 1280x720 model? Where should I change? Thank you, Gary + +Hi Gaviraju, I temporary solved this issue by lower deploy.prototxt "keep_top_k" value from 20 to 10. But 10 objects are not enough for my application. So I still need your help to find the root cause. How to deal with 20 or more objects at a time in my case? Do you have any idea? Thank you, Gary + +Hi, Please share your input files with us, we will debug the issue & get back. Thanks Gaviraju + +Hi Gaviraju, I've solved this issue, thank you for your help Gary + +Thanks for the update! + +Hi, Can you share your solutions please? I have the same problem. + diff --git a/data2/text/range/0-5000/888187.txt b/data2/text/range/0-5000/888187.txt new file mode 100644 index 0000000000000000000000000000000000000000..201fcf7db8257903d9211ee0e335ee62a05ff9c2 --- /dev/null +++ b/data2/text/range/0-5000/888187.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2PXEVM: TDA2 - Tidl_OD usecase + +Query Text: +Part Number: TDA2PXEVM Hi Sirs, Based on previous discussions -> https://e2e.ti.com/support/processors/f/791/t/886542 If use chains_tidlOD_1 usecase Two-channel run the same SSD model, but different weight. The alg_pluging whether to add an extra tidl, and give another alg_id. Or is there another method? Thanks Horace + +Responses: +Hi, I will check with TIDL team & get back Thanks Gaviraju + +Hi, Yes, you have to add an extra tidl, and give another alg_id. Thanks Gaviraju + +Hi, Thanks for your reply. BR. Horace + diff --git a/data2/text/range/0-5000/888197.txt b/data2/text/range/0-5000/888197.txt new file mode 100644 index 0000000000000000000000000000000000000000..c59db9cee3152d2f7e1d54dc1f22627322a12760 --- /dev/null +++ b/data2/text/range/0-5000/888197.txt @@ -0,0 +1,8 @@ +Ticket Name: TIDEP-01017: About DSP1 memory allocation issue + +Query Text: +Part Number: TIDEP-01017 Hi I modify the sample code of Cascade MIMO object detection of radar sdk 3.8. And I want to use MUSIC algorithm to calculation the angle of object on DSP1. Then I need to allocate memory to use SVD. The size of input data matrix of SVD is 86 * 86, and the data type is complex. I try to use "Utils_memAlloc" to allocate memory on UTILS_HEAPID_L2_LOCAL, but it failed. Can you give me some advice? Thanks. Morris + +Responses: +Hi, please try with this "UTILS_HEAPID_DDR_CACHED_SR" Thanks Gaviraju + diff --git a/data2/text/range/0-5000/888815.txt b/data2/text/range/0-5000/888815.txt new file mode 100644 index 0000000000000000000000000000000000000000..d0059d05f704ed0eee4c1a3bd0b9beafb7761596 --- /dev/null +++ b/data2/text/range/0-5000/888815.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3XEVM: TDA3X RJ45 video output + +Query Text: +Part Number: TDA3XEVM For TDA3X EVM board, there is a RJ45 connector, I would like to use this RJ45 interface to output video streaming, how can I do ? do I need video codec? thank you! Steven + +Responses: +Steven, You mean over ethernet? We dont have exact usecase. rgds, Brijesh + +Brijesh: how about TDA2x or TRA4x ? can I use them to output video streaming from Ethernet to other equipment with Ethernet interface? thank you! steven + +I find Ethernet connector RJ45 on TDA2x/3z/4x EVM board on following photos, I would like to know if I can use this Ethernet interface to output vidieo streaming to other equipment. Thank you! stevenictures, + +Hello Steven, Sorry for pitching late. Would like to know your use-case in detail for TDA3xx. We can check if it can be supported in TDA3 without the video codec. + diff --git a/data2/text/range/0-5000/888903.txt b/data2/text/range/0-5000/888903.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2e3d53a802d533d040af509e4f09df0484bf768 --- /dev/null +++ b/data2/text/range/0-5000/888903.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4VM: TDA4VM OD(Jdetnet 768x320) green screen on EVB + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2, Hello, I tried testing JDetnet 768x320(TDA2 ssd) by run_app_tidl_avp.sh on TDA4VM , but it has green color on screen. The model output on PC via import tools(simulator) and the output value on TDA4V EVB looks good as below LOG(2.). I knew that it was related to 'kp_valid_ptr' in the tivxKernelODDrawDetectionsProcess (Vx_od_draw_detections_target.c) if((pPSpots->score >= params->viz_th) && (kp_valid_ptr[i] == 1) && (data_ptr_1 != 0x0) && (data_ptr_2 != 0x0)) { drawPoints(params, data_ptr_1, data_ptr_2, &kp_ptr[i*total_points_per_box*2],total_points_per_box, pPSpots->label); } It is '0', when EVB print log of the val for debugging the problem. could you explain the value in detail ? could you recommend on how the green screen issue resolve? The cfg file is as below. 1. PSDK: 6.1.0 cfg file in_size 1280 720 od_size 768 320 viz_th 0.4 0.2 enable_psd 0 enable_vd 1 enable_sem_seg 0 2. printf LOG [C6x_1 ] 96.427864 s: KHDBG: KernelODDrawProcess +++++++++ [C6x_1 ] 96.427926 s: NumObj[ 4] ObjInfoSize[28] Offset[16] !! [C6x_1 ] 96.427973 s: >>> L[2.0] S[0.359] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.428017 s: >>> L[2.0] S[0.334] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.428061 s: >>> L[2.0] S[0.229] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.428105 s: >>> L[2.0] S[0.229] viz_th[0.200] kp_valid_ptr[1], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.428134 s: KHDBG: KernelODDrawProcess --------- [C6x_1 ] 96.458682 s: KHDBG: KernelODDrawProcess +++++++++ [C6x_1 ] 96.458728 s: NumObj[ 3] ObjInfoSize[28] Offset[16] !! [C6x_1 ] 96.458770 s: >>> L[2.0] S[0.409] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.458813 s: >>> L[2.0] S[0.261] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.458857 s: >>> L[2.0] S[0.229] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.458885 s: KHDBG: KernelODDrawProcess --------- [C6x_1 ] 96.489408 s: KHDBG: KernelODDrawProcess +++++++++ [C6x_1 ] 96.489454 s: NumObj[ 2] ObjInfoSize[28] Offset[16] !! [C6x_1 ] 96.489495 s: >>> L[2.0] S[0.373] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.489539 s: >>> L[2.0] S[0.366] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bddc0000], data_ptr_2[bde00000] [C6x_1 ] 96.489567 s: KHDBG: KernelODDrawProcess --------- [C6x_1 ] 96.519823 s: KHDBG: KernelODDrawProcess +++++++++ [C6x_1 ] 96.519869 s: NumObj[ 3] ObjInfoSize[28] Offset[16] !! [C6x_1 ] 96.519926 s: >>> L[2.0] S[0.584] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.519977 s: >>> L[2.0] S[0.229] viz_th[0.200] kp_valid_ptr[0], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.520022 s: >>> L[2.0] S[0.229] viz_th[0.200] kp_valid_ptr[1], data_ptr_1[bd560000], data_ptr_2[bd5a0000] [C6x_1 ] 96.520053 s: KHDBG: KernelODDrawProcess --------- BR, Khethan + +Responses: +Khethan, The AVP Demo is trained for fish-eye images and not rectilinear images, we have added an example to perform simple object detection on rectiliner images. This demo will be available publicly by May 2020 but if you need it before that, you will need to have a CDDS account where I can share the new demos. As the AVP demo works on fish-eye images, the parking sport is trapezoidal in nature. So a rectangle co-ordinates of (xmin, ymin) (xmax, ymax) does not apply. So we identify what is called as key-points, basically points at the four corners of the parking lot and then do some post-processing to interpolate the points and draw lines on a fish eye-image. If you are doing simple object detection, you will be unable to use this demo out-of-the-box. I am not sure why you are observing a green screen, its possible that you are not selecting the right input in Mosaic Node. When you disable PSD and segmentation, the Mosaic input list gets changed and the logic to select the inputs need to be updated. Regards, Shyam + +Hello Shyam, Thanks for you quick reply. I understand what you say and will be able to resolve the problem. I have CDDS account, so could you please share the new example demos ? BR, Khethan + diff --git a/data2/text/range/0-5000/889638.txt b/data2/text/range/0-5000/889638.txt new file mode 100644 index 0000000000000000000000000000000000000000..04b054c0d85a9befa2fcf746971086c61f0b8cf9 --- /dev/null +++ b/data2/text/range/0-5000/889638.txt @@ -0,0 +1,63 @@ +Ticket Name: DRA756: How to disable J6 emmc power save mode. + +Query Text: +Part Number: DRA756 Hi experts: Our customer need use PON (Power off notification) function at their project. Micron eMMC when received PON command -- CMD6, Micron emmc need long time to process the PON command. But J6 emmc driver will stop eMMC_CLK very quickly. So micron emmc can not successful finish PON command. Could you please suggest how to disable J6 emmc power save mode? We have try to modify omap_hsmmc_set_ios() power_off case and delete all those POWER_OFF function. it can not keep eMMC send out clock. Best Regars! Han Tao + +Responses: +Hi Tao Han, Could you share the procedure you are using to test Power Off Notification on Linux? Regards, Vishal + +Hi Han Tao, In Linux Kernel omap_hsmmc driver we don't think there is an issue handling power off notification. -1- In poweroff_notify timeout is correctly chosen based on SHORT or LONG static int mmc_poweroff_notify(struct mmc_card *card, unsigned int notify_type) +{ + unsigned int timeout = card->ext_csd.generic_cmd6_time; + int err; + + /* Use EXT_CSD_POWER_OFF_SHORT as default notification type. */ + if (notify_type == EXT_CSD_POWER_OFF_LONG) + timeout = card->ext_csd.power_off_longtime; + + err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_POWER_OFF_NOTIFICATION, + notify_type, timeout, true, false, false); + if (err) + pr_err("%s: Power Off Notification timed out, %u\n", + mmc_hostname(card->host), timeout); + + /* Disable the power off notification after the switch operation. */ + card->ext_csd.power_off_notification = EXT_CSD_NO_POWER_NOTIFICATION; + + return err; +} -2- In __mmc_switch API, this timeout is stored as busy_timeout int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value, + unsigned int timeout_ms, bool use_busy_signal, bool send_status, + bool ignore_crc) +{ +. +. + cmd.busy_timeout = timeout_ms; + -3- In omap_hsmmc driver, this busy_timeout is used as data timeout. static int +omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) +{ + int ret; + unsigned long long timeout; + + host->data = req->data; + + if (req->data == NULL) { + OMAP_HSMMC_WRITE(host->base, BLK, 0); + if (req->cmd->flags & MMC_RSP_BUSY) { + timeout = req->cmd->busy_timeout * NSEC_PER_MSEC; + + /* + * Set an arbitrary 100ms data timeout for commands with + * busy signal and no indication of busy_timeout. + */ + if (!timeout) + timeout = 100000000U; + + set_data_timeout(host, timeout, 0); + } + return 0; + } + Regards, Vishal + +Hi Vishal: Thanks for your help. Except your provided driver modify. At linux PSDK release use below command can continue send out MMC clock. With below command, now can continue send out eMMC_CLK at EVM board. Believe this method can work. dd if=/dev/mmcblk0 of=/dev/null count=1000000 & omapconf write 0x480B4010 0x14 omapconf write 0x480b4110 0x130C omapconf write 0x480b412C 0x118620 Best Regards! Han Tao + diff --git a/data2/text/range/0-5000/889791.txt b/data2/text/range/0-5000/889791.txt new file mode 100644 index 0000000000000000000000000000000000000000..3becae4cfae413ae15eac3bfd13001165d61b4d7 --- /dev/null +++ b/data2/text/range/0-5000/889791.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/PROCESSOR-SDK-DRA8X-TDA4X: how to test time on TDA4 c66 + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Tool/software: Code Composer Studio Hi : on tda2 EVM i test time function cost use TSCH and TSCL. what about TDA4 evm ? unsigned long long WH_time[10]; double WH_cost[10]; TSCH = 0; TSCL = 0; WH_time[0] = _itoll(TSCH,TSCL); Thanks Shuai + +Responses: +Hi Shuai, you should be able to use the same functionality in TDA4x. For some directions you can see "Example 17. Profiling Example" in this AppNote: and this E2E post: Regards, Yordan + diff --git a/data2/text/range/0-5000/889812.txt b/data2/text/range/0-5000/889812.txt new file mode 100644 index 0000000000000000000000000000000000000000..1bf1bdc61926917b43933258b381c2561b4d4f5a --- /dev/null +++ b/data2/text/range/0-5000/889812.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: channel switching in single channel display. + +Query Text: +Part Number: TDA2EXEVM Hello there, We are having an use-case for 6-channel display. Capture(6-channels) -> VPE -> Merge -> Display. For switching between the channels we are using the below API, Int32 System_linkControl(UInt32 linkId, UInt32 cmd, Void *pPrm, UInt32 prmSize, Bool waitAck) If we want to switch the API, the parameter "params.activeChId" from structure typedef struct { UInt32 activeChId; /**< Active chID from which frames should be displayed */ } DisplayLink_SwitchChannelParams; are assigned the value to change the channels. But every-time channel 0 is displayed first. even though we have changed the activeChId to some other value not 0. For our requirement we need to display data based on the activeChId value. Please suggest the solution. Thanks & regards Balaji T + +Responses: +Hi, Can you confirm the function "DisplayLink_drvSwitchCh" is called or not after sending the command using the API "System_linkControl"? Thanks Gaviraju + +Hi Gaviraju, In file ./links_fw/src/rtos/links_ipu/display/displayLink_drv.c API DisplayLink_drvSwitchCh(pObj, &switchParams) i have enabled the print. While giving switch command to System_linkControl , that print is not getting printed in the debug screen, Regards Balaji T + +Hi, It seems you are not sending a command properly(Make sure link ID argument is correct or not) in the System_linkControl function call. refer "chains_lvdsVipMultiCam_Display_SwitchDisplayChannel" function here they are trying to switch the input channel to display. Thanks Gaviraju + diff --git a/data2/text/range/0-5000/890883.txt b/data2/text/range/0-5000/890883.txt new file mode 100644 index 0000000000000000000000000000000000000000..c44c7ea1c722c879b330b4005487ca9a1ee71a4a --- /dev/null +++ b/data2/text/range/0-5000/890883.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: Question about TDIL OD fps and input resolution of a model + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, For my understanding, the larger input image size of a model, the lower fps on TDA2. When I test with 3 different input image size model, 768x320, 1080x635 and 1280x720, I got 22 and 5.47 and 9.65, respectively. Is this reasonable? I'm wounder what will make this happen. Thank you, Gary + +Responses: +Hi Gary, you can press 'p' when running the usecase to get statistics of the various links (including TIDL link) and see their input fps, output fps, processing time, etc. Can you try this and see if you can find what cause such behaviour? Regards, Yordan + +Hi Yordan, Here are the statistics for two different resolution models. 1280x720.txt 1080x636.txt As I can see, 1080x636 model take more time in TIDL part. I use the same model but different resolution to train. If all settings are the same, is there any reason make this happen? Thank you, Gary + +Hi Gary, >> As I can see, 1080x636 model take more time in TIDL part. Yes, this expected because this resolution is not suitable for SIMD optimization, as TIDL operates on blocks of 32x32, so you see some degradation compare to other resolutions. It is recommend to use resolutions that are multiples of 32 to get better fps. Thanks, Praveen + diff --git a/data2/text/range/0-5000/890898.txt b/data2/text/range/0-5000/890898.txt new file mode 100644 index 0000000000000000000000000000000000000000..5a95b7ecf3d4d4fe5391425da99be1aa42c6f97d --- /dev/null +++ b/data2/text/range/0-5000/890898.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2E: how I find the link ID related source code？ + +Query Text: +Part Number: TDA2E (1)For example,IF I want to find the source code if ID Alg_RadarProcess_objectDetectLinkID,where I can find it. (2) I design anew set of radar parameter,how to make sure that the DSP,EVE will finish theri job in a certain time? Make the DSP a sinlge peoject test it? + +Responses: +Hi, (1)For example,IF I want to find the source code if ID Alg_RadarProcess_objectDetectLinkID, where I can find it. >>>> First you need to find out in which use-case this algorithm(Alg_RadarProcess_objectDetect) is used. This algorithm used in "vision_sdk/apps/src/rtos/radar/src/usecases/cascade_radar_object_detect" usecase. Here 5 Algorithm link is defined in the use-case such as Alg_RadarProcess_fft1 Alg_RadarProcess_fft2 Alg_RadarProcess_fft3 Alg_RadarProcess_fft4 Alg_RadarProcess_objectDetect For every algorithm link, the create parameter structure member is created in the use-case as below typedef struct { chains_cascadeRadarOdObj ucObj; ChainsCommon_Ar12xxConfigOut ar12xxCfg; Chains_Ctrl *chainsCfg; /* Algorithm */ AlgorithmFxn_RadarFftCreateParams radarFftParams1; AlgorithmFxn_RadarFftCreateParams radarFftParams2; AlgorithmFxn_RadarFftCreateParams radarFftParams3; AlgorithmFxn_RadarFftCreateParams radarFftParams4; AlgorithmFxn_RadarDspProcessCreateParams radarDspOdParams; } Chains_cascadeRadarOdAppObj; The next step is you have grep "AlgorithmFxn_RadarDspProcessCreateParams" in the vision SDK, then you can see where it's being used. vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspprocess - This is the source code directory for the link "Alg_RadarProcess_objectDetect" 2)I design anew set of radar parameter,how to make sure that the DSP,EVE will finish theri job in a certain time? Make the DSP a sinlge peoject test it? >>> I will check with our teammates & get back + +For #2, yes, you will have to run it to get the benchmark numbers for DSP algorithm. + +Hi thank U （1）I didn't find the ision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspprocess，there is no file named radardspprocess,is it radardspcascademimo? （2）In your example, my code is /* Algorithm */ AlgorithmFxn_RadarFftCreateParams radarFftParams1; AlgorithmFxn_RadarFftCreateParams radarFftParams2; AlgorithmFxn_RadarFftCreateParams radarFftParams3; AlgorithmFxn_RadarFftCreateParams radarFftParams4; AlgorithmFxn_RadarDsp CascadeMimoCreateParams radarDspOdParams; is my software wrong? + +Yup Thanks Gaviraju + +hi ,please help me sovled my problem? I can't find the file you refered,and my source code is different from your + +HI thanks if I need test the DSP algorithm with static test data,what should I do?use a CCS project or use a link? + +（1）I didn't find the ision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspprocess，there is no file named radardspprocess,is it radardspcascademimo? >>>> radardspprocess was used in the older SDK version & for your SDK version "radardspcascademimo" is the source code directory of the link （2）In your example, my code is /* Algorithm */ AlgorithmFxn_RadarFftCreateParams radarFftParams1; AlgorithmFxn_RadarFftCreateParams radarFftParams2; AlgorithmFxn_RadarFftCreateParams radarFftParams3; AlgorithmFxn_RadarFftCreateParams radarFftParams4; AlgorithmFxn_RadarDspCascadeMimoCreateParams radarDspOdParams; is my software wrong? >>>> This is correct & whatever I mentioned in the above post that is used in the older SDK version Thanks Gaviraju + diff --git a/data2/text/range/0-5000/891499.txt b/data2/text/range/0-5000/891499.txt new file mode 100644 index 0000000000000000000000000000000000000000..cbcb91dfc9023224c18d0968f72b2481dfb4d9ab --- /dev/null +++ b/data2/text/range/0-5000/891499.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: How to dump Clock tree for CTT on TDA4VM + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear experts, Is there a tool to dump clock tree for CTT from TDA4VM? I am using PSDKRA 6.2. In TDA2 gen, we have "omapconf ctt dump". Thanks & Best Regards! ZM + +Responses: +Hello ZM, git.ti.com/.../ This is k3conf Tool. Similar to omapconf. Please follow the readme. k3conf dump clock Gives the dump of all the clocks this might not be exactly like omapconf but this is the closest you can get with that. Attaching the binary for your reference. Just copy that your file system and run the command: k3conf dump clock Note: Attachment is k3conf.txt just download it and rename it to k3confk3conf.zip Hope this thread can be resolved. Regards, Keerthy + diff --git a/data2/text/range/0-5000/892569.txt b/data2/text/range/0-5000/892569.txt new file mode 100644 index 0000000000000000000000000000000000000000..85b3a4bcf1859e932d769002c348dd1174ed2f5e --- /dev/null +++ b/data2/text/range/0-5000/892569.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2S VISION SDK 0305 Linux output 720p bt601/bt656 to DS90UB933 + +Query Text: +Part Number: TDA2SX Hello! expert I need to run Linux from tda2s Vout1 output bt601 SDK:PROCESSOR_SDK_VISION_03_05_00_00, tda2sx--vout1[0:7] vout1_sync vout1_v/hsync--->（BT601）----->DS90UB933----(CML)------>DS90UB934, How to output 720p bt601 to ds90ub933 to ds90ub934 under vision_SDK 0305 Linux? Bt655 output supported? Bt601 output supported? Does ds90ub933 support bt656 and bt601 output? + +Responses: +Hi, Well, i can answer from DSS point of view. DSS definitely supports BT601 output. But it is not supported or no example is available in vision sdk.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/892591.txt b/data2/text/range/0-5000/892591.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f6eb3755921b56ebb87c1144cee6dc19454b75d --- /dev/null +++ b/data2/text/range/0-5000/892591.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4VM: TIDL: How can I get Out Q values(scale factors) of layers after model import ? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, After model import in TIDL TDA2, we can get Out Q value from part of outArgs typedef struct { IVISION_OutArgs iVisionOutArgs; int32_t numOutBufs; int32_t dataQ[TIDL_NUM_OUT_BUFS]; } TIDL_outArgs;. Here is my question: How can I get Out Q values of layers in TIDL TDA4 after import? And is there any difference(like format or meaning of value) between Out Q values of TDA4 and TDA2? Thank you! Best regards. Kuanlin + +Responses: +Hi Kuanlin, If you enable in the inference config file: debugTraceLevel = 1 writeTraceLevel = 3 you'll see the scale value for each tensor being displayed in float. Please refer to section Feature Map Scale Analysis of Note that on TDA4x, the definition of TIDL_outArgs is: typedef struct { /** Common outArgs for all ivision based modules */ IVISION_OutArgs iVisionOutArgs; /** Number of output buffers */ int32_t numOutBufs; /** Scale factor for each output tensor */ float32_tidl scale[TIDL_NUM_OUT_BUFS]; } TIDL_outArgs; You can use the following C pseudo-code to convert each layer's output from integer to float: for (i=0;i 1.11V power supply. but when A15 work at OPP_NOM mode, the VDD_MPU voltage is maybe < 1.0V. At this time software trigger warm reset signal, LP87565+TPS65917 keep the power supply voltage is OPP_NOM, it below than DM request. Old TPS659039 PMIC when warm reset the output voltage will return to default setting as swcu175c.pdf user guide introduce. So J6P EVM board warm reset whether have risk can not successful boot up? Best Regards! Han Tao + +During development of the J6Plus EVM, TI SW team made an assessment on the value of warm reset & decided that this operation had minimal value. Please kindly refer to note #5 captured on the J6Plus EVM PDN diagram that clearly states the following: 5. This PDN does not support a “Warm Reset” that can be initiated by SW running on SoC by asserting the RSTOUTn ball. The LM87xxx PMIC family does not support this type of SW reset functionality that is supported by the TPS659xx PMIC family. + +Hi Bill & Robert: Thanks clarify it to me. Because customer when MCU probe TDA2P software hung, it will pull down PORz and restart TDA2P. Very low probability some board can not successful boot up i am worry that it have relationship with PMIC do not reset to the default voltage. It is clear that J6P/TDA2P EVM board warm reset will not trigger LP87565+TPS65917 output voltage return to the default value. Best Regards! Han Tao + +Tao, If the PMIC was at a safe AVS voltage prior to reboot, then the SoC should be able to boot just fine at that same voltage. Regards, Kyle + diff --git a/data2/text/range/0-5000/893425.txt b/data2/text/range/0-5000/893425.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc6fd8508ef85bac98e46de173ac36af687e3066 --- /dev/null +++ b/data2/text/range/0-5000/893425.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2PXEVM: VisionSDK3.07 usecase DCAN cannot communicate with other CAN device. + +Query Text: +Part Number: TDA2PXEVM Hi, I try to use DCAN to communicate with other CAN device in TDA2Px-ACD EVM in VisionSDK3.07. I heard this usecase is for TDA3 but not TDA2Px. So I met some problem. Follow the TDA3 user guide, I compiled DCAN usecase into VisionSDK by setting "DCAN_INCLUDE=yes". But it seems it only run once and send nothing data to the CAN bus, Because my logic analysis do not capture any signal and my CAN device do not receive any data. And then I set ENABLE_B2B_DCAN_TEST to 0U to enable loopback mode. After that it can receive data that it transmit. My CAN device also receive data from TDA2Px. But TDA2Px still cannot receive the data that my CAN device transmit. I've created a topic about how to use DCAN and found some relevant topic https://e2e.ti.com/support/processors/f/791/p/885983/3301649 I created before. https://e2e.ti.com/support/processors/f/791/p/889985/3302997#3302997 A relevant topic he met a same problem Then then I found a important topic. The author said he resolve this problem through Need modify "platform_tda2xx_pad_config.c" setting to modify RX pin of DCAN form AD17 (Wakeup0) to G19(dcan1_rx) if use TDA2x EVM. But I still don't know how to modify because I didn't find this configuration. Perhaps we use the different VisionSDK version and different Board. https://e2e.ti.com/support/processors/f/791/t/726840?tisearch=e2e-sitesearch&keymatch=tda2%25252525252520dcan It seems it's a hardware problem. So could you give me some help ? Regards + +Responses: +Hi Wall-E, To port existing DCAN use-case from TDA3x to TDA2Px, you need to take care of the following: Module and clock enable for the DCAN module, this probably will be same for both the SoCs IO PAD (dcan_xta nd dcan_rx) configurations interrupt configurations I'll check with the colleague on PAD configurations and will get back to you. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Wall-E, To configure the DCAN_RX pad, you can add your own API in the file 'ti_components\drivers\pdk_xx_xx_xx_xx\packages\ti\drv\stw_lld\platform\src\tda2xx\platform_tda2xx_pad_config.c' and call it in the application OR you can modify the existing one also. Please refer to 'PlatformDCAN1PadConfig' API present in the same file for more details. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/894086.txt b/data2/text/range/0-5000/894086.txt new file mode 100644 index 0000000000000000000000000000000000000000..a2fb9ec1785559551ce1834fb1a51cf1037d28ba --- /dev/null +++ b/data2/text/range/0-5000/894086.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2PXEVM: A15 Micro-Processor On the TDA2 + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2, TIDEP-01017 Hi, I am using the TDA2 Cascade Processor board and have the following questions: 1. Which flavor of TDA2 chip is on that board? There seems to be 3 variant of TDA2 chipset 2. The Dual ARM A15 processor, if I am running ti-rtos, can i develop radar application (use case) using this processor same way as how IPUs or DSP cores are being used? If this is possible, this will provide even more flexibility to radar application development 3. I looked in the processor SDK source tree. There is actually build configurations for tda2xx_cascade_linux_radar & tda2xx_evm_bios_radar that use the A15 where PROC_A15_0_INCLUDE=yes. I can understand the tda2xx_cascade_linux_radar uses the A15 as the main processor. What is tda2xx_evm_bios_radar build configuration? What EVM board is this and what is the purpose of this board that uses the A15? Thanks, --Khai + +Responses: +There is also IPU2 on the TDA2, Can both A15 and IPU2 be used in radar use case application? My guess is yes if the memory map is configured properly. Thanks, --Khai + +1) Please refer to TIDEP-01017 datasheet on ti.com. 2) Yes. 3) For bios build, A15 is not running any active task but just staying in Idle task. It is free to be used. It is for the same EVM as linux build. 4) Yes. IPU2 can also be used. + diff --git a/data2/text/range/0-5000/894771.txt b/data2/text/range/0-5000/894771.txt new file mode 100644 index 0000000000000000000000000000000000000000..581042b15f565317bca480c67e7bd59cd6be0c09 --- /dev/null +++ b/data2/text/range/0-5000/894771.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ACD: CDDS Account for TI DMA Utility download + +Query Text: +Part Number: TDA2P-ACD I am looking at the document titled "TI Deep learning Library on TDAx - User Guide" from TI. Within this, one of the steps to get started is to install the DMA utility Library provided by the following link: https://cdds.ext.ti.com/ematrix/common/emxNavigator.jsp?objectId=28670.42872.62652.37497 The download package through the above link requires a TI CDDS account. How can I get access to this account? Please Help. + +Responses: +Hi Abhishek, you need to contact your local TI representative to get access to CDDS. Regards, Yordan + diff --git a/data2/text/range/0-5000/895136.txt b/data2/text/range/0-5000/895136.txt new file mode 100644 index 0000000000000000000000000000000000000000..bf03c374800480f5318972b4af4588911c449571 --- /dev/null +++ b/data2/text/range/0-5000/895136.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2EXEVM: Changing TDA2 Memory Map + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2, SYSBIOS Hi, I need to have much bigger DDR memory foot print for DSP1. Looks like all memory allocation request ended up a rquest to IPU0 for allocation. And ultimately the size of the Frame Buffer on SR1 needs to be much bigger. I tried to change the TDA2 memory map based on this doc https://processors.wiki.ti.com/index.php/VSDK/VisionSDK_UserGuide_MemoryMap 1. Created a new memory map C:\TI\processor_sdk_radar_03_08_00_00\vision_sdk\apps\build\tda2xx\mem_segment_definition_bios_1024mb.xs file for 1024MB with below changes: DDR3_SIZE = 1024*MB; DDR3_BASE_SIZE_0 = 1019*MB; if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") { /* Ensure ECC regions are 64kB aligned */ SR1_FRAME_BUFFER_SIZE = 809.5*MB; SR1_BUFF_ECC_ASIL_SIZE = 1*MB; SR1_BUFF_ECC_QM_SIZE = 40*MB; SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; } else { SR1_BUFF_ECC_ASIL_SIZE = 4*KB; SR1_BUFF_ECC_QM_SIZE = 4*KB; SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; SR1_FRAME_BUFFER_SIZE = 851.5*MB - } 2. From C:\TI\processor_sdk_radar_03_08_00_00\vision_sdk\build\rtos\tda2xx, modified the 4 config_a15.bld, config_m4.bld, etc...to look for 1024mb .xs file if (platformMem == "DDR_MEM_1024M") { var MemSegDefine = xdc.loadCapsule("" + appPath + "/build/tda2xx/mem_segment_definition_bios_1024mb.xs"); } if (platformMem == "DDR_MEM_512M") { var MemSegDefine = xdc.loadCapsule("" + appPath + "/build/tda2xx/mem_segment_definition_bios.xs"); } 3. Modified C:\TI\processor_sdk_radar_03_08_00_00\vision_sdk\apps\configs\tda2xx_cascade_bios_radar\cfg.mk DDR_MEM=DDR_MEM_1024M 4. Modified C:\TI\processor_sdk_radar_03_08_00_00\vision_sdk\build\rtos\makerules\components.make ifeq ($(PLATFORM),$(filter $(PLATFORM), tda2xx-evm tda2xx-rvp)) vision_sdk_CFLAGS = -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI vision_sdk_CFLAGS += -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ ifeq ($(DDR_MEM),DDR_MEM_512M) vision_sdk_CFLAGS += -DTDA2XX_512MB_DDR else vision_sdk_CFLAGS += -DTDA2XX_1024MB_DDR endif After that rebuilt the code with a fresh build (ie: gmake -s -j depend, etc...), Run the AppImage and it got stuck at boot in the attached screenshot. Please advice...any feedback is appreciate it. Thanks, --Khai + +Responses: +Hi, Have you done clean build by deleting the binaries folder? Thanks Gaviraju + +Yes + +Have you removed below changes in the 4 config_a15.bld, config_m4.bld, etc.. ? if(A15TargetOS == "Bios") { var MemSegDefine = xdc.loadCapsule("" + appPath + "/build/tda2xx/mem_segment_definition_bios.xs"); } Thanks Gaviraju + +Hi Gaviraju, But I have this kind of logic in all 4 files with 1024MB memory check below: if(A15TargetOS == "Bios") { if (platformMem == "DDR_MEM_1024M") { var MemSegDefine = xdc.loadCapsule("" + appPath + "/build/tda2xx/mem_segment_definition_bios_1024mb.xs"); } if (platformMem == "DDR_MEM_512M") { var MemSegDefine = xdc.loadCapsule("" + appPath + "/build/tda2xx/mem_segment_definition_bios.xs"); } } Thanks, --Khai + +Hi, Discard all your changes & refer to to below document. vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf Chapter 6.5: How To – Modify 512MB Bios Memory map to 1GB Bios Memory map Please apply the changes mentioned in the above steps. Thanks Gaviraju + +Hi Gaviraju, There are a few outdated steps against existing Processor SDK 3.08 source tree. I was able to get it to work, however. The main thing missing in the PDF User Guide is the SR1 Frame Buffer size needs to be changed higher as EVEs and DSPs memory allocations are moved to SR0 thus freeing up about 100MB of DDR3 on SR1. This helped a little bit but not actually an increase to 1024 MB from the original 512MB. Is this the best we can do? Can SR1 Frame Buffer cross over to the non-cached SR0? Thanks, --Khai + +Hi, Please refer the below section vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf 6.2 Changing size of a Section in the Memory map Thanks Gaviraju + diff --git a/data2/text/range/0-5000/895256.txt b/data2/text/range/0-5000/895256.txt new file mode 100644 index 0000000000000000000000000000000000000000..c93fbec8a252d1e91eacaf17517936b100981572 --- /dev/null +++ b/data2/text/range/0-5000/895256.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2P: Write Back channel cause SYNCLOST1 error + +Query Text: +Other Parts Discussed in Thread: SYSBIOS Hello All, Hello All, We are using TDA2P Soc. In Display driver, we have configured VID1 pipeline to display live picture through LCD output. We are using NV12 Video format to input VID1 Pipeline and output is RGB24. We also need to capture same LCD out and store in system memory. Hence we used Write Back pipeline to capture the display frame with capture mode and video format is RGB888. Surprisingly, once we enable the WB pipeline, we got the SYNCLOST1 Error and lost the live picture on LCD display. By further debugging, we check the IRQ_STATUS register and found that we are getting WBUNCOMPLETEERROR_IRQ along with SYNCLOST1 IRQ. To overcome WBUNCOMPLETEERROR_IRQ error, we have set the DISPC_WB_ATTRIBUTES2[7:0] WBDELAYCOUNT bit field to maximum but unfortunately we got the same errors again. WE thought there will be timing issue and we change the WB configuring from CAPTURE to Memory to memory transfer, but unfortunately again the we got the SYNCLOST1 error without WBUNCOMPLETEERROR_IRQ. We even try different burst size and burst type in WB and VID1 config with different arbitration priority. We also used WB_MFLAG mechanism to avoid WBUNCOMPLETEERROR, but result is the same, SYNCLOST1. Could you please help us and let us know what could be necessary to avoid this issue. Best regards Naresh + +Responses: +Hi Naresh, Please refer to WB-CRC usecase vision sdk and use WB pipeline accordingly. Rgds, Brijesh + +HI Brijesh, Thank you so much for your prompt response. Yes I will do that but this will be time consuming for us. Do you have anything in your mind on first glance what could be the wrong in configuration or what could be missed in init. Best regards, Naresh + +Hi Naresh, We also do have few examples in PDK in vision_sdk\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\vps\examples\dss\displayDssWb\src\DisplayDssWb_main.c. You could try and refer this example. Rgds, Brijesh + +Hi Brijesh, I have tried DisplayDSS eample code. While running the code I got below error. We running the code on our own TDA2p Board. Please let me know What must be we need to modify so this example code will work on our ECU. [Cortex_M4_IPU1_C0] DISP_DSS_APP: Sample Application - STARTS !!! ti.sysbios.family.arm.m3.Hwi: line 1105: E_hardFault: FORCED ti.sysbios.family.arm.m3.Hwi: line 1182: E_busFault: PRECISERR: Immediate Bus Fault, exact addr known, address: d1082800 Exception occurred in background thread at PC = 0x800af426. Core 0: Exception occurred in ThreadType_Task. Task name: {unknown-instance-name}, handle: 0x80200008. Task stack base: 0x80272f80. Task stack size: 0x2800. R0 = 0x0000000c R8 = 0x8007ec86 R1 = 0xd1082800 R9 = 0x00000000 R2 = 0x00000000 R10 = 0xffffffff R3 = 0x00000001 R11 = 0xffffffff R4 = 0x00000000 R12 = 0x17e60300 R5 = 0x8007eadc SP(R13) = 0x80275698 R6 = 0x8007ead4 LR(R14) = 0x800cd9cb R7 = 0x8007ead8 PC(R15) = 0x800af426 PSR = 0x01000000 ICSR = 0x0440f803 MMFSR = 0x00 BFSR = 0x82 UFSR = 0x0000 HFSR = 0x40000000 DFSR = 0x00000001 MMAR = 0xd1082800 BFAR = 0xd1082800 AFSR = 0x00000000 Terminating execution... Mfg, Naresh + +Hi Brijesh, I have debug the code further and found that Fvid2_create is returning a null pointer. No idea how it could happen. Mfg, Naresh + +Hi Brijesh, While running DisplayDSS vision sdk code on our own ECU, we are not able to access the memory mapped register. I have attached debug image. Best regards, Naresh + +Hi Naresh, How are you running this example? Are you running after loading and running gel files on A15? Please note that without running 'OnTargetConnect' Option on A15 gel files, this example can't be run. This option powers on the modules and enables clock.. Rgds, Brijesh + +Hello Brijesh, I am running the code on IPU1 C0. Yes, I am running by loading the gel files and running the script TDA2Px_MULTIPLECORES_EnableAllcores, OnTargetConnect and IPU1SSClkenable_API. Then Load the vps_examples_displayDssWb_ipu1_0_debug.xem4 on ipu1 c0. This is the build command. gmake -s vps_examples_displayDssWb BOARD=tda2px-evm CORE=ipu1_0 BUILD_PROFILE=debug Best regards, Nares + diff --git a/data2/text/range/0-5000/895570.txt b/data2/text/range/0-5000/895570.txt new file mode 100644 index 0000000000000000000000000000000000000000..4b3389869ecb9f8d209e6e8eed0f379738672a1a --- /dev/null +++ b/data2/text/range/0-5000/895570.txt @@ -0,0 +1,12 @@ +Ticket Name: PROCESSOR-SDK-DRA7X: How do we enable nfs server in busybox ? + +Query Text: +Part Number: PROCESSOR-SDK-DRA7X Other Parts Discussed in Thread: TDA2 First of all, the first problem we encountered is that we do not have the busybox source code used by the DRA7X SDK. Therefore, we may need the source code that TI provides to our busybox, which contains the defconfig used by the DRA7X SDK. In summary, we hope TI will provide us with the following two things suitable for DRA7X. 1. defconfig 2. The source code of the busybox can be used with the defconfig provided by TI + +Responses: +Hi Allen, The busybox source code is provided as part of the Yocto - please check the oe-core/meta/recipes-core/busybox/busybox_1.29.3.bb for the reference to the original source code and also check the meta-arago layer for further details on the patches on top of busybox. All of these are provided as source. The defconfig is also part of the same set of recipes and you can look further into that. Regards Karthik + +Hi Karthik, Thank you for your reply. So in the TDA2 project, have TI already introduced the Yocto system to manage the subsystem? It is not in the TDA4 project that TI start using Yocto to manage the subsystem? I started to participate in the TDA series of projects in a relatively late stage. + +Hi Allen, Yes, even for the TDA2 we were using the Yocto system to build the filesystem. Please refer to the Vision SDK documentation to find the related sections for enabling you with this. Regards Karthik + diff --git a/data2/text/range/0-5000/895725.txt b/data2/text/range/0-5000/895725.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b5fd3846bc7ea76765e4a9fcd82e1e8f5f0d5ee --- /dev/null +++ b/data2/text/range/0-5000/895725.txt @@ -0,0 +1,10 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: TDA2 to TDA4 transition + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Hello, we are analyzing Processor SDK RTOS Automotive with goal of using it for software development for TDA4 SoC based platform. We have years of experience with TDA2 SoC and Vision SDK, so shifting to newer TDA4 SoC and new SDK is giving us trouble to understand how are Linux and RTOS part of SDK supposed to work together? In terms of which SDK has what work to do throughout the joined build? Having separate SDKs got us confusing because we got used to have all in one place in previous SDK and to do all the work from one single top level make. And in Vision SDK we head links and chains, what is the concept for creating use-cases now? Can you elaborate on these matters to help us draw parallels between these to approaches to SDKs? Regards. Uros + +Responses: +Hi Uros, I believe that we have some links which already capture this, and I will try to provide you a reference on this soon. Regards Karthik + +hi, Here is how you can draw parallel between Vision SDK and PSDKRA. Installation and build Vision SDK Linux would look like a single installer, however there were some additional steps that were needed to make Linux and RTOS in Vision SDK like below 1. Download and install Vision SDK 2. Download a compatible Linux filesystem 3. Clone Linux kernel, uboot, graphics driver and then apply some specific patches. 4. Then build and run The above steps remain same in PSDKRA, only one needs to do below 1. Download and install PSDKRA - this is equivalent of Vision SDK 2. Download and install PSDKLA - this gives the compatible filesystem and Linux kernel, uboot and drivers. - The file system is at ${PSDKLA_PATH}/filesystem/tisdk-rootfs-image-j7-evm.tar.xz - The Linux kernel, uboot is at ${PSDKLA_PATH}/board-support 3. Now build and run vision_apps Application development Next in Vision SDK, one would goto vision_sdk folder and then do make to build everything. In PSDKRA, the equivalent is goto vision_apps folder and then do "make sdk" to build everything and then "make linux_fs_install_sd" to install everything to a Linux filesystem SD card. There are some steps to build a Linux filesystem SD card, one time, this is documented here, vision_apps/docs/user_guide/BUILD_AND_RUN.html There are scripts which help to do this. This about same as Vision SDK. Next is how to do application development using PSDKRA, I will assume you want to build analytics or camera or ADAS applications. For this refer to vision_apps once again, the "links and chain" equivalent in PSDKRA is OpenVX. To get started with OpenVX run the tutorials located here vision_apps/apps/basic_demos/app_vx_tutorial/main_vx_tutorial.c This is just the entry point to the OpenVX tutorial, actual tutorial code and documentation is here, tiovx/tutorial - code tiovx/docs/user_guide/index.html - documentation Once you familiarize your self with OpenVX you can try more specific example as listed in vision_apps/apps - code vision_apps/docs/user_guide/DEMOS.html - documentation Overall vision_apps is the equivalent of vision_sdk tiovx is the equivalent of vision_sdk/links_fw Refer to documentation in these two places, you can reach these two documentation by following the top level page ${PSDKRA_PATH}/index.html > "SDK components" See also "Developer notes" here for some additional information. Let me know if you need more information regards Kedar + diff --git a/data2/text/range/0-5000/895730.txt b/data2/text/range/0-5000/895730.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d00f5fad86d154cd2916c4c88d1926922eed571 --- /dev/null +++ b/data2/text/range/0-5000/895730.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: Better understanding the Processor SDK RTOS Automotive source structure + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Hello, we are analyzing Processor SDK RTOS Automotive with goal of using it for software development for TDA4 SoC based platform. We have years of experience with TDA2 SoC and Vision SDK, so shifting to newer TDA4 SoC and new SDK is giving us trouble to understand how are Linux and RTOS part of SDK supposed to work together? When we make Linux SDK, what are the outputs we need for the system boot, and what are the outputs we need for the RTOS SDK, and vice versa? Also how do we build RTOS now from RTOS SDK, it has very complex build system with a lot of build targets, and we cannot quite grasp how do we distinguish what builds the use-case applications, and what builds the RTOS OS, nor what is the source structure for the system and what is the source structure for the use-case applications inside RTOS SDK? Regards. Uros + +Responses: +Hi Uros, Well different directories have different components, just like vision sdk. tiovx is core openvx frame implementation, whereas vision apps contains different demos, which internally uses all other components, ie tiovx, pdk, ipc etc.. Usually, we just use vision apps and build everything from vision apps. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/895733.txt b/data2/text/range/0-5000/895733.txt new file mode 100644 index 0000000000000000000000000000000000000000..f0c9df1b91fbdf2b918aef508355cbdb2a6e639c --- /dev/null +++ b/data2/text/range/0-5000/895733.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA4VM: Power consumption on TDA4 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: INA226, TDA2 Hello, we are analyzing TDA4 SoC as a base for developing new platform. We are wondering are there recommended methods or guides and tools in Processor SDK Automotive we can use to measure power consumption on TDA4? Regards. Uros + +Responses: +Uros, There are series resistors that can be used to measure power on the EVM, however that software is not provided in the SDK. In general, we don't recommend that you measure power directly since it is easy for incorrect conclusions to be drawn. Namely, the power consumption for the SoC will vary with manufacturing process. Instead, we recommend you work with your local FAE to have TI provide worst case power estimate for the SoC that will cover temperature and process variations. Regards, Kyle + +Hi Kyle, Will this software be available any time soon? We have interest in being able to measure power consumption our selves, because the custom device we are developing have certain power requirements, and we need to optimize power consumption during development. Having worst case power estimate information is ok at this point, but later the need for more precise power measurement will increase. Regards, Uros + +Hi Uros, I will need a week to check on this specific topic and come back to you. Regards Karthik, + +Hi Uros, We do not currently have support for measuring power measurement using software. This is going to be scheduled for a future SDK - don't have a date right now. However, if you are need to do this urgently, then you can refer to the INA226 driver that exists on our J6/TDA2 SDKs and use that as a reference to adapt to your needs. Regards Karthik + +You can simply add the INA226 devices to the device tree. Use the EVM schematic to find i2c addresses. Then a hwmon interface will appear for each supply which allows you to read back voltage, power, current. + +Hi Karthik, Just to be clear, if we decide to use the INA current shunt to measure voltage, are drivers for TDA4 supported and included in Process SDK or do we need to port them from TDA2 Vision SDK? Also, regarding power consumption and load, we noticed that OS gets randomly stuck on TDA4 EVM board after it is active for couple of minutes. Here is the kernel error: [ 61.973359] mmc1: Got data interrupt 0x00000002 even though no data operation was in progress. [ 61.981948] mmc1: sdhci: ============ SDHCI REGISTER DUMP =========== [ 61.988368] mmc1: sdhci: Sys addr: 0x00000008 | Version: 0x00001004 [ 61.994788] mmc1: sdhci: Blk size: 0x00007040 | Blk cnt: 0x00000008 [ 62.001209] mmc1: sdhci: Argument: 0x00000000 | Trn mode: 0x00000010 [ 62.007629] mmc1: sdhci: Present: 0x01f70000 | Host ctl: 0x0000001f [ 62.014050] mmc1: sdhci: Power: 0x0000000f | Blk gap: 0x00000080 [ 62.020471] mmc1: sdhci: Wake-up: 0x00000000 | Clock: 0x00000207 [ 62.026892] mmc1: sdhci: Timeout: 0x00000000 | Int stat: 0x00018000 [ 62.033312] mmc1: sdhci: Int enab: 0x03ff008b | Sig enab: 0x03ff008b [ 62.039734] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000001 [ 62.046153] mmc1: sdhci: Caps: 0x3fe8c801 | Caps_1: 0x18000407 [ 62.052573] mmc1: sdhci: Cmd: 0x00000c1a | Max curr: 0x00000000 [ 62.058993] mmc1: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x0077dd7f [ 62.065413] mmc1: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x00000000 [ 62.071834] mmc1: sdhci: Host ctl2: 0x0000000c [ 62.076261] mmc1: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x00000008c2d70200 [ 62.083375] mmc1: sdhci: ============================================ We have installed active cooler on one of EVM modules and haven't had this problem on that board ever since. Is this power/temperature measurement related issue? Or should i create separate thread on forum for this? Regards, Uros. + +Uros, We do know that early samples had some devices that are "hotter" than expected during production. That said, we haven't seen issues with the EVM in a room temp configuration which is their intended use model. Since the EVM is not really comparable to your end system for thermal purposes, we recommend that you build up a thermal model of your system including our SoC thermal model with a mock-up of your heat sink configuration and SoC + system power consumption. That will help you to determine what type of cooling may be necessary for your system. Regards, Kyle + diff --git a/data2/text/range/0-5000/895916.txt b/data2/text/range/0-5000/895916.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f20bb284451e756da8a6486b70e22da06c42751 --- /dev/null +++ b/data2/text/range/0-5000/895916.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2PXEVM: SPI driver on SDK + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, I try to run SPI driver on IPC1_C0 core. 1. I delete all the code from Chains_main.. 2. I add the SPI driver code for test as below: Void Chains_main(UArg arg0, UArg arg1) { UInt8 Datatest[8] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08}; UInt8 *ptest; ptest = &Datatest[0]; Utils_mcspiInit(0); IPU1_0_edmaHandle = Utils_dmaGetEdma3Hndl(0); IPU1_0_SpiHandle[0] = Utils_mcspiOpen(0,0,0,IPU1_0_edmaHandle); Vps_printf(" ####test aaaaaa #### \n"); while(1) { BspOsal_sleep(100U); Utils_mcspiWrite(IPU1_0_SpiHandle[0],ptest,(UInt16)0x0008); Vps_printf(" SPI send succeed! \r\n"); } } 3. I measured on the TDA2 EVM. CS/Clock drive failed. there is no output. I have two question: 1. Is it possible to RUN SPI on IPU1_0. 2. How to enable IPU1_0_main function since the default is IPU_PRIMARY_CORE_IPU1 enabled. + +Responses: +Hi, Yes, it is possible to run SPI driver on IPU. If you are using Linux then change IPU_PRIMARY_CORE_IPU to ipu1_0. By default, it is set to ipu2. Rgds, Brijesh + +Hi, background: SDK 3.0.7. TDA2P EVM The default configuration in cfg.mk: IPU_PRIMARY_CORE=ipu1_0 IPU_SECONDARY_CORE=ipu2 What is the concept for IPU_PRIMARY_CORE and IPU_SECONDARY_CORE? If I want to drive SPI. Which one should be set to IPU_PRIMARY_CORE? Thanks for your info. + +Hi, That depends on which core you want to access SPI driver. You could access from any core, as long as SPI driver is supported on that core. Please refer to PDK driver documentation to understand about drivers support. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/895952.txt b/data2/text/range/0-5000/895952.txt new file mode 100644 index 0000000000000000000000000000000000000000..1f932e5f86f8368436e7bd01ff239bdcfa353aac --- /dev/null +++ b/data2/text/range/0-5000/895952.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2P-ACD: U-Boot isolate_io function is failed + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hello. We made the custom board with TDA2P-ACD chip. And I tried to boot using SD CARD with MLO and u-boot.img in it. But it didn't boot. TDA2P EVM board with the same firmware boot well. When I checked the log by quickly initializing the UART in SPL, I got an error "IODELAY: Isolation of Device IOs failed" in the function __recalibrate_iodelay_end in the file dra7xx_iodelay.c. And I found out that the error occurred because the code below returned an error. ----------------------------- In dra7xx_iodelay.c ---------------------------- static int isolate_io(u32 isolate) { if (isolate) { clrsetbits_le32((*ctrl)->control_pbias, SDCARD_PWRDNZ, SDCARD_PWRDNZ); clrsetbits_le32((*ctrl)->control_pbias, SDCARD_BIAS_PWRDNZ, SDCARD_BIAS_PWRDNZ); } /* Override control on ISOCLKIN signal to IO pad ring. */ clrsetbits_le32((*prcm)->prm_io_pmctrl, PMCTRL_ISOCLK_OVERRIDE_MASK, PMCTRL_ISOCLK_OVERRIDE_CTRL); if (!wait_on_value(PMCTRL_ISOCLK_STATUS_MASK, PMCTRL_ISOCLK_STATUS_MASK, (u32 *)(*prcm)->prm_io_pmctrl, LDELAY)) { return ERR_DEISOLATE_IO << isolate; <----------------- } ------------------------------------------------------------------------------ I'd like to know why this happens. ------------------------------------ Full log ------------------------------------ U-Boot SPL 2016.05-00010-g9551b3d-dirty (Apr 10 2020 - 17:10:32) DRA762-GP ES1.0 IODELAY: Isolation of Device IOs failed Leveling timeout on EMIF1 SDRAM: identified size not same as expected size identified: 4 expected: 40000000 ---------------------------------------------------------------------------------- Best Regards, Yousik Kim. + +Responses: +Hi Yousik, 2016.05 was about 4 years old now. There can be multiple factors for this to fail like board design, aging of the device, total power on hours of the device. Is it failing always? We had customers reporting occasional failure on some TDA2 devices in the past. Can you Kindly migrate to the latest SDK for DRA7: http://downloads.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/index_FDS.html Best Regards, Keerthy + +Hi Keerthy, It always fails. This is the board we've made recently and it's first test. We are using PROCESSOR_SDK_VISION_03_07_00_00, and U-Boot received from this SDK was 2016.05. It worked fine on the EVM board, so I think this is a H/W problem. But I am not sure which part to look at about this problem. Isolation Sequence part of "20.4.6.1.7 Isolation Requirements" of TDA2Px TRM document is failing. I want expert advice. Best Regards, Yousik Kim. + +Hi Yousik Kim, You are right this most certainly looks like Hardware board design issue(IO related). I am definitely not the expert in the board design front. May be you will have to share more hardware details in a different new query that could be assigned to right hardware expert. From bootloader side if you nothing else to ask for i would request you to resolve this issue and raise a new one with more hardware details so it can assigned to right expert. Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/896112.txt b/data2/text/range/0-5000/896112.txt new file mode 100644 index 0000000000000000000000000000000000000000..402ee572e2a36ed598504f2a1fbd2223496dc1ae --- /dev/null +++ b/data2/text/range/0-5000/896112.txt @@ -0,0 +1,12 @@ +Ticket Name: DRA726: Virtual DRM + +Query Text: +Part Number: DRA726 Other Parts Discussed in Thread: TDA2, I am working on getting our cameras supported in IPU1 and have a question on Virtual DRM I have been reading "Virtual DRM : An User Guide for Developing Usecases". It seems straightforward but doesn't address my use case. We have two possible LCD displays, one 7 inch display 800x1280 and one 12 inch display 1920x720 The board is the same except for some jumpers that choose the proper LVDS serial format. No way to know from u-boot or Linux which jumpers are populated. How would I handle that in the M4 and on Linux if I want only one u-boot and one linux kernel? I would also be nice if the 7 inch display was seen as 1280x800 so the Linux software wouldn't have to flip the LCD 90 degrees Michel Catudal ACTIA Corp + +Responses: +Hi Michael, I am not sure of any way to enable without having different dtb files but again how to choose dynamically change the dtb file based on jumper setting. Many other customers are also using vertical display like 720x1920. TI has suggested a edma based frame-copy algorithm running on IPU to rotate the image. Thanks RamPrasad + +Hi Michael, forgot to add one more information. There is TILER2D memory available in the DRA7/TDA2 Soc which can be used for rotation, mirror etc but TILER2D is not used in visionSDK software. Thanks RamPrasad + +Hi Michel, Regarding "The board is the same except for some jumpers that choose the proper LVDS serial format. No way to know from u-boot or Linux which jumpers are populated.". Have you considered connecting a GPIO pin on the DRA726 device to the same jumpers, such that u-boot or Linux kernel can determine the proper boot flow? Regarding "I would also be nice if the 7 inch display was seen as 1280x800 so the Linux software wouldn't have to flip the LCD 90 degrees", What content is going to be displayed on the 800x1280 display? Thanks, kb + diff --git a/data2/text/range/0-5000/896456.txt b/data2/text/range/0-5000/896456.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d58ccb8de498716810e625c0473c0c9987b16a2 --- /dev/null +++ b/data2/text/range/0-5000/896456.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: UART communication in RTOS on TDA2-EVM board + +Query Text: +Part Number: TDA2EVM5777 HI experts: I have a project that uses the TIDL function on the TDA2-EVM board for image recognition and receiving ultrasonic signals (via GPIO), I would like to transmit the information calculated by TIDL to another device for data integration through UART interface. At present, because the function of TIDL can only run in the RTOS system, it is currently developed using RTOS. I found several UART related discussions on the e2e forum, which mentioned that it can only be transmitted through UART3. But there are no related examples in the usecase of the SDK, so few questions as below: (1) How to add UART transmission examples in usecase or have operation manual in detail? (2) If there are multiple communication interface requirements, does the board support more than 2 transmissions? (3) Or are there other suggestions for that project? thank you Best / Regard wxchen + +Responses: +Hi I will check with the team & get back Thanks Gaviraju + +Hi, Thanks for your reply, how much time does your team need for checking? best / regard wxchen + +Hi, Theoretically, it's possible to communicate with other devices using UART & for this, you have to short TX & RX. using existing PDK software you can read & write data & this is not verified from our side. 1) Refer to this "vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_DevelopmentGuide.pdf" if you want to add new use-case 2) It might support & look into the TRM for more info 3) You can use Network_TX link to transfer data to other devices. Thanks Gaviraju + diff --git a/data2/text/range/0-5000/897843.txt b/data2/text/range/0-5000/897843.txt new file mode 100644 index 0000000000000000000000000000000000000000..77eec0fb9c3b8350babd7a30cee94f54c6d68553 --- /dev/null +++ b/data2/text/range/0-5000/897843.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SG: Can TDA2S Support to Output Same resolution two different video sources on the same vout port? + +Query Text: +Part Number: TDA2SG Hello Sir/Madam, We have one project (surround view application) using TDA2x as video processor. GPU stitched surround view images (25FPS, 1440*900) output via DS90UB933 (TI Serializer) in YUV422 8bit format. Now we have new requirement, we want to output (25+1) frames, that means for every 25-Frame stitched images, there is 1 additional frame image (four raw surround view images in MOSAIC), this may be from different sources, GPU, A15, or DSP, but in same resolution 1440*900. We would like to know if this is achievable in TDA2SG and it would be appreciated that you can provide more implementation details. thanks. Jeffrey Yu + +Responses: +Hi Jeffrey, If i understand correctly, resolution and format remains same, so no change needed in the DSS. I believe main changes are in the application. You need to merge two channels, one from GPU and other may be from DSP.. You could probably use merge link, but this would require some changes to exactly control fps. Rgds, Brijesh + +thank you, Brijesh. We will try. Jeffrey Yu. + diff --git a/data2/text/range/0-5000/898044.txt b/data2/text/range/0-5000/898044.txt new file mode 100644 index 0000000000000000000000000000000000000000..e812753e71ac7c6493e11cc697d705841cc94bfa --- /dev/null +++ b/data2/text/range/0-5000/898044.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/AM5749: Running pytorch-ai-devkit Demos on AM5749 IDK + +Query Text: +Part Number: AM5749 Other Parts Discussed in Thread: TDA4VM Tool/software: TI C/C++ Compiler Hi Experts, I have two specific questions: 1) I have already tested caffe-jacinto-models and they seem to work fine on my device. Now I am trying to test pytorch-jacinto-ai-devkit! I believe the models supposed to work on my device as well. Is it correct? If so, what adjustments should I be making in order to run any demo in pytorch-jacinto-ai-devkit. 2) Can I run the models available in pytorch-jacinto-ai-devkit using CPU-ONLY? I currently don't have access to GPU, so would it be possible to run these demos? Thanks in Advance, + +Responses: +Hi Adnan, from GIT I see this works on latest J7 (TDA4VM) devices. Not on AM57x. If you are starting evaluation/testing this might be OK, but just wanted to clarify. From https://github.com/TexasInstruments/jacinto-ai-devkit we have: "Deep Learning Examples for Jacinto7 family of devices - e.g. TDA4VM" With respect to your questions, I will come back soon after checking with one of our experts. thank you, Paula + +Thanks Paula - your answer is correct. We have tested the models in pytorch-jacinto-ai-devkit only on TDA4VM. We do not know whether they work on the older devices. Best regards, + diff --git a/data2/text/range/0-5000/899087.txt b/data2/text/range/0-5000/899087.txt new file mode 100644 index 0000000000000000000000000000000000000000..ac1b49ce0b587a9ba993f5590a3e75e50ec21211 --- /dev/null +++ b/data2/text/range/0-5000/899087.txt @@ -0,0 +1,40 @@ +Ticket Name: TDA2E: Issues running caffe trained SSD model on TDA2 development board + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, I've used scripts 'train_image_object_detection.sh' to train SSD for detection. However, some trained models failed to run on TDA2 development board after conversion from tidl_model_import.out, the issues are: 1. It's does run for few frames, but then the output screen/detection process froze. 2. I only changed hyper-parameters listed in the 'train_image_object_detection.sh', but no matter how I changed ssd_size, resize_width/height, and ds_fac, the converted models still showed same error behavior. I've attached a converted caffe SSD (0420_3.7z) & a .caffemodel & deploy.prototxt & lable_map.prototxt (caffeModel.7z), would you please test it and perhaps offer any suggestion that might solve the issue? Thank you, Wei Chih 0420_3.7z 6724.caffeModel.7z + +Responses: +Hi Wei Chih, Did you get the default use case working at your end ? Also, which Vision SDK version you are using ? Thanks, Praveen + +Hi Praveen: This is wxchen who is colleague with Wei-Chin, i was trying to inspect image by this transferred model by default usecase in TIDL OD(RTOS, TDA2EVM, 4-eves, Processor VisionSDK: 3.07), here is the manifest on SDK.Processor_SDK_Vision_manifest.html but the output was same as Wei-Chin's saying. by the way, i was trying to use pre-built binary(3.08), and load the network file to board, then i got the following error: [IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 2: Semantic Segmentation Usecase +[IPU1-0] 3: TIDL OD Usecase +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 17.395199 s: +[IPU1-0] 17.421734 s: TIDL Configuration parameters +[IPU1-0] 17.421826 s: ----------------------------- +[IPU1-0] 17.421887 s: inputWidth = 768 +[IPU1-0] 17.421978 s: inputHeight = 320 +[IPU1-0] 17.422039 s: inputFile = inData_OD +[IPU1-0] 17.422100 s: inputFile = inHeader_OD +[IPU1-0] 17.422161 s: netFileName = tidl_net_jdetNet_ssd.bin +[IPU1-0] 17.422222 s: paramFileName = tidl_param_jdetNet_ssd.bin +[IPU1-0] 17.422283 s: inputfps = 8 +[IPU1-0] 17.422344 s: threshold = 0.200000 +[IPU1-0] 17.422436 s: ----------------------------- +[IPU1-0] 17.517049 s: Assertion @ Line: 103 in /adasuser/surya/vsdk_3_8_6/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! +[IPU1-0] 17.517873 s: Assertion @ Line: 103 in /adasuser/surya/vsdk_3_8_6/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! + wxchen + +Hi Praveen, It turned out, it was the conversion mistake made by one of my coworker. It does run on the board as expected now. #update: It turns out only the newly cloned caffe-jacinto-model/scripts/train_image_object_detection.sh trained SSD models worked; every parameter left unchanged, and trained with my custom dataset Once changing parameters like ds_fac and ssd_size, the trained model will only run the first few frames on the board then froze. I will verify the change of ds_fac and ssd_size does make the trained models un-runable on the board tomorrow at work with the newly cloned caffe-jacinto-models again, then report back. Thanks a lot, Wei Chih + +Hi Praveen, After cloning new caffe-jacinto-models, and use 'train_image_object_detection.sh' for training, I discovered that the models that used batch normalization for training cannot be ran on TDA2 dev-borad. Thank you, Wei Chih + +Hi Wei Chih, Thanks for the update. Regards, Praveen + diff --git a/data2/text/range/0-5000/899445.txt b/data2/text/range/0-5000/899445.txt new file mode 100644 index 0000000000000000000000000000000000000000..47b39f87b4eebc96353b6cdbcd701b110a4dcc18 --- /dev/null +++ b/data2/text/range/0-5000/899445.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2PXEVM: Error while installing and building Vision SDK + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, While installing the vision sdk in the Ubuntu 16.04 PC, I got following error. Please suggest what is the step that I have missed. error: symbol "HSMMCSDEdmaTransfer" redefined: first defined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/lib/tda2px-evm/ipu2/release/utils_common.aem4"; redefined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/ti_components/drivers/pdk_01_ 10_03_07/packages/ti/drv/vps/lib/tda2px-evm/m4/release/vps_examples_utility. aem4" error: symbol "HSMMCSDEdmaClose" redefined: first defined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/lib/tda2px-evm/ipu2/release/utils_common.aem4"; redefined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/ti_components/drivers/pdk_01_ 10_03_07/packages/ti/drv/vps/lib/tda2px-evm/m4/release/vps_examples_utility. aem4" error: symbol "HSMMCSDUARTPutNum" redefined: first defined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/lib/tda2px-evm/ipu2/release/utils_common.aem4"; redefined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/ti_components/drivers/pdk_01_ 10_03_07/packages/ti/drv/vps/lib/tda2px-evm/m4/release/vps_examples_utility. aem4" error: symbol "HSMMCSDUartPuts" redefined: first defined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/lib/tda2px-evm/ipu2/release/utils_common.aem4"; redefined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/ti_components/drivers/pdk_01_ 10_03_07/packages/ti/drv/vps/lib/tda2px-evm/m4/release/vps_examples_utility. aem4" error: symbol "HSMMCSDEdmaWaitTransfer" redefined: first defined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/lib/tda2px-evm/ipu2/release/utils_common.aem4"; redefined in "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/ti_components/drivers/pdk_01_ 10_03_07/packages/ti/drv/vps/lib/tda2px-evm/m4/release/vps_examples_utility. aem4" # # /home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu1_0_release.xem4 created. # error: errors encountered during linking; "/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4" not built /home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/build/rtos/makerules/rules_m4.mk:312: recipe for target '/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4' failed make[7]: *** [/home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4] Error 1 /home/teuser/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu2' failed make[6]: *** [ipu2] Error 2 MAKEFILE.MK:162: recipe for target 'apps_ipu2' failed make[5]: *** [apps_ipu2] Error 2 MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:314: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:175: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:38: recipe for target 'apps' failed make[1]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 + +Responses: +Hi Revathi, do you have any modifications in the SDK? Can you try clean build: make clean make linux_clean make linux make linux_install make -s -j depend make -s -j Regards, Yordan + diff --git a/data2/text/range/0-5000/899472.txt b/data2/text/range/0-5000/899472.txt new file mode 100644 index 0000000000000000000000000000000000000000..f60977cd2e94696851c517b52278dad986301680 --- /dev/null +++ b/data2/text/range/0-5000/899472.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: Parameters to tweak for higher model sparsity during SSD stage-3 sparsity training + +Query Text: +Part Number: TDA2E Hello, Sometimes during SSD's sparsity training, the weights' sparsity stuck at some point (0.32, etc) where keep training won't increase the sparsity level. Is there any suggestions on hyper-parameters tweaking to achieve higher model sparsity? Thank you, Wei Chih + +Responses: +Hi Wei Chih, Please check if this can help.. - Starting from this line, you can see several factors that affect sparsification: https://github.com/tidsp/caffe-jacinto/blob/caffe-0.17/src/caffe/proto/caffe.proto#L524 Starting with a value of sparsity_start_factor Starting from iteration: sparsity_start_iter And increasing by: sparsity_step_factor Once in every: sparsity_step_iter iterations Until it reaches: sparsity_target You can adjust these parameters to control how sparsity is induced. In order to reach sparsity target abruptly - set sparsity_start_factor to 0.7 and sparsity_target to 0.7 will try to induce 70% sparsity in sparsity_start_iter In order to reach sparsity target gradually - do more iterations if your sparsity_start_factor or sparsity_step_factor is small. Thanks, Praveen + diff --git a/data2/text/range/0-5000/899504.txt b/data2/text/range/0-5000/899504.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec2550e10f5ee4f4d1570d62c2c21838e287b2b3 --- /dev/null +++ b/data2/text/range/0-5000/899504.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2P-ACD: SoC Sleep mode realization + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hello, We are using TDA2Px in our project, we are facing some issues related to boot time optimization and sleep mode implementation with TDA2Px. We need to implement a sleep mode with TDA2Px and need to wake up the SoC using CAN signals. Is this possible for power better power management. Is there any readily available solution for this kind of implementation? The second thing is like we need to optimize the boot time to 4 seconds using Linux, Could you please suggest a way to optimize the boot time. And also please help with a readily available solution? Warm regards, Alwin Mathew + +Responses: +Hi Alwin, 1) No such implementation is available. It depends on what and how you want to implement. We only support dynamic power management: http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/Power_Management.html i believe you are looking at idle low power modes which are not supported. 2) http://www.ti.com/lit/an/sprac82/sprac82.pdf Describes multiple steps to optimize boot time optimization on DRA7/TDA2 devices. Regards, Keerthy + diff --git a/data2/text/range/0-5000/900020.txt b/data2/text/range/0-5000/900020.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f9740e78282eff612a534f3687060b75ba681f3 --- /dev/null +++ b/data2/text/range/0-5000/900020.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: How to measure total processing time for one frame in TIDL_OD usecase + +Query Text: +Part Number: TDA2EXEVM Hi Team, This is regarding the total processing time for one frame in TIDL_OD usecase running on TDA2x. To measure it, my customer tried following two ways: (1) To accumulate Local Link Latency (average) of each Link from Source Link to Display Link, took only one pipeline for EVE. -> 313 ms (2) Simply check Source to Link Latency (average) in Display Link -> 220 ms Please find attached log and excel sheet for calculation. As you can see, there is a gap between the number (1) and (2). log_Sparse_A-manual.txt Sparse_A-manual_latency_en.xlsx - Which one is the correct way of measuring the total processing time for one frame? - What is the reason of the gap? Thanks -Shibata + +Responses: +Hi, You can be calculated in both methods but 1) In the first method, you should not include "SYNCH" link latency. Thanks Gaviraju + +Hi Gaviraju, Thanks for your comment. By removing SYNC Link latency from (1), I got a similar number with (2). Actually I saw a large difference between MIN number and MAX number in SYNC Link latency. That might affect the total processing time. But could you please explain why we can exclude the SYNC Link as it is also running in the chain? Thanks & Regards, -Shibata + +Hi, Please refer & try to understand what sync link is doing. Source file: vision_sdk/links_fw/src/rtos/links_common/sync. But I have another best option to measure total processing time for 1 frame. Add the below lines of code in the first link( beginning of the link process function) UInt64 startTime; startTime = Utils_getCurGlobalTimeInMsec(); Vps_printf("%llu", startTime); Add the below lines of code in the last link( end of the link process function) UInt64 endTime; endTime= Utils_getCurGlobalTimeInMsec(); Vps_printf("%llu", endTime); Now you can see the output of startTime & endTime in the print console, take the difference & this is the total processing time for 1 frame. totalTime = endTime - startTime Thanks Gaviraju + diff --git a/data2/text/range/0-5000/900339.txt b/data2/text/range/0-5000/900339.txt new file mode 100644 index 0000000000000000000000000000000000000000..e1f75c6626ac1bde57c8f436c41dc135da4f3051 --- /dev/null +++ b/data2/text/range/0-5000/900339.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: TDA2: Power and reset buttons + +Query Text: +Part Number: TDA2PXEVM Please explain the functionalities of the following buttons in TDA2P board, Attached image of what I am refring to. , 1. Power Cycle 2. CPU Reset switch 3. Power Reset switch Thanks, Sandeep + +Responses: +Hi Sandeep, Please refer to section 3.3 Reset Structure in https://www.ti.com/lit/ug/spruii4a/spruii4a.pdf . 1. Power Cycle - Power ON or Power OFF command to PMIC 2. CPU Reset switch - Warm reset to SoC 3. Power Reset switch - SoC cold (Power-On) (aka POR) Reset Regards, Stan + diff --git a/data2/text/range/0-5000/900418.txt b/data2/text/range/0-5000/900418.txt new file mode 100644 index 0000000000000000000000000000000000000000..d666c928377bdf4533a48e99c0c669fbbd8164e3 --- /dev/null +++ b/data2/text/range/0-5000/900418.txt @@ -0,0 +1,47 @@ +Ticket Name: DRA77P: Early capture late weston usecase build error + +Query Text: +Part Number: DRA77P Hi, I am working on DRA77P, with vision SDK v3.07, and for early initialisation of HDMI, I have been trying to build the particular usecase early capture late weston . I have done the following steps based on VisionSDK_Linux_UserGuide.pdf: EARLY_USECASE_ENABLE=yes in the apps/configs/_linux_all/cfg.mk make linux make linux_install make -s -j depend make -s -j On make -s -j command, I encounter the following error, gmake[1]: Leaving directory `/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/sysbios' +Build of libraries done. +# Configuro done! +# Making tda2px-evm:ipu2:release:vision_sdk_lib... +# Compiling tda2px-evm:ipu2:release:vision_sdk: src/main_common_ipu2.c +# Compiling tda2px-evm:ipu2:release:vision_sdk: src/eve_firmware.c +# Compiling tda2px-evm:ipu2:release:vision_sdk: src/ipu_primary.c +# Compiling tda2px-evm:ipu2:release:vision_sdk: /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps/src/common/app_init/app_init_ipu_primary.c +# Compiling tda2px-evm:ipu2:release:vision_sdk: /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps/src/common/main_app/tda2px/ipu2/src/main_ipu2.c +# Compiling generated MAIN_APP_ipu2_pem4.oem4 +# Linking into /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4... +# + + undefined first referenced + symbol in file + --------- ---------------- + chains_earlyCaptureLateWeston /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu2/release/app_libs.aem4 + +error: unresolved symbols remain +error: errors encountered during linking; + "/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 + px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4" not + built +make[7]: *** [/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4] Error 1 +make[6]: *** [ipu2] Error 2 +make[5]: *** [apps_ipu2] Error 2 +make[4]: *** [apps] Error 2 +make[3]: *** [apps] Error 2 +make[2]: *** [apps_exe] Error 2 +make[1]: *** [apps] Error 2 +make: *** [vision_sdk] Error 2 + What am I missing here ? Regards, Padmesh + +Responses: +Hi Padmesh, When you have changed any flags in config file , recommendation is to clean everything and then build Please try with this make clean make -s -j depend make -s -j Thanks RamPrasad + +Hi Ram, I tried the above steps. Still I get the same errors. Regards, Padmesh + +Hi Padmesh, I see this usecase by default is not enabled for tda2px platform. You need to add ifeq ($(EARLY_USECASE_ENABLE),yes) UC_early_capture_late_weston=yes endif in apps/configs/tda2px_evm_linux_all/uc_cfg.mk Please refer apps/configs/tda2xx_evm_linux_all/uc_cfg.mk where all usecases are supported. Thanks Ram + +Thanks Ram, I was able to resolve the issue. Doing this which firmware do i need to place in the QSPI and in what named should it be placed ? Regards, Padmesh + +Refer section 3.4.1 of the visionDK_Linux_userguide.pdf You need all the three firmwares . Please refer build/hlos/scripts/linux/flash-qspi.sh Thanks Ram + diff --git a/data2/text/range/0-5000/900665.txt b/data2/text/range/0-5000/900665.txt new file mode 100644 index 0000000000000000000000000000000000000000..3efe676c02ec14c34c53fabde613473a50fb7200 --- /dev/null +++ b/data2/text/range/0-5000/900665.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2EXEVM: Switching AWR Profile Config in Cascade MIMO Usecase + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, The MIMO usecase defines an AWR configuration that uses all 4 radar sensors with single profile. Say if I would like to extend the number of profiles from 1 to 4, I would simply add 3 more statically filled profile data structures in rlProfileCfg_t gChains_cascadeRadarProfileArgs. This enhanced profile config will then be registered with Bsp_ar12xxRegisterConfig() after ChainsCommon_ar12xxInit() was called. That's fine and all. Now I would like to instruct to switch from profile 0 to profile 1, how can that we done? Thanks, --Khai + +Responses: +Please use the below function under ~/vision_sdk/apps/src/rtos/radar/src/common/chains_common_ar12xx.c. You can refer to the use case, radar_objectdetect_display, to see how it is used. /** ******************************************************************************* * * \brief Function to change the profile parameters at run time * * \param algId Algorithm Link ID for the FFT Heat Map * \param pAr12xxCfg Pointer to the configuration structure. * * \return retval SYSTEM_LINK_STATUS_SOK if the parameter change has happened. * ******************************************************************************* */ Int32 ChainsCommon_ar12xxChangeParameters(UInt32 algId, ChainsCommon_Ar12xxConfigOut *pCfgOut) + +Resolved + +Hi Stanley, Using your suggestion with some code mods allows me to switch from one chirp profile to another. However, the new profile radar cube didn't seem to automatically recognize in the processing data flow (ie: FFT Alg didn't get a new profileID). Debugging into the FFT code that sets the ProfileID in this code block below get skipped over the logic. pObj->inBufAddrOffset[chId] is never > 0. So, currProfile is always 0 due to initialization. My new chirp profile change also has numADCSamples and numLoops that are different than the the first profile. if (pObj->inBufAddrOffset[chId] > 0U) { currProfile = ((*(UInt32*)inBufAddr) >> 2U) & 0xFU; } Any thought? Can I get a zoom session with you to debug this? Thanks, --Khai + +Hi Stanley, If currProfile = ((*(UInt32*)inBufAddr) >> 2U) & 0xFU; is not changing upon ProfileCfg_t change, how do I know if the AWR radar cube size actually did change? Thanks, --Khai + +Did you use the data out format 6 in dataPathCfgArgs? You need that so chirp profile will be added to the beginning of input data.. .dataPathCfgArgs = { + .intfSel = (rlUInt8_t) 0, + .transferFmtPkt0 = (rlUInt8_t) 6, /**< Data out Format, \n + b5:0 Packet 0 content selection\n + 000001 - ADC_DATA_ONLY \n + 000110 - CP_ADC_DATA \n + 001001 - ADC_CP_DATA \n + 110110 - CP_ADC_CQ_DATA + b7:6 Packet 0 virtual channel number (valid only for CSI2)\n + 00 Virtual channel number 0 (Default)\n + 01 Virtual channel number 1\n + 02 Virtual channel number 2\n + 03 Virtual channel number 3 \n*/ + +Yes, when i set .transferFmtPkt0 = (rlUInt8_t) 6, profileId varies from 0 -> 15 from frame to frame. Not reliable. I would expect it to remain 0 until a new profile is changed. Thanks, --Khai + +Is there another way to know when profile changes (which in turns radar cube size changes), the correct radar cube size is coming into the TDA2 processing chain? In the past, reply on setting this flag to 6 so when profile changes, a new profileId is updated in FFT Alg and thus pull the right parameters to process the incoming ADC data. Now that that is not reliable, how do I know the profile has actually been changed on the AWR? Where can i print the actual ADC radar cube size and not from the pre-populated profile info in the pRadarParam object? Thanks, --Khai + +This would be a question for our radar team. Maybe you can test this with mmWave Studio first to see if it is even possible to do what you want to achieve with the radar configurations. + diff --git a/data2/text/range/0-5000/900741.txt b/data2/text/range/0-5000/900741.txt new file mode 100644 index 0000000000000000000000000000000000000000..39c73503e6e893d7d5a55e0e3e2517d534b83445 --- /dev/null +++ b/data2/text/range/0-5000/900741.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2S DDR3 interface Performance + +Query Text: +Part Number: TDA2SX Hi, As we known, TDA2S includes 2 DDR0 and DDR1 controllers, each DDR3 interface can connect with 2pcs 16bit DDR3 RAM, so TDA2S can connect 4pcs 16bit DDR3 RAM; Based on above understanding, although TDA2S supports 2 DDR3 controller, DDR3 controller work under 32bit data bus, if we connect 4pcs 16bit 512M bytes DDR3 with 2 DDR3 controller, is it equivalent to 2pcs 16bit 1G Bytes DDR3 with 1 DDR3 controller ? Thanks + +Responses: +Hi, If you connect 2x 16-bit 1GB (or 8Gb) DDR memories to 1x DDR controller, you would have the same amount of memory available as connecting 4x 16-bit 512MB (or 4Gb) DDR memories to 2x DDR controllers. The system performance would vary when using 1x controller vs. 2x controllers, as using two controllers effectively provides a 64-bit data bus to the system. As an example, the two controllers can be interleaved such that system memory alternates between the two controllers every 128 bytes, utilizing both controllers in parallel. Best regards, Kevin + diff --git a/data2/text/range/0-5000/900776.txt b/data2/text/range/0-5000/900776.txt new file mode 100644 index 0000000000000000000000000000000000000000..c86f2850ae490a5f656d74d39c4b4b324be47657 --- /dev/null +++ b/data2/text/range/0-5000/900776.txt @@ -0,0 +1,14 @@ +Ticket Name: J6EVM5777: RTOS / Getting Started + +Query Text: +Part Number: Hi all. A few questions from someone new to this area. 1) The RTOS SDK supplied is of version 04.03.00.05, and SDK documentation is somewhat confusing. Nowhere could we find any references to DRA75x / TDA2x / EVM5777 devices. For example, referring here specifically to "Processor SDK RTOS 04_03_00_05" as available on the web at h t t p : // software-dl.ti.com/processor-sdk-rtos/esd/docs/04_03_00_05/rtos/index.html 2.1.6.1. Devices -- table does not list any of the above 2.2. Supported platforms and EVMs -- neither 1.1.6.2. Emulator support -- same thing 1.1.6.3. Is TDA2x is of any of the listed types? (AM335x, AM473x, AM57xx, AMIC110, C665x, C667x, C6747/OMAP-L17, C6748/OMAP-L138, and variants of K2 are listed as supported options). Similarly, at h t t p s : // training.ti.com/processor-sdk-training-series it is stated that: For more information on AM57x Sitara processors, refer to the AM57x Sitara™ Processors Training Series. For more information on TI ARM & DSP processors, refer to the KeyStone ARM & DSP Multicore Device Training Series For a high-level look at the AM57x Sitara evaluation module, view the Evaluate the New AM57x Sitara Processors with an EVM Based on the New BeagleBoard-X15 video. and we are pretty much at loss as what is the type of the TDA2x device and what sort of training should be taken for it. 2) SDK Getting Started manual refers to pre-built SD cards shipped with SDK located at [SDK Install Path]\processor_sdk_rtos__\prebuilt-sdcards\\sd_card_img\ but for our fresh install (CCS followed by SDK) this folder is empty. We have tried to "gmake all", which completed successfully, but it is still empty. Are there prebuild RTOS images? 3) Due to circumstances beyond our immediate control, we do not have access to JTAG emulator for the time being. Is there a way to configure CCS/SDK so that a compiled program is exported as an "app" that can be written to SD card along with MLO and ran (booted) from SD card? If yes, is there any tutorial available? Ideally, stdin/stdout in such deployment should be bound to UART. We totally understand all inconveniences and impossibilities associated with not having JTAG access to board. Thanks. + +Responses: +Hi Ramani, Your post seems to indicate that you are using a J6 EVM but I want to be sure. Could you please provide me with the following information so that we can check further on how to help you? Are you using a TI EVM for your development? If yes, which EVM is this? If no, please clarify the SoC on your custom board. Please provide the exact version of the SDK that you are using - if you downloaded it from ti.com, please provide link to be sure. If you are not using the latest version of the installer, please indicate why you chose that version. Logs and/or screenshots will be useful to describe some of the problems above, please considering expanding your post. Regards Karthik + +Hello Karthik, 1. Above the original post there is a line "Part Number: J6EVM5777", in case you missed it. 2. The original message says "The RTOS SDK supplied is of version 04.03.00.05", in case you missed it. 3. N/A. The SDK was obtained by: -- googling for EVM5777 and landing at h t t p : // www.ti.com/tool/J6EVM5777 (I can not paste the URL intact as it gets expanded into a large icon immediately for some reason) -- following "Processor Software Development Kit for DRA7x Jacinto Processors -- Linux, Android, and RTOS" link at the very bottom of the page to arrive at h t t p : // www.ti.com/tool/PROCESSOR-SDK-DRA7X -- clicking on "Get Software" in "PROCESSOR-SDR-RTOS-AUTOMOTIVE-DRA7X" row to get to h t t p : // software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-rtos-automotive/latest/index_FDS.html -- and downloading ti-processor-sdk-rtos-automotive-dra7xx-evm-04.03.00.05-Windows-x86-Install.exe from that web page. No logs or screenshots are available, as no actual development have had been happened yet. Thank you. + +Bump + +Hi Ramani, Thanks, I checked further and it seems like our download page needs to be corrected. If your requirement is a RTOS SDK for TDA2 then you need to be looking at the following - http://www.ti.com/tool/PROCESSOR-SDK-TDAX, please download the PROCESSOR-SDK-VISION 3.08 and also the please look at the documents that this offers. If you have any further questions, please create a new thread if you have questions on this version of the SDK. Regards Karthik + diff --git a/data2/text/range/0-5000/902300.txt b/data2/text/range/0-5000/902300.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6029b12dd6561836fc02edb547bf651025451c3 --- /dev/null +++ b/data2/text/range/0-5000/902300.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: Caffe jacinto Sparse Training Sparsity Question + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, As title, I finished and saved a caffemodel after the sparse training with the total sparsity of 63% and everything seems normal and the model ran pretty fast on the TDA2 dev borad. However, when I used the model as pretrained model for sparse training tuning (sparse training will calculate the sparsity of the model before training), the output log is showing the model has the sparsity of 36% only. The displayed two different sparsity(s) to the same model confuses me, do you know what the issue is? Thanks, Wei Chih + +Responses: +HI Wei Chih, Could you please provide the log to understand the problem Thanks, Praveen + +Hi Praveen, I will upload the log file to you tomorrow when I'm back to the office. However, let me try to explain it again: After finishing the sparse training, I got a 15000iter.caffemodel with 63% sparsity. But when I use the 15000iter.caffemodel as the pre-trained model for another sparse training, before the sparse training starts, caffe will calculate the sparsity of the input weights (15000iter.caffemodel), the calculated sparsity is showing 37% only. My suspicion is that the pretrained model's weights did not fully transferred to the new training model. Correct me if I am wrong, caffe will compare layers' name, if the layers name matched between the two models, then the weights will be copied/used. If not, initializing weights as defined in prototxt. Strangely I'm using the exact same model, the layers should be exactly the same, but it seems like not all the weights were used from the pre-trained model. Is this an expected behavior? If so, could you kindly explain what is happening behind the scene? Thanks a lot. Much appreciated, Wei Chih + +Hi Wei Chih, I think we have not tried to use a sparse model as pre-trained for another sparse training. This flow may not be properly supported in caffe-jacinto. Thanks, Praveen + diff --git a/data2/text/range/0-5000/902518.txt b/data2/text/range/0-5000/902518.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c7b2f10c07d8d3182c8502105a74775c4146343 --- /dev/null +++ b/data2/text/range/0-5000/902518.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: Which core is use for CPSW2? & CPSW2 work in core mcu2_1 + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Hello Sir, I trying to initialize all the CPSW2 deriver on MCU2_1. In the vision App application UDMA driver is already initlizsed in the mcu2_1 core. So whenever I try to run the function CpswAppUtils_udmaOpen, it crashed. 1. Can I use the handle of initialized UDMA? If yes what are the changes required. 2. Is CPSW2 work in core mcu2_1? (Cpsw2 design for the mcu core only.). 3. Which other core is use for CPSW2? Thank you VIjender + +Responses: +Vijender, CPSW2G currently is supported on Linux, on A72 core. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/902539.txt b/data2/text/range/0-5000/902539.txt new file mode 100644 index 0000000000000000000000000000000000000000..b48ddf04b3d5100b31968f2e0b36c98e7c552a50 --- /dev/null +++ b/data2/text/range/0-5000/902539.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2HG: How can TDA2HG configure O917A133 on DVFS mode + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi, My board use TDA2HG as processor, O917A133 as PMIC. And external MCU set POWERON and POWERHold to let O917A133 output power to TDA2HG. Please refer diagram below: TDA2HG output signal to O917A133 's nRESWARM, and O917A133 output Rest_out signal to TDA2HG's RESETn. The problem: is everytime when TDA2HG configure O917A133 in "warm reset sequences", TDA2HG will reset by O917A133. But actually TDA2HG only want O917A133 change it's output voltage not reset TDA2HG. Or it may called DVFS mode. But from O917A133 datasheet, it only have OFF2ACT, ACT2OFF, ACT2SLP and Warm Reset Sequences. So is DVFS mode available on this design? Thanks a lot! + +Responses: +Tim, DVFS is a software concept where application code would change the Voltage and Frequency to a new OPP to increase performance (and increase power) or decrease power (and decrease performance) at run-time. However, DVFS is not supported in the SDK for the TDA2 devices. Regards, Kyle + +Thanks Kyle! I finger out this problem already. Actaully SOC rest_out singal is because I configure SMPS4 on a wronge voltage then cause SOC rest. And I think if I leave SMPS4 along which is only for DDR supply, is OK for my system to work property. Anyway, thanks for your reply! + diff --git a/data2/text/range/0-5000/902561.txt b/data2/text/range/0-5000/902561.txt new file mode 100644 index 0000000000000000000000000000000000000000..522f199114ca710f62c6be19c7610d148853c43a --- /dev/null +++ b/data2/text/range/0-5000/902561.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2E: Caffe jacinto quantization aware training + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, \ As title, I wonder does the caffe-jacinto offer quantization aware training for the SSD? I've tried the offered two different base-networks SSDs: jacintoNetV2 & mobilenet: \ As previously noted by a TI's engineer, depth-wise convolution will suffer more from the runtime weights quantization, and that is also the result I got as well: JacintoNet_v2 SSD: After sparse training: mAP = 0.88 Quantization test shows: mAP = 0.74 MobileNet SSD: After sparse training: mAP=0.89 Quantization test shows: mAP=0.62 \ Though the quantization loss is lesser in jacintoNet, but I still want to minimize the quantization loss, therefore: (1.) I'm asking if the quantization aware training is offered for caffe-jacinto? (2.) Any other suggestions to minimize the quantization loss? (3.) Is there a way to turn off the runtime quantization (for accuracy experiment purposes) when running the model on TDA2 dev board? Thank you, Wei Chih + +Responses: +Hi Wei Chih, I will check with the team internally and come back you. Thanks, Praveen + +Hi, Here are the answers. >>(1.) I'm asking if the quantization aware training is offered for caffe-jacinto? No. It is not offered in caffe-jacinto. It is offered for PyTorch, but that PyTorch repository is targeted towards TDA4, not TDA2. >>(2.) Any other suggestions to minimize the quantization loss? Increasing weight decay during training causes the weights to be more suitable for quantization. So, you can try training with a higher weight decay. But this has to be done in all the training phases, right from the beginning. >>(3.) Is there a way to turn off the runtime quantization (for accuracy experiment purposes) when running the model on TDA2 dev board? No. Only quantized inference is supported on the EVM. Best regards, + diff --git a/data2/text/range/0-5000/903159.txt b/data2/text/range/0-5000/903159.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3e6f9ff66782ce7239cff5b8aa00a27d5374c46 --- /dev/null +++ b/data2/text/range/0-5000/903159.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EX17EVM: TDA2 EX - RTOS , customer needs to know how to set / config to their own GPIO + +Query Text: +Part Number: TDA2EX17EVM Hi Champs: If customer wants to make their own purpose on the GPIO and test it on the TDA2 EX17 EVM, How to give them the GPIO example to work? I trace the code of this: ultrasonicCaptureLink_hw.c Can the ultrasonic code be able to re-modify for their own purpose GPIO? If no, how to set the other GPIO to make their own purpose? BR Rio + +Responses: +Hi Rio, can you check if PDK standalone GPIO examples can help you: Regards, Yordan + +Hi Yordan: May we know where is the GPIO example path? This is TDA, not Sitara... BR Rio + +Hi Rio, please check in \ti_components\drivers\pdk_01_10_04_05\packages\ti\csl\example\gpio Regards, Yordan + diff --git a/data2/text/range/0-5000/903341.txt b/data2/text/range/0-5000/903341.txt new file mode 100644 index 0000000000000000000000000000000000000000..fdcd384d2be7e87be08944f7e4ac189cc537c1ec --- /dev/null +++ b/data2/text/range/0-5000/903341.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2HG: TIDL custom layer support on TDA2 + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler I have a requirement to add a custom layer to TIDL library on TDA2 Is adding custom layer in any version of TIDL library supported on TDA2, If yes can you please specify the version of library from which adding a custom layer is supported? + +Responses: +in TDA2X TIDL custom layer is not supported. You can split the network into multiple small networks to add a custom layer in between sub networks + +Hi, Thanks for the such a quick response. I am already aware that provision for adding a custom layer is already available in the newer releases of TDA4 TIDL lib. Similarly,I would also like to know if there is any plan to add custom layer support capability to the TIDL library on TDA2 in the future release? + +Hi, We don't have any plans to add custom layer support capability to the TIDL library on TDA2. Thanks, Praveen + diff --git a/data2/text/range/0-5000/903526.txt b/data2/text/range/0-5000/903526.txt new file mode 100644 index 0000000000000000000000000000000000000000..d67f1c33013b19c028a7e8cd12d2fc199dd6d2cf --- /dev/null +++ b/data2/text/range/0-5000/903526.txt @@ -0,0 +1,74 @@ +Ticket Name: PROCESSOR-SDK-DRA7X: Linux - How to enable A15 dual core on TDA2 + +Query Text: +Part Number: PROCESSOR-SDK-DRA7X Other Parts Discussed in Thread: TDA2SX Hi, I use "omapconf show opp" to check CPU status, now the SDK only support to enable A15 core-0. How can I enable A15 core-1 in kernel device-tree? br, KS + +Responses: +Hi KS, I think that by default Linux starts both A15 cores in SMP mode (if the particular device have two cores). Can you clarify which device and which SDK ypu use? Regards, Yordan + +Hi, I attach the SOC picture as the following, we use TDA2SX. And SDK version is PROCESSOR_SDK_VISION_03_05_00_00. There is the log msg, 5810.omapconf.txt oToBrite:/mnt/video_storage# omapconf show opp +OMAPCONF (rev v1.73-17-g578778b built Mon Sep 17 14:55:36 IST 2018) + +HW Platform: + Generic DRA74X (Flattened Device Tree) + DRA75X ES2.0 GP Device (STANDARD performance (1.0GHz)) + UNKNOWN POWER IC + +SW Build Details: + Build: +release_details_get(): could not open /etc/issue.net file?! + Version: UNKNOWN + Kernel: + Version: 4.4.84+ + Author: yukichen@dell-r540 + Toolchain: gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) + Type: #1 PREEMPT + Date: Thu Apr 23 11:36:29 CST 2020 + +/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor not found, no CPUFREQ? + +cpu_is_online(1): error opening /sys/devices/system/cpu/cpu1/online file! +omapconf: warning: no matching rate for VDD_GPU OPP.Please check rates against Data Manual recommendations. +|-----------------------------------------------------------------------------------| +| | Temperature | Voltage | Frequency | OPerating Point | +|-----------------------------------------------------------------------------------| +| VDD_CORE / VDD_CORE0 | 59C / 138F | NA | | NOM | +| L3 | | | 266 MHz | | +| DMM | | | 266 MHz | | +| EMIF1 | | | 266 MHz | | +| EMIF2 | | | 266 MHz | | +| LP-DDR2 | | | 532 MHz | | +| L4 | | | 266 MHz | | +| IPU1 | | | (2128 MHz) (1) | | +| Cortex-M4 Cores | | | (1064 MHz) (1) | | +| IPU2 | | | 2128 MHz | | +| Cortex-M4 Cores | | | 1064 MHz | | +| DSS | | | 192 MHz | | +| BB2D | | | (2128 MHz) (1) | | +| | | | | | +| VDD_MPU / VDD_CORE1 | 60C / 140F | NA | | NOM | +| MPU (CPU1 OFF) | | | 1000 MHz | | +| | | | | | +| VDD_GPU / VDD_CORE2 | 59C / 138F | NA | | UNKNOWN | +| GPU | | | 354 MHz | | +| | | | | | +| VDD_DSPEVE / VDD_CORE3 | 58C / 136F | NA | | NOM | +| DSP1 | | | 750 MHz | | +| DSP2 | | | 750 MHz | | +| EVE1 | | | 535 MHz | | +| EVE2 | | | 535 MHz | | +| | | | | | +| VDD_IVA / VDD_CORE4 | 60C / 140F | NA | | HIGH | +| IVA | | | 532 MHz | | +| | | | | | +|-----------------------------------------------------------------------------------| + +Notes: + (1) Module is disabled, rate may not be relevant. + +/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor not found, no CPUFREQ? + +Hi, Could you update any information? There is the dmesg log form kernel. Board_2020-05-15_13-13-49.log + +Hi, I have modified kernel dts and config by myself. the command - "omapconf show opp" shows CPU 1 ON. Br, Ks. + diff --git a/data2/text/range/0-5000/903971.txt b/data2/text/range/0-5000/903971.txt new file mode 100644 index 0000000000000000000000000000000000000000..2c76fc82d6ae612fb3110c37105051af08b458f2 --- /dev/null +++ b/data2/text/range/0-5000/903971.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-DRA7X: TDA2: How to Config GPU IdleMode to Smart-idle mode + +Query Text: +Part Number: PROCESSOR-SDK-DRA7X Hi, Because of reducing GPU power consumption, we would like to know the power consumption in smart-idle Mode, Please provide the method to config GPU idle mode to smart-idle. I use PROCESSOR_SDK_VISION_03_05_00_00. br, KS. + +Responses: +Hi KS, I don' think that there is anything called smart-idle mode for GPU power saving. There is one way to save GPU power is to set its frequency to OPP_NOM, but it is not dynamically supported. Thanks RamPrasad + diff --git a/data2/text/range/0-5000/903978.txt b/data2/text/range/0-5000/903978.txt new file mode 100644 index 0000000000000000000000000000000000000000..d6aed8d67985b8ab66664dfac970cb53921a2e92 --- /dev/null +++ b/data2/text/range/0-5000/903978.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: Caffe Jacinto Input data channel + +Query Text: +Part Number: TDA2EVM5777 Hello, The provided script has no toggle for using signle-channel images (grayscale) as input. What needs to be changed for training a SSD model that take a single channel images as input? Thanks, Wei Chih + +Responses: +Wei Chih, Frankly, I have not trained using gray scale images in Caffe - so i don't know. A workaround is - convert your images into 3 channels and save them - I think you can use Python packages such as opencv or PIL to do that. Best regards, Manu. + diff --git a/data2/text/range/0-5000/904353.txt b/data2/text/range/0-5000/904353.txt new file mode 100644 index 0000000000000000000000000000000000000000..956c92d55a18e1509e8d72d8f0b1b1c503c2d521 --- /dev/null +++ b/data2/text/range/0-5000/904353.txt @@ -0,0 +1,18 @@ +Ticket Name: TIDEP-01017: Radar SDK usecases beamforming issue + +Query Text: +Part Number: TIDEP-01017 Hello, I run the usecases "cascade_radar_beam_form", and the result is mismatched between GUI and real environment. I think the reason is calibration of TX and RX. Can i calibrate the TX and RX just like the usecsaes "cascade_radar_object_detect"? According the source code of the usecases "cascade_radar_beam_form", the parameter can be loaded from the text files. The Radar SDK only provide the MIMO parameter text files. Can TI provide the beamforming parameter text files? Thanks. Morris + +Responses: +Hi Morris, I am moving this to the ADAS processors forum to get you support. Thank you, -Randy + +Hi, I try to calibrate the phase difference between the Rx at the beamforming mode. I put a corner reflector at 0 degree and on the static distance, and I measure the phase difference between each Rx for 10 frames. Then, i found the phase difference of each frame are different. According to my acknowledge, I think the phase difference between each Rx should be static if the corner reflector is on the static position. The result is shown below. Thanks. Morris + +Hi Morris, Phase calibration datasets can be effected by local operating temperature of the devices. Most consistent data will be gathered when the device remains at the same temperature. Can you repeat this experiment, but include the following steps: 1. Allow the system to heat-up to steady state ambient operating temperature with 30 seconds of dummy chirps before taking the actual calibration data? 2. In the calibration dataset frames, discard the beginning of each frame until steady phase is observed Can you graph what phase of the target reflector vs. chirp number looks like for your setup? It may help identify if these instabilities are being caused by temperature. Thank you, -Randy + +Hi Randy, I measure the Rx phase twice following these steps. step 1. I turn on the power of radar, and I let it do 60 seconds of dummy chirps. step 2. I record the data, and I turn off the power of radar. step 3. I go to step 1 after 60 second. Then, i found the phase difference of each frame are different. The result is shown below. Can you provide any advice? Thanks. Morris + +Hi Morris, Can you please show me the phase stability over each chirp. What does that trend look like inside of a given frame? I agree, the assumption is that the phase delta should be pretty stable between frames. Some drift is expected depending on how much the temperature varies over time. Is the ambient temperature being controlled in any way? Is this an indoor or an outdoor measurement? Would it be possible for you to repeat this experiment in mmWave Studio using the TX-BF example project, comparing against the ProcessorsSDK code? Thank you, -Randy + +Hi, Randy I try to measure the RXs phase for 1T16R, and the result is okay (<3 degree)(as shown as figure 1). I think the phase error is caused by TX beamforming in the demo. Can you have any advice? Thanks. Morris figure 1. + diff --git a/data2/text/range/0-5000/904358.txt b/data2/text/range/0-5000/904358.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d01743a258f854fc6022d931ac77cef9fa7e513 --- /dev/null +++ b/data2/text/range/0-5000/904358.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2EVM5777: TDA2 with 12-bits sensor input & TIDL 12-bits input + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, I've a question regarding using an image sensors that can output 12 bits image buffer. My questions are: (1.) Is TDA2 capable of reading buffer from a sensor that can outputs single channel 12 bits images? (2.) According to a coworker of mine, in default, TIDL takes unsigned char buffer as input. Can TIDL use other data type such as float? Thanks a lot, Wei Chih + +Responses: +No, TIDL can't use other data type such as float. The input should be 8-bit unsigned or signed data. Thanks, Praveen + +Understood. Can TDA2 read data from a sensor that outputs 12bits single channel image? Thanks, Wei Chih + +Hi Wei, 8 , 16 or 24 bit port available in VIP. so 12bit is not supported. Thanks RamPrasad + +Hi Wei, 12 bit data can be supported with VIP. I got it confirmed from the expert. Thanks RamPrasad + diff --git a/data2/text/range/0-5000/904465.txt b/data2/text/range/0-5000/904465.txt new file mode 100644 index 0000000000000000000000000000000000000000..3851d7e8149a4ad5fc7ab2e0eeab3fa973153830 --- /dev/null +++ b/data2/text/range/0-5000/904465.txt @@ -0,0 +1,32 @@ +Ticket Name: DRA77P: ipu firmware build issue + +Query Text: +Part Number: DRA77P Other Parts Discussed in Thread: SYSBIOS Hi, I am working on vision SDK v3.07, I was adding some sysbios codes from DisplayDss_main.c and have added it to main_common_ipu2.c so that I would able to initialise HDMI display as soon as the firmwares are loaded. I am facing some buid errors as follows, # Compiling tda2px-evm:ipu2:release:vision_sdk: /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps/src/common/app_init/app_init_ipu_primary.c +# Compiling generated MAIN_APP_ipu2_pem4.oem4 +# Linking into /home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4... +# +"/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu2/release/vision_sdk_configuro/linker_mod.cmd", line 276: error: + program will not fit into available memory. run placement with alignment + fails for section "GROUP_1" size 0xf491bb2 . Available memory ranges: + IPU2_DATA_MEM size: 0x1400000 unused: 0xeb5d01 max hole: 0xeb5cfc +error: errors encountered during linking; + "/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2 + px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4" not + built +make[7]: *** [/home/ubantu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4] Error 1 +make[6]: *** [ipu2] Error 2 +make[5]: *** [apps_ipu2] Error 2 +make[4]: *** [apps] Error 2 +make[3]: *** [apps] Error 2 +make[2]: *** [apps_exe] Error 2 +make[1]: *** [apps] Error 2 +make: *** [vision_sdk] Error 2 + Correct me if I am wrong. Are there any other alternatives ? Regards, Padmesh + +Responses: +Hi Padmesh, This error shows that there is not enough memory left for placement. What code you are trying to add and how big is it? Can you remove unneeded links if you don't need them and try? Thanks RamPrasad + +Hi Ram, This code is an dss example of vps drivers, which i have included in the main_common_ipu2.c. This code is intended to show a logo on the hdmi. Regards, Padmesh + +Hi Padmesh, I checked internally on the compilation failure. This is clearly memory is not available for placement issue. You can adjust the size of IPU section for this. If the code is already available in vps library, you can call that specific function instead of copying the same code in ipu2. Thanks RamPrasad + diff --git a/data2/text/range/0-5000/904545.txt b/data2/text/range/0-5000/904545.txt new file mode 100644 index 0000000000000000000000000000000000000000..98d1808416b41ccbcaf3dbb56186b821e219c4ff --- /dev/null +++ b/data2/text/range/0-5000/904545.txt @@ -0,0 +1,14 @@ +Ticket Name: Compiler/TDA2SX: running usecases on custom board + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hello! I have custom board with TDA2 and custom pin configuration. I need to run usecases from radar SDK on this board. Which parameters i need to change before building AppImage for successful running? Thanks, Alex + +Responses: +Hi Alex, can you try to change the pimnux in in ti_components/drivers/pdk_01_10_04_05/packages/ti/drv/vps/src/platforms/src/bsp_platformTda2xx.c according to your board settings and see if it works? Regards, Yordan + +Hi Yordan, I looked through this file, its almost what i need, but i didnt find ethernet pins. Is it in other .c file or i don't need configure ethernet pins? Regards, Alex + +Hi Alex, Sorry for the delayed response. Can you check the patch vision_sdk/docs/Patches/0001-PAD-Mux-changes-to-enable-Dual-MAC.patch and see if it can give you any directions. Regards, Yordan + +Thanks! + diff --git a/data2/text/range/0-5000/906077.txt b/data2/text/range/0-5000/906077.txt new file mode 100644 index 0000000000000000000000000000000000000000..defe076b1dc4e77ea01f84d9bddec4e43d4cf04d --- /dev/null +++ b/data2/text/range/0-5000/906077.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EVM5777: Caffe jacinto quantization API for model evaluation on computers + +Query Text: +Part Number: TDA2EVM5777 Hello, Since the provided testing python script for caffe jacinto trained SSD models doesn't support quantization. I wonder does TI or anywhere else has the python API to quantize models for accuracy testing? The testing we are doing is not just hit or miss, but evaluating the offsets of accuracy in cm compare to ground truth. Thanks, Wei Chih + +Responses: +Hi Wei Chih, We do not support quantizing the models in Caffe - but you can do that directly in TIDL for TDA2x. But if your purpose is just to get an approximate sense of accuracy, we have it in our scripts. For example, this script: https://git.ti.com/cgit/jacinto-ai-devkit/caffe-jacinto-models/tree/scripts/train_imagenet_classification.sh has a last phase called test_quantize that reports rough accuracy with quantization. An example config file and log is captured here: https://git.ti.com/cgit/jacinto-ai-devkit/caffe-jacinto-models/tree/trained/image_classification/imagenet_jacintonet11v2/test_quantize But this has not been matched properly with what TIDL produces and may not always be correct. Your best bet is to measure the accuracy using TIDL. Best regards, + diff --git a/data2/text/range/0-5000/906189.txt b/data2/text/range/0-5000/906189.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b755bf89fb5cf478cb81206744a2f61aadf5666 --- /dev/null +++ b/data2/text/range/0-5000/906189.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM: GPU and asynchronous VX nodes processing + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, When I was working with TDA2 SoCs in System Link API there was possibility to process buffers asynchronously. It heled to utilize better GPU without GPU-stalling calls like glFinish(). With old Vision SDK it was supported by default as GBM framework and PVR backend implementation hides from you handling of framebuffers with eglSwapBuffer() and you can just get the current buffer by the call gbm_surface_lock_front_buffer(). This call will give you access to recent ready framebuffer. (could be previous frame if GPU has high workload). In the latest PSDK for TDA4 there is no such functionality and in SRV test sample there is explicit glFinish() which affects PVR GPU performance (tiler and renderer works only sequentially without overlapping in pipeline for two subsequent output framebuffers). Are there any design guides or sample on how to implement similar asynchronous pipeline? + +Responses: +Hello Grigory, We are aware of the limitation and do intend to implement asynchronous processing to better utilize the GPU. As you guessed this will require some changes to the way GPU and OpenVX display nodes work. And this is because the display is being handled by R5F and not by A72. I presume your end goal is to have OpenVX based R5F display node support asynchronous buffer processing so that Tiler and Renderer can run in parallel. Or are you looking for A72 directly interacting with the display using Wayland/GBM. Regards Hemant + +Hi Hemant, Thank you for the reply. Yes, the goal is to utilize TI OVX display node on R5F and have pipeline with parallel Tiler/Renderer parts (without explicit synchronization calls like glFinish()). We have one suggestion that it can be done by using GPU outside of TI VX node. At the level of control application (that maintains VX graph) we can use glFence()/glClientWaitSync() in separate threads and submit rendered output buffer to vxGraph with display node when it is ready. But I was wondering how can we do that by using only TI VX API. When do you think it could be avaialble as a part of PSDK? -- Grigory + +Hello Grigory, Thank you very much for the suggestion. We will certainly look into this and try it out. We are also looking at VX API and how to handle this in the context of the API. Regarding the PSDK, we do not have a date that I can give you yet - but it is being looked into. I will update you as soon as this is integrated. If it is okay with you, can we close this E2E ticket with the action on us to work this out in the SDK context? Regards Hemant + diff --git a/data2/text/range/0-5000/906648.txt b/data2/text/range/0-5000/906648.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2eae864e073ce8d84ecf568bb82f1c4b068d056 --- /dev/null +++ b/data2/text/range/0-5000/906648.txt @@ -0,0 +1,22 @@ +Ticket Name: Compiler/TDA2EVM5777: Put the board in UART boot mode + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, I want to boot bios from qspi. According to mflash user guide l need to change the SYSBOOT switch on EVM: For TDA2xx-evm, change the switch SW3[0:7], SW4[8:15] to [11001000][100000001] and SW5 to [00010000] But i don't understand which switches i have to change, because in my EVM i have SYSBOOT SW2[0:7] and SW3[8:15], and also USERCONFIG SW5[0:9]. + +Responses: +Hi Dmitry, which user's guide you refer? In section "3.5 Boot Modes" of vision_sdk/docs/VisionSDK_UserGuide_TDA2xx.pdf there is: Also you can check section "29.2.4 Sysboot Configuration" in device's TRM. Regards, Yordan + +In section "3.5 Boot Modes" of vision_sdk/docs/VisionSDK_UserGuide_TDA2xx.pdf nothing about UART boot mode and this reason i don't understand how can i use mflash tool for boot bios. Regards, Dmitry + +Hi Dmitry, sorry for the delay. For UART boot on TDA2, can you try SySBOOT [0:5] = 0b110010 Regards, Yordan + +Hi Yordan: For UART boot(mflash), How to setup sw2,sw3 & sw5. Regards, Jemy + +Hi, The issue is resolved? Thanks Gaviraju + +Hi Gaviraju! Still don't understand how to setup sw2,sw3 & sw5 for TDA2xx-evm. Regards, Dmitry + +Hi, Refer to the below document file: ti_components/drivers/pdk_01_10_04_05/packages/ti/boot/sbl_auto/docs/AppNote_mflash.pdf or file: ti_components\drivers\pdk_01_10_04_05\packages\ti\boot\sbl_auto\tools\mflash\Readme.md There is a small correction in AppNote_mflash.pdf regarding the SYSBOOT switch change For TDA2xx-evm, change the switch SW3[0:7], SW4[8:15] to [11001000][100000001] and SW5 to [00010000] Please ignore the above SYSBOOT switch change & follow the below SYSBOOT switch change For TDA2xx-evm, change the SYSBOOT switches SW2[0:7] and SW3[8:15] to [11001000][100000001] and SW5 to [00010000] Thanks Gaviraju + +Thanks, Gaviraju! + diff --git a/data2/text/range/0-5000/906997.txt b/data2/text/range/0-5000/906997.txt new file mode 100644 index 0000000000000000000000000000000000000000..2570c1b8beba37aa80252413829df2be368ef4ce --- /dev/null +++ b/data2/text/range/0-5000/906997.txt @@ -0,0 +1,37 @@ +Ticket Name: TDA2EVM5777: Custom Camera running on TDA2 board in RTOS + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi experts: I have a project that using camera module with ISP IC which output format to 720p's YUV422 10-bits. I created an new usecase (Capture -> Alg_custom_frame_copy(DSP1) -> Display(YUV420sp_uv)) for testing this camera. I'd like to do color space transformation on Alg_custom_frame_copy node, so I assigned those following custom settings for this camera after calling ChainsCommon_SingleCam_SetCapturePrms() 1: videoIfWidth -> SYSTEM_VIFW_16BIT 2: pInprms->dataFormat -> SYSTEM_DF_YUV422I_YUYV 3: pOutprms->dataFormat -> SYSTEM_DF_RAW16 and i transform data on Alg_custom_frame_copy by the following code: Int32 row_idx , col_idx ; + UInt8 *src_gray = (UInt8 *)inPtr[0]; + UInt8 *dst_gray = (UInt8 *)outPtr[0]; + UInt16 *row_ptr = 0; + UInt16 tmp; + + for (row_idx = 0 ; row_idx < 720 ; ++row_idx, src_gray += inPitch[0], dst_gray += outPitch[0]) + { + + row_ptr = (UInt16 *)src_gray; + + for(col_idx = 0 ; col_idx < 1280 ; ++col_idx) + { + + tmp = (row_ptr[col_idx] >> 6); + dst_gray[col_idx] = (UInt8 )(tmp & 0xFFU); + } + } memset( outPtr[1], 0x80, 1280 * 720 / 2); // try the gray channel first, so set UV channel to empty and i got those following error on the display(see figure): 1. one-fourth camera's FOV. 2. image noisy. 3. pixel-gap on x-direction of image. so, a few questions below: 1. does my settings/code wrong to transform color space? 2. I try 0 shifting on Alg_custom_frame_copy, I will get dark display. So, I wonder how the bit-ordering of input image. How to get that?(camera's data pin is connected to v1d0~v1d9 by pin-to-pin) 3. Due to there is only one-fourth camera's FOV and pixel-gaping, does VIP module output wrong size of image? 4. Or any good suggestion of my project? Best / Regard Wxchen + +Responses: +dst_gray[col_idx] = (UInt8 )(tmp & 0xFFU); Are you clipping 10-bit data to 8-bits? It seems like you are sacrificing 2 MSBs. This would explain image quality degradation as shown in the snapshot. + +HI: Thanks for your reply. i tried to map 10-bit data to 8-bit( grayValue / 1024.0 * 255.0). It seems that the result was similar to clipping data. here is an testing snapshot. BTW, what cause the wrong FOV and pixel-gapping? wxchen + +I can not figure out the issues when the image has been badly damaged by losing the MSBs. Can you please provide a file dump of an original 10-bit UYVY frame sent by the sensor? + +Hi: Would you please provide the actual parameters of grabbing 10-bit UYVY frame in VIP driver? I can change parameters from ti_components\drivers\pdk_01_10_03_07\packages\ti\drv\vps\examples\vip\captureVip\src\CaptureVip_main.h. I will compile driver example and put it to TDA2 board, then the program will dump frame file to SD-card, and I will send it back to you. Best / Regard wxchen + +Not sure what you mean by "actual parameters of grabbing" I am assuming you have 10-bit UYVY in inPtr. All you need to do is write to a binary file using fwrite or CCS. + +Hi: I'm sorry for your misunderstanding. Because I'm not sure about what the proper parameter is for grabbing YUV422 10-bit image(720p) from camera in the VIP module. Would you please provide proper parameter for my case? I will build application of pdk that can dump that file to you. Thank you. wxchen + +I believe you already have captured from VIP and that's the image you are manipulating. If that's not correct, please ignore my comments. Simply replace the clip to 0xFF by downshift of 2 and you will be able to get a good image. + diff --git a/data2/text/range/0-5000/907319.txt b/data2/text/range/0-5000/907319.txt new file mode 100644 index 0000000000000000000000000000000000000000..a67104492610102a98b67e9e7532007e995465ce --- /dev/null +++ b/data2/text/range/0-5000/907319.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TDA2EG-17: TDA2E17：How to implement one pin of GPIO5 interrupt on DSP(running BIOS),and other one pin of GPIO5 interrupt on A15（running Linux） + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Now,my board schematic is such that I need to config one pins of GPIO5 IRQ on DSP(running BIOS) , and other pins of GPIO5 from Linux on the A15, is that possible? + +Responses: +Hi, As on TDA2 family there is no dedicated interrupt per pin, only one per module hence such kind of implementation of interrupting 2 cores based on pins from same module of GPIO is not recommended by TI. Regards, Karan + +Hi， Thank you for your reply. According to TRM, each GPIO mudule has two interrupt lines. Is it possible to map one interrupt line to A15 and another interrupt line to DSP + +Hi, Yes, I think I confused the device. So you can actually route the two interrupts to A15 and DSP. Looking at the device tree in linux will help you check which one is already going to A15 running linux then you can register the other interrupt line on DSP. Regards, Karan + +Hi Karan, I tried to do this, but the A15 core printed the error message "unexpected IRQ trap at vector 00" and it didn't seem to enter the interrupt function. I was wondering if anyone succeeded in this method? + +Hi, Can you please share your feedback on the below for correct understanding? Does the system work correctly when you configure only the DSP side interrupt and fire the interrupt? Does the system work correctly when you configure only the Linux side interrupt and fire the interrupt? And you are saying that you face the issue only when both are enabled? And the issue is always on the A15 side and DSP works correctly? Can you please share your Linux side changes to enable the GPIO interrupt? Regards Karthik + diff --git a/data2/text/range/0-5000/908781.txt b/data2/text/range/0-5000/908781.txt new file mode 100644 index 0000000000000000000000000000000000000000..d4ac6678835c40d42498c1f4dfc3710bb72c6535 --- /dev/null +++ b/data2/text/range/0-5000/908781.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2E: Drivers imigrate + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 I have a camera AR0143 and I want to send its datas directly to the CPU.The camera's data flow has 12 data bits,one flame_valid bit , one line_valid bit and one sys_check bit.Whether the TDA2xx chip can support this design?And can I find driver models to modify for this design?The follow is hardware design. + +Responses: +Yes, it looks fine. One suggestion, if you use line valid as DE signal, it would be better. Rgds, Brijesh + +The camera'data flow is RAW/Bayer.I find the capture Driver in the SDK dosen't support this kind data flow.Should I add an encode chip or modify the capture driver to convert the data flow? + +Please note that processing Bayer images requires an ISP which is not available in TDA2E SoC. This is why the SDK does not support this format. It is possible to modify the capture driver for 12b RAW format. But how will you consume the raw image sent by AR0143? + +I want to modify the driver to convert RAW to RGB or YUV．if this way wil add CPU much burden?Can you recommend several ISP chips for TDA2xx? I am thinking to choose software encoding or hardware encoding ,do you have saome advice?Thank you! + +Yes, doing it in software would cause very high CPU load. I would recommend TDA2PX. This is a device is TDA2 family with internal ISP. It will allow you to reuse all your existing code from TDA2E. + + + diff --git a/data2/text/range/0-5000/910449.txt b/data2/text/range/0-5000/910449.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d95d9410453c79556412fd11a096640c44b3670 --- /dev/null +++ b/data2/text/range/0-5000/910449.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EG-17： How to modify crystal input source + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Hi At present, the input source of crystal oscillator used in our board is Xi_ Osc0, can the input source of crystal oscillator be changed to Xi_ osc1？ I test disconnect Xi_ Osc0 and connect Xi_ Osc1 finds that uboot cannot be started. Do I need to modify anything in uboot? The input source of Xi_osc1 is a 20MHz active crystal oscillator. + +Responses: +I will let SDK experts comment from SW perspective, but just as a side note, you can check the Clock Tree Tool (CTT, free to download here: https://www.ti.com/tool/CLOCKTREETOOL ). You can use the tool to study the device clock/crystal/OSC sources and their associated register configuration. This could also guide you to the answer to your question. thanks, Alex + +Hi, Unfortunately OSC0 is the mandatory oscillator for TDA2. All DPLLs needed to clock the processor(s) are running from OSC0 (SYS_CLK1) Regards, Stan + diff --git a/data2/text/range/0-5000/910650.txt b/data2/text/range/0-5000/910650.txt new file mode 100644 index 0000000000000000000000000000000000000000..85dd1367c76eb080d266cd4b2e93679b63d5ec78 --- /dev/null +++ b/data2/text/range/0-5000/910650.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VMXEVM: how to control pin mux. + +Query Text: +Part Number: TDA4VMXEVM Hi,as you konw,TDA2S set pin mux in the uboot. but i dont find in the TDA4 ,can you tell me where is the pin's mux setting. Thank you! + +Responses: +The pin configuration for this wave of devices (TDA4/J7) is done in the device tree files (dts). See section "3. Foundational Components » 3.2. Kernel » 3.2.1. Users Guide" in the processors SDK docs. You can also use the sysconfig tool "https://dev.ti.com/sysconfig/" to generate configuration and paste it over in the dts file and recompile. See section "Docs » 3. Foundational Components » 3.4. Tools » 3.4.2. Pin Mux Tools" in the processors SDK docs. Hope it helps, thanks, Alex + diff --git a/data2/text/range/0-5000/911719.txt b/data2/text/range/0-5000/911719.txt new file mode 100644 index 0000000000000000000000000000000000000000..97ce7d77ed59080586ab0a4d5189f56631afa0a0 --- /dev/null +++ b/data2/text/range/0-5000/911719.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA3XEVM: How to build the TDA3 within VSDK3.7 for this folder: + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2 Hi. I'm learning the TIDL building according this: TIDeepLearningLibrary_UserGuide.pdf however, I'm building this on the ubuntu18.04. --> /opt/PROCESSOR_SDK_VISION_03_07_01_00/ti_components/algorithms/REL.TIDL.01.01.03.00# However, this PDF has no mentioning on the TIDL building. please guide me how to build this TIDL on the ubuntu for TDA3. THanks. BR Rio + +Responses: +Hi, TIDL build on the ubuntu for TDA3 is not supported and hence not documented in the TIDL user guide. Thanks, Praveen + +Hi. So, I can image the TDA2 TIDL is not okay to be built on the ubuntu? Am I right? Only the TDA4 TIDL can be built on the ubunutu? May you summerize those TDA2/3/4 TIDL supported on the ubunutu? Thanks. BR Rio + +Hi Rio, Yes, you are right. TDA2/3 TIDL build is not supported on the Ubuntu but TDA4 TIDL build is supported on the Ubuntu. Thanks, Praveen + diff --git a/data2/text/range/0-5000/911728.txt b/data2/text/range/0-5000/911728.txt new file mode 100644 index 0000000000000000000000000000000000000000..94614f967cdb20256b96ecbb07df6ab4115ab2d8 --- /dev/null +++ b/data2/text/range/0-5000/911728.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2EVM5777: I Can't not access a link on TIDeepLearningLibrary_UserGuide.pdf. Can I get a TIDL example project ? + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Code Composer Studio Hello, I trying to use TIDL. so I refer TIDeepLearningLibrary_UserGuide.pdf. But I can't access the link https://cdds.ext.ti.com/ematrix/common/emxNavigator.jsp?objectId=28670.42872.62652.37497 in 3.3.3 DMA utility Library the Error said below I'm just an individual(student). so I don't have team manager, program manager... How can I get CDDS account? or DMA utility Library? and I continued the UserGuide for "Building Sample Test Application" except 3.3.3 so I load "dsp_test_dl_algo.out" file. this is the result but I stopped step 9). there are no files in \test\testvecs\output sub-directory a file in \test\testvecs\referennce type is .bin so I can't check it Can I get a TIDL example project .zip file by email? reference [ˈrefrəns] Eng 1.reference [명사] ~ (to sb/sth) (… 에 대해) 말하기, 언급; 언급 대상, 언급한 것 2.reference book [명사] 참고 도서 3.with reference …을 참고로 하여 4.cross reference [명사] ~ (to sth) 상호 참조 (표시) 5.reference point [명사] (판단·비교용) 기준 6.참고 參考 reference, refer (to), consult 7.참조 參照 reference, consultation, refer (to), consult 8.언급 言及 reference, mention, refer (to), mention, make reference (to), make mention of 9.자료 資料 material(s), data (on); (참고 자료) reference 10.추천서 推薦書 (letter of) reference, (letter of) recommendation {"mean":["reference

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[명사]\n\t\t \t\t참고 도서","with reference

…을 참고로 하여","cross reference

[명사]\n\t\t ~ (to sth)\n\t\t \t\t상호 참조 (표시)","reference point

[명사]\n\t\t \t\t(판단·비교용) 기준","참고\n \t\t\t參考

reference, refer (to), consult","참조\n \t\t\t參照

reference, consultation, refer (to), consult","언급\n \t\t\t言及

reference, mention, refer (to), mention, make reference (to), make mention of","자료\n \t\t\t資料

material(s), data (on); (참고 자료) reference","추천서\n \t\t\t推薦書

(letter of) reference, (letter of) recommendation"],"word":"\n\t\t\t\t\t\treference\n \t\t\t\n\t \t\n\t ","soundUrl":" dict-dn.pstatic.net/v + +Responses: +the first image is this and the second + +Hi, DMAUTILS library is already included in VisionSDK and is located in \ti_components\algorithms\REL.DMAUTILS.00.08.00.02. Can you try to point DMAUTILS_PATH variable to this directory and give a try? Regards, Yordan + +I retry step-by-step, and I got a new error in step 4, I got this error, and It said "cannot find the path specified" did I miss something? + +Hi, Did you update the paths correctly in "makerules\config.mk" file? Thanks, Praveen + diff --git a/data2/text/range/0-5000/911836.txt b/data2/text/range/0-5000/911836.txt new file mode 100644 index 0000000000000000000000000000000000000000..6c104b8716a364c2d5b1ad64181653e702e0f15a --- /dev/null +++ b/data2/text/range/0-5000/911836.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EX17EVM: linux + +Query Text: +Part Number: TDA2EX17EVM I used the linux which Ti VisionSDK document (VisionSDK_Linux_UserGuide.pdf) recommended. Then I got some fail in TC8 test cases (www.opensig.org/.../9_OA_Automotive_Ethernet_ECU_TestSpecification_v1.pdf). I do not understand why there are some strange result on the ethernet test, e.g., not getting TcpFlagAck, connection illegal for this process. Whether the linux network kernel follow RFC793 which is the TC8 requirement? How can I pass these TC8 testcase? It seem to me that the ethernet protocols (e.g. tcp/ip arp icmp udp) are implemented by the linux kernel. Can anyone confirm that this linux support TC8? By the way, I knew there are some network parameter on "/proc/sys/net/ipv4/" and how could I change it ? thanks ref : TC8 test report 20200505_Report_TC8_Test_Configuration.pdf + +Responses: +Hello. From the logs in the test report, you are failing arp and icmp tests, which indicate a setup issue is likely. We don't explicitly test RFC793 compliance in our testing, but we do heavily use tcp/ip/arp/icmp in our system testing. Best regards, Dave + +Dave Bell said: Hello. From the logs in the test report, you are failing arp and icmp tests, which indicate a setup issue is likely. We don't explicitly test RFC793 compliance in our testing, but we do heavily use tcp/ip/arp/icmp in our system testing. Best regards, Dave Hi Dave Thanks for your reply. I don't get it. setup issue? Is it hardware issue or software issue? How should I do on linux now? Should I try to change my ethernet configuration? Do you have any suggest about arp/icmp? and maybe I can try it. B/R JY Chou + +JY, We let this post lock and it was missed. Are you still facing issues with your setup or have you resolved? Best regards, Dave + diff --git a/data2/text/range/0-5000/911962.txt b/data2/text/range/0-5000/911962.txt new file mode 100644 index 0000000000000000000000000000000000000000..6d23b798e54a7f4df28abfe77508294599d303ab --- /dev/null +++ b/data2/text/range/0-5000/911962.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EXEVM: HDMI Output on Cascade TDA2 Board + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I have a need to use HDMI local display to show RDM data output of 2D-FFT. I have created a usecase and modified the PkDetect Alg to get a copy of one of the 4 EVEs' 2D-FFT output and create a VideoFrameBuffer to output the RDM data to fftHeatMap for local display. As far as I know the usecase runs without any issue but plugging the HDMI output from the TDA2 cascade board to a monitor showed no HDMI output. It didn't look like there is even sync signal detected by the monitor. Normally when monitor picks up a sync, it has a very gent click to kick the monitor active and show the content. There isn't such a thing on this cascade board. Was the HDMI connector on the board designed to be used with usecase? Thanks, --Khai + +Responses: +Khai, Are you using on-chip HDMI or off-chip HDMI? Rgds, Brijesh + +HI Brijesh, I using the TDA2 Cascade EVM board from TI at the moment. I am not sure what you are referring to. This is not a custom board. Thanks, --Khai + +Hi Khai, We didn't have any customer requirement to support HDMI output on Cascade EVM so it was not tested. I tried once to see if it worked out-of-box with SDK and it didn't. It will require some effort to bring this interface up but we don't have plan to do this. Regards, Stanley + +Hi Stanley, We reply on local HDMI output to realize the working of the processing chain. As you know our processing chain will be nothing like the MIMO or TxBF usecase provided where it interacts with Matlab script to render result on PC. Ours usecase is high performance and realtime. Can this feature be considered and make available as there is an HDMI output connector on the board after all. If not this SDK version, the upcoming SDK version. Thanks, --Khai + +Hi Khai, There is no plan for any more SDK release except for critical bug fixes. Main reason we descoped HDMI output was we don't have GPU support to display matlab like plot to HDMI output. Having the radar object data transferred to PC for rendering is the only option. Regards, Stanley + +Hi Stanley, As of now, the Processor SDK RADAR v03.08 is not compatible with the 2243 Cascade board. If there are no plans for new releases, how is TI planning to address this issue? + +In Addition, there is a GPU HW Block in the TDA2 just like the TDA3. If TDA3 can have local HDMI functionality, TDA2 is even a more powerful chip, it should be able to do the same. It's all about TI commitment to supporting it in SDK. --Khai + +On TDA3, it is just drawing bitmap on DSP or M4. Same function can run on TDA2. However, HDMI functionality is not support on Cascade EVM. + +So you're saying drawing bitmaps cannot be done on the Cascade DSP EVM? + +Bitmap drawing functions can be called on DSP or M4 but we didn't bring up HDMI interface for display. + diff --git a/data2/text/range/0-5000/912084.txt b/data2/text/range/0-5000/912084.txt new file mode 100644 index 0000000000000000000000000000000000000000..d863dd46a6d9c1f05daabb425c9e6e5e862ce364 --- /dev/null +++ b/data2/text/range/0-5000/912084.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2HG: Can TDA2 support TVI-FHD 2 channel input ? + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi All, Can TDA2x support 2-channel TVI-FHD input? (we are using TP3810 now) or TDA2 can only support TVI-HD input? Thanks. Ranny. + +Responses: +Ranny, TDA2x can support digital parallel input with both embedded sync and discrete sync input interface. If TVI-FHD can output in this format, it can be supported. Rgds, Brijesh + +Hi Brijesh, Ok, thanks your replay. Ranny. + diff --git a/data2/text/range/0-5000/912509.txt b/data2/text/range/0-5000/912509.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a8c04fe3c3a7aaf3454804881b65b6b97890eed --- /dev/null +++ b/data2/text/range/0-5000/912509.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: TDA2x,demo code cascade_radar_object_detect will need much more time than the PDF said 36ms, how can I get this tested rerults? + +Query Text: +Part Number: TDA2PXEVM I don't know why the demo code tda2xx_cascade_bios_radar-cascade_radar_object_detect will need a much more time than the PDF said. example:Would you like help me test it again?,Please tell me why and what I shuld do to reduce the time cost by DSP .(2) what is the optizimation lever in DSP and where I can change it? + +Responses: +How did you get the time it took? Could you share the log? Please make sure it is release build, not debug build. In release build, the optimization level is already set to -O3. + diff --git a/data2/text/range/0-5000/912839.txt b/data2/text/range/0-5000/912839.txt new file mode 100644 index 0000000000000000000000000000000000000000..27aa551e22366253dc19986f87082f2a11599431 --- /dev/null +++ b/data2/text/range/0-5000/912839.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EXEVM: ROS integration + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: MMWCAS-RF-EVM Hi, I like to integrate MMWCAS-RF-EVM with TDA2EXEVM in a ROS network. Do you have an example for TDA2EXEVM or similar boards? Thank you! + +Responses: +You can download the Radar SDK from the below link. https://www.ti.com/tool/PROCESSOR-SDK-TDAX Please refer to the user guide for more information. We do not have example for ROS integration. However, we do have example in Radar SDK which sends radar object data to PC over ethernet. Once on PC, you can visualize the radar object data with ROS. + diff --git a/data2/text/range/0-5000/913038.txt b/data2/text/range/0-5000/913038.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa805ed1c5ff66bb77622e4d1864bf8688064938 --- /dev/null +++ b/data2/text/range/0-5000/913038.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: JTAG IEEE 1149.7 and system trace (STM) + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi Champs, Could you help us with the system trace capability on the TDA2xp? Main question is, if there is documentation available about this topic that we did not find? + +Responses: +Hello Simon, Most of the usage on TDA2 I have seen has happened in conjunction with the JTAG debuggers. CCS and Lauterbach have provided message extraction and decode from internal onchip memories (TBR/ETB) or offchip (via TPIU). Both tools do have documentation on their interfaces. CCS did for a CTOOLs library which could be found on the web and Lauterbach has example projects in its 'demo' directory. Checkouts using these tools has happened on TDA2. The STM unit is a standard ARM Coresigh block so a lot of information will exist on its user level. To use this outside of a JTAG tools environment a fair amount of effort may be needed as interfacing with the hardware trace network and the protocol decoding back into a useable for is non-trivial. For number of years Linaro has been working to push framework to do this into the Linux kernel. I'm not sure what state it has reached. I have not seen anyone try and link that Linux path up for a TDA2. As I mention its has been incrementally adding features in Linux for years and the last time I checked (sometime ago) it was well behind what existing tools supported. This would be another source. That IP has been used on several TI chips and some of them would added additional documentation based on user requests. Some of the OMAPs have additional information. Regards, Richard W. + +Hi Richard, Simon posted this question because I contacted him about this topic. We are not using Lauterbach products, but Blackhawk BH-USB-560v2 and Spectrum Digital‘s XDS560v2 emulators. While Blackhawk provided us some useful information, Spectrum Digital told us that this information should be provide by TI. In our TDA2XP based board we are not using Linux, but TI-RTOS. As you said, with some (old) information outside in Internet, it would be probably possible to get this working using the JTAG emulators. But the most useful functionality IMHO is to get the traces in field without the need of connecting any JTAG emulator. I could not find too much information about that and it would be good that TI helped with that, since, as I stated above, it could be useful to find issues in field. Thanks, Alexander + +Hello Alexander, For TDA2 I don't believe TI has productized any self-hosted STM utilities. The supported path would be through JTAG tools and those vendors. The base design can support self-hosted usage, but from what I know, developing it from end to end would take a fair amount of time. The scope of that is well beyond an E2E forum post. For some different chips, TI did publish some libraries which could be leveraged: https://processors.wiki.ti.com/index.php/CTools. A Linux level STM driver was socialized at the same time https://processors.wiki.ti.com/index.php/STM_Linux_Device_Driver. A person could leverage that material and what exists in the Linux kernel for Coresight to get something that works for RTOS. I do agree that there are times where having a self-hosted method to select and extract HW trace data might be useful. For STM, on TDA2, I only see JTAG based STM tools available. Self-hosted logging methods in use are mostly to internal memory or out some kind of terminal/network interface. Regards, Richard W. + diff --git a/data2/text/range/0-5000/913271.txt b/data2/text/range/0-5000/913271.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf776a3ec45e80ea7f6d42b42880567890d47350 --- /dev/null +++ b/data2/text/range/0-5000/913271.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA4VM: TDAEVM-Fusion Daughter card connection & Power connection + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hello all, We would like to connect Fusion Daughter card with TDA4EVM CPBoard. https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos_auto/docs/user_guide/evm_setup_j721e.html#j721e-som From the above link connector J25 is used for connection. How about the power cable connection ? It is not clear. Regards, Gokul + +Responses: +Hi Gokul, Attached is a picture of local working TDA4 EVM setup. For a TDA2 EVM setup the cables would be switched. Regards, Kip + +Hello Kip, Images are not able to download. can you please check from your end ? Regards, Gokul + +Hi Gokul, Were you able to get the Fusion board powered up/ Is it okay to close this thread? Thanks, Kip + diff --git a/data2/text/range/0-5000/913424.txt b/data2/text/range/0-5000/913424.txt new file mode 100644 index 0000000000000000000000000000000000000000..171b86431ae1617a554c6b8f49fffb3d41a9ecba --- /dev/null +++ b/data2/text/range/0-5000/913424.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: TDA2PXEVM: HI,I think there is a bug in your code \PROCESSOR_SDK_RADAR_03_07_00_00,PLease check it out,Or help me understrand it + +Query Text: +Part Number: TDA2PXEVM C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\links_fw\src\rtos\utils_common\src\utils.c,it will make the cpuMhz always 20Mhz. UInt64 Utils_getCurTimeInUsec(void) { static UInt32 cpuMhz = 500U; /* default */ static Bool isInitialized = (Bool)FALSE; Types_Timestamp64 ts64; UInt64 curTs; if(!isInitialized) { /* do this only once */ Types_FreqHz cpuHz; isInitialized = (Bool)TRUE; Timestamp_getFreq(&cpuHz); cpuMhz = cpuHz.lo / (1000U*1000U); /* convert to Mhz */ Vps_printf(" *** UTILS: CPU MHz = %d Mhz ***\n", cpuMhz); } Timestamp_get64(&ts64); curTs = (UInt64) ts64.hi << (UInt64)16U; curTs = (UInt64) curTs << (UInt64)16U; curTs = (UInt64) curTs | (UInt64)ts64.lo; return (curTs/cpuMhz); } + +Responses: +Hi Dan, I will close this thread as it is the same as this one: Experts are looking at the other thread and will reply there soon. Regards, Yordan + diff --git a/data2/text/range/0-5000/913594.txt b/data2/text/range/0-5000/913594.txt new file mode 100644 index 0000000000000000000000000000000000000000..63697702b777dbb909cfcb27709532d9a2b4af5a --- /dev/null +++ b/data2/text/range/0-5000/913594.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: parallel computing on eve in cascade radar usecase + +Query Text: +Part Number: TDA2SX Hi Experts, I'm trying to understand how the parallel computing on EVE cores was implemented in the cascade radar object detect usecase, but I can not find this place in source code. I'm interesting in how datacube is split between cores before horizontal FFT and vertical FFT. How data is split for peak detection? Did you use buffer's chunks for splitting? Can you tell me where I have to looking for? Maybe some documentation is exist on this? Regards, Igor + +Responses: +Hi Igor, Please refer to Ch 4 "TDA2x EVM + 4 AWR12 Cascade Capture, Object Detect, display" under [Radar SDK install]/vision_sdk/docs/Radar/ProcessorSDKRadar_DataSheet.pdf. Regards, Stanley + diff --git a/data2/text/range/0-5000/913906.txt b/data2/text/range/0-5000/913906.txt new file mode 100644 index 0000000000000000000000000000000000000000..9953f475f56b45c4a1c02680106bee7e4e6869c3 --- /dev/null +++ b/data2/text/range/0-5000/913906.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EVM5777: How mflash do load sbl image and appimage into qspi ? + +Query Text: +Part Number: TDA2EVM5777 Hello TI expert, reference information: PROCESSOR_SDK_VISION_03_07_00_00 VAYU XC5777X EVM BOARD minicom setting and running results (VA! is present, not AL!): I got load sbl image and app image into QSPI flash with mflash utility ,as below. and put the board in qspi boot mode and restart it to boot the sbl and AppImage from flash. But target board is not work. but sbl is not working. please advising. user@ubuntu:/home/data1/tda2-eye-detection/ti_components/drivers/pdk_01_10_03_07/packages/ti/boot/sbl_auto/tools/mflash$ sudo ./mflash_run_config.sh Usage: mflash -M -P -C [optional: to clean the QSPI Flash]-F -F ... [PC] sbl_mflash sbl_mflash_tda2xx-evm [PC] File 0 AppImage_BE [PC] Offset 0 0x80000 [PC] File 1 sbl [PC] Offset 1 0x00 [PC] com /dev/ttyUSB0 [PC] ##########Starting USB/UART Flasing Utility############## [PC] Put UART Boot Mode, make fresh UART connection & restart [PC] Press Enter when done... [PC] Opening serial port successful. [RBL]4 [RBL]90 [RBL]30 [RBL]40 [RBL]40 [RBL]80 [RBL]80 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]2 [RBL]13 [RBL]2 [RBL]1 [RBL]0 [RBL]12 [RBL]15 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [PC] Requesting the ASIC ID [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]2 [RBL]13 [RBL]2 [RBL]1 [RBL]0 [RBL]12 [RBL]15 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]21 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [PC] Requesting PERI_REQ mode [PC] Sending SBL_MFLASH filesize. [PC] Size of sbl_mflash = 49660 [PC] Sending SBL_MFLASH... Please wait [PC] File Size = 49660 [PC] # [PC] Transfer Complete. Time = 5.000 [PC] Opening port for sbl_mflash. [PC] Opening serial port successful. [PC] sbl_mflash switch On Request Sent. [TDAxx] Utility mflash will Execute now. [TDAxx] Setting up QSPI [TDAxx] QSPI Spansion 4 bit Device type [TDAxx] MID - 0x1 [TDAxx] DID - 0x18 [TDAxx] !!______TDAxx flashing utility______!!1 [TDAxx] Erasing entire QSPI Flash..This takes 50-60 seconds. 0x000DAxx] Erase Completed!!!2 [PC] Download started[PC] File Size = 49660 [PC] # [PC] Write File Completed. 0x800002e taken to download file = 1.002 [PC] Download started[PC] File Size = 19931332 [PC] #################### [PC] Write File Completed. [PC] Time taken to download file = 282.003 [TDAxx] Exiting. [PC] ##############!!!!mflash shutting down!!!!############# Matt + +Responses: +Hello TI experts, Could you please advise which next step we need to check? Switching sysboot & SW5 as below after loading image into QSPI flash. Console setting and No working image after loading image into QSPI flash, as below Matt + +Hello TI experts, I have fixed issue to 'No sbl image running'. A new question is to 'How Appimage does build into big endian' ? Please advising reference document to build in Linux platform,thanks Matt + +Hi Matt, Can you please look at the SBL user guide: https://processors.wiki.ti.com/images/b/b7/TDA_SBL_UserGuide.pdf Command is "tiimage.exe 0x40300000 BE SBL.bin SBL.tiimage" Regards, Rishabh + diff --git a/data2/text/range/0-5000/914340.txt b/data2/text/range/0-5000/914340.txt new file mode 100644 index 0000000000000000000000000000000000000000..058a0d9ce60161bd22a0c8fd74e46cc2f7245b9a --- /dev/null +++ b/data2/text/range/0-5000/914340.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EXEVM: How to set the TIDL config.mk? + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: MATHLIB, TDA2 DSP_TOOLS ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\cg_tools\windows\ti-cgt-c6000_8.2.4" ARP32_TOOLS ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\cg_tools\windows\arp32_1.0.7" TIARM_TOOLS ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\cg_tools\windows\ti-cgt-arm_16.9.2.LTS" XDAIS_PATH ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\codecs\xdais_7_24_00_04" UTILS_PATH ?="C:\TI\ccsv5\utils\cygwin" VXLIB_PATH ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\algorithms\vxlib_c66x_1_1_3_0" DMAUTILS_PATH ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils" ALGFRAMEWORK_PATH ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\algorithms\REL.ALGFRAMEWORK.02.08.00.00\algframework" MATHLIB_INSTALL_DIR ?="C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\algorithms\mathlib_c66x_3_1_0_0" SHOW_COMMANDS ?= 0 LINUXENV ?= x86 LINUX_BUILD_TOOLS ?="/home/uid/tools/linaro-2017.11" # Default platform # Supported values: vayu,vme TARGET_SOC ?= vayu # Default CORE is dsp # Supported values: dsp, eve, arm CORE ?= dsp # Default TI_DEVICE # Supported values: PC, TI_DEVICE (SIMULATORS or EMULATOR ) TARGET_PLATFORM ?= TI_DEVICE # Default C66 # Supported C64T, C64P, C64, C66, C674, C67, C67P, m4 TARGET_CPU ?= C66 ifeq ($(CORE),eve) TARGET_CPU:= endif Hi Champs: #1. We now know the TIDL for TDA2/3 only be able built in the Windows environment, as Praveen Said. So, in this path: C:\PROCESSOR_SDK_VISION_03_07_01_00\ti_components\algorithms\REL.TIDL.01.01.03.00\makerules The config.mk needs to be set according the Windows CG tool envs. My questions are how to set those 2 parameters in the below config.mk? if we are now in the windows? --> LINUXENV ?= x86 LINUX_BUILD_TOOLS ?="/home/uid/tools/linaro-2017.11" #2.What's the x86 means? #3. How to set this file for TDA2 and TDA3? According this section, is the Vayu = TDA2 and Vme = TDA3? # Default platform # Supported values: vayu,vme TARGET_SOC ?= vayu #4.is the Core set as DSP and Target CPU = DSP, does this mean the EVE / ARM won't spend the effort for TIDL? #5. How to set the DSP + EVE working concurrently for TDA2? BR Rio + +Responses: +Hi Rio, This config.mk file is used to build standalone TIDL out files for either DSP or EVE cores separately. 1, 2 -> Linux build is not supported, so you can ignore them. 3 -> "TARGET_SOC " can also be ignored for TIDL build because the out files build will be for specific core (DSP or EVE) not for SOC. VSDK builds for specific SOC. 4-> For building for EVE set Target CPU = EVE 5-> This is done through VSDK use cases and layers partition for EVE and DSP cores is done by import tool, please refer to FAQ21 and 22 for more details on this partioiton. Thanks, Praveen + diff --git a/data2/text/range/0-5000/916753.txt b/data2/text/range/0-5000/916753.txt new file mode 100644 index 0000000000000000000000000000000000000000..56b14136c65bb2cf0097754651538461448499e2 --- /dev/null +++ b/data2/text/range/0-5000/916753.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3MV: PMHAL_PRCM_CLK_VID_PIX_CLK && dss pixelclocks + +Query Text: +Part Number: TDA3MV Other Parts Discussed in Thread: TDA2 Hi, Our customized tda3mv pcba had a display jitter problem, i already read sprac62 document, and also https://e2e.ti.com/support/processors/f/791/p/818232/3031781?tisearch=e2e-sitesearch&keymatch=vout1_clk%20jitter#3031781 i saw fae said "VIDEO1_DCLK is about 28MHz with signal integrity like #1. The trigger delay shows that this clock has period jitter but that is not unexpected. ". i found three method may could solve display jitter, if clock>70M 1. add clock cleaner 2. use DPLL HDMI to VP1, not DPLL_VIDEO (only for tda2) 3.. set N,M,dive... , the trm show note below NOTE: It is preferred to minimize the value for N parameter (it minimizes lock time and jitter). Then M should be chosen to provide correct frequency (with lowest delta as possible). is method 3 could sovle my problem on tda3x? i read tda3x trm document, see "The VP1_PCLK clock for the VP1 output is provided directly from the DISPC_CLK1 input clock ", and TDA3xx_ClockRate_SetConfig_Generator.xlsm document, see PMHAL_PRCM_CLK_VID_PIX_CLK, Frequency=74000000, PMHAL_PRCM_DPLL_EVE_VID_DSP, M=222, N=4, PMHAL_PRCM_DPLL_POST_DIV_M2, 3, In chains_common.c, How the frequency of display pixelclocks is generated? Is related to PMHAL_PRCM_CLK_VID_PIX_CLK, M, N values ? or any others advices to solve this problem? new edit, this change looks like can let N to be more less, i will try this SJay + +Responses: +Hi SJay, Typically these value are calculated internally by PM driver, I think there is a flag in the API, which calculates M & N values, This flag allows to calculate lower M & N values or higher M & N values.. Can you please try changing this flag? There should API like SetClockRate in display controller link. Please check this api and change the flag. Rgds, Brijesh + +Hi Brijesh , i know you mean, but i had checked the function DisplayCtrlLink_configureVideoPllAndClkSrcForLCD() in my usecase will be called in chains_common setting Rgds, SJay + +ok, can you change code in DisplayCtrlLink_configureVideoPllAndClkSrcForLCD and see if it works? Rgds, Brijesh + +Hi Brijesh, origin max mn m=1188 n=128 m2=5 change min mn m=297 n=8 m2=20 Finally, this change is work. The display out not jitter anymore. SJay + diff --git a/data2/text/range/0-5000/917080.txt b/data2/text/range/0-5000/917080.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2f3b42f1cecb908fc76acd2cd5b9274ff412e9b --- /dev/null +++ b/data2/text/range/0-5000/917080.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2SX: vector include + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler HI dear TIer, I am working on tda2, vision SDK 3.8 and A 15 works on Linux. I use stl vector in my code, but I don't know how to config to pass the compiling: facedetectcnn.h:53:10: fatal error: vector: No such file or directory #include ... Thanks for your help. + +Responses: +Hi Robert, Can you please give some more details on what you are trying to add? I didn't get what is stl vector and where you are trying to include vector.h . Thanks RamPrasad + +hi I use a 3rd-party face detection algorithm in a usecase. NullSrc->A15 ALgorithm->Display in A15 ALgorithm , I do face detection, and it uses vector . Thanks! + +hi Robert, Which vector.h you are trying to include? I found a vector.h in include/configs/frame of the kernel but this file is empty. Thanks RamPrasad + +Hi , Thanks for your reply. What I want to use is the container vector, both the vector and iostream can't be found. #include #include #include using namespace std; + +Hi, Sorry for the late response. You have to include the header file path in a MAKEFILE.MK file. ex: INCLUDE+= -I$(LINUX_TARGETFS)/usr/include -I$(kernel_PATH)/include/generated/uapi $(OSA_INC) -I$(ipc_PATH)/packages -I$(ipc_PATH)/linux/include -I$($(MAKEAPPNAME)_PATH) Do the same changes for the C++ header file to include in a MAKEFILE.MK. Thanks Gaviraju + diff --git a/data2/text/range/0-5000/917543.txt b/data2/text/range/0-5000/917543.txt new file mode 100644 index 0000000000000000000000000000000000000000..81ab6455c3c0d8f9d68d0c839359243c86a80b5d --- /dev/null +++ b/data2/text/range/0-5000/917543.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2PXEVM: code to select QSPI mode in SBL for TDA2Px could be wrong? + +Query Text: +Part Number: TDA2PXEVM Hi, I am not sure if the code below in the SBL is handling incorreclty the TDA2Px SoC. Basically is taking the same path as the TDA2xx which seems to have an issue with rev. 1.0 and then selecting an slower mode. //code in platform_tda2xx.c uint32_t PlatformGetQspiMode(void) { uint32_t mode; #if defined (SOC_TDA2EX) mode = 0U; #else uint32_t siliconRev = PlatformGetSiliconRev(); if (0U == siliconRev) { /* On ES 1.0 TDA2xx silicon only mode 3 works */ mode = 3U; } else { /* On ES 1.1 TDA2xx silicon both mode 0 & 3 work */ /* Reutrning 0 as it can work at higher frequency */ mode = 0U; } #endif return mode; } I am guessing that the code needs the following fix: ... #if defined (SOC_TDA2EX) || defined (SOC_TDA2PX) mode = 0U; #else ... May anybody confirm if I am right about that? Thanks in advance. Regards, Alexander + +Responses: +Hi Alex, it looks like a bug, let me check and get back to you. Regards, Brijesh + +Hi Brijesh any progress on this? BTW, I have a question related to one comment in that function: ... /* Reutrning 0 as it can work at higher frequency */ ... why is telling that mode 0 is faster than mode 0? AFAIK the SPI clock mode does not affect the speed setup...or is this some specific to TDAx? Regards, Alexander + +Hi, well, I found myself the answer to my question concerning the different clock speeds supported, depending of the QSPI clock mode. It is in the datasheet: I did not see that table before and I was even clocking the QSPI to 128 MHz (and it was working). Since it is working @ 128 MHz, I can imaging that with 96Mhz (10.41nS) is going to work too. But I still would like to hear an official statement from TI that the TDA2Px Rev 1.0 may work in QSPI in mode 0 @ 96 Mhz. Thanks. Regards, Alexander + +Hi Alex, Yes, this is confirmed. It is a bug in the driver. TDA2Px does support Mode0 and Mode3 for QSPI. Rgds, Brijesh + +Thanks a lot for the confirmation Brijesh! Regards, alexander + diff --git a/data2/text/range/0-5000/917906.txt b/data2/text/range/0-5000/917906.txt new file mode 100644 index 0000000000000000000000000000000000000000..f7af855bdb87537610f8d04f8bed4d75f5447be0 --- /dev/null +++ b/data2/text/range/0-5000/917906.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: Running python script for additional proccessing + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: AWR1243 Hi, I am running the TDA2SX board with an AWR1243 attached for cascade radar imaging with the processor SDK radar (RTOS). Is it possible to add a python script within the processing pipeline on the board before being sent through the network to my PC? If not, would it be possible/advisable if I switched to vision SDK on linux instead? Thanks, Stefan + +Responses: +Hi Stefan, We don't have support for python script. What are you trying to do with python script? You can run Linux Vision SDK. However, there is radar processing support, only radar ADC data capture. Regards, Stanley + +Hi Stanley, Thank you for your reply! The idea is to utilize as much of the board as we can by adding additional processing code on it. I'm not sure what type of processing my team would like to do, but it would be easier for them to write this code in Python rather than C. Thanks, Stefan + +Our compiler can only support C/C++ code. + diff --git a/data2/text/range/0-5000/918936.txt b/data2/text/range/0-5000/918936.txt new file mode 100644 index 0000000000000000000000000000000000000000..584df20e6831940d4f0866539db482f97eacde68 --- /dev/null +++ b/data2/text/range/0-5000/918936.txt @@ -0,0 +1,10 @@ +Ticket Name: PROCESSOR-SDK-TDAX: Literature on the difference between opp_nom, Opp_high and opp_low when making PROCESSOR_SDK_RADAR for MMWCAS_DSP_EVM + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Hi, Can anyone point me towards the literature documenting the difference between those three folders mentioned in the title? Thank you + +Responses: +Please refer to ch 5.5 for detail. https://www.ti.com/lit/pdf/sprs951 + +Thank you. + diff --git a/data2/text/range/0-5000/919121.txt b/data2/text/range/0-5000/919121.txt new file mode 100644 index 0000000000000000000000000000000000000000..efc6a9c3bf2b49e6f6c858d761595658bf4d3067 --- /dev/null +++ b/data2/text/range/0-5000/919121.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: How to create a new Node/kernel in openvx framework + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi guys, I'm new to openvx, and I think in TDA2 series, we have the guide to introduce for how to create a new link then combine a new function chain. So in TDA4, do we have any guide to introduce of how to create a new kernel and then package to a new node? Thanks a lot. best regard, Neo + +Responses: +Hello, For OpenVX in TDA4, we recommend using the PyTIOVX tool for developing new kernels. We have an introduction section within our documentation for PyTIOVX below as well as some sample scripts located at tiovx/tools/sample_kernel_wrappers as well as vision_apps/kernels//scripts. While we have a basic documentation guide below, in future releases we will have a video series walking users through basic development using the PyTIOVX tool. In the meantime, please use this forum for any specific questions on how to use this tool. https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tiovx/docs/user_guide/PYTIOVX.html In future releases, we plan on supporting sample application development using the PyTIOVX tool. However, for now, we recommend creating a new application based on existing applications found in vision_apps/apps. Regards, Lucas + diff --git a/data2/text/range/0-5000/919896.txt b/data2/text/range/0-5000/919896.txt new file mode 100644 index 0000000000000000000000000000000000000000..653cc59a05a412858b2fc6904ab30475687c137c --- /dev/null +++ b/data2/text/range/0-5000/919896.txt @@ -0,0 +1,12 @@ +Ticket Name: OpenVX object detection on TDA2XX + +Query Text: +I am trying to make application to recognize traffic signs using OpenVX. Can someone recomend me what functions should I use to recognize object (for example square,triangle, circle) or even help me with some object detection examples so i can modify it? I am using VIsion SDK 03_03_00_00 on TDA2XX chip and I started from your example for Harris corners detection. + +Responses: +Hi, Did you check our TIDL based object detection use cases @ /vision_sdk/apps/src/rtos/usecases/tidl/ in the latest Vision SDK https://www.ti.com/tool/PROCESSOR-SDK-TDAX Thanks, Praveen + +I did, but as I can see in latest Vision SDK is used network (i do not have network access on my TDA2XX) and there are none of OpenVX node functions (for example vxColorConvertNode, vxExtractNode...) I need to make OpenVX program that recognize traffic signs so I would like first to recognize some shapes and than to adapt it to recognize signs. + +There are multiple ways to recognize shapes and there are enough literature available online. Two main approaches are, 1. Computer vision based 2. Deep learning based For either one of them you will have use some of the existing kernels in OpenVx or write your custom kernel. Steps to try are, Narrow down on the approach how you want to recognize a shape? Deep learning approach provides better accuracy these days. Train a network to identify the shapes using TensorFlow/PyTorch/Caffe. Use the TIDL library to import a trained model. Try it standalone on EVM. Then switch to an OpenVx based application which uses TIDL. Regards, Shyam + diff --git a/data2/text/range/0-5000/920099.txt b/data2/text/range/0-5000/920099.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5b35cec270f7782c4f1285ea704a5368e99fae5 --- /dev/null +++ b/data2/text/range/0-5000/920099.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Max Ethernet bitrate + +Query Text: +Part Number: TDA2SX Hi, I am running the TDA2SX board with an AWR1243 attached for cascade radar imaging with the processor SDK radar (RTOS). I'm looking for the maximum bitrate that the TDA2SX is able to output through an ethernet connection to my PC. Thanks, Stefan + +Responses: +Hi Stefan, Sorry for late reply. The TDA2xx throughput numbers are part of NSP data sheet. You can access data sheet @PROCESSOR_SDK_VISION_xx_xx_xx\ti_components\networking\nsp_gmacsw_4_15_00_00\docs\nsp_vayu_datasheet.pdf Regards, Prasad + diff --git a/data2/text/range/0-5000/920708.txt b/data2/text/range/0-5000/920708.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba98da2d3fddfb60b593256de6cb52d04a5ad8d8 --- /dev/null +++ b/data2/text/range/0-5000/920708.txt @@ -0,0 +1,26 @@ +Ticket Name: Compiler/PROCESSOR-SDK-DRA8X-TDA4X: TDA4X kernel quickly start use init-demo.sh + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Tool/software: TI C/C++ Compiler Hi all, we use init-demo.sh on tda2x platform, it can start the kernel quickly without some unnecessary services, so we hope to use similar script like init-demo.sh to start the kernel on the tda4x platform.Is it any scripts fix it? Thanks a lot! Regards, Jason + +Responses: +Hi Jason, Yes, you can use the same script or a similar script even on the TDA4 platform. Regards Karthik + +Hi Karthik, Thanks for your reply, but we know the init-demo.sh must work at falcon mode, could the tda4x work at falcon mode? Regards, Jason + +Hi Jason, From a user space script perspective, it shouldn't matter whether it is falcon mode or not as long as the dependencies are met at the time of execution. If you need additional details, please provide further information on your trials with TDA4. Regards Karthik + +Hi Karthik, I use TDA4VM chip. On tda2xx, we just need to config CONFIG_SPL_OS_BOOT=y in the file u-boot/spl/include/autoconf.mk, so the falcon mode could be enable. But I can't found the file in the folder ~/ti-processor-sdk-linux-automotive-j7-evm-07_00_00/board-support/u-boot-2020.01+gitAUTOINC+f9b0d030d3-gf9b0d030d3 ,please tell me how to enable the falcon mode in the TDA4VM. Regards, Jason + +Hi Jason Currently our SDK does not support falcon boot mode on TDA4VM. Hope this answers your question. - Keerthy + +Hi Keerthy, Thanks for you help, would it be supported in the future?For the kernel started so slowly, we need to start it quickly. Regards, Jason + +Hi Keerthy, I tried to set the falcon mode like TDA2, so I added CONFIG_SYS_SPL_ARGS_ADDR=0x82f80000 and CONFIG_SPL_OS_BOOT=y to the j721e_evm_a72_defconfig file, and set the environment variables like this: setenv falcon_image_file Image; setenv falcon_args_file single-stage-boot.dtb; setenv boot_os 1; and I put the single-stage-boot.dtb and Image files in the BOOT partition, but an error is reported when running boot: spl: falcon_args_file not set in environment, falling back to default spl_load_image_fat_os: error reading image args, err--2, and there are falcon_args_file=single-stage-boot.dtb and falcon_image_file=Image in the environment variables, I don’t know why it can’t be found. Anyway, if the falcon mode wouldn't be supported on the TDA4VM in the future, how could we started the kernel as quickly as on the TDA2X? Regards, Jason + +Hi Jason, TDA4 Boot architecture different compared to TDA2: Refer Section: 3.1.1.2.3 Link: http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components_U-Boot.html#general-information So first we boot with the R5 SPL which in turn get ATF(Arm Trusted Firmware) on A72 followed by OPTEE & only then we get to A72 SPL Followed by A72 u-boot. Enabling falcon mode on TDA4 will not be same as TDA2. Hence i kindly advise you to not try based on TDA2. I will get back on the availability of falcon mode in the future releases. Best Regards, Keerthy + +Hi keerthy, Thanks very much for you help.Our project needs to be applied to falcon mode of the kernel as soon as possible, like using init-demo.sh to start apps.out on TDA2X. We hope to receive further information from you. If there is any information, please tell me through this issue, or send an email to huangjiasheng@yihang.ai to inform me about how to obtain the release package including the availability of falcon mode. Thanks. Best Regards, Jason + +Hi Jason, There is a rtos based bootloader called SBL(Secondary boot loader). There is a way to jump from SBL to Linux which is a sort of falcon mode: One can jump from SBL to kernel Image. The next release PSDKRA 7.1 will have this supported. Hope you can resolve this. - Keerthy + diff --git a/data2/text/range/0-5000/921374.txt b/data2/text/range/0-5000/921374.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ce34dac8c59b9392e2412545fabfd8b474f66a5 --- /dev/null +++ b/data2/text/range/0-5000/921374.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2/TDA3 TIDL: Pooling layer error + +Query Text: +We use TIDL convert caffe models(*.prototxt + *.caffemodel)，the tidl_log.txt display the following information: TIDL algInit returned with error -1048! ============================= TIDL ERROR! ============================== Pooling layer error, invalid stride width! My SDK version is PROCESSOR_SDK_VISION_03_08_00_00. I refer to the documentation "TIDeepLearningLibrary_UserGuide.pdf": Spatial Pooling Layer – Average and Max Pooling are supported with stride 1, 2, 4 and kernel sizes of 2x2,3x3,4x4 etc. STOCHASTIC Pooling not supported. My *.prototxt ，the "Pooling" layer, the stride have "stride: 2" and "stride: 4", the kernel_size have "kernel_size: 3" and "kernel_size: 5", all of these accord with TIDL Limitation content "Pooling are supported with stride 1, 2, 4 and kernel sizes of 2x2,3x3,4x4 etc." So ,why appear the above error message? tidl_log_pooling_error.rar + +Responses: +Hi, Max Pooling are supported with stride 1, 2, 4 in Height direction, but Width wise only stride 1, 2 are supported. That is the reason you are getting this error. Sorry for the confusion, this is not clearly mentioned in the user guide. Thanks, Praveen + diff --git a/data2/text/range/0-5000/921588.txt b/data2/text/range/0-5000/921588.txt new file mode 100644 index 0000000000000000000000000000000000000000..6598ab45d6ea981e9866817edfd20262402eb66d --- /dev/null +++ b/data2/text/range/0-5000/921588.txt @@ -0,0 +1,8 @@ +Ticket Name: SAT0089 Muti - deser datasheet + +Query Text: +Other Parts Discussed in Thread: DS90UB914A-Q1, DS90UB913A-Q1 Hello All, Currently, I am working on SAT0089, SAT0088 deser-ser. I am referring below link for schematic and other stuff. I cannot find datasheet here. Can TI provide datasheet for this boards http://support.spectrumdigital.com/boards/sat0088_0089/ + +Responses: +Hello Swati, These boards are designed by Spectrum Digital, not TI so if you want information about the boards you must contact Spectrum Digital. It looks like these boards use these TI parts: DS90UB913A-Q1 and DS90UB914A-Q1 The datasheets for those parts are here: https://www.ti.com/lit/gpn/DS90UB913A-Q1 https://www.ti.com/lit/gpn/DS90UB914A-Q1 + diff --git a/data2/text/range/0-5000/921827.txt b/data2/text/range/0-5000/921827.txt new file mode 100644 index 0000000000000000000000000000000000000000..0a539b707e8da15009b05a2c78ac0dbaa9fb87a1 --- /dev/null +++ b/data2/text/range/0-5000/921827.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2SG: TDA2 power supply + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi， We are not using the USB function of TDA2 What will happen if we turn off this power supply of TDA2 after the SOC completes the power-on sequence? VDDA33V_USB1 & VDDA33V_USB2 + +Responses: +Hello, You should not turn off that power supply. Turning it off can damage the SoC. Regards, Kyle + +Hi，Kyle Another question: The PMIC power to the MPU through SMPS1 and SMPS2. Under normal circumstances, the port SMPS should continue to output 2MHz switching waveform, but sometimes we find that the switching frequency is stagnant, as shown in the figure ： We are worried that this method will affect the RE, so I would like to consult which PMIC registers can be improved or optimized？ + +Hello, Where are you probing for that waveform ... can you show both SMPS1 and SMPS2 waveforms separately? Thanks, Kyle + +Hi，Kyle The test points and oscilloscope waveform are as follows： Thanks, + +Hello, That's expected operation. Here is a quote from the PMIC Datasheet: In dual-phase configuration the two interleaved synchronous buck regulator phases with built-in current sharing operate in opposite phase. In triple-phase configuration the three interleaved synchronous buck regulator phases with built-in current sharing operate 120° out of phase. For light loads, the converter automatically changes to 1-phase operation. Regards, Kyle + +Hi，Kyle What kind of damage may occur to SOC? Is it possible that the SOC power consumption is abnormal? Which document describes this content? thanks + +Hello, Can you summarize the background for your question? Are you wanting to intentionally turning off that supply and why? Or is it some type of system fault that leads to that supply turning off? Thanks, Kyle + diff --git a/data2/text/range/0-5000/922273.txt b/data2/text/range/0-5000/922273.txt new file mode 100644 index 0000000000000000000000000000000000000000..7cb5c0e30420f0c21b47962074c13767ec1d0c36 --- /dev/null +++ b/data2/text/range/0-5000/922273.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2SG: [TDA2] Does an usecase contain IVA H.264 Encode & H.264 Decode Link ? + +Query Text: +Part Number: TDA2SG Tool/software: Code Composer Studio Hi, We have an usecase to encode H.264 video output to network & sometimes receive the H.264 video from network to decode it for display. Do we need to consider anything or any limitation ( such as the encode & decode cannot work simultaneously ) No matter RTOS or Dual OS (RTOS + Linux) Thank you !! Regards, Eten + +Responses: +Hi, You can use encode & decode links simultaneously but the limitation is 1) Both links can support 1080P@30FPS for a single channel. 2) Both links can support 7200P@30FPS for a four-channel. You can go through the following use-case for reference.(In this use-case both links are used) "vision_sdk/apps/src/rtos/usecases/vip_single_cam_view_encdec" Thanks Gaviraju Both links can support 1080P@30FPS for a single channel. + diff --git a/data2/text/range/0-5000/922691.txt b/data2/text/range/0-5000/922691.txt new file mode 100644 index 0000000000000000000000000000000000000000..f13958f7d51914f5d6a8767c9306c58a5c5faced --- /dev/null +++ b/data2/text/range/0-5000/922691.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EXEVM: Flashing Utility - mflash: flashing the binary images to QSPI Flash memory using the UART interface for the TDA2xx Boards. + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: X5777BX, X5777BXGABC, TDA2 Hi, We are working flash binary image via UART interface on the TDA2X Vision board. The board information as following: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] FVID2 Version : [FVID_02_01_00_01] BSP Version : [PDK_01_10_03_xx] Platform : [EVM] SOC : [TDA2XX] SOC Revision : [ES2.0] Board Detected : [Vision] EEPROM Board Info Header Mismatch!! Base Board Revision : [REV A] Daughter Card Revision: [REV D] As the user guide of Appnote_mflash (pg#2), we configured the SYSBOOT (SW2 &SW3 ) & BOOT_SWITCH (SW5) switch SW2[0:7], SW4[8:15] to [11001000][10000001] and SW5 to [0000100000] At the same time, I setup a serial connection (115200, 8/Even/1 , no flow control) by Tera term on PC side . But I don't receive any "AL!" chars from UART on TDA2XX board even though power reset for several times. Could you help teach me how to solve the issue ? Thanks. ps. I could burn successfully flash image via ccs. BRs, Sam Hsieh + +Responses: +Hi, The mflash user-guide mentioned "With correct settings, it should continuously display AL! on the TeraTerm for TDA3xx. The printed characters may vary for different platforms." For the TDA2xx platform, it can display anything & when you connect the USB cable from the board to PC, it will show multiple COM ports. So try to connect each COM port & make sure the correct port you are going to use for flashing the images. Thanks Gaviraju + +Hi Gaviraju, Thank you for your feedback. I confirmed that the connection of COM port via USB cable to PC is OK. Even though I add a USB hub between PC and TDA2xx board, the result is same FAIL. BRs, Sam Hsieh + +Hi Gaviraju, As for the connection, we connected TDA2x with PC via UART1 interface (J1 connector). Because the message of boot from SD mode could work fine. The COM port configuration of PC side should be OK. regards, Sam Hsieh + +Hi, I followed the steps mentioned in the user-guide & I saw the below character on the UART console. @D(▒ @▒▒ Can I know which application are you using to view the UART console? I mean TeraTerm or MobaxTerm or Minicom or Putty, etc. I used Mobaxterm & I'm getting expected output in the terminal. So please try with different applications. Thanks Gaviraju @D(▒ @▒▒ + +HI Gaviraju: Could you provide the soc number , I was used x5777BX(TDA2xx), But I can not see the messages(AL!AL!AL!.....) from UART. Thanks, Ethan + +XC5777x TDA2xx + +Hi Gaviraju: Our chip is X5777BXGABC. May be the part number. Can not support the function. Could you track the part number ? Thanks, + +Hi Gaviraju, We used Putty and TeraTerm application to verify it, both the same phenomenon (NG). I don't think which it results from the different application. We are worried about the TDA2XX EVM board doesn't support the feature of mflash due to the micro-code of TDA2XX (X5777BXGABC) is out-of-date. or we made a mistake in the configuration of SYSBOOT (SW2 &SW3 ) & BOOT_SWITCH (SW5). Could you help confirm the following questions ? Thanks. Q1. Does it TDA2XX (X5777BXGABC) support the mflash feature? Q2. Is the DIP SW configuration OK? BRs, Sam Hsieh + +Hi Gaviraju, I uesed mflash to burn my code, TDA2 is crash and hold. [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [PC] Requesting the ASIC ID [RBL]4 [RBL]1 [RBL]5 [RBL]1 [RBL]56 [RBL]41 [RBL]7 [RBL]2 [RBL]13 [RBL]2 [RBL]1 [RBL]0 [RBL]12 [RBL]15 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]14 [RBL]21 [RBL]1 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [RBL]0 [PC] Requesting PERI_REQ mode [PC] Sending SBL_MFLASH filesize. [PC] Size of sbl_mflash = 69477 [PC] Sending SBL_MFLASH... Please wait [PC] File Size = 69477 [PC] ## [PC] Transfer Complete. Time = 1.000 [PC] Opening port for sbl_mflash. Baud = 12000000 Parity = 0 StopBits = 0 ByteSize = 8 [PC] Opening serial port successful. + +Hi, I will check with my teammate's whether "x5777BX" board will support mflash or not & I will update you soon. The previous issue is resolved? I mean printing the character "AL!" continuously. Basically mflash tool used to flash the images to the QSPI memory & this can be done using CCS & JTAG. So why don't you make use of this method? Thanks Gaviraju + diff --git a/data2/text/range/0-5000/922776.txt b/data2/text/range/0-5000/922776.txt new file mode 100644 index 0000000000000000000000000000000000000000..6b081e9174f533d0788269a3fc941b5abbdb290c --- /dev/null +++ b/data2/text/range/0-5000/922776.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SA: How to save multi-cam videos to files? + +Query Text: +Part Number: TDA2SA Hi, My custom board is tda2xx and use VSDK3.07 running on linux. I want to capture 2 cameras and save the frames to SD card. The similar usecase is : lvds_vip_multi_cam_vpe_enc_null After test this usecase, I always only get one file that have frame in it. The other file is empty. I'm sure the 2nd lvds camera have data in. the multi cam usecase link is: Capture -> VPE -> Encode -> Null (A15) I got the null link in vision_sdk/links_fw/src/hlos/links_a15/null/nullLink_tsk.c if (pObj->createArgs.dumpDataType == NULL_LINK_COPY_TYPE_FILE) { /* File Write enabled for channels only from first inputQ (Q0) */ for (chId=0; chIdinQueInfo[0].numCh; chId++) { Vps_printf(" NULL LINK: Opening file for Dump \n"); pObj->fpDataStream[chId] = fopen((char *)pObj->createArgs.nameDataFile[chId], "wb"); OSA_assert(pObj->fpDataStream[chId] != NULL); Vps_printf(" NULL LINK: Opened file for Dump \n"); } } Does it mean only one camera could save to file? Please help me to store multi camera videos to files. Thanks. + +Responses: +Hi, Have done the proper Null link configuration in the use-case? I'm expecting the below changes in the use-case. Example: pUcObj->NullPrm.dumpDataType = NULL_LINK_COPY_TYPE_BITSTREAM_FILE; strncpy(pUcObj->NullPrm.nameDataFile[0], "/home/stream0.mpeg", 260U); strncpy(pUcObj->NullPrm.nameDataFile[1], "/home/stream1.mpeg", 260U); strncpy(pUcObj->NullPrm.nameDataFile[2], "/home/stream2.mpeg", 260U); strncpy(pUcObj->NullPrm.nameDataFile[3], "/home/stream3.mpeg", 260U); Thanks Gaviraju + +Hi Gaviraju, I have check this usecase on D3 platform and it can store multi videos files. Thanks. Terry + diff --git a/data2/text/range/0-5000/923405.txt b/data2/text/range/0-5000/923405.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1ca9a31434ee0edb8a3b4f0f51a228da52d9911 --- /dev/null +++ b/data2/text/range/0-5000/923405.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2P-ACD: MIPI CSI Internal termination + +Query Text: +Part Number: TDA2P-ACD Hi, We need quick information with respect to TDA2Px, In SoC, there will be single 4-lane MIPI CSI and single 2 lane MIPI. But the internal termination details are not available in documents. Could you please help me for the termination, we need to take care of externally? Warm regards, Alwin Mathew + +Responses: +Hi Alwin, I am checking with our board design team. Looking at our board designs, it would appear termination is not required. The traces CSI-2 differential pairs do require 100ohm differential impedance. The receiver input impedance spec is found in Table 5-9. LVCMOS CSI2 DC Electrical Characteristics of the data sheet. Regards, Mike + +Hi Alwin, The processor already has built-in termination, so all you need to do is implement your layout and PCB stackup to maintain the 100-ohm differential impedance. Regards, Mike + diff --git a/data2/text/range/0-5000/923809.txt b/data2/text/range/0-5000/923809.txt new file mode 100644 index 0000000000000000000000000000000000000000..fcc6795c5c59b9f288fd5a290d531d10c96d6331 --- /dev/null +++ b/data2/text/range/0-5000/923809.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/TDA2PXEVM: TDA2PX DCAN configuration + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi TI team, I am trying to send and receive CAN data wit DCAN module but there is some issues I am facing. Vision sdk : PROCESSOR_SDK_VISION_03_07_00_00(BIOS) Hardware : TDA2PX-ACD EVM customer board. I have set 'DCAN_INCLUDE=yes' in file 'PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\configs\tda2px_evm_bios_all\cfg.mk' and compiled. I also changed the pinmux refer to this link https://e2e.ti.com/support/processors/f/791/t/893425 ,we can find those register value as below information and I tried two cases to confirm DCAN state: 1.#define ENABLE_B2B_DCAN_TEST (1U) in file "PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\src\rtos\modules\dcan\system_dcan.c" I can not find any CAN data TDA send to bus and we failed to send CAN data to TDA , register value as below: " [HOST ] 71.383639 s: CTRL_CORE_PAD_DCAN1_TX Reg: 60000 [HOST ] 71.383639 s: CTRL_CORE_PAD_DCAN1_RX Reg: 60000 [HOST ] 71.383639 s: CM_WKUPAON_DCAN1_CLKCTRL Reg: 2 [HOST ] 71.383669 s: DCAN_CTL Reg: 21420 [HOST ] 71.383669 s: DCAN_ES Reg: 7 [HOST ] 71.383669 s: DCAN_TEST Reg: 0 [HOST ] 71.383700 s: GPIO1 Reg: 50602001 [HOST ] 71.383700 s: CTRL_CORE_CONTROL_SPARE_RW Reg: 0 " 2.#define ENABLE_B2B_DCAN_TEST (0U) in file "PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\src\rtos\modules\dcan\system_dcan.c" I can receive CAN message followed TDA configuration but can not send CAN data to TDA. " [HOST ] 11.385408 s: CTRL_CORE_PAD_DCAN1_TX Reg: 60000 [HOST ] 11.385408 s: CTRL_CORE_PAD_DCAN1_RX Reg: 60000 [HOST ] 11.385408 s: CM_WKUPAON_DCAN1_CLKCTRL Reg: 2 [HOST ] 11.385438 s: DCAN_CTL Reg: 214A0 [HOST ] 11.385438 s: DCAN_ES Reg: 8 [HOST ] 11.385438 s: DCAN_TEST Reg: 100 [HOST ] 11.385469 s: GPIO1 Reg: 50602001 [HOST ] 11.385469 s: CTRL_CORE_CONTROL_SPARE_RW Reg: 0 " according above two cases , I think TX pin configuration is done and RX pin looks not good , but I can not find where is the root cause . I am not sure above modification are sufficient. could you please help me to look into this issue and give me a bit of advice ? by the way , I tested those two cased on develop board which from TI and it shown me same issue. Thanks a lot. Best Regards. Lan. + +Responses: +Hi, Can you please set '#define ENABLE_B2B_DCAN_TEST (1U) ' and send a message from TDA? Once the message is sent (successful/unsuccessful), please send me the DCAN register dump. While doing the above, please make sure that solution from 'https://e2e.ti.com/support/processors/f/791/t/893425' is applied. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hi Vivek, Thanks for your reply. We updated out soc to TDA4 and stopped developing on TDA2. anyway , thanks for your reply. Best regards. Lan. + diff --git a/data2/text/range/0-5000/923873.txt b/data2/text/range/0-5000/923873.txt new file mode 100644 index 0000000000000000000000000000000000000000..403447dfdf74e812f38f8dc36158ec23acacc394 --- /dev/null +++ b/data2/text/range/0-5000/923873.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: How to change display resolution dynamically at run time? + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 We use TDA2. We want to change display resolution dynamically at run time. How can I do ? + +Responses: +Hi, Do you mean to change DSS output resolution or input resolution? Typically output resolution cannot be changed, you will need to stop display and then only it can be chagned.. Input resolution can be changed, you just need to call driver ioctl SET_DSS_PARAMS to change input resolutions.. Rgds, Brijesh + +Hi Brijesh: We want to change DSS output resolution at run time. My step: 1. DisplayLink_drvStop(pObj); 2. change dssPrms->tarHeight parameter and then call FVID2_control API. FVID2_control( pObj->displayHndl, IOCTL_VPS_DISP_SET_DSS_PARAMS, &pObj->dssPrms, NULL); 3. DisplayLink_drvStart(pObj); And display will not work normally. How can I solve it? Joe + +Hi Joe, This does not change output resolution from DSS, ie LCD output resolution. This just restarts the pipeline, also please note that target resolution is not the output resolution from LCD. it is output resolution of this pipeline on the overlay manager.. Rgds, Brijesh + diff --git a/data2/text/range/0-5000/924718.txt b/data2/text/range/0-5000/924718.txt new file mode 100644 index 0000000000000000000000000000000000000000..69dea9999b48835f035568e6d5c238d0f089156c --- /dev/null +++ b/data2/text/range/0-5000/924718.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: TDA2EVM5777 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi Everyone, Could any one please help me in understanding what is the Machine learning framework used by the Linux TIDL image classification demo. + +Responses: +Hi, The image classification models in the demo are trained using Caffe-Jacinto framework and they are available in the below GitHub repository. https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/image_classification/imagenet_jacintonet11v2 Thanks, Praveen + +Hi Praveen, Currently I am using psdk_rtos_auto_j7_06_02_00_21 package, Could you please located the where to refer image classification demo using cafe jacinto and also provide me a documentation link to understand it better if you have some. + +Hi, Do you want demos for TDA2 or TDA4 device because thread subject says TDA2 but you are using J7 (TDA4) package ? Thanks, Praveen + +Hi Praveen, Thanks for the reply. I want a TIDL image classification demo for TDA4 J7, Did you have any demo source and build instructions available with you? Currently I could not able to understand the demo source structure but only be able to run the image classification demo over Linux boot and invoking the demo using a the script. But could not able to understand what is the deep learning framework model used i.e; caffe jacinto or tensor flow, how it is getting imported etc. The main requirement of mine to develop and train a deep learning model using TIDL which senses numbers from 0 to 100. + +Hi, You can refer following documentation : http://downloads.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos_auto/docs/user_guide/developer_notes_tidl.html?highlight=demo Regards, Anshu + diff --git a/data2/text/range/0-5000/924901.txt b/data2/text/range/0-5000/924901.txt new file mode 100644 index 0000000000000000000000000000000000000000..4d2c92109a7fb1227520e2186bb8b47c6cd48db2 --- /dev/null +++ b/data2/text/range/0-5000/924901.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2SX: NDK helloWorld example + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi, TI experts! I want to run NDK helloWorld example on TDA2 custom board. I found the example on path: PROCESSOR_SDK_RADAR_03_08_00_00\ti_components\networking\nsp_gmacsw_4_16_01_01\packages\ti\ndk\tda3xx\examples_ipu1\helloWorld. I sucessfully builded this example and tried to run it on TDA2 custom board on IPU1_0 core. Example was run but in ccs console i can't found any messages with ip adress, mac or any error. What could be my mistake? How can i change correctly this example for my custom board? + +Responses: +Also I tried another example from: PROCESSOR_SDK_RADAR_03_08_00_00\ti_components\networking\nsp_gmacsw_4_16_01_01\packages\ti\ndk\vayu\examples_ipu1\helloWorld I run it on EVM5777 board and still nothing on the ccs console. + diff --git a/data2/text/range/0-5000/925940.txt b/data2/text/range/0-5000/925940.txt new file mode 100644 index 0000000000000000000000000000000000000000..12346e5ac6daaa78f4b4753cf6ee0a88fc38272d --- /dev/null +++ b/data2/text/range/0-5000/925940.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: Why is the header file name and type of this reference different from that of your demo? + +Query Text: +Part Number: TDA2SX Why is the reference header file name and type different from demo? I used the gentool you provided to generate this file (errors are reported at compile time and can only be compiled after manually changing it to be the same as your file). What is the reason for this? This is your demo. This is automatically generated by gentool. The compiler will report errors. SDK is th V3.06 and path is "vision_sdk\apps\src\hlos\adas\src\usecases\vip_single_cam_opencvcanny_sgx_display". + +Responses: +Hi, I have forwarded your question to respective team and they will reply here. Thanks, Praveen + +Hi, Thanks for the update. The auto-generation tool is not updated & you can update the "link.cpp" then rebuild the code to get an updated auto-generation tool. Thanks Gaviraju + +After I update gentool, the compiled code will prompt you about the use error of OpenCV library. After consulting the forum, it seems that opencv is not supported. If opencv is not supported by sdk v3.06, I will not enable opencv's usecase in the future.Would you like to confirm it with you? + +Yes, openCV & OpenCL is deprecated from vision SDK Thanks Gaviraju + diff --git a/data2/text/range/0-5000/926717.txt b/data2/text/range/0-5000/926717.txt new file mode 100644 index 0000000000000000000000000000000000000000..eff8fbb3a6d3d924cdb7461ec01f976f354a6606 --- /dev/null +++ b/data2/text/range/0-5000/926717.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS/TDA2EVM5777: CCS/TDAEVM577 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi export: How to update software via USB. Thanks, + +Responses: +Hi Jemy, Can you please add details on what is the question here? What SW is it that you need to update? Is it flashing/loading SW to the TDA2 EVM? Regards, Karan + diff --git a/data2/text/range/0-5000/927002.txt b/data2/text/range/0-5000/927002.txt new file mode 100644 index 0000000000000000000000000000000000000000..2f24cef310f244b1a07d04c73ceda7942d38bc42 --- /dev/null +++ b/data2/text/range/0-5000/927002.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2SG: TDA4 UBOOT is compatibility the TDA2S UBOOT + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, can I use TDA4 UBOOT replace the TDA2S UBOOT + +Responses: +Hi Zhangsc, The UBOOT for TDA2S will not have support for TDA4 SoCs. Regards, Karan + +Hi Zhangsc, TDA2 had just MLO(SPL) & u-boot.img both running on A15. TDA4 has tiboot3.bin which contains R5 SPL followed by tispl.bin which is the A72 SPL and finally u-boot.img which is A72 u-boot. So as Karan responded they are entirely different. Best Regards, Keerthy + +what is the version of the uboot thanks. + diff --git a/data2/text/range/0-5000/927124.txt b/data2/text/range/0-5000/927124.txt new file mode 100644 index 0000000000000000000000000000000000000000..6223fbc6449fa2635ae03ac1d8acdc8e2acb10ee --- /dev/null +++ b/data2/text/range/0-5000/927124.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2E: TDA2x Lane detection algorithm + +Query Text: +Part Number: TDA2E 1.We call the API lane detect to draw the lane.The draw lane seems doesn't coincide with the actual lane but cross. So Is that a question of algorithm itself or icalling parameters? How to fix it? 2.And we found Lane detection algorithe call the api AlgIvision,but we can't see this api's defination. So is there any references about it?Can it be modified? Thanks! + +Responses: +Hi, Can you please add details on which SDK you are using? Regards, Karan + +Hi Our VSDK version is 3.06 and Lane detection version is 00.02.03.00. + +Hi, The algorithm source code is not available in the vision-SDK & we used the library. The line detection demo use-case is already available in the vision SDK, so why don't you make use of it instead of creating your own use-case? use-case path: vision_sdk/apps/src/rtos/usecases/vip_single_cam_lane_detection Thanks Gaviraju + diff --git a/data2/text/range/0-5000/927505.txt b/data2/text/range/0-5000/927505.txt new file mode 100644 index 0000000000000000000000000000000000000000..3d130474fc696283dfea7bec85b86e75d121568d --- /dev/null +++ b/data2/text/range/0-5000/927505.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EXEVM: How to use ACF+Adaboost related API for inference in TDA2? + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I have referred to "github.com/.../acf-jacinto" and trained a FaceDetection cascade model using Matlab. So next how could I used the generated model to do the reference in TDA2? Is there any usecase (.e.g using this method for object detection) provided by Vision SDK so that I could refer to it? Thank you! + +Responses: +Hi, I will check with TIDL team & get back. Thanks Gaviraju + +Hi Gaviraju, Thank you and look forward to your reply! + +Hi, Please refer to the below demo use-case for reference. vision_sdk\apps\src\rtos\usecases\tidl vision_sdk\apps\src\rtos\usecases\tidl_OD vision_sdk\apps\src\rtos\usecases\semSeg file: vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_TI_DeepLearning.pdf Thanks Gaviraju + diff --git a/data2/text/range/0-5000/927924.txt b/data2/text/range/0-5000/927924.txt new file mode 100644 index 0000000000000000000000000000000000000000..2eafb863ba96c9cbafdcd69a8800ec7cade67cb8 --- /dev/null +++ b/data2/text/range/0-5000/927924.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2EG-17: TDA2E How to find the UUID of TDA2x + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 hi.master Do tda2x and tda4x have UUID? How to find the UUID of TDA2x ?How to get tda4x TDA2x UUID? Is the UUID of each SOC unique？ + +Responses: +Hello, Yes, the TDA2x and TDA4x have a unique "DIE ID". This is described in the TRM Table 1-2. DIE_ID. Regards, Kyle + +Hello, How to read tda4x/tda2x TDA2x DIE ID in linux? + +Hi, devmem2 0x4AE0C200 w Should give you the die-id for tda2.in Linux. As suggested by Kyle refer to the section for the physical address and use devmem2 tool in Linux to read physical address. Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/928169.txt b/data2/text/range/0-5000/928169.txt new file mode 100644 index 0000000000000000000000000000000000000000..b0a4bcb6d346862f0bf150b2c3130717b8e31eaa --- /dev/null +++ b/data2/text/range/0-5000/928169.txt @@ -0,0 +1,14 @@ +Ticket Name: TIDEP-01017: An error occurred when the number of sample points was set to 512 [ cascade_radar_beam_form] + +Query Text: +Part Number: TIDEP-01017 In the example of Cascade_radar_beam_form, the following error occurred when modifying the Chirp parameter to set the sample points to 512 [IPU1-0] 14.243518 S: CAPTDRv/SRC/VPSDRV_capturecore.c@line 643: [IPU1-0] 14.243610 s: Core control: Set Max Frame Size failed [IPU1-0] 14.243701 S: Line: 395 in capturelink_drV. C: Status == FVID2_SOK: Failed!! The setting of sample points to 511 can be set successfully, I have read the documentation and forums and mentioned that the maximum number of sample points is 512, and why the example of Cascade_radar_beam_Form sets the sample points to 255 instead of 256, and The example of Cascade_radar_object_detect to 256 However, with the same configuration parameters, I used mmWavestduio to configure successfully and collect ADC data + +Responses: +Hello, As you mentioned the maximum number of sample points is 512, i.e starting from 0 to 511 (Total count = 512). Similar is the case with 256 sample points as well. The parameters start from 0 and hence end at 255 or 511, making the count as 256 or 512 respectively. Let us know if you have more questions. Thanks! Regards, Ishita + +Hi Ishita , First of all, thank you for your answer. But I'm a little confused by your answers and the comments on the code, which are as follows： It is explained in the annotation that the maximum number of sampling points for Chirp is 1024. If the number of sampling points is 1024, the actual configuration should also be 1024. Due to the limitation of FPGA in TDA2-DSP, the maximum width is 512, so the maximum can only be configured with 512. In addition, Bsp_ar12xxGetWidthHeight(UInt32 deviceId, UInt32 *width, UInt32 *height) is calculated with metaDataLen included when calculating the width size. The length of metaDataLen is exactly equal to a sampling point (metaDataLen = 2U * numRxAntenna), the metaData data is CP (Chirp Parameter information), if so, it can be understood that the maximum number of points can only be 511.But using mmWavestudio is configurable to 512 points and frame data may not contain CP data, so where can the example Cascade_radar_beam_form modification be without CP Thanks and Regards + +Please change this code in radar\src\common\chains_common_cascade_ar12xx_config_bf.c file gAr12xx_bf_config_master{ .transferFmtPkt0 = (rlUInt8_t) 6, /* change this to '1' for ADC only instead of CP_ADC_DATA */ Same for slave configuration (gAr12xx_bf_config_slave_DevIdxMap2) Regards, Jitendra + +hi Jitendra, Your answer has solved my problem, Thank you very much. Regards, CSBoy + diff --git a/data2/text/range/0-5000/929050.txt b/data2/text/range/0-5000/929050.txt new file mode 100644 index 0000000000000000000000000000000000000000..a24b42a0c969eb51ee86dc088dad7f86def50a4e --- /dev/null +++ b/data2/text/range/0-5000/929050.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: caffe model compression and quantition + +Query Text: +Part Number: TDA2SX whether the TDA2S importTool can process the NCNN converted caffe model files + +Responses: +Hi, No, it won't support. Please refer to "TI Deep learning Library Datasheet" for supported model types and supported layers. Thanks, Praveen + diff --git a/data2/text/range/0-5000/929363.txt b/data2/text/range/0-5000/929363.txt new file mode 100644 index 0000000000000000000000000000000000000000..17ab9b5334445afe6558107fb78009b406be4604 --- /dev/null +++ b/data2/text/range/0-5000/929363.txt @@ -0,0 +1,12 @@ +Ticket Name: CCS/TDA2EVM5777: CCS/TDAEVM577 suspend/ wakeup + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Code Composer Studio Hi export: My production is base on battery power. I had see the https://e2e.ti.com/support/processors/f/791/t/682517?TDA2-Power-management-LPM-standby-and-wakeup-support-for-TDA2XX docutment, But I am not clear to merge the code into my code. Could you more clear to implement the function. I am use PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk. Thanks, Jemy + +Responses: +Jemy, CPU Idle is enabled by default in Vision SDK. In the idle task, CPU clock will be idled. This is power management provided in Vision SDK. Regards, Stanley + +Stanley: I can not find how to into suspend & wakeup programing point. Could more detail for this. prefer have a same code. Thanks, + +We don't have the support for suspend / wakeup in PM SW in Vision SDK. The lowest power state we support is CPU idle. For CPU idle, you can refer to ~/ti_components/drivers/pdk_xx_xx_xx/packages/ti/drv/pm/examples/cpuidle. Regards, Stanley + diff --git a/data2/text/range/0-5000/929371.txt b/data2/text/range/0-5000/929371.txt new file mode 100644 index 0000000000000000000000000000000000000000..bb46ebb68666f06f93f18793a58b0d3f72b9113f --- /dev/null +++ b/data2/text/range/0-5000/929371.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2HG: How many eves available in TDA2HG? + +Query Text: +Part Number: TDA2HG Hi One question puzzles me that how many eves are available in TDA2hg series? I found 4 eves availabe in TDA2xx and only 2eves availabe in TDA2hg from VisionSDK_data_sheet. However,4 eves defined when creating own usecase.when i check cpu load information,every eve's utilization over 75%. So,whether there is overclocking if there are only 2 eves? + +Responses: +Hi, Only 2 EVE is available in the TDA2HG. Can you share the custom use-case chain? Thanks Gaviraju + +Hi here is the chain: Defination: /* TIDL on EVE1 */ pUcObj->Alg_tidl_Eve1Prm.cacheInvInBuf = 0; pUcObj->Alg_tidl_Eve1Prm.cacheWbOutBuf = 0; pUcObj->Alg_tidl_Eve1Prm.pAlgCreateParams = pObj->pAlgCreateParams; pUcObj->Alg_tidl_Eve1Prm.curCoreId = TIDL_COREID_EVE1; pUcObj->Alg_tidl_Eve1Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE1; pUcObj->Alg_tidl_Eve1Prm.ocmcAddr = OCMC_3_BASE_ADDRESS; #endif /* TIDL on EVE2 */ pUcObj->Alg_tidl_Eve2Prm.cacheInvInBuf = 0; pUcObj->Alg_tidl_Eve2Prm.cacheWbOutBuf = 0; pUcObj->Alg_tidl_Eve2Prm.pAlgCreateParams = pObj->pAlgCreateParams; pUcObj->Alg_tidl_Eve2Prm.curCoreId = TIDL_COREID_EVE2; pUcObj->Alg_tidl_Eve2Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE2; pUcObj->Alg_tidl_Eve2Prm.ocmcAddr = OCMC_3_BASE_ADDRESS;//OCMC_3_BASE_ADDRESS + (OCMC_3_SIZE/2); pUcObj->Alg_tidl_Eve2Prm.ocmcAddr = OCMC_3_BASE_ADDRESS + (OCMC_3_SIZE/2); /* TIDL on EVE3 */ pUcObj->Alg_tidl_Eve3Prm.cacheInvInBuf = 0; pUcObj->Alg_tidl_Eve3Prm.cacheWbOutBuf = 0; pUcObj->Alg_tidl_Eve3Prm.pAlgCreateParams = pObj->pAlgCreateParams; pUcObj->Alg_tidl_Eve3Prm.curCoreId = TIDL_COREID_EVE3; pUcObj->Alg_tidl_Eve3Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE3; pUcObj->Alg_tidl_Eve3Prm.ocmcAddr = OCMC_1_BASE_ADDRESS; /* TIDL on EVE4 */ pUcObj->Alg_tidl_Eve4Prm.cacheInvInBuf = 0; pUcObj->Alg_tidl_Eve4Prm.cacheWbOutBuf = 0; pUcObj->Alg_tidl_Eve4Prm.pAlgCreateParams = pObj->pAlgCreateParams; pUcObj->Alg_tidl_Eve4Prm.curCoreId = TIDL_COREID_EVE4; pUcObj->Alg_tidl_Eve4Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE4; pUcObj->Alg_tidl_Eve4Prm.ocmcAddr = OCMC_2_BASE_ADDRESS; + +Hi, This is expected output & when we run default TIDL_OD use-case in TDA2XX platform having 4 EVE core, we can see the 90% of CPU Load with below configuration inputWidth=768 inputHeight=320 inputFile=inData_OD inputHDRFile=inHeader_OD netFileName=tidl_net_jdetNet_ssd.bin paramFileName=tidl_param_jdetNet_ssd.bin fps=30 threshold=0.3 Thanks Gaviraju + +Hi I got it. Thaks a lot . Z.Y Wang + diff --git a/data2/text/range/0-5000/929511.txt b/data2/text/range/0-5000/929511.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d2bdc9a56dff446f300ccacb2bac20bb8177b30 --- /dev/null +++ b/data2/text/range/0-5000/929511.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2SX: How to config DSS Vout1 output BT656 YUV422 8bit? + +Query Text: +Part Number: TDA2SX Dear TI, On our custom board, we need to output BT656 YUV422 8-bit signal from Vout1 port. And we tried to config the software as attached file. The right signal can't be output via Vout1 port. The pixel clock seems incorrect, and the HDMI monitor no signal display. Could you please help check this issue asap? Thank you very much! Thanks & Best Regards! wxHow to config DSS output BT656 YUV422 8bit.pdf + +Responses: +Hi Wade, I think first you need to check why pixel clock is not correct. are you setting correctly in the application? How much is it different when you measured it? Also for which resolution, are you trying to enable BT656 output? Rgds, Brijesh + +Dear Brijesh, Thanks for you quickly response. More detail info please see the attached file. Current issue is, when we set the pixel clock to 74.25MHz in BT656 mode, the dss driver will throw out error. Thanks wx + +Hi Wade, But which PLL and which LCD output are you using? What error is it returning? Can you share part of code? Rgds, Brijesh + +Hi Brijesh, We had fixed this issue, it is case by two reason. One is the LCD is not support 720p30 signal input. Another is the output timing is not correct. Today, we have another issue, the custom LCD need external sync signal, but now the output of DSS is embed sync signal. How to config the DSS to output YUV422 witch external sync signal? wade + +Hi Brijesh, Can you receive my reply? wade + +Hi Wade, Please refer to the application node: https://www.ti.com/lit/an/sprac16a/sprac16a.pdf. The same mechanism is used to get YUV over separate sync output. You could need to treat input YUV as RGB565 and get the RGB565 output over 8bit interface and that's how you could get BT601 output from TDA device. Regards, Brijesh + diff --git a/data2/text/range/0-5000/929600.txt b/data2/text/range/0-5000/929600.txt new file mode 100644 index 0000000000000000000000000000000000000000..6a2c063c5948283c7aae6ab0ce32cf6e4e798f01 --- /dev/null +++ b/data2/text/range/0-5000/929600.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EXEVM: Expansion Interface Details + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 I need to use TDA2 for a custom application utilizing 3-5 mcasp interfaces, I am trying to see if it's possible to use one of the existing EVM and attach my custom design through the existing expansion interfaces but I can't find the details of the interface for TDA2EX-17 or TDA2EX in the user guide, it only mentions it's for specific application?! does this mean it's only usable for TI's expansion boards!? can you provide these document?! + +Responses: +Hi, I will check with an expert, get back asap. + +Hello, You'll need to check the schematics to see what's pinned out on the connectors. Regards, Kyle + diff --git a/data2/text/range/0-5000/931012.txt b/data2/text/range/0-5000/931012.txt new file mode 100644 index 0000000000000000000000000000000000000000..a4a8523793fa327e8108df8b6a3f848a9c391a38 --- /dev/null +++ b/data2/text/range/0-5000/931012.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2SG: TDA2S eth0 link is not work well + +Query Text: +Part Number: TDA2SG Tool/software: TI C/C++ Compiler HI , I　use the rgmii1 port connect to BCM89811,and my dts is like this, DTS: &mac { status = "okay"; dual_emac; }; &davinci_mdio { status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; I set the command "ifconfig eth0 192.168.208.110 up" then look the kernel message: [ 70.109299] net eth0: initializing cpsw version 1.15 (0) [ 70.109315] net eth0: initialized cpsw ale version 1.4 [ 70.109325] net eth0: ALE Table size 1024 [ 70.116837] net eth0: phy found : id is : 0xae025022 [ 70.123702] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready why my eth0 is link is not well wrok? + +Responses: +[ 0.568411] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 0.570203] libphy: Fixed MDIO Bus: probed [ 0.616776] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 0.616787] davinci_mdio 48485000.mdio: detected phy mask fffffffe [ 0.618852] libphy: 48485000.mdio: probed [ 0.618865] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown [ 0.619440] cpsw 48484000.ethernet: Detected MACID = 38:81:d7:73:ec:6a [ 0.619536] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 0.620208] cpsw 48484000.ethernet: cpsw: Detected MACID = 38:81:d7:73:ec:6b [ 0.621538] i2c /dev entries driver [ 0.626342] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 0.632771] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 0.639367] evm_1v8: supplied by smps9 [ 0.677266] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 0.718626] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@99000000 [ 0.718678] remoteproc0: 55020000.ipu is available this is my kernel message about mdio. + +Hi ，now I can link up eth1 ，how can I set the link 100Mbps/Half (now is 10Mbps) my log is : [ 17.875266] net eth1: initializing cpsw version 1.15 (0) [ 17.875299] net eth0: initialized cpsw ale version 1.4 [ 17.875309] net eth0: ALE Table size 1024 [ 17.882989] net eth1: phy found : id is : 0xae025022 [ 17.889122] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 23.879044] cpsw 48484000.ethernet eth1: Link is Up - 10Mbps/Half - flow control off [ 23.879129] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready + +Have you tried ethtool to change the speed/duplexity ? Regards Vineet + diff --git a/data2/text/range/0-5000/931272.txt b/data2/text/range/0-5000/931272.txt new file mode 100644 index 0000000000000000000000000000000000000000..190c7f5a880c833d27fba57689ed154b6f3bb118 --- /dev/null +++ b/data2/text/range/0-5000/931272.txt @@ -0,0 +1,30 @@ +Ticket Name: TDA2HG: [OpenGL RGB ] What's the effect way to exchange the RGB data + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi: we're working on visonsdk 3.08 ,recently, we integrate the transparent bottom feature of AVM, that we need to save the parts render texture by FBO. as the FBO is RGB texture, we use the YUV by glEGLImageTargetTexture2DOES and use export DMA to share data between ARM and GPU. per my understanding that RGB FBO and yuv texture can not be rendering together, that we have to change the yuv input from rgb input that all FBO and texture are same format if we change the YUV input from RGB input, then what's the efficent way to exchange the image data between arm and GPU？ Thanks + +Responses: +Hello, You can use YUV texture and render to RGB output. Are you facing any problems with rendering to RGB? Regards Hemant + +Hi Hemant: Hemant Hariyani said: You can use YUV texture and render to RGB output yes， it's ok to do that, but later we need to render the YUV and RGB together as the camera input is YUV, that sound impossible. so we expect the convert the camera yuv to rgb by ourself, and then render all textures with RGB. in yuv we can use dmafd to exchange the data between CPU and GPU, and how about the RGB data? + +Hello, Apologies for the late response. If you use YUV texture using TEXTURE_EXTERNAL_OES, the shader will receive RGB. This way, everything can be treated as RGB. Regards Hemant + +Hi Hemant: Thanks! when OpengGL do converting the YUV to RGB, in glbind? or in shader program? + +Hello, The conversion should happen in hardware when texture data is fetched by the shader code. Regards Hemant + +Thread is unlocked now. + +hi Karthik: thanks for unlocking. but i still don't understand how is the fbo usage; how can i create fbo and write NV12 format texture into the fbo? would you reply it? thanks. + +YUV is input only. You can create an RGB fbo and use OpenGL ES to read YUV as an external texture. This will convert YUV to RGB. You will have to create an eglmage with EGL_LINUX_DMA_BUF_EXT and provide dmabuf parameters for NV12 Y/UV planes. Please note that the GPU cannot output YUV. If that is a requirement, you will have to "trick" the GPU and process YUV as two planes - Y plane as a single channel texture and UV plane as a dual channel texture. From GPU and application perspective, this is not YUV any more - you are just dealing with components (e.g R component and RG component). Hope this helps. Regards Hemant + +You can create an RGB fbo and use OpenGL ES to read YUV as an external texture. This will convert YUV to RGB. You will have to create an eglmage with EGL_LINUX_DMA_BUF_EXT and provide dmabuf parameters for NV12 Y/UV planes. ---------------------------------------------------------------------------------------------------------------------------------------------------------------------- I have a question about create RGB fbo: create an RGB fbo: I still need to create an eglmage with EGL_LINUX_DMA_BUF_EXT and provide dmabuf parameters for RGB planes, is right? And i do like that. But the eglCreateImageKHR returned EGL_BAD_MATCH when I set EGL_LINUX_DRM_FOURCC_EXT attribute as FOURCC_STR("AR24"); Is the TDA2 don't support "AR24"? or RGB format use other FOURCC_STR? my sdk version is 3.06. if don't support ,do you have any other method? thanks + +Hello, Are you still facing this issue? The suggestion was to create a YUV (NV12) EGLImage. Regards Hemant + +Hello, In addition, Can you please look at the code here for reference? There are some examples on how to use YUV. You can refer to util/display-kmscube.c https://git.ti.com/cgit/glsdk/omapdrmtest/ Regards Hemant + +thanks for replying, i have already resolved it about three or four month ago. + diff --git a/data2/text/range/0-5000/931557.txt b/data2/text/range/0-5000/931557.txt new file mode 100644 index 0000000000000000000000000000000000000000..3c7471ce787fe0c943d2dec84312f249dcba219a --- /dev/null +++ b/data2/text/range/0-5000/931557.txt @@ -0,0 +1,8 @@ +Ticket Name: PROCESSOR-SDK-TDAX: Update on Processor SDK Radar Version for AWR2243 + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TIDEP-01012, AWR2243, TDA2 Hi, I have posted about this in the past, but I am wondering when there will be a Processor SDK Radar release that supports AWR2243. I have been trying to work with the newest version of the TIDEP-01012 device w/ AWR2243 sensors for months now and have had to resort to makeshift patches provided on here by TI representatives/other forum members. These patches get the board returning data, but I have no clue just how reliable it is or what functionalities are missing. Last time I asked about a new version, I was told to "stay tuned" or "keep an eye out", but it has been months since then with no support for the 2G radar chips yet. I'm starting to wish you guys had just sent me the older version of the cascaded radar board. Please have someone that is directly working on this release version respond to this post, as last time I had a wide range of conflicting responses. Thanks, Jake + +Responses: +Jake, There is currently no update planned for the Radar SDK package for TDA2 with AWR2243 so we do not have a target date. There is support for the 2G radar devices with mmWave Studio - https://www.ti.com/tool/MMWAVE-STUDIO Best regards, Dave + diff --git a/data2/text/range/0-5000/931969.txt b/data2/text/range/0-5000/931969.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d3cbc2ecbcaa4da0bdc65835740b21a5d6734b6 --- /dev/null +++ b/data2/text/range/0-5000/931969.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA4VMXEVM: TIVXDisplayCallBack is not call + +Query Text: +Part Number: TDA4VMXEVM Tool/software: TI C/C++ Compiler Hi, I add log in the "TivxDisplayCallBack " and i run the demo run_app_tidl.sh ok. 1.why the display callback funtion is not run ？ In TDA2s the chains & links ,The Display's callback funtion will call . 2.how can I get Capture & display run status.(In tda2s , i can see the callback of capture & display) + +Responses: +Hi Zhangsc, If display is running, display callback always get called. Just like TDA2x, TDA3x, there is a similar feature on TDA4x to enable periodic callback. This feature is by default enabled, so callback will always be called, whenever display is enabled.. Rgds, Brijesh + +my version is 0602 ,but i cannot see rhe add log in.the display callback. can you test it. + +But is your display running fine? Do you see any numbers for the entire graph? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/932464.txt b/data2/text/range/0-5000/932464.txt new file mode 100644 index 0000000000000000000000000000000000000000..682d093fd5e75f3ea62ac3dd77112356acd60618 --- /dev/null +++ b/data2/text/range/0-5000/932464.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2SX: How to use VIP BT1120 on TDA2? + +Query Text: +Other Parts Discussed in Thread: TDA2SX art Number: TDA2SX Hi, My requirement is 1920*1080P、30fps、3ch(VIP2 S2 A、VIP3 S1 A、VIP3 S2 A) SDK : PROCESSOR_SDK_VISION_03_05_00_00 usecase : Chains_lvdsVipMultiCam_Display decoder : techpoint TP2824 * 2 Q1: How to set in the orange box in the second picture below For example, if I use 25fps, do I need to modify the fps parameter? Q2: I have seen channel 2(vout 6) but other channels only have black screens First, I modified the PINMUX and Capture parameters as shown below: C:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\drv\vps\src\boards\src\bsp_boardTda2xx.c And then i modify the VidSensor_CreateParams below: C:\PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\video_sensor\src\vid_sensor.c vcaptureSrc = CHAINS_CAPTURE_SRC_OV10635 vChainsCommon_MultiCam_StartCaptureDevice v=> vChainsCommon_SetVidSensorPrms v=> vChainsCommon_SetVidSensorMultiOV10635Prms C:\PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\usecases\common\chains_common_vision.c 8 bits changed to 16 bits have an impact Result Capture link can capture 30 frame + +Responses: +Hi YiTing, From the capture links stats, three channels are already being captured at 30fps rate. Which means, capture is working fine. You need to check your rest of the data flow and see where other 2 channels are dropped. Regards, Brijesh + +Hi Brijesh, Thanks for your reply. To ensure the chain simple that I only use capture link to display link. I use funtion"chains_lvdsVipMultiCam_Display_SwitchDisplayChannel" to check that the rest of the data flow is all black screens. In multi-channel capture, if I can capture one channel, other channels are also set correctly? I just want to confirm whether bt1120 is set correctly. Regards, YiTing + +Hi YiTing, Atleast from the stats, it looks like all channels are getting captured at 30fps. Can you try saving a frame from each channel and analyze it offline? Also Can you please check VIP size register to see if VIP detects correct size for each channel? Rgds, Brijesh + +Hi Brijesh, I don’t understand what the analysis frame means Do you need me to analyze the pixels in the display link frame? I will check VIP size register within two days Regards, YiTing + +Hi YiTing, I wanted you to save a captured frame and view it offline to see if the captured frame is correct and is not black.. Regards, Brijesh + +Hi Brijesh, How to save frame in the CAPTURELINK, do I need to add Link like null link ? + +Hi YiTing, One way is, you could put break-point on CaptureLink_drvProcessData API and then run the code upto line 758. Once you get pFrame (Fvid2_Frame), you could get the buffer address from pFrame->addr[0][0] and from that address, you could dump the memory from CCS memory window. Rgds, Brijesh + +Hi Brijesh I will tyr the break-point tomorrow. Regards, YiTing + diff --git a/data2/text/range/0-5000/933115.txt b/data2/text/range/0-5000/933115.txt new file mode 100644 index 0000000000000000000000000000000000000000..ced971f6cc61c91ec974b625ea1115ecacfffbf7 --- /dev/null +++ b/data2/text/range/0-5000/933115.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2SX: emmc firmware burning problem + +Query Text: +Part Number: TDA2SX Hi，I got a tda2sx board and do product development on it. The sdk package version is processor_sdk_vision_03_07_00_00. My firmware has been compiled and passed, and the system can be started via sd. But I don’t know how to burn the firmware to emmc and start from emmc.I didn’t find any documentation about this. Can you tell me how to flash the firmware to emmc? Thank you！ + +Responses: +Hi, Run the below script from the target in SD boot mode 7345.mk-eMMC-boot.zip Thanks Gaviraju + +Hi Gaviraju Using this script, I have successfully burned the firmware into emmc and started it, thank you very much. I saw the USB flashing method, in the link you posted above,used usbboot tool. I want to know the implementation mechanism of usbboot tool, can the source code be developed? Thanks！ + +HI, No one responded to my question, why? + +Hi, Those steps are not tested in vision SDK Linux, so can I know your requirement? based on the requirement, we can give some suggestions. Thanks Gaviraju + +Hi, I want to modify the source code of usbboot tool to make a win system burning tool. Thanks. + +Thanks Gaviraju + +Thanks Gaviraju！ + +Hi, Why can't I access this link? + +Hi Yan, The link got accidentally deleted, please find a snapshot of the link that you are trying to access, we will have it restored shortly. Regards Karthik /cfs-file/__key/communityserver-discussions-components-files/791/Processor-SDK-Linux-Automotive-Software-Developers-Guide.pdf + diff --git a/data2/text/range/0-5000/934114.txt b/data2/text/range/0-5000/934114.txt new file mode 100644 index 0000000000000000000000000000000000000000..b2e2621cf25d993fb916c56a02325126ced72473 --- /dev/null +++ b/data2/text/range/0-5000/934114.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SA: Why the D2 and D3 of DSS Vout1 can't output signals? + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Dear TI, We made a new TDA2 board, and found the D2 and D3 pin of DSS Vout1 are broken on some board. 1. We measured the impedance of those pins. The impedance value of good one is about 6.7K, the impedance value of bad one is about 2R. 2. We tried to config the D2 and D3 to GPIO, they can't be controlled to switch to high level or low level. 3. The D2 and D3 pins are only connected to DS933 chip. 4. The D4~D9 are good, not be broken. Could you please help to analyze this issue? Why the D2 and D3 are broken, other pins are ok? wade + +Responses: +Wade, Can you summarize how many boards you've tested - how many pass vs fail? Is it always D2 and D3 that fail at the same time? Is the schematic for D2 and D3 the same as the other D4-D9 IOs? How are you testing the PCBs during manufacturing? Do you perform ICT or BSDL style testing? Thanks, Kyle + +Hi Kyle, We made four boards at the first time. Two of them are OK. Two of them are NG. The case of NG boards are same, only D2 and D3 are abnormal. There is no difference of the connection of D2~D9. About the NG board, we remembered it is ok before. But we can't understand why they become abnormal. The connection of D2~D9 as below: TDA2X Dx ----> 22ohm resistor -----> D90UB933 Dx wade + +Hello Wade, Can you elaborate on what is "abnormal" about those IOs? Are they wiggling at all? Can you put those pins (and neighbors) into GPIO mode, and test if you can see them go high and low? If it was working before and is no longer working I would guess that some form of damage has occurred. Is there any cable or outside influence that can be mistreated? Thanks, Kyle + +Hi Kyle， Yes, in GPIO mode, the pin also can't go high and low. We will plan to make more new boards to check. Thanks a lot! wade + diff --git a/data2/text/range/0-5000/934743.txt b/data2/text/range/0-5000/934743.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3de3ad891bd7d750cbc476a9f6d792d1ae580a1 --- /dev/null +++ b/data2/text/range/0-5000/934743.txt @@ -0,0 +1,21 @@ +Ticket Name: Packet loss + +Query Text: +Hello, Here's the description of the issue - Application/Usecase : HDMI display & Video streaming using RTP(real Time Protocol) with single camera at 30fps & Bit Rate: 10Mbps Processor & Framework : TDA2Px - Vision SDK 3.3 with ndk_2_25_01_11 & nsp_gmacsw_4_15_00_00 version Pipeline : Usecase : RTP - UDP - IP - NDK2NSP - GMAC (This is processed A15 core) NDK settings : Modified "NdkConfigGlobal.memRawPageSize = 64*1024;" from in NDK_config.cfg Modified "NDK_DATA_SIZE = 16*MB" from 4KB in file mem_segment_definition_bios.xs Modified "#define MMALLOC_MAXSIZE ((64 * 1024) - 4)" from 3KB in file pbm.c Implementation of RTP was a requirement from our customer. RTP protocol has been implemented and integrated in the VSDK. RTP implementation is simple, for bitrates of 5mbps & 10mbps - 15 packets/slices & 17 packets/slices with a size of ~7K(<8k) are sent sequentially in a burst. Socket options/parametes : AF_INET, SOCK_DGRAM, ipTTL=15, maxBufLen=65500U The video streaming works fine with 5 Mbps(bit rate) at 30fps. But in the case of 10mbps(bit rate) with 30 fps. We have observed last 2 IDR slices are lost on the wireshark i.e. last 2 sequence numbers are missing. After adding a delay of 2 ms just before sending the packets to cpdma driver, observed there are no slices lost on the wireshark but the frame rate drops to 17fps. Also noticed the delta is high and skew is also increased downwards from the wireshark logs. Do let us know if you need more information and any insights will be highly appreciated. Could you help us with network stack benchmarking information for the Tx ? Thanks. + +Responses: +Hi, I will check with an NDK expert then let you know. Thanks Gaviraju + +Hi Gaviraju, Kidnly let us know if you have any updates. Thanks, Pramod + +Hi, You can try to increase number of packets allocated for TX to if that helps. In nsp_xx_xx_xx_xx\packages\ti\nsp\drv\ndk2nsp\ndk2nsp.h, /* + * Packet count of packets given to the hardware. We should use twice this number + * for the number of packets maintained + */ +/*RX packets to be kept 128 to account for DUAL MAC and TFDTP enabled case*/ +#define NDK2NSP_RX_PACKETS (128U) +#define NDK2NSP_TX_PACKETS (64U) + +#define NDK_RX_PACKETS (NDK2NSP_RX_PACKETS * (uint32_t)2U) + You can increase NDK2NSP_TX_PACKETS from 64 to 128. + diff --git a/data2/text/range/0-5000/936578.txt b/data2/text/range/0-5000/936578.txt new file mode 100644 index 0000000000000000000000000000000000000000..9bdacd0a597a9f2f4950de443a244c03d1a54806 --- /dev/null +++ b/data2/text/range/0-5000/936578.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2EVM5777: how to improve latency on TIDL(SSD) application? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi experts: I developed my application by using tidl(SSD) to detect object on image and followed the default TIDL use-case for SSD application on RTOS. After dumping message from TDA2-evm-board, i noticed that the TDA2-evm-board was running on 27-fps but the latency was up to 173ms (average latency time from capture to display link). Full log from TDA2-board is here:latency-log.txt i'm wondering: 1. why does the 27-fps speed have 173 ms latency? why the latency is not 1000/27=37 ms? 2. how to improve latency down to 1000/30=33 ms? Please comment, Thank you. Best / regards wxchen + +Responses: +Hi, .1) why does the 27-fps speed have 173 ms latency? why the latency is not 1000/27=37 ms? In VSDK all links are running parallel & because of this, you are able to achieve 27FPS. suppose if all the links are running sequentially then FPS = 1000/173 FPS = 5 2) how to improve latency down to 1000/30=33 ms? it's not possible because the TIDL link itself taking around 130ms to process Thanks Gaviraju + +Hi, Thanks for your response. I'm curious about the 130ms you mentioned. How does the 130ms come? Is it limit of SSD-model running on TDA2 platform? Thanks Best / regards wxchen + +Hi, The time is taken by the TIDL algorithm is 130ms to process one frame In order to reduce the latency, you should optimize the TIDL algorithm & the source code of these algorithms is not available in the vision SDK(We used library in vision SDK). Please check with the TI sales team to get the source code. Thanks Gaviraju + +Hi, I believe that the TIDL algorithm had been optimized by TI's RnD team. Is there another idea to reduce latency? Thanks, Best / Regards Wxchen + +No other way to reduce the latency. + +Hi, Thanks for your response. In addition, you said "optimize the TIDL algorithm" in your previous post. I'm wondering what should I optimize? In my intuition, I should optimize the tidl on EVE to process convolution-like operations. Is it correct? Or you mean that I should optimize the SSD's network architecture or others? Thanks. Best / Regards Wxchen + +Hi Wxchen, The tidl on EVE is already fully optimized, you can try optimizing your SSD network architecture. Thanks, Praveen + +Hi, Thanks for your response. I'm using jacintoV2 network currently. Do you have any suggestion/experience for optimizing SSD network architecture? Thanks. Best / Regards Wxchen + +Hi Wxchen, You can either reduce the resolution or train your SSD network with less complex backbone networks like mobile net v1 with a depth multiplier 0.25 Currently, we do not have a pre-trained network example for such models in SDK. Regards, Kumar.D + +Hi: Thanks for your response. I will try to decrease SSD network architecture according to your advises. However, I wanna ask for tda2's hardware: 1: Is it possible to boost the clock rate in EVE-core to improve latency? if yes, how to do that? any suggestion for doing that? 2: On the other hand, as far I know, ti's tda4 platform is going to release, 2-1: is that platform capable to reach 1000/30=33ms latency time in jacintoSSD network application? 2.2: is that platform using the same VSDK to tda2's plaform? Thanks, Best / Regards Wxchen + +Hi Wxchen, 1. No, as EVE core already clocked at max capacity so no further increase is possible. 2. Yes, but tda4 comes with new sdk, please read more about tidl in tda4 here https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tidl_j7_01_02_00_09/ti_dl/docs/user_guide_html/md_tidl_models_info.html Thanks, Praveen + diff --git a/data2/text/range/0-5000/937715.txt b/data2/text/range/0-5000/937715.txt new file mode 100644 index 0000000000000000000000000000000000000000..beddc8503fda1a46f99d9d41248867ec835a2193 --- /dev/null +++ b/data2/text/range/0-5000/937715.txt @@ -0,0 +1,10 @@ +Ticket Name: 编译器/ TDA2SX： I have some questions about yocto compilation + +Query Text: +Part Number: TDA2SX Tool/software: TI C / C ++编译器 Hi,I builded a Yocto file system, compiled with the version of psdkla-V3.4.However, two tasks have been unpacking, and they have not been completed for about 3 days.How should I solve it? log is here.Thanks. # ./build-core-sdk.sh dra7xx-evm [PSDKLA]> [PSDKLA]> Current Directory is /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers [PSDKLA]> PATH is /usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/snap/bin:/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/ [PSDKLA]> Building on hirain-PowerEdge-R740 running Linux hirain-PowerEdge-R740 4.15.0-29-generic #31-Ubuntu SMP Tue Jul 17 15:39:52 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux [PSDKLA]> Starting Yocto build at Fri Sep 4 09:55:46 CST 2020 [PSDKLA]> [PSDKLA]> cd build [PSDKLA]> . conf/setenv [PSDKLA]> cp conf/local.conf conf/local.conf.pristine [PSDKLA]> MACHINE=dra7xx-evm bitbake -k tisdk-rootfs-image NOTE: Started PRServer with DBfile: /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 42837, PID: 28823 Loading cache: 100% |############################################################################################################################| ETA: 00:00:00 Loaded 2849 entries from dependency cache. NOTE: Resolving any missing task queue dependencies Build Configuration: BB_VERSION = "1.30.0" BUILD_SYS = "x86_64-linux" NATIVELSBSTRING = "Ubuntu-18.04" TARGET_SYS = "arm-linux-gnueabi" MACHINE = "dra7xx-evm" DISTRO = "arago" DISTRO_VERSION = "2016.12" TUNE_FEATURES = "arm armv7a vfp thumb neon callconvention-hard" TARGET_FPU = "hard" meta-glsdk = "HEAD:66cfd8ef55344508d6e7b306259f34c05b828194" meta-arago-distro meta-arago-extras = "HEAD:4c01410ffde8853224567fb6078d7d9f190b942f" meta-qt5 = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f" meta-networking meta-ruby meta-python meta-oe = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e" meta-ti = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93" meta-linaro-toolchain meta-optee = "HEAD:2f51d38048599d9878f149d6d15539fb97603f8f" meta = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d" NOTE: Preparing RunQueue NOTE: Executing SetScene Tasks NOTE: Executing RunQueue Tasks ERROR: automake-1.15-r0 do_compile: oe_runmake failed ERROR: automake-1.15-r0 do_compile: Function failed: do_compile (log file is located at /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/automake/1.15-r0/temp/log.do_compile.28877) ERROR: Logfile of failure stored in: /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/automake/1.15-r0/temp/log.do_compile.28877 Log data follows: | DEBUG: SITE files ['endian-little', 'bit-32', 'arm-common', 'arm-32', 'common-linux', 'common-glibc', 'arm-linux', 'arm-linux-gnueabi', 'common'] | DEBUG: Executing shell function do_compile | NOTE: make -j 16 | : && /bin/mkdir -p doc && { PATH='/home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/automake/1.15-r0/build/t/wrap:'$PATH && export PATH; } && /usr/bin/perl ../automake-1.15/doc/help2man --output=doc/automake-1.15.1 automake-1.15 | help2man: can't get `--help' info from automake-1.15 | Try `--no-discard-stderr' if option outputs to stderr | Makefile:3687: recipe for target 'doc/automake-1.15.1' failed | make: *** [doc/automake-1.15.1] Error 255 | WARNING: /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/automake/1.15-r0/temp/run.do_compile.28877:1 exit 1 from 'exit 1' | ERROR: oe_runmake failed | ERROR: Function failed: do_compile (log file is located at /home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/automake/1.15-r0/temp/log.do_compile.28877) ERROR: Task 6172 (/home/xiaomiao.yang/psdkla_03_04_00_03/yocto-layers/sources/oe-core/meta/recipes-devtools/automake/automake_1.15.bb, do_compile) failed with exit code '1' Currently 2 running tasks (4157 of 7428): 0: ti-cgt-arm-native-16.9.2-r0 do_unpack (pid 28868) 1: ti-cgt-pru-native-2.1.4-r0 do_unpack (pid 28871) + +Responses: +Hi, The details on this post should help you to resolve the problem: https://e2e.ti.com/support/processors/f/791/p/712340/2625408#2625408 Regards Karthik + +Hi Karthik Ramanan Thank you for the reply.Your solution is very effective. + diff --git a/data2/text/range/0-5000/939107.txt b/data2/text/range/0-5000/939107.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7cabe97c0b458050fd4e421321fb3af19f88491 --- /dev/null +++ b/data2/text/range/0-5000/939107.txt @@ -0,0 +1,18 @@ +Ticket Name: BEAGLE-3P-BBONE-AI: BEAGLE-3P-BBONE-AI,Processor Name :AM5729 + +Query Text: +Part Number: BEAGLE-3P-BBONE-AI AM5729 I am working with Beaglebone AI, which has its CLOUD 9 IDE, and the software tool is TIDL with OpenCL and c++ wrappers. My question is - In the neural network models implemented using TIDL, How do measure the host and co-processor runtime/execution time separately? Using what concept? In general OpenCL code like vecadd (vector addition) , I was able to make used profiling events to measure the runtime, but I have no idea how to do the same with imagenet or ssd_multibx codes. Please help... + +Responses: +Hi Kavya, checking inside Linux PSDK filesystem /usr/share/ti/tidl/ I see there are some TImeStamps, and a GetProcessTimeMiliSeconds() functions in utils.cpp. I haven't personally use them, but I see there is a test TIDL example which use ReportTime(). Please take a look as probably you could use them for your purpose. thank you, Paula + +As you can see in the figure, I couldn't find the utils.cpp file in tidl folder. How do I get the Linux PSDK file system, by the way, I am using Windows OS should I shift to LINUX OS? + +Hi Kavya, I gave you the upper level folder, utils.cpp is actually inside tidl_api/src/ thank you, Paula + +Yes i understand, but the src folder under tidl_Api itself doesnt exit.. + +Hi Kavya, I am not familiar with Debian image for BBAI. One option is to get Linux PSDK image/SDK from below link (at least as a reference): http://software-dl.ti.com/processor-sdk-linux/esd/AM57X/latest/index_FDS.html hope this helps, Paula + +Thank You. + diff --git a/data2/text/range/0-5000/939326.txt b/data2/text/range/0-5000/939326.txt new file mode 100644 index 0000000000000000000000000000000000000000..007142abb368abb89bfb03e06d9aa3dd354b8b87 --- /dev/null +++ b/data2/text/range/0-5000/939326.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: some question about tda4 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi: I was using TDA2 platform to develop object detection(ssd-jacinto) application, but by my testing (link), the model latency run on TDA2 platform will be above 130 ms (27-fps) which not satisfied my requirement (less than 1000/30 ms). However, my boss ask me evaluating the TDA4 platform, so a few question below: 1. Did anyone test/verify ssd-jacinto model on TDA4 platform? 2. How about ssd-jacinto model latency time running on TDA4 platform? 3. Is TDA4 platform capable of running ssd-jacinto model above 30-fps? 4. What is SDK supporting the TDA4 platform? Thanks Best / Regards + +Responses: +You can find a lot of TDA4 resources here: https://www.ti.com/product/TDA4VM (Including specifications, application notes and information about software). Specifically, information about SDK is here: https://www.ti.com/tool/PROCESSOR-SDK-DRA8X-TDA4X Information about training Deep Learning Models (including Semantic Segmentation, Object Detection etc) is here: https://github.com/TexasInstruments/jacinto-ai-devkit We provide training examples and scripts for training SSD and RetinaNet object detectors using the repository pytorch-mmdetection. We also have scripts to export the model into a format (.onnx and .prototxt) that TIDL can understand. I hope this information helps you to get started. + diff --git a/data2/text/range/0-5000/939840.txt b/data2/text/range/0-5000/939840.txt new file mode 100644 index 0000000000000000000000000000000000000000..2b9014d75fc9e9adb5b5af63638d87f0644b40a1 --- /dev/null +++ b/data2/text/range/0-5000/939840.txt @@ -0,0 +1,24 @@ +Ticket Name: BEAGLE-3P-BBONE-AI: AM5729 + +Query Text: +Part Number: BEAGLE-3P-BBONE-AI Hi, I am trying to compile and run ssd_multibox with a video clip, but I am faced with this error. Any suggestions?. I have tried installed gnome but nothing seems to work. Unable to init server: Could not connect: Connection refused (Segmentation:1401): Gtk-WARNING **: 02:30:18.466: cannot open display: + +Responses: +Hi Kavya, have you tried to run "/etc/init.d/weston start" before running ./ssd_multibox? If not please try and let me know. thank you, Paula + +Hi, I tried that just now. The weston file is not present in the file. + +Hi Kavya, you might need to get assistance from BBAI/Debian open source community. As probably this is a difference between our Linux PSDK and Debian filesystems.. One suggestion, if you don't mind, would be to create an SD card with our Linux PSDK image and give a try to OBB demos there.. Link to download PSDKL and with links to SD creation steps below: http://software-dl.ti.com/processor-sdk-linux/esd/AM57X/latest/index_FDS.html thank you, Paula + +thank you, this helps. + +Do you use CCS IDE itself or Cloud9, in order to use the PSDK? + +Hi Kavya, neither, we use makefiles and Linux dbg capabilities... thank you, Paula + +Hi Kavya, one more point... I actually also use Eclipse or VS code to debug/develop some applications. The methodology is to build in debug and then import executable. In this way, I can (for some applications) been able to step into the code, see variables, use memory browser, etc. Hope this helps, Paula + +Are there any sources for that? if you did, please share. + +Kavya, There should be plenty of resources - articles/videos etc if you search for debugging with Eclipse and/or VS code. I suggest that you search for it and get familiarized. Regards Karthik + diff --git a/data2/text/range/0-5000/942573.txt b/data2/text/range/0-5000/942573.txt new file mode 100644 index 0000000000000000000000000000000000000000..415188e69fc13381c3f8e35db2ca62c7c5cef6c5 --- /dev/null +++ b/data2/text/range/0-5000/942573.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EG-17: TDA2EG-17: Split time for H.264 encode + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Hi, I try to make DVR use case on TDA2 platform. Record capture to h.264 file by Encode link. I using system command to get 1 minute file. System_linkControl(chainsObj.ucObj.NullLinkID, SYSTEM_CMD_STOP, NULL, 0, (Bool)TRUE); System_linkControl(chainsObj.ucObj.EncodeLinkID, SYSTEM_CMD_STOP, NULL, 0, (Bool)TRUE); System_linkControl(chainsObj.ucObj.EncodeLinkID, SYSTEM_CMD_START, NULL, 0, (Bool)TRUE); System_linkControl(chainsObj.ucObj.NullLinkID, SYSTEM_CMD_START, NULL, 0, (Bool)TRUE); But only first file will be normal. Other files can not play on PC (VLC media player) How to split h.264 encode result ? Thanks. + +Responses: +Hi, Please refer to the below thread Thanks Gaviraju + +Hi Gaviraju, It's working. Result codes System_linkControl(chainsObj.ucObj.NullLinkID, SYSTEM_CMD_STOP, NULL, 0, (Bool)TRUE); EncLink_ChannelInfo params; params.chId = 0; System_linkControl(chainsObj.ucObj.EncodeLinkID, ENC_LINK_CMD_SET_CODEC_FORCEI, ¶ms, sizeof(EncLink_ChannelInfo), (Bool)TRUE); System_linkControl(chainsObj.ucObj.NullLinkID, SYSTEM_CMD_START, NULL, 0, (Bool)TRUE); Thanks. Jay + diff --git a/data2/text/range/0-5000/945987.txt b/data2/text/range/0-5000/945987.txt new file mode 100644 index 0000000000000000000000000000000000000000..74d84749bb2c20959bcfa1e23b2d7349d6aaf561 --- /dev/null +++ b/data2/text/range/0-5000/945987.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA4VM: [TDA4] How to disperse (assign) computing power for each core ? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, Expert : I'm studying TDA4 code programming for ADAS applications. follow this site, I can know the concept for IPC communication between each core. software-dl.ti.com/.../developer_notes_ipc.html but I still feel confuse this point : "How to disperse (assign) computing power for each core ?" I try to studying vision_app sample code (EX:tidl_object detection), this app use C66_1/C66_2/C7X, how to assign work for each core? software-dl.ti.com/.../group_apps_dl_demos_app_tidl_od.html same problems for main R5f core. any hit? Many Thanks. + +Responses: +Hi Gibbs, Need a clarification to understand your question better - how to disperse(assign) computer power for each core - the question is more about the CPU usage (MHz) rather than the power (Watt)? Is that understanding correct and can you consider expanding your question for better understanding? Regards Karthik + +Hi, Karthik : My question(pint) is simple, and I may find some answers. TI OpenVX have this function : vxSetNodeTarget(n1, VX_TARGET_STRING, TIVX_TARGET_DSP1) n1 is node, 3'st parameter is core id, it includes : #define TIVX_TARGET_DSP1 "DSP-1" #define TIVX_TARGET_DSP2 "DSP-2" #define TIVX_TARGET_EVE1 "EVE-1" #define TIVX_TARGET_EVE2 "EVE-2" #define TIVX_TARGET_EVE3 "EVE-3" #define TIVX_TARGET_EVE4 "EVE-4" #define TIVX_TARGET_A15_0 "A15-0" #define TIVX_TARGET_IPU1_0 "IPU1-0" #define TIVX_TARGET_IPU1_1 "IPU1-1" #define TIVX_TARGET_IPU2 "IPU2" but I do not find define about "Core R5" . (MCU2_0, mcu2_1, mcu3_0, mcu3_1) How to assign job to MCU2_0, mcu2_1, mcu3_0, mcu3_1? Thanks + +Hi Gibbs, It seems like you are looking at the TDA2 source code - can you please send me the references to this OpenVx code that you are looking at? Regards Karthik + +Hi, Karthik : This file locate in psdk : path as below : psdk_rtos_auto_j7_07_00_00_11\tiovx\kernels_j7\include\TI\j7.h Gibbs + +Gibbs, Ok, the previous code snippet was probably a different reference - I understand your question. Let me get back to you on this. Regards Karthik + +Hi Gibbs, The MCU2_0 target is TIVX_TARGET_IPU1_0 and the MCU2_1 target is TIVX_TARGET_IPU1_1. The mcu3_0, mcu3_1 have not been enabled for OpenVX in our demos. We will be sure to have this more clearly documented in the next release. Regards, Lucas + diff --git a/data2/text/range/0-5000/946389.txt b/data2/text/range/0-5000/946389.txt new file mode 100644 index 0000000000000000000000000000000000000000..9bfd3bfbdc993f0456051e3608e9cfb733b1e081 --- /dev/null +++ b/data2/text/range/0-5000/946389.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2HV: ASIL compliance for each TDA2 core + +Query Text: +Part Number: TDA2HV Hello, Can you provide me more information about the ASIL compliance for each core into TDA2HS? Can you provide me the safety manual for TDA2HS? Best regards, + +Responses: +Hi User6448690, Please start by referencing www.ti.com/.../sprui16a.pdf. For ASIL compliancy of the TDA, please see this thread https://e2e.ti.com/support/processors/f/791/t/726849?Functional-Safety-ADAS. Regards, kb + +Regarding ASIL compliancy of the TDA parts, please also be aware that the list of TDA products on ti.com, has a "Features" column which shows the parts ASIL rating. https://www.ti.com/processors/automotive-processors/tdax-adas-socs/products.html. Regards, kb + diff --git a/data2/text/range/0-5000/946737.txt b/data2/text/range/0-5000/946737.txt new file mode 100644 index 0000000000000000000000000000000000000000..f59e8ad1610ad791a069ced5de5ce3a0e4548dad --- /dev/null +++ b/data2/text/range/0-5000/946737.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HV: ISO21434 Compliance with TDA2 family + +Query Text: +Part Number: TDA2HV Hello, Can you provide information about the SoC capabilities (accelerated hardware for example) for being compliance with ISO 21434? Can you provide information about this cybersecurity manual for SoC (like safety manual for iso26262)? Best regards, Andrés + +Responses: +Hi Andres, TDA2x does have an HS variant with security and crypto features which are covered by the Security(SPRUHS7) and Cryptographic(SPRUHS8) addendums. We will need to work offline with you for access to these documents and further discussion on IOS21434. Regards, kb + diff --git a/data2/text/range/0-5000/947197.txt b/data2/text/range/0-5000/947197.txt new file mode 100644 index 0000000000000000000000000000000000000000..071cb9a000467b5ad2b2061346260ff82d67b7f2 --- /dev/null +++ b/data2/text/range/0-5000/947197.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: VSDK3.07 + +Query Text: +Part Number: Hi,Using mksdboot.h script to make SD card can succeed in ubuntu14, but SD card made in ubuntu18 cannot start kernel. Why? And I use the VSDK3.07. Please refer to the attached log file of unable to start the kernel and the printing process when making SD cards in different ubuntu versions.mksdboot fails the SD card.7z + +Responses: +Jade jiang said: Part Number: TDA2SX Hi, I use mksdboot.h script to make SD card can succeed in ubuntu14, but SD card made in ubuntu18 cannot start kernel. Why? And I use the VSDK3.07. Please refer to the attached log file of unable to start the kernel and the printing process when making SD cards in different ubuntu versions. mksdboot fails the SD card.7z + +Hi, Yes, the mksdboot.sh will not work in the Ubuntu 18.04 version, because the Ubuntu 18.04 is not a stable version & it's having lot of issue. So please don't try from the Ubuntu 18.04 & we tested only in the Ubuntu 14.04. Thanks Gaviraju + +Hi, If sdk3.07 is used all the time, is there any solution? Thanks Jade + +Hi, Moreover, as far as I know, the SDK software of TDA4 is already available in Ubuntu 18. When will tda2 consider updating? Thanks Jade + +Hi, No more development on TDA2 vision SDK & it's in support mode. Thanks Gaviraju + diff --git a/data2/text/range/0-5000/947668.txt b/data2/text/range/0-5000/947668.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d293f99de9b0bbdebee67258de6ada7bc47d849 --- /dev/null +++ b/data2/text/range/0-5000/947668.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA3MV: Detailed model number of DSP (C66x) + +Query Text: +Part Number: TDA3MV Other Parts Discussed in Thread: TDA2 Please tell me the detailed model number of DSP (C66x) of TDA3MV. Does this DSP support LAPACK? Also, do I have to port LACACK myself? + +Responses: +Hi, Please follow the below link. Thanks Gaviraju + +Fast of all, Please tell me the detailed model number of DSP (C66x) of TDA3MV. + +Hi, It is the same as the TDA2 and therefore you should check this post: https://e2e.ti.com/support/processors/f/791/p/947670/3506002#3506002 Regards Karthik + +Hello, TDA3MV DSP information is not provided here. Please tell me the detailed model number of DSP (C66x) of TDA3MV. + diff --git a/data2/text/range/0-5000/947670.txt b/data2/text/range/0-5000/947670.txt new file mode 100644 index 0000000000000000000000000000000000000000..c2ea3bda68104be1edbe03e285b5a50fa1d65b95 --- /dev/null +++ b/data2/text/range/0-5000/947670.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2SX: Detailed model number of DSP (C66x) + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA3MV Please tell me the detailed model number of DSP (C66x) of TDA2SX. Does this DSP support LAPACK? Also, do I have to port LACACK myself? + +Responses: +Hi, Go through the below link & let me know if you have any questions, I will check with the DSP expert & let you know. Thanks Gaviraju + +This link does not provide a detailed model number for the TDA3MV DSP (C66x). Therefore, I don't know if this DSP supports LAPACK. + +This link does not provide a detailed model number for the TDA2SX DSP (C66x). Therefore, I don't know if this DSP supports LAPACK. + +All TDA2x/TDA3x family of SoCs have TMS320C66x DSPs. You can find more information in the TRM. + +Hello, Does TMS320C66xDSP support LAPACK? Also, do I have to port LACACK myself? + +First of all, what is the detailed model number of the TDA2SX DSP (C66x)? + +Hi, You can get the detailed model number of the DSP by checking the datasheet: https://www.ti.com/lit/ds/symlink/tda2sx.pdf?ts=1602829994367&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTDA2SX And there is a Linear Algebra package that is supported for this DSP https://www.ti.com/processors/digital-signal-processors/libraries/linear-algebra.html#:~:text=The%20LAPACK%20library%20built%20using,optimized%20BLAS%20library%20for%20acceleration. Please refer to this information for details. Regards Karthik + +Hello, I checked the datasheet, but I couldn't find the model number of the TDA2SX DSP(C66x). I want to know the "x" part of C66x. Please tell me the detailed model number of the TDA2SX DSP(C66x). + +Hello, I checked the datasheet, but I couldn't find the model number of the TDA2SXI checked the datasheet, but I couldn't find the model number of the TDA2SX DSP(C66x). I want to know the "x" part of C66x. Please tell me the detailed model number of the TDA2SX DSP(C66x). + +Hello, I couldn't find the model number of the TDA2SX DSP(C66x) & TDA3MV DSP(C66x). I want to know the "x" part of C66x. Please tell me the detailed model number of the TDA2SX DSP(C66x) & TDA3MV DSP(C66x). + +Dear user, The x in TMS320C66x does not have any number. Its just meant to represent C66 DSP core pack which is present in different SoC's To the differences in C66 DSP between TDA2SX and TDA3MV please refer to its respective device specifications. They might very in the clock (MHz) or in L2 SRAM size. But will mostly be identical. Is there anything you are looking for other than just the value for x? Because the x really has no value. Regards, Shyam + diff --git a/data2/text/range/0-5000/948823.txt b/data2/text/range/0-5000/948823.txt new file mode 100644 index 0000000000000000000000000000000000000000..bb1782e50c0f5dd6d5240881dc40d21c40425bb9 --- /dev/null +++ b/data2/text/range/0-5000/948823.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/TDA2EVM5777: GPU demo code + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler How to get GPU demo code ? It can run on Tda2x . How to get GPU development reference manual or get API about it? + +Responses: +Hi Henry, There are several examples for GPU that can be run on the TDA2, please refer to this documentation: https://processors.wiki.ti.com/index.php/DRA7xx_GLSDK_Software_Developers_Guide#Graphics_Demos_from_Command_Line to get started. The GPU development reference manual - the Software Developers Guide linked above is a good starting point to get started. You should also refer to the build instructions and look into the various code/examples to assist with development. Also, refer https://processors.wiki.ti.com/index.php/DRA7xx_GLSDK_Software_Developers_Guide#Using_the_PowerVR_Tools for additional tools to optimize/understand the performance of your application. Regards Karthik + diff --git a/data2/text/range/0-5000/949613.txt b/data2/text/range/0-5000/949613.txt new file mode 100644 index 0000000000000000000000000000000000000000..10ef1ba493e74f0c387d1764bf38e6e470634879 --- /dev/null +++ b/data2/text/range/0-5000/949613.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: I want to use Qt on TDA2EVM5777, what should I do? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi， I want to use Qt on TDA2EVM5777 because of project needs, what should I do? I have read other posts and said that it is possible to use ti-processor-sdk-linux-am57xx-evm, how do I deploy it on my board？ Thank you. + +Responses: +Leon, The full fledged filesystem supports Qt on the TDA2. Have you read through the User Guide to understand how to generate the full filesystem? Could you please give me more details on the difficulty and also let us know which release you are using? Regards Karthik + +Karthik， The development environment I use is ti-processor-sdk-linux-am57xx-evm-06.02.00.81. But I did not find a user guide on how to generate a complete file system for TDA2. Can you provide links to related materials? Thank you + +Hi Leon, Ok, are you using a TI EVM or your own custom board? If its TI EVM which EVM are you using? If you are using the TI EVM then there are different starting points depending on the board you have - can you please answer the above question so that I can guide you further. Regards Karthik + +Hi Karthik, The hardware I use is TI evm, not customized, specifically TDA2x Vision EVM Kit.（www.ti.com/.../TDA2EVM5777） I think I found the information I needed on the TI website: Processor SDK Linux Automotive Software Developers Guide. I want to confirm that these two are compatible? Thank you + +Leon, Thanks for confirming and I think from your description it seems like you have found the right material. Try it out and let us know if you have further questions. Regards Karthik + diff --git a/data2/text/range/0-5000/950270.txt b/data2/text/range/0-5000/950270.txt new file mode 100644 index 0000000000000000000000000000000000000000..2d7a639a837396d4b4244165505f56f79f1f9c40 --- /dev/null +++ b/data2/text/range/0-5000/950270.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA3MV: DSP model number for LAPACK + +Query Text: +Part Number: TDA3MV Hello, Please tell me the model number of DSP that LAPACK can use. + +Responses: +Hi, I believe that this is getting discussed in a thread already: https://e2e.ti.com/support/processors/f/791/t/947670 I request you to post on the same thread and ping for further questions on the same topic. Closing this thread now. Regards Karthik + diff --git a/data2/text/range/0-5000/950324.txt b/data2/text/range/0-5000/950324.txt new file mode 100644 index 0000000000000000000000000000000000000000..1ac02c7a52c44d8133f1c530cd4737d50568cc2b --- /dev/null +++ b/data2/text/range/0-5000/950324.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2HV: Operative System Resources + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2, Hello, Can you provide more information about the Operative System Resource Requirements (CPU, RAM, FLASH) for TDA2? TDA2HV: VSDK RTOS: VSDK Linux: QNX: Autosar: Best regards, + +Responses: +Hi, The question is not clear - are you looking for host operating system resource requirements to develop with TDA2? Please expand your question so that the team can provide an accurate response. Regards Karthik + +Hello Karthik, Yes, we are looking for the minimun requirements for TDA2 for memory for each operative system. Best regards, + +Hi, It is very difficult to answer the question. Can you please expand your question to include more details about your usecase? It would help by starting to experiment with the EVM with the SDK's provided by TI. And then you can estimate based on the application that you are trying to run on the TDA2. Do you have the list of application(s) that you plan to run and they will be realized in the heterogeneous core? We have realized systems with very low requirements of RAM, FLASH for very targetted usecases and we also have systems that had larger requirements. Perhaps, you can also look at the data sheet for numbers on the DRA7 (which is similar to TDA2) - processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Data_Sheet Regards Karthik + diff --git a/data2/text/range/0-5000/950717.txt b/data2/text/range/0-5000/950717.txt new file mode 100644 index 0000000000000000000000000000000000000000..fdeec8d5e9360925cc19a06cd9289932b548e9af --- /dev/null +++ b/data2/text/range/0-5000/950717.txt @@ -0,0 +1,8 @@ +Ticket Name: CCS: The CortexA project of TDA2 established by CCS9.30 failed to link + +Query Text: +Tool/software: Code Composer Studio Hi Team, The customer is experiencing below issue and needs your help. **** Build of configuration Debug for project A15_Null_demo **** "D:\\ti\\ccs930\\ccs\\utils\\bin\\gmake" -k -j 8 all -O Building file: "../startup_ARMCA15.S" Invoking: GNU Compiler "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc-4.9.3.exe" -c -mcpu=cortex-a15 -march=armv7-a -mtune=cortex-a15 -marm -mfloat-abi=hard -mfpu=neon -DTDA2xx -I"D:/ti_work2020/workspace_v9.30/A15_Null_demo" -I"D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include" -Og -g -gdwarf-3 -gstrict-dwarf -Wall -specs="nosys.specs" -MMD -MP -MF"startup_ARMCA15.d" -MT"startup_ARMCA15.o" -x assembler-with-cpp -o"startup_ARMCA15.o" "../startup_ARMCA15.S" ../startup_ARMCA15.S:1:0: warning: switch -mcpu=cortex-a15 conflicts with -march=armv7-a switch @****************************************************************************** ^ Finished building: "../startup_ARMCA15.S" Building target: "A15_Null_demo.out" Invoking: GNU Linker "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc-4.9.3.exe" -mtune=cortex-a15 -marm -DTDA2xx -Og -g -gdwarf-3 -gstrict-dwarf -Wall -specs="nosys.specs" -mfloat-abi=hard -Wl,-Map,"A15_Null_demo.map" --entry Entry -nostartfiles -nostdlib -static -Wl,--gc-sections -L"D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/lib/gcc/arm-none-eabi/4.9.3/fpu" -L"D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu" -Wl,--defsym,STACKSIZE=0x10000 -Wl,--defsym,HEAPSIZE=0x400 -o"A15_Null_demo.out" "./main.o" "./startup_ARMCA15.o" -Wl,--start-group "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/lib/gcc/arm-none-eabi/4.9.3/fpu/libgcc.a" "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu/libm.a" "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu/libc.a" "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu/librdimon.a" "D:/ti/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu/libg.a" -Wl,--end-group makefile:147: recipe for target 'A15_Null_demo.out' failed ./startup_ARMCA15.o: In function `Enter_BootLoader': D:\ti_work2020\workspace_v9.30\A15_Null_demo\Debug/../startup_ARMCA15.S:122: undefined reference to `_start' collect2.exe: error: ld returned 1 exit status gmake[1]: *** [A15_Null_demo.out] Error 1 gmake: *** [all] Error 2 makefile:143: recipe for target 'all' failed **** Build Finished **** Thanks, AnnieA15_Null_demo.rar + +Responses: +Could you check what causes the following error? ./startup_ARMCA15.o: In function `Enter_BootLoader': D:\ti_work2020\workspace_v9.30\A15_Null_demo\Debug/../startup_ARMCA15.S:122: undefined reference to `_start' + diff --git a/data2/text/range/0-5000/950725.txt b/data2/text/range/0-5000/950725.txt new file mode 100644 index 0000000000000000000000000000000000000000..22b0c24bc68cef00764bc6480558b5d341d6059d --- /dev/null +++ b/data2/text/range/0-5000/950725.txt @@ -0,0 +1,12 @@ +Ticket Name: PROCESSOR-SDK-DRA8X-TDA4X: Compile OpenCV with OpenVX + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Hello, We are working in TDA4 SOC. Is it possible to build opencv with Openvx ? https://www.ti.com/lit/wp/spry260/spry260.pdf?ts=1603377013741&ref_url=https%253A%252F%252Fwww.google.com%252F page 11 Regards, Gokul + +Responses: +Hi Gokul, We encourage the use of optimized OpenVx solution as the default in the TDA4 offerings. Regards Karthik + +Hi Karthik, My question is what does the pdfs says https://www.ti.com/lit/wp/spry260/spry260.pdf?ts=1603377013741&ref_url=https%253A%252F%252Fwww.google.com%252F page 11 Is it possible to build opencv with openvx ? Regards, Gokul + +Hi Gokul, That document is for TDA2, the path forward on the TDA4 is using OpenVx. Regards Karthik + diff --git a/data2/text/range/0-5000/951859.txt b/data2/text/range/0-5000/951859.txt new file mode 100644 index 0000000000000000000000000000000000000000..116cbc6c95d889082424c526bdfdf556c5764583 --- /dev/null +++ b/data2/text/range/0-5000/951859.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA4: Floating point exception (core dumped) when running tidl_demos + +Query Text: +Other Parts Discussed in Thread: TDA2 I trained a caffemodel by caffejacinto and imported it by tidl importer successfully. But I runned the tidl demo in TDA4 RASDK vision apps called apps_tidl_od using my caffemodel, there is an error The logs is shown below. 0.0s: VX_ZONE_INIT:Enabled 0.28s: VX_ZONE_ERROR:Enabled 0.31s: VX_ZONE_WARNING:Enabled Computing checksum at 0x00007FAA51E91F50, size = 252384 Floating point exception (core dumped) What's the reason about the error and how should I do to avoid it? By the way, the caffemodel works well on TDA2. + +Responses: +Can you please tell the exact PSDKRA version you are trying? + +psdk_rtos_auto_j7_07_00_00_11 Actually, this problem has been solved by updating the image preprocess kernel code. I think it can be closed. thank you! + diff --git a/data2/text/range/0-5000/952935.txt b/data2/text/range/0-5000/952935.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d965f313d258945aa3b74d49272896f3dabbade --- /dev/null +++ b/data2/text/range/0-5000/952935.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2E: Questions: about mipicsi and edma + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, hi ti support The processor we use is TDA2 ECO 23*23. There are 4 cameras in our system. The interface connected to the deserializer (DS90UB960) is the mipicsi interface. We put this part of the software in the ipu, and now our data stream is ipu (mipicsi->edma->4 pictures)->a15, is this possible? If not, how can we save resources most? thanks！ + +Responses: +Hi, team: Add more background information: four 1280(width)*1280(height)@30fps YUV422 output camera sensors these sensors are connected to UB960 via SerDes UB960 CSI0 output to TDA2Ex SOC, UB960 CSI1 output to XXX SOC Due to XXX SOC limitation, virtual channel cannot be used For TDA2Ex: the 1280*1280 input camera inputs need to be resized to 1280*720 for Surround View applications. + +Hi, team: According to the above information, please help to advise the best solution for this requirement: UB960 configuration Basic Synchronized CSI-2 Forwarding? Line-Interleaved CSI-2 Forwarding ? Line-Concatenated CSI-2 Forwarding ? which is our best choice? In TDA2Ex, we need to design the camera data capture with EDMA. The input will be a huge buffer which contains/mixes four camera sensor inputs, and we need to retrieve each of the four independent camera sensor inputs, and get separate data buffer for each camera sensor. Please kindly guide us. + +We have confirmed with our partners that we use Line-Interleaved CSI-2. + +Hi, expert: The UB960 output is as below: So, I think the TDA2E CSI will capture the frame and store it to DDR memory as one big camera input: 1280 width, 1280*4 height (at 30fps). We need to configure EDMA (probably 4 channels) to separate this big buffer into 4 sensor data buffers. Please help us: whether the above understanding is correct? how to configure EDMA for this purpose? Many thanks. + +Hi Peter, Do you mean UB960 merges 4 sensors data into a single frame? Typically UB960 does not merge sensors data, instead it sends them over separate virtual channels. And since they are in separate virtual channels, they will be stored in separate buffers by CAL. Rgds, Brijesh + +Hi, Brijesh Jadav: Due to other SOC's limitation in the system, the virtual channel cannot be used. So, UB960 "Line-Interleaved CSI-2" mode will be used in the project. Please refer to "7.4.25.4 Line-Interleaved CSI-2 Forwarding" in UB960 datasheet. + +Hello Peter, It really depends on what you want to do with YUV data once it is stored in memory. For e.g. if you intend to process the images on GPU, then GPU can be configured to read an image with start_offset and line_stride. By doing this you will not need to split the superframe into 4 frames. Regards, Mayank + diff --git a/data2/text/range/0-5000/954887.txt b/data2/text/range/0-5000/954887.txt new file mode 100644 index 0000000000000000000000000000000000000000..7a773d5d7a4034268c109d92b14f8895d7bd9cae --- /dev/null +++ b/data2/text/range/0-5000/954887.txt @@ -0,0 +1,12 @@ +Ticket Name: Jacinto dra756apabcq1 uboot cannot be started. + +Query Text: +Other Parts Discussed in Thread: DRA756, TDA2SX HI. SDK: PROCESSOR_SDK_VISION_03_05_00_00 Our original main chip is TDA TDA2sxbtqabcq1, and uboot can start normally, Now Jacinto dra756apabcq1 of pin to pin cannot be started. What needs to be modified + +Responses: +Hi gj y, Can you share the u-boot logs on your board? I want to know where exactly is the u-boot failing. Best Regards, Keerthy + +If the SOC is tda2s, it will boot normally. If it is dra756, there is no log output。 Is there a difference between the configuration of dra756 and tda2sx bootmode? tda2sx bootmod config: + +There should be no difference of boot setting between the two devices. + diff --git a/data2/text/range/0-5000/955350.txt b/data2/text/range/0-5000/955350.txt new file mode 100644 index 0000000000000000000000000000000000000000..4ac8f46e75261d3de25d9cabb0b3686375ef5ccd --- /dev/null +++ b/data2/text/range/0-5000/955350.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2xx_EVM_BIOS : Error in importing tensorflow pretrained model + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi I have installed PROCESSOR_SDK_VISION_03_07_00_00 which i have configured for tda2xx_evm_bios_all. I have copied the REL.TIDL.01.01.03.00 folder to my windows pc and using the tidl import tool tidl_model_import.out.exe. when i give the pretrained tensorflow model frozen_graph file x.pb to import tool tidl_model_import.out.exe the command executed is tidl_model_import.out.exe ..\..\test\testvecs\config\import\tidl_import_x.txt then it gives me this message " TF Model File : ..\..\test\testvecs\config\tensorflow_models\x\x.pb Op Type Cast is Not suported will be By passed Op Type Shape is Not suported will be By passed Could not find the requested input Data : mul !! " I was referring the text file in the path ..\..\test\testvecs\config\import\*.txt file There are paramters mentioned as quantizationStyle quantRoundAdd numParamBits preProcType conv2dKernelType I referred the documentation TIDeepLearningLibrary_UserGuide.pdf where the explanation of each parameters is given but how can we determine that for my particular model which paramters need to set and to what value. Request you for your inputs. Regards Pratik + +Responses: +Hello , Any update on this ?? Regards Pratik Brid + +Hi Pratik, Sorry for the delay. The error is because of your models has unsupported layers, please refer to "TIDeepLearningLibrary_DataSheet.pdf" for supported layers. Refer to section "3.6.2 Importing the Model and Parameters" for the explanation about the parameters in the import.txt file. Thanks, Praveen + +Hi Praveen, For the above two errors on the unsupported layers, Op Type Cast is Not suported will be By passed Op Type Shape is Not suported will be By passed is there any alternative available which can be used in model re-training so that the layers would be supported with respect to TIDL? I am trying to import face-detection which was trained in tensorflow + +Hi Sudhanshu, One way to use only those layers which are supported in TIDL in your network, please refer to TIDL datasheet for supported layers. Other way would be split network up to TIDL supported layers and run that using TIDL and run remaining network outside the TIDL. Thanks, Praveen + +Hi Praveen, Thank you for the reply I had referred to TIDL datasheet and understood about the unsupported layers. I am a beginner in DL, so can you suggest how am I supposed to split my layers/networks in model file(x.pb). The model I am using is pre-trained model on Face-detection(Facebox). Also, with respect to running supported layers on TIDL and remaining outside the TIDL, by outside do you mean importing the layers on EVE cores or is it something else? Regards Sudhanshu + +Hi Sudhanshu, You need to freeze and optimize the graph with all the layers from input to the last supported layer and run this on EVE core and remaining on the DSP core, please refer tp FAQ 24 in the TIDL user guide for more details. Thanks, Praveen + +Hi Praveen, Sorry the late reply and thanks for your above response. I am using PROCESSOR_SDK_VISION_03_07_00_00 which had TIDL version 01.01.03.00... So, in the UserGuide, there is no FAQ 24(Kindly mention what version u are referring to, so that latest TIDL import tool can be referred) However, in the above mentioned TIDL user-guide's FAQ 22, it mentions about how to run the splitted networks on EVE and DSP respectively.. I saw that DSP take input of bin files.. I am still not able to understand how are we going to create binaries for the unsupported layers? SInce TIDL's import tool will create bin file only for the supported layers. Thanks + +Hi I am referring to latest release of PROCESSOR_SDK_VISION_03_08_00_00 which had TIDL version 01.02.00.00... which had this FAQ24.Please refer to that. If you have unsupported layers in the middle of the network then that model can't be run on TDA2 (you may have to re-train your model with supported layers), but if you have unsupported layers at the end then those can be offloaded to DSP. Thanks, Praveen + diff --git a/data2/text/range/0-5000/956728.txt b/data2/text/range/0-5000/956728.txt new file mode 100644 index 0000000000000000000000000000000000000000..2eee2ae5a2a449d2fd5392e4a63751790c3443b0 --- /dev/null +++ b/data2/text/range/0-5000/956728.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2HV: Linux and RTOS requirements and limitations + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: TDA2 Hello, We are analysing the Linux and RTOS operative system. What minimun memory (Flash, RAM) requirements we have for each Operative System? What is the minimun time for starting up for each operative system (fast boot for RTOS is 500ms, right? Is fast boot available for Linux)? Can you rate the required work for porting the project? (TDA2px)RTOS -> (TDA2px)Linux (TDA2px)Linux-> (TDA2px)RTOS (TDA2px)RTOS -> (TDA4)OpenVX (TDA2px)Linux-> (TDA4)OpenVX. Best regards, Andrés + +Responses: +Hi, Generally, we have 2GB RAM for all TDA2xx device family soc & 1GB is enough to boot both Linux & RTOS OS, Please refer to the TRM to know the flash memory. RTOS Fast boot is available only for the TDA3xx platform & Linux Fast boot is supported only in TDA2xx platform. Refer to the below wiki page to know about the fast boot in Linux. Refer to the TDA3xx user-guide to run the fast boot use-case on RTOS file:///C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/docs/UserGuides/VisionSDK_UserGuide_TDA3xx.pdf Run the fast boot use-case according to user-guide instructions to know the time taken by the RTOS for fast boot For porting (TDA2px)RTOS -> (TDA2px)Linux (TDA2px)Linux-> (TDA2px)RTOS Can you add more details on what you are trying to port from RTOS to Linux & Linux to RTOS? Are you trying to port the vision SDK use-case from RTOS to Linux & vice versa? For porting (TDA2px)RTOS -> (TDA4)OpenVX (TDA2px)Linux-> (TDA4)OpenVX. Can you add more details? what you are trying port from TDA2px RTOS to TDA4 & TDA2px Linux to TDA4? Thanks Gaviraju + +Hello Gaviraju, So, the minimun RAM memory needed would be 1GB for both cases, and the Operative System Selection does not affect the RAM size selection, right? Would be possible a smaller RAM than 1GB for some cases? We would like to fit the RAM memory size for reducing the BOM cost for our project, Can you support in that way? Only for confirm, the fast boot is only available from Linux for TDA2HV and TDA2px, right? Regarding to porting, we would like to know the possibilities for porting some AlgorithmLink_Plugins we have and the few Usecases from RTOS -> Linux and from Linux -> RTOS. For the future task, we are managing the possibility of migrate to TDA4x with OpenVX operative system and we would like to know what is the easier way from TDA2xx RTOS or TDA2xx Linux. Best regards, Andrés + +Hi, Please ask the question related to RAM, Flash, any resource in this thread : The Linux fast boot is supported in all TDA2xx families of SOC but we tested only in TDA2Ex, TDA2Px, TDA2xx platforms. If you are familiar with the vision SDK framework then it's a 2 weeks effort to port the algorithm plugin from RTOS to Linux & vice versa. I'm not familiar with the OpenVX framework, so no idea about porting from TDA2px to TDA4. I will check with the team & let you know. Thanks Gaviraju + +Hi, Please go through the below thread to know about the transition from tda2 - tda4 https://e2e.ti.com/support/processors/f/791/t/895725 Thanks Gaviraju + diff --git a/data2/text/range/0-5000/956938.txt b/data2/text/range/0-5000/956938.txt new file mode 100644 index 0000000000000000000000000000000000000000..e27d8326eae6372bdf9c79d79f0f4a95cba72745 --- /dev/null +++ b/data2/text/range/0-5000/956938.txt @@ -0,0 +1,20 @@ +Ticket Name: CCS/TDA2EG-17: Is it possible to run Different Network on Different core (TDA Platform)? + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi . We have a customer made their PCB within TDA2. Some questions: A. Is it able to run the different Deep Learning Network on different core at the same time on TDA2 Platform? B. If yes, please provide the related document. If no, which TDA platform can allow them to do this? Please comment ,thanks. BR Rio + +Responses: +Hi Rio, A. Yes B. We have maximum 4 EVEs, each of them can run separate nets, please refer to TIDL use cases in vision SDK Thanks, Praveen + +Hi Parveen: Which Section of TIDL document to address different Network model for doing the Deep Learning? I only can find we can set 4 EVE running at the same time, but no clear instruction to address different model running on different EVE. please comment, thanks. BR Rio + +Hi Rio, We don't have any document or instruction to address different model running on different EVE (because we had not tried this at our end), but it is possible to do this. Thanks, Praveen + +Hi Praveen: Do you have any clear instruction or some hints for us to achieve this? Any help to let us try? BR Rio + +Hi Rio, I don't know how to achieve this, may be someone from VSDK team can help. Kindly contact them offline. Thanks, Praveen + +Hi Praveen: I don't know who is the right person of the VSDK team. May you send me their email to my email? Thanks. BR Rio + +Hi Rio, You can contact Gaviraju for VSDK questions and he will direct to someone if required. Thanks, Praveen + diff --git a/data2/text/range/0-5000/957059.txt b/data2/text/range/0-5000/957059.txt new file mode 100644 index 0000000000000000000000000000000000000000..7650fc12a6be7cef748a4ecc4305e2ffa3cdbdcf --- /dev/null +++ b/data2/text/range/0-5000/957059.txt @@ -0,0 +1,25 @@ +Ticket Name: TDA2EXEVM: TIDL import Warning: TIDL_ConvolutionLayer, paramater combination has gone with limited validation + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I have the following warning when converting a customized onnx model to TIDL format. WARNING: [TIDL_ConvolutionLayer] Conv_11 Layer paramater combination has gone with limited validation and may have some issues. Following are the parameters Kernel 5x5 Stride 1x1 dilation 1x1 Pad 0x0 Bias 1 According to the documentation of TIDL (Jacinto 7 Version: 01.02.00), the Kernel Size passes the validation: TIDL_ConvolutionLayer: + +Regular & depth-wise conv will be imported as conv. +For TF and tflite DepthwiseConv2dNative, depth_multiplier shall be 1 in Number of input channels > 1. +ReLU & BN & Pooling will be merged into conv to get better performance. 1x1 conv will be converted to innerproduct. +Validated kernel size: 1x1, 3x3, 5x5, 7x7,1x3,3x1,1x5,5x1,1x7,7x1. +If stride == 4, only supported kernel == 11x11. +if stride == 2, kernel should be less than 7. Even dimensions of kernel like 2x2, 4x4, 6x6 are not supported. +Depthwise Separable Convolution only supports 3x3,5x5,7x7 with stride 1 and 3x3 with stride 2. +Its recommended to have kernelH*kernelW*input channel/groupNum+enableBias % 64 == 0 whereever possible as it results into better utilization of hardware. I have tried to change dilation, padding, stride and Bias and the Warning remains. Only reducing the Kernel to 3x3 solves the Warning. Shouldn't a 5x5 Kernel be valid? What is wrong with my parameter combination? Best Regards Gildardo + +Responses: +Hi Gildardo, Are you using TDA2 EVM or TDA4 EVM ? kindly clarify because they use different code bases. Thanks, Praveen + +Hi Praveen, I am using TDA4, it was linked to TD2 because I created the issue from "Ask a related question" Sorry for the confusion Best Gildardo + +Hi Gildardo, The warning is mainly coming because this particular combination of parameters is not tested as part of our testing. But most likely it should work. Are you seeing any specific issue with this particular layer? Regards, Anshu + +Hi Anshu, Thank you for your answer. I don't have a particular problem with the model . I have tested with the bare-metal application but I have not validated the correctness of the output yet. Could it be possible to enumerate the validated parameter combinations for kernel 7x7 so that I can get rid of the warning? Best Regards Gildardo + +Hi Gildardo, Following is the terminology used here : Ni = number of input channels No = number of output channels G = number of groups NiPerG = number of input channels per group' NoPerG = number of output channels per group Fr = Kernel dimension in row ( 7 in this case) Fr = Kernel dimension in col ( 7 in this case) ) Currently following are the restriction of 7x7 kernels : 7x7 stride 1x1 : Supported 7x7 Stride 2x2 : Dilation 1x1 K = 1: currently natural C ( i.e. Not Optimized) K = 2: currently natural C ( i.e. Not Optimized) K = 3: optimized 8 bit tested, 16 bit K > 3: optimized Here K is NiPerG * Fr * Fc + bias ( if enabled) 7x7 Stride 2x2 : Dilation nxn ( n > 1 ) : Not supported. 3x3 5x5 7x7 with stride 1x1 and NiPerG = NoPerG = 1, You can also refer the following document to see the supported convolutions : Regards, Anshu + diff --git a/data2/text/range/0-5000/957872.txt b/data2/text/range/0-5000/957872.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0d7e9933defbcf34b38c3216ce1b8b6ad0cf09f --- /dev/null +++ b/data2/text/range/0-5000/957872.txt @@ -0,0 +1,12 @@ +Ticket Name: PROCESSOR-SDK-TDAX: Capture raw radar data by RVP-TDA3X + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 Hi supports, We are working on development of radar system by RVP-TDA3X. And I want to capture raw data via ethernet. Firstly, I generated new usecase as below config. IssCapture -> Select -> NetworkTx (IPU1_1) And, I tried to capture by your sample code for TDA2 cascade radar. (save 'dataArray' on line 882) as blow. ...\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect\radar_cascade_demo.m I used default radar parameter (width:128,height:128,15fps) for raw dara capturing. But packet loss seems to occur. So, I decreased data size (width:32,height:32,1fps) and captured again. It seems that there is no packet loss but data size is very large(more than 700KByte). I understand the data size of radar cube would be 49152Byte (2byte×2(IQ)×3(Tx)×4(Rx)×32(width)×32(height)). Therefore 'dataArray' in your sample code should be 49152Byte. Is my understanding correct? If correct, let me know why are data size so big? Regards, Kazuki + +Responses: +Sorry, I attached image again, + +Can anyone give me a comment? Regards, Kazuki + +Hi, Cascade Radar script is for Cascade Radar EVM to capture object data. You can use ~\vision_sdk\apps\tools\network_tools\bin\network_rx.exe for capturing raw data from RVP. Refer to the user guide under ~\vision_sdk\apps\tools\network_tools\docs for how to use the tool. + diff --git a/data2/text/range/0-5000/960432.txt b/data2/text/range/0-5000/960432.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e7392928250d36632df66dc3d44d8c06464df4e --- /dev/null +++ b/data2/text/range/0-5000/960432.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2EXEVM: what is the limit on the number of groups in convolution + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi,Because I use group convolution and the fps is very low, what is the limit on the number of groups in convolution? + +Responses: +Hi, The max number of supported groups in convolution are 1024. Thanks, Praveen + +Hi, Thank you for your reply. The number of group I used in each convolution is less than 1024, but my fps is still very low. I think it is the problem of tidl importTool. How to set the conv2dKernelType of tidl_import_JDetNet.txt？ Only if the size of conv is less than 32*32 is set to 1. Or are there other conditions? Thanks + +Hi, Sorry for the late reply. Please set conv2dKernelType to 1 if the size of conv is upto 64*64 and try if it can improve the fps. Thanks. Praveen + +Hi, Thank you for your reply. I have already tried to set conv2dKernelType to 1 if the size of conv is upto 64*64, but the fps still very low. Are there any other restrictions? Thanks. + +Hi, If you are running SSD model, you may need to modify below as shown to overcome low fps, keep_top_k: 20 confidence_threshold: 0.15 More details are in the below thread. https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen + +Hi, Thank you for your reply. Yes, I was running SSD model. I have already tried to set keep_top_k to 20 and confidence_threshold to 0.15, but the fps still very low. Are there any other restrictions or import tool have some problems? Thanks. + +Hi, >> Are there any other restrictions or import tool have some problems? No, there are no other problems in the import tool. This low fps is because of grouped convolutions will take more time for processing in TIDL, so this could be a reason for low performance. Kindly try with small grouped convolutions. Thanks, Praveen + +Hi, Thank you for your reply. Normally, the use of group convolution can increase the execution speed of the model, but why does the use of group convolution in tidl make the fps drop? By the way, The total parameter amount of the ssdJacintoNetV2 I trained is 3.25693e+06, and Total Giga Macs is 3.6114. After the import tool, the executed fps is 20, but why the total parameter amount of the ssd model I additionally designed is less (253024),Total Giga Macs is 1.4182, and after the import tool, the executed fps is 15 (drop)? The settings have been set according to the user guide. Are there any additional restrictions on tidl and import tool? Thanks. + +Hi, Kindly share the import config file for checking ? Thanks, Praveen + +Hi, I have shared my import config file. Please test for the import tool and fps. Thanks.import_config_file.7z + +Hi, Import config file looks fine, the conv2dKernelType was set correctly. The fps reduction is mainly because of uneven and small tensor sizes. The kernels are be better optimized for tensor sizes multiple of 8. I think fps you got is the final number for your model. You can try one last thing setting "nms_threshold: 0.4" in the deploy.prototxt. Thanks, Praveen + +Hi, Thank you for your reply. The situation you mentioned in my model is starts from the pool3 layer, but this design is the same as ssdJacintoNet, So why my fps is lower than ssdJacintoNet? What is the principle of nms_threshold: 0.4？ I have tried setting nms_threshold to 0.4, but the fps has not changed. Thanks. + +Hi, >> The situation you mentioned in my model is starts from the pool3 layer, but this design is the same as ssdJacintoNet, So why my fps is lower than ssdJacintoNet? Even though this situation started from pool3 layer, but in the earlier layers there are grouped conv layers which are not well optimized in the TDA2 (as we do SIMD across numchannels), so there is performance degradation in your model. Thanks, Praveen + +Hi, Thank you for your reply. >>In the earlier layers there are grouped conv layers which are not well optimized in the TDA2 But the maximum grouped conv of each layer is only 4, which is the same as the maximum grouped conv value of the ssdJacintoNet. Or is there a limit to the number of grouped conv? If so, how much is it? Thanks. + diff --git a/data2/text/range/0-5000/960445.txt b/data2/text/range/0-5000/960445.txt new file mode 100644 index 0000000000000000000000000000000000000000..752700b2d94abce521558fc259c92c2ea4568320 --- /dev/null +++ b/data2/text/range/0-5000/960445.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: L3 Custom Error + +Query Text: +Part Number: TDA2SX Hi, EVM board:VAYU EVM XC5777X CPU BOARD SDK3.07 Customer uses configuration tda2xx_evm_linux_all, and he doesn't modify the sdk. The following error may appear when the device starts loading multi-core, the probability is about 10% [ 10.551985] ------------[ cut here ]------------ [ 10.551993] WARNING: CPU: 0 PID: 101 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 10.551997] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access [ 10.552053] Modules linked in: dwc3(+) udc_core virtio_rpmsg_bus(+) bc_example(O) extcon_usb_gpio ahci_platform libahci_platform libahci libata scsi_mod omap_sham pvrsrvkm(O) omap_des omap_aes_driver c_can_platform c_can can_dev omap_rng dwc3_omap rng_core extcon rtc_omap omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 10.552057] CPU: 0 PID: 101 Comm: kworker/0:2 Tainted: G W O 4.4.84-00038-g0af2ab5 #1 [ 10.552059] Hardware name: Generic DRA74X (Flattened Device Tree) [ 10.552066] Workqueue: events_freezable thermal_zone_device_check He used the SDK3.08 version before and found the same problem (the probability is much higher than SDK3.07) www.ti.com.cn/.../PROCESSOR-SDK-TDAX + +Responses: +Hi, Is the behavior also seen on the TDA2-EVM or a custom board? Can you please confirm that so that I can check this further on my side. Regards Karthik + +Hi， He test on the VAYU EVM XC5777X CPU BOARD. + +Hi, Any update? + +Hi Nancy, On the older J6 releases, some firmwares were making an access to a region that it was prohibited to do so, this happened only during the boot up. This is a warning to indicate that this happened. There is no impact due to this, please treat this as a warning from the SDK binary. Regards Karthik + diff --git a/data2/text/range/0-5000/960714.txt b/data2/text/range/0-5000/960714.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ddcdfe3209f5248db91f049bebf806c0f3e3ec1 --- /dev/null +++ b/data2/text/range/0-5000/960714.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: TDA2 SX customer wants to know how to run-time low down the CPU speed. + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Champs: Customer made their own TDA2 SX PCB. please see this PDF page 43. https://www.ti.com.cn/cn/lit/an/sprac22/sprac22.pdf?_ticdt=MTYwNjE5Mzc0M3wwMTc1ZjJkZGQyMzYwMGEwMTkzMTI0OTUwOWYwMDMwNzMwMDEzMDZiMDA5Nzh8R0ExLjIuNDU5MTY4NDIwLjE2MDYwOTc0MjZ8MA This customer wants to low down the CPU speed when CPU is running. They know how to low down the CPU speed while in SPL stage. However, if the CPU is over-heat during run-time, how to low down the CPU speed while in system running stage not the Booting stage? please provide the solution in detail. THanks. BR Rio + +Responses: +Hi Rio, Do they have CPUREQ/CPU DVFS enabled? Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/962457.txt b/data2/text/range/0-5000/962457.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f692965e1f9ed72ca639a9aee9248366e85f0ce --- /dev/null +++ b/data2/text/range/0-5000/962457.txt @@ -0,0 +1,26 @@ +Ticket Name: Compiler/TDA2EG-17: TDA2Ex-17 qspi flash + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi，ti expert I am using vision 03.08 to develop on the user board.When I was debugging the qspi flash, I wrote a flash format image file from the linux system to the flash, and then restarted the system, but there was no output from the serial port.The boot sequence of my hardware is sd--->qspi. Why does writing data to qspi flash affect the normal startup of the system? + +Responses: +Hi, Could you please make sure that your SD boot is primary and QSPI is secondary? Also ensure that the images in the SD card are release images that are known to work. QSPI formatting should not impact SD boot. Best Regards, Keerthy + +Hi, Yes, I have confirmed, I modified the startup sequence to the following mode: The system can be started normally. The following new problems have occurred: 1、I execute the following command in linux system $ dd if=/dev/urandom of=test.bin bs=64 count=1024 $ dd if=/dev/mtd0 of=12.bin bs=64 count=1024 $ diff test.bin 12.bin The data of the two times is the same, indicating that the data has been successfully written to the spi flash 2、I restart the system, enter the uboot command line, and execute the following command: => fatload mmc 0 0x82000000 MLO 185461 bytes read in 10 ms (17.7 MiB/s) => md 0x82000000 0x10 82000000: 00000040 0000000c 00000000 00000000 @............... 82000010: 00000000 45534843 4e495454 00005347 ....CHSETTINGS.. 82000020: ffffffff ffffffff ffffffff ffffffff ................ 82000030: ffffffff ffffffff ffffffff ffffffff ................ => sf probe 0 SF: Detected gd25s513mdy2g with page size 256 Bytes, erase size 64 KiB, total 64 MiB => sf erase 0 0x30000 SF: 196608 bytes @ 0x0 Erased: OK => sf write 0x82000000 0x0 0x30000 device 0 offset 0x0, size 0x30000 SF: 196608 bytes @ 0x0 Written: OK => sf read 0x82000000 0x0 0x30000 device 0 offset 0x0, size 0x30000 SF: 196608 bytes @ 0x0 Read: OK => md 0x82000000 0x10 82000000: 00000000 00000000 00000000 00000000 ................ 82000010: 00000000 00000000 00000000 00000000 ................ 82000020: 00000000 00000000 00000000 00000000 ................ 82000030: 00000000 00000000 00000000 00000000 ................ From the last command, we can know that what is read out is empty.Did not write successfully, but the process of writing shows success How can I find the cause? Thanks！ + +Hi, The QSPI boot is not supported in vision SDK 3.08 & only SD boot is supported. This is clearly mentioned in the vision SDK Linux user-guide. Thanks Gaviraju + +Hi, I now change to the v03.07 sdk package and use qspi4 as the boot device to burn images of MLO, kernel dtb, kernel and other cores. What are the special requirements for the files? What is the location of the image in qspi? How to set the uboot startup command? Thanks！ + +Hi, Follow the below threads to flash the boot images to QSPI memory. Thanks Gaviraju + +Hi, Thanks for your reply.How to set the bootargs parameters of uboot from qspi flash? + +Hi, I will check with the U-boot expert & let you know. Thanks Gaviraju + +Hi, Please refer the below link: Thanks Gaviraju + +Hi, Thanks. But this is not a big reference for me. My board only has qspi flash, so I need to set bootargs, and I need to set which kernel and dtb mirrors are read from. The root file system I use is in ubifs format, so I need to set boot parameters. So can you tell me the startup parameter configuration for booting from qspi flash? + +Hi, I could not find references for TDA2. There is one for AM654x: https://elixir.bootlin.com/u-boot/latest/source/include/configs/am65x_evm.h#L120 Similar thing needs to be tried for TDA2. You will have to experiment a bit. There is some older link: https://processors.wiki.ti.com/index.php/UBIFS_Support That gives an over all idea but might not be relevant now. Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/962509.txt b/data2/text/range/0-5000/962509.txt new file mode 100644 index 0000000000000000000000000000000000000000..21f443e717a1352f986e74834c1173e0c4eb09ba --- /dev/null +++ b/data2/text/range/0-5000/962509.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: GPIO Pull-Up Resistance Value + +Query Text: +Part Number: TDA2SX Dear Support member The GPIO8 _1Pin can be set to Pull - up/Down. What is the resistance value when Pull-Up is performed? Best Regards, + +Responses: +The internal pull-up can vary based on process and temperature. Nominal is about 50K-ohms, but can vary from 10K-ohms to over 100K-ohms. + diff --git a/data2/text/range/0-5000/963284.txt b/data2/text/range/0-5000/963284.txt new file mode 100644 index 0000000000000000000000000000000000000000..91d52b32603766e48069d09f5ea408a7048b5530 --- /dev/null +++ b/data2/text/range/0-5000/963284.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: generation temperature of the device from the total power + +Query Text: +Part Number: TDA2SX Dear Support member The customer is considering a system using TDA2Sx. Using the Power_consumption sheet provided by TI, we calculated a total power as 7718 mW. Is it possible to calculate the generation temperature of the device from this total power? Best Regards, + +Responses: +Dear Support member Could you reply for this question? Best Regards, + +Hello, It is not possible to accurately predict the temperature. We do provide a thermal model that can be used along with a model of the customers system to estimate the power based on the use case and thermal characteristics of the SoC and heat sink etc. TDA2x Thermal Model Regards, Kyle + diff --git a/data2/text/range/0-5000/963372.txt b/data2/text/range/0-5000/963372.txt new file mode 100644 index 0000000000000000000000000000000000000000..259dbf796940d5724a9f512a4ce0376c6f0564fd --- /dev/null +++ b/data2/text/range/0-5000/963372.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/PROCESSOR-SDK-DRA8X-TDA4X: TDA4- Deep Learning question: Can we run the different network model (DeepLearning) on Different Core concurrently? + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Tool/software: TI C/C++ Compiler Hi . Customer is using TDA2 as their current products now. We get a question: #1. Does TDA2 EX17 can run the different network model on different core concurrently? for ex: Arm to run TensorFlow SSDV1. EVE to run TensorFlow SpineNet? #2. Following #1, if TDA2 cannot do that, does TDA4 be able to do this? If yes, is there any document to address this? Thanks. BR Rio + +Responses: +SDK version ? Regards Vineet + +Hi Vineet: Customer is always using / evaluating the newest SDK for TDA2/TDA4. Thanks. BR Rio + +Hi Rio, Isn't this thread related to the following thread : https://e2e.ti.com/support/processors/f/791/t/956938 Regards, Anshu + +Hi Anshu: Yes, those 2 E2E are the same, so, where is the solid answer for those 2 E2E? please specify. Thanks. BR Rio + +Hi Rio, As I understand that Praveen is already looking into the other thread and I will ping him once again. Can we close this thread and get the reply in the other thread itself? Regards, Anshu + diff --git a/data2/text/range/0-5000/965951.txt b/data2/text/range/0-5000/965951.txt new file mode 100644 index 0000000000000000000000000000000000000000..2bee8ae2f92fb7cdbb9869324c09439122826d02 --- /dev/null +++ b/data2/text/range/0-5000/965951.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/PROCESSOR-SDK-DRA8X-TDA4X: TDA4 u-boot.img + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Tool/software: TI C/C++ Compiler Hi . #1. When I try to build the u-boot for TDA4, there is a directory output: --> /opt/ti-processor-sdk-linux-j7-evm-07_01_00_10/board-support/u-boot_build# ls a72 r5 And there are 2 u-boot.img in the A72 and R5 folder. this is the A72 : 1035136 Dec 21 17:22 u-boot.img , And in this folder of the pre-build, there are 2 u-boot.img. -rw-r--r-- 1 root root 1035160 Nov 20 04:57 u-boot.img -rw-r--r-- 1 root root 1035160 Nov 20 04:57 u-boot-j7-evm.img Can anyone explain which is the u-boot.img I need to flash into SD card? Why those files are having different size? #2. Besides, there is no any document to explain how to R5/A72 u-boot.img difference and how to use it. #3. I'm facing this issue: libfdt fdt_check_header(): FDT_ERR_BADMAGIC No FDT memory address configured. Please configure the FDT address via "fdt addr
" command. Aborting! Bad Linux ARM64 Image magic! So, I want to compile the u-boot.spl , which output of the SPL file can have this FDT imported? Do not tell me to do this: env default -f -a , since this solution never work on the newest SDK !! BR Rio + +Responses: +Hi Rio, TDA4 is pretty different when compared to TDA2. The RoM Code expects tiboot3.bin as the first image. Here are few details about the images that you need to compile and copy to SD card: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Foundational_Components_U-Boot.html#u-boot-user-s-guide Look at the image formats section: tiboot3.bin contains the R5 SPL & corresponding DTB.. tispl.bin contains the A72 SPL, corresponding DTB & ATF/OPTEE u-boot.img the A72 u-boot.img. sysfw.itb that is dmsc/m3 binary. The above 4 binaries are must and should for you to boot. So to answer your questions: 1. under r5 please copy the tiboot3.bin & under A72 please copy tispl.bin & u-boot.img to SD card boot partition. (sysfw.itb can be copied from pre-built binaries) 2. https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Foundational_Components_U-Boot.html#u-boot-user-s-guide Check the Image formats section. you will understand the difference very well. 3. First make use of $SDK_PATH/bin/mksdboot.sh script: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Overview/Processor_SDK_Linux_Formatting_SD_Card.html?highlight=mksdboot#partitioning-sd-card This will create a working card & then on top of that if you make custom changes you can copy the Image & k3-j721e-common-proc-board.dtb to the boot folder of your rootfs partition. Best Regards, Keerthy + +Hi Keerthy: #1. I have found this Jira, and after checking the patch, the patch is already inside the newest SDK. https://jira.itg.ti.com/browse/LCPD-19753 I have rebuilt my uboot A72/R5. and copied them into the SD card. However, this issue remains. #2. My SD card containing is as the below. root@ubuntu-vm:/opt/ti-processor-sdk-linux-j7-evm-07_01_00_10/board-support/prebuilt-images# ls /media/root/BOOT/ bl31.bin k3-j721e-common-proc-board.dtb k3-j721e-vision-apps.dtbo u-boot.img uenv.txt.jailhouse bl32.bin k3-j721e-common-proc-board-infotainment.dtbo sysfw.itb uEnv.txt uenv.txt.psdkra Image k3-j721e-common-proc-board-jailhouse.dtbo tiboot3.bin uenv.txt.base version Image-j7-evm.bin k3-j721e-pcie-backplane.dtbo ti-fs-firmware-j721e-gp.bin uenv.txt.disp_sharing ipc_echo_testb_mcu1_0_release_strip.xer5f k3-j721e-proc-board-tps65917.dtb tispl.bin uenv.txt.dra821a #3. To make it quick, may you share me your SD card contain files onto the TI drive? Thanks. BR Rio + +Rio, All i am using is the SDK prebuilt binaries: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/tisdk-default-image-j7-evm.tar.xz Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/966444.txt b/data2/text/range/0-5000/966444.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a3a878e9c2036fe338dccbc8c1d8568c2a0cbdb --- /dev/null +++ b/data2/text/range/0-5000/966444.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2X-How to boot from SSD (Solid State Drive) after TDA2 is successfully compiled to generate Linux system + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi Team, The customer successfully compiled the linux system according to PROCESSOR_SDK_VISION_03_08_00_00_setuplinux.bin. Successfully boot from SD card. The mmwcas_dsp_evm development board comes with a 512GB SSD. He wants to start the linux system from the SSD, is there any relevant guidance document for operation? Best Regards, Annie Liu + +Responses: +Hi Annie, We do not have support for booting linux from SSD on TDA2. That is not supported on our SDK. Best Regards, Keerthy + +Hi Keerthy, Customer has follow-up questions that need your help. Except booting from the SD card, is it able to boot from the SPI FLASH? If it supports SPI FLASH startup, how should it operate? Best regards, Annie + +Hi Annie, https://e2e.ti.com/support/processors/f/791/p/962457/3558003#3558003 As per the above thread only SD boot is supported on 3.8 VSDK. Best Regards, Keerthy + diff --git a/data2/text/range/0-5000/966767.txt b/data2/text/range/0-5000/966767.txt new file mode 100644 index 0000000000000000000000000000000000000000..3e3a5631dc53dff754e8242c303389bcfb8d2420 --- /dev/null +++ b/data2/text/range/0-5000/966767.txt @@ -0,0 +1,8 @@ +Ticket Name: Compiler/PROCESSOR-SDK-DRA8X-TDA4X: TIDL Multi_Cam Demo steps? + +Query Text: +Part Number: PROCESSOR-SDK-DRA8X-TDA4X Tool/software: TI C/C++ Compiler Hi Champs: #1. I'm using the SDK7.0.1 to demo with 4 Camera with TIDL. #2. I have read these documents: https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/vision_apps/docs/user_guide/group_apps_dl_demos_app_tidl_cam.html #3. However, the document is not matching the SDK7 TIDL contains. My camera seems show nothing on the screen. (I have connected 4 Sony IMX390 with FDPLink cables, those cables are the same with the TDA2 used). #4. Please see my log below and guide us how to output the camera demo for this TDA4 EVM + SDK7.0.1. THanks. BR Rio Multi_4_Cam_AI_Demo_Log.txt + +Responses: +Rio, You seem to have run many applications? Which application are you seeing an issue? These are are the available examples, app_tidl - file based object classification demo app_tidl_cam - camera based object classification demo (tested with single !MX390 camera) app_tidl_od - file based object detection demo app_tidl_seg - file based semantic segmentation demo app_tidl_avp/avp2/avp3 - file based multi-instance, multi-view demos and so on... + diff --git a/data2/text/range/0-5000/972967.txt b/data2/text/range/0-5000/972967.txt new file mode 100644 index 0000000000000000000000000000000000000000..06c59a0fc65fd517441a9a3983df56aeb13f76c5 --- /dev/null +++ b/data2/text/range/0-5000/972967.txt @@ -0,0 +1,46 @@ +Ticket Name: TDA2SG: TDA2 BOOT settings cause startup problems + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2, Hello expert We heard that if the hardware is set with two BOOT modes (SD card and QSPI FLASH), if the SD card of TDA2 is not disabled, there is a small probability that TDA2 will fail to start. I want to confirm whether there are other customers reporting this problem ? Is it necessary to change our current hardware BOOT configuration? (PS: The TDA2SG hardware BOOT of our current platform is set to sysboot[5:0]=000111, which can be booted from SD card and QSPI FLASH. We hope to achieve the following functions: After mass production, SOC can be booted from QSPI FLASH, and Upgrade the program in QSPI FLASH via SD card） + +Responses: +Hi, Which SDK version is being planned to be used in production? Best Regards, Keerthy + +Hi,Keerthy We use version 3.07 + +Hi, The supported boot modes in tda2xx is: Which boot mode are you using? Refer the below thread if you want to flash the images to the QSPI memory. Thanks Gaviraju + +Hi，Gaviraju We heard that there is a small chance that TDA2 cannot be booted from QSPI FLASH, when the hardware does not disable the SD card of TDA2, and the hardware has been set to two boot modes (SD card and QSPI FLASH). I want to confirm if there are other customers reporting this issue? Do we need to change our current hardware BOOT configuration? Our BOOT mode is shown in the screenshot, The TDA2x TRM version is Silicon Revision 2.0, 1.1 SDK version 3.07 + +Hi, On your board when you do not have the SD card with the above dip switch settings are you seeing that you see u-boot coming up from QSPI? Best Regards, Keerthy + +yes, when I do not have the SD card with the above dip switch settings , u-boot coming up from QSPI is OK . + +Hi, So the question is mainly with the consistency of the QSPI boot as back up boot mode when SD is primary correct? - Keerthy + +YES , How can I solve this problem without changing the hardware BOOTMODE setting? + +HI, user3378603 said: We heard that there is a small chance that TDA2 cannot be booted from QSPI FLASH, when the hardware does not disable the SD card of TDA2, and the hardware has been set to two boot modes (SD card and QSPI FLASH). Any document or e2e thread that is describing that? That would help me to check internally. Best Regards, Keerthy + +It seems that he has not solved this problem + +Thanks. I will check on this internally & get back by next week. Best Regards, Keerthy + +Hi, I am yet to receive a response from our experts. I will revert back as soon as i hear from them. Best Regards, Keerthy + +Hi, Our RoM code expert recommended NOT to use the settings(sysboot[5:0]=000111, which can be booted from SD card and QSPI FLASH) for production devices as SD boot mode has significant boot time impact before it switches to backup mode. Best Regards, Keerthy + +Hi，Keerthy The hardware we designed requires a QSPI FLASH boot mode, so which boot modes TI recommends us to upgrade the code of QSPI FLASH without such problems? Best Regards + +Hi, Could you please describe a bit more? I did not follow. QSPI as primary boot or secondary? - Keerthy + +HI,Keerthy Our products are mainly started by QSPI_4 boot. According to the requirements of Table 29-9. Booting Devices Order in the TRM manual. When QSPI is used as primary, is it necessary to use "Automotive Production Booting" in automotive product applications? Is there anything wrong with using "Memory Preferred Booting" (0b10 0b0111) for automotive products? When QSPI is used as secondary, is there anything wrong with using "Peripheral Preferred Booting" (0b00 0b0111) in automotive products? Best Regards + +Hi, I am yet to get a response from our RoM expert. I will keep you posted. Best Regards, Keerthy + +Hi, For peripheral boot with SD followed by QSPI _4 production boot mode there is an errate which can prevent device the device booting from QSPI_4. So we definitely don’t recommend this setting and suggest to use memory boot for production. Best Regards, Keerthy + +Thank you Keerthy , According to our current boot configuration(sysboot[5:0]=000111）, it seems that as long as the SD card is not inserted, there is no QSPI boot failure problem. By the way, is this problem in this Errata document? It seems that I did not find the relevant one! https://www.ti.com.cn/cn/lit/er/sprz397j/sprz397j.pdf?ts=1614580814431&ref_url=https%253A%252F%252Fwww.ti.com.cn%252Fproduct%252Fcn%252FTDA2SG%253FkeyMatch%253DTDA2%2526tisearch%253DSearch-CN-everything%2526usecase%253DGPN + +Hi, You are right no public documentation. I will get back if i find one but for the thread can we resolve this or you still blocked? - Keerthy + diff --git a/data2/text/range/0-5000/973141.txt b/data2/text/range/0-5000/973141.txt new file mode 100644 index 0000000000000000000000000000000000000000..326fc2eae7c5a28352916596dc005e044d4f986d --- /dev/null +++ b/data2/text/range/0-5000/973141.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: Codec is master, mcasp is slave, I2S record + +Query Text: +Part Number: TDA2SX Hi . TDA2S，sdk:PROCESSOR_SDK_VISION_03_05_00_00 linux 4.4.48 Codec is master, mcasp is slave, I2S record |------McaSP2_ACLKR ----->-| master codec |------MCASP2_FSR--------->-| tda2sx |------MCASP2_AXR0------>- | McaSP2_ Aclkr input 3.072Mhz MCASP2_FSR input 47Khz root@dra7xx-evm:~# arecord -r 48 > path_to_example_audio.wav Recording WAVE 'stdin' : Unsigned 8 bit, Rate 48000 Hz, Mono SND_SOC_DAIFMT_AC97 codec is clock and frame master path_ to_ example_ audio.wav There is only one header, 44byte， No recorded data I want to know how to check the problem, please give me some advice. thank you + +Responses: +Hello, sorry for the delayed response. were you able to make any progress during this time? typically we start by checking the most likely: 1. the clock master from the codec is live 2. check McASP registers to ensure it is configuration with right mode... please update the thread if the debug is ongoing. Jian + diff --git a/data2/text/range/0-5000/974216.txt b/data2/text/range/0-5000/974216.txt new file mode 100644 index 0000000000000000000000000000000000000000..f276c0d9dff26de1e3cc848e361c2f4cc616057e --- /dev/null +++ b/data2/text/range/0-5000/974216.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA4VM: ERROR: 'dot' tool not found. Make sure 'graphviz' is installed and 'dot' command is added to system PATH !!! + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 i get this error when i run the sample code in tiovx. I have installed graphiz. ERROR: 'dot' tool not found. Make sure 'graphviz' is installed and 'dot' command is added to system PATH !!! ERROR: Cannot generate .jpg file !!! + +Responses: +Hello, Could you please provide the following details? 1. Which SDK version are you using? 2. Which sample code are you running? 3. Are you running on the EVM or PC emulation mode? 4. Have you run the script "./psdk_rtos/scripts/setup_psdk_rtos.sh"? Regards, Lucas + +1. the SDK version i was using is this :-https://git.ti.com/cgit/processor-sdk/tiovx/tree?h=master 2. same code given in this path:- /tiovx/tools/sample_use_cases. I followed this link:- http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tiovx/docs/user_guide/PYTIOVX.html 3. PC emulation mode currently. 4. no. where can i find the script?? + + + +Hello, The TIOVX version you linked to is an older version of TIOVX intended for support on TDA2/TDA3 SoC's. If you are intending to run TIOVX on TDA4, I would recommend downloading TIOVX as a part of the below SDK, as it includes the dependencies as well as scripts to download external tools needed to run the SDK. Additionally, the PyTIOVX tool is only supported for kernel generation. The use case development feature is experimental and is thus unsupported in our SDK. For developing applications using OpenVX, we recommend referencing the vision_apps project included within the SDK linked to above. Regards, Lucas + +Does this require ubuntu18.04?? Will it wok on Ubuntu 16.04?? + +Hello, It is untested on Ubuntu 16.04, so it is recommended to upgrade to Ubuntu 18.04. Regards, Lucas + +Okay Let me try. + +is this windows installer??can it be used in linux?? + +Hello, Yes, all components are supported in Linux. Regards, Lucas + +Okay , thank you resolved the issue. + diff --git a/data2/text/range/0-5000/974361.txt b/data2/text/range/0-5000/974361.txt new file mode 100644 index 0000000000000000000000000000000000000000..340ace5eaa1a47044f266c038ca15e503f9651cb --- /dev/null +++ b/data2/text/range/0-5000/974361.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA4VM: TIOVX samples + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: SYSBIOS, TDA2 Hi Team, Good day. Our customer has clone this repo www.google.com/url for building TIOVX and getting the following error. Building vx_framework.lib as static library [TIARM] Compiling C tivx_event.c "/home/devuser/Github_codes/tiovx/tiovx/source/platform/vision_sdk/bios/tivx_event.c", line 13: fatal error #1965: cannot open source file "xdc/std.h" 1 catastrophic error detected in the compilation of "/home/devuser/Github_codes/tiovx/tiovx/source/platform/vision_sdk/bios/tivx_event.c". Compilation terminated. >> Compilation failure concerto/finale.mak:287: recipe for target '/home/devuser/Github_codes/tiovx/tiovx/out/TDAX/M4/SYSBIOS/debug/module/source.platform.vision_sdk.bios/tivx_event.obj' failed make: *** [/home/devuser/Github_codes/tiovx/tiovx/out/TDAX/M4/SYSBIOS/debug/module/source.platform.vision_sdk.bios/tivx_event.obj] Error 1 The customer was trying to implement TIOVX samples on their linux system and in future they will trying to implement it in a TDA4X EVM development board. Do we have information regarding building TIOVX and sample implementation of Openvx? Regards, Carlo + +Responses: +Hello Carlo, We would recommend downloading the PSDK RTOS which includes the TIOVX project as well as all dependencies for building. The provided link is the TIOVX version intended to support TDA2/TDA3 devices, and therefore requires additional TDA2/TDA3 dependencies to build. The PSDK RTOS can be downloaded at the below link. Information in the below links is provided to show how to build the entire SDK as well as details on how to build TIOVX. Please let me know if you have further questions. Regards, Lucas + diff --git a/data2/text/range/0-5000/974751.txt b/data2/text/range/0-5000/974751.txt new file mode 100644 index 0000000000000000000000000000000000000000..c96b74b7438e7359de4636efeb4d820335946740 --- /dev/null +++ b/data2/text/range/0-5000/974751.txt @@ -0,0 +1,12 @@ +Ticket Name: TIDEP-01017: MLO file selection + +Query Text: +Part Number: TIDEP-01017 Other Parts Discussed in Thread: TDA2 Hi Team, My customer just developing their own software using PROCESSOR_SDK_RADER for TIDEP-01017 When they run "gmake -s sbl" in PROCESSOR_SDK_RADER_03_08_00_00 environment, they get MLO files in 4 folders: opp_high, opp_low, opp_nom, opp_od under "vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\sbl\sd" folder. which MLO file should they select for TDA2 mounted on TIDEP-01017? They think they need to select an MLO file according to OPP (Operating Performance Points). Regadrs, Takashi Onawa + +Responses: +Hi Team, Can I have any comments on this? Regards, Takashi Onawa + +Hi Team, Can I have any comments on this? Regards, Takashi Onawa + +Hi Takashi, You can use any of the MLOs in the folder. I suggest that you start with OPP_NOM. Regards Karthik + diff --git a/data2/text/range/0-5000/979569.txt b/data2/text/range/0-5000/979569.txt new file mode 100644 index 0000000000000000000000000000000000000000..5a69eaa7cc8bfb72d28ef15488f55f5b4a3cb477 --- /dev/null +++ b/data2/text/range/0-5000/979569.txt @@ -0,0 +1,16 @@ +Ticket Name: [FAQ] TDA4VM: Linux DTS DTB FAQs + +Query Text: +Part Number: TDA4VM I have the following questions: How to know which driver is probed with a particular Device tree node? How to know which CONFIG to be enabled to probe a particular Device tree node? How to get the DTS(device tree source) of a particular DTB(device tree binary)? + +Responses: +Answers to questions in the order: How to know which driver is probed with a particular Device tree node? They key lies in the compatible string. For example ospi0 node: ospi0: spi@47040000 { + compatible = "ti,j721e-ospi", "ti,am654-ospi"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = ; + cdns,fifo-depth = <256>; + Search for compatible strings under drivers folder of Linux repository starting from first to last in order. Continuing with our ospi0 example: git grep ti,j721e-ospi drivers/ + No matches found so search for the next compatible. git grep ti,am654-ospi drivers/ drivers/mtd/spi-nor/cadence-quadspi.c: .compatible = "ti,am654-ospi", Ospi0 probes the drivers/mtd/spi-nor/cadence-quadspi.c driver. How to know which CONFIG to be enabled to probe a particular Device tree node? Follow the steps for Q1 and once you know the driver name. Continuing with our ospi0 example. Couple of more steps to get to the CONFIG option: Driver: drivers/mtd/spi-nor/cadence-quadspi.c driver. Open the Makefile in the folder that has the driver. vi drivers/mtd/spi-nor/Makefile + Search for cadence-quadspi.o (Driver name with object extension) obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o CONFIG_SPI_CADENCE_QUADSPI option corresponds to ospi0 node. How to get the DTS(device tree source) of a particular DTB(device tree binary)? cd to the Linux repo. Example: Source for k3-am654-r5-base-board.dtb. scripts/dtc/dtc -I dtb -O dts -o devicetree.dts arch/arm/dts/k3-am654-r5-base-board.dtb The source will be saved as devicetree.dts Regards, Keerthy + diff --git a/data2/text/range/0-5000/980202.txt b/data2/text/range/0-5000/980202.txt new file mode 100644 index 0000000000000000000000000000000000000000..dda99bf12c43759e2d7587d8dcbad2874bc8b901 --- /dev/null +++ b/data2/text/range/0-5000/980202.txt @@ -0,0 +1,9 @@ +Ticket Name: TDA4VM: How to modify TDA4VM's csi clock in SDK07_02_00_06 ? + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, I have a deserializer MAX9286, it works well when four cameras opened. But when just two or one camera opened, then TDA4VM cannot receive csi signal. This situation occured in TDA2 also. And it can through modify csi clock to fix. In TDA4VM I try to modify uint32_t csi_ddr_clock to lower value, but it not works. So How to modify TDA4VM's csi clock in SDK07_02_00_06 ? Regards + +Responses: +Hi, CSI clock in TDA4VM is controlled through lane speed parameter. This parameter can be configured through 'laneBandSpeed' parameter available in Capture Node interface 'kernels_j7/include/TI/j7_capture.h'. Please refer 'j7_capture.h' for more details. Here is an example to change lane speed/CSI clock: Consider single cam app, if you want to change lane speed to 800 Mbps in this app, then just add following line before creating capture node (done @ line no. 523): local_capture_config.instCfg[CAPT_INST_ID].laneBandSpeed = TIVX_CAPTURE_LANE_BAND_SPEED_720_TO_800_MBPS; + Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + diff --git a/data2/text/range/0-5000/980634.txt b/data2/text/range/0-5000/980634.txt new file mode 100644 index 0000000000000000000000000000000000000000..54d0a228ecb1bc606c7a41b79043c6e5d0100d9f --- /dev/null +++ b/data2/text/range/0-5000/980634.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: Questions: About yuv422 display + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi, Support The processor we use is TDA2 ECO 23*23. My video output resolution is 1780*720, When I RGB output video, everything is normal. When I yuv output, a part of the picture is green in external display.I used dss to convert rgb to yuv, it was normal before conversion, and part of it was green after conversion.I use jtag dump dss link image,i use 7yuv to view the image. When the resolution is 1780*720, the image is distorted and some parts are green. When the resolution is 1784*720, the image is not distorted, but there are green parts. + +Responses: +Hi yongzheng lv, The first issue is due to pitch/line offset, it must be 16byte aligned. 1780x2 is not 16byte aligned. but 1784x2 is 16byte aligned. I think Green bar is due to input image. Are you sure sensor is outputting frame of size 720 lines? Rgds, Brijesh + diff --git a/data2/text/range/0-5000/982164.txt b/data2/text/range/0-5000/982164.txt new file mode 100644 index 0000000000000000000000000000000000000000..e16a8aa6882cdd591417c77418ddf8eeb2302f68 --- /dev/null +++ b/data2/text/range/0-5000/982164.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2E: Multiple VLANs use the same IP address,how to configure? + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 There is such a problem in the customer's project requirements. Multiple VLANs need to be configured on TDA2EX SOC , but they all use the same IP address. What kind of configuration do you have here. If I configure the IP address directly, there will be conflicts and ARP will not work. + +Responses: +Hi, Which SDK are you using ? CPSW does support VLAN Can you provide more details about your setup ? Regards Vineet + +I'm using vsdk version 3.6. Well, I mean: I use the vconfig command to configure VLAN, and the results are as follows: eth0.2 and eth0.4 sub nodes. Then I configure this node to the same IP address 172.16.2.92, so that the network function is not working. I try to Ping other 192.16.2.xxx networks. If I want several VLAN nodes to set the same IP address and the network can be connected, how can I modify it? root@dra7xx-evm:~# ifconfig eth0 Link encap:Ethernet HWaddr F8:36:9B:C2:12:64 inet addr:172.16.2.92 Bcast:172.16.255.255 Mask:255.255.0.0 UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:97 eth0.2 Link encap:Ethernet HWaddr 02:47:57:4D:00:92 inet addr:172.16.2.92 Bcast:172.16.2.255 Mask:255.255.255.0 inet6 addr: fe80::47:57ff:fe4d:92%131824/64 Scope:Link UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) eth0.4 Link encap:Ethernet HWaddr 02:47:57:4D:00:92 inet addr:172.16.2.92 Bcast:172.16.255.255 Mask:255.255.0.0 inet6 addr: fe80::47:57ff:fe4d:92%131824/64 Scope:Link UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%131824/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) root@dra7xx-evm:~# ping 172.16.2.XXX + +Hi, I tried to add VLAN to CPSW interface eth1 on AM57 (same CPSW) using the commands 1. vconfig add eth1 5 (adding VLAN 5 to eth1 interface) 2. ip addr add 192.168.0.3/24 dev eth1.5 3. ip link set eth1.5 up With this I was able to configure VLAN ID of 5 for the virtual interface eth1.5 When I ping from eth1.5 using "ping -I eth1.5" I can see that outgoing ARP has VLAN ID=5. I think this confirms that VLAN interface is working. Regarding the ping issue, I think this is a generic network configuration issue on Linux and nothing to do with CPSW driver. You can take a look at these threads Regards Vineet + +Yes, this should be a Linux system problem, We just want to ask you, if you modify the configuration of Linux system according to the requirements of customers, can you achieve such functional requirements? Or is this kind of customer demand theoretically unreasonable? + +OK, we know that VLAN function on tda2 is good. We just want to know how to realize the function of external network communication of multiple VLANs + +Hi, The network configuration will depend on the actual system that customer is using. I haven't done it myself but I am guessing that it would require setting up IP routing, enabling VLAN, trunking multiple virtual interfaces. I am sorry, but I cannot help you further with this as it does not relate to the HW or TI software. Regards Vineet + diff --git a/data2/text/range/0-5000/985463.txt b/data2/text/range/0-5000/985463.txt new file mode 100644 index 0000000000000000000000000000000000000000..a40450f26a00cc21f09303697424cf066a0d87df --- /dev/null +++ b/data2/text/range/0-5000/985463.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2EG-17: TDA2 EVE performance vs DDR + +Query Text: +Part Number: TDA2EG-17 Hi Champs: Customer places the DDR as 1 channel, type, (not interleaving type. Here is their finding as the below ------------------ we found that DL accelerators on TDA2xx platform(EVEs) are running in parallel which processing independent frame on each core. It brings about system will increase frame rate by adding more EVE cores, but the system will get the similar latency by such upgrade. So, there are some problem related to achieve latency sensitive(<33ms, 30 fps) application on TDA2xx platform to our project. ------------------ Do we have the solution / comment to help them improves the Latency? BR Rio + +Responses: +Hi Rio, Apologies for delay in repose. Can you share the Standalone DL performance when you have only one EVE running and when you have all the EVE cores running the same DL in paralle. + diff --git a/data2/text/range/0-5000/986098.txt b/data2/text/range/0-5000/986098.txt new file mode 100644 index 0000000000000000000000000000000000000000..3a5eacfaeb4ee258f684c916d6e76ebf811536ed --- /dev/null +++ b/data2/text/range/0-5000/986098.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: How to create Mcasp I2S driver on RTOS? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, I follow TDA2 TRM Figure 24-126. McASP DIT- /TDM- Transmission Polling Method. And try to implement in CSL drv_stw_lld_mcasp_sinetone_app. My program stops at this stage after the second loop. + +Responses: +Can anyone explain the operation flow of the blocks on the flowchart? + + + +Are there TI Audio experts who can answer? + +Hi Jian: May you help to reply this E2E, it pended for > 2 weeks. BR Rio + +any update? + diff --git a/data2/text/range/0-5000/986576.txt b/data2/text/range/0-5000/986576.txt new file mode 100644 index 0000000000000000000000000000000000000000..9bd9c093491dccc189132f6408a302ea14e0ab51 --- /dev/null +++ b/data2/text/range/0-5000/986576.txt @@ -0,0 +1,8 @@ +Ticket Name: TIDL trace fixed point converted to floating point + +Query Text: +Dear TIDL expert In order to check TIDL SSD model convert result, I try to convert fixed point into floating point, as following, I try to convert it based on CVPR workshop paper from Ti company I found I get no reasonale result, it's large floating point number and no normal. When I check TIDeepLearningLibrary_UserGuide.pdf, I find some useful information as following, And I also see log from model convert tools as following, Can I provide me with specific implementation plan to convert from fixed point to floating point? Thank you very much ! + +Responses: +Hi, You no need to convert fixed point to floating point as we dump final output in the float mode for SSD, so you will get directly final float output in "stats_tool_out.bin" file. You just need to open and read the detection's from this file. You can refer to "markbox.c" file in the below thread to know how to read the detection's from this "stats_tool_out.bin" file. https://e2e.ti.com/support/processors/f/processors-forum/679186/tda2-tidl-1-1-ssd-model-test-application-output/2502331#2502331 Thanks, Praveen + diff --git a/data2/text/range/0-5000/988606.txt b/data2/text/range/0-5000/988606.txt new file mode 100644 index 0000000000000000000000000000000000000000..271624dbf897ac6e789dc821075b3d3a17ad1f6e --- /dev/null +++ b/data2/text/range/0-5000/988606.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: Failed to connect display in libilmCommon + +Query Text: +Part Number: TDA2PXEVM Hi I am trying to run Qt application on Jacinto6 plus board but it is failing with the following error. Please suggest how to solve it. Failed to connect display in libilmCommon Interpreter error: failed Failed to connect display in libilmCommon Interpreter error: failed Failed to connect display in libilmCommon Interpreter error: failed Thank you, Deepthi + +Responses: +Hi Deepthi, Can you please provide some more details on the issue. What SDK is being used, what is working so far?. At what point is the error seen, and what application is under test? Please be aware of the below related threads: TDA2EVM5777: I want to use Qt on TDA2EVM5777, what should I do? - Processors forum - Processors - TI E2E support forums (+) Qt App Development For Processor SDK Linux Automotive - Processors forum - Processors - TI E2E support forums (+) Linux/TDA2: build the PSDK by yocto, error:unknown type name 'ucs4_t' - Processors forum - Processors - TI E2E support forums Regards, kb + diff --git a/data2/text/range/0-5000/988936.txt b/data2/text/range/0-5000/988936.txt new file mode 100644 index 0000000000000000000000000000000000000000..f620b4fe3c3a94450c5b293c623df064fdb0a9b8 --- /dev/null +++ b/data2/text/range/0-5000/988936.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2E: about mipi csi data type issues + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 hi, ti support The processor we use is TDA2 ECO 23*23. There are 4 cameras in our system. The interface connected to the deserializer (DS90UB960) is the mipicsi interface. The resolution of our camera is 1280*1280, and the format is yuv422 uyvy, On tda2, we use datatype 0x1e( pOutPrm->inCsi2DataFormat = SYSTEM_CSI2_YUV422_8B) to receive .but now we have a new requirement. We have added a line (1281*1280), this line is embed line, datatype It is 0x12. How should we configure it to receive data of two datatypes in tda2? The picture shows the value of the ub960 register： + +Responses: +Hi yongzheng, You would just require to add DMA channel to capturing blanking data, as show below. Please note this is capture link parameters. for(ch = 0;ch < 2;ch++) { pOutPrm = &pCapturePrm->outParams[ch]; pOutPrm->dataFormat = pOutPrm0->dataFormat; pOutPrm->width = pOutPrm0->width; pOutPrm->height = pOutPrm0->height; pOutPrm->maxWidth = pOutPrm0->maxWidth; pOutPrm->maxHeight = pOutPrm0->maxHeight; pOutPrm->numOutBuf = pOutPrm0->numOutBuf; if (0 == i) pOutPrm->inCsi2DataFormat = 0x1B; // for YUV422 8bit data else pOutPrm->inCsi2DataFormat = 0x12; // for embedded data. pOutPrm->inCsi2VirtualChanNum = ch; } Regards, Brijesh + diff --git a/data2/text/range/0-5000/989706.txt b/data2/text/range/0-5000/989706.txt new file mode 100644 index 0000000000000000000000000000000000000000..fcaacf1d8301f89f78ddd0f1c41d060fe6995dd9 --- /dev/null +++ b/data2/text/range/0-5000/989706.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2HF: Power consumption for different Ti SoC + +Query Text: +Part Number: TDA2HF Other Parts Discussed in Thread: TDA2SX, Hi, We made TDA2Sx custom board and we ported all our use cases into TDA2Sx custom board and it consumed more power. We want to check with other Ti SoC's, So we want to know the power consumption of different Ti SoC's. please share the comparison of power consumption between below SOC in terms of percentage as compared to TDA2sx TDA2Px TDA2HF TDA3x Please share this comparison irrespective of use cases, just power on and boot with all cores in that SOC enabled. Thanks & Regards, Sankar. + +Responses: +Sankar, In very rough numbers ... TDA2Px is 20 to 50% higher power than TDA2x, and TDA3x is ~30 to 50% of TDA2x. TDA2HF is the same device as TDA2S with a different mix of cores enabled and different frequencies supported. Regards, Kyle + +Hi Kyle, Thanks for your valuable information. Thanks & Regards, Sankar + diff --git a/data2/text/range/0-5000/992588.txt b/data2/text/range/0-5000/992588.txt new file mode 100644 index 0000000000000000000000000000000000000000..ae1d8d50469fc96c52a55aa68a32145a1d03128a --- /dev/null +++ b/data2/text/range/0-5000/992588.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2P-ACD: TI PinMux Tool doesn't generate devicetree.txt + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Hello, I am trying to use TI PinMux Tool to generate devicetree.txt then I can integrate these nodes inside my board dts. The issue is that what ever change I make in the pins configuration, there is no change reflected in devicetree.txt file, however I can see changes in other files (e.g. boardPadDelayInit.c and genericFileFormatPadConf.txt) How can I make the configurations reflect in devicetree.txt ? Thanks, Abdalla + +Responses: +Hi, A detailed application note of how to configure pinmux for TDA2 is here: https://www.ti.com/lit/an/sprac44a/sprac44a.pdf?ts=1618200162219 Please go through that. Best Regards, Keerthy + +Hi Keerthy, Thank you for your reply, however I can't find anything in the document about devicetree.txt generation by TI PinMux tool. My question is: why doesn't the the PinMux tool generate devicetree.txt for my target as shown in the screenshots I attached ? I am wondering if you can generate devicetree.txt on your end for the same device target ? Best Regards, Abdalla + +Hi Keerthy, According to the comment in devicetree.txt (Only MMC modes are exported here. All other pad configuration must be done by u-boot.) What is the effect if I only configure the RGMII pins in kernel dts without configuring them in uboot ? Does this affect the functionality of the mac port on SoC after kernel boot ? Thanks, Abdalla + +Hi, Can you not do that in "board/ti/dra7xx/mux_data.h" under u-boot? - Keerthy + diff --git a/data2/text/range/0-5000/993975.txt b/data2/text/range/0-5000/993975.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e581de08901fcc1ee78a7b37d4c247e1717a0ba --- /dev/null +++ b/data2/text/range/0-5000/993975.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: HOW TO USE THE SM OF TDA2 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi NOW i use TDA2X do ADAS product and its related safety feature.i got the safety manual from TI,but the safety manual is unclear to describe related safety mechanisms and how to use the related SM;it needs lot of time to study the technical reference manual of TDA2 and it is very diffcult for us. so could you share some experience to config TDA2 SM or do you know TI could provide the safety related software LIB? Thanks a lot! + +Responses: +Hi Xingchao, Please see the Safety Folder on CDDS for TDA2x. There you will find a folder (Getting started...…) with additional videos that can be reviewed. Safety: US - https://cdds.ext.ti.com/ematrix/common/emxNavigator.jsp?objectId=28670.42872.4722.40558 If you do not have access to this link, please work with you local TI contact to get access. Regards, kb + diff --git a/data2/text/range/0-5000/994997.txt b/data2/text/range/0-5000/994997.txt new file mode 100644 index 0000000000000000000000000000000000000000..1f01f96c2a67e6211c3f4be82ce9feb0d31842a6 --- /dev/null +++ b/data2/text/range/0-5000/994997.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2SX: How to improve the size of GPU video memory + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 We use QT in our project and find that the GPU is short of video memory. I see that the memory of PVR is about 160MB. How can I improve the memory of PVR? I tried to change the size of CMA, but it didn't work. root@dra7xx-evm:/proc/pvr# cat mem_areas Number of Linux Memory Areas: 897 At the current water mark these areas correspond to 164007936 bytes (excluding SUB areas) At the highest water mark these areas corresponded to 164007936 bytes (excluding SUB areas) root@dra7xx-evm:/proc/pvr# cat /proc/meminfo MemTotal: 599572 kB MemFree: 222012 kB MemAvailable: 267416 kB Buffers: 212 kB Cached: 94036 kB SwapCached: 0 kB Active: 95780 kB Inactive: 75624 kB Active(anon): 77160 kB Inactive(anon): 45268 kB Active(file): 18620 kB Inactive(file): 30356 kB Unevictable: 0 kB Mlocked: 0 kB HighTotal: 259072 kB HighFree: 143032 kB LowTotal: 340500 kB LowFree: 78980 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 0 kB Writeback: 0 kB AnonPages: 77148 kB Mapped: 167872 kB Shmem: 45280 kB Slab: 15884 kB SReclaimable: 4472 kB SUnreclaim: 11412 kB KernelStack: 1424 kB PageTables: 2336 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 299784 kB Committed_AS: 896872 kB VmallocTotal: 245760 kB VmallocUsed: 0 kB VmallocChunk: 0 kB CmaTotal: 212992 kB CmaFree: 48636 kB + +Responses: +Hello, TDA2 is a shared memory architecture and there is no dedicated video memory for the GPU. GPU cannot however access highmem so the amount of internal memory available to the GPU is limited by lowmem. In addition to internal memory, GPU also needs display bound buffers that are either CMA or DRM managed. But since, increasing CMA does not help in your case, you are likely running out of overall memory available in low memory regions. Regards Hemant + diff --git a/data2/text/range/0-5000/995934.txt b/data2/text/range/0-5000/995934.txt new file mode 100644 index 0000000000000000000000000000000000000000..3cd5327685c7410a8e60c22b106509daabfdda7f --- /dev/null +++ b/data2/text/range/0-5000/995934.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: Does TDA2 support pSLC for NAND? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Expert Does TDA2 support pSLC for NAND? Thanks Daniel + +Responses: +Daniel, Which interface? We do support pSLC NAND for MMC modules. Best Regards, Shiou Mei + +Hi Shiou Mei Could I use this? Automotive PN：FEMDMW008G-88A37 -40°C to +85°C (pSLC) Thanks Daniel + +Daniel, I have received confirmation we do not support ROM code boot from pSLC NAND flash memories. Best Regards, Shiou Mei + diff --git a/data2/text/range/0-5000/997331.txt b/data2/text/range/0-5000/997331.txt new file mode 100644 index 0000000000000000000000000000000000000000..f4f0f3597c07bbf501063109d19c3a13c0f795a8 --- /dev/null +++ b/data2/text/range/0-5000/997331.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SX: TDA2SXBTQABCRQ1 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, 1. TRM里关于DEVICE 的watchdog与DATASHEET里不一致，如下两张图红色部分 2. TDA2中watchdog一共有几个？具体是监控哪些功能模块？我司这边针对TDA2的功能模块划分参考TDA2 safety manual Chapter 3.8的下一级章节； 麻烦给个清单说明位于哪里的watchdog监控了哪些功能模块。 + +Responses: +Hi, Could you please post the question in English? Regards Karthik + +1. The state of TDA2SX in the TRM and datasheet is different. The device includes one watchdog timer in the TRM, while includes two watchdog timer in the datasheet. Why？ Can you explain? + +2. How many watchdogs in TDA2SX? And which module are monitored by the watchdog? The module in TDA2SX can refer to the next level of safety manual chapter 3.8, for example, MPU subsystem, DSP subsystem, NOC L3 interconnect subsystem and OCMC subsystem etc. It would be better if you give a list of watchdog classification, and its corresponding monitoring module. Thank you! + +Hi, I noticed that you already asked this question on a different thread: https://e2e.ti.com/support/processors/f/processors-forum/997911/tda2sx-tda2sxbtqabcrq1 I'm closing this duplicate post. Regards Karthik + diff --git a/data2/text/range/0-5000/997532.txt b/data2/text/range/0-5000/997532.txt new file mode 100644 index 0000000000000000000000000000000000000000..aefe051de8cdaf061bcf7b6d03410fd4bba39181 --- /dev/null +++ b/data2/text/range/0-5000/997532.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: system DMA and EDMA + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi Waht's different between System DMA and EDMA of TDA2 Thanks a lot! + +Responses: +Hi, Please refer to Ch 16 DMA Controllers in TDA2x Technical Reference Manual. We recommend to use EDMA. Regards, Stanley + +if you don't know how to answer this question, don't answer , if let me to look for TRM, it is nomeaning. + +This information is already documented very clearly in TRM. Is there anything not clear in TRM? Or, do you have some specific about your use case where you have to evaluate which DMA engine to use? + diff --git a/data2/text/range/0-5000/997911.txt b/data2/text/range/0-5000/997911.txt new file mode 100644 index 0000000000000000000000000000000000000000..54306341f5c0c0656d36faea73f4a671303f4fca --- /dev/null +++ b/data2/text/range/0-5000/997911.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SX: TDA2SXBTQABCRQ1 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 1. The state of TDA2Sx watchdog in the TRM is, the device includes one watchdog timer. While in the datasheet of TDA2Sx, the state is that the device has two watchdog timers. Why? 2. How many watchdogs in TDA2Sx? And which modules does these watchdog monitoring? Our company used the TDA2 module classification in the safety manual Chapter 3.8. Maybe you can give a list of watchdog in TDA2SX and their corresponding monitoring module (modules refer to safety manual Chapter 3.8). thank you！ + +Responses: +Section 4.3.6 from the TRM clarifies this: "The MPU watchdog timer (MPU_WD_TIMER) implements two channels, one per MPU core (MPU_WD_TIMER_C0 and MPU_WD_TIMER_C1, respectively" So there is "one" watchdog timer with 2 independent channels. Each one has an independent period with its own interrupts, so effectively it is like having two timers. I'm not sure what you mean by corresponding monitoring module. Could you specify what safety manual you are referring to? Regards, Zack + +The safety manual is TDA2_TDA2P_DRA7_safety_manual_spruii9 Thank you! + +The watchdog timers in TDA2 do not correspond to any monitoring module, so I'm not sure what your question is. As the safety manual says in section 3.8.3.2: "The watchdog is a traditional single-threshold watchdog. The user programs a reload value to the watchdog, and must provide a predetermined “pet” response to the watchdog before the timeout counter overflows. Overflow of the timeout counter triggers an error response. The watchdog can issue either an internal (warm) system reset or a CPU interrupt upon detection of a failure." So it's unrelated to the other modules in section 3.8. Let me know if you have any other questions. + +the first question : how many watch dog timer and its location is at which module for TDA2SX? + +There are actually 2 watchdog timers. The one I reference above is in the MCU domain, and is described in section 4.3.6 of the device TRM. The other is the system watchdog timer, and is in the PD_WKUPAON power domain. + diff --git a/data2/text/range/0-5000/999837.txt b/data2/text/range/0-5000/999837.txt new file mode 100644 index 0000000000000000000000000000000000000000..dd1c65a76f1def48a325d8765db75015210716d3 --- /dev/null +++ b/data2/text/range/0-5000/999837.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2SG: Tidl in vsdk3.7 , how many network can I run in the tda2s. + +Query Text: +Part Number: TDA2SG Hi, All experts: I want to run more than one networks in the tda2s,I can run ok like the demo run, but it only can run one network, how can I run more network and different networks in the tidl? Thanks! + +Responses: +Hi, We have maximum 4 EVEs, each of them can run separate/different networks, please refer to TIDL use cases in vision SDK. Thanks, Praveen + +if I want to 1 eve can process 15-20 frames ,how can I do? Now I find it only can do 4-5 frames + +Hi, You may have to update the below parameters in the "deploy.prototxt" file and re-import the model and check. keep_top_k: 20 confidence_threshold: 0.15 For more details pls refer to below e2e thread. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/689617/tda2-how-to-run-ssd-based-tidl-od-use-case-in-vision-sdk-with-pre-trained-model Thanks, Praveen + +Hi，this setting can do 20 frames when usecase use 4eves,but I want only 1eve to process 15-20frams, Has 1 eve can satisfy? + +No, one eve can't satisfy. Thanks, Praveen + diff --git a/data2/text/range/0-5000/999935.txt b/data2/text/range/0-5000/999935.txt new file mode 100644 index 0000000000000000000000000000000000000000..0370df7938bd9d90e454984f4d1f4b2f113bd07f --- /dev/null +++ b/data2/text/range/0-5000/999935.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2PXEVM: please share EVE Programmer's Guide doc to us + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 HI my friends, recently, we are developing on TDA2 , and we need to study EVE, but we don't have EVE's programmer guide, we need it. please share it to us. Thanks a lot. Best Regards, Charles.Shu + +Responses: +Hi Charles, it requires NDA, so you may need to contact your local TI's representative and we can enable via TI CDDS delivery mechanism for you Regards, Pramod + diff --git a/data2/text/range/10001-15000/1000256.txt b/data2/text/range/10001-15000/1000256.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa859411d43302912e9bd7271f0bd11a5def7bbf --- /dev/null +++ b/data2/text/range/10001-15000/1000256.txt @@ -0,0 +1,54 @@ +Ticket Name: 【TDA2EX】usecase 's chains_vipSingleCam_Display + +Query Text: +Other Parts Discussed in Thread: TDA2EG-17, TDA2 Dear all, I am a beginner , I have a question About Tda2ex Vision_SDK V03.08 The sensor I use is VID_SENSOR_SAT0088_OV1063X My Pinmux is set up . I cannot detect my ub96x version , Didn’t register him in I2c? Are there relevant documents to help understand this part of the problem? Or tell me how to solve it ! ----------------------------------------(About Key program)-------------------------------------------------- (Bsputils_ub960.c Func Name:BspUtils_appGetUb96xVersion) retVal = Bsp_deviceRead8( UB960_ACCESSIBLE_FROM_I2C_INST, //1 gSlaveAliases[instId].slaveAddr,//0x3D &tempAddr, //0xF5 &tempData, //0x00 (UInt32) 1U); ******************************************************************************************************* (bsp_deviceI2c.c Func Name :Bsp_deviceRead8) retVal = GIO_submit( gBspDevObj.i2cHndl[i2cInstId], How to register or be assigned?? Is this the problem? (UInt32) IOM_WRITE, &i2cParams, &i2cParams.bufLen, NULL); ------------------------------------------------------------------------------------------------------- My log is ------------------------------------------------------------------------------------------------------ [IPU1-0] 28.636399 s: i2cMdSubmitChan: i2c transfer Timeout IRQ not received [IPU1-0] 28.637802 s: src/bsp_deviceI2c.c @ Line 352: [IPU1-0] 28.637894 s: Nrtos I2C4: DEV 0x3d: RD 0xf5 ... ERROR !!! [IPU1-0] 28.638260 s: src/bsp_deviceI2c.c @ Line 420: [IPU1-0] 28.638351 s: I2C4: Error timeout 5002 ms!!! [IPU1-0] 28.638443 s: Updated UB964 to 2 Lanes !!! [IPU1-0] 28.638504 s: BspUtils_appGetUb96xVersion [IPU1-0] 33.638382 s: [IPU1-0] 33.638626 s: i2cMdSubmitChan: i2c transfer Timeout IRQ not received [IPU1-0] 33.640029 s: src/bsp_deviceI2c.c @ Line 352: [IPU1-0] 33.640120 s: Nrtos I2C4: DEV 0x3d: RD 0xf5 ... ERROR !!! [IPU1-0] 33.640395 s: src/bsp_deviceI2c.c @ Line 420: [IPU1-0] 33.640486 s: I2C4: Error timeout 5001 ms!!! [IPU1-0] 38.640395 s: [IPU1-0] 38.640669 s: i2cMdSubmitChan: i2c transfer Timeout IRQ not received [IPU1-0] 38.642072 s: src/bsp_deviceI2c.c @ Line 588: [IPU1-0] 38.642164 s: I2C4: DEV 0x3d: WR 0x01 = 0x03 ... ERROR !!! [IPU1-0] 38.642255 s: src/bsp_deviceI2c.c @ Line 610: [IPU1-0] 38.642347 s: I2C4: Error timeout 5002 ms!!! [IPU1-0] 38.642438 s: src/bsputils_ub960.c @ Line 1321: [IPU1-0] 38.642530 s: Could not configure UB960 !!! ------------------------------------------------------------------------------------ THANK YOU!!!>< + +Responses: +Hi David, Please refer to your board schematic to figure out ub960 i2c address. Regards, Brijesh + +Dear Brijesh, This is my I2c setting, Is there something wrong? Thanks!! + +TDA2eg-17 datasheet + +Hi David, this tells that ub96x is connected over i2c4 lines, but not what is the i2c client address.. On EVM, we typically use 0x30 or 0x3D addresses, but it really depends on two inputs lines to the ub96x. Depending on these two lines, i2c address is decided. Please check your schematic and ub96x data sheet to understand and to know i2c address for ub96x. Regards, Brijesh + +Dear Brijesh, ----------------------------------------------------------------- Q1: Our image camera uses the serdes interface The receiver of the serdes interface is UB962 TDA2 used on the circuit diagram is connected to ub962 using i2c4 The address we use is 0x3d "We want to know how to control ub962 through i2c4" How to control him through i2c4 I want to ask about the process(flow) on the software Start with these actions of poweron/inital and so on EX. setting pinmux What are the other steps to do? Are there any related documents? ----------------------------------------------------------------- Q2: It seems to be controlled through gio_submit How to use it Whether to do the corresponding registration?, etc. ----------------------------------------------------------------- Thank you very much!! + +Hi, Can you please look into VidSensor_create API in the file vision_sdk\apps\src\rtos\video_sensor\src\ov10635\vid_sensor_ov10635.c? This file is the one, which configures ub96x devices for the sensor. It uses API BspUtils_appInitUb960 to configure them, which is implemented inside PDK. You would have to change this API in PDK to change i2c instance. Regards, Brijesh + +Dear Brijesh, Because I still haven't solved this problem,Can you tell me some more details? Is it necessary to set something in Bsp_deviceI2cInit? Or other places? Can you give an example of the setting process? To solve the problem of why we cannot detect the UB964 version? According to my information above Thank you for your help>< David + +Dear Brijesh, Second question, where can these objects be set? Does this require us to set? Please help me with these two questions Thank you!! David + +Dear Brijesh, I'm afraid I didn't explain it carefully enough, so I added something like this picture explain(The text in the picture) Or is it related to this parameter, something needs to be registered during initialization? l Thanks David + +Dear Brijesh, If I have insufficient information, please let me know, and I will try to explain it clearly. Mainly I want to know why it can't be detected in get Version (our version is ub962) Maybe where is not set up? According to the question I said above Please help ! Thanks you...!! David + +Dear Brijesh, Can this part tell me clearly? I may know the general direction but I don’t know the details (Regarding what I described above) Can you point me in some direction, Please! Thank you very much!! David + +Hi David, I am sorry i am not getting the issue.. If not video_sensor layer, you could directly try writing to SERDES register from the usecase. There are i2c APIs, that can be used to write directly from the usecase itself. Also which i2c instance are you using? If it is not allocated/enabled, you might have to add it to Linux dtb files. But before all of these, are you trying to enable this SERDES for the first time? I mean, is it brought up from HW perspective? Rgds, Brijesh + +Dear Brijesh, Can you tell me in detail about the settings of the software layer that need to be done (Settings), and where? For example, which parameter in the table or which parameter needs to be initialized or set. According to my description above, what else needs to be set at the software layer? (ex. bsp_deviceI2c.c Func: Bsp_deviceI2cInit need setting?) (If the software layer is not set) Thanks a lot!! David + +Dear Brijesh, like this, About Bsp_deviceRead8 UB960_ACCESSIBLE_FROM_I2C_INST, //4 gSlaveAliases[instId].slaveAddr,//0x3D &tempAddr, //0xF5 &tempData, //0x00 (UInt32) 1U); ----------------------------------------- Where is the software layer in the front that needs to be set? ("Probably" is about not setting it before) but I'm not sure where Can you tell me some details that I didn't notice At present, the parameters passed out here should be no problem (except for the first parameter is uncertain) Thanks! David + +Dear Brijesh, Because I am confused about some software layers I want to confirm whether the software layer is set up first Regarding the questions I mentioned above, can you help me understand better? (Software layer) Thanks a lot!! David + +Hi David, I am sorry i could not get the question. I guess you just want to configure SERDES and camera. You could actually completely bypass software layer for it. You could use direct i2c APIs to write to SERDES/Camera register from the usecase. When you generate the usecase, it will generate usecase_priv.c file and usecase.c file. You could add an function in usecase.c file to write to these i2c clients. For I2C, you could use APIs like Bsp_deviceWrite8,Bsp_deviceWrite16 to write to 8bit and 16bit address/value pair. These APIs does not require i2c handle, it just needs i2c instance id, slave address, register and value.. We just need to make sure that the i2c instance that you want to use is allocated to M4 driver. and initialized in the PDK. For that, can you see and update Board API Bsp_boardGetI2cData and include this i2c instance on M4? Regards, Brijesh + +Dear Brijesh, I have used Bsp_deviceWrite8 here to get UB96X Version According to the first parameter Mainly we want to ask How to set up the instance i2c and how to connect to the real I2C4 (pre-work) Thanks! David + +Hello David, Do you mean which instance id to be used for i2c4 ? Regards, Brijesh + +Dear Brijesh, Because I have some doubts about the software layer Our DEVICE uses i2C4 to connect to ub962 then, I mean we use Bsp_deviceRead8 Get Version But It did not detect the version of ub962 --------------------------------------------------------------------- Bsp_deviceRead8 ( UB960_ACCESSIBLE_FROM_I2C_INST, //4 (-> The previous steps or initialization did not do the setting or connection, which caused the error that the device could not be detected version?) gSlaveAliases[instId].slaveAddr, //0x3D &tempAddr, //0xF5 &tempData, //0x00 (UInt32) 1U); Thanks >< David + +Hi David, Is ub962 powered on? or anything on board required to power on ub962? or is there any other mux available in between to enable i2c transactions? Do you have any other device also connected on i2c4? Can try probing this device? Regards, Brijesh + +Dear Brijesh, Ub962 seems to be powered on ,and nor other mux enanle i2c No other devices also use i2c4 Are there any initialization places that need to be set?(About how to setting of linking ub962) and other questions I am looking at bsp_deviceI2c.c Func:Bsp_deviceI2cInit(void) The parameters in gBspDevObj.i2cHndl[i2cInstId] , Where is this parameter set? and  ioParams.packets = &(gBspDevObj.i2cIomPacket[i2cInstId][0]); Why are all the parameters I printed out empty? (Paramters :addr , size ,arg , cmd , status ,misc) Thanks! David + +Hi David, I dont understand "About how to setting of linking ub962" ?? Please check the Bsp_deviceI2cInit, this API sets the i2cHandle at around line number 163. Regards, Brijesh + +Dear Brijesh, "Please check the Bsp_deviceI2cInit, this API sets the i2cHandle at around line number 163."  I watched this ,but I have some confusion , Can you tell me about "where" the parameters are set (inside)? I have tried to track the code(inside),But I don’t know how to look inside Can you tell me some hints and how to see it(Setting parameters) (inside :gBspDevObj.i2cHndl[i2cInstId] = GIO_handle(&gBspDevObj.i2cGioStruct[i2cInstId]);) Thanks a lot! David + +Parameters are set in GIO_construct. I would suggest to put breakpoint on this API and see the code flow. Rgds, Brijesh + diff --git a/data2/text/range/10001-15000/1219581.txt b/data2/text/range/10001-15000/1219581.txt new file mode 100644 index 0000000000000000000000000000000000000000..fda5a63cb9de6c443f8c5285e89b3d8040bcef1c --- /dev/null +++ b/data2/text/range/10001-15000/1219581.txt @@ -0,0 +1,200 @@ +Ticket Name: TDA2SX: TCP sending large data can cause packet loss at a fixed location + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi team, The customer is using TDA2's Ethernet feature, originally PROCESS_radar_SDK default NDK is running on IPU1_1 and now needs to use TCP to transfer large data to PC, so customer defines NDK to run in core of A15_0. Network 1000 Mbps rate negotiation is normal, TCP connection is normal, but the throughput rate is too slow, and it is discovered after the packet is captured with wireShake. When 4MB of data is sent, successive frames are lost between 90kB and 100kB of data, resulting in continuous retransmission of these frames. Except for the loss of these frames, the rest of the data is transmitted normally. They mainly made the following changes: 1. In the cfg.mk file in the tda2xx_cascade_BIOS_radar directory, set NDK_PROC_to_use=A15_0 2. Regenerate the associated privi.c and priv.h files in usecases, mainly modifying NetworkTx (IPU1_1) to NetworkTx (A15) 3. Adjust NDK_data_size and A15_0_data_size as appropriate in the file mem_segment_definition_BIOS.xs as follows: /* + * ======== mem_segment_definition.xs ======== + * ======== Single file for the memory map configuration of all cores ========= + */ + +function getMemSegmentDefinition_external(core) +{ + KB=1024; + MB=KB*KB; + + DDR3_ADDR = 0x80000000; + DDR3_SIZE = 512*MB; + + /* + * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 + * are hard-coded in as values of gIpcNonCachedDataAddr and + * gIpcNonCachedDataSize in Ipu1_0.cfg + * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg + */ + DDR3_BASE_ADDR_0 = DDR3_ADDR; + DDR3_BASE_SIZE_0 = 507*MB; + + /* The start address of the second mem section should be 16MB aligned. + * This alignment is a must as a single 16MB mapping is used for EVE + * to map SR0, REMOTE_LOG_MEM sections. + * tlb_config_eveX.c need to be modified otherwise + */ + DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0; + DDR3_BASE_SIZE_1 = DDR3_SIZE - DDR3_BASE_SIZE_0; + //if(core=="ipu1_1" || core=="ipu1_0" || core=="ipu2" || core=="a15_0") + //{ + /* for ipu1_0, ipu1_1, ipu2 DDR3_BASE_ADDR_1 should be + * in non-cached virtual address of + * DDR3_BASE_ADDR_1 + 512*MB + */ + DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; + //} + + DSP1_L2_SRAM_ADDR = 0x40800000; + DSP1_L2_SRAM_SIZE = 288*KB; + + DSP2_L2_SRAM_ADDR = 0x41000000; + DSP2_L2_SRAM_SIZE = 288*KB; + + EVE1_SRAM_ADDR = 0x42000000; + EVE1_SRAM_SIZE = 1*MB; + + EVE2_SRAM_ADDR = 0x42100000; + EVE2_SRAM_SIZE = 1*MB; + + EVE3_SRAM_ADDR = 0x42200000; + EVE3_SRAM_SIZE = 1*MB; + + EVE4_SRAM_ADDR = 0x42300000; + EVE4_SRAM_SIZE = 1*MB; + + TOTAL_MEM_SIZE = (DDR3_SIZE); + + /* First 512 MB - cached */ + /* EVE vecs space should be align with 16MB boundary, and if possible try to fit + * the entire vecs+code+data in 16MB section. In this case a single TLB map would + * be enough to map vecs+code+data of an EVE. + * tlb_config_eveX.c need to be modified if any of these EVE memory sections or + * SR1_FRAME_BUFFER_MEM section is modified. + */ + + /* EVE self-branch instruction block - EVE1_VECS + * In SBL, EVE self-branch instruction is inserted @ 0x80000000 if no AppImage for EVE. + * This could overwrites the code/data loaded at 0x80000000. + * So Reserving a small memory block in the beginning of the DDR @0x8000 0000 for + * EVE self-branch instruction if no AppImage for EVE. + * If EVE enabled, then the EVE VECS/DATA/CODE is placed @0x8000 0000, + * and hence we did not observe any issue. + * If EVE is disabled, then also DO NOT remove this EVE1_VECS section @0x80000000, + * if no AppImage for EVE. This could overwrites the code/data loaded at 0x80000000 + */ + + EVE1_VECS_SIZE = 0.5*MB; + EVE1_CODE_SIZE = 2*MB; + EVE1_DATA_SIZE =13.5*MB; + EVE2_VECS_SIZE = 0.5*MB; + EVE2_CODE_SIZE = 2*MB; + EVE2_DATA_SIZE =13.5*MB; + EVE3_VECS_SIZE = 0.5*MB; + EVE3_CODE_SIZE = 2*MB; + EVE3_DATA_SIZE =13.5*MB; + EVE4_VECS_SIZE = 0.5*MB; + EVE4_CODE_SIZE = 2*MB; + EVE4_DATA_SIZE =13.5*MB; + NDK_DATA_SIZE = 8*MB; + + if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") + { + IPU1_1_CODE_SIZE = 2.5*MB; + IPU1_1_DATA_SIZE = 12.5*MB; + IPU1_0_CODE_SIZE = 6*MB; + IPU1_0_DATA_SIZE = 12*MB; + } + else + { + IPU1_1_CODE_SIZE = 2.5*MB; + IPU1_1_DATA_SIZE = 12.5*MB; + IPU1_0_CODE_SIZE = 6*MB; + IPU1_0_DATA_SIZE = 16*MB; + } + IPU2_CODE_SIZE = 2*MB; + IPU2_DATA_SIZE = 7*MB; + DSP1_CODE_SIZE = 6*MB; + DSP1_DATA_SIZE = 14*MB; + DSP1_DATA_SIZE_2 = 1*MB; + DSP2_CODE_SIZE = 4*MB; + DSP2_DATA_SIZE = 14*MB; + DSP2_DATA_SIZE_2 = 1*MB; + /* A15_0_CODE_SIZE reduced since it is not used in .bld file. + * Check .bld for details. Originally 2 + 14 MB. + */ + A15_0_DATA_SIZE = 43.5*MB; + if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") + { + A15_0_DATA_SIZE_INC = 101*MB /* in MB */ + A15_0_DATA_SIZE = (A15_0_DATA_SIZE + A15_0_DATA_SIZE_INC); + } + + if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") + { + /* Ensure ECC regions are 64kB aligned */ + SR1_FRAME_BUFFER_SIZE = 297.5*MB; + SR1_BUFF_ECC_ASIL_SIZE = 1*MB; + SR1_BUFF_ECC_QM_SIZE = 40*MB; + SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; + } + else + { + SR1_BUFF_ECC_ASIL_SIZE = 4*KB; + SR1_BUFF_ECC_QM_SIZE = 4*KB; + SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; + SR1_FRAME_BUFFER_SIZE = 305.5*MB - (SR1_BUFF_ECC_ASIL_SIZE + SR1_BUFF_ECC_QM_SIZE + SR1_BUFF_NON_ECC_ASIL_SIZE); + if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") + { + SR1_FRAME_BUFFER_SIZE = SR1_FRAME_BUFFER_SIZE - A15_0_DATA_SIZE_INC; + } + } + + /* Second 512 MB - non-cached */ + /* The start address of the second mem section should be 16MB aligned. + * This alignment is a must as a single 16MB mapping is used for EVE + * to map SR0, REMOTE_LOG_MEM sections. + * tlb_config_eveX.c need to be modified otherwise + */ + REMOTE_LOG_SIZE = 160*KB; + SYSTEM_IPC_SHM_SIZE = 480*KB; + SYSTEM_AUTOSAR_IPC_SHM_SIZE = 512*KB; + LINK_STATS_SIZE = 256*KB; + HDVPSS_DESC_SIZE = 1024*KB; + SR0_SIZE = 128*KB; + OPENVX_SHM_SIZE = 1984*KB; + EEPROM_PARAM_SIZE = 64*KB; + + if((java.lang.System.getenv("OPENCL_INCLUDE") == "yes")) + { + /* when OpenCL is enabled we need more SR0 space + */ + SR0_SIZE = 2*MB; + } 4. MAC0 is used and static IP is set. Issue: if the NDK is configured to run in IPU1_1, Gigabit network communication is normal, 1MB of data per frame, and consecutive transmission does not result in missing frames. However, if the NDK is configured to run in the A15 kernel with the above configuration, the Gigabit network will be able to connect properly. However, if 4 frames are transmitted consecutively, 1 MB per frame, each time a frame is lost between 90 KB and 100 KB at 1 MB of the first frame is transmitted, the frames lost are eventually retransmitted through the TCP underlying retransmission mechanism. But this results in a throughput rate drop. The wireshake packet information is as follows: 192.168.31.100 is the PC. So the customer would like to know what should be aware of when configuring NDK to A15_0? Or is there anything wrong in the above configuration? Thanks. Best Regards, Cherry + +Responses: +Hi, May I know is there any updates? Best, Cherry + +Hi, Give some updates: 1) The customer originally sent the data in the NetworkTxLink_tskMain function in the networkTxLink_tsk .c file with the following code: UInt8* chBuf[2]; + for(c=0;c<2;c++) + { + chBuf[0] = (UInt8*)((uint32_t*)(pADCFrames->bufferList.buffers[pADCFrames->rIndex+c*2]->payload))[0]; + chBuf[1] = (UInt8*)((uint32_t*)(pADCFrames->bufferList.buffers[pADCFrames->rIndex+c*2+1]->payload))[0]; + for(i=0; i<256; i++) + { + TcpSendToAll(chBuf[0], 4096); + TcpSendToAll(chBuf[1], 4096); + chBuf[0] += 4096; + chBuf[1] += 4096; + } + } The above code sends a total of 4MByte of data, and will cause a missing frame. 2) If Task_sleep is included in the sent code for intermittent task sleep, no frame loss will occur: UInt8* chBuf[2]; + for(c=0;c<2;c++) + { + chBuf[0] = (UInt8*)((uint32_t*)(pADCFrames->bufferList.buffers[pADCFrames->rIndex+c*2]->payload))[0]; + chBuf[1] = (UInt8*)((uint32_t*)(pADCFrames->bufferList.buffers[pADCFrames->rIndex+c*2+1]->payload))[0]; + for(i=0; i<256; i++) + { + TcpSendToAll(chBuf[0], 4096); + TcpSendToAll(chBuf[1], 4096); + chBuf[0] += 4096; + chBuf[1] += 4096; + Task_sleep(1); + } + } The customer adjusts the sleep interval, such as sending it twice, 4096 bytes, sleep for 1 ms, no frame loss problem. But the transfer rate is slow. If modified to send 8 consecutive times, 4096 bytes, and hibernate 1ms, the rate can be increased to 160 Mbps. They also tried to lower the priority of the networkTxLink_tsk task and increase the TCP's TX cache, but did not resolve the issue. Packet loss can be avoided only by joining Task_sleep, and throughput can be increased. How to avoid packet loss and increase throughput without adding Task_sleep code? Thanks and Regards, Cherry + +Hi Stanley, May I know is there any updates? Thanks and regards, Cherry + diff --git a/data2/text/range/10001-15000/452942.txt b/data2/text/range/10001-15000/452942.txt new file mode 100644 index 0000000000000000000000000000000000000000..309ab0bd7564dd691c037fe0fc89c61354d86b44 --- /dev/null +++ b/data2/text/range/10001-15000/452942.txt @@ -0,0 +1,115 @@ +Ticket Name: error: symbols in the reserved far sections cannot be accessed as near; symbol "numEdma3Instances" in the far section and sysbios linking error + +Query Text: +Other Parts Discussed in Thread: SYSBIOS, TDA2 error_list_update.txt undefined first referenced + symbol in file + --------- ---------------- + EDMA3_DRV_close /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + EDMA3_DRV_create /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + EDMA3_DRV_delete /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + EDMA3_DRV_initXbarEventMap /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + EDMA3_DRV_open /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3CCErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3ComplHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC0ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC1ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC2ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC3ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC4ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC5ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC6ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + lisrEdma3TC7ErrHandler0 /opt/ti/VISION_SDK_02_06_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/66/debug/edma3_lld_drv_sample.ae66 + +error: unresolved symbols remain +error: errors encountered during linking; "app_dsp" not built + +>> Compilation failure +make[3]: *** [src/svs220jr18/video/app_dsp/app_dsp] Error 1 +make[3]: Leaving directory `/svsbase/build_jr18_dsp' +make[2]: *** [src/svs220jr18/video/app_dsp/CMakeFiles/app_dsp.dir/all] Error 2 +make[2]: Leaving directory `/svsbase/build_jr18_dsp' +make[1]: *** [src/svs220jr18/video/app_dsp/CMakeFiles/app_dsp.dir/rule] Error 2 +make[1]: Leaving directory `/svsbase/build_jr18_dsp' +make: *** [app_dsp] Error 2 + Hi, I am trying to run the example code available in edma3_lld_02_12_00_20 . This is edma package that I downloaded from below link : software-dl.ti.com/.../index.html PFB linker command file (which comes with examples default one) SECTIONS { .my_sect_iram > L2SRAM .my_sect_ddr > L2SRAM } I tried to remove maximum liking error but I am unable to solve the linking errors mentioned in attachment .PFA. I am using CCSv5.4 in windows (64 bit) . edma3 version :edma3_lld_02_12_00_20 CORE : C6657 EXAMPLE: edma3_drv_bios6_c6657_st_sample CCS:v5.4 OS:Windows Error:PFA DSP:C66X 2388.error_edma3.txt +**** Build of configuration Debug for project edma3_drv_bios6_c6657_st_sample **** + +/home/studinstru/Docker/ti/ccsv6/utils/bin/gmake -k all +Building target: edma3_drv_bios6_c6657_st_sample.out +Invoking: C6000 Linker +"/home/studinstru/Docker/ti/ccsv6/tools/compiler/c6000_7.4.13/bin/cl6x" --cmd_file="/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/examples/edma3_driver/simC6657/rtsc_config/Debug/configPkg/compiler.opt" -mv6600 -g --diag_warning=225 --abi=eabi -z -m"edma3_drv_bios6_c6657_st_sample.map" --warn_sections -i"/home/studinstru/Docker/ti/ccsv6/tools/compiler/c6000_7.4.13/lib" -i"/home/studinstru/Docker/ti/ccsv6/tools/compiler/c6000_7.4.13/include" -i"/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/lib/66/debug" -i"/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/c6657-sim/66/debug" -i"/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/rm/lib/c6657-sim/66/debug" -i"/home/studinstru/Docker/ti/ccsv6/tools/compiler/c6000_7.4.13/lib" -i"/home/studinstru/Docker/ti/ccsv6/tools/compiler/c6000_7.4.13/include" -i"/home/studinstru/Docker/ti/bios_6_33_02_31/packages/ti/sysbios/syncs/lib/debug" --reread_libs --xml_link_info="edma3_drv_bios6_c6657_st_sample_linkInfo.xml" --rom_model -l"/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/examples/edma3_driver/simC6657/rtsc_config/Debug/configPkg/linker.cmd" -o "edma3_drv_bios6_c6657_st_sample.out" "./common.obj" "./dma_chain_test.obj" "./dma_link_test.obj" "./dma_misc_test.obj" "./dma_ping_pong_test.obj" "./dma_poll_test.obj" "./dma_test.obj" "./main.obj" "./qdma_link_test.obj" "./qdma_test.obj" "../linker.cmd" -ledma3_lld_drv_sample.ae66 -ledma3_lld_rm.ae66 -ledma3_lld_drv.ae66 -l"libc.a" -lti.sysbios.syncs.ae66e + +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" +error: symbols in the reserved far sections cannot be accessed as near; symbol + "numEdma3Instances" in the far section + "/home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sa + mple/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + (.const)" is accessed as near in the section "./main.obj(.text)" + + undefined first referenced + symbol in file + --------- ---------------- + ti_sysbios_knl_Semaphore_create /home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + ti_sysbios_knl_Semaphore_delete /home/studinstru/Docker/ti/edma3_lld_02_12_00_20/packages/ti/sdo/edma3/drv/sample/lib/c6657-sim/66/debug/edma3_lld_drv_sample.ae66 + +error: unresolved symbols remain +error: errors encountered during linking; "edma3_drv_bios6_c6657_st_sample.out" + not built + +>> Compilation failure +gmake: *** [edma3_drv_bios6_c6657_st_sample.out] Error 1 +gmake: Target `all' not remade because of errors. + +**** Build Finished **** + +Responses: +This question doesn't really seem to be specific to TI-RTOS. I went ahead and moved it to the device forum in hopes that it will get a faster response there. + +Hi studinstru sggs, We are working on your previous post referred below on the same topic. We request your patience. https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/452426 Thank you. + +I followed below post and I was not able to resolve my issue .As this post mention to post my querry in TI-RTOS ,so did I .e2e.ti.com/.../1264816 + +No problem. We will try to help you as much as possible.Thank you. + +Hi raja, I am able to remove this error: "symbols in the reserved far sections cannot be accessed as near; symbol "numEdma3Instances" in the far section and sysbios linking error" by adding far before this variale name .ButI am still having some linker error .PFA above - error_list_update.txt + +Hi,Could you please attach your log file? Make to sure to add edma lib path to link edma libraries. Path: ..:\ti\edma3_lld_02_11_13_17\packages\ti\sdo\edma3\drv\lib\66\release Thank you for the update. + +Raja,I want to ask one question -What is the difference between system EDMA and DSP EDMA on tda2x hardware ?? + +I am not familier with TDA2x platform . Please post your query on Automotive forum for faster and appropriate response. Detailed information about TDA2 and TDA3 is shared under NDA (Non Disclosure Agreement). I would suggest that you contact your local sales representative. Automotive Forum: Thank you. + diff --git a/data2/text/range/10001-15000/530168.txt b/data2/text/range/10001-15000/530168.txt new file mode 100644 index 0000000000000000000000000000000000000000..8861ef38613fb93f99c4048cdae5713046d4abe1 --- /dev/null +++ b/data2/text/range/10001-15000/530168.txt @@ -0,0 +1,56 @@ +Ticket Name: No boot logs on DRA72/J6Eco + +Query Text: +Other Parts Discussed in Thread: TDA2E, PMP, DRA722, DRA72 hi, I have below HW setup: J6 Eco(REV D), Jamer3(REV B), Display(REV B). Switch positions: SW1: 00 SW2: 11100000 SW3: 10000001 SW5: 0001100000 Used below prebuild binaries from tar balls boot-dra7xx-evm.tar.gz arago-glsdk-multimedia-image-dra7xx-evm.tar.gz Link: downloads.ti.com/.../index_FDS.html After inserting SDCard with above images; MLO/Uboot logs are not coming. Also tried changing uenv.txt with fdtfile=dra72-evm.dtb Please share info about getting appropriate MLO, uboot for J6Eco. Br, kaustubh + +Responses: +Hi Kaustubh, If you have "J6eco EVM + 10inch LCD + JAMR3 app board" you should use: fdtfile=dra72-evm-lcd10.dtb Have you create the SD Card according to the GLSDK software guide, step 4 Prepare SD card ? Then you should follow Step 5: Booting the board. processors.wiki.ti.com/.../DRA7xx_GLSDK_Software_Developers_Guide Regards, Pavel + +P.S. As you are using DRA7x device, I will move this thread from TDAx to DRAx e2e forum. Regards, Pavel + +Thanks for reply. SDCard is prepared with same steps; it has two partitions boot and rootfs. I tried as suggested but unfortunately result is same here below are my bootargs: mmcargs=part uuid mmc 0:2 uuid; setenv bootargs "fdtfile=dra72-evm-lcd10.dtb console=ttyO0,115200n8 elevator=noop root=PARTUUID=${uuid} rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1" As per my understanding the MLO logs first should come but that is also not coming on console. br, kdj + +Kaustubh, kaustubh j said: Switch positions: SW1: 00 SW2: 11100000 SW3: 10000001 SW5: 0001100000 You nee to configure the below switch positions for SD boot: sysboot [0:15] = 1110000010000001 SW5[1:10] = 0001100000 All other switch positions should be left as default. refer to the below doc: Regards, Pavel + +You are using J6Eco TI EVM (not J6Eco based custom board), right? Are you using microSD card and plug it in P14 MICRO-SD slot, right? Do you connect the EVM with the host machine with mini-USB cable? Regards, Pavel + +Yes, I am using "J6Eco/TDA2E EVM CPU Board" made by SPECTRUM Digital. Switch setting are same as shown in pdf. SD card is in P14 slot. Here one thing to note this card as i insert as it is with J6 EVM it boots fine. And as I mentioned MLO logs itself are not coming; so I am suspecting MLO first. If you have working prebuilt MLO for J6Eco(REV-D) board available. Please share. br, kdj + +Kaustubh, kaustubh j said: Here one thing to note this card as i insert as it is with J6 EVM it boots fine. It is not clear to me. You have two micro SD cards, one is working fine, another one not? kaustubh j said: And as I mentioned MLO logs itself are not coming; so I am suspecting MLO first. Can you provide me full console log output? How you start the console? kaustubh j said: If you have working prebuilt MLO for J6Eco(REV-D) board available. Please share. Can you try with the below MLO: ti-glsdk_dra7xx-evm_7_04_00_03/board-support/prebuilt-images/MLO Regards, Pavel + +kaustubh j said: Yes, I am using "J6Eco/TDA2E EVM CPU Board" made by SPECTRUM Digital. Do you have a link to that EVM? I am using J6Eco EVM revB, which come with Jacinto XDRA726XGABC device part number. What is the device part number mounted on your EVM board? Regards. Pavel + +I have two boards, single SD card J6 EVM and J6 Eco (REV D). Device part number: Jacinto XDRA726XGABC (REV D) J6 EVM --> i have tested prebuilt MLO uboot flashed on MMC card on J6 EVM. On J6EVM is booting fine. So there is no card issue, card is working properly. J6 Eco REV-D--> Prebuilt MLO uboot flashed on MMC card on J6 Eco. On J6Eco is not booting. Garbage character on screen on every power cycle. As MLO logs are not coming, i need MLO/u-boot compatible for J6Eco (REV D). Any clue from where to get it ? Br, kdj + +Please apply the below patch to the u-boot source, generate new MLO and u-boot, place them on the SD card and try to boot. processors.wiki.ti.com/.../DRA7xx_GLSDK_7.04.00.03_Post-release_Updates Apply the u-boot patch on GLSDK 7.04.00.03 release Regards, Pavel + +Hi, I am using "J6Eco/TDA2E EVM CPU Board" made by SPECTRUM Digital. sysboot [0:15] = 1110000010000001 SW5[1:10] = 0001100000 I used the below uboot patch processors.wiki.ti.com/.../DRA7xx_GLSDK_7.04.00.03_Post-release_Updates I am able to see the boot logs but the board is still not booting.The logs are as below serial# not set, setting... SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). SCSI: Net: not set. Validating first E-fuse MAC cpsw Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading uEnv.txt 221 bytes read in 3 ms (71.3 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc0 ... 7488912 bytes read in 431 ms (16.6 MiB/s) 107697 bytes read in 33 ms (3.1 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x724590 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 invalid si-revision invalid si-revision invalid si-revision invalid si-revision invalid si-revision Loading Device Tree to 8ffe2000, end 8ffff4b0 ... OK Starting kernel ... It seems like the kernel is not starting. Please share info about kernel patch. Regards, Anjali + +Hi, I am using "J6Eco/TDA2E EVM CPU Board" made by SPECTRUM Digital. sysboot [0:15] = 1110000010000001 SW5[1:10] = 0001100000 I used the below uboot patch processors.wiki.ti.com/.../DRA7xx_GLSDK_7.04.00.03_Post-release_Updates I am able to see the boot logs but the board is still not booting.The logs are as below serial# not set, setting... SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). SCSI: Net: not set. Validating first E-fuse MAC cpsw Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading uEnv.txt 221 bytes read in 3 ms (71.3 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc0 ... 7488912 bytes read in 431 ms (16.6 MiB/s) 107697 bytes read in 33 ms (3.1 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x724590 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 invalid si-revision invalid si-revision invalid si-revision invalid si-revision invalid si-revision Loading Device Tree to 8ffe2000, end 8ffff4b0 ... OK Starting kernel ... It seems like the kernel is not starting. Please share info about kernel patch. Regards, Anjali + +Anjali, anjali m said: I am using "J6Eco/TDA2E EVM CPU Board" made by SPECTRUM Digital. sysboot [0:15] = 1110000010000001 SW5[1:10] = 0001100000 I used the below uboot patch processors.wiki.ti.com/.../DRA7xx_GLSDK_7.04.00.03_Post-release_Updates I am able to see the boot logs but the board is still not booting. Do you mean that you are seeing the MLO and u-boot messages now? Can you provide me full console log output? Can you provide me your boot arguments? Which kernel you are using exactly? BR Pavel + +Hello Pavel, Yes I am able to see the MLO and u-boot logs. I have pasted the complete logs in the earlier reply. My boot args are as below "mmcargs=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 elevator=noop root=PARTUUID=${uuid} rw rootwait earlyprintk fixrtc o mapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1" kernel version is 3.14.63 Regards, Anjali + +Anjali, From where you get this kernel 3.14.63? See if the below kernel patches are applied in your kernel code base: review.omapzoom.org/ - ARM: DRA722: OPP: reuse OPP information for Silicon Rev 2.0 review.omapzoom.org/ - ARM: DRA722: Add ID detect for Silicon Rev 2.0 review.omapzoom.org/ - ARM: DRA722: remove redundant definition of 1.0 device review.omapzoom.org/ - arm: dts: dra72: vision: Add support for RevC EVM If some of these is missing, apply it, build new kernel image, place it on the SD card and boot the board. Regards, Pavel + +Hello Pavel, We have downloaded the ti GLSDK-7_04_00_03 from " processors.wiki.ti.com/.../Category:GLSDK" Even with the above patch the kernel is not starting. The logs are same as in the previous reply. Regards, Anjali + +Anjali, You should download and use the latest DRA7x SDK: processors.wiki.ti.com/.../Category:Processor_SDK_Linux_Automotive This Processor SDK Linux Automotive 3.00.00.03 is tested up to DRA72x EVM Rev C, but it might also work for rev D. Try with the below Device Tree Files: dra72-evm-revc.dtb or dra72-evm-revc-lcd-osd.dtb Regards, Pavel + +Hello Pavel, Thanks for the above link. I downloaded the latest SDK. Now I see that the board is booting in minicom. But I don't see any display coming on board screen. Could you help me on this. Regards, Anjali + +Anjali, Did you install the rootfs from the latest SDK Linux Automotive 3.00.00.03 on your SD card? Or you change only u-boot/linux-kernel? By board screen do you mean LCD or HDMI? If LCD, do you use dra72-evm-revc-lcd-osd.dtb (10inch LCD + JAMR3 app board)? Please provide me full console log (u-boot, linux-kernel, rootfs, appl, etc). You can put this log in a txt file and attach the txt file here in the forum. Make sure the Display Driver is enabled: http://processors.wiki.ti.com/index.php/Processor_SDK_Linux_Automotive_Data_Sheet#OMAPDRM.2FOMAPDSS_.28Display_Subsystem_Driver.29 Regards, Pavel + +Hi Anjali, In latest SDK Linux Linux Automotive, the default file system uses "devicetree-zImage-dra72-evm-revc.dtb" for dra722 board. As suggested by Pavel, you have to use devicetree-zImage-dra72-evm-revc-lcd.dtb. In u-boot check the enivronment for the dtb used for your board which should be "dra72-evm-revc.dtb" and accordingly modify your boot folder for the correct dtb. Regards, Krishna + +Hello Pavel, Thanks for the help. Now the board is booting and I see the display coming on LCD. Regards, Anjali + +Anjali, Good to know you made it work fine. Can you please close/verify this thread. Regards, Pavel + +Hello Pavel, I am using SDK Linux Automotive 3.00.00.03 for JACINTO board (processors.wiki.ti.com/.../Category:Processor_SDK_Linux_Automotive). When I try to build yocto file system I get following error for command "./build-core-sdk.sh dra7xx-evm" Please help me in resolving this error. The logs are as below NOTE: Preparing RunQueue NOTE: Executing SetScene Tasks NOTE: Executing RunQueue Tasks WARNING: ti-ccsv6-native-6.1.3.00033-r0 do_fetch: Checksum mismatch for local file /home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/downloads/CCS6.1.3.00033_linux.tar.gz Cleaning and trying again. WARNING: ti-ccsv6-native-6.1.3.00033-r0 do_fetch: Renaming /home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/downloads/CCS6.1.3.00033_linux.tar.gz to /home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/downloads/CCS6.1.3.00033_linux.tar.gz_bad-checksum_d95121970f8bcee944bf8b8e576bf3ec WARNING: ti-ccsv6-native-6.1.3.00033-r0 do_fetch: Failed to fetch URL install.source.dir.local/CCS6.1.3.00033_linux.tar.gz;name=ccsv6, attempting MIRRORS if available ERROR: ti-ccsv6-native-6.1.3.00033-r0 do_fetch: Fetcher failure: Fetch command failed with exit code 4, output: wget: unable to resolve host address 'install.source.dir.local' ERROR: ti-ccsv6-native-6.1.3.00033-r0 do_fetch: Function failed: Fetcher failure for URL: ' install.source.dir.local/CCS6.1.3.00033_linux.tar.gz;name=ccsv6'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-linux/ti-ccsv6-native/6.1.3.00033-r0/temp/log.do_fetch.16859 ERROR: Task 4595 (/home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/sources/meta-ti/recipes-ti/devtools/ti-ccsv6-native_6.1.3.00033.bb, do_fetch) failed with exit code '1' NOTE: Tasks Summary: Attempted 1475 tasks of which 1447 didn't need to be rerun and 1 failed. NOTE: Writing buildhistory Waiting for 0 running tasks to finish: Summary: 1 task failed: /home/myname/GLSDK/ti-processor-sdk-linux-automotive_dra7xx-evm_03_00_00_03/yocto-layers/sources/meta-ti/recipes-ti/devtools/ti-ccsv6-native_6.1.3.00033.bb, do_fetch Summary: There were 4 WARNING messages shown. Summary: There were 2 ERROR messages shown, returning a non-zero exit code. [PSDKLA]> [PSDKLA]> Completed Yocto build at Mon Aug 8 14:17:11 IST 2016 [PSDKLA]> Regards, Anjali + +Anjali, Your new issue is not related to the subject of this e2e thread (No boot logs), so I would suggest you to open new e2e thread regarding your new issue. Regards, Pavel + +Anjali, I see you already have new e2e thread regarding your new issue: e2e.ti.com/.../533748 The Yocto expert is notified regarding your issue and will make a reply. Meanwhile you can check the below e2e thread: e2e.ti.com/.../531396 Regards, Pavel + diff --git a/data2/text/range/10001-15000/616415.txt b/data2/text/range/10001-15000/616415.txt new file mode 100644 index 0000000000000000000000000000000000000000..011639241d71dca8d9aa35dc8486c5d5858f0365 --- /dev/null +++ b/data2/text/range/10001-15000/616415.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2EVM5777: "Can not allocate memory" error - remoteproc + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello ! I try to use the remoteproc feature of the TI-kernel which comes with visual SDK_2_12_02_00 (patched linux 4.4.45). I've backported sysfs support to monitor remoteproc. My board is XC5777x with TDA2. I build a simple programm which counts up a variable and let it run using my XDS200 JTAG debugger under CCS. That works great, no problems (except linux is running... than the debugger got no access to the JTAG chain... but thats another problem I've almost pubished.) Now the next step would be: Building a release... done. Copying as dra7-ipu1-fw.xem4 to lib/firmware... unbind and bind 58820000.ipu ... nothing happen, no error message in dmesg. A cat of /sys/class/remoteproc/remoteproc0/state shows: "OFFLINE". OK... try to start... echo "start" to the state... and I got the error message: sh: write error: Cannot allocate memory Something went wrong building the elf file. I've tried out the TI-Toolchain and the linaro-Toolchain delivered with the CCS. I've used no linker-script and the ones which comes with the SDK (starterpack)... No success at all! The memory map matches the data sheet and the stuff defined in devicetree. What I have to do is to generate a remoteproc "ELF" file... at the end of the day without using TI-middleware or bootloader and therefore I need the following stuff which I was not able to seperate out of the starterpack or SDK: a working linker description file for TDA2-EVM5777x board. (Maybe I got them already, but I am not shure, so just to be on the safe side...) a simple example of "really bare metal" boot-up-code WITHOUT (!) usage of TI-Library or bootloader or RTOS... ==> if needed?! How I have to configure the peripheral of OTHER CPUs then MPU? (EVEN via devicetree, too? Do you have prepared stuff? Any kind of how to?) a recipe how to build a ELF file which is compatible with the TI remoteproc mechanism in linux. This failed every time, no matter what I've tried out. The only working example: "linux/targetfs/lib/firmware/ipc/ti_platforms_evmDRA7XX_ipu1/messageq_single.xem4" which is able to be loaded and after "bind" IPU1 the IPU1 begins to run, cat of state: running... .... so: In principle it works! I must have forgotten something important... but what? So I need the simplest possibility (a skelleton) to run a GCC compiled Ansi-C code on M4, DSP, EVE of the TDA2 using the remoteproc mechanism. (No CCS projects, no libraries or universal linker script and build environments, which are too complex to show how it works in principle... a simple Makefile GCC project without bootloader, OS, lib-stuff...) Thank you, Marco. + +Responses: +Some additional informations The reason why the created ELF Files are not able to be loaded as "remote firmware" is simple: (1) No section called ".resource_table" have been created. So it is possible to play a little bit around using JTAG and direct injection (GEL scripts will do everything else...) but even if a release have been build, the created ELF will not contain the resource section, which is needed to fill the resource table in the TI linux driver of the remoteproc. If this is empty, the error "remoteproc remoteproc0: Boot failed: -12" will occure. (remoteproc_core.c -> fw_boot -> if (!rproc->table_ptr) -> return -ENOMEM;) ... Now I try to include such a ressource map: I can not find any rsc_table_XXX.h which may contain the informations => TDA2x or DRA7... or x5777x, etc... + +Back again.... ( ... and maybe Alex Bashkov is able to help me?) Well: (1) I need a GNU linker script (.lds, not .cmd) to generate M4 and C6x code which is able to be a "firmware" used with "remoteproc". Therefor a section ".resource_table" have to be created, but I can't find what it have to look like... (2) Du you have any kind of real "Bare Metal" startup code without ballast for me? Maybe small GNU-Examples/ Skelletons for TDA2-XC5777x? (GCC is able to build M4 and C6x Code as well as building A15 code and linux. Why use another, propritary TI compiler? We have automated tests, nightly builds... a quality management system and my software have to fit this requirements. I need a simple strucutre, no SDK or IDE.... ) Yes, there's the "complex" visual-sdk and something you call "bare metal" starter pack. But both are designed to work under Windows and CCS - IDE. It is not so easy to extract the things needed if you have to implement code under linux host system and want to use "FREE" compiler and "easy, minimalistic" libraries. Everything is embedded in the sdk infrastructure, using "BIOS", "RTOS", large libs... a complex buildsystem (which do not work proper under linux anyhow...), TI-compiler, ... We have to be "more free" in our development and are not able to use those goodies and extracting the things *really* needed is no fun at all... So, please help me: I do not need any SDK using "use cases" or "configurability..." I need simple bare metal examples, no proprietary stuff, because we have external requirements I have to fulfil. Thank you! + +Hello Marco Reppenhagen, 1. Does the attached linker script work for you? Try it. 8446.TDA2x.lds 2. I am not sure, but if you don't get any luck here I can move this thread to the device forum for you, maybe the audience there will be of greater help with this particular EVM scenario. Thanks, Alex + +Hello, thanks for fast response! (1) I know this script and almost tried it, without success. Maybe it is not the script... I have to build a "remote firmware" (ELF) which is used in Linux: Remoteproc should be able to write this special ELF file (with a section called ".resource_table" in it... but not generated anyhow...?!) into M4 and (later...) into C66x and start the subcores. This is our goal... (2) That would be nice! Thank you... ....maybe there's somebody who already build a small GNU project to build any kind of M4 or C66x firmware which will boot sucessfully using the remoteproc machanism of Linux in A15 core. ... At this moment I'm not able to do so. I'm trying to find out, how the SDK works an where to extrect the things I need for "non-proprietary build" of real bare metal code... (no fun at all...) + +Marco Reppenhagen , Yeah, that linker script is good enough for running a bare "hello world" program on a selected core. It won't help you much with what you need, so I don't know. Let's wait for the community and what they have to say. Thanks Alex + +Alex Bashkov (1239253) : I've got news, too. It seems like a simpe .h file can be user (included) to create the needed section. I found something like that at: ti_components/algorithms_codecs/ipumm/platform/ti/dce/baseimage/custom_rsc_table_omap5_ipu.h The "secret": #pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table") #pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096) struct my_resource_table ti_ipc_remoteproc_ResourceTable = { 1, /* we're the first version that implements this */ 16, /* number of entries in the table */ 0, 0, /* reserved, must be zero */ /* offsets to entries */ { offsetof(struct my_resource_table, rpmsg_vdev), offsetof(struct my_resource_table, text_cout), offsetof(struct my_resource_table, data_cout), ..... } This will create the needed table... for an omap5 ;) I will need either the information, which of the shipped files I can use on TDA2, or I will need such a file for the TDA2. But the best would be... someone has build a very simple skeletton for bare metal coding M4 and DSP without ballast... (Then everythings turns into: "Ahhh! That's easy!"... let's wait for the community... swarm intelligence rules.) Marco + +Thank you, I've tried this out yesterday. (Changes have to be made; pragma isn't known in GNU toolchain an some other issues... now it compiles and a elf will be created.... more than less.) Now there's the .resource_table section, but I'm not able to load the generated ELF via remoteproc into M4. Since I try to bring up the M4 really bare metal, under a gnu toolchain... I got the same error message: echo "start"> /sys/class/remoteproc/remoteproc0/state sh: write error: Cannot allocate memory I think this is a result of an unknown resource_table. Than the pointer to it in remoteproc_cpu.c stay "NULL" and no memory will be allocatable. Picking up only a few parts of the complex SDK will not bring success. I've tried out a lot... but I'm still not able to reach the goal we need: We *have to* build code from scratch, really bare metal under a non-proprietary toolchain. The linker script above is a *must have*, but there's still something missing... it do not work at all. What my stuff generates until now: ELF Header: Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, little endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: EXEC (Executable file) Machine: ARM Version: 0x1 Entry point address: 0x80000bcd Start of program headers: 52 (bytes into file) Start of section headers: 530304 (bytes into file) Flags: 0x5000202, has entry point, Version5 EABI, soft-float ABI Size of this header: 52 (bytes) Size of program headers: 32 (bytes) Number of program headers: 5 Size of section headers: 40 (bytes) Number of section headers: 26 Section header string table index: 23 Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .text PROGBITS 80000000 008000 076f78 00 AX 0 0 16 [ 2] __libc_freeres_fn PROGBITS 80076f78 07ef78 000cbc 00 AX 0 0 4 [ 3] __libc_thread_fre PROGBITS 80077c34 07fc34 0000e0 00 AX 0 0 4 [ 4] .ARM.extab PROGBITS 80077d14 07fd14 000248 00 A 0 0 4 [ 5] __libc_subfreeres PROGBITS 80077f5c 07ff5c 00002c 00 A 0 0 4 [ 6] __libc_atexit PROGBITS 80077f88 07ff88 000004 00 A 0 0 4 [ 7] __libc_thread_sub PROGBITS 80077f8c 07ff8c 000004 00 A 0 0 4 [ 8] .ARM.exidx ARM_EXIDX 80077f90 07ff90 000680 00 AL 1 0 4 [ 9] .note.ABI-tag NOTE 80078610 080610 000020 00 A 0 0 4 [10] .note.gnu.build-i NOTE 80078630 080630 000024 00 A 0 0 4 [11] .data PROGBITS 80078658 080658 000ef0 00 WA 0 0 8 [12] .tdata PROGBITS 80079548 081548 000010 00 WAT 0 0 4 [13] .tbss NOBITS 80079558 081558 000018 00 WAT 0 0 4 [14] .jcr PROGBITS 80079558 081558 000004 00 WA 0 0 4 [15] .got PROGBITS 8007955c 08155c 000070 00 WA 0 0 4 [16] .bss NOBITS 800795d0 0815cc 001124 00 WA 0 0 8 [17] __libc_freeres_pt NOBITS 8007a6f4 0815cc 000018 00 WA 0 0 4 [18] .heap NOBITS 8007a70c 0815cc 000400 00 WA 0 0 1 [19] .stack NOBITS 8007ab0c 0815cc 000400 00 WA 0 0 1 [20] .resource_table PROGBITS 00003000 003000 0003d4 00 WA 0 0 4 [21] .comment PROGBITS 00000000 0815cc 000056 01 MS 0 0 1 [22] .ARM.attributes ARM_ATTRIBUTES 00000000 081622 000035 00 0 0 1 [23] .shstrtab STRTAB 00000000 081657 000128 00 0 0 1 [24] .symtab SYMTAB 00000000 081b90 00dfe0 10 25 2434 4 [25] .strtab STRTAB 00000000 08fb70 007a5d 00 0 0 1 Key to Flags: W (write), A (alloc), X (execute), M (merge), S (strings) I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown) O (extra OS processing required) o (OS specific), p (processor specific) There are no section groups in this file. Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align EXIDX 0x07ff90 0x80077f90 0x80077f90 0x00680 0x00680 R 0x4 LOAD 0x000000 0x00000000 0x00000000 0x033d4 0x033d4 RW 0x8000 LOAD 0x008000 0x80000000 0x80000000 0x795cc 0x7af0c RWE 0x8000 NOTE 0x080610 0x80078610 0x80078610 0x00044 0x00044 R 0x4 TLS 0x081548 0x80079548 0x80079548 0x00010 0x00028 R 0x4 Something is still scary: I've got a lot errors like: readelf: Warning: Corrupt ARM compact model table entry: b4040184 Compact model index: 52 readelf: Warning: Unknown ARM compact model index encountered + +Now I try to fix the entry point address... Should be something near 0x0 .... is now @0x8xxxxxxx. (I compare the results of my little build system with the elf-readout of the working example and replace my section to fit the layout in the working xem4) Still a lot to do... Do you have a documentation, which explains what a firmware have to look like to be able to boot via remoteproc? The only thing I found is a documentation in the kernel of how to write drivers. This work is still done... What about a documentation of the realized API of the TI-remoteproc driver in linux? This would be very nice, too. + +I found something and now it works a little bit... First: Devide the problem into its parts: 1) Build M4 Code using the Gnu-toolchain To build M4 Code, I use arm-linux-gnueabi-toolchain with this options: CFLAGS += -lm -mthumb -mcpu=cortex-m4 Question: Do I have to use another GNU-Toolchain or options? 2) Build in "resource_table" to make "remoteprov" usable. I used the file: custom_rsc_table_omap5_ipu.h as mentioned early in this thread. (To make it work, some changes are necessary: the #pragma are not known by GNU or will be ignored, so I used: __attribute__((section(".resource_table"))) __attribute__ ((aligned (2))) struct my_resource_table ti_ipc_remoteproc_ResourceTable =... to produce the needed "rexouce_table". Question: Is there a well tested "bare GNU"-compatible version of this file available? 3) use a working startup-code Well, in a galaxy far, far away... a file named: startup_ARMCM4.S was found... bound in... and do not do the expected :( Question: All I did was "putting" this stuff together with the small main-file and its included custom_rsc_table_omap5_ipu like this (in a Makefile): $(CC) $(LDFLAGS) -o main.o startup.S main.c $(LDLIBS$(LDLIBS-$(@))) $(CFLAGS) -I $(INCLUDE_PATH) -static (I renamed the startup-code in startup.S). No comiler errors... but still no working code on the machine. But: It can be loaded as a firmare! A little success... Now: Maybe the startup.S is wrong, or I have to customize the devicetree file, doing something else the "dra7-evm-infoadas.dtb" do usually? So in all in nutshell: A simple GNU-Toolchain Makefile project, which is showing HOW TO build a firmware the SIMPLEST WAY... bare metal... would be very welcome. Otherwise there are too many things to take care about: I've no more time to create a own SDK without an existing Board Support: At this moment, this is limited to some "Make it work on your own"-stuff and propretary Environments (CCS and its examples - uses Sys/BIOS strongly! And visual-sdk... is bound to exactly the mechanism of "use-case" and "algorithms"... but nothing fullfill our requiremtents: A simple example to getting startet building a bare metal Firmware for remoteproc in Linux only using the GNU-toolchain in a very simple Makefile project... and of course: Using the adequate startup-Code, without this little assembler stub, nothing will work and the one I found: Maybe it's OK, but it is not working, anyhow...) + diff --git a/data2/text/range/10001-15000/623820.txt b/data2/text/range/10001-15000/623820.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ba019dfceab97f4514d28fc4165da328e7c94ef --- /dev/null +++ b/data2/text/range/10001-15000/623820.txt @@ -0,0 +1,120 @@ +Ticket Name: RTOS/TDA2HV: How to create a shared region (SR0) in OCMC RAM? + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hello all, I'm working on the TDA2xx VAYU EVM XC5777X CPU board. My interest is in the IPU (M4) and DSP (C66) communication. At this point we are using the shared memory region defined in the external memory, described as in the IPC examples from vision SDK 2.12. In order to make things work we created custom platform file and defined the SR_0 region as: ["SR_0", + { + name: "SR_0", + base: 0x8E000000, + len: 0x1000000, + space: "data", + access: "RW", + } + ], And config file capsule ipc.cfg.xs contain the description of region: /* shared region configuration */ +var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); +SharedRegion.translate = false; +/* configure SharedRegion #0 (IPC) */ +var SR0Mem = Program.cpu.memoryMap["SR_0"]; + +SharedRegion.setEntryMeta(0, + new SharedRegion.Entry({ + name: "SR_0", + base: SR0Mem.base, + len: SR0Mem.len, + ownerProcId: 0, + isValid: true, + cacheLineSize: 128, + cacheEnable: SR0_cacheEnable + }) +); The SR_0 is owned by the DSP. Now we want to speed up load and stores to the memory, because it hurts our performance, so the plan is to define smaller shared region but in the OCMC RAM chips 2 and 3, which overall has 2 MiB of space. The first question is it possible? Can we map the SR_0 as one region on both of them like this: ["SR_0", + { + name: "SR_0", + base: 0x40400000, + len: 0x00200000, + space: "code/data", + access: "RWX", + } + ], If yes the next question is how to properly configure the AMMU of the IPU to work like this. Since it support only 2 medium pages entries with 256KiB size and they are occupied to map the OCMC RAM1 chip. And large pages entries support only 32M and 512M sizes. I tried to describe it like this: var AMMU = xdc.useModule('ti.sysbios.hal.ammu.AMMU'); + +AMMU.configureAmmu = true; + +/*********************** Small Pages *************************/ +/* smallPages[0] & smallPages[1] are auto-programmed by h/w */ +/* Overwrite smallPage[1] so that 16K is covered. H/w reset value configures +* only 4K */ +AMMU.smallPages[0].pageEnabled = AMMU.Enable_YES; +AMMU.smallPages[0].logicalAddress = 0x00000000; +AMMU.smallPages[0].translatedAddress = 0x55020000; +AMMU.smallPages[0].translationEnabled = AMMU.Enable_YES; +AMMU.smallPages[0].size = AMMU.Small_16K; +AMMU.smallPages[0].volatileQualifier = AMMU.Volatile_FOLLOW; +AMMU.smallPages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; + +/* Overwrite smallPage[1] so that 16K is covered. H/w reset value configures +* only 4K */ +AMMU.smallPages[1].pageEnabled = AMMU.Enable_YES; +AMMU.smallPages[1].logicalAddress = 0x40000000; +AMMU.smallPages[1].translatedAddress = 0x55080000; +AMMU.smallPages[1].translationEnabled = AMMU.Enable_YES; +AMMU.smallPages[1].size = AMMU.Small_16K; +AMMU.smallPages[1].volatileQualifier = AMMU.Volatile_FOLLOW; + + +/*********************** Medium Pages *************************/ +/* OCMC space is mapped */ +/* Make it L1 cacheable */ +AMMU.mediumPages[0].pageEnabled = AMMU.Enable_YES; +AMMU.mediumPages[0].logicalAddress = 0x00300000; +AMMU.mediumPages[0].translatedAddress = 0x40300000; +AMMU.mediumPages[0].translationEnabled = AMMU.Enable_YES; +AMMU.mediumPages[0].size = AMMU.Medium_256K; +AMMU.mediumPages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; +AMMU.mediumPages[0].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK; +AMMU.mediumPages[0].L1_allocate = AMMU.AllocatePolicy_ALLOCATE; +AMMU.mediumPages[0].L1_posted = AMMU.PostedPolicy_POSTED; + +AMMU.mediumPages[1].pageEnabled = AMMU.Enable_YES; +AMMU.mediumPages[1].logicalAddress = 0x00340000; +AMMU.mediumPages[1].translatedAddress = 0x40340000; +AMMU.mediumPages[1].translationEnabled = AMMU.Enable_YES; +AMMU.mediumPages[1].size = AMMU.Medium_256K; +AMMU.mediumPages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; +AMMU.mediumPages[0].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK; +AMMU.mediumPages[0].L1_allocate = AMMU.AllocatePolicy_ALLOCATE; +AMMU.mediumPages[0].L1_posted = AMMU.PostedPolicy_POSTED; + +/*********************** Large Pages *************************/ + +/* Code/Data: Large page (32M); cacheable */ +AMMU.largePages[0].pageEnabled = AMMU.Enable_YES; +AMMU.largePages[0].logicalAddress = 0x80000000; +AMMU.largePages[0].translationEnabled = AMMU.Enable_NO; +AMMU.largePages[0].size = AMMU.Large_32M; +AMMU.largePages[0].volatileQualifier = AMMU.Volatile_FOLLOW; +AMMU.largePages[0].L1_cacheable = AMMU.CachePolicy_CACHEABLE; +AMMU.largePages[0].L1_posted = AMMU.PostedPolicy_POSTED; +AMMU.largePages[0].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; +AMMU.largePages[0].L2_posted = AMMU.PostedPolicy_NON_POSTED; + +/* map SR_0 ammu (non-cacheable) */ +AMMU.largePages[1].pageEnabled = AMMU.Enable_YES; +AMMU.largePages[1].logicalAddress = 0x40400000; // 0x8E000000; +AMMU.largePages[1].translationEnabled = AMMU.Enable_NO; +AMMU.largePages[1].size = AMMU.Large_32M; +AMMU.largePages[1].L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; +AMMU.largePages[1].L1_posted = AMMU.PostedPolicy_NON_POSTED; +AMMU.largePages[1].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; +AMMU.largePages[1].L2_posted = AMMU.PostedPolicy_NON_POSTED; But at the BIOS startup i'm getting the following problem: [Cortex_M4_IPU1_C0] ti.sysbios.family.arm.m3.Hwi: line 1105: E_hardFault: FORCED ti.sysbios.family.arm.m3.Hwi: line 1182: E_busFault: PRECISERR: Immediate Bus Fault, exact addr known, address: 4ae0c204 Exception occurred in background thread at PC = 0x8005510e. Core 0: Exception occurred in ThreadType_Main. Main name: main(), handle: 0x0. Main stack base: 0x800. Main stack size: 0x2000. R0 = 0x4ae0c204 R8 = 0x00000000 R1 = 0x800b3a84 R9 = 0x00000000 R2 = 0x00000010 R10 = 0x00000000 R3 = 0x000027c4 R11 = 0x00000000 R4 = 0x00000000 R12 = 0x00002764 R5 = 0x00000000 SP(R13) = 0x00002758 R6 = 0x00000000 LR(R14) = 0x80055133 R7 = 0x00002800 PC(R15) = 0x8005510e PSR = 0x01000000 ICSR = 0x00400803 MMFSR = 0x00 BFSR = 0x82 UFSR = 0x0000 HFSR = 0x40000000 DFSR = 0x00000001 MMAR = 0x4ae0c204 BFAR = 0x4ae0c204 AFSR = 0x00000000 Sorry for the long post, but it's a lot of thing to describe. Can someone help us with this issue? Best Regards, Pavlo! + +Responses: +Pavlo Can't you use vision SDK itself, it has IPC implemented uisng a small SR0 (only notify used from IPC package for inter processor communication). You can customize the SDK interms of features, number of cores etc. let me know if my understanding is not correct? regards, Shiju + +Hello Shiju, I'm not really following which projects or examples you mentioned. Is it \vision_sdk\examples folder? At this point we trying to estimate the performance of the system. So we are transferring the data to M4 via Ethernet and via IPC passing pointers to DSP. After DSP perform all calculations pointer passed to the M4 and transferred via Ethernet back to the host. So as you see the memory speed is the core feature here. Best Regards, Pavlo! + +Hi Pavlo VSDK is a complete FW for TDA2xx device. If you build for TDA2xx, then by default it enables all the cores of the SoC, set IPC between all these enabled cores, set cache/MMU configuration, set default memory map etc. This basic fetaures are enabled for all usecases present under \vision_sdk\examples folder FYI, Also, Can you please check the IPC profile numbers listed in VisionSDK_DataSheet.pdf section - Inter processor communication (IPC) latency This might help you to get some ball-park numbers. regards, Shiju + +Hi Pavlo, Did you check what's teh instruction at teh PC address 0x8005510e? Also looks like the fault happened while accessing BFAR = 0x4ae0c204. Which is CTRL_WKUP_ID_CODE - register used for detecting SIlicon Rev. Can you check and add following entry to AMMU config? /* map L3/L4 peripherals (mailbox, spinlock) into ammu (non-cacheable) */ var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x60000000; entry.translatedAddress = 0x40000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.volatileQualifier = AMMU.Volatile_FOLLOW; entry.executeOnly = AMMU.Enable_NO; entry.readOnly = AMMU.Enable_NO; entry.prefetch = AMMU.Enable_NO; entry.exclusion = AMMU.Enable_YES; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L1_allocate = AMMU.AllocatePolicy_NON_ALLOCATE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_THROUGH; Regards, RK + +Hi RK, Yes I forget to mention that the silicon Rev. check function is indeed the place where error is generated. According to map file: 8004b900 8004b900 0002456c 0002456c r-x .text.1 .text.1 0 8004b900 0002456c 8004b900 000014e8 ti.nsp.drv.gmacsw.aem4 : mdio.oem4 (.text) 8004cde8 00001250 : cpdma.oem4 (.text) 8004e038 00001122 rtsv7M4_T_le_eabi.lib : _printfi.obj (.text) 8004f15a 00000002 hal_userled_stub.aem4 : llled.oem4 (.text:LED_TOGGLE) 8004f15c 000010d8 ti.nsp.drv.gmacsw.aem4 : ale.oem4 (.text) 80050234 000010a4 ti.nsp.drv.ndk2nsp.aem4 : ndk2nsp.oem4 (.text) 800512d8 00000c68 stk.aem4 : tcpin.oem4 (.text:TcpInput) 80051f40 00000b1c ti.nsp.drv.gmacsw.aem4 : port.oem4 (.text) 80052a5c 00000a50 : cpts.oem4 (.text) 800534ac 000009fc ipc.aem4 : Ipc.obj (.text:ti_sdo_ipc_GateMP_Instance_init__E) 80053ea8 000009a8 ti.nsp.drv.gmacsw.aem4 : gmacsw.oem4 (.text) 80054850 000008b8 stk.aem4 : tcpout.oem4 (.text:TcpOutput) 80055108 000007d8 tda2xx_init.obj (.text) 800558e0 00000700 netHooks.obj (.text) So tda2xx_init.obj contain PlatformGetSiliconRev function. But addition of the large page didn't solve the issue Best Regards, Pavlo! + +Hello Shiju, I know what the Vision Frame work is, but at this point we are not using it, And I don't know if we will in the end, my zone of responsibility is DSP. At this stage we need the proof of confidence that DSP will provide enough reasonable calculation speed up. Best Regards, Pavlo! + diff --git a/data2/text/range/10001-15000/684025.txt b/data2/text/range/10001-15000/684025.txt new file mode 100644 index 0000000000000000000000000000000000000000..aed54b9c292adb5eefb684c26cd36228c8bf862c --- /dev/null +++ b/data2/text/range/10001-15000/684025.txt @@ -0,0 +1,40 @@ +Ticket Name: Linux/TDA2: TDA2xx_rvp: Can't set a static ipv4 address + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, We wanted to use the network_tx tool and therefore we tried to set a static IPv4 address for the Board. We followed the instructions in the "VisionSDK_UserGuide_NetworkTools" userguide, but still the board only has a local link IPv6 address (fe80::...). In the file .../vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/NDK_config.cfg we set var enableStaticIP = 1 and modified if (enableStaticIP) { /* Settings for static IP configuration */ Ip.address = "192.168.1.200"; Ip.mask = "255.255.255.0"; Ip.gatewayIpAddr = "192.168.1.1"; Ip.ifIdx = 1; } After the board has booted we logged in as root and started the script vision_sdk_demo.sh. Then we used the given function to show the ip address but no ip was shown. With the command "ip addr show" we found out the board had still an IPv6 address. We are using the VisionSDK version 03.02.00 on linux in a virtual machine on windows and use teraterm (on the windows host os) for the communication with the board. Kind Regards and thanks P.s. We are completely new to work with EVM from TI and vision_sdk etc. We use it for a study project. + +Responses: +Hi, can you check this thread and see if you can find something helpful: e2e.ti.com/.../647947 Regards, Yordan + +Hello Yordan, thank you for the quick answer. We will look into that and give an update whether it solved the problem. Regards + +Hello, we read the linked thread but we still have the same issue. We set "NDK_PROC_TO_USE=ipu1_0" and also tried "a15_0" in cfg.mk in the folder vision_sdk/apps/configs/tda2xx_rvp_linux_all and changed "ip=none" to "ip=169.254.189.200" in uenv.txt. This address is in the same subnet than the connected PC. Here's an image of the output of "ip addr show" Edit: When we start the script "vision_sdk_demo.sh" and press "i" it outputs "Network IP: none" And another question: Do you know what the "dra7xx-evm" means? + +Hello, Did you try setting NDK_PROC_TO_USE=ipu2_0? We recommend running network on IPU2 when running VSDK linux. Kindly share output of "make -s -j showconfig". Also do you see RJ45 LED blinking when you connect LAN cable to board? Somehow I think either the the new binaries with change are not reflected in your run. Once NDK is enabled, you should see Network IP to valid or 0.0.0.0 but never 'none'. dra7xx-evm means TDA2xx EVM. + +Hello, we also tried NDK_PROC_TO_USE=ipu2 ("ipu2_0" seems not to be a valid option) but this changed nothing. The output of "make -s -j showconfig" is: build_makeconfig.mk:35: target 'UC_iss_multi_cam_isp_sgx_3d_srv_display' given more than once in the same rule # # Build Config is [ tda2xx_rvp_linux_all ] # Build Config file is @ /home/driverless/Desktop/tmp/vision_sdk/configs/tda2xx_rvp_linux_all/cfg.mk # Build Config .h file is @ /home/driverless/Desktop/tmp/vision_sdk/links_fw/include/config/apps/tda2xx_rvp_linux_all/system_cfg.h # Build CPUs is @ ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=no # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_RVP [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-rvp # DUAL_A15_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # NDK_PROC_TO_USE=ipu2 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=/home/driverless/Desktop/tmp/vision_sdk/../ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=yes # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=yes # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_INCLUDE=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # # Linux config, # DEFAULT_UBOOT_CONFIG=d3_tda2x_defconfig # DEFAULT_KERNEL_CONFIG=d3_tda2x_defconfig # DEFAULT_DTB=d3_tda2x_fpd8ch.dtb # CMEM_INCLUDE=yes # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=yes # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_autocalibration ALG_dmaSwMs ALG_framecopy ALG_sparseopticalflow ALG_structurefrommotion ALG_surroundview # # Use-cases included in build, # UC_srv_calibration UC_networkrxdisplay UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_2mp_3d_srv UC_lvds_vip_multi_cam_3d_adaptive_srv UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_ov490_vip_multi_cam_3d_srv UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display UC_lvds_vip_multi_cam_8ch_sgx_display UC_lvds_vip_single_cam_view_sgx_display UC_lvds_vip_multi_cam_gst_display # build_makeconfig.mk:35: target 'UC_iss_multi_cam_isp_sgx_3d_srv_display' given more than once in the same rule # # CPUs that are NOT required but included in config [ tda2xx_rvp_linux_all ], # # # CPUs that are required but not included in config [ tda2xx_rvp_linux_all ], # # ERROR: IPU1_0 MUST be included in application # # Edit /home/driverless/Desktop/tmp/vision_sdk/build/configs/tda2xx_rvp_linux_all/cfg.mk to include or exclude CPUs in an application # We don't know whether the LED is blinking because of the casing, but the board is only booting completely, when we connect the LAN cable to a PC. Is there a difference between RVP and EVM 'cause it says "RVP" on the casing? And do we have to set IPU_PRIMARY_CORE to ipu1_0 to include the ipu1_0 and ipu1_1 because of the error "ERROR: IPU1_0 MUST be included in application"? + +Hello, Thanks for detailed information. ipu2 is valid option for NDK. There are major difference between RVP and EVM. Do you have TDA2xx EVM with you? Would it be possible to try on that? Basically change config to tda2xx_evm_linux_all and keep NDK on ipu2. Meanwhile I am checking the any limitation for RVP network with our internal experts. I will let you know. Thanks. + +Hello, Confirmed from expert. Adding his reply here. "Using the bios ethernet stack on TDA2x Linux has not been tested on TDA2x RVP. Only the Linux ethernet stack has been tested" + +Hello, thanks for the quick answers. Unfortunately we don't have an TDA2xx EVM. And what do we have to change now, to not use bios ethernet stack but linux ethernet stack? Do we need NDK for that? And can we set a static Ipv4 address with that? I think I didn't get what that all means and how this works. Regards + +Hello, You have to use disable NDK (set to none) and use Linux ethernet stack. Mostly it would be enabled by default but you can confirm by checking ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts to have MAC as below and not "disabled". Also rebuild the uboot and kernel after this. &mac { status = "okay"; + +Hello, we also did a build with NDK_PROC_TO_USE set to "none". In the file dra7-evm.dts it says: &mac { status = "okay"; dual_emac; }; But we still got no ipv4-address and even after setting an ipv4 address with ifconfig command it says "Network IP address: none" after pressing "i" for the ip information. + +Hello User, I have asked our experts to check and reply to your query. Please allow us to take some time to look into issue. + +Hello, Where did you get your software from? Are you using Vision SDK 3.02.87 downloaded from the D3 Engineering website? When using the Linux ethernet driver pressing 'i' will not print the IP address because that IP Address comes from the BIOS NDK. To see your IP address type ifconfig in the Linux console. If you are using D3's release of Vision SDK then ethernet should be enabled automatically. Cheers, Ben + +Hello Ben, yes we are using D3's release of Vision SDK but I don't know the version number, where can I see it? I think ethernet is enabled, that is not the problem but we can't set a static IPv4-address. Do you have any suggestions how we can achieve that? Kind Regards + +Dear all, I am Rajat Barmon working at TI,Munch.I am also having the same problem with ethernet conncetion problem.Could you help me.I am new with work on it.It would be helpful for me if your write step by step.I followed the manual for the RVP-TDA2x network tool.But it is not working.Could you help me??? Thank You. Best Regards, Rajat Barmon + +Rajat, With the current release, only the Linux Ethernet stack is available on TDA2x RVP. This means that the TI supplied tx and rx links will not work since they rely on BIOS based ethernet stacks running on the ipu cores. The Gstreamer usecase (option 'f') is the current method of sending compressed video from the TDA2x RVP to a PC. Best Regards, Ben + +Hi, I also have seen the same display. 1.I changed in NDK_config.cfg file as follow: if (enableStaticIP) { /* Settings for static IP configuration */ Ip.address = "169.254.189.200"; Ip.mask = "255.255.255.0"; Ip.gatewayIpAddr = "169.254.189.1"; Ip.ifIdx = 1; } 2.I changed Ip=none to Ip=169.254.189.200 in uenv.txt file in Vision SDK boot file. 3.what should i any change in Vision SDK and PC side ?? Please help me. Thank You. Best Regards, Rajat Barmon + +Rajat, TDA2x RVP is running Linux on A15 and using Linux Ethernet Stack. The NDK is not used in this case since it is meant for system running TI-RTOS. The change you made in NDK_config.cfg has no effect on TDA2x RVP. To use the network support on TDA2 RVP, you shouldn't change any by default. By default, Linux has the DHCP running so the RVP will get an IP assigned once Linux is booting and running. Have RVP plugging into a network with DHCP server or your own router. Once you get to Linux prompt, just do "ifconfig" to get the IP address of RVP. As Ben mentioned, you have to use Linux tool for streaming. "The Gstreamer usecase (option 'f') is the current method of sending compressed video from the TDA2x RVP to a PC." Regards, Stanley + diff --git a/data2/text/range/10001-15000/690713.txt b/data2/text/range/10001-15000/690713.txt new file mode 100644 index 0000000000000000000000000000000000000000..77dc7091312aa254869ea10a5561cfb4f10edef0 --- /dev/null +++ b/data2/text/range/10001-15000/690713.txt @@ -0,0 +1,20 @@ +Ticket Name: RTOS/TDA2: SDK_VISION_03_03 build failed on windows + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi , I am doing the clean build on windows (tried from gitbash and windows command prompt ) got same err. could you please tell what's wrong with this ? $ gmake -s -j depend /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config/apps': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all': File exists # makeconfig: Config is [ tda2xx_evm_bios_all ] # makeconfig: Output file is @ C:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all/system_cfg.h # makeconfig: Input file is @ C:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk # makeconfig: Generating header ... # makeconfig: Generating alg plugin config ... # makeconfig: Generating usecase config ... # makeconfig: Generating footer ... # makeconfig: Done !!! # # CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: IPU2 can be excluded from application # # CPUs that are required but not included in config [ tda2xx_evm_bios_all ], # # # Edit C:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application # # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_init.c # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_basic.c process_begin: CreateProcess(NULL, C:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_init.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/tisdk/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/tisdk/ti_components/networking/ndk_2_24_02_31/packages -IC:/tisdk/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/tisdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg src/edma3_drv_init.c, ...) failed. make (e=2): The system cannot find the file specified. gmake[4]: *** [C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg] Error 2 gmake[4]: *** Waiting for unfinished jobs.... # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_adv.c process_begin: CreateProcess(NULL, C:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_basic.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/tisdk/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/tisdk/ti_components/networking/ndk_2_24_02_31/packages -IC:/tisdk/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/tisdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_basic.oa15fg src/edma3_drv_basic.c, ...) failed. make (e=2): The system cannot find the file specified. gmake[4]: *** [C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_basic.oa15fg] Error 2 process_begin: CreateProcess(NULL, C:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_adv.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/tisdk/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/tisdk/ti_components/networking/ndk_2_24_02_31/packages -IC:/tisdk/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/tisdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_adv.oa15fg src/edma3_drv_adv.c, ...) failed. make (e=2): The system cannot find the file specified. gmake[4]: *** [C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_adv.oa15fg] Error 2 gmake[3]: *** [a15_0] Error 2 gmake[2]: *** [edma3lld] Error 2 gmake[1]: *** [edma3lld] Error 2 gmake: *** [depend] Error 2 thanks, Terry + +Responses: +Hi, Can you please remove -j from build and try. Thanks. Regards, Rishabh + +Hi Rishabh Tried $ gmake -s depend /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config/apps': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all': File exists # makeconfig: Config is [ tda2xx_evm_bios_all ] # makeconfig: Output file is @ C:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all/system_cfg.h # makeconfig: Input file is @ C:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk # makeconfig: Generating header ... # makeconfig: Generating alg plugin config ... # makeconfig: Generating usecase config ... # makeconfig: Generating footer ... # makeconfig: Done !!! # # CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: IPU2 can be excluded from application # # CPUs that are required but not included in config [ tda2xx_evm_bios_all ], # # # Edit C:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application # # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_init.c process_begin: CreateProcess(NULL, C:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_init.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/tisdk/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/tisdk/ti_components/networking/ndk_2_24_02_31/packages -IC:/tisdk/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/tisdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg src/edma3_drv_init.c, ...) failed. make (e=2): The system cannot find the file specified. gmake[4]: *** [C:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg] Error 2 gmake[3]: *** [a15_0] Error 2 gmake[2]: *** [edma3lld] Error 2 gmake[1]: *** [edma3lld] Error 2 gmake: *** [depend] Error 2 + +Hi, It seems that A15 tool chain is missing. Can you install it as given in 2.1.2.1 A15 Compiler, Linker of VisionSDK_UserGuide_TDA2xx.pdf. Regards, Rishabh + +Installed, do i need other tools ? c:\tisdk\vision_sdk\build>gmake -s depend /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `c:/tisdk/vision_sdk/links_fw/include/config': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `c:/tisdk/vision_sdk/links_fw/include/config/apps': File exists /cygdrive/c/tisdk/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `c:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all': File exists # makeconfig: Config is [ tda2xx_evm_bios_all ] # makeconfig: Output file is @ c:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all/system_cfg.h # makeconfig: Input file is @ c:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk # makeconfig: Generating header ... # makeconfig: Generating alg plugin config ... # makeconfig: Generating usecase config ... # makeconfig: Generating footer ... # makeconfig: Done !!! # # CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: IPU2 can be excluded from application # # CPUs that are required but not included in config [ tda2xx_evm_bios_all ], # # # Edit c:/tisdk/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application # # Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_init.c process_begin: CreateProcess(NULL, c:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF c:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_init.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -Ic:/tisdk/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -Ic:/tisdk/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -Ic:/tisdk/ti_components/networking/ndk_2_24_02_31/packages -Ic:/tisdk/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -Ic:/tisdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -Ic:/tisdk/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o c:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg src/edma3_drv_init.c, ...) failed. make (e=2): The system cannot find the file specified. gmake[4]: *** [c:/tisdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg] Error 2 gmake[3]: *** [a15_0] Error 2 gmake[2]: *** [edma3lld] Error 2 gmake[1]: *** [edma3lld] Error 2 gmake: *** [depend] Error 2 + +sorry it seems i installed to wrong path. let me try to fix it and will update + +now it works. the default sdk came with the a15 compiler but the folder name is different from the one the tools_path.mk. + +Hi Yang, Thanks for the confirmation. Glad that your issue is resolved. Regards, Rishabh + diff --git a/data2/text/range/10001-15000/694849.txt b/data2/text/range/10001-15000/694849.txt new file mode 100644 index 0000000000000000000000000000000000000000..906c68326c94c3385c65d11700975ccca8b3e08b --- /dev/null +++ b/data2/text/range/10001-15000/694849.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: In Vision SDK different size of enumeration type among TDA2x heterogeneous cores cause XDAIS Algorithm Interface failed. + +Query Text: +Part Number: TDA2 Dears, In TDA2x there are several heterogeneous cores: Cortex A15, Cortex M4, DSP C66x, EVE. Current we try to integrate TIDL (run in DSP and EVE) and H.264 codec (run in M4) in our program and each function will go crash. Either calling TIDL or calling H.264 codec will invoke XDIAS Algorithm Interface, and we observe that the size of enumeration type compiled by those corresponding compilers(A15, M4, C66x, EVE) with default enum size option is different and will cause XDAIS Algorithm Interface failed. The structure IALG_MemRec defined in ialg.h (XDIAS Algorithm Interface) is shown as the following: typedef struct IALG_MemRec { Uns size; /**< Size in MAU of allocation */ Int alignment; /**< Alignment requirement (MAU) */ IALG_MemSpace space; /**< Allocation space */ IALG_MemAttrs attrs; /**< Memory attributes */ Void *base; /**< Base address of allocated buf */ } IALG_MemRec; and the two enumeration types defined in ialg.h are also shown as the following: typedef enum IALG_MemSpace { IALG_EPROG = IALG_MPROG | IALG_MXTRN, /**< External program memory */ IALG_IPROG = IALG_MPROG, /**< Internal program memory */ IALG_ESDATA = IALG_MXTRN + 0, /**< Off-chip data memory (accessed sequentially) */ IALG_EXTERNAL = IALG_MXTRN + 1, /**< Off-chip data memory (accessed randomly) */ IALG_DARAM0 = 0, /**< Dual access on-chip data memory */ IALG_DARAM1 = 1, /**< Block 1, if independant blocks required */ IALG_SARAM = 2, /**< Single access on-chip data memory */ IALG_SARAM0 = 2, /**< Block 0, equivalent to IALG_SARAM */ IALG_SARAM1 = 3, /**< Block 1, if independant blocks required */ IALG_DARAM2 = 4, /**< Block 2, if a 3rd independent block required */ IALG_SARAM2 = 5 /**< Block 2, if a 3rd independent block required */ } IALG_MemSpace; typedef struct IALG_MemRec { Uns size; /**< Size in MAU of allocation */ Int alignment; /**< Alignment requirement (MAU) */ IALG_MemSpace space; /**< Allocation space */ IALG_MemAttrs attrs; /**< Memory attributes */ Void *base; /**< Base address of allocated buf */ } IALG_MemRec; We use the following test code to display the data size: printf("sizeof(IALG_MemSpace) = %d, sizeof(IALG_MemAttrs) = %d, sizeof(IALG_MemRec) = %d\r\n", sizeof(IALG_MemSpace) = %d, sizeof(IALG_MemAttrs) = %d, sizeof(IALG_MemRec) = %d); The data size displayed in different cores in TDA2x are: [M4 ]: sizeof(IALG_MemSpace) = 1, sizeof(IALG_MemAttrs) = 1, sizeof(IALG_MemRec) = 16 [A15]: sizeof(IALG_MemSpace) = 4, sizeof(IALG_MemAttrs) = 4, sizeof(IALG_MemRec) = 20 [DSP]: sizeof(IALG_MemSpace) = 4, sizeof(IALG_MemAttrs) = 4, sizeof(IALG_MemRec) = 20 [EVE]: sizeof(IALG_MemSpace) = 1, sizeof(IALG_MemAttrs) = 1, sizeof(IALG_MemRec) = 16 Mainly the above enum size in M4 and EVE is 8-bit (packed size, the smallest possible byte size) and the enum size in A15 and DSP is 32-bit. In Vision SDK we may use XDIAS Algorithm Interface among different cores, the above enum data defined in EVE and M4 is 8-bit and will be incorrectly accessed by A15 and DSP. Since there is no compiler option for EVE(arp32) compiler to generate the above enum data to be 32-bit, we choose to force A15 compiler with compiler option -fshort-enums and C66x compiler with option -small_enum to generate the above enum data to be packed size (8-bit) in our own code, but we still can not make XDIAS Algorithm Interface among cores work correctly. The main reason is that in Vision SDK there are many pre-built libraries (mainly located in ti_compoenents folder) which are built with default compiler option. Unless we have the source code of those pre-built libraries, we can't generate the same packed enum size for different cores. We wonder why TI does not provide consistent enum size in threir released library which uses XDAIS Algorithm Interface, since it may be accessed as the parameter accross different cores. We prefer 32-bit enum size for all cores. If there is any difficulty to generate 32-bit enum size for all cores, packed enum size is also acceptable for all cores. In anyway, can TI provide a consistent enum size among different cores in Vision SDK and all pre-built libraries? Sincerely. Mark Kang. + +Responses: +Mark Kang. I guess you are using Vision SDK, right? In VSDK I have used constant size data type for any interface file, where it need to run on heterogeneous cores: Cortex A15, Cortex M4, DSP C66x, EVE. for example, i will only use Int32 or UInt32 instead of int or uint, this way we can assure same size in all cores for any enums use as below, sample code below typedef enum { DEC_LINK_FIELDLEVELPROCESSCALL = 0, DEC_LINK_FRAMELEVELPROCESSCALL = 1, DEC_LINK_CAL_LEVEL_FORCE32BITS = 0x7FFFFFFF /**< To make sure enum is 32 bits */ } DecLink_ChProcessCallLevel; the last entry will make sure enum is 32 bits Hope i have answered your question? regards, Shiju + +Hi Shiju, We already have tried the same method as you suggested (see below code), it doesn't work because we don't have all the source code of TI released libraries using XDIAS Algorithm Interface to rebuild. typedef enum IALG_MemSpace { IALG_EPROG = IALG_MPROG | IALG_MXTRN, /**< External program memory */ IALG_IPROG = IALG_MPROG, /**< Internal program memory */ IALG_ESDATA = IALG_MXTRN + 0, /**< Off-chip data memory (accessed sequentially) */ IALG_EXTERNAL = IALG_MXTRN + 1, /**< Off-chip data memory (accessed randomly) */ IALG_DARAM0 = 0, /**< Dual access on-chip data memory */ IALG_DARAM1 = 1, /**< Block 1, if independant blocks required */ IALG_SARAM = 2, /**< Single access on-chip data memory */ IALG_SARAM0 = 2, /**< Block 0, equivalent to IALG_SARAM */ IALG_SARAM1 = 3, /**< Block 1, if independant blocks required */ IALG_DARAM2 = 4, /**< Block 2, if a 3rd independent block required */ IALG_SARAM2 = 5 /**< Block 2, if a 3rd independent block required */ IALG_MEMSPACE_END = 0x7FFFFFFF **< To make sure enum is 32 bits */ } IALG_MemSpace; typedef enum IALG_MemAttrs { IALG_SCRATCH, /**< Scratch memory. */ IALG_PERSIST, /**< Persistent memory. */ IALG_WRITEONCE /**< Write-once persistent memory. */ IALG_MEMATTRS_END = 0x7FFFFFFF **< To make sure enum is 32 bits */ } IALG_MemAttrs; Although we have TIDL source and can modify ialg.h( XDIAS Algorithm Interface) as the above code, re-build the TIDL to make sure the above enum data is 32-bit in both DSP and EVE core. However, ialg.h is XDIAS Algorithm Interface which is also used in other library such as H.264 codec released by TI. Solely modifying our local ialg.h only guarantee the enum type is 32-bit in our own code for all heterogeneous cores (A5, M4, DSP, EVE), but not guarantee the enum data in TI released libraries is also 32-bit. Unless TI can release the all libraries using XDIAS Algorithm Interface by re-building them with the same 32-bit enum as you suggest. Best regards. Mark Kang. + +Hi Mark I do not suggest you to modify and rebuild Codec and TIDL libs. Instead you can create a public header files which is almost a copy of these alg/codec header files and use the same in your integration/wrapper code. Define constant size data type in this new interface file and use the same across cores. The same approach I have followed for Vision SDK (TI SW development Kit for ADAS). If you have not looked into VSDK, please check if you can use VSDK, where we have addressed all these issues. BTW, can you please help me to understand your requirement a bit more, I mean what data flow/usecase you are tying to build etc.? regards, Shiju + +Hi Shiju, I don't get your point. Adding wrapper code seems to be just another kind of temporarily workaround method, but it does not solve issue radically to me. Although XDIAS originally stands for "eXpressDSP Algorithm Interface Standard", later TI still uses it in libraries running on other cores such as m4(e.g. H.264) and EVE(e.g. TIDL). If TI extended the usage of XDIAS Algorithm Interface from DSP to other cores, the design of later version of XDIAS Algorithm Interface should be taken heterogeneous cores into consideration and make the size of data structure (e.g. enum size) in XDIAS Algorithm Interface be the same among different cores. From software perspective, XDIAS Algorithm Interface should be transparent to user. It means the data structure of XDIAS Algorithm Interface must be cross-core. It's weird and non-intuitive to add a warpper to handle heterogeneous-core-dependency data structure when calling libraries using XDIAS Algorithm Interface. Mark. + +Hi Mark I am coping to our XDIAS Algorithm Interface expert. regards, Shiju + +Hi Mark, I understood your point and very valid point. We avoid the usage of enum in our public interface files like itidl.h and any other algorithm for that say. But we base our interface on this ialg.h so the problem got carried in these components also. So let me start with acknowledging the problem but let me also understand how can we help now given this issue. So few questions 1. Are you creating any instance of such object which has IALG_MemRec and sharing across cores? If so which one is that? I think this can be avoided so I want to understand your need for such usage if any For example if you create a TIDL object, it can be shared across cores because the final created object doesn't have size difference across cores I need to check Codec interface file also but I think the core interface of codec also doesn't use any enum. So after object creation it should be shareable across cores. And the object creation sequence is most likely local to core and if so the impact of different size for the IALG_MemRec shouldn't cause the issue 2. So please help me understand your object creation sequencing which involves these multiple cores and create the hang issue you mentioned. Thanks, With Regards, Pramod + +Hi Pramod, 1. We share an TIDL-related object containing IALG_MemRec across DSP and EVE. The TIDL-related object is created in DSP first, then this object is passed to EVE and EVE calls TIDL library. Finally DSP gets the output of TIDL from EVE and performs some post-processing. At our first time of integration, we noticed that the enum size issue causing the size of TIDL-related object is different between DSP and EVE and and we tried to fix it by ourselves. We tried two cases(see below) to fix the issue, one failed and the other worked. [case A, fail] We used DSP compiler option -small_enum to force IALG_MemRec size be 16-byte, the same size as the one generated by EVE (ARP32) compile i.e, sizeof(IALG_MemSpace) = 1, sizeof(IALG_MemAttrs) = 1, sizeof(IALG_MemRec) = 16. However, the option -small_enum also applied to all our code(including Vision SDK code) and the built program went crash immediately after booting. Perhaps only limiting the option -small_enum to to our TIDL-related object code but not all other Vision SDK code can avoid system crash. We didn't try this proposal because it made the build configuration inconsistent between our own development code and Vision SDK code. [Case B, work] We force the enum be 32-bit by adding an 0x7FFFFFFF value at the end of enum decalartion like the following: typedef enum IALG_MemAttrs { IALG_SCRATCH, /**< Scratch memory. */ IALG_PERSIST, /**< Persistent memory. */ IALG_WRITEONCE /**< Write-once persistent memory. */ IALG_MEMATTRS_END = 0x7FFFFFFF **< To make sure enum is 32 bits */ } IALG_MemAttrs; Since we got TIDL source from TI, we can generated the IALG_MemRec size be 20-byte for both DSP and EVE. i.e., sizeof(IALG_MemSpace) = 4, sizeof(IALG_MemAttrs) = 4, sizeof(IALG_MemRec) = 20. So our TIDL-related object works between DSP and EVE. 2. After our "successful" integration of using case B, we tried to integrate H.264 codec library into our program. But H.264 codec failed to run in our built program. We guessed part of H.264 related code containg IALG_MemRec containing 32-bit enum and the pre-built H.264 codec library containing 8-bit enum. However, If we didn't fix TIDL-related object between DSP and EVE and also integrate H.264 code library, our program can run H.264 codec successfully. So we face the dilemma, only one of TIDL and H.264 can work in our program but not both. Of course currently we have some workaround method to make both TIDL and H.264 working in our program, but it requires to re-build TIDL source code. We are afraid that sooner or later we may integrate other XDIAS Algorithm Interface library and without rebuilding its source code by our workaround method, the same issue will happen again. So we need TI to make the data structure size in XDIAS Algorithm Interface be the same among heterogeneous cores. Best regards. Mark. + +Hi Mark, Thanks for detailed explanation... We shall fix this issue in next TIDL release and that should fix your current issue. we shall also inform the changes to you soon so you can apply locally in your code base and gets unblocked without waiting for release. Now one thing which I want to understand on your usage and suggest As such if your usage is that few set of layers on EVE and few set of layers on DSP - you can create 2 instance one on each core (EVE and DSP) with proper setting of currLayersGroupId and coreId. You can refer SSD based object detection example for such usage. Thanks, With Regards, Pramod + +Hi Mark, As mentioned about quick fix, you can do below change 1. File tidl_alg_int.h : Define one local structure IALG_MemRecLocLoc by reusing the IALG_MemRec and chnage both space and attrs parameter as Int instead of enumerated parameters 2. File tidl_alg.c Line 2429, there is one memcpy to algHandle->memRec, you can replace this in a loop with individual structure element assignments (total 5 assignments in a loop iterating for algHandle->numMemRecs times) Thanks, With Regards Pramod + +Hi Pramod, Thanks for the quick fix. We can do the similar modification to resolve the issue Instead of change "space" and "attrs" parameter from enum to Int (32-bit), we prefer change it to char(8-bit). Since "space" and "attrs" parameter in H.264 pre-built library for M4 core is 8-bit and we want to make all of their size be the same. Mark. + +Hi Mark, With this change, the dependency of TIDL object goes away on enumerated data type, so it doesn't matter if H.264 pre-built library has 8-bit or 32-bit. However there is no issue in keeping it char (8-bit) instead of int (32-bit) Thanks, With Regards, Pramod + diff --git a/data2/text/range/10001-15000/695247.txt b/data2/text/range/10001-15000/695247.txt new file mode 100644 index 0000000000000000000000000000000000000000..37e09502379b0cbbab13023512ce5745453062de --- /dev/null +++ b/data2/text/range/10001-15000/695247.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: TDA2xx make opencx + +Query Text: +Part Number: TDA2 Tool/software: Linux when i make linux_clean make linux make linux_install make -s -j depend make -s -j opencx In the last step encountered an error： # Final executable /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm//apps.out !!! # /bin/sh: 1: cd: can't cd to /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod cp: cannot stat ‘/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod/debugss_kmodule.ko’: No such file or directory make[6]: *** [linux_app_install] Error 1 make[5]: *** [app_linux_install] Error 2 make[4]: *** [apps_hlos] Error 2 make[3]: *** [apps] Error 2 make[2]: *** [vision_sdk] Error 2 make[1]: *** [_vision_sdk_opencx] Error 2 make: *** [opencx] Error 2 But i have no such directory /ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod . Where can I get this directory? + +Responses: +Has anyone encountered this problem? I'm stuck here. Ask for help. + +Hi Xie Baojian, Follow Linux UG - section 2.4.2.2.4 & clone OpenCL supported package Regards Surya + +Hi Surya, Thank you for your answer, I have solved the compile problem, but i run the chains_vipSingleCamOpenCLFrameCopySgxDisplay failed, the info is : [HOST] [HOST ] 89.268193 s: [HOST] [IPU2 ] 89.268346 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 89.268895 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 89.365796 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [HOST] [IPU2 ] 89.366101 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 89.381199 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 89.381595 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [HOST ] 89.503233 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 89.502135 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 89.502623 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 89.502958 s: IPC_OUT_0 : Create Done !!! ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) [HOST] [HOST ] 89.503812 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 89.503904 s: ALG: ERROR: No alg create function specified (algId = 6) !!! Can you give me more help?thank you very much Regards, Xie Baojian + +Hi Xie Baojian, Is there any modification in UC ? Refer below link if there are any change in UC e2e.ti.com/.../694186 Regards Surya + +Hi Surya, Which file do you mean by UC? i think i have no modification in this file. Regards Xie Baojian + +Hi Xie Baojian, Could you please share "appLiblist_a15_0.txt" file under "vision_sdk\binaries\apps\tda2xx_evm_linux_opencx" ? Also share cfg.mk & uc_cfg.mk file under "vision_sdk\apps\configs\tda2xx_evm_linux_opencx" Regards Surya + +Hi Surya, appLiblist_a15_0.txt: /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/utils.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/network_utils.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_gate.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_null.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_merge.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_dup.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_sgxFrmcpy.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_algorithm.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_ipcOut.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_select.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_ipcIn.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_sync.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/system.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/links_a15_nullSrc.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/osa.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/a15_0/release/apps.a cfg.mk: # This file defines the modules included in $(MAKECONFIG) config # # Modules are split into, # - Use-cases specified in uc_cfg.mk # - Other system config/feature, specified in this file # # Any specific overrides are also specified in this file # Example, for TDA3x SoC EVE2/3/4 are not present and hence force marked as , i.e disabled # # # Additional config options # # Configure this parameter to enable using OpenCL with OpenCV # Setting yes enables OpenCL in OpenCV # Anything else disables it OPENCV_OPENCL=yes # # CPUs to included in build # # EVEs, IPU1-1 not required for OpenCx demos hence disabled # for build custom use-cases with EVE and OpenCx, EVE, IPU1-1 # can be enabled as required # PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=no PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=no PROC_EVE1_INCLUDE=no PROC_EVE2_INCLUDE=no PROC_EVE3_INCLUDE=no PROC_EVE4_INCLUDE=no VSDK_BOARD_TYPE=TDA2XX_EVM DUAL_A15_SMP_BIOS=no # Supported values: DDR_MEM_512M DDR_MEM=DDR_MEM_512M # Supported values: ipu1_0 ipu1_1 a15_0 none NDK_PROC_TO_USE=a15_0 # Supported values: ipu1_0 none FATFS_PROC_TO_USE=ipu1_0 ifeq ($(OPENCV_OPENCL), yes) FATFS_PROC_TO_USE=a15_0 endif # # Used to control building of algorithm source. # By default algorithm source not included in Vision SDK # BUILD_ALGORITHMS=no # # Applies profile to all cores # # Supported profiles: release debug #PROFILE=debug PROFILE ?= release PROFILE_ipu1_0 ?= $(PROFILE) PROFILE_ipu1_1 ?= $(PROFILE) PROFILE_ipu2 ?= $(PROFILE) PROFILE_c66xdsp_1 ?= $(PROFILE) PROFILE_c66xdsp_2 ?= $(PROFILE) PROFILE_arp32_1 ?= $(PROFILE) PROFILE_arp32_2 ?= $(PROFILE) PROFILE_arp32_3 ?= $(PROFILE) PROFILE_arp32_4 ?= $(PROFILE) PROFILE_a15_0 ?= $(PROFILE) # # For TDA2xx & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem # For TDA3xx - We have only IPU1 and hence IPU1 is the only option # Select IPU primary core from the available IPU1 & IPU2 subsytems # # Supported values: ipu1_0 ipu2 IPU_PRIMARY_CORE=ipu1_0 IPU_SECONDARY_CORE=ipu2 # # Set A15_TARGET_OS # A15 can run Linux or Bios # # A15_TARGET_OS support # Platform BIOS Linux # # TDA2XX_EVM yes yes # TDA3XX_EVM yes no # TDA2EX_EVM yes yes # # Supported values: Bios Linux A15_TARGET_OS=Bios IVAHD_INCLUDE=yes VPE_INCLUDE=yes DSS_INCLUDE=yes # # EMIF ECC and Freedom from Interference (FFI) are clubbed together as they # involve consolidated memory map changes # ECC_FFI_INCLUDE=yes is not supported for DDR_MEM_128M # If ECC_FFI_INCLUDE is set to no - memory map will match older versions. # Firewall configuration and DSP XMC configuration is enabled/disabled using this # flag # Vision SDK does not enable EMIF ECC but expects SBL to enable it. # Vision SDK sets up ECC error handlers irrespective of value of ECC_FFI_INCLUDE. # ECC_FFI_INCLUDE=no AVB_INCLUDE=no # # Enable below macro to enable DCAN integration into Vision SDK. # DCAN_INCLUDE=no CPU_IDLE_ENABLED=yes # # Enable below macro to view the bandwidth used by different IPs in the device # as a graphical plot on the display screen. # DATA_VIS_INCLUDE=no OPENCL_INCLUDE=yes ENABLE_OPENCV=yes ENABLE_OPENCV_TESTS=no BUILD_OPENCV_SRC=no TREAT_WARNINGS_AS_ERROR = no HS_DEVICE=no include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk uc_cfg.mk: ifeq ($(OPENCL_INCLUDE),yes) UC_vip_single_cam_openclcanny_edge=yes UC_vip_single_cam_openclframe_copy=yes endif ifeq ($(ENABLE_OPENCV),yes) UC_vip_single_cam_opencvcanny=yes UC_vip_single_cam_opencvopencldilation=yes ifeq ($(ENABLE_OPENCV_TESTS),yes) UC_vip_single_cam_opencvtests=yes endif endif Regards, Xie Baojian + +Hi Xie Baojian, The cfg.mk & uc_cfg.mk file you shared is of tda2xx_evm_bios_opencx Can you share the cfg.mk & uc_cfg.mk file of tda2xx_evm_linux_opencx ? Regards Surya + +Hi Regards, i am sorry for my mistake， cfg.mk： # This file defines the modules included in $(MAKECONFIG) config # # Modules are split into, # - Use-cases specified in uc_cfg.mk # - Other system config/feature, specified in this file # # Any specific overrides are also specified in this file # Example, for TDA3x SoC EVE2/3/4 are not present and hence force marked as , i.e disabled # # # Additional config options # # # CPUs to included in build # # IPU1 (core 0 & 1 are) not supported when IPU_PRIMARY_CORE=ipu2 PROC_IPU1_0_INCLUDE=no PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=no PROC_DSP2_INCLUDE=no PROC_EVE1_INCLUDE=no PROC_EVE2_INCLUDE=no PROC_EVE3_INCLUDE=no PROC_EVE4_INCLUDE=no VSDK_BOARD_TYPE=TDA2XX_EVM # Supported values: DDR_MEM_1024M DDR_MEM=DDR_MEM_1024M # Supported values: ipu1_0 ipu1_1 a15_0 none NDK_PROC_TO_USE=none # # Used to control building of algorithm source. # By default algorithm source not included in Vision SDK # BUILD_ALGORITHMS=no # # Applies profile to all cores # # Supported profiles: release debug #PROFILE=debug PROFILE ?= release PROFILE_ipu1_0 ?= $(PROFILE) PROFILE_ipu1_1 ?= $(PROFILE) PROFILE_ipu2 ?= $(PROFILE) PROFILE_c66xdsp_1 ?= $(PROFILE) PROFILE_c66xdsp_2 ?= $(PROFILE) PROFILE_arp32_1 ?= $(PROFILE) PROFILE_arp32_2 ?= $(PROFILE) PROFILE_arp32_3 ?= $(PROFILE) PROFILE_arp32_4 ?= $(PROFILE) PROFILE_a15_0 ?= $(PROFILE) # # For TDA2xx & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem # For TDA3xx - We have only IPU1 and hence IPU1 is the only option # Select IPU primary core from the available IPU1 & IPU2 subsytems # # Supported values: ipu1_0 ipu2 IPU_PRIMARY_CORE=ipu2 IPU_SECONDARY_CORE=ipu1_0 # # Set A15_TARGET_OS # A15 can run Linux or Bios # # A15_TARGET_OS support # Platform BIOS Linux # # TDA2XX_EVM yes yes # TDA3XX_EVM yes no # TDA2EX_EVM yes yes # # Supported values: Bios Linux A15_TARGET_OS=Linux IVAHD_INCLUDE=no VPE_INCLUDE=no DSS_INCLUDE=yes AVB_INCLUDE=no # # Enable below macro to enable DCAN integration into Vision SDK. # DCAN_INCLUDE=no CPU_IDLE_ENABLED=yes # # Enable below macro to view the bandwidth used by different IPs in the device # as a graphical plot on the display screen. # DATA_VIS_INCLUDE=no OPENCL_INCLUDE=yes TREAT_WARNINGS_AS_ERROR = yes HS_DEVICE=no DEFAULT_UBOOT_CONFIG := dra7xx_evm_vision_config DEFAULT_KERNEL_CONFIG := omap2plus_defconfig # For TDA2x DEFAULT_DTB := dra7-evm-infoadas.dtb # # Enable macro for OpenCV # ENABLE_OPENCV=yes CMEM_INCLUDE=yes BUILD_OPENCV_SRC=no BUILD_LLVM=no include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk uc_cfg.mk： ifeq ($(OPENCL_INCLUDE),yes) UC_vip_single_cam_openclframe_copy=yes UC_vip_single_cam_framecopy_sgx_display=yes endif ifeq ($(ENABLE_OPENCV),yes) UC_vip_single_cam_opencvcanny_sgx_display=yes UC_vip_single_cam_opencvopencldilation_sgx_display=yes endif + +Hi Xie Baojian, All configs are looking fine Could you please just clean & build (follow below steps) ? From vision_sdk/build folder make clean rm -rf ../binaries (if you have build for some other configs & want to save, move them to some other location) make linux_clean make linux make linux_install make -s -j depend make -s -j opencx Note: dsp_8.1.0 compiler path should be added to system path Regards Surya + diff --git a/data2/text/range/10001-15000/695927.txt b/data2/text/range/10001-15000/695927.txt new file mode 100644 index 0000000000000000000000000000000000000000..557f9b8a5ddcfa8cb5388e0f492b506e3691f701 --- /dev/null +++ b/data2/text/range/10001-15000/695927.txt @@ -0,0 +1,120 @@ +Ticket Name: TIDL SSD based object detection - partitioning into EVE & DSP + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, In TIDeepLeraningLibrary_DataSheet.pdf (TIDL 01.01.00.00), folloiwng comment is shown in TABLE.4B on page 4. " Initial part of the network is executed / profiled on EVE and the later part is on C6x DSP (Later part of the network is best optimal on C6x DSP). " SSD based detection network in Caffe-Jacinto-Model contains 45 layers as below. 0, TIDL_DataLayer 1, TIDL_BatchNormLayer 2, TIDL_ConvolutionLayer 3, TIDL_ConvolutionLayer 4, TIDL_ConvolutionLayer 5, TIDL_ConvolutionLayer 6, TIDL_ConvolutionLayer 7, TIDL_ConvolutionLayer 8, TIDL_PoolingLayer ... 40, TIDL_FlattenLayer 41, TIDL_ConcatLayer 42, TIDL_ConcatLayer 43, TIDL_DetectionOutputLayer 44, TIDL_DataLayer [Q1] To get both EVE and DSP performance shown in TABLE.4B, how do we partition into EVE and DSP ? For instance, which layers are executed on DSP and which other layers are executed on EVE ? [Q2] To get both EVE and DSP performance shown in TABLE.4B, how do we test on target EVM ? I need to duplicate the test. Best regards, Saito + +Responses: +Hi Saito, I have explained that in below e2e thread, please refer to my last two responses in this thread, e2e.ti.com/.../690888 Thanks, Praveen + +Thanks Praveen. On Q2, should we run TIDL OD usecase in VSDK ? If so, the TIDL OD usecase can run on TDA2 SoC only ? Best regards, Saito + +Hi Satio, You can get the performance numbers by running .out files on standalone, refer to section 3.3.5 (Building the Test Application Executable through GMAKE) to know the steps. Thanks, Praveen + +Hi Praveen, I have already run .out file on EVE standalone. However I did not get the performance numbers described in TABLE 4B TIDeepLeraningLibrary_DataSheet.pdf. Please find attached CCS log. LOG_TDA2Px_EVE_jdetnet.txt Processing config file C:\ti\psdk\PSDKV33\ti_components\algorithms\REL.TIDL.01.01.00.00\modules\ti_dl\test\testvecs\config\infer\tidl_config_jdetnet.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , + 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 80 , 192 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 80 , 192 , 1 , 64 , 80 , 192 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 80 , 192 , 1 , 64 , 40 , 96 , + 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 40 , 96 , 1 , 128 , 40 , 96 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 40 , 96 , 1 , 128 , 40 , 96 , + 8, TIDL_PoolingLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 40 , 96 , 1 , 128 , 20 , 48 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 20 , 48 , 1 , 256 , 20 , 48 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 20 , 48 , 1 , 256 , 10 , 24 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 10 , 24 , 1 , 512 , 10 , 24 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 10 , 24 , 1 , 512 , 10 , 24 , + 13, TIDL_PoolingLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 10 , 24 , 1 , 512 , 5 , 12 , + 14, TIDL_PoolingLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 5 , 12 , 1 , 512 , 3 , 6 , + 15, TIDL_PoolingLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 3 , 6 , 1 , 512 , 2 , 3 , + 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 16 , 1 , 128 , 40 , 96 , 1 , 256 , 40 , 96 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 17 , 1 , 512 , 10 , 24 , 1 , 256 , 10 , 24 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 18 , 1 , 512 , 5 , 12 , 1 , 256 , 5 , 12 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 19 , 1 , 512 , 3 , 6 , 1 , 256 , 3 , 6 , + 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 20 , 1 , 512 , 2 , 3 , 1 , 256 , 2 , 3 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 21 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , + 22, TIDL_FlattenLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 16 , 40 , 96 , 1 , 1 , 1 ,61440 , + 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 23 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , + 24, TIDL_FlattenLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 16 , 40 , 96 , 1 , 1 , 1 ,61440 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 26 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , + 26, TIDL_FlattenLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , + 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 28 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , + 28, TIDL_FlattenLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , + 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 31 , 1 , 256 , 5 , 12 , 1 , 24 , 5 , 12 , + 30, TIDL_FlattenLayer , 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , + 31, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 33 , 1 , 256 , 5 , 12 , 1 , 24 , 5 , 12 , + 32, TIDL_FlattenLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 36 , 1 , 256 , 3 , 6 , 1 , 24 , 3 , 6 , + 34, TIDL_FlattenLayer , 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 24 , 3 , 6 , 1 , 1 , 1 , 432 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 38 , 1 , 256 , 3 , 6 , 1 , 24 , 3 , 6 , + 36, TIDL_FlattenLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 24 , 3 , 6 , 1 , 1 , 1 , 432 , + 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 41 , 1 , 256 , 2 , 3 , 1 , 16 , 2 , 3 , + 38, TIDL_FlattenLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 43 , 1 , 256 , 2 , 3 , 1 , 16 , 2 , 3 , + 40, TIDL_FlattenLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , + 41, TIDL_ConcatLayer , 1, 5 , 1 , 22 , 27 , 32 , 37 , 42 , x , x , x , 46 , 1 , 1 , 1 ,61440 , 1 , 1 , 1 ,69168 , + 42, TIDL_ConcatLayer , 1, 5 , 1 , 24 , 29 , 34 , 39 , 44 , x , x , x , 47 , 1 , 1 , 1 ,61440 , 1 , 1 , 1 ,69168 , + 43, TIDL_DetectionOutputLayer , 1, 2 , 1 , 46 , 47 , x , x , x , x , x , x , 48 , 1 , 1 , 1 ,69168 , 1 , 1 , 1 , 560 , + 44, TIDL_DataLayer , 0, 1 , -1 , 48 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 560 , 0 , 0 , 0 , 0 , +TEST_REPORT_INIT_PROFILE_DATA : TSC cycles = 1125769866, SCTM VCOP BUSY cycles = 0, SCTM VCOP Overhead = 0 +I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) + +Processing Frame Number : 0 + +TEST_REPORT_PROCESS_PROFILE_DATA : TSC cycles = 1607498494, SCTM VCOP BUSY cycles = 70089004, SCTM VCOP Overhead = 0 +I/O Bytes : 0 ( 0 + 0 ) : 0 ( 0 + 0 ) + + [Q2] How do we get the performance numbers in TALBE 4B ? Best regards, Saito + +Hi Satio, Can you share infer config file used for running the .out file? Thanks, Praveen + +Hi Praveen, I used "tidl_config_jdetnet.txt" in directory REL.TIDL.01.01.00.00\modules\ti_dl\test\testvecs\config\infer. Best regards, Saito + +Hi Satio, This "tidl_config_jdetnet.txt" file runs full Net on EVE, but we need to part of network in EVE and later part on DSP to get the performance numbers, so please use attached config files First run "tidl_config_jdetnet_eve.txt" on EVE which gives performance numbers of EVE Then run "tidl_config_jdetnet_dsp.txt" on DSP which gives performance numbers of DSP Thanks, Praveen 5444.tidl_config_jdetnet_eve.txt rawImage = 1 +numFrames = 1 +preProcType = 4 +#inData = "D:\work\vision\dsp_git\dsp_apps\modules\ti_dl\test\testvecs\config\caffe_models\SSD\000535.jpg" +#inData = D:\work\vision\dsp_git\dsp_apps\modules\ti_dl\test\testvecs\config\caffe_models\SSD\000220.jpg +#inData = "D:\work\vision\CNN\data\tiscapes\VIRB0003_200frames_00.11\out000018_crop.png" +#inData = "D:\work\vision\CNN\data\tiscapes\V105Crop_200frames_0249\out000026.png" +traceDumpBaseName = ".\trace_dump_" +updateNetWithStats = 0 +netBinFile = ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_net_jdetNet_ssd.bin +paramsBinFile = ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_param_jdetNet_ssd.bin + +readQ = 1 +writeQ = 1 +#inData = "..\..\test\testvecs\input\trace_dump_0_768x384.y" +inData = "..\..\test\testvecs\input\trace_dump_0_768x320.y" +outData = ".\stats_tool_out_eve.bin" +#inData = ".\stats_tool_out_eve.bin" +#outData = ".\stats_tool_out.bin" +layersGroupId = 1 +runFullNet = 0 + + + + 6332.tidl_config_jdetnet_dsp.txt rawImage = 1 +numFrames = 1 +preProcType = 4 +#inData = "D:\work\vision\dsp_git\dsp_apps\modules\ti_dl\test\testvecs\config\caffe_models\SSD\000535.jpg" +#inData = D:\work\vision\dsp_git\dsp_apps\modules\ti_dl\test\testvecs\config\caffe_models\SSD\000220.jpg +#inData = "D:\work\vision\CNN\data\tiscapes\VIRB0003_200frames_00.11\out000018_crop.png" +#inData = "D:\work\vision\CNN\data\tiscapes\V105Crop_200frames_0249\out000026.png" +traceDumpBaseName = ".\trace_dump_" +updateNetWithStats = 0 +netBinFile = ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_net_jdetNet_ssd.bin +paramsBinFile = ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_param_jdetNet_ssd.bin + +readQ = 1 +writeQ = 1 +#inData = "..\..\test\testvecs\input\trace_dump_0_768x384.y" +#inData = "..\..\test\testvecs\input\trace_dump_0_768x320.y" +#outData = ".\stats_tool_out_eve.bin" +inData = ".\stats_tool_out_eve.bin" +outData = ".\stats_tool_out.bin" +layersGroupId = 2 +runFullNet = 0 + +Hi Praveen, My issue resolved. Thank you. Best regards, Saito + diff --git a/data2/text/range/10001-15000/697468.txt b/data2/text/range/10001-15000/697468.txt new file mode 100644 index 0000000000000000000000000000000000000000..ca6f87d5831dda4b232323b4d8e90d4070687078 --- /dev/null +++ b/data2/text/range/10001-15000/697468.txt @@ -0,0 +1,115 @@ +Ticket Name: TDA2: TDA2x EVM Compiling error (newbie) + +Query Text: +Part Number: TDA2 Hi TI I have install the software and compiler and run as mention in the video (from TDA EVM series - part 2) and found error after it finishing compiling. I am not sure did install the path correctly as mention “/ti_components/cg_tools/windows/” from the user guide. Is this A15 Compiler linker is to install onto the sdk vision path or i need to create a path for it. Please advise + +Responses: +Hi Willson, Can you please share the build log, that would help us to identify the error. Regards, Sujith + +Hi the attach is the notepad when use gmake -s -j depend command error with depend.txt C:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\build>gmake -s -j depend +/cygdrive/c/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config': File exists +/cygdrive/c/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps': File exists +/cygdrive/c/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all': File exists +# makeconfig: Config is [ tda2xx_evm_bios_all ] +# makeconfig: Output file is @ C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all/system_cfg.h +# makeconfig: Input file is @ C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk +# makeconfig: Generating header ... +# makeconfig: Generating alg plugin config ... +# makeconfig: Generating usecase config ... +# makeconfig: Generating footer ... +# makeconfig: Done !!! +# +# CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], +# +# WARNING: IPU1_1 can be excluded from application +# WARNING: IPU2 can be excluded from application +# +# CPUs that are required but not included in config [ tda2xx_evm_bios_all ], +# +# +# Edit C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application +# +# Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_init.c +# Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_basic.c +process_begin: CreateProcess(NULL, C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_init.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.# Compiling tda2xx-evm:a15_0:release:edma3lld_drv: src/edma3_drv_adv.c. -Isrc -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg src/edma3_drv_init.c, ...) failed. + +make (e=2): The system cannot find the file specified. +gmake[4]: *** [C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_init.oa15fg] Error 2 +gmake[4]: *** Waiting for unfinished jobs.... +process_begin: CreateProcess(NULL, C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_basic.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_basic.oa15fg src/edma3_drv_basic.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[4]: *** [C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_basic.oa15fg] Error 2 +process_begin: CreateProcess(NULL, C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -MD -MF C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/.deps/edma3_drv_adv.P -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -ffunction-sections -fdata-sections -DSYSBIOS -DCGT_GCC -DCPU_IDLE_ENABLED -O2 -s -DNDEBUG -Werror -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_9_3 -DBIOS_BUILD -Dfar= -D__DYNAMIC_REENT__ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -I../../../.. -Isrc -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/ndk_2_24_02_31/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages -I/packages -IC:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all -o C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_adv.oa15fg src/edma3_drv_adv.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[4]: *** [C:/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/edma3lld_drv/tda2xx-evm/a15/release/edma3_drv_adv.oa15fg] Error 2 +gmake[3]: *** [a15_0] Error 2 +gmake[2]: *** [edma3lld] Error 2 +gmake[1]: *** [edma3lld] Error 2 +gmake: *** [depend] Error 2 + +Hi Willson, Path is already available with vision_sdk installer However A15 compiler path varies depending upon OS If windows, you need to copy under - /ti_components/cg_tools/windows/ If Linux, you need to copy under - /ti_components/cg_tools/linux/ Regards Surya + +Dear Surya So i can run the A15 compiler and paste this "C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\cg_tools\windows" to the installing path? As show from attach. + +Yes + +After numbers of trying is still have the errors which was mentions above from the "gmake -s -j depend" command + +Hi, The compiler should be installed in path "C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3". Can you check if CODEGEN_PATH_A15 as defined in Rules.make indeed exactly matches the location where you have installed the compiler. Regards, Rishabh + +Dear Rishabh Can i know what is the line number? + +Dear Rishabh I notice the error is as follow The system cannot find the file specified edma3_drv_basic.c edma3_drv_basic.oa15fg edma3_drv_adv.oa15fg I try to go to the folder and these file are not able to be located. + +Hi, Sorry I meant path as defined in tools_path.mk and not Rules.make. Also did you try building without -j. Regards, Rishabh + +Dear Rishabh There is still error . Now it say a15/release/edma3_drv_init.oa15fg src/edma3_drv_init.c cannot find the file specified. + +Hi, Did you check the path in tools_path.mk as I have specified in my previous reply. Make system is not able to find the A15 compiler and hence build is failing. You need to make sure that path is set appropriately. Regards, Rishabh + +Dear Rishabh Below is the printscreen i had change the path but it is still having the same error + +Hi Willson, Can you just run "where gmake" & confirm it is pointing to \ti_components\os_tools\windows\xdctools_3_32_01_22_core Regards Surya + +Dear Surya As requested + +Hi, Can you run dir command in the location $(TI_SW_ROOT)/cg_tools/windows/4.9_2015q3 ans share the result. Regards, Rishabh + +Dear Rishabh As requested. + +Hi, The compiler seems to be there. From the error log you had shared initially the compiler path is set to "C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc". You should rename the folder 4.9_2015q3 to gcc-arm-none-eabi-4_9-2015q3 and try. Regards, Rishabh + +Dear Rishabh The error is solved but another error cant out which as show below. Note both command with "gmake -s -j depend" and with -j has the same error + +Hi, Great that the previous error is resolved. Can you build without -j. Regards, Rishabh + +Dear Rishabh As mention in previous post it is the same error with -j as well. The attach below is the result without -j + +Hi, Do you have the full permissions in this machine? Can you try a clean build. Regards, Rishabh + +Dear Rishabh Are you able to advise how to clean the build? + +Hi, Commands are "make clean" and "make allclean". See vision_sdk\build\Makefile to what each target does. You should check VisionSDK_UserGuide_TDA2xx.pdf for more details on build. Regards, Rishabh + +Dear Rishadh Sorry i did not know i am able to open the Makefile file in notepad. That i a great help to me. But unfortunately after executing the with the gmake all clean command, The error came back one more. Please note i am having full permission of the machine as well . please see below. + +Hi Wilson, This issue looks quite similar to the one you were facing with A15. gmake is not able to find M4 compiler. This compiler is included in the Processor SDK Vision installer itself. Did the installation finish successfully? In case you have made any changes in folder structure you should set CODEGEN_PATH_M4 appropriately in tools_path.mk. Regards, Rishabh + +Dear Rishabh i remember when installation there is no error. When i install the sdk vision i follow the instruction without changing as thing. When i run the very 1st command "gmake -s -j depnd" all the problem came out. + +Dear Rishabh I think i will uninstall the SDK and reinstall it again and see what happen. if i uninstall the SDK must i also uninstall A15 compiler linker and the CCS as well? + +Hi Wilson, You need not uninstall A15 compiler and CCS. Did you try the suggestion "In case you have made any changes in folder structure you should set CODEGEN_PATH_M4 appropriately in tools_path.mk." Regards, Rishabh + +Dear Rishabh Nope i just reinstalled the Vision SDK and it is able to compile but this time instead of install as typical i install as custom and it able to compile. Can i ask is this compiling always that long? when i run "gmake -s" i took me like about an one to finish compiling. + +Hi Wilson, Glad to know that the issue is resolved. Vision SDK is a huge code base with many library packages. When you build for the first time it usually takes long time depending on the machine. Incremental builds will take less time. Regards, Rishabh + +Dear Rishabh Is there anyway advise for me where i can start learning create a project using CCS to develop DMS(driver monitoring system) using TI TDA2 EVM + +Hi Wilson, You should first go through CCS Training slides present here: C:\PROCESSOR_SDK_VISION_03_03_00_00\vision_sdk\docs\TrainingSlides\CCS_Debug_Trace.pdf. You can also search the internet for CCS documentation and videos. Let's close this thread as the build issue has been resolved. If you have any more questions on another topic you can start a new thread. Regards, Rishabh + +Hi, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Dear Rishabh Sorry about i have already click on it that you have already "this have reslove" since two weeks ago. by the way thanks for the support given + diff --git a/data2/text/range/10001-15000/700875.txt b/data2/text/range/10001-15000/700875.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f2a3fe71c0a13eae776e4bd0dd308e9cd63cec6 --- /dev/null +++ b/data2/text/range/10001-15000/700875.txt @@ -0,0 +1,120 @@ +Ticket Name: Network TX speed in TDAx processors + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, We have TDA3x Starter Kit from D3. In the "VisionSDK_UserGuide_NetworkTools.pdf", there is following snippet: When sending RAW/YUV frames  When NDK runs on M4 CPU, one can achieve a data rate of about 2 MB/s (16Mbps)  When NDK runs on A15 CPU (TDA2x or TDA2px), one can achieve a data rate of about 60 MB/s (480Mbps) Is the slow data rate of 2 MB/s because of the Ethernet PHY? or the M4 running at just ~200 Mhz? or is this only when using the network tool provided with the SDK? Can we expect to send a 1080x720 YUV video at 20 fps over ethernet to a client machine (not using network tool)? We were under the asssumption that TDA3x has a Gigabit ethernet and this should be possible. If this is not possible, what is the highest bandwidth we can achieve over ethernet among all the TDA family of processors? It seems like A15 on TDA2x can achieve up to 60 MB/s. May I know why this is significantly (30x) higher than TDA3x? Can we achieve more with any other device? Thanks, Keerthi + +Responses: +Yes. NDK performance on M4 is limited by CPU speed due to CPU copy inside the NDK. To overcome this performance issue, we have developed a customized protocol called TFDTP based on UDP in Vision SDK. It is documented in VisionSDK_UserGuide_NetworkTools.pdf and how to use it. With TFDTP, you should be able to send 720p YUV420 SP at 30 fps on TDA3. If you are saving the video frames to hard drive, we have noticed that Windows filesystem has much higher latency than Linux PC. On TDA2, NDK can achieve sufficient performance since A15 is much faster. Regards, Stanley + +Hi Stanley, Thanks for your response. Is there any use-case developed for "ISS_capture -> ISS_m2msimcop ->network_tx" ? In other words, we want to capture OV10640 image raw (1280x720) at 20 fps, use ISS for WDR processing and then transmit the YUV420 continously over Ethernet from the TDA3x ? In the example usecases, there is "ISS_capture->ISS_m2msimcop -> display". I am trying to add network link to this chain. Any suggestions on where to start hacking this usecase to achieve our goal? Thanks, Keerthi + +Hi Keerthi, You can reuse ISS_Capture->ISS_M2MSIMCOP->Display. You can either replace Display Link with NetworkTx Link or add Dup and NetworkTx Links if you want to see the camera output on the display. IssCapture -> IssM2mIsp -> IssM2mSimcop -> Dup -> Display_Video Dup -> NetworkTx (IPU1_1) You also need to add the following to the cfg.mk. NDK_PROC_TO_USE=ipu1_1 NSP_TFDTP_INCLUDE=yes In the use case, you can refer to ~/usecases/network_rx_tx/chains_networkTxCapture.c to see how to configure NetworkTx Link. Regards, Stanley + +Hi Stanley, I managed to develop the usecase as below on TDA3x Starter Kit : UseCase: chains_issIspSimcop_NetworkTx IssCapture -> IssM2mIsp -> IssM2mSimcop -> Dup -> Display_Video IssM2mIsp -> Alg_IssAewb IssM2mIsp -> IssM2mResizer IssM2mResizer -> Display_VideoRszB Dup -> Null (IPU1_1) GrpxSrc -> Display_Grpx In the network receive tool Only thing I have changed is frame size since I want to capture 1280x720 image with YUV420. params.frameSize = 1280*720*1.5; // From (1920*1080*2) When I run the network receive tool on Linux Ubuntu 14.04 with the command below, I get the errors shown below. Not sure if the problem is on the PC side or if the Target isn't configured correctly for TFDTP. I followed the userguide on network tools and I think I have done all the steps necessary. ./network_rx.out -host_ip 192.168.1.1 --target_ip 192.168.1.200 --port 29172 --usetfdtp --verbose --files cam_capture.yuv # Connecting to server 192.168.1.200:29172 ... # NETWORK: Connected to Server (192.168.1.200:29172)!!! # Using TFDTP for Receive TFDTP: Throughput = 500, frameSize = 1382400 # NETWORK: TFDTP_open() Done (192.168.1.200:29174)!!! Failed to get Adapter MAC address # ERROR: NETWORK: TFDTP_setChConfig() Failed (-1)!!! # NETWORK: Sent TFDTP channel params!!! # ERROR: TFDTP_recv failed/not complete # ERROR: TFDTP_recv failed/not complete # ERROR: TFDTP_recv failed/not complete # Network Rx ERROR: TFDTP read failed after retry ERROR : Network read error # INFO: DATA: CH0: Frame0: 1382400 bytes # ERROR: TFDTP_recv failed/not complete # ERROR: TFDTP_recv failed/not complete Even with the above errors, the receive tool can write to the file correctly (correct number of bytes), but not sure if the data values are correct. The Target side doesn't print any errors and the PC side tool doesn't crash or stop. Any inputs/ideas? Thanks, Keerthi + +Hi Keerthi, Are you sure your PC IP address is "192.168.1.1" as set in command line "-host_ip 192.168.1.1"? You shouldn't see the below error messages. Failed to get Adapter MAC address # ERROR: NETWORK: TFDTP_setChConfig() Failed (-1)!!! How did you connect Ethernet cable between PC and Starter Kit? thru a router, switch, or directly? Did you build the code with static IP or DHCP enabled? Regards, Stanley + +Hi Stanley, Yes, the host ethernet IP address is 192.168.1.1. Output of "ifconfig" is below: eth2 Link encap:Ethernet HWaddr 88:d7:f6:d5:08:7c + inet addr:192.168.1.1 Bcast:192.168.1.255 Mask:255.255.255.0 + inet6 addr: fe80::8ad7:f6ff:fed5:87c/64 Scope:Link + UP BROADCAST RUNNING MULTICAST MTU:9000 Metric:1 + RX packets:5788725745 errors:0 dropped:0 overruns:0 frame:0 + TX packets:1020873893 errors:0 dropped:0 overruns:0 carrier:0 + collisions:0 txqueuelen:1000 + RX bytes:8762283639837 (8.7 TB) TX bytes:67836836899 (67.8 GB) + The connection is a direct one between the host PC and target, without any switches or routers. I can ping the target without issues. What do you mean by "Did you build the code with static IP or DHCP enabled?" Is it the target code or the host receiver code? I know that host ethernet interface is assigned a static IP. Thanks, Keerthi + +In ~\vision_sdk\links_fw\src\rtos\bios_app_common\tda3xx\cfg\NDK_config.cfg, Is "enableStaticIP" set to 0 or 1? + +Stanley, I think the MAC address detection failure was because of my mistake. The command line argument I was passing just had "-host_ip" instead of "--host_ip". So, the IP address it parsed from the command line was incorrect. Now I have the following set of errors printing: # Connecting to server 192.168.1.200:29172 ... +# NETWORK: Connected to Server (192.168.1.200:29172)!!! +# Using TFDTP for Receive +TFDTP: Throughput = 500, frameSize = 1382400 +# NETWORK: TFDTP_open() Done (192.168.1.200:29174)!!! +TFDTP: Adapter Name: eth2 +TFDTP: MAC Address: FFFFFF88-FFFFFFD7-FFFFFFF6-FFFFFFD5-08-7C +TFDTP: MAC address Size 16 +TFDTP: Send TFDTP Channel Config Params, IP 0xc0a80101 +# NETWORK: Sent TFDTP channel params!!! +# ERROR: TFDTP_recv failed/not complete +# ERROR: TFDTP_recv failed/not complete +# ERROR: TFDTP_recv failed/not complete +# Network Rx ERROR: TFDTP read failed after retry +ERROR : Network read error +# INFO: DATA: CH0: Frame0: 1382400 bytes +# ERROR: TFDTP_recv failed/not complete +# ERROR: TFDTP_recv failed/not complete +# ERROR: TFDTP_recv failed/not complete +# Network Rx ERROR: TFDTP read failed after retry +ERROR : Network read error + The "enableStaticIP" is set to 1. + +It seems like the receiver is using both 29172 and 29174 ports. Is this expected? + +It is expected. If you let the test continue to run, do you see always "Network read error"? You can also rebuild network_rx with "#define DEBUG_PRINT 1" in ~\vision_sdk\apps\tools\network_tools\common\src\tfdtp_api.c to get more info about the error from the test. Sometimes you may see error at the beginning due to packet drop from network but it will stabilize later. The data save in the file is the correctly received output frames so you can still use the data. Regards, Stanley + +The network read program continues but it prints errors always. I debugged a little more and found out that in the following snippet in "TFDTP_recv()" function, the "byte_read" is always -1 and it seems like PC side is not able to read from the socket correctly. It retries for 2 more times and still doesn't receive the data. However, the caller functions higher up doesn't catch this and still writes zeros to the file. It file gets bigger in size, but they are all zeros, which I verified by reading it in binary mode. /* Blocking call until data is received or RX timeout reached */ + + byte_read = recvfrom(pObj->udpSocket, (char *)&rxPacket, recvSize, 0,(struct sockaddr *) &senderAddr, &senderLen); + + if (byte_read <= 0) + + { + + status = -1; + + done = 1; + + printf("# STATUS: -1 \n Byte Read =%d\n", byte_read); + + } + +BTW, I just noticed that the eth2 MTU size is set to 9000 on PC side. Could you try changing that to 1500? + +I changed ethernet MTU size to 1500 and that didn't help. I used wireshark to to see if there is traffic. I could see that one TCP packet goes from PC to Target and then nothing happens. I debugged a little more and found out that in the snippet below in function "NullLink_networkTxSendData()", we are getting a failure with ack: if(status==SYSTEM_LINK_STATUS_SOK) + + { + + status = NullLink_networkTxWriteHeader(pObj, pNetTxObj, &cmdHeader); + +#if (defined(NSP_TFDTP_INCLUDE)) + + if (pObj->createArgs.dumpDataType == NULL_LINK_COPY_TYPE_NETWORK_TFDTP) + + { + + if(status==SYSTEM_LINK_STATUS_SOK) + + { + + ack = Network_tfdtpWaitAck(&pNetTxObj->sockObj); + + if (ack != TFDTP_TRANSMIT_OK) + + { + + status = SYSTEM_LINK_STATUS_EFAIL; + + Vps_printf(" NULL:Status = SYSTEM_LINK_STATUS_EFAIL\n"); + + } + + } + + } + +#endif + + } + Does this mean the issue is with the target or the host? + +In your use case code on TDA3, did you call ChainsCommon_networkTxSetMode()? + +Yes, "ChainsCommon_networkTxSetMode()" is called already. Weirdly enough, the host side started receiving frames now, without any modifications to the target code, and minor debug print statements enabled in the host receiver code. I tried to make it break again so that I can debug it, but I haven't changed anything major, so not sure what was the problem. To double check, I restarted my PC as well as the target processor to see if it breaks, but it seems to work to a decent extent. Although, there are sometimes frame drops seen and I get messages such as this (for around 3-4% of the frames) and the application still continues to receive the data further: TFDTP: Frame [77]: No. Packets received[902] for Total [955] + +# ERROR: TFDTP_recv failed/not complete I tried with both MTU = 1500 and MTU = 9000. In both cases, around 3-4% of frames drop. Any ideas ? + +Since the protocol used is UDP, there is no guaranteed quality of service. It will have packet drops or out-of-order packets. When there are packet drops, we try to retransmit for 2 more times by default. You can increase the number of retries if needed in the NetworkTx Link create params. With the default config, if you don't see the same frame failed to transfer for 3 times, it means the frame is received after retries. + +For our application, we actually don't want the data to be retransmited since we want the video frames to be received in real-time. I ran the application for 64 hours and we had 0.35% of frames drop when sending 1280x720 at 30 FPS. I will try and debug more later. For now, the network works to a satisfactory extent. So I am closing this thread. Thanks for your help, Stanley. - Keerthi + diff --git a/data2/text/range/10001-15000/701017.txt b/data2/text/range/10001-15000/701017.txt new file mode 100644 index 0000000000000000000000000000000000000000..37a632b7cc2f6b1555f580727f3a91e1032ba380 --- /dev/null +++ b/data2/text/range/10001-15000/701017.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: how to read DIE_ID + +Query Text: +Part Number: TDA2 Tool/software: Linux I get the DIE_ID used the emulator。 but i have to read it on a15 , i use the physical address. int id=*(int*)(0x4AE0C200); printf("id=%d\n", id); when i run the program it have problem ,, ****** Segmentation fault caught .... Faulty address is 0x4ae0c200, called from 0x16083 Totally Obtained 0 stack frames. signal number =11 Signal number = 11, Signal errno = 0 SI code = 1 (Address not mapped to object) Fault addr = 0x4ae0c200 [bt] Execution path: what can i do ?? follow is the log insmod: ERROR: could not insert module ./bin/memcache.ko: File exists insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory mknod: /dev/memcache: File exists ./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found ./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found updated value is COMMANDS ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! No address check done, may generate: - bus error (invalid or not accessible , - platform crash/hang (bad ). Read any OMAP memory address (register), given its or as listed in TRM. Write at any OMAP memory address (register), given its or as listed in TRM. Set bit at into any OMAP memory address (register), given its or as listed in TRM. Clear bit at into any OMAP memory address (register), given its or as listed in TRM. Dump a range of OMAP memory addresses, from to . Note all addresses within given range must be valid and accessible. ### WARNING ###: use the following I2C [read | write] commands at your own risk! No address check done, may generate: - I2C bus error (invalid or not accessible , - platform crash/hang (bad ). Read I2C register at address from I2C chip at on I2C . Write in I2C register at address from I2C chip at on I2C . [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6a01000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa7001000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6f41000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6f81000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6d41000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 2129.268771 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 2129.268862 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 2129.268862 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 2129.269137 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 2129.269137 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 2129.269167 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 2129.269198 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 2129.269381 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 2129.269381 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 2129.269411 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 2129.269411 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 2129.269594 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 2129.269594 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 2129.269625 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 2129.269625 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 2129.269777 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 2129.269777 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 2129.269869 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 2129.269869 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 2129.269869 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 2129.269991 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 2129.270082 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 2129.270174 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 2129.270235 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 2129.270387 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 2129.270540 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 2129.270662 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 2129.270784 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 2129.270936 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 2129.271058 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 2129.271211 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 2129.271333 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 2129.271516 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 2129.271638 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 2129.271790 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 2129.271943 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 2129.272095 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 2129.272248 s: ALGORITHM_2 : Init done - linkid-0x2000033 [HOST] [HOST ] 2129.272370 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 2129.272522 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 2129.272675 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 2129.272827 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 2129.272949 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 2129.273163 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 2129.273346 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 2129.273498 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 2129.273681 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 2129.273834 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 2129.273986 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274108 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274261 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274413 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274566 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274718 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274871 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 2129.274993 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275084 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275237 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275328 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275450 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275542 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275633 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275725 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 2129.275847 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 2129.275847 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 2129.280971 s: OSA: Adjusting global time, timeH by 0 units!!! VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [HOST ] 2129.627094 s: SYSTEM: System A15 Init Done !!! AHR_CreateCallDetectionEngine=0!!! ****** Segmentation fault caught .... Faulty address is 0x4ae0c200, called from 0x16083 Totally Obtained 0 stack frames. signal number =11 Signal number = 11, Signal errno = 0 SI code = 1 (Address not mapped to object) Fault addr = 0x4ae0c200 [bt] Execution path: + +Responses: +You have to mmap physical address to the process space and read it with virtual address. There is an easier way to read physical address in Linux by using "omapconf". omapconf tool should already be included in SDK targetfs. You can run omapconf from the console. # omapconf --help This will display the available command supported by omapconf. #omapconf read 0x4AE0C200 It will return the value of the physical address provided. Regards, Stanley + +Hi Stanley i am using SDK_VISION_03_02_00_00 SDK now ,install followed VisionSDK_Linux_UserGuide.pdf. PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap$ this site have omap , is this omapconf tool ? PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc$ i have to read chip id in this link! hancan@hancan-virtual-machine:~/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc$ omapconf --help omapconf: command not found BESTWISHES SHUAI + +Hi Stanley root@dra7xx-evm:~# omapconf read 0x4AE0C200 0B014014 in console can read, but i want to read in this link ( PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc) thanks shuai + +You have to map the DIE_ID register address to nullSrc Link process space via calling mmap(). You can find the API doc for mmap() here. man7.org/.../mmap.2.html Some example can be found in ~/vision_sdk/links_fw/src/hlos/osa/src/osa_mem.c. Regards, Stanley + +thanks alot! + diff --git a/data2/text/range/10001-15000/707133.txt b/data2/text/range/10001-15000/707133.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0f9ba24febe0a32de10ea13746b63608239e661 --- /dev/null +++ b/data2/text/range/10001-15000/707133.txt @@ -0,0 +1,141 @@ +Ticket Name: RTOS/TDA2: TDA2xx rvp: network_tx usecase + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I am running standard network use case using RVP TDA2X board. Following command of the network use case are working: ./network_ctrl.out --ipaddr 192.168.1.201 --port 5000 --cmd echo "HELLO WORLD 1" => able to see print on console of RVP TDA2X ./network_ctrl.out --ipaddr 192.168.1.201 --port 5000 --cmd sys_reset => board resets Problem: Receive data and display: Target RVP TDA2X side: IPU1-0] Select use-case, [IPU1-0] ---------------- [IPU1-0] 1: Network RX + Display ... [IPU1-1] 2941.901390 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 2941.901512 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643296 B (628 KB) [HOST ] 2940.339870 s: ===RxLink_tsk.c tskMain:1518 cmd:0 [HOST ] 2940.343012 s: NETWORK_RX: NETWORK_RX: Server listening (port=29171) !!! [HOST ] 2940.343134 s: IPC_OUT_0 : Create in progress !!! [HOST ] 2940.343195 s: IPC_OUT_0 : Create Done !!! [HOST ] 2941.901909 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 2941.901939 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6257664 B (6111 KB) [HOST ] 2942.024431 s: ===RxLink_tsk.c tskRun:1398 cmd:4 [HOST ] 2942.034435 s: ===RxLink_drv.c drvFillData:456 state:1 On Host side tool command: ./network_tx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29171 --usetfdtp --verbose --files /c/prj/videos/tulips_yuv420_inter_planar_qcif.yuv Target shows [HOST ] 3547.180229 s: NETWORK_RX: NETWORK_RX: Connected to client (port=29171) !!! On the host, the command is looping, On Target there is not display. I analyzed the code with the debug prints and found that : links_fw/src/rtos/utils_common/src/network_api.c 73 Int32 Network_read(Network_SockObj *pObj, UInt8 *dataBuf, UInt32 *dataSize) 74 { 75 Int32 status = NETWORK_SUCCESS // without semicolon, here error reported. 76 77 #if (( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ 78 ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ 79 ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ 80 ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) )) 81 82 UInt32 tmpDataSize // without semicolon, there is not error reported. Not sure why control is not going inside this block?, is this expected, if not how to fix it. Showconfig show " NDK_PROC_TO_USE=a15_0", attached showconfig output file 83 Int32 actDataSize = 0; 84 85 tmpDataSize = *dataSize; 86 87 while(tmpDataSize > 0U) 88 { 95 Vps_printf("===network_api.c Network_read:%d datasize:%d buf:0x%x\n", 96 __LINE__, tmpdataSize, dataBuf); // This print is not getting printed. 97 98 actDataSize = recv(pObj->connectedSockFd, (void *)dataBuf, tmpDataSize, 0) 99 100 Vps_printf("===network_api.c Network_read:%d datasize:%d buf:0x%x actDataSize:%d \n", 114} 116 #endif 117 118 return status; 119 } Please support in executing the "[IPU1-0] 1: Network RX + Display", let me know if further details required. Regards, KK 7848.showconfig.txt # +# Build Config is [ tda2xx_rvp_bios_all ] +# Build Config file is @ C:/rvp/vsdk33rvp/vision_sdk/configs/tda2xx_rvp_bios_all/cfg.mk +# Build Config .h file is @ C:/rvp/vsdk33rvp/vision_sdk/links_fw/include/config/apps/tda2xx_rvp_bios_all/system_cfg.h +# Build CPUs is @ ipu1_0 ipu1_1 ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=yes +# PROC_IPU1_1_INCLUDE=yes +# PROC_IPU2_INCLUDE=yes +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=yes +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=yes +# PROC_EVE3_INCLUDE=yes +# PROC_EVE4_INCLUDE=yes +# PROC_A15_0_INCLUDE=yes +# +# Platform config, +# VSDK_BOARD_TYPE=TDA2XX_RVP [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda2xx-rvp +# DUAL_A15_SMP_BIOS=no +# DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# NDK_PROC_TO_USE=a15_0 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=no [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Windows_NT [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=release [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Bios [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=yes +# VPE_INCLUDE=yes +# CAL_INCLUDE=no +# ISS_INCLUDE=no +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=no +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=C:/rvp/vsdk33rvp/vision_sdk/apps/src/rtos/opencl +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=no +# +# Log config, +# ENABLE_UART_LOG=yes +# ENABLE_NETWORK_LOG=no +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=no +# +# IPC config, +# WORKQ_INCLUDE=no +# IPC_LIB_INCLUDE=no +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=yes +# RADAR_INCLUDE=no +# CPU_IDLE_ENABLED=yes +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb +# CMEM_INCLUDE=no +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=no +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_autocalibration ALG_dmaSwMs ALG_vpeSwMs ALG_surroundview +# +# Use-cases included in build, +# UC_srv_calibration UC_lvds_vip_single_cam_view UC_lvds_vip_multi_cam_view UC_lvds_vip_8_cam_view UC_lvds_vip_sv_standalone UC_network_rx_tx UC_saveDisFrame +# +# +# CPUs that are NOT required but included in config [ tda2xx_rvp_bios_all ], +# +# WARNING: IPU1_1 can be excluded from application +# WARNING: IPU2 can be excluded from application +# WARNING: DSP2 can be excluded from application +# WARNING: EVE1 can be excluded from application +# WARNING: EVE2 can be excluded from application +# WARNING: EVE3 can be excluded from application +# WARNING: EVE4 can be excluded from application +# +# CPUs that are required but not included in config [ tda2xx_rvp_bios_all ], +# +# +# Edit C:/rvp/vsdk33rvp/vision_sdk/build/configs/tda2xx_rvp_bios_all/cfg.mk to include or exclude CPUs in an application +# + +Responses: +Hi KK, In config TFDTP is disabled ( # NSP_TFDTP_INCLUDE=no [options: yes no]) Could you please run your command without --usetfdtp ./network_tx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29171 --verbose --files /c/prj/videos/tulips_yuv420_inter_planar_qcif.yuv If you want to use TFDTP, build with # NDK_PROC_TO_USE=ipu1_1 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=yes[options: yes no] & then run the command with --usetfdtp Regards Surya + +Hello Krishnakumar, Can you please let me know SDK version you have? Also as mentioned in the original post, the network stack on RVP is not tested on the BIOS. Only Linux network stack is supported. I will confirm if it added in the latest release. e2e.ti.com/.../2534985 + +Thanks Surya, information provided was helpful, Secondly, I observed the Host tool souce code, i.e: apps/tools/network_tools/network_tx/src/network_tx_main.c 106 int ReadBytes(NetworkRx_CmdHeader *pHeader) 107 { 108 int chId = pHeader->chNum; 109 int bytesRead; 110 111 read_again: 112 bytesRead = fread(gNetworkTx_obj.dataBuf, 1, pHeader->dataSize, gNetworkTx_obj.fd[chId]); 113 if(bytesRead != pHeader->dataSize) // this check 114 { 115 133 goto read_again; 134 } It waits till the requierd bytes are received. I found that in my case, the bytesRead=228096, but the needed HeadDataSize=1382400, Thus not sending data to Target device. After providing YUV file of greater than 1382400 bytes, the network streaming is working okay. But the picture is not seen correctly. 1. Which format do we need to stream? (YUV420, RGB, Grayscale, etc) 2. What are the command parameters for Encoded data tx and rx Thanks for the support, Regards, KK + +Hello Prasad, We received the RVP BIOS version from the D3 development team and it is assumed that the network is working with the BIOS. Regards, KK + +Hello KK, Thanks for confirming vsdk version. About the number of bytes issue - you need to configure the image height, width and data format types in the use-case main.c file. Currently in the default use-case, these are set to below in vision_sdk\apps\src\rtos\usecases\network_rx_tx\chains_networkRxDisplay.c, in function chains_networkRxDisplay_SetNetworkRxPrm. pObj->captureOutWidth = NETWORK_RX_FRAME_WIDTH; pObj->captureOutHeight = NETWORK_RX_FRAME_HEIGHT; pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, SYSTEM_DF_YUV420SP_UV); pChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pChInfo->flags, SYSTEM_SF_PROGRESSIVE); pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, SYSTEM_BUFFER_TYPE_VIDEO_FRAME); Please change these parameters to match your input file. + +Hello Prasad, Thank for the inforamtion on Width and heigh and the flag data, we will experiment. For now, we did the following: First, receive data from TI board: Step-1: Target side: Selected option: [IPU1-0] 3: 1CH VIP Capture + Network TX Step-2: Host side: executed the command to receive data: $ ./network_rx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29172 --verbose --files ./test_file.yuv Second, transmit same data to the TI board: Step-1: Target side: Selected option: [IPU1-0] 1: Network RX + Display Step-2: Host side: exectued the command to transmit data. $ ./network_tx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29171 --verbose --files ./test_file.yuv With this able to see the captured data on Target display output. #1. Could you provide document or info, where we can read aboutthe different Data_Format (SYSTEM_DF_YUV420SP_UV, etc) and Scan_Format (SYSTEM_SF_PROGRESSIVE, etc) #2. Is TFDTP mandatory of the MJPEG streaming? Regards, KK + +Hello Prasad, We are able to 1. Receive mjpeg data from TI board and play it on VLC and 2. Transmit same mjpeg data to TI baord and display via TI HDMI output. We can close this ticket. Thanks, KK For sake of other members, looking for similar solution: MJPEG, Compressed format: First: Capture from TI board. Step-1: Target side: Select option: [IPU1-0] 4: 1CH VIP Capture + Encode + Network TX (TDA2x ONLY) Step-2: Host side: exceute command to receive data $ ./network_rx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29172 --verbose --files rx-enc-02.mjpeg Second: Stream the same file from Host to TI Board. Step-1: Target side: Select option: [IPU1-0] 2: Network RX + Decode + Display (TDA2x ONLY) Step-2: Host side: execute the command to transmit the captured data. $ ./network_tx.out --host_ip 192.168.1.101 --target_ip 192.168.1.201 --port 29171 --verbose --files ./rx-enc-02.mjpeg Third: Play the captured data using VLC Step-1: GUI: Opening the file from VLC application is show one frame an then seems like stopped. Step-2: Command line: Execution from the command is working: /c/installsw/VideoLAN/VLC/vlc.exe --mjpeg-fps=29 bin/rx-enc-02.mjpeg Note: --mjpeg-fps=28 or above will provide smooth video outout. If not specified the video seems still. + +Hello KK, Glad your issue is resolved. If possible you can share use-case parameters for both Rx & Tx to help other members. Thanks. + +Hello Prasad, With the information provided by you on the macros, we found: network_rx_tx/chains_networkRxDisplay.c:70:#define NETWORK_RX_FRAME_WIDTH (1280) network_rx_tx/chains_networkRxDisplay.c:71:#define NETWORK_RX_FRAME_HEIGHT ( 720) "./test_file.yuv" captured without Decoder, with parameters of W:1280 and Heigh:720. To play with VLC we can use command line as: $ /c/installsw/VideoLAN/VLC/vlc.exe --rawvid-fps 12 --rawvid-width 1280 --rawvid-height 720 --rawvid-chroma I420 bin/test_file.yuv [02f67d24] core libvlc: Running vlc with the default interface. Use 'cvlc' to use vlc without interface. Thanks for the support, Regards, KK + diff --git a/data2/text/range/10001-15000/715726.txt b/data2/text/range/10001-15000/715726.txt new file mode 100644 index 0000000000000000000000000000000000000000..085adea2bfed240cb67e84c5f9506704bdeef0e6 --- /dev/null +++ b/data2/text/range/10001-15000/715726.txt @@ -0,0 +1,274 @@ +Ticket Name: TDA2: VCOP register allocation failed error while compiling + +Query Text: +Part Number: TDA2 Hi, I have written a code in Kernel C for an algorithm. I am trying to compile the code through CCS7.4, but I get the following error while compiling: Can anyone please help me understand why this error is generated? Regards, Shruti + +Responses: +Shruti, This means that your loop needs more registers than available register in VCOP. Without looking at the kernel code its difficult to comment more. If you can share your kernel then we can have look at it and comment more. If not then you should check the generated assembly code and see the registers used by the VCOP. Regards, Anshu + +Shruti, Were you able to make progress on this issue? If yes, please close this thread. If not then let us know about it. Regards, Anshu + +Hi Anshu, Sorry for the late response. I tried looking into the assembly code, but not found any lead. I am attaching my kernel C code here for reference. Can you please have a look at it? sobel.txt /*==========================================================================*/ +/* Copyright (C) 2009-2013 Texas Instruments Incorporated. */ +/* All Rights Reserved */ +/*==========================================================================*/ + +/*----------------------------------------------------------------------------*/ +/* NAME: eve_sobel_edge_detect */ +/* */ +/* */ +/* DESCRIPTION: */ +/* */ +/* The function "eve_sobel_edge_detect" takes input image */ +/* inptr, and runs the sobel operator on it and writes it out to */ +/* the output array "optr". The input and output arrays are 2D arrays */ +/* of the form [width * height]. */ +/* */ +/* The function has the following prototype: */ +/* */ +/* void eve_sobel_edge_detect */ +/* ( */ +/* __vptr_uint8 inptr, // input data pointer */ +/* __vptr_uint8 optr, // output data pointer */ +/* unsigned int width, // width of input image */ +/* unsigned int height // height of input image */ +/* ) */ +/* */ +/*----------------------------------------------------------------------------*/ + +#define ELEMSZ sizeof(*inptr) +#define VECTORSZ (VCOP_SIMD_WIDTH*ELEMSZ) +#define ELEMSZ_OUT sizeof(*optr) +#define VECTORSZ_OUT (VCOP_SIMD_WIDTH * ELEMSZ_OUT) +#define VCOP_2SIMD_WIDTH (2 * VCOP_SIMD_WIDTH) + +void vcop_detectEdge( +__vptr_uint8 inptr, +__vptr_uint8 optr, +__vptr_uint8 intsumx, +unsigned int width, +unsigned int height) +{ + __vector Vin, Vin1; + __vector Vout, Vout1; + __vector Vreg1, Vreg11; + __vector Vreg2, Vreg12; + __vector Vreg3, Vreg13; + __vector Vreg4, Vreg14; + __vector Vreg5, Vreg15; + __vector Vsumx, Vsumx1; + __vector Vsumy, Vsumy1; + + __vector Vshift = -1; + __vector Vin01, Vin02; + __vector Vin03, Vin13; + __vector Vin04, Vin14; + + + for(int Irow = 0; Irow < (height - 2); Irow++) + { + for(int Icol = 0; Icol < (width / VCOP_2SIMD_WIDTH); Icol++) + { + __agen addr; + addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ); + + (Vin, Vin1) = inptr[addr].deinterleave(); + (Vreg1, Vreg11) = (inptr + (2*width) +(2 * sizeof(*inptr)))[addr].deinterleave(); + Vreg1 = Vreg1 - Vin; + Vreg11 = Vreg11 - Vin1; + + (Vreg2, Vreg12) = (inptr + (2*width))[addr].deinterleave(); + (Vreg3, Vreg13) = (inptr + (2*sizeof(*inptr)))[addr].deinterleave(); + Vreg3 = Vreg3 - Vreg2; + Vreg13 = Vreg13 - Vreg12; + + (Vreg4, Vreg14) = (inptr + width)[addr].deinterleave(); + (Vreg5, Vreg15) = (inptr + width + (2 * sizeof(*inptr)))[addr].deinterleave(); + + // Vtemp1 = Vreg4 + Vreg4; + Vreg14 += Vreg14; + Vsumx = Vreg5 + Vreg5; + Vsumx -= Vreg4;// - Vreg4 + Vsumx -= Vreg4; + + Vreg15 += Vreg15; + + //Vsumx = Vtemp2 - Vtemp1; + Vsumx += Vreg1 + Vreg3; + + Vsumx1 = Vreg15 - Vreg14; + Vsumx1 = Vreg11 + Vreg13; + //Vsumx1 = Vtemp12 - Vtemp11; + + + //Vsumx += Vdata2; + + Vsumx = abs(Vsumx); + Vsumx1 = abs(Vsumx1); + + (intsumx + width + sizeof(*inptr))[addr].interleave() = (Vsumx, Vsumx1); + //(optr + width + sizeof(*inptr))[addr] = Vsumx; + } + } + + + for(int Irow = 0; Irow < (height - 2); Irow++) + { + for(int Icol = 0; Icol < (width / VCOP_2SIMD_WIDTH); Icol++) + { + __agen addr; + addr = Irow * (width * ELEMSZ) + Icol* (2 * VCOP_SIMD_WIDTH * ELEMSZ); + + (Vsumx, Vsumx1) = (intsumx + width + sizeof(*inptr))[addr].deinterleave(); + (Vin, Vin1) = inptr[addr].deinterleave(); + (Vreg1, Vreg11) = (inptr + (2*width) +(2 * sizeof(*inptr)))[addr].deinterleave(); + + Vreg1 = Vreg1 - Vin; + Vreg11 = Vreg11 - Vin1; + + + (Vreg2, Vreg12) = (inptr + (2*width))[addr].deinterleave(); + (Vreg3, Vreg13) = (inptr + (2*sizeof(*inptr)))[addr].deinterleave(); + Vreg3 = Vreg3 - Vreg2; + Vreg13 = Vreg13 - Vreg12; + + (Vreg4, Vreg14) = (inptr + (sizeof(*inptr)))[addr].deinterleave(); + (Vreg5, Vreg15) = (inptr + (2*width) + (sizeof(*inptr)))[addr].deinterleave(); + + Vreg4 += Vreg4; + Vreg14 += Vreg14; + + Vreg5 += Vreg5; + Vreg15 += Vreg15; + + Vreg4 -= Vreg5; + Vreg14 -= Vreg15; + + Vreg1 -= Vreg3; + Vreg1-= Vreg4; + + Vreg11 -= Vreg13; + Vreg11 -= Vreg14; + + Vreg1 = abs(Vreg1); + Vreg11 = abs(Vreg11); + + + Vout = Vsumx + Vreg1; + Vout1 = Vsumx1 + Vreg11; + + Vout = Vout << Vshift; + Vout1 = Vout1 << Vshift; + + // Vsumy = Vout << Vshift; + //Vsumy1 = Vout1 << Vshift; + + + //(optr + width + sizeof(*inptr))[addr].interleave() = (Vsumy, Vsumy1); + (optr + width + sizeof(*inptr))[addr].interleave() = (Vout, Vout1); + } + } + + for(int col= 0;col < height-1; col++) + { + __agen AddrIn = col* width *ELEMSZ; + __agen AddrOut = col*width *ELEMSZ_OUT; + + Vin01= (optr + (width+1) * sizeof(*optr))[AddrIn].onept(); + Vin02= (optr+(2*width-2)*sizeof(*optr))[AddrIn].onept(); + + (optr + width * sizeof(*optr))[AddrOut].onept() = Vin01; + (optr+(2*width)-sizeof(*optr))[AddrOut].onept() = Vin02; + + } + + for(int col = 0; col < width/VCOP_2SIMD_WIDTH; col++) + + { + + __agen Addr1= col*(2 * VECTORSZ_OUT); + (Vin03, Vin13) = (optr+width)[Addr1].deinterleave(); + (Vin04, Vin14) = (optr+width *(height-2))[Addr1].deinterleave(); + + (optr)[Addr1].interleave() = (Vin03, Vin13); + (optr+width*(height-1))[Addr1].interleave() = (Vin04, Vin14); + } + +#if 0 + for(int Irow = 0; Irow < (height); Irow++) + { + for(int Icol = 0; Icol < (width / VCOP_SIMD_WIDTH); Icol++) + { + __agen addr; + addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ); + + Vin = inptr[addr]; + Vreg1 = (inptr +(2 * sizeof(*inptr)))[addr]; + Vdata1 = Vreg1 - Vin; + + Vreg2 = (inptr + (width*2))[addr]; + Vreg3 = (inptr + (width*2) + (2 * sizeof(*inptr)))[addr]; + Vdata2 = Vreg3 - Vreg2; + + Vreg4 = (inptr + width)[addr]; + Vreg5 = (inptr + width + (2 * sizeof(*inptr)))[addr]; + + Vtemp1 = Vreg4 + Vreg4; + Vtemp2 = Vreg5 + Vreg5; + + Vsumx = Vtemp2 - Vtemp1; + Vsumx += Vdata1 + Vdata2; + //Vsumx += Vdata2; + + Vsumx = abs(Vsumx); + + intsumx[addr] = Vsumx; + } + } + for(int Irow = 0; Irow < (height); Irow++) + { + for(int Icol = 0; Icol < (width / VCOP_SIMD_WIDTH); Icol++) + { + __agen addr; + addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ); + + Vsumx = intsumx[addr]; + Vin = inptr[addr]; + Vreg1 = (inptr + (width*2))[addr]; + Vdata1 = Vreg1 - Vin; + + Vreg2 = (inptr + (2*sizeof(*inptr)))[addr]; + Vreg3 = (inptr + (width*2) + (2*sizeof(*inptr)))[addr]; + Vdata2 = Vreg3 - Vreg2; + + Vreg4 = (inptr + (sizeof(*inptr)))[addr]; + Vreg5 = (inptr + (width*2) + (sizeof(*inptr)))[addr]; + + Vtemp1 = Vreg4 + Vreg4; + Vtemp2 = Vreg5 + Vreg5; + + Vsumy = Vtemp2 - vtemp1; + Vsumy+=Vdata1; + Vsumy+=Vdata2; + + Vsumy = abs(Vsumy); + + Vout = Vsumx + Vsumy; + Vout = Vout << Vshift; + + outptr[addr] = Vout; + } + } +#endif +} + + The code is for the Sobel edge detection algorithm. The commented part is the original algorithm, which is later converted to interleaved format. Regards, Shruti + +Shruti, I tried compiling the code you shared and I don't see any build error. Following are my compiler options. Can you make sure the compiler options are the same : C:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\bin\cl-arp32 -g --opt_for_speed=5 -kh --silicon_version=v210 -lu --display_error_number --diag_suppress=26066 --diag_suppress=10063 -IC:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\include -IC:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\include\vcop -I"..\inc" -I"..\..\..\inc" --temp_directory="..\..\..\inc" --obj_directory="..\src_kernelC" ..\src_kernelC\vcop_sobel_xy_kernel.k Regards, Anshu + +Hi Anshu, There are few differences in my compiler options. Below is my compiler log: "C:\\ti\\ccsv7\\utils\\bin\\gmake" -k -j 4 all -O 'Building file: "../main.c"' 'Invoking: EVE Compiler' "C:/ti/ccsv7/tools/compiler/arp32_1.0.9/bin/cl-arp32" -v210 -g --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include/vcop" --include_path="C:/Users/shruti.joshi/workspace_v7/Sobel_interleave" --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include" --diag_warning=225 --display_error_number --diag_wrap=off --preproc_with_compile --preproc_dependency="main.d_raw" "../main.c" 'Finished building: "../main.c"' 'Building file: "../sobel.k"' 'Invoking: EVE Compiler' "C:/ti/ccsv7/tools/compiler/arp32_1.0.9/bin/cl-arp32" -v210 -g --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include/vcop" --include_path="C:/Users/shruti.joshi/workspace_v7/Sobel_interleave" --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include" --diag_warning=225 --display_error_number --diag_wrap=off --preproc_with_compile --preproc_dependency="sobel.d_raw" "../sobel.k" >> Compilation failure subdir_rules.mk:16: recipe for target 'sobel.obj' failed error: VCOP register allocation failed. Please restructure and/or hand-allocate the kernel function. gmake: *** [sobel.obj] Error 1 gmake: Target 'all' not remade because of errors. **** Build Finished **** I will try to match the configurations with yours and let you know the results. Regards, Shruti + +Hi Shruti, Were you able to make these compiler option changes? If yes are you still seeing "VCOP register allocation failed" error? Regards, Anshu + +Shruti, I am closing this thread as we haven't heard back from you. If required please re-open this thread again. Regards, Anshu + diff --git a/data2/text/range/10001-15000/724678.txt b/data2/text/range/10001-15000/724678.txt new file mode 100644 index 0000000000000000000000000000000000000000..97616ba34724c355fc23ccd1a5801024dac181f2 --- /dev/null +++ b/data2/text/range/10001-15000/724678.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP Tool/software: Linux Hi, I did installation using this binary PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin I just did a board bring up of TDA2Px referring VisionSDK_Linux_UserGuide.pdf. After build, by default uenv.txt had fdtfile=dra7-evm-infoadas.dtb, so I changed it to fdtfile=dra76-evm-infoadas.dtb and I was able to boot the system. But I have few errors in the Log. Can you please guide me to solve this errors. U-Boot SPL 2016.05-00010-g9551b3d (Sep 03 2018 - 13:37:29) DRA762-GP ES1.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop reading dra7-dsp1-fw.lzop reading dra7-dsp2-fw.lzop reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 (Build didn't generate this file) spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... spl: falcon_args_file not set in environment, falling back to default reading single-stage-boot.dtb spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 (Build didn't generate this file) reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d (Sep 03 2018 - 13:37:29 +0900) CPU : DRA762-GP ES1.0 Model: TI DRA762 EVM Board: DRA76x EVM REV A.2 DRAM: 4 GiB MMC: mmc@4809c000: fail to find sdr104 mode FDT_ERR_NOTFOUND no pinctrl for sdr104 mmc@4809c000: fail to find ddr50 mode FDT_ERR_NOTFOUND no pinctrl for ddr50 mmc@4809c000: fail to find sdr50 mode FDT_ERR_NOTFOUND no pinctrl for sdr50 mmc@4809c000: fail to find sdr25 mode FDT_ERR_NOTFOUND no pinctrl for sdr25 mmc@4809c000: fail to find sdr12 mode FDT_ERR_NOTFOUND no pinctrl for sdr12 OMAP SD/MMC: 0, OMAP SD/MMC: 1 *** Warning - MMC init failed, using default environment ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 166 bytes read in 2 ms (81.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3559664 bytes read in 166 ms (20.4 MiB/s) 107957 bytes read in 11 ms (9.4 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3650f0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff5b4 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 . [ OK ] Started Create list of required sta...ce nodes for the current kernel. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. . [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... [FAILED] Failed to start Synchronize System and HW clocks. See 'systemctl status sync-clocks.service' for details. . [ 8.944970] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 8.973304] ------------[ cut here ]------------ [ 8.977956] WARNING: CPU: 0 PID: 219 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 8.980353] net eth0: phy found : id is : 0x2000a231 [ 8.992452] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER1_P3 (Idle): Data Access in Supervisor mode during Functional access [ 8.993204] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9.010431] Modules linked in: dwc3(+) udc_core virtio_rpmsg_bus(+) ahci_platform libahci_platform pvrsrvkm(O) libahci libata omap_aes_driver extcon_usb_gpio dwc3_omap omap_sham scsi_mod extcon omap_des omap_rng rng_core omap_remoteproc remoteproc m_can virtio can_dev virtio_ring sch_fq_codel [ 9.036600] CPU: 0 PID: 219 Comm: systemd-udevd Tainted: G O 4.4.84-00027-g018eb62 #1 [ 9.045590] Hardware name: Generic DRA74X (Flattened Device Tree) [ 9.051703] Backtrace: [ 9.054167] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 9.061765] r7:c02e0130 r6:200f0193 r5:00000000 r4:c0953590 [ 9.067470] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 9.074719] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 9.082837] r7:c02e0130 r6:00000093 r5:00000009 r4:ed8a3748 [ 9.088541] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 9.097270] r8:00000017 r7:c0848844 r6:00000000 r5:c0848904 r4:c08489a8 [ 9.104028] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 9.112931] r3:ef208a00 r2:c08489a8 [ 9.116527] r4:80080003 [ 9.119075] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 9.128414] r10:c0982c4b r9:ef1f9240 r8:00000017 r7:00000000 r6:00000000 r5:ef1f92a0 [ 9.136300] r4:ef208f00 [ 9.138847] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 9.147751] r10:00000002 r9:ef250a00 r8:ef008000 r7:00000000 r6:c093bc84 r5:ef1f92a0 [ 9.155639] r4:ef1f9240 [ 9.158187] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 9.166744] r7:00000000 r6:c093bc84 r5:ef1f92a0 r4:ef1f9240 [ 9.172448] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 9.181090] r7:00000000 r6:ed8a3a20 r5:00000017 r4:c093140c [ 9.186796] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 9.195529] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 9.203908] r9:ef250a00 r8:fa213000 r7:fa212000 r6:ed8a3908 r5:fa21200c r4:c09368e4 [ 9.211708] [] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) [ 9.219216] Exception stack(0xed8a3908 to 0xed8a3950) [ 9.224287] 3900: 00000000 c09862c0 00000000 00000000 00000202 00000012 [ 9.232496] 3920: ed8a2000 00000000 ef008000 ef250a00 00000002 ed8a39b4 ed8a39b8 ed8a3958 [ 9.240702] 3940: c00399e4 c0039550 600f0113 ffffffff [ 9.245768] r9:ef250a00 r8:ef008000 r7:ed8a393c r6:ffffffff r5:600f0113 r4:c0039550 [ 9.253571] [] (__do_softirq) from [] (irq_exit+0xbc/0x11c) [ 9.260904] r10:00000002 r9:ef250a00 r8:ef008000 r7:00000000 r6:00000000 r5:00000012 [ 9.268793] r4:ffffe000 [ 9.271341] [] (irq_exit) from [] (__handle_domain_irq+0x68/0xbc) [ 9.279197] r5:00000012 r4:c093140c [ 9.282795] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 9.291178] r9:ef250a00 r8:fa213000 r7:fa212000 r6:ed8a3a20 r5:fa21200c r4:c09368e4 [ 9.298979] [] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) [ 9.306486] Exception stack(0xed8a3a20 to 0xed8a3a68) [ 9.311555] 3a20: ef247674 600f0013 00000001 0000000e 00000000 00000004 ef247674 600f0013 [ 9.319764] 3a40: 00000000 ef250a00 00000002 ed8a3a7c ed8a3a80 ed8a3a70 c03f2bc8 c0688304 [ 9.327971] 3a60: 200f0013 ffffffff [ 9.331469] r9:ef250a00 r8:00000000 r7:ed8a3a54 r6:ffffffff r5:200f0013 r4:c0688304 [ 9.339278] [] (_raw_spin_unlock_irqrestore) from [] (__pm_runtime_idle+0x74/0x84) [ 9.348623] [] (__pm_runtime_idle) from [] (_omap_dm_timer_request+0x10c/0x31c) [ 9.357700] r7:00000000 r6:ef67cb78 r5:00000003 r4:ef3da190 [ 9.363405] [] (_omap_dm_timer_request) from [] (omap_dm_timer_request_by_node+0x1c/0x28) [ 9.373354] r9:ef250a00 r8:ef67cb78 r7:ee70fa78 r6:ef67cb78 r5:ed9245d0 r4:00000000 [ 9.381161] [] (omap_dm_timer_request_by_node) from [] (omap_rproc_request_timer+0x14/0x88) [ 9.391296] [] (omap_rproc_request_timer) from [] (omap_rproc_enable_timers+0xd8/0x274 [omap_remoteproc]) [ 9.402641] r7:ee70fa78 r6:c094575c r5:ed9245d0 r4:00000000 [ 9.408346] [] (omap_rproc_enable_timers [omap_remoteproc]) from [] (omap_rproc_start+0x90/0x1a0 [omap_remoteproc]) [ 9.420563] r10:d9300000 r9:ef250a00 r8:c094574c r7:ee70f800 r6:00000000 r5:ef250a10 [ 9.428449] r4:ee70fa78 [ 9.431003] [] (omap_rproc_start [omap_remoteproc]) from [] (rproc_boot+0x45c/0x55c [remoteproc]) [ 9.441650] r9:00000000 r8:ee70f820 r7:ee70f9ac r6:ee70f9b4 r5:00000000 r4:ee70f800 [ 9.449463] [] (rproc_boot [remoteproc]) from [] (rproc_virtio_find_vqs+0x18c/0x1f0 [remoteproc]) [ 9.460112] r10:ee70f820 r9:00000002 r8:bf247d5c r7:ed611c10 r6:ed611df0 r5:ed8a3c44 [ 9.468001] r4:00000002 [ 9.470558] [] (rproc_virtio_find_vqs [remoteproc]) from [] (rpmsg_probe+0xbc/0x474 [virtio_rpmsg_bus]) [ 9.481727] r10:00000000 r9:00000000 r8:ed611c10 r7:ed8a3c38 r6:ee70f800 r5:ed838280 [ 9.489614] r4:bf06a958 [ 9.492167] [] (rpmsg_probe [virtio_rpmsg_bus]) from [] (virtio_dev_probe+0x230/0x310 [virtio]) [ 9.502640] r10:00000000 r9:00000000 r8:00000000 r7:ed611c20 r6:ed611c10 r5:00000000 [ 9.510525] r4:00000000 [ 9.513074] [] (virtio_dev_probe [virtio]) from [] (driver_probe_device+0x204/0x2f8) [ 9.522588] r10:00000000 r9:ee7e3188 r8:00000013 r7:bf247dfc r6:00000000 r5:ed611c20 [ 9.530477] r4:c09bfa44 [ 9.533022] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 9.541489] r9:ee7e3188 r8:1181ce9c r7:00000000 r6:ed611c54 r5:bf247dfc r4:ed611c20 [ 9.549295] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 9.557500] r7:00000000 r6:c03e9658 r5:bf247dfc r4:00000000 [ 9.563205] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 9.571238] r6:bf03dd58 r5:edb93380 r4:bf247dfc [ 9.575888] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 9.583924] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 9.592042] r7:ee7e3280 r6:c09396f0 r5:bf24b000 r4:bf247dfc [ 9.597751] [] (driver_register) from [] (register_virtio_driver+0x30/0x44 [virtio]) [ 9.607264] r5:bf24b000 r4:00000000 [ 9.610868] [] (register_virtio_driver [virtio]) from [] (rpmsg_init+0x44/0x84 [virtio_rpmsg_bus]) [ 9.621610] [] (rpmsg_init [virtio_rpmsg_bus]) from [] (do_one_initcall+0x98/0x1e4) [ 9.631037] r5:bf24b000 r4:c09396f0 [ 9.634636] [] (do_one_initcall) from [] (do_init_module+0x68/0x398) [ 9.642754] r10:bf247f00 r9:ee7e3188 r8:1181ce9c r7:00000001 r6:ee7e3240 r5:00000001 [ 9.650639] r4:bf247f00 [ 9.653188] [] (do_init_module) from [] (load_module+0x1df8/0x2068) [ 9.661219] r6:ee7e3180 r5:00000001 r4:ed8a3f44 [ 9.665869] [] (load_module) from [] (SyS_finit_module+0x88/0x98) [ 9.673726] r10:00000000 r9:ed8a2000 r8:c000fe24 r7:0000017b r6:b6e60d90 r5:00000007 [ 9.681613] r4:00000000 [ 9.684161] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x3c) [ 9.692367] r6:00000000 r5:00495928 r4:00000000 [ 9.697017] ---[ end trace 00f62522afd768ec ]--- [ 9.704279] remoteproc0: remote processor 55020000.ipu is now up [ 9.719893] virtio_rpmsg_bus virtio1: rpmsg host is online Starting Save/Restore Sound Card State...[ 9.728101] remoteproc1: powering up 40800000.dsp [ 9.744669] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 5583583 Can you please what is the reason for above crash. Regards, Sukesh.R + +Responses: +Hi Sukesh, Could you please let us know 1. What MAKECONFIG you build for ? 2. Are you booting from SD card (If yes, Check if your PIN setting is for SD boot mode or not) ? Regards Surya + +Hi Surya, MAKECONFIG=tda2px_evm_linux_all And SD card boot. It is booting and apps also running. Regards, Sukesh.R + +Hi Sukesh, Addressing the issues raised with the logs: spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 (Build didn't generate this file) spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 (Build didn't generate this file) This isn't an error. The build does generate the lzop files, it resides in the lib/firmware/ folder of your target file-system. The boot-loader tries to search for these files in the boot partition and doesn't find it, hence it throws the error. Regarding the single-stage-boot.dtb, when early boot late-attach is enabled while building kernel, there is a script in vision-SDK (early-boot-update.sh), which copies relevant files to the boot partition, and the dtb which is used is renamed as single-stage-boot.dtb. The error above could be because of the following: 1. Are you using an SD boot with the file-system also present in the SD card? If yes, please set the switch settings to production SD mode ( SYSBOOT 0-15: 00001100 10000001) 2. Please run the make linux and make linux install commands and flash the card once again. The error you're noticing is because there is a missmatch between the kernel image used (/boot/zImage) and the modules built for the kernel (/lib/modules folder). I would also recommend halting at u-boot and running the below commands and then rebooting the board: => env default -fa => saveenv Regards Shravan + diff --git a/data2/text/range/10001-15000/729306.txt b/data2/text/range/10001-15000/729306.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1cf3314b5926bbf02886c91cbe43e0647e40cdb --- /dev/null +++ b/data2/text/range/10001-15000/729306.txt @@ -0,0 +1,38 @@ +Ticket Name: RTOS/TDA2: HDMI input and output FPS capability with TDA2xx + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello There, For HDMI input, what fps it supports?? In Chains_common_vision.c file I have changed to 60 fps i.e. no frame skip for 1080p resolution and this works fine. pOutprms->frameSkipMask = 0x0; Now I want to increase from 60 fps to more. So is it possible to capture from HDMI more than 60 fps through vision sdk?? If yes, what need to do that?? Regards, Kajal + +Responses: +Hi Kajal, Do you want to change HDMI fps or complete usecase fps? For complete usecase, you need to first change fps in the capture, make sure usecase runs fine and then you could change in HDMI. btw, what fps you are looking for? HDMI follows CEA861 standard.. So your fps requirement should be supported in CEA standard. Regards, Brijesh + +Hello Brijesh, My usecase is running at 60 fps . Now I want run the same usecase at 80 fps to 220fps. For complete usecase, you need to first change fps in the capture, make sure usecase runs fine and then you could change in HDMI. >> I have changed setting in capture llink i.e. pOutprms->frameSkipMask = 0x0; and this works fine! i.e. usecase runs at 60 fps I have below doubts, 1. How to change HDMI fps ?? 2. What is mean by HDMI fps and usecase fps ?? Please correct my understanding if i'm wrong. Note:- I have optimized algorithm, so expecting more fps.( before optmization usecase was running at 60 fps) Regards, Kajal + +Hi Kajal, At what resolution, you have configured HDMI? If it is 1080p or 720p, it is already configured for 60fps output. First your entire chain should be able to run at required fps, 80 to 220, then you could change HDMI settings for the required resolution/fps.. Regards, Briejsh + +First your entire chain should be able to run at required fps, 80 to 220, >>How to know this?? Regards, Kajal + +Press "p" on the console, the FPS for each link is displayed. regards, Sujith + +What is your usecase? What all modules are involved in the usecase? Check if all intermediate modules can support 80 to 220 fps .. Rgds, Brijesh + +Hello Brijesh, Usecse is, capture + alg_plugin( EVE1) + display From start to end every module is running st 60 fps. alg_plugin's latency is avg 4500us. My doubt is, If capture link ( Driver/Notify Cb = 60.0 fps) is only giving 60 fps as input to next link...then how come other modules will run at 80 to 220 fps.. Below are logs for this usecase, [IPU1-0] 64.495455 s: [ CAPTURE ] Link Statistics, [IPU1-0] 64.495516 s: ****************************** [IPU1-0] 64.495577 s: [IPU1-0] 64.495607 s: Elapsed time = 32162 msec [IPU1-0] 64.495729 s: [IPU1-0] 64.495790 s: New data Recv = 60.0 fps [IPU1-0] 64.495851 s: Get Full Buf Cb = 60.3 fps [IPU1-0] 64.495943 s: Put Empty Buf Cb = 60.3 fps [IPU1-0] 64.496034 s: Driver/Notify Cb = 60.0 fps [IPU1-0] 64.496095 s: [IPU1-0] 64.496156 s: Input Statistics, [IPU1-0] 64.496217 s: [IPU1-0] 64.496248 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 64.496339 s: | FPS | FPS | FPS | FPS [IPU1-0] 64.496431 s: -------------------------------------------------- [IPU1-0] 64.496522 s: 0 | 60. 3 0. 0 0. 0 60. 3 [IPU1-0] 64.496705 s: [IPU1-0] 64.496736 s: Output Statistics, [IPU1-0] 64.496797 s: [IPU1-0] 64.496858 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 64.497193 s: | ID | FPS | FPS | FPS [IPU1-0] 64.497285 s: --------------------------------------------- [IPU1-0] 64.497376 s: 0 | 0 60. 3 0. 0 0. 0 [IPU1-0] 64.497498 s: [IPU1-0] 64.497529 s: [ CAPTURE ] LATENCY, [IPU1-0] 64.497742 s: ******************** [IPU1-0] 64.497834 s: [IPU1-0] 64.497986 s: [IPU1-0] 64.498017 s: ### CPU [IPU1-0], LinkID [ 0], [IPU1-0] 64.498108 s: [IPU1-0] 64.498169 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 64.498261 s: ****************************** [IPU1-0] 64.498322 s: [IPU1-0] 64.498352 s: Elapsed time = 32165 msec [IPU1-0] 64.498444 s: [IPU1-0] 64.498505 s: New data Recv = 60.6 fps [IPU1-0] 64.498566 s: Release data Recv = 60.3 fps [IPU1-0] 64.498688 s: Driver/Notify Cb = 160.1 fps [IPU1-0] 64.498810 s: [IPU1-0] 64.498840 s: Input Statistics, [IPU1-0] 64.498901 s: [IPU1-0] 64.498932 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 64.499023 s: | FPS | FPS | FPS | FPS [IPU1-0] 64.499115 s: -------------------------------------------------- [IPU1-0] 64.499206 s: 0 | 60. 6 0. 0 0. 0 60. 6 [IPU1-0] 64.499359 s: [IPU1-0] 64.499389 s: Output Statistics, [IPU1-0] 64.499450 s: [IPU1-0] 64.499511 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 64.499572 s: | ID | FPS | FPS | FPS [IPU1-0] 64.499908 s: --------------------------------------------- [IPU1-0] 64.500030 s: 0 | 0 60. 6 0. 0 0. 0 [IPU1-0] 64.500152 s: [IPU1-0] 64.500213 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 64.500274 s: ******************** [IPU1-0] 64.500335 s: Local Link Latency : Avg = 7 us, Min = 0 us, Max = 61 us, [IPU1-0] 64.500457 s: Source to Link Latency : Avg = 80 us, Min = 61 us, Max = 244 us, [IPU1-0] 64.500732 s: [IPU1-0] 65.000793 s: [IPU1-0] 65.001128 s: ### CPU [ EVE1], LinkID [ 10], [IPU1-0] 65.001220 s: [IPU1-0] 65.001250 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 65.001311 s: ****************************** [IPU1-0] 65.001372 s: [IPU1-0] 65.001433 s: Elapsed time = 32668 msec [IPU1-0] 65.001494 s: [IPU1-0] 65.001525 s: Get Full Buf Cb = 60.5 fps [IPU1-0] 65.001616 s: Put Empty Buf Cb = 60.5 fps [IPU1-0] 65.001708 s: Driver/Notify Cb = 60.2 fps [IPU1-0] 65.001860 s: [IPU1-0] 65.001891 s: Input Statistics, [IPU1-0] 65.001952 s: [IPU1-0] 65.001982 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.002074 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.002135 s: -------------------------------------------------- [IPU1-0] 65.002226 s: 0 | 60. 5 0. 0 0. 0 60. 5 [IPU1-0] 65.002348 s: [IPU1-0] 65.002409 s: Output Statistics, [IPU1-0] 65.002440 s: [IPU1-0] 65.002501 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 65.002562 s: | ID | FPS | FPS | FPS [IPU1-0] 65.002623 s: --------------------------------------------- [IPU1-0] 65.002714 s: 0 | 0 60. 5 0. 0 0. 0 [IPU1-0] 65.002867 s: [IPU1-0] 65.002897 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 65.002958 s: ******************** [IPU1-0] 65.003019 s: Local Link Latency : Avg = 36 us, Min = 30 us, Max = 153 us, [IPU1-0] 65.003111 s: Source to Link Latency : Avg = 413 us, Min = 366 us, Max = 701 us, [IPU1-0] 65.003233 s: [IPU1-0] 65.003355 s: [IPU1-0] 65.003385 s: ### CPU [ EVE1], LinkID [ 49], [IPU1-0] 65.003477 s: [IPU1-0] 65.003507 s: [ ALG_EVE ] Link Statistics, [IPU1-0] 65.003568 s: ****************************** [IPU1-0] 65.003629 s: [IPU1-0] 65.003690 s: Elapsed time = 32670 msec [IPU1-0] 65.003782 s: [IPU1-0] 65.003812 s: New data Recv = 60.2 fps [IPU1-0] 65.003904 s: [IPU1-0] 65.003934 s: Input Statistics, [IPU1-0] 65.003995 s: [IPU1-0] 65.004026 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.004087 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.004178 s: -------------------------------------------------- [IPU1-0] 65.004270 s: 0 | 60. 5 0. 0 0. 0 60. 5 [IPU1-0] 65.004392 s: [IPU1-0] 65.004422 s: Output Statistics, [IPU1-0] 65.004483 s: [IPU1-0] 65.004514 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 65.004575 s: | ID | FPS | FPS | FPS [IPU1-0] 65.004666 s: --------------------------------------------- [IPU1-0] 65.004941 s: 0 | 0 60. 5 0. 0 0. 0 [IPU1-0] 65.005063 s: [IPU1-0] 65.005093 s: [ ALG_EVE ] LATENCY, [IPU1-0] 65.005154 s: ******************** [IPU1-0] 65.005215 s: Local Link Latency : Avg = 4511 us, Min = 4422 us, Max = 4758 us, [IPU1-0] 65.005337 s: Source to Link Latency : Avg = 5115 us, Min = 5002 us, Max = 5642 us, [IPU1-0] 65.005459 s: [IPU1-0] 65.005551 s: [IPU1-0] 65.005612 s: ### CPU [ EVE1], LinkID [ 0], [IPU1-0] 65.005703 s: [IPU1-0] 65.005764 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 65.005825 s: ****************************** [IPU1-0] 65.005886 s: [IPU1-0] 65.005917 s: Elapsed time = 32667 msec [IPU1-0] 65.005978 s: [IPU1-0] 65.006039 s: New data Recv = 60.6 fps [IPU1-0] 65.006100 s: Release data Recv = 59.96 fps [IPU1-0] 65.006191 s: Driver/Notify Cb = 69.94 fps [IPU1-0] 65.006252 s: [IPU1-0] 65.006283 s: Input Statistics, [IPU1-0] 65.006344 s: [IPU1-0] 65.006374 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.006466 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.006527 s: -------------------------------------------------- [IPU1-0] 65.006618 s: 0 | 60. 6 0. 0 0. 0 60. 6 [IPU1-0] 65.006832 s: [IPU1-0] 65.006862 s: Output Statistics, [IPU1-0] 65.006923 s: [IPU1-0] 65.006954 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 65.007015 s: | ID | FPS | FPS | FPS [IPU1-0] 65.007106 s: --------------------------------------------- [IPU1-0] 65.007167 s: 0 | 0 60. 6 0. 0 0. 0 [IPU1-0] 65.007289 s: [IPU1-0] 65.007320 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 65.007381 s: ******************** [IPU1-0] 65.007442 s: Local Link Latency : Avg = 31 us, Min = 0 us, Max = 122 us, [IPU1-0] 65.007564 s: Source to Link Latency : Avg = 5417 us, Min = 5277 us, Max = 6069 us, [IPU1-0] 65.007686 s: [IPU1-0] 65.507777 s: [IPU1-0] 65.507869 s: ### CPU [IPU1-0], LinkID [ 10], [IPU1-0] 65.507930 s: [IPU1-0] 65.507991 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 65.508052 s: ****************************** [IPU1-0] 65.508113 s: [IPU1-0] 65.508143 s: Elapsed time = 33169 msec [IPU1-0] 65.508204 s: [IPU1-0] 65.508265 s: Get Full Buf Cb = 60.5 fps [IPU1-0] 65.508326 s: Put Empty Buf Cb = 59.96 fps [IPU1-0] 65.508418 s: Driver/Notify Cb = 60.2 fps [IPU1-0] 65.508479 s: [IPU1-0] 65.508509 s: Input Statistics, [IPU1-0] 65.508570 s: [IPU1-0] 65.508601 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.508723 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.508845 s: -------------------------------------------------- [IPU1-0] 65.508936 s: 0 | 60. 5 0. 0 0. 0 60. 5 [IPU1-0] 65.509058 s: [IPU1-0] 65.509119 s: Output Statistics, [IPU1-0] 65.509150 s: [IPU1-0] 65.509211 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 65.509272 s: | ID | FPS | FPS | FPS [IPU1-0] 65.509363 s: --------------------------------------------- [IPU1-0] 65.509424 s: 0 | 0 60. 5 0. 0 0. 0 [IPU1-0] 65.509546 s: [IPU1-0] 65.509577 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 65.509638 s: ******************** [IPU1-0] 65.509882 s: Local Link Latency : Avg = 20 us, Min = 0 us, Max = 122 us, [IPU1-0] 65.510004 s: Source to Link Latency : Avg = 5631 us, Min = 5490 us, Max = 6283 us, [IPU1-0] 65.510126 s: [IPU1-0] 65.510217 s: [IPU1-0] 65.510278 s: ### CPU [IPU1-0], LinkID [ 67], [IPU1-0] 65.510339 s: [IPU1-0] 65.510370 s: [ DISPLAY ] Link Statistics, [IPU1-0] 65.510461 s: ****************************** [IPU1-0] 65.510522 s: [IPU1-0] 65.510553 s: Elapsed time = 33171 msec [IPU1-0] 65.510614 s: [IPU1-0] 65.510644 s: New data Recv = 60.2 fps [IPU1-0] 65.510766 s: Driver/Notify Cb = 59.99 fps [IPU1-0] 65.510858 s: [IPU1-0] 65.510888 s: Input Statistics, [IPU1-0] 65.510949 s: [IPU1-0] 65.510980 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.511071 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.511132 s: -------------------------------------------------- [IPU1-0] 65.511224 s: 0 | 60. 5 0. 0 0. 0 60. 5 [IPU1-0] 65.511346 s: [IPU1-0] 65.511376 s: [ DISPLAY ] LATENCY, [IPU1-0] 65.511437 s: ******************** [IPU1-0] 65.511498 s: Local Link Latency : Avg = 28 us, Min = 0 us, Max = 183 us, [IPU1-0] 65.511620 s: Source to Link Latency : Avg = 5744 us, Min = 5582 us, Max = 6374 us, [IPU1-0] 65.511742 s: [IPU1-0] 65.512169 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! [IPU1-0] 65.512352 s: [IPU1-0] 65.512383 s: ### CPU [IPU1-0], LinkID [ 68], [IPU1-0] 65.512474 s: [IPU1-0] 65.512505 s: [ DISPLAY ] Link Statistics, [IPU1-0] 65.512566 s: ****************************** [IPU1-0] 65.512627 s: [IPU1-0] 65.512749 s: Elapsed time = 33186 msec [IPU1-0] 65.512840 s: [IPU1-0] 65.512871 s: Driver/Notify Cb = 59.99 fps [IPU1-0] 65.512962 s: [IPU1-0] 65.512993 s: Input Statistics, [IPU1-0] 65.513298 s: [IPU1-0] 65.513359 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 65.513450 s: | FPS | FPS | FPS | FPS [IPU1-0] 65.513542 s: -------------------------------------------------- [IPU1-0] 65.513633 s: 0 | 0. 3 0. 0 0. 0 0. 3 [IPU1-0] 65.513908 s: [IPU1-0] 65.513969 s: [ DISPLAY ] LATENCY, [IPU1-0] 65.514030 s: ******************** [IPU1-0] 65.514091 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [IPU1-0] 65.514243 s: Source to Link Latency : Avg = 107882 us, Min = 107882 us, Max = 107882 us, [IPU1-0] 65.514365 s: [IPU1-0] 66.013755 s: Regards, Kajal + +That's exactly what i am saying. if your source is not running at higher fps, your chain will also not run at such higher fps. Rgds, Brijesh + +Yes Brijesh, so my question is how to change that src fps to higher fps. Regards, Kajal + +Kajal, Here src is sensor or capture device. Please check if your sensor or capture device support more fps and change configuration of sensor/capture device accordingly. Regards, Brijesh + +Hello Brijesh, As I mentioned in above posts our capture src is HDMI cable (HDTV 1.4V Cable) and it support upto 144Hz for 4k videos (google says). But capture link is giving only 60 fps. Then How to change configuration of this capture src ?? Regards, Kajal + +Kajal, From where are you capturing? is it some DVD player? or camera? Does this DVD player or camera support more than 60fps? This is what i meant by capture src. Once you confirm that it supports, then you need to change EDID settings, decoder settings.. etc to get more than 60fps.. Capture link will be able to capture, no change required in capture link.. Rgds, Brijesh + +I am connecting desktop with HDMI cable and giving that input to TDA2x.. Regards, Kajal + +Hi Kajal, If your purpose is to demonstrate the algorithm performance, I think you can use some artificial data to emulate camera input, eg. nullsrc link is a good choice. Regards, Simon + +Hello Simon, Thanks for your suggestion, Can I get a link from where I can download 120 fps ( more than 60 fps ) sample videos. Brijesh, Input to TDA2xx is taken from desktop/monitor using HDMI cable. How do I check weather input from desktop is more than 60? How do I change EDID setting to get more than 60 fps?? Regards, kajal + +Kajal, You could check the fps settings in the monitor/desktop settings.. Rgds, Brijesh + diff --git a/data2/text/range/10001-15000/733346.txt b/data2/text/range/10001-15000/733346.txt new file mode 100644 index 0000000000000000000000000000000000000000..df428eab87093e78ff2ce434638bdc7670a4eb3c --- /dev/null +++ b/data2/text/range/10001-15000/733346.txt @@ -0,0 +1,38 @@ +Ticket Name: Linux: VSDKv3.4 supports 4CH AVB Capture + Surround View (DSPx) + Display (HDMI) (TDA2x & TDA2Ex ONLY) + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi,　 As the release note of VSDKv3.4 which support 4CH AVB Capture + Surround View (DSPx) + Display (HDMI) on TDA2x board. As known that there is one ethernet MAC on theTDA2x board. Q1: How to support the use-case of 4CH AVB capture + Surround view+ Display (HDMI)? Does it need add an Ethernet Swtich controller on the board? Q2: How to recongize/identify the AVB capture link/ video stream of 4CH? regards, Sam. + +Responses: +HI, Please refer the below usecase and doc vision_sdk\apps\src\hlos\adas\src\usecases\avb_rx_multi_cam_3d_srv vision_sdk\docs\Linux\VisionSDK_Linux_UserGuide.pdf Regards, Anuj + +log_avb_ether_2018_1008.txtHi Anuj, Thanks for your reply. I follow the steps of userguide to build image of user case 2: 4CH AVB Capture + Decode + SGX 3D-SRV + DISPLAY. Based on VSDKv3.5, I modified the following: ### Ensure that A15_TARGET_OS := Linux and NDK_PROC_TO_USE=ipu2 in \vision_sdk\$(MAKEAPPNAME)\configs\$(MAKECONFIG)\cfg.mk ### dra72-evm-common.dtsi for TDA2xx) from kernel (ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts)as shown below Change below &mac { status = "okay"; to &mac { status = "disabled"; Basically you need to disable mac from Kernel so VSDK can use it exclusively. It occurred the kernel panic error when plug into a 3rd AVB camera. Could you help intruct me how to solve the issue? Thanks. The message as the following: In details, refer to the attached. [ 167.595061] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off [ 167.603010] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 167.620438] Unable to handle kernel paging request at virtual address 48486034 [ 167.627719] pgd = c0003000 [ 167.630438] [48486034] *pgd=80000080005003, *pmd=00000000 [ 167.635879] Internal error: Oops: 205 [#1] PREEMPT SMP ARM [ 167.641385] Modules linked in: memcache(O) xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 udc_core virtio_rpmsg_bus ahci_platform libahci_platform libahci l ibata omap_sham extcon_usb_gpio omap_aes_driver c_can_platform scsi_mod c_can ca n_dev dwc3_omap omap_des extcon omap_rng rng_core rtc_omap omap_remoteproc remot eproc virtio virtio_ring sch_fq_codel [ 167.672959] CPU: 0 PID: 185 Comm: kworker/0:3 Tainted: G W O 4.4.84-00032-g0f6b93d #1 [ 167.681781] Hardware name: Generic DRA74X (Flattened Device Tree) [ 167.687905] Workqueue: events_power_efficient phy_state_machine [ 167.693856] task: ee664200 ti: ee656000 task.ti: ee656000 [ 167.699281] PC is at cpsw_rx_handler+0x14/0x1f8 [ 167.703830] LR is at __cpdma_chan_free+0x9c/0xb8 [ 167.708466] pc : [] lr : [] psr: 600f0113 [ 167.708466] sp : ee657c00 ip : ee657c30 fp : ee657c2c [ 167.719992] r10: c001c6b0 r9 : 00010000 r8 : 00000556 [ 167.725236] r7 : 48486020 r6 : 48486020 r5 : eeac69d0 r4 : fa486000 [ 167.731790] r3 : c0458608 r2 : 00010000 r1 : 00000556 r0 : 48486020 [ 167.738345] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 167.745683] Control: 30c5387d Table: ae70c140 DAC: fffffffd [ 167.751451] Process kworker/0:3 (pid: 185, stack limit = 0xee656210) [ 167.757829] Stack: (0xee657c00 to 0xee658000 + +Hi Anuj, I have built an image with AVB RX USc in main menu, verified it by connect an AVB camera with Ethernet. it just show CPU-cores usage without video frame on HDMI TV when select the item of “4CH AVB + SGX mosaic SRV +DISPLAY” it show the error message of “Calibrated SGX LUT is NOT present” on console when select item of “4CH AVB + SGX 3D-SRV +DISPLAY”. And I also tried to use “Surround view calibration” to generate a default SGX LUT, but it got failure. Could you help instruct us how to calibrate/generate SGX LUT for AVB capture devices? Thanks. BRs, Sam Hsieh + +Hi Shiju, As the vision_sdk\docs\Linux\VisionSDK_Linux_UserGuide.pdf, I observed that there is some conflicts in the configuration for 4CH AVB SUV UCs (tda2_evm_linux_all/cfg.mk). For TDA2xx & TDA2Ex - vision SDK Linux can run on either IPU1 or IPU2 subsystem And the AVBRX link Id - can be used for supported CPUs only. / * * Supported CPUs: ipu1_0, ipu1_1, a15_0 in TDA2xx * Supported CPUs: ipu1_0, ipu1_1 in TDA3xx */ Why does it need "PROC_IPU2_INCLUDE=yes", "IPU_PRIMARY_CORE=ipu2" for 4CH AVB SUV UCs? If there is any mistakes, please let me know. Thanks. regards, Sam Hsieh + +Hi, There is no mistake. Internally all links are mapped to IPU2 from IPU1_0 in linux case. Can you download a fresh vsdk3.5 and tried to run the usecase by following the guide. Regards, Anuj + +Hi Anuj, Thanks for your feedback. I confirmed that the UCs of Multi LVDS camera SRV works fine with the latest VSDK v3.5 on TDA2XX EVM board. and both IPU1_0 & IPU1_1 core should be disabled for VSDK Linux. But the UCs of AVB camera RX SRV can't work fine. Could you help confirm that the UCs configuration in tda2xx_evm_linux/cfg.mk file ? Thanks. PROC_IPU1_0_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_INCLUDE=yes IPU_PRIMARY_CORE=ipu2 NDK_PROC_TO_USE=ipu2 A15_TARGET_OS=Linux regards, Sam Hsieh ps. The picture is from Vision SDK SW_architechure overview. it doesn't mention the IPU2 core. + + + +Hi Anuj, As the above configuration, it seems that the UCs work fine from the log message of attached except lens calibration (LUT) missed. But it can't display any image frame on the HDMI TV execpt TI surround view title and processor utiliztion. Could you help instruct me how to look into the issue? Thanks. regards, Sam.TDA2XX_AVB_SRV_log.txt + +Hi Sam, Which file did you modify to disable the mac for TDA2x ? Is it dra7-evm.dts or dra72-evm-common.dtsi For TDA2x, you should disable the mac in dra7-evm.dts & for TDA2Ex, in dra72-evm-common.dtsi While building, modify the config file as below NDK_PROC_TO_USE=ipu2 AVB_INCLUDE=yes Regards Surya + +Hi Surya, Thanks for your feedback. Yes, I confirmed that I have disabled the MACs by the following command: $cat /proc/device-tree/ocp/ethernet\@48484000/status ==>disabled regards, Sam. + +Hi Surya, I tried look into the AvbRxLink_tskRun() function which AVBRx link object/task, And detect whether if there is any MJPEG frames from AVB driver, But it just receive the SYSTEM_CMD_PRINT_STATISTICS message, there is no SYSTEM_CMD_NEW_DATA message from AVB driver. And it shows that there are no input packets received in the [ AVBTP RX ] Link Statistics, As I known that the Ethernet MAC is disabled for AVB captures, Could you tell me what’s the entry point of AVBRX driver? Thanks. regards, Sam. + +Hello Sam, sam hsieh said: Q1: How to support the use-case of 4CH AVB capture + Surround view+ Display (HDMI)? Does it need add an Ethernet Swtich controller on the board? Yes, if you have more than single camera, you need to have switch in between cameras and TDA sam hsieh said: Q2: How to recongize/identify the AVB capture link/ video stream of 4CH? The cameras are recognized using AVB stream IDs. These needs to be different for each camera and needs to be configured in the ChainsCommon_SetAvbRxPrm function. Currently stream IDs are set to below. You can change these to your values in apps/src/hlos/common/chains_common.c. {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xE1}, //front {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xE0}, //right {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xE2}, //back {0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xE3}, //left Also can you please reply to below queries? 1. Are you using PC talker or actual AVB cameras? If later, how are cameras connected to TDA? 2. Is this TI EVM or custom board? Regards, Prasad + +Hi Prasad, Thank you for your feedback. I currently connect an actual AVB camera via a common switch(no VLAN) with TDA2X EVM board. Even though rebuild the utility of avbtalker, it's fail by run avbtalker on PC because the dependency issue of libavformat-ffmpeg.so.56 and Ubuntu 18.04 (must be in Ubuntu 16.04). BTW, I thought that the listener (AVBRX) should receive all broadcast packets from any AVB camera. It means that the AVBRX run as promiscuous mode on ethernet. Is it correct or not? Could you let me know which code filter/drop the packets from the other streamIDs (not default)? Thanks. ps. The streamID of My AVB camera: [01 23 45 67 89 ab cd ef] regards, Sam Hsieh. + +Hello Sam, sam hsieh said: Even though rebuild the utility of avbtalker, it's fail by run avbtalker on PC because the dependency issue of libavformat-ffmpeg.so.56 and Ubuntu 18.04 (must be in Ubuntu 16.04). There should be latest library available for Ubuntu 18.04. Please check online for more info. sam hsieh said: BTW, I thought that the listener (AVBRX) should receive all broadcast packets from any AVB camera. Yes, listener can receive all broadcast packets but it would ignore if stream id configured for AVBRX and stream id of received stream doesn't match. Also if you configure camera to send multicast and add that multicast to TDA side, you can receive multicast as well. Also cameracan send unicast with TDA MAC address. sam hsieh said: Could you let me know which code filter/drop the packets from the other streamIDs (not default)? Thanks. This code is present in the AVBTP package. The function AVBTP_processRxPackets in PROCESSOR_SDK_VISION_xx_xx\ti_components\networking\avbtp_0_10_00_00\packages\ti\avbtp\avbtp.c processes all receive packets and matches it to stream id. Please put breakpoint in this function, see if its hit, and why packets gets dropped here. sam hsieh said: ps. The streamID of My AVB camera: [01 23 45 67 89 ab cd ef] This doesn't match with TI default ({0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xE1-4}, please change this in common.c file as suggested earlier. Also, run AVB mosaic use-case with single camera for debug. Regards, Prasad + +Hi Prasad, Thanks for your recommendation. I tried to replaced the default streamID with my actual AVB camera, but it can't captured any AVBTP packet. At the same time, I added the LOGE message in AVBTP_processRxPackets() function, It seems that the whole AVBTP package doesn't have been rebuild all manually, Could you teach me how to rebuild AVBTP stack package only? Thanks. BTW, my AVB camera just send broadcast AVBTP packets, without multicast/unicast packet supprt. regards, Sam Hsieh + +Hello Sam, You can follow instrunctions in AVB user-guide for building the AVB package alone. avbtp_0_10_00_00/docs/avbtp_0_10_00_00_user_guide.html#Build_lib Make sure you give XDC path in command line when building the package. xdc all --xdcpath=”/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/ os_tools/bios_6_46_04_53/packages” --jobs 4 + diff --git a/data2/text/range/10001-15000/734773.txt b/data2/text/range/10001-15000/734773.txt new file mode 100644 index 0000000000000000000000000000000000000000..a9c9fc683453432ebbe9a383444aa301988f7b01 --- /dev/null +++ b/data2/text/range/10001-15000/734773.txt @@ -0,0 +1,38 @@ +Ticket Name: Compiler/TDA2: Incorrect memory accesses after enabling and disabling MMU + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hello, We have software that runs on an A15 core and does work based on a message sent through the mailbox queues from the other A15 core in the TDA2xx. We are using the mmu_a15_data_validation_app_main example in starterware_01_05... as a reference. The software does not use interrupts and is all Polling-based. We're using MMU and cache to speed up some functions but not all. By enabling and disabling MMU like in the provided starterware MMU example we occasionally see odd behavior when running software on subsequent commands. The below is an example of our software flow. uint32 message; main() { //1. MMU config and init same as example while(1) { //2. wait for command through mailbox wait_for_new_message(); //3. print and parse message from mailbox UARTprintf(" message:%d \n", message); if(message == 1) { UARTprintf(" Branch 1 \n"); /// 5. do something, no MMU } if(message == 2) { UARTprintf(" Branch 2 \n"); /// 6. do something, no MMU } else if(message == 4) { UARTprintf(" Branch 4 \n"); /// 4. enable/disable MMU around functions MMUA15Enable(&gMmuTable); function(); MMUA15Disable(); } } } In the above example we print the message prior to the IF checks and we confirm that it's as expected. The IF checks however, and subsequently the branch that is entered, does not match because we end up seeing a different Branch print statement. We've narrowed down the cause of the behavior to Enabling and Disabling MMU. If we never enable/disable mmu then we don't see an issue. Enabling and disabling MMU even just once can cause the above odd results but it doesn't always happen. Essentially we change software, compile and if we see an issue then the issue is repeatable on each system reboot and shows up in the same exact way. If we change software, compile, and don't see an issue after running each Branch including ones with MMU enabled/disabled then we don't ever get the weird behavior. Adding more print statements or any other inconsequential software can cause the odd behavior to change, like entering a different wrong Branch than before, or make the issue go away completely. So there also seems to be a relation to the compiling. We've seen this happen with multiple variables including pointers and not just the top level message variable. Within each top level Branch can be additional sub-branches that are based on other variables. These sub-branches have also shown the similar odd behavior where we print a variable and it looks correct but then the IF-checks result in the wrong branch. When it's a pointer that is affected we'll usually get a core halt since it's now accessing wrong memory. For some of the pointers that have had issues we only load them once at bootup and somehow they get modified after enabling/disabling MMU in a Branch that doesn't even access those specific pointers. By printing the pointer value before accessing it we confirmed that these bootup-loaded pointers are being changed. These are pointers that are properly loaded and working correctly for multiple loops before we run a branch with MMU. Debugging this has been difficult since any change in code can change the behavior. However we have been able to rule out that our software is doing any of this and any issue seems to only come up after running a branch that enables/disables MMU. We are using the mmu_a15_data_validation_app_main example in starterware_01_05... as a reference and we're calling the same exact functions and it is being configured and initialized the same way. Our compile environment uses the default make rules that come with the starterware folder. What are the potential reasons why enabling and disabling MMU would cause the above results? Why would modifying the software and recompiling it change the behavior when what is modified are only print statements? Thank you. + +Responses: +Hi, It seems that you are not taking care of cache maintenance when you disable and re-enable MMU. Behavior may differ when you change print statements depending on contents that were present in cache. Can you add appropriate cache APIs and then try. Regards, Rishabh + +Hello Rishabh, Thank you for your reply. While debugging we had confirmed that both the MMU Enable and Disable functions have cache routines inside of them. Those cache functions appear to be for maintenance and we didn't see any other cache routines used inside of the example source, mmu_a15_data_validation_app_main.c. Are there any other specific cache maintenance steps that should be done both before and after enabling/disabling MMU? Below are copies of the enable and disable functions being use. void MMUA15Disable(void) { uint32_t cacheType; /* Check if MMU is already disabled */ if (0U != MMUA15IsEnabledASM()) { /* Get the cache enabled type */ cacheType = CACHEA15GetEnabled(); if (0U != (((uint32_t) CACHE_A15_TYPE_L1D) & cacheType)) { /* Writeback Invalidate All Data Cache */ CACHEA15WriteBackAndInvalidateAll(); /* Drain Write Buffer */ CACHEA15Wait(); /* Disable L1 Data Cache */ CACHEA15Disable(CACHE_A15_TYPE_L1D); } if (0U != (((uint32_t) CACHE_A15_TYPE_L1I) & cacheType)) { /* Invalidate I Cache */ CACHEA15InvalidateL1IAll(); /* Disable L1 Instruction Cache */ CACHEA15Disable(CACHE_A15_TYPE_L1I); } /* Disable MMU */ MMUA15DisableASM(); /* Invalidate all TLBs */ MMUA15TLBInvalidateAll(); /* Enable Cache */ CACHEA15Enable(cacheType); } } void MMUA15Enable(const mmuA15ModuleTable_t *mmuTable) { uint32_t cacheType; /* Check if MMU is already enabled */ if ((0U == MMUA15IsEnabledASM()) && (NULL != mmuTable)) { /* Get the cache enabled type */ cacheType = CACHEA15GetEnabled(); if (0U != (((uint32_t) CACHE_A15_TYPE_ALLI) & cacheType)) { /* Invalidate I Cache */ CACHEA15InvalidateL1IAll(); /* Disable All Instruction Cache */ CACHEA15Disable(CACHE_A15_TYPE_ALLI); } /* Invalidate all TLBs */ MMUA15TLBInvalidateAll(); /* Enable MMU */ MMUA15EnableASM(mmuTable); /* Enable Cache */ CACHEA15Enable(cacheType); } } Thank you. + +Hi, It seems that you are hitting the below A15 MMU issue: The invalidate instruction is treated by A15 as a clean/invalidate instruction. Therefore, calls to Cache_inv()/Cache_invAll() will behave like Cache_wbInv()/Cache_wbInvAll() on A15. Can you try the MMU enable/disable after disabling all cache at beginning of main and see if you are able to reproduce odd behavior. Regards, Rishabh + +Rishabh, As part of the MMU init and configuration cache is checked to see if it's On. Are you saying to disable all cache before or after this step? /* Check if cache is already enabled */ cacheEnabled = CACHEA15GetEnabled(); /* In case cache is disabled, invalidate and enable it */ if (CACHE_A15_TYPE_ALL != cacheEnabled) { CACHEA15InvalidateL1DAll(); CACHEA15InvalidateL1IAll(); CACHEA15Enable(CACHE_A15_TYPE_ALL); } The above is done before MMU module is initialized and configured with first level descriptors. Thank you. + +Hello Rishabh, Update on my previous question. I ended up running the function: CACHEA15Disable(CACHE_A15_TYPE_ALL); both before and after the MMU/cache init and config. When I ran that function before the init/config software the error came up in the same way as I've seen it. When I ran that function after the init/config software the system doesn't error like before. However the system is also much slower since I'm assuming cache is disabled. Can you explain what you meant with the error "The invalidate instruction is treated by A15 as a clean/invalidate instruction. Therefore, calls to Cache_inv()/Cache_invAll() will behave like Cache_wbInv()/Cache_wbInvAll() on A15."? What are fixes or workarounds to this issue that would still allow us to still use cache to speed up some routines? Also, this version doesn't show an error and if it's because of cache like you mentioned then it makes sense since it's disabled. However we have seen the system "fix" itself when we try some things only to have it break again on the next software change. I'm hoping that's not what happened during this test. Thank you. + +Hi, There are two parts to this problem. First is the workaround for cache problem. Imagine a scenario where have two cores: one say M4 and other is A15, both want to update a shared region x. On M4 sequence should be to first update x, then do a cache write back. On the other hand on A15 sequence will be to first read x and then do a cache invalidate. This will make sure that the cache is never dirty. Second is making MMU enable -> disable -> enable work. You have look at the practical need of this. Regards, Rishabh + +Hello Rishabh, For the first part, memory coherency, it was understood that by enabling and disabling MMU we would accomplish what you describe. If you're suggesting we manually perform those updates to synchronize DDR and cache, what functions are available to do what you describe? I'm not sure I understand what you mean with the second part regarding the practical need of enabling/disabling MMU. We wanted to follow the starterware MMU example that showed a time improvement and so we implemented MMU in the same way. We have looked at enabling MMU once at bootup and never disabling but like you describe in part one, there are a number of memory coherency issues for a multi-core system. The cache functions provided in starterware, filename cache_a15.c, did not help resolve memory coherency issues. So that's why I ask, what functions are available and should be used to resolve what you describe in part one? Thank you. + +Hi, Enabling and disabling MMU is a very crude method of maintaining coherency. In RTOS systems when multiple tasks are running on multiple cores, you can't suddenly disable MMU as it will stop everything running on that particular core. Hence you need to use cache maintenance APIs. For cache APIs available on A15 you should refer to cache_a5.h. Starterware examples are standalone applications written to demonstrate the use of the peripherals and provide quick start to the user. Till now you have used cache APIs along with MMU enable/disable and that has created problems. In case you see any cache coherency issue after removing MMU enable/disable let me know. Also we have migrated from starterware to PDK last year and you must be using a quite old release. My suggestion would be to pick the latest Vision SDK release from software-dl.ti.com/.../index_FDS.html to begin your development. Regards, Rishabh + +Rishabh, Thanks for the reply. I can see how it may be a crude method. I also understand the error you describe for your RTOS example but I don't believe our implementation is the same. This A15 core that we enable/disable MMU follows the example flow that I posted in the original question. MMU gets disabled on that core only when that core is finished. When that core finishes is when a reply gets sent to other core(s) indicating that data is ready. So other core(s) are not asynchronously accessing data and therefore the data that's accessed should be correct. If there's a better way to achieve what we want though then we're certainly open to doing that instead. You suggest we use cache maintenance APIs, I ask again, which functions would help achieve our intended flow as I described in my original question? With or without MMU, can you help narrow down what we need to do to achieve the performance improvements that are shown in the mmu_a15_data_validation_app_main example? If you suggest an alternate flow than what I posted, can you describe that flow? Regarding the PDK you recommend, what example(s) should be used as a reference? I last downloaded and worked with PDK_03_02_00_00 and didn't see equivalent examples to starterware. Thank you. + +Hi, You should have the following flow: Main -> Invalidate All Cache -> Enable L1D/L2 Cache -> Enable MMU. After this you can access shared memory regions/perform operations that need coherency in following order: perform x -> invalidate cache. Hope this helps. Regards, Rishabh + +Rishabh, Thanks for the suggestion, will start looking into implementing that flow. Are there preferred cache APIs to invalidate cache? I've had trouble when using CACHEA15InvalidateL1IAll() and not sure if there are any others that you recommend. Thank you. + +Hi, What issue did you face with CACHEA15InvalidateL1IAll()? Regards, Rishabh + +Also the A15 MMU app is present here in PDK: PROCESSOR_SDK_VISION_03_05_00_00\ti_components\drivers\pdk_01_10_01_06\packages\ti\csl\example\mmu\a15_data_validation. Please note that it is strongly recommended to use PDK to new customers. Regards, Rishabh + +Rishabh, It was used in an earlier test where MMU was enabled only once at bootup and never disabled. I used it to try and sync ddr with cache and it seemed to work the first time I used it since other cores saw the new data. The second time though I didn't see the output properly update. There aren't many examples that use the cache APIs and with the initial errors we were getting it seemed more straightforward to implement what the mmu_a15_data_validation_app_main example does. Please let me know if there is additional information on the specific starterware cache APIs other than cache_a15.c and cache_a15.h. Thank you. + +Rishabh, Thanks for listing the path to the example. I took a quick look and the example looks identical to what we're doing now. I'll start migrating to the new PDK system but it seems that the problem we have would also come up in PDK? Thank you. + +Yes the issue you are facing will come up with PDK as well. For additional information on A15 cache you should refer to ARM documentation. Regards, Rishabh + diff --git a/data2/text/range/10001-15000/736055.txt b/data2/text/range/10001-15000/736055.txt new file mode 100644 index 0000000000000000000000000000000000000000..423f82941fa57613665cde57fb2774f91ae5a6ea --- /dev/null +++ b/data2/text/range/10001-15000/736055.txt @@ -0,0 +1,302 @@ +Ticket Name: RTOS/TDA2EXEVM: uart2 no work + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi Expert, I'm running PROCESSOR SDK VISION v03.04.00 rtos on tda2eg. TDA2 EVM and custom board both have. I modify and run CSL uart test present here: PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\csl\example\uart\uart_test I call UARTConfigInit() to initial UART2 engine after pin mux setting finish. but system get stuck problem when I call UARTConfigInit() API. Could you please give me some advise? Thanks in advance. attach is source file. 1832.main.c /* + * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + /** + * \file main.c + * + * \brief This file demonstrates UART console input and output. + * Expects user to enter an input string and outputs the same + * on console. + * + **/ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ +#include +#include +#include +#include +#include +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +#include +#endif + +/* ========================================================================== */ +/* Macros */ +/* ========================================================================== */ + +/* Commented define TESTCASE_ID to test with default settings of + * BAUD_RATE = 115200, + * WORD_LENGTH = 8Bits, + * STOP_BIT = 1, + * PARITY = None. + * Uncomment below define and set to appropriate test case number to test + * specific configuration. + */ + +/* +#define TESTCASE_ID UART_19 +*/ + +#if (TESTCASE_ID == UART_1) +#define BAUD_RATE BAUD_RATE_9600 +#endif + +#if (TESTCASE_ID == UART_2) +#define BAUD_RATE BAUD_RATE_14400 +#endif + +#if (TESTCASE_ID == UART_3) +#define BAUD_RATE BAUD_RATE_19200 +#endif + +#if (TESTCASE_ID == UART_4) +#define BAUD_RATE BAUD_RATE_38400 +#endif + +#if (TESTCASE_ID == UART_5) +#define BAUD_RATE BAUD_RATE_57600 +#endif + +#if (TESTCASE_ID == UART_6) +#define BAUD_RATE BAUD_RATE_115200 +#endif + +#if (TESTCASE_ID == UART_7) +#define BAUD_RATE BAUD_RATE_230400 +#endif + +#if (TESTCASE_ID == UART_8) +#define BAUD_RATE BAUD_RATE_460800 +#define UART_MODE UART_13x_MODE +#endif + +#if (TESTCASE_ID == UART_9) +#define BAUD_RATE BAUD_RATE_921600 +#define UART_MODE UART_13x_MODE +#endif + +#if (TESTCASE_ID == UART_10) +#define WORD_LENGTH UART_WORD_LENGTH_5 +#endif + +#if (TESTCASE_ID == UART_11) +#define WORD_LENGTH UART_WORD_LENGTH_6 +#endif + +#if (TESTCASE_ID == UART_12) +#define WORD_LENGTH UART_WORD_LENGTH_7 +#endif + +#if (TESTCASE_ID == UART_13) +#define WORD_LENGTH UART_WORD_LENGTH_8 +#endif + +#if (TESTCASE_ID == UART_14) +#define STOP_BIT UART_STOP_BIT_1 +#endif + +#if (TESTCASE_ID == UART_15) +#define STOP_BIT UART_STOP_BIT_1_5_2 +#define WORD_LENGTH UART_WORD_LENGTH_5 +#endif + +#if (TESTCASE_ID == UART_16) +#define STOP_BIT UART_STOP_BIT_1_5_2 +#endif + +#if (TESTCASE_ID == UART_17) +#define PARITY UART_NO_PARITY +#endif + +#if (TESTCASE_ID == UART_18) +#define PARITY UART_PARITY_ODD +#endif + +#if (TESTCASE_ID == UART_19) +#define PARITY UART_PARTY_EVEN +#endif + +#ifndef BAUD_RATE +#define BAUD_RATE BAUD_RATE_115200 +#endif + +#ifndef WORD_LENGTH +#define WORD_LENGTH UART_WORD_LENGTH_8 +#endif + +#ifndef STOP_BIT +#define STOP_BIT UART_STOP_BIT_1 +#endif + +#ifndef PARITY +#define PARITY UART_NO_PARITY +#endif + +#ifndef UART_MODE +#define UART_MODE UART_16x_MODE +#endif + +#define UART_INST_NUM (1U) +uint32_t uartBaseAddr; +uint32_t uart2Addr; + +#define df_uart1 1 +#define df_uart2 1 +/* ========================================================================== */ +/* Global Variables */ +/* ========================================================================== */ +/* None */ + +/* ========================================================================== */ +/* Function Definitions */ +/* ========================================================================== */ +#if 1 +void delay(void) +{ + volatile uint32_t i; + for (i = 0; i < 1000000; i++) + {} +} +#endif +//'---------------------------------------------------------- + + + +void padConfig_prcmEnable() +{ +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +/*' + // Pad configurations + Board_initCfg boardCfg; + boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_UART_STDIO | + BOARD_INIT_MODULE_CLOCK | BOARD_INIT_PINMUX_CONFIG; + Board_init(boardCfg); +*/ +#endif +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) + +#if df_uart1 //' uart1 + /*Pad configurations */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_RXD,0x00040000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_TXD,0x00000000); + /* Set the UART Parameters */ + UARTConfigInit(uartBaseAddr, BAUD_RATE, WORD_LENGTH, STOP_BIT, PARITY, UART_MODE); +#endif + +#if df_uart2 //' uart2 + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART2_RXD,0x00040000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART2_TXD,0x00000000); + UARTConfigInit(uart2Addr, BAUD_RATE, WORD_LENGTH, STOP_BIT, PARITY, UART_MODE); +#endif + +#endif +#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) +/*' + // Pad configurations + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_SCLK,0x00040001); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_CS0,0x00000001); + // Set the UART Parameters + UARTConfigInit(uartBaseAddr, BAUD_RATE, WORD_LENGTH, STOP_BIT, PARITY, + UART_MODE); +*/ +#endif +} + +int main(void) +{ + char dataBuffer[100]; + uartBaseAddr = SOC_UART1_BASE; + uart2Addr = SOC_UART2_BASE; + +/*' +#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) + uartBaseAddr = SOC_UART3_BASE; +#endif +#if (defined (SOC_AM574x) || defined (SOC_AM572x)) || (defined (SOC_AM571x)) + uartBaseAddr = SOC_UART3_BASE; +#endif +*/ + + /*Pad configuration and PRCM enable*/ + padConfig_prcmEnable(); + + //'------------------------------------------------ + while(1){ + +#if df_uart1 + UARTConfigPuts(uartBaseAddr, "--tnzaku02------ uart1\n", -1); +#endif + +#if df_uart2 + UARTConfigPuts(uart2Addr, "--tnzaku02------ uart2\n", -1); +#endif + delay(); + + + } + + + /* UART receive and transmit operation */ + UARTConfigPuts(uartBaseAddr, "\nUART Test", -1); + + UARTConfigPuts(uartBaseAddr, "\nEnter some data to transmit:", -1); + + UARTConfigGets(uartBaseAddr, &dataBuffer[0], -1); + + UARTConfigPuts(uartBaseAddr, "\nData Received:", -1); + + UARTConfigPuts(uartBaseAddr, &dataBuffer[0], -1); + + UARTConfigPuts(uartBaseAddr, "\nUART Test Completed", -1); + + + return 0; +} +/********************************* End of file ******************************/ + +Responses: +Hi, How are you running this binary? This is a standalone example that should be run using CCS. You should make sure that you are not booting Vision SDK when you try to run this binary. Also you can't run UART test for UART2 on the EVM as there is no connection for UART2. Regards, Rishabh + +Hi, command window > gmake csl_uart_test_app BOARD=tda2ex-evm CORE=ipu1_0 Refer "Load using CCS" in VisionSDK_UserGuide_TDA2Ex.pdf to load and run csl_uart_test_app_ipu1_0_release.xem4 Tested in TDA2 EVM and custom board. It is normal to only test uart1 printing, but after adding UARTConfigInit() to initial UART2, uart1 is nothing print out. So guess the initial UART2 has a problem. Thanks in advance. + +Hi, As I specified previously you cannot use UART2 for communication as there is no connection between UART2 pins and FTDI chip. On custom board you have to check the schematics and find out if there is a route available for UART2. You also need to set the pin mux, IO expanders, etc depending on board schematics. Regards, Rishabh + +Hi, On custom board previously used linux to confirm that uart2 is working. There is a route available for UART2. --------------------------------------------------------------------------------------------- As I specified previously: It is normal to only test uart1 printing, but after adding UARTConfigInit() to initial UART2, uart1 is nothing print out. Tracking with CCS will stop at UARTConfigInit() to UART2. Why does UARTConfigInit() to UART2 the operation to stop? Thanks in advance. + +Hi, UARTConfigInit() API modifies UART2 registers. Have you enabled UART2 in PRCM? If UART2 is not enable and you try to access the registers you will see a crash. Regards, Rishabh + diff --git a/data2/text/range/10001-15000/749901.txt b/data2/text/range/10001-15000/749901.txt new file mode 100644 index 0000000000000000000000000000000000000000..64761ef950d18d06cf68fe632086b0a195bb4321 --- /dev/null +++ b/data2/text/range/10001-15000/749901.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/TDA2: Segmentation fault + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using SDK_VISION_03_04_00_00 I made a LINK of my algorithm and ran it in sample_app. The program started to run well, but it would appear about ten minutes later. follow is the log [HOST] [DSP1 ] 1094.048831 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.149972 s: AHD_Detect_times = 97.403772 ms,success=0 [HOST] [DSP1 ] 1094.150064 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.251082 s: AHD_Detect_times = 97.282800 ms,success=0 [HOST] [DSP1 ] 1094.251143 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.352254 s: AHD_Detect_times = 97.394972 ms,success=0 [HOST] [DSP1 ] 1094.352315 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.453303 s: AHD_Detect_times = 97.219344 ms,success=0 [HOST] [DSP1 ] 1094.453333 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.554474 s: AHD_Detect_times = 97.379104 ms,success=0 [HOST] [DSP1 ] 1094.554535 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1094.655584 s: AHD_Detect_times = 97.270472 ms,success=0 [HOST] [DSP1 ] 1094.655615 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 ****** Segmentation fault caught .... Broadcast message from systemd-journald@dra7xx-evm (Wed 2018-10-24 06:52:24 UTC): systemd[1]: Caught , dumped core as pid 426. Broadcast message from systemd-journald@dra7xx-evm (Wed 2018-10-24 06:52:24 UTC): systemd[1]: Freezing execution. ./start: line 4: 863 Segmentation fault (core dumped) ./sample_app.out root@dra7xx-evm:~# [ 1088.140580] virtio_rpmsg_bus virtio0: msg received with no recipient [ 1088.146972] virtio_rpmsg_bus virtio0: msg received with no recipient [ 1187.290318] systemd-journald[126]: Failed to send WATCHDOG=1 notification message: Connection refused i donot know what is the problem, What should I check? thanks SHUAI + +Responses: +[HOST] [DSP1 ] 1158.886841 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1158.987921 s: AHD_Detect_times = 97.415181 ms,success=0 [HOST] [DSP1 ] 1158.987982 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1159.088940 s: AHD_Detect_times = 97.229625 ms,success=0 [HOST] [DSP1 ] 1159.089001 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1159.190111 s: AHD_Detect_times = 97.391353 ms,success=0 [HOST] [DSP1 ] 1159.190172 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1159.291221 s: AHD_Detect_times = 97.270193 ms,success=0 [HOST] [DSP1 ] 1159.291282 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1159.392423 s: AHD_Detect_times = 97.426917 ms,success=0 [HOST] [DSP1 ] 1159.392484 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [HOST] [DSP1 ] 1159.493594 s: AHD_Detect_times = 97.354561 ms,success=0 [HOST] [DSP1 ] 1159.493625 s: i32SignNumber=1 eModel=2 left=593 right=714 top=335 bottom=520 [ 1152.846126] omap-iommu 40d02000.mmu: iommu fault: da 0x98c03000 flags 0x0 [ 1152.852951] remoteproc1: crash detected in 40800000.dsp: type mmufault [ 1152.859604] omap-iommu 40d02000.mmu: 40d02000.mmu: errs:0x00000002 da:0x98c03000 pgd:0xed196630 *pgd:0xad93c801 pte:0xed93c80c *pte:0x00000000 [ 1152.872650] remoteproc1: handling crash #1 in 40800000.dsp9 ms,success=0 [HOST] [DSP1 ] 1159.594827 s: i32SignNumber=1 eModel=2 left593 right=714 top=335 bottom=520 [ 1152.885615] remoteproc1: recovering 40800000.dsp ****** Segmentation fault caught ....[ 1152.900696] dra7_clear_dsp_edma_xbar: Clearing all EDMA XBAR routings to DSP1 [ 1152.910451] dra7_wait_dsp_edma_compl: waiting for DSP1 EDMA traffic on TPCC to complete [ 1152.920096] dra7_wait_dsp_edma_compl: DSP1 EDMA transaction may be ongoing during shutdown! TPCC is active! [ 1152.930085] dra7_wait_dsp_edma_compl: waiting for DSP1 EDMA traffic on TPTC0 to complete [ 1152.938609] dra7_wait_dsp_edma_compl: DSP1 EDMA transaction may be ongoing during shutdown! TPTC0 is active! [ 1152.948615] dra7_wait_dsp_edma_compl: waiting for DSP1 EDMA traffic on TPTC1 to complete [ 1152.964474] omap_hwmod: timer5: _wait_target_disable failed rBoadcast message from systemd-journald@dra7xx-evm (Wed 2018-0-24 06:52:54 UTC): systemd[1]: Caught , dumped core as pid 779. [ 1152.998005] omap_hwmod: mmu1_dsp1: _wait_target_disable failed Broadcast message from systemd-journald@dra7xx-evm (Wed 201-10-24 06:52:54 UTC): systemd[1]: Freezing execution. [ 1153.011197] omap_hwmod: mmu0_dsp1: _wait_target_disable failed Broadcast message from systemd-journald@dra7xx-evm (Wed 2018-0-24 06:52:54 UTC): systemd[1]: Caught , dumped core as pid 784. [ 1153.021144] remoteproc1: stopped remote processor 40800000.dsp [ 1153.045630] remoteproc1: powering up 40800000.dspd 2018-0-24 06:52:54 UTC): systemd[1]: Freezing execution. [ 1153.057406] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2340479 [ 1153.072033] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 1153.077925] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 1153.083869] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 1153.115111] omap-rproc 40800000.dsp: mbox_request_channel failed: -19 [ 1153.121728] remoteproc1: can't start rproc 40800000.dsp: -16 [ 1153.165676] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [ 1153.178670] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 1153.217114] remoteproc1: rproc_boot() failed -16 [ 1153.221885] virtio_rpmsg_bus: probe of virtio0 failed with error -16 [ 1153.237146] remoteproc1: registered virtio0 (type 7) [ 1153.708240] ------------[ cut here ]------------ [ 1153.712888] WARNING: CPU: 0 PID: 159 at lib/kobject_uevent.c:403 add_uevent_var+0xc4/0xcc() [ 1153.721285] add_uevent_var: buffer size too small [ 1153.726004] Modules linked in: cmemk(O) memcache(O) xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 udc_core virtio_rpmsg_bus bc_example(O) extcon_usb_gpio pvrsrvkm(O) c_can_platform omap_aes_driver c_can ahci_platform omap_sham can_dev libahci_platform libahci libata scsi_mod dwc3_omap extcon rtc_omap omap_rng rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 1153.760848] CPU: 0 PID: 159 Comm: systemd-journal Tainted: G O 4.4.84-00027-g018eb62 #2 [ 1153.770015] Hardware name: Generic DRA74X (Flattened Device Tree) [ 1153.776129] Backtrace: [ 1153.778596] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 1153.786192] r7:c02b6b60 r6:60070013 r5:00000000 r4:c0953590 [ 1153.791902] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 1153.799154] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 1153.807274] r7:c02b6b60 r6:00000193 r5:00000009 r4:ee611d18 [ 1153.812979] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 1153.821708] r8:c088a8c4 r7:ef24ec10 r6:eda6f000 r5:c0974930 r4:c0847980 [ 1153.828464] [] (warn_slowpath_fmt) from [] (add_uevent_var+0xc4/0xcc) [ 1153.836671] r3:000007b2 r2:c0847980 [ 1153.840268] r4:eda6f000 [ 1153.842816] [] (add_uevent_var) from [] (of_device_uevent+0x194/0x1c4) [ 1153.851109] r3:cfffb322 r2:00000000 r1:c088a8c4 [ 1153.855756] r4:ef64a134 [ 1153.858304] [] (of_device_uevent) from [] (dev_uevent+0x7c/0x1d4) [ 1153.866161] r9:eda6a000 r8:eda6f000 r7:eda6a000 r6:ef24ec10 r5:eda6f000 r4:ef24ec18 [ 1153.873965] [] (dev_uevent) from [] (uevent_show+0xa4/0x118) [ 1153.881386] r7:eda6a000 r6:c06d7970 r5:ef24ec18 r4:ef05dd00 [ 1153.887090] [] (uevent_show) from [] (dev_attr_show+0x24/0x50) [ 1153.894685] r9:eda6a000 r8:ed06b600 r7:ef24ec18 r6:c06d7970 r5:c0964060 r4:eebfc600 [ 1153.902492] [] (dev_attr_show) from [] (sysfs_kf_seq_show+0x90/0xfc) [ 1153.910611] r5:00001000 r4:eebfc600 [ 1153.914213] [] (sysfs_kf_seq_show) from [] (kernfs_seq_show+0x2c/0x30) [ 1153.922506] r9:ee611e58 r8:ee611f78 r7:ed865f00 r6:00000001 r5:00000000 r4:eebfc600 [ 1153.930314] [] (kernfs_seq_show) from [] (seq_read+0x1b0/0x4fc) [ 1153.938001] [] (seq_read) from [] (kernfs_fop_read+0x120/0x1a4) [ 1153.945685] r10:00000000 r9:00001000 r8:ee611f78 r7:00000000 r6:c018502c r5:00001000 [ 1153.953571] r4:ed06b600 [ 1153.956119] [] (kernfs_fop_read) from [] (__vfs_read+0x34/0xdc) [ 1153.963801] r10:00000000 r9:00001000 r8:00001000 r7:00000000 r6:c018502c r5:ee611f78 [ 1153.971690] r4:ed865f00 [ 1153.974235] [] (__vfs_read) from [] (vfs_read+0x80/0x10c) [ 1153.981395] r9:00001000 r8:004f5738 r7:00000000 r6:ee611f78 r5:ed865f00 r4:004f5738 [ 1153.989200] [] (vfs_read) from [] (SyS_read+0x44/0x98) [ 1153.996097] r9:00001000 r8:004f5738 r7:00000000 r6:00000000 r5:ed865f00 r4:ed865f00 [ 1154.003902] [] (SyS_read) from [] (ret_fast_syscall+0x0/0x3c) [ 1154.011411] r9:ee610000 r8:c000fda4 r7:00000003 r6:00001000 r5:00000000 r4:004f05d8 [ 1154.019255] ---[ end trace 7e9de38f4a84b1cb ]--- + +Hi Shuai, I see you get some iommu faults. Can you check if those documents can help you to debug them: processors.wiki.ti.com/.../IPC_MMU_fault_debug www.ti.com/.../sprac12.pdf Regards, Yordan + +Hi :Yordan the log is diffrent each time ! The errors reported have been changing. SHUAI + +Hi Shuaj, I have pinged Linux expert for further help. Regards, Yordan + +Hi Shuai, Can you please run the below command on your target, and attach the output (configs.txt). zcat /proc/config.gz > configs.txt Please also provide the output of the below command run on the target: cat /proc/meminfo Regards Shravan + +Hi Shravan [HOST] [HOST ] 55.705545 s: SYSTEM: IPC: De-init DONE !!! [HOST] [HOST ] 55.705545 s: SYSTEM: System A15 De-Init Done !!! root@dra7xx-evm:~# zcat /proc/config.gz > configs.txt root@dra7xx-evm:~# root@dra7xx-evm:~# root@dra7xx-evm:~# cat /proc/meminfo MemTotal: 616988 kB MemFree: 453284 kB MemAvailable: 499500 kB Buffers: 208 kB Cached: 57440 kB SwapCached: 0 kB Active: 38296 kB Inactive: 26712 kB Active(anon): 8720 kB Inactive(anon): 7860 kB Active(file): 29576 kB Inactive(file): 18852 kB Unevictable: 0 kB Mlocked: 0 kB HighTotal: 260096 kB HighFree: 211280 kB LowTotal: 356892 kB LowFree: 242004 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 0 kB Writeback: 0 kB AnonPages: 7392 kB Mapped: 8952 kB Shmem: 9224 kB Slab: 17572 kB SReclaimable: 6800 kB SUnreclaim: 10772 kB KernelStack: 856 kB PageTables: 324 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 308492 kB Committed_AS: 37912 kB VmallocTotal: 245760 kB VmallocUsed: 0 kB VmallocChunk: 0 kB CmaTotal: 204800 kB CmaFree: 130808 kB root@dra7xx-evm:~# + +# # Automatically generated file; DO NOT EDIT. # Linux/arm 4.4.84 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_HAVE_PROC_CPU=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_ARCH_HAS_BANDGAP=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_ARM_PATCH_PHYS_VIRT=y CONFIG_GENERIC_BUG=y CONFIG_PGTABLE_LEVELS=2 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_EXTABLE_SORT=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_CROSS_COMPILE="" # CONFIG_COMPILE_TEST is not set CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y # CONFIG_KERNEL_GZIP is not set CONFIG_KERNEL_LZMA=y # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_FHANDLE=y CONFIG_USELIB=y # CONFIG_AUDIT is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # - configs.txt 1/5186 0% + +Hi Shuai, Please attach the file config.txt, please don't paste the output as is. Regards Shravan + +configs.txt + +Hi Shravan configs.txt has up here Regards shuai + +Hi Shuai, Please check the status of the iommu registers to find out where the iommu fault has occured. You can check the iommu register status using the below command on the target: cat /sys/kernel/debug/omap_iommu//regs This will give the address of the IOMMU fault. You can then use CCS and debugger to add a hardware watch-point at the address of the IOMMU fault, to figure out the backtrace for the error on the DSP. Regards Shravan + +Hi Shravan have memory leak shuai + diff --git a/data2/text/range/10001-15000/761414.txt b/data2/text/range/10001-15000/761414.txt new file mode 100644 index 0000000000000000000000000000000000000000..13d0e9557b8f87b7af3c42da1184a9ac5623e2d9 --- /dev/null +++ b/data2/text/range/10001-15000/761414.txt @@ -0,0 +1,28 @@ +Ticket Name: Linux/TDA2: send model from A15 to C66 + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using tda2x evm i use this chain test my cnn (SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\hlos\usecases\nullSrc_display) in chains_nullSrcDisplay.c i read my cnn model to this buffer (model_fr) gUcObj.Alg_FrameCopyPrm.mybuf = (void*)(void*)OSA_memVirt2Phys((UInt32)model_fr, OSA_HEAPID_DDR_CACHED_SR1); in c66 i get the buffer , but i find the model i get on c66 is not Completely consistent ， some weight is diffrent , so i add OSA_memCacheWb after OSA_memVirt2Phys OSA_memCacheWb( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf, ( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf + length_fr ) ); I remembered add OSA_memCacheWb slov my problem, (i do this last week it is ok) ,but today it have some problem , add OSA_memCacheWb make crash , follow is the log , can you tell me what is wrong? [HOST] [HOST ] 75.084365 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [ 68.756016] Unable to handle kernel paging request at virtual address 84203000 [ 68.763602] pgd = d8a9c0001 s: length_fr=14310568,hlos_model_fr_site=a1fd2000,model_fr_site=-1577246720 [ 68.775570] [84203000] *pgd=00000000 [ 68.779324] Internal error: Oops: 2805 [#1] PREEMPT SMP ARM [ 68.784919] Modules linked in: cmemk(O) memcache(O) xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 udc_core virtio_rpmsg_bus bc_example(O) extcon_usb_gpio ahci_platform pvrsrvkm(O) libahci_platform libahci libata c_can_platform c_can can_dev scsi_mod omap_aes_driver omap_sham dwc3_omap extcon rtc_omap omap_rng omap_des rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 68.819576] CPU: 1 PID: 830 Comm: sample_app.out Tainted: G O 4.4.84-00027-g018eb62 #4 [ 68.828659] Hardware name: Generic DRA74X (Flattened Device Tree) [ 68.834777] task: d8ec9200 ti: d8baa000 task.ti: d8baa000 [ 68.840204] PC is at v7_dma_clean_range+0x1c/0x34 [memcache] [ 68.845890] LR is at DMA_devIoctl+0xc4/0x2d8 [memcache] [ 68.851137] pc : [] lr : [] psr: 60070013 [ 68.851137] sp : d8babef0 ip : 00000014 fp : d8babf14 [ 68.862663] r10: 00000000 r9 : d8baa000 r8 : bea48b2c [ 68.867909] r7 : 00000004 r6 : ee742600 r5 : 00da5ca8 r4 : 00000000 [ 68.874462] r3 : 0000003f r2 : 00000040 r1 : 84fa8ca8 r0 : 84203000 [ 68.881016] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 68.888181] Control: 10c5387d Table: 98a9c06a DAC: 00000051 [ 68.893950] Process sample_app.out (pid: 830, stack limit = 0xd8baa210) [ 68.900590] Stack: (0xd8babef0 to 0xd8bac000) [ 68.904965] bee0: 84203000 84fa8ca8 00000000 00000001 [ 68.913179] bf00: bea48b2c d8e364c0 d8babf7c d8babf18 c0131450 bf31b17c 00000001 b6fad000 [ 68.921392] bf20: ee742600 00004000 d8babf5c d8babf38 c013bc38 c008a07c 00000000 00000004 [ 68.929605] bf40: 0002fb40 0000da09 bea48b2c d8baa000 d8babf6c ee742601 00000004 ee742600 [ 68.937819] bf60: 0000da09 bea48b2c d8baa000 00000000 d8babfa4 d8babf80 c0131708 c0130ffc [ 68.946033] bf80: 00000000 00121c1c 0002fb40 00000036 c000fda4 d8baa000 00000000 d8babfa8 [ 68.954247] bfa0: c000fbe0 c01316d8 00000000 00121c1c 00000004 0000da09 bea48b2c 001cfc1c [ 68.962462] bfc0: 00000000 00121c1c 0002fb40 00000036 00da5ca8 001d81c8 b6fb3000 00000000 [ 68.970675] bfe0: b6c924d1 bea48b24 0002a603 b6c924d6 80070030 00000004 00001902 0001e188 [ 68.978883] Backtrace: [ 68.981356] [] (DMA_devIoctl [memcache]) from [] (do_vfs_ioctl+0x460/0x6dc) [ 68.990090] r5:d8e364c0 r4:bea48b2c [ 68.993697] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x3c/0x64) [ 69.001035] r10:00000000 r9:d8baa000 r8:bea48b2c r7:0000da09 r6:ee742600 r5:00000004 [ 69.008939] r4:ee742601 [ 69.011495] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x3c) [ 69.019094] r9:d8baa000 r8:c000fda4 r7:00000036 r6:0002fb40 r5:00121c1c r4:00000000 [ 69.026914] Code: e3a02004 e1a02312 e2423001 e1c00003 (ee070f3a) [ 69.046023] ---[ end trace e689a6a3e574d699 ]---(Wed 2019-01-09 11:57:42 UTC): kernel[658]: [ 68.779324] Internal error: Oops: 2805 [#1] PREEMPT SMP ARM Broadcast message from systemd-journald@dra7xx-evm (Wed 2019-01-09 11:57:42 UTC): kernel[658]: [ 68.893950] Process sample_app.out (pid: 830, stack limit = 0xd8baa210) Broadcast message from systemd-journald@dra7xx-evm (Wed 2019-01-09 11:57:42 UTC): kernel[658]: [ 68.900590] Stack: (0xd8babef0 to 0xd8bac000) Broadcast message from systemd-journald@dra7xx-evm (Wed 2019-01-09 11:57:42 UTC): kernel[658]: [ 68.904965] bee0: 84203000 84fa8ca8 00000000 00000001 Broadcast message from systemd-journald@dra7xx-evm (Wed 2019-01-09 11:57:42 UTC): kernel[658]: [ 68.913179] bf00: bea48b2c d8e364c0 d8babf7c d8babf18 c0131450 bf31b17c 00000001 b6fad000 Thanks! Shuai + +Responses: +Hi Shuai, How much RAM is available on your EVM and have you enabled LPAE? Please provide the output of the below command run on the target: cat /proc/meminfo. Are you seeing this issue only when you do a OSA_memCacheWb from A15? Regards Shravan + +Hi Shravan root@dra7xx-evm:~# cat /proc/meminfo MemTotal: 616992 kB MemFree: 451208 kB MemAvailable: 500868 kB Buffers: 4752 kB Cached: 56356 kB SwapCached: 0 kB Active: 36364 kB Inactive: 31312 kB Active(anon): 7940 kB Inactive(anon): 7868 kB Active(file): 28424 kB Inactive(file): 23444 kB Unevictable: 0 kB Mlocked: 0 kB HighTotal: 260096 kB HighFree: 214620 kB LowTotal: 356896 kB LowFree: 236588 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 4 kB Writeback: 0 kB AnonPages: 6564 kB Mapped: 9340 kB Shmem: 9244 kB Slab: 17372 kB SReclaimable: 6804 kB SUnreclaim: 10568 kB KernelStack: 856 kB PageTables: 320 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 308496 kB Committed_AS: 37376 kB VmallocTotal: 245760 kB VmallocUsed: 0 kB VmallocChunk: 0 kB CmaTotal: 204800 kB CmaFree: 130808 kB i am using SDK_VISION_03_04_00_00 , i have not change any config just add read model in \SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\hlos\usecases\nullSrc_display\chains_nullSrcDisplay.c in fuction Void Chains_nullSrc_display() Vps_printf(" #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE ####"); FILE * fp_fr = fopen("./input_img/model_fr.dat", "rb"); fseek(fp_fr, 0, SEEK_END); int length_fr = ftell(fp_fr); char * model_fr = (char*)OSA_memAllocSR(OSA_HEAPID_DDR_CACHED_SR1, length_fr, 32); //char * model_fr = (char*)malloc(length_fr); fseek(fp_fr, 0, SEEK_SET); fread(model_fr, sizeof(char), length_fr, fp_fr); fclose(fp_fr); Vps_printf("length_fr=%d,hlos_model_fr_site=%x,model_fr_site=%d \n", length_fr,model_fr, model_fr); gUcObj.Alg_FrameCopyPrm.mybuf = (void*)OSA_memVirt2Phys((UInt32)model_fr, OSA_HEAPID_DDR_CACHED_SR1); OSA_memCacheWb( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf, ( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf + length_fr ) ); float *model_fr_float = (float *)model_fr; Vps_printf("hlos_model_fr_0=%f,model_fr_1=%f ,model_fr_2=%f,model_fr_3=%f\n", model_fr_float[0], model_fr_float[1], model_fr_float[780171], model_fr_float[780172]); chains_nullSrcDisplay_Create(&gUcObj,NULL); /* Fill the source buffers */ fillSrcBuf(&gUcObj); ChainsCommon_statCollectorReset(); ChainsCommon_memPrintHeapStatus(); chains_nullSrcDisplay_Start(&gUcObj); //////////////////////////////////////////////////////////////////// in SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\rtos\alg_plugins\framecopy \ frameCopyAlgoLocalDma.c fuction Alg_FrameCopyCreate i get the the buf float * model_fr = (float *)pCreateParams->mybuf; Vps_printf("rtos_model_frsite=%x,model_fr_0=%f,model_fr_1=%f ,model_fr_3=%f,model_fr_4=%f \n", model_fr,model_fr[0], model_fr[1],model_fr[780171],model_fr[780172]); i check some elements of the model is right , but i think not all elements are correct ,The phenomenon is random. Every boot is different ， maybe from the first fram all the elements are correct, In most cases Previous frames litter elements is differnt. Wait a moment the elements are correct. (in Alg_FrameCopyCreate i just get the model_fr position ， i use model_fr in Alg_FrameCopyProcess ) to slove this problem i add OSA_memCacheWb after OSA_memVirt2Phys OSA_memCacheWb( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf, ( (UInt32)gUcObj.Alg_FrameCopyPrm.mybuf + length_fr ) ); then it crash , the program can ran. thanks !! Shuai + +Hi Shuai, Can you please modify your kernel configuration with CONFIG_ARM_LPAE=n and perform a clean build and see if this error is observed (add this to the file ti_config_fragments/auto.cfg and perform clean-build). Regards Shravan + +Hi Shravan i cannot find auto.cfg ,could you please tell me the Detailed path? Regards Shuai + +Hi Shuai, Below is the diff. This file is present in the kernel. diff --git a/ti_config_fragments/auto.cfg b/ti_config_fragments/auto.cfg index ddfb682..ce09628 100644 --- a/ti_config_fragments/auto.cfg +++ b/ti_config_fragments/auto.cfg @@ -49,3 +49,4 @@ CONFIG_ICS932S401=n CONFIG_VMEM_EXP_DMABUF=y CONFIG_DEBUG_INFO=y +CONFIG_ARM_LPAE=y Regards Shravan + +Hi Shravan sorry i can not understant you , ti_config_fragments/auto.cfg is a file in vision sdk ? can you tell me the detailed path? i have to add CONFIG_ARM_LPAE=y in this file?? Regards shuai + +Hi Shuai, This file is present in the Linux kernel. If you used the Vision-SDK installer, the kernel will be in the path it will be present in ti_components/os_tools/linux/ folder. Regards Shravan + +Hi: Shravan you mean open ti_components/os_tools/linux/omap/ti_config_fragments/auto.cfg and add CONFIG_ARM_LPAE=y at last then make clean ,rebuild ? Regards Shuai + +Hi Shuai, Set CONFIG_ARM_LPAE=n in the above file. Regards Shravan + +Hi Shravan i add CONFIG_ARM_LPAE=n in auto.cfg ,make clean then make linux make linux_install make -s -j depend make -s -j but when i restar the EVM have some problem follow is the log 2.777440] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 2.788399] devtmpfs: mounted [ 2.791566] Freeing unused kernel memory: 340K [ 2.796027] This architecture does not have kernel memory protection. /sbin/init: error while loading shared libraries: /usr/lib/libkmod.so.2: file too short [ 2.877469] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00007f00 [ 2.877469] [ 2.886647] CPU0: stopping [ 2.889368] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.84-00027-g018eb62-dirty #10 [ 2.897230] Hardware name: Generic DRA74X (Flattened Device Tree) [ 2.903348] Backtrace: [ 2.905827] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 2.913428] r7:c0931ef0 r6:20000193 r5:00000000 r4:c094f810 [ 2.919149] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 2.926406] [] (dump_stack) from [] (handle_IPI+0x184/0x198) [ 2.933829] r7:c0931ef0 r6:00000000 r5:00000000 r4:c092c424 [ 2.939545] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) [ 2.947143] r7:fa212000 r6:c0931ef0 r5:fa21200c r4:c09328ec [ 2.952857] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 2.960370] Exception stack(0xc0931ef0 to 0xc0931f38) [ 2.965442] 1ee0: 00000001 00000000 fe600000 00000000 [ 2.973655] 1f00: c0930000 c0686294 00000000 c081eb3c 00000000 c0931f60 c093250c c0931f4c [ 2.981867] 1f20: c0931f2c c0931f40 c0027f6c c0010540 60000013 ffffffff [ 2.988504] r9:c0931f60 r8:00000000 r7:c0931f24 r6:ffffffff r5:60000013 r4:c0010540 [ 2.996327] [] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) [ 3.004454] [] (default_idle_call) from [] (cpu_startup_entry+0x208/0x264) [ 3.013107] [] (cpu_startup_entry) from [] (rest_init+0x90/0x94) [ 3.020878] r7:00000000 [ 3.023433] [] (rest_init) from [] (start_kernel+0x400/0x40c) [ 3.030944] r5:c0982000 r4:c0982040 [ 3.034550] [] (start_kernel) from [<80008090>] (0x80008090) [ 3.041110] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00007f00 [ 3.041110] Regards Shuai + +Hi Shuai, The error seems to be while loading kernel modules. Please follow all steps of the Vision-SDK Linux user guide and ensure you're extracting the correct contents into your SD card. Regards Shravan + diff --git a/data2/text/range/10001-15000/763975.txt b/data2/text/range/10001-15000/763975.txt new file mode 100644 index 0000000000000000000000000000000000000000..3c9355b6f5eca0fadc73dd2f3b3691e0edfebb65 --- /dev/null +++ b/data2/text/range/10001-15000/763975.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/DRA75: VDRM reports errors frequently. + +Query Text: +Part Number: DRA75 Tool/software: Linux Hello all, We are using DRA75 with vision sdk 3.04, we are getting continuous error from vdrm and kernel backtrace as below: [17048.031079] WARNING: CPU: 1 PID: 11377 at /home/buildserver/work/jenkins/var/lib/jenkins/workspace/MMT2020_DB_Advanced_applinux/project/elina-distro/build-cpm-mmt-2020/tmp/work-shared/mmt2020-a880/kernel-source/drivers/gpu/drm/vdrm/v_crtc.c:414 v_crtc_atomic_begin+0x5c/0x60() [17048.031090] Modules linked in: spot_memtop(O) cputop(O) tntfs(PO) texfat(PO) usb_f_ncm u_ether usb_f_fs libcomposite configfs sd8xxx mlan cfg80211 cryptoloop loop ti_fpd3_serdes smsc95xx smsc75xx asix usbnet mii usb_storage snd_soc_simple_card snd_soc_bt_sco snd_soc_mmt2020_mcasp snd_soc_edma snd_soc_omap dspipc snd_soc_omap_harman_dsp snd_soc_omap_dsp snd_soc_omap_dsp_pcm dwc3 snd_soc_core udc_core snd_pcm_dmaengine snd_pcm dwc3_omap snd_timer xhci_plat_hcd snd soundcore xhci_hcd usbcore usb_common rpmsg_proto memcache(O) silabs_dabplugin pvrsrvkm(O) omap_remoteproc rpmsg_rpc virtio_rpmsg_bus remoteproc virtio virtio_ring omap_mailbox [last unloaded: cfg80211] [17048.031410] CPU: 1 PID: 11377 Comm: kworker/1:10 Tainted: P W O 4.4.84 #Rel_Elina_J6_MMT_18511A [17048.031424] Hardware name: Generic DRA74X (Flattened Device Tree) [17048.031442] Workqueue: events v_atomic_work [17048.031457] Backtrace: [17048.031479] [] (dump_backtrace) from [] (show_stack+0x20/0x24) [17048.031489] r7:600f0093 r6:c09b7c04 r5:c09b7c04 r4:00000000 [17048.031525] [] (show_stack) from [] (dump_stack+0x90/0xa4) [17048.031542] [] (dump_stack) from [] (warn_slowpath_common+0x94/0xc4) [17048.031550] r7:c04368e0 r6:0000019e r5:00000009 r4:00000000 [17048.031584] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x2c/0x34) [17048.031593] r8:00000000 r7:00000000 r6:600f0013 r5:ee8f6b24 r4:ee8f6800 [17048.031635] [] (warn_slowpath_null) from [] (v_crtc_atomic_begin+0x5c/0x60) [17048.031653] [] (v_crtc_atomic_begin) from [] (drm_atomic_helper_commit_planes+0x80/0x27c) [17048.031661] r7:00000000 r6:c0436884 r5:00000002 r4:c3b66880 [17048.031693] [] (drm_atomic_helper_commit_planes) from [] (v_atomic_complete+0x3c/0xd0) [17048.031700] r9:ccc1d200 r8:00000000 r7:cbe0eec0 r6:ee886000 r5:c3b66880 r4:cbe0eec0 [17048.031735] [] (v_atomic_complete) from [] (v_atomic_work+0x18/0x1c) [17048.031742] r7:ec068400 r6:ec061800 r5:ccc1d200 r4:cbe0eec0 [17048.031777] [] (v_atomic_work) from [] (process_one_work+0x148/0x570) [17048.031792] [] (process_one_work) from [] (worker_thread+0x54/0x52c) [17048.031801] r10:ec061800 r9:ccc1d200 r8:00000008 r7:c3922000 r6:ec061814 r5:ccc1d218 [17048.031834] r4:ec061800 [17048.031851] [] (worker_thread) from [] (kthread+0x11c/0x134) [17048.031860] r10:00000000 r9:00000000 r8:00000000 r7:c00518b8 r6:ccc1d200 r5:c3df77c0 [17048.031890] r4:00000000 [17048.031908] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [17048.031915] r7:00000000 r6:00000000 r5:c0057a98 r4:c3df77c0 [17048.031939] ---[ end trace 628cc065562c003b ]--- [17048.032185] ------------[ cut here ]------------ [17048.032204] WARNING: CPU: 1 PID: 8064 at /home/buildserver/work/jenkins/var/lib/jenkins/workspace/MMT2020_DB_Advanced_applinux/project/elina-distro/build-cpm-mmt-2020/tmp/work-shared/mmt2020-a880/kernel-source/drivers/gpu/drm/vdrm/v_crtc.c:414 v_crtc_atomic_begin+0x5c/0x60() [17048.032213] Modules linked in: spot_memtop(O) cputop(O) tntfs(PO) texfat(PO) usb_f_ncm u_ether usb_f_fs libcomposite configfs sd8xxx mlan cfg80211 cryptoloop loop ti_fpd3_serdes smsc95xx smsc75xx asix usbnet mii usb_storage snd_soc_simple_card snd_soc_bt_sco snd_soc_mmt2020_mcasp snd_soc_edma snd_soc_omap dspipc snd_soc_omap_harman_dsp snd_soc_omap_dsp snd_soc_omap_dsp_pcm dwc3 snd_soc_core udc_core snd_pcm_dmaengine snd_pcm dwc3_omap snd_timer xhci_plat_hcd snd soundcore xhci_hcd usbcore usb_common rpmsg_proto memcache(O) silabs_dabplugin pvrsrvkm(O) omap_remoteproc rpmsg_rpc virtio_rpmsg_bus remoteproc virtio virtio_ring omap_mailbox [last unloaded: cfg80211] [17048.032442] CPU: 1 PID: 8064 Comm: kworker/1:4 Tainted: P W O 4.4.84 #Rel_Elina_J6_MMT_18511A [17048.032452] Hardware name: Generic DRA74X (Flattened Device Tree) [17048.032464] Workqueue: events v_atomic_work [17048.032474] Backtrace: [17048.032489] [] (dump_backtrace) from [] (show_stack+0x20/0x24) [17048.032498] r7:600e0093 r6:c09b7c04 r5:c09b7c04 r4:00000000 [17048.032527] [] (show_stack) from [] (dump_stack+0x90/0xa4) [17048.032543] [] (dump_stack) from [] (warn_slowpath_common+0x94/0xc4) [17048.032550] r7:c04368e0 r6:0000019e r5:00000009 r4:00000000 [17048.032579] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x2c/0x34) [17048.032586] r8:00000000 r7:00000000 r6:600e0013 r5:ee8f6b24 r4:ee8f6800 [17048.032617] [] (warn_slowpath_null) from [] (v_crtc_atomic_begin+0x5c/0x60) [17048.032632] [] (v_crtc_atomic_begin) from [] (drm_atomic_helper_commit_planes+0x80/0x27c) [17048.032640] r7:00000000 r6:c0436884 r5:00000002 r4:c3df7580 [17048.032673] [] (drm_atomic_helper_commit_planes) from [] (v_atomic_complete+0x3c/0xd0) [17048.032682] r9:e3345e80 r8:00000000 r7:c9b3b280 r6:ee886000 r5:c3df7580 r4:c9b3b280 [17048.032715] [] (v_atomic_complete) from [] (v_atomic_work+0x18/0x1c) [17048.032723] r7:ec068400 r6:ec061800 r5:e3345e80 r4:c9b3b280 [17048.032752] [] (v_atomic_work) from [] (process_one_work+0x148/0x570) [17048.032766] [] (process_one_work) from [] (worker_thread+0x54/0x52c) [17048.032774] r10:ec061800 r9:e3345e80 r8:00000008 r7:cb70c000 r6:ec061814 r5:e3345e98 [17048.032810] r4:ec061800 [17048.032827] [] (worker_thread) from [] (kthread+0x11c/0x134) [17048.032837] r10:00000000 r9:00000000 r8:00000000 r7:c00518b8 r6:e3345e80 r5:c3ed1cc0 [17048.032866] r4:00000000 [17048.032882] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [17048.032892] r7:00000000 r6:00000000 r5:c0057a98 r4:c3ed1cc0 [17048.032918] ---[ end trace 628cc065562c003c ]--- [17048.033320] ------------[ cut here ]------------ [17048.033341] WARNING: CPU: 1 PID: 10891 at /home/buildserver/work/jenkins/var/lib/jenkins/workspace/MMT2020_DB_Advanced_applinux/project/elina-distro/build-cpm-mmt-2020/tmp/work-shared/mmt2020-a880/kernel-source/drivers/gpu/drm/vdrm/v_crtc.c:414 v_crtc_atomic_begin+0x5c/0x60() [17048.033350] Modules linked in: spot_memtop(O) cputop(O) tntfs(PO) texfat(PO) usb_f_ncm u_ether usb_f_fs libcomposite configfs sd8xxx mlan cfg80211 cryptoloop loop ti_fpd3_serdes smsc95xx smsc75xx asix usbnet mii usb_storage snd_soc_simple_card snd_soc_bt_sco snd_soc_mmt2020_mcasp snd_soc_edma snd_soc_omap dspipc snd_soc_omap_harman_dsp snd_soc_omap_dsp snd_soc_omap_dsp_pcm dwc3 snd_soc_core udc_core snd_pcm_dmaengine snd_pcm dwc3_omap snd_timer xhci_plat_hcd snd soundcore xhci_hcd usbcore usb_common rpmsg_proto memcache(O) silabs_dabplugin pvrsrvkm(O) omap_remoteproc rpmsg_rpc virtio_rpmsg_bus remoteproc virtio virtio_ring omap_mailbox [last unloaded: cfg80211] [17048.033584] CPU: 1 PID: 10891 Comm: kworker/1:3 Tainted: P W O 4.4.84 #Rel_Elina_J6_MMT_18511A [17048.033594] Hardware name: Generic DRA74X (Flattened Device Tree) [17048.033606] Workqueue: events v_atomic_work [17048.033616] Backtrace: [17048.033630] [] (dump_backtrace) from [] (show_stack+0x20/0x24) [17048.033638] r7:60070093 r6:c09b7c04 r5:c09b7c04 r4:00000000 [17048.033667] [] (show_stack) from [] (dump_stack+0x90/0xa4) [17048.033682] [] (dump_stack) from [] (warn_slowpath_common+0x94/0xc4) [17048.033690] r7:c04368e0 r6:0000019e r5:00000009 r4:00000000 [17048.033718] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x2c/0x34) [17048.033726] r8:00000000 r7:00000000 r6:60070013 r5:ee8f6b24 r4:ee8f6800 [17048.033757] [] (warn_slowpath_null) from [] (v_crtc_atomic_begin+0x5c/0x60) [17048.033772] [] (v_crtc_atomic_begin) from [] (drm_atomic_helper_commit_planes+0x80/0x27c) [17048.033780] r7:00000000 r6:c0436884 r5:00000002 r4:c9b3b680 [17048.033807] [] (drm_atomic_helper_commit_planes) from [] (v_atomic_complete+0x3c/0xd0) [17048.033815] r9:cf113800 r8:00000000 r7:cbcc75c0 r6:ee886000 r5:c9b3b680 r4:cbcc75c0 [17048.033847] [] (v_atomic_complete) from [] (v_atomic_work+0x18/0x1c) [17048.033855] r7:ec068400 r6:ec061800 r5:cf113800 r4:cbcc75c0 [17048.033884] [] (v_atomic_work) from [] (process_one_work+0x148/0x570) [17048.033898] [] (process_one_work) from [] (worker_thread+0x54/0x52c) [17048.033905] r10:ec061800 r9:cf113800 r8:00000008 r7:cc014000 r6:ec061814 r5:cf113818 [17048.033931] r4:ec061800 [17048.033946] [] (worker_thread) from [] (kthread+0x11c/0x134) [17048.033955] r10:00000000 r9:00000000 r8:00000000 r7:c00518b8 r6:cf113800 r5:c9896080 [17048.033982] r4:00000000 [17048.033998] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [17048.034005] r7:00000000 r6:00000000 r5:c0057a98 r4:c9896080 [17048.034027] ---[ end trace 628cc065562c003d ]--- Why this error is happening ? how we can fix this ? Thanks in advance, Sreeju + +Responses: +Sreeju, Since VDRM relies on timer ticks to simulate vsync, there may be occassional mismatch between frame submission and frame complete. These warnings are indicative of that. These warnings are harmless most of the times and you can comment out the WARN_ON to prevent these messages. - Subhajit + +Hi Subhajit, This occasional mismatch in timing will cause any critical issues in later stage ? we have seen the similar error report which leads to crash here: http://origin-e2e.ti.com/support/processors/f/791/t/746573?RTOS-TDA2-Linux-RTOS-VDRM-crashes-if-weston-is-run-automatically-on-boot Thanks, Sreeju + +Sreeju, Further investigation into the thread you linked to suggests the crash is due to memory issues and not timing synchronisation problems. As of now you can consider the timing mismatch issue to be harmless. We will continue to investivgate into this in the background. - Subhajit + +Sreeju - checked with Subhajit. No further comment at this time - these warnings are still harmless in his opinion. + diff --git a/data2/text/range/10001-15000/768394.txt b/data2/text/range/10001-15000/768394.txt new file mode 100644 index 0000000000000000000000000000000000000000..8d7e0d1cbfa46262672add96ace46cf514ea674a --- /dev/null +++ b/data2/text/range/10001-15000/768394.txt @@ -0,0 +1,66 @@ +Ticket Name: RTOS/TDA2P-ABZ: timestamp in SBL + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi All, I am using VSDK 3.05. We have a requirement where we need to toogle a GPIO within 100ms of power up, i.e we need to toggle it in SBL. I have included csl_gpio.h in sbl_tda2xx_main.c. I have pin muxed the gpio inside the function SBLConfigTIEVMPad() After this I have toggled the gpio. Now I need to see whether that gpio is toggled within 100ms. Is there any api or any method to see this apart from using scope. Regards, Deepika + +Responses: +Hi Deepika, You can read 32K Timer for the same. The counter starts from 0 at power up and the same is used by SBL for profiling. Regards, Rishabh + +Hi Rishabh, Can you please refer to any example present in Vision SDK. Is it the timer register mentioned in sec 24.3 in the TRM ( 32-kHz Synchronized Timer (COUNTER_32K)). If that is not the case please let me know the exact register to read. Regards, Deepika + +Hi Deepika, Yes I am referring to COUNTER_32K. Regards, Rishabh + +Hi Deepika, Also you can directly call SBLUtilsRead32KTimer API as used by SBL. Regards, Rishabh + +Hi Rishabh, The return type of this function is integer. What is its unit? Regards, Deepika + +Deepika, The return type is unsigned integer. See SblPrintBootCycles API for conversion to milliseconds. Regards, Rishabh + +Hi Deepika, Were you able to get the timestamp? Regards, Rishabh + +Hi Rishabh, Thanks for the reply. I have added the following lines after the function SBLConfigTIEVMPad() : GPIOModuleEnable(SOC_GPIO1_BASE); GPIODirModeSet(SOC_GPIO1_BASE,TDA_LED0_GPIO1_26,GPIO_DIR_OUTPUT); GPIOPinWrite(SOC_GPIO1_BASE, TDA_LED0_GPIO1_26, GPIO_PIN_HIGH); timeValGpioToggleEnd=SBLUtilsRead32KTimer(); SblPrintBootCycles("Time at which gpio Toggled ", timeValGpioToggleEnd); I am getting the following output Time at which gpio Toggled - 19363 (1.65 ms) Now is this time after system start up ? How to identify this? Thanks Deepika + +Deepika, What is the type for timeValGpioToggleEnd? It should be uint32_t. The calculation should give you 590.91 ms. I am not sure why you are not getting this. SBL profiling is done using the same API. Regards, Rishabh + +Hi Rishabh, The type is uint32_t only. I have checked another function ARM_CCNT_Read().Can I try this? Also based on your inputs right now if it takes 590ms , is it possible to toggle a gpio within 100ms. Regards, Deepika + +Hi Deepika, I missed that you are using TDA2Px and not TDA3xx, my bad. I will get back to you on this. Regards, Rishabh + +Hi Deepika, You can use TIMER_32K on TDA2Px as well. Yes you can toggle GPIO well within 100 ms. It depends on lot of factors like boot mode, SBL execution, UART prints etc. You need to make sure that you run the code in such a way that you can meet 100 ms requirement. Similar time stamp mechanism is already implemented in TDA2P SBL for getting IPU1_0 start time. Regards, Rishabh + +Hi Rishabh, I am using SBLUtilsRead32KTimer () and SblPrintBootCycles() as shown above and the time is showing 1.67 ms. Is this the time after start up? Right now I am using SD booting. Regards, Deepika + +Deepika, Can you share the complete SBL log. Regards, Rishabh + +Hi Rishabh, Please find the logs below,this is for a custom TDA2P board. TDA2Px SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed TDA2Px DDR Configuration DDR Config Completed ***************************************************************** SD Boot - file open completed successfully MPU CPU0 Image Load Completed IPU1 CPU0 Image Load Completed IPU1 CPU1 Image Load Completed DSP1 Image Load Completed DSP2 Image Load Completed EVE1 Image Load Completed EVE2 Image Load Completed App Image Download Completed Putting MPU CPU1 in Off mode EVE MMU configuration completed EVE MMU configuration completed ***************************************************************** PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles SBL Initial Config Cycles - 1742534 (148.69 ms) SOC Init Cycles - 205823 (17.56 ms) DDR Config Clock Cycles - 95837 (8.17 ms) App Image Load Cycles - 117493703 (10026.12 ms) Slave Core Bootup Cycles - 137065 (11.69 ms) SBL Boot-up Cycles - 119682810 (10212.93 ms) Time at which SBL started IPU1_0 - 343418 (29.30 ms) Time at which gpio Toggled - 14173 (1.20 ms) ***************************************************************** Jumping to MPU CPU0 App All cores UP[IPU1-0] 10.480448 s: ***** IPU1_0 Firmware build time 11:47:56 Jan 7 2019 [IPU1-0] 10.480692 s: *** SYSTEM: CPU Frequency , [IPU1-0] 10.568687 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [IPU1-0] 10.568901 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-0] 10.568992 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU1-0] 10.569114 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU1-0] 10.569236 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [IPU1-0] 10.569328 s: SYSTEM: Notify register to [HOST] line 0, event 15... [IPU1-0] 10.571097 s: *** UTILS: CPU MHz = 20 Mhz *** [IPU1-0] 10.571280 s: SYSTEM: System Common Init in progress !!! [IPU1-0] 10.582931 s: SYSTEM: IPC init in progress !!! [IPU1-0] 10.583053 s: SYSTEM: Notify init done !!! [IPU1-0] 10.585127 s: SYSTEM: MsgQ init done !!! [IPU1-0] 10.585310 s: SYSTEM: IPC init DONE !!! [IPU1-0] 10.590678 s: SYSTEM: System Common Init Done !!! [IPU1-0] 10.590831 s: SYSTEM: System Init in progress !!! [IPU1-0] 10.590922 s: SYSTEM: BSP Common Init in progress !!! [IPU1-0] 10.591014 s: SYSTEM: BSP Common Init Done !!! [IPU1-0] 10.591075 s: SYSTEM: BSP Platform Init in progress !!! [IPU1-0] 10.591258 s: SYSTEM: BSP Platform Init Done !!! [IPU1-0] 10.591349 s: SYSTEM: FVID2 Init in progress !!! [IPU1-0] 10.591502 s: SYSTEM: FVID2 Init Done !!! [IPU1-0] 10.591593 s: SYSTEM: VPS Init in progress !!! [IPU1-0] 10.591654 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] [IPU1-0] 10.595223 s: *** VPDMA Firmware Loading... *** [IPU1-0] 10.595345 s: VPDMA Firmware Address = 0x9fd1b5c0 [IPU1-0] 10.595437 s: VPDMA Load Address = 0x4897d004 [IPU1-0] 10.595589 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 10.595681 s: VPDMA List Busy Status = 0x00000000 Can you please tell me why does SBL Initial Config Cycles takes 148ms Regards, Deepika + +Deepika, Let's first try to resolve the timestamp issue. I see one problem here that needs to fixed in TDA2 SBL for IPU timestamp value. SblPrintBootCycles API has different implementation for TDA2xx and TDA3xx. When you are reading 32K timer you need to use implementation given in TDA3 SBL. As an experiment can you replace the implementation of this API with the one given in TDA3 SBL. You will correct timestamp although other time profiling will be wrong. Regards, Rishabh + +Hi Rishabh, "When you are reading 32K timer you need to use implementation given in TDA3 SBL.As an experiment can you replace the implementation of this API with the one given in TDA3 SBL." I did'nt understood this So should I remove all the ARM_CCNT_Read() and use SBLUtilsRead32KTimer () in sbl_tda2xx_main.c Correct me if I am wrong Regards Deepika + +Deepika, SblPrintBootCycles is defined in sbl_tda3xx_main.c and sbl_tda2xx_main.c. You need to replace the API definition given in sbl_tda2xx_main.c with the one given in sbl_tda3xx_main.c Regards, Rishabh + +Hi Rishabh, With this I am getting a linker error. I cleaned it again. I added stdio.h and in snprintf function I modified the format specifier with %ld instead of %d snprintf(bootCyclesStr, (size_t) 8, "%ld", bootCycles); /home/deepika/FFC_sensor/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/lib/fpu/librdimon.a(rdimon-syscalls.o): In function `_sbrk': syscalls.c:(.text._sbrk+0x78): undefined reference to `end' collect2: error: ld returned 1 exit status Regards, Deepika + +Hi Deepika, Use the below definition: uint32_t cyclesInMsInt = 0U, cyclesInMsFrac = 0U; + +cyclesInMsInt = (bootCycles * 1000U) / SBL_32KTIMER_REFERENCE_VAL; + +cyclesInMsFrac = + (((bootCycles * 1000U) % SBL_32KTIMER_REFERENCE_VAL) * 100U) / SBL_32KTIMER_REFERENCE_VAL; + +UARTprintf("\n %s - %d (%d.%02d ms)", + cyclesString, bootCycles, cyclesInMsInt, cyclesInMsFrac); Regards, Rishabh + +Hi Rishabh, Now it worked according to your expectations: SBL Initial Config Cycles - 1761638 (53760.92 ms) SOC Init Cycles - 205475 (6270.59 ms) DDR Config Clock Cycles - 95777 (2922.88 ms) DDR test Wait time Clock Cycles - 0 (0.0 ms) App Image Load Cycles - 124934131 (11599.10 ms) Slave Core Bootup Cycles - 136908 (4178.10 ms) SBL Boot-up Cycles - 127141766 (78970.77 ms) Time at which SBL started IPU1_0 - 368912 (11258.30 ms) Time at which gpio Toggled - 18850 (575.25 ms) Now tell me how you can I reduce this Gpio toggling time. Regards, Deepika + +Deepika, Glad that this issue is resolved. Can you add a new API for getting time stamp for ipu1_0 and gpio with the provided definition so that you can see SBL profiling numbers correctly along with correct time stamps. Reducing boot time is not a straight forward action and cannot be done by some register configuration. Also please start a new thread for boot time reduction. Regards, Rishabh + +HI Rishabh, Time at which SBL started IPU1_0------timeValStartIpu1_0 is already available in the present file.Can you please let me know what else can I add for ipu1_0. Regards, Deepika + +Deepika, There are two places where 32K Timer will be used. One for ipu1_0 that was already there and the other you have added for gpio. At both places you need to use the API definition I provided you in this thread say SblPrintBootCycles32K. Regards, Rishabh + +Hi Rishabh, Thanks a lot for your support. I have reverted to the original TI SDK code, with that the time has been reduced further to 332 ms. I will open a thread to reduce the boot time further. This is what I am currently getting : SBL Initial Config Cycles - 116409 (9.93 ms) SOC Init Cycles - 170606 (14.55 ms) DDR Config Clock Cycles - 89616 (7.64 ms) App Image Load Cycles - 96433659 (8229.0 ms) Slave Core Bootup Cycles - 130417 (11.12 ms) SBL Boot-up Cycles - 96941763 (8272.36 ms) Time at which SBL started IPU1_0 - 281181 (8580.96 ms) Time at which gpio Toggled - 10884 (332.15 ms) ***************************************************************** Regards, Deepika + +Deepika, Thanks for the confirmation. I am closing this thread. Regards, Rishabh + diff --git a/data2/text/range/10001-15000/777773.txt b/data2/text/range/10001-15000/777773.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c639b3db6a8d404cdefadd399f3519d683af9f5 --- /dev/null +++ b/data2/text/range/10001-15000/777773.txt @@ -0,0 +1,40 @@ +Ticket Name: Linux/TDA2: VISION SDK - Build tidl_model_import for Linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Is there a way to get tidl model input converter working on Linux OS? In PROCESSOR_SDK_VISION/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/utils/tidlModelImport there is make file, but make does not work, its full of errors I can't fix. Can anyone help me with this? Regards. + +Responses: +Hi, can you share the build log? Regards, Yordan + +Hi, here it is: compiling tidl_import_common.cpp In file included from ti_dl.h:76:0, from tidl_import_common.cpp:88: ../../inc/itidl_ti.h:81:0: warning: "USE_IVISION" redefined #define USE_IVISION (0) ^ ../../inc/itidl_ti.h:78:0: note: this is the location of the previous definition #define USE_IVISION (1) ^ tidl_import_common.cpp: In function ‘int32_t TIDL_QuantizeUnsignedMax(uint8_t*, float*, int32_t, float, float, int32_t, int32_t, int32_t*)’: tidl_import_common.cpp:109:33: error: call of overloaded ‘abs(float)’ is ambiguous float absRange = abs(max - min); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ tidl_import_common.cpp: In function ‘int32_t TIDL_normalize(float, float, float)’: tidl_import_common.cpp:186:33: error: call of overloaded ‘abs(float)’ is ambiguous float absRange = abs(max - min); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ tidl_import_common.cpp: In function ‘bool TIDL_readProtoFromTextFile(const char*, google::protobuf::Message*)’: tidl_import_common.cpp:212:12: warning: NULL used in arithmetic [-Wpointer-arith] if(fd == NULL) ^ tidl_import_common.cpp: In function ‘bool TIDL_readProtoFromBinaryFile(const char*, google::protobuf::Message*)’: tidl_import_common.cpp:238:12: warning: NULL used in arithmetic [-Wpointer-arith] if(fd == NULL) ^ tidl_import_common.cpp: In function ‘int32_t TIDL_findSymQ(float, float)’: tidl_import_common.cpp:368:25: error: call of overloaded ‘abs(float&)’ is ambiguous float absMax = (abs(min) > abs(max)) ? abs(min) : abs(max); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ tidl_import_common.cpp:368:36: error: call of overloaded ‘abs(float&)’ is ambiguous float absMax = (abs(min) > abs(max)) ? abs(min) : abs(max); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ tidl_import_common.cpp:368:48: error: call of overloaded ‘abs(float&)’ is ambiguous float absMax = (abs(min) > abs(max)) ? abs(min) : abs(max); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ tidl_import_common.cpp:368:59: error: call of overloaded ‘abs(float&)’ is ambiguous float absMax = (abs(min) > abs(max)) ? abs(min) : abs(max); ^ In file included from /usr/local/include/google/protobuf/stubs/port.h:35:0, from /usr/local/include/google/protobuf/stubs/common.h:40, from /usr/local/include/google/protobuf/io/coded_stream.h:134, from tidl_import_common.cpp:63: /usr/include/stdlib.h:774:12: note: candidate: int abs(int) extern int abs (int __x) __THROW __attribute__ ((__const__)) __wur; ^ In file included from /usr/include/c++/5/bits/stl_algo.h:59:0, from /usr/include/c++/5/algorithm:62, from /usr/local/include/google/protobuf/stubs/shared_ptr.h:38, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl_lite.h:49, from /usr/local/include/google/protobuf/io/zero_copy_stream_impl.h:46, from tidl_import_common.cpp:64: /usr/include/c++/5/cstdlib:174:3: note: candidate: long long int std::abs(long long int) abs(long long __x) { return __builtin_llabs (__x); } ^ /usr/include/c++/5/cstdlib:166:3: note: candidate: long int std::abs(long int) abs(long __i) { return __builtin_labs(__i); } ^ /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/makerules/rules.mk:450: recipe for target '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/out/PC/dsp/debug/modules/ti_dl/utils/tidlModelImport/tidl_import_common.obj' failed make: *** [/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/out/PC/dsp/debug/modules/ti_dl/utils/tidlModelImport/tidl_import_common.obj] Error 1 Regards. + +Hi Yordan, I'll add more details about my software: - Ubuntu 16.04 -PROCESSOR_SDK_VISION_03_04_00_00 And more details on what am I doing and what i did: -I'm trying to use tidlModelImport as a module in project that uses TIDL in VISION SDK. --Project is designed to work on Ubuntu 16.04 -First when i looked at build log I added "-std=gnu++11" to CFLAGS in `makefile` --and then changed include to in `tidl_import_common.cpp` -After that passed, got new compile arrors about protobuf library: --Forums say that libprotobuf-dev is outdated on official Ubuntu ---then I manualy build protobuf v3.2.0 ---updated makefile to use those libs -After that passed, got new errors where: --"compiling ../caffeImport/caffe.pb.cc" complained about: ---"/protobuf/src/google/protobuf/arena.h:xxx: undefined reference to ..." many things ---You will find whole output in `build_log` That confused me hence every file in "../tfImport/proto_cc/tensorflow/core/framework/" includes that `arena.h` file but compiling them passes with no errors. The clean build log output (where I did not modify anything) can be found in `build_log_clean`. Regards, Uros.makefile.doctidl_import_common.cppbuild_log.docbuild_log_clean.doc + +Hi Uros, in your makefile can you add to LDFLAGS also "-lstdc++ -m32 -static" flags and give a try? They should be added if PLATFORM_BUILD == 'x86', but I am not sure it happens. Regards, Yordan + +Hi Yordan, As you suggested i modified makefile: CFLAGS+=-DTIDL_IMPORT_TOOL +LDFLAGS= -L $(PROTOBUF_LIB_DIR) +LDFLAGS+= -lprotoc +LDFLAGS+= -lprotobuf +LDFLAGS+= -lpthread + +CFLAGS+= -m32 +LDFLAGS+= -lstdc++ -m32 -static + +# ifeq ($(PLATFORM_BUILD), x86) +# CFLAGS+= -m32 +# LDFLAGS+= -lstdc++ -m32 -static +# else +# LDFLAGS+= -lstdc++ -lz +# endif Build still fails, but now when compiling caffeImport occurs I get this: compiling ../caffeImport/caffe.pb.cc /usr/bin/ld: skipping incompatible /home/rtrk/protobuf/src/.libs/libprotoc.a when searching for -lprotoc /usr/bin/ld: skipping incompatible //usr/local/lib/libprotoc.a when searching for -lprotoc /usr/bin/ld: cannot find -lprotoc /usr/bin/ld: skipping incompatible /home/rtrk/protobuf/src/.libs/libprotobuf.a when searching for -lprotobuf /usr/bin/ld: skipping incompatible //usr/local/lib/libprotobuf.a when searching for -lprotobuf /usr/bin/ld: cannot find -lprotobuf collect2: error: ld returned 1 exit status /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/makerules/rules.mk:603: recipe for target 'outfile' failed make: *** [outfile] Error 1 You can find whole output in `build.log.doc` attachment. Regards, Uros. build.log.doc + +Hi Uros, can you try to rebuild protobuf and protoc libraries with '-m32' flag added to their CFLAGS and LDFLAGS? Regards, Yordan + +Hi, Yordan, I tried that, and everything is still the same. Regards, Uros + +Hi Uros, I do not have more ideas and pinged TIDL experts to provide help. Regards, Yordan + +Hi Yordan, I want to inform You that I have successfully build tidl_model_converer for Linux OS. Make flags for protobuf and protoc libs needed more additions: build=i686-pc-linux-gnu CFLAGS=-m32 -DNDEBUG CXXFLAGS=-m32 -DNDEBUG LDFLAGS=-m32 Like this library is sure to be 32-bit. Regards, Uros + +Hi Uros, Thanks for updating the thread. Regards, Yordan + diff --git a/data2/text/range/10001-15000/778641.txt b/data2/text/range/10001-15000/778641.txt new file mode 100644 index 0000000000000000000000000000000000000000..405f7be4e6277e843dc452e7cd959448e69bb5a8 --- /dev/null +++ b/data2/text/range/10001-15000/778641.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA3XEVM: how to using sample_app in tda3x + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux i am using tda3evm ,SDK_VISION_03_04_00_00 ,i try to make sample_app in vision_sdk , MAKEAPPNAME?=sample_app MAKECONFIG?=tda3xx_evm_bios_all but i make depend have some problem ,,follow is the log . SDK_VISION_03_04_00_00/vision_sdk/sample_app/configs/tda3xx_evm_bios_all/cfg.mk: No such file or directory how to slove this problem? Thanks! Shuai + +Responses: +/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages;..;' "./config.bld", line 4 making package.mak (because of package.bld) ...making package.mak (because of package.bld) ... js: "/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/tda3xx/config_c66.bld", line 13: Error: utils.loadCapsule: can't find '/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/sample_app/build/tda3xx/mem_segment_definition_512mb.xs' along the path '/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/tda3xx/; + +Hi Shuai, Can you provide the changes you have made in the SDK? Regards, Rishabh + +Hi Rishabh Some configuration files in sampleapp do not have tda3, only tda2. I copied the configuration files from the corresponding directory of the app. Now the compilation is successful, but there are still some problems in running. could you hlep me to see what is the problem? follow is the log! Regards, Shuai Jumping to IPU1 CPU0 App [IPU1-0] 1.729762 s: ***** IPU1_0 Firmware build time 22:13:16 Mar 2 2019 [IPU1-0] 1.729915 s: *** SYSTEM: CPU Frequency , [IPU1-0] 1.738760 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [IPU1-0] 1.738912 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-0] 1.739034 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU1-0] 1.739156 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU1-0] 1.739431 s: *** UTILS: CPU MHz = 20 Mhz *** [IPU1-0] 1.739522 s: SYSTEM: System Common Init in progress !!! [IPU1-0] 1.748612 s: UTILS: CIO: Init Done !!! [IPU1-0] 1.748703 s: SYSTEM: IPC init in progress !!! [IPU1-0] 1.748764 s: SYSTEM: Notify init done !!! [IPU1-0] 1.749008 s: SYSTEM: MsgQ init done !!! [IPU1-0] 1.749069 s: SYSTEM: IPC init DONE !!! [IPU1-0] 1.751326 s: SYSTEM: System Common Init Done !!! [IPU1-0] 1.751418 s: SYSTEM: System Init in progress !!! [IPU1-0] 1.751479 s: SYSTEM: BSP Common Init in progress !!! [IPU1-0] 1.751540 s: SYSTEM: BSP Common Init Done !!! [IPU1-0] 1.751631 s: SYSTEM: BSP Platform Init in progress !!! [IPU1-0] 1.751784 s: PLATFORM: UNKNOWN CPU detected, defaulting to CPU REV 2.0 [IPU1-0] 1.751875 s: SYSTEM: BSP Platform Init Done !!! [IPU1-0] 1.751936 s: SYSTEM: FVID2 Init in progress !!! [IPU1-0] 1.752089 s: SYSTEM: FVID2 Init Done !!! [IPU1-0] 1.752150 s: SYSTEM: VPS Init in progress !!! [IPU1-0] 1.752211 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] [IPU1-0] 1.754742 s: *** VPDMA Firmware Loading... *** [IPU1-0] 1.754834 s: VPDMA Firmware Address = 0x9ffc7800 [IPU1-0] 1.754925 s: VPDMA Load Address = 0x4897d004 [IPU1-0] 1.755017 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 1.755108 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 1.755169 s: *** VPDMA Firmware Load Success *** [IPU1-0] 1.789666 s: SYSTEM: VPS Init Done !!! [IPU1-0] 1.790398 s: UTILS: DMA: HWI Create for INT34 !!! [IPU1-0] 1.790733 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU1-0] 1.790855 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 257272 B (251 KB) [IPU1-0] 1.791008 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 1.791160 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x85703000, Total size = 369086464 B (351 MB), Free size = 369086464 B (351 MB) [IPU1-0] 1.791374 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfe00000, Total size = 1046784 B (0 MB), Free size = 1039104 B (0 MB) [IPU1-0] 1.791526 s: SYSTEM: Initializing Links !!! [IPU1-0] 1.865064 s: SYSTEM: Initializing Links ... DONE !!! [IPU1-0] 1.885835 s: BOARD: Board Init in progress !!! [IPU1-0] 1.886170 s: BOARD: Board Init Done !!! [IPU1-0] 1.889953 s: [IPU1-0] 1.890014 s: Vision SDK Version : [REL_VISION_SDK_03_02_00_00] [IPU1-0] 1.890105 s: FVID2 Version : [FVID_02_01_00_01] [IPU1-0] 1.890166 s: BSP Version : [PDK_01_08_01_xx] [IPU1-0] 1.890227 s: Platform : [EVM] [IPU1-0] 1.890288 s: SOC : [TDA3XX] [IPU1-0] 1.890349 s: SOC Revision : [ES2.0] [IPU1-0] 1.890410 s: Board Detected : [TDA3XX BASE] [IPU1-0] 1.890471 s: Base Board Revision : [REV A] [IPU1-0] 1.890532 s: Daughter Card Revision: [REV A] [IPU1-0] 1.890624 s: [IPU1-0] 1.890776 s: SYSTEM: UART: INTERRUPT Mode is Selected [IPU1-1] 1.735771 s: ***** IPU1_1 Firmware build time 22:09:01 Mar 2 2019 [IPU1-1] 1.735923 s: *** SYSTEM: CPU Frequency , [IPU1-1] 1.739827 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [IPU1-1] 1.739980 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-1] 1.740102 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU1-1] 1.740193 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU1-1] 1.740559 s: SYSTEM: System Common Init in progress !!! [IPU1-1] 1.741383 s: UTILS: CIO: Init Done !!! [IPU1-1] 1.741475 s: SYSTEM: IPC init in progress !!! [IPU1-1] 1.741536 s: SYSTEM: Notify init done !!! [IPU1-1] 1.741780 s: SYSTEM: MsgQ init done !!! [IPU1-1] 1.741810 s: SYSTEM: IPC init DONE !!! [IPU1-1] 1.743823 s: SYSTEM: System Common Init Done !!! [IPU1-1] 1.743915 s: SYSTEM: System IPU1_1 Init in progress !!! [IPU1-1] 1.744677 s: UTILS: DMA: HWI Create for INT25 !!! [IPU1-1] 1.744860 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU1-1] 1.744952 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 257448 B (251 KB) [IPU1-1] 1.745104 s: SYSTEM: Initializing Links !!! [IPU1-1] 1.788507 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### [IPU1-1] 1.790062 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### [IPU1-1] 1.791343 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### [IPU1-1] 1.793082 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### [IPU1-1] 1.794912 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### [IPU1-1] 1.796712 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### [IPU1-1] 1.798420 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### [IPU1-1] 1.800219 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### [IPU1-1] 1.802110 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### [IPU1-1] 1.802232 s: SYSTEM: Initializing Links ... DONE !!! [IPU1-1] 1.802293 s: SYSTEM: System IPU1_1 Init Done !!! [DSP1 ] 1.740590 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP1 ] 1.740681 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [DSP1 ] 1.740712 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [DSP1 ] 1.740773 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [DSP1 ] 1.740865 s: *** UTILS: CPU MHz = 20 Mhz *** [DSP1 ] 1.740926 s: SYSTEM: System Common Init in progress !!! [DSP1 ] 1.741170 s: UTILS: CIO: Init Done !!! [DSP1 ] 1.741200 s: SYSTEM: IPC init in progress !!! [DSP1 ] 1.741231 s: SYSTEM: Notify init done !!! [DSP1 ] 1.741322 s: SYSTEM: MsgQ init done !!! [DSP1 ] 1.741353 s: SYSTEM: IPC init DONE !!! [DSP1 ] 1.742176 s: SYSTEM: System Common Init Done !!! [DSP1 ] 1.742207 s: SYSTEM: System DSP Init in progress !!! [DSP1 ] 1.742451 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [DSP1 ] 1.742481 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 1.742542 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519608 B (507 KB) [DSP1 ] 1.742603 s: SYSTEM: Initializing Links !!! [DSP1 ] 1.749893 s: SYSTEM: Initializing Links ... DONE !!! [DSP1 ] 1.749954 s: SYSTEM: System DSP Init Done !!! [DSP1 ] 1.872720 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [DSP1 ] 1.872750 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [DSP2 ] 1.741414 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP2 ] 1.741505 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [DSP2 ] 1.741536 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [DSP2 ] 1.741566 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [DSP2 ] 1.741688 s: *** UTILS: CPU MHz = 20 Mhz *** [DSP2 ] 1.741749 s: SYSTEM: System Common Init in progress !!! [DSP2 ] 1.741993 s: UTILS: CIO: Init Done !!! [DSP2 ] 1.742024 s: SYSTEM: IPC init in progress !!! [DSP2 ] 1.742054 s: SYSTEM: Notify init done !!! [DSP2 ] 1.742115 s: SYSTEM: MsgQ init done !!! [DSP2 ] 1.742146 s: SYSTEM: IPC init DONE !!! [DSP2 ] 1.743030 s: SYSTEM: System Common Init Done !!! [DSP2 ] 1.743061 s: SYSTEM: System DSP Init in progress !!! [DSP2 ] 1.743305 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [DSP2 ] 1.743335 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 1.743396 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519608 B (507 KB) [DSP2 ] 1.743457 s: SYSTEM: Initializing Links !!! [DSP2 ] 1.750777 s: SYSTEM: Initializing Links ... DONE !!! [DSP2 ] 1.750838 s: SYSTEM: System DSP Init Done !!! [DSP2 ] 1.874702 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [DSP2 ] 1.874763 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [EVE1 ] 1.741414 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE1 ] 1.742451 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE1 ] 1.743457 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE1 ] 1.744525 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE1 ] 1.745806 s: SYSTEM: System Common Init in progress !!! [EVE1 ] 1.747483 s: UTILS: CIO: Init Done !!! [EVE1 ] 1.748215 s: SYSTEM: IPC init in progress !!! [EVE1 ] 1.748917 s: SYSTEM: Notify init done !!! [EVE1 ] 1.749954 s: SYSTEM: MsgQ init done !!! [EVE1 ] 1.750594 s: SYSTEM: IPC init DONE !!! [EVE1 ] 1.760721 s: SYSTEM: System Common Init Done !!! [EVE1 ] 1.761392 s: SYSTEM: System EVE Init in progress !!! [EVE1 ] 1.762429 s: UTILS: DMA: HWI Create for INT8 !!! [EVE1 ] 1.763283 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE1 ] 1.764228 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE1 ] 1.766028 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 257432 B (251 KB) [EVE1 ] 1.767644 s: SYSTEM: Initializing Links !!! [EVE1 ] 1.833526 s: SYSTEM: Initializing Links ... DONE !!! [EVE1 ] 1.834228 s: SYSTEM: System EVE Init Done !!! [IPU1-0] 2.890624 s: QSPI Init Started [IPU1-0] 2.890776 s: MID - c8 [IPU1-0] 2.890837 s: DID - 18 [IPU1-0] 2.890898 s: QSPI Init Completed Sucessfully [IPU1-0] 2.890929 s: UTILS: DMM: API NOT supported in TDA3xx !!! [IPU1-0] 2.891020 s: UTILS: DMM: API NOT supported in TDA3xx !!! [IPU1-0] 2.891630 s: [IPU1-0] [IPU1-0] Sample Application Usecases, [IPU1-0] --------------------------- [IPU1-0] 1: Null Source -> Display (Supports only 1920x1080 HDMI display) [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 7.597114 s: [IPU1-0] 7.597175 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [IPU1-0] 7.597480 s: DISPLAYCTRL: DSS_VENC_LCD2/LCD3/HDMI NOT supported on TDA3xx !!! [IPU1-0] 7.597572 s: DISPLAYCTRL: DSS_VID3_PIPE NOT supported on TDA3xx !!! [IPU1-0] 7.597633 s: Assertion @ Line: 301 in displayCtrlLink_drv.c: (Bool)0U : failed !!! [IPU1-0] 7.598060 s: Assertion @ Line: 301 in displayCtrlLink_drv.c: (Bool)0U : failed !!! + +Hi Shuai, DSS HW is different between TDA2xx and TDA3xx. LCD3/VID3 is not supported by TDA3xx DSS HW and hence you are getting this error. I will try this on my end and get back to you. Regards, Rishabh + +Hi Shuai, Sample app is not supported for tda3xx. You can use tda3xx_evm_bios_all configuration and disable the use cases that you don't need. Even for tda2xx only null src use case is supported by sample application. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi : Rishabh so i have to give up sampleapp in tda3evm ? Thanks Shuai + +Hi Shuai, Sample app is just one of the use case taken from apps. If you want a sample app you need to copy the use case to sample_app folder and copy applicable build/config files. Alternatively you can use apps and disable the use cases you don't want. Say you want only one use case then in uc_cfg.mk set that particular use cases as yes and remaining as no. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/10001-15000/789315.txt b/data2/text/range/10001-15000/789315.txt new file mode 100644 index 0000000000000000000000000000000000000000..69b3d1b5822b2b4e127dc1f1bd074d5658de2115 --- /dev/null +++ b/data2/text/range/10001-15000/789315.txt @@ -0,0 +1,28 @@ +Ticket Name: Linux/TDA2EXEVM: Missing pre-built libraries for TIOVX build (HOST Emulation Mode) + +Query Text: +Part Number: TDA2EXEVM Tool/software: Linux My problem is "Where can we get the pre-built libraries for TIOVX build instructions for x86 Linux Platform (HOST Emulation Mode)" ? Hi, I download the installer package of PROCESSOR_SDK_VISION 03_06_00_00 for Linux from this web site: software-dl.ti.com/.../index_FDS.html Follow the user guides "Vision SDK Linux User Guide" and "TIOVX User Guide" to setup the environment on Ubuntu. When I follow the step "Build instructions for x86 Linux Platform (HOST Emulation Mode)" in "TIOVX User Guide", I cannot build the executable conformance test and tutorial files. The linking error messages are : Required system library libvxlib_bamplugin_X86.a Required system library libvxlib_X86.a Required system library libc6xsim_X86_C66.a Required system library libalgframework_X86.a Required system library libdmautils_X86.a In the document "TIOVX User Guide", it says that " This uses pre-built library for VXLIB, DMAUtils, Algframework from "$TIOVX_PATH\lib\PC\X86\LINUX\$PROFILE\*.a" " Actually I only find the pre-built libraries .libc6xsim_x86_64_C66.a .libvxlib_x86_64.a Still missing some pre-built libraries .libvxlib_bamplugin_X86.a .libvxlib_X86.a .libc6xsim_X86_C66.a .libalgframework_X86.a .libdmautils_X86.a .libvxlib_bamplugin_x86_64.a .libalgframework_x86_64.a .libdmautils_x86_64.a Please help me to get/build these libraries, thank you ! + +Responses: +Yes, this was a final packaging error in this release. I am working with team to provide patch to release site, I will keep you posted. + +I have confirmed that the PC libraries in TIOVX that are missing in 3.06 have not changed since 3.05, so in order to get you going quickly, I recommend you download the 3.05 version of the package, and copy the missing libs over to the same location in 3.06. The 32-bit X86 build is needed for BAM to work properly in PC emulation, so this is the version of the libs that are available. Please let me know if this works for you. PROCESSOR_SDK_VISION_03_05_00_00 5 libraries to copy: libvxlib_bamplugin_X86.a libvxlib_X86.a libc6xsim_X86_C66.a libalgframework_X86.a libdmautils_X86.a Regards, Jesse + +Hi Jesse, I follow your recommendation and it does not work. I download the PROCESSOR_SDK_VISION_03_05_00_00 and copy the libraries to the tiovx folder in PROCESSOR_SDK_VISION_03_06_00_00. It shows the error messages when building. Linking /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/debug/vx_conformance_tests_exe /usr/bin/ld: /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/lib/PC/X86/LINUX/debug/libalgframework_X86.a(bam_execute.o): unrecognized relocation (0x2b) in section `.text' /usr/bin/ld: final link failed: Bad value collect2: error: ld returned 1 exit status make: [/home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/debug/vx_conformance_tests_exe] Error 1 (ignored) Linking /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/debug/vx_tutorial_exe /usr/bin/ld: /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/lib/PC/X86/LINUX/debug/libalgframework_X86.a(bam_execute.o): unrecognized relocation (0x2b) in section `.text' /usr/bin/ld: final link failed: Bad value collect2: error: ld returned 1 exit status make: [/home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/debug/vx_tutorial_exe] Error 1 (ignored) Linking /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/vx_conformance_tests_exe /usr/bin/ld: /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/libalgframework_X86.a(bam_execute.o): unrecognized relocation (0x2b) in section `.text' /usr/bin/ld: final link failed: Bad value collect2: error: ld returned 1 exit status make: [/home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/vx_conformance_tests_exe] Error 1 (ignored) Linking /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/vx_tutorial_exe /usr/bin/ld: /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/libalgframework_X86.a(bam_execute.o): unrecognized relocation (0x2b) in section `.text' /usr/bin/ld: final link failed: Bad value collect2: error: ld returned 1 exit status make: [/home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/out/PC/X86/LINUX/release/vx_tutorial_exe] Error 1 (ignored) The version of tiovx in PROCESSOR_SDK_VISION_03_05_00_00 is 01_00_01_00, and the version of tiovx in PROCESSOR_SDK_VISION_03_06_00_00 is 01_03_01_00. Regards, Kenny + +This is working on my side. Does the build work for you in the PROCESSOR_SDK_VISION_03_05_00_00 / 01_00_01_00 version that you downloaded? If not, then I am wondering if there is a difference in the linux environment you are using (gcc version or something) compared to the libraries we built? 1. Can you please check if you see the same problem when building for TIOVX 01_00_01_00 version? 2. Can you send the Ubuntu linux version you are using? Also, what is returned when you run : gcc --version Thanks, Jesse + +Hi Jesse, I download the TIOVX source code from https://git.ti.com/processor-sdk/tiovx/trees/master (verison 01_00_00_00) , copy the libraries to the same location in PROCESSOR_SDK_VISION_03_06. The build process completed without error message and generated 2 file vx_conformance_tests_exe and vx_tutorial_exe. It will cause a segmentation fault when running vx_conformance_tests_exe or vx_tutorial_exe. There are the gdb back trace information: $ gdb vx_conformance_tests_exe (gdb) run (gdb) backtrace #0 0xf7eb4ecd in ?? () from /lib/i386-linux-gnu/libc.so.6 #1 0x0830312e in BAM_DMA_AUTOINCREMENT_setMemRecFunc (memRecInternal=0xf7d81f94, memRecInputDataBlock=0xf7d81fdc, memRecOutputDataBlock=0xf7d81fb4, numRecInternal=0 '\000', numRecInputDataBlock=0 '\000', numRecOutputDataBlock=1 '\001', edmaContext=0xf7400bf0, edmaArgs=0xf7d821bc) at /adasuser/kedarc/ti_components/algorithms/dsp_apps/algframework/src/bam_dma_nodes/bam_dma_autoincrement_node.c:304 #2 0x08300454 in BAM_finaliseGraph (graphDef=0xf74004d0, nodeList=0xf7d8218c, intMemParams=0xf7d83054) at /adasuser/kedarc/ti_components/algorithms/dsp_apps/algframework/src/bam/bam_construct_int.c:1834 #3 0x082ff91a in BAM_setMemRec (graphHandle=0xf74004d0, memTab=0xf7402be8, nodeList=0xf7d8218c, intMemParams=0xf7d83054) at /adasuser/kedarc/ti_components/algorithms/dsp_apps/algframework/src/bam/bam_construct_int.c:1474 #4 0x082fdae2 in BAM_updateNodes (graphHandle=0xf74004d0, createParams=0xf7d82ff0, callSetMemRec=1) at /adasuser/kedarc/ti_components/algorithms/dsp_apps/algframework/src/bam/bam_construct_int.c:525 #5 0x082fc438 in BAM_createGraph (createParams=0xf7d82ff0, pGraphHandle=0xf74004a0) at /adasuser/kedarc/ti_components/algorithms/dsp_apps/algframework/src/bam/bam_construct.c:208 #6 0x0829a869 in tivxBamCreateHandleSingleNode (kernel_id=BAM_KERNELID_VXLIB_BOX_3X3_I8U_O8U, buf_params=0xf7d83168, kernel_details=0xf7d830dc, graph_handle=0xf7400468) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/kernels/common/target/tivx_bam_kernel_wrapper.c:1124 #7 0x0828c52f in tivxKernelBoxCreate (kernel=0x8534340 , obj_desc=0xf7d83240, num_params=2, priv_arg=0x0) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/kernels/openvx-core/c66x/bam/vx_bam_box3x3_target.c:203 #8 0x0826ec0d in tivxTargetKernelCreate (target_kernel_instance=0x8534340 , obj_desc=0xf7d83240, num_params=2) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/source/framework/vx_target_kernel.c:288 #9 0x0826dacf in tivxTargetNodeDescNodeCreate (node_obj_desc=0x85ecaa0 ) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/source/framework/vx_target.c:590 #10 0x0826e04f in tivxTargetCmdDescHandler (cmd_obj_desc=0x85ec4a0 ) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/source/framework/vx_target.c:788 #11 0x0826e282 in tivxTargetTaskMain (app_var=0x852a4a0 ) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/source/framework/vx_target.c:895 #12 0x0827426c in tivxTaskMain (arg=0x852a4a4 ) at /home/kenny/TI_DEV/ti_components/open_compute/tiovx_01_03_01_00/source/platform/pc/linux/../../os/linux/tivx_task.c:106 #13 0xf7f3df72 in start_thread () from /lib/i386-linux-gnu/libpthread.so.0 #14 0xf7e7443e in clone () from /lib/i386-linux-gnu/libc.so.6 Regards, Kenny + +Hi Jesse, No, I just copy the libraries from PROCESSOR_SDK_VISION_03_05_00_00 to PROCESSOR_SDK_VISION_03_06_00_00 without doing any build process in PROCESSOR_SDK_VISION_03_05_00_00. I will verify the process in PROCESSOR_SDK_VISION_03_05_00_00. My ubuntu linux version is 14.04 and the result of gcc --version is gcc (Ubuntu 5.5.0-12ubuntu1~14.04) 5.5.0 20171010 Copyright (C) 2015 Free Software Foundation, Inc. Regards, Kenny + +Hi Jesse, After finished the software requirement, installation and setup for PROCESSOR_SDK_VISION_03_05_00_00, I checked the build processes in the PROCESSOR_SDK_VISION_03_05_00_00 and tiovx_01_00_01_00. It shows the same error messages when building tiovx. Linking /home/kenny/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/open_compute/tiovx_01_00_01_00/bin/PC/X86/LINUX/debug/vx_conformance_tests_exe /usr/bin/ld: /home/kenny/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/open_compute/tiovx_01_00_01_00/lib/PC/X86/LINUX/debug/libalgframework_X86.a(bam_execute.o): unrecognized relocation (0x2b) in section `.text' /usr/bin/ld: final link failed: Bad value Regards, Kenny + +Kenny, I tried same procedure on Ubuntu 14.04 virtual machine just now, and I am able to reproduce this issue. It seems the libs were created using Ubuntu 16.04, and we have been testing using 16.04 and 18.04, and it works for these more recent builds without issue. Since 14.04 LTS support is expired, we don't support this distribution version and I suggest moving to a more recent distribution soon. In the mean time, I have recompiled the 2 libraries which were giving issues compiling on 14.04 on my virtual machine, and attached them here. Please try these and confirm if the problem goes away. lib.tar.gz Regards, Jesse + +Hi Jesse, Thanks for your help ! The building issue was be solved after using these attached libraries. Follow the Vision SDK Linux User Guide, I used the Ubuntu 14.04LTS. Which version of Ubuntu do you recommend as a development environment? Regards, Kenny + +Hi Kenny, as mentioned in the UserGuide it was tested with Ubuntu 14.04, you should not have problems with this version (if you use virtual machine just make sure it is 64-bit version). Regards, Yordan + +Hi Kenny, You are correct, the user guide says 14.04. However, as we move forward with future releases, we plan to migrate to 18.04 since the 5 year support from Ubuntu 14.04 is expiring and most users will no longer be using 14.04 because of that. Even now, most of our developers are using 18.04. You may want to migrate when it is convenient for you. Jesse + diff --git a/data2/text/range/10001-15000/800532.txt b/data2/text/range/10001-15000/800532.txt new file mode 100644 index 0000000000000000000000000000000000000000..d5bb9a77ae7bcab5f9b3a58ec94a2d55efe85b52 --- /dev/null +++ b/data2/text/range/10001-15000/800532.txt @@ -0,0 +1,92 @@ +Ticket Name: RTOS/TDA2SX: Network speed problem with 1000Mb/s connection + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: X5777ATXGABC Tool/software: TI-RTOS Dear TI, We have a problem with network speed. We are using TDA2x EVM board and VISION_SDK_02_12_01_00 (RTOS, NDK_PROC_TO_USE=a15_0). When sending raw or encoded frames or just any data from the board to PC (using static IP and directly connected, NDK: Link Status: 1000Mb/s Full Duplex on PHY 7) bandwidth is about 21 Mbit/s. On PC side we are receiving frames with network_rx tool and our custom application. We have tried with Linux Ubuntu 16.04 18.04 and windows 10 but bandwidth is 21 Mbit/s. We have measured bandwidth using usecase and a simple module, which sends test data. When sending data from PC to board using network_tx tool bandwith is 110 Mbit/s. When sending data from one board to another board bandwidth is 220 Mbit/s. If we connect PC and the board with 100Mb/s Full Duplex then bandwith is about 90 Mbit/s. Do you have any suggestions, what can be an issue here with 1000Mb/s connection? Maybe some network configuration on PC? Best regards, Marko. + +Responses: +Hi Marko, The VISION_SDK_02_12_01_00 version is quite old. The latest one is 03_06_00_00. Please try your use case on that and see if you're still able to see a bandwidth cap. This probably isn't the root cause, but you could try it. When running you application board to PC, did you check the network traffic using Task Manager or System Monitor? Regards, Anand + +Hi Anand, We will try with the latest version of vision SDK (03_06_00_00) and we will reply you. We use Wireshark, Task Manager, System Monitor and our custom application for check network traffic, bandwidth is about 21 Mbit/s and there is no other network traffic. PC is directly connected to the board. Regards, Marko. + +Hi Anand, We tested network bandwidth on the latest vision SDK version (03_06_00_00) and the results are the same. Do you have any more suggestions? Regards, Marko. + +Hi Marko, You had mentioned that there isn't much deterioration in the network bandwidth when you use 100 Mbps, how did you switch to 100 Mbps mode? Did you change the macInitCfg in the ndk_nsp_hooks.c file? Also, I am not aware if there are any specific configuration to be done in the PC to increase bandwidth. If the PC supports Gigabit ethernet, it should work out of the box. Anyways, I'll try to set the board up and run a simple app and see if I am seeing a drop this high in the bandwidth. If not, we could conclude it's something to do with the app. Regards, Anand + +Hi Anand, We switched to 100 Mbps speed on PC(receiver) side with the following command: "ethtool -s eth0 speed 100 duplex full". We did not change any of the mentioned files. Regards, Marko. + +Hi Marko, Ok, so I think that the EVM is configured is set for inband detection. So when you set 100 Mbps on your PC side, EVM detects it and does the config appropriately. Can you do this check - -> Once you get the IP Address displayed, confirm that your ping from the PC works -> Go to ti_components/networking/ndk_2_24_02_31/packages/ti/ndk/winapps -> You should binaries send.exe/send.out there. Run them like "./send.out " -> After this open system monitor/task manager to see what is the bandwidth being used Let me know what BW could you observe in this case:) Regards, Anand + +Hi Anand, We checked BW and these are our results: 1. When we run send.exe on PC we get BW around 330 Mbps: 2. When we run recv.exe on PC we get BW around 7.8 Mbps: Regards, Marko. + +Hi Marko, I think that then the delay might be something related to the application. Because in the best case we get around 460 Mbps, considering all the wire, sw delays and the like. Send showing 330 Mbps means that there is no config error as such from the sdk or driver point of view. Is there any other possible delay in the application? Regards, Anand + +Hi Anand, Can you please tell us what bandwidth you get when you send data from a board to the PC? In our test application, which sends data from a board to the PC, we do not have any delays. Just the network write function is executing in the while loop. Also, there are no delays in our receiving test application. If it will be easier for you, we can send you our test application source code, but we will need your email address. Regards, Marko. + +Hi Marko, I get around 330 Mbps on send. Since you mentioned that in 100 Mbps mode you are getting close to 90 Mbps BW, but BW drops drastically when you switch to 1000 Mbps. So the problem is only with 1000 Mbps mode right? Then I don't think it might be an application issue. As you said if you're only doing network_write, then it shouldn't matter. This is rather strange. BTW one thing, I am not sure which version of the TDA2XX are you using. If I remember right, some of them don't support 1000 Mbps. I'll try doing network_write in a loop like you said and see if I face a similar issue. Regards, Anand + +Hi Anand, Yes, the problem is only with 1000 Mbps mode. The board that we are using is VAYU EVM XC5777X CPU BOARD (ASSY 516580 REV). On Chip: -------------------------- OMAP X5777ATXGABC 54ZCMS9 842 ABC G1 -------------------------- Besides this board, we are using ALPHA AMV board which is our product. It is also using tda2XX chips. On RTOS behavior of the board is the same, bandwidth drops when we swtich from 100Mbps to 1Gbps Ethernet. When using Linux everything seems to be working, bandwidth is ~ 990 Mbps. Regards, Marko. + +Hi Marko, Ok I will check with the linux team to see if they are configuring the IODelays any differently. Since it works on VSDK linux for you, I believe it has got nothing to do with your PC setup. Regards, Anand + +Marko, My best guess is that since you have a different PHY on board, there is some fishy going on with the IO Delay configurations. In the ndk_nsp_hooks.c file inside utils_common/src/ndk folder, there is a function called NDK_NSP_init(). Please see to it that the delay configurations take place properly and you macConnectionType is rightly set up as MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL or MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND in case your on-board PHY suppports in band detection. Best Regards, Anand + +Hi Anand, We checked configurarion for macConnectionType and it is rightly set up as MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL. Can you send us your Appimage and MLO with simple module for testing bandwidth? Also we can send you our Appimage and MLO to try it with your board. Best Regards, Marko. + +Marko, In case of Linux, the stack, drivers etc for networking are different. In the case of RTOS, we have NDK to provide the stack and NSP as device driver. This might explain the BW difference you see in both these cases. But still, I don't quite understand why the speeds would go so low. Just for a final clarification, once the SDK boots up, and you're able to ping to the IP, can you go and read the register address 0x48485288 and tell me the value? Regards, Anand + +Hi Anand, We read the register address 0x48485288 with HW_RD_REG32(). Value of this register is 13. Best Regards, Marko. + +Marko, This is infact the expected value. I agree, there is a little bit of throughput reduction in RTOS because of usage of a different stack etc. But in any case it should not be as low as it is in your case. Do you see the same trend when NDK runs on M4 also? Regards, Anand + +Hi Marko, Did you get a chance to try it on M4 also? Regards, Anand + +Hi Anand, Sorry for the late. We are out of office this week, then we will try on M4 next week and send you our results. Best regards, Marko. + +Hi Anand, We set network to M4 ( NDK_PROC_TO_USE=ipu1_0, Link Status: 1000Mb/s Full Duplex). We have bandwith about 45 Mbit/s (We Measured bandwith with system monitor and with our app). Best Regards, Marko. + +Hi Marko, That is actually lesser than what you should get ideally. Are you using any adapters of some sort in between? Regards, Anand + +Hi Anand, We do not use any adapter between board and PC. Board and PC are connected directly. Best Regards, Marko. + +Hi Marko, It is quite unfortunate that this issue is getting dragged, but the conclusions we see keep contradicting. You see almost 45 Mbps when NDK runs on M4, but nearly half of that when your run NDK in A15? I am not sure why that would happen. Let's try to look at it in a different perspective. I think we have a lot of variables here. What is the exact usecase you're trying to accomplish here? Regards, Anand + +Hi Anand, With this exact usecase, we want to stream from board to PC via Ethernet with 300 Mbps. Best Regards, Marko. + +Marko, In that case I suspect it has got something to do with the board. Because I'm not observing a speed deterioration in A15, that too lower than M4! I can try using your AppImage and MLO at my side to have complete closure. Also send in any changes you have made in ndk_nsp_hooks.c file, if any. Regards, Anand + +Hi Anand, How do you want us to send you our Appimage and MLO? Do you want them on email or private message on TI forum? Best Regards, Marko. + +Hi Marko, Are you not able to attach the files here? Also mention which app of yours are you trying to run. Regards, Anand + +Hi Anand, We want you to check bandwidth in two cases. First case is AppImage_MLO folder(Read note in folder). We sent you our AppImage and MLO and our test app. Second case is source folder(Read note in folder). We want that you add source files in your Vision SDK and build. When you build the test modules, test them the same way as previous case. https://dl.rt-rk.com/?t=f3c71be0c703aec79cd2029ff00fa4de Best Regards, Marko. + +Marko, Thank you for the files. I'll test this and get back to you soon. Regards, Anand + +Hi Marko, I was having some setup issues at my place (I don't currently work on this SoC family regularly). I will be able to test and tell you what's probably going wrong by end of this week. Regards, Anand + +Hi Marko, I don't observe the deterioration worsened for A15, compared to M4, so maybe re-check the setup once more to confirm on that. Anyways I see similar drops in BW. Network API uses TCP/IP. Have you tried UDP? I understand your application is streaming. Regards, Anand + +Hi Anand, Do you have bandwidth drops for two cases (with our appimage and MLO and with yours appimage and MLO i.e. when you build send task module)? We have some problems when testing with UDP but we hope to resolve this as soon as posible. Best Regards, Marko. + +Hi Marko, Both the drops are similar. I'll debug at my end and get back to you. Regards, Anand + +Hi Anand, We can not connect board and PC via UDP. But, 3 month ago we did it and we think that we had bandwidth drops. Best Regards, Marko. + +Hi Marko, I'm still debugging this issue. Let me know the priority on this. Do you have another board to test on? Regards, Anand + +Hi Anand, Priority on this is not high for now, because we moved to the another project. We tested this on multiple alpha boards (TDA2X) and on TDA2x EVM. Best Regards, Marko. + +Hi Marko, Thanks for the reply. I can continue the debug in parallel with the other things on my plate. Regards, Anand + +Hi Marko, I have not found any leads on this. Mostly it is a board issue. I will debug further for a week, and if nothing turns up, let's close this thread as issue is reprioritized. You can always open a new thread when it re surfaces. Regards, Anand + +Hi Marko, One factor which might improve the bandwidth is to turn off the dual mac mode and try this again. Dual mac mode did introduce some additional packet delays due to the switching logic. This involves changes in both SDK and the NSP, so I would suggest to go to VSDK 3.5, which doesn't have dual mac mode enabled. I would also suggest to do this change when the issue is reprioritized. You can open a new thread then to continue the discussion. We can close this thread for the time being. Regards, Anand + +Hi Anand, Thank you for the response. We will try this when the issue is reprioritized. Best Regards, Marko. + +Hi Marko, Can we close this thread in that case? + +Hi Anand, Yes, you can close this thread. We will open new thread if we have problem when dual mac is enabled. Best Regards, Marko. + +Hi Marko, Thanks for your reply. Regards, Anand + diff --git a/data2/text/range/10001-15000/813887.txt b/data2/text/range/10001-15000/813887.txt new file mode 100644 index 0000000000000000000000000000000000000000..0eb266bbd83228fbb52591fe0beba3882560ed4f --- /dev/null +++ b/data2/text/range/10001-15000/813887.txt @@ -0,0 +1,38 @@ +Ticket Name: Linux/TDA2EXEVM: error: errors encountered during linking; + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: SYSBIOS, TDA2, PGA460 Tool/software: Linux Hi there, I am using VSDK_3_07 version, while building Vision SDK frameworks its throwing the below mentioned error., ---------------------------------------------------------------------------------------------------------------------------------------------------- subsequent release. The behavior is enabled by default. asme66 /Source_VSDK_3_07/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /Source_VSDK_3_07/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /Source_VSDK_3_07/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /Source_VSDK_3_07/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... gmake[1]: Leaving directory `/Source_VSDK_3_07/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' warning: xdc.cfg.Program: "/Source_VSDK_3_07/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. Build of libraries done. # Configuro done! # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: src/main_common_c6xdsp1.c # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: /Source_VSDK_3_07/vision_sdk/apps/src/common/main_app/tda2xx/dsp1/src/main_c6xdsp1.c # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: /Source_VSDK_3_07/vision_sdk/apps/src/common/app_init/app_init_dsp.c # Compiling generated MAIN_APP_c6xdsp1_pe66.oe66 # Linking into /Source_VSDK_3_07/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... undefined first referenced symbol in file --------- ---------------- calmatin3d /Source_VSDK_3_07/vision_sdk/apps/src/rtos/alg_plugins/structurefrommotion/lib/structurefrommotion_c66xdsp_release.ae66 error: unresolved symbols remain error: errors encountered during linking; "/Source_VSDK_3_07/vision_sdk/binaries/apps/tda2 xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 " not built make[7]: *** [/Source_VSDK_3_07/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 make[6]: *** [c66xdsp_1] Error 2 make[5]: *** [apps_dsp1] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps] Error 2 make[2]: *** [apps_exe] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 ________________________________________________________________________________________________ Any help would be appreciated. Regards Balaji T + +Responses: +Hi Balaji, Are you including/linking surround video libraries? Have you changed anything in the released binaries? Rgds, Brijesh + +Hi Brijesh, I just removed the "binaries" folder. I thought that "binaries" folder will created while doing make -s -j depend and make -s -j. regards Balaji T + +I am not trying to include any libraries. Rgds, Balaji T + +Hi Balaji, Can you give a try without "-j". Regards, Rishabh + +Rishabh, I have tried giving without "-j", still its throwing the same error in "make -s" step. regards Balaji T + +Balaji, CalMatin3D is part of the srv libraries, so you need to include it on DSP.. Rgds, Brijesh + +Brijesh, Will you please suggest me ideas to resolve this error, Rgds, Balaji T + +Hi Balaji, Have you made any change on top of VSDK release? Can you run make showconfig and share the result. Regards, Rishabh + +Balaji, This variable is part of the auto calibration library on DSP, please check if this library is included in your build for building DSP binary.. Rgds, Brijesh + +Brijesh, Here is the result of "make showconfig" /Source_VSDK_3_07/vision_sdk/build$ make showconfig make -C /Source_VSDK_3_07/vision_sdk/apps/configs -f build_makeconfig.mk showconfig make[1]: Entering directory `/Source_VSDK_3_07/vision_sdk/apps/configs' # # Build Config is [ tda2xx_evm_linux_all ] # Build Config file is @ /Source_VSDK_3_07/vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk # Build Config .h file is @ /Source_VSDK_3_07/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all/system_cfg.h # Build CPUs is @ ipu1_0 ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-evm # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=/Source_VSDK_3_07/vision_sdk/../ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # AUTOSAR_APP=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=no # RADAR_STUDIO=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=fs_its_defconfig # DEFAULT_DTB=dra7-evm-infoadas.dtb # CMEM_INCLUDE=no # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=yes # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_sparseopticalflow ALG_structurefrommotion # # Use-cases included in build, # UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_disp_dist_src_display UC_vip_single_cam_sgx_display # make -s -fbuild_makeconfig.mk check_cpu_include make[2]: Entering directory `/Source_VSDK_3_07/vision_sdk/apps/configs' # # CPUs that are NOT required but included in config [ tda2xx_evm_linux_all ], # # # CPUs that are required but not included in config [ tda2xx_evm_linux_all ], # # # Edit /Source_VSDK_3_07/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk to include or exclude CPUs in an application # make[2]: Leaving directory `/Source_VSDK_3_07/vision_sdk/apps/configs' make[1]: Leaving directory `/Source_VSDK_3_07/vision_sdk/apps/configs' Rgds, Balaji T + +Balaji, Have you built linux before running these build commands? Regards, Rishabh + +Rishabh, yes, both "make linux_all" and "make linux_install" are successfull. Rgds Balaji T + +Hi Balaji, which platform and use case you are building? It seems you have included structure for motion algo, but surround view is not included.. Rgds, Brijesh + +I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). + +Hi Brijesh, I have disabled the surround view algorithm, and now i can create use-case of my own. I have only one doubt, is that necessary that we have to copy ".xem4" file every time apps.out is created.? Will you please tell me, how they are related to each other..? Was that necessary that each time, i made a little change in use-case need to run command "make -s -j depend" ? Rgds Balaji T + +Hi Balaji, .out is Linux executable files, whereas .xem4 are M4 executables. they are different. Rgds, Brijesh + diff --git a/data2/text/range/10001-15000/820507.txt b/data2/text/range/10001-15000/820507.txt new file mode 100644 index 0000000000000000000000000000000000000000..3907f8aa475d146dc40a2e60dc557072be230214 --- /dev/null +++ b/data2/text/range/10001-15000/820507.txt @@ -0,0 +1,79 @@ +Ticket Name: TDA2X - TIDL model EVE execution + +Query Text: +Hi everyone, I am working with Pedestrian detection model trained in Caffe framework. I made conversion to TIDL format and results for sample image after conversion are as expected. Bounding box is located where object really is. When running this model on DSP core within TIDL usecase, using same input image, results are identical to those during the conversion. However, when running it on EVE core, I am getting correct format on the output (confidence value, label, coordinates are valid values) but bounding box occupies majority of image and results are nowhere near the correct ones. To test further, I converted this model for running on EVE and DSP combined (layersGroupId param). As a comparison I used other object detection model, provided by TI as an example. This model worked well when running with TIDL OD usecase which feature one EVE and one DSP core. But when I set my pedestrian detection model, with this usecase it gave results like ones when it was run on EVE core previously. Does anybody know, why my model is not working on EVE as it is expected? P.S. tidl_import_zf_od.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 50 + +numParamBits = 8 +inElementType = 0 +inQuantFactor = 32512 + +inputNetFile = "../../test/testvecs/config/tidl_models/zf/deploy.prototxt" +inputParamsFile = "../../test/testvecs/config/tidl_models/zf/model.caffemodel" +outputNetFile = "../../test/testvecs/output/zf/zf_net_od.bin" +outputParamsFile = "../../test/testvecs/output/zf/zf_param_od.bin" + +preProcType = 0 +rawSampleInData = 1 +sampleInData = "../../test/testvecs/input/zf/zf_110.y" +tidlStatsTool = "../quantStatsTool/eve_test_dl_algo.out.exe" + +layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 + Import config file is in attachment. + +Responses: +Hi, Mostly, if import tool conversion output is correct then it should run in the TIDL use case correctly. BTW, how did you check that TIDL format conversion output is correct? Thanks, Praveen + +Hi Praveen, I was using default applicaton for checking output by setting parameter tidlStatsTool = "../quantStatsTool/eve_test_dl_algo.out.exe" inside config import file. Regards, Sasa + +Hi Sasa, I mean to say you can use import tool output it self to check the detections in the output, for that please use markBox.c file from below e2e thread to visualize the import tool output and if you get correct detections in the output then you can use these generated bin files on VSDK usecase. Thanks, Praveen + +Hi Praveen, Thanks for this. However, I was able to "read" output file and I recognized float values in it. As I have application which uses same model but different format, I know which values I should get. After comparison of results from TIDL converter and reference application I concluded that conversion is OK. Also, it is running as it should on DSP core. I just wonder is there anything specific which could make EVE core working in wrong way for this specific model? Regards, Sasa + +Hi Sasa, I would suggest to run the detection output layer always on the DSP core and rest of the layers on EVE as this detection output layer uses floating point operations and so not optimized on EVE. So, always better to run this layer on DSP. Please check this configuration. Thanks, Praveen + +Hi Praveen, I configured conversion as you mentioned. You can check my config import file I sent in initial question. To make sure that I did it correctly, I printed out layersGroupId parameter for every layer after network has been populated. I can see that only detection output layer has layersGroupId value of 2, which means it run on DSP core. Now when you mentioned floating point operations, since this model works well when it is run on DSP core only, can it be that input model (caffe format) is using floating point operations for all layers? Regards, Sasa + +>> can it be that input model (caffe format) is using floating point operations for all layers? No, import tool converts floating model to fixed point model for inference. + +Before I tested my model, I used OD model which is provided by TI to by used with original TIDL OD usecase (4 EVEs + DSP). That model worked with my usecase (1 EVE + DSP). I gave me correct coordinates of object on input image. With this I concluded that I can believe that my usecase is working as expected. Based on this fact and the fact that my model is working well when run on DSP core only, my suspicion is that problem could be somewhere in conversion process. Can you give me some explanation on parameter inQuantFactor? How its value influence convesion process? I set it to 32512 as product of 256*127. I didn't found much in documentation about this parameter so I don't know if this value is propper one to use. Regards, Sasa + +Hi Sasa, Please search for inQuantFactor parameter in e2e, you will get some thread which explain this parameter. Thanks, Praveen + +Hi Praveen, I searched about inQuantFactor. As far as I can see, this parameter is used when it is needed to transform input image pixel values from unsigned int values to float values (e.g. [0-255] to [0-1] values). Am I right? If so, I don't fully understand why those values are so high (32512, 65280)? I didn't find answer to this on forum threads? Maybe I went a bit of topic of this thread with those questions, I just want to find cause of problem and this parameter is new to me in conversion process. Because of correct behavior of TI OD model with my usecase I am still focusing on conversion process of my pedestrian detection model as potential problem. However, can it be that problem is potentially somewhere within usecase itself. Input image dimensions for my model are 3x300x300. Regards, Sasa + +Hi Sasa, Yes, you are right, and the high values are because of scale it self is in Q8 format, so because of this the scale factor needed to be multiplied by 255. Regarding the actual problem, what is the behavior if you don't specify this inQuantFactor in the import config file. Thanks, Praveen + +Hi Praveen, thank you for your answer. Regarding running without inQuantFactor: For model running on EVE+DSP - No detection in conversion process test, similar results when running on SoC (detected large bounding box covering complete image) For model running on DSP - Large bounding box when running test in conversion process or no detected objects (for different images), on SoC results OK (same as before) Regards, Sasa + +Hi Sasa, Can you please confirm that import tool output it self had no detection of boxes, as the import tool runs on the PC there is no significance of EVE or DSP cores here. So, first are you able to see proper detections in the import tool output ? Thanks, Praveen + +Hi Praveen, maybe I choose words badly when I wrote EVE+DSP in previous post. I just wanted to emphasize that config file is little bit different as in case when it had to be run on EVE + DSP there is additional parameter layersGroupId. But, here I hope to be more clear on this. I will concentrate on case without layersGroupId parameter. In case when I have inQuantFactor set to 32512. Detection on import tool output is: confidence: 0x3F432E00 - 0.762 x_min: 0x3EA7A6FD - 0.327 y_min: 0x3EAA0F6F - 0.332 x_max: 0x3EE2C46F - 0.442 y_max: 0x3F26130C - 0.648 When those values are converted in coordinates, approximately it is: (98, 100) and (132, 194) as top-left and bottom-right corner and it is where the object is on image. After running this model on DSP core coordinates of object are (98, 95) and (134, 192), so it similar to those during conversion process. When running on EVE core this model coordinates are (33, 14) and (254, 286). But when inQuantFactor is excluded from config file, results are different. First of all, two objects appear to be detected instead of one. Given values are: confidence: 0x3F000000 - 0.5 x_min: 0x3D84D372 - 0.065 y_min: 0x3F0C010E - 0.547 x_max: 0x3E70C97B - 0.235 y_max: 0x3F939913 - 1.153 and confidence: 0x3F000000 x_min: 0xBDC7A778 - -0.097 y_min: 0x3F340233 - 0.703 x_max: 0x3ECB8378 - 0.397 y_max: 0x3F7F3101 - 0.997 Clearly, there is value higher than 1.0 and negative value so these results are not valid. Still, I tried to run this model on DSP and it gives me same results as in conversion process. Based on this, configuration with inQuantFactor work properly and when running model on DSP it works properly, also. However, something is not OK when running this model on EVE core. Also to mention, I run cifar10 model with same usecase, with DSP and with EVE and it gave correct output and because of that I excluded possibility there is something wrong with setting EVE parameters inside usecase. Hope it's more clear now what I was trying to describe in previous post. Regards, Sasa + +Hi Sasa, Thanks for the detailed explanation, could please clarify two more questions 1. When you say running EVE core means, are you running the TIDL OD usecase with layerGropupID as 1 for all the layers ? If not how ? 2. When you say running DSP core means, are you running the TIDL OD usecase with layerGropupID as 2 for all the layers ? This is needs some changes to the usecase. If not how? Thanks, Praveen + +Hi Praveen, No. When I say running EVE core, I am using usecase similar to TIDL usecese used for image segmentation. Difference between my and original TIDL usecase is in a way how buffer is read in dumpOutCb function. Instead of reading width*height bytes as in original TIDL usecase, I have predefinded number of bytes expected for this model to be output of TIDL algorithm link and I just skip the padding in the buffer and read number of bytes I need. That usecase have an option whether to run TIDL on EVE or DSP, so when I say running on EVE or running on DSP it's the same usecase. I need to mention that when I converted this model, I didn't use layersGroupID parameter in config file, so all layers are executed on same core. However, when I saw that EVE core is not giving correct result and because this is OD model, I decided to create new TIDL OD usecase which utilize one EVE and one DSP core. I am using single image as input for the model, so I don't need 4 EVE cores for it. To make sure that usecase work as expected, I used TI's OD model and used single image as input and object was detected as expected (with correct coordinates of object). I used this as confirmation that my TIDL OD usecase is working as expected. Now, I added layersGroupId into my config file and converted model again to suit execution with TIDL OD usecese. I put 0 value for Data layers, value 1 for all other layers, except for Detection output layer which have value of 2. I checked those values of layerGroupId parameter for every layer once I run it on SoC and they appear correct, so only Detection output layer is executed on DSP core. This execution behaves similar to one when running TIDL usecase on EVE core only. In previous post I mentioned that for every image when running TIDL usecase, I got coordinates (33, 14) and (254, 286). For TIDL OD usecase coordinates are, for every image same also, (32, 13) and (255,286). Very similar. As far as I can see, only difference between TIDL usecase running with EVE and TIDL OD usecase is that single Detection output layer is not run on EVE in case of TIDL OD. So, similarity between results brought me to conclusion that behavior of EVE core is same in both cases and that execution on EVE core is causing troubles. When all of this is taken into account, can it be that problem is somewhere in model itself? I don't know exactly how EVE core is working, but can it be that model is not suitable for use on EVE core? Regards, Sasa + +Hi Sasa, I am not sure about the usecase that you created, so let's check this issue in the original TIDL usecase. 1. Please import your model using "inQuantFactor set to 32512." and layerGroupID is 2 for last detection output layer (on DSP) and layerGroupID is 1 for rest of all the layers(on EVE) to get the net and param bin files. Use these generated net and param bin files to run TIDL OD usecase and let us know the results. 2. Also, just to confirm your findings about DSP core is working fine with your model, you can modify the TIDL use case to run using only DSP core(layersGroupID = 2 for all layers) as shown below.. UseCase: chains_capture_tidl_OD Capture -> VPE -> Dup Dup -> Merge Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Dsp1 (DSP1) Alg_tidl_Dsp1 (DSP1) -> Merge Merge -> Sync -> Alg_ObjectDraw -> Display GrpxSrc -> Display_Grpx and, In AlgorithmLink_tidlProcess(), After pAlgObj->handle->ivision->algProcess() call, since DSP is expecting SYSTEM_BUFFER_TYPE_METADATA buffer type, so change the if condition check to SYSTEM_BUFFER_TYPE_VIDEO_FRAME in pAlgObj->numOutputQueues loop after algProcess(). For getting display we have to change sync delta and sync threshold to higher value Pease try this and let us know the results. Thanks, Praveen + +Hi Praveen, 1. I did running as you mentioned regarding layersGroupId and results are like I wrote it in one of previous posts - (32, 13) and (255,286). Expected coordinates are around (98, 95) and (134, 192). 2. I tested with layersGroupId = 2 for all layers and I can confirm that results are the same as with usecase I created before, so I can confirm that my usecase is working OK. Regards, Sasa + +Hi Sasa, Ok Thanks for the conformation. For experiment 1 above, could you please set below quant parameters and check the TIDL OD usecase ? quantHistoryParam1 = 0; //20; quantHistoryParam2 = 0; //5; quantMargin = 0; If this also does not help is it possible to share your model and prototxt with us for debugging the issue at our end? Thanks, Praveen + +Hi Praveen, I tried with changes you suggested but with no success. Can you share some email address so I can send model to you? Regards, Sasa + +Hi Sasa, Please share your email address so that I can ping you my email address offline. Thanks, Praveen + +Hi Praveen, my email address is Sasa.Mihajlica@rt-rk.com Regards, Sasa + +Hi Sasa, I have sent email for you for sharing model. I am closing this thread for now and will follow up further on this in the mail. Thanks, Praveen + diff --git a/data2/text/range/10001-15000/840680.txt b/data2/text/range/10001-15000/840680.txt new file mode 100644 index 0000000000000000000000000000000000000000..a2fa898a6881922335b9a3b52c5287e70ccd77b2 --- /dev/null +++ b/data2/text/range/10001-15000/840680.txt @@ -0,0 +1,150 @@ +Ticket Name: TDA4VMXEVM: app_single_cam issue: only 1st raw capture is working + +Query Text: +Part Number: TDA4VMXEVM Hi, I'm evaluating On Semi AR0323 sensor in TDA4EVM + custom AR0323 sensor board with PSDKRA v0.91. The camera app is app_single_cam, and iss_sensor_ar0233.c is modified for AR0323 (configuration and serdes) power_on, reset, i2c, streaming on are ok, sensor mipi signal is ok. But only 1st raw capture is ok by save_debug_images() in app_single_cam. There're no further operations and display output. Please refer to the following log. tivx_set_debug_zone(VX_ZONE_API/ VX_ZONE_INFO) was added to get tiovx log Regards, Kim HJ root@j7-evm:~/nfs/opt/vision_apps# ./vx_app_single_cam.out +APP: Init ... !!! +APP_LOG: Mapping 0xb8000000 ... +APP_LOG: Mapped 0xb8000000 -> 0xffff9d780000 of size 262144 bytes +MEM: Init ... !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +APP_LOG: Mapping 0xb8040000 ... +APP_LOG: Mapped 0xb8040000 -> 0xffff777c0000 of size 33292288 bytes +APP_LOG: Mapping 0x30e00000 ... +APP_LOG: Mapped 0x30e00000 -> 0xffff9dc90000 of size 3072 bytes +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! +APP: Init ... Done !!! + 0.000144 s: VX_ZONE_INIT:Enabled + 0.000153 s: VX_ZONE_ERROR:Enabled + 0.000157 s: VX_ZONE_WARNING:Enabled + 0.000161 s: VX_ZONE_API:Enabled + 0.000165 s: VX_ZONE_INFO:Enabled + 0.000206 s: VX_ZONE_INFO:### kimhj source_platform_psdk_j7_common_tivx_init.c + 0.000485 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! + 0.000669 s: VX_ZONE_INIT:[tivxHostInit:35] Initialization Done for HOST !!! + 0.001239 s: ISS: Enumerating sensors ... !!! + 0.004304 s: ISS: Enumerating sensors ... found 0 : IMX390-UB953_D3 + 0.004327 s: ISS: Enumerating sensors ... found 1 : AR0233-UB953_MARS + 0.004332 s: ISS: Enumerating sensors ... found 2 : AR0820-UB953_LI +[MCU2_1] 1331.204468 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE +[MCU2_1] 1331.204549 s: Sensor at index 0 = IMX390-UB953_D3 +[MCU2_1] 1331.204584 s: Sensor at index 1 = AR0233-UB953_MARS +[MCU2_1] 1331.204611 s: Sensor at index 2 = AR0820-UB953_LI + +3 sensor(s) found +Supported sensor list: +a : IMX390-UB953_D3 +b : AR0233-UB953_MARS +c : AR0820-UB953_LI +Select a sensor +b + +Sensor selected : AR0233-UB953_MARS +LDC Selection Yes(1)/No(0) +LDC Selection Yes(1)/No(0) +0 +Querying AR0233-UB953_MARS + 28.155107 s: ISS: Querying sensor [AR0233-UB953_MARS] ... !!! + 28.155393 s: ISS: Querying sensor [AR0233-UB953_MARS] ... Done !!! + 28.155399 s: ISS: Initializing sensor [AR0233-UB953_MARS], doing IM_SENSOR_CMD_PWRON ... !!! +[MCU2_1] 1359.357684 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY +[MCU2_1] 1359.357737 s: Received Query for AR0233-UB953_MARS +[MCU2_1] 1359.357790 s: Sensor name is IMX390-UB953_D3 +[MCU2_1] 1359.357836 s: Sensor name is AR0233-UB953_MARS +[MCU2_1] 1359.357951 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_PWRON + 28.170422 s: ISS: Initializing sensor [AR0233-UB953_MARS], doing IM_SENSOR_CMD_CONFIG ... !!! +[MCU2_1] 1359.372979 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG +[MCU2_1] 1359.373033 s: Application requested features = 0x158 +[MCU2_1] +[MCU2_1] 1359.373069 s: UB960 config start +[MCU2_1] 1359.612927 s: End of UB960 config +[MCU2_1] 1359.612969 s: Configuring camera # 0 +[MCU2_1] 1359.712922 s: Configuring AR0233 imager .. Please wait till it finishes +[MCU2_1] 1360.780909 s: AR0233 config done +[MCU2_1] 1360.781294 s: AR0323_Probe SUCCESS : Read expected value 0xd56 at chip ID register 0x3000 +[MCU2_1] 1360.781338 s: IM_SENSOR_CMD_CONFIG returning status = 0 + 29.578991 s: ISS: Initializing sensor [AR0233-UB953_MARS] ... Done !!! + +Enabling LDC + 32.595305 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:547] kernel init for node 0, kernel com.ti.capture ... + 32.836263 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:559] kernel init for node 0, kernel com.ti.capture ... done !!! + 32.836270 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:547] kernel init for node 1, kernel com.ti.hwa.vpac_viss ... + 33.065911 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:559] kernel init for node 1, kernel com.ti.hwa.vpac_viss ... done !!! + 33.065918 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:547] kernel init for node 2, kernel com.ti.imaging.aewb ... + 33.067915 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:559] kernel init for node 2, kernel com.ti.imaging.aewb ... done !!! + 33.067921 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:547] kernel init for node 3, kernel com.ti.hwa.vpac_ldc ... +[MCU2_1] 1364.268670 s: VX_ZONE_INFO:[tivxAewbCreate:594] tivxAewbCreate : DCC ID = 233 +[MCU2_1] 1364.268726 s: VX_ZONE_INFO:[tivxAewbCreate:595] tivxAewbCreate : Image Format = 0 +[MCU2_1] 1364.268765 s: VX_ZONE_INFO:[tivxAewbCreate:596] tivxAewbCreate : Phase = 3 +[MCU2_1] 1364.268800 s: VX_ZONE_INFO:[tivxAewbCreate:597] tivxAewbCreate : awb_mode = 0 +[MCU2_1] 1364.268834 s: VX_ZONE_INFO:[tivxAewbCreate:598] tivxAewbCreate : awb_mode = 0 +[MCU2_1] 1364.268870 s: VX_ZONE_INFO:[tivxAewbCreate:599] tivxAewbCreate : awb_num_skip_frames = 0 +[MCU2_1] 1364.268938 s: VX_ZONE_INFO:[tivxAewbCreate:600] tivxAewbCreate : ae_num_skip_frames = 0 +[MCU2_1] 1364.268981 s: VX_ZONE_INFO:[tivxAewbCreate:607] tivxAewbCreate : DCC Numbytes = 26307 +[MCU2_1] 1364.269043 s: VX_ZONE_INFO:[tivxAewbCreate:618] Before dcc_update : awb_calb_data.radius = 0xf8f8fcf8 +[MCU2_1] 1364.269369 s: VX_ZONE_INFO:[tivxAewbCreate:623] After dcc_update : awb_calb_data.radius = 0x32 + 33.169627 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:559] kernel init for node 3, kernel com.ti.hwa.vpac_ldc ... done !!! + 33.169634 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:547] kernel init for node 4, kernel com.ti.hwa.display ... + 33.170265 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:559] kernel init for node 4, kernel com.ti.hwa.display ... done !!! + + 33.238250 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=67, ref=2) + 33.238263 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=75, ref=18) + 33.238270 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=83, ref=19) + 33.238277 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=67, ref=4) + 33.238283 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=75, ref=19) + 33.238289 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=83, ref=20) + 33.238294 s: ISS: Starting sensor [AR0233-UB953_MARS] ... !!! +[MCU2_1] 1364.440750 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_ON +[MCU2_1] 1364.440825 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1 +[MCU2_1] 1364.440857 s: Starting camera # 0 +[MCU2_1] 1364.440919 s: Entering IssSensor_Start + 33.248648 s: ISS: Starting sensor [AR0233-UB953_MARS] ... !!! + 33.248657 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=67, ref=6) + 33.248667 s: VX_ZONE_INFO:[ownGraphScheduleGraph:680] Scheduling Graph (graph=102, pipe=0) + 33.248673 s: VX_ZONE_INFO:[ownNodeKernelSchedule:544] Scheduling Node (node=9, pipe=0) + 33.248685 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=75, ref=20) + 33.248692 s: VX_ZONE_INFO:[tivxDataRefQueueEnqueueReadyRef:88] Q (queue=83, ref=18) + 33.248699 s: VX_ZONE_INFO:[tivxDataRefQueueDequeueDoneRef:161] DQ (queue=68) .. NO BUFFER +[MCU2_1] 1364.450899 s: UB960 config start +[MCU2_1] 1364.450979 s: End of UB960 config +[MCU2_1] 1364.451179 s: VX_ZONE_INFO:[tivxTargetNodeDescNodeExecute:584] Node (node=9, pipe=0) acquiring parameters on target 00000068 +[MCU2_1] 1364.451266 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameterForPipeup:249] Parameter acquired for pipe up (node=9, pipe=0, data_ref_q=61, queue=67, ref=2) +[MCU2_1] 1364.451421 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameterForPipeup:249] Parameter acquired for pipe up (node=9, pipe=0, data_ref_q=61, queue=67, ref=4) +[MCU2_1] 1364.451546 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameter:177] Parameter acquired (node=9, pipe=0, data_ref_q=61, queue=67, ref=6) +[MCU2_1] 1364.451618 s: VX_ZONE_INFO:[tivxTargetNodeDescNodeExecute:642] Node (node=9, pipe=0) executing on target 00000068 +[MCU2_1] 1364.496012 s: VX_ZONE_INFO:[tivxTargetNodeDescNodeExecute:665] Node (node=9, pipe=0) executing on target 00000068 ... DONE !!! +[MCU2_1] 1364.496096 s: VX_ZONE_INFO:[tivxTargetNodeDescReleaseParameter:442] Parameter NOT released (node=9, pipe=0, data_ref_q=61, ref=2, users=1) +[MCU2_1] 1364.496212 s: VX_ZONE_INFO:[tivxTargetNodeDescNodeExecute:584] Node (node=21, pipe=0) acquiring parameters on target 00000067 +[MCU2_1] 1364.496291 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameter:177] Parameter acquired (node=21, pipe=0, data_ref_q=69, queue=75, ref=18) +[MCU2_1] 1364.496362 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameter:187] Parameter ALREADY acquired (node=21, pipe=0, data_ref_q=61, ref=2) +[MCU2_1] 1364.496432 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameter:177] Parameter acquired (node=21, pipe=0, data_ref_q=85, queue=88, ref=10) +[MCU2_1] 1364.496499 s: VX_ZONE_INFO:[tivxTargetNodeDescAcquireParameter:177] Parameter acquired (node=21, pipe=0, data_ref_q=89, queue=92, ref=16) +[MCU2_1] 1364.496559 s: VX_ZONE_INFO:[tivxTargetNodeDescNodeExecute:642] Node (node=21, pipe=0) executing on target 00000067 + + ========================== + Demo : Single Camera w/ 2A + ========================== + p: Print performance statistics + s: Save Sensor RAW, VISS Output and H3A output images to File System + x: Exit + Enter Choice: s + +Test data path is NULL. Defaulting to current folder +RAW file name capture/./img_0000_1920x1080.g12l +YUV file name capture/./img_0000.yuv +out width = 1920 +out height = 1080 +out format = 842094158 +H3A file name capture/./h3a_0000.bin + +Responses: +I found a very interesting point. It works well if resolution configuration is larger than real sensor output size. * sensor mipi-csi2 real output resolution: 1920x1080 - tivx_raw_image_create_params_t.width = 1920, height = 1080 ==> blocking (only 1st raw capture ok) - tivx_raw_image_create_params_t.width = 1920, height = 1280 ==> ok (preview display ok) Are there any memory overwrites between frame buffers, corruption of meta data? + +This is most probably because of H3A DCC configuration. Please modify the following AR0233_viss_h3a_aewb_cfg.xml in both of the folders below imaging\sensor_drv\src\ar0233\dcc_xmls\linear imaging\sensor_drv\src\ar0233\dcc_xmls\wdr black row vertical position should be no more than frame height - blk_win_numlines. Please change the following setting 2, //blk_win_numlines 1094, //blk_row_vpos to 2, //blk_win_numlines 1078, //blk_row_vpos Run the script generate_dcc.bat on a Windows PC. This will update header files in the folder imaging\sensor_drv\include Rebuild SDK and try the camera app + +It's ok after changing H3A size in DCC configurations. Do you have plans to implement basic parameters in sensor drivers? For TDA2, they are implemented in sensor drivers, so it was worked without DCC configurations. + +In TDA4 SW architecture, we are trying to separate ISP tuning from sensor driver. All ISP tuning parameters will be specified through DCC. + diff --git a/data2/text/range/10001-15000/863230.txt b/data2/text/range/10001-15000/863230.txt new file mode 100644 index 0000000000000000000000000000000000000000..1535c53c59dce89c250564ca5ef3dd5583d032e3 --- /dev/null +++ b/data2/text/range/10001-15000/863230.txt @@ -0,0 +1,151 @@ +Ticket Name: TDA2EX17EVM: Customer PCB with TDA2E17 has random kernel panic issue + +Query Text: +Part Number: TDA2EX17EVM Hi Champs: The customer is using the TDA2 EX17 with Linux. They found the kernel has random panic issue. Please see the logs attached. Please advice how to solve it. BTW, if we need to fine tune the EMIF tool with their DDR, can we have an off-line mail discussion? THanks. BR RIo crash_log_5(出錯在rc.pvr.service).txt [ OK ] Reached target System Initialization.[ 8.986410] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 + +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ 9.082452] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Listening on dropbear.socket. +[ 9.126099] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=349) +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started Kernel Logging Service. + Starting Login Service... + Starting Save/Restore Sound Card State... + Starting rc.pvr.service... +[ OK ] Started D-Bus System Message Bus. +[ 9.563299] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ 9.702918] ------------[ cut here ]------------ +[ 9.733373] WARNING: CPU: 0 PID: 219 at mm/rmap.c:231 anon_vma_clone+0x1b8/0x1f4() +[ 9.786086] Modules linked in: pvrsrvkm(O) extcon_usb_gpio c_can_platform c_can omap_aes_driver can_dev omap_sham dwc3_omap extcon omap_rng omap_des rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[ 9.828925] CPU: 0 PID: 219 Comm: systemd-udevd Tainted: G O 4.4.84-00041-geb8fba6-dirty #2 +[ 9.838447] Hardware name: Generic DRA72X (Flattened Device Tree) +[ 9.844564] Backtrace: +[ 9.847043] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 9.854643] r7:c0102dfc r6:600c0013 r5:00000000 r4:c0957810 +[ 9.860367] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 9.867624] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 9.875747] r7:c0102dfc r6:000000e7 r5:00000009 r4:00000000 +[ 9.881466] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x24/0x2c) +[ 9.890286] r8:c09b7900 r7:eebc4ba0 r6:ee73c4e0 r5:eeba2a80 r4:ee7d4560 +[ 9.897062] [] (warn_slowpath_null) from [] (anon_vma_clone+0x1b8/0x1f4) +[ 9.905540] [] (anon_vma_clone) from [] (anon_vma_fork+0x2c/0x168) +[ 9.913488] r10:ee6f78c0 r9:ee73c4e0 r8:00000000 r7:00000000 r6:ee56d900 r5:ee73c4e0 +[ 9.921391] r4:00000001 +[ 9.923947] [] (anon_vma_fork) from [] (copy_process+0x10d0/0x14c8) +[ 9.931983] r9:ee73c4e0 r8:00000000 r7:00000000 r6:eeb9e540 r5:ee56d900 r4:00000001 +[ 9.939804] [] (copy_process) from [] (_do_fork+0x78/0x334) +[ 9.947141] r10:00000000 r9:ee638000 r8:c000fc84 r7:00000000 r6:00000000 r5:beac8930 +[ 9.955043] r4:01200011 +[ 9.957597] [] (_do_fork) from [] (SyS_clone+0x28/0x30) +[ 9.964586] r10:00000000 r9:ee638000 r8:c000fc84 r7:00000078 r6:b6f30000 r5:beac8930 +[ 9.972486] r4:b6f30068 +[ 9.975040] [] (SyS_clone) from [] (ret_fast_syscall+0x0/0x34) +[ 10.020488] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 10.045569] EXT4-fs (mmcblk1p2): recovery complete +[ 10.063132] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 10.109518] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] + Starting Network Service... + Starting Permit User Sessions... +[ OK ] Started System Logging Service. +[ 10.342116] net eth0: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service.[ 10.353176] net eth0: initialized cpsw ale version 1.4 + +[ 10.361896] net eth0: ALE Table size 1024 +[ OK ] Started Save/Restore Sound Card State. +[ 10.389936] net eth0: phy found : id is : 0x2000a253 +[ OK ] Started rc.pvr.service. +[ 10.418178] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ OK ] Started Permit User Sessions. +[ 10.437721] ---[ end trace 44e54c61ba5cf5f9 ]--- +[ 10.502081] Unable to handle kernel NULL pointer dereference at virtual address 00000004 +[ 10.574784] pgd = ee685240 +[ 10.577511] [00000004] *pgd=ae618003, *pmd=00000000 +[ 10.582429] Internal error: Oops: 206 [#1] PREEMPT SMP ARM +[ 10.587937] Modules linked in: bc_example(O) pvrsrvkm(O) extcon_usb_gpio c_can_platform c_can omap_aes_driver can_dev omap_sham dwc3_omap extcon omap_rng omap_des rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[ 10.608601] CPU: 0 PID: 219 Comm: systemd-udevd Tainted: G W O 4.4.84-00041-geb8fba6-dirty #2 +[ 10.618121] Hardware name: Generic DRA72X (Flattened Device Tree) +[ 10.624239] task: ee693600 ti: ee638000 task.ti: ee638000 +[ 10.629663] PC is at down_write+0x1c/0x5c +[ 10.633692] LR is at anon_vma_clone+0xb8/0x1f4 +[ 10.638154] pc : [] lr : [] psr: 60030013 +[ 10.638154] sp : ee639e28 ip : ee639e40 fp : ee639e3c +[ 10.649679] r10: eeb22d7f r9 : 02000200 r8 : c09b7900 +[ 10.654923] r7 : 00000000 r6 : ee73c4e0 r5 : eeba2a80 r4 : 00000004 +[ 10.661475] r3 : ffff0001 r2 : 00000000 r1 : 00000000 r0 : 00000004 +[ 10.668030] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user +[ 10.675193] Control: 30c5387d Table: ae685240 DAC: fffffffd +[ 10.680961] Process systemd-udevd (pid: 219, stack limit = 0xee638210) +[ 10.687515] Stack: (0xee639e28 to 0xee63a000) +[ 10.691890] 9e20: ee7d4560 eeba2a80 ee639e84 ee639e40 c0102cfc c06880d8 +[ 10.700103] 9e40: c082e31c c098751e 024000c0 00000000 ee56d900 ee56d944 c093a6fc 00000001 +[ 10.708315] 9e60: ee73c4e0 ee56d900 00000000 00000000 ee73c4e0 ee6f78c0 ee639eac ee639e88 +[ 10.716527] 9e80: c0102e64 c0102c50 00000001 ee56d900 eeb9e540 00000000 00000000 ee73c4e0 +[ 10.724738] 9ea0: ee639f3c ee639eb0 c0034198 c0102e44 c09522c0 00000001 c0698600 b6f30068 +[ 10.732950] 9ec0: 01200011 fff7cdff 024000c0 ee73c074 ee73c068 ee6f78fc eeb9e57c ee73c070 +[ 10.741162] 9ee0: ee73c060 eeb9e540 ed35aa00 ed35ad28 c098ae40 00000000 00000000 eed80c24 +[ 10.749374] 9f00: 42267fda 00000002 00000000 fffffff4 c0128fd8 01200011 beac8930 00000000 +[ 10.757585] 9f20: 00000000 c000fc84 ee638000 00000000 ee639f8c ee639f40 c00346c4 c00330d4 +[ 10.765797] 9f40: 00000000 00000000 00000000 ffffffff beac90a8 00000167 c000fc84 ee638000 +[ 10.774009] 9f60: ee639f7c b6f30068 beac8930 b6f30000 00000078 c000fc84 ee638000 00000000 +[ 10.782220] 9f80: ee639fa4 ee639f90 c0034a74 c0034658 b6f30068 00000000 00000000 ee639fa8 +[ 10.790431] 9fa0: c000fae0 c0034a58 b6f30068 beac8930 01200011 00000000 00000000 00000000 +[ 10.798643] 9fc0: b6f30068 beac8930 b6f30000 00000078 b6efb000 b6f304c0 000000db 000000db +[ 10.806856] 9fe0: 00000078 beac8928 b6e83245 b6e28996 00010030 01200011 00000000 00000000 +[ 10.815064] Backtrace: +[ 10.817532] [] (down_write) from [] (anon_vma_clone+0xb8/0x1f4) +[ 10.825219] r5:eeba2a80 r4:ee7d4560 +[ 10.828829] [] (anon_vma_clone) from [] (anon_vma_fork+0x2c/0x168) +[ 10.836777] r10:ee6f78c0 r9:ee73c4e0 r8:00000000 r7:00000000 r6:ee56d900 r5:ee73c4e0 +[ 10.844681] r4:00000001 +[ 10.847239] [] (anon_vma_fork) from [] (copy_process+0x10d0/0x14c8) +[ 10.855275] r9:ee73c4e0 r8:00000000 r7:00000000 r6:eeb9e540 r5:ee56d900 r4:00000001 +[ 10.863095] [] (copy_process) from [] (_do_fork+0x78/0x334) +[ 10.870432] r10:00000000 r9:ee638000 r8:c000fc84 r7:00000000 r6:00000000 r5:beac8930 +[ 10.878332] r4:01200011 +[ 10.880888] [] (_do_fork) from [] (SyS_clone+0x28/0x30) +[ 10.887876] r10:00000000 r9:ee638000 r8:c000fc84 r7:00000078 r6:b6f30000 r5:beac8930 +[ 10.895776] r4:b6f30068 +[ 10.898331] [] (SyS_clone) from [] (ret_fast_syscall+0x0/0x34) +[ 10.905934] Code: e1a04000 f590f000 e3a03001 e34f3fff (e1902f9f) +[ 11.451564] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 12.388536] cpsw 48484000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off +[ 12.444719] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 12.588198] remoteproc2: powering up 40800000.dsp +[ 12.613993] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 597548 +[ 12.628028] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 12.633919] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 12.639889] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 12.745081] remoteproc2: remote processor 40800000.dsp is now up +[ 12.751641] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 12.757693] ---[ end trace 44e54c61ba5cf5fa ]--- +[ 12.775413] remoteproc1: powering up 55020000.ipu +[ 12.799979] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 6201588 +[ 12.823345] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 12.889157] remoteproc1: remote processor 55020000.ipu is now up +[ 12.904886] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 12.939897] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 12.955499] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 12.986528] NET: Registered protocol family 41 +[ OK ] Started Login Service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. + Starting weston.service... +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started weston.service. +[ OK ] Started Network Name Resolution. + Starting tiipclad-daemon.service... + Starting telnetd.service... + +Responses: +Hi the crash log does not reveal much Has the Customer board design, layout been reviewed already Have we run memtester tool to verify if the memory access is stable + +Hi Sriram: Yes, this issue is happening on customer's PCB. Can we discuss this issue off-line? I will share you the customer's DDR spec and the other stuffs? BR Rio + +Closing this ticket since the request is to discuss off-line. + diff --git a/data2/text/range/10001-15000/866370.txt b/data2/text/range/10001-15000/866370.txt new file mode 100644 index 0000000000000000000000000000000000000000..77bbe93d1f4824d71fc34ef69f2b38f79c51f2af --- /dev/null +++ b/data2/text/range/10001-15000/866370.txt @@ -0,0 +1,42 @@ +Ticket Name: TIDEP-01017: Radar SDK usecases issue + +Query Text: +Part Number: TIDEP-01017 Other Parts Discussed in Thread: AWR1243 Hello, I follow the "Processor SDK Radar user guide" to use the usecase "4 AWR1243 Capture + Radar Object Detect (DSP) (MIMO) + Null" . And the version of Processor SDK is 3.07. I modify the dynamic IP to static IP by following the "VisionSDK_UserGuide_NetworkTools", because i don't have router . When i run the radar_cascade_demo.m to watch the result, i found some issue. 1. The GUI don't show any point cloud , even if i change the GUI output or Peak detection option. (see fig.1) But i can watch objects from Doppler Range heat map.(fig.2) 2. When i open the azimuth Heat Map of GUI output option, the radar will crash. And the PC will not receive any data from Ethernet. 3. Sometimes, the GUI print the frame lost issue. Could you give me advice? Thanks Morris fig.1 fig.2 + +Responses: +Hi Please create the calibration file corresponding to the instructions in Section 3.9.1.6 Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + Null in the document: vision_sdk\docs\Radar\ProcessorSDKRadar_UserGuide.pdf You can place the calibration file generated in a SD card and then try this usecase. You should start seeing the point cloud. Thanks and Regards Piyali + +Hi, Piyali I try to create the calibration file, and i put it into SD card. Then I can watch point cloud from GUI, but two issues were happened. 1. The radar will crash, if i change GUI output option to "1 1 0 0 1". 2. When the GUI output setting is "1 1 0 0 0", the radar can work.(fig.1) But the frame lost issue was happened.(fig.2) Could you give me advice? Thanks Morris fig.1 fig.2 + +In our experiments we have typically seen the data throughput achieved on Windows machines versus Linux machines are lower. One test to check if network throughput is an issue is to stop the MATLAB script and set the same GUI parameters. Enabling the Azimuth plot increases the data throughput requirement, if the usecase continues to run (You can check this with the statistics in the UART console by typing 'p') without the MATLAB connected, this would point to a data throughput issue in your setup. If you happen to have a Linux machine with MATLAB installed, you can try the same experiment there and see if you see the same issue. Thanks and Regards Piyali + +Hi, Piyali I use the Ethernet monitor software to get the TCP and UDP packages of this demo. I use the static IP, and Radar's IP is '192.168.33.200'. The PC's IP is '192.168.33.30'. When the demo is running, i find a problem. At the beginning, i can receive the correct UDP package. (fig.1). I receive the wrong UDP package when the demo is running for some time(fig.2). The TFDTP header is wrong, because the total seq and offset over the buffer's boundary. Could you give me advice? Thanks Morris fig1. fig2. + +Hi I am not sure I follow: When you mention "The TFDTP header is wrong, because the total seq and offset over the buffer's boundary.", which buffer are you referring to here? The offset is actually calculated based on the total size of the frame being transmitted in chunks. Thanks and Regards Piyali + +Hi, Piyali The buffer is dataArraay of "radar_cascade_demo.m", and the size is 65536 bytes(fig.1). When the offset and total size of frame are wrong, the data will be out of the boundary of dataArray. Can you check the UDP packages? Thanks. Morris fig.1 + +Hi Morris, Are you sure the data is not getting accumulated or something? I am yet to look into the details, but we need to check if the tfdtp buffer is flushed after the transaction so that redundant data is not transferred. I am assuming the 65k buffer size which you mentioned is not just any arbitrary large number and is some limit which is agreed upon from both ends. Let me check these pointers internally and get back to you. I really doubt this is a TFDTP bug. + +Hi, Piyali and Anand I try to use the Processor SDK 3.08, and i still get the issue. So I change the GUI output options to test each output option. Then, I found some issue. 1. Although the frame size of udp package is over 65536, it is correct except the Point Cloud and Noise Profile options. 2. The Point Cloud is not correct because the size of package always increases. According the message header in figure 1 (Blue line), number of the detection objects is 28 (0x1C). But the data length of pointer cloud (Green line) is 759168 (0xB9580), it is about 17253 points (size of one point is 44 bytes). I think the Radar does not clear the data buffer of point cloud. Can you check these issue? Thanks. Morris fig.1 + +Hi Morris, I will ask a radar expert to look into this. + +Hi Morris, We have found the issue in the radar processing for point cloud output. Could you try adding the highlighted line as the following? C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspcascademimo\radarDspCascadeMimo.c, around line 390: /* Prepare Output Buffer */ AlgorithmFxn_RadarDspSetOpPointers(pObj, pOutputMetaDataBuffer); opPtr = (AlgorithmFxn_RadarDspCascadeMimoOutput *) pOutputMetaDataBuffer->bufAddr[0]; opPtr->opHdr.frameId = in_buf->frameId; outputSectionPointers = &pObj->opBufPointers; outputSectionPointers->pPointCloudSectionHeader->sectionLength = 0; for (burstLoop = 0; burstLoop < metaDataBuffAddr[0U]->numBurstLoops; burstLoop++) { for (burst = 0; burst < metaDataBuffAddr[0U]->numBursts; burst++) Regards, Stanley + +Hi, Stanley I follow your describe to edit the file, then the package size of point cloud is correct. Now, I find a new problem. When i take a corner reflector leaving the radar, i can watch the object leaving on GUI. When i take a corner reflector approaching the radar, I can't see the object approaching on GUI at the far end(>2m). Please find attached video for reference. Could you give me advice? Thanks Morris Video 1 + +Hi Morris, Could you try using SDK 3.8 release and see if the result is better? We fixed an issue with signal integrity when configuring radar front end. Please do the calibration again after moving to 3.8 release. However, the point cloud issue is not fixed in SDK 3.8 release so the workaround is still required for point cloud. Regards, Stanley + +Hi, Stanley I have already used the SDK 3.8, and do the calibration again. Then the result is the same. Please give me advice. Thanks. Morris + +Morris Do you continue to face issues here? Are you able to see the object in the range - doppler heat map or the range profile? If yes, then this may be a tuning parameter of the CFAR peak detection for positive Doppler bins. Thanks and Regards Piyali + +Hi, Piyali I can see the object in the range-Doppler heat map, and it is correct. (video 1) Then, I try to tune parameter of the CFAR, and I watch the point cloud again. When I take a corner reflector leaving the radar, I can watch the object leaving on GUI. (Video 2) When I take a corner reflector approaching the radar, I can see the object approaching on GUI.(Video 2) But it is not stable. I think the reason of this issue is not CFAR, because the amplitude of the object is the same in the same range. Could you give me advice? Thanks Morris video 1 video 2 + +The way to debug this would be to capture the ADC frame and the intermediate outputs of the FFT, and CFAR detection for the case when the object is moving closer to the radar sensor. I believe the object is very clearly identified when it is stationary at a given distance is that right? Also, can you try setting the test source data of the object moving closer to the radar and see if the processing chain in your case is able to detect the objects clearly. If that is creating an issue, then it becomes eaiser to debug what could be going wrong, without real world data capture.. Like you rightly see in the FFT heat map the amplitude is very clear in the case when the object is coming closer to the radar.. The instability could only indicate that the CFAR somehow is not detecting the peaks consistently for every radar frame, hence getting the data capture and comparing frame by frame to see when the CFAR stops detecting the points would be interesting. Thanks and Regards Piyali + +Hi, Piyali Thank you for your suggestion. First, we can see the approaching target and leaving target with the same RCS at the Doppler-Range heat map from the first video. So we think the process before the FFT is correct. But the approaching target is not shown clearly compared to the leaving target as we observe the result of the Doppler-Range plot from the second video. We are so confused by the difference between the result from these two video. We guess maybe there is something wrong in the CFAR process. Please help us to figure out this problem. Thank you so much. + +Hi Morris, The logic of CFAR is in the function: AlgorithmFxn_RadarDspCfar_caall in the file: C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspcascademimo\priv\radarDspCascadeMimoCfar_priv.c The different steps in this API are: 1. Log Magnitude calculation of the FFT output - if the log magnitude is being used. Note opBufEnergySum is arranged as Range Bins x Doppler bins as a 1D array. (R0D0, R1D0, R2D0, ..... RnD0, R0D1, R1D1, R2D1, ..... RnD1 and so on) 2. Then we loop through all the doppler bins and first try and find the peak in the range dimension through the function: mmwavelib_cfarfloat_caall. This function is defined in C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\mmwave_sdk_01_02_00_05\packages\ti\alg\mmwavelib\src\detection\mmwavelib_cfarcaall_float.c First thing to check would be in the data you are generating are you able to detect the peak in the right range bins as the output of this function. In order to do this, start by bringing the corner reflector from a far distance to a near by distance. Have CCS connectivity to the board. Connect to the DSP1 and set a breakpoint at mmwavelib_cfarfloat_caall call in C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspcascademimo\priv\radarDspCascadeMimoCfar_priv.c It would be good to build the DSP in the debug profile to help step through the code. Make sure to load the symbols from the DSP, if you are booting the board through SD card. Once you have the code hit the breakpoint in mmwavelib_cfarfloat_caall, step over the function and check the output of tempRangeIndex and tempDetected. If you find that the range is detected correctly based on the FFT output, then we can move on to debugging only the detection in the Doppler range. If the range is not detected correctly then we need to step through the mmwavelib_cfarfloat_caall 3. The doppler index around which the peak is detected is calculated next with a doppler search window: An example to understand the for loops in the code is as below: Assume: searchWinSizeDoppler 4 NumDopplerBins 16 Then the indices will look as below: i i>>1 i_doppler leftrepeat rightrepeat leftEdge rightEdge noneEdge 0 0 0 4 0 1 0 0 1 0 15 0 4 0 1 0 2 1 1 3 0 1 0 0 3 1 14 0 3 0 1 0 4 2 2 2 0 1 0 0 5 2 13 0 2 0 1 0 6 3 3 1 0 1 0 0 7 3 12 0 1 0 0 1 8 4 4 0 0 0 0 1 9 4 11 0 0 0 0 1 10 5 5 0 0 0 0 1 11 5 10 0 0 0 0 1 12 6 6 0 0 0 0 1 13 6 9 0 0 0 0 1 14 7 7 0 0 0 0 1 15 7 8 0 0 0 0 1 Graphically the search window moves as shown below: The red cell is the cell (or full range) under test and the green cells are the ranges against which the Cell is compared for every detected range point. If you see that the range indexes are showing correctly, please step through the code to see if the doppler indexes are showing up correctly or not when the object seems to disappear. One other quick experiment to isolate whether the range CFAR detection is a problem or doppler is to disable enableSecondPassSearch. Set the enableSecondPassSearch to 0 in C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect\chains_cascadeRadarOd.c If you see the data is stable then you would know that the range detection is stable and the doppler detection for CFAR has some issues. Once this is established, you can step through the doppler code to see what causes the doppler search to dismiss a peak. If you find the object is still missing when the enableSecondPassSearch is 0, then you can step through the range search to check what is going wrong in your setup. Thanks and Regards, Piyali + diff --git a/data2/text/range/10001-15000/867268.txt b/data2/text/range/10001-15000/867268.txt new file mode 100644 index 0000000000000000000000000000000000000000..9fc454fee0034839ea0b752b639eaa00d308082a --- /dev/null +++ b/data2/text/range/10001-15000/867268.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA3LX: McASP / DISPLAY DRIVE + +Query Text: +Part Number: TDA3LX Other Parts Discussed in Thread: TDA2, TDA3LA, DS90UB940-Q1 HELLO HERE WE'RE DESIGNING DISPLAY CONTROL UNIT USING TDA3. AND HAVE SOME QUESTIONS ABOUT McASP AND DISPLAY DRIVE 1. HOW CAN WE ROUTE DIFFERENT AUDIO SOURCE FROM McASP 1 / 2 / 3? IS SOME REGISTER TABLE CONTAINS IN SDK / RTOS ? 2. CAN WE SET EITHER ONE OF McASP BYPASS MODE TO ANOTHER OUT FOR CODEC? 3. HOW CAN WE SET UP RELATIVE VALUES IN M4 DISPLAY CONTROLLER FOR DIMMING UP PANEL TO FIT IN DIFFERENT SPECIFICATION OF DISPLAY? + +Responses: +Hi, Which software are you using? The PDK drivers have an example for the audio, which you can refer. Regarding the Display brightness, This is usually controlled by the LCD panel. Which panel are you using? And can you check if it has any brightness programming through any control interface may be I2C. Regards, Prasad + +HELLO PRASAD ABOUT WHAT YOU ASKED "WHICH SOFTWARE ARE YOU USING". I'M NOT REALLY SURE WHAT DID YOU MEAN BY THAT. HERE ARE VERY FEW INSTRUCTIONS TO BRING UP TDA3 WITHOUT BUILT-IN ARM A15 CORE AND GPU BUT ONLY LISTED TOOLS IN TI'S WEBSITE AS BELOW: 1. SDK WITH LINUX AND RTOS PURPOSE FOR TDA2 PROCESSOR AT LEAST FOR TDAX WITH BUILT-IN A15 CORE AND GPU WHICH IS NOT SPECIFIC FOR TDA3 1-1. SO MY QUESTION IS WHERE CAN WE GET COMPLETE GUIDELINE FOR TDA3 ESPECIALLY 1-1-1. SYSTEM BRING UP USING TI RTOS 1-1-2. DDR CALIBRATION TOOL 1-1-3. PIN MUX TOOL 2. WHERE IS THE MENTIONED PDK DRIVERS? 2-1. CAN WE USE BUILT-IN DSP AS AUDIO DECODER? (WMA / MP3 / MP4) / OR THE DSP IS DESIGNED PURPOSED ON AUDIO ROUTING / SWITCH ONLY? 3. ABOUT DISPLAY HERE IS IT http://crm.steliau-technology.com/assets/files/spe_technique/G121XGE-L01%20ver%203_0.pdf WHAT WE ASKED IS HOW TO LIGHT UP / DRIVE THE SELECTED DISPLAY? USUALLY HERE NEED A TABLE TO CONFIGURE RELATIVE PARAMETERS IN ACCORDANCE WITH TFT DISPLAY'S SPECIFICATION. IT'S NOT CONTROLLED BY LCD PANEL. IT'S CONTROL BY BACKLIGHT DRIVER TO DECIDE IN VOLTAGE LEVEL OR ADJUSTED IN PROCESSOR. FOR TDA3 CASE BUILT-IN M4 IS INTENDED FOR DISPLAY CONTROL. + +HELLO JUST CONFIRM CAN WE USE DISPLAY SUBSYSTEM FOR HORIZONTAL / VERTICAL 90 DEGREE SHIFT? THIS QUESTION IS ALSO POSTED IN FOLLOWING THREAD BUT NO BODY ANSWERED. https://e2e.ti.com/support/processors/f/791/t/789317 WE CURRENTLY DESIGN DISPLAY UNIT WITH 12.1 INCH DISPLAY. THIS DISPLAY IS LANDSCAPE 1024*768 COMPLIANT WITH PORTRAIT (VERTICAL). IT MEANS WE NEED SOC SUPPORT REQUIRED CONVERSION BY DISPLAY SUBSYSTEM OR MAPPING IN MEMORY (DDR). THIS IS VERY IMPORTANT TO US DUE TO OUR DESIGN PURPOSE OF DISPLAY CONTROL. + +Hi, The TDA3xx doesnot have the A15 and it doesnot have the linux support. You can use the Vision SDK package which supports TDA3xx with RTOS. The PDK is the driver package and is part of the Vision SDK package. Can you tell the use case you are trying to develope. For the McASP, which audio codec are you using? who is the master? Regards, Prasad + +Hello Our Use Case Is A Display Controller Designed With TDA3LA / LX (ACCORDING TO PRODUCT PAGE TDA3LA DESIGNED WITHOUT ISS AND ONLY HAS ONE DSP) Which Must Be Capable Of Processing 2 - 4 CH 1080P Input Video At 60 FPS Frame Rate And Controlling Display For Wanted Orientation (Landscape To Portrait). That Why I Began My Post From The Question About Using DSS (Display Subsystem) Frame Buffer For Mentioned Conversion (90 Degree Rotation). Once DSS Cannot Directly Support Rotation By 90 Degree By Means Of Configurable Size Of Frame Buffer In DDR. Can We Use VIP (Video Port Frame Buffer) / ISS To Do That? Our Most Wanted Use Case Are Listed Below 1. Select Any Of 2 CH Video Input From VIP / MIPI CSI-2 2. Overlay The 2 Video Stream Into One 3. Rotate Video Frames By 90 Degree 4. Memcopy To DSS Frame Buffer 5. OSD Overlay 6. Output In Video Port We May Use FPD-LINK Deserializer / HDMI RX / SD-TV RX / HD-TVI RX Connect To VIP / MIPI-CSI2 Each Time Our System Requires 2 - 4 CH Video Input In The Meantime With 1080P Resolution @60FPS. The 2 CH Video Stream Must Be Overlaid Together (Video Over Video / PIP) Then Be Converted Into 90 Degree From The Original For Portrait Compliant Display. My Question Is 1. Is That Possible For My Use Case With Required Frame Rate / Resolution 2. Does It Perform Well In Target Frame Rate / Resolution 3. If I Need Video Overlay / PIP / OSD Processing The Frame Buffer Size And DMA Should Be The Factor Which May Limit Performance Due To Data Rate. So My Question Is Can I Set The Size Of Frame Buffer? Video Pipeline Supportability? Is DMA Independent With Enough Channels For Fast-To-Memory? FUNCTION MANDATORY FUNCTION POSSIBLE HARDWARE SUPPORTABILITY POSSIBLE PROCESS VIDEO OVERLAY (2 VIDEO) ISS DDR ON-THE-FLY (IN FRAME BUFFER) VIDEO OVERLAY (2 VIDEO) DSS DDR ON-THE-FLY (IN FRAME BUFFER) IMAGE OVERLAY (GRAPHIC / VIDEO) DSS DDR ON-THE-FLY (IN FRAME BUFFER) ROTATION (90 DEGREE) ISS / EVE DDR ON-THE-FLY (IN FRAME BUFFER) RESIZE / SCALER DSS DDR ON-THE-FLY (IN FRAME BUFFER) DISPLAY DRIVE DSS DISPLAY CONTROLLER DEVICE LIST EACH DEVICE REQUIRE LOAD TABLE AND INITIATION (I2C) VIDEO DEVICE INPUT INTERFACE DUAL PORT FPD-LINK TTL 24BIT / YUV422 MIPI-CSI2 1X HDMI RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 / LVDS 4X HD-TVI RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 4X S-VIDEO RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 HERE IS MY ANOTHER POST FOR SAME QUESTION https://e2e.ti.com/support/processors/f/791/p/789317/2932161?tisearch=e2e-sitesearch&keymatch=%252520user%25253A219093#2932161 YOU CAN SEE BLOCK DIAGRAM IN THE POST. + +Hi Bright I believe the flow for you would be as below: ISS Capture (4 Ch 1080p capture RGB) --> Select 2 channels --> Resize 2 channels (60 FPS - assume 1/2 resizing) --> Overlay 2 channels --> Buffer rotate with EDMA --> Display with DSS To answer your original question regarding what software you can use to do this. You can download the Processor SDK Vision which supports TDA3x and also have examples for ISS capture and display and being able to select channels and resize them. You would need to create a custom link on top of Processor SDK vision to rotate the image by 90 deg as this is something that is not supported by any hardware block in TDA3x. The SDK can be downloaded from http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html 1-1-1. SYSTEM BRING UP USING TI RTOS - This package contains the TI-RTOS support to bring up the system 2. WHERE IS THE MENTIONED PDK DRIVERS? - This package contains the PDK drivers. 1-1-2. DDR CALIBRATION TOOL - http://www.ti.com/lit/an/sprac36e/sprac36e.pdf - This mentions TDA2x but this also supports TDA3x family of devices. 1-1-3. PIN MUX TOOL : The pin mux tool can be accessed from http://www.ti.com/tool/PINMUXTOOL 2-1. CAN WE USE BUILT-IN DSP AS AUDIO DECODER? (WMA / MP3 / MP4) / OR THE DSP IS DESIGNED PURPOSED ON AUDIO ROUTING / SWITCH ONLY? The DSP can be used as an audio decoder as well. You would need to have software libraries which support the decoding operation. https://processors.wiki.ti.com/index.php/Software_libraries#Codecs 3. ABOUT DISPLAY: You would need to drive the input of the LCD from the DSS and the M4 would be responsible to program the clocking for the DSS corresponding to the timing requirements for this LCD. CAN WE USE DISPLAY SUBSYSTEM FOR HORIZONTAL / VERTICAL 90 DEGREE SHIFT? No DSS does not support 90 deg shift. This needs to be done using EDMA. The system performance is sufficient for your usecase in terms of DDR performance. Where you would struggle in the current flow is ISS hardware base resizing of 2 channels of 1080p. If you can resize only one channel then you should be able to fit it in the ISS hardware. Also note the ISS resizer works with input of YUV422 images. So if you are inputting RGB565 you would need an additional color space conversion from RGB565 to YUV422 to use the ISS resizer. Stage H W FPS Num Bytes per pixel Number of Channels DDR Bandwidth Available on TDA3x Remarks CSI output (YUV422) 1920 1080 60 2 4 949.21875 Resize Input 1920 1080 60 2 2 474.609375 Resize Output 960 540 60 2 2 118.6523438 Rotation 90 deg Input 1920 1080 60 2 1 237.3046875 Rotation 90 deg Output 1920 1080 60 2 1 237.3046875 Display Input 1920 1080 60 2 1 237.3046875 Total DDR bandwidth 2254.394531 4256 Required is less than 60% of ideal DDR throughput Stage H W FPS Num Bytes per pixel Number of Channels IP MHz Resizer Mpix/s 1920 1080 60 NA 2 248.832 212.8 MHz This is more than what the ISS Resizer can support. Can you run the resize pipe at 30 FPS and have the display refresh at 60 FPS instead? Thanks and Regards Piyali + +PIYALI KINDLY THANK YOU FOR YOUR FAVOR TO ANSWER MY QUESTIONS. IT REALLY HELPS. NOW MY FINAL QUESTIONS ARE ABOUT DMA AND BANDWIDTH. ABOUT COLOVER CONVERSION IN MIPI-CSI2 RX INTERFACE AND RX CONTROLLLER 1. SO ISS HARDWARE DOESN'T SUPPORT CONVERSION ACCELERATION BY SOME REGISTER SETTING? 1-1. I GUESS HERE IS NO PROBLEM BECAUSE YOUR POWERFUL FPD-LINK DESERIALIZER CAN RESOLVE FORMATTING PROBLEM. FOR EXAMPLE WE USE 1-1-1. DS90UB940-Q1 IT SUPPORT LVDS RGB TO YUV OUT FOR MIPI-CSI2 TX TO TDA3 MIPI-CSI2 RX 1-1-2. FOR HDMI RX TO MIPI-CSI2 ADV7481 IS APPLIED IN OUR DESIGN TO INTERFACE WITH MIPI-CSI2 RX OF TDA3. IT DOES SUPPORT FOR RESOLVING THE SAME FORMATTING PROBLEM: 1-1-3. FOR HD-TVI RX WE USE TECHPOINT TP2854 WITH DEFAULT SUPPORT FOR YUV FORMAT 1-1-4. FOR SD-TV ADV7282A IS ADOPTED. SO I BELIEVE COLOR CONVERSION IS NOT NECESSARY. 2. ABOUT ROTATION AND OVERLAY FEATURES AS YOU DESCRIBED ABOVE. MY PROBLEMS FOR THESE TWO FEATURES ARE: 2-1. IS HERE A FRAME BUFFER SETUP FOR DSS? 2-2. IS THAT FRAME BUFFER SIZE CONFIGURABLE? 2-3. ARE THE TWO FUNTIONS POSSIBLE TO BE DONE ON THE FLY IN DDS FRAME BUFFER? 2-4. HERE IS OSD OVERLAY SUPPORTED BY DSS SO I GUESS OVERLAYING 2 VIDEO STREAMS IN DSS PHASE WITH ITS FRAME BUFFER SHOULD BE BETTER THAN DOING THAT IN ISS. (ROTATION REQUIRED 90 DEGREE NOT FLIP IN 180 DEGREE) I KNOW THAT YOU HAVE ANSWER THAT SHOULD BE DONE IS DSS BUT I WONDER FOR OVERLAY. 3. FOR RATION / OVERLAY CAN YOU DO ME A FAVOR TO POINT OUT WHERE SHOULD I MODIFY IN VISIONSDK? 3-1. WHERE CAN WE SET UP FRAME BUFFER SIZE IN VISIONSDK / RTOS FILE IF POSSIBLE? 3-2. ALSO CAN THAT FRAME BUFFER TO BE ALLOCATED IN SPECIFIC ADDRESSES? + diff --git a/data2/text/range/10001-15000/880507.txt b/data2/text/range/10001-15000/880507.txt new file mode 100644 index 0000000000000000000000000000000000000000..3daafe05c5ce1850427a3af9fec20adeb1c784f7 --- /dev/null +++ b/data2/text/range/10001-15000/880507.txt @@ -0,0 +1,168 @@ +Ticket Name: TDA2SX: The same i2c operation does have different results + +Query Text: +Part Number: TDA2SX Hi, I had some problems in developing I2C. The chip I used is TDA2SX, and the vsdk version is 03-06-00-00. In our hardware design, four I2Cs were used to control four ISP processors, and the i2c hardware interface is as follows: I had some problems in developing I2C. The chip I used is TDA2SX, and the vsdk version is 03-06-00-00. In our hardware design, four I2Cs were used to control four ISP processors, and the i2c hardware interface is as follows: static Bsp_BoardI2cInstData gBoardTda2xxI2cInstData[] = +{ + { + BSP_DEVICE_I2C_INST_ID_0, /* instId */ + SOC_I2C1_BASE, /* baseAddr */ + CSL_INTC_EVENTID_I2CINT1, /* intNum */ + 100U /* busClkKHz */ + }, + + { + BSP_DEVICE_I2C_INST_ID_1, /* instId */ + SOC_I2C2_BASE, /* baseAddr */ + CSL_INTC_EVENTID_I2CINT2, /* intNum */ + 100U /* busClkKHz */ + }, + { + BSP_DEVICE_I2C_INST_ID_2, /* instId */ + SOC_I2C3_BASE, /* baseAddr */ + CSL_INTC_EVENTID_I2CINT3, /* intNum */ + 100U /* busClkKHz */ + }, + { + BSP_DEVICE_I2C_INST_ID_3, /* instId */ + SOC_I2C4_BASE, /* baseAddr */ + CSL_INTC_EVENTID_I2CINT4, /* intNum */ + 100U /* busClkKHz */ + }, My test code for I2C is as follows: static Int ReadIspReg0(UInt32 port_id) +{ + Int32 retVal = BYD_DIAGNOSE_I2C_STATE_OK; + UInt32 slaveAddr = 0; + + switch (port_id) + { + case 0: + + slaveAddr = HSI2C_SLAVE_ADDR0; + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_I2C1_SDA_I2C1_SDA_MUXMODE_I2C1_SDA_0, + (UInt32) CTRL_CORE_PAD_I2C1_SDA, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_I2C1_SCL_I2C1_SCL_MUXMODE_I2C1_SCL_0, + (UInt32) CTRL_CORE_PAD_I2C1_SCL, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + break; + case 1: + slaveAddr = HSI2C_SLAVE_ADDR1; + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_I2C2_SDA_I2C2_SDA_MUXMODE_I2C2_SDA_0, + (UInt32) CTRL_CORE_PAD_I2C2_SDA, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_I2C2_SCL_I2C2_SCL_MUXMODE_I2C2_SCL_0, + (UInt32) CTRL_CORE_PAD_I2C2_SCL, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + break; + case 2: + slaveAddr = HSI2C_SLAVE_ADDR2; + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_MCASP1_FSX_MCASP1_FSX_MUXMODE_I2C3_SCL_10, + (UInt32) CTRL_CORE_PAD_MCASP1_FSX, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI | BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP); + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_MCASP1_ACLKX_MCASP1_ACLKX_MUXMODE_I2C3_SDA_10, + (UInt32) CTRL_CORE_PAD_MCASP1_ACLKX, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI | BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP); + break; + case 3: + slaveAddr = HSI2C_SLAVE_ADDR3; + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_MCASP1_FSR_MCASP1_FSR_MUXMODE_I2C4_SCL_10, + (UInt32) CTRL_CORE_PAD_MCASP1_FSR, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI | BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP); + Bsp_platformSetPinmuxRegs( + (UInt32) CTRL_CORE_PAD_MCASP1_ACLKR_MCASP1_ACLKR_MUXMODE_I2C4_SDA_10, + (UInt32) CTRL_CORE_PAD_MCASP1_ACLKR, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI | BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP); + break; + + default: + + break; + } + + + Vps_printf("begin read i2c\n"); + UInt8 sendData[3] = {0x00, 0x00, 0x03}; + UInt8 recvData[2] = {0xff, 0xff}; + + Vps_printf("portid is %d\n", port_id); + + + Bsp_deviceRead8(port_id, + slaveAddr, + sendData, + recvData, + 1); + + Vps_printf("recv data is 0x%x, 0x%x\n", recvData[0], recvData[1]); + + return retVal; + +} The test results for the 4 i2c buses are as follows, and you can see that both i2c0 and i2c1 were read successfully and the returned data was correct, but the i2c2 and i2c3 reads failed. Where i2c2 has an error state of LLD_HSI2C_NACK_ERR, i2c3 has an error state of LLD_HSI2C_ETIMEOUT. [HOST] [IPU2 ] 54.619288 s: portid is 0 + [HOST] [IPU2 ] 54.619593 s: recv data is 0xda, 0xff + [HOST] [IPU2 ] 54.619654 s: SetupI2C ok + [HOST] [IPU2 ] 54.619715 s: begine setupi2c 1 + [HOST] [IPU2 ] 54.619776 s: begin read i2c + [HOST] [IPU2 ] 54.619837 s: portid is 1 + [HOST] [IPU2 ] 54.620447 s: recv data is 0xda, 0xff + [HOST] [IPU2 ] 54.620569 s: SetupI2C ok + [HOST] [IPU2 ] 54.620630 s: begine setupi2c 2 + [HOST] [IPU2 ] 54.620661 s: begin read i2c + [HOST] [IPU2 ] 54.620722 s: portid is 2 + [HOST] [IPU2 ] 54.621149 s: src/bsp_deviceI2c.c @ Line 335: + [HOST] [IPU2 ] 54.621271 s: Write bus error begin,I2C2: DEV 0x6d: RD 0x00 ... ERROR !!! + [HOST] [IPU2 ] 54.621362 s: src/bsp_deviceI2c.c @ Line 362: + [HOST] [IPU2 ] 54.621454 s: error code -21: DEV 0x6d: RD 0x00 ... ERROR !!! + [HOST] [IPU2 ] 54.621606 s: src/bsp_deviceI2c.c @ Line 428: + [HOST] [IPU2 ] 54.621667 s: I2C2: Error timeout 1 ms!!! + [HOST] [IPU2 ] 54.621759 s: recv data is 0xff, 0xff + [HOST] [IPU2 ] 54.621820 s: SetupI2C ok + [HOST] [IPU2 ] 54.621850 s: begine setupi2c 3 + [HOST] [IPU2 ] 54.621911 s: begin read i2c + [HOST] [IPU2 ] 54.621972 s: portid is 3 + [HOST] [IPU2 ] 59.621881 s: src/bsp_deviceI2c.c @ Line 335: + [HOST] [IPU2 ] 59.621972 s: Write bus error begin,I2C3: DEV 0x6d: RD 0x00 ... ERROR !!! + [HOST] [IPU2 ] 59.623375 s: src/bsp_deviceI2c.c @ Line 344: + [HOST] [IPU2 ] 59.623497 s: Write Time out,I2C3: DEV 0x6d: RD 0x00 ... ERROR !!! + [HOST] [IPU2 ] 59.623589 s: src/bsp_deviceI2c.c @ Line 362: + [HOST] [IPU2 ] 59.623894 s: error code -2: DEV 0x6d: RD 0x00 ... ERROR !!! + [HOST] [IPU2 ] 59.624016 s: src/bsp_deviceI2c.c @ Line 428: + [HOST] [IPU2 ] 59.624077 s: I2C3: Error timeout 5002 ms!!! + [HOST] [IPU2 ] 59.624168 s: recv data is 0xff, 0xff + I monitored the i2c signal on the bus, where i2c0 and i2c1 write and read the signal as follows: i2c2 and i2c3 have an error in the write register address, but from the signal point of view, after master write register address, slave has sent a ack signal, but why i2c2 will have LLD_HSI2C_NACK_ERR error? + +Responses: +Has anyone had this problem? + +Hi, the pad config options look different for I2C2 and I2C3. Can you make it BSP_PLATFORM_IOPAD_CFG_DEFAULT and check? Check the interrupt number passed to the driver during the initparams is proper. Make sure that the I2C2 and I2C3 interrupts are routed to the corresponding interrupt number of the core. Init parameters are usually passed in the application cfg file calling "GIO.addDeviceMeta" Regards, Prasad + +Hi Prasad， Thanks for you reply. I had try BSP_PLATFORM_IOPAD_CFG_DEFAULT for i2c2 and i2c3, and it could not work. I will check the intr num and test Regards Kepei + +Hi Prasad， I had try modify the intr define #define CSL_INTC_EVENTID_I2CINT1 41 #define CSL_INTC_EVENTID_I2CINT1 42 #define CSL_INTC_EVENTID_I2CINT1 43 #define CSL_INTC_EVENTID_I2CINT1 44 The log output as this: [HOST] [IPU2 ] 69.558683 s: Board i2c[0] intr num is 41 + [HOST] [IPU2 ] 69.558988 s: Board i2c[1] intr num is 42 + [HOST] [IPU2 ] 69.559293 s: Board i2c[2] intr num is 43 + [HOST] [IPU2 ] 69.559537 s: Board i2c[3] intr num is 44 but the phenomenon is the same I init the i2c in a link, and i use tda2xx_evm_linux_all as the config choice, but i had not find "GIO.addDeviceMeta" code. Thanks Kepei + +Hi, Can you share the register dump of the I2C2 and I2C3 instance when the error happens? Have you also verified the board design wrt the I2C lines like the pull ups connected, loading because of other devices connected on the bus etc. comparing between the 4 instances. Can you probe the i2c signals near to SoC? Regards, Prasad + +Hi Prasad, Thanks for your reply. There are 2 devices connected on I2C2 bus, but only one device is connected on I2C3. When the first Isr entered by issuing the same command, both I2C_IRQSTATUS are 0x1010, but I2C2_IRQSTATUS_RAW = 0x1410, I2C3_IRQ_STATUS_RAW = 0x0116, the NACK bit was set, then I2C3 communication failed. Below are the oscillograms. I2C2: I2C3: Below is a compare of the registers dump: Please help to give some advice. Thanks! Regards, Kepei + +Hi, Can you take the signal of the working case also and post. Do you have the i2c signal analyser which you can use instead of the scope which would be easy to analyse. Regards, Prasad + +Hi Prasad, Below 3 pictures consist a working case of getting slave device ID. While the unworking case is like below: Thanks! Regards, Kepei + +Hi Prasad, We tried to enable I2C2/3/4 on Linux side, and use "i2cget" command to communicate with the slave devices. We got the same result. I2C1/2 are OK, I2C3/4 are NG. I2C1 signal graph: I2C3 signal graph: Any idea? Thanks! Best Regard, Kepei + +Hi Prasad, Sorry for the lost graphs. I2C1 OK. I2C3 NG. Thanks! Best Regards, Kepei + +Hi, The Nack could be because of the Spick seen on the SDA (Going low to high) line near the clock boundary of SCL for ACK bit. Can you check by changing the cameras connected to the I2C3 lines and I2C1 lines. Regards, Prasad + +Hi Prasad, Sorry for late response. We have changed the connecting. I2C1 connected to CAM3, communication remains OK. I2C3 connected to CAM1, communication remains NG. And we have tried to simulate I2C by GPIO with the same pins that I2C3/I2C4 use, it works well.But we still want I2C3/I2C4 work with the I2C core, to keep the code unified. Thanks! Regards, Kepei + +Hi, This looks very strange. Can you check the voltages and the clock frequency in case of working and non working scenarios are same? Also measure the width and start time of the Ack and Nack bit wrt the clock by zooming in near the ACK/NACK bit in scope output. Regards, Prasad + diff --git a/data2/text/range/10001-15000/882519.txt b/data2/text/range/10001-15000/882519.txt new file mode 100644 index 0000000000000000000000000000000000000000..04ef231dd64a4a6dab07152117daddefa58a8cd5 --- /dev/null +++ b/data2/text/range/10001-15000/882519.txt @@ -0,0 +1,26 @@ +Ticket Name: Compiler/TDA2SX: Follow VSDK guide reduce Yocto file system size but can not reach about 60MB. + +Query Text: +Part Number: TDA2SX Tool/software: TI C/C++ Compiler Hi Team: Customer develop their TDA2Sx system. file system base on website latest 6.00.00.03 (https://processors.wiki.ti.com/index.php?title=Category:Processor_SDK_Linux_Automotive) VSDK use linux version 3.6 release. Develop system is Ubuntu 14.04 first time build total Yocto default J6x filesystem is size is ~1GB. Based on our user guide description use small size file system script build file system tar package about ~150MB. Could you please share small size of 60MB file system with us or help us double check the file system we generate is wrong or not? I upload the file system to TI internal BOX. you can download it. Best Regards! han tao + +Responses: +Hi Tao, I remember that the size of this binary was about 60 MB with Vision SDK 3.04 which used PSDKLA 3.04. Will try to replicate the instructions with the Vision SDK 3.6 release and the 6.00.00.03 Linux SDK and get back to you. You can expect to hear from me by Tuesday. Regards Karthik + +Hi Karthik: Thanks a lot for help us double check this problem. Has share you the file system we generate from 6.00.00.03. Please help us co-check with your side. Best Regards! Han Tao + +Hi Tao, VisionSDK 3.02 to 3.07 were based on PSDKLA3.0x(kernel 4.4 and u-boot 2016.05). VisionSDK 3.08 is based on PSDKLA6.00(Kernel 4.19 and u-boot 2019.01). VisionSDK3.7 has filesystem size of ~90MB always and not ~60MB. http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/03_07_00_00/index_FDS.html VisionSDK3.08 filesystem is ~120MB http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html We have disabled exactly same recipes here but size is not coming down too 90MB. Can you let us know your usecase, we can disable few more recipes based on your usecase. For example, if gstreamer is not required, we can disable all gstreamer recipes and it will further reduce the filesystem size. Thanks RamPrasad + +Hi RamPrasad, Thanks for your help. Now I have used the tisdk-rootfs-image-dra7xx-evm_vsdk_3_7.tar.xz for testing.The file system has met our size requirements, but the kernel startup time is too slow, espectially when it printfs "Started tiipclad-daemon.service.", after 6s, it shows the logo"Arago Project", I don't know what happen, how I save the time?As follows: 20200225_11:39:33Welcome to Arago 2016.12! 20200225_11:39:33 20200225_11:39:34[ SKIP ] Ordering cycle found, skipping alignment.service 20200225_11:39:34[ OK ] Started Forward Password Requests to Wall Directory Watch. 20200225_11:39:34[ OK ] Listening on /dev/initctl Compatibility Named Pipe. 20200225_11:39:34[ OK ] Listening on Syslog Socket. 20200225_11:39:34[ OK ] Listening on udev Control Socket. 20200225_11:39:34[ OK ] Listening on Journal Socket (/dev/log). 20200225_11:39:34[ OK ] Listening on udev Kernel Socket. 20200225_11:39:34[ OK ] Listening on Journal Socket. 20200225_11:39:34[ OK ] Reached target Swap. 20200225_11:39:34[ OK ] Started Dispatch Password Requests to Console Directory Watch. 20200225_11:39:34[ OK ] Reached target Paths. 20200225_11:39:34[ OK ] Reached target Remote File Systems. 20200225_11:39:34[ OK ] Created slice User and Session Slice. 20200225_11:39:34[ OK ] Created slice System Slice. 20200225_11:39:34 Mounting Temporary Directory... 20200225_11:39:34 Starting Setup Virtual Console... 20200225_11:39:34 Starting Load Kernel Modules... 20200225_11:39:34 Starting Create Static Device Nodes in /dev... 20200225_11:39:34[ OK ] Created slice system-serial\x2dgetty.slice. 20200225_11:39:34[ OK ] Created slice system-getty.slice. 20200225_11:39:34 Starting Remount Root and Kernel File Systems... 20200225_11:39:34 Starting Journal Service... 20200225_11:39:34[ OK ] Reached target Slices. 20200225_11:39:34[ OK ] Listening on Network Service Netlink Socket. 20200225_11:39:34[ OK ] Mounted Temporary Directory. 20200225_11:39:34[ OK ] Started Journal Service. 20200225_11:39:34[ OK ] Started Setup Virtual Console. 20200225_11:39:34[FAILED] Failed to start Load Kernel Modules. 20200225_11:39:34See 'systemctl status systemd-modules-load.service' for details. 20200225_11:39:34[ OK ] Started Create Static Device Nodes in /dev. 20200225_11:39:34[ OK ] Started Remount Root and Kernel File Systems. 20200225_11:39:35 Starting udev Coldplug all Devices... 20200225_11:39:35 Starting udev Kernel Device Manager... 20200225_11:39:35[ OK ] Reached target Local File Systems (Pre). 20200225_11:39:35 Mounting /var/volatile... 20200225_11:39:35 Mounting /media/ram... 20200225_11:39:35 Starting Apply Kernel Variables... 20200225_11:39:35 Starting Flush Journal to Persistent Storage... 20200225_11:39:35[ OK ] Mounted /var/volatile. 20200225_11:39:35[ OK ] Mounted /media/ram. 20200225_11:39:35[ OK ] Started udev Kernel Device Manager. 20200225_11:39:35[ OK ] Started Apply Kernel Variables. 20200225_11:39:35[ OK ] Started Flush Journal to Persistent Storage. 20200225_11:39:35 Starting Load/Save Random Seed... 20200225_11:39:35[ OK ] Reached target Local File Systems. 20200225_11:39:35 Starting Create Volatile Files and Directories... 20200225_11:39:35[ OK ] Started Load/Save Random Seed. 20200225_11:39:35[ OK ] Started Create Volatile Files and Directories. 20200225_11:39:36[ OK ] Found device /dev/ttyS0. 20200225_11:39:36[ OK ] Started udev Coldplug all Devices. 20200225_11:39:36 Starting Update UTMP about System Boot/Shutdown... 20200225_11:39:36 Starting Network Time Synchronization... 20200225_11:39:36[ OK ] Started Network Time Synchronization. 20200225_11:39:36[ OK ] Started Update UTMP about System Boot/Shutdown. 20200225_11:39:36 Starting Synchronize System and HW clocks... 20200225_11:39:36[ OK ] Reached target System Time Synchronized. 20200225_11:39:37[FAILED] Failed to start Synchronize System and HW clocks. 20200225_11:39:37See 'systemctl status sync-clocks.service' for details. 20200225_11:39:37[ OK ] Reached target System Initialization. 20200225_11:39:37[ OK ] Started Daily Cleanup of Temporary Directories. 20200225_11:39:37[ OK ] Reached target Timers. 20200225_11:39:37[ OK ] Listening on dropbear.socket. 20200225_11:39:37[ OK ] Listening on D-Bus System Message Bus Socket. 20200225_11:39:37[ OK ] Reached target Sockets. 20200225_11:39:37[ OK ] Reached target Basic System. 20200225_11:39:37[ OK ] Started D-Bus System Message Bus. 20200225_11:39:37[ OK ] Started System Logging Service. 20200225_11:39:37 Starting Login Service... 20200225_11:39:37 Starting rc.pvr.service... 20200225_11:39:37 Starting Network Service... 20200225_11:39:37 Starting Permit User Sessions... 20200225_11:39:37[ OK ] Started Kernel Logging Service. 20200225_11:39:37[ OK ] Started Network Service. 20200225_11:39:37[ OK ] Started rc.pvr.service. 20200225_11:39:37[ OK ] Started Permit User Sessions. 20200225_11:39:38[ OK ] Started Serial Getty on ttyS0. 20200225_11:39:38[ OK ] Started Getty on tty1. 20200225_11:39:38 Starting weston.service... 20200225_11:39:38[ OK ] Reached target Network. 20200225_11:39:38 Starting Network Name Resolution... 20200225_11:39:38[ OK ] Started weston.service. 20200225_11:39:38[ OK ] Started Login Service. 20200225_11:39:38[ OK ] Started Network Name Resolution. 20200225_11:39:38 Starting telnetd.service... 20200225_11:39:38 Starting tiipclad-daemon.service... 20200225_11:39:38[ OK ] Started telnetd.service. 20200225_11:39:38[ OK ] Started tiipclad-daemon.service. 20200225_11:39:44 20200225_11:39:44 _____ _____ _ _ 20200225_11:39:44| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ 20200225_11:39:44| | _| .'| . | . | | __| _| . | | | -_| _| _| 20200225_11:39:44|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| 20200225_11:39:44 |___| |___| 20200225_11:39:44 20200225_11:39:44Arago Project http://arago-project.org dra7xx-evm ttyS0 20200225_11:39:44 20200225_11:39:44Arago 2016.12 dra7xx-evm ttyS0 20200225_11:39:44 + +Hi, The question regarding the overall boot time needs to be looked into closely and you can determine the systemd services that are running by default and then optimize/reorder the services based on your requirement. And, also, the original question has been answered by the previous response from TI, and I would like to request you to analyze the start time and then submit a different ticket with additional details. Regards Karthik + +Hi Karthik, I post the question at this https://e2e.ti.com/support/processors/f/791/t/883278, please help me to analysis it, thank you very much. + +Hi Karthik: Has download you provided new version of VSDK filesystem. customer can run their application at new filesystem now. Best Regards! Han Tao + +Hi Karthik, I use what you supply about the targetfs3.7, when I do earlyboot, the IPC run error, as follows: root@dra7xx-evm:/opt/vision_sdk# ./apps.out; [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6958000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa1c58000 of size 0x14d00000 [HOST] OSA: MEM: 2: Mapped 0xb0000000 to 0x91c58000 of size 0x10000000 [HOST] OSA: MEM: 3: Mapped 0xa0200000 to 0x91b98000 of size 0x00040000 [HOST] OSA: MEM: 4: Mapped 0xa02c0000 to 0x91bd8000 of size 0x00080000 [HOST] OSA: MEM: 5: Mapped 0x00000000 to 0x00000000 of size 0x00000000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 ASSERT (system_ipc.c|System_ipcInit|119) [HOST] [HOST ] 15.599158 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 15.599249 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 15.599249 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 15.599310 s: SYSTEM: IPC: [IPU2] socket bind failed (Invalid argument, 22) !!! [HOST] [HOST ] 15.599310 s: SYSTEM: IPC: [IPU2] Notify RX channel create failed (endpoint = 81) !!! [HOST] [DSP1 ] 1.017476 s: ***** DSP1 Firmware build time 18:45:17 Mar 18 2020 [HOST] [DSP1 ] 1.017537 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 1.017812 s: SYSTEM: System Common Init in progress !!! the log file here:/cfs-file/__key/communityserver-discussions-components-files/791/Serial_2D00_ttyUSB3_2D00_03_2D00_18_2D00_19_2D00_55_2D00_09.log It seems the targets missed some lib files, when I use tisdk-rootfs-image-dra7xx-evm_vsdk_3_6.tar.xz, it's OK. Could you help me ? Regards, Jason + +Hi Jason, Please file a new thread for this issue since the original issue of filesystem reduction is already resolved. Thanks RamPrasad + +https://e2e.ti.com/support/processors/f/791/t/889809 at here. + diff --git a/data2/text/range/10001-15000/885697.txt b/data2/text/range/10001-15000/885697.txt new file mode 100644 index 0000000000000000000000000000000000000000..c07b628d2cdc44ebfea48b2bbafdfa7f3498add3 --- /dev/null +++ b/data2/text/range/10001-15000/885697.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2EXEVM: Problems in the demo of usecase "Lane Detection" + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, Our team would like to test the demo of Lane Detection by TDA2 , but the trouble happens as below： We need some help to realize and deal with the problem. Thank you very much. [IPU1-0] 37.811443 s: i2cMdSubmitChan: i2c1 transfer to slave address 0x4c failed [IPU1-0] 37.811565 s: src/bsp_deviceI2c.c @ Line 346: [IPU1-0] 37.811657 s: I2C1: DEV 0x4c: RD 0xea ... ERROR !!! [IPU1-0] 37.811748 s: src/bsp_deviceI2c.c @ Line 412: [IPU1-0] 37.811840 s: I2C1: Error timeout 0 ms!!! [IPU1-0] 37.811901 s: adv7611/src/bspdrv_adv7611I2c.c @ Line 1083: [IPU1-0] 37.811992 s: I2C read failed [IPU1-0] 37.812023 s: Assertion @ Line: 227 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/video_sensor/src/hdmiRec/hdmi_recvr.c: retVal == 0 : failed !!! [IPU1-0] 37.812755 s: Assertion @ Line: 227 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/video_sensor/src/hdmiRec/hdmi_recvr.c: retVal == 0 : failed !!! + +Responses: +Hi, Can you share the full logs? Thanks Gaviraju + +Sure. Thanks a lot. The full logs are as below： [IPU1-0] 26.408558 s: CAPTURE: Create in progress !!! [IPU1-0] 26.408772 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! [IPU1-0] 26.587049 s: CAPTURE: Create Done !!! [IPU1-0] 26.588208 s: IPC_OUT_0 : Create in progress !!! [IPU1-0] 26.588543 s: IPC_OUT_0 : Create Done !!! [EVE1 ] 26.588909 s: IPC_IN_0 : Create in progress !!! [EVE1 ] 26.589977 s: IPC_IN_0 : Create Done !!! [EVE1 ] 26.590556 s: ALGORITHM: Create in progress (algId = 10) !!! [EVE1 ] 26.670499 s: ALGORITHM: Create Done (algId = 10) !!! [EVE1 ] 26.671109 s: IPC_OUT_0 : Create in progress !!! [EVE1 ] 26.671536 s: IPC_OUT_0 : Create Done !!! [IPU1-0] 26.671902 s: IPC_IN_0 : Create in progress !!! [IPU1-0] 26.673275 s: IPC_IN_0 : Create Done !!! [IPU1-0] 26.673458 s: ALGORITHM: Create in progress (algId = 5) !!! [IPU1-0] 26.674464 s: ALG_IMAGEPYRAMID: # 0 Input 0,244 : 1280 x 230 (1280 B) (In Org 1280 x 720) [IPU1-0] 26.674647 s: Output 0,244 : 1280 x 228 (1280 B) (Out Org 1280 x 720) [IPU1-0] 26.674800 s: ALG_IMAGEPYRAMID: # 1 Input 0,218 : 1278 x 270 (1280 B) (In Org 0 x 0) [IPU1-0] 26.674922 s: Output 0,184 : 1076 x 228 (1088 B) (Out Org 1076 x 604) [IPU1-0] 26.675074 s: ALG_IMAGEPYRAMID: # 2 Input 0,192 : 1278 x 322 (1280 B) (In Org 0 x 0) [IPU1-0] 26.675257 s: Output 0,136 : 904 x 228 ( 928 B) (Out Org 904 x 508) [IPU1-0] 26.675379 s: ALG_IMAGEPYRAMID: # 3 Input 0,160 : 1278 x 382 (1280 B) (In Org 0 x 0) [IPU1-0] 26.675593 s: Output 0, 96 : 760 x 228 ( 768 B) (Out Org 760 x 428) [IPU1-0] 26.675745 s: ALG_IMAGEPYRAMID: # 4 Input 0, 0 : 1280 x 720 (1280 B) (In Org 0 x 0) [IPU1-0] 26.675867 s: Output 0, 0 : 640 x 360 ( 640 B) (Out Org 640 x 360) [IPU1-0] 26.676020 s: ALG_IMAGEPYRAMID: # 5 Input 0, 38 : 636 x 270 ( 640 B) (In Org 0 x 0) [IPU1-0] 26.676203 s: Output 0, 32 : 536 x 228 ( 544 B) (Out Org 538 x 302) [IPU1-0] 26.676325 s: ALG_IMAGEPYRAMID: # 6 Input 0, 10 : 638 x 322 ( 640 B) (In Org 0 x 0) [IPU1-0] 26.676477 s: Output 0, 8 : 452 x 228 ( 480 B) (Out Org 452 x 254) [IPU1-0] 26.676630 s: ALG_IMAGEPYRAMID: # 7 Input 0, 0 : 638 x 356 ( 640 B) (In Org 0 x 0) [IPU1-0] 26.676752 s: Output 0, 0 : 380 x 212 ( 384 B) (Out Org 380 x 214) [IPU1-0] 26.676904 s: ALG_IMAGEPYRAMID: # 8 Input 0, 0 : 640 x 360 ( 640 B) (In Org 0 x 0) [IPU1-0] 26.677026 s: Output 0, 0 : 320 x 180 ( 320 B) (Out Org 320 x 180) [IPU1-0] 26.677392 s: ALG_IMAGEPYRAMID: # 9 Input 0, 0 : 318 x 176 ( 320 B) (In Org 0 x 0) [IPU1-0] 26.677545 s: Output 0, 0 : 268 x 148 ( 288 B) (Out Org 268 x 150) [IPU1-0] 26.677667 s: ALG_IMAGEPYRAMID: #10 Input 0, 0 : 316 x 174 ( 320 B) (In Org 0 x 0) [IPU1-0] 26.677819 s: Output 0, 0 : 224 x 124 ( 224 B) (Out Org 226 x 126) [IPU1-0] 26.677941 s: ALG_IMAGEPYRAMID: #11 Input 0, 0 : 316 x 174 ( 320 B) (In Org 0 x 0) [IPU1-0] 26.678094 s: Output 0, 0 : 188 x 104 ( 192 B) (Out Org 190 x 106) [IPU1-0] 26.678246 s: ALG_IMAGEPYRAMID: #12 Input 0, 0 : 320 x 180 ( 320 B) (In Org 0 x 0) [IPU1-0] 26.678399 s: Output 0, 0 : 160 x 88 ( 160 B) (Out Org 160 x 90) [IPU1-0] 26.678551 s: ALG_IMAGEPYRAMID: #13 Input 0, 0 : 156 x 84 ( 160 B) (In Org 0 x 0) [IPU1-0] 26.678673 s: Output 0, 0 : 132 x 72 ( 160 B) (Out Org 134 x 74) [IPU1-0] 27.168761 s: ALGORITHM: Create Done (algId = 5) !!! [IPU1-0] 27.168944 s: IPC_OUT_1 : Create in progress !!! [IPU1-0] 27.169310 s: IPC_OUT_1 : Create Done !!! [IPU1-0] 27.183492 s: IPC_IN_1 : Create in progress !!! [IPU1-0] 27.184529 s: IPC_IN_1 : Create Done !!! [IPU1-0] 27.185292 s: IPC_OUT_2 : Create in progress !!! [IPU1-0] 27.185628 s: IPC_OUT_2 : Create Done !!! [IPU1-0] 27.221222 s: IPC_IN_2 : Create in progress !!! [IPU1-0] 27.222290 s: IPC_IN_2 : Create Done !!! [IPU1-0] 27.222625 s: DISPLAY: Create in progress !!! [IPU1-0] 27.223235 s: DISPLAY: Create Done !!! [IPU1-0] 27.223388 s: GRPXSRC: Create in progress !!! [IPU1-0] 28.758341 s: GRPXSRC: Create Done !!! [IPU1-0] 28.758799 s: DISPLAY: Create in progress !!! [IPU1-0] 28.759318 s: DISPLAY: Create Done !!! [IPU1-0] 28.759531 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [IPU1-0] 28.759653 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 242720 B (237 KB) [IPU1-0] 28.759806 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 28.759958 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 267219456 B (254 MB) [IPU1-0] 28.760141 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 28.771030 s: CHAINS: Sensor create in progress [IPU1-0] 28.772494 s: [IPU1-0] 28.772799 s: i2cMdSubmitChan: i2c1 transfer to slave address 0x4c failed [IPU1-0] 28.772921 s: src/bsp_deviceI2c.c @ Line 346: [IPU1-0] 28.773012 s: I2C1: DEV 0x4c: RD 0xea ... ERROR !!! [IPU1-0] 28.773104 s: src/bsp_deviceI2c.c @ Line 412: [IPU1-0] 28.773195 s: I2C1: Error timeout 1 ms!!! [IPU1-0] 28.773287 s: adv7611/src/bspdrv_adv7611I2c.c @ Line 1083: [IPU1-0] 28.773378 s: I2C read failed [IPU1-0] 28.773439 s: Assertion @ Line: 227 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/video_sensor/src/hdmiRec/hdmi_recvr.c: retVal == 0 : failed !!! [IPU1-0] 28.774110 s: Assertion @ Line: 227 in C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/video_sensor/src/hdmiRec/hdmi_recvr.c: retVal == 0 : failed !!! [IPU1-0] 28.776276 s: *** UTILS: CPU KHz = 20000 Khz *** [IPU1-1] 28.760843 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 28.760965 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643368 B (628 KB) [HOST ] 28.761392 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 28.761422 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6245872 B (6099 KB) [DSP1 ] 27.169523 s: IPC_IN_0 : Create in progress !!! [DSP1 ] 27.169889 s: IPC_IN_0 : Create Done !!! [DSP1 ] 27.170133 s: ALGORITHM: Create in progress (algId = 9) !!! [DSP1 ] 27.183157 s: ALGORITHM: Create Done (algId = 9) !!! [DSP1 ] 27.183340 s: IPC_OUT_0 : Create in progress !!! [DSP1 ] 27.183401 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 27.185811 s: IPC_IN_1 : Create in progress !!! [DSP1 ] 27.186207 s: IPC_IN_1 : Create Done !!! [DSP1 ] 27.186543 s: ALGORITHM: Create in progress (algId = 15) !!! [DSP1 ] 27.186695 s: UTILS: DMA: Allocated CH (TCC) = 24 (24) [DSP1 ] 27.186726 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 24 (0x43305200) [DSP1 ] 27.220764 s: ALGORITHM: Create Done (algId = 15) !!! [DSP1 ] 27.221008 s: IPC_OUT_1 : Create in progress !!! [DSP1 ] 27.221069 s: IPC_OUT_1 : Create Done !!! [DSP1 ] 28.761605 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 28.761636 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 204620 B (199 KB) [DSP1 ] 28.761697 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 507712 B (495 KB) [DSP2 ] 28.761910 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP2 ] 28.761971 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 28.762002 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) [EVE1 ] 28.762856 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE1 ] 28.763130 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 9436 B (9 KB) [EVE1 ] 28.763618 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 247472 B (241 KB) [EVE2 ] 28.764838 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE2 ] 28.765113 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE2 ] 28.765631 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [EVE3 ] 28.766973 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE3 ] 28.767248 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE3 ] 28.767766 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [EVE4 ] 28.768956 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE4 ] 28.769230 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE4 ] 28.769718 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [IPU2 ] 28.770664 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU2 ] 28.770786 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) + +Hi, What changes you did? apart from the use-guide changes. Did you modified driver files related to I2c? Thanks Gaviraju + +Hi, Thank you for the reply. I did not modify or change any driver file related to I2C. Should I reinstall something to let the files be the original status? Thanks. + +Hi, Please follow the below thread https://e2e.ti.com/support/processors/f/791/t/625045?tisearch=e2e-quicksearch&keymatch=I2C1:%20DEV%200x4c:%20RD%200xea%20...%20ERROR%20!!! Thanks Gaviraju + +Hi, I follow the thread then find out that the daughter card of our Tda2 EVM does not have ADV7611 chip. Do we have other way to test the demo of Lane Detection by only using 1CH VIP capture without HDMI？ I mean that even if our daughter card does not have ADV7611 chip , could our team use the TDA2 to finish Lane Detection demo？ Thank you. + +Hi, Can you try with below changes in the function "Chains_menuSingleCameraRun" File path: vision_sdk\apps\src\rtos\common\chains_main_bios_single_cam.c #ifdef UC_vip_single_cam_lane_detection case 'b': case 'B': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { usecaseCfg = gChains_usecaseCfg; #if 0 if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } #endif Chains_vipSingleCameraLaneDetect(&gChains_usecaseCfg); /* No HDMI input for monstercam */ } Thanks Gaviraju + +Hi, Thank you for the reply. I try to modify the code in the function "Chains_menuSingleCameraRun" but the same problem still happens. When testing the demo , first we must set "system setting' and "capture setting" to "2.HDMI Capture 1080P60". Because without this step ,the "b.1CH VIP capture+Lane Detect (DSP1+EVE1)+Display" does not have any response when we want to execute the demo. After finishing capture setting" to "2.HDMI Capture 1080P60", we can partially run the demo but the same problem still happens even the function "Chains_menuSingleCameraRun is modified. I am not pretty sure that probably there are something wrong in the steps above. Thank you. + +Hi Whatever the step I shared, that is for 1CH VIP capture without HDMI & you no need to do any system setting & capture setting & make sure camera is connected or not Thanks Gaviraju + diff --git a/data2/text/range/10001-15000/886369.txt b/data2/text/range/10001-15000/886369.txt new file mode 100644 index 0000000000000000000000000000000000000000..1707b8d2d199f6ab36e25163d9f20edbd43af921 --- /dev/null +++ b/data2/text/range/10001-15000/886369.txt @@ -0,0 +1,14 @@ +Ticket Name: TDA2SG: jacinto-ai-devkit + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 I Read caffe-jacinto-model CNN train；as below Stage-1: Initial stage with L2 regularization training Stage-2: L1 regularization training Stage-3: Sparsification training The main training script is located ../scripts/train_image_object_detection.sh. My question Is： 1，Is stage-2 train need depend Stage-1，Stage-3 train need depend Stage-2. or Stage-1，Stage-2，Stage-3 Is independent，I can train this stage 1 2 3 at the same time。, 2，I see Stage 1,2,3 mAp is almost equal，so if I can train one of them，not need to train every Stage。 3，CAN TDA4 and TDA2S ues the same weight file（caffemodel） to run the TIDL on the usecase。 + +Responses: +Hi, If your purpose is to simply run on TDA2, the Stage1 is sufficient. The additional stages after this are required to generate a sparse model, which will run faster on TDA2. They have to be run sequentially, not in parallel. Yes, the same model is expected to run on TDA4 as well. The only difference is that for TDA4 Stage1 itself offer very high speed (other stages are not required as TDA4 is already much faster than TDA2 interms of CNN performance and sparse model doesn't offer additional speedup) Best regards, + +thanks。 1,when use tidl_model_import.out.exe, how can I get layersGroupId and conv2dKernelType value,when I change the model (link ssd 512*512), 2 ,how I test the result (stats_tool_out.bin) in the pc. + +hi,what`s the value of layersGroupId and conv2dKernelType in the follow deploy? name: "jsegnet21v2_deploy" input: "data" input_shape { dim: 1 dim: 3 dim: 512 dim: 1024 } layer { name: "data/bias" type: "Bias" bottom: "data" top: "data/bias" param { lr_mult: 0 decay_mult: 0 } bias_param { filler { type: "constant" value: -128 } } } layer { name: "conv1a" type: "Convolution" bottom: "data/bias" top: "conv1a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 32 bias_term: true pad: 2 kernel_size: 5 group: 1 stride: 2 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "conv1a/bn" type: "BatchNorm" bottom: "conv1a" top: "conv1a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "conv1a/relu" type: "ReLU" bottom: "conv1a" top: "conv1a" } layer { name: "conv1b" type: "Convolution" bottom: "conv1a" top: "conv1b" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 32 bias_term: true pad: 1 kernel_size: 3 group: 4 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "conv1b/bn" type: "BatchNorm" bottom: "conv1b" top: "conv1b" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "conv1b/relu" type: "ReLU" bottom: "conv1b" top: "conv1b" } layer { name: "pool1" type: "Pooling" bottom: "conv1b" top: "pool1" pooling_param { pool: MAX kernel_size: 2 stride: 2 } } layer { name: "res2a_branch2a" type: "Convolution" bottom: "pool1" top: "res2a_branch2a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 1 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res2a_branch2a/bn" type: "BatchNorm" bottom: "res2a_branch2a" top: "res2a_branch2a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res2a_branch2a/relu" type: "ReLU" bottom: "res2a_branch2a" top: "res2a_branch2a" } layer { name: "res2a_branch2b" type: "Convolution" bottom: "res2a_branch2a" top: "res2a_branch2b" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 1 kernel_size: 3 group: 4 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res2a_branch2b/bn" type: "BatchNorm" bottom: "res2a_branch2b" top: "res2a_branch2b" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res2a_branch2b/relu" type: "ReLU" bottom: "res2a_branch2b" top: "res2a_branch2b" } layer { name: "pool2" type: "Pooling" bottom: "res2a_branch2b" top: "pool2" pooling_param { pool: MAX kernel_size: 2 stride: 2 } } layer { name: "res3a_branch2a" type: "Convolution" bottom: "pool2" top: "res3a_branch2a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 128 bias_term: true pad: 1 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res3a_branch2a/bn" type: "BatchNorm" bottom: "res3a_branch2a" top: "res3a_branch2a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res3a_branch2a/relu" type: "ReLU" bottom: "res3a_branch2a" top: "res3a_branch2a" } layer { name: "res3a_branch2b" type: "Convolution" bottom: "res3a_branch2a" top: "res3a_branch2b" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 128 bias_term: true pad: 1 kernel_size: 3 group: 4 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res3a_branch2b/bn" type: "BatchNorm" bottom: "res3a_branch2b" top: "res3a_branch2b" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res3a_branch2b/relu" type: "ReLU" bottom: "res3a_branch2b" top: "res3a_branch2b" } layer { name: "pool3" type: "Pooling" bottom: "res3a_branch2b" top: "pool3" pooling_param { pool: MAX kernel_size: 2 stride: 2 } } layer { name: "res4a_branch2a" type: "Convolution" bottom: "pool3" top: "res4a_branch2a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 256 bias_term: true pad: 1 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res4a_branch2a/bn" type: "BatchNorm" bottom: "res4a_branch2a" top: "res4a_branch2a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res4a_branch2a/relu" type: "ReLU" bottom: "res4a_branch2a" top: "res4a_branch2a" } layer { name: "res4a_branch2b" type: "Convolution" bottom: "res4a_branch2a" top: "res4a_branch2b" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 256 bias_term: true pad: 1 kernel_size: 3 group: 4 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "res4a_branch2b/bn" type: "BatchNorm" bottom: "res4a_branch2b" top: "res4a_branch2b" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res4a_branch2b/relu" type: "ReLU" bottom: "res4a_branch2b" top: "res4a_branch2b" } layer { name: "pool4" type: "Pooling" bottom: "res4a_branch2b" top: "pool4" pooling_param { pool: MAX kernel_size: 1 stride: 1 } } layer { name: "res5a_branch2a" type: "Convolution" bottom: "pool4" top: "res5a_branch2a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 512 bias_term: true pad: 2 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 2 } } layer { name: "res5a_branch2a/bn" type: "BatchNorm" bottom: "res5a_branch2a" top: "res5a_branch2a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res5a_branch2a/relu" type: "ReLU" bottom: "res5a_branch2a" top: "res5a_branch2a" } layer { name: "res5a_branch2b" type: "Convolution" bottom: "res5a_branch2a" top: "res5a_branch2b" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 512 bias_term: true pad: 2 kernel_size: 3 group: 4 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 2 } } layer { name: "res5a_branch2b/bn" type: "BatchNorm" bottom: "res5a_branch2b" top: "res5a_branch2b" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "res5a_branch2b/relu" type: "ReLU" bottom: "res5a_branch2b" top: "res5a_branch2b" } layer { name: "out5a" type: "Convolution" bottom: "res5a_branch2b" top: "out5a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 4 kernel_size: 3 group: 2 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 4 } } layer { name: "out5a/bn" type: "BatchNorm" bottom: "out5a" top: "out5a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "out5a/relu" type: "ReLU" bottom: "out5a" top: "out5a" } layer { name: "out5a_up2" type: "Deconvolution" bottom: "out5a" top: "out5a_up2" param { lr_mult: 0 decay_mult: 0 } convolution_param { num_output: 64 bias_term: false pad: 1 kernel_size: 4 group: 64 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "out3a" type: "Convolution" bottom: "res3a_branch2b" top: "out3a" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 1 kernel_size: 3 group: 2 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "out3a/bn" type: "BatchNorm" bottom: "out3a" top: "out3a" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "out3a/relu" type: "ReLU" bottom: "out3a" top: "out3a" } layer { name: "out3_out5_combined" type: "Eltwise" bottom: "out5a_up2" bottom: "out3a" top: "out3_out5_combined" } layer { name: "ctx_conv1" type: "Convolution" bottom: "out3_out5_combined" top: "ctx_conv1" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 1 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "ctx_conv1/bn" type: "BatchNorm" bottom: "ctx_conv1" top: "ctx_conv1" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "ctx_conv1/relu" type: "ReLU" bottom: "ctx_conv1" top: "ctx_conv1" } layer { name: "ctx_conv2" type: "Convolution" bottom: "ctx_conv1" top: "ctx_conv2" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 4 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 4 } } layer { name: "ctx_conv2/bn" type: "BatchNorm" bottom: "ctx_conv2" top: "ctx_conv2" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "ctx_conv2/relu" type: "ReLU" bottom: "ctx_conv2" top: "ctx_conv2" } layer { name: "ctx_conv3" type: "Convolution" bottom: "ctx_conv2" top: "ctx_conv3" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 4 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 4 } } layer { name: "ctx_conv3/bn" type: "BatchNorm" bottom: "ctx_conv3" top: "ctx_conv3" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "ctx_conv3/relu" type: "ReLU" bottom: "ctx_conv3" top: "ctx_conv3" } layer { name: "ctx_conv4" type: "Convolution" bottom: "ctx_conv3" top: "ctx_conv4" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 64 bias_term: true pad: 4 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 4 } } layer { name: "ctx_conv4/bn" type: "BatchNorm" bottom: "ctx_conv4" top: "ctx_conv4" batch_norm_param { moving_average_fraction: 0.99 eps: 0.0001 scale_bias: true } } layer { name: "ctx_conv4/relu" type: "ReLU" bottom: "ctx_conv4" top: "ctx_conv4" } layer { name: "ctx_final" type: "Convolution" bottom: "ctx_conv4" top: "ctx_final" param { lr_mult: 1 decay_mult: 1 } param { lr_mult: 2 decay_mult: 0 } convolution_param { num_output: 8 bias_term: true pad: 1 kernel_size: 3 kernel_size: 3 group: 1 stride: 1 weight_filler { type: "msra" } bias_filler { type: "constant" value: 0 } dilation: 1 } } layer { name: "ctx_final/relu" type: "ReLU" bottom: "ctx_final" top: "ctx_final" } layer { name: "out_deconv_final_up2" type: "Deconvolution" bottom: "ctx_final" top: "out_deconv_final_up2" param { lr_mult: 0 decay_mult: 0 } convolution_param { num_output: 8 bias_term: false pad: 1 kernel_size: 4 group: 8 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "out_deconv_final_up4" type: "Deconvolution" bottom: "out_deconv_final_up2" top: "out_deconv_final_up4" param { lr_mult: 0 decay_mult: 0 } convolution_param { num_output: 8 bias_term: false pad: 1 kernel_size: 4 group: 8 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "out_deconv_final_up8" type: "Deconvolution" bottom: "out_deconv_final_up4" top: "out_deconv_final_up8" param { lr_mult: 0 decay_mult: 0 } convolution_param { num_output: 8 bias_term: false pad: 1 kernel_size: 4 group: 8 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "argMaxOut" type: "ArgMax" bottom: "out_deconv_final_up8" top: "argMaxOut" argmax_param { axis: 1 } } + +The parameters that you mentioned are not part of Caffe / Caffe-jacinto - but I am guessing it may be for TIDL. You would have to consult the TIDL user guide or ask questions to TIDL experts (use TIDL as tag). + diff --git a/data2/text/range/10001-15000/888534.txt b/data2/text/range/10001-15000/888534.txt new file mode 100644 index 0000000000000000000000000000000000000000..8dd83a742382111689ed2f0ff729811f33d658fd --- /dev/null +++ b/data2/text/range/10001-15000/888534.txt @@ -0,0 +1,149 @@ +Ticket Name: TDA2HG: how to create a gstreamer source element which can send video frame to ducatih264enc + +Query Text: +Part Number: TDA2HG I create a source element based on pushsrc,but buffer_map failed when linked to ducatih264enc gstreamer links as below: mycamera -> ducatih264enc -> h264parse -> qtmux -> filesink location=test.mp4 test.mp4 contains all solid green color,and gstreamer output error 0:00:01.166878106 928 0x143950 ERROR default video-frame.c:155:gst_video_frame_map_id: failed to map buffer 0:00:01.168804730 928 0x143950 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5d01510: fd 31: mmap failed: Permission denied 0:00:01.168847674 928 0x143950 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5d01510: subclass map failed 0:00:01.168921850 928 0x143950 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5d01810: fd 36: mmap failed: Permission denied 0:00:01.168960077 928 0x143950 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5d01810: subclass map failed is there any example source element which can send data to ducatih264enc ? thanks. + +Responses: +Hi , Please confirm if you are using ProcessorSDK Linux Automotive(PSDKLA) or VisionSDK? If it is PSDKLA, you should be able to use v4l2src to capture and encode with ducatih264enc but if it is visionSDK, VIP is controlled by M4 and v4l2src can not be used. If you are using visionSDK, you should get the captured buffers from M4 to A15 and create a pseudo-source element which pushes buffers to encoder. Thanks RamPrasad + +hi,thanks for reply. I'm using VisionSDK-3.5, as you say i create a source element based on pushsrc element ( implement set_caps and fill function) , and my custom source element can got capture buffers. But my source element failed to call gst_video_frame_map,gstreamer output error message which in my question. Also i notice that v4l2src enable dmabuf by io-mode property ,but the source code confused me. I dont not know how and when to create dma buf for ducatih264enc in my source element. + +Hi li, There is one know issue with vmemexp driver that mmap returns 'Permission denied" error. I have confirmed this with this example #include #include #include #include #include #include #include "util.h" struct dmabuf_vmem_export { unsigned long vaddr; unsigned long size; int fd; }; #define DMABUF_CODE 0xDB #define DMABUF_BASE 0xD0 #define DBUFIOC_EXPORT_VIRTMEM _IOWR(DMABUF_CODE, DMABUF_BASE + 0, struct dmabuf_vmem_export) int main(int argc, char **argv) { int fd, file; void *malmem = NULL; void *vmem = NULL; struct dmabuf_vmem_export exp; int memcache; malmem = malloc(1024 * 1024 * 2); printf("Malloc allocated at %p\n", malmem); /* Export different memories */ fd = open("/dev/vmemexp", O_RDWR | O_CLOEXEC); printf("/dev/vmemexp opened, fd = %d\n", fd); exp.fd = -1; exp.vaddr = (unsigned long) malmem; exp.size = 1024 * 1024 * 2; ioctl(fd, DBUFIOC_EXPORT_VIRTMEM, &exp); printf("fd is %d\n", exp.fd); if(malmem) free(malmem); } For this reason gstreamer ducati encoder also is failing when gstreamer software is trying to do mmap. This can be avoid if dma-buf fd is passed to ducati encoder from pseudo-source plugin. I will let you know how to do it. Thanks RamPrasad + +hi,Ram, thanks for your help. I'll try it and update question if any question. + +hi,Ram, I update my source element to pseudo-srouce by implement get_time function,but still failed to mmap,output as below memory[0]: is dma buffer 0:00:00.348308047 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c01408: fd 29: mmap failed: Permission denied 0:00:00.348396050 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c01408: subclass map failed 0:00:00.348485191 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c01460: fd 30: mmap failed: Permission denied 0:00:00.348527159 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c01460: subclass map failed 0:00:00.348589460 1602 0x1a82f0 ERROR default video-frame.c:155:gst_video_frame_map_id: failed to map buffer failed to frame_map from gst_cameravpf_get_times framecount: 0 , timeunit: 33333333 pts: 0 dur: 33333333 from gst_cameravpf_fill memory[0]: is dma buffer 0:00:00.356804290 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c01510: fd 33: mmap failed: Permission denied 0:00:00.356851463 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c01510: subclass map failed 0:00:00.356930194 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c01568: fd 34: mmap failed: Permission denied 0:00:00.356969884 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c01568: subclass map failed 0:00:00.357032511 1602 0x1a82f0 ERROR default video-frame.c:155:gst_video_frame_map_id: failed to map buffer failed to frame_map from gst_cameravpf_get_times framecount: 0 , timeunit: 33333333 pts: 0 dur: 33333333 from gst_cameravpf_fill memory[0]: is dma buffer 0:00:00.359664946 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c015c0: fd 34: mmap failed: Permission denied 0:00:00.359708540 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c015c0: subclass map failed 0:00:00.359784994 1602 0x1a82f0 ERROR default gstfdmemory.c:111:gst_fd_mem_map: 0xb5c01618: fd 35: mmap failed: Permission denied 0:00:00.359825010 1602 0x1a82f0 ERROR GST_MEMORY gstmemory.c:324:gst_memory_map: mem 0xb5c01618: subclass map failed 0:00:00.359884383 1602 0x1a82f0 ERROR default video-frame.c:155:gst_video_frame_map_id: failed to map buffer and this is my get_time code static void gst_cameravpf_get_times(GstBaseSrc *bsrc, GstBuffer *buffer, + GstClockTime *start, GstClockTime *end) +{ + g_print("from %s\n", __FUNCTION__); + Gstcameravpf *src = GST_CAMERAVPF(bsrc); + /* for live sources, sync on the timestamp of the buffer */ + if (gst_base_src_is_live(bsrc)) + { + GstClockTime timeunit = gst_util_uint64_scale(1, + GST_SECOND * src->videoInfo.fps_d, src->videoInfo.fps_n); + std::cout << "framecount: " << src->frameCount << " , timeunit: " << timeunit << std::endl; + GST_BUFFER_PTS(buffer) = src->frameCount * timeunit; + GST_BUFFER_DURATION(buffer) = timeunit; + std::cout << "pts: " << GST_BUFFER_PTS(buffer) << " dur: " << GST_BUFFER_DURATION(buffer) << std::endl; + *end = GST_BUFFER_PTS(buffer) + GST_BUFFER_DURATION(buffer); + *start = GST_BUFFER_PTS(buffer); + } + else + { + *start = -1; + *end = -1; + } +} need i create dma buf fd for ducati? if so can you show some example code? Thanks. + +hi,RamPrasad Could you show me some example source element code that transfer data using dma? I implement GstPushSrc's alloc and fill function,here is the code: static GstFlowReturn gst_cameravpf_alloc(GstPushSrc *bsrc, GstBuffer **buf) +{ + std::cout << "from " << __FUNCTION__ << std::endl; + Gstcameravpf *src = GST_CAMERAVPF(bsrc); + GstBuffer *buffer; + GstMemory *mem; + GstMapInfo info; + + struct dmabuf_vmem_export exp; + exp.fd = -1; + exp.size = src->videoInfo.size; + exp.vaddr = reinterpret_cast(src->framebuffer); + int ret = ioctl(src->fd, DBUFIOC_EXPORT_VIRTMEM, &exp); + std::cout << "ret: " << ret << " fd: " << exp.fd << std::endl; + + buffer = gst_buffer_new(); + + GstAllocator *allocator = gst_dmabuf_allocator_new(); + mem = gst_dmabuf_allocator_alloc(allocator, exp.fd, src->videoInfo.size); + if (ret != 0) + return GST_FLOW_ERROR; + gst_buffer_append_memory(buffer, mem); + *buf = buffer; + return GST_FLOW_OK; +} static GstFlowReturn gst_cameravpf_fill(GstPushSrc *bsrc, GstBuffer *buf) +{ + std::cout << "from " << __FUNCTION__ << std::endl; + Gstcameravpf *src = GST_CAMERAVPF(bsrc); + guint64 currentTime = g_get_real_time(); + + guint memorynum = gst_buffer_n_memory(buf); + + if (gst_is_dmabuf_memory(gst_buffer_get_memory(buf, 0)) == TRUE) + std::cout << "memory[0]: is dma buffer" << std::endl; + +#ifdef USE_CAMERA + spFrame spfrm; + src->cameraPtr->getnextframe(spfrm); + if (!spfrm) + { + std::cout << "failed to get frame" << std::endl; + g_usleep(10 * 1000); + return GST_FLOW_OK; + } + memcpy(src->framebuffer, spfrm->get_addr(0), spfrm->get_datalen(0)); + memcpy(src->framebuffer + src->videoInfo.height * src->videoInfo.stride[0], spfrm->get_addr(1), spfrm->get_datalen(1)); + spfrm.reset(); +#else + memset(src->framebuffer, src->frameCount % 256, src->videoInfo.height * src->videoInfo.stride[0]); + memset(src->framebuffer + src->videoInfo.height * src->videoInfo.stride[0], 0x80, src->videoInfo.height / 2 * src->videoInfo.stride[1]); +#endif + GstVideoFrame frame; + + if (!gst_video_frame_map(&frame, &src->videoInfo, buf, GST_MAP_WRITE)) + { + std::cout << "failed to map for dma" << std::endl; + } + else + { + gst_video_frame_unmap(&frame); + } + + guint64 timeunit = gst_util_uint64_scale(1, + GST_SECOND * src->videoInfo.fps_d, src->videoInfo.fps_n); + GST_BUFFER_PTS(buf) = src->frameCount * timeunit; + GST_BUFFER_DTS(buf) = GST_CLOCK_TIME_NONE; + + GST_BUFFER_DURATION(buf) = timeunit; + + gst_object_sync_values(GST_OBJECT(bsrc), GST_BUFFER_PTS(buf)); + + guint64 time2sleep = (timeunit - currentTime + src->lastTime); + std::cout << "time2sleep: " << time2sleep / 1000000 << "(ms) , timeunit: " << timeunit << " , frameCount: " << src->frameCount << std::endl; + g_usleep(time2sleep / 1000); + + src->frameCount++; + src->lastTime = currentTime; + return GST_FLOW_OK; +} but,now gstreamer still failed,here is error message: stroot@dra7xx-evm:~# gst-launch-1.0 cameravpf ! ducatih264enc ! h264parse ! qtmux ! filesink location=abc.mp4 Setting pipeline to PAUSED ... from gst_cameravpf_start Pipeline is live and does not need PREROLL ... from gst_cameravpf_setcaps caps from setcaps: video/x-raw, width=(int)1280, height=(int)720, framerate=(fraction)30/1, format=(string)NV12 get videoinfo Setting pipeline to PLAYING ... from gst_cameravpf_alloc New clock: GstSystemClock ret: 0 fd: 30 from gst_cameravpf_fill memory[0]: is dma buffer failed to map for dma time2sleep: 33(ms) , timeunit: 33333333 , frameCount: 0 MmRpc_call: Error: write failed ERROR: from element /GstPipeline:pipeline0/Gstcameravpf:cameravpf0: Internal data flow error. Additional debug info: ../../../../gstreamer-1.6.3/libs/gst/base/gstbasesrc.c(2943): gst_base_src_loop (): /GstPipeline:pipeline0/Gstcameravpf:cameravpf0: streaming task paused, reason error (-5) ../git/libdce.c:965: process ERROR: Failed eError == DCE_EOK error val -5Execution ended after 0:00:00.042136847 Setting pipeline to PAUSED ... Setting pipeline to READY ... from gst_cameravpf_stop Setting pipeline to NULL ... Freeing pipeline ... + +Hi,RamPrasad: Could you show me some example in which ducatih264enc works? Thanks. + +Hi, TI did support a software called infoadas for which is based on visionDK for video recording usecase. but that was based on visionsdk3.02 I can point you to the gstreamer plugin source code. git clone git://git.ti.com/glsdk/gstreamer1-0-plugins-bad.git cd gstreamer1-0-plugins-bad git checkout origin/infoadas_k4.4 Here ext/infoadas directory has the gstreamer plugin which is nothing but source plugin which pushes the video buffers to ducatienc. The sample pipeline will look like #H264 single channel encode as elementary stream and display the video gst-launch-1.0 infoadas chain="lvds-vip-single-cam" \ ! queue ! tee name=t ! queue ! waylandsink use-drm=true sync=false \ t. ! queue ! ducatih264enc inter-interval=1 intra-interval=60 ! queue ! filesink location=bb_single_enc1.h264 sync=false You may find some functions vivi_xxx in this plugin. This is nothing but a userspace library called libinfoadas.so to get video buffers from visionSDK's M4 to A15. I hope this helps you. Thanks RamPrasad + +Hi,RamPrasad: I found that TI provied CMA library. Accroding that i can alloc memory for dma buffer. In my case , i create dma buffer in my source alloc function.Here is pesudo code: GstBuffer *buffer; + GstMemory *mem; + GstMapInfo info; + + CMEM_AllocParams params; + params.type = CMEM_HEAP; + params.flags = CMEM_CACHED; + params.alignment = 512; + int poolid = CMEM_getPool(src->videoInfo.size); + src->videobuffer = CMEM_allocPool(poolid, ¶ms); + std::cout << "videobuffer from CMEM_alloc2: " << std::hex << src->videobuffer << std::endl; + struct dmabuf_vmem_export exp; + exp.fd = -1; + exp.size = src->videoInfo.size; + exp.vaddr = reinterpret_cast(src->videobuffer); + int ret = ioctl(src->fd, DBUFIOC_EXPORT_VIRTMEM, &exp); + std::cout << "ret: " << ret << " fd: " << exp.fd << std::endl; + + buffer = gst_buffer_new(); + + GstAllocator *allocator = gst_dmabuf_allocator_new(); + mem = gst_dmabuf_allocator_alloc(allocator, exp.fd, src->videoInfo.size); + if (ret != 0) + return GST_FLOW_ERROR; + gst_buffer_append_memory(buffer, mem); + *buf = buffer; + diff --git a/data2/text/range/10001-15000/894517.txt b/data2/text/range/10001-15000/894517.txt new file mode 100644 index 0000000000000000000000000000000000000000..d64ad9702b1f389d4c81e42a81e6f7f56a8c1de0 --- /dev/null +++ b/data2/text/range/10001-15000/894517.txt @@ -0,0 +1,20 @@ +Ticket Name: CCS/TDA2EVM5777: Question related to projects + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio [9:49 pm, 05/04/2020] Reshma: Sir I run the semantic segmentation use case in tda2x board and I got this result [9:50 pm, 05/04/2020] Reshma: Sir for optimization what is the procedure sir please help me sir what is the meaning of this sentence sir U have to understand where on tda2 the DL network is running what operation is happening in each network layer and then check for the possibility of optimization of those low-level operations please tell me, sir, how to optimize this can work on finding the scope for optimization and define how will u optimize it and also please reply sir and help me sir thanks reshma m + +Responses: +>> what is the meaning of this sentence sir >> U have to understand where on tda2 the DL network is running what operation is happening in each network layer and then check for the possibility of optimization of those low-level operations We are also not sure, could you please check with him/her only. Thanks, Praveen + +C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\import>tidl_model_import.out.exe tidl_import_jseg21.txt Caffe Network File : C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\caffe_jacinto_models_caffe\trained\image_segmentation\cityscapes5_jsegnet21v2\sparse\deploy.prototxt Caffe Model File : C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\caffe_jacinto_models_caffe\trained\image_segmentation\cityscapes5_jsegnet21v2\sparse\cityscapes5_jsegnet21v2_iter_32000.caffemodel TIDL Network File : C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\tidl_models\tidl_net_jsegnet21v2.bin TIDL Model File : C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\tidl_models\tidl_param_jsegnet21v2.bin Name of the Network : jsegnet21v2_deploy Num Inputs : 1 Num of Layer Detected : 27 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 512 , 1024 , 0 , 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 512 , 1024 , 1 , 3 , 512 , 1024 , 1572864 , 2, TIDL_ConvolutionLayer , conv1a 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 512 , 1024 , 1 , 32 , 256 , 512 , 314572800 , 3, TIDL_ConvolutionLayer , conv1b 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 256 , 512 , 1 , 32 , 128 , 256 , 301989888 , 4, TIDL_ConvolutionLayer , res2a_branch2a 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 128 , 256 , 1 , 64 , 128 , 256 , 603979776 , 5, TIDL_ConvolutionLayer , res2a_branch2b 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 128 , 256 , 1 , 64 , 64 , 128 , 301989888 , 6, TIDL_ConvolutionLayer , res3a_branch2a 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 64 , 128 , 1 , 128 , 64 , 128 , 603979776 , 7, TIDL_ConvolutionLayer , res3a_branch2b 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 64 , 128 , 1 , 128 , 64 , 128 , 301989888 , 8, TIDL_PoolingLayer , pool3 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 64 , 128 , 1 , 128 , 32 , 64 , 1048576 , 9, TIDL_ConvolutionLayer , res4a_branch2a 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 32 , 64 , 1 , 256 , 32 , 64 , 603979776 , 10, TIDL_ConvolutionLayer , res4a_branch2b 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 32 , 64 , 1 , 256 , 32 , 64 , 301989888 , 11, TIDL_PoolingLayer , pool4 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 32 , 64 , 1 , 256 , 32 , 64 , 524288 , 12, TIDL_ConvolutionLayer , res5a_branch2a 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 32 , 64 , 1 , 512 , 32 , 64 ,2415919104 , 13, TIDL_ConvolutionLayer , res5a_branch2b 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 32 , 64 , 1 , 512 , 32 , 64 ,1207959552 , 14, TIDL_ConvolutionLayer , out5a 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 32 , 64 , 1 , 64 , 32 , 64 , 301989888 , 15, TIDL_Deconv2DLayer , out5a_up2 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 64 , 32 , 64 , 1 , 64 , 64 , 128 , 2097152 , 16, TIDL_ConvolutionLayer , out3a 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 16 , 1 , 128 , 64 , 128 , 1 , 64 , 64 , 128 , 301989888 , 17, TIDL_EltWiseLayer , out3_out5_combined 1, 2 , 1 , 15 , 16 , x , x , x , x , x , x , 17 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 524288 , 18, TIDL_ConvolutionLayer , ctx_conv1 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 301989888 , 19, TIDL_ConvolutionLayer , ctx_conv2 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 301989888 , 20, TIDL_ConvolutionLayer , ctx_conv3 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 301989888 , 21, TIDL_ConvolutionLayer , ctx_conv4 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 301989888 , 22, TIDL_ConvolutionLayer , ctx_final 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 64 , 64 , 128 , 1 , 8 , 64 , 128 , 37748736 , 23, TIDL_Deconv2DLayer , out_deconv_final_up2 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 8 , 64 , 128 , 1 , 8 , 128 , 256 , 1048576 , 24, TIDL_Deconv2DLayer , out_deconv_final_up4 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 8 , 128 , 256 , 1 , 8 , 256 , 512 , 4194304 , 25, TIDL_Deconv2DLayer , out_deconv_final_up8 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 8 , 256 , 512 , 1 , 8 , 512 , 1024 , 16777216 , 26, TIDL_ArgMaxLayer , argMaxOut 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 8 , 512 , 1024 , 1 , 1 , 512 , 1024 , 8388608 , Total Giga Macs : 8.8442 1 file(s) copied. Processing config file .\tempDir\qunat_stats_config.txt ! 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 512 , 1024 , 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 512 , 1024 , 1 , 3 , 512 , 1024 , 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 512 , 1024 , 1 , 32 , 256 , 512 , 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 256 , 512 , 1 , 32 , 128 , 256 , 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 128 , 256 , 1 , 64 , 128 , 256 , 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 128 , 256 , 1 , 64 , 64 , 128 , 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 64 , 128 , 1 , 128 , 64 , 128 , 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 64 , 128 , 1 , 128 , 64 , 128 , 8, TIDL_PoolingLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 64 , 128 , 1 , 128 , 32 , 64 , 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 32 , 64 , 1 , 256 , 32 , 64 , 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 32 , 64 , 1 , 256 , 32 , 64 , 11, TIDL_PoolingLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 32 , 64 , 1 , 256 , 32 , 64 , 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 32 , 64 , 1 , 512 , 32 , 64 , 13, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 32 , 64 , 1 , 512 , 32 , 64 , 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 32 , 64 , 1 , 64 , 32 , 64 , 15, TIDL_Deconv2DLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 64 , 32 , 64 , 1 , 64 , 64 , 128 , 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 16 , 1 , 128 , 64 , 128 , 1 , 64 , 64 , 128 , 17, TIDL_EltWiseLayer , 1, 2 , 1 , 15 , 16 , x , x , x , x , x , x , 17 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 64 , 64 , 128 , 1 , 64 , 64 , 128 , 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 64 , 64 , 128 , 1 , 8 , 64 , 128 , 23, TIDL_Deconv2DLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 8 , 64 , 128 , 1 , 8 , 128 , 256 , 24, TIDL_Deconv2DLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 8 , 128 , 256 , 1 , 8 , 256 , 512 , 25, TIDL_Deconv2DLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 8 , 256 , 512 , 1 , 8 , 512 , 1024 , 26, TIDL_ArgMaxLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 8 , 512 , 1024 , 1 , 1 , 512 , 1024 , 27, TIDL_DataLayer , 0, 1 , -1 , 26 , x , x , x , x , x , x , x , 0 , 1 , 1 , 512 , 1024 , 0 , 0 , 0 , 0 , Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot 2 72 72 72 32 32 32 3 32 3 1 8 1 3 16 8 5184 1024 1 3 40 34 40 32 32 32 8 8 8 4 8 1 2 16 8 1360 1024 1 4 40 34 40 32 32 32 32 64 32 6 8 1 6 8 4 1360 1024 1 5 40 34 40 32 32 32 16 16 16 6 8 1 3 8 4 1360 1024 1 6 40 34 40 32 32 32 64 128 64 6 8 1 11 4 2 1360 1024 1 7 40 34 40 32 32 32 32 32 32 6 8 1 6 4 2 1360 1024 1 9 40 34 40 32 32 32 128 256 128 6 8 1 22 2 1 1360 1024 1 10 40 34 40 32 32 32 64 64 64 6 8 1 11 2 1 1360 1024 1 12 40 20 40 32 16 32 256 512 256 8 8 1 32 2 2 800 512 1 13 40 36 40 32 32 32 128 128 128 5 8 1 26 2 1 1440 1024 1 14 40 24 40 32 16 32 256 32 256 8 8 1 32 2 2 960 512 1 16 40 34 40 32 32 32 64 32 64 6 8 1 11 4 2 1360 1024 1 18 40 34 40 32 32 32 64 64 64 6 8 1 11 4 2 1360 1024 1 19 40 40 40 32 32 32 64 64 64 5 8 1 13 4 2 1600 1024 1 20 40 40 40 32 32 32 64 64 64 5 8 1 13 4 2 1600 1024 1 21 40 40 40 32 32 32 64 64 64 5 8 1 13 4 2 1600 1024 1 22 40 34 40 32 32 32 64 8 64 6 8 1 11 4 2 1360 1024 1 Processing Frame Number : 0 Layer 1 : Out Q : 254 , TIDL_BatchNormLayer , PASSED #MMACs = 1.57, 1.57, Sparsity : 0.00 Layer 2 : Out Q : 6097 , TIDL_ConvolutionLayer, PASSED #MMACs = 314.57, 209.19, Sparsity : 33.50 Layer 3 : Out Q : 5378 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 122.16, Sparsity : 59.55 Layer 4 : Out Q : 13609 , TIDL_ConvolutionLayer, PASSED #MMACs = 603.98, 162.66, Sparsity : 73.07 Layer 5 : Out Q : 8489 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 123.86, Sparsity : 58.98 Layer 6 : Out Q : 9235 , TIDL_ConvolutionLayer, PASSED #MMACs = 603.98, 153.91, Sparsity : 74.52 Layer 7 : Out Q : 11745 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 103.55, Sparsity : 65.71 Layer 8 :TIDL_PoolingLayer, PASSED #MMACs = 0.26, 0.26, Sparsity : 0.00 Layer 9 : Out Q : 16199 , TIDL_ConvolutionLayer, PASSED #MMACs = 603.98, 142.94, Sparsity : 76.33 Layer 10 : Out Q : 14923 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 76.61, Sparsity : 74.63 Layer 11 :TIDL_PoolingLayer, PASSED #MMACs = 0.52, 0.52, Sparsity : 0.00 Layer 12 : Out Q : 25787 , TIDL_ConvolutionLayer, PASSED #MMACs = 2415.92, 500.01, Sparsity : 79.30 Layer 13 : Out Q : 6224 , TIDL_ConvolutionLayer, PASSED #MMACs = 1207.96, 221.44, Sparsity : 81.67 Layer 14 : Out Q : 10770 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 79.45, Sparsity : 73.69 Layer 15 : Out Q : 6165 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.52, 0.52, Sparsity : 0.00 Layer 16 : Out Q : 10642 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 96.17, Sparsity : 68.15 Layer 17 : Out Q : 4658 , TIDL_EltWiseLayer, PASSED #MMACs = 1.05, 1.05, Sparsity : 0.00 Layer 18 : Out Q : 13159 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 131.50, Sparsity : 56.46 Layer 19 : Out Q : 15034 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 125.67, Sparsity : 58.39 Layer 20 : Out Q : 16267 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 128.61, Sparsity : 57.41 Layer 21 : Out Q : 11247 , TIDL_ConvolutionLayer, PASSED #MMACs = 301.99, 122.65, Sparsity : 59.39 Layer 22 : Out Q : 3107 , TIDL_ConvolutionLayer, PASSED #MMACs = 37.75, 14.84, Sparsity : 60.68 Layer 23 : Out Q : 1583 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.26, 0.26, Sparsity : 0.00 Layer 24 : Out Q : 1600 , TIDL_Deconv2DLayer, PASSED #MMACs = 1.05, 1.05, Sparsity : 0.00 Layer 25 : Out Q : 1604 , TIDL_Deconv2DLayer, PASSED #MMACs = 4.19, 4.19, Sparsity : 0.00 Layer 26 :TIDL_ArgMaxLayer, PASSED #MMACs = 4.19, 4.19, Sparsity : 0.00 End of config list found ! C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\test\testvecs\config\import> same thnk i asked please tell me sir Optimization I have told u many times U have to understand where on tda2 the DL network is running what operation are happening in each network layer and then check for possibility of optimization of those low level operation + +Caffe based model convolution layer output optimization issue on board when I am running the use case on the tda2x board please reply sir thanks Reshma + +sir please reply sir its very urgent sir + +>> Caffe based model convolution layer output optimization issue on board when I am running the use case on the tda2x board please reply sir What optimization issue you are using facing ? could you please explain more about the issue ? Thanks, Praveen + +sir actually i am not understanding what I need to do please tell me sir how to optimize the network thanks Reshma M + +Hi Reshma, I am also really not understanding what you need to do here, because as I told you couple of times that this network is already fully optimized and no further optimization possible here. So, please understand your requirement correct first and try to come out with proper questions and don't ask same questions again and again. We are happy to help but not for the questions you also don't have clarity. So, first get the clarity on this from the person who assigned this to you or who asked to do this optimization. Thanks Praveen + diff --git a/data2/text/range/10001-15000/911126.txt b/data2/text/range/10001-15000/911126.txt new file mode 100644 index 0000000000000000000000000000000000000000..c668e82783abe776606fa62659dc8799b5293144 --- /dev/null +++ b/data2/text/range/10001-15000/911126.txt @@ -0,0 +1,22 @@ +Ticket Name: CCS/TDA2EVM5777: Where Can I get a default configuration file for TDA2EVM5777? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hello I have a below board. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 I think for operating board, I need a configuration file. When after creating a CCS project, I think I have to "import" some zip file about board. (for memory, peripheral etc..) I don't know how to say exactly, but you know what I'm saying. (default configuration file / minimum configuration file maybe) I installed PROCESSOR_SDK_VISION_03_07_00_00 Where Can I get an above-mentioned file(default configuration file)? or Could you send me by email? +) additionally, when I create CCS project, on "Target" shell, I don't know what is my board type. actually, I thought the board is TDA2x. so I chose target to "TDA2x", and the project example was "Hello World" in Basic Examples. but the project didn't function. so I chose another target "GPEVM_AM572X_SiRevA", then the project did function. I wondering whether the target is TDA2x or GPEVM_AM572X_SiRevA. Thank you From. Kang Hello I have a below board. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 I think for operating board, I need a configuration file. When after creating a CCS project, I think I have to "import" some zip file about board. (for memory, peripheral etc..) I don't know how to say exactly, but you know what I'm saying? (default configuration file / minimum configuration file maybe) I installed PROCESSOR_SDK_VISION_03_07_00_00 Where Can I get an above-mentioned file(default configuration file)? Could you send me by email? +) additionally, when I create CCS project, on target shell, I don't know what is my board type actually, I thought the board is TDA2x. so I chose to target "TDA2x", and the project example is "Hello World" in Basic Examples. but the project doesn't function. so I chose another target "GPEVM_AM572X_SiRevA", then the project does function. I wondering whether the target is TDA2x or GPEVM_AM572X_SiRevA. Hello I have a below board. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 I think for operating board, I need a configuration file. When after creating a CCS project, I think I have to "import" some zip file about board. (for memory, peripheral etc..) I don't know how to say exactly, but you know what I'm saying? (default configuration file / minimum configuration file maybe) I installed PROCESSOR_SDK_VISION_03_07_00_00 Where Can I get an above-mentioned file(default configuration file)? Could you send me by email? +) additionally, when I create CCS project, on target shell, I don't know what is my board type actually, I thought the board is TDA2x. so I chose to target "TDA2x", and the project example is "Hello World" in Basic Examples. but the project doesn't function. so I chose another target "GPEVM_AM572X_SiRevA", then the project does function. I wondering whether the target is TDA2x or GPEVM_AM572X_SiRevA. Hello I have a below board. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 I think for operating board, I need a configuration file. When after creating a CCS project, I think I have to "import" some zip file about board. (for memory, peripheral etc..) I don't know how to say exactly, but you know what I'm saying? (default configuration file / minimum configuration file maybe) I installed PROCESSOR_SDK_VISION_03_07_00_00 Where Can I get an above-mentioned file(default configuration file)? Could you send me by email? +) additionally, when I create CCS project, on target shell, I don't know what is my board type actually, I thought the board is TDA2x. so I chose to target "TDA2x", and the project example is "Hello World" in Basic Examples. but the project doesn't function. so I chose another target "GPEVM_AM572X_SiRevA", then the project does function. I wondering whether the target is TDA2x or GPEVM_AM572X_SiRevA. Eng 여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를 위해 구성 파일이 필요하다고 생각합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 아십니까? (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 추가적으로 대상 쉘에서 CCS 프로젝트를 만들 때 보드 유형이 무엇인지 모릅니다. 실제로 보드는 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. Eng 여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를 위해 구성 파일이 필요하다고 생각합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 아십니까? (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 추가적으로 대상 쉘에서 CCS 프로젝트를 만들 때 보드 유형이 무엇인지 모릅니다. 실제로 보드는 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 안녕하세요, 아래 보드가 있습니다. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 보드를 조작하려면 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 알고 있습니까? (기본 구성 파일 / 최소 구성 파일 일 수 있음) PROCESSOR_SDK_VISION_03_07_00_00 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 또한 대상 쉘에서 CCS 프로젝트를 만들 때 실제로 보드 유형이 무엇인지 알 수 없으며 보드가 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 영어 여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를위한 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야합니다. (메모리, 주변 장치 등) (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 그러나 거기에 대한 파일 (기본 구성 파일) 당신은 이메일로 +) 커널 대상 쉘에서 CCS 프로젝트를 만들 수 있습니다. 물론 보드는 TDA2x라고 생각했습니다. "TDA2x"는 "Hello World"입니다. 실제로 프로젝트는 작동하지 않습니다. 다른 방법 "GPEVM_AM572X_SiRevA"를 선택하십시오. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. Eng 여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를 위해 구성 파일이 필요하다고 생각합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 아십니까? (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 추가적으로 대상 쉘에서 CCS 프로젝트를 만들 때 보드 유형이 무엇인지 모릅니다. 실제로 보드는 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 안녕하세요, 아래 보드가 있습니다. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 보드를 조작하려면 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 알고 있습니까? (기본 구성 파일 / 최소 구성 파일 일 수 있음) PROCESSOR_SDK_VISION_03_07_00_00 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 또한 대상 쉘에서 CCS 프로젝트를 만들 때 실제로 보드 유형이 무엇인지 알 수 없으며 보드가 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 안녕하세요, 아래 보드가 있습니다. VAYA CPU BOARD ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 보드를 조작하려면 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야한다고 생각합니다. (메모리, 주변 장치 등) 정확히 말하는 방법을 모르겠지만 내가 무슨 말을하는지 알고 있습니까? (기본 구성 파일 / 최소 구성 파일 일 수 있음) PROCESSOR_SDK_VISION_03_07_00_00 위에서 언급 한 파일 (기본 구성 파일)을 어디서 구할 수 있습니까? 당신은 이메일로 저를 보낼 수 있습니까? +) 또한 대상 쉘에서 CCS 프로젝트를 만들 때 실제로 보드 유형이 무엇인지 알 수 없으며 보드가 TDA2x라고 생각했습니다. "TDA2x"를 대상으로하기로 선택했고 기본 예제에서 프로젝트 예제는 "Hello World"입니다. 그러나 프로젝트는 작동하지 않습니다. 다른 타겟 "GPEVM_AM572X_SiRevA"를 선택하면 프로젝트가 작동합니다. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 영어로 말하기 VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를위한 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야합니다. (메모리, 주변 장치 등) (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 그러나 거기에 대한 파일 (기본 구성 파일) 당신은 이메일로 +) 커널 대상 쉘에서 CCS 프로젝트를 만들 수 있습니다. 물론 보드는 TDA2x라고 생각했습니다. "TDA2x"는 "Hello World"입니다. 실제로 프로젝트는 작동하지 않습니다. 다른 방법 "GPEVM_AM572X_SiRevA"를 선택하십시오. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 영어 여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를위한 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야합니다. (메모리, 주변 장치 등) (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. 그러나 거기에 대한 파일 (기본 구성 파일) 당신은 이메일로 +) 커널 대상 쉘에서 CCS 프로젝트를 만들 수 있습니다. 물론 보드는 TDA2x라고 생각했습니다. "TDA2x"는 "Hello World"입니다. 실제로 프로젝트는 작동하지 않습니다. 다른 방법 "GPEVM_AM572X_SiRevA"를 선택하십시오. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 안녕하세요, 아래쪽 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 보드 선택 옵션 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야합니다. (메모리, 주변 장치 등) (기본 구성 파일 / 최소 구성 파일 일 수 있음) PROCESSOR_SDK_VISION_03_07_00_00 다른 언어 파일 (기본 구성 파일) 당신은 이메일로 +) 추가 대상 쉘에서 CCS 프로젝트를 만들 수 있습니다. "TDA2x"는 "Hello World"입니다. 실제로 프로젝트는 작동하지 않습니다. 다른 방법 "GPEVM_AM572X_SiRevA"를 선택하십시오. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. 영어여보세요 아래 보드가 있습니다. VAYA CPU 보드 ES2.0 GP / EVM5777BG-03-00-00 / TDA2EVM5777 운영 보드를위한 구성 파일이 필요합니다. CCS 프로젝트를 만든 후 보드에 대한 zip 파일을 "가져 오기"해야합니다. (기본, 주변 장치 등) (기본 구성 파일 / 최소 구성 파일) PROCESSOR_SDK_VISION_03_07_00_00을 설치했습니다. CCS 프로젝트를 구성 할 수 있습니다. 물론 보드는 TDA2x라고 생각했습니다. "TDA2x"는 "Hello World"입니다. 실제로 프로젝트는 작동하지 않습니다. 다른 방법 "GPEVM_AM572X_SiRevA"를 선택하십시오. 대상이 TDA2x인지 또는 GPEVM_AM572X_SiRevA인지 궁금합니다. {"mean":["have

[동사]\n\t\t \t(진행형으로는 쓰이지 않음)\n\t\t \t\t(have got)\n\t\t \t\t가지다, 있다, 소유하다","board

[명사]\n\t\t \t\t판자, 널\n\n\t\t 참조 chipboard, floorboard, hardboard, skirting board","think

[동사]\n\t\t \t(진행형으로는 쓰이지 않음)\n\t\t ~ (about sth)\n\t\t \t\t(…라고) 생각하다, (생각에) …일 것 같다; (…라고) 믿다","for

[전치사]\n\t\t \t\t(…가 갖게 하기) 위한, …의, …에 둘","operate

[동사]\n\t\t \t\t(기계가 특정 방식으로) 작동[가동]되다\n\n\t\t\t\t\t\t\t\t유의어 function"],"word":"\n\t\t\t\t\t\thave\n \t\t\t\n\t \t\n\t ","soundUrl":" dict-dn.pstatic.net/v + +Responses: +Hi, please check this Application Note: for debugging VisionSDK you can check "PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/docs/TrainingSlides/CCS_Debug_Trace.pdf" Regards, Yordan + +Hello, In addition to what Yordan suggested, make sure you have also installed the device support package and emulation package on your CCS distribution (see automotive section since you have TDA2). https://software-dl.ti.com/ccs/esd/documents/ccs_device_support_files.html That will bring in what you call a "default" device target configuration option along with the basic gel initialization scripts and peripheral xmls. After which you should choose TDA2x and go with that. The AM572 is a very similar device to TDA2, so that's why it may be working, but it's for a different market and uses another SDK, so you should definitely use the proper part to use the Vision SDK going forward. hope it helps, thanks, Alex + +Thanks, I'll check that! + +I did, but this problem has occurred and the code is a basic example "Hello World" I did, but this problem has occurred Eng 했지만이 문제가 발생했습니다 {"mean":["occur\n \t\t\t\n\t \t(←occurred)

[동사]\n\t\t (격식)\n\t\t \t\t일어나다, 발생하다","have\n \t\t\t\n\t \t(←has)

[동사]\n\t\t \t(진행형으로는 쓰이지 않음)\n\t\t \t\t(have got)\n\t\t \t\t가지다, 있다, 소유하다","problem

[명사]\n\t\t \t\t(다루거나 이해하기 힘든) 문제","this

[한정사, 대명사]\n\t\t \t\t(가까이 있는 것을 가리켜) 이; 이것","but

[접속사]\n\t\t \t\t그러나[-이나], 하지만[-지만]"],"word":"\n\t\t\t\t\t\toccur\n \t\t\t\n\t \t(←occurred)\n\t ","soundUrl":" dict-dn.pstatic.net/v + +Can you re-attach the error screenshot? the image link is broken. Are you able to connect to cores successfully? (without running any code yet) thanks, Alex + +the first one is this and the second one yep I connect core successfully and the first image is after connecting core and when load hello code (a.out) out [aʊt] Eng 1.out [부사, 전치사] ~ (of sth) <장소사물의 안에서부터 멀어져 가거나 밖으로 나옴을 나타냄> 2.out. [약어] outlet; output. 3.out- [접두사] (동사에서) <‘…보다 더 크다[많다/길다]’ 등의 뜻을 나타냄> 4.Out (카지노용어) 아웃 참조 out in front 5.bur|\|out The art of taking a ***, and forgetting to whipe. 6.아웃 out out 7.부재중 不在中 Out.(게시) 8.외 外 (바깥) outside, out(of), outer, foreign 9.감손 減損 diminution, (줄어짐) decrease, (손해) loss, (마손) wear, 감손하다 diminish, decrease, lessen, be impaired, wear out(닳다) 10.교신끝 (군사) out ▶무전교신 {"mean":["out

[부사, 전치사]\n\t\t ~ (of sth)\n\t\t \t\t<장소사물의 안에서부터 멀어져 가거나 밖으로 나옴을 나타냄>","out.

[약어]\n\t\t \t\toutlet; output.","out-

[접두사]\n\t\t \t(동사에서)\n\t\t \t\t<‘…보다 더 크다[많다/길다]’ 등의 뜻을 나타냄>","Out

(카지노용어)\n\t\t \t\t아웃\n\n\t\t 참조 out in front","bur|\\|out

The art of taking a ***, and forgetting to whipe.","아웃\n \t\t\tout

out","부재중\n \t\t\t不在中

Out.(게시)","외\n \t\t\t外

(바깥) outside, out(of), outer, foreign","감손\n \t\t\t減損

diminution, (줄어짐) decrease, (손해) loss, (마손) wear, 감손하다 diminish, decrease, lessen, be impaired, wear out(닳다)","교신끝

(군사)\n\t\t \t\tout ▶무전교신"],"word":"\n\t\t\t\t\t\tout\n \t\t\t\n\t \t\n\t ","soundUrl":" dict-dn.pstatic.net/v + +OK, we have an article on this type of error. Please go through it and see if that helps. thanks, Alex + +Thank you Alex! + diff --git a/data2/text/range/10001-15000/913754.txt b/data2/text/range/10001-15000/913754.txt new file mode 100644 index 0000000000000000000000000000000000000000..3fc4fecf237cea5575761338cfc4941efe1f2147 --- /dev/null +++ b/data2/text/range/10001-15000/913754.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2EVM5777: Run time Error. While Running chains_main_bios_misc.c file + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: INA226 1.I have generated Usecase with Alg_ColorToGray. 2.I compiled Usecase. 3.While Running Usecase I am getting error as "Unsupported option" in chains_main_bios_misc.c file inVoid Chains_menuMiscTestRun() function while selecting my Usecase function. 4.Can Anyone Guide me regarding thi + +Responses: +I am Showing Text file TDA2xx SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed DDR Config Completed App Image Download Begins SD Boot - file open completed successfully IPU1 CPU0 Image Load Completed DSP1 Image Load Completed App Image Download Completed Putting MPU CPU1 in Off mode EVE MMU configuration completed EVE MMU configuration completed EVE MMU configuration completed EVE MMU configuration completed ***************************************************************** PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles SBL Initial Config Cycles - 131789 (11.24 ms) SOC Init Cycles - 170931 (14.58 ms) DDR Config Clock Cycles - 43442 (3.70 ms) App Image Load Cycles - 13912159 (1187.17 ms) Slave Core Bootup Cycles - 208266 (17.77 ms) SBL Boot-up Cycles - 14467650 (1234.57 ms) Time at which SBL started IPU1_0 - 50709 (4.32 ms) ***************************************************************** Putting MPU in Retention... [IPU1-0] 1.552308 s: ***** IPU1_0 Firmware build time 14:15:10 May 23 2020 [IPU1-0] 1.552522 s: *** SYSTEM: CPU Frequency , [IPU1-0] 1.553406 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-0] 1.555175 s: *** UTILS: CPU MHz = 20 Mhz *** [IPU1-0] 1.555328 s: SYSTEM: System Common Init in progress !!! [IPU1-0] 1.565241 s: UTILS: CIO: Init Done !!! [IPU1-0] 1.565332 s: SYSTEM: IPC init in progress !!! [IPU1-0] 1.565393 s: SYSTEM: Notify init done !!! [IPU1-0] 1.567071 s: SYSTEM: MsgQ init done !!! [IPU1-0] 1.567162 s: SYSTEM: IPC init DONE !!! [IPU1-0] 1.570761 s: SYSTEM: System Common Init Done !!! [IPU1-0] 1.570853 s: SYSTEM: System Init in progress !!! [IPU1-0] 1.570914 s: SYSTEM: BSP Common Init in progress !!! [IPU1-0] 1.571005 s: SYSTEM: BSP Common Init Done !!! [IPU1-0] 1.571066 s: SYSTEM: BSP Platform Init in progress !!! [IPU1-0] 1.571219 s: SYSTEM: BSP Platform Init Done !!! [IPU1-0] 1.571280 s: SYSTEM: FVID2 Init in progress !!! [IPU1-0] 1.571402 s: SYSTEM: FVID2 Init Done !!! [IPU1-0] 1.571463 s: SYSTEM: VPS Init in progress !!! [IPU1-0] 1.571524 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] [IPU1-0] 1.574513 s: *** VPDMA Firmware Loading... *** [IPU1-0] 1.574635 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 1.574696 s: VPDMA Load Address = 0x4897d004 [IPU1-0] 1.574818 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 1.574879 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 1.574971 s: *** VPDMA Firmware Load Success *** [IPU1-0] 1.575306 s: *** VPDMA Firmware Loading... *** [IPU1-0] 1.575398 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 1.575459 s: VPDMA Load Address = 0x4899d004 [IPU1-0] 1.575581 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 1.575642 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 1.575733 s: *** VPDMA Firmware Load Success *** [IPU1-0] 1.576038 s: *** VPDMA Firmware Loading... *** [IPU1-0] 1.576130 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 1.576221 s: VPDMA Load Address = 0x489bd004 [IPU1-0] 1.576313 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 1.576374 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 1.576465 s: *** VPDMA Firmware Load Success *** [IPU1-0] 1.576770 s: *** VPDMA Firmware Loading... *** [IPU1-0] 1.576862 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 1.576953 s: VPDMA Load Address = 0x489dd004 [IPU1-0] 1.577045 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 1.577106 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 1.577197 s: *** VPDMA Firmware Load Success *** [IPU1-0] 1.635728 s: SYSTEM: VPS Init Done !!! [IPU1-0] 1.636613 s: UTILS: DMA: HWI Create for INT34 !!! [IPU1-0] 1.636796 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU1-0] 1.636887 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 259992 B (253 KB) [IPU1-0] 1.637040 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 1.637223 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 368037888 B (350 MB) [IPU1-0] 1.637406 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 129664 B (0 MB), Free size = 128896 B (0 MB) [IPU1-0] 1.637558 s: SYSTEM: Initializing Links !!! [IPU1-0] 1.897364 s: SYSTEM: Initializing Links ... DONE !!! [IPU1-0] 1.900597 s: BOARD: Board Init in progress !!! [IPU1-0] 1.901024 s: BOARD: Board Init Done !!! [IPU1-0] 1.912249 s: [IPU1-0] 1.912310 s: Vision SDK Version : [REL_VISION_SDK_03_04_00_00] [IPU1-0] 1.912401 s: FVID2 Version : [FVID_02_01_00_01] [IPU1-0] 1.912462 s: BSP Version : [PDK_01_10_00_xx] [IPU1-0] 1.912523 s: Platform : [EVM] [IPU1-0] 1.912584 s: SOC : [TDA2XX] [IPU1-0] 1.912645 s: SOC Revision : [ES1.1] [IPU1-0] 1.912706 s: Board Detected : [Vision] [IPU1-0] 1.918440 s: EEPROM Base Board Name: [5777xCPU] [IPU1-0] 1.918501 s: Base Board Revision : [REV E] [IPU1-0] 1.919813 s: Daughter Card Revision: [REV D] [IPU1-0] 1.919874 s: [IPU1-0] 1.923656 s: SYSTEM: UART: INTERRUPT Mode is Selected [DSP1 ] 1.553406 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP1 ] 1.553589 s: *** UTILS: CPU MHz = 20 Mhz *** [DSP1 ] 1.553620 s: SYSTEM: System Common Init in progress !!! [DSP1 ] 1.553803 s: UTILS: CIO: Init Done !!! [DSP1 ] 1.553833 s: SYSTEM: IPC init in progress !!! [DSP1 ] 1.553864 s: SYSTEM: Notify init done !!! [DSP1 ] 1.553986 s: SYSTEM: MsgQ init done !!! [DSP1 ] 1.554016 s: SYSTEM: IPC init DONE !!! [DSP1 ] 1.554748 s: SYSTEM: System Common Init Done !!! [DSP1 ] 1.554779 s: SYSTEM: System DSP Init in progress !!! [DSP1 ] 1.554962 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [DSP1 ] 1.554992 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 1.555053 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 522272 B (510 KB) [DSP1 ] 1.555114 s: SYSTEM: Initializing Links !!! [DSP1 ] 1.563014 s: SYSTEM: Initializing Links ... DONE !!! [DSP1 ] 1.563075 s: SYSTEM: System DSP Init Done !!! [DSP1 ] 1.900597 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [DSP1 ] 1.900628 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [IPU1-0] 3.063624 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines [IPU1-0] 3.067894 s: QSPI Init Started [IPU1-0] 3.068169 s: MID - 1 [IPU1-0] 3.068260 s: DID - 18 [IPU1-0] 3.068291 s: QSPI Init Completed Sucessfully [IPU1-0] 3.080979 s: [IPU1-0] 3.081040 s: Current System Settings, [IPU1-0] 3.081101 s: ======================== [IPU1-0] 3.081162 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 3.081254 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 [IPU1-0] 3.081345 s: My IP address : none [IPU1-0] 3.081406 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] [IPU1-0] 3.081467 s: [IPU1-0] 3.081498 s: ============ [IPU1-0] 3.081559 s: Usecase Menu [IPU1-0] 3.081589 s: ============ [IPU1-0] 3.081620 s: [IPU1-0] [IPU1-0] Vision SDK Usecases, [IPU1-0] -------------------- [IPU1-0] 1: Single Camera Usecases [IPU1-0] 2: Multi-Camera LVDS Usecases [IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) [IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) [IPU1-0] 5: ISS Usecases, (TDA3x ONLY) [IPU1-0] 6: TDA2x Stereo Usecases [IPU1-0] 9: RADAR Usecases [IPU1-0] a: Miscellaneous test's [IPU1-0] f: TIDL Usecase [IPU1-0] g: Camera Radar Combo Usecases [IPU1-0] [IPU1-0] s: System Settings [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 10.873238 s: [IPU1-0] 10.873299 s: [IPU1-0] [IPU1-0] Miscellaneous Test's [IPU1-0] -------------------- [IPU1-0] 1: File IO using MMCSD [IPU1-0] 2: RGB to Gray [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 25.880650 s: [IPU1-0] 25.880711 s: Unsupported option '2'. Please try again [IPU1-0] 25.880772 s: [IPU1-0] [IPU1-0] Miscellaneous Test's [IPU1-0] -------------------- [IPU1-0] 1: File IO using MMCSD [IPU1-0] 2: RGB to Gray [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] + +Hi Vipul, from the way your menu looks I conclude you have replaced the "NullSrc (Encoded) + Decode + Display and Null" usecase with your one (it is selected with '2'). Can you check the switch...case in function Chains_menuMiscTestRun() - there is "#ifdef UC_null_src_dec_display" around "case '2'" and since you do not use this usecase this part of the code might be excluded from the build. Can you check if the "case" block that selects your usecase is included in the build and it gets selected when you press the particular key? Regards, Yordan + +char gChains_menuMiscTests[] = { "\r\n " "\r\n Miscellaneous Test's" "\r\n --------------------" /* #if ( defined(FATFS_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ ( defined(FATFS_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) */ "\r\n 1: File IO using MMCSD" //#endif #ifdef UC_nullSrcAlg "\r\n 2: RGB to Gray" #endif "\r\n " "\r\n x: Exit " "\r\n " "\r\n Enter Choice: " "\r\n " }; Void Chains_menuMiscTestRun() { Bool done = FALSE; char ch; while(!done) { Vps_printf(gChains_menuMiscTests); ch=Chains_readChar(); Vps_printf(" \r\n"); switch(ch) { case '1': Utils_fileTestRun(); break; #ifdef UC_Algorithm case '2': Chains_nullSrcAlg(&gChains_usecaseCfg); break; #endif case 'x': done=TRUE; break; default: Vps_printf(" Unsupported option '%c'. Please try again\n", ch); break; } } } + +Please Ignore the above char gChains_menuMiscTests[] = { "\r\n " "\r\n Miscellaneous Test's" "\r\n --------------------" /* #if ( defined(FATFS_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ ( defined(FATFS_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) */ "\r\n 1: File IO using MMCSD" //#endif #ifdef UC_Algorithm "\r\n 2: RGB to Gray" #endif "\r\n " "\r\n x: Exit " "\r\n " "\r\n Enter Choice: " "\r\n " }; Void Chains_menuMiscTestRun() { Bool done = FALSE; char ch; while(!done) { Vps_printf(gChains_menuMiscTests); ch=Chains_readChar(); Vps_printf(" \r\n"); switch(ch) { case '1': Utils_fileTestRun(); break; #ifdef UC_Algorithm case '2': Chains_nullSrcAlg(&gChains_usecaseCfg); break; #endif case 'x': done=TRUE; break; default: Vps_printf(" Unsupported option '%c'. Please try again\n", ch); break; } } } + +Hi Vipul, can you make sure "UC_Algorithm" is defined (you can add print after case '2' and see if it is output on the console) Also you should not call "Chains_nullSrcAlg(&gChains_usecaseCfg);" there, you should call the entry function of your usecase. Regards, Yordan + diff --git a/data2/text/range/10001-15000/920706.txt b/data2/text/range/10001-15000/920706.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f78da02c4aeb08ddfd4883d3dc8cc89c04bc9ce --- /dev/null +++ b/data2/text/range/10001-15000/920706.txt @@ -0,0 +1,123 @@ +Ticket Name: TDA2HG: 【OpenGL】 How to use the FBO with NV12 + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hello: Environment VisionSDK 3.05 As you known, the OpenGL on visonSDK only support the NV12 input, thus when we bind the texture, have to use glGenTextures(1, outTexIndex); + System_eglCheckGlError("glGenTextures"); + printf("outTexIndex 0x%x \n",*outTexIndex); + + glBindTexture(GL_TEXTURE_EXTERNAL_OES, *outTexIndex); + System_eglCheckGlError("glBindTexture"); + + glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MIN_FILTER, GL_LINEAR); + glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MAG_FILTER, GL_LINEAR); + System_eglCheckGlError("glTexParameteri"); + + glEGLImageTargetTexture2DOES(GL_TEXTURE_EXTERNAL_OES, (GLeglImageOES)textImg); + System_eglCheckGlError("glEGLImageTargetTexture2DOES"); and if we want to use the FBO(framebufferobject), like: glBindTexture(GL_TEXTURE_2D, m_stage_texture[i]); +#if GLOBAL_RUN_ENV_DESKTOP == 0 && defined APP_RUN_ON_IMX6 + // map addr to opengl viv + (*g_pFNglTexDirectVIVMap)(GL_TEXTURE_2D, width, height, fbo_format, + (void **)&(m_stage_fbo_vaddr[i]), (const GLuint *)(&m_stage_fbo_paddr[i])); +#else + glTexImage2D(GL_TEXTURE_2D, 0, fbo_format, width, height, + 0, fbo_format, GL_UNSIGNED_BYTE, NULL); +#endif + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); + + // bind renderbuffer and create a 16-bit depth buffer + // width and height of renderbuffer = width and height of + // the texture + glBindRenderbuffer(GL_RENDERBUFFER, m_stage_depth_render_buffer[i]); + glRenderbufferStorage(GL_RENDERBUFFER, GL_DEPTH_COMPONENT16, width, height); + + // bind the framebuffer + glBindFramebuffer(GL_FRAMEBUFFER, m_stage_fbo[i]); + // specify texture as color attachment + glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_2D, m_stage_texture[i], 0); + eglCheckGlError("glFramebufferTexture2D"); + printf("andy debug test glFramebufferTexture2D \n"); + // specify depth_renderbufer as depth attachment + glFramebufferRenderbuffer(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_RENDERBUFFER, m_stage_depth_render_buffer[i]); + // check for framebuffer complete + GLenum status = glCheckFramebufferStatus(GL_FRAMEBUFFER); for above code, how we can use the FBO with NV12? per discussed before, the FBO only support the RGB, that means we can't use FBO with NV12? + +Responses: +Hello, Can you please describe your use case? Are you trying to read NV12 and write to an RGB FBO? Or are you trying to write YUV output to an FBO? Reading YUV textures and writing to an RGB framebuffer should work just fine. For your reference, I am attaching a text file with EGL and OpenGLES extensions that we support. sgx_extensions.txt EGL extensions: EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL +_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import +EGL client APIs are: OpenGL_ES + +OpenGL ES 1 Information: + +GLES 2 String Information : + GL_VENDOR = Imagination Technologies + GL_RENDERER = PowerVR SGX 544MP + GL_VERSION = OpenGL ES 2.0 build 1.17@4948957 + GL_SHADING_LANGUAGE_VERSION = OpenGL ES GLSL ES 1.00 build 1.17@4948957 + GL_EXTENSIONS = GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth24 GL_OES_depth_texture GL_OES_egl_sync GL_OES_element_index_uint GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_fbo_render_mipmap GL_OE +S_fragment_precision_high GL_OES_get_program_binary GL_OES_mapbuffer GL_OES_packed_depth_stencil GL_OES_required_internalformat GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_surfaceless_context GL_ +OES_texture_float GL_OES_texture_half_float GL_OES_texture_npot GL_OES_vertex_array_object GL_OES_vertex_half_float GL_EXT_blend_minmax GL_EXT_discard_framebuffer GL_EXT_draw_buffers GL_EXT_multi_draw_arr +ays GL_EXT_multisampled_render_to_texture GL_EXT_occlusion_query_boolean GL_EXT_shader_framebuffer_fetch GL_EXT_shader_texture_lod GL_EXT_texture_format_BGRA8888 GL_EXT_texture_rg GL_IMG_multisampled_rend +er_to_texture GL_IMG_program_binary GL_IMG_read_format GL_IMG_shader_binary GL_IMG_texture_compression_pvrtc GL_IMG_texture_compression_pvrtc2 GL_IMG_texture_format_BGRA8888 GL_IMG_texture_npot GL_IMG_uni +form_buffer_object GL_KHR_debug GL_EXT_texture_storage + +OpenGL ES 1 Information: + +GLES String Information : + GL_VENDOR = Imagination Technologies + GL_RENDERER = PowerVR SGX 544MP + GL_VERSION = OpenGL ES-CM 1.1 + GL_EXTENSIONS = GL_OES_byte_coordinates GL_OES_fixed_point GL_OES_single_precision GL_OES_matrix_get GL_OES_read_format GL_OES_compressed_paletted_texture GL_OES_point_sprite GL_OES_point_size_array GL_O +ES_matrix_palette GL_OES_draw_texture GL_OES_query_matrix GL_OES_texture_env_crossbar GL_OES_texture_mirrored_repeat GL_OES_texture_cube_map GL_OES_blend_subtract GL_OES_blend_func_separate GL_OES_blend_e +quation_separate GL_OES_stencil_wrap GL_OES_extended_matrix_palette GL_OES_framebuffer_object GL_OES_rgb8_rgba8 GL_OES_depth24 GL_OES_stencil8 GL_OES_compressed_ETC1_RGB8_texture GL_OES_mapbuffer GL_OES_E +GL_image GL_OES_EGL_image_external GL_EXT_multi_draw_arrays GL_OES_required_internalformat GL_OES_fbo_render_mipmap GL_IMG_read_format GL_IMG_texture_compression_pvrtc GL_IMG_texture_format_BGRA8888 GL_EX +T_texture_format_BGRA8888 GL_OES_egl_sync GL_IMG_vertex_array_object GL_APPLE_texture_2D_limited_npot GL_EXT_texture_storage + + Regards Hemant + +Hello, Can you please describe your use case? Are you trying to read NV12 and write to an RGB FBO? Or are you trying to write YUV output to an FBO? Reading YUV textures and writing to an RGB framebuffer should work just fine. For your reference, I am attaching a text file with EGL and OpenGLES extensions that we support. 7268.sgx_extensions.txt EGL extensions: EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL +_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import +EGL client APIs are: OpenGL_ES + +OpenGL ES 1 Information: + +GLES 2 String Information : + GL_VENDOR = Imagination Technologies + GL_RENDERER = PowerVR SGX 544MP + GL_VERSION = OpenGL ES 2.0 build 1.17@4948957 + GL_SHADING_LANGUAGE_VERSION = OpenGL ES GLSL ES 1.00 build 1.17@4948957 + GL_EXTENSIONS = GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth24 GL_OES_depth_texture GL_OES_egl_sync GL_OES_element_index_uint GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_fbo_render_mipmap GL_OE +S_fragment_precision_high GL_OES_get_program_binary GL_OES_mapbuffer GL_OES_packed_depth_stencil GL_OES_required_internalformat GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_surfaceless_context GL_ +OES_texture_float GL_OES_texture_half_float GL_OES_texture_npot GL_OES_vertex_array_object GL_OES_vertex_half_float GL_EXT_blend_minmax GL_EXT_discard_framebuffer GL_EXT_draw_buffers GL_EXT_multi_draw_arr +ays GL_EXT_multisampled_render_to_texture GL_EXT_occlusion_query_boolean GL_EXT_shader_framebuffer_fetch GL_EXT_shader_texture_lod GL_EXT_texture_format_BGRA8888 GL_EXT_texture_rg GL_IMG_multisampled_rend +er_to_texture GL_IMG_program_binary GL_IMG_read_format GL_IMG_shader_binary GL_IMG_texture_compression_pvrtc GL_IMG_texture_compression_pvrtc2 GL_IMG_texture_format_BGRA8888 GL_IMG_texture_npot GL_IMG_uni +form_buffer_object GL_KHR_debug GL_EXT_texture_storage + +OpenGL ES 1 Information: + +GLES String Information : + GL_VENDOR = Imagination Technologies + GL_RENDERER = PowerVR SGX 544MP + GL_VERSION = OpenGL ES-CM 1.1 + GL_EXTENSIONS = GL_OES_byte_coordinates GL_OES_fixed_point GL_OES_single_precision GL_OES_matrix_get GL_OES_read_format GL_OES_compressed_paletted_texture GL_OES_point_sprite GL_OES_point_size_array GL_O +ES_matrix_palette GL_OES_draw_texture GL_OES_query_matrix GL_OES_texture_env_crossbar GL_OES_texture_mirrored_repeat GL_OES_texture_cube_map GL_OES_blend_subtract GL_OES_blend_func_separate GL_OES_blend_e +quation_separate GL_OES_stencil_wrap GL_OES_extended_matrix_palette GL_OES_framebuffer_object GL_OES_rgb8_rgba8 GL_OES_depth24 GL_OES_stencil8 GL_OES_compressed_ETC1_RGB8_texture GL_OES_mapbuffer GL_OES_E +GL_image GL_OES_EGL_image_external GL_EXT_multi_draw_arrays GL_OES_required_internalformat GL_OES_fbo_render_mipmap GL_IMG_read_format GL_IMG_texture_compression_pvrtc GL_IMG_texture_format_BGRA8888 GL_EX +T_texture_format_BGRA8888 GL_OES_egl_sync GL_IMG_vertex_array_object GL_APPLE_texture_2D_limited_npot GL_EXT_texture_storage + + Regards Hemant + +Hi Hemant: see the flow of my case: did the visionsdk OpenGL support the RGB as texture? all the glsl using samplerExternalOES which to load NV12 for the FBO, as previous post said, FBO only support RGB, if so how can render it with NV12 texutue together did FBO support NV12? above all, the FBO input should be NV12,and which format does FBO output? RGB or NV12. and can you share some sample code to demo this? thanks.... + +Hello, Both RGB and YUV textures are supported. FBO supports RGB and the GPU will convert YUV to RGB. On TDA2, FBO has to be RGB. Does your use case need YUV output? Regards Hemant + +Hi Hemant： Hemant Hariyani said: On TDA2, FBO has to be RGB. Does your use case need YUV output? it seem to use YUV, because other texture is YUV, we don't know whether the tda2 support use RGB and YUV mixed + +Hello, You can read YUV texture and output to RGB FBO. You can use EXT_image_dma_buf_import to create an NV12 EGL Image and then use GL_OES_EGL_image_external to read the image as a texture. Your FBO can continue to be RGB format. Regards Hemant + +Hi Hemant: per discussion above, we looks need to use FBO with YUV not the RGB, can you share how to use FBO with YUV texture? + +Hi Hemant： But the RGB FBO should render together with the YUV texture as it's the parts of whole rendering like card model, camera image. + +This is resolved via: https://e2e.ti.com/support/processors/f/791/t/931272. Marking this as closed. + diff --git a/data2/text/range/10001-15000/932937.txt b/data2/text/range/10001-15000/932937.txt new file mode 100644 index 0000000000000000000000000000000000000000..97db4ed67a58509d70219fb9f68eef9270c8ba18 --- /dev/null +++ b/data2/text/range/10001-15000/932937.txt @@ -0,0 +1,56 @@ +Ticket Name: Compiler/TDA2EXEVM: TI-RTOS: How to support the function of USB2.0 HOST/OTG on TDA2XX + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA4VM, TDA2, SYSBIOS Tool/software: TI C/C++ Compiler Hi, I would like to enable the function of USB2.0 HOST & OTG on the TDA2XX EVM. I couldn't found out any USB drvier sample code from PROCESSOR_SDK_VISION product for reference. But I observed thtat there is a TivaWare™ USB Library seems could support the feature on the TDA2XX platform. Could you help provide some guide/suggestions to porting the function ? Thanks. BRs, Sam Hsieh. + +Responses: +Hi, I really doubt that this is supported in RTOS driver, so I will check with an expert then let you know. Thanks Gaviraju + +Hi, We are not supporting this in the Bois RTOS. Thanks Gaviraju + +Hi Gaviraju, Thank you for your confirmation. BTW, I browsed that DRA7xx and TDA2xx are J6 TDA famliy of devices, and the DRA7xx dedicated for the In-Vehicle Infotainment system. the processor SDK RTOS automotive which the USB Low-Level Driver (USB lld) support the function of USB Host/Device in PDK package. I try to port the USB driver into TDA2xx platform, migrate the LLD into the direcorty of ti_components/drivers/pdk_01_10_03_07/packages/ti/drv/usb. At the same time, I confirmed that the makefile file (ti/drv/build) include the usb_component.mk. I add tda2xx into the "drvusb_SOCLIST" variable of usb_component.mk. but it shows that 3662 Nothing to be done for tda2xx a15_0 usb 3663 Nothing to be done for tda2xx a15_0 usb_profile 3664 Nothing to be done for tda2xx a15_0 usb_indp 3665 Nothing to be done for tda2xx a15_0 usb_profile_indp It seems that there is no dependencies between LLD and PDK, It needs configure and rebild the component of usbdrv. Could you help teach me how to porting the usb lld? Thanks. BRs, Sam Hsieh + +Hi Gaviraju, BTW, I could build usb component and output ti.drv.usb.aem4 (ipu1_0 core) file after modified the file usb_component.mk. But I don't know how to link it into RTOS. Could you help provide me the solution or some suggestion to fix the problem? Thanks. BRs, Sam Hsieh + +Hi Sam, If it's about library linking then can you take a look at this thread ? Regards Vineet + +Hi Vineet, Thank you for your feedback. I understood how to link the driver library (ti.drv.usb.aem4) into RTOS. But I met the problem of undefine symbols: Could you help teach me how to fix the related osal library linking error ? Thanks. undefined first referenced (symbol in file ti_components/drivers/pdk_01_10_03_07/packages/ti/drv/ --------- ---------------- HwiP_Params_init HwiP_create HwiP_disable HwiP_restore MuxIntcP_create Osal_DeleteInterrupt Osal_RegisterInterrupt Osal_RegisterInterrupt_initParams SemaphoreP_Params_init SemaphoreP_create SemaphoreP_delete SemaphoreP_pend SemaphoreP_post _DebugP_assert BR, Sam. + +Can you take a look at the makefile inside gateway-demos/can_eth_gateway ? I think you need to link osal library as shown in the makefile. Regards Vineet + +Hi Vineet, As http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7 I can't found out the source codes and makefile of gateway package from the processor SDK (v03.07). Could you teach me where could download the package? Thanks. BTW, I observed that TDA2xx should be Jacinto 6 platform (cortex A15 core) and TDA4VM is Jacinto 7 (Cortex A72 core), Are their Processor_SDK_Vision and Platform Development Kit (PDK, version 7) compatible on TI RTOS ? BRs, Sam. + +Hi Vineet, I downloaded the source package of psdk_rtos_auto_j7_07_00_00_11.tar.gz and found out the makefile of gateway-demos/can_eth_gateway. I just observed that the rule related to osal library, it link failure. EXT_LIB_LIST_COMMON += $(osal_tirtos_LIBPATH)/$(SOC)/$(ISA_EXT)/$(BUILD_PROFILE_$(CORE))/$(osal_tirtos_LIBNAME).$(LIBEXT) but both the variables of osal_tirtos_LIBPATH and osal_tirtos_LIBNAME are not defined. It seems that the it needs include osal_component.mk file and the source codes of related package (osal_library). Could you help teach me how to link osal library? thanks. BRs, Sam. + +Hi Sam, Just try with direct path, ignore the variables. OSAL library is inside PDK. The makefile system is complicated, sorry. I suggest to just link what you need. EXT_LIB_LIST_COMMON is the makefile variable that is relevant here. Let me know Regards Vineet + +Hi Vineet, Thank you for your suggestion. I tried to port the "OSAL Modules" into the PDK, But I met the dependency failure ( ) when make depend (for osal_component.mk). At the same time, I observed that there is a lost file of "EventCombinerP_tirtos.c" from the latest processor sdk (psdk_rtos_auto_j7_07_00_00_01.tar.gz). Could you help teach me where could download file ? Thanks. make[4]: *** No rule to make target 'src/tirtos/EventCombinerP_tirtos.c', needed by '/home/sam/test/Git-Ver/TI_SDK_VISION_V03_07/vision_sdk/binaries/apps/tda2 make[4]: Leaving directory '/home/sam/test/Git-Ver/TI_SDK_VISION_V03_07/ti_components/drivers/pdk_01_10_03_07/packages/ti/osal' makefile:137: recipe for target 'osal_tirtos' failed make[3]: *** [osal_tirtos] Error 2 BRs, Sam. + +Hi Vineet, I have solved the problem of compiler osal library (symbol unresolved), but I met the memory problem when link it into AppImage. The error message as the following: binaries/apps/tda2xx_evm_bios_opencx/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/linker_mod.cmd", line 268: error: program will not fit into available memory. run placement with alignment fails for section "GROUP_1" size 0x15e7952 . Available memory ranges: IPU1_0_DATA_MEM size: 0x1000000 unused: 0xcf0af5 max hole: 0xcf0af4 I observed that the IPU1_0_DATA_SIZE is assigned to 0x1000000(16MB) in the apps/build/tda2xx/mem_segment_definition_bios.xs. I try to refer to the userguide (VisionSDK_UserGuide_MemoryMap.pdf), increase the IPU1_0_DATA_SIZE to (24MB). But it got the failure of MEMORY_MAP OVERFLOW ERROR : Region End: 0xb4000000 Actual End: 0xb5280000 Could you help instruct me how to define the memory segment for the OSAL library on IPU1_0 core? Thanks. ps. I configured successfully the DDR3_SIZE =1024MB on TDA2XX, it worked fine. BRs, Sam. + +Please share your xs and cmd files. I didn't understand the problem, typically you don't have to assign separate segment for OSAL library. If you have a specific program memory used for IPC then that's usually an array and you can point that array to a section like this (just an example) static uint8_t gCntrlBuf[RPMSG_DATA_SIZE] __attribute__ ((section("ipc_data_buffer"), aligned(8))); ipc_data_buffer is then a separate entry in CMD file with it's own size and start address. xs file is used to set cacheable, shareable attributes for a memory region (typically in 8M and 16M increments) Regards Vineet + +Hi Vineet Roy: USB driver had merged to tda2xx, But use USB some function as below: #if 1 USB_Params usb_dev_params; USB_Handle usb_handle; usb_dev_params.usbMode = USB_DEVICE_MSC_MODE; // usb_dev_params.instanceNo = USB_DEV_INSTANCE; /* USB port # */ // usb_dev_params.usbClassData = (void*)&g_sMSCDevice; Vps_printf("\nRTOS USB Dev MSC example!!\n"); usb_handle = USB_open(usb_dev_params.instanceNo, &usb_dev_params); if (usb_handle == 0) { Vps_printf("Failed to open USB driver\n"); return; } usbdIntrConfig(usb_handle, &usb_dev_params); Vps_printf("Done configuring USB and its interrupt. Example is ready!\n"); Vps_printf(" USB Init Completed Sucessfully \n"); #endif I got the error messages, show below : [HOST ] 5.453760 s: SYSTEM: Initializing Links ... DONE !!! [HOST ] 5.453821 s: SYSTEM: System A15 Init Done !!! [HOST ] 5.747239 s: NSP GMAC: PHY 2 Found on MAC Port 0 [HOST ] 5.747697 s: NSP GMAC: PHY 3 Found on MAC Port 1 [HOST ] 5.947874 s: NDK: Link Status: 100Mb/s Full Duplex on PHY 2 [DSP1 ] 5.435978 s: ***** DSP1 Firmware build time 15:26:01 Sep 24 2020 [DSP1 ] 5.436070 s: *** SYSTEM: CPU Frequency , [DSP1 ] 5.450771 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... ----- crash --- another sample disable USB function above sample code, the TDA2XX is working. message show below: [HOST ] 5.478466 s: SYSTEM: Initializing Links ... DONE !!! [HOST ] 5.478527 s: SYSTEM: System A15 Init Done !!! [HOST ] 5.771975 s: NSP GMAC: PHY 2 Found on MAC Port 0 [HOST ] 5.772433 s: NSP GMAC: PHY 3 Found on MAC Port 1 [HOST ] 5.972610 s: NDK: Link Status: 100Mb/s Full Duplex on PHY 2 [DSP1 ] 5.460348 s: ***** DSP1 Firmware build time 15:26:01 Sep 24 2020 [DSP1 ] 5.460440 s: *** SYSTEM: CPU Frequency , [DSP1 ] 5.475477 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP1 ] 5.475568 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [DSP1 ] 5.475629 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [DSP1 ] 5.475660 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [DSP1 ] 5.475690 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [DSP1 ] 5.475751 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [DSP1 ] 5.475782 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [DSP1 ] 5.475812 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [DSP1 ] 5.475873 s: SYSTEM: Notify register to [HOST] line 0, event 15... [DSP1 ] 5.476056 s: *** UTILS: CPU MHz = 20 Mhz *** Do you know what next step for TD2xx default usecase after [DSP1 ] 5.475477 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... + +Hi export: I found the problem, If program used "return (handle->fxnTablePtr->openFxn(handle, params)); " , the TDA2xx system will be crash. the sample code below list: /* * ======== USB_open ======== */ USB_Handle USB_open(unsigned int index, USB_Params *params) { USB_Handle handle; handle = (USB_Handle)&(USB_config[index]); // printf("%s[%d]\n",__func__,__LINE__); #if 1 /* Get handle for this driver instance */ return (handle->fxnTablePtr->openFxn(handle, params)); #else return handle; #endif } The error messages is same last blog: [DSP1 ] 5.450771 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... Why ??? + +Hi Ethan, Good to know. I did not understand. Is your problem resolved with your fix ? Are you just curious about the log message ? Regards Vineet + +Hi Vineet, Due to system hang up after call USB_OPEN() function, I would like to trace into the USB_OPEN function by consolePrintf() output debug message. But I observed that there is a undefine symbol of consolePrintf() when enable _DEBUG_ flag. Could you help teach me how to enable consolePrintf() in the USB driver? Thanks. BRs, Sam Hsieh + +Hi, Can you use the App_consolePrintf() instead ? You can see it's usage in ti/drv/i2c/example/i2c_utility The app itself defines it inside via static void App_consolePrintf(const char *pcString, ...) { char printBuffer[APP_PRINT_BUFFER_SIZE]; va_list arguments; /* Start the var args processing. */ va_start(arguments, pcString); vsnprintf (printBuffer, sizeof(printBuffer), pcString, arguments); printf(printBuffer); /* Bypassing UART for initial bring up */ #if 0 App_consolePrintf(printBuffer); #endif /* End the var args processing. */ va_end(arguments); } and the related functions are linked by linking csl_uart_console module (see Makefile) Regards Vineet + +Hi Vineet, Thank you for your kind instruction. I could debug the usb driver via output uart message (debug_printf). So far, I could call USB_open() function with MSC_DEV mode successfully, but it couldn't recognize USB device from NB. It pop unknown device on the HOST side. At the same time, I observed that it occurred the error when setup usb_osalRegisterInterrupt(); [IPU1-0] 5.230098 s: ### XDC ASSERT - ERROR CALLBACK START ### [IPU1-0] 5.230159 s: [IPU1-0] 5.230372 s: E_alreadyDefined: Hwi already defined: intr# 110 [IPU1-0] 5.230433 s: [IPU1-0] 5.230464 s: ### XDC ASSERT - ERROR CALLBACK END ### I don't know how to look into the Hwi interupt service routine on TDA2XX@RTOS. Could you help instruct me how to solve the issue ? Thanks. BRs, Sam. + +Hi Sam, Can you take a look at this thread Regards Vineet + +Hi Vineet, I have studied the thread, it should be related to the USB clock & cache control. I think that the thread is different from the USB interrupt source routine (ISR). BTW, l observed that the interrupt number of USB2 (USB 2.0 port), I #define SYS_INT_USB0 ((uint32_t)108U) /* USB1_IRQ_INTR0 (main MPU_IRQ_76) */ #define SYS_INT_USBSS0INT ((uint32_t)109U) /* USB1_IRQ_INTR1 (misc MPU_IRQ_77) */ #define SYS_INT_USB1 ((uint32_t)110U) /* USB2 IRQ_INTR0 (main MPU_IRQ_78) */ #define SYS_INT_USBSS1INT ((uint32_t)124U) /* USB2 IRQ_INTR1 (misc MPU_IRQ_92) */ I am extremely suspicious of the module ('ti.sysbios.hal.Hwi') ti_sysbios_family_arm_m3_Hwi_create. I couldn't found out which code repeat register interrupt number (#110). Could you help teach me or provide some suggestion to figure out why the ISR could not be registered? thanks. BRs, Sam. + +Hi Vineet, I observed that the function of "Hwi_Instance_init()" check vector table entry whether if already in use. if in use then call Error_raise("Hwi_E_alreadyDefined"). I still couldn't found out the root cause (alreadyDefined). BTW, I also try to replace the value of SYS_INT_USB1 with 111, it got the same failure. #define SYS_INT_USB1 ((uint32_t)111U) Could you help update the issue ? Thanks. BRs, Sam Hsieh + +Hi Vineet, I recently observed that the interrupt controller of TDA2XX are too complex to understand in the TRM (SPRUI29F). As I understood that the usb2 (usbmini_ab) hardwired with the USB2_DRVVBUS of TDA2XX, and bind the usb driver library (ti.drv.usb) into the IPU1 core, but I don't understand clear how to register interrupt number and map the IPU1_IRQ_xx and CSL_XBAR_USB2_IRQ_INTR1. Could you help teach how to handle the IRQ_CROSSBAR mapping for USB2 device ? Thanks. BRs, Sam. + +Hi Sam, I want to check with you whether this issue has been resolved or you still need help with this. Based on your input I will plan the next steps. Regards Karthik + +Hi Karthik, Thank you for your feedback. Due to the problem had been suspended for a long time, We gave up the request for support. BRs, Sam + diff --git a/data2/text/range/10001-15000/940643.txt b/data2/text/range/10001-15000/940643.txt new file mode 100644 index 0000000000000000000000000000000000000000..890ba5066b0dedf34b5ad96af53f8c890fd8cc9b --- /dev/null +++ b/data2/text/range/10001-15000/940643.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA4VMXEVM: TDA4x Latency Measurement queries + +Query Text: +Part Number: TDA4VMXEVM Hello , We are working on TDA4 PSDK 7.0 on custom board ,We need to calculate the latency of the application from Camera node to end of processing. For this we have some queries. Is there any facility in existing Open VX framework to measure the latency of application at runtime as we have requirement to send the latency out continuously as debug parameters. Is there a provision to attach timestamp and a frame count to captured frame that can be passed to succeeding nodes? Similar implementation was available in TDA2 vision sdk framework. Also in the current Open vx framework for a particular node if the num of buffers are already consumed and a new input arrives does that node drops the frame? Is there any facility to count frames dropped in the execution pipeline? Can it happen that once we enqueue frames in a sequence in the chain but at the end that sequence might change due to core unavailability or other reasons? Regards, Swapnil N + +Responses: +Hello, My responses to your questions are below. Let me know if you have any follow ups to these questions: 1. Regarding measuring the latency, we have API's that are used in our sample applications that measure query the node latencies as well as overall latency of the application. For an example of this, you can review the multi cam application at the location vision_apps/apps/basic_demos/app_multi_cam. The API's that are used can be called in this application by using the "print statistics" command. These API's are called appPerfStatsPrintAll and tivx_utils_graph_perf_print. 2. Yes, by default the capture node timestamps the output images and passes these along the OpenVX graph to subsequent images. These timestamps can be queried from the OpenVX data object by using the vxQueryReference API and using the TIVX_REFERENCE_TIMESTAMP enum. If you are not using the capture node, you can set a timestamp directly from the application using the tivxSetReferenceAttribute API. 3. Regarding the frame count, frame drops, etc., there are queries that can be made of the capture node to either print this information or retrieve it and populate it within a local variable. This can be done by using the tivxNodeSendCommand with either the enumeration TIVX_CAPTURE_PRINT_STATISTICS or TIVX_CAPTURE_GET_STATISTICS. 4. Regarding the policy for frame dropping, the frames will drop in the capture node rather than in downstream nodes. 5. Regarding the question "Can it happen that once we enqueue frames in a sequence in the chain but at the end that sequence might change due to core unavailability or other reasons?", I am not aware of any reason that this would occur. Subsequent nodes in the OpenVX graph will process frames in the order they are sent from the capture node. Regards, Lucas + +Hi Lucas, We have tried the options suggested above. Please find our observations below: 1. Timestamp and frame number details: After using the API's vxQueryReference and tivxNodeSendCommand in the application after dequeue, we were able to get the timestamp and frame number for the captured frame. However, we need these values inside a node. We have the camera node connected to certain subsequent processing nodes and a TCP/IP node in the end. Now, we want to get the latency value and frame number inside the TCP/IP node and transmit those values out over the ethernet. We tried to use these API's inside TCP node but they do not work inside the target.c files. Do we have any facility to get these values in the TCP node? 2. Latency value prints: We have been using the API appPerfStatsPrintAll in order to get the performance statistics. We see a lot of prints depicting CPU and memory utilization but not the latency. Please find the UART log for same below: Summary of CPU load, ==================== CPU: mpu1_0: TOTAL LOAD = 0. 0 % ( HWI = 0. 0 %, SWI = 0. 0 % ) CPU: mcu2_0: TOTAL LOAD = 11.93 % ( HWI = 1.83 %, SWI = 0.65 % ) CPU: mcu3_0: TOTAL LOAD = 0. 8 % ( HWI = 0. 4 %, SWI = 0. 2 % ) CPU: mcu3_1: TOTAL LOAD = 0. 8 % ( HWI = 0. 5 %, SWI = 0. 2 % ) CPU: C66X_1: TOTAL LOAD = 29.73 % ( HWI = 0.32 %, SWI = 0.13 % ) CPU: C66X_2: TOTAL LOAD = 48.30 % ( HWI = 0.32 %, SWI = 0.11 % ) CPU: C7X_1: TOTAL LOAD = 26.21 % ( HWI = 0.12 %, SWI = 0. 6 % ) HWA performance statistics, =========================== HWA: VISS: LOAD = 7.20 % ( 513 MP/s ) HWA: LDC : LOAD = 7.81 % ( 201 MP/s ) HWA: MSC0: LOAD = 3.46 % ( 337 MP/s ) HWA: DOF : LOAD = 9.41 % ( 123 MP/s ) DDR performance statistics, =========================== DDR: READ BW: AVG = 782 MB/s, PEAK = 1065 MB/s DDR: WRITE BW: AVG = 799 MB/s, PEAK = 1101 MB/s DDR: TOTAL BW: AVG = 1581 MB/s, PEAK = 2166 MB/s Detailed CPU performance/memory statistics, =========================================== PERF STATS: ERROR: Invalid command (cmd = 00000003, prm_size = 260 B CPU: mcu2_0: TASK: IPC_RX: 0. 4 % CPU: mcu2_0: TASK: REMOTE_SRV: 0. 3 % CPU: mcu2_0: TASK: TIVX_CPU: 0.28 % CPU: mcu2_0: TASK: TIVX_NF: 0. 0 % CPU: mcu2_0: TASK: TIVX_LDC1: 1.32 % CPU: mcu2_0: TASK: TIVX_MSC1: 1.10 % CPU: mcu2_0: TASK: TIVX_MSC2: 0. 0 % CPU: mcu2_0: TASK: TIVX_SDE: 0. 0 % CPU: mcu2_0: TASK: TIVX_DOF: 2. 7 % CPU: mcu2_0: TASK: TIVX_VISS1: 1.36 % CPU: mcu2_0: TASK: TIVX_CAPT1: 0.43 % CPU: mcu2_0: TASK: TIVX_CAPT2: 0. 0 % CPU: mcu2_0: TASK: TIVX_DISP1: 0. 0 % CPU: mcu2_0: TASK: TIVX_DISP2: 0. 0 % CPU: mcu2_0: TASK: TIVX_VDEC1: 0. 0 % CPU: mcu2_0: TASK: TIVX_VDEC2: 0. 0 % CPU: mcu2_0: HEAP: DDR_SHARED_MEM: size = 16777216 B, free = 14251264 B ( 84 % unused) CPU: mcu2_0: HEAP: DDR_NON_CACHE_M: size = 67108864 B, free = 47210496 B ( 6 % unused) CPU: mcu3_0: TASK: IPC_RX: 0. 0 % CPU: mcu3_0: TASK: REMOTE_SRV: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_RX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_0: HEAP: DDR_SHARED_MEM: size = 2097152 B, free = 2097152 B (100 % unused) CPU: mcu3_1: TASK: IPC_RX: 0. 0 % CPU: mcu3_1: TASK: REMOTE_SRV: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_RX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: TASK: IPC_TEST_TX: 0. 0 % CPU: mcu3_1: HEAP: DDR_SHARED_MEM: size = 2097152 B, free = 2097152 B (100 % unused) CPU: C66X_1: TASK: IPC_RX: 0. 2 % CPU: C66X_1: TASK: REMOTE_SRV: 0. 0 % CPU: C66X_1: TASK: TIVX_CPU: 29.23 % CPU: C66X_1: TASK: IPC_TEST_RX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_1: HEAP: DDR_SHARED_MEM: size = 16777216 B, free = 16755712 B ( 99 % unused) CPU: C66X_1: HEAP: L2_MEM: size = 229376 B, free = 229376 B (100 % unused) CPU: C66X_1: HEAP: DDR_SCRATCH_MEM: size = 50331648 B, free = 50331648 B ( 14 % unused) CPU: C66X_2: TASK: IPC_RX: 0. 5 % CPU: C66X_2: TASK: REMOTE_SRV: 0. 0 % CPU: C66X_2: TASK: TIVX_CPU: 53.52 % CPU: C66X_2: TASK: IPC_TEST_RX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: TASK: IPC_TEST_TX: 0. 0 % CPU: C66X_2: HEAP: DDR_SHARED_MEM: size = 16777216 B, free = 16670720 B ( 99 % unused) CPU: C66X_2: HEAP: L2_MEM: size = 229376 B, free = 229376 B (100 % unused) CPU: C66X_2: HEAP: DDR_SCRATCH_MEM: size = 50331648 B, free = 50331648 B ( 14 % unused) CPU: C7X_1: TASK: IPC_RX: 0. 2 % CPU: C7X_1: TASK: REMOTE_SRV: 0. 0 % CPU: C7X_1: TASK: TIVX_CPU: 25.98 % CPU: C7X_1: TASK: IPC_TEST_RX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: TASK: IPC_TEST_TX: 0. 0 % CPU: C7X_1: HEAP: DDR_SHARED_MEM: size = 268435456 B, free = 249736192 B ( 13 % unused) CPU: C7X_1: HEAP: L3_MEM: size = 8159232 B, free = 2916352 B ( 35 % unused) CPU: C7X_1: HEAP: L2_MEM: size = 491520 B, free = 491520 B (100 % unused) CPU: C7X_1: HEAP: L1_MEM: size = 16384 B, free = 0 B ( 0 % unused) CPU: C7X_1: HEAP: DDR_SCRATCH_MEM: size = 234881024 B, free = 233655484 B ( 8 % unused) Kindly let us know how we can proceed. Thank you, Jyoti + +Hi Jyoti, Thanks for the feedback. Lucas will help you with this next week. Regards Karthik + +Hi Jyoti, My responses are below: 1. Regarding querying the timestamp within the node, the timestamp is a property of the object descriptor itself and is called "timestamp". For instance, if you have an object descriptor called "obj_desc", you can get the associated timestamp value from "obj_desc->timestamp". 2. For printing the latency of the nodes in the application, did you try to use the tivx_utils_graph_perf_print API as well? This API is used in the vision_apps/apps for reference. This will provide the average, min and max latency of each of the nodes in the graph. Regards, Lucas + +Hi Lucas, We have tried the options suggested above. Please find our observations below: 1. Timestamp and frame number details: We are able to access the capture timestamp in the TCP/IP node successfully. We also require that the frame number updated in capture node be available in further nodes and access it in TCP/IP node. Could you suggest any existing approach to access the frame number ? Can we add an extra parameter (similar to timestamp) in the object descriptor and pass it on to the successive nodes? 2. Latency value prints: We already used the API " tivx_utils_graph_perf_print" to get the node level performance timings. We have used the API "appPerfPointPrint" to print FPS and Latency. But the Latency is not calculated for 1 frame complete execution. It provides an average captured during enqueue and dequeue process. We require complete application latency(system level latency). Regards, Jyoti Patil + +Hello Jyoti, On #1, yes, you are free to add a new parameter to the object descriptor for frame number and pass this along to successive nodes. This should allow you to access the frame number in the TCP/IP node. On #2, one approach is to dequeue the final output of the graph within the application and query the captured timestamp associated with that object. You can then take a timestamp within the application and subtract these two values to get the system level latency. Regards, Lucas + diff --git a/data2/text/range/10001-15000/981769.txt b/data2/text/range/10001-15000/981769.txt new file mode 100644 index 0000000000000000000000000000000000000000..a7384dce22c03761b63560a76583f77026d6d260 --- /dev/null +++ b/data2/text/range/10001-15000/981769.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2SA: [TDA2S] RGMII port no signal output + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2, DP83TC811, DP83TC811SEVM Dear TI, We use DP83TC811 chip on our TDA2 board, and the link is ok, but we can't measure the signal on RGMII port. What is the reason? Could you please help to check? The dts config: In dra7-evm.dts file: &mac { status = "okay"; #dual_emac; ti,no-idle; }; &davinci_mdio{ status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; phy-mode = "rgmii"; dual_emac_res_vlan = <2>; }; In dra7.dtsi file: mac: ethernet@48484000 { compatible = "ti,dra7-cpsw","ti,cpsw"; ti,hwmods = "gmac"; clocks = <&gmac_main_clk>, <&l3init_clkctrl DRA7_GMAC_CLKCTRL 25>; clock-names = "fck", "cpts"; cpdma_channels = <8>; ale_entries = <1024>; bd_ram_size = <0x2000>; mac_control = <0x20>; slaves = <2>; active_slave = <0>; cpts_clock_mult = <0x784CFE14>; cpts_clock_shift = <29>; reg = <0x48484000 0x1000 0x48485200 0x2E00>; #address-cells = <1>; #size-cells = <1>; /* * Do not allow gating of cpsw clock as workaround * for errata i877. Keeping internal clock disabled * causes the device switching characteristics * to degrade over time and eventually fail to meet * the data manual delay time/skew specs. */ ti,no-idle; /* * rx_thresh_pend * rx_pend * tx_pend * misc_pend */ interrupts = , , , ; ranges; syscon = <&scm_conf>; status = "disabled"; davinci_mdio: mdio@48485000 { compatible = "ti,cpsw-mdio","ti,davinci_mdio"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "davinci_mdio"; bus_freq = <1000000>; reg = <0x48485000 0x100>; }; cpsw_emac0: slave@48480200 { /* Filled in by U-Boot */ mac-address = [ 00 00 00 00 00 00 ]; }; cpsw_emac1: slave@48480300 { mac-address = [ 00 00 00 00 00 00 ]; }; phy_sel: cpsw-phy-sel@4a002554 { compatible = "ti,dra7xx-cpsw-phy-sel"; reg= <0x4a002554 0x4>; reg-names = "gmii-sel"; }; }; After boot, the link status is connected, use ifconfig command, show info as below: eth0 Link encap:Ethernet HWaddr 00:35:FF:4E:D3:CA inet addr:10.0.0.32 Bcast:10.0.0.255 Mask:255.255.255.0 inet6 addr: fe80::235:ffff:fe4e:d3ca/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:57 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:10411 (10.1 KiB) Interrupt:87 lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) When we use ping command, the TX bytes and TX packets are increased as normal. But we can't measure any wave from RGMII TXD port. The registers of GMAC part as below: |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0x48484000 | 0x0019010F | | 0x48484004 | 0x00000006 | | 0x48484008 | 0x00000000 | | 0x4848400C | 0x00000007 | | 0x48484010 | 0x00000000 | | 0x48484014 | 0x00000000 | | 0x48484018 | 0x00003003 | | 0x4848401C | 0x0000000B | | 0x48484020 | 0x00000020 | | 0x48484024 | 0x00000007 | | 0x48484028 | 0x81008100 | | 0x4848402C | 0x00000000 | | 0x48484030 | 0x000080E1 | | 0x48484034 | 0x00000000 | |----------------------------| |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0x48484100 | 0x00000000 | | 0x48484104 | 0x00000000 | | 0x48484108 | 0x00000104 | | 0x4848410C | 0x00000042 | | 0x48484110 | 0x00000000 | | 0x48484114 | 0x00000000 | | 0x48484118 | 0x33221001 | | 0x4848411C | 0x76543210 | | 0x48484120 | 0x00000000 | | 0x48484124 | 0x00000000 | | 0x48484128 | 0x00000000 | | 0x4848412C | 0x00000000 | | 0x48484130 | 0x00000000 | | 0x48484134 | 0x00000000 | | 0x48484138 | 0x00000000 | | 0x4848413C | 0x00000000 | | 0x48484140 | 0x00000000 | | 0x48484144 | 0x00000000 | | 0x48484148 | 0x00000000 | | 0x4848414C | 0x00000000 | | 0x48484150 | 0x00000000 | | 0x48484154 | 0x00000000 | | 0x48484158 | 0x00000000 | | 0x4848415C | 0x00000000 | | 0x48484160 | 0x00000000 | | 0x48484164 | 0x00000000 | | 0x48484168 | 0x00000000 | | 0x4848416C | 0x00000000 | | 0x48484170 | 0x00000000 | | 0x48484174 | 0x00000000 | | 0x48484178 | 0x00000000 | | 0x4848417C | 0x00000000 | | 0x48484180 | 0x00000000 | | 0x48484184 | 0x00000000 | | 0x48484188 | 0x00000000 | | 0x4848418C | 0x00000000 | | 0x48484190 | 0x00000000 | | 0x48484194 | 0x00000000 | | 0x48484198 | 0x00000000 | | 0x4848419C | 0x00000000 | | 0x484841A0 | 0x00000000 | | 0x484841A4 | 0x00000000 | | 0x484841A8 | 0x00000000 | | 0x484841AC | 0x00000000 | | 0x484841B0 | 0x00000000 | | 0x484841B4 | 0x00000000 | | 0x484841B8 | 0x00000000 | | 0x484841BC | 0x00000000 | | 0x484841C0 | 0x00000000 | | 0x484841C4 | 0x00000000 | | 0x484841C8 | 0x00000000 | | 0x484841CC | 0x00000000 | | 0x484841D0 | 0x00000000 | | 0x484841D4 | 0x00000000 | | 0x484841D8 | 0x00000000 | | 0x484841DC | 0x00000000 | | 0x484841E0 | 0x00000000 | | 0x484841E4 | 0x00000000 | | 0x484841E8 | 0x00000000 | | 0x484841EC | 0x00000000 | | 0x484841F0 | 0x00000000 | | 0x484841F4 | 0x00000000 | | 0x484841F8 | 0x00000000 | | 0x484841FC | 0x00000000 | | 0x48484200 | 0x00000000 | | 0x48484204 | 0x00040000 | | 0x48484208 | 0x000000F5 | | 0x4848420C | 0x00000041 | | 0x48484210 | 0x080040C0 | | 0x48484214 | 0x00000000 | | 0x48484218 | 0x33221100 | | 0x4848421C | 0x001E0000 | | 0x48484220 | 0x0000CAD3 | | 0x48484224 | 0x4EFF3500 | | 0x48484228 | 0x00000000 | | 0x4848422C | 0x00000000 | | 0x48484230 | 0x00000000 | | 0x48484234 | 0x00000000 | | 0x48484238 | 0x00000000 | | 0x4848423C | 0x00000000 | | 0x48484240 | 0x00000000 | | 0x48484244 | 0x00000000 | | 0x48484248 | 0x00000000 | | 0x4848424C | 0x00000000 | | 0x48484250 | 0x00000000 | | 0x48484254 | 0x00000000 | | 0x48484258 | 0x00000000 | | 0x4848425C | 0x00000000 | | 0x48484260 | 0x00000000 | | 0x48484264 | 0x00000000 | | 0x48484268 | 0x00000000 | | 0x4848426C | 0x00000000 | | 0x48484270 | 0x00000000 | | 0x48484274 | 0x00000000 | | 0x48484278 | 0x00000000 | | 0x4848427C | 0x00000000 | | 0x48484280 | 0x00000000 | | 0x48484284 | 0x00000000 | | 0x48484288 | 0x00000000 | | 0x4848428C | 0x00000000 | | 0x48484290 | 0x00000000 | | 0x48484294 | 0x00000000 | | 0x48484298 | 0x00000000 | | 0x4848429C | 0x00000000 | | 0x484842A0 | 0x00000000 | | 0x484842A4 | 0x00000000 | | 0x484842A8 | 0x00000000 | | 0x484842AC | 0x00000000 | | 0x484842B0 | 0x00000000 | | 0x484842B4 | 0x00000000 | | 0x484842B8 | 0x00000000 | | 0x484842BC | 0x00000000 | | 0x484842C0 | 0x00000000 | | 0x484842C4 | 0x00000000 | | 0x484842C8 | 0x00000000 | | 0x484842CC | 0x00000000 | | 0x484842D0 | 0x00000000 | | 0x484842D4 | 0x00000000 | | 0x484842D8 | 0x00000000 | | 0x484842DC | 0x00000000 | | 0x484842E0 | 0x00000000 | | 0x484842E4 | 0x00000000 | | 0x484842E8 | 0x00000000 | | 0x484842EC | 0x00000000 | | 0x484842F0 | 0x00000000 | | 0x484842F4 | 0x00000000 | | 0x484842F8 | 0x00000000 | | 0x484842FC | 0x00000000 | | 0x48484300 | 0x00000000 | | 0x48484304 | 0x00040000 | | 0x48484308 | 0x000000F5 | | 0x4848430C | 0x00000041 | | 0x48484310 | 0x080040C0 | | 0x48484314 | 0x00000000 | | 0x48484318 | 0x33221100 | | 0x4848431C | 0x001E0000 | | 0x48484320 | 0x0000CAD3 | | 0x48484324 | 0x4EFF3500 | | 0x48484328 | 0x00000000 | | 0x4848432C | 0x00000000 | | 0x48484330 | 0x00000000 | | 0x48484334 | 0x00000000 | | 0x48484338 | 0x00000000 | | 0x4848433C | 0x00000000 | | 0x48484340 | 0x00000000 | | 0x48484344 | 0x00000000 | | 0x48484348 | 0x00000000 | | 0x4848434C | 0x00000000 | | 0x48484350 | 0x00000000 | | 0x48484354 | 0x00000000 | |----------------------------| WX + +Responses: +The pin mux config as below: {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ + +Hi, What is the Linux and SDK version ? Is MDIO functional ? Are you able to query the PHY registers ? Regards Vineet + +Hi Vineet, Thanks for you quickly response. The SDK version is VSDK03.08 Linux version is 4.19.73 The PHY can be read OK via MDIO, and the link status is up. WX. + +Hi Vineet, We tried ping command on board, and measured the signal output from TX_D0, TX_D1, TX_D2, TX_D3, but the TX_CLK is only 2.5MHz, not 25MHz. WX. + +Hi Vineet, After run ethtool, Supported ports: [ TP MII ] Supported link modes: Not reported Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: No Supported FEC modes: Not reported Advertised link modes: Not reported Advertised pause frame use: No Advertised auto-negotiation: No Advertised FEC modes: Not reported Speed: 100Mb/s Duplex: Full Port: MII PHYAD: 0 Transceiver: internal Auto-negotiation: off Supports Wake-on: gs Wake-on: gs SecureOn password: 00:00:00:00:00:00 Current message level: 0x00000000 (0) Link detected: yes WX. + +Hi Vineet, Any update? Why the RGMII TX_CLK is 2.5MHz only? The WR_RGMII_CTL and SL_MACCONTROL registers show below value: WR_RGMII_CTL: 0x4848 5288 = 0x00000000 SL_MACCONTROL: 0x4848 4D84 = 0x0008021 WX. + +Hi, Has someone from TI reviewed your HW schematic ? Would be a good idea to check that first. Regards Vineet + +Hi Vineet, The schematic is very easy. We connect the TDA2 RGMII pin (RX_DV, RCLK, RXD0, RXD1,RXD2, RXD3, TCLK, TXEN, TXD0, TXD1, TXD2, TXD3) to DP83TC811SEVM board, NOT use the phy chip on our board. So, the HW is same as DP83TC811SEVM. Regards, WX + +Hi Vineet, Today, we tried some test, the status as below, 1. Modify dts, add fixed-link node. &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii"; dual_emac_res_vlan = <1>; fixed-link { speed = <100>; full-duplex; }; }; The result is same. WR_RGMII_CTL: 0x4848 5288 = 0x00000000 SL_MACCONTROL: 0x4848 4D84 = 0x0008021 The signal of TX_D0~TX_D3 are OK, TX_CLK is still 2.5MHz, not 25MHz. The signal of RX_D0~RX_D3 are OK, RX_CLK is 25MHz, RX_DV is OK. But, the TDA2 can't received ping package from PC. 2. We tried to correct the cpsw's register value according to which on EVM5777 reference board. But, the RX_CLK is still 2.5MHz, and the TDA2 can't received ping package from PC. Best Regards, WX + +Hi, The TX_CLK of 2.5 Mhz is indicative of the problem. It means that either PHY isn't initialized correctly or MAC configuration hasn't been done or there is some HW issue. Let's try to isolate 1. Can you post netstat -i dump ? 2. Please check CTRL_CORE_CONTROL_IO_1 : 0x4A00 2554 value. This selects the RGMII mode for MAC 3. Make sure you have followed the checklist in Section 24.11.5.4 Initialization and Configuration of CPSW of TRM 4. Please post "mii info" output from U-boot Regards Vineet + diff --git a/data2/text/range/10001-15000/984249.txt b/data2/text/range/10001-15000/984249.txt new file mode 100644 index 0000000000000000000000000000000000000000..5795136430d15936b00ebd12b44907a4b111e752 --- /dev/null +++ b/data2/text/range/10001-15000/984249.txt @@ -0,0 +1,780 @@ +Ticket Name: TDA4VM: Segment output result is not correct for TDA4 board + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear: I met a problem that is :I convert a caffer segment model use import tool, it can works well on pc test, but can't output correct result on tda4 board. Here is the convert files and output result for pc test: modelType = 0 inputNetFile = "../longhorn/segment/512x512/forward_small512_512_iter_30000.prototxt" inputParamsFile = "../longhorn/segment/512x512/forward_small512_512_iter_30000.caffemodel" outputNetFile = "../longhorn/segment/512x512/out/tidl_net_jSegNet21v2.bin" outputParamsFile = "../longhorn/segment/512x512/out/tidl_io_jSegNet21v2_" inDataFormat = 0 perfSimConfig = ../../test/testvecs/config/import/device_config.cfg inData = "../../test/testvecs/config/test_pic_512x512.txt" postProcType = 3 But when run on TDA4 board, Program can run well, only the output result is not correct. Also we use the same caffer model convertd with tda2 tools, it can get correct output on tda2 board. Here attached the deploy file, can you help me analysis where the problem is? Also can you give me a test deploy file to train a new model to test? forward_small512_512_iter_30000 .txt name: "jsegnet21v2_deploy" +input: "data" +input_shape { + dim: 1 + dim: 3 + dim: 512 + dim: 512 +} +layer { + name: "data/bias" + type: "Bias" + bottom: "data" + top: "data/bias" + param { + lr_mult: 0.0 + decay_mult: 0.0 + } + bias_param { + filler { + type: "constant" + value: -128.0 + } + } +} +layer { + name: "conv1a" + type: "Convolution" + bottom: "data/bias" + top: "conv1a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 32 + bias_term: true + pad: 2 + kernel_size: 5 + group: 1 + stride: 2 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "conv1a/bn" + type: "BatchNorm" + bottom: "conv1a" + top: "conv1a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "conv1a/relu" + type: "ReLU" + bottom: "conv1a" + top: "conv1a" +} +layer { + name: "conv1b" + type: "Convolution" + bottom: "conv1a" + top: "conv1b" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 32 + bias_term: true + pad: 1 + kernel_size: 3 + group: 4 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "conv1b/bn" + type: "BatchNorm" + bottom: "conv1b" + top: "conv1b" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "conv1b/relu" + type: "ReLU" + bottom: "conv1b" + top: "conv1b" +} +layer { + name: "pool1" + type: "Pooling" + bottom: "conv1b" + top: "pool1" + pooling_param { + pool: MAX + kernel_size: 2 + stride: 2 + } +} +layer { + name: "res2a_branch2a" + type: "Convolution" + bottom: "pool1" + top: "res2a_branch2a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 1 + kernel_size: 3 + group: 4 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "res2a_branch2a/bn" + type: "BatchNorm" + bottom: "res2a_branch2a" + top: "res2a_branch2a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "res2a_branch2a/relu" + type: "ReLU" + bottom: "res2a_branch2a" + top: "res2a_branch2a" +} +layer { + name: "pool2" + type: "Pooling" + bottom: "res2a_branch2a" + top: "pool2" + pooling_param { + pool: MAX + kernel_size: 2 + stride: 2 + } +} +layer { + name: "res3a_branch2a" + type: "Convolution" + bottom: "pool2" + top: "res3a_branch2a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 128 + bias_term: true + pad: 1 + kernel_size: 3 + group: 4 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "res3a_branch2a/bn" + type: "BatchNorm" + bottom: "res3a_branch2a" + top: "res3a_branch2a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "res3a_branch2a/relu" + type: "ReLU" + bottom: "res3a_branch2a" + top: "res3a_branch2a" +} +layer { + name: "pool3" + type: "Pooling" + bottom: "res3a_branch2a" + top: "pool3" + pooling_param { + pool: MAX + kernel_size: 2 + stride: 2 + } +} +layer { + name: "res4a_branch2a" + type: "Convolution" + bottom: "pool3" + top: "res4a_branch2a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 256 + bias_term: true + pad: 1 + kernel_size: 3 + group: 4 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "res4a_branch2a/bn" + type: "BatchNorm" + bottom: "res4a_branch2a" + top: "res4a_branch2a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "res4a_branch2a/relu" + type: "ReLU" + bottom: "res4a_branch2a" + top: "res4a_branch2a" +} +layer { + name: "pool4" + type: "Pooling" + bottom: "res4a_branch2a" + top: "pool4" + pooling_param { + pool: MAX + kernel_size: 1 + stride: 1 + } +} +layer { + name: "res5a_branch2a" + type: "Convolution" + bottom: "pool4" + top: "res5a_branch2a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 512 + bias_term: true + pad: 2 + kernel_size: 3 + group: 4 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 2 + } +} +layer { + name: "res5a_branch2a/bn" + type: "BatchNorm" + bottom: "res5a_branch2a" + top: "res5a_branch2a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "res5a_branch2a/relu" + type: "ReLU" + bottom: "res5a_branch2a" + top: "res5a_branch2a" +} +layer { + name: "out5a" + type: "Convolution" + bottom: "res5a_branch2a" + top: "out5a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 4 + kernel_size: 3 + group: 2 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 4 + } +} +layer { + name: "out5a/bn" + type: "BatchNorm" + bottom: "out5a" + top: "out5a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "out5a/relu" + type: "ReLU" + bottom: "out5a" + top: "out5a" +} +layer { + name: "out5a_up2" + type: "Deconvolution" + bottom: "out5a" + top: "out5a_up2" + param { + lr_mult: 0.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: false + pad: 1 + kernel_size: 4 + group: 64 + stride: 2 + weight_filler { + type: "bilinear" + } + } +} +layer { + name: "out3a" + type: "Convolution" + bottom: "res3a_branch2a" + top: "out3a" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 1 + kernel_size: 3 + group: 2 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "out3a/bn" + type: "BatchNorm" + bottom: "out3a" + top: "out3a" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "out3a/relu" + type: "ReLU" + bottom: "out3a" + top: "out3a" +} +layer { + name: "out3_out5_combined" + type: "Eltwise" + bottom: "out5a_up2" + bottom: "out3a" + top: "out3_out5_combined" +} +layer { + name: "ctx_conv1" + type: "Convolution" + bottom: "out3_out5_combined" + top: "ctx_conv1" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 1 + kernel_size: 3 + group: 1 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "ctx_conv1/bn" + type: "BatchNorm" + bottom: "ctx_conv1" + top: "ctx_conv1" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "ctx_conv1/relu" + type: "ReLU" + bottom: "ctx_conv1" + top: "ctx_conv1" +} +layer { + name: "ctx_conv2" + type: "Convolution" + bottom: "ctx_conv1" + top: "ctx_conv2" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 4 + kernel_size: 3 + group: 1 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 4 + } +} +layer { + name: "ctx_conv2/bn" + type: "BatchNorm" + bottom: "ctx_conv2" + top: "ctx_conv2" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "ctx_conv2/relu" + type: "ReLU" + bottom: "ctx_conv2" + top: "ctx_conv2" +} +layer { + name: "ctx_conv3" + type: "Convolution" + bottom: "ctx_conv2" + top: "ctx_conv3" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 4 + kernel_size: 3 + group: 1 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 4 + } +} +layer { + name: "ctx_conv3/bn" + type: "BatchNorm" + bottom: "ctx_conv3" + top: "ctx_conv3" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "ctx_conv3/relu" + type: "ReLU" + bottom: "ctx_conv3" + top: "ctx_conv3" +} +layer { + name: "ctx_conv4" + type: "Convolution" + bottom: "ctx_conv3" + top: "ctx_conv4" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 64 + bias_term: true + pad: 4 + kernel_size: 3 + group: 1 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 4 + } +} +layer { + name: "ctx_conv4/bn" + type: "BatchNorm" + bottom: "ctx_conv4" + top: "ctx_conv4" + batch_norm_param { + moving_average_fraction: 0.990000009537 + eps: 9.99999974738e-05 + scale_bias: true + } +} +layer { + name: "ctx_conv4/relu" + type: "ReLU" + bottom: "ctx_conv4" + top: "ctx_conv4" +} +layer { + name: "ctx_final" + type: "Convolution" + bottom: "ctx_conv4" + top: "ctx_final" + param { + lr_mult: 1.0 + decay_mult: 1.0 + } + param { + lr_mult: 2.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 5 + bias_term: true + pad: 1 + kernel_size: 3 + kernel_size: 3 + group: 1 + stride: 1 + weight_filler { + type: "msra" + } + bias_filler { + type: "constant" + value: 0.0 + } + dilation: 1 + } +} +layer { + name: "ctx_final/relu" + type: "ReLU" + bottom: "ctx_final" + top: "ctx_final" +} +layer { + name: "out_deconv_final_up2" + type: "Deconvolution" + bottom: "ctx_final" + top: "out_deconv_final_up2" + param { + lr_mult: 0.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 5 + bias_term: false + pad: 1 + kernel_size: 4 + group: 5 + stride: 2 + weight_filler { + type: "bilinear" + } + } +} +layer { + name: "out_deconv_final_up4" + type: "Deconvolution" + bottom: "out_deconv_final_up2" + top: "out_deconv_final_up4" + param { + lr_mult: 0.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 5 + bias_term: false + pad: 1 + kernel_size: 4 + group: 5 + stride: 2 + weight_filler { + type: "bilinear" + } + } +} +layer { + name: "out_deconv_final_up8" + type: "Deconvolution" + bottom: "out_deconv_final_up4" + top: "out_deconv_final_up8" + param { + lr_mult: 0.0 + decay_mult: 0.0 + } + convolution_param { + num_output: 5 + bias_term: false + pad: 1 + kernel_size: 4 + group: 5 + stride: 2 + weight_filler { + type: "bilinear" + } + } +} +layer { + name: "argMaxOut" + type: "ArgMax" + bottom: "out_deconv_final_up8" + top: "argMaxOut" + argmax_param { + axis: 1 + } +} + +Responses: +Hi, Can you tell which release of TIDL you are using? Also can you generate the layer level traces on PC emulation mode and on EVM and compare to figure out which layer is mismatching. Regards, Anshu + +Thanks for your replying, the tidl version is tidl_j7_01_03_00_11. After comparing the generate layer output result, the most different layer is the last therr Deconvolution layer. After the last three layer, the output image is totally blank. Here is the last three deconvolution layer: layer { name: "out_deconv_final_up2" type: "Deconvolution" bottom: "ctx_final" top: "out_deconv_final_up2" param { lr_mult: 0.0 decay_mult: 0.0 } convolution_param { num_output: 5 bias_term: false pad: 1 kernel_size: 4 group: 5 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "out_deconv_final_up4" type: "Deconvolution" bottom: "out_deconv_final_up2" top: "out_deconv_final_up4" param { lr_mult: 0.0 decay_mult: 0.0 } convolution_param { num_output: 5 bias_term: false pad: 1 kernel_size: 4 group: 5 stride: 2 weight_filler { type: "bilinear" } } } layer { name: "out_deconv_final_up8" type: "Deconvolution" bottom: "out_deconv_final_up4" top: "out_deconv_final_up8" param { lr_mult: 0.0 decay_mult: 0.0 } convolution_param { num_output: 5 bias_term: false pad: 1 kernel_size: 4 group: 5 stride: 2 weight_filler { type: "bilinear" } } } + +Hi, Can you try this with the latest TIDL release ( 1.4.0.8) which is part of SDK 7.2 and let us know if you are still seeing the issue? Regards, Anshu + diff --git a/data2/text/range/15001-20000/1021421.txt b/data2/text/range/15001-20000/1021421.txt new file mode 100644 index 0000000000000000000000000000000000000000..366110ce589c37a6e630db6da382125e16a5599e --- /dev/null +++ b/data2/text/range/15001-20000/1021421.txt @@ -0,0 +1,48 @@ +Ticket Name: TDA2SX: RGB Interlaced output on LCD1 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, SYSCONFIG Hi Expert, I'm developing a custom tda2sx board on TI-RTOS Vision SDK v03.05. I need RGB888 Interlaced output on LCD1. I tried changing the scan format in chains_common.c. The following is my setting: static Void ChainsCommon_SetDctrlConfig pVInfo->mInfo.scanFormat = SYSTEM_SF_INTERLACED; pVInfo->mInfo.standard = SYSTEM_STD_576I; pVInfo->mInfo.pixelClock = 13500U; pVInfo->mInfo.vBackPorch = 19U; pVInfo->mInfo.vSyncLen = 3U; pVInfo->mInfo.vFrontPorch = 2U; pVInfo->mInfo.hBackPorch = 138U; pVInfo->mInfo.hSyncLen = 126U; pVInfo->mInfo.hFrontPorch = 24U; pVInfo->mInfo.fps = 50U; But no matter how I change the configuration, vout clk and sync remain the same. Always the following result CLK: 27.xMHz Hsync: 32.xkHz Vsync: 50 Are my settings correct, or are there other steps? My query is related to the thread: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/803192/rtos-tda2p-abz-working-of-adv7393-on-tda2px Could you please give some suggestions here? Thanks in advance. + +Responses: +Hi, Interlaced and pixel clock are two different things. There is a separate interface for setting up clock, please use it to change the clock. Also vsync rate can remain same, depending on timing parameter. So could you please share your exact requirement? Rgds, Brijesh + +Hi, My requirement is below: CLK：13.5 MHz Hsync：15.625 kHz Vsync：50 I tried to change pVInfo->mInfo, but it did not affect the result. pVInfo->mInfo.width = displayWidth; // 576 pVInfo->mInfo.height = displayHeight; // 720 pVInfo->mInfo.pixelClock = 13500U; But the CLK output is always 27MHz. Please tell me how to configure the "separate interface for setting the clock"? Thanks in advance. + +You could change the pixel clock using this API Bsp_platformSetVencClkSrc. Please change clock to 13.5MHz here. Rgds, Brijesh + +Hi, According to your suggestion, the current output is as follows: CLK: 13.5 MHz Hsync: 15.625 kHz Vsync: 25 Hz How can I adjust Vsync to 50?? In addition, I will confirm with you again that the tda2 series can achieve RGB888 Interlaced output on LCD1? Thanks in advance. + +ok, atleast clock is correct now, 13.5Mhz We need to now configure DSS to output interlaced resolution. can you please check if interlaced output is set in the config/control register for the LCD you are using? Rgds, Brijesh + +Hi, a. Can you tell me which registers should be checked for interlaced output? b. My configuration is as follows, why do I need to check? pVInfo->mInfo.width = displayWidth; // 576 pVInfo->mInfo.height = displayHeight; // 720 pVInfo->mInfo.scanFormat = SYSTEM_SF_INTERLACED; pVInfo->mInfo.standard = SYSTEM_STD_576I; c. Please answer me, can tda2 series achieve RGB888 Interlaced output on LCD1? Thanks in advance. + +Hi, Wu BoHan said: a. Can you tell me which registers should be checked for interlaced output? Can you check DISPC_CONFIG. OUTPUTMODE_ENABLE (bit25) for the LCD output that you are using? This must be set to 1 for interlaced output Wu BoHan said: b. My configuration is as follows, why do I need to check? pVInfo->mInfo.width = displayWidth; // 576 pVInfo->mInfo.height = displayHeight; // 720 pVInfo->mInfo.scanFormat = SYSTEM_SF_INTERLACED; pVInfo->mInfo.standard = SYSTEM_STD_576I; This looks to be correct. Wu BoHan said: c. Please answer me, can tda2 series achieve RGB888 Interlaced output on LCD1? Weil, possible, but not validated. Regards, Brijesh + +Hi, Brijesh Jadav said: Can you check DISPC_CONFIG. OUTPUTMODE_ENABLE (bit25) for the LCD output that you are using? This must be set to 1 for interlaced output I checked DISPC_CONFIG1(0x5800 1044) and the result was 0x0040 0c04. OUTPUTMODEENABLE (bit 22) 0x1: Interlace mode selected How should I check or set the next step? thanks. + +Hi, Can you please run gel file from pdk_xx_xx_xx_xx\packages\ti\drv\vps\docs\tda2xx\TDA2xx_Dss_RegDump.gel from IPU core? and share the output. This will tell us if the register is setup correctly. Regards, Brijesh + +Hi, The results of run gel are as follows: [IPU1-0] 29.388702 s: DSS_DISPC_REVISION = 0x51 [IPU1-0] 29.388824 s: DSS_DISPC_SYSCONFIG = 0x1 [IPU1-0] 29.388916 s: DSS_DISPC_SYSSTATUS = 0x1 [IPU1-0] 29.389068 s: DSS_DISPC_IRQSTATUS = 0x0 [IPU1-0] 29.389190 s: DSS_DISPC_IRQENABLE = 0x4662 [IPU1-0] 29.389373 s: DSS_DISPC_CONTROL1 = 0x329 [IPU1-0] 29.389556 s: DSS_DISPC_CONFIG1 = 0x400c04 [IPU1-0] 29.389800 s: DSS_DISPC_DEFAULT_COLOR0 = 0x0 [IPU1-0] 29.390197 s: DSS_DISPC_DEFAULT_COLOR1 = 0x0 [IPU1-0] 29.390319 s: DSS_DISPC_TRANS_COLOR0 = 0x0 [IPU1-0] 29.390502 s: DSS_DISPC_TRANS_COLOR1 = 0x0 [IPU1-0] 29.390624 s: DSS_DISPC_LINE_STATUS = 0x16 [IPU1-0] 29.390776 s: DSS_DISPC_LINE_NUMBER = 0x23b [IPU1-0] 29.390898 s: DSS_DISPC_TIMING_H1 = 0x4400b3e [IPU1-0] 29.391356 s: DSS_DISPC_TIMING_V1 = 0x1300202 [IPU1-0] 29.391661 s: DSS_DISPC_POL_FREQ1 = 0x7000 [IPU1-0] 29.391844 s: DSS_DISPC_DIVISOR1 = 0x10001 [IPU1-0] 29.391966 s: DSS_DISPC_GLOBAL_ALPHA = 0xffffffff [IPU1-0] 29.416610 s: DSS_DISPC_SIZE_TV = 0x0 [IPU1-0] 29.416732 s: DSS_DISPC_SIZE_LCD1 = 0x23f02cf [IPU1-0] 29.416946 s: DSS_DISPC_GFX_BA0 = 0x84d95800 [IPU1-0] 29.417190 s: DSS_DISPC_GFX_BA1 = 0x84d95da0 [IPU1-0] 29.417312 s: DSS_DISPC_GFX_POSITION = 0x0 [IPU1-0] 29.417525 s: DSS_DISPC_GFX_SIZE = 0x0 [IPU1-0] 29.417647 s: DSS_DISPC_GFX_ATTRIBUTES = 0xe0000a1 [IPU1-0] 29.417830 s: DSS_DISPC_GFX_BUF_THRESHOLD = 0x4ff04f8 [IPU1-0] 29.417952 s: DSS_DISPC_GFX_BUF_SIZE_STATUS = 0x500 [IPU1-0] 29.418349 s: DSS_DISPC_GFX_ROW_INC = 0x1 [IPU1-0] 29.418471 s: DSS_DISPC_GFX_PIXEL_INC = 0x1 [IPU1-0] 29.418593 s: DSS_DISPC_GFX_TABLE_BA = 0x0 [IPU1-0] 29.418745 s: DSS_DISPC_VID1_BA0 = 0x84c33000 [IPU1-0] 29.418867 s: DSS_DISPC_VID1_BA1 = 0x84c332d0 [IPU1-0] 29.418989 s: DSS_DISPC_VID1_POSITION = 0x0 [IPU1-0] 29.419172 s: DSS_DISPC_VID1_SIZE = 0x0 [IPU1-0] 29.419325 s: DSS_DISPC_VID1_ATTRIBUTES = 0x2008401 [IPU1-0] 29.419447 s: DSS_DISPC_VID1_BUF_THRESHOLD = 0x7ff07f8 [IPU1-0] 29.419569 s: DSS_DISPC_VID1_BUF_SIZE_STATUS = 0x800 [IPU1-0] 29.419691 s: DSS_DISPC_VID1_ROW_INC = 0x1 [IPU1-0] 29.419813 s: DSS_DISPC_VID1_PIXEL_INC = 0x1 [IPU1-0] 29.419935 s: DSS_DISPC_VID1_FIR = 0x4000400 [IPU1-0] 29.420148 s: DSS_DISPC_VID1_PICTURE_SIZE = 0x0 [IPU1-0] 29.420270 s: DSS_DISPC_VID1_CONV_COEF0 = 0x0 [IPU1-0] 29.420453 s: DSS_DISPC_VID1_CONV_COEF1 = 0x0 [IPU1-0] 29.420575 s: DSS_DISPC_VID1_CONV_COEF2 = 0x0 [IPU1-0] 29.420728 s: DSS_DISPC_VID1_CONV_COEF3 = 0x0 [IPU1-0] 29.420850 s: DSS_DISPC_VID1_CONV_COEF4 = 0x0 [IPU1-0] 29.420972 s: DSS_DISPC_VID2_POSITION = 0x0 [IPU1-0] 29.426096 s: DSS_DISPC_VID2_SIZE = 0x0 [IPU1-0] 29.426188 s: DSS_DISPC_VID2_ATTRIBUTES = 0x6008400 [IPU1-0] 29.426432 s: DSS_DISPC_VID2_BUF_THRESHOLD = 0x7ff07f8 [IPU1-0] 29.426523 s: DSS_DISPC_VID2_BUF_SIZE_STATUS = 0x800 [IPU1-0] 29.426584 s: DSS_DISPC_VID2_ROW_INC = 0x1 [IPU1-0] 29.426676 s: DSS_DISPC_VID2_PIXEL_INC = 0x1 [IPU1-0] 29.426737 s: DSS_DISPC_VID2_FIR = 0x4000400 [IPU1-0] 29.426798 s: DSS_DISPC_VID2_PICTURE_SIZE = 0x0 [IPU1-0] 29.426859 s: DSS_DISPC_VID2_CONV_COEF0 = 0x0 [IPU1-0] 29.426950 s: DSS_DISPC_VID2_CONV_COEF1 = 0x0 [IPU1-0] 29.427011 s: DSS_DISPC_VID2_CONV_COEF2 = 0x0 [IPU1-0] 29.427286 s: DSS_DISPC_VID2_CONV_COEF3 = 0x0 [IPU1-0] 29.427347 s: DSS_DISPC_VID2_CONV_COEF4 = 0x0 [IPU1-0] 29.427438 s: DSS_DISPC_DATA1_CYCLE1 = 0x0 [IPU1-0] 29.427499 s: DSS_DISPC_DATA1_CYCLE2 = 0x0 [IPU1-0] 29.427560 s: DSS_DISPC_DATA1_CYCLE3 = 0x0 [IPU1-0] 29.427621 s: DSS_DISPC_CPR1_COEF_R = 0x0 [IPU1-0] 29.427774 s: DSS_DISPC_CPR1_COEF_G = 0x0 [IPU1-0] 29.427896 s: DSS_DISPC_CPR1_COEF_B = 0x0 [IPU1-0] 29.428018 s: DSS_DISPC_GFX_PRELOAD = 0x100 [IPU1-0] 29.428597 s: DSS_DISPC_VID1_PRELOAD = 0x100 [IPU1-0] 29.428719 s: DSS_DISPC_VID2_PRELOAD = 0x100 [IPU1-0] 29.428841 s: DSS_DISPC_CONTROL2 = 0x300 [IPU1-0] 29.428963 s: DSS_DISPC_GFX_POSITION2 = 0x0 [IPU1-0] 29.429421 s: DSS_DISPC_VID1_POSITION2 = 0x0 [IPU1-0] 29.429543 s: DSS_DISPC_VID2_POSITION2 = 0x0 [IPU1-0] 29.429665 s: DSS_DISPC_VID3_POSITION2 = 0x0 [IPU1-0] 29.429878 s: DSS_DISPC_VID3_ATTRIBUTES = 0xa008400 [IPU1-0] 29.430458 s: DSS_DISPC_VID3_CONV_COEF0 = 0x0 [IPU1-0] 29.430580 s: DSS_DISPC_VID3_CONV_COEF1 = 0x0 [IPU1-0] 29.430702 s: DSS_DISPC_VID3_CONV_COEF2 = 0x0 [IPU1-0] 29.430885 s: DSS_DISPC_VID3_CONV_COEF3 = 0x0 [IPU1-0] 29.431007 s: DSS_DISPC_VID3_CONV_COEF4 = 0x0 [IPU1-0] 29.444915 s: DSS_DISPC_VID3_BUF_SIZE_STATUS = 0x800 [IPU1-0] 29.445312 s: DSS_DISPC_VID3_BUF_THRESHOLD = 0x7ff07f8 [IPU1-0] 29.445495 s: DSS_DISPC_VID3_FIR = 0x4000400 [IPU1-0] 29.445617 s: DSS_DISPC_VID3_PICTURE_SIZE = 0x0 [IPU1-0] 29.445739 s: DSS_DISPC_VID3_PIXEL_INC = 0x1 [IPU1-0] 29.445861 s: DSS_DISPC_VID3_POSITION = 0x0 [IPU1-0] 29.446013 s: DSS_DISPC_VID3_PRELOAD = 0x100 [IPU1-0] 29.446440 s: DSS_DISPC_VID3_ROW_INC = 0x1 [IPU1-0] 29.446562 s: DSS_DISPC_VID3_SIZE = 0x0 [IPU1-0] 29.446715 s: DSS_DISPC_DEFAULT_COLOR2 = 0x0 [IPU1-0] 29.446837 s: DSS_DISPC_TRANS_COLOR2 = 0x0 [IPU1-0] 29.446959 s: DSS_DISPC_CPR2_COEF_B = 0x0 [IPU1-0] 29.447355 s: DSS_DISPC_CPR2_COEF_G = 0x0 [IPU1-0] 29.447477 s: DSS_DISPC_CPR2_COEF_R = 0x0 [IPU1-0] 29.447660 s: DSS_DISPC_DATA2_CYCLE1 = 0x0 [IPU1-0] 29.447782 s: DSS_DISPC_DATA2_CYCLE2 = 0x0 [IPU1-0] 29.447935 s: DSS_DISPC_DATA2_CYCLE3 = 0x0 [IPU1-0] 29.448179 s: DSS_DISPC_SIZE_LCD2 = 0x0 [IPU1-0] 29.448301 s: DSS_DISPC_TIMING_H2 = 0x0 [IPU1-0] 29.448423 s: DSS_DISPC_TIMING_V2 = 0x0 [IPU1-0] 29.448545 s: DSS_DISPC_POL_FREQ2 = 0x0 [IPU1-0] 29.448697 s: DSS_DISPC_DIVISOR2 = 0x40001 [IPU1-0] 29.448819 s: DSS_DISPC_WB_ATTRIBUTES = 0x8000 [IPU1-0] 29.448941 s: DSS_DISPC_WB_CONV_COEF0 = 0x0 [IPU1-0] 29.464497 s: DSS_DISPC_WB_CONV_COEF1 = 0x0 [IPU1-0] 29.464588 s: DSS_DISPC_WB_CONV_COEF2 = 0x0 [IPU1-0] 29.464863 s: DSS_DISPC_WB_CONV_COEF3 = 0x0 [IPU1-0] 29.464924 s: DSS_DISPC_WB_CONV_COEF4 = 0x0 [IPU1-0] 29.464985 s: DSS_DISPC_WB_BUF_SIZE_STATUS = 0x800 [IPU1-0] 29.465107 s: DSS_DISPC_WB_BUF_THRESHOLD = 0x7ff07f8 [IPU1-0] 29.465168 s: DSS_DISPC_WB_FIR = 0x4000400 [IPU1-0] 29.465229 s: DSS_DISPC_WB_PICTURE_SIZE = 0x0 [IPU1-0] 29.465320 s: DSS_DISPC_WB_PIXEL_INC = 0x1 [IPU1-0] 29.465381 s: DSS_DISPC_WB_ROW_INC = 0x1 [IPU1-0] 29.465442 s: DSS_DISPC_WB_SIZE = 0x0 [IPU1-0] 29.465503 s: DSS_DISPC_VID1_BA_UV0 = 0x84b35a00 [IPU1-0] 29.465564 s: DSS_DISPC_VID1_BA_UV1 = 0x84b35cd0 [IPU1-0] 29.465656 s: DSS_DISPC_CONFIG2 = 0x0 [IPU1-0] 29.465717 s: DSS_DISPC_VID1_ATTRIBUTES2 = 0x0 [IPU1-0] 29.465778 s: DSS_DISPC_VID2_ATTRIBUTES2 = 0x0 [IPU1-0] 29.465869 s: DSS_DISPC_VID3_ATTRIBUTES2 = 0x0 [IPU1-0] 29.465930 s: DSS_DISPC_GAMMA_TABLE0 = 0x0 [IPU1-0] 29.465991 s: DSS_DISPC_GAMMA_TABLE2 = 0x0 [IPU1-0] 29.466296 s: DSS_DISPC_VID1_FIR2 = 0x4000400 [IPU1-0] 29.466418 s: DSS_DISPC_VID2_FIR2 = 0x4000400 [IPU1-0] 29.466540 s: DSS_DISPC_VID3_FIR2 = 0x4000400 [IPU1-0] 29.466662 s: DSS_DISPC_WB_FIR2 = 0x4000400 [IPU1-0] 29.466784 s: DSS_DISPC_GLOBAL_BUFFER = 0x246d2240 [IPU1-0] 29.466937 s: DSS_DISPC_DIVISOR = 0x10001 [IPU1-0] 29.467364 s: DSS_DISPC_WB_ATTRIBUTES2 = 0x0 [IPU1-0] 29.467516 s: DSS_DISPC_DEFAULT_COLOR3 = 0x0 [IPU1-0] 29.467638 s: DSS_DISPC_TRANS_COLOR3 = 0x0 [IPU1-0] 29.467760 s: DSS_DISPC_CPR3_COEF_B = 0x0 [IPU1-0] 29.467882 s: DSS_DISPC_CPR3_COEF_G = 0x0 [IPU1-0] 29.468004 s: DSS_DISPC_CPR3_COEF_R = 0x0 [IPU1-0] 29.468462 s: DSS_DISPC_DATA3_CYCLE1 = 0x0 [IPU1-0] 29.468584 s: DSS_DISPC_DATA3_CYCLE2 = 0x0 [IPU1-0] 29.468706 s: DSS_DISPC_DATA3_CYCLE3 = 0x0 [IPU1-0] 29.468919 s: DSS_DISPC_SIZE_LCD3 = 0x0 [IPU1-0] 29.493747 s: DSS_DISPC_DIVISOR3 = 0x40001 [IPU1-0] 29.493869 s: DSS_DISPC_POL_FREQ3 = 0x0 [IPU1-0] 29.494387 s: DSS_DISPC_TIMING_H3 = 0x0 [IPU1-0] 29.494509 s: DSS_DISPC_TIMING_V3 = 0x0 [IPU1-0] 29.494631 s: DSS_DISPC_CONTROL3 = 0x300 [IPU1-0] 29.494845 s: DSS_DISPC_CONFIG3 = 0x0 [IPU1-0] 29.494967 s: DSS_DISPC_BA0_FLIPIMMEDIATE_EN = 0x0 [IPU1-0] 29.495424 s: DSS_DISPC_DISABLE_MSTANDBY_ENHANCEMENT = 0x1 [IPU1-0] 29.495546 s: DSS_DISPC_GLOBAL_MFLAG_ATTRIBUTE = 0x6 [IPU1-0] 29.495668 s: DSS_DISPC_GFX_MFLAG_THRESHOLD = 0x0 [IPU1-0] 29.495790 s: DSS_DISPC_VID1_MFLAG_THRESHOLD = 0x0 [IPU1-0] 29.495912 s: DSS_DISPC_VID2_MFLAG_THRESHOLD = 0x0 [IPU1-0] 29.496370 s: DSS_DISPC_VID3_MFLAG_THRESHOLD = 0x0 [IPU1-0] 29.496492 s: DSS_DISPC_WB_MFLAG_THRESHOLD = 0x0 How should I check or set the next step? thanks. + +Hi, I think the issue can be due to below register, it should be set to half of frame size. It should be set (288-1) for the field display. Can you try with this change? 9.416732 s: DSS_DISPC_SIZE_LCD1 = 0x23f02cf Regards, Brijesh + +Hi, I directly modify the DSS_DISPC_SIZE_LCD1 register to 0x11f02c. The Vsync output is 50Hz, but it is not continuous. As shown below: a. Is there an API to modify DSS_DISPC_SIZE_LCD1? b. In addition, Vsync is not continuous, how to fix it? thanks. + +Hi, What do you mean by vsync is not continuous? Also can you confirm that DSS_DISPC_SIZE_LCD1 is set to 0x11d02cf? Also how about the vertical timing? We would have to make vertical timing also half. Regards, Brijesh + +Hi, I modify the DSS_DISPC_SIZE_LCD1 register is set to 0x11d02cf. The vertical timing is shown below: Why is there no Vsync at the position marked by the green line? thanks. + +Hi, Did you also change the timing? I think you need to halve the virtual timing. I guess driver will set full vertical timing, so can make all timing to half in timing_v register? Regards, Brijesh + +Hi, Brijesh Jadav said: so can make all timing to half in timing_v register? The timing_v register is DISPC_TIMING_V1 (0x5800 1068)? My configuration is as follows: static Void ChainsCommon_SetDctrlConfig pVInfo->mInfo.vBackPorch = 19U; pVInfo->mInfo.vSyncLen = 3U; pVInfo->mInfo.vFrontPorch = 2U; pVInfo->mInfo.hBackPorch = 138U; pVInfo->mInfo.hSyncLen = 126U; pVInfo->mInfo.hFrontPorch = 24U; Wu BoHan said: [IPU1-0] 29.390898 s: DSS_DISPC_TIMING_H1 = 0x4400b3e [IPU1-0] 29.391356 s: DSS_DISPC_TIMING_V1 = 0x1300202 VBP[31:20]: 0x013 → 19 VFP[19:8]: 0x002 → 2 VSW[7:0]: 0x02 → 2 HBP[31:20]: 0x044 → 68 HFP[19:8]: 0x00b → 11 HSW[7:0]: 0x3e → 62 Do I need to halve the virtual timing? Is there an API to using? thanks. + +Hi, vsync cannot vary so much. Once the timing is provided, atleast, it will be periodic. so are you sure that you are measuring vsync? Is DSS really configured for discrete sync output? And also is the pinmux for the vsync output setup correctly? Regarding timing, for PAL resolution, there would be 312 lines per field. You are programming 286 + 19 + 2 + 3 lines, which is 310 lines.. It is slightly short, but even with this timing, you should get vsync period consistent. vsync cannot vary so much.. Regards, Brijesh + +Hi, Brijesh Jadav said: Is DSS really configured for discrete sync output? How can I check the configuration and results? thanks. + +Hi, Wu BoHan said: How can I check the configuration and results? I meant the pinmux, pixel clock etc. are you sure that the pinmux is correct? Can you also probe pixel clock and make sure it is correct? Regards, Brijesh + +Hi, When I tried changing the scan format in chains_common.c. The following is my setting: static Void ChainsCommon_SetDctrlConfig pVInfo->mInfo.scanFormat = SYSTEM_SF_INTERLACED; pVInfo->mInfo.standard = SYSTEM_STD_576I; Assertion occurs during execution: [IPU1-0] 5.807478 s: CAPTURE: Create in progress !!! [IPU1-0] 5.807692 s: CAPTURE: VIP1 Slice1 PortB capture mode is [ 8-bit] !!! [IPU1-0] 5.862044 s: CAPTURE: Create Done !!! [IPU1-0] 5.862441 s: DISPLAY: Create in progress !!! [IPU1-0] 5.862746 s: dispcore/src/vpscore_dss.c @ Line 1412: [IPU1-0] 5.862868 s: Format(interlaced/progressive) conversion is not supported [IPU1-0] 5.862959 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: [IPU1-0] 5.863020 s: Set DSS parameter failed [IPU1-0] 5.863081 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! [IPU1-0] 5.863600 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! Assertion points to the following: Int32 DisplayLink_drvDisplayCreate(DisplayLink_Obj *pObj) status = FVID2_control( pObj->displayHndl, IOCTL_VPS_DISP_SET_DSS_PARAMS, &pObj->dssPrms, NULL); What should I do? thanks. + +Hi, It looks like your output format is set to interlaced format, but input is in progressive. Could you please make sure to set both of them to interlaced? I think on TDA3x, we had support for setting up output to NTSC/PAL resolution, which are interlaced resolution. Could you please check display settings for these modes in the vision sdk and make similar changes for TDA2x? For TDA3x, on display settings, we can select output to DAC and select the resolution to NTSC/PAL. Entire usecase will then work and output on NTSC/PAL resolution. Regards, Brijesh + diff --git a/data2/text/range/15001-20000/1032376.txt b/data2/text/range/15001-20000/1032376.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c86e232c0b6da248d9eeae9ccb565b88f413480 --- /dev/null +++ b/data2/text/range/15001-20000/1032376.txt @@ -0,0 +1,347 @@ +Ticket Name: TDA2SG: TDA2_Crash_PVR_K_and_Kerne + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi Sir: Our company has a TDA2 product. Now the system will crash. The attachment is the log when the crash. Is there any direction to solve the problem? The product in this problem has the function of using MLO to perform DDR tests. There is no problem with the DDR test at present. The same firmware does not have this problem with other hardware. Is there any way to test MMU units? 0880.Crash_Log.txt [HOST] [IPU2 ] 822.653327 s: [CAMERATASK]Front CAM(PCB ID 0) recover from reset! + +[ 820.074848] PVR_K:(Error): SGXOSTimer() detected SGX lockup (0x80f tasks) +[ 820.082059] PVR_K: HWRecoveryResetSGX: SGX Hardware Recovery triggered +[ 820.089034] PVR_K: SGX debug (SGX_DDK sgxddk MAIN@3699939) +[ 820.094942] PVR_K:(Error): SGX Register Base Address (Linear): 0xf3640000 +[ 820.102134] PVR_K:(Error): SGX Register Base Address (Physical): 0x56000000 +[ 820.109550] PVR_K: Running SGXREG Debug Scripts: +[ 820.114371] PVR_K: (HYD) +[ 820.117285] PVR_K: (SGXREG) 0x00004000 : 0x00000001 +[ 820.122519] PVR_K: (SGXREG) 0x00004004 : 0x0000000A +[ 820.127886] PVR_K: (SGXREG) 0x00004008 : 0x0000000F +[ 820.133110] PVR_K: (SGXREG) 0x00004024 : 0x00000005 +[ 820.138473] PVR_K: (SGXREG) 0x00004118 : 0x00000018 +[ 820.143707] PVR_K: (SGXREG) 0x0000412C : 0x20000000 +[ 820.149071] PVR_K: (SGXREG) 0x00004404 : 0x00000000 +[ 820.154305] PVR_K: (SGXREG) 0x00004C04 : 0x00080000 +[ 820.159670] PVR_K: (SGXREG) 0x00004C08 : 0x00000000 +[ 820.164981] PVR_K: (SGXREG) 0x00004C74 : 0x00000000 +[ 820.170239] PVR_K: (SGXREG) 0x00004C78 : 0x00000000 +[ 820.175571] PVR_K: (SGXREG) 0x00004CA8 : 0x00000000 +[ 820.180851] PVR_K: (P0) +[ 820.183524] PVR_K: (SGXREG) 0x00008000 : 0x002AAAAA +[ 820.188904] PVR_K: (SGXREG) 0x00008004 : 0x0A8A8AAA +[ 820.194107] PVR_K: (SGXREG) 0x00008008 : 0x0102AA87 +[ 820.199472] PVR_K: (SGXREG) 0x00008118 : 0x000000A8 +[ 820.204657] PVR_K: (SGXREG) 0x0000812C : 0x243C2F80 + [HOST] [IPU2 ] 822.863630 s: src/bsp_deviceI2c.c @ Line 667[ 820.210480] PVR_K: (SGXREG) 0x000084E4 : 0x00062014 +: + + [HOST] [IPU2 ] 822.863722 s: I2C3: DEV 0x3c: ERROR !![ 820.220562] PVR_K: (SGXREG) 0x00008658 : 0x00000000 +! + + [HOST] [IPU2 ] 822.863813 s: src/bsp_deviceI2c.c @ Lin[ 820.231193] PVR_K: (SGXREG) 0x00008A74 : 0x0E208200 +e 689: + + [HOST] [IPU2 ] 822.863905 s: I2C3: Error timeout[ 820.241685] PVR_K: (SGXREG) 0x00008BA4 : 0x00000001 + 0 ms!!! + + [HOST] [IPU2 ] 822.863996 s: Err!! ,oToHal_I2c_[ 820.252317] PVR_K: (SGXREG) 0x00008C04 : 0x000D2000 +Write @ Line 80: + + [HOST] [IPU2 ] 822.864179 s: AddrSize i[ 820.262838] PVR_K: (SGXREG) 0x00008C08 : 0xF15A6010 +s 0, regValue= 0x09, 0x01, ... + + [HOST] [IPU2 ] 822.864271 [ 820.273492] PVR_K: (SGXREG) 0x00008C74 : 0x00000000 +s: Err!! ,oToHal_I2c_Write @ Line 145: + + [HOST] [IPU2 ] 8[ 820.283996] PVR_K: (SGXREG) 0x00008C78 : 0x00000007 +22.864362 s: oToHal_I2c_Write Fail + + [HOST] [IPU2 ] 822.864[ 820.294648] PVR_K: (SGXREG) 0x00008CB4 : 0x00000000 +850 s: src/bsp_deviceI2c.c @ Line 478: + + [HOST] [IPU2 ] 82[ 820.305156] PVR_K: (SGXREG) 0x00008E04 : 0x00000000 +2.864942 s: I2C3: DEV 0x3c: RD ERROR !!! + + [HOST] [IPU2 ] [ 820.315793] PVR_K: (SGXREG) 0x00008624 : 0x00000000 +822.865033 s: src/bsp_deviceI2c.c @ Line 504: + + [HOST] [IPU2 [ 820.326290] PVR_K: (SGXREG) 0x00008628 : 0x00000000 +] 822.865186 s: I2C3: Error timeout 1 ms!!! + + [HOST] [IPU2 [ 820.336968] PVR_K: (SGXREG) 0x00008630 : 0x00000000 + ] 822.865277 s: Err!! ,oToHal_I2c_Read @ Line 230: + + [HOS[ 820.347442] PVR_K: (SGXREG) 0x00008664 : 0x00000000 +T] [IPU2 ] 822.865399 s: AddrSize is 0, regValue= 0x09, 0x01[ 820.358094] PVR_K: (SGXREG) 0x00008734 : 0x00000000 +, ... + + [HOST] [IPU2 ] 822.865460 s: Err!! ,oToHal_I2c_Rea[ 820.368598] PVR_K: (SGXREG) 0x00008AA4 : 0xAAAAAAAA +d @ Line 311: + + [HOST] [IPU2 ] 822.865552 s: oToHal_I2c_Re[ 820.379257] PVR_K: (SGXREG) 0x00008AA8 : 0xAAAAAAAA +ad Fail + + [HOST] [IPU2 ] 822.865613 s: Error Stauts Code is[ 820.389782] PVR_K: (SGXREG) 0x00008B08 : 0x0001C8E5 + 1, Cal checksum = 23, read checksum = 0 + + [HOST] [IPU2 ] 8[ 820.400419] PVR_K: (SGXREG) 0x00008B14 : 0x0000D88A +22.865704 s: ERROR: _oToDevice_Isx019_GET_VERSIONMODEL : -1 + +[ 820.411280] PVR_K: (SGXREG) 0x00008B0C : 0x0001C1C2 + [HOST] [IPU2 ] 823.065698 s: src/bsp_deviceI2c.c @ Line 667[ 820.421434] PVR_K: (SGXREG) 0x00008B18 : 0x0001A54E +: + + [HOST] [IPU2 ] 823.065790 s: I2C3: DEV 0x3c: ERROR !![ 820.431905] PVR_K: (SGXREG) 0x00008B10 : 0x0001080F +! + + [HOST] [IPU2 ] 823.065881 s: src/bsp_deviceI2c.c @ Lin[ 820.442567] PVR_K: (SGXREG) 0x00008B1C : 0x00010000 +e 689: + + [HOST] [IPU2 ] 823.065942 s: I2C3: Error timeout[ 820.453056] PVR_K: (SGXREG) 0x00008B80 : 0xAAAAAAAA + 0 ms!!! + + [HOST] [IPU2 ] 823.066034 s: Err!! ,oToHal_I2c_[ 820.463741] PVR_K: (SGXREG) 0x00008B84 : 0xAAAAAAAA +Write @ Line 80: + + [HOST] [IPU2 ] 823.066186 s: AddrSize i[ 820.474208] PVR_K: (SGXREG) 0x00008B88 : 0x0001D6C8 +s 0, regValue= 0x09, 0x01, ... + + [HOST] [IPU2 ] 823.066278 [ 820.484909] PVR_K: (SGXREG) 0x00008B94 : 0x0000DE05 +s: Err!! ,oToHal_I2c_Write @ Line 145: + + [HOST] [IPU2 ] 8[ 820.495366] PVR_K: (SGXREG) 0x00008B8C : 0x0001A4E3 +23.066369 s: oToHal_I2c_Write Fail + + [HOST] [IPU2 ] 823.066[ 820.506086] PVR_K: (SGXREG) 0x00008B98 : 0x0001A4C4 +857 s: src/bsp_deviceI2c.c @ Line 478: + + [HOST] [IPU2 ] 82[ 820.516525] PVR_K: (SGXREG) 0x00008B90 : 0x00010000 +3.066949 s: I2C3: DEV 0x3c: RD ERROR !!! + + [HOST] [IPU2 ] [ 820.527184] PVR_K: (SGXREG) 0x00008B9C : 0x00010000 +823.067040 s: src/bsp_deviceI2c.c @ Line 504: + + [HOST] [IPU2 [ 820.537677] PVR_K: (P1) +] 823.067193 s: I2C3: Error timeout 1 ms!!! + + [HOST] [IPU2 [ 820.545773] PVR_K: (SGXREG) 0x0000C000 : 0x002AAAAA + ] 823.067284 s: Err!! ,oToHal_I2c_Read @ Line 230: + + [HOS[ 820.556307] PVR_K: (SGXREG) 0x0000C004 : 0x0A8A8AAA +T] [IPU2 ] 823.067376 s: AddrSize is 0, regValue= 0x09, 0x01[ 820.566964] PVR_K: (SGXREG) 0x0000C008 : 0x01000001 +, ... + + [HOST] [IPU2 ] 823.067467 s: Err!! ,oToHal_I2c_Rea[ 820.577459] PVR_K: (SGXREG) 0x0000C118 : 0x000000A8 +d @ Line 311: + + [HOST] [IPU2 ] 823.067559 s: oToHal_I2c_Re[ 820.588162] PVR_K: (SGXREG) 0x0000C12C : 0x043C2F80 +ad Fail + + [HOST] [IPU2 ] 823.067589 s: Error Stauts Code is[ 820.598628] PVR_K: (SGXREG) 0x0000C4E4 : 0x00052C16 + 1, Cal checksum = 23, read checksum = 0 + + [HOST] [IPU2 ] 8[ 820.609386] PVR_K: (SGXREG) 0x0000C658 : 0x00000000 +23.067711 s: ERROR: _oToDevice_Isx019_GET_VERSIONMODEL : -1 + + [[ 820.620075] PVR_K: (SGXREG) 0x0000CA74 : 0x0E208200 +HOST] [IPU2 ] 823.267705 s: src/bsp_deviceI2c.c @ Line 667: [ 820.630453] PVR_K: (SGXREG) 0x0000CBA4 : 0x00000001 + + + [HOST] [IPU2 ] 823.267797 s: I2C3: DEV 0x3c: ERROR !!! [ 820.640940] PVR_K: (SGXREG) 0x0000CC04 : 0x00080000 + + + [HOST] [IPU2 ] 823.267888 s: src/bsp_deviceI2c.c @ Line [ 820.651593] PVR_K: (SGXREG) 0x0000CC08 : 0x00000000 +689: + + [HOST] [IPU2 ] 823.267980 s: I2C3: Error timeout 0[ 820.662087] PVR_K: (SGXREG) 0x0000CC74 : 0x00000000 + ms!!! + + [HOST] [IPU2 ] 823.268071 s: Err!! ,oToHal_I2c_Wr[ 820.672792] PVR_K: (SGXREG) 0x0000CC78 : 0x00000007 +ite @ Line 80: + + [HOST] [IPU2 ] 823.268224 s: AddrSize is [ 820.683270] PVR_K: (SGXREG) 0x0000CCB4 : 0x00000000 +0, regValue= 0x09, 0x01, ... + + [HOST] [IPU2 ] 823.268315 s:[ 820.693908] PVR_K: (SGXREG) 0x0000CE04 : 0x00000000 + Err!! ,oToHal_I2c_Write @ Line 145: + + [HOST] [IPU2 ] 823[ 820.704404] PVR_K: (SGXREG) 0x0000C624 : 0x00000000 +.268376 s: oToHal_I2c_Write Fail + + [HOST] [IPU2 ] 823.26889[ 820.715119] PVR_K: (SGXREG) 0x0000C628 : 0x00000000 +5 s: src/bsp_deviceI2c.c @ Line 478: + + [HOST] [IPU2 ] 823.[ 820.725567] PVR_K: (SGXREG) 0x0000C630 : 0x00000000 +268986 s: I2C3: DEV 0x3c: RD ERROR !!! + + [HOST] [IPU2 ] 82[ 820.736218] PVR_K: (SGXREG) 0x0000C664 : 0x00000000 +3.269352 s: src/bsp_deviceI2c.c @ Line 504: + + [HOST] [IPU2 ] [ 820.746720] PVR_K: (SGXREG) 0x0000C734 : 0x00000000 + 823.269474 s: I2C3: Error timeout 1 ms!!! + + [HOST] [IPU2 ][ 820.757372] PVR_K: (SGXREG) 0x0000CAA4 : 0xAAAAAAAA + 823.269566 s: Err!! ,oToHal_I2c_Read @ Line 230: + + [HOST][ 820.767868] PVR_K: (SGXREG) 0x0000CAA8 : 0xAAAAAAAA + [IPU2 ] 823.269627 s: AddrSize is 0, regValue= 0x09, 0x01, [ 820.778544] PVR_K: (SGXREG) 0x0000CB08 : 0x000100E4 +... + + [HOST] [IPU2 ] 823.269718 s: Err!! ,oToHal_I2c_Read [ 820.789058] PVR_K: (SGXREG) 0x0000CB14 : 0x000110C8 +@ Line 311: + + [HOST] [IPU2 ] 823.269810 s: oToHal_I2c_Read[ 820.799689] PVR_K: (SGXREG) 0x0000CB0C : 0x0001C246 + Fail + + [HOST] [IPU2 ] 823.269871 s: Error Stauts Code is 1[ 820.810187] PVR_K: (SGXREG) 0x0000CB18 : 0x0001A570 +, Cal checksum = 23, read checksum = 0 + + [HOST] [IPU2 ] 823[ 820.820879] PVR_K: (SGXREG) 0x0000CB10 : 0x00010000 +.269962 s: ERROR: _oToDevice_Isx019_GET_VERSIONMODEL : -1 + + [HO[ 820.831341] PVR_K: (SGXREG) 0x0000CB1C : 0x00010000 +ST] [IPU2 ] 823.270054 s: [CAMERATASK]Get Left CAM(PCB ID 3)[ 820.842002] PVR_K: (SGXREG) 0x0000CB80 : 0xAAAAAAAA + Ver string failed but image is ok! + +[ 820.852489] PVR_K: (SGXREG) 0x0000CB84 : 0xAAAAAAAA +[ 820.860854] PVR_K: (SGXREG) 0x0000CB88 : 0x000110A5 +[ 820.866459] PVR_K: (SGXREG) 0x0000CB94 : 0x00011A99 +[ 820.871619] PVR_K: (SGXREG) 0x0000CB8C : 0x0001A548 +[ 820.876987] PVR_K: (SGXREG) 0x0000CB98 : 0x0001A56C +[ 820.882181] PVR_K: (SGXREG) 0x0000CB90 : 0x00010000 +[ 820.887424] PVR_K: (SGXREG) 0x0000CB9C : 0x00010000 +[ 820.892480] PVR_K: SGX Register Dump: +[ 820.896269] PVR_K: (P0) EUR_CR_CORE_ID: 01191201 +[ 820.901721] PVR_K: (P0) EUR_CR_CORE_REVISION: 00010106 +[ 820.907249] PVR_K: (P0) EUR_CR_EVENT_STATUS: 243C2F80 +[ 820.912702] PVR_K: (P0) EUR_CR_EVENT_STATUS2: 000000A8 +[ 820.918249] PVR_K: (P0) EUR_CR_BIF_CTRL: 00000000 +[ 820.923701] PVR_K: (P0) EUR_CR_BIF_BANK0: 00000007 +[ 820.929254] PVR_K: (P0) EUR_CR_BIF_INT_STAT: 000D2000 +[ 820.934705] PVR_K: (P0) EUR_CR_BIF_FAULT: F15A6010 +[ 820.940232] PVR_K: (P0) EUR_CR_BIF_MEM_REQ_STAT: 00000000 +[ 820.945688] PVR_K: (P0) EUR_CR_CLKGATECTL: 002AAAAA +[ 820.951111] PVR_K: (P1) EUR_CR_EVENT_STATUS: 043C2F80 +[ 820.956679] PVR_K: (P1) EUR_CR_EVENT_STATUS2: 000000A8 +[ 820.962103] PVR_K: (P1) EUR_CR_BIF_CTRL: 00000000 +[ 820.967647] PVR_K: (P1) EUR_CR_BIF_BANK0: 00000007 +[ 820.973071] PVR_K: (P1) EUR_CR_BIF_INT_STAT: 00080000 +[ 820.978615] PVR_K: (P1) EUR_CR_BIF_FAULT: 00000000 +[ 820.984069] PVR_K: (P1) EUR_CR_BIF_MEM_REQ_STAT: 00000001 +[ 820.989616] PVR_K: (P1) EUR_CR_CLKGATECTL: 002AAAAA +[ 820.995051] PVR_K: Checking EDM memory context (index = 7, PD = 0xac332000) +[ 821.002070] PVR_K: Found MMU context for page fault 0xf15a6000 +[ 821.008092] PVR_K: GPU memory context is for PID=109 (modprobe) +[ 821.014066] PVR_K: No PDE found +[ 821.017356] PVR_K: Checking TA memory context (index = 0, PD = 0xad93d000) +[ 821.024289] PVR_K: Found MMU context for page fault 0xf15a6000 +[ 821.030264] PVR_K: GPU memory context is for PID=151 (oTobrite_apps.o) +[ 821.036862] PVR_K: No PDE found +[ 821.040019] PVR_K: Checking 3D memory context (index = 0, PD = 0xad93d000) +[ 821.047073] PVR_K: Found MMU context for page fault 0xf15a6000 +[ 821.052933] PVR_K: GPU memory context is for PID=151 (oTobrite_apps.o) +[ 821.059612] PVR_K: No PDE found +[ 821.062769] PVR_K: Checking PTLA memory context (index = 0, PD = 0xad93d000) +[ 821.069970] PVR_K: Found MMU context for page fault 0xf15a6000 +[ 821.075839] PVR_K: GPU memory context is for PID=151 (oTobrite_apps.o) +[ 821.082465] PVR_K: No PDE found +[ 821.085755] PVR_K: Host Ctl flags= 0000000c +[ 821.090043] PVR_K: SGX Host control: +[ 821.093663] PVR_K: (HC-0) 0x00000001 0x00000000 0x00000000 0x00000004 +[ 821.100363] PVR_K: (HC-10) 0x00000002 0x0000000A 0x0004A666 0x00000000 +[ 821.107041] PVR_K: (HC-20) 0x00000000 0x00000007 0x00000000 0x00000000 +[ 821.113685] PVR_K: (HC-30) 0x000A3691 0x1EE73970 0x00000000 0x00000000 +[ 821.120496] PVR_K: (HC-40) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.127151] PVR_K: (HC-50) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.133822] PVR_K: (HC-60) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.140599] PVR_K: (HC-70) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.147277] PVR_K: (HC-80) 0x00000000 0x00000000 0x00041BA3 0xAA2E7800 +[ 821.153919] PVR_K: SGX TA/3D control: +[ 821.157746] PVR_K: (T3C-0) 0xF4003000 0xF40031A0 0xF4002000 0x00000000 +[ 821.164392] PVR_K: (T3C-10) 0x00000000 0x00000002 0x00000000 0x00000000 +[ 821.171248] PVR_K: (T3C-20) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.177990] PVR_K: (T3C-30) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.184770] PVR_K: (T3C-40) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.191635] PVR_K: (T3C-50) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.198400] PVR_K: (T3C-60) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.205234] PVR_K: (T3C-70) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.211993] PVR_K: (T3C-80) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.218845] PVR_K: (T3C-90) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.225613] PVR_K: (T3C-A0) 0x00000000 0x00000000 0x00000000 0xF4156420 +[ 821.232345] PVR_K: (T3C-B0) 0xF4002C60 0xF4000000 0xAC332000 0x00000000 +[ 821.239226] PVR_K: (T3C-C0) 0x00000000 0xF412C000 0xF4002C60 0xF411E8C0 +[ 821.245971] PVR_K: (T3C-D0) 0xF400FF80 0x00000000 0x00000000 0xF4156420 +[ 821.252730] PVR_K: (T3C-E0) 0xF41214A0 0x0010122E 0x0010122E 0x00000000 +[ 821.259592] PVR_K: (T3C-F0) 0x00000000 0x00000000 0x00000000 0x00000000 +[ 821.266358] PVR_K: (T3C-100) 0x00000000 0x00000000 0x00000000 0x000001FE +[ 821.273176] PVR_K: (T3C-110) 0x00000022 0x00000000 0x00000000 0x00000000 +[ 821.280144] PVR_K: (T3C-120) 0x00000021 0x00005608 0x00005608 0x00000000 +[ 821.287026] PVR_K: (T3C-130) 0xF2016010 0xF2016014 0xF2016034 0xF2016030 +[ 821.293873] PVR_K: (T3C-140) 0xF4004000 0xF400F820 0xF4002020 0xF411D000 +[ 821.300823] PVR_K: (T3C-150) 0xF411D000 0x00000000 0x00000000 0x00000097 + [HOST] [IPU2 ] 823.966266 s: src/bsp_deviceI2c.c @ Line 580[ 821.307821] PVR_K: (T3C-160) 0x00000097 0x00000000 0x00000000 0x00000000 +: + +... + + [HOST] [HOST ] 835.890837 s: [eth_monitor]: init:1, BMCR:0x2100, BMSR:0x5, PHY_PktCnt:1067423, Linux_PktCnt:1067340 + +[ 833.328622] Unable to handle kernel paging request at virtual address c4e1b590 +[ 833.335878] pgd = ed2f6b80 +[ 833.338592] [c4e1b590] *pgd=80000080007003, *pmd=00000000 +[ 833.344025] Internal error: Oops: 206 [#1] PREEMPT ARM +[ 833.349181] Modules linked in: cmemk(O) memcache(O) rpmsg_proto virtio_rpmsg_bus omap_remoteproc remoteproc virtio_ring virtio bc_example(O) pvrsrvkm(O) +[ 833.362956] CPU: 0 PID: 213 Comm: oTobrite_apps.o Tainted: G O 4.4.84+ #3 +[ 833.370903] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 833.377020] task: edd9d600 ti: ed926000 task.ti: ed926000 +[ 833.382443] PC is at ksize+0x30/0xac +[ 833.386034] LR is at __alloc_skb+0x80/0x16c +[ 833.390232] pc : [] lr : [] psr: a00b0013 +[ 833.390232] sp : ed927d90 ip : ed927da8 fp : ed927da4 +[ 833.401756] r10: 80827f82 r9 : 00000001 r8 : 00000001 +[ 833.407000] r7 : 00000000 r6 : 024000c0 r5 : 00000780 r4 : c4e1b57c +[ 833.413551] r3 : c084e484 r2 : a00b0013 r1 : eff63080 r0 : 006c495f +[ 833.420103] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user +[ 833.427265] Control: 30c53c7d Table: ad2f6b80 DAC: fffffffd +[ 833.433032] Process oTobrite_apps.o (pid: 213, stack limit = 0xed926208) +[ 833.439758] Stack: (0xed927d90 to 0xed928000) +[ 833.444130] 7d80: c2670a80 00000780 ed927dd4 ed927da8 +[ 833.452342] 7da0: c049d4ec c00fd5dc ffffffff 00000000 ed929600 000005b4 00000000 00000000 +[ 833.460553] 7dc0: ed9296d4 c2670c00 ed927dfc ed927dd8 c04f0b70 c049d478 000005b4 ed927ec4 +[ 833.468763] 7de0: 00000000 000005b4 ed927ec4 ed929600 ed927e74 ed927e00 c04f17cc c04f0b20 +[ 833.476975] 7e00: 000005b4 ed927e10 c0055d84 c005de9c edd9e100 00000001 00000000 00000000 +[ 833.485184] 7e20: ed926000 c0055ce4 00000000 00000000 000005b4 001394f0 ed927e6c 000005b4 +[ 833.493395] 7e40: 00000059 c45dd049 ed927eb4 ed929600 00000000 c2a37000 00000121 c000fba4 +[ 833.501605] 7e60: ed926000 00000000 ed927e94 ed927e78 c0519534 c04f1258 c012a1d4 c012a150 +[ 833.509816] 7e80: ed927ea4 00000000 ed927ea4 ed927e98 c0492334 c0519504 ed927f8c ed927ea8 +[ 833.518027] 7ea0: c04931e4 c0492324 ed927ecc ed926000 ed927f54 fffffff7 00000001 b39d9080 +[ 833.526237] 7ec0: 00153640 00000000 00000000 00000001 001394f0 0001a150 ed927ebc 00000001 +[ 833.534447] 7ee0: 00000000 00000000 00000000 00000015 ed929600 00000000 ed927f34 ed927f08 +[ 833.542657] 7f00: c0495d84 c0039030 00000064 ed929600 00000000 00000008 c2a37000 82d72cf0 +[ 833.550867] 7f20: 00000001 00000000 ed927f6c ed927f38 c0497b44 c0495c58 ed927f54 ed927f48 +[ 833.559077] 7f40: c012a1d4 c012a150 00000008 00000001 00000015 82d72cf0 00000008 00000001 +[ 833.567286] 7f60: ed927fa4 ed927f70 c04933f0 c010e9a0 00000008 00000040 82d73664 00000000 +[ 833.575496] 7f80: ed927fa4 ed927f90 c049322c c0493130 00000000 00000000 00000000 ed927fa8 +[ 833.583707] 7fa0: c000fa00 c0493218 00000040 82d73664 0000003a b39d9080 00153640 00000000 +[ 833.591918] 7fc0: 00000040 82d73664 00000000 00000121 00000000 82d72f90 00000000 bebf0bf8 +[ 833.600128] 7fe0: 00000000 82d72cd0 00000000 b6f25170 800f0030 0000003a e1a04000 e3a00012 +[ 833.608335] Backtrace: +[ 833.610799] [] (ksize) from [] (__alloc_skb+0x80/0x16c) +[ 833.617786] r5:00000780 r4:c2670a80 +[ 833.621394] [] (__alloc_skb) from [] (sk_stream_alloc_skb+0x5c/0x188) +[ 833.629601] r10:c2670c00 r9:ed9296d4 r8:00000000 r7:00000000 r6:000005b4 r5:ed929600 +[ 833.637493] r4:00000000 r3:ffffffff +[ 833.641095] [] (sk_stream_alloc_skb) from [] (tcp_sendmsg+0x580/0xab4) +[ 833.649389] r7:ed929600 r6:ed927ec4 r5:000005b4 r4:00000000 +[ 833.655100] [] (tcp_sendmsg) from [] (inet_sendmsg+0x3c/0x70) +[ 833.662610] r10:00000000 r9:ed926000 r8:c000fba4 r7:00000121 r6:c2a37000 r5:00000000 +[ 833.670500] r4:ed929600 +[ 833.673050] [] (inet_sendmsg) from [] (sock_sendmsg+0x1c/0x2c) +[ 833.680646] r4:00000000 +[ 833.683194] [] (sock_sendmsg) from [] (SyS_sendto+0xc0/0xe8) +[ 833.690620] [] (SyS_sendto) from [] (SyS_send+0x20/0x28) +[ 833.697694] r6:00000000 r5:82d73664 r4:00000040 +[ 833.702350] [] (SyS_send) from [] (ret_fast_syscall+0x0/0x34) +[ 833.709864] Code: e1a00620 e5934000 e0800180 e0844100 (e5940014) +[ 833.715985] ---[ end trace 6d56e50ec7025b94 ]--- + [HOST] [DSP1 ] 836.388275 s: [DSP] more frames 4 + +Responses: +Hi, Could you explain what application you are running? Could you also describe more details about how the crash occurred? Does it always crash with the same error log? We never have any issue with MMU (for A15, M4, or DSP) on this device so I don't think you need to run any MMU test. Or, is the MMU unit you referring to something different than memory management unit? Regards, Stanley + diff --git a/data2/text/range/15001-20000/1244576.txt b/data2/text/range/15001-20000/1244576.txt new file mode 100644 index 0000000000000000000000000000000000000000..77a6409d651c996cf4e076455e1b5711a81a4793 --- /dev/null +++ b/data2/text/range/15001-20000/1244576.txt @@ -0,0 +1,271 @@ +Ticket Name: TDA4VM: Configure DPI0 to output BT1120 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi team, SDK: ti-processor-sdk-rtos-j721e-evm-08_05_00_11 H/W design: VOUT0 connected externally to NVP6021, and BT.1120 switch to AHD output. And NVP6021 pin is defined as follows: TDA4VM <==> NVP6021 h/w connection： VOUT0_DATA2~9 connected to NVP6021 Y0~7 VOUT0_DATA12~19 connected to NVP6021 C0~7 These correspond to the data map mentioned in the manual: 1920*1080p 25fps was selected and the customer made the following modifications in SDK： app_init.c: appInit() prm.timings.hFrontPorch = 460U; prm.timings.hBackPorch = 110U; prm.timings.hSyncLen = 150U; prm.timings.vFrontPorch = 4U; prm.timings.vBackPorch = 34U; prm.timings.vSyncLen = 7U; prm.timings.pixelClock = 74250000ULL; app_dss_defaults.c: appDctrlDefaultInit() vpParams.dvoFormat = APP_DCTRL_DV_BT1120_EMBSYNC; app_dss_defaults.c appDssDefaultInit() The EVM uses VOUT0 to HDMI and the customer's design uses VOUT0 too, so they have modified the following under the code corresponding to the APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI macro: else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) { appLogPrintf("DSS: Display type is HDMI !!!\n"); obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2; obj->nodeVpId = APP_DCTRL_NODE_VP2; obj->nodeDpiId = APP_DCTRL_NODE_DPI_DPI0; obj->overlayId = APP_DSS_OVERLAY_ID_2; obj->vpId = APP_DSS_VP_ID_2; //yaogang modify //obj->videoIfWidth = APP_DCTRL_VIFW_24BIT; obj->videoIfWidth = APP_DCTRL_VIFW_16BIT; } NVP6021 Initialization: the registers of the NVP6021 have been set according to the configuration list given by the FAE. And please see the test: 1) The measured clock output is 74.25M with oscilloscope and it was good. 2) Enable the Colorbar test output of the NVP6021 and it display has no probelem. 3) Turn off the Colorbar test output of the NVP6021 and enable the TDA2VM Colorbar. dss_dctrl.h: Note: The screen identification signal was 1080p 25 for test item 2 and NTSC for test item 3. Could you help check is there any problem with the modification of the code above? And how to troubleshoot the issue next? Thanks. Best Regards, Cherry + +Responses: +Hi Cherry, Above changes look to be fine. Can you please keep VideoIfWidth to be 24B, ie "obj->videoIfWidth = APP_DCTRL_VIFW_24BIT;" ? Also if the colorbar output is correct, can you please not connect any of the video pipeline and see if you are able to get correct background color from the overlay manager? You can try changing background color in overlay manager .. Regards, Brijesh + +Hi Brijesh, Thank you for the support. 1) It's found that the code set the timing in csl_dssVideoPort.c 的CSL_dssVpSetLcdBlankTiming function. dvoFormat = BT1120 so enter 438 line else At the same time, scamFormat = FVID2_SF_PROGRESSIVE, hBackPorch hFrontPorch do not set the correspond register, only hSyncVal is being used when checking the code. So they modified prm.timings.hSyncLen = 720U; in app_init.c: appInit() (Sum of row blanking) Why is there no register setting for the blankCfg->vSyncLen field sync in the function? Test the TDA2 colorbar again, as shown below: The color is good, but there is a misalignment. 2) Using APP_DCTRL_VIFW_24BIT to test TDA2 colorbar is as same as the above figure. Thanks and regards, Cherry + +Hi Cherry, For the embedded sync, ie BT1120 output format, there is no front porch or back porch. It just contains distance from EAV to SAV code and this can be specificied using hsyncLen and vsyncLen. Regarding VBP and VFP, they are just vertical blanking in BT mode. Please refer to below register description for more details. Regards, Brijesh + +Hi Brijesh, As per the NVP6021 manual, app_init.c: appInit() modified timing as follows: And review the NVP6021 VOUT output signal through oscilloscope: 1) Enable the colorbar of NVP6021. 2) Turn off the colorbar test output of NVP6021 and enable the colorbar of TDA2VM. As you can see the cycles are the same, but the contents are different. So they suspected the output data from BT1120 is wrong and synchronization is good. Thanks and regards, Cherry + +Hi Cherry, Are you sure that the BT1120 output is connected over vout0? Because, if i remember, it is not possible to get BT110 output on vout1. So can you please check and confirm? Regards, Brijesh + +I am sure it is VOUT0 output. Here is a screenshot of part of our schematic diagram + +There were a number of typos of TDA2VM in the previous description, but to correct this, TDA4VM is used. + +” it requires two pixel clock cycles to send out one pixel.“ Could this be the problem? I'm looking at the TDA4VM datasheet and the code + +Hi Gang Yao, When you say you are enabling color bar, can you please tell us where/how you are enabling color bard? Are you enabling it in the overlay managar? Which Video port are you using to connect to vout0? Can you please share the registers of this video port and register of overlay manager? Regards, Brijesh + +gang yao said: ” it requires two pixel clock cycles to send out one pixel.“ Could this be the problem? I'm looking at the TDA4VM datasheet and the code This should not be an issue for BT1120 format, as this requires just one clock cycle to output a pixel. To confirm, can you please share VP and overlay manager's register dump? Regards, Brijesh + +enable color bar vision_apps/utils/dss/src/app_dss_defaults.c : +appDctrlDefaultInit() +{ + overlayParams.overlayId = obj->overlayId; //APP_DSS_OVERLAY_ID_2 + overlayParams.colorKeyEnable = 1; + overlayParams.colorKeySel = APP_DCTRL_OVERLAY_TRANS_COLOR_SRC; + overlayParams.transColorKeyMin = 0x0u; + overlayParams.transColorKeyMax = 0x0u; + overlayParams.backGroundColor = 0x0u; + + retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_OVERLAY_PARAMS, &overlayParams, sizeof(overlayParams), 0U); +} + +vision_apps/utils/dss/src/app_dctrl.c : +appDctrlControl() +{ + case APP_DCTRL_CMD_SET_OVERLAY_PARAMS: + retVal = appDctrlSetOverlayParamsCmd(gAppDctrlHandle, + (const app_dctrl_overlay_params_t*) params, + size); +} + +appDctrlSetOverlayParamsCmd() +{ + Dss_dctrlOverlayParamsInit(&drvOverlayParams); + drvOverlayParams.overlayId = overlayParams->overlayId; + drvOverlayParams.overlayCfg.colorKeyEnable = overlayParams->colorKeyEnable; + drvOverlayParams.overlayCfg.colorKeySel = overlayParams->colorKeySel; + drvOverlayParams.overlayCfg.transColorKeyMin = overlayParams->transColorKeyMin; + drvOverlayParams.overlayCfg.transColorKeyMax = overlayParams->transColorKeyMax; + drvOverlayParams.overlayCfg.backGroundColor = overlayParams->backGroundColor; + retVal = Fvid2_control(handle, IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS, &drvOverlayParams, NULL); +} + +app_dctrl.h : +Dss_dctrlOverlayParamsInit() +{ + if(NULL != overlayParams) + { + overlayParams->overlayId = CSL_DSS_OVERLAY_ID_1; + overlayParams->colorbarEnable = TRUE; //yaogang modify + CSL_dssOverlayCfgInit(&(overlayParams->overlayCfg)); + } +} + +vp2 connect to vout0 vision_apps/utils/dss/src/app_dss_defaults.c : +appDssDefaultInit() +{ + else if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) + { + appLogPrintf("DSS: Display type is HDMI !!!\n"); + obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2; + obj->nodeVpId = APP_DCTRL_NODE_VP2; + obj->nodeDpiId = APP_DCTRL_NODE_DPI_DPI0; + obj->overlayId = APP_DSS_OVERLAY_ID_2; + obj->vpId = APP_DSS_VP_ID_2; + //yaogang modify + //obj->videoIfWidth = APP_DCTRL_VIFW_24BIT; + obj->videoIfWidth = APP_DCTRL_VIFW_16BIT; + } + + if(prm->enableM2m == TRUE) + { + appLogPrintf("DSS: M2M Path is enabled !!!\n"); + obj->m2m.enableM2m = true; + obj->m2m.nodeOverlayId = APP_DCTRL_NODE_OVERLAY4; + obj->m2m.overlayId = APP_DSS_OVERLAY_ID_4; + obj->m2m.pipeId = APP_DCTRL_NODE_VIDL2; + obj->m2m.vpId = APP_DSS_VP_ID_4; + obj->m2m.nodeVpId = APP_DCTRL_NODE_VP4; + } + ...... + appDctrlDefaultInit(obj); +} + +appDctrlDefaultInit() +{ + pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID1; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; //APP_DCTRL_NODE_OVERLAY2 + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID2; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VIDL1; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeOverlayId; + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeOverlayId; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeVpId; //APP_DCTRL_NODE_VP2 + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeVpId; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->nodeDpiId; //APP_DCTRL_NODE_DPI_DPI0 + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + if (true == obj->m2m.enableM2m) + { + pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->m2m.pipeId; //APP_DCTRL_NODE_VIDL2 + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->m2m.nodeOverlayId; //APP_DCTRL_NODE_OVERLAY4 + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + + pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->m2m.nodeOverlayId; + pathInfo.edgeInfo[pathInfo.numEdges].endNode = obj->m2m.nodeVpId; //APP_DCTRL_NODE_VP4 + printf("edge[%d]: %d --> %d\n", pathInfo.numEdges, + pathInfo.edgeInfo[pathInfo.numEdges].startNode, pathInfo.edgeInfo[pathInfo.numEdges].endNode); + pathInfo.numEdges++; + } +} + +DSS0_OVR2 Registers reg_addr reg_val +0x4a90000 0x00000C00 +0x4a90004 0x00000000 +0x4a90008 0x00000000 +0x4a9000c 0x00000000 +0x4a90010 0x0F00F00F +0x4a90014 0x00000000 +0x4a90018 0x00000000 +0x4a9001c 0x00000000 +0x4a90020 0x00000001 +0x4a90024 0x00000005 +0x4a90028 0x00000000 +0x4a9002c 0x00000000 +0x4a90030 0x00000003 +0x4a90034 0x00000000 +0x4a90038 0x00000000 +0x4a9003c 0x00000000 +0x4a90040 0x00000000 +0x4a90044 0x00000000 +0x4a90048 0x00000000 + +DSS0_VP2 Registers reg_addr reg_val +0x4aa0000 0x03200000 +0x4aa0004 0x00000141 +0x4aa0008 0x00810042 +0x4aa000c 0x07DA0019 +0x4aa0010 0x007007B6 +0x4aa0014 0x00000000 +0x4aa0018 0x00000000 +0x4aa001c 0x00000000 +0x4aa0020 0x00000000 +0x4aa0024 0x00000000 +0x4aa0028 0x00000000 +0x4aa002c 0x00000000 +0x4aa0030 0x00000000 +0x4aa0034 0x00000000 +0x4aa0038 0x00000000 +0x4aa003c 0x00000000 +0x4aa0040 0x00000000 +0x4aa0044 0x00000433 +0x4aa0048 0x00000000 +0x4aa004c 0x00000000 +0x4aa0050 0x0437077F +0x4aa0054 0x000000D1 +0x4aa0058 0x02900402 +0x4aa005c 0x07A20070 +0x4aa0060 0x000007EE +0x4aa0064 0x00000000 +0x4aa0068 0x00000000 +0x4aa006c 0x40004000 +0x4aa0070 0x00000000 +0x4aa0074 0x00000000 +0x4aa0078 0x00000000 +0x4aa007c 0x00000000 +0x4aa0080 0x00000000 +0x4aa0084 0x00000000 +0x4aa0088 0x00000000 +0x4aa008c 0x00000000 +0x4aa0090 0x00000000 +0x4aa0094 0x00000000 +0x4aa0098 0x00000000 +0x4aa009c 0x00000000 +0x4aa00a0 0x00000000 +0x4aa00a4 0x00000000 +0x4aa00a8 0x00000000 +0x4aa00ac 0x00000000 +0x4aa00b0 0x00000000 +0x4aa00b4 0x00000000 +0x4aa00b8 0x00000000 +0x4aa00bc 0x00000000 +0x4aa00c0 0x00000000 +0x4aa00c4 0x00000000 +0x4aa00c8 0x00000000 +0x4aa00cc 0x00000000 +0x4aa00d0 0x00000000 +0x4aa00d4 0x00000000 +0x4aa00d8 0x00000000 +0x4aa00dc 0x00000000 +0x4aa00e0 0x00000000 +0x4aa00e4 0x00000000 +0x4aa00e8 0x00000000 +0x4aa00ec 0x00000000 +0x4aa00f0 0x00000000 +0x4aa00f4 0x00000000 +0x4aa00f8 0x00000000 +0x4aa00fc 0x00000000 +0x4aa0100 0x00000000 +0x4aa0104 0x00000000 +0x4aa0108 0x00000000 +0x4aa010c 0x00000000 +0x4aa0110 0x00000000 +0x4aa0114 0x00000000 +0x4aa0118 0x00000000 +0x4aa011c 0x00000000 +0x4aa0120 0x00000000 +0x4aa0124 0x00000000 +0x4aa0128 0x00000000 +0x4aa012c 0x00000000 +0x4aa0130 0x00000000 +0x4aa0134 0x00000000 +0x4aa0138 0x00000000 +0x4aa013c 0x00000000 +0x4aa0140 0x00000000 +0x4aa0144 0x00000000 +0x4aa0148 0x00000000 +0x4aa014c 0x00000000 +0x4aa0150 0x00000000 +0x4aa0154 0x00000000 +0x4aa0158 0x00000000 +0x4aa015c 0x00000000 +0x4aa0160 0x00000000 +0x4aa0164 0x00000000 +0x4aa0168 0x00000000 +0x4aa016c 0x00000000 +0x4aa0170 0x00000000 +0x4aa0174 0x00000000 +0x4aa0178 0x00000000 + +Hi Brijesh, Is there any progress on this issue + +Hi gang yao, There are couple of things in the register dump that i suspect. - I see you have enabled three inputs in the overlay manager registers, VID1, VID2 and VIDL1 and there is not color bar output enable in the overlay manager. Can you please disable these inputs and enable just color bar from overlay manager? - In DATALINES field of VP_CONTROL register, it is set to 0x1, which means 16bit output, can we please try changing it to 0x5, ie full 36 bit output from overlay manager? - In addition, horizontal blanking is set to 722 clock pulses. can you please review and see if it is ok? Typically for YUV422, it should be multiple of 4.. Can you please set it to multiple of 4 value? Regards, Brijesh + diff --git a/data2/text/range/15001-20000/495043.txt b/data2/text/range/15001-20000/495043.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c76e6f056348e2ef3c7bf36b89b21277882fb4e --- /dev/null +++ b/data2/text/range/15001-20000/495043.txt @@ -0,0 +1,88 @@ +Ticket Name: Gstreamer not working in GLSDK 7.03 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, Can anybody please guide me in making gstreamer work on GLSDK 7.03? I am new to this and I feel some difficulties. I use this command "gst-launch-1.0 filesrc location=sample.mpg ! mpegtsdemux name=dmux dmux. ! queue ! h264parse ! ducatih264dec ! kmssink connector=12 dmux. ! queue ! faad ! alsasink" where sample.mpg is the input file. But I get this error "WARNING: erroneous pipeline: no element "mpegtsdemux" ". 1. How should I check if any sample video is working fine with my J6 EVM Board (GLSDK 7.03)? Kindly help me out in this issue. 2. Please let me know, what kind of Video formats are supported in GLSDK v7.03. 3. Supported Playback Application in GLSDK Data Sheet mentions that the Gstreamer version is 1.2. But I see that "gst" files in the installed files (GLSDK 7.03) are with version name (v1.0). Please clarify the version of the GStreamer for GLSDK 7.03. Does it require any downloading of Libraries ?? Thanks in Advance, Shylesh S. + +Responses: +Hi Shylesh, Can you try with playbin first? gst-launch-1.0 playbin uri=file:///usr/share/sample.mpg video-sink=kmssink With explicit pipeline, try with qtdemux instead of mpeggstdemux + +Hello Ramprasad, Thanks a lot for your reply. When I tried with the playbin, with the following command, "gst-launch-1.0 playbin uri=file:///usr/share/sample.mpg video-sink=kmssink" I get only the Audio working. But my video isn't playing. I get this message in my terminal: Setting pipeline to PAUSED ... +Pipeline is PREROLLING ... +[ 328.344357] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +Pipeline is PREROLLED ... +Setting pipeline to PLAYING ... +New clock: GstAudioSinkClock When I tried with the explicit pipeline, using the following command "gst-launch-1.0 location=sample.mpg typefind=true ! qtdemux name=demux demux.video_00 ! queue ! mpegvideoparse ! decodebin ! kmssink demux.audio_00 ! queue ! faad ! alsasink" I get the following error. ERROR: pipeline could not be constructed: Unrecoverable syntax error while parsing pipeline location=/opt/work/sample.mpg And also, please let me know whether I have to download any library files and cross compile them, so that my Application code works. Thanks in advance, Shylesh S + +Hello, You could check this user guide: processors.wiki.ti.com/.../DRA7xx_GLSDK_Software_Developers_Guide Could you attach the full log by adding --gst-debug=3. Could you try in location=sample.mpg property to add the full path to the file? Could you try to play the video file without the audio part? Let us know the result. BR Margarita + +Hello Margarita, Thanks for the support. I am new to GStreamer. So, Please guide me over this issue. Could you please tell me any video file source which will work with GLSDK 7.03 (GStreamer v1.2). Because, I keep testing with my same sample.mpg file. I have added the responses of the questions you asked in your last reply. 1. When I add “--gst-debug=3”, I get the below ERROR. 0:00:00.044078274 1760 0xb3380 WARN default ./grammar.y:902:priv_gst_parse_yyerror: Error during parsing: syntax error, unexpected ASSIGNMENT, expecting LINK 0:00:00.044245170 1760 0xb3380 ERROR GST_PIPELINE ./grammar.y:942:priv_gst_parse_launch: Unrecoverable syntax error while parsing pipeline location=sample.mpg typefind=true ! qtdemux name=demux demux.video_00 ! queue ! mpegvid +ERROR: pipeline could not be constructed: Unrecoverable syntax error while parsing pipeline location=sample.mpg typefind=true ! qtdemux name=demux demux.video_00 ! queue ! mpegvideoparse ! decodebin ! kmssink demux.audio_00 ! queue ! Faad !. + 2. I went throught the USER's GUIDE for DRA7xx. And I ran these commands. +i. gst-launch-1.0 playbin uri=file:///opt/work/sample.mpg video-sink=kmssink audio-sink=alsasink +For which, I get these following prints with AUDIO ONLY Playing. + Setting pipeline to PAUSED ... + Pipeline is PREROLLING ... + [ 1884.013897] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 + Pipeline is PREROLLED ... + Setting pipeline to PLAYING ... + New clock: GstAudioSinkClock + +ii. gst-launch-1.0 playbin uri=file:///opt/work/sample.mpg video-sink=waylandsink audio-sink=alsasink" For which, I get the following print with no response. + Setting pipeline to PAUSED ... + ERROR: Pipeline doesn't want to pause. + ERROR: from element /GstWaylandSink:waylandsink0: Could not initialise Wayland output + Additional debug info:gstwaylandsink.c(973): gst_wayland_sink_start (): / GstWaylandSink:waylandsink0: + Could not create Wayland display + Setting pipeline to NULL ... + Freeing pipeline ... +3. When I try playing the video file without the Audio part with the following command, Even then I get the Audio only working. +“ gst-launch-1.0 playbin uri=file:///opt/work/sample.mpg video-sink=waylandsink” +4. When I tried to use the Location property with the following command, +“gst-launch-1.0 location=/opt/work/sample.mpg video-sink=kmssink audio-sink=alsasink” +I get an error with the following print, +ERROR: pipeline could not be constructed: Unrecoverable syntax error while parsing pipeline location=/opt/work/sample.mpg video-sink=kmssink audio-sink=alsasink . Kindly help me, Thanks and Regards, Shylesh S + +Hello, Could you try this pipeline: gst-launch-1.0 -v videotestsrc ! 'video/x-raw, format=(string)YUY2, width= (int)1280, height=(int)720' ! vpe ! 'video/x-raw, format=(string)NV12, width=(int)720, height=(int)480' ! kmssink Let me know the result. BR Margarita + +Hi Margarita, Result: WARNING: erroneous pipeline: could not parse caps "video/x-raw,\ format=(string)YUY2,\ width=\ (int)1280,\ height=(int)720" Regards, Shylesh S + +Hello, You could remove ! 'video/x-raw, format=(string)YUY2, width= (int)1280, height=(int)720' ! vpe and give a try. Please attach the full log from gst-debug = 3 not only the error. BR Margarita + +Hi Margarita, I tried it. The output was, Setting pipeline to PAUSED ... Pipeline is PREROLLING ... 0:00:00.054441768 1735 0xbcd20 FIXME default gstutils.c:3648:gst_pad_create_stream_id_printf_valist: Creating random stream-id, consider implementing a deterministic way of creating a stream-id /GstPipeline:pipeline0/GstVideoTestSrc:videotestsrc0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)720, height=(int)480, framerate=(fraction)30/1, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)720, height=(int)480, framerate=(fraction)30/1, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive /GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)720, height=(int)480, framerate=(fraction)30/1, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive /GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)720, height=(int)480, framerate=(fraction)30/1, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive 0:00:00.056423861 1735 0xbcd20 WARN default gstvideopool.c:171:video_buffer_pool_set_config: no caps in config Pipeline is PREROLLED ... Setting pipeline to PLAYING ... New clock: GstSystemClock ** (gst-launch-1.0:1735): CRITICAL **: gst_video_calculate_display_ratio: assertion 'num > 0' failed 0:00:00.067030704 1735 0xbcd20 WARN kmssink gstkmssink.c:90:gst_kms_sink_calculate_aspect_ratio: error: Error calculating the output display ratio of the video. ERROR: from element /GstPipeline:pipeline0/GstKMSSink:kmssink0: GStreamer error: negotiation problem. Additional debug info: gstkmssink.c(90): gst_kms_sink_calculate_aspect_ratio (): /GstPipeline:pipeline0/GstKMSSink:kmssink0: Error calculating the output display ratio of the video. Execution ended after 0:00:00.001001050 Setting pipeline to PAUSED ... 0:00:00.153609224 1735 0xbcd20 WARN kmssink gstkmssink.c:311:gst_kms_sink_show_frame: error: drmModeSetPlane failed: No space left on device (28) Setting pipeline to READY ... 0:00:00.154501288 1735 0xbcd20 WARN basesrc gstbasesrc.c:2865:gst_base_src_loop: error: Internal data flow error. 0:00:00.154554642 1735 0xbcd20 WARN basesrc gstbasesrc.c:2865:gst_base_src_loop: error: streaming task paused, reason error (-5) Setting pipeline to NULL ... Freeing pipeline ... Regards, Shylesh S. + +Hello, Could you try : gst-launch videotestsrc ! 'video/x-raw-yuv,width=1280,height=720' ! kmssink The difference with the previous pipeline is in the caps video/x-raw-yuv . Please change the resolution according you display. Are you trying to play it on HDMI? BR Margarita + +Hi Margarita, You've mentioned "yuv" but the old pipeline had "YUY2"? Which one to use? And, yes I use HDMI to play this. The same HDMI display works in GLSDK 6.04 booted SD Card. The working of it is already checked. But I find no video being played with this GLSDK 7.03 (GStreamer v1.2). Response of this pipeline is, (gst-launch-1.0:1748): GStreamer-WARNING **: 0.10-style raw video caps are being created. Should be video/x-raw,format=(string).. now. 0:00:00.052456421 1748 0xc7160 ERROR GST_PIPELINE ./grammar.y:624:gst_parse_perform_link: could not link videotestsrc0 to kmssink0 WARNING: erroneous pipeline: could not link videotestsrc0 to kmssink0 Thanks and Regards, Shylesh S + +Hello, You could check these links: e2e.ti.com/.../1795564 e2e.ti.com/.../1535855 Hope this helps. BR Margarita + +Hi Margarita, I did go through the threads that you sent. Today I did search for video sinks through gst-inspect-1.0 | grep "video sink". I happened to see one (fbdevsink). Then, I tried this pipeline. And saw that Audio worked perfectly. Video also played. But, with lots of glitches and very slow. gst-launch-1.0 playbin uri=file:///opt/work/sample.mpg video-sink= fbdevsink audio-sink=alsasink I do not know the reason why this Glitches occur. Kindly help me. I then tried to use this sink with the following pipeline. gst-launch-1.0 filesrc location=sample.mpg ! mpegpsdemux name=dmux dmux. ! queue ! mpeg4videoparse ! ducatimpeg4dec ! fbdevsink dmux. ! queue ! faad ! alsasink But, I get errors saying that the decoder, parser, and sink in various combinations don't link eachother. Please guide me through this. Thanks a lot, Shylesh S. + +Hi Margarita, I did go through the threads that you sent. Today I did search for video sinks through gst-inspect-1.0 | grep "video sink". I happened to see one (fbdevsink). Then, I tried this pipeline. And saw that Audio worked perfectly. Video also played. But, with lots of glitches and very slow. gst-launch-1.0 playbin uri=file:///opt/work/sample.mpg video-sink= fbdevsink audio-sink=alsasink I do not know the reason why this Glitches occur. Kindly help me. I then tried to use this sink with the following pipeline. gst-launch-1.0 filesrc location=sample.mpg ! mpegpsdemux name=dmux dmux. ! queue ! mpeg4videoparse ! ducatimpeg4dec ! fbdevsink dmux. ! queue ! faad ! alsasink But, I get errors saying that the decoder, parser, and sink in various combinations don't link each other. Please guide me through this. Thanks a lot, Shylesh S. + +I get continuous prints like this when I use that pipeline. Kindly help! WARNING: from element /GstPlayBin:playbin0/GstPlaySink:playsink/GstBin:vbin/GstFBDEVSink:fbdevsink0: A lot of buffers are being drop. Additional debug info: gstbasesink.c(2791): gst_base_sink_is_too_late (): /GstPlayBin:playbin0/GstPlaySink:playsink/GstBin:vbin/GstFBDEVSink:fbdevsink0: There may be a timestamping problem, or this computer is too slow. Thanks & Regards, Shylesh S + +Hello, fbdevsink is using framebuffer (linux framebuffer). Could you grep for 'sink' or try to connect autovideosink in the pipeline? Autovideosink is a video sink that automatically detects an appropriate video sink to use. BR Margarita + +Hello Margarita, These are the video sinks that are available. fbdevsink, waylandsink, autovideosink, kmssink, intervideosink, v4l2sink, autovideosink. I actually tried all of them. Even, autovideosink doesn't work out. I just see my pipeline getting struck with the PREROLLING State. It's not getting Prerolled. Kindly help me out. Regards, Shylesh. + +Hello, Could you try to run Viddec3test demo. The demo currently runs on the kms display. Here you could check for more information: processors.wiki.ti.com/.../DRA7xx_GLSDK_Software_Developers_Guide If this demo is working could you try with kmssink but add property kmssink connector=xx. BR Margarita + +Hi Margarita, I had already checked the viddec3test demo. It didn't workout. "viddec3test -s 4:1360*768 sample.mpg --fps 30" These were the log when I run the about line: root@dra7xx-evm:/opt/work# viddec3test -s 4:1360*768 sample.mpg --fps 30 0x1c070: Opening Display.. Forcing playback rate at 30 fps. using 1 connectors, 1280x800 display, multiplanar: 1 0x1c070: Opening Demuxer.. [mpegts @ 0x1d6e0] max_analyze_duration reached [mpegts @ 0x1d6e0] PES packet size mismatch Input #0, mpegts, from 'sample.mpg': Duration: 00:00:48.95, start: 5024.899489, bitrate: 1048 kb/s Program 1 Stream #0.0[0x44]: Audio: aac, 44100 Hz, stereo, s16, 136 kb/s Stream #0.1[0x45]: Video: h264 (High), yuv420p, 1920x1080 [PAR 1:1 DAR 16:9], 24 fps, 24 tbr, 90k tbn, 48 tbc 0x1c070: infile=sample.mpg, width=1920, height=1080 0x1c070: padded_width=2048, padded_height=1184, num_buffers=7 [ 76.212476] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 Setting mode 1360*768 on connector 4, crtc 10 0x1c070: Opening Engine.. displayBufsMode: 1 ^C[ 91.858507] virtio_rpmsg_bus virtio1: msg received with no recipient But, the same pipeline works out when I run it in GLSDK 6.04. Note: When the board boots up, I see 2 colored Penguins on top for GLSDK 6.04. But the same is not visible for the GLSDK 7.03. Does this make any sense? Or gives any inference? Please let me know. Thanks! Shylesh S. + +Hello, What about viddec3test -s 12:1360*768 sample.mpg --fps 30 is it working? Are you using the default GLSDK or you made some changes? Are you using EVM or it is custom board? Did you try these pipelines: gst-launch -v filesrc location=input.mpg ! mpegtsdemux ! queue ! h264parse ! ducatih264dec ! kmssink connector=12 filesrc location=input.mpg ! mpegtsdemux name=dmux dmux. ! queue ! h264parse ! ducatih264dec ! kmssink connector=12 dmux. ! queue ! faad ! alsasink BR Margarita + +Hello Margarita, None of these pipelines are working. When I use 4 instead of 12 in "viddec3test -s 12:1360*768 sample.mpg --fps 30", I get no errors. But my video is not getting played. Yes, I do use the default GLSDK only, and I didn't make any changes. I use EVM board only. mpegtsdemux plugin is not available in GLSDK 7.03. Only mpegpsdemux, tsdemux are available. But, the video is not working in any of the pipelines. BR Shylesh S + +Hello, Could you try with elementary stream, h264 for example(not in container like ts)? In this case you will not need a demuxer. BR Margarita + +You want me to change my source file to a .h264 format? Can I convert my video (.mpg) to .h264 online and use it? BR Shylesh S + +Hello, You could try h264 elementary streamer or mpeg too. You could use ffmpeg on PC like : ffmpeg -i input.h264 -vcodec copy out.mp4 This example h264->mp4 BR Margarita + +Hello, I have tried with h264 file also, by using " ffmpeg -i input.h264 -vcodec copy out.mp4" The output file is recognized as h264 video file. But it doesn't play. But, it just remains Idle, with these log. root@dra7xx-evm:/opt/work# viddec3test -s 4:1360*768 out.mp4 --fps 30 0x1c070: Opening Display.. Forcing playback rate at 30 fps. using 1 connectors, 1280x800 display, multiplanar: 1 0x1c070: Opening Demuxer.. Input #0, mov,mp4,m4a,3gp,3g2,mj2, from 'out.mp4': Metadata: major_brand : isom minor_version : 512 compatible_brands: isomiso2avc1mp41 encoder : Lavf53.21.1 Duration: 00:00:48.95, start: 0.000000, bitrate: 1010 kb/s Stream #0.0(und): Video: h264 (High), yuv420p, 1920x1080 [PAR 1:1 DAR 16:9], 804 kb/s, 24 fps, 24 tbr, 24 tbn, 48 tbc Stream #0.1(und): Audio: aac, 44100 Hz, stereo, s16, 199 kb/s initializing bitstream filter 0x1c070: infile=out.mp4, width=1920, height=1080 0x1c070: padded_width=2048, padded_height=1184, num_buffers=7 Setting mode 1360*768 on connector 4, crtc 10 0x1c070: Opening Engine.. displayBufsMode: 1 ^C[ 1082.408592] virtio_rpmsg_bus virtio1: msg received with no recipient In this pipeline, the Display itself get theaudio output. But the video doesn't play. The Audio plays through the display speakers. gst-launch-1.0 playbin uri=file:///opt/work/out.mp4 video-sink=kmssink audio-sink="alsasink device=hw:1,0" kindly help me, Shylesh S. + +I experienced that same problems with GLSDK 7 on a TDA2 board. The solution was to specify the connector ID of the active video port as an attribute to the kmssink filter, as follows: > gst-launch-1.0 -v filesrc location=$HOME/tftp/atest2.mp4 ! qtdemux ! h264parse ! ducatih264dec ! vpe ! kmssink connector=16 I could not find any mention of needing to specify the connector in the examples provided in the TI documentation. It would be very helpful if the docs were update to include it. HTH, Eric G + +Hi Eric, Thank you very much for your help. My video is perfectly working now. I had misinterpreted about the connector ID. I had previously checked the Connector ID, but I didn't use 16. Anyways, It's fine now!! Thanks a lot. And, Margarita... You've been helping me since last month. Thanks a lot. Thanks a lot. Best Regards, Shylesh S + diff --git a/data2/text/range/15001-20000/679876.txt b/data2/text/range/15001-20000/679876.txt new file mode 100644 index 0000000000000000000000000000000000000000..6e7653d2dd76884a042f242ebd79e485858252f5 --- /dev/null +++ b/data2/text/range/15001-20000/679876.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TDA2: DATA dma TO L2 fun time not change + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Input input and output output data on DDR, I copy the data through EDMA to L2 l2input, L2output, and run the function fun (l2input, L2output), but find that the time is not changed, and the data is similar to DDR on the fun. I don't know what can cause this problem ，follow is the CMD ,i use JTAG run the program /* Linker for DSP1 instance, not DSP2 */ -stack 0x3000 -heap 0x7000000 MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 L1D_SRAM : origin = 0x00F00000, len = 0x4000 /* 16 KB SRAM */ L1D_CACHE : origin = 0x00F04000, len = 0x4000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x28000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ L2_CACHE : origin = 0x00828000, len = 0x20000 /* Cache for L2, which is configured as 128 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x08000000 /* DSP Used cachable area */ } SECTIONS { vectors :> EXT_MEM_CACHE .cinit :> EXT_MEM_CACHE .cio :> EXT_MEM_CACHE .bss :> EXT_MEM_CACHE .text :> EXT_MEM_CACHE .const :> EXT_MEM_CACHE .far :> EXT_MEM_CACHE .fardata :> EXT_MEM_CACHE .neardata :> EXT_MEM_CACHE .rodata :> EXT_MEM_CACHE .sysmem :> EXT_MEM_CACHE .switch :> EXT_MEM_CACHE .L2SramSect :> L2_SRAM .stack :> L2_SRAM } + +Responses: +the fun is 12ms， i think it should be 1ms only，so i dont know whats wrong + +Hi Shuai, Can you please give some more information as to how much data you are copying from L2 RAM to L2 RAM? I am guessing the l2input, L2output is part of .L2SramSect. Thanks and Regards, Piyali + +Hi Piyali i made a project in ccs ,in the main i read a inputimage and call my funs, here is my cmd (i use just one C66 of TDA2X , L2 configure L2_SRAM no L2_CACHE ,i copy data to L2 by EDMA . L1 configure L1D_CACHE) -stack 0x3000 -heap 0x7000000 MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 // L1D_SRAM : origin = 0x00F00000, len = 0x4000 /* 16 KB SRAM */ // L1D_CACHE : origin = 0x00F00000, len = 0x8000 /* 16 KB cache */ L1D_CACHE : origin = 0x00F04000, len = 0x4000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x48000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ // L2_CACHE : origin = 0x00828000, len = 0x20000 /* Cache for L2, which is configured as 128 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x08000000 /* DSP Used cachable area */ } SECTIONS { vectors :> EXT_MEM_CACHE .cinit :> EXT_MEM_CACHE .cio :> EXT_MEM_CACHE .bss :> EXT_MEM_CACHE ////usually reserves space for uninitialized variables .text :> EXT_MEM_CACHE //////contains executable code .const :> EXT_MEM_CACHE .far :> EXT_MEM_CACHE .fardata :> EXT_MEM_CACHE /////usually contains initialized data .neardata :> EXT_MEM_CACHE ///////usually contains initialized data .rodata :> EXT_MEM_CACHE .sysmem :> EXT_MEM_CACHE .switch :> EXT_MEM_CACHE .L2SramSect :> L2_SRAM .stack :> L2_SRAM } #ifdef TI_DSP #define L2SRAM_SIZE (32*1024) #pragma DATA_SECTION (L2SRAM,".L2SramSect"); unsigned char L2SRAM[L2SRAM_SIZE]; #define L2TMP_SIZE (128*1024) #pragma DATA_SECTION (L2SRAM,".L2SramSect"); unsigned char L2TMP[L2TMP_SIZE]; #endif in the main i malloc DDR space unsigned char *DDR_Init = (unsigned char *)malloc(DDR_SIZE); load my net to DDR_Init , the net is big const float model_detection_global[] = { 0.0640991,-0.219671,0.00918405,0.164087,-0.00767695,0.142808,0.162083,0.145399,0.00453223,-1.25773, -0.0320548,0.161154,0.361267,1.714,0.197743,0.0784551,-0.0696055,-1.14334,-0.0957228,0.72948, -0.54699,0.508312,0.649834,-1.14706,0.405195,0.0574608,-0.567157,0.00642587,-0.0300398,-0.0680399, 0.0273895,-0.0263173,0.0327542,0.0387226,-0.00789206,-0.448488,-0.15092,0.0934956,1.32409,-0.244303, -1.82788,-0.4503,1.11225,0.178051,-0.0456231,0.0360474,-0.365231,-0.383318,0.00687606,0.00101387, -0.00782929,-0.00366878,0.00721993,-0.0535142,0.194668,0.524056,0.482211,-0.148617,0.136613,0.248017, -0.0469616,-0.86986,-0.494906,-0.0215785,0.0179301,-0.0402353,-0.157173,-0.284838,-0.247974,0.00699071, 0.048664,0.0686588,-0.403694,-0.0938685,0.0354045,0.42147,0.0852851,0.648701,0.03408,0.529695, 0.131282,0.284551,0.379638,0.142066,0.309521,0.347878,0.217491,0.219339,9.99999,0.465153, 0.334311,0.420712,0.74588,0.44612,1.1629,0.321116,0.423224,-0.422717,-0.0121956,0.0108994, -0.839461,0.0118817,-1.85014,0.187245,-0.0707816,0.474495,-0.945377,-0.809488,0.0574341,-1.04387, 0.114112,-0.110706,0.68189,-0.153875,-0.155772,-0.107221,-0.137917,-0.118754,-0.0194638,0.0568384, -0.0432765,0.0663145,0.09544 and so on } then call my funcs i Compile my project with CCS .out is 1.6MB here is the map TMS320C6x Linker PC v8.2.2 ****************************************************************************** >> Linked Fri Apr 13 16:57:12 2018 OUTPUT FILE NAME: ENTRY POINT SYMBOL: "_c_int00" address: 87156c60 MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- L2_SRAM 00800000 00048000 0000b000 0003d000 RWIX L1P_SRAM 00e00000 00008000 00000000 00008000 RWIX L1D_CACHE 00f04000 00004000 00000000 00004000 RWIX DSP2_L2_SRAM 40800000 00048000 00000000 00048000 RWIX SL2_SRAM 5b000000 00040000 00000000 00040000 RWIX EXT_MEM_CACHE 80000000 08000000 071599d0 00ea6630 RWIX SEGMENT ALLOCATION MAP run origin load origin length init length attrs members ---------- ----------- ---------- ----------- ----- ------- 00800000 00800000 0000b000 00000000 rw- 00800000 00800000 00008000 00000000 rw- .L2SramSect 00808000 00808000 00003000 00000000 rw- .stack 80000000 80000000 07000000 00000000 rw- 80000000 80000000 07000000 00000000 rw- .sysmem 87000000 87000000 0012577c 0012577c r-- 87000000 87000000 0012577c 0012577c r-- .const 8712577c 8712577c 00000004 00000000 rw- 8712577c 8712577c 00000004 00000000 rw- .neardata 87125780 87125780 000202d0 00000000 rw- 87125780 87125780 000202d0 00000000 rw- .far 87145a60 87145a60 00011a00 00011a00 r-x 87145a60 87145a60 00011a00 00011a00 r-x .text 87157460 87157460 00001448 00000000 rw- 87157460 87157460 00001324 00000000 rw- .fardata 87158788 87158788 00000120 00000000 rw- .cio 871588a8 871588a8 00001140 00001140 r-- 871588a8 871588a8 00000084 00000084 r-- .switch 87158930 87158930 000010b8 000010b8 r-- .cinit SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .L2SramSect * 0 00800000 00008000 UNINITIALIZED 00800000 00008000 main.obj (.L2SramSect) .stack 0 00808000 00003000 UNINITIALIZED 00808000 00000008 rts6600_elf.lib : boot.obj (.stack) 00808008 00002ff8 --HOLE-- .const 0 87000000 0012577c 87000000 00124854 main.obj (.const:model_detection_global) 87124854 00000004 dma_funcs.obj (.const) 87124858 000007d0 main.obj (.const:$P$T0$1) 87125028 00000408 main.obj (.const:proto_detection_global) 87125430 0000013c afq_caffe_cnn.obj (.const:.string) 8712556c 00000004 --HOLE-- [fill = 0] 87125570 00000101 rts6600_elf.lib : ctype.obj (.const:.string:_ctypes_) 87125671 00000003 --HOLE-- [fill = 0] 87125674 00000044 afq_caffe_cnn.obj (.const) 871256b8 00000034 main.obj (.const:.string) 871256ec 00000024 rts6600_elf.lib : _printfi.obj (.const:.string) 87125710 00000024 edma_utils_autoincrement_v2.obj (.const) 87125734 0000001c edma_utils_autoincrement.obj (.const) 87125750 0000001c main.obj (.const) 8712576c 0000000c edma_utils.obj (.const) 87125778 00000004 edma_utils.obj (.const:edmaBase) .neardata * 0 8712577c 00000004 UNINITIALIZED 8712577c 00000004 dma_resource_allocator.obj (.neardata) .far 0 87125780 000202d0 UNINITIALIZED 87125780 00020000 (.common:L2TMP) 87145780 00000140 (.common:__TI_tmpnams) 871458c0 000000c8 dma_resource_allocator.obj (.far:gDmaResourceState) 87145988 000000c0 (.common:gDmaUtilsStateStruct) 87145a48 00000008 (.common:parmbuf) .cio 0 87158788 00000120 UNINITIALIZED 87158788 00000120 rts6600_elf.lib : trgmsg.obj (.cio) .cinit 0 87158930 000010b8 87158930 00001068 (.cinit..fardata.load) [load image, compression = rle] 87159998 0000000d (.cinit..far.load) [load image, compression = rle] 871599a5 0000000b (.cinit..L2SramSect.load) [load image, compression = rle] 871599b0 00000009 (.cinit..neardata.load) [load image, compression = rle] 871599b9 00000003 --HOLE-- [fill = 0] 871599bc 00000008 (__TI_handler_table) 871599c4 00000004 --HOLE-- [fill = 0] 871599c8 00000020 (__TI_cinit_table) .text 0 87145a60 00011a00 87145a60 00006c00 afq_caffe_cnn.obj (.text) 8714c660 00001c40 rts6600_elf.lib : _printfi.obj (.text:__TI_printfi) 8714e2a0 000016c0 edma_utils_autoincrement.obj (.text) 8714f960 00000ac0 edma_utils_autoincrement_v2.obj (.text) 87150420 00000680 rts6600_elf.lib : _printfi.obj (.text:_pconv_a) 87150aa0 00000600 : divd.obj (.text:__c6xabi_divd) 871510a0 000005c0 : _printfi.obj (.text:_pconv_g) 87151660 00000460 : _printfi.obj (.text:_pconv_e) 87151ac0 00000440 : memory.obj (.text:free) 87151f00 000003e0 dma_resource_allocator.obj (.text) 871522e0 000003e0 rts6600_elf.lib : fputs.obj (.text:fputs) 871526c0 000002e0 dma_funcs.obj (.text) 871529a0 000002e0 rts6600_elf.lib : _printfi.obj (.text:fcvt) 87152c80 00000280 : divf.obj (.text:__c6xabi_divf) 87152f00 00000280 : _printfi.obj (.text:_pconv_f) 87153180 00000240 : imath64.obj (.text:__c6xabi_divull) 871533c0 00000240 : _printfi.obj (.text:_ltostr) 87153600 00000220 : fputc.obj (.text:fputc) 87153820 00000220 main.obj (.text) 87153a40 00000220 rts6600_elf.lib : open.obj (.text:open) 87153c60 00000220 : setvbuf.obj (.text:setvbuf) 87153e80 000001e0 : fopen.obj (.text:_openfile) 87154060 000001c0 : imath40.obj (.text:__c6xabi_divul) 87154220 000001a0 : hostrename.obj (.text:HOSTrename) 871543c0 000001a0 edma_utils_state.obj (.text) 87154560 00000180 rts6600_elf.lib : frexp.obj (.text:frexp) 871546e0 00000180 : memory.obj (.text:malloc) 87154860 00000160 : autoinit.obj (.text:_auto_init_elf) 871549c0 00000160 edma_utils_memcpy.obj (.text) 87154b20 00000160 rts6600_elf.lib : fopen.obj (.text:fopen) 87154c80 00000160 : sqrt.obj (.text:sqrt) 87154de0 00000140 : fclose.obj (.text:__TI_closefile) 87154f20 00000140 : getdevice.obj (.text:getdevice) 87155060 00000140 : ldexp.obj (.text:ldexp) 871551a0 00000120 : fseek.obj (.text:fseek) 871552c0 00000100 : copy_decompress_rle.obj (.text:__TI_decompress_rle_core) 871553c0 00000100 : _io_perm.obj (.text:__TI_wrt_ok) 871554c0 00000100 : atoi.obj (.text:atoi) 871555c0 00000100 : cpy_tbl.obj (.text:copy_in) 871556c0 00000100 : fprintf.obj (.text:fprintf) 871557c0 000000e0 : hostlseek.obj (.text:HOSTlseek) 871558a0 000000e0 : hostopen.obj (.text:HOSTopen) 87155980 000000e0 : hostwrite.obj (.text:HOSTwrite) 87155a60 000000e0 : divi.obj (.text:__divi) 87155b40 000000e0 : close.obj (.text:close) 87155c20 000000e0 : exit.obj (.text:exit) 87155d00 000000e0 : ltoa.obj (.text:ltoa) 87155de0 000000e0 : memset.obj (.text:memset) 87155ec0 000000e0 : printf.obj (.text:printf) 87155fa0 000000c0 : hostread.obj (.text:HOSTread) 87156060 000000c0 : hostunlink.obj (.text:HOSTunlink) 87156120 000000c0 : fflush.obj (.text:__TI_doflush) 871561e0 000000c0 : divu.obj (.text:__divu) 871562a0 000000c0 : remi.obj (.text:__remi) 87156360 000000c0 : _printfi.obj (.text:_ecpy) 87156420 000000c0 : memory.obj (.text:minsert) 871564e0 000000c0 : memory.obj (.text:mremove) 871565a0 000000c0 : tls.obj (.text:tls:init:__TI_tls_init) 87156660 000000a0 : hostclose.obj (.text:HOSTclose) 87156700 000000a0 : fopen.obj (.text:__TI_cleanup) 871567a0 000000a0 : fixfu.obj (.text:__c6xabi_fixfu) 87156840 000000a0 : fltulld.obj (.text:__c6xabi_fltulld) 871568e0 000000a0 : remu.obj (.text:__remu) 87156980 000000a0 : memory.obj (.text:_minit) 87156a20 000000a0 : memcpy64.obj (.text:memcpy) 87156ac0 000000a0 : modf.obj (.text:modf) 87156b60 00000080 : trgmsg.obj (.text:__TI_readmsg) 87156be0 00000080 : llshift.obj (.text:__c6xabi_llshl) 87156c60 00000080 : boot.obj (.text:_c_int00) 87156ce0 00000080 edma_utils.obj (.text) 87156d60 00000080 rts6600_elf.lib : fclose.obj (.text:fclose) 87156de0 00000080 : getdevice.obj (.text:finddevice) 87156e60 00000080 : unlink.obj (.text:unlink) 87156ee0 00000060 : frcmpyd_div.obj (.text:__TI_frcmpyd_div) 87156f40 00000060 : trgmsg.obj (.text:__TI_writemsg) 87156fa0 00000060 : llshift.obj (.text:__c6xabi_llshru) 87157000 00000060 : lseek.obj (.text:lseek) 87157060 00000060 : memccpy.obj (.text:memccpy) 871570c0 00000060 : write.obj (.text:write) 87157120 00000040 : isinf.obj (.text:__c6xabi_isinf) 87157160 00000040 : _printfi.obj (.text:__c6xabi_isnan) 871571a0 00000040 : call_stub.obj (.text:__call_stub) 871571e0 00000040 : strasg.obj (.text:__strasgi_64plus) 87157220 00000040 : args_main.obj (.text:_args_main) 87157260 00000040 : imath64.obj (.text:_subcull) 871572a0 00000020 : errno.obj (.text:__c6xabi_errno_addr) 871572c0 00000020 : push.obj (.text:__pop_rts) 871572e0 00000020 : push.obj (.text:__push_rts) 87157300 00000020 : _lock.obj (.text:_nop) 87157320 00000020 : fprintf.obj (.text:_outc) 87157340 00000020 : printf.obj (.text:_outc) 87157360 00000020 : fprintf.obj (.text:_outs) 87157380 00000020 : printf.obj (.text:_outs) 871573a0 00000020 : startup.obj (.text:_system_post_cinit) 871573c0 00000020 : pre_init.obj (.text:_system_pre_init) 871573e0 00000020 : exit.obj (.text:abort) 87157400 00000020 : copy_decompress_none.obj (.text:decompress:none:__TI_decompress_none) 87157420 00000020 : copy_decompress_rle.obj (.text:decompress:rle24:__TI_decompress_rle24) 87157440 00000020 edma3lld_support.obj (.text) .fardata 0 87157460 00001324 UNINITIALIZED 87157460 00001000 main.obj (.fardata:input_img) 87158460 000001e0 rts6600_elf.lib : defs.obj (.fardata:_ftable) 87158640 000000a0 : write.obj (.fardata:_stream) 871586e0 00000078 : write.obj (.fardata:_device) 87158758 0000000c : exit.obj (.fardata) 87158764 00000008 : memory.obj (.fardata) 8715876c 00000004 : _lock.obj (.fardata:_lock) 87158770 00000004 : _lock.obj (.fardata:_unlock) 87158774 00000004 : defs.obj (.fardata) 87158778 00000004 : errno.obj (.fardata) 8715877c 00000004 : fopen.obj (.fardata) 87158780 00000004 : open.obj (.fardata) .sysmem 0 80000000 07000000 UNINITIALIZED 80000000 00000008 rts6600_elf.lib : memory.obj (.sysmem) 80000008 06fffff8 --HOLE-- .switch 0 871588a8 00000084 871588a8 0000004c afq_caffe_cnn.obj (.switch:afq_caffecnn_load) 871588f4 00000038 rts6600_elf.lib : _printfi.obj (.switch:__TI_printfi) MODULE SUMMARY Module code ro data rw data ------ ---- ------- ------- .\ main.obj 544 1201276 167936 afq_caffe_cnn.obj 27648 460 0 edma_utils_autoincrement.obj 5824 28 0 edma_utils_autoincrement_v2.obj 2752 36 0 dma_resource_allocator.obj 992 0 204 dma_funcs.obj 736 4 0 edma_utils_state.obj 416 0 192 edma_utils_memcpy.obj 352 0 0 edma_utils.obj 128 16 0 edma3lld_support.obj 32 0 0 +--+---------------------------------+-------+---------+-----------+ Total: 39424 1201820 168332 D:\ti_ccsv7\ccsv7\tools\compiler\ti-cgt-c6000_8.2.2\lib\rts6600_elf.lib _printfi.obj 13696 92 0 memory.obj 2016 0 8 divd.obj 1536 0 0 fopen.obj 992 0 4 fputs.obj 992 0 0 defs.obj 0 0 804 divf.obj 640 0 0 imath64.obj 640 0 0 open.obj 544 0 4 fputc.obj 544 0 0 setvbuf.obj 544 0 0 trgmsg.obj 224 0 288 fclose.obj 448 0 0 getdevice.obj 448 0 0 imath40.obj 448 0 0 hostrename.obj 416 0 0 frexp.obj 384 0 0 write.obj 96 0 280 autoinit.obj 352 0 0 sqrt.obj 352 0 0 fprintf.obj 320 0 0 ldexp.obj 320 0 0 copy_decompress_rle.obj 288 0 0 fseek.obj 288 0 0 printf.obj 288 0 0 exit.obj 256 0 12 ctype.obj 0 257 0 _io_perm.obj 256 0 0 atoi.obj 256 0 0 cpy_tbl.obj 256 0 0 hostopen.obj 224 0 8 close.obj 224 0 0 divi.obj 224 0 0 hostlseek.obj 224 0 0 hostwrite.obj 224 0 0 llshift.obj 224 0 0 ltoa.obj 224 0 0 memset.obj 224 0 0 divu.obj 192 0 0 fflush.obj 192 0 0 hostread.obj 192 0 0 hostunlink.obj 192 0 0 remi.obj 192 0 0 tls.obj 192 0 0 fixfu.obj 160 0 0 fltulld.obj 160 0 0 hostclose.obj 160 0 0 memcpy64.obj 160 0 0 modf.obj 160 0 0 remu.obj 160 0 0 boot.obj 128 0 0 unlink.obj 128 0 0 frcmpyd_div.obj 96 0 0 lseek.obj 96 0 0 memccpy.obj 96 0 0 args_main.obj 64 0 0 call_stub.obj 64 0 0 isinf.obj 64 0 0 push.obj 64 0 0 strasg.obj 64 0 0 _lock.obj 32 0 8 errno.obj 32 0 4 copy_decompress_none.obj 32 0 0 pre_init.obj 32 0 0 startup.obj 32 0 0 +--+---------------------------------+-------+---------+-----------+ Total: 32768 349 1420 Heap: 0 0 117440512 Stack: 0 0 12288 Linker Generated: 0 4273 0 +--+---------------------------------+-------+---------+-----------+ Grand Total: 72192 1206442 117622552 LINKER GENERATED COPY TABLES __TI_cinit_table @ 871599c8 records: 4, size/record: 8, table size: 32 .fardata: load addr=87158930, load size=00001068 bytes, run addr=87157460, run size=00001324 bytes, compression=rle .far: load addr=87159998, load size=0000000d bytes, run addr=87125780, run size=000202d0 bytes, compression=rle .L2SramSect: load addr=871599a5, load size=0000000b bytes, run addr=00800000, run size=00008000 bytes, compression=rle .neardata: load addr=871599b0, load size=00000009 bytes, run addr=8712577c, run size=00000004 bytes, compression=rle LINKER GENERATED HANDLER TABLE __TI_handler_table @ 871599bc records: 2, size/record: 4, table size: 8 index: 0, handler: __TI_decompress_rle24 index: 1, handler: __TI_decompress_none i load .out to the evm whit JTAG and run follow is out time [C66xx_DSP1] Meanvalue_ti_times = 0.262565 ms im2col_ti_cov_times = 0.972233 ms mcvMatrixMulMatrixRowMajor_f32_afq_ti_cov_times = 12.518572 ms caffecnn_forward_layer_conv_ti_times = 13.755874 ms im2col_ti_cov_times = 2.175635 ms mcvMatrixMulMatrixRowMajor_f32_afq_ti_cov_times = 25.113652 ms caffecnn_forward_layer_conv_ti_times = 27.531509 ms im2col_ti_cov_times = 2.222183 ms ,,but i think the out is right but time is very big , I don't think it's normal. before i test some funcs alone in a simple project the time is samll （input image size is same） Meanvalue_ti_times +im2col_ti_cov_times +mcvMatrixMulMatrixRowMajor_f32_afq_ti_cov_times is 0.5ms so I what should I check? + +Hi Shuai, Thanks for the details! Couple of things to check: 1. You seem to be profiling the code as well as the DMA operation. Do you have a split up of the Compute cycles of the operation and the DMA. This will help us identify whether the issue is with the DMA and the compute. 2. The other thing to check is the DSP Compiler options between the simple project and the other project. Do you have RTOS/tasks in the final project? 3. Currently what is your EDMA parameters? Are you comparing the DMA cycles between DDR to DDR vs L2RAM to L2RAM? Thanks and Regards, Piyali + +Hi Piyali some mistake about l2RAM ,some data i want to put in L2RAM but infact it in DDR . so itis not problem of DMA. thanks shuai + diff --git a/data2/text/range/15001-20000/684635.txt b/data2/text/range/15001-20000/684635.txt new file mode 100644 index 0000000000000000000000000000000000000000..71551a229986a57caf4f5dbd92f229395fe74d0e --- /dev/null +++ b/data2/text/range/15001-20000/684635.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: error when setting conv2dKernelType in import file + +Query Text: +Part Number: TDA2 Hi: I train a SSD model changed from "github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/object_detection/voc0712",only 1 class detection.I only train the first step "initial" model,not do sparsenowthe,and train is OK.And the test result on caffe-jacinto is OK too. Then I do tidl model import,when it run the quantStatsTool,there jump a exception and temminate the process. But when I delete the "conv2dKernelType=......" line int the import file,the model import process run success,but I use the file "stats_tool_out.bin" to checek result ,the result is wrong. Then I find setting the "conv2dKernelType" value to all 0,ther is no exception, when I setting "conv2dKernelType=......" to not all 0,the exception is appear again.the import log is below: C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDL.01.01.00.00\modules\ti_dl\utils\tidlModelImport>tidl_model_import.out.exe ..\..\test\testvecs\config\import\tidl_import_JDetNet_480x200.txt Caffe Network File : ..\..\test\testvecs\config\caffe_modesl\ssd480x200\initial\deploy.prototxt Caffe Model File : ..\..\test\testvecs\config\caffe_modesl\ssd480x200\initial\ssd480x200_initial_iter_66000.caffemodel TIDL Network File : ..\..\test\testvecs\config\tidl_models\tidl_net_jdetNet_480x200_ssd.bin TIDL Model File : ..\..\test\testvecs\config\tidl_models\tidl_param_jdetNet_480x200_ssd.bin Name of the Network : ssdJacintoNetV2_test Num Inputs : 1 Could not find detection_out Params Num of Layer Detected : 49 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 200 , 480 , 0 , 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 200 , 480 , 1 , 3 , 200 , 480 , 288000 , 2, TIDL_ConvolutionLayer , conv1a 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 200 , 480 , 1 , 32 , 100 , 240 , 57600000 , 3, TIDL_ConvolutionLayer , conv1b 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 100 , 240 , 1 , 32 , 50 , 120 , 55296000 , 4, TIDL_ConvolutionLayer , res2a_branch2a 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 50 , 120 , 1 , 64 , 50 , 120 , 110592000 , 5, TIDL_ConvolutionLayer , res2a_branch2b 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 50 , 120 , 1 , 64 , 25 , 60 , 55296000 , 6, TIDL_ConvolutionLayer , res3a_branch2a 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 25 , 60 , 1 , 128 , 25 , 60 , 110592000 , 7, TIDL_ConvolutionLayer , res3a_branch2b 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 25 , 60 , 1 , 128 , 25 , 60 , 55296000 , 8, TIDL_PoolingLayer , pool3 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 25 , 60 , 1 , 128 , 13 , 30 , 199680 , 9, TIDL_ConvolutionLayer , res4a_branch2a 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 13 , 30 , 1 , 256 , 13 , 30 , 115015680 , 10, TIDL_ConvolutionLayer , res4a_branch2b 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 13 , 30 , 1 , 256 , 6 , 15 , 57507840 , 11, TIDL_ConvolutionLayer , res5a_branch2a 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 6 , 15 , 1 , 512 , 6 , 15 , 106168320 , 12, TIDL_ConvolutionLayer , res5a_branch2b 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 6 , 15 , 1 , 512 , 6 , 15 , 53084160 , 13, TIDL_PoolingLayer , pool6 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 6 , 15 , 1 , 512 , 3 , 8 , 49152 , 14, TIDL_PoolingLayer , pool7 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 3 , 8 , 1 , 512 , 2 , 4 , 16384 , 15, TIDL_PoolingLayer , pool8 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 2 , 4 , 1 , 512 , 1 , 2 , 4096 , 16, TIDL_ConvolutionLayer , ctx_output1 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 16 , 1 , 128 , 25 , 60 , 1 , 256 , 25 , 60 , 49152000 , 17, TIDL_ConvolutionLayer , ctx_output2 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 17 , 1 , 512 , 6 , 15 , 1 , 256 , 6 , 15 , 11796480 , 18, TIDL_ConvolutionLayer , ctx_output3 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 18 , 1 , 512 , 3 , 8 , 1 , 256 , 3 , 8 , 3145728 , 19, TIDL_ConvolutionLayer , ctx_output4 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 19 , 1 , 512 , 2 , 4 , 1 , 256 , 2 , 4 , 1048576 , 20, TIDL_ConvolutionLayer , ctx_output5 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 20 , 1 , 512 , 1 , 2 , 1 , 256 , 1 , 2 , 262144 , 21, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_loc 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 21 , 1 , 256 , 25 , 60 , 1 , 16 , 25 , 60 , 6144000 , 22, TIDL_FlattenLayer , ctx_output1/relu_mbox_loc_perm 2, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 16 , 25 , 60 , 1 , 1 , 1 , 24000 , 1 , 23, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_conf 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 23 , 1 , 256 , 25 , 60 , 1 , 8 , 25 , 60 , 3072000 , 24, TIDL_FlattenLayer , ctx_output1/relu_mbox_conf_perm 2, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 8 , 25 , 60 , 1 , 1 , 1 , 12000 , 1 , 26, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_loc 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 26 , 1 , 256 , 6 , 15 , 1 , 24 , 6 , 15 , 552960 , 27, TIDL_FlattenLayer , ctx_output2/relu_mbox_loc_perm 2, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 24 , 6 , 15 , 1 , 1 , 1 , 2160 , 1 , 28, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_conf 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 28 , 1 , 256 , 6 , 15 , 1 , 12 , 6 , 15 , 276480 , 29, TIDL_FlattenLayer , ctx_output2/relu_mbox_conf_perm 2, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 12 , 6 , 15 , 1 , 1 , 1 , 1080 , 1 , 31, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_loc 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 31 , 1 , 256 , 3 , 8 , 1 , 24 , 3 , 8 , 147456 , 32, TIDL_FlattenLayer , ctx_output3/relu_mbox_loc_perm 2, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 24 , 3 , 8 , 1 , 1 , 1 , 576 , 1 , 33, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_conf 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 33 , 1 , 256 , 3 , 8 , 1 , 12 , 3 , 8 , 73728 , 34, TIDL_FlattenLayer , ctx_output3/relu_mbox_conf_perm 2, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 12 , 3 , 8 , 1 , 1 , 1 , 288 , 1 , 36, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_loc 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 36 , 1 , 256 , 2 , 4 , 1 , 24 , 2 , 4 , 49152 , 37, TIDL_FlattenLayer , ctx_output4/relu_mbox_loc_perm 2, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 24 , 2 , 4 , 1 , 1 , 1 , 192 , 1 , 38, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_conf 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 38 , 1 , 256 , 2 , 4 , 1 , 12 , 2 , 4 , 24576 , 39, TIDL_FlattenLayer , ctx_output4/relu_mbox_conf_perm 2, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 12 , 2 , 4 , 1 , 1 , 1 , 96 , 1 , 41, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_loc 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 41 , 1 , 256 , 1 , 2 , 1 , 16 , 1 , 2 , 8192 , 42, TIDL_FlattenLayer , ctx_output5/relu_mbox_loc_perm 2, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 16 , 1 , 2 , 1 , 1 , 1 , 32 , 1 , 43, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_conf 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 43 , 1 , 256 , 1 , 2 , 1 , 8 , 1 , 2 , 4096 , 44, TIDL_FlattenLayer , ctx_output5/relu_mbox_conf_perm 2, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 8 , 1 , 2 , 1 , 1 , 1 , 16 , 1 , 46, TIDL_ConcatLayer , mbox_loc_5headers 2, 5 , 1 , 22 , 27 , 32 , 37 , 42 , x , x , x , 46 , 1 , 1 , 1 , 24000 , 1 , 1 , 1 , 26960 , 1 , 47, TIDL_ConcatLayer , mbox_conf_5headers 2, 5 , 1 , 24 , 29 , 34 , 39 , 44 , x , x , x , 47 , 1 , 1 , 1 , 12000 , 1 , 1 , 1 , 13480 , 1 , 48, TIDL_DetectionOutputLayer , detection_out 2, 2 , 1 , 46 , 47 , x , x , x , x , x , x , 48 , 1 , 1 , 1 , 26960 , 1 , 1 , 1 , 560 , 1 , Total Giga Macs : 0.8528 Processing config file .\tempDir\qunat_stats_config.txt ! 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 200 , 480 , 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 200 , 480 , 1 , 3 , 200 , 480 , 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 200 , 480 , 1 , 32 , 100 , 240 , 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 100 , 240 , 1 , 32 , 50 , 120 , 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 50 , 120 , 1 , 64 , 50 , 120 , 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 50 , 120 , 1 , 64 , 25 , 60 , 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 25 , 60 , 1 , 128 , 25 , 60 , 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 25 , 60 , 1 , 128 , 25 , 60 , 8, TIDL_PoolingLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 25 , 60 , 1 , 128 , 13 , 30 , 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 13 , 30 , 1 , 256 , 13 , 30 , 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 13 , 30 , 1 , 256 , 6 , 15 , 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 6 , 15 , 1 , 512 , 6 , 15 , 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 6 , 15 , 1 , 512 , 6 , 15 , 13, TIDL_PoolingLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 6 , 15 , 1 , 512 , 3 , 8 , 14, TIDL_PoolingLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 3 , 8 , 1 , 512 , 2 , 4 , 15, TIDL_PoolingLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 2 , 4 , 1 , 512 , 1 , 2 , 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 16 , 1 , 128 , 25 , 60 , 1 , 256 , 25 , 60 , 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 17 , 1 , 512 , 6 , 15 , 1 , 256 , 6 , 15 , 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 18 , 1 , 512 , 3 , 8 , 1 , 256 , 3 , 8 , 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 19 , 1 , 512 , 2 , 4 , 1 , 256 , 2 , 4 , 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 20 , 1 , 512 , 1 , 2 , 1 , 256 , 1 , 2 , 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 21 , 1 , 256 , 25 , 60 , 1 , 16 , 25 , 60 , 22, TIDL_FlattenLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 16 , 25 , 60 , 1 , 1 , 1 ,24000 , 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 23 , 1 , 256 , 25 , 60 , 1 , 8 , 25 , 60 , 24, TIDL_FlattenLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 8 , 25 , 60 , 1 , 1 , 1 ,12000 , 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 26 , 1 , 256 , 6 , 15 , 1 , 24 , 6 , 15 , 26, TIDL_FlattenLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 24 , 6 , 15 , 1 , 1 , 1 , 2160 , 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 28 , 1 , 256 , 6 , 15 , 1 , 12 , 6 , 15 , 28, TIDL_FlattenLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 12 , 6 , 15 , 1 , 1 , 1 , 1080 , 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 31 , 1 , 256 , 3 , 8 , 1 , 24 , 3 , 8 , 30, TIDL_FlattenLayer , 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 24 , 3 , 8 , 1 , 1 , 1 , 576 , 31, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 33 , 1 , 256 , 3 , 8 , 1 , 12 , 3 , 8 , 32, TIDL_FlattenLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 12 , 3 , 8 , 1 , 1 , 1 , 288 , 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 36 , 1 , 256 , 2 , 4 , 1 , 24 , 2 , 4 , 34, TIDL_FlattenLayer , 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 24 , 2 , 4 , 1 , 1 , 1 , 192 , 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 38 , 1 , 256 , 2 , 4 , 1 , 12 , 2 , 4 , 36, TIDL_FlattenLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 12 , 2 , 4 , 1 , 1 , 1 , 96 , 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 41 , 1 , 256 , 1 , 2 , 1 , 16 , 1 , 2 , 38, TIDL_FlattenLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 16 , 1 , 2 , 1 , 1 , 1 , 32 , 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 43 , 1 , 256 , 1 , 2 , 1 , 8 , 1 , 2 , 40, TIDL_FlattenLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 8 , 1 , 2 , 1 , 1 , 1 , 16 , 41, TIDL_ConcatLayer , 1, 5 , 1 , 22 , 27 , 32 , 37 , 42 , x , x , x , 46 , 1 , 1 , 1 ,24000 , 1 , 1 , 1 ,26960 , 42, TIDL_ConcatLayer , 1, 5 , 1 , 24 , 29 , 34 , 39 , 44 , x , x , x , 47 , 1 , 1 , 1 ,12000 , 1 , 1 , 1 ,13480 , 43, TIDL_DetectionOutputLayer , 1, 2 , 1 , 46 , 47 , x , x , x , x , x , x , 48 , 1 , 1 , 1 ,26960 , 1 , 1 , 1 , 560 , 44, TIDL_DataLayer , 0, 1 , -1 , 48 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 560 , 0 , 0 , 0 , 0 , And my import file is : # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 25 numParamBits = 8 # 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 inElementType = 0 inputNetFile = "..\..\test\testvecs\config\caffe_modesl\ssd480x200\initial\deploy.prototxt inputParamsFile = "..\..\test\testvecs\config\caffe_modesl\ssd480x200\initial\ssd480x200_initial_iter_66000.caffemodel" outputNetFile = "..\..\test\testvecs\config\tidl_models\tidl_net_jdetNet_480x200_ssd.bin" outputParamsFile = "..\..\test\testvecs\config\tidl_models\tidl_param_jdetNet_480x200_ssd.bin" rawSampleInData = 0 preProcType = 4 sampleInData = "..\..\test\testvecs\input\cqh0.jpg" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 2 2 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 #conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +Responses: +Share the deply prototext and caffe model to re-produce the issue Also Post the exception tha you are observing for quick investigation + +Hi: the exception only has a windows error messagebox,as below: and deploy file and caffe model is follow: model$deploy.7z + +Hi: I'm sorry,the deploy in .7z pack has some error: the layer name: "mbox_loc_5headers" "shoule change to "mbox_loc"; the layer name: "mbox_conf_5headers" shoule change to "mbox_conf"; the layer name: "mbox_priorbox_5headers" shoule change to "mbox_priorbox"; I trained this model with names without "_5headers",but confuse with some earier deploy file. But after correct those,the exception is still stay same. Regards + +Hi, We could reproduce the issue. We will debug and provide you the fix. Thanks, Praveen + +Hi, we found one issue for this specific resolution of 480x200 test case and fixed issue in one source file. Do you have access to TIDL source release so that I can share the fix (two lines of modified code)? Thanks, Praveen + +Hi: Thanks! I have access to TIDL source release. Regards + +Okay, then can you please try below fix in tidl_conv2d_base.c file.. at line # 2711, replace below code, numVerBlock = ((imHeight + (tidlConv2dProcHeight-1U)) / tidlConv2dProcHeight); ibufSize = TIDL_conv2dFindIbufSize(blockParams, params->strideW,outElementSize); with this code, numVerBlock = ((imHeight + (tidlConv2dProcHeight-1U)) / tidlConv2dProcHeight); imHeight = tidlConv2dProcHeight * numVerBlock; ibufSize = TIDL_conv2dFindIbufSize(blockParams, params->strideW,outElementSize); and try now? Thanks, Praveen + +Hi: Thanks!I will try this fix later ,and report the result. Regards + +Okay thank you.. Regards, Praveen + diff --git a/data2/text/range/15001-20000/688574.txt b/data2/text/range/15001-20000/688574.txt new file mode 100644 index 0000000000000000000000000000000000000000..4e5f055789c9b65354ed0cf0304b9cc62f2e08e2 --- /dev/null +++ b/data2/text/range/15001-20000/688574.txt @@ -0,0 +1,95 @@ +Ticket Name: Linux/TDA2PXEVM: PCIe Communication between PC and TDA2P EVA board + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux Dear Ti, we are trying to connect TDA2P EVA board to PC (with Linux running) over PCIe. We managed to connect TDA2P EVA board and TDA2XX EVA board over PCIe following your Wiki page. In this case the TDA2P EVA served as PCIe RC and the TDA2XX EVA as PCIe EP. Both boards are running Linux with kernel 4.4.84 .In this scenario, we where able to run the pcitest.sh PCIe test script and everything worked as expected. Now, we are trying to connect TDA2P EVA board with PC over PCIe. We are using the same PCIe cable that we used when connecting two EVA boards as described above. The TDA2P EVA board is running Linux with kernel 4.4.84. The PC is running Ubuntu 16.04.4 LTS with custom kernel (we recompiled the 4.16.7 Linux kernel to enable the PCI Endpoint Test Driver). The problem we are facing now is that the lspci command sometimes shows the TDA2P EVA board and sometimes does not. When the lspci is able to see TDA2P EVA board we get the following output: 00:00.0 Host bridge: Intel Corporation Device 591f (rev 05) 00:02.0 VGA compatible controller: Intel Corporation Device 5912 (rev 04) 00:14.0 USB controller: Intel Corporation Device a2af 00:16.0 Communication controller: Intel Corporation Device a2ba 00:17.0 SATA controller: Intel Corporation Device a282 00:1c.0 PCI bridge: Intel Corporation Device a294 (rev f0) 00:1c.5 PCI bridge: Intel Corporation Device a295 (rev f0) 00:1d.0 PCI bridge: Intel Corporation Device a298 (rev f0) 00:1f.0 ISA bridge: Intel Corporation Device a2c8 00:1f.2 Memory controller: Intel Corporation Device a2a1 00:1f.3 Audio device: Intel Corporation Device a2f0 00:1f.4 SMBus: Intel Corporation Device a2a3 00:1f.6 Ethernet controller: Intel Corporation Ethernet Connection (2) I219-V 01:00.0 Unassigned class [ff00]: Texas Instruments Device b500 (rev ff) 02:00.0 PCI bridge: ASMedia Technology Inc. ASM1083/1085 PCIe to PCI Bridge (rev 04) When we remove the TDA2P from PCIe bus (through /sys/bus/pci/devices//remove) and rescan the PCIe bus (trough /sys/bus/pci/rescan) we are not able to see TDA2P with lspci command. The same behavior is observed when we reboot the PC. Sometimes the PC recognizes the TDA2P sometimes not - the behavior is random. In the rare case when the PC recognizes the TDA2P EVA board we have the following dmesg output on PC side: [ 9612.437772] pci 0000:01:00.0: [104c:b500] type 00 class 0xff0000 [ 9612.437833] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000000ff] [ 9612.437856] pci 0000:01:00.0: reg 0x14: [mem 0x00000000-0x000001ff] [ 9612.437882] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x000003ff] [ 9612.437898] pci 0000:01:00.0: reg 0x1c: [mem 0x00000000-0x00003fff] [ 9612.438129] pci 0000:01:00.0: supports D1 [ 9612.438135] pci 0000:01:00.0: PME# supported from D0 D1 D3hot [ 9612.508627] pci 0000:01:00.0: BAR 3: assigned [mem 0xc8000000-0xc8003fff] [ 9612.508637] pci 0000:01:00.0: BAR 3: error updating (0xc8000000 != 0xffffffff) [ 9612.508648] pci 0000:01:00.0: BAR 2: assigned [mem 0xc8004000-0xc80043ff] [ 9612.508655] pci 0000:01:00.0: BAR 2: error updating (0xc8004000 != 0xffffffff) [ 9612.508662] pci 0000:01:00.0: BAR 1: assigned [mem 0xc8004400-0xc80045ff] [ 9612.508669] pci 0000:01:00.0: BAR 1: error updating (0xc8004400 != 0xffffffff) [ 9612.508675] pci 0000:01:00.0: BAR 0: assigned [mem 0xc8004600-0xc80046ff] [ 9612.508682] pci 0000:01:00.0: BAR 0: error updating (0xc8004600 != 0xffffffff) [ 9612.508690] pci 0000:02:00.0: PCI bridge to [bus 03] [ 9612.528477] pci-endpoint-test 0000:01:00.0: Refused to change power state, currently in D3 [ 9612.528667] pci-endpoint-test 0000:01:00.0: failed to get MSI interrupts [ 9612.528822] pci-endpoint-test 0000:01:00.0: can't ioremap BAR 4: [??? 0x00000000 flags 0x0] [ 9612.528826] pci-endpoint-test 0000:01:00.0: failed to read BAR4 [ 9612.528833] pci-endpoint-test 0000:01:00.0: can't ioremap BAR 5: [??? 0x00000000 flags 0x0] [ 9612.528836] pci-endpoint-test 0000:01:00.0: failed to read BAR5 We also enabled additional kernel debugging messages on TDA2P and when we power up the board, the dmesg shows the following message: [ 71.223875] dra7-pcie 51000000.pcie_ep: Link-up state change [ 95.154440] dra7-pcie 51000000.pcie_ep: Link Request Reset [ 95.154456] dra7-pcie 51000000.pcie_ep: Link-up state change In contrast, when we connect the TDA2P EVA and TDA2XX EVA boards, on EP (TDA2XX EVA board) side the dmesg shows following: [ 36.516286] dra7-pcie 51000000.pcie_ep: Link-up state change [ 130.663177] dra7-pcie 51000000.pcie_ep: CFG 'Memory Space Enable' change [ 130.663252] dra7-pcie 51000000.pcie_ep: CFG 'Bus Master Enable' change Do you have any ideas or suggestions for us? Could this all be a cable issue caused by some configuration lines/bits? Thank you in advance, Stefan Laza. + +Responses: +Hi, You should always boot EP first and configure endpoint device (bind). Once configuration is done boot the RC. TDA2X doesn't support PCIe hot plug. Regards, RK + +This is something we are aware off. We have also tried booting EP first, however we get the same results and logs. Do you have any other propositions? Could this be an issue caused by our ASUS motherboard with intel's PCIe controller on it? We also observed that the EP LTSSM is stuck in DETECT.QUIET state. On EP side we used the following command to read the status register of the LTSSM: devmem2 0x51002104 w the above command response is: Read at address 0x51002104 (0xb6fa6104): 0x00000000 Regards, SL. + +Hi Stefan, Is this issue still observed? If yes, could you halt the PC at GRUB/boot-loader? While powering on the PC its possible that the TDA2P EVA is reset and thus the no function is bound to the EP-controller. Let the TDA2PX EVA complete its initialization and bind the function to the EPC. All this while let the PC be in boot-loader and then jump to Linux. Can you also remove the reset resistor on the cable? The log 'Link Request Reset' occurs when the link has gone down and comes back up again, which could be caused by the controller on the PC. Removing the reset resistor could prevent this. Regards Shravan + +Hi Shravan, When managed avoid this issue (this is only a temporary solution) by setting the EP device to operate as GEN1 PCIe device. The device tree for our EP (TDA2p EVA board) looks as follows: &pcie1_ep { ti,pcie-is-gen1; status = "okay"; }; With the above modification we are able to 'see' the EP device on our host PC with lspci command. Also, we are able to remove the device and rescan the bus with following commands: echo 1 > /sys/bus/pci/devices//remove echo 1 > /sys/bus/pci/rescan and every time it is working as expected. There is no need to power up the EP device first and then the host PC - while our host PC is working, we boot the EP device and do a PCIe bus rescan (with the above command) and the EP device is properly recognized by the host PC. As said above, for us this is only a temorary solution, because we need the EP device to be able to operate as a PCIe GEN2 device. The reset resistor does nto exist on our cable. Regards, Stefan. + +Hi Stefan, It looks to be a problem on the RC side while enumerating the EP. Has any other PCIe Gen-2 device been tested / can you validate this on another PC? We validate it on PCIe Gen-2 and it works. Regards Shravan + +Hi Shravan, Our motherboard on which we are testing is: ASUS B250M-C PRO REV 1.01 Do you have any suggestion which model to use? On this motherboard we tested intel SSD with PCIe interface and the interface is working as expected. Regards, Stefan + +Hi Stefan, The issue seems to be with the link being unstable. There was a fix in a subsequent release (in kernel 4.14), you can find the patch here (for K-4.14). You may need to back-port it your kernel. This should resolve the issue with the link stability. git.ti.com/.../phy-ti-pipe3.c Regards Shravan + +Dear Shravan, We tried the patch that you recommended, but the issue is still present. When we power up the EP, in the kernel log we have: [ 71.223875] dra7-pcie 51000000.pcie_ep: Link-up state change [ 95.154440] dra7-pcie 51000000.pcie_ep: Link Request Reset [ 95.154456] dra7-pcie 51000000.pcie_ep: Link-up state change And the host PC is not able to see the EP when we invoke lspci. Again, when we set the PCIE on EP to operate as GEN1 in device tree: &pcie1_ep { ti,pcie-is-gen1; status = "okay"; }; on EP side in kernel log we get: [ 41.125133] dra7-pcie 51000000.pcie_ep: Link-up state change [ 52.756835] dra7-pcie 51000000.pcie_ep: CFG 'Memory Space Enable' change [ 52.757052] dra7-pcie 51000000.pcie_ep: CFG 'Bus Master Enable' change and from this point the host PC is able to see the EP. We will try with another motherboard, and we will keep you informed about the results. Regards, Stefan. + +Hi, Do you see same behavior when connected to a different PC? Also, Try a different board if you have. Regards, LB + +Yes, the same behavior is observed with different motherboards. So far we tried two models of motherboards: 1. ASUS B250-C PRO REV 1.01 2. ASRock Z68M/USB3 We have two EVA boards: TDA2XX EVA TDA2P EVA We tried both of them with the above mentioned motherboards - the behavior is same - we only get the boards recognized by the host computer when they are configured to operate as GEN1 PCIe devices. When we configure the EP side (TDA2P or TDA2XX) to operate as GEN2 PCIe device and when we read the status of register PCIECTRL_TI_CONF_DEVICE_CMD (0x5100 2104) using the devmem2 command, we get: root@dra7xx-evm:~# devmem2 0x51002104 /dev/mem opened. Memory mapped at address 0xb6ff1000. Read at address 0x51002104 (0xb6ff1104): 0x00000000 According to TDA2XX TRM the bits 2-7 in PCIECTRL_TI_CONF_DEVICE_CMD represent the LTSSM_STATE and in our case it seems that the LTSSM ends up in state DETECT_QUIET. The bit 0 PCIECTRL_TI_CONF_DEVICE_CMD indicates that the LTSSM is not enabled. In contrast, when configure our boards to operate as GEN1 devices and read PCIECTRL_TI_CONF_DEVICE_CMD register we get: root@dra7xx-evm:~# devmem2 0x51002104 /dev/mem opened. Memory mapped at address 0xb6ff5000. Read at address 0x51002104 (0xb6ff5104): 0x00000041 Again, according to TDA2XX TRM, the LTSSM is in RCVRY_IDLE. And the LTSSM is enabled. Do you have any idea why is this happening? Regards, Stefan. + +In the bellow mentioned scenarios we use the PCIe cable modification as suggested on your wiki page: processors.wiki.ti.com/.../Linux_Core_PCIe_EP_User's_Guide We use x1 PCIe cable. So far we tried following configurations: 1. TDA2XX (EP) (Linux) -> TDA2P(RC) (Linux) - with PCIe Endpoint test drivers the boards are successfully configured as PCIe GEN2 devices and the pcitest.sh script finishes without errors. 2. TDA2P (EP) (Linux) -> TDA2XX(RC) (Linux) - with PCIe Endpoint test drivers the boards are successfully configured as PCIe GEN2 devices and the pcitest.sh script finishes without errors. 3. TDA2XX (EP) (Linux) -> Host PC (Linux) - with PCIe Endpoint test drivers the Host PC is able to recognize the EP only as GEN1 the pcitest.sh test crashes randomly - the EP board freezes on Read, Write and Copy tests. (sometimes even the Host PC freezes) 4. TDA2P (EP) (Linux) -> Host PC (Linux) - with PCIe Endpoint test drivers the Host PC is able to recognize the EP only as GEN1 the pcitest.sh test crashes randomly - the EP board freezes on Read, Write and Copy tests. (sometimes even the Host PC freezes) On our custom boards we have 3 SOC (TDA2XX) - two of them are connected with PCIe on PCB. On this board we are able to run similar test - like 1. and 2. - and the test are done without errors. We also wrote our custom drivers for EP and RC, based on PCIe Endpoint test driver code. In this drivers we implemented DMA transfer from EP to RC device. On our custom board the DMA transfer is done without errors. But when we connect TDA2XX or TDA2P EVA board to the Host PC and try the DMA transfer (we tried to transfer buffers of 4KB in for loop) - the PCIe link is reset during the for loop iteration - it happens at random intervals (sometimes the link is reset after 100 iterations, sometimes after 1000 - there is no pattern). In our custom driver we tried memcpy from EP to Host PC, but the EP freezes randomly during memcpy data transfer. When we try the same memcpy code on our custom board, the data transfer is done without error. Is there any possibility that the Host PC can't recognize the EP as PCIe GEN2 because the reference clock signals are disconnected on the PCIe cable (we disconnected the reference clock signals based on the Wiki page mentioned above)? Could this missing reference clock signals be the reason why memcpy and DMA data transfer is not working between EP (TDA2XX or TDA2PX) and Host PC? Can you tell us exactly how you test the PCIe communication between TDA2(P)XX EVA boards? Do you use Linux on EP and RC or do you only test with ROTS running on both of them? Regards, Stefan. + +Hi Stefan, It does look like an issue with the reference clock supplied to the EP. To ensure that the PC provides the reference clock to the EP (over PCIe), please modify the following (on the TDA2XX EVM): 1. Populate the reference clock signal on the cable 2. Depopulate capacitors C120/C125/C259/C262 3. Populate 0-ohm resistors across C120/C259 and C125/C262 (shown in the fig) 4. Depopulate resistors R806/R807 5. Resistor R223 i) Populate with 100ohm if PCIE Connector clock is LVDS ii) Depopulate if PCIE Connector clock is HCSL Also in the device-tree file dra7xx-clocks.dtsi, modify the reg attribute of the node apll_pcie_in_clk_mux as below reg = <0x21x 0x84> Regards Shravan + +Hi Shravan, we made the hardware changes that you proposed and so far this instructions are clear. But, we do not understand the change in dra7xx-clock.dtsi file. You proposed to change the following value: reg = <0x021x 0x4>; to reg = <0x021x 0x84>; According to device tree binding documentation found in (kernel_source/Documentation/devicetree/bindings) the second parameter for reg represents the register size. When we boot our EVA board and read the register value for CM_CLKMODE_APLL_PCIE (0x4a00821c), we get the following result: root@dra7xx-evm:~# devmem2 0x4a00821c /dev/mem opened. Memory mapped at address 0xb6f93000. Read at address 0x4A00821C (0xb6f9321c): 0x00000101 According to TDA2XX TRM bit 7 of CM_CLKMODE_APLL_PCIE should be set to 1 in order to select PCIe connector clock to be the reference clock for APLL_PCIE. In our case the bit 7 is 0 which means that the APLL_PCIE is still driven by the internal PLL (DPLL_PCIE_REF). Do you have any other suggestions on how to change the reference clock source for the APLL_PCIE? Regards, Stefan. + +Hi Stefan, Please ignore the DT change suggested in the previous post (however please perform the hardware modifications suggested). I've attached a patch which should enable APLL reference input clock from ACSPCIE. Regards Shravan 7875.0001-phy-pcie-Set-APLL-reference-input-clock-as-ACSPCIE.patch.txt From 5a16e6f5223b06e076c5d97f57b626721486a03a Mon Sep 17 00:00:00 2001 +From: Shravan Karthik +Date: Fri, 8 Jun 2018 15:51:05 +0530 +Subject: [PATCH] phy: pcie: Set APLL reference input clock as ACSPCIE + +Set mux configurationt to enable ACSPCIE as APLL input clock +Also set ASCPCIe in RX Mode and disable dpll_ref_m2 clock +--- + drivers/phy/phy-ti-pipe3.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c +index bf46844..f3f75f1 100644 +--- a/drivers/phy/phy-ti-pipe3.c ++++ b/drivers/phy/phy-ti-pipe3.c +@@ -410,12 +410,14 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy) + } + clk_set_rate(clk, 1500000000); + ++/* + clk = devm_clk_get(dev, "dpll_ref_m2"); + if (IS_ERR(clk)) { + dev_err(dev, "unable to get dpll ref m2 clk\n"); + return PTR_ERR(clk); + } + clk_set_rate(clk, 100000000); ++*/ + + clk = devm_clk_get(dev, "phy-div"); + if (IS_ERR(clk)) { +@@ -423,7 +425,6 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy) + return PTR_ERR(clk); + } + clk_set_rate(clk, 100000000); +- + phy->div_clk = devm_clk_get(dev, "div-clk"); + if (IS_ERR(phy->div_clk)) { + dev_err(dev, "unable to get div-clk\n"); +@@ -551,6 +552,19 @@ static int ti_pipe3_probe(struct platform_device *pdev) + struct device_node *node = pdev->dev.of_node; + struct device *dev = &pdev->dev; + int ret; ++ uint32_t readval; ++ ++ void __iomem *txrxregs = ioremap(0x4a003c14, 4); ++ readval = (uint32_t) readl(txrxregs); ++ readval |= 0x20000; ++ writel(readval,txrxregs); ++ iounmap(txrxregs); ++ ++ void __iomem *muxregs = ioremap(0x4a00821c, 4); ++ readval = (uint32_t) readl(muxregs); ++ readval |= 0x180; ++ writel(readval,muxregs); ++ iounmap(muxregs); + + phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL); + if (!phy) +-- +2.7.4 + +Hi Shravan, your suggested hardware and software changes resolved our PCIe issues. The EP (TDA2XX) is now properly recognized by the Host PC as GEN2 PCIe device. We tested the EP as GEN1 and GEN2 and in both scenarios the EP device is enumerated correctly. Now that the PCIe enumeration is working we also tested DMA transfer between the EP and Host PC - and we can confirm that the DMA transfer is also working as expected. Thank you for the support. Best regards, Stefan + diff --git a/data2/text/range/15001-20000/711204.txt b/data2/text/range/15001-20000/711204.txt new file mode 100644 index 0000000000000000000000000000000000000000..16786ad80f08410d2a0085d1d24a0361f35d988f --- /dev/null +++ b/data2/text/range/15001-20000/711204.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: tda2xx_evm_linux_infoadas Compile Error + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: Linux Hi, I have met as below compile error when compile the vision sdk app and linux after chainging tda2xx_evm_linux_all to tda2xx_evm_linux_infoadas. Vision SDK Version : PROCESSOR_SDK_VISION_03_04_00_00 Linux Compile Error checking fcntl.h presence... yes checking for fcntl.h... yes checking for string.h... (cached) yes checking sys/ioctl.h usability... yes checking sys/ioctl.h presence... yes checking for sys/ioctl.h... yes checking for unistd.h... (cached) yes configure: creating ./config.status config.status: creating Makefile config.status: creating src/cmem/api/Makefile config.status: creating src/cmem/tests/Makefile config.status: executing depfiles commands ----------------------------------------------------------- Thank you for installing the LinuxUtils package Installation directory prefix: '/usr'. Compilation command: 'arm-linux-gnueabihf-gcc -g -O2 ' Now type 'make; sudo make install' to generate the program and install it to your system. ------------------------------------------------------------ cd /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk ;\ # build cmem related .so files make -C /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api make[2]: Entering directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' if /bin/sh ../../../libtool --tag=CC --mode=compile arm-linux-gnueabihf-gcc -DPACKAGE_NAME=\"LinuxUtils\" -DPACKAGE_TARNAME=\"linuxutils\" -DPACKAGE_VERSION=\"4.0.0\" -DPACKAGE_STRING=\"LinuxUtils\ 4.0.0\" -DPACKAGE_BUGREPORT=\"\" -DPACKAGE=\"linuxutils\" -DVERSION=\"4.0.0\" -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 -DSTDC_HEADERS=1 -DHAVE_FCNTL_H=1 -DHAVE_STRING_H=1 -DHAVE_SYS_IOCTL_H=1 -DHAVE_UNISTD_H=1 -I. -I. -D_FILE_OFFSET_BITS=64 -I../../../include -Wall -g -O2 -MT cmem.lo -MD -MP -MF ".deps/cmem.Tpo" -c -o cmem.lo cmem.c; \ then mv -f ".deps/cmem.Tpo" ".deps/cmem.Plo"; else rm -f ".deps/cmem.Tpo"; exit 1; fi mkdir .libs arm-linux-gnueabihf-gcc -DPACKAGE_NAME=\"LinuxUtils\" -DPACKAGE_TARNAME=\"linuxutils\" -DPACKAGE_VERSION=\"4.0.0\" "-DPACKAGE_STRING=\"LinuxUtils 4.0.0\"" -DPACKAGE_BUGREPORT=\"\" -DPACKAGE=\"linuxutils\" -DVERSION=\"4.0.0\" -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 -DSTDC_HEADERS=1 -DHAVE_FCNTL_H=1 -DHAVE_STRING_H=1 -DHAVE_SYS_IOCTL_H=1 -DHAVE_UNISTD_H=1 -I. -I. -D_FILE_OFFSET_BITS=64 -I../../../include -Wall -g -O2 -MT cmem.lo -MD -MP -MF .deps/cmem.Tpo -c cmem.c -fPIC -DPIC -o .libs/cmem.o arm-linux-gnueabihf-gcc -DPACKAGE_NAME=\"LinuxUtils\" -DPACKAGE_TARNAME=\"linuxutils\" -DPACKAGE_VERSION=\"4.0.0\" "-DPACKAGE_STRING=\"LinuxUtils 4.0.0\"" -DPACKAGE_BUGREPORT=\"\" -DPACKAGE=\"linuxutils\" -DVERSION=\"4.0.0\" -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 -DSTDC_HEADERS=1 -DHAVE_FCNTL_H=1 -DHAVE_STRING_H=1 -DHAVE_SYS_IOCTL_H=1 -DHAVE_UNISTD_H=1 -I. -I. -D_FILE_OFFSET_BITS=64 -I../../../include -Wall -g -O2 -MT cmem.lo -MD -MP -MF .deps/cmem.Tpo -c cmem.c -o cmem.o >/dev/null 2>&1 /bin/sh ../../../libtool --tag=CC --mode=link arm-linux-gnueabihf-gcc -D_FILE_OFFSET_BITS=64 -I../../../include -Wall -g -O2 -o libticmem.la -rpath /usr/lib -version-info 1:0:0 cmem.lo arm-linux-gnueabihf-gcc -shared .libs/cmem.o -Wl,-soname -Wl,libticmem.so.1 -o .libs/libticmem.so.1.0.0 (cd .libs && rm -f libticmem.so.1 && ln -s libticmem.so.1.0.0 libticmem.so.1) (cd .libs && rm -f libticmem.so && ln -s libticmem.so.1.0.0 libticmem.so) arm-linux-gnueabihf-ar cru .libs/libticmem.a cmem.o arm-linux-gnueabihf-ranlib .libs/libticmem.a creating libticmem.la (cd .libs && rm -f libticmem.la && ln -s ../libticmem.la libticmem.la) make[2]: Leaving directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' make -C /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module KERNEL_INSTALL_DIR=/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm TOOLCHAIN_PREFIX=arm-linux-gnueabihf- release make[2]: Entering directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' Making module release... make -C /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap M=`pwd` ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- \ EXTRA_CFLAGS="-I/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/include" modules make[3]: Entering directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/omap' CC [M] /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module/cmemk.o /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module/cmemk.c: In function 'ioctl': /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module/cmemk.c:1437:8: error: implicit declaration of function 'dmac_map_area' [-Werror=implicit-function-declaration] dmac_map_area(virtp, size, DMA_FROM_DEVICE); ^ cc1: some warnings being treated as errors scripts/Makefile.build:264: recipe for target '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module/cmemk.o' failed make[4]: *** [/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module/cmemk.o] Error 1 Makefile:1405: recipe for target '_module_/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' failed make[3]: *** [_module_/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module] Error 2 make[3]: Leaving directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/omap' Makefile:31: recipe for target 'release' failed make[2]: *** [release] Error 2 make[2]: Leaving directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' build_kernel.mk:18: recipe for target 'kernel' failed make[1]: *** [kernel] Error 2 make[1]: Leaving directory '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' Makefile:435: recipe for target 'kernel' failed make: *** [kernel] Error 2 Vision SDK Apps Converting binary file [/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/vision_sdk/bin/tda2xx-evm/AppImage] to C array .. Done. (387640 bytes) # Invoking configuro... making package.mak (because of package.bld) ... # !!! Current build platform is [tda2xx-evm] !!! # !!! Core is [ipu2] !!! # !!! Core is [ipu2] !!! # !!! Core is [ipu2] !!! generating interfaces for package vision_sdk_configuro (because package/package.xdc.inc is older than package.xdc) ... configuring MAIN_APP_ipu2.xem4 from package/cfg/MAIN_APP_ipu2_pem4.cfg ... Loading Ipu2.cfg for tda2xx-evm # !!! Current build platform is [tda2xx-evm] !!! # !!! Including CPU #0 [ HOST ] in build !!! # !!! Including CPU #1 [ IPU2 ] in build !!! # !!! Including CPU #2 [ DSP1 ] in build !!! # !!! Including CPU #3 [ DSP2 ] in build !!! # !!! Including CPU #4 [ EVE1 ] in build !!! # !!! Host Proc ID is [1] !!! configuring IPUMM... loading: ivahd_mpeg4dec loading: ivahd_h264dec loading: ivahd_jpegvdec loading: ivahd_vc1vdec loading: ivahd_mpeg2vdec loading: ivahd_h264enc loading: ivahd_mpeg4enc ### Generating System memory map header file ... ### Generating System memory map header file ... DONE !!! generating custom ti.sysbios library makefile ... generating custom ti.sdo.utils library makefile ... generating custom ti.sdo.ipc library makefile ... Auto-registering resource manager for HDVICP2 manageIpc = true Heap: ti.sysbios.heaps.HeapMem will link with ti.sdo.codecs.mpeg4enc:lib/mpeg4venc_ti_host.lib will link with ti.sdo.codecs.h264enc:lib/h264enc_ti_host.lib will link with ti.sdo.codecs.mpeg2vdec:lib/mpeg2vdec_ti_host.lib;lib/ivahd_ti_api_vM3.lib will link with ti.sdo.codecs.vc1vdec:lib/vc1vdec_ti_host_M3.lib will link with ti.sdo.codecs.h264vdec:lib/h264vdec_ti.lib will link with ti.sdo.codecs.mpeg4vdec:lib/mpeg4vdec_ti_host.lib Starting build of library sources ... making /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/ipc.aem4 ... gmake[1]: Entering directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/ipc' clem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages/ti/sdo/utils/NameServer.c ... arem4 Ipc.obj ... gmake[1]: Leaving directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/ipc' making /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/utils.aem4 ... gmake[1]: Entering directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/utils' clem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages/ti/sdo/utils/UTILS.c ... arem4 UTILS.obj ... gmake[1]: Leaving directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/utils' making /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/sysbios/sysbios.aem4 ... gmake[1]: Entering directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/sysbios' clem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/BIOS.c ... "/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/m3/Hwi_smp.c", line 717: warning: a value of type "xdc_Ptr" cannot be assigned to an entity of type "xdc_SizeT" asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/timers/dmtimer/Timer_asm.sv7M ... asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/m3/Hwi_asm.sv7M ... asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/m3/Hwi_asm_switch.sv7M ... asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/m3/IntrinsicsSupport_asm.sv7M ... asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/m3/TaskSupport_asm.sv7M ... asmem4 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/arm/ducati/Core_smp_asm.sv7M ... arem4 BIOS.obj dmtimer_Timer_asm.obj m3_Hwi_asm.obj m3_Hwi_asm_switch.obj m3_IntrinsicsSupport_asm.obj m3_TaskSupport_asm.obj ducati_Core_smp_asm.obj ... gmake[1]: Leaving directory `/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.src/sysbios' Build of libraries done. # Configuro done! # Making tda2xx-evm:ipu2:release:vision_sdk_lib... # Compiling tda2xx-evm:ipu2:release:vision_sdk: src/main_common_ipu2.c # Compiling tda2xx-evm:ipu2:release:vision_sdk: src/eve_firmware.c # Compiling tda2xx-evm:ipu2:release:vision_sdk: src/ipu_primary.c # Compiling tda2xx-evm:ipu2:release:vision_sdk: /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/common/main_app/tda2xx/ipu2/src/main_ipu2.c # Compiling tda2xx-evm:ipu2:release:vision_sdk: /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/common/app_init/app_init_ipu_primary.c # Compiling generated MAIN_APP_ipu2_pem4.oem4 # Linking into /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # undefined first referenced symbol in file --------- ---------------- g_HDVICP_logTbl /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/framework_components_3_40_02_07/packages/ti/sdo/fc/ires/hdvicp/lib/debug/hdvicp2.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/td a2xx_evm_linux_infoadas/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xe m4" not built /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_m4.mk:297: recipe for target '/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4' failed make[7]: *** [/home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_infoadas/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4] Error 1 /home/jpp/vsdk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu2' failed make[6]: *** [ipu2] Error 2 MAKEFILE.MK:162: recipe for target 'apps_ipu2' failed make[5]: *** [apps_ipu2] Error 2 MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:287: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:171: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:36: recipe for target 'apps' failed make[1]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 Regards JP Park. + +Responses: +Hi JP Park, did you run "make –s –j depend" before "make –s –j" when you modified Rules.make? Regards, Yordan + +Hi Yordan, Yes i did Linux Compile : compile is ok when no modify and then run "make linux_clean" -> Modify Rules.make, run "make linux -> Occurred the compile error as above. Vision apps Compile : Default compile is ok. and then i run "make ?s ?j depend" before "make ?s ?j" when you modified Rules.make? The same errors have occurred when i have tried to compile the other version (3.00, 3.02 ) Regards, JP Park + +Hi JP Park, did you followed "2.4.2.1.1 Clone kernel" in VisionSDK_Linux_UserGuide.pdf and cloned and checkout the right tag for cmem module? Regards, Yordan + +Hi JP Park, I haven't heard back from you, I hope you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/15001-20000/711739.txt b/data2/text/range/15001-20000/711739.txt new file mode 100644 index 0000000000000000000000000000000000000000..aedeb3aa32906053236f149bb216d30bcae71ef7 --- /dev/null +++ b/data2/text/range/15001-20000/711739.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: how to boot from virtual machine targetfs + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux this is my uenv.txt! fdtfile=dra7-evm-infoadas.dtb args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.40:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' follow is booting log ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 239 bytes read in 2 ms (116.2 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3552176 bytes read in 113 ms (30 MiB/s) 106665 bytes read in 16 ms (6.4 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3633b0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00018-gd326d64-dirty (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #15 SMP PREEMPT Fri Jul 20 11:12:46 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.40:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) [ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000341] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000350] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000793] Console: colour dummy device 80x30 [ 0.000810] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000816] This ensures that you still see kernel messages. Please [ 0.000821] update your kernel commandline. [ 0.000836] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000849] pid_max: default: 32768 minimum: 301 [ 0.000947] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000957] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001500] Initializing cgroup subsys io [ 0.001517] Initializing cgroup subsys memory [ 0.001541] Initializing cgroup subsys devices [ 0.001553] Initializing cgroup subsys freezer [ 0.001564] Initializing cgroup subsys perf_event [ 0.001575] Initializing cgroup subsys pids [ 0.001602] CPU: Testing write buffer coherency: ok [ 0.001799] /cpus/cpu@0 missing clock-frequency property [ 0.001816] /cpus/cpu@1 missing clock-frequency property [ 0.001827] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001859] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080089] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080158] Brought up 2 CPUs [ 0.080171] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080177] CPU: All CPU(s) started in HYP mode. [ 0.080183] CPU: Virtualization extensions available. [ 0.080563] devtmpfs: initialized [ 0.109216] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110211] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313075] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313095] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317329] pinctrl core: initialized pinctrl subsystem [ 0.318175] NET: Registered protocol family 16 [ 0.319102] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340228] cpuidle: using governor ladder [ 0.370255] cpuidle: using governor menu [ 0.378691] OMAP GPIO hardware version 0.1 [ 0.385080] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.401126] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.401140] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.410440] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.410450] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.410912] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.410922] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.411501] OMAP DMA hardware revision 0.0 [ 0.451285] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452441] edma 43300000.edma: memcpy is disabled [ 0.457006] edma 43300000.edma: TI EDMA DMA engine driver [ 0.461338] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.461521] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.461684] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.461841] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.462129] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.462314] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.465298] palmas 0-0058: IRQ missing: skipping irq request [ 0.480763] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.553058] pcf857x 0-0020: probed [ 0.553616] pcf857x 0-0021: probed [ 0.553766] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.554151] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.554358] media: Linux media interface: v0.10 [ 0.554410] Linux video capture interface: v2.00 [ 0.554453] pps_core: LinuxPPS API ver. 1 registered [ 0.554460] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.554483] PTP clock support registered [ 0.554527] EDAC MC: Ver: 3.0.0 [ 0.555272] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.555571] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.555900] Advanced Linux Sound Architecture Driver Initialized. [ 0.556734] clocksource: Switched to clocksource arch_sys_counter [ 0.567166] NET: Registered protocol family 2 [ 0.567670] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.567733] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.567858] TCP: Hash tables configured (established 8192 bind 8192) [ 0.567905] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.567936] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.568147] NET: Registered protocol family 1 [ 0.568416] RPC: Registered named UNIX socket transport module. [ 0.568426] RPC: Registered udp transport module. [ 0.568433] RPC: Registered tcp transport module. [ 0.568439] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.569450] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.579255] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.579900] NFS: Registering the id_resolver key type [ 0.579925] Key type id_resolver registered [ 0.579934] Key type id_legacy registered [ 0.579987] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.581240] bounce: pool size: 64 pages [ 0.581387] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.581403] io scheduler noop registered [ 0.581415] io scheduler deadline registered [ 0.581447] io scheduler cfq registered (default) [ 0.586314] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.589469] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.589482] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.589515] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.589537] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.619541] dra7-pcie 51000000.pcie_rc: link is not up [ 0.619713] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.619726] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.619736] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.619746] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.620139] PCI: bus0: Fast back to back transfers disabled [ 0.620259] PCI: bus1: Fast back to back transfers enabled [ 0.620342] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.620357] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.620369] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.620585] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.679838] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.683189] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.702019] console [ttyS0] enabled [ 1.706400] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.716095] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.726142] [drm] Initialized drm 1.1.0 20060810 [ 1.732193] OMAP DSS rev 6.1 [ 1.735941] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.751618] loop: module loaded [ 1.755132] vmemexp device MAJOR num = 246 [ 1.759286] vmemexp class registered [ 1.762998] /dev/vmemexp device registered [ 1.767130] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.772798] nand: No NAND device found [ 1.776569] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.786496] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.791916] 7 ofpart partitions found on MTD device spi32766.0 [ 1.797795] Creating 7 MTD partitions on "spi32766.0": [ 1.802956] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.809063] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.815380] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.822324] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.829017] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.836386] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.842742] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.850513] libphy: Fixed MDIO Bus: probed [ 1.906763] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.912886] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.923418] libphy: 48485000.mdio: probed [ 1.927491] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.935532] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.944242] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.950941] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.957945] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.966539] mousedev: PS/2 mouse device common for all mice [ 1.972756] i2c /dev entries driver [ 1.981533] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.987155] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.993540] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.000096] evm_3v3_sw: supplied by sysen1 [ 2.080509] mmc0: MAN_BKOPS_EN bit is not set [ 2.116767] mmc0: new HS200 MMC card at address 0001 [ 2.132203] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.147258] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.158518] ledtrig-cpu: registered to indicate activity on CPUs [ 2.164703] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.173413] aic_dvdd: supplied by evm_3v3_sw [ 2.179371] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.186798] NET: Registered protocol family 10 [ 2.202069] sit: IPv6 over IPv4 tunneling driver [ 2.207278] NET: Registered protocol family 17 [ 2.211956] Key type dns_resolver registered [ 2.216365] omap_voltage_late_init: Voltage driver support not added [ 2.223258] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.229489] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.236184] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.242420] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.250619] Power Management for TI OMAP4+ devices. [ 2.255688] Registering SWP/SWPB emulation handler [ 2.262561] dmm 4e000000.dmm: initialized all PAT entries [ 2.269906] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.276549] [drm] No driver support for vblank timestamp query. [ 2.282855] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.299706] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.338073] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.357735] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.365616] hctosys: unable to open rtc device (rtc0) [ 2.379019] net eth0: initializing cpsw version 1.15 (0) [ 2.384368] net eth0: initialized cpsw ale version 1.4 [ 2.389551] net eth0: ALE Table size 1024 [ 2.400775] net eth0: phy found : id is : 0x20005c7a [ 2.411786] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 2.417687] net eth1: initializing cpsw version 1.15 (0) [ 2.429896] net eth1: phy found : id is : 0x20005c7a [ 2.439504] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 2.616598] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.631709] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.638675] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.648355] mmcblk1: p1 p2 [ 4.404334] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 4.416776] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 4.436759] Sending DHCP requests ., OK [ 4.596765] IP-Config: Got DHCP answer from 172.17.192.1, my address is 172.17.218.87 [ 4.610392] IP-Config: Complete: [ 4.613640] device=eth0, hwaddr=7c:38:66:a1:e2:a6, ipaddr=172.17.218.87, mask=255.255.224.0, gw=172.17.192.1 [ 4.623987] host=172.17.218.87, domain=apac.arcsoft.corp, nis-domain=(none) [ 4.631455] bootserver=172.17.11.203, rootserver=172.17.218.40, rootpath= [ 4.638604] nameserver0=172.17.10.20, nameserver1=172.17.10.31 [ 4.645240] evm_1v8: disabling [ 4.648325] aic_dvdd: disabling [ 4.651481] vmmcwl_fixed: disabling [ 4.655202] ldousb: disabling [ 4.658718] ALSA device list: [ 4.661700] #0: DRA7xx-EVM i donot know what is the problem and how to Solve this problem！ BESTWISHES! + +Responses: +Hi, It looks to me there seems to be an issue in identifying the root-fs. Are you able to ping to the IP address provided? Please revert the uenv.txt configuration to that of SD based rootfs, and try to run the ping command from the EVM to the the Linux virtual machine IP address. Once this ping is successful , you will be able to use it for NFS boot. Regards Shravan + diff --git a/data2/text/range/15001-20000/713246.txt b/data2/text/range/15001-20000/713246.txt new file mode 100644 index 0000000000000000000000000000000000000000..2515400a099e72493593da00c9a997da5f277dd7 --- /dev/null +++ b/data2/text/range/15001-20000/713246.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: TDA2x OpenCV Use-case CPU Load + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: INA226 Tool/software: TI-RTOS Hi, We were trying to run OpenCV use-case vip_single_cam_opencvcanny_sgx_display in Tda2xx_evm_bios with SDK3.1. The CPU load for opencv usecase was 99%. Why is the CPU getting fully loaded? Is there anyway we can solve this? We had also tried running this usecase in Linux, the CPU was fully loaded. + +Responses: +Hi, Can you run p and share the output of that. regards, Anuj + +Hi Anuj, Please check the performance 'p' log. This is the performance while running the usecase 'OpenCV-Canny edge' on tda2xx evm Bios. Performance Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [HOST ] 104.358171 s: IPC_IN_0 : Create in progress !!! [HOST ] 104.358445 s: IPC_IN_0 : Create Done !!! [HOST ] 104.358567 s: ALGORITHM: Create in progress (algId = 5) !!! [HOST ] 104.363447 s: ALGORITHM: Create Done (algId = 5) !!! [HOST ] 104.363539 s: IPC_OUT_0 : Create in progress !!! [HOST ] 104.363569 s: IPC_OUT_0 : Create Done !!! [HOST ] 105.883608 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 105.883608 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 100663296 B (98304 KB), Free size = 100181704 B (97833 KB) [DSP1 ] 105.883913 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 105.883944 s: SYSTEM: Heap = LOCAL_L2 @ 0x876ac3a4, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 105.883974 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 518264 B (506 KB) [IPU1-0] 109.893918 s: [IPU1-0] 109.894009 s: CPU [IPU1-0 ] Statistics, [IPU1-0] 109.894070 s: ************************* [IPU1-0] 109.894131 s: [IPU1-0] 109.894162 s: LOAD: CPU: 8.7% HWI: 1.6%, SWI:0.4%, Low Power: 91.4% [IPU1-0] 109.894314 s: [IPU1-0] 109.894345 s: LOAD: TSK: SYSTEM : 0.6% [IPU1-0] 109.894467 s: LOAD: TSK: IPC_IN_0 : 0.1% [IPU1-0] 109.894558 s: LOAD: TSK: IPC_OUT_0 : 0.2% [IPU1-0] 109.894711 s: LOAD: TSK: DISPLAY0 : 0.2% [IPU1-0] 109.894802 s: LOAD: TSK: CAPTURE : 0.1% [IPU1-0] 109.894924 s: LOAD: TSK: GrpxSrc0 : 1.9% [IPU1-0] 109.895016 s: LOAD: TSK: STAT_COLL : 2.6% [IPU1-0] 109.895107 s: LOAD: TSK: MISC : 1.0% [IPU1-0] 109.895199 s: [IPU1-0] 109.895260 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [IPU1-0] 109.895321 s: [IPU1-0] 109.895382 s: SYSTEM: Sempahores Objects, 184 of 1050 free [IPU1-0] 109.895473 s: SYSTEM: Task Objects , 18 of 100 free [IPU1-0] 109.895534 s: SYSTEM: Clock Objects , 96 of 100 free [IPU1-0] 109.895626 s: SYSTEM: Hwi Objects , 89 of 100 free [IPU1-0] 109.895717 s: [IPU1-0] 109.895748 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252944 B (247 KB) [IPU1-0] 109.895931 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 109.896083 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x90203000, Total size = 262131712 B (249 MB), Free size = 246925312 B (235 MB) [IPU1-0] 109.896266 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 2095616 B (1 MB), Free size = 2091776 B (1 MB) [IPU1-0] 109.896419 s: [IPU1-0] 109.896449 s: [IPU1-0] 109.896480 s: CPU [HOST ] Statistics, [IPU1-0] 109.896541 s: ************************* [IPU1-0] 109.896602 s: [IPU1-0] 109.896663 s: LOAD: CPU: 89.3% HWI: 0.2%, SWI:0.3%, Low Power: 17.3% [IPU1-0] 109.896785 s: [IPU1-0] 109.897059 s: LOAD: TSK: MISC : 88.8% [IPU1-0] 109.897151 s: [IPU1-0] 109.897181 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [IPU1-0] 109.897273 s: [IPU1-0] 109.897303 s: SYSTEM: Sempahores Objects, 439 of 1050 free [IPU1-0] 109.897395 s: SYSTEM: Task Objects , 38 of 100 free [IPU1-0] 109.897486 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 109.897578 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 109.897669 s: [IPU1-0] 109.897700 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 100663296 B (98304 KB), Free size = 100162600 B (97815 KB) [IPU1-0] 109.897852 s: [IPU1-0] 109.897913 s: [IPU1-0] 109.897944 s: CPU [DSP1 ] Statistics, [IPU1-0] 109.898005 s: ************************* [IPU1-0] 109.898066 s: [IPU1-0] 109.898127 s: LOAD: CPU: 0.4% HWI: 0.1%, SWI:0.1%, Low Power: 95.5% [IPU1-0] 109.898249 s: [IPU1-0] 109.898310 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 109.898401 s: [IPU1-0] 109.898432 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [IPU1-0] 109.898523 s: [IPU1-0] 109.898554 s: SYSTEM: Sempahores Objects, 458 of 1050 free [IPU1-0] 109.898645 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 109.898737 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 109.898798 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 109.898889 s: [IPU1-0] 109.898950 s: SYSTEM: Heap = LOCAL_L2 @ 0x876ac3a4, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [IPU1-0] 109.899103 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 518264 B (506 KB) [IPU1-0] 109.899255 s: [IPU1-0] 109.899591 s: [IPU1-0] 109.899652 s: UTILS_PRCM_STATS: Current Temperature, [IPU1-0] 109.899713 s: [IPU1-0] 109.899743 s: Voltage Rail || Curr Temp Min - Max [IPU1-0] 109.899835 s: --------------------------------------------------------- [IPU1-0] 109.899957 s: PMHAL_PRCM_VD_MPU || [36.800 , 37.200] [IPU1-0] 109.900079 s: PMHAL_PRCM_VD_CORE || [36.400 , 36.800] [IPU1-0] 109.900201 s: PMHAL_PRCM_VD_IVAHD || [36.400 , 36.800] [IPU1-0] 109.900292 s: PMHAL_PRCM_VD_DSPEVE || [35.600 , 36. 0] [IPU1-0] 109.900414 s: PMHAL_PRCM_VD_GPU || [34.800 , 35.200] [IPU1-0] 109.900506 s: [IPU1-0] 109.900536 s: ============================================================================ [IPU1-0] 109.900658 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) [IPU1-0] 109.900750 s: ---------------------------------------------------------------------------- [IPU1-0] 109.902336 s: UTILS_PRCM_STATS: Reading the regulator data failed [IPU1-0] 109.902427 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! [IPU1-0] 109.902702 s: [IPU1-0] 109.902732 s: Statistics Collector, [IPU1-0] 109.902793 s: [IPU1-0] 109.902854 s: STATISTIC Avg Data Peak Data [IPU1-0] 109.902946 s: COLLECTOR MB/s MB/s [IPU1-0] 109.903037 s: -------------------------------------------------- [IPU1-0] 109.903129 s: SCI_EMIF1 RD+WR | 147.592076 405.687386 [IPU1-0] 109.903220 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 [IPU1-0] 109.903312 s: SCI_EMIF1 RD ONLY | 131.851374 364.121504 [IPU1-0] 109.903434 s: SCI_EMIF1 WR ONLY | 15.786905 68.866626 [IPU1-0] 109.903525 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 [IPU1-0] 109.903647 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 [IPU1-0] 109.903739 s: SCI_MA_MPU_P1 | 74.444405 1713.677210 [IPU1-0] 109.903830 s: SCI_MA_MPU_P2 | 0.000000 0.000000 [IPU1-0] 109.903952 s: SCI_DSS | 0.000000 0.000000 [IPU1-0] 109.904074 s: SCI_IPU1 | 0.000000 0.000000 [IPU1-0] 109.904166 s: SCI_VIP1_P1 | 0.000000 0.000000 [IPU1-0] 109.904257 s: SCI_VIP1_P2 | 0.000000 0.000000 [IPU1-0] 109.904532 s: SCI_VPE_P1 | 0.000000 0.000000 [IPU1-0] 109.904654 s: SCI_VPE_P2 | 0.000000 0.000000 [IPU1-0] 109.904776 s: SCI_DSP1_MDMA | 0.000000 0.000000 [IPU1-0] 109.904867 s: SCI_DSP1_EDMA | 0.000000 0.000000 [IPU1-0] 109.904989 s: SCI_DSP2_MDMA | 0.000000 0.000000 [IPU1-0] 109.905081 s: SCI_DSP2_EDMA | 0.000000 0.000000 [IPU1-0] 109.905203 s: SCI_EVE1_TC0 | 0.000000 0.000000 [IPU1-0] 109.905294 s: SCI_EVE1_TC1 | 0.000000 0.000000 [IPU1-0] 109.905386 s: SCI_EVE2_TC0 | 0.000000 0.000000 [IPU1-0] 109.905508 s: SCI_EVE2_TC1 | 0.000000 0.000000 [IPU1-0] 109.905599 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 [IPU1-0] 109.905691 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 [IPU1-0] 109.905782 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 [IPU1-0] 109.905904 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 [IPU1-0] 109.905996 s: SCI_VIP2_P1 | 0.000000 0.000000 [IPU1-0] 109.906179 s: SCI_VIP2_P2 | 0.000000 0.000000 [IPU1-0] 109.906301 s: SCI_VIP3_P1 | 0.000000 0.000000 [IPU1-0] 109.906392 s: SCI_VIP3_P2 | 0.000000 0.000000 [IPU1-0] 109.906484 s: SCI_EVE3_TC0 | 0.000000 0.000000 [IPU1-0] 109.906606 s: SCI_EVE3_TC1 | 0.000000 0.000000 [IPU1-0] 109.906697 s: SCI_EVE4_TC0 | 0.000000 0.000000 [IPU1-0] 109.906789 s: SCI_EVE4_TC1 | 0.000000 0.000000 [IPU1-0] 109.906880 s: SCI_IVA | 0.000000 0.000000 [IPU1-0] 109.907185 s: SCI_GPU_P1 | 0.000000 0.000000 [IPU1-0] 109.907277 s: SCI_GPU_P2 | 0.000000 0.000000 [IPU1-0] 109.907582 s: SCI_GMAC_SW | 0.000000 0.000000 [IPU1-0] 109.907704 s: SCI_OCMC_RAM1 | 0.000000 0.000000 [IPU1-0] 109.907796 s: SCI_OCMC_RAM2 | 0.000000 0.000000 [IPU1-0] 109.907948 s: SCI_OCMC_RAM3 | 0.000000 0.000000 [IPU1-0] 110.007930 s: [IPU1-0] 110.007991 s: [IPU1-0] 110.008113 s: [IPU1-0] 110.008143 s: ### CPU [IPU1-0], LinkID [ 68], [IPU1-0] 110.008235 s: [IPU1-0] 110.008265 s: [ CAPTURE ] Link Statistics, [IPU1-0] 110.008326 s: ****************************** [IPU1-0] 110.008387 s: [IPU1-0] 110.008479 s: Elapsed time = 3936 msec [IPU1-0] 110.008570 s: [IPU1-0] 110.008601 s: New data Recv = 29.97 fps [IPU1-0] 110.008692 s: Get Full Buf Cb = 16.0 fps [IPU1-0] 110.008753 s: Put Empty Buf Cb = 15.24 fps [IPU1-0] 110.008814 s: Driver/Notify Cb = 29.97 fps [IPU1-0] 110.008906 s: [IPU1-0] 110.008967 s: Input Statistics, [IPU1-0] 110.008997 s: [IPU1-0] 110.009058 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 110.009119 s: | FPS | FPS | FPS | FPS [IPU1-0] 110.009211 s: -------------------------------------------------- [IPU1-0] 110.009272 s: 0 | 15.24 0. 0 0. 0 15.24 [IPU1-0] 110.009424 s: [IPU1-0] 110.009455 s: Output Statistics, [IPU1-0] 110.009516 s: [IPU1-0] 110.009546 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 110.009607 s: | ID | FPS | FPS | FPS [IPU1-0] 110.009699 s: --------------------------------------------- [IPU1-0] 110.009760 s: 0 | 0 16. 0 0. 0 0. 0 [IPU1-0] 110.009882 s: [IPU1-0] 110.009943 s: [ CAPTURE ] LATENCY, [IPU1-0] 110.010004 s: ******************** [IPU1-0] 110.010034 s: [IPU1-0] 110.010156 s: [IPU1-0] 110.010187 s: ### CPU [IPU1-0], LinkID [ 0], [IPU1-0] 110.010278 s: [IPU1-0] 110.010309 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 110.010370 s: ****************************** [IPU1-0] 110.010431 s: [IPU1-0] 110.010461 s: Elapsed time = 3938 msec [IPU1-0] 110.010553 s: [IPU1-0] 110.010583 s: New data Recv = 15.99 fps [IPU1-0] 110.010644 s: Release data Recv = 15.23 fps [IPU1-0] 110.010736 s: Driver/Notify Cb = 115.28 fps [IPU1-0] 110.010797 s: [IPU1-0] 110.010858 s: Input Statistics, [IPU1-0] 110.010888 s: [IPU1-0] 110.010949 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 110.011010 s: | FPS | FPS | FPS | FPS [IPU1-0] 110.011102 s: -------------------------------------------------- [IPU1-0] 110.011193 s: 0 | 15.99 0. 0 0. 0 15.99 [IPU1-0] 110.011315 s: [IPU1-0] 110.011346 s: Output Statistics, [IPU1-0] 110.011407 s: [IPU1-0] 110.011437 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 110.011529 s: | ID | FPS | FPS | FPS [IPU1-0] 110.011590 s: --------------------------------------------- [IPU1-0] 110.011681 s: 0 | 0 15.99 0. 0 0. 0 [IPU1-0] 110.011773 s: [IPU1-0] 110.011834 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 110.011895 s: ******************** [IPU1-0] 110.012108 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 31 us, [IPU1-0] 110.012230 s: Source to Link Latency : Avg = 73 us, Min = 61 us, Max = 92 us, [IPU1-0] 110.012352 s: [IPU1-0] 110.512200 s: [IPU1-0] 110.512261 s: ### CPU [ HOST], LinkID [ 10], [IPU1-0] 110.512352 s: [IPU1-0] 110.512383 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 110.512444 s: ****************************** [IPU1-0] 110.512535 s: [IPU1-0] 110.512566 s: Elapsed time = 4440 msec [IPU1-0] 110.512627 s: [IPU1-0] 110.512657 s: Get Full Buf Cb = 9.0 fps [IPU1-0] 110.512749 s: Put Empty Buf Cb = 15.31 fps [IPU1-0] 110.512810 s: Driver/Notify Cb = 15.54 fps [IPU1-0] 110.512901 s: [IPU1-0] 110.512962 s: Input Statistics, [IPU1-0] 110.513023 s: [IPU1-0] 110.513054 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 110.513115 s: | FPS | FPS | FPS | FPS [IPU1-0] 110.513206 s: -------------------------------------------------- [IPU1-0] 110.513298 s: 0 | 15.76 0. 0 0. 0 15.76 [IPU1-0] 110.513420 s: [IPU1-0] 110.513450 s: Output Statistics, [IPU1-0] 110.513511 s: [IPU1-0] 110.513542 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 110.513633 s: | ID | FPS | FPS | FPS [IPU1-0] 110.513694 s: --------------------------------------------- [IPU1-0] 110.513786 s: 0 | 0 15.76 0. 0 0. 0 [IPU1-0] 110.513877 s: [IPU1-0] 110.513938 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 110.513999 s: ******************** [IPU1-0] 110.514060 s: Local Link Latency : Avg = 3 us, Min = 0 us, Max = 31 us, [IPU1-0] 110.514182 s: Source to Link Latency : Avg = 162 us, Min = 152 us, Max = 213 us, [IPU1-0] 110.514304 s: [IPU1-0] 110.514396 s: [IPU1-0] 110.514457 s: ### CPU [ HOST], LinkID [ 49], [IPU1-0] 110.514518 s: [IPU1-0] 110.514548 s: [ ALG_EDGE_DETECT ] Link Statistics, [IPU1-0] 110.514640 s: ****************************** [IPU1-0] 110.514701 s: [IPU1-0] 110.514731 s: Elapsed time = 4442 msec [IPU1-0] 110.514792 s: [IPU1-0] 110.514823 s: New data Recv = 8.77 fps [IPU1-0] 110.514914 s: [IPU1-0] 110.514975 s: Input Statistics, [IPU1-0] 110.515036 s: [IPU1-0] 110.515067 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 110.515128 s: | FPS | FPS | FPS | FPS [IPU1-0] 110.515219 s: -------------------------------------------------- [IPU1-0] 110.515311 s: 0 | 15.53 0. 0 0. 0 15.30 [IPU1-0] 110.515433 s: [IPU1-0] 110.515463 s: Output Statistics, [IPU1-0] 110.515524 s: [IPU1-0] 110.515555 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 110.515646 s: | ID | FPS | FPS | FPS [IPU1-0] 110.515707 s: --------------------------------------------- [IPU1-0] 110.515768 s: 0 | 0 15.30 0. 0 0. 0 [IPU1-0] 110.515890 s: [IPU1-0] 110.515951 s: [ ALG_EDGE_DETECT ] LATENCY, [IPU1-0] 110.516012 s: ******************** [IPU1-0] 110.516073 s: Local Link Latency : Avg = 64654 us, Min = 244 us, Max = 78966 us, [IPU1-0] 110.516195 s: Source to Link Latency : Avg = 141970 us, Min = 457 us, Max = 205820 us, [IPU1-0] 110.516317 s: [IPU1-0] 110.516409 s: [IPU1-0] 110.516439 s: ### CPU [ HOST], LinkID [ 0], [IPU1-0] 110.516531 s: [IPU1-0] 110.516561 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 110.516622 s: ****************************** [IPU1-0] 110.516683 s: [IPU1-0] 110.516744 s: Elapsed time = 4444 msec [IPU1-0] 110.516805 s: [IPU1-0] 110.516836 s: New data Recv = 15.30 fps [IPU1-0] 110.517110 s: Release data Recv = 14.85 fps [IPU1-0] 110.517202 s: Driver/Notify Cb = 214.89 fps [IPU1-0] 110.517293 s: [IPU1-0] 110.517324 s: Input Statistics, [IPU1-0] 110.517385 s: [IPU1-0] 110.517415 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 110.517507 s: | FPS | FPS | FPS | FPS [IPU1-0] 110.517568 s: -------------------------------------------------- [IPU1-0] 110.517659 s: 0 | 15.30 0. 0 0. 0 15.30 [IPU1-0] 110.517781 s: [IPU1-0] 110.517812 s: Output Statistics, [IPU1-0] 110.517873 s: [IPU1-0] 110.517903 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 110.517995 s: | ID | FPS | FPS | FPS [IPU1-0] 110.518086 s: --------------------------------------------- [IPU1-0] 110.518147 s: 0 | 0 15.30 0. 0 0. 0 [IPU1-0] 110.518269 s: [IPU1-0] 110.518300 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 110.518361 s: ******************** [IPU1-0] 110.518422 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 30 us, [IPU1-0] 110.518544 s: Source to Link Latency : Avg = 141990 us, Min = 488 us, Max = 205850 us, [IPU1-0] 110.518666 s: [IPU1-0] 111.018025 s: [IPU1-0] 111.018086 s: ### CPU [IPU1-0], LinkID [ 10], [IPU1-0] 111.018178 s: [IPU1-0] 111.018208 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 111.018269 s: ****************************** [IPU1-0] 111.018330 s: [IPU1-0] 111.018391 s: Elapsed time = 4946 msec [IPU1-0] 111.018452 s: [IPU1-0] 111.018483 s: Get Full Buf Cb = 15.16 fps [IPU1-0] 111.018575 s: Put Empty Buf Cb = 14.75 fps [IPU1-0] 111.018636 s: Driver/Notify Cb = 14.96 fps [IPU1-0] 111.018727 s: [IPU1-0] 111.018758 s: Input Statistics, [IPU1-0] 111.018819 s: [IPU1-0] 111.018849 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 111.018941 s: | FPS | FPS | FPS | FPS [IPU1-0] 111.019032 s: -------------------------------------------------- [IPU1-0] 111.019124 s: 0 | 15.16 0. 0 0. 0 15.16 [IPU1-0] 111.019246 s: [IPU1-0] 111.019276 s: Output Statistics, [IPU1-0] 111.019337 s: [IPU1-0] 111.019368 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 111.019459 s: | ID | FPS | FPS | FPS [IPU1-0] 111.019520 s: --------------------------------------------- [IPU1-0] 111.019612 s: 0 | 0 15.16 0. 0 0. 0 [IPU1-0] 111.019703 s: [IPU1-0] 111.019764 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 111.019825 s: ******************** [IPU1-0] 111.019886 s: Local Link Latency : Avg = 19 us, Min = 0 us, Max = 31 us, [IPU1-0] 111.020008 s: Source to Link Latency : Avg = 144503 us, Min = 640 us, Max = 206003 us, [IPU1-0] 111.020130 s: [IPU1-0] 111.020222 s: [IPU1-0] 111.020252 s: ### CPU [IPU1-0], LinkID [ 71], [IPU1-0] 111.020344 s: [IPU1-0] 111.020374 s: [ DISPLAY ] Link Statistics, [IPU1-0] 111.020435 s: ****************************** [IPU1-0] 111.020496 s: [IPU1-0] 111.020557 s: Elapsed time = 4948 msec [IPU1-0] 111.020618 s: [IPU1-0] 111.020649 s: New data Recv = 14.95 fps [IPU1-0] 111.020740 s: Driver/Notify Cb = 60.2 fps [IPU1-0] 111.020801 s: [IPU1-0] 111.020832 s: Input Statistics, [IPU1-0] 111.020893 s: [IPU1-0] 111.020954 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 111.021015 s: | FPS | FPS | FPS | FPS [IPU1-0] 111.021106 s: -------------------------------------------------- [IPU1-0] 111.021167 s: 0 | 15.15 0. 0 0. 0 15.15 [IPU1-0] 111.021320 s: [IPU1-0] 111.021350 s: [ DISPLAY ] LATENCY, [IPU1-0] 111.021411 s: ******************** [IPU1-0] 111.021472 s: Local Link Latency : Avg = 36 us, Min = 30 us, Max = 91 us, [IPU1-0] 111.021564 s: Source to Link Latency : Avg = 144675 us, Min = 823 us, Max = 206186 us, [IPU1-0] 111.021686 s: [IPU1-0] 111.021747 s: Display UnderFlow Count = 0 [IPU1-0] 111.021808 s: [IPU1-0] 111.021838 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! [IPU1-0] 111.022235 s: [IPU1-0] 111.022265 s: ### CPU [IPU1-0], LinkID [ 72], [IPU1-0] 111.022357 s: [IPU1-0] 111.022387 s: [ DISPLAY ] Link Statistics, [IPU1-0] 111.022448 s: ****************************** [IPU1-0] 111.022509 s: [IPU1-0] 111.022570 s: Elapsed time = 5049 msec [IPU1-0] 111.022631 s: [IPU1-0] 111.022662 s: Driver/Notify Cb = 60.1 fps [IPU1-0] 111.022753 s: [IPU1-0] 111.022784 s: Input Statistics, [IPU1-0] 111.022845 s: [IPU1-0] 111.022875 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 111.022967 s: | FPS | FPS | FPS | FPS [IPU1-0] 111.023058 s: -------------------------------------------------- [IPU1-0] 111.023119 s: 0 | 0.19 0. 0 0. 0 0.19 [IPU1-0] 111.023272 s: [IPU1-0] 111.023302 s: [ DISPLAY ] LATENCY, [IPU1-0] 111.023363 s: ******************** [IPU1-0] 111.023607 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [IPU1-0] 111.023729 s: Source to Link Latency : Avg = 92509 us, Min = 92509 us, Max = 92509 us, [IPU1-0] 111.023851 s: [IPU1-0] 111.023882 s: Display UnderFlow Count = 0 [IPU1-0] 111.023973 s: [IPU1-0] 111.523973 s: [IPU1-0] + +Hi, This is a known limitation. While running the opencv usecase,A15 will be fully loaded. Regards, Anuj + diff --git a/data2/text/range/15001-20000/722326.txt b/data2/text/range/15001-20000/722326.txt new file mode 100644 index 0000000000000000000000000000000000000000..9abcfa373211d8d0af537c274f5914e554bd51dc --- /dev/null +++ b/data2/text/range/15001-20000/722326.txt @@ -0,0 +1,67 @@ +Ticket Name: TDA2: TIDL (Deep Learning) object detection use case + +Query Text: +Part Number: TDA2 Dear TI: From the VSDK tidl_OD (TI deep learning object detection) use case: Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) so the trained caffe model will be automatically distribute and run on these 4 EVEs, e.g. some layer running on EVE1, and some layers running on EVE2, etc? Am my understating correct? Is it recommend to use all of EVE (i.e. EVE1 to EVE4) to have maximum performance? In the conversion tool configuration text, we can use layersGroupId to define whether it is EVE or DSP to run the algorithm: for e.g. in the below from tidl_import_JDetNet_voc0712.txt: layersGroupId =   0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 0 If we have set the algorithm to be running on EVE ( in chains_tidlOD.txt), then "2" (DSP) we set in layersGroupId still get effect? And what is "0" means in layersGroupId referring to? Thanks and best regards He Wei + +Responses: +Hi, >> some layer running on EVE1, and some layers running on EVE2, etc? Am my understating correct? No, all the layers in on frame runs in one EVE core and next frame will run on next EVE core so the partition is across the frames. >> Is it recommend to use all of EVE (i.e. EVE1 to EVE4) to have maximum performance? Yes. >> for e.g. in the below from tidl_import_JDetNet_voc0712.txt: >>layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 0 The first layer and the last layers are just data layers, as there is no compute in them so no need to run them on either on EVE(1) or on DSP (2). So set them 0. Please refer to FAQ 21 and 22 in the TIDL user guide for more details about the usage of the "layersGroupId" parameter. Thanks, Praveen + +Thanks Praveen, 1. Actually in the chains_tidlOD.txt, the configuration as below: Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) so I don't need to set layersGroupId value in the txt configuration to EVE (1) or DSP(2) because I am only using EVE (1) as above setting. am I right? or even if I set to DSP(2), it could not take effect? 2. I have trained the attached deploy.prototxt and convert to TI net and param bin files then run on the board, but I got the assertion error as: Assertion @ Line: 231 in ipcOutLink_drv.c: pObj->createArgs.inQueParams.prevLinkQueId < pObj->prevLinkInfo.numQue : failed !!! Can you advise what could be wrong? (let me know if you need more files) Thanks and best regards He Wei 3060.deploy.zip + +1. Right. You no need to change anything to run on EVE. For running some layers on DSP, no changes needed in use case, you need to set that in the import config while generating the TI net and param bin files using layersGroupId parameter. 2. I would recommend you to run first these converted TI net and param bin files on the board using standalone TIDL executables (.out files) instead of VSDK. For this you can refer to section 3.3.4 (Building the Test Application Executable through GMAKE) in the TIDL userguide. Once you confirm that TIDL is working on your trained model on standalone, you can try this model on VSDK. Thanks, Praveen + +Dear Praveen,, Thanks for advise on using .out file to verify but I have the constraint here: beside need to install /build all the tool and code, i need to have jtag to run the simulator via CCS - I don't have this facility yet. Currently I mainly rely on the tidl_OD use case to test, Do you have any clue based on the deploy.prototxt I provided? Thanks and best regards He Wei + +Dear Praveen, When using tidl_model_import.out.exe do the conversion based on for the deploy.prototxt provided by TI: 1. I got the below log: Name of the Network : ssdJacintoNetV2_deploy Num Inputs : 1 Could not find detection_out Params Num of Layer Detected : 49 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , 0 , 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , 737280 , 2, TIDL_ConvolutionLayer , conv1a 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , 147456000 , Can you briefly explain what is each number referring to after each layer name? Is the 1st number referring to layersGroupId ? 2. I notice the layer detected in this case is 49, but layersGroupId defined only 45 value (0 1 ..2) in tidl_import_JDetNet_voc0712.txt, both value shall be same as 49, right? But if I change layersGroupId to 49 entries, I will not get the correct display output. Any opinion? 3. If I am using my prototxt file, I got this information: Unsuported Layer Type : Normalize !!!! assuming it as pass through layer So it will just pass through this layer but it shall not crash the code, right? 4. For camera live capture case, is the"sampleInData " must? sampleInData = "..\..\test\testvecs\input\trace_dump_0_768x320.y" Remark: After I remove this line, I won't see any object detection is running.. Thanks and best regards He Wei + +Hi He Wei, I would recommend you to go through FAQs section in the TIDL use guide, that will answer most of your questions. Please find my answers below, 1. No, first number will not refer to layersGroupId, Please refer to FAQ 14 for more information and also this import source code is pubic-ally available to the user, so you can refer the code where these prints are happening in the "tidl_caffeImport.cpp" file for further understanding. 2. NO, This is because of TIDL merges some layers processing to speed up the execution. Each layer in caffe prototxt does not one to one mapping on imported model. So changing layersGroupId to 49 entries will not have any impact. Please refer to FAQ 9 in the userguide for more details. 3. Code mat not crash but it may have effect on the final detection output. So better to avoid this while training or implement code in import tool for supporting this by referring to other layers. 4. SampleData is must for import tool, as I said earlier please take one frame from your training data and use it for sampleData, after successful running of import tool, we should verify that import tool output has the proper object detections. Running use case without getting detections in the import tool output, will not give the proper results. Thanks, Praveen + +Dear Praveen, Thanks a lot for the detail explanation, regarding 4. SampleData, so this is mainly for verification purpose? when running the tool on the Sampledata from TI example, the log as below, Do you have the description for the below result? What could be indication if the object being detected or not detected? Processing Frame Number : 0 Layer 1 : Out Q : 254 , TIDL_BatchNormLayer , PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 Layer 2 : Out Q : 6021 , TIDL_ConvolutionLayer, PASSED #MMACs = 147.46, 92.65, Sparsity : 37.17 Layer 3 : Out Q : 6168 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 53.33, Sparsity : 62.33 Layer 4 : Out Q : 11702 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 83.44, Sparsity : 70.53 Layer 5 : Out Q : 10597 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 66.11, Sparsity : 53.30 Layer 6 : Out Q : 13807 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 91.59, Sparsity : 67.65 Layer 7 : Out Q : 16861 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 57.32, Sparsity : 59.51 Layer 8 : Out Q : 18642 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 96.27, Sparsity : 66.00 Layer 9 : Out Q : 12901 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 52.28, Sparsity : 63.07 Layer 10 :TIDL_PoolingLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 Layer 11 : Out Q : 20342 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 76.31, Sparsity : 73.04 Layer 12 : Out Q : 5763 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 31.40, Sparsity : 77.82 Layer 13 :TIDL_PoolingLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 Layer 14 :TIDL_PoolingLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 Layer 15 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 16 : Out Q : 18571 , TIDL_ConvolutionLayer, PASSED #MMACs = 62.91, 62.57, Sparsity : 0.56 Layer 17 : Out Q : 13599 , TIDL_ConvolutionLayer, PASSED #MMACs = 31.46, 31.01, Sparsity : 1.42 Layer 18 : Out Q : 17793 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.86, 7.76, Sparsity : 1.27 Layer 19 : Out Q : 18851 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.36, 2.33, Sparsity : 1.16 Layer 20 : Out Q : 26620 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.79, 0.78, Sparsity : 1.22 Layer 21 : Out Q : 4438 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.93, 3.92, Sparsity : 0.20 Layer 22 :TIDL_FlattenLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 Layer 23 : Out Q : 3888 , TIDL_ConvolutionLayer, PASSED #MMACs = 20.64, 21.52, Sparsity : -4.22 Layer 24 :TIDL_FlattenLayer, PASSED #MMACs = 0.08, 0.08, Sparsity : 0.00 Layer 25 : Out Q : 8255 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.47, 1.47, Sparsity : 0.26 Layer 26 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 Layer 27 : Out Q : 2918 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.74, 7.82, Sparsity : -1.03 Layer 28 :TIDL_FlattenLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 Layer 29 : Out Q : 10803 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.39 Layer 30 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 31 : Out Q : 2794 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.94, 1.96, Sparsity : -1.26 Layer 32 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 Layer 33 : Out Q : 6802 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.11, 0.11, Sparsity : 2.73 Layer 34 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 35 : Out Q : 3384 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.58, 0.59, Sparsity : -1.28 Layer 36 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 37 : Out Q : 9125 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.98 Layer 38 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 39 : Out Q : 4334 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.13, 0.13, Sparsity : -4.39 Layer 40 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 41 : Out Q : 4455 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J Layer 42 : Out Q : 2805 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J Layer 43 : #MMACs = 0.00, 0.00, Sparsity : 0.00 End of config list found ! Thanks and best regards He Wei + +Hi He Wei, It is not straight forward from the log to get the defections, we need to check the import tool output (stats_tool_out.bin) for detection's using Visualisation tool. This tool will draw the boxes on the input using this output (stats_tool_out.bin) and input (SampleData). For visualisation tool code, please refer to below thread. e2e.ti.com/.../2502331 Thanks, Praveen + +Dear Praveen, Can you post the link e2e.ti.com/.../2502331 again? seems I can't click on the above.. Thanks and best regards He Wei + +Check this now.. e2e.ti.com/.../2502331 Thanks, Praveen + +Dear Praveen, What is the Visualisation tool? I got the stats_too_out.bin but I didn't see which tool is mentioned in that thread.. Thanks and best regards He Wei + +Hi He Wei, Tool is to draw the Boxes on the input using the output bin (stats_too_out.bin) file. Do not take "stats_too_out.bin" from that thread, please use stats_too_out.bin from your import tool output. To generate tool executable use "markBox.c" file from that thread and build it to get the tool executable that I was referring. Thanks, Praveen + +Dear Praveen, 1. Beside the caffe-jacinto provided by TI, Can we use official Caffe to train then converted and run on TDA2x? - )I had trained few model via official Caffe and able to convert the net and params to TI format, but when running on TI board, always got different kind of assertion errors but it is hard to debug what is the exact root cause) 2. Can caffe-jacinto support to build without GPU? i.e. CPU only Thanks and best regards He Wei + +Dear Praveen, Any update? + +Hi He Wei, 1. It should work, Can you share one prototxt and model to root cause the issue. 2. Yes. It should build. If you face any build issues you can post your questions in the git-hub for support. Thanks, Praveen + +Dear Praveen, 1. The prototxt and model we used are zip and attached. During the tool conversion in the testing sample input face, we had the error" "Error at line: 1585 : in file .\.\src\tidl_tb.c, of function : test_ti_dl_ivison" Then after deploying into TDA2X board, we has the assertion error. But this is quite hard to debug, Can you help to advise? let me know if you need more information, 2. If the official Cafe and tensorFollow can work, we will use that first. Thanks and best regard He Wei proto_model.zip + +Hi He Wei, "Error at line: 1585 : in file .\.\src\tidl_tb.c, of function : test_ti_dl_ivison" This above error is because of unsupported "Normalize" Layer in the prototxt. Please use "BatchNorm layer" instead of this "Normalize" layer and try . Thanks, Praveen + +Dear Praveen, Thanks a lot. After I change " Normalize" layer to ""BatchNorm" layer, there is no error during the tools conversion, then after imported on TI board, there is no video come out. The statics log is attached. Take note that: I change the setting as: keep_top_k: 20 confidence_threshold: 0.01 Can you advise what could be the "no video output" issue? Could be the processing too long? Thanks and best regards He Wei static_log.zip + +Hi He Wei, Only changing in the prototxt to BatchNorm layer, will not work. The model need to be re-trained again with BatchNorm layer. Thanks, Praveen + +Dear Praveen, Ok. But at least I shall see the video output? (even the algo may not working...) Thanks and best regards He Wei + +Hi He Wei, You may not see video output because the generated param.bin and net.bin files are not correct. Thanks, Praveen + +Dear Praveen, Thanks for confirmation. I would like to check if TI has some example trained model example in about Face detection? - We are currently working on Driving monitoring system based on TDA2x, would be very appropriate if you can have some relevant information. Thanks and best regards He Wei + +Hi He Wei, No we don’t have Face Detection example model. Thanks, Praveen + +Dear Praveen, Understood you have verified the Tensorflow 1.0: python "C:\Users\Kumar\AppData\Local\conda\conda\envs\tensorflow\Lib\site-packages\tensorflow\python\tools\freeze_graph.py" --input_meta_graph="keras_cifar10_model.ckpt.meta" --input_checkpoint="keras_cifar10_model.ckpt" --output_graph=keras_frozen.pb --output_node_names="conv2d_5/BiasAdd" --input_binary=true But the TensorFlow 1.0 is too old already but now there is no *.ckpt" output file from TensorFlow already, then if we run the above script without --input_checkpoint="keras_cifar10_model.ckpt", we will get output error. Any advise? Thanks and best regards He Wei + +Hi He Wei, We did tested with new TensorFlow version 1.8, all the commands given in that thread should work as is for new TensorFlow version. The ".ckpt" file will be generated part of the training. Thanks, Praveen + +Dear Praveen, Thanks for confirmation and we are verifying now and will confirm the result later on TensorFlow 1.8. Another question is on Caffe model training: we are trying to build up the caffe object detection tanning model based on "caffe-jacinto-models" example. We had our data set but not sure how to do the labeling for object detection. in example: rain_data="../../caffe-jacinto/examples/VOC0712/VOC0712_trainval_lmdb" test_data="../../caffe-jacinto/examples/VOC0712/VOC0712_test_lmdb" name_size_file="../../caffe-jacinto/data/VOC0712/test_name_size.txt" label_map_file="../../caffe-jacinto/data/VOC0712/labelmap_voc.prototxt" Can you share with us the above data sets? Also Can you share with us one example of label example on one Jpeg pic? Only label as: 0 - object 1, 1- object 2.. ? or location specific label is required? Thanks and best regards He Wei + +You can find a link to the following page at caffe-jacinto-models under: "Script for Training for sparse Object Detect network on the PASCAL VOC0712 dataset is provided. Inference script is also provided to test out the final model". https://github.com/tidsp/caffe-jacinto-models/blob/caffe-0.17/docs/VOC0712_ObjectDetect_README.md This will direct you to the following page. Or you can go there directly directly. It explains how to create the LMDB. https://github.com/weiliu89/caffe/blob/ssd/README.md + +Dear All, 1. Can I use caffe-ssd to trained the model instead of caffe-jacinto then convert to TI TDA2x format? ( Because I can't build caffe-jacinto-models successfully with CPU only) 2. For TensorFlow, we always got the below error when using tool doing the conversion: Op Type Shape is Not suported will be By passed Op Type StridedSlice is Not suported will be By passed Op Type Pack is Not suported will be By passed Can you advise? Thanks and best regards He Wei + +Hi, 1. Yes, you can use caffe-ssd to trained the model instead of caffe-jacinto, but make sure that the prototxt matches with caffe-jacinto prototxt. 2. This is may be because of we support only slim based TensorFlow models. Please refer to section 3.6.5 (Importing Tensorflow Models) in the user guide for more details. Thanks, Praveen + diff --git a/data2/text/range/15001-20000/724792.txt b/data2/text/range/15001-20000/724792.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c090e3f76b453f6636d60cda42e59c01ea98cf0 --- /dev/null +++ b/data2/text/range/15001-20000/724792.txt @@ -0,0 +1,401 @@ +Ticket Name: CCS/TDA2: unresolved symbol vcop_median3x3_char_cn, first referenced in ./vcop_median3x3_tb.obj + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\inc have vcop_median3x3_uchar_cn and vcop_median3x3_char_cn funcs i am building this sample (SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3 ) have this unresolved symbol vcop_median3x3_char_cn, first referenced in ./vcop_median3x3_tb.obj Problem THANKS! + +Responses: +Hello, I apologize but it seems like the file vcop_median3x3_cn.c is missing from the release. Please create a directory src_C at the same level as src_kernelC and add the attached file to it. regards, Victor vcop_median3x3_cn.c /* +* module : EVE SW +* +* module description : Software for EVE core targeted for imaging and vision +* applications +* +* Copyright (C) 2009-2017 Texas Instruments Incorporated - http://www.ti.com/ +* ALL RIGHTS RESERVED +* +*/ + + + +#include +#include +#include +#include + +#include "vcop_median3x3_cn.h" + +#define MAX(a, b) (a > b ? a : b) +#define MIN(a, b) (a < b ? a : b) + +void vcop_median3x3_uchar_cn +( + unsigned char *in, + unsigned char *out, + unsigned char *scratch1, + unsigned char *scratch2, + int w_input, + int w_out, + int w_compute, + int h_compute +) +{ + int i, j, m, n, k; + int c2l, c2m, c2h; + int in0, in1; + int tmp; + int min_of_max, max_of_min; + int min_in, max_in, med_in, med_max, med_max_nxt; + int min, med, max; + + int scratch_w = w_compute + 0; + + /*-----------------------------------------------------------------------*/ + /* Initialize the output to zeros at the beginning. */ + /*-----------------------------------------------------------------------*/ + + for ( i = 0; i < (int) h_compute * 3; i++) // lpend3 + { + for (j = 0; j < scratch_w; j++ ) //lpend4 + { + scratch1[( i * scratch_w) + j ] = 0; + } + } + + + for ( i = 0; i < w_compute; i++ ) + for ( j = 0; j < h_compute; j++ ) + out[j * w_compute + i ] = 0; + + /*-----------------------------------------------------------------------*/ + /* This is the first loop where sets of three consecutive rows are */ + /* re ordered as min, med and max rows. Thus, the output of this loop */ + /* has a height of 3x that of the input array. */ + /*-----------------------------------------------------------------------*/ + + for ( j = 0; j < (int) w_compute; j++) // lpend3 + { + /*-------------------------------------------------------------------*/ + /* Initialize the columns to get started. */ + /*-------------------------------------------------------------------*/ + + c2l = c2m = c2h = 0; + in0 = in1 = 0; + + m = 0; + for (i = 0; i < (int) h_compute; i++ ) //lpend4 + { + /*-----------------------------------------------------------*/ + /* Read in the latest column. */ + /*-----------------------------------------------------------*/ + + c2l = in0; + c2m = in1; + c2h = in[( ( i + 0 ) * (w_input + 0) ) + j ]; +#ifdef __PRINT__ + printf("column values read in are:\n %x, %x, %x\n", c2l, c2m, c2h); +#endif + + /*-----------------------------------------------------------*/ + /* Sort the latest column into low, middle and high values. */ + /*-----------------------------------------------------------*/ + + in0 = c2m; + in1 = c2h; + + if ( c2l > c2h ) { tmp = c2l; c2l = c2h; c2h = tmp; } + if ( c2l > c2m ) { tmp = c2l; c2l = c2m; c2m = tmp; } + if ( c2m > c2h ) { tmp = c2m; c2m = c2h; c2h = tmp; } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + m = (i * 3); + + scratch1[( (m + 0) * scratch_w) + j] = c2l; + scratch1[( (m + 1) * scratch_w) + j] = c2m; + scratch1[( (m + 2) * scratch_w) + j] = c2h; + + } + } + + /*-----------------------------------------------------------------------*/ + /* This is the second loop where the max_of_min, min_of_max and */ + /* med_of_med values are evaluated in the horizontal direction taking */ + /* three consecutive values at a time and moving the pointer by one each */ + /* time in the horizontal direction. */ + /*-----------------------------------------------------------------------*/ + + for ( i = 0; i < (int) (h_compute * 3); i+=3) // lpend3 + { + for (j = 0; j < (int) scratch_w; j++ ) //lpend4 + { + med_max = 0; + med_max_nxt = 0; + min_of_max = 255; + max_of_min = 0; + + for ( k = 0; k < 3; k++) + { + /*----------------------------------------------------------*/ + /* Read in the latest column and copy previous values as */ + /* current values. */ + /*----------------------------------------------------------*/ + + min_in = scratch1[( ( i + 6 + 0 ) * scratch_w) + j + k]; + med_in = scratch1[( ( i + 6 + 1 ) * scratch_w) + j + k]; + max_in = scratch1[( ( i + 6 + 2 ) * scratch_w) + j + k]; + + /*-----------------------------------------------------------*/ + /* Obtain the min_of_max, max_of_min and median of median */ + /* values, taking three at a time. */ + /*-----------------------------------------------------------*/ + + max_of_min = MAX(max_of_min, min_in); + min_of_max = MIN(min_of_max, max_in); + + + if (med_in > med_max) { tmp = med_max; med_max = med_in; med_in = tmp; } + if (med_in > med_max_nxt) { tmp = med_max_nxt; med_max_nxt = med_in; med_in = tmp; } + + } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + scratch2[( (i + 0) * scratch_w) + j] = max_of_min; + scratch2[( (i + 1) * scratch_w) + j] = med_max_nxt; + scratch2[( (i + 2) * scratch_w) + j] = min_of_max; + } + } + + /*-----------------------------------------------------------------------*/ + /* This is the third loop where the true median is computed from the */ + /* previous result by taking the max_of_min, med_of_med and min_of_max */ + /* values in the vertical order. The resultant array has the same height */ + /* as that of the input. */ + /*-----------------------------------------------------------------------*/ + + n = 0; + for ( i = 0; i < (int) h_compute * 3; i+=3) // lpend1 + { + for (j = 0; j < (int) w_compute; j++) //lpend2 + { + /*----------------------------------------------------------*/ + /* Read in the latest column. */ + /*----------------------------------------------------------*/ + + min = scratch2[( ( i + 0 ) * scratch_w) + j]; + med = scratch2[( ( i + 1 ) * scratch_w) + j]; + max = scratch2[( ( i + 2 ) * scratch_w) + j]; + + /*-----------------------------------------------------------*/ + /* Sort the latest column into low, middle and high values. */ + /*-----------------------------------------------------------*/ + + if ( min > max ) { tmp = min; min = max; max = tmp; } + if ( min > med ) { tmp = min; min = med; med = tmp; } + if ( med > max ) { tmp = med; med = max; max = tmp; } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + n = (int) (i/3); + out[( n * w_compute) + j] = med; + } + } + + return; +} + +void vcop_median3x3_char_cn +( + signed char *in, + signed char *out, + signed char *scratch1, + signed char *scratch2, + int w_input, + int w_out, + int w_compute, + int h_compute +) +{ + int i, j, m, n, k; + int c2l, c2m, c2h; + int in0, in1; + int tmp; + int min_of_max, max_of_min; + int min_in, max_in, med_in, med_max, med_max_nxt; + int min, med, max; + + int scratch_w = w_compute + 0; + + /*-----------------------------------------------------------------------*/ + /* Initialize the output to zeros at the beginning. */ + /*-----------------------------------------------------------------------*/ + + for ( i = 0; i < (int) h_compute * 3; i++) // lpend3 + { + for (j = 0; j < scratch_w; j++ ) //lpend4 + { + scratch1[( i * scratch_w) + j ] = 0; + } + } + + + for ( i = 0; i < w_compute; i++ ) + for ( j = 0; j < h_compute; j++ ) + out[j * w_compute + i ] = 0; + + /*-----------------------------------------------------------------------*/ + /* This is the first loop where sets of three consecutive rows are */ + /* re ordered as min, med and max rows. Thus, the output of this loop */ + /* has a height of 3x that of the input array. */ + /*-----------------------------------------------------------------------*/ + + for ( j = 0; j < (int) w_compute; j++) // lpend3 + { + + /*-------------------------------------------------------------------*/ + /* Initialize the columns to get started. */ + /*-------------------------------------------------------------------*/ + + c2l = c2m = c2h = 0; + in0 = in1 = 0; + + m = 0; + for (i = 0; i < (int) h_compute; i++ ) //lpend4 + { + /*-----------------------------------------------------------*/ + /* Read in the latest column. */ + /*-----------------------------------------------------------*/ + + c2l = in0; + c2m = in1; + c2h = in[( i * w_input ) + j ]; +#ifdef __PRINT__ + printf("column values read in are:\n %x, %x, %x\n", c2l, c2m, c2h); +#endif + + /*-----------------------------------------------------------*/ + /* Sort the latest column into low, middle and high values. */ + /*-----------------------------------------------------------*/ + + in0 = c2m; + in1 = c2h; + + if ( c2l > c2h ) { tmp = c2l; c2l = c2h; c2h = tmp; } + if ( c2l > c2m ) { tmp = c2l; c2l = c2m; c2m = tmp; } + if ( c2m > c2h ) { tmp = c2m; c2m = c2h; c2h = tmp; } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + m = (i * 3); + + scratch1[( (m + 0) * scratch_w) + j] = c2l; + scratch1[( (m + 1) * scratch_w) + j] = c2m; + scratch1[( (m + 2) * scratch_w) + j] = c2h; + + } + } + + /*-----------------------------------------------------------------------*/ + /* This is the second loop where the max_of_min, min_of_max and */ + /* med_of_med values are evaluated in the horizontal direction taking */ + /* three consecutive values at a time and moving the pointer by one each */ + /* time in the horizontal direction. */ + /*-----------------------------------------------------------------------*/ + + for ( i = 0; i < (int) (h_compute * 3); i+=3) // lpend3 + { + for (j = 0; j < (int) scratch_w; j++ ) //lpend4 + { + med_max = -128; + med_max_nxt = -128; + min_of_max = 127; + max_of_min = -128; + + for ( k = 0; k < 3; k++) + { + + /*----------------------------------------------------------*/ + /* Read in the latest column and copy previous values as */ + /* current values. */ + /*----------------------------------------------------------*/ + + min_in = scratch1[( ( i + 6 + 0 ) * scratch_w) + j + k]; + med_in = scratch1[( ( i + 6 + 1 ) * scratch_w) + j + k]; + max_in = scratch1[( ( i + 6 + 2 ) * scratch_w) + j + k]; + + /*-----------------------------------------------------------*/ + /* Obtain the min_of_max, max_of_min and median of median */ + /* values, taking three at a time. */ + /*-----------------------------------------------------------*/ + + max_of_min = MAX(max_of_min, min_in); + min_of_max = MIN(min_of_max, max_in); + + + if (med_in > med_max) { tmp = med_max; med_max = med_in; med_in = tmp; } + if (med_in > med_max_nxt) { tmp = med_max_nxt; med_max_nxt = med_in; med_in = tmp; } + + } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + scratch2[( (i + 0) * scratch_w) + j] = max_of_min; + scratch2[( (i + 1) * scratch_w) + j] = med_max_nxt; + scratch2[( (i + 2) * scratch_w) + j] = min_of_max; + } + } + + /*-----------------------------------------------------------------------*/ + /* This is the third loop where the true median is computed from the */ + /* previous result by taking the max_of_min, med_of_med and min_of_max */ + /* values in the vertical order. The resultant array has the same height */ + /* as that of the input. */ + /*-----------------------------------------------------------------------*/ + + n = 0; + for ( i = 0; i < (int) h_compute * 3; i+=3) // lpend1 + { + for (j = 0; j < (int) w_compute; j++) //lpend2 + { + /*----------------------------------------------------------*/ + /* Read in the latest column. */ + /*----------------------------------------------------------*/ + + min = scratch2[( ( i + 0 ) * scratch_w) + j]; + med = scratch2[( ( i + 1 ) * scratch_w) + j]; + max = scratch2[( ( i + 2 ) * scratch_w) + j]; + + /*-----------------------------------------------------------*/ + /* Sort the latest column into low, middle and high values. */ + /*-----------------------------------------------------------*/ + + if ( min > max ) { tmp = min; min = max; max = tmp; } + if ( min > med ) { tmp = min; min = med; med = tmp; } + if ( med > max ) { tmp = med; med = max; max = tmp; } + + /*-----------------------------------------------------------*/ + /* Write the values out. */ + /*-----------------------------------------------------------*/ + + n = (int) (i/3); + out[( n * w_compute) + j] = med; + } + } + + return; +} + +Hi Victor thanks! but i think samples in SDK_VISION_03_04_00_00\ti_components\algorithms\eve_sw_01_19_00_00 all miss the .c file . can you share them at a site we can download if need. shuai + +Shuai, You already asked a similar question in another thread and we have already mentioned that we don't release natural C. Please refer the following thread to see our answer https://e2e.ti.com/support/arm/automotive_processors/f/1021/p/723811/2670469#2670469 Regards, Anshu + diff --git a/data2/text/range/15001-20000/732089.txt b/data2/text/range/15001-20000/732089.txt new file mode 100644 index 0000000000000000000000000000000000000000..1c7b434d5135021380ac65af9c8c612b21397da0 --- /dev/null +++ b/data2/text/range/15001-20000/732089.txt @@ -0,0 +1,169 @@ +Ticket Name: TDA2: New model runs well in tidl_model_import.out.exe but abnormally in CCS and EVM + +Query Text: +Part Number: TDA2 Hi, I train a new model, and runs well in in tidl_model_import.out.exe, and the result is shown in attachment. Then I run the model in EVM TIDL_OD usecase, it comes out the unexpected result.(show in attachment). At last, I run the model in CCS, and also got unexpected result. I check the trace_dump files between CCS and tidl_model_import.out.exe, and all layers are unmatched except input data layer. So could you please help to check my issue. and if prototxt and caffemodel is needed, please provide email. issueTIDL.rar Thanks Jerry + +Responses: +Hi Jerry, What is the TIDL release version you are using? Please share the all the dumped outputs (traces) of import and CCS for checking the issue Thanks, Praveen + +Hi Praveen, TIDL: REL.TIDL.01.01.01.00 CCS: v8.1 VISIONSDK: 3.04 Thanks, Jerry 6131.issueTIDL.rar + +Hi Praveen, I try simulator my model in PC with eve_test_dl_algo.exe, and get the following results. 1 DenseConv may be failed when output channels less than 48, or stride=2, or dilate=2 as TIDL has these limits 2 But why sparseConv failed at the following situations? PC_simulator.log Layer 1 : Out Q : 12122 , TIDL_BatchNormLayer , PASSED #MMACs = 0.50, 0.50, Sparsity : 0.00 + Layer 2 : Out Q : 16454 , TIDL_BatchNormLayer , PASSED #MMACs = 0.50, 0.50, Sparsity : 0.00 + Layer 3 : Out Q : 44315 , TIDL_ConvolutionLayer, PASSED #MMACs = 35.83, 30.19, Sparsity : 15.74 + Layer 4 : Out Q : 29847 , TIDL_ConvolutionLayer, PASSED #MMACs = 42.47, 42.47, Sparsity : 0.00 + Layer 5 : Out Q : 18574 , TIDL_ConvolutionLayer, PASSED #MMACs = 11.94, 11.94, Sparsity : 0.00 + Layer 6 : Out Q : 10320 , TIDL_ConvolutionLayer, PASSED #MMACs = 84.93, 84.93, Sparsity : 0.00 + Layer 7 : Out Q : 20910 , TIDL_ConvolutionLayer, PASSED #MMACs = 23.89, 23.89, Sparsity : 0.00 + Layer 8 :TIDL_PoolingLayer, PASSED #MMACs = 0.66, 0.66, Sparsity : 0.00 + Layer 9 : Out Q : 30028 , TIDL_ConvolutionLayer, PASSED #MMACs = 21.23, 21.23, Sparsity : 0.00 + Layer 10 : Out Q : 33360 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.99, 2.99, Sparsity : 0.00 + Layer 11 : Out Q : 20992 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 12 : Out Q : 30337 , TIDL_ConvolutionLayer, PASSED #MMACs = 31.85, 31.85, Sparsity : 0.00 + Layer 13 : Out Q : 29768 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.99, 2.99, Sparsity : 0.00 + Layer 14 : Out Q : 21075 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 15 : Out Q : 30007 , TIDL_ConvolutionLayer, PASSED #MMACs = 42.47, 42.47, Sparsity : 0.00 + Layer 16 : Out Q : 29477 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.99, 2.99, Sparsity : 0.00 + Layer 17 : Out Q : 21158 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 18 : Out Q : 61360 , TIDL_ConvolutionLayer, PASSED #MMACs = 212.34, 212.34, Sparsity : 0.00 + Layer 19 :TIDL_PoolingLayer, PASSED #MMACs = 0.33, 0.33, Sparsity : 0.00 + Layer 20 : Out Q : 39417 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.93, 15.93, Sparsity : 0.00 + Layer 21 : Out Q : 46384 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.12, 1.12, Sparsity : 0.00 + Layer 22 : Out Q : 46567 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 23 : Out Q : 42536 , TIDL_ConvolutionLayer, PASSED #MMACs = 21.90, 21.90, Sparsity : 0.00 + Layer 24 : Out Q : 44216 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.12, 1.12, Sparsity : 0.00 + Layer 25 : Out Q : 44390 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 26 : Out Q : 40258 , TIDL_ConvolutionLayer, PASSED #MMACs = 27.87, 27.87, Sparsity : 0.00 + Layer 27 : Out Q : 52020 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.12, 1.12, Sparsity : 0.00 + Layer 28 : Out Q : 44565 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 29 : Out Q : 41968 , TIDL_ConvolutionLayer, PASSED #MMACs = 33.84, 33.84, Sparsity : 0.00 + Layer 30 : Out Q : 32649 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.12, 1.12, Sparsity : 0.00 + Layer 31 : Out Q : 32778 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 32 : Out Q : 41851 , TIDL_ConvolutionLayer, PASSED #MMACs = 39.81, 39.81, Sparsity : 0.00 + Layer 33 : Out Q : 41670 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.12, 1.12, Sparsity : 0.00 + Layer 34 : Out Q : 32907 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 35 : Out Q : 55923 , TIDL_ConvolutionLayer, PASSED #MMACs = 122.09, 122.09, Sparsity : 0.00 + Layer 36 :TIDL_PoolingLayer, PASSED #MMACs = 0.08, 0.08, Sparsity : 0.00 + Layer 37 : Out Q : 33730 , TIDL_ConvolutionLayer, PASSED #MMACs = 5.31, 5.31, Sparsity : 0.00 + Layer 38 : Out Q : 51053 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 39 : Out Q : 51254 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 40 : Out Q : 39601 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.96, 7.96, Sparsity : 0.00 + Layer 41 : Out Q : 50233 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 42 : Out Q : 50431 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 43 : Out Q : 29201 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.62, 10.62, Sparsity : 0.00 + Layer 44 : Out Q : 35166 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 45 : Out Q : 35304 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 46 : Out Q : 30263 , TIDL_ConvolutionLayer, PASSED #MMACs = 13.27, 13.27, Sparsity : 0.00 + Layer 47 : Out Q : 31795 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 48 : Out Q : 31920 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 49 : Out Q : 29030 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.93, 15.93, Sparsity : 0.00 + Layer 50 : Out Q : 34302 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 51 : Out Q : 32046 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 52 : Out Q : 31669 , TIDL_ConvolutionLayer, PASSED #MMACs = 18.58, 18.58, Sparsity : 0.00 + Layer 53 : Out Q : 33290 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 54 : Out Q : 32172 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 55 : Out Q : 37877 , TIDL_ConvolutionLayer, PASSED #MMACs = 42.47, 42.47, Sparsity : 0.00 + Layer 56 : Out Q : 30049 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.96, 7.96, Sparsity : 0.00 + Layer 57 : Out Q : 40896 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.56, 0.56, Sparsity : 0.00 + Layer 58 : Out Q : 38026 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 59 : Out Q : 23376 , TIDL_ConvolutionLayer, PASSED #MMACs = 13.93, 13.93, Sparsity : 0.00 + Layer 60 : Out Q : 40974 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.56, 0.56, Sparsity : 0.00 + Layer 61 : Out Q : 38176 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 62 : Out Q : 25187 , TIDL_ConvolutionLayer, PASSED #MMACs = 19.91, 19.91, Sparsity : 0.00 + Layer 63 : Out Q : 34145 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.56, 0.56, Sparsity : 0.00 + Layer 64 : Out Q : 34279 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 65 : Out Q : 29118 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.88, 25.88, Sparsity : 0.00 + Layer 66 : Out Q : 35737 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.56, 0.56, Sparsity : 0.00 + Layer 67 : Out Q : 34414 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 68 : Out Q : 14894 , TIDL_ConvolutionLayer, PASSED #MMACs = 42.47, 42.47, Sparsity : 0.00 + Layer 69 :TIDL_PoolingLayer, PASSED #MMACs = 0.08, 0.08, Sparsity : 0.00 + Layer 70 : Out Q : 27848 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.62, 10.62, Sparsity : 0.00 + Layer 71 : Out Q : 14953 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 72 : Out Q : 23194 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.62, 10.62, Sparsity : 0.00 + Layer 73 : Out Q : 44331 , Failing at 0, 0, 0, 0 ref,out = 1,255 +TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.19, 0.19, Sparsity : 0.00 + Layer 74 : Out Q : 18410 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.65, 2.65, Sparsity : 0.00 + Layer 75 :TIDL_PoolingLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 76 : Out Q : 13003 , TIDL_ConvolutionLayer, PASSED #MMACs = 5.31, 5.31, Sparsity : 0.00 + Layer 77 : Out Q : 13054 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 78 : Out Q : 21503 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.65, 2.65, Sparsity : 0.00 + Layer 79 : Out Q : 52782 , Failing at 0, 0, 0, 4 ref,out = 26,0 +TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.05, 0.05, Sparsity : 0.00 + Layer 80 : Out Q : 9095 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 81 :TIDL_PoolingLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 82 : Out Q : 9817 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.47, 1.47, Sparsity : 0.00 + Layer 83 : Out Q : 9131 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 84 : Out Q : 37538 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 85 : Out Q : 87882 , Failing at 0, 0, 0, 1 ref,out = 0,255 +TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 86 : Out Q : 29973 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.25, 0.25, Sparsity : 0.00 + Layer 87 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 88 : Out Q : 16981 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.49, 0.49, Sparsity : 0.00 + Layer 89 : Out Q : 17048 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 90 : Out Q : 65965 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.25, 0.25, Sparsity : 0.00 + Layer 91 : Out Q : 111900 , Failing at 0, 0, 0, 0 ref,out = 47,255 +TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 92 : Out Q : 53030 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 93 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 94 : Out Q : 44532 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.20, 0.20, Sparsity : 0.00 + Layer 95 : Out Q : 44707 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 96 : Out Q : 86672 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 97 : Out Q : 130284 , Failing at 0, 0, 0, 0 ref,out = 40,255 +TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 98 : Out Q : 80025 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 99 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 100 : Out Q : 56297 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.07, 0.07, Sparsity : 0.00 + Layer 101 : Out Q : 56519 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 102 : Out Q : 7137 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.65, 2.65, Sparsity : 0.00 + Layer 103 : Out Q : 3821 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 104 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 105 : Out Q : 10029 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.65, 2.65, Sparsity : 0.00 + Layer 106 : Out Q : 5602 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 107 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 108 : Out Q : 7778 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.00, 1.00, Sparsity : 0.00 + Layer 109 : Out Q : 10903 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 110 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 111 : Out Q : 5431 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.00, 1.00, Sparsity : 0.00 + Layer 112 : Out Q : 4815 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 113 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 114 : Out Q : 7993 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.28, 0.28, Sparsity : 0.00 + Layer 115 : Out Q : 10285 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 116 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 117 : Out Q : 5102 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.28, 0.28, Sparsity : 0.00 + Layer 118 : Out Q : 4925 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 119 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 120 : Out Q : 9731 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 121 : Out Q : 10006 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 122 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 123 : Out Q : 7466 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 124 : Out Q : 6931 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 125 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 126 : Out Q : 16688 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 127 : Out Q : 14009 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 128 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 129 : Out Q : 12677 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 130 : Out Q : 8489 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 131 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 132 : Out Q : 33500 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 133 : Out Q : 17943 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 134 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 135 : Out Q : 12216 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 136 : Out Q : 7388 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 137 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 138 : Out Q : 3836 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 139 : Out Q : 4834 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -nan(ind) + Layer 140 : #MMACs = 0.00, 0.00, Sparsity : 0.00 +End of config list found ! + +Hi Jerry, For these conv layers, the number of groups are equal to number of output channels and for this case we had a separate flow(depth wise separable conv flow) and in this flow there is no support for dilation >1, so for these conv layers you can have dilation = 1 or decrease number of groups so that it will not take this flow. Thanks, Praveen + +Hi Praveen, 1. In depthwise separable flow, both stride>1 and dilation>1 are not supported, right? 2. If I want to stride>1 and dilation>1 are supported in my network, the conv layer must run in sparse conv flow(conv groups != output channels and convKernelType=0). Is it riht? Thanks for your help. Best regards, Jerry + +Hi Jerry, 1. No, only dilation>1 is not supported, but stride = 1 or 2 is supported. 2. Yes, you are right. Thanks, Praveen + +Hi Praveen, I will try it after the long vocation. Thank you very much. Best regards, Jerry + +Hi Praveen, I have tried the following cases: 1. group = num_out, stride=1, dilation=1, conv2dKernelType=0 => fail 2. group = num_out, stride=1, dilation=1, conv2dKernelType=1 => pass 3. group = num_out, stride=2, dilation=1, conv2dKernelType=0 => fail 4. group = num_out, stride=2, dilation=1, conv2dKernelType=1 => fail So If conv layer works well in depthwise separable flow => group=num_out, stride=1, conv2dKernelType=1 ? Best regards, Jerry + +Hi Jerry, Yes. Thanks, Praveen + diff --git a/data2/text/range/15001-20000/744062.txt b/data2/text/range/15001-20000/744062.txt new file mode 100644 index 0000000000000000000000000000000000000000..7d2d2543699e959d9f42500c3ca82ab95d5f3b23 --- /dev/null +++ b/data2/text/range/15001-20000/744062.txt @@ -0,0 +1,38 @@ +Ticket Name: RTOS/TDA2: TDA2xx .hdr file and H264 issue + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, when I save video (MJPEG) in SD card, it also creates a .hdr file. what's it's purpose? when I save video in H264, the system would hang. below are the error message, please help to give me some advise. Thanks!! ********************************************************************************************************************************************************************************************* [IPU1-0] 25.694442 s: ENCODE: Create in progress ... !!! [IPU1-0] 25.815775 s: ENCODE: Creating CH0 of 768 x 320, pitch = (768, 768) [1] [0], bitrate = 0 Kbps ... [IPU1-0] 25.838681 s: ENCODE: ERROR: ALGCONTROL FAILED CMD=0x00000006 (status=ffffffff) !!! [IPU1-0] 25.838833 s: ENCODE: ERROR: ALGCONTROL FAILED CMD=0x00000003 (status=ffffffff) !!! [IPU1-0] 25.838925 s: LINK ERR::linkID:50::channelID:0::errorCode:-5::FileName:iva_enc/encLink_h264.c::linuNum:1178::errorCondition:(algStatus == XDM_EOK) [IPU1-0] 25.839077 s: ENCODE: ERROR: ALGCONTROL FAILED CMD=0x00000001 (status=ffffffff) !!! [IPU1-0] 25.839169 s: LINK ERR::linkID:50::channelID:0::errorCode:-5::FileName:iva_enc/encLink_h264.c::linuNum:1186::errorCondition:(algStatus == XDM_EOK) [IPU1-0] 25.839352 s: ENCODE: ERROR: ALGCONTROL FAILED CMD=0x00000000 (status=ffffffff) !!! [IPU1-0] 25.839443 s: ENCODE: ERROR: ALGCONTROL FAILED CMD=0x00000005 (status=ffffffff) !!! [IPU1-0] 25.839535 s: LINK ERR::linkID:50::channelID:0::errorCode:-8::FileName:iva_enc/encLink_h264.c::linuNum:1202::errorCondition:(algStatus == XDM_EOK) [IPU1-0] 25.839748 s: ENCODE: All CH Create ... DONE !!! [IPU1-0] 25.841060 s: ENCODE: Create ... DONE !!! ********************************************************************************************************************************************************************************************** + +Responses: +Hi, .hdr file contains the size of each frame. Even while reading any bitstream data you need to provide both the input 1 input data file 2 input .hdr/index file. About the H264 hang issue, which usecase are you trying to run and have you made any changes in create params ? Regards, Anuj + +Hi, I create a test usecase base on "tidl_OD_Camers". here is the test case .txt ********************************************************** UseCase: chains_tidlOD_Camera_test Capture -> VPE -> Dup Dup -> Encode -> Null Dup -> Merge Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) //Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) Alg_tidl_Eve3 (EVE3) -> Merge_OD (DSP1) /Alg_tidl_Eve4 (EVE4) -> Merge_OD (DSP1) Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge Merge -> Sync -> Alg_ObjectDraw -> Display //GrpxSrc -> Display_Grpx ***************************************************************** create params set as below ***************************************************************************************************************************** pUcObj->NullPrm.dumpDataType = NULL_LINK_COPY_TYPE_FILE; sprintf(pUcObj->NullPrm.nameDataFile[0], "test.h264"); pUcObj->EncodePrm.chCreateParams[0].format = SYSTEM_IVIDEO_H264MP; ****************************************************************************************************************************** Thanks! + +Hi, does there has any update? or need some more information? Thanks! + +Hi, Please try 1st a simple usecase with capture -> encode -> null with the same params. and try to debug their. Regards, Anuj + +Hi, I followed your suggestion, and got the same error messages. Thanks! + +Hi, Please try to run below usecase from usecase menu after bootup. For BIOS first press 1 then press a. For Linux first press 1 and then press 2. Regards, Anuj + +Hi, 'a' is an unsupported option!! press 1 to run "Chains_menuSingleCameraRun()" right? but there is no option in this function. Thanks~ + +Hi, I am asking to press 1 on the usecase menu which we get after board boot up. After pressing 1 you will get again a menu there you have to press a. Regards, Anuj + +Hi, after boot up, press 1 is to run "Single Camera Usecases" after pressing 1, I got no menu, only one option x. and got "Unsupported option 'a'. Please try again" when pressing a. ********************************************************* [IPU1-0] Single Camera Usecases [IPU1-0] ------------------------ [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 237.657018 s: [IPU1-0] 237.657079 s: Unsupported option 'a'. Please try again [IPU1-0] 237.657231 s: [IPU1-0] [IPU1-0] Single Camera Usecases [IPU1-0] ------------------------ [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] ********************************************************** Thanks~~ + +Hi, Have you diabled the usecase from uc_cfg.mk? Please enable all the usecase and try option 1 and then a. Assuming you are running bios on A15 not linux. Regards, Anuj + +Hi, Its benn very long since any update on this issue, Is it still open? Regards, Anuj + +Hi, I am running RTOS on M4, chains_main_bios_vision.c is my menu file. and option 1 in chains_main_bios_vision.c is "Chains_menuSingleCameraRun()" below is the context of "Chains_menuSingleCameraRun()", and without option a. ####################################################################### Void Chains_menuSingleCameraRun() { char ch; Bool done = FALSE; while(!done) { Vps_printf(gChains_menuSingleCameraUsecases); ch = Chains_readChar(); Vps_printf(" \r\n"); switch(ch) { #ifdef UC_vip_single_cam_sgx_display case '1': chains_vipSingleCam_SgxDisplay(&gChains_usecaseCfg); break; #endif #ifndef IPUMM_INCLUDE #ifdef UC_vip_single_cam_enc_dec_sgx_display case '2': chains_vipSingleCam_Enc_Dec_SgxDisplay(&gChains_usecaseCfg); break; #endif #endif #ifdef UC_vip_single_cam_framecopyEve_sgx_display case '3': gChains_usecaseCfg.algProcId = SYSTEM_PROC_EVE1; chains_vipSingleCamFrmcpyEve_SgxDisplay(&gChains_usecaseCfg); break; #endif #ifdef FPD_DISPLAY #ifdef UC_vip_single_cam_dualSgxDisplay case '4': chains_vipSingleCam_SGX_IpuDualDisplay(&gChains_usecaseCfg); break; #endif #endif #ifndef IPUMM_INCLUDE #ifdef UC_null_src_decode_display case '5': gChains_usecaseCfg.numLvdsCh = 1; Chains_nullSrc_DecodeDisplay(&gChains_usecaseCfg); break; #endif #endif #ifdef UC_vip_single_cam_framecopy_sgx_display case '6': chains_vipSingleCamFrameCopySgxDisplay(&gChains_usecaseCfg); break; #endif #ifdef UC_vip_single_cam_connectorLinksA15_sgx_display case '7': chains_vipSingleCamConnectorLinksA15SgxDisplay(&gChains_usecaseCfg); break; #endif #ifdef UC_disp_dist_src_display case '8': Chains_dispDistSrc_Display(&gChains_usecaseCfg); break; #endif case 'x': case 'X': done = TRUE; break; default: Vps_printf(" Unsupported option '%c'. Please try again\n", ch); break; } } } ############################################################################### do I misunderstand something? Thanks~ + +Hi, Which version of VSDK are you using? My Chains_menuSingleCameraRun is like below Void Chains_menuSingleCameraRun() { Chains_Ctrl usecaseCfg; char ch; Bool done = FALSE; while(!done) { Chains_statCollectorReset(); Vps_printf(gChains_menuSingleCameraUsecases); ch = Chains_readChar(); Vps_printf(" \r\n"); switch(ch) { #ifdef UC_vip_single_cam_view case '1': Chains_vipSingleCam_Display(&gChains_usecaseCfg); break; #endif #ifdef UC_vip_single_cam_frame_copy case '2': gChains_usecaseCfg.algProcId = SYSTEM_PROC_DSP1; Chains_vipSingleCameraFrameCopy(&gChains_usecaseCfg); break; #endif #ifdef UC_vip_single_cam_frame_copy case '3': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_EVE1; Chains_vipSingleCameraFrameCopy(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_frame_copy case '4': if(Bsp_platformIsTda2xxFamilyBuild()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_A15_0; Chains_vipSingleCameraFrameCopy(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_edge_detection case '5': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_EVE1; Chains_vipSingleCameraEdgeDetection(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_dense_optical_flow case '6': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { gChains_usecaseCfg.numLvdsCh = 1; usecaseCfg = gChains_usecaseCfg; Chains_vipSingleCameraDenseOpticalFlow(&usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_sparse_optical_flow case '7': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { Chains_vipSingleCameraSparseOpticalFlow(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_subframe_copy case '8': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { Chains_vipSingleCameraSubFrameCopy(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_view_dsswb case '9': if(Bsp_platformIsTda3xxFamilyBuild()) { Chains_vipSingleCam_DisplayWbCrc(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_view_encdec case 'a': case 'A': if(Bsp_platformIsTda2xxFamilyBuild()) { Chains_vipSingleCam_EncDec_Display(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_lane_detection case 'b': case 'B': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { usecaseCfg = gChains_usecaseCfg; if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } Chains_vipSingleCameraLaneDetect(&gChains_usecaseCfg); /* No HDMI input for monstercam */ } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_sfm case 'c': case 'C': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { usecaseCfg = gChains_usecaseCfg; if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } Chains_vipSingleCameraSfm(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_tlr case 'd': case 'D': usecaseCfg = gChains_usecaseCfg; if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } Chains_vipSingleCameraTlr(&gChains_usecaseCfg); break; #endif #ifdef UC_vip_single_cam_object_detection2 case 'e': case 'E': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { usecaseCfg = gChains_usecaseCfg; #if 0 if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } #endif Chains_vipSingleCameraObjectDetect2Tda3xx(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_analytics2 case 'f': case 'F': if(BSP_PLATFORM_SOC_ID_TDA2EX != Bsp_platformGetSocId()) { usecaseCfg = gChains_usecaseCfg; if( usecaseCfg.captureSrc!= CHAINS_CAPTURE_SRC_HDMI_1080P ) { Vps_printf(" ### ONLY HDMI 1080p60 input supported for this usecase "); Vps_printf(" ### Please choose HDMI 1080p60 Capture Source using option 's'\n"); break; } Chains_vipSingleCameraAnalytics2(&gChains_usecaseCfg); } else { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } break; #endif #ifdef UC_vip_single_cam_frame_copy_safety case 'G': case 'g': #ifdef ECC_FFI_INCLUDE gChains_usecaseCfg.algProcId = SYSTEM_PROC_DSP1; Chains_vipSingleCameraSafeFrameCopy(&gChains_usecaseCfg); #else Vps_printf(" ### ECC_FFI_INCLUDE is not enabled!!!! \n"); #endif break; #endif #ifdef UC_vip_single_cam_frame_copy_safety case 'h': case 'H': #ifdef ECC_FFI_INCLUDE if(BSP_PLATFORM_SOC_ID_TDA3XX == Bsp_platformGetSocId()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_EVE1; Chains_vipSingleCameraSafeFrameCopy(&gChains_usecaseCfg); } else if(BSP_PLATFORM_SOC_ID_TDA2EX == Bsp_platformGetSocId()) { Vps_printf(" ### TDA2Ex do not have EVE core, usecase with EVE is not supported \n"); } else { Vps_printf(" ### FFI on EVE is supported in VisionSDK only on TDA3x\n"); } #else Vps_printf(" ### ECC_FFI_INCLUDE is not enabled!!!! \n"); #endif break; #endif #ifdef UC_vip_single_cam_frame_copy_safety case 'i': case 'I': if(Bsp_platformIsTda2xxFamilyBuild()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_A15_0; Chains_vipSingleCameraSafeFrameCopy(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_opencvcanny case 'j': case 'J': if(Bsp_platformIsTda2xxFamilyBuild()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_A15_0; Chains_vipSingleCamOpenCVCanny(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_opencvopencldilation case 'k': case 'K': if(Bsp_platformIsTda2xxFamilyBuild()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_A15_0; Chains_vipSingleCamOpenCVOpenCLDilation(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_display_metadata case 'l': case 'L': { Chains_vipSingleCam_Display_Metadata(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_opencvtests case 'm': case 'M': if(Bsp_platformIsTda2xxFamilyBuild()) { gChains_usecaseCfg.algProcId = SYSTEM_PROC_A15_0; Chains_vipSingleCamOpenCVTests(&gChains_usecaseCfg); } #endif #ifdef UC_null_src_dec_display case 'n': case 'N': { gChains_usecaseCfg.numLvdsCh = 1; Chains_nullSrc_DecodeDisplay(&gChains_usecaseCfg); } break; #endif #ifdef UC_vip_single_cam_view_autosar_app case 'o': case 'O': Chains_vipSingleCam_Display_Autosar(&gChains_usecaseCfg); break; #endif case 'x': case 'X': done = TRUE; usecaseCfg = usecaseCfg; /* to avoid unused variable warning */ break; default: Vps_printf(" Unsupported option '%c'. Please try again\n", ch); break; } } } Regards, Anuj + +Hi, my VSDK version is 03_04, I also check VSDK 03_05, it is the same as 03_04 Thanks~~ + +Hi, In VSDK 3.04 and 3.05 and 3.06 all contain the same implementation of Chains_menuSingleCameraRun() 3.05 and 3.06 has a addition of a usecase with option o. But all will have the option a. and when you run you will get a usecase menu like below. [IPU1-0] Single Camera Usecases [IPU1-0] ------------------------ [IPU1-0] 1: 1CH VIP capture + Display [IPU1-0] 2: 1CH VIP capture + Alg Frame Copy (DSP1) + Display [IPU1-0] 3: 1CH VIP capture + Alg Frame Copy (EVE1) + Display [IPU1-0] 4: 1CH VIP capture + Alg Frame Copy (A15) + Display [IPU1-0] 5: 1CH VIP capture + Edge Detect (EVE1) + Display [IPU1-0] 6: 1CH VIP capture + Dense Optical Flow (EVEx) + Display (HDMI) [IPU1-0] 7: 1CH VIP capture (HDMI) + Sparse Optical Flow (EVE1) + Display [IPU1-0] 8: 1CH VIP capture + Alg Subframe Copy (EVE1) + Display [IPU1-0] a: 1CH VIP capture + ENC + DEC + VPE + Display [IPU1-0] b: 1CH VIP capture (HDMI) + Lane Detect (DSP1 + EVE1) + Display [IPU1-0] c: 1CH VIP capture (HDMI) + SOF (EVE1) + SFM (DSP1) + Display [IPU1-0] d: 1CH VIP capture (HDMI) + Traffic Light Recognition (TLR) (DSP1) + Display [IPU1-0] e: 1CH VIP capture (HDMI) + Pedestrian, Traffic Sign, Vehicle Detect 2 (EVE1 + DSP1) + Display [IPU1-0] f: 1CH VIP capture (HDMI) + FrontCam Analytics 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx, EVEx) + Display (HDMI) [IPU1-0] g: 1CH VIP capture + QM Alg Frame Copy with FFI (DSP1) + Display [IPU1-0] h: 1CH VIP capture + QM Alg Frame Copy with FFI (EVE1) + Display (TDA3x only) [IPU1-0] i: 1CH VIP capture + Safe Frame Copy (A15) + Display [IPU1-0] n: NullSrc (File IO) + Decode + Display It seems like you have done some modification in your VSDK. Please download VSDK 3.04 and compare. Regards, Anuj + +Hi, I found the correct file. I will try to test this function. Thanks~ + diff --git a/data2/text/range/15001-20000/746549.txt b/data2/text/range/15001-20000/746549.txt new file mode 100644 index 0000000000000000000000000000000000000000..106561d0589c814c6cc341940741e568c3f65c8f --- /dev/null +++ b/data2/text/range/15001-20000/746549.txt @@ -0,0 +1,358 @@ +Ticket Name: Linux/TDA2: eve framcopy usecases add + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using SDK_VISION_03_04_00_00 . i am thy to add a usecases in sample_app\src\hlos\usecases chains_nullSrc_eveDisplay.txt is UseCase: chains_null_eveSrcDisplay NullSource (A15) -> Alg_FrameCopy (EVE1) ->Display cfg.mk is ALG_framecopy=yes NEED_PROC_IPU1_0=yes NEED_PROC_A15_0=yes NEED_PROC_EVE1=yes but when i run the usecases it failed ,i donot know what is the problem! follow is the log HOST] [HOST ] Sample Application Usecases, [HOST] [HOST ] --------------------------- [HOST] [HOST ] 1: Null Source -> Display (Supports only 1920x1080 HDMI display) [HOST] [HOST ] 2: Null Source_eve -> Display (Supports only 1920x1080 HDMI display) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 2 [HOST] [HOST ] 688.765357 s: #### ENTERING SAMPLE_APP:NULL SOURCE_eve -> DISPLAY USE CASE #### ASSERT (system_ipc_msgq.c|System_ipcMsgQTskMain|218) [HOST] [HOST ] 689.779296 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 689.779357 s: IPC_OUT_0 : Create Done !!! [HOST] [HOST ] 689.780424 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 689.780455 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 689.780485 s: SYSTEM: IPC: [HOST] Notify send failed (Socket operation on non-socket, 88) !!! [HOST] [EVE1 ] 689.779723 s: IPC_IN_0 : Create in progress !!! in PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs/lib/firmware$ have dra7-dsp1-fw.lzop dra7-dsp2-fw.xe66.rsc dra7-ipu2-fw.xem4.rsc dra7-dsp1-fw.xe66 dra7-ipu2-fw.lzop goodix_9271_cfg.bin dra7-dsp1-fw.xe66.rsc dra7-ipu2-fw.xem4 tigon dra7-dsp2-fw.lzop dra7-ipu2-fw.xem4.ipumm-fw vpdma-1b8.bin dra7-dsp2-fw.xe66 dra7-ipu2-fw.xem4.map but no files for arp32. + +Responses: +Hi, Please take a reference of the below usecase vision_sdk\apps\src\hlos\adas\src\usecases\vip_single_cam_framecopyEve_sgx_display You can replace the capture link with your NullSource link if the input file is in raw format. If the input file is in encoded format then please add a decoder link after NullSource. Regards, Anuj + +Hi Anuj: yes i can refer to vision_sdk\apps\src\hlos\adas\src\usecases\vip_single_cam_framecopyEve_sgx_display. But sample_app\src\hlos\usecases \nullSrc_display is more simple i think just replace DSP1 to EVE1 NullSource (A15) -> Alg_FrameCopy (DSP1) ->Display NullSource (A15) -> Alg_FrameCopy (EVE1) ->Display Can this be done in theory? 7115.chains_nullSrcDisplay.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_nullSrcDisplay_priv.h" +#include +#include +#include + +/******************************************************************************* + * DEFINES + ******************************************************************************* + */ +#define NULLSRC_TIME_INTERVAL (33) +#define NULLSRC_NUM_OUTBUF (4) +#define NULLSRC_OUT_WIDTH (768) // (1280) +#define NULLSRC_OUT_HEIGHT (576) // (720) +//#define TILOGO_WIDTH (640) +//#define TILOGO_HEIGHT (224) +#define TILOGO_WIDTH (768) +#define TILOGO_HEIGHT (576) +/******************************************************************************* + * GLOBALS + ******************************************************************************* + */ +chains_nullSrcDisplayObj gUcObj; +Chains_DisplayType gDisplayType; +UInt32 gDisplayWidth; +UInt32 gDisplayHeight; + +static char useCaseRunTimeMenu[] = { +"\n " +"\n ====================" +"\n Chains Run-time Menu" +"\n ====================" +"\n " +"\n 0: Stop Chain" +"\n " +"\n p: Print Performance Statistics " +"\n " +"\n Enter Choice: " +"\n " +}; + +/** + ******************************************************************************* + * + * \brief Null source Null use case Set Application paremeters + *` + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_nullSrcDisplay_SetAppPrms(chains_nullSrcDisplayObj *pObj, Void *appObj) +{ + System_LinkChInfo *pChInfo; + NullSrcLink_CreateParams *pNullSrcPrm = &pObj->NullSourcePrm; + + ChainsCommon_GetDisplayWidthHeight( + gDisplayType, + &gDisplayWidth, + &gDisplayHeight); + + NullSrcLink_CreateParams_Init(pNullSrcPrm); + + pNullSrcPrm->timerPeriodMilliSecs = NULLSRC_TIME_INTERVAL; + pNullSrcPrm->outQueInfo.numCh = 1; + pNullSrcPrm->channelParams[0].numBuffers = NULLSRC_NUM_OUTBUF; + + pChInfo = &pNullSrcPrm->outQueInfo.chInfo[0]; + + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, + SYSTEM_DF_YUV420SP_UV); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pChInfo->flags, + SYSTEM_SF_PROGRESSIVE); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, + SYSTEM_BUFFER_TYPE_VIDEO_FRAME); + pChInfo->width = NULLSRC_OUT_WIDTH; + pChInfo->height = NULLSRC_OUT_HEIGHT; + pChInfo->startX = 0; + pChInfo->startY = 0; + pChInfo->pitch[0] = SystemUtils_align(pChInfo->width, 32); + pChInfo->pitch[1] = SystemUtils_align(pChInfo->width, 32); +// Vps_printf(" ALGORITHM_LINK_DSP_ALG_FRAMECOPY wordWidth: DMA: height CH (TCC) = %d (%d)\n", 300,300); + /* Alg FrameCopy parameters */ + pObj->Alg_FrameCopyPrm.baseClassCreate.algId = ALGORITHM_LINK_DSP_ALG_FRAMECOPY; + pObj->Alg_FrameCopyPrm.maxWidth = NULLSRC_OUT_WIDTH; + pObj->Alg_FrameCopyPrm.maxHeight = NULLSRC_OUT_HEIGHT; + pObj->Alg_FrameCopyPrm.numOutputFrames = 3; + + /* Display parameters */ + pObj->DisplayPrm.rtParams.tarWidth = gDisplayWidth; + pObj->DisplayPrm.rtParams.tarHeight = gDisplayHeight; + pObj->DisplayPrm.rtParams.posX = 0U; + pObj->DisplayPrm.rtParams.posY = 0U; + pObj->DisplayPrm.displayId = DISPLAY_LINK_INST_DSS_VID1; + + ChainsCommon_StartDisplayCtrl( + gDisplayType, + gDisplayWidth, + gDisplayHeight); +} + +/** + ******************************************************************************* + * + * \brief Fill the source buffers with known pattern + *` + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +static Void fillSrcBuf(chains_nullSrcDisplayObj *pObj) +{ + Int32 status; + UInt32 ht, bufCnt, logoStartX, logoStartY, offset; + UInt8 *srcAddr, *dstAddr; + NullSrcLink_GetBufInfoParams getBufInfoPrm; + System_Buffer *pBuffer; + System_VideoFrameBuffer *pVideoFrame; + + /** + * Get the Null source buffer info + */ + getBufInfoPrm.chId = 0U; + status = System_linkControl( + pObj->NullSourceLinkID, + NULL_SRC_LINK_CMD_GET_BUF_INFO, + &getBufInfoPrm, + sizeof(NullSrcLink_GetBufInfoParams), + TRUE); + UTILS_assert (SYSTEM_LINK_STATUS_SOK == status); + + for (bufCnt = 0;bufCnt < getBufInfoPrm.numBuf;bufCnt ++) + { + pBuffer = &getBufInfoPrm.buffer[bufCnt]; + pVideoFrame = pBuffer->payload; + + memset( + pVideoFrame->bufAddr[0], + 0xFF, + (NULLSRC_OUT_WIDTH * NULLSRC_OUT_HEIGHT)); + + memset( + pVideoFrame->bufAddr[1], + 0x80, + (NULLSRC_OUT_WIDTH * NULLSRC_OUT_HEIGHT/2)); + + /* copy TI logo */ + logoStartX = (NULLSRC_OUT_WIDTH - TILOGO_WIDTH)/2; + logoStartY = (NULLSRC_OUT_HEIGHT - TILOGO_HEIGHT)/2; + offset = (logoStartY * NULLSRC_OUT_WIDTH) + logoStartX; + dstAddr = (UInt8*)((UInt32)pVideoFrame->bufAddr[0] + offset); + srcAddr = tiLogo_640_224; + for(ht = 0;ht < TILOGO_HEIGHT;ht++) + { + memcpy(dstAddr, srcAddr, TILOGO_WIDTH); + dstAddr += NULLSRC_OUT_WIDTH; + srcAddr += TILOGO_WIDTH; + } + + offset = ((logoStartY/2) * NULLSRC_OUT_WIDTH) + logoStartX; + dstAddr = (UInt8*)((UInt32)pVideoFrame->bufAddr[1] + offset); + srcAddr = (UInt8*)((UInt32)tiLogo_640_224 + \ + (TILOGO_WIDTH * TILOGO_HEIGHT)); + for(ht = 0;ht < TILOGO_HEIGHT/2;ht++) + { + memcpy(dstAddr, srcAddr, TILOGO_WIDTH); + dstAddr += NULLSRC_OUT_WIDTH; + srcAddr += TILOGO_WIDTH; + } +/////////////////////////////////////////////////////////////////////////////////arcsoft + FILE *fptxt = fopen("./input_img/mykeys.txt", "rb"); + if (fptxt == NULL) + { + printf("fopen failed \n"); + return -1; + } + UInt8 Ciphertext[2048] = { 0 }; + fread(Ciphertext, 1, 2048, fptxt); + fclose(fptxt); + dstAddr = (UInt8*)((UInt32)pVideoFrame->bufAddr[1] + offset); + memcpy(dstAddr, Ciphertext, 2048); + //int i=0; + //for (i = 0; i < 128; i++) + //{ + // Vps_printf(" id = %d,Ciphertext=%d\n",i,dstAddr[i]); + // } +//////////////////////////////////////////////////////////////////////////////////// + OSA_memCacheWb( + (UInt32)pVideoFrame->bufAddr[0], + ((UInt32)pVideoFrame->bufAddr[0] + \ + (NULLSRC_OUT_WIDTH * NULLSRC_OUT_HEIGHT))); + OSA_memCacheWb( + (UInt32)pVideoFrame->bufAddr[1], + ((UInt32)pVideoFrame->bufAddr[1] + \ + (NULLSRC_OUT_WIDTH * (NULLSRC_OUT_HEIGHT/2)))); + } +} + +/** + ******************************************************************************* + * + * \brief Null source Null use case + *` + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void Chains_nullSrc_display() +{ + char ch; + UInt32 done = FALSE; + + gDisplayType = CHAINS_DISPLAY_TYPE_HDMI_1080P; + + Vps_printf(" #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE ####"); + + chains_nullSrcDisplay_Create(&gUcObj,NULL); + + /* Fill the source buffers */ + fillSrcBuf(&gUcObj); + ChainsCommon_statCollectorReset(); + ChainsCommon_memPrintHeapStatus(); + + chains_nullSrcDisplay_Start(&gUcObj); + + ChainsCommon_prfLoadCalcEnable(TRUE, FALSE, FALSE); + + + done = FALSE; + while(!done) + { + Vps_printf(useCaseRunTimeMenu); + ch = Chains_readChar(); + + switch(ch) + { + case '0': + done = TRUE; + break; + case 'p': + chains_nullSrcDisplay_printStatistics(&gUcObj); + ChainsCommon_PrintStatistics(); + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", + ch); + break; + } + } + + chains_nullSrcDisplay_Stop(&gUcObj); + chains_nullSrcDisplay_Delete(&gUcObj); + + ChainsCommon_StopDisplayCtrl(); + ChainsCommon_prfLoadCalcEnable(FALSE, FALSE, FALSE); + + Vps_printf(" #### EXITING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE ####"); +} + +can i move usecases\vip_single_cam_framecopyEve_sgx_display. usecase to sample_app\src\hlos\usecases and run it? + +Hi, Only copying the folder wont work. You need to call that usecase and also you need to enable that usecase from uc_cfg.mk Regards, Anuj + diff --git a/data2/text/range/15001-20000/755959.txt b/data2/text/range/15001-20000/755959.txt new file mode 100644 index 0000000000000000000000000000000000000000..948068ff59f3a7c591799ed1b6036ae28b206815 --- /dev/null +++ b/data2/text/range/15001-20000/755959.txt @@ -0,0 +1,42 @@ +Ticket Name: Linux/TDA2: TDA2 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: Linux To TI supporter,Hi! I download Processor SDK Vision from: http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html but，I can't install PROCESSOR_SDK_VISION_03_05_00_00.bin on on a virtual machine ，it's Ubuntu16.04 64 bit. We would like to have your fully support to install Installer Package for Linux Looking forward to hearing from you soon. Thank you. + +Responses: +Hi, What is the error you are getting? Regards, Rishabh + +Hi, When I install this file(PROCESSOR_SDK_VISION_03_05_00_00_setuplinux.bin), the system will report an error,like this sudo: unable to execute ./PROCESSOR_SDK_VISION_03_05_00_00_setuplinux.bin: No such file or directory I hope you can help me solve this problem.Thank you ! Regards, ycc + +In reply to Rishabh Garg: Hi, When I install this file(PROCESSOR_SDK_VISION_03_05_00_00_setuplinux.bin), the system will report an error,like this sudo: unable to execute ./PROCESSOR_SDK_VISION_03_05_00_00_setuplinux.bin: No such file or directory I hope you can help me solve this problem.Thank you ! Regards, ycc + +Hi, Is this file present in your current path? Can you run "ls -ll" and share the result. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi‘ I compile VisionSDK according to the instructions VisionSDK_Linux_UserGuide.when I build the sdk with "make -s -j" command ,The system will report an error，such as: make[7]: mono: Command not found make[7]: mono: Command not found /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/rules_arp32.mk:298: recipe for target '/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F' failed make[7]: *** [/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F] Error 127 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/rules_arp32.mk:298: recipe for target '/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F' failed make[7]: *** [/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F] Error 127 make[7]: mono: Command not found /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/rules_arp32.mk:298: recipe for target '/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F' failed /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'arp32_4' failed make[6]: *** [arp32_4] Error 2 make[7]: *** [/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F] Error 127 make[7]: mono: Command not found /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'arp32_2' failed make[6]: *** [arp32_2] Error 2 MAKEFILE.MK:89: recipe for target 'apps_eve4' failed make[5]: *** [apps_eve4] Error 2 make[5]: *** Waiting for unfinished jobs.... MAKEFILE.MK:67: recipe for target 'apps_eve2' failed /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/rules_arp32.mk:298: recipe for target '/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F' failed make[5]: *** [apps_eve2] Error 2 make[7]: *** [/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F] Error 127 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'arp32_3' failed make[6]: *** [arp32_3] Error 2 MAKEFILE.MK:78: recipe for target 'apps_eve3' failed make[5]: *** [apps_eve3] Error 2 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'arp32_1' failed make[6]: *** [arp32_1] Error 2 MAKEFILE.MK:56: recipe for target 'apps_eve1' failed make[5]: *** [apps_eve1] Error 2 are66 Ipc.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/ipc' making /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/utils.ae66 ... gmake[1]: Entering directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/utils' cle66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/ipc_3_45_00_00/packages/ti/sdo/utils/UTILS.c ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 Ipc.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/ipc' making /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/utils.ae66 ... gmake[1]: Entering directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/utils' cle66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/ipc_3_45_00_00/packages/ti/sdo/utils/UTILS.c ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 UTILS.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/utils' making /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios/sysbios.ae66 ... gmake[1]: Entering directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' cle66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/BIOS.c ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 UTILS.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/utils' making /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/sysbios/sysbios.ae66 ... gmake[1]: Entering directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/sysbios' cle66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/BIOS.c ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' Build of libraries done. warning: xdc.cfg.Program: "/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. # Configuro done! # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: src/main_common_c6xdsp1.c # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/apps/src/common/app_init/app_init_dsp.c # Compiling tda2xx-evm:c66xdsp_1:release:vision_sdk: /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/apps/src/common/main_app/tda2xx/dsp1/src/main_c6xdsp1.c # Compiling generated MAIN_APP_c6xdsp1_pe66.oe66 asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. asme66 /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/bios_6_46_06_00/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... remark #24038-D: --optimize_with_debug is deprecated and will be removed in a subsequent release. The behavior is enabled by default. are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... gmake[1]: Leaving directory `/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/sysbios' Build of libraries done. warning: xdc.cfg.Program: "/home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. # Configuro done! # Making tda2xx-evm:c66xdsp_2:release:vision_sdk_lib... # Compiling tda2xx-evm:c66xdsp_2:release:vision_sdk: /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/apps/src/common/main_app/tda2xx/dsp2/src/main_c6xdsp2.c # Compiling tda2xx-evm:c66xdsp_2:release:vision_sdk: /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/apps/src/common/app_init/app_init_dsp.c # Compiling tda2xx-evm:c66xdsp_2:release:vision_sdk: src/main_common_c6xdsp2.c # Compiling generated MAIN_APP_c6xdsp2_pe66.oe66 # Linking into /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... # Linking into /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66... # # # /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 created. # /home/ycc/PROCESSOR_SDK_VISION_03_06_00_00_setuplinux/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 created. # # MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:299: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:175: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:38: recipe for target 'apps' failed make[1]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 How to solve this problem？ I hope you can help me solve this problem.Thank you ! Regards, ycc + +Hi, You need to install the dependencies and needed packages. See section 2.2 and 2.4 of Linux user guide. Regards, Rishabh + +Hi, I installed the required installation package as required by 2.2 and 2.4.but I haven't installed section 2.4.2.2. because These are optional and default vision_sdk_linux build does not need these.Is it necessary? Regards, ycc + +Hi, Can you run make -j and share the log as a text file. Regards, Rishabh + +Hi, Here is the error log ,thank you! ycc make -j log.log + +Hi, Can you try a clean build "rm -rf binaries". Also are you building from bash? If not then please try building from bash. Regards, Rishabh + +Hi I have done a "make clean"command and deleted binaries,then building from bash,but the errors are same . Regards, ycc + +Hi, You need to install mono. Please run "sudo apt-get install mono-complete". Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, I am having the same error in running PROCESSOR_SDK_VISION_03_06_00_00_setuplinux.bin after changing permission +x and run in the PC with Linux 18.04 OS. + +Hi, We have not tried this on Ubuntu18. Do you see the same issue on Ubuntu14 or Ubuntu16? Regards, Rishabh + +No, with Ubuntu 16 do not find issue with the firmware. Thanks for updating. + +Hi, Glad that your issue is resolved. Kindly mark the posts that answer your query as "This resolved my issue" and close the thread. Regards, Rishabh + diff --git a/data2/text/range/15001-20000/756884.txt b/data2/text/range/15001-20000/756884.txt new file mode 100644 index 0000000000000000000000000000000000000000..dc96b8ece72d5bb7c81093412ea7ee935b27c98c --- /dev/null +++ b/data2/text/range/15001-20000/756884.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: EDMA_UTILS_memcpy2D + +Query Text: +Part Number: TDA2 Tool/software: Linux I am using TDA2 evm SDK_VISION_03_04_00_00 i build SDK_VISION_03_04_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02 this code creat EMDA_C66.lib , when i have to copy data from DDR to L2 i use EDMA_UTILS_memcpy2D or EDMA_UTILS_autoIncrement_triggerInChannel_v2 in EMDA_C66.lib. I optimized a CNN if copy data i call in EMDA_C66.lib. this CNN run is ok on CCS . (build ,out use CCS and load .out to the EVM boad and run result is right ) but i make this CNN code to a link and run it in linux , the result is wrong. i check this time if i donot use EDMA the result is right , (it is slow as data is on DDR ), even use EDMA_UTILS_memcpy2D one time the result is diffrent. So i think it problem about EDMA_UTILS_memcpy2D. but i dot know how to slov this . could you analysis for me. Shuai BESTWISHES + +Responses: +Hi, I never used "EDMA_UTILS_memcpy2D" function in Linux so did not face this kind of issue. I will check this internally and come back. Thanks, Praveen + +Hi Praveen in a function have this part, this fuction is call many times in my cnn ,here column2 is 4608 or 1152 use memcpy((void*)pInBufInt, (const void *)tempin, column1*sizeof(float)); out put of CNN is right but change EDMA_UTILS_memcpy2D the result is not stable. this input out put of CNN is change a litter , i think maybe sometimes EDMA_UTILS_memcpy2D is failed . use //EDMA_UTILS_autoIncrement_waitInChannel_v2(dmaAutoContextInOut); //EDMA_UTILS_autoIncrement_triggerInChannel_v2(dmaAutoContextInOut); the result is not stable too ，actually I chose to use pingpang EDMA at first to hide time of EDMA. for (i = 0; i < column2; i++) { EDMA_UTILS_memcpy2D((void*)pInBufInt, (const void *)tempin, column1*sizeof(float), 1, column1*sizeof(float), column1 *sizeof(float)); //memcpy((void*)pInBufInt, (const void *)tempin, column1*sizeof(float)); mcvMatrixMulMatrixRowMajor_f32_normal_step3b_ti_kenel(pInBufInt, column2, pOutBufInt, row1, pInBufInt_weight, column1, i); tempin += column1; bufIdx ^= 1; } thanks Shuai + +i am using SDK_VISION_03_04_00_00\vision_sdk\sample_app\src\hlos\usecases\nullSrc_display my code is put in VISION_03_04_00_00\vision_sdk\sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c after frameCopy run my CNN , data is put in TI_logo_640_224_sp.h. so each frame input and out put is the same. but sometimes The results of the previous frames is wrong . I think EDMA was not stable when I started. Some data was not replicated completely, so the result was biased. follow is the log . HOST] [EVE2 ] 38.400353 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [EVE3 ] 38.401360 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 38.401665 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 38.402214 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [EVE4 ] 38.403251 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 38.403525 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 38.404074 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [IPU2 ] 38.404898 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 38.405081 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248552 B (242 KB) [HOST] [IPU2 ] 38.405233 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 38.405386 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 346030080 B (330 MB), Free size = 279802368 B (266 MB) [HOST] [IPU2 ] 38.405569 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 38.406026 s: DISPLAY: Start in progress !!! [HOST] [IPU2 ] 38.406118 s: DISPLAY: Start Done !!! [HOST] [DSP1 ] 38.737265 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 39.871683 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 39.871805 s: AHD_Detect_times = 1134.480869 ms,success=0 [HOST] [DSP1 ] 39.871805 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 39.871835 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 40.189288 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 41.321722 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 41.321814 s: AHD_Detect_times = 1132.494857 ms,success=0 [HOST] [DSP1 ] 41.321844 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 41.321875 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 41.641340 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 42.773866 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 42.773927 s: AHD_Detect_times = 1132.558843 ms,success=0 [HOST] [DSP1 ] 42.773958 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 42.773988 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 43.093363 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 44.225980 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 44.226041 s: AHD_Detect_times = 1132.648691 ms,success=0 [HOST] [DSP1 ] 44.226072 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 44.226102 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 44.545415 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 45.677911 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 45.678002 s: AHD_Detect_times = 1132.548633 ms,success=0 [HOST] [DSP1 ] 45.678033 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 45.678063 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 45.997468 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 47.129994 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 47.130086 s: AHD_Detect_times = 1132.592060 ms,success=0 [HOST] [DSP1 ] 47.130116 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 47.130116 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 47.416519 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 48.550783 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 48.550844 s: AHD_Detect_times = 1134.308840 ms,success=0 [HOST] [DSP1 ] 48.550875 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 48.550905 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 48.868510 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 50.000793 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 50.000884 s: AHD_Detect_times = 1132.315449 ms,success=0 [HOST] [DSP1 ] 50.000884 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 50.000915 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 50.320563 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 51.453272 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 51.453364 s: AHD_Detect_times = 1132.749145 ms,success=0 [HOST] [DSP1 ] 51.453364 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 51.453394 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 51.772616 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 52.905081 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 52.905172 s: AHD_Detect_times = 1132.542809 ms,success=0 [HOST] [DSP1 ] 52.905203 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 52.905233 s: i32SignNumber=201 eModel=251 left=243 right=227 top=56 bottom=224 [HOST] [DSP1 ] 53.224638 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 54.356951 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 54.357042 s: AHD_Detect_times = 1132.360612 ms,success=0 [HOST] [DSP1 ] 54.357042 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 54.357073 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 54.676691 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 55.809247 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 55.809308 s: AHD_Detect_times = 1132.597691 ms,success=0 [HOST] [DSP1 ] 55.809339 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 55.809369 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 56.095711 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 57.230006 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 57.230067 s: AHD_Detect_times = 1134.310685 ms,success=0 [HOST] [DSP1 ] 57.230098 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 57.230128 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 57.547733 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 58.680351 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 58.680412 s: AHD_Detect_times = 1132.627663 ms,success=0 [HOST] [DSP1 ] 58.680442 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 58.680473 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 58.999786 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 60.132465 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 60.132526 s: AHD_Detect_times = 1132.689995 ms,success=0 [HOST] [DSP1 ] 60.132556 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 60.132556 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 60.451839 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 61.584395 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 61.584487 s: AHD_Detect_times = 1132.617527 ms,success=0 [HOST] [DSP1 ] 61.584487 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 61.584517 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 61.903861 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 63.036326 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_▒1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 63.036448 s: AHD_Detect_times = 1132.535337 ms,success=0 [HOST] [DSP1 ] 63.036478 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 63.036509 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 63.355914 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 64.490270 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 64.490331 s: AHD_Detect_times = 1134.391357 ms,success=0 [HOST] [DSP1 ] 64.490361 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 64.490392 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 64.807966 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 65.942322 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 65.942414 s: AHD_Detect_times = 1134.401329 ms,success=0 [HOST] [DSP1 ] 65.942414 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 65.942444 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 66.259989 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 67.392027 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 67.392088 s: AHD_Detect_times = 1132.068497 ms,success=0 [HOST] [DSP1 ] 67.392118 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 67.392149 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 67.712041 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 68.844232 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 68.844293 s: AHD_Detect_times = 1132.228713 ms,success=0 [HOST] [DSP1 ] 68.844323 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 68.844354 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 69.164094 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 70.296651 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 70.296712 s: AHD_Detect_times = 1132.596419 ms,success=0 [HOST] [DSP1 ] 70.296742 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 70.296773 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 70.616116 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 71.748459 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 71.748520 s: AHD_Detect_times = 1132.366717 ms,success=0 [HOST] [DSP1 ] 71.748551 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 71.748581 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 72.068169 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 73.202555 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 73.202647 s: AHD_Detect_times = 1134.442501 ms,success=0 [HOST] [DSP1 ] 73.202677 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 73.202708 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 73.520222 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 74.654883 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 74.654974 s: AHD_Detect_times = 1134.722688 ms,success=0 [HOST] [DSP1 ] 74.654974 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 74.655005 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 74.972244 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 76.104922 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 76.105014 s: AHD_Detect_times = 1132.737776 ms,success=0 [HOST] [DSP1 ] 76.105014 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 76.105044 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 76.424266 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 77.556823 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 77.556914 s: AHD_Detect_times = 1132.604640 ms,success=0 [HOST] [DSP1 ] 77.556914 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 77.556945 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 77.876319 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 79.008845 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 79.008906 s: AHD_Detect_times = 1132.570743 ms,success=0 [HOST] [DSP1 ] 79.008936 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 79.008967 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 79.328341 s: AFR_ExtractFRFeature_Register start! [HOST] [DSP1 ] 80.460501 s: rtos_model_frsite=803000,nMemLen=204800,model_fr_0=13.531149,model_fr_1=5.067012 ,model_fr_3=-0.031548,model_fr_4=-0.005483 [HOST] [DSP1 ] 80.460562 s: AHD_Detect_times = 1132.188060 ms,success=0 [HOST] [DSP1 ] 80.460592 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 [HOST] [DSP1 ] 80.460623 s: i32SignNumber=184 eModel=251 left=252 right=227 top=58 bottom=224 BESTWISHES Shuai + +Hi Shuai, Are you still stuck with this issue? Regards, Anshu + +Hi Anshu i read cnn model in A15 , add OSA_memCacheWb in C66 can get the model , befor i miss OSA_memCacheWb the model is some problem Regards, Shuai + +Hi Shuai, I couldnt really completely follow what you mentioned above. Are you saying you figured out the reason for your issue? Regards, Anshu + +Hi Shuai, Can you confirm if this issue is resolved? Regards, Anshu + diff --git a/data2/text/range/15001-20000/763784.txt b/data2/text/range/15001-20000/763784.txt new file mode 100644 index 0000000000000000000000000000000000000000..cd67ed4169369400bfb78f15228a8d0d3ff67c97 --- /dev/null +++ b/data2/text/range/15001-20000/763784.txt @@ -0,0 +1,330 @@ +Ticket Name: Linux/TDA2PXEVM: [OpenGl] ARGB Texture support on VisionSDK + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Hi: This post in 2016 said will support ARGB texture in 2017, right now it's 2019!!! In my previous post we just wondering when TI will support ARGB texture because it's OpenGL standard? For now, it's not supported yet, any other way to load the picture to OpenGl and rendering out? + +Responses: +Hi, ARGB texture support is already available on our K4.4 releases (PSDKLA 3.x / VisionSDK 3.x). Please check and let us know if you see any problems in your application. There are many options to achieve this. For example: 1. You can use the standard render to texture option with glTexImage2D. 2. Render to a pixmap surface and create an EGLImage out of it with the target set to EGL_NATIVE_PIXMAP_KHR. #1 should work with all implementations. #2 is a bit non-standard and will require the window system to support pixmap as a surface. This is not mandatory and some window systems (like Wayland) call for supporting only window surface. Regards, Anand + +Hi Anand: Here is the sample code that to show the jpg with ARGB, but no output on screen. By using the sgxfrmcopy pluggin. /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "sgxRenderAVM.h" +#include "avm_gpu.h" +#include "summ_widget.h" +#include "surround_widget.h" + + + + +#include + +#include + + + + +#define BOTTOM_LEFT_W +#define BOTTOM_LEFT_H 0 + + + +#define SURR_POSITION_X 0 +#define SURR_POSITION_Y 0+BOTTOM_LEFT_H +#define SURR_WIDTH 790 +#define SURR_HEIGHT 720 + +#define SUMM_POSITION_X SURR_WIDTH +#define SUMM_POSITION_Y 0+BOTTOM_LEFT_H +#define SUMM_WIDTH 490 +#define SUMM_HEIGHT 720 + + + +#include +#include +#include +#include + + +std::unique_ptr AVMServiceServer; + +std::unique_ptr AVMViewControl; + + +std::unique_ptr SumAVM; +std::unique_ptr SurrAVM; + +namespace { + + namespace { + #define eglCheckGlError(x) \ + { \ + GLint error; \ + for (error = glGetError(); error; error = glGetError()) { \ + fprintf(stderr, "func:%s line %d GL: after %s() glError (0x%x)\n", __FUNCTION__,__LINE__,x, error); \ + } \ + } + + } + + + void Dump2File(const std::string& file, uint8_t* data, uint32_t size) + { + + FILE* pFile; + pFile = fopen(file.c_str(), "w"); + if (pFile != NULL) { + fwrite(data, 1, size, pFile); + fclose(pFile); + } + } + +unsigned char ClipValue(unsigned char x, unsigned char min_val, unsigned char max_val) { + if (x > max_val) { + return max_val; + } else if (x < min_val) { + return min_val; + } else { + return x; + } +} + + + + +} +static const GLfloat gSgxRender1x1_triangleVertices_fullscreen[] = { + -1.0f, 1.0f, 0.0f, + -1.0f, -1.0f, 0.0f, + 1.0f, -1.0f, 0.0f, + 1.0f, 1.0f, 0.0f + }; + + +GLuint *textureIds ; + + +#define ENABLE_TEST +int SgxRenderAVM_setup(SgxRenderAVM_Obj *pObj) +{ +#ifdef ENABLE_TEST + SgxRender1x1_setup(&pObj->render1x1Obj); +int numTextures = 1; + + // init il, multi init is ok + ilInit(); + + /* create and fill array with DevIL texture ids */ + ILuint* imageIds = new ILuint[numTextures]; + ilGenImages(numTextures, imageIds); + + /* create and fill array with GL texture ids */ + textureIds = new GLuint[numTextures]; + glGenTextures(numTextures, textureIds); /* Texture name generation */ + eglCheckGlError("glGenTextures"); + printf("numTextures %d \n",numTextures); + + + /* get iterator */ + + + ilBindImage(imageIds[0]); /* Binding of DevIL image name */ + ilEnable(IL_ORIGIN_SET); + ilOriginFunc(IL_ORIGIN_LOWER_LEFT); + ILboolean success = ilLoadImage((ILstring)"/opt/vision_sdk/avm_qt_app_res/cs11/LK.JPG"); + if (success) + { + printf("load jpg ok \n"); + /* Convert image to RGBA */ + ilConvertImage(IL_RGBA, IL_UNSIGNED_BYTE); + printf("convert ok \n"); + /* Create and load textures to OpenGL */ + glBindTexture(GL_TEXTURE_EXTERNAL_OES, textureIds[0]); + eglCheckGlError("glBindTexture"); + glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, ilGetInteger(IL_IMAGE_WIDTH), + ilGetInteger(IL_IMAGE_HEIGHT), 0, GL_RGBA, GL_UNSIGNED_BYTE, + ilGetData()); + printf("glTexImage2D ok \n"); + + + #ifdef YUV_ENABLE + std::vectoryuv(0,ilGetInteger(IL_IMAGE_WIDTH)*ilGetInteger(IL_IMAGE_HEIGHT)*2); + RGB2YUV420P(ilGetData(),ilGetInteger(IL_IMAGE_WIDTH),ilGetInteger(IL_IMAGE_HEIGHT),yuv.data()); + glTexImage2D(GL_TEXTURE_2D, 0, GL_LUMINANCE, ilGetInteger(IL_IMAGE_WIDTH), + ilGetInteger(IL_IMAGE_HEIGHT), 0, GL_LUMINANCE, GL_UNSIGNED_BYTE, + yuv.data()); + #endif + //Dump2File("LK.JPG.RGBA",ilGetData(),ilGetInteger(IL_IMAGE_WIDTH)*ilGetInteger(IL_IMAGE_HEIGHT)*4); + printf("JPEG header %x %x %x %x \n",ilGetData()[0],ilGetData()[1],ilGetData()[2],ilGetData()[3]); + + + eglCheckGlError("glTexImage2D"); + glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MAG_FILTER, GL_NEAREST); + glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MIN_FILTER, GL_NEAREST); + + + + eglCheckGlError("glTexImage2D"); + printf("load ok \n"); + }else + { + + printf("failed to load jpg file to texture \n"); + + + } + + + + + return 0; +} + + + + + +void SgxRenderAVM_renderFrame(SgxRenderAVM_Obj *pObj, System_EglWindowObj *pEglWindowObj, GLuint texYuv[], UInt16 numTex ) +{ + UTILS_assert(numTex==4); + printf(" textureIds[0] %d \n", textureIds[0]); + SgxRender1x1_renderFrame1x1(&pObj->render1x1Obj, pEglWindowObj, gSgxRender1x1_triangleVertices_fullscreen, textureIds[0]); + + +} + + (if replace the textureids[0] with texYuv[0] then the camera image can come up on screen.) + +Hi, You cannot use GL_TEXTURE_EXTERNAL_OES when you use glTexImage2D. glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MAG_FILTER, GL_NEAREST); The TEXTURE_OES is defined as part of EGLImage OpenGLES extension. This may or may not be supported on all OpenGLES implementations. Even if supported, there could be restrictions. TI supports only YUV images as part of EGLImage. www.khronos.org/.../OES_EGL_image_external.txt You need to use the standard OpenGLES render to texture technique for rendering to an ARGB buffer and using it as a texture. For example: opengles2learning.blogspot.com/.../render-to-texture-rtt.html If you face any issues when you start using RTT, please provide a standalone self contained OpenGLES application like the following: git.ti.com/.../kmscube You can run the kmscube application on either PSDKLA (with omapdrm) or VisionSDK (with virtualdrm). Regards, Anand + +Hi: mark it processors.wiki.ti.com/.../Render_to_Texture_with_OpenGL_ES + +Hi, Yes, the TI link is also relevant here. As I mentioned earlier, RTT (Render To Texture) is a standard technique long in practice for Graphics. I did not mention the TI link in earlier posts because the reference to PBuffers is sub-optimal for newer generation GPUs. I assume the question is answered. We will mark the thread closed. Please open a new thread or repost if you have any related questions. Regards, Anand + +HI： Reopen for further discussion. we finished the render to texture code and run on visionSDK by sgxFrmcpy. please check the code in attachment. 0020.sgxRenderAVM.cpp8358.TRenderToTexture.cpp The problem right now, the render to texture can not be bind. func:SgxRender1x1_renderFrame1x1 line 235 GL: after glBindTexture() glError (0x502) and the source code is in sgxRender1x1.c void SgxRender1x1_renderFrame1x1(SgxRender1x1_Obj *pObj, System_EglWindowObj *pEglWindowObj, const GLfloat *vertices, GLuint texYuv) +{ + glVertexAttribPointer(pObj->vPositionHandle, 3, GL_FLOAT, GL_FALSE, 0, vertices); + eglCheckGlError("glVertexAttribPointer"); + glEnableVertexAttribArray(pObj->vPositionHandle); + eglCheckGlError("glEnableVertexAttribArray"); + + glVertexAttribPointer(pObj->vTexHandle, 2, GL_FLOAT, GL_FALSE, 0, gSgxRender1x1_texCoords); + eglCheckGlError("glVertexAttribPointer"); + glEnableVertexAttribArray(pObj->vTexHandle); + eglCheckGlError("glEnableVertexAttribArray"); + + glUniform1i(pObj->yuvTexSamplerHandle, 0); + eglCheckGlError("glUniform1i"); + glBindTexture(GL_TEXTURE_EXTERNAL_OES, texYuv); + eglCheckGlError("glBindTexture"); + + glDrawArrays(GL_TRIANGLE_FAN, 0, 4); + eglCheckGlError("glDrawArrays"); +} + +Hi, As mentioned in earlier post: If you face any issues when you start using RTT, please provide a standalone self contained OpenGLES application like the following: git.ti.com/.../kmscube You can run the kmscube application on either PSDKLA (with omapdrm) or VisionSDK (with virtualdrm). Regards, Anand + +Hi Anand： It will take much time to move to that repo and it can't prove anything. we do not have the experience with virtualdrm. And also consider the difference between kmscube and visionSDK sgxFrmCpy that: 1. sgxFrmCpy use GL_TEXTURE_EXTERNAL_OES 2. the shader program use "samplerExternalOES" we can't see any connection of the kmscube with this issue. and We're wondering does visionSDK have any sample to display picture by OpenGL? + +Hi, The main intent is to create an OpenGLES application that can be built separately without VisionSDK. We need to have a sample application that can reproduce the problem on TI EVM. This problem is specific to Graphics. For that, VisionSDK components are unnecessary. kmscube is an example OpenGLES application that can be built standalone. We would like you to give us an example application that is similar to kmscube that can reproduce the problem. Regards, Anand + +Hi Anand： please share the document how to cross build the kmscue to run on tda2px. Now we configure like: ./autogen.sh CC=/mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ --with-sysroot=/mnt/workshop/GK-APA/apa-tda2/dist/apa/targetfs/ --host --host-alias=arm but got the error as: checking if /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ supports -fno-rtti -fno-exceptions... yes +checking for /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ option to produce PIC... -fPIC -DPIC +checking if /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ PIC flag -fPIC -DPIC works... yes +checking if /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ static flag -static works... yes +checking if /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ supports -c -o file.o... yes +checking if /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ supports -c -o file.o... (cached) yes +checking whether the /mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-g++ linker (/mnt/workshop/GK-APA/apa-tda2/base/ti_vision_sdk_v3.4/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/bin/ld) supports shared libraries... yes +checking whether -lc should be explicitly linked in... no +checking dynamic linker characteristics... no +checking how to hardcode library paths into programs... immediate +checking whether stripping libraries is possible... yes +checking if libtool supports shared libraries... no +checking whether to build shared libraries... no +checking whether to build static libraries... yes +checking for --host-alias=arm-pkg-config... no +checking for pkg-config... /usr/bin/pkg-config +checking pkg-config is at least version 0.9.0... yes +checking for DRM... yes +checking for GBM... no +configure: error: Package requirements (gbm) were not met: + +No package 'gbm' found + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables GBM_CFLAGS +and GBM_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. +configure: WARNING: cache variable ac_cv_host contains a newline Thanks + +Hi, I used this steps to build kmscube with Vision-SDK's targetfs. Can you please try this and let me know. git clone git://git.ti.com/glsdk/kmscube.git cd kmscube export PSDKLA=/home/PROCESSOR_SDK_VISION_03_04_00_00/targetfs export PATH=/home/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin:$PATH export PKG_CONFIG_PATH=$PSDKLA/usr/lib/pkgconfig export DRM_CFLAGS="-I$PSDKLA/usr/include -I$PSDKLA/usr/include/libdrm/ -I$PSDKLA/usr/include/omap" export DRM_LIBS="-L$PSDKLA/usr/lib -L$PSDKLA/lib -lattr -ldrm -ldrm_omap" export GBM_CFLAGS=-I$PSDKLA/usr/include/gbm export GBM_LIBS="-L$PSDKLA/usr/lib -lgbm" export LIBUDEV_CFLAGS=-I$PSDKLA/usr/include export LIBUDEV_LIBS="-L$PSDKLA/usr/lib -ludev" ./autogen.sh --host=arm-linux-gnueabihf --target=arm-linux-gnueabihf --prefix=$INSTALL_PATH --with-sysroot=$PSDKLA cp targetfs/lib/libudev* targetfs/usr/lib/ make Please check if you can build kmscube with this setting. TI has not tested kmscube with vDRM since this is a KMS application and only wayland client applications like simple-egl have been tested. TI will make changes if anything is required to run this on VISION_SDK setup and update you. Thanks Ramprasad + +Hi: Add comments: 1. This issues related with which we want to attach the car picture(JPG) to 3D car model. 2. we'are working on VisionSDK with sgxfrmcpy plugin for rendering. + +Hi Andy, How are you planning to decode jpeg to YUV.? IVAHD can decode and output NV12 which can be attached as a texture. This has been demonstrated in display-kmscube example of omapdrmtest. Are you able to build kmscube with VisionSDK? Thanks Ramprasad + +Ramprasad said: How are you planning to decode jpeg to YUV.? IVAHD can decode and output NV12 which can be attached as a texture. This has been demonstrated in display-kmscube example of omapdrmtest Yes, it's the another way to attach as a texture, we already have the software code that convert JPG to ARGB and ARGB to YUV Ramprasad said: Are you able to build kmscube with VisionSDK? we'are working on it. Will update ASAP Thanks. + +Hi : we now succeed to render the JPG to screen by: 1. use DevIL convert JPG to RGB 2. manual convert RGB to yuv420 3. export yuv420 data as DMAfd 4. use EGLImageKHR load as texture. but we got another issue that unexpected color block on screen, will rise another ticket to discuss. + diff --git a/data2/text/range/15001-20000/768311.txt b/data2/text/range/15001-20000/768311.txt new file mode 100644 index 0000000000000000000000000000000000000000..71d513b0cfbeeb937a37c24f96a09a1c67f0298e --- /dev/null +++ b/data2/text/range/15001-20000/768311.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2-17: YUV422 Output on LCD + +Query Text: +Part Number: TDA2-17 Tool/software: Linux Hi all: We use VISION SDK3.2. We referred to The Implementation of YUV422 Output for SRV. Sgx3Dsrv -> Display_M4 (VID2) by LCD2 Capture_dsswbLink-> Display2_M4 (VID1) by LCD3 The following is my set params: /* Capture DSS WB params */ pPrm->numVipInst = 0; pPrm->numDssWbInst = 1; pPrm->dssWbInst[0].dssWbInstId = VPS_CAPT_INST_DSS_WB1; /* Only supported id */ System_VideoScanFormat scanFormat = SYSTEM_SF_PROGRESSIVE; pPrm->dssWbInst[0].dssWbInputPrms.inNode = SYSTEM_WB_IN_NODE_LCD2;//SYSTEM_WB_IN_NODE_TV; pPrm->dssWbInst[0].dssWbInputPrms.wbInSourceWidth = 1280; pPrm->dssWbInst[0].dssWbInputPrms.wbInSourceHeight =720; pPrm->dssWbInst[0].dssWbInputPrms.wbInWidth = 1280; pPrm->dssWbInst[0].dssWbInputPrms.wbInHeight = 720; pPrm->dssWbInst[0].dssWbInputPrms.wbPosx = 0; pPrm->dssWbInst[0].dssWbInputPrms.wbPosy = 0; pPrm->dssWbInst[0].dssWbInputPrms.wbInSourceDataFmt = SYSTEM_DF_RGB24_888; pPrm->dssWbInst[0].dssWbInputPrms.wbScanFormat = scanFormat; pPrm->dssWbInst[0].dssWbOutputPrms.wbWidth = 1280; pPrm->dssWbInst[0].dssWbOutputPrms.wbHeight = 720; pPrm->dssWbInst[0].dssWbOutputPrms.wbDataFmt = SYSTEM_DF_YUV422I_UYVY; pPrm->dssWbInst[0].dssWbOutputPrms.wbScanFormat = scanFormat; //SYSTEM_SF_INTERLACED; pPrm->dssWbInst[0].numBufs = 4U; chains_common.c lcdType =CHAINS_DISPLAY_TYPE_LCD_10_INCH Int32 ChainsCommon_DualDisplay_StartDisplayCtrl( Chains_DisplayType lcdType, UInt32 displayLCDWidth, UInt32 displayLCDHeight) { Int32 status; DisplayCtrlLink_ConfigParams *pPrm = &gChains_commonObj.dctrlCfgPrms; DisplayCtrlLink_VencInfo *pVInfo; DisplayCtrlLink_OvlyParams *pOvlyPrms; DisplayCtrlLink_OvlyPipeParams *pPipeOvlyPrms; DisplayCtrlLink_OvlyParams ovlyPrms[2]; /* Set the link id */ gChains_commonObj.displayCtrlLinkId = SYSTEM_LINK_ID_DISPLAYCTRL; /* Number of valid entries in vencInfo array */ pPrm->numVencs = 2; /* Bitmask of tied vencs. Two vencs, which uses same pixel clock and whose vsync are synchronized, can be tied together. */ pPrm->tiedVencs = 0; /* Activate the HDMI BSP layer in the Dctrl link. This is not required if there is no HDMI display in use. */ //pPrm->deviceId = DISPLAYCTRL_LINK_USE_HDMI; /* Configure LCD */ pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; pVInfo = &pPrm->vencInfo[0]; pVInfo->tdmMode = DISPLAYCTRL_LINK_TDM_DISABLE; pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD2; pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI2_OUTPUT; pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; /* Below are of dont care for EVM LCD */ pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; pVInfo->mInfo.width = displayLCDWidth; pVInfo->mInfo.height = displayLCDHeight; if(lcdType == CHAINS_DISPLAY_TYPE_LCD_7_INCH) { pVInfo->mInfo.pixelClock = 29232u; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hFrontPorch = 40u; pVInfo->mInfo.hBackPorch = 40u; pVInfo->mInfo.hSyncLen = 48u; pVInfo->mInfo.vFrontPorch = 13u; pVInfo->mInfo.vBackPorch = 29u; pVInfo->mInfo.vSyncLen = 3u; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 4; } else if(lcdType == CHAINS_DISPLAY_TYPE_LCD_10_INCH) { pVInfo->mInfo.pixelClock = 37250U; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 80U;//20U80 pVInfo->mInfo.hSyncLen = 62U; pVInfo->mInfo.hFrontPorch = 48U;//20U48 pVInfo->mInfo.vBackPorch = 12U; pVInfo->mInfo.vSyncLen = 35U; pVInfo->mInfo.vFrontPorch = 6U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; } else if (lcdType == CHAINS_DISPLAY_TYPE_LDC_10_INCH_LCDCTRL_TC358778_MIPI_DSI_1920_1200) { pVInfo->mInfo.pixelClock = 147000U; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 30U; pVInfo->mInfo.hSyncLen = 16U; pVInfo->mInfo.hFrontPorch = 32U; pVInfo->mInfo.vBackPorch = 16U; pVInfo->mInfo.vSyncLen = 2U; pVInfo->mInfo.vFrontPorch = 7U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; } else if (lcdType == CHAINS_DISPLAY_TYPE_FPD) { pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD3; pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI3_OUTPUT; pVInfo->mInfo.width = displayLCDWidth; pVInfo->mInfo.height = displayLCDHeight; pVInfo->mInfo.pixelClock = 69300; /* modified as per panel-tlc59108.c form linux*/ pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 44U; pVInfo->mInfo.hSyncLen = 32U; pVInfo->mInfo.hFrontPorch = 48U; pVInfo->mInfo.vBackPorch = 12U; pVInfo->mInfo.vSyncLen = 7U; pVInfo->mInfo.vFrontPorch = 4U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; /* Below are of dont care for EVM LCD */ pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_RGB24_888; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_24BIT; pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; /* Configure overlay params */ pOvlyPrms = &ovlyPrms[0]; pOvlyPrms->vencId = pVInfo->vencId; pOvlyPrms->deltaLinesPerPanel = 0; pOvlyPrms->alphaBlenderEnable = 0; pOvlyPrms->backGroundColor = 0x10; pOvlyPrms->colorKeyEnable = 1; pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; } else { UTILS_assert(NULL); } /* Configure LCD overlay params */ pVInfo->mode = 0; pVInfo->isInputPipeConnected[0] = FALSE; pVInfo->isInputPipeConnected[1] = TRUE; pVInfo->isInputPipeConnected[2] = TRUE; pVInfo->isInputPipeConnected[3] = TRUE; pVInfo->writeBackEnabledFlag = TRUE; pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_RGB24_888; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_24BIT; pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; if(lcdType != CHAINS_DISPLAY_TYPE_FPD) { pOvlyPrms = &ovlyPrms[0]; pOvlyPrms->vencId = pVInfo->vencId; pOvlyPrms->deltaLinesPerPanel = 0; pOvlyPrms->alphaBlenderEnable = 0; pOvlyPrms->backGroundColor = 0x10; pOvlyPrms->colorKeyEnable = 1; pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; } //************************************************************************** pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; pVInfo = &pPrm->vencInfo[1]; pVInfo->tdmMode = DISPLAYCTRL_LINK_TDM_24BIT_TO_8BIT; pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD3; pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI3_OUTPUT; pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; /* Below are of dont care for EVM LCD */ pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; pVInfo->mInfo.width = displayLCDWidth; pVInfo->mInfo.height = displayLCDHeight; if(lcdType == CHAINS_DISPLAY_TYPE_LCD_7_INCH) { pVInfo->mInfo.pixelClock = 29232u; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hFrontPorch = 40u; pVInfo->mInfo.hBackPorch = 40u; pVInfo->mInfo.hSyncLen = 48u; pVInfo->mInfo.vFrontPorch = 13u; pVInfo->mInfo.vBackPorch = 29u; pVInfo->mInfo.vSyncLen = 3u; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 4; } else if(lcdType == CHAINS_DISPLAY_TYPE_LCD_10_INCH) { pVInfo->mInfo.pixelClock = 74500U; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 20U;//20U80 pVInfo->mInfo.hSyncLen = 62U; pVInfo->mInfo.hFrontPorch = 20U;//20U48 pVInfo->mInfo.vBackPorch = 12U; pVInfo->mInfo.vSyncLen = 35U; pVInfo->mInfo.vFrontPorch = 6U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; } else if (lcdType == CHAINS_DISPLAY_TYPE_LDC_10_INCH_LCDCTRL_TC358778_MIPI_DSI_1920_1200) { pVInfo->mInfo.pixelClock = 147000U; pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 30U; pVInfo->mInfo.hSyncLen = 16U; pVInfo->mInfo.hFrontPorch = 32U; pVInfo->mInfo.vBackPorch = 16U; pVInfo->mInfo.vSyncLen = 2U; pVInfo->mInfo.vFrontPorch = 7U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; } else if (lcdType == CHAINS_DISPLAY_TYPE_FPD) { pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD3; pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI3_OUTPUT; pVInfo->mInfo.width = displayLCDWidth; pVInfo->mInfo.height = displayLCDHeight; pVInfo->mInfo.pixelClock = 69300; /* modified as per panel-tlc59108.c form linux*/ pVInfo->mInfo.fps = 60U; pVInfo->mInfo.hBackPorch = 44U; pVInfo->mInfo.hSyncLen = 32U; pVInfo->mInfo.hFrontPorch = 48U; pVInfo->mInfo.vBackPorch = 12U; pVInfo->mInfo.vSyncLen = 7U; pVInfo->mInfo.vFrontPorch = 4U; pVInfo->vencDivisorInfo.divisorLCD = 1; pVInfo->vencDivisorInfo.divisorPCD = 1; pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; /* Below are of dont care for EVM LCD */ pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_RGB24_888; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_24BIT; pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; /* Configure overlay params */ pOvlyPrms = &ovlyPrms[1]; pOvlyPrms->vencId = pVInfo->vencId; pOvlyPrms->deltaLinesPerPanel = 0; pOvlyPrms->alphaBlenderEnable = 0; pOvlyPrms->backGroundColor = 0x10; pOvlyPrms->colorKeyEnable = 1; pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; } else { UTILS_assert(NULL); } /* Configure LCD overlay params */ pVInfo->mode = 0; pVInfo->isInputPipeConnected[0] = TRUE; pVInfo->isInputPipeConnected[1] = FALSE; pVInfo->isInputPipeConnected[2] = FALSE; pVInfo->isInputPipeConnected[3] = FALSE; pVInfo->writeBackEnabledFlag =FALSE; pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_BGR16_565; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_16BIT; pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; if(lcdType != CHAINS_DISPLAY_TYPE_FPD) { pOvlyPrms = &ovlyPrms[1]; pOvlyPrms->vencId = pVInfo->vencId; pOvlyPrms->deltaLinesPerPanel = 0; pOvlyPrms->alphaBlenderEnable = 0; pOvlyPrms->backGroundColor = 0x10; pOvlyPrms->colorKeyEnable = 0; pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; } /* Setting HDMI overlay pipe parameters */ pPipeOvlyPrms = &gChains_commonObj.pipeParams[0]; pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_VID1; pPipeOvlyPrms->globalAlpha = 0xFF; pPipeOvlyPrms->preMultiplyAlpha = 0; pPipeOvlyPrms->zorderEnable = TRUE; pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER0; /* Setting LCD overlay pipe parameters */ pPipeOvlyPrms = &gChains_commonObj.pipeParams[1]; pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_VID2; pPipeOvlyPrms->globalAlpha = 0xFF; pPipeOvlyPrms->preMultiplyAlpha = 0; pPipeOvlyPrms->zorderEnable = TRUE; pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER1; /* Setting PIP overlay pipe parameters on LCD */ pPipeOvlyPrms = &gChains_commonObj.pipeParams[2]; pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_VID3; pPipeOvlyPrms->globalAlpha = 0xFF; pPipeOvlyPrms->preMultiplyAlpha = 0; pPipeOvlyPrms->zorderEnable = TRUE; pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER2; /* Configure graphics overlay for HDMI */ pPipeOvlyPrms = &gChains_commonObj.pipeParams[3]; pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_GFX1; pPipeOvlyPrms->globalAlpha = 0xFF; pPipeOvlyPrms->preMultiplyAlpha = 0; pPipeOvlyPrms->zorderEnable = TRUE; pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER3; /* Create, configure and start the Display Ctrl link */ status = System_linkCreate(gChains_commonObj.displayCtrlLinkId, NULL, 0); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_CONFIG, &gChains_commonObj.dctrlCfgPrms, sizeof(DisplayCtrlLink_ConfigParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PARAMS, &ovlyPrms[0], sizeof(DisplayCtrlLink_OvlyParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PARAMS, &ovlyPrms[1], sizeof(DisplayCtrlLink_OvlyParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, &gChains_commonObj.pipeParams[0], sizeof(DisplayCtrlLink_OvlyPipeParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, &gChains_commonObj.pipeParams[1], sizeof(DisplayCtrlLink_OvlyPipeParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, &gChains_commonObj.pipeParams[2], sizeof(DisplayCtrlLink_OvlyPipeParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); status = System_linkControl(gChains_commonObj.displayCtrlLinkId, DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, &gChains_commonObj.pipeParams[3], sizeof(DisplayCtrlLink_OvlyPipeParams), TRUE); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); return status; } vps_cfgDss.h TDM set static inline void VpsDssDispcAdvLcdTdmConfig_init( Vps_DssDispcAdvLcdTdmConfig *advLcdTdmCfg) { if (advLcdTdmCfg != NULL) { // advLcdTdmCfg->tdmEnable = 0U; advLcdTdmCfg->tdmEnable = 1U; advLcdTdmCfg->bitAlignPixel1Cycle1 = 0U; advLcdTdmCfg->bitAlignPixel1Cycle2 = 0U; advLcdTdmCfg->bitAlignPixel1Cycle3 = 0U; advLcdTdmCfg->bitAlignPixel2Cycle1 = 0U; advLcdTdmCfg->bitAlignPixel2Cycle2 = 0U; advLcdTdmCfg->bitAlignPixel2Cycle3 = 0U; advLcdTdmCfg->noBitsPixel1Cycle1 = 8U; advLcdTdmCfg->noBitsPixel1Cycle2 = 8U; // advLcdTdmCfg->noBitsPixel1Cycle3 = 8U; advLcdTdmCfg->noBitsPixel1Cycle3 = 0U; advLcdTdmCfg->noBitsPixel2Cycle1 = 0U; advLcdTdmCfg->noBitsPixel2Cycle2 = 0U; advLcdTdmCfg->noBitsPixel2Cycle3 = 0U; advLcdTdmCfg->tdmUnusedBits = 0U; //advLcdTdmCfg->tdmCycleFormat = 0x2U; advLcdTdmCfg->tdmCycleFormat = 0x1U; advLcdTdmCfg->tdmParallelMode = 0x0U; } } The image size is correct, but the color space is incorrect. Is there something wrong with the setting? Would you please give me advice for it? Regards, Victor + +Responses: +Hi Victor, Do you want to YUV422 output from DSS? over which interface? ie discrete or embedded sync interface? Regards, Brijesh + +Hi Brijesh, I want to Discrete interface. Regards, Victor + +hi Victor, DSS natively does not support YUV422 output over discrete sync interface. But i have a way. In that case, you need to treat input YUV422 interleaved data as if it is RGB565 data and configure DSS input video pipeline as receiving RGB565 data. You need to disable all pixels processing in this pipeline, disable blending in overlay manager, connect only this pipeline to the overlay manager.. At the output of overlay manager, convert RGB24 data to RGB565 by setting videoifSize field and then enable TDM mode to send out single pixel over two clock cycles. This is how you could get YUV422 over 8bit discrete sync interface. All the pixel processing that you required, you need to do using another pipeline, in memory to memory mode.. Rgds, Brijesh + diff --git a/data2/text/range/15001-20000/778845.txt b/data2/text/range/15001-20000/778845.txt new file mode 100644 index 0000000000000000000000000000000000000000..358332a0f27cee70cbf5e0eee4bcc65546db6733 --- /dev/null +++ b/data2/text/range/15001-20000/778845.txt @@ -0,0 +1,312 @@ +Ticket Name: Linux/TDA2: About the efficiency of the tda2 DDR bus + +Query Text: +Part Number: TDA2 Tool/software: Linux Our current problem: When the DVR function is always turned on, if we want to add other functions, the efficiency of the DDR bus will become lower, resulting in other CPU performance degradation, and the performance of the TDA2Sx chip cannot be fully utilized. Question 1: At present, our hardware design TDA2 DDR bandwidth is more than 8,000 MB, but why the DDR bandwidth of the emif1 plus emif2 port shown in the figure below is more than 4,000 MB? What are its main influence factors? (We didn't use ECC DDR) My question 2: How can we optimize the IVA module? The frequency of accessing the DDR by the IVA module is reduced to about 500 MB/s. As shown in the red box below, the IVA access DDR frequency takes up 55% of the total DDR bandwidth. At present, the DVR solution we use is Capture to capture 4 channels of 1280x720P@30 frames, splicing 4 original images into 1 channel 2560*1440 image, then inputting to the encode module to generate H264 code stream, and finally encapsulating H264 code stream as Mp4 file. + +Responses: +Hi Feng, The DDR efficiency as rule of thumb is 60% of the ideal throughput. So if you have 2 EMIFs interleaved, then you would see typically 2 x 532 x 2 x 4 x 0.6 = 5107.2 MBps. In your case it seems the IVA loading is going down with additional initiators. You can try placing a bandwidth regulator on the IVA to set a minimum bandwidth. You would find more details in Section 3.1 Bandwidth Regulator of the www.ti.com/.../sprabx1a.pdf application note. Also, see an example of the IVA Bandwidth regulator in Section 4.2 Pseudo Real-Time Video Subsystem Performance (fps) of www.ti.com/.../sprabx0.pdf Thanks and Regards, Piyali + +Hi，Piyali About the bandwidth regulator settings, we are currently using the default settings in TI's SDK, and we have not confirmed that the feature is turned on. Do you mean that our software needs to be adjusted based on the default settings of the SDK， Right? Thanks and Regards, + +Hi Feng, Yes that's right, the default SDK does not set the Bandwidth regulator as this is final usecase dependent. You can see the reference API in vision_sdk\links_fw\src\rtos\utils_common\src\tda2xx\utils_l3_emif_bw.c Utils_setBWRegulator to set this. Thanks and Regards, Piyali + +Hi Piyali, We have debugged the corresponding API and have not achieved the expected results. With the screenshots above and our DVR solution, we want to know why the IVA module will take up 1574MB/s of bandwidth. Can you explain the specific process so that we can evaluate where we can cut down the requirements or optimize the configuration. + +Hi Feng, Can you please help us understand the debug you have done so far? The way to go about the debug is that you should first consider at what IVA bandwidth you are able to achieve the expected IVA FPS. This is something you can measure in a lightly loaded system. Once you have this number, you can set this to the BW regulator with this IVA bandwidth to allow the IVA to get the required priority in the system when other initiators are generating traffic to the DDR. If this does not help, it would be good to see if there are any initiators in the system which are generating high and peak traffic (typical candidates are GPU, VPE, BB2D). These initiators would generate peak traffic and finish early even though their avg BW requirement may not be so high. Then placing a bandwidth limiter on these IPs would help to maintain the average bandwidth and not impact other initiators. Thanks and Regards, Piyali + +Hi Feng, We haven't heard back from you on this one. I hope you have been able to proceed. Thanks and Regards, Piyali + +Hi Piyali， What you recommend is to solve the situation that some modules use high bandwidth values instantaneously when using DDR? If the average value of some modules using DDR is high, your method may not work. If reduce the average of the IVA module, such as down to 500MB/s, We are worried that the frame rate of the encoding will drop.Do you agree with me? Thanks and Regards, + +Hi Feng, You are right, if the sum of the average DDR traffic of all the modules is higher than what the device can support, then you would need to optimize the DDR traffic either through spec trade off or to a certain extent optimized utilization of internal memories along with DDR memory. In the case where the average total BW is lower than the practical limit of the DDR throughput a combination of Bandwidth limiter for the peak traffic generators, priority settings and Bandwidth regulators for the traffic which needs to be boosted. It is not clear from your post what have you tried so far. If you would help us understand what settings have you tried so far and what was the impact of setting these, we can help you better. Thanks and Regards, Piyali + +Hi Piyali， Attachment is the content we try to configure bandwdith, please help us to see if it can be optimized. Our test results, when modifying the bus priority configuration, it seems that the bandwidth of the IVA module using DMA is higher, and the IVA module will have frame loss. In addition, the previous reply mentioned that DDR can be used to 60% of the ideal state. How to test, please provide a test plan. utils_l3_emif_bw.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + ******************************************************************************* + * + * \file utils_l3_emif_bw.c + * + * \brief This file has the implementation of the APIs to config bandwdith + * related controls at L3 and EMIF + * + * \version 0.0 (Dec 2013) : [KC] First version + * + ******************************************************************************* + */ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include + +#define DISPC_GLOBAL_MFLAG_ATTRIBUTE (volatile UInt32*)(0x5800185C) +#define DISPC_GFX_MFLAG_THRESHOLD (volatile UInt32*)(0x58001860) +#define DISPC_VID1_MFLAG_THRESHOLD (volatile UInt32*)(0x58001864) +#define DISPC_VID2_MFLAG_THRESHOLD (volatile UInt32*)(0x58001868) +#define DISPC_VID3_MFLAG_THRESHOLD (volatile UInt32*)(0x5800186C) + +#define DMM_EMERGENCY (volatile UInt32*)(0x4E000020) +#define DMM_PEG_PRIO_0_ADDR (volatile UInt32*)(0x4E000620) +#define CTRL_CORE_EMIF_INITIATOR_PRIORITY_1_ADDR (volatile UInt32*)(0x4A002420) + +Int32 Utils_setDssMflagMode(Utils_DssMflagMode mode) +{ + *(DISPC_GLOBAL_MFLAG_ATTRIBUTE) + = (UInt32)(((UInt32)mode & (UInt32)0x3U) /* MFLAG_CTRL */ + | + ((UInt32)1U << (UInt32)2U)) /* MFLAG_START + * 0x1: Even at the beginning of the frame when the DMA + * buffer is empty, MFLAG_CTRL bitfield is used to + * determine how MFLAG signal for each pipeline shall be + * driven. + */ + ; + return SYSTEM_LINK_STATUS_SOK; +} + +Int32 Utils_setDssMflagThreshold(System_DssDispcPipes displayPipeId, + UInt32 thresHigh, + UInt32 thresLow) +{ + UInt32 value; + Int32 status=SYSTEM_LINK_STATUS_SOK; + volatile UInt32 *pReg; + + value = (thresLow & (UInt32)0xFFFFU) | ((thresHigh & (UInt32)0xFFFFU) << (UInt32)16U); + + switch(displayPipeId) + { + case SYSTEM_DSS_DISPC_PIPE_VID1: + pReg = DISPC_VID1_MFLAG_THRESHOLD; + break; + case SYSTEM_DSS_DISPC_PIPE_VID2: + pReg = DISPC_VID2_MFLAG_THRESHOLD; + break; + case SYSTEM_DSS_DISPC_PIPE_VID3: + pReg = DISPC_VID3_MFLAG_THRESHOLD; + break; + case SYSTEM_DSS_DISPC_PIPE_GFX1: + pReg = DISPC_GFX_MFLAG_THRESHOLD; + break; + default: + status = SYSTEM_LINK_STATUS_EFAIL; + break; + } + + if(status==SYSTEM_LINK_STATUS_SOK) + { + *pReg = value; + } + + return status; +} + +Int32 Utils_setDmmPri(Utils_DmmInitiatorId initiatorId, UInt32 priValue) +{ + volatile UInt32 *pPegPrioReg = DMM_PEG_PRIO_0_ADDR; + Int32 status = SYSTEM_LINK_STATUS_SOK; + UInt32 index; + UInt32 shift; + + index = initiatorId / (UInt32)8U; + shift = (initiatorId % (UInt32)8U) * (UInt32)4U; + + if(index < (UInt32)8U) + { + status = SYSTEM_LINK_STATUS_EFAIL; + } + else + { + priValue = (UInt32)0x8U | (priValue & (UInt32)0x7U); + + pPegPrioReg[index] = priValue << shift; + + Vps_printf(" DMM_PEG_PRIO_%d (0x%08x) = 0x%08x\n", + index, + &pPegPrioReg[index], + pPegPrioReg[index] + ); + } + + return status; +} + +Int32 Utils_setDmmMflagEmergencyEnable(Bool enable) +{ + UInt32 value; + + value = *DMM_EMERGENCY; + + if(enable) + { + value |= (UInt32)0x1U; + } + else + { + value &= ~(UInt32)0x1U; + } + + + *DMM_EMERGENCY = value; + + return SYSTEM_LINK_STATUS_SOK; +} + +Int32 Utils_setEmifPri(Utils_EmifInitiatorId initiatorId, UInt32 priValue) +{ + volatile UInt32 *pEmifPrioReg = CTRL_CORE_EMIF_INITIATOR_PRIORITY_1_ADDR; + Int32 status = SYSTEM_LINK_STATUS_SOK; + UInt32 index; + UInt32 shift; + + index = initiatorId / (UInt32)8U; + shift = (initiatorId % (UInt32)8U) * (UInt32)4U; + + if(index < (UInt32)7U) + { + status = SYSTEM_LINK_STATUS_EFAIL; + } + else + { + + priValue = (priValue & (UInt32)0x7U); + + /* clear field */ + pEmifPrioReg[index] &= ~((UInt32)0x7U << shift); + + /* set field */ + pEmifPrioReg[index] |= (priValue << shift); + + Vps_printf(" CTRL_CORE_EMIF_INITIATOR_PRIORITY_%d (0x%08x) = 0x%08x\n", + index + (UInt32)1U, + &pEmifPrioReg[index], + pEmifPrioReg[index] + ); + } + + return status; +} + +#define L3_BW_LIMITER_BANDWIDTH_FRACTIONAL_GPU_P1 (volatile UInt32*)(0x44805B08) +#define L3_BW_LIMITER_BANDWIDTH_INTEGER_GPU_P1 (volatile UInt32*)(0x44805B0C) +#define L3_BW_LIMITER_WATERMARK_0_GPU_P1 (volatile UInt32*)(0X44805B10) +#define L3_BW_LIMITER_CLEARHISTORY_GPU_P1 (volatile UInt32*)(0X44805B14) + +#define L3_BW_LIMITER_BANDWIDTH_FRACTIONAL_GPU_P2 (volatile UInt32*)(0x44805C08) +#define L3_BW_LIMITER_BANDWIDTH_INTEGER_GPU_P2 (volatile UInt32*)(0x44805C0C) +#define L3_BW_LIMITER_WATERMARK_0_GPU_P2 (volatile UInt32*)(0X44805C10) +#define L3_BW_LIMITER_CLEARHISTORY_GPU_P2 (volatile UInt32*)(0X44805C14) + +Int32 Utils_setBWLimiter(Utils_DmmInitiatorId initiatorId, UInt32 BW_valueInMBps) +{ + UInt32 BW; + UInt32 BW_int; + UInt32 BW_frac; + + BW = (UInt32) (BW_valueInMBps/(UInt32)8.3125); + BW_int = (BW & (UInt32)0xFFFFFFE0U) >> (UInt32)5U; + BW_frac = (BW & (UInt32)0x1FU); + + if (UTILS_DMM_INITIATOR_ID_GPU_P1 == initiatorId) + { + *L3_BW_LIMITER_BANDWIDTH_FRACTIONAL_GPU_P1 = BW_frac; + *L3_BW_LIMITER_BANDWIDTH_INTEGER_GPU_P1 = BW_int; + *L3_BW_LIMITER_WATERMARK_0_GPU_P1= (UInt32)0U; + *L3_BW_LIMITER_CLEARHISTORY_GPU_P1 = (UInt32)1U; + } + + if (UTILS_DMM_INITIATOR_ID_GPU_P2 == initiatorId) + { + *L3_BW_LIMITER_BANDWIDTH_FRACTIONAL_GPU_P2 = BW_frac; + *L3_BW_LIMITER_BANDWIDTH_INTEGER_GPU_P2 = BW_int; + *L3_BW_LIMITER_WATERMARK_0_GPU_P2 = (UInt32)0U; + *L3_BW_LIMITER_CLEARHISTORY_GPU_P2 = (UInt32)1U; + } + + return SYSTEM_LINK_STATUS_SOK; +} + +#define L3_BW_REGULATOR_BANDWIDTH_IVA (volatile UInt32*)(0x44805008) +#define L3_BW_REGULATOR_WATERMARK_IVA (volatile UInt32*)(0x4480500C) +#define L3_BW_REGULATOR_CLEARHISTORY_IVA (volatile UInt32*)(0x44805014) + +Int32 Utils_setBWRegulator(Utils_DmmInitiatorId initiatorId, UInt32 BW_valueInMBps) +{ + UInt32 BW, WM; + + BW = (UInt32) (BW_valueInMBps/(UInt32)8.3125); + WM = (UInt32) (BW_valueInMBps * (UInt32)1); /* 1 MicroSec window */ + + if (UTILS_DMM_INITIATOR_ID_IVA == initiatorId) + { + *L3_BW_REGULATOR_BANDWIDTH_IVA = BW; + *L3_BW_REGULATOR_WATERMARK_IVA = WM; + *L3_BW_REGULATOR_CLEARHISTORY_IVA = (UInt32)1U; + } + + return SYSTEM_LINK_STATUS_SOK; +} + +Hi Feng, I see you have attached the Vision SDK API files and not the actual configuration you have used in your system. I did not quite understand this comment : "when modifying the bus priority configuration, it seems that the bandwidth of the IVA module using DMA is higher, and the IVA module will have frame loss." If changing the IVA priority to higher is increasing the BW to the level at which IVA is able to meet the usecase requirements, you should not be observing frame drops. <60% of the ideal throughput of DDR is what you should be planning for in your usecase. You can look at the performance application note of the device www.ti.com/.../sprac21.pdf section 19.2 for data measured in bare metal environment without software overheads. thanks and Regards, Piyali + diff --git a/data2/text/range/15001-20000/788642.txt b/data2/text/range/15001-20000/788642.txt new file mode 100644 index 0000000000000000000000000000000000000000..8023e6d94ac006633c71c2ecdd7d07ecbc180341 --- /dev/null +++ b/data2/text/range/15001-20000/788642.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2-17: Camera Capture + +Query Text: +Part Number: TDA2-17 Other Parts Discussed in Thread: TVP5150, TVP5158, TVP5151 Tool/software: Linux Hi, I have been working the past few days to get camera data streaming into my system. I am capturing from a pair of TVP5151s on a shared I2C bus and pulling data in to VIN1A and VIN3A. I have worked through some device tree issues and have both the VIP and 5151 recognized but my yavta commands fail to detect the presence of /dev/video*. I am using Vision SDK 3.05 for building linux. root@dra7xx-evm:~# dmesg | grep vip [ 2.151977] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.158793] vip 48990000.vip: loading firmware vpdma-1b8.bin [ 2.176102] vip 48970000.vip: VPDMA firmware loaded [ 2.181071] vip1-s0: Port A: Using subdev tvp5150 3-005d for capture [ 2.187709] vip 48990000.vip: VPDMA firmware loaded [ 2.192847] vip1-s0: device registered as video0 [ 2.197526] vip2-s0: Port A: Using subdev tvp5150 3-005c for capture [ 2.204066] vip2-s0: device registered as video1 root@dra7xx-evm:~# ls /dev/video ls: /dev/video: No such file or directory root@dra7xx-evm:~# dmesg | grep vip [ 2.151977] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.158793] vip 48990000.vip: loading firmware vpdma-1b8.bin [ 2.176102] vip 48970000.vip: VPDMA firmware loaded [ 2.181071] vip1-s0: Port A: Using subdev tvp5150 3-005d for capture [ 2.187709] vip 48990000.vip: VPDMA firmware loaded [ 2.192847] vip1-s0: device registered as video0 [ 2.197526] vip2-s0: Port A: Using subdev tvp5150 3-005c for capture [ 2.204066] vip2-s0: device registered as video1 root@dra7xx-evm:~# ls /dev/video0 /dev/video0 root@dra7xx-evm:~# ls /dev/video1 /dev/video1 root@dra7xx-evm:~# yavta /dev/video0 Error opening device /dev/video0: No such device (19). root@dra7xx-evm:~# yavta /dev/video1 Error opening device /dev/video1: No such device (19). My device tree entries are as follows: /* modules used by BIOS, disable from Linux */ //DISABLE_COMPLETE(vip1); //DISABLE_COMPLETE(vip2); //DISABLE_COMPLETE(vip3); &i2c4 { status = "okay"; clock-frequency = <400000>; tvp5150@5c { compatible = "ti,tvp5150"; reg = <0x5c>; //pdn-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; //reset-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; //hysnc-active=<0>; //vsync-active=<0>; port { tvp5150_2: endpoint { remote-endpoint = <&vin3a>; channels = <0>; //bus-width = <8>; }; }; }; tvp5150@5d { compatible = "ti,tvp5150"; reg = <0x5d>; //pdn-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; //reset-gpios = <&gpio3 17 GPIO_ACTIVE_LOW>; //hysnc-active=<0>; //vsync-active=<0>; port { tvp5150_1: endpoint { remote-endpoint = <&vin1a>; channels = <0>; //bus-width = <8>; }; }; }; }; &vip1 { status = "okay"; }; &vip2 { status = "okay"; }; &vin1a { status = "okay"; endpoint { slave-mode; remote-endpoint = <&tvp5150_1>; }; }; &vin3a { status = "okay"; endpoint { slave-mode; remote-endpoint = <&tvp5150_2>; }; }; Thanks for any help. Please let me know if there is additional information I need to contribute to help the process. + +Responses: +Hi Joseph, I have pinged the V4L2 experts to help. Meanwhile you can try this script: git.ti.com/.../vip_diagnostic.sh and those commands: processors.wiki.ti.com/.../Linux_Core_VIP_User's_Guide to see if they can give you some directions. Regards, Yordan + +HI Joseph, The error "No such file or directory" is because the driver is returning failure error ENODEV. Of course the video device /dev/video0 or /dev/video1 exist. You have confirmed it by running ls /dev/video* When you open the device, corresponding V4L2 subdevice driver (TVP driver) returns ENODEV and hence the failure. From the tvp5158.c driver, I can tell that the ENODEV is returned when the TVP device video detect status is not active. Make sure that the video decoder is able to detect the video correctly when the device is open. Please check return values from the subdevice driver ops Regards, Nikhil D + +Hi Nikhil, Thank you for the help. I am reviewing your feedback. Admittedly, this work falls outside of my area of expertise (I'm a hardware engineer) but I'm not seeing any obvious issues nor do I understand why the TVP5158 driver would be getting calls when my device is a TVP5151 running the TVP5150 driver. Can you clarify that your statements regarding opening of the device? Are you suggesting that the NTSC stream needs to be active before the TVP5151 is registered? My first i2cdump immediately after boot is as follows: i2cdump -f -y 3 0x5d No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 02 15 00 6f 00 00 10 60 00 80 80 00 80 47 00 02 ??.o..?`.??.?G.? 10: 00 00 00 00 00 01 80 00 00 00 0c 54 00 00 00 00 .....??...?T.... 20: 00 00 00 00 00 00 00 20 02 00 00 00 77 55 0f 01 ....... ?...wU?? 30: 00 0f 00 00 00 00 00 00 00 98 01 00 19 00 00 00 .?.......??.?... 40: 4e 00 00 00 5f 00 00 00 40 00 00 00 4f 00 00 00 N..._...@...O... 50: 5e 00 00 00 2a 00 00 00 5a 00 00 00 45 00 00 00 ^...*...Z...E... 60: 47 00 00 00 68 00 00 00 4e 00 00 00 66 00 00 00 G...h...N...f... 70: 32 00 00 00 42 00 00 00 4b 00 00 00 3f 00 00 00 2...B...K...?... 80: 51 51 01 00 00 02 80 00 10 10 00 00 81 01 02 01 QQ?..??.??..???? 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ b0: 71 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 q............... c0: 40 00 04 67 20 00 40 00 80 00 00 4e 00 01 01 00 @.?g .@.?..N.??. d0: 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ f0: ff ff ff ff ff ff ff ff ff ff ff ff 7f 00 00 00 ............?... Running i2cdump a second time yields this: root@dra7xx-evm:~# i2cdump -f -y 3 0x5d No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 00 15 00 00 dc 00 10 60 00 80 80 00 80 47 00 00 .?..?.?`.??.?G.. 10: 00 00 00 00 00 01 80 00 00 00 0c 14 00 00 00 00 .....??...??.... 20: 00 00 00 00 00 00 00 00 00 00 00 00 ab 7a 0f 01 ............?z?? 30: 00 0f 00 00 00 00 00 00 00 98 01 00 84 84 46 84 .?.......??.??F? 40: 84 84 f5 84 84 84 bf 84 84 84 f2 84 84 84 f7 84 ???????????????? 50: 84 84 4d 84 84 84 8d 84 84 84 38 84 84 84 41 84 ??M???????8???A? 60: 84 84 b1 84 84 84 ed 00 00 00 8b 00 00 00 85 00 ???????...?...?. 70: 00 84 80 84 84 84 34 84 84 84 01 84 84 84 84 84 .?????4????????? 80: 51 51 01 00 00 02 80 00 10 10 00 00 81 01 02 01 QQ?..??.??..???? 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ b0: 71 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 q............... c0: 40 00 04 67 20 00 40 00 80 00 00 4e 00 01 01 00 @.?g .@.?..N.??. d0: 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ f0: ff ff ff ff ff ff ff ff ff ff ff ff 7f 00 00 00 ............?... I don't understand why the initial I2C dump gives different output than subsequent runs but it does seem strange to me. Here's the output of the vip_diagnostic script. I modified the i2cbus, desaddr, and basebus values to match my configuration. =====================VIP diagnostic script=================== Basic tests to debug capture issues quickly VIP 1 Slice 0 Port A <--> LVDS cam1 => Check if the DE-SERIALIZER is accessible FAIL => Check if the SERIALIZER is connected FAIL Error: Read failed => Check if the SERIALIZER is accessible./vip_diagnostic.sh: line 257: [: 0xb0: unary operator expected FAIL Error: Read failed => Check if the CAMERA clock is present./vip_diagnostic.sh: line 257: [: 0x15: unary operator expected FAIL Error: Write failed Error: Read failed => Check if the CAMERA is accessible./vip_diagnostic.sh: line 257: [: 0x35: unary operator expected FAIL => Check if the parser is configured PASS => Check if the port is detecting the frame size FAIL VPDMA descriptor dump |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0xAE9A0000 | 0xEE9A6000 | | 0xAE9A0004 | 0x000D5148 | | 0xAE9A0008 | 0x00000000 | | 0xAE9A000C | 0x00000000 | | 0xAE9A0010 | 0x65642F2E | | 0xAE9A0014 | 0x65636976 | | 0xAE9A0018 | 0x69762F73 | | 0xAE9A001C | 0x61757472 | | 0xAE9A0020 | 0x74742F6C | | 0xAE9A0024 | 0x74702F79 | | 0xAE9A0028 | 0x2F356379 | | 0xAE9A002C | 0x65776F70 | | 0xAE9A0030 | 0x00000072 | | 0xAE9A0034 | 0x6F72006D | | 0xAE9A0038 | 0x75735F65 | | 0xAE9A003C | 0x6E657073 | | 0xAE9A0040 | 0x5F646564 | |----------------------------| VPDMA data type:- 0x3b VPDMA channel number used:- 0 VPDMA write descriptor dump |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0x65642F28 | 0x25428601 | | 0x65642F2C | 0x43410240 | | 0x65642F30 | 0x30CB518A | | 0x65642F34 | 0x80733CC0 | | 0x65642F38 | 0x8DD852CF | | 0x65642F3C | 0x0500824F | | 0x65642F40 | 0x05E947C0 | | 0x65642F44 | 0x0208A81C | | 0x65642F48 | 0x4EB14422 | |----------------------------| Frame size written:- 36312 x 207 Crossbar mapping:- | 80 | 0x4A002ADC | 351 | VIP1_IRQ_1 | VIP1 | VIP1 interrupt 1 | Crossbar source 351 VIP1_IRQ_1 mapped to MPU GIC 112 Interrupt count:- =============================END============================= If all of these tests PASS and still there is a problem, go home :) I'm still working on debugging this problem would but appreciate some extra hand-holding. To the best I can tell, I seem to be getting a good NTSC signal into the AIN1A port on the TVP5151 and am getting good looking 27MHz SCLK and data signals at its output. When reading register 0x88, I also get varying values (mostly 0x0e, some 0x8e and 0x1e) which indicates to me that the TVP5151 is receiving the NTSC signal just fine. For some additional info, I added "ti_vip.debug=3" to my boot string: root@dra7xx-evm:~# dmesg | grep vip [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=1de6a7a1-02 rw rootwait ip=none mem=1024M cma=64M ti_vip.debug=3 [ 2.101313] vip1-s0: vip_set_slice_path: [ 2.101324] vip1-s0: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000 [ 2.101695] vip1-s1: vip_set_slice_path: [ 2.101706] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80008000 [ 2.101740] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.108152] vip2-s0: vip_set_slice_path: [ 2.108162] vip2-s0: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000 [ 2.108528] vip2-s1: vip_set_slice_path: [ 2.108538] vip2-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80008000 [ 2.108571] vip 48990000.vip: loading firmware vpdma-1b8.bin [ 2.126127] vip 48970000.vip: VPDMA firmware loaded [ 2.131097] vip1-s0: can't get next endpoint: loop: 1 [ 2.131104] vip1-s0: register async notifier for 1 subdevs [ 2.131113] vip1-s0: vip_async_bound [ 2.131121] vip1-s0: Port A: Using subdev tvp5150 3-005d for capture [ 2.137759] vip 48990000.vip: VPDMA firmware loaded [ 2.142718] vip2-s0: can't get next endpoint: loop: 1 [ 2.142726] vip2-s0: register async notifier for 1 subdevs [ 2.142742] vip1-s0: subdev tvp5150 3-005d: code: 2006 idx: 0 [ 2.142750] vip1-s0: matched fourcc: NV12: code: 2006 idx: 0 [ 2.142757] vip1-s0: matched fourcc: UYVY: code: 2006 idx: 1 [ 2.142764] vip1-s0: matched fourcc: YUYV: code: 2006 idx: 2 [ 2.142770] vip1-s0: matched fourcc: VYUY: code: 2006 idx: 3 [ 2.142776] vip1-s0: matched fourcc: YVYU: code: 2006 idx: 4 [ 2.142782] vip1-s0: matched fourcc: RGB3: code: 2006 idx: 5 [ 2.142788] vip1-s0: matched fourcc: RGB4: code: 2006 idx: 6 [ 2.142794] vip1-s0: matched fourcc: BGR3: code: 2006 idx: 7 [ 2.142800] vip1-s0: matched fourcc: BGR4: code: 2006 idx: 8 [ 2.142980] vip1-s0: device registered as video0 [ 2.147647] vip1-s0: vip_async_complete [ 2.147667] vip2-s0: vip_async_bound [ 2.147674] vip2-s0: Port A: Using subdev tvp5150 3-005c for capture [ 2.154053] vip2-s0: subdev tvp5150 3-005c: code: 2006 idx: 0 [ 2.154062] vip2-s0: matched fourcc: NV12: code: 2006 idx: 0 [ 2.154069] vip2-s0: matched fourcc: UYVY: code: 2006 idx: 1 [ 2.154075] vip2-s0: matched fourcc: YUYV: code: 2006 idx: 2 [ 2.154081] vip2-s0: matched fourcc: VYUY: code: 2006 idx: 3 [ 2.154087] vip2-s0: matched fourcc: YVYU: code: 2006 idx: 4 [ 2.154093] vip2-s0: matched fourcc: RGB3: code: 2006 idx: 5 [ 2.154098] vip2-s0: matched fourcc: RGB4: code: 2006 idx: 6 [ 2.154104] vip2-s0: matched fourcc: BGR3: code: 2006 idx: 7 [ 2.154110] vip2-s0: matched fourcc: BGR4: code: 2006 idx: 8 [ 2.154266] vip2-s0: device registered as video1 [ 2.158959] vip2-s0: vip_async_complete [ 6.584181] vip1-s0: vip_open [ 6.584184] vip2-s0: vip_open [ 6.677117] vip2-s0: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x480 [ 6.677296] vip1-s0: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x480 Thanks! + +Hi, Sorry for the confusion on TVP5158. Can you point me to which subdevice driver you are using for the camera? Also, just to confirm my suspicia, just try to open the device and see if you get similar error. Run following on the commnad line cat /dev/video1 If this also gives you 'No such file or directory' error, then the problem is due to ENODEV getting returned from open. Regards, Nikhil D + +Hi Nikhil, Is the TVP5151 not the subdevice? cat /dev/video0 and cat /dev/video1 are yielding the same "No such file or directory" error. Strangely though, grep ENODEV returns no results in the tvp5150 driver so I don't even see where that return is coming from. How do I get past this ENODEV error when it appears that I have valid NTSC data coming into the 5151? Thanks, Joe + +Hi Joseph, Please provide details on which Processor SDK release you are using, kernel version and details of the subdevice driver being used Regards, Nikhil D + +Vision SDK 3.05 with its included kernel. I am using the tvp5150 driver included with the VSDK with a patch to the 5150_probe function to detect the 5151 /* ITU-T BT.656.4 timing */ tvp5150_write(sd, TVP5150_REV_SELECT, 0); } else if (tvp5150_id[0] == 0x51 && tvp5150_id[1] == 0x51) { /* TVP5151 */ v4l2_info(sd, "tvp5151 detected.\n"); } else { I haven't changed much. Device tree updates for my board in u-boot and kernel, pinmuxing in u-boot, adding CONFIG_VIDEO_TVP5150=y to my audio_display.cfg ti_config_fragments. It seems to me like I'm missing a critical step here due to my inexperience. Is the issue that I need a secondary driver for my camera beyond the driver needed for the TVP5151? As it stands, and for my immediate need, I am most interested in just capturing the data that I already have streaming into the 5151. For my device, I can simply apply power and it works. Assuming this is my problem, is there a way to do that with a generic driver that just registers without doing anything? Thanks, Joe + +Hi Joe, Here is the problem: The Linux VIP driver is a generic capture driver which can capture from any video source. Its responsible for configuring the video parser and DMA. For this to work, all the camera configuration is to be done by the subdevice driver. VIP driver calls few subdev calls to understand the capabilities of the video to be captured from subdevice (camera, video source, etc) If some of the subdev calls called from open fail, the VIP driver returns -ENODEV. So you have to make sure that the subdev driver implements the standard operations that the VIP driver calls. Since you don't have these ops implemented or possibly the formats reported do not match into supported format. That's why you are facing this issue. The solution is to track down all the subdev calls that are being called by VIP and implement them correctly. You can refer to tvp5158 driver as reference of how this is done. Regards, Nikhil D + diff --git a/data2/text/range/15001-20000/790742.txt b/data2/text/range/15001-20000/790742.txt new file mode 100644 index 0000000000000000000000000000000000000000..362934f62b61ee3469bb60ef679d799c91e7f598 --- /dev/null +++ b/data2/text/range/15001-20000/790742.txt @@ -0,0 +1,194 @@ +Ticket Name: RTOS/TDA2EXEVM: TI-RTOS/TDA2X EVM: [External ] SBL image bootup successfully, app start failure + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, Due to our customer complained at the time(Linux image) too long from Target_A15 boot up to HDMI display (~30 seconds). Even though we remove all debug message, it still can’t meet customer’s requirement. We must revert to TI/RTOS image (BIOS), configured MAKECONFIG=tda2xx_evm_bios_all based on VSDK(v.3.6) package for TDA2XX_EVM . As the TDS_SBL_UserGuide described that copy MLO image and AppImage into SD card (FAT32 system). $make -j depend $make -j sbl $make -j vision_sdk $make -j appimage It seems SBL boot up successfully from MMCSD, but the app can’t start failure. Could you help teach us how to solve the issue? Thanks. BTW, because my build environment work on Ubuntu System, It seems that the latest VisionSDK requires MSHIELD-DK/SECDEV package support for security protection. It defaults image signing tool to sign SBL & AppImages on Ubuntu/Linux machine. The parameter of “sign_rprc_image” in the build image command. Could you help teach us how to install MSHIELD-DK package? Thanks. sbl_bootlog_0408.txt + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 144411 (12.32 ms) + SOC Init Cycles - 264232 (22.54 ms) + DDR Config Clock Cycles - 68133 (5.81 ms) + App Image Load Cycles - 112960954 (9639.33 ms) + Slave Core Bootup Cycles - 323075 (27.56 ms) + SBL Boot-up Cycles - 113762140 (9707.70 ms) + Time at which SBL started IPU1_0 - 211934 (18.8 ms) +***************************************************************** + + Jumping to MPU CPU0 App + + log_appimage_04_08_2019_16_16.txt make -fbuild_multi_core_image_gen.mk -C/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules +make[1]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +mkdir -p /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot +# Creating Vision SDK AppImage ... +# Including A15 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including IPU1-0 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including IPU1-1 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4. +Object reference not set to an instance of an objectEncountered exception: +Object reference not set to an instance of an object +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including IPU2 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including DSP1 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including DSP2 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including EVE1 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including EVE2 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including EVE3 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Including EVE4 ... +mono /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//out2rprc/out2rprc.exe /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc +Parsing the input object file, /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F. +File conversion complete! +WARNING: The runtime version supported by this application is unavailable. +Using default runtime: v4.0.30319 +make -fbuild_multi_core_image_gen.mk sign_rprc_image INPUT_IMAGE=/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[2]: Nothing to be done for 'sign_rprc_image'. +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make -fbuild_multi_core_image_gen.mk normal_boot +make[2]: Entering directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +# Generating LE AppImage ... +/bin/chmod u+x /home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//multicore_image_generator/v2/MulticoreImageGen +/home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//multicore_image_generator/v2/MulticoreImageGen LE 55 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot/AppImage_LE 0 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg.rprc 2 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4.rprc 3 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4.rprc 7 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4.rprc 8 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66.rprc 9 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66.rprc 10 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc 11 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc 12 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc 13 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc +Number of Input Files 10 + +# Generating BE AppImage ... +/home/sam/proj/TI_VISION_SDK_V3_6/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/tools//multicore_image_generator/v2/MulticoreImageGen BE 55 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot/AppImage_BE 0 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg.rprc 2 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4.rprc 3 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4.rprc 7 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4.rprc 8 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66.rprc 9 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66.rprc 10 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc 11 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc 12 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc 13 /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc +Number of Input Files 10 + +cp /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot/AppImage_LE /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot/AppImage +# AppImage is @ /home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/sbl_boot/AppImage +make[2]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' +make[1]: Leaving directory '/home/sam/proj/TI_VISION_SDK_V3_6/vision_sdk/build/rtos/makerules' + BR, Sam Hsieh + +Responses: +Hi, If you boot from TI-RTOS Image then you have to manually start your usecase. It will show you the usecase menu and stop. Which usecase you want to run? Regards, Anuj + +Hi Anuj, Thanks for your feedback. I rebuild whole AppImage without any modification, it just show that Jumping to MPU CPU0 App, then system hang. it doesn't enter the usercase menu select. We plan to run the Usercase of 4CHs AVB Capture + SRV. But I confirmed that the pre-built image work fine on TDA2 board. BRs, Sam Hsieh + diff --git a/data2/text/range/15001-20000/793421.txt b/data2/text/range/15001-20000/793421.txt new file mode 100644 index 0000000000000000000000000000000000000000..d3491f49b8d5b93aa67584d0cba184ca41b1d8cc --- /dev/null +++ b/data2/text/range/15001-20000/793421.txt @@ -0,0 +1,260 @@ +Ticket Name: Linux/TDA2EVM5777: attaching to ipu1 ..... Cannot see any demo usecase. + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hi, I have successfully build and put the image on the sd card. I can get into the root and when I tried to run app.out it keeps on running attaching to ipu1 and other processing units without showing any particular display of the demo usecases. Can anyone help me figure this thing out? 6786.apps_out.txt root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh +insmod: ERROR: could not insert module ./bin/memcache.ko: File exists +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +mknod: /dev/memcache: File exists +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + + ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! + No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + + ### WARNING ###: use the following I2C [read | write] commands at your own risk! + No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb697f000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d7f000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3cbf000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3cff000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: IPU1-0 Remote Log Shared Memory @ 0xa0200000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 + [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [IPU1-0] 1957.479259 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1958.479289 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1959.479320 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1960.479350 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1961.479381 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1962.479411 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1963.479442 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1964.479442 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [HOST ] 1964.546391 s: SYSTEM: System A15 Init in progress !!! + [HOST] [DSP1 ] 1957.570853 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1958.570883 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1959.570914 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1960.570944 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1961.570975 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1962.571005 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1963.571036 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1956.710852 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1957.710882 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1958.710882 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1959.710913 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1960.710943 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1961.710974 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1962.711004 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1963.711035 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1964.571066 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1964.711065 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1965.479472 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1965.571066 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1965.711096 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1966.479503 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1966.571097 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1966.711096 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1967.479533 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1967.571127 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1967.711126 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1968.479564 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1968.571158 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1968.711157 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1969.479594 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1969.571188 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1969.711187 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1970.479625 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1970.571219 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1970.711218 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1971.479655 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1971.571249 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1971.711248 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1972.479686 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1972.571280 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1972.711279 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1973.479686 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1973.571280 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1973.711309 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1974.479716 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1974.571310 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1974.711340 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1975.479747 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1975.571341 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1975.711340 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1976.479777 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1976.571371 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1976.711370 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1977.479808 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1977.571402 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1977.711401 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1978.479838 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1978.571432 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1978.711431 s: SYSTEM: Attaching to [IPU2] ... + +Responses: +Hi, For linux we use IPU2 core and IPU1 is disabled. How are you getting IPU1 core log when it is disabled? Have you made any changes? Regards, Anuj + +Hi Anuj, I was trying to run the tidl usecase on linux as it is not available by default so I had to make some changes in the configuration file to run it. This is the reason I changed it. My core purpose is to build the tidl on the linux system rather than BIOS. Can you tell me how can I achieve it without facing these problems. Thank you. With best regards, H.M. Owais + +3386.apps_out.txt root@dra7xx-evm:/opt/vision_sdk# ./vision_sdk_load.sh +insmod: ERROR: could not insert module ./bin/memcache.ko: File exists +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +mknod: /dev/memcache: File exists +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + + ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! + No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + + ### WARNING ###: use the following I2C [read | write] commands at your own risk! + No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb69d0000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3dd0000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3d10000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3d50000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 + [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 180.225035 s: SYSTEM: System A15 Init in progress !!! + [HOST] [DSP1 ] 162.056945 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 163.056975 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 164.056975 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 165.057006 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 166.057036 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 167.057067 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 168.057097 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 169.057128 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 170.057158 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 171.057189 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 172.057219 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 173.057219 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 174.057250 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 175.057280 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 176.057311 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 177.057341 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 178.057372 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 179.057402 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 180.057433 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 162.158939 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 163.158970 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 164.159000 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 165.159031 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 166.159061 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 167.159061 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 168.159092 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 169.159122 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 170.159153 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 171.159183 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 172.159214 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 173.159244 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 174.159275 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 175.159275 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 176.159305 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 177.159336 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 178.159366 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 179.159397 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 180.159427 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 181.057463 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 181.159458 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 182.057463 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 182.159488 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 183.057494 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 183.159488 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 184.057524 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 184.159519 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 185.057555 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 185.159549 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 186.057585 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 186.159580 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 187.057616 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 187.159610 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 188.057646 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 188.159641 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 189.057677 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 189.159671 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 190.057677 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 190.159702 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 191.057707 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 191.159732 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 192.057738 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 192.159732 s: SYSTEM: Attaching to [IPU2] ... + + Hi Anuj, I have changed it to no in the configuration file, the error is still there. with IPU2 + +Hi, Can you revert your all changes and check with IPU2 are you able to boot of not? TIDL OD usecase is not supported on linux as of now. So in that perspective it will be difficult to help you in integrating TIDl with linux. But please search in E2E forum as few customers has already tried this. So you may get help from those threads. Regards, Anuj + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Anuj + diff --git a/data2/text/range/15001-20000/819367.txt b/data2/text/range/15001-20000/819367.txt new file mode 100644 index 0000000000000000000000000000000000000000..559d79de002fcdc39827ab9a7a4e3c4cd9932a2f --- /dev/null +++ b/data2/text/range/15001-20000/819367.txt @@ -0,0 +1,106 @@ +Ticket Name: TDA2EVM5777: Accessing 4GiB DDR Range Starteware + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, SYSBIOS We are using the TDA2xx chip with Vision SDK 3.03 software. Through starterware software we need to access 4GiB of DDR space from the A15 cores and max 2GiB space for DSP cores and 1.5GiB for IPU cores. Our current MLO is configured to access only 1GiB of space. Script used to create current MLO is: gmake -s sbl BOOTMODE=sd CORE=a15_0 SBL_BUILD_MODE=prod SBL_OPT_MODE=high EMIFMODE=SBLLIB_DUAL_EMIF_2X512MB OPPMODE=opp_nom I have two main questions with some addditional secondary questions: Question 1: How do we build an MLO that enables 4GiB? Question 2: Once we do get 4GiB enabled, how do we ensure A15 source code (using library starterware) will allow a15 to access beyond the 2GiB? Thank you, More details and secondary questions below: The above MLO gmake script configures the DMM and MA_MPU LISA_MAP_0 and LISA_MAP_1 registers with 0x80640300U. By updating that value to 0x80740300U would all cores have full access to the first 2GiB of DDR space in interleaved mode or is there anything else that would be necessary? For the A15 to access the additional 2GiB space the A15 core needs to use a 40b address. Under Linux that requires enabling the ARM LPAE support. How does that translate to non-linux starterware software? How would the A15 cores access all 4GiB range and IPU/DSP cores access the 2GiB range in the same application app? + +Responses: +Hi, Our expert for this is not in office this week. Please expect delay in response, we will get back to you by early next week. Regards, Ankur + +Hello Ankur, Thank you for your reply, looking forward to hearing back when the expert returns. We made some progress in the MLO (Question 1) and continuing to learn more about the A15 memory access (Question 2). Here are additional details/questions, in addition to our previous post. Thank you for your help! For the MLO we followed the example of what Linux does and configured MA_MPU_LISA_MAP_0 = 0x0 MA_MPU_LISA_MAP_1 = 0x0 MA_MPU_LISA_MAP_2 = 0x80740300U MA_MPU_LISA_MAP_3 = 0xFF020100U DMM_LISA_MAP_0 = 0x80740300U DMM_LISA_MAP_1 = 0xFF020100U DMM_LISA_MAP_2 = 0x0 DMM_LISA_MAP_3 = 0x0 With this updated change, this does allow us to access beyond the 1GiB space up until the last 16MiB of the 2nd 1GiB range. (Due to the 0xFF020100U configuration that seems to be correct.) In addition to the previous two questions (Question 1 and 2 in previous post), below are new Questions Question 3: Is there a reason why we would need to have the 16MiB exclusion when not using Linux? Based on further reading, in order to access the extended 2GiB of physical memory the a15 needs to set TTBCR to enable LPAE? The provided MMUA15Init() function calls MMUA15InitASM() which seems to set the TBCR EAE bit to non-zero. MMUA15InitASM: mov r0, #1 @ TTBR0 used and desc uses Short format lsl r0, r0, #31 @ Set TTBCR.EAE bit mcr p15, #0, r0, c2, c0, #2 @ write r0 to TTBCR isb @ flush instruction pipeline @ isb makes sure cp15 changes @ are visible to all subsequent @ instructions bx r14 .endfunc Question 4: Does the MMUA15InitASM() routine therefore enable LPAE? Question 5: If yes, then do we only need to create First Level Descriptor Tables that point to the extended 2GiB physical addresses? And if yes, to access all of the 4GiB space from an A15 what would be the recommended configuration for the first level descriptors? Question 6: This is an Application level function, is there no additional requirement in the MLO for accessing the extended memory? Additionally we've seen that in Linux it appears that for LPAE mode a cache option is changed from (DCACHE_WRITEBACK & ~TTB_SECT_XN_MASK) to DCACHE_WRITEALLOC. Question 7: What is the difference in cache management when using LPAE? Thank you. + +Hi, You can use 3 GB DDR within 32 bit address range by using address space from 0x2000_0000 to 0x4000_0000 and 0x6000_0000 to 0x8000_0000 in addition to 2 GB from 0x8000_0000. To use 40 bit addresses you have to use linux, starterware doesn't support the same. Regards, Rishabh + +Hello Rishabh, Thank you for confirming the 3GiB limit in starterware. Is there a plan to eventually support 4GiB in starterware/pdk? Also, I have some follow-up questions on your suggested mapping of the two 512MiB ranges below. Thanks again for your help! How To Configure A15 Access of the 3GiB Would accessing the extended 1GiB be done through the A15 MMU and virtually mapping the suggested ranges to extended DDR space? If so, the MMU first level descriptors define a 1GiB block which won't work for the suggested mapping of two 512MiB ranges… So does that mean the second level descriptors are the only way to map the two 512MiB blocks? Are there examples that do this type of mapping? When to Configure Access When does the MMU need to be configured If we wish to initialize global variables in the extended DDR space? Since the MLO loads the app would the MMU init need to be inside the MLO before the RPRCs are loaded? Thank you + +Hi, There are no plans to support 40 bit addresses in PDK and hence 4 GB DDR cannot be supported. Yes second level descriptor is the way to map 512 MB. Please note that you need to have 512 entries of 2 MB each in second level table. Unfortunately we don't have an example which uses 2nd level descriptor, you need to refer to header file for the same. From MLO perspective you don't need to add MMU configuration. MLO checks the App Image for valid DDR addresses which you will need to update, current valid address is >=0x8000_0000. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hello Rishabh, Another task at work took my attention last week. Thank you for the above replies they have helped better understand how to access the additional 1GiB of space. After reviewing the 2nd level descriptor functions they seemed very similar to 1st level and I am programming them with very similar methods. I have kept the same mmuA15DescriptorAttrs configurations in 2nd level descriptors as 1st level and are now trying to correctly map the suggested two 512MiB ranges to their correct physical addresses. I checked the MA_PRIORITY register to confirm the value of HIMEM_INTERLEAVE_UN and I saw it was set to 0. Under this configuration would the extended 1GiB physical addresses be: EMIF1_SDRAM_CS0 = 0x02_0000_0000 0x02_3FFF_FFFF EMIF2_SDRAM_CS0 = 0x03_C000_0000 0x03_FFFF_FFFF The above is for the full extra 2GiB so are any two 512MiB sections in that range good to map to or are there any restrictions? We'll want to use interleaving for this extended 1GiB space. Is enabling HIMEM_INTERLEAVE_UN the only requirement or are there any other configuration registers for the extended DDR? Once interleaving is enabled, would the physical address range to map to be 0x02_0000_0000 0x02_3FFF_FFFF? Thank you. + +Hi, The idea is to have two 512 MB blocks. First block will be 0x2000_0000 to 0x3FFF_FFFF and second block is 0x6000_0000 to 0x7FFF_FFFF. Then you configure MA_LISA_MAP registers for A15 access path to these areas. My suggestion is not to have EMIF interleaving enabled at first. Once you have the system working using single EMIF then you can go for EMIF interleaving. Regards, Rishabh + +Hello Rishabh, Thank you again for your reply and suggestions. I configured a LISA_MAP register with the goal of mapping the first 512MiB block using the register value: 0x20500140. However any attempt to read any value from 0x2000.0000 - 0x3FFF.FFFF results in a system halt. I've tried this with and without enabling the MMU with the second level descriptors. I'm still confirming I'm programming the second level descriptor correctly, below is an example of 1 out of 256 entries I created for the first 512MiB block. MMUA15InitDescAttrs(&gAttrs); gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_BLOCK; gAttrs.attrIndx = MMU_A15_ATTR_INDEX_2; gAttrs.nonSecure = MMU_A15_NON_SECURE_ENABLE; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_ANY_PL; MMUA15SetSecondLevelDesc(&gMmuTable, 0x20000000, 0x20000000 , &gAttrs); I used the case examples from the TDA2 TRM under the section "Addressing Management with LISA" to help derive the LISA register value. The second level descriptor header looked very similar to first level so I'm programming them with similar approach and since the function returned STW_SOK that seemed OK. Is there anything incorrect that you can see or any suggestions for how to debug the halt? Thank you + +Hi, Sorry for the delayed response. Can you please see below suggestions: 1. EMIF 1 is MMU mapped to 0x8000_0000 to 0xFFFF_FFFF (2 GB), 2. EMIF 2 DDR is MMU mapped to 0x0000_0000 to 0x3FFF_FFFF (1 GB) – I have used this as you are currently not using GPMC or PCIE in your system. 3. All the DDR regions have been marked cacheable. (This can be modified based on the regions of DDR which are non-cached as well.) /*********************************************** +* MMU Configuration * +***********************************************/ +var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu'); +Mmu.enableMMU = true; + +// descriptor attribute structure +var tab_desc = new Mmu.DescriptorAttrs(); +Mmu.initDescAttrsMeta(tab_desc); + +tab_desc.type = Mmu.DescriptorType_TABLE; // Table descriptor +Mmu.setFirstLevelDescMeta(0x00000000, 0x2C0000000, tab_desc); +Mmu.setFirstLevelDescMeta(0x40000000, 0x2C0000000, tab_desc); +Mmu.setFirstLevelDescMeta(0x80000000, 0x2C0000000, tab_desc); +Mmu.setFirstLevelDescMeta(0xC0000000, 0x2C0000000, tab_desc); + +/****************************************************************************** +* +* SYS/BIOS assigns the following defaults to MAIR0 ATTR0, ATTR1 and ATTR2: +* +* ATTR0 -> 0x44 (mark memory region as non-cacheable normal memory) +* ATTR1 -> 0x00 (mark memory region as device memory, i.e. strongly +* ordered and non-cacheable) +* ATTR2 -> 0xFF (mark memory region as normal memory, RW cacheable and +* RW allocate) +****************************************************************************** +*/ +// descriptor attribute structure +var ddr_attr = new Mmu.DescriptorAttrs(); + +Mmu.initDescAttrsMeta(ddr_attr); +ddr_attr.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor +ddr_attr.shareable = 2; // sharerable +ddr_attr.attrIndx = 2; // Cached, normal memory +// Set the descriptor for each entry in the address range - EMIF 2 (1 GB) +for (var i=0x00000000; i < 0x40000000; i = i + 0x00200000) { + // Each 'BLOCK' descriptor entry spans a 2MB address range + Mmu.setSecondLevelDescMeta(i, i + 0x300000000, ddr_attr); +} +// Set the descriptor for each entry in the address range - EMIF 1 (1 GB) +for (var i=0x80000000; i < 0xC0000000; i = i + 0x00200000) { + // Each 'BLOCK' descriptor entry spans a 2MB address range + Mmu.setSecondLevelDescMeta(i, i, ddr_attr); +} +// Set the descriptor for each entry in the address range - EMIF 1 (1 GB) +for (var i=0xC0000000; i < 0x100000000; i = i + 0x00200000) { + // Each 'BLOCK' descriptor entry spans a 2MB address range + Mmu.setSecondLevelDescMeta(i, i, ddr_attr); +} +// descriptor attribute structure +var attrs0 = new Mmu.DescriptorAttrs(); +Mmu.initDescAttrsMeta(attrs0); +attrs0.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor +attrs0.shareable = 2; // sharerable +attrs0.attrIndx = 2; // Cached, normal memory +// Set the descriptor for each entry in the address range +// Set OCMC memories as shareable and cacheable in case Board package is used +for (var i=0x40000000; i < 0x40600000; i = i + 0x00200000) { + // Each 'BLOCK' descriptor entry spans a 2MB address range + Mmu.setSecondLevelDescMeta(i, i, attrs0); +} +attrs0.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor +attrs0.noExecute = true; // not executable +attrs0.accPerm = 0; // read/write at PL1 +attrs0.shareable = 2; // shareable +attrs0.attrIndx = 1; // strongly ordered and non-cacheable +// Set the descriptor for each entry in the address range +// Remaining OCMC region configured as non-cacheable, device memory. +for (var i=0x40600000; i < 0x60000000; i = i + 0x00200000) { + // Each 'BLOCK' descriptor entry spans a 2MB address range + Mmu.setSecondLevelDescMeta(i, i, attrs0); +} + Regards, Rishabh + +Hello Rishabh Thank you so much for the detailed suggestions. I translated the sys bios functions as best I could to use the PDK functions. After updating the LISA_MAP registers with what you suggest (2GiB on Emif 1, and 1 GiB on EMIF2) I get a full system halt as soon as I enable the MMU. Always at MMUA15Enable() I get a halt. I've started pulling up sys bios documentation to better understand your suggestion but I also have some followup questions. 1. I tried to match the configurations for the descriptor attributes but I'm not familiar with sys bios and couldn't find information on values that get set as part of Mmu.initDescAttrsMeta. I used MMUA15InitDescAttrs() and then updated any specific attributes like you manually did. Is what I'm using below correct? 2. For the EMIF2 configuration I see you're mapping to physical addresses starting at 0x3_0000_0000 but I wasn't sure why. The TRM I have lists that address as RESERVED. Can you explain why use that address? 3. BTW based on you using the full lower 1GiB address range for Emif 2 our max DDR range should be 3.5 GiB if we also use the initially suggested 512MiB range starting at 0x6000_0000 correct? /*********************************************************** ***********************************************************/ MMUA15InitDescAttrs(&table_gAttrs); table_gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_TABLE; // Set level one descriptor virtualAddr = 0x00000000, phyAddr = 0xc0000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &table_gAttrs); virtualAddr = 0x40000000, phyAddr = 0xc0000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, 0xc0000000, &table_gAttrs); virtualAddr = 0x80000000, phyAddr = 0xc0000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &table_gAttrs); virtualAddr = 0xc0000000, phyAddr = 0xc0000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, 0xc0000000, &table_gAttrs); cacheEnabled = CACHEA15GetEnabled(); // In case cache is disabled, invalidate and enable it if (CACHE_A15_TYPE_ALL != cacheEnabled) { CACHEA15InvalidateL1DAll(); CACHEA15InvalidateL1IAll(); CACHEA15Enable(CACHE_A15_TYPE_L1); } // Initialize MMU module MMUA15Init(); // Set MAIR to inner and outer cacheable MMUA15SetMAIR(&gMmuTable, MMU_A15_ATTR_INDEX_2, 0xFF); // Initialize descriptor attributes MMUA15InitDescAttrs(&gAttrs); // Set level one descriptor attributes gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_BLOCK; gAttrs.attrIndx = MMU_A15_ATTR_INDEX_2; gAttrs.shareable = 2; ///MMU_A15_SHAREABLE_OUTER gAttrs.nonSecure = MMU_A15_NON_SECURE_ENABLE; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_ANY_PL; // Set the descriptor for each entry in the address range - EMIF 2 (1 GB) for (t=0x00000000; t < 0x40000000; t = t + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range MMUA15SetSecondLevelDesc(&gMmuTable, t, t + 0x300000000, &gAttrs); } // Set the descriptor for each entry in the address range - EMIF 1 (1 GB) for (t=0x80000000; t < 0xC0000000; t = t + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range MMUA15SetSecondLevelDesc(&gMmuTable, t, t, &gAttrs); } // Set the descriptor for each entry in the address range - EMIF 1 (1 GB) for (t=0xC0000000; t < 0x100000000; t = t + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range MMUA15SetSecondLevelDesc(&gMmuTable, t, t, &gAttrs); } // Set OCMC memories as shareable and cacheable in case Board package is used for (t=0x40000000; t < 0x40600000; t = t + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range MMUA15SetSecondLevelDesc(&gMmuTable, t, t, &gAttrs); } MMUA15SetMAIR(&gMmuTable, MMU_A15_ATTR_INDEX_1, 0x00); gAttrs.attrIndx = MMU_A15_ATTR_INDEX_1; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_PL1; gAttrs.shareable = 2; ///MMU_A15_SHAREABLE_OUTER gAttrs.noExecute = 1; ///Enable // Remaining OCMC region configured as non-cacheable, device memory. for (t=0x40600000; t < 0x60000000; t = t + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range MMUA15SetSecondLevelDesc(&gMmuTable, t, t, &gAttrs); } MMUA15Enable(&gMmuTable); Thank you + +Hi, BIOS and PDK both have very similar implementation. MMUA15InitDescAttrs() usage is correct. Also the configuration I have shared was validated for 3 GB usage some time back. I would suggest you to directly use this instead of trying to map 0x6000_0000. Can you first validate this using SYSBIOS and then try to translate it to PDK for quicker progress. Regards, Rishabh + +Hello Rishabh, I completely agree and was using your suggestion directly with only 3GB. The question about 3.5GB was just for determining max potential for planning purposes. I'm not at all familiar with sys bios including its build process so I'm not sure how quick that may actually be. Using linux we've already validated the hardware so ultimately we just need to have the 3GB work in PDK. Since the system halts only when enabling the MMU it seemed the issue was MMU configuration but I thought I implemented the pdk version same as the posted sysbios version. Based on the software I provided is there any mistakes you can identify? Thank you + +Hi, Sorry for the delayed response. I did not find any obvious issue with your configuration. Are you familiar with Processor SDK Vision? If yes then you can directly try the cfg I shared. Regards, Rishabh + diff --git a/data2/text/range/15001-20000/840618.txt b/data2/text/range/15001-20000/840618.txt new file mode 100644 index 0000000000000000000000000000000000000000..691b0dc1f84fb8c94c3028dca39bf8e91fe3ae8c --- /dev/null +++ b/data2/text/range/15001-20000/840618.txt @@ -0,0 +1,84 @@ +Ticket Name: TDA2EXEVM: Assertion @ Line: 232 in dupLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !! + +Query Text: +Part Number: TDA2EXEVM Hi TI Forum, We are trying to run below use-case on our custom board having TDA2xx SoC. We are using Vision SDK 3.0.7. Use-case.txt UseCase: chains_6CH_vdec_encode Capture -> Dup -> VPE -> Encode -> IPCIn(A15) -> Link writes data to shared memory Dup -> Dup_1 -> VPE_D1 -> Merge -> Display Dup_1 -> Sync -> Alg_DmaSwMs -> VPE_D2 ->Merge -> Display sometimes i am facing an assert mentioned below, [HOST] [IPU2 ] 43.816141 s: CAPTURE: Start Done !!! [HOST] [IPU2 ] 43.944702 s: Assertion @ Line: 232 in dupLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! Other than this six channel switching and single channel switching works fine. Any help would be highly appreciable. Regards Balaji T + +Responses: +Hi, Whats the use of 2 dup links. You can use the same dup link to create 3 output. Capture -> Dup -> VPE -> Encode -> IPCIn(A15) -> Link writes data to shared memory Dup -> VPE_D1 -> Merge -> Display Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 ->Merge -> Display Regards, Anuj + +Anuj, In file VisionSDK_SW_Architecture_Details.pdf, it is mentioned that maximum numbers of channels is 6. In my use-case in total i need 18 output channels from capture, thats why i have used two dup links It is possible to duplicate 6 channels three times using single Dup link..? Rgds Balaji T + +Hi, You need 6 channels in 3 different queue so that should be possible using a single dup link. Pleased give it a try. Regards, Anuj + +Hi Anuj, Thanks for your suggestion, I have used the single Dup for the three outputs. Below is the use-case, Capture -> Dup -> VPE -> Encode -> IPCIn(A15) -> (link that copies frames to shared memory) Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 ->Merge -> Display Dup -> VPE_D1 -> Merge -> Display But it is observed that sometimes, assertion happens in dup link. [HOST] [IPU2 ] 208.850362 s: Assertion @ Line: 233 in dupLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! And also i have attached the log file for reference. Single_dup_assert.txt Rgds, Balaji T + +Anuj, Is there any update on this..?? Rgds, Balaji T + +Hi, CAn you put a log in DupLink_drvProcessData and check in which call this assert is hit. Print also the outId for this and also check the content of pBuf. Is it in first call or later. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for a different kind of query. Regards, Anuj + +Hi Anuj, The assert is coming in the dup output is connected to Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display. I have tried connecting Alg_DmaSwMs to Dup[0], Dup[1] and Dup [2], in all the cases its gives assert. [HOST] [IPU2 ] 92.867412 s: Bj pBuf 99c3f818 && outId 1 [HOST] [IPU2 ] 92.867504 s: Bj pBuf 99c40518 && outId 2 [HOST] [IPU2 ] 92.873269 s: Bj pBuf 99c3de80 && outId 0 [HOST] [IPU2 ] 92.873421 s: Bj pBuf 0 && outId 1 [HOST] [IPU2 ] 92.873482 s: Assertion @ Line: 234 in dupLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! [HOST] [HOST ] 92.740437 s: Def VSDK BufLink: SYSTEM_CMD_START...!!! In priv.c file, i have set the below two values for sync link, (pObj->SyncPrm).syncThreshold = 33; (pObj->SyncPrm).syncDelta = 33; Please let me know is there any things need to change or add. Rgds, Balaji T + +Anuj, Is it possible to use Alg_DmaSwMs without sync link..? I have tried the same, Alg_DmaSwMs link without sync link(Usecase shown below). There is no display on the screen. Capture -> Dup -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display Please suggest me to resolve this assert. Rgds, Balaji T + +Hi Anuj, Is there any update on this? Rgds, Balaji + +Hi, You have to do some debugging. As you know the issue is dup link is not getting enough system buffer from its output queue. Can you check how many buffer is been assigned and how much free. Where all the used buffer is? Regards, Anuj + +Anuj, Dup link has 32 system buffers for every channel which comes in. I tried increasing it to 48 but still we are seeing the Assert issue. In my observation sync link is the one creating the issue, I have tried changing values if threshold and delta in use-case. I set the values of threshold = 16 and delta = 16, where recording and single channel display are fine. when i switch to mosaic display it freezes. My doubt is, in sync link threshold/delta values are related in any way? Rgds, Balajt T + +Anuj, Is there any update on this? Rgds, Balaji T + +Hi Balaji, as Anuj is out of office I will ping other VisionSDK experts to help, they will reply here soon. Regards, Yordan + +Hi Balaji, Alg_DmaSwMs Link expects the input buffer to be "SYSTEM_BUFFER_TYPE_VIDEO_FRAME_CONTAINER" buffer type, which means the input is buffer array, not single buffer. SYNC Link will collect single buffers from each input channel in the specified time window and make them a buffer array to pass to Alg_DmaSwMs Link. So, you need to have SYNC Link before Alg_DmaSwMs Link. For SYNC link configuration, you have to determine the time window based on input frame rate. Do you mean you have 18 output channels from Capture Link? Dup Link will try to duplicate all 18 channels, not 6 each queue. If you have 18 output channels from Capture Link, you can use Select Link for Mux, 6 for each output queue. Regards, Stanley + +Stanley, Thanks for the reply. To determine time window based on input frame rate, is it related to sync threshold and delta values .? If not how to calculate time window based on input frame rate. Do you mean you have 18 output channels from Capture Link? Dup Link will try to duplicate all 18 channels, not 6 each queue. No, I have only 6 channels from capture link. In-fact thats is what i am giving it to single view display. We also kept a select link as shown, Capture -> Dup -> VPE -> Encode -> IPCIn(A15) -> (Link that writes to shared memory) Dup -> Select -> Sync -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display Dup -> VPE_D1 -> Merge -> Display And set the select link params as numOutQue = 1, outQueId = 0, numOutCh = 6. Also attached the log file for your reference. dup_assert_balaji.txt Needed more support to resolve this issue soon. Thanks & Rgds, Balaji T + +The Select Link is redundant in your use case. I mentioned Select Link only because I thought the muxing of input channels were needed in your use case. Based on the Assertion, you should check the error in ~\vision_sdk\links_fw\src\rtos\links_ipu\display\displayLink_drv.c @ line 232. [HOST] [IPU2 ] 60.023638 s: Assertion @ Line: 232 in dupLink_tsk.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! My guess is Dup Link is running out the output frame buffers because the Links after Dup Link is not returning the buffer in time. You have to debug your use case to find out why. Maybe try just 2 input channels first, instead of 6. For Sync Link configuration, please refer to API guide, ~/vision_sdk/docs/VisionSDK_ApiGuide.CHM. You can also take a look at the use case under ~\vision_sdk\apps\src\rtos\usecases\lvds_vip_multi_cam_view for reference. Regards, Stanley + +Hi Stanley, Thanks for the suggestion. I have tried with 5 channels, there is no asserts. validated for multiple times. With the help of printing outId in DupLink_drvProcessData function. one can tell that sync link is running slow, i.e., not releasing buffers on time. Will you please let me know how to increase output frame buffers in the dup link. Rgds, Balaji T + +The issue is probably not related to Dup Link, which is just passing along the buffers to the next link. Dup link only outputs low frame rate because the links after it return buffers in low rate. This could be the SYNC link is dropping frames due to the configurations. Please review your SYNC link configuration based on the API documentation. + +Hi Stanley, I have checked the configuration for sync link in lvds_vip_multi_cam use-cases. I have noticed that they are changing sync threshold(Threshold after which buffers from local queue can be dropped, in msecs ) and delta(Delta on which to sync frames, in msec's ) values. I have validated with both tight sync and loose sync configuration both are resulting in same asserts. Rgds, Balaji + +Hi Balaji, Please also check the rest of Links in the chain after DUP link and the frame is processed and returned correctly by each Link. Regards, Stanley + +Stanley, The below is our usecase, Capture -> Dup -> VPE -> Encode -> IPCIn(A15) -> (link that writes frames to shared memory) Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display Dup -> VPE_D1 -> Merge -> Display Since we are capturing six channels at 50fps. Alg_SwMosaic will accecpt only Video Composite buffer as input, we need to group frames coming from Capture link(Here we care using Dup link to duplicate data, that just send same input buffer received from prev link to multiple consumers). To group data from multiple channels sync link is used. Sync link will try to synchronize the frame, whose time stamp is within sync delta. Now if the frame from cam0 goes through different chain than the frame from cam1, we need to include latency for the cam0 also in the sync delta. So lets say capture takes around 30ms to release new data, the delta between cam0 and cam1 frame could be around 63ms. If the two frame's timestamp are within 63ms, they will be merged and sent out as a composite frame. But if that does not match, it will wait for the threshold amount of time to synchronize the frame. if it does not receive frame whose timestamp is within sync delta within threshold time, then it will drop the frame. Following is the observation: When we configured the capture link for 5 channels, and sync delta=16(Delta on which to sync frames, in msec's) & threshold=33 (Threshold after which buffers from local queue can be dropped, in msecs) processing of frames are fine and no asserts. Reference log attached(5ch_nov5_debug.txt). i.e., Number of channels is low and processing frames is fine.5ch_nov5_debug.txt When we configured the capture link for 6 channels, and sync delta=16(Delta on which to sync frames, in msec's) & threshold=33 (Threshold after which buffers from local queue can be dropped, in msecs) processing of frames are not proper hence sync link is not making the empty buffer availability to prev link(Dup), which resuts in asserts. Reference log attached(5ch_nov5_debug.txt). We have also tried configuring sync delta and threshold to low (~10) In that interval every frame it getting dropped, no frames is being sent to next link in the chain. So display will be empty. Reference log attached(6ch_nov5_debug.txt)6ch_nov5_debug.txt Rgds, Balaji + +For 50 fps inputs, the sync threshold is (1/50) * 1000 = 20 ms. It should expect new frame from each input channel in 20ms interval. As for delta, you can probably start with half of the interval, which is 10. + +In addition to that, you should increase the number of max elements in queue. 10 is good for 2 frames in 5 channels. But you need at least 12 for 2 frames in 6 channels. Find below under ~/vision_sdk/links_fw/src/rtos/links_common/sync/syncLink_priv.h /** ******************************************************************************* * \brief Max number of elemtns in sync link local queue ******************************************************************************* */ #define SYNC_LINK_LOCAL_QUE_MAX_ELEMENTS (10U) /** ******************************************************************************* * * \brief Channel specific information * ******************************************************************************* */ typedef struct { Utils_QueHandle localQueHandle; /**< Handle to the queue for this channel */ System_Buffer *queMem[SYNC_LINK_LOCAL_QUE_MAX_ELEMENTS]; /**< Queue memory */ } SyncLink_ChObj; + +stanley, why sometimes, sync link is dropping half of the frames its receiving. The below is my use-case(rearranged some elements) Capture -> VPE -> Dup -> Encode -> IPCIn(A15) -> DefLink_vsdkbuf (A15) Dup -> Merge -> Display Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display I have enabled print statistics for sync link, after vpe link sync link dropping half of the frames. That makes video on the screen slow. Please provide some solution for this, Rgds, Balaji T + +Did the assertion go away after the change mentioned previously? As for Sync link dropping frame, could you find out what cause the drops? Is it because incoming frames do not arrive within the threshold specified in create params? + +Stanley, Yes, the assertion was gone, but i am not sure that is because increasing max queue elements or rearranging of elements in the usecase. If sync link is dropping frames because of incoming frames do not arrive within the threshold time interval, why it is not dropping every time ? sync link is dropping frames only sometimes. Regards Balaji T + +You can add some trace in SyncLink_addBuffersToDropListLesserThanThreshold() SyncLink_addBuffersToDropListFromLocalQue() under ~/vision_sdk/links_fw/src/rtos/links_common/sync/syncLink_tsk.c to see why buffers are dropped. Regards, Stanley + +Balaji Were you able to proceed on this one? Thanks and Regards Piyali + +Hi Piyali, As you can see all the above comments, please correct me if i misunderstood any concepts. yes, still i am facing the same issue at-least twice in 10 times. We have validating the same, please have a look in the log.6ch_assert_validation.txt Detailed log with VSDK stats collector s given below. FS-6ch_debug_nov28.txt Regards & Thanks, Balaji T + +Hi, Is there any update on this..? Rgds, Balaji T + +Did you add any trace as mentioned earlier in the below functions? SyncLink_addBuffersToDropListLesserThanThreshold() SyncLink_addBuffersToDropListFromLocalQue() under ~/vision_sdk/links_fw/src/rtos/links_common/sync/syncLink_tsk.c to see why buffers are dropped. I didn't find anything useful from the log you shared. Regards, Stanley + +Please let us know if you are still facing any issue. Thanks. + +Hi Stanley, The dup link assert and the frame drop in sync link is not happening all the times. In the above shared logs, the first one is to analyze how many times the assert in dup link is occurred and the second long is with enabled all the print statistics i.e., the log generated by pressing 'p' . We added trace logs in the follow functions but we dint find any reference that makes frame drop, SyncLink_addBuffersToDropListLesserThanThreshold() SyncLink_addBuffersToDropListFromLocalQue() Regards, Balaji T + +Hi Balaji, Could you try increasing the value of SYNC_LINK_LOCAL_QUE_MAX_ELEMENTS to see if it eliminates the assertion in Dup Link? You can try a large number like 24 from 10. /** ******************************************************************************* * \brief Max number of elemtns in sync link local queue ******************************************************************************* */ #define SYNC_LINK_LOCAL_QUE_MAX_ELEMENTS (10U) Regards, Stanley + +Hi Balaji, Please let me know if the suggested change makes any difference. Thanks. Regards, Stanley + +Stanley, I tried gradually increasing the value of SYNC_LINK_LOCAL_QUE_MAX_ELEMENTS from 12 to 24, sometimes once in 5 times getting assert. Rgds, Balaji T + +Hi Balaji, If you are seeing assertion, the trace should tell you where the assertion is. Could you then trace the error back to what inside the function that returned bad status to cause the assertion? I need to know what exactly the condition check fails which triggers the assertion at the end and then we could try to figure out the root cause. So far, the information you have given is only the first level function which return bad status but we need further detail into that function and the condition check which failed. Regards, Stanley + +Hi Balaji, Any update on this issue? Thanks. Regards, Stanley + diff --git a/data2/text/range/15001-20000/875187.txt b/data2/text/range/15001-20000/875187.txt new file mode 100644 index 0000000000000000000000000000000000000000..16492e24eaa9ad6b232c7c84e02bff766a256607 --- /dev/null +++ b/data2/text/range/15001-20000/875187.txt @@ -0,0 +1,475 @@ +Ticket Name: TDA2PXEVM: ERROR: No alg create function specified (algId = 2) + +Query Text: +Part Number: TDA2PXEVM Hi, Recently I started working with PSDK Vision. I am trying out my own usecase. This is my usecase, But the output which i see in the console after doing make is, [HOST] [HOST ] ========================================= [HOST] [HOST ] Chains Run-time Codec Type Selection Menu [HOST] [HOST ] ========================================= [HOST] [HOST ] [HOST] [HOST ] Enter '0' for MJPEG [HOST] [HOST ] [HOST] [HOST ] Enter '1' for H.264 [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 58.511071 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 58.511132 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 58.511285 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 58.512444 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 58.512901 s: DECODE: Create in progress ... !!! [HOST] [IPU2 ] 58.718934 s: DECODE: Creating CH0 of 1280 x 720 [1] [0],target bitrate = 10000 Kbps ... [HOST] [IPU2 ] 58.719758 s: DECODE: All CH Create ... DONE !!! ASSERT (chains_c2g_priv.c|chains_c2g_Create|180) [HOST] [EVE1 ] 58.723174 s: IPC_IN_0 : Create in progress !!! [HOST] [EVE1 ] 58.724242 s: IPC_IN_0 : Create Done !!! [HOST] [EVE1 ] 58.725126 s: ALG: ERROR: No alg create function specified (algId = 2) !!! [HOST] [IPU2 ] 58.721801 s: DECODE: Create ... DONE !!! [HOST] [IPU2 ] 58.722259 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 58.722595 s: IPC_OUT_0 : Create Done !!! I feel that i missed out something in my .c file. Please guide me. My chains_c2g.c file: chains_c2g.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI’S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_c2g_priv.h" +#include +#include + + +#define MAX_NUMBER_OF_CHANNELS (1) +#define ENCDEC_MAX_FRAME_WIDTH (1280) +#define ENCDEC_MAX_FRAME_HEIGHT (720) + +/** + ******************************************************************************* + * + * \brief Use-case object + * + * This structure contains all the LinksId's and create Params. + * The same is passed to all create, start, stop functions. + * + ******************************************************************************* +*/ +typedef struct { + + chains_c2gObj ucObj; + + UInt32 displayWidth; + UInt32 displayHeight; + + Chains_Ctrl *chainsCfg; + + UInt32 codecType; +} chains_c2gAppObj; + +Void chains_c2g_SetNullSrcPrms(chains_c2gAppObj *pObj, + NullSrcLink_CreateParams *pPrm) +{ + UInt32 chId; + System_LinkChInfo *pChInfo; + + pPrm->outQueInfo.numCh = 1; + + pPrm->timerPeriodMilliSecs = 32; + + for (chId = 0; chId < pPrm->outQueInfo.numCh; chId++) + { + pPrm->channelParams[chId].numBuffers = 4; + + pChInfo = &pPrm->outQueInfo.chInfo[chId]; + + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, + SYSTEM_DF_YUV420SP_UV); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pChInfo->flags, + SYSTEM_SF_PROGRESSIVE); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, + /*SYSTEM_BUFFER_TYPE_VIDEO_FRAME*/ + SYSTEM_BUFFER_TYPE_BITSTREAM); + pChInfo->width = ENCDEC_MAX_FRAME_WIDTH;//pObj->displayWidth; + pChInfo->height = ENCDEC_MAX_FRAME_HEIGHT;//pObj->displayHeight; + pChInfo->startX = 0; + pChInfo->startY = 0; + pChInfo->pitch[0] = SystemUtils_align(pChInfo->width, 32); + pChInfo->pitch[1] = SystemUtils_align(pChInfo->width, 32); + + pPrm->channelParams[chId].fileReadMode = NULLSRC_LINK_FILEREAD_RUN_TIME; + + strncpy(pPrm->channelParams[chId].nameDataFile, "/home/1280x720_00.h264", 260); + strncpy(pPrm->channelParams[chId].nameIndexFile, "/home/1280x720_00.hdr", 260); + } + + pPrm->dataRxMode = NULLSRC_LINK_DATA_RX_MODE_FILE; +} + +/** + ******************************************************************************* + * + * \brief Set Decode Create Parameters + * + * \param pPrm [IN] DecodeLink_CreateParams + * + ******************************************************************************* +*/ +static Void chains_c2g_SetDecodePrms( + chains_c2gAppObj *pObj, + DecLink_CreateParams *pPrm) +{ + UInt32 chId; + DecLink_ChCreateParams *decPrm; + + for (chId = 0; chIdchCreateParams[chId]; + + decPrm->dpbBufSizeInFrames = DEC_LINK_DPB_SIZE_IN_FRAMES_DEFAULT; + decPrm->algCreateStatus = DEC_LINK_ALG_CREATE_STATUS_CREATE; + decPrm->decodeFrameType = DEC_LINK_DECODE_ALL; + + decPrm->processCallLevel = DEC_LINK_FRAMELEVELPROCESSCALL; + decPrm->targetMaxWidth = ENCDEC_MAX_FRAME_WIDTH; + decPrm->targetMaxHeight = ENCDEC_MAX_FRAME_HEIGHT; + decPrm->numBufPerCh = 6; + decPrm->defaultDynamicParams.targetBitRate = 10*1000*1000; + decPrm->defaultDynamicParams.targetFrameRate = 30; + decPrm->fieldMergeDecodeEnable = FALSE; + + switch (pObj->codecType) + { + case '0': /*MJPEG*/ + decPrm->format = SYSTEM_IVIDEO_MJPEG; + decPrm->profile = 0; + decPrm->displayDelay = 0; + break; + + case '1': /*H264*/ + decPrm->format = SYSTEM_IVIDEO_H264HP; + decPrm->profile = 3; + decPrm->displayDelay = 0; + break; + + default: /*D1*/ + printf("\r\nCodec Type: %d, returning \n", pObj->codecType); + UTILS_assert(FALSE); + break; + } + } +} + +/** + ******************************************************************************* + * + * \brief Set VPE Create Parameters + * + * \param pPrm [OUT] VpeLink_CreateParams + * + ******************************************************************************* +*/ +/*static Void chains_nullSrc_Display_SetVPEPrms( + VpeLink_CreateParams *pPrm, + UInt32 numCh, + UInt32 displayWidth, + UInt32 displayHeight, + UInt32 inputWidth, + UInt32 inputHeight + ) +{ + UInt16 chId; + + pPrm->enableOut[0] = TRUE; + + for(chId = 0; chId < numCh; chId++) + { + pPrm->chParams[chId].outParams[0].numBufsPerCh = 4; + + pPrm->chParams[chId].outParams[0].width = displayWidth; + pPrm->chParams[chId].outParams[0].height = displayHeight; + pPrm->chParams[chId].outParams[0].dataFormat = SYSTEM_DF_YUV420SP_UV; + + pPrm->chParams[chId].scCfg.bypass = FALSE; + pPrm->chParams[chId].scCfg.nonLinear = FALSE; + pPrm->chParams[chId].scCfg.stripSize = 0; + + pPrm->chParams[chId].scCropCfg.cropStartX = 32; + pPrm->chParams[chId].scCropCfg.cropStartY = 24; + pPrm->chParams[chId].scCropCfg.cropWidth = inputWidth-32; + pPrm->chParams[chId].scCropCfg.cropHeight = inputHeight-24; + } +}*/ + +/** + ******************************************************************************* + * + * \brief Set Edge Detection Alg parameters + * + * It is called in Create function. + * In this function alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + * \param pPrm [IN] AlgorithmLink_EdgeDetectionCreateParams + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_c2g_SetEdgeDetectionAlgPrms( + AlgorithmLink_EdgeDetectionCreateParams *pPrm, + Chains_Ctrl *chainsCfg) +{ + pPrm->maxWidth = ENCDEC_MAX_FRAME_WIDTH; + pPrm->maxHeight = ENCDEC_MAX_FRAME_HEIGHT; + + pPrm->numOutputFrames = 3; +} + + + +/** + ******************************************************************************* + * + * \brief Set link Parameters + * + * It is called in Create function of the auto generated use-case file. + * + * \param pUcObj [IN] Auto-generated usecase object + * \param appObj [IN] Application specific object + * + ******************************************************************************* +*/ +Void chains_c2g_SetAppPrms(chains_c2gObj *pUcObj, Void *appObj) +{ + chains_c2gAppObj *pObj + = (chains_c2gAppObj*)appObj; + + ChainsCommon_GetDisplayWidthHeight( + pObj->chainsCfg->displayType, + &pObj->displayWidth, + &pObj->displayHeight + ); + /*pUcObj->IPCIn_EVE1_IPU1_0_0LinkID = + SYSTEM_MAKE_LINK_ID(pObj->chainsCfg->algProcId, pUcObj->IPCIn_EVE1_IPU1_0_0LinkID); + + pUcObj->Alg_EdgeDetectLinkID = + SYSTEM_MAKE_LINK_ID(pObj->chainsCfg->algProcId, pUcObj->Alg_EdgeDetectLinkID); + + pUcObj->IPCOut_EVE1_IPU1_0_0LinkID = + SYSTEM_MAKE_LINK_ID(pObj->chainsCfg->algProcId, pUcObj->IPCOut_EVE1_IPU1_0_0LinkID);*/ + + + chains_c2g_SetNullSrcPrms(pObj, &pUcObj->NullSourcePrm); + + chains_c2g_SetDecodePrms(pObj, &pUcObj->DecodePrm); + + chains_c2g_SetEdgeDetectionAlgPrms(&pUcObj->Alg_EdgeDetectPrm, + pObj->chainsCfg); + + ChainsCommon_SetDisplayPrms(&pUcObj->DisplayPrm, + NULL, + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); + + /*chains_nullSrc_Display_SetVPEPrms( + &pUcObj->VPEPrm, + 1, + ENCDEC_MAX_FRAME_WIDTH, + ENCDEC_MAX_FRAME_HEIGHT, + ENCDEC_MAX_FRAME_WIDTH, + ENCDEC_MAX_FRAME_HEIGHT);*/ + + ChainsCommon_StartDisplayCtrl( + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); +} + +/** + ******************************************************************************* + * + * \brief Start the capture display Links + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] Chains_VipSingleCameraViewObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_c2g_StartApp(chains_c2gAppObj *pObj) +{ + ChainsCommon_statCollectorReset(); + ChainsCommon_memPrintHeapStatus(); + + chains_c2g_Start(&pObj->ucObj); + + ChainsCommon_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Delete the capture display Links + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] Chains_VipSingleCameraViewObj + * + ******************************************************************************* +*/ +Void chains_c2g_StopAndDeleteApp(chains_c2gAppObj *pObj) +{ + chains_c2g_Stop(&pObj->ucObj); + chains_c2g_Delete(&pObj->ucObj); + + ChainsCommon_StopDisplayCtrl(); + + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + ChainsCommon_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} + +/** + ******************************************************************************* + * \brief Run Time Menu string for codec Type Selection. + ******************************************************************************* + */ +char chains_c2g_codecTypeSelect[] = { + "\r\n " + "\r\n =========================================" + "\r\n Chains Run-time Codec Type Selection Menu" + "\r\n =========================================" + "\r\n " + "\r\n Enter '0' for MJPEG " + "\r\n " + "\r\n Enter '1' for H.264 " + "\r\n " + "\r\n Enter Choice: " + "\r\n " +}; + +/** + ******************************************************************************* + * + * \brief Single Channel Capture Display usecase function + *` + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void Chains_c2g(Chains_Ctrl *chainsCfg) +{ + char ch = 'a'; + UInt32 done = FALSE; + chains_c2gAppObj chainsObj; + + chainsObj.chainsCfg = chainsCfg; + + while(!done) + { + Vps_printf(chains_c2g_codecTypeSelect); + chainsObj.codecType = Chains_readChar(); + + switch(chainsObj.codecType) + { + case '0': + done = TRUE; + break; + case '1': + done = TRUE; + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", + chainsObj.codecType); + break; + } + } + + chains_c2g_Create(&chainsObj.ucObj, &chainsObj); + + chains_c2g_StartApp(&chainsObj); + + done = FALSE; + while(!done) + { + ch = '1'; + ch = Chains_menuRunTime(); + switch(ch) + { + case '0': + done = TRUE; + break; + + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + chains_c2g_printStatistics(&chainsObj.ucObj); + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", ch); + break; + } + } + + chains_c2g_StopAndDeleteApp(&chainsObj); +} + +Responses: +Hi Sam, Do you have "ALG_edgedetection=yes" in "cfg.mk" of your usecase? Also can you make sure "AlgorithmLink_EdgeDetection_initPlugin()" is called in "App_init()" in vision_sdk/apps/src/common/app_init/app_init_eve.c. You can check this post (it is for adding a new alg plugin, but you can use it as a reference to check if a particular plugin is initialized by the usecase): You can also look at existing vision_sdk/apps/src/rtos/usecases/vip_single_cam_edge_detection usecase as a reference as it is quite similar to your one. Regards, Yordan + +Hi Yordan, I took help from the usecase mentioned above. Content of cfg.mk ALG_edgedetection=yes NEED_PROC_IPU1_0=yes NEED_PROC_A15_0=yes NEED_PROC_EVE1=yes In app_init_eve.c's App_init() function, #ifdef ALG_edgedetection AlgorithmLink_EdgeDetection_initPlugin(); #endif I searched all files i can, but everything seems OK to me. + +Hi 1)Please share output of the below command "make showconfig" 2)are you creating usecase using auto-gene-usecase tool ? or manually? 3) Add print statement inside the following function & check this print is coming or not when you run apps.out. AlgorithmLink_EdgeDetection_initPlugin(); Thanks Gaviraju + diff --git a/data2/text/range/15001-20000/884152.txt b/data2/text/range/15001-20000/884152.txt new file mode 100644 index 0000000000000000000000000000000000000000..d92817e63152f8cca741aa9993b9b661d38f1083 --- /dev/null +++ b/data2/text/range/15001-20000/884152.txt @@ -0,0 +1,54 @@ +Ticket Name: TDA4VMXEVM: Performance of TIOVX kernels + +Query Text: +Part Number: TDA4VMXEVM Hello all, SUMMARY: I've been benchmarking the J721EX board running the SDK auto Linux and OpenVX for C66 DSPs (TIOVX library). In summary, I've been observing at least one order of magnitude lower performance than I'd expect from datasheets and manuals. TI MEASURED PERFORMANCE ANALYSIS: Please consider the table at http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tiovx/docs/user_guide/TIOVX_PERFORMANCE_J7ES_LINUX.html The entry #80 for the Multiply OpenVX kernel states: Index Kernel Variant Frame Size (Pixels) Graph Performance (msec) Node Performance (msec) 80 Multiply S16 x S16 = S16 640x480 (307200) 4.057000 3.978000 This means that 307200 int16_t elements are multiplied by 307200 int16_t elements, one by one, and produces 307200 int16_t elements. Then, I disassembled the released C66 firmware loaded by Linux: ~/psdk_rtos_auto_j7_06_01_01_12/c6000_7.4.24/bin/dis6x --all ~/psdk_rtos_auto_j7_06_01_01_12/vision_apps/out/J7/C66/SYSBIOS/release/vx_app_tirtos_linux_c6x_1.out > /tmp/c66.lst And counted the number of cycles spent in the inner loop of VXLIB_multiply_i16s_i16s_o16s_core: ad1e86d8 $C$L32: +ad1e86d8 0d66 SPLOOP 3 +ad1e86da 5947 || MV.L2X A18,B18 +ad1e86dc ec081000 .fphead n, h, W, BU, nobr, nosat, 1100000b +ad1e86e0 $C$L33: +ad1e86e0 2ce7 SPMASK L1,L2 +ad1e86e2 1581 ||^ ADD.L2X A19,8,B16 +ad1e86e4 044c5765 || LDDW.D1T1 *A19++[2],A9:A8 +ad1e86e8 024857e7 || LDDW.D2T2 *B18++[2],B5:B4 +ad1e86ec 09490058 ||^ ADD.L1 8,A18,A18 +ad1e86f0 02485764 LDDW.D1T1 *A18++[2],A5:A4 +ad1e86f4 044057e6 LDDW.D2T2 *B16++[2],B9:B8 +ad1e86f8 00004000 NOP 3 +ad1e86fc e0280003 .fphead n, h, W, BU, nobr, nosat, 0000001b +ad1e8700 12209032 DMPY2.M2X B5:B4,A9:A8,B7:B6:B5:B4 +ad1e8704 12209030 DMPY2.M1X A5:A4,B9:B8,A7:A6:A5:A4 +ad1e8708 00002000 NOP 2 +ad1e870c 0310a01b PACK2.L2 B5,B4,B6 +ad1e8710 0398eff2 || PACK2.S2 B7,B6,B7 +ad1e8714 1440d033 DMPY2.M2X B7:B6,A17:A16,B11:B10:B9:B8 +ad1e8718 0310a019 || PACK2.L1 A5,A4,A6 +ad1e871c 0398eff0 || PACK2.S1 A7,A6,A7 +ad1e8720 1440c030 DMPY2.M1 A7:A6,A17:A16,A11:A10:A9:A8 +ad1e8724 ac66 SPMASK D2 +ad1e8726 39d7 ||^ MV.D2X A3,B17 +ad1e8728 00430001 SPMASK D1 +ad1e872c 018d0940 ||^ ADD.D1 A3,0x8,A3 +ad1e8730 0a21201b PACK2.L2 B9,B8,B20 +ad1e8734 0aa96ff2 || PACK2.S2 B11,B10,B21 +ad1e8738 0a4457c7 STDW.D2T2 B21:B20,*B17++[2] +ad1e873c e0400004 .fphead n, l, W, BU, nobr, nosat, 0000010b +ad1e8740 0a212019 || PACK2.L1 A9,A8,A20 +ad1e8744 0aa96ff0 || PACK2.S1 A11,A10,A21 +ad1e8748 0c034001 SPKERNEL 3,0 +ad1e874c 0a0c5744 || STDW.D1T1 A21:A20,*A3++[2] +ad1e8750 $C$L34: + Between SPLOOP and SPKERNEL, there are 20 cycles, and each DMPY2 processes 4 elements, resulting in 8 multiplications per loop iteration (the 3rd and 4th DMPY2 are applying a constant scaling factor). Therefore, as a 1st order of approximation, each element takes 20/8 = 2.5 cycles to be processed. Compared to http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/vxlib_c66x_1_1_4_0/docs/VXLIB_c66x_TestReport.html, my estimation is 5 times bigger than the best measured result of 0.5 cycles/element. I could not find a better inner loop in the disassembled firmware. In total, the 307200 multiplications should take 2.5*307200 = 768000 cycles. We can finally estimate the DSP clock frequency as (768000 cycles) / (3.978 ms) = 193061840 cycles/s = 193 MHz. The TDA4VM datasheet states that the C66 DSP can be clocked up to 1.35 GHz, so this means that the evaluation kit DSP is largely underclocked by a factor of 7. MY FP IMPLEMENTATION: I've implemented and benchmarked FP kernels (with SIMD FP multiply QMPYSP) myself and observed a consistent underclocking factor of 10. In other words, the performance I'd expect is consistently 10x lower, even when processing multiplications of 5120 x 3840 image planes = 79 MB. Some hypotheses I can imagine are: 1) DSP is underclocked 2) L2 HW prefetcher in C66 not initialized 3) DDR bus not at full speed 1866 MHz Could someone please help here? Thanks, Fernando A. Endo + +Responses: +Hello again, Just a mistake in my computations: The 20 cycles refers to the dynamic length of the loop. The iteration interval (one stage length) is 3. Because there is no data dependency between the 2 first DMPY2, they can fit in one stage. The same conclusion is valid for the 2 last DMPY2. So, the cycles/element is actually (3 cycles) / ((2 DMPY2) * (4 elements/DMPY2)) = 3/8 = 0.375 cycle/element. Following the same logic in the previous message, the DSP frequency should be 29 MHz only, almost 50x slower than the peak frequency! Regards, Fernando + +Fernando, The loop you mentioned with 3/8 (0.375) cycles/element is the fastest inner loop at line 163 (labeled case 1B in the source code comments). This is for aligned pointers and overflow_policy == VXLIB_CONVERT_POLICY_WRAP. This closely matches the curve fit equation of the performance results from the Mode 1 from the test report you mentioned: http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/vxlib_c66x_1_1_4_0/docs/VXLIB_c66x_TestReport.html Mode 1: scale is integer; width == stride; WRAP Test vectors run: 3 Formula: Cycles: 0.36895*N + 142 Where: N = width * height Please be aware, that this test report is trying to communicate the absolute best baseline that can be achieved from the DSP core code, as it is run on a simulator which assumes that all code and data is in L1 memory (no memory hierarchy, therefore no cache stalls). At the VXLIB level, we wanted to show this baseline so you can see what the core loops can achieve relative to each other and not considering memory hierarchy latencies. The actual TDA4x board performance from OpenVX is shared in the other table you mentioned: http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tiovx/docs/user_guide/TIOVX_PERFORMANCE_J7ES_LINUX.html As of now, these VXLIB kernels are operating from DDR via L1 and L2 caches. DMA optimizations (for example using BAM framework) bring on average about 2x speed improvement, and are available on TDA2/3, but there is a pending DMA library update needed for TDA4 before we can enable the BAM DMA optimizations. So for now, these numbers are reflecting the cache-only mode for these kernels (as indicated at the top of the test report). So the discrepancy you are seeing is primarily due to the stalls due to cache misses through the L1/L2 and to DDR. DSP Speed = 1.35 GHz Pixels = 307200 Time = 3.978 ms Effective Cycles Per Pixel with cache stall/memory latencies = 0.003978 s * 1.35 GHz / 307200 = 17.48 cycles / element Many of these kernels in VXLIB are highly optimized at the DSP, but are very simple such that they are I/O bound (Add/absdiff/mult, etc). Simply reading images from DDR through the cache and doing a pixelwise multiply before writing back to DDR heavily under utilizes the DSP since most of the time the DSP will be stalled on the cache misses. The memory system through the caches simply can not feed this kernel fast enough to get no stalls to the DSP that is running at full speed. However, you shouldn't think of this as a blanket (17.48/0.375) 47x degradation due to memory because the effect is not linear. Assuming you keep the interface the same such that the kernel reads and writes the same amount of data, but the compute did much more than a multiply and it took 18 cycles per pixel, then the actual result with memory system would still be 18-19 cycles per element (estimate) because the compute and the IO latencies can largely be done in parallel are are much more balanced. This highlights how one should optimize loops and algorithms running on DSP to get maximum performance. If your loop takes a relatively high number of cycles (like > 17 in this case), it may be worth spending time to optimize the loop to bring the cycle time down. If optimized is still > 17 cycles, then using DMA to bring data into L2SRAM from DDR will not improve performance since the compute is the bottleneck. However, if the optimized loop is significantly less cycles than this, then this means that the memory I/O is the bottleneck and using DMA to ping/pong transferring of blocks of data into L2SRAM in parallel to compute, can bring about further improvements since we are reducing the latencies of the memory hierarchy. This was the purpose of using BAM and we hope to enable that framework on TDA4 in the coming year. Other optimizations to consider are, if you are cascading several kernels (loops) on the DSP for the whole image, one might consider tiling and putting intermediate results in L2SRAM so that you only have the latencies of L1 cache and not the more expensive L2 cache to DDR. If in the end you meet real time and all of your loops are still I/O bound, you can save power by reducing the clock speed of the DSP until the compute time is more balanced with the I/O time. Please let me know if this makes sense and if you have any follow up questions. Regards, Jesse + +Hello Jesse, Thanks for your detailed explanation. I still have some follow up questions: Jesse Villarreal said: As of now, these VXLIB kernels are operating from DDR via L1 and L2 caches. DMA optimizations (for example using BAM framework) bring on average about 2x speed improvement, and are available on TDA2/3, but there is a pending DMA library update needed for TDA4 before we can enable the BAM DMA optimizations. So for now, these numbers are reflecting the cache-only mode for these kernels (as indicated at the top of the test report). So, basically, with BAM working on TDA4, we would get around 2x speedup over the a non-BAM sequence of kernels. Then, instead of the 47x degradation, we would get 23x of slowdown compared to a full L1 hit ratio. I'm not yet convinced that 23x slowdown is a good result on average. Could you please give us a full example of the BAM results? If possible the best result, with a long pipeline of kernels. Jesse Villarreal said: So the discrepancy you are seeing is primarily due to the stalls due to cache misses through the L1/L2 and to DDR. Your conclusion seem fair, but only in the case that no hardware prefetchers are present in the cache hierarchy. Basically, without prefetching, every cache line miss (64 bytes for L1 and 128 for L2) will have to pay the DDR latency, which should be around hundreds of CPU cycles. However, the C66 has a L2 hardware prefetcher. In this case, if its has been properly designed, in a stream processing kernel, the DDR latency should be paid only a few times until the prefetcher warms up and detects the 2 sources and 1 destination streams. So, my next questions are: Is the L2 hardware prefetcher enabled by default in the TDA4 RTOS SDK? According to the C66x CorePac User's Guide (Rev. C), the prefetcher type seems to be a stride prefetcher. Is it possible to set up the prefetcher parameters? For instance, set the number of prefetch requests to DDR once a stream has been detected. As far as I understood, the L1 program cache is permanently disabled in the current TDA4 revision. Will the L1 program cache be enabled in future silicon revisions? What's the performance loss by not having it enabled? Do you have an estimate of when the BAM-plugin will be available for the TDA4? Thanks for your help, Fernando + +Fernando, Here are some answers to your questions: Fernando Endo said: Is the L2 hardware prefetcher enabled by default in the TDA4 RTOS SDK? As far as I know, there is no way to turn it off in SW, so yes it is enabled. Fernando Endo said: According to the C66x CorePac User's Guide (Rev. C), the prefetcher type seems to be a stride prefetcher. Is it possible to set up the prefetcher parameters? For instance, set the number of prefetch requests to DDR once a stream has been detected. No this is not configurable. Fernando Endo said: As far as I understood, the L1 program cache is permanently disabled in the current TDA4 revision. Will the L1 program cache be enabled in future silicon revisions? What's the performance loss by not having it enabled? What documentation or discussion led to this conclusion? The L1 program cache is not disabled in C66x on TDA4. Fernando Endo said: Do you have an estimate of when the BAM-plugin will be available for the TDA4? Current estimate given our priorities is end of year 2020. Please let me know if you will need this earlier or later based on your schedule and we may be able to adjust the priority. Our understanding is that since this is a performance optimization feature, it is typically needed after initial development but before production/optimization phases. Additional comments— the number of lines that will be prefetched by the prefetcher does not cover the entire latency trip to DDR memory. In addition, the L2 controller itself can only see a few cache line misses at a time. So the functioning of the prefetcher should not be expected to reduce the DDR latency penalty to zero after time. In the SDK, the L2 memory is configured for 64Kb cache, and the rest is set to addressable RAM. We did this in anticipation of people using the L2 RAM as a scratchpad for DMA (either custom DMA or using BAM in the future, for example). In your experiments, if you are not using L2RAM, then you can configure full L2 memory as cache to get better cache performance. Regards, Jesse + +Hello Jesse, Thanks again for your detailed answers. Here is some discussion and details requested: Jesse Villarreal said: What documentation or discussion led to this conclusion? The L1 program cache is not disabled in C66x on TDA4. There is a note in the "SPRUIL1A – May 2019 – Revised November 2019", AM752x/DRA829/TDA4xM Technical Reference Manual, section 6.4.1.1 C66SS Features: "NOTE: The C66x L1P memory is disabled (not supported) in this device." Jesse Villarreal said: the number of lines that will be prefetched by the prefetcher does not cover the entire latency trip to DDR memory. In addition, the L2 controller itself can only see a few cache line misses at a time. So the functioning of the prefetcher should not be expected to reduce the DDR latency penalty to zero after time. Yes, I agree, that's why I asked if it is possible to change the prefetcher configuration, especially the number of requests and/or prefetching distance (i.e., prefetch more cache lines in advance and/or prefetch one cache line at a time that is foreseen to be accessed after a configurable time in the future). By tunning these parameters, per kernel, we can satisfactorily hide the DDR latency. Jesse Villarreal said: In the SDK, the L2 memory is configured for 64Kb cache, and the rest is set to addressable RAM. We did this in anticipation of people using the L2 RAM as a scratchpad for DMA (either custom DMA or using BAM in the future, for example). In your experiments, if you are not using L2RAM, then you can configure full L2 memory as cache to get better cache performance. Good to know, thanks! Kind regards, Fernando A. Endo + +Fernando, Fernando Endo said: "NOTE: The C66x L1P memory is disabled (not supported) in this device." This must be referring to the addressable RAM option for L1P. In some devices, the L1 and L2 memories can be configured to be cache, or addressable RAM, or a combination of it. In the case of TDA4, the 32kB L1P is fixed to be full cache and can not be configured as addressable RAM. I will file a ticket to see if this note can be clarified to avoid confusion. Thanks, Jesse + diff --git a/data2/text/range/15001-20000/890522.txt b/data2/text/range/15001-20000/890522.txt new file mode 100644 index 0000000000000000000000000000000000000000..9bb998cc4e7e4c1af410230f9a46945d86c3a4d2 --- /dev/null +++ b/data2/text/range/15001-20000/890522.txt @@ -0,0 +1,237 @@ +Ticket Name: [DRA7XX-EVM-TDA2X] Issue with DSP kernel code debugging with gdbc6x debugger (using TI examples) + +Query Text: +Hi TI E2E support forum, PFBD. Target : To perform DSP side kernel code debugging with hosted gdbc6x debugger using TI examples Links Referred: http://downloads.ti.com/mctools/esd/docs/opencl/debug/debug_gdb.html#dsp-side-debug-with-host-side-client-gdbc6x https://processors.wiki.ti.com/index.php?title=Processor_SDK_Linux_Automotive_Software_Developers_Guide#IPC TI Board details: CPU : DRA752-GP ES2.0 Model: TI TDA2x Board: DRA7xx EVM Kernel: Linux dra7xx-evm 4.19.59-g5f8c1c6121 / armv7l GNU/Linux File system used: Generated ARM GNU/Linux file system using http://arago-project.org/wiki/index.php/Setting_Up_Build_Environmen processor SDK config file used : processor-sdk-06.01.00.08-config.txt Issue: Kernal crash while running "vecadd" with gdbc6x debugger when trying to finish the debugging and coming out from GDB Getting the below error :- [ 227.700062] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 227.706622] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 289.042893] ------------[ cut here ]------------ [ 289.047551] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x330/0x380 [ 289.056726] 44000000.ocp:L3 Standard Error: MASTER MPU TARGET DSP1_SDMA (Read Link): At Address: 0x00006004 : Data Access in User mode during Functional access [ 289.071043] Modules linked in: xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo xhci_plat_hcd xhci_hcd dwc3 udc_core rpmsg_proto rpmsg_rpc snd_soc_simple_card snd_soc_simp) [ 289.130533] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 4.19.59-g5f8c1c6121 #1 [ 289.139007] Hardware name: Generic DRA74X (Flattened Device Tree) [ 289.145126] Backtrace: [ 289.147595] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 289.155202] r7:c0df8988 r6:60060193 r5:00000000 r4:c125001c [ 289.160893] [] (show_stack) from [] (dump_stack+0x90/0xa4) [ 289.168151] [] (dump_stack) from [] (__warn+0xdc/0xf8) [ 289.175059] r7:c0df8988 r6:00000009 r5:00000000 r4:c1201adc [ 289.180747] [] (__warn) from [] (warn_slowpath_fmt+0x50/0x6c) [ 289.188265] r9:ef1dc9c0 r8:f0880358 r7:c0df88a8 r6:c0df87f4 r5:c0df8958 r4:c1204c48 [ 289.196046] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x330/0x380) [ 289.204956] r3:ef221a80 r2:c0df8958 [ 289.208547] r5:00000004 r4:80080001 [ 289.212145] [] (l3_interrupt_handler) from [] (__handle_irq_event_percpu+0x68/0x140) [ 289.221668] r10:c1251c37 r9:ef21ff00 r8:00000017 r7:c1201c08 r6:00000000 r5:ef21ff68 [ 289.229530] r4:ef221f40 Attachments: [ "dra7xx_crash.txt" ] 1. Kernel crash log for “ vectorAdd” TI example (with the error mentioned above ) 2. KERNEL DETAILS & MODULE DETAILS 3. GDBPROXY DETAILS Thanks & Best Regards, Sethu dra7xx_crash.txt While running vecadd with gdbc6x debugger + + +####### KERNEL CRASH ------------------------------------------------------------------------------------------------------------------------------------------------------ + + +[ 227.700062] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 227.706622] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 289.042893] ------------[ cut here ]------------ +[ 289.047551] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x330/0x380 +[ 289.056726] 44000000.ocp:L3 Standard Error: MASTER MPU TARGET DSP1_SDMA (Read Link): At Address: 0x00006004 : Data Access in User mode during Functional access +[ 289.071043] Modules linked in: xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo xhci_plat_hcd xhci_hcd dwc3 udc_core rpmsg_proto rpmsg_rpc snd_soc_simple_card snd_soc_simp) +[ 289.130533] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 4.19.59-g5f8c1c6121 #1 +[ 289.139007] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 289.145126] Backtrace: +[ 289.147595] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 289.155202] r7:c0df8988 r6:60060193 r5:00000000 r4:c125001c +[ 289.160893] [] (show_stack) from [] (dump_stack+0x90/0xa4) +[ 289.168151] [] (dump_stack) from [] (__warn+0xdc/0xf8) +[ 289.175059] r7:c0df8988 r6:00000009 r5:00000000 r4:c1201adc +[ 289.180747] [] (__warn) from [] (warn_slowpath_fmt+0x50/0x6c) +[ 289.188265] r9:ef1dc9c0 r8:f0880358 r7:c0df88a8 r6:c0df87f4 r5:c0df8958 r4:c1204c48 +[ 289.196046] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x330/0x380) +[ 289.204956] r3:ef221a80 r2:c0df8958 +[ 289.208547] r5:00000004 r4:80080001 +[ 289.212145] [] (l3_interrupt_handler) from [] (__handle_irq_event_percpu+0x68/0x140) +[ 289.221668] r10:c1251c37 r9:ef21ff00 r8:00000017 r7:c1201c08 r6:00000000 r5:ef21ff68 +[ 289.229530] r4:ef221f40 +[ 289.232079] [] (__handle_irq_event_percpu) from [] (handle_irq_event_percpu+0x34/0x88) +[ 289.241776] r10:00000001 r9:c1200000 r8:ef00c000 r7:00000001 r6:ef21ff00 r5:ef21ff68 +[ 289.249638] r4:c1204c48 +[ 289.252188] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) +[ 289.261099] r6:c120a434 r5:ef21ff68 r4:ef21ff00 +[ 289.265742] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x168) +[ 289.274304] r7:00000001 r6:c120a434 r5:ef21ff68 r4:ef21ff00 +[ 289.279992] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) +[ 289.288642] r7:00000001 r6:c1201eb0 r5:00000000 r4:c1068cfc +[ 289.294330] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) +[ 289.303071] [] (__handle_domain_irq) from [] (gic_handle_irq+0x44/0x80) +[ 289.311460] r9:c1200000 r8:fa213000 r7:c1201cd0 r6:fa212000 r5:fa21200c r4:c1205100 +[ 289.319241] [] (gic_handle_irq) from [] (__irq_svc+0x58/0x8c) +[ 289.326755] Exception stack(0xc1201cd0 to 0xc1201d18) +[ 289.331829] 1cc0: bf0252a4 bf023038 00000000 ffffffff +[ 289.340045] 1ce0: 00000000 bf025280 00000000 006000c0 00000000 00000000 00000001 c1201d4c +[ 289.348259] 1d00: c1201d50 c1201d20 c02a01a0 bf023110 60060113 ffffffff +[ 289.354905] r9:c1200000 r8:00000000 r7:c1201d04 r6:ffffffff r5:60060113 r4:bf023110 +[ 289.362695] [] (polling_register [gdbserverproxy]) from [] (call_timer_fn+0x2c/0x9c) +[ 289.372217] r10:00000001 r9:bf023038 r8:00000000 r7:00000200 r6:bf023038 r5:00000101 +[ 289.380082] r4:ffffe000 r3:c1200000 +[ 289.383677] [] (call_timer_fn) from [] (expire_timers+0x90/0x9c) +[ 289.391455] r6:c1201da4 r5:ef642540 r4:bf0252a4 +[ 289.396097] [] (expire_timers) from [] (run_timer_softirq+0xac/0x1ac) +[ 289.404311] r9:00000101 r8:c1204c48 r7:c1203d00 r6:c1201da4 r5:ef642540 r4:c1201da4 +[ 289.412094] [] (run_timer_softirq) from [] (__do_softirq+0x124/0x28c) +[ 289.420308] r8:40000001 r7:ffffe000 r6:c1203080 r5:c1203084 r4:00000020 +[ 289.427043] [] (__do_softirq) from [] (irq_exit+0xd4/0x110) +[ 289.434386] r10:c10684f0 r9:c1200000 r8:ef00c000 r7:00000001 r6:00000000 r5:00000000 +[ 289.442248] r4:c1068cfc +[ 289.444797] [] (irq_exit) from [] (__handle_domain_irq+0x68/0xbc) +[ 289.452666] [] (__handle_domain_irq) from [] (gic_handle_irq+0x44/0x80) +[ 289.461055] r9:c1200000 r8:fa213000 r7:c1201eb0 r6:fa212000 r5:fa21200c r4:c1205100 +[ 289.468833] [] (gic_handle_irq) from [] (__irq_svc+0x58/0x8c) +[ 289.476348] Exception stack(0xc1201eb0 to 0xc1201ef8) +[ 289.481423] 1ea0: 00000000 00053274 fe600000 00000000 +[ 289.489637] 1ec0: ffffe000 c1204c7c c1204cc4 00000001 00000000 00000000 c10684f0 c1201f0c +[ 289.497851] 1ee0: c1201eec c1201f00 c0221cfc c0208e94 60060013 ffffffff +[ 289.504496] r9:c1200000 r8:00000000 r7:c1201ee4 r6:ffffffff r5:60060013 r4:c0208e94 +[ 289.512282] [] (arch_cpu_idle) from [] (default_idle_call+0x30/0x34) +[ 289.520414] [] (default_idle_call) from [] (do_idle+0x20c/0x2b4) +[ 289.528195] [] (do_idle) from [] (cpu_startup_entry+0x20/0x24) +[ 289.535799] r10:c104aa38 r9:c1253700 r8:ffffffff r7:c1253700 r6:00000000 r5:00000002 +[ 289.543662] r4:000000c6 +[ 289.546211] [] (cpu_startup_entry) from [] (rest_init+0xd0/0xd4) +[ 289.553993] [] (rest_init) from [] (start_kernel+0x448/0x470) +[ 289.561508] r5:00000000 r4:c1253758 +[ 289.565100] [] (start_kernel) from [<00000000>] ( (null)) +[ 289.571481] ---[ end trace a144df29d5042f35 ]--- +[ 289.576188] Unhandled fault: asynchronous external abort (0x1211) at 0x00000000 +[ 289.583533] pgd = 3c4c5ae5 +[ 289.586251] [00000000] *pgd=80000080004003, *pmd=00000000 +[ 289.591685] Internal error: : 1211 [#1] PREEMPT SMP ARM +[ 289.596931] Modules linked in: xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo xhci_plat_hcd xhci_hcd dwc3 udc_core rpmsg_proto rpmsg_rpc snd_soc_simple_card snd_soc_simp) +[ 289.656407] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W O 4.19.59-g5f8c1c6121 #1 +[ 289.664880] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 289.671003] PC is at arch_cpu_idle+0x28/0x44 +[ 289.675295] LR is at omap_do_wfi+0x8/0x5c +[ 289.679321] pc : [] lr : [] psr: 60060013 +[ 289.685614] sp : c1201f00 ip : c1201eec fp : c1201f0c +[ 289.690861] r10: c10684f0 r9 : 00000000 r8 : 00000000 +[ 289.696108] r7 : 00000001 r6 : c1204cc4 r5 : c1204c7c r4 : ffffe000 +[ 289.702664] r3 : 00000000 r2 : fe600000 r1 : 00053274 r0 : 00000000 +[ 289.709222] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user +[ 289.716388] Control: 30c5387d Table: acfb9a00 DAC: fffffffd +[ 289.722158] Process swapper/0 (pid: 0, stack limit = 0x0054632b) +[ 289.728190] Stack: (0xc1201f00 to 0xc1202000) +[ 289.732568] 1f00: c1201f1c c1201f10 c0a11d8c c0208e78 c1201f6c c1201f20 c025a238 c0a11d68 +[ 289.740782] 1f20: ef646180 00000000 c0dcecb0 c1251c16 c1204cdc c1204c48 00000000 5f661807 +[ 289.748997] 1f40: ffffffff 000000c6 00000002 00000000 c1253700 ffffffff c1253700 c104aa38 +[ 289.757211] 1f60: c1201f7c c1201f70 c025a5cc c025a038 c1201f94 c1201f80 c0a0c074 c025a5b8 +[ 289.765426] 1f80: c1253758 00000000 c1201ff4 c1201f98 c1000dfc c0a0bfb0 ffffffff ffffffff +[ 289.773641] 1fa0: 00000000 c10005dc ffffffff 00000000 c1204c48 c1204c40 00000000 c104aa38 +[ 289.781855] 1fc0: 5f620b3c 00000000 00000000 c1000330 00000000 30c0387d 00000fe6 8ffe5000 +[ 289.790070] 1fe0: 412fc0f2 30c5387d 00000000 c1201ff8 00000000 c10009c0 00000000 00000000 +[ 289.798280] Backtrace: +[ 289.800748] [] (arch_cpu_idle) from [] (default_idle_call+0x30/0x34) +[ 289.808880] [] (default_idle_call) from [] (do_idle+0x20c/0x2b4) +[ 289.816661] [] (do_idle) from [] (cpu_startup_entry+0x20/0x24) +[ 289.824268] r10:c104aa38 r9:c1253700 r8:ffffffff r7:c1253700 r6:00000000 r5:00000002 +[ 289.832130] r4:000000c6 +[ 289.834679] [] (cpu_startup_entry) from [] (rest_init+0xd0/0xd4) +[ 289.842460] [] (rest_init) from [] (start_kernel+0x448/0x470) +[ 289.849976] r5:00000000 r4:c1253758 +[ 289.853567] [] (start_kernel) from [<00000000>] ( (null)) +[ 289.859951] Code: e3530000 0a000002 e12fff33 f1080080 (e89da800) +[ 289.866082] ---[ end trace a144df29d5042f36 ]--- +[ 289.870720] Kernel panic - not syncing: Attempted to kill the idle task! +[ 289.877454] CPU1: stopping +[ 289.880180] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D W O 4.19.59-g5f8c1c6121 #1 +[ 289.888655] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 289.894773] Backtrace: +[ 289.897241] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 289.904847] r7:ef0c5f08 r6:60060193 r5:00000000 r4:c125001c +[ 289.910535] [] (show_stack) from [] (dump_stack+0x90/0xa4) +[ 289.917793] [] (dump_stack) from [] (handle_IPI+0x1b0/0x1dc) +[ 289.925223] r7:ef0c5f08 r6:00000001 r5:00000000 r4:c1068cfc +[ 289.930912] [] (handle_IPI) from [] (gic_handle_irq+0x7c/0x80) +[ 289.938515] r6:fa212000 r5:fa21200c r4:c1205100 +[ 289.943156] [] (gic_handle_irq) from [] (__irq_svc+0x58/0x8c) +[ 289.950671] Exception stack(0xef0c5f08 to 0xef0c5f50) +[ 289.955746] 5f00: 00000000 0005e88c fe600000 00000000 ffffe000 c1204c7c +[ 289.963961] 5f20: c1204cc4 00000002 00000000 00000000 c10684f0 ef0c5f64 ef0c5f44 ef0c5f58 +[ 289.972174] 5f40: c0221cfc c0208e94 60060013 ffffffff +[ 289.977250] r9:ef0c4000 r8:00000000 r7:ef0c5f3c r6:ffffffff r5:60060013 r4:c0208e94 +[ 289.985035] [] (arch_cpu_idle) from [] (default_idle_call+0x30/0x34) +[ 289.993167] [] (default_idle_call) from [] (do_idle+0x20c/0x2b4) +[ 290.000948] [] (do_idle) from [] (cpu_startup_entry+0x20/0x24) +[ 290.008553] r10:00000000 r9:412fc0f2 r8:80007000 r7:c1253990 r6:00000001 r5:ef0c4000 +[ 290.016416] r4:00000087 +[ 290.018965] [] (cpu_startup_entry) from [] (secondary_start_kernel+0x174/0x180) +[ 290.028055] [] (secondary_start_kernel) from [<8020236c>] (0x8020236c) +[ 290.035484] r7:c1253990 r6:30c0387d r5:00000000 r4:af0772c0 +[ 290.041179] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]--- + + + + +####### KERNEL DETAILS ------------------------------------------------------------------------------------------------------------------------------------------------------ + +# uname -a +Linux dra7xx-evm 4.19.59-g5f8c1c6121 #1 SMP PREEMPT Wed Dec 18 03:09:55 UTC 2019 armv7l GNU/Linux + + +####### MODULE DETAILS ------------------------------------------------------------------------------------------------------------------------------------------------------ + +# lsmod +Module Size Used by +xfrm_user 32768 2 +xfrm4_tunnel 16384 0 +ipcomp 16384 0 +xfrm_ipcomp 16384 1 ipcomp +esp4 20480 0 +ah4 16384 0 +af_key 36864 0 +xfrm_algo 16384 5 xfrm_user,esp4,ah4,af_key,xfrm_ipcomp +xhci_plat_hcd 16384 0 +xhci_hcd 143360 1 xhci_plat_hcd +dwc3 73728 0 +udc_core 28672 1 dwc3 +rpmsg_rpc 32768 0 +rpmsg_proto 16384 0 +snd_soc_simple_card 16384 0 +snd_soc_simple_card_utils 16384 1 snd_soc_simple_card +extcon_usb_gpio 16384 0 +snd_soc_omap_hdmi 16384 0 +c_can_platform 16384 0 +c_can 20480 1 c_can_platform +omap_aes_driver 24576 0 +can_dev 28672 1 c_can +omap_sham 28672 0 +omap_wdt 16384 0 +ahci_platform 16384 0 +phy_omap_usb2 16384 3 +libahci_platform 20480 1 ahci_platform +libahci 36864 2 ahci_platform,libahci_platform +libata 208896 3 ahci_platform,libahci_platform,libahci +ti_vip 49152 0 +ti_vpe 28672 0 +ti_sc 36864 2 ti_vpe,ti_vip +ti_csc 16384 2 ti_vpe,ti_vip +v4l2_fwnode 20480 1 ti_vip +ti_vpdma 24576 2 ti_vpe,ti_vip +dwc3_omap 16384 0 +rtc_omap 20480 1 +omap_hdq 16384 0 +omap_des 20480 0 +ov1063x 24576 0 +des_generic 28672 1 omap_des +crypto_engine 16384 2 omap_des,omap_aes_driver +omap_crypto 16384 2 omap_des,omap_aes_driver +wire 32768 1 omap_hdq +snd_soc_tlv320aic3x 57344 1 +omap_remoteproc 20480 0 +virtio_rpmsg_bus 20480 0 +remoteproc 49152 3 rpmsg_rpc,omap_remoteproc,rpmsg_proto +sch_fq_codel 20480 1 +uio_module_drv 16384 0 +uio 20480 1 uio_module_drv +ftdi_sio 40960 0 +usbserial 36864 1 ftdi_sio +usbcore 217088 4 ftdi_sio,usbserial,xhci_plat_hcd,xhci_hcd +usb_common 16384 3 udc_core,usbcore,dwc3 +gdbserverproxy 16384 0 +cryptodev 49152 0 +cmemk 45056 2 + + +####### GDBPROXY DETAILS ------------------------------------------------------------------------------------------------------------------------------------------------------ + +# modinfo gdbserverproxy +filename: /lib/modules/4.19.59-g5f8c1c6121/extra/gdbserverproxy.ko +alias: char-major-240-* +license: GPL v2 +description: Interface for GDB to communicate with c66x DSP +author: Texas Instruments Incorporated +srcversion: 533BB7E5866E52F63B9ACCB +depends: +name: gdbserverproxy +vermagic: 4.19.59-g5f8c1c6121 SMP preempt mod_unload modversions ARMv7 p2v8 + +Responses: +Hi Sethu, Do you see the kernel errors before stepping through the code or when you hit a specific line? Regards, Mike + +Hi Sethu, I was able to reproduce the behavior you saw and discussed with our team. The behavior is considered normal because the DSP will enter a non-suspendable state after debugging, and Linux will complain when power management tries to put the DSP into suspend. Regards, Mike + diff --git a/data2/text/range/15001-20000/900097.txt b/data2/text/range/15001-20000/900097.txt new file mode 100644 index 0000000000000000000000000000000000000000..a8343517678e3c47f45c2d5f92428100f52e6387 --- /dev/null +++ b/data2/text/range/15001-20000/900097.txt @@ -0,0 +1,32 @@ +Ticket Name: DRA726: Vision usecase question + +Query Text: +Part Number: DRA726 Other Parts Discussed in Thread: TDA2 I am trying to create a usecase for our board but am not sure how to set the configuration This one seems close to what I want but is surround video, I do not want surround, hlos/adas/src/usecases/csi2Cal_multi_cam_view I want 1 to 4 different cameras. It is likely that the customer will only have 2 at a time because of the size of the display but he may have all 4 at once somewhat reduced in size. Our cameras connect to a CSI2 port, we also have a serdes on a CSI2 port for input and HDMI for output. I am only doing the analog camera for now. I need for the picture to be deinterlaced. My driver supports misc PAL and NTSC video systems. The device that connects to the CSI2 port is a isl79987 I already have the bsp code written. My Vision code is using 3.08 as a base. My yocto is based on the one from the automotive SDK6 where I removed multiple unused recipes. Kernel is 4.19 UseCase: chains_csi2CalMultiCam_View // // surround view algorithm and display // IssCapture -> VPE_sv_csc -> Sync -> SgxFrmcpy (A15) -> Display_M4 (IPU1_0) // // Graphics overlay display // GrpxSrc -> Display_Grpx Michel Catudal ACTIA Corp Working from home + +Responses: +Hi Michael, If I understand your usecase, you want to dynamically change the number of capture channels is it? Thanks RamPrasad + +RamPrasad, On Linux I had to modify the CAL driver to support 4 channels, the original CAL module only supported 1 The device is connected to CSI2-1. AG5 AH5 AG6 AH6 AG7 AH7 Our partner in Spain use an old SDK 3.02 with android. They use a DRA76 which is in the tda2px family while the DRA726 is in the tda2ex family. Their implementation use isscapture and modified vip chain. They can only show one camera at a time. Our customers want to be able to show sometimes 4 cameras, they want to be able to show at least 2 in normal operation. Showing 4 on the 7 inch or 13 inch display I need to shrink the pictures, the application need to be able to tell the size and where they go on the screen. As I looked to their implementation they only use a RTOS usecase unless they didn't provide me all the info. I will get in touch with them today as they seem to be back to work. As you probably know Madrid was seriously affected by the Coronavirus. I need to work with linux which is why I am looking at a hlos usecase which according to the chart can support both RTOS and Linux. Michel Catudal ACTIA Corp + +Hi Micheal, There is already 4channel captured video with with 2x2 mosaic. Did you check with this example? Thanks RamPrasad + +RamPrasad, What would be the name of the usecase? Michel Catudal ACTIA Corp + +RamPrasad, Are you talking about csi2Cal_multi_cam_view in tda2ex_evm_linux_all ? Any details on how to use these usecases onces compiled in? I created a use case based on that one which I called tda2ex_gd_linux_all I added my own board and tda2ex-gd in misc files for the PLATFORM, plus changes to add support for the intersil camera device which connects to the CSI2 second port. One thing I found odd, in the evm.c file in u-boot, it refers to VIP3 has the one that controls de CAL clock, it is true for the DRA76 but not for the DRA726 where it would be VIP2, there is no VIP3 in the DRA726. I created my own board files since our board is quite different from the TI EVMs. I removed a few items from uc_cfg.mk Original file : UC_lvds_vip_multi_cam_3d_srv=yes UC_csi2Cal_multi_cam_3d_srv=yes UC_csi2Cal_multi_cam_3d_srv_cbb=yes UC_lvds_vip_multi_cam_view_sgx_display=yes UC_lvds_vip_multi_cam_vpe_enc_null=yes UC_csi2Cal_multi_cam_view=yes UC_srv_calibration=yes UC_null_src_decode_display=yes UC_vip_single_cam_connectorLinksA15_sgx_display=yes UC_vip_single_cam_enc_dec_sgx_display=yes UC_vip_single_cam_framecopy_sgx_display=yes UC_vip_single_cam_sgx_display=yes ifeq ($(AVB_INCLUDE),yes) UC_avb_rx_multi_cam_decode_sgx_display=yes UC_avb_rx_multi_cam_3d_srv=yes UC_avbrx_sv_display_avbtx=yes endif ifeq ($(EARLY_USECASE_ENABLE),yes) UC_early_capture_late_weston=yes endif New file UC_csi2Cal_multi_cam_view=yes UC_null_src_decode_display=yes UC_vip_single_cam_connectorLinksA15_sgx_display=yes UC_vip_single_cam_enc_dec_sgx_display=yes UC_vip_single_cam_framecopy_sgx_display=yes UC_vip_single_cam_sgx_display=yes UC_disp_dist_src_display=yes ifeq ($(AVB_INCLUDE),yes) UC_avb_rx_multi_cam_decode_sgx_display=yes endif ifeq ($(EARLY_USECASE_ENABLE),yes) UC_early_capture_late_weston=yes endif Michel Catudal ACTIA Corp + +RamPrasad, As I look to implement the usecase I see that I cannot use iss_capture since the Image Subsytem doesn't exists in the DRA726. As I look thru the technical manuals of the DRA76 and DRA726 I see that their CSI2 ports are similar except that the clock for the DRA76 is for VIP3 while for DRA726 is for VIP2. The DRA76 uses the ISS module which doesn't exist on the DRA726. What link would I use to capture from the CSI2 port? The port used is the csi2_1 The Intersil device transmits 4 camera inputs to the 2 lanes. I am assuming that I need to create a use case with vip_capture, is that correct? I don't see any usecase that uses vip_capture The BSP ISL code I have from our partners in Spain is meant to be used on a DRA76, I need to get it to work on the DRA726. Michel Catudal ACTIA Corp + +Hi Michael, Yes, all 4ch capture and display usecases make use of EDMA to create a mosaic of 2x2 to show all 4 channels on display. You can make use of same links for your captures. Thanks RamPrasad + +RamPrasad, What is the name of that example? Michel Catudal ACTIA Corp + +Hi Michael, I am referring to chains_lvdsVipMultiCam_SgxDisplay This is a visionSDK linux usecase for capturing 4 channels and displaying all together as 2x2 mosaic. Thanks RamPrasad + +RamPrasad, I saw that one. It seems to be only for the paralled video input. How do I capture from the CSI2 port on the DRA726 with this example? Michel Catudal ACTIA Corp + +Hi Michael, There is already this usecase available with visionsdk linux ./apps/src/hlos/adas/src/usecases/csi2Cal_multi_cam_view/chains_csi2CalMultiCam_View.c which captures 4 videos and displays as 2x2 mosaic. Thanks RamPrasad + +RamPrasad, I found that one and that is the one I am using. I have added a sensor entry and the bsp. I added some missing I2C6 support and changed the LCD info to match our LCD displays. Everything is compiling until linking. It gives me errors with Radar which I do not use. How do I remove that? I don't see where the RADAR stuff can be disabled. I have some issues with linking due to that undefined first referenced symbol in file --------- ---------------- Bsp_ar12xxBoot /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxConfigParams /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxDeInit /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxEnableDummySource /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxGetConnType /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxGetWidthHeight /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxInit /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxRegisterConfig /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxSetTestSourceSeeds /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxStartRadar /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxStopRadar /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxSwitchConfig /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 Bsp_ar12xxUnRegisterConfig /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/lib/tda2ex-evm/m4/release/app_alg_plugins.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2 ex_gd_linux_all/vision_sdk/bin/tda2ex-evm/vision_sdk_ipu2_release.xem4" not built /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/rtos/makerules/rules_m4.mk:312 : la recette pour la cible « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/vision_sdk/bin/tda2ex-evm/vision_sdk_ipu2_release.xem4 » a échouée make[7]: *** [/home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2ex_gd_linux_all/vision_sdk/bin/tda2ex-evm/vision_sdk_ipu2_release.xem4] Erreur 1 make[7] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2ex/ipu2 » /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/rtos/makerules/common.mk:271 : la recette pour la cible « ipu2 » a échouée make[6]: *** [ipu2] Erreur 2 make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2ex/ipu2 » MAKEFILE.MK:162 : la recette pour la cible « apps_ipu2 » a échouée make[5]: *** [apps_ipu2] Erreur 2 make[5] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/rtos » MAKEFILE.MK:31 : la recette pour la cible « apps » a échouée make[4]: *** [apps] Erreur 2 make[4] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/rtos » MAKEFILE.MK:315 : la recette pour la cible « apps » a échouée make[3]: *** [apps] Erreur 2 make[3] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps » Makefile:175 : la recette pour la cible « apps_exe » a échouée make[2]: *** [apps_exe] Erreur 2 make[2] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build » Makefile:38 : la recette pour la cible « apps » a échouée make[1]: *** [apps] Erreur 2 make[1] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build » Makefile:12 : la recette pour la cible « vision_sdk » a échouée make: *** [vision_sdk] Erreur 2 Michel Catudal ACTIA Corp + +RamPrasad, I resolved the issue with the radar code by removing some items from the Makefile. Even though the configuration stated no radar board it still compiled radar code but since the link information for the radar was missing it gave errors on linking. TI must not have tested this without the radar support needed. Now everything seems to compile right until doing the graphic links I use make -j to see the messages and get egl.h missing all over. I am assuming that it is looking in the rootfs where I don't have the dev files. But then when I add EXTRA_IMAGE_FEATURES += "dev-pkgs" to the image, I do not want to remove openssh I get error messages * Solver encountered 1 problem(s): * Problem 1/1: * - package openssh-dev-7.8p1+git-r0.0.armv7at2hf-neon requires openssh = 7.8p1+git-r0.0, but none of the providers can be installed * * Solution 1: * - allow deinstallation of packagegroup-arago-tisdk-addons-1.0-r77.5.actia_gd * - do not ask to install a package providing dropbear-dev * - do not ask to install a package providing packagegroup-arago-tisdk-addons-dev * Solution 2: * - do not ask to install a package providing openssh-dev /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/system/system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. make[6]: rien à faire pour « lib ». make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut » make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/select » make -C /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/select CORE=a15_0 ; make[6] : on entre dans le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/select » In file included from sgxRender1x1.h:65, from sgxRender1x1.c:62: /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/system/system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. make[6]: rien à faire pour « lib ». make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/select » make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm » make -C /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm CORE=a15_0 ; make[6] : on entre dans le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm » In file included from sgxRender3x3.h:72, from sgxRender3x3.c:62: /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/system/system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. make[6]: rien à faire pour « lib ». make[6] : on quitte le répertoire « /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm » In file included from sgxFrmcpyLink_priv.h:99, from sgxFrmcpyLink_drv.c:80: /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/system/system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. In file included from sgxRender2x4.h:72, from sgxRender2x4.c:62: /home/michel/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/src/hlos/system/system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. In file included from system_gl_egl_utils.c:69: system_gl_egl_utils.h:76:10: fatal error: EGL/egl.h: Aucun fichier ou dossier de ce type #include ^~~~~~~~~~~ compilation terminated. Michel Catudal ACTIA Corp + diff --git a/data2/text/range/15001-20000/920553.txt b/data2/text/range/15001-20000/920553.txt new file mode 100644 index 0000000000000000000000000000000000000000..0052cbf37234e335bff30d65f659f9eb5cc2c84c --- /dev/null +++ b/data2/text/range/15001-20000/920553.txt @@ -0,0 +1,137 @@ +Ticket Name: TDA2EX17EVM: TDA2 EMIF setting for TIDL + +Query Text: +Part Number: TDA2EX17EVM Hi Champs: Customer is making the TIDL SSD for 720P, he is able to change the EMIF from 512MB to 512X2MB (Dual EMIF) as expected. Now, he is asking if we are able to enlarge the SR1 ? and can he modify with DUAL_EMIF with 1GB_512MB? Please comment, thanks. BR Rio + +Responses: +Hi, Can you comment on what "SR1" refers to? Also, what is meant by "1GB_512MB"? How does it differ than "512x2MB"? Best regards, Kevin + +Hi, This is wxchen, the Rio's customer. 1) I wanna know how to enlarge heap size on RTOS(SR1_FRAME_BUFFER_SIZE in mem_segment_definition_bios.xs, please correct me if i wrong) at EMIFMODE=DUAL_EMIF_2X512MB setup. is it possible to having continuous memory on RTOS using both of EMIF1 & EMIF2? 2) I also wanna know how to setup EMIDMODE=DUAL_EMIF_1GB_512MB and SINGLE_EMIF_1GB, I have referred the settings written on https://e2e.ti.com/support/processors/f/791/p/613857/2277707, but evm-board will stuck on booting. Is there any document indicating that changing memory map to DUAL_EMIF_1GB_512MB and SINGLE_EMIF_1GB? ( i found how to change memory map to DUAL_EMIF_2X512MB on VisionSDK_UserGuide_MemoryMap.pdf in VSDK, and i successed changing memory map to DUAL_EMIF_2X512MB by steps of that document. ) 3) In addition, what’s exactly HW setup for EMIFMODE=DUAL_EMIF_2X512MB? Is it using two EMIF modules and dual 512 MB DDR chips for each EMIF? Thanks Best regards, Wxchen + +HI, The supported EMIFMODE option in TDA2XX are EMIFMODE = SINGLE_EMIF_512MB (default) or you can set below options DUAL_EMIF_1GB_512MB or DUAL_EMIF_2X512MB or SINGLE_EMIF_256MB NOTE: DUAL_EMIF_1GB_512MB : uses EMIF2 - 1GB and EMIF1 512MB, BUT in non-interleaved mode Vision SDK uses only 1GB hence effectivly this is single EMIF non-interleaved mode for Vision SDK 0x8000_0000 - 0xBFFF_FFFF is mapped to EMIF2 0xC000_0000 - 0xDFFF_FFFF is mapped to EMIF1 DUAL_EMIF_2X512MB : uses EMIF1 and EMIF 512MB each in interleaved mode 0x8000_0000 - 0x9FFF_FFFF is interleaved between EMIF1 and EMIF2 SINGLE_EMIF_256MB : uses EMIF1 with 256MB 0x8000_0000 - 0x8FFF_FFFF is mapped to EMIF1 SINGLE_EMIF_512MB : uses EMIF1 with 512MB 0x8000_0000 - 0x9FFF_FFFF is mapped to EMIF1 By default, TDA2XX is configured with SINGLE_EMIF_512MB & here we will get SR1 memory around 250MB. If it is not sufficient for TIDL processing you choose the DUAL_EMIF_2X512MB option. In this configuration, we will get SR1 around 430MB. After choosing EMIFMODE=DUAL_EMIF_2X512MB we have to apply some patches to work & this is already explained in the "VisionSDK_UserGuide_MemoryMap.pdf". But this is not updated with the latest SDK version. So please add the below changes in your code to work properly. diff --git a/apps/build/tda2xx/mem_segment_definition_bios.xs b/apps/build/tda2xx/mem_segment_definition_bios.xs index 9dda0630f..d21c0116f 100755 --- a/apps/build/tda2xx/mem_segment_definition_bios.xs +++ b/apps/build/tda2xx/mem_segment_definition_bios.xs @@ -18,7 +18,7 @@ function getMemSegmentDefinition_external(core) MB=KB*KB; DDR3_ADDR = 0x80000000; - DDR3_SIZE = 512*MB; + DDR3_SIZE = 1024*MB; /* * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 @@ -27,7 +27,7 @@ function getMemSegmentDefinition_external(core) * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg */ DDR3_BASE_ADDR_0 = DDR3_ADDR; - DDR3_BASE_SIZE_0 = 507*MB; + DDR3_BASE_SIZE_0 = 512*MB; /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE @@ -42,7 +42,7 @@ function getMemSegmentDefinition_external(core) * in non-cached virtual address of * DDR3_BASE_ADDR_1 + 512*MB */ - DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; + /* DDR3_BASE_ADDR_1= DDR3_BASE_ADDR_1+512*MB; */ } DSP1_L2_SRAM_ADDR = 0x40800000; @@ -122,7 +122,7 @@ function getMemSegmentDefinition_external(core) if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") { /* Ensure ECC regions are 64kB aligned */ - SR1_FRAME_BUFFER_SIZE = 297.5*MB; + SR1_FRAME_BUFFER_SIZE = 390*MB; SR1_BUFF_ECC_ASIL_SIZE = 1*MB; SR1_BUFF_ECC_QM_SIZE = 40*MB; SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; @@ -132,7 +132,7 @@ function getMemSegmentDefinition_external(core) SR1_BUFF_ECC_ASIL_SIZE = 4*KB; SR1_BUFF_ECC_QM_SIZE = 4*KB; SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; - SR1_FRAME_BUFFER_SIZE = 339.5*MB - (SR1_BUFF_ECC_ASIL_SIZE + SR1_BUFF_ECC_QM_SIZE + SR1_BUFF_NON_ECC_ASIL_SIZE); + SR1_FRAME_BUFFER_SIZE = 432*MB - (SR1_BUFF_ECC_ASIL_SIZE + SR1_BUFF_ECC_QM_SIZE + SR1_BUFF_NON_ECC_ASIL_SIZE); if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { SR1_FRAME_BUFFER_SIZE = SR1_FRAME_BUFFER_SIZE - A15_0_DATA_SIZE_INC; @@ -189,7 +189,7 @@ function getMemSegmentDefinition_external(core) * be kept constant across all platforms and should match the increment * to heapStats.heapSize in utils_xmc_mpu.c */ - EVE1_VECS_ADDR = DDR3_BASE_ADDR_0; + EVE1_VECS_ADDR = DDR3_BASE_ADDR_1 + 16*MB; EVE1_CODE_ADDR = EVE1_VECS_ADDR + EVE1_VECS_SIZE; EVE1_DATA_ADDR = EVE1_CODE_ADDR + EVE1_CODE_SIZE; EVE2_VECS_ADDR = EVE1_DATA_ADDR + EVE1_DATA_SIZE; @@ -201,23 +201,23 @@ function getMemSegmentDefinition_external(core) EVE4_VECS_ADDR = EVE3_DATA_ADDR + EVE3_DATA_SIZE; EVE4_CODE_ADDR = EVE4_VECS_ADDR + EVE4_VECS_SIZE; EVE4_DATA_ADDR = EVE4_CODE_ADDR + EVE4_CODE_SIZE; - NDK_DATA_ADDR = EVE4_DATA_ADDR + EVE4_DATA_SIZE; + NDK_DATA_ADDR = DDR3_BASE_ADDR_0 + 16*MB; IPU1_1_CODE_ADDR = NDK_DATA_ADDR + NDK_DATA_SIZE; IPU1_0_CODE_ADDR = IPU1_1_CODE_ADDR + IPU1_1_CODE_SIZE; IPU2_CODE_ADDR = IPU1_0_CODE_ADDR + IPU1_0_CODE_SIZE; - DSP1_CODE_ADDR = IPU2_CODE_ADDR + IPU2_CODE_SIZE; + DSP1_CODE_ADDR = EVE4_DATA_ADDR + EVE4_DATA_SIZE; DSP2_CODE_ADDR = DSP1_CODE_ADDR + DSP1_CODE_SIZE; - IPU1_1_DATA_ADDR = DSP2_CODE_ADDR + DSP2_CODE_SIZE; + IPU1_1_DATA_ADDR = IPU2_CODE_ADDR + IPU2_CODE_SIZE; IPU1_0_DATA_ADDR = IPU1_1_DATA_ADDR + IPU1_1_DATA_SIZE; IPU2_DATA_ADDR = IPU1_0_DATA_ADDR + IPU1_0_DATA_SIZE; - DSP1_DATA_ADDR = IPU2_DATA_ADDR + IPU2_DATA_SIZE; + DSP1_DATA_ADDR = DSP2_CODE_ADDR + DSP2_CODE_SIZE; DSP2_DATA_ADDR = DSP1_DATA_ADDR + DSP1_DATA_SIZE; - A15_0_DATA_ADDR = DSP2_DATA_ADDR + DSP2_DATA_SIZE; + A15_0_DATA_ADDR = IPU2_DATA_ADDR + IPU2_DATA_SIZE; SR1_BUFF_ECC_ASIL_ADDR = A15_0_DATA_ADDR + A15_0_DATA_SIZE; SR1_BUFF_ECC_QM_ADDR = SR1_BUFF_ECC_ASIL_ADDR + SR1_BUFF_ECC_ASIL_SIZE; - DSP1_DATA_ADDR_2 = SR1_BUFF_ECC_QM_ADDR + SR1_BUFF_ECC_QM_SIZE; + DSP1_DATA_ADDR_2 = DSP2_DATA_ADDR + DSP2_DATA_SIZE; DSP2_DATA_ADDR_2 = DSP1_DATA_ADDR_2 + DSP1_DATA_SIZE_2; - SR1_BUFF_NON_ECC_ASIL_ADDR = DSP2_DATA_ADDR_2 + DSP2_DATA_SIZE_2; + SR1_BUFF_NON_ECC_ASIL_ADDR = SR1_BUFF_ECC_QM_ADDR + SR1_BUFF_ECC_QM_SIZE; SR1_FRAME_BUFFER_ADDR = SR1_BUFF_NON_ECC_ASIL_ADDR + SR1_BUFF_NON_ECC_ASIL_SIZE; /* Non Cached Section */ diff --git a/apps/configs/tda2xx_evm_bios_all/cfg.mk b/apps/configs/tda2xx_evm_bios_all/cfg.mk index 7eea438d1..87364e024 100755 --- a/apps/configs/tda2xx_evm_bios_all/cfg.mk +++ b/apps/configs/tda2xx_evm_bios_all/cfg.mk @@ -34,6 +34,7 @@ DUAL_A15_SMP_BIOS=no # Supported values: DDR_MEM_512M DDR_MEM=DDR_MEM_512M +EMIFMODE=DUAL_EMIF_2X512MB # Supported values: ipu1_0 ipu1_1 a15_0 none NDK_PROC_TO_USE=a15_0 diff --git a/build/rtos/makerules/build_pdk.mk b/build/rtos/makerules/build_pdk.mk index 3e456fabb..4246b4796 100755 --- a/build/rtos/makerules/build_pdk.mk +++ b/build/rtos/makerules/build_pdk.mk @@ -15,6 +15,7 @@ PDK_BUILD_OPTIONS += INCLUDE_DUMMY_OSAL=no PDK_BUILD_OPTIONS += PACKAGE_VIP=yes PDK_BUILD_OPTIONS += INCLUDE_SYSBIOS=yes PDK_BUILD_OPTIONS += VPS_RADAR_INCLUDE=yes +PDK_SBL_BUILD_OPTIONS += EMIF_MODE=DUAL_EMIF_2X512MB ifeq ($(VPE_INCLUDE),yes) PDK_BUILD_OPTIONS += PACKAGE_VPE=yes diff --git a/links_fw/src/rtos/bios_app_common/tda2xx/a15_0/a15_0.cfg b/links_fw/src/rtos/bios_app_common/tda2xx/a15_0/a15_0.cfg index f54833e68..8a85aec48 100755 --- a/links_fw/src/rtos/bios_app_common/tda2xx/a15_0/a15_0.cfg +++ b/links_fw/src/rtos/bios_app_common/tda2xx/a15_0/a15_0.cfg @@ -162,7 +162,7 @@ attrs2.attrIndx = 0; // Non-cache, normal memory // Set the descriptor for each entry in the address range for (var i=0xA0000000; i < 0xC0000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range - Mmu.setSecondLevelDescMeta(i, i-0x20000000, attrs2); + Mmu.setSecondLevelDescMeta(i, i, attrs2); } // Region for NDK packet data buffers. diff --git a/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_0/Ammu1_bios.cfg b/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_0/Ammu1_bios.cfg old mode 100644 new mode 100755 index 7809abc24..685a934a7 --- a/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_0/Ammu1_bios.cfg +++ b/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_0/Ammu1_bios.cfg @@ -204,13 +204,13 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,6 +221,6 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ + } diff --git a/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/Ammu2_bios.cfg b/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/Ammu2_bios.cfg old mode 100644 new mode 100755 index 21d55cc5f..f44a48866 --- a/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/Ammu2_bios.cfg +++ b/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/Ammu2_bios.cfg @@ -204,13 +204,13 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,5 +221,5 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ + } \ No newline at end of file diff --git a/links_fw/src/rtos/links_ipu/system/system_bsp_init.c b/links_fw/src/rtos/links_ipu/system/system_bsp_init.c index 7605432cc..c6cc1c1d6 100755 --- a/links_fw/src/rtos/links_ipu/system/system_bsp_init.c +++ b/links_fw/src/rtos/links_ipu/system/system_bsp_init.c @@ -292,10 +292,10 @@ Int32 System_bspInit(void) vpsInitPrms.physBaseAddr = 0x80000000U; vpsInitPrms.isAddrTransReq = FALSE; #else - vpsInitPrms.virtBaseAddr = 0xA0000000U; + vpsInitPrms.virtBaseAddr = 0x80000000U; vpsInitPrms.physBaseAddr = 0x80000000U; /* if Virtual address != Physical address then enable translation */ - vpsInitPrms.isAddrTransReq = TRUE; + vpsInitPrms.isAddrTransReq = FALSE; #endif Vps_printf(" SYSTEM: VPDMA Descriptor Memory Address translation" " ENABLED [0x%08x -> 0x%08x]\n", Once the above patch is applied, please run the below command. cd $(INSTALL_DIRECTORY)/vision_sdk/build rm -rf ../binaries (For clean build) make -s -j depend make -s -j make -s appimage make -s sbl Now you can try with the latest appimage & MLO to get a 430MB of SR1 memory. Note: If still wants more SR1 memory, please go with the DUAL_EMIF_1GB_512MB EMIF option & we don't have the document for this. So please understand changes done for DUAL_EMIF_2X512MB & implement the same here. Thanks Gaviraju DUAL_EMIF_1GB_512MB + +hi, thanks for providing the patch to DUAL_EMIF_2X512MB. i've done for this patch and evm board is now can booting normally on this setup. 1) i'm still wondering why the DUAL_EMIF_2X512MB only enlarge memory size from 330MB to 430MB, not from 330MB to 330MB+512MB( DUAL_EMIF_2X512MB is using more memory from HW, but the software patch is less than HW setup)? here is the memory map after my modification: MEMORY CONFIGURATION + + name origin length used unused attr fill +---------------------- -------- --------- -------- -------- ---- -------- + L2_ROM 00000000 00004000 000001a0 00003e60 RWIX + L2_RAM 20000000 00010000 00000000 00010000 RWIX + OCMC_RAM1 40300000 00080000 00000000 00080000 RWIX + OCMC_RAM2 40400000 00100000 00000000 00100000 RWIX + OCMC_RAM3 40500000 00100000 00000000 00100000 RWIX + DSP1_L2_SRAM 40800000 00048000 00000000 00048000 RWIX + DSP2_L2_SRAM 41000000 00048000 00000000 00048000 RWIX + NDK_MEM 80000000 00400000 00000000 00400000 RWIX + IPU1_1_CODE_MEM 80400000 00280000 00000000 00280000 RWIX + IPU1_0_CODE_MEM 80680000 00c00000 0053ad08 006c52f8 RWIX + IPU2_CODE_MEM 81280000 00200000 00000000 00200000 RWIX + IPU1_1_DATA_MEM 81480000 00680000 00000000 00680000 RWIX + IPU1_0_DATA_MEM 81b00000 01000000 00915604 006ea9fc RWIX + IPU2_DATA_MEM 82b00000 00700000 00000000 00700000 RWIX + A15_0_DATA_MEM 83900000 00d80000 00000000 00d80000 RWIX + SR1_BUFF_ECC_ASIL_MEM 84680000 00001000 00000000 00001000 RWIX + SR1_BUFF_ECC_QM_MEM 84681000 00001000 00000000 00001000 RWIX + SR1_BUFF_NON_ECC_ASIL 84781000 00001000 00000000 00001000 RWIX + SR1_FRAME_BUFFER_MEM 84782000 1b87d000 00000000 1b87d000 RWIX + SR0 a0000000 00020000 00020000 00000000 RWIX + REMOTE_LOG_MEM a0020000 00028000 000278a0 00000760 RWIX + LINK_STATS_MEM a0048000 00040000 00024df4 0001b20c RWIX + SYSTEM_IPC_SHM_MEM a0088000 00078000 00062388 00015c78 RWIX + SYSTEM_AUTOSAR_IPC_SH a0100000 00080000 00000000 00080000 RWIX + HDVPSS_DESC_MEM a0180000 00100000 0001d4c0 000e2b40 RWIX + EVE1_VECS_MEM a1000000 00080000 00000000 00080000 RWIX + EVE1_CODE_MEM a1080000 00200000 00000000 00200000 RWIX + EVE1_DATA_MEM a1280000 00d80000 00000000 00d80000 RWIX + EVE2_VECS_MEM a2000000 00080000 00000000 00080000 RWIX + EVE2_CODE_MEM a2080000 00200000 00000000 00200000 RWIX + EVE2_DATA_MEM a2280000 00d80000 00000000 00d80000 RWIX + EVE3_VECS_MEM a3000000 00080000 00000000 00080000 RWIX + EVE3_CODE_MEM a3080000 00200000 00000000 00200000 RWIX + EVE3_DATA_MEM a3280000 00d80000 00000000 00d80000 RWIX + EVE4_VECS_MEM a4000000 00080000 00000000 00080000 RWIX + EVE4_CODE_MEM a4080000 00200000 00000000 00200000 RWIX + EVE4_DATA_MEM a4280000 00d80000 00000000 00d80000 RWIX + DSP1_CODE_MEM a5000000 00600000 00000000 00600000 RWIX + DSP2_CODE_MEM a5600000 00400000 00000000 00400000 RWIX + DSP1_DATA_MEM a5a00000 00e00000 00000000 00e00000 RWIX + DSP2_DATA_MEM a6800000 00e00000 00000000 00e00000 RWIX + DSP1_DATA_MEM_2 a7600000 00100000 00000000 00100000 RWIX + DSP2_DATA_MEM_2 a7700000 00100000 00000000 00100000 RWIX it was actually allocate memory from 0x80000000 to 0xa7800000.(more than 512MB) 2) Even, I change memory map successfully, the modification for DUAL_EMIF_2X512MB still makes me confused. So, a few question as below: 1. On mem_segment_definition_bios.xs, why virtual address setup disabled for DUAL_EMIF_2X512MB setting? why is it necessary for SINGLE_EMIF_512MB? 2. On a15_0.cfg, why do we need to changing Mmu.setSecondLevelDescMeta(i, i-0x20000000, attrs2); to Mmu.setSecondLevelDescMeta(i, i, attrs2);? why it need to be offset 0x20000000 for SINGLE_EMIF_512MB? 3. On Ammu1_bios.cfg & Ammu2_bios.cfg, why we need to enable the fourth AMMU block for DUAL_EMIF_2X512MB, and disable it for SINGLE_EMIF_512MB? (As my understanding, it should be only two sections for DUAL_EMIF_2X512MB, and each of them allocate 512MB. (please correct me if i wrong) ) 4. On system_bsp_init.c, why we need to disable virtual memory mapping function for DUAL_EMIF_2X512MB? 3) However, I was trying to setup SINGLE_EMIF_1GB. At first, I referred to TRM and I modified the HW setup inside SBL(as following figure), and then I modified the memory map to SINGLE_EMIF_1GB. But, the evm board stuck on booting (message as shown below). TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed +>> START ==> Overall DDR configuration +>> START ==> EMIF1 and EMIF1 DDR IOs config (CTRL_MODULE_CORE_PAD module) + Launch full leveling + Updating slave ratios in PHY_STATUSx registers + as per HW leveling output + HW leveling is now disabled. Using slave ratios from + PHY_STATUSx registers + One EMIF - 1GB total memory + Same memory mapped at 0x80000000 and 0xC0000000 +>> END ==> overall DDR configuration completed / DDR memory can now be accessed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 144642 (12.34 ms) + SOC Init Cycles - 264207 (22.54 ms) + DDR Config Clock Cycles - 884131 (75.44 ms) + App Image Load Cycles - 43980466 (3752.99 ms) + Slave Core Bootup Cycles - 322632 (27.53 ms) + SBL Boot-up Cycles - 45597413 (3890.97 ms) + Time at which SBL started IPU1_0 - 90375 (2758.2 ms) +***************************************************************** + + Jumping to MPU CPU0 App Thanks Best regards, Wxchen + +Hi, SR1_FRAME_BUFFER_MEM 84782000 1b87d000 00000000 1b87d000 RWIX The above line I copied from the memory map file shared in the above post. SR1_FRAME_BUFFER_SIZE = 1b87d000 (440MB) The available shared memory 440MB, So is this memory is not enough to process the TIDL algorithm? Suppose this memory is not sufficient then why don't you use the existing EMIFMODE(DUAL_EMIF_1GB_512MB)? instead of creating a new one. I will check with an expert to answer your queries. Thanks Gaviraju + +hi, 1) because of the HW setup is 512+512mb, but your providing setup was swapping eve & dsp to second section and made the first section of SR1_FRAME_BUFFER larger about 100mb, i'd like to know why can't I allocate memory up to 330MB+512MB. 2) because DDR of my target board will be designed to SINGLE_EMIF and most likely to 1GiB, I want to try it first on evm board. Thanks Best / Regard wxchen + +Hi, It is possible to map 330+512 MB to SR1. You need to update SR1_FRAME_BUFFER_SIZE in mem_segment_definition_bios.xs in order to increase the size of SR1. Regarding the question on A15 MMU/AMMU/VPS mappings, one can map 0x8000_0000 virtual address to 0x8000_0000 physical address and 0xA000_0000 VA to 0xA000_0000 PA if there is enough memory. However in case there is only 512 MB on the system then the use needs to map 0xA000_0000 virtual address to 0x8000_0000 physical address. Regards, Rishabh + diff --git a/data2/text/range/15001-20000/938677.txt b/data2/text/range/15001-20000/938677.txt new file mode 100644 index 0000000000000000000000000000000000000000..4599a988540288531cc9a32621c49ce722d5e601 --- /dev/null +++ b/data2/text/range/15001-20000/938677.txt @@ -0,0 +1,40 @@ +Ticket Name: Add source & destination in IP & ports & compare with LUT in NetCP Packet Accelerator + +Query Text: +Other Parts Discussed in Thread: AM5K2E04 Hi, We started working Linux Network CoProcessor NetCP Yocto BSP [sdk-06.03.00.106] works on AM5k2E04 board, get driver source available in Kernel 4.4.19. We need to capture Ethernet packets from FTP connection, Add source IP & destination IP, source port & destination port From Packet accelerator driver [drivers/net/ethernet/ti/netcp_pa.c] We able to see pa_add_mac_rule API to compare source & destination mac. We referred Packet accelerator user guide to adding entries & PA API's for TI PDK source packages. Here we want Linux drivers API's for adding IP, Mac, Port & LUT, Comparing with LUT for header extractions. Anyone please provide API for creating Lookup table & add source & destination IP & ports in Linux Kernel PA drivers for NetCP. Regards, Santhana Kumar S + +Responses: +Hi, Santhana, You may want to develop your own. These API's will be feature requests to TI PLSDK. I'll keep the thread open to see if there is any contribution from cummunity. Rex + +Thanks for your response. Can you please help to let me know from your community. + +Hi Rex, Any updates for this thread? + +Hi, Santhana, The community I meant is the contribution from non-TI member in the forum. .Any specific kernel APIs will be feature request. It will need to go through business review before it can be implemented. Rex + +Hi Rex, I understand for this thread, you are telling non TI member will be support for this thread. So anyone from TI Community member worked in NetCP, Packet Accelerator add this thread for them. still doubt in using netcp. + +Hi, Any updates about this thread. Please support this thread for giving me brief explanation of Packet Accelerator driver code to use in NetCP linux BSP. Regards, SanthanaKumarS + +Hi, Santhana, Please refer to PA User's Guide: https://www.ti.com/lit/ug/spruhz2/spruhz2.pdf Rex software-dl.ti.com/.../NetCP.html + +Sorry, my post content messed up. PA User's Guide: www.ti.com/.../spruhz2.pdf NetCP Guide: software-dl.ti.com/.../NetCP.html Rex + +Hi, We are using Yocto BSP for porting NetCP in AM5K2E04 board Can you please detailed explanation of Packet Accelerator code for packages/ti/drv/pa & drivers/net/ethernet/ti/netcp_pa.c Referred PA user guide, For packages PA consists of Pa_addLUT, Pa_addMac, Pa_addIP, Pa_addPort & Firmware API in ti/drv/pa/fw Source Code : NetCP PA : netcp-pa-fw/1_2020.4.16-r0.4/git/ti/drv/pa/ NetCP PA Linux: drivers/net/ethernet/ti/netcp_pa.c We need to use capture Ethernet packets from FTP Connection to adding LUT, MAC, IP & port & compare in to LUT table for adding queues in Yocto BSP Linux side Rex, Please guide me to help on this + +Hi, Santhana, Theoretically, Yocto is just a way to build. It shouldn't be any difference in terms of kernel source code. I don't see the netcp_pa.c in PLSDK kernel source code. I'll need to clone it and see what's in that repository. I don't know the answer on top of my head. Rex + +Hi, Yocto source is build for Kernel & u-boot images. Here I attached PA driver file. Thanks for your daily update, You provided NetCP & PA user guide, We refer some LLD API's provide for CCS StandAlone Application to interface with NetCP PA. Note: We need Linux side not for CCS StandAlone Application. We need to capture Ethernet packets from FTP connection, Below we are given points to test in Linux AM5k2e04 Keystone SOC board. 1. Enable Packet Accelerator to send & receive FTP data 2. Disable Packet Accelerator to send & receive FTP data In both the cases, We should receive FTP packets from NetCP & Can you please connect mail to Yocto Linux BSP side for worked in NetCP PA. Then we have a good clarity to use NetCP PA in Linux side. Regards, SanthanaKumarS + +Hi Rex, We configured Netcp interfaces in K2E EVM board, & we able to run packet accelerator application to run paMCExample.out from given by Packet accelerator provided. Here we attached Log to testing my multicore application to test adding Ip, MAC & port between source & destination packets. For our test results, Application is passing but i can't able to see my packets in Wireshark application from PC. Please check my logs & code to give me solutions for this. Can you please tell me the changes to adding MAC, IP & ports & packet buffer in source code to please mention which source & destination MAC, IP & ports to given in source code Add_MACAddress - paEthInfo_t ethInfo = { { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* Src mac = dont care */ { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }, /* Dest MAC */ 0, /* vlan = dont care */ 0x0800, /* ether type = IPv4 */ 0, /* MPLS tag = dont care */ 0 /* Input EMAC port = dont care */ Add_IP - paIpInfo_t ipInfo = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* IP source = dont care */ { 0xc0, 0xa8, 0x01, 0xa, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },* IP dest */ Add_Port - int16_t ports = {0x5678}; paRouteInfo_t routeInfo = { pa_DEST_HOST, /* Route a match to the host */ 0, /* Flow ID 0 */ 0, /* Destination queue */ -1, /* Multi route disabled */ 0xaaaaaaaa, /* SwInfo 0 */ 0, /* SwInfo 1 is dont care */ 0, /* customType = pa_CUSTOM_TYPE_NONE */ \ 0, /* customIndex: not used */ \ 0, /* pkyType: for SRIO only */ \ NULL /* No commands */ }; SendPacket() - uint8_t pktMatchBuf[PACKET_SIZE] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, /* Dest MAC */ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, /* Src MAC */ 0x08, 0x00, /* Ethertype = IPv4 */ 0x45, 0x00, 0x00, 0x6c, /* IP version, services, total length */ 0x00, 0x00, 0x00, 0x00, /* IP ID, flags, fragment offset */ 0x05, 0x11, 0x32, 0x26, /* IP ttl, protocol (UDP), header checksum */ 0xc0, 0xa8, 0x01, 0x01, /* Source IP address */ 0xc0, 0xa8, 0x01, 0x0a, /* Destination IP address */ 0x12, 0x34, 0x56, 0x78, /* UDP source port, dest port */ 0x00, 0x58, 0x1d, 0x18, /* UDP len, UDP checksum */ 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, /* 80 bytes of payload data */ 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81 }; Command line testing ================================== # rmServer.out /usr/bin/device/k2e/global-resource-list.dtb /usr/bin/device/k2e/policy_dsp_arm.dtb # paMCExample.out root@AM5K2E04:~# paMCExample_k2e.out No command line given. Forking off 4 tasks ************************************************ *** PA Multi Core Example Started on Core 0 *** ************************************************ ************************************************ ************************************************ *** PA Multi Core Example Started on Core 1 *** *** PA Multi Core Example Started on Core 3 *** ************************************************ ************************************************ Initialized RM_Client0 Waiting for global config (core 1) ... Waiting for global config (core 3) ... ************************************************ *** PA Multi Core Example Started on Core 2 *** ************************************************ Waiting for global config (core 2) ... Initializing Free Descriptors. QMSS successfully initialized Unable to open below cppi tx channels...presuming linux has already enabled it 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 20 Unable to open below cppi Rx channels...presuming linux has already enabled it 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 6 CPPI successfully initialized PASS successfully initialized Tx setup successfully done Rx setup successfully done Add_MAC successful for corenum:0 Add_IP successful for corenum:0 Destination for the packet Rx queue: 1027 (Core 0) Add_Port successful for corenum:0 PASS setup successfully done Publishing global config Done from SYSINIT Core... Publishing local config done from core num: 0... Waiting for all cores to reach the barrier before transmission starts ... Initialized RM_Client1 Initialized RM_Client3 QMSS Local successfully initialized Initialized RM_Client2 QMSS Local successfully initialized CPPI Local successfully initialized QMSS Local successfully initialized CPPI Local successfully initialized PA Local successfully initialized CPPI Local successfully initialized PA Local successfully initialized PA Local successfully initialized Rx setup successfully done Rx setup successfully done Rx setup successfully done Destination for the packet Rx queue: 1031 (Core 3) Add_Port successful for corenum:3 PASS setup successfully done Publishing local config done from core num: 3... Waiting for all cores to reach the barrier before transmission starts ... Destination for the packet Rx queue: 1032 (Core 1) Add_Port successful for corenum:1 PASS setup successfully done Publishing local config done from core num: 1... Waiting for all cores to reach the barrier before transmission starts ... Destination for the packet Rx queue: 1033 (Core 2) Add_Port successful for corenum:2 PASS setup successfully done Publishing local config done from core num: 2... Waiting for all cores to reach the barrier before transmission starts ... Packet Transmission Start ... core id: 2 Packet Transmission Done. Wait for all packets to be Received ... core num: 2 Core 2: Packets Sent = 10 Core 2: Packets Received = 10 --- PA (2) User-defined STATS --- number of Rx bytes(index = 3): 1220 number of Rx packets (index = 67): 10 Core 2 : CPPI CPDMA closed successfully Core 2 : CPPI exit successful Core 2: exit QMSS Updating the Test Status core: 2, status:TEST_PASSED Done... ********************************************** *** PA Multi Core Example Ended on Core 2 *** ********************************************** Packet Transmission Start ... core id: 0 Packet Transmission Done. Wait for all packets to be Received ... core num: 0 Core 0: Packets Sent = 10 Core 0: Packets Received = 10 Wait for all packets to be Received in all cores... Updating the Test Status core: 0, status:TEST_PASSED Packet Transmission Start ... core id: 3 Packet Transmission Done. Wait for all packets to be Received ... core num: 3 Core 3: Packets Sent = 10 Core 3: Packets Received = 10 --- PA (3) User-defined STATS --- number of Rx bytes(index = 1): 1220 number of Rx packets (index = 65): 10 Packet Transmission Start ... core id: 1 Packet Transmission Done. Wait for all packets to be Received ... core num: 1 Core 1: Packets Sent = 10 Core 1: Packets Received = 10 --- PA (1) User-defined STATS --- number of Rx bytes(index = 2): 1220 number of Rx packets (index = 66): 10 Core 3 : CPPI CPDMA closed successfully Core 3 : CPPI exit successful Core 3: exit QMSS Updating the Test Status core: 3, status:TEST_PASSED Done... ********************************************** *** PA Multi Core Example Ended on Core 3 *** ********************************************** Core 1 : CPPI CPDMA closed successfully Core 1 : CPPI exit successful Core 1: exit QMSS Updating the Test Status core: 1, status:TEST_PASSED Done... ********************************************** *** PA Multi Core Example Ended on Core 1 *** ********************************************** All tests have passed! --- PA (0) User-defined STATS --- number of Rx bytes(index = 0): 1220 number of Rx packets (index = 64): 10 Core 0 : CPPI CPDMA closed successfully Core 0 : CPPI exit successful Core 0: exit QMSS Done... ********************************************** *** PA Multi Core Example Ended on Core 0 *** ********************************************** Waiting for children to exit All children passed + +Hi, Santhana, I am not familiar with paMCExample and it doesn't ring any bell. Could you provide more info about it? Rex + +Hi Rex, We configured NetCP interfaces & tested Ethernet its working fine. In K2E evm board, there is packet accelerator & Security accelerator components. So we need to use packet accelerator to add Ip, Mac & ports in Lookup table to comparing mac, ip & ports to do some experiment. We are using PA LLD api's Add_MACAddress, Add_IPAddress & Add_Port for adding MAC, IP & ports in Lookup table. Here we using pa/example/multicoreExample/src/pa_mgmt.c , for sent/receive packet to handling packet from source to destination. Mainly we need to use Packet accelerator to handling packets from evm board. We are looking for pa example codes to handling packets from board Ethernet to other Ethernet connection + +Hi, Santhana, I'll need to ask the expert who is familiar with PDK PA example to take a look. Are you trying to implement NAT in Linux? Rex + +Hi Rex, Thanks for your attention. We need to add our ip,port & mac using PA LLD api's & sending packets from evm board to specific added MAC in PA example codes. We tried to added destination MAC, IP & ports but packets not receiving, & not able to see my IP address Wireshark application . Here we added IP, MAC & ports in PA LLD api's & attched logs. Please talk to your PA LLD experts & let me know the solutions for this. Code : example/multicoreExample/src/local_variables.c ====================================================== 0xe0, 0xd5, 0x5e, 0x37, 0xbc, 0xec,/* Dest MAC */ -------> This is my PC MAC address 0x02, 0x18, 0x31, 0x7e, 0x3e, 0x00, /* Src MAC */ -------> This is my EVM MAC address 0x08, 0x00, /* Ethertype = IPv4 */ 0x45, 0x00, 0x00, 0x6c, /* IP version, services, total length */ 0x00, 0x00, 0x00, 0x00, /* IP ID, flags, fragment offset */ 0x05, 0x11, 0x32, 0x26, /* IP ttl, protocol (UDP), header checksum */ 0xc0, 0xa8, 0x00, 0x7f, /* Source IP address */ -------> This is my EVM IP address 0xc0, 0xa8, 0x00, 0x71, /* Destination IP address */-------> This is my PC IP address 0x5355, 0x631, /* UDP source port, dest port */ -------> EVM port, PC port 0x00, 0x58, 0x1d, 0x18, /* UDP len, UDP checksum */ 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, /* 80 bytes of payload data */ 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81 }; Code : example/multicoreExample/src/pa_mgmt.c ============================================== Add_MACAddress paEthInfo_t ethInfo = {{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, /* Src mac = dont care */ ---> Here we don't changed { 0xe0, 0xd5, 0x5e, 0x37, 0xbc, 0xec, }, /* Dest mac */ ----> 0, /* vlan = dont care */ 0x0800, /* ether type = IPv4 */ 0, /* MPLS tag = dont care */ 0 /* Input EMAC port = dont care */ Add_IPAddress paIpInfo_t ipInfo = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* IP source = dont care */ { 0xc0, 0xa8, 0x00, 0x71, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* IP dest */ 0, /* SPI = dont care */ 0, /* flow = dont care */ pa_IPV4, /* IP type */ 0, /* GRE protocol */ 0, /* Ip protocol = dont care (TCP or UDP or anything else) */ 0, /* TOS */ FALSE, /* TOS = dont care (seperate field since TOS=0 is valid */ 0 /* SCTP destination port = dont care */ }; Add_Port int16_t ports = {0x631}; Attached Logs after we added our IP , port & MAC in PA Multicore example code ============================================================================== root@AM5K2E04:~# ./paMCExample.out No command line given. Forking off 4 tasks ************************************************ *** PA Multi Core Example Started on Core 1 *** ************************************************ Waiting for global config (core 1) ... ************************************************ *** PA Multi Core Example Started on Core 0 *** ************************************************ Initialized RM_Client0 ************************************************ *** PA Multi Core Example Started on Core 3 *** ************************************************ Waiting for global config (core 3) ... Initializing Free Descriptors. QMSS successfully initialized Unable to open below cppi tx channels...presuming linux has already enabled it 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 20 Unable to open below cppi Rx channels...presuming linux has already enabled it 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 6 CPPI successfully initialized PASS successfully initialized Tx setup successfully done Rx setup successfully done Publishing global config Done from SYSINIT Core... Publishing local config done from core num: 0... Waiting for all cores to reach the barrier before transmission starts ... ************************************************ *** PA Multi Core Example Started on Core 2 *** ************************************************ Waiting for global config (core 2) ... Initialized RM_Client2 QMSS Local successfully initialized CPPI Local successfully initialized PA Local successfully initialized Rx setup successfully done Publishing local config done from core num: 2... Waiting for all cores to reach the barrier before transmission starts ... Initialized RM_Client1 QMSS Local successfully initialized CPPI Local successfully initialized Initialized RM_Client3 PA Local successfully initialized QMSS Local successfully initialized CPPI Local successfully initialized PA Local successfully initialized Zumi : RX0Qmss_getQueueNumber 0 Zumi : RX2Qmss_getQueueNumber 0 Rx setup successfully done Publishing local config done from core num: 1... Waiting for all cores to reach the barrier before transmission starts ... Zumi : RX0Qmss_getQueueNumber 0 Zumi : RX2Qmss_getQueueNumber 0 Rx setup successfully done Publishing local config done from core num: 3... Waiting for all cores to reach the barrier before transmission starts ... Packet Transmission Start ... core id: 3 Packet Transmission Done. Wait for all packets to be Received ... core num: 3 Packet Transmission Start ... core id: 0 Packet Transmission Done. Wait for all packets to be Received ... core num: 0 Packet Transmission Start ... core id: 2 Packet Transmission Done. Wait for all packets to be Received ... core num: 2 Packet Transmission Start ... core id: 1 Packet Transmission Done. Wait for all packets to be Received ... core num: 1 Waiting for packet received after that nothing will displayed Please let me know the solutions for this, Regards, SanthanaKumarS + +Hi Rex, Please check my updates e2e.ti.com/.../3496118 Regards, SanthanaKumarS + diff --git a/data2/text/range/15001-20000/959540.txt b/data2/text/range/15001-20000/959540.txt new file mode 100644 index 0000000000000000000000000000000000000000..786e9711d2c987165029fccecc5db91d6a032442 --- /dev/null +++ b/data2/text/range/15001-20000/959540.txt @@ -0,0 +1,78 @@ +Ticket Name: TDA2SX: Deserializer pattern generation + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, ALP, USB2ANY, DS90UB954-Q1 Hi all, We are working on tda2sx processor with our custom board. We have IMX390 sensor for road camera ADAS application. PFA block diagram of camera path and modules connected to SOC. We are facing an issue with road camera IMX390 , when we run road camera usecase we are receiving blue frames only. Please find the below consolidated information about the issue. 1) We were working with our earlier hardware prototype (B1) where this issue of all blue frames was seen at times, but it could be recovered from that state by ISP reset -> out of reset 2) In our current hardware Prototype (B2) this issue of blue frames is seen most of the times, and it is not recoverable by ISP reset -> out of reset sequence. The ISP is seen to be in Active State, with frame counts increasing almost ~30 FPS. 3) At the times when this blue frames issue is not seen, no frames are received at the output of ISP, and ISP is seen to be in fail-safe state. ISP reset -> out of reset sequence results in one of these two issue behaviours (No frames / Blue Frames) 4) While analysing this issue by comparing the hardware Schematics of B1 and B2 we realised that there was a change in Voltage level Shifter in ISP's I2C0 Path which was not being configured for proper usage, hence we updated our software to configure the same. 5) After all the software changes the behavior still remains to be the same. Usecase results in either blue frames issue or no frames issue [Point (2) and (3)]. 6) An experiments was done by connecting the Camera module (that contains IMX390 Sensor and UB953 Serializer) of B2 hardware to Main Module (that contains UB954 Deser, GW5200 ISP, and TDA2 Host) of B1 Hardware, and the behaviour was same as that of B1 [ i.e Blue frames issue seen but recovered with ISP reset -> Out of Reset Sequence]. Hence concluding that the cause of this issue is not in the camera module (i.e IMX390 Sensor and UB953 Serializer). 7) Another experiment was done by connecting the Camera module (that contains IMX390 Sensor and UB953 Serializer) of B1 hardware to Main Module (that contains UB954 Deser, GW5200 ISP, and TDA2 Host) of B2 Hardware, and the behaviour was same as that of B2 [ i.e Blue frames issue not recovered with ISP reset -> Out of Reset Sequence]. Thus supporting the conclusion from Point (6). 8) Full Rom data was read from ISP by reset to failsafe state and read binaries, and the data read from the ISP was identical with the ROM image written onto SNOR. Thus concluding that there is no issue w.r.t. SNOR flash memory. From Above experiments (6), (7) and (8) we have concluded that the modules IMX390 Sensor, UB953 Serializer and SNOR Flash have proper connections and configurations, and not causing the issue. Thus we are now suspecting the issue to be caused by the remaining modules (or their configurations/connections) in the Camera path viz, UB954 Deserializer, GW5200 ISP and TDA2 Host Processor. So, we have enabled the pattern generation for DESER to know whether there is any issue with DESER configuration. After enabling the DESER pattern generation we are not seeing any pattern on HDMI DISPLAY. only GREEN screen is observed.This experiment was done on both B1 and B2 prototypes, on both boards we observed only green screen. Below are the register settings what we did for DESER pattern gen. {0x58,0x40},//Enable the i2c pass through {0x20,0x30}, // disable video fwd {0x1F,0x02}, // csi operating speed {0x33,0x01}, // CSI0 enable {0xB0,0x00}, // Indirect Pattern Gen Registers {0xB1,0x01}, // PGEN_CTL {0xB2,0x01}, {0xB1,0x02}, // PGEN_CFG {0xB2,0x33}, {0xB1,0x03}, // PGEN_CSI_DI {0xB2,0x24}, {0xB1,0x04}, // PGEN_LINE_SIZE1 {0xB2,0x0F}, {0xB1,0x05}, // PGEN_LINE_SIZE0 {0xB2,0x00}, {0xB1,0x06}, // PGEN_BAR_SIZE1 {0xB2,0x01}, {0xB1,0x07}, // PGEN_BAR_SIZE0 {0xB2,0xE0}, {0xB1,0x08}, // PGEN_ACT_LPF1 {0xB2,0x02}, {0xB1,0x09}, // PGEN_ACT_LPF0 {0xB2,0xD0}, {0xB1,0x0A}, // PGEN_TOT_LPF1 {0xB2,0x04}, {0xB1,0x0B}, // PGEN_TOT_LPF0 {0xB2,0x1A}, {0xB1,0x0C}, // PGEN_LINE_PD1 {0xB2,0x0C}, {0xB1,0x0D}, // PGEN_LINE_PD0 {0xB2,0x67}, {0xB1,0x0E}, // PGEN_VBP {0xB2,0x21}, {0xB1,0x0F}, // PGEN_VFP {0xB2,0x0A}, Please let me know the above register settings are proper for DESER pattern generation. If above pattern GEN is correct, please tell me why we are receiving only green screen even after enabling the pattern gen. Please help us to solve this issue. This is a big blocker to us now. Thanks and Regards, A.Kavya Harini. + +Responses: +This question is related to deserializer pattern generation. I will reassign it to FPD Link BU. + +Hello Alapati, Please provide all the detailed timing information for the video which you are trying to generate through PATGEN so we can review against your script. Another option is that 954 has a GUI to easily generate a PATGEN register configuration for you based on your video inputs. You can download the ALP GUI here (plus the profile updater which needs to be run), and then connect to the 954 in your system by using an I2C to use bridge - either Aardvark or USB2ANY. https://www.ti.com/tool/ALP Best Regards, Casey + +Hi Casey, 1. Our default Deserializer register settings are as follows: {0x4c, 0x01}, {0x33, 0x01}, // OnSemi (4-lane) 4Lane, non-continuous Clock {0x34, 0x41}, // csi-clk0 enable and periodic csi skew calibration. {0x20, 0x20}, // fwd ctl {0x21, 0x04}, // basic synchronous fwding {0x42, 0x71}, {FPD3_95X_DES_SER_ID,(BSPUTILS_SER_ID_ADDR_IMX390 << 1)}, {FPD3_95X_DES_SER_AL, (BSPUTILS_SER_ALIAS_ADDR_IMX390 << 1)}, {FPD3_95X_DES_SLAVE_ID0, (BSPUTILS_IMX390_ID_I2C_ADDR <<1)}, {FPD3_95X_DES_SLAVE_AL0, (BSPUTILS_IMX390_ALIAS_I2C_ADDR<<1)}, {0x6e, 0x88}, {0x58, 0x5E}, {0x6d, 0x40}, // STP cable for FPD {0xd5, 0xf0}, {0x25, 0x31}, {0x26, 0x01}, MIPI CSI-2 we are using 4 lanes 2. For Pattern generation we tried the below register settings {0x58,0x40}, {0x20,0x30}, // disable video fwd {0x1F,0x02}, // csi operating speed {0x33,0x01}, // CSI0 enable {0xB0,0x00}, // Indirect Pattern Gen Registers {0xB1,0x01}, // PGEN_CTL {0xB2,0x01}, {0xB1,0x02}, // PGEN_CFG {0xB2,0x33}, {0xB1,0x03}, // PGEN_CSI_DI {0xB2,0x24}, {0xB1,0x04}, // PGEN_LINE_SIZE1 {0xB2,0x0F}, {0xB1,0x05}, // PGEN_LINE_SIZE0 {0xB2,0x00}, {0xB1,0x06}, // PGEN_BAR_SIZE1 {0xB2,0x01}, {0xB1,0x07}, // PGEN_BAR_SIZE0 {0xB2,0xE0}, {0xB1,0x08}, // PGEN_ACT_LPF1 {0xB2,0x02}, {0xB1,0x09}, // PGEN_ACT_LPF0 {0xB2,0xD0}, {0xB1,0x0A}, // PGEN_TOT_LPF1 {0xB2,0x04}, {0xB1,0x0B}, // PGEN_TOT_LPF0 {0xB2,0x1A}, {0xB1,0x0C}, // PGEN_LINE_PD1 {0xB2,0x0C}, {0xB1,0x0D}, // PGEN_LINE_PD0 {0xB2,0x67}, {0xB1,0x0E}, // PGEN_VBP {0xB2,0x21}, {0xB1,0x0F}, // PGEN_VFP {0xB2,0x0A}, we are not receiving frames with the shared pattern generation code.We suspect that the ISP is not processing the frames because deserializer is generating the pattern generation. so, the Image sensor is not reachable over I2C bus. Hence we need this below configuration.. 1) Serializer and Sensor Accessible through the FPD link with appropriate I2C addresses. 2) Deserializer to be ignoring the frames received from Sensor. 3) The Deserializer to be producing pattern generation frames in MIPI output. Thanks & Regards, A.Kavya Harini. + +Hello Alapati, Ok, but the question I asked was what are the specific video parameters which you are trying to configure the pattern generator for? Please provide the video timing your ISP is expecting, otherwise we can not review your PATGEN code against the expected configuration for your application. Best Regards, Casey + +Hi Casey, Sorry for the inconvenience Below are the details of video parameters. hActive: 1920 vActive: 1080 fps : 30 bitdepth : 20 Interface : 4 Lane Mipi Is this data sufficient ? This is the information we have as of now. Please let me know if you want any other details. Thanks & Regards, A.Kavya Harini + +Hi Casey, We tried the below register configuration for our requirement [1920x1080 RAW20 @ 30FPS over 4 lane MIPI at 800 MBPS] {0x20,0x30}, // disable video fwd {0x1F,0x02}, // csi operating speed {0x33,0x01}, // CSI0 enable {0xB0,0x00}, // Indirect Pattern Gen Registers {0xB1,0x01}, // PGEN_CTL {0xB2,0x01}, {0xB1,0x02}, // PGEN_CFG {0xB2,0x33}, {0xB1,0x03}, // PGEN_CSI_DI {0xB2,0x2F}, // RAW20 {0xB1,0x04}, // PGEN_LINE_SIZE1 {0xB2,0x12}, {0xB1,0x05}, // PGEN_LINE_SIZE0 {0xB2,0xC0}, // 1920 pixels of 20 bits each = 1920 * 20 /8 {0xB1,0x06}, // PGEN_BAR_SIZE1 {0xB2,0x02}, {0xB1,0x07}, // PGEN_BAR_SIZE0 {0xB2,0x58}, // Dividing Line size into 8 parts. {0xB1,0x08}, // PGEN_ACT_LPF1 {0xB2,0x04}, {0xB1,0x09}, // PGEN_ACT_LPF0 {0xB2,0x38}, // 1080 Active lines per frame {0xB1,0x0A}, // PGEN_TOT_LPF1 {0xB2,0x04}, {0xB1,0x0B}, // PGEN_TOT_LPF0 {0xB2,0x65}, // 1125 Total lines per frame {0xB1,0x0C}, // PGEN_LINE_PD1 {0xB2,0x0B}, {0xB1,0x0D}, // PGEN_LINE_PD0 {0xB2,0x92}, // 29.62 us assuming 30FPS with 1125 total lines per frame {0xB1,0x0E}, // PGEN_VBP {0xB2,0x24}, // Back Porch = 36 lines {0xB1,0x0F}, // PGEN_VFP {0xB2,0x09}, // Front porch = 9 lines {0xB1,0x10}, // PGEN_COLOR0 {0xB2,0xFF}, {0xB1,0x11}, // PGEN_COLOR1 {0xB2,0x00}, {0xB1,0x12}, // PGEN_COLOR2 {0xB2,0xEE}, {0xB1,0x13}, // PGEN_COLOR3 {0xB2,0x11}, {0xB1,0x14}, // PGEN_COLOR4 {0xB2,0xDD}, {0xB1,0x15}, // PGEN_COLOR5 {0xB2,0x22}, {0xB1,0x16}, // PGEN_COLOR6 {0xB2,0xCC}, {0xB1,0x17}, // PGEN_COLOR7 {0xB2,0x33} And we received 3 frames at the SoC. However the frames appear to be corrupted/incorrect. Attached the frame captures. Can you please check the above configuration settings and correct if anything is wrong. Frame_captures.zip PS: The BackPorch and Front Porch are set taking the ISP -> Host parallel video settings as reference. Please let us know if anything needs to be changed. Thanks & Regards, A.Kavya Harini. + +Hello Alapati, Your PATGEN config has an invalid vertical total since it does not include any lines for vertical sync. The vertical total is VACTIVE + VFP + VSYNC + VBP Right now you have VACTIVE = 1080 VFP = 9 VBP = 36 VTOTAL = 1125 Which means there are no lines left for the VSYNC. What is the expected VSYNC width for the video in your pipeline? Best Regards, Casey + +Hi Casey, Thanks for your inputs, we did not contain the information about front porch. We had the information as VTotal=1125, VActive=1080, VBackPorch=36, and VSync=5 Hence we had tried the experiment with VFP=9, VFP=5, and VFP=4, and got the same behaviour in all 3 cases. Thanks & Regards, A.Kavya Harini. + +Hello Alapati, You have all the info needed to extract VFP from the above. (Vtotal - VBP - Vsync - Vactive) = VFP = 4 lines Can you try the following? Register Data Name 0x01 0x01 PGEN_CTL 0x02 0xB5 PGEN_CFG 0x03 0x2F PGEN_CSI_DI 0x04 0x12 PGEN_LINE_SIZE1 0x05 0xC0 PGEN_LINE_SIZE0 0x06 0x02 PGEN_BAR_SIZE1 0x07 0x58 PGEN_BAR_SIZE0 0x08 0x04 PGEN_ACT_LPF1 0x09 0x38 PGEN_ACT_LPF0 0x0A 0x04 PGEN_TOT_LPF1 0x0B 0x69 PGEN_TOT_LPF0 0x0C 0x0B PGEN_LINE_PD1 0x0D 0x88 PGEN_LINE_PD0 0x0E 0x24 PGEN_VBP 0x0F 0x09 PGEN_VFP 0x10 0xAA PGEN_COLOR0 0x11 0x33 PGEN_COLOR1 0x12 0xF0 PGEN_COLOR2 0x13 0x7F PGEN_COLOR3 0x14 0x55 PGEN_COLOR4 0x15 0xCC PGEN_COLOR5 0x16 0x0F PGEN_COLOR6 0x17 0x80 PGEN_COLOR7 0x18 0x00 PGEN_COLOR8 0x19 0x00 PGEN_COLOR9 0x1A 0x00 PGEN_COLOR10 0x1B 0x00 PGEN_COLOR11 0x1C 0x00 PGEN_COLOR12 0x1D 0x00 PGEN_COLOR13 0x1E 0x00 PGEN_COLOR14 Best Regards, Casey + +Hi Casey, Thanks for the reply, We tried the register settings suggested by you. Still we are receiving 3 frames which I have posted in my last mail. The issue is same. Please let us know how to proceed further. Thanks and Regards, A.Kavya Harini. + +Hi Casey, One update, After setting the total line size for 2200 pixels instead of 1920 (account for horizontal front and back porch) we are able to get the pattern generation output.But it is always seen as grey scale image. Thanks & Regards, A.Kavya Harini + +Hello Alapati, I don't understand your last comment. There is no total horizontal line size setting in the pattern generator. Only total vertical since the CSI-2 transmitter does not send discrete horizontal sync timing. Please post again your most updated code and I will take a look Best Regards, Casey + +Hi Casey, We are able to generate and view the video frames with pattern generation with the below configuration: + {0xB1,0x01},{0xB2, 0x01}, //PGEN_CTL + {0xB1,0x02},{0xB2, 0xB5}, //PGEN_CFG + {0xB1,0x03},{0xB2, 0x2F}, //PGEN_CSI_DI + {0xB1,0x04},{0xB2, 0x15}, //PGEN_LINE_SIZE1 /* HTotal = 2200 pixels; Line size = 2200 * 20 bits per pixel / 8 */ + {0xB1,0x05},{0xB2, 0x7C}, //PGEN_LINE_SIZE0 + {0xB1,0x06},{0xB2, 0x02}, //PGEN_BAR_SIZE1 + {0xB1,0x07},{0xB2, 0x58}, //PGEN_BAR_SIZE0 + {0xB1,0x08},{0xB2, 0x04}, //PGEN_ACT_LPF1 /* Active lines per frame = 1080 */ + {0xB1,0x09},{0xB2, 0x38}, //PGEN_ACT_LPF0 + {0xB1,0x0A},{0xB2, 0x04}, //PGEN_TOT_LPF1 /* Total lines per frame = 1130 */ + {0xB1,0x0B},{0xB2, 0x6A}, //PGEN_TOT_LPF0 + {0xB1,0x0C},{0xB2, 0x0B}, //PGEN_LINE_PD1 + {0xB1,0x0D},{0xB2, 0x88}, //PGEN_LINE_PD0 + {0xB1,0x0E},{0xB2, 0x24}, //PGEN_VBP /* Back Porch = 36 lines */ + {0xB1,0x0F},{0xB2, 0x09}, //PGEN_VFP /* Front porch = 9 lines */ + +Main change that worked seemed to be with respect to PGEN_LINE_SIZE as we were considering only the HActive size instead of HTotal. +Please find the received frame attached. + +The frames received however are all greyscale, can you provide any inputs to obtain colour frames in RAW20 mode by setting the PGEN_COLOR registers? + +Thanks & Regards, A.Kavya Harini + +Hello Alapati, This configuration doesn't make sense. The PGEN_LINE_SIZE is not controlling the Htotal. It is controlling Hactive so it should be set based on 1920 active pixels. RAW20 CSI-2 uses a 5 bytes per 2 pixels format, so the PGEN_LINE_SIZE should be 1920*(5/2) = 4800dec = 0x12C0 I suspect that this in combination with the way the data is being received and processed is giving you these strange results. Somehow your frame height is showing 1090 instead of 1080. Next, for color bars, I would suggest using the color bar pattern setting instead of fixed color pattern (0x02[7] = 0) Please try the following settings: Register Data Name 0x01 0x01 PGEN_CTL 0x02 0x35 PGEN_CFG 0x03 0x2F PGEN_CSI_DI 0x04 0x12 PGEN_LINE_SIZE1 0x05 0xC0 PGEN_LINE_SIZE0 0x06 0x02 PGEN_BAR_SIZE1 0x07 0x58 PGEN_BAR_SIZE0 0x08 0x04 PGEN_ACT_LPF1 0x09 0x38 PGEN_ACT_LPF0 0x0A 0x04 PGEN_TOT_LPF1 0x0B 0x6A PGEN_TOT_LPF0 0x0C 0x0B PGEN_LINE_PD1 0x0D 0x86 PGEN_LINE_PD0 0x0E 0x24 PGEN_VBP 0x0F 0x09 PGEN_VFP 0x10 0xAA PGEN_COLOR0 0x11 0x33 PGEN_COLOR1 0x12 0xF0 PGEN_COLOR2 0x13 0x7F PGEN_COLOR3 0x14 0x55 PGEN_COLOR4 0x15 0xCC PGEN_COLOR5 0x16 0x0F PGEN_COLOR6 0x17 0x80 PGEN_COLOR7 0x18 0x00 PGEN_COLOR8 0x19 0x00 PGEN_COLOR9 0x1A 0x00 PGEN_COLOR10 0x1B 0x00 PGEN_COLOR11 0x1C 0x00 PGEN_COLOR12 0x1D 0x00 PGEN_COLOR13 0x1E 0x00 PGEN_COLOR14 The colors can be adjusted by changing the PGEN_COLOR_x registers above. Please note you can iterate on these configurations easily using the Analog LaunchPad GUI software in demo mode. There is a PATGEN configuration tab which can generate all these registers. I would recommend downloading that here so you can give it a try - make sure to download and run the profile updater tool: https://www.ti.com/tool/ALP Best Regards, Casey + +Hi Casey, + +Even for the above set of configurations in your previous mail, we are seeing only 3 frames. + +Thanks for the reference to the ALP tool, we are able to use that and generate the register configuration. + +However, we need one clarity about the PGEN_LINE_SIZE Registers. If the Line size is supposed to be taken based on hActive pixels, where can the parameters hSyncWidth, hBackPorch, hFrontPorch, hTotal be configured. Because in our case the ISP does expect horizontal Back and front porching. Here are the parameters + +hActive + hSyncWidth + hBackPorch + hFrontPorch = hTotal +1920 + 44 + 148 + 88 = 2200 + +Please let us know if any other configuration can be done to account for these parameters. + +We assume that if sufficient bytes of data corresponding to hTotal is not received per line, then ISP might have some undefined behaviour. +That was the reason why we tried to populate the PGEN_LINE_SIZE by taking pixels per line as hTotal instead of hActive. + +Please confirm/correct our understanding. + +Thanks and Regards, A.Kavya Harini + +Hello Alapati, DS90UB954-Q1 does not convey discrete DPI timing for horizontal parameters. This is optional in the CSI-2 standard and it is not implemented in our CSI-2 pattern generator (nor most CSI-2 solutions on the market). So basically the 954 will send the active line pixels at a fixed rate (in this case you have configured 800Mbps/lane), and then will transition to LP11 to wait until the next active line start. During horizontal blanking it does not send HSS/HSE packets to define DPI timing for HFP/HSYNC/HBP. The time between end of active line and start of next active line is not determined based on pixels. It is based on the line time, number of lines, and the transmitter output rate. So if you configure 1.6Gbps/lane, then each line will be sent twice as fast and then the transmitter will sit in LP11 for double the time waiting for the next active line. If you configure the transmitter for 2200 in PGEN_LINE_SIZE, but only capture a 1920 pixel image, then part of the pixels are going to be cut off since the transmitter is actually sending a 2200 active pixel line Best Regards, Casey + diff --git a/data2/text/range/15001-20000/960084.txt b/data2/text/range/15001-20000/960084.txt new file mode 100644 index 0000000000000000000000000000000000000000..816b919bb3b39750137ab3b3386e623365114555 --- /dev/null +++ b/data2/text/range/15001-20000/960084.txt @@ -0,0 +1,124 @@ +Ticket Name: TDA2PXEVM: TDA2 use-case multithread synchronization between IPU cores + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2, PGA460 Hello. I' trying to do parallel execution of Vision SDK use-cases and CAN messages receiving/transmission on tda2. To do that I create use-case on TDA2 IPU1-0 core and TI RTOS task on IPU1-1 core. They suppose to work parallel, but eventually use-case end up blocked. I want to figure out how TI RTOS tasks on one core can interact with use-cases on another core. Let me walk it throught. On IPU1-1 I'm creating a simple task: int val; +Error_Block eb; +Task_Handle UserTask; +Task_Params UserTaskParams; + +#pragma DATA_ALIGN(UserBuffer, 32); +uint8_t UserBuffer[2048]; + +void User_Task(UArg arg0, UArg arg1) +{ + Task_sleep(200); + + while (1) + { + val++; /*I also did that with CAN receive/transmit logic*/ + } +} + +void Ipu11Init(void) { + +Error_init(&eb); +Task_Params_init(&UserTaskParams); +UserTaskParams.stackSize = 2048; +UserTaskParams.priority = 1U; +UserTaskParams.affinity = 0x1; +UserTaskParams.stack = &UserBuffer[0]; +UserTask = Task_create(User_Task, &UserTaskParams, &eb); +} + Basicly this task do nothing, only incrementing some value. And this task have lowerst priority, so it should take control in the last turn. Also I have an use-case on IPU1-0 core. That use-case code is very big, so I dont really sure where does it blocks. But I have some ideas, I hope you will help me to find out what is happening. If user task on IPU1-1 is running, I cant even init my use-case on IPU1-0 to the end. But if I turn that task off, use-case works great. So inside use-case logic I'm calling some functions which is maybe somehow interact with IPU1-1 core where my user task is running (and I suppose it takes control from that place even it's priority is low?). My first clue is some functions where System link control is calling. For example, usually I stuck after this function was called: /** + ******************************************************************************* + * + * \brief Print Memory Heap Statistics + * + * This function send a system control message + * to all cores. + * + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Int32 Chains_memPrintHeapStatus() +{ + UInt32 procId, linkId; + SystemCommon_PrintStatus printStatus; + + memset(&printStatus, 0, sizeof(printStatus)); + + printStatus.printHeapStatus = TRUE; + + for(procId=0; procIdgmake -s showconfig # # Build Config is [ tda2xx_evm_bios_all ] # Build Config file is @ d:/projects/InstalSDK/vsdk308/vision_sdk/configs/tda2xx_evm_bios_all/cfg.mk # Build Config .h file is @ d:/projects/InstalSDK/vsdk308/vision_sdk/links_fw/include/config/apps/tda2xx_evm_bios_all/system_cfg.h # Build CPUs is @ ipu1_0 ipu1_1 ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=yes # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-evm # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=a15_0 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Windows_NT [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] # A15_TARGET_OS=Bios [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=d:/projects/InstalSDK/vsdk308/vision_sdk/apps/src/rtos/opencl # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # AUTOSAR_APP=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=no # RADAR_STUDIO=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig # DEFAULT_DTB=dra7-evm-infoadas.dtb # CMEM_INCLUDE=no # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=no # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_autocalibration ALG_autoremap ALG_census ALG_clr ALG_denseopticalflow ALG_disparityhamdist ALG_dmaSwMs ALG_vpeSwMs ALG_edgedetection ALG_framecopy ALG_lanedetection ALG_objectdetection ALG_remapmerge ALG_safe_framecopy ALG_sfm ALG_sparseopticalflow ALG_stereo_postprocessing ALG_subframecopy ALG_surroundview ALG_tidl ALG_tiop # # Use-cases included in build, # UC_srv_calibration UC_lvds_vip_dual_cam_dual_display UC_lvds_vip_multi_cam_view UC_lvds_vip_sv_analytics_us UC_lvds_vip_sv_standalone UC_lvds_vip_single_stereo UC_lvds_vip_single_stereo_auto_calib UC_lvds_vip_single_stereo_calibration UC_network_rx_tx UC_network_stereo_display UC_null_src_dec_display UC_null_src_display UC_ov490_vip_sv_standalone UC_saveDisFrame UC_vip_single_cam_analytics2 UC_vip_single_cam_dense_optical_flow UC_vip_single_cam_dual_display UC_vip_single_cam_edge_detection UC_vip_single_cam_frame_copy UC_vip_single_cam_frame_copy_safety UC_vip_single_cam_lane_detection UC_vip_single_cam_object_detection2 UC_vip_single_cam_sfm UC_vip_single_cam_sparse_optical_flow UC_vip_single_cam_subframe_copy UC_vip_single_cam_tlr UC_vip_single_cam_view UC_vip_single_cam_view_encdec UC_tidl UC_semSeg UC_tidl_OD # # # CPUs that are NOT required but included in config [ tda2xx_evm_bios_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: IPU2 can be excluded from application # # CPUs that are required but not included in config [ tda2xx_evm_bios_all ], # # # Edit d:/projects/InstalSDK/vsdk308/vision_sdk/apps/configs/tda2xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application # Right now I'm building my project like that: I'm using makefile and .dat file. There is how my .bat file is written: @ECHO OFF set projpath=%CD% set PATH=%vision_sdk_path%\ti_components\os_tools\windows\xdctools_3_32_01_22_core;%PATH%; set ITELMA_TARGET=TDA2PX call gmake.exe -j1 -s clean if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) call gmake.exe -j1 -s vcop if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) call gmake.exe -j1 -s all if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) cd %vision_sdk_path%\vision_sdk\build echo %CD% set CURRENT_ITELMA_PROJECT=%projpath% set MAKECONFIG=tda2px_evm_bios_itelma rmdir /S /Q %vision_sdk_path%\vision_sdk\binaries\apps\tda2px_evm_bios_itelma\lib rmdir /S /Q %vision_sdk_path%\vision_sdk\binaries\apps\tda2px_evm_bios_itelma\obj call gmake -s clean if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) call gmake -s -j4 depend if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) call gmake -s -j4 if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) call gmake -s appimage if errorlevel 1 ( echo Failure Reason Given is %errorlevel% cd .. exit /b %errorlevel% ) cd %projpath% But if I use this binary files as described in 3.7 Load using CCS, there is no debug information in CCS. Best regards + +Hi, Please share the complete build log in a text file & set PROFILE=debug in your config file because it's set as the release Thanks Gaviraju + diff --git a/data2/text/range/20001-25000/1033627.txt b/data2/text/range/20001-25000/1033627.txt new file mode 100644 index 0000000000000000000000000000000000000000..18d13a25042bdecfb107f4122b8cb1e7a065e5b4 --- /dev/null +++ b/data2/text/range/20001-25000/1033627.txt @@ -0,0 +1,133 @@ +Ticket Name: TDA4VM: Off-screen rendering problem: 0x506 GL_INVALID_FRAMEBUFFER_OPERATION + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Use off-screen rendering on TDA4 to report 0x506 error GL_INVALID_FRAMEBUFFER_OPERATION. QNX system, SDK version 7.3~ The same off-screen rendering is OK on TDA2 based on Linux system 3.7 and 3.8SDK. You said that TDA4 is supported, and the below is to implement the basic code. Help analyze it. If you need to provide other supplements, please point out~ code show as below: //initialization void SvEglRenderBase::InitFrameBufferOpt() { //Create frame buffer object: FBO glGenFramebuffers(1, &m_nSvTopviewFbo); glGetIntegerv(GL_FRAMEBUFFER_BINDING, &m_nSvDefaultFbo); glBindFramebuffer(GL_FRAMEBUFFER, m_nSvTopviewFbo); int nTestId; glGetIntegerv(GL_FRAMEBUFFER_BINDING, &nTestId); //Create offline render texture glGenTextures(1, &m_nSvTopviewTexture); glBindTexture(GL_TEXTURE_2D, m_nSvTopviewTexture); glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, SV_2D_LUT_WIDTH, SV_2D_LUT_HEIGHT, 0, GL_RGB, GL_UNSIGNED_BYTE, NULL); //Setting Texture Parameters: Interpolation method. The interpolation methods of the farthest and nearest can be set differently. glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); //Binding 2D texture to default texture is generally used to break the previous texture binding relationship //and restore the texture binding state of OpenGL to the default state. glBindTexture(GL_TEXTURE_2D, 0); //Bind textrue to FBO glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_2D, m_nSvTopviewTexture, 0); glBindFramebuffer(GL_FRAMEBUFFER, m_nSvDefaultFbo); //Create frame buffer object: FBO glGenFramebuffers(1, &m_nSvPart3dFbo); //Create offline render texture glGenTextures(1, &m_nSvPart3dTexture); //If 3D off-screen rendering is required, depth Buffer is required here glGenRenderbuffers(1, &m_nSvPart3dDepthId); //Bind FBO: To use FBO, it must be bind firstly. Make it the current rendering buffer. glBindFramebuffer(GL_FRAMEBUFFER, m_nSvPart3dFbo); //Create offline render texture: Texture must be created befroe it is bind to FBO glBindTexture(GL_TEXTURE_2D, m_nSvPart3dTexture); glTexImage2D(GL_TEXTURE_2D, 0, GL_RGB, SV_3D_VIEW_WIDTH, SV_3D_VIEW_HEIGHT,0, GL_RGB, GL_UNSIGNED_BYTE, NULL); //Setting Texture Parameters: Interpolation method. The interpolation methods of the farthest and nearest can be set differently. glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); //Binding 2D texture to default texture is generally used to break the previous texture binding relationship //and restore the texture binding state of OpenGL to the default state. glBindTexture(GL_TEXTURE_2D, 0); //Bind textrue to FBO glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_2D, m_nSvPart3dTexture, 0); glBindRenderbuffer(GL_RENDERBUFFER, m_nSvPart3dDepthId); glRenderbufferStorage(GL_RENDERBUFFER, GL_DEPTH_COMPONENT16, SV_3D_VIEW_WIDTH, SV_3D_VIEW_HEIGHT); glFramebufferRenderbuffer(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_RENDERBUFFER, m_nSvPart3dDepthId); glBindRenderbuffer(GL_RENDERBUFFER, 0); glBindFramebuffer(GL_FRAMEBUFFER, m_nSvDefaultFbo); //Type 0 in TDA4 //Type 0 in TDA4 //Type 0 in TDA4 //Type 0 in TDA4 GLenum eErrStatus = glCheckFramebufferStatus(GL_FRAMEBUFFER); printf("[AVM] glCheckFramebufferStatus complete eErrStatus = 0x%x.\n",eErrStatus); if(eErrStatus != GL_FRAMEBUFFER_COMPLETE) { switch(eErrStatus) { case GL_FRAMEBUFFER_COMPLETE: printf("[AVM] Framebuffer complete.\n"); break; case GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT: printf("[AVM] [ERROR] Framebuffer incomplete: Attachment is NOT complete.\n"); break; case GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT: printf("[AVM] [ERROR] Framebuffer incomplete: No image is attached to FBO.\n"); break; case GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS: printf("[AVM] [ERROR] Framebuffer incomplete: Attached images have different dimensions.\n"); break; case GL_FRAMEBUFFER_UNSUPPORTED: printf("[AVM] [ERROR] Unsupported by FBO implementation.\n"); break; default: printf("[AVM] [ERROR] Unknow error.\n"); break; } } } //Rendering and drawing glBindFramebuffer(GL_FRAMEBUFFER, m_pEGLRenderBase->m_nSvTopviewFbo); DrawOffline1(); DrawOffline2(); DrawOffline3(); glBindFramebuffer(GL_FRAMEBUFFER, m_pEGLRenderBase->m_nSvDefaultFbo); DrawAll(); //Report 0x506 error here GL_INVALID_FRAMEBUFFER_OPERATION GLenum nErrId = glGetError(); if (nErrId != GL_NO_ERROR Help analyze it. If you need to provide other supplements, please point out~ Please~ Thanks~ + +Responses: +Compared with the SDK of TDA2 3.07 version, the differences are: FBO is used outside TDA4: Why does TDA4 use FBO in the outermost rendering? In appEglBindFrameBufferl, the off-screen rendering is initialized and the FBO is bound, then render_renderFrame is called to render, and finally appEglSwap But TDA2 does not use FBO here, and directly calls render_renderFrame to render, and then System_eglSwap. The appEglBindFrameBuffer function in TDA4 is as follows, FBO is used inside. void appEglBindFrameBuffer(void *eglWindow, app_egl_tex_prop_t *prop) { int32_t texFound; int32_t texIndex; uint32_t i; PFNGLEGLIMAGETARGETTEXTURE2DOESPROC glEGLImageTargetTexture2DOES; PFNGLCLIPCONTROLEXTPROC glClipControlEXT; app_egl_obj_t *obj = (app_egl_obj_t*)eglWindow; app_egl_tex_obj_t *tex_obj; glEGLImageTargetTexture2DOES = (PFNGLEGLIMAGETARGETTEXTURE2DOESPROC)eglGetProcAddress("glEGLImageTargetTexture2DOES"); glClipControlEXT = (PFNGLCLIPCONTROLEXTPROC)eglGetProcAddress("glClipControlEXT"); texIndex = -1; texFound = 0; for(i = 0; i < APP_EGL_MAX_RENDER_TEXTURES; i++) { tex_obj = &obj->texRender[i]; if(tex_obj->isAlloc && tex_obj->dmaBufFd == prop->dmaBufFd[0] && tex_obj->dmaBufFdOffset == prop->dmaBufFdOffset[0] ) { texIndex = i; texFound = 1; break; } } if(!texFound) { /* find free slot amd create texture */ for(i = 0; i < APP_EGL_MAX_RENDER_TEXTURES; i++) { tex_obj = &obj->texRender[i]; if(!tex_obj->isAlloc) { int32_t status; status = appEglWindowSetupRenderTex(obj, prop, i); if(status==0) { texIndex = i; texFound = 1; } break; } } } if(texFound) { tex_obj = &obj->texRender[texIndex]; glActiveTexture(GL_TEXTURE2); glBindTexture(GL_TEXTURE_2D, tex_obj->tex); //appEglCheckEglError("glBindTexture", EGL_TRUE); glEGLImageTargetTexture2DOES(GL_TEXTURE_2D, (GLeglImageOES)tex_obj->img); //appEglCheckEglError("glEGLImageTargetTexture2DOES", EGL_TRUE); glBindFramebuffer(GL_FRAMEBUFFER, tex_obj->fboId); // appEglCheckEglError("glBindFramebuffer", EGL_TRUE); glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,GL_TEXTURE_2D, tex_obj->tex, 0); //appEglCheckEglError("glFramebufferTexture2D", EGL_TRUE); GLenum fbstatus = glCheckFramebufferStatus(GL_FRAMEBUFFER); if (fbstatus != GL_FRAMEBUFFER_COMPLETE) printf("EGL: ERROR: Frambuffer complete check failed 0x%x\n", fbstatus); } /* Binding FBO: move the origin to upper left */ glClipControlEXT(GL_UPPER_LEFT_EXT, GL_NEGATIVE_ONE_TO_ONE_EXT); } + +Hello, The below code snippet works on TDA4 Linux. Can you please try this out? If it still doesn't work, you may have to contact QNX. + // Store the current frame buffer + glGetIntegerv(GL_FRAMEBUFFER_BINDING, ¤t_fbo); + glActiveTexture(GL_TEXTURE0 + 15); + glGenTextures(1, &offscreen_fbo_texture); + glBindTexture(GL_TEXTURE_2D, offscreen_fbo_texture); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_NEAREST); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE); + glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE); + glTexImage2D(GL_TEXTURE_2D, 0, GL_RGBA, width, height, 0, GL_RGBA, GL_UNSIGNED_BYTE, NULL); + glActiveTexture(GL_TEXTURE0); + glBindTexture(GL_TEXTURE_2D, 0); + + /* Depth buffer */ + glGenRenderbuffers(1, &offscreen_fbo_depth); + glBindRenderbuffer(GL_RENDERBUFFER, offscreen_fbo_depth); + glRenderbufferStorage(GL_RENDERBUFFER, GL_DEPTH_COMPONENT16, width, height); + glBindRenderbuffer(GL_RENDERBUFFER, 0); + + /* Framebuffer to link everything together */ + glGenFramebuffers(1, &offscreen_fbo); + glBindFramebuffer(GL_FRAMEBUFFER, offscreen_fbo); + glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_2D, offscreen_fbo_texture, 0); + glFramebufferRenderbuffer(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_RENDERBUFFER, offscreen_fbo_depth); + + if ((status = glCheckFramebufferStatus(GL_FRAMEBUFFER)) != GL_FRAMEBUFFER_COMPLETE) { + fprintf(stderr, "glCheckFramebufferStatus returned error %d", status); + return -1; + } + + // Bind back original frame buffer + glBindFramebuffer(GL_FRAMEBUFFER, current_fbo); + + // To draw to offscreen fbo, bind offscreen_fbo + glBindFramebuffer(GL_FRAMEBUFFER, offscreen_fbo); + // .... + // Draw to Offscreen FBO + // .... + +Hello, The reason why TDA4 uses FBO for rendering is because of how the display works. The display in case of TDA2 was driven by EGL and thus the swap. In case of TDA4, the display is being driven by R5. The GPU rendered buffer is passed on to display node that takes care of displaying the buffer. This is why we need off screen buffer on TDA4. Regards Hemant + +Okay, thank you very much for your prompt and detailed reply. I understand the reason why TDA4 adopts FBO. Now back to the problem: The rendering process in TDA4: ... ... 1. texYuv[i] = appEglWindowGetTexYuv(pEglWindowObj, &texProp[i]); ... ... 2. appEglBindFrameBuffer(glSrvParams->eglWindowObj, &renderTexProp); FBO is used in this function glGenTextures(1, &tex_obj->tex); glBindTexture(GL_TEXTURE_2D, tex_obj->tex); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); glGenFramebuffers(1, &tex_obj->fboId); glBindFramebuffer(GL_FRAMEBUFFER, tex_obj->fboId); GLuint rboDepthStencil; glGenRenderbuffers(1, &rboDepthStencil); glBindRenderbuffer(GL_RENDERBUFFER, rboDepthStencil); glRenderbufferStorage(GL_RENDERBUFFER, GL_DEPTH24_STENCIL8_OES, prop->width, prop->height); glFramebufferRenderbuffer(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_RENDERBUFFER, rboDepthStencil); glFramebufferRenderbuffer(GL_FRAMEBUFFER, GL_STENCIL_ATTACHMENT, GL_RENDERBUFFER, rboDepthStencil); glActiveTexture(GL_TEXTURE2); glBindTexture(GL_TEXTURE_2D, tex_obj->tex); glEGLImageTargetTexture2DOES(GL_TEXTURE_2D, (GLeglImageOES)tex_obj->img); glBindFramebuffer(GL_FRAMEBUFFER, tex_obj->fboId); glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,GL_TEXTURE_2D, tex_obj->tex, 0); ... ... 3. render_renderFrame(&glSrvParams->render3DSRVObj,glSrvParams->eglWindowObj,texYuv); Here is the texture unit texYuv that has been bound in step 1. Now the problem is here: if I use a new FBO in render_renderFrame (not the same as tex_obj->fboId in appEglBindFrameBuffer in step 2), Here it will report 0x506 GL_INVALID_FRAMEBUFFER_OPERATION error, so nothing can be drawn. The reason why I use a new FBO here is that I want to draw A first, then draw B, and finally display it as a new texture after processing. My usage is as described before, here is the wrong method I used? Or is there any other way to achieve what I want? 4. glFinish(); glBindFramebuffer(GL_FRAMEBUFFER, 0); appEglSwap(glSrvParams->eglWindowObj); Looking forward to your prompt reply, thank you~ + +Thank you for your reply. I will experiment with the method you mentioned in the render_renderFrame function. It doesn't feel much different from my previous usage. Just one more step of glActiveTexture(GL_TEXTURE0 + 15) operation. And yours here seems to be the opposite of mine: // Bind back original frame buffer glBindFramebuffer(GL_FRAMEBUFFER, current_fbo); //here current_fbo is equivalent to 0, that is, glBindFramebuffer(GL_FRAMEBUFFER, 0); // To draw to offscreen fbo, bind offscreen_fbo glBindFramebuffer(GL_FRAMEBUFFER, offscreen_fbo); //offscreen_fbo here is not equal to 0 // .... // Draw to Offscreen FBO // .... Here at the end do not use glBindFramebuffer(GL_FRAMEBUFFER, 0), and then draw the offscreen_fbo_texture? According to my thoughts: // To draw to offscreen fbo, bind offscreen_fbo glBindFramebuffer(GL_FRAMEBUFFER, offscreen_fbo); DrawA(); DrawB(); DrawC(); // Bind back original frame buffer glBindFramebuffer(GL_FRAMEBUFFER, 0); //Draw offscreen_fbo_texture Draw(offscreen_fbo_texture); If there is progress, I will communicate with you in time. + +I verified it according to your method today, but it still doesn’t work, and an error is still reported: GL: after render_renderFrame() glError (0x506) The screen is always black. I feel that the crux of the problem lies in: As you said before, in the case of TDA4, the display is driven by R5, so TDA4 uses FBO for rendering outside. In this way, we can no longer create and use other FBOs in render_renderFrame(). What needs to be solved now is: TDA4 uses FBO outside, How to create and use other FBOs in render_renderFrame()? + +Hello, Can you refer to this code: appEglWindowSetupRenderTex in vision_apps/utils/opengl/src/a72/app_gl_egl_utils_qnx.c This will show you how to set up render target. You can use this code as a reference or modify it as needed. Regards Hemant + +what I want to do is this: Create 2 framebuffers, let’s call them fb1 and fb2. Render the scene to fb2 normally. Render fb2 to fb1 with one post-processing effect. Render fb1 to the default framebuffer (we’ll call it fb0) with another post-processing effect. + +Hello, This works for me. Please look at an example implementation in offscreen.cpp. Shaders and header are included as well. offscreen.cppoffscreen.hoffscreen.fshoffscreen.vsh Let us assume that fb0 is the one that is being currently used. Let this be the framebuffer that is being used by default. Our target is to keep this as the final frame buffer that goes to the R5 for display. Now, let us create a second offscreen buffer and render surround view to it. For this, we will create and manage the framebuffer inside render.cpp and not change anything outside that. Include offscreen.h in render.cpp and make the following changes: In render_init function, add this (you can add after car_init): if(offscreen_init(&offscreen_fbo, width, height) != 0) + { + offscreen_fbo = 0; + printf("offscreen_init failed. Cannot run in offscreen mode."); + }; Please define offscren_fbo (to be returned by offscreen_init) and define width and height as per your screen resolution and requirements. Now, in render_renderFrame, at the very beginning, save the default fbo and use the framebuffer initialized above. At the end of the function, switch to default fb and render the offscreen texture to final framebuffer void render_renderFrame(render_state_t *pObj, void *pEglObj, GLuint *texYuv) +{ + GLint default_fbo; + + glGetIntegerv(GL_FRAMEBUFFER_BINDING, &default_fbo); + + // srv_param_offscreen is used to enable and disable offscreen processing + if((srv_param_offscreen == true) && (offscreen_fbo !=0 )) + { + offscreen_render = true; + glBindFramebuffer(GL_FRAMEBUFFER, offscreen_fbo); + } + else + { + offscreen_render = false; + } + + /// The rest of the SRV code can stay unmodified. + // After srv_draw and car_draw for all viewports are done, + // we can switch back to original fb + + // This piece of code below remains unchanged + glClear(GL_COLOR_BUFFER_BIT); + { + for(int i = 0; i < num_viewports; i++) + { + //..... surround view rendering code ..... + // ... + // ... + } + } + + // Add the below lines to switch to original fb and draw the + // offscreen texture to final frame buffer + if(offscreen_render == true) + { + glFinish(); + glBindFramebuffer(GL_FRAMEBUFFER, default_fbo); + glViewport(0, 0, width, height); + offscreen_draw(width, height); + } + + //... frame count/fps code stays as is +} + + You can modify offscreen shaders and code to include any post processing. This example adds only one extra framebuffer. Once you get this working, you can have a second one as needed. This code works on linux. If you face any issues on QNX, please check with QNX. Hope this helps. Regards Hemant + +Thank you very much for your reply. This method really works. But introduced a new problem: splash screen, the screen keeps flickering If you remove this, the display will be normal and there will be no flickering. + +This sounds like the texture may not be rendered to. Just for experiment, can you change glFinish to glReadPixels and see if the flickering goes away? Regards Hemant + +Thank you for your prompt reply, I feel that dawn is coming soon, and now only the splash screen problem is left First of all, the rendering was successful, but the total splash screen; Annotated the glFinish function inside render_renderFrame (reserved by glFinish outside render_renderFrame), the screen still flickers. After the appEglSwap and appPerfStatsHwaUpdateLoad functions outside render_renderFrame, call the glReadPixels function, which does not take effect, and the saved images are all black. (The saved screen is also black when it is not flickering). In addition, by the way, why must TDA4 GPU rendering be used: screen -c /usr/lib/graphics/jacinto7/graphics.conf.dss_on_r5 + +Hello, You need to try glReadPixels before glBindFramebuffer(GL_FRAMEBUFFER, default_fbo); in the example above. I would also recommend reaching out to QNX regarding this flicker and the screen command. Regards Hemant + +After verification: changing glFinish to glReadPixels, the flickering phenomenon still exists. + +I see such instructions elsewhere: OpenGL ES double-buffered drawing causes a splash screen. In fact, double buffering is used to solve the splash screen problem. But there is a situation that makes double-buffering drawing will cause a splash screen problem: in a process (due to certain restrictions, only one On-screen Surface can be applied for), two different locations need to be displayed at the same time. This situation will lead to the following problems (A and B represent Buffers that need to be displayed in different positions. A0 represents the 0th frame of A Buffer) Time\screen on(up-screen Buffer) off(off-screen Buffer) T1 A0 B0 A1 B0 T2 (upper screen swap) A1 B0 A0 B0 T3 A1 B0 A0 B1 T4 (upper screen swap) A0 B1 A1 B0 -From T3 to T4, this time period will cause a flickering screen. Because double buffering is used to swap on the screen, swapping the data of on and off (in fact, the content pointed to by the pointer is changed). Therefore, when T4 is on the screen, the A position, the corresponding off-screen Buffer is old. solution This provides a solution: after swap, update the off-screen (off) Buffer. Details are as follows: Time\screen on off T1 A0 B0 A1 B0 T2 (upper screen) A1 B0 A0 B0 T2 (update) A1 B0 A1 B0 T3 A1 B0 A1 B1 T4 (upper screen) A1 B1 A1 B0 T4 (update) A1 B1 A1 B1 -As shown above, after each swap, update the off-screen data. In this way, when you go to the screen again, it will not cause a splash screen. In the example you provided, how to update off-screen data? + +After verification: changing glFinish to glReadPixels, the flickering phenomenon still exists. But the image saved by glReadPixels is normal. + +I found this function, Is it possible to use the solution? GLenum glClientWaitSync( GLsync sync, GLbitfield flags, GLuint64 timeout); + +Hello, Possibly - you may have to create sync objects to synchronize rendering - we haven't tried this in this case but worth trying. glFinish should have synchronized. It is not very efficient and as you mentioned, ideally, you want to have double buffering with synchronization. Did you get a chance to ask QNX about this? Regards Hemant + +Thanks~ But this actually has nothing to do with the operating system. We have also tested the Linux system, and there will be such a splash screen problem. It feels related to TDA4, because we are OK on TDA2. I feel that the crux of this problem lies in: how to synchronize double buffering? Maybe I don’t have enough knowledge in this area, can you provide some demo reference? + +Let us continue discussion here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1039081/tda4vm-create-2-framebuffers-but-introduced-a-new-problem-splash-screen-the-screen-keeps-flickering Can we close this one? + diff --git a/data2/text/range/20001-25000/1042932.txt b/data2/text/range/20001-25000/1042932.txt new file mode 100644 index 0000000000000000000000000000000000000000..4007d60b080f1de91185e256c741c45adbf6841e --- /dev/null +++ b/data2/text/range/20001-25000/1042932.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2EG-17: (LINUX)TDA2eg MMC0 (SDcard) not respond + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: DRA722, PCF8575, PMP Dear all, We are a custom board(TDA2EG-17) SDK : Prcceoss vision SDK 0307 my SD card have two partitions (Fat32-boot , ext4-roofs) and I only modified the DDR in evm.c(by emif execel) and pinmux in mux_data.h(pinmux tool) and dtb According to our customized board ================================================================================ I want to load Kernel with SD card I have put some commands in the auto command (ex.mmc rescan and mmc list and mmc info etc...) But it seems that there is no information about mmc Finally ran to emmc_android_boot and failed But I want to use the SD card to boot What is happening here? ==================Then I took a look at the program======================= mmc.c function :mmc_start_init(struct mmc *mmc) { ....................... if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) printf("MMC: no card present\n"); ----------------------------not printed in the log ....................... } MMC: no card present\n" is not printed in the log Does this mean that the sd card is detected? ================================================= This is my log U-Boot SPL 2016.05-00016-gcc5b418-dirty (Oct 07 2021 - 19:04:23) DRA722-GP ES2.1 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v i2c_write: error waiting for addr ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for addr ACK (status=0x116) tps65903x: could not set LDO1 voltage. *** Warning - bad CRC, using default environment i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00016-gcc5b418-dirty (Oct 07 2021 - 19:04:23 +0800) CPU : DRA722-GP ES2.1 Model: TI DRA722 Board: DRA72x EVM REV DRAM: 2 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 OMAP SD/MMC: 0, OMAP SD/MMC: 1 i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Warning: fastboot.board_rev: unknown board revision ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Hit any key to stop autoboot J: 2 1 0 ================================================================="mmc rescan" i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! =========================================================== "fatls mmc 0:1" i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! ** Bad device mmc 0 ** =========================================================================== "mmc dev 0" i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! =========================================================================== "mmc info ;" i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! ========================================================================= "printenv ; "\ arch=arm args_fit=setenv bootargs console=${console} args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} baudrate=115200 board=dra7xx board_name=dra72x boot_fdt=try boot_fit=0 boot_os=0 bootargs=androidboot.serialno=${serial#} bootcmd=;mmc rescan;echo ;fatls mmc 0:1;;mmc dev 0;echo ;mmc info ;echo ;printenv ; ;bdinfo ; ;mmc list ;;if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot...; fastboot 0; fi;if test ${boot_fit} -eq 1; run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; bootdelay=2 bootdir=/boot bootenvfile=uEnv.txt bootfile=zImage bootm_size=0x10000000 bootpart=0:2 bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} console=ttyO0,115200n8 cpu=armv7 dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 dfu_bufsiz=0x10000 dofastboot=0 emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC J...; bootm $loadaddr $loadaddr $fdtaddr; envboot=mmc dev ${mmcdev};mmc info;mmc list;mmc bootpart;if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; fastboot.board_rev=unknown fastboot.cpu=DRA722 fastboot.secure=GP fastboot.userdata_size=unknown fdt_addr_r=0x88000000 fdtaddr=0x88000000 fdtcontroladdr=fdf0a3d8 fdtfile=undefined findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra71-evm-infoadas_3rdParty; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; finduuid=part uuid mmc ${bootpart} uuid fit_bootfile=fitImage.itb fit_loadaddr=0x88000000 importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} kernel_addr_r=0x82000000 loadaddr=0x82000000 loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} mmcboot=mmc dev 0;if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; mmcdev=0 mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; mmcrootfstype=ext4 rootwait netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} netloadfdt=tftp ${fdtaddr} ${fdtfile} netloadimage=tftp ${loadaddr} ${bootfile} nfsopts=nolock partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} pxefile_addr_r=0x80100000 ramdisk_addr_r=0x88080000 rdaddr=0x88080000 reboot_image=boot rootpath=/export/rootfs scriptaddr=0x80000000 scsidevs=0 serial#=0601101b4ca40322 soc=omap5 static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off stderr=serial@4806a000 stdin=serial@4806a000 stdout=serial@4806a000 update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} usbtty=cdc_acm vendor=ti ver=U-Boot 2016.05-00016-gcc5b418-dirty (Oct 07 2021 - 19:04:23 +0800) vram=16M Environment size: 8558/131067 bytes ========================================================================= "detect bdinfo" arch_number = 0x00000FE6 boot_params = 0x80000100 DRAM bank = 0x00000000 -> start = 0x80000000 -> size = 0x7F000000 DRAM bank = 0x00000001 -> start = 0x00000000 -> size = 0x00000000 baudrate = 115200 bps TLB addr = 0xFEFF0000 relocaddr = 0xFEF3E000 reloc off = 0x7E73E000 irq_sp = 0xFDF0A3C0 sp start = 0xFDF0A3B0 ========================================================================= "mmclist" OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) ========================================================================= ## Error: "board_findfdt" not defined J i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! i2c_write: error waiting for data ACK (status=0x116) tps65903x: could not set LDO1 voltage. i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() i2c_write: error waiting for data ACK (status=0x116) ERROR: read error from device: fdf1eb28 register: 0x50! at drivers/power/pmic/palmas.c:40/palmas_read() failed to set signal voltage i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 Card did not respond to voltage select! ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => ====================================================================== What is the problem? Thanks all!! + +Responses: +Dear all, Does anyone have suggestions? Thanks! + +David, Looks like you had some I2C failures and the kernel image on MMC is not recognizable. Please confirm you have zImage in /rootfs/boot folder and your I2C commands are correct or signal lines are connected correctly. Moreover, there might be issues with the way you are formatting the SD card. Reference a similar failure here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/759776/linux-tda2-linux-boot-problem-from-micro-sd-card Best Regards, Shiou Mei + diff --git a/data2/text/range/20001-25000/621590.txt b/data2/text/range/20001-25000/621590.txt new file mode 100644 index 0000000000000000000000000000000000000000..56bd7c9b29d6f08d152a9a606bd287b8a1ee3150 --- /dev/null +++ b/data2/text/range/20001-25000/621590.txt @@ -0,0 +1,156 @@ +Ticket Name: TDA2EVM5777: Required vision sdk version with sys/bios version 6.41 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: SYSBIOS, TDA2 Hi , Presently iam using the TDA2x board and vision sdk 2.10 version with sys/bios version 6.46. and iam running opencv example in the above sdk . My requirement is to run the opencv with the olderversion of sys/bios version 6.41 For the above requirement which version vision sdk need to be use for sys/bios version 6.41 and provide the vision datasheet for the version. + +Responses: +hi , Need to download vision sdk 2.02.00.00 download which is having sys/bios version 6.41 + +Hi Venkata, Vision SDK 2.07 uses bios 6.41 (ver. 2.08 uses uses higher version of bios: 6.42). Please note that it is quite old version of VisionSDK and it is recommended to use more resent version of the SDK which have more features and bug fixes. Regards, Yordan + +Hi, you can download VisionSDK versions 2.xx from CDDS (ver 3.00 is available publicly at ti.com). You need to contact your local ti FAE to get access to CDDS if you do not have it. Regards, Yordan + +hi yordan, Thanks for the input i want to know whether the opencv of vision sdk has any dependency of sys/bios version . + +Hi Venkata, I have forwarded your question to OpenCV expert to comment. Regards, Yordan + +Hi jordan, Thanks for your feed back can u suggest some opencv expert at earliest . MY Ideas is: To build the opencv library for the vision sdk 2.07 of sysbios verison 6.41.I want to know how to move forward in doing the opencv task for vision sdk 2.07. Can you please provide some doucment or support how to build opencv for the vision sdk 2.07. + +Hi Venkata, OpenCV of Vision SDK depends on SysBios version 6.45.01.29 (build failure observed with other versions) Regards Surya + +hi suryamani, Can you explian how exactly is it related to the sysbios and whether you have tried to build with the olderversion of sysbios 6.41 with vision sdk 2.07 .can you let me know the steps to build. + +Hi Venkata, OpenCV supported on Vision SDK from 2.9.1 onwards, That time We tried with different component versions, We are getting some random compilation issues Below are the list of components it depends upon GCC 4.9 BIOS 6.45.01.29 XDC in vision sdk ti_components FATLIB from starterware in vision sdk ti_components Starterware in vision sdk ti_components Vision SDK itself OpenCL (part of VSDK ti_components) DSP CG tools We never tried with vision SDK 2.7 Building OpenCV part of Vision SDK Enable Flag ENABLE_OPENCV=yes & build Building OpenCV without Vision SDK Follow the steps shared in doc in below path ti_components\algorthim_codecs\opencv\opencv-3.1.0\docs Regards Surya + +hi suyamani, I have downloaded the vision_sdk 2.10 and enable the opencv and try to build for the windows version but iam getting the build errors.I have applied the patches also released by TI and try to build but still i have opencv errors like. Refrence errors: bs_bios/libopencv_core.a(ocl.cpp.obj): In function `cv::ocl::OpenCLAllocator::do wnload(cv::UMatData*, void*, int, unsigned int const*, unsigned int const*, unsi gned int const*, unsigned int const*) const': ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator8downloadEPNS_8UMatDataEPviPKjS6_S6_S 6_[_ZNK2cv3ocl15OpenCLAllocator8downloadEPNS_8UMatDataEPviPKjS6_S6_S6_]+0x21c): undefined reference to `clEnqueueReadBufferRect' ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator8downloadEPNS_8UMatDataEPviPKjS6_S6_S 6_[_ZNK2cv3ocl15OpenCLAllocator8downloadEPNS_8UMatDataEPviPKjS6_S6_S6_]+0x380): undefined reference to `clEnqueueReadBuffer' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libopencv_core.a(ocl.cpp.obj): In function `cv::ocl::OpenCLAllocator::un map(cv::UMatData*) const': ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator5unmapEPNS_8UMatDataE[_ZNK2cv3ocl15Op enCLAllocator5unmapEPNS_8UMatDataE]+0xd8): undefined reference to `clEnqueueUnma pMemObject' ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator5unmapEPNS_8UMatDataE[_ZNK2cv3ocl15Op enCLAllocator5unmapEPNS_8UMatDataE]+0x1c4): undefined reference to `clEnqueueWri teBuffer' ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator5unmapEPNS_8UMatDataE[_ZNK2cv3ocl15Op enCLAllocator5unmapEPNS_8UMatDataE]+0x2b8): undefined reference to `clFinish' ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator5unmapEPNS_8UMatDataE[_ZNK2cv3ocl15Op enCLAllocator5unmapEPNS_8UMatDataE]+0x348): undefined reference to `clFinish' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libopencv_core.a(ocl.cpp.obj): In function `cv::ocl::OpenCLAllocator::ma p(cv::UMatData*, int) const': ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator3mapEPNS_8UMatDataEi[_ZNK2cv3ocl15Ope nCLAllocator3mapEPNS_8UMatDataEi]+0xc8): undefined reference to `clEnqueueReadBu ffer' ocl.cpp:(.text._ZNK2cv3ocl15OpenCLAllocator3mapEPNS_8UMatDataEi[_ZNK2cv3ocl15Ope nCLAllocator3mapEPNS_8UMatDataEi]+0x218): undefined reference to `clEnqueueMapBu ffer' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libopencv_core.a(ocl.cpp.obj): In function `cv::ocl::Program::create(cv: :ocl::ProgramBinary const&, cv::String&)': ocl.cpp:(.text._ZN2cv3ocl7Program6createERKNS0_13ProgramBinaryERNS_6StringE+0x13 c): undefined reference to `clCreateProgramWithBinary' ocl.cpp:(.text._ZN2cv3ocl7Program6createERKNS0_13ProgramBinaryERNS_6StringE+0x15 c): undefined reference to `clBuildProgram' ocl.cpp:(.text._ZN2cv3ocl7Program6createERKNS0_13ProgramBinaryERNS_6StringE+0x19 0): undefined reference to `clReleaseProgram' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_fflush': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:25: undefin ed reference to `File_flush' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_fputs': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:72: undefin ed reference to `File_puts' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_printf': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:81: undefin ed reference to `File_vprintf' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_fprintf': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:90: undefin ed reference to `File_vprintf' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_ftell': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:103: undefi ned reference to `File_tell' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_fseek': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:112: undefi ned reference to `File_tell' /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:118: undefi ned reference to `File_size' C:/VISION_SDK_02_10_00_00/ti_components/algorithms_codecs/opencv/opencv-3.1.0/li bs_bios/libgenericio.a(generic_io.c.obj): In function `generic_frewind': /user/a0132418/ti/opencv/tiopencv/modules/genericio/src/generic_io.c:135: undefi ned reference to `File_rewind' gmake[6]: *** [C:/VISION_SDK_02_10_00_00/vision_sdk/binaries/vision_sdk/bin/tda2 xx-evm/vision_sdk_a15_0_release.xa15fg] Error 1 gmake[5]: *** [a15_0] Error 2 gmake[4]: *** [apps_a15] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps] Error 2 gmake[1]: *** [vision_sdk_apps] Error 2 gmake: *** [vision_sdk] Error 2 Please let meknow any windows patch need to apply for build the opencv with windows platform. + +Hi Venkata, I am installing vision_sdk_2_10 windows installer, will update you shortly I already have vision_sdk_2_10 linux installer, I verified with that it is able to build without any issues (after applying shared opencv patches) Meanwhile Could you please run "gmake config" & share ? Regards Surya + +hi surya , Please find my gmake config C:\VISION_SDK_02_10_00_00\vision_sdk>gmake config # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA3XX_EVM TDA2XX_MC TDA2EX_EV M] # PLATFORM=tda2xx-evm # DDR_MEM=DDR_MEM_512M [options: DDR_MEM_512M] # DUAL_A15_SMP_BIOS=no [options: yes no] # # Build config, # IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] # BUILD_OS=Windows_NT [options: Windows_NT Linux] # A15_TARGET_OS=Bios [options: Bios Linux] # PROFILE=release [options: debug release] # BUILD_DEPENDANCY_ALWAYS=no # BUILD_ALGORITHMS=no # # CPU config, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=yes # PROC_IPU2_INCLUDE=no # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=no # PROC_EVE4_INCLUDE=no # PROC_A15_0_INCLUDE=yes # # Safety Module config, # ALG_CRC_INCLUDE=no # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # DSS_INCLUDE=yes # # Other Module config, # NDK_PROC_TO_USE=a15_0 # AVBRX_INCLUDE=yes # FATFS_PROC_TO_USE=ipu1_0 # DCAN_INCLUDE=no # HCF_INCLUDE=no # RADAR_INCLUDE=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # ALG_SV_INCLUDE=yes # DATA_VIS_INCLUDE=no # ENABLE_OPENCV=yes # OPENCL_INCLUDE=no # SRV_FAST_BOOT_INCLUDE=no # LENS_MODULE=imi + +Hi Venkata, Installed vision sdk 2.10 release on windows machine & able to build binaries with config shared by you Could you please run "where gmake" & confirm gmake is picked from xdc pkg shared with Vision SDK 2.10 release ? If not, set path in cmd prompt where you building vision sdk (check cmd in TDA2xx UG) Regards Surya + +hi surya, When i build without opencv enable in the windows platform i not getting any issues. But iam getting issues when iam building with opencv enabled in the vision sdk 2.10 + +That is strange Anyway I am attaching OpenCV patch shared with Vision SDK 2.10 Please compare & check if any differences with whatever you already applied? openCV.zip + +Hi , Thanks for your patch. I need help to port the opencv to vision sdk 2.7 by referring vision sdk 2.10 for windows version whether it is possible are it has a dependency of bios ,startware,bsp platforms + +Hi Venkata, We only verified with bios 6.45.01.29, please check with that first on vision sdk 2.7 & from staterware , bsp side no such dependency + +hi surymanani, I trying to build the opencv on the a15 platform as per the doucment given the path C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\opencv\opencv-3.1.0\docs Documentname: OpenCV_cross_compile_Steps_for_A15_BIOS.pdf I facing the building issues and getting errors at the pthread in the system.cpp dependency. Can you share the cmake file for the generic to build on a15 platform. + +PFA cmake file Not allowed to upload ".cmake" file so renamed to ".txt", Please rename back to ".cmake" arm-gnueabi_baremetal.toolchain.txt include(CMakeForceCompiler) + +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_VERSION 1) +set(CMAKE_SYSTEM_PROCESSOR arm) + +set(CMAKE_SIZEOF_VOID_P 32) +set(GENERIC 1) +set(TI_TDA2XX_ARM_A15 1) + +set(GCC_COMPILER_VERSION "4.7" CACHE STRING "GCC Compiler version") + +set(FLOAT_ABI_SUFFIX "") + +set(ARM_NONE_SYSROOT /opt/ti/ccsv5/tools/compiler/gcc-arm-none-eabi-4_7-2012q4${FLOAT_ABI_SUFFIX} CACHE PATH "ARM cross compilation system root") + +set(CMAKE_LINKER "${ARM_NONE_SYSROOT}/bin/arm-none-eabi-ld" CACHE PATH "linker") +set(CMAKE_AR "${ARM_NONE_SYSROOT}/bin/arm-none-eabi-ar" CACHE PATH "archiver") +#set(CMAKE_C_COMPILER "${ARM_NONE_SYSROOT}/bin/arm-none-eabi-gcc" CACHE PATH "C compiler") +#set(CMAKE_CXX_COMPILER "${ARM_NONE_SYSROOT}/bin/arm-none-eabi-g++" CACHE PATH "C++ compiler") + +cmake_force_c_compiler(${ARM_NONE_SYSROOT}/bin/arm-none-eabi-gcc GNU) +cmake_force_cxx_compiler(${ARM_NONE_SYSROOT}/bin/arm-none-eabi-g++ GNU) + +########################################################################## +# Cmake C and CXX flags # +########################################################################## + +set(CMAKE_CXX_FLAGS "-DGENERIC_ARM -DGENERIC -D_POSIX_THREADS -O3" CACHE STRING "c++ flags") +set(CMAKE_C_FLAGS "-DGENERIC_ARM -DGENERIC -D_POSIX_THREADS -O3" CACHE STRING "c flags") + +set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mcpu=cortex-a15 -mtune=cortex-a15 -mfpu=neon -mfloat-abi=hard -mthumb -fdata-sections -Wa,--noexecstack -fsigned-char -Wno-psabi") +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mcpu=cortex-a15 -mtune=cortex-a15 -mfpu=neon -mfloat-abi=hard -mthumb -fdata-sections -Wa,--noexecstack -fsigned-char -Wno-psabi") + +########################################################################## +# Cmake linker flags # +########################################################################## + +set(CMAKE_SHARED_LINKER_FLAGS "--specs=rdimon.specs -lgcc -lc -lm -lgloss-linux -lrdimon -lnosys" CACHE STRING "shared linker flags") +set(CMAKE_MODULE_LINKER_FLAGS "--specs=rdimon.specs -lgcc -lc -lm -lgloss-linux -lrdimon -lnosys" CACHE STRING "module linker flags") +set(CMAKE_EXE_LINKER_FLAGS "--specs=rdimon.specs -lgcc -lc -lm -lgloss-linux -lrdimon -lnosys -Wl,-z,nocopyreloc" CACHE STRING "executable linker flags") + +set(CMAKE_SHARED_LINKER_FLAGS "-Wl,--no-undefined -Wl,--gc-sections -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now ${CMAKE_SHARED_LINKER_FLAGS}") +set(CMAKE_MODULE_LINKER_FLAGS "-Wl,--no-undefined -Wl,--gc-sections -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now ${CMAKE_MODULE_LINKER_FLAGS}") +set(CMAKE_EXE_LINKER_FLAGS "-Wl,--no-undefined -Wl,--gc-sections -Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now ${CMAKE_EXE_LINKER_FLAGS}") + + +if(USE_NEON) + message(WARNING "You use obsolete variable USE_NEON to enable NEON instruction set. Use -DENABLE_NEON=ON instead." ) + set(ENABLE_NEON TRUE) +elseif(USE_VFPV3) + message(WARNING "You use obsolete variable USE_VFPV3 to enable VFPV3 instruction set. Use -DENABLE_VFPV3=ON instead." ) + set(ENABLE_VFPV3 TRUE) +endif() + +set(CMAKE_FIND_ROOT_PATH ${CMAKE_FIND_ROOT_PATH} ${ARM_NONE_SYSROOT}) + +if(EXISTS ${CUDA_TOOLKIT_ROOT_DIR}) + set(CMAKE_FIND_ROOT_PATH ${CMAKE_FIND_ROOT_PATH} ${CUDA_TOOLKIT_ROOT_DIR}) +endif() + +set( CMAKE_SKIP_RPATH TRUE CACHE BOOL "If set, runtime paths are not added when using shared libraries." ) +set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) +set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) +set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM ONLY) + +# macro to find programs on the host OS +macro( find_host_program ) + set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER ) + set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER ) + set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER ) + if( CMAKE_HOST_WIN32 ) + SET( WIN32 1 ) + SET( UNIX ) + elseif( CMAKE_HOST_APPLE ) + SET( APPLE 1 ) + SET( UNIX ) + endif() + find_program( ${ARGN} ) + SET( WIN32 ) + SET( APPLE ) + SET( UNIX 1 ) + set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM ONLY ) + set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY ) + set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY ) +endmacro() + +# macro to find packages on the host OS +macro( find_host_package ) + set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER ) + set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY NEVER ) + set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE NEVER ) + if( CMAKE_HOST_WIN32 ) + SET( WIN32 1 ) + SET( UNIX ) + elseif( CMAKE_HOST_APPLE ) + SET( APPLE 1 ) + SET( UNIX ) + endif() + find_package( ${ARGN} ) + SET( WIN32 ) + SET( APPLE ) + SET( UNIX 1 ) + set( CMAKE_FIND_ROOT_PATH_MODE_PROGRAM ONLY ) + set( CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY ) + set( CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY ) +endmacro() + +hi surya, I facing building issue in the cmake with the cmake you provided. I made minor changes to the cmake shared by you and please refer the errors and let me know the changes cmake below changes i did. set(CMAKE_CXX_FLAGS "-DGENERIC_ARM -DGENERIC -D_POSIX_THREADS -O3 -fpermissive -Wwrite-strings -w" CACHE STRING "c++ flags") set(CMAKE_C_FLAGS "-DGENERIC_ARM -DGENERIC -D_POSIX_THREADS -O3 -fpermissive -Wwrite-strings -w" CACHE STRING "c flags") Please find the cmake errors while building [ 5%] Built target zlib [ 10%] Built target libpng [ 10%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/matrix.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/umatrix.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/matrix_decomp.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/opencl/runtime/opencl_clamdblas.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/opencl/runtime/opencl_core.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/opencl/runtime/opencl_clamdfft.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/out.cpp.obj [ 12%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/types.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/dxt.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/gl_core_3_1.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/matmul.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/cuda_info.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/conjugate_gradient.cpp.obj [ 14%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/ocl.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/downhill_simplex.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/array.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/lapack.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/cuda_gpu_mat.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/tables.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/system.cpp.obj In file included from /home/valeo/ti/opencv/modules/core/src/system.cpp:514:0: /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc:6:1: error: missing terminating " character " Host: sh: 0: getcwd() failed: No such file or directory ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc:8:1: error: too many decimal points in number 4.4.0-31-generic sh: 0: getcwd() failed: No such file or directory ^~~~~ /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc:9:7: error: stray '\' in program x86_64\n" ^ /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc:9:9: error: missing terminating " character x86_64\n" ^ [ 17%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/opengl.cpp.obj [ 17%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/stat.cpp.obj [ 17%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/arithm.cpp.obj /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc: In function 'const cv::String& cv::getBuildInformation()': /home/valeo/ti/opencv/build_arm_bios/modules/core/version_string.inc:7:1: error: expected ',' or ';' before 'Linux' Linux sh: 0: getcwd() failed: No such file or directory ^~~~~ /home/valeo/ti/opencv/modules/core/src/system.cpp: In constructor 'cv::Mutex::Impl::Impl()': /home/valeo/ti/opencv/modules/core/src/system.cpp:871:42: error: 'PTHREAD_MUTEX_RECURSIVE' was not declared in this scope pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE); ^~~~~~~~~~~~~~~~~~~~~~~ /home/valeo/ti/opencv/modules/core/src/system.cpp:871:65: error: 'pthread_mutexattr_settype' was not declared in this scope pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE); ^ make[2]: *** [modules/core/CMakeFiles/opencv_core.dir/src/system.cpp.obj] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [modules/core/CMakeFiles/opencv_core.dir/all] Error 2 Please have a look and update the changes + +hi surya, Any update on the cmake file and the errors. + +hi suryamani jena, When trying to build the opencv with cmake i am getting pthread issues as i referred the arm tool chain of ccs7 they is no library for pthread.so it is showing compiling problem in doing the opencv cross build for arm a15 paltform . Please help me out for building the openv 3.1.0 version https://git.ti.com/opencv/tiopencv opencv downloaded from the above link and ccs7v arm toolchain used and cmake file provided. The errors facing are pthread issue due to libpthread is not availbale in the library folder of arm tool chain of ccs7 dirent.h Please try to build the opencv with arm a15 and provide some solution . + diff --git a/data2/text/range/20001-25000/634157.txt b/data2/text/range/20001-25000/634157.txt new file mode 100644 index 0000000000000000000000000000000000000000..d38d72bc6f7ee2c37e78c7ca36b9bf3d4d88678c --- /dev/null +++ b/data2/text/range/20001-25000/634157.txt @@ -0,0 +1,359 @@ +Ticket Name: Linux/TDA2EVM5777: Problem using DSP in custom build environment + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello *! I've got the following problem bringing up the DSP of the TDA2 in a command line custom build environment (OUTSIDE CCS): Environment descrition custom resource table (rproc) ... +/* +Linux - Carve out -> device tree: +reg = <0x0 0xA100_0000 0x0 0x200_0000>; +*/ +#define DSP_SHMEM 0xa1004000 +#define DSP_SHMEM_SIZE 0x1000000 +/* OC_MEMORY */ +#define IPC_MEM_VIRT 0x40300000 +#define IPC_MEM_PHYS 0x40300000 +#define IPC_MEM_VIRT_SIZE 0x80000 +... +struct my_resource_table { + struct resource_table base; + + unsigned int offset[RSC_NUM_ENTRIES]; /* Should match 'num' in actual definition */ + + /* rpmsg vdev entry */ + struct fw_rsc_vdev rpmsg_vdev; + struct fw_rsc_vdev_vring rpmsg_vring0; + struct fw_rsc_vdev_vring rpmsg_vring1; + + /* text carveout entry */ + struct fw_rsc_carveout text_cout; + + /* devmem entry */ + struct fw_rsc_devmem devmem0; +}; + +//extern char ti_trace_SysMin_Module_State_0_outbuf__A; + +#pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table") +#pragma DATA_ALIGN (ti_ipc_remoteproc_ResourceTable, 4096) +#pragma RETAIN (ti_ipc_remoteproc_ResourceTable) + +struct my_resource_table ti_ipc_remoteproc_ResourceTable = { + 1, /* we're the first version that implements this */ + RSC_NUM_ENTRIES, /* number of entries in the table */ + 0, 0, /* reserved, must be zero */ + /* offsets to entries */ + { + offsetof(struct my_resource_table, rpmsg_vdev), + offsetof(struct my_resource_table, text_cout), + offsetof(struct my_resource_table, devmem0), + }, + /* rpmsg vdev entry */ + { + TYPE_VDEV, VIRTIO_ID_RPMSG, 0, + RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 }, + /* no config data */ + }, + /* the two vrings */ + { DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 }, + { DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 }, + + { + TYPE_CARVEOUT, + DSP_SHMEM, 0, + DSP_SHMEM_SIZE, 0, 0, "DSP_SHMEM", + }, + + { + TYPE_DEVMEM, + IPC_MEM_VIRT, IPC_MEM_PHYS, + IPC_MEM_VIRT_SIZE, 0, 0, "IPC_MEM_VIRT", + }, +}; + + linker cmd file MEMORY +{ + IRAM_MEM: o = 0x00800000 l = 0x00008000 /* 32kB internal SRAM */ + OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */ + SHMEM: o = 0xa1004000 l = 0xF00000 +} + +SECTIONS +{ + .text > SHMEM + .stack > SHMEM + .bss > SHMEM + .cio > SHMEM + .const > SHMEM + .data > SHMEM + .switch > SHMEM + .sysmem > SHMEM + .far > SHMEM + .args > SHMEM + .ppinfo > SHMEM + .ppdata > SHMEM + + /* COFF sections */ + .pinit > SHMEM + .cinit > SHMEM + + /* EABI sections */ + .binit > SHMEM + .init_array > SHMEM + .neardata > SHMEM + .fardata > SHMEM + .rodata > SHMEM + .c6xabi.exidx > SHMEM + .c6xabi.extab > SHMEM + .resource_table > SHMEM { + main.obj(.resource_table) + } +} + call of cl6x in Makefile ... +TOP=${PWD} +TOOLCHAIN=$(TOP)/linux_toolchain/C6000_7.4.2 +TICL=$(TOOLCHAIN)/bin/cl6x +INCLUDE=$(TOOLCHAIN)/lib +TARGET_NAME=dra7-dsp1-fw.xe66 + +CL6X_OPTIONS= --abi=eabi --run_linker --ram_model --unused_section_elimination=on --map_file=link.map --stack_size=0x1000 linker.cmd +LDFLAGS= -w -q -u _c_int00 -c -m linker.map +BUILD_FLAGS=-mv6600 -g --diag_warning=225 --diag_wrap=off --display_error_number --preproc_with_compile --preproc_dependency="depend.d" --c99 +LINK= -l $(INCLUDE)/libc.a + +all: build_objects link_together + +build_objects: + $(TICL) --abi=eabi -c main.c $(BUILD_FLAGS) + +link_together: + $(TICL) $(CL6X_OPTIONS) -o $(TARGET_NAME) -i $(INCLUDE) $(LINK) -u _c_int00 +... Result in Error: [ 835.520532] remoteproc remoteproc2: rsc: type 3 +[ 835.520544] remoteproc remoteproc2: rsc: type 0 +[ 835.520553] remoteproc remoteproc2: rsc: type 1 +[ 835.520561] remoteproc remoteproc2: rsc: type 3 +[ 835.520571] remoteproc remoteproc2: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings +[ 835.520582] remoteproc remoteproc2: vdev rsc: vring0: da a0000000, qsz 256, align 4096 +[ 835.520591] remoteproc remoteproc2: vdev rsc: vring1: da a0004000, qsz 256, align 4096 +[ 835.521595] remoteproc remoteproc2: vring0: va e1000000 dma 0xa1000000 size 3000 idr 0 +[ 835.521646] remoteproc remoteproc2: vring1: va e1004000 dma 0xa1004000 size 3000 idr 1 +[ 835.521667] remoteproc remoteproc2: powering up 40800000.dsp +[ 835.521679] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 28540 +[ 835.528810] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 835.528854] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 835.528946] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 835.528966] remoteproc remoteproc2: rsc: type 3 +[ 835.528975] remoteproc remoteproc2: rsc: type 0 +[ 835.528984] remoteproc remoteproc2: carveout rsc: da a1004000, pa 0, len 1000000, flags 0 +[ 835.535316] remoteproc remoteproc2: carveout va e1100000, dma 0xa1100000, len 0x1000000 +[ 835.662825] remoteproc remoteproc2: carveout mapped 0xa1004000 to 0xa1100000 +[ 835.662836] remoteproc remoteproc2: rsc: type 1 +[ 835.663096] remoteproc remoteproc2: mapped devmem pa 0x40300000, da 0x40300000, len 0x80000 +[ 835.663115] remoteproc remoteproc2: rsc: type 3 +[ 835.663123] remoteproc remoteproc2: rsc: type 0 +[ 835.663131] remoteproc remoteproc2: rsc: type 1 +[ 835.663640] omap-iommu 40d01000.mmu: iommu fault: da 0xb3175f30 flags 0x0 +[ 835.663651] remoteproc remoteproc2: crash detected in 40800000.dsp: type mmufault +[ 835.663663] omap-iommu 40d01000.mmu: 40d01000.mmu: errs:0x00000002 da:0xb3175f30 pgd:0xee5f2cc +4 *pgd:px00000000 +[ 835.663699] remoteproc remoteproc2: remote processor 40800000.dsp is now up +[ 835.664010] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 835.664950] remoteproc remoteproc2: registered virtio0 (type 7) +[ 835.664962] remoteproc remoteproc2: rsc: type 0 +[ 835.664971] remoteproc remoteproc2: rsc: type 1 +[ 835.664995] remoteproc remoteproc2: enter rproc_crash_handler_work +[ 835.665004] remoteproc remoteproc2: handling crash #1 in 40800000.dsp +[ 835.665012] remoteproc remoteproc2: recovering 40800000.dsp +[ 835.806178] omap_hwmod: mmu1_dsp1: _wait_target_disable failed +[ 835.813328] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 835.813366] remoteproc remoteproc2: stopped remote processor 40800000.dsp + Something is going wrong in my mappings, but what.... and: Why? TNX - Marco. + +Responses: +Hi Marco, which version is the SDK you use? Thanks, Yordan + +I do not use a sdk to build this. It is a custom build-environment based on cl6x 7.4.2, because we are not able to use XDC, RTOS-fragments, etc... we have to fulfill a couple of security checks, the requirements do not fit the way the TI SDK work... (Esp. the affinity to CCS is not useful in our case). I also got a Vision_SDK_2_12_02_00, which I try to use as a guideline.... I took a look into the "IPC"-stuff... which provides something like a "run from linux"-code example. But it make usage of XDC, SYS/BIOS and I run against the same problems I almost had during the "STRIP DOWN" of the IPU stuff. Criticism: It seams for me, that TI don't take much care for customers who are not able to use CCS and SDKs. It's a hard fight to get informations to bring up the processors outside the "common" way... (I have to leave as mentioned above). So... again (same conversation like IPU-Thread...) -> Please help me bring up the DSP outside the SDK and CCS. (FYI: Until now the development on the IPU-Cores "really bare metal" works fine! It took a long time to extract everything needed, but now we are able to build very small, high efficient code and use rproc to fire up the cores. NICE! AND NOW... I have to do the same with the DSP...). CU Marco + +About the main.c and how to implement the resource table: Our Main.c is very easy.... /** + * main.c + */ + +#include "custom_rsc_table_dsp.h" + +void main(void) +{ + while (1) { + // DO NOTHING. + } +} + We go on doing something useful, if the code run on the target without errors and MMU-Violations. -> The rproc-mechanism seems to work... the resource_table have been used, the mapping have been done... but during start of the code, it crashes... section allocations maybe its helpful: 33 SECTION ALLOCATION MAP + 34 + 35 output attributes/ + 36 section page origin length input sections + 37 -------- ---- ---------- ---------- ---------------- + 38 .cinit 0 a1004000 00000000 UNINITIALIZED + 39 + 40 .init_array + 41 * 0 a1004000 00000000 UNINITIALIZED + 42 + 43 .stack 0 a1004000 00001000 UNINITIALIZED + 44 a1004000 00000008 rts6600_elf.lib : boot.obj (.stack) + 45 a1004008 00000ff8 --HOLE-- + 46 + 47 .text 0 a1005000 000005a0 + 48 a1005000 00000100 rts6600_elf.lib : autoinit.obj (.text:_auto_init_elf) + 49 a1005100 00000100 : cpy_tbl.obj (.text:copy_in) + 50 a1005200 000000c0 : exit.obj (.text:exit) + 51 a10052c0 000000c0 : tls.obj (.text:tls:init:__TI_tls_init) + 52 a1005380 000000a0 : memcpy64.obj (.text:memcpy) + 53 a1005420 00000080 : boot.obj (.text:_c_int00) + 54 a10054a0 00000060 : cpp_init.obj (.text:__TI_cpp_init) + 55 a1005500 00000040 : args_main.obj (.text:_args_main) + 56 a1005540 00000040 main.obj (.text) + 57 a1005580 00000020 rts6600_elf.lib : exit.obj (.text:abort) + 58 + 59 .fardata 0 a10055a0 0000000c + 60 a10055a0 0000000c rts6600_elf.lib : exit.obj (.fardata) + 61 + 62 .resource_table + 63 * 0 a1006000 000000d0 + 64 a1006000 000000d0 main.obj (.resource_table:retain) + 65 + (UNINIT, because of RAM-MODEL). BTW: What about the startup code? A colleague told me, I do not have to take care about it, it would be "inserted" by the compiler and jumps to "main" itself. Really?! (I don't think so, this explains why the code craches during trying to start it...) So outside the SDK: Is there an example of a simple start-up code (TDA2-C6xx-DSP)? I can not find out where it is. (I bring up a simple "hello worls" project in CCS and now wondering in the "makefile" directory, where all the well-known-elements are, I've learned they are elementary... ?) + +Hi Marco, I have forwarded your questions to an expert. Regards, Yordan + +Thank you! + +Hi Marco, You would need to have a vector table in your DSP code which can then point to the _c_int00 code. The compiler inserts the _c_int00 to main code but the vector table is something you need to populate. The location of the vector table is determined by what is programmed in the CTRL_CORE_CONTROL_DSP1_RST_VECT or CTRL_CORE_CONTROL_DSP2_RST_VECT register. The configuration is as below: /* DSPSS Boot Address */ WR_MEM_32(CTRL_CORE_CONTROL_DSPx_RST_VECT, (DSPxSSBOOTADDRVALUE >> 10)); So you would need to check from the A15 what value you are setting for this register. You can refer to the starterware_XX_XX_XX_XX\system_config\c66x\intvecs.asm as to how to create a DSP vector table. You should have atleast the reset handler implemented. It looks from the log, that the A15 lifts the DSP reset and the DSP does not find the vector table and hence the code execution flies off to some random locations and that creates the faults. Please try adding the vector table and let me know if this works for you. Thanks and Regards, Piyali + +Thanks Piyali Goswami ! I will check this.... + +Hello Piyali I'm back again, slightly confused on this MMU error: omap-iommu 40d01000.mmu: iommu fault: da 0xb3175f30 flags 0x0 (Information: It is always this address: 0xb3175f30 ... which don't belong to my code...) If I load the shipped binary into the DSP, everything works fine. With my own binary, this error will happen. I examined the working ELF and found that the vector table have to be placed to address: 0xA1A3_6000... I've still got some trouble accessing 0x4A00_255C while linux running. Some values: 0xFFFF_FFFD and 0x0000_0000 have been displayed... During my examinations I recognized that there is a lot of code inserted by the C6XL: __TI_enable_exit_profile_ __TI_CINIT_Base ... So. what is going on? I think, I got everything I need to bring up the DSP with my small build environment and I've got so much informations, that I am not able to see how. So lets see what I have, again: I've got a custom table results in the following RPROC behavior: [ 74.732441] remoteproc remoteproc2: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings +[ 74.732448] remoteproc remoteproc2: vdev rsc: vring0: da a0000000, qsz 256, align 4096 +[ 74.732455] remoteproc remoteproc2: vdev rsc: vring1: da a0004000, qsz 256, align 4096 +[ 74.733084] remoteproc remoteproc2: vring0: va e1000000 dma 0xa1000000 size 3000 idr 0 +[ 74.733115] remoteproc remoteproc2: vring1: va e1004000 dma 0xa1004000 size 3000 idr 1 +[ 74.733128] remoteproc remoteproc2: powering up 40800000.dsp +[ 74.733136] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 31025 +[ 74.739723] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 74.739758] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 74.739807] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 74.739819] remoteproc remoteproc2: rsc: type 3 +[ 74.739825] remoteproc remoteproc2: rsc: type 0 +[ 74.739831] remoteproc remoteproc2: carveout rsc: da a1200000, pa 0, len 1000000, flags 0 +[ 74.744068] remoteproc remoteproc2: carveout va e1100000, dma 0xa1100000, len 0x1000000 +[ 74.744498] remoteproc remoteproc2: carveout mapped 0xa1200000 to 0xa1100000 +[ 74.744503] remoteproc remoteproc2: rsc: type 0 +[ 74.744510] remoteproc remoteproc2: carveout rsc: da a1000000, pa 0, len 200000, flags 0 +[ 74.745133] remoteproc remoteproc2: carveout va e2100000, dma 0xa2100000, len 0x200000 +[ 74.745193] remoteproc remoteproc2: carveout mapped 0xa1000000 to 0xa2100000 +[ 74.745199] remoteproc remoteproc2: rsc: type 1 +[ 74.745233] remoteproc remoteproc2: mapped devmem pa 0x40300000, da 0x40300000, len 0x10000 + And, of course, there is "my" bug: omap-iommu 40d01000.mmu: iommu fault: da 0xb3175f30 flags 0x0 + My linker file now looks like: -stack 0x001000 /* Software Stack Size */ +-heap 0x001000 /* Heap Area Size */ + +--retain="*(.vects)" + +#define RST_VEC 0xa1a36000 + +MEMORY +{ + IRAM_MEM: o = 0x00800000 l = 0x00008000 /* 32kB internal SRAM */ + OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */ + DATA_MEM: o = 0xa1200000 l = 0x1800000 /* data, text, COFF and co... space for ALL other stuff */ + CODE_MEM: o = 0xa1000000 l = 0x200000 /* data, text, COFF and co... space for ALL other stuff */ +} + +SECTIONS +{ + /* BOOTING DSP */ + + .vects > RST_VEC + + /* COMMON SECTIONS */ + .text > CODE_MEM + .const > CODE_MEM + .cinit > CODE_MEM + + .stack > DATA_MEM + .data > DATA_MEM + .cio > DATA_MEM + .far > DATA_MEM + .fardata > DATA_MEM + .stack > DATA_MEM + .switch > DATA_MEM + .sysmen > DATA_MEM + .resource_table > CODE_MEM { + main.obj(.resource_table) + } +} + ... and I use the assembler code from the location you posted above to generate something like a "startup code". My main program may contain the error, because I have to improve something like a placeholder for the vector table... and I'm not shure, if this do it the right way: /** + * main.c + */ + +#include "custom_rsc_table_dsp.h" + +#pragma DATA_SECTION(__ISR_Table, ".vects") +Uint32 __ISR_Table[16] = { + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000 +}; + + +void counter (void){ + unsigned int ui_loop = 0xffff; + + while (ui_loop--); +} + +void main(void) +{ + while (1) { + counter(); + } +} +~ My current Makefile: TOP=${PWD} +TOOLCHAIN=$(TOP)/linux_toolchain/C6000_7.4.2 +TICL=$(TOOLCHAIN)/bin/cl6x +INCLUDE=$(TOOLCHAIN)/lib +TARGET_NAME=dra7-dsp1-fw.xe66 + +LIST_OF_OBJ=intvecs.obj main.obj + +CL6X_LINKER= --abi=eabi --run_linker $(LIST_OF_OBJ) --ram_model --map_file=link.map --stack_size=0x1000 linker.cmd +BUILD_FLAGS=-mv6600 -g --diag_warning=225 --diag_wrap=off --display_error_number --preproc_with_compile --preproc_dependency="depend.d" +LINK= -l $(INCLUDE)/libc.a + + +all: build_objects link_together + +build_objects: + $(TICL) --abi=eabi -c main.c $(BUILD_FLAGS) + $(TICL) --abi=eabi -mv6600 --abi=eabi -g intvecs.asm + +link_together: + $(TICL) $(CL6X_LINKER) -o $(TARGET_NAME) -I $(INCLUDE) $(LINK) + +version: + $(TICL) -version + +clean: + rm -rf *.obj + rm -rf *.d + rm -rf *.map + rm -rf *.out + rm -rf $(TARGET_NAME) + May be you (or somebody else...) is able to take a short look at my "stuff" and recognize something which MUST result in a crash? Hmmm.... first: Thanks to everybody who helped me until now. (BTW: If I do not start linux and enable the DSP, push in the ELF over JTAG instad of REPROC, the code runs... but I don't now if the GEL-scripts of the CCS do the whole job and of course using CCS is not my goal to reach.) + +Marco, When GEL files are used, the MMU is not setup and all addresses accessed by the DSP are treated as physical addresses. When you load the binary through Linux, the kernel sets up the L2 MMU for the DSP based on the resource table. Any attempts to access regions outside those specified in the resource table will result in an MMU fault. At the minimum, the register region containing the timers should be specified in the resource table. git.ti.com/.../rsc_table_vayu_dsp.h I would suggest adding the DEVMEM regions corresponding to L3/L4 peripherals into the resource table and verify that the DSP binary works. After that, the resource table can be pruned as necessary. regards, Venkat + +Hi Venkat, That explains why the binary can be loaded into the DSP and will run over JTAG on CCS. On the otherhand, what I did: I use the CARVEOUT of the Linux for code/data storage and generated two CARVEOUT segments on which I split the sections from the linker.cmd file of the cl6x. WHY should I add the peripherals into the table... Only some of them I will use, later... In the code I can see (?!) there is no need to do so... My intention, why I "got though the hell of simplifying" is quite easy: We have to guarantee, that we have EVERY CODE running on DSP (security relevant!) under our OWN CONTROL. When the CL6X adds code, from which I do not know what it will do... which I can not configure... WOW: This might be a show-stopper. So MAYBE there is any manual which explains WHAT exactly I have to do bringing up the DSP on the TDA2 "FROM SCRATCH" on my own, outside the SDK with not more than the CL6X and code I have under my control? + +Marco, Is the entry point in the DSP code aligned to 1KB boundary? This is a requirement to take DSP out of reset. Are you saying that you are seeing the exception if you just have an infinite while loop in the code? regards, Venkat + +Venkat, Indeed this is not really clear to me: I used the basics out of "IPC"-Baremetal directory of the SDK... so I'm not really shure... hmmm. Would you please introduce me from an expert point of view, how to define the entry point? (It is programmable using a special register on A15,... done by remoteproc?) Other question: Yes, I think the "main"-code have not been reached, it crashes before... may be it is the "jump" to it, or unalignment bug... or it may be any kind of access to none-mapped periphery (I do not touch any kind of periphery... if so, there must be some code used, which is not under my control... cl6x-stuff?). NOW -> I try to examine the code, because you gave a lot of tips! THANK YOU! (Especially: What is the target of the illegal address-call...) AGAIN: Please show me hot to set the entry point correct and how to handle "CTRL_CORE_CONTROL_DSP2_RST_VECT" of the A15, or is it done by remoteproc automatically? Then: How to tell the cl6x to set the "entry point" definition in the ELF-File during linking... I've got a leak of information on that.... THANK YOU for your help. + +Marco, >> Please show me hot to set the entry point correct and how to handle "CTRL_CORE_CONTROL_DSP2_RST_VECT" of the A15, or is it done by remoteproc automatically? The entry point is read from the ELF binary by remoteproc. You can look at the output of "readelf -a " to find the entry point. Below is a sample output. You can see the entry point aligned to 1024 bytes. Entry point address: 0x95023800 ... Section Headers: [19] .vecs PROGBITS 95023800 024800 000200 00 AX 0 0 1024 If the address is not aligned, you can use the "ALIGN" directive in the linker command file to align the section containing the reset vector. You can find the linker documentation here. www.ti.com/lit/pdf/spru186 >> Would you please introduce me from an expert point of view, how to define the entry point? Please look into the usage of "--entry_point" option in SPRU186. If you are using C code, this is defined at "_c_int00" by default. regards, Venkat + diff --git a/data2/text/range/20001-25000/665712.txt b/data2/text/range/20001-25000/665712.txt new file mode 100644 index 0000000000000000000000000000000000000000..d9b78648214c6ce6f82f445dab0e65ad191bdde7 --- /dev/null +++ b/data2/text/range/20001-25000/665712.txt @@ -0,0 +1,193 @@ +Ticket Name: Linux/DRA76P: Boot DRA76p with three spooky oops... + +Query Text: +Part Number: DRA76P Other Parts Discussed in Thread: TDA2 Tool/software: Linux On a custom board based on DRA76p (esp. TDA2Plus) SoC I've got some problems during linux (4.4.84) boot; (1) omap_hwmod: mcan: couldn't init clocks (2) omap_hwmod: timer12: enabled state can only be entered from initialized, idle, or disabled state (3) omap_hwmod: rng: enabled state can only be entered from initialized, idle, or disabled state ... if this sounds familiar to you, please let me know. TNX - Marco + +Responses: +Hi Marco, I have forwarded your question to kernel experts. Can you just upload complete boot log? Regards, Yordan + +It seems to be a problem bringing up the special, internal oscillated timer12 of the TDA2P: ------------[ cut here ]------------ +[ 0.635800] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2108 _enable+0x2b8/0x2d0() +[ 0.635808] omap_hwmod: timer12: enabled state can only be entered from initialized, idle, or disabled state +[ 0.635815] Modules linked in: +[ 0.635830] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.4.84XXXXX#2 +[ 0.635838] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 0.635845] Backtrace: +[ 0.635866] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 0.635874] r6:20000093 r5:ffffffff r4:00000000 r3:00000000 +[ 0.635905] [] (show_stack) from [] (dump_stack+0x7c/0x9c) +[ 0.635919] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) +[ 0.635926] r6:c06b5cf8 r5:0000083c r4:eec8dc70 r3:eec8c000 +[ 0.635952] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 0.635959] r8:00000004 r7:c00319f0 r6:a0000093 r5:ffffffea r4:c07afb40 +[ 0.635987] [] (warn_slowpath_fmt) from [] (_enable+0x2b8/0x2d0) +[ 0.635994] r3:c06b823c r2:c06b617c +[ 0.636013] [] (_enable) from [] (omap_hwmod_enable+0x2c/0x4c) +[ 0.636019] r7:c00319f0 r6:a0000093 r5:c07afba0 r4:c07afb40 +[ 0.636045] [] (omap_hwmod_enable) from [] (omap_device_enable+0x48/0x9c) +[ 0.636051] r6:eee3b6c0 r5:00000000 r4:00000001 r3:eee3b700 +[ 0.636076] [] (omap_device_enable) from [] (_od_runtime_resume+0x18/0x2c) +[ 0.636083] r6:c00319f0 r5:eee4fa74 r4:eee4fa10 r3:00000000 +[ 0.636111] [] (_od_runtime_resume) from [] (__rpm_callback+0x34/0x68) +[ 0.636117] r4:eee4fa10 r3:00000000 +[ 0.636136] [] (__rpm_callback) from [] (rpm_callback+0x28/0x88) +[ 0.636143] r6:eee06c10 r5:c079c100 r4:eee4fa10 r3:00000002 +[ 0.636168] [] (rpm_callback) from [] (rpm_resume+0x384/0x4fc) +[ 0.636175] r5:c079c100 r4:eee4fa10 +[ 0.636191] [] (rpm_resume) from [] (__pm_runtime_resume+0x54/0x6c) +[ 0.636197] r10:eee39880 r9:c078683c r8:eee398a8 r7:60000013 r6:00000004 r5:eee4fa74 +[ 0.636222] r4:eee4fa10 +[ 0.636237] [] (__pm_runtime_resume) from [] (omap_dm_timer_probe+0x198/0x3e8) +[ 0.636244] r7:c0577ef0 r6:eee4fa10 r5:eee4fa00 r4:eef550d0 +[ 0.636271] [] (omap_dm_timer_probe) from [] (platform_drv_probe+0x58/0xb8) +[ 0.636278] r10:00000000 r8:00000000 r7:c07b0a5c r6:fffffdfb r5:eee4fa10 r4:ffffffed +[ 0.636309] [] (platform_drv_probe) from [] (driver_probe_device+0x1e8/0x2b0) +[ 0.636316] r7:c07b0a5c r6:00000000 r5:c0823d9c r4:eee4fa10 +[ 0.636342] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 0.636348] r8:c075427c r7:00000000 r6:eee4fa44 r5:c07b0a5c r4:eee4fa10 r3:00000000 +[ 0.636379] [] (__driver_attach) from [] (bus_for_each_dev+0x5c/0x90) +[ 0.636385] r6:c032559c r5:c07b0a5c r4:00000000 r3:00000000 +[ 0.636410] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 0.636417] r6:c07d64e0 r5:eef52600 r4:c07b0a5c +[ 0.636439] [] (driver_attach) from [] (bus_add_driver+0xf0/0x1fc) +[ 0.636452] [] (bus_add_driver) from [] (driver_register+0x80/0xfc) +[ 0.636458] r7:00000077 r6:eef53040 r5:c07a29a8 r4:c07b0a5c +[ 0.636483] [] (driver_register) from [] (__platform_driver_register+0x4c/0x50) +[ 0.636489] r5:c07a29a8 r4:c07a29a8 +[ 0.636506] [] (__platform_driver_register) from [] (omap_dm_timer_driver_init+0x18/0x20) +[ 0.636517] [] (omap_dm_timer_driver_init) from [] (do_one_initcall+0x8c/0x1dc) +[ 0.636531] [] (do_one_initcall) from [] (kernel_init_freeable+0x1a4/0x270) +[ 0.636538] r10:00000000 r9:c078683c r8:c0786830 r7:00000077 r6:c07ec000 r5:00000006 +[ 0.636561] r4:c0793c08 +[ 0.636577] [] (kernel_init_freeable) from [] (kernel_init+0x10/0x100) +[ 0.636583] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c056f440 +[ 0.636607] r4:00000000 +[ 0.636620] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 0.636626] r4:00000000 r3:eec8c000 +[ 0.636640] ---[ end trace 74ff43b142d21e53 ]--- +[ 0.636654] omap_timer 4ae20000.timer: omap_dm_timer_probe: pm_runtime_get_sync failed! +[ 0.636680] omap_timer: probe of 4ae20000.timer failed with error -22 + Other problem is related to MCAN bring up: ------------[ cut here ]------------ +[ 0.265281] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2529 _init+0x324/0x430() +[ 0.265288] omap_hwmod: mcan: couldn't init clocks +[ 0.265296] Modules linked in: +[ 0.265313] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84XXXXXX#2 +[ 0.265321] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 0.265329] Backtrace: +[ 0.265352] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 0.265360] r6:60000013 r5:ffffffff r4:00000000 r3:00000000 +[ 0.265395] [] (show_stack) from [] (dump_stack+0x7c/0x9c) +[ 0.265410] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) +[ 0.265418] r6:c06b5cf8 r5:000009e1 r4:eec8de58 r3:00000000 +[ 0.265447] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 0.265455] r8:ffffffea r7:00000000 r6:ffffffea r5:0000000c r4:c07afa30 +[ 0.265488] [] (warn_slowpath_fmt) from [] (_init+0x324/0x430) +[ 0.265495] r3:c06b8228 r2:c06b60e8 +[ 0.265518] [] (_init) from [] (omap_hwmod_for_each+0x38/0x64) +[ 0.265525] r10:00000000 r8:c07519b0 r7:00000000 r6:c0750e20 r5:c07a7150 r4:c07afa30 +[ 0.265561] [] (omap_hwmod_for_each) from [] (__omap_hwmod_setup_all+0x2c/0x48) +[ 0.265568] r7:00000077 r6:eede2a80 r5:c07a29a8 r4:c07a29a8 +[ 0.265597] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0x8c/0x1dc) +[ 0.265612] [] (do_one_initcall) from [] (kernel_init_freeable+0x1a4/0x270) +[ 0.265620] r10:00000000 r9:c078683c r8:c078681c r7:00000077 r6:c07ec000 r5:00000001 +[ 0.265647] r4:c0793908 +[ 0.265663] [] (kernel_init_freeable) from [] (kernel_init+0x10/0x100) +[ 0.265671] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c056f440 +[ 0.265698] r4:00000000 +[ 0.265713] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 0.265720] r4:00000000 r3:eec8c000 +[ 0.265746] ---[ end trace 74ff43b142d21e52 ]--- + Third problem is related to rng: ------------[ cut here ]------------ +[ 2.491786] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2108 _enable+0x2b8/0x2d0() +[ 2.500697] omap_hwmod: rng: enabled state can only be entered from initialized, idle, or disabled state +[ 2.510217] Modules linked in: +[ 2.513296] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.4.84XXXXX#2 +[ 2.522905] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 2.529025] Backtrace: +[ 2.531503] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 2.539105] r6:20000093 r5:ffffffff r4:00000000 r3:00000000 +[ 2.544838] [] (show_stack) from [] (dump_stack+0x7c/0x9c) +[ 2.552099] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) +[ 2.560221] r6:c06b5cf8 r5:0000083c r4:eec8dc60 r3:eec8c000 +[ 2.565946] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 2.574680] r8:00000004 r7:c00319f0 r6:a0000013 r5:ffffffea r4:c07afbc8 +[ 2.581462] [] (warn_slowpath_fmt) from [] (_enable+0x2b8/0x2d0) +[ 2.589238] r3:c06b508c r2:c06b617c +[ 2.592851] [] (_enable) from [] (omap_hwmod_enable+0x2c/0x4c) +[ 2.600452] r7:c00319f0 r6:a0000013 r5:c07afc28 r4:c07afbc8 +[ 2.606179] [] (omap_hwmod_enable) from [] (omap_device_enable+0x48/0x9c) +[ 2.614738] r6:eee47bc0 r5:00000000 r4:00000001 r3:eee47c00 +[ 2.620462] [] (omap_device_enable) from [] (_od_runtime_resume+0x18/0x2c) +[ 2.629108] r6:c00319f0 r5:eee53874 r4:eee53810 r3:00000000 +[ 2.634833] [] (_od_runtime_resume) from [] (__rpm_callback+0x34/0x68) +[ 2.643133] r4:eee53810 r3:00000000 +[ 2.646749] [] (__rpm_callback) from [] (rpm_callback+0x28/0x88) +[ 2.654522] r6:eee06c10 r5:c079c100 r4:eee53810 r3:00000000 +[ 2.660244] [] (rpm_callback) from [] (rpm_resume+0x384/0x4fc) +[ 2.667844] r5:c079c100 r4:eee53810 +[ 2.671453] [] (rpm_resume) from [] (__pm_runtime_resume+0x54/0x6c) +[ 2.679492] r10:00000000 r9:c078683c r8:c07d6188 r7:60000013 r6:00000004 r5:eee53874 +[ 2.687400] r4:eee53810 +[ 2.689961] [] (__pm_runtime_resume) from [] (omap_rng_probe+0x84/0x290) +[ 2.698432] r7:c07d619c r6:eee53800 r5:ee598350 r4:eee53810 +[ 2.704156] [] (omap_rng_probe) from [] (platform_drv_probe+0x58/0xb8) +[ 2.712454] r8:00000000 r7:c07d619c r6:fffffdfb r5:eee53810 r4:ffffffed +[ 2.719236] [] (platform_drv_probe) from [] (driver_probe_device+0x1e8/0x2b0) +[ 2.728144] r7:c07d619c r6:00000000 r5:c0823d9c r4:eee53810 +[ 2.733868] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 2.742340] r8:c0768a68 r7:00000000 r6:eee53844 r5:c07d619c r4:eee53810 r3:00000000 +[ 2.750167] [] (__driver_attach) from [] (bus_for_each_dev+0x5c/0x90) +[ 2.758378] r6:c032559c r5:c07d619c r4:00000000 r3:00000000 +[ 2.764103] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 2.772138] r6:c07d64e0 r5:ee58fe80 r4:c07d619c +[ 2.776807] [] (driver_attach) from [] (bus_add_driver+0xf0/0x1fc) +[ 2.784765] [] (bus_add_driver) from [] (driver_register+0x80/0xfc) +[ 2.792801] r7:00000077 r6:ee598300 r5:c07a29a8 r4:c07d619c +[ 2.798522] [] (driver_register) from [] (__platform_driver_register+0x4c/0x50) +[ 2.807604] r5:c07a29a8 r4:c07a29a8 +[ 2.811216] [] (__platform_driver_register) from [] (omap_rng_driver_init+0x18/0x20) +[ 2.820740] [] (omap_rng_driver_init) from [] (do_one_initcall+0x8c/0x1dc) +[ 2.829397] [] (do_one_initcall) from [] (kernel_init_freeable+0x1a4/0x270) +[ 2.838131] r10:00000000 r9:c078683c r8:c0786830 r7:00000077 r6:c07ec000 r5:00000006 +[ 2.846038] r4:c0793e0c +[ 2.848595] [] (kernel_init_freeable) from [] (kernel_init+0x10/0x100) +[ 2.856893] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c056f440 +[ 2.864803] r4:00000000 +[ 2.867359] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 2.874959] r4:00000000 r3:eec8c000 +[ 2.878569] ---[ end trace 74ff43b142d21e54 ]--- +[ 2.883270] omap_rng 48090000.rng: Failed to runtime_get device: -22 +[ 2.889697] omap_rng 48090000.rng: initialization failed. +[ 2.895157] omap_rng: probe of 48090000.rng failed with error -22 + Regards, Marco. + +... last minute addition: Devicetree and Hardware: Our board is based on TDA2Plus and I use the same dtsi as used on evalboard (only thing I added: 2nd A15 core, works fine). So: DRA7.dtsi -> DRA74x.dtsi -> DRA76x.dtsi -> mystuff.dts Is this the correct "line" for tda2plus usage? Choosen the wrong "DRA7-something" not fetching every setting for TDA2Plus...? There are a lot of different names and I do not understand clearly what they want to tell me: So there is is a DRA7 Family, but it is also known as "Jacinto"? And on some CPU on evalnboards "5777" is lasered. In linux, there is a lot of OMAP2 stuff used and what the business people of TI told us was we have to use the TDA2Plus... quite confusing ;-) And sometimes... sometimes the IPs of SoC uses OMAP5 stuff... well: Can you explain (with a nice chart?) or where can I find such a "smart graphic", which explains the confusing naming? Oh... and another question: Do you have some devicetree files, or a complete Linux "for the good guys"... with less magic numbers and more abstraction, some #defines, which makes pinmultiplexing less frustrating? (Offset 0x1400, reading registers, looking for mode... and bit-fizzling all time long is no fun at all. Well named defines would be a nice service in good BSPs! By the way: If there are defines, for example naming a register: It would be sooooo nice when it fits the naming in the relating data sheet.... grumbled enough... back to work.) + +Hi Marco, I will only be able to answer to a part of your questions. Hope other will be answered soon. - Jacinto6 is an internal nickname of DRA75x/DRA74x family and some other derivatives - 5777 is a pre-production, test SoC of DRA75x/DRA74x and some other derivatives. It may not meet some characteristics like MHz and temp range - DRA75x/DRA74x is the successor of OMAP5, very similar but has some additional peripherals (e.g. DCAN) and some removed - OMAP2 is an early predecessor of OMAP5 (with OMAP3 and OMAP4 in between). Many peripherals such as UART, I2C, SPI did not change much over the time, thats why it is not uncommon to see omap2_ prefix for their drivers. Regarding the TDA2+ , note that it is offered in two packages: one legacy and compatible to DRA75x/DRA74x; and one enhanced but incompatible. The silicon is still very similar to DRA75x/DRA74x in the both packages, and the changes can be found by comparing the respective Data Manuals. Regards, Stan + +TNX Stan! + +Marco Our Software developer's guide includes information about the right DTB(dtb is compiled binary output generated from the dts files) file to choose based on the Jacinto6 part. You can refer processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide For J6plus(or TDA2+), the reference would be dra76-evm.dts - it will include the corresponding dtsi (include files) Also, please note that Pin mux in case of DRA7x is managed from the bootloader (uboot in case of linux). You will have to make incremental changes based on differences between your customer board and the TI EVM - would be good if you can summarize those changes for review + +Hello Sriram, Please remember: I do not use the SDK! So the link to the wiki is quite useless for me in this case. I took kernel and bootloader as a "BSP" out of the SDK and I use the evalboard-config as a start-up point. Our use-case is not captured from any provided SDK. Bad commenting and a lot of magic numbers does not make the job easy. ( I can understand why TI pushes the idea of a "one sdk do everything for every Soc and costumer"... but what we have to do is something completely different. ) MUXING...Would you please explain, why pinmuxing in TDA2+ is only managed in u-boot? As I mentioned: First, there is the ROM-Code which loads the SPL. The muxing is done in boardfile (SPL-part), the file "mux-data.h" contain. There is an "early" part, and a regular part. If dt for uboot is enabled and SPL have loaded uboot, the embedded uboot-dtb blob will be used remuxing the "mux-data.h" and setup needed periphery. Uboot loads a dt-blob produced in kernel environment, the kernel, do a little console settings and boot the kernel. This one uses its own dt-blob and this one is of course able to remux and re-setup nearly (!) everything. So pinmux can be done (and is done) in several chunks: Boardfile and "mux-data.h", u-boot dt-blob and last not least the kernel dt-blob. DT in uboot is no substitution of the DT in Linux, except you activate that functionality which provide u-boot-dt to the kernel: I didn't. I got some special problems booting the Kernel, because there's something wrong with timer12, rng and mcan. The error messages are able to give some points of reference. I do not need instructions of how to do something in the environment of the SDK, because (again) I'm not able to use it in our project. I need some help from your embedded engineers, who work on the Linux Kernel in its deepest layers. + +Marco SDK includes the kernel, uboot components and hence i pointed to the SDK documentation as we describe which dtb to refer to for each device in the J6 family - the table was a reference for the dts file that you need to reference and start with for changes at your end. with respect to pin muxing, bulk of the pin mux configuration is done from early bootloader stage(for configuration of iodelay parameters for each pin). Only for devices which support multiple functional modes like mmc - the speed, mode of operation depends of the card that you detect and hence will program iodelay parameters dynamically from the kernel And for "TI pushes the idea of a "one sdk do everything for every Soc and costumer" - lot of the peripherals on J6 are reused from earlier generation devices and with Linux , the policy is to reuse(or make generic) existing driver for peripherals reused on multiple platforms - this is just the way Linux community works. Also, the intent from SW perspective is make migration from one platform or use case to another seamless as possible: hence we try to maintain uniform SW IF(SDK) reusing SW wherever possible. The kernel configuration in SDK is mapped to the features that we can support on the TI EVM - it would be helpful if you can describe your HW platform(differences) and your intended changes for us to review and provide any feedback + +I've got a booting system over here and a console on linux works also fine. The three problems during boot are specified in the posts above. So please let us focusing on theses three problems and what principally goes wrong. The main information is: "enabled state can only be entered from initialized, idle, or disabled state" The timer12 and rng can not be initialized, because there's something wrong with its state. Double try or race condition? Why, where? "mcan: couldn't init clocks" is the first problem on my list. I do not change anything in the dtsi files of linux, especially: I didn't touch the clock domains. So what mistakes can be made to prevent mcan from init its clocking? (other information on following posts...) + +IODELAY and how this is implemented,well... lets take a look: #ifdef CONFIG_IODELAY_RECALIBRATION +const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = { + {0x6F0, 359, 0}, /* RGMMI0_RXC_IN */ + {0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */ + {0x708, 80, 1391}, /* RGMMI0_RXD0_IN */ + {0x714, 196, 1522}, /* RGMMI0_RXD1_IN */ + {0x720, 40, 1860}, /* RGMMI0_RXD2_IN */ + {0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */ +.... Okay... there are a few questions about it: What happen if I do not want to do these "iodelay recalibration" and undef "CONFIG_IODELAY_RECALIBRATION" ? It is not possible to introduce more magic numbers in a code like this... ;-) But, one moment... I just remember something: As I remember my latest contact with TI-Processors (long time ago, AM3xxx)... I used the Pinmux-tool to generate this magic-number-coffin automatically...! A long time ago, it was before devicetree started... that it was quite comfortable: Use the pinmux-tool and even the stuff of the complete header-file would be exported... doing pinmux with this output in u-boot... and have fun...! Okay: My problem... we got a processor with ACD package. Is this package integrated in the latest pinmux-tool? (A few days ago... no way... Our processor: TDA2PHArVQACDQ1) AND: Is the pinmux-tool still able to output what I need during "iodelay" pinmuxing and this recalibration of the iodelay per used pin? + +Hi Marco, According to the data manual, iodelay are to be programmed to guarantee the timing requirements for each of the signal. There are different options like LEGACY/VIRTUAL/MANUAL mode. Only for MANUAL mode, you'll need to program additional registers. If you remove IODELAY #ifdef, you may face some issues wrt timing syncs. This is not recommended. Also, the iodelay config is to be done while the Chip is in isolation. That's the reason it is done in the bootloader. You can find details on how you can get the iodelay data for the pads you are using git.ti.com/.../iodelay-config Regards, Nikhil D + +This is a good explanation of the subject -> Thank you! This is our first contact with iodelay_recalibration. Never needed before, never focussed before... without any problems. ... maybe: Not needed at all? What is Use case to switch to manual mode? I have to find out first... I grep the repo and dokumnents... Thank for this stuff ;-) Regards... Marco. + +Hi Marco, You will face timing issues if the iodelay configuration is not done. iodelay configuration makes sure that the switching of different signals all happen at the same time without any relative delay between them. Data sheet explains which modules need the iodelay configuration and different scenarios where VIRTUAL/MANUAL modes are applicable. Regards, Nikhil D + diff --git a/data2/text/range/20001-25000/685771.txt b/data2/text/range/20001-25000/685771.txt new file mode 100644 index 0000000000000000000000000000000000000000..337e6f3b8f61a8b0d12524ea77c3bb9a86337fb7 --- /dev/null +++ b/data2/text/range/20001-25000/685771.txt @@ -0,0 +1,337 @@ +Ticket Name: TDA2: TDA2 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: AWR1243 Hi, I am trying to build the application using the steps mentioned in ProcessorSDKRadar_UserGuide.pdf for TDA2x+. I am using AWR1243 sensor with TDA2x+. Why the steps related to changes need to be made for TDA2px in the 3.2 step of the document are not mentioned? If I make the following changes in the Rules.make file present in the build directory of visionsdk. MAKECONFIG?=tda2px_evm_bios_radar & execute gmake command to build application after setting the correct XDC path, I encounter the following error: D:/ProcessorSDK_Radar_3_1_0_0/vision_sdk/apps/configs/cfg.mk:21: D:/ProcessorSDK_Radar_3_1_0_0/vision_sdk/apps/configs/tda2px_evm_bios_radar/cfg.mk: No such file or directory gmake: *** No rule to make target `D:/ProcessorSDK_Radar_3_1_0_0/vision_sdk/apps/configs/tda2px_evm_bios_radar/cfg.mk'. Stop. And there is no file related to TDA2px at the location: D:\ProcessorSDK_Radar_3_1_0_0\vision_sdk\apps\configs. Did I miss any step while installation or is there something which needs to be installed for TDA2px? Thanks & regards, Varsha + +Responses: +Hi Varsha, I can see these files in the installation package I have. Have you made any changes in the package? Did the installation finish successfully? Regards, Rishabh + +Hi Rishabh, I have not made any changes before, but I have noticed now that these files are present in the SDK version 3.3, and not in SDK 3.1. Thank for your reply. regards, Varsha + +Hi, Yes you are correct. I was looking at Processor SDK Vision 3.1 installation which has tda2px_evm_bios_radar config. Regards, Rishabh + +Hi Rishabh, As I said earlier, I m trying to build the sample application for TDA2px. As per the Userguide , I have modified the required changes in the Rules.make file When executed the "gmake -s -j depend " i encounter the following errors (gmake Error 2).I have pasted them all in a attached text file. Also executed the "gmake -s showconfig" command to list all the configurations. Am I supposed to perform any other modifications? Thanks in advance. Regards, Varsha Attachment.txt # +# Archiving tda2px:ipu1_0:release:firewall_l3l4 into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/fw_l3l4/ +lib/tda2px/m4/release/firewall_l3l4.aem4 ... +# Compiling tda2px:ipu1_0:release:vpslib: dispcore/src/vpscore_dctrlDefaults.c +# +# Compiling tda2px:ipu1_0:release:vps_devices: ar0132rccc/src/bspdrv_ar0132rcccApi.c +# +# Archiving tda2px:ipu1_0:release:i2c_lld into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_lld/i2clld +/lib/tda2px/m4/release/i2c_lld.aem4 ... +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/V5/pmhal_videopll.c +# Compiling tda2px:ipu1_0:release:vpslib: dispcore/src/vpscore_dctrlGraph.c +# Compiling tda2px:ipu1_0:release:vps_devices: ar0132rccc/src/bspdrv_ar0132rcccI2c.c +# Compiling tda2px:ipu1_0:release:pm_hal_optimized: prcm/V5/hw_pmhal_videopll_data.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/mcspi/V0/priv/mcspi.c +# Archiving tda2px:ipu1_0:release:vps_osal_baremetal into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps +/lib/tda2px/ipu1_0/release/vps_osal_baremetal.aem4 ... +# +# Archiving tda2px:ipu1_0:release:stw_devices into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_lld/de +vices/lib/tda2px/m4/release/stw_devices.aem4 ... +# Archiving tda2px:ipu1_0:release:stw_uartconsole into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_ll +d/uartconsole/lib/tda2px/m4/release/stw_uartconsole.aem4 ... +# Archiving tda2px:ipu1_0:release:bsp_i2c into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/bsp_lld/i2c/li +b/tda2px/m4/release/bsp_i2c.aem4 ... +# Compiling tda2px:ipu1_0:release:vpslib: dispcore/src/vpscore_dssWb.c +# Compiling tda2px:ipu1_0:release:vps_devices: ar0132rccc/src/bspdrv_ar0132rcccReg.c +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/V5/hw_pmhal_videopll_data.c +# +# Compiling tda2px:ipu1_0:release:pm_hal_optimized: prcm/V5/hw_pmhal_ina226data.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/mmc/V0/priv/mmcsd.c +# +# Compiling tda2px:ipu1_0:release:vps_devices: sii9022a/src/bspdrv_sii9022a.c +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/V5/hw_pmhal_ina226data.c +# +# +# +# Compiling tda2px:ipu1_0:release:csl: src/ip/mmu/dsp/V0/priv/mmu.c +# Compiling tda2px:ipu1_0:release:pm_hal_optimized: prcm/pmhal_ina226.c +# +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/pmhal_ina226.c +# Compiling tda2px:ipu1_0:release:vps_devices: ds90uh925/src/bspdrv_ds90uh925Api.c +# Compiling tda2px:ipu1_0:release:pm_hal_optimized: prcm/pmhal_lp87565.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/ocmc/V0/priv/ocmc_ecc_l1.c +# Compiling tda2px:ipu1_0:release:vps_devices: ds90uh925/src/bspdrv_ds90uh925I2c.c +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/pmhal_lp87565.c +# Compiling tda2px:ipu1_0:release:pm_hal_optimized: prcm/pmhal_tps65917.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/ocmc/V0/priv/ocmc_ecc_l2.c +# Archiving tda2px:ipu1_0:release:vps_osal_tirtos into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/li +b/tda2px/m4/release/vps_osal_tirtos.aem4 ... +# Compiling tda2px:ipu1_0:release:vps_devices: ds90uh926/src/bspdrv_ds90uh926Api.c +# Compiling tda2px:ipu1_0:release:pm_hal: prcm/pmhal_tps65917.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/qspi/V1/priv/qspi.c +# +# +# +# +# +# Compiling tda2px:ipu1_0:release:vps_devices: ds90uh926/src/bspdrv_ds90uh926I2c.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/spinlock/V0/priv/spinlock.c +# Archiving tda2px:ipu1_0:release:vps_common into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/lib/tda +2px/m4/release/vps_common.aem4 ... +# Archiving tda2px:ipu1_0:release:stw_examples_utility into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/s +tw_lld/examples/utility/lib/tda2px/m4/release/stw_examples_utility.aem4 ... +# Archiving tda2px:ipu1_0:release:qspiflash_lib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/boot/sbl_aut +o/qspiflash/lib/tda2px/m4/release/qspiflash_lib.aem4 ... +# Archiving tda2px:ipu1_0:release:diag into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/diag/lib/tda2px/m4/re +lease/diag.aem4 ... +# Compiling tda2px:ipu1_0:release:vps_devices: ioexp/src/bspdrv_ioexpTca64xx.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/timer/V1/priv/timer.c +# +# +# +# +# Compiling tda2px:ipu1_0:release:vps_devices: pga450/src/bspdrv_pga450.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/uart/V1/priv/uart.c +# Compiling tda2px:ipu1_0:release:vps_devices: adv7611/src/bspdrv_adv7611Api.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/wd_timer/V0/priv/wd_timer.c +# Compiling tda2px:ipu1_0:release:vps_devices: adv7611/src/bspdrv_adv7611I2c.c +# Compiling tda2px:ipu1_0:release:csl: src/ip/pcie/V1/priv/pcie.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov10640/src/bspdrv_ov10640I2c.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov10640/src/bspdrv_ov10640Api.c +# Compiling tda2px:ipu1_0:release:vps_devices: imx224/src/bspdrv_imx224I2c.c +# Compiling tda2px:ipu1_0:release:vps_devices: imx224/src/bspdrv_imx224Reg_30fps_DOL_MIPI_4Lane.c +# Compiling tda2px:ipu1_0:release:vps_devices: imx224/src/bspdrv_imx224Reg_30fps_Linear.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2775/src/bspdrv_ov2775Api.c +# +# Compiling tda2px:ipu1_0:release:vps_devices: imx290/src/bspdrv_imx290Api.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2775/src/bspdrv_ov2775I2c.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2775/src/bspdrv_ov2775.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2659/src/bspdrv_ov2659I2c.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xx.c +# Compiling tda2px:ipu1_0:release:vps_devices: imx224/src/bspdrv_imx224Api.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxMcspiCfgPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxGpioCfgPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxOsalPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxUartCfgPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar12xxFmwPriv.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov490/src/bspdrv_ov490Api.c +# Compiling tda2px:ipu1_0:release:vps_devices: radar_ar12xx/src/bspdrv_ar1243cfg.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov490/src/bspdrv_ov490I2c.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov490/src/bspdrv_ov490Reg.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2659/src/bspdrv_ov2659Api.c +# Compiling tda2px:ipu1_0:release:vps_devices: ov2659/src/bspdrv_ov2659Reg.c +# Archiving tda2px:ipu1_0:release:stw_boards into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_lld/boa +rds/lib/tda2px/m4/release/stw_boards.aem4 ... +# +# +# Archiving tda2px:ipu1_0:release:ipc_lib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/ipc_lite/lib/t +da2px/ipu1_0/release/ipc_lib.aem4 ... +# +# +# +# +# +# Archiving tda2px:ipu1_0:release:stw_fatlib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_lld/fat +lib/lib/tda2px/m4/release/stw_fatlib.aem4 ... +# +# Archiving tda2px:ipu1_0:release:vps_platforms into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/lib/ +tda2px/m4/release/vps_platforms.aem4 ... +# Archiving tda2px:ipu1_0:release:bsp_uart into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/bsp_lld/uart/ +lib/tda2px/m4/release/bsp_uart.aem4 ... +# Archiving tda2px:ipu1_0:release:vpsdrv_baremetal into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/l +ib/tda2px/m4/release/vpsdrv_baremetal.aem4 ... +# +# Archiving tda2px-evm-radar:tda2px:ipu1_0:release:sbl_lib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/b +oot/sbl_auto/lib/tda2px-evm-radar/m4/release/sbl_lib.aem4 ... +# +# +# +# +# +# Archiving tda2px:ipu1_0:release:bsp_mcspi into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/bsp_lld/mcsp +i/lib/tda2px/m4/release/bsp_mcspi.aem4 ... +# +>> ERROR: cannot run D:\PROCESSOR_SDK_RADAR_03_03_00_00\ti_components\cg_tools\windows\ti-cgt-arm_16.9.2.LTS\bin\armacpia.exe - invalid argument mode +gmake[4]: *** [D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_radar/ti/drv/vps/src/devices/obj/tda2px/m4/release/bspdrv_i +mx224Reg_30fps_Linear.oem4] Error 1 +gmake[4]: *** Waiting for unfinished jobs.... +# +# Archiving tda2px-evm-radar:tda2px:ipu1_0:release:vps_examples_utility into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/ +packages/ti/drv/vps/lib/tda2px-evm-radar/m4/release/vps_examples_utility.aem4 ... +# +# +# +# +# +# +# Archiving tda2px:ipu1_0:release:pm_lib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/pm/lib/tda2px/m +4/release/pm_lib.aem4 ... +# Archiving tda2px:ipu1_0:release:pm_lib_optimized into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/pm/li +b/tda2px/m4/release/pm_lib_optimized.aem4 ... +# +# Archiving tda2px-evm-radar:tda2px:ipu1_0:release:vps_boards into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/t +i/drv/vps/lib/tda2px-evm-radar/m4/release/vps_boards.aem4 ... +# Archiving tda2px:ipu1_0:release:vpsdrv into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/lib/tda2px/ +m4/release/vpsdrv.aem4 ... +# Archiving tda2px:ipu1_0:release:stw_platform into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/stw_lld/p +latform/lib/tda2px/m4/release/stw_platform.aem4 ... +# +# +# Archiving tda2px:ipu1_0:release:vpslib into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/vps/lib/tda2px/ +m4/release/vpslib.aem4 ... +# +# +# +# +# +# Archiving tda2px:ipu1_0:release:csl into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/csl/lib/tda2px/m4/rele +ase/ti.csl.aem4 ... +# +# +# Archiving tda2px:ipu1_0:release:pm_hal_optimized into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/pm/li +b/tda2px/m4/release/pm_hal_optimized.aem4 ... +# +# +# Archiving tda2px:ipu1_0:release:pm_hal into D:/PROCESSOR_SDK_RADAR_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/drv/pm/lib/tda2px/m +4/release/pm_hal.aem4 ... +# +gmake[3]: *** [vps_devices] Error 2 +gmake[2]: *** [pdk] Error 2 +gmake[1]: *** [pdk] Error 2 +gmake: *** [depend] Error 2 + + + + + +D:\PROCESSOR_SDK_RADAR_03_03_00_00\vision_sdk\build>gmake -s showconfig + + +D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () +D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () +# +# Build Config is [ tda2px_evm_bios_radar ] +# Build Config file is @ D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/configs/tda2px_evm_bios_radar/cfg.mk +# Build Config .h file is @ D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2px_evm_bios_radar/system_cfg.h +# Build CPUs is @ ipu1_0 ipu1_1 dsp1 eve1 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=yes +# PROC_IPU1_1_INCLUDE=yes +# PROC_IPU2_INCLUDE=no +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=no +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=no +# PROC_EVE3_INCLUDE=no +# PROC_EVE4_INCLUDE=no +# PROC_A15_0_INCLUDE=no +# +# Platform config, +# VSDK_BOARD_TYPE=TDA2PX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda2px-evm +# DUAL_A15_SMP_BIOS=no +# DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# NDK_PROC_TO_USE=ipu1_1 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=yes [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Windows_NT [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=release [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Bios [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=no +# VPE_INCLUDE=no +# CAL_INCLUDE=no +# ISS_INCLUDE=no +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=no +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/apps/src/rtos/opencl +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=no +# +# Log config, +# ENABLE_UART_LOG=yes +# ENABLE_NETWORK_LOG=no +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=no +# +# IPC config, +# WORKQ_INCLUDE=yes +# IPC_LIB_INCLUDE=yes +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=no +# RADAR_INCLUDE=yes +# CPU_IDLE_ENABLED=yes +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb +# CMEM_INCLUDE=no +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=no +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_radarprocess +# +# Use-cases included in build, +# UC_radar_read_fft_write +# +D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () +# +# CPUs that are NOT required but included in config [ tda2px_evm_bios_radar ], +# +# +# CPUs that are required but not included in config [ tda2px_evm_bios_radar ], +# +# +# Edit D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/build/configs/tda2px_evm_bios_radar/cfg.mk to include or exclude CPUs in an application +# + +D:\PROCESSOR_SDK_RADAR_03_03_00_00\vision_sdk\build> + +Hi, Can you remove -j from the build command (Use "gmake -s depend") and try. Regards, Rishabh + +Hi, I have then executed the command once again and was luckily done with no errors. I don't know exactly what was the problem before. But that case was just for the single radar use case (enabled by default was "radar_read_fft_write"). I wanted to add one more use case and i have made the respective changes in uc_cfg.mk file. And now, for "gmake -s -j" command I get various undefined symbol errors as listed: undefined first referenced symbol in file --------- ---------------- ChainsCommon_ar12xxConfig D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_radar/lib/tda2px-evm/m4/release/app_alg_plugins.aem4 ChainsCommon_ar12xxSetIssCaptureParams D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_radar/lib/tda2px-evm/m4/release/app_alg_plugins.aem4 ChainsCommon_ar12xxStart D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_radar/lib/tda2px-evm/m4/release/ap p_alg_plugins.aem4 ChainsCommon_ar12xxStop D:/PROCESSOR_SDK_RADAR_03_03_00_00/vision_sdk/binaries/apps/tda2px_evm_bios_radar/lib/tda2px-evm/m4/release/ap p_alg_plugins.aem4 I don't know where I am wrong. Regards, Varsha + +Hi Varsha, When you call gmake using -j multiple build processes are invoked. Due to this dependencies might not get calculated correctly. This depends on the build machine as well. Similar to previous command you should do a "gmake -s". I would suggest you not to use -j on your PC while building any executable in general. Regards, Rishabh + +Hi Rishabh, For the previous command as well, I retried with the same command "gmake -s -j depend" and it worked for the second time. I think the problem is not with -j option , now i have tried excluding -j as well for command "gmake -s" . But it doesn't work. The undefined symbol errors are for the terms which are in the common directory, which I cannot rename as well. I am not getting whats the exact issue is... Why we cannot extend the number of usecases, whereas it works fine for single usecase? regards, Varsha + +Hi, There are multiple issues here. You should do "gmake --help" to understand the option "-j" and comprehend why the build failed first time and succeeded second time. Also you should build dependencies again when you are making changes to uc_cfg.mk. Best is to do a clean build for both dependencies as well as Vision SDK. Regards, Rishabh + +Hi, I have tried again by doing clean build, but unable to resolve those issues. Attaching the screenshot of the gmake errors. For this attempt, I removed -j option , hence my command is "gmake -s". Can you please help me to figure out these undefined symbol errors. Here, I have added one more usecase(radar_capture_only usecase) with the one which was already present(radar_read_fft_write) in uc_cfg.mk file. Is there any other file which needs to be modified after adding any new usecase? Thanks in advance. Regards, Varsha + +Hi Varsha, There is only use case that is supported on TDA2Px i.e. UC_radar_read_fft_write using network and SD card. UC_radar_capture_only is supported for TDA3xx. Can you let us know what exactly are you trying and what is the setup you have. Regards, Rishabh + +Hi , I am trying to build the already existing usecases present in the usecases folder of radar SDK. My setup is AWR1243 and TDA2px. Among all the usecases, is that the case UC_radar_read_fft_write is only supported for TDA2px and UC_radar_capture_only is the only one supported for TDA3xx ? Thanks & regards, Varsha + +Hi, This is correct. UC_radar_capture_only is not supported on TDA2Px. Only UC_radar_read_fft_write is supported on TDA2Px. Regards, Rishabh + diff --git a/data2/text/range/20001-25000/699738.txt b/data2/text/range/20001-25000/699738.txt new file mode 100644 index 0000000000000000000000000000000000000000..dde0f14f701639e6b0b5c500b211bc575d4f1edd --- /dev/null +++ b/data2/text/range/20001-25000/699738.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: change log output uart 1 to uart3 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PCF8575, PMP, DRA752 Tool/software: Linux in u-boot modified board/ti/dra7xx/mux_data.h and u-boot/arch/arm/dts/dra7-evm-common.dtsi 1 in file board/ti/dra7xx/mux_data.h change /*{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_ctsn.mmc4_dat2*/ /*{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_rtsn.mmc4_dat3*/ to {UART2_CTSN, (M2 | PIN_INPUT_PULLUP| SLEWCONTROL) {UART2_RTSN, (M1 | PIN_INPUT_PULLUP| SLEWCONTROL) 2 u-boot/arch/arm/dts/dra7-evm-common.dtsi:14: change stdout-path = &uart1; to stdout-path = &uart3; uart3 already has log output but kernel stopped In addtition£¬I modified /kernel/omap/arch/arm/boot/dts dra72-evm-common.dtsi stdout-path = &uart1; { aliases { display0 = &hdmi0; sound0 = &sound0; sound1 = &hdmi; }; chosen { stdout-path = &uart3; }; Block some code in dra72-evm.dts about MMC4's part. what is the reason of the question? I found that board-support/linux/arch/arm/configs/ti_sdk_dra7x_release_defconfig changed CONFIG_DEBUG_OMAP2UART1=y 1modfied to 3. make linux£¬CONFIG_DEBUG_OMAP2UART3=y can auto reback CONFIG_DEBUG_OMAP2UART1=y How to fixed it? in u-boot modified board/ti/dra7xx/mux_data.h and u-boot/arch/arm/dts/dra7-evm-common.dtsi£¬ 1¡¢file board/ti/dra7xx/mux_data.h change /*{UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_ctsn.mmc4_dat2*/ /*{UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_rtsn.mmc4_dat3*/ to {UART2_CTSN, (M2 | PIN_INPUT_PULLUP| SLEWCONTROL) {UART2_RTSN, (M1 | PIN_INPUT_PULLUP| SLEWCONTROL) 2¡¢u-boot/arch/arm/dts/dra7-evm-common.dtsi:14: change stdout-path = &uart1; to stdout-path = &uart3; uart3 already has log output £¬but £¬kernel stopped £º In addtition£¬I modified /kernel/omap/arch/arm/boot/dts dra72-evm-common.dtsi£º stdout-path = &uart1; { aliases { display0 = &hdmi0; sound0 = &sound0; sound1 = &hdmi; }; chosen { stdout-path = &uart3; }; Block some code £¨dra72-evm.dts£© about MMC4's part£º what is the reason of the question£¿ I found that board-support/linux/arch/arm/configs/ti_sdk_dra7x_release_defconfig changed CONFIG_DEBUG_OMAP2UART1=y 1modfied to 3. make linux£¬CONFIG_DEBUG_OMAP2UART3=y can auto reback CONFIG_DEBUG_OMAP2UART1=y£¡£¡ How to fixed it£¿ + +Responses: +Part Number: TDA2 Tool/software: Linux Linux ： how to change kernel log output port? how to change the .config uart1 to uart3 ? + +Hi Widic, I merged your threads into one. Can you clarify what exactly is your problem - if I understand correctly you have successfully enabled uart3 logs for both u-boot and kernel, but the kernel stops for some other reason (mmc)? Can you also attach full boot log? Regards, Yordan + +Hi,Yordan, We has the same problem for TDA2x, and I can offer you the full boot log as follows: U-Boot SPL 2016.05-00009-gac1d50feef-dirty (Jun 14 2018 - 16:56:55) DRA752-GP ES1.1 no pinctrl for ddr_1_8v Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00009-gac1d50feef-dirty (Jun 14 2018 - 16:56:55 +0800) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 2 ms (80.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 3553888 bytes read in 174 ms (19.5 MiB/s) 106677 bytes read in 22 ms (4.6 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x363a60 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff0b4 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00105-gc66ba60e1092-dirty (root@G2) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #7 SMP PREEMPT Mon Jun 11 14:56:09 HKT 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES1.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyS2,115200n8 vram=16M root=PARTUUID=80a878a6-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410844K/979968K available (6623K kernel code, 319K rwdata, 2388K rodata, 336K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d502c (9013 kB) [ 0.000000] .init : 0xc08d6000 - 0xc092a000 ( 336 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979f60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000332] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000339] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000793] Console: colour dummy device 80x30 [ 0.000815] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000828] pid_max: default: 32768 minimum: 301 [ 0.000927] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000938] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001481] Initializing cgroup subsys io [ 0.001498] Initializing cgroup subsys memory [ 0.001523] Initializing cgroup subsys devices [ 0.001536] Initializing cgroup subsys freezer [ 0.001547] Initializing cgroup subsys perf_event [ 0.001559] Initializing cgroup subsys pids [ 0.001585] CPU: Testing write buffer coherency: ok [ 0.001783] /cpus/cpu@0 missing clock-frequency property [ 0.001799] /cpus/cpu@1 missing clock-frequency property [ 0.001809] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001841] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080060] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080128] Brought up 2 CPUs [ 0.080141] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080148] CPU: All CPU(s) started in HYP mode. [ 0.080153] CPU: Virtualization extensions available. [ 0.080527] devtmpfs: initialized [ 0.109176] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110167] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313881] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313902] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.318183] pinctrl core: initialized pinctrl subsystem [ 0.319039] NET: Registered protocol family 16 [ 0.319964] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350231] cpuidle: using governor ladder [ 0.380257] cpuidle: using governor menu [ 0.388781] OMAP GPIO hardware version 0.1 [ 0.395297] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411675] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411688] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.421023] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.421033] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.421496] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.421506] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.422084] OMAP DMA hardware revision 0.0 [ 0.461535] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462687] edma 43300000.edma: memcpy is disabled [ 0.467356] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471729] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471905] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472065] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472222] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472511] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472694] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475728] palmas 0-0058: IRQ missing: skipping irq request [ 0.491153] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563494] pcf857x 0-0020: probed [ 0.563740] pcf857x: probe of 0-0021 failed with error -121 [ 0.563898] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.564287] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564492] media: Linux media interface: v0.10 [ 0.564547] Linux video capture interface: v2.00 [ 0.564587] pps_core: LinuxPPS API ver. 1 registered [ 0.564595] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564621] PTP clock support registered [ 0.564669] EDAC MC: Ver: 3.0.0 [ 0.565421] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.565713] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.566045] Advanced Linux Sound Architecture Driver Initialized. [ 0.566881] clocksource: Switched to clocksource arch_sys_counter [ 0.577518] NET: Registered protocol family 2 [ 0.578010] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.578075] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.578200] TCP: Hash tables configured (established 8192 bind 8192) [ 0.578248] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.578279] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578490] NET: Registered protocol family 1 [ 0.578753] RPC: Registered named UNIX socket transport module. [ 0.578762] RPC: Registered udp transport module. [ 0.578769] RPC: Registered tcp transport module. [ 0.578776] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.579769] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.589784] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.590425] NFS: Registering the id_resolver key type [ 0.590461] Key type id_resolver registered [ 0.590469] Key type id_legacy registered [ 0.590523] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.591797] bounce: pool size: 64 pages [ 0.591948] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.591962] io scheduler noop registered [ 0.591974] io scheduler deadline registered [ 0.592007] io scheduler cfq registered (default) [ 0.596948] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.600101] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.600113] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.600146] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.600168] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.630322] dra7-pcie 51000000.pcie_rc: link is not up [ 0.630497] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.630510] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.630520] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.630529] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.630932] PCI: bus0: Fast back to back transfers disabled [ 0.631048] PCI: bus1: Fast back to back transfers enabled [ 0.631131] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.631145] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.631158] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.631385] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.691683] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.695070] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 0.695935] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 0.696768] console [ttyS2] disabled [ 0.696815] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.712309] console [ttyS2] enabled [ 1.717021] [drm] Initialized drm 1.1.0 20060810 [ 1.723048] OMAP DSS rev 6.1 [ 1.726798] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.742468] loop: module loaded [ 1.745979] vmemexp device MAJOR num = 246 [ 1.750134] vmemexp class registered [ 1.753847] /dev/vmemexp device registered [ 1.757981] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.763662] nand: No NAND device found [ 1.767450] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.777372] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.782768] 7 ofpart partitions found on MTD device spi32766.0 [ 1.788649] Creating 7 MTD partitions on "spi32766.0": [ 1.793812] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.799939] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.806267] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.813219] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.819921] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.827315] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.833663] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.841456] libphy: Fixed MDIO Bus: probed [ 1.896916] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.903040] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.913382] libphy: 48485000.mdio: probed [ 1.917456] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.925497] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.934216] cpsw 48484000.ethernet: Detected MACID = 20:c3:8f:4a:59:14 [ 1.940918] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.947912] cpsw 48484000.ethernet: cpsw: Detected MACID = 20:c3:8f:4a:59:15 [ 1.956520] mousedev: PS/2 mouse device common for all mice [ 1.962732] i2c /dev entries driver [ 1.971529] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.977182] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.983567] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.990126] evm_3v3_sw: supplied by sysen1 The kernel has stopped at red place when running! I'm looking forward for your replay！ Regards， Yuting + +Hi Yuting, I have pinged mmc experts. Regards, Yordan + +Hi Yuting, UART is not the issue as you are able to see both u-boot and kernel logs on console. What board is this? your own board or TI EVM? Which SDK and release are you using? According to the u-boot log this is a different part number. dra72-evm-common.dtsi file is not the right one, you have to look at dra7-evm.dts and dra7-evm-common.dtsi file for this board. U-Boot SPL 2016.05-00009-gac1d50feef-dirty (Jun 14 2018 - 16:56:55) DRA752-GP ES1.1 Regards, Vishal + +Hi Vishal, 1.This board is TI TDA2X EVM ,and CPU is DRA752. 2.We are using PROCESSOR_SDK_VISION_03_03_00_00 at linux. In order to change log output uart 1 to uart3, we changed the u-boot and kernel which caused this problem. And log output is normal using uart1, but uart3 has caugth the problem above. Then I will tell you what I have done. First, we modified the u-boot：menuconfig：uart3 used for console , and modified files of board/ti/dra7xx/mux_data.h and u-boot/arch/arm/dts/dra7-evm-common.dtsi， 1、board/ti/dra7xx/mux_data.h modified {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_ctsn.mmc4_dat2*/ {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /*uart2_rtsn.mmc4_dat3*/ as {UART2_CTSN, (M2 | PIN_INPUT_PULLUP| SLEWCONTROL) {UART2_RTSN, (M1 | PIN_INPUT_PULLUP| SLEWCONTROL) 2、u-boot/arch/arm/dts/dra7-evm-common.dtsi: modified stdout-path = &uart1; as stdout-path = &uart3; Then we modified the kernel： menuconfig：uart3 used for console ，and modified the files of /arch/arm/configs/ti_sdk_dra7x_release_defconfig， dra7-evm-common.dtsi and dra7-evm.dts. 1、ti_sdk_dra7x_release_defconfig modified CONFIG_DEBUG_OMAP2UART1=y as CONFIG_DEBUG_OMAP2UART3=y 2、dra7-evm-common.dtsi modified stdout-path = &uart1; as stdout-path = &uart3; 3、dra7-evm.dts modified 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /*uart2_ctsn.mmc4_dat2 */ 0x3fC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ as 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE2) 0x3fc (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) Finally，we modified the uenv.txt args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 elevator=noop root=PARTUUID=${uuid} rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=128M@0xB0000000 rootfstype=ext4 snd.slots_reserved=1,1" modified console=ttyO0 as console=ttyS2 After that，the problem is showing out. + +Hi, If this is a TI EVM why are you changing the console from UART1 to UART3? Also, since you are changing pinmux of mmc4 to be used as uart3 pins, try disabling mmc4 from dra7-evm.dts Change status of mmc4 to disabled and test. &mmc4 { status = "okay"; &mmc4 { status = "disabled"; Regards, Vishal + +Hi,Vishal, we want to use UART1 as another function,so we have done some changes for the TI EVM. And I have tried disabling mmc4 from dra7-evm.dts, also, Change status of mmc4 to disabled .But the problem is the same. Regards, Yuting + +Hi Yuting, -1- Do the below changes to Kernel and share the logs, -- Enable CONFIG_MMC_DEBUG option in Kernel config -- Append "loglevel=9" to args_mmc of uenv.txt -2- Check the H/W modifications and make sure you have not done any unwanted changes to board other than UART. Regards, Vishal + +Hi Yuting, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/20001-25000/706203.txt b/data2/text/range/20001-25000/706203.txt new file mode 100644 index 0000000000000000000000000000000000000000..a0a665e53d4188a95b19bc1eae2149d175c6f059 --- /dev/null +++ b/data2/text/range/20001-25000/706203.txt @@ -0,0 +1,618 @@ +Ticket Name: RTOS/TDA2: How to feed test video to tidl_OD from camera? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi TI Team. How to feed test video to tidl_OD from camera? In PROCESSOR_SDK_VISION_03_03_00_00, there is an use case for TI deep learning. It analysis the input data from file and do the object detection. How to change the input data from file to camera? chains_tidlOD.txt UseCase: chains_tidlOD + +Capture -> Dup_capture + +Dup_capture -> Merge + +Dup_capture -> Alg_tidlpreproc (A15) + +Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) +Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) + +Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) +Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) +Alg_tidl_Eve3 (EVE3) -> Merge_OD (DSP1) +Alg_tidl_Eve4 (EVE4) -> Merge_OD (DSP1) +Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge + +Merge -> Sync -> Alg_ObjectDraw -> Display + +GrpxSrc -> Display_Grpx + chains_tidlOD.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI’S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_tidlOD_priv.h" +#include +#include +#include +#include "itidl_ti.h" +#include + +/******************************************************************************* + * DEFINES + ******************************************************************************* + */ +#define TIDL_OD_INPUT_WIDTH (768) +#define TIDL_OD_INPUT_HEIGHT (320) + +#define DEC_OUT_WIDTH (768) +#define DEC_OUT_HEIGHT (320) + +#define TIDL_OD_DISPLAY_WIDTH (TIDL_OD_INPUT_WIDTH*2) +#define TIDL_OD_DISPLAY_HEIGHT (TIDL_OD_INPUT_HEIGHT*2) +#define TIDL_OD_DISPLAY_STARTX (1920 - TIDL_OD_DISPLAY_WIDTH)/2 +#define TIDL_OD_DISPLAY_STARTY (64) + +/* Num of TIDL processing pipelines */ +#define NUM_PIPELINES (4) + +/* Semantic Segmenation input fps */ +/* This should be based on the TIDL performance on 4 EVEs */ +/* It should be less than the cumulative TIDL performance on 4 EVEs */ +/* For eg if each TIDL is giving performace of 3 fps then it should be less than (4 x 3)*/ +#define TIDL_OD_FPS_OPPHIGH (NUM_PIPELINES * 6) + +#define TIDL_OD_FPS_OPPNOM (NUM_PIPELINES * 5) + +#define OPP_HIGH_FREQUENCY (650U) + +/* Palettes used for color look up */ +#define MAX_NUM_PALETTE (10) + +#define SYNC_DELTA (10) + +/* The threshold should be more than the TIDL process time */ +/* For eg. if TIDL process time is 400 msec then this should be more than 400 msec */ +#define SYNC_THRESHOLD (600) + +/* OCMC */ +#define OCMC_1_BASE_ADDRESS (0x40300000U) +#define OCMC_1_SIZE (512 * 1024) + +#define OCMC_2_BASE_ADDRESS (0x40400000U) +#define OCMC_2_SIZE (1024 * 1024) + +#define OCMC_3_BASE_ADDRESS (0x40500000U) +#define OCMC_3_SIZE (1024 * 1024) + +#define NET_BIN_FILE "NET_OD.BIN" +#define PARAMS_BIN_FILE "PRM_OD.BIN" + + +/* DSP */ +#define TIDL_COREID_DSP1 (1) +#define TIDL_LAYER_GROUPID_DSP1 (2) +#define TIDL_COREID_DSP2 (1) +#define TIDL_LAYER_GROUPID_DSP2 (2) + +/* EVE */ +#define TIDL_COREID_EVE1 (1) +#define TIDL_LAYER_GROUPID_EVE1 (1) +#define TIDL_COREID_EVE2 (1) +#define TIDL_LAYER_GROUPID_EVE2 (1) +#define TIDL_COREID_EVE3 (1) +#define TIDL_LAYER_GROUPID_EVE3 (1) +#define TIDL_COREID_EVE4 (1) +#define TIDL_LAYER_GROUPID_EVE4 (1) + +/* Graphics window is just below the video window */ +#define GRAPHICS_WIDTH (1920) +#define GRAPHICS_HEIGHT (1080 - TIDL_OD_DISPLAY_STARTY - TIDL_OD_DISPLAY_HEIGHT) + +/******************************************************************************* + * STRUCTURES + ******************************************************************************* + */ + +/** + ******************************************************************************* + * + * \brief chains_tidlODAppObj + * + * This structure contains all the LinksId's and create Params. + * The same is passed to all create, start, stop functions. + * + ******************************************************************************* +*/ +typedef struct +{ + chains_tidlODObj ucObj; + UInt32 displayWidth; + UInt32 displayHeight; + Chains_Ctrl *chainsCfg; + TIDL_CreateParams *pAlgCreateParams; + +} chains_tidlODAppObj; + +chains_tidlODAppObj gChainsObjtidlOD; + +/******************************************************************************* + * GLOBALS + ******************************************************************************* + */ +static char tidlODRunTimeMenu[] = { +"\n " +"\n ====================" +"\n Chains Run-time Menu" +"\n ====================" +"\n " +"\n 0: Stop Chain" +"\n " +"\n 1: Pause Chain" +"\n 2: Resume Chain" +"\n " +"\n p: Print Statistics" +"\n " +"\n Enter Choice: " +"\n " +}; + +static Void chains_tidlOD_SetVPEPrms( + VpeLink_CreateParams *pPrm, + UInt32 numCh, + UInt32 displayWidth, + UInt32 displayHeight, + UInt32 inputWidth, + UInt32 inputHeight + ) +{ + UInt16 chId; + + pPrm->enableOut[0] = TRUE; + + for(chId = 0; chId < numCh; chId++) + { + pPrm->chParams[chId].outParams[0].numBufsPerCh = 6; + + pPrm->chParams[chId].outParams[0].width = displayWidth; + pPrm->chParams[chId].outParams[0].height = displayHeight; + pPrm->chParams[chId].outParams[0].dataFormat = SYSTEM_DF_YUV420SP_UV; + + pPrm->chParams[chId].scCfg.bypass = FALSE; + pPrm->chParams[chId].scCfg.nonLinear = FALSE; + pPrm->chParams[chId].scCfg.stripSize = 0; + + pPrm->chParams[chId].scCropCfg.cropStartX = 32; + pPrm->chParams[chId].scCropCfg.cropStartY = 24; + pPrm->chParams[chId].scCropCfg.cropWidth = inputWidth-32; + pPrm->chParams[chId].scCropCfg.cropHeight = inputHeight-24; + } +} + +static Void tidlODInit(chains_tidlODAppObj *pObj) +{ + /* Read the network file */ + Chains_tidlReadNet(&pObj->pAlgCreateParams->net, NET_BIN_FILE); + + /* Allocate memory for the net */ + Chains_tidlAllocNetParamsMem(&pObj->pAlgCreateParams->net); + + /* Fill the new parameters */ + Chains_tidlFillNetParamsMem(&pObj->pAlgCreateParams->net, PARAMS_BIN_FILE); + + /* Init all the 3 instances of the OCMC */ + Utils_cbufOcmcInit(UTILS_OCMC_RAM1); + Utils_cbufOcmcInit(UTILS_OCMC_RAM2); + Utils_cbufOcmcInit(UTILS_OCMC_RAM3); +} + + +static Void tidlODDeInit(chains_tidlODAppObj *pObj) +{ + /* Free the net memories */ + Chains_tidlFreeNetParamsMem(&pObj->pAlgCreateParams->net); +} + +/** + ******************************************************************************* + * + * \brief Start the capture display Links + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] chains_tidlODAppObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_tidlOD_StartApp(chains_tidlODAppObj *pObj) +{ + Chains_memPrintHeapStatus(); + ChainsCommon_StartDisplayDevice(pObj->chainsCfg->displayType); + chains_tidlOD_Start(&pObj->ucObj); + Chains_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Delete the capture display Links + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlODAppObj + * + ******************************************************************************* +*/ +Void chains_tidlOD_StopAndDelete(chains_tidlODAppObj *pObj) +{ + chains_tidlOD_Stop(&pObj->ucObj); + chains_tidlOD_Delete(&pObj->ucObj); + + ChainsCommon_StopDisplayCtrl(); + ChainsCommon_StopDisplayDevice(pObj->chainsCfg->displayType); + + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + Chains_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} + + +static Void ChainsCommon_tidlODSetObjectDrawPrms( + AlgorithmLink_ObjectDrawCreateParams *pOdDrawPrm) +{ + + pOdDrawPrm->imgFrameStartX = 0; + pOdDrawPrm->imgFrameStartY = 0; + pOdDrawPrm->imgFrameWidth = TIDL_OD_INPUT_WIDTH; + pOdDrawPrm->imgFrameHeight = TIDL_OD_INPUT_HEIGHT; + pOdDrawPrm->numOutBuffers = 3; + pOdDrawPrm->objectRectThickness = 1; + pOdDrawPrm->objectTsrDrawTrafficSigns = FALSE; + pOdDrawPrm->laneThickness = 2; + pOdDrawPrm->laneDrawLines = FALSE; + pOdDrawPrm->laneScaleX = 2.0; + pOdDrawPrm->laneScaleY = 2.0; + pOdDrawPrm->drawOption = ALGORITHM_LINK_OBJECT_DETECT_DRAW_ALL; + pOdDrawPrm->numDrawAlg = 0; + pOdDrawPrm->scoreThreshold = 0.4; + pOdDrawPrm->drawAlgId[pOdDrawPrm->numDrawAlg] + = ALGORITHM_LINK_OBJECT_DETECT_DRAW_ALG_TIDL_OD; + pOdDrawPrm->numDrawAlg++; +} +/** + ******************************************************************************* + * + * \brief Semantic Segmentation + * + * This function configure, creates, link various links to establish + * usecase. + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_tidlOD_SetAppPrms(chains_tidlODObj *pUcObj, Void *appObj) +{ + UInt32 frequency = 0; + UInt32 FileReadFps = TIDL_OD_FPS_OPPNOM; + + chains_tidlODAppObj *pObj = (chains_tidlODAppObj*)appObj; + + UInt32 startX, startY; + + startX = CAPTURE_FRAME_STARTX; + startY = CAPTURE_FRAME_STARTY; + pObj->captureOutWidth = CAPTURE_FRAME_WIDTH; + pObj->captureOutHeight = CAPTURE_FRAME_HEIGHT; + + frequency = Utils_getClkHz(UTILS_CLK_ID_EVE) / 1000000U; + /* + * Set the framerate according to the frequency + */ + if (frequency >= OPP_HIGH_FREQUENCY) + { + FileReadFps = TIDL_OD_FPS_OPPHIGH; + } + else + { + FileReadFps = TIDL_OD_FPS_OPPNOM; + } + + ChainsCommon_GetDisplayWidthHeight( + pObj->chainsCfg->displayType, + &pObj->displayWidth, + &pObj->displayHeight); + + ChainsCommon_SingleCam_SetCapturePrms(&pUcObj->CapturePrm, + CAPTURE_FRAME_WIDTH, + CAPTURE_FRAME_HEIGHT, + pObj->captureOutWidth, + pObj->captureOutHeight, + pObj->chainsCfg->captureSrc + ); + + //ChainsCommon_SetFileRxPrms( + // &pUcObj->NullSourcePrm, + // &pUcObj->DecodePrm, + // DEC_OUT_WIDTH, + // DEC_OUT_HEIGHT, + // 1, /* numCh */ + // FileReadFps); /* fps */ + + /* SetFileRxPrm sets the file open to inHeader and inData overriding the same*/ + strncpy(pUcObj->NullSourcePrm.channelParams[0].nameDataFile, "inData_OD", 260); + strncpy(pUcObj->NullSourcePrm.channelParams[0].nameIndexFile, "inHeader_OD", 260); + + chains_tidlOD_SetVPEPrms( + &pUcObj->VPEPrm, + 1, + DEC_OUT_WIDTH, + DEC_OUT_HEIGHT, + DEC_OUT_WIDTH, + DEC_OUT_HEIGHT + ); + + /* YUV420SP to planar RGB conversion */ + pUcObj->Alg_tidlpreprocPrm.outPad = TIDL_MAX_PAD_SIZE; + pUcObj->Alg_tidlpreprocPrm.numOutputQueues = NUM_PIPELINES; + pUcObj->Alg_tidlpreprocPrm.procMode = TIDLPREPROC_LINK_PROCMODE_Y2R; + + /* TIDL on EVE1 */ + pUcObj->Alg_tidl_Eve1Prm.cacheInvInBuf = 0; + pUcObj->Alg_tidl_Eve1Prm.cacheWbOutBuf = 0; + pUcObj->Alg_tidl_Eve1Prm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_Eve1Prm.curCoreId = TIDL_COREID_EVE1; + pUcObj->Alg_tidl_Eve1Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE1; + pUcObj->Alg_tidl_Eve1Prm.ocmcAddr = OCMC_3_BASE_ADDRESS; + + /* TIDL on EVE2 */ + pUcObj->Alg_tidl_Eve2Prm.cacheInvInBuf = 0; + pUcObj->Alg_tidl_Eve2Prm.cacheWbOutBuf = 0; + pUcObj->Alg_tidl_Eve2Prm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_Eve2Prm.curCoreId = TIDL_COREID_EVE2; + pUcObj->Alg_tidl_Eve2Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE2; + pUcObj->Alg_tidl_Eve2Prm.ocmcAddr = OCMC_3_BASE_ADDRESS + (OCMC_3_SIZE/2); + + /* TIDL on EVE3 */ + pUcObj->Alg_tidl_Eve3Prm.cacheInvInBuf = 0; + pUcObj->Alg_tidl_Eve3Prm.cacheWbOutBuf = 0; + pUcObj->Alg_tidl_Eve3Prm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_Eve3Prm.curCoreId = TIDL_COREID_EVE3; + pUcObj->Alg_tidl_Eve3Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE3; + pUcObj->Alg_tidl_Eve3Prm.ocmcAddr = OCMC_1_BASE_ADDRESS; + + /* TIDL on EVE4 */ + pUcObj->Alg_tidl_Eve4Prm.cacheInvInBuf = 0; + pUcObj->Alg_tidl_Eve4Prm.cacheWbOutBuf = 0; + pUcObj->Alg_tidl_Eve4Prm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_Eve4Prm.curCoreId = TIDL_COREID_EVE4; + pUcObj->Alg_tidl_Eve4Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE4; + pUcObj->Alg_tidl_Eve4Prm.ocmcAddr = OCMC_2_BASE_ADDRESS; + + /* TIDL on DSP */ + pUcObj->Alg_tidl_DspPrm.cacheInvInBuf = 1; + pUcObj->Alg_tidl_DspPrm.cacheWbOutBuf = 1; + pUcObj->Alg_tidl_DspPrm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_DspPrm.curCoreId = TIDL_COREID_DSP1; + pUcObj->Alg_tidl_DspPrm.currLayersGroupId = TIDL_LAYER_GROUPID_DSP1; + + /* Sync parameters */ + pUcObj->SyncPrm.syncDelta = SYNC_DELTA; + pUcObj->SyncPrm.syncThreshold = SYNC_THRESHOLD; + + ChainsCommon_tidlODSetObjectDrawPrms(&pUcObj->Alg_ObjectDrawPrm); + ChainsCommon_SetDisplayPrms( + &pUcObj->DisplayPrm, + NULL, + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight); + + pUcObj->DisplayPrm.rtParams.tarWidth = TIDL_OD_DISPLAY_WIDTH; + pUcObj->DisplayPrm.rtParams.tarHeight = TIDL_OD_DISPLAY_HEIGHT; + pUcObj->DisplayPrm.rtParams.posX = TIDL_OD_DISPLAY_STARTX; + pUcObj->DisplayPrm.rtParams.posY = TIDL_OD_DISPLAY_STARTY; + pUcObj->DisplayPrm.displayId = DISPLAY_LINK_INST_DSS_VID1; + + ChainsCommon_StartDisplayCtrl( + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight); + + /* Graphics source parameters */ + pUcObj->GrpxSrcPrm.grpxBufInfo.dataFormat = SYSTEM_DF_BGR16_565; + pUcObj->GrpxSrcPrm.grpxBufInfo.width = GRAPHICS_WIDTH; + pUcObj->GrpxSrcPrm.grpxBufInfo.height = GRAPHICS_HEIGHT; + pUcObj->GrpxSrcPrm.tidlOdOverlay = TRUE; + pUcObj->GrpxSrcPrm.captureWidth = TIDL_OD_INPUT_WIDTH; + pUcObj->GrpxSrcPrm.captureHeight = TIDL_OD_INPUT_HEIGHT; + + /* Graphics Display parameters */ + /* Graphics display will be at the end of the video display window */ + pUcObj->Display_GrpxPrm.rtParams.tarWidth = GRAPHICS_WIDTH; + pUcObj->Display_GrpxPrm.rtParams.tarHeight = GRAPHICS_HEIGHT; + pUcObj->Display_GrpxPrm.rtParams.posX = 0; + pUcObj->Display_GrpxPrm.rtParams.posY = \ + (pUcObj->DisplayPrm.rtParams.posY + TIDL_OD_DISPLAY_HEIGHT); + pUcObj->Display_GrpxPrm.displayId = DISPLAY_LINK_INST_DSS_GFX1; +} + +static Void pausetidlOD(chains_tidlODAppObj *pObj) +{ + Int32 status; + + status = System_linkControl( + pObj->ucObj.NullSourceLinkID, + NULL_SRC_LINK_CMD_PAUSE, + NULL, + 0, + TRUE); + UTILS_assert (SYSTEM_LINK_STATUS_SOK == status); +} + +static Void resumetidlOD(chains_tidlODAppObj *pObj) +{ + Int32 status; + + status = System_linkControl( + pObj->ucObj.NullSourceLinkID, + NULL_SRC_LINK_CMD_RESUME, + NULL, + 0, + TRUE); + UTILS_assert (SYSTEM_LINK_STATUS_SOK == status); +} + +/** + ******************************************************************************* + * + * \brief Semantic Segmentation + * + * This function configure, creates, link various links to establish + * usecase. + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void Chains_tidlOD(Chains_Ctrl *chainsCfg) +{ + char ch; + Bool done = FALSE; + + gChainsObjtidlOD.chainsCfg = chainsCfg; + + /* Allocate the Algorithm create structure */ + gChainsObjtidlOD.pAlgCreateParams = ChainsCommon_Osal_memAlloc( + sizeof(TIDL_CreateParams), + 32); + UTILS_assert(NULL != gChainsObjtidlOD.pAlgCreateParams); + + /* Semantic Segmentation Init */ + tidlODInit(&gChainsObjtidlOD); + + chains_tidlOD_Create(&gChainsObjtidlOD.ucObj, &gChainsObjtidlOD); + + chains_tidlOD_StartApp(&gChainsObjtidlOD); + + do + { + Vps_printf(tidlODRunTimeMenu); + ch = Chains_readChar(); + + switch(ch) + { + case '0': + done = TRUE; + break; + + case '1': + pausetidlOD(&gChainsObjtidlOD); + break; + + case '2': + resumetidlOD(&gChainsObjtidlOD); + break; + + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + chains_tidlOD_printStatistics(&gChainsObjtidlOD.ucObj); + break; + + default: + break; + } + }while(FALSE == done); + + chains_tidlOD_StopAndDelete(&gChainsObjtidlOD); + + /* Semantic Segmentation DeInit */ + tidlODDeInit(&gChainsObjtidlOD); + + /* Free the Algorithm create structure */ + ChainsCommon_Osal_memFree( + gChainsObjtidlOD.pAlgCreateParams, + sizeof(TIDL_CreateParams)); +} + If you have any question please let me know, Thanks, Best Regards, Hacker Hsu, 0952067531, + +Responses: +Hi Hacker Hsu, TI TIDL OD is validated only with pre-trained videos However if you want to use capture from camera make sure it outputs RGB data In attached .c file, comment out inData_OD & inHeader_OD file reading from SD card (actual trained input files for TIDL_OD usecase) Refer below for training CNN network with your dataset github.com/.../caffe-jacinto Regrads Surya + diff --git a/data2/text/range/20001-25000/709083.txt b/data2/text/range/20001-25000/709083.txt new file mode 100644 index 0000000000000000000000000000000000000000..e0db5af047a0317abdf05a9bf99524e7bf4b479b --- /dev/null +++ b/data2/text/range/20001-25000/709083.txt @@ -0,0 +1,654 @@ +Ticket Name: RTOS/TDA2: How can setup 1ms timer at use case? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Sir, We application need use 1ms timer. I reference CSL(chip support library) sample code of SDK v3.3 ($SDK\ti_components\drivers\pdk_01_09_00_17\packages\ti\csl\example\timer\timer_app\main_m4.c) and try to same setting at use case. But I found some problem as below: 1. When use case setup timer to call Intc_Init() API that will occurs dead lock. (UART console stop print message) 2. Timer interrupt not generate after disable Intc_Init() to avoid dead lock(1st problem). Could you please advice me how to setup timer? Have any document or sample code can reference? Thanks for your support. main_m4(TI SDK timer sample code).c /* + * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + +/** + * \file main_m4.c + * + * \brief This file demonstrates TIMER dal. + * +**/ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ +#include +#include "stdint.h" +#include "stdio.h" +#include +#include +#include "sample.h" +#include +#include +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +#include +#endif + +/* ========================================================================== */ +/* Macros & Typedefs */ +/* ========================================================================== */ +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +uint32_t INP_CLK_FREQ = 20000000U; +uint32_t TIMER_INITIAL_COUNT = 0U; +uint32_t TIMER_RLD_COUNT = 0U; +void Timer_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val); +#else +#define TIMER_INITIAL_COUNT (0xFFF00000U) +#define TIMER_RLD_COUNT (0xFFF00000U) +#endif + +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +uint32_t irq_count = CSL_IPU_IRQ_XBAR_COUNT; +uint32_t uartBaseAddr = CSL_MPU_UART3_REGS; +#endif +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) +uint32_t irq_count = CSL_IPU1_IRQ_XBAR_COUNT; +uint32_t uartBaseAddr = SOC_UART1_BASE; +#endif +#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) +uint32_t irq_count = CSL_IPU1_IRQ_XBAR_COUNT; +uint32_t uartBaseAddr = SOC_UART3_BASE; +#endif + +/* ========================================================================== */ +/* Internal Varialbes Definitions */ +/* ========================================================================== */ +static volatile uint32_t gCntValue = 10; +static volatile uint32_t gIsrSemaphore = 0; +static volatile uint32_t gXbarInst = 1; +static volatile uint32_t gNumSuccess = 0; + +/* ========================================================================== */ +/* Internal Function Declarations */ +/* ========================================================================== */ +static void TimerPRCMConfigure(void); +static void TimerIntcInit(void); +static void TimerIntcDeInit(void); +static void TimerSetUp(void); +static void TimerIsr(void *handle); +static void TimerRun(void); + +/* ========================================================================== */ +/* Function Definitions */ +/* ========================================================================== */ +void padConfig_prcmEnable() +{ +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) + /*Pad configurations */ + Board_initCfg boardCfg; + boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_UART_STDIO | + BOARD_INIT_MODULE_CLOCK | BOARD_INIT_PINMUX_CONFIG; + Board_init(boardCfg); +#endif +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) + /*Pad configurations */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_RXD,0x00040000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_TXD,0x00000000); + /* Initialize the UART Instance */ + UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY, + UART_16x_MODE); +#endif +#if defined (SOC_TDA3XX) || defined (SOC_DRA78x) + /*Pad configurations */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_SCLK,0x00040001); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_CS0,0x00000001); + /* Initialize the UART Instance */ + UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY, + UART_16x_MODE); +#endif +} + +int main(void) +{ + /* Do Pad Config for UART */ + padConfig_prcmEnable(); + + /*Set PRCM for Timer4 */ + /*This is done in SBL, adding here to make the app standalone */ + TimerPRCMConfigure(); + +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) + /*Set the timer reload count value */ + Timer_val(INP_CLK_FREQ, 50000U,1U); +#endif + + UARTConfigPuts(uartBaseAddr,"\nTimer Application Running", -1); + + /* Run the Timer irq_count times, + * increment gXbarInst in each iteration */ + for (gXbarInst = 1; gXbarInst <= irq_count; gXbarInst++) + { + TimerRun(); + } + + if (gNumSuccess == irq_count) + { + UARTConfigPuts(uartBaseAddr,"\nAll Xbar instances for M4 are verified successfully", -1); + } + return 0; +} + +static void TimerRun(void) +{ + /* Register Timer4 interrupts on to INTC */ + TimerIntcInit(); + + /* Perform the necessary configurations for Timer4 */ + TimerSetUp(); + + /* Enable the Timer4 interrupts */ + TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); + + /* Start the Timer */ + TIMEREnable(SOC_TIMER4_BASE); + + UARTConfigPuts(uartBaseAddr,"\ncntValue:", -1); + + while (gCntValue) + { + if (gIsrSemaphore) + { + gIsrSemaphore--; + UARTConfigPuts(uartBaseAddr," ", -1); + UARTConfigPutNum(uartBaseAddr,(int32_t)gCntValue); + } + } + + /* Stop the Timer */ + TIMERDisable(SOC_TIMER4_BASE); + + if (gCntValue == 0) + { + UARTConfigPuts(uartBaseAddr,"\n|RESULT|SUCCESS|", -1); + } + else + { + UARTConfigPuts(uartBaseAddr,"\n|RESULT|FAIL|", -1); + } + + /* Unregister Timer4 interrupts */ + TimerIntcDeInit(); +} + +/* +** Do the necessary Timer configurations on to INTC. +*/ +static void TimerIntcInit(void) +{ + CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst,CSL_XBAR_TIMER4_IRQ); + + UARTConfigPuts(uartBaseAddr,"\nXBar is sucessfully connected to inst:", -1); + UARTConfigPutNum(uartBaseAddr,(int32_t)gXbarInst); + + /* Initialize the interrupt control */ + Intc_Init(); + + /* Enable the interrupt */ + Intc_IntEnable(0); + + /* Registering TimerIsr */ + Intc_IntRegister(intrM4[gXbarInst - 1], (IntrFuncPtr) TimerIsr, NULL); + + /* Set the priority */ + Intc_IntPrioritySet(intrM4[gXbarInst - 1], 1, 0); + + /* Enable the system interrupt */ + Intc_SystemEnable(intrM4[gXbarInst - 1]); +} + +/* +** Disable the interrupt configurations on INTC. +*/ +static void TimerIntcDeInit(void) +{ + /* Restore the initial state of gCntValue */ + gCntValue = 10; + + /* Disconnect the XBar */ + CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst,CSL_XBAR_IRQ_MIN); + + /* Disable the timer interrupt */ + Intc_SystemDisable(intrM4[gXbarInst - 1]); + + /* Unregister the interrupt */ + Intc_IntUnregister(intrM4[gXbarInst - 1]); +} + +/* +** Setup the timer for one-shot and compare mode. +*/ +static void TimerSetUp(void) +{ + /*Reset the timer module */ + TIMERReset(SOC_TIMER4_BASE); + + /* Enable free run in emulation mode */ + TIMEREmuModeConfigure(SOC_TIMER4_BASE, TIMER_FREE); + + /* Load the counter with the initial count value */ + TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT); + + /* Load the load register with the reload count value */ + TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT); + + /* Configure the Timer for Auto-reload and compare mode */ + TIMERModeConfigure(SOC_TIMER4_BASE, TIMER_AUTORLD_NOCMP_ENABLE); + + /* Configure the posted mode of TIMER */ + TIMERPostedModeConfig(SOC_TIMER4_BASE, TIMER_NONPOSTED); + + /* Configure the read mode of TIMER */ + TIMERReadModeConfig(SOC_TIMER4_BASE, TIMER_READ_MODE_NONPOSTED); +} + +/* +** Timer interrupt service routine. This will send a character to serial +** console. +*/ +static void TimerIsr(void *handle) +{ + /* Disable the Timer interrupts */ + TIMERIntDisable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); + + /* Clear the status of the interrupt flags */ + TIMERIntStatusClear(SOC_TIMER4_BASE, TIMER_INT_OVF_IT_FLAG); + + gIsrSemaphore++; + gCntValue--; + + if (gCntValue == 0) + { + UARTConfigPuts(uartBaseAddr," ", -1); + UARTConfigPutNum(uartBaseAddr,(int32_t) (gCntValue)); + gIsrSemaphore = 0; + gNumSuccess++; + } + + /* Enable the Timer interrupts */ + TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); +} + +/* +** Timer4 PRCM configuration. This will explicitly enable the Timer4 module. +*/ +static void TimerPRCMConfigure(void) +{ + HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_TIMER4_CLKCTRL, 0x2); + + while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE + + CM_L4PER_TIMER4_CLKCTRL) & (0x00030000)) != 0x0) ; +} + +/* +** This function is used to find the timer count value +** required for the provided delay +** inp_clk is the input clock source of the timer. +** time unit is always micro seconds. +** prescl_val defines the timer prescale value. +*/ +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +void Timer_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val) +{ + uint32_t divisor = 1000000U, count = 0U; + + divisor = divisor * prescl_val; + count = (inp_clk / divisor) * delay; + if(count <= 0xffffffffU) + { + TIMER_INITIAL_COUNT = 0xffffffff - count; + TIMER_RLD_COUNT = 0xffffffff - count; + } + else + { + TIMER_INITIAL_COUNT = 0U; + TIMER_RLD_COUNT = 0U; + } +} +#endif + +/********************************* End of file ******************************/ + Test_UseCase_Timer_Sample_Code.c if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +uint32_t INP_CLK_FREQ = 20000000U; +uint32_t TIMER_INITIAL_COUNT = 0U; +uint32_t TIMER_RLD_COUNT = 0U; +void Timer2_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val); +#else +#define TIMER_INITIAL_COUNT (0xFFF00000U) +#define TIMER_RLD_COUNT (0xFFF00000U) +#endif + +void Set_Timer4(void); +void Timer4PRCMConfigure(void); +void Timer4IntcInit(void); +void Timer4IntcDeInit(void); +void Timer4SetUp(void); +void Timer4Isr(void *handle); +void Timer4Run(void); + +void Chains_Warning_Test(void) +{ + char ch; + Bool done; + UInt32 start, end, diff; + + done = FALSE; + + Set_Timer4(); + + while(!done) + { + Chains_showMainMenu(gChains_WarningTestMenu); + + ch = Chains_readChar(); + Vps_printf(" \r\n"); + switch(ch) + { + case '1': + /* Get start ticks */ + start = BspOsal_getCurTimeInMsec(); + Vps_printf("Start tick = %d",start); + break; + + case '2': + /* Get start ticks */ + end = BspOsal_getCurTimeInMsec(); + Vps_printf("end tick = %d",end); + diff = end - start; + Vps_printf("Time duration = %d ms",diff); + break; + + case '0': + done = TRUE; + break; + } + } +} + +void Set_Timer4(void) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U); + + Vps_printf(" Timer4PRCMConfigure()\r\n");BspOsal_sleep((UInt32) 500U); + Timer4PRCMConfigure(); + +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) + /*Set the timer reload count value */ + Timer2_val(INP_CLK_FREQ, 50000U,1U); +#endif + + Timer4Run(); +} + +void Timer4PRCMConfigure(void) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U); + + HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_TIMER4_CLKCTRL, 0x2); + + while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE + + CM_L4PER_TIMER4_CLKCTRL) & (0x00030000)) != 0x0) ; +} + +void Timer4Run(void) +{ +Uint32 Timer_count = 0; +Uint32 Timer_count_Update_Interval = 0; + + Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U); + + Vps_printf(" Register Timer4 interrupts on to INTC.\r\n");BspOsal_sleep((UInt32) 500U); + /* Register Timer2 interrupts on to INTC */ + Timer4IntcInit(); + + Vps_printf(" Perform the necessary configurations for Timer2.\r\n");BspOsal_sleep((UInt32) 500U); + /* Perform the necessary configurations for Timer2 */ + Timer4SetUp(); + + Vps_printf(" Enable the Timer2 interrupts.\r\n");BspOsal_sleep((UInt32) 500U); + /* Enable the Timer2 interrupts */ + TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); + + Vps_printf(" Start the Timer.\r\n");BspOsal_sleep((UInt32) 500U); + /* Start the Timer */ + TIMEREnable(SOC_TIMER4_BASE); + + Vps_printf(" Enter while loop.\r\n");BspOsal_sleep((UInt32) 500U); + + Vps_printf("Current TC = %d",BspOsal_getCurTimeInMsec() / 1000); + Timer_count = TIMERCounterGet(SOC_TIMER4_BASE); + Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count);BspOsal_sleep((UInt32) 500U); + + while (gCntValue_T2) + { + Vps_printf("Current TC = %d",BspOsal_getCurTimeInMsec() / 1000); + Timer_count = TIMERCounterGet(SOC_TIMER4_BASE); + Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count); + if(Timer_count_Update_Interval < (BspOsal_getCurTimeInMsec() / 1000)) + { + Timer_count_Update_Interval++; + Timer_count = TIMERCounterGet(SOC_TIMER4_BASE); + Vps_printf("%d sec TC = %d",Timer_count_Update_Interval, Timer_count); + } + + if (gIsrSemaphore_T2) + { + gIsrSemaphore_T2--; + Vps_printf(" gIsrSemaphore_T2 = %d.\r\n",gIsrSemaphore_T2);//BspOsal_sleep((UInt32) 500U); + + } + } + + Vps_printf(" TIMERDisable().\r\n");BspOsal_sleep((UInt32) 500U); + /* Stop the Timer */ + TIMERDisable(SOC_TIMER4_BASE); + + Vps_printf(" TimerIntcDeInit().\r\n");BspOsal_sleep((UInt32) 500U); + /* Unregister Timer2 interrupts */ + Timer4IntcDeInit(); + +} + +/* +** Do the necessary Timer configurations on to INTC. +*/ +void Timer4IntcInit(void) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U); + + Vps_printf(" Set XBar for Timer4.\r\n");BspOsal_sleep((UInt32) 500U); + CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst_T2,CSL_XBAR_TIMER4_IRQ); + + Vps_printf(" Skip Intc_Init.\r\n");BspOsal_sleep((UInt32) 500U); + /* Initialize the interrupt control */ + //Intc_Init(); + + Vps_printf(" Enable the interrupt.\r\n");BspOsal_sleep((UInt32) 500U); + /* Enable the interrupt */ + Intc_IntEnable(0); + + Vps_printf(" Registering TimerIsr.\r\n");BspOsal_sleep((UInt32) 500U); + Vps_printf(" Int Number = %d.\r\n",intrM4[gXbarInst_T2 - 1]);BspOsal_sleep((UInt32) 500U); + /* Registering TimerIsr */ + Intc_IntRegister(intrM4[gXbarInst_T2 - 1], (IntrFuncPtr) Timer4Isr, NULL); + + Vps_printf(" Set the priority.\r\n");BspOsal_sleep((UInt32) 500U); + /* Set the priority */ + Intc_IntPrioritySet(intrM4[gXbarInst_T2 - 1], 1, 0); + + Vps_printf(" Enable the system interrupt.\r\n");BspOsal_sleep((UInt32) 500U); + /* Enable the system interrupt */ + Intc_SystemEnable(intrM4[gXbarInst_T2 - 1]); +} + +/* +** Setup the timer for one-shot and compare mode. +*/ +void Timer4SetUp(void) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__);BspOsal_sleep((UInt32) 500U); + + Vps_printf(" Reset the timer module.\r\n");BspOsal_sleep((UInt32) 500U); + /*Reset the timer module */ + TIMERReset(SOC_TIMER4_BASE); + + Vps_printf(" Enable free run in emulation mode.\r\n");BspOsal_sleep((UInt32) 500U); + /* Enable free run in emulation mode */ + TIMEREmuModeConfigure(SOC_TIMER4_BASE, TIMER_FREE); + + Vps_printf(" Load the counter with the initial count value.\r\n");BspOsal_sleep((UInt32) 500U); + /* Load the counter with the initial count value */ + TIMERCounterSet(SOC_TIMER4_BASE, TIMER_INITIAL_COUNT); + + Vps_printf(" Load the load register with the reload count value.\r\n");BspOsal_sleep((UInt32) 500U); + /* Load the load register with the reload count value */ + TIMERReloadSet(SOC_TIMER4_BASE, TIMER_RLD_COUNT); + + Vps_printf(" Configure the Timer for Auto-reload and compare mode.\r\n");BspOsal_sleep((UInt32) 500U); + /* Configure the Timer for Auto-reload and compare mode */ + TIMERModeConfigure(SOC_TIMER4_BASE, TIMER_AUTORLD_NOCMP_ENABLE); + + Vps_printf(" Configure the posted mode of TIMER.\r\n");BspOsal_sleep((UInt32) 500U); + /* Configure the posted mode of TIMER */ + TIMERPostedModeConfig(SOC_TIMER4_BASE, TIMER_NONPOSTED); + + Vps_printf(" Configure the read mode of TIMER.\r\n");BspOsal_sleep((UInt32) 500U); + /* Configure the read mode of TIMER */ + TIMERReadModeConfig(SOC_TIMER4_BASE, TIMER_READ_MODE_NONPOSTED); +} + +/* +** Disable the interrupt configurations on INTC. +*/ +void Timer4IntcDeInit(void) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__); + + /* Restore the initial state of gCntValue_T2 */ + gCntValue_T2 = 10; + + Vps_printf(" Disconnect the XBar.\r\n"); + /* Disconnect the XBar */ + CSL_xbarIrqConfigure(CSL_XBAR_IRQ_CPU_ID_IPU1,gXbarInst_T2,CSL_XBAR_IRQ_MIN); + + Vps_printf(" Disable the timer interrupt.\r\n"); + /* Disable the timer interrupt */ + Intc_SystemDisable(intrM4[gXbarInst_T2 - 1]); + + Vps_printf(" Unregister the interrupt.\r\n"); + /* Unregister the interrupt */ + Intc_IntUnregister(intrM4[gXbarInst_T2 - 1]); +} + +/* +** This function is used to find the timer count value +** required for the provided delay +** inp_clk is the input clock source of the timer. +** time unit is always micro seconds. +** prescl_val defines the timer prescale value. +*/ +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +void Timer4_val(uint32_t inp_clk, uint32_t delay, uint32_t prescl_val) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__); + + uint32_t divisor = 1000000U, count = 0U; + + divisor = divisor * prescl_val; + count = (inp_clk / divisor) * delay; + if(count <= 0xffffffffU) + { + TIMER_INITIAL_COUNT = 0xffffffff - count; + TIMER_RLD_COUNT = 0xffffffff - count; + } + else + { + TIMER_INITIAL_COUNT = 0U; + TIMER_RLD_COUNT = 0U; + } +} +#endif + +/* +** Timer interrupt service routine. This will send a character to serial +** console. +*/ +void Timer4Isr(void *handle) +{ + Vps_printf(" Enter %s.\r\n",__FUNCTION__); + + /* Disable the Timer interrupts */ + TIMERIntDisable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); + + /* Clear the status of the interrupt flags */ + TIMERIntStatusClear(SOC_TIMER4_BASE, TIMER_INT_OVF_IT_FLAG); + + gIsrSemaphore_T2++; + gCntValue_T2--; + + if (gCntValue_T2 == 0) + { + gIsrSemaphore_T2 = 0; + gNumSuccess_T2++; + } + + /* Enable the Timer interrupts */ + TIMERIntEnable(SOC_TIMER4_BASE, TIMER_INT_OVF_EN_FLAG); +} + + ---------------------------------------------- System info: OS : RTOS platform: TDA2 SDK: v3.3 Attachment file: main_m4(TI SDK timer sample code) --- TI SDK v3.3 sample code Test_UseCase_Timer_Sample_Code --- Test timer setting by use case ---------------------------------------------- + +Responses: +Hi Prince, You need to use OSAL for interrupts in Vision SDK. Please refer to threads: e2e.ti.com/.../2358890 e2e.ti.com/.../2205420 Regards, Rishabh + +Hi Rishabh, Thanks for your reply. Have any OSAL information or document can sharing? + +Hi, Can you please refer to header files. You can just grep OSAL in PDK. Regards, Rishabh + +Hi Rishabh, I search OSAL and find the Utils_globalTimerInit API from $SDK_folder\vision_sdk\links_fw\src\rtos\utils_common\src\utils_global_time.c The API will register timer to generate interrupt per hour. /** ******************************************************************************* * * \brief Initializes the global timer for 1ms period. * * \return returns 0 on success * ******************************************************************************* */ Int32 Utils_globalTimerInit(void) { Utils_GlobalTimerObj *pClkObj; pClkObj = &gUtils_GlobalTimerObj; pClkObj->clkHandle = BspOsal_clockCreate( &Utils_globalTimerPrdFunc, COUNTER_32K_OVERFLOW_CHECK_TIMER_PERIOD_IN_MS, (Bool)FALSE, pClkObj ); UTILS_assert(pClkObj->clkHandle!=NULL); BspOsal_clockStart(pClkObj->clkHandle); return SYSTEM_LINK_STATUS_SOK; } I need one timer to generate interrupt per 100ms, could you please give me some advise? Thanks for your support. + +Hi, You can use GP timer to generate an compare interrupt. You should modify TIMER_INITIAL_COUNT to get an interrupt every 100 ms. Regards, Rishabh + +Hi Rishabh, How to use GP timer ? I have not find relative document or sample code. Could you please sharing more information to me? Many thanks. + +Hi Prince, The example in your question is for general purpose timer (also known as only timer). Regards, Rishabh + +Hi Rishabh, Thanks for your replay. I don't understand what different Utils_globalTimerInit with GP timer. Utils_globalTimerInit() need initialize at System_initCommon() that can workable and generate interrupt. GP timer I don't know how to setting after refer CSL sample code. Have any tutorial can sharing about GP timer? + +Hi Prince, Global timer uses 32K Timer. You can check the Timers chapter in TDA2 TRM for different kind of timer and their description. Regards, Rishabh + +Hi Rishabh, I will study from TRM first. Will create new ticket if I stuck in the problem after study. Thanks for your support. Have nice day. Prince. + +Hi Prince, Ok thanks for the update. Regards, Rishabh + diff --git a/data2/text/range/20001-25000/714610.txt b/data2/text/range/20001-25000/714610.txt new file mode 100644 index 0000000000000000000000000000000000000000..51080351de3c5bdddd26b561c4606c043dff22dc --- /dev/null +++ b/data2/text/range/20001-25000/714610.txt @@ -0,0 +1,32 @@ +Ticket Name: Linux/TDA2: MAKECONFIG=tda2xx_evm_linux_all, PROC_IPU1_1_INCLUDE=yes, compile failed + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, VisionSDK version: 03.03.00.00 I modified the build/Rules.make as follow: MAKECONFIG?=tda2xx_evm_bios_all --> MAKECONFIG?=tda2xx_evm_linux_all and modified the apps/configs/tda2xx_evm_linux_all/cfg.mk as follow: PROC_IPU1_0_INCLUDE=no PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes --> PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=yes PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes However, when I compile the sdk, it failed, the message as follow: sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_ipu_system.aem4 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: no valid memory range(null) available for placement of "GROUP_1" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: program will not fit into available memory. run placement with alignment fails for section "GROUP_1" size 0x20de7c "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 255: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 255: error: no valid memory range(null) available for placement of ".bss:taskStackSection" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 255: error: program will not fit into available memory. run placement with alignment fails for section ".bss:taskStackSection" size 0x1be000 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: error: no valid memory range(null) available for placement of ".const" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: error: program will not fit into available memory. placement with alignment fails for section ".const" size 0x1733a0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 225: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 225: error: no valid memory range(null) available for placement of ".text" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 225: error: program will not fit into available memory. placement with alignment fails for section ".text" size 0x3ffe6 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: error: no valid memory range(null) available for placement of ".data" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: error: program will not fit into available memory. run placement with alignment fails for section ".data" size 0x3f8fa "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: error: no valid memory range(null) available for placement of ".stack" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: error: program will not fit into available memory. run placement with alignment fails for section ".stack" size 0x4000 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 242: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 242: error: no valid memory range(null) available for placement of ".args" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 242: error: program will not fit into available memory. placement with alignment fails for section ".args" size 0x64 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: error: program will not fit into available memory. run placement with alignment fails for section ".binit" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: error: program will not fit into available memory. run placement with alignment fails for section ".init_array" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: error: program will not fit into available memory. run placement with alignment fails for section ".fardata" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 239: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 239: error: program will not fit into available memory. run placement with alignment fails for section ".switch" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 240: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 240: error: program will not fit into available memory. run placement with alignment fails for section ".sysmem" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 241: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 241: error: program will not fit into available memory. run placement with alignment fails for section ".far" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 243: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 243: error: program will not fit into available memory. run placement with alignment fails for section ".cio" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 244: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 244: error: program will not fit into available memory. run placement with alignment fails for section ".ARM.exidx" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 245: warning: memory range not found: IPU1_1_DATA_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 245: error: program will not fit into available memory. run placement with alignment fails for section ".ARM.extab" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 254: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 254: error: program will not fit into available memory. run placement with alignment fails for section ".plt" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 260: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 260: error: program will not fit into available memory. placement with alignment fails for section "xdc.meta" size 0x14f "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: warning: memory range not found: IPU1_1_DATA_MEM on page 0 error: program will not fit into available memory. run placement with alignment fails for section ".TI.persistent" size 0x0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: warning: memory range not found: IPU1_1_CODE_MEM on page 0 "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: error: no valid memory range(null) available for placement of ".cinit" "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: error: program will not fit into available memory. placement with alignment fails for section ".cinit" size 0x9b41 undefined first referenced symbol in file --------- ---------------- IpcMgr_rpmsgStartup /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 NameMap_register /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 NameMap_unregister /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_create /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_delete /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_send /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 ti_ipc_remoteproc_Resource_getVdevStatus__E /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 error: unresolved symbols remain ../../master/ELFLNK/build.c:2612:internal fatal error #10251: ("xdc.meta:MAIN_APP_ipu1_1_pem4.oem4") INTERNAL ERROR: /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armlnk had an internal inconsistency and aborted This is caused by a defect in the compiler itself. TI Customer Support may be able to suggest a workaround to avoid this. Upgrading to the newest version of the compiler may fix this problem. Contact TI in the E2E support forums at http://e2e.ti.com under "Development Tools", "TI C/C++ Compiler". See the link titled "Submitting an issue". Include this ENTIRE error message and a copy of the .pp file created when option --preproc_with_comment (-ppc) is used. /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/build/rtos/makerules/rules_m4.mk:293: recipe for target '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4' failed make[7]: *** [/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4] Error 2 make[7]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_1' /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu1_1' failed make[6]: *** [ipu1_1] Error 2 make[6]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu1_1' MAKEFILE.MK:105: recipe for target 'apps_ipu1_1' failed make[5]: *** [apps_ipu1_1] Error 2 make[5]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/links_fw/src/rtos' MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 make[4]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/links_fw/src/rtos' MAKEFILE.MK:285: recipe for target 'apps' failed make[3]: *** [apps] Error 2 make[3]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/apps' Makefile:171: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 make[2]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/build' Makefile:36: recipe for target 'apps' failed make[1]: *** [apps] Error 2 make[1]: Leaving directory '/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/build' Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 + +Responses: +Hi, I have resolved the memory error, because of I don't define the IPU1_1 memory. I compile the sdk, the error as follow: undefined first referenced symbol in file --------- ---------------- IpcMgr_rpmsgStartup /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 NameMap_register /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 NameMap_unregister /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_create /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_delete /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 RPMessage_send /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 ti_ipc_remoteproc_Resource_getVdevStatus__E /home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu1_1/release/links_common_system.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home2/houtx/vendor/TDA2x_EVM_SDK_03.03.00.00/vision_sdk/binaries/apps/tda2 xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4" not built + +Hi, can you look at this thread and try the verified answer by Rishabh: e2e.ti.com/.../2625562 Regards, Yordan + +Hi Tianxing, As Yordan said you need to set PROC_IPU1_1_INCLUDE to no. Most of the times a lot of queries are already answered. You should first search the issue on E2E forum. This will reduce the turnaround time. Regards, Rishabh + +Hi Yordan, I see it will compile succeed when I set PROC_IPU1_1_INCLUDE to no. However, if it means that I can't use the ipu1_1 core? I want to use the ipu1_0, ipu1_1 and ipu2. IPU run in SMP mode, is it default? And I found when I set the MAKECONFIG?=tda2xx_evm_linux_all, and PROC_IPU1_1_INCLUDE=yes, it compile succeed. Thanks. + +Hi Tianxing, Yes IPU runs in SMP mode by default. I did not understand the statement : "MAKECONFIG?=tda2xx_evm_linux_all, and PROC_IPU1_1_INCLUDE=yes, it compile succeed". The original question states the compile fails when you use tda2xx_evm_linux_all, and PROC_IPU1_1_INCLUDE=yes. Regards, Rishabh + +Hi Rishabh, Sorry for that, it mean MAKECONFIG?=tda2xx_evm_bios_all, and PROC_IPU1_1_INCLUDE=yes, it compile succeed Thanks + +Hi Tianxing, BIOS build works differently. Using BIOS you can use individual cores of IPU1 subsystem as well as both cores in SMP mode. However in linux case only SMP mode is supported. Hope this clarifies. Regards, Rishabh + +Hi Rishabh, Thank you for your reply. That's mean when I select MAKECONFIG?=tda2xx_evm_linux_all, the A15, IPU1 and IPU2 both work in SMP mode by default. Where can I set the default SMP mode, I found the setting DUAL_A15_SMP_BIOS=no in apps/configs/tda2xx_evm_bios_all/cfg.mk file. Thank you very much. Regards, Tianxing + +Hi Tianxing, You don't need to set the SMP mode. Linux does not support non SMP mode. BIOS supports both SMP and non SMP and hence you can choose by setting DUAL_A15_SMP_BIOS flag. Regards, Rishabh + +Hi Rishabh, IPU1_0 and IPU1_1 run on bios, should the IPU1 set the SMP mode? Regards, Tianxing + +Hi Tianxing, The choice is up to the user. You can choose to set both cores in SMP or non SMP mode depending on the use case. Regards, Rishabh + +Hi Rishabh, Could you explain that in detail? It depend the chain create? However, when I set PROC_IPU1_1_INCLUDE=yes, I compile the sdk, it failed. I think set PROC_IPU1_1_INCLUDE=yes means the ipu1 work in non SMP. Thanks. Regards, Tianxing. + +Hi, If you are trying with linux configuration then IPU1,IPU2 and A15 all runs on SMP mode only. You can select IPU_PRIMARY_CORE as IPU1 or IPU2 . Regards, Anuj + diff --git a/data2/text/range/20001-25000/726286.txt b/data2/text/range/20001-25000/726286.txt new file mode 100644 index 0000000000000000000000000000000000000000..5879bab1c185440106f4ff92d49d6bc32b1f238d --- /dev/null +++ b/data2/text/range/20001-25000/726286.txt @@ -0,0 +1,106 @@ +Ticket Name: RTOS/TDA2P-ACD: AR0220 Sensor + SERDES (UB953/UB954) Interfacing to Custom TDA2Px Board + +Query Text: +Part Number: TDA2P-ACD Tool/software: TI-RTOS Hello All, We are working with AR0220 camera sensor + UB953/UB954 SERDES on custom TDA2P board. Earlier we were working on TDA2Px-EVM with AR0220 and SERDES which was working. We have taken the same working configurations on custom board. But we are getting I2C bust busy error as shown below, " Serilaizer # 0 has I2CAddr 74 !!! Setting GPIO RST Pin GPIO RST Pin setting DONE src/bsp_deviceI2c.c @ Line 1567: Bus busy detected recover I2C bus !!! src/bsp_deviceI2c.c @ Line 667: I2C4: DEV 0x40: ERROR !!! I2C4: Error timeout 5074 ms!!! Assertion @ Line: 507 in vision_sdk/apps/src/rtos/iss/src/common/app_util_iss.c! " We are using below settings in file "\apps\src\rtos\iss\src\sensor\iss_sensor_tda2px.c", " {SENSOR_AR0220, { 4u, /* I2C Instance id for the sensor */ {0x40}, /* I2C Alias Address of the sensor */ {0x74}, /* I2C Alias Address of the serializer */ TRUE, /* Flag for single/multi channel sensor config */ SYSTEM_VIFW_4LANES, /* Interface width */ SYSTEM_VIFM_SCH_CSI2, /* Video Interface mode - Single channel capture via CSI2 interface */ SYSTEM_CSI2_RAW12, /* Input CSI2 Data Format */ 0, /* Virtual Channel Id */ 0, /* Is CSI Enable Required in UB954 */ {TRUE /* isCplxCfgValid */, {{FALSE, 1}, /* Clock Lane */ {FALSE, 2}, /* data1Lane */ {FALSE, 3}, /* data2Lane */ {FALSE, 4}, /* data3Lane*/ {FALSE, 5}},/* data4Lane */ 800 /* csi2PhyClk */ }, FVID2_VID_SENSOR_AR0220_DRV, /* sensorDrvId */ FALSE, /* sensorBroadcast */ FALSE, /* enableFsin */ {0x36} /* I2C address of deserializer */ }} " Can anyone suggest how do we solve I2C bus busy error. Regards, Abhay + +Responses: +Hi Abhay, Do you have any other device connected to i2c address 0x74? Can you check? Btw, are you able to communicate with the UB960 and it is setup correctly? please confirm.. Regards, Brijesh + +Hi Brijesh, We have no other device connected to i2c address 0x74. We are using UB954 and not UB960. We have below devices connected over i2c, AR0220 sensor at i2c address 0x10 UB954 deserializer at i2c address 0x36 UB953 serializer at i2c address 0x18 one more UB953 serializer at i2c address 0x19 & EEPROM at i2c address 0x50 We are able to communicate with UB953/UB954 over i2c. Regards, Abhay + +Hi Abhay, ok, so are you able to talk to sensor?? Regards, Brijesh + +Hi Brijesh, With SERDES connected, we are not able to talk to sensor. We are getting "Bus busy error" before writing to sensor. Also please note, we have enabled the back channel with SERDES. Without SERDES , we are able to write to the sensor. Regards, Abhay + +Hi Abhay, Since you are able to talk to UB953, back channel is established. when you see this error, can you check if you are still able to talk to ub953 serializer? Regards, Brijesh + +Hi Brijesh, I am working with Abhay on this issue. We are able to read the Serialiser ID,but not able to probe the sensor. We are getting assertion at the end. [IPU1-0] 26.436100 s: Serilaizer # 0 has I2CAddr 74 !!! -----------------------------------Alias Address of Serialiser [IPU1-0] 32.116574 s: Deserializer I2C address 0x36 Probe SUCCESS [IPU1-0] 32.117580 s: Serializer I2C address 0x18 Probe SUCCESS [IPU1-0] 32.117916 s: Read from register 0x5b of deser is successful, SER ID = 30 ... [IPU1-0] 32.118251 s: Read from register 0x5C of deser is successful, SER ALIAS ID = e8 ... [IPU1-0] 32.118587 s: Read from register 0x5E of deser is successful, SER ALIAS ID = e8 ... [IPU1-0] 32.118922 s: Read from register 0x65 of deser is successful, 1st Alias Slave ID = 30 ... [IPU1-0] 32.119044 s: Bsp_deviceI2cProbeDevice serializer start....... [IPU1-0] 32.120295 s: Bsp_deviceI2cProbeDevice serializer is successful for 7 bit address 0x18 ... [IPU1-0] 32.120661 s: Reading reg 0x00 from serialiser is successful, value = 30 ... [IPU1-0] 32.131184 s: Sensor I2C Address Probe FAILED !!!!!!!! [IPU1-0] 32.136491 s: src/bsp_deviceI2c.c @ Line 1567: [IPU1-0] 32.136582 s: Bus busy detected recover I2C bus !!! [IPU1-0] 32.136674 s: src/bsp_deviceI2c.c @ Line 667: [IPU1-0] 32.136765 s: I2C4: DEV 0x10: ERROR !!! [IPU1-0] 32.136857 s: src/bsp_deviceI2c.c @ Line 689: [IPU1-0] 32.136918 s: I2C4: Error timeout 5 ms!!! [IPU1-0] 32.137009 s: AR0220_Start : status = ffffffed [IPU1-0] 32.137070 s: AR0220_WriteReg FAILED : Reg Addr = 10, Reg Val = 301a [IPU1-0] 37.147166 s: src/bsp_deviceI2c.c @ Line 667: [IPU1-0] 37.147288 s: I2C4: DEV 0x10: ERROR !!! [IPU1-0] 37.147410 s: src/bsp_deviceI2c.c @ Line 689: [IPU1-0] 37.147501 s: I2C4: Error timeout 5010 ms!!! [IPU1-0] 37.147562 s: Assertion @ Line: 507 in apps/src/rtos/iss/src/common/app_util_iss.c! Thanks Deepika + +Hi Deepika, Please check if sensor has to be brought out of reset/power is supplied to sensor? Regards, Sujith + +Hi Sujith, The sensor is out of reset. We have taken sensor out of reset before writing to serdes and sensor. Previously, with the working setup (on EVM), we had a separate serializer + sensor module and we were communicating to the sensor using back channel. Now with present custom board setup, all the three (Ser, deser & sensor) are on I2C5. So is it possible that TDA2P is talking to sensor over I2C5 and at the same time SERDES is also talking to sensor over I2C5, is it possible that this may cause that I2C buss error is our case ? Regards, Abhay + +Abhay, They are independent. deserializer is on i2c5, but we need to talk to deserializer to talk to sensor. When we provide aliased address, it converts into actual address and talks to remote device over back channel.. Are you working in synchronous mode? Also can you read some status register on UB953 to check status of sensor? Rgds, Brijesh + +hi Abhay, Can you please probe and check if SCL held high. Regards, Sujith + +Hi Sujith, Currently working with MCSPI issue that we are facing. I will check this next week and update you accordingly. Thanks, Abhay + +Hi Sujith, We have fixed the bus busy error by disabling the Back channel from Serializer(953) as well as from Deserializer(954). We are now able to probe the sensor and read/write its register. From schematics we see that from sensor(4 lanes)---->SER=====FPD LINK=========DESER(2 lanes)-----------TDA2P We have modified the structure as follows: {SENSOR_AR0220, { 4u, /* I2C Instance id for the sensor */ {0x10}, /* I2C Address of the sensor */ {0x18}, /* I2C Address of the serializer */ TRUE, /* Flag for single/multi channel sensor config */ SYSTEM_VIFW_2LANES / *SYSTEM_VIFW_4LANES*/, /* Interface width */ SYSTEM_VIFM_SCH_CSI2, /* Video Interface mode - Single channel capture via CSI2 interface */ SYSTEM_CSI2_RAW12, /* Input CSI2 Data Format */ 0, /* Virtual Channel Id */ 0, /* Is CSI Enable Required in UB954 */ {TRUE /* isCplxCfgValid */, {{TRUE, 1}, /* Clock Lane */ {TRUE, 2}, /* data1Lane */ { TRUE, 3}}, /* data2Lane */ 400 /* csi2PhyClk */ }, FVID2_VID_SENSOR_AR0220_DRV, /* sensorDrvId */ FALSE, /* sensorBroadcast */ FALSE, /* enableFsin */ {0x36}}} }; I have highlighted the main changes. Polarity kept TRUE as we have N/P configuration. Does this looks ok?? Regards, Abhay + +Hi Sujith, One more doubt, what changes are required in SerDes register configuration if the lane polarity is different than the working setup. Regards, Abhay + +Hi Sujith, Do you any update on this. Thanks, Abhay + +Hi Abhay, To operate UB954 in 2 lane mode you will have to set register 0x33 bits 5:4 to 2. In the PDK demo application, by default we use 4 lanes and we set register 0x33 with 0x3. If the same were to be operate in 2 lane mode, we would have set register 0x33 with 0x23. regards, Sujith + +Hi Sujith, Thanks for your reply. One more doubt,is the processor side configuration as shown above is ok?? We have 2 lanes from 954(DESER) is going again to another 953 (SER) with addr 0x19. So,do we need CSI2 in replicate mode in DESER so that the 2 lane of data will go to TDA2P and another 2 lane will go to 953 Serializer. Regards, Deepika + +Hi Sujith, We have 25MHz REFCLK for Deserializer and a separate 25MHz CLKIN for Serializer. Will thye device work only in ASYNC mode? The value of AC Coupling capacitor is 33pF.It is mentioned in the datasheet that for Async Mode we need 100nF and for Sync Mode 33pF AC Coupling Capacitance is required.Now with this configuration will ASYNC Mode work? While probing I am not getting any CSI2 Clock or Data. Thanks Deepika + +Hi Deepika, It's quite confusing, as stated by Abhay the signal chain is sensor(4 lanes)---->SER=====FPD LINK=========DESER(2 lanes)-----------TDA2P Is this correct or do you have one more serdes combination before the TDA2P? Regards, Sujith + +Also, can you please detail the complete signal chain. Please include the crystals used for each component. Regards, Sujith + +Hi Sujith, Sorry for making it confused. Please see the below diagram for more clarity. As you can see from the figure all the components (SER,DESER and AR0220 ) have separate clocks and they are connected independently to TDA2P through I2C. I am getting CSI2 Clock from the sensor, but due to incorrect configuration of SERDES no CS2 CLK or data is coming to TDA2P. Following are my configurations for SER and DESER BspUtils_Ub960I2cParams gAppIssUtilsUb954Cfg_AR0220_CSI2_DesCfg[AR0220_CSI2_DES_CFG_SIZE] = { {0x0C, 0x83, 0x10}, {0x1F, 0x03, 0x10}, /* 400 CSI Freq */ {0x4C, 0x01, 0x1}, /*Page FPD3 port RX0 registers for R/W*/ {0x58, 0x1C , 0x1}, /*Enable and set backchannel rate to 10Mbs for Async Mode/ I2C passthrough disabled*/ {0x5C, 0x30, 0x1}, /*set serializer alias to Ox18 (7-bit)*/ {0x5D, ((uint8_t) (UB953_I2C_ADDRESS << 1U)), 0x0}, {0x65, ((uint8_t) (UB953_I2C_ALIAS_ADDRESS << 1U)), 0x0}, {0x5E, ((uint8_t) (AR0220_I2C_ADDRESS << 1U)), 0x0}, {0x6D, 0x7C, 0x1}, /*CSI and coax mode*/ {0xD5, 0xF2, 0x1}, /* Set AEQ MIN/MAX widest values*/ {0x7C, 0x01, 0x1}, /* disabled FV Polarity */ {0x32, 0x01, 0x1}, /*CSI0 select*/ {0x33, 0x23, 0x1}, /*CSI_EN & CSI0 2L Continuous clock*/ {0x21, 0x81, 0x1}, /*CSI Replicate mode SYNC disabled RR enabled */ {0x20, 0x00, 0x1}, /*Rx Forwarding Enabled */ {0xB9, 0x18, 0x1}, /*ENABLE PARITY ERROR COUNT*/ {0x42, 0x71, 0x1}, /*ENABLE S-Filter with AEQ*/ } BspUtils_Ub960I2cParams gUB953_AR0220_CSI2_SerCfg[AR0220_CSI2_SER_CFG_SIZE] = { {0x02, 0x73, 0x10}, /*4Lanes Continuous CLK 1.8V */ {0x20, 0x1F, 0x10}, // CSI_POL_SEL changes for N/P Polarity {0x21, 0x1F, 0x10}, {0x32, 0x09, 0x10}, /*I2C Pass through Disabled */ {0x06, 0x21, 0x10}, {0x07, 0x28, 0x10}, Regards, Deepika + +Hi Sujith, I was able to get Clock and Data from CSI2 Port in TDA2P side. But the picture is not clear. I am facing CRC errors in the Serdes Link. I tried with 400 and 800Mbps both from Deserializer and TDA2P. I disabled the errorCallback() call in the file issCaptureLink_drv.c and got the following image on the display. Please give your suggestions, Regards, Deepika + +Hi Deepika, Can you please check on the number of data lanes being used in the de-serializer and TDA2Px. It seems like 1/3 of line is missing but these seems to be some kind of image in the background. Regards, Sujith + +Hi Sujith, Thanks for reply. We have set register 0x33 to 0x23 in deserialiser as we have 2 lanes connected to TDA2P. Yes,in background there is some image.Is this type of image is a result of some clocking issue? Regards, Deepika + +Hi Sujith, One more info, while reading CSI_RX_STS(0x7A) and CSI_ERR_COUNTER(0x7B) from the Deserialiser(954) I am getting the following values: CSI_RX_STS(0x7A) = 0x02 CSI_ERR_COUNTER(0x7B)=0X01 Can this also cause problem? Also do you have any suggestions for getting the full image on the screen? I am attaching a part of schematics showing connections between Deser(954) and CSI Clk and Data lanes going to TDA2P Regards, Deepika + +Hi Deepika, Register CSI_RX_STS with value of 0x02 indicates that there were > 1 bit ECC error. Which cannot be corrected by h/w. Can you please check on the following 1. UB954 clear the error status / counters and re-read the same register. Check if the error persists. I suspect this error is persistent 2. Check if this error source is UB953/Sensor Regards, Sujith + +Hi Sujith, I tried reading CSI_RX_STS(0x7A) and CSI_ERR_COUNTER(0x7B).I have created a loop to read the two registers.Only once I am getting 1 bit ECC error,after reading it again the registers are cleared.On re reading it, it reads 0. [IPU1-0] 26.560269 s: Read from register CSI_RX_STS(0x7A):: = 2 ... [IPU1-0] 26.560605 s: Read from register CSI_ERR_COUNTER(0x7B):: = 1 ... [IPU1-0] 26.563533 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.563868 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.566339 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.566674 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.569328 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.569663 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.572317 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.572652 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.575398 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.575733 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.578539 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.578875 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.581345 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.581681 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.584334 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.584670 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... [IPU1-0] 26.587384 s: Read from register CSI_RX_STS(0x7A):: = 0 ... [IPU1-0] 26.587720 s: Read from register CSI_ERR_COUNTER(0x7B):: = 0 ... Also the RX_PORT_STS2(0x4E) reads 0x4D ----Which means CSI Receive error detected. SENSOR_STS_0 (0x51) and SENSOR_STS_3(0x54) reads 0. Apart from this I wanted to inform you that even though we have a 25MHz CLK_IN to the serialiser we have changed the MODE Register(0x03) of serialiser to 0x10 to make it work in Sync mode. Regards, Deepika + +Hi Sujith, I am running the PDK demo application for checking the Colour Bar pattern generation by using the following test id: {"Sensor Config Bypassed CSI2 4Lanes capture color bars from UB954", 0U, TRUE, FVID2_VIFM_SCH_CSI2, FVID2_VIFW_2LANES, 1U, 0U, VPS_ISS_CAL_CSI2_RAW12,FVID2_BPP_BITS12, CAPT_APP_RUN_COUNT, 1280U, 720U, (720U * 3U), FVID2_VID_SENSOR_BYPASS_CSI2_DRV, FVID2_STD_1080P_30, FVID2_DF_BAYER_BGGR, FVID2_BPP_BITS12, BSP_BOARD_MODE_DEFAULT}, I have cofigured it for 2 Lanes,But I want the polarity to be reversed. the value of 0x489B0304 is 0x4A000321. This is for P/N Polarity. For the custom board polarity is N/P. How can I make that configuration. Regards, Deepika + +Hi Deepika, Please check the function appCaptDeriveCfg (), by default it's set to pCmplxIoCfg->clockLane.pol = FALSE; You might have to make it pCmplxIoCfg->clockLane.pol = TRUE; Regards, Sujith + +Hi Sujith, By changing the lane polarity and keeping the already available pattern generation code in bsputils_ub95x.c the COMPLEXIO_CFG Register is out of reset is the value of 0x489B0304 is 0x6A000BA9. By probing the clock and 2 data lanes we are getting data but no clock,and we are not getting anything on HDMI. It is stuck at "Starting Capture now" This is what I have added for polarity and position.Is there anything we are missing out. if (FVID2_VID_SENSOR_BYPASS_CSI2_DRV == pCfg->sensorDrvId) { pCmplxIoCfg->clockLane.pol = TRUE; pCmplxIoCfg->clockLane.position = 1U; pCmplxIoCfg->data1Lane.pol = TRUE; pCmplxIoCfg->data1Lane.position = 2U; pCmplxIoCfg->data2Lane.pol = TRUE; pCmplxIoCfg->data2Lane.position = 3U; Regards, Deepika + +Hi Sujith, I was going through the datasheet of 954 ,in the datasheet Section 7.4.21 CSI-2 Transmitter Frequency There is no description of REF_CLK_MODE in the datasheet. Also I am not understanding the reason for not getting CSI_CLK output from the Deserialiser.Also there is no voltage level on the CSI_CLK line...it is 700mV. Is this Ok? Lane order and polarity have already been mapped and cross checked. Regards, Deepika + +Hi Sujith, We are not still not getting any clue.Can you please guide us on this. Regards, Deepika + +Hi Deepika, Let me check this out on TI EVM with UB954 EVM on 2 lanes with color bars and come back to you. Regards, Sujith + +Hi Sujith, Just for information..I was checking the schematics of the Custom board..In the MODE pin R HIGH is open and RLOW is 10K..Due to this it should work in CSI2 Async Back Channel Mode + +Hi Deepika, Let me check with FPD Link expert on this. Regards, Sujith + +Hi Sujith, Did you get time to check this. Regards, Abhay + +Hi Sujith, I am writing 0x33(CSI_CTL) to 0x23 for 2 Lane continuous Clock Mode . But when I read this value after writing it shows me only 0x3 instead of 0x23(which I have actually written).Is this an issue? Regards, Deepika + +Hi Deepika, Yes, that could be an issue. Can you please check on the following 1. Verify if the first write is OK. 2. Identify after which register write, this value is being reset. In parallel, i am trying with TDA2Px board. I will update you as soon as i have progress. Regards, Sujith + +Hi Sujith, The first write itself is not working.I disabled continuous CLK from 0x33..I disabled continuous clock from serialiser too,still the value is coming as 3. I am reading the registers after all the registers of structure array are written. Regards, Deepika + +Hi Deepika, Can you confirm if register 0x21 of UB954 and CSI_REPLICATE is set? Regards, Sujith + +Hi Sujith, Yes ,it is set. This is the order in which I am setting the registers. {0x0C, 0x83, 0x10}, /*Enable PORT0 and PORT1 Receiver */ {0x1F, 0x02, 0x10}, /* 800 CSI Freq */ {0x20, 0x20, 0x1}, /*Rx Forwarding Enabled for RX0 disabled for RX1 */ {0x4C, 0x01, 0x1}, /* FPD3 port RX0 registers for R/W*/ {0x21, 0x81, 0x1}, /*CSI Replicate mode SYNC disabled RR enabled*/ {0x58, 0x1E , 0x1}, /*Enable and set backchannel rate to 50Mbs for sync Mode/ I2C passthrough disabled Back Channel Enable*/ {0x6D, 0x78, 0x1}, /*CSI and STP mode */ {0x32, 0x01, 0x1}, /*CSI0 select*/ {0x33, 0x23, 0x1}, /*CSI_EN & CSI0 2L Continuous clock*/ Do we have any errata document of 954 so that we can check if we have missed out on any point. Thanks, Deepika + +Hi Sujith, I have disabled replicate mode now. After the writing of all the configurations,i tried writing 0x33 to 0x21 ,added a 20ms delay and read back.The value was coming 0x21.But I am not able to find out due to which configuration the value of 0x33 is changing. Regards, Deepika + +Hi Sujith, I tried reading the CSI_CTL(0x33) from the file issCaptureLink_drv.c in the function IssCaptureLink_drvProcessData().Again the value is coming 0x3,instead of 0x21. Is there any clue what can make that value change. Regards, Deepika + +Hi Deepika, I cant explain, which the number of lanes changes. Can you please share the UB953 & UB954 configurations? Regards, Sujith + +Hi Sujith, PLease find my SER DES configuration BspUtils_Ub960I2cParams gAppIssUtilsUb954Cfg_AR0220_CSI2_DesCfg[AR0220_CSI2_DES_CFG_SIZE] = { {0x0C, 0x83, 0x10}, /*Enable PORT0 and PORT1 Receiver */ {0x1F, 0x02, 0x10}, /* 800 CSI Freq */ {0x20, 0x00, 0x1}, /*Rx Forwarding Enabled for RX0 disabled for RX1 */ {0x4C, 0x01, 0x1}, /* FPD3 port RX0 registers for R/W*/ {0x21, 0x81, 0x1}, /*CSI Replicate mode SYNC disabled RR enabled*/ {0x58, 0x1E , 0x1}, /*Enable and set backchannel rate to 50Mbs for sync Mode/ I2C passthrough disabled Back Channel Enable*/ {0x6D, 0x78, 0x1}, /*CSI and STP mode*/ {0x32, 0x01, 0x1}, /*CSI0 select*/ {0x33, 0x23, 0x1}, /*CSI_EN & CSI0 2L Continuous clock*/ }; BspUtils_Ub960I2cParams gUB953_AR0220_CSI2_SerCfg[AR0220_CSI2_SER_CFG_SIZE] = { {0x02, 0x73, 0x10}, /*4Lanes Continuous CLK 1.8V */ {0x03, 0x10, 0x10}, /*Changing MODE register for overriding strap value to make it work in synchronous mode*/ {0x32, 0x09, 0x10}, /*Keeping it to default value I2C Pass through disabled */ }; Regard, Deepika + +Hi Sujith, As discussed in the call today I tried streaming with 2 lanes on 954 EVM and TDA2P EVM. I did the following changes: 1) In the file iss_sensor_tda2px.c I kept 2 lanes configuration FALSE}}, /* enableFsin */ {SENSOR_AR0220, { 4u, /* I2C Instance id for the sensor */ {0x40}, /* I2C Address of the sensor */ {0x74}, /* I2C Address of the serializer */ TRUE, /* Flag for single/multi channel sensor config */ SYSTEM_VIFW_2LANES, /* Interface width */ SYSTEM_VIFM_SCH_CSI2, /* Video Interface mode - Single channel capture via CSI2 interface */ SYSTEM_CSI2_RAW12, /* Input CSI2 Data Format */ 0, /* Virtual Channel Id */ 0, /* Is CSI Enable Required in UB954 */ {TRUE /* isCplxCfgValid */, {{FALSE, 1}, /* Clock Lane */ {FALSE, 2}, /* data1Lane */ {FALSE, 3}}, /* data2Lane */ 800 /* csi2PhyClk */ }, FVID2_VID_SENSOR_AR0220_DRV, /* sensorDrvId */ FALSE, /* sensorBroadcast */ FALSE, /* enableFsin */ {0x30} 2)Commented the CRC error check in issCaptureLink_drv.c. 3) Changed the value of 0x33 to 0x23 (2 Lane Continous clock Mode) Reading this register again gives 0x3 as it is happening in the custom board. And I am getting the similar image which I got in the custom board. I am attaching the image for your reference. Regards, Deepika + +Hi Deepika, Thanks, this indicates that we have an issue with UB954/UB953 configuration. I am looking at the configurations values that you had provided earlier, i will update you on the observations. Regards, Sujith + +Hi Sujith, The only register from the working condition of SERDES that I changed was 0x33. Also even there was 4 lane connection from the TDA2P side I changes to 2 Lanes from Software Thanks Deepika + +Hi Deepika, With the EVM setup, did you have to override the mode in UB953? Regards, Sujith + +Hi Sujith No ..it was already working in sync mode.So no overriding was required Thanks, Deepika + +Hi Sujith, One more finding..I have not changed the value of 0x33.Its value is 0x3 right now. Now only two changes are there: 1)No of lanes in the tda2p side is 2 2)CRC check has been commented in the issCaptureLink_drv.c. Still we are getting the same image as we got. Regards, Deepika + diff --git a/data2/text/range/20001-25000/777039.txt b/data2/text/range/20001-25000/777039.txt new file mode 100644 index 0000000000000000000000000000000000000000..ad70553af98acf6c7865bb47faf8cc6f8da901d0 --- /dev/null +++ b/data2/text/range/20001-25000/777039.txt @@ -0,0 +1,106 @@ +Ticket Name: Linux/TDA2PXEVM: Application for the new adaboost weight file to usecase of the Analytics2 + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Dear, I did training PD with the Caltech Pedestrian data-set. I converted *.descriptor to *.bin file using AdaboostTableGen.exe. I'm reading the userguide of the "ObjectDetection". After I replace the pd_adaboost_weight.bin to new one(then need not modification of the object_detection.cfg file), what I do? I ran the analytics2 usecase with EVM board. I'd like to apply the new weight training file to check the improvement of the PD. Best regards, Heechang + +Responses: +I have looped in the experts for using the trained descriptor in VisionSDK. + +There is an ongoing thread on this topic. Kindly refer the same. TDA2: AdaBoost Training with CaltechUsa We are also in the process of providing a reference implementation as part of next SDK release. Regards, Shyam + +Hi Shyam, I read the similar topic that thread. It mixed the topic of the host emulation build and the VSDK. I'd like to apply *.bin for vision_sdk. Should I do test application if I apply this bin file? After I build the OD library, can I apply this library to usecase directly on EVM board? Since I ran the analytics2 usecase on EVM, I think that the it is fine to replace the OD library. Best regards, Heechang + +Hi Heechang, I think there are two separate things here. The OD library comes with a small test bench where one can provide a new .bin file or modify the .cfg file to take the new file. But by just replacing the .bin file you will not be able to run the analytics2 use case on EVM. On a high level, you will have put the new bin file in a SD card and let ARM/M3 read this file from SD card to a buffer. Once read, the buffer has to be passed from ARM/M3 to DSP at the time of initializatoin. Now DSP can take this buffer with updated weights and run the algorithm. Regards, Shyam + +Hi Shyam, I understand there are two cases, right? 1. If I run the test bench with a new .bin file, can I use the new OD library for running the analytics2? Should I build the test application with OD userguide document? 2. In SD card, read a new .bin file to buffer. In this function of AlgorithmLink_objectDetectionCreate() in objectDetectionLink_algPlugin.c, should I read a file with size to a buffer? ... pObjectDetectObj->inBufDescList[TI_OD_IN_BUFDESC_FEATURE_PLANES] = &pObjectDetectObj->inBufDesc; pObjectDetectObj->outBufDescList[TI_OD_OUT_BUFDESC_OBJECT_LIST] = &pObjectDetectObj->outBufDesc[0]; pObjectDetectObj->outBufDescList[TI_OD_OUT_BUFDESC_DETECTION_LIST] = &pObjectDetectObj->outBufDesc[1]; ... There are input and output buffer descriptors. Please let me know some sample code . Best regards, Heechang + +Hi Shyam, In case of high level, I inserted the file open code in usecase and buffer code in function of the AlgorithmLink_objectDetectionInitIOBuffers(). I referenced code by TestApp_AllocIOBuffers(IVISION_InBufs * inBufs,IVISION_OutBufs * outBufs). Is this right? Or some code should be inserted? Best regards, Heechang + +Hi Shyam, I confirmed the read the binary file. In function of the AlgorithmLink_objectDetectionInitIOBuffers() in objectDetectionLink_algPlugin.c, I inserted the code like this. pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->numPlanes = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.x = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.y = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].width = 40*1024; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].height = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.width = 40*1024; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.height = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].planeType = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = (void *)pObj->algLinkCreateParams.pWeightPDBuf; I ran the object detection usecase but it looks same result before the read the binary file. Best regards, Heechang + +Somebody help me, please. Best regards, Heechang + +Hi Heechang, Sorry for a late reply, your implementation is correct. Can you please confirm if you are setting the flag useExtWeightsPD = 1 as passing it in? pObj->inArgs.pdConfig.useExtWeightsPD = pObj->algLinkCreateParams.useExtWeightsPD; Regards, Shyam + +Yes, I set the "pObj->inArgs.pdConfig.useExtWeightsPD = 1;" in function of the "AlgorithmLink_objectDetectionSetIOArgs() in objectDetectionLink_algPlugin.c. I modified the code like below. { .... UInt8 *pTransBuf; UInt8 pWeightPDBuf; } AlgorithmLink_ObjectDetectionCreateParams; //for input buffer AlgorithmLink_objectDetectionInitIOBuffers() { ... pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->numPlanes = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.x = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.y = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].width = 40*1024; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].height = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.width = 40*1024; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.height = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].planeType = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = (void *)pObj->algLinkCreateParams.pWeightPDBuf; ... } //for setting the external flag AlgorithmLink_objectDetectionSetIOArgs() { ... pObj->inArgs.pdConfig.useExtWeightsPD = 1; //before "0" ... } //for file read Void Chains_ReadAdaboostFromFile(AlgorithmLink_ObjectDetectionCreateParams *pOdPrm, char *fileName) { Int32 status; UInt32 dataSize = 0; pOdPrm->pTransBuf = OSA_memAllocSR(OSA_HEAPID_DDR_CACHED_SR1, PD_FILE_MAX_SIZE, 128); if(!pOdPrm->pTransBuf) { Vps_printf("Adaboost memory alloc error!!\n"); } status = OSA_fileReadFile( fileName, pOdPrm->pTransBuf, PD_FILE_MAX_SIZE, &dataSize ); if(status == OSA_EFAIL) { Vps_printf("Adaboost file read error!!\n"); } OSA_memCacheWb((Uint32)pOdPrm->pTransBuf, (Uint32)pOdPrm->pTransBuf + (PD_FILE_MAX_SIZE)); pOdPrm->pWeightPDBuf = OSA_memVirt2Phys((UInt32)pOdPrm->pTransBuf, OSA_MEM_REGION_TYPE_AUTO); } I ran the usecase on Linux. Best regards, Heechang + +Heechang >> I ran the object detection usecase but it looks same result before the read the binary file. Did you try checking the output detections and score? Does it give the same number of detections and values? + +I tested it with still images. It is same for detecting tree or traffic signal as a person. The number of detections is same. Could you check my code that is correct or not? I did training with INRIA dataset. So, I additionally do training more dataset including INRIA dataset. Best regards, Heechang + +Hi Shyam, It looks that it is no taking effect. I modified the code for testing like below. pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = NULL; The test result is same. But, I confirmed that the file buffer was filled. Best regards, Heechang + +I'm working on Linux not RTOS. + +If I comment the OSA_memVirt2Phys() like below, the result is same. //pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = (void*)pObj->algLinkCreateParams.pWeightPDBuf; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = pObj->algLinkCreateParams.pTransBuf; // file read // pOdPrm->pWeightPDBuf = OSA_memVirt2Phys((UInt32)pOdPrm->pTransBuf, OSA_MEM_REGION_TYPE_AUTO); There is no taking effect. What's the problem? Is the external binary of the PD working on Linux? Best regards, Heechang + +Hi Shyam, I enabled enablePD in usecase function. Its value is set pObj->inArgs.pdConifg.enablePD = pObj->algLinkCreateParams.enablePD in AlgorithmLink_objectDetectionSetIOArgs(). But, If I set in here like pObj->inArgs.pdConifg.enablePD = 1 or 0, it is not taking effect. This "AlgorithmLink_objectDetectionSetIOArgs" function is called but, the pdConfig values is no taking effect!! So, I guess that the useExtWeightsPD also is not taking effect. What is problem? Best regards, Heechang + +In AlgorithmLink_objectDetectionProcess(), I set useExtWeightsPD. But the result is same. BR, Heechang + +Hi Heechang, We have certainly verified the functionality of providing weights externally to the OD library. But in the Linux usecase scenario we are yet to try it out. It is possible that something is broken, so kindly allow us some time to investigate. We will post updates on this thread once we've reproduced and fixed the issue. Regards, Shyam + +Hi Shyam, Okay, thank you very much. I think that something is strange on Linux. Best regards, Heechang + +Hi Shyam, I have a question. Then, if I use external binary file on RTOS, it was verified? I will try it on RTOS, too. Best regards, Heechang + +Hi Heechang, We have only tested the OD library with this feature, so we will be investigating both on RTOS and Linux. Please feel free to try RTOS as well. Regards, Shyam + +Hi Shyam, I'm trying out training model with OD library on Windows10. I read the document that "3.3.6 Building the Test Application Executable through GMAKE" in Objectdetection_DSP_Userguide.pdf. I followed this description but when I build the makefile at "4) Build the sample test application project by gmake" the build error is shown. "System cannot find the path specified" I installed the file followed by "3.3 Building Sample Test Application". Should I modify the makefile? Best regards, Heechang + +In \makerules\config.mk, there are the path of tools. I think it should be modified, right? BR, Heechang + +If right, what the path of the ARP32_TOOLS and TIARM_TOOLS are correct path in VSDK3.6? And the VXLIB_PATH is VLIB PATH? BR, Heechang + +I modified the path in config.mk. When I build the error is shown. compiling .\.\src\object_detection_config.c >> WARNING: more than one source file is specified; preprocessor output will be generated for last file only [Files.] Fatal error: cannot open source file "Files" 1 catastrophic error detected in the compilation of "Files". Compilation terminated. >> Compilation failure make: *** [C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\algorithms\REL.200.V.OD.C66X.00.06.02..] error 1 What is problem? BR, Heechang + +DSP_TOOLS ?="C:\cgt8.3.1" ARP32_TOOLS ?="C:\ti\ccsv8\tools\compiler\gcc-arm-none-eabi-7-2017-q4-major-win32" TIARM_TOOLS ?="C:\ti\ccsv8\tools\compiler\ti-cgt-arm_18.1.4.LTS" XDAIS_PATH ?="C:\ti\ccsv8\xdais_7_24_00_04" UTILS_PATH ?="C:\ti\ccsv8\utils\cygwin" VXLIB_PATH ?="C:\ti\vlib_c66x_3_3_2_0" DMAUTILS_PATH ?="C:\Program Files (x86)\REL.DMAUTILS.00.08.00.02\REL.DMAUTILS.00.08.00.02\dmautils" ALGFRAMEWORK_PATH ?=$(ALGBASE_PATH)/algframework I modified the path like above BR, Heechang + +Can you try installing DMAUTILS in a different path? the c:\Program Files (x86) path could be causing some problem. Regards, Shyam + +I modified the path like this("C:\ti\REL.DMAUTILS.00.08.00.02\dmautils") but the error is same. BR, Heechang + +Please tell me if I should modify the configure or path. DSP_TOOLS ?="C:\cgt8.3.1" ARP32_TOOLS ?="C:\ti\ccsv8\tools\compiler\gcc-arm-none-eabi-7-2017-q4-major-win32" TIARM_TOOLS ?="C:\ti\ccsv8\tools\compiler\ti-cgt-arm_18.1.4.LTS" XDAIS_PATH ?="C:\ti\ccsv8\xdais_7_24_00_04" UTILS_PATH ?="C:\ti\ccsv8\utils\cygwin" VXLIB_PATH ?="C:\ti\vlib_c66x_3_3_2_0" DMAUTILS_PATH ?="C:\ti\REL.DMAUTILS.00.08.00.02\dmautils" ALGFRAMEWORK_PATH ?=$(ALGBASE_PATH)/algframework I modified the config.mk like above. BR, Heechang + +What is your ALGBASE_PATH ? where is it installed? You can provide in quotes and check as well, ALGFRAMEWORK_PATH ?="$(ALGBASE_PATH)\algframework" + + ALGBASE_PATH ?= $(abspath ../../../) include $(ALGBASE_PATH)/makerules/config.mk The makefile is in "\ti_components\algorithms\REL.200.V.OD.C66X.00.06.02.00\200.V.OD.C66X.00.06\modules\ti_object_detection\test" BR, Heechang + +I start again from the beginning. 1. Open TI_CCS. 2. Import->C/C++->Existing Code as Makefile Project 3. Open "200.V.OD.C66X.00.06" 4. Language checkbox check the "c, c++" 5. Toolchain for Indexer Settings -> TI Build Tools? or Cross GCC? BR, Heechang + +3.Open "200.V.OD.C66X.00.06" means the path of the "\200.V.OD.C66X.00.06\modules\ti_object_detection\test" BR, Heechang + +5. Toolchain for Indexer Settings -> TI Build Tools If I select this, the error is same. BR, Heechang + +I'm using the CCS Version: 8.3.0.00009 on Windows. BR, Heechang + +Heechang, Did you go over the steps in User Guide for OD? It is there in ti_object_detection\docs folder. Also we support only a makefile based build not CCS import. Regards, Shyam + +Hi Shyam, I also build a makefile not CCS. But build error is same, so I tried out importing to CCS. BR, Heechang + +Hi Shyam, I start again from the beginning. I removed and downloaded all. And set the path. I build successfully. I don't know why the build error was shown. Thanks. I get the output in path of "\modules\ti_object_detection\lib\dsp\release\ti_object_detection.lib" After I replace the library then build the vision_sdk? BR, Heechang + +Hi Shyam, In object_detecction.cfg, if I apply trained model, only enablePD=1 , enableTSR =0 and enableVD=0 is OK? And set the useExtWeightsPD = 1. BR, Heechang + +Hi Shyam, In userguide, "Open CCS with TDA2x platform selected configuration file. Select Target > Load Program on C66x DSP, browse to the modules\ti_object_detection\test\out sub-directory, select the executable created in step 5, and load it into Code Composer Studio in preparation for execution." In CCS, where is the Target->Load Program in menu bar? BR, Heechang + +Hi Heechang, In objectgDetectionLink_priv.h, in the the declaration of the structure 'AlgorithmLink_ObjectDetectionObj', try replacing IVISION_BufDesc inBufDesc ---> IVISION_BufDesc inBufDesc[TI_OD_IN_BUFDESC_TOTAL]; Also, in the function AlgorithmLink_objectDetectionCreate() in the file objectDetectionLink_algPlugin.c just before the AlgorithmLink_objectDetectionInitIOBuffers(pObjectDetectObj); is called change or add, pObjectDetectObj->inBufDescList[TI_OD_IN_BUFDESC_FEATURE_PLANES] = &pObjectDetectObj->inBufDesc[0]; pObjectDetectObj->inBufDescList[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS] = &pObjectDetectObj->inBufDesc[1]; instead of pObjectDetectObj->inBufDescList[TI_OD_IN_BUFDESC_FEATURE_PLANES] = &pObjectDetectObj->inBufDesc; I hope this will work for you. :) Regards, Ganesh + +Hi Ganesh, Is your method for using external binary weights, right? I will apply your method. I'm now using OD library. I will share the result for your suggestion. Thank you. Best regards, Heechang + +Hi Ganesh, It doesn't work in my case. (The result is same.) I'm working on Linux. Thank you for your suggestion. Best regards, Heechang + +Hi Shyam, I build it successfully. How can I apply this? In folder "\modules\ti_object_detection\lib\dsp\release", the "ti_object_detection.lib" is generated. Should I replace this library and new "pd_adaboost_weights.bin"? Best regards, Heechang + +The new generated library file is same with before. So, I think that it cannot apply for usecase. BR, Heechang + +Hi Ganesh, Did you improve the PD with external weights? I'm working two cases on Linux. (1) One is the high level(using pd_adaboost_weights.bin) that the binary file read and run the usecase. (2) Another is using OD library. In case of (1), as you can this thread, I think that I applied the code TI suggests. But, the result looks no taking effect for new training binary. Do you think that something is added for code? Best regards, Heechang + +Hi Heechang, I read the external bin file from the sdcard into vision sdk in chains_vipSingleCameraObjectDetect2Tda3xx_SetObjectDetectPrm() by using another function Void ChainsCommon_od_adaboost_externalWeights_ReadExtWeightsFromFile(AlgorithmLink_ObjectDetectionCreateParams *pOD_Prm, char *extWeightsPDfileName) { Int32 status; UInt32 dataSize = 0;//, copySize; pOD_Prm->pExtAdaboostWeignts_PD = Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR, MAX_ADABOOST_WEIGHT_SIZE_PD, 128); UTILS_assert(pOD_Prm->pExtAdaboostWeignts_PD!=NULL); //Vps_printf("\n ----------> CHAINS: External Adaboost Weights File Address Before Read: %lu !!!\n\n", pOD_Prm->pExtAdaboostWeignts_PD); status = Utils_fileReadFile( extWeightsPDfileName, pOD_Prm->pExtAdaboostWeignts_PD, MAX_ADABOOST_WEIGHT_SIZE_PD, &dataSize ); Vps_printf("\n ----------> CHAINS: External Adaboost Weights File Address After Read: %lu !!!\n\n", pOD_Prm->pExtAdaboostWeignts_PD); UTILS_assert(status==SYSTEM_LINK_STATUS_SOK); } --------------------------------------------------------------------------- then in AlgorithmLink_objectDetectionInitIOBuffers() , I assign the pointer to the buf, which i had declared....(told you about this in previous mail) #ifdef ENABLE_DEBUG_PRINTS_OD Int32 *pointer_Temp = NULL; // variable to verify the correctness of the external adaboost read #endif if(pObj->algLinkCreateParams.enableExtAdaboostWeights == 1) { pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->numPlanes = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.x = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.topLeft.y = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].width = MAX_ADABOOST_WEIGHT_SIZE_PD; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].height = 1; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.width = pInBufs->bufDesc[TI_OD_IN_BUFDESC_FEATURE_PLANES]->bufPlanes[0].width; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].frameROI.height = pInBufs->bufDesc[TI_OD_IN_BUFDESC_FEATURE_PLANES]->bufPlanes[0].frameROI.height; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].planeType = 0; pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf = (void *)pObj->algLinkCreateParams.pExtAdaboostWeignts_PD; #ifdef ENABLE_DEBUG_PRINTS_OD // FSD - Prints to verify the correctness of external Adaboost bin file reading Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Using External Weights!! \n"); Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Buf Address = %lu !! \n", (void *)pObj->algLinkCreateParams.pExtAdaboostWeignts_PD); Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Buf Address = %lu !! \n", pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf); Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Buf[0] = %u !! \n", (*(int *)(pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf))); pointer_Temp=pInBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]->bufPlanes[0].buf; Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Buf[1] = %u !! \n", (*(pointer_Temp + 1))); Vps_printf("\n--------------AlgorithmLink_objectDetectionInitIOBuffers(): Buf[2] = %u !! \n", (*(pointer_Temp + 2))); #endif --------------------------------------------- I read the external bin file in OD test application, open memory browser and check the values at the memory where the external file is read. In vision sdk, in the above code I print the first two values of buf and compare them to the ones i read in OD test application. For me they come same , so I guess the external weights are being read correctly from SDcard and passed successfully to the OD code. --------------------------------------------- As of now I used Caltech dataset to train adaboost using the matlab tool at github.com/.../acf-jacinto but was not able to improve the accuracy in PD. Still working on it! Thanks and Regards, Ganesh + +Hi Ganesh, I also checked the buffer. It was correct. But, the accuracy of the PD is not better before. I did training model with the INRIA and Caltech-USA. Thank you very much. Best regards, Heechang + +I have a question. On which scenario is the accuracy "not better"? For the results to improve, the images used in training should be similar to that in test. I think one cannot add more Caltech images in training and expect to get better results in INRIA test. + +Hi Heechang, Yes even I trained the model with INRIA and Caltech-USA dataset. The results for PD are not better. I tested the it live on TDA3 with OV2775 2Mp camera in my office and also outside the office for some time. The results were better in case of the default Adaboost model provided by TI. I think our aim is same, maybe we can discuss this one to one on how can we improve the accuracy. If you are open for discussion write me on rotgo39@gmail.com If you find something which might improve the accuracy kindly let me know. I will write you from my side. Thanks and Regards, Ganesh + diff --git a/data2/text/range/20001-25000/792906.txt b/data2/text/range/20001-25000/792906.txt new file mode 100644 index 0000000000000000000000000000000000000000..28522bb11f9112caec65f4877432cf5b709f379e --- /dev/null +++ b/data2/text/range/20001-25000/792906.txt @@ -0,0 +1,370 @@ +Ticket Name: Linux/TDA2EVM5777: Can't get kernel image, wrong image format for bootm + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi, I have successfully build the vsdk on the linux without any compilation or build error. However, following the guidelines in order to run the usecase on the tda2 built from linux, I made the bootable sd card and transferred the files into it. I ended with this error, I have no clue of solving this problem. Can anyone help me figure it out. Thank you. With best regards, H.M. Owais + +Responses: +Hi, here are a few things to check: - SYSBOOT pins are configured correctly as described in chapter "4.2 Preparing SD card & Boot" in VisionSDK_Linux_UserGuide.pdf - you have "fdtfile=dra7-evm-infoadas.dtb" in uenv.txt - at u-boot prompt you run following commands and retry: env default -fa saveenv Regards, Yordan + +Hi Yordan, Thank you for your response. I have went through the procedure you suggested me. It reset to the default environment and saved it but the the problem is still there. I can't even go to the root. Is there anything else I can do to fix it? With best regards, H.M. Owais + +Hi, can you copy the complete log from the beginning and post it here as text file? Also can you show the output of 'printenv' command at u-boot prompt? Regards, Yordan + +8750.boot.txt U-Boot SPL 2016.05-00013-g3331a8a-dirty (Apr 10 2019 - 11:19:50) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +** First descriptor is NOT a primary desc on 1:1 ** +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05-00013-g3331a8a-dirty (Apr 10 2019 - 11:19:50 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV H.0 +DRAM: 4 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +173 bytes read in 7 ms (23.4 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3553296 bytes read in 390 ms (8.7 MiB/s) +** File not found /boot/dra7-evm-infoadas.dtb ** +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363810 ] +ERROR: Did not find a cmdline Flattened Device Tree +Could not find a valid device tree +** First descriptor is NOT a primary desc on 1:1 ** +switch to partitions #0, OK +mmc1(part 0) is current device +** First descriptor is NOT a primary desc on 1:1 ** +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +Booting from eMMC ... +Wrong Image Format for bootm command +ERROR: can't get kernel image! +=> env default -fa +## Resetting to default environment +=> saveenv +Saving Environment to MMC... +Writing to MMC(1)... done +=> +=> +=> +=> root +Unknown command 'root' - try 'help' +=> printenv +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baudrate=115200 +board=dra7xx +board_name=dra7xx +boot_fdt=try +boot_fit=0 +boot_os=0 +bootargs=androidboot.serialno=${serial#} +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyO0,115200n8 +cpu=armv7 +dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 +dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 +dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 +dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 +dfu_bufsiz=0x10000 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +fdt_addr_r=0x88000000 +fdtaddr=0x88000000 +fdtfile=undefined +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=0 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} +partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=ti +vram=16M + +Environment size: 7102/131067 bytes +=> + + Hi Yordan, Thank you for your quick reply, attached file contains the complete log. Thank you. With best regards, H.M. Owais + +Hi, can you check if you have "dra7-evm-infoadas.dtb" in /boot directory on the 2nd partition of the SD card? Regards, Yordan + +No, It's not there + +I have copied that file into that particular folder from the sdk boot folder, it has initialized the kernel but got stuck after several seconds. What possibly can be the reason of having these issues although I followed the userguide properly. I believe, there may be some other files are missing. Thank you. With best regards, H.M. Owais + +Hi, the default DTBs for a particular build config are defined in vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk as: DEFAULT_DTB := dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb then "make linux_install" command should copy them from "ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/" (the kernel source) to "ti_components/os_tools/linux/targetfs/boot/" (the rootfs) from where they should go to the SD card when it is created. I am not sure where could be the problem in your case. Can you copy dra7-evm-infoadas.dtb from "ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/" to the /boot directory on the SD card and see if it works? Regards, Yordan + +Hi, can you attach the log where the kernel stops? regards, Yordan + +Hi Yordan, I repeated the procredure again, building from the beginning and checking that every file should be perfectly copied. Moreover, this time I copied prebuild binaries, tidsk given at the ti website. I successfully reached the root and tried to run the apps.out. However, when I run it, I can't see any usecase main display to access demos instead I get this strange log which keeps on giving me attaching file to processing units. Can you check what's wrong with my system? I have attached the file which contains complete log. apps_out.txt root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh +insmod: ERROR: could not insert module ./bin/memcache.ko: File exists +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +mknod: /dev/memcache: File exists +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + + ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! + No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + + ### WARNING ###: use the following I2C [read | write] commands at your own risk! + No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb697f000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d7f000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3cbf000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3cff000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: IPU1-0 Remote Log Shared Memory @ 0xa0200000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 + [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [IPU1-0] 1957.479259 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1958.479289 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1959.479320 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1960.479350 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1961.479381 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1962.479411 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1963.479442 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1964.479442 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [HOST ] 1964.546391 s: SYSTEM: System A15 Init in progress !!! + [HOST] [DSP1 ] 1957.570853 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1958.570883 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1959.570914 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1960.570944 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1961.570975 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1962.571005 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1963.571036 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1956.710852 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1957.710882 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1958.710882 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1959.710913 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1960.710943 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1961.710974 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1962.711004 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1963.711035 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1964.571066 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1964.711065 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1965.479472 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1965.571066 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1965.711096 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1966.479503 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1966.571097 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1966.711096 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1967.479533 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1967.571127 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1967.711126 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1968.479564 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1968.571158 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1968.711157 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1969.479594 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1969.571188 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1969.711187 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1970.479625 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1970.571219 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1970.711218 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1971.479655 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1971.571249 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1971.711248 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1972.479686 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1972.571280 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1972.711279 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1973.479686 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1973.571280 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1973.711309 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1974.479716 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1974.571310 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1974.711340 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1975.479747 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1975.571341 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1975.711340 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1976.479777 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1976.571371 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1976.711370 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1977.479808 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1977.571402 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1977.711401 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [IPU1-0] 1978.479838 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1978.571432 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1978.711431 s: SYSTEM: Attaching to [IPU2] ... + +Hi Hafiz, as the original issue was resolved, can you close this thread and open a new one for the apps.out issue. It is useful to have separate threads for the different issues for the purpose of searching. Regards, Yordan + diff --git a/data2/text/range/20001-25000/802562.txt b/data2/text/range/20001-25000/802562.txt new file mode 100644 index 0000000000000000000000000000000000000000..6a9293774f51787639f8910b52073f2d47b89b36 --- /dev/null +++ b/data2/text/range/20001-25000/802562.txt @@ -0,0 +1,24 @@ +Ticket Name: Linux/TDA2EVM5777: Alg_framecopy + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux I create "NullSource -> VPE -> Alg_FrameCopy ->Display" usecase for test, but it can not output video frame correctly. when I use "NullSource -> VPE ->Display" to output, it works well. why Alg_FrameCopy can't work properly? + +Responses: +HI, Please refer below usecase vision_sdk\apps\src\rtos\usecases\vip_single_cam_frame_copy Make sure you are setting framecopy params properly. Please share the log after pressing p when the usecase has run for 1 min. Regards, Anuj + +Alg_FrameCopyPrm config pUcObj->Alg_FrameCopyPrm.baseClassCreate.algId = ALGORITHM_LINK_A15_ALG_FRAMECOPY; pUcObj->Alg_FrameCopyPrm.maxHeight = 1208; pUcObj->Alg_FrameCopyPrm.maxWidth = 1920; pUcObj->Alg_FrameCopyPrm.numOutputFrames = 3; .txt file NullSource(A15) -> VPE -> Alg_FrameCopy(A15) -> VPE_2 -> Display cfg.mk file ALG_framecopy=yes NEED_PROC_IPU1=yes NEED_PROC_A15_0=yes Please help me. + +[HOST] [HOST ] 144.171262 s: [ ALG_FRAMECOPY ] Link Statistics, [HOST] [HOST ] 144.171262 s: ****************************** [HOST] [HOST ] 144.171262 s: [HOST] [HOST ] 144.171262 s: Elapsed time = 108649 msec [HOST] [HOST ] 144.171292 s: [HOST] [HOST ] 144.171292 s: New data Recv = 4.99 fps [HOST] [HOST ] 144.171292 s: [HOST] [HOST ] 144.171292 s: Input Statistics, [HOST] [HOST ] 144.171292 s: [HOST] [HOST ] 144.171292 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 144.171323 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 144.171323 s: -------------------------------------------------- [HOST] [HOST ] 144.171323 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 144.171323 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 144.171353 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 144.171353 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 144.171353 s: [HOST] [HOST ] 144.171353 s: Output Statistics, [HOST] [HOST ] 144.171353 s: [HOST] [HOST ] 144.171384 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 144.171384 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 144.171384 s: --------------------------------------------- [HOST] [HOST ] 144.171384 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 144.171384 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 144.171414 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 144.171414 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 144.171414 s: [HOST] [HOST ] 144.171414 s: [ ALG_FRAMECOPY ] LATENCY, [HOST] [HOST ] 144.171445 s: ******************** [HOST] [HOST ] 144.171445 s: Local Link Latency : Avg = 2780 us, Min = 2379 us, Max = 8204 us, [HOST] [HOST ] 144.171445 s: Source to Link Latency : Avg = 43907 us, Min = 39285 us, Max = 71188 us, + +Hi, Please share complete log. As i can see alg_framecopy is not dropping any frames. So there should not be any issue with framecopy. Regards, Anuj + +[HOST] [HOST ] 215.542609 s: New data Recv = 5.0 fps [HOST] [HOST ] 215.542609 s: Release data Recv = 5.0 fps [HOST] [HOST ] 215.542609 s: Driver/Notify Cb = 5.0 fps [HOST] [HOST ] 215.542609 s: [HOST] [HOST ] 215.542640 s: Input Statistics, [HOST] [HOST ] 215.542640 s: [HOST] [HOST ] 215.542640 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.542640 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.542640 s: -------------------------------------------------- [HOST] [HOST ] 215.542640 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.542670 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.542670 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.542670 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.542701 s: [HOST] [HOST ] 215.542701 s: Output Statistics, [HOST] [HOST ] 215.542701 s: [HOST] [HOST ] 215.542701 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.542701 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.542701 s: --------------------------------------------- [HOST] [HOST ] 215.542731 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.542731 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.542731 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.542731 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.542762 s: [HOST] [HOST ] 215.542762 s: [ IPC_OUT_0 ] LATENCY, [HOST] [HOST ] 215.542762 s: ******************** [HOST] [HOST ] 215.542762 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [HOST] [HOST ] 215.542792 s: Source to Link Latency : Avg = 82 us, Min = 30 us, Max = 122 us, [HOST] [HOST ] 215.542792 s: [HOST] [IPU2 ] 215.541999 s: [HOST] [IPU2 ] 215.542060 s: [HOST] [IPU2 ] 215.543616 s: [HOST] [IPU2 ] 215.543646 s: [ IPC_IN_0 ] Link Statistics, [HOST] [IPU2 ] 215.543707 s: ****************************** [HOST] [IPU2 ] 215.543768 s: [HOST] [IPU2 ] 215.543829 s: Elapsed time = 152695 msec [HOST] [IPU2 ] 215.543890 s: [HOST] [IPU2 ] 215.543921 s: Get Full Buf Cb = 5.0 fps [HOST] [IPU2 ] 215.544012 s: Put Empty Buf Cb = 20.1 fps [HOST] [IPU2 ] 215.544073 s: Driver/Notify Cb = 38.33 fps [HOST] [IPU2 ] 215.544165 s: [HOST] [IPU2 ] 215.544195 s: Input Statistics, [HOST] [IPU2 ] 215.544256 s: [HOST] [IPU2 ] 215.544287 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.544378 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.544439 s: -------------------------------------------------- [HOST] [IPU2 ] 215.544561 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.544714 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.544836 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.544958 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.545110 s: [HOST] [IPU2 ] 215.545141 s: Output Statistics, [HOST] [IPU2 ] 215.545202 s: [HOST] [IPU2 ] 215.545232 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.545293 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.545385 s: --------------------------------------------- [HOST] [IPU2 ] 215.545507 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.553986 s: [HOST] [HOST ] 215.553986 s: [ IPC_IN_0 ] Link Statistics, [HOST] [HOST ] 215.553986 s: ****************************** [HOST] [HOST ] 215.553986 s: [HOST] [HOST ] 215.553986 s: Elapsed time = 152668 msec [HOST] [HOST ] 215.554016 s: [HOST] [HOST ] 215.554016 s: Get Full Buf Cb = 5.0 fps [HOST] [HOST ] 215.554016 s: Put Empty Buf Cb = 20.1 fps [HOST] [HOST ] 215.554016 s: Driver/Notify Cb = 4.99 fps [HOST] [HOST ] 215.554016 s: [HOST] [HOST ] 215.554047 s: Input Statistics, [HOST] [HOST ] 215.554047 s: [HOST] [HOST ] 215.554047 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.554047 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.554047 s: -------------------------------------------------- [HOST] [HOST ] 215.554047 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554077 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554077 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554077 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554108 s: [HOST] [HOST ] 215.554108 s: Output Statistics, [HOST] [HOST ] 215.554108 s: [HOST] [HOST ] 215.554108 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.554108 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.554108 s: --------------------------------------------- [HOST] [HOST ] 215.554138 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554138 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554138 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554138 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554169 s: [HOST] [HOST ] 215.554169 s: [ IPC_IN_0 ] LATENCY, [HOST] [HOST ] 215.554169 s: ******************** [HOST] [HOST ] 215.554169 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 640 us, [HOST] [HOST ] 215.554199 s: Source to Link Latency : Avg = 36954 us, Min = 36875 us, Max = 38584 us, [HOST] [HOST ] 215.554199 s: [HOST] [HOST ] 215.554199 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ IPU2 -> HOST ] , [HOST] [HOST ] 215.554199 s: *************************************************************** [HOST] [HOST ] 215.554199 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 288, Min = 183, Max = 1800 [HOST] [HOST ] 215.554230 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 226, Min = 122, Max = 1433 [HOST] [HOST ] 215.554291 s: [HOST] [HOST ] 215.554291 s: [ ALG_FRAMECOPY ] Link Statistics, [HOST] [HOST ] 215.554291 s: ****************************** [HOST] [HOST ] 215.554291 s: [HOST] [HOST ] 215.554291 s: Elapsed time = 152667 msec [HOST] [HOST ] 215.554321 s: [HOST] [HOST ] 215.554321 s: New data Recv = 4.99 fps [HOST] [HOST ] 215.554321 s: [HOST] [HOST ] 215.554321 s: Input Statistics, [HOST] [HOST ] 215.554321 s: [HOST] [HOST ] 215.554321 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.554321 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.554352 s: -------------------------------------------------- [HOST] [HOST ] 215.554352 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554352 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554352 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554382 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554382 s: [HOST] [HOST ] 215.554382 s: Output Statistics, [HOST] [HOST ] 215.554382 s: [HOST] [HOST ] 215.554382 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.554413 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.554413 s: --------------------------------------------- [HOST] [HOST ] 215.554413 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554413 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554443 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554443 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554443 s: [HOST] [HOST ] 215.554443 s: [ ALG_FRAMECOPY ] LATENCY, [HOST] [HOST ] 215.554443 s: ******************** [HOST] [HOST ] 215.554474 s: Local Link Latency : Avg = 2755 us, Min = 2379 us, Max = 7778 us, [HOST] [HOST ] 215.554474 s: Source to Link Latency : Avg = 43928 us, Min = 39346 us, Max = 68719 us, [HOST] [HOST ] 215.554474 s: [HOST] [HOST ] 215.554535 s: [HOST] [HOST ] 215.554535 s: [ IPC_OUT_1 ] Link Statistics, [HOST] [HOST ] 215.554535 s: ****************************** [HOST] [HOST ] 215.554565 s: [HOST] [HOST ] 215.554565 s: Elapsed time = 152660 msec [HOST] [HOST ] 215.554565 s: [HOST] [HOST ] 215.554565 s: New data Recv = 20.1 fps [HOST] [HOST ] 215.554565 s: Release data Recv = 10.4 fps [HOST] [HOST ] 215.554596 s: Driver/Notify Cb = 15.3 fps [HOST] [HOST ] 215.554596 s: [HOST] [HOST ] 215.554596 s: Input Statistics, [HOST] [HOST ] 215.554596 s: [HOST] [HOST ] 215.554596 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.554596 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.554626 s: -------------------------------------------------- [HOST] [HOST ] 215.554626 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554626 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554626 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554657 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [HOST ] 215.554657 s: [HOST] [HOST ] 215.554657 s: Output Statistics, [HOST] [HOST ] 215.554657 s: [HOST] [HOST ] 215.554657 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.554657 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.554687 s: --------------------------------------------- [HOST] [HOST ] 215.554687 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554687 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554687 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554718 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [HOST ] 215.554718 s: [HOST] [HOST ] 215.554718 s: [ IPC_OUT_1 ] LATENCY, [HOST] [HOST ] 215.554718 s: ******************** [HOST] [HOST ] 215.554718 s: Local Link Latency : Avg = 2 us, Min = 0 us, Max = 61 us, [HOST] [HOST ] 215.554748 s: Source to Link Latency : Avg = 43987 us, Min = 39407 us, Max = 68780 us, [HOST] [HOST ] 215.554748 s: [HOST] [IPU2 ] 215.545629 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.545720 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.545842 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.545995 s: [HOST] [IPU2 ] 215.546025 s: [ IPC_IN_0 ] LATENCY, [HOST] [IPU2 ] 215.546086 s: ******************** [HOST] [IPU2 ] 215.546147 s: Local Link Latency : Avg = 17 us, Min = 0 us, Max = 92 us, [HOST] [IPU2 ] 215.546269 s: Source to Link Latency : Avg = 377 us, Min = 274 us, Max = 549 us, [HOST] [IPU2 ] 215.546391 s: [HOST] [IPU2 ] 215.546452 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ HOST -> IPU2 ] , [HOST] [IPU2 ] 215.546544 s: *************************************************************** [HOST] [IPU2 ] 215.546635 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 307, Min = 213, Max = 458 [HOST] [IPU2 ] 215.546757 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 256, Min = 152, Max = 397 [HOST] [IPU2 ] 215.547184 s: [HOST] [IPU2 ] 215.547245 s: [ VPE ] Link Statistics, [HOST] [IPU2 ] 215.547306 s: ****************************** [HOST] [IPU2 ] 215.547367 s: [HOST] [IPU2 ] 215.547428 s: Elapsed time = 152698 msec [HOST] [IPU2 ] 215.547520 s: [HOST] [IPU2 ] 215.547581 s: New data Recv = 5.0 fps [HOST] [IPU2 ] 215.547642 s: Get Full Buf Cb = 5.0 fps [HOST] [IPU2 ] 215.547733 s: Put Empty Buf Cb = 20.1 fps [HOST] [IPU2 ] 215.547794 s: Driver/Notify Cb = 5.0 fps [HOST] [IPU2 ] 215.547886 s: [HOST] [IPU2 ] 215.547916 s: Input Statistics, [HOST] [IPU2 ] 215.547977 s: [HOST] [IPU2 ] 215.548008 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.548099 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.548160 s: -------------------------------------------------- [HOST] [IPU2 ] 215.548252 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.548374 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.548526 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.548679 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.548801 s: [HOST] [IPU2 ] 215.548831 s: Output Statistics, [HOST] [IPU2 ] 215.548892 s: [HOST] [IPU2 ] 215.548923 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.549014 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.549075 s: --------------------------------------------- [HOST] [IPU2 ] 215.549167 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.549258 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.549380 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.549533 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.549685 s: [HOST] [IPU2 ] 215.549716 s: [ VPE ] LATENCY, [HOST] [IPU2 ] 215.549777 s: ******************** [HOST] [IPU2 ] 215.549838 s: Local Link Latency : Avg = 35615 us, Min = 35594 us, Max = 35717 us, [HOST] [IPU2 ] 215.549960 s: Source to Link Latency : Avg = 36325 us, Min = 36265 us, Max = 36449 us, [HOST] [IPU2 ] 215.550051 s: [HOST] [IPU2 ] 215.550417 s: [HOST] [IPU2 ] 215.550509 s: [ IPC_OUT_0 ] Link Statistics, [HOST] [IPU2 ] 215.550570 s: ****************************** [HOST] [IPU2 ] 215.550631 s: [HOST] [IPU2 ] 215.550661 s: Elapsed time = 152665 msec [HOST] [IPU2 ] 215.550753 s: [HOST] [IPU2 ] 215.550783 s: New data Recv = 5.0 fps [HOST] [IPU2 ] 215.550844 s: Release data Recv = 20.1 fps [HOST] [IPU2 ] 215.550936 s: Driver/Notify Cb = 53.35 fps [HOST] [IPU2 ] 215.550997 s: [HOST] [IPU2 ] 215.551058 s: Input Statistics, [HOST] [IPU2 ] 215.551088 s: [HOST] [IPU2 ] 215.551149 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.551210 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.551302 s: -------------------------------------------------- [HOST] [IPU2 ] 215.551393 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.551546 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.551668 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.551790 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.551942 s: [HOST] [IPU2 ] 215.551973 s: Output Statistics, [HOST] [IPU2 ] 215.552034 s: [HOST] [IPU2 ] 215.552064 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.552125 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.552217 s: --------------------------------------------- [HOST] [IPU2 ] 215.552278 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.552400 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.552552 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.552674 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.552796 s: [HOST] [IPU2 ] 215.552857 s: [ IPC_OUT_0 ] LATENCY, [HOST] [IPU2 ] 215.552888 s: ******************** [HOST] [IPU2 ] 215.552949 s: Local Link Latency : Avg = 10 us, Min = 0 us, Max = 122 us, [HOST] [IPU2 ] 215.553071 s: Source to Link Latency : Avg = 36695 us, Min = 36540 us, Max = 36875 us, [HOST] [IPU2 ] 215.553193 s: [HOST] [IPU2 ] 215.555541 s: [HOST] [IPU2 ] 215.555603 s: [ IPC_IN_1 ] Link Statistics, [HOST] [IPU2 ] 215.555664 s: ****************************** [HOST] [IPU2 ] 215.555725 s: [HOST] [IPU2 ] 215.555755 s: Elapsed time = 152660 msec [HOST] [IPU2 ] 215.555847 s: [HOST] [IPU2 ] 215.555877 s: Get Full Buf Cb = 10.4 fps [HOST] [IPU2 ] 215.555969 s: Put Empty Buf Cb = 20.1 fps [HOST] [IPU2 ] 215.556030 s: Driver/Notify Cb = 53.34 fps [HOST] [IPU2 ] 215.556121 s: [HOST] [IPU2 ] 215.556152 s: Input Statistics, [HOST] [IPU2 ] 215.556213 s: [HOST] [IPU2 ] 215.556243 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.556335 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.556396 s: -------------------------------------------------- [HOST] [IPU2 ] 215.556518 s: 0 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.556640 s: 1 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.556792 s: 2 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.556914 s: 3 | 5. 0 0. 0 0. 0 5. 0 [HOST] [IPU2 ] 215.557036 s: [HOST] [IPU2 ] 215.557097 s: Output Statistics, [HOST] [IPU2 ] 215.557128 s: [HOST] [IPU2 ] 215.557189 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.557250 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.557311 s: --------------------------------------------- [HOST] [IPU2 ] 215.557402 s: 0 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.557555 s: 1 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.557677 s: 2 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.557799 s: 3 | 0 5. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.557921 s: [HOST] [IPU2 ] 215.557982 s: [ IPC_IN_1 ] LATENCY, [HOST] [IPU2 ] 215.558012 s: ******************** [HOST] [IPU2 ] 215.558073 s: Local Link Latency : Avg = 22 us, Min = 0 us, Max = 92 us, [HOST] [IPU2 ] 215.558195 s: Source to Link Latency : Avg = 44257 us, Min = 39712 us, Max = 69054 us, [HOST] [IPU2 ] 215.558317 s: [HOST] [IPU2 ] 215.558378 s: [ IPC_IN_1 ] Detailed IPC Latency Statistics [ HOST -> IPU2 ] , [HOST] [IPU2 ] 215.558500 s: *************************************************************** [HOST] [IPU2 ] 215.558592 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 285, Min = 183, Max = 457 [HOST] [IPU2 ] 215.558714 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 215, Min = 122, Max = 366 [HOST] [IPU2 ] 215.559141 s: [HOST] [IPU2 ] 215.559232 s: [ VPE ] Link Statistics, [HOST] [IPU2 ] 215.559293 s: ****************************** [HOST] [IPU2 ] 215.559354 s: [HOST] [IPU2 ] 215.559385 s: Elapsed time = 152664 msec [HOST] [IPU2 ] 215.559446 s: [HOST] [IPU2 ] 215.559537 s: New data Recv = 10.4 fps [HOST] [IPU2 ] 215.559629 s: Get Full Buf Cb = 5.2 fps [HOST] [IPU2 ] 215.559690 s: Put Empty Buf Cb = 5.1 fps [HOST] [IPU2 ] 215.559751 s: Driver/Notify Cb = 10.2 fps [HOST] [IPU2 ] 215.559842 s: [HOST] [IPU2 ] 215.559873 s: Input Statistics, [HOST] [IPU2 ] 215.559934 s: [HOST] [IPU2 ] 215.559964 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.560056 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.565729 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Chains Run-time Menu [HOST] [HOST ] ==================== [HOST] [HOST ] [HOST] [HOST ] 0: Stop Chain [HOST] [HOST ] [HOST] [HOST ] p: Print Performance Statistics [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [IPU2 ] 215.560117 s: -------------------------------------------------- [HOST] [IPU2 ] 215.560208 s: 0 | 5. 0 0. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.560330 s: 1 | 5. 0 3.33 0. 0 1.67 [HOST] [IPU2 ] 215.560513 s: 2 | 5. 0 1.67 0. 0 3.33 [HOST] [IPU2 ] 215.560635 s: 3 | 5. 0 1.67 0. 0 3.33 [HOST] [IPU2 ] 215.560757 s: [HOST] [IPU2 ] 215.560818 s: Output Statistics, [HOST] [IPU2 ] 215.560849 s: [HOST] [IPU2 ] 215.560910 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.560971 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.561032 s: --------------------------------------------- [HOST] [IPU2 ] 215.561123 s: 0 | 0 0. 0 4.99 0. 0 [HOST] [IPU2 ] 215.561245 s: 1 | 0 1.67 0. 0 0. 0 [HOST] [IPU2 ] 215.561367 s: 2 | 0 3.33 0. 0 0. 0 [HOST] [IPU2 ] 215.561520 s: 3 | 0 3.33 0. 0 0. 0 [HOST] [IPU2 ] 215.561672 s: [HOST] [IPU2 ] 215.561703 s: [ VPE ] LATENCY, [HOST] [IPU2 ] 215.561764 s: ******************** [HOST] [IPU2 ] 215.561825 s: Local Link Latency : Avg = 16069 us, Min = 8997 us, Max = 17965 us, [HOST] [IPU2 ] 215.561916 s: Source to Link Latency : Avg = 65465 us, Min = 55572 us, Max = 79852 us, [HOST] [IPU2 ] 215.562038 s: [HOST] [IPU2 ] 215.562404 s: [HOST] [IPU2 ] 215.562526 s: [ DISPLAY ] Link Statistics, [HOST] [IPU2 ] 215.562587 s: ****************************** [HOST] [IPU2 ] 215.562648 s: [HOST] [IPU2 ] 215.562709 s: Elapsed time = 152658 msec [HOST] [IPU2 ] 215.562770 s: [HOST] [IPU2 ] 215.562801 s: New data Recv = 5.1 fps [HOST] [IPU2 ] 215.562892 s: Driver/Notify Cb = 60.2 fps [HOST] [IPU2 ] 215.562953 s: [HOST] [IPU2 ] 215.563014 s: Input Statistics, [HOST] [IPU2 ] 215.563045 s: [HOST] [IPU2 ] 215.563106 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.563167 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.563258 s: -------------------------------------------------- [HOST] [IPU2 ] 215.563319 s: 0 | 0. 0 0. 0 0. 0 0. 0 [HOST] [IPU2 ] 215.563502 s: 1 | 1.67 1.67 0. 0 0. 0 [HOST] [IPU2 ] 215.563624 s: 2 | 3.33 3.33 0. 0 0. 0 [HOST] [IPU2 ] 215.563746 s: 3 | 3.33 3.33 0. 0 0. 0 [HOST] [IPU2 ] 215.563899 s: [HOST] [IPU2 ] 215.563960 s: [ DISPLAY ] LATENCY, [HOST] [IPU2 ] 215.563990 s: ******************** [HOST] [IPU2 ] 215.564051 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [HOST] [IPU2 ] 215.564173 s: Source to Link Latency : Avg = 55816 us, Min = 55816 us, Max = 55816 us, [HOST] [IPU2 ] 215.564295 s: [HOST] [IPU2 ] 215.564356 s: [HOST] [IPU2 ] 215.564387 s: [ DISPLAY VID1 ] Additional Statistics, [HOST] [IPU2 ] 215.564509 s: ************************************ [HOST] [IPU2 ] 215.564570 s: Driver Queued = 1 frames [HOST] [IPU2 ] 215.564631 s: Driver De-Queued = 0 frames [HOST] [IPU2 ] 215.564692 s: Driver Displayed = 9163 frames [HOST] [IPU2 ] 215.564783 s: Driver Repeated = 9163 frames [HOST] [IPU2 ] 215.564844 s: [HOST] [IPU2 ] 215.564875 s: ##### DSS DISPC Underflow Count = 0 ##### [HOST] [IPU2 ] 215.564966 s: + +@Anuj Gupta hi, Anuj Gupta: can you resolve my problem? Thanks! e2e.ti.com/.../801885 + +Would you please help me solve this question? + +Hi, Why there are multiple VPE links. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for different issue. Regards, Anuj + diff --git a/data2/text/range/20001-25000/823163.txt b/data2/text/range/20001-25000/823163.txt new file mode 100644 index 0000000000000000000000000000000000000000..6f022bb0ba2375def207ef17ccc1e3da3bbeca3c --- /dev/null +++ b/data2/text/range/20001-25000/823163.txt @@ -0,0 +1,28 @@ +Ticket Name: Compiler/TDA2E: PROCESSOR_SDK_RADAR_03_07_00_00 Compilation error + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hello We are currently using the TDA2 SDK version number 03_07_00_00 (downloaded from TI PROCESSOR_SDK_RADAR_03_07_00_00.exe). I have followed the steps mentioned in the VisionSDK_UserGuide_TDA2xx.pdf section 2 (system requirements). My compilation works on windows environment. After doing the above step I try to compile the project tda2xx_cascade_bios_radar by using the following steps (i put this in one batch file) 1) Go to the folder C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build 2) Make a batch file compile.bat with following lines set PATH=C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;%PATH% set MAKEAPPNAME=apps set MAKECONFIG=tda2xx_cascade_bios_radar gmake -s -j8 depend >proto.txt gmake -s -j8 After about half an hour later i get following warning message on my console which i guess is not important and can be ignored for TDA2 Radar SDK compilation "C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () " The console logs detailing what is the error i am facing " C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>Compile.bat C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>set PATH=C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core;C:\Anaconda2;C:\Anaconda2\Library\mingw-w64\bin;C:\Anaconda2\Library\usr\bin;C:\Anaconda2\Library\bin;C:\Anaconda2\Scripts;C:\ProgramData\Oracle\Java\javapath;C:\WINDOWS\system32;C:\WINDOWS;C:\WINDOWS\System32\Wbem;C:\WINDOWS\System32\WindowsPowerShell\v1.0\;C:\Program Files\Gemalto\Access Client\v5\;C:\Program Files (x86)\Gemalto\Access Client\v5\;C:\Program Files\Intel\WiFi\bin\;C:\Program Files\Common Files\Intel\WirelessCommon\;C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files (x86)\Sennheiser\SoftphoneSDK\;C:\Program Files\MATLAB\R2018a\bin;C:\Program Files\Git\cmd;C:\Strawberry\c\bin;C:\Strawberry\perl\site\bin;C:\Strawberry\perl\bin;C:\Program Files\TortoiseGit\bin;C:\WINDOWS\System32\OpenSSH\;C:\Program Files\Microsoft SQL Server\130\Tools\Binn\;C:\Program Files (x86)\Microsoft SQL Server\100\Tools\Binn\;C:\Program Files\Microsoft SQL Server\100\Tools\Binn\;C:\Program Files\Microsoft SQL Server\100\DTS\Binn\;C:\Program Files\dotnet\;C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3\bin;C:\Users\djoshi\AppData\Local\Microsoft\WindowsApps;C:\Users\djoshi\AppData\Local\Programs\Microsoft VS Code\bin;D:\Todo Backup\bin\x64\ C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>set MAKEAPPNAME=apps C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>set MAKECONFIG=tda2xx_cascade_bios_radar C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>gmake -s -j8 depend 1>proto.txt C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () /cygdrive/c/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/links_fw/include/config': File exists /cygdrive/c/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/links_fw/include/config/apps': File exists /cygdrive/c/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir: cannot create directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_cascade_bios_radar': File exists C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' MAKEFILE.MK:33: warning: overriding commands for target `apps' MAKEFILE.MK:33: warning: ignoring old commands for target `apps' MAKEFILE.MK:56: warning: overriding commands for target `apps_eve1' MAKEFILE.MK:56: warning: ignoring old commands for target `apps_eve1' MAKEFILE.MK:67: warning: overriding commands for target `apps_eve2' MAKEFILE.MK:67: warning: ignoring old commands for target `apps_eve2' MAKEFILE.MK:78: warning: overriding commands for target `apps_eve3' MAKEFILE.MK:78: warning: ignoring old commands for target `apps_eve3' MAKEFILE.MK:89: warning: overriding commands for target `apps_eve4' MAKEFILE.MK:89: warning: ignoring old commands for target `apps_eve4' MAKEFILE.MK:105: warning: overriding commands for target `apps_ipu1_1' MAKEFILE.MK:105: warning: ignoring old commands for target `apps_ipu1_1' MAKEFILE.MK:116: warning: overriding commands for target `apps_dsp1' MAKEFILE.MK:116: warning: ignoring old commands for target `apps_dsp1' MAKEFILE.MK:151: warning: overriding commands for target `apps_ipu1_0' MAKEFILE.MK:151: warning: ignoring old commands for target `apps_ipu1_0' MAKEFILE.MK:168: warning: overriding commands for target `libs' MAKEFILE.MK:168: warning: ignoring old commands for target `libs' MAKEFILE.MK:171: warning: overriding commands for target `clean_files' MAKEFILE.MK:171: warning: ignoring old commands for target `clean_files' MAKEFILE.MK:184: warning: overriding commands for target `clean' MAKEFILE.MK:184: warning: ignoring old commands for target `clean' MAKEFILE.MK:267: warning: overriding commands for target `depend' MAKEFILE.MK:267: warning: ignoring old commands for target `depend' MAKEFILE.MK:274: warning: overriding commands for target `header' MAKEFILE.MK:274: warning: ignoring old commands for target `header' MAKEFILE.MK:279: warning: overriding commands for target `footer' MAKEFILE.MK:279: warning: ignoring old commands for target `footer' MAKEFILE.MK:285: warning: overriding commands for target `all' MAKEFILE.MK:285: warning: ignoring old commands for target `all' gmake[3]: *** No rule to make target `;'. Stop. gmake[2]: *** [depend] Error 2 gmake[1]: *** [links_fw_depend] Error 2 gmake: *** [depend] Error 2 C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>gmake -s -j8 C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_algorithm] Error 2 gmake[3]: *** [libs] Error 2 gmake[2]: *** [links_fw_libs] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 " Also Attached is the logs of Proto.txt( Generated in this step (gmake -s -j8 depend >proto.txt) Is it possibel can someone tell me whats happening here. I tried this step on various windows machine and everywhere i struck up in this step. Br Deepak Joshi Proto.txt proto.txt + +Responses: +Hi, Can you please check the thread: https://e2e.ti.com/support/processors/f/791/p/688731/2540435 Regards, Rishabh + +Hello Rishabh, Sorry the post in the https://e2e.ti.com/support/processors/f/791/p/688731/2540435 is too long and i couldn't follow what was the solution sorry for that. Can you please tell me how the issue was resolved. But based on other post i say i can ignore the "ipc_PATH does not exist" as its for Vision and not for Radar SDK compilation. + +Hi, Can you run "where gmake" and confirm it is pointing to gmake available under xdc path. Regards, Rishabh + +Hello Rishabh, Thanks for reply. C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>where gmake C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core\gmake.exe C:\Strawberry\c\bin\gmake.exe I have gmake in TI Xcdtools and also another one in Strawberry as i use Perl for some other compilation. Br Deepak Joshi + +Hi Deepak, Can you invoke the build with XDC gmake explicitly and see if it works for you. You should make sure that you are doing a clean build (Use rm -rf binaries). Regards, Rishabh + +Hello Rishabh, Based on yours suggestion i removed the other compiler Now where gmake gives following output " C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>where gmake C:\PROCESSOR_SDK_RADAR_03_07_00_00\ti_components\os_tools\windows\xdctools_3_32_01_22_core\gmake.exe" I did clean and rebuild the whole thing and still get struck in same issue like my earlier attempts "MAKEFILE.MK:285: warning: ignoring old commands for target `all' gmake[3]: *** No rule to make target `;'. Stop. gmake[2]: *** [depend] Error 2 gmake[1]: *** [links_fw_depend] Error 2 gmake: *** [depend] Error 2 C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\build>gmake -s -j8 C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () gmake[5]: *** No rule to make target `;'. Stop. gmake[4]: *** [links_common_algorithm] Error 2 gmake[3]: *** [libs] Error 2 gmake[2]: *** [links_fw_libs] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 " Even previous log file is exactly same. + +Hi Deepak, It looks like ROOTDIR is not being set properly. Can you check the approved answer from other thread: ROOTDIR is exported from "autorules_footer_cfg.mk" file & is pointing to vision_sdk installation path vision_sdk/apps/configs/autorules_footer_cfg.mk:ROOTDIR := $(vision_sdk_PATH) vision_sdk/apps/configs/autorules_footer_cfg.mk:export ROOTDIR Regards, Rishabh + +Hi Rishabh, Sorry Please help me understanding the resolved answer as i couldn't figure out what to do. So as you and the solution say its not able to find ROOTDIR path, I did following changes in autorules_footer_cfg.mk i added in line no 47 vision_sdk_PATH=C:\PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk ####my changes ROOTDIR := $(vision_sdk_PATH) Is this we have to do? this is first time we are compiling the SDK and everyone in my office are struck up in this step and somehow we couldn't understand what we need to do as we have done exactly what user guide says. Can you be tell us what exactly we need to do ? Br Deepak Joshi + +Hi Deepak, We generally build on Linux machines and have not faced this issue. We use Git Bash to verify the Windows build and the build works fine there. I am not completely sure what is going wrong in your environment. Looking at the error I think ROOTDIR is not getting set correctly. Can you try building using Git Bash. Regards, Rishabh + +Hello Rishabh, Thanks for yours help. So as you suggested i did compile using Git Bash and now i have the binaries. Br Deepak Joshi + +Hi Deepak, Glad to know that issue is resolved. Looks like the root cause is export ROOTDIR not working via command prompt. Regards, Rishabh + diff --git a/data2/text/range/20001-25000/840554.txt b/data2/text/range/20001-25000/840554.txt new file mode 100644 index 0000000000000000000000000000000000000000..886f8943c2615ddd81d573b1dc7d0f9b84c38e68 --- /dev/null +++ b/data2/text/range/20001-25000/840554.txt @@ -0,0 +1,607 @@ +Ticket Name: TDA2SA: tda2xx linux can not boot from sd + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2 Hi, I have a new custom board. It can boot BIOS from SD. But when I want to test linux boot, it has no logs displayed. My custom board has only 512MB RAM, so I had modified some files refer to ch6.6 in VisionSDK_UserGuide_MemoryMap.pdf. The SD card had formated follow the VisionSDK_Linux_UserGuide.pdf. I had tested the sd crad in tda2xx evm and it shows the u-boot message although linux can't start. How do I debug my custom board? Thanks. Terry + +Responses: +Hi Terry, I would suggest you to first try to get modified SDK working on TDA2 EVM. Then you can make same changes for custom board. Can you share the changes you have made for memory update. Regards, Rishabh + +Hi Rishabh, I am working on VSDK 3.07. The default settings could boot to linux on TDA2 evm. Do you mean I test the 512MB memory case on EVM not my custom board? attach the chages file. Terry fix.txt diff --git a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts +index 4c77254f1..359ab3977 100755 +--- a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts ++++ b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-infoadas.dts +@@ -36,17 +36,20 @@ DISABLE_PRCM(gpio6); + + /* Update the CMA regions for Vision SDK binaries */ + &ipu2_cma_pool { +- reg = <0x0 0x99000000 0x0 0x5000000>; ++ reg = <0x0 0x99000000 0x0 0x2000000>; + }; + + &dsp1_cma_pool { +- reg = <0x0 0xa1000000 0x0 0x2000000>; ++ reg = <0x0 0x9B000000 0x0 0x1000000>; + }; + + &ipu1_cma_pool { +- reg = <0x0 0x9e000000 0x0 0x2000000>; ++ reg = <0x0 0x9D000000 0x0 0x100000>; + }; + ++&dsp2_cma_pool { ++ reg = <0x0 0x9C000000 0x0 0x1000000>; ++}; + + /* Additional memory regions required for Vision SDK + * Keep this in sync with VSDK apps/build/tda2ex/mem_segment_definition_linux.xs +@@ -60,24 +63,30 @@ DISABLE_PRCM(gpio6); + status = "okay"; + }; + +- cmem_pool: cmem@A9000000 { ++ cmem_pool: cmem@9D200000 { + compatible = "shared-dma-pool"; +- reg = <0x0 0xA9000000 0x0 0x4000000>; ++ reg = <0x0 0x9D200000 0x0 0x2000000>; + no-map; + status = "okay"; + }; + + vsdk_sr1_mem: vsdk_sr1_mem@84000000 { + compatible = "shared-dma-pool"; +- reg = <0x0 0x84000000 0x0 0x10000000>; ++ reg = <0x0 0x84000000 0x0 0xD000000>; + status = "okay"; + }; + +- vsdk_sr0_mem: vsdk_sr0_mem@A0000000 { ++ vsdk_sr0_mem: vsdk_sr0_mem@9FB00000 { + compatible = "shared-dma-pool"; +- reg = <0x0 0xA0000000 0x0 0x1000000>; ++ reg = <0x0 0x9FB00000 0x0 0x500000>; + status = "okay"; + }; ++ ++ vsdk_eve_mem: vsdk_eve_mem@9D100000 { ++ compatible = "shared-dma-pool"; ++ reg = <0x0 0x9D100000 0x0 0x100000>; ++ status = "okay"; ++ }; + }; + + &ipu1 { + + +diff --git a/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c b/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c +index e6a7dacfe..bb23f86fd 100755 +--- a/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c ++++ b/ti_components/os_tools/linux/u-boot/u-boot/board/ti/dra7xx/evm.c +@@ -44,8 +44,9 @@ + (strncmp("H", board_ti_get_rev(), 1) <= 0)) + #define board_is_dra72x_revc_or_later() (board_is_dra72x_evm() && \ + (strncmp("C", board_ti_get_rev(), 1) <= 0)) +-#define board_ti_get_emif_size() board_ti_get_emif1_size() + \ +- board_ti_get_emif2_size() ++//#define board_ti_get_emif_size() board_ti_get_emif1_size() + \ ++// board_ti_get_emif2_size() ++#define board_ti_get_emif_size() 0x20000000 + + #ifdef CONFIG_DRIVER_TI_CPSW + #include + + +diff --git a/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs b/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs +index f1f70adb1..aa0a2ba7d 100755 +--- a/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs ++++ b/vision_sdk/apps/build/tda2xx/mem_segment_definition_linux.xs +@@ -11,6 +11,8 @@ + * ======== mem_segment_definition.xs ======== + * ======== Single file for the memory map configuration of all cores ========= + */ ++function getMemSegmentDefinition_external(core) ++{ + + KB=1024; + MB=KB*KB; +@@ -49,12 +51,12 @@ SR2_BASE_ADDR 0xA9000000 + A15-Linux 0xC0000000(End of Interleaving) + *************************/ + DDR3_ADDR = 0x80000000; +-DDR3_SIZE = 1024*MB; ++DDR3_SIZE = 512*MB; + DDR3_LINUX_MEM_OFFSET = 64*MB; + + /* First 512 MB - cached */ + DDR3_BASE_ADDR_0 = 0x80000000; +-DDR3_BASE_SIZE_0 = 448*MB + DDR3_LINUX_MEM_OFFSET; ++DDR3_BASE_SIZE_0 = 507*MB; + + + /* The start address of the second mem section should be 16MB aligned. +@@ -62,13 +64,22 @@ DDR3_BASE_SIZE_0 = 448*MB + DDR3_LINUX_MEM_OFFSET; + * to map SR0, REMOTE_LOG_MEM sections. + * tlb_config_eveX.c need to be modified otherwise + */ +-DDR3_BASE_ADDR_1 = 0xA0000000; +-DDR3_BASE_SIZE_1 = 512*MB; ++DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0; ++DDR3_BASE_SIZE_1 = DDR3_SIZE - DDR3_BASE_SIZE_0; ++ ++if(core=="ipu1_1" || core=="ipu1_0" || core=="ipu2") ++{ ++ /* for ipu1_0, ipu1_1, ipu2 DDR3_BASE_ADDR_1 should be ++ * in non-cached virtual address of ++ * DDR3_BASE_ADDR_1 + 512*MB ++ */ ++ DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; ++} + + /* Address and Size definitions of different components running on different cores */ + NDK_START_ADDR = DDR3_BASE_ADDR_0 + DDR3_LINUX_MEM_OFFSET; + NDK_MEM_SIZE = 2*MB +-SR1_FRAME_BUFFER_SIZE = 300*MB; ++SR1_FRAME_BUFFER_SIZE = 205*MB; + SR1_BUFF_ECC_ASIL_SIZE = 4*KB; + SR1_BUFF_ECC_QM_SIZE = 4*KB; + SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; +@@ -83,20 +94,20 @@ if (ipummSupport == "yes") { + IPU2_DATA_SIZE = 60*MB; + } + else { +- IPU2_DATA_SIZE = 20*MB; ++ IPU2_DATA_SIZE = 16*MB; + } + +-IPU1_START_ADDR = 0x9e000000; +-IPU1_0_CODE_SIZE = 8*MB; +-IPU1_0_DATA_SIZE = 21*MB; ++IPU1_START_ADDR = 0x9D000000; ++IPU1_0_CODE_SIZE = 1*KB; ++IPU1_0_DATA_SIZE = 1*KB; + +-DSP1_START_ADDR = 0xA1000000; ++DSP1_START_ADDR = 0x9B000000; + DSP1_CODE_SIZE = 2*MB; +-DSP1_DATA_SIZE = 24*MB; ++DSP1_DATA_SIZE = 12*MB; + +-DSP2_START_ADDR = 0xA3000000; ++DSP2_START_ADDR = 0x9C000000; + DSP2_CODE_SIZE = 2*MB; +-DSP2_DATA_SIZE = 14*MB; ++DSP2_DATA_SIZE = 12*MB; + + /* The start address of the second mem section should be 16MB aligned. + * This alignment is a must as a single 16MB mapping is used for EVE +@@ -119,25 +130,25 @@ PM_DATA_LEN = 512*KB; + OPENVX_SHM_SIZE = 2*MB; + + /* The start address of EVE memory must be 16MB aligned. */ +-EVE_START_ADDR = 0xA5000000; ++EVE_START_ADDR = 0x9D100000; + /* EVE vecs space should be align with 16MB boundary, and if possible try to fit + * the entire vecs+code+data in 16MB section. In this case a single TLB map would + * be enough to map vecs+code+data of an EVE. + * tlb_config_eveX.c need to be modified if any of these EVE memory sections or + * SR1_FRAME_BUFFER_MEM section is modified. + */ +-EVE1_VECS_SIZE = 0.5*MB; +-EVE1_CODE_SIZE = 2*MB; +-EVE1_DATA_SIZE =13.5*MB; +-EVE2_VECS_SIZE = 0.5*MB; +-EVE2_CODE_SIZE = 2*MB; +-EVE2_DATA_SIZE =13.5*MB; +-EVE3_VECS_SIZE = 0.5*MB; +-EVE3_CODE_SIZE = 2*MB; +-EVE3_DATA_SIZE =13.5*MB; +-EVE4_VECS_SIZE = 0.5*MB; +-EVE4_CODE_SIZE = 2*MB; +-EVE4_DATA_SIZE =13.5*MB; ++EVE1_VECS_SIZE = 1*KB; ++EVE1_CODE_SIZE = 1*KB; ++EVE1_DATA_SIZE = 1*KB; ++EVE2_VECS_SIZE = 1*KB; ++EVE2_CODE_SIZE = 1*KB; ++EVE2_DATA_SIZE = 1*KB; ++EVE3_VECS_SIZE = 1*KB; ++EVE3_CODE_SIZE = 1*KB; ++EVE3_DATA_SIZE = 1*KB; ++EVE4_VECS_SIZE = 1*KB; ++EVE4_CODE_SIZE = 1*KB; ++EVE4_DATA_SIZE = 1*KB; + + TOTAL_MEM_SIZE = (DDR3_SIZE); + +@@ -216,12 +227,10 @@ if (A15TargetOS == "Qnx") { + } + else { + /* Shared Region handled by A15 HLOS Linux*/ +- SR2_BASE_ADDR = 0xA9000000; ++ SR2_BASE_ADDR = 0x9D200000; + SR2_SIZE = 0x2000000; + } + +-function getMemSegmentDefinition_external(core) +-{ + var memory = new Array(); + var index = 0; + + + +diff --git a/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk b/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk +index 1e150d5e9..6e8f2a21e 100755 +--- a/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk ++++ b/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk +@@ -23,10 +23,10 @@ PROC_IPU2_INCLUDE=yes + PROC_A15_0_INCLUDE=yes + PROC_DSP1_INCLUDE=yes + PROC_DSP2_INCLUDE=yes +-PROC_EVE1_INCLUDE=yes +-PROC_EVE2_INCLUDE=yes +-PROC_EVE3_INCLUDE=yes +-PROC_EVE4_INCLUDE=yes ++PROC_EVE1_INCLUDE=no ++PROC_EVE2_INCLUDE=no ++PROC_EVE3_INCLUDE=no ++PROC_EVE4_INCLUDE=no + + + VSDK_BOARD_TYPE=TDA2XX_EVM + + +diff --git a/vision_sdk/links_fw/include/link_api/system_vring_config.h b/vision_sdk/links_fw/include/link_api/system_vring_config.h +old mode 100644 +new mode 100755 +index 3a6b0e91f..b062abb85 +--- a/vision_sdk/links_fw/include/link_api/system_vring_config.h ++++ b/vision_sdk/links_fw/include/link_api/system_vring_config.h +@@ -107,11 +107,11 @@ extern "C" { + #define IPU_MEM_VRING_BUFS0 0x60040000 + #define IPU_MEM_VRING_BUFS1 0x60080000 + +-#define DSP_MEM_IPC_VRING 0xA0000000 +-#define DSP_MEM_RPMSG_VRING0 0xA0000000 +-#define DSP_MEM_RPMSG_VRING1 0xA0004000 +-#define DSP_MEM_VRING_BUFS0 0xA0040000 +-#define DSP_MEM_VRING_BUFS1 0xA0080000 ++#define DSP_MEM_IPC_VRING 0x9FB00000 ++#define DSP_MEM_RPMSG_VRING0 0x9FB00000 ++#define DSP_MEM_RPMSG_VRING1 0x9FB04000 ++#define DSP_MEM_VRING_BUFS0 0x9FB40000 ++#define DSP_MEM_VRING_BUFS1 0x9FB80000 + + /* + * Vring physical addresses +@@ -129,15 +129,15 @@ extern "C" { + */ + + #ifdef BUILD_M4_0 +-#define IPU_PHYS_MEM_IPC_VRING 0x9e000000 ++#define IPU_PHYS_MEM_IPC_VRING 0x9D000000 + #endif + + #ifdef BUILD_DSP_1 +-#define DSP_PHYS_MEM_IPC_VRING 0xa1000000 ++#define DSP_PHYS_MEM_IPC_VRING 0x9B000000 + #endif + + #ifdef BUILD_DSP_2 +-#define DSP_PHYS_MEM_IPC_VRING 0xa3000000 ++#define DSP_PHYS_MEM_IPC_VRING 0x9C000000 + #endif + + #ifdef BUILD_M4_2 + + +diff --git a/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h b/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h +old mode 100644 +new mode 100755 +index 08126c6e8..5f80957cc +--- a/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h ++++ b/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h +@@ -11,22 +11,22 @@ + #define _SYSTEM_MEM_MAP_H_ + + +-#define SR0_ADDR 0xa0100000 ++#define SR0_ADDR 0x9fc00000 + #define SR0_SIZE 0x100000 + +-#define SYSTEM_IPC_SHM_MEM_ADDR 0xa02c0000 ++#define SYSTEM_IPC_SHM_MEM_ADDR 0x9fdc0000 + #define SYSTEM_IPC_SHM_MEM_SIZE 0x80000 + +-#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR 0xa0340000 ++#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR 0xbfe40000 + #define SYSTEM_AUTOSAR_IPC_SHM_MEM_SIZE 0x80000 + +-#define REMOTE_LOG_MEM_ADDR 0xa0200000 ++#define REMOTE_LOG_MEM_ADDR 0x9fd00000 + #define REMOTE_LOG_MEM_SIZE 0x40000 + + #define SR1_FRAME_BUFFER_MEM_ADDR 0x84203000 +-#define SR1_FRAME_BUFFER_MEM_SIZE 0x12c00000 ++#define SR1_FRAME_BUFFER_MEM_SIZE 0xcd00000 + +-#define SR2_FRAME_BUFFER_MEM_ADDR 0xa9000000 ++#define SR2_FRAME_BUFFER_MEM_ADDR 0x9d200000 + #define SR2_FRAME_BUFFER_MEM_SIZE 0x2000000 + + #endif /* _SYSTEM_MEM_MAP_H_ */ + + +diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs +index 2777eefa0..67583dab8 100755 +--- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs ++++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2/gen_system_mem_map.xs +@@ -49,16 +49,16 @@ function GenSystemMemMap() + fd.writeLine("#define _SYSTEM_MEM_MAP_H_"); + fd.writeLine(""); + fd.writeLine(""); +- fd.writeLine("#define SR0_ADDR " + Value2HexString(SR0.base)); ++ fd.writeLine("#define SR0_ADDR " + Value2HexString((SR0.base) - 0x20000000)); + fd.writeLine("#define SR0_SIZE " + Value2HexString(SR0.len) ); + fd.writeLine(""); +- fd.writeLine("#define SYSTEM_IPC_SHM_MEM_ADDR " + Value2HexString(SYSTEM_IPC_SHM_MEM.base)); ++ fd.writeLine("#define SYSTEM_IPC_SHM_MEM_ADDR " + Value2HexString((SYSTEM_IPC_SHM_MEM.base) - 0x20000000)); + fd.writeLine("#define SYSTEM_IPC_SHM_MEM_SIZE " + Value2HexString(SYSTEM_IPC_SHM_MEM.len) ); + fd.writeLine(""); + fd.writeLine("#define SYSTEM_AUTOSAR_IPC_SHM_MEM_ADDR " + Value2HexString(SYSTEM_AUTOSAR_IPC_SHM_MEM.base)); + fd.writeLine("#define SYSTEM_AUTOSAR_IPC_SHM_MEM_SIZE " + Value2HexString(SYSTEM_AUTOSAR_IPC_SHM_MEM.len) ); + fd.writeLine(""); +- fd.writeLine("#define REMOTE_LOG_MEM_ADDR " + Value2HexString(REMOTE_LOG_MEM.base)); ++ fd.writeLine("#define REMOTE_LOG_MEM_ADDR " + Value2HexString((REMOTE_LOG_MEM.base) - 0x20000000)); + fd.writeLine("#define REMOTE_LOG_MEM_SIZE " + Value2HexString(REMOTE_LOG_MEM.len) ); + fd.writeLine(""); + fd.writeLine("#define SR1_FRAME_BUFFER_MEM_ADDR " + Value2HexString(SR1.base)); + + +diff --git a/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h b/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h +old mode 100644 +new mode 100755 +index f97437a9d..7605b66a0 +--- a/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h ++++ b/vision_sdk/links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h +@@ -79,9 +79,9 @@ Limited License. + + /* Number of entries in resource table */ + #ifdef IPU1_LOAD_EVES +-#define RSC_NUM_ENTRIES 19 ++#define RSC_NUM_ENTRIES 20 + #else +-#define RSC_NUM_ENTRIES 18 ++#define RSC_NUM_ENTRIES 19 + #endif + + /* IPU Memory Map */ +@@ -107,10 +107,13 @@ Limited License. + #define IPU_TILER_MODE_0_1 0xA0000000 + + #define L3_TILER_MODE_2 0x70000000 +-#define IPU_TILER_MODE_2 0xB0000000 ++#define IPU_TILER_MODE_2 0xA1000000 + + #define L3_TILER_MODE_3 0x78000000 +-#define IPU_TILER_MODE_3 0xB8000000 ++#define IPU_TILER_MODE_3 0xB0000000 ++ ++#define L3_AMMU_NONCACHED 0x9FB00000 ++#define IPU_AMMU_NONCACHED 0xBFB00000 + + #define IPU_MEM_TEXT 0x0 + +@@ -126,7 +129,7 @@ Limited License. + #define IPU_MEM_IPC_DATA XDC_CFG_IPC_DATA + #define IPU_NDK_MEM XDC_CFG_NDK_MEM + #define SYSTEM_COMMON_SHM_VIRT XDC_CFG_SYSTEM_COMMON_SHM_VIRT +-#define SYSTEM_COMMON_SHM XDC_CFG_SYSTEM_COMMON_SHM_VIRT ++#define SYSTEM_COMMON_SHM (XDC_CFG_SYSTEM_COMMON_SHM_VIRT - 0x20000000) + #define EVE_MEM_VIRT XDC_CFG_EVE_MEM + #define EVE_MEM XDC_CFG_EVE_MEM + +@@ -227,6 +230,8 @@ struct my_resource_table { + /* devmem entry */ + struct fw_rsc_devmem devmem13; + ++ /* devmem entry */ ++ struct fw_rsc_devmem devmem14; + }; + + extern char ti_trace_SysMin_Module_State_0_outbuf__A; +@@ -262,6 +267,7 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = { + offsetof(struct my_resource_table, devmem12), + #endif + offsetof(struct my_resource_table, devmem13), ++ offsetof(struct my_resource_table, devmem14), + }, + + /* rpmsg vdev entry */ +@@ -380,6 +386,13 @@ struct my_resource_table ti_ipc_remoteproc_ResourceTable = { + SR2_VIRT, SR2_PHYS, + SR2_SIZE, 0, 0, "SR2_MEM", + }, ++ ++ { ++ TYPE_DEVMEM, ++ IPU_AMMU_NONCACHED, L3_AMMU_NONCACHED, ++ 0x500000, 0, 0, "IPU_AMMU_NONCACHED", ++ }, ++ + }; + + #endif /* _RSC_TABLE_IPU_H_ */ + + +diff --git a/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c b/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c +old mode 100644 +new mode 100755 +index 55eb2b8e2..326de2a55 +--- a/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c ++++ b/vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c +@@ -288,9 +288,11 @@ Int32 System_bspInit(void) + + #ifdef DDR_MEM_1024M + /* This one to one mapping is required for the 1GB builds */ +- vpsInitPrms.virtBaseAddr = 0x80000000U; ++ vpsInitPrms.virtBaseAddr = 0xA0000000U; + vpsInitPrms.physBaseAddr = 0x80000000U; + vpsInitPrms.isAddrTransReq = FALSE; ++ /* if Virtual address != Physical address then enable translation */ ++ vpsInitPrms.isAddrTransReq = TRUE; + #else + vpsInitPrms.virtBaseAddr = 0xA0000000U; + vpsInitPrms.physBaseAddr = 0x80000000U; + +Hi Terry, Yes I meant that you first try 512 MB configuration on the EVM. Regards, Rishabh + +Hi Rishabh, I have uploaded the files I changed last reply. Have it any error ? Any else files should to modify ? The SD card (images for 512MB ram) test on the EVM can't boot linux. Can you help to debug ? Attached logs on evm. 3157.boot.log U-Boot SPL 2016.05 (Sep 19 2019 - 10:59:33) +DRA752-GP ES1.1 +no pinctrl for ddr_1_8v +Card did not respond to voltage select! +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +spl: falcon_args_file not set in environment, falling back to default +reading single-stage-boot.dtb +spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Sep 19 2019 - 10:59:33 +0800) + +CPU : DRA752-GP ES1.1 +Model: TI DRA742 +Board: DRA74x EVM REV G.0 +DRAM: 1.5 GiB +MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND +mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND +mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND +mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +172 bytes read in 3 ms (55.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +** File not found /boot/zImage ** +** First descriptor is NOT a primary desc on 1:1 ** +switch to partitions #0, OK +mmc1(part 0) is current device +** First descriptor is NOT a primary desc on 1:1 ** +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +Booting from eMMC ... +Wrong Image Format for bootm command +ERROR: can't get kernel image! +=> + Thank you. Terry + +Hi Terry, Changes look fine at a glance, I will ask Linux expert to further review the code. Meanwhile can you look at below thread: https://e2e.ti.com/support/processors/f/791/p/812928/3014857 Regards, Rishabh + +From the log it looks like basic board detect is not implemented in the u-boot. Did you port the u-boot for your custom board? I recommend you to start with a working version of kernel and u-boot running standalone before you integrate with RTOS. You will have to do baseport changes to kernel and u-boot for that. Regards, Nikhil D + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/20001-25000/845288.txt b/data2/text/range/20001-25000/845288.txt new file mode 100644 index 0000000000000000000000000000000000000000..40a6ee4e274dbc35d5d726bfb6bc5a9890b3b04e --- /dev/null +++ b/data2/text/range/20001-25000/845288.txt @@ -0,0 +1,16 @@ +Ticket Name: Compiler/TDA2EVM5777: The kernel is stucked or got a panic. + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: DRA742, DRA752 Tool/software: TI C/C++ Compiler Hi, I'm trying to boot custom board which is based on TDA2x EVM board. Sometimes, it goes to mount root file system but seems like wait infinitely some task. (it doesn't show root login prompt) And it often shows kernel panic messages. I attached my kernel log. [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (yoo@yoo-VirtualBox) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #75 SMP PREEMPT Mon Oct 7 15:28:56 KST 2019 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES1.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=a760f24c-02 rw rootwait ip=none mem=1024M cma=64M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 353148K/1012736K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 413828K reserved, 245760K cma-reserved, 193536K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) [ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) [ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) [ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000331] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000339] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000782] Console: colour dummy device 80x30 [ 0.000798] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000804] This ensures that you still see kernel messages. Please [ 0.000809] update your kernel commandline. [ 0.000823] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000835] pid_max: default: 32768 minimum: 301 [ 0.000934] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000944] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001485] Initializing cgroup subsys io [ 0.001501] Initializing cgroup subsys memory [ 0.001525] Initializing cgroup subsys devices [ 0.001538] Initializing cgroup subsys freezer [ 0.001548] Initializing cgroup subsys perf_event [ 0.001560] Initializing cgroup subsys pids [ 0.001587] CPU: Testing write buffer coherency: ok [ 0.001785] /cpus/cpu@0 missing clock-frequency property [ 0.001802] /cpus/cpu@1 missing clock-frequency property [ 0.001812] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001848] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080068] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080137] Brought up 2 CPUs [ 0.080150] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080156] CPU: All CPU(s) started in HYP mode. [ 0.080162] CPU: Virtualization extensions available. [ 0.080537] devtmpfs: initialized [ 0.109629] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110600] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313684] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313705] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.318769] pinctrl core: initialized pinctrl subsystem [ 0.319630] NET: Registered protocol family 16 [ 0.320610] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350239] cpuidle: using governor ladder [ 0.380260] cpuidle: using governor menu [ 0.388795] OMAP GPIO hardware version 0.1 [ 0.395239] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.418548] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.418559] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.419033] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.419042] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.419629] OMAP DMA hardware revision 0.0 [ 0.461517] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462644] edma 43300000.edma: memcpy is disabled [ 0.467335] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471678] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471854] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472022] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472175] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472463] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472651] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475621] palmas 0-0058: IRQ missing: skipping irq request [ 0.491074] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.552726] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.553147] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.553337] media: Linux media interface: v0.10 [ 0.553389] Linux video capture interface: v2.00 [ 0.553432] pps_core: LinuxPPS API ver. 1 registered [ 0.553439] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.553464] PTP clock support registered [ 0.553514] EDAC MC: Ver: 3.0.0 [ 0.554266] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.554563] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.554881] Advanced Linux Sound Architecture Driver Initialized. [ 0.555736] clocksource: Switched to clocksource arch_sys_counter [ 0.566198] NET: Registered protocol family 2 [ 0.566691] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.566754] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.566879] TCP: Hash tables configured (established 8192 bind 8192) [ 0.566927] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.566958] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.567164] NET: Registered protocol family 1 [ 0.567428] RPC: Registered named UNIX socket transport module. [ 0.567438] RPC: Registered udp transport module. [ 0.567444] RPC: Registered tcp transport module. [ 0.567450] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.568438] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.578433] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.579085] NFS: Registering the id_resolver key type [ 0.579114] Key type id_resolver registered [ 0.579122] Key type id_legacy registered [ 0.579180] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.580451] bounce: pool size: 64 pages [ 0.580598] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.580613] io scheduler noop registered [ 0.580626] io scheduler deadline registered [ 0.580659] io scheduler cfq registered (default) [ 0.584388] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.587568] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.587580] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.587613] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.587634] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.617563] dra7-pcie 51000000.pcie_rc: link is not up [ 0.617733] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.617746] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.617756] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.617766] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.618170] PCI: bus0: Fast back to back transfers disabled [ 0.618297] PCI: bus1: Fast back to back transfers enabled [ 0.618380] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.618394] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.618406] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.618631] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.679068] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.682432] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.672836] console [ttyS0] enabled [ 1.677231] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.686933] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.696907] [drm] Initialized drm 1.1.0 20060810 [ 1.702406] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.709091] [drm] No driver support for vblank timestamp query. [ 1.715217] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.728130] loop: module loaded [ 1.731619] vmemexp device MAJOR num = 245 [ 1.735791] vmemexp class registered [ 1.739509] /dev/vmemexp device registered [ 1.743625] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.752179] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.757597] 7 ofpart partitions found on MTD device spi32766.0 [ 1.763456] Creating 7 MTD partitions on "spi32766.0": [ 1.768635] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.774766] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.781146] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.788097] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.794758] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.802155] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.808502] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.816277] libphy: Fixed MDIO Bus: probed [ 1.865768] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.871891] davinci_mdio 48485000.mdio: detected phy mask fffffffb [ 1.880227] libphy: 48485000.mdio: probed [ 1.884258] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.892956] cpsw 48484000.ethernet: Detected MACID = 7c:66:9d:ee:81:8c [ 1.899650] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.906669] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:66:9d:ee:81:8d [ 1.915244] mousedev: PS/2 mouse device common for all mice [ 1.921432] i2c /dev entries driver [ 1.930412] evm_3v3_sw: supplied by sysen1 [ 1.976856] ledtrig-cpu: registered to indicate activity on CPUs [ 1.997513] davinci-mcasp 48468000.mcasp: ERRATA i868 workaround is enabled [ 2.004707] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.012187] NET: Registered protocol family 10 [ 2.027538] sit: IPv6 over IPv4 tunneling driver [ 2.032723] NET: Registered protocol family 17 [ 2.037532] Key type dns_resolver registered [ 2.041948] omap_voltage_late_init: Voltage driver support not added [ 2.048843] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.055051] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.061747] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.067996] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.076165] Power Management for TI OMAP4+ devices. [ 2.081209] Unable to handle kernel NULL pointer dereference at virtual address 00000188 [ 2.089358] pgd = c0003000 [ 2.092074] [00000188] *pgd=80000080004003, *pmd=00000000 [ 2.097546] Internal error: Oops: a06 [#1] PREEMPT SMP ARM [ 2.103049] Modules linked in: [ 2.106121] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84 #75 [ 2.112150] Hardware name: Generic DRA74X (Flattened Device Tree) [ 2.118265] task: ef078000 ti: ef062000 task.ti: ef062000 [ 2.123687] PC is at omap3_dpll_allow_idle+0x4/0x7c [ 2.128585] LR is at omap2_clk_enable_autoidle_all+0x48/0xc0 [ 2.134264] pc : [] lr : [] psr: a0000113 [ 2.134264] sp : ef063e88 ip : ef063e88 fp : ef063ea4 [ 2.145788] r10: 00000000 r9 : c08e4600 r8 : 000000b2 [ 2.151030] r7 : eeb1f880 r6 : c0978fd4 r5 : c0978fcc r4 : ef023c00 [ 2.157583] r3 : c0520ec4 r2 : ef0027c0 r1 : 000001a8 r0 : ef023c00 [ 2.164136] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 2.171471] Control: 30c5387d Table: 80003000 DAC: fffffffd [ 2.177236] Process swapper/0 (pid: 1, stack limit = 0xef062210) [ 2.183265] Stack: (0xef063e88 to 0xef064000) [ 2.187637] 3e80: c093d6f0 c08e6b5c c093d6f0 eeb1f880 ef063eb4 ef063ea8 [ 2.195848] 3ea0: c08ed8c8 c051e868 ef063ecc ef063eb8 c08e6b84 c08ed8b4 c093d6f0 c08e6b5c [ 2.204056] 3ec0: ef063f4c ef063ed0 c000982c c08e6b68 ef063ef4 ef063ee0 c08e461c c02b90fc [ 2.212265] 3ee0: ef643018 c06abdfc ef063f4c ef063ef8 c004fc2c c08e460c ef063f34 c0826c78 [ 2.220476] 3f00: c0826cc4 c082666c 00000007 00000007 00000000 c08e0e4c c081c284 00000000 [ 2.228684] 3f20: 00000478 c098a000 c098a000 c09339b8 c0925838 000000b2 c08e4600 00000008 [ 2.236894] 3f40: ef063f94 ef063f50 c08e4f68 c00097a0 00000007 00000007 00000000 c08e4600 [ 2.245102] 3f60: 03000741 c08e0e4c 406a8109 c098a000 c0684f60 00000000 00000000 00000000 [ 2.253311] 3f80: 00000000 00000000 ef063fac ef063f98 c0684f78 c08e4da0 00000000 c0684f60 [ 2.261521] 3fa0: 00000000 ef063fb0 c000fb88 c0684f6c 00000000 00000000 00000000 00000000 [ 2.269730] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.277940] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00264428 11168530 [ 2.286148] Backtrace: [ 2.288612] [] (omap2_clk_enable_autoidle_all) from [] (dra7xx_init_late+0x20/0x24) [ 2.298040] r7:eeb1f880 r6:c093d6f0 r5:c08e6b5c r4:c093d6f0 [ 2.303749] [] (dra7xx_init_late) from [] (init_machine_late+0x28/0x98) [ 2.312136] [] (init_machine_late) from [] (do_one_initcall+0x98/0x1e4) [ 2.320517] r5:c08e6b5c r4:c093d6f0 [ 2.324120] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) [ 2.332849] r10:00000008 r9:c08e4600 r8:000000b2 r7:c0925838 r6:c09339b8 r5:c098a000 [ 2.340740] r4:c098a000 [ 2.343289] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) [ 2.351496] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0684f60 [ 2.359386] r4:c098a000 [ 2.361934] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 2.369529] r5:c0684f60 r4:00000000 [ 2.373130] Code: e263301f e1a00330 e89da830 e1a0c00d (e92dd8f0) [ 2.379331] ---[ end trace 7829fa0c9fa85dd3 ]--- [ 2.383977] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.383977] [ 2.393148] CPU1: stopping [ 2.395866] CPU: 1 PID: 6 Comm: kworker/u4:0 Tainted: G D 4.4.84 #75 [ 2.403375] Hardware name: Generic DRA74X (Flattened Device Tree) [ 2.409493] Workqueue: kmmcd mmc_rescan [ 2.413346] Backtrace: [ 2.415813] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 2.423411] r7:ef09bce0 r6:20000193 r5:00000000 r4:c0957810 [ 2.429123] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 2.436377] [] (dump_stack) from [] (handle_IPI+0x184/0x198) [ 2.443799] r7:ef09bce0 r6:00000000 r5:00000001 r4:c0935424 [ 2.449506] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) [ 2.457102] r7:fa212000 r6:ef09bce0 r5:fa21200c r4:c093a8ec [ 2.462806] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 2.470317] Exception stack(0xef09bce0 to 0xef09bd28) [ 2.475389] bce0: 0000140b 00000000 df54e710 c050239c c09bd428 00001803 031a2956 066665b0 [ 2.483596] bd00: ef09bde0 00000000 00000001 ef09bd3c ef09bd40 ef09bd30 c0016f30 c05023a8 [ 2.491803] bd20: a0000013 ffffffff [ 2.495300] r9:00000000 r8:ef09bde0 r7:ef09bd14 r6:ffffffff r5:a0000013 r4:c05023a8 [ 2.503114] [] (arch_counter_get_cntpct) from [] (arch_timer_read_counter_long+0x1c/0x20) [ 2.513070] [] (arch_timer_read_counter_long) from [] (__timer_delay+0x54/0x64) [ 2.522151] [] (__timer_delay) from [] (__timer_const_udelay+0x28/0x2c) [ 2.530533] r7:066665b0 r6:c09577f8 r5:eeaf8800 r4:000001e6 [ 2.536242] [] (__timer_const_udelay) from [] (__mmc_start_request+0x88/0xdc) [ 2.545149] [] (__mmc_start_request) from [] (mmc_start_request+0xf8/0x120) [ 2.553878] r9:00000000 r8:00000008 r7:00000000 r6:eeaf8800 r5:eeaf8800 r4:ef09bde0 [ 2.561687] [] (mmc_start_request) from [] (__mmc_start_req+0x50/0x70) [ 2.569981] r5:ef09bdf0 r4:ef09bde0 [ 2.573582] [] (__mmc_start_req) from [] (mmc_wait_for_cmd+0x60/0x8c) [ 2.581789] r7:00000000 r6:00000000 r5:eeaf8800 r4:ef09be2c [ 2.587496] [] (mmc_wait_for_cmd) from [] (mmc_io_rw_direct_host+0x9c/0x138) [ 2.596313] r6:eeaf8800 r5:00000c08 r4:80000c08 [ 2.600967] [] (mmc_io_rw_direct_host) from [] (sdio_reset+0x5c/0x64) [ 2.609173] r10:ef09c000 r9:00000000 r8:c06f5bd4 r7:c06f5bc8 r6:eeaf8800 r5:00061a80 [ 2.617065] r4:eeaf8800 [ 2.619612] [] (sdio_reset) from [] (mmc_rescan+0x274/0x318) [ 2.627032] r4:eeaf8a58 [ 2.629584] [] (mmc_rescan) from [] (process_one_work+0x124/0x3f4) [ 2.637528] r9:00000000 r8:ef32d200 r7:00000000 r6:ef09c000 r5:ef092100 r4:eeaf8a58 [ 2.645337] [] (process_one_work) from [] (worker_thread+0x4c/0x524) [ 2.653456] r10:ef09c000 r9:ef092100 r8:00000088 r7:ef09a000 r6:ef09c014 r5:ef092118 [ 2.661345] r4:ef09c000 [ 2.663895] [] (worker_thread) from [] (kthread+0x100/0x118) [ 2.671316] r10:00000000 r9:00000000 r8:c004a984 r7:ef092100 r6:ef09a000 r5:ef05f740 [ 2.679204] r4:00000000 [ 2.681753] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 2.688999] r8:00000000 r7:00000000 r6:00000000 r5:c0050408 r4:ef05f740 [ 2.695760] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.695760] The point of occuring error message is not fixed.(sometimes rcu_preempt, of_fdt_raw_init, or others) How can i resolve this problem? I'm using mmc device 0 which indicates SD card. (it doesn't have eMMC); Thanks and Regards, Yoo + +Responses: +Hi Yoo, we are looking at this and will reply here soon. Regards, Yordan + +Hi If the failures are random during the boot process, have you ensured that memory part is stable on your evm. Memory instability can often lead to such random crashes - can you check by running memtester or similar Also, include additional information on the SW(SDK) version that you are using and changes carried out at your end + +Hi Sriram, Is there any way to check memory instability when i can't enter into root prompt? That error occurs in the process of kernel start or systemd. I'm using vision SDK 3.7 version and only changed the power of mmc1 in dts from evm_3v3_sd to eve_3v3_sw. In addition, when i execute bdinfo in u-boot, 2 part of DRAM bank were shown but the size of second DRAM bank was shown as 0. Is this normal? If not, could you let me know how can i fix it? Thanks and Regards, Yoo + +hi For the memory stability, hope you have reviewed the schematics and taken care of recommendations from TI You can check if memory is stable by running memtester utility. Also, would be good if you can clarify if the issue is seen on multiple boards or only on few boards. AFAIK, there is no means to auto-detect the amount of memory installed in a system. In case of TI EVM, the information is obtained by reading programmed information from EEPROM on the EVM. The information is then used to patch through the amount of memory passed to the Linux kernel - the device entries for amount of memory is modified from uboot + +HI Can you confirm if the issue has been resolved If the issue is not seen anymore will mark the thread as closed and we can reopen the thread if needed at a later point of time + diff --git a/data2/text/range/20001-25000/849725.txt b/data2/text/range/20001-25000/849725.txt new file mode 100644 index 0000000000000000000000000000000000000000..1911e2df06d91ebacdb4bcdb4f262a8304f4d5eb --- /dev/null +++ b/data2/text/range/20001-25000/849725.txt @@ -0,0 +1,362 @@ +Ticket Name: TDA2SA: tda2xx uboot can't load kernel image + +Query Text: +Part Number: TDA2SA Hi, I am working on my custom board tda2xx and try booting from emmc. I refer to http://processors.wiki.ti.com/index.php?title=Processor_SDK_Linux_Automotive_Software_Developers_Guide#Using_eMMC_Boot and do all should be setting. After switch boot mode to emmc boot, I got the error message that can't get the kernel image: Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => There some problem I had found: 1. It can't boot uboot (no logs) often. I often reset power many times to get success boot uboot. 2. My custom board PMICs are not connected to SOC and it can't fix right now. 3. The bootpart have changed to 0:2 not 1:2 I had set in uboot. Is it right? Please help to boot from emmc. Thanks. Terry + +Responses: +I use VSDK3.07. attach boot log 7206.uboot.txt U-Boot SPL 2016.05 (Oct 21 2019 - 21:04:35) +DRA752-GP ES2.0 +Trying to boot from MMC2_2 +reading single-stage-boot.dtb +spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Oct 21 2019 - 21:04:35 +0800) + +CPU : DRA752-GP ES2.0 +Board: D3 TDA2x +I2C: ready +DRAM: i2c_read (addr phase): pads on bus probably not configured (status=0x10) +2 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +** Bad device mmc 0 ** +Using default environment + +i2c_write: pads on bus probably not configured (status=0x10) +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not turn CLK32KGAUDIO on: err = 2 +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Unable to read Board-ID +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Unable to read Baseboard-ID +i2c_probe: pads on bus probably not configured (status=0x10) +Unable to read Expansion-ID +SCSI: 0 device not found +ERROR: scsi device not found + +at drivers/block/disk-uclass.c:43/scsi_init() +Net: not set. Validating first E-fuse MAC +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Could not get PHY for cpsw: addr 2 +cpsw +Hit any key to stop autoboot: 0 +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +Tuning failed, dropping HS200 mode. +dropping DDR52 mode. +switch to partitions #0, OK +mmc1(part 0) is current device +Tuning failed, dropping HS200 mode. +dropping DDR52 mode. +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +Booting from eMMC ... +Wrong Image Format for bootm command +ERROR: can't get kernel image! +=> printenv +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baseboard_name=unknown_baseboard +baseboard_rev=unknown +baudrate=115200 +board=tda2x +board_findfdt=if test $board_name = tda2eco; then setenv fdtfile d3-tda2ex-fpd4ch.dtb; fi;if test $board_name = tda2eco_tda2x; then setenv fdtfile d3-tda2x-fpd4ch.dtb; fi;if test $baseboard_name = tda2xde_fpd8ch; then setenv fdtfile d3-tda2x-fpd8ch.dtb; fi;if test $fdtfile = undefined; then setenv fdtfile d3-tda2eco-som.dtb; fi; +board_name=unknown_board +board_rev=unknown +boot_fdt=try +boot_fit=0 +boot_os=0 +boot_part=9 +bootargs=androidboot.serialno=0400e0174aba8802 +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyO0,115200n8 +cpu=armv7 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +eth1addr=90:9a:77:8d:af:a5 +ethact=cpsw +ethaddr=90:9a:77:8d:af:a4 +eval_bootargs=setenv bootargs androidboot.serialno=${serial#} +expansion_name=unknown_expansion +fdt_addr_r=0x88000000 +fdt_part=3 +fdtaddr=0x88000000 +fdtfile=d3-tda2eco-som.dtb +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +machid=fe6 +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=1 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +serial#=0400e0174aba8802 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +stderr=serial +stdin=serial +stdout=serial +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=d3 +ver=U-Boot 2016.05 (Oct 21 2019 - 21:04:35 +0800) +vram=16M + +Environment size: 6097/65532 bytes +=> + +Hi, Before I answer the question. Have you got the Processor SDK Linux booting from the emmc device? Have you ported the u-boot for your custom board? Did you modify the boot command for the right device that is enumerated as emmc? I see lot of i2c errors, mmc errors, etc. You need to fix them first before going ahead. Regards, Nikhil D + +Hi Nikhil D, Anser your question below: Have you got the Processor SDK Linux booting from the emmc device? NO. I use PROCESSOR-SDK-VISION 3.07 and it can boot linux from SD card on my custom board after some code modified. We want to boot from emmc so that would be a product. I refer to some threads : https://e2e.ti.com/support/processors/f/791/t/802605?tisearch=e2e-sitesearch&keymatch=tda2%2525252525252520linux%2525252525252520emmc https://e2e.ti.com/support/processors/f/791/t/795035?tisearch=e2e-sitesearch&keymatch=dra7-evm-infoadas.dtb but not success yet. Have you ported the u-boot for your custom board? NO. For SD card can boot the linux, I don't look into u-boot yet. Did you modify the boot command for the right device that is enumerated as emmc? I had modify boot command.I think it is right. Can you help to check it? uenv.txt: fdtfile=d3-tda2x-fpd8ch.dtb args_mmc=part uuid mmc 1:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait rootfs=/dev/mmcblk1p2 ip=none mem=512M cma=64M" mmc: => mmc list OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) I see lot of i2c errors, mmc errors, etc. You need to fix them first before going ahead. Some i2c error is to read the id, some error is to control PMIC. I believe the PMIC may lead some problem because PMICs are not connected to SOC. If PMIC would be a issue, how to skip that? When use SD card boot mode, kernel will boot up and mount the emmc partition. It can read/write emmc. I will check i2c error message and fix it. Regards, Terry + +Hi, Can you please ensure that the two partitions can be enumerated using the u-boot Then, stop at the u-boot prompt, change the environment variables and try to do a boot from emmc. Regards, Nikhil D + +Hi Nikhil D, 1. How to ensure the two partitions can be enumerated ? When I use the "mmc part" command at uboot prompt, it shows: => mmc part Partition Map for MMC device 1 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type 1 63 144522 00000000-01 0c Boot 2 144585 7405965 00000000-02 83 => Then I change to SD boot, and in linux use fdisk -l root@dra7xx-evm:~# fdisk -l Disk /dev/mmcblk0: 7867 MB, 7867465728 bytes 4 heads, 16 sectors/track, 240096 cylinders Units = cylinders of 64 * 512 = 32768 bytes Device Boot Start End Blocks Id System /dev/mmcblk0p1 * 33 8224 262144 c Win95 FAT32 (LBA) Partition 1 does not end on cylinder boundary /dev/mmcblk0p2 8225 240096 7419904 83 Linux Partition 2 does not end on cylinder boundary Disk /dev/mmcblk1: 3867 MB, 3867148288 bytes 255 heads, 63 sectors/track, 470 cylinders Units = cylinders of 16065 * 512 = 8225280 bytes Device Boot Start End Blocks Id System /dev/mmcblk1p1 * 1 9 72261 c Win95 FAT32 (LBA) /dev/mmcblk1p2 10 470 3702982+ 83 Linux Disk /dev/mmcblk1boot1: 2 MB, 2097152 bytes 4 heads, 16 sectors/track, 64 cylinders Units = cylinders of 64 * 512 = 32768 bytes Disk /dev/mmcblk1boot1 doesn't contain a valid partition table Disk /dev/mmcblk1boot0: 2 MB, 2097152 bytes 4 heads, 16 sectors/track, 64 cylinders Units = cylinders of 64 * 512 = 32768 bytes Disk /dev/mmcblk1boot0 doesn't contain a valid partition table root@dra7xx-evm:~# /dev/mmcblk1 is emmc. The number displyed in uboot and in linux are not the same. 2. I reset uboot env variables follow: => env default -a ## Resetting to default environment => setenv bootpart 1:2 => setenv mmcdev 1 => saveenv Saving Environment to FAT... i2c_write: pads on bus probably not configured (status=0x10) tps65903x: could not set LDO1 voltage. Card did not respond to voltage select! ** Bad device mmc 0 ** => It still fail to load kernel. Regards, Terry + +Hi Terry, mmc list shows the different mmc devices. mmc dev N selects the device to be used. Nikhil D + +Hi Nikhil D, mmc commands show below: => mmc list OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) => mmc dev 1 Tuning failed, dropping HS200 mode. dropping DDR52 mode. switch to partitions #0, OK mmc1(part 0) is current device => mmc part Partition Map for MMC device 1 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type 1 63 144522 00000000-01 0c Boot 2 144585 7405965 00000000-02 83 => Full boot log attached 4774.uboot.txt +U-Boot SPL 2016.05 (Oct 23 2019 - 18:08:17) +DRA752-GP ES2.0 +Trying to boot from MMC2_2 +reading single-stage-boot.dtb +spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Oct 23 2019 - 18:08:17 +0800) + +CPU : DRA752-GP ES2.0 +Board: D3 TDA2x +I2C: ready +DRAM: i2c_read (addr phase): pads on bus probably not configured (status=0x10) +2 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +** Bad device mmc 0 ** +Using default environment + +i2c_write: pads on bus probably not configured (status=0x10) +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not turn CLK32KGAUDIO on: err = 2 +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Unable to read Board-ID +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Unable to read Baseboard-ID +i2c_probe: pads on bus probably not configured (status=0x10) +Unable to read Expansion-ID +SCSI: 0 device not found +ERROR: scsi device not found + +at drivers/block/disk-uclass.c:43/scsi_init() +Net: not set. Validating first E-fuse MAC +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +i2c_read (addr phase): pads on bus probably not configured (status=0x10) +Could not get PHY for cpsw: addr 2 +cpsw +Hit any key to stop autoboot: 0 +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +i2c_write: pads on bus probably not configured (status=0x10) +tps65903x: could not set LDO1 voltage. +Card did not respond to voltage select! +Tuning failed, dropping HS200 mode. +dropping DDR52 mode. +switch to partitions #0, OK +mmc1(part 0) is current device +Tuning failed, dropping HS200 mode. +dropping DDR52 mode. +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +Booting from eMMC ... +Wrong Image Format for bootm command +ERROR: can't get kernel image! +=> mmc list +OMAP SD/MMC: 0 +OMAP SD/MMC: 1 (eMMC) +=> mmc dev 1 +Tuning failed, dropping HS200 mode. +dropping DDR52 mode. +switch to partitions #0, OK +mmc1(part 0) is current device +=> mmc part + +Partition Map for MMC device 1 -- Partition Type: DOS + +Part Start Sector Num Sectors UUID Type + 1 63 144522 00000000-01 0c Boot + 2 144585 7405965 00000000-02 83 +=> + +Hi Nikhil D, Can you advise where might be the cause? I don't resolve it yet. Thank you. Terry + +One option I can suggest you is to debug the whole cmd execution all the way. Use printenv bootcmd It will display a list of commands that u-boot shell would run. Follow the links and understand what exactly is happening. You can manually run commands in the variables, e.g. run args_mmc At every step, check if the command did everything right. Focus especially on commands involving mmc This will help you root cause the issue to exact command failure. Regards, NIkhil D + diff --git a/data2/text/range/20001-25000/871172.txt b/data2/text/range/20001-25000/871172.txt new file mode 100644 index 0000000000000000000000000000000000000000..c828f9a684e7da45eb0e2f2e5a9ccca536497f47 --- /dev/null +++ b/data2/text/range/20001-25000/871172.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2EVM5777: Waiting for root device PARTUUID=8fe149ca-02... + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, DRA742, PCF8575, PMP, DRA752 HI，I met the problem，my EVM is TDA2 XC5777X，I check the SD card of CD is no connect，dra7-evm.dts define evm_3v3_sd: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; }; &mmc1 { status = "okay"; vmmc-supply = <&evm_3v3_sd>; vmmc_aux-supply = <&ldo1_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_sdr50>; pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev11_conf>; pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>; pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev20_conf>; pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; }; next is my report log/**************************************************************************************************/ U-Boot SPL 2016.05 (May 07 2019 - 10:44:23) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05 (May 07 2019 - 10:44:23 +0800) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 173 bytes read in 2 ms (84 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 3576504 bytes read in 188 ms (18.1 MiB/s) 106947 bytes read in 35 ms (2.9 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3692b8 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff1c2 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00038-g0af2ab562143 (zhj@zhj) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #3 SMP PREEMPT Mon Jan 6 16:31:50 CST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=f724ed05-02 rw rootwait ip=none mem=1024M cma=64M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 353148K/1012736K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 413828K reserved, 245760K cma-reserved, 193536K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) [ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) [ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) [ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000330] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000775] Console: colour dummy device 80x30 [ 0.000791] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000797] This ensures that you still see kernel messages. Please [ 0.000803] update your kernel commandline. [ 0.000817] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000829] pid_max: default: 32768 minimum: 301 [ 0.000930] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000940] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001482] Initializing cgroup subsys io [ 0.001497] Initializing cgroup subsys memory [ 0.001521] Initializing cgroup subsys devices [ 0.001534] Initializing cgroup subsys freezer [ 0.001545] Initializing cgroup subsys perf_event [ 0.001557] Initializing cgroup subsys pids [ 0.001583] CPU: Testing write buffer coherency: ok [ 0.001782] /cpus/cpu@0 missing clock-frequency property [ 0.001798] /cpus/cpu@1 missing clock-frequency property [ 0.001808] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001841] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080065] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080133] Brought up 2 CPUs [ 0.080146] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080152] CPU: All CPU(s) started in HYP mode. [ 0.080158] CPU: Virtualization extensions available. [ 0.080531] devtmpfs: initialized [ 0.109110] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110083] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.312832] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.312854] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317812] pinctrl core: initialized pinctrl subsystem [ 0.318678] NET: Registered protocol family 16 [ 0.319626] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350232] cpuidle: using governor ladder [ 0.380256] cpuidle: using governor menu [ 0.388788] OMAP GPIO hardware version 0.1 [ 0.395274] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411836] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411848] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.420434] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.420444] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.420922] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.420932] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.421516] OMAP DMA hardware revision 0.0 [ 0.461718] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462870] edma 43300000.edma: memcpy is disabled [ 0.467671] edma 43300000.edma: TI EDMA DMA engine driver [ 0.472089] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.472266] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472428] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472585] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472881] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.473069] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.476064] palmas 0-0058: IRQ missing: skipping irq request [ 0.490827] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563148] pcf857x 0-0020: probed [ 0.563394] pcf857x: probe of 0-0021 failed with error -121 [ 0.563555] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.563951] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564154] media: Linux media interface: v0.10 [ 0.564205] Linux video capture interface: v2.00 [ 0.564251] pps_core: LinuxPPS API ver. 1 registered [ 0.564258] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564283] PTP clock support registered [ 0.564335] EDAC MC: Ver: 3.0.0 [ 0.565083] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.565385] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.565718] Advanced Linux Sound Architecture Driver Initialized. [ 0.566582] clocksource: Switched to clocksource arch_sys_counter [ 0.577150] NET: Registered protocol family 2 [ 0.577643] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.577707] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.577832] TCP: Hash tables configured (established 8192 bind 8192) [ 0.577879] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.577910] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578115] NET: Registered protocol family 1 [ 0.578381] RPC: Registered named UNIX socket transport module. [ 0.578389] RPC: Registered udp transport module. [ 0.578396] RPC: Registered tcp transport module. [ 0.578402] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.579419] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.589494] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.590151] NFS: Registering the id_resolver key type [ 0.590177] Key type id_resolver registered [ 0.590184] Key type id_legacy registered [ 0.590242] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.591529] bounce: pool size: 64 pages [ 0.591679] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.591694] io scheduler noop registered [ 0.591707] io scheduler deadline registered [ 0.591740] io scheduler cfq registered (default) [ 0.596680] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599862] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599874] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599908] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599929] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629795] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629969] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629981] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629992] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.630001] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.630398] PCI: bus0: Fast back to back transfers disabled [ 0.630520] PCI: bus1: Fast back to back transfers enabled [ 0.630602] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630617] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630629] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630855] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.691124] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.694523] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.705923] console [ttyS0] enabled [ 1.710330] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.720035] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.730081] [drm] Initialized drm 1.1.0 20060810 [ 1.735602] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.742290] [drm] No driver support for vblank timestamp query. [ 1.748456] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.761398] loop: module loaded [ 1.764921] vmemexp device MAJOR num = 245 [ 1.769068] vmemexp class registered [ 1.772788] /dev/vmemexp device registered [ 1.776922] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.782796] nand: No NAND device found [ 1.786567] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.796524] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.801943] 7 ofpart partitions found on MTD device spi32766.0 [ 1.807820] Creating 7 MTD partitions on "spi32766.0": [ 1.812984] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.819097] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.825425] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.832378] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.839084] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.846468] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.852820] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.860641] libphy: Fixed MDIO Bus: probed [ 1.916616] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.922740] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.933323] libphy: 48485000.mdio: probed [ 1.937373] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.945412] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.954101] cpsw 48484000.ethernet: Detected MACID = f0:b5:d1:1b:98:86 [ 1.960765] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.967739] cpsw 48484000.ethernet: cpsw: Detected MACID = f0:b5:d1:1b:98:87 [ 1.976364] mousedev: PS/2 mouse device common for all mice [ 1.982571] i2c /dev entries driver [ 1.991323] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.996950] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.003335] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.009889] evm_3v3_sw: supplied by sysen1 [ 2.090362] mmc0: MAN_BKOPS_EN bit is not set [ 2.102344] mmc0: new HS200 MMC card at address 0001 [ 2.117838] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.132638] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.138818] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.168413] ledtrig-cpu: registered to indicate activity on CPUs [ 2.176915] aic_dvdd: supplied by evm_3v3_sw [ 2.182812] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.190302] NET: Registered protocol family 10 [ 2.205549] sit: IPv6 over IPv4 tunneling driver [ 2.210765] NET: Registered protocol family 17 [ 2.215446] Key type dns_resolver registered [ 2.219888] omap_voltage_late_init: Voltage driver support not added [ 2.226789] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.232998] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.239753] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.245960] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.254158] Power Management for TI OMAP4+ devices. [ 2.259243] Registering SWP/SWPB emulation handler [ 2.264982] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.272237] dmm 4e000000.dmm: initialized all PAT entries [ 2.278356] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.295040] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.301236] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.320817] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.326525] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.333443] hctosys: unable to open rtc device (rtc0) [ 2.334038] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.351380] evm_1v8: disabling [ 2.354451] aic_dvdd: disabling [ 2.357626] vmmcwl_fixed: disabling [ 2.361301] ldousb: disabling [ 2.364556] pbias_mmc_omap5: disabling [ 2.368479] ALSA device list: [ 2.371455] #0: DRA7xx-EVM [ 2.375004] Waiting for root device PARTUUID=f724ed05-02... + +Responses: +Hi, if you use EVM board what is the idea of this change "cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>;" in the dts? Can you try with default dts and see if it works? regards, Yordan + +Hi,Yordan The default dts doesn't works.I get the TI pristine pakeage(boot and rootfs),it's stopping another place.I gave my building pakeage to anothe board,then it's OK. + +Hi XinQingQiHua, Are you saying another board is working? Did I understand your statement correctly? Regards, Vishal + +Vishal Mahaveer said: Hi XinQingQiHua, Are you saying another board is working? Did I understand your statement correctly? Regards, Vishal HI Vishal， I gave my build roofts and boot to TI China FAE to verify if there is a problem with my board.I have only one EVM board.I think that my board set wrong in boot key(SW2 SW3 SW5). + +Hi XingQingQiHua, So I'm confused for several detail: 1. Based on the EVM, the prebuild footfs and boot in SDK is normally working for you? or just your own compiled file will cause this error? 2. What's your config of SW2/SW3/SW5? the default setting should be SW2(11100000),sw3(10000001),sw5(0001100000). best regard, Neo + +Hi, Closing this issue as there has been no update for a month. Please open a new thread if you have further questions. Regards, Vishal + diff --git a/data2/text/range/20001-25000/874296.txt b/data2/text/range/20001-25000/874296.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc63c3ed1a664e7fd26b31e6520d979053f0181d --- /dev/null +++ b/data2/text/range/20001-25000/874296.txt @@ -0,0 +1,247 @@ +Ticket Name: PROCESSOR-SDK-TDAX: TIDL modelImportTool model compatability + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Hi I am having problems with the modelImportTool from the Vision SDK. The documentation states that the tool is compatible with both MobileNet v1 and v2 from TensorFlow Slim, when I download these two models as tarballs from TensorFlow Slim, more specifically for this thread MobileNet v1, and try them out myself they do not pass the import. I have attached the output from the importModelTool along with the configuration file for importing the model. Is the error on my part or in the modelImportTool because this should work, right? Vision SDK version 3.08. Tested with the same exact results on both Windows and Linux. tidlImportTool_output.txt =============================== TIDL import - parsing =============================== + +TF Model (Proto) File : C:\Users\Love\Downloads\mobilenet_v1_1.0_224\mobilenet_v1_1.0_224_frozen.pb +TIDL Network File : C:\Users\Love\Downloads\mobilenet_v1_1.0_224\tidl_net_output.bin +TIDL Params File : C:\Users\Love\Downloads\mobilenet_v1_1.0_224\tidl_params_output.bin + +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. +TIDL limitation: TensorFlow operator Identity is not suported. + +Import error: This TensorFlow model has unsupported operators. Please check TIDL User's Guide for supported operators. +Error in sorting layers: matching layer cannot be found! + +Import error: This TensorFlow model's topology is not supported. Please check TIDL User's Guide for supported network topologies. +TIDL limitation: Reshape layer cannot be merged with layers other than InnerProduct or AveragePooling layer! + +Import error: Reshape layer cannot be merged. + +Num of Layer Detected : 35 +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + Num|TIDL Layer Name |Out Data Name |Group |#Ins |#Outs |Inbuf Ids |Outbuf Id |In NCHW |Out NCHW |MACS | +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + 0|TIDL_DataLayer |input | 0| -1| 1| x x x x x x x x | 0 | 0 0 0 0 | 1 3 224 224 | 0 | + 1|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_0/Relu6 | 1| 1| 1| 0 x x x x x x x | 1 | 1 3 224 224 | 1 32 112 112 | 11640832 | + 2|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_1_depthwise/Relu6 | 1| 1| 1| 1 x x x x x x x | 2 | 1 32 112 112 | 1 32 112 112 | 4415488 | + 3|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_1_pointwise/Relu6 | 1| 1| 1| 2 x x x x x x x | 3 | 1 32 112 112 | 1 64 112 112 | 27295744 | + 4|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_2_depthwise/Relu6 | 1| 1| 1| 3 x x x x x x x | 4 | 1 64 112 112 | 1 64 56 56 | 2207744 | + 5|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_2_pointwise/Relu6 | 1| 1| 1| 4 x x x x x x x | 5 | 1 64 56 56 | 1 128 56 56 | 26492928 | + 6|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_3_depthwise/Relu6 | 1| 1| 1| 5 x x x x x x x | 6 | 1 128 56 56 | 1 128 56 56 | 4415488 | + 7|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_3_pointwise/Relu6 | 1| 1| 1| 6 x x x x x x x | 7 | 1 128 56 56 | 1 128 56 56 | 52183040 | + 8|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_4_depthwise/Relu6 | 1| 1| 1| 7 x x x x x x x | 8 | 1 128 56 56 | 1 128 28 28 | 1103872 | + 9|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_4_pointwise/Relu6 | 1| 1| 1| 8 x x x x x x x | 9 | 1 128 28 28 | 1 256 28 28 | 26091520 | + 10|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_5_depthwise/Relu6 | 1| 1| 1| 9 x x x x x x x | 10 | 1 256 28 28 | 1 256 28 28 | 2207744 | + 11|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_5_pointwise/Relu6 | 1| 1| 1| 10 x x x x x x x | 11 | 1 256 28 28 | 1 256 28 28 | 51781632 | + 12|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_6_depthwise/Relu6 | 1| 1| 1| 11 x x x x x x x | 12 | 1 256 28 28 | 1 256 14 14 | 551936 | + 13|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_6_pointwise/Relu6 | 1| 1| 1| 12 x x x x x x x | 13 | 1 256 14 14 | 1 512 14 14 | 25890816 | + 14|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_7_depthwise/Relu6 | 1| 1| 1| 13 x x x x x x x | 14 | 1 512 14 14 | 1 512 14 14 | 1103872 | + 15|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_7_pointwise/Relu6 | 1| 1| 1| 14 x x x x x x x | 15 | 1 512 14 14 | 1 512 14 14 | 51580928 | + 16|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_8_depthwise/Relu6 | 1| 1| 1| 15 x x x x x x x | 16 | 1 512 14 14 | 1 512 14 14 | 1103872 | + 17|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_8_pointwise/Relu6 | 1| 1| 1| 16 x x x x x x x | 17 | 1 512 14 14 | 1 512 14 14 | 51580928 | + 18|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_9_depthwise/Relu6 | 1| 1| 1| 17 x x x x x x x | 18 | 1 512 14 14 | 1 512 14 14 | 1103872 | + 19|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_9_pointwise/Relu6 | 1| 1| 1| 18 x x x x x x x | 19 | 1 512 14 14 | 1 512 14 14 | 51580928 | + 20|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_10_depthwise/Relu6 | 1| 1| 1| 19 x x x x x x x | 20 | 1 512 14 14 | 1 512 14 14 | 1103872 | + 21|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_10_pointwise/Relu6 | 1| 1| 1| 20 x x x x x x x | 21 | 1 512 14 14 | 1 512 14 14 | 51580928 | + 22|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_11_depthwise/Relu6 | 1| 1| 1| 21 x x x x x x x | 22 | 1 512 14 14 | 1 512 14 14 | 1103872 | + 23|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_11_pointwise/Relu6 | 1| 1| 1| 22 x x x x x x x | 23 | 1 512 14 14 | 1 512 14 14 | 51580928 | + 24|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_12_depthwise/Relu6 | 1| 1| 1| 23 x x x x x x x | 24 | 1 512 14 14 | 1 512 7 7 | 275968 | + 25|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_12_pointwise/Relu6 | 1| 1| 1| 24 x x x x x x x | 25 | 1 512 7 7 | 1 1024 7 7 | 25790464 | + 26|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_13_depthwise/Relu6 | 1| 1| 1| 25 x x x x x x x | 26 | 1 1024 7 7 | 1 1024 7 7 | 551936 | + 27|TIDL_ConvolutionLayer |MobilenetV1/MobilenetV1/Conv2d_13_pointwise/Relu6 | 1| 1| 1| 26 x x x x x x x | 27 | 1 1024 7 7 | 1 1024 7 7 | 51480576 | + 28|TIDL_PoolingLayer |MobilenetV1/Logits/AvgPool_1a/AvgPool | 1| 1| 1| 27 x x x x x x x | 28 | 1 1024 7 7 | 1 1024 1 1 | 50176 | + 29|TIDL_ConvolutionLayer |MobilenetV1/Logits/Conv2d_1c_1x1/BiasAdd | 1| 1| 1| 29 x x x x x x x | 30 | 1 1024 1 1 | 1 1001 1 1 | 1026025 | + 30|TIDL_FlattenLayer |MobilenetV1/Predictions/Reshape | 1| 1| 1| 30 x x x x x x x | 31 | 1 1001 1 1 | 1 1 1 1001 | 1001 | + 31|TIDL_SoftMaxLayer |MobilenetV1/Predictions/Softmax | 1| 1| 1| 31 x x x x x x x | 32 | 1 1 1 1001 | 1 1001 1 1 | 1001 | + 32|TIDL_ShapeLayer |MobilenetV1/Predictions/Shape | 1| 1| 1|102 x x x x x x x | 33 | 1 1001 1 1 | 1 1001 1 1 | 1001 | + 33|TIDL_ReshapeLayer |MobilenetV1/Predictions/Reshape_1 | 1| 1| 1| 32 x x x x x x x | 34 | 1 1001 1 1 | 1 1001 1 1 | 1001 | +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Total Giga Macs : 0.5789 +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Shape Layer is not supported by TIDL and cannot be merged into any TIDL layer. +Reshape Layer is not supported by TIDL and cannot be merged into any TIDL layer. + +Import error: This TensorFlow model has operators that are supported by TIDL only if they can be merged with TIDL layers. But these operators cannot be merged with any TIDL layer. +Please check TIDL User's Guide for supported TensorFlow operators. + +TIDL import failed. Please check error messages. + mobilenet_v1_import_model.txt randParams = 0 + +modelType = 1 + +quantizationStyle = 1 + +quantRoundAdd = 50 + +numParamBits = 8 + +preProcType = 0 + +inElementType = 1 + +inQuantFactor = -1 + +rawSampleInData = 0 + +numSampleInData = 1 + +foldBnInConv2D = 1 + +inWidth = 224 + +inHeight = 224 + +inNumChannels = 3 + +sampleInData = C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test\testvecs\input\airshow.jpg + +tidlStatsTool = C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\utils\quantStatsTool\eve_test_dl_algo.out.exe + +inputNetFile = C:\Users\Love\Downloads\mobilenet_v1_1.0_224\mobilenet_v1_1.0_224_frozen.pb + +inputParamsFile = C:\Users\Love\Downloads\mobilenet_v1_1.0_224\mobilenet_v1_1.0_224_frozen.pb + +outputNetFile = C:\Users\Love\Downloads\mobilenet_v1_1.0_224\tidl_net_output.bin + +outputParamsFile = C:\Users\Love\Downloads\mobilenet_v1_1.0_224\tidl_params_output.bin + +Responses: +Hi, As stated in section 3.6.5 Importing Tensorflow Models in the userguide, TIDL only accepts optimized frozen graphs. So could you please optimize your graph using "optimize_for_inference.py" and then try importing? Thanks, Praveen + diff --git a/data2/text/range/20001-25000/875384.txt b/data2/text/range/20001-25000/875384.txt new file mode 100644 index 0000000000000000000000000000000000000000..d083413518e73be8b33dfc16567664f4fd97fbd1 --- /dev/null +++ b/data2/text/range/20001-25000/875384.txt @@ -0,0 +1,133 @@ +Ticket Name: D3-3P-TDA3X-SK: Cascade Usecase in VisionSDK 3.04 + +Query Text: +Part Number: D3-3P-TDA3X-SK Other Parts Discussed in Thread: TDA2, AWR1243, PGA460 I am playing with the Cascade usecase in VisionSDK. I understand in a cascade setup, there will be multiple transceiver chips used. Thus, there will be more than 4 RX channels coming down to the IssCapture link as each transceiver chip outputs max 4 RX channels. My questions: 1. Will a single instance of the IssCapture link in this usecase processing chain capture all cascade chips RX channels? If so, how does time sync take place between the different RF chips? 2. What's the SelectLink in the Chain graph for? I don't understand the need for the SelectLink? 3. I see the need to parallel process in the FFT Link thus 4 copies of it are deployed. Does that mean this example assume only 4 RX channels (or single RF chip used)? I also notice the 4 FFT Links are processing in IPU0. Wouldn't this be much slower than if it's done in DSP? And since 4 FFTs are done in IPU0, does this mean 4 FFT threads are launched to handle the processing? Would it be wide to maybe take advantage of IPU1 and assign 2 FFT processing to it to balance the processing load? or Even assign 2 FFTs to DSP1 and 2 to DSP2 which will process even faster than IPUs? Thank you, --Khai + +Responses: +Hi Note: Each transceiver chips may contain multiple RX antenna & currently we are using Capture(VIP Capture) link because data coming from VIP port & Both IssCpature & Capture link will support Multi-channel processing 1) Yes single instance of the Capture link will support processing of cascade chips RX channels & Synchronization will happen in Sync link, Please refer the sync link source code for more details . 2) The Select link will take a Multi-channel I/p data & It will split the data into multiple single-channel data. Some links will not support Multi-channel data processing, So we need to use select link to convert multi-channel data into multiple single-channel data. 3) currently in cascade use-case 4 channel of data we are processing & These 4 FFT links are not running on IPU core. Each FFT link is running on the following core Alg_RadarProcess_fft1 is running on EVE1 Alg_RadarProcess_fft1 is running on EVE2 Alg_RadarProcess_fft1 is running on EVE3 Alg_RadarProcess_fft1 is running on EVE4 Actually, they are using WorkQ concept for scheduling work from IPU core to the remote core(EVE core is remote here), For more information about WorkQ please refer the below document VSDK/vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_WorkQ.pdf. So there is no much load on IPU core. Thanks Gaviraju + +HI Gaviraju, So since we have 4 channels of FFT processing and only one EVE, processing the 4 FFT on EVE will have to be scheduled and done in sequential manner. Am i correct to assume then that in cascade mode, the more RX channels involved, the more processing time is required to process all the channels as they are done one by one? Thanks, --Khai + +Hi We have 4 channels of FFT processing and we have 4 EVE core, So we scheduling all 4 FFT processing on each core. ex: FFT1 is running on EVE1 core FFT2 is running on EVE2 core FFT3 is running on EVE3 core FFT4 is running on EVE4 core. So this will not consume more time to process to FFT algorithm. For more information you can refer the below usecase file: vision_sdk/apps/src/rtos/radar/src/usecases/cascade_radar_beam_form/chains_cascadeRadarBf.c or vision_sdk/apps/src/rtos/radar/src/usecases/cascade_radar_object_detect/chains_cascadeRadarOd.c pObj->radarFftParams1.workQcpuId = SYSTEM_PROC_EVE1; pObj->radarFftParams2.workQcpuId = SYSTEM_PROC_EVE2; pObj->radarFftParams3.workQcpuId = SYSTEM_PROC_EVE3; pObj->radarFftParams4.workQcpuId = SYSTEM_PROC_EVE4; These are parameter are set in the use-case, this will tell each FFT algorithm will run on each different EVE core. Thanks Gaviraju + +Hi Gaviraju, Do you have a use case that performs 2D FFT and then PeakDetection? I am using VisionSDK 3.04 which only has chains_cascadeRadarOd.c but it only does 1D FFT. Does the use case in chains_cascadeRadarBf.c does 2D-FFT? If so, where can I find that use case in the source code? Thanks, --Khai + +Hi Gaviraju, Just so you are aware, I am looking for cascade use case and not the single transceiver use case. Thanks, --Khai + +Hi By default 1D FFT (RADAR_FFT_MODE_HORIZONTAL) is enabled in chains_cascadeRadarOd.c usecase file such as pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; (FFT is calculated along the direction of 1st dimension (horizontal) of buffer) set as below if required pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_VERTICAL; ( FFT is calculated along the direction of 2nd dimension (vertical) of buffer) You can modify as below if you want to do both 1D & 2D FFT pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_HORZ_AND_VERT By default 1D & 2D FFT is enabled in chains_cascadeRadarBf.c. This is enbled inside this function "ChainsCommon_ar12xxSetFFTParams" & this function is called from chains_cascadeRadarBf.c Thanks Gaviraju + +Hi Gaviraju, TDA3 doesn't have 4 EVEs. Looks like this use case is intent to run on TDA2 EVM? Please confirm. Thanks, --Khai + +Hi Gaviraju, Do you have a doc that explains how the Cascade Use case work in the TDA2 board? It has an FPGA part which i am not sure what it's for? What's this use case capable of doing? We have the board in house but initial bring up we don't seem to be able to make some sense out of it. Thanks, --Khai + +Hi, Yes, this use-case intent to run on TDA2 EVM. Thanks Gaviraju + +Hi, Please refer to the below document. chapter 4: vision_sdk/docs/Radar/ProcessorSDKRadar_DataSheet.pdf Thanks Gaviraju + +Hi Gaviraju, Building VisionSDK 3.04 (we need to use this version as this has been our development version for more than 1 year) for Cascade use case failed with following link error. Please advice. I have tried stripping the number of supported use cases in vision_sdk/apps/configs/cfg.mk to hopefully make the binary size smaller but didn't help. RADAR_UC_LIST = \ UC_radar_capture_only \ UC_radar_read_fft_write \ UC_radar_objectdetect_display \ UC_radar_objectdetect_null \ UC_radar_capture_process \ UC_multi_radar_capture_fft_display \ UC_radar_read_objectdetect_write \ UC_cascade_radar_object_detect Thanks, --Khai Build of libraries done. # Configuro done! # Making tda2xx-evm:arp32_1:release:vision_sdk_lib... # Compiling tda2xx-evm:arp32_1:release:vision_sdk: src/main_common_eve1.c # Compiling tda2xx-evm:arp32_1:release:vision_sdk: src/tlb_config_eve1.c # Compiling tda2xx-evm:arp32_1:release:vision_sdk: ../eve_common/tlb_config_eve_common.c # Compiling tda2xx-evm:arp32_1:release:vision_sdk: ../eve_common/main_eve_common.c # Compiling tda2xx-evm:arp32_1:release:vision_sdk: C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/common/main_app/tda2xx/eve1/src/main_eve1.c # Compiling tda2xx-evm:arp32_1:release:vision_sdk: C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/common/app_init/app_init_eve.c # Compiling generated MAIN_APP_eve1_pearp32F.oearp32F # Linking into C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F... # "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 7: warning: no matching section "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 8: warning: no matching section "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 13: warning: no matching section "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 14: warning: no matching section "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/obj/vision_sdk/tda2xx-evm/arp32_1/release/vision_sdk_configuro/linker_mod.cmd", line 195: error: program will not fit into available memory. run placement with alignment fails for section ".bss:extMemNonCache:ipcShm" size 0xa66c0 page 1. Available memory ranges: SYSTEM_IPC_SHM_MEM size: 0x78000 unused: 0x78000 max hole: 0x78000 error: errors encountered during linking; "C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda 2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release. xearp32F" not built gmake[7]: *** [C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F] Error 1 gmake[6]: *** [arp32_1] Error 2 gmake[5]: *** [apps_eve1] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 + +Hi Can you share the O/P of the below command? gmake showconfig Thanks Gaviraju + +$ gmake showconfig C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () gmake -C C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs -f build_makeconfig.mk showconfig gmake[1]: Entering directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs' C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () # # Build Config is [ tda2xx_cascade_bios_radar ] # Build Config file is @ C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/configs/tda2xx_cascade_bios_radar/cfg.mk # Build Config .h file is @ C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/include/config/apps/tda2xx_cascade_bios_radar/system_cfg.h # Build CPUs is @ ipu1_0 ipu1_1 dsp1 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=yes # PROC_IPU2_INCLUDE=no # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=no # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=no # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-evm # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=ipu1_1 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=yes [options: yes no] # AWR1243_METAWAVE_LRR_CONFIG=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] # RADAR_BOARD=TDA2XX_CASCADE_RADAR [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Windows_NT [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] # A15_TARGET_OS=Bios [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=no # VPE_INCLUDE=no # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/rtos/opencl # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=no # # IPC config, # WORKQ_INCLUDE=yes # IPC_LIB_INCLUDE=yes # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=yes # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig # DEFAULT_DTB=dra7-evm-infoadas.dtb # CMEM_INCLUDE=no # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=no # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_dmaSwMs ALG_radarprocess # # Use-cases included in build, # UC_cascade_radar_capture_only UC_cascade_radar_object_detect UC_cascade_radar_object_detect_display # gmake -s -fbuild_makeconfig.mk check_cpu_include gmake[2]: Entering directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs' C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! () # # CPUs that are NOT required but included in config [ tda2xx_cascade_bios_radar ], # # # CPUs that are required but not included in config [ tda2xx_cascade_bios_radar ], # # # Edit C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/build/configs/tda2xx_cascade_bios_radar/cfg.mk to include or exclude CPUs in an application # gmake[2]: Leaving directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs' gmake[1]: Leaving directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs' + +Hi, We are not able to reproduce the issue in our setup with your changes. So the issue is here related memory requirement The available SYSTEM_IPC_SHM_MEM size: 0x78000 but for your requirement needs size = 0xa66c0. So Please increase the SYSTEM_IPC_SHM_MEM size for EVE1 core & try again. Refer to the below document for more information. chapter 6.2:vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf Thanks Gaviraju + +HI Gaviraju, I am able to get the 3.04 SDK code to build. Activating the cascade use case on TDA2 stuck, however.. Was there issue with 3.04 that you know about? We also have stock SDK 3.08 built that' built fine and running cascade mode on the TDA2 board no problem. Since our development thus far was on 3.04, we would like to get 3.04 to be able to work on TDA2 cascade mode as porting would be much faster staying on the same development code base. Attached are logs for both 3.04 vs 3.08 SDK running cascade. Note that in the 3.04 log, you will see 3 cascade use cases that's not typical. That's because I added one that show RDM on HDMI out. However, for both version, I simply activated use case (a). Thanks, --Khai 3.04-tda2.txt [IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + Null (TDA2xx Only) +[IPU1-0] e: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + Display (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 6.524766 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 6.525010 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 9.838193 s: +[IPU1-0] 9.838345 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-0] 10.838040 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 10.838223 s: CHAINS: Init AR12xx ... +[IPU1-0] 10.838498 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 10.838681 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 11.064570 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 11.064692 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 11.211187 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 11.243488 s: AR12XX: ES3.0 Device detected!! 3.08-tda2.txt [IPU1-0] RADAR Usecases +[IPU1-0] --------------- +[IPU1-0] +[IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 6.508936 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 6.509211 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 10.362349 s: +[IPU1-0] 10.362410 s: +[IPU1-0] +[IPU1-0] ======================== +[IPU1-0] 2D FFT Core Selection +[IPU1-0] ======================== +[IPU1-0] +[IPU1-0] 1: DSP +[IPU1-0] +[IPU1-0] 2: EVE +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 21.383334 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-0] 22.983377 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 22.983590 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 22.993686 s: !!!No Valid Configuration file is found. Use Default Configurations!!! +[IPU1-0] 22.993838 s: CHAINS: Init AR12xx ... +[IPU1-0] 22.994082 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 22.994540 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 22.994723 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 22.994845 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 23.220886 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 23.221008 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 23.323552 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 23.355883 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 23.973708 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 24.260721 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 24.297474 s: AWR12XX: Version Master : 1.10.0.20 +[IPU1-0] 24.297596 s: AWR12XX: Version RF:2.0.0.1 +[IPU1-0] 24.297688 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 24.297779 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 24.297871 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 24.299731 s: CHAINS: Config AR12xx ... +[IPU1-0] 24.299792 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 24.299914 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 2 +[IPU1-0] 24.300006 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 3 +[IPU1-0] 24.300097 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 4 +[IPU1-0] 24.387177 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 24.387268 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 24.485024 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 24.485115 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 24.582504 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 24.582596 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 24.679985 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 24.680076 s: AWR12XX: RF Boot Time = 10338 us +[IPU1-0] 24.691667 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 24.691911 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 24.693954 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 24.695967 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 24.698316 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 24.700359 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 24.705148 s: FILE_IO: Calibration file(calib_coef.bin) is present in sd card +[IPU1-0] 24.705270 s: Chains: NetworkTx Link +[IPU1-0] 24.705301 s: +[IPU1-0] +[IPU1-0] Select Network Mode, +[IPU1-0] -------------------- +[IPU1-0] 1: TFDTP +[IPU1-0] 2: TCP/IP +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] + +Hi A known issue in SDK 3.04 [Radar][Network]: Network transmission fails when running only IPU1_0 and IPU1_1 on Cascade Radar EVM Steps to reproduce: Build only for IPU1_0 and IPU1_1 for tda2xx_cascade_bios_radar in the SDK. Run the capture and Network Tx use-case. Run the network_rx tool from the PC side. UART console shows the assertion. Description: The Network Transmission Fails when running only IPU. The failure shows up as an assertion in the use-case. The issue does not occur when all the other cores are enabled. Happens for TCP/IP and TFDTP issue not observed if DSP, EVE or A15 enabled along with IPU cores. If you running the use-case using multi-core, then you can ignore this issue. Please use JTAG for debugging to find out where it's stuck. Thanks Gaviraju + +Hi Gaviraju, What's the reason for the number of 1D FFT chunks at the output of EVEs in the cascade mode on TDA2? Thanks, --Khai + diff --git a/data2/text/range/20001-25000/878943.txt b/data2/text/range/20001-25000/878943.txt new file mode 100644 index 0000000000000000000000000000000000000000..571d27ba69878dabe4f301f642c0752e92905e05 --- /dev/null +++ b/data2/text/range/20001-25000/878943.txt @@ -0,0 +1,763 @@ +Ticket Name: Compiler/TDA2EVM5777: Linux/TDA2: libdrm test + +Query Text: +Part Number: TDA2EVM5777 Tool/software: TI C/C++ Compiler Hi, i download the github.com/.../modeset-double-buffered.c modify modeset_draw function to remove frame copy and only call drmModeSetCrtc i use sdk( Processor SDK Linux Automotive 3.04.00.03) to cross compile measurement run time as below , about 16.8ms i found kernel drm_mode_setcrtc spend about 14ms How can i improve and reduce time ? Regards, Erwin. drivers/gpu/drm/drm_crtc.c [ 26.131660] lock,find 2 us [ 26.136438] mode vail 3 us [ 26.139154] connector 1 us [ 26.156455] set 14587 us => mutex lock [ 26.158998] free 3 us [ 26.161276] gpio 3 us,total: 14599 us [ 26.165037] lock,find 3 us [ 26.199348] lock,find 2 us [ 26.202064] mode vail 4 us [ 26.204864] connector 1 us [ 26.223116] set 15539 us => mutex lock [ 26.225681] free 3 us [ 26.227962] gpio 2 us,total: 15551 us modeset-double-buffered.c /* + * modeset - DRM Double-Buffered Modesetting Example + * + * Written 2012 by David Herrmann + * Dedicated to the Public Domain. + */ + +/* + * DRM Double-Buffered Modesetting Howto + * This example extends the modeset.c howto and introduces double-buffering. + * When drawing a new frame into a framebuffer, we should always draw into an + * unused buffer and not into the front buffer. If we draw into the front + * buffer, we might have drawn half the frame when the display-controller starts + * scanning out the next frame. Hence, we see flickering on the screen. + * The technique to avoid this is called double-buffering. We have two + * framebuffers, the front buffer which is currently used for scanout and a + * back-buffer that is used for drawing operations. When a frame is done, we + * simply swap both buffers. + * Swapping does not mean copying data, instead, only the pointers to the + * buffers are swapped. + * + * Please read modeset.c before reading this file as most of the functions stay + * the same. Only the differences are highlighted here. + * Also note that triple-buffering or any other number of buffers can be easily + * implemented by following the scheme here. However, in this example we limit + * the number of buffers to 2 so it is easier to follow. + */ + +#define _GNU_SOURCE +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct modeset_buf; +struct modeset_dev; +static int modeset_find_crtc(int fd, drmModeRes *res, drmModeConnector *conn, + struct modeset_dev *dev); +static int modeset_create_fb(int fd, struct modeset_buf *buf); +static void modeset_destroy_fb(int fd, struct modeset_buf *buf); +static int modeset_setup_dev(int fd, drmModeRes *res, drmModeConnector *conn, + struct modeset_dev *dev); +static int modeset_open(int *out, const char *node); +static int modeset_prepare(int fd); +static void modeset_draw(int fd); +static void modeset_cleanup(int fd); + +/* + * modeset_open() stays the same as before. + */ + +static int fb_id_left=0; +static int fb_id_right=0; + +static int modeset_open(int *out, const char *node) +{ + int fd, ret; + uint64_t has_dumb; + + fd = open(node, O_RDWR | O_CLOEXEC); + if (fd < 0) { + ret = -errno; + fprintf(stderr, "cannot open '%s': %m\n", node); + return ret; + } + + if (drmGetCap(fd, DRM_CAP_DUMB_BUFFER, &has_dumb) < 0 || + !has_dumb) { + fprintf(stderr, "drm device '%s' does not support dumb buffers\n", + node); + close(fd); + return -EOPNOTSUPP; + } + + *out = fd; + return 0; +} + +/* + * Previously, we used the modeset_dev objects to hold buffer informations, too. + * Technically, we could have split them but avoided this to make the + * example simpler. + * However, in this example we need 2 buffers. One back buffer and one front + * buffer. So we introduce a new structure modeset_buf which contains everything + * related to a single buffer. Each device now gets an array of two of these + * buffers. + * Each buffer consists of width, height, stride, size, handle, map and fb-id. + * They have the same meaning as before. + * + * Each device also gets a new integer field: front_buf. This field contains the + * index of the buffer that is currently used as front buffer / scanout buffer. + * In our example it can be 0 or 1. We flip it by using XOR: + * dev->front_buf ^= dev->front_buf + * + * Everything else stays the same. + */ + +struct modeset_buf { + uint32_t width; + uint32_t height; + uint32_t stride; + uint32_t size; + uint32_t handle; + uint8_t *map; + uint32_t fb; +}; + +struct modeset_dev { + struct modeset_dev *next; + + unsigned int front_buf; + struct modeset_buf bufs[2]; + + drmModeModeInfo mode; + uint32_t conn; + uint32_t crtc; + drmModeCrtc *saved_crtc; +}; + +static struct modeset_dev *modeset_list = NULL; +static struct modeset_dev *modeset_hdmi = NULL; + +/* + * modeset_prepare() stays the same. + */ + +static int modeset_prepare(int fd) +{ + drmModeRes *res; + drmModeConnector *conn; + unsigned int i; + struct modeset_dev *dev; + int ret; + + /* retrieve resources */ + res = drmModeGetResources(fd); + if (!res) { + fprintf(stderr, "cannot retrieve DRM resources (%d): %m\n", + errno); + return -errno; + } + + /* iterate all connectors */ + for (i = 0; i < res->count_connectors; ++i) { + /* get information for each connector */ + conn = drmModeGetConnector(fd, res->connectors[i]); + if (!conn) { + fprintf(stderr, "cannot retrieve DRM connector %u:%u (%d): %m\n", + i, res->connectors[i], errno); + continue; + } + + /* create a device structure */ + dev = malloc(sizeof(*dev)); + memset(dev, 0, sizeof(*dev)); + dev->conn = conn->connector_id; + + /* call helper function to prepare this connector */ + ret = modeset_setup_dev(fd, res, conn, dev); + if (ret) { + if (ret != -ENOENT) { + errno = -ret; + fprintf(stderr, "cannot setup device for connector %u:%u (%d): %m\n", + i, res->connectors[i], errno); + } + free(dev); + drmModeFreeConnector(conn); + continue; + } + + /* free connector data and link device into global list */ + drmModeFreeConnector(conn); + dev->next = modeset_list; + modeset_list = dev; + + if(!modeset_hdmi){ + printf("debug set modeset_hdmi ..\n"); + modeset_hdmi = modeset_list; + } + } + + /* free resources again */ + drmModeFreeResources(res); + return 0; +} + +/* + * modeset_setup_dev() sets up all resources for a single device. It mostly + * stays the same, but one thing changes: We allocate two framebuffers instead + * of one. That is, we call modeset_create_fb() twice. + * We also copy the width/height information into both framebuffers so + * modeset_create_fb() can use them without requiring a pointer to modeset_dev. + */ + +static int modeset_setup_dev(int fd, drmModeRes *res, drmModeConnector *conn, + struct modeset_dev *dev) +{ + int ret; + + /* check if a monitor is connected */ + if (conn->connection != DRM_MODE_CONNECTED) { + fprintf(stderr, "ignoring unused connector %u\n", + conn->connector_id); + return -ENOENT; + } + + /* check if there is at least one valid mode */ + if (conn->count_modes == 0) { + fprintf(stderr, "no valid mode for connector %u\n", + conn->connector_id); + return -EFAULT; + } + + /* copy the mode information into our device structure and into both + * buffers */ + memcpy(&dev->mode, &conn->modes[0], sizeof(dev->mode)); + dev->bufs[0].width = conn->modes[0].hdisplay; + dev->bufs[0].height = conn->modes[0].vdisplay; + dev->bufs[1].width = conn->modes[0].hdisplay; + dev->bufs[1].height = conn->modes[0].vdisplay; + fprintf(stderr, "mode for connector %u is %ux%u\n", + conn->connector_id, dev->bufs[0].width, dev->bufs[0].height); + + /* find a crtc for this connector */ + ret = modeset_find_crtc(fd, res, conn, dev); + if (ret) { + fprintf(stderr, "no valid crtc for connector %u\n", + conn->connector_id); + return ret; + } + + /* create framebuffer #1 for this CRTC */ + ret = modeset_create_fb(fd, &dev->bufs[0]); + //printf("\n call modeset_create_fb, bufs[0].fd:%x, ret:%d\n",dev->bufs[0].fb,ret); + if (ret) { + fprintf(stderr, "cannot create framebuffer for connector %u\n", + conn->connector_id); + return ret; + } + fb_id_left = dev->bufs[0].fb; + printf("app set fb_id_left:%x\n",fb_id_left); + + /* create framebuffer #2 for this CRTC */ + ret = modeset_create_fb(fd, &dev->bufs[1]); + //printf("\n call modeset_create_fb, bufs[1].fb:%x, ret:%d\n",dev->bufs[1].fb,ret); + if (ret) { + fprintf(stderr, "cannot create framebuffer for connector %u\n", + conn->connector_id); + modeset_destroy_fb(fd, &dev->bufs[0]); + return ret; + } + fb_id_right = dev->bufs[1].fb; + printf("app set fb_id_right:%x\n",fb_id_right); + + return 0; +} + +/* + * modeset_find_crtc() stays the same. + */ + +static int modeset_find_crtc(int fd, drmModeRes *res, drmModeConnector *conn, + struct modeset_dev *dev) +{ + drmModeEncoder *enc; + unsigned int i, j; + int32_t crtc; + struct modeset_dev *iter; + + /* first try the currently conected encoder+crtc */ + if (conn->encoder_id) + enc = drmModeGetEncoder(fd, conn->encoder_id); + else + enc = NULL; + + if (enc) { + if (enc->crtc_id) { + crtc = enc->crtc_id; + for (iter = modeset_list; iter; iter = iter->next) { + if (iter->crtc == crtc) { + crtc = -1; + break; + } + } + + if (crtc >= 0) { + drmModeFreeEncoder(enc); + dev->crtc = crtc; + return 0; + } + } + + drmModeFreeEncoder(enc); + } + + /* If the connector is not currently bound to an encoder or if the + * encoder+crtc is already used by another connector (actually unlikely + * but lets be safe), iterate all other available encoders to find a + * matching CRTC. */ + for (i = 0; i < conn->count_encoders; ++i) { + enc = drmModeGetEncoder(fd, conn->encoders[i]); + if (!enc) { + fprintf(stderr, "cannot retrieve encoder %u:%u (%d): %m\n", + i, conn->encoders[i], errno); + continue; + } + + /* iterate all global CRTCs */ + for (j = 0; j < res->count_crtcs; ++j) { + /* check whether this CRTC works with the encoder */ + if (!(enc->possible_crtcs & (1 << j))) + continue; + + /* check that no other device already uses this CRTC */ + crtc = res->crtcs[j]; + for (iter = modeset_list; iter; iter = iter->next) { + if (iter->crtc == crtc) { + crtc = -1; + break; + } + } + + /* we have found a CRTC, so save it and return */ + if (crtc >= 0) { + drmModeFreeEncoder(enc); + dev->crtc = crtc; + return 0; + } + } + + drmModeFreeEncoder(enc); + } + + fprintf(stderr, "cannot find suitable CRTC for connector %u\n", + conn->connector_id); + return -ENOENT; +} + +/* + * modeset_create_fb() is mostly the same as before. Buf instead of writing the + * fields of a modeset_dev, we now require a buffer pointer passed as @buf. + * Please note that buf->width and buf->height are initialized by + * modeset_setup_dev() so we can use them here. + */ + +static int modeset_create_fb(int fd, struct modeset_buf *buf) +{ + struct drm_mode_create_dumb creq; + struct drm_mode_destroy_dumb dreq; + struct drm_mode_map_dumb mreq; + int ret; + + /* create dumb buffer */ + memset(&creq, 0, sizeof(creq)); + creq.width = buf->width; + creq.height = buf->height; + creq.bpp = 32; + ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &creq); + if (ret < 0) { + fprintf(stderr, "cannot create dumb buffer (%d): %m\n", + errno); + return -errno; + } + buf->stride = creq.pitch; + buf->size = creq.size; + buf->handle = creq.handle; + + /* create framebuffer object for the dumb-buffer */ + ret = drmModeAddFB(fd, buf->width, buf->height, 24, 32, buf->stride, + buf->handle, &buf->fb); + if (ret) { + fprintf(stderr, "cannot create framebuffer (%d): %m\n", + errno); + ret = -errno; + goto err_destroy; + } + + /* prepare buffer for memory mapping */ + memset(&mreq, 0, sizeof(mreq)); + mreq.handle = buf->handle; + ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &mreq); + if (ret) { + fprintf(stderr, "cannot map dumb buffer (%d): %m\n", + errno); + ret = -errno; + goto err_fb; + } + + /* perform actual memory mapping */ + buf->map = mmap(0, buf->size, PROT_READ | PROT_WRITE, MAP_SHARED, + fd, mreq.offset); + if (buf->map == MAP_FAILED) { + fprintf(stderr, "cannot mmap dumb buffer (%d): %m\n", + errno); + ret = -errno; + goto err_fb; + } + + /* clear the framebuffer to 0 */ + memset(buf->map, 0, buf->size); + + return 0; + +err_fb: + drmModeRmFB(fd, buf->fb); +err_destroy: + memset(&dreq, 0, sizeof(dreq)); + dreq.handle = buf->handle; + drmIoctl(fd, DRM_IOCTL_MODE_DESTROY_DUMB, &dreq); + return ret; +} + +/* + * modeset_destroy_fb() is a new function. It does exactly the reverse of + * modeset_create_fb() and destroys a single framebuffer. The modeset.c example + * used to do this directly in modeset_cleanup(). + * We simply unmap the buffer, remove the drm-FB and destroy the memory buffer. + */ + +static void modeset_destroy_fb(int fd, struct modeset_buf *buf) +{ + struct drm_mode_destroy_dumb dreq; + + /* unmap buffer */ + munmap(buf->map, buf->size); + + /* delete framebuffer */ + drmModeRmFB(fd, buf->fb); + + /* delete dumb buffer */ + memset(&dreq, 0, sizeof(dreq)); + dreq.handle = buf->handle; + drmIoctl(fd, DRM_IOCTL_MODE_DESTROY_DUMB, &dreq); +} + +/* + * main() also stays almost exactly the same as before. We only need to change + * the way that we initially set the CRTCs. Instead of using the buffer + * information from modeset_dev, we now use dev->bufs[iter->front_buf] to get + * the current front-buffer and use this framebuffer for drmModeSetCrtc(). + */ + +int main(int argc, char **argv) +{ + int ret, fd; + const char *card; + struct modeset_dev *iter; + struct modeset_buf *buf; + + /* check which DRM device to open */ + if (argc > 1) + card = argv[1]; + else + card = "/dev/dri/card0"; + + fprintf(stderr, "using card '%s'\n", card); + + /* open the DRM device */ + ret = modeset_open(&fd, card); + if (ret) + goto out_return; + + /* prepare all connectors and CRTCs */ + ret = modeset_prepare(fd); + if (ret) + goto out_close; + + /* perform actual modesetting on each found connector+CRTC */ + for (iter = modeset_list; iter; iter = iter->next) { + iter->saved_crtc = drmModeGetCrtc(fd, iter->crtc); + buf = &iter->bufs[iter->front_buf]; + ret = drmModeSetCrtc(fd, iter->crtc, buf->fb, 0, 0, + &iter->conn, 1, &iter->mode); + if (ret) + fprintf(stderr, "cannot set CRTC for connector %u (%d): %m\n", + iter->conn, errno); + } + + /* draw some colors for 5seconds */ + modeset_draw(fd); + + /* cleanup everything */ + modeset_cleanup(fd); + + ret = 0; + +out_close: + close(fd); +out_return: + if (ret) { + errno = -ret; + fprintf(stderr, "modeset failed with error %d: %m\n", errno); + } else { + fprintf(stderr, "exiting\n"); + } + return ret; +} + +/* + * A short helper function to compute a changing color value. No need to + * understand it. + */ + +static uint8_t next_color(bool *up, uint8_t cur, unsigned int mod) +{ + uint8_t next; + + next = cur + (*up ? 1 : -1) * (rand() % mod); + if ((*up && next < cur) || (!*up && next > cur)) { + *up = !*up; + next = cur; + } + + return next; +} + +/* + * modeset_draw() is the place where things change. The render-logic is the same + * and we still draw a solid-color on the whole screen. However, we now have two + * buffers and need to flip between them. + * + * So before drawing into a framebuffer, we need to find the back-buffer. + * Remember, dev->font_buf is the index of the front buffer, so + * dev->front_buf ^ 1 is the index of the back buffer. We simply use + * dev->bufs[dev->front_buf ^ 1] to get the back-buffer and draw into it. + * + * After we finished drawing, we need to flip the buffers. We do this with the + * same call as we initially set the CRTC: drmModeSetCrtc(). However, we now + * pass the back-buffer as new framebuffer as we want to flip them. + * The only thing left to do is to change the dev->front_buf index to point to + * the new back-buffer (which was previously the front buffer). + * We then sleep for a short time period and start drawing again. + * + * If you run this example, you will notice that there is almost no flickering, + * anymore. The buffers are now swapped as a whole so each new frame shows + * always the whole new image. If you look carefully, you will notice that the + * modeset.c example showed many screen corruptions during redraw-cycles. + * + * However, this example is still not perfect. Imagine the display-controller is + * currently scanning out a new image and we call drmModeSetCrtc() + * simultaneously. It will then have the same effect as if we used a single + * buffer and we get some tearing. But, the chance that this happens is a lot + * less likely as with a single-buffer. This is because there is a long period + * between each frame called vertical-blank where the display-controller does + * not perform a scanout. If we swap the buffers in this period, we have the + * guarantee that there will be no tearing. See the modeset-vsync.c example if + * you want to know how you can guarantee that the swap takes place at a + * vertical-sync. + */ + +static void modeset_draw(int fd) +{ + uint8_t r, g, b; + bool r_up, g_up, b_up; + unsigned int i, j, k, off; + struct modeset_dev *iter; + struct modeset_buf *buf,*buf_left,*buf_right; + int ret; + int id_left=1; + struct timeval tvBegin; + struct timeval tvNow; + struct timeval tvTT; + unsigned int nTimeTest = 0; /* usec */ + + if( fb_id_left == (modeset_hdmi->bufs[0]).fb ){ + buf_left = &modeset_hdmi->bufs[0]; + buf_right = &modeset_hdmi->bufs[1]; + }else{ + buf_left = &modeset_hdmi->bufs[1]; + buf_right = &modeset_hdmi->bufs[0]; + } + printf("fb_id_left : %x\n",fb_id_left); + printf("bufs[0].fb : %x\n",modeset_hdmi->bufs[0].fb); + printf("bufs[1].fb : %x\n",modeset_hdmi->bufs[1].fb); + + gettimeofday(&tvBegin,NULL); + r = 0; g = 255; b = 0; + for (j = 0; j < buf_left->height; ++j) { + for (k = 0; k < buf_left->width; ++k) { + off = buf_left->stride * j + k * 4; + *(uint32_t*)&buf_left->map[off] = + (r << 16) | (g << 8) | b; + } + } + gettimeofday(&tvNow,NULL); + nTimeTest = (tvNow.tv_sec - tvBegin.tv_sec) * 1000000 + + (tvNow.tv_usec - tvBegin.tv_usec); + printf("buf0 tvBegin(sec:%8u , usec:%8u)\n",tvBegin.tv_sec,tvBegin.tv_usec); + printf("buf0 tvNow(sec:%8u , usec:%8u)\n",tvNow.tv_sec,tvNow.tv_usec); + printf("buf0 diff %8u, height:%d,width:%d\n",nTimeTest,buf_right->height,buf_right->width); + + gettimeofday(&tvBegin,NULL); + r = 255; g = 0; b = 0; + for (j = 0; j < buf_right->height; ++j) { + for (k = 0; k < buf_right->width; ++k) { + off = buf_right->stride * j + k * 4; + *(uint32_t*)&buf_right->map[off] = + (r << 16) | (g << 8) | b; + } + } + gettimeofday(&tvNow,NULL); + nTimeTest = (tvNow.tv_sec - tvBegin.tv_sec) * 1000000 + + (tvNow.tv_usec - tvBegin.tv_usec); + printf("buf1 tvBegin(sec:%8u , usec:%8u)\n",tvBegin.tv_sec,tvBegin.tv_usec); + printf("buf1 tvNow(sec:%8u , usec:%8u)\n",tvNow.tv_sec,tvNow.tv_usec); + printf("buf1 diff %8u, height:%d,width:%d\n",nTimeTest,buf_right->height,buf_right->width); +#if 1 + id_left = 1; + for(i=0; i<101; ++i){ + if(id_left){ +// r = 0; g = 255; b = 0; + buf = buf_left; + id_left = 0; + }else{ +// r = 255; g = 0; b = 0; + buf = buf_right; + id_left = 1; + } + +/* test 1 + 33ms, delay 10ms + for (j = 0; j < buf->height; ++j) { + for (k = 0; k < buf->width; ++k) { + off = buf->stride * j + k * 4; + *(uint32_t*)&buf->map[off] = + (r << 16) | (g << 8) | b; + } + } +*/ +/* test 2 + * remove copy buf, 16.8ms, delay 10ms*/ + +/* test 3 + * remove copy buf, 16.8ms, delay 1ms*/ + + //printf("drmModeSetCrtc fb_id:%x\n",buf->fb); + gettimeofday(&tvBegin,NULL); + ret = drmModeSetCrtc(fd, modeset_hdmi->crtc, buf->fb, 0, 0, + &modeset_hdmi->conn, 1, &modeset_hdmi->mode); + gettimeofday(&tvNow,NULL); + if(i >= 1){ + nTimeTest += (tvNow.tv_sec - tvBegin.tv_sec) * 1000000 + (tvNow.tv_usec - tvBegin.tv_usec); + } + + if (ret){ + fprintf(stderr, "cannot flip CRTC for connector %u (%d): %m\n", + modeset_hdmi->conn, errno); + } + } + printf("crtc diff %8u\n",nTimeTest); + return; +#endif + + srand(time(NULL)); + r = rand() % 0xff; + g = rand() % 0xff; + b = rand() % 0xff; + r_up = g_up = b_up = true; + + for (i = 0; i < 50; ++i) { + r = next_color(&r_up, r, 20); + g = next_color(&g_up, g, 10); + b = next_color(&b_up, b, 5); + + for (iter = modeset_list; iter; iter = iter->next) { + buf = &iter->bufs[iter->front_buf ^ 1]; + for (j = 0; j < buf->height; ++j) { + for (k = 0; k < buf->width; ++k) { + off = buf->stride * j + k * 4; + *(uint32_t*)&buf->map[off] = + (r << 16) | (g << 8) | b; + } + } + + ret = drmModeSetCrtc(fd, iter->crtc, buf->fb, 0, 0, + &iter->conn, 1, &iter->mode); + if (ret) + fprintf(stderr, "cannot flip CRTC for connector %u (%d): %m\n", + iter->conn, errno); + else + iter->front_buf ^= 1; + } + + usleep(100000); + } +} + +/* + * modeset_cleanup() stays the same as before. But it now calls + * modeset_destroy_fb() instead of accessing the framebuffers directly. + */ + +static void modeset_cleanup(int fd) +{ + struct modeset_dev *iter; + + while (modeset_list) { + /* remove from global list */ + iter = modeset_list; + modeset_list = iter->next; + + /* restore saved CRTC configuration */ + drmModeSetCrtc(fd, + iter->saved_crtc->crtc_id, + iter->saved_crtc->buffer_id, + iter->saved_crtc->x, + iter->saved_crtc->y, + &iter->conn, + 1, + &iter->saved_crtc->mode); + drmModeFreeCrtc(iter->saved_crtc); + + /* destroy framebuffers */ + modeset_destroy_fb(fd, &iter->bufs[1]); + modeset_destroy_fb(fd, &iter->bufs[0]); + + /* free allocated memory */ + free(iter); + } +} + +/* + * This was a very short extension to the basic modesetting example that shows + * how double-buffering is implemented. Double-buffering is the de-facto + * standard in any graphics application so any other example will be based on + * this. It is important to understand the ideas behind it as the code is pretty + * easy and short compared to modeset.c. + * + * Double-buffering doesn't solve all problems. Vsync'ed page-flips solve most + * of the problems that still occur, but has problems on it's own (see + * modeset-vsync.c for a discussion). + * + * If you want more code, I can recommend reading the source-code of: + * - plymouth (which uses dumb-buffers like this example; very easy to understand) + * - kmscon (which uses libuterm to do this) + * - wayland (very sophisticated DRM renderer; hard to understand fully as it + * uses more complicated techniques like DRM planes) + * - xserver (very hard to understand as it is split across many files/projects) + * + * Any feedback is welcome. Feel free to use this code freely for your own + * documentation or projects. + * + * - Hosted on http://github.com/dvdhrm/docs + * - Written by David Herrmann + */ + drm_crtc.c + +Responses: +drmModeSetCrtc is a blocking call and will wait for VSYNC. What is the FPS of your display? + +i used TDA2EVM5777 board HDMI display it is 60FPS about 16.6ms Connectors: id encoder status name size (mm) modes encoders 32 31 connected HDMI-A-1 0x0 30 31 modes: name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot) 1024x768 60 1024 1048 1184 1344 768 772 777 806 flags: phsync, nvsync; type: preferred, driver + diff --git a/data2/text/range/25001-30000/695959.txt b/data2/text/range/25001-30000/695959.txt new file mode 100644 index 0000000000000000000000000000000000000000..a9f7a8d497d33ae10ecb7ccf4ee59c150cc6ee91 --- /dev/null +++ b/data2/text/range/25001-30000/695959.txt @@ -0,0 +1,439 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux boot file + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I used tda2xx_evm_linux_all mode before，and directory PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot will produce three files MLO、u-boot.img、uenv.txt. But when i used tda2xx_evm_linux_opencx mode ， there are nothing file generate in directory PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot. Is this normal？ + +Responses: +Hi Xie Baojian, No For tda2xx_evm_linux_opencx - This also generate all three files MLO、u-boot.img、uenv.txt under "PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot" folder + +Hi Jena, but in my tda2xx_evm_linux_opencx , it can generate apps.out but there are no file generated in folder “PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot”， What's the problem? How can I generate these three files？ Thanks, Xie Baojian + +Hi Xie Baojian, Just run "make linux_install" , it will copy MLO、u-boot.img、uenv.txt under "PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot" folder + +make linux_install log.txt hancan@hancan-virtual-machine:~/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build$ make linux_install +make -C ./hlos/makerules/linux -f build_kernel.mk kernel_install +make[1]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' +make -fbuild_kernel.mk kernel_build KERNEL_TARGET=modules_install INSTALL_MOD_PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs +make[2]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' +make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm CROSS_COMPILE=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- modules_install +make[3]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' + INSTALL arch/arm/crypto/aes-arm-bs.ko + INSTALL arch/arm/crypto/aes-arm-ce.ko + INSTALL arch/arm/crypto/aes-arm.ko + INSTALL arch/arm/crypto/ghash-arm-ce.ko + INSTALL arch/arm/crypto/sha1-arm-ce.ko + INSTALL arch/arm/crypto/sha1-arm-neon.ko + INSTALL arch/arm/crypto/sha1-arm.ko + INSTALL arch/arm/crypto/sha2-arm-ce.ko + INSTALL arch/arm/crypto/sha256-arm.ko + INSTALL arch/arm/crypto/sha512-arm.ko + INSTALL crypto/ablk_helper.ko + INSTALL crypto/af_alg.ko + INSTALL crypto/algif_hash.ko + INSTALL crypto/algif_skcipher.ko + INSTALL crypto/arc4.ko + INSTALL crypto/authenc.ko + INSTALL crypto/authencesn.ko + INSTALL crypto/cbc.ko + INSTALL crypto/ccm.ko + INSTALL crypto/cmac.ko + INSTALL crypto/cryptd.ko + INSTALL crypto/ctr.ko + INSTALL crypto/des_generic.ko + INSTALL crypto/drbg.ko + INSTALL crypto/ecb.ko + INSTALL crypto/echainiv.ko + INSTALL crypto/gcm.ko + INSTALL crypto/gf128mul.ko + INSTALL crypto/ghash-generic.ko + INSTALL crypto/hmac.ko + INSTALL crypto/jitterentropy_rng.ko + INSTALL crypto/md5.ko + INSTALL crypto/seqiv.ko + INSTALL crypto/sha1_generic.ko + INSTALL crypto/sha256_generic.ko + INSTALL crypto/sha512_generic.ko + INSTALL crypto/tcrypt.ko + INSTALL drivers/ata/ahci.ko + INSTALL drivers/ata/ahci_platform.ko + INSTALL drivers/ata/libahci.ko + INSTALL drivers/ata/libahci_platform.ko + INSTALL drivers/ata/libata.ko + INSTALL drivers/ata/sata_mv.ko + INSTALL drivers/bluetooth/btmrvl.ko + INSTALL drivers/bluetooth/btmrvl_sdio.ko + INSTALL drivers/cdrom/cdrom.ko + INSTALL drivers/char/hw_random/omap-rng.ko + INSTALL drivers/char/hw_random/rng-core.ko + INSTALL drivers/crypto/omap-aes-driver.ko + INSTALL drivers/crypto/omap-des.ko + INSTALL drivers/crypto/omap-sham.ko + INSTALL drivers/extcon/extcon-palmas.ko + INSTALL drivers/extcon/extcon-usb-gpio.ko + INSTALL drivers/extcon/extcon.ko + INSTALL drivers/gpio/gpio-pisosr.ko + INSTALL drivers/gpio/gpio-tpic2810.ko + INSTALL drivers/hid/usbhid/usbhid.ko + INSTALL drivers/hwmon/ntc_thermistor.ko + INSTALL drivers/iio/adc/ti_am335x_adc.ko + INSTALL drivers/iio/buffer/kfifo_buf.ko + INSTALL drivers/input/keyboard/matrix_keypad.ko + INSTALL drivers/input/keyboard/qt1070.ko + INSTALL drivers/input/matrix-keymap.ko + INSTALL drivers/input/misc/adxl34x-i2c.ko + INSTALL drivers/input/misc/adxl34x-spi.ko + INSTALL drivers/input/misc/adxl34x.ko + INSTALL drivers/input/misc/rotary_encoder.ko + INSTALL drivers/input/mouse/cyapatp.ko + INSTALL drivers/input/touchscreen/pixcir_i2c_ts.ko + INSTALL drivers/input/touchscreen/st1232.ko + INSTALL drivers/input/touchscreen/ti_am335x_tsc.ko + INSTALL drivers/media/i2c/adv7180.ko + INSTALL drivers/media/i2c/ml86v7667.ko + INSTALL drivers/media/i2c/mt9t11x.ko + INSTALL drivers/media/i2c/ov2659.ko + INSTALL drivers/media/platform/soc_camera/soc_camera.ko + INSTALL drivers/media/platform/soc_camera/soc_camera_platform.ko + INSTALL drivers/media/platform/soc_camera/soc_mediabus.ko + INSTALL drivers/media/usb/gspca/gspca_main.ko + INSTALL drivers/media/usb/uvc/uvcvideo.ko + INSTALL drivers/media/v4l2-core/videobuf-core.ko + INSTALL drivers/media/v4l2-core/videobuf2-vmalloc.ko + INSTALL drivers/mfd/ti_am335x_tscadc.ko + INSTALL drivers/mtd/tests/mtd_nandbiterrs.ko + INSTALL drivers/mtd/tests/mtd_nandecctest.ko + INSTALL drivers/mtd/tests/mtd_oobtest.ko + INSTALL drivers/mtd/tests/mtd_pagetest.ko + INSTALL drivers/mtd/tests/mtd_readtest.ko + INSTALL drivers/mtd/tests/mtd_speedtest.ko + INSTALL drivers/mtd/tests/mtd_stresstest.ko + INSTALL drivers/mtd/tests/mtd_subpagetest.ko + INSTALL drivers/mtd/tests/mtd_torturetest.ko + INSTALL drivers/net/can/c_can/c_can.ko + INSTALL drivers/net/can/c_can/c_can_platform.ko + INSTALL drivers/net/can/can-dev.ko + INSTALL drivers/net/can/spi/mcp251x.ko + INSTALL drivers/net/ethernet/broadcom/tg3.ko + INSTALL drivers/net/ethernet/intel/e1000/e1000.ko + INSTALL drivers/net/ethernet/intel/e1000e/e1000e.ko + INSTALL drivers/net/ethernet/marvell/skge.ko + INSTALL drivers/net/ethernet/ti/prueth.ko + INSTALL drivers/net/usb/asix.ko + INSTALL drivers/net/usb/ax88179_178a.ko + INSTALL drivers/net/usb/cdc_ether.ko + INSTALL drivers/net/usb/cdc_ncm.ko + INSTALL drivers/net/usb/cdc_subset.ko + INSTALL drivers/net/usb/net1080.ko + INSTALL drivers/net/usb/pegasus.ko + INSTALL drivers/net/usb/r8152.ko + INSTALL drivers/net/usb/smsc75xx.ko + INSTALL drivers/net/usb/smsc95xx.ko + INSTALL drivers/net/usb/usbnet.ko + INSTALL drivers/net/usb/zaurus.ko + INSTALL drivers/net/wireless/brcm80211/brcmfmac/brcmfmac.ko + INSTALL drivers/net/wireless/brcm80211/brcmutil/brcmutil.ko + INSTALL drivers/net/wireless/iwlwifi/dvm/iwldvm.ko + INSTALL drivers/net/wireless/iwlwifi/iwlwifi.ko + INSTALL drivers/net/wireless/mwifiex/mwifiex.ko + INSTALL drivers/net/wireless/mwifiex/mwifiex_sdio.ko + INSTALL drivers/net/wireless/rt2x00/rt2800lib.ko + INSTALL drivers/net/wireless/rt2x00/rt2800usb.ko + INSTALL drivers/net/wireless/rt2x00/rt2x00lib.ko + INSTALL drivers/net/wireless/rt2x00/rt2x00usb.ko + INSTALL drivers/net/wireless/ti/wl18xx/wl18xx.ko + INSTALL drivers/net/wireless/ti/wlcore/wlcore.ko + INSTALL drivers/net/wireless/ti/wlcore/wlcore_sdio.ko + INSTALL drivers/net/wireless/ti/wlcore/wlcore_spi.ko + INSTALL drivers/power/max17040_battery.ko + INSTALL drivers/power/max17042_battery.ko + INSTALL drivers/remoteproc/am437x_pruss_wrapper.ko + INSTALL drivers/remoteproc/omap_remoteproc.ko + INSTALL drivers/remoteproc/pru_rproc.ko + INSTALL drivers/remoteproc/pruss.ko + INSTALL drivers/remoteproc/pruss_intc.ko + INSTALL drivers/remoteproc/remoteproc.ko + INSTALL drivers/rpmsg/rpmsg-rpc.ko + INSTALL drivers/rpmsg/rpmsg_pru.ko + INSTALL drivers/rpmsg/virtio_rpmsg_bus.ko + INSTALL drivers/rtc/rtc-ds1307.ko + INSTALL drivers/rtc/rtc-omap.ko + INSTALL drivers/rtc/rtc-palmas.ko + INSTALL drivers/rtc/rtc-tps6586x.ko + INSTALL drivers/rtc/rtc-tps65910.ko + INSTALL drivers/scsi/scsi_mod.ko + INSTALL drivers/scsi/sd_mod.ko + INSTALL drivers/scsi/sr_mod.ko + INSTALL drivers/usb/class/cdc-acm.ko + INSTALL drivers/usb/core/usbcore.ko + INSTALL drivers/usb/dwc3/dwc3-omap.ko + INSTALL drivers/usb/dwc3/dwc3.ko + INSTALL drivers/usb/gadget/function/u_ether.ko + INSTALL drivers/usb/gadget/function/u_serial.ko + INSTALL drivers/usb/gadget/function/usb_f_acm.ko + INSTALL drivers/usb/gadget/function/usb_f_ecm.ko + INSTALL drivers/usb/gadget/function/usb_f_ecm_subset.ko + INSTALL drivers/usb/gadget/function/usb_f_fs.ko + INSTALL drivers/usb/gadget/function/usb_f_hid.ko + INSTALL drivers/usb/gadget/function/usb_f_mass_storage.ko + INSTALL drivers/usb/gadget/function/usb_f_midi.ko + INSTALL drivers/usb/gadget/function/usb_f_ncm.ko + INSTALL drivers/usb/gadget/function/usb_f_obex.ko + INSTALL drivers/usb/gadget/function/usb_f_printer.ko + INSTALL drivers/usb/gadget/function/usb_f_rndis.ko + INSTALL drivers/usb/gadget/function/usb_f_serial.ko + INSTALL drivers/usb/gadget/function/usb_f_ss_lb.ko + INSTALL drivers/usb/gadget/function/usb_f_uac2.ko + INSTALL drivers/usb/gadget/function/usb_f_uvc.ko + INSTALL drivers/usb/gadget/legacy/g_acm_ms.ko + INSTALL drivers/usb/gadget/legacy/g_audio.ko + INSTALL drivers/usb/gadget/legacy/g_cdc.ko + INSTALL drivers/usb/gadget/legacy/g_dbgp.ko + INSTALL drivers/usb/gadget/legacy/g_ether.ko + INSTALL drivers/usb/gadget/legacy/g_ffs.ko + INSTALL drivers/usb/gadget/legacy/g_hid.ko + INSTALL drivers/usb/gadget/legacy/g_mass_storage.ko + INSTALL drivers/usb/gadget/legacy/g_midi.ko + INSTALL drivers/usb/gadget/legacy/g_multi.ko + INSTALL drivers/usb/gadget/legacy/g_ncm.ko + INSTALL drivers/usb/gadget/legacy/g_printer.ko + INSTALL drivers/usb/gadget/legacy/g_serial.ko + INSTALL drivers/usb/gadget/legacy/g_webcam.ko + INSTALL drivers/usb/gadget/legacy/g_zero.ko + INSTALL drivers/usb/gadget/legacy/gadgetfs.ko + INSTALL drivers/usb/gadget/libcomposite.ko + INSTALL drivers/usb/gadget/udc/udc-core.ko + INSTALL drivers/usb/host/ehci-hcd.ko + INSTALL drivers/usb/host/ehci-omap.ko + INSTALL drivers/usb/host/ehci-pci.ko + INSTALL drivers/usb/host/ehci-platform.ko + INSTALL drivers/usb/host/ohci-hcd.ko + INSTALL drivers/usb/host/ohci-pci.ko + INSTALL drivers/usb/host/ohci-platform.ko + INSTALL drivers/usb/host/r8a66597-hcd.ko + INSTALL drivers/usb/host/xhci-hcd.ko + INSTALL drivers/usb/host/xhci-pci.ko + INSTALL drivers/usb/host/xhci-plat-hcd.ko + INSTALL drivers/usb/isp1760/isp1760.ko + INSTALL drivers/usb/misc/usbtest.ko + INSTALL drivers/usb/musb/am35x.ko + INSTALL drivers/usb/musb/musb_am335x.ko + INSTALL drivers/usb/musb/musb_dsps.ko + INSTALL drivers/usb/musb/musb_hdrc.ko + INSTALL drivers/usb/musb/omap2430.ko + INSTALL drivers/usb/phy/phy-isp1301.ko + INSTALL drivers/usb/serial/usbserial.ko + INSTALL drivers/usb/storage/usb-storage.ko + INSTALL drivers/virtio/virtio.ko + INSTALL drivers/virtio/virtio_ring.ko + INSTALL drivers/w1/masters/omap_hdq.ko + INSTALL drivers/w1/wire.ko + INSTALL drivers/watchdog/omap_wdt.ko + INSTALL fs/configfs/configfs.ko + INSTALL lib/crc-ccitt.ko + INSTALL lib/crc-itu-t.ko + INSTALL lib/crc7.ko + INSTALL lib/libcrc32c.ko + INSTALL lib/ts_bm.ko + INSTALL lib/ts_fsm.ko + INSTALL lib/ts_kmp.ko + INSTALL net/802/p8022.ko + INSTALL net/802/psnap.ko + INSTALL net/802/stp.ko + INSTALL net/8021q/8021q.ko + INSTALL net/bluetooth/bluetooth.ko + INSTALL net/bridge/br_netfilter.ko + INSTALL net/bridge/bridge.ko + INSTALL net/bridge/netfilter/ebt_802_3.ko + INSTALL net/bridge/netfilter/ebt_among.ko + INSTALL net/bridge/netfilter/ebt_arp.ko + INSTALL net/bridge/netfilter/ebt_arpreply.ko + INSTALL net/bridge/netfilter/ebt_dnat.ko + INSTALL net/bridge/netfilter/ebt_ip.ko + INSTALL net/bridge/netfilter/ebt_ip6.ko + INSTALL net/bridge/netfilter/ebt_limit.ko + INSTALL net/bridge/netfilter/ebt_log.ko + INSTALL net/bridge/netfilter/ebt_mark.ko + INSTALL net/bridge/netfilter/ebt_mark_m.ko + INSTALL net/bridge/netfilter/ebt_nflog.ko + INSTALL net/bridge/netfilter/ebt_pkttype.ko + INSTALL net/bridge/netfilter/ebt_redirect.ko + INSTALL net/bridge/netfilter/ebt_snat.ko + INSTALL net/bridge/netfilter/ebt_stp.ko + INSTALL net/bridge/netfilter/ebt_vlan.ko + INSTALL net/bridge/netfilter/ebtable_broute.ko + INSTALL net/bridge/netfilter/ebtable_filter.ko + INSTALL net/bridge/netfilter/ebtable_nat.ko + INSTALL net/bridge/netfilter/ebtables.ko + INSTALL net/can/can-bcm.ko + INSTALL net/can/can-gw.ko + INSTALL net/can/can-raw.ko + INSTALL net/can/can.ko + INSTALL net/ipv4/ah4.ko + INSTALL net/ipv4/esp4.ko + INSTALL net/ipv4/ipcomp.ko + INSTALL net/ipv4/netfilter/arp_tables.ko + INSTALL net/ipv4/netfilter/arpt_mangle.ko + INSTALL net/ipv4/netfilter/arptable_filter.ko + INSTALL net/ipv4/netfilter/ip_tables.ko + INSTALL net/ipv4/netfilter/ipt_MASQUERADE.ko + INSTALL net/ipv4/netfilter/iptable_filter.ko + INSTALL net/ipv4/netfilter/iptable_nat.ko + INSTALL net/ipv4/netfilter/nf_conntrack_ipv4.ko + INSTALL net/ipv4/netfilter/nf_defrag_ipv4.ko + INSTALL net/ipv4/netfilter/nf_nat_ipv4.ko + INSTALL net/ipv4/netfilter/nf_nat_masquerade_ipv4.ko + INSTALL net/ipv4/xfrm4_mode_beet.ko + INSTALL net/ipv4/xfrm4_mode_transport.ko + INSTALL net/ipv4/xfrm4_mode_tunnel.ko + INSTALL net/ipv4/xfrm4_tunnel.ko + INSTALL net/ipv6/ah6.ko + INSTALL net/ipv6/esp6.ko + INSTALL net/ipv6/ip6_tunnel.ko + INSTALL net/ipv6/ipcomp6.ko + INSTALL net/ipv6/mip6.ko + INSTALL net/ipv6/tunnel6.ko + INSTALL net/ipv6/xfrm6_tunnel.ko + INSTALL net/key/af_key.ko + INSTALL net/llc/llc.ko + INSTALL net/mac80211/mac80211.ko + INSTALL net/netfilter/nf_conntrack.ko + INSTALL net/netfilter/nf_conntrack_proto_sctp.ko + INSTALL net/netfilter/nf_nat.ko + INSTALL net/netfilter/nf_nat_proto_sctp.ko + INSTALL net/netfilter/x_tables.ko + INSTALL net/netfilter/xt_CLASSIFY.ko + INSTALL net/netfilter/xt_IDLETIMER.ko + INSTALL net/netfilter/xt_comment.ko + INSTALL net/netfilter/xt_cpu.ko + INSTALL net/netfilter/xt_iprange.ko + INSTALL net/netfilter/xt_length.ko + INSTALL net/netfilter/xt_limit.ko + INSTALL net/netfilter/xt_mac.ko + INSTALL net/netfilter/xt_mark.ko + INSTALL net/netfilter/xt_multiport.ko + INSTALL net/netfilter/xt_nat.ko + INSTALL net/netfilter/xt_pkttype.ko + INSTALL net/netfilter/xt_policy.ko + INSTALL net/netfilter/xt_sctp.ko + INSTALL net/netfilter/xt_tcpudp.ko + INSTALL net/rpmsg/rpmsg_proto.ko + INSTALL net/sched/act_csum.ko + INSTALL net/sched/act_gact.ko + INSTALL net/sched/act_ipt.ko + INSTALL net/sched/act_mirred.ko + INSTALL net/sched/act_nat.ko + INSTALL net/sched/act_pedit.ko + INSTALL net/sched/act_police.ko + INSTALL net/sched/act_simple.ko + INSTALL net/sched/act_skbedit.ko + INSTALL net/sched/cls_basic.ko + INSTALL net/sched/cls_flow.ko + INSTALL net/sched/cls_fw.ko + INSTALL net/sched/cls_route.ko + INSTALL net/sched/cls_rsvp.ko + INSTALL net/sched/cls_rsvp6.ko + INSTALL net/sched/cls_tcindex.ko + INSTALL net/sched/cls_u32.ko + INSTALL net/sched/em_cmp.ko + INSTALL net/sched/em_meta.ko + INSTALL net/sched/em_nbyte.ko + INSTALL net/sched/em_text.ko + INSTALL net/sched/em_u32.ko + INSTALL net/sched/sch_cbq.ko + INSTALL net/sched/sch_choke.ko + INSTALL net/sched/sch_codel.ko + INSTALL net/sched/sch_drr.ko + INSTALL net/sched/sch_dsmark.ko + INSTALL net/sched/sch_fq_codel.ko + INSTALL net/sched/sch_gred.ko + INSTALL net/sched/sch_hfsc.ko + INSTALL net/sched/sch_htb.ko + INSTALL net/sched/sch_ingress.ko + INSTALL net/sched/sch_mqprio.ko + INSTALL net/sched/sch_multiq.ko + INSTALL net/sched/sch_netem.ko + INSTALL net/sched/sch_prio.ko + INSTALL net/sched/sch_qfq.ko + INSTALL net/sched/sch_red.ko + INSTALL net/sched/sch_sfb.ko + INSTALL net/sched/sch_sfq.ko + INSTALL net/sched/sch_tbf.ko + INSTALL net/sched/sch_teql.ko + INSTALL net/sctp/sctp.ko + INSTALL net/wireless/cfg80211.ko + INSTALL net/xfrm/xfrm_algo.ko + INSTALL net/xfrm/xfrm_ipcomp.ko + INSTALL net/xfrm/xfrm_user.ko + INSTALL sound/core/snd-hwdep.ko + INSTALL sound/core/snd-rawmidi.ko + INSTALL sound/soc/codecs/snd-soc-ak4642.ko + INSTALL sound/soc/codecs/snd-soc-tlv320aic31xx.ko + INSTALL sound/soc/codecs/snd-soc-wm8978.ko + INSTALL sound/usb/snd-usb-audio.ko + INSTALL sound/usb/snd-usbmidi-lib.ko + DEPMOD 4.4.84-00018-gd326d64-dirty +make[3]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' +make[2]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' +install -d /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/hlos/linux/boot +install /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/arch/arm/boot/zImage /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/boot +mkimage -A arm -O linux -C none -T kernel -a 0x80008000 -e 0x80008000 -n 'Linux uImage' -d "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/arch/arm/boot/zImage" "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/arch/arm/boot/uImage" +Image Name: Linux uImage +Created: Tue Jun 5 09:03:44 2018 +Image Type: ARM Linux Kernel Image (uncompressed) +Data Size: 3551920 Bytes = 3468.67 kB = 3.39 MB +Load Address: 80008000 +Entry Point: 80008000 +install /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/arch/arm/boot/uImage /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/boot +cd /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/; cp -v dra7-evm-infoadas.dtb /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/boot +��dra7-evm-infoadas.dtb�� -> ��/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/boot/dra7-evm-infoadas.dtb�� +make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/linux-kernel-addon/memcache/build TARGET=install INSTALL_MOD_PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs +make[2]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/linux-kernel-addon/memcache/build' +# memcache: Building module +make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap M=`pwd` ARCH=arm CROSS_COMPILE=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- modules +make[3]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' + Building modules, stage 2. + MODPOST 1 modules +make[3]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' +make[2]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/linux-kernel-addon/memcache/build' +make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api DESTDIR=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs install +make[2]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' +make[3]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' +test -z "/usr/lib" || mkdir -p -- "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib" + /bin/bash ../../../libtool --mode=install /usr/bin/install -c 'libticmem.la' '/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.la' +/usr/bin/install -c .libs/libticmem.so.1.0.0 /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.so.1.0.0 +(cd /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib && { ln -s -f libticmem.so.1.0.0 libticmem.so.1 || { rm -f libticmem.so.1 && ln -s libticmem.so.1.0.0 libticmem.so.1; }; }) +(cd /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib && { ln -s -f libticmem.so.1.0.0 libticmem.so || { rm -f libticmem.so && ln -s libticmem.so.1.0.0 libticmem.so; }; }) +/usr/bin/install -c .libs/libticmem.lai /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.la +/usr/bin/install -c .libs/libticmem.a /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.a +chmod 644 /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.a +arm-linux-gnueabihf-ranlib /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/lib/libticmem.a +libtool: install: warning: remember to run `libtool --finish /usr/lib' +test -z "/usr/include/ti" || mkdir -p -- "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/ti" + /usr/bin/install -c -m 644 '../../../include/ti/cmem.h' '/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/ti/cmem.h' +make[3]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' +make[2]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/api' +make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module EXEC_DIR=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk install +make[2]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' +Making module install... +install -d /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk +install: cannot change permissions of ��/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk��: Operation not permitted +make[2]: *** [install] Error 1 +make[2]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' +make[1]: *** [kernel_install] Error 2 +make[1]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' +make: *** [linux_install] Error 2 + +Hi Jena, Above is my make linux_install log , But there is still no file generate in directory PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot. Is there anything wrong with my environment? Regards, Xie Baojian + +Hi Xie Baojian, From attached logs, I can see when you run "make linux_install" it ends up with error because of some permission issues EXEC_DIR=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk install make[2]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' Making module install... install -d /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk install: cannot change permissions of ¡®/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk¡¯: Operation not permitted make[2]: *** [install] Error 1 make[2]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/cmem/ludev/src/cmem/module' make[1]: *** [kernel_install] Error 2 make[1]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' make: *** [linux_install] Error 2 Could you confirm you run the command chmod 777 on targetfs folder to change its permission or not ? Regards Surya + +Hi Surya, I have done below: cd /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs chmod 777 ../targetfs But when i run "make linux_install" it still report this error. Under the directory ls -al ： drwxrwxrwx 22 nobody hancan 4096 5月 30 14:39 . drwxrwxrwx 8 hancan hancan 4096 4月 16 14:19 .. drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 bin drwxrwxrwx 2 nobody hancan 4096 6月 5 16:12 boot drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 dev drwxrwxrwx 47 nobody hancan 4096 8月 31 2017 etc drwxrwxrwx 3 nobody hancan 4096 5月 24 21:23 home drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 include drwxrwxrwx 9 nobody hancan 4096 8月 31 2017 lib drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 media drwxrwxrwx 3 nobody hancan 4096 8月 31 2017 mnt drwxrwxr-x 4 hancan hancan 4096 6月 8 2017 opencl_fs_patches drwxrwxrwx 6 nobody hancan 4096 5月 24 20:27 opt drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 proc drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 run drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 sbin drwxrwxrwx 3 nobody hancan 4096 8月 31 2017 srv drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 sys drwxrwxrwx 2 nobody hancan 4096 8月 31 2017 tmp drwxrwxrwx 11 nobody hancan 4096 8月 31 2017 usr drwxrwxrwx 8 nobody hancan 4096 8月 31 2017 var drwxrwxrwx 3 nobody hancan 4096 8月 31 2017 www it seems the permissions are the largest. Where am I wrong? Thanks&Regards, Xie Baojian + +Hi Surya, Is it necessary to use the root user when I run the "make linux_install" command? Now I am using "hancan" user to run "make linux_install". Regards, Xie Baojian + +Hi Xie Baojian, No need to run "make linux_install" with root permission As per Linux userguide Section 2.4.2.1.4 Download and untar file system, NOTE: Only targetfs folder needs to have full permission not the files within And can you let us know the permissions for vision_sdk folder Regards Surya + +Hi Surya, I have Download and untar file system refer to Linux userguide Section 2.4.2.1.4. and my "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/opt/vision_sdk " permissions is "drwxrwxrwx " . and i have run "chmod -R 777 /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00 " to make sure all files are the most privileged. But it still report cannot change permissions of ‘/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk’: Operation not permitted. I have no way about this problem. Regards, Xie Baojian + +Hi Surya， I have solved this problem, Because the "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/opt/vision_sdk " directory already exists. and so "install -d" will report this error. Thanks, Xie Baojian + diff --git a/data2/text/range/25001-30000/713491.txt b/data2/text/range/25001-30000/713491.txt new file mode 100644 index 0000000000000000000000000000000000000000..e1fac9574b3e90954c50c419cbbd4623813511ff --- /dev/null +++ b/data2/text/range/25001-30000/713491.txt @@ -0,0 +1,378 @@ +Ticket Name: Compiler/TDA2PXEVM: Unable to build PC side network tools + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler Hi, I'm trying to build the PC side network tools of the Vision SDK, following the steps in the network tools user guide. However, I get a missing file compilation error on conio.h, which does seem to be missing. Does this file need to be generated beforehand? I am building from a cygwin terminal, and I have tried both version 3.03 and 3.04 of the Vision SDK. Attached is the gmake output from cygwin: network build log.txt rlee@port-0618-01 /cygdrive/c/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/tools/network_tools/build +$gmake -s +common: Making Directories, if not already created +common: Building dependancies +tfdtp_api.c:87:10: fatal error: conio.h: No such file or directory + #include + ^~~~~~~~~ +compilation terminated. +gmake[3]: *** [depend] Error 1 +gmake[2]: *** [libs] Error 2 +gmake[1]: *** [depend] Error 2 +gmake: *** [exe] Error 2 + Thanks, Richard + +Responses: +Hello Richard, The networks tools were not tested on cygwin. We had always used Dos, git bash and Ubuntu terminal. Just to confirm if any issue, I built the tools on cygwin and i was able to build it. I only changed NSP_INCLUDE_PATH to set it to my NSP patch (d:/ti/nsp_gmacsw_4_15_00_00/packages). Below is configuration BUILD_OS=Windows_NT which gmake /cygdrive/d/ti/xdctools_3_25_02_70/gmake =========================== Which gmake are you using? Can you run "which gmake"? Are you changing BUILD_OS to Linux? For cygwin it should be Windows. Regards, Prasad + +Hello Richard, I think the issue you are facing is due to dependency list creation where compiler flags are not involved. I assume you are changing BUILD_OS to Linux. With that make below change in apps\tools\network_tools\build\COMMON_FOOTER.MK depend: $(CC) $(DEFINE) $(INCLUDE) $(FILES) -M > MAKEFILE.DEPEND depend: $(CC) $(CC_OPTS) $(DEFINE) $(INCLUDE) $(FILES) -M > MAKEFILE.DEPEND + +Hi Prasad, My NSP patch path is: C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages The user guide doesn't seem to have instructions on how to install nsp? My BUILD_OS is WINDOWS_NT. "which gmake" returns /cygdrive/c/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/gmake. However, in my RULES.MK file, I have set MAKE to C:/ti/xdctools_3_50_7_20_core/gmake. Thanks, Richard + +Hello Richard, You don't need to install NSP. It is part of VSDK release. Please try below 1. Change BUILD_OS to Windows 2. Change NSP_INCLUDE_PATH to C:/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages 3. Change apps\tools\network_tools\build\COMMON_FOOTER.MK depend: $(CC) $(DEFINE) $(INCLUDE) $(FILES) -M > MAKEFILE.DEPEND depend: $(CC) $(CC_OPTS) $(DEFINE) $(INCLUDE) $(FILES) -M > MAKEFILE.DEPEND If this doesn't work, try changing OS to Linux. If that too doesn't work please share fail logs of both options. + +Hi Prasad, Unfortunately that didn't work. Here are the Windows and Linux fail logs, as well as the RULES and COMMON_FOOTER makefiles: 3173.Windows Build Log.txt C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\tools\network_tools\build>gm +ake +gmake depend +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/build' +gmake libs TARGET=depend +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/ +network_tools/build/../common/src MODULE=common depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/common/src' +common: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../lib// +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../lib/obj/common/ +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../bin/ +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +common: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sd +k/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCE +SSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packa +ges -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/bu +ild/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/t +i_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c o +sa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +gmake[3]: *** [depend] Error 1 +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/common/src' +gmake[2]: *** [libs] Error 2 +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/build' +gmake[1]: *** [depend] Error 2 +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/build' +gmake: *** [exe] Error 2 1881.Linux Build Log.txt C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\tools\network_tools\build>gm +ake +gmake depend +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/build' +gmake libs TARGET=depend +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/ +network_tools/build/../common/src MODULE=common depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/app +s/tools/network_tools/common/src' +common: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../lib// +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../lib/obj/common/ +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools +/build/../bin/ +The syntax of the command is incorrect. +gmake[3]: [depend] Error 1 (ignored) +common: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sd +k/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCE +SSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packa +ges -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/bu +ild/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/t +i_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c o +sa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +C:/cygwin64/lib/gcc/x86_64-pc-cygwin/7.3.0/cc1.exe: error while loading shared l +ibraries: ?: cannot open shared object file: No such file or directory +gmake[3]: *** [depend] Error 1 +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/common/src' +gmake[2]: *** [libs] Error 2 +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/build' +gmake[1]: *** [depend] Error 2 +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps +/tools/network_tools/build' +gmake: *** [exe] Error 2 8688.RULES.MK.txt BASE_DIR = $(abspath .) +CONFIG= +BUILD_OS=Linux + +ifeq ($(BUILD_OS),Windows_NT) + MAKE = gmake + CGTOOLS_PATH=C:/cygwin64/ + NSP_INCLUDE_PATH=C:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages +endif + + + +ifeq ($(BUILD_OS),Linux) + MAKE = gmake + CGTOOLS_PATH=C:/cygwin64/ + NSP_INCLUDE_PATH=C:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages +endif + +export CONFIG +export BASE_DIR +export MAKE +export CGTOOLS_PATH +export NSP_INCLUDE_PATH +export BUILD_OS + COMMON_FOOTER.MK.txt # (c) Texas Instruments + +ifndef $(COMMON_FOOTER_MK) +COMMON_FOOTER_MK = 1 + +OBJS=$(subst .c,.o, $(FILES) ) + +OBJ_DIR=$(OBJ_BASE_DIR)/$(MODULE)/$(CONFIG) + +vpath %.o $(OBJ_DIR) + +LIB = $(MODULE).a + +ifeq ($(BUILD_OS),Linux) +EXE_EXT = out +else +EXE_EXT = exe +endif + +EXE = $(EXE_BASE_DIR)/$(CONFIG)/$(MODULE).$(EXE_EXT) + +.c.o: + @echo $(MODULE): Compiling $< + $(CC) $(CC_OPTS) $(OPTI_OPTS) $(DEFINE) $(INCLUDE) -o$(OBJ_DIR)/$@ $< + + +lib : $(LIB_DIR)/$(LIB) + +$(LIB_DIR)/$(LIB) : $(OBJS) + @echo $(MODULE): Creating archive $(LIB) + $(AR) $(AR_OPTS) $(LIB_DIR)/$(LIB) $(OBJ_DIR)/*.o + +obj: $(OBJS) + +clean: + @echo $(MODULE): Deleting temporary files + -rm -f $(LIB_DIR)/$(LIB) + -rm -f $(OBJ_DIR)/*.* + +depend: + @echo $(MODULE): Making Directories, if not already created + -mkdir -p $(LIB_DIR) + -mkdir -p $(OBJ_DIR) + -mkdir -p $(EXE_BASE_DIR) + @echo $(MODULE): Building dependancies + $(CC) $(CC_OPTS) $(DEFINE) $(INCLUDE) $(FILES) -M > MAKEFILE.DEPEND + +exe: + @echo $(MODULE): Linking + $(LD) -o$(EXE) $(LIBS) $(LD_OPTS) + @echo Final executable $(EXE) !!! + +install: + + +-include MAKEFILE.DEPEND + +endif # ifndef $(COMMON_FOOTER_MK) + + Thanks, Richard + +Hi Prasad, I accidentally built from CMD instead of Cygwin, sorry about that. Here are the build logs from Cygwin: 2476.Windows Build Log.txt $ gmake +gmake depend +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake libs TARGET=depend +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +common: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +common: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c osa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND +tfdtp_api.c:87:10: fatal error: conio.h: No such file or directory + #include + ^~~~~~~~~ +compilation terminated. +gmake[3]: *** [depend] Error 1 +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake[2]: *** [libs] Error 2 +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake[1]: *** [depend] Error 2 +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake: *** [exe] Error 2 + 5556.Linux Build Log.txt $ gmake +gmake depend +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake libs TARGET=depend +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +common: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +common: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -Dlinux -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c osa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_ctrl/src MODULE=network_ctrl depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_ctrl/src' +network_ctrl: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_ctrl/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +network_ctrl: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -Dlinux -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_ctrl_handle_echo.c network_ctrl_handle_iss_raw_save.c network_ctrl_handle_mem_rd.c network_ctrl_handle_mem_save.c network_ctrl_handle_mmc_wr.c network_ctrl_handle_object_detect_set_dynamic_params.c network_ctrl_handle_qspi_wr.c network_ctrl_handle_stereo_calib_image_save.c network_ctrl_handle_stereo_set_dynamic_params.c network_ctrl_handle_stereo_set_params.c network_ctrl_handle_sys_reset.c network_ctrl_main.c -M > MAKEFILE.DEPEND +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_ctrl/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_tx/src MODULE=network_tx depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_tx/src' +network_tx: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_tx/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +network_tx: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -Dlinux -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_tx_main.c -M > MAKEFILE.DEPEND +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_tx/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_rx/src MODULE=network_rx depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_rx/src' +network_rx: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_rx/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +network_rx: Building dependancies +C:/cygwin64//bin/gcc -c -Wall -Dlinux -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_rx_main.c -M > MAKEFILE.DEPEND +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_rx/src' +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake libs +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake[2]: *** No rule to make target `/usr/include/stdlib.h', needed by `network_api.o'. Stop. +gmake[1]: *** [libs] Error 2 +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake: *** [exe] Error 2 + Thanks, Richard + +Hello Richard, You should be able to build from Windows command prompt by setting BUILD_OS to Windows. Not sure why it fails for you. You should not see error "tfdtp_api.c:87:10: fatal error: conio.h: No such file or directory" on windows. Also, I assume you are taking a change in depend rule I suggested in earlier post. When trying with Windows, are you using codeblocks tools? can you please try that? Please make sure you do clean before starting build. I see you using command "gmake", have you tried "gmake all"? + +Hi Prasad, I have made the change in the depend rule. I tried using the codeblocks compiler and I did "gmake clean" and "gmake all" from cygwin, but I get a syntax error: Codeblocks Build Log.txt $ gmake all +gmake clean +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_ctrl/src/MAKEFILE.DEPEND +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_rx/src/MAKEFILE.DEPEND +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_tx/src/MAKEFILE.DEPEND +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_cons/src/MAKEFILE.DEPEND +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src/MAKEFILE.DEPEND +gmake libs TARGET=clean +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common clean +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +common: Deleting temporary files +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib///common.a +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common//*.* +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_ctrl/src MODULE=network_ctrl clean +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_ctrl/src' +network_ctrl: Deleting temporary files +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib///network_ctrl.a +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_ctrl//*.* +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_ctrl/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_tx/src MODULE=network_tx clean +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_tx/src' +network_tx: Deleting temporary files +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib///network_tx.a +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_tx//*.* +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_tx/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_rx/src MODULE=network_rx clean +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_rx/src' +network_rx: Deleting temporary files +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib///network_rx.a +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_rx//*.* +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_rx/src' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../network_cons/src MODULE=network_cons clean +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_cons/src' +network_cons: Deleting temporary files +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib///network_cons.a +rm -f C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_cons//*.* +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/network_cons/src' +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake exe +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake depend +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake libs TARGET=depend +gmake[3]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake -fMAKEFILE.MK -CC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common depend +gmake[4]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +common: Making Directories, if not already created +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib// +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common/ +mkdir -p C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ +common: Building dependancies +C:/Program Files (x86)/CodeBlocks/MinGW/bin/gcc -c -Wall -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c osa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND +C:/cygwin64/tmp/make141756-1.sh: line 1: syntax error near unexpected token `(' +C:/cygwin64/tmp/make141756-1.sh: line 1: `C:/Program Files (x86)/CodeBlocks/MinGW/bin/gcc -c -Wall -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -IC:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages network_api.c osa.c osa_file.c tfdtp_api.c -M > MAKEFILE.DEPEND' +gmake[4]: *** [depend] Error 2 +gmake[4]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/common/src' +gmake[3]: *** [libs] Error 2 +gmake[3]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake[2]: *** [depend] Error 2 +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake[1]: *** [exe] Error 2 +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/tools/network_tools/build' +gmake: *** [all] Error 2 + Thanks, Richard + +What is codeblocks version? Can you please try 16.2 or previous? I remember one user facing issues with 17.12. + +Hi Prasad, I tried version 16.1 instead of 17.12, but I got the same error. To take a step back, is there some other way to transmit sensor data from the TDA2 system to the host computer in real time? Such as through the USB, JTAG, etc. Thanks, Richard + +Hello Richard, You can write through PCIE to external hard disc but that support is limited in VSDK BIOS. File writes is other option but is limited by write speed and amount of data. Networking seems more suitable for large data. If you are OK you can zip your network tools folder to me and I can build for you. If not fine on putting on public e2e please mail me zip. Also if needed we can have WebEx session for building issue. + +Hi Prasad, Attached is my network tools folder: network_tools.zip Thanks, Richard + +Hello Richard, Please find attached binaries generated. I was able to build your repo with codeblocks-17.12mingw-nosetup (sourceforge.net/.../download). I made only below change (note quotes were missing in your case) CGTOOLS_PATH="c:/Program Files (x86)/codeblocks-17.12mingw-nosetup/MinGW" My path - PATH=C:\Program Files (x86)\codeblocks-17.12mingw-nosetup\MinGW\bin;d:\ti\ccsv6\utils\bin;D:\ti\ccsv6\utils\cygwin Not sure why it doesnt build on your set up. Please try downloading codeblocks mingw version /cfs-file/__key/communityserver-discussions-components-files/791/2671.bin.zip + +Also in cygwin case, you dont need to given windows patch. Something like below is needed. You had changed it to d:\cygwin64 CGTOOLS_PATH=/usr/ NSP_INCLUDE_PATH=/cygdrive/c/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages + +Hi Prasad, Unfortunately, I was still unable to build the binaries. However, I will continue development with the binaries that you have kindly built. Thanks, Richard + +Richard, Dont know why. Maybe some issue with your PATH. Anyway when I compared your network tools with VSDK default I didnt see any changes, just wondering why you couldnt use TI provided binaries. + +Hi Richard, I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out) + diff --git a/data2/text/range/25001-30000/714066.txt b/data2/text/range/25001-30000/714066.txt new file mode 100644 index 0000000000000000000000000000000000000000..beade944fa4f95ed2251822369babb3f9acc6a00 --- /dev/null +++ b/data2/text/range/25001-30000/714066.txt @@ -0,0 +1,38 @@ +Ticket Name: Linux/TDA2: Tda2x VisionSDK + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PMP, DRA752 Tool/software: Linux Dear Officer, I am trying to build PROCESSOR_SDK_VISION_03_04_00_00 in Linux Host machine following VisionSDK_Linux_UserGuide.pdf, and finally I got the my sd card content: Partition 1. boot/ MLO 'System Volume Information' u-boot.img uenv.txt Partition 2. rootfs/ bin etc lib mnt opt sbin usr boot home lost+found opencl_fs_patches proc sys var dev include media opencl_fs_patches.tar.gz run tmp But when I plug into tda2x board and error pop up during booting: " Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! =>" Can you advise any things I am missing? (Basically I am following the instruction from the user guild and all the steps successfully) Thanks and best regards He Wei + +Responses: +Hi Wei, Please make sure your SYSBOOT (SW3, SW4) and USERCONFIG (SW6) settings is as below: SYSBOOT [0-15]: 00001100 10000001 USERCONFIG [ 0:10] : 0010100000 This will ensure that the media being used for boot is the SD card and not the EMMC. Regards Shravan + +Dear Shravan, 1. I did and confirm the SYSBOOT (SW2+SW3) and USERCONFIG (SW6) as you suggest above ( I am using TDA2x board), but still got error, and the entire booting log as below: U-Boot SPL 2016.05-00010-g9551b3d23ef3 (Jul 30 2018 - 17:41:08) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... spl: falcon_args_file not set in environment, falling back to default reading single-stage-boot.dtb spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d23ef3 (Jul 30 2018 - 17:41:08 -0700) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV H.0 DRAM: 4 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 2 ms (80.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** File not found /boot/zImage ** ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => Can you advise? 2. In addition, If i change the build config as: MAKECONFIG=tda2xx_evm_linux_opencx The build is also failed: "/home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found Makefile:5: recipe for target 'copy.dsp_h' failed " And opinion? Thanks and best regads He Wei + +Hi Wei, Can you halt in u-boot and run the below command? => env default -fa => saveenv Reboot the board after running the below command. This should load the Linux kernel. Regards Shravan + +Dear Shravan, I tried but still failed and log as below: " => env default -fa env default -fa ## Resetting to default environment => saveenv saveenv Saving Environment to MMC... Writing to MMC(1)... done " After reboot: " Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! " Thanks and best regards He Wei + +In addition, I am using: Ubuntu 18.04 LTS + +Hi Wei, Please ensure that the contents of your uenv.txt is as below: fdtfile=dra7-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" If it still doesn't work, please post the contents of the below command in u-boot => env print Regards Shravan + +Dear Shravan, The uenv.txt is same as yours and log for "env print" is: " => env print env print arch=arm args_fit=setenv bootargs console=${console} args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" baudrate=115200 board=dra7xx board_name=dra7xx board_rev=H.0 boot_fdt=try boot_fit=0 boot_os=0 boot_part=9 bootargs=androidboot.serialno=0d00a0062fee0122 bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; bootdelay=2 bootdir=/boot bootenvfile=uEnv.txt bootfile=zImage bootm_size=0x10000000 bootpart=0:2 bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} console=ttyO0,115200n8 cpu=armv7 devtype=mmc dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 dfu_bufsiz=0x10000 dofastboot=0 emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; ethaddr=a0:f6:fd:a4:14:e2 eval_bootargs=setenv bootargs androidboot.serialno=${serial#} fastboot.board_rev=H.0 fastboot.cpu=DRA752 fastboot.secure=GP fastboot.userdata_size=unknown fdt_addr_r=0x88000000 fdt_part=3 fdtaddr=0x88000000 fdtcontroladdr=fdf0b438 fdtfile=dra7-evm-infoadas.dtb fileaddr=82000000 filesize=a5 findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; finduuid=part uuid mmc ${bootpart} uuid fit_bootfile=fitImage.itb fit_loadaddr=0x88000000 importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} kernel_addr_r=0x82000000 loadaddr=0x82000000 loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} machid=fe6 mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; mmcdev=1 mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; mmcrootfstype=ext4 rootwait netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} netloadfdt=tftp ${fdtaddr} ${fdtfile} netloadimage=tftp ${loadaddr} ${bootfile} nfsopts=nolock partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} pxefile_addr_r=0x80100000 ramdisk_addr_r=0x88080000 rdaddr=0x88080000 reboot_image=boot rootpath=/export/rootfs scriptaddr=0x80000000 scsidevs=0 serial#=0d00a0062fee0122 soc=omap5 static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off stderr=serial@4806a000 stdin=serial@4806a000 stdout=serial@4806a000 update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} usbtty=cdc_acm vendor=ti ver=U-Boot 2016.05-00010-g9551b3d23ef3 (Jul 30 2018 - 17:41:08 -0700) vram=16M Environment size: 7642/131067 bytes " and my /boot content is: hewei@ubuntu:~$ ls /media/hewei/boot/ MLO 'System Volume Information' u-boot.img uenv.txt Do I miss zImage? Thanks and best regards He Wei + +I got zImage: rootfs/boot/zImage + +Hi Wei, Your environment variables seem different from the default environment. Do you have changes in u-boot? Please replace the MLO and u-boot.img file in the boot-partition with that attached (rename the files by removing the .txt suffix). For first boot, halt at u-boot and run: => env default -fa => saveenv. You can rebuild the MLO and U-boot.img yourself bu running the below command in u-boot make clean make dra7xx_evm_vision_config make Regards Shravan 2018.u-boot.img.txt 2046.MLO.txt + +Dear Shravan, 1. I got same error when using the files attached. Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => 2. Where to run "make dra7xx_evm_vision_config"? under my build path: "/home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build", this build option is not supported: make: *** No rule to make target 'dra7xx_evm_vision_config'. Stop. Thanks and best regards He Wei + +Hi Wei, Can you print the env print output with the u-boot.img and MLO I had provided. Regards Shravan + +Dear Shravan, The output is: " => env print env print arch=arm args_fit=setenv bootargs console=${console} args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" baudrate=115200 board=dra7xx board_name=dra7xx board_rev=H.0 boot_fdt=try boot_fit=0 boot_os=0 boot_part=9 bootargs=androidboot.serialno=0d00a0062fee0122 bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; bootdelay=2 bootdir=/boot bootenvfile=uEnv.txt bootfile=zImage bootm_size=0x10000000 bootpart=0:2 bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} console=ttyO0,115200n8 cpu=armv7 devtype=mmc dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 dfu_bufsiz=0x10000 dofastboot=0 emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; ethaddr=a0:f6:fd:a4:14:e2 eval_bootargs=setenv bootargs androidboot.serialno=${serial#} fastboot.board_rev=H.0 fastboot.cpu=DRA752 fastboot.secure=GP fastboot.userdata_size=unknown fdt_addr_r=0x88000000 fdt_part=3 fdtaddr=0x88000000 fdtcontroladdr=fdf0a598 fdtfile=dra7-evm-infoadas.dtb fileaddr=82000000 filesize=a5 findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; finduuid=part uuid mmc ${bootpart} uuid fit_bootfile=fitImage.itb fit_loadaddr=0x88000000 importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} kernel_addr_r=0x82000000 loadaddr=0x82000000 loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} machid=fe6 mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; mmcdev=1 mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; mmcrootfstype=ext4 rootwait netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} netloadfdt=tftp ${fdtaddr} ${fdtfile} netloadimage=tftp ${loadaddr} ${bootfile} nfsopts=nolock partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} pxefile_addr_r=0x80100000 ramdisk_addr_r=0x88080000 rdaddr=0x88080000 reboot_image=boot rootpath=/export/rootfs scriptaddr=0x80000000 scsidevs=0 serial#=0d00a0062fee0122 soc=omap5 static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off stderr=serial@4806a000 stdin=serial@4806a000 stdout=serial@4806a000 update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} usbtty=cdc_acm vendor=ti ver=U-Boot 2016.05-00010-g9551b3d (Jul 30 2018 - 11:17:41 +0530) vram=16M Environment size: 7637/131067 bytes => " Thanks and best regards He Wei + +Hi Wei, I see your u-boot environment is the same. Did you run env default -fa and saveenv ? Also can you remove the SD card and see if the board boots and jumps to u-boot? If the board boots without the SD-card to u-boot, your switch-settings are wrong, and please refer to earlier posts on switch settings needed. Regards Shravan + +Dear Shravan, I did the below: "=> env default -fa env default -fa ## Resetting to default environment => saveenv saveenv Saving Environment to MMC... Writing to MMC(1)... done => " then reboot, got same error. Thanks and best regards He Wei + +Hi Wei, Are you able to boot the board by removing the SD card? Regards Shravan + +Dear Shravan, I can't boot but my colleague is able to boot up using my board with the SD built and generated by him. Let me check on his configuration . and thanks a lot for fast support. Best regards He Wei + diff --git a/data2/text/range/25001-30000/717782.txt b/data2/text/range/25001-30000/717782.txt new file mode 100644 index 0000000000000000000000000000000000000000..802918ceddcbdec79a4f63189fe62b44435b2ba2 --- /dev/null +++ b/data2/text/range/25001-30000/717782.txt @@ -0,0 +1,53 @@ +Ticket Name: Linux/TDA2PXEVM: NVMe PCIe SSD - TDA2PX writing issues. (Unable to handle kernel paging request at virtual address / Fixing recursive fault but reboot is needed!) + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Dear TI, we are trying to write to NVMe PCIe SSD from our custom TDA2PX board. For writing, we are using a simple app that preallocates the file (fallocate) on the SSD and then just writes (write system function) to it. Most commonly the error occurs when we are trying to write larger files(example - 80GB). The error log is posted below. After this error, the linux stops and reboot is needed. Do you have any solution for this issue? Regards, Stefan. root@dra7xx-evm:~# time ./a.out [ 863.725593] ------------[ cut here ]------------ [ 863.730244] WARNING: CPU: 1 PID: 6 at block/blk-merge.c:485 blk_rq_map_sg+0x510/0x584() [ 863.738307] Modules linked in: [ 863.741433] CPU: 1 PID: 6 Comm: kworker/u4:0 Tainted: G W O 4.4.84 #47 [ 863.748943] Hardware name: Generic DRA74X (Flattened Device Tree) [ 863.755062] Workqueue: writeback wb_workfn (flush-259:0) [ 863.760403] Backtrace: [ 863.762867] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 863.770462] r7:c0301200 r6:20080113 r5:00000000 r4:c09c9dd0 [ 863.776196] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 863.783450] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 863.791569] r7:c0301200 r6:000001e5 r5:00000009 r4:00000000 [ 863.797274] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x24/0x2c) [ 863.806092] r8:ffffffff r7:00001000 r6:e4444800 r5:00000000 r4:00000000 [ 863.812849] [] (warn_slowpath_null) from [] (blk_rq_map_sg+0x510/0x584) [ 863.821236] [] (blk_rq_map_sg) from [] (nvme_queue_rq+0x300/0x8d0) [ 863.829186] r10:ee76f180 r9:ee272100 r8:ee678f00 r7:ee67ad00 r6:00020000 r5:ee272128 [ 863.837083] r4:ee76f180 [ 863.839631] [] (nvme_queue_rq) from [] (__blk_mq_run_hw_queue+0x260/0x380) [ 863.848273] r10:ee76f180 r9:fffffffb r8:00000009 r7:ee602d00 r6:eecad92c r5:eecad924 [ 863.856160] r4:ee718800 [ 863.858706] [] (__blk_mq_run_hw_queue) from [] (blk_mq_run_hw_queue+0xe4/0x11c) [ 863.867785] r10:eecad9e0 r9:eecade28 r8:eecade18 r7:eecad9b8 r6:00000000 r5:ffffe000 [ 863.875670] r4:ee718800 [ 863.878215] [] (blk_mq_run_hw_queue) from [] (blk_mq_insert_requests+0x100/0x138) [ 863.887468] r5:ee718800 r4:ff7f6140 [ 863.891066] [] (blk_mq_insert_requests) from [] (blk_mq_flush_plug_list+0x134/0x13c) [ 863.900581] r7:00000000 r6:eecad9b0 r5:eecad9b8 r4:eecad9b0 [ 863.906285] [] (blk_mq_flush_plug_list) from [] (blk_flush_plug_list+0xd0/0x214) [ 863.915451] r7:00000100 r6:00000000 r5:eecac000 r4:eecad9e8 [ 863.921157] [] (blk_flush_plug_list) from [] (blk_sq_make_request+0x100/0x2c0) [ 863.930147] r10:c0196674 r9:ee718800 r8:00000000 r7:eecade18 r6:00000340 r5:eecac000 [ 863.938040] r4:ee76e400 [ 863.940585] [] (blk_sq_make_request) from [] (generic_make_request+0xe0/0x22c) [ 863.949575] r10:c0196674 r9:00000000 r8:ee3d2c00 r7:ffffffff r6:00000000 r5:eecada68 [ 863.957463] r4:ee602d00 [ 863.960010] [] (generic_make_request) from [] (submit_bio+0x8c/0x178) [ 863.968217] r9:c0a2eebc r8:ee3d2c00 r7:eae6b080 r6:efb06cc4 r5:00000800 r4:ee3d2c00 [ 863.976024] [] (submit_bio) from [] (ext4_io_submit+0x64/0x78) [ 863.983619] r10:c0196674 r9:c0a2eebc r8:ee3d2c00 r7:eae6b080 r6:efb06cc4 r5:eae6b080 [ 863.991508] r4:eecadcb8 [ 863.994057] [] (ext4_io_submit) from [] (ext4_bio_write_page+0x1c8/0x360) [ 864.002611] r5:eae6b080 r4:eecadcb8 [ 864.006208] [] (ext4_bio_write_page) from [] (mpage_submit_page+0x98/0xc8) [ 864.014849] r10:efb06cc4 r9:eae6b080 r8:efb06cc4 r7:00000000 r6:000bf500 r5:00001000 [ 864.022735] r4:eecadc88 [ 864.025281] [] (mpage_submit_page) from [] (mpage_map_and_submit_extent+0x260/0x778) [ 864.034796] r8:000bf501 r7:00000000 r6:01377400 r5:eae6b080 r4:eecadc88 [ 864.041551] [] (mpage_map_and_submit_extent) from [] (ext4_writepages+0x3fc/0x574) [ 864.050890] r10:ead80d20 r9:024000c0 r8:eecadd60 r7:000007ff r6:00000000 r5:00000000 [ 864.058780] r4:eacfa890 [ 864.061328] [] (ext4_writepages) from [] (do_writepages+0x2c/0x40) [ 864.069271] r10:fffffc00 r9:ee602e14 r8:eecade8c r7:eacfa974 r6:eecadd60 r5:eacfa928 [ 864.077156] r4:eacfa890 [ 864.079702] [] (do_writepages) from [] (__writeback_single_inode+0x30/0x184) [ 864.088522] [] (__writeback_single_inode) from [] (writeback_sb_inodes+0x218/0x40c) [ 864.097948] r9:ee602e14 r8:eecade8c r7:ee324800 r6:eacfa890 r5:eacfa928 r4:ee602e00 [ 864.105753] [] (writeback_sb_inodes) from [] (__writeback_inodes_wb+0x88/0xc8) [ 864.114743] r10:eacfa928 r9:c09ac100 r8:ee602e14 r7:eecade8c r6:00000000 r5:ee324800 [ 864.122632] r4:ee602e00 [ 864.125180] [] (__writeback_inodes_wb) from [] (wb_writeback+0x1a8/0x1c0) [ 864.133733] r10:ee602e00 r9:c09c1e4c r8:ee602e2c r7:c09ac100 r6:0000dc17 r5:ee602efc [ 864.141620] r4:eecade8c [ 864.144167] [] (wb_writeback) from [] (wb_workfn+0x200/0x31c) [ 864.151675] r10:ee602ee8 r9:00000000 r8:ee602f00 r7:ee602e00 r6:ee602f08 r5:ee602efc [ 864.159562] r4:0000da87 [ 864.162112] [] (wb_workfn) from [] (process_one_work+0x124/0x3f4) [ 864.169968] r10:eeca8000 r9:00000000 r8:eee5ae00 r7:00000000 r6:eeca8000 r5:eec5f100 [ 864.177854] r4:ee602f08 [ 864.180400] [] (process_one_work) from [] (worker_thread+0x4c/0x524) [ 864.188519] r10:eeca8000 r9:eec5f100 r8:00000088 r7:eecac000 r6:eeca8014 r5:eec5f118 [ 864.196408] r4:eeca8000 [ 864.198956] [] (worker_thread) from [] (kthread+0x100/0x118) [ 864.206381] r10:00000000 r9:00000000 r8:c004a6ac r7:eec5f100 r6:eecac000 r5:eec5e2c0 [ 864.214268] r4:00000000 [ 864.216816] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 864.224062] r8:00000000 r7:00000000 r6:00000000 r5:c0050130 r4:eec5e2c0 [ 864.230855] ---[ end trace fa1b028c47316aba ]--- [ 865.215926] Unable to handle kernel paging request at virtual address 00001000 [ 865.223200] pgd = c0003000 [ 865.225923] [00001000] pgd=80000080004003, pmd=00000000 [ 865.231356] Internal error: Oops: 207 [#1] PREEMPT SMP ARM [ 865.236860] Modules linked in: [ 865.239933] CPU: 1 PID: 6 Comm: kworker/u4:0 Tainted: G W O 4.4.84 #47 [ 865.247443] Hardware name: Generic DRA74X (Flattened Device Tree) [ 865.253566] Workqueue: writeback wb_workfn (flush-259:0) [ 865.258909] task: eec91e00 ti: eecac000 task.ti: eecac000 [ 865.264331] PC is at __kmalloc+0xa8/0x218 [ 865.268352] LR is at __kmalloc+0x1c/0x218 [ 865.272375] pc : [] lr : [] psr: 20080013 [ 865.272375] sp : eecadbe8 ip : eecadbe8 fp : eecadc0c [ 865.283898] r10: ee722580 r9 : 0000a8f1 r8 : eecadbe8 [ 865.289140] r7 : eecac000 r6 : 02080020 r5 : eec01c00 r4 : 00001000 [ 865.295691] r3 : 00000000 r2 : 2e819000 r1 : 0000a8f1 r0 : eec01c00 [ 865.302244] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [ 865.309578] Control: 30c5387d Table: ad8be2c0 DAC: 55555555 [ 865.315344] Process kworker/u4:0 (pid: 6, stack limit = 0xeecac210) [ 865.321632] Stack: (0xeecadbe8 to 0xeecae000) [ 865.326004] dbe0: ee722580 0000000d 00020000 ee67ad00 ee678f00 fffffffb [ 865.334214] dc00: eecadcdc eecadc10 c047a5d0 c01122c8 00000000 00000000 000007ff ee678f00 [ 865.342420] dc20: ee272ac8 02080020 ee272a00 00020000 00020000 ee67a100 00000ff8 0000001d [ 865.350629] dc40: 00001000 00000000 ee272ab8 00000200 00001000 00000001 eecadc70 ee272a28 [ 865.358837] dc60: 8d4d5000 00000000 ee6a5400 00000000 00180001 00000001 00000000 00000000 [ 865.367046] dc80: 00000000 00000000 89599000 00000000 dbc03900 00000000 09dc7400 00000000 [ 865.375255] dca0: 000000ff 00000000 00000000 00000000 ee721f80 ee718800 eecadcf4 eecadcfc [ 865.383461] dcc0: ee602d00 00000005 fffffffb ee722580 eecadd3c eecadce0 c0305074 c047a4fc [ 865.391670] dce0: 00000064 ee718804 c08b8b00 ee602d00 0006de1c ee720f00 ee721800 eecadcfc [ 865.399878] dd00: eecadcfc ee722580 eecadcfc 00000000 00000000 ee718800 ffffe000 00000000 [ 865.408086] dd20: eecadd88 eecade18 eecade28 eecaddb0 eecadd54 eecadd40 c0304ddc c0304e20 [ 865.416295] dd40: ff7f6140 ee718800 eecadd74 eecadd58 c0306350 c0304d04 eecadd80 eecadd88 [ 865.424502] dd60: eecadd80 00000000 eecaddac eecadd78 c0306f30 c030625c 00000000 00000012 [ 865.432711] dd80: eecadd80 eecadd80 eecadd88 eecadd88 eecaddb8 00001400 00000000 00000100 [ 865.440918] dda0: eecaddec eecaddb0 c02fc3f8 c0306e08 eecaddb0 eecaddb0 eecaddb8 eecaddb8 [ 865.449125] ddc0: ee602e00 ffffe000 00001400 0000dcaa c09ac100 ee602e2c c09c1e4c ee602e00 [ 865.457333] dde0: eecade04 eecaddf0 c02fc81c c02fc334 eecade8c 00001400 eecade5c eecade08 [ 865.465543] de00: c014970c c02fc7f4 7fffffff ee602f00 00000000 0000dcaa eecade18 eecade18 [ 865.473751] de20: eecade20 eecade20 eecade28 eecade28 00000000 0000dc7b ee602efc ee602f08 [ 865.481960] de40: ee602e00 ee602f00 00000000 ee602ee8 eecadedc eecade60 c0149d04 c01495f0 [ 865.490166] de60: c0054e60 c09ac100 c09c1e50 ee602e04 00000000 00000002 eecadeac 00000000 [ 865.498374] de80: c005116c ef1c0e40 eec91e00 7fffebff 00000000 eecade14 00000000 0000000c [ 865.506582] dea0: 00000000 00000000 00000000 00000000 eecadedc ee602f08 eec5f100 eeca8000 [ 865.514789] dec0: 00000000 eee5ae00 00000000 eeca8000 eecadf1c eecadee0 c004a3dc c0149b10 [ 865.522996] dee0: eeca8000 eeca8014 eecac000 00000088 eec5f100 eeca8000 eec5f118 eeca8014 [ 865.531203] df00: eecac000 00000088 eec5f100 eeca8000 eecadf54 eecadf20 c004a6f8 c004a2c4 [ 865.539411] df20: eeca8164 c09ac100 00000000 00000000 eec5e2c0 eecac000 eec5f100 c004a6ac [ 865.547618] df40: 00000000 00000000 eecadfac eecadf58 c0050230 c004a6b8 698dd1ac 00000000 [ 865.555825] df60: 698dd1ac eec5f100 00000000 00000000 eecadf70 eecadf70 00000000 00000000 [ 865.564033] df80: eecadf80 eecadf80 eecadfac eec5e2c0 c0050130 00000000 00000000 00000000 [ 865.572241] dfa0: 00000000 eecadfb0 c000fb88 c005013c 00000000 00000000 00000000 00000000 [ 865.580448] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 865.588657] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00900000 a15c0040 [ 865.596861] Backtrace: [ 865.599325] [] (__kmalloc) from [] (nvme_queue_rq+0xe0/0x8d0) [ 865.606834] r9:fffffffb r8:ee678f00 r7:ee67ad00 r6:00020000 r5:0000000d r4:ee722580 [ 865.614646] [] (nvme_queue_rq) from [] (__blk_mq_run_hw_queue+0x260/0x380) [ 865.623290] r10:ee722580 r9:fffffffb r8:00000005 r7:ee602d00 r6:eecadcfc r5:eecadcf4 [ 865.631177] r4:ee718800 [ 865.633726] [] (__blk_mq_run_hw_queue) from [] (blk_mq_run_hw_queue+0xe4/0x11c) [ 865.642804] r10:eecaddb0 r9:eecade28 r8:eecade18 r7:eecadd88 r6:00000000 r5:ffffe000 [ 865.650692] r4:ee718800 [ 865.653237] [] (blk_mq_run_hw_queue) from [] (blk_mq_insert_requests+0x100/0x138) [ 865.662489] r5:ee718800 r4:ff7f6140 [ 865.666088] [] (blk_mq_insert_requests) from [] (blk_mq_flush_plug_list+0x134/0x13c) [ 865.675601] r7:00000000 r6:eecadd80 r5:eecadd88 r4:eecadd80 [ 865.681305] [] (blk_mq_flush_plug_list) from [] (blk_flush_plug_list+0xd0/0x214) [ 865.690470] r7:00000100 r6:00000000 r5:00001400 r4:eecaddb8 [ 865.696173] [] (blk_flush_plug_list) from [] (blk_finish_plug+0x34/0x4c) [ 865.704642] r10:ee602e00 r9:c09c1e4c r8:ee602e2c r7:c09ac100 r6:0000dcaa r5:00001400 [ 865.712530] r4:ffffe000 [ 865.715076] [] (blk_finish_plug) from [] (wb_writeback+0x128/0x1c0) [ 865.723107] r5:00001400 r4:eecade8c [ 865.726706] [] (wb_writeback) from [] (wb_workfn+0x200/0x31c) [ 865.734213] r10:ee602ee8 r9:00000000 r8:ee602f00 r7:ee602e00 r6:ee602f08 r5:ee602efc [ 865.742098] r4:0000dc7b [ 865.744647] [] (wb_workfn) from [] (process_one_work+0x124/0x3f4) [ 865.752506] r10:eeca8000 r9:00000000 r8:eee5ae00 r7:00000000 r6:eeca8000 r5:eec5f100 [ 865.760395] r4:ee602f08 [ 865.762943] [] (process_one_work) from [] (worker_thread+0x4c/0x524) [ 865.771060] r10:eeca8000 r9:eec5f100 r8:00000088 r7:eecac000 r6:eeca8014 r5:eec5f118 [ 865.778949] r4:eeca8000 [ 865.781497] [] (worker_thread) from [] (kthread+0x100/0x118) [ 865.788917] r10:00000000 r9:00000000 r8:c004a6ac r7:eec5f100 r6:eecac000 r5:eec5e2c0 [ 865.796807] r4:00000000 [ 865.799358] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 865.806603] r8:00000000 r7:00000000 r6:00000000 r5:c0050130 r4:eec5e2c0 [ 865.813358] Code: e7934002 e3540000 0a000048 e5953014 (e794c003) [ 865.819569] ---[ end trace fa1b028c47316abb ]--- [ 865.824224] note: kworker/u4:0[6] exited with preempt_count 2 [ 865.840307] Unable to handle kernel paging request at virtual address ffffffec [ 865.847563] pgd = c0003000 [ 865.850277] [ffffffec] pgd=80000080007003, pmd=affae003, *pte=00000000 [ 865.857023] Internal error: Oops: 207 [#2] PREEMPT SMP ARM [ 865.862527] Modules linked in: [ 865.865603] CPU: 1 PID: 6 Comm: kworker/u4:0 Tainted: G D W O 4.4.84 #47 [ 865.873113] Hardware name: Generic DRA74X (Flattened Device Tree) [ 865.879235] task: eec91e00 ti: eecac000 task.ti: eecac000 [ 865.884827] PC is at kthread_data+0x10/0x18 [ 865.889024] LR is at wq_worker_sleeping+0x14/0xd8 [ 865.893743] pc : [] lr : [] psr: 20080193 [ 865.893743] sp : eecad938 ip : eecad948 fp : eecad944 [ 865.905266] r10: 00000001 r9 : ef1c0e40 r8 : eec921a8 [ 865.910509] r7 : c09ac6dc r6 : c09a7e40 r5 : eec91e00 r4 : 00000001 [ 865.917060] r3 : 00000000 r2 : 00000000 r1 : 00000001 r0 : eec91e00 [ 865.923612] Flags: nzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user [ 865.930860] Control: 30c5387d Table: adab4d80 DAC: 55555555 [ 865.936625] Process kworker/u4:0 (pid: 6, stack limit = 0xeecac210) [ 865.942913] Stack: (0xeecad938 to 0xeecae000) [ 865.947285] d920: eecad95c eecad948 [ 865.955493] d940: c004b4a8 c005067c ef1c0e40 eec91e00 eecad9b4 eecad960 c06eb418 c004b4a0 [ 865.963700] d960: eecad98c eecad970 c02ff314 c0110878 00000000 ee683600 ee68360c c06eb650 [ 865.971907] d980: 00000000 eecad990 c02ff62c eecac000 eecad69c eec90000 eecad9d8 eec92120 [ 865.980115] d9a0: c0888e40 c0888e48 eecad9cc eecad9b8 c06eb650 c06eaf9c eec91e00 eecad69c [ 865.988323] d9c0: eecad9f4 eecad9d0 c0037dc8 c06eb608 c0112366 00000000 eecad9d8 eecad9d8 [ 865.996531] d9e0: c0035174 00000001 eecada7c eecad9f8 c0013620 c0037794 eecac210 0000000b [ 866.004740] da00: eecada24 00000008 00000000 00000000 c0112368 60080113 65cada44 34333937 [ 866.012949] da20: 20323030 34353365 30303030 30613020 34303030 35652038 30333539 28203431 [ 866.021158] da40: 34393765 33303063 c0002029 60080113 00000002 00001000 eecadb98 00000207 [ 866.029368] da60: 00000000 00001000 0000a8f1 ee722580 eecada94 eecada80 c0021cac c00133e0 [ 866.037575] da80: eecadb98 00000207 eecadae4 eecada98 c001cf8c c0021c4c eecadab4 eecadaa8 [ 866.045783] daa0: c00d2b58 c0110878 eecadacc eecadab8 c00d30bc c00d2b48 00000007 c09b0f1c [ 866.053991] dac0: 00000207 c001cc40 00001000 eecadb98 0000a8f1 ee722580 eecadb94 eecadae8 [ 866.062200] dae0: c0009298 c001cc4c eecadb1c eecadaf8 c0303848 c02fa744 ee720a80 00000000 [ 866.070409] db00: ee3edb40 ee67ad00 00000000 c001c51c eecadb2c eecadb20 c0303884 c03037d8 [ 866.078617] db20: 00002000 0008d4d4 00000000 c09ac480 c09af5d0 c0a29880 eecadb7c eecadb48 [ 866.086826] db40: c001b584 c00f51a0 ee720a80 00000000 eecadb7c ef400dd0 00000001 00000000 [ 866.095034] db60: 00002000 0000000a c09b0dec 00000001 eecadba4 c0112364 20080013 ffffffff [ 866.103241] db80: eecadbcc eecadbe8 eecadc0c eecadb98 c0013e58 c000926c eec01c00 0000a8f1 [ 866.111449] dba0: 2e819000 00000000 00001000 eec01c00 02080020 eecac000 eecadbe8 0000a8f1 [ 866.119656] dbc0: ee722580 eecadc0c eecadbe8 eecadbe8 c01122d8 c0112364 20080013 ffffffff [ 866.127865] dbe0: c01122d8 c00f01fc ee722580 0000000d 00020000 ee67ad00 ee678f00 fffffffb [ 866.136073] dc00: eecadcdc eecadc10 c047a5d0 c01122c8 00000000 00000000 000007ff ee678f00 [ 866.144281] dc20: ee272ac8 02080020 ee272a00 00020000 00020000 ee67a100 00000ff8 0000001d [ 866.152487] dc40: 00001000 00000000 ee272ab8 00000200 00001000 00000001 eecadc70 ee272a28 [ 866.160696] dc60: 8d4d5000 00000000 ee6a5400 00000000 00180001 00000001 00000000 00000000 [ 866.168903] dc80: 00000000 00000000 89599000 00000000 dbc03900 00000000 09dc7400 00000000 [ 866.177112] dca0: 000000ff 00000000 00000000 00000000 ee721f80 ee718800 eecadcf4 eecadcfc [ 866.185318] dcc0: ee602d00 00000005 fffffffb ee722580 eecadd3c eecadce0 c0305074 c047a4fc [ 866.193527] dce0: 00000064 ee718804 c08b8b00 ee602d00 0006de1c ee720f00 ee721800 eecadcfc [ 866.201735] dd00: eecadcfc ee722580 eecadcfc 00000000 00000000 ee718800 ffffe000 00000000 [ 866.209943] dd20: eecadd88 eecade18 eecade28 eecaddb0 eecadd54 eecadd40 c0304ddc c0304e20 [ 866.218152] dd40: ff7f6140 ee718800 eecadd74 eecadd58 c0306350 c0304d04 eecadd80 eecadd88 [ 866.226360] dd60: eecadd80 00000000 eecaddac eecadd78 c0306f30 c030625c 00000000 00000012 [ 866.234567] dd80: eecadd80 eecadd80 eecadd88 eecadd88 eecaddb8 00001400 00000000 00000100 [ 866.242775] dda0: eecaddec eecaddb0 c02fc3f8 c0306e08 eecaddb0 eecaddb0 eecaddb8 eecaddb8 [ 866.250982] ddc0: ee602e00 ffffe000 00001400 0000dcaa c09ac100 ee602e2c c09c1e4c ee602e00 [ 866.259188] dde0: eecade04 eecaddf0 c02fc81c c02fc334 eecade8c 00001400 eecade5c eecade08 [ 866.267398] de00: c014970c c02fc7f4 7fffffff ee602f00 00000000 0000dcaa eecade18 eecade18 [ 866.275604] de20: eecade20 eecade20 eecade28 eecade28 00000000 0000dc7b ee602efc ee602f08 [ 866.283814] de40: ee602e00 ee602f00 00000000 ee602ee8 eecadedc eecade60 c0149d04 c01495f0 [ 866.292023] de60: c0054e60 c09ac100 c09c1e50 ee602e04 00000000 00000002 eecadeac 00000000 [ 866.300230] de80: c005116c ef1c0e40 eec91e00 7fffebff 00000000 eecade14 00000000 0000000c [ 866.308438] dea0: 00000000 00000000 00000000 00000000 eecadedc ee602f08 eec5f100 eeca8000 [ 866.316644] dec0: 00000000 eee5ae00 00000000 eeca8000 eecadf1c eecadee0 c004a3dc c0149b10 [ 866.324852] dee0: eeca8000 eeca8014 eecac000 00000088 eec5f100 eeca8000 eec5f118 eeca8014 [ 866.333060] df00: eecac000 00000088 eec5f100 eeca8000 eecadf54 eecadf20 c004a6f8 c004a2c4 [ 866.341268] df20: eeca8164 c09ac100 00000000 00000000 eec5e2c0 eecac000 eec5f100 c004a6ac [ 866.349477] df40: 00000000 00000000 eecadfac eecadf58 c0050230 c004a6b8 698dd1ac 00000000 [ 866.357684] df60: 698dd1ac eec5f100 00000000 00000000 eecadf70 eecadf70 00000001 00010001 [ 866.365893] df80: eecadf80 eecadf80 eecadfac eec5e2c0 c0050130 00000000 00000000 00000000 [ 866.374100] dfa0: 00000000 eecadfb0 c000fb88 c005013c 00000000 00000000 00000000 00000000 [ 866.382307] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 866.390516] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00900000 a15c0040 [ 866.398720] Backtrace: [ 866.401182] [] (kthread_data) from [] (wq_worker_sleeping+0x14/0xd8) [ 866.409309] [] (wq_worker_sleeping) from [] (__schedule+0x488/0x66c) [ 866.417427] r5:eec91e00 r4:ef1c0e40 [ 866.421025] [] (__schedule) from [] (schedule+0x54/0xc4) [ 866.428097] r10:c0888e48 r9:c0888e40 r8:eec92120 r7:eecad9d8 r6:eec90000 r5:eecad69c [ 866.435983] r4:eecac000 [ 866.438530] [] (schedule) from [] (do_exit+0x640/0x9b8) [ 866.445514] r5:eecad69c r4:eec91e00 [ 866.449116] [] (do_exit) from [] (die+0x24c/0x424) [ 866.455663] r7:00000001 [ 866.458212] [] (die) from [] (__do_kernel_fault.part.0+0x6c/0x1ec) [ 866.466155] r10:ee722580 r9:0000a8f1 r8:00001000 r7:00000000 r6:00000207 r5:eecadb98 [ 866.474044] r4:00001000 [ 866.476591] [] (__do_kernel_fault.part.0) from [] (do_page_fault+0x34c/0x358) [ 866.485496] r7:00000207 r4:eecadb98 [ 866.489094] [] (do_page_fault) from [] (do_DataAbort+0x38/0xb8) [ 866.496776] r10:ee722580 r9:0000a8f1 r8:eecadb98 r7:00001000 r6:c001cc40 r5:00000207 [ 866.504662] r4:c09b0f1c [ 866.507208] [] (do_DataAbort) from [] (__dabt_svc+0x38/0x60) [ 866.514631] Exception stack(0xeecadb98 to 0xeecadbe0) [ 866.519697] db80: eec01c00 0000a8f1 [ 866.527905] dba0: 2e819000 00000000 00001000 eec01c00 02080020 eecac000 eecadbe8 0000a8f1 [ 866.536114] dbc0: ee722580 eecadc0c eecadbe8 eecadbe8 c01122d8 c0112364 20080013 ffffffff [ 866.544319] r8:eecadbe8 r7:eecadbcc r6:ffffffff r5:20080013 r4:c0112364 [ 866.551078] [] (__kmalloc) from [] (nvme_queue_rq+0xe0/0x8d0) [ 866.558586] r9:fffffffb r8:ee678f00 r7:ee67ad00 r6:00020000 r5:0000000d r4:ee722580 [ 866.566392] [] (nvme_queue_rq) from [] (__blk_mq_run_hw_queue+0x260/0x380) [ 866.575034] r10:ee722580 r9:fffffffb r8:00000005 r7:ee602d00 r6:eecadcfc r5:eecadcf4 [ 866.582922] r4:ee718800 [ 866.585467] [] (__blk_mq_run_hw_queue) from [] (blk_mq_run_hw_queue+0xe4/0x11c) [ 866.594544] r10:eecaddb0 r9:eecade28 r8:eecade18 r7:eecadd88 r6:00000000 r5:ffffe000 [ 866.602432] r4:ee718800 [ 866.604979] [] (blk_mq_run_hw_queue) from [] (blk_mq_insert_requests+0x100/0x138) [ 866.614230] r5:ee718800 r4:ff7f6140 [ 866.617830] [] (blk_mq_insert_requests) from [] (blk_mq_flush_plug_list+0x134/0x13c) [ 866.627344] r7:00000000 r6:eecadd80 r5:eecadd88 r4:eecadd80 [ 866.633046] [] (blk_mq_flush_plug_list) from [] (blk_flush_plug_list+0xd0/0x214) [ 866.642212] r7:00000100 r6:00000000 r5:00001400 r4:eecaddb8 [ 866.647916] [] (blk_flush_plug_list) from [] (blk_finish_plug+0x34/0x4c) [ 866.656384] r10:ee602e00 r9:c09c1e4c r8:ee602e2c r7:c09ac100 r6:0000dcaa r5:00001400 [ 866.664268] r4:ffffe000 [ 866.666816] [] (blk_finish_plug) from [] (wb_writeback+0x128/0x1c0) [ 866.674846] r5:00001400 r4:eecade8c [ 866.678445] [] (wb_writeback) from [] (wb_workfn+0x200/0x31c) [ 866.685953] r10:ee602ee8 r9:00000000 r8:ee602f00 r7:ee602e00 r6:ee602f08 r5:ee602efc [ 866.693841] r4:0000dc7b [ 866.696389] [] (wb_workfn) from [] (process_one_work+0x124/0x3f4) [ 866.704246] r10:eeca8000 r9:00000000 r8:eee5ae00 r7:00000000 r6:eeca8000 r5:eec5f100 [ 866.712134] r4:ee602f08 [ 866.714681] [] (process_one_work) from [] (worker_thread+0x4c/0x524) [ 866.722799] r10:eeca8000 r9:eec5f100 r8:00000088 r7:eecac000 r6:eeca8014 r5:eec5f118 [ 866.730684] r4:eeca8000 [ 866.733230] [] (worker_thread) from [] (kthread+0x100/0x118) [ 866.740651] r10:00000000 r9:00000000 r8:c004a6ac r7:eec5f100 r6:eecac000 r5:eec5e2c0 [ 866.748535] r4:00000000 [ 866.751082] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 866.758328] r8:00000000 r7:00000000 r6:00000000 r5:c0050130 r4:eec5e2c0 [ 866.765080] Code: e1a0c00d e92dd800 e24cb004 e5903378 (e5130014) [ 866.771197] ---[ end trace fa1b028c47316abc ]--- [ 866.775829] Fixing recursive fault but reboot is needed! + +Responses: +Hi Stefan, Can you apply the patch attached and check if the issue still persists. Regards Shravan 1616.0001-dra7xx-disable-LPAE.patch.txt From 3b770332248104548fa57456be05efafdc5ebf1b Mon Sep 17 00:00:00 2001 +From: Subhajit Paul +Date: Tue, 22 May 2018 18:14:50 +0530 +Subject: [PATCH] dra7xx: disable LPAE + +Signed-off-by: Subhajit Paul +--- + ti_config_fragments/defconfig_map.txt | 4 ++-- + ti_config_fragments/dra7_only.cfg | 2 -- + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/ti_config_fragments/defconfig_map.txt b/ti_config_fragments/defconfig_map.txt +index e28c904..2718db7 100644 +--- a/ti_config_fragments/defconfig_map.txt ++++ b/ti_config_fragments/defconfig_map.txt +@@ -1,14 +1,14 @@ + # Release Defconfigs + classification: SDK_Release_Defconfigs type: ti_sdk_am3x_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg am33xx_only.cfg systemd.cfg + classification: SDK_Release_Defconfigs type: ti_sdk_am4x_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg am43xx_only.cfg systemd.cfg +-classification: SDK_Release_Defconfigs type: ti_sdk_dra7x_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg lpae.cfg dra7_only.cfg systemd.cfg auto.cfg ++classification: SDK_Release_Defconfigs type: ti_sdk_dra7x_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg dra7_only.cfg systemd.cfg auto.cfg + classification: SDK_Release_Defconfigs type: ti_sdk_omap2_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg systemd.cfg + classification: SDK_Release_Defconfigs type: ti_sdk_k2g_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg keystone.cfg lpae.cfg k2g_only.cfg systemd.cfg + classification: SDK_Release_Defconfigs type: ti_sdk_keystone_release defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg keystone.cfg lpae.cfg systemd.cfg + # Debug Defconfigs + classification: SDK_Debug_Defconfigs type: ti_sdk_am3x_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg am33xx_only.cfg systemd.cfg debug_options.cfg + classification: SDK_Debug_Defconfigs type: ti_sdk_am4x_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg am43xx_only.cfg systemd.cfg debug_options.cfg +-classification: SDK_Debug_Defconfigs type: ti_sdk_dra7x_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg lpae.cfg dra7_only.cfg systemd.cfg debug_options.cfg ++classification: SDK_Debug_Defconfigs type: ti_sdk_dra7x_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg dra7_only.cfg systemd.cfg debug_options.cfg + classification: SDK_Debug_Defconfigs type: ti_sdk_omap2_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg wlan.cfg omap_soc.cfg systemd.cfg debug_options.cfg + classification: SDK_Debug_Defconfigs type: ti_sdk_k2g_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg keystone.cfg lpae.cfg k2g_only.cfg systemd.cfg debug_options.cfg + classification: SDK_Debug_Defconfigs type: ti_sdk_keystone_debug defconfig: multi_v7_defconfig config_file: None extra_configs: multi_v7_prune.cfg baseport.cfg ipc.cfg connectivity.cfg audio_display.cfg keystone.cfg lpae.cfg systemd.cfg debug_options.cfg +diff --git a/ti_config_fragments/dra7_only.cfg b/ti_config_fragments/dra7_only.cfg +index db0d4ab..a5e1fd5 100644 +--- a/ti_config_fragments/dra7_only.cfg ++++ b/ti_config_fragments/dra7_only.cfg +@@ -21,5 +21,3 @@ CONFIG_SOC_AM43XX=n + CONFIG_SOC_DRA7XX=y + + CONFIG_ARCH_KEYSTONE=n +- +-CONFIG_ARM_LPAE=y +-- +2.7.4 + +Hi Shravan, this patch has solved our issue. Big thank you for your fast response and help:) Regards, Stefan. + diff --git a/data2/text/range/25001-30000/728905.txt b/data2/text/range/25001-30000/728905.txt new file mode 100644 index 0000000000000000000000000000000000000000..e174e847301639aa18a7f898c33d7080355cde19 --- /dev/null +++ b/data2/text/range/25001-30000/728905.txt @@ -0,0 +1,72 @@ +Ticket Name: Linux/TDA2: Cannot build SDK on Linux with opencx + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PGA460 Tool/software: Linux Hello Im trying to use opencv with linux on TDA2xx SoC, vision version 03.04.00. Building the kernel and running it, is working fine but when i try to build SDK i get the following error: # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... # Linking into /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... undefined first referenced symbol in file --------- ---------------- EDMA3_semCreate /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 EDMA3_semDelete /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 edma3OsProtectEntry /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsProtectExit /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemGive /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemTake /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 rtos_init_ocl_dsp_monitor /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/lib/tda2xx-evm/c66xdsp_1/release/links_common_system.ae66 error: unresolved symbols remain error: errors encountered during linking; "/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx _evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe6 6" not built /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:271: recipe for target '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66' failed make[7]: *** [/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'c66xdsp_1' failed make[6]: *** [c66xdsp_1] Error 2 MAKEFILE.MK:116: recipe for target 'apps_dsp1' failed make[5]: *** [apps_dsp1] Error 2 MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:287: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:171: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:36: recipe for target 'apps' failed make[1]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 ________________________________________ I do not get this when i build SDK for (normal) linux without opencx. I tried to figure out where are those functions, and it seems they are both in ti_components/codecs/framework_components_3_40_02_07/packages/ti/sdo/fc/edma3/edma3_config.c and ti_components/codecs/codec_engine_3_24_00_08/cetools/packages/ti/sdo/fc/edma3/edma3_config.c I also tried to change mkefiles so build would pass but with no success. I followed the Linux User Guide pdf and should have setup both Codec Engine and Framework Components correctly. Thanks for reading this and for help in advance! + +Responses: +Hi, can you try to delete directory "vision_sdk/binaries/$(MAKEAPPNAME)/$(MAKECONFIG)" and then run "make -s depend" and "make -s" (sometimes -j option causes such errors) and see if you get the error? Regards, Yordan + +Hi Yordan, thank you for responding, I have tried what you said and it did not help, how ever i came to conclusion that edma3_config.c files dont even get compiled. I placed intentional errors in those .c files and make return no errors for them, everything runs the same. Is it possible that make files dont have correct paths? Im running out of ideas. + +Hi, I have pinged VisionSDK experts for further help. Regards, Yordan + +Hi, Could you make sure dsp compiler bin path added to PATH variable ? If not please run below command export PATH=/bin:$PATH & then build Regards Surya + +Yes dsp compiler is installed and path is exported. I have removed every opencl build for dps, edited some make files so opencvCannyLink_priv and iOpenCVCannyAlgo could be compiled and now i have this error: Compiling OpenCL file copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure Makefile:5: recipe for target 'copy.dsp_h' failed make[7]: *** [copy.dsp_h] Error 255 MAKEFILE.MK:14: recipe for target 'opencl_build' failed make[6]: *** [opencl_build] Error 2 MAKEFILE_adas.MK:14: recipe for target 'vision_sdk_linux_demo' failed make[5]: *** [vision_sdk_linux_demo] Error 2 MAKEFILE_adas.MK:5: recipe for target 'apps' failed make[4]: *** [apps] Error 2 Makefile:183: recipe for target 'apps_exe_hlos' failed make[3]: *** [apps_exe_hlos] Error 2 Makefile:64: recipe for target 'apps_hlos' failed make[2]: *** [apps_hlos] Error 2 Makefile:36: recipe for target 'apps' failed make[1]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make: *** [vision_sdk] Error 2 + +Hi Could you just run "echo $PATH" & share ? Regards Surya + +Here it is: [~/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build]$ echo $PATH /home/rtrk/bin:/home/rtrk/.local/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/home/rtrk/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core:/snap/bin:/home/rtrk/.fzf/bin:/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:/home/rtrk/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin + +Hi OpenCL uses prebuilt dsp binaries which is part of OpenCL file system patch Could you please confirm OpenCL file system patch extracted in targetfs folder ? Also please run "ls -al" in ti_components\cg_tools\linux & share ? Regards Surya + +Here they are: [~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs]$ ll total 52M drwxr-xr-x 2 rtrk rtrk 4,0K јун 12 12:10 bin drwxr-xr-x 2 rtrk rtrk 4,0K сеп 19 09:17 boot drwxr-xr-x 2 rtrk rtrk 4,0K јун 11 22:01 dev drwxrwxr-x 32 rtrk rtrk 4,0K мар 6 2018 etc drwxr-xr-x 3 rtrk rtrk 4,0K јун 11 22:01 home drwxr-xr-x 2 rtrk rtrk 4,0K јун 11 22:19 include -rwxrw-r-- 1 rtrk rtrk 1,5M сеп 18 14:56 install-extra.tar.gz drwxr-xr-x 9 rtrk rtrk 4,0K јун 12 12:10 lib drwxr-xr-x 2 rtrk rtrk 4,0K јун 11 22:01 media drwxr-xr-x 3 rtrk rtrk 4,0K јун 11 22:01 mnt drwxrwxr-x 4 rtrk rtrk 4,0K јун 8 2017 opencl_fs_patches -rwxr-xr-x 1 root root 50M сеп 19 09:17 opencl_fs_patches.tar.gz drwxr-xr-x 4 rtrk rtrk 4,0K сеп 13 12:07 opt drwxr-xr-x 2 rtrk rtrk 4,0K јун 11 22:01 proc drwxr-xr-x 2 rtrk rtrk 4,0K јун 12 12:10 run drwxr-xr-x 2 rtrk rtrk 4,0K јун 12 12:10 sbin drwxr-xr-x 2 rtrk rtrk 4,0K јун 11 22:01 sys drwxrwxr-x 2 rtrk rtrk 4,0K јун 11 22:01 tmp drwxrwxr-x 11 rtrk rtrk 4,0K мар 6 2018 usr drwxr-xr-x 8 rtrk rtrk 4,0K јун 12 12:10 var and: [~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux]$ ll total 16 drwxrwsr-x 8 rtrk rtrk 4096 сеп 7 14:40 arp32_1.0.7 drwxrwsr-x 8 rtrk rtrk 4096 сеп 7 14:40 C6000_7.4.2 drwxrwsrwx 6 rtrk rtrk 4096 сеп 7 14:40 ti-cgt-arm_16.9.2.LTS drwxrwxr-x 7 rtrk rtrk 4096 сеп 18 13:42 ti-cgt-c6000_8.1.0 + +Hi I got the issue, while building VSDK pass target as "opencx" make -s -j depend make -s -j opencx Regards Surya + +Hi, Even though you extracted opencl_fs_patches.tar.gz in targetfs folder, the content of the tar ball is not copied to respective folder (lib/ & usr/ folder) you can cross check this by navigating to below folder ti_components/os_tools/linux/targetfs/usr/share/ti -> are you able to see "opencl" folder ? If not,Please manually copy the folders using below commands from "ti_components/os_tools/linux/targetfs" folder cp -r opencl_fs_patches/lib . cp -r opencl_fs_patches/usr . & then build Regards Surya + +Hi Surya Sorry if im posting multiple and same answers, im being filtered by forum moderator and im not sure how that exactly works. I cleared my previous build and tried running make -s -j depend make -s -j opencx and now problem looks like this: [~/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build]$ make opencx echo yes yes make -C /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux -fbuild_opencv.mk _vision_sdk_opencx PROFILE=release BUILD_OS=Linux BUILD_OPENCV_SRC=yes make[1]: Entering directory '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' export OpenCV_BUILD_PATH make -fbuild_opencv.mk -C/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux vision_sdk_opencv_linux PROFILE=release make[2]: Entering directory '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' make: cd /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv_src/tiopencv/build_linux_release make: cd /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk mkdir -p /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv_src/tiopencv/build_linux_release /bin/sh: 1: cd: can't cd to /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk; build_opencv.mk:9: recipe for target 'vision_sdk_opencv_linux' failed make[2]: *** [vision_sdk_opencv_linux] Error 2 make[2]: Leaving directory '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' build_opencv.mk:22: recipe for target '_vision_sdk_opencx' failed make[1]: *** [_vision_sdk_opencx] Error 2 make[1]: Leaving directory '/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' Makefile:83: recipe for target 'opencx' failed make: *** [opencx] Error 2 + +Hi, Can you just run make -s showconfig & share ? Regards Surya + +Output: # # Build Config is [ tda2xx_evm_linux_opencx ] # Build Config file is @ /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/configs/tda2xx_evm_linux_opencx/cfg.mk # Build Config .h file is @ /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_opencx/system_cfg.h # Build CPUs is @ ipu1_0 ipu2 a15_0 dsp1 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=no # PROC_EVE1_INCLUDE=no # PROC_EVE2_INCLUDE=no # PROC_EVE3_INCLUDE=no # PROC_EVE4_INCLUDE=no # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-evm # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=ipu1_0 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=no # VPE_INCLUDE=no # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=yes # TARGET_ROOTDIR=/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=yes # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=no # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig # DEFAULT_DTB=dra7-evm-infoadas.dtb # CMEM_INCLUDE=yes # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=no # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_framecopy ALG_opencvcanny ALG_opencvopencldilation ALG_openclframecopy # # Use-cases included in build, # UC_vip_single_cam_openclframe_copy UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_opencvcanny_sgx_display UC_vip_single_cam_opencvopencldilation_sgx_display # # # CPUs that are NOT required but included in config [ tda2xx_evm_linux_opencx ], # # # CPUs that are required but not included in config [ tda2xx_evm_linux_opencx ], # # # Edit /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/configs/tda2xx_evm_linux_opencx/cfg.mk to include or exclude CPUs in an application # + +Hi Looks like cfg.mk file has been modified & also I am not able to find out the value set for BUILD_OPENCV_SRC Could you please share the cfg.mk file for tda2xx_evm_linux_opencx Regards Surya + +Hi Yes i have modified cfg.mk file for tda2xx_evm_linux_opencx build. When i run make -s -j depend it gives me warning that i need to add ipu1_0 and dsp1 cores to build. cfg file: # # This file defines the modules included in $(MAKECONFIG) config # # Modules are split into, # - Use-cases specified in uc_cfg.mk # - Other system config/feature, specified in this file # # Any specific overrides are also specified in this file # Example, for TDA3x SoC EVE2/3/4 are not present and hence force marked as , i.e disabled # # # Additional config options # # # CPUs to included in build # # IPU1 (core 0 & 1 are) not supported when IPU_PRIMARY_CORE=ipu2 PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=no PROC_IPU2_INCLUDE=yes PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=no PROC_EVE1_INCLUDE=no PROC_EVE2_INCLUDE=no PROC_EVE3_INCLUDE=no PROC_EVE4_INCLUDE=no VSDK_BOARD_TYPE=TDA2XX_EVM # Supported values: DDR_MEM_1024M DDR_MEM=DDR_MEM_1024M # Supported values: ipu1_0 ipu1_1 a15_0 none NDK_PROC_TO_USE=ipu1_0 # # Used to control building of algorithm source. # By default algorithm source not included in Vision SDK # BUILD_ALGORITHMS=no # # Applies profile to all cores # # Supported profiles: release debug #PROFILE=debug PROFILE ?= release PROFILE_ipu1_0 ?= $(PROFILE) PROFILE_ipu1_1 ?= $(PROFILE) PROFILE_ipu2 ?= $(PROFILE) PROFILE_c66xdsp_1 ?= $(PROFILE) PROFILE_c66xdsp_2 ?= $(PROFILE) PROFILE_arp32_1 ?= $(PROFILE) PROFILE_arp32_2 ?= $(PROFILE) PROFILE_arp32_3 ?= $(PROFILE) PROFILE_arp32_4 ?= $(PROFILE) PROFILE_a15_0 ?= $(PROFILE) # # For TDA2xx & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem # For TDA3xx - We have only IPU1 and hence IPU1 is the only option # Select IPU primary core from the available IPU1 & IPU2 subsytems # # Supported values: ipu1_0 ipu2 IPU_PRIMARY_CORE=ipu2 IPU_SECONDARY_CORE=ipu1_0 # # Set A15_TARGET_OS # A15 can run Linux or Bios # # A15_TARGET_OS support # Platform BIOS Linux # # TDA2XX_EVM yes yes # TDA3XX_EVM yes no # TDA2EX_EVM yes yes # # Supported values: Bios Linux A15_TARGET_OS=Linux IVAHD_INCLUDE=no VPE_INCLUDE=no DSS_INCLUDE=yes AVB_INCLUDE=no # # Enable below macro to enable DCAN integration into Vision SDK. # DCAN_INCLUDE=no CPU_IDLE_ENABLED=yes # # Enable below macro to view the bandwidth used by different IPs in the device # as a graphical plot on the display screen. # DATA_VIS_INCLUDE=no OPENCL_INCLUDE=yes TREAT_WARNINGS_AS_ERROR = yes HS_DEVICE=no DEFAULT_UBOOT_CONFIG := dra7xx_evm_vision_config DEFAULT_KERNEL_CONFIG := ti_sdk_dra7x_release_defconfig # For TDA2x DEFAULT_DTB := dra7-evm-infoadas.dtb # # Enable macro for OpenCV # ENABLE_OPENCV=yes CMEM_INCLUDE=yes BUILD_OPENCV_SRC=yes BUILD_LLVM=yes include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk + +Hi, You can ignore those warnings & disable those cores In case of Linux ipu2 is only required as it is the primary core & OpenCL uses prebuilt dsp firmwares And I observed you enabled BUILD_OPENCV_SRC=yes Did you intend to build openCV source ? Did you clone the OpenCV source repo before building? The below issue reported by you while running make opencx is because of BUILD_OPENCV_SRC=yes e2e.ti.com/.../2693282 You can set BUILD_OPENCV_SRC=no & run command make opencx Regards Surya + +Hi I did not clone opnencv repo, where can i refer to setting up opencv source? I must have overlooked that part in VisionSDK_UserGuide_opencx.pdf if its there. Also im nearly 100% positive i did not touch BUILD_OPENCV_SRC flag, ok ill set it to no and try again. Ill get back to you as soon as i try that, thanks. + +Hi, again The guide for opencv states this: This repository can be cloned with the below command git clone git://git.ti.com/opencv/tiopencv.git In order to build opencv source as part of vision sdk build, follow the below procedures * Navigate to ‘ti_components’ folder * Then, navigate to ‘algorithms_codecs’ * Now, clone the ‘tiopencv’ repo using the above mentioned command * Set the env variable, ‘BUIILD_OPENCV_SRC’ to ‘yes’ in the ‘tda2xx_evm__opencx’ config Now my ti_components dir looks like this: [~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components]$ ll total 36 drwxrwxr-x 18 rtrk rtrk 4096 сеп 7 14:38 algorithms drwxrwxr-x 3 rtrk rtrk 4096 сеп 7 14:38 ccs_csp drwxrwxr-x 3 rtrk rtrk 4096 сеп 7 14:39 cg_tools drwxrwxr-x 11 rtrk rtrk 4096 сеп 10 09:44 codecs drwxrwxr-x 4 rtrk rtrk 4096 сеп 7 14:38 drivers drwxrwxr-x 5 rtrk rtrk 4096 сеп 7 14:39 networking drwxrwxr-x 5 rtrk rtrk 4096 сеп 7 14:39 open_compute drwxrwxr-x 5 rtrk rtrk 4096 сеп 7 14:39 os_tools drwxrwxr-x 3 rtrk rtrk 4096 сеп 7 14:39 radar I dont have algorithms_codecs dir, should i make one and proceed or use existing algorithm or codecs dirs? Also there it states that i should set BUILD_OPENCV_SRC=yes, and i noticed this: tools_path.mk:145:OpenCV_BUILD_PATH ?= build_dummy is this ok, or should i change OpenCV_BUILD_PATH to correct path? What should i do? + +Hi You can clone under open_compute dir, We will update the document in upcoming release Set BUILD_OPENCV_SRC to "yes", if you intend to build opencv src & to "No", if you want to use prebuilt No need to change anything in tools_path.mk file "OpenCV_BUILD_PATH ?= build_dummy" as when you build for either BIOS or Linux config, it will be overwritten accordingly To verify whether you able to build opencx on Linux, set BUILD_OPENCV_SRC = no, so that it will use the prebuilts Also ipu1_0 & dsp1 to no & then try a clean build Regards Surya + +Hi I did as you said, i cloned tiopencv [~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute]$ ll total 16 drwxrwxr-x 5 rtrk rtrk 4096 сеп 7 14:39 opencl_rtos_am57xx_01_01_10_00 drwxrwxr-x 3 rtrk rtrk 4096 сеп 7 14:39 opencv drwxrwxr-x 12 rtrk rtrk 4096 сеп 21 11:50 tiopencv drwxrwxr-x 11 rtrk rtrk 4096 сеп 7 14:39 tiovx_01_00_01_00 i set ipu1, dsp1 BUILD_OPENCV_SRC to no in cfg file, and i got same error back: Compiling OpenCL file copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure Makefile:5: recipe for target 'copy.dsp_h' failed make[9]: *** [copy.dsp_h] Error 255 MAKEFILE.MK:14: recipe for target 'opencl_build' failed make[8]: *** [opencl_build] Error 2 MAKEFILE_adas.MK:14: recipe for target 'vision_sdk_linux_demo' failed make[7]: *** [vision_sdk_linux_demo] Error 2 MAKEFILE_adas.MK:5: recipe for target 'apps' failed make[6]: *** [apps] Error 2 Makefile:183: recipe for target 'apps_exe_hlos' failed make[5]: *** [apps_exe_hlos] Error 2 Makefile:64: recipe for target 'apps_hlos' failed make[4]: *** [apps_hlos] Error 2 Makefile:36: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:12: recipe for target 'vision_sdk' failed make[2]: *** [vision_sdk] Error 2 build_opencv.mk:22: recipe for target '_vision_sdk_opencx' failed make[1]: *** [_vision_sdk_opencx] Error 2 Makefile:83: recipe for target 'opencx' failed make: *** [opencx] Error 2 If i build with BUILD_OPENCV_SRC set to yes i get again this error (im pointing this out so maybe it can help): make: cd /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv_src/tiopencv/build_linux_release make: cd /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk /bin/sh: 1: cd: can't cd to /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk; build_opencv.mk:9: recipe for target 'vision_sdk_opencv_linux' failed make[2]: *** [vision_sdk_opencv_linux] Error 2 build_opencv.mk:22: recipe for target '_vision_sdk_opencx' failed make[1]: *** [_vision_sdk_opencx] Error 2 Makefile:83: recipe for target 'opencx' failed make: *** [opencx] Error 2 + +Hi, can you just check & confirm prebuilt dsp symbols are present in below folder of file system ? ti_components\os_tools\linux\targetfs\usr\share\ti\opencl Regards Surya + +Here it is: [~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs/usr/share/ti/opencl]$ ll total 19868 drwxrwxr-x 3 rtrk rtrk 4096 сеп 18 14:53 bin -rwxrwxr-x 1 rtrk rtrk 86607 сеп 19 16:41 clc.h -rwxrwxr-x 1 rtrk rtrk 12124 сеп 19 16:41 cpu.h -rwxrwxr-x 1 rtrk rtrk 4088 сеп 19 16:41 dsp_c.h -rwxrwxr-x 1 rtrk rtrk 17300 сеп 19 16:41 dsp_edmamgr.h -rwxrwxr-x 1 rtrk rtrk 35697 сеп 19 16:41 dsp.h -rwxrwxr-x 1 rtrk rtrk 19745928 сеп 19 16:41 dsp.out -rwxrwxr-x 1 rtrk rtrk 3558 сеп 19 16:41 dsp.syms -rwxrwxr-x 1 rtrk rtrk 422224 сеп 19 16:41 dsp_syms.obj + +Hi Everything looks fine I briefed the steps followed by me which is working fine for me, Could you please try at your end ? 1. Ensure kernel/u-boot/sgx/cmem all are cloned & are on vsdk 3.4 release tag 2. Ensure file system downloaded from the link provided in vsdk 3.4 Linux user guide & untarred in targetfs folder 3. Ensure Opencl file system patch applied on file system 4. Ensure dsp tool chain ti-cgt-c6000_8.1.0 downloaded & installed in ti_components/cg_tools/linux folder 5. cd vision_sdk/build 6. Modify MAKECONFIG=tda2xx_evm_linux_opencx in Rules.mk file 7. export PATH= :$PATH 8. make clean 9. make linux_clean 10. make linux 11. make linux_install 12. make -s -j depend 13. make -s -j Regards Surya + +Ok ill do clean instal. Just should i run 12. make -s -j depend 13. make -s -j or 12. make -s -j depend 13. make -s -j opencx + +Hi, I ran without opencx, it build successfully Regards Surya + +Hi Surya I did clean install of vision 3.04 and everything as you listed, now i dont have any dsp errors but undefined main symbol error remains. Im using ubuntu 16.04 and not 14.04, could that cause any errors? + +Hi, Suspecting some issue with dsp tool chain (ti-cgt-c6000_8.1.0) Could you please let us know from where die you download the dsp tool chain (ti-cgt-c6000_8.1.0) ? Also could you please download dsp tool chain (ti-cgt-c6000_8.1.0) one more time & try building ? undefined first referenced symbol in file --------- ---------------- main /home/rtrk/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib Regards Surya + +Hi Surya Link from where i downloaded dsp dgt: www.ti.com/.../8.1.0 "Also could you please download dsp tool chain (ti-cgt-c6000_8.1.0) one more time & try building ?" I did that multiple times before, same results. I have now moved to work with rules for MAKECONFIG?=tda2xx_evm_linux_all where i have set flags to include openCL and openCV to build. That passes with no major problems, but now when i login to system on TDA2x platform and when i try to test openCL this is what i get: root@dra7xx-evm:/usr/share/ti/examples/opencl/vecadd# ./vecadd CMEM Error: init: Failed to open /dev/cmem: 'No such file or directory' TIOCL FATAL: The cmemk kernel module is not installed. Consult the OpenCL UserGuide at software-dl.ti.com/.../index.html I did install cmem in ~/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/kernel/cmem, and apply opencl_fs_patches.tar.gz Have i missed some steps for correctly making cmem? + +Hi After login as root did you run "load_ocl_kos.sh" under "/opt/vision_sdk" dir or not ? This is required to initialize CMEM Regards Surya + +Hi Any progress on this ? Regards Surya + +Hello Surya, i dont know why am i getting notification for your reply just now. We have found existing issue in vision release note: ADASVISION-1894 [TDA2xx Linux] OpenCL UC, Cmem initialization fails. So we have paused that part of project until that gets fixed. + +Hi, For now, We can close this thread When We will get any fix, we will create a new thread & link to this Regards Surya + diff --git a/data2/text/range/25001-30000/732866.txt b/data2/text/range/25001-30000/732866.txt new file mode 100644 index 0000000000000000000000000000000000000000..a0d1022d9774a65bdc367e2408538efe3f9a7c82 --- /dev/null +++ b/data2/text/range/25001-30000/732866.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: evm mount to targetfs failed + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux SDK_VISION_03_02_00_00 i use is ok ! i try SDK_VISION_03_04_00_00 today ,evm mount to targetfs have some problem! follow is the log, could you analysis it for me! OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 3 ms (53.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3560088 bytes read in 114 ms (29.8 MiB/s) 106875 bytes read in 16 ms (6.4 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x365298 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff17a ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00027-g018eb62 (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #2 SMP PREEMPT Sun Sep 30 10:05:17 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0xbe400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 411860K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364332K reserved, 204800K cma-reserved, 235520K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) [ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) [ 0.000000] .data : 0xc0934000 - 0xc09839e0 ( 319 kB) [ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000340] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000349] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000803] Console: colour dummy device 80x30 [ 0.000818] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000824] This ensures that you still see kernel messages. Please [ 0.000830] update your kernel commandline. [ 0.000843] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000856] pid_max: default: 32768 minimum: 301 [ 0.000953] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000963] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001500] Initializing cgroup subsys io [ 0.001517] Initializing cgroup subsys memory [ 0.001541] Initializing cgroup subsys devices [ 0.001554] Initializing cgroup subsys freezer [ 0.001565] Initializing cgroup subsys perf_event [ 0.001577] Initializing cgroup subsys pids [ 0.001603] CPU: Testing write buffer coherency: ok [ 0.001807] /cpus/cpu@0 missing clock-frequency property [ 0.001822] /cpus/cpu@1 missing clock-frequency property [ 0.001832] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001876] Setting up static identity map for 0x80008340 - 0x800083a0 [ 0.080183] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080252] Brought up 2 CPUs [ 0.080265] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080271] CPU: All CPU(s) started in HYP mode. [ 0.080277] CPU: Virtualization extensions available. [ 0.081312] devtmpfs: initialized [ 0.110480] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.111436] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.314784] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.314807] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.318791] pinctrl core: initialized pinctrl subsystem [ 0.319655] NET: Registered protocol family 16 [ 0.320616] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350246] cpuidle: using governor ladder [ 0.380276] cpuidle: using governor menu [ 0.388862] OMAP GPIO hardware version 0.1 [ 0.395372] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411897] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411910] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.421538] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.421548] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.422016] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.422025] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.422505] OMAP DMA hardware revision 0.0 [ 0.461427] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462593] edma 43300000.edma: memcpy is disabled [ 0.467288] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471646] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471823] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.471980] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472134] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472430] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472620] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475653] palmas 0-0058: IRQ missing: skipping irq request [ 0.491062] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563370] pcf857x 0-0020: probed [ 0.563931] pcf857x 0-0021: probed [ 0.564085] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.564480] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564690] media: Linux media interface: v0.10 [ 0.564741] Linux video capture interface: v2.00 [ 0.564781] pps_core: LinuxPPS API ver. 1 registered [ 0.564788] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564816] PTP clock support registered [ 0.564860] EDAC MC: Ver: 3.0.0 [ 0.565614] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.565902] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.566254] Advanced Linux Sound Architecture Driver Initialized. [ 0.567110] clocksource: Switched to clocksource arch_sys_counter [ 0.577691] NET: Registered protocol family 2 [ 0.578191] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.578254] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.578378] TCP: Hash tables configured (established 8192 bind 8192) [ 0.578427] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.578458] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578659] NET: Registered protocol family 1 [ 0.578902] RPC: Registered named UNIX socket transport module. [ 0.578911] RPC: Registered udp transport module. [ 0.578917] RPC: Registered tcp transport module. [ 0.578924] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.579945] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.588872] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.589505] NFS: Registering the id_resolver key type [ 0.589532] Key type id_resolver registered [ 0.589540] Key type id_legacy registered [ 0.589607] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.590894] bounce: pool size: 64 pages [ 0.591039] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.591053] io scheduler noop registered [ 0.591064] io scheduler deadline registered [ 0.591095] io scheduler cfq registered (default) [ 0.595960] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599199] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599211] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599245] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599265] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629457] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629631] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629643] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629654] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.629663] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.630062] PCI: bus0: Fast back to back transfers disabled [ 0.630186] PCI: bus1: Fast back to back transfers enabled [ 0.630269] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630284] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630297] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630513] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.690223] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.693565] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.698421] console [ttyS0] enabled [ 1.702807] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.712499] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.722551] [drm] Initialized drm 1.1.0 20060810 [ 1.728104] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.734750] [drm] No driver support for vblank timestamp query. [ 1.740916] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.748117] OMAP DSS rev 6.1 [ 1.751863] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.767447] loop: module loaded [ 1.771000] vmemexp device MAJOR num = 245 [ 1.775126] vmemexp class registered [ 1.778861] /dev/vmemexp device registered [ 1.782975] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.788692] nand: No NAND device found [ 1.792462] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.802402] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.807825] 7 ofpart partitions found on MTD device spi32766.0 [ 1.813685] Creating 7 MTD partitions on "spi32766.0": [ 1.818863] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.824995] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.831361] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.838286] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.844937] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.852329] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.858670] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.866389] libphy: Fixed MDIO Bus: probed [ 1.917143] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.923268] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.933804] libphy: 48485000.mdio: probed [ 1.937852] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.945893] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.954598] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.961262] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.968253] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.976861] mousedev: PS/2 mouse device common for all mice [ 1.983047] i2c /dev entries driver [ 1.991760] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.997372] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.003757] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.010297] evm_3v3_sw: supplied by sysen1 [ 2.090897] mmc0: MAN_BKOPS_EN bit is not set [ 2.102825] mmc0: new HS200 MMC card at address 0001 [ 2.118297] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.133093] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.149336] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.168902] ledtrig-cpu: registered to indicate activity on CPUs [ 2.177404] aic_dvdd: supplied by evm_3v3_sw [ 2.183286] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.190758] NET: Registered protocol family 10 [ 2.206002] sit: IPv6 over IPv4 tunneling driver [ 2.211206] NET: Registered protocol family 17 [ 2.215883] Key type dns_resolver registered [ 2.220324] omap_voltage_late_init: Voltage driver support not added [ 2.227244] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.233453] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.240165] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.246374] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.254625] Power Management for TI OMAP4+ devices. [ 2.259703] Registering SWP/SWPB emulation handler [ 2.265433] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.272655] dmm 4e000000.dmm: initialized all PAT entries [ 2.279920] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.286562] [drm] No driver support for vblank timestamp query. [ 2.292861] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.309724] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.348439] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.359562] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.366446] hctosys: unable to open rtc device (rtc0) [ 2.384861] evm_1v8: disabling [ 2.387958] aic_dvdd: disabling [ 2.391111] vmmcwl_fixed: disabling [ 2.394775] ldousb: disabling [ 2.398220] ALSA device list: [ 2.401209] #0: DRA7xx-EVM [ 2.404736] Waiting for root device PARTUUID=2ca9f500-02... [ 2.607141] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.622198] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.629206] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.638923] mmcblk1: p1 p2 [ 2.740816] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 2.752476] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 3.204241] EXT4-fs (mmcblk1p2): recovery complete [ 3.209956] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 3.218130] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 3.224319] devtmpfs: mounted [ 3.227537] Freeing unused kernel memory: 332K [ 3.232000] This architecture does not have kernel memory protection. [ 3.356205] systemd[1]: System time before build time, advancing clock. [ 3.387362] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.402901] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.420686] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 3.439279] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.471129] systemd[1]: Set hostname to . [ 3.529582] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.539864] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.566002] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.587907] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.605169] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.668444] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.678262] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.688623] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.996976] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 4.004816] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 4.012653] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 4.019949] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 4.027399] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 4.036838] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 4.069381] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 4.097397] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 4.117403] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.147350] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 4.167310] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 4.202456] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.227969] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.257914] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.277300] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.307944] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 4.327440] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 4.387288] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 4.419455] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.434372] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.497466] systemd[1]: Starting Journal Service... Starting Journal Service... [ 4.522589] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.549616] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 4.577525] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 4.647481] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.664962] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ 4.677622] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.707881] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 4.727521] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 4.758014] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 4.787314] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.837528] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 4.863849] systemd[1]: Mounted POSIX Message Queue Fileed 48838000.rtc as rtc0 [ OK ] Found device /dev/ttyS0. [ 6.525566] SCSI subsystem initialized Starting Update UTMP about System Boot/Shutdown... [ 6.609059] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 6.623488] CAN device driver interface [ 6.639942] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 Starting Network Time Synchronization... [ 6.706284] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 6.720907] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) [ 6.761104] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 6.775247] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ OK ] Started Network Time Synchronization.[ 6.820733] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 6.934690] scsi host0: ahci [ 6.938176] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 [ OK ] Started Update UTMP about System Boot/Shutdown.[ 7.012735] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [ 7.219070] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 7.317165] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. Starting Synchronize System and HW clocks... [ OK ] Reached target System Time Synchronized. [ OK ] Started Synchronize System and HW clocks. [ 7.600024] remoteproc1: powering up 40800000.dsp [ 7.605576] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 598197 [ 7.627777] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 7.633668] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 7.639608] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 7.675797] remoteproc1: remote processor 40800000.dsp is now up [ 7.683844] virtio_rpmsg_bus virtio0: rpmsg host is online [ 7.690491] remoteproc2: powering up 41000000.dsp [ 7.707602] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 598197 [ 7.720990] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 7.726870] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 7.732793] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 7.788917] remoteproc2: remote processor 41000000.dsp is now up [ 7.795388] virtio_rpmsg_bus virtio1: rpmsg host is online [ 7.817777] remoteproc0: powering up 55020000.ipu [ 7.837549] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4612468 [ 7.844529] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 7.908630] remoteproc0: remote processor 55020000.ipu is now up [ 7.915510] virtio_rpmsg_bus virtio2: rpmsg host is online [ OK ] Reached target System Initialization. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ 8.119858] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 8.127062] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 Starting Permit User Sessions...[ 8.142015] NET: Registered protocol family 41 [ 8.147244] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 Starting Login Service... Starting rc.pvr.service... Starting Save/Restore Sound Card State... [ OK ] Started Kernel Logging Service. [ OK ] Started D-Bus System Message Bus. [ 8.383599] usbcore: registered new interface driver usbfs [ 8.389477] usbcore: registered new interface driver hub [ 8.395081] usbcore: registered new device driver usb [ 8.448054] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ 8.482261] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 8.491186] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 8.502772] dwc3 48890000.usb: otg: can't start till gadget registers [ 8.509424] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.514953] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 8.527433] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 8.536347] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 8.544038] hub 1-0:1.0: USB hub found [ 8.547958] hub 1-0:1.0: 1 port detected [ 8.552143] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ OK ] Started System Logging Service.[ 8.563823] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 8.571993] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 8.582840] hub 2-0:1.0: USB hub found [ 8.586629] hub 2-0:1.0: 1 port detected Starting Network Service... [ OK ] Started Permit User Sessions. [ OK ] Started rc.pvr.service. [ 8.650216] net eth1: initializing cpsw version 1.15 (0) [ 8.655564] net eth0: initialized cpsw ale version 1.4 [ 8.660855] net eth0: ALE Table size 1024 [ 8.672201] net eth1: phy found : id is : 0x20005c7a [ OK ] Started Save/Restore Sound Card State. [ 8.684220] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 8.691913] net eth0: initializing cpsw version 1.15 (0) [ 8.703919] net eth0: phy found : id is : 0x20005c7a [ 8.713681] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ OK ] Started Network Service. [ OK ] Started Login Service. [ OK ] Reached target Network. Starting Network Name Resolution... Starting weston.service... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Network Name Resolution. [ OK ] Started weston.service. Starting telnetd.service... Starting tiipclad-daemon.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. [ 10.704349] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 10.712424] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# [ 37.136981] random: nonblocking pool is initialized root@dra7xx-evm:~# ifconfig eth0 172.17.218.88 netmask 255.255.224.0 root@dra7xx-evm:~# mount -t nfs -o nolock,nfsvers=3,vers=3 172.17.218.66:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs /mnt mount: wrong fs type, bad option, bad superblock on 172.17.218.66:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs, missing codepage or helper program, or other error (for several filesystems (e.g. nfs, cifs) you might need a /sbin/mount. helper program) In some cases useful info is found in syslog - try dmesg | tail or so. root@dra7xx-evm:~# + +Responses: +Hi Shuai, can you try repeating the NFS server address with "-o addr=...". In your case the command will look like: mount -t nfs -o addr=172.17.218.66,nolock,nfsvers=3,vers=3 172.17.218.66:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs /mnt Regards, Yordan + diff --git a/data2/text/range/25001-30000/733077.txt b/data2/text/range/25001-30000/733077.txt new file mode 100644 index 0000000000000000000000000000000000000000..fb9be6465c0698d501eeb8cfe047edc3cc3a88b8 --- /dev/null +++ b/data2/text/range/25001-30000/733077.txt @@ -0,0 +1,14 @@ +Ticket Name: CCS/TDA2: Compile VXLIB with CCS V6 + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi as user manual inttroduce, i use CCS V6 to compille VXLIB (C6000) in vision SDK V3.4, i get the error like below, seems like get error for packaging vxlib_bamplgin.lib. but vxlib.lib successfully created. -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -IC:/VLIB_Tools/xdc_eclipse_plugin_gen/20091203 -IC:/VLIB_Tools/dsp_apps/algframework/inc -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -I../.. -IC:/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.2.4/include -fc ./src/vx/VXLIB_thresholdRange_i8u_o8u/bam_plugin/BAM_VXLIB_thresholdRange_i8u_o8u_helper_funcs.c cle66 ./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_exec_funcs.c ... if [ ! -d package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin ]; then mkdir -p package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin ; fi; rm -f package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_exec_funcs.oe66.dep "C:/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.2.4/bin/"cl6x -c -mv6600 --abi=eabi -c -k -mw --strip_coff_underscore -o3 --symdebug:none --mem_model:data=far --use_g2 -DCORE_DSP -Dti_targets_elf_C66 -Dxdc_target_types__=ti/targets/std.h -eo.oe66 -ea.se66 -fr=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin -fs=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin -ppa -ppd=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_exec_funcs.oe66.dep -I. -I-IC:/VLIB_Tools/xdc_eclipse_plugin_gen/20091203 -IC:/VLIB_Tools/dsp_apps/algframework/inc -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -IC:/VLIB_Tools/xdc_eclipse_plugin_gen/20091203 -IC:/VLIB_Tools/dsp_apps/algframework/inc -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -I../.. -IC:/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.2.4/include -fc ./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_exec_funcs.c cle66 ./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_helper_funcs.c ... if [ ! -d package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin ]; then mkdir -p package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin ; fi; rm -f package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_helper_funcs.oe66.dep "C:/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.2.4/bin/"cl6x -c -mv6600 --abi=eabi -c -k -mw --strip_coff_underscore -o3 --symdebug:none --mem_model:data=far --use_g2 -DCORE_DSP -Dti_targets_elf_C66 -Dxdc_target_types__=ti/targets/std.h -eo.oe66 -ea.se66 -fr=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin -fs=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin -ppa -ppd=package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_helper_funcs.oe66.dep -I. -I-IC:/VLIB_Tools/xdc_eclipse_plugin_gen/20091203 -IC:/VLIB_Tools/dsp_apps/algframework/inc -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -IC:/VLIB_Tools/xdc_eclipse_plugin_gen/20091203 -IC:/VLIB_Tools/dsp_apps/algframework/inc -IC:/VLIB_Tools/dsp_apps/dmautils/inc/baseaddress/vayu/dsp -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_csl -IC:/VLIB_Tools/dsp_apps/dmautils/inc/edma_utils -IC:/ti/vxlib_c66x_1_1_1_0/packages -I../.. -IC:/ti/ccsv6/tools/compiler/ti-cgt-c6000_8.2.4/include -fc ./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_helper_funcs.c archiving package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_absDiff_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_absDiff_i16s_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_absDiff_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_absDiff_i16s_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_absDiff_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_absDiff_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_absDiff_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_absDiff_i8u_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_add_i16s_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_add_i16s_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_add_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_add_i8u_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_add_i8u_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_add_i8u_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i8u_o16s/bam_plugin/BAM_VXLIB_add_i8u_i8u_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_add_i8u_i8u_o16s/bam_plugin/BAM_VXLIB_add_i8u_i8u_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_addSquare_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_addSquare_i8u_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_addSquare_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_addSquare_i8u_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_addWeight_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_addWeight_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_addWeight_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_addWeight_i8u_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_and_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_and_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_and_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_and_i8u_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_box_3x3_i8u_o8u/bam_plugin/BAM_VXLIB_box_3x3_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_box_3x3_i8u_o8u/bam_plugin/BAM_VXLIB_box_3x3_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_cannyNMS_i16s_i16s_i16u_o8u/bam_plugin/BAM_VXLIB_cannyNMS_i16s_i16s_i16u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_cannyNMS_i16s_i16s_i16u_o8u/bam_plugin/BAM_VXLIB_cannyNMS_i16s_i16s_i16u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_channelCopy_1to1_i8u_o8u/bam_plugin/BAM_VXLIB_channelCopy_1to1_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_channelCopy_1to1_i8u_o8u/bam_plugin/BAM_VXLIB_channelCopy_1to1_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_channelCombine_2to1_i8u_o8u/bam_plugin/BAM_VXLIB_channelCombine_2to1_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_channelCombine_2to1_i8u_o8u/bam_plugin/BAM_VXLIB_channelCombine_2to1_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_channelCombine_3to1_i8u_o8u/bam_plugin/BAM_VXLIB_channelCombine_3to1_i8u_o8u_exec_funcs.oe66 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package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_sobel_7x7_i8u_o32s_o32s/bam_plugin/BAM_VXLIB_sobel_7x7_i8u_o32s_o32s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_sobel_7x7_i8u_o32s_o32s/bam_plugin/BAM_VXLIB_sobel_7x7_i8u_o32s_o32s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_subtract_i16s_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i16s_i16s_o16s/bam_plugin/BAM_VXLIB_subtract_i16s_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_subtract_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_subtract_i8u_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_subtract_i8u_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i16s_o16s/bam_plugin/BAM_VXLIB_subtract_i8u_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i8u_o16s/bam_plugin/BAM_VXLIB_subtract_i8u_i8u_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_subtract_i8u_i8u_o16s/bam_plugin/BAM_VXLIB_subtract_i8u_i8u_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_tableLookup_i16s_o16s/bam_plugin/BAM_VXLIB_tableLookup_i16s_o16s_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_tableLookup_i16s_o16s/bam_plugin/BAM_VXLIB_tableLookup_i16s_o16s_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_tableLookup_i8u_o8u/bam_plugin/BAM_VXLIB_tableLookup_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_tableLookup_i8u_o8u/bam_plugin/BAM_VXLIB_tableLookup_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_thresholdBinary_i8u_o8u/bam_plugin/BAM_VXLIB_thresholdBinary_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_thresholdBinary_i8u_o8u/bam_plugin/BAM_VXLIB_thresholdBinary_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_thresholdRange_i8u_o8u/bam_plugin/BAM_VXLIB_thresholdRange_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_thresholdRange_i8u_o8u/bam_plugin/BAM_VXLIB_thresholdRange_i8u_o8u_helper_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_exec_funcs.oe66 package/lib/lib/vxlib_bampluginae66/./src/vx/VXLIB_xor_i8u_i8u_o8u/bam_plugin/BAM_VXLIB_xor_i8u_i8u_o8u_helper_funcs.oe66 into lib/vxlib_bamplugin.ae66 ... lib/vxlib_bamplugin.ae66.mk:244: recipe for target 'lib/vxlib_bamplugin.ae66' failed Syntax error: Unterminated quoted string gmake[1]: *** [lib/vxlib_bamplugin.ae66] Error 2 gmake[1]: Leaving directory 'D:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib_c66x_1_1_1_0/packages/ti/vxlib' makefile:274: recipe for target 'lib/vxlib_bamplugin.ae66' failed gmake: *** [lib/vxlib_bamplugin.ae66] Error 2 gmake: Target '.libraries,e66' not remade because of errors. **** Build Finished **** + +Responses: +Do you need to build lib/vxlib_bamplugin.ae66? If so, it looks like the paths need to be updated in the makefile: C:\ti\vxlib_c66x_1_1_1_0\packages\ti\vxlib\makefile These libraries were built originally in a different environment than VSDK. So you can update the paths accordingly in the makefile and try again. (in particular: DMAUTILS_INSTALL_DIR and ALGFRAMEWORK_INSTALL_DIR). Jesse + +Thanks,Actually in order to comply to config in makefile, i move DMAUTILS and ALGFRAMEWORK to folder as in makefile, but still fail as above + +Have you tried to make the library without CCS? You can follow the instructions in the documentation to make on command line. + +Another possibility is the length of the directory in Windows. For example, making the library from: "D:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib" takes a lot of characters for the path. In my environment, I make vxlib from the "C:\ti\vxlib" path. If you move vxlib to somewhere closer to the root and try again, perhaps it would work. + diff --git a/data2/text/range/25001-30000/760240.txt b/data2/text/range/25001-30000/760240.txt new file mode 100644 index 0000000000000000000000000000000000000000..54c42814ca917ce4a8df9fd5e9cd47b52108eb9f --- /dev/null +++ b/data2/text/range/25001-30000/760240.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2: TIDI TensorFlow MobileNet + +Query Text: +Part Number: TDA2 I tried to port MobileNet as described here -- e2e.ti.com/.../2717341 When running inference with -- eve_test_dl_algo.out config_list.txt I get a bunch of layers failing ~ as in here any pointers would be greatly appreciated thank you! .luca -- numFrames = 1 preProcType = 2 inData = preproc_2_224x224.y outData = "./stats_tool_out.bin" netBinFile = "tidl_net_mobilenet_1_224.bin" paramsBinFile = "tidl_param_mobilenet_1_224.bin" inWidth = 224 inHeight = 224 inNumChannels = 3 (tf1.1_env) luca@doppio tf-example eve_test_dl_algo.out config_list.txt Processing config file tidl_config_mobileNet1.txt ! 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 224 , 224 , 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 224 , 224 , 1 , 32 , 112 , 112 , 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 32 , 112 , 112 , 1 , 32 , 112 , 112 , 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 112 , 112 , 1 , 64 , 112 , 112 , 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 112 , 112 , 1 , 64 , 56 , 56 , 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 56 , 56 , 1 , 128 , 56 , 56 , 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 56 , 56 , 1 , 128 , 28 , 28 , 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 28 , 28 , 1 , 256 , 28 , 28 , 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 28 , 28 , 1 , 256 , 14 , 14 , 13, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 256 , 14 , 14 , 1 , 512 , 14 , 14 , 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 24, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 512 , 14 , 14 , 1 , 512 , 7 , 7 , 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 512 , 7 , 7 , 1 , 1024 , 7 , 7 , 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 28, TIDL_PoolingLayer , 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 1024 , 7 , 7 , 1 , 1 , 1 , 1024 , 29, TIDL_InnerProductLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 1 , 1 , 1024 , 1 , 1 , 1 , 1001 , 30, TIDL_SoftMaxLayer , 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 1 , 1 , 1001 , 1 , 1 , 1 , 1001 , 31, TIDL_DataLayer , 0, 1 , -1 , 30 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 1001 , 0 , 0 , 0 , 0 , Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot 1 72 60 72 32 28 32 3 32 3 1 8 1 3 4 4 4320 896 1 2 40 30 40 32 28 32 1 1 1 1 1 1 1 4 4 1200 896 1 3 32 28 32 32 28 32 32 64 32 8 8 1 4 4 4 896 896 1 4 72 60 72 32 28 32 1 1 1 1 1 1 1 2 2 4320 896 1 5 32 28 32 32 28 32 64 128 64 8 8 1 8 2 2 896 896 1 6 40 30 40 32 28 32 1 1 1 1 1 1 1 2 2 1200 896 1 7 32 28 32 32 28 32 128 128 128 8 8 1 16 2 2 896 896 1 8 72 60 72 32 28 32 1 1 1 1 1 1 1 1 1 4320 896 1 9 32 28 32 32 28 32 128 256 128 8 8 1 16 1 1 896 896 1 10 40 30 40 32 28 32 1 1 1 1 1 1 1 1 1 1200 896 1 11 32 28 32 32 28 32 256 256 256 8 8 1 32 1 1 896 896 1 12 40 32 40 16 14 16 1 1 1 1 1 1 1 1 1 1280 224 1 13 16 14 16 16 14 16 256 512 256 8 8 1 32 1 1 224 224 1 14 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 15 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 16 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 17 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 18 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 19 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 20 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 21 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 22 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 23 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 24 40 18 40 16 7 16 1 1 1 1 1 1 1 1 1 720 112 1 25 16 7 16 16 7 16 512 1024 512 8 8 1 64 1 1 112 112 1 26 24 9 24 16 7 16 1 1 1 1 1 1 1 1 1 216 112 1 27 16 7 16 16 7 16 1024 1024 1024 8 8 1 128 1 1 112 112 1 Processing Frame Number : 0 Layer 1 : Out Q : 95997 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.84, 9.63, Sparsity : 11.11 Layer 2 : Out Q : 7608233 , Failing at 0, 1, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 3 : Out Q : 1 , Failing at 0, 1, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 25.69, 20.47, Sparsity : 20.31 Layer 4 : Out Q : 157 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 5 : Out Q : 126194 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 25.69, 24.56, Sparsity : 4.39 Layer 6 : Out Q : 9566000 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 7 : Out Q : 1 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 50.97, Sparsity : 0.81 Layer 8 : Out Q : 205 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 9 : Out Q : 246241 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 10 : Out Q : 78632959 , Failing at 0, 2, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 11 : Out Q : 1 , Failing at 0, 1, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 12 : Out Q : 1469 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 13 : Out Q : 2961619 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 14 : Out Q : 729951977 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 15 : Out Q : 502695931 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 16 : Out Q : 1 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 17 : Out Q : 3499 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 18 : Out Q : 333160 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 19 : Out Q : 808651178 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 20 : Out Q : 63449855 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 21 : Out Q : 1 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.38, Sparsity : 0.01 Layer 22 : Out Q : 1103 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 23 : Out Q : 2998754 , Failing at 0, 0, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 24 : Out Q : 427423464 , Failing at 0, 2, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 0.23, 0.23, Sparsity : 0.00 Layer 25 : Out Q : 1 , Failing at 0, 1, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 25.69, 25.59, Sparsity : 0.39 Layer 26 : Out Q : 67 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 27 : Out Q : 39868 , Failing at 0, 1, 0, 0 ref,out = 255,0 TIDL_ConvolutionLayer, FAILED!!!!!! #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 28 : Out Q : 409849294 , TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 29 : Out Q : 1 , [0][0] - outData - 0 outputRef - 127 TIDL_InnerProductLayer, FAILED!!!!!! #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 30 :-------Max Index 1000 : 0 ------- #MMACs = 0.00, 0.00, Sparsity : 0.00 End of config list found ! + +Responses: +Hi, Did you get the expeted result during the import step? + +Hi Kumar, yes it appears import was successful, see next -- any suggestions? -- luca@doppio tf-example tidl_model_import.out tidl_import_mobileNet1.txt TF Model File : mobilenet_1_224.pb Num of Layer Detected : 276 0, TIDL_DataLayer 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 224 , 224 , 0 , 1, TIDL_ConvolutionLayer 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 224 , 224 , 1 , 32 , 112 , 112 , 10838016 , 2, TIDL_ConvolutionLayer 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 32 , 112 , 112 , 1 , 32 , 112 , 112 , 3612672 , 3, TIDL_ConvolutionLayer 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 112 , 112 , 1 , 64 , 112 , 112 , 25690112 , 4, TIDL_ConvolutionLayer 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 112 , 112 , 1 , 64 , 56 , 56 , 1806336 , 5, TIDL_ConvolutionLayer 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 56 , 56 , 1 , 128 , 56 , 56 , 25690112 , 6, TIDL_ConvolutionLayer 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 3612672 , 7, TIDL_ConvolutionLayer 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 51380224 , 8, TIDL_ConvolutionLayer 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 56 , 56 , 1 , 128 , 28 , 28 , 903168 , 9, TIDL_ConvolutionLayer 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 28 , 28 , 1 , 256 , 28 , 28 , 25690112 , 10, TIDL_ConvolutionLayer 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 1806336 , 11, TIDL_ConvolutionLayer 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 51380224 , 12, TIDL_ConvolutionLayer 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 28 , 28 , 1 , 256 , 14 , 14 , 451584 , 13, TIDL_ConvolutionLayer 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 256 , 14 , 14 , 1 , 512 , 14 , 14 , 25690112 , 14, TIDL_ConvolutionLayer 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , 15, TIDL_ConvolutionLayer 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 51380224 , 16, TIDL_ConvolutionLayer 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , 17, TIDL_ConvolutionLayer 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 51380224 , 18, TIDL_ConvolutionLayer 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , 19, TIDL_ConvolutionLayer 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 51380224 , 20, TIDL_ConvolutionLayer 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , 21, TIDL_ConvolutionLayer 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 51380224 , 22, TIDL_ConvolutionLayer 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , 23, TIDL_ConvolutionLayer 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 51380224 , 24, TIDL_ConvolutionLayer 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 512 , 14 , 14 , 1 , 512 , 7 , 7 , 225792 , 25, TIDL_ConvolutionLayer 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 512 , 7 , 7 , 1 , 1024 , 7 , 7 , 25690112 , 26, TIDL_ConvolutionLayer 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 451584 , 27, TIDL_ConvolutionLayer 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 51380224 , 28, TIDL_PoolingLayer 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 1024 , 7 , 7 , 1 , 1 , 1 , 1024 , 50176 , 29, TIDL_InnerProductLayer 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 1 , 1 , 1024 , 1 , 1 , 1 , 1001 , 1025024 , 30, TIDL_SoftMaxLayer 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 1 , 1 , 1001 , 1 , 1 , 1 , 1001 , 1001 , Total Giga Macs : 0.5688 Processing config file ./tempDir/qunat_stats_config.txt ! 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 224 , 224 , 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 224 , 224 , 1 , 32 , 112 , 112 , 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 32 , 112 , 112 , 1 , 32 , 112 , 112 , 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 112 , 112 , 1 , 64 , 112 , 112 , 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 112 , 112 , 1 , 64 , 56 , 56 , 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 56 , 56 , 1 , 128 , 56 , 56 , 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 56 , 56 , 1 , 128 , 56 , 56 , 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 56 , 56 , 1 , 128 , 28 , 28 , 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 28 , 28 , 1 , 256 , 28 , 28 , 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 28 , 28 , 1 , 256 , 14 , 14 , 13, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 256 , 14 , 14 , 1 , 512 , 14 , 14 , 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 24, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 512 , 14 , 14 , 1 , 512 , 7 , 7 , 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 512 , 7 , 7 , 1 , 1024 , 7 , 7 , 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 1024 , 7 , 7 , 1 , 1024 , 7 , 7 , 28, TIDL_PoolingLayer , 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 1024 , 7 , 7 , 1 , 1 , 1 , 1024 , 29, TIDL_InnerProductLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 1 , 1 , 1024 , 1 , 1 , 1 , 1001 , 30, TIDL_SoftMaxLayer , 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 1 , 1 , 1001 , 1 , 1 , 1 , 1001 , 31, TIDL_DataLayer , 0, 1 , -1 , 30 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 1001 , 0 , 0 , 0 , 0 , Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot 1 72 60 72 32 28 32 3 32 3 1 8 1 3 4 4 4320 896 1 2 40 30 40 32 28 32 1 1 1 1 1 1 1 4 4 1200 896 1 3 32 28 32 32 28 32 32 64 32 8 8 1 4 4 4 896 896 1 4 72 60 72 32 28 32 1 1 1 1 1 1 1 2 2 4320 896 1 5 32 28 32 32 28 32 64 128 64 8 8 1 8 2 2 896 896 1 6 40 30 40 32 28 32 1 1 1 1 1 1 1 2 2 1200 896 1 7 32 28 32 32 28 32 128 128 128 8 8 1 16 2 2 896 896 1 8 72 60 72 32 28 32 1 1 1 1 1 1 1 1 1 4320 896 1 9 32 28 32 32 28 32 128 256 128 8 8 1 16 1 1 896 896 1 10 40 30 40 32 28 32 1 1 1 1 1 1 1 1 1 1200 896 1 11 32 28 32 32 28 32 256 256 256 8 8 1 32 1 1 896 896 1 12 40 32 40 16 14 16 1 1 1 1 1 1 1 1 1 1280 224 1 13 16 14 16 16 14 16 256 512 256 8 8 1 32 1 1 224 224 1 14 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 15 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 16 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 17 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 18 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 19 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 20 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 21 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 22 24 16 24 16 14 16 1 1 1 1 1 1 1 1 1 384 224 1 23 16 14 16 16 14 16 512 512 512 8 8 1 64 1 1 224 224 1 24 40 18 40 16 7 16 1 1 1 1 1 1 1 1 1 720 112 1 25 16 7 16 16 7 16 512 1024 512 8 8 1 64 1 1 112 112 1 26 24 9 24 16 7 16 1 1 1 1 1 1 1 1 1 216 112 1 27 16 7 16 16 7 16 1024 1024 1024 8 8 1 128 1 1 112 112 1 Processing Frame Number : 0 Image reading is Not Supported. OpenCV not Enabled Layer 1 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.84, 9.63, Sparsity : 11.11 Layer 2 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 3 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 20.47, Sparsity : 20.31 Layer 4 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 5 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 24.56, Sparsity : 4.39 Layer 6 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 7 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 50.97, Sparsity : 0.81 Layer 8 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 9 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 10 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 11 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 12 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 13 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 14 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 15 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 16 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 17 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 18 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 19 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 20 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 21 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.01 Layer 22 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 23 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 24 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.23, 0.23, Sparsity : 0.00 Layer 25 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.59, Sparsity : 0.39 Layer 26 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 27 : Out Q : 1 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 28 : Out Q : 1 , TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 29 : Out Q : 1 , TIDL_InnerProductLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 30 :-------Max Index 1000 : 0 ------- #MMACs = 0.00, 0.00, Sparsity : 0.00 End of config list found ! + +also something interesting happened ~ if I use the "ref" script it seems to be working is there any difference between these two scripts? which one is the correct one to use? thank you! .luca -- eve_test_dl_algo_ref.out config_list.txt ... 26 24 9 24 16 7 16 1 1 1 1 1 1 1 1 1 216 112 1 27 16 7 16 16 7 16 1024 1024 1024 8 8 1 128 1 1 112 112 1 Processing Frame Number : 0 Layer 1 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.84, 9.63, Sparsity : 11.11 Layer 2 : Out Q : 10877 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 3 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 20.47, Sparsity : 20.31 Layer 4 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 5 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 24.56, Sparsity : 4.39 Layer 6 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.61, Sparsity : 0.00 Layer 7 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 50.97, Sparsity : 0.81 Layer 8 : Out Q : 10879 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 9 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 10 : Out Q : 10879 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.81, Sparsity : 0.00 Layer 11 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 12 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 13 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.68, Sparsity : 0.02 Layer 14 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 15 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 16 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 17 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 18 : Out Q : 10878 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 19 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.28, Sparsity : 0.20 Layer 20 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 21 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.01 Layer 22 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.90, 0.90, Sparsity : 0.00 Layer 23 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 24 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.23, 0.23, Sparsity : 0.00 Layer 25 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.59, Sparsity : 0.39 Layer 26 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.45, 0.45, Sparsity : 0.00 Layer 27 : Out Q : 10880 , TIDL_ConvolutionLayer, PASSED #MMACs = 51.38, 51.38, Sparsity : 0.00 Layer 28 : Out Q : 14700 , TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 29 : Out Q : 1418 , TIDL_InnerProductLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 Layer 30 :-------Max Index 896 : 63 ------- #MMACs = 0.00, 0.00, Sparsity : 0.00 End of config list found ! + +Can you let me know the source of this "eve_test_dl_algo_ref.out". I dont see it part of the relese package? are you referering quant stats tool. + +Since we haven't heard back, we hope you could find solution. Closing the thread. + diff --git a/data2/text/range/25001-30000/761254.txt b/data2/text/range/25001-30000/761254.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b0af61f2e0d99f1ead0e6c83bdb7337be8b81cd --- /dev/null +++ b/data2/text/range/25001-30000/761254.txt @@ -0,0 +1,112 @@ +Ticket Name: Compiler/TDA2PXEVM: Not able compile sources for A15 core alone. + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2, SYSBIOS Tool/software: TI C/C++ Compiler Hi, I was not able to compile my sample sources file which is part of an Vision_SDK module for A15 core. Changes Made: As Posix support is only there for A15 core added var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; in links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg file. Made "PROC_A15_0_INCLUDE=yes" under "cfg.mk" file in source/vision/platform/ti/tda2/apps/configs/MakeConfig directory Made the changes under SRC_FILES.MK fie “SRCS_a15_0 += Sample.c” With the above changes in place I do see the Sample.c file is not getting compiled. By reverting the changes under SRC_FILES.MK file to “SRCS_IPU1_0 += Sample.c” the source file is being compiled. Could you please let me know what other changes to be made to get the sources compiled for SRCS_a15_0 ? + +Responses: +Hi Ramesh, Are you building OpenCV? What is the MAKECONFIG you are using? Regards, Rishabh + +Hi Rishabh, I am not building an OpenCV. To be more precise, I am trying to build an sample application under module section which will be using POSIX related headers and features. In turn I will be making a call to module layer from Usecase section. To make it simple I created a module by name Sample under module section and tried to compile the source file with below tag. "SRCS_a15_0 += Sample.c" Made sure to include SRC_FILES.MK file under "source/vision/platform/ti/tda2/apps/Makefile". Coming to MAKEConfig we have created a new configuration by referring to "tda2px_evm_bios_all" and cfg.mk file varies by minute difference(like change in VSDK_BOARD_TYPE ) and uc_cfg.mk has got all the required usecase are set to Yes as per need(per configuration selection) + +Hi Ramesh, tda2px_evm_bios_all is already defined as MAKECONFIG. Can you use a new name? I would suggest you to talk with Abhay Sorte/Amol Kulkarni from your company who have been working on VSDK for more than an year now. Regards, Rishabh + +HI Rishabh, I meant cfg.mk files are been copied/updated by referring to "tda2px_evm_bios_all" directory under config folder. The MAKECONFIG in my case is "harman_proto_A_bios" which uses VISION SDK BOARD TYPE to "HARMAN_TDA2PX_PROTO_A". I got to know that Amol is no more working for Harman. Please let me know if you need more details about the query. + +Hi Ramesh, Can you provide full path to "source/vision/platform/ti/tda2/apps/configs/MakeConfig" directory you have referred to in your question. Also Abhay is still working with your company so you might want to check with him on this. Regards, Rishabh + +Hi Rishabh, This is the complete directory path were MakeConfig(harman_proto_A_bios) refers to: /opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/configs/harman_proto_A_bios FFC_WORKSPACE is the directory were in we have synced code. + +Hi Ramesh, It seems that you have a different build system. I am not aware of Harman's project and directory structure. Please ask TI FAEs for further help on this. Regards, Rishabh + +Hi Rishabh, On the other hand I have got couple of question regarding porting Linux Application on to Vision SDK framework for which I request you to provide your inputs on it. We have got an Linux application say Sample(which is designed and working for Linux platform) which is not complete POSIX compliant but has got support for most of the POSIX features in it. Namely Pthread, Semphores, Sockets, FileSystem calls File(OPEN …), Directory(MKDIR…) and Link(UNLINK..) operations Basic(CHMOD,UMASK…) file attributes File descriptor(FCNTL..) manipulations Read/Write(READ,WIRTE..) operations Synchronized(SYNC,FSYNC..), Asynchronous(IO_SETUP,IO_DESTROY..) and Multiplexed(SELECT,EPOLL…) I/O Monitoring(INOTIFY_INIT) file events and FIFO(mkfifo..) operations IPC communications(Shared memory). As SYBIOS provides pthread support for A15 core and also NDK(Yet to explore) is built for A15 we were trying to compile/build our Linux application(Sample) for A15 core alone on Vision SDK framework. Are we on the right direction? Do you foresee any issues with it? Recent conversation with TI Engineer states we need to Port Linux on to A15 core? Does it mean porting complete Linux platform on to A15 core and post to which we should start porting our Sample on to A15? As mentioned Linux application Sample has got FileSystem calls in place. Do we have support for FileSystem on SYSBIOS? If So, how could we make use of it or do we need to look for corresponding alternatives in it? And Sample being the server component, there are the other application which communicates to Sample via Sockets or through PIPES or any file based operations. Being Sample built for A15 core, does the other applications which has to communicate to Sample should also be built for A15? Request you to pour in your inputs/thoughts on it. + +Hi Ramesh, This thread is regarding the Vision SDK build issue. TI engineer will get in touch with you early next week to help you on the same. Kindly post questions on any other topic in a new thread. Regards, Rishabh + +Hi Ramesh, Please find your answer below We have got an Linux application say Sample(which is designed and working for Linux platform) which is not complete POSIX compliant but has got support for most of the POSIX features in it. Namely ------> If whatever is Supported by POSIX and FATFS filesystem with linux is Supported for VSDK running linux on A15 also. Are we on the right direction? Do you foresee any issues with it? -----> As of now i can not see any issue. Recent conversation with TI Engineer states we need to Port Linux on to A15 core? Does it mean porting complete Linux platform on to A15 core and post to which we should start porting our Sample on to A15? ------->Please refer to the linux userguide available with VSDK. As mentioned Linux application Sample has got FileSystem calls in place. Do we have support for FileSystem on SYSBIOS? If So, how could we make use of it or do we need to look for corresponding alternatives in it? ------->If A15 runs linux then all the control will be provided to linux only so sysbios will not be controlling filesystem. And Sample being the server component, there are the other application which communicates to Sample via Sockets or through PIPES or any file based operations. Being Sample built for A15 core, does the other applications which has to communicate to Sample should also be built for A15? ----> If the other compnonent uses filesystem calls or socket or anything related to linix then it should be running on A15 only. If you want to run it on other cores then you can use IPC communication but you will not be able to use socket. Regards, Anuj + +Hi Anuj, Thanks alot for your responses. I will refer to linux userguide available with VSDK and will try to compile the sources as suggestion provided under Linux userguide and will get back to you If I face any issues with it. Pradeep + +Hi Anuj, Btw when I try to compile the sources for "tda2px_evm_linux_all" I do face the below mentioned compiler issues? /tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 66: error: excess initializers are ignored "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 86: error: excess initializers are ignored 2 errors detected in the compilation of "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c". >> Compilation failure make[5]: *** [/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/iss_libs/tda2px-evm/ipu2/release/iss_sensor_ar0220.oem4] Error 1 make[5]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss' When I make "ISS_INCLUDE=no" under "tda2px_evm_linux_all\cfg,mk" file compiler errors vanishes but it is resulting in Linker issues. Could you please let me know what could be possible reasons for it. + +Hi Ramesh, Which version SDK are you using? As there is no sessor ar0220. So i can not check that. This type of error comes when you try to initialize an array wrongly. Suppose you have an array of 5 element and you are initializing its 6 elements. Array[5] = {0,1,2,3,4,5}; Please google this error. Regards, Anuj + +Hi Anuj, We don't run linux on A15 core. All the cores including A15 runs on SYSBIOS. So, I will not able to follow the steps suggested under Vision SDK LinuxUser and Development guides. Apologies if it created the confusion.. AS Posix support is only there for A15 core. I had added below changes to links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg file var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; With above changes in place, trying to compile the sources for A15 core alone by specifiyng sources files under "SRCS_a15_0" in SRC_FILES.MK but source files doesn't get compiled. As our organization repo structure is bit different were in we created new config. To replicate the behavior I was trying to compile the sources on A15 core for "tda2px_evm_bios_all" which was not successfull it resulted in below mentioned compiler errors, with which I was not able to confirm is my sources are compiled for A15 or not. "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 66: error: excess initializers are ignored "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c", line 86: error: excess initializers are ignored 2 errors detected in the compilation of "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/ar0220/iss_sensor_ar0220.c". and I am using "PROCESSOR_SDK_VISION_03_03_00_00" version for compiling the sources. Pradeep + +Hi Pradeep, Did you check the excess initializers as mentioned in error messages? Also can you try specifying the file along with path in SRC_FILES.MK. Regards, Rishabh + +Hi Rishabh, Post increasing the array sizes under source/vision/platform/ti/tda2/apps/src/rtos/iss/src/sensor/iss_sensor_serdes.h //#define AR0220_CSI2_DES_CFG_SIZE (8U) //#define AR0220_CSI2_SER_CFG_SIZE (2U) to #define AR0220_CSI2_DES_CFG_SIZE (21U) #define AR0220_CSI2_SER_CFG_SIZE (8U) as per the current logic in iss_sensor_ar0220.c compiler errors been resolved, but the sample source file for A15 is not being compiled. Tried by providing the relative path of source file as SRCS_a15_0 += /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/modules/LibDLT/dlt_user.c in SRC_FILES.MK file, but no luck. I made sure SRC_FILES.MK is being invoked.(cross checked it by adding some invalid statements in .MK file which resulted in Missing separator compiler issues) Pradeep + +Hi Pradeep, Have you included SRCDIR? To see how the source code is built for A15_0 please refer to PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\apps\src\rtos\alg_plugins\safe_framecopy\SRC_FILES.MK. Regards, Rishabh + +Hi Rishabh, I have included SRCDIR under SRC_FILES.MK file. Here is the copy of SRC_FILES.MK file -------------- SRCDIR += $($(MAKEAPPNAME)_PATH)/src/rtos/modules/LibDLT LibDLT_SRCS = \ dlt_user.c #SRCS_ipu1_0 += $(LibDLT_SRCS) #SRCS_a15_0 += $(LibDLT_SRCS) SRCS_a15_0 += /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/modules/LibDLT/dlt_user.c -------------------------- As per suggestion provided complete path of dlt_user.c under SRC_a15_0 to check the behavior. Please note by Enabling SRCS_ipu1_0 alone I could see the source file is getting compiled, but having/enabling "SRCS_a15_0" alone sources doesn't seem to compile. Did I miss any config changes which should have been taken care for A15 compilation. Pradeep + +Hi Pradeep, Have you included A15 in your build configuration? Can you try SRCS_COMMON instead of SRCS_a15_0. Regards, Rishabh + +Hi Rishabh, For Have you included A15 in your build configuration? Do you mean this change "PROC_A15_0_INCLUDE=yes" under configs/tda2px_evm_bios_all/cfg.mk file ? This change was present, let me know if anything else has to be taken care from my end. The sources are getting compiled when I specify it under "SRCS_COMMON". Build the sources for SRCS_COMMON is it building for "SRCS_a15_0"? Pradeep + +Hi Pradeep, Yes "PROC_A15_0_INCLUDE=yes" means A15 is included. Do you see file getting compiled for A15 when specified under SRCS_COMMON? It will be really strange if that is the case. Can you share the full log when you build with file under SRCS_COMMON. Regards, Rishabh + +Hi Rishabh, I could see sources are getting compiled when specifiying it under SRCS_COMMON and with "PROC_A15_0_INCLUDE=yes" along with Other cores under configs/tda2px_evm_bios_all/cfg.mk file. 0486.out.txt PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=yes PROC_IPU2_INCLUDE=no PROC_A15_0_INCLUDE=yes PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=yes PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes I am not confident to answer is it compiled for A15 or not. Here is the logfile which got generated when sources got compiled with SRCS_COMMON with above changes. Please refer to attachment out.txt for complete details.. pradeep@yoctoadm:/opt/vision_sdk/FFC/FFC_WORKSPACE/scripts$ bash build_vision_sdk.sh > out.txt mkdir: cannot create directory ‘/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/include/config’: File exists mkdir: cannot create directory ‘/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/include/config/apps’: File exists mkdir: cannot create directory ‘/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/include/config/apps/tda2px_evm_bios_all’: File exists make[3]: warning: -jN forced in submake: disabling jobserver mode. make[3]: warning: -jN forced in submake: disabling jobserver mode. make[3]: warning: -jN forced in submake: disabling jobserver mode. make[3]: warning: -jN forced in submake: disabling jobserver mode. /opt/vision_sdk/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/build/makerules/rules_ti_cgt_arm.mk:150: target `package/all/cslr_mcan.h' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/build/makerules/rules_66.mk:180: target `package/all/cslr_mcan.h' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/build/makerules/rules_arp32.mk:112: target `package/all/cslr_mcan.h' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/drivers/pdk_01_09_00_17/packages/ti/build/makerules/rules_a15.mk:149: target `package/all/cslr_mcan.h' given more than once in the same rule. make[3]: warning: -jN forced in submake: disabling jobserver mode. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_66.mk:181: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_alg_plugins/tda2px-evm/66/release/GAlignLUT_tda3xx.oe66' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_66.mk:181: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_alg_plugins/tda2px-evm/66/release/GAlignExt_tda3xx.oe66' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_66.mk:181: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_alg_plugins/tda2px-evm/66/release/GAlignLUT_tda3xx.oe66' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_66.mk:181: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_alg_plugins/tda2px-evm/66/release/GAlignExt_tda3xx.oe66' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_m4.mk:172: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_TestUsecase.oem4' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_m4.mk:172: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_TestUsecase_priv.oem4' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_m4.mk:172: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_TestUsecase.oem4' given more than once in the same rule. /opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build/rtos/makerules/rules_m4.mk:172: target `/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_bios_all/obj/app_libs/tda2px-evm/ipu1_0/release/chains_TestUsecase_priv.oem4' given more than once in the same rule. "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_release.cmd", line 7: warning: no matching section "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_release.cmd", line 8: warning: no matching section "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve1/linker_cmd_eve1_release.cmd", line 13: warning: no matching section "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve2/linker_cmd_eve2_release.cmd", line 7: warning: no matching section "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve2/linker_cmd_eve2_release.cmd", line 8: warning: no matching section "/opt/vision_sdk/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/eve2/linker_cmd_eve2_release.cmd", line 13: warning: no matching section pradeep@yoctoadm:/opt/vision_sdk/FFC/FFC_WORKSPACE/scripts$ + +Compiling_Module_file_for_a15.txt diff --git a/apps/MAKEFILE.MK b/apps/MAKEFILE.MK +index f9b9aae..ff87432 100755 +--- a/apps/MAKEFILE.MK ++++ b/apps/MAKEFILE.MK +@@ -7,8 +7,9 @@ APP_LIBS_$(IPU_PRIMARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_PRIMARY_CORE) + APP_LIBS_ipu1_1 = $(DEST_ROOT)/lib/$(PLATFORM)/m4/$(PROFILE_ipu1_1)/app_alg_plugins.aem4 + APP_LIBS_$(IPU_SECONDARY_CORE) = $(DEST_ROOT)/lib/$(PLATFORM)/m4/$(PROFILE_$(IPU_SECONDARY_CORE))/app_alg_plugins.aem4 + ifeq ($(AUTOSAR_APP), yes) +-APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 ++APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_a15_0)/app_libs.aa15fg + endif ++APP_LIBS_a15_0 += $(DEST_ROOT)/lib/$(PLATFORM)/a15/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 + APP_LIBS_c66xdsp_1 = $(DEST_ROOT)/lib/$(PLATFORM)/66/$(PROFILE_c66xdsp_1)/app_alg_plugins.ae66 + APP_LIBS_c66xdsp_2 = $(DEST_ROOT)/lib/$(PLATFORM)/66/$(PROFILE_c66xdsp_2)/app_alg_plugins.ae66 + APP_LIBS_arp32_1 = $(DEST_ROOT)/lib/$(PLATFORM)/arp32/$(PROFILE_arp32_1)/app_alg_plugins.aearp32F +@@ -295,6 +296,14 @@ endif + endif + endif + ++ifeq ($(PROC_A15_0_BUILD_INCLUDE),yes) ++ifeq ($(PROC_A15_0_INCLUDE),yes) ++ifeq ($(A15_TARGET_OS),Bios) ++ $(MAKE) -C $($(MAKEAPPNAME)_PATH) CORE=a15_0 $(TARGET) ++endif ++endif ++endif ++ + apps: + $(MAKE) -fMAKEFILE.MK -C $(vision_sdk_PATH)/links_fw/src/rtos apps + +diff --git a/apps/Makefile b/apps/Makefile +index 033b932..04edb0f 100755 +--- a/apps/Makefile ++++ b/apps/Makefile +@@ -42,6 +42,7 @@ endif + -include $(MODULE_SRC_BASE_PATH)/rtos/common/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/board/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/grpxSrc/SRC_FILES.MK ++-include $(MODULE_SRC_BASE_PATH)/rtos/modules/abc/SRC_FILES.MK + ifeq ($(AUTOSAR_APP), yes) + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/autosar_ipcOut/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/autosar_ipcIn/SRC_FILES.MK + Hi Pradeep, Compiling any file placed inside module folder is currently not supported by SDK but its possible to do that. We just did not done this as all modules runs on IPU cores, so we build all modules only for IPU cores. You mentioned that you are running bios on A15 but your module uses linux calls, so even if you will be able to start compiling your file, you will get compiling error and also in your previous post you asked some queries which i have answered assuming the fact that you run linux on A15. If you are running bios on A15 then all those answer does not hold true. So you have to try with tda2px_evm_linux_all cfg. For compiling any file under modules folder for a15 core please apply the attached patch NOTE: This patch is done w.r.t the latest SDK and the module name is "abc" Regards, Anuj + +Hi Pradeep, Yes the file is getting compiled for A15_0 in this case. Can you share log in case when you have specified it under SRCS_a15_0. Regards, Rishabh + +Hi Pradeep, Please ignore my previous reply. I missed your reply where you have mentioned the actual file name. I thought you are trying to compile sample file as given in the original question. Kindly follow instructions given by Anuj. Regards, Rishabh + +Hi Anuj, With the help of the patch we could compile the sources for A15 core both in module as well as in usecase. The MAKEFILE.MK file what we have at our end doesn't contain anything related to "AUTOSAR_APP". So, I haven't included those changes. ifeq ($(AUTOSAR_APP), yes) -APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 +APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_a15_0)/app_libs.aa15fg endif For your reference we are using below version of SDK "PROCESSOR_SDK_VISION_03_03_00_00" You mentioned that you are running bios on A15 but your module uses linux calls...... Yeah, but can't we not overcome those compiler errors ?redefinition errors being ---------------------- /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/posix/mqueue.h:63:0: error: "O_CREAT" redefined [-Werror] #define O_CREAT 0x200 /* TODO: sys/fcntl.h? */^ In file included from /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/sys/fcntl.h:4:0, from /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/fcntl.h:1, from /opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps/src/rtos/modules/LibDLT/dlt_user.c:43: /opt/V_SDK/FFC/FFC_WORKSPACE/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/include/sys/_default_fcntl.h:37:0: note: this is the location of the previous definition #define O_CREAT _FCREAT ^ ----------------------------- If you are running bios on A15 then all those answer does not hold true.... Yeah, I understand the answer doesn't hold true if either SYSBIOS runs of A15. Having it in mind I would like re-iterate the set of queries to proceed further. As Pthread support is available for A15, building pthread application for SYSBIOS would still be possible? As mentioned our application had got sockets and FILESystem calls in place, Do we have support for FileSystem and sockets on SYSBIOS? If So, how could we make use of it or do we need to look for corresponding alternatives in it? And having said Sample being the server component, there are the other applications which communicates to Sample via Sockets or through PIPES or any file based operations. Being Sample built for A15 core, does the other applications which has to communicate to Sample should also be built for A15?or IPC(shared memory) mechanism suggested still holds good for communication? So you have to try with tda2px_evm_linux_all cfg.... Could please elaborate on it, what excatly should be considered from tda2px_evm_linux_all cfg.file reason being tda2px_evm_linux_all cfg.file had got A15_TARGET_OS to Linux. Pradeep + +Hi Pradeep, Can you specify what exactly you are trying to do? Regards, Rishabh + +Hi Rishabh, To be more specific we are trying to port DLT_DAEMON(which is a logging framework) were in other components/applications use dlt interfaces to log the data to DLT-DAEMON via pipes or shared memory, and DLT-Daemon would route the data to client which runs on host machine using sockets. so, in order to acheive that we are trying to port DLT to SYSBIOS using vision SDK. Pradeep + +Hi Pradeep, SYSBIOS is not compliant to DLT or POSIX/PThread framework. There will be multiple queries that you will have while doing the above. I will suggest you to post specific queries in a new thread, one or two queries at a time while you are building the application. You can close this thread as the build issue for A15 has been resolved. Regards, Rishabh + +Hi Rishabh, I totally agree with you. I can close this thread as A15 build issues been resolved. The reason to post all my queries on the same thread being as you and Anuj are completely aware of my problem statement. Want to avoid confusion to other TI engineers by posting it on other thread. I will be creating the other thread for compiler issues listed above along with queries asked by me related to porting. Pradeep + +Hi Pradeep, Kindly mark the posts that helped in resolving you issue as "This resolved my issue" and close the thread. Regards, Rishabh + +With the provided patch we could able to compile the sources for A15. + diff --git a/data2/text/range/25001-30000/846370.txt b/data2/text/range/25001-30000/846370.txt new file mode 100644 index 0000000000000000000000000000000000000000..e417daaad4d644612696af8330e63c680f0a1b1f --- /dev/null +++ b/data2/text/range/25001-30000/846370.txt @@ -0,0 +1,122 @@ +Ticket Name: TDA2SX: Audio clock need to generate from BCLK + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi All I am Working on TDA2XX custom board. I am facing issue with audio clock generation with help of BCLK. my requirement is "I2S run on 48KHz sample rate stereo 24bits format, that is BCLK should be 3.072MHz" I am using below devicetree to generate the clock sound0: sound0 { compatible = "simple-audio-card"; status = "okay"; simple-audio-card,name = "CS48L32"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In"; /* simple-audio-card,routing = "ASP TX1 Source", "ASPTX1", "ASP TX3 Source", "ASPTX3", "ASPRX1", "VPMON ADC", "ASPRX1", "VBSTMON ADC", "AMP Playback", "ASPRX1", "Main AMP", "SPK", "CLASS H", "PCM Source"; */ simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&sound0_master>; simple-audio-card,frame-master = <&sound0_master>; simple-audio-card,mclk-fs = <256>; sound0_master: simple-audio-card,cpu { sound-dai = <&mcasp2>; system-clock-frequency = <3072000>; }; simple-audio-card,codec { sound-dai = <&cs35l41_l> }; }; But, audio is not working and with help fo aplay -vvv .wav file,it's playing very fast. Can you please help me,where i am wrong ? Thanks & Regards, Sankar. + +Responses: +Sankar, Could you please also share your current ATL and McASP2 dts nodes? The clock fed into McASP is routed from DPLL_ABE through ATL, so appropriate clocks rates should be set there as well. Do you happen to know the exact BCLK rate you're generating with your current configuration (i.e. probed with an oscilloscope)? + +Hi, Thanks for your quick reply. 1. Please look into below ATL and MCASP2 dts nodes. &atl { /* assigned-clocks = <&abe_dpll_sys_clk_mux>, <&atl_gfclk_mux>, <&dpll_abe_ck>, <&dpll_abe_m2x2_ck>, <&atl_clkin1_ck>, <&atl_clkin2_ck>; assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <11289600>, <11289600>; */ status = "okay"; atl2 { bws = ; aws = ; }; }; &mcasp2 { #sound-dai-cells = <0>; /* assigned-clocks = <&mcasp1_ahclkx_mux>; assigned-clock-parents = <&atl_clkin2_ck>; */ status = "okay"; op-mode = <0>; tdm-slots = <2>; serial-dir = < 1 2 0 0 >; tx-num-evt = <32>; rx-num-evt = <32>; }; In my schematic,I am not using XREF_CLKn and mcasp2_ahclkx for generating the clock. I am using ASP lines are MCASP2_AXR1,MCASP2_AXR0,MCASP2_FSX,MCASP2_ACLKX. 2.With current configuration I am getting BCLK is 20 MHz. Thanks & Regards, Sankar. + +Sankar, The BCLK generated by McASP can be derived from an internal or external AHCLK. Here internal and external is from McASP peripheral point of view, not SoC point of view. The internal source of AHCLK comes from MCASP2_AUX_GFCLK (which can in turn be sourced from DPLL_ABE, HDMI_CLK or VIDEO1_CLK). The external source of AHCLK comes from PRCM MCASP2_AHCLKX (which can be derived from multiple sources, please refer to "CM_CORE_AON_MCASP2 Clock Manager Overview" in TRM for possible sources). I'd suggest that you try sourcing AHCLK from MCASP2_AHCLKX. First, you'd need to set the DPLL_ABE to a frequency appropriate for 48kHz audio, i.e. 122.88MHz and configure ATL clock rate to an intermediate frequency that McASP can internally divide further down. &atl { + assigned-clocks = <&abe_dpll_sys_clk_mux>, + <&atl_gfclk_mux>, + <&dpll_abe_ck>, + <&dpll_abe_m2x2_ck>, + <&atl_clkin1_ck>; + assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; + assigned-clock-rates = <0>, <0>, <122880000>, <245760000>, + <12288000>; + + status = "okay"; + + atl2 { + bws = ; + aws = ; + }; +}; &mcasp2 { + #sound-dai-cells = <0>; + assigned-clocks = <&mcasp2_ahclkx_mux>; + assigned-clock-parents = <&atl_clkin1_ck>; + + status = "okay"; + + op-mode = <0>; + tdm-slots = <2>; + + serial-dir = < + 1 2 0 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; sound0: sound0 { + ... + sound0_master: simple-audio-card,cpu { + sound-dai = <&mcasp2>; + system-clock-frequency = <12288000>; + }; + ... + }; Basically, DPLL_ABE (122.88MHz) -> ATL (12.288MHz) -> McASP_AHCLK (12.288MHz) -> McASP_ACLK (3.072MHz). Above doesn't imply/require that MCASP2_AHCLKX has to be routed outside TDA2 SoC. Hope this helps. + +Hi, Now i modified dts file below. &atl { assigned-clocks = <&abe_dpll_sys_clk_mux>, <&atl_gfclk_mux>, <&dpll_abe_ck>, <&dpll_abe_m2x2_ck>, <&atl_clkin1_ck>; assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; assigned-clock-rates = <0>, <0>, <122880000>, <245760000>, <12288000>; status = "okay"; atl2 { bws = ; aws = ; }; }; &mcasp2 { #sound-dai-cells = <0>; assigned-clocks = <&mcasp2_ahclkx_mux>; assigned-clock-parents = <&atl_clkin1_ck>; status = "okay"; op-mode = <0>; tdm-slots = <2>; serial-dir = < 1 2 0 0 >; tx-num-evt = <32>; rx-num-evt = <32>; }; sound0: sound0 { compatible = "simple-audio-card"; status = "okay"; simple-audio-card,name = "CS48L32"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In"; /* simple-audio-card,routing = "ASP TX1 Source", "ASPTX1", "ASP TX3 Source", "ASPTX3", "ASPRX1", "VPMON ADC", "ASPRX1", "VBSTMON ADC", "AMP Playback", "ASPRX1", "Main AMP", "SPK", "CLASS H", "PCM Source"; */ simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&sound0_master>; simple-audio-card,frame-master = <&sound0_master>; /*simple-audio-card,bitclock-inversion; */ simple-audio-card,mclk-fs = <256>; sound0_master: simple-audio-card,cpu { sound-dai = <&mcasp2>; system-clock-frequency = <12288000>; }; simple-audio-card,codec { sound-dai = <&cs35l41_l>; /* clocks = <&atl_clkin0_ck>; */ }; }; But,still no sound and its playing fast and while playing its shows "davinci-mcasp 48464000.mcasp: Too fast reference clock (12288000) and dra7-atl 4843c000.atl: atl1 has not been configured " "I'd suggest that you try sourcing AHCLK from MCASP2_AHCLKX." But in my codec doesn't have option to connect MCASP2_AHCLKX,only option is clock generate from MCASP2_ACLKX or MCASP2_ACLKR. Please help me to solve this issue. Thanks & Regards, Sankar. + +Sankar, "atl1 has not been configured" is due to missing atl1 configuration (rename "atl2" -> "atl1"): atl1 { + bws = ; + aws = ; +}; "Too fast reference clock (12288000)" happens when McASP driver wasn't able to find a clock divider suitable for the sysclk_freq = 12.288MHz and the BCLK freq. Here the assumption is that you're requesting a BCLK of 3.072MHz, which would require a McASP clock divider of 4. This should be fine. I believe the BCLK you're requesting isn't 3.072MHz. This BCLK is determined by the audio parameters you're passing (i.e. channel count, sampling rate, sample size). Could you please share those parameters and the instruction(s) you're using to play/record audio? Re "But in my codec doesn't have option to connect MCASP2_AHCLKX" - this would be internal to TDA2. + +Hi, Here audio parameter information. aplay /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv Plug PCM: Linear conversion PCM (S16_LE) Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S24_3LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 24 buffer_size : 24000 period_size : 6000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 6000 period_event : 0 start_threshold : 24000 stop_threshold : 24000 silence_threshold: 0 silence_size : 0 boundary : 1572864000 Passing "simple-audio-card,mclk-fs = <256>;" from devicetree,song playing fast(sound not coming but I am checking logs by giving -vvv) and I probed BCLK using oscilloscope BLCK is 121 MHz With out Passing "simple-audio-card,mclk-fs = <256>;" from devicetree,song playing normal(sound not coming but I am checking logs by giving -vvv) and I probed BCLK using oscilloscope BLCK is 30.1 MHz But I need BCLK is 3.072 MHz,please help me where I am setting wrong clock. Note : while playing 48KHz audio I am not getting Too fast reference clock (12288000),if I play 8KHz audio I am getting Too fast reference clock issue Thanks, Sankar. + +Hi, I probed FCLK,its coming proper 48KHz But BCLK is 30.1MHz,its multiplying 10KHz with required BCLK(3.072MHz),can you please help me where we are wrong? My project time lines are very near to the dead line. Thanks & Regards, Sankar + +Hi, I probed FCLK,its coming proper 48KHz Sorry,I probed wrong pin,now i probed MCASP2_AHCLKX pin its giving BCLK is 1.53MHz But I need BCLK is 3.072MHz,can you please help how to get 3.072MHz clock? My project time lines are very near to the dead line. Thanks & Regards, Sankar + +I think you get BCLK=1.53MHz because natively McASP is playing at 16-bits/sample. That is, 48000 Hz x 2-channels x 16-bits/sample = 1.536MHz. From an earlier post you said: aplay /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv + +Plug PCM: Linear conversion PCM (S16_LE) +... Please try: aplay -Dhw:0,0 sample.wav. Replace 0,0 with your card and PCM device numbers if needed. Using 'hw' makes sure that no SRC in ALSA takes place. Otherwise, an ALSA plugin would be doing the conversion from the 24-bit of you sample to 16-bit, and McASP would render at 16-bit/sample. + +Hi, Thanks for your speed reply. Passing Dh:w0,0 I am getting below error. alpay- Dh:w0,0 /home/Lsat_Energy_For_The_Day.wav Paying WAVE '/home/Last_Energy_For_The_Day.wav' : Foat 32 bit Lttle Endian, Rate 44100 Hz, Mono aplay: set_params:1299: Sample format non available Available formats: - S16_LE But S24_LE also shows BCLK is 1.53 MHz As per above formula 44100Hz x 2-channels x 24-bits/sample = 2.11 MHz I am not understand this,please help me. aplay /home/Last_Energy_For_The_Day.wav -vvv Playing WAVE '/home/Last_Energy_For_The_Day.wav' : Float 32 bit Little Endian, Rate 44100 Hz, Plug PCM: Linear Integer <-> Linear Float conversion PCM (S24_LE) Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : FLOAT_LE subformat : STD channels : 1 rate : 44100 exact rate : 44100 (44100/1) msbits : 32 buffer_size : 22050 period_size : 5512 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 5512 period_event : 0 start_threshold : 22050 stop_threshold : 22050 silence_threshold: 0 silence_size : 0 boundary : 1445068800 Slave: Rate conversion PCM (32000, sformat=S24_LE) Converter: linear-interpolation Protocol version: 10002 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S24_LE subformat : STD channels : 1 rate : 44100 exact rate : 44100 (44100/1) msbits : 32 buffer_size : 22050 period_size : 5512 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 5512 period_event : 0 start_threshold : 22050 stop_threshold : 22050 silence_threshold: 0 silence_size : 0 boundary : 1445068800 Slave: Route conversion PCM (sformat=S24_LE) Transformation table: 0 <- 0 1 <- 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S24_LE subformat : STD channels : 1 rate : 32000 exact rate : 32000 (32000/1) msbits : 32 buffer_size : 16000 period_size : 4000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 4000 period_event : 0 start_threshold : 16000 stop_threshold : 16000 silence_threshold: 0 silence_size : 0 boundary : 2097152000 Thanks & Regards, Sankar. + +Hi, I cross checked with same wav file with TDA2XX-EVM and my custom board. Result is here, TDA2XX-EVM board output: root@dra7xx-evm:/opt/vision_sdk# aplay -vvv /home/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav Playing WAVE '/home/WAV/PCM 24 bit/pcm stereo 24 bit 48kHz.wav' : Signed 24 bit Little Endian in 3bytes, Rate 48000 Hz, Stereo Plug PCM: Rate conversion PCM (44100, sformat=S32_LE) Converter: linear-interpolation Protocol version: 10002 Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S24_3LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 24 buffer_size : 17832 period_size : 4458 period_time : 92879 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 4458 period_event : 0 start_threshold : 17832 stop_threshold : 17832 silence_threshold: 0 silence_size : 0 boundary : 1168637952 Slave: Hardware PCM card 0 'DRA7xx-EVM' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S32_LE subformat : STD channels : 2 rate : 44100 exact rate : 44100 (44100/1) msbits : 32 buffer_size : 16384 period_size : 4096 period_time : 92879 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 4096 period_event : 0 start_threshold : 16384 stop_threshold : 16384 silence_threshold: 0 silence_size : 0 boundary : 1073741824 appl_ptr : 0 hw_ptr : 0 My custom board Output: aplay -f S32_LE /home/sourceCode/WAV/PCM\ 24\ bit/pcm\ stereo\ 24\ bit\ 48kHz.wav -vvv Warning: format is changed to S24_3LE Playing WAVE '/home/sourceCode/WAV/PCM 24 bit/pcm stereo 24 bit 48kHz.wav' Signed 24 bit Little Endian in 3bytes, Rate 48000 Hz, Stereo Plug PCM: Linear conversion PCM (S16_LE) Its setup is: stream : PLAYBACK access : RW_INTERLEAVED format : S24_3LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 24 buffer_size : 24000 period_size : 6000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 6000 period_event : 0 start_threshold : 24000 stop_threshold : 24000 silence_threshold: 0 silence_size : 0 boundary : 1572864000 Slave: Hardware PCM card 0 'CS48L32' device 0 subdevice 0 Its setup is: stream : PLAYBACK access : MMAP_INTERLEAVED format : S16_LE subformat : STD channels : 2 rate : 48000 exact rate : 48000 (48000/1) msbits : 16 buffer_size : 24000 period_size : 6000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 6000 period_event : 0 start_threshold : 24000 stop_threshold : 24000 silence_threshold: 0 silence_size : 0 boundary : 1572864000 appl_ptr : 0 hw_ptr : 0 In TDA2XX-EVM BCLK is 2.82MHz and FCLK is 44.1 KHz but,My custom board BCLK is 1.53MHz and FCLK is 48KHz Can you please tell me,why BLCK and FCLK vary for TDA2XX and my Custom board,but .wav file is same. Thanks & Regards, Sankar. + +Sankar, Please notice that ALSA's converter is producing outputs with different parameters in both cases: TDA2XX EVM: wav file = 24-bits/sample, 48kHz, stereo -> ALSA plugin -> 32-bits/sample, 44.1kHz, stereo BCLK = 32 x 44100 x 2 = 2.8224MHz Custom board: wav file = 24-bits/sample -> ALSA plugin -> 16-bits/sample, 48kHz, stereo BCLK = 16 x 48000 x 2 = 1.536MHz The parameters that the kernel will receive are shown in aplay command output: Slave: Hardware PCM card 0 'CS48L32' device 0 subdevice 0 +Its setup is: + stream : PLAYBACK + access : MMAP_INTERLEAVED + format : S16_LE + subformat : STD + channels : 2 + rate : 48000 Regarding 24-bits support in your setup. Below logs seem to indicate that your CSL48L32 codec/driver may only support 16-bits. alpay- Dh:w0,0 /home/Lsat_Energy_For_The_Day.wav +Paying WAVE '/home/Last_Energy_For_The_Day.wav' : Foat 32 bit Lttle Endian, Rate 44100 Hz, Mono +aplay: set_params:1299: Sample format non available +Available formats: +- S16_LE Keep in mind that when you are passing -Dhw:0,0, you won't be getting any conversion in userspace, so the parameters of your sample file will be passed to the kernel. In above case, you should have passed a sample file that has 32-bits/sample, 44.1kHz, mono audio. It should have been a sample file with the parameters your hardware natively supports. + +Hi, Thanks for speed reply. I am new in audio subsystem. Can you please give clarifications of below things. I am playing same song in TDA2XX EVM and my Custom board.but sample rate and formats are not same. Please confirm,who is changing the ALSA piug in its CS48L32 driver or MCASP driver ? "Regarding 24-bits support in your setup. Below logs seem to indicate that your CSL48L32 codec/driver may only support 16-bits" No,CS48L32 will support 32 bit also. Thanks & Regards, Sankar. + +Sankar, ALSA plugin is userspace component. Please take a look here: https://alsa-project.org/wiki/Asoundrc https://alsa.opensrc.org/ALSA_plugins So, any kind of conversion needed (i.e. sampling rate, channel count, rate) is done in userspace and then the converted stream is passed to the kernel. Pay attention to the output of aplay -v, it shows a two sets of parameters, the top one corresponds to the wav file parameters, the bottom one (slave PCM) is the output of conversion and wha'ts being fed into kernel. + +Sankar, Are there any further questions on this topic? Please make sure that you can pass the intended audio parameters to the kernel, also make sure that your audio driver supports it. For a quick test to make sure that your driver supports the intended audio parameters, you can try something like: aplay -Dhw:0,0 -c 2 -r 48000 -fS32_LE /dev/urandom +aplay -Dhw:0,0 -c 2 -r 48000 -fS32_LE /dev/zero Replace sampling rate, channel count and format as needed for the test. If any of the involved drivers (McASP, CS48L32) doesn't support the parameters requested by aplay, it will return an error. + +Hi, Thanks for your inputs. My audio speaker is working file. Now,I am working on MIC part. In MIC codec,I am configuring CS35L41 codec as Master. Please tell me,if I configured codec as a Master,from tda2xx side what I have to send from devicetree for generating the clock. Thanks & Regards, Sankar. + +Sankar, Please make the CS35L41 the "sound0_master" in the sound card node. Also make sure that the McASP AHCLK and AFSX pins are configured as inputs. + +Hi, Thanks for quick reply. I am configured device tree like below for cs35l41 as master. sound0: sound0 { compatible = "simple-audio-card"; status = "okay"; simple-audio-card,name = "CS35L41"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In"; /* simple-audio-card,routing = "ASP TX1 Source", "ASPTX1", "ASP TX3 Source", "ASPTX3", "ASPRX1", "VPMON ADC", "ASPRX1", "VBSTMON ADC", "AMP Playback", "ASPRX1", "Main AMP", "SPK", "CLASS H", "PCM Source"; */ simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <&sound0_master>; simple-audio-card,frame-master = <&sound0_master>; simple-audio-card,cpu { sound-dai = <&mcasp3>; system-clock-frequency = <12288000>; }; sound0_master: simple-audio-card,codec { sound-dai = <&cs48l32>; }; }; I commented ATL in device tree. /* &atl { assigned-clocks = <&abe_dpll_sys_clk_mux>, <&atl_gfclk_mux>, <&dpll_abe_ck>, <&dpll_abe_m2x2_ck>, <&atl_clkin1_ck>; assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; assigned-clock-rates = <0>, <0>, <122880000>, <245760000>, <12288000>; status = "okay"; atl1 { bws = ; aws = ; }; }; */ &mcasp3 { #sound-dai-cells = <0>; /* assigned-clocks = <&mcasp2_ahclkx_mux>; assigned-clock-parents = <&atl_clkin1_ck>; */ status = "okay"; op-mode = <0>; tdm-slots = <2>; serial-dir = < 1 2 0 0 >; tx-num-evt = <32>; rx-num-evt = <32>; }; While recording I am not seen any output in my console,out put like below. root@dra7xx-evm:~# arecord -vvv test.wav [ 49.720539] tacna spi1.0: VDD_D didn't power off when expected Recording WAVE 'test.wav' : Unsigned 8 bit, Rate 8000 Hz, Mono [ 49.728754] [ 49.728754] [ 49.728754] asoc_simple_card_hw_params [ 49.728754] Plug PCM: Route conversion PCM (sformat=S16_LE) Transformation table: 0 <- 0*0.5 + 1*0.5 Its setup is: stream : CAPTURE access : RW_INTERLEAVED format : U8 subformat : STD channels : 1 rate : 8000 exact rate : 8000 (8000/1) msbits : 8 buffer_size : 4000 period_size : 1000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 1000 period_event : 0 start_threshold : 1 stop_threshold : 4000 silence_size : 0 boundary : 2097152000 Slave: Hardware PCM card 0 'CS35L41' device 0 subdevice 0 Its setup is: stream : CAPTURE access : MMAP_INTERLEAVED format : S16_LE subformat : STD channels : 2 rate : 8000 exact rate : 8000 (8000/1) msbits : 16 buffer_size : 4000 period_size : 1000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 1000 period_event : 0 start_threshold : 1 stop_threshold : 4000 silence_threshold: 0 silence_size : 0 boundary : 2097152000 appl_ptr : 0 hw_ptr : 0 I given -vvv,but there is no recording,its stopped there. Can you please confirm,my device tree configuration is correct ? Thanks & Regards, Sankar. + +Hi, sound0_master: simple-audio-card,codec { sound-dai = <&cs48l32>; }; sorry, I have changed to cs35l41 but output is same,there is no recording. sound0_master: simple-audio-card,codec { sound-dai = <&cs35l41>; }; For MCLK I am using external 12 MHz oscillator. Thanks & Regards, Sankar. + +Sankar, Re "there is no recording" - are you getting I/O error from recording app or recorded data is silence? Please check that hw_ptr, appl_ptr are moving in ALSA's procfs entry as described in page 3 in this app note. One gets an I/O error when there is no data flow which can happen if the master device isn't generating required clocks as no new samples would be shifted in by McASP. If you get silence, check that your codec is correctly configured (i.e. gains, switches, recording paths, etc). Also double check your pin mux settings. + +Hi, Please find the pin mux. {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ root@dra7xx-evm:~# arecord -vvv test.wav & [1] 4013 [ 3797.880816] tacna spi1.0: VDD_D didn't power off when expected Recording WAVE 'test.wav' : Unsigned 8 bit, Rate 8000 Hz, Mono [ 3797.888985] [ 3797.888985] [ 3797.888985] asoc_simple_card_hw_params [ 3797.888985] Plug PCM: Route conversion PCM (sformat=S16_LE) Transformation table: 0 <- 0*0.5 + 1*0.5 Its setup is: stream : CAPTURE access : RW_INTERLEAVED format : U8 subformat : STD channels : 1 rate : 8000 exact rate : 8000 (8000/1) msbits : 8 buffer_size : 4000 period_size : 1000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 1000 period_event : 0 start_threshold : 1 stop_threshold : 4000 silence_threshold: 0 silence_size : 0 boundary : 2097152000 Slave: Hardware PCM card 0 'CS35L41' device 0 subdevice 0 Its setup is: stream : CAPTURE access : MMAP_INTERLEAVED format : S16_LE subformat : STD channels : 2 rate : 8000 exact rate : 8000 (8000/1) msbits : 16 buffer_size : 4000 period_size : 1000 period_time : 125000 tstamp_mode : NONE tstamp_type : MONOTONIC period_step : 1 avail_min : 1000 period_event : 0 start_threshold : 1 stop_threshold : 4000 silence_threshold: 0 silence_size : 0 boundary : 2097152000 appl_ptr : 0 hw_ptr : 0 root@dra7xx-evm:~# cat /proc/asound/card0/pcm0p/sub0/status closed I am not able to read appl_ptr and hw_ptr values,because status is closed. Can you please confirm,device tree changes is okay for CS35L41 ? Thanks & Regards, Sankar. + +AFAICT, yes, the devicetree changes look good. I'm not familiar with CSL35L41 so won't be able to comment on the specifics of it. It doesn't make sense that you can't read "status" procfs entry. It must be read while arecord is in progress. Make sure that an error isn't returned by the sound card which may cause arecord to stop abruptly. Even if you hadn't clocks, it would take 10 secs to timeout and return an I/O error. + +Sankar, Any luck with the audio record path? Were you able to resolve this issue? + +Hi, Yes,MIC is working fine. Now I need to add (Speaker and MIC) both in same device tree. I adding both the codec's like below. sound0: sound0 { compatible = "simple-audio-card"; status = "okay"; simple-audio-card,name = "CS35L41"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In" simple-audio-card,dai-link@0 { format = "i2s"; bitclock-master = <&sound0_0_master>; frame-master = <&sound0_0_master>; cpu { sound-dai = <&mcasp3 0>; system-clock-frequency = <12288000>; }; sound0_0_master: codec { sound-dai = <&cs48l32 0>; }; }; simple-audio-card,dai-link@1 { format = "i2s"; bitclock-master = <&sound0_1_master>; frame-master = <&sound0_1_master>; sound0_1_master: cpu { sound-dai = <&mcasp2 1>; system-clock-frequency = <12288000>; }; codec { sound-dai = <&cs35l41_l 1>; system-clock-frequency = <1536000>; }; }; }; But,there is no sound cards are registered. aplay -l aplay: device_list:268: no soundcards found... Could you please help me,how to add two codecs in device tree. Thanks & Regards, Sankar. + +Sankar, Try changing "sound-dai = <&mcasp3 0>;" to "sound-dai = <&mcasp3>;", "sound-dai = <&cs48l32 0>;" to "sound-dai = <&cs48l32>;". Likewise for McASP and codec in the second port. + +Hi, I tried but result is same + +Hi, Could you please help me solve this issue. Thanks & Regards, Sankar. + +Sankar, please provide the relevant dts files and boot logs. Also make sure that the simple card in your kernel version does support multiple DAI links. + +Sankar, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). + +Hi, Thanks for your suppot,please close this issue Thanks & Regards, Sankar. + diff --git a/data2/text/range/25001-30000/988528.txt b/data2/text/range/25001-30000/988528.txt new file mode 100644 index 0000000000000000000000000000000000000000..aacf377328d927080a9a6966229cccc37ab0f98f --- /dev/null +++ b/data2/text/range/25001-30000/988528.txt @@ -0,0 +1,287 @@ +Ticket Name: TDA2PXEVM: Received CAN messages swap ID + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi We are developing a system with TDA2px processor and Vision SDK 3.08. TDA2 IPU1-1 is responsible for receiving CAN messages. We did some changes to CAN driver in system_dcan.c so we can use our custom callback to process received messages: system_dcan.c CanFunc canCall; + +static Void System_dcanRxMsgHandler(dcanMsg_t *rxMsg) +{ + + if (rxMsg->appMsgPrms.dataLength) + { + canCall(rxMsg->msgId,(char*)rxMsg->appMsgPrms.msgData, rxMsg->appMsgPrms.dataLength); + + } +} + +Void System_dcanStart(CanFunc canf) { + canCall = canf; + System_dcanInit(); +} + +/*in configuration .c file we init custom callback*/ +void initFunc() +{ + /*DCAN init*/ + System_dcanStart(CanRx); +} + +/*Custom Callback*/ +void CanRx(UInt32 id, char* data, int len) +{ + Vps_printf("ID: %x; queue get data: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", id, data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]); + ItelmaQueuePut(ItelmaFromIPU11CanQueue, id, len, (uint8_t*)data); +} + We have two IDs: 0x100 and 0x2B0. There is PCAN-View log: 1 11077.569 DT 02B0 Rx 5 10 0E 00 03 00 + 2 11085.616 DT 0100 Rx 8 00 00 01 00 64 19 00 94 + 3 11085.907 DT 02B0 Rx 5 10 0E 00 03 00 + 4 11101.055 DT 02B0 Rx 5 10 0E 00 03 00 + 5 11116.408 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 6 11116.584 DT 0100 Rx 8 00 00 01 00 64 19 10 59 + 7 11116.868 DT 02B0 Rx 5 10 0E 00 03 00 + 8 11131.655 DT 02B0 Rx 5 10 0E 00 03 00 + 9 11147.012 DT 0100 Rx 8 00 00 01 00 64 19 20 13 + 10 11147.270 DT 02B0 Rx 5 10 0E 00 03 00 + 11 11167.198 DT 02B0 Rx 5 10 0E 00 03 00 + 12 11180.228 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 13 11180.788 DT 0100 Rx 8 00 00 01 00 64 19 30 DE + 14 11181.210 DT 02B0 Rx 5 10 0E 00 03 00 + 15 11195.581 DT 02B0 Rx 5 10 0E 00 03 00 + 16 11210.708 DT 0100 Rx 8 00 00 01 00 64 19 40 87 + 17 11211.076 DT 02B0 Rx 5 10 0E 00 03 00 + 18 11230.641 DT 02B0 Rx 5 10 0E 00 03 00 + 19 11241.861 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 20 11242.003 DT 0100 Rx 8 00 00 01 00 64 19 50 4A + 21 11242.441 DT 02B0 Rx 5 10 0E 00 03 00 + 22 11260.299 DT 02B0 Rx 5 10 0E 00 03 00 + 23 11273.488 DT 0100 Rx 8 00 00 01 00 64 19 60 00 + 24 11274.079 DT 02B0 Rx 5 10 0E 00 03 00 + 25 11287.784 DT 02B0 Rx 5 10 0E 00 03 00 + 26 11305.056 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 27 11305.378 DT 0100 Rx 8 00 00 01 00 64 19 70 CD + 28 11305.605 DT 02B0 Rx 5 10 0E 00 03 00 + 29 11324.968 DT 02B0 Rx 5 10 0E 00 03 00 + 30 11335.206 DT 0100 Rx 8 00 00 01 00 64 19 80 B2 + 31 11335.634 DT 02B0 Rx 5 10 0E 00 03 00 + 32 11354.655 DT 02B0 Rx 5 10 0E 00 03 00 + 33 11366.163 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 34 11366.581 DT 0100 Rx 8 00 00 01 00 64 19 90 7F + 35 11366.883 DT 02B0 Rx 5 10 0E 00 03 00 + 36 11382.777 DT 02B0 Rx 5 10 0E 00 03 00 + 37 11397.995 DT 0100 Rx 8 00 00 01 00 64 19 A0 35 + 38 11398.384 DT 02B0 Rx 5 10 0E 00 03 00 + 39 11417.270 DT 02B0 Rx 5 10 0E 00 03 00 + 40 11429.151 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 41 11429.432 DT 0100 Rx 8 00 00 01 00 64 19 B0 F8 + 42 11430.122 DT 02B0 Rx 5 10 0E 00 03 00 + 43 11446.630 DT 02B0 Rx 5 10 0E 00 03 00 + 44 11460.726 DT 0100 Rx 8 00 00 01 00 64 19 C0 A1 + 45 11461.244 DT 02B0 Rx 5 10 0E 00 03 00 + 46 11475.266 DT 02B0 Rx 5 10 0E 00 03 00 + 47 11493.272 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 48 11493.777 DT 0100 Rx 8 00 00 01 00 64 19 D0 6C + 49 11494.024 DT 02B0 Rx 5 10 0E 00 03 00 + 50 11514.524 DT 02B0 Rx 5 10 0E 00 03 00 + 51 11522.679 DT 0100 Rx 8 00 00 01 00 64 19 E0 26 + 52 11522.931 DT 02B0 Rx 5 10 0E 00 03 00 + 53 11542.478 DT 02B0 Rx 5 10 0E 00 03 00 + 54 11553.818 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 55 11554.417 DT 0100 Rx 8 00 00 01 00 64 19 F0 EB + 56 11554.697 DT 02B0 Rx 5 10 0E 00 03 00 + 57 11569.055 DT 02B0 Rx 5 10 0E 00 03 00 + 58 11586.375 DT 0100 Rx 8 00 00 01 00 64 19 00 94 + 59 11586.561 DT 02B0 Rx 5 10 0E 00 03 00 + 60 11600.179 DT 02B0 Rx 5 10 0E 00 03 00 + 61 11617.278 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 62 11617.490 DT 0100 Rx 8 00 00 01 00 64 19 10 59 + 63 11617.698 DT 02B0 Rx 5 10 0E 00 03 00 + 64 11633.420 DT 02B0 Rx 5 10 0E 00 03 00 + 65 11648.123 DT 0100 Rx 8 00 00 01 00 64 19 20 13 + 66 11648.471 DT 02B0 Rx 5 10 0E 00 03 00 + 67 11663.786 DT 02B0 Rx 5 10 0E 00 03 00 + 68 11680.024 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 69 11680.339 DT 0100 Rx 8 00 00 01 00 64 19 30 DE + 70 11680.798 DT 02B0 Rx 5 10 0E 00 03 00 + 71 11701.572 DT 02B0 Rx 5 10 0E 00 03 00 + 72 11710.960 DT 0100 Rx 8 00 00 01 00 64 19 40 87 + 73 11711.329 DT 02B0 Rx 5 10 0E 00 03 00 + 74 11730.904 DT 02B0 Rx 5 10 0E 00 03 00 + 75 11742.882 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 76 11743.295 DT 0100 Rx 8 00 00 01 00 64 19 50 4A + 77 11743.631 DT 02B0 Rx 5 10 0E 00 03 00 + 78 11756.324 DT 02B0 Rx 5 10 0E 00 03 00 + 79 11774.863 DT 0100 Rx 8 00 00 01 00 64 19 60 00 + 80 11775.243 DT 02B0 Rx 5 10 0E 00 03 00 + 81 11794.523 DT 02B0 Rx 5 10 0E 00 03 00 + 82 11803.564 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 83 11804.128 DT 0100 Rx 8 00 00 01 00 64 19 70 CD + 84 11804.491 DT 02B0 Rx 5 10 0E 00 03 00 + 85 11821.204 DT 02B0 Rx 5 10 0E 00 03 00 + 86 11838.586 DT 0100 Rx 8 00 00 01 00 64 19 80 B2 + 87 11838.723 DT 02B0 Rx 5 10 0E 00 03 00 + 88 11852.189 DT 02B0 Rx 5 10 0E 00 03 00 + 89 11866.303 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 90 11866.544 DT 0100 Rx 8 00 00 01 00 64 19 90 7F + 91 11866.826 DT 02B0 Rx 5 10 0E 00 03 00 + 92 11882.040 DT 02B0 Rx 5 10 0E 00 03 00 + 93 11898.120 DT 0100 Rx 8 00 00 01 00 64 19 A0 35 + 94 11898.665 DT 02B0 Rx 5 10 0E 00 03 00 + 95 11912.991 DT 02B0 Rx 5 10 0E 00 03 00 + 96 11930.639 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 97 11930.845 DT 0100 Rx 8 00 00 01 00 64 19 B0 F8 + 98 11931.174 DT 02B0 Rx 5 10 0E 00 03 00 + 99 11944.452 DT 02B0 Rx 5 10 0E 00 03 00 + 100 11962.281 DT 0100 Rx 8 00 00 01 00 64 19 C0 A1 + 101 11962.797 DT 02B0 Rx 5 10 0E 00 03 00 + 102 11976.370 DT 02B0 Rx 5 10 0E 00 03 00 + 103 11991.554 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 104 11992.053 DT 0100 Rx 8 00 00 01 00 64 19 D0 6C + 105 11992.378 DT 02B0 Rx 5 10 0E 00 03 00 + 106 12007.342 DT 02B0 Rx 5 10 0E 00 03 00 + 107 12026.202 DT 0100 Rx 8 00 00 01 00 64 19 E0 26 + 108 12026.499 DT 02B0 Rx 5 10 0E 00 03 00 + 109 12038.768 DT 02B0 Rx 5 10 0E 00 03 00 + 110 12054.335 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 111 12054.605 DT 0100 Rx 8 00 00 01 00 64 19 F0 EB + 112 12054.823 DT 02B0 Rx 5 10 0E 00 03 00 + 113 12073.876 DT 02B0 Rx 5 10 0E 00 03 00 + 114 12086.863 DT 0100 Rx 8 00 00 01 00 64 19 00 94 + 115 12087.302 DT 02B0 Rx 5 10 0E 00 03 00 + 116 12101.409 DT 02B0 Rx 5 10 0E 00 03 00 + 117 12115.641 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 118 12116.064 DT 0100 Rx 8 00 00 01 00 64 19 10 59 + 119 12116.357 DT 02B0 Rx 5 10 0E 00 03 00 + 120 12132.017 DT 02B0 Rx 5 10 0E 00 03 00 + 121 12150.550 DT 0100 Rx 8 00 00 01 00 64 19 20 13 + 122 12150.853 DT 02B0 Rx 5 10 0E 00 03 00 + 123 12167.877 DT 02B0 Rx 5 10 0E 00 03 00 + 124 12178.429 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 125 12178.881 DT 0100 Rx 8 00 00 01 00 64 19 30 DE + 126 12179.411 DT 02B0 Rx 5 10 0E 00 03 00 + 127 12194.654 DT 02B0 Rx 5 10 0E 00 03 00 + 128 12211.630 DT 0100 Rx 8 00 00 01 00 64 19 40 87 + 129 12212.011 DT 02B0 Rx 5 10 0E 00 03 00 + 130 12225.429 DT 02B0 Rx 5 10 0E 00 03 00 + 131 12240.311 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 132 12241.571 DT 0100 Rx 8 00 00 01 00 64 19 50 4A + 133 12241.745 DT 02B0 Rx 5 10 0E 00 03 00 + 134 12257.517 DT 02B0 Rx 5 10 0E 00 03 00 + 135 12273.486 DT 0100 Rx 8 00 00 01 00 64 19 60 00 + 136 12273.921 DT 02B0 Rx 5 10 0E 00 03 00 + 137 12288.339 DT 02B0 Rx 5 10 0E 00 03 00 + 138 12303.300 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 139 12303.614 DT 0100 Rx 8 00 00 01 00 64 19 70 CD + 140 12303.844 DT 02B0 Rx 5 10 0E 00 03 00 + 141 12319.030 DT 02B0 Rx 5 10 0E 00 03 00 + 142 12338.002 DT 0100 Rx 8 00 00 01 00 64 19 80 B2 + 143 12338.338 DT 02B0 Rx 5 10 0E 00 03 00 + 144 12354.495 DT 02B0 Rx 5 10 0E 00 03 00 + 145 12366.287 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 146 12366.585 DT 0100 Rx 8 00 00 01 00 64 19 90 7F + 147 12366.893 DT 02B0 Rx 5 10 0E 00 03 00 + 148 12381.836 DT 02B0 Rx 5 10 0E 00 03 00 + 149 12399.902 DT 0100 Rx 8 00 00 01 00 64 19 A0 35 + 150 12400.206 DT 02B0 Rx 5 10 0E 00 03 00 + 151 12412.740 DT 02B0 Rx 5 10 0E 00 03 00 + 152 12431.749 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 153 12432.519 DT 0100 Rx 8 00 00 01 00 64 19 B0 F8 + 154 12433.141 DT 02B0 Rx 5 10 0E 00 03 00 + 155 12446.026 DT 02B0 Rx 5 10 0E 00 03 00 + 156 12460.990 DT 0100 Rx 8 00 00 01 00 64 19 C0 A1 + 157 12461.248 DT 02B0 Rx 5 10 0E 00 03 00 + 158 12481.603 DT 02B0 Rx 5 10 0E 00 03 00 + 159 12492.686 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 160 12492.929 DT 0100 Rx 8 00 00 01 00 64 19 D0 6C + 161 12493.112 DT 02B0 Rx 5 10 0E 00 03 00 + 162 12506.302 DT 02B0 Rx 5 10 0E 00 03 00 + 163 12527.253 DT 0100 Rx 8 00 00 01 00 64 19 E0 26 + 164 12527.752 DT 02B0 Rx 5 10 0E 00 03 00 + 165 12537.499 DT 02B0 Rx 5 10 0E 00 03 00 + 166 12554.602 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 167 12554.937 DT 0100 Rx 8 00 00 01 00 64 19 F0 EB + 168 12555.367 DT 02B0 Rx 5 10 0E 00 03 00 + 169 12574.157 DT 02B0 Rx 5 10 0E 00 03 00 + 170 12585.609 DT 0100 Rx 8 00 00 01 00 64 19 00 94 + 171 12585.830 DT 02B0 Rx 5 10 0E 00 03 00 + 172 12602.067 DT 02B0 Rx 5 10 0E 00 03 00 + 173 12617.224 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 174 12617.616 DT 0100 Rx 8 00 00 01 00 64 19 10 59 + 175 12617.900 DT 02B0 Rx 5 10 0E 00 03 00 + 176 12633.555 DT 02B0 Rx 5 10 0E 00 03 00 + 177 12647.723 DT 0100 Rx 8 00 00 01 00 64 19 20 13 + 178 12648.124 DT 02B0 Rx 5 10 0E 00 03 00 + 179 12667.754 DT 02B0 Rx 5 10 0E 00 03 00 + 180 12680.113 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 181 12680.421 DT 0100 Rx 8 00 00 01 00 64 19 30 DE + 182 12680.615 DT 02B0 Rx 5 10 0E 00 03 00 + 183 12695.412 DT 02B0 Rx 5 10 0E 00 03 00 + 184 12710.744 DT 0100 Rx 8 00 00 01 00 64 19 40 87 + 185 12711.297 DT 02B0 Rx 5 10 0E 00 03 00 + 186 12728.218 DT 02B0 Rx 5 10 0E 00 03 00 + 187 12741.604 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 188 12742.147 DT 0100 Rx 8 00 00 01 00 64 19 50 4A + 189 12742.542 DT 02B0 Rx 5 10 0E 00 03 00 + 190 12763.008 DT 02B0 Rx 5 10 0E 00 03 00 + 191 12773.222 DT 0100 Rx 8 00 00 01 00 64 19 60 00 + 192 12773.554 DT 02B0 Rx 5 10 0E 00 03 00 + 193 12788.808 DT 02B0 Rx 5 10 0E 00 03 00 + 194 12805.557 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 195 12805.678 DT 0100 Rx 8 00 00 01 00 64 19 70 CD + 196 12805.730 DT 02B0 Rx 5 10 0E 00 03 00 + 197 12820.773 DT 02B0 Rx 5 10 0E 00 03 00 + 198 12835.421 DT 0100 Rx 8 00 00 01 00 64 19 80 B2 + 199 12835.711 DT 02B0 Rx 5 10 0E 00 03 00 + 200 12854.184 DT 02B0 Rx 5 10 0E 00 03 00 + 201 12869.254 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 202 12869.908 DT 0100 Rx 8 00 00 01 00 64 19 90 7F + 203 12870.362 DT 02B0 Rx 5 10 0E 00 03 00 + 204 12882.630 DT 02B0 Rx 5 10 0E 00 03 00 + 205 12900.957 DT 0100 Rx 8 00 00 01 00 64 19 A0 35 + 206 12901.294 DT 02B0 Rx 5 10 0E 00 03 00 + 207 12915.359 DT 02B0 Rx 5 10 0E 00 03 00 + 208 12928.689 DT 0362 Rx 8 00 00 01 00 00 00 01 00 + 209 12928.923 DT 0100 Rx 8 00 00 01 00 64 19 B0 F8 + 210 12929.124 DT 02B0 Rx 5 10 0E 00 03 00 + 211 12949.308 DT 02B0 Rx 5 10 0E 00 03 00 And there is Vps_printf() output from Putty log: [IPU1-1] 171.234063 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.248032 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.262642 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x10 0xe2 +[IPU1-1] 171.262947 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.299884 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x20 0xa8 +[IPU1-1] 171.311809 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.326633 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x30 0x65 +[IPU1-1] 171.326938 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.341243 s: ID: 100; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.355761 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x40 0x3c +[IPU1-1] 171.356432 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.373970 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.390105 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x50 0xf1 +[IPU1-1] 171.407857 s: ID: 100; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.420179 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x60 0xbb +[IPU1-1] 171.420667 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.435124 s: ID: 2b0; queue get data: 0x10 0xe 0x0 0x3 0x0 0x0 0x0 0x0 +[IPU1-1] 171.450283 s: ID: 100; queue get data: 0x0 0x0 0x1 0x0 0x14 0x82 0x70 0x76 These are some most significant parts of the logs. I will add entire files. As you can see in Putty log, some of the messages got corrupted. In PCAN we have ID 0x02B0 with data 0x10 0x0E 0x00 0x03 0x00 and ID 0x0100 with data 0x00 0x00 0x01 0x00 0x64 0x19 0x60 0x0, but in the CanRx callback either message IDs or message data swap, and sometimes we have ID 0x0100 with data 0x10 0x0E 0x00 0x03 0x00. This only happens when messages rate is very hight. I belive data get corrupted somewhere in CAN driver before CanRx callback. What can be the possible reason for such behavior? Maybe you can explain me where is the entry point for CAN messages. Best regards, D.K. Tovmachenko. TDA_callback_log.log PCANView_log.txt + +Responses: +Hello? Any suggestions? Maybe something is unclear for you in my question? Regards, D.K. Tovmachenko + +Can you check read error status by calling DCANGetErrStatus() after you receive the message? You may also check the message after DCANGetData() in RX ISR, Utils_dcanRxIsrCb(), to see if you are getting the correct message. If the data is correct in ISR, the issue might be the queue handling part. + +Hello, Stanley. Actually, now I'm facing one more issue along with ID swap, but I believe this issue and issue described above have same roots. There are 3 CAN ID I'm receiving. These messages have different rate from 10 to 60 msc. After a certain time one of ID messages stops to come to my callback.What did I figured out: There is Utils_dcanRxTsk task, and it is blocked until we receive message, process it in ISR and post appropriate event. When I face that issue, Event_pend in Utils_dcanRxTsk never pends on appropriate message. So problem is that in ISR programm do not post that event, it seems Event_post in ISR doest even calls. Right now I dont have an opportunity to debug it using JTAG, so I'm trying to debug by DCANGetErrStatus() as you adviced me. I have a question: if DCANGetErrStatus() returns 0x10, does it means that ISR processed CAN message, or it just means that DCAN got that message ? Because after I send message to CAN DCANGetErrStatus() return 0x10, but Event_post doesnt call. Also there is UTILS_assert macro, but if I call UTILS_assert(FALSE) there is no any printfs in UART, does it even work? I'm trying to use it for debugging. static void Utils_dcanRxIsrCb(dcanRxMsgObj_t *dcanRxMsgObj, UInt32 mbxId, UInt32 rxMbxIndex) { dcanMsg_t *rxMsg = NULL; struct dcanQueMsgs_s * queMsg = NULL; Int32 retVal; /* Get free can rx msg */ Utils_dcanQueGet(&dcanRxMsgObj->freeQ.handle, &queMsg, &rxMsg, DCAN_MSG_STATE_IN_FREEQ, DCAN_MSG_STATE_ISR); Utils_dcanResetRxMsg(rxMsg); /* Wait for interface to become free */ Utils_dcanWaitForIfReg(UTILS_DCAN_INST, UTILS_DCAN_RX_IF_REG); /* Get data from CAN mailbox */ retVal = DCANGetData(UTILS_DCAN_INST, mbxId, UTILS_DCAN_RX_IF_REG, &rxMsg->appMsgPrms, 0); UTILS_assert(FALSE); // no assert in UART UTILS_assert(((DCANGetErrStatus(UTILS_DCAN_INST) != 0x10) || (DCANGetErrStatus(UTILS_DCAN_INST) != 0x7))); // check for DCAN err status UTILS_assert(retVal == 0); Utils_dcanConfigRxMsgObj(mbxId); /* Copy CAN RX msg to free msg */ rxMsg->msgId = Utils_dcanMapMailboxId2MsgId(mbxId); UTILS_assert(rxMbxIndex < UTILS_ARRAYSIZE(dcanRxMsgObj->rxMsgQ)); /* Put received msg into CAN RX mailbox specific queue */ Utils_dcanQuePut(&dcanRxMsgObj->rxMsgQ[rxMbxIndex].handle, queMsg, DCAN_MSG_STATE_IN_RX_QUE); UTILS_assert(rxMbxIndex < UTILS_ARRAYSIZE(dcanRxMbxId)); Event_post(dcanRxMsgObj->dcanRxEvent, (0x1U << rxMbxIndex)); // doesnt post apropriate event after a certain time } Please make it clear for me. Regards, D.K. Tovmachenko. + +Hi, Stanley. I have an additional question. Is there any safe way to restart DCAN during runtime? I'm trying just reinit it: void resetCAN(void) { Utils_dcanDeInit(); Utils_dcanInit(&dcanConfig); } but it doesnt work. Regards, D.K. Tovmachenko. + +Hi Stanley. I figured out how to fix UTILS_assert(), but questions about DCANGetErrStatus() function and proper way to reset CAN still exist. Regards, D.K. Tovmachenko. + +DCANGetErrStatus() returning 0x10 means the message is received successfully. Regarding restarting CAN driver, we have not tested that. What error did you get from calling your resetCAN()? + +Hi Tovmachenko, If I understood your setup correctly, you setup looks like follow: You have TDA2Px DCAN connected to PCAN and PCAN is sending data to DCAN. Issue 1: When you increase a message rate beyond some limit, you see some corruption happening and this is not just random corruption, you see IDs/payload swapped. You don't see any corruption within payload. Correct? Issue 2: Sometimes you also receive a message with third ID, and this happens only for some time. Right? Can you please confirm above points? Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Hello, Stanley. After calling resetCAN() CAN stops to respond at all. I didnt really tested it yet, but I think entire DCAN get corrupted. About DCANGetErrStatus(), message is received successfully means that it have been sucsessfully written to some memory register, or does it mean that it have been written to some register and get processed by ISR? Regards, D. Tovmachenko. + +Hi Vivek. 1. Yes, but we also have TDA3 and TDA2EVM with the same problem. 2.I have 3 IDs messages which continiously coming from CAN bus to TDA, at any message rate at some moment one or two IDs stops to come, and sometimes these ID data swap, or maybe ID swap between two tipes of messages. Message rate only affects time till problem happens, more hight message frame is, more fast problem will happen. I just fugured out,when IDs stops to come, there is no Utils_dcanRxIsrCb() calling, means ISR stops to execute when messages whith these IDs come. Let me make it clear, I took vsdk308\vision_sdk\apps\src\rtos\modules\dcan\ system_dcan.c and utils_dcan.c example from Vision SDK and modified these files to make TDA receive and send several CAN ID messages. Did you tested your can driver for receiveng several IDs, because there is only one ID to rx and one ID to tx in this example. Also I checked error statuses after CAN IDs stops to come, and DCANGetParityErrStatus() returns 0x13. I count messages with these IDs in ISR like this: static void Utils_dcanRxIsrCb(dcanRxMsgObj_t *dcanRxMsgObj, UInt32 mbxId, UInt32 rxMbxIndex) { dcanMsg_t *rxMsg = NULL; struct dcanQueMsgs_s * queMsg = NULL; Int32 retVal; /* Get free can rx msg */ Utils_dcanQueGet(&dcanRxMsgObj->freeQ.handle, &queMsg, &rxMsg, DCAN_MSG_STATE_IN_FREEQ, DCAN_MSG_STATE_ISR); Utils_dcanResetRxMsg(rxMsg); /*Increment IDs counter*/ if ((rxMsg->appMsgPrms.rxMsgIdentifier) == 1st ID) { speed_id++; } else if ((rxMsg->appMsgPrms.rxMsgIdentifier) == 2nd ID) { angle_id++; } else if ((rxMsg->appMsgPrms.rxMsgIdentifier) == 3rd ID) { corner_id++; } /* Wait for interface to become free */ Utils_dcanWaitForIfReg(UTILS_DCAN_INST, UTILS_DCAN_RX_IF_REG); /* Get data from CAN mailbox */ retVal = DCANGetData(UTILS_DCAN_INST, mbxId, UTILS_DCAN_RX_IF_REG, &rxMsg->appMsgPrms, 0); UTILS_assert(retVal == 0); Utils_dcanConfigRxMsgObj(mbxId); /* Copy CAN RX msg to free msg */ rxMsg->msgId = Utils_dcanMapMailboxId2MsgId(mbxId); UTILS_assert(rxMbxIndex < UTILS_ARRAYSIZE(dcanRxMsgObj->rxMsgQ)); /* Put received msg into CAN RX mailbox specific queue */ Utils_dcanQuePut(&dcanRxMsgObj->rxMsgQ[rxMbxIndex].handle, queMsg, DCAN_MSG_STATE_IN_RX_QUE); UTILS_assert(rxMbxIndex < UTILS_ARRAYSIZE(dcanRxMbxId)); Event_post(dcanRxMsgObj->dcanRxEvent, (0x1U << rxMbxIndex)); } And then I print these counters in separate task. At some moment despite these messages still in CAN bus, these counters stop to increment, means Utils_dcanRxIsrCb() doesnt execute. Regards, D. Tovmachenko + +Hello I have some progress in resolving this issue. I created a crutch, a task which continuously checking DCAN queue for stucked messages. This crutch resolved "certain ID messages stops to come" problem, but this is still a crutch. Here is my crutch code: void CrutchTsk(UArg arg0, UArg arg1) { dcanMsg_t* rxMsg = NULL; struct dcanQueMsgs_s* queMsg = NULL; Int32 retVal; int i = 0; dcanRxMsgObj_t* processObj = dcanIsrContext.rxMsgObj; while (1) { for (i = 1stIDindex; i < 3rdIDindex; ++i) { /*This is the place where I get message from DCAN*/ Utils_dcanQueGet(&processObj->freeQ.handle, &queMsg, &rxMsg, DCAN_MSG_STATE_IN_FREEQ, DCAN_MSG_STATE_ISR); Utils_dcanResetRxMsg(rxMsg); /*Then I check message from queue*/ if ((rxMsg->appMsgPrms.rxMsgIdentifier == ID1) || (rxMsg->appMsgPrms.rxMsgIdentifier == ID2) || (rxMsg->appMsgPrms.rxMsgIdentifier == ID3)) { /*If message is valid, I process it and post appropriate event*/ Utils_dcanWaitForIfReg(UTILS_DCAN_INST, UTILS_DCAN_RX_IF_REG); retVal = DCANGetData(UTILS_DCAN_INST, dcanRxMbxId[i], UTILS_DCAN_RX_IF_REG, &rxMsg->appMsgPrms, 0); Utils_dcanConfigRxMsgObj(dcanRxMbxId[i]); rxMsg->msgId = Utils_dcanMapMailboxId2MsgId(dcanRxMbxId[i]); Utils_dcanQuePut(&processObj->rxMsgQ[i].handle, queMsg, DCAN_MSG_STATE_IN_RX_QUE); Event_post(processObj->dcanRxEvent, (0x1U << i)); // post appropriate event } } BspOsal_sleep(SLEEP_VAL); } } The thing is, if after certain ID get blocked I manually check DCAN queue for messages with that ID , this manual check unblocks messages with that ID, and they start to come again(till they get blocked again). So I created the task which do it continuously. But this is not how DCAN is suppose to work. I also checked DCAN_INTPND12 DCAN1 register, there is no interrupt pending, value is always 0. DCAN_CTL register and DCAN_INT register are also OK (i.e. 0). PCAN-View doesnt register any bus-off condition (means TDA get these messages), so the problem is that in DCAN messages queue messages somehow get stuck. Is there any way to deal with it? Regards. D.K. Tovmachenko + +Hi Eventually we maybe found a way to resolve this issue. Now all CAN messages comes without blocking, and all data is valid, ID don't swap anymore. Apparently, if several CAN messages with different IDs comes with hight frame rate, some registers don't clean in time (or maybe messageboxes), so ISR doesnt execute when next message with this ID comes again. So we desided to check all messageboxes for messages in ISR, regardless of the received message, and if there is a message in messagebox, search appropriate for this ID mailbox and post event with this mailbox index. That way all works great: /*utils_dcan.c*/ /*Function for searching received ID in mailboxes and if found return index of appropriate mailbox*/ static Int32 Utils_dcanMapMsgId2MailboxIdx(UInt32 msgId) { Int i, j; for (i = 0; i < UTILS_ARRAYSIZE(dcanMbx2MsgIdMap); ++i) { if (dcanMbx2MsgIdMap[i].msgId == msgId) { for (j = 0; j < UTILS_ARRAYSIZE(dcanRxMbxId); ++j) { if (dcanRxMbxId[j] == dcanMbx2MsgIdMap[i].mbxId) { return j; } } break; } } return -1; } /*ISR*/ static void Utils_dcanRxIsrCb(dcanRxMsgObj_t *dcanRxMsgObj, UInt32 mbxId, UInt32 rxMbxIndex) { int i, retVal, rxId; dcanMsg_t* rxMsg; struct dcanQueMsgs_s* queMsg; /*dcanRxMbxId is n size array which contains mailboxes IDs, previously mapped with messages IDs*/ for (i = 0; i < UTILS_ARRAYSIZE(dcanRxMbxId); ++i) { /*Check messagebox for messages*/ if (DCANHasRxMsgArrived(UTILS_DCAN_INST, dcanRxMbxId[i])) { Utils_dcanQueGet(&dcanRxMsgObj->freeQ.handle, &queMsg, &rxMsg, DCAN_MSG_STATE_IN_FREEQ, DCAN_MSG_STATE_ISR); Utils_dcanResetRxMsg(rxMsg); Utils_dcanWaitForIfReg(UTILS_DCAN_INST, UTILS_DCAN_RX_IF_REG); retVal = DCANGetData(UTILS_DCAN_INST, dcanRxMbxId[i], UTILS_DCAN_RX_IF_REG, &rxMsg->appMsgPrms, 0); if (retVal == STW_SOK) { /*Check is CAN waiting for standart or extended messages*/ if (rxMsg->appMsgPrms.rxIdType) { rxMsg->msgId = rxMsg->appMsgPrms.rxMsgIdentifier; } else { rxMsg->msgId = (rxMsg->appMsgPrms.rxMsgIdentifier >> DCAN_SHIFT); } Utils_dcanConfigRxMsgObj(dcanRxMbxId[i]); /*Taking mailbox for message ID*/ rxId = Utils_dcanMapMsgId2MailboxIdx(rxMsg->msgId); if (rxId != -1) { Utils_dcanQuePut(&dcanRxMsgObj->rxMsgQ[rxId].handle, queMsg, DCAN_MSG_STATE_IN_RX_QUE); /*Post event appropriate to mailbox ID*/ Event_post(dcanRxMsgObj->dcanRxEvent, (0x1UL << rxId)); } else { /*misra*/ } } else { Utils_dcanConfigRxMsgObj(dcanRxMbxId[i]); Utils_dcanQuePut(&dcanRxMsgObj->freeQ.handle, queMsg, DCAN_MSG_STATE_IN_FREEQ); } } else { /*misra*/ } } } We resolved this issue that way. What do you think about this solution to the problem? Regards, Dmitriy Tovmachenko. + +Hi Dmitriy, Thank you for providing the update. Your fix looks good. Regards, Stanley + diff --git a/data2/text/range/25001-30000/990856.txt b/data2/text/range/25001-30000/990856.txt new file mode 100644 index 0000000000000000000000000000000000000000..82b81f4217267f7e3f6dc126a61ec9b20e14edee --- /dev/null +++ b/data2/text/range/25001-30000/990856.txt @@ -0,0 +1,250 @@ +Ticket Name: TDA2EG-17: usb usb1-port1: Cannot enable. Maybe the USB cable is bad + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: TDA2, , TDA2HG Hello expert sdk: PROCESSOR_SDK_VISION_03_08_00_00 Linux version 4.4.84 We tested several new USB disk, and each USB disk can be stored in the window Read and write on the PC, but there is a type of U disk (3 USB flash disks) that can’t read and write, the read and write will report the log: usb usb1-port1: Cannot enable. Maybe the USB cable is bad? The USB disk cannot be recognized even after re-plugging the USB disk. The linux system must be restarted before the USB flash drive can be recognized. Here is the log: sys.log +[11:24:04:427]<6>[ 1.783743] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[11:24:04:427]<6>[ 1.783773] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[11:24:04:427]<6>[ 1.784077] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[11:24:04:427]<6>[ 1.784128] xhci-hcd xhci-hcd.2.auto: irq 454, io mem 0x48890000 +[11:24:04:427]<6>[ 1.784885] hub 1-0:1.0: USB hub found +[11:24:04:428]<6>[ 1.784924] hub 1-0:1.0: 1 port detected +[11:24:04:428]<6>[ 1.785311] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[11:24:04:436]<6>[ 1.785330] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[11:24:04:436]<6>[ 1.785410] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[11:24:04:436]<6>[ 1.786064] hub 2-0:1.0: USB hub found +[11:24:04:436]<6>[ 1.786100] hub 2-0:1.0: 1 port detected +[11:24:04:437]<6>[ 1.987260] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[11:24:04:437]<6>[ 1.987287] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 3 +[11:24:04:437]<6>[ 1.987560] xhci-hcd xhci-hcd.3.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[11:24:04:437]<6>[ 1.987610] xhci-hcd xhci-hcd.3.auto: irq 455, io mem 0x488d0000 +[11:24:04:437]<6>[ 1.988310] hub 3-0:1.0: USB hub found +[11:24:04:437]<6>[ 1.988346] hub 3-0:1.0: 1 port detected +[11:24:04:437]<6>[ 1.988713] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[11:24:04:437]<6>[ 1.988731] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 4 +[11:24:04:446]<6>[ 1.988809] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. +[11:24:04:446]<6>[ 1.989456] hub 4-0:1.0: USB hub found +[11:24:04:446]<6>[ 1.989492] hub 4-0:1.0: 1 port detected +[11:24:04:446]<5>[ 2.000293] SCSI subsystem initialized +[11:24:04:446]<6>[ 2.011951] usbcore: registered new interface driver usb-storage +[11:24:04:894] +[11:24:05:231]root@dra7xx-evm:~# +[11:24:09:380]root@dra7xx-evm:~# <6>[ 16.243480] usb 1-1: new high-speed USB device number 2 using xhci-hcd +[11:24:09:517]<4>[ 16.393374] usb 1-1: ep 0x81 - rounding interval to 128 microframes, ep desc says 255 microframes +[11:24:09:524]<4>[ 16.393441] usb 1-1: ep 0x2 - rounding interval to 128 microframes, ep desc says 255 microframes +[11:24:09:532]<6>[ 16.401208] usb-storage 1-1:1.0: USB Mass Storage device detected +[11:24:09:542]<6>[ 16.411527] scsi host0: usb-storage 1-1:1.0 +[11:24:10:546]<5>[ 17.415599] scsi 0:0:0:0: Direct-Access Kingston DataTraveler 3.0 PQ: 0 ANSI: 6 +[11:24:10:555]<5>[ 17.417205] sd 0:0:0:0: [sda] 60437492 512-byte logical blocks: (30.9 GB/28.8 GiB) +[11:24:10:555]<5>[ 17.417492] sd 0:0:0:0: [sda] Write Protect is off +[11:24:10:555]<7>[ 17.417506] sd 0:0:0:0: [sda] Mode Sense: 4f 00 00 00 +[11:24:10:564]<5>[ 17.417788] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA +[11:24:10:564]<6>[ 17.421997] sda: sda1 +[11:24:10:564]<5>[ 17.425112] sd 0:0:0:0: [sda] Attached SCSI removable disk +[11:24:12:718] +[11:24:15:771]root@dra7xx-evm:~# mount /dev/mmcblk0 +[11:24:15:780]mmcblk0 mmcblk0boot0 mmcblk0boot1 mmcblk0p1 mmcblk0p2 mmcblk0p3 mmcblk0p4 mmcblk0p5 mmcblk0p6 mmcblk0p7 mmcblk0p8 mmcblk0p9 +[11:24:15:964]root@dra7xx-evm:~# mount /dev/mmcblk0 +[11:24:15:972]mmcblk0 mmcblk0boot0 mmcblk0boot1 mmcblk0p1 mmcblk0p2 mmcblk0p3 mmcblk0p4 mmcblk0p5 mmcblk0p6 mmcblk0p7 mmcblk0p8 mmcblk0p9 +[11:24:20:654]root@dra7xx-evm:~# mount /dev/sda1 /mnt/usb/ +[11:24:20:732]root@dra7xx-evm:~# <4>[ 27.601193] FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[11:24:21:551] +[11:24:32:686]root@dra7xx-evm:~# cp ~/app.tar.gz /mnt/usb/ -rf +[11:24:58:943] +[11:24:59:262] +[11:24:59:582] +[11:24:59:886] +[11:25:00:174] +[11:25:00:446] +[11:25:08:374][ 75.243502] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:08:384]<3>[ 75.243502] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:12:484][ 79.353501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:12:493]<3>[ 79.353501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:16:595][ 83.463501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:16:604]<3>[ 83.463501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:20:704][ 87.573504] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:20:711]<3>[ 87.573504] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:20:719]<6>[ 87.574471] usb 1-1: USB disconnect, device number 2 +[11:25:20:727][ 87.593548] blk_update_request: I/O error, dev sda, sector 73663 +[11:25:20:735][ 87.603531] blk_update_request: I/O error, dev sda, sector 73903 +[11:25:20:744][ 87.613512] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:744][ 87.614311] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:745][ 87.615063] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:745][ 87.615825] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:754][ 87.616564] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:754][ 87.617323] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:754]cp: write error: Input/output error +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:754]root@dra7xx-evm:~# +[11:25:20:755]root@dra7xx-evm:~# <6>[ 87.593521] sd 0:0:0:0: [sda] tag#0 UNKNOWN(0x2003) Result: hostbyte=0x01 driverby[ 87.621626] FAT-fs (sda1): unable to read inode block for updating (i_pos 131076) +[11:25:20:755]te=0x00 +[11:25:20:755]<6>[ 87.593538] sd 0:0:0:0: [sda] tag#0 CDB: opcode=0x2a 2a 00 00 01 1f bf 00 00 f0 00 +[11:25:20:755]<3>[ 87.593548] blk_update_request: I/O error, dev sda, sector 73663 +[11:25:20:755]<5>[ 87.594335] random: nonblocking pool is initialized +[11:25:20:764]<6>[ 87.603505] sd 0:0:0:0: [sda] tag#0 UNKNOWN(0x2003) Result: hostbyte=0x01 driverbyte=0x00 +[11:25:20:764]<6>[ 87.603521] sd 0:0:0:0: [sda] tag#0 CDB: opcode=0x2a 2a 00 00 01 20 af 00 00 f0 00 +[11:25:20:764]<3>[ 87.603531] blk_update_request: I/O error, dev sda, sector 73903 +[11:25:20:764]<3>[ 87.613512] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:764]<3>[ 87.614311] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:764]<3>[ 87.615063] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:765]<3>[ 87.615825] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:765]<3>[ 87.616564] FAT-fs (sda1): FAT read failed (blocknr 823) +[11:25:20:765]<3>[ 87.617323] FAT-fs (sda1): FAT read failed (blocknr 822) +[11:25:20:774]<3>[ 87.621626] FAT-fs (sda1): unable to read inode block for updating (i_pos 131076) +[11:25:20:786][ 87.653419] FAT-fs (sda1): bread failed in fat_clusters_flush +[11:25:20:794]<3>[ 87.653419] FAT-fs (sda1): bread failed in fat_clusters_flush +[11:25:27:273][ 91.893504] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:27:273]<3>[ 91.893504] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:29:134][ 96.003501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:29:144]<3>[ 96.003501] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:33:244][ 100.113506] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:33:254]<3>[ 100.113506] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:37:351][ 104.223498] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:37:358][ 104.224401] usb usb1-port1: unable to enumerate USB device +[11:25:37:366]<3>[ 104.223498] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? +[11:25:37:375]<3>[ 104.224401] usb usb1-port1: unable to enumerate USB device +[11:29:42:367] +[11:31:53:711]root@dra7xx-evm:~# +[11:31:54:046]root@dra7xx-evm:~# +[11:32:11:230]root@dra7xx-evm:~# reboot -f +[11:32:11:246][ 498.096582] reboot: Restarting system +[11:32:11:430] +[11:32:11:430]U-Boot SPL 2016.05-svn21493 (Jan 28 2021 - 11:22:01) +[11:32:11:430]DRA722-GP ES2.1 +[11:32:11:430]Trying to boot from MMC2_2 +[11:32:11:430]no pinctrl for ddr_1_8v +[11:32:11:493]reading u-boot.img +[11:32:11:493]reading u-boot.img +..... +[11:32:12:766][ 0.674094] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[11:32:12:775][ 0.674909] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[11:32:12:775][ 0.675722] omap_hsmmc 480b4000.mmc: no pinctrl state for hs200_1_8v mode +[11:32:12:830][ 0.734385] omap_voltage_late_init: Voltage driver support not added +[11:32:13:050][ 0.954154] Kernel Entry time 16382229 ticks +[11:32:13:406] +[11:32:13:414] _____ _____ _ _ +[11:32:13:414]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +[11:32:13:414]| | _| .'| . | . | | __| _| . | | | -_| _| _| +[11:32:13:414]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| +[11:32:13:414] |___| |___| +[11:32:13:414] +[11:32:13:414]Arago Project http://arago-project.org dra7xx-evm /dev/ttyS0 +[11:32:13:414] +[11:32:13:422]Arago 2016.12 dra7xx-evm /dev/ttyS0 +[11:32:13:422] +[11:32:13:599]dra7xx-evm login: Warning: chip not recognized, running in safe mode (only platform-generic functions allowed). +[11:32:13:599] +[11:32:13:610]/dev/mem opened. +[11:32:13:610]Memory mapped at address 0xb6f42000. +[11:32:13:610]Read at address 0x4A003658 (0xb6f42658): 0x0006000E +[11:32:13:618]Write at address 0x4A003658 (0xb6f42658): 0x0006000E, readback 0x0006000E +[11:32:13:618]./StartApp.sh: line 5: iecho: not found +[11:32:13:618]ash: write error: Operation not permitted +[11:32:13:629]/dev/mem opened. +[11:32:13:629]Memory mapped at address 0xb6fa1000. +[11:32:13:629]Read at address 0x4A0036C8 (0xb6fa16c8): 0x0004000E +[11:32:13:638]Write at address 0x4A0036C8 (0xb6fa16c8): 0x0006000E, readback 0x0006000E +[11:32:13:639]/dev/mem opened. +[11:32:13:639]Memory mapped at address 0xb6f57000. +[11:32:13:639]Read at address 0x4A003670 (0xb6f57670): 0x00040004 +[11:32:13:647]Write at address 0x4A003670 (0xb6f57670): 0x0006000E, readback 0x0006000E +[11:32:13:679]mount: special device /dev/mmcblk1p9 does not exist +[11:32:13:692]mount: special device /dev/mmcblk1p1 does not exist +[11:32:13:717]/dev/mem opened. +[11:32:13:717]Memory mapped at address 0xb6f04000. +[11:32:13:717]Read at address 0x4A003440 (0xb6f04440): 0x00040006 +[11:32:13:726]Write at address 0x4A003440 (0xb6f04440): 0x00040008, readback 0x00040008 +[11:32:13:726]/dev/mem opened. +[11:32:13:726]Memory mapped at address 0xb6f59000. +[11:32:13:733]Read at address 0x4A003444 (0xb6f59444): 0x00040006 +[11:32:13:734]Write at address 0x4A003444 (0xb6f59444): 0x00040008, readback 0x00040008 +[11:32:14:571] +[11:32:14:571] _____ _____ _ _ +[11:32:14:571]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +[11:32:14:579]| | _| .'| . | . | | __| _| . | | | -_| _| _| +[11:32:14:580]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| +[11:32:14:580] |___| |___| +[11:32:14:580] +[11:32:14:580]Arago Project http://arago-project.org dra7xx-evm /dev/ttyS0 +[11:32:14:580] +[11:32:14:587]Arago 2016.12 dra7xx-evm /dev/ttyS0 +[11:32:14:587] +[11:32:15:427]dra7xx-evm login: root +[11:32:15:427]login[109]: root login on 'ttyS0' +[11:32:17:983]root@dra7xx-evm:~# dmesg +.... +[11:32:17:983][ 0.000000] Booting Linux on physical CPU 0x0 +[11:32:18:164][ 1.142539] EXT4-fs (mmcblk0p7): mounted filesystem with ordered data mode. Opts: (null) +[11:32:18:164][ 1.158649] EXT4-fs (mmcblk0p8): recovery complete +[11:32:18:164][ 1.158668] EXT4-fs (mmcblk0p8): mounted filesystem with ordered data mode. Opts: (null)= +[11:32:18:186][ 1.487683] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 7348648 +[11:32:18:186][ 1.487768] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[11:32:18:186][ 1.546752] remoteproc0: remote processor 55020000.ipu is now up +[11:32:18:186][ 1.547714] remoteproc1: powering up 40800000.dsp +[11:32:18:186][ 1.547730] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6872640 +[11:32:18:186][ 1.554836] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[11:32:18:186][ 1.554876] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[11:32:18:187][ 1.554974] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[11:32:18:187][ 1.563786] virtio_rpmsg_bus virtio0: rpmsg host is online +[11:32:18:187][ 1.563837] remoteproc0: registered virtio0 (type 7) +[11:32:18:187][ 1.655320] remoteproc1: remote processor 40800000.dsp is now up +[11:32:18:198][ 1.655690] virtio_rpmsg_bus virtio1: rpmsg host is online +[11:32:18:198][ 1.655746] remoteproc1: registered virtio1 (type 7) +[11:32:18:198][ 1.659518] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[11:32:18:198][ 1.662651] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[11:32:18:198][ 1.811139] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[11:32:18:198][ 1.811168] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[11:32:18:198][ 1.811466] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[11:32:18:198][ 1.811517] xhci-hcd xhci-hcd.2.auto: irq 454, io mem 0x48890000 +[11:32:18:198][ 1.812274] hub 1-0:1.0: USB hub found +[11:32:18:199][ 1.812311] hub 1-0:1.0: 1 port detected +[11:32:18:199][ 1.812694] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[11:32:18:199][ 1.812713] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[11:32:18:199][ 1.812810] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[11:32:18:199][ 1.813509] hub 2-0:1.0: USB hub found +[11:32:18:199][ 1.813546] hub 2-0:1.0: 1 port detected +[11:32:18:211][ 2.014935] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[11:32:18:211][ 2.014966] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 3 +[11:32:18:211][ 2.015230] xhci-hcd xhci-hcd.3.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[11:32:18:211][ 2.015279] xhci-hcd xhci-hcd.3.auto: irq 455, io mem 0x488d0000 +[11:32:18:211][ 2.015976] hub 3-0:1.0: USB hub found +[11:32:18:212][ 2.016013] hub 3-0:1.0: 1 port detected +[11:32:18:212][ 2.016385] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[11:32:18:212][ 2.016403] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 4 +[11:32:18:212][ 2.016488] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. +[11:32:18:212][ 2.017128] hub 4-0:1.0: USB hub found +[11:32:18:212][ 2.017165] hub 4-0:1.0: 1 port detected +[11:32:18:212][ 2.028041] SCSI subsystem initialized +[11:32:18:212][ 2.039860] usbcore: registered new interface driver usb-storage +[11:32:18:212][ 2.123444] usb 1-1: new high-speed USB device number 2 using xhci-hcd +[11:32:18:212][ 3.283438] usb 1-1: new high-speed USB device number 3 using xhci-hcd +[11:32:18:212][ 3.433464] usb 1-1: ep 0x81 - rounding interval to 128 microframes, ep desc says 255 microframes +[11:32:18:220][ 3.433539] usb 1-1: ep 0x2 - rounding interval to 128 microframes, ep desc says 255 microframes +[11:32:18:220][ 3.441274] usb-storage 1-1:1.0: USB Mass Storage device detected +[11:32:18:220][ 3.451591] scsi host0: usb-storage 1-1:1.0 +[11:32:18:220][ 4.455563] scsi 0:0:0:0: Direct-Access Kingston DataTraveler 3.0 PQ: 0 ANSI: 6 +[11:32:18:221][ 4.457158] sd 0:0:0:0: [sda] 60437492 512-byte logical blocks: (30.9 GB/28.8 GiB) +[11:32:18:221][ 4.457457] sd 0:0:0:0: [sda] Write Protect is off +[11:32:18:221][ 4.457470] sd 0:0:0:0: [sda] Mode Sense: 4f 00 00 00 +[11:32:18:221][ 4.457753] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA +[11:32:18:221][ 4.462167] sda: sda1 +[11:32:18:221][ 4.464487] sd 0:0:0:0: [sda] Attached SCSI removable disk + +Responses: +Hello, We have few queries to provide us input to analyze the issue you have reported: -1- Can we get more details on the 3 USB flash disks that you are seeing issues? Is the device "Kingston DataTraveler 3.0" is one of the USB flash device having the issue? -2- Are these 3 USB flash disks able to connected to the Ubuntu PC successfully ? Is the PC able to detect them and are you able to read/write to these disks? -3- From the log, line 45, we see --> "FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.", So looks like the fat partition on this disk could be bad? Can confirm? We suspect that the "usb usb1-port1: Cannot enable. Maybe the USB cable is bad?" is being reported because of this earlier error. Thanks. + +Hello, The USB flash disk is not broken, it can read and write on the Ubuntu PC, It can mkfs.vfat on Ubuntu PC, but not mkfs.vfa on TDA2 Linux [ 1.665062] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 1.669183] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 1.822120] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller [ 1.822157] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 [ 1.822502] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 1.822560] xhci-hcd xhci-hcd.2.auto: irq 454, io mem 0x48890000 [ 1.823874] hub 1-0:1.0: USB hub found [ 1.823914] hub 1-0:1.0: 1 port detected [ 1.824310] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller [ 1.824329] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 [ 1.824412] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 1.825325] hub 2-0:1.0: USB hub found [ 1.825363] hub 2-0:1.0: 1 port detected [ 2.106883] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller [ 2.106917] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 3 [ 2.107252] xhci-hcd xhci-hcd.3.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 2.107309] xhci-hcd xhci-hcd.3.auto: irq 455, io mem 0x488d0000 [ 2.108070] hub 3-0:1.0: USB hub found [ 2.108110] hub 3-0:1.0: 1 port[ 421.743489] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? detected [ 2.108497] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller [ 2.108516] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 4 [ 2.108603] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. [ 2.109266] hub 4-0:1.0: USB hub found [ 2.109305] hub 4-0:1.0: 1 port detected [ 2.120888] SCSI subsystem initialized [ 2.149529] usbcore: registered new interface driver usb-storage [ 2.886951] NET: Registered protocol family 41 [ 6.902493] omap8250 48020000.serial: failed to request DMA [ 6.903973] omap8250 48066000.serial: failed to request DMA [ 22.350641] random: nonblocking pool is initialized [ 325.623449] usb 1-1: new high-speed USB device number 2 using xhci-hcd [ 325.773413] usb 1-1: ep 0x81 - rounding interval to 128 microframes, ep desc says 255 microframes [ 325.773548] usb 1-1: ep 0x2 - rounding interval to 128 microframes, ep desc says 255 microframes [ 325.781316] usb-storage 1-1:1.0: USB Mass Storage device detected [ 325.791645] scsi host0: usb-storage 1-1:1.0 [ 326.795612] scsi 0:0:0:0: Direct-Access Kingston DataTraveler 3.0 PQ: 0 ANSI: 6 [ 326.797294] sd 0:0:0:0: [sda] 60437492 512-byte logical blocks: (30.9 GB/28.8 GiB) [ 326.797582] sd 0:0:0:0: [sda] Write Protect is off [ 326.797595] sd 0:0:0:0: [sda] Mode Sense: 4f 00 00 00 [ 326.797877] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA [ 326.802183] sda: [ 326.805165] sd 0:0:0:0: [sda] Attached SCSI removable disk [ 346.905250] FAT-fs (sda): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 405.163498] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 409.273477] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 413.383474] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 417.493490] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 417.494519] usb 1-1: USB disconnect, device number 2 [ 417.513487] sd 0:0:0:0: [sda] tag#0 UNKNOWN(0x2003) Result: hostbyte=0x01 driverbyte=0x00 [ 417.513505] sd 0:0:0:0: [sda] tag#0 CDB: opcode=0x2a 2a 00 00 00 46 64 00 00 0b 00 [ 417.513515] blk_update_request: I/O error, dev sda, sector 18020 [ 417.514287] Buffer I/O error on dev sda, logical block 18020, lost async page write [ 417.515275] Buffer I/O error on dev sda, logical block 18021, lost async page write [ 417.516250] Buffer I/O error on dev sda, logical block 18022, lost async page write [ 417.517225] Buffer I/O error on dev sda, logical block 18023, lost async page write [ 417.518208] Buffer I/O error on dev sda, logical block 18024, lost async page write [ 417.519197] Buffer I/O error on dev sda, logical block 18025, lost async page write [ 417.520171] Buffer I/O error on dev sda, logical block 18026, lost async page write [ 417.521145] Buffer I/O error on dev sda, logical block 18027, lost async page write [ 417.522119] Buffer I/O error on dev sda, logical block 18028, lost async page write [ 417.523100] Buffer I/O error on dev sda, logical block 18029, lost async page write [ 417.533904] sd 0:0:0:0: [sda] tag#0 UNKNOWN(0x2003) Result: hostbyte=0x01 driverbyte=0x00 [ 417.533921] sd 0:0:0:0: [sda] tag#0 CDB: opcode=0x2a 2a 00 00 00 80 20 00 00 03 00 [ 417.533931] blk_update_request: I/O error, dev sda, sector 32800 [ 417.534737] FAT-fs (sda): FAT read failed (blocknr 3283) [ 417.535692] FAT-fs (sda): unable to read inode block for updating (i_pos 725027) [ 417.538369] FAT-fs (sda): Directory bread(block 32800) failed [ 417.539125] FAT-fs (sda): Directory bread(block 32801) failed [ 417.540859] FAT-fs (sda): Directory bread(block 32802) failed [ 417.541933] FAT-fs (sda): unable to read inode block for updating (i_pos 725030) [ 417.545564] FAT-fs (sda): unable to read inode block for updating (i_pos 725033) [ 417.547332] FAT-fs (sda): unable to read inode block for updating (i_pos 724486) [ 417.548321] FAT-fs (sda): unable to read inode block for updating (i_pos 724488) [ 417.549407] FAT-fs (sda): unable to read inode block for updating (i_pos 1137668) [ 417.556480] FAT-fs (sda): unable to read inode block for updating (i_pos 1137671) [ 419.546924] FAT-fs (sda): Directory bread(block 32800) failed [ 419.547712] FAT-fs (sda): Directory bread(block 32801) failed [ 419.548455] FAT-fs (sda): Directory bread(block 32802) failed [ 419.549193] FAT-fs (sda): Directory bread(block 32803) failed [ 419.549960] FAT-fs (sda): Directory bread(block 32804) failed [ 419.550701] FAT-fs (sda): Directory bread(block 32805) failed [ 419.551472] FAT-fs (sda): Directory bread(block 32806) failed root@dra7xx-evm:/mnt/usb/test# [ 425.853477] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 429.963480] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 434.073477] usb usb1-port1: Cannot enable. Maybe the USB cable is bad? [ 434.074452] usb usb1-port1: unable to enumerate USB device + +Hello, Thanks for the log. It clear from it that the driver failed to communicate successfully. There could be many reasons to this. One possible reason is the cable or the adapter used to connect the USB flash disk to the TDA2 board. It is seen that some flash disk's cause enumeration failure if we use lengthy or sub-standard cable/adapters. So can you give us below info: -1- Can we get more details on the 3 USB flash disks that you are seeing issues. -2- Details on the cable/adapters used to connect the flash disk. -3- Try to use different cable/adapters and check if issue still occur. Thanks. + +Hello, 1 usb 3.0 Kingston DataTraveler 100 G3 32GB. 2. TDA2eg-17 host USB 2.0 3. I also tested this 3.0 USB flash drive on TDA2HG with USB port, which was also recognized, but could not read or write. Both TDA2EG-17 and TDA2HG boards recognize that USB2.0 reads and writes are normal Whether USB 3.0 USB flash drive is supported？ What can I do to support the current 3.0 USB flash on TDA2EG-17? + +Hello, 1 usb 3.0 Kingston DataTraveler 100 G3 32GB. 2. TDA2eg-17 host USB 2.0 3. I also tested this 3.0 USB flash drive on TDA2HG with USB port, which was also recognized, but could not read or write. Both TDA2EG-17 and TDA2HG boards recognize that USB2.0 reads and writes are normal, Whether USB 3.0 USB flash drive is supported？ What can I do to support the current 3.0 USB flash on TDA2EG-17? + +Hello, We have got information that some of the USB3 flash drivers do not enumerate and the cause of it is still not known. One possible cause that is suspected is the port reset timings. We are checking with our team to see if there is any fix/patch. We will let you know. Thanks. + +Hello, The feedback we got from the team is that the kernel being used above is very old. The suggestion is if you are able to reproduce this issue with a recent kernel such as v5.4. Another recommendation is to use another flash device if this is possible. Sorry, nothing much can be done on this issue further. Thanks. + diff --git a/data2/text/range/30001+/1006560.txt b/data2/text/range/30001+/1006560.txt new file mode 100644 index 0000000000000000000000000000000000000000..3801568c261b24be1e58ad4b508fae22c7fb0fc6 --- /dev/null +++ b/data2/text/range/30001+/1006560.txt @@ -0,0 +1,30 @@ +Ticket Name: TDA2EXEVM: uart2 of tda2x cant read data correctly + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: DRA742, PCF8575, TLV320AIC3106, WL1835, TDA2 My question is : when my tda2x's uart2 connect to external mcu,mcu send 12 bytes per 2 sends,but tda2xx cant read data correctly from uart2. sometimes lost data,sometimes wait for a long time to get data. This is our board info: CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 2 GiB NAND: 0 MiB here, we configure uart2 in dtb such as: uart2: serial@4806c000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806c000 0x100>; interrupts = ; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "okay"; dmas = <&sdma_xbar 51>, <&sdma_xbar 52>; dma-names = "tx", "rx"; }; When we enter filesystem,we call omapconf to configure pinmux: omapconf write 0x4a0037f0 0xd0004 //rx uart2 omapconf write 0x4a0037f4 0x90004 //tx uart2 omapconf write 0x4a0037f8 0x00060103 omapconf write 0x4a0037fc 0x00060103 when i write data to /dev/ttyS1 then use oscilloscope to test,it's correct: #!/bin/bash while((1 == 1)) do echo "haha" > /dev/ttyS1 sleep 1 done when i use oscilloscope to test tx of mcu's uart port ,i got correct wave format!!!! This is to say,mcu send data correctly. + +Responses: +Hi, So can you confirm from where the below is sent? dsafdf dsfaf said: while((1 == 1)) do echo "haha" > /dev/ttyS1 sleep 1 done Also can you paste the output of: stty -F /dev/ttyS1 -a Regards, Keerthy + +Executed on tda2x: ========================================== while((1 == 1)) do echo "haha" > /dev/ttyS1 sleep 1 done ============================================ root@dra7xx-evm:~# stty -F /dev/ttyS1 -a speed 115200 baud;stty: /dev/ttyS1 line = 0; intr = ^C; quit = ^\; erase = ^?; kill = ^U; eof = ^D; eol = ; eol2 = ; swtch = ; start = ^Q; stop = ^S; susp = ^Z; rprnt = ^R; werase = ^W; lnext = ^V; flush = ^O; min = 1; time = 0; -parenb -parodd -cmspar cs8 hupcl -cstopb cread clocal -crtscts -ignbrk -brkint -ignpar -parmrk -inpck -istrip -inlcr -igncr icrnl ixon -ixoff -iuclc -ixany -imaxbel -iutf8 opost -olcuc -ocrnl onlcr -onocr -onlret -ofill -ofdel nl0 cr0 tab0 bs0 vt0 ff0 isig icanon iexten echo echoe echok -echonl -noflsh -xcase -tostop -echoprt echoctl echoke -flusho -extproc + +We use uart2 of tda2x for transport data,should i turn on "raw" property of uart2??? When i send only one character 'a' by uart1 of tda2x,i see the wave on oscilloscope: 0x61,0x0d,0x0a When i send two characters "aa" by uart1 of tda2x,i see the wave on oscilloscope:0x61 0x61 0x0d 0x0a, so ,when i transport data from mcu to tda2x,should i write \n ？？？ + +HELLO？？？ anyone there？？？ + +Hello, 0x61,0x0d,0x0a --> a followed by CR(Carriage Return) & LF(Line Feed) 0x61, 0x61,0x0d,0x0a --> 'a' followed by 'a' followed by CR(Carriage Return) & LF(Line Feed) Seems like your TX is working. Have you tried the same from PC side before trying on MCU side? Best Regards, Keerthy + +Yes,i used another uart device ,one port connect to pc and recognized as /dev/ttyUSB0,another port(rx,tx,gnd) connected to uart1 of tda2x. So,i write 0xaa to /dev/ttyUSB0 on my linux pc,and read nothing on tda2x... so,what can i do now ??? + +the dtb configures of uart1 and uart2 are different. serial@4806a000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806a000 0x100>; interrupts-extended = <0x1 0x0 0x43 0x4 0x8c 0x3e0>; ti,hwmods = "uart1"; clock-frequency = <0x2dc6c00>; status = "okay"; dmas = <0x8d 0x31 0x8d 0x32>; dma-names = "tx", "rx"; }; serial@4806c000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806c000 0x100>; interrupts = <0x0 0x44 0x4>; ti,hwmods = "uart2"; clock-frequency = <0x2dc6c00>; status = "okay"; dmas = <0x8d 0x33 0x8d 0x34>; dma-names = "tx", "rx"; }; and i execute cat /proc/interrupts,only uart1's interrupt was found. root@dra7xx-evm:~# cat /proc/interrupts CPU0 CPU1 17: 0 0 CBAR 32 Level gp_timer 18: 0 0 GICv2 29 Level arch_timer 19: 141230 429490 GICv2 30 Level arch_timer 22: 0 0 CBAR 4 Level l3-dbg-irq 23: 0 0 WUGEN 10 Level l3-app-irq 25: 1 0 CBAR 232 Level dra7xx-pcie-main 26: 0 0 CBAR 233 Level dra7-pcie-msi 27: 1 0 CBAR 121 Level talert 28: 0 0 CBAR 7 Level DMA 29: 4710 0 CBAR 8 Level omap-dma-engine 32: 0 0 CBAR 361 Level 43300000.edma_ccint 34: 0 0 CBAR 359 Level 43300000.edma_ccerrint 37: 0 0 CBAR 24 Level 4ae10000.gpio 38: 0 0 CBAR 25 Level 48055000.gpio 39: 0 0 CBAR 26 Level 48057000.gpio 40: 0 0 CBAR 27 Level 48059000.gpio 41: 0 0 CBAR 28 Level 4805b000.gpio 42: 0 0 CBAR 29 Level 4805d000.gpio 43: 0 0 CBAR 30 Level 48051000.gpio 44: 0 0 CBAR 116 Level 48053000.gpio 45: 1843 0 CBAR 67 Level 4806a000.serial 46: 6821 0 CBAR 68 Level 50: 496 0 CBAR 251 Level mbox_dsp1_ipc3x 54: 509 0 CBAR 255 Level mbox_ipu2_ipc3x, mbox_dsp2_ipc3x 71: 2 0 CBAR 108 Level omap_dmm_irq_handler 72: 463 0 CBAR 51 Level 48070000.i2c 73: 0 0 CBAR 56 Level 48060000.i2c 74: 0 0 CBAR 57 Level 4807a000.i2c 75: 5588 0 CBAR 78 Level mmc0 76: 0 0 CBAR 53 Level omap_hdq 77: 724 0 CBAR 81 Level mmc1 78: 52 0 CBAR 91 Level mmc2 79: 0 0 CBAR 23 Level 40d01000.mmu 80: 0 0 CBAR 145 Level 40d02000.mmu 81: 0 0 CBAR 395 Level 58882000.mmu 82: 0 0 CBAR 396 Level 55082000.mmu 83: 0 0 CBAR 61 Level 4809a000.spi 85: 0 0 CBAR 49 Level ahci[4a140000.sata] 86: 0 0 CBAR 217 Level rtc0 89: 0 0 CBAR 1 Level 48078000.elm 93: 3786 0 CBAR 335 Level 48484000.ethernet 94: 157 0 CBAR 336 Level 48484000.ethernet 97: 2 0 CBAR 16 Level SGX ISR 102: 0 0 CBAR 46 Level 4b101000.sham 103: 1 0 CBAR 47 Level 48090000.rng 104: 0 0 CBAR 146 Level 41501000.mmu 105: 0 0 CBAR 147 Level 41502000.mmu 106: 0 0 WUGEN 131 Level arm-pmu 107: 0 0 WUGEN 132 Level arm-pmu 174: 0 0 PCI-MSI 0 Edge PCIe PME, aerdrv 175: 0 0 pinctrl 992 Edge 4806a000.serial:wakeup 176: 0 0 4805d000.gpio 27 Edge 4809c000.mmc cd IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 1885 16991 Rescheduling interrupts IPI3: 567 883 Function call interrupts IPI4: 0 0 CPU stop interrupts IPI5: 0 0 IRQ work interrupts IPI6: 0 0 completion interrupts Err: 0 + +Can you share you dtb? I will try to reverse compile dts and check if the uart1 node is indeed present in your dts. Best Regards, Keerthy + +/dts-v1/; / { #address-cells = <0x2>; #size-cells = <0x2>; compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; interrupt-parent = <0x1>; model = "TI DRA742"; chosen { stdout-path = "/ocp/serial@4806a000"; }; aliases { i2c0 = "/ocp/i2c@48070000"; i2c1 = "/ocp/i2c@48072000"; i2c2 = "/ocp/i2c@48060000"; i2c3 = "/ocp/i2c@4807a000"; i2c4 = "/ocp/i2c@4807c000"; serial0 = "/ocp/serial@4806a000"; serial1 = "/ocp/serial@4806c000"; serial2 = "/ocp/serial@48020000"; serial3 = "/ocp/serial@4806e000"; serial4 = "/ocp/serial@48066000"; serial5 = "/ocp/serial@48068000"; serial6 = "/ocp/serial@48420000"; serial7 = "/ocp/serial@48422000"; serial8 = "/ocp/serial@48424000"; serial9 = "/ocp/serial@4ae2b000"; ethernet0 = "/ocp/ethernet@48484000/slave@48480200"; ethernet1 = "/ocp/ethernet@48484000/slave@48480300"; d_can0 = "/ocp/can@4ae3c000"; d_can1 = "/ocp/can@48480000"; spi0 = "/ocp/qspi@4b300000"; rproc0 = "/ocp/ipu@58820000"; rproc1 = "/ocp/ipu@55020000"; rproc2 = "/ocp/dsp@40800000"; rproc3 = "/ocp/dsp@41000000"; display0 = "/connector@1"; sound0 = "/sound0"; sound1 = "/ocp/dss@58000000/encoder@58060000"; }; timer { compatible = "arm,armv7-timer"; interrupts = <0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xa 0x308>; interrupt-parent = <0x2>; }; interrupt-controller@48211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <0x3>; reg = <0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x2000 0x0 0x48214000 0x0 0x2000 0x0 0x48216000 0x0 0x2000>; interrupts = <0x1 0x9 0x304>; interrupt-parent = <0x2>; phandle = <0x2>; }; interrupt-controller@48281000 { compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu"; interrupt-controller; #interrupt-cells = <0x3>; reg = <0x0 0x48281000 0x0 0x1000>; interrupt-parent = <0x2>; phandle = <0x8>; }; cpus { #address-cells = <0x1>; #size-cells = <0x0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; operating-points-v2 = <0x3>; clocks = <0x4>; clock-names = "cpu"; clock-latency = <0x493e0>; #cooling-cells = <0x2>; vbb-supply = <0x5>; vdd-supply = <0x6>; phandle = <0xfc>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x1>; operating-points-v2 = <0x3>; clocks = <0x4>; clock-names = "cpu"; clock-latency = <0x493e0>; #cooling-cells = <0x2>; vbb-supply = <0x5>; }; }; opp-table { compatible = "operating-points-v2-ti-cpu"; syscon = <0x7>; opp-shared; phandle = <0x3>; opp_nom-1000000000 { opp-hz = <0x0 0x3b9aca00>; opp-microvolt = <0x102ca0 0xcf850 0x118c30 0x102ca0 0xcf850 0x118c30>; opp-supported-hw = <0xff 0x1>; opp-suspend; }; opp_od-1176000000 { opp-hz = <0x0 0x46185600>; opp-microvolt = <0x11b340 0xd8108 0x11b340 0x11b340 0xd8108 0x11b340>; opp-supported-hw = <0xff 0x2>; }; opp_high@1500000000 { opp-hz = <0x0 0x59682f00>; opp-microvolt = <0x127690 0xe7ef0 0x1312d0 0x127690 0xe7ef0 0x1312d0>; opp-supported-hw = <0xff 0x4>; }; }; soc { compatible = "ti,omap-infra"; mpu { compatible = "ti,omap5-mpu"; ti,hwmods = "mpu"; }; }; ocp { compatible = "ti,dra7-l3-noc", "simple-bus"; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x0 0x0 0xc0000000>; ti,hwmods = "l3_main_1", "l3_main_2"; reg = <0x0 0x44000000 0x0 0x1000000 0x0 0x45000000 0x0 0x1000>; interrupts-extended = <0x1 0x0 0x4 0x4 0x8 0x0 0xa 0x4>; l4@4a000000 { compatible = "ti,dra7-l4-cfg", "simple-bus"; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x4a000000 0x22c000>; scm@2000 { compatible = "ti,dra7-scm-core", "simple-bus"; reg = <0x2000 0x2000>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x2000 0x2000>; scm_conf@0 { compatible = "syscon", "simple-bus"; reg = <0x0 0x1400>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x0 0x1400>; phandle = <0x9>; pbias_regulator@e00 { compatible = "ti,pbias-dra7", "ti,pbias-omap"; reg = <0xe00 0x4>; syscon = <0x9>; pbias_mmc_omap5 { regulator-name = "pbias_mmc_omap5"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x325aa0>; phandle = <0xad>; }; }; clocks { #address-cells = <0x1>; #size-cells = <0x0>; dss_deshdcp_clk@558 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0xa>; ti,bit-shift = <0x0>; reg = <0x558>; }; ehrpwm0_tbclk@558 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0xb>; ti,bit-shift = <0x14>; reg = <0x558>; phandle = <0xf0>; }; ehrpwm1_tbclk@558 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0xb>; ti,bit-shift = <0x15>; reg = <0x558>; phandle = <0xf1>; }; ehrpwm2_tbclk@558 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0xb>; ti,bit-shift = <0x16>; reg = <0x558>; phandle = <0xf2>; }; sys_32k_ck { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0xc 0xd 0xd 0xd>; ti,bit-shift = <0x8>; reg = <0x6c4>; phandle = <0x50>; }; }; }; pinmux@1400 { compatible = "ti,dra7-padconf", "pinctrl-single"; reg = <0x1400 0x468>; #address-cells = <0x1>; #size-cells = <0x0>; #pinctrl-cells = <0x1>; #interrupt-cells = <0x1>; interrupt-controller; pinctrl-single,register-width = <0x20>; pinctrl-single,function-mask = <0x3fffffff>; phandle = <0x8c>; mmc1_pins_default { pinctrl-single,pins = <0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>; phandle = <0xb0>; }; mmc1_pins_sdr12 { pinctrl-single,pins = <0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>; phandle = <0xb2>; }; mmc1_pins_hs { pinctrl-single,pins = <0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>; phandle = <0xb1>; }; mmc1_pins_sdr25 { pinctrl-single,pins = <0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>; phandle = <0xb3>; }; mmc1_pins_sdr50 { pinctrl-single,pins = <0x354 0x601a0 0x358 0x601a0 0x35c 0x601a0 0x360 0x601a0 0x364 0x601a0 0x368 0x601a0>; phandle = <0xb4>; }; mmc1_pins_ddr50 { pinctrl-single,pins = <0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>; phandle = <0xb5>; }; mmc1_pins_sdr104 { pinctrl-single,pins = <0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>; phandle = <0xb7>; }; mmc2_pins_default { pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>; phandle = <0xbc>; }; mmc2_pins_hs { pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>; phandle = <0xbd>; }; mmc2_pins_ddr_3_3v_rev11 { pinctrl-single,pins = <0x9c 0x60101 0xb0 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>; }; mmc2_pins_ddr_1_8v_rev11 { pinctrl-single,pins = <0x9c 0x60101 0xb0 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>; phandle = <0xbe>; }; mmc2_pins_ddr_rev20 { pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>; phandle = <0xc0>; }; mmc2_pins_hs200 { pinctrl-single,pins = <0x9c 0x60101 0xb0 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>; phandle = <0xc1>; }; mmc4_pins_default { pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>; phandle = <0xc6>; }; mmc4_pins_hs { pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>; phandle = <0xc9>; }; mmc3_pins_default { pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>; }; mmc3_pins_hs { pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>; }; mmc3_pins_sdr12 { pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>; }; mmc3_pins_sdr25 { pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>; }; mmc3_pins_sdr50 { pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>; }; mmc4_pins_sdr12 { pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>; phandle = <0xcc>; }; mmc4_pins_sdr25 { pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>; phandle = <0xcd>; }; dcan1_pins_default { pinctrl-single,pins = <0x3d0 0x20000 0x3d4 0x60000>; phandle = <0xea>; }; dcan1_pins_sleep { pinctrl-single,pins = <0x3d0 0x2000f 0x3d4 0x2000f>; phandle = <0xe9>; }; pinmux_mcasp8_axr2_pin { pinctrl-single,pins = <0x2fc 0x10001>; phandle = <0xe6>; }; pinmux_hdmi_i2c_pins_default { pinctrl-single,pins = <0x408 0x50000 0x40c 0x50000>; phandle = <0x10a>; }; pinmux_hdmi_i2c_pins_ddc { pinctrl-single,pins = <0x408 0x50001 0x40c 0x50001>; phandle = <0x10b>; }; }; scm_conf@1c04 { compatible = "syscon"; reg = <0x1c04 0x20>; #syscon-cells = <0x2>; phandle = <0x87>; }; scm_conf@1c24 { compatible = "syscon"; reg = <0x1c24 0x24>; phandle = <0x85>; }; dma-router@b78 { compatible = "ti,dra7-dma-crossbar"; reg = <0xb78 0xfc>; #dma-cells = <0x1>; dma-requests = <0xcd>; ti,dma-safe-map = <0x0>; dma-masters = <0xe>; phandle = <0x8d>; }; dma-router@c78 { compatible = "ti,dra7-dma-crossbar"; reg = <0xc78 0x7c>; #dma-cells = <0x2>; dma-requests = <0xcc>; ti,dma-safe-map = <0x0>; dma-masters = <0xf>; phandle = <0xdf>; }; }; cm_core_aon@5000 { compatible = "ti,dra7-cm-core-aon", "simple-bus"; #address-cells = <0x1>; #size-cells = <0x1>; reg = <0x5000 0x2000>; ranges = <0x0 0x5000 0x2000>; clocks { #address-cells = <0x1>; #size-cells = <0x0>; atl_clkin0_ck { #clock-cells = <0x0>; compatible = "ti,dra7-atl-clock"; clocks = <0x10 0x0 0x1a>; phandle = <0xe2>; }; atl_clkin1_ck { #clock-cells = <0x0>; compatible = "ti,dra7-atl-clock"; clocks = <0x10 0x0 0x1a>; phandle = <0xe3>; }; atl_clkin2_ck { #clock-cells = <0x0>; compatible = "ti,dra7-atl-clock"; clocks = <0x10 0x0 0x1a>; phandle = <0xe4>; }; atl_clkin3_ck { #clock-cells = <0x0>; compatible = "ti,dra7-atl-clock"; clocks = <0x10 0x0 0x1a>; phandle = <0xe5>; }; hdmi_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x30>; }; mlb_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x81>; }; mlbp_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x82>; }; pciesref_acs_clk_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x5f5e100>; phandle = <0x40>; }; ref_clkin0_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; ref_clkin1_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; ref_clkin2_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; ref_clkin3_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; rmii_clk_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; sdvenc_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; secure_32k_clk_src_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x8000>; phandle = <0x6b>; }; sys_clk32_crystal_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x8000>; phandle = <0xc>; }; sys_clk32_pseudo_ck { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x11>; clock-mult = <0x1>; clock-div = <0x262>; phandle = <0xd>; }; virt_12000000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0xb71b00>; phandle = <0x59>; }; virt_13000000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0xc65d40>; }; virt_16800000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x1005900>; phandle = <0x5b>; }; virt_19200000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x124f800>; phandle = <0x5c>; }; virt_20000000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x1312d00>; phandle = <0x5a>; }; virt_26000000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x18cba80>; phandle = <0x5d>; }; virt_27000000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x19bfcc0>; phandle = <0x5e>; }; virt_38400000_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x249f000>; phandle = <0x5f>; }; sys_clkin2 { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x1588800>; phandle = <0x60>; }; usb_otg_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x68>; }; video1_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x3a>; }; video1_m2_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x2f>; }; video2_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x3b>; }; video2_m2_clkin_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; phandle = <0x2e>; }; dpll_abe_ck@1e0 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-m4xen-clock"; clocks = <0x12 0x13>; reg = <0x1e0 0x1e4 0x1ec 0x1e8>; phandle = <0x14>; }; dpll_abe_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x14>; phandle = <0x15>; }; dpll_abe_m2x2_ck@1f0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x15>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x1f0>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x16>; }; abe_clk@108 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x16>; ti,max-div = <0x4>; reg = <0x108>; ti,index-power-of-two; phandle = <0x62>; }; dpll_abe_m2_ck@1f0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x14>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x1f0>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x64>; }; dpll_abe_m3x2_ck@1f4 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x15>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x1f4>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x17>; }; dpll_core_byp_mux@12c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x17>; ti,bit-shift = <0x17>; reg = <0x12c>; phandle = <0x18>; }; dpll_core_ck@120 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-core-clock"; clocks = <0x11 0x18>; reg = <0x120 0x124 0x12c 0x128>; phandle = <0x19>; }; dpll_core_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x19>; phandle = <0x1a>; }; dpll_core_h12x2_ck@13c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x13c>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x1b>; }; mpu_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x1b>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x1c>; }; dpll_mpu_ck@160 { #clock-cells = <0x0>; compatible = "ti,omap5-mpu-dpll-clock"; clocks = <0x11 0x1c>; reg = <0x160 0x164 0x16c 0x168>; phandle = <0x4>; }; dpll_mpu_m2_ck@170 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x170>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x1d>; }; mpu_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x1d>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x6f>; }; dsp_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x1b>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x1e>; }; dpll_dsp_byp_mux@240 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x1e>; ti,bit-shift = <0x17>; reg = <0x240>; phandle = <0x1f>; }; dpll_dsp_ck@234 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x1f>; reg = <0x234 0x238 0x240 0x23c>; assigned-clocks = <0x20>; assigned-clock-rates = <0x23c34600>; phandle = <0x20>; }; dpll_dsp_m2_ck@244 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x20>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x244>; ti,index-starts-at-one; ti,invert-autoidle-bit; assigned-clocks = <0x21>; assigned-clock-rates = <0x23c34600>; phandle = <0x21>; }; iva_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x1b>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x22>; }; dpll_iva_byp_mux@1ac { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x22>; ti,bit-shift = <0x17>; reg = <0x1ac>; phandle = <0x23>; }; dpll_iva_ck@1a0 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x23>; reg = <0x1a0 0x1a4 0x1ac 0x1a8>; assigned-clocks = <0x24>; assigned-clock-rates = <0x45707d40>; phandle = <0x24>; }; dpll_iva_m2_ck@1b0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x24>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x1b0>; ti,index-starts-at-one; ti,invert-autoidle-bit; assigned-clocks = <0x25>; assigned-clock-rates = <0x17257f16>; phandle = <0x25>; }; iva_dclk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x25>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x71>; }; dpll_gpu_byp_mux@2e4 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x17>; ti,bit-shift = <0x17>; reg = <0x2e4>; phandle = <0x26>; }; dpll_gpu_ck@2d8 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x26>; reg = <0x2d8 0x2dc 0x2e4 0x2e0>; assigned-clocks = <0x27>; assigned-clock-rates = <0x4c1d7940>; phandle = <0x27>; }; dpll_gpu_m2_ck@2e8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x27>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x2e8>; ti,index-starts-at-one; ti,invert-autoidle-bit; assigned-clocks = <0x28>; assigned-clock-rates = <0x195f286b>; phandle = <0x28>; }; dpll_core_m2_ck@130 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x19>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x130>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x29>; }; core_dpll_out_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x29>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x73>; }; dpll_ddr_byp_mux@21c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x17>; ti,bit-shift = <0x17>; reg = <0x21c>; phandle = <0x2a>; }; dpll_ddr_ck@210 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x2a>; reg = <0x210 0x214 0x21c 0x218>; phandle = <0x2b>; }; dpll_ddr_m2_ck@220 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x2b>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x220>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x65>; }; dpll_gmac_byp_mux@2b4 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x17>; ti,bit-shift = <0x17>; reg = <0x2b4>; phandle = <0x2c>; }; dpll_gmac_ck@2a8 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x2c>; reg = <0x2a8 0x2ac 0x2b4 0x2b0>; phandle = <0x2d>; }; dpll_gmac_m2_ck@2b8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x2d>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x2b8>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x66>; }; video2_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x2e>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x75>; }; video1_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x2f>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x76>; }; hdmi_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x30>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x77>; }; per_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x17>; clock-mult = <0x1>; clock-div = <0x2>; phandle = <0x43>; }; usb_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x17>; clock-mult = <0x1>; clock-div = <0x3>; phandle = <0x47>; }; eve_dpll_hs_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x1b>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x31>; }; dpll_eve_byp_mux@290 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x31>; ti,bit-shift = <0x17>; reg = <0x290>; phandle = <0x32>; }; dpll_eve_ck@284 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x32>; reg = <0x284 0x288 0x290 0x28c>; phandle = <0x33>; }; dpll_eve_m2_ck@294 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x33>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x294>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x34>; }; eve_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x34>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x80>; }; dpll_core_h13x2_ck@140 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x140>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_core_h14x2_ck@144 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x144>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x51>; }; dpll_core_h22x2_ck@154 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x154>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x3d>; }; dpll_core_h23x2_ck@158 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x158>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x56>; }; dpll_core_h24x2_ck@15c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x1a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x15c>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_ddr_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x2b>; phandle = <0x35>; }; dpll_ddr_h11x2_ck@228 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x35>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x228>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_dsp_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x20>; phandle = <0x36>; }; dpll_dsp_m3x2_ck@248 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x36>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x248>; ti,index-starts-at-one; ti,invert-autoidle-bit; assigned-clocks = <0x37>; assigned-clock-rates = <0x17d78400>; phandle = <0x37>; }; dpll_gmac_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x2d>; phandle = <0x38>; }; dpll_gmac_h11x2_ck@2c0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x38>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x2c0>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x39>; }; dpll_gmac_h12x2_ck@2c4 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x38>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x2c4>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_gmac_h13x2_ck@2c8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x38>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x2c8>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0xd0>; }; dpll_gmac_m3x2_ck@2bc { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x38>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x2bc>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; gmii_m_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x39>; clock-mult = <0x1>; clock-div = <0x2>; }; hdmi_clk2_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x30>; clock-mult = <0x1>; clock-div = <0x1>; }; hdmi_div_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x30>; clock-mult = <0x1>; clock-div = <0x1>; }; l3_iclk_div@100 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; ti,max-div = <0x2>; ti,bit-shift = <0x4>; reg = <0x100>; clocks = <0x1b>; ti,index-power-of-two; phandle = <0xa>; }; l4_root_clk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0xa>; clock-mult = <0x1>; clock-div = <0x2>; phandle = <0xb>; }; video1_clk2_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x3a>; clock-mult = <0x1>; clock-div = <0x1>; }; video1_div_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x3a>; clock-mult = <0x1>; clock-div = <0x1>; }; video2_clk2_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x3b>; clock-mult = <0x1>; clock-div = <0x1>; }; video2_div_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x3b>; clock-mult = <0x1>; clock-div = <0x1>; }; dummy_ck { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x0>; }; }; clockdomains { }; mpu_cm@300 { compatible = "ti,omap4-cm"; reg = <0x300 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x300 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; dsp1_cm@400 { compatible = "ti,omap4-cm"; reg = <0x400 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x400 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; ipu1_cm@500 { compatible = "ti,omap4-cm"; reg = <0x500 0x40>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x500 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x20>; #clock-cells = <0x2>; assigned-clocks = <0x3c 0x0 0x18>; assigned-clock-parents = <0x3d>; phandle = <0x3c>; }; }; ipu_cm@540 { compatible = "ti,omap4-cm"; reg = <0x540 0xc0>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x540 0xc0>; clk@0 { compatible = "ti,clkctrl"; reg = <0x0 0x44>; #clock-cells = <0x2>; phandle = <0x8f>; }; }; dsp2_cm@600 { compatible = "ti,omap4-cm"; reg = <0x600 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x600 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; rtc_cm@700 { compatible = "ti,omap4-cm"; reg = <0x700 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x700 0x100>; clk@40 { compatible = "ti,clkctrl"; reg = <0x40 0x8>; #clock-cells = <0x2>; }; }; }; cm_core@8000 { compatible = "ti,dra7-cm-core", "simple-bus"; #address-cells = <0x1>; #size-cells = <0x1>; reg = <0x8000 0x3000>; ranges = <0x0 0x8000 0x3000>; clocks { #address-cells = <0x1>; #size-cells = <0x0>; dpll_pcie_ref_ck@200 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x11>; reg = <0x200 0x204 0x20c 0x208>; phandle = <0x3e>; }; dpll_pcie_ref_m2ldo_ck@210 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x3e>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x210>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x3f>; }; apll_pcie_in_clk_mux@4ae06118 { compatible = "ti,mux-clock"; clocks = <0x3f 0x40>; #clock-cells = <0x0>; reg = <0x21c 0x4>; ti,bit-shift = <0x7>; phandle = <0x41>; }; apll_pcie_ck@21c { #clock-cells = <0x0>; compatible = "ti,dra7-apll-clock"; clocks = <0x41 0x3e>; reg = <0x21c 0x220>; phandle = <0x42>; }; optfclk_pciephy_div@4a00821c { compatible = "ti,divider-clock"; clocks = <0x42>; #clock-cells = <0x0>; reg = <0x21c>; ti,dividers = <0x2 0x1>; ti,bit-shift = <0x8>; ti,max-div = <0x2>; phandle = <0xd3>; }; apll_pcie_clkvcoldo { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x42>; clock-mult = <0x1>; clock-div = <0x1>; }; apll_pcie_clkvcoldo_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x42>; clock-mult = <0x1>; clock-div = <0x1>; }; apll_pcie_m2_ck { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x42>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x6a>; }; dpll_per_byp_mux@14c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x43>; ti,bit-shift = <0x17>; reg = <0x14c>; phandle = <0x44>; }; dpll_per_ck@140 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-clock"; clocks = <0x11 0x44>; reg = <0x140 0x144 0x14c 0x148>; phandle = <0x45>; }; dpll_per_m2_ck@150 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x45>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x150>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x46>; }; func_96m_aon_dclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x46>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x78>; }; dpll_usb_byp_mux@18c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x47>; ti,bit-shift = <0x17>; reg = <0x18c>; phandle = <0x48>; }; dpll_usb_ck@180 { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-j-type-clock"; clocks = <0x11 0x48>; reg = <0x180 0x184 0x18c 0x188>; phandle = <0x49>; }; dpll_usb_m2_ck@190 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x49>; ti,max-div = <0x7f>; ti,autoidle-shift = <0x8>; reg = <0x190>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x4d>; }; dpll_pcie_ref_m2_ck@210 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x3e>; ti,max-div = <0x7f>; ti,autoidle-shift = <0x8>; reg = <0x210>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x69>; }; dpll_per_x2_ck { #clock-cells = <0x0>; compatible = "ti,omap4-dpll-x2-clock"; clocks = <0x45>; phandle = <0x4a>; }; dpll_per_h11x2_ck@158 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x158>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x4b>; }; dpll_per_h12x2_ck@15c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x15c>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_per_h13x2_ck@160 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x160>; ti,index-starts-at-one; ti,invert-autoidle-bit; }; dpll_per_h14x2_ck@164 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4a>; ti,max-div = <0x3f>; ti,autoidle-shift = <0x8>; reg = <0x164>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x52>; }; dpll_per_m2x2_ck@150 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4a>; ti,max-div = <0x1f>; ti,autoidle-shift = <0x8>; reg = <0x150>; ti,index-starts-at-one; ti,invert-autoidle-bit; phandle = <0x4c>; }; dpll_usb_clkdcoldo { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x49>; clock-mult = <0x1>; clock-div = <0x1>; phandle = <0x4f>; }; func_128m_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x4b>; clock-mult = <0x1>; clock-div = <0x2>; }; func_12m_fclk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x4c>; clock-mult = <0x1>; clock-div = <0x10>; }; func_24m_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x46>; clock-mult = <0x1>; clock-div = <0x4>; }; func_48m_fclk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x4c>; clock-mult = <0x1>; clock-div = <0x4>; }; func_96m_fclk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x4c>; clock-mult = <0x1>; clock-div = <0x2>; }; l3init_60m_fclk@104 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4d>; reg = <0x104>; ti,dividers = <0x1 0x8>; }; clkout2_clk@6b0 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0x4e>; ti,bit-shift = <0x8>; reg = <0x6b0>; }; l3init_960m_gfclk@6c0 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0x4f>; ti,bit-shift = <0x8>; reg = <0x6c0>; }; usb_phy1_always_on_clk32k@640 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0x50>; ti,bit-shift = <0x8>; reg = <0x640>; phandle = <0xd5>; }; usb_phy2_always_on_clk32k@688 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0x50>; ti,bit-shift = <0x8>; reg = <0x688>; phandle = <0xd7>; }; usb_phy3_always_on_clk32k@698 { #clock-cells = <0x0>; compatible = "ti,gate-clock"; clocks = <0x50>; ti,bit-shift = <0x8>; reg = <0x698>; phandle = <0xd8>; }; gpu_core_gclk_mux@1220 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x51 0x52 0x28>; ti,bit-shift = <0x18>; reg = <0x1220>; assigned-clocks = <0x53>; assigned-clock-parents = <0x28>; phandle = <0x53>; }; gpu_hyd_gclk_mux@1220 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x51 0x52 0x28>; ti,bit-shift = <0x1a>; reg = <0x1220>; assigned-clocks = <0x54>; assigned-clock-parents = <0x28>; phandle = <0x54>; }; l3instr_ts_gclk_div@e50 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x55>; ti,bit-shift = <0x18>; reg = <0xe50>; ti,dividers = <0x8 0x10 0x20>; }; vip1_gclk_mux@1020 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0xa 0x56>; ti,bit-shift = <0x18>; reg = <0x1020>; }; vip2_gclk_mux@1028 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0xa 0x56>; ti,bit-shift = <0x18>; reg = <0x1028>; }; vip3_gclk_mux@1030 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0xa 0x56>; ti,bit-shift = <0x18>; reg = <0x1030>; }; }; clockdomains { coreaon_clkdm { compatible = "ti,clockdomain"; clocks = <0x49>; }; }; coreaon_cm@600 { compatible = "ti,omap4-cm"; reg = <0x600 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x600 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x1c>; #clock-cells = <0x2>; phandle = <0xd9>; }; }; l3main1_cm@700 { compatible = "ti,omap4-cm"; reg = <0x700 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x700 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x74>; #clock-cells = <0x2>; }; }; ipu2_cm@900 { compatible = "ti,omap4-cm"; reg = <0x900 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x900 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; dma_cm@a00 { compatible = "ti,omap4-cm"; reg = <0xa00 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0xa00 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; emif_cm@b00 { compatible = "ti,omap4-cm"; reg = <0xb00 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0xb00 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x4>; #clock-cells = <0x2>; }; }; atl_cm@c00 { compatible = "ti,omap4-cm"; reg = <0xc00 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0xc00 0x100>; clk@0 { compatible = "ti,clkctrl"; reg = <0x0 0x4>; #clock-cells = <0x2>; phandle = <0x10>; }; }; l4cfg_cm@d00 { compatible = "ti,omap4-cm"; reg = <0xd00 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0xd00 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x84>; #clock-cells = <0x2>; }; }; l3instr_cm@e00 { compatible = "ti,omap4-cm"; reg = <0xe00 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0xe00 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0xc>; #clock-cells = <0x2>; }; }; dss_cm@1100 { compatible = "ti,omap4-cm"; reg = <0x1100 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x1100 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x14>; #clock-cells = <0x2>; phandle = <0xec>; }; }; l3init_cm@1300 { compatible = "ti,omap4-cm"; reg = <0x1300 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x1300 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0xd4>; #clock-cells = <0x2>; phandle = <0xd2>; }; }; l4per_cm@1700 { compatible = "ti,omap4-cm"; reg = <0x1700 0x300>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x1700 0x300>; clk@0 { compatible = "ti,clkctrl"; reg = <0x0 0x20c>; #clock-cells = <0x2>; assigned-clocks = <0x57 0x168 0x18>; assigned-clock-parents = <0x58>; phandle = <0x57>; }; }; }; }; l4@4ae00000 { compatible = "ti,dra7-l4-wkup", "simple-bus"; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x4ae00000 0x3f000>; counter@4000 { compatible = "ti,omap-counter32k"; reg = <0x4000 0x40>; ti,hwmods = "counter_32k"; }; prm@6000 { compatible = "ti,dra7-prm", "simple-bus"; reg = <0x6000 0x3000>; interrupts = <0x0 0x6 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x6000 0x3000>; clocks { #address-cells = <0x1>; #size-cells = <0x0>; sys_clkin1@110 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>; reg = <0x110>; ti,index-starts-at-one; phandle = <0x11>; }; abe_dpll_sys_clk_mux@118 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x60>; reg = <0x118>; phandle = <0x61>; }; abe_dpll_bypass_clk_mux@114 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x61 0x50>; reg = <0x114>; phandle = <0x13>; }; abe_dpll_clk_mux@10c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x61 0x50>; reg = <0x10c>; phandle = <0x12>; }; abe_24m_fclk@11c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x16>; reg = <0x11c>; ti,dividers = <0x8 0x10>; phandle = <0x58>; }; aess_fclk@178 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x62>; reg = <0x178>; ti,max-div = <0x2>; phandle = <0x63>; }; abe_giclk_div@174 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x63>; reg = <0x174>; ti,max-div = <0x2>; }; abe_lp_clk_div@1d8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x16>; reg = <0x1d8>; ti,dividers = <0x10 0x20>; phandle = <0x83>; }; abe_sys_clk_div@120 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x11>; reg = <0x120>; ti,max-div = <0x2>; }; adc_gfclk_mux@1dc { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x60 0x50>; reg = <0x1dc>; }; sys_clk1_dclk_div@1c8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x11>; ti,max-div = <0x40>; reg = <0x1c8>; ti,index-power-of-two; phandle = <0x6c>; }; sys_clk2_dclk_div@1cc { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x60>; ti,max-div = <0x40>; reg = <0x1cc>; ti,index-power-of-two; phandle = <0x6d>; }; per_abe_x1_dclk_div@1bc { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x64>; ti,max-div = <0x40>; reg = <0x1bc>; ti,index-power-of-two; phandle = <0x6e>; }; dsp_gclk_div@18c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x21>; ti,max-div = <0x40>; reg = <0x18c>; ti,index-power-of-two; phandle = <0x70>; }; gpu_dclk@1a0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x28>; ti,max-div = <0x40>; reg = <0x1a0>; ti,index-power-of-two; phandle = <0x72>; }; emif_phy_dclk_div@190 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x65>; ti,max-div = <0x40>; reg = <0x190>; ti,index-power-of-two; phandle = <0x74>; }; gmac_250m_dclk_div@19c { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x66>; ti,max-div = <0x40>; reg = <0x19c>; ti,index-power-of-two; phandle = <0x67>; }; gmac_main_clk { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x67>; clock-mult = <0x1>; clock-div = <0x2>; phandle = <0xe7>; }; l3init_480m_dclk_div@1ac { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x4d>; ti,max-div = <0x40>; reg = <0x1ac>; ti,index-power-of-two; phandle = <0x79>; }; usb_otg_dclk_div@184 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x68>; ti,max-div = <0x40>; reg = <0x184>; ti,index-power-of-two; phandle = <0x7a>; }; sata_dclk_div@1c0 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x11>; ti,max-div = <0x40>; reg = <0x1c0>; ti,index-power-of-two; phandle = <0x7b>; }; pcie2_dclk_div@1b8 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x69>; ti,max-div = <0x40>; reg = <0x1b8>; ti,index-power-of-two; phandle = <0x7c>; }; pcie_dclk_div@1b4 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x6a>; ti,max-div = <0x40>; reg = <0x1b4>; ti,index-power-of-two; phandle = <0x7d>; }; emu_dclk_div@194 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x11>; ti,max-div = <0x40>; reg = <0x194>; ti,index-power-of-two; phandle = <0x7e>; }; secure_32k_dclk_div@1c4 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x6b>; ti,max-div = <0x40>; reg = <0x1c4>; ti,index-power-of-two; phandle = <0x7f>; }; clkoutmux0_clk_mux@158 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80>; reg = <0x158>; }; clkoutmux1_clk_mux@15c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80>; reg = <0x15c>; }; clkoutmux2_clk_mux@160 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x67 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80>; reg = <0x160>; phandle = <0x4e>; }; custefuse_sys_gfclk_div { #clock-cells = <0x0>; compatible = "fixed-factor-clock"; clocks = <0x11>; clock-mult = <0x1>; clock-div = <0x2>; }; eve_clk@180 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x34 0x37>; reg = <0x180>; }; hdmi_dpll_clk_mux@164 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x60>; reg = <0x164>; }; mlb_clk@134 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x81>; ti,max-div = <0x40>; reg = <0x134>; ti,index-power-of-two; }; mlbp_clk@130 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x82>; ti,max-div = <0x40>; reg = <0x130>; ti,index-power-of-two; }; per_abe_x1_gfclk2_div@138 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x64>; ti,max-div = <0x40>; reg = <0x138>; ti,index-power-of-two; }; timer_sys_clk_div@144 { #clock-cells = <0x0>; compatible = "ti,divider-clock"; clocks = <0x11>; reg = <0x144>; ti,max-div = <0x2>; }; video1_dpll_clk_mux@168 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x60>; reg = <0x168>; }; video2_dpll_clk_mux@16c { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x60>; reg = <0x16c>; }; wkupaon_iclk_mux@108 { #clock-cells = <0x0>; compatible = "ti,mux-clock"; clocks = <0x11 0x83>; reg = <0x108>; phandle = <0x55>; }; }; clockdomains { }; wkupaon_cm@1800 { compatible = "ti,omap4-cm"; reg = <0x1800 0x100>; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x1800 0x100>; clk@20 { compatible = "ti,clkctrl"; reg = <0x20 0x6c>; #clock-cells = <0x2>; phandle = <0x8e>; }; }; }; scm_conf@c000 { compatible = "syscon"; reg = <0xc000 0x1000>; phandle = <0x7>; }; }; axi@0 { compatible = "simple-bus"; #size-cells = <0x1>; #address-cells = <0x1>; ranges = <0x51000000 0x51000000 0x3000 0x0 0x20000000 0x10000000>; pcie@51000000 { reg = <0x51000000 0x2000 0x51002000 0x14c 0x1000 0x2000>; reg-names = "rc_dbics", "ti_conf", "config"; interrupts = <0x0 0xe8 0x4 0x0 0xe9 0x4>; #address-cells = <0x3>; #size-cells = <0x2>; device_type = "pci"; ranges = <0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x20013000 0x13000 0x0 0xffed000>; bus-range = <0x0 0xff>; #interrupt-cells = <0x1>; num-lanes = <0x1>; linux,pci-domain = <0x0>; ti,hwmods = "pcie1"; phys = <0x84>; phy-names = "pcie-phy0"; ti,syscon-lane-sel = <0x85 0x18>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 0x86 0x1 0x0 0x0 0x0 0x2 0x86 0x2 0x0 0x0 0x0 0x3 0x86 0x3 0x0 0x0 0x0 0x4 0x86 0x4>; status = "okay"; compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie"; interrupt-controller { interrupt-controller; #address-cells = <0x0>; #interrupt-cells = <0x1>; phandle = <0x86>; }; }; pcie_ep@51000000 { reg = <0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>; reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space"; interrupts = <0x0 0xe8 0x4>; num-lanes = <0x1>; num-ib-windows = <0x4>; num-ob-windows = <0x10>; ti,hwmods = "pcie1"; phys = <0x84>; phy-names = "pcie-phy0"; ti,syscon-unaligned-access = <0x87 0x14 0x1>; ti,syscon-lane-sel = <0x85 0x18>; status = "disabled"; compatible = "ti,dra746-pcie-ep", "ti,dra7-pcie-ep"; }; }; axi@1 { compatible = "simple-bus"; #size-cells = <0x1>; #address-cells = <0x1>; ranges = <0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>; status = "disabled"; pcie@51800000 { reg = <0x51800000 0x2000 0x51802000 0x14c 0x1000 0x2000>; reg-names = "rc_dbics", "ti_conf", "config"; interrupts = <0x0 0x163 0x4 0x0 0x164 0x4>; #address-cells = <0x3>; #size-cells = <0x2>; device_type = "pci"; ranges = <0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x0 0xffed000>; bus-range = <0x0 0xff>; #interrupt-cells = <0x1>; num-lanes = <0x1>; linux,pci-domain = <0x1>; ti,hwmods = "pcie2"; phys = <0x88>; phy-names = "pcie-phy0"; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 0x89 0x1 0x0 0x0 0x0 0x2 0x89 0x2 0x0 0x0 0x0 0x3 0x89 0x3 0x0 0x0 0x0 0x4 0x89 0x4>; compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie"; interrupt-controller { interrupt-controller; #address-cells = <0x0>; #interrupt-cells = <0x1>; phandle = <0x89>; }; }; }; ocmcram@40300000 { compatible = "mmio-sram"; reg = <0x40300000 0x80000>; ranges = <0x0 0x40300000 0x80000>; #address-cells = <0x1>; #size-cells = <0x1>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; phandle = <0x103>; sram-hs@0 { compatible = "ti,secure-ram"; reg = <0x0 0x0>; }; }; ocmcram@40400000 { status = "disabled"; compatible = "mmio-sram"; reg = <0x40400000 0x100000>; ranges = <0x0 0x40400000 0x100000>; #address-cells = <0x1>; #size-cells = <0x1>; }; ocmcram@40500000 { status = "disabled"; compatible = "mmio-sram"; reg = <0x40500000 0x100000>; ranges = <0x0 0x40500000 0x100000>; #address-cells = <0x1>; #size-cells = <0x1>; }; bandgap@4a0021e0 { reg = <0x4a0021e0 0xc 0x4a00232c 0xc 0x4a002380 0x2c 0x4a0023c0 0x3c 0x4a002564 0x8 0x4a002574 0x50>; compatible = "ti,dra752-bandgap"; interrupts = <0x0 0x79 0x4>; #thermal-sensor-cells = <0x1>; phandle = <0xfa>; }; dsp_system@40d00000 { compatible = "syscon"; reg = <0x40d00000 0x100>; phandle = <0xce>; }; padconf@4844a000 { compatible = "ti,dra7-iodelay"; reg = <0x4844a000 0xd1c>; #address-cells = <0x1>; #size-cells = <0x0>; #pinctrl-cells = <0x2>; mmc1_iodelay_ddr_rev11_conf { pinctrl-pin-array = <0x618 0x23c 0x21c 0x620 0x5f5 0x0 0x624 0x0 0x258 0x628 0x0 0x0 0x62c 0x37 0x0 0x630 0x193 0x78 0x634 0x0 0x0 0x638 0x0 0x0 0x63c 0x17 0x3c 0x640 0x0 0x0 0x644 0x0 0x0 0x648 0x19 0x3c 0x64c 0x0 0x0 0x650 0x0 0x0 0x654 0x0 0x0 0x658 0x0 0x0 0x65c 0x0 0x0>; phandle = <0xb6>; }; mmc1_iodelay_ddr50_rev20_conf { pinctrl-pin-array = <0x618 0x434 0x14a 0x620 0x4f7 0x0 0x624 0x2d2 0x0 0x628 0x0 0x0 0x62c 0x0 0x0 0x630 0x2ef 0x0 0x634 0x0 0x0 0x638 0x14 0x0 0x63c 0x100 0x0 0x640 0x0 0x0 0x644 0x0 0x0 0x648 0x107 0x0 0x64c 0x0 0x0 0x650 0x0 0x0 0x654 0x0 0x0 0x658 0x0 0x0 0x65c 0x0 0x0>; phandle = <0xb9>; }; mmc1_iodelay_sdr104_rev11_conf { pinctrl-pin-array = <0x620 0x427 0x11 0x628 0x0 0x0 0x62c 0x17 0x0 0x634 0x0 0x0 0x638 0x0 0x0 0x640 0x0 0x0 0x644 0x2 0x0 0x64c 0x0 0x0 0x650 0x0 0x0 0x658 0x0 0x0 0x65c 0x0 0x0>; phandle = <0xb8>; }; mmc1_iodelay_sdr104_rev20_conf { pinctrl-pin-array = <0x620 0x258 0x190 0x628 0x0 0x0 0x62c 0x0 0x0 0x634 0x0 0x0 0x638 0x1e 0x0 0x640 0x0 0x0 0x644 0x0 0x0 0x64c 0x0 0x0 0x650 0x0 0x0 0x658 0x0 0x0 0x65c 0x0 0x0>; phandle = <0xba>; }; mmc2_iodelay_hs200_rev11_conf { pinctrl-pin-array = <0x190 0x26d 0x258 0x194 0x12c 0x0 0x1a8 0x2e3 0x258 0x1ac 0xf0 0x0 0x1b4 0x32c 0x258 0x1b8 0xf0 0x0 0x1c0 0x3ba 0x258 0x1c4 0x3c 0x0 0x1d0 0x53c 0x1a4 0x1d8 0x3a7 0x258 0x1dc 0x0 0x0 0x1e4 0x20d 0x258 0x1e8 0x78 0x0 0x1f0 0x2ff 0x258 0x1f4 0xe1 0x0 0x1fc 0x235 0x258 0x200 0x3c 0x0 0x364 0x3c9 0x258 0x368 0xb4 0x0>; phandle = <0xc2>; }; mmc2_iodelay_hs200_rev20_conf { pinctrl-pin-array = <0x190 0x112 0x0 0x194 0xa2 0x0 0x1a8 0x191 0x0 0x1ac 0x49 0x0 0x1b4 0x1d1 0x0 0x1b8 0x73 0x0 0x1c0 0x279 0x0 0x1c4 0x2f 0x0 0x1d0 0x3a7 0x118 0x1d8 0x26d 0x0 0x1dc 0x0 0x0 0x1e4 0xb7 0x0 0x1e8 0x0 0x0 0x1f0 0x1d3 0x0 0x1f4 0x0 0x0 0x1fc 0x106 0x0 0x200 0x2e 0x0 0x364 0x2ac 0x0 0x368 0x4c 0x0>; phandle = <0xc3>; }; mmc2_iodelay_ddr_3_3v_rev11_conf { pinctrl-pin-array = <0x18c 0x0 0x78 0x190 0x0 0x0 0x194 0xae 0x0 0x1a4 0x109 0x168 0x1a8 0x0 0x0 0x1ac 0xa8 0x0 0x1b0 0x0 0x78 0x1b4 0x0 0x0 0x1b8 0x88 0x0 0x1bc 0x0 0x78 0x1c0 0x0 0x0 0x1c4 0x0 0x0 0x1c8 0x11f 0x1a4 0x1d0 0x36f 0x0 0x1d4 0x90 0xf0 0x1d8 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x78 0x1f0 0x0 0x0 0x1f4 0x78 0x0 0x1f8 0x78 0xb4 0x1fc 0x0 0x0 0x200 0x0 0x0 0x360 0x0 0x0 0x364 0x0 0x0 0x368 0xb 0x0>; }; mmc2_iodelay_ddr_1_8v_rev11_conf { pinctrl-pin-array = <0x18c 0x0 0x0 0x190 0x0 0x0 0x194 0xae 0x0 0x1a4 0x112 0xf0 0x1a8 0x0 0x0 0x1ac 0xa8 0x0 0x1b0 0x0 0x3c 0x1b4 0x0 0x0 0x1b8 0x88 0x0 0x1bc 0x0 0x3c 0x1c0 0x0 0x0 0x1c4 0x0 0x0 0x1c8 0x202 0x168 0x1d0 0x36f 0x0 0x1d4 0xbb 0x78 0x1d8 0x0 0x0 0x1dc 0x0 0x0 0x1e0 0x0 0x0 0x1e4 0x0 0x0 0x1e8 0x22 0x0 0x1ec 0x0 0x3c 0x1f0 0x0 0x0 0x1f4 0x78 0x0 0x1f8 0x79 0x3c 0x1fc 0x0 0x0 0x200 0x0 0x0 0x360 0x0 0x0 0x364 0x0 0x0 0x368 0xb 0x0>; phandle = <0xbf>; }; mmc3_iodelay_manual1_conf { pinctrl-pin-array = <0x678 0x196 0x0 0x680 0x293 0x0 0x684 0x0 0x0 0x688 0x0 0x0 0x68c 0x0 0x0 0x690 0x82 0x0 0x694 0x0 0x0 0x698 0x0 0x0 0x69c 0xa9 0x0 0x6a0 0x0 0x0 0x6a4 0x0 0x0 0x6a8 0x0 0x0 0x6ac 0x0 0x0 0x6b0 0x0 0x0 0x6b4 0x1c9 0x0 0x6b8 0x0 0x0 0x6bc 0x0 0x0>; }; mmc4_iodelay_ds_rev11_conf { pinctrl-pin-array = <0x840 0x0 0x0 0x848 0x0 0x0 0x84c 0x60 0x0 0x850 0x0 0x0 0x854 0x0 0x0 0x870 0x246 0x0 0x874 0x0 0x0 0x878 0x0 0x0 0x87c 0x187 0x0 0x880 0x0 0x0 0x884 0x0 0x0 0x888 0x231 0x0 0x88c 0x0 0x0 0x890 0x0 0x0 0x894 0x24c 0x0 0x898 0x0 0x0 0x89c 0x0 0x0>; phandle = <0xc7>; }; mmc4_iodelay_ds_rev20_conf { pinctrl-pin-array = <0x840 0x0 0x0 0x848 0x0 0x0 0x84c 0x133 0x0 0x850 0x0 0x0 0x854 0x0 0x0 0x870 0x311 0x0 0x874 0x0 0x0 0x878 0x0 0x0 0x87c 0x265 0x0 0x880 0x0 0x0 0x884 0x0 0x0 0x888 0x2ab 0x0 0x88c 0x0 0x0 0x890 0x0 0x0 0x894 0x343 0x0 0x898 0x0 0x0 0x89c 0x0 0x0>; phandle = <0xc8>; }; mmc4_iodelay_sdr12_hs_sdr25_rev11_conf { pinctrl-pin-array = <0x840 0x0 0x0 0x848 0xa5b 0x0 0x84c 0x624 0x0 0x850 0x0 0x0 0x854 0x0 0x0 0x870 0x779 0x0 0x874 0x0 0x0 0x878 0x0 0x0 0x87c 0x6b9 0x0 0x880 0x0 0x0 0x884 0x0 0x0 0x888 0x763 0x0 0x88c 0x0 0x0 0x890 0x0 0x0 0x894 0x77f 0x0 0x898 0x0 0x0 0x89c 0x0 0x0>; phandle = <0xca>; }; mmc4_iodelay_sdr12_hs_sdr25_rev20_conf { pinctrl-pin-array = <0x840 0x0 0x0 0x848 0x47b 0x0 0x84c 0x72a 0x0 0x850 0x0 0x0 0x854 0x0 0x0 0x870 0x875 0x0 0x874 0x0 0x0 0x878 0x0 0x0 0x87c 0x789 0x40 0x880 0x0 0x0 0x884 0x0 0x0 0x888 0x78f 0x80 0x88c 0x0 0x0 0x890 0x0 0x0 0x894 0x87c 0x2c 0x898 0x0 0x0 0x89c 0x0 0x0>; phandle = <0xcb>; }; }; dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; interrupts = <0x0 0x7 0x4 0x0 0x8 0x4 0x0 0x9 0x4 0x0 0xa 0x4>; #dma-cells = <0x1>; dma-channels = <0x20>; dma-requests = <0x7f>; ti,hwmods = "dma_system"; phandle = <0xe>; }; edma@43300000 { compatible = "ti,edma3-tpcc"; ti,hwmods = "tpcc"; reg = <0x43300000 0x100000>; reg-names = "edma3_cc"; interrupts = <0x0 0x169 0x4 0x0 0x168 0x4 0x0 0x167 0x4>; interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint"; dma-requests = <0x20>; #dma-cells = <0x2>; ti,tptcs = <0x8a 0x7 0x8b 0x0>; phandle = <0xf>; }; tptc@43400000 { compatible = "ti,edma3-tptc"; ti,hwmods = "tptc0"; reg = <0x43400000 0x100000>; interrupts = <0x0 0x172 0x4>; interrupt-names = "edma3_tcerrint"; phandle = <0x8a>; }; tptc@43500000 { compatible = "ti,edma3-tptc"; ti,hwmods = "tptc1"; reg = <0x43500000 0x100000>; interrupts = <0x0 0x173 0x4>; interrupt-names = "edma3_tcerrint"; phandle = <0x8b>; }; gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; interrupts = <0x0 0x18 0x4>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-idle; ti,no-reset-on-init; }; gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; interrupts = <0x0 0x19 0x4>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-idle; ti,no-reset-on-init; }; gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; interrupts = <0x0 0x1a 0x4>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-reset-on-init; ti,no-idle-on-init; phandle = <0xa0>; }; gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; interrupts = <0x0 0x1b 0x4>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-idle; ti,no-reset-on-init; }; gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; interrupts = <0x0 0x1c 0x4>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-reset-on-init; ti,no-idle-on-init; phandle = <0xa5>; }; gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; interrupts = <0x0 0x1d 0x4>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-reset-on-init; ti,no-idle-on-init; ti,no-idle; phandle = <0xa7>; }; gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; interrupts = <0x0 0x1e 0x4>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-reset-on-init; ti,no-idle-on-init; phandle = <0x108>; }; gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; interrupts = <0x0 0x74 0x4>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <0x2>; interrupt-controller; #interrupt-cells = <0x2>; ti,no-reset-on-init; ti,no-idle-on-init; phandle = <0x9f>; }; serial@4806a000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806a000 0x100>; interrupts-extended = <0x1 0x0 0x43 0x4 0x8c 0x3e0>; ti,hwmods = "uart1"; clock-frequency = <0x2dc6c00>; status = "okay"; dmas = <0x8d 0x31 0x8d 0x32>; dma-names = "tx", "rx"; }; serial@4806c000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806c000 0x100>; interrupts-extended = <0x1 0x0 0x44 0x4 0x8c 0x3e0>; ti,hwmods = "uart2"; clock-frequency = <0x2dc6c00>; status = "okay"; dmas = <0x8d 0x33 0x8d 0x34>; dma-names = "tx", "rx"; }; serial@48020000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48020000 0x100>; interrupts = <0x0 0x45 0x4>; ti,hwmods = "uart3"; clock-frequency = <0x2dc6c00>; status = "okay"; dmas = <0x8d 0x35 0x8d 0x36>; dma-names = "tx", "rx"; }; serial@4806e000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4806e000 0x100>; interrupts = <0x0 0x41 0x4>; ti,hwmods = "uart4"; clock-frequency = <0x2dc6c00>; status = "disabled"; dmas = <0x8d 0x37 0x8d 0x38>; dma-names = "tx", "rx"; }; serial@48066000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48066000 0x100>; interrupts = <0x0 0x64 0x4>; ti,hwmods = "uart5"; clock-frequency = <0x2dc6c00>; status = "disabled"; dmas = <0x8d 0x3f 0x8d 0x40>; dma-names = "tx", "rx"; }; serial@48068000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48068000 0x100>; interrupts = <0x0 0x65 0x4>; ti,hwmods = "uart6"; clock-frequency = <0x2dc6c00>; status = "disabled"; dmas = <0x8d 0x4f 0x8d 0x50>; dma-names = "tx", "rx"; }; serial@48420000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48420000 0x100>; interrupts = <0x0 0xda 0x4>; ti,hwmods = "uart7"; clock-frequency = <0x2dc6c00>; status = "disabled"; }; serial@48422000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48422000 0x100>; interrupts = <0x0 0xdb 0x4>; ti,hwmods = "uart8"; clock-frequency = <0x2dc6c00>; status = "disabled"; }; serial@48424000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x48424000 0x100>; interrupts = <0x0 0xdc 0x4>; ti,hwmods = "uart9"; clock-frequency = <0x2dc6c00>; status = "disabled"; }; serial@4ae2b000 { compatible = "ti,dra742-uart", "ti,omap4-uart"; reg = <0x4ae2b000 0x100>; interrupts = <0x0 0xdd 0x4>; ti,hwmods = "uart10"; clock-frequency = <0x2dc6c00>; status = "disabled"; }; mailbox@4a0f4000 { compatible = "ti,omap4-mailbox"; reg = <0x4a0f4000 0x200>; interrupts = <0x0 0x15 0x4 0x0 0x87 0x4 0x0 0x86 0x4>; ti,hwmods = "mailbox1"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x3>; ti,mbox-num-fifos = <0x8>; status = "disabled"; }; mailbox@4883a000 { compatible = "ti,omap4-mailbox"; reg = <0x4883a000 0x200>; interrupts = <0x0 0xed 0x4 0x0 0xee 0x4 0x0 0xef 0x4 0x0 0xf0 0x4>; ti,hwmods = "mailbox2"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@4883c000 { compatible = "ti,omap4-mailbox"; reg = <0x4883c000 0x200>; interrupts = <0x0 0xf1 0x4 0x0 0xf2 0x4 0x0 0xf3 0x4 0x0 0xf4 0x4>; ti,hwmods = "mailbox3"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@4883e000 { compatible = "ti,omap4-mailbox"; reg = <0x4883e000 0x200>; interrupts = <0x0 0xf5 0x4 0x0 0xf6 0x4 0x0 0xf7 0x4 0x0 0xf8 0x4>; ti,hwmods = "mailbox4"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48840000 { compatible = "ti,omap4-mailbox"; reg = <0x48840000 0x200>; interrupts = <0x0 0xf9 0x4 0x0 0xfa 0x4 0x0 0xfb 0x4 0x0 0xfc 0x4>; ti,hwmods = "mailbox5"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "okay"; phandle = <0x91>; mbox_ipu1_ipc3x { ti,mbox-tx = <0x6 0x2 0x2>; ti,mbox-rx = <0x4 0x2 0x2>; status = "okay"; phandle = <0x92>; }; mbox_dsp1_ipc3x { ti,mbox-tx = <0x5 0x2 0x2>; ti,mbox-rx = <0x1 0x2 0x2>; status = "okay"; phandle = <0x9c>; }; }; mailbox@48842000 { compatible = "ti,omap4-mailbox"; reg = <0x48842000 0x200>; interrupts = <0x0 0xfd 0x4 0x0 0xfe 0x4 0x0 0xff 0x4 0x0 0x100 0x4>; ti,hwmods = "mailbox6"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "okay"; phandle = <0x96>; mbox_ipu2_ipc3x { ti,mbox-tx = <0x6 0x2 0x2>; ti,mbox-rx = <0x4 0x2 0x2>; status = "okay"; phandle = <0x97>; }; mbox_dsp2_ipc3x { ti,mbox-tx = <0x5 0x2 0x2>; ti,mbox-rx = <0x1 0x2 0x2>; status = "okay"; phandle = <0xf7>; }; }; mailbox@48844000 { compatible = "ti,omap4-mailbox"; reg = <0x48844000 0x200>; interrupts = <0x0 0x101 0x4 0x0 0x102 0x4 0x0 0x103 0x4 0x0 0x104 0x4>; ti,hwmods = "mailbox7"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48846000 { compatible = "ti,omap4-mailbox"; reg = <0x48846000 0x200>; interrupts = <0x0 0x105 0x4 0x0 0x106 0x4 0x0 0x107 0x4 0x0 0x108 0x4>; ti,hwmods = "mailbox8"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@4885e000 { compatible = "ti,omap4-mailbox"; reg = <0x4885e000 0x200>; interrupts = <0x0 0x109 0x4 0x0 0x10a 0x4 0x0 0x10b 0x4 0x0 0x10c 0x4>; ti,hwmods = "mailbox9"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48860000 { compatible = "ti,omap4-mailbox"; reg = <0x48860000 0x200>; interrupts = <0x0 0x10d 0x4 0x0 0x10e 0x4 0x0 0x10f 0x4 0x0 0x110 0x4>; ti,hwmods = "mailbox10"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48862000 { compatible = "ti,omap4-mailbox"; reg = <0x48862000 0x200>; interrupts = <0x0 0x111 0x4 0x0 0x112 0x4 0x0 0x113 0x4 0x0 0x114 0x4>; ti,hwmods = "mailbox11"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48864000 { compatible = "ti,omap4-mailbox"; reg = <0x48864000 0x200>; interrupts = <0x0 0x115 0x4 0x0 0x116 0x4 0x0 0x117 0x4 0x0 0x118 0x4>; ti,hwmods = "mailbox12"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; mailbox@48802000 { compatible = "ti,omap4-mailbox"; reg = <0x48802000 0x200>; interrupts = <0x0 0x17b 0x4 0x0 0x17c 0x4 0x0 0x17d 0x4 0x0 0x17e 0x4>; ti,hwmods = "mailbox13"; #mbox-cells = <0x1>; ti,mbox-num-users = <0x4>; ti,mbox-num-fifos = <0xc>; status = "disabled"; }; timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; interrupts = <0x0 0x20 0x4>; ti,hwmods = "timer1"; ti,timer-alwon; clock-names = "fck"; clocks = <0x8e 0x20 0x18>; }; timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; interrupts = <0x0 0x21 0x4>; ti,hwmods = "timer2"; clocks = <0x57 0x38 0x18>; clock-names = "fck"; }; timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; interrupts = <0x0 0x22 0x4>; ti,hwmods = "timer3"; clocks = <0x57 0x40 0x18>; clock-names = "fck"; }; timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; interrupts = <0x0 0x23 0x4>; ti,hwmods = "timer4"; clocks = <0x57 0x48 0x18>; clock-names = "fck"; }; timer@48820000 { compatible = "ti,omap5430-timer"; reg = <0x48820000 0x80>; interrupts = <0x0 0x24 0x4>; ti,hwmods = "timer5"; clocks = <0x8f 0x18 0x18>; clock-names = "fck"; phandle = <0x9d>; }; timer@48822000 { compatible = "ti,omap5430-timer"; reg = <0x48822000 0x80>; interrupts = <0x0 0x25 0x4>; ti,hwmods = "timer6"; clocks = <0x8f 0x20 0x18>; clock-names = "fck"; phandle = <0xf8>; }; timer@48824000 { compatible = "ti,omap5430-timer"; reg = <0x48824000 0x80>; interrupts = <0x0 0x26 0x4>; ti,hwmods = "timer7"; clocks = <0x8f 0x28 0x18>; clock-names = "fck"; }; timer@48826000 { compatible = "ti,omap5430-timer"; reg = <0x48826000 0x80>; interrupts = <0x0 0x27 0x4>; ti,hwmods = "timer8"; clocks = <0x8f 0x30 0x18>; clock-names = "fck"; }; timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; interrupts = <0x0 0x28 0x4>; ti,hwmods = "timer9"; clocks = <0x57 0x50 0x18>; clock-names = "fck"; phandle = <0x98>; }; timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; interrupts = <0x0 0x29 0x4>; ti,hwmods = "timer10"; clocks = <0x57 0x28 0x18>; clock-names = "fck"; }; timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; interrupts = <0x0 0x2a 0x4>; ti,hwmods = "timer11"; clocks = <0x57 0x30 0x18>; clock-names = "fck"; phandle = <0x93>; }; timer@4ae20000 { compatible = "ti,omap5430-timer"; reg = <0x4ae20000 0x80>; interrupts = <0x0 0x5a 0x4>; ti,hwmods = "timer12"; ti,timer-alwon; ti,timer-secure; clocks = <0x8e 0x28 0x18>; clock-names = "fck"; }; timer@48828000 { compatible = "ti,omap5430-timer"; reg = <0x48828000 0x80>; interrupts = <0x0 0x153 0x4>; ti,hwmods = "timer13"; clocks = <0x57 0xc8 0x18>; clock-names = "fck"; }; timer@4882a000 { compatible = "ti,omap5430-timer"; reg = <0x4882a000 0x80>; interrupts = <0x0 0x154 0x4>; ti,hwmods = "timer14"; clocks = <0x57 0xd0 0x18>; clock-names = "fck"; }; timer@4882c000 { compatible = "ti,omap5430-timer"; reg = <0x4882c000 0x80>; interrupts = <0x0 0x155 0x4>; ti,hwmods = "timer15"; clocks = <0x57 0xd8 0x18>; clock-names = "fck"; }; timer@4882e000 { compatible = "ti,omap5430-timer"; reg = <0x4882e000 0x80>; interrupts = <0x0 0x156 0x4>; ti,hwmods = "timer16"; clocks = <0x57 0x130 0x18>; clock-names = "fck"; }; wdt@4ae14000 { compatible = "ti,omap3-wdt"; reg = <0x4ae14000 0x80>; interrupts = <0x0 0x4b 0x4>; ti,hwmods = "wd_timer2"; status = "disabled"; ti,no-idle; ti,no-reset-on-init; }; spinlock@4a0f6000 { compatible = "ti,omap4-hwspinlock"; reg = <0x4a0f6000 0x1000>; ti,hwmods = "spinlock"; #hwlock-cells = <0x1>; }; dmm@4e000000 { compatible = "ti,omap5-dmm"; reg = <0x4e000000 0x800>; interrupts = <0x0 0x6c 0x4>; ti,hwmods = "dmm"; }; ipu@58820000 { compatible = "ti,dra7-ipu"; reg = <0x58820000 0x10000>; reg-names = "l2ram"; ti,hwmods = "ipu1"; iommus = <0x90>; ti,rproc-standby-info = <0x4a005520>; status = "okay"; mboxes = <0x91 0x92>; timers = <0x93>; memory-region = <0x94>; }; ipu@55020000 { compatible = "ti,dra7-ipu"; reg = <0x55020000 0x10000>; reg-names = "l2ram"; ti,hwmods = "ipu2"; iommus = <0x95>; ti,rproc-standby-info = <0x4a008920>; status = "okay"; mboxes = <0x96 0x97>; timers = <0x98 0x93>; memory-region = <0x99>; }; dsp@40800000 { compatible = "ti,dra7-dsp"; reg = <0x40800000 0x48000 0x40e00000 0x8000 0x40f00000 0x8000>; reg-names = "l2ram", "l1pram", "l1dram"; ti,hwmods = "dsp1"; syscon-bootreg = <0x9 0x55c>; iommus = <0x9a 0x9b>; ti,rproc-standby-info = <0x4a005420>; status = "okay"; mboxes = <0x91 0x9c>; timers = <0x9d>; memory-region = <0x9e>; }; i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; interrupts = <0x0 0x33 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "i2c1"; status = "okay"; clock-frequency = <0x61a80>; tps659038@58 { compatible = "ti,tps659038"; reg = <0x58>; ti,palmas-override-powerhold; ti,system-power-controller; tps659038_pmic { compatible = "ti,tps659038-pmic"; regulators { smps123 { regulator-name = "smps123"; regulator-min-microvolt = <0xcf850>; regulator-max-microvolt = <0x1312d0>; regulator-always-on; regulator-boot-on; phandle = <0x6>; }; smps45 { regulator-name = "smps45"; regulator-min-microvolt = <0xcf850>; regulator-max-microvolt = <0x1312d0>; regulator-always-on; regulator-boot-on; }; smps6 { regulator-name = "smps6"; regulator-min-microvolt = <0xcf850>; regulator-max-microvolt = <0x1312d0>; regulator-always-on; regulator-boot-on; }; smps7 { regulator-name = "smps7"; regulator-min-microvolt = <0xcf850>; regulator-max-microvolt = <0x118c30>; regulator-always-on; regulator-boot-on; }; smps8 { regulator-name = "smps8"; regulator-min-microvolt = <0xcf850>; regulator-max-microvolt = <0x1312d0>; regulator-always-on; regulator-boot-on; }; smps9 { regulator-name = "smps9"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-always-on; regulator-boot-on; phandle = <0x102>; }; ldo1 { regulator-name = "ldo1"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x325aa0>; regulator-always-on; regulator-boot-on; phandle = <0xaf>; }; ldo2 { regulator-name = "ldo2"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-always-on; regulator-boot-on; }; ldo3 { regulator-name = "ldo3"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-always-on; regulator-boot-on; phandle = <0xee>; }; ldo9 { regulator-name = "ldo9"; regulator-min-microvolt = <0x100590>; regulator-max-microvolt = <0x100590>; regulator-always-on; regulator-boot-on; regulator-allow-bypass; }; ldoln { regulator-name = "ldoln"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-always-on; regulator-boot-on; phandle = <0xed>; }; ldousb { regulator-name = "ldousb"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; regulator-boot-on; phandle = <0xd6>; }; regen2 { regulator-name = "regen2"; regulator-boot-on; regulator-always-on; }; sysen1 { regulator-name = "sysen1"; regulator-boot-on; regulator-always-on; phandle = <0x104>; }; sysen2 { regulator-name = "sysen2"; regulator-boot-on; regulator-always-on; phandle = <0x107>; }; }; }; }; serdes@40 { compatible = "max96705-serdes"; reg = <0x40>; phandle = <0xa1>; }; serdes@49 { compatible = "max96705-serdes"; reg = <0x49>; phandle = <0xa2>; }; serdes@4b { compatible = "max96705-serdes"; reg = <0x4b>; phandle = <0xa3>; }; serdes@4d { compatible = "max96705-serdes"; reg = <0x4d>; phandle = <0xa4>; }; serdes@4f { compatible = "max96705-serdes"; reg = <0x4f>; phandle = <0xa6>; }; serdes@48 { compatible = "max96706-serdes"; reg = <0x48>; all-des-power-gpio = <0x9f 0xe 0x0>; all-des-power-good-gpio = <0x9f 0xf 0x0>; des-power-gpio = <0xa0 0x13 0x0>; all-ser-power-gpio = <0x9f 0xc 0x0>; all-ser-power-good-gpio = <0x9f 0xd 0x0>; serializer_adapter_default = <0xa1>; serializer_adapter_link = <0xa2>; }; serdes@4a { compatible = "max96706-serdes"; reg = <0x4a>; all-des-power-gpio = <0x9f 0xe 0x0>; all-des-power-good-gpio = <0x9f 0xf 0x0>; des-power-gpio = <0xa0 0x19 0x0>; all-ser-power-gpio = <0x9f 0xc 0x0>; all-ser-power-good-gpio = <0x9f 0xd 0x0>; serializer_adapter_default = <0xa1>; serializer_adapter_link = <0xa3>; }; serdes@4c { compatible = "max96706-serdes"; reg = <0x4c>; all-des-power-gpio = <0x9f 0xe 0x0>; all-des-power-good-gpio = <0x9f 0xf 0x0>; des-power-gpio = <0x9f 0x3 0x0>; all-ser-power-gpio = <0x9f 0xc 0x0>; all-ser-power-good-gpio = <0x9f 0xd 0x0>; serializer_adapter_default = <0xa1>; serializer_adapter_link = <0xa4>; }; serdes@4e { compatible = "max96706-serdes"; reg = <0x4e>; all-des-power-gpio = <0x9f 0xe 0x0>; all-des-power-good-gpio = <0x9f 0xf 0x0>; des-power-gpio = <0xa5 0xd 0x0>; all-ser-power-gpio = <0x9f 0xc 0x0>; all-ser-power-good-gpio = <0x9f 0xd 0x0>; serializer_adapter_default = <0xa1>; serializer_adapter_link = <0xa6>; }; gpio@20 { compatible = "ti,pcf8575", "nxp,pcf8575"; reg = <0x20>; gpio-controller; #gpio-cells = <0x2>; interrupt-parent = <0xa7>; interrupts = <0xb 0x2>; interrupt-controller; #interrupt-cells = <0x2>; phandle = <0x101>; }; gpio@21 { compatible = "ti,pcf8575", "nxp,pcf8575"; reg = <0x21>; lines-initial-states = <0x1408>; gpio-controller; #gpio-cells = <0x2>; interrupt-parent = <0xa7>; interrupts = <0xb 0x2>; interrupt-controller; #interrupt-cells = <0x2>; phandle = <0xfd>; }; tlv320aic3106@19 { #sound-dai-cells = <0x0>; compatible = "ti,tlv320aic3106"; reg = <0x19>; adc-settle-ms = <0x28>; ai3x-micbias-vg = <0x1>; status = "okay"; AVDD-supply = <0xa8>; IOVDD-supply = <0xa8>; DRVDD-supply = <0xa8>; DVDD-supply = <0xa9>; phandle = <0x100>; }; }; i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; interrupts = <0x0 0x34 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "i2c2"; status = "disabled"; clock-frequency = <0x61a80>; ti,no-idle; ti,no-reset-on-init; phandle = <0x10c>; gpio@26 { compatible = "ti,pcf8575", "nxp,pcf8575"; reg = <0x26>; gpio-controller; #gpio-cells = <0x2>; phandle = <0xab>; p1 { gpio-hog; gpios = <0x1 0x0>; output-low; line-name = "vin6_sel_s0"; }; }; ov10633@37 { compatible = "ovti,ov10633"; reg = <0x37>; clocks = <0xaa>; clock-names = "xvclk"; mux-gpios = <0xab 0x3 0x1>; port { endpoint { remote-endpoint = <0xac>; hsync-active = <0x1>; vsync-active = <0x1>; pclk-sample = <0x0>; phandle = <0xf3>; }; }; }; }; i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; interrupts = <0x0 0x38 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "i2c3"; status = "okay"; clock-frequency = <0x61a80>; }; i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; interrupts = <0x0 0x39 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "i2c4"; status = "okay"; clock-frequency = <0x61a80>; }; i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; interrupts = <0x0 0x37 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "i2c5"; status = "disabled"; }; mmc@4809c000 { compatible = "ti,dra7-sdhci"; reg = <0x4809c000 0x400>; interrupts = <0x0 0x4e 0x4>; ti,hwmods = "mmc1"; status = "okay"; pbias-supply = <0xad>; max-frequency = <0xb71b000>; mmc-ddr-1_8v; mmc-ddr-3_3v; vmmc-supply = <0xae>; vqmmc-supply = <0xaf>; bus-width = <0x4>; cd-gpios = <0xa7 0x1b 0x1>; pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104"; pinctrl-0 = <0xb0>; pinctrl-1 = <0xb1>; pinctrl-2 = <0xb2>; pinctrl-3 = <0xb3>; pinctrl-4 = <0xb4>; pinctrl-5 = <0xb5 0xb6>; pinctrl-6 = <0xb7 0xb8>; pinctrl-7 = <0xb5 0xb9>; pinctrl-8 = <0xb7 0xba>; }; 1w@480b2000 { compatible = "ti,omap3-1w"; reg = <0x480b2000 0x1000>; interrupts = <0x0 0x35 0x4>; ti,hwmods = "hdq1w"; }; mmc@480b4000 { compatible = "ti,dra7-sdhci"; reg = <0x480b4000 0x400>; interrupts = <0x0 0x51 0x4>; ti,hwmods = "mmc2"; status = "okay"; max-frequency = <0xb71b000>; sdhci-caps-mask = <0x7 0x0>; mmc-hs200-1_8v; mmc-ddr-1_8v; mmc-ddr-3_3v; vmmc-supply = <0xbb>; vqmmc-supply = <0xbb>; bus-width = <0x8>; non-removable; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <0xbc>; pinctrl-1 = <0xbd>; pinctrl-2 = <0xbe 0xbf>; pinctrl-3 = <0xc0>; pinctrl-4 = <0xc1 0xc2>; pinctrl-5 = <0xc1 0xc3>; }; mmc@480ad000 { compatible = "ti,dra7-sdhci"; reg = <0x480ad000 0x400>; interrupts = <0x0 0x59 0x4>; ti,hwmods = "mmc3"; status = "disabled"; max-frequency = <0x3d09000>; sdhci-caps-mask = <0x0 0x400000>; }; mmc@480d1000 { compatible = "ti,dra7-sdhci"; reg = <0x480d1000 0x400>; interrupts = <0x0 0x5b 0x4>; ti,hwmods = "mmc4"; status = "okay"; max-frequency = <0xb71b000>; sdhci-caps-mask = <0x0 0x400000>; bus-width = <0x4>; cap-power-off-card; keep-power-in-suspend; non-removable; #address-cells = <0x1>; #size-cells = <0x0>; vmmc-supply = <0xc4>; vqmmc-supply = <0xc5>; pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25"; pinctrl-0 = <0xc6 0xc7>; pinctrl-1 = <0xc6 0xc8>; pinctrl-2 = <0xc9 0xca>; pinctrl-3 = <0xc9 0xcb>; pinctrl-4 = <0xcc 0xca>; pinctrl-5 = <0xcc 0xcb>; pinctrl-6 = <0xcd 0xca>; pinctrl-7 = <0xcd 0xcb>; wifi@2 { compatible = "ti,wl1835"; reg = <0x2>; interrupt-parent = <0xa5>; interrupts = <0x7 0x1>; }; }; mmu@40d01000 { compatible = "ti,dra7-dsp-iommu"; reg = <0x40d01000 0x100>; interrupts = <0x0 0x17 0x4>; ti,hwmods = "mmu0_dsp1"; #iommu-cells = <0x0>; ti,syscon-mmuconfig = <0xce 0x0>; phandle = <0x9a>; }; mmu@40d02000 { compatible = "ti,dra7-dsp-iommu"; reg = <0x40d02000 0x100>; interrupts = <0x0 0x91 0x4>; ti,hwmods = "mmu1_dsp1"; #iommu-cells = <0x0>; ti,syscon-mmuconfig = <0xce 0x1>; phandle = <0x9b>; }; mmu@58882000 { compatible = "ti,dra7-iommu"; reg = <0x58882000 0x100>; interrupts = <0x0 0x18b 0x4>; ti,hwmods = "mmu_ipu1"; #iommu-cells = <0x0>; ti,iommu-bus-err-back; phandle = <0x90>; }; mmu@55082000 { compatible = "ti,dra7-iommu"; reg = <0x55082000 0x100>; interrupts = <0x0 0x18c 0x4>; ti,hwmods = "mmu_ipu2"; #iommu-cells = <0x0>; ti,iommu-bus-err-back; phandle = <0x95>; }; pruss-soc-bus@4b226004 { compatible = "ti,am5728-pruss-soc-bus"; reg = <0x4b226004 0x4>; ti,hwmods = "pruss1"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; status = "disabled"; pruss@4b200000 { compatible = "ti,am5728-pruss"; reg = <0x4b200000 0x80000>; interrupts = <0x0 0xba 0x4 0x0 0xbb 0x4 0x0 0xbc 0x4 0x0 0xbd 0x4 0x0 0xbe 0x4 0x0 0xbf 0x4 0x0 0xc0 0x4 0x0 0xc1 0x4>; interrupt-names = "host2", "host3", "host4", "host5", "host6", "host7", "host8", "host9"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; status = "disabled"; memories@4b200000 { reg = <0x4b200000 0x2000 0x4b202000 0x2000 0x4b210000 0x8000>; reg-names = "dram0", "dram1", "shrdram2"; }; cfg@4b226000 { compatible = "syscon"; reg = <0x4b226000 0x2000>; }; iep@4b22e000 { compatible = "syscon"; reg = <0x4b22e000 0x31c>; }; mii-rt@4b232000 { compatible = "syscon"; reg = <0x4b232000 0x58>; }; interrupt-controller@4b220000 { compatible = "ti,am5728-pruss-intc"; reg = <0x4b220000 0x2000>; interrupt-controller; #interrupt-cells = <0x1>; phandle = <0xcf>; }; pru@4b234000 { compatible = "ti,am5728-pru"; reg = <0x4b234000 0x3000 0x4b222000 0x400 0x4b222400 0x100>; reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru1_0-fw"; interrupt-parent = <0xcf>; interrupts = <0x10 0x11>; interrupt-names = "vring", "kick"; }; pru@4b238000 { compatible = "ti,am5728-pru"; reg = <0x4b238000 0x3000 0x4b224000 0x400 0x4b224400 0x100>; reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru1_1-fw"; interrupt-parent = <0xcf>; interrupts = <0x12 0x13>; interrupt-names = "vring", "kick"; }; mdio@4b232400 { compatible = "ti,davinci_mdio"; reg = <0x4b232400 0x90>; #address-cells = <0x1>; #size-cells = <0x0>; clocks = <0xd0>; clock-names = "fck"; bus_freq = <0xf4240>; status = "disabled"; }; }; }; pruss-soc-bus@4b2a6004 { compatible = "ti,am5728-pruss-soc-bus"; reg = <0x4b2a6004 0x4>; ti,hwmods = "pruss2"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; status = "disabled"; pruss@4b280000 { compatible = "ti,am5728-pruss"; reg = <0x4b280000 0x80000>; interrupts = <0x0 0xc4 0x4 0x0 0xc5 0x4 0x0 0xc6 0x4 0x0 0xc7 0x4 0x0 0xc8 0x4 0x0 0xc9 0x4 0x0 0xca 0x4 0x0 0xcb 0x4>; interrupt-names = "host2", "host3", "host4", "host5", "host6", "host7", "host8", "host9"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; status = "disabled"; memories@4b280000 { reg = <0x4b280000 0x2000 0x4b282000 0x2000 0x4b290000 0x8000>; reg-names = "dram0", "dram1", "shrdram2"; }; cfg@4b2a6000 { compatible = "syscon"; reg = <0x4b2a6000 0x2000>; }; iep@4b2ae000 { compatible = "syscon"; reg = <0x4b2ae000 0x31c>; }; mii-rt@4b2b2000 { compatible = "syscon"; reg = <0x4b2b2000 0x58>; }; interrupt-controller@4b2a0000 { compatible = "ti,am5728-pruss-intc"; reg = <0x4b2a0000 0x2000>; interrupt-controller; #interrupt-cells = <0x1>; phandle = <0xd1>; }; pru@4b2b4000 { compatible = "ti,am5728-pru"; reg = <0x4b2b4000 0x3000 0x4b2a2000 0x400 0x4b2a2400 0x100>; reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru2_0-fw"; interrupt-parent = <0xd1>; interrupts = <0x10 0x11>; interrupt-names = "vring", "kick"; }; pru@4b2b8000 { compatible = "ti,am5728-pru"; reg = <0x4b2b8000 0x3000 0x4b2a4000 0x400 0x4b2a4400 0x100>; reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru2_1-fw"; interrupt-parent = <0xd1>; interrupts = <0x12 0x13>; interrupt-names = "vring", "kick"; }; mdio@4b2b2400 { compatible = "ti,davinci_mdio"; reg = <0x4b2b2400 0x90>; #address-cells = <0x1>; #size-cells = <0x0>; clocks = <0xd0>; clock-names = "fck"; bus_freq = <0xf4240>; status = "disabled"; }; }; }; regulator-abb-mpu { compatible = "ti,abb-v3"; regulator-name = "abb_mpu"; #address-cells = <0x0>; #size-cells = <0x0>; clocks = <0x11>; ti,settling-time = <0x32>; ti,clock-cycles = <0x10>; reg = <0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address"; ti,tranxdone-status-mask = <0x80>; ti,ldovbb-override-mask = <0x400>; ti,ldovbb-vset-mask = <0x1f>; ti,abb_info = <0x102ca0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11b340 0x0 0x4 0x0 0x2000000 0x1f00000 0x127690 0x0 0x8 0x0 0x2000000 0x1f00000>; phandle = <0x5>; }; regulator-abb-ivahd { compatible = "ti,abb-v3"; regulator-name = "abb_ivahd"; #address-cells = <0x0>; #size-cells = <0x0>; clocks = <0x11>; ti,settling-time = <0x32>; ti,clock-cycles = <0x10>; reg = <0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address"; ti,tranxdone-status-mask = <0x40000000>; ti,ldovbb-override-mask = <0x400>; ti,ldovbb-vset-mask = <0x1f>; ti,abb_info = <0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x0 0x8 0x0 0x2000000 0x1f00000>; }; regulator-abb-dspeve { compatible = "ti,abb-v3"; regulator-name = "abb_dspeve"; #address-cells = <0x0>; #size-cells = <0x0>; clocks = <0x11>; ti,settling-time = <0x32>; ti,clock-cycles = <0x10>; reg = <0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address"; ti,tranxdone-status-mask = <0x20000000>; ti,ldovbb-override-mask = <0x400>; ti,ldovbb-vset-mask = <0x1f>; ti,abb_info = <0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x0 0x8 0x0 0x2000000 0x1f00000>; }; regulator-abb-gpu { compatible = "ti,abb-v3"; regulator-name = "abb_gpu"; #address-cells = <0x0>; #size-cells = <0x0>; clocks = <0x11>; ti,settling-time = <0x32>; ti,clock-cycles = <0x10>; reg = <0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address"; ti,tranxdone-status-mask = <0x10000000>; ti,ldovbb-override-mask = <0x400>; ti,ldovbb-vset-mask = <0x1f>; ti,abb_info = <0x10a1d0 0x0 0x0 0x0 0x2000000 0x1f00000 0x127690 0x0 0x4 0x0 0x2000000 0x1f00000 0x138800 0x0 0x8 0x0 0x2000000 0x1f00000>; }; spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; interrupts = <0x0 0x3c 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "mcspi1"; ti,spi-num-cs = <0x4>; dmas = <0x8d 0x23 0x8d 0x24 0x8d 0x25 0x8d 0x26 0x8d 0x27 0x8d 0x28 0x8d 0x29 0x8d 0x2a>; dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3"; status = "disabled"; }; spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; interrupts = <0x0 0x3d 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "mcspi2"; ti,spi-num-cs = <0x2>; dmas = <0x8d 0x2b 0x8d 0x2c 0x8d 0x2d 0x8d 0x2e>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "okay"; }; spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; interrupts = <0x0 0x56 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "mcspi3"; ti,spi-num-cs = <0x2>; dmas = <0x8d 0xf 0x8d 0x10>; dma-names = "tx0", "rx0"; status = "disabled"; }; spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; interrupts = <0x0 0x2b 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "mcspi4"; ti,spi-num-cs = <0x1>; dmas = <0x8d 0x46 0x8d 0x47>; dma-names = "tx0", "rx0"; status = "disabled"; }; qspi@4b300000 { compatible = "ti,dra7xxx-qspi"; reg = <0x4b300000 0x100 0x5c000000 0x4000000>; reg-names = "qspi_base", "qspi_mmap"; syscon-chipselects = <0x9 0x558>; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "qspi"; clocks = <0x57 0x138 0x19>; clock-names = "fck"; num-cs = <0x4>; interrupts = <0x0 0x157 0x4>; status = "okay"; spi-max-frequency = <0x493e000>; m25p80@0 { compatible = "s25fl256s1"; spi-max-frequency = <0x493e000>; reg = <0x0>; spi-tx-bus-width = <0x1>; spi-rx-bus-width = <0x4>; #address-cells = <0x1>; #size-cells = <0x1>; partition@0 { label = "QSPI.SPL"; reg = <0x0 0x40000>; }; partition@1 { label = "QSPI.u-boot"; reg = <0x40000 0x100000>; }; partition@2 { label = "QSPI.u-boot-spl-os"; reg = <0x140000 0x80000>; }; partition@3 { label = "QSPI.u-boot-env"; reg = <0x1c0000 0x10000>; }; partition@4 { label = "QSPI.u-boot-env.backup1"; reg = <0x1d0000 0x10000>; }; partition@5 { label = "QSPI.kernel"; reg = <0x1e0000 0x800000>; }; partition@6 { label = "QSPI.file-system"; reg = <0x9e0000 0x1620000>; }; }; }; ocp2scp@4a090000 { compatible = "ti,omap-ocp2scp"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; reg = <0x4a090000 0x20>; ti,hwmods = "ocp2scp3"; phy@4a096000 { compatible = "ti,phy-pipe3-sata"; reg = <0x4a096000 0x80 0x4a096400 0x64 0x4a096800 0x40>; reg-names = "phy_rx", "phy_tx", "pll_ctrl"; syscon-phy-power = <0x9 0x374>; clocks = <0x11 0xd2 0x68 0x8>; clock-names = "sysclk", "refclk"; syscon-pllreset = <0x9 0x3fc>; #phy-cells = <0x0>; phandle = <0xd4>; }; pciephy@4a094000 { compatible = "ti,phy-pipe3-pcie"; reg = <0x4a094000 0x80 0x4a094400 0x64>; reg-names = "phy_rx", "phy_tx"; syscon-phy-power = <0x85 0x1c>; syscon-pcs = <0x85 0x10>; clocks = <0x3e 0x3f 0xd2 0x90 0x8 0xd2 0x90 0x9 0xd2 0x90 0xa 0xd3 0x11>; clock-names = "dpll_ref", "dpll_ref_m2", "wkupclk", "refclk", "div-clk", "phy-div", "sysclk"; #phy-cells = <0x0>; phandle = <0x84>; }; pciephy@4a095000 { compatible = "ti,phy-pipe3-pcie"; reg = <0x4a095000 0x80 0x4a095400 0x64>; reg-names = "phy_rx", "phy_tx"; syscon-phy-power = <0x85 0x20>; syscon-pcs = <0x85 0x10>; clocks = <0x3e 0x3f 0xd2 0x98 0x8 0xd2 0x98 0x9 0xd2 0x98 0xa 0xd3 0x11>; clock-names = "dpll_ref", "dpll_ref_m2", "wkupclk", "refclk", "div-clk", "phy-div", "sysclk"; #phy-cells = <0x0>; status = "disabled"; phandle = <0x88>; }; }; sata@4a141100 { compatible = "snps,dwc-ahci"; reg = <0x4a140000 0x1100 0x4a141100 0x7>; interrupts = <0x0 0x31 0x4>; phys = <0xd4>; phy-names = "sata-phy"; clocks = <0xd2 0x68 0x8>; ti,hwmods = "sata"; ports-implemented = <0x1>; }; rtc@48838000 { compatible = "ti,am3352-rtc"; reg = <0x48838000 0x100>; interrupts = <0x0 0xd9 0x4 0x0 0xd9 0x4>; ti,hwmods = "rtcss"; clocks = <0x50>; }; ocp2scp@4a080000 { compatible = "ti,omap-ocp2scp"; #address-cells = <0x1>; #size-cells = <0x1>; ranges; reg = <0x4a080000 0x20>; ti,hwmods = "ocp2scp1"; phy@4a084000 { compatible = "ti,dra7x-usb2", "ti,omap-usb2"; reg = <0x4a084000 0x400>; syscon-phy-power = <0x9 0x300>; clocks = <0xd5 0xd2 0xd0 0x8>; clock-names = "wkupclk", "refclk"; #phy-cells = <0x0>; phy-supply = <0xd6>; phandle = <0xdb>; }; phy@4a085000 { compatible = "ti,dra7x-usb2-phy2", "ti,omap-usb2"; reg = <0x4a085000 0x400>; syscon-phy-power = <0x9 0xe74>; clocks = <0xd7 0xd2 0x20 0x8>; clock-names = "wkupclk", "refclk"; #phy-cells = <0x0>; phy-supply = <0xd6>; phandle = <0xde>; }; phy@4a084400 { compatible = "ti,omap-usb3"; reg = <0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>; reg-names = "phy_rx", "phy_tx", "pll_ctrl"; syscon-phy-power = <0x9 0x370>; clocks = <0xd8 0x11 0xd2 0xd0 0x8>; clock-names = "wkupclk", "sysclk", "refclk"; #phy-cells = <0x0>; phandle = <0xdc>; }; }; target-module@4a0dd000 { compatible = "ti,sysc-omap4-sr", "ti,sysc"; ti,hwmods = "smartreflex_core"; reg = <0x4a0dd038 0x4>; reg-names = "sysc"; ti,sysc-mask = <0x4000000>; ti,sysc-sidle = <0x0 0x1 0x2 0x3>; clocks = <0xd9 0x18 0x0>; clock-names = "fck"; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x4a0dd000 0x1000>; }; target-module@4a0d9000 { compatible = "ti,sysc-omap4-sr", "ti,sysc"; ti,hwmods = "smartreflex_mpu"; reg = <0x4a0d9038 0x4>; reg-names = "sysc"; ti,sysc-mask = <0x4000000>; ti,sysc-sidle = <0x0 0x1 0x2 0x3>; clocks = <0xd9 0x8 0x0>; clock-names = "fck"; #address-cells = <0x1>; #size-cells = <0x1>; ranges = <0x0 0x4a0d9000 0x1000>; }; omap_dwc3_1@48880000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss1"; reg = <0x48880000 0x10000>; interrupts = <0x0 0x48 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; utmi-mode = <0x2>; ranges; extcon = <0xda>; usb@48890000 { compatible = "snps,dwc3"; reg = <0x48890000 0x17000>; interrupts = <0x0 0x47 0x4 0x0 0x47 0x4 0x0 0x48 0x4>; interrupt-names = "peripheral", "host", "otg"; phys = <0xdb 0xdc>; phy-names = "usb2-phy", "usb3-phy"; maximum-speed = "super-speed"; dr_mode = "otg"; snps,dis_u3_susphy_quirk; snps,dis_u2_susphy_quirk; extcon = <0xda>; }; }; omap_dwc3_2@488c0000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss2"; reg = <0x488c0000 0x10000>; interrupts = <0x0 0x57 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; utmi-mode = <0x2>; ranges; extcon = <0xdd>; usb@488d0000 { compatible = "snps,dwc3"; reg = <0x488d0000 0x17000>; interrupts = <0x0 0x49 0x4 0x0 0x49 0x4 0x0 0x57 0x4>; interrupt-names = "peripheral", "host", "otg"; phys = <0xde>; phy-names = "usb2-phy"; maximum-speed = "high-speed"; dr_mode = "host"; snps,dis_u3_susphy_quirk; snps,dis_u2_susphy_quirk; snps,dis_metastability_quirk; extcon = <0xdd>; }; }; omap_dwc3_3@48900000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss3"; reg = <0x48900000 0x10000>; interrupts = <0x0 0x158 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; utmi-mode = <0x2>; ranges; status = "disabled"; usb@48910000 { compatible = "snps,dwc3"; reg = <0x48910000 0x17000>; interrupts = <0x0 0x58 0x4 0x0 0x58 0x4 0x0 0x158 0x4>; interrupt-names = "peripheral", "host", "otg"; maximum-speed = "high-speed"; dr_mode = "otg"; snps,dis_u3_susphy_quirk; snps,dis_u2_susphy_quirk; }; }; elm@48078000 { compatible = "ti,am3352-elm"; reg = <0x48078000 0xfc0>; interrupts = <0x0 0x1 0x4>; ti,hwmods = "elm"; status = "okay"; phandle = <0xe1>; }; gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; reg = <0x50000000 0x37c>; interrupts = <0x0 0xf 0x4>; dmas = <0xdf 0x4 0x0>; dma-names = "rxtx"; gpmc,num-cs = <0x8>; gpmc,num-waitpins = <0x2>; #address-cells = <0x2>; #size-cells = <0x1>; interrupt-controller; #interrupt-cells = <0x2>; gpio-controller; #gpio-cells = <0x2>; status = "disabled"; ranges = <0x0 0x0 0x8000000 0x1000000>; phandle = <0xe0>; nand@0,0 { compatible = "ti,omap2-nand"; reg = <0x0 0x0 0x4>; interrupt-parent = <0xe0>; interrupts = <0x0 0x0 0x1 0x0>; rb-gpios = <0xe0 0x0 0x0>; ti,nand-xfer-type = "prefetch-dma"; ti,nand-ecc-opt = "bch8"; ti,elm-id = <0xe1>; nand-bus-width = <0x10>; gpmc,device-width = <0x2>; gpmc,sync-clk-ps = <0x0>; gpmc,cs-on-ns = <0x0>; gpmc,cs-rd-off-ns = <0x50>; gpmc,cs-wr-off-ns = <0x50>; gpmc,adv-on-ns = <0x0>; gpmc,adv-rd-off-ns = <0x3c>; gpmc,adv-wr-off-ns = <0x3c>; gpmc,we-on-ns = <0xa>; gpmc,we-off-ns = <0x32>; gpmc,oe-on-ns = <0x4>; gpmc,oe-off-ns = <0x28>; gpmc,access-ns = <0x28>; gpmc,wr-access-ns = <0x50>; gpmc,rd-cycle-ns = <0x50>; gpmc,wr-cycle-ns = <0x50>; gpmc,bus-turnaround-ns = <0x0>; gpmc,cycle2cycle-delay-ns = <0x0>; gpmc,clk-activation-ns = <0x0>; gpmc,wr-data-mux-bus-ns = <0x0>; #address-cells = <0x1>; #size-cells = <0x1>; partition@0 { label = "NAND.SPL"; reg = <0x0 0x20000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x20000 0x20000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x40000 0x20000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x60000 0x20000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x80000 0x40000>; }; partition@5 { label = "NAND.u-boot"; reg = <0xc0000 0x100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x1c0000 0x20000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x1e0000 0x20000>; }; partition@8 { label = "NAND.kernel"; reg = <0x200000 0x800000>; }; partition@9 { label = "NAND.file-system"; reg = <0xa00000 0xf600000>; }; }; }; atl@4843c000 { compatible = "ti,dra7-atl"; reg = <0x4843c000 0x3ff>; ti,hwmods = "atl"; ti,provided-clocks = <0xe2 0xe3 0xe4 0xe5>; clocks = <0x10 0x0 0x1a>; clock-names = "fck"; status = "disabled"; assigned-clocks = <0x61 0x10 0x0 0x1a 0x14 0x16 0xe4>; assigned-clock-parents = <0x60 0x64>; assigned-clock-rates = <0x0 0x0 0xac44000 0x15888000 0x562200>; atl2 { bws = <0x3>; aws = <0x4>; }; }; mcasp@48460000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp1"; reg = <0x48460000 0x2000 0x45800000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x68 0x4 0x0 0x67 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x81 0x1 0xdf 0x80 0x1>; dma-names = "tx", "rx"; clocks = <0x8f 0x10 0x16 0x8f 0x10 0x18 0x8f 0x10 0x1c>; clock-names = "fck", "ahclkx", "ahclkr"; status = "disabled"; }; mcasp@48464000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp2"; reg = <0x48464000 0x2000 0x45c00000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x95 0x4 0x0 0x94 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x83 0x1 0xdf 0x82 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x160 0x16 0x57 0x160 0x18 0x57 0x160 0x1c>; clock-names = "fck", "ahclkx", "ahclkr"; status = "disabled"; }; mcasp@48468000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp3"; reg = <0x48468000 0x2000 0x46000000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x97 0x4 0x0 0x96 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x85 0x1 0xdf 0x84 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x168 0x16 0x57 0x168 0x18>; clock-names = "fck", "ahclkx"; status = "disabled"; #sound-dai-cells = <0x0>; assigned-clocks = <0x57 0x168 0x18>; assigned-clock-parents = <0xe4>; op-mode = <0x0>; tdm-slots = <0x2>; serial-dir = <0x1 0x2 0x0 0x0>; tx-num-evt = <0x20>; rx-num-evt = <0x20>; phandle = <0xff>; }; mcasp@4846c000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp4"; reg = <0x4846c000 0x2000 0x48436000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x99 0x4 0x0 0x98 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x87 0x1 0xdf 0x86 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x198 0x16 0x57 0x198 0x18>; clock-names = "fck", "ahclkx"; status = "disabled"; }; mcasp@48470000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp5"; reg = <0x48470000 0x2000 0x4843a000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x9b 0x4 0x0 0x9a 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x89 0x1 0xdf 0x88 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x178 0x16 0x57 0x178 0x18>; clock-names = "fck", "ahclkx"; status = "disabled"; }; mcasp@48474000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp6"; reg = <0x48474000 0x2000 0x4844c000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x9d 0x4 0x0 0x9c 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x8b 0x1 0xdf 0x8a 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x204 0x16 0x57 0x204 0x18>; clock-names = "fck", "ahclkx"; status = "disabled"; }; mcasp@48478000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp7"; reg = <0x48478000 0x2000 0x48450000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0x9f 0x4 0x0 0x9e 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x8d 0x1 0xdf 0x8c 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x208 0x16 0x57 0x208 0x18>; clock-names = "fck", "ahclkx"; status = "disabled"; }; mcasp@4847c000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp8"; reg = <0x4847c000 0x2000 0x48454000 0x1000>; reg-names = "mpu", "dat"; interrupts = <0x0 0xa1 0x4 0x0 0xa0 0x4>; interrupt-names = "tx", "rx"; dmas = <0xdf 0x8f 0x1 0xdf 0x8e 0x1>; dma-names = "tx", "rx"; clocks = <0x57 0x190 0x16 0x57 0x190 0x18>; clock-names = "fck", "ahclkx"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0xe6>; gpio-controller; #gpio-cells = <0x2>; phandle = <0x10d>; }; crossbar@4a002a48 { compatible = "ti,irq-crossbar"; reg = <0x4a002a48 0x130>; interrupt-controller; interrupt-parent = <0x8>; #interrupt-cells = <0x3>; ti,max-irqs = <0xa0>; ti,max-crossbar-sources = <0x190>; ti,reg-size = <0x2>; ti,irqs-reserved = <0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>; ti,irqs-skip = <0xa 0x85 0x8b 0x8c>; ti,irqs-safe-map = <0x0>; phandle = <0x1>; }; ethernet@48484000 { compatible = "ti,dra7-cpsw", "ti,cpsw"; ti,hwmods = "gmac"; clocks = <0xe7 0xd2 0xb0 0x19>; clock-names = "fck", "cpts"; cpdma_channels = <0x8>; ale_entries = <0x400>; bd_ram_size = <0x2000>; mac_control = <0x20>; slaves = <0x2>; active_slave = <0x0>; cpts_clock_mult = <0x784cfe14>; cpts_clock_shift = <0x1d>; reg = <0x48484000 0x1000 0x48485200 0x2e00>; #address-cells = <0x1>; #size-cells = <0x1>; ti,no-idle; interrupts = <0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x0 0x151 0x4>; ranges; syscon = <0x9>; status = "okay"; mdio@48485000 { compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; #address-cells = <0x1>; #size-cells = <0x0>; ti,hwmods = "davinci_mdio"; bus_freq = <0xf4240>; reg = <0x48485000 0x100>; phandle = <0xe8>; }; slave@48480200 { mac-address = [00 00 00 00 00 00]; phy_id = <0xe8 0x2>; phy-mode = "rgmii"; dual_emac_res_vlan = <0x1>; fixed-link { speed = <0x3e8>; full-duplex; }; }; slave@48480300 { mac-address = [00 00 00 00 00 00]; phy_id = <0xe8 0x3>; phy-mode = "rgmii"; dual_emac_res_vlan = <0x2>; fixed-link { speed = <0x64>; full-duplex; }; }; cpsw-phy-sel@4a002554 { compatible = "ti,dra7xx-cpsw-phy-sel"; reg = <0x4a002554 0x4>; reg-names = "gmii-sel"; }; }; can@4ae3c000 { compatible = "ti,dra7-d_can"; ti,hwmods = "dcan1"; reg = <0x4ae3c000 0x2000>; syscon-raminit = <0x9 0x558 0x0>; interrupts = <0x0 0xde 0x4>; clocks = <0x8e 0x68 0x18>; status = "okay"; pinctrl-names = "default", "sleep", "active"; pinctrl-0 = <0xe9>; pinctrl-1 = <0xe9>; pinctrl-2 = <0xea>; }; can@48480000 { compatible = "ti,dra7-d_can"; ti,hwmods = "dcan2"; reg = <0x48480000 0x2000>; syscon-raminit = <0x9 0x558 0x1>; interrupts = <0x0 0xe1 0x4>; clocks = <0x11>; status = "disabled"; }; gpu@56000000 { compatible = "ti,dra7-sgx544", "img,sgx544"; reg = <0x56000000 0x10000>; reg-names = "gpu_ocp_base"; interrupts = <0x0 0x10 0x4>; ti,hwmods = "gpu"; clocks = <0xa 0x53 0x54>; clock-names = "iclk", "fclk1", "fclk2"; status = "ok"; memory-region = <0xeb>; }; bb2d@59000000 { compatible = "ti,dra7-bb2d"; reg = <0x59000000 0x700>; interrupts = <0x0 0x78 0x4>; ti,hwmods = "bb2d"; clocks = <0xec 0x10 0x0>; clock-names = "fck"; status = "okay"; }; dss@58000000 { compatible = "ti,dra7-dss"; status = "disabled"; ti,hwmods = "dss_core"; syscon-pll-ctrl = <0x9 0x538>; #address-cells = <0x1>; #size-cells = <0x1>; ranges; reg = <0x58000000 0x80 0x58004054 0x4 0x58004300 0x20 0x58009054 0x4 0x58009300 0x20>; reg-names = "dss", "pll1_clkctrl", "pll1", "pll2_clkctrl", "pll2"; clocks = <0xec 0x0 0x8 0xec 0x0 0xc 0xec 0x0 0xd>; clock-names = "fck", "video1_clk", "video2_clk"; vdda_video-supply = <0xed>; ti,no-idle; ti,no-reset-on-init; dispc@58001000 { compatible = "ti,dra7-dispc"; reg = <0x58001000 0x1000>; interrupts = <0x0 0x14 0x4>; ti,hwmods = "dss_dispc"; clocks = <0xec 0x0 0x8>; clock-names = "fck"; syscon-pol = <0x9 0x534>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; }; encoder@58060000 { compatible = "ti,dra7-hdmi"; reg = <0x58040000 0x200 0x58040200 0x80 0x58040300 0x80 0x58060000 0x19000>; reg-names = "wp", "pll", "phy", "core"; interrupts = <0x0 0x60 0x4>; status = "disabled"; ti,hwmods = "dss_hdmi"; clocks = <0xec 0x0 0x9 0xec 0x0 0xa>; clock-names = "fck", "sys_clk"; dmas = <0x8d 0x4c>; dma-names = "audio_tx"; vdda-supply = <0xee>; ti,no-idle; ti,no-reset-on-init; port { endpoint { remote-endpoint = <0xef>; phandle = <0x10e>; }; }; }; }; vdrm@0 { compatible = "ti,dra7-vdrm"; crtc@0 { compatible = "ti,dra7-vdrm-crtc"; x-res = <0x780>; y-res = <0x438>; refresh = <0x3c>; supported-formats = <0x34325258>; }; }; epwmss@4843e000 { compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"; reg = <0x4843e000 0x30>; ti,hwmods = "epwmss0"; #address-cells = <0x1>; #size-cells = <0x1>; status = "disabled"; ranges; pwm@4843e200 { compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm"; #pwm-cells = <0x3>; reg = <0x4843e200 0x80>; clocks = <0xf0 0xb>; clock-names = "tbclk", "fck"; status = "disabled"; }; ecap@4843e100 { compatible = "ti,dra746-ecap", "ti,am3352-ecap"; #pwm-cells = <0x3>; reg = <0x4843e100 0x80>; clocks = <0xb>; clock-names = "fck"; status = "disabled"; }; }; epwmss@48440000 { compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"; reg = <0x48440000 0x30>; ti,hwmods = "epwmss1"; #address-cells = <0x1>; #size-cells = <0x1>; status = "disabled"; ranges; pwm@48440200 { compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm"; #pwm-cells = <0x3>; reg = <0x48440200 0x80>; clocks = <0xf1 0xb>; clock-names = "tbclk", "fck"; status = "disabled"; }; ecap@48440100 { compatible = "ti,dra746-ecap", "ti,am3352-ecap"; #pwm-cells = <0x3>; reg = <0x48440100 0x80>; clocks = <0xb>; clock-names = "fck"; status = "disabled"; }; }; epwmss@48442000 { compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"; reg = <0x48442000 0x30>; ti,hwmods = "epwmss2"; #address-cells = <0x1>; #size-cells = <0x1>; status = "disabled"; ranges; pwm@48442200 { compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm"; #pwm-cells = <0x3>; reg = <0x48442200 0x80>; clocks = <0xf2 0xb>; clock-names = "tbclk", "fck"; status = "disabled"; }; ecap@48442100 { compatible = "ti,dra746-ecap", "ti,am3352-ecap"; #pwm-cells = <0x3>; reg = <0x48442100 0x80>; clocks = <0xb>; clock-names = "fck"; status = "disabled"; }; }; aes@4b500000 { compatible = "ti,omap4-aes"; ti,hwmods = "aes1"; reg = <0x4b500000 0xa0>; interrupts = <0x0 0x50 0x4>; dmas = <0xdf 0x6f 0x0 0xdf 0x6e 0x0>; dma-names = "tx", "rx"; clocks = <0xa>; clock-names = "fck"; }; aes@4b700000 { compatible = "ti,omap4-aes"; ti,hwmods = "aes2"; reg = <0x4b700000 0xa0>; interrupts = <0x0 0x3b 0x4>; dmas = <0xdf 0x72 0x0 0xdf 0x71 0x0>; dma-names = "tx", "rx"; clocks = <0xa>; clock-names = "fck"; }; des@480a5000 { compatible = "ti,omap4-des"; ti,hwmods = "des"; reg = <0x480a5000 0xa0>; interrupts = <0x0 0x4d 0x4>; dmas = <0x8d 0x75 0x8d 0x74>; dma-names = "tx", "rx"; clocks = <0xa>; clock-names = "fck"; }; sham@53100000 { compatible = "ti,omap5-sham"; ti,hwmods = "sham"; reg = <0x4b101000 0x300>; interrupts = <0x0 0x2e 0x4>; dmas = <0xdf 0x77 0x0>; dma-names = "rx"; clocks = <0xa>; clock-names = "fck"; }; rng@48090000 { compatible = "ti,omap4-rng"; ti,hwmods = "rng"; reg = <0x48090000 0x2000>; interrupts = <0x0 0x2f 0x4>; clocks = <0xa>; clock-names = "fck"; }; opp-supply@4a003b20 { compatible = "ti,omap5-opp-supply"; reg = <0x4a003b20 0xc>; ti,efuse-settings = <0x102ca0 0x0 0x11b340 0x4 0x127690 0x8>; ti,absolute-max-voltage-uv = <0x16e360>; }; vpe { compatible = "ti,vpe"; ti,hwmods = "vpe"; clocks = <0x56>; clock-names = "fck"; reg = <0x489d0000 0x120 0x489d0700 0x80 0x489d5700 0x18 0x489dd000 0x400>; reg-names = "vpe_top", "sc", "csc", "vpdma"; interrupts = <0x0 0x162 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; }; vip@0x48970000 { compatible = "ti,vip1"; reg = <0x48970000 0x114 0x48975500 0xd8 0x48975700 0x18 0x48975800 0x80 0x48975a00 0xd8 0x48975c00 0x18 0x48975d00 0x80 0x4897d000 0x400>; reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma"; ti,hwmods = "vip1"; interrupts = <0x0 0x15f 0x4 0x0 0x188 0x4>; syscon-pol = <0x9 0x534>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; ports { #address-cells = <0x1>; #size-cells = <0x0>; port@0 { reg = <0x0>; endpoint@0 { slave-mode; remote-endpoint = <0xf3>; phandle = <0xac>; }; }; port@1 { reg = <0x1>; }; port@2 { reg = <0x2>; }; port@3 { reg = <0x3>; }; }; }; dsp_system@41500000 { compatible = "syscon"; reg = <0x41500000 0x100>; phandle = <0xf4>; }; omap_dwc3_4@48940000 { compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss4"; reg = <0x48940000 0x10000>; interrupts = <0x0 0x15a 0x4>; #address-cells = <0x1>; #size-cells = <0x1>; utmi-mode = <0x2>; ranges; status = "disabled"; usb@48950000 { compatible = "snps,dwc3"; reg = <0x48950000 0x17000>; interrupts = <0x0 0x159 0x4 0x0 0x159 0x4 0x0 0x15a 0x4>; interrupt-names = "peripheral", "host", "otg"; maximum-speed = "high-speed"; dr_mode = "otg"; }; }; mmu@41501000 { compatible = "ti,dra7-dsp-iommu"; reg = <0x41501000 0x100>; interrupts = <0x0 0x92 0x4>; ti,hwmods = "mmu0_dsp2"; #iommu-cells = <0x0>; ti,syscon-mmuconfig = <0xf4 0x0>; phandle = <0xf5>; }; mmu@41502000 { compatible = "ti,dra7-dsp-iommu"; reg = <0x41502000 0x100>; interrupts = <0x0 0x93 0x4>; ti,hwmods = "mmu1_dsp2"; #iommu-cells = <0x0>; ti,syscon-mmuconfig = <0xf4 0x1>; phandle = <0xf6>; }; dsp@41000000 { compatible = "ti,dra7-dsp"; reg = <0x41000000 0x48000 0x41600000 0x8000 0x41700000 0x8000>; reg-names = "l2ram", "l1pram", "l1dram"; ti,hwmods = "dsp2"; syscon-bootreg = <0x9 0x560>; iommus = <0xf5 0xf6>; ti,rproc-standby-info = <0x4a005620>; status = "okay"; mboxes = <0x96 0xf7>; timers = <0xf8>; memory-region = <0xf9>; }; vip@0x48990000 { compatible = "ti,vip2"; reg = <0x48990000 0x114 0x48995500 0xd8 0x48995700 0x18 0x48995800 0x80 0x48995a00 0xd8 0x48995c00 0x18 0x48995d00 0x80 0x4899d000 0x400>; reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma"; ti,hwmods = "vip2"; interrupts = <0x0 0x160 0x4 0x0 0x189 0x4>; syscon-pol = <0x9 0x534>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; ports { #address-cells = <0x1>; #size-cells = <0x0>; port@0 { reg = <0x0>; }; port@1 { reg = <0x1>; }; port@2 { reg = <0x2>; }; port@3 { reg = <0x3>; }; }; }; vip@0x489b0000 { compatible = "ti,vip3"; reg = <0x489b0000 0x114 0x489b5500 0xd8 0x489b5700 0x18 0x489b5800 0x80 0x489b5a00 0xd8 0x489b5c00 0x18 0x489b5d00 0x80 0x489bd000 0x400>; reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma"; ti,hwmods = "vip3"; interrupts = <0x0 0x161 0x4 0x0 0x18a 0x4>; syscon-pol = <0x9 0x534>; #address-cells = <0x1>; #size-cells = <0x0>; status = "disabled"; ti,no-idle; ti,no-reset-on-init; ports { #address-cells = <0x1>; #size-cells = <0x0>; port@0 { reg = <0x0>; }; port@1 { reg = <0x1>; }; }; }; }; thermal-zones { cpu_thermal { polling-delay-passive = <0xfa>; polling-delay = <0x1f4>; thermal-sensors = <0xfa 0x0>; coefficients = <0x0 0x7d0>; trips { cpu_alert { temperature = <0x186a0>; hysteresis = <0x7d0>; type = "passive"; phandle = <0xfb>; }; cpu_crit { temperature = <0x1d4c0>; hysteresis = <0x7d0>; type = "critical"; }; }; cooling-maps { map0 { trip = <0xfb>; cooling-device = <0xfc 0xffffffff 0xffffffff>; }; }; }; gpu_thermal { polling-delay-passive = <0xfa>; polling-delay = <0x1f4>; thermal-sensors = <0xfa 0x1>; coefficients = <0x0 0x7d0>; trips { gpu_crit { temperature = <0x1d4c0>; hysteresis = <0x7d0>; type = "critical"; }; }; }; core_thermal { polling-delay-passive = <0xfa>; polling-delay = <0x1f4>; thermal-sensors = <0xfa 0x2>; coefficients = <0x0 0x7d0>; trips { core_crit { temperature = <0x1d4c0>; hysteresis = <0x7d0>; type = "critical"; }; }; }; dspeve_thermal { polling-delay-passive = <0xfa>; polling-delay = <0x1f4>; thermal-sensors = <0xfa 0x3>; coefficients = <0x0 0x7d0>; trips { dspeve_crit { temperature = <0x1d4c0>; hysteresis = <0x7d0>; type = "critical"; }; }; }; iva_thermal { polling-delay-passive = <0xfa>; polling-delay = <0x1f4>; thermal-sensors = <0xfa 0x4>; coefficients = <0x0 0x7d0>; trips { iva_crit { temperature = <0x1d4c0>; hysteresis = <0x7d0>; type = "critical"; }; }; }; }; pmu { compatible = "arm,cortex-a15-pmu"; interrupt-parent = <0x8>; interrupts = <0x0 0x83 0x4 0x0 0x84 0x4>; }; extcon_usb1 { compatible = "linux,extcon-usb-gpio"; id-gpio = <0xfd 0x1 0x0>; phandle = <0xda>; }; extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpio = <0xfd 0x2 0x0>; phandle = <0xdd>; }; sound0 { compatible = "simple-audio-card"; simple-audio-card,name = "DRA7xx-EVM"; simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In"; simple-audio-card,routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "Line Out", "LLOUT", "Line Out", "RLOUT", "MIC3L", "Mic Jack", "MIC3R", "Mic Jack", "Mic Jack", "Mic Bias", "LINE1L", "Line In", "LINE1R", "Line In"; simple-audio-card,format = "dsp_b"; simple-audio-card,bitclock-master = <0xfe>; simple-audio-card,frame-master = <0xfe>; simple-audio-card,bitclock-inversion; simple-audio-card,cpu { sound-dai = <0xff>; system-clock-frequency = <0x562200>; phandle = <0xfe>; }; simple-audio-card,codec { sound-dai = <0x100>; clocks = <0xe4>; }; }; leds { compatible = "gpio-leds"; led0 { label = "dra7:usr1"; gpios = <0x101 0x4 0x1>; default-state = "off"; }; led1 { label = "dra7:usr2"; gpios = <0x101 0x5 0x1>; default-state = "off"; }; led2 { label = "dra7:usr3"; gpios = <0x101 0x6 0x1>; default-state = "off"; }; led3 { label = "dra7:usr4"; gpios = <0x101 0x7 0x1>; default-state = "off"; }; }; gpio_keys { compatible = "gpio-keys"; #address-cells = <0x1>; #size-cells = <0x0>; autorepeat; USER1 { label = "btnUser1"; linux,code = <0x100>; gpios = <0x101 0x2 0x1>; }; USER2 { label = "btnUser2"; linux,code = <0x101>; gpios = <0x101 0x3 0x1>; }; }; clk_ov10633_fixed { #clock-cells = <0x0>; compatible = "fixed-clock"; clock-frequency = <0x16e3600>; phandle = <0xaa>; }; memory@0 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x80000000>; }; fixedregulator-evm_12v0 { compatible = "regulator-fixed"; regulator-name = "evm_12v0"; regulator-min-microvolt = <0xb71b00>; regulator-max-microvolt = <0xb71b00>; regulator-always-on; regulator-boot-on; phandle = <0x105>; }; fixedregulator-evm_1v8 { compatible = "regulator-fixed"; regulator-name = "evm_1v8"; vin-supply = <0x102>; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; phandle = <0xbb>; }; reserved-memory { #address-cells = <0x2>; #size-cells = <0x2>; ranges; ipu2-memory@95800000 { compatible = "shared-dma-pool"; reg = <0x0 0x9e000000 0x0 0x2000000>; reusable; status = "okay"; phandle = <0x99>; }; dsp1-memory@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa1000000 0x0 0x2000000>; reusable; status = "okay"; phandle = <0x9e>; }; ipu1-memory@9d000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9e000000 0x0 0x2000000>; reusable; status = "disabled"; phandle = <0x94>; }; dsp2-memory@9f000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa3000000 0x0 0x2000000>; reusable; status = "okay"; phandle = <0xf9>; }; gpu-memory@c0000000 { compatible = "shared-dma-pool"; reg = <0x0 0xb0000000 0x0 0x4000000>; reusable; status = "okay"; phandle = <0xeb>; }; cmem@40300000 { compatible = "shared-dma-pool"; reg = <0x0 0x40300000 0x0 0x300000>; sram = <0x103>; no-map; status = "okay"; }; cmem@A9000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa9000000 0x0 0x2000000>; no-map; status = "okay"; }; vsdk_sr1_mem@84000000 { compatible = "shared-dma-pool"; reg = <0x0 0x84000000 0x0 0x1a000000>; status = "okay"; }; vsdk_sr0_mem@A0000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa0000000 0x0 0x1000000>; status = "okay"; }; vsdk_eve_mem@A5000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa5000000 0x0 0x4000000>; status = "okay"; }; }; fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; enable-active-high; phandle = <0xae>; }; fixedregulator-evm_3v3_sw { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sw"; vin-supply = <0x104>; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; phandle = <0xa8>; }; fixedregulator-aic_dvdd { compatible = "regulator-fixed"; regulator-name = "aic_dvdd"; vin-supply = <0xa8>; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; phandle = <0xa9>; }; fixedregulator-evm3v3 { compatible = "regulator-fixed"; regulator-name = "evm_3v3"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; vin-supply = <0x105>; regulator-always-on; regulator-boot-on; }; fixedregulator-evm_5v0 { compatible = "regulator-fixed"; regulator-name = "evm_5v0"; regulator-min-microvolt = <0x4c4b40>; regulator-max-microvolt = <0x4c4b40>; vin-supply = <0x105>; regulator-always-on; regulator-boot-on; phandle = <0x106>; }; fixedregulator-evm_3v6 { compatible = "regulator-fixed"; regulator-name = "evm_3v6"; regulator-min-microvolt = <0x36ee80>; regulator-max-microvolt = <0x36ee80>; vin-supply = <0x106>; regulator-always-on; regulator-boot-on; phandle = <0xc4>; }; fixedregulator-mmcwl { compatible = "regulator-fixed"; regulator-name = "vmmcwl_fixed"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; gpio = <0xa5 0x8 0x0>; startup-delay-us = <0x11170>; enable-active-high; phandle = <0xc5>; }; fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <0x149970>; regulator-max-microvolt = <0x149970>; regulator-always-on; regulator-boot-on; enable-active-high; vin-supply = <0x107>; gpio = <0x108 0xb 0x0>; }; connector@1 { compatible = "hdmi-connector"; label = "hdmi"; type = [61 00]; status = "disabled"; ti,no-idle; ti,no-reset-on-init; port { endpoint { remote-endpoint = <0x109>; phandle = <0x10f>; }; }; }; encoder@1 { compatible = "ti,dra7evm-tpd12s015"; pinctrl-names = "i2c", "ddc"; pinctrl-0 = <0x10a>; pinctrl-1 = <0x10b>; ddc-i2c-bus = <0x10c>; gpios = <0xab 0x4 0x0 0xab 0x5 0x0 0x108 0xc 0x0 0x10d 0x2 0x0>; ports { #address-cells = <0x1>; #size-cells = <0x0>; port@0 { reg = <0x0>; endpoint@0 { remote-endpoint = <0x10e>; phandle = <0xef>; }; }; port@1 { reg = <0x1>; endpoint@0 { remote-endpoint = <0x10f>; phandle = <0x109>; }; }; }; }; gpio_uart@1 { compatible = "ti,dra7evm-gpio-uart"; triger_uart_gpio = <0xa5 0xa 0x0>; interrupt-parent = <0xa5>; interrupts = <0xa 0x4>; }; }; + +Hi, So TDA2 --> PC communication is working. The opposite is PC ---> TDA2 is not working. Can you check on the scope if anything is coming up on the RX line? - Keerthy + +of course data is transfering to RX line of uart2 of tda2x. So, can you have a try, use pc--->tda2x, can you read data from pc by uart2 ????? + +Hello, dsafdf dsfaf said: is : when my tda2x's uart2 connect to external mcu,mcu send 12 bytes per 2 sends,but tda2xx cant read data correctly from uart2. sometimes lost data,sometimes wait for a long time to get data So i am not able to understand where is the problem. dsafdf dsfaf said: of course data is transfering to RX line of uart2 of tda2x Above is describing issues with RX right? - Keerthy + diff --git a/data2/text/range/30001+/1019218.txt b/data2/text/range/30001+/1019218.txt new file mode 100644 index 0000000000000000000000000000000000000000..fd267e662dfcc39cbdf5c40ecfc51f1e3dfa8102 --- /dev/null +++ b/data2/text/range/30001+/1019218.txt @@ -0,0 +1,1797 @@ +Ticket Name: TDA2PXEVM: 8 cameras FPS question + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello. I have a usecase with 8 cameras. Image from 4 of them handled by EVE1 and EVE2 algolinks. Image: EVE1 and EVE1 each have an algolink which is [do EVELIB_memcopyDMA2D, do some logic (attachment text file) , do EVELIB_memcopyDMA2D again]. We have FPS around 23-24 with this program, but the EVE1/EVE2 load is 3.5-4.5% according to printStatistics function. It stays same even if i "disable" the algolink completely by removing anything from it. The question is - why FPS is low and do we have any ways to improve it? logic.txt void filter ( __vptr_uint8 iptr //input block + , __vptr_uint8 optr //output block + , unsigned int width //block width + ) { + + __vector Vin1; + __vector Vin2; + __vector Vout1; + __vector Vout2; + __vector Vec1; + __agen Ag; + Ag = 0; + Vec1 = -1; + + for (int I1 = 0; I1 < width/VCOP_SIMD_WIDTH/2; I1++) { + __agen Ag1; + Ag1 = I1*VCOP_SIMD_WIDTH*2; + (Vin1,Vin2) = (iptr)[Ag1].deinterleave(); + Vout1 = Vin1 << Vec1; + Vout2 = Vin2 << Vec1; + (optr)[Ag1].interleave() = (Vout1,Vout2); + } + +Responses: +Hi, It looks like you are using vision sdk. so can you press 'p' on the console and share the complete console log? It will help us to understand which link is slowing down entire chain. Regards, Brijesh + +Hello. According to statistics the most latency-heavy links are ISSM2MISP, ALG_ISS_AEWB and DISPLAY. How can i optimize them? I guess i can try to use AEWB2 instead of AEWB, i hear that it is better for 4+ cameras systems. What about other links? Full statics in attached file. Thanks for quick response. 8371.stats.txt [IPU1-0] 183.640120 s: +[IPU1-0] 183.640212 s: CPU [IPU1-0 ] Statistics, +[IPU1-0] 183.640273 s: ************************* +[IPU1-0] 183.640334 s: +[IPU1-0] 183.640456 s: LOAD: CPU: 40.3% HWI: 5.8%, SWI:1.4%, Low Power: 24.3% +[IPU1-0] 183.640761 s: +[IPU1-0] 183.640822 s: LOAD: TSK: SYSTEM : 1.8% +[IPU1-0] 183.640913 s: LOAD: TSK: IPC_IN_0 : 0.3% +[IPU1-0] 183.641005 s: LOAD: TSK: IPC_IN_1 : 0.4% +[IPU1-0] 183.641127 s: LOAD: TSK: IPC_OUT_0 : 0.6% +[IPU1-0] 183.641218 s: LOAD: TSK: IPC_OUT_1 : 0.6% +[IPU1-0] 183.641462 s: LOAD: TSK: MERGE0 : 0.6% +[IPU1-0] 183.641584 s: LOAD: TSK: SELECT0 : 0.8% +[IPU1-0] 183.641676 s: LOAD: TSK: SELECT1 : 0.2% +[IPU1-0] 183.641767 s: LOAD: TSK: DISPLAY0 : 0.3% +[IPU1-0] 183.641889 s: LOAD: TSK: ISSCAPTURE : 1.8% +[IPU1-0] 183.648020 s: LOAD: TSK: ISSM2MISP : 8.7% +[IPU1-0] 183.648173 s: LOAD: TSK: ALGORITHM0 : 9.1% +[IPU1-0] 183.648264 s: LOAD: TSK: STAT_COLL : 3.8% +[IPU1-0] 183.648356 s: LOAD: TSK: MISC : 4.1% +[IPU1-0] 183.648630 s: +[IPU1-0] 183.648691 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 183.648783 s: +[IPU1-0] 183.648813 s: SYSTEM: Sempahores Objects, 6 of 1050 free +[IPU1-0] 183.648905 s: SYSTEM: Task Objects , 3 of 100 free +[IPU1-0] 183.651131 s: SYSTEM: Clock Objects , 93 of 100 free +[IPU1-0] 183.651253 s: SYSTEM: Hwi Objects , 87 of 100 free +[IPU1-0] 183.653754 s: +[IPU1-0] 183.653815 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 152352 B (148 KB) +[IPU1-0] 183.655035 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 183.655218 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88503000, Total size = 905957376 B (863 MB), Free size = 795453440 B (758 MB) +[IPU1-0] 183.655493 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbf000000, Total size = 129152 B (0 MB), Free size = 117632 B (0 MB) +[IPU1-0] 183.655676 s: +[IPU1-0] 183.655706 s: +[IPU1-0] 183.655737 s: CPU [IPU1-1 ] Statistics, +[IPU1-0] 183.655798 s: ************************* +[IPU1-0] 183.655859 s: +[IPU1-0] 183.655920 s: LOAD: CPU: 47.7% HWI: 1.1%, SWI:1.1%, Low Power: 26.4% +[IPU1-0] 183.656072 s: +[IPU1-0] 183.656194 s: LOAD: TSK: MISC : 45.5% +[IPU1-0] 183.656255 s: +[IPU1-0] 183.656316 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1016 +[IPU1-0] 183.656469 s: +[IPU1-0] 183.656530 s: SYSTEM: Sempahores Objects, 432 of 1050 free +[IPU1-0] 183.656621 s: SYSTEM: Task Objects , 38 of 100 free +[IPU1-0] 183.656713 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 183.656804 s: SYSTEM: Hwi Objects , 98 of 100 free +[IPU1-0] 183.656896 s: +[IPU1-0] 183.656926 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 646744 B (631 KB) +[IPU1-0] 183.657079 s: +[IPU1-0] 183.657140 s: +[IPU1-0] 183.657170 s: CPU [DSP1 ] Statistics, +[IPU1-0] 183.657231 s: ************************* +[IPU1-0] 183.657292 s: +[IPU1-0] 183.657323 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 87.6% +[IPU1-0] 183.657536 s: +[IPU1-0] 183.657628 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 183.657689 s: +[IPU1-0] 183.657750 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1016 +[IPU1-0] 183.657841 s: +[IPU1-0] 183.657872 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 183.657963 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 183.658055 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 183.658146 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 183.658238 s: +[IPU1-0] 183.658268 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 183.658726 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 518328 B (506 KB) +[IPU1-0] 183.659549 s: +[IPU1-0] 183.659641 s: +[IPU1-0] 183.659671 s: CPU [DSP2 ] Statistics, +[IPU1-0] 183.659732 s: ************************* +[IPU1-0] 183.659793 s: +[IPU1-0] 183.659824 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 87.7% +[IPU1-0] 183.659976 s: +[IPU1-0] 183.660037 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 183.660129 s: +[IPU1-0] 183.660159 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1016 +[IPU1-0] 183.660251 s: +[IPU1-0] 183.660281 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 183.660434 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 183.660556 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 183.660647 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 183.660739 s: +[IPU1-0] 183.660769 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 183.660922 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 518328 B (506 KB) +[IPU1-0] 183.661105 s: +[IPU1-0] 183.661135 s: +[IPU1-0] 183.661166 s: CPU [EVE1 ] Statistics, +[IPU1-0] 183.661227 s: ************************* +[IPU1-0] 183.661288 s: +[IPU1-0] 183.661349 s: LOAD: CPU: 3.2% HWI: 0.7%, SWI:0.1%, Low Power: 76.5% +[IPU1-0] 183.661562 s: +[IPU1-0] 183.661623 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 2.1% +[IPU1-0] 183.661745 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 183.661806 s: +[IPU1-0] 183.661867 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1016 +[IPU1-0] 183.661959 s: +[IPU1-0] 183.661989 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 183.662081 s: SYSTEM: Task Objects , 93 of 100 free +[IPU1-0] 183.662172 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 183.662264 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 183.662355 s: +[IPU1-0] 183.662447 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 183.662630 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 255472 B (249 KB) +[IPU1-0] 183.662782 s: +[IPU1-0] 183.662813 s: +[IPU1-0] 183.662874 s: CPU [EVE2 ] Statistics, +[IPU1-0] 183.662935 s: ************************* +[IPU1-0] 183.662996 s: +[IPU1-0] 183.663026 s: LOAD: CPU: 3.7% HWI: 0.9%, SWI:0.1%, Low Power: 89.1% +[IPU1-0] 183.663179 s: +[IPU1-0] 183.663209 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 2.4% +[IPU1-0] 183.664155 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 183.664277 s: +[IPU1-0] 183.664307 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1016 +[IPU1-0] 183.664521 s: +[IPU1-0] 183.664551 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 183.664643 s: SYSTEM: Task Objects , 93 of 100 free +[IPU1-0] 183.664734 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 183.664826 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 183.664917 s: +[IPU1-0] 183.664948 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 183.665131 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 255472 B (249 KB) +[IPU1-0] 183.665283 s: +[IPU1-0] 183.665680 s: +[IPU1-0] 183.665741 s: UTILS_PRCM_STATS: Current Temperature, +[IPU1-0] 183.665802 s: +[IPU1-0] 183.665832 s: Voltage Rail || Curr Temp Min - Max +[IPU1-0] 183.665985 s: --------------------------------------------------------- +[IPU1-0] 183.666107 s: PMHAL_PRCM_VD_MPU || [36.400 , 36.800] +[IPU1-0] 183.666198 s: PMHAL_PRCM_VD_CORE || [37.200 , 37.600] +[IPU1-0] 183.666320 s: PMHAL_PRCM_VD_IVAHD || [37.200 , 37.600] +[IPU1-0] 183.666534 s: PMHAL_PRCM_VD_DSPEVE || [35.600 , 36. 0] +[IPU1-0] 183.666656 s: PMHAL_PRCM_VD_GPU || [36.400 , 36.800] +[IPU1-0] 183.666778 s: +[IPU1-0] 183.666809 s: ============================================================================ +[IPU1-0] 183.666931 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) +[IPU1-0] 183.667022 s: ---------------------------------------------------------------------------- +[IPU1-0] 183.669462 s: UTILS_PRCM_STATS: Reading the regulator data failed +[IPU1-0] 183.669554 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! +[IPU1-0] 183.669828 s: +[IPU1-0] 183.669859 s: Statistics Collector, +[IPU1-0] 183.669920 s: +[IPU1-0] 183.669981 s: STATISTIC Avg Data Peak Data +[IPU1-0] 183.670042 s: COLLECTOR MB/s MB/s +[IPU1-0] 183.670133 s: -------------------------------------------------- +[IPU1-0] 183.670225 s: SCI_EMIF1 RD+WR | 23.392640 94.215952 +[IPU1-0] 183.670316 s: SCI_EMIF2 RD+WR | 12.879614 84.437461 +[IPU1-0] 183.670530 s: SCI_EMIF1 RD ONLY | 14.171932 52.574551 +[IPU1-0] 183.670652 s: SCI_EMIF1 WR ONLY | 9.223919 42.197945 +[IPU1-0] 183.670774 s: SCI_EMIF2 RD ONLY | 8.592815 46.805568 +[IPU1-0] 183.670865 s: SCI_EMIF2 WR ONLY | 4.299391 37.632008 +[IPU1-0] 183.670987 s: SCI_MA_MPU_P1 | 0.000000 0.000000 +[IPU1-0] 183.671079 s: SCI_MA_MPU_P2 | 0.000000 0.000000 +[IPU1-0] 183.671201 s: SCI_DSS | 0.000000 0.000000 +[IPU1-0] 183.671292 s: SCI_IPU1 | 9.584755 14.295081 +[IPU1-0] 183.671475 s: SCI_VIP1_P1 | 0.000000 0.000000 +[IPU1-0] 183.671597 s: SCI_VIP1_P2 | 0.000000 0.000000 +[IPU1-0] 183.671689 s: SCI_VPE_P1 | 0.000000 0.000000 +[IPU1-0] 183.671780 s: SCI_VPE_P2 | 0.000000 0.000000 +[IPU1-0] 183.671902 s: SCI_DSP1_MDMA | 0.048405 0.473948 +[IPU1-0] 183.671994 s: SCI_DSP1_EDMA | 0.000000 0.000000 +[IPU1-0] 183.672817 s: SCI_DSP2_MDMA | 0.048405 0.473853 +[IPU1-0] 183.672970 s: SCI_DSP2_EDMA | 0.000000 0.000000 +[IPU1-0] 183.673061 s: SCI_EVE1_TC0 | 2.013945 5.283185 +[IPU1-0] 183.673183 s: SCI_EVE1_TC1 | 0.000000 0.000000 +[IPU1-0] 183.673275 s: SCI_EVE2_TC0 | 2.013703 5.329868 +[IPU1-0] 183.673702 s: SCI_EVE2_TC1 | 0.000000 0.000000 +[IPU1-0] 183.673824 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 +[IPU1-0] 183.673915 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 +[IPU1-0] 183.674037 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 +[IPU1-0] 183.674129 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 +[IPU1-0] 183.674220 s: SCI_VIP2_P1 | 0.000000 0.000000 +[IPU1-0] 183.674342 s: SCI_VIP2_P2 | 0.000000 0.000000 +[IPU1-0] 183.674495 s: SCI_IVA | 0.000000 0.000000 +[IPU1-0] 183.674617 s: SCI_GPU_P1 | 0.000000 0.000000 +[IPU1-0] 183.674739 s: SCI_GPU_P2 | 0.000000 0.000000 +[IPU1-0] 183.674830 s: SCI_GMAC_SW | 0.000000 0.000000 +[IPU1-0] 183.674922 s: SCI_OCMC_RAM1 | 0.000000 0.000000 +[IPU1-0] 183.675044 s: SCI_OCMC_RAM2 | 0.000000 0.000000 +[IPU1-0] 183.675135 s: SCI_OCMC_RAM3 | 0.000000 0.000000 +[IPU1-0] 183.675227 s: SCI_ISS_RT | 0.000000 0.000000 +[IPU1-0] 183.675349 s: SCI_ISS_NRT1 | 0.000000 0.000000 +[IPU1-0] 183.675532 s: SCI_ISS_NRT2 | 0.000000 0.000000 +[IPU1-0] 183.675623 s: SCI_CAL | 0.000000 0.000000 +[IPU1-0] 183.775452 s: +[IPU1-0] 183.775544 s: +[IPU1-0] 183.775635 s: +[IPU1-0] 183.775696 s: ### CPU [IPU1-0], LinkID [ 87], +[IPU1-0] 183.775757 s: +[IPU1-0] 183.775818 s: [ ISSCAPTURE ] Link Statistics, +[IPU1-0] 183.775879 s: ****************************** +[IPU1-0] 183.775940 s: +[IPU1-0] 183.775971 s: Elapsed time = 3026 msec +[IPU1-0] 183.776062 s: +[IPU1-0] 183.776093 s: Get Full Buf Cb = 192.0 fps +[IPU1-0] 183.776184 s: Put Empty Buf Cb = 92.53 fps +[IPU1-0] 183.776245 s: Driver/Notify Cb = 240.25 fps +[IPU1-0] 183.776337 s: +[IPU1-0] 183.776367 s: Input Statistics, +[IPU1-0] 183.776489 s: +[IPU1-0] 183.776550 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 183.776611 s: | FPS | FPS | FPS | FPS +[IPU1-0] 183.776703 s: -------------------------------------------------- +[IPU1-0] 183.776794 s: 0 | 25.77 0. 0 0. 0 25.77 +[IPU1-0] 183.776916 s: 1 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777069 s: 2 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777191 s: 3 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777343 s: 4 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777526 s: 5 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777679 s: 6 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 183.777832 s: 7 | 23.13 0. 0 0. 0 23.13 +[IPU1-0] 183.777954 s: +[IPU1-0] 183.777984 s: Output Statistics, +[IPU1-0] 183.778045 s: +[IPU1-0] 183.778076 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 183.778167 s: | ID | FPS | FPS | FPS +[IPU1-0] 183.779174 s: --------------------------------------------- +[IPU1-0] 183.779296 s: 0 | 0 26.10 0. 0 0. 0 +[IPU1-0] 183.779479 s: 1 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.779631 s: 2 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.779753 s: 3 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.779875 s: 4 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.779997 s: 5 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.780119 s: 6 | 0 23.79 0. 0 0. 0 +[IPU1-0] 183.780241 s: 7 | 0 23.13 0. 0 0. 0 +[IPU1-0] 183.780333 s: +[IPU1-0] 183.780455 s: [ ISSCAPTURE ] LATENCY, +[IPU1-0] 183.780516 s: ******************** +[IPU1-0] 183.780577 s: +[IPU1-0] 183.780638 s: CPU [ IPU1-0], LinkID [ 43], Link Statistics not available ! +[IPU1-0] 183.780790 s: +[IPU1-0] 183.780851 s: ### CPU [IPU1-0], LinkID [ 1], +[IPU1-0] 183.780912 s: +[IPU1-0] 183.780973 s: [ IPC_OUT_1 ] Link Statistics, +[IPU1-0] 183.781034 s: ****************************** +[IPU1-0] 183.781095 s: +[IPU1-0] 183.781126 s: Elapsed time = 3027 msec +[IPU1-0] 183.781187 s: +[IPU1-0] 183.781248 s: New data Recv = 46.91 fps +[IPU1-0] 183.781309 s: Release data Recv = 33.36 fps +[IPU1-0] 183.781461 s: Driver/Notify Cb = 66.73 fps +[IPU1-0] 183.781553 s: +[IPU1-0] 183.781583 s: Input Statistics, +[IPU1-0] 183.781644 s: +[IPU1-0] 183.781675 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 183.781766 s: | FPS | FPS | FPS | FPS +[IPU1-0] 183.781858 s: -------------------------------------------------- +[IPU1-0] 183.781919 s: 0 | 23.78 0. 0 0. 0 23.78 +[IPU1-0] 183.782071 s: 1 | 23.12 0. 0 0. 0 23.12 +[IPU1-0] 183.782193 s: +[IPU1-0] 183.782254 s: Output Statistics, +[IPU1-0] 183.784542 s: +[IPU1-0] 183.784633 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 183.785121 s: | ID | FPS | FPS | FPS +[IPU1-0] 183.785213 s: --------------------------------------------- +[IPU1-0] 183.786128 s: 0 | 0 23.78 0. 0 0. 0 +[IPU1-0] 183.786280 s: 1 | 0 23.12 0. 0 0. 0 +[IPU1-0] 183.787073 s: +[IPU1-0] 183.787134 s: [ IPC_OUT_1 ] LATENCY, +[IPU1-0] 183.787195 s: ******************** +[IPU1-0] 183.788781 s: Local Link Latency : Avg = 7 us, Min = 0 us, Max = 91 us, +[IPU1-0] 183.788934 s: Source to Link Latency : Avg = 148 us, Min = 91 us, Max = 396 us, +[IPU1-0] 183.789056 s: +[IPU1-0] 184.289971 s: +[IPU1-0] 184.290032 s: ### CPU [ EVE2], LinkID [ 10], +[IPU1-0] 184.290123 s: +[IPU1-0] 184.290154 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 184.290245 s: ****************************** +[IPU1-0] 184.290306 s: +[IPU1-0] 184.290337 s: Elapsed time = 3537 msec +[IPU1-0] 184.290489 s: +[IPU1-0] 184.290550 s: Get Full Buf Cb = 41.56 fps +[IPU1-0] 184.290611 s: Put Empty Buf Cb = 46.93 fps +[IPU1-0] 184.290703 s: Driver/Notify Cb = 50.32 fps +[IPU1-0] 184.290764 s: +[IPU1-0] 184.290794 s: Input Statistics, +[IPU1-0] 184.290855 s: +[IPU1-0] 184.290916 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 184.290977 s: | FPS | FPS | FPS | FPS +[IPU1-0] 184.291069 s: -------------------------------------------------- +[IPU1-0] 184.291160 s: 0 | 23.74 0. 0 0. 0 23.74 +[IPU1-0] 184.291282 s: 1 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 184.291496 s: +[IPU1-0] 184.291526 s: Output Statistics, +[IPU1-0] 184.291587 s: +[IPU1-0] 184.291648 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 184.291709 s: | ID | FPS | FPS | FPS +[IPU1-0] 184.291770 s: --------------------------------------------- +[IPU1-0] 184.291862 s: 0 | 0 23.74 0. 0 0. 0 +[IPU1-0] 184.291984 s: 1 | 0 23.46 0. 0 0. 0 +[IPU1-0] 184.292106 s: +[IPU1-0] 184.292136 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 184.292197 s: ******************** +[IPU1-0] 184.292258 s: Local Link Latency : Avg = 25 us, Min = 0 us, Max = 153 us, +[IPU1-0] 184.292380 s: Source to Link Latency : Avg = 455 us, Min = 305 us, Max = 732 us, +[IPU1-0] 184.292563 s: +[IPU1-0] 184.292685 s: +[IPU1-0] 184.292716 s: ### CPU [ EVE2], LinkID [ 49], +[IPU1-0] 184.292807 s: +[IPU1-0] 184.292838 s: [ ALG_BAYERINPLACE ] Link Statistics, +[IPU1-0] 184.292929 s: ****************************** +[IPU1-0] 184.292990 s: +[IPU1-0] 184.293021 s: Elapsed time = 3539 msec +[IPU1-0] 184.293082 s: +[IPU1-0] 184.293143 s: New data Recv = 41.25 fps +[IPU1-0] 184.293204 s: +[IPU1-0] 184.293265 s: Input Statistics, +[IPU1-0] 184.293295 s: +[IPU1-0] 184.293356 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 184.294241 s: | FPS | FPS | FPS | FPS +[IPU1-0] 184.294363 s: -------------------------------------------------- +[IPU1-0] 184.294668 s: 0 | 23.73 0. 0 0. 0 23.73 +[IPU1-0] 184.294973 s: 1 | 23.45 0. 0 0. 0 23.45 +[IPU1-0] 184.295125 s: +[IPU1-0] 184.295156 s: Output Statistics, +[IPU1-0] 184.295217 s: +[IPU1-0] 184.295247 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 184.295339 s: | ID | FPS | FPS | FPS +[IPU1-0] 184.295583 s: --------------------------------------------- +[IPU1-0] 184.295674 s: 0 | 0 23.73 0. 0 0. 0 +[IPU1-0] 184.295796 s: 1 | 0 23.45 0. 0 0. 0 +[IPU1-0] 184.295918 s: +[IPU1-0] 184.295949 s: [ ALG_BAYERINPLACE ] LATENCY, +[IPU1-0] 184.296010 s: ******************** +[IPU1-0] 184.305008 s: Local Link Latency : Avg = 19 us, Min = 0 us, Max = 122 us, +[IPU1-0] 184.305160 s: Source to Link Latency : Avg = 642 us, Min = 488 us, Max = 945 us, +[IPU1-0] 184.305282 s: +[IPU1-0] 184.305587 s: +[IPU1-0] 184.305648 s: ### CPU [ EVE2], LinkID [ 0], +[IPU1-0] 184.305709 s: +[IPU1-0] 184.305770 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 184.305831 s: ****************************** +[IPU1-0] 184.305892 s: +[IPU1-0] 184.305923 s: Elapsed time = 3551 msec +[IPU1-0] 184.306014 s: +[IPU1-0] 184.306045 s: New data Recv = 41.39 fps +[IPU1-0] 184.306228 s: Release data Recv = 34.7 fps +[IPU1-0] 184.306319 s: Driver/Notify Cb = 37.45 fps +[IPU1-0] 184.306380 s: +[IPU1-0] 184.306502 s: Input Statistics, +[IPU1-0] 184.306563 s: +[IPU1-0] 184.306624 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 184.306685 s: | FPS | FPS | FPS | FPS +[IPU1-0] 184.313975 s: -------------------------------------------------- +[IPU1-0] 184.314097 s: 0 | 23.65 0. 0 0. 0 23.65 +[IPU1-0] 184.314219 s: 1 | 23.37 0. 0 0. 0 23.37 +[IPU1-0] 184.314341 s: +[IPU1-0] 184.314737 s: Output Statistics, +[IPU1-0] 184.314829 s: +[IPU1-0] 184.314860 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 184.314921 s: | ID | FPS | FPS | FPS +[IPU1-0] 184.315012 s: --------------------------------------------- +[IPU1-0] 184.315104 s: 0 | 0 23.65 0. 0 0. 0 +[IPU1-0] 184.315317 s: 1 | 0 23.37 0. 0 0. 0 +[IPU1-0] 184.315531 s: +[IPU1-0] 184.315592 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 184.317879 s: ******************** +[IPU1-0] 184.317971 s: Local Link Latency : Avg = 20 us, Min = 0 us, Max = 122 us, +[IPU1-0] 184.318611 s: Source to Link Latency : Avg = 848 us, Min = 671 us, Max = 1220 us, +[IPU1-0] 184.319160 s: +[IPU1-0] 184.822180 s: +[IPU1-0] 184.822241 s: ### CPU [IPU1-0], LinkID [ 10], +[IPU1-0] 184.822332 s: +[IPU1-0] 184.822363 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 184.822515 s: ****************************** +[IPU1-0] 184.822607 s: +[IPU1-0] 184.822637 s: Elapsed time = 4068 msec +[IPU1-0] 184.822698 s: +[IPU1-0] 184.822759 s: Get Full Buf Cb = 183.38 fps +[IPU1-0] 184.822820 s: Put Empty Buf Cb = 46.95 fps +[IPU1-0] 184.822912 s: Driver/Notify Cb = 74.48 fps +[IPU1-0] 184.822973 s: +[IPU1-0] 184.823034 s: Input Statistics, +[IPU1-0] 184.823064 s: +[IPU1-0] 184.823125 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 184.823186 s: | FPS | FPS | FPS | FPS +[IPU1-0] 184.823278 s: -------------------------------------------------- +[IPU1-0] 184.823369 s: 0 | 23.84 0. 0 0. 0 23.84 +[IPU1-0] 184.823552 s: 1 | 23.59 0. 0 0. 0 23.59 +[IPU1-0] 184.823705 s: +[IPU1-0] 184.823735 s: Output Statistics, +[IPU1-0] 184.823796 s: +[IPU1-0] 184.823827 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 184.823918 s: | ID | FPS | FPS | FPS +[IPU1-0] 184.823979 s: --------------------------------------------- +[IPU1-0] 184.824071 s: 0 | 0 23.84 0. 0 0. 0 +[IPU1-0] 184.824193 s: 1 | 0 23.59 0. 0 0. 0 +[IPU1-0] 184.824284 s: +[IPU1-0] 184.824345 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 184.824406 s: ******************** +[IPU1-0] 184.824528 s: Local Link Latency : Avg = 19 us, Min = 0 us, Max = 92 us, +[IPU1-0] 184.824650 s: Source to Link Latency : Avg = 1117 us, Min = 854 us, Max = 1708 us, +[IPU1-0] 184.824772 s: +[IPU1-0] 184.824864 s: +[IPU1-0] 184.824925 s: ### CPU [IPU1-0], LinkID [ 0], +[IPU1-0] 184.824986 s: +[IPU1-0] 184.825047 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 184.825108 s: ****************************** +[IPU1-0] 184.825169 s: +[IPU1-0] 184.825199 s: Elapsed time = 4073 msec +[IPU1-0] 184.825260 s: +[IPU1-0] 184.825321 s: New data Recv = 47.63 fps +[IPU1-0] 184.826023 s: Release data Recv = 24.30 fps +[IPU1-0] 184.826145 s: Driver/Notify Cb = 57.45 fps +[IPU1-0] 184.826236 s: +[IPU1-0] 184.826267 s: Input Statistics, +[IPU1-0] 184.826328 s: +[IPU1-0] 184.826358 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 184.826755 s: | FPS | FPS | FPS | FPS +[IPU1-0] 184.826846 s: -------------------------------------------------- +[IPU1-0] 184.826938 s: 0 | 23.81 0. 0 0. 0 23.81 +[IPU1-0] 184.827090 s: 1 | 23.81 0. 0 0. 0 23.81 +[IPU1-0] 184.827212 s: +[IPU1-0] 184.827243 s: Output Statistics, +[IPU1-0] 184.827304 s: +[IPU1-0] 184.827334 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 184.827487 s: | ID | FPS | FPS | FPS +[IPU1-0] 184.827578 s: --------------------------------------------- +[IPU1-0] 184.827670 s: 0 | 0 23.81 0. 0 0. 0 +[IPU1-0] 184.827792 s: 1 | 0 23.81 0. 0 0. 0 +[IPU1-0] 184.827914 s: +[IPU1-0] 184.827944 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 184.828005 s: ******************** +[IPU1-0] 184.828066 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 122 us, +[IPU1-0] 184.828188 s: Source to Link Latency : Avg = 150 us, Min = 91 us, Max = 458 us, +[IPU1-0] 184.828310 s: +[IPU1-0] 185.327578 s: +[IPU1-0] 185.327731 s: ### CPU [ EVE1], LinkID [ 10], +[IPU1-0] 185.327822 s: +[IPU1-0] 185.327853 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 185.327914 s: ****************************** +[IPU1-0] 185.327975 s: +[IPU1-0] 185.328036 s: Elapsed time = 4576 msec +[IPU1-0] 185.328097 s: +[IPU1-0] 185.328127 s: Get Full Buf Cb = 45.89 fps +[IPU1-0] 185.328219 s: Put Empty Buf Cb = 47.20 fps +[IPU1-0] 185.328310 s: Driver/Notify Cb = 50.26 fps +[IPU1-0] 185.328371 s: +[IPU1-0] 185.328402 s: Input Statistics, +[IPU1-0] 185.328524 s: +[IPU1-0] 185.328585 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.328676 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.328737 s: -------------------------------------------------- +[IPU1-0] 185.328829 s: 0 | 23.60 0. 0 0. 0 23.60 +[IPU1-0] 185.328951 s: 1 | 23.60 0. 0 0. 0 23.60 +[IPU1-0] 185.329103 s: +[IPU1-0] 185.329134 s: Output Statistics, +[IPU1-0] 185.329195 s: +[IPU1-0] 185.329225 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.329317 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.329378 s: --------------------------------------------- +[IPU1-0] 185.329713 s: 0 | 0 23.60 0. 0 0. 0 +[IPU1-0] 185.329835 s: 1 | 0 23.60 0. 0 0. 0 +[IPU1-0] 185.329957 s: +[IPU1-0] 185.330018 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 185.330079 s: ******************** +[IPU1-0] 185.330110 s: Local Link Latency : Avg = 23 us, Min = 0 us, Max = 31 us, +[IPU1-0] 185.330232 s: Source to Link Latency : Avg = 454 us, Min = 275 us, Max = 732 us, +[IPU1-0] 185.330354 s: +[IPU1-0] 185.330537 s: +[IPU1-0] 185.330598 s: ### CPU [ EVE1], LinkID [ 49], +[IPU1-0] 185.330689 s: +[IPU1-0] 185.330720 s: [ ALG_BAYERINPLACE ] Link Statistics, +[IPU1-0] 185.330781 s: ****************************** +[IPU1-0] 185.330842 s: +[IPU1-0] 185.331665 s: Elapsed time = 4578 msec +[IPU1-0] 185.331757 s: +[IPU1-0] 185.331787 s: New data Recv = 45.65 fps +[IPU1-0] 185.331879 s: +[IPU1-0] 185.331909 s: Input Statistics, +[IPU1-0] 185.331970 s: +[IPU1-0] 185.332001 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.332092 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.332306 s: -------------------------------------------------- +[IPU1-0] 185.332397 s: 0 | 23.59 0. 0 0. 0 23.59 +[IPU1-0] 185.332611 s: 1 | 23.59 0. 0 0. 0 23.59 +[IPU1-0] 185.332763 s: +[IPU1-0] 185.332885 s: Output Statistics, +[IPU1-0] 185.332946 s: +[IPU1-0] 185.333007 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.333068 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.333160 s: --------------------------------------------- +[IPU1-0] 185.333221 s: 0 | 0 23.59 0. 0 0. 0 +[IPU1-0] 185.333343 s: 1 | 0 23.59 0. 0 0. 0 +[IPU1-0] 185.341517 s: +[IPU1-0] 185.341578 s: [ ALG_BAYERINPLACE ] LATENCY, +[IPU1-0] 185.341639 s: ******************** +[IPU1-0] 185.341700 s: Local Link Latency : Avg = 17 us, Min = 0 us, Max = 122 us, +[IPU1-0] 185.341822 s: Source to Link Latency : Avg = 609 us, Min = 518 us, Max = 946 us, +[IPU1-0] 185.342066 s: +[IPU1-0] 185.342188 s: +[IPU1-0] 185.342249 s: ### CPU [ EVE1], LinkID [ 0], +[IPU1-0] 185.342310 s: +[IPU1-0] 185.342371 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 185.342493 s: ****************************** +[IPU1-0] 185.342676 s: +[IPU1-0] 185.342737 s: Elapsed time = 4590 msec +[IPU1-0] 185.342798 s: +[IPU1-0] 185.342829 s: New data Recv = 45.75 fps +[IPU1-0] 185.342920 s: Release data Recv = 24.61 fps +[IPU1-0] 185.342981 s: Driver/Notify Cb = 27.88 fps +[IPU1-0] 185.343073 s: +[IPU1-0] 185.343103 s: Input Statistics, +[IPU1-0] 185.343164 s: +[IPU1-0] 185.357896 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.358018 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.358110 s: -------------------------------------------------- +[IPU1-0] 185.358171 s: 0 | 23.52 0. 0 0. 0 23.52 +[IPU1-0] 185.358323 s: 1 | 23.52 0. 0 0. 0 23.52 +[IPU1-0] 185.359116 s: +[IPU1-0] 185.359177 s: Output Statistics, +[IPU1-0] 185.359238 s: +[IPU1-0] 185.359269 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.359360 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.359513 s: --------------------------------------------- +[IPU1-0] 185.359604 s: 0 | 0 23.52 0. 0 0. 0 +[IPU1-0] 185.359726 s: 1 | 0 23.52 0. 0 0. 0 +[IPU1-0] 185.359848 s: +[IPU1-0] 185.359909 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 185.359970 s: ******************** +[IPU1-0] 185.360031 s: Local Link Latency : Avg = 20 us, Min = 0 us, Max = 122 us, +[IPU1-0] 185.360123 s: Source to Link Latency : Avg = 797 us, Min = 671 us, Max = 1220 us, +[IPU1-0] 185.360245 s: +[IPU1-0] 185.859574 s: +[IPU1-0] 185.859665 s: ### CPU [IPU1-0], LinkID [ 11], +[IPU1-0] 185.859757 s: +[IPU1-0] 185.859787 s: [ IPC_IN_1 ] Link Statistics, +[IPU1-0] 185.859848 s: ****************************** +[IPU1-0] 185.859909 s: +[IPU1-0] 185.859970 s: Elapsed time = 5107 msec +[IPU1-0] 185.860031 s: +[IPU1-0] 185.860062 s: Get Full Buf Cb = 183.27 fps +[IPU1-0] 185.860153 s: Put Empty Buf Cb = 46.99 fps +[IPU1-0] 185.860214 s: Driver/Notify Cb = 79.30 fps +[IPU1-0] 185.860306 s: +[IPU1-0] 185.860336 s: Input Statistics, +[IPU1-0] 185.860397 s: +[IPU1-0] 185.860428 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.860641 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.860733 s: -------------------------------------------------- +[IPU1-0] 185.860824 s: 0 | 23.69 0. 0 0. 0 23.69 +[IPU1-0] 185.860946 s: 1 | 23.69 0. 0 0. 0 23.69 +[IPU1-0] 185.861099 s: +[IPU1-0] 185.861129 s: Output Statistics, +[IPU1-0] 185.861190 s: +[IPU1-0] 185.861221 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.861282 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.861373 s: --------------------------------------------- +[IPU1-0] 185.861678 s: 0 | 0 23.69 0. 0 0. 0 +[IPU1-0] 185.861831 s: 1 | 0 23.69 0. 0 0. 0 +[IPU1-0] 185.861953 s: +[IPU1-0] 185.861983 s: [ IPC_IN_1 ] LATENCY, +[IPU1-0] 185.862044 s: ******************** +[IPU1-0] 185.862105 s: Local Link Latency : Avg = 24 us, Min = 0 us, Max = 122 us, +[IPU1-0] 185.862227 s: Source to Link Latency : Avg = 1105 us, Min = 854 us, Max = 1617 us, +[IPU1-0] 185.862349 s: +[IPU1-0] 185.862410 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! +[IPU1-0] 185.863203 s: +[IPU1-0] 185.863264 s: ### CPU [IPU1-0], LinkID [ 88], +[IPU1-0] 185.863356 s: +[IPU1-0] 185.863386 s: [ ISSM2MISP ] Link Statistics, +[IPU1-0] 185.863569 s: ****************************** +[IPU1-0] 185.863630 s: +[IPU1-0] 185.863661 s: Elapsed time = 5114 msec +[IPU1-0] 185.863752 s: +[IPU1-0] 185.863783 s: New data Recv = 179.89 fps +[IPU1-0] 185.863874 s: Get Full Buf Cb = 61.0 fps +[IPU1-0] 185.863935 s: Driver/Notify Cb = 189.47 fps +[IPU1-0] 185.864027 s: +[IPU1-0] 185.864057 s: Input Statistics, +[IPU1-0] 185.864118 s: +[IPU1-0] 185.864149 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.864240 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.864301 s: -------------------------------------------------- +[IPU1-0] 185.864393 s: 0 | 25.22 0. 0 0. 0 25.22 +[IPU1-0] 185.864576 s: 1 | 23.66 0. 0 0. 0 23.66 +[IPU1-0] 185.864728 s: 2 | 23.66 0. 0 0. 0 23.46 +[IPU1-0] 185.864881 s: 3 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 185.865003 s: 4 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 185.865155 s: 5 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 185.865277 s: 6 | 23.46 0. 0 0. 0 23.46 +[IPU1-0] 185.865399 s: 7 | 23.26 0. 0 0. 0 23.26 +[IPU1-0] 185.865613 s: +[IPU1-0] 185.865643 s: Output Statistics, +[IPU1-0] 185.865704 s: +[IPU1-0] 185.865735 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.865826 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.865887 s: --------------------------------------------- +[IPU1-0] 185.865979 s: 0 | 0 25.22 0. 0 0. 0 +[IPU1-0] 185.866101 s: 0 | 1 13.10 12.12 0. 0 +[IPU1-0] 185.866223 s: 0 | 2 0. 0 25.22 0. 0 +[IPU1-0] 185.866345 s: 0 | 3 0. 0 25.22 0. 0 +[IPU1-0] 185.866711 s: 1 | 0 23.66 0. 0 0. 0 +[IPU1-0] 185.866833 s: 1 | 1 12.90 10.75 0. 0 +[IPU1-0] 185.867778 s: 1 | 2 0. 0 23.66 0. 0 +[IPU1-0] 185.867931 s: 1 | 3 0. 0 23.66 0. 0 +[IPU1-0] 185.868053 s: 2 | 0 23.46 0. 0 0. 0 +[IPU1-0] 185.868175 s: 2 | 1 12.51 10.95 0. 0 +[IPU1-0] 185.868297 s: 2 | 2 0. 0 23.46 0. 0 +[IPU1-0] 185.868419 s: 2 | 3 0. 0 23.46 0. 0 +[IPU1-0] 185.868632 s: 3 | 0 23.46 0. 0 0. 0 +[IPU1-0] 185.868754 s: 3 | 1 12.31 11.14 0. 0 +[IPU1-0] 185.868876 s: 3 | 2 0. 0 23.46 0. 0 +[IPU1-0] 185.868998 s: 3 | 3 0. 0 23.46 0. 0 +[IPU1-0] 185.869120 s: 4 | 0 23.46 0. 0 0. 0 +[IPU1-0] 185.869242 s: 4 | 1 12.12 11.34 0. 0 +[IPU1-0] 185.869364 s: 4 | 2 0. 0 23.46 0. 0 +[IPU1-0] 185.869547 s: 4 | 3 0. 0 23.46 0. 0 +[IPU1-0] 185.869669 s: 5 | 0 23.46 0. 0 0. 0 +[IPU1-0] 185.869791 s: 5 | 1 11.92 11.53 0. 0 +[IPU1-0] 185.869913 s: 5 | 2 0. 0 23.46 0. 0 +[IPU1-0] 185.870035 s: 5 | 3 0. 0 23.46 0. 0 +[IPU1-0] 185.870157 s: 6 | 0 23.46 0. 0 0. 0 +[IPU1-0] 185.870279 s: 6 | 1 11.53 11.92 0. 0 +[IPU1-0] 185.870402 s: 6 | 2 0. 0 23.46 0. 0 +[IPU1-0] 185.870585 s: 6 | 3 0. 0 23.46 0. 0 +[IPU1-0] 185.870707 s: 7 | 0 23.26 0. 0 0. 0 +[IPU1-0] 185.870829 s: 7 | 1 11.34 11.92 0. 0 +[IPU1-0] 185.870951 s: 7 | 2 0. 0 23.26 0. 0 +[IPU1-0] 185.871073 s: 7 | 3 0. 0 23.26 0. 0 +[IPU1-0] 185.871195 s: +[IPU1-0] 185.871225 s: [ ISSM2MISP ] LATENCY, +[IPU1-0] 185.871286 s: ******************** +[IPU1-0] 185.871347 s: Local Link Latency : Avg = 4449 us, Min = 4270 us, Max = 6436 us, +[IPU1-0] 185.872293 s: Source to Link Latency : Avg = 19367 us, Min = 4575 us, Max = 39438 us, +[IPU1-0] 185.872445 s: +[IPU1-0] 185.872659 s: +[IPU1-0] 185.872689 s: ### CPU [IPU1-0], LinkID [ 49], +[IPU1-0] 185.872781 s: +[IPU1-0] 185.872811 s: [ ALG_ISS_AEWB ] Link Statistics, +[IPU1-0] 185.872903 s: ****************************** +[IPU1-0] 185.872964 s: +[IPU1-0] 185.872994 s: Elapsed time = 5116 msec +[IPU1-0] 185.873086 s: +[IPU1-0] 185.873116 s: New data Recv = 7.3 fps +[IPU1-0] 185.873177 s: +[IPU1-0] 185.873238 s: Input Statistics, +[IPU1-0] 185.873269 s: +[IPU1-0] 185.873330 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.873391 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.873543 s: -------------------------------------------------- +[IPU1-0] 185.873635 s: 0 | 12.50 0. 0 0. 0 12.50 +[IPU1-0] 185.873787 s: +[IPU1-0] 185.873818 s: Output Statistics, +[IPU1-0] 185.873879 s: +[IPU1-0] 185.873909 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 185.874001 s: | ID | FPS | FPS | FPS +[IPU1-0] 185.874062 s: --------------------------------------------- +[IPU1-0] 185.874153 s: 0 | 0 12.50 0. 0 0. 0 +[IPU1-0] 185.874275 s: +[IPU1-0] 185.874306 s: [ ALG_ISS_AEWB ] LATENCY, +[IPU1-0] 185.874367 s: ******************** +[IPU1-0] 185.874428 s: Local Link Latency : Avg = 10299 us, Min = 61 us, Max = 152199 us, +[IPU1-0] 185.874611 s: Source to Link Latency : Avg = 210994 us, Min = 19551 us, Max = 590099 us, +[IPU1-0] 185.874733 s: +[IPU1-0] 185.874794 s: CPU [ IPU1-0], LinkID [ 44], Link Statistics not available ! +[IPU1-0] 185.874977 s: +[IPU1-0] 185.875007 s: ### CPU [IPU1-0], LinkID [ 77], +[IPU1-0] 185.875099 s: +[IPU1-0] 185.875129 s: [ DISPLAY ] Link Statistics, +[IPU1-0] 185.875190 s: ****************************** +[IPU1-0] 185.875251 s: +[IPU1-0] 185.875282 s: Elapsed time = 5082 msec +[IPU1-0] 185.875373 s: +[IPU1-0] 185.875404 s: New data Recv = 23.41 fps +[IPU1-0] 185.875556 s: Driver/Notify Cb = 60.1 fps +[IPU1-0] 185.875648 s: +[IPU1-0] 185.875678 s: Input Statistics, +[IPU1-0] 185.875739 s: +[IPU1-0] 185.875770 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 185.875861 s: | FPS | FPS | FPS | FPS +[IPU1-0] 185.876746 s: -------------------------------------------------- +[IPU1-0] 185.876868 s: 0 | 23.61 0. 0 0. 0 23.61 +[IPU1-0] 185.877020 s: +[IPU1-0] 185.877051 s: [ DISPLAY ] LATENCY, +[IPU1-0] 185.877112 s: ******************** +[IPU1-0] 185.877173 s: Local Link Latency : Avg = 46 us, Min = 30 us, Max = 427 us, +[IPU1-0] 185.877295 s: Source to Link Latency : Avg = 31501 us, Min = 7015 us, Max = 43463 us, +[IPU1-0] 185.877417 s: +[IPU1-0] 185.877539 s: Display UnderFlow Count = 0 +[IPU1-0] 185.877600 s: +[IPU1-0] 186.377508 s: + +Hi, What's the resolution you are using? What is the opp you are using? Yes, ISP could be the main culprit. It is taking around 4.5m to process a frame. 8 camera would take around 36ms, so cannot process 8CH @30fps. [IPU1-0] 185.871347 s: Local Link Latency : Avg = 4449 us, Min = 4270 us, Max = 6436 us, Regards, Brijesh + +Resolution is 1280x960. Sensor is IMX224. So, its not possible to have 30fps x 8 cams? Even with AEWB2? Can you expand the "opp"? + +Hi, It is not about AEWB2. AEWB is SW algorithm. Even if it is running slower, ISP should be able to process. But somehow it takes 4.5ms to process frame. This is slightly higher. Depending on the device you are using, you might be able to increase isp frequency and that should allow your to run 8Channel of 1280x960 resolution. Please refer to TRM for more details. Regards, Brijesh + +Thanks for info. We use tda2pxevm. My collegue said that we already have it at OPP_PLUS mode. Which is high ISP frequency i think. I have one more question related to this task. Sometimes we get < Utils_mbxSendCmd(): Msg Alloc Falied (0) > error with this UC (and some other tda2 UCes with 8cam system). Can it be caused by slow frame processing? + +Hi, Yes, it is caused due to slow processing. Message Box are in limited numbers, so if link is running slowed, it would just pile up the queues and could run out. I am not sure if opp_plus has higher isp frequency, could you please check in datasheet/TRM? Regards, Brijesh + +Hello. "TDA2Px ADAS applications processor 23mm package (ACD package) silicon revision 1.0 datasheet (Rev. F)" has Table 5-4 Our frequencies are: IPU1_0 IPU1_1 DSP1 DSP2 EVE1 EVE2 IVA 212 212 1000 1000 900 900 532 For some reason i cannot get ISP frequency with Utils_prcmPrintAllCPUFrequency() built-in function, but all other values are matches up with table. + +Yes, i think ISP is still running at around 355MHz, even in OPP_Plus. Which boot are you using? Are you using uboot or SBL? Can you search on e2e forum? you could find how this can be changed.. Regards, Brijesh + +Hello. I didnt found any function or register which can give me access to ISP frequency in TRM or VisionSDK_ApiGuide. Is it actually possible?Can you provide any info? Thanks. + +Hi, Can you please refer to file ti_components\drivers\pdk_01_10_02_07\packages\ti\boot\sbl_auto\sbl_lib\src\tda2xx\sbl_lib_tda2xx_prcm_dpll.c. This file in SBL sets up the isp clock. I dont see opp_plus, but there is opp_high mode. but i am not sure if isp clock is increased here. You could also refer to below e2e thread. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/763222/tda2p-abz-maximum-isp-throughput/2822349#2822349 https://e2e.ti.com/support/processors-group/processors/f/processors-forum/864523/tda2pxevm-pdk_sw-the-performance-of-m2msimcopldcvtnf Regards, Brijesh + +Hello. I have OppPlus option in my sbl_lib_tda2xx_prcm_dpll.c file: sbl_lib_tda2xx_prcm_dpll.c /* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +/** + * \file sbl_lib_tda2xx_prcm_dpll.c + * + * \brief This file contains the structure for all DPLL Divider elements for + * TDA2xx SOC family. This also contains some related macros. + */ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* ========================================================================== */ +/* Macros & Typedefs */ +/* ========================================================================== */ + +/* None */ + +/* ========================================================================== */ +/* Structures and Enums */ +/* ========================================================================== */ + +/* None */ + +/* ========================================================================== */ +/* Internal Function Declarations */ +/* ========================================================================== */ + +/* None */ + +/* ========================================================================== */ +/* Global Variables */ +/* ========================================================================== */ + +/* Arrays given below are defined for 20 MHz */ +static pmhalPrcmPllPostDivValue_t dpllMpuPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ +}; +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_DRA72x) +static pmhalPrcmPllPostDivValue_t dpllMpuPostDivCfgOppOd_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ +}; +#endif +#if defined (SOC_TDA2PX) +static pmhalPrcmPllPostDivValue_t dpllMpuPostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ +}; +#endif +#if defined (SOC_TDA2PX) +static pmhalPrcmPllPostDivValue_t dpllCorePostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2 }, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 4 }, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 62}, /* Div_h13_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H14, 5 }, /* Div_h14_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H21, 6 }, /* Div_h21_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H22, 5 }, /* Div_h22_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H23, 4 }, /* Div_h23_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H24, 1 } /* Div_h24_clkcfg */ +}; +static pmhalPrcmPllPostDivValue_t dpllCorePostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2 }, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 4 }, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 62}, /* Div_h13_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H14, 5 }, /* Div_h14_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H21, 4 }, /* Div_h21_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H22, 5 }, /* Div_h22_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H23, 4 }, /* Div_h23_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H24, 1 } /* Div_h24_clkcfg */ +}; +#else +static pmhalPrcmPllPostDivValue_t dpllCorePostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2 }, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 4 }, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 62}, /* Div_h13_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H14, 5 }, /* Div_h14_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H22, 5 }, /* Div_h22_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H23, 4 }, /* Div_h23_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H24, 1 } /* Div_h24_clkcfg */ +}; +#endif + +static pmhalPrcmPllPostDivValue_t dpllPerPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 4}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 1}, /* Div_m3_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H11, 3}, /* Div_h11_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 4}, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 4}, /* Div_h13_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H14, 2} /* Div_h14_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllDspPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 3} /* Div_m3_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllEvePostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2} /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllIvaPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 3} /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllGpuPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2} /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllDdrPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H11, 8} /* Div_h11_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllGmacPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 4 }, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 10}, /* Div_m3_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H11, 40}, /* Div_h11_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 8 }, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 10} /* Div_h13_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllAbePostDivCfgAllOpp_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 1} /* Div_m3_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllUsbPostDivCfgAllOpp_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2} /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllPcieRefPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 15}, /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllDspPostDivCfgOppOd_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 3} /* Div_m3_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllIvaPostDivCfgOppOd_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2}, /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllGpuPostDivCfgOppOd_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2} /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllEvePostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2}, /* Div_m2_clkcfg */ +}; + +#if defined (SOC_TDA2PX) +static pmhalPrcmPllPostDivValue_t dpllEvePostDivCfgOppPlus_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ +}; +#endif + +static pmhalPrcmPllPostDivValue_t dpllIvaPostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 2}, /* Div_m2_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllVideo1PostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_H11, 13} /* Div_h11_clkcfg */ +}; + +static pmhalPrcmPllPostDivValue_t dpllHdmiPostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1} /* Div_m2_clkcfg */ +}; + +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) +static pmhalPrcmPllPostDivValue_t dpllVideo2PostDivCfgOppNom_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 5 }, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H11, 10}, /* Div_h11_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H12, 10}, /* Div_h12_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H13, 10}, /* Div_h13_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_H14, 10} /* Div_h14_clkcfg */ +}; +#endif + +#if defined (SOC_TDA2XX) +static pmhalPrcmPllPostDivValue_t dpllDspPostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 3} /* Div_m3_clkcfg */ +}; +#endif + +#if defined (SOC_TDA2PX) +static pmhalPrcmPllPostDivValue_t dpllDspPostDivCfgOppHigh_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ + {PMHAL_PRCM_DPLL_POST_DIV_M3, 1} /* Div_m3_clkcfg */ +}; +#endif + +#if defined (SOC_TDA2XX) +static pmhalPrcmPllPostDivValue_t dpllMpuPostDivCfgOppLow_20[] = +{ + {PMHAL_PRCM_DPLL_POST_DIV_M2, 1}, /* Div_m2_clkcfg */ +}; +#endif + +static pmhalPrcmDpllConfig_t dpllCoreCfgOppNom_20 = +{ + 266, + 4, + 0, + dpllCorePostDivCfgOppNom_20, + (sizeof (dpllCorePostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +#if defined (SOC_TDA2PX) +/* DPLL Core is still configured at NOM freq. The post div H21 is configured, + based on different OPP used for ISP clock. */ +static pmhalPrcmDpllConfig_t dpllCoreCfgOppHigh_20 = +{ + 266, + 4, + 0, + dpllCorePostDivCfgOppHigh_20, + (sizeof (dpllCorePostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +static pmhalPrcmDpllConfig_t dpllPerCfgOppNom_20 = +{ + 96, + 4, + 0, + dpllPerPostDivCfgOppNom_20, + (sizeof (dpllPerPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllDspCfgOppNom_20 = +{ + 150, + 4, + 0, + dpllDspPostDivCfgOppNom_20, + (sizeof (dpllDspPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllEveCfgOppNom_20 = +{ + 214, + 3, + 0, + dpllEvePostDivCfgOppNom_20, + (sizeof (dpllEvePostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllIvaCfgOppNom_20 = +{ + 233, + 3, + 0, + dpllIvaPostDivCfgOppNom_20, + (sizeof (dpllIvaPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllGpuCfgOppNom_20 = +{ + 170, + 3, + 0, + dpllGpuPostDivCfgOppNom_20, + (sizeof (dpllGpuPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllGmacCfgOppNom_20 = +{ + 250, + 4, + 0, + dpllGmacPostDivCfgOppNom_20, + (sizeof (dpllGmacPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllAbeCfgAllOpp_20 = +{ + 200, + 9, + 0, + dpllAbePostDivCfgAllOpp_20, + (sizeof (dpllAbePostDivCfgAllOpp_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllUsbCfgAllOpp_20 = +{ + 27, + 0, + 0, + dpllUsbPostDivCfgAllOpp_20, + (sizeof (dpllUsbPostDivCfgAllOpp_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllPcieRefCfgOppNom_20 = +{ + 750, /* Multiplier */ + 9, /* Divider */ + 0, /* DutyCycleCorrector */ + dpllPcieRefPostDivCfgOppNom_20, + (sizeof (dpllPcieRefPostDivCfgOppNom_20) / + sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllDspCfgOppOd_20 = +{ + 175, + 4, + 0, + dpllDspPostDivCfgOppOd_20, + (sizeof (dpllDspPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllIvaCfgOppOd_20 = +{ + 172, + 3, + 0, + dpllIvaPostDivCfgOppOd_20, + (sizeof (dpllIvaPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllGpuCfgOppOd_20 = +{ + 200, + 3, + 0, + dpllGpuPostDivCfgOppOd_20, + (sizeof (dpllGpuPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllEveCfgOppHigh_20 = +{ + 260, + 3, + 0, + dpllEvePostDivCfgOppHigh_20, + (sizeof (dpllEvePostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllEveCfgOppPlus_20 = +{ + 180, + 3, + 0, + dpllEvePostDivCfgOppPlus_20, + (sizeof (dpllEvePostDivCfgOppPlus_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +static pmhalPrcmDpllConfig_t dpllIvaCfgOppHigh_20 = +{ + 266, + 4, + 0, + dpllIvaPostDivCfgOppHigh_20, + (sizeof (dpllIvaPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllVideo1CfgOppNom_20 = +{ + 1637, /* Multiplier */ + 39, /* Divider */ + 0, /* DutyCycleCorrector */ + dpllVideo1PostDivCfgOppNom_20, + (sizeof (dpllVideo1PostDivCfgOppNom_20) / + sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllHdmiCfgOppNom_20 = +{ + 1188, + 15, + 0, + dpllHdmiPostDivCfgOppNom_20, + (sizeof (dpllHdmiPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllVideo2CfgOppNom_20 = +{ + 297, /* Multiplier */ + 7, /* Divider */ + 0, /* DutyCycleCorrector */ + dpllVideo2PostDivCfgOppNom_20, + (sizeof (dpllVideo2PostDivCfgOppNom_20) / + sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +#if defined (SOC_TDA2XX) +static pmhalPrcmDpllConfig_t dpllDspCfgOppHigh_20 = +{ + 187, + 4, + 0, + dpllDspPostDivCfgOppHigh_20, + (sizeof (dpllDspPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllDspCfgOppHigh_20 = +{ + 187, + 4, + 0, + dpllDspPostDivCfgOppHigh_20, + (sizeof (dpllDspPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllDspCfgOppHighHppPackage_20 = +{ + 170, + 3, + 0, + dpllDspPostDivCfgOppHigh_20, + (sizeof (dpllDspPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllDspCfgOppPlus_20 = +{ + 500, + 9, + 0, + dpllDspPostDivCfgOppHigh_20, + (sizeof (dpllDspPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +#if defined (SOC_TDA2XX) +static pmhalPrcmDpllConfig_t dpllMpuCfgOppLow_20 = +{ + 250, + 9, + 0, + dpllMpuPostDivCfgOppLow_20, + (sizeof (dpllMpuPostDivCfgOppLow_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +#if defined (SOC_TDA2XX) +/* TDA2xx DDR Phy Clk is configured at 532 */ +static pmhalPrcmDpllConfig_t dpllDdrCfgOppNom_20 = +{ + 266, + 4, + 0, + dpllDdrPostDivCfgOppNom_20, + (sizeof (dpllDdrPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#else +/* TDA2Ex and TDA2Px DDR Phy Clk is configured at 666 */ +static pmhalPrcmDpllConfig_t dpllDdrCfgOppNom_20 = +{ + 333, + 4, + 0, + dpllDdrPostDivCfgOppNom_20, + (sizeof (dpllDdrPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllMpuCfgOppNom_20 = +{ +#if defined (SOC_DRA75x) + /* DRA74x/DRA75x OPP NOM is 1000 MHz MPU_CLK */ + 500, +#else + /* TDA2xx OPP NOM is 750 MHz MPU_CLK */ + 375, +#endif + 9, + 0, + dpllMpuPostDivCfgOppNom_20, + (sizeof (dpllMpuPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +static pmhalPrcmDpllConfig_t dpllMpuCfgOppOd_20 = +{ + 294, + 4, + 0, + dpllMpuPostDivCfgOppOd_20, + (sizeof (dpllMpuPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#else +static pmhalPrcmDpllConfig_t dpllMpuCfgOppNom_20 = +{ +#if defined (SOC_DRA72x) + /* DRA72x OPP NOM is 1000 MHz MPU_CLK */ + 500, +#else + /* TDA2Ex OPP NOM is 800 MHz MPU_CLK */ + 400, +#endif + 9, + 0, + dpllMpuPostDivCfgOppNom_20, + (sizeof (dpllMpuPostDivCfgOppNom_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; + +#if defined (SOC_DRA72x) +static pmhalPrcmDpllConfig_t dpllMpuCfgOppOd_20 = +{ + 294, + 4, + 0, + dpllMpuPostDivCfgOppOd_20, + (sizeof (dpllMpuPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif +#endif + +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllMpuCfgOppHigh_20 = +{ + 375, + 4, + 0, + dpllMpuPostDivCfgOppHigh_20, + (sizeof (dpllMpuPostDivCfgOppHigh_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif +#if defined (SOC_TDA2EX) || defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllGpuCfgOppHigh_20 = +{ + 266, + 4, + 0, + dpllGpuPostDivCfgOppOd_20, + (sizeof (dpllGpuPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t dpllGpuCfgOppPlus_20 = +{ + 266, + 3, + 0, + dpllGpuPostDivCfgOppOd_20, + (sizeof (dpllGpuPostDivCfgOppOd_20) / sizeof (pmhalPrcmPllPostDivValue_t)), + 0 +}; +#endif + + +static pmhalPrcmDpllConfig_t *pDpllAbeCfg_20[] = +{ + &dpllAbeCfgAllOpp_20, + &dpllAbeCfgAllOpp_20, + &dpllAbeCfgAllOpp_20, + &dpllAbeCfgAllOpp_20, + &dpllAbeCfgAllOpp_20 +}; + +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllCoreCfg_20[] = +{ + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppHigh_20, + &dpllCoreCfgOppHigh_20 +}; +#else +static pmhalPrcmDpllConfig_t *pDpllCoreCfg_20[] = +{ + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20, + &dpllCoreCfgOppNom_20 +}; +#endif + +static pmhalPrcmDpllConfig_t *pDpllDdrCfg_20[] = +{ + &dpllDdrCfgOppNom_20, + &dpllDdrCfgOppNom_20, + &dpllDdrCfgOppNom_20, + &dpllDdrCfgOppNom_20, + &dpllDdrCfgOppNom_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllGmacCfg_20[] = +{ + &dpllGmacCfgOppNom_20, + &dpllGmacCfgOppNom_20, + &dpllGmacCfgOppNom_20, + &dpllGmacCfgOppNom_20, + &dpllGmacCfgOppNom_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllIvaCfg_20[] = +{ + &dpllIvaCfgOppNom_20, + &dpllIvaCfgOppNom_20, + &dpllIvaCfgOppOd_20, + &dpllIvaCfgOppHigh_20, + &dpllIvaCfgOppHigh_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllPcieRefCfg_20[] = +{ + &dpllPcieRefCfgOppNom_20, + &dpllPcieRefCfgOppNom_20, + &dpllPcieRefCfgOppNom_20, + &dpllPcieRefCfgOppNom_20, + &dpllPcieRefCfgOppNom_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllPerCfg_20[] = +{ + &dpllPerCfgOppNom_20, + &dpllPerCfgOppNom_20, + &dpllPerCfgOppNom_20, + &dpllPerCfgOppNom_20, + &dpllPerCfgOppNom_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllUsbCfg_20[] = +{ + &dpllUsbCfgAllOpp_20, + &dpllUsbCfgAllOpp_20, + &dpllUsbCfgAllOpp_20, + &dpllUsbCfgAllOpp_20, + &dpllUsbCfgAllOpp_20 +}; + +#if defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllEveCfgHppPackage_20[] = +{ + &dpllEveCfgOppNom_20, + &dpllEveCfgOppNom_20, + &dpllEveCfgOppHigh_20, + &dpllEveCfgOppHigh_20, + &dpllEveCfgOppPlus_20 +}; +#endif + +static pmhalPrcmDpllConfig_t *pDpllEveCfg_20[] = +{ + &dpllEveCfgOppNom_20, + &dpllEveCfgOppNom_20, + &dpllEveCfgOppHigh_20, + &dpllEveCfgOppHigh_20, + &dpllEveCfgOppHigh_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllVideo1Cfg_20[] = +{ + &dpllVideo1CfgOppNom_20, + &dpllVideo1CfgOppNom_20, + &dpllVideo1CfgOppNom_20, + &dpllVideo1CfgOppNom_20, + &dpllVideo1CfgOppNom_20 +}; + +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllVideo2Cfg_20[] = +{ + &dpllVideo2CfgOppNom_20, + &dpllVideo2CfgOppNom_20, + &dpllVideo2CfgOppNom_20, + &dpllVideo2CfgOppNom_20, + &dpllVideo2CfgOppNom_20 +}; +#endif + +static pmhalPrcmDpllConfig_t *pDpllHdmiCfg_20[] = +{ + &dpllHdmiCfgOppNom_20, + &dpllHdmiCfgOppNom_20, + &dpllHdmiCfgOppNom_20, + &dpllHdmiCfgOppNom_20, + &dpllHdmiCfgOppNom_20 +}; +/* Configuration for DPLL DSP */ +#if defined (SOC_TDA2XX) +static pmhalPrcmDpllConfig_t *pDpllDspCfg_20[] = +{ + &dpllDspCfgOppNom_20, + &dpllDspCfgOppNom_20, + &dpllDspCfgOppOd_20, + &dpllDspCfgOppHigh_20, + &dpllDspCfgOppHigh_20 +}; + +#elif defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllDspCfg_20[] = +{ + &dpllDspCfgOppNom_20, + &dpllDspCfgOppNom_20, + &dpllDspCfgOppOd_20, + &dpllDspCfgOppHigh_20, + &dpllDspCfgOppHigh_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllDspCfgHppPackage_20[] = +{ + &dpllDspCfgOppNom_20, + &dpllDspCfgOppNom_20, + &dpllDspCfgOppOd_20, + &dpllDspCfgOppHighHppPackage_20, + &dpllDspCfgOppPlus_20 +}; + +#else +static pmhalPrcmDpllConfig_t *pDpllDspCfg_20[] = +{ + &dpllDspCfgOppNom_20, + &dpllDspCfgOppNom_20, + &dpllDspCfgOppOd_20, + &dpllDspCfgOppOd_20, + &dpllDspCfgOppOd_20 +}; +#endif + +/* Configuration for DPLL GPU */ +#if defined (SOC_TDA2XX) +static pmhalPrcmDpllConfig_t *pDpllGpuCfg_20[] = +{ + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppOd_20, + &dpllGpuCfgOppOd_20, + &dpllGpuCfgOppOd_20 +}; +#elif defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllGpuCfg_20[] = +{ + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppOd_20, + &dpllGpuCfgOppHigh_20, + &dpllGpuCfgOppHigh_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllGpuCfgHppPackage_20[] = +{ + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppOd_20, + &dpllGpuCfgOppHigh_20, + &dpllGpuCfgOppPlus_20 +}; +#else +static pmhalPrcmDpllConfig_t *pDpllGpuCfg_20[] = +{ + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppNom_20, + &dpllGpuCfgOppOd_20, + &dpllGpuCfgOppHigh_20, + &dpllGpuCfgOppHigh_20 +}; +#endif + +/* Configuration for DPLL MPU */ +#if defined (SOC_TDA2XX) +static pmhalPrcmDpllConfig_t *pDpllMpuCfg_23x23Package_20[] = +{ + &dpllMpuCfgOppLow_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20 +}; +static pmhalPrcmDpllConfig_t *pDpllMpuCfg_17x17Package_20[] = +{ + &dpllMpuCfgOppLow_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20 +}; +#elif defined (SOC_TDA2PX) +static pmhalPrcmDpllConfig_t *pDpllMpuCfg_23x23Package_20[] = +{ + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20 +}; + +static pmhalPrcmDpllConfig_t *pDpllMpuCfgHppPackage_20[] = +{ + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppHigh_20, + &dpllMpuCfgOppHigh_20 +}; + +#else +static pmhalPrcmDpllConfig_t *pDpllMpuCfg_23x23Package_20[] = +{ + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, +#if defined (SOC_DRA72x) + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20, + &dpllMpuCfgOppOd_20 +#else + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20, + &dpllMpuCfgOppNom_20 +#endif +}; +#endif + +/* ========================================================================== */ +/* Function Declarations */ +/* ========================================================================== */ + +int32_t SBLLibGetDpllStructure(uint32_t dpllId, + uint32_t sysClk, + uint32_t opp, + pmhalPrcmDpllConfig_t **dpllCfg) +{ +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) + uint32_t siliconPackageType; +#endif + int32_t retVal = STW_SOK; + + if (PMHAL_PRCM_SYSCLK_20_MHZ == sysClk) + { + switch (dpllId) + { + case PMHAL_PRCM_DPLL_ABE: + *dpllCfg = pDpllAbeCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_CORE: + *dpllCfg = pDpllCoreCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_DDR: + *dpllCfg = pDpllDdrCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_GMAC: + *dpllCfg = pDpllGmacCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_GPU: +#if defined (SOC_TDA2PX) + siliconPackageType = SBLLibGetSiliconPackageType(); + if (SBLLIB_SILICON_PACKAGE_TYPE_23X23_HPP == siliconPackageType) + { + *dpllCfg = pDpllGpuCfgHppPackage_20[opp]; + } + else + { + *dpllCfg = pDpllGpuCfg_20[opp]; + } +#else + *dpllCfg = pDpllGpuCfg_20[opp]; +#endif + break; + case PMHAL_PRCM_DPLL_IVA: + *dpllCfg = pDpllIvaCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_PCIE_REF: + *dpllCfg = pDpllPcieRefCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_PER: + *dpllCfg = pDpllPerCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_USB: + *dpllCfg = pDpllUsbCfg_20[opp]; + break; + case PMHAL_PRCM_DPLL_DSP: +#if defined (SOC_TDA2PX) + siliconPackageType = SBLLibGetSiliconPackageType(); + if (SBLLIB_SILICON_PACKAGE_TYPE_23X23_HPP == siliconPackageType) + { + *dpllCfg = pDpllDspCfgHppPackage_20[opp]; + } + else + { + *dpllCfg = pDpllDspCfg_20[opp]; + } +#else + *dpllCfg = pDpllDspCfg_20[opp]; +#endif + break; + case PMHAL_PRCM_DPLL_EVE: +#if defined (SOC_TDA2PX) + siliconPackageType = SBLLibGetSiliconPackageType(); + if (SBLLIB_SILICON_PACKAGE_TYPE_23X23_HPP == siliconPackageType) + { + *dpllCfg = pDpllEveCfgHppPackage_20[opp]; + } + else + { + *dpllCfg = pDpllEveCfg_20[opp]; + } +#else + *dpllCfg = pDpllEveCfg_20[opp]; +#endif + break; + case PMHAL_PRCM_DPLL_MPU: +#if defined (SOC_TDA2XX) + siliconPackageType = SBLLibGetSiliconPackageType(); + if (SBLLIB_SILICON_PACKAGE_TYPE_17X17 == siliconPackageType) + { + *dpllCfg = pDpllMpuCfg_17x17Package_20[opp]; + } + else + { + *dpllCfg = pDpllMpuCfg_23x23Package_20[opp]; + } +#elif defined (SOC_TDA2PX) + siliconPackageType = SBLLibGetSiliconPackageType(); + if (SBLLIB_SILICON_PACKAGE_TYPE_23X23_HPP == siliconPackageType) + { + *dpllCfg = pDpllMpuCfgHppPackage_20[opp]; + } + else + { + *dpllCfg = pDpllMpuCfg_23x23Package_20[opp]; + } +#else + *dpllCfg = pDpllMpuCfg_23x23Package_20[opp]; +#endif + break; + case PMHAL_PRCM_VIDEOPLL_VIDEO1: + *dpllCfg = pDpllVideo1Cfg_20[opp]; + break; +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) + case PMHAL_PRCM_VIDEOPLL_VIDEO2: + *dpllCfg = pDpllVideo2Cfg_20[opp]; + break; +#endif + case PMHAL_PRCM_VIDEOPLL_HDMI: + *dpllCfg = pDpllHdmiCfg_20[opp]; + break; + default: + retVal = STW_EFAIL; + break; + } + } + else + { + retVal = STW_EFAIL; + } + + return retVal; +} + +#ifdef __cplusplus +} +#endif + + Can you check my values and say if they are correct? I will try to understand if it affects ISP clock. Thanks. + +Looks fine, can you with this change? Please note this will work only if you are using SBL. Rgds, Brijesh + +I think you are using DPLL_CORE clock, so, can you try reducing H21 divisor value in below? static pmhalPrcmPllPostDivValue_t dpllCorePostDivCfgOppHigh_20[] = { {PMHAL_PRCM_DPLL_POST_DIV_M2, 2 }, /* Div_m2_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H12, 4 }, /* Div_h12_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H13, 62}, /* Div_h13_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H14, 5 }, /* Div_h14_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H21, 4 }, /* Div_h21_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H22, 5 }, /* Div_h22_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H23, 4 }, /* Div_h23_clkcfg */ {PMHAL_PRCM_DPLL_POST_DIV_H24, 1 } /* Div_h24_clkcfg */ }; Regards, Brijesh + +Hello. Yes we are using SBL. Divisor values {PMHAL_PRCM_DPLL_POST_DIV_H21, 2} or {PMHAL_PRCM_DPLL_POST_DIV_H21, 1} give no visible difference in links latency. Are there any other values or combinations of values that i should try? Thanks. + +Hello, Can you please check the clock source for the ISP? Depending on it, we would have to change the divisor value. Regards, Brijesh + diff --git a/data2/text/range/30001+/1030393.txt b/data2/text/range/30001+/1030393.txt new file mode 100644 index 0000000000000000000000000000000000000000..f550ef8d547dfc2d4fb8fb0940c8f7e2e7275e04 --- /dev/null +++ b/data2/text/range/30001+/1030393.txt @@ -0,0 +1,290 @@ +Ticket Name: TDA2PXEVM: Is Conv with no relue supported In TDA2? + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi I get some accuracy problems with caffemodel importing. Here is my steps: a) Use tidl_model_import.out.exe convert regnet.prototxt/caffemodel to tidl_param/bin b) Compare each layer's output : onnx vs trace_dump_idx_wxh.y c) I find the first conv layer(with bn & relu) matched well(error < 1%) d) But conv_layer with no relu(which are inputs of eltwise_layer) cannot match original model layer's outputs I put a snapshot below : conv layers in green rect match, but conv layer without relu in red circle not match. regnet_import.zip So, is relu strictedly demanded to place after conv layer? Or this is just bugs in import tool? I upload my model and tools for analysis. + +Responses: +Hi, Can you share the import output log to check the issue ? Thanks, Praveen + +Hi Praveen Thanks for your replay! I uploaded LOG.txt. Geroge. 6675.LOG.txt .\tidl_model_import.out.exe .\ONNX_Reg200M_CIFAR\tidl_import.txt +Caffe Network File : ONNX_Reg200M_CIFAR\trained\regnetx200mf_cifar_Relu96.prototxt +Caffe Model File : ONNX_Reg200M_CIFAR\trained\regnetx200mf_cifar_Relu96.caffemodel +TIDL Network File : ONNX_Reg200M_CIFAR\model\tidl_net_reg200cifar_relu96.bin +TIDL Model File : ONNX_Reg200M_CIFAR\model\tidl_param_reg200cifar_relu96.bin +Name of the Network : REG200MCIFAR-ONNX +Num Inputs : 1 + Num of Layer Detected : 71 + 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 32 , 32 , 0 , + 1, TIDL_ConvolutionLayer , Conv_0 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 32 , 32 , 1 , 32 , 32 , 32 , 884736 , + 2, TIDL_ConvolutionLayer , Conv_2 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 32 , 32 , 32 , 1 , 24 , 32 , 32 , 786432 , + 3, TIDL_ConvolutionLayer , Conv_4 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 24 , 32 , 32 , 1 , 24 , 16 , 16 , 442368 , + 4, TIDL_ConvolutionLayer , Conv_6 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , 147456 , + 5, TIDL_ConvolutionLayer , Conv_7 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 5 , 1 , 32 , 32 , 32 , 1 , 24 , 16 , 16 , 196608 , + 6, TIDL_EltWiseLayer , Add_8 1, 2 , 1 , 4 , 5 , x , x , x , x , x , x , 6 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , 6144 , + 7, TIDL_BatchNormLayer , Relu_9 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , 6144 , + 8, TIDL_ConvolutionLayer , Conv_10 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 24 , 16 , 16 , 1 , 56 , 16 , 16 , 344064 , + 9, TIDL_ConvolutionLayer , Conv_12 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , 1032192 , + 10, TIDL_ConvolutionLayer , Conv_14 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , 802816 , + 11, TIDL_ConvolutionLayer , Conv_15 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 11 , 1 , 24 , 16 , 16 , 1 , 56 , 16 , 16 , 344064 , + 12, TIDL_EltWiseLayer , Add_16 1, 2 , 1 , 10 , 11 , x , x , x , x , x , x , 12 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , 14336 , + 13, TIDL_BatchNormLayer , Relu_17 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , 14336 , + 14, TIDL_ConvolutionLayer , Conv_18 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 56 , 16 , 16 , 1 , 152 , 16 , 16 , 2179072 , + 15, TIDL_ConvolutionLayer , Conv_20 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 152 , 16 , 16 , 1 , 152 , 8 , 8 , 700416 , + 16, TIDL_ConvolutionLayer , Conv_22 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 17, TIDL_ConvolutionLayer , Conv_23 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 17 , 1 , 56 , 16 , 16 , 1 , 152 , 8 , 8 , 544768 , + 18, TIDL_EltWiseLayer , Add_24 1, 2 , 1 , 16 , 17 , x , x , x , x , x , x , 18 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 19, TIDL_BatchNormLayer , Relu_25 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 20, TIDL_ConvolutionLayer , Conv_26 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 21, TIDL_ConvolutionLayer , Conv_28 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 700416 , + 22, TIDL_ConvolutionLayer , Conv_30 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 23, TIDL_EltWiseLayer , Add_31 1, 2 , 1 , 22 , 19 , x , x , x , x , x , x , 23 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 24, TIDL_BatchNormLayer , Relu_32 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 25, TIDL_ConvolutionLayer , Conv_33 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 26, TIDL_ConvolutionLayer , Conv_35 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 700416 , + 27, TIDL_ConvolutionLayer , Conv_37 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 28, TIDL_EltWiseLayer , Add_38 1, 2 , 1 , 27 , 24 , x , x , x , x , x , x , 28 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 29, TIDL_BatchNormLayer , Relu_39 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 30, TIDL_ConvolutionLayer , Conv_40 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 31, TIDL_ConvolutionLayer , Conv_42 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 700416 , + 32, TIDL_ConvolutionLayer , Conv_44 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 1478656 , + 33, TIDL_EltWiseLayer , Add_45 1, 2 , 1 , 32 , 29 , x , x , x , x , x , x , 33 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 34, TIDL_BatchNormLayer , Relu_46 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , 9728 , + 35, TIDL_ConvolutionLayer , Conv_47 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 152 , 8 , 8 , 1 , 368 , 8 , 8 , 3579904 , + 36, TIDL_ConvolutionLayer , Conv_49 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 368 , 8 , 8 , 1 , 368 , 4 , 4 , 423936 , + 37, TIDL_ConvolutionLayer , Conv_51 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 38, TIDL_ConvolutionLayer , Conv_52 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 38 , 1 , 152 , 8 , 8 , 1 , 368 , 4 , 4 , 894976 , + 39, TIDL_EltWiseLayer , Add_53 1, 2 , 1 , 37 , 38 , x , x , x , x , x , x , 39 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 40, TIDL_BatchNormLayer , Relu_54 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 41, TIDL_ConvolutionLayer , Conv_55 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 42, TIDL_ConvolutionLayer , Conv_57 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 43, TIDL_ConvolutionLayer , Conv_59 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 44, TIDL_EltWiseLayer , Add_60 1, 2 , 1 , 43 , 40 , x , x , x , x , x , x , 44 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 45, TIDL_BatchNormLayer , Relu_61 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 46, TIDL_ConvolutionLayer , Conv_62 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 47, TIDL_ConvolutionLayer , Conv_64 1, 1 , 1 , 46 , x , x , x , x , x , x , x , 47 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 48, TIDL_ConvolutionLayer , Conv_66 1, 1 , 1 , 47 , x , x , x , x , x , x , x , 48 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 49, TIDL_EltWiseLayer , Add_67 1, 2 , 1 , 48 , 45 , x , x , x , x , x , x , 49 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 50, TIDL_BatchNormLayer , Relu_68 1, 1 , 1 , 49 , x , x , x , x , x , x , x , 50 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 51, TIDL_ConvolutionLayer , Conv_69 1, 1 , 1 , 50 , x , x , x , x , x , x , x , 51 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 52, TIDL_ConvolutionLayer , Conv_71 1, 1 , 1 , 51 , x , x , x , x , x , x , x , 52 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 53, TIDL_ConvolutionLayer , Conv_73 1, 1 , 1 , 52 , x , x , x , x , x , x , x , 53 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 54, TIDL_EltWiseLayer , Add_74 1, 2 , 1 , 53 , 50 , x , x , x , x , x , x , 54 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 55, TIDL_BatchNormLayer , Relu_75 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 55 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 56, TIDL_ConvolutionLayer , Conv_76 1, 1 , 1 , 55 , x , x , x , x , x , x , x , 56 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 57, TIDL_ConvolutionLayer , Conv_78 1, 1 , 1 , 56 , x , x , x , x , x , x , x , 57 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 58, TIDL_ConvolutionLayer , Conv_80 1, 1 , 1 , 57 , x , x , x , x , x , x , x , 58 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 59, TIDL_EltWiseLayer , Add_81 1, 2 , 1 , 58 , 55 , x , x , x , x , x , x , 59 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 60, TIDL_BatchNormLayer , Relu_82 1, 1 , 1 , 59 , x , x , x , x , x , x , x , 60 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 61, TIDL_ConvolutionLayer , Conv_83 1, 1 , 1 , 60 , x , x , x , x , x , x , x , 61 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 62, TIDL_ConvolutionLayer , Conv_85 1, 1 , 1 , 61 , x , x , x , x , x , x , x , 62 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 63, TIDL_ConvolutionLayer , Conv_87 1, 1 , 1 , 62 , x , x , x , x , x , x , x , 63 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 64, TIDL_EltWiseLayer , Add_88 1, 2 , 1 , 63 , 60 , x , x , x , x , x , x , 64 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 65, TIDL_BatchNormLayer , Relu_89 1, 1 , 1 , 64 , x , x , x , x , x , x , x , 65 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 66, TIDL_ConvolutionLayer , Conv_90 1, 1 , 1 , 65 , x , x , x , x , x , x , x , 66 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 67, TIDL_ConvolutionLayer , Conv_92 1, 1 , 1 , 66 , x , x , x , x , x , x , x , 67 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 423936 , + 68, TIDL_ConvolutionLayer , Conv_94 1, 1 , 1 , 67 , x , x , x , x , x , x , x , 68 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 2166784 , + 69, TIDL_EltWiseLayer , Add_95 1, 2 , 1 , 68 , 65 , x , x , x , x , x , x , 69 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , + 70, TIDL_BatchNormLayer , Relu_96 1, 1 , 1 , 69 , x , x , x , x , x , x , x , 70 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , 5888 , +Total Giga Macs : 0.0567 +已复制 1 个文件。 + +Processing config file .\tempDir\qunat_stats_config.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 32 , 32 , + 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 32 , 32 , 1 , 32 , 32 , 32 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 32 , 32 , 32 , 1 , 24 , 32 , 32 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 24 , 32 , 32 , 1 , 24 , 16 , 16 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 5 , 1 , 32 , 32 , 32 , 1 , 24 , 16 , 16 , + 6, TIDL_EltWiseLayer , 1, 2 , 1 , 4 , 5 , x , x , x , x , x , x , 6 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , + 7, TIDL_BatchNormLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 24 , 16 , 16 , 1 , 24 , 16 , 16 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 24 , 16 , 16 , 1 , 56 , 16 , 16 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 11 , 1 , 24 , 16 , 16 , 1 , 56 , 16 , 16 , + 12, TIDL_EltWiseLayer , 1, 2 , 1 , 10 , 11 , x , x , x , x , x , x , 12 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , + 13, TIDL_BatchNormLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 56 , 16 , 16 , 1 , 56 , 16 , 16 , + 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 56 , 16 , 16 , 1 , 152 , 16 , 16 , + 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 152 , 16 , 16 , 1 , 152 , 8 , 8 , + 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 17 , 1 , 56 , 16 , 16 , 1 , 152 , 8 , 8 , + 18, TIDL_EltWiseLayer , 1, 2 , 1 , 16 , 17 , x , x , x , x , x , x , 18 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 19, TIDL_BatchNormLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 23, TIDL_EltWiseLayer , 1, 2 , 1 , 22 , 19 , x , x , x , x , x , x , 23 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 24, TIDL_BatchNormLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 28, TIDL_EltWiseLayer , 1, 2 , 1 , 27 , 24 , x , x , x , x , x , x , 28 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 29, TIDL_BatchNormLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 30, TIDL_ConvolutionLayer , 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 31, TIDL_ConvolutionLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 32, TIDL_ConvolutionLayer , 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 33, TIDL_EltWiseLayer , 1, 2 , 1 , 32 , 29 , x , x , x , x , x , x , 33 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 34, TIDL_BatchNormLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 152 , 8 , 8 , 1 , 152 , 8 , 8 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 152 , 8 , 8 , 1 , 368 , 8 , 8 , + 36, TIDL_ConvolutionLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 368 , 8 , 8 , 1 , 368 , 4 , 4 , + 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 38, TIDL_ConvolutionLayer , 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 38 , 1 , 152 , 8 , 8 , 1 , 368 , 4 , 4 , + 39, TIDL_EltWiseLayer , 1, 2 , 1 , 37 , 38 , x , x , x , x , x , x , 39 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 40, TIDL_BatchNormLayer , 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 41, TIDL_ConvolutionLayer , 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 42, TIDL_ConvolutionLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 43, TIDL_ConvolutionLayer , 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 44, TIDL_EltWiseLayer , 1, 2 , 1 , 43 , 40 , x , x , x , x , x , x , 44 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 45, TIDL_BatchNormLayer , 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 46, TIDL_ConvolutionLayer , 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 47, TIDL_ConvolutionLayer , 1, 1 , 1 , 46 , x , x , x , x , x , x , x , 47 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 48, TIDL_ConvolutionLayer , 1, 1 , 1 , 47 , x , x , x , x , x , x , x , 48 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 49, TIDL_EltWiseLayer , 1, 2 , 1 , 48 , 45 , x , x , x , x , x , x , 49 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 50, TIDL_BatchNormLayer , 1, 1 , 1 , 49 , x , x , x , x , x , x , x , 50 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 51, TIDL_ConvolutionLayer , 1, 1 , 1 , 50 , x , x , x , x , x , x , x , 51 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 52, TIDL_ConvolutionLayer , 1, 1 , 1 , 51 , x , x , x , x , x , x , x , 52 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 53, TIDL_ConvolutionLayer , 1, 1 , 1 , 52 , x , x , x , x , x , x , x , 53 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 54, TIDL_EltWiseLayer , 1, 2 , 1 , 53 , 50 , x , x , x , x , x , x , 54 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 55, TIDL_BatchNormLayer , 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 55 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 56, TIDL_ConvolutionLayer , 1, 1 , 1 , 55 , x , x , x , x , x , x , x , 56 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 57, TIDL_ConvolutionLayer , 1, 1 , 1 , 56 , x , x , x , x , x , x , x , 57 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 58, TIDL_ConvolutionLayer , 1, 1 , 1 , 57 , x , x , x , x , x , x , x , 58 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 59, TIDL_EltWiseLayer , 1, 2 , 1 , 58 , 55 , x , x , x , x , x , x , 59 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 60, TIDL_BatchNormLayer , 1, 1 , 1 , 59 , x , x , x , x , x , x , x , 60 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 61, TIDL_ConvolutionLayer , 1, 1 , 1 , 60 , x , x , x , x , x , x , x , 61 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 62, TIDL_ConvolutionLayer , 1, 1 , 1 , 61 , x , x , x , x , x , x , x , 62 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 63, TIDL_ConvolutionLayer , 1, 1 , 1 , 62 , x , x , x , x , x , x , x , 63 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 64, TIDL_EltWiseLayer , 1, 2 , 1 , 63 , 60 , x , x , x , x , x , x , 64 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 65, TIDL_BatchNormLayer , 1, 1 , 1 , 64 , x , x , x , x , x , x , x , 65 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 66, TIDL_ConvolutionLayer , 1, 1 , 1 , 65 , x , x , x , x , x , x , x , 66 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 67, TIDL_ConvolutionLayer , 1, 1 , 1 , 66 , x , x , x , x , x , x , x , 67 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 68, TIDL_ConvolutionLayer , 1, 1 , 1 , 67 , x , x , x , x , x , x , x , 68 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 69, TIDL_EltWiseLayer , 1, 2 , 1 , 68 , 65 , x , x , x , x , x , x , 69 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 70, TIDL_BatchNormLayer , 1, 1 , 1 , 69 , x , x , x , x , x , x , x , 70 , 1 , 368 , 4 , 4 , 1 , 368 , 4 , 4 , + 71, TIDL_DataLayer , 0, 1 , -1 , 70 , x , x , x , x , x , x , x , 0 , 1 , 368 , 4 , 4 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 1 40 34 40 32 32 32 3 32 3 1 8 1 3 1 1 1360 1024 1 + 2 32 32 32 32 32 32 32 24 32 7 8 1 5 1 1 1024 1024 1 + 3 40 36 40 16 16 16 8 8 8 4 8 1 2 1 1 1440 256 1 + 4 16 16 16 16 16 16 24 24 24 8 8 1 3 1 1 256 256 1 + 5 32 32 32 16 16 16 32 24 32 7 8 1 5 1 1 1024 256 1 + 8 16 16 16 16 16 16 24 56 24 8 8 1 3 1 1 256 256 1 + 9 24 18 24 16 16 16 8 8 8 4 8 1 2 1 1 432 256 1 + 10 16 16 16 16 16 16 56 56 56 8 8 1 7 1 1 256 256 1 + 11 16 16 16 16 16 16 24 56 24 8 8 1 3 1 1 256 256 1 + 14 16 16 16 16 16 16 56 152 56 8 8 1 7 1 1 256 256 1 + 15 40 20 40 16 8 16 8 8 8 4 8 1 2 1 1 800 128 1 + 16 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 17 32 16 32 16 8 16 56 152 56 8 8 1 7 1 1 512 128 1 + 20 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 21 24 10 24 16 8 16 8 8 8 4 8 1 2 1 1 240 128 1 + 22 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 25 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 26 24 10 24 16 8 16 8 8 8 4 8 1 2 1 1 240 128 1 + 27 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 30 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 31 24 10 24 16 8 16 8 8 8 4 8 1 2 1 1 240 128 1 + 32 16 8 16 16 8 16 152 152 152 8 8 1 19 1 1 128 128 1 + 35 16 8 16 16 8 16 152 368 152 8 8 1 19 1 1 128 128 1 + 36 40 12 40 16 4 16 8 8 8 4 8 1 2 1 1 480 64 1 + 37 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 38 32 8 32 16 4 16 152 368 152 8 8 1 19 1 1 256 64 1 + 41 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 42 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 43 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 46 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 47 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 48 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 51 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 52 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 53 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 56 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 57 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 58 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 61 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 62 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 63 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 66 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + 67 24 6 24 16 4 16 8 8 8 4 8 1 2 1 1 144 64 1 + 68 16 4 16 16 4 16 368 368 368 8 8 1 46 1 1 64 64 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 239 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.88, 1.17, Sparsity : -32.41 + Layer 2 : Out Q : 324 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.79, 0.88, Sparsity : -12.50 + Layer 3 : Out Q : 212 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.44, 0.44, Sparsity : 0.00 + Layer 4 : Out Q : 95 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.15, 0.15, Sparsity : 0.00 + Layer 5 : Out Q : 142 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.20, 0.22, Sparsity : -12.50 + Layer 6 : Out Q : 87 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 7 : Out Q : 175 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 8 : Out Q : 452 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.34, 0.34, Sparsity : 0.00 + Layer 9 : Out Q : 544 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.03, 1.03, Sparsity : 0.00 + Layer 10 : Out Q : 239 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.80, 0.80, Sparsity : 0.00 + Layer 11 : Out Q : 148 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.34, 0.34, Sparsity : 0.00 + Layer 12 : Out Q : 139 , TIDL_EltWiseLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 13 : Out Q : 279 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 14 : Out Q : 512 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.18, 2.18, Sparsity : 0.00 + Layer 15 : Out Q : 570 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.70, 0.70, Sparsity : 0.00 + Layer 16 : Out Q : 236 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 17 : Out Q : 235 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.54, 0.54, Sparsity : 0.00 + Layer 18 : Out Q : 124 , TIDL_EltWiseLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 19 : Out Q : 249 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 20 : Out Q : 621 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 21 : Out Q : 670 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.70, 0.70, Sparsity : 0.00 + Layer 22 : Out Q : 267 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 23 : Out Q : 131 , TIDL_EltWiseLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 24 : Out Q : 263 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 25 : Out Q : 680 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 26 : Out Q : 271 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.70, 0.70, Sparsity : 0.00 + Layer 27 : Out Q : 224 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 28 : Out Q : 158 , TIDL_EltWiseLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 29 : Out Q : 317 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 30 : Out Q : 884 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 31 : Out Q : 665 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.70, 0.70, Sparsity : 0.00 + Layer 32 : Out Q : 556 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.48, 1.48, Sparsity : 0.00 + Layer 33 : Out Q : 150 , TIDL_EltWiseLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 34 : Out Q : 301 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 35 : Out Q : 870 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.58, 3.58, Sparsity : 0.00 + Layer 36 : Out Q : 409 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 37 : Out Q : 230 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 38 : Out Q : 199 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.89, 0.89, Sparsity : 0.00 + Layer 39 : Out Q : 175 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 40 : Out Q : 351 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 41 : Out Q : 1196 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 42 : Out Q : 483 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 43 : Out Q : 220 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 44 : Out Q : 158 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 45 : Out Q : 320 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 46 : Out Q : 1105 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 47 : Out Q : 459 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 48 : Out Q : 137 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 49 : Out Q : 136 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 50 : Out Q : 287 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 51 : Out Q : 1024 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 52 : Out Q : 631 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 53 : Out Q : 178 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 54 : Out Q : 109 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 55 : Out Q : 219 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 56 : Out Q : 1488 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 57 : Out Q : 450 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 58 : Out Q : 143 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 59 : Out Q : 106 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 60 : Out Q : 213 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 61 : Out Q : 1198 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 62 : Out Q : 556 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 63 : Out Q : 150 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 64 : Out Q : 102 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 65 : Out Q : 205 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 66 : Out Q : 1259 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 67 : Out Q : 749 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.42, 0.42, Sparsity : 0.00 + Layer 68 : Out Q : 181 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.17, 2.17, Sparsity : 0.00 + Layer 69 : Out Q : 103 , TIDL_EltWiseLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 70 : Out Q : 207 , TIDL_BatchNormLayer , PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + +Hi Praveen Is there any updates? lluo + +Hi IIuo, I have looked at the log you shared, it looks okay to me, this configurations is supported on TDA2. Please follow steps mentioned in section 3.8 (Matching TIDL inference result) in the TIDL user guide. BTW, what is the TIDL release version that you are using? Thanks, Praveen + +Hi Praveen I have been using REL.TIDL.01.01.03.00 . And the model & tools has been uploaded in regnet_import.zip. I will follow user guide to check my model on REL.TIDL.01.02.00.00 later. + +Hi, Please check with REL.TIDL.01.02.00.00 and let us know. Thanks, Praveen + diff --git a/data2/text/range/30001+/1052199.txt b/data2/text/range/30001+/1052199.txt new file mode 100644 index 0000000000000000000000000000000000000000..36ccb861caeec29a73cf1d212e1808bd78733208 --- /dev/null +++ b/data2/text/range/30001+/1052199.txt @@ -0,0 +1,661 @@ +Ticket Name: TDA4VM: Porting sensor driver from TDA2 to TDA4 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2, DS90UB913A-Q1, DS90UB933-Q1 Hello, We have a working sensor driver implemented for the TAD2 platform but we are currently trying port the senor driver from TDA2 platform to the TDA4 but without success, the registers of both, the sensor and the seriaizer, are written without any apparent error but the image received from the sensor is just noise. We have followed the steps in the guide 8.12. Adding new image sensor to PSDK RTOS — Processor SDK RTOS J721E (ti.com) . The values of the configuration registers for the serializer and sensor are the same that the proper ones used in the TDA2 platform, are there any extra steps to make the porting correctly? Our sensor is MIPI 2 lanes and there is no other sensor in the TDA4 SDK with this configuration to compare with, we have ported the code as follows: ------TDA2---CODE---------- ChainsCommon_SensorIntfInfo gSensorInterfaceInfo[] = {SENSOR_NAME, { 4u, /* TDA3X EVM board uses I2C instance 1 */ {PORT_0_SENSOR_ADDR, PORT_1_SENSOR_ADDR, PORT_2_SENSOR_ADDR, PORT_3_SENSOR_ADDR}, /* Sensor alias address */ {PORT_0_SER_ADDR, PORT_1_SER_ADDR, PORT_2_SER_ADDR, PORT_3_SER_ADDR}, /* Serializer alias address */ TRUE, /* isMultiChannel */ SYSTEM_VIFW_2LANES, SYSTEM_VIFM_SCH_CSI2, SYSTEM_CSI2_RAW10 /* CSI2 DataFormat*/, 0 /*Virtual Channel Id*/, 0, /* Is CSI Enable Required in UB960 */ {TRUE /* isCplxCfgValid */, {{FALSE, 1}, /* Clock Lane */ {FALSE, 2}, /* data1Lane */ {FALSE, 3}, /* data2Lane */ {FALSE, 4}, /* data3Lane*/ {FALSE, 5}},/* data4Lane */ 800 /* csi2PhyClk */ }, FVID2_VID_SENSOR_TIDA00262_APT_AR0140_DRV, /* sensorDrvId */ FALSE, /* sensorBroadcast */ FALSE}}, }; ------TDA4---CODE------- static IssSensor_CreateParams CreatePrms = { SENSOR_UB953_OV, /*sensor name*/ 0x6 , /*i2cInstId*/ { SENSOR_0_I2C_ALIAS, SENSOR_1_I2C_ALIAS, SENSOR_2_I2C_ALIAS, SENSOR_3_I2C_ALIAS, SENSOR_4_I2C_ALIAS, SENSOR_5_I2C_ALIAS, SENSOR_6_I2C_ALIAS, SENSOR_7_I2C_ALIAS }, /*i2cAddrSensor*/ { SER_0_I2C_ALIAS, SER_1_I2C_ALIAS, SER_2_I2C_ALIAS, SER_3_I2C_ALIAS, SER_4_I2C_ALIAS, SER_5_I2C_ALIAS, SER_6_I2C_ALIAS, SER_7_I2C_ALIAS }, /*i2cAddrSer*/ /*IssSensor_Info*/ { { OV2312_OUT_WIDTH, /*width*/ OV2312_OUT_HEIGHT, /*height*/ 1 , /*num_exposures*/ vx_false_e, /*line_interleaved*/ { {TIVX_RAW_IMAGE_16_BIT, 11 }, /*dataFormat and MSB [0]*/ /* Sensor output: 10-bit RGB-lr RAW */ }, 0 , /*meta_height_before*/ 0 , /*meta_height_after*/ }, ISS_SENSOR_FEATURES, /*features*/ ALGORITHMS_ISS_AEWB_MODE_NONE, /*aewbMode*/ 30 , /*fps*/ 2 , /*numDataLanes*/ { 1 , 2 , 3 , 4 }, /*dataLanesMap*/ { 0 , 0 , 0 , 0 }, /*dataLanesPolarity*/ CSIRX_LANE_BAND_SPEED_720_TO_800_MBPS, /*csi_laneBandSpeed*/ }, 1 , /*numChan*/ 2333 , /*dccId*/ //TODO change to custom unique dccID }; Are there any common deserializer settings that may conflict with our 2-line configuration? Thank you in advance. Best regards, Mohamed + +Responses: +Hello Mohamed, numDataLanes refers to the CSI Tx configuration for the device connected to J7. In your case it is the deserializer (not sensor). Therefore sensor lane config does not matter. Please check deserializer lane config and set numDataLanes accordingly. Regards, Mayank + +I have checked the deserializer lane config and it looks good, can you see the log below. root@j7-evm:/opt/vision_apps# ./vx_app_single_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 95.901980 s: GTC Frequency = 200 MHz +APP: Init ... Done !!! + 95.906035 s: VX_ZONE_INIT:Enabled + 95.906074 s: VX_ZONE_ERROR:Enabled + 95.906079 s: VX_ZONE_WARNING:Enabled + 95.909846 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!! + 95.910020 s: VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!! + + Single Camera Demo - (c) Texas Instruments 2019 + ======================================================== + + Usage, + ./vx_app_single_cam.out --cfg + +Defaulting to interactive mode +IttCtrl_registerHandler: command echo registered at location 0 +IttCtrl_registerHandler: command iss_read_2a_params registered at location 1 +IttCtrl_registerHandler: command iss_write_2a_params registered at location 2 +IttCtrl_registerHandler: command iss_raw_save registered at location 3 +IttCtrl_registerHandler: command iss_yuv_save registered at location 4 +IttCtrl_registerHandler: command iss_read_sensor_reg registered at location 5 +IttCtrl_registerHandler: command iss_write_sensor_reg registered at location 6 +IttCtrl_registerHandler: command dev_ctrl registered at location 7 +IttCtrl_registerHandler: command iss_send_dcc_file registered at location 8 +Single Cam App Init...Detecting Sensors... + NETWORK: Opened at IP Addr = 0.0.0.0, socket port=5000!!! +tivxImagingLoadKernels done + 95.910944 s: ISS: Enumerating sensors ... !!! +[MCU2_0] 95.911031 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CREATE +[MCU2_0] 95.911161 s: UB960 config start +[MCU2_0] 95.911328 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x1 , regValue: 0x2, status: 0, counter: 0 +[MCU2_0] 95.943037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x1f , regValue: 0x0, status: 0, counter: 1 +[MCU2_0] 95.943213 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xd , regValue: 0x90, status: 0, counter: 2 +[MCU2_0] 95.944036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xc , regValue: 0xf, status: 0, counter: 3 +[MCU2_0] 95.945034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 4 +[MCU2_0] 95.961026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 5 +[MCU2_0] 95.962037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 6 +[MCU2_0] 95.963037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 7 +[MCU2_0] 95.979033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 8 +[MCU2_0] 95.980037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 9 +[MCU2_0] 95.996033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 10 +[MCU2_0] 95.997032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 11 +[MCU2_0] 96.013028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 12 +[MCU2_0] 96.014034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x20 , regValue: 0x0, status: 0, counter: 13 +[MCU2_0] 96.015034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x10 , regValue: 0x83, status: 0, counter: 14 +[MCU2_0] 96.016033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x11 , regValue: 0xa3, status: 0, counter: 15 +[MCU2_0] 96.017033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x12 , regValue: 0xc3, status: 0, counter: 16 +[MCU2_0] 96.018027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x13 , regValue: 0xe3, status: 0, counter: 17 +[MCU2_0] 96.019030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 18 +[MCU2_0] 96.035022 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 19 +[MCU2_0] 96.036030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 20 +[MCU2_0] 96.037027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 21 +[MCU2_0] 96.038035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 22 +[MCU2_0] 96.039030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 23 +[MCU2_0] 96.040027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 24 +[MCU2_0] 96.041030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 25 +[MCU2_0] 96.042033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 26 +[MCU2_0] 96.042201 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 27 +[MCU2_0] 96.042359 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 28 +[MCU2_0] 96.058033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 29 +[MCU2_0] 96.059033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 30 +[MCU2_0] 96.060031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 31 +[MCU2_0] 96.061034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 32 +[MCU2_0] 96.062030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 33 +[MCU2_0] 96.063034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 34 +[MCU2_0] 96.064026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 35 +[MCU2_0] 96.065030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 36 +[MCU2_0] 96.065198 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 37 +[MCU2_0] 96.065357 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 38 +[MCU2_0] 96.081033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 39 +[MCU2_0] 96.082033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 40 +[MCU2_0] 96.083029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 41 +[MCU2_0] 96.084031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 42 +[MCU2_0] 96.085031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 43 +[MCU2_0] 96.086027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 44 +[MCU2_0] 96.087034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 45 +[MCU2_0] 96.088032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 46 +[MCU2_0] 96.088203 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 47 +[MCU2_0] 96.088364 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 48 +[MCU2_0] 96.104026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 49 +[MCU2_0] 96.105030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 50 +[MCU2_0] 96.106029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 51 +[MCU2_0] 96.107028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 52 +[MCU2_0] 96.108032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 53 +[MCU2_0] 96.109035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 54 +[MCU2_0] 96.110032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 55 +[MCU2_0] 96.111032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 56 +[MCU2_0] 96.111204 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 57 +[MCU2_0] 96.111362 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 58 +[MCU2_0] 96.111405 s: End of UB960 config +[MCU2_0] 96.111423 s: UB960 config start +[MCU2_0] 96.111556 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x1 , regValue: 0x2, status: 0, counter: 0 +[MCU2_0] 96.143029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x1f , regValue: 0x0, status: 0, counter: 1 +[MCU2_0] 96.143201 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xd , regValue: 0x90, status: 0, counter: 2 +[MCU2_0] 96.144034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xc , regValue: 0xf, status: 0, counter: 3 +[MCU2_0] 96.145029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 4 +[MCU2_0] 96.161023 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 5 +[MCU2_0] 96.162030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 6 +[MCU2_0] 96.163029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 7 +[MCU2_0] 96.179039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 8 +[MCU2_0] 96.180031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 9 +[MCU2_0] 96.196029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 10 +[MCU2_0] 96.197039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 11 +[MCU2_0] 96.213027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 12 +[MCU2_0] 96.214028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x20 , regValue: 0x0, status: 0, counter: 13 +[MCU2_0] 96.215033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x10 , regValue: 0x83, status: 0, counter: 14 +[MCU2_0] 96.216031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x11 , regValue: 0xa3, status: 0, counter: 15 +[MCU2_0] 96.217030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x12 , regValue: 0xc3, status: 0, counter: 16 +[MCU2_0] 96.218033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x13 , regValue: 0xe3, status: 0, counter: 17 +[MCU2_0] 96.219032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 18 +[MCU2_0] 96.235027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 19 +[MCU2_0] 96.236031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 20 +[MCU2_0] 96.237037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 21 +[MCU2_0] 96.238035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 22 +[MCU2_0] 96.239033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 23 +[MCU2_0] 96.240037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 24 +[MCU2_0] 96.241035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 25 +[MCU2_0] 96.242037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 26 +[MCU2_0] 96.242203 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 27 +[MCU2_0] 96.242362 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 28 +[MCU2_0] 96.258032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 29 +[MCU2_0] 96.259036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 30 +[MCU2_0] 96.260032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 31 +[MCU2_0] 96.261035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 32 +[MCU2_0] 96.262031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 33 +[MCU2_0] 96.263036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 34 +[MCU2_0] 96.264029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 35 +[MCU2_0] 96.265032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 36 +[MCU2_0] 96.265202 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 37 +[MCU2_0] 96.265360 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 38 +[MCU2_0] 96.281035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 39 +[MCU2_0] 96.282034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 40 +[MCU2_0] 96.283036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 41 +[MCU2_0] 96.284035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 42 +[MCU2_0] 96.285034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 43 +[MCU2_0] 96.286030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 44 +[MCU2_0] 96.287028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 45 +[MCU2_0] 96.288034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 46 +[MCU2_0] 96.288199 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 47 +[MCU2_0] 96.288357 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 48 +[MCU2_0] 96.304031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 49 +[MCU2_0] 96.305037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x33 , regValue: 0x2, status: 0, counter: 50 +[MCU2_0] 96.306032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xbc , regValue: 0x0, status: 0, counter: 51 + 96.311498 s: ISS: Enumerating sensors ... found 0 : IMX390-UB953_D3 + 96.311511 s: ISS: Enumerating sensors ... found 1 : AR0233-UB953_MARS + 96.311517 s: ISS: Enumerating sensors ... found 2 : AR0820-UB953_LI + 96.311522 s: ISS: Enumerating sensors ... found 3 : OV2312-UB953_OV + 96.311526 s: ISS: Enumerating sensors ... found 4 : UB9xxx_RAW12_TESTPATTERN + 96.311532 s: ISS: Enumerating sensors ... found 5 : UB96x_UYVY_TESTPATTERN + 96.311537 s: ISS: Enumerating sensors ... found 6 : GW_AR0233_UYVY +Select camera port index 0-7 : [MCU2_0] 96.307030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 52 +[MCU2_0] 96.308026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xff, status: 0, counter: 53 +[MCU2_0] 96.309030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x5e , regValue: 0xff, status: 0, counter: 54 +[MCU2_0] 96.310029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0xff, status: 0, counter: 55 +[MCU2_0] 96.311033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x6d , regValue: 0x6c, status: 0, counter: 56 +[MCU2_0] 96.311202 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 57 +[MCU2_0] 96.311360 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 58 +[MCU2_0] 96.311406 s: End of UB960 config +0 +0x7 registered sensor drivers +a : IMX390-UB953_D3 +b : AR0233-UB953_MARS +c : AR0820-UB953_LI +d : OV2312-UB953_OV +e : UB9xxx_RAW12_TESTPATTERN +f : UB96x_UYVY_TESTPATTERN +g : GW_AR0233_UYVY +Select a sensor above or press '0' to autodetect the sensor : Invalid selection +. Try again +0x7 registered sensor drivers +a : IMX390-UB953_D3 +b : AR0233-UB953_MARS +c : AR0820-UB953_LI +d : OV2312-UB953_OV +e : UB9xxx_RAW12_TESTPATTERN +f : UB96x_UYVY_TESTPATTERN +g : GW_AR0233_UYVY +Select a sensor above or press '0' to autodetect the sensor : 0 +[MCU2_0] 101.276890 s: UB960 config start +[MCU2_0] 101.277071 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 101.278049 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 101.279037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0x34, status: 0, counter: 2 +[MCU2_0] 101.280030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 3 +[MCU2_0] 101.281029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 101.281084 s: End of UB960 config +[MCU2_0] 101.281107 s: ub953 config start : slaveAddr = 0x74 +[MCU2_0] 101.281259 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x1 , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 101.313031 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x2 , regValue: 0x72, status: 0, counter: 1 +[MCU2_0] 101.329037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x6 , regValue: 0x41, status: 0, counter: 2 +[MCU2_0] 101.360035 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x7 , regValue: 0x48, status: 0, counter: 3 +[MCU2_0] 101.391047 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0x3, status: 0, counter: 4 +[MCU2_0] 101.407032 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xe , regValue: 0xf0, status: 0, counter: 5 +[MCU2_0] 101.423031 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xb0 , regValue: 0x4, status: 0, counter: 6 +[MCU2_0] 101.439037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xb1 , regValue: 0x8, status: 0, counter: 7 +[MCU2_0] 101.455032 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xb2 , regValue: 0x7, status: 0, counter: 8 +[MCU2_0] 101.471032 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 9 +[MCU2_0] 101.471087 s: End of UB953 config +[MCU2_0] 101.471252 s: Error : I2C Timeout while reading from IMX390 register 0x330 +[MCU2_0] 101.471288 s: IMX390 Probe : Failed to read CHIP_ID register 0x330 +[MCU2_0] 101.471454 s: UB960 config start +[MCU2_0] 101.471597 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 101.472041 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 101.473038 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0x20, status: 0, counter: 2 +[MCU2_0] 101.474040 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 3 +[MCU2_0] 101.475035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 101.475086 s: End of UB960 config +[MCU2_0] 101.574898 s: ub953 config start : slaveAddr = 0x74 +[MCU2_0] 101.575086 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x1 , regValue: 0x2, status: 0, counter: 0 +[MCU2_0] 102.575052 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x2 , regValue: 0x73, status: 0, counter: 1 +[MCU2_0] 102.576046 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x6 , regValue: 0x41, status: 0, counter: 2 +[MCU2_0] 102.577040 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x7 , regValue: 0x22, status: 0, counter: 3 +[MCU2_0] 102.578042 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xe , regValue: 0x3c, status: 0, counter: 4 +[MCU2_0] 102.579033 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0x1, status: 0, counter: 5 +[MCU2_0] 102.580030 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 6 +[MCU2_0] 102.580082 s: End of UB953 config +[MCU2_0] 102.680046 s: AR0233 Probe : Failed to read CHIP_ID register 0x3000 +[MCU2_0] 102.680242 s: AR0233 Probe : Failed to read CHIP_ID register 0x3000 +[MCU2_0] 102.680418 s: AR0233 Probe : Failed to read CHIP_ID register 0x3000 +[MCU2_0] 102.680590 s: AR0233 Probe : Failed to read CHIP_ID register 0x3000 +[MCU2_0] 102.680762 s: AR0233 Probe : Failed to read CHIP_ID register 0x3000 +[MCU2_0] 102.680966 s: UB960 config start +[MCU2_0] 102.681125 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 102.682035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 102.683040 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0x20, status: 0, counter: 2 +[MCU2_0] 102.684032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 3 +[MCU2_0] 102.685035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 102.685087 s: End of UB960 config +[MCU2_0] 102.784898 s: ub953 config start : slaveAddr = 0x74 +[MCU2_0] 102.785085 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x1 , regValue: 0x2, status: 0, counter: 0 +[MCU2_0] 103.785045 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xe , regValue: 0xf0, status: 0, counter: 1 +[MCU2_0] 103.786055 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0xf, status: 0, counter: 2 +[MCU2_0] 103.787038 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 103.787092 s: End of UB953 config +[MCU2_0] 103.887057 s: AR0820_Probe Error : Failed reading CHIP_ID register 0x3000 +[MCU2_0] 103.887257 s: AR0820_Probe Error : Failed reading CHIP_ID register 0x3000 +[MCU2_0] 103.887431 s: AR0820_Probe Error : Failed reading CHIP_ID register 0x3000 +[MCU2_0] 103.887606 s: AR0820_Probe Error : Failed reading CHIP_ID register 0x3000 +[MCU2_0] 103.887777 s: AR0820_Probe Error : Failed reading CHIP_ID register 0x3000 +[MCU2_0] 103.887811 s: OV2312_Probe +[MCU2_0] 103.887979 s: UB960 config start +[MCU2_0] 103.888134 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 103.889036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 103.890031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xc0, status: 0, counter: 2 +[MCU2_0] 103.891036 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 3 +[MCU2_0] 103.892031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 103.892084 s: End of UB960 config +[MCU2_0] 103.892104 s: UB960_SetSensorAlias status: 0 +[MCU2_0] 103.991894 s: ub953 config start : slaveAddr = 0x74 +[MCU2_0] 103.992083 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x2 , regValue: 0x52, status: 0, counter: 0 +[MCU2_0] 104.008036 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x6 , regValue: 0x23, status: 0, counter: 1 +[MCU2_0] 104.009038 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x7 , regValue: 0x7d, status: 0, counter: 2 +[MCU2_0] 104.010037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xe , regValue: 0xf0, status: 0, counter: 3 +[MCU2_0] 104.011038 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 104.012037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0xc, status: 0, counter: 5 +[MCU2_0] 104.013037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 6 +[MCU2_0] 104.013090 s: End of UB953 config +[MCU2_0] 104.013110 s: ub953_cfgScript status: 0 +Sensor selected : OV2312-UB953_OV +LDC Selection Yes(1)/No(0) : LDC Selection Yes(1)/No(0) : [MCU2_0] 104.114180 s: OV2312_ReadReg status: 0 +[MCU2_0] 104.114228 s: OV2312_Probe SUCCESS : Read expected value 0x2311 at chip ID register 0x300a +[MCU2_0] 104.114269 s: OV2312 Probe...done. Status: 0 +[MCU2_0] 104.114292 s: Found sensor OV2312-UB953_OV at port # 0 +[MCU2_0] 104.114319 s: IM_SENSOR_CMD_DETECT cmd_param[0] = 1 +0 +app_init done +Querying OV2312-UB953_OV + 105.994839 s: ISS: Querying sensor [OV2312-UB953_OV] ... !!! + 105.995087 s: ISS: Querying sensor [OV2312-UB953_OV] ... Done !!! +WDR mode is not supported. Defaulting to linear +obj->aewb_cfg.ae_mode = 2 +obj->aewb_cfg.awb_mode = 2 +Sensor DCC is NOT enabled +Sensor width = 1600 +Sensor height = 1300 +Sensor DCC ID = 2333 +Sensor Supported Features = 0x20 +Sensor Enabled Features = 0x20 + 105.995119 s: ISS: Initializing sensor [OV2312-UB953_OV], doing IM_SENSOR_CMD_PWRON ... !!! + 105.995343 s: ISS: Initializing sensor [OV2312-UB953_OV], doing IM_SENSOR_CMD_CONFIG ... !!! +[MCU2_0] 105.994946 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY +[MCU2_0] 105.995007 s: Received Query for OV2312-UB953_OV +[MCU2_0] 105.995223 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_PWRON +[MCU2_0] 105.995271 s: IM_SENSOR_CMD_PWRON : channel_mask = 0x1 +[MCU2_0] 105.995391 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG +[MCU2_0] 105.995432 s: Application requested features = 0x20 +[MCU2_0] +[MCU2_0] 105.995466 s: UB960 config start +[MCU2_0] 105.995624 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 106.011032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 106.027039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 2 +[MCU2_0] 106.043034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 106.059032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 106.075043 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xec, status: 0, counter: 5 +[MCU2_0] 106.091034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x84, status: 0, counter: 6 +[MCU2_0] 106.107032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 106.123029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 106.139028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf0, status: 0, counter: 9 +[MCU2_0] 106.155027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x88, status: 0, counter: 10 +[MCU2_0] 106.171031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 106.187040 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 106.203030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf4, status: 0, counter: 13 +[MCU2_0] 106.219029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x8c, status: 0, counter: 14 +[MCU2_0] 106.235029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 +[MCU2_0] 106.251026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 +[MCU2_0] 106.251083 s: End of UB960 config +[MCU2_0] 106.251110 s: UB960 config start +[MCU2_0] 106.251244 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 106.267027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xd8, status: 0, counter: 1 +[MCU2_0] 106.283034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x90, status: 0, counter: 2 +[MCU2_0] 106.299030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 106.315029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 106.331027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xdc, status: 0, counter: 5 +[MCU2_0] 106.347030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x94, status: 0, counter: 6 +[MCU2_0] 106.363027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 106.379033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 106.395030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe0, status: 0, counter: 9 +[MCU2_0] 106.411030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x98, status: 0, counter: 10 +[MCU2_0] 106.427029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 106.443028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 106.459033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe4, status: 0, counter: 13 +[MCU2_0] 106.475032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x9c, status: 0, counter: 14 +[MCU2_0] 106.491033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 +[MCU2_0] 106.507029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 +[MCU2_0] 106.507085 s: End of UB960 config +[MCU2_0] 106.507109 s: Configuring camera # 0 +[MCU2_0] 106.507135 s: UB960 config start +[MCU2_0] 106.507272 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xc , regValue: 0xf, status: 0, counter: 0 +[MCU2_0] 106.523028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x1f , regValue: 0x0, status: 0, counter: 1 +[MCU2_0] 106.539023 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 2 +[MCU2_0] 106.540032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x58 , regValue: 0x5e, status: 0, counter: 3 +[MCU2_0] 106.541029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5c , regValue: 0x30, status: 0, counter: 4 +[MCU2_0] 106.542031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5d , regValue: 0x30, status: 0, counter: 5 +[MCU2_0] 106.543028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 6 +[MCU2_0] 106.544035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x5e , regValue: 0xc0, status: 0, counter: 7 +[MCU2_0] 106.545032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 8 +[MCU2_0] 106.546033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x6d , regValue: 0x7c, status: 0, counter: 9 +[MCU2_0] 106.547031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xd5 , regValue: 0xf0, status: 0, counter: 10 +[MCU2_0] 106.548027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x7c , regValue: 0x1, status: 0, counter: 11 +[MCU2_0] 106.549033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x70 , regValue: 0x2b, status: 0, counter: 12 +[MCU2_0] 106.550030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x71 , regValue: 0x2c, status: 0, counter: 13 +[MCU2_0] 106.551028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xe4, status: 0, counter: 14 +[MCU2_0] 106.552030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x32 , regValue: 0x1, status: 0, counter: 15 +[MCU2_0] 106.553031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x33 , regValue: 0x23, status: 0, counter: 16 +[MCU2_0] 106.554033 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x21 , regValue: 0x3, status: 0, counter: 17 +[MCU2_0] 106.555026 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x20 , regValue: 0x0, status: 0, counter: 18 +[MCU2_0] 106.556030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xb9 , regValue: 0x18, status: 0, counter: 19 +[MCU2_0] 106.557031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x42 , regValue: 0x71, status: 0, counter: 20 +[MCU2_0] 106.558032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x10 , regValue: 0x59, status: 0, counter: 21 +[MCU2_0] 106.559029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 22 +[MCU2_0] 106.559083 s: End of UB960 config +[MCU2_0] 106.608894 s: ub953 config start : slaveAddr = 0x74 +[MCU2_0] 106.609079 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x2 , regValue: 0x52, status: 0, counter: 0 +[MCU2_0] 106.625031 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x6 , regValue: 0x23, status: 0, counter: 1 +[MCU2_0] 106.626037 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0x7 , regValue: 0x7d, status: 0, counter: 2 +[MCU2_0] 106.627034 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xe , regValue: 0xf0, status: 0, counter: 3 +[MCU2_0] 106.628034 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0x0, status: 0, counter: 4 +[MCU2_0] 106.629042 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xd , regValue: 0xc, status: 0, counter: 5 +[MCU2_0] 106.630046 s: UB953_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x74 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 6 +[MCU2_0] 106.630098 s: End of UB953 config +[MCU2_0] 106.679894 s: Configuring OV2312 imager .. Please wait till it finishes + 106.851032 s: ISS: Initializing sensor [OV2312-UB953_OV] ... Done !!! +Creating graph +Initializing params for capture node +Initializing params for capture node +capture_config = 0x0x6df290 +Creating capture node +obj->capture_node = 0x0x699b90 +read_test_image_raw : Unable to open file /opt/vision_apps/test_data/img_test.raw +app_create_viss : sensor_dcc_id = 2333 +Invalid DCC size for VISS. Disabling DCC +Invalid DCC size for 2A. Disabling DCC +AEWB Set Reference done +Display Set Target done +vxSetGraphScheduleConfig done +[MCU2_0] 106.850892 s: OV2312 config done +[MCU2_0] 106.850937 s: IM_SENSOR_CMD_CONFIG returning status = 0 +[MCU2_0] 106.858496 s: VX_ZONE_WARNING:[tivxVpacVissCreate:365] VISS H3A output is not generated due to DCC not being enabled +Scaler is enabled +[MCU2_0] 106.864282 s: VX_ZONE_WARNING:[tivxAewbCreate:1064] No DCC buffer passed. Disabling 2A +app_create_graph exiting +app_create_graph done + + + ========================== + Demo : Single Camera w/ 2A + ========================== + + p: Print performance statistics + + s: Save Sensor RAW, VISS Output and H3A output images to File System + + e: Export performance statistics + + u: Update DCC from File System + + + x: Exit + + Enter Choice: +Unsupported command + + + + ========================== + Demo : Single Camera w/ 2A + ========================== + + p: Print performance statistics + + s: Save Sensor RAW, VISS Output and H3A output images to File System + + e: Export performance statistics + + u: Update DCC from File System + + + x: Exit + + Enter Choice: 106.878294 s: ISS: Starting sensor [OV2312-UB953_OV] ... !!! +[MCU2_0] 106.878368 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_ON +[MCU2_0] 106.878437 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1 +[MCU2_0] 106.878473 s: UB960 config start +[MCU2_0] 106.878632 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 106.894039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 106.910031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 2 +[MCU2_0] 106.926029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 106.942029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 106.958027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xec, status: 0, counter: 5 +[MCU2_0] 106.974035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x84, status: 0, counter: 6 +[MCU2_0] 106.990034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 107.006029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 107.022025 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf0, status: 0, counter: 9 +[MCU2_0] 107.038028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x88, status: 0, counter: 10 +[MCU2_0] 107.054027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 107.070032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 107.086027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf4, status: 0, counter: 13 +[MCU2_0] 107.102031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x8c, status: 0, counter: 14 +[MCU2_0] 107.118028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 +[MCU2_0] 107.134029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 +[MCU2_0] 107.134089 s: End of UB960 config +[MCU2_0] 107.134116 s: UB960 config start +[MCU2_0] 107.134254 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 107.150030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xd8, status: 0, counter: 1 +[MCU2_0] 107.166029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x90, status: 0, counter: 2 +[MCU2_0] 107.182030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 107.198031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 107.214031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xdc, status: 0, counter: 5 +[MCU2_0] 107.230030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x94, status: 0, counter: 6 +[MCU2_0] 107.246029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 107.262039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 107.278040 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe0, status: 0, counter: 9 +[MCU2_0] 107.294029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x98, status: 0, counter: 10 +[MCU2_0] 107.310027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 107.326031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 107.342029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe4, status: 0, counter: 13 +[MCU2_0] 107.358025 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x9c, status: 0, counter: 14 +[MCU2_0] 107.374037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 + 107.390192 s: ISS: Starting sensor [OV2312-UB953_OV] ... !!! +get_dcc_dir_size : Could not open directory or directory is empty /opt/vision_apps/dcc/OV2312-UB953_OV/wdr +[MCU2_0] 107.390035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 +[MCU2_0] 107.390090 s: End of UB960 config +[MCU2_0] 107.390115 s: OV2312 stream on. + i mod10: 0... +x + + 119.178725 s: ISS: Stopping sensor [OV2312-UB953_OV] ... !!! +[MCU2_0] 119.178810 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF +[MCU2_0] 119.178925 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1 + 119.188938 s: ISS: Stopping sensor [OV2312-UB953_OV] ... Done !!! + 119.203041 s: ISS: Stopping sensor [OV2312-UB953_OV] ... !!! +[MCU2_0] 119.203109 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_OFF +[MCU2_0] 119.203170 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1 + 119.212935 s: ISS: Stopping sensor [OV2312-UB953_OV] ... Done !!! +app_run_graph done +releasing capture node +releasing node_viss +releasing node_aewb +releasing displayNode +releasing raw image done +releasing cap_frame # 0 +releasing cap_frame # 1 +releasing cap_frame # 2 +releasing cap_frame # 3 +releasing y8_r8_c2 +releasing configuration +releasing ae_awb_result done +releasing h3a_aew_af +releasing aewb_config +releasing Display Param Data Object +releasing Scaler Output Image +releasing Scaler Node +release Scalar coefficient data object +releasing test raw image buffer # 3 +releasing graph +[MCU2_0] 119.213495 s: ========================================================== +[MCU2_0] 119.213570 s: Capture Status: Instance|0 +[MCU2_0] 119.213607 s: ========================================================== +[MCU2_0] 119.213641 s: overflowCount: 0 +[MCU2_0] 119.213666 s: spuriousUdmaIntrCount: 0 +[MCU2_0] 119.213690 s: frontFIFOOvflCount: 0 +[MCU2_0] 119.213712 s: crcCount: 0 +[MCU2_0] 119.213730 s: eccCount: 0 +[MCU2_0] 119.213750 s: correctedEccCount: 0 +[MCU2_0] 119.213773 s: dataIdErrorCount: 0 +[MCU2_0] 119.213795 s: invalidAccessCount: 0 +[MCU2_0] 119.213818 s: invalidSpCount: 0 +[MCU2_0] 119.213840 s: strmFIFOOvflCount[0]: 0 +[MCU2_0] 119.213912 s: strmFIFOOvflCount[1]: 0 +[MCU2_0] 119.213951 s: strmFIFOOvflCount[2]: 83 +[MCU2_0] 119.213979 s: strmFIFOOvflCount[3]: 13 +[MCU2_0] 119.214017 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count | +[MCU2_0] 119.214070 s: 0 | 4 | 4 | 0 | 0 | +[MCU2_0] 119.214665 s: ========================================================== +[MCU2_0] 119.214729 s: Capture Status: Instance|1 +[MCU2_0] 119.214763 s: ========================================================== +[MCU2_0] 119.214797 s: overflowCount: 0 +[MCU2_0] 119.214821 s: spuriousUdmaIntrCount: 0 +[MCU2_0] 119.214846 s: frontFIFOOvflCount: 0 +[MCU2_0] 119.214918 s: crcCount: 0 +[MCU2_0] 119.214943 s: eccCount: 0 +[MCU2_0] 119.214964 s: correctedEccCount: 0 +[MCU2_0] 119.214987 s: dataIdErrorCount: 0 +[MCU2_0] 119.215009 s: invalidAccessCount: 0 +[MCU2_0] 119.215032 s: invalidSpCount: 0 +[MCU2_0] 119.215054 s: strmFIFOOvflCount[0]: 0 +[MCU2_0] 119.215079 s: strmFIFOOvflCount[1]: 1 +[MCU2_0] 119.215104 s: strmFIFOOvflCount[2]: 83 +[MCU2_0] 119.215129 s: strmFIFOOvflCount[3]: 13 +[MCU2_0] 119.215166 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count | +releasing graph done +app_delete_graph done +tivxHwaUnLoadKernels done +tivxImagingUnLoadKernels done +vxReleaseContext done +app_deinit done + 119.241088 s: ISS: De-initializing sensor [OV2312-UB953_OV] ... !!! + 119.241188 s: ISS: De-initializing sensor [OV2312-UB953_OV] ... Done !!! + 119.241197 s: VX_ZONE_INIT:[tivxHostDeInit:56] De-Initialization Done for HOST !!! + 119.245511 s: VX_ZONE_INIT:[tivxDeInit:111] De-Initialization Done !!! +APP: Deinit ... !!! +REMOTE_SERVICE: Deinit ... !!! +REMOTE_SERVICE: Deinit ... Done !!! +IPC: Deinit ... !!! +IPC: DeInit ... Done !!! +MEM: Deinit ... !!! +MEM: Alloc's: 21 alloc's of 45773910 bytes +MEM: Free's : 21 free's of 45773910 bytes +MEM: Open's : 0 allocs of 0 bytes +MEM: Deinit ... Done !!! +APP: Deinit ... Done !!! +root@j7-evm:/opt/vision_apps# [ 130.333659] Initializing XFRM netlink socket +[ 133.129149] process 'docker/tmp/qemu-check684945811/check' started with executable stack + The sensor is recognized and configured with the proper registers but same noise appearing. The sensor pattern is RGB-Ir 10 bit data, I have saved the .raw info of the image and I have processed it but it is noise. At the end of the configuration (log below) the application is overwriting the registers dedicated to the sensor alias and the serializer or it is writing indirect registers? I have not been able to found that part in the code. Enter Choice: 106.878294 s: ISS: Starting sensor [OV2312-UB953_OV] ... !!! +[MCU2_0] 106.878368 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_STREAM_ON +[MCU2_0] 106.878437 s: IM_SENSOR_CMD_STREAM_ON: channel_mask = 0x1 +[MCU2_0] 106.878473 s: UB960 config start +[MCU2_0] 106.878632 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 106.894039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xe8, status: 0, counter: 1 +[MCU2_0] 106.910031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x80, status: 0, counter: 2 +[MCU2_0] 106.926029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 106.942029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 106.958027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xec, status: 0, counter: 5 +[MCU2_0] 106.974035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x84, status: 0, counter: 6 +[MCU2_0] 106.990034 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 107.006029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 107.022025 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf0, status: 0, counter: 9 +[MCU2_0] 107.038028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x88, status: 0, counter: 10 +[MCU2_0] 107.054027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 107.070032 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 107.086027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x65 , regValue: 0xf4, status: 0, counter: 13 +[MCU2_0] 107.102031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x66 , regValue: 0x8c, status: 0, counter: 14 +[MCU2_0] 107.118028 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 +[MCU2_0] 107.134029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x3d , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 +[MCU2_0] 107.134089 s: End of UB960 config +[MCU2_0] 107.134116 s: UB960 config start +[MCU2_0] 107.134254 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x1, status: 0, counter: 0 +[MCU2_0] 107.150030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xd8, status: 0, counter: 1 +[MCU2_0] 107.166029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x90, status: 0, counter: 2 +[MCU2_0] 107.182030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x0, status: 0, counter: 3 +[MCU2_0] 107.198031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x12, status: 0, counter: 4 +[MCU2_0] 107.214031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xdc, status: 0, counter: 5 +[MCU2_0] 107.230030 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x94, status: 0, counter: 6 +[MCU2_0] 107.246029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0x55, status: 0, counter: 7 +[MCU2_0] 107.262039 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x24, status: 0, counter: 8 +[MCU2_0] 107.278040 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe0, status: 0, counter: 9 +[MCU2_0] 107.294029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x98, status: 0, counter: 10 +[MCU2_0] 107.310027 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xaa, status: 0, counter: 11 +[MCU2_0] 107.326031 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x4c , regValue: 0x38, status: 0, counter: 12 +[MCU2_0] 107.342029 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x65 , regValue: 0xe4, status: 0, counter: 13 +[MCU2_0] 107.358025 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x66 , regValue: 0x9c, status: 0, counter: 14 +[MCU2_0] 107.374037 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0x72 , regValue: 0xff, status: 0, counter: 15 + 107.390192 s: ISS: Starting sensor [OV2312-UB953_OV] ... !!! +get_dcc_dir_size : Could not open directory or directory is empty /opt/vision_apps/dcc/OV2312-UB953_OV/wdr +[MCU2_0] 107.390035 s: UB960_WriteReg: i2cInstId: 0x6 , sensorI2cAddr 0x36 , regAddr: 0xffff , regValue: 0x0, status: 0, counter: 16 + +I closed it by mistake. Reopening it. For 10-bit data format, the following line needs to change {TIVX_RAW_IMAGE_16_BIT, 11}, /*dataFormat and MSB [0]*/ /* Sensor output: 10-bit RGB-lr RAW */ MSB[0] should be 9. + +Hi Mayank, I had already tried that solution but the Viss node does not start correctly so I assumed I could extract my 10 bits of information from the 12 bits received. Anyway to check that this is not the problem I have modified the node code as explained in this post and I have tried it out but it still only receives noise: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1036311/tda4vm-isp?tisearch=e2e-sitesearch&keymatch=raw10 With the log I added in my previous post any idea why still failing? Thank you and regards, Mohamed + +You may want to check deserializer PORT_CONFIG register. It should be configured for RAW10. + +Hi, In deserializer datasheet it says RAW10 mode is only compatible with DS90UB913A-Q1 / DS90UB933-Q1 and I am using DS90UB953. I have tried it anyway and it fails. Regards. + +Which SerDes pair did you use on TDA2? Are you using the SerDes settings on TDA4 SDK? + +Sorry, closed by mistake. I used the same pair UB960+UB953 in TDA2 and TDA4, and using also same SerDes configurations on TDA4 SDK Regards + +Can you confirm that TDA4 is getting CSI clock and data signals? Please share a waveform. + +Hi Mayank, Measurements have been carried out at these points of the fusion board: Clock Signal: CSI Data Lane 1: CSI Data Lane 2: Best regards, Mohamed + +Thanks. Can you please share your UB960 settings ? + +Yes, find it attached: I2cParams ub960DesCfg[DES_CFG_SIZE] = { {0x0C, 0x0F, 0x10}, + {0x1F, 0x00, 0x10}, + {0x4C, 0x01, 0x1}, //Due to chanel ID + {0x58, 0x5D, 0x1}, + {0x5C, 0x30, 0x1}, + {0x5D, 0x30, 0x1}, //Serializer I2C address + {0x65, 0x74 << 1, 0x1}, //Serializer alias + {0x5E, 0xC0, 0x1}, //Sensor i2c address + {0x66, 0x40 << 1 , 0x1}, //Sensor alias + {0x6D, 0x7C, 0x1}, + {0xD5, 0xF0, 0x1}, + {0x7C, 0x01, 0x1}, + {0x70, 0x2B, 0x1}, + {0x71, 0x2C, 0x1}, + {0x72, 0xE4, 0x1}, + {0x32, 0x01, 0x1}, + {0x33, 0x23, 0x1}, + {0x21, 0x03, 0x1}, + {0x20, 0x00, 0x1}, + {0xB9, 0x18, 0x1}, + {0x42, 0x71, 0x1}, + {0x10, 0x59, 0x1}, + {0xFFFF, 0x00, 0x0} +}; + +Thanks. One issue I see is {0x33, 0x23, 0x1}, This means that UB960 enabled streaming right at config time, probably before CSI2 Rx was setup. Please change it to 0x22. Also make sure that the sensor does not start streaming during initial configuration. Sensor and UB960 should start streaming only after the application sends the START command. In sensor framework this is handled through "IssSensor_Start" function. + +Thanks, that resolved my issue. Regards, Mohamed + +Excellent. Thanks for confirming. + diff --git a/data2/text/range/30001+/1174657.txt b/data2/text/range/30001+/1174657.txt new file mode 100644 index 0000000000000000000000000000000000000000..984e222504feaa95b954f533c7cd9e3d70f1fe6b --- /dev/null +++ b/data2/text/range/30001+/1174657.txt @@ -0,0 +1,16 @@ +Ticket Name: Generic DRA74X + +Query Text: +Other Parts Discussed in Thread: DRA742, DRA752 Hi, My board is Generic DRA74X, When I reboot my board by using instruction of "reboot -f", but it has no effect. Then my board does not work, Following is dmes log, and exception log is end: <6>[ 0.000000] Booting Linux on physical CPU 0x0 <5>[ 0.000000] Linux version 4.19.73 (root@ee38b2a1af63) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Tue Nov 8 20:05:35 CST 2022 <6>[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d <6>[ 0.000000] CPU: div instructions available: patching division code <6>[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache <6>[ 0.000000] OF: fdt: Machine model: TI DRA742 <6>[ 0.000000] bootconsole [earlycon0] enabled <6>[ 0.000000] Memory policy: Data cache writealloc <6>[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB <6>[ 0.000000] OF: reserved mem: initialized node cmem@40300000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node cmem@A9000000, compatible id shared-dma-pool <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xb0000000, size 128 MiB <6>[ 0.000000] OF: reserved mem: initialized node gpu-memory@c0000000, compatible id shared-dma-pool <6>[ 0.000000] cma: Reserved 64 MiB at 0xfac00000 <6>[ 0.000000] OMAP4: Map 0xfee00000 to (ptrval) for dram barrier <7>[ 0.000000] On node 0 totalpages: 511488 <7>[ 0.000000] Normal zone: 1728 pages used for memmap <7>[ 0.000000] Normal zone: 0 pages reserved <7>[ 0.000000] Normal zone: 188416 pages, LIFO batch:63 <7>[ 0.000000] HighMem zone: 323072 pages, LIFO batch:63 <6>[ 0.000000] DRA752 ES2.0 <5>[ 0.000000] random: get_random_bytes called from 0xc0a009d4 with crng_init=0 <6>[ 0.000000] percpu: Embedded 16 pages/cpu s35852 r8192 d21492 u65536 <7>[ 0.000000] pcpu-alloc: s35852 r8192 d21492 u65536 alloc=16*4096 <7>[ 0.000000] pcpu-alloc: [0] 0 [0] 1 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 509760 <5>[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk1p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1 loglevel=0 clk_ignore_unused <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) <6>[ 0.000000] Memory: 1213032K/2045952K available (7168K kernel code, 233K rwdata, 1188K rodata, 1024K init, 234K bss, 538008K reserved, 294912K cma-reserved, 1095680K highmem) <5>[ 0.000000] Virtual kernel memory layout: <5>[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) <5>[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) <5>[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) <5>[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) <5>[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) <5>[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) <5>[ 0.000000] .text : 0x(ptrval) - 0x(ptrval) (8160 kB) <5>[ 0.000000] .init : 0x(ptrval) - 0x(ptrval) (1024 kB) <5>[ 0.000000] .data : 0x(ptrval) - 0x(ptrval) ( 234 kB) <5>[ 0.000000] .bss : 0x(ptrval) - 0x(ptrval) ( 235 kB) <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation. <6>[ 0.000000] Tasks RCU enabled. <6>[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 <6>[ 0.000000] GIC: Using split EOI/Deactivate mode <6>[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz <6>[ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns <6>[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns <6>[ 0.000014] Switching to timer-based delay loop, resolution 162ns <6>[ 0.000281] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns <6>[ 0.000286] OMAP clocksource: 32k_counter at 32768 Hz <3>[ 0.000712] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' <3>[ 0.000717] This ensures that you still see kernel messages. Please <3>[ 0.000721] update your kernel commandline. <6>[ 0.000748] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) <6>[ 0.000762] pid_max: default: 32768 minimum: 301 <6>[ 0.000869] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>[ 0.000880] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>[ 0.001402] CPU: Testing write buffer coherency: ok <6>[ 0.001435] CPU0: Spectre v2: using ICIALLU workaround <3>[ 0.001639] /cpus/cpu@0 missing clock-frequency property <3>[ 0.001653] /cpus/cpu@1 missing clock-frequency property <6>[ 0.001662] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 <6>[ 0.059924] Setting up static identity map for 0x80100000 - 0x80100060 <6>[ 0.079928] rcu: Hierarchical SRCU implementation. <6>[ 0.119987] smp: Bringing up secondary CPUs ... <6>[ 0.200313] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 <6>[ 0.200319] CPU1: Spectre v2: using ICIALLU workaround <6>[ 0.200417] smp: Brought up 1 node, 2 CPUs <6>[ 0.200426] SMP: Total of 2 processors activated (24.59 BogoMIPS). <6>[ 0.200431] CPU: All CPU(s) started in HYP mode. <6>[ 0.200436] CPU: Virtualization extensions available. <6>[ 0.201639] devtmpfs: initialized <6>[ 0.219210] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 <6>[ 0.219426] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns <6>[ 0.219440] futex hash table entries: 512 (order: 3, 32768 bytes) <6>[ 0.223697] pinctrl core: initialized pinctrl subsystem <6>[ 0.224471] NET: Registered protocol family 16 <6>[ 0.225684] DMA: preallocated 256 KiB pool for atomic coherent allocations <4>[ 0.226484] omap_hwmod: l3_main_2 using broken dt data from ocp <6>[ 0.403690] cpuidle: using governor ladder <6>[ 0.403721] cpuidle: using governor menu <6>[ 0.412455] OMAP GPIO hardware version 0.1 <6>[ 0.432485] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. <6>[ 0.432491] hw-breakpoint: maximum watchpoint size is 8 bytes. <4>[ 0.432979] omap4_sram_init:Unable to allocate sram needed to handle errata I688 <4>[ 0.432986] omap4_sram_init:Unable to get sram pool needed to handle errata I688 <6>[ 0.433517] OMAP DMA hardware revision 0.0 <6>[ 0.441780] edma 43300000.edma: memcpy is disabled <6>[ 0.445043] edma 43300000.edma: TI EDMA DMA engine driver <6>[ 0.451858] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) <6>[ 0.453443] evm_3v3: supplied by evm_12v0 <6>[ 0.453723] evm_5v0: supplied by evm_12v0 <6>[ 0.454011] evm_3v6: supplied by evm_5v0 <6>[ 0.456506] omap-iommu 40d01000.mmu: 40d01000.mmu registered <6>[ 0.456666] omap-iommu 40d02000.mmu: 40d02000.mmu registered <6>[ 0.456904] omap-iommu 58882000.mmu: 58882000.mmu registered <6>[ 0.457123] omap-iommu 55082000.mmu: 55082000.mmu registered <6>[ 0.457461] omap-iommu 41501000.mmu: 41501000.mmu registered <6>[ 0.457625] omap-iommu 41502000.mmu: 41502000.mmu registered <6>[ 0.457879] iommu: Adding device 58820000.ipu to group 1 <6>[ 0.457950] iommu: Adding device 55020000.ipu to group 2 <6>[ 0.458065] iommu: Adding device 40800000.dsp to group 0 <6>[ 0.458255] iommu: Adding device 41000000.dsp to group 3 <5>[ 0.459278] SCSI subsystem initialized <4>[ 0.460404] palmas 0-0058: IRQ missing: skipping irq request <6>[ 0.480808] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 <6>[ 0.482184] SMPS12: supplied by regulator-dummy <6>[ 0.483196] SMPS3: supplied by regulator-dummy <6>[ 0.484602] SMPS45: supplied by regulator-dummy <6>[ 0.486442] SMPS6: supplied by regulator-dummy <6>[ 0.488127] SMPS7: supplied by regulator-dummy <6>[ 0.489976] SMPS8: supplied by regulator-dummy <6>[ 0.491692] SMPS9: supplied by regulator-dummy <6>[ 0.492664] LDO1: supplied by regulator-dummy <6>[ 0.501295] LDO2: supplied by regulator-dummy <6>[ 0.511163] LDO3: supplied by regulator-dummy <6>[ 0.521169] LDO4: supplied by regulator-dummy <5>[ 0.521349] random: fast init done <6>[ 0.521909] LDO5: supplied by regulator-dummy <6>[ 0.522631] LDO6: supplied by regulator-dummy <6>[ 0.523340] LDO7: supplied by regulator-dummy <6>[ 0.524053] LDO8: supplied by regulator-dummy <6>[ 0.524780] LDO9: supplied by regulator-dummy <6>[ 0.531208] LDOLN: supplied by regulator-dummy <6>[ 0.541228] LDOUSB: supplied by regulator-dummy <6>[ 0.554013] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz <6>[ 0.554192] media: Linux media interface: v0.10 <6>[ 0.554226] videodev: Linux video capture interface: v2.00 <6>[ 0.554294] pps_core: LinuxPPS API ver. 1 registered <6>[ 0.554300] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <6>[ 0.554323] PTP clock support registered <6>[ 0.554327] EDAC MC: Ver: 3.0.0 <6>[ 0.554952] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 <6>[ 0.555182] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 <6>[ 0.556249] clocksource: Switched to clocksource arch_sys_counter <6>[ 0.557931] NET: Registered protocol family 2 <6>[ 0.558484] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes) <6>[ 0.558509] TCP established hash table entries: 8192 (order: 3, 32768 bytes) <6>[ 0.558569] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) <6>[ 0.558691] TCP: Hash tables configured (established 8192 bind 8192) <6>[ 0.558758] UDP hash table entries: 512 (order: 2, 16384 bytes) <6>[ 0.558789] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) <6>[ 0.558915] NET: Registered protocol family 1 <4>[ 0.559995] hw perfevents: no interrupt-affinity property for /pmu, guessing. <6>[ 0.560169] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available <6>[ 0.561259] workingset: timestamp_bits=14 max_order=19 bucket_order=5 <6>[ 0.565489] squashfs: version 4.0 (2009/01/31) Phillip Lougher <6>[ 0.566927] bounce: pool size: 64 pages <6>[ 0.566958] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) <6>[ 0.566965] io scheduler noop registered (default) <6>[ 0.566972] io scheduler deadline registered <6>[ 0.567061] io scheduler cfq registered <6>[ 0.567068] io scheduler mq-deadline registered <6>[ 0.567074] io scheduler kyber registered <6>[ 0.569929] pinctrl-single 4a003400.pinmux: 282 pins, size 1128 <6>[ 0.573009] evm_1v8: supplied by smps9 <6>[ 0.573248] evm_3v3_sw: supplied by sysen1 <6>[ 0.573468] aic_dvdd: supplied by evm_3v3_sw <6>[ 0.573549] vtt_fixed: supplied by sysen2 <6>[ 0.575074] Serial: 8250/16550 driver, 3 ports, IRQ sharing enabled <6>[ 0.576367] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 43, base_baud = 3000000) is a 8250 <6>[ 0.576442] console [ttyS0] enabled <6>[ 0.576448] bootconsole [earlycon0] disabled <6>[ 0.576943] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 44, base_baud = 3000000) is a 8250 <6>[ 0.578894] omap_rng 48090000.rng: Random Number Generator ver. 20 <6>[ 0.584731] brd: module loaded <5>[ 0.585311] random: crng init done <6>[ 0.591298] loop: module loaded <6>[ 0.591371] vmemexp device MAJOR num = 246 <6>[ 0.591389] vmemexp class registered <6>[ 0.591486] /dev/vmemexp device registered <6>[ 0.591492] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 <4>[ 0.593350] m25p80 spi0.0: found n25q512ax3, expected s25fl256s1 <6>[ 0.593524] m25p80 spi0.0: n25q512ax3 (65536 Kbytes) <5>[ 0.593590] 7 fixed-partitions partitions found on MTD device spi0.0 <5>[ 0.593596] Creating 7 MTD partitions on "spi0.0": <5>[ 0.593605] 0x000000000000-0x000000040000 : "QSPI.SPL" <5>[ 0.594275] 0x000000040000-0x000000140000 : "QSPI.u-boot" <5>[ 0.594898] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" <5>[ 0.595527] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" <5>[ 0.596167] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" <5>[ 0.596819] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" <5>[ 0.597419] 0x0000009e0000-0x000002000000 : "QSPI.file-system" <6>[ 0.598373] libphy: Fixed MDIO Bus: probed <6>[ 0.598680] CAN device driver interface <6>[ 0.599572] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=446859ab, irq=84) <6>[ 0.656277] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 <6>[ 0.656285] davinci_mdio 48485000.mdio: detected phy mask fffffff7 <6>[ 0.658679] libphy: 48485000.mdio: probed <6>[ 0.658690] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown <6>[ 0.659672] cpsw 48484000.ethernet: Detected MACID = cc:33:31:60:c6:4e <6>[ 0.659718] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 <6>[ 0.659725] cpsw 48484000.ethernet: ALE Table size 1024 <6>[ 0.659760] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) <7>[ 0.661914] omap_rtc 48838000.rtc: char device (253:0) <6>[ 0.661927] omap_rtc 48838000.rtc: registered as rtc0 <6>[ 0.662292] i2c /dev entries driver <6>[ 0.662673] MAX96706-SERDES 0-0048: max96706 i2c addr 0x48 <7>[ 0.662752] MAX96706-SERDES 0-0048: Got serializer_node property serializer_adapter_default <6>[ 0.662959] MAX96706-SERDES 0-004a: max96706 i2c addr 0x4a <7>[ 0.662998] MAX96706-SERDES 0-004a: Got serializer_node property serializer_adapter_default <6>[ 0.663173] MAX96706-SERDES 0-004c: max96706 i2c addr 0x4c <7>[ 0.663211] MAX96706-SERDES 0-004c: Got serializer_node property serializer_adapter_default <6>[ 0.663391] MAX96706-SERDES 0-004e: max96706 i2c addr 0x4e <7>[ 0.663431] MAX96706-SERDES 0-004e: Got serializer_node property serializer_adapter_default <6>[ 0.666140] sdhci: Secure Digital Host Controller Interface driver <6>[ 0.666146] sdhci: Copyright(c) Pierre Ossman <6>[ 0.666976] sdhci-pltfm: SDHCI platform and OF driver helper <6>[ 0.668091] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) <6>[ 0.668098] sdhci-omap 4809c000.mmc: Got CD GPIO <6>[ 0.668277] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.33 <6>[ 0.668538] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.18 <6>[ 0.668618] sdhci-omap 4809c000.mmc: Dropping the link to regulator.18 <6>[ 0.668699] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.3 <6>[ 0.668920] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.18 <3>[ 0.669063] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_1_8v mode <3>[ 0.669072] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_3_3v mode <3>[ 0.669080] sdhci-omap 4809c000.mmc: no pinctrl state for hs200_1_8v mode <6>[ 0.695431] mmc0: SDHCI controller on 4809c000.mmc [4809c000.mmc] using ADMA <6>[ 0.696092] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 <6>[ 0.696152] sdhci-omap 480b4000.mmc: Dropping the link to regulator.2 <6>[ 0.696228] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 <6>[ 0.721864] mmc1: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA <6>[ 0.724332] NET: Registered protocol family 10 <6>[ 0.735137] Segment Routing with IPv6 <6>[ 0.735198] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver <6>[ 0.735660] NET: Registered protocol family 17 <6>[ 0.735673] can: controller area network core (rev 20170425 abi 9) <6>[ 0.735791] NET: Registered protocol family 29 <6>[ 0.735806] can: raw protocol (rev 20170425) <6>[ 0.735812] can: broadcast manager protocol (rev 20170425 t) <6>[ 0.735823] can: netlink gateway (rev 20170425) max_hops=1 <5>[ 0.736062] Registering SWP/SWPB emulation handler <3>[ 0.736070] omap_voltage_late_init: Voltage driver support not added <6>[ 0.736075] Power Management for TI OMAP4+ devices. <6>[ 0.761696] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). <6>[ 0.761702] [drm] No driver support for vblank timestamp query. <6>[ 0.762016] [drm] Initialized vdrm 1.0.0 20191105 for 44000000.ocp:vdrm@0 on minor 0 <6>[ 0.767766] vdrm 44000000.ocp:vdrm@0: fb0: DRM emulated frame buffer device <6>[ 0.768216] dmm 4e000000.dmm: workaround for errata i878 in use <6>[ 0.769816] dmm 4e000000.dmm: initialized all PAT entries <6>[ 0.770568] ti-iodelay 4844a000.padconf: Set reg 0x190 Delay(a: 274 g: 0), Elements(C=0 F=8)0x29008 <6>[ 0.770580] ti-iodelay 4844a000.padconf: Set reg 0x194 Delay(a: 162 g: 0), Elements(C=0 F=5)0x29005 <6>[ 0.770591] ti-iodelay 4844a000.padconf: Set reg 0x1a8 Delay(a: 401 g: 0), Elements(C=0 F=12)0x2900c <6>[ 0.770601] ti-iodelay 4844a000.padconf: Set reg 0x1ac Delay(a: 73 g: 0), Elements(C=0 F=2)0x29002 <6>[ 0.770610] ti-iodelay 4844a000.padconf: Set reg 0x1b4 Delay(a: 465 g: 0), Elements(C=1 F=0)0x29020 <6>[ 0.770620] ti-iodelay 4844a000.padconf: Set reg 0x1b8 Delay(a: 115 g: 0), Elements(C=0 F=3)0x29003 <6>[ 0.770629] ti-iodelay 4844a000.padconf: Set reg 0x1c0 Delay(a: 633 g: 0), Elements(C=1 F=5)0x29025 <6>[ 0.770638] ti-iodelay 4844a000.padconf: Set reg 0x1c4 Delay(a: 47 g: 0), Elements(C=0 F=1)0x29001 <6>[ 0.770648] ti-iodelay 4844a000.padconf: Set reg 0x1d0 Delay(a: 935 g: 280), Elements(C=2 F=6)0x29046 <6>[ 0.770657] ti-iodelay 4844a000.padconf: Set reg 0x1d8 Delay(a: 621 g: 0), Elements(C=1 F=5)0x29025 <6>[ 0.770666] ti-iodelay 4844a000.padconf: Set reg 0x1dc Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770675] ti-iodelay 4844a000.padconf: Set reg 0x1e4 Delay(a: 183 g: 0), Elements(C=0 F=5)0x29005 <6>[ 0.770684] ti-iodelay 4844a000.padconf: Set reg 0x1e8 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770693] ti-iodelay 4844a000.padconf: Set reg 0x1f0 Delay(a: 467 g: 0), Elements(C=1 F=0)0x29020 <6>[ 0.770703] ti-iodelay 4844a000.padconf: Set reg 0x1f4 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770712] ti-iodelay 4844a000.padconf: Set reg 0x1fc Delay(a: 262 g: 0), Elements(C=0 F=8)0x29008 <6>[ 0.770721] ti-iodelay 4844a000.padconf: Set reg 0x200 Delay(a: 46 g: 0), Elements(C=0 F=1)0x29001 <6>[ 0.770730] ti-iodelay 4844a000.padconf: Set reg 0x364 Delay(a: 684 g: 0), Elements(C=1 F=7)0x29027 <6>[ 0.770739] ti-iodelay 4844a000.padconf: Set reg 0x368 Delay(a: 76 g: 0), Elements(C=0 F=2)0x29002 <6>[ 0.770922] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 1 <6>[ 0.773158] omap_rtc 48838000.rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800) <6>[ 0.773278] mmc1: new HS200 MMC card at address 0001 <6>[ 0.773927] mmcblk1: mmc1:0001 BGUF4R 29.1 GiB <6>[ 0.774283] mmcblk1boot0: mmc1:0001 BGUF4R partition 1 31.9 MiB <6>[ 0.774627] mmcblk1boot1: mmc1:0001 BGUF4R partition 2 31.9 MiB <6>[ 0.774776] mmcblk1rpmb: mmc1:0001 BGUF4R partition 3 4.00 MiB, chardev (240:0) <4>[ 0.775647] clk: Not disabling unused clocks <6>[ 0.775798] evm_3v3_sd: disabling <6>[ 0.775805] aic_dvdd: disabling <6>[ 0.775814] vmmcwl_fixed: disabling <6>[ 0.775972] mmcblk1: p1 p2 p3 p4 < p5 p6 > <6>[ 0.778680] ldousb: disabling <6>[ 0.783832] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) <6>[ 0.783866] VFS: Mounted root (ext4 filesystem) on device 179:2. <6>[ 0.784163] devtmpfs: error mounting -2 <6>[ 0.784858] Freeing unused kernel memory: 1024K <6>[ 0.784968] Run /sbin/init as init process <30>[ 0.867283] systemd[1]: systemd 239 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid) <30>[ 0.867710] systemd[1]: Detected architecture arm. <30>[ 0.906641] systemd[1]: Set hostname to . <30>[ 0.908173] systemd[1]: Initializing machine ID from random generator. <28>[ 1.006852] systemd[1]: File /lib/systemd/system/systemd-journald.service:36 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. <28>[ 1.006868] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) <28>[ 1.090405] systemd[1]: Configuration file /lib/systemd/system/pcbtest.service is marked executable. Please remove executable permission bits. Proceeding anyway. <28>[ 1.105326] systemd[1]: Configuration file /lib/systemd/system/autoboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. <30>[ 1.170540] systemd[1]: Started Forward Password Requests to Wall Directory Watch. <30>[ 1.206783] systemd[1]: Listening on Journal Socket (/dev/log). <6>[ 1.644024] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) <46>[ 2.306582] systemd-journald[85]: Received request to flush runtime journal from PID 1 <4>[ 3.777572] omap-rproc 58820000.ipu: ignoring dependency for device, assuming no driver <3>[ 3.777681] omap-rproc 58820000.ipu: device does not have specific CMA pool <6>[ 3.777699] remoteproc remoteproc0: releasing 58820000.ipu <4>[ 3.777743] omap-rproc: probe of 58820000.ipu failed with error -22 <4>[ 3.777790] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver <4>[ 3.777908] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver <6>[ 3.777917] omap-rproc 55020000.ipu: assigned reserved memory node ipu2-memory@95800000 <6>[ 3.778027] remoteproc remoteproc0: 55020000.ipu is available <4>[ 3.781336] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver <4>[ 3.781503] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver <6>[ 3.781515] omap-rproc 40800000.dsp: assigned reserved memory node dsp1-memory@99000000 <6>[ 3.781657] remoteproc remoteproc1: 40800000.dsp is available <4>[ 3.783026] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver <4>[ 3.783153] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver <6>[ 3.783162] omap-rproc 41000000.dsp: assigned reserved memory node dsp2-memory@9f000000 <6>[ 3.783255] remoteproc remoteproc2: 41000000.dsp is available <6>[ 3.814744] remoteproc remoteproc2: powering up 41000000.dsp <6>[ 3.814764] remoteproc remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 1850052 <6>[ 3.814887] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 <6>[ 3.814923] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 <6>[ 3.816579] remoteproc remoteproc1: powering up 40800000.dsp <6>[ 3.816601] remoteproc remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 1850052 <6>[ 3.816718] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 <6>[ 3.816774] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 <6>[ 3.995997] remoteproc remoteproc0: powering up 55020000.ipu <6>[ 3.996015] remoteproc remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 8720836 <6>[ 3.996109] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 <6>[ 4.063665] remoteproc remoteproc2: registered virtio0 (type 7) <6>[ 4.063676] remoteproc remoteproc2: remote processor 41000000.dsp is now up <6>[ 4.155724] remoteproc remoteproc1: registered virtio1 (type 7) <6>[ 4.155735] remoteproc remoteproc1: remote processor 40800000.dsp is now up <3>[ 4.370962] MAX96706-SERDES 0-0048: serializer 5610fbb7 regmap 332fb959 <6>[ 4.388881] remoteproc remoteproc0: registered virtio2 (type 7) <6>[ 4.388893] remoteproc remoteproc0: remote processor 55020000.ipu is now up <6>[ 4.597199] net eth0: initializing cpsw version 1.15 (0) <6>[ 4.599330] Generic PHY fixed-0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=POLL) <3>[ 4.599560] net eth0: could not add device link to fixed-0:01 err -17 <6>[ 4.599575] Generic PHY fixed-0:01: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:01, irq=POLL) <6>[ 4.634395] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready <6>[ 5.483959] virtio_rpmsg_bus virtio0: rpmsg host is online <6>[ 5.484521] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 <6>[ 5.484891] virtio_rpmsg_bus virtio1: rpmsg host is online <6>[ 5.485593] virtio_rpmsg_bus virtio2: rpmsg host is online <6>[ 5.494521] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 <6>[ 5.545178] NET: Registered protocol family 45 <6>[ 5.669113] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 <6>[ 5.676333] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off <6>[ 5.676346] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off <6>[ 5.676386] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready <4>[ 5.730729] pvrsrvkm: loading out-of-tree module taints kernel. <6>[ 5.759739] pvrsrvkm 56000000.gpu: assigned reserved memory node gpu-memory@c0000000 <6>[ 5.806657] [drm] Initialized pvr 1.17.4948957 20110701 for 56000000.gpu on minor 2 <6>[ 5.826842] PVR_K: UM DDK-(4948957) and KM DDK-(4948957) match. [ OK ] <6>[ 6.700290] DMA: Module install successful, device major num = 239 <6>[ 6.700297] DRV: Module install successful <6>[ 6.757491] c_can_platform 4ae3c000.can can0: setting BTR=0504 BRPE=0000 <6>[ 6.757626] IPv6: ADDRCONF(NETDEV_UP): can0: link is not ready <6>[ 6.757727] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready <6>[ 6.796181] EXT4-fs (mmcblk1p5): recovery complete <6>[ 6.796199] EXT4-fs (mmcblk1p5): mounted filesystem with ordered data mode. Opts: (null) <6>[ 6.841114] EXT4-fs (mmcblk1p6): recovery complete <6>[ 6.841132] EXT4-fs (mmcblk1p6): mounted filesystem with ordered data mode. Opts: (null) <6>[ 7.016323] MAX96705-SERDES 0-0040: Warning: ser power good is low <6>[ 7.227268] EXT4-fs (mmcblk1p3): recovery complete <6>[ 7.227742] EXT4-fs (mmcblk1p3): mounted filesystem with ordered data mode. Opts: (null) <6>[ 7.283301] device eth0 entered promiscuous mode <3>[ 7.316607] MAX96706-SERDES 0-004e: set ser <3>[ 8.636291] omap_i2c 48070000.i2c: controller timed out <3>[ 8.666295] MAX96706-SERDES 0-004e: turn off rcc failed after ser config <3>[ 8.696587] MAX96706-SERDES 0-004c: set ser <3>[ 10.077402] omap_i2c 48070000.i2c: controller timed out <3>[ 10.106342] MAX96706-SERDES 0-004c: turn off rcc failed after ser config <3>[ 10.137671] MAX96706-SERDES 0-004a: set ser <3>[ 11.516298] omap_i2c 48070000.i2c: controller timed out <3>[ 11.546317] MAX96706-SERDES 0-004a: turn off rcc failed after ser config <3>[ 11.576588] MAX96706-SERDES 0-0048: set ser <3>[ 12.956293] omap_i2c 48070000.i2c: controller timed out <3>[ 12.986305] MAX96706-SERDES 0-0048: turn off rcc failed after ser config <3>[ 12.986317] MAX96706-SERDES 0-004e: des check <3>[ 13.106300] MAX96706-SERDES 0-004c: des check <3>[ 13.196362] MAX96706-SERDES 0-004a: des check <3>[ 13.286443] MAX96706-SERDES 0-0048: des check <3>[ 15.671358] cma: cma_alloc: alloc failed, req-size: 12540 pages, ret: -12 <6>[ 15.671377] PVR_K:(Error): NewAllocCmaLinuxMemArea: failed <3>[ 15.919542] MAX96706-SERDES 0-004e: des check <3>[ 16.106332] MAX96706-SERDES 0-004e: ser check <4>[ 16.177005] hrtimer: interrupt took 176006 ns <3>[ 16.371321] MAX96706-SERDES 0-004c: des check <3>[ 16.486400] MAX96706-SERDES 0-004c: ser check <3>[ 16.730009] MAX96706-SERDES 0-004a: des check <3>[ 16.846397] MAX96706-SERDES 0-004a: ser check <3>[ 17.090769] MAX96706-SERDES 0-0048: des check <3>[ 17.206397] MAX96706-SERDES 0-0048: ser check <3>[ 19.529682] MAX96706-SERDES 0-004e: des check <3>[ 19.646423] MAX96706-SERDES 0-004e: ser check <3>[ 19.890867] MAX96706-SERDES 0-004c: des check <3>[ 20.006397] MAX96706-SERDES 0-004c: ser check <3>[ 20.256590] MAX96706-SERDES 0-004a: des check <3>[ 20.376295] MAX96706-SERDES 0-004a: ser check <3>[ 20.616574] MAX96706-SERDES 0-0048: des check <3>[ 20.736336] MAX96706-SERDES 0-0048: ser check <3>[ 23.036299] MAX96706-SERDES 0-004e: des check <3>[ 23.156304] MAX96706-SERDES 0-004e: ser check <3>[ 23.396561] MAX96706-SERDES 0-004c: des check <3>[ 23.516320] MAX96706-SERDES 0-004c: ser check <3>[ 23.756566] MAX96706-SERDES 0-004a: des check <3>[ 23.876293] MAX96706-SERDES 0-004a: ser check <3>[ 24.116557] MAX96706-SERDES 0-0048: des check <3>[ 24.236316] MAX96706-SERDES 0-0048: ser check <3>[ 26.556313] MAX96706-SERDES 0-004e: des check <3>[ 26.690007] MAX96706-SERDES 0-004e: ser check <3>[ 26.946593] MAX96706-SERDES 0-004c: des check <3>[ 27.066295] MAX96706-SERDES 0-004c: ser check <3>[ 27.306572] MAX96706-SERDES 0-004a: des check <3>[ 27.426293] MAX96706-SERDES 0-004a: ser check <3>[ 27.676557] MAX96706-SERDES 0-0048: des check <3>[ 27.816334] MAX96706-SERDES 0-0048: ser check <3>[ 30.156302] MAX96706-SERDES 0-004e: des check <3>[ 30.276312] MAX96706-SERDES 0-004e: ser check <3>[ 30.516569] MAX96706-SERDES 0-004c: des check <3>[ 30.636298] MAX96706-SERDES 0-004c: ser check <3>[ 30.876588] MAX96706-SERDES 0-004a: des check <3>[ 31.006470] MAX96706-SERDES 0-004a: ser check <3>[ 31.250994] MAX96706-SERDES 0-0048: des check <3>[ 31.366364] MAX96706-SERDES 0-0048: ser check <3>[ 33.676308] MAX96706-SERDES 0-004e: des check <3>[ 33.796286] MAX96706-SERDES 0-004e: ser check <3>[ 34.036568] MAX96706-SERDES 0-004c: des check <3>[ 34.156342] MAX96706-SERDES 0-004c: ser check <3>[ 34.396566] MAX96706-SERDES 0-004a: des check <3>[ 34.536317] MAX96706-SERDES 0-004a: ser check <3>[ 34.776588] MAX96706-SERDES 0-0048: des check <3>[ 34.906329] MAX96706-SERDES 0-0048: ser check <3>[ 37.196337] MAX96706-SERDES 0-004e: des check <3>[ 37.329777] MAX96706-SERDES 0-004e: ser check <3>[ 37.610184] MAX96706-SERDES 0-004c: des check <3>[ 37.729870] MAX96706-SERDES 0-004c: ser check <3>[ 37.986593] MAX96706-SERDES 0-004a: des check <3>[ 38.116316] MAX96706-SERDES 0-004a: ser check <3>[ 38.356602] MAX96706-SERDES 0-0048: des check <3>[ 38.476307] MAX96706-SERDES 0-0048: ser check <3>[ 40.796312] MAX96706-SERDES 0-004e: des check <3>[ 40.916309] MAX96706-SERDES 0-004e: ser check <3>[ 41.156631] MAX96706-SERDES 0-004c: des check <3>[ 41.276282] MAX96706-SERDES 0-004c: ser check <3>[ 41.546584] MAX96706-SERDES 0-004a: des check <3>[ 41.666284] MAX96706-SERDES 0-004a: ser check <3>[ 41.906585] MAX96706-SERDES 0-0048: des check <3>[ 42.026286] MAX96706-SERDES 0-0048: ser check <3>[ 44.329984] MAX96706-SERDES 0-004e: des check <3>[ 44.450332] MAX96706-SERDES 0-004e: ser check <3>[ 44.686843] MAX96706-SERDES 0-004c: des check <3>[ 44.806564] MAX96706-SERDES 0-004c: ser check <3>[ 45.050339] MAX96706-SERDES 0-004a: des check <3>[ 45.176324] MAX96706-SERDES 0-004a: ser check <3>[ 45.416582] MAX96706-SERDES 0-0048: des check <3>[ 45.546291] MAX96706-SERDES 0-0048: ser check <4>[ 57.036258] ------------[ cut here ]------------ <4>[ 57.036271] WARNING: CPU: 1 PID: 0 at net/sched/sch_generic.c:461 0xc0654580 <6>[ 57.036278] NETDEV WATCHDOG: eth0 (cpsw): transmit queue 0 timed out <4>[ 57.036283] Modules linked in: memcache(O) pvrsrvkm(O) rpmsg_proto virtio_rpmsg_bus rpmsg_core omap_remoteproc remoteproc sch_fq_codel <4>[ 57.036339] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G O 4.19.73 #1 <4>[ 57.036345] Hardware name: Generic DRA74X (Flattened Device Tree) <4>[ 57.036350] Backtrace: <4>[ 57.036362] Function entered at [] from [] dump_backtrace <4>[ 57.036373] r7:c08dde7c r6:60060113 r5:00000000 r4:c0b37fa4 <4>[ 57.036379] Function entered at [] from [] show_stack <4>[ 57.036385] Function entered at [] from [] dump_stack <4>[ 57.036395] r7:c08dde7c r6:00000009 r5:00000000 r4:ee8afd44 <4>[ 57.036401] Function entered at [] from [] __warn <4>[ 57.036410] r9:ffffffff r8:c0b03d00 r7:ee817294 r6:ee817000 r5:c08dde40 r4:c0b04c48 <4>[ 57.036416] Function entered at [] from [] <4>[ 57.036423] r3:ee817000 r2:c08dde40 <4>[ 57.036430] r5:ee8172a8 r4:00000000 <4>[ 57.036437] Function entered at [] from [] dev_watchdog <4>[ 57.036445] r10:00000001 r9:c0654328 r8:00000000 r7:00000200 r6:c0654328 r5:00000101 <4>[ 57.036451] r4:ffffe000 <4>[ 57.036456] Function entered at [] from [] call_timer_fn <4>[ 57.036464] r6:ee8afdfc r5:eed9e500 r4:ee8172a8 <4>[ 57.036469] Function entered at [] from [] expire_timers <4>[ 57.036477] r9:00000101 r8:c0b04c48 r7:c0b03d00 r6:ee8afdfc r5:eed9e500 r4:ee8afdfc <4>[ 57.036483] Function entered at [] from [] run_timer_softirq <4>[ 57.036491] r8:40000001 r7:ffffe000 r6:c0b03080 r5:c0b03084 r4:00000020 <4>[ 57.036496] Function entered at [] from [] __do_softirq <4>[ 57.036505] r10:c0a57330 r9:ee8ae000 r8:ee808000 r7:00000001 r6:00000000 r5:00000000 <4>[ 57.036510] r4:c0a57a7c <4>[ 57.036516] Function entered at [] from [] irq_exit <4>[ 57.036521] Function entered at [] from [] __handle_domain_irq <4>[ 57.036529] r9:ee8ae000 r8:fa213000 r7:ee8aff08 r6:fa212000 r5:fa21200c r4:c0b04ff0 <4>[ 57.036534] Function entered at [] from [] gic_handle_irq <4>[ 57.036540] Exception stack(0xee8aff08 to 0xee8aff50) <4>[ 57.036550] ff00: 00000000 00028070 fe600000 00000000 ffffe000 c0b04c74 <4>[ 57.036560] ff20: c0b04cbc 00000002 00000000 00000000 c0a57330 ee8aff64 ee8aff44 ee8aff58 <4>[ 57.036567] ff40: c0120564 c0108f7c 60060013 ffffffff <4>[ 57.036577] r9:ee8ae000 r8:00000000 r7:ee8aff3c r6:ffffffff r5:60060013 r4:c0108f7c <4>[ 57.036582] Function entered at [] from [] arch_cpu_idle <4>[ 57.036588] Function entered at [] from [] default_idle_call <4>[ 57.036593] Function entered at [] from [] do_idle <4>[ 57.036601] r10:00000000 r9:412fc0f2 r8:8000406a r7:c0b3a8c0 r6:00000001 r5:ee8ae000 <4>[ 57.036606] r4:00000087 <4>[ 57.036612] Function entered at [] from [] cpu_startup_entry <4>[ 57.036617] Function entered at [] from [<8010248c>] secondary_start_kernel <4>[ 57.036624] r7:c0b3a8c0 r6:10c0387d r5:00000051 r4:ae89c06a <4>[ 57.036630] ---[ end trace e86fbd7335069bfb ]--- <3>[ 68.366243] rcu: INFO: rcu_preempt self-detected stall on CPU <3>[ 68.366264] rcu: 0-...!: (2101 ticks this GP) idle=ab6/1/0x40000002 softirq=10587/10587 fqs=0 <3>[ 68.366269] rcu: (t=2101 jiffies g=7481 q=2482) <3>[ 68.366286] rcu: rcu_preempt kthread starved for 2101 jiffies! g7481 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=0 <3>[ 68.366291] rcu: RCU grace-period kthread stack dump: <6>[ 68.366297] rcu_preempt I 0 10 2 0x00000000 <4>[ 68.366309] Backtrace: <4>[ 68.366320] Function entered at [] from [] __schedule <4>[ 68.366331] r10:00000001 r9:c0b03d00 r8:c0b04c48 r7:ee8a1ecc r6:eed8e500 r5:eed8e500 <4>[ 68.366337] r4:ffffe000 <4>[ 68.366343] Function entered at [] from [] schedule <4>[ 68.366349] r5:eed8e500 r4:ffff9d51 <4>[ 68.366355] Function entered at [] from [] schedule_timeout <4>[ 68.366364] r9:00000005 r8:c0b175c0 r7:c0b03d00 r6:c0b17758 r5:ee8a0000 r4:00000001 <4>[ 68.366370] Function entered at [] from [] rcu_gp_kthread <4>[ 68.366375] r7:ee8a0000 <4>[ 68.366381] Function entered at [] from [] kthread <4>[ 68.366388] Exception stack(0xee8a1fb0 to 0xee8a1ff8) <4>[ 68.366396] 1fa0: 00000000 00000000 00000000 00000000 <4>[ 68.366404] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <4>[ 68.366413] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 <4>[ 68.366422] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0149cd0 <4>[ 68.366427] r4:ee886100 <4>[ 68.366439] NMI backtrace for cpu 0 <4>[ 68.366449] CPU: 0 PID: 500 Comm: apps.out Tainted: G W O 4.19.73 #1 <4>[ 68.366454] Hardware name: Generic DRA74X (Flattened Device Tree) <4>[ 68.366458] Backtrace: <4>[ 68.366468] Function entered at [] from [] dump_backtrace <4>[ 68.366476] r7:00000000 r6:60010193 r5:00000000 r4:c0b37fa4 <4>[ 68.366482] Function entered at [] from [] show_stack <4>[ 68.366487] Function entered at [] from [] dump_stack <4>[ 68.366495] r7:00000000 r6:00000000 r5:00000000 r4:00000000 <4>[ 68.366500] Function entered at [] from [] nmi_cpu_backtrace <4>[ 68.366506] r5:c0b07e68 r4:c010e2fc <4>[ 68.366511] Function entered at [] from [] nmi_trigger_cpumask_backtrace <4>[ 68.366519] r9:00000140 r8:c0b175c0 r7:c0802da0 r6:c0b04c7c r5:c0b04d0c r4:c0b175c0 <4>[ 68.366525] Function entered at [] from [] arch_trigger_cpumask_backtrace <4>[ 68.366531] Function entered at [] from [] rcu_dump_cpu_stacks <4>[ 68.366539] r10:c0b04d00 r9:c0b175c0 r8:c0b04c7c r7:2e33a000 r6:eed92740 r5:c0a58740 <4>[ 68.366544] r4:c0b175c0 <4>[ 68.366549] Function entered at [] from [] rcu_check_callbacks <4>[ 68.366557] r10:20010193 r9:c01ad128 r8:00000000 r7:0000000f r6:00000000 r5:ed25bcc0 <4>[ 68.366561] r4:ffffe000 <4>[ 68.366567] Function entered at [] from [] update_process_times <4>[ 68.366574] r7:0000000f r6:ea92dab9 r5:ecca5e90 r4:eed8f908 <4>[ 68.366579] Function entered at [] from [] tick_sched_handle <4>[ 68.366584] Function entered at [] from [] tick_sched_timer <4>[ 68.366591] r7:eed8f600 r6:eed8f600 r5:eed8f908 r4:eed8f640 <4>[ 68.366596] Function entered at [] from [] __hrtimer_run_queues <4>[ 68.366604] r10:eed8f750 r9:eed8f780 r8:ffffffff r7:7fffffff r6:00000003 r5:20010193 <4>[ 68.366609] r4:eed8f600 <4>[ 68.366615] Function entered at [] from [] hrtimer_interrupt <4>[ 68.366623] r10:ed01c390 r9:ecca4000 r8:ee808000 r7:ee8611c0 r6:00000013 r5:c0b04ff0 <4>[ 68.366628] r4:ee807b00 <4>[ 68.366633] Function entered at [] from [] arch_timer_handler_phys <4>[ 68.366638] Function entered at [] from [] handle_percpu_devid_irq <4>[ 68.366645] r7:00000001 r6:00000000 r5:00000000 r4:c0a57a7c <4>[ 68.366650] Function entered at [] from [] generic_handle_irq <4>[ 68.366655] Function entered at [] from [] __handle_domain_irq <4>[ 68.366663] r9:ecca4000 r8:fa213000 r7:ecca5e90 r6:fa212000 r5:fa21200c r4:c0b04ff0 <4>[ 68.366668] Function entered at [] from [] gic_handle_irq <4>[ 68.366674] Exception stack(0xecca5e90 to 0xecca5ed8) <4>[ 68.366682] 5e80: edb709c0 00000021 3215ebcb 8d1d1354 <4>[ 68.366691] 5ea0: c0b04c48 8d1d1354 edb709c0 00000021 8d1d1354 ecca4000 ed01c390 ecca5f6c <4>[ 68.366699] 5ec0: 401c6440 ecca5ee0 0000545e c0250004 20010013 ffffffff <4>[ 68.366708] r9:ecca4000 r8:8d1d1354 r7:ecca5ec4 r6:ffffffff r5:20010013 r4:c0250004 <4>[ 68.366713] Function entered at [] from [] do_vfs_ioctl <4>[ 68.366721] r10:00000036 r9:ecca4000 r8:8d1d1354 r7:401c6440 r6:00000021 r5:edb709c0 <4>[ 68.366726] r4:edb709c1 <4>[ 68.366731] Function entered at [] from [] ksys_ioctl <4>[ 68.366739] r9:ecca4000 r8:c0101204 r7:00000036 r6:401c6440 r5:8d1d1354 r4:c01c675a <4>[ 68.366744] Function entered at [] from [] sys_ioctl <4>[ 68.366749] Exception stack(0xecca5fa8 to 0xecca5ff0) <4>[ 68.366758] 5fa0: c01c675a 8d1d1354 00000021 401c6440 8d1d1354 0000001c <4>[ 68.366767] 5fc0: c01c675a 8d1d1354 401c6440 00000036 8d1d138c 8d1d1394 8d1d1398 0016d3a0 <4>[ 68.366774] 5fe0: b6e05094 8d1d132c b6df019b b525015c + +Responses: +Hi, Which SDK version are you using? Could you please share the logs after you execute the reboot command? Best Regards, Keerthy + +Hi, sdk version is Version 03.06.00, log is : <6>[ 0.000000] Booting Linux on physical CPU 0x0 <5>[ 0.000000] Linux version 4.19.73 (root@ee38b2a1af63) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Tue Nov 8 20:05:35 CST 2022 <6>[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d <6>[ 0.000000] CPU: div instructions available: patching division code <6>[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache <6>[ 0.000000] OF: fdt: Machine model: TI DRA742 <6>[ 0.000000] bootconsole [earlycon0] enabled <6>[ 0.000000] Memory policy: Data cache writealloc <6>[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB <6>[ 0.000000] OF: reserved mem: initialized node cmem@40300000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool <3>[ 0.000000] Reserved memory: regions without no-map are not yet supported <6>[ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 32 MiB <6>[ 0.000000] OF: reserved mem: initialized node cmem@A9000000, compatible id shared-dma-pool <6>[ 0.000000] Reserved memory: created CMA memory pool at 0xb0000000, size 128 MiB <6>[ 0.000000] OF: reserved mem: initialized node gpu-memory@c0000000, compatible id shared-dma-pool <6>[ 0.000000] cma: Reserved 64 MiB at 0xfac00000 <6>[ 0.000000] OMAP4: Map 0xfee00000 to (ptrval) for dram barrier <7>[ 0.000000] On node 0 totalpages: 511488 <7>[ 0.000000] Normal zone: 1728 pages used for memmap <7>[ 0.000000] Normal zone: 0 pages reserved <7>[ 0.000000] Normal zone: 188416 pages, LIFO batch:63 <7>[ 0.000000] HighMem zone: 323072 pages, LIFO batch:63 <6>[ 0.000000] DRA752 ES2.0 <5>[ 0.000000] random: get_random_bytes called from 0xc0a009d4 with crng_init=0 <6>[ 0.000000] percpu: Embedded 16 pages/cpu s35852 r8192 d21492 u65536 <7>[ 0.000000] pcpu-alloc: s35852 r8192 d21492 u65536 alloc=16*4096 <7>[ 0.000000] pcpu-alloc: [0] 0 [0] 1 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 509760 <5>[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk1p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1 loglevel=0 clk_ignore_unused <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) <6>[ 0.000000] Memory: 1213032K/2045952K available (7168K kernel code, 233K rwdata, 1188K rodata, 1024K init, 234K bss, 538008K reserved, 294912K cma-reserved, 1095680K highmem) <5>[ 0.000000] Virtual kernel memory layout: <5>[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) <5>[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) <5>[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) <5>[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) <5>[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) <5>[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) <5>[ 0.000000] .text : 0x(ptrval) - 0x(ptrval) (8160 kB) <5>[ 0.000000] .init : 0x(ptrval) - 0x(ptrval) (1024 kB) <5>[ 0.000000] .data : 0x(ptrval) - 0x(ptrval) ( 234 kB) <5>[ 0.000000] .bss : 0x(ptrval) - 0x(ptrval) ( 235 kB) <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation. <6>[ 0.000000] Tasks RCU enabled. <6>[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 <6>[ 0.000000] GIC: Using split EOI/Deactivate mode <6>[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz <6>[ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns <6>[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns <6>[ 0.000014] Switching to timer-based delay loop, resolution 162ns <6>[ 0.000281] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns <6>[ 0.000286] OMAP clocksource: 32k_counter at 32768 Hz <3>[ 0.000712] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' <3>[ 0.000717] This ensures that you still see kernel messages. Please <3>[ 0.000721] update your kernel commandline. <6>[ 0.000748] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) <6>[ 0.000762] pid_max: default: 32768 minimum: 301 <6>[ 0.000869] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>[ 0.000880] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) <6>[ 0.001402] CPU: Testing write buffer coherency: ok <6>[ 0.001435] CPU0: Spectre v2: using ICIALLU workaround <3>[ 0.001639] /cpus/cpu@0 missing clock-frequency property <3>[ 0.001653] /cpus/cpu@1 missing clock-frequency property <6>[ 0.001662] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 <6>[ 0.059924] Setting up static identity map for 0x80100000 - 0x80100060 <6>[ 0.079928] rcu: Hierarchical SRCU implementation. <6>[ 0.119987] smp: Bringing up secondary CPUs ... <6>[ 0.200313] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 <6>[ 0.200319] CPU1: Spectre v2: using ICIALLU workaround <6>[ 0.200417] smp: Brought up 1 node, 2 CPUs <6>[ 0.200426] SMP: Total of 2 processors activated (24.59 BogoMIPS). <6>[ 0.200431] CPU: All CPU(s) started in HYP mode. <6>[ 0.200436] CPU: Virtualization extensions available. <6>[ 0.201639] devtmpfs: initialized <6>[ 0.219210] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 <6>[ 0.219426] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns <6>[ 0.219440] futex hash table entries: 512 (order: 3, 32768 bytes) <6>[ 0.223697] pinctrl core: initialized pinctrl subsystem <6>[ 0.224471] NET: Registered protocol family 16 <6>[ 0.225684] DMA: preallocated 256 KiB pool for atomic coherent allocations <4>[ 0.226484] omap_hwmod: l3_main_2 using broken dt data from ocp <6>[ 0.403690] cpuidle: using governor ladder <6>[ 0.403721] cpuidle: using governor menu <6>[ 0.412455] OMAP GPIO hardware version 0.1 <6>[ 0.432485] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. <6>[ 0.432491] hw-breakpoint: maximum watchpoint size is 8 bytes. <4>[ 0.432979] omap4_sram_init:Unable to allocate sram needed to handle errata I688 <4>[ 0.432986] omap4_sram_init:Unable to get sram pool needed to handle errata I688 <6>[ 0.433517] OMAP DMA hardware revision 0.0 <6>[ 0.441780] edma 43300000.edma: memcpy is disabled <6>[ 0.445043] edma 43300000.edma: TI EDMA DMA engine driver <6>[ 0.451858] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) <6>[ 0.453443] evm_3v3: supplied by evm_12v0 <6>[ 0.453723] evm_5v0: supplied by evm_12v0 <6>[ 0.454011] evm_3v6: supplied by evm_5v0 <6>[ 0.456506] omap-iommu 40d01000.mmu: 40d01000.mmu registered <6>[ 0.456666] omap-iommu 40d02000.mmu: 40d02000.mmu registered <6>[ 0.456904] omap-iommu 58882000.mmu: 58882000.mmu registered <6>[ 0.457123] omap-iommu 55082000.mmu: 55082000.mmu registered <6>[ 0.457461] omap-iommu 41501000.mmu: 41501000.mmu registered <6>[ 0.457625] omap-iommu 41502000.mmu: 41502000.mmu registered <6>[ 0.457879] iommu: Adding device 58820000.ipu to group 1 <6>[ 0.457950] iommu: Adding device 55020000.ipu to group 2 <6>[ 0.458065] iommu: Adding device 40800000.dsp to group 0 <6>[ 0.458255] iommu: Adding device 41000000.dsp to group 3 <5>[ 0.459278] SCSI subsystem initialized <4>[ 0.460404] palmas 0-0058: IRQ missing: skipping irq request <6>[ 0.480808] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 <6>[ 0.482184] SMPS12: supplied by regulator-dummy <6>[ 0.483196] SMPS3: supplied by regulator-dummy <6>[ 0.484602] SMPS45: supplied by regulator-dummy <6>[ 0.486442] SMPS6: supplied by regulator-dummy <6>[ 0.488127] SMPS7: supplied by regulator-dummy <6>[ 0.489976] SMPS8: supplied by regulator-dummy <6>[ 0.491692] SMPS9: supplied by regulator-dummy <6>[ 0.492664] LDO1: supplied by regulator-dummy <6>[ 0.501295] LDO2: supplied by regulator-dummy <6>[ 0.511163] LDO3: supplied by regulator-dummy <6>[ 0.521169] LDO4: supplied by regulator-dummy <5>[ 0.521349] random: fast init done <6>[ 0.521909] LDO5: supplied by regulator-dummy <6>[ 0.522631] LDO6: supplied by regulator-dummy <6>[ 0.523340] LDO7: supplied by regulator-dummy <6>[ 0.524053] LDO8: supplied by regulator-dummy <6>[ 0.524780] LDO9: supplied by regulator-dummy <6>[ 0.531208] LDOLN: supplied by regulator-dummy <6>[ 0.541228] LDOUSB: supplied by regulator-dummy <6>[ 0.554013] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz <6>[ 0.554192] media: Linux media interface: v0.10 <6>[ 0.554226] videodev: Linux video capture interface: v2.00 <6>[ 0.554294] pps_core: LinuxPPS API ver. 1 registered <6>[ 0.554300] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <6>[ 0.554323] PTP clock support registered <6>[ 0.554327] EDAC MC: Ver: 3.0.0 <6>[ 0.554952] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 <6>[ 0.555182] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 <6>[ 0.556249] clocksource: Switched to clocksource arch_sys_counter <6>[ 0.557931] NET: Registered protocol family 2 <6>[ 0.558484] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes) <6>[ 0.558509] TCP established hash table entries: 8192 (order: 3, 32768 bytes) <6>[ 0.558569] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) <6>[ 0.558691] TCP: Hash tables configured (established 8192 bind 8192) <6>[ 0.558758] UDP hash table entries: 512 (order: 2, 16384 bytes) <6>[ 0.558789] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) <6>[ 0.558915] NET: Registered protocol family 1 <4>[ 0.559995] hw perfevents: no interrupt-affinity property for /pmu, guessing. <6>[ 0.560169] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available <6>[ 0.561259] workingset: timestamp_bits=14 max_order=19 bucket_order=5 <6>[ 0.565489] squashfs: version 4.0 (2009/01/31) Phillip Lougher <6>[ 0.566927] bounce: pool size: 64 pages <6>[ 0.566958] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) <6>[ 0.566965] io scheduler noop registered (default) <6>[ 0.566972] io scheduler deadline registered <6>[ 0.567061] io scheduler cfq registered <6>[ 0.567068] io scheduler mq-deadline registered <6>[ 0.567074] io scheduler kyber registered <6>[ 0.569929] pinctrl-single 4a003400.pinmux: 282 pins, size 1128 <6>[ 0.573009] evm_1v8: supplied by smps9 <6>[ 0.573248] evm_3v3_sw: supplied by sysen1 <6>[ 0.573468] aic_dvdd: supplied by evm_3v3_sw <6>[ 0.573549] vtt_fixed: supplied by sysen2 <6>[ 0.575074] Serial: 8250/16550 driver, 3 ports, IRQ sharing enabled <6>[ 0.576367] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 43, base_baud = 3000000) is a 8250 <6>[ 0.576442] console [ttyS0] enabled <6>[ 0.576448] bootconsole [earlycon0] disabled <6>[ 0.576943] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 44, base_baud = 3000000) is a 8250 <6>[ 0.578894] omap_rng 48090000.rng: Random Number Generator ver. 20 <6>[ 0.584731] brd: module loaded <5>[ 0.585311] random: crng init done <6>[ 0.591298] loop: module loaded <6>[ 0.591371] vmemexp device MAJOR num = 246 <6>[ 0.591389] vmemexp class registered <6>[ 0.591486] /dev/vmemexp device registered <6>[ 0.591492] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 <4>[ 0.593350] m25p80 spi0.0: found n25q512ax3, expected s25fl256s1 <6>[ 0.593524] m25p80 spi0.0: n25q512ax3 (65536 Kbytes) <5>[ 0.593590] 7 fixed-partitions partitions found on MTD device spi0.0 <5>[ 0.593596] Creating 7 MTD partitions on "spi0.0": <5>[ 0.593605] 0x000000000000-0x000000040000 : "QSPI.SPL" <5>[ 0.594275] 0x000000040000-0x000000140000 : "QSPI.u-boot" <5>[ 0.594898] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" <5>[ 0.595527] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" <5>[ 0.596167] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" <5>[ 0.596819] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" <5>[ 0.597419] 0x0000009e0000-0x000002000000 : "QSPI.file-system" <6>[ 0.598373] libphy: Fixed MDIO Bus: probed <6>[ 0.598680] CAN device driver interface <6>[ 0.599572] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=446859ab, irq=84) <6>[ 0.656277] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 <6>[ 0.656285] davinci_mdio 48485000.mdio: detected phy mask fffffff7 <6>[ 0.658679] libphy: 48485000.mdio: probed <6>[ 0.658690] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown <6>[ 0.659672] cpsw 48484000.ethernet: Detected MACID = cc:33:31:60:c6:4e <6>[ 0.659718] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 <6>[ 0.659725] cpsw 48484000.ethernet: ALE Table size 1024 <6>[ 0.659760] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) <7>[ 0.661914] omap_rtc 48838000.rtc: char device (253:0) <6>[ 0.661927] omap_rtc 48838000.rtc: registered as rtc0 <6>[ 0.662292] i2c /dev entries driver <6>[ 0.662673] MAX96706-SERDES 0-0048: max96706 i2c addr 0x48 <7>[ 0.662752] MAX96706-SERDES 0-0048: Got serializer_node property serializer_adapter_default <6>[ 0.662959] MAX96706-SERDES 0-004a: max96706 i2c addr 0x4a <7>[ 0.662998] MAX96706-SERDES 0-004a: Got serializer_node property serializer_adapter_default <6>[ 0.663173] MAX96706-SERDES 0-004c: max96706 i2c addr 0x4c <7>[ 0.663211] MAX96706-SERDES 0-004c: Got serializer_node property serializer_adapter_default <6>[ 0.663391] MAX96706-SERDES 0-004e: max96706 i2c addr 0x4e <7>[ 0.663431] MAX96706-SERDES 0-004e: Got serializer_node property serializer_adapter_default <6>[ 0.666140] sdhci: Secure Digital Host Controller Interface driver <6>[ 0.666146] sdhci: Copyright(c) Pierre Ossman <6>[ 0.666976] sdhci-pltfm: SDHCI platform and OF driver helper <6>[ 0.668091] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) <6>[ 0.668098] sdhci-omap 4809c000.mmc: Got CD GPIO <6>[ 0.668277] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.33 <6>[ 0.668538] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.18 <6>[ 0.668618] sdhci-omap 4809c000.mmc: Dropping the link to regulator.18 <6>[ 0.668699] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.3 <6>[ 0.668920] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.18 <3>[ 0.669063] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_1_8v mode <3>[ 0.669072] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_3_3v mode <3>[ 0.669080] sdhci-omap 4809c000.mmc: no pinctrl state for hs200_1_8v mode <6>[ 0.695431] mmc0: SDHCI controller on 4809c000.mmc [4809c000.mmc] using ADMA <6>[ 0.696092] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 <6>[ 0.696152] sdhci-omap 480b4000.mmc: Dropping the link to regulator.2 <6>[ 0.696228] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 <6>[ 0.721864] mmc1: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA <6>[ 0.724332] NET: Registered protocol family 10 <6>[ 0.735137] Segment Routing with IPv6 <6>[ 0.735198] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver <6>[ 0.735660] NET: Registered protocol family 17 <6>[ 0.735673] can: controller area network core (rev 20170425 abi 9) <6>[ 0.735791] NET: Registered protocol family 29 <6>[ 0.735806] can: raw protocol (rev 20170425) <6>[ 0.735812] can: broadcast manager protocol (rev 20170425 t) <6>[ 0.735823] can: netlink gateway (rev 20170425) max_hops=1 <5>[ 0.736062] Registering SWP/SWPB emulation handler <3>[ 0.736070] omap_voltage_late_init: Voltage driver support not added <6>[ 0.736075] Power Management for TI OMAP4+ devices. <6>[ 0.761696] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). <6>[ 0.761702] [drm] No driver support for vblank timestamp query. <6>[ 0.762016] [drm] Initialized vdrm 1.0.0 20191105 for 44000000.ocp:vdrm@0 on minor 0 <6>[ 0.767766] vdrm 44000000.ocp:vdrm@0: fb0: DRM emulated frame buffer device <6>[ 0.768216] dmm 4e000000.dmm: workaround for errata i878 in use <6>[ 0.769816] dmm 4e000000.dmm: initialized all PAT entries <6>[ 0.770568] ti-iodelay 4844a000.padconf: Set reg 0x190 Delay(a: 274 g: 0), Elements(C=0 F=8)0x29008 <6>[ 0.770580] ti-iodelay 4844a000.padconf: Set reg 0x194 Delay(a: 162 g: 0), Elements(C=0 F=5)0x29005 <6>[ 0.770591] ti-iodelay 4844a000.padconf: Set reg 0x1a8 Delay(a: 401 g: 0), Elements(C=0 F=12)0x2900c <6>[ 0.770601] ti-iodelay 4844a000.padconf: Set reg 0x1ac Delay(a: 73 g: 0), Elements(C=0 F=2)0x29002 <6>[ 0.770610] ti-iodelay 4844a000.padconf: Set reg 0x1b4 Delay(a: 465 g: 0), Elements(C=1 F=0)0x29020 <6>[ 0.770620] ti-iodelay 4844a000.padconf: Set reg 0x1b8 Delay(a: 115 g: 0), Elements(C=0 F=3)0x29003 <6>[ 0.770629] ti-iodelay 4844a000.padconf: Set reg 0x1c0 Delay(a: 633 g: 0), Elements(C=1 F=5)0x29025 <6>[ 0.770638] ti-iodelay 4844a000.padconf: Set reg 0x1c4 Delay(a: 47 g: 0), Elements(C=0 F=1)0x29001 <6>[ 0.770648] ti-iodelay 4844a000.padconf: Set reg 0x1d0 Delay(a: 935 g: 280), Elements(C=2 F=6)0x29046 <6>[ 0.770657] ti-iodelay 4844a000.padconf: Set reg 0x1d8 Delay(a: 621 g: 0), Elements(C=1 F=5)0x29025 <6>[ 0.770666] ti-iodelay 4844a000.padconf: Set reg 0x1dc Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770675] ti-iodelay 4844a000.padconf: Set reg 0x1e4 Delay(a: 183 g: 0), Elements(C=0 F=5)0x29005 <6>[ 0.770684] ti-iodelay 4844a000.padconf: Set reg 0x1e8 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770693] ti-iodelay 4844a000.padconf: Set reg 0x1f0 Delay(a: 467 g: 0), Elements(C=1 F=0)0x29020 <6>[ 0.770703] ti-iodelay 4844a000.padconf: Set reg 0x1f4 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 <6>[ 0.770712] ti-iodelay 4844a000.padconf: Set reg 0x1fc Delay(a: 262 g: 0), Elements(C=0 F=8)0x29008 <6>[ 0.770721] ti-iodelay 4844a000.padconf: Set reg 0x200 Delay(a: 46 g: 0), Elements(C=0 F=1)0x29001 <6>[ 0.770730] ti-iodelay 4844a000.padconf: Set reg 0x364 Delay(a: 684 g: 0), Elements(C=1 F=7)0x29027 <6>[ 0.770739] ti-iodelay 4844a000.padconf: Set reg 0x368 Delay(a: 76 g: 0), Elements(C=0 F=2)0x29002 <6>[ 0.770922] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 1 <6>[ 0.773158] omap_rtc 48838000.rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800) <6>[ 0.773278] mmc1: new HS200 MMC card at address 0001 <6>[ 0.773927] mmcblk1: mmc1:0001 BGUF4R 29.1 GiB <6>[ 0.774283] mmcblk1boot0: mmc1:0001 BGUF4R partition 1 31.9 MiB <6>[ 0.774627] mmcblk1boot1: mmc1:0001 BGUF4R partition 2 31.9 MiB <6>[ 0.774776] mmcblk1rpmb: mmc1:0001 BGUF4R partition 3 4.00 MiB, chardev (240:0) <4>[ 0.775647] clk: Not disabling unused clocks <6>[ 0.775798] evm_3v3_sd: disabling <6>[ 0.775805] aic_dvdd: disabling <6>[ 0.775814] vmmcwl_fixed: disabling <6>[ 0.775972] mmcblk1: p1 p2 p3 p4 < p5 p6 > <6>[ 0.778680] ldousb: disabling <6>[ 0.783832] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) <6>[ 0.783866] VFS: Mounted root (ext4 filesystem) on device 179:2. <6>[ 0.784163] devtmpfs: error mounting -2 <6>[ 0.784858] Freeing unused kernel memory: 1024K <6>[ 0.784968] Run /sbin/init as init process <30>[ 0.867283] systemd[1]: systemd 239 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid) <30>[ 0.867710] systemd[1]: Detected architecture arm. <30>[ 0.906641] systemd[1]: Set hostname to . <30>[ 0.908173] systemd[1]: Initializing machine ID from random generator. <28>[ 1.006852] systemd[1]: File /lib/systemd/system/systemd-journald.service:36 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. <28>[ 1.006868] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) <28>[ 1.090405] systemd[1]: Configuration file /lib/systemd/system/pcbtest.service is marked executable. Please remove executable permission bits. Proceeding anyway. <28>[ 1.105326] systemd[1]: Configuration file /lib/systemd/system/autoboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. <30>[ 1.170540] systemd[1]: Started Forward Password Requests to Wall Directory Watch. <30>[ 1.206783] systemd[1]: Listening on Journal Socket (/dev/log). <6>[ 1.644024] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) <46>[ 2.306582] systemd-journald[85]: Received request to flush runtime journal from PID 1 <4>[ 3.777572] omap-rproc 58820000.ipu: ignoring dependency for device, assuming no driver <3>[ 3.777681] omap-rproc 58820000.ipu: device does not have specific CMA pool <6>[ 3.777699] remoteproc remoteproc0: releasing 58820000.ipu <4>[ 3.777743] omap-rproc: probe of 58820000.ipu failed with error -22 <4>[ 3.777790] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver <4>[ 3.777908] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver <6>[ 3.777917] omap-rproc 55020000.ipu: assigned reserved memory node ipu2-memory@95800000 <6>[ 3.778027] remoteproc remoteproc0: 55020000.ipu is available <4>[ 3.781336] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver <4>[ 3.781503] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver <6>[ 3.781515] omap-rproc 40800000.dsp: assigned reserved memory node dsp1-memory@99000000 <6>[ 3.781657] remoteproc remoteproc1: 40800000.dsp is available <4>[ 3.783026] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver <4>[ 3.783153] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver <6>[ 3.783162] omap-rproc 41000000.dsp: assigned reserved memory node dsp2-memory@9f000000 <6>[ 3.783255] remoteproc remoteproc2: 41000000.dsp is available <6>[ 3.814744] remoteproc remoteproc2: powering up 41000000.dsp <6>[ 3.814764] remoteproc remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 1850052 <6>[ 3.814887] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 <6>[ 3.814923] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 <6>[ 3.816579] remoteproc remoteproc1: powering up 40800000.dsp <6>[ 3.816601] remoteproc remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 1850052 <6>[ 3.816718] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 <6>[ 3.816774] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 <6>[ 3.995997] remoteproc remoteproc0: powering up 55020000.ipu <6>[ 3.996015] remoteproc remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 8720836 <6>[ 3.996109] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 <6>[ 4.063665] remoteproc remoteproc2: registered virtio0 (type 7) <6>[ 4.063676] remoteproc remoteproc2: remote processor 41000000.dsp is now up <6>[ 4.155724] remoteproc remoteproc1: registered virtio1 (type 7) <6>[ 4.155735] remoteproc remoteproc1: remote processor 40800000.dsp is now up <3>[ 4.370962] MAX96706-SERDES 0-0048: serializer 5610fbb7 regmap 332fb959 <6>[ 4.388881] remoteproc remoteproc0: registered virtio2 (type 7) <6>[ 4.388893] remoteproc remoteproc0: remote processor 55020000.ipu is now up <6>[ 4.597199] net eth0: initializing cpsw version 1.15 (0) <6>[ 4.599330] Generic PHY fixed-0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=POLL) <3>[ 4.599560] net eth0: could not add device link to fixed-0:01 err -17 <6>[ 4.599575] Generic PHY fixed-0:01: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:01, irq=POLL) <6>[ 4.634395] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready <6>[ 5.483959] virtio_rpmsg_bus virtio0: rpmsg host is online <6>[ 5.484521] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 <6>[ 5.484891] virtio_rpmsg_bus virtio1: rpmsg host is online <6>[ 5.485593] virtio_rpmsg_bus virtio2: rpmsg host is online <6>[ 5.494521] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 <6>[ 5.545178] NET: Registered protocol family 45 <6>[ 5.669113] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 <6>[ 5.676333] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off <6>[ 5.676346] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off <6>[ 5.676386] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready <4>[ 5.730729] pvrsrvkm: loading out-of-tree module taints kernel. <6>[ 5.759739] pvrsrvkm 56000000.gpu: assigned reserved memory node gpu-memory@c0000000 <6>[ 5.806657] [drm] Initialized pvr 1.17.4948957 20110701 for 56000000.gpu on minor 2 <6>[ 5.826842] PVR_K: UM DDK-(4948957) and KM DDK-(4948957) match. [ OK ] <6>[ 6.700290] DMA: Module install successful, device major num = 239 <6>[ 6.700297] DRV: Module install successful <6>[ 6.757491] c_can_platform 4ae3c000.can can0: setting BTR=0504 BRPE=0000 <6>[ 6.757626] IPv6: ADDRCONF(NETDEV_UP): can0: link is not ready <6>[ 6.757727] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready <6>[ 6.796181] EXT4-fs (mmcblk1p5): recovery complete <6>[ 6.796199] EXT4-fs (mmcblk1p5): mounted filesystem with ordered data mode. Opts: (null) <6>[ 6.841114] EXT4-fs (mmcblk1p6): recovery complete <6>[ 6.841132] EXT4-fs (mmcblk1p6): mounted filesystem with ordered data mode. Opts: (null) <6>[ 7.016323] MAX96705-SERDES 0-0040: Warning: ser power good is low <6>[ 7.227268] EXT4-fs (mmcblk1p3): recovery complete <6>[ 7.227742] EXT4-fs (mmcblk1p3): mounted filesystem with ordered data mode. Opts: (null) <6>[ 7.283301] device eth0 entered promiscuous mode <3>[ 7.316607] MAX96706-SERDES 0-004e: set ser <3>[ 8.636291] omap_i2c 48070000.i2c: controller timed out <3>[ 8.666295] MAX96706-SERDES 0-004e: turn off rcc failed after ser config <3>[ 8.696587] MAX96706-SERDES 0-004c: set ser <3>[ 10.077402] omap_i2c 48070000.i2c: controller timed out <3>[ 10.106342] MAX96706-SERDES 0-004c: turn off rcc failed after ser config <3>[ 10.137671] MAX96706-SERDES 0-004a: set ser <3>[ 11.516298] omap_i2c 48070000.i2c: controller timed out <3>[ 11.546317] MAX96706-SERDES 0-004a: turn off rcc failed after ser config <3>[ 11.576588] MAX96706-SERDES 0-0048: set ser <3>[ 12.956293] omap_i2c 48070000.i2c: controller timed out <3>[ 12.986305] MAX96706-SERDES 0-0048: turn off rcc failed after ser config <3>[ 12.986317] MAX96706-SERDES 0-004e: des check <3>[ 13.106300] MAX96706-SERDES 0-004c: des check <3>[ 13.196362] MAX96706-SERDES 0-004a: des check <3>[ 13.286443] MAX96706-SERDES 0-0048: des check <3>[ 15.671358] cma: cma_alloc: alloc failed, req-size: 12540 pages, ret: -12 <6>[ 15.671377] PVR_K:(Error): NewAllocCmaLinuxMemArea: failed <3>[ 15.919542] MAX96706-SERDES 0-004e: des check <3>[ 16.106332] MAX96706-SERDES 0-004e: ser check <4>[ 16.177005] hrtimer: interrupt took 176006 ns <3>[ 16.371321] MAX96706-SERDES 0-004c: des check <3>[ 16.486400] MAX96706-SERDES 0-004c: ser check <3>[ 16.730009] MAX96706-SERDES 0-004a: des check <3>[ 16.846397] MAX96706-SERDES 0-004a: ser check <3>[ 17.090769] MAX96706-SERDES 0-0048: des check <3>[ 17.206397] MAX96706-SERDES 0-0048: ser check <3>[ 19.529682] MAX96706-SERDES 0-004e: des check <3>[ 19.646423] MAX96706-SERDES 0-004e: ser check <3>[ 19.890867] MAX96706-SERDES 0-004c: des check <3>[ 20.006397] MAX96706-SERDES 0-004c: ser check <3>[ 20.256590] MAX96706-SERDES 0-004a: des check <3>[ 20.376295] MAX96706-SERDES 0-004a: ser check <3>[ 20.616574] MAX96706-SERDES 0-0048: des check <3>[ 20.736336] MAX96706-SERDES 0-0048: ser check <3>[ 23.036299] MAX96706-SERDES 0-004e: des check <3>[ 23.156304] MAX96706-SERDES 0-004e: ser check <3>[ 23.396561] MAX96706-SERDES 0-004c: des check <3>[ 23.516320] MAX96706-SERDES 0-004c: ser check <3>[ 23.756566] MAX96706-SERDES 0-004a: des check <3>[ 23.876293] MAX96706-SERDES 0-004a: ser check <3>[ 24.116557] MAX96706-SERDES 0-0048: des check <3>[ 24.236316] MAX96706-SERDES 0-0048: ser check <3>[ 26.556313] MAX96706-SERDES 0-004e: des check <3>[ 26.690007] MAX96706-SERDES 0-004e: ser check <3>[ 26.946593] MAX96706-SERDES 0-004c: des check <3>[ 27.066295] MAX96706-SERDES 0-004c: ser check <3>[ 27.306572] MAX96706-SERDES 0-004a: des check <3>[ 27.426293] MAX96706-SERDES 0-004a: ser check <3>[ 27.676557] MAX96706-SERDES 0-0048: des check <3>[ 27.816334] MAX96706-SERDES 0-0048: ser check <3>[ 30.156302] MAX96706-SERDES 0-004e: des check <3>[ 30.276312] MAX96706-SERDES 0-004e: ser check <3>[ 30.516569] MAX96706-SERDES 0-004c: des check <3>[ 30.636298] MAX96706-SERDES 0-004c: ser check <3>[ 30.876588] MAX96706-SERDES 0-004a: des check <3>[ 31.006470] MAX96706-SERDES 0-004a: ser check <3>[ 31.250994] MAX96706-SERDES 0-0048: des check <3>[ 31.366364] MAX96706-SERDES 0-0048: ser check <3>[ 33.676308] MAX96706-SERDES 0-004e: des check <3>[ 33.796286] MAX96706-SERDES 0-004e: ser check <3>[ 34.036568] MAX96706-SERDES 0-004c: des check <3>[ 34.156342] MAX96706-SERDES 0-004c: ser check <3>[ 34.396566] MAX96706-SERDES 0-004a: des check <3>[ 34.536317] MAX96706-SERDES 0-004a: ser check <3>[ 34.776588] MAX96706-SERDES 0-0048: des check <3>[ 34.906329] MAX96706-SERDES 0-0048: ser check <3>[ 37.196337] MAX96706-SERDES 0-004e: des check <3>[ 37.329777] MAX96706-SERDES 0-004e: ser check <3>[ 37.610184] MAX96706-SERDES 0-004c: des check <3>[ 37.729870] MAX96706-SERDES 0-004c: ser check <3>[ 37.986593] MAX96706-SERDES 0-004a: des check <3>[ 38.116316] MAX96706-SERDES 0-004a: ser check <3>[ 38.356602] MAX96706-SERDES 0-0048: des check <3>[ 38.476307] MAX96706-SERDES 0-0048: ser check <3>[ 40.796312] MAX96706-SERDES 0-004e: des check <3>[ 40.916309] MAX96706-SERDES 0-004e: ser check <3>[ 41.156631] MAX96706-SERDES 0-004c: des check <3>[ 41.276282] MAX96706-SERDES 0-004c: ser check <3>[ 41.546584] MAX96706-SERDES 0-004a: des check <3>[ 41.666284] MAX96706-SERDES 0-004a: ser check <3>[ 41.906585] MAX96706-SERDES 0-0048: des check <3>[ 42.026286] MAX96706-SERDES 0-0048: ser check <3>[ 44.329984] MAX96706-SERDES 0-004e: des check <3>[ 44.450332] MAX96706-SERDES 0-004e: ser check <3>[ 44.686843] MAX96706-SERDES 0-004c: des check <3>[ 44.806564] MAX96706-SERDES 0-004c: ser check <3>[ 45.050339] MAX96706-SERDES 0-004a: des check <3>[ 45.176324] MAX96706-SERDES 0-004a: ser check <3>[ 45.416582] MAX96706-SERDES 0-0048: des check <3>[ 45.546291] MAX96706-SERDES 0-0048: ser check <4>[ 57.036258] ------------[ cut here ]------------ <4>[ 57.036271] WARNING: CPU: 1 PID: 0 at net/sched/sch_generic.c:461 0xc0654580 <6>[ 57.036278] NETDEV WATCHDOG: eth0 (cpsw): transmit queue 0 timed out <4>[ 57.036283] Modules linked in: memcache(O) pvrsrvkm(O) rpmsg_proto virtio_rpmsg_bus rpmsg_core omap_remoteproc remoteproc sch_fq_codel <4>[ 57.036339] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G O 4.19.73 #1 <4>[ 57.036345] Hardware name: Generic DRA74X (Flattened Device Tree) <4>[ 57.036350] Backtrace: <4>[ 57.036362] Function entered at [] from [] dump_backtrace <4>[ 57.036373] r7:c08dde7c r6:60060113 r5:00000000 r4:c0b37fa4 <4>[ 57.036379] Function entered at [] from [] show_stack <4>[ 57.036385] Function entered at [] from [] dump_stack <4>[ 57.036395] r7:c08dde7c r6:00000009 r5:00000000 r4:ee8afd44 <4>[ 57.036401] Function entered at [] from [] __warn <4>[ 57.036410] r9:ffffffff r8:c0b03d00 r7:ee817294 r6:ee817000 r5:c08dde40 r4:c0b04c48 <4>[ 57.036416] Function entered at [] from [] <4>[ 57.036423] r3:ee817000 r2:c08dde40 <4>[ 57.036430] r5:ee8172a8 r4:00000000 <4>[ 57.036437] Function entered at [] from [] dev_watchdog <4>[ 57.036445] r10:00000001 r9:c0654328 r8:00000000 r7:00000200 r6:c0654328 r5:00000101 <4>[ 57.036451] r4:ffffe000 <4>[ 57.036456] Function entered at [] from [] call_timer_fn <4>[ 57.036464] r6:ee8afdfc r5:eed9e500 r4:ee8172a8 <4>[ 57.036469] Function entered at [] from [] expire_timers <4>[ 57.036477] r9:00000101 r8:c0b04c48 r7:c0b03d00 r6:ee8afdfc r5:eed9e500 r4:ee8afdfc <4>[ 57.036483] Function entered at [] from [] run_timer_softirq <4>[ 57.036491] r8:40000001 r7:ffffe000 r6:c0b03080 r5:c0b03084 r4:00000020 <4>[ 57.036496] Function entered at [] from [] __do_softirq <4>[ 57.036505] r10:c0a57330 r9:ee8ae000 r8:ee808000 r7:00000001 r6:00000000 r5:00000000 <4>[ 57.036510] r4:c0a57a7c <4>[ 57.036516] Function entered at [] from [] irq_exit <4>[ 57.036521] Function entered at [] from [] __handle_domain_irq <4>[ 57.036529] r9:ee8ae000 r8:fa213000 r7:ee8aff08 r6:fa212000 r5:fa21200c r4:c0b04ff0 <4>[ 57.036534] Function entered at [] from [] gic_handle_irq <4>[ 57.036540] Exception stack(0xee8aff08 to 0xee8aff50) <4>[ 57.036550] ff00: 00000000 00028070 fe600000 00000000 ffffe000 c0b04c74 <4>[ 57.036560] ff20: c0b04cbc 00000002 00000000 00000000 c0a57330 ee8aff64 ee8aff44 ee8aff58 <4>[ 57.036567] ff40: c0120564 c0108f7c 60060013 ffffffff <4>[ 57.036577] r9:ee8ae000 r8:00000000 r7:ee8aff3c r6:ffffffff r5:60060013 r4:c0108f7c <4>[ 57.036582] Function entered at [] from [] arch_cpu_idle <4>[ 57.036588] Function entered at [] from [] default_idle_call <4>[ 57.036593] Function entered at [] from [] do_idle <4>[ 57.036601] r10:00000000 r9:412fc0f2 r8:8000406a r7:c0b3a8c0 r6:00000001 r5:ee8ae000 <4>[ 57.036606] r4:00000087 <4>[ 57.036612] Function entered at [] from [] cpu_startup_entry <4>[ 57.036617] Function entered at [] from [<8010248c>] secondary_start_kernel <4>[ 57.036624] r7:c0b3a8c0 r6:10c0387d r5:00000051 r4:ae89c06a <4>[ 57.036630] ---[ end trace e86fbd7335069bfb ]--- <3>[ 68.366243] rcu: INFO: rcu_preempt self-detected stall on CPU <3>[ 68.366264] rcu: 0-...!: (2101 ticks this GP) idle=ab6/1/0x40000002 softirq=10587/10587 fqs=0 <3>[ 68.366269] rcu: (t=2101 jiffies g=7481 q=2482) <3>[ 68.366286] rcu: rcu_preempt kthread starved for 2101 jiffies! g7481 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=0 <3>[ 68.366291] rcu: RCU grace-period kthread stack dump: <6>[ 68.366297] rcu_preempt I 0 10 2 0x00000000 <4>[ 68.366309] Backtrace: <4>[ 68.366320] Function entered at [] from [] __schedule <4>[ 68.366331] r10:00000001 r9:c0b03d00 r8:c0b04c48 r7:ee8a1ecc r6:eed8e500 r5:eed8e500 <4>[ 68.366337] r4:ffffe000 <4>[ 68.366343] Function entered at [] from [] schedule <4>[ 68.366349] r5:eed8e500 r4:ffff9d51 <4>[ 68.366355] Function entered at [] from [] schedule_timeout <4>[ 68.366364] r9:00000005 r8:c0b175c0 r7:c0b03d00 r6:c0b17758 r5:ee8a0000 r4:00000001 <4>[ 68.366370] Function entered at [] from [] rcu_gp_kthread <4>[ 68.366375] r7:ee8a0000 <4>[ 68.366381] Function entered at [] from [] kthread <4>[ 68.366388] Exception stack(0xee8a1fb0 to 0xee8a1ff8) <4>[ 68.366396] 1fa0: 00000000 00000000 00000000 00000000 <4>[ 68.366404] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <4>[ 68.366413] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 <4>[ 68.366422] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0149cd0 <4>[ 68.366427] r4:ee886100 <4>[ 68.366439] NMI backtrace for cpu 0 <4>[ 68.366449] CPU: 0 PID: 500 Comm: apps.out Tainted: G W O 4.19.73 #1 <4>[ 68.366454] Hardware name: Generic DRA74X (Flattened Device Tree) <4>[ 68.366458] Backtrace: <4>[ 68.366468] Function entered at [] from [] dump_backtrace <4>[ 68.366476] r7:00000000 r6:60010193 r5:00000000 r4:c0b37fa4 <4>[ 68.366482] Function entered at [] from [] show_stack <4>[ 68.366487] Function entered at [] from [] dump_stack <4>[ 68.366495] r7:00000000 r6:00000000 r5:00000000 r4:00000000 <4>[ 68.366500] Function entered at [] from [] nmi_cpu_backtrace <4>[ 68.366506] r5:c0b07e68 r4:c010e2fc <4>[ 68.366511] Function entered at [] from [] nmi_trigger_cpumask_backtrace <4>[ 68.366519] r9:00000140 r8:c0b175c0 r7:c0802da0 r6:c0b04c7c r5:c0b04d0c r4:c0b175c0 <4>[ 68.366525] Function entered at [] from [] arch_trigger_cpumask_backtrace <4>[ 68.366531] Function entered at [] from [] rcu_dump_cpu_stacks <4>[ 68.366539] r10:c0b04d00 r9:c0b175c0 r8:c0b04c7c r7:2e33a000 r6:eed92740 r5:c0a58740 <4>[ 68.366544] r4:c0b175c0 <4>[ 68.366549] Function entered at [] from [] rcu_check_callbacks <4>[ 68.366557] r10:20010193 r9:c01ad128 r8:00000000 r7:0000000f r6:00000000 r5:ed25bcc0 <4>[ 68.366561] r4:ffffe000 <4>[ 68.366567] Function entered at [] from [] update_process_times <4>[ 68.366574] r7:0000000f r6:ea92dab9 r5:ecca5e90 r4:eed8f908 <4>[ 68.366579] Function entered at [] from [] tick_sched_handle <4>[ 68.366584] Function entered at [] from [] tick_sched_timer <4>[ 68.366591] r7:eed8f600 r6:eed8f600 r5:eed8f908 r4:eed8f640 <4>[ 68.366596] Function entered at [] from [] __hrtimer_run_queues <4>[ 68.366604] r10:eed8f750 r9:eed8f780 r8:ffffffff r7:7fffffff r6:00000003 r5:20010193 <4>[ 68.366609] r4:eed8f600 <4>[ 68.366615] Function entered at [] from [] hrtimer_interrupt <4>[ 68.366623] r10:ed01c390 r9:ecca4000 r8:ee808000 r7:ee8611c0 r6:00000013 r5:c0b04ff0 <4>[ 68.366628] r4:ee807b00 <4>[ 68.366633] Function entered at [] from [] arch_timer_handler_phys <4>[ 68.366638] Function entered at [] from [] handle_percpu_devid_irq <4>[ 68.366645] r7:00000001 r6:00000000 r5:00000000 r4:c0a57a7c <4>[ 68.366650] Function entered at [] from [] generic_handle_irq <4>[ 68.366655] Function entered at [] from [] __handle_domain_irq <4>[ 68.366663] r9:ecca4000 r8:fa213000 r7:ecca5e90 r6:fa212000 r5:fa21200c r4:c0b04ff0 <4>[ 68.366668] Function entered at [] from [] gic_handle_irq <4>[ 68.366674] Exception stack(0xecca5e90 to 0xecca5ed8) <4>[ 68.366682] 5e80: edb709c0 00000021 3215ebcb 8d1d1354 <4>[ 68.366691] 5ea0: c0b04c48 8d1d1354 edb709c0 00000021 8d1d1354 ecca4000 ed01c390 ecca5f6c <4>[ 68.366699] 5ec0: 401c6440 ecca5ee0 0000545e c0250004 20010013 ffffffff <4>[ 68.366708] r9:ecca4000 r8:8d1d1354 r7:ecca5ec4 r6:ffffffff r5:20010013 r4:c0250004 <4>[ 68.366713] Function entered at [] from [] do_vfs_ioctl <4>[ 68.366721] r10:00000036 r9:ecca4000 r8:8d1d1354 r7:401c6440 r6:00000021 r5:edb709c0 <4>[ 68.366726] r4:edb709c1 <4>[ 68.366731] Function entered at [] from [] ksys_ioctl <4>[ 68.366739] r9:ecca4000 r8:c0101204 r7:00000036 r6:401c6440 r5:8d1d1354 r4:c01c675a <4>[ 68.366744] Function entered at [] from [] sys_ioctl <4>[ 68.366749] Exception stack(0xecca5fa8 to 0xecca5ff0) <4>[ 68.366758] 5fa0: c01c675a 8d1d1354 00000021 401c6440 8d1d1354 0000001c <4>[ 68.366767] 5fc0: c01c675a 8d1d1354 401c6440 00000036 8d1d138c 8d1d1394 8d1d1398 0016d3a0 <4>[ 68.366774] 5fe0: b6e05094 8d1d132c b6df019b b525015c + +Hello, Is this the log after reboot? nie mingwang said: <4>[ 57.036437] Function entered at [] from [] dev_watchdog Seems like reboot is broken. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/774658/linux-tda2-linux-tda2-tda2-linux-software-reboot-failure/2925857#2925857 That e2e points that reboot is fixed on 3.05. - Keerthy + +I don't konw whether this log happan after rebooting, and I find some new things, like this: <3>[ 15.671358] cma: cma_alloc: alloc failed, req-size: 12540 pages, ret: -12 <6>[ 15.671377] PVR_K:(Error): NewAllocCmaLinuxMemArea: failed Above log is printed by pvrsrvkm.ko, the part of pvrsrvkm.ko code is not open for us, so can you help me to analysis this problem? + +Nie, Can you please confirm the following so that we can determine the next steps? Are you trying this on a TI EVM? Please share the link to the SDK that you have downloaded? It seems like you have built the kernel and possibly filesystem etc.. Are there any changes done to the kernel or fileystem (Yocto)? Regards Karthik + diff --git a/data2/text/range/30001+/1182833.txt b/data2/text/range/30001+/1182833.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f949a8801f1af7d229bc40b40701a2e35ee5c34 --- /dev/null +++ b/data2/text/range/30001+/1182833.txt @@ -0,0 +1,1200 @@ +Ticket Name: TDA2SX: How to obtain the tda2 SDK package of the AWR2243 EVM development board + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: AWR2243, DRA742 Hi Ti Expert： At present, we use an AWR2243 EVM development board of your company, and the TDA2SX is used for data collection. However, mmwsstudio software only provides a software refresh package, Please provide the sdk source code package corresponding to the machine brushing package. + +Responses: +Now we only have the machine brushing package, and there is no source code, so it is difficult to do development work. Please help provide the source code corresponding to the machine brushing package, so that we can continue to work, thanks! Brush package name: C:\ti\mmwave_studio_03_00_00_14\mmWaveStudio\PlatformBinaries\TDA2Firmware\sdimage_3_7_1.img.xz + +Hi, Can you please clarify what is the machine brushing package? I can look to provide more detailed information based on your feedback. Regards Karthik + +I need you to provide the sdk source code corresponding to the sdimage_3_7_1.img.xz image package，Thanks a lot！ + +Hi expert： 1. Install mmwave_studio_03_00_00_14 software 2. After installation, an image package will be generated in the C:\ti\mmwave_studio_03_00_00_14\mmWaveStudio\PlatformBinaries\TDA2Firmware\sdimage_3_7_1.img.xz path 3. I need the source code corresponding to this image package（sdimage_3_7_1.img.xz） Thanks！~ + +Hi Can you help me find the uboot source code corresponding to DRA74x Cascade EVM? My local source code prints "Board: DRA74x EVM REV H.4" Expected print: “Board: DRA74x Cascade EVM REV H.4” [01:16:11:31:14]U-Boot 2016.05-00018-g6bc25a5 (Aug 05 2019 - 14:43:03 +0530) [01:16:11:31:14] [01:16:11:31:14]CPU : DRA752-GP ES2.0 [01:16:11:31:14]Model: TI DRA742 [01:16:11:31:14]Board: DRA74x Cascade EVM REV H.4 [01:16:11:31:14]DRAM: 4 GiB [01:16:11:31:14]MMC: i2c_write: error waiting for data ACK (status=0x116) Development board serial port log output： + +[01:16:11:30:39]U-Boot SPL 2016.05-00018-g6bc25a5 (Aug 05 2019 - 14:43:03) +[01:16:11:30:39]DRA752-GP ES2.0 +[01:16:11:30:39]no pinctrl for hs200_1_8v +[01:16:11:30:39]no pinctrl for ddr_1_8v +[01:16:11:30:39]Card did not respond to voltage select! +[01:16:11:30:39]*** Warning - MMC init failed, using default environment +[01:16:11:30:39] +[01:16:11:30:39]Trying to boot from MMC1 +[01:16:11:30:39]reading dra7-ipu2-fw.lzop +[01:16:11:30:39]spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +[01:16:11:30:39]spl: error reading image dra7-ipu2-fw.lzop, err - -1 +[01:16:11:30:39]Error loading remotecore IPU2!,Continuing with boot ... +[01:16:11:30:39]reading dra7-dsp1-fw.lzop +[01:16:11:30:39]spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +[01:16:11:30:39]spl: error reading image dra7-dsp1-fw.lzop, err - -1 +[01:16:11:30:39]Error loading remotecore DSP1!,Continuing with boot ... +[01:16:11:30:39]reading dra7-dsp2-fw.lzop +[01:16:11:30:39]spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +[01:16:11:30:39]spl: error reading image dra7-dsp2-fw.lzop, err - -1 +[01:16:11:30:39]Error loading remotecore DSP2!,Continuing with boot ... +[01:16:11:30:39]reading dra7-ipu1-fw.lzop +[01:16:11:30:39]spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +[01:16:11:30:39]spl: error reading image dra7-ipu1-fw.lzop, err - -1 +[01:16:11:30:39]Error loading remotecore IPU1!,Continuing with boot ... +[01:16:11:30:39]spl: falcon_args_file not set in environment, falling back to default +[01:16:11:30:39]reading single-stage-boot.dtb +[01:16:11:30:39]spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +[01:16:11:30:39]reading u-boot.img +[01:16:11:30:39]reading u-boot.img +[01:16:11:30:39]reading u-boot.img +[01:16:11:30:39]reading u-boot.img +[01:16:11:30:40] +[01:16:11:30:40] +[01:16:11:30:40]U-Boot 2016.05-00018-g6bc25a5 (Aug 05 2019 - 14:43:03 +0530) +[01:16:11:30:40] +[01:16:11:30:40]CPU : DRA752-GP ES2.0 +[01:16:11:30:40]Model: TI DRA742 +[01:16:11:30:40]Board: DRA74x Cascade EVM REV H.4 +[01:16:11:30:40]DRAM: 4 GiB +[01:16:11:30:40]MMC: i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:40]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:40]OMAP SD/MMC: 0, OMAP SD/MMC: 1 +[01:16:11:30:40]Card did not respond to voltage select! +[01:16:11:30:40]*** Warning - MMC init failed, using default environment +[01:16:11:30:40] +[01:16:11:30:40]Card did not respond to voltage select! +[01:16:11:30:40]ERROR: invalid mmc device +[01:16:11:30:40] +[01:16:11:30:40]at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() +[01:16:11:30:40]Warning: fastboot.userdata_size: unable to calc +[01:16:11:30:40]SCSI: SATA link 0 timeout. +[01:16:11:30:40]AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +[01:16:11:30:40]flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +[01:16:11:30:40]scanning bus for devices... +[01:16:11:30:40]Found 0 device(s). +[01:16:11:30:40]Net: Could not get PHY for ethernet@48484000: addr 2 +[01:16:11:30:40] +[01:16:11:30:40]Warning: ethernet@48484000 using MAC address from ROM +[01:16:11:30:40]eth0: ethernet@48484000 +[01:16:11:30:42]Hit any key to stop autoboot: 0 +[01:16:11:30:42]## Error: "board_findfdt" not defined +[01:16:11:30:42]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:42]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:42]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:42]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:42]switch to partitions #0, OK +[01:16:11:30:42]mmc0 is current device +[01:16:11:30:42]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:42]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:42]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:42]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:42]SD/MMC found on device 0 +[01:16:11:30:42]reading boot.scr +[01:16:11:30:42]** Unable to read file boot.scr ** +[01:16:11:30:42]reading uEnv.txt +[01:16:11:30:42]185 bytes read in 3 ms (59.6 KiB/s) +[01:16:11:30:43]Loaded env from uEnv.txt +[01:16:11:30:43]Importing environment from mmc0 ... +[01:16:11:30:43]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:43]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:43]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:43]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:43]switch to partitions #0, OK +[01:16:11:30:43]mmc0 is current device +[01:16:11:30:43]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:43]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:43]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:30:43]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:30:43]SD/MMC found on device 0 +[01:16:11:30:43]3577032 bytes read in 192 ms (17.8 MiB/s) +[01:16:11:30:43]107792 bytes read in 54 ms (1.9 MiB/s) +[01:16:11:30:43]Booting from mmc0 ... +[01:16:11:30:43]Kernel image @ 0x82000000 [ 0x000000 - 0x3694c8 ] +[01:16:11:30:43]## Flattened Device Tree blob at 88000000 +[01:16:11:30:43] Booting using the fdt blob at 0x88000000 +[01:16:11:30:43] Loading Device Tree to 8ffe2000, end 8ffff50f ... OK +[01:16:11:30:43] +[01:16:11:30:43]Starting kernel ... +[01:16:11:30:43] +[01:16:11:30:46][ 0.000000] Booting Linux on physical CPU 0x0 +[01:16:11:30:46][ 0.000000] Initializing cgroup subsys cpuset +[01:16:11:30:46][ 0.000000] Initializing cgroup subsys cpu +[01:16:11:30:46][ 0.000000] Initializing cgroup subsys cpuacct +[01:16:11:30:46][ 0.000000] Linux version 4.4.84-00041-g84382ab (x0284921@bangvideoapps02) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Aug 5 14:52:40 IST 2019 +[01:16:11:30:46][ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[01:16:11:30:46][ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[01:16:11:30:46][ 0.000000] Machine model: TI DRA742 Cascade Radar Board +[01:16:11:30:46][ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:30:46][ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:30:46][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:30:46][ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[01:16:11:30:46][ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[01:16:11:30:46][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:30:46][ 0.000000] cma: Reserved 64 MiB at 0x00000000bc000000 +[01:16:11:30:46][ 0.000000] Forcing write-allocate cache policy for SMP +[01:16:11:30:46][ 0.000000] Memory policy: Data cache writealloc +[01:16:11:30:46][ 0.000000] OMAP4: Map 0x000000027fd00000 to fe600000 for dram barrier +[01:16:11:30:46][ 0.000000] DRA752 ES2.0 +[01:16:11:30:46][ 0.000000] PERCPU: Embedded 11 pages/cpu @f2f1e000 s14912 r8192 d21952 u45056 +[01:16:11:30:46][ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1025330 +[01:16:11:30:46][ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=3cc717e1-02 rw rootwait ip=none cma=64M vmalloc=128M +[01:16:11:30:46][ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[01:16:11:30:46][ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[01:16:11:30:46][ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[01:16:11:30:46][ 0.000000] Memory: 2439424K/4109312K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 1424128K reserved, 245760K cma-reserved, 2167808K highmem) +[01:16:11:30:46][ 0.000000] Virtual kernel memory layout: +[01:16:11:30:46][ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[01:16:11:30:46][ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[01:16:11:30:46][ 0.000000] vmalloc : 0xf8000000 - 0xff800000 ( 120 MB) +[01:16:11:30:46][ 0.000000] lowmem : 0xc0000000 - 0xf7800000 ( 888 MB) +[01:16:11:30:46][ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[01:16:11:30:46][ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[01:16:11:30:46][ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) +[01:16:11:30:46][ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) +[01:16:11:30:46][ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) +[01:16:11:30:46][ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) +[01:16:11:30:46][ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[01:16:11:30:46][ 0.000000] Preemptible hierarchical RCU implementation. +[01:16:11:30:46][ 0.000000] Build-time adjustment of leaf fanout to 32. +[01:16:11:30:46][ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[01:16:11:30:46][ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[01:16:11:30:46][ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[01:16:11:30:46][ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[01:16:11:30:47][ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[01:16:11:30:47][ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[01:16:11:30:47][ 0.000015] Switching to timer-based delay loop, resolution 162ns +[01:16:11:30:47][ 0.000331] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[01:16:11:30:47][ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz +[01:16:11:30:47][ 0.000786] Console: colour dummy device 80x30 +[01:16:11:30:47][ 0.000803] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[01:16:11:30:47][ 0.000809] This ensures that you still see kernel messages. Please +[01:16:11:30:47][ 0.000814] update your kernel commandline. +[01:16:11:30:47][ 0.000827] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[01:16:11:30:47][ 0.000840] pid_max: default: 32768 minimum: 301 +[01:16:11:30:47][ 0.000941] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[01:16:11:30:47][ 0.000951] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[01:16:11:30:47][ 0.001496] Initializing cgroup subsys io +[01:16:11:30:47][ 0.001512] Initializing cgroup subsys memory +[01:16:11:30:47][ 0.001538] Initializing cgroup subsys devices +[01:16:11:30:47][ 0.001551] Initializing cgroup subsys freezer +[01:16:11:30:47][ 0.001562] Initializing cgroup subsys perf_event +[01:16:11:30:47][ 0.001573] Initializing cgroup subsys pids +[01:16:11:30:47][ 0.001600] CPU: Testing write buffer coherency: ok +[01:16:11:30:47][ 0.001794] /cpus/cpu@0 missing clock-frequency property +[01:16:11:30:47][ 0.001810] /cpus/cpu@1 missing clock-frequency property +[01:16:11:30:47][ 0.001820] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[01:16:11:30:47][ 0.001853] Setting up static identity map for 0x80008380 - 0x800083e0 +[01:16:11:30:47][ 0.080060] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[01:16:11:30:47][ 0.080129] Brought up 2 CPUs +[01:16:11:30:47][ 0.080142] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[01:16:11:30:47][ 0.080149] CPU: All CPU(s) started in HYP mode. +[01:16:11:30:47][ 0.080154] CPU: Virtualization extensions available. +[01:16:11:30:47][ 0.080533] devtmpfs: initialized +[01:16:11:30:47][ 0.109565] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[01:16:11:30:47][ 0.110550] omap_hwmod: l3_main_2 using broken dt data from ocp +[01:16:11:30:47][ 0.314692] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[01:16:11:30:47][ 0.314714] futex hash table entries: 512 (order: 3, 32768 bytes) +[01:16:11:30:47][ 0.319662] pinctrl core: initialized pinctrl subsystem +[01:16:11:30:47][ 0.320577] NET: Registered protocol family 16 +[01:16:11:30:47][ 0.321518] DMA: preallocated 256 KiB pool for atomic coherent allocations +[01:16:11:30:47][ 0.350242] cpuidle: using governor ladder +[01:16:11:30:47][ 0.380265] cpuidle: using governor menu +[01:16:11:30:47][ 0.388820] OMAP GPIO hardware version 0.1 +[01:16:11:30:47][ 0.392769] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[01:16:11:30:47][ 0.408201] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[01:16:11:30:47][ 0.408213] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[01:16:11:30:47][ 0.417316] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[01:16:11:30:47][ 0.417326] hw-breakpoint: maximum watchpoint size is 8 bytes. +[01:16:11:30:47][ 0.417797] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[01:16:11:30:47][ 0.417807] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[01:16:11:30:47][ 0.418380] OMAP DMA hardware revision 0.0 +[01:16:11:30:47][ 0.461501] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[01:16:11:30:47][ 0.462638] edma 43300000.edma: memcpy is disabled +[01:16:11:30:47][ 0.467376] edma 43300000.edma: TI EDMA DMA engine driver +[01:16:11:30:47][ 0.471442] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[01:16:11:30:47][ 0.471628] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[01:16:11:30:47][ 0.471786] omap-iommu 58882000.mmu: 58882000.mmu registered +[01:16:11:30:47][ 0.471944] omap-iommu 55082000.mmu: 55082000.mmu registered +[01:16:11:30:47][ 0.472217] omap-iommu 41501000.mmu: 41501000.mmu registered +[01:16:11:30:47][ 0.472418] omap-iommu 41502000.mmu: 41502000.mmu registered +[01:16:11:30:47][ 0.475439] palmas 0-0058: IRQ missing: skipping irq request +[01:16:11:30:47][ 0.490896] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[01:16:11:30:47][ 0.552784] pcf857x: probe of 0-0020 failed with error -121 +[01:16:11:30:47][ 0.553036] pcf857x: probe of 0-0021 failed with error -121 +[01:16:11:30:47][ 0.553908] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[01:16:11:30:47][ 0.554313] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[01:16:11:30:47][ 0.554512] media: Linux media interface: v0.10 +[01:16:11:30:47][ 0.554565] Linux video capture interface: v2.00 +[01:16:11:30:47][ 0.554606] pps_core: LinuxPPS API ver. 1 registered +[01:16:11:30:47][ 0.554613] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[01:16:11:30:47][ 0.554642] PTP clock support registered +[01:16:11:30:47][ 0.554693] EDAC MC: Ver: 3.0.0 +[01:16:11:30:47][ 0.555448] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[01:16:11:30:47][ 0.555737] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[01:16:11:30:47][ 0.556062] Advanced Linux Sound Architecture Driver Initialized. +[01:16:11:30:47][ 0.556929] clocksource: Switched to clocksource arch_sys_counter +[01:16:11:30:47][ 0.567572] NET: Registered protocol family 2 +[01:16:11:30:47][ 0.568077] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[01:16:11:30:47][ 0.568140] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[01:16:11:30:47][ 0.568265] TCP: Hash tables configured (established 8192 bind 8192) +[01:16:11:30:47][ 0.568311] UDP hash table entries: 512 (order: 2, 16384 bytes) +[01:16:11:30:47][ 0.568342] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[01:16:11:30:47][ 0.568484] NET: Registered protocol family 1 +[01:16:11:30:47][ 0.568795] RPC: Registered named UNIX socket transport module. +[01:16:11:30:47][ 0.568804] RPC: Registered udp transport module. +[01:16:11:30:47][ 0.568811] RPC: Registered tcp transport module. +[01:16:11:30:47][ 0.568817] RPC: Registered tcp NFSv4.1 backchannel transport module. +[01:16:11:30:47][ 0.569796] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[01:16:11:30:47][ 0.579772] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[01:16:11:30:47][ 0.580415] NFS: Registering the id_resolver key type +[01:16:11:30:47][ 0.580444] Key type id_resolver registered +[01:16:11:30:47][ 0.580451] Key type id_legacy registered +[01:16:11:30:47][ 0.580509] ntfs: driver 2.1.32 [Flags: R/O]. +[01:16:11:30:47][ 0.581779] bounce: pool size: 64 pages +[01:16:11:30:47][ 0.581940] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[01:16:11:30:47][ 0.581955] io scheduler noop registered +[01:16:11:30:47][ 0.581967] io scheduler deadline registered +[01:16:11:30:47][ 0.582001] io scheduler cfq registered (default) +[01:16:11:30:47][ 0.587490] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[01:16:11:30:47][ 0.591013] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[01:16:11:30:47][ 0.591026] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[01:16:11:30:47][ 0.591059] IO 0x20003000..0x20012fff -> 0x00000000 +[01:16:11:30:47][ 0.591081] MEM 0x20013000..0x2fffffff -> 0x20013000 +[01:16:11:30:47][ 0.591292] dra7-pcie 51000000.pcie_rc: CFG 'Bus Master Enable' change +[01:16:11:30:47][ 0.591301] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618329] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[01:16:11:30:47][ 0.618342] pci_bus 0000:00: root bus resource [bus 00-ff] +[01:16:11:30:47][ 0.618352] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[01:16:11:30:47][ 0.618362] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[01:16:11:30:47][ 0.618424] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618441] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618466] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618480] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618501] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618516] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change +[01:16:11:30:47][ 0.618819] PCI: bus0: Fast back to back transfers disabled +[01:16:11:30:47][ 0.637017] PCI: bus1: Fast back to back transfers disabled +[01:16:11:30:47][ 0.637144] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[01:16:11:30:47][ 0.637160] pci 0000:00:00.0: BAR 8: assigned [mem 0x20200000-0x202fffff] +[01:16:11:30:47][ 0.637170] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[01:16:11:30:47][ 0.637185] pci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x20203fff 64bit] +[01:16:11:30:47][ 0.637232] pci 0000:00:00.0: PCI bridge to [bus 01] +[01:16:11:30:47][ 0.637244] pci 0000:00:00.0: bridge window [mem 0x20200000-0x202fffff] +[01:16:11:30:47][ 0.637456] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[01:16:11:30:47][ 0.637466] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt +[01:16:11:30:47][ 0.699180] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[01:16:11:30:47][ 0.702558] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 202, base_baud = 3000000) is a 8250 +[01:16:11:30:47][ 1.802518] console [ttyS0] enabled +[01:16:11:30:47][ 1.806910] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 203, base_baud = 3000000) is a 8250 +[01:16:11:30:47][ 1.816617] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 204, base_baud = 3000000) is a 8250 +[01:16:11:30:47][ 1.826643] [drm] Initialized drm 1.1.0 20060810 +[01:16:11:30:47][ 1.832205] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[01:16:11:30:47][ 1.838892] [drm] No driver support for vblank timestamp query. +[01:16:11:30:47][ 1.845018] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[01:16:11:30:47][ 1.852165] OMAP DSS rev 6.1 +[01:16:11:30:47][ 1.855906] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[01:16:11:30:47][ 1.871552] loop: module loaded +[01:16:11:30:47][ 1.875091] vmemexp device MAJOR num = 245 +[01:16:11:30:47][ 1.879244] vmemexp class registered +[01:16:11:30:47][ 1.882957] /dev/vmemexp device registered +[01:16:11:30:47][ 1.887089] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[01:16:11:30:47][ 1.892622] nvme 0000:01:00.0: enabling device (0140 -> 0142) +[01:16:11:30:47][ 1.899044] nand: No NAND device found +[01:16:11:30:47][ 1.902815] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[01:16:11:30:47][ 1.911930] m25p80 spi32766.0: found n25q00, expected s25fl256s1 +[01:16:11:30:47][ 1.918053] m25p80 spi32766.0: n25q00 (131072 Kbytes) +[01:16:11:30:47][ 1.923185] 7 ofpart partitions found on MTD device spi32766.0 +[01:16:11:30:47][ 1.929065] Creating 7 MTD partitions on "spi32766.0": +[01:16:11:30:47][ 1.934227] 0x000000000000-0x000000040000 : "QSPI.SPL" +[01:16:11:30:47][ 1.950385] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[01:16:11:30:47][ 1.966697] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[01:16:11:30:47][ 1.983665] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[01:16:11:30:47][ 2.000348] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[01:16:11:30:47][ 2.017877] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[01:16:11:30:47][ 2.031006] nvme0n1: p1 +[01:16:11:30:47][ 2.034298] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[01:16:11:30:47][ 2.052185] libphy: Fixed MDIO Bus: probed +[01:16:11:30:48][ 2.106961] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[01:16:11:30:48][ 2.113088] libphy: 48485000.mdio: probed +[01:16:11:30:48][ 2.119875] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 +[01:16:11:30:48][ 2.128823] cpsw 48484000.ethernet: Detected MACID = b4:52:a9:3b:b1:16 +[01:16:11:30:48][ 2.135468] cpsw 48484000.ethernet: cpts: overflow check period 800 +[01:16:11:30:48][ 2.142444] cpsw 48484000.ethernet: cpsw: Detected MACID = b4:52:a9:3b:b1:17 +[01:16:11:30:48][ 2.151067] mousedev: PS/2 mouse device common for all mice +[01:16:11:30:48][ 2.167285] i2c /dev entries driver +[01:16:11:30:48][ 2.176043] omap_hsmmc 4809c000.mmc: Got CD GPIO +[01:16:11:30:48][ 2.227511] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[01:16:11:30:48][ 2.233898] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[01:16:11:30:48][ 2.247076] evm_3v3_sw: supplied by sysen1 +[01:16:11:30:48][ 2.307766] ledtrig-cpu: registered to indicate activity on CPUs +[01:16:11:30:48][ 2.317864] aic_dvdd: supplied by evm_3v3_sw +[01:16:11:30:48][ 2.323100] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[01:16:11:30:48][ 2.330616] NET: Registered protocol family 10 +[01:16:11:30:48][ 2.345930] sit: IPv6 over IPv4 tunneling driver +[01:16:11:30:48][ 2.351140] NET: Registered protocol family 17 +[01:16:11:30:48][ 2.355819] Key type dns_resolver registered +[01:16:11:30:48][ 2.360262] omap_voltage_late_init: Voltage driver support not added +[01:16:11:30:48][ 2.367168] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[01:16:11:30:48][ 2.373377] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[01:16:11:30:48][ 2.380087] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[01:16:11:30:48][ 2.386297] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[01:16:11:30:48][ 2.393627] Power Management for TI OMAP4+ devices. +[01:16:11:30:48][ 2.398757] Registering SWP/SWPB emulation handler +[01:16:11:30:48][ 2.404884] dmm 4e000000.dmm: workaround for errata i878 in use +[01:16:11:30:48][ 2.412421] dmm 4e000000.dmm: initialized all PAT entries +[01:16:11:30:48][ 2.418862] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[01:16:11:30:48][ 2.436689] hctosys: unable to open rtc device (rtc0) +[01:16:11:30:48][ 2.453712] evm_1v8: disabling +[01:16:11:30:48][ 2.454030] mmc0: host does not support reading read-only switch, assuming write-enable +[01:16:11:30:48][ 2.455899] mmc0: new high speed SDHC card at address 0001 +[01:16:11:30:48][ 2.466448] mmcblk0: mmc0:0001 SD16G 14.6 GiB +[01:16:11:30:48][ 2.471229] mmcblk0: p1 p2 +[01:16:11:30:48][ 2.477674] aic_dvdd: disabling +[01:16:11:30:48][ 2.481016] ldousb: disabling +[01:16:11:30:48][ 2.484518] ALSA device list: +[01:16:11:30:48][ 2.487519] No soundcards found. +[01:16:11:30:48][ 2.492461] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[01:16:11:30:48][ 2.501247] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[01:16:11:30:48][ 2.712840] EXT4-fs (mmcblk0p2): recovery complete +[01:16:11:30:48][ 2.720446] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[01:16:11:30:48][ 2.728623] VFS: Mounted root (ext4 filesystem) on device 179:2. +[01:16:11:30:48][ 2.738051] devtmpfs: mounted +[01:16:11:30:48][ 2.741244] Freeing unused kernel memory: 336K +[01:16:11:30:48][ 2.745708] This architecture does not have kernel memory protection. +[01:16:11:30:48][ 2.963886] systemd[1]: System time before build time, advancing clock. +[01:16:11:30:48][ 3.011707] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +[01:16:11:30:48][ 3.025860] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +[01:16:11:30:48][ 3.037718] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[01:16:11:30:49][ 3.056247] systemd[1]: Detected architecture arm. +[01:16:11:30:49] +[01:16:11:30:49]Welcome to Arago 2016.12! +[01:16:11:30:49] +[01:16:11:30:49][ 3.078205] systemd[1]: Set hostname to . +[01:16:11:30:49][ 3.144914] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[01:16:11:30:49][ 3.169078] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[01:16:11:30:49][ 3.179367] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[01:16:11:30:49][ 3.193210] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[01:16:11:30:49][ 3.208781] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[01:16:11:30:49][ 3.297429] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[01:16:11:30:49][ 3.306976] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[01:16:11:30:49][ 3.316903] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[01:16:11:30:49][ 3.626136] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[01:16:11:30:49][ 3.643559] systemd[1]: [/etc/systemd/system/multi-user.target.wants/vsdk.service:3] Failed to add dependency on rc.pvr, ignoring: Invalid argument +[01:16:11:30:49][ 3.775453] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[01:16:11:30:49][ 3.783275] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[01:16:11:30:49][ 3.791016] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[01:16:11:30:49][ 3.798475] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[01:16:11:30:49][ 3.807970] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[01:16:11:30:49][ SKIP ] Ordering cycle found, skipping alignment.service +[01:16:11:30:49][ 3.849363] systemd[1]: Reached target Swap. +[01:16:11:30:49][ OK ] Reached target Swap. +[01:16:11:30:49][ 3.878624] systemd[1]: Created slice User and Session Slice. +[01:16:11:30:49][ OK ] Created slice User and Session Slice. +[01:16:11:30:49][ 3.907346] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[01:16:11:30:49][ OK ] Started Dispatch Password Requests to Console Directory Watch. +[01:16:11:30:49][ 3.937371] systemd[1]: Listening on Network Service Netlink Socket. +[01:16:11:30:49][ OK ] Listening on Network Service Netlink Socket. +[01:16:11:30:49][ 3.967239] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[01:16:11:30:49][ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[01:16:11:30:49][ 3.997285] systemd[1]: Listening on Journal Socket. +[01:16:11:30:49][ OK ] Listening on Journal Socket. +[01:16:11:30:49][ 4.027794] systemd[1]: Created slice System Slice. +[01:16:11:30:49][ OK ] Created slice System Slice. +[01:16:11:30:50][ 4.097146] systemd[1]: Mounting Temporary Directory... +[01:16:11:30:50] Mounting Temporary Directory... +[01:16:11:30:50][ 4.116717] systemd[1]: Mounting POSIX Message Queue File System... +[01:16:11:30:50] Mounting POSIX Message Queue File System... +[01:16:11:30:50][ 4.149808] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[01:16:11:30:50] Starting Create list of required st... nodes for the current kernel... +[01:16:11:30:50][ 4.168934] systemd[1]: Created slice system-serial\x2dgetty.slice. +[01:16:11:30:50][ OK ] Created slice system-serial\x2dgetty.slice. +[01:16:11:30:50][ 4.197204] systemd[1]: Reached target Slices. +[01:16:11:30:50][ OK ] Reached target Slices. +[01:16:11:30:50][ 4.247369] systemd[1]: Starting Load Kernel Modules... +[01:16:11:30:50] Starting Load Kernel Modules... +[01:16:11:30:50][ 4.279568] systemd[1]: Mounting Debug File System... +[01:16:11:30:50] Mounting Debug File System... +[01:16:11:30:50][ 4.307236] systemd[1]: Reached target Remote File Systems. +[01:16:11:30:50][ OK ] Reached target Remote File Systems. +[01:16:11:30:50][ 4.340045] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[01:16:11:30:50][ OK ] Started Forward Password Requests to Wall Directory Watch. +[01:16:11:30:50][ 4.367154] systemd[1]: Reached target Paths. +[01:16:11:30:50][ OK ] Reached target Paths. +[01:16:11:30:50][ 4.387276] systemd[1]: Listening on Syslog Socket. +[01:16:11:30:50][ OK ] Listening on Syslog Socket. +[01:16:11:30:50][ 4.407202] systemd[1]: Listening on udev Kernel Socket. +[01:16:11:30:50][ OK ] Listening on udev Kernel Socket. +[01:16:11:30:50][ 4.437887] systemd[1]: Created slice system-getty.slice. +[01:16:11:30:50][ OK ] Created slice system-getty.slice. +[01:16:11:30:50][ 4.467263] systemd[1]: Listening on Journal Socket (/dev/log). +[01:16:11:30:50][ OK ] Listening on Journal Socket (/dev/log). +[01:16:11:30:50][ 4.537401] systemd[1]: Starting Journal Service... +[01:16:11:30:50] Starting Journal Service... +[01:16:11:30:50][ 4.567364] systemd[1]: Listening on udev Control Socket. +[01:16:11:30:50][ OK ] Listening on udev Control Socket. +[01:16:11:30:50][ 4.637394] systemd[1]: Starting Setup Virtual Console... +[01:16:11:30:50] Starting Setup Virtual Console... +[01:16:11:30:50][ 4.670488] systemd[1]: Starting Remount Root and Kernel File Systems... +[01:16:11:30:50] Starting Remount Root and Kernel File Systems... +[01:16:11:30:50][ 4.692492] systemd[1]: Mounted Debug File System. +[01:16:11:30:50][ 4.694980] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[01:16:11:30:50][ OK ] Mounted Debug File System. +[01:16:11:30:50][ 4.727241] systemd[1]: Mounted POSIX Message Queue File System. +[01:16:11:30:50][ OK ] Mounted POSIX Message Queue File System. +[01:16:11:30:50][ 4.757198] systemd[1]: Mounted Temporary Directory. +[01:16:11:30:50][ OK ] Mounted Temporary Directory. +[01:16:11:30:50][ 4.789066] systemd[1]: Started Journal Service. +[01:16:11:30:50][ OK ] Started Journal Service. +[01:16:11:30:50][ OK ] Started Create list of required sta...ce nodes for the current kernel. +[01:16:11:30:50][FAILED] Failed to start Load Kernel Modules. +[01:16:11:30:50]See 'systemctl status systemd-modules-load.service' for details. +[01:16:11:30:50][ OK ] Started Setup Virtual Console. +[01:16:11:30:50][ OK ] Started Remount Root and Kernel File Systems. +[01:16:11:30:51] Starting udev Coldplug all Devices... +[01:16:11:30:51] Starting Apply Kernel Variables... +[01:16:11:30:51] Starting Create Static Device Nodes in /dev... +[01:16:11:30:51] Starting Flush Journal to Persistent Storage... +[01:16:11:30:51][ OK ] Started Apply Kernel Variables. +[01:16:11:30:51][ OK ] Started Create Static Device Nodes in /dev. +[01:16:11:30:51][ 5.557688] systemd-journald[133]: Received request to flush runtime journal from PID 1 +[01:16:11:30:51] Starting udev Kernel Device Manager... +[01:16:11:30:51][ OK ] Reached target Local File Systems (Pre). +[01:16:11:30:51] Mounting /media/ram... +[01:16:11:30:51] Mounting /var/volatile... +[01:16:11:30:51][ OK ] Mounted /var/volatile. +[01:16:11:30:51][ OK ] Mounted /media/ram. +[01:16:11:30:51][ OK ] Started udev Kernel Device Manager. +[01:16:11:30:51][ OK ] Started Flush Journal to Persistent Storage. +[01:16:11:30:51] Starting Load/Save Random Seed... +[01:16:11:30:51][ OK ] Reached target Local File Systems. +[01:16:11:30:51] Starting Create Volatile Files and Directories... +[01:16:11:30:51][ OK ] Started Load/Save Random Seed. +[01:16:11:30:51][ OK ] Started Create Volatile Files and Directories. +[01:16:11:30:52][ OK ] Started udev Coldplug all Devices. +[01:16:11:30:52][ 6.120393] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[01:16:11:30:52][ 6.128266] remoteproc0: 55020000.ipu is available +[01:16:11:30:52][ 6.133942] remoteproc0: Note: remoteproc is still under development and considered experimental. +[01:16:11:30:52][ 6.155413] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:30:52][ 6.192079] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[01:16:11:30:52][ 6.232904] remoteproc1: 40800000.dsp is available +[01:16:11:30:52][ 6.250519] remoteproc1: Note: remoteproc is still under development and considered experimental. +[01:16:11:30:52][ 6.279014] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:30:52][ 6.302814] remoteproc1: Direct firmware load for dra7-dsp1-fw.xe66 failed with error -2 +[01:16:11:30:52][ 6.311936] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[01:16:11:30:52][ 6.328630] remoteproc1: failed to load dra7-dsp1-fw.xe66 +[01:16:11:30:52][ 6.340302] remoteproc2: 41000000.dsp is available +[01:16:11:30:52][ 6.357782] remoteproc2: Note: remoteproc is still under development and considered experimental. +[01:16:11:30:52][ 6.372319] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:30:52] Starting Update UTMP about System Boot/Shutdown... +[01:16:11:30:52][ 6.389253] remoteproc2: Direct firmware load for dra7-dsp2-fw.xe66 failed with error -2 +[01:16:11:30:52][ 6.457187] remoteproc2: failed to load dra7-dsp2-fw.xe66 +[01:16:11:30:52] Starting Network Time Synchronization... +[01:16:11:30:52][ 6.523853] remoteproc0: registered virtio0 (type 7) +[01:16:11:30:52][ 6.534792] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[01:16:11:30:52][ 6.572527] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[01:16:11:30:52][ OK ] Found device /dev/ttyS0. +[01:16:11:30:52][ OK ] Started Network Time Synchronization. +[01:16:11:30:52][ 6.656472] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[01:16:11:30:52][ OK ] Started Update UTMP about System Boot/Shutdown. +[01:16:11:30:52] Starting Synchronize System and HW clocks... +[01:16:11:30:52][ OK ] Reached target System Time Synchronized. +[01:16:11:30:52][ OK ] Started Synchronize System and HW clocks. +[01:16:11:30:53][ 7.064359] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[01:16:11:30:53][ 7.071333] CAN device driver interface +[01:16:11:30:53][ 7.115482] SCSI subsystem initialized +[01:16:11:30:53][ OK ] Reached target System Initialization. +[01:16:11:30:53][ OK ] Listening on dropbear.socket. +[01:16:11:30:53][ 7.203467] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[01:16:11:30:53][ OK ] Listening on D-Bus System Message Bus Socket. +[01:16:11:30:53][ OK ] Reached target Sockets.[ 7.267307] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[01:16:11:30:53] +[01:16:11:30:53][ 7.296119] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=254) +[01:16:11:30:53][ OK ] Reached target Basic System. +[01:16:11:30:53][ OK ] Started Kernel Logging Service. +[01:16:11:30:53] Starting rc.pvr.service... +[01:16:11:30:53][ OK ] Started System Logging Service. +[01:16:11:30:53] Starting Login Service...[ 7.547753] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[01:16:11:30:53] +[01:16:11:30:53][ OK ] Started D-Bus System Message Bus. +[01:16:11:30:53][ 7.605412] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[01:16:11:30:53][ 7.620806] ahci 4a140000.sata: Enable 32-bit DMA instead of 64-bit. +[01:16:11:30:53][ 7.652057] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[01:16:11:30:53][ 7.687291] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[01:16:11:30:53][ 7.715311] EXT4-fs (nvme0n1p1): recovery complete +[01:16:11:30:53][ 7.720246] EXT4-fs (nvme0n1p1): mounted filesystem with ordered data mode. Opts: (null) +[01:16:11:30:53][ 7.731974] scsi host0: ahci +[01:16:11:30:53][ 7.735212] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 240 +[01:16:11:30:53][ 7.795852] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[01:16:11:30:53][ 7.900449] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[01:16:11:30:53] Starting Network Service... +[01:16:11:30:53] Starting Permit User Sessions... +[01:16:11:30:54][ OK ] Started Daily Cleanup of Temporary Directories. +[01:16:11:30:54][ OK ] Reached target Timers. +[01:16:11:30:54][ 8.107038] ata1: SATA link down (SStatus 0 SControl 300) +[01:16:11:30:54][ OK ] Started Launching Vision SDK App. +[01:16:11:30:54][ OK ] Started rc.pvr.service. +[01:16:11:30:54][ 8.235537] net eth0: initializing cpsw version 1.15 (0) +[01:16:11:30:54][ OK ] Started Permit User Sessions. +[01:16:11:30:54][ 8.274531] net eth0: initialized cpsw ale version 1.4 +[01:16:11:30:54][ 8.297669] net eth0: ALE Table size 1024 +[01:16:11:30:54][ 8.355360] net eth0: phy found : id is : 0x2000a231 +[01:16:11:30:54][ 8.386426] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[01:16:11:30:54][ OK ] Started Network Service. +[01:16:11:30:54][ 8.738152] remoteproc0: powering up 55020000.ipu +[01:16:11:30:54][ 8.752445] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4396172 +[01:16:11:30:54][ 8.777971] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[01:16:11:30:54][ 8.824648] remoteproc0: remote processor 55020000.ipu is now up +[01:16:11:30:54][ 8.831895] virtio_rpmsg_bus virtio0: rpmsg host is online +[01:16:11:30:54][ 8.875449] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[01:16:11:30:54][ 8.906618] NET: Registered protocol family 41 +[01:16:11:30:55][ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[01:16:11:30:55] Starting Network Service... +[01:16:11:30:55][ OK ] Started Getty on tty1. +[01:16:11:30:55][ OK ] Started Serial Getty on ttyS0. +[01:16:11:30:55] Starting weston.service... +[01:16:11:30:55][ OK ] Started Network Service. +[01:16:11:30:55][ OK ] Started weston.service. +[01:16:11:30:55][ OK ] Started Login Service. +[01:16:11:30:55] Starting Network Service... +[01:16:11:30:55] Starting tiipclad-daemon.service... +[01:16:11:30:55] Starting telnetd.service... +[01:16:11:30:55][ OK ] Started Network Service. +[01:16:11:30:55][ OK ] Started tiipclad-daemon.service. +[01:16:11:30:55][ OK ] Started telnetd.service. +[01:16:11:30:55] Starting Network Service... +[01:16:11:30:55][ OK ] Started Network Service. +[01:16:11:30:55] Starting Network Service... +[01:16:11:30:55][ OK ] Started Network Service. +[01:16:11:30:55][FAILED] Failed to listen on Network Service Bus Name. +[01:16:11:30:55]See 'systemctl status org.freedesktop.network1.busname' for details. +[01:16:11:30:55][FAILED] Failed to start Network Service. +[01:16:11:30:55]See 'systemctl status systemd-networkd.service' for details. +[01:16:11:30:55][ OK ] Reached target Network. +[01:16:11:30:56] Starting Network Name Resolution... +[01:16:11:30:56][ OK ] Started Network Name Resolution. +[01:16:11:30:59][ 13.297828] EXT4-fs (nvme0n1p1): mounted filesystem with ordered data mode. Opts: (null) +[01:16:11:31:01][ 15.335454] DMA: Module install successful, device major num = 241 +[01:16:11:31:01][ 15.341802] DRV: Module install successful +[01:16:11:31:01] +[01:16:11:31:01] _____ _____ _ _ +[01:16:11:31:01]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +[01:16:11:31:01]| | _| .'| . | . | | __| _| . | | | -_| _| _| +[01:16:11:31:01]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| +[01:16:11:31:01] |___| |___| +[01:16:11:31:01] +[01:16:11:31:01]Arago Project http://arago-project.org dra7xx-evm ttyS0 +[01:16:11:31:01] +[01:16:11:31:01]Arago 2016.12 dra7xx-evm ttyS0 +[01:16:11:31:01] +[01:16:11:31:01]dra7xx-evm login: my local source code build image, serial log output: + +[01:16:11:29:19]U-Boot SPL 2016.05-00013-g3331a8a6168f (Jan 13 2023 - 16:42:05) +[01:16:11:29:19]DRA752-GP ES2.0 +[01:16:11:29:19]no pinctrl for hs200_1_8v +[01:16:11:29:19]no pinctrl for ddr_1_8v +[01:16:11:29:19]Card did not respond to voltage select! +[01:16:11:29:19]*** Warning - MMC init failed, using default environment +[01:16:11:29:19] +[01:16:11:29:19]Trying to boot from MMC1 +[01:16:11:29:19]reading dra7-ipu2-fw.lzop +[01:16:11:29:19]spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +[01:16:11:29:19]spl: error reading image dra7-ipu2-fw.lzop, err - -1 +[01:16:11:29:19]Error loading remotecore IPU2!,Continuing with boot ... +[01:16:11:29:19]reading dra7-dsp1-fw.lzop +[01:16:11:29:19]spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +[01:16:11:29:19]spl: error reading image dra7-dsp1-fw.lzop, err - -1 +[01:16:11:29:19]Error loading remotecore DSP1!,Continuing with boot ... +[01:16:11:29:19]reading dra7-dsp2-fw.lzop +[01:16:11:29:19]spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +[01:16:11:29:19]spl: error reading image dra7-dsp2-fw.lzop, err - -1 +[01:16:11:29:19]Error loading remotecore DSP2!,Continuing with boot ... +[01:16:11:29:19]reading dra7-ipu1-fw.lzop +[01:16:11:29:19]spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +[01:16:11:29:19]spl: error reading image dra7-ipu1-fw.lzop, err - -1 +[01:16:11:29:19]Error loading remotecore IPU1!,Continuing with boot ... +[01:16:11:29:19]spl: falcon_args_file not set in environment, falling back to default +[01:16:11:29:19]reading single-stage-boot.dtb +[01:16:11:29:19]spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +[01:16:11:29:19]reading u-boot.img +[01:16:11:29:19]reading u-boot.img +[01:16:11:29:19]reading u-boot.img +[01:16:11:29:19]reading u-boot.img +[01:16:11:29:20] +[01:16:11:29:20] +[01:16:11:29:20]U-Boot 2016.05-00013-g3331a8a6168f (Jan 13 2023 - 16:42:05 -0800) +[01:16:11:29:20] +[01:16:11:29:20]CPU : DRA752-GP ES2.0 +[01:16:11:29:20]Model: TI DRA742 +[01:16:11:29:20]Board: DRA74x EVM REV H.4 +[01:16:11:29:20]DRAM: 4 GiB +[01:16:11:29:20]MMC: i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:20]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:20]OMAP SD/MMC: 0, OMAP SD/MMC: 1 +[01:16:11:29:20]Card did not respond to voltage select! +[01:16:11:29:20]*** Warning - MMC init failed, using default environment +[01:16:11:29:20] +[01:16:11:29:20]Card did not respond to voltage select! +[01:16:11:29:20]ERROR: invalid mmc device +[01:16:11:29:20] +[01:16:11:29:20]at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() +[01:16:11:29:20]Warning: fastboot.userdata_size: unable to calc +[01:16:11:29:20]SCSI: SATA link 0 timeout. +[01:16:11:29:20]AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +[01:16:11:29:20]flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +[01:16:11:29:20]scanning bus for devices... +[01:16:11:29:20]Found 0 device(s). +[01:16:11:29:20]Net: Could not get PHY for ethernet@48484000: addr 2 +[01:16:11:29:20] +[01:16:11:29:20]Warning: ethernet@48484000 using MAC address from ROM +[01:16:11:29:20]eth0: ethernet@48484000 +[01:16:11:29:22]Hit any key to stop autoboot: 0 +[01:16:11:29:22]## Error: "board_findfdt" not defined +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:22]switch to partitions #0, OK +[01:16:11:29:22]mmc0 is current device +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:22]SD/MMC found on device 0 +[01:16:11:29:22]reading boot.scr +[01:16:11:29:22]** Unable to read file boot.scr ** +[01:16:11:29:22]reading uEnv.txt +[01:16:11:29:22]182 bytes read in 2 ms (88.9 KiB/s) +[01:16:11:29:22]Loaded env from uEnv.txt +[01:16:11:29:22]Importing environment from mmc0 ... +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:22]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:22]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:23]switch to partitions #0, OK +[01:16:11:29:23]mmc0 is current device +[01:16:11:29:23]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:23]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:23]i2c_write: error waiting for data ACK (status=0x116) +[01:16:11:29:23]pcf8575_i2c_write_le16 i2c write failed to addr 21 +[01:16:11:29:23]SD/MMC found on device 0 +[01:16:11:29:23]3560440 bytes read in 182 ms (18.7 MiB/s) +[01:16:11:29:23]107664 bytes read in 32 ms (3.2 MiB/s) +[01:16:11:29:23]Booting from mmc0 ... +[01:16:11:29:23]Kernel image @ 0x82000000 [ 0x000000 - 0x3653f8 ] +[01:16:11:29:23]## Flattened Device Tree blob at 88000000 +[01:16:11:29:23] Booting using the fdt blob at 0x88000000 +[01:16:11:29:23] Loading Device Tree to 8ffe2000, end 8ffff48f ... OK +[01:16:11:29:23] +[01:16:11:29:23]Starting kernel ... +[01:16:11:29:23] +[01:16:11:29:25][ 0.000000] Booting Linux on physical CPU 0x0 +[01:16:11:29:25][ 0.000000] Initializing cgroup subsys cpuset +[01:16:11:29:25][ 0.000000] Initializing cgroup subsys cpu +[01:16:11:29:25][ 0.000000] Initializing cgroup subsys cpuacct +[01:16:11:29:25][ 0.000000] Linux version 4.4.84-00034-gaa42c960d12c (herry@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Fri Jan 13 16:53:26 PST 2023 +[01:16:11:29:25][ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[01:16:11:29:25][ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[01:16:11:29:25][ 0.000000] Machine model: TI DRA742 +[01:16:11:29:25][ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[01:16:11:29:25][ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[01:16:11:29:25][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:29:25][ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[01:16:11:29:25][ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[01:16:11:29:26][ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[01:16:11:29:26][ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[01:16:11:29:26][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:29:26][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[01:16:11:29:26][ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[01:16:11:29:26][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[01:16:11:29:26][ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[01:16:11:29:26][ 0.000000] Reserved memory: regions without no-map are not yet supported +[01:16:11:29:26][ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[01:16:11:29:26][ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[01:16:11:29:26][ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[01:16:11:29:26][ 0.000000] Forcing write-allocate cache policy for SMP +[01:16:11:29:26][ 0.000000] Memory policy: Data cache writealloc +[01:16:11:29:26][ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[01:16:11:29:26][ 0.000000] DRA752 ES2.0 +[01:16:11:29:26][ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[01:16:11:29:26][ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[01:16:11:29:26][ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=74cc6af2-02 rw rootwait ip=none mem=1024M cma=64M +[01:16:11:29:26][ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[01:16:11:29:26][ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[01:16:11:29:26][ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[01:16:11:29:26][ 0.000000] Memory: 369860K/979968K available (6635K kernel code, 320K rwdata, 2392K rodata, 336K init, 290K bss, 364348K reserved, 245760K cma-reserved, 193536K highmem) +[01:16:11:29:26][ 0.000000] Virtual kernel memory layout: +[01:16:11:29:26][ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[01:16:11:29:26][ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[01:16:11:29:26][ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[01:16:11:29:26][ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[01:16:11:29:26][ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[01:16:11:29:26][ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[01:16:11:29:26][ 0.000000] .text : 0xc0008000 - 0xc08d902c (9029 kB) +[01:16:11:29:26][ 0.000000] .init : 0xc08da000 - 0xc092e000 ( 336 kB) +[01:16:11:29:26][ 0.000000] .data : 0xc092e000 - 0xc097e120 ( 321 kB) +[01:16:11:29:26][ 0.000000] .bss : 0xc0980000 - 0xc09c8800 ( 290 kB) +[01:16:11:29:26][ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[01:16:11:29:26][ 0.000000] Preemptible hierarchical RCU implementation. +[01:16:11:29:26][ 0.000000] Build-time adjustment of leaf fanout to 32. +[01:16:11:29:26][ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[01:16:11:29:26][ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[01:16:11:29:26][ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[01:16:11:29:26][ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[01:16:11:29:26][ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[01:16:11:29:26][ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[01:16:11:29:26][ 0.000016] Switching to timer-based delay loop, resolution 162ns +[01:16:11:29:26][ 0.000328] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[01:16:11:29:26][ 0.000336] OMAP clocksource: 32k_counter at 32768 Hz +[01:16:11:29:26][ 0.000776] Console: colour dummy device 80x30 +[01:16:11:29:26][ 0.000792] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[01:16:11:29:26][ 0.000798] This ensures that you still see kernel messages. Please +[01:16:11:29:26][ 0.000803] update your kernel commandline. +[01:16:11:29:26][ 0.000816] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[01:16:11:29:26][ 0.000829] pid_max: default: 32768 minimum: 301 +[01:16:11:29:26][ 0.000927] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[01:16:11:29:26][ 0.000937] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[01:16:11:29:26][ 0.001476] Initializing cgroup subsys io +[01:16:11:29:26][ 0.001493] Initializing cgroup subsys memory +[01:16:11:29:26][ 0.001517] Initializing cgroup subsys devices +[01:16:11:29:26][ 0.001530] Initializing cgroup subsys freezer +[01:16:11:29:26][ 0.001542] Initializing cgroup subsys perf_event +[01:16:11:29:26][ 0.001554] Initializing cgroup subsys pids +[01:16:11:29:26][ 0.001580] CPU: Testing write buffer coherency: ok +[01:16:11:29:26][ 0.001779] /cpus/cpu@0 missing clock-frequency property +[01:16:11:29:26][ 0.001795] /cpus/cpu@1 missing clock-frequency property +[01:16:11:29:26][ 0.001805] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[01:16:11:29:26][ 0.001841] Setting up static identity map for 0x80008380 - 0x800083e0 +[01:16:11:29:26][ 0.080064] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[01:16:11:29:26][ 0.080134] Brought up 2 CPUs +[01:16:11:29:26][ 0.080147] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[01:16:11:29:26][ 0.080154] CPU: All CPU(s) started in HYP mode. +[01:16:11:29:26][ 0.080159] CPU: Virtualization extensions available. +[01:16:11:29:26][ 0.080533] devtmpfs: initialized +[01:16:11:29:26][ 0.109583] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[01:16:11:29:26][ 0.110549] omap_hwmod: l3_main_2 using broken dt data from ocp +[01:16:11:29:26][ 0.313996] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[01:16:11:29:26][ 0.314020] futex hash table entries: 512 (order: 3, 32768 bytes) +[01:16:11:29:26][ 0.318966] pinctrl core: initialized pinctrl subsystem +[01:16:11:29:26][ 0.319849] NET: Registered protocol family 16 +[01:16:11:29:26][ 0.320819] DMA: preallocated 256 KiB pool for atomic coherent allocations +[01:16:11:29:26][ 0.350234] cpuidle: using governor ladder +[01:16:11:29:26][ 0.380255] cpuidle: using governor menu +[01:16:11:29:26][ 0.388837] OMAP GPIO hardware version 0.1 +[01:16:11:29:26][ 0.392777] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[01:16:11:29:26][ 0.408268] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[01:16:11:29:26][ 0.408282] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[01:16:11:29:26][ 0.417405] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[01:16:11:29:26][ 0.417415] hw-breakpoint: maximum watchpoint size is 8 bytes. +[01:16:11:29:26][ 0.417873] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[01:16:11:29:26][ 0.417882] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[01:16:11:29:26][ 0.418450] OMAP DMA hardware revision 0.0 +[01:16:11:29:26][ 0.461422] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[01:16:11:29:26][ 0.462555] edma 43300000.edma: memcpy is disabled +[01:16:11:29:26][ 0.467253] edma 43300000.edma: TI EDMA DMA engine driver +[01:16:11:29:26][ 0.471315] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[01:16:11:29:26][ 0.471501] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[01:16:11:29:26][ 0.471662] omap-iommu 58882000.mmu: 58882000.mmu registered +[01:16:11:29:26][ 0.471822] omap-iommu 55082000.mmu: 55082000.mmu registered +[01:16:11:29:26][ 0.472098] omap-iommu 41501000.mmu: 41501000.mmu registered +[01:16:11:29:26][ 0.472297] omap-iommu 41502000.mmu: 41502000.mmu registered +[01:16:11:29:26][ 0.475312] palmas 0-0058: IRQ missing: skipping irq request +[01:16:11:29:26][ 0.490782] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[01:16:11:29:26][ 0.562672] pcf857x: probe of 0-0020 failed with error -121 +[01:16:11:29:26][ 0.562928] pcf857x: probe of 0-0021 failed with error -121 +[01:16:11:29:26][ 0.563785] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[01:16:11:29:26][ 0.564198] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[01:16:11:29:26][ 0.564394] media: Linux media interface: v0.10 +[01:16:11:29:26][ 0.564445] Linux video capture interface: v2.00 +[01:16:11:29:26][ 0.564485] pps_core: LinuxPPS API ver. 1 registered +[01:16:11:29:26][ 0.564493] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[01:16:11:29:26][ 0.564521] PTP clock support registered +[01:16:11:29:26][ 0.564564] EDAC MC: Ver: 3.0.0 +[01:16:11:29:26][ 0.565314] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[01:16:11:29:26][ 0.565608] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[01:16:11:29:26][ 0.565950] Advanced Linux Sound Architecture Driver Initialized. +[01:16:11:29:26][ 0.566831] clocksource: Switched to clocksource arch_sys_counter +[01:16:11:29:26][ 0.577465] NET: Registered protocol family 2 +[01:16:11:29:26][ 0.577958] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[01:16:11:29:26][ 0.578022] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[01:16:11:29:26][ 0.578146] TCP: Hash tables configured (established 8192 bind 8192) +[01:16:11:29:26][ 0.578193] UDP hash table entries: 512 (order: 2, 16384 bytes) +[01:16:11:29:26][ 0.578225] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[01:16:11:29:26][ 0.578371] NET: Registered protocol family 1 +[01:16:11:29:26][ 0.578655] RPC: Registered named UNIX socket transport module. +[01:16:11:29:26][ 0.578664] RPC: Registered udp transport module. +[01:16:11:29:26][ 0.578670] RPC: Registered tcp transport module. +[01:16:11:29:26][ 0.578676] RPC: Registered tcp NFSv4.1 backchannel transport module. +[01:16:11:29:26][ 0.579656] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[01:16:11:29:26][ 0.589787] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[01:16:11:29:26][ 0.590446] NFS: Registering the id_resolver key type +[01:16:11:29:26][ 0.590479] Key type id_resolver registered +[01:16:11:29:26][ 0.590487] Key type id_legacy registered +[01:16:11:29:26][ 0.590555] ntfs: driver 2.1.32 [Flags: R/O]. +[01:16:11:29:26][ 0.591866] bounce: pool size: 64 pages +[01:16:11:29:26][ 0.592018] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[01:16:11:29:26][ 0.592035] io scheduler noop registered +[01:16:11:29:26][ 0.592050] io scheduler deadline registered +[01:16:11:29:26][ 0.592086] io scheduler cfq registered (default) +[01:16:11:29:26][ 0.597634] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[01:16:11:29:26][ 0.601110] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[01:16:11:29:26][ 0.601122] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[01:16:11:29:26][ 0.601155] IO 0x20003000..0x20012fff -> 0x00000000 +[01:16:11:29:26][ 0.601175] MEM 0x20013000..0x2fffffff -> 0x20013000 +[01:16:11:29:26][ 0.631167] dra7-pcie 51000000.pcie_rc: link is not up +[01:16:11:29:26][ 0.631340] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[01:16:11:29:26][ 0.631352] pci_bus 0000:00: root bus resource [bus 00-ff] +[01:16:11:29:26][ 0.631363] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[01:16:11:29:26][ 0.631372] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[01:16:11:29:26][ 0.631785] PCI: bus0: Fast back to back transfers disabled +[01:16:11:29:26][ 0.631905] PCI: bus1: Fast back to back transfers enabled +[01:16:11:29:26][ 0.631989] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[01:16:11:29:26][ 0.632004] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[01:16:11:29:26][ 0.632016] pci 0000:00:00.0: PCI bridge to [bus 01] +[01:16:11:29:26][ 0.632238] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[01:16:11:29:26][ 0.692886] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[01:16:11:29:26][ 0.696276] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 202, base_baud = 3000000) is a 8250 +[01:16:11:29:26][ 1.710377] console [ttyS0] enabled +[01:16:11:29:26][ 1.714766] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 203, base_baud = 3000000) is a 8250 +[01:16:11:29:26][ 1.724476] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 204, base_baud = 3000000) is a 8250 +[01:16:11:29:26][ 1.734509] [drm] Initialized drm 1.1.0 20060810 +[01:16:11:29:26][ 1.740063] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[01:16:11:29:26][ 1.746709] [drm] No driver support for vblank timestamp query. +[01:16:11:29:26][ 1.752878] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[01:16:11:29:26][ 1.760027] OMAP DSS rev 6.1 +[01:16:11:29:26][ 1.763782] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[01:16:11:29:26][ 1.779471] loop: module loaded +[01:16:11:29:26][ 1.783020] vmemexp device MAJOR num = 245 +[01:16:11:29:26][ 1.787173] vmemexp class registered +[01:16:11:29:27][ 1.790891] /dev/vmemexp device registered +[01:16:11:29:27][ 1.795004] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[01:16:11:29:27][ 1.800714] nand: No NAND device found +[01:16:11:29:27][ 1.804484] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[01:16:11:29:27][ 1.813594] m25p80 spi32766.0: found n25q00, expected s25fl256s1 +[01:16:11:29:27][ 1.819704] m25p80 spi32766.0: n25q00 (131072 Kbytes) +[01:16:11:29:27][ 1.824839] 7 ofpart partitions found on MTD device spi32766.0 +[01:16:11:29:27][ 1.830715] Creating 7 MTD partitions on "spi32766.0": +[01:16:11:29:27][ 1.835877] 0x000000000000-0x000000040000 : "QSPI.SPL" +[01:16:11:29:27][ 1.842009] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[01:16:11:29:27][ 1.848346] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[01:16:11:29:27][ 1.855301] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[01:16:11:29:27][ 1.861993] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[01:16:11:29:27][ 1.869387] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[01:16:11:29:27][ 1.875709] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[01:16:11:29:27][ 1.883499] libphy: Fixed MDIO Bus: probed +[01:16:11:29:27][ 1.936863] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[01:16:11:29:27][ 1.942989] libphy: 48485000.mdio: probed +[01:16:11:29:27][ 1.950096] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 +[01:16:11:29:27][ 1.959078] cpsw 48484000.ethernet: Detected MACID = b4:52:a9:3b:b1:16 +[01:16:11:29:27][ 1.965723] cpsw 48484000.ethernet: cpts: overflow check period 800 +[01:16:11:29:27][ 1.972718] cpsw 48484000.ethernet: cpsw: Detected MACID = b4:52:a9:3b:b1:17 +[01:16:11:29:27][ 1.981370] mousedev: PS/2 mouse device common for all mice +[01:16:11:29:27][ 1.987582] i2c /dev entries driver +[01:16:11:29:27][ 1.996239] omap_hsmmc 4809c000.mmc: Got CD GPIO +[01:16:11:29:27][ 2.037611] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[01:16:11:29:27][ 2.043996] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[01:16:11:29:27][ 2.066979] evm_3v3_sw: supplied by sysen1 +[01:16:11:29:27][ 2.127659] ledtrig-cpu: registered to indicate activity on CPUs +[01:16:11:29:27][ 2.137763] aic_dvdd: supplied by evm_3v3_sw +[01:16:11:29:27][ 2.143020] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[01:16:11:29:27][ 2.150517] NET: Registered protocol family 10 +[01:16:11:29:27][ 2.165813] sit: IPv6 over IPv4 tunneling driver +[01:16:11:29:27][ 2.171030] NET: Registered protocol family 17 +[01:16:11:29:27][ 2.175699] Key type dns_resolver registered +[01:16:11:29:27][ 2.180146] omap_voltage_late_init: Voltage driver support not added +[01:16:11:29:27][ 2.187052] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[01:16:11:29:27][ 2.193260] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[01:16:11:29:27][ 2.199963] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[01:16:11:29:27][ 2.206171] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[01:16:11:29:27][ 2.213498] Power Management for TI OMAP4+ devices. +[01:16:11:29:27][ 2.218633] Registering SWP/SWPB emulation handler +[01:16:11:29:27][ 2.224758] dmm 4e000000.dmm: workaround for errata i878 in use +[01:16:11:29:27][ 2.232304] dmm 4e000000.dmm: initialized all PAT entries +[01:16:11:29:27][ 2.238796] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[01:16:11:29:27][ 2.256660] hctosys: unable to open rtc device (rtc0) +[01:16:11:29:27][ 2.273716] evm_1v8: disabling +[01:16:11:29:27][ 2.273988] mmc0: host does not support reading read-only switch, assuming write-enable +[01:16:11:29:27][ 2.275877] mmc0: new high speed SDHC card at address 0001 +[01:16:11:29:27][ 2.286419] mmcblk0: mmc0:0001 SD32G 28.8 GiB +[01:16:11:29:27][ 2.291126] mmcblk0: p1 p2 +[01:16:11:29:27][ 2.297675] aic_dvdd: disabling +[01:16:11:29:27][ 2.301037] ldousb: disabling +[01:16:11:29:27][ 2.304534] ALSA device list: +[01:16:11:29:27][ 2.307535] No soundcards found. +[01:16:11:29:27][ 2.312518] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[01:16:11:29:27][ 2.321147] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[01:16:11:29:27][ 2.578726] EXT4-fs (mmcblk0p2): recovery complete +[01:16:11:29:27][ 2.584760] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[01:16:11:29:27][ 2.592941] VFS: Mounted root (ext4 filesystem) on device 179:2. +[01:16:11:29:27][ 2.599903] devtmpfs: mounted +[01:16:11:29:27][ 2.603103] Freeing unused kernel memory: 336K +[01:16:11:29:27][ 2.607588] This architecture does not have kernel memory protection. +[01:16:11:29:28][ 2.797924] systemd[1]: System time before build time, advancing clock. +[01:16:11:29:28][ 2.835004] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[01:16:11:29:28][ 2.847842] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[01:16:11:29:28][ 2.859598] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[01:16:11:29:28][ 2.878127] systemd[1]: Detected architecture arm. +[01:16:11:29:28] +[01:16:11:29:28]Welcome to Arago 2016.12! +[01:16:11:29:28] +[01:16:11:29:28][ 2.907781] systemd[1]: Set hostname to . +[01:16:11:29:28][ 2.966649] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[01:16:11:29:28][ 3.001831] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[01:16:11:29:28][ 3.012216] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[01:16:11:29:28][ 3.022949] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[01:16:11:29:28][ 3.039537] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[01:16:11:29:28][ 3.124001] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[01:16:11:29:28][ 3.133564] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[01:16:11:29:28][ 3.143597] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[01:16:11:29:28][ 3.501447] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[01:16:11:29:28][ 3.509282] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[01:16:11:29:28][ 3.517001] systemd[1]: sysinit.target: Found dependency on basic.target/start +[01:16:11:29:28][ 3.524261] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[01:16:11:29:28][ 3.531729] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[01:16:11:29:28][ 3.541193] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[01:16:11:29:28][ SKIP ] Ordering cycle found, skipping alignment.service +[01:16:11:29:28][ 3.580710] systemd[1]: Created slice System Slice. +[01:16:11:29:28][ OK ] Created slice System Slice. +[01:16:11:29:28][ 3.607096] systemd[1]: Reached target Swap. +[01:16:11:29:28][ OK ] Reached target Swap. +[01:16:11:29:28][ 3.627137] systemd[1]: Listening on Syslog Socket. +[01:16:11:29:28][ OK ] Listening on Syslog Socket. +[01:16:11:29:28][ 3.647032] systemd[1]: Reached target Remote File Systems. +[01:16:11:29:28][ OK ] Reached target Remote File Systems. +[01:16:11:29:28][ 3.677228] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[01:16:11:29:28][ OK ] Started Dispatch Password Requests to Console Directory Watch. +[01:16:11:29:28][ 3.707788] systemd[1]: Created slice system-getty.slice. +[01:16:11:29:28][ OK ] Created slice system-getty.slice. +[01:16:11:29:28][ 3.737226] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[01:16:11:29:28][ OK ] Started Forward Password Requests to Wall Directory Watch. +[01:16:11:29:28][ 3.767033] systemd[1]: Reached target Paths. +[01:16:11:29:28][ OK ] Reached target Paths. +[01:16:11:29:29][ 3.787107] systemd[1]: Listening on Journal Socket (/dev/log). +[01:16:11:29:29][ OK ] Listening on Journal Socket (/dev/log). +[01:16:11:29:29][ 3.817136] systemd[1]: Listening on udev Control Socket. +[01:16:11:29:29][ OK ] Listening on udev Control Socket. +[01:16:11:29:29][ 3.847253] systemd[1]: Listening on Network Service Netlink Socket. +[01:16:11:29:29][ OK ] Listening on Network Service Netlink Socket. +[01:16:11:29:29][ 3.877709] systemd[1]: Created slice system-serial\x2dgetty.slice. +[01:16:11:29:29][ OK ] Created slice system-serial\x2dgetty.slice. +[01:16:11:29:29][ 3.907169] systemd[1]: Listening on Journal Socket. +[01:16:11:29:29][ OK ] Listening on Journal Socket. +[01:16:11:29:29][ 3.977346] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[01:16:11:29:29] Starting Create list of required st... nodes for the current kernel... +[01:16:11:29:29][ 4.009665] systemd[1]: Starting Remount Root and Kernel File Systems... +[01:16:11:29:29] Starting Remount Root and Kernel File Systems... +[01:16:11:29:29][ 4.033209] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[01:16:11:29:29][ 4.043876] systemd[1]: Starting Load Kernel Modules... +[01:16:11:29:29] Starting Load Kernel Modules... +[01:16:11:29:29][ 4.060243] systemd[1]: Mounting Temporary Directory... +[01:16:11:29:29] Mounting Temporary Directory... +[01:16:11:29:29][ 4.117230] systemd[1]: Starting Setup Virtual Console... +[01:16:11:29:29] Starting Setup Virtual Console... +[01:16:11:29:29][ 4.149457] systemd[1]: Mounting Debug File System... +[01:16:11:29:29] Mounting Debug File System... +[01:16:11:29:29][ 4.177254] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[01:16:11:29:29][ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[01:16:11:29:29][ 4.237268] systemd[1]: Starting Journal Service... +[01:16:11:29:29] Starting Journal Service... +[01:16:11:29:29][ 4.267930] systemd[1]: Created slice User and Session Slice. +[01:16:11:29:29][ OK ] Created slice User and Session Slice. +[01:16:11:29:29][ 4.297148] systemd[1]: Reached target Slices. +[01:16:11:29:29][ OK ] Reached target Slices. +[01:16:11:29:29][ 4.317217] systemd[1]: Listening on udev Kernel Socket. +[01:16:11:29:29][ OK ] Listening on udev Kernel Socket. +[01:16:11:29:29][ 4.377118] systemd[1]: Mounting POSIX Message Queue File System... +[01:16:11:29:29] Mounting POSIX Message Queue File System... +[01:16:11:29:29][ 4.404370] systemd[1]: Mounted POSIX Message Queue File System. +[01:16:11:29:29][ OK ] Mounted POSIX Message Queue File System. +[01:16:11:29:29][ 4.427209] systemd[1]: Mounted Debug File System. +[01:16:11:29:29][ OK ] Mounted Debug File System. +[01:16:11:29:29][ 4.447090] systemd[1]: Mounted Temporary Directory. +[01:16:11:29:29][ OK ] Mounted Temporary Directory. +[01:16:11:29:29][ 4.477296] systemd[1]: Started Journal Service. +[01:16:11:29:29][ OK ] Started Journal Service. +[01:16:11:29:29][ OK ] Started Create list of required sta...ce nodes for the current kernel. +[01:16:11:29:29][ OK ] Started Remount Root and Kernel File Systems. +[01:16:11:29:29][FAILED] Failed to start Load Kernel Modules. +[01:16:11:29:29]See 'systemctl status systemd-modules-load.service' for details. +[01:16:11:29:29][ OK ] Started Setup Virtual Console. +[01:16:11:29:30] Starting Apply Kernel Variables... +[01:16:11:29:30] Starting udev Coldplug all Devices... +[01:16:11:29:30] Starting Create Static Device Nodes in /dev... +[01:16:11:29:30] Starting Flush Journal to Persistent Storage... +[01:16:11:29:30][ OK ] Started Apply Kernel Variables. +[01:16:11:29:30][ OK ] Started Create Static Device Nodes in /dev. +[01:16:11:29:30][ 5.166752] systemd-journald[139]: Received request to flush runtime journal from PID 1 +[01:16:11:29:30][ OK ] Started Flush Journal to Persistent Storage. +[01:16:11:29:30] Starting udev Kernel Device Manager... +[01:16:11:29:30][ OK ] Reached target Local File Systems (Pre). +[01:16:11:29:30] Mounting /media/ram... +[01:16:11:29:30] Mounting /var/volatile... +[01:16:11:29:30][ OK ] Mounted /var/volatile. +[01:16:11:29:30][ OK ] Mounted /media/ram. +[01:16:11:29:30][ OK ] Started udev Kernel Device Manager. +[01:16:11:29:30] Starting Load/Save Random Seed... +[01:16:11:29:30][ OK ] Reached target Local File Systems. +[01:16:11:29:30][ 5.725775] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[01:16:11:29:30][ 5.745168] remoteproc0: 55020000.ipu is available +[01:16:11:29:30][ 5.753152] remoteproc0: Note: remoteproc is still under development and considered experimental. +[01:16:11:29:30] Starting Create Volatile Files and Directories...[ 5.766639] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:29:31] +[01:16:11:29:31][ 5.794463] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[01:16:11:29:31][ OK ] Started udev Coldplug all Devices. +[01:16:11:29:31][ OK ] Started Load/Save Random Seed.[ 5.824135] remoteproc1: 40800000.dsp is available +[01:16:11:29:31] +[01:16:11:29:31][ 5.844516] remoteproc1: Note: remoteproc is still under development and considered experimental. +[01:16:11:29:31][ OK ] Started Create Volatile Files and Directories.[ 5.861890] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:29:31] +[01:16:11:29:31][ 5.892968] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[01:16:11:29:31][ 5.931536] remoteproc2: 41000000.dsp is available +[01:16:11:29:31][ 5.961478] remoteproc2: Note: remoteproc is still under development and considered experimental. +[01:16:11:29:31][ 6.003474] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[01:16:11:29:31][ 6.021792] remoteproc1: registered virtio0 (type 7) +[01:16:11:29:31][ OK ] Found device /dev/ttyS0. +[01:16:11:29:31][ 6.100583] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[01:16:11:29:31][ 6.133158] remoteproc2: registered virtio1 (type 7) +[01:16:11:29:31][ 6.180139] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[01:16:11:29:31] Starting Update UTMP about System Boot/Shutdown... +[01:16:11:29:31] Starting Network Time Synchronization... +[01:16:11:29:31][ 6.262899] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[01:16:11:29:31][ 6.373897] remoteproc0: registered virtio2 (type 7) +[01:16:11:29:31][ 6.525703] SCSI subsystem initialized +[01:16:11:29:31][ OK ] Started Update UTMP about System Boot/Shutdown. +[01:16:11:29:31][ 6.560704] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[01:16:11:29:31][ 6.574863] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[01:16:11:29:31][ 6.591672] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[01:16:11:29:31][ OK ] Started Network Time Synchronization. +[01:16:11:29:31][ 6.645236] CAN device driver interface +[01:16:11:29:31] Starting Synchronize System and HW clocks... +[01:16:11:29:31][ OK ] Reached target System Time Synchronized. +[01:16:11:29:32][ 6.784812] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=254) +[01:16:11:29:32][ OK ] Started Synchronize System and HW clocks. +[01:16:11:29:32][ 6.938501] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[01:16:11:29:32][ 6.945268] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[01:16:11:29:32][ OK ] Reached target System Initialization.[ 6.962972] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[01:16:11:29:32] +[01:16:11:29:32][ OK ] Started Daily Cleanup of Temporary Directories. +[01:16:11:29:32][ 7.001278] scsi host0: ahci +[01:16:11:29:32][ 7.007327] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 240 +[01:16:11:29:32][ OK ] Reached target Timers. +[01:16:11:29:32][ OK ] Listening on D-Bus System Message Bus Socket. +[01:16:11:29:32][ OK ] Listening on dropbear.socket. +[01:16:11:29:32][ OK ] Reached target Sockets. +[01:16:11:29:32][ OK ] Reached target Basic System.[ 7.113174] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[01:16:11:29:32] +[01:16:11:29:32] Starting Permit User Sessions... +[01:16:11:29:32][ OK ] Started Kernel Logging Service. +[01:16:11:29:32][ OK ] Started System Logging Service. +[01:16:11:29:32] Starting Login Service... +[01:16:11:29:32] Starting rc.pvr.service... +[01:16:11:29:32][ OK ] Started D-Bus System Message Bus. +[01:16:11:29:32][ 7.387112] ata1: SATA link down (SStatus 0 SControl 300) +[01:16:11:29:32][ 7.489593] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[01:16:11:29:32] Starting Network Service... +[01:16:11:29:32][ OK ] Started Permit User Sessions. +[01:16:11:29:33][ 7.769174] net eth1: initializing cpsw version 1.15 (0) +[01:16:11:29:33][ 7.788893] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[01:16:11:29:33][ 7.801236] net eth0: initialized cpsw ale version 1.4 +[01:16:11:29:33][ OK ] Started Network Service. +[01:16:11:29:33][ 7.817748] net eth0: ALE Table size 1024 +[01:16:11:29:33][ 7.828044] libphy: PHY 48485000.mdio:03 not found +[01:16:11:29:33][ 7.832869] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 +[01:16:11:29:33][ 7.849312] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[01:16:11:29:33][ 7.867896] net eth0: initializing cpsw version 1.15 (0) +[01:16:11:29:33][ OK ] Started rc.pvr.service. +[01:16:11:29:33][ 7.888081] net eth0: phy found : id is : 0x2000a231 +[01:16:11:29:33][ 7.921654] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[01:16:11:29:33][ 8.361861] remoteproc1: powering up 40800000.dsp +[01:16:11:29:33][ 8.371087] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 606416 +[01:16:11:29:33][ 8.409536] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[01:16:11:29:33][ 8.415439] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[01:16:11:29:33][ 8.421414] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[01:16:11:29:33][ 8.460680] remoteproc1: remote processor 40800000.dsp is now up +[01:16:11:29:33][ 8.470844] virtio_rpmsg_bus virtio0: rpmsg host is online +[01:16:11:29:33][ 8.478568] remoteproc2: powering up 41000000.dsp +[01:16:11:29:33][ 8.488370] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 606416 +[01:16:11:29:33][ 8.502236] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[01:16:11:29:33][ 8.508130] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[01:16:11:29:33][ 8.514112] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[01:16:11:29:33][ 8.539096] ------------[ cut here ]------------ +[01:16:11:29:33][ 8.539249] remoteproc2: remote processor 41000000.dsp is now up +[01:16:11:29:33][ 8.549863] WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() +[01:16:11:29:33][ 8.559211] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access +[01:16:11:29:33][ 8.571345] Modules linked in: virtio_rpmsg_bus(+) bc_example(O) extcon_usb_gpio pvrsrvkm(O) ahci_platform libahci_platform libahci c_can_platform libata c_can can_dev omap_sham omap_aes_driver scsi_mod dwc3_omap extcon rtc_omap omap_rng rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[01:16:11:29:33][ 8.599405] CPU: 0 PID: 1 Comm: systemd Tainted: G O 4.4.84-00034-gaa42c960d12c #1 +[01:16:11:29:33][ 8.608139] Hardware name: Generic DRA74X (Flattened Device Tree) +[01:16:11:29:33][ 8.614255] Backtrace: +[01:16:11:29:33][ 8.616731] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[01:16:11:29:33][ 8.624332] r7:c02de608 r6:200f0193 r5:00000000 r4:c094d810 +[01:16:11:29:33][ 8.630054] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[01:16:11:29:33][ 8.637311] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[01:16:11:29:33][ 8.645434] r7:c02de608 r6:00000093 r5:00000009 r4:ef063df0 +[01:16:11:29:33][ 8.651150] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[01:16:11:29:33][ 8.659883] r8:00000017 r7:c0841d48 r6:00000002 r5:c0841980 r4:c0841a24 +[01:16:11:29:33][ 8.666656] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) +[01:16:11:29:33][ 8.675563] r3:ef1f5f00 r2:c0841a24 +[01:16:11:29:33][ 8.679165] r4:80080003 +[01:16:11:29:33][ 8.681720] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) +[01:16:11:29:33][ 8.691063] r10:c097d38b r9:ef1f6300 r8:00000017 r7:00000000 r6:00000000 r5:ef1f6360 +[01:16:11:29:33][ 8.698966] r4:ef20a440 +[01:16:11:29:33][ 8.701521] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) +[01:16:11:29:33][ 8.710428] r10:006663e0 r9:00000000 r8:ef008000 r7:00000000 r6:c0935e44 r5:ef1f6360 +[01:16:11:29:33][ 8.718329] r4:ef1f6300 +[01:16:11:29:33][ 8.720883] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) +[01:16:11:29:33][ 8.729441] r7:00000000 r6:c0935e44 r5:ef1f6360 r4:ef1f6300 +[01:16:11:29:33][ 8.735157] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) +[01:16:11:29:33][ 8.743803] r7:00000000 r6:00000000 r5:00000017 r4:c092b424 +[01:16:11:29:33][ 8.749522] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) +[01:16:11:29:33][ 8.758260] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) +[01:16:11:29:33][ 8.766644] r9:00000000 r8:fa213000 r7:fa212000 r6:ef063fb0 r5:fa21200c r4:c09308ec +[01:16:11:29:33][ 8.774464] [] (gic_handle_irq) from [] (__irq_usr+0x48/0x60) +[01:16:11:29:34][ 8.781976] Exception stack(0xef063fb0 to 0xef063ff8) +[01:16:11:29:34][ 8.787048] 3fa0: 00000000 b6ef47ac 00000000 00000000 +[01:16:11:29:34][ 8.795262] 3fc0: 006ac5a8 b6ef47a8 00000010 00000000 006ac5b0 00000000 006663e0 ffffffef +[01:16:11:29:34][ 8.803475] 3fe0: 00000000 beb75870 beb75894 b6e5c14e 600f0030 ffffffff +[01:16:11:29:34][ 8.810114] r9:00000000 r8:30c5387d r7:30c5387d r6:ffffffff r5:600f0030 r4:b6e5c14e +[01:16:11:29:34][ 8.817931] ---[ end trace 2b00b2596f677c18 ]--- +[01:16:11:29:34][ 8.828833] virtio_rpmsg_bus virtio1: rpmsg host is online +[01:16:11:29:34][ 8.847820] remoteproc0: powering up 55020000.ipu +[01:16:11:29:34][ 8.878213] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 7652492 +[01:16:11:29:34][ 8.885215] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[01:16:11:29:34][ 8.926415] remoteproc0: remote processor 55020000.ipu is now up +[01:16:11:29:34][ 8.934203] virtio_rpmsg_bus virtio2: rpmsg host is online +[01:16:11:29:34][ OK ] Started Login Service. +[01:16:11:29:34][ 9.139993] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[01:16:11:29:34][ 9.153806] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[01:16:11:29:34][ 9.161495] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[01:16:11:29:34][ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch.[ 9.181433] NET: Registered protocol family 41 +[01:16:11:29:34] +[01:16:11:29:34] Starting weston.service... +[01:16:11:29:34][ OK ] Reached target Network. +[01:16:11:29:34] Starting Network Name Resolution... +[01:16:11:29:34][ OK ] Started Serial Getty on ttyS0. +[01:16:11:29:34][ OK ] Started Getty on tty1. +[01:16:11:29:34][ OK ] Started weston.service. +[01:16:11:29:34][ OK ] Started Network Name Resolution. +[01:16:11:29:34] Starting tiipclad-daemon.service... +[01:16:11:29:34] Starting telnetd.service... +[01:16:11:29:34][ OK ] Started tiipclad-daemon.service. +[01:16:11:29:34][ OK ] Started telnetd.service. +[01:16:11:29:40] +[01:16:11:29:40] _____ _____ _ _ +[01:16:11:29:40]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +[01:16:11:29:40]| | _| .'| . | . | | __| _| . | | | -_| _| _| +[01:16:11:29:40]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| +[01:16:11:29:40] |___| |___| +[01:16:11:29:40] +[01:16:11:29:40]Arago Project http://arago-project.org dra7xx-evm ttyS0 +[01:16:11:29:40] +[01:16:11:29:40]Arago 2016.12 dra7xx-evm ttyS0 +[01:16:11:29:40] + +Hi, Looking at the u-boot log, the u-boot version is shown as 2016.05. You can access the SDK and the source code from here: http://downloads.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/03_04_00_03/index_FDS.html Note that this is SDK is quite old (>5 years old), you may face issues in setting it up and the support is limited. We don't recommend this for any new development. Regards Karthik + diff --git a/data2/text/range/30001+/1213840.txt b/data2/text/range/30001+/1213840.txt new file mode 100644 index 0000000000000000000000000000000000000000..3c360992b73d41cba6a1c4a9989e3b3825290a7a --- /dev/null +++ b/data2/text/range/30001+/1213840.txt @@ -0,0 +1,1899 @@ +Ticket Name: TDA4VM: Report call trace when GPU node is in use + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2, hi: ti,We are currently porting the GPU code from previous TDa2 to TDa4. After porting the running code, we found that the kernel occasionally encountered call trace printing. We don't know the specific reason, could you give us some guidance or suggestions? Thank you! (Below is the specific print of call trace) + +Responses: +Hello, This looks like a standard GPU hardware recovery. Can you share the following information 1) SDK Version you are on 2) Are you running from a TI EVM? Or your customer hardware Thanks, Erick + +hello: (1)The SDK version we are using is 8.4 (2)It's not TI EVM, it's our own hardware Thanks, + +Thank you. Does the application continue running, or does it crash and stop running? What issues do you see with it when this happens? And does it reproduce on the TI EVM? I'll shortly share some debug steps for you to collect some logs for our analysis. Thanks, Erick + +hello， (1)When this situation occurred, the application did not crash, it continued to run, and we did not notice any issues happening for the time being. (2)Sorry, we cannot run this program on TI EVM because our board has some hardware changes compared to TI EVM. + +Kong, Thank you for the info, understood. The GPU has had an event that triggered a hardware recovery, and caused the logs you see in your screen-captures. The good thing is it sounds like the GPU recovered successfully, which is better than the application crashing completely. Meanwhile, we will need a copy of the logs to analyze what the issue could be. Could you please apply this patch to see if you still see the issue? pp132915-caching-fw-ro-structures-v2.diff diff --git a/services/server/devices/rgxccb.c b/services/server/devices/rgxccb.c +index 0984c43..e5024a8 100644 +--- a/services/server/devices/rgxccb.c ++++ b/services/server/devices/rgxccb.c +@@ -598,7 +598,9 @@ PVRSRV_ERROR RGXCreateCCB(PVRSRV_RGXDEV_INFO *psDevInfo, + PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(FIRMWARE_CACHED) | + PVRSRV_MEMALLOCFLAG_GPU_READABLE | + PVRSRV_MEMALLOCFLAG_GPU_WRITEABLE | +- PVRSRV_MEMALLOCFLAG_CPU_UNCACHED_WC | ++ ((RGX_IS_FEATURE_VALUE_SUPPORTED(psDevInfo, NUM_OSIDS) && \ ++ (RGX_GET_FEATURE_VALUE(psDevInfo, NUM_OSIDS) == 8)) ? \ ++ PVRSRV_MEMALLOCFLAG_CPU_CACHE_INCOHERENT : PVRSRV_MEMALLOCFLAG_CPU_UNCACHED_WC) | \ + PVRSRV_MEMALLOCFLAG_ZERO_ON_ALLOC | + PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE | + PVRSRV_MEMALLOCFLAG_PHYS_HEAP_HINT(FW_MAIN); +diff --git a/services/server/devices/rogue/rgxfwutils.h b/services/server/devices/rogue/rgxfwutils.h +index de339a2..6b63e49 100644 +--- a/services/server/devices/rogue/rgxfwutils.h ++++ b/services/server/devices/rogue/rgxfwutils.h +@@ -363,7 +363,9 @@ static INLINE IMG_UINT64 RGXReadHWTimerReg(PVRSRV_RGXDEV_INFO *psDevInfo) + PVRSRV_MEMALLOCFLAG_GPU_UNCACHED | \ + PVRSRV_MEMALLOCFLAG_CPU_READABLE | \ + PVRSRV_MEMALLOCFLAG_CPU_WRITEABLE | \ +- PVRSRV_MEMALLOCFLAG_CPU_UNCACHED_WC | \ ++ ((RGX_IS_FEATURE_VALUE_SUPPORTED(psDevInfo, NUM_OSIDS) && \ ++ (RGX_GET_FEATURE_VALUE(psDevInfo, NUM_OSIDS) == 8)) ? \ ++ PVRSRV_MEMALLOCFLAG_CPU_CACHE_INCOHERENT : PVRSRV_MEMALLOCFLAG_CPU_UNCACHED_WC) | \ + PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE | \ + PVRSRV_MEMALLOCFLAG_ZERO_ON_ALLOC | \ + PVRSRV_MEMALLOCFLAG_PHYS_HEAP_HINT(FW_MAIN)) + + Please apply it to your GPU kernel driver and re-build and re-install it into your filesystem. The GPU kernel driver is below: ti-processor-sdk-linux-j7-evm-08_04_00_11/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109 Regards, Erick + +Kong, If you could capture some initial logs for us as well, could you please run the following command before running you applicaiton: pvrdebug -loggroups main,mts,hwr Then, after you see the issue, please run this command: pvrlogdump And share the output here. Thanks, Erick + +hi , Erick We have patched the driver, but the same situation still occurred during runtime. The log is attached as PVR.log. Please refer to it. Thanks, 2248.pvr.log [ 40.729610] PVR_K:(Error): 253: DevicesWatchdogThread: Device status not OK!!! [500] +[ 40.739858] PVR_K: 253: ------------[ PVR DBG: START (High) ]------------ +[ 40.748607] PVR_K: 253: OS kernel info: Linux 5.10.120-g95b90aa828 #1 SMP PREEMPT Sun Apr 23 12:27:10 CST 2023 aarch64 +[ 40.762245] PVR_K: 253: DDK info: Rogue_DDK_Linux_WS rogueddk 1.15@6133109 (release) j721e_linux +[ 40.773626] PVR_K: 253: Time now: 40773618us +[ 40.779083] PVR_K: 253: Services State: OK +[ 40.784315] PVR_K: 253: Server Errors: 1 +[ 40.789394] PVR_K: 253: Connections Device ID:0(128) P1052-V1052-T1058-byd_srv.out +[ 40.799232] PVR_K: 253: ------[ Driver Info ]------ +[ 40.805437] PVR_K: 253: Comparison of UM/KM components: MATCHING +[ 40.813092] PVR_K: 253: KM Arch: 64 Bit +[ 40.818006] PVR_K: 253: UM Connected Clients: 64 Bit +[ 40.824311] PVR_K: 253: UM info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 40.834153] PVR_K: 253: KM info: 1.15 @ 6133109 (release) build options: 0x00000810 +[ 40.844315] PVR_K: 253: Window system: wayland +[ 40.849985] PVR_K: 253: ------[ RGX Device ID:0 Start ]------ +[ 40.857262] PVR_K: 253: ------[ RGX Info ]------ +[ 40.863196] PVR_K: 253: Device Node (Info): 00000000937b90b9 (00000000176514d9) +[ 40.872442] PVR_K: 253: RGX BVNC: 22.104.208.318 (rogue) +[ 40.879239] PVR_K: 253: RGX Device State: Active +[ 40.885472] PVR_K: 253: RGX Power State: ON +[ 40.890854] PVR_K: 253: FW info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 40.901234] PVR_K: 253: BIF0 - OK +[ 40.908274] PVR_K: 253: RGX FW State: FAULT - Idling (HWRState 0x00000001: HWR OK;) +[ 40.920628] PVR_K: 253: RGX FW Power State: RGXFWIF_POW_IDLE (APM disabled: 0 ok, 0 denied, 0 non-idle, 0 retry, 0 other, 0 total. Latency: 100 ms) +[ 40.941548] PVR_K: 253: RGX DVFS: 0 frequency changes. Current frequency: 600.000 MHz (sampled at 40574246045 ns). FW frequency: 100.000 MHz. +[ 40.957555] PVR_K: 253: RGX FW OS 0 - State: active; Freelists: Ok; Priority: 0; MTS on; +[ 40.967798] PVR_K: 253: FW Fault 1: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 40.979093] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d14b, OSTimer = 40.496479102 +[ 40.990939] PVR_K: 253: FW Fault 2: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.002277] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d1f8, OSTimer = 40.496552915 +[ 41.014138] PVR_K: 253: FW Fault 3: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.025434] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d295, OSTimer = 40.496619902 +[ 41.037280] PVR_K: 253: FW Fault 4: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.048607] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d311, OSTimer = 40.496672808 +[ 41.060466] PVR_K: 253: FW Fault 5: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.071768] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d3c6, OSTimer = 40.496750035 +[ 41.083743] PVR_K: 253: FW Fault 6: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.095042] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d444, OSTimer = 40.496803795 +[ 41.106893] PVR_K: 253: FW Fault 7: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.118185] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d76f, OSTimer = 40.497149878 +[ 41.130031] PVR_K: 253: FW Fault 8: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 41.141325] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d7c2, OSTimer = 40.497185291 +[ 41.153194] PVR_K: 253: Number of HWR: GP(0/0+0), 2D(0/0+0), TA(0/0+0), 3D(1/1+0), CDM(0/0+0), RAY(0/0+0), FALSE(0,0,0,0,0,0) +[ 41.167429] PVR_K: 253: DM 0 (GP) +[ 41.171691] PVR_K: 253: DM 1 (HWRflags 0x00000000: working;) +[ 41.178866] PVR_K: 253: DM 2 (HWRflags 0x00000000: working;) +[ 41.186046] PVR_K: 253: DM 3 (HWRflags 0x00000000: working;) +[ 41.193226] PVR_K: 253: Recovery 1: PID = 1052, frame = 0, HWRTData = 0x00000000, EventStatus = 0x00000400, Guilty Lockup +[ 41.207230] PVR_K: 253: CRTimer = 0x000004683b07, OSTimer = 40.563952224, CyclesElapsed = 40139008 +[ 41.220054] PVR_K: 253: PreResetTimeInCycles = 23296, HWResetTimeInCycles = 20224, TotalResetTimeInCycles = 43520 +[ 41.234494] PVR_K: 253: DM 4 (HWRflags 0x00000000: working;) +[ 41.241674] PVR_K: 253: DM 5 (HWRflags 0x00000000: working;) +[ 41.248855] PVR_K: 253: RGX Kernel CCB WO:0x14 RO:0x14 +[ 41.255380] PVR_K: 253: RGX Firmware CCB WO:0x4 RO:0x4 +[ 41.261897] PVR_K: 253: RGX Kernel CCB commands executed = 20 +[ 41.269181] PVR_K: 253: RGX SLR: Forced UFO updates requested = 0 +[ 41.276898] PVR_K: 253: RGX Errors: WGP:0, TRP:0 +[ 41.282774] PVR_K: 253: Thread0: FW IRQ count = 13 +[ 41.288867] PVR_K: 253: Last sampled IRQ count in LISR = 13 +[ 41.295956] PVR_K: 253: FW System config flags = 0x00020000 (Ctx switch options: Medium CSW profile; VDM CS INDEX mode;) +[ 41.309643] PVR_K: 253: FW OS config flags = 0x0000000F (Ctx switch: TDM; TA; 3D; CDM;) +[ 41.319752] PVR_K: 253: ------[ RGX registers ]------ +[ 41.326179] PVR_K: 253: RGX Register Base Address (Linear): 0x00000000d5b22453 +[ 41.335528] PVR_K: 253: RGX Register Base Address (Physical): 0x4E20000000 +[ 41.344229] PVR_K: 253: CORE_ID : 0x0000000008470000 +[ 41.352922] PVR_K: 253: CORE_REVISION : 0x00D0013E +[ 41.360751] PVR_K: 253: DESIGNER_REV_FIELD1 : 0x00000000 +[ 41.368572] PVR_K: 253: DESIGNER_REV_FIELD2 : 0x00000000 +[ 41.376408] PVR_K: 253: CHANGESET_NUMBER : 0x0000000000000000 +[ 41.385109] PVR_K: 253: CLK_CTRL : 0x0aaaaa002a2aaaaa +[ 41.393818] PVR_K: 253: CLK_STATUS : 0x0000000000600000 +[ 41.402517] PVR_K: 253: CLK_CTRL2 : 0x0000000000000000 +[ 41.411868] PVR_K: 253: CLK_STATUS2 : 0x0000000000000000 +[ 41.420613] PVR_K: 253: EVENT_STATUS : 0x00004410 +[ 41.428508] PVR_K: 253: TIMER : 0x0000000004813b4e +[ 41.437265] PVR_K: 253: BIF_FAULT_BANK0_MMU_STATUS : 0x00000000 +[ 41.445202] PVR_K: 253: BIF_FAULT_BANK0_REQ_STATUS : 0x0000000000000000 +[ 41.453930] PVR_K: 253: BIF_FAULT_BANK1_MMU_STATUS : 0x00000000 +[ 41.461811] PVR_K: 253: BIF_FAULT_BANK1_REQ_STATUS : 0x0000000000000000 +[ 41.470530] PVR_K: 253: BIF_MMU_STATUS : 0x00000000 +[ 41.478427] PVR_K: 253: BIF_MMU_ENTRY : 0x00000000 +[ 41.486276] PVR_K: 253: BIF_MMU_ENTRY_STATUS : 0x0000000000000000 +[ 41.495018] PVR_K: 253: BIF_STATUS_MMU : 0x00000000 +[ 41.502853] PVR_K: 253: BIF_READS_EXT_STATUS : 0x00000000 +[ 41.510745] PVR_K: 253: BIF_READS_INT_STATUS : 0x00000000 +[ 41.518584] PVR_K: 253: BIFPM_STATUS_MMU : 0x00000000 +[ 41.526458] PVR_K: 253: BIFPM_READS_EXT_STATUS : 0x00000000 +[ 41.534303] PVR_K: 253: BIFPM_READS_INT_STATUS : 0x00000000 +[ 41.542262] PVR_K: 253: BIF_CAT_BASE_INDEX : 0x0000000000000100 +[ 41.550988] PVR_K: 253: BIF_CAT_BASE0 : 0x0000000000000000 +[ 41.559745] PVR_K: 253: BIF_CAT_BASE1 : 0x00000008abf34000 +[ 41.568456] PVR_K: 253: BIF_CAT_BASE2 : 0x0000000000000000 +[ 41.577210] PVR_K: 253: BIF_CAT_BASE3 : 0x0000000000000000 +[ 41.585916] PVR_K: 253: BIF_CAT_BASE4 : 0x0000000000000000 +[ 41.594652] PVR_K: 253: BIF_CAT_BASE5 : 0x0000000000000000 +[ 41.603356] PVR_K: 253: BIF_CAT_BASE6 : 0x0000000000000000 +[ 41.612094] PVR_K: 253: BIF_CAT_BASE7 : 0x0000000000000000 +[ 41.620793] PVR_K: 253: BIF_CTRL_INVAL : 0x00000000 +[ 41.628683] PVR_K: 253: BIF_CTRL : 0x000000C0 +[ 41.636520] PVR_K: 253: BIF_PM_CAT_BASE_VCE0 : 0x0000000000000000 +[ 41.645267] PVR_K: 253: BIF_PM_CAT_BASE_TE0 : 0x0000000000000000 +[ 41.653978] PVR_K: 253: BIF_PM_CAT_BASE_ALIST0 : 0x0000000000000000 +[ 41.662717] PVR_K: 253: BIF_PM_CAT_BASE_VCE1 : 0x0000000000000000 +[ 41.671425] PVR_K: 253: BIF_PM_CAT_BASE_TE1 : 0x0000000000000000 +[ 41.680162] PVR_K: 253: BIF_PM_CAT_BASE_ALIST1 : 0x0000000000000000 +[ 41.688882] PVR_K: 253: PERF_TA_PHASE : 0x00000000 +[ 41.696803] PVR_K: 253: PERF_TA_CYCLE : 0x00000000 +[ 41.704653] PVR_K: 253: PERF_3D_PHASE : 0x00000006 +[ 41.712586] PVR_K: 253: PERF_3D_CYCLE : 0x0000843E +[ 41.720439] PVR_K: 253: PERF_TA_OR_3D_CYCLE : 0x0000843E +[ 41.728283] PVR_K: 253: PERF_TA_AND_3D_CYCLE : 0x00000000 +[ 41.736124] PVR_K: 253: PERF_COMPUTE_PHASE : 0x00000000 +[ 41.743975] PVR_K: 253: PERF_COMPUTE_CYCLE : 0x00000000 +[ 41.751872] PVR_K: 253: PM_PARTIAL_RENDER_ENABLE : 0x00000000 +[ 41.759718] PVR_K: 253: ISP_RENDER : 0x00000003 +[ 41.767558] PVR_K: 253: TLA_STATUS : 0x0000000000000000 +[ 41.776264] PVR_K: 253: MCU_FENCE : 0x0000018000000000 +[ 41.784961] PVR_K: 253: VDM_CONTEXT_STORE_STATUS : 0x00000001 +[ 41.792782] PVR_K: 253: VDM_CONTEXT_STORE_TASK0 : 0x0000000000000000 +[ 41.801481] PVR_K: 253: VDM_CONTEXT_STORE_TASK1 : 0x0000000000000000 +[ 41.810199] PVR_K: 253: VDM_CONTEXT_STORE_TASK2 : 0x0000000000000000 +[ 41.818900] PVR_K: 253: VDM_CONTEXT_RESUME_TASK0 : 0x0000000000000000 +[ 41.827598] PVR_K: 253: VDM_CONTEXT_RESUME_TASK1 : 0x0000000000000000 +[ 41.836301] PVR_K: 253: VDM_CONTEXT_RESUME_TASK2 : 0x0000000000000000 +[ 41.845005] PVR_K: 253: ISP_CTL : 0x0002B000 +[ 41.852836] PVR_K: 253: ISP_STATUS : 0x00000003 +[ 41.860660] PVR_K: 253: MTS_INTCTX : 0x00000000 +[ 41.868494] PVR_K: 253: MTS_BGCTX : 0x00000000 +[ 41.876334] PVR_K: 253: MTS_BGCTX_COUNTED_SCHEDULE : 0x00000000 +[ 41.884171] PVR_K: 253: MTS_SCHEDULE : 0x00000000 +[ 41.891992] PVR_K: 253: MTS_GPU_INT_STATUS : 0x00004410 +[ 41.899825] PVR_K: 253: CDM_CONTEXT_STORE_STATUS : 0x00000000 +[ 41.907658] PVR_K: 253: CDM_CONTEXT_PDS0 : 0x0000000000000000 +[ 41.916346] PVR_K: 253: CDM_CONTEXT_PDS1 : 0x0000000000000000 +[ 41.925035] PVR_K: 253: CDM_TERMINATE_PDS : 0x0000000000000000 +[ 41.933725] PVR_K: 253: CDM_TERMINATE_PDS1 : 0x0000000000000000 +[ 41.942430] PVR_K: 253: SIDEKICK_IDLE : 0x0000007E +[ 41.950256] PVR_K: 253: SLC_IDLE : 0x000000FF +[ 41.958076] PVR_K: 253: SLC_STATUS0 : 0x00000000 +[ 41.965913] PVR_K: 253: SLC_STATUS1 : 0x0000000000000000 +[ 41.974602] PVR_K: 253: SLC_STATUS2 : 0x0000000000000000 +[ 41.983299] PVR_K: 253: SLC_CTRL_BYPASS : 0x01000000 +[ 41.991143] PVR_K: 253: SLC_CTRL_MISC : 0x0000000000200003 +[ 41.999847] PVR_K: 253: MIPS_ADDR_REMAP1_CONFIG1 : 0x1FC00001 +[ 42.007670] PVR_K: 253: MIPS_ADDR_REMAP1_CONFIG2 : 0x00000008b063600c +[ 42.016359] PVR_K: 253: MIPS_ADDR_REMAP2_CONFIG1 : 0x1FC01001 +[ 42.024189] PVR_K: 253: MIPS_ADDR_REMAP2_CONFIG2 : 0x00000008b065300c +[ 42.032885] PVR_K: 253: MIPS_ADDR_REMAP3_CONFIG1 : 0x1FC02001 +[ 42.040703] PVR_K: 253: MIPS_ADDR_REMAP3_CONFIG2 : 0x00000008b063500c +[ 42.049391] PVR_K: 253: MIPS_ADDR_REMAP4_CONFIG1 : 0x1FC00000 +[ 42.057212] PVR_K: 253: MIPS_ADDR_REMAP4_CONFIG2 : 0x000000000000000c +[ 42.065909] PVR_K: 253: MIPS_ADDR_REMAP5_CONFIG1 : 0x00000001 +[ 42.073740] PVR_K: 253: MIPS_ADDR_REMAP5_CONFIG2 : 0x00000008b063600c +[ 42.082428] PVR_K: 253: MIPS_WRAPPER_CONFIG : 0x000000000001cf80 +[ 42.091117] PVR_K: 253: MIPS_EXCEPTION_STATUS : 0x00000020 +[ 42.099064] PVR_K: 253: ---- [ MIPS internal state ] ---- +[ 42.105920] PVR_K: 253: PC : 0xC00171C4 +[ 42.113749] PVR_K: 253: STATUS_REGISTER : 0x00481C05 +[ 42.121594] PVR_K: 253: CAUSE_REGISTER : 0x00800000 +[ 42.129434] PVR_K: 253: BAD_REGISTER : 0xC00171B8 +[ 42.137255] PVR_K: 253: EPC : 0xC00171C0 +[ 42.145084] PVR_K: 253: SP : 0xCF600FE0 +[ 42.152907] PVR_K: 253: BAD_INSTRUCTION : 0x00000000 +[ 42.160731] PVR_K: 253: TLB : +[ 42.167363] PVR_K: 253: 0) VA 0xCF800000 ( 64k) -> PA0 0xe20000000 DV , PA1 0x00000000 C +[ 42.178111] PVR_K: 253: 1) VA 0xCF000000 ( 16k) -> PA0 0x8b0620000 DVGC, PA1 0x8b0624000 DVGC +[ 42.188974] PVR_K: 253: 2) VA 0xCF600000 ( 4k) -> PA0 0x8b0654000 DV C, PA1 0x00000000 C +[ 42.199730] PVR_K: 253: 3) VA 0xC0032000 ( 4k) -> PA0 0x8b0650000 DVGC, PA1 0x8b0651000 DVGC +[ 42.210586] PVR_K: 253: 4) VA 0xF0008000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 42.221226] PVR_K: 253: 5) VA 0xC001C000 ( 4k) -> PA0 0x8b065a000 VGC, PA1 0x8b065b000 VGC +[ 42.232085] PVR_K: 253: 6) VA 0xC001A000 ( 4k) -> PA0 0x8b0658000 DVG , PA1 0x8b0659000 DVG +[ 42.242950] PVR_K: 253: 7) VA 0xC0006000 ( 4k) -> PA0 0x8b0613000 DVGC, PA1 0x8b0614000 DVGC +[ 42.253827] PVR_K: 253: 8) VA 0xC000A000 ( 4k) -> PA0 0x8b0617000 DVGC, PA1 0x8b0618000 DVGC +[ 42.264683] PVR_K: 253: 9) VA 0xC0026000 ( 4k) -> PA0 0x8b067b000 DVG , PA1 0x8b06cf000 DVG +[ 42.275546] PVR_K: 253: 10) VA 0xF0014000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 42.286189] PVR_K: 253: 11) VA 0xC0016000 ( 4k) -> PA0 0x8b0633000 DVGC, PA1 0x8b0634000 DVGC +[ 42.297050] PVR_K: 253: 12) VA 0xF0018000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 42.307688] PVR_K: 253: 13) VA 0xF001A000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 42.318332] PVR_K: 253: 14) VA 0xC0020000 ( 4k) -> PA0 0x8b0671000 DVG , PA1 0x8b0673000 DVG +[ 42.329205] PVR_K: 253: 15) VA 0xC0002000 ( 4k) -> PA0 0x8b060f000 DVGC, PA1 0x8b0610000 DVGC +[ 42.340072] PVR_K: 253: -------------------------------- +[ 42.346814] PVR_K: 253: ------[ RGX FW Trace Info ]------ +[ 42.353668] PVR_K: 253: Debug log type: none +[ 42.359105] PVR_K: 253: RGX FW thread 0: Trace buffer not yet allocated +[ 42.367467] PVR_K: 253: ------[ Full CCB Status ]------ +[ 42.374102] PVR_K: 253: FWCtx 0xC0028300 (TQ_3D-P1052-T1058-byd_srv.out) +[ 42.382578] PVR_K: 253: `-- +[ 42.387152] PVR_K: 253: FWCtx 0xC0028040 (TA-P1052-T1058-byd_srv.out) +[ 42.395311] PVR_K: 253: `-- +[ 42.399889] PVR_K: 253: FWCtx 0xC00280E0 (3D-P1052-T1058-byd_srv.out) +[ 42.408045] PVR_K: 253: `-- +[ 42.412621] PVR_K: 253: ------[ RGX Device ID:0 End ]------ +[ 42.419690] PVR_K: 253: ------[ System Summary Device ID:0 ]------ +[ 42.427507] PVR_K: 253: Device System Power State: ON +[ 42.433916] PVR_K: 253: MaxHWTOut: 500000us, WtTryCt: 10000, WDGTOut(on,off): (10000ms,3600000ms) +[ 42.445105] PVR_K: 253: ------[ Server Thread Summary ]------ +[ 42.452393] PVR_K: 253: pvr_defer_free : Running +[ 42.458482] PVR_K: 253: Number of deferred cleanup items : 0 +[ 42.466088] PVR_K: 253: pvr_device_wdg : Running +[ 42.472178] PVR_K: 253: pvr_cacheop : Running +[ 42.477943] PVR_K: 253: Configuration: QSZ: 16, UKT: -1, KDFT: 131072, LINESIZE: 64, PGSIZE: 4096, KDF: Yes, URBF: Yes +[ 42.491858] PVR_K: 253: Pending deferred CacheOp entries : 0 +[ 42.499470] PVR_K: 253: ------[ AppHint Settings ]------ +[ 42.506218] PVR_K: 253: Build Vars +[ 42.510795] PVR_K: 253: EnableTrustedDeviceAceConfig: N +[ 42.517858] PVR_K: 253: CleanupThreadPriority: 0x00000005 +[ 42.525141] PVR_K: 253: CacheOpThreadPriority: 0x00000001 +[ 42.532454] PVR_K: 253: WatchdogThreadPriority: 0x00000000 +[ 42.539877] PVR_K: 253: HWPerfClientBufferSize: 0x000c0000 +[ 42.547306] PVR_K: 253: Module Params +[ 42.552398] PVR_K: 253: none +[ 42.556707] PVR_K: 253: Debug Info Params +[ 42.562233] PVR_K: 253: CacheOpConfig: 0x0000000c +[ 42.568798] PVR_K: 253: CacheOpUMKMThresholdSize: 0xffffffff +[ 42.576600] PVR_K: 253: Debug Info Params Device ID: 0 +[ 42.583568] PVR_K: 253: none +[ 42.587799] PVR_K: 253: ------[ HTB Log state: Off ]------ +[ 42.594985] PVR_K: 253: ------[ Active Sync Checkpoints ]------ +[ 42.602628] ------[ Native Fence Sync: timelines ]------ +[ 42.609291] foreign_sync: @0 ctx=1 refs=1 +[ 42.614557] sw: RM_SWTimeline-byd_srv.out-1052 @0 cur=0 +[ 42.621201] rogue-ta3d: @0 ctx=3 refs=1 +[ 42.626143] rogue-tq3d: @0 ctx=5 refs=1 +[ 42.631124] QE-byd_srv.out-1052: @4 ctx=6 refs=2 +[ 42.636886] @3: (++) refs=1 fwaddr=0xc002b019 enqueue=1 status=Signalled 3-TQM +[ 42.646246] PVR_K: 253: ------------[ PVR DBG: END ]------------ +[ 42.654046] ------------[ cut here ]------------ +[ 42.659938] WARNING: CPU: 1 PID: 253 at /home/hhw3516496/workspace/TDA4_1018/tda4_linux_os_v8_4/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109/binary_j721e_linux_wayland_release/target_aarch64/kbuild/services/server/common/pvr_notifier.c:529 PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 42.692669] Modules linked in: bluetooth ecdh_generic ecc rfkill xhci_plat_hcd xhci_hcd cdns3 udc_core roles ti_am335x_adc omap_rng kfifo_buf rng_core irq_pruss_intc rpmsg_char pru_rproc usbcore icss_iep usb_common crct10dif_ce snd_soc_j721e_evm ti_j721e_cpsw_virt_mac phy_can_transceiver ti_k3_r5_remoteproc ti_am335x_tscadc pruss pvrsrvkm(O) sa2ul vxd_dec vxe_enc sha512_generic videobuf2_dma_sg snd_soc_pcm3168a_i2c authenc videobuf2_dma_contig v4l2_mem2mem ti_k3_dsp_remoteproc cdns_dphy videobuf2_memops videobuf2_v4l2 snd_soc_pcm3168a virtio_rpmsg_bus videobuf2_common cdns3_ti m_can_platform m_can can_dev rti_wdt sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6 +[ 42.765814] CPU: 1 PID: 253 Comm: pvr_device_wdg Tainted: G O 5.10.120-g95b90aa828 #1 +[ 42.777201] Hardware name: Texas Instruments K3 J721E SoC (DT) +[ 42.784474] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) +[ 42.792065] pc : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 42.798984] lr : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 42.805820] sp : ffff8000123e3c80 +[ 42.809950] x29: ffff8000123e3c80 x28: 0000000000000000 +[ 42.816573] x27: ffff8000121b3918 x26: ffff800008d687e0 +[ 42.823195] x25: ffff00082d572000 x24: 0000000000000009 +[ 42.829818] x23: 0000000000000002 x22: 0000000000000000 +[ 42.836441] x21: 0000000000000000 x20: ffff00082d5720d8 +[ 42.843063] x19: ffff00082d47caa0 x18: 0000000000000000 +[ 42.849686] x17: 0000000000000000 x16: 0000000000000000 +[ 42.856309] x15: 0000000000000000 x14: 0000000000000302 +[ 42.862931] x13: 0000000000000000 x12: 0000000000000000 +[ 42.869553] x11: 000000000000004f x10: 00000000000009c0 +[ 42.876178] x9 : ffff8000123e3ae0 x8 : ffff00082b5d8a20 +[ 42.882801] x7 : ffff00087f9e41c0 x6 : ffff00087f9e4140 +[ 42.889424] x5 : 00000000410fd080 x4 : 0000000000f0000f +[ 42.896047] x3 : 0000000000000000 x2 : ffffffffffffff00 +[ 42.902670] x1 : 0000000000000000 x0 : ffff00082bdb8c00 +[ 42.909294] Call trace: +[ 42.912454] PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 42.918922] DevicesWatchdogThread_ForEachVaCb+0x14c/0x158 [pvrsrvkm] +[ 42.927036] List_PVRSRV_DEVICE_NODE_ForEach_va+0x74/0xb0 [pvrsrvkm] +[ 42.935030] DevicesWatchdogThread+0x144/0x210 [pvrsrvkm] +[ 42.941821] OSThreadRun+0x24/0x60 [pvrsrvkm] +[ 42.947262] kthread+0x140/0x160 +[ 42.951284] ret_from_fork+0x10/0x34 +[ 42.955737] ---[ end trace b9b2eb3c337e0983 ]--- +[ 42.964965] PVR_K: 253: ------------[ PVR DBG: START (High) ]------------ +[ 42.973750] PVR_K: 253: OS kernel info: Linux 5.10.120-g95b90aa828 #1 SMP PREEMPT Sun Apr 23 12:27:10 CST 2023 aarch64 +[ 42.987580] PVR_K: 253: DDK info: Rogue_DDK_Linux_WS rogueddk 1.15@6133109 (release) j721e_linux +[ 42.998886] PVR_K: 253: Time now: 42998876us +[ 43.004524] PVR_K: 253: Services State: OK +[ 43.009873] PVR_K: 253: Server Errors: 1 +[ 43.014993] PVR_K: 253: Connections Device ID:0(128) P1052-V1052-T1058-byd_srv.out +[ 43.024724] PVR_K: 253: ------[ Driver Info ]------ +[ 43.031103] PVR_K: 253: Comparison of UM/KM components: MATCHING +[ 43.038861] PVR_K: 253: KM Arch: 64 Bit +[ 43.043910] PVR_K: 253: UM Connected Clients: 64 Bit +[ 43.050342] PVR_K: 253: UM info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 43.060300] PVR_K: 253: KM info: 1.15 @ 6133109 (release) build options: 0x00000810 +[ 43.070242] PVR_K: 253: Window system: wayland +[ 43.075975] PVR_K: 253: ------[ RGX Device ID:0 Start ]------ +[ 43.083462] PVR_K: 253: ------[ RGX Info ]------ +[ 43.089507] PVR_K: 253: Device Node (Info): 00000000937b90b9 (00000000176514d9) +[ 43.098930] PVR_K: 253: RGX BVNC: 22.104.208.318 (rogue) +[ 43.105771] PVR_K: 253: RGX Device State: Active +[ 43.111766] PVR_K: 253: RGX Power State: ON +[ 43.117280] PVR_K: 253: FW info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 43.127210] PVR_K: 253: BIF0 - OK +[ 43.131604] PVR_K: 253: RGX FW State: FAULT - Idling (HWRState 0x00000001: HWR OK;) +[ 43.141476] PVR_K: 253: RGX FW Power State: RGXFWIF_POW_IDLE (APM disabled: 0 ok, 0 denied, 0 non-idle, 0 retry, 0 other, 0 total. Latency: 100 ms) +[ 43.158316] PVR_K: 253: RGX DVFS: 0 frequency changes. Current frequency: 600.000 MHz (sampled at 40574246045 ns). FW frequency: 100.000 MHz. +[ 43.174543] PVR_K: 253: RGX FW OS 0 - State: active; Freelists: Ok; Priority: 0; MTS on; +[ 43.185062] PVR_K: 253: FW Fault 1: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.196659] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d14b, OSTimer = 40.496479102 +[ 43.208783] PVR_K: 253: FW Fault 2: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.220319] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d1f8, OSTimer = 40.496552915 +[ 43.232458] PVR_K: 253: FW Fault 3: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.243993] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d295, OSTimer = 40.496619902 +[ 43.255973] PVR_K: 253: FW Fault 4: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.267297] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d311, OSTimer = 40.496672808 +[ 43.279159] PVR_K: 253: FW Fault 5: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.290469] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d3c6, OSTimer = 40.496750035 +[ 43.302328] PVR_K: 253: FW Fault 6: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.313625] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d444, OSTimer = 40.496803795 +[ 43.325473] PVR_K: 253: FW Fault 7: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.336771] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d76f, OSTimer = 40.497149878 +[ 43.348663] PVR_K: 253: FW Fault 8: "Unknown Client CCB command" (firmware/rgxfw_client_ccb.c:499) +[ 43.359987] PVR_K: 253: Data = 0xc0028300, CRTimer = 0x00000465d7c2, OSTimer = 40.497185291 +[ 43.371851] PVR_K: 253: Number of HWR: GP(0/0+0), 2D(0/0+0), TA(0/0+0), 3D(1/1+0), CDM(0/0+0), RAY(0/0+0), FALSE(0,0,0,0,0,0) +[ 43.386085] PVR_K: 253: DM 0 (GP) +[ 43.390341] PVR_K: 253: DM 1 (HWRflags 0x00000000: working;) +[ 43.397520] PVR_K: 253: DM 2 (HWRflags 0x00000000: working;) +[ 43.404698] PVR_K: 253: DM 3 (HWRflags 0x00000000: working;) +[ 43.411877] PVR_K: 253: Recovery 1: PID = 1052, frame = 0, HWRTData = 0x00000000, EventStatus = 0x00000400, Guilty Lockup +[ 43.425882] PVR_K: 253: CRTimer = 0x000004683b07, OSTimer = 40.563952224, CyclesElapsed = 40139008 +[ 43.438695] PVR_K: 253: PreResetTimeInCycles = 23296, HWResetTimeInCycles = 20224, TotalResetTimeInCycles = 43520 +[ 43.453132] PVR_K: 253: DM 4 (HWRflags 0x00000000: working;) +[ 43.460307] PVR_K: 253: DM 5 (HWRflags 0x00000000: working;) +[ 43.467481] PVR_K: 253: RGX Kernel CCB WO:0x14 RO:0x14 +[ 43.474008] PVR_K: 253: RGX Firmware CCB WO:0x4 RO:0x4 +[ 43.480541] PVR_K: 253: RGX Kernel CCB commands executed = 20 +[ 43.487822] PVR_K: 253: RGX SLR: Forced UFO updates requested = 0 +[ 43.495535] PVR_K: 253: RGX Errors: WGP:0, TRP:0 +[ 43.501408] PVR_K: 253: Thread0: FW IRQ count = 13 +[ 43.507494] PVR_K: 253: Last sampled IRQ count in LISR = 13 +[ 43.514565] PVR_K: 253: FW System config flags = 0x00020000 (Ctx switch options: Medium CSW profile; VDM CS INDEX mode;) +[ 43.528254] PVR_K: 253: FW OS config flags = 0x0000000F (Ctx switch: TDM; TA; 3D; CDM;) +[ 43.538377] PVR_K: 253: ------[ RGX registers ]------ +[ 43.544794] PVR_K: 253: RGX Register Base Address (Linear): 0x00000000d5b22453 +[ 43.554141] PVR_K: 253: RGX Register Base Address (Physical): 0x4E20000000 +[ 43.562828] PVR_K: 253: CORE_ID : 0x0000000008470000 +[ 43.571522] PVR_K: 253: CORE_REVISION : 0x00D0013E +[ 43.579342] PVR_K: 253: DESIGNER_REV_FIELD1 : 0x00000000 +[ 43.587160] PVR_K: 253: DESIGNER_REV_FIELD2 : 0x00000000 +[ 43.594984] PVR_K: 253: CHANGESET_NUMBER : 0x0000000000000000 +[ 43.603687] PVR_K: 253: CLK_CTRL : 0x0aaaaa002a2aaaaa +[ 43.612397] PVR_K: 253: CLK_STATUS : 0x0000000000600000 +[ 43.621101] PVR_K: 253: CLK_CTRL2 : 0x0000000000000000 +[ 43.629791] PVR_K: 253: CLK_STATUS2 : 0x0000000000000000 +[ 43.638479] PVR_K: 253: EVENT_STATUS : 0x00004410 +[ 43.646306] PVR_K: 253: TIMER : 0x0000000004d08bd7 +[ 43.655001] PVR_K: 253: BIF_FAULT_BANK0_MMU_STATUS : 0x00000000 +[ 43.662833] PVR_K: 253: BIF_FAULT_BANK0_REQ_STATUS : 0x0000000000000000 +[ 43.671543] PVR_K: 253: BIF_FAULT_BANK1_MMU_STATUS : 0x00000000 +[ 43.679387] PVR_K: 253: BIF_FAULT_BANK1_REQ_STATUS : 0x0000000000000000 +[ 43.688101] PVR_K: 253: BIF_MMU_STATUS : 0x00000000 +[ 43.695944] PVR_K: 253: BIF_MMU_ENTRY : 0x00000000 +[ 43.703799] PVR_K: 253: BIF_MMU_ENTRY_STATUS : 0x0000000000000000 +[ 43.712521] PVR_K: 253: BIF_STATUS_MMU : 0x00000000 +[ 43.720352] PVR_K: 253: BIF_READS_EXT_STATUS : 0x00000000 +[ 43.728178] PVR_K: 253: BIF_READS_INT_STATUS : 0x00000000 +[ 43.736011] PVR_K: 253: BIFPM_STATUS_MMU : 0x00000000 +[ 43.743837] PVR_K: 253: BIFPM_READS_EXT_STATUS : 0x00000000 +[ 43.751662] PVR_K: 253: BIFPM_READS_INT_STATUS : 0x00000000 +[ 43.759485] PVR_K: 253: BIF_CAT_BASE_INDEX : 0x0000000000000100 +[ 43.768184] PVR_K: 253: BIF_CAT_BASE0 : 0x0000000000000000 +[ 43.776888] PVR_K: 253: BIF_CAT_BASE1 : 0x00000008abf34000 +[ 43.785578] PVR_K: 253: BIF_CAT_BASE2 : 0x0000000000000000 +[ 43.794288] PVR_K: 253: BIF_CAT_BASE3 : 0x0000000000000000 +[ 43.802993] PVR_K: 253: BIF_CAT_BASE4 : 0x0000000000000000 +[ 43.811712] PVR_K: 253: BIF_CAT_BASE5 : 0x0000000000000000 +[ 43.820428] PVR_K: 253: BIF_CAT_BASE6 : 0x0000000000000000 +[ 43.829312] PVR_K: 253: BIF_CAT_BASE7 : 0x0000000000000000 +[ 43.838194] PVR_K: 253: BIF_CTRL_INVAL : 0x00000000 +[ 43.846206] PVR_K: 253: BIF_CTRL : 0x000000C0 +[ 43.854128] PVR_K: 253: BIF_PM_CAT_BASE_VCE0 : 0x0000000000000000 +[ 43.862918] PVR_K: 253: BIF_PM_CAT_BASE_TE0 : 0x0000000000000000 +[ 43.871826] PVR_K: 253: BIF_PM_CAT_BASE_ALIST0 : 0x0000000000000000 +[ 43.880624] PVR_K: 253: BIF_PM_CAT_BASE_VCE1 : 0x0000000000000000 +[ 43.889394] PVR_K: 253: BIF_PM_CAT_BASE_TE1 : 0x0000000000000000 +[ 43.898297] PVR_K: 253: BIF_PM_CAT_BASE_ALIST1 : 0x0000000000000000 +[ 43.907266] PVR_K: 253: PERF_TA_PHASE : 0x00000000 +[ 43.915314] PVR_K: 253: PERF_TA_CYCLE : 0x00000000 +[ 43.923335] PVR_K: 253: PERF_3D_PHASE : 0x00000006 +[ 43.931413] PVR_K: 253: PERF_3D_CYCLE : 0x0000843E +[ 43.939451] PVR_K: 253: PERF_TA_OR_3D_CYCLE : 0x0000843E +[ 43.947485] PVR_K: 253: PERF_TA_AND_3D_CYCLE : 0x00000000 +[ 43.955545] PVR_K: 253: PERF_COMPUTE_PHASE : 0x00000000 +[ 43.963597] PVR_K: 253: PERF_COMPUTE_CYCLE : 0x00000000 +[ 43.971663] PVR_K: 253: PM_PARTIAL_RENDER_ENABLE : 0x00000000 +[ 43.979809] PVR_K: 253: ISP_RENDER : 0x00000003 +[ 43.987894] PVR_K: 253: TLA_STATUS : 0x0000000000000000 +[ 43.996951] PVR_K: 253: MCU_FENCE : 0x0000018000000000 +[ 44.005894] PVR_K: 253: VDM_CONTEXT_STORE_STATUS : 0x00000001 +[ 44.013949] PVR_K: 253: VDM_CONTEXT_STORE_TASK0 : 0x0000000000000000 +[ 44.022901] PVR_K: 253: VDM_CONTEXT_STORE_TASK1 : 0x0000000000000000 +[ 44.031844] PVR_K: 253: VDM_CONTEXT_STORE_TASK2 : 0x0000000000000000 +[ 44.040759] PVR_K: 253: VDM_CONTEXT_RESUME_TASK0 : 0x0000000000000000 +[ 44.049690] PVR_K: 253: VDM_CONTEXT_RESUME_TASK1 : 0x0000000000000000 +[ 44.058614] PVR_K: 253: VDM_CONTEXT_RESUME_TASK2 : 0x0000000000000000 +[ 44.067310] PVR_K: 253: ISP_CTL : 0x0002B000 +[ 44.075135] PVR_K: 253: ISP_STATUS : 0x00000003 +[ 44.082952] PVR_K: 253: MTS_INTCTX : 0x00000000 +[ 44.090775] PVR_K: 253: MTS_BGCTX : 0x00000000 +[ 44.098592] PVR_K: 253: MTS_BGCTX_COUNTED_SCHEDULE : 0x00000000 +[ 44.106410] PVR_K: 253: MTS_SCHEDULE : 0x00000000 +[ 44.114229] PVR_K: 253: MTS_GPU_INT_STATUS : 0x00004410 +[ 44.122046] PVR_K: 253: CDM_CONTEXT_STORE_STATUS : 0x00000000 +[ 44.129864] PVR_K: 253: CDM_CONTEXT_PDS0 : 0x0000000000000000 +[ 44.138549] PVR_K: 253: CDM_CONTEXT_PDS1 : 0x0000000000000000 +[ 44.147233] PVR_K: 253: CDM_TERMINATE_PDS : 0x0000000000000000 +[ 44.155922] PVR_K: 253: CDM_TERMINATE_PDS1 : 0x0000000000000000 +[ 44.164631] PVR_K: 253: SIDEKICK_IDLE : 0x0000007E +[ 44.172456] PVR_K: 253: SLC_IDLE : 0x000000FF +[ 44.180275] PVR_K: 253: SLC_STATUS0 : 0x00000000 +[ 44.188093] PVR_K: 253: SLC_STATUS1 : 0x0000000000000000 +[ 44.196782] PVR_K: 253: SLC_STATUS2 : 0x0000000000000000 +[ 44.205466] PVR_K: 253: SLC_CTRL_BYPASS : 0x01000000 +[ 44.213284] PVR_K: 253: SLC_CTRL_MISC : 0x0000000000200003 +[ 44.221975] PVR_K: 253: MIPS_ADDR_REMAP1_CONFIG1 : 0x1FC00001 +[ 44.229793] PVR_K: 253: MIPS_ADDR_REMAP1_CONFIG2 : 0x00000008b063600c +[ 44.238479] PVR_K: 253: MIPS_ADDR_REMAP2_CONFIG1 : 0x1FC01001 +[ 44.246299] PVR_K: 253: MIPS_ADDR_REMAP2_CONFIG2 : 0x00000008b065300c +[ 44.254983] PVR_K: 253: MIPS_ADDR_REMAP3_CONFIG1 : 0x1FC02001 +[ 44.262800] PVR_K: 253: MIPS_ADDR_REMAP3_CONFIG2 : 0x00000008b063500c +[ 44.271483] PVR_K: 253: MIPS_ADDR_REMAP4_CONFIG1 : 0x1FC00000 +[ 44.279302] PVR_K: 253: MIPS_ADDR_REMAP4_CONFIG2 : 0x000000000000000c +[ 44.287991] PVR_K: 253: MIPS_ADDR_REMAP5_CONFIG1 : 0x00000001 +[ 44.295813] PVR_K: 253: MIPS_ADDR_REMAP5_CONFIG2 : 0x00000008b063600c +[ 44.304500] PVR_K: 253: MIPS_WRAPPER_CONFIG : 0x000000000001cf80 +[ 44.313187] PVR_K: 253: MIPS_EXCEPTION_STATUS : 0x00000020 +[ 44.321132] PVR_K: 253: ---- [ MIPS internal state ] ---- +[ 44.327977] PVR_K: 253: PC : 0xC00171C0 +[ 44.335793] PVR_K: 253: STATUS_REGISTER : 0x00481C05 +[ 44.343610] PVR_K: 253: CAUSE_REGISTER : 0x00800000 +[ 44.351431] PVR_K: 253: BAD_REGISTER : 0xC00171B8 +[ 44.359251] PVR_K: 253: EPC : 0xC00171C0 +[ 44.367070] PVR_K: 253: SP : 0xCF600FE0 +[ 44.374887] PVR_K: 253: BAD_INSTRUCTION : 0x00000000 +[ 44.382704] PVR_K: 253: TLB : +[ 44.389333] PVR_K: 253: 0) VA 0xCF800000 ( 64k) -> PA0 0xe20000000 DV , PA1 0x00000000 C +[ 44.400079] PVR_K: 253: 1) VA 0xCF000000 ( 16k) -> PA0 0x8b0620000 DVGC, PA1 0x8b0624000 DVGC +[ 44.410936] PVR_K: 253: 2) VA 0xCF600000 ( 4k) -> PA0 0x8b0654000 DV C, PA1 0x00000000 C +[ 44.421685] PVR_K: 253: 3) VA 0xC0032000 ( 4k) -> PA0 0x8b0650000 DVGC, PA1 0x8b0651000 DVGC +[ 44.432538] PVR_K: 253: 4) VA 0xF0008000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 44.443175] PVR_K: 253: 5) VA 0xC001C000 ( 4k) -> PA0 0x8b065a000 VGC, PA1 0x8b065b000 VGC +[ 44.454028] PVR_K: 253: 6) VA 0xC001A000 ( 4k) -> PA0 0x8b0658000 DVG , PA1 0x8b0659000 DVG +[ 44.464879] PVR_K: 253: 7) VA 0xC0006000 ( 4k) -> PA0 0x8b0613000 DVGC, PA1 0x8b0614000 DVGC +[ 44.475732] PVR_K: 253: 8) VA 0xC000A000 ( 4k) -> PA0 0x8b0617000 DVGC, PA1 0x8b0618000 DVGC +[ 44.486587] PVR_K: 253: 9) VA 0xC0026000 ( 4k) -> PA0 0x8b067b000 DVG , PA1 0x8b06cf000 DVG +[ 44.497440] PVR_K: 253: 10) VA 0xF0014000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 44.508074] PVR_K: 253: 11) VA 0xC0016000 ( 4k) -> PA0 0x8b0633000 DVGC, PA1 0x8b0634000 DVGC +[ 44.518925] PVR_K: 253: 12) VA 0xF0018000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 44.529562] PVR_K: 253: 13) VA 0xF001A000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 44.540208] PVR_K: 253: 14) VA 0xC0020000 ( 4k) -> PA0 0x8b0671000 DVG , PA1 0x8b0673000 DVG +[ 44.551068] PVR_K: 253: 15) VA 0xC0002000 ( 4k) -> PA0 0x8b060f000 DVGC, PA1 0x8b0610000 DVGC +[ 44.561923] PVR_K: 253: -------------------------------- +[ 44.568657] PVR_K: 253: ------[ RGX FW Trace Info ]------ +[ 44.575504] PVR_K: 253: Debug log type: none +[ 44.580937] PVR_K: 253: RGX FW thread 0: Trace buffer not yet allocated +[ 44.589296] PVR_K: 253: ------[ Full CCB Status ]------ +[ 44.595928] PVR_K: 253: FWCtx 0xC0028300 (TQ_3D-P1052-T1058-byd_srv.out) +[ 44.604401] PVR_K: 253: |--Waiting TQ_3D @ 1768 Int=8 Ext=8 +[ 44.611678] PVR_K: 253: `--Waiting UPDATE @ 1968 Int=8 Ext=8 +[ 44.619069] PVR_K: 253: |--Addr:0xc002a000 Val=0x00000008 +[ 44.626563] PVR_K: 253: `--Addr:0xc002b021 Val=0x00000519 +[ 44.634056] PVR_K: 253: FWCtx 0xC0028040 (TA-P1052-T1058-byd_srv.out) +[ 44.642199] PVR_K: 253: `-- +[ 44.646768] PVR_K: 253: FWCtx 0xC00280E0 (3D-P1052-T1058-byd_srv.out) +[ 44.654909] PVR_K: 253: `-- +[ 44.659482] PVR_K: 253: ------[ RGX Device ID:0 End ]------ +[ 44.666557] PVR_K: 253: ------[ System Summary Device ID:0 ]------ +locFile.c_str() == ./bin/image/front.bmp[ 44.674607] PVR_K: 253: Device System Power State: ON +[ 44.685346] PVR_K: 253: MaxHWTOut: 500000us, WtTryCt: 10000, WDGTOut(on,off): (10000ms,3600000ms) +[ 44.696521] PVR_K: 253: ------[ Server Thread Summary ]------ + +[ 44.703806] PVR_K: 253: pvr_defer_free : Running +[ 44.710098] PVR_K: 253: Number of deferred cleanup items : 0 +[ 44.717700] PVR_K: 253: pvr_device_wdg : Running +[BSP]--> tex[0] == 6[ 44.723785] PVR_K: 253: pvr_cacheop : Running + +[ 44.731717] PVR_K: 253: Configuration: QSZ: 16, UKT: -1, KDFT: 131072, LINESIZE: 64, PGSIZE: 4096, KDF: Yes, URBF: Yes +[ 44.745821] PVR_K: 253: Pending deferred CacheOp entries : 0 +[ 44.753433] PVR_K: 253: ------[ AppHint Settings ]------ +[ 44.760174] PVR_K: 253: Build Vars +[ 44.764746] PVR_K: 253: EnableTrustedDeviceAceConfig: N +[ 44.771806] PVR_K: 253: CleanupThreadPriority: 0x00000005 +[ 44.779089] PVR_K: 253: CacheOpThreadPriority: 0x00000001 +[ 44.786369] PVR_K: 253: WatchdogThreadPriority: 0x00000000 +[ 44.793762] PVR_K: 253: HWPerfClientBufferSize: 0x000c0000 +[ 44.801150] PVR_K: 253: Module Params +[ 44.806051] PVR_K: 253: none +[ 44.810186] PVR_K: 253: Debug Info Params +[ 44.815528] PVR_K: 253: CacheOpConfig: 0x0000000c +[ 44.821956] PVR_K: 253: CacheOpUMKMThresholdSize: 0xffffffff +[ 44.829572] PVR_K: 253: Debug Info Params Device ID: 0 +[ 44.836316] PVR_K: 253: none +[ 44.840453] PVR_K: 253: ------[ HTB Log state: Off ]------ +[ 44.847411] PVR_K: 253: ------[ Active Sync Checkpoints ]------ +[ 44.854909] ------[ Native Fence Sync: timelines ]------ +[ 44.861538] foreign_sync: @0 ctx=1 refs=1 +[ 44.866543] sw: RM_SWTimeline-byd_srv.out-1052 @0 cur=0 +[ 44.873073] rogue-ta3d: @0 ctx=3 refs=1 +[ 44.877858] rogue-tq3d: @0 ctx=5 refs=1 +[ 44.882642] QE-byd_srv.out-1052: @6 ctx=6 refs=2 +[ 44.888399] @5: (++) refs=1 fwaddr=0xc002b029 enqueue=1 status=Signalled 5-TQM +[ 44.897526] PVR_K: 253: ------------[ PVR DBG: END ]------------ +[ 44.905196] ------------[ cut here ]------------ +[ 44.911042] WARNING: CPU: 1 PID: 253 at /home/hhw3516496/workspace/TDA4_1018/tda4_linux_os_v8_4/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109/binary_j721e_linux_wayland_release/target_aarch64/kbuild/services/server/common/pvr_notifier.c:529 PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 44.943770] Modules linked in: bluetooth ecdh_generic ecc rfkill xhci_plat_hcd xhci_hcd cdns3 udc_core roles ti_am335x_adc omap_rng kfifo_buf rng_core irq_pruss_intc rpmsg_char pru_rproc usbcore icss_iep usb_common crct10dif_ce snd_soc_j721e_evm ti_j721e_cpsw_virt_mac phy_can_transceiver ti_k3_r5_remoteproc ti_am335x_tscadc pruss pvrsrvkm(O) sa2ul vxd_dec vxe_enc sha512_generic videobuf2_dma_sg snd_soc_pcm3168a_i2c authenc videobuf2_dma_contig v4l2_mem2mem ti_k3_dsp_remoteproc cdns_dphy videobuf2_memops videobuf2_v4l2 snd_soc_pcm3168a virtio_rpmsg_bus videobuf2_common cdns3_ti m_can_platform m_can can_dev rti_wdt sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6 +[ 45.016906] CPU: 1 PID: 253 Comm: pvr_device_wdg Tainted: G W O 5.10.120-g95b90aa828 #1 +[ 45.028292] Hardware name: Texas Instruments K3 J721E SoC (DT) +[ 45.035562] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) +[ 45.043119] pc : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 45.050031] lr : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 45.056869] sp : ffff8000123e3c80 +[ 45.061005] x29: ffff8000123e3c80 x28: 0000000000000000 +[ 45.067636] x27: ffff8000121b3918 x26: ffff800008d687e0 +[ 45.074259] x25: ffff00082d572000 x24: 0000000000000009 +[ 45.080879] x23: 0000000000000002 x22: 0000000000000000 +locFile.c_str() == ./bin/image/right.bmp[ 45.087499] x21: 0000000000000000 x20: ffff00082d5720d8 +[ 45.098446] x19: ffff00082d47caa0 x18: 0000000000000010 + +[ 45.105065] x17: 0000000000000000 x16: 0000000000000000 +[ 45.111901] x15: ffff00082b5d8530 x14: 00000000000005dc +[BSP]--> tex[1] == 7[ 45.118522] x13: ffff00082b5d8530 x12: 00000000ffffffea +[ 45.127306] x11: ffff800011120430 x10: ffff8000111083f0 +[ 45.133927] x9 : ffff800011108448 x8 : 0000000000017fe8 + +[ 45.140546] x7 : c0000000ffffefff x6 : 0000000000000001 +[ 45.147382] x5 : 0000000000000000 x4 : ffff00087f9daab8 +[ 45.154003] x3 : 0000000000000000 x2 : ffffffffffffff00 +[ 45.160623] x1 : 0000000000000000 x0 : ffff00082bdb8c00 +[ 45.167246] Call trace: +[ 45.170356] PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 45.176800] DevicesWatchdogThread_ForEachVaCb+0x108/0x158 [pvrsrvkm] +[ 45.184880] List_PVRSRV_DEVICE_NODE_ForEach_va+0x74/0xb0 [pvrsrvkm] +[ 45.192840] DevicesWatchdogThread+0x144/0x210 [pvrsrvkm] +[ 45.199620] OSThreadRun+0x24/0x60 [pvrsrvkm] +[ 45.205055] kthread+0x140/0x160 +[ 45.209074] ret_from_fork+0x10/0x34 +[ 45.213527] ---[ end trace b9b2eb3c337e0984 ]--- + + + + +pvrlogdump ---> + +root@j7-evm:/opt/vision_apps# pvrlogdump +Checking driver state ............... [ 48.546606] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +initialised +Checking for debugfs ................ found +Checking for lockdep ................ not found +Checking for ftrace ................. not found +Checking for firmware log groups .... not found + There are no AppHints enabled in /etc/powervr.ini or in debugfs + for any of the firmware log groups. Unless 'pvrdebug' tool + was used for that purpose there will be no information in + firmware log. + Please consider enabling some of the firmware log groups + before the problem occurs. + +Dumping data ........................ [ 48.674313] PVR_K: 1093: User requested PVR debug info +[ 48.680868] PVR_K: 1093: ------------[ PVR DBG: START (High) ]------------ +[ 48.689560] PVR_K: 1093: OS kernel info: Linux 5.10.120-g95b90aa828 #1 SMP PREEMPT Sun Apr 23 12:27:10 CST 2023 aarch64 +[ 48.703121] PVR_K: 1093: DDK info: Rogue_DDK_Linux_WS rogueddk 1.15@6133109 (release) j721e_linux +[ 48.714299] PVR_K: 1093: Time now: 48714296us +[ 48.719841] PVR_K: 1093: Services State: OK +[ 48.725168] PVR_K: 1093: Server Errors: 0 +[ 48.730287] PVR_K: 1093: Connections Device ID:0(128) P1093-V1093-T1093-pvrdebug +[ 48.739624] PVR_K: 1093: ------[ Driver Info ]------ +[ 48.745925] PVR_K: 1093: Comparison of UM/KM components: MATCHING +[ 48.753634] PVR_K: 1093: KM Arch: 64 Bit +[ 48.758636] PVR_K: 1093: UM Connected Clients: 64 Bit +[ 48.765046] PVR_K: 1093: UM info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 48.774922] PVR_K: 1093: KM info: 1.15 @ 6133109 (release) build options: 0x00000810 +[ 48.784800] PVR_K: 1093: Window system: wayland +[ 48.790596] PVR_K: 1093: ------[ RGX Device ID:0 Start ]------ +[ 48.798035] PVR_K: 1093: ------[ RGX Info ]------ +[ 48.804015] PVR_K: 1093: Device Node (Info): 00000000413e2379 (000000002b9cc4c3) +[ 48.813353] PVR_K: 1093: RGX BVNC: 22.104.208.318 (rogue) +[ 48.820196] PVR_K: 1093: RGX Device State: Active +[ 48.826173] PVR_K: 1093: RGX Power State: ON +[ 48.831611] PVR_K: 1093: FW info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 48.841490] PVR_K: 1093: BIF0 - OK +[ 48.845846] PVR_K: 1093: RGX FW State: OK (HWRState 0x00000001: HWR OK;) +[ 48.854320] PVR_K: 1093: RGX FW Power State: RGXFWIF_POW_IDLE (APM disabled: 0 ok, 0 denied, 0 non-idle, 0 retry, 0 other, 0 total. Latency: 100 ms) +[ 48.871028] PVR_K: 1093: RGX DVFS: 0 frequency changes. Current frequency: 600.000 MHz (sampled at 42453720525 ns). FW frequency: 100.000 MHz. +[ 48.887081] PVR_K: 1093: RGX FW OS 0 - State: active; Freelists: Ok; Priority: 0; MTS on; +[ 48.897406] PVR_K: 1093: Number of HWR: GP(0/0+0), 2D(0/0+0), TA(0/0+0), 3D(1/1+0), CDM(0/0+0), RAY(0/0+0), FALSE(0,0,0,0,0,0) +[ 48.911728] PVR_K: 1093: DM 0 (GP) +[ 48.916094] PVR_K: 1093: DM 1 (HWRflags 0x00000000: working;) +[ 48.923457] PVR_K: 1093: DM 2 (HWRflags 0x00000000: working;) +[ 48.930740] PVR_K: 1093: DM 3 (HWRflags 0x00000000: working;) +[ 48.938020] PVR_K: 1093: Recovery 1: PID = 1050, frame = 0, HWRTData = 0x00000000, EventStatus = 0x00000400, Guilty Lockup +[ 48.952161] PVR_K: 1093: CRTimer = 0x000004320f30, OSTimer = 39.185153990, CyclesElapsed = 26112 +[ 48.964755] PVR_K: 1093: PreResetTimeInCycles = 18944, HWResetTimeInCycles = 19200, TotalResetTimeInCycles = 38144 +[ 48.979296] PVR_K: 1093: BIF0 - FAULT: +[ 48.984516] PVR_K: 1093: * MMU status (0x0000000000001041): PC = 1, Page Size = 0 (Page Catalog). +[ 48.996357] PVR_K: 1093: * Request (0x00044e03400c02c0): MCU (128bit word within the Lower 256bits, TPUB_USC, Banks 0-3), Reading from 0x03400C02C0. +[ 49.013734] PVR_K: 1093: PC index (13) out of bounds (0) +[ 49.020912] PVR_K: 1093: DM 4 (HWRflags 0x00000000: working;) +[ 49.028194] PVR_K: 1093: DM 5 (HWRflags 0x00000000: working;) +[ 49.035476] PVR_K: 1093: RGX Kernel CCB WO:0x12 RO:0x12 +[ 49.042105] PVR_K: 1093: RGX Firmware CCB WO:0x2 RO:0x2 +[ 49.048748] PVR_K: 1093: RGX Kernel CCB commands executed = 18 +[ 49.056138] PVR_K: 1093: RGX SLR: Forced UFO updates requested = 0 +[ 49.063956] PVR_K: 1093: RGX Errors: WGP:0, TRP:0 +[ 49.069933] PVR_K: 1093: Thread0: FW IRQ count = 15 +[ 49.076125] PVR_K: 1093: Last sampled IRQ count in LISR = 15 +[ 49.083295] PVR_K: 1093: FW System config flags = 0x00020000 (Ctx switch options: Medium CSW profile; VDM CS INDEX mode;) +[ 49.097073] PVR_K: 1093: FW OS config flags = 0x0000000F (Ctx switch: TDM; TA; 3D; CDM;) +[ 49.107277] PVR_K: 1093: ------[ RGX registers ]------ +[ 49.113796] PVR_K: 1093: RGX Register Base Address (Linear): 0x00000000aaea0e8a +[ 49.123240] PVR_K: 1093: RGX Register Base Address (Physical): 0x4E20000000 +[ 49.132033] PVR_K: 1093: CORE_ID : 0x0000000008470000 +[ 49.140827] PVR_K: 1093: CORE_REVISION : 0x00D0013E +[ 49.148752] PVR_K: 1093: DESIGNER_REV_FIELD1 : 0x00000000 +[ 49.156679] PVR_K: 1093: DESIGNER_REV_FIELD2 : 0x00000000 +[ 49.164604] PVR_K: 1093: CHANGESET_NUMBER : 0x0000000000000000 +[ 49.173401] PVR_K: 1093: CLK_CTRL : 0x0aaaaa002a2aaaaa +[ 49.182201] PVR_K: 1093: CLK_STATUS : 0x0000000000600000 +[ 49.190994] PVR_K: 1093: CLK_CTRL2 : 0x0000000000000000 +[ 49.199788] PVR_K: 1093: CLK_STATUS2 : 0x0000000000000000 +[ 49.208580] PVR_K: 1093: EVENT_STATUS : 0x00004410 +[ 49.216506] PVR_K: 1093: TIMER : 0x0000000005934fae +[ 49.225299] PVR_K: 1093: BIF_FAULT_BANK0_MMU_STATUS : 0x00000000 +[ 49.233228] PVR_K: 1093: BIF_FAULT_BANK0_REQ_STATUS : 0x0000000000000000 +[ 49.242022] PVR_K: 1093: BIF_FAULT_BANK1_MMU_STATUS : 0x00000000 +[ 49.249947] PVR_K: 1093: BIF_FAULT_BANK1_REQ_STATUS : 0x0000000000000000 +[ 49.258739] PVR_K: 1093: BIF_MMU_STATUS : 0x00000000 +[ 49.266664] PVR_K: 1093: BIF_MMU_ENTRY : 0x00000000 +[ 49.274590] PVR_K: 1093: BIF_MMU_ENTRY_STATUS : 0x0000000000000000 +[ 49.283382] PVR_K: 1093: BIF_STATUS_MMU : 0x00000000 +[ 49.291310] PVR_K: 1093: BIF_READS_EXT_STATUS : 0x00000000 +[ 49.299238] PVR_K: 1093: BIF_READS_INT_STATUS : 0x00000000 +[ 49.307169] PVR_K: 1093: BIFPM_STATUS_MMU : 0x00000000 +[ 49.315096] PVR_K: 1093: BIFPM_READS_EXT_STATUS : 0x00000000 +[ 49.323022] PVR_K: 1093: BIFPM_READS_INT_STATUS : 0x00000000 +[ 49.330949] PVR_K: 1093: BIF_CAT_BASE_INDEX : 0x0000000000000100 +[ 49.339743] PVR_K: 1093: BIF_CAT_BASE0 : 0x0000000000000000 +[ 49.348536] PVR_K: 1093: BIF_CAT_BASE1 : 0x00000008aff11000 +[ 49.357331] PVR_K: 1093: BIF_CAT_BASE2 : 0x0000000000000000 +[ 49.366123] PVR_K: 1093: BIF_CAT_BASE3 : 0x0000000000000000 +[ 49.374916] PVR_K: 1093: BIF_CAT_BASE4 : 0x0000000000000000 +[ 49.383709] PVR_K: 1093: BIF_CAT_BASE5 : 0x0000000000000000 +[ 49.392501] PVR_K: 1093: BIF_CAT_BASE6 : 0x0000000000000000 +[ 49.401293] PVR_K: 1093: BIF_CAT_BASE7 : 0x0000000000000000 +[ 49.410085] PVR_K: 1093: BIF_CTRL_INVAL : 0x00000000 +[ 49.418013] PVR_K: 1093: BIF_CTRL : 0x000000C0 +[ 49.425947] PVR_K: 1093: BIF_PM_CAT_BASE_VCE0 : 0x0000000000000000 +[ 49.434742] PVR_K: 1093: BIF_PM_CAT_BASE_TE0 : 0x0000000000000000 +[ 49.443534] PVR_K: 1093: BIF_PM_CAT_BASE_ALIST0 : 0x0000000000000000 +[ 49.452328] PVR_K: 1093: BIF_PM_CAT_BASE_VCE1 : 0x0000000000000000 +[ 49.461121] PVR_K: 1093: BIF_PM_CAT_BASE_TE1 : 0x0000000000000000 +[ 49.469919] PVR_K: 1093: BIF_PM_CAT_BASE_ALIST1 : 0x0000000000000000 +[ 49.478715] PVR_K: 1093: PERF_TA_PHASE : 0x00000000 +[ 49.486641] PVR_K: 1093: PERF_TA_CYCLE : 0x00000000 +[ 49.494568] PVR_K: 1093: PERF_3D_PHASE : 0x00000006 +[ 49.502494] PVR_K: 1093: PERF_3D_CYCLE : 0x000092D5 +[ 49.510420] PVR_K: 1093: PERF_TA_OR_3D_CYCLE : 0x000092D5 +[ 49.518346] PVR_K: 1093: PERF_TA_AND_3D_CYCLE : 0x00000000 +[ 49.526271] PVR_K: 1093: PERF_COMPUTE_PHASE : 0x00000000 +[ 49.534196] PVR_K: 1093: PERF_COMPUTE_CYCLE : 0x00000000 +[ 49.542124] PVR_K: 1093: PM_PARTIAL_RENDER_ENABLE : 0x00000000 +[ 49.550055] PVR_K: 1093: ISP_RENDER : 0x00000003 +[ 49.557994] PVR_K: 1093: TLA_STATUS : 0x0000000000000000 +[ 49.566792] PVR_K: 1093: MCU_FENCE : 0x0000018000000000 +[ 49.575585] PVR_K: 1093: VDM_CONTEXT_STORE_STATUS : 0x00000001 +[ 49.583511] PVR_K: 1093: VDM_CONTEXT_STORE_TASK0 : 0x0000000000000000 +[ 49.592304] PVR_K: 1093: VDM_CONTEXT_STORE_TASK1 : 0x0000000000000000 +[ 49.601098] PVR_K: 1093: VDM_CONTEXT_STORE_TASK2 : 0x0000000000000000 +[ 49.609893] PVR_K: 1093: VDM_CONTEXT_RESUME_TASK0 : 0x0000000000000000 +[ 49.618687] PVR_K: 1093: VDM_CONTEXT_RESUME_TASK1 : 0x0000000000000000 +[ 49.627479] PVR_K: 1093: VDM_CONTEXT_RESUME_TASK2 : 0x0000000000000000 +[ 49.636271] PVR_K: 1093: ISP_CTL : 0x0002B000 +[ 49.644197] PVR_K: 1093: ISP_STATUS : 0x00000003 +[ 49.652123] PVR_K: 1093: MTS_INTCTX : 0x00000000 +[ 49.660048] PVR_K: 1093: MTS_BGCTX : 0x00000000 +[ 49.667973] PVR_K: 1093: MTS_BGCTX_COUNTED_SCHEDULE : 0x00000000 +[ 49.675901] PVR_K: 1093: MTS_SCHEDULE : 0x00000000 +[ 49.683829] PVR_K: 1093: MTS_GPU_INT_STATUS : 0x00004410 +[ 49.691766] PVR_K: 1093: CDM_CONTEXT_STORE_STATUS : 0x00000000 +[ 49.699695] PVR_K: 1093: CDM_CONTEXT_PDS0 : 0x0000000000000000 +[ 49.708488] PVR_K: 1093: CDM_CONTEXT_PDS1 : 0x0000000000000000 +[ 49.717280] PVR_K: 1093: CDM_TERMINATE_PDS : 0x0000000000000000 +[ 49.726072] PVR_K: 1093: CDM_TERMINATE_PDS1 : 0x0000000000000000 +[ 49.734867] PVR_K: 1093: SIDEKICK_IDLE : 0x0000007E +[ 49.742797] PVR_K: 1093: SLC_IDLE : 0x000000FF +[ 49.750723] PVR_K: 1093: SLC_STATUS0 : 0x00000000 +[ 49.758648] PVR_K: 1093: SLC_STATUS1 : 0x0000000000000000 +[ 49.767440] PVR_K: 1093: SLC_STATUS2 : 0x0000000000000000 +[ 49.776232] PVR_K: 1093: SLC_CTRL_BYPASS : 0x01000000 +[ 49.784163] PVR_K: 1093: SLC_CTRL_MISC : 0x0000000000200003 +[ 49.792968] PVR_K: 1093: MIPS_ADDR_REMAP1_CONFIG1 : 0x1FC00001 +[ 49.800899] PVR_K: 1093: MIPS_ADDR_REMAP1_CONFIG2 : 0x00000008afe2800c +[ 49.809696] PVR_K: 1093: MIPS_ADDR_REMAP2_CONFIG1 : 0x1FC01001 +[ 49.817629] PVR_K: 1093: MIPS_ADDR_REMAP2_CONFIG2 : 0x00000008afe4400c +[ 49.826424] PVR_K: 1093: MIPS_ADDR_REMAP3_CONFIG1 : 0x1FC02001 +[ 49.834349] PVR_K: 1093: MIPS_ADDR_REMAP3_CONFIG2 : 0x00000008afe2700c +[ 49.843142] PVR_K: 1093: MIPS_ADDR_REMAP4_CONFIG1 : 0x1FC00000 +[ 49.851067] PVR_K: 1093: MIPS_ADDR_REMAP4_CONFIG2 : 0x000000000000000c +[ 49.859862] PVR_K: 1093: MIPS_ADDR_REMAP5_CONFIG1 : 0x00000001 +[ 49.867789] PVR_K: 1093: MIPS_ADDR_REMAP5_CONFIG2 : 0x00000008afe2800c +[ 49.876583] PVR_K: 1093: MIPS_WRAPPER_CONFIG : 0x000000000001cf80 +[ 49.885374] PVR_K: 1093: MIPS_EXCEPTION_STATUS : 0x00000020 +[ 49.893422] PVR_K: 1093: ---- [ MIPS internal state ] ---- +[ 49.900375] PVR_K: 1093: PC : 0xC00171C4 +[ 49.908300] PVR_K: 1093: STATUS_REGISTER : 0x00481C05 +[ 49.916225] PVR_K: 1093: CAUSE_REGISTER : 0x00800008 +[ 49.924154] PVR_K: 1093: BAD_REGISTER : 0xC00171C0 +[ 49.932080] PVR_K: 1093: EPC : 0xC00171C0 +[ 49.940010] PVR_K: 1093: SP : 0xCF600FE0 +[ 49.947936] PVR_K: 1093: BAD_INSTRUCTION : 0x00000000 +[ 49.955862] PVR_K: 1093: TLB : +[ 49.962599] PVR_K: 1093: 0) VA 0xCF800000 ( 64k) -> PA0 0xe20000000 DV , PA1 0x00000000 C +[ 49.973454] PVR_K: 1093: 1) VA 0xCF000000 ( 16k) -> PA0 0x8afe10000 DVGC, PA1 0x8afe14000 DVGC +[ 49.984433] PVR_K: 1093: 2) VA 0xCF600000 ( 4k) -> PA0 0x8afe45000 DV C, PA1 0x00000000 C +[ 49.995291] PVR_K: 1093: 3) VA 0xC0032000 ( 4k) -> PA0 0x8afe41000 DVGC, PA1 0x8afe42000 DVGC +[ 50.006252] PVR_K: 1093: 4) VA 0xF0008000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.016999] PVR_K: 1093: 5) VA 0xF000A000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.027742] PVR_K: 1093: 6) VA 0xC000A000 ( 4k) -> PA0 0x8aeab1000 DVGC, PA1 0x8aeab4000 DVGC +[ 50.038701] PVR_K: 1093: 7) VA 0xF000E000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.049446] PVR_K: 1093: 8) VA 0xF0010000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.060192] PVR_K: 1093: 9) VA 0xC0002000 ( 4k) -> PA0 0x8acae6000 DVGC, PA1 0x8aeab5000 DVGC +[ 50.071166] PVR_K: 1093: 10) VA 0xC0006000 ( 4k) -> PA0 0x8aeab6000 DVGC, PA1 0x8aeac0000 DVGC +[ 50.082132] PVR_K: 1093: 11) VA 0xC0016000 ( 4k) -> PA0 0x8afe25000 DVGC, PA1 0x8afe26000 DVGC +[ 50.093093] PVR_K: 1093: 12) VA 0xF0018000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.103836] PVR_K: 1093: 13) VA 0xF001A000 ( 4k) -> PA0 0x00000000 C, PA1 0x00000000 C +[ 50.114582] PVR_K: 1093: 14) VA 0xC000E000 ( 4k) -> PA0 0x8afe0d000 DVGC, PA1 0x8afe0e000 DVGC +[ 50.125544] PVR_K: 1093: 15) VA 0xC0020000 ( 4k) -> PA0 0x8afe60000 DVG , PA1 0x8afe61000 DVG +[ 50.136506] PVR_K: 1093: -------------------------------- +[ 50.143350] PVR_K: 1093: ------[ RGX FW Trace Info ]------ +[ 50.150301] PVR_K: 1093: Debug log type: none +[ 50.155842] PVR_K: 1093: RGX FW thread 0: Trace buffer not yet allocated +[ 50.164308] PVR_K: 1093: ------[ Full CCB Status ]------ +[ 50.171044] PVR_K: 1093: ------[ RGX Device ID:0 End ]------ +[ 50.178218] PVR_K: 1093: ------[ System Summary Device ID:0 ]------ +[ 50.186144] PVR_K: 1093: Device System Power State: ON +[ 50.192662] PVR_K: 1093: MaxHWTOut: 500000us, WtTryCt: 10000, WDGTOut(on,off): (10000ms,3600000ms) +[ 50.203951] PVR_K: 1093: ------[ Server Thread Summary ]------ +[ 50.211337] PVR_K: 1093: pvr_defer_free : Running +[ 50.217529] PVR_K: 1093: Number of deferred cleanup items : 0 +[ 50.225238] PVR_K: 1093: pvr_device_wdg : Running +[ 50.231430] PVR_K: 1093: pvr_cacheop : Running +[ 50.237299] PVR_K: 1093: Configuration: QSZ: 16, UKT: -1, KDFT: 131072, LINESIZE: 64, PGSIZE: 4096, KDF: Yes, URBF: Yes +[ 50.251295] PVR_K: 1093: Pending deferred CacheOp entries : 0 +[ 50.259005] PVR_K: 1093: ------[ AppHint Settings ]------ +[ 50.265847] PVR_K: 1093: Build Vars +[ 50.270525] PVR_K: 1093: EnableTrustedDeviceAceConfig: N +[ 50.277693] PVR_K: 1093: CleanupThreadPriority: 0x00000005 +[ 50.285077] PVR_K: 1093: CacheOpThreadPriority: 0x00000001 +[ 50.292461] PVR_K: 1093: WatchdogThreadPriority: 0x00000000 +[ 50.299952] PVR_K: 1093: HWPerfClientBufferSize: 0x000c0000 +[ 50.307445] PVR_K: 1093: Module Params +[ 50.312455] PVR_K: 1093: none +[ 50.316702] PVR_K: 1093: Debug Info Params +[ 50.322143] PVR_K: 1093: CacheOpConfig: 0x0000000c +[ 50.328660] PVR_K: 1093: CacheOpUMKMThresholdSize: 0xffffffff +[ 50.336370] PVR_K: 1093: Debug Info Params Device ID: 0 +[ 50.343215] PVR_K: 1093: none +[ 50.347458] PVR_K: 1093: ------[ HTB Log state: Off ]------ +[ 50.354517] PVR_K: 1093: ------[ Active Sync Checkpoints ]------ +[ 50.362117] ------[ Native Fence Sync: timelines ]------ +[ 50.368742] foreign_sync: @0 ctx=1 refs=1 +[ 50.373744] PVR_K: 1093: ------------[ PVR DBG: END ]------------ +[ 50.381515] ------------[ cut here ]------------ +[ 50.387350] WARNING: CPU: 1 PID: 1093 at /home/hhw3516496/workspace/TDA4_1018/tda4_linux_os_v8_4/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109/binary_j721e_linux_wayland_release/target_aarch64/kbuild/services/server/common/pvr_notifier.c:529 PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 50.420185] Modules linked in: bluetooth ecdh_generic ecc rfkill xhci_plat_hcd xhci_hcd ti_am335x_adc kfifo_buf cdns3 udc_core roles omap_rng rng_core rpmsg_char usbcore usb_common irq_pruss_intc pru_rproc icss_iep crct10dif_ce snd_soc_j721e_evm ti_j721e_cpsw_virt_mac phy_can_transceiver ti_k3_r5_remoteproc vxd_dec vxe_enc ti_am335x_tscadc videobuf2_dma_sg pruss v4l2_mem2mem pvrsrvkm(O) videobuf2_dma_contig sa2ul ti_k3_dsp_remoteproc videobuf2_memops videobuf2_v4l2 sha512_generic authenc virtio_rpmsg_bus videobuf2_common cdns_dphy cdns3_ti snd_soc_pcm3168a_i2c snd_soc_pcm3168a m_can_platform m_can can_dev rti_wdt sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6 +[ 50.493315] CPU: 1 PID: 1093 Comm: pvrdebug Tainted: G W O 5.10.120-g95b90aa828 #1 +[ 50.504157] Hardware name: Texas Instruments K3 J721E SoC (DT) +[ 50.511427] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) +[ 50.518957] pc : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 50.525835] lr : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 50.532668] sp : ffff8000150fbb00 +[ 50.536793] x29: ffff8000150fbb00 x28: ffff00082ff72000 +[ 50.543413] x27: 0000000000000008 x26: ffff800008ca27e0 +[ 50.550034] x25: ffff00082d991b00 x24: 0000000000000009 +[ 50.556653] x23: 0000000000000002 x22: 0000000000000000 +[ 50.563272] x21: 0000000000000000 x20: ffff00082d991bd8 +[ 50.569893] x19: ffff00082e2131a0 x18: 0000000000000010 +[ 50.576513] x17: 00000000000012a0 x16: 0000000000001220 +[ 50.583132] x15: ffff00082fc55930 x14: 00000000000005ce +[ 50.589752] x13: ffff00082fc55930 x12: 00000000ffffffea +[ 50.596372] x11: ffff800011120430 x10: ffff8000111083f0 +[ 50.602992] x9 : ffff800011108448 x8 : 0000000000017fe8 +[ 50.609612] x7 : c0000000ffffefff x6 : 0000000000000001 +[ 50.616231] x5 : 0000000000000000 x4 : ffff00087f9daab8 +[ 50.622851] x3 : 0000000000000000 x2 : ffffffffffffff00 +[ 50.629471] x1 : 0000000000000000 x0 : ffff00082da31980 +[ 50.636091] Call trace: +[ 50.639184] PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 50.645627] PVRSRVDumpDebugInfoKM+0x40/0x60 [pvrsrvkm] +[ 50.652181] PVRSRVBridgeDumpDebugInfo+0x38/0x58 [pvrsrvkm] +[ 50.659166] BridgedDispatchKM+0x150/0x558 [pvrsrvkm] +[ 50.665500] PVRSRV_BridgeDispatchKM+0xb0/0x188 [pvrsrvkm] +[ 50.672340] drm_ioctl_kernel+0xc0/0x110 +[ 50.677225] drm_ioctl+0x228/0x490 +[ 50.681465] __arm64_sys_ioctl+0xa8/0xf0 +[ 50.686351] el0_svc_common.constprop.0+0x78/0x1c8 +[ 50.692320] do_el0_svc+0x24/0x90 +[ 50.696450] el0_svc+0x14/0x20 +[ 50.700251] el0_sync_handler+0xb0/0xb8 +[ 50.705027] el0_sync+0x180/0x1c0 +[ 50.709154] ---[ end trace 49b20fc2cc23307f ]--- +[ 50.774903] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.787750] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.800801] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.813611] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.826467] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.839146] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.852113] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.864807] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +[ 50.877528] seq_file: buggy .next function _Next [pvrsrvkm] did not update position index +done +Archiving data ...................... done + +hi,Erick Is this log helpful? Do you need to provide more information? Thanks, + +Hello, It looks from the log that you performed a pvrlogdump, but I don't see the firmware traces enabled by this command: pvrdebug -loggroups main,mts,hwr Did you run this command before running the test? It should create extra flogs when you run the pvrlogdump. This line in the debug dump shows these firmware traces were not enabled: Line 539: Checking for firmware log groups .... not found Regards, Erick + +hi,Erick Sorry, my previous log did not execute the commands pvrdebug - loggroups main, mts, hwr. The following log executed the commands. Please refer to it. pvr2.log Thanks, + +Thank you, let me analyze this and get back to you. Meanwhile, can you please remove the patch that I provided earlier, and use this patch instead: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1218318/faq-tda4vm-are-there-any-known-bugs-and-patches-that-i-should-use-in-my-gpu-driver Please see the section "GPU Cache Coherency Issue". It describes a workaround that we can test from the command line. Please follow the instructions there. The reason to remove the earlier patch is that it conflicts with this workaround and it is not a complete solution, only partially addresses the known issue. Please let me know if you have questions with this. If the issue still shows, then collect the logs as before and send them. Thank you, Erick + +hi,erick Thank you very much for your answer. I saw how to disable GPU automatic loading from the website, but I don't seem to see how to manually load GPU. Can you tell me the method? Is the operation of writing registers before manually loading the GPU? Thank you + +Hello, Thank you for the note, I've updated the FAQ with the instruction to run after blacklisting: To run the GPU driver manually once it has been blacklisted, simply run `./rc.pvr start`, which will run the initialization script. KONG XIANGXU said: Is the operation of writing registers before manually loading the GPU? Yes, we need to run the writing registers before manually loading the GPU, otherwise the error can happen. Please let me know your results. Thanks, Erick + +hello,erick I have written the value to the register, but it seems that this problem will still recur. Below is a detailed log for your reference. pvr3.log Thanks, + +Hello Kong, Thank you for the log. After the log appears, can you run the function "pvrlogdump" and also attach the file generated to the ticket? The process is described in this FAQ (GPU Firmware Trace section): e2e.ti.com/.../faq-how-can-i-analyze-a-gpu-graphics-process-unit-driver-or-hardware-issue Regards, Erick + +hello,Erick, The pvrlogdump log is as follows, please check it pvrlogdump_2208300907.txt.gz Thanks, + +Thank you, we will begin the analysis of these logs. Meanwhile, may I ask for further debugging, are you using the OpenVX framwork (vision_apps) in your application? If not, we may be able to get further traces of your application using PVRCarbon. Do let me know what your situation is. Thanks, Erick + +hi,Erick, Thank you, we currently use the openvx architecture in our application. Please be informed that Thanks + +hi,Erick Is there any progress on this issue? Thanks, kong + +Hello Kong, Not yet, still waiting for feedback on these logs you have provided. Regards, Erick + +Hello Kong, After analysis of the logs, we will need to take a more detailed snapshot of when the crash happens. Can you please run the following to capture the logs this time: 1) PVR_SRVKM_PARAMS="EnablePageFaultDebug=1" /etc/init.d/rc.pvr start 2) pvrdebug -loggroups main,mts,hwr,pm 3) echo "Y" >/sys/kernel/debug/pvr/apphint/0/AssertOnHWRTrigger 4) Start application 5) Collect logs as last time with `pvrlogdump` Thanks, Erick + +Hello erick, The detailed log is as follows. Please refer to it. Thank you。 pvrlogdump_2208300908.txt.gz + +Kong, Thank you for the logs. After some analysis, we would like to try some patches to the GPU driver that might help. I've updated this FAQ with the known issues that these logs seem to indicate they are running into: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1218318/faq-tda4vm-are-there-any-known-bugs-and-patches-that-i-should-use-in-my-gpu-driver If you look for the section "Other known bugs"->"GPU Driver 1.15", you will see a set of libraries for your device. These libraries can replace the current ones you have in your filesystem. Can you please replace the files in your filesystem with these? And let me know if you run into any issues with this process. The rc.pvr should load your GPU driver correctly. Regards, Erick + +Erick Thank you for your reply. We have applied this kernel mode and user mode patch, and the probability of this problem occurring seems to have decreased. This is the log during the replication. Can we completely solve it? Thanks, pvrlogdump_2208300909.txt.gz + +Kong, Apologies for the delay, still waiting on the anaylsis from our team. Thanks, Erick + +Erick， How is the analysis of this problem going? Thanks, + +Kong, I am still waiting for feedback here, I've raised the priority as it has been pending for quite some time now. Thanks, Erick + +Kong, The log signature looks very similar to the currently known issue with the GPU cache coherency. Earlier, you applied a patch to the GPU kernel driver. Let's start with a fresh driver from the SDK 8.4, with no extra patches, and you simply apply the patch for a-type to u-boot, and that is it. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1218318/faq-tda4vm-are-there-any-known-bugs-and-patches-that-i-should-use-in-my-gpu-driver If this is correctly in place, you should be able to run the following test in your board when you boot: rgx_kicksync_test -ver -nc 16 -loop 100 -n 10000 -r -seed 81576 Please let me know the results of this. If you see no errors when you run this test, you can try running your application in this setup and let me know if there are any issues. Thanks, Erick + +Erick， After adding the above patch, I ran the command and encountered the following error. pvr_err.log + +Kong, This means there is an issue with the patch, either it is not working or it is not applied correctly. To double check, can you please boot your board and run the command "devmem2 0x45DC5100" and make sure it reads back 0x30000000? And to clarify, you are using a TDA4VM part (j721e)? Thanks, Erick + +Kong, Have you had a chance to try this? Regards, Erick + +Erick， We tried this patch and after directly incorporating it, the value of 0x45DC5100 is not 0x30000000. We placed 'qos_work_around_for_gpu()' after 'setup_gpu_qos()', and after the kernel started, the value of 0x45DC5100 was read as 0x30000000. The command 'rgx_kicksync_test - ver - nc 16- loop 100- n 10000- r - seed 81576' also passed the test. Next, we will test whether the application will reproduce the previous bugs, and we will reply to you with the results in the future. Thanks, kong + +Erick， We still encounter errors when using this patch while running the application. The error log is as follows We can now confirm the following: (1) Read the value of 0x45DC5100 register as 0x30000000 (2) We are using TDA4VM part (j721e) 0717.log [ 37.289487] PVR_K: 246: ------------[ PVR DBG: START (High) ]------------ +[ 37.298462] PVR_K: 246: OS kernel info: Linux 5.10.120-g95b90aa828 #1 SMP PREEMPT Tue Jun 20 11:19:40 CST 2023 aarch64 +[ 37.312053] PVR_K: 246: DDK info: Rogue_DDK_Linux_WS rogueddk 1.15@6133109 (release) j721e_linux +[ 37.323174] PVR_K: 246: Time now: 37323168us +[ 37.328747] PVR_K: 246: Services State: OK +[ 37.334009] PVR_K: 246: Server Errors: 0 +[ 37.339039] PVR_K: 246: Connections Device ID:0(128) P1026-V1026-T1032-byd_srv.out +[ 37.348601] PVR_K: 246: ------[ Driver Info ]------ +[ 37.354802] PVR_K: 246: Comparison of UM/KM components: MATCHING +[ 37.362420] PVR_K: 246: KM Arch: 64 Bit +[ 37.367321] PVR_K: 246: UM Connected Clients: 64 Bit +[ 37.373622] PVR_K: 246: UM info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 37.383400] PVR_K: 246: KM info: 1.15 @ 6133109 (release) build options: 0x00000810 +[ 37.393185] PVR_K: 246: Window system: wayland +[ 37.398849] PVR_K: 246: ------[ RGX Device ID:0 Start ]------ +[ 37.406141] PVR_K: 246: ------[ RGX Info ]------ +[ 37.412020] PVR_K: 246: Device Node (Info): 00000000695d68ba (00000000849499ed) +[ 37.421255] PVR_K: 246: RGX BVNC: 22.104.208.318 (rogue) +[ 37.427995] PVR_K: 246: RGX Device State: Active +[ 37.433862] PVR_K: 246: RGX Power State: ON +[ 37.439198] PVR_K: 246: FW info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 37.448985] PVR_K: 246: BIF0 - OK +[ 37.453262] PVR_K: 246: RGX FW State: OK (HWRState 0x00000001: HWR OK;) +[ 37.461720] PVR_K: 246: RGX FW Power State: RGXFWIF_POW_IDLE (APM disabled: 0 ok, 0 denied, 0 non-idle, 0 retry, 0 other, 0 total. Latency: 100 ms) +[ 37.478439] PVR_K: 246: RGX DVFS: 0 frequency changes. Current frequency: 599.999 MHz (sampled at 37069292420 ns). FW frequency: 100.000 MHz. +[ 37.494480] PVR_K: 246: RGX FW OS 0 - State: active; Freelists: Ok; Priority: 0; MTS on; +[ 37.504787] PVR_K: 246: Number of HWR: GP(0/0+0), 2D(0/0+0), TA(0/0+0), 3D(1/1+0), CDM(0/0+0), RAY(0/0+0), FALSE(0,0,0,0,0,0) +[ 37.519116] PVR_K: 246: DM 0 (GP) +[ 37.523379] PVR_K: 246: DM 1 (HWRflags 0x00000000: working;) +[ 37.530579] PVR_K: 246: DM 2 (HWRflags 0x00000000: working;) +[ 37.537813] PVR_K: 246: DM 3 (HWRflags 0x00000000: working;) +[ 37.545004] PVR_K: 246: Recovery 1: PID = 1026, frame = 0, HWRTData = 0x00000000, EventStatus = 0x00004410, Guilty Lockup +[ 37.559029] PVR_K: 246: CRTimer = 0x000003f1ca76, OSTimer = 37.136270126, CyclesElapsed = 40136704 +[ 37.571870] PVR_K: 246: PreResetTimeInCycles = 20992, HWResetTimeInCycles = 18688, TotalResetTimeInCycles = 39680 +[ 37.586316] PVR_K: 246: DM 4 (HWRflags 0x00000000: working;) +[ 37.593493] PVR_K: 246: DM 5 (HWRflags 0x00000000: working;) +[ 37.600677] PVR_K: 246: RGX Kernel CCB WO:0xD RO:0xD +[ 37.606978] PVR_K: 246: RGX Firmware CCB WO:0x2 RO:0x2 +[ 37.613505] PVR_K: 246: RGX Kernel CCB commands executed = 13 +[ 37.620787] PVR_K: 246: RGX SLR: Forced UFO updates requested = 0 +[ 37.628505] PVR_K: 246: RGX Errors: WGP:0, TRP:0 +[ 37.634378] PVR_K: 246: Thread0: FW IRQ count = 11 +[ 37.640461] PVR_K: 246: Last sampled IRQ count in LISR = 11 +[ 37.647535] PVR_K: 246: FW System config flags = 0x00020000 (Ctx switch options: Medium CSW profile; VDM CS INDEX mode;) +[ 37.661216] PVR_K: 246: FW OS config flags = 0x0000000F (Ctx switch: TDM; TA; 3D; CDM;) +[ 37.671323] PVR_K: 246: ------[ RGX registers ]------ +[ 37.677742] PVR_K: 246: RGX Register Base Address (Linear): 0x00000000a2a6d92a +[ 37.687084] PVR_K: 246: RGX Register Base Address (Physical): 0x4E20000000 +[ 37.695770] PVR_K: 246: CORE_ID : 0x0000000008470000 +[ 37.704465] PVR_K: 246: CORE_REVISION : 0x00D0013E +[ 37.712298] PVR_K: 246: DESIGNER_REV_FIELD1 : 0x00000000 +[ 37.720125] PVR_K: 246: DESIGNER_REV_FIELD2 : 0x00000000 +[ 37.727947] PVR_K: 246: CHANGESET_NUMBER : 0x0000000000000000 +[ 37.736641] PVR_K: 246: CLK_CTRL : 0x0aaaaa002a2aaaaa +[ 37.745340] PVR_K: 246: CLK_STATUS : 0x0000000000600000 +[ 37.754034] PVR_K: 246: CLK_CTRL2 : 0x0000000000000000 +[ 37.762718] PVR_K: 246: CLK_STATUS2 : 0x0000000000000000 +[ 37.771419] PVR_K: 246: EVENT_STATUS : 0x00004410 +[ 37.779252] PVR_K: 246: TIMER : 0x0000000004034fda +[ 37.787938] PVR_K: 246: BIF_FAULT_BANK0_MMU_STATUS : 0x00000000 +[ 37.795768] PVR_K: 246: BIF_FAULT_BANK0_REQ_STATUS : 0x0000000000000000 +[ 37.804493] PVR_K: 246: BIF_FAULT_BANK1_MMU_STATUS : 0x00000000 +[ 37.812332] PVR_K: 246: BIF_FAULT_BANK1_REQ_STATUS : 0x0000000000000000 +[ 37.821025] PVR_K: 246: BIF_MMU_STATUS : 0x00000000 +[ 37.828933] PVR_K: 246: BIF_MMU_ENTRY : 0x00000000 +[ 37.836767] PVR_K: 246: BIF_MMU_ENTRY_STATUS : 0x0000000000000000 +[ 37.845484] PVR_K: 246: BIF_STATUS_MMU : 0x00000000 +[ 37.853323] PVR_K: 246: BIF_READS_EXT_STATUS : 0x00000000 +[ 37.861153] PVR_K: 246: BIF_READS_INT_STATUS : 0x00000000 +[ 37.868984] PVR_K: 246: BIFPM_STATUS_MMU : 0x00000000 +[ 37.876821] PVR_K: 246: BIFPM_READS_EXT_STATUS : 0x00000000 +[ 37.884648] PVR_K: 246: BIFPM_READS_INT_STATUS : 0x00000000 +[ 37.892489] PVR_K: 246: BIF_CAT_BASE_INDEX : 0x0000000000000100 +[ 37.901184] PVR_K: 246: BIF_CAT_BASE0 : 0x0000000000000000 +[ 37.909886] PVR_K: 246: BIF_CAT_BASE1 : 0x00000008ac691000 +[ 37.918586] PVR_K: 246: BIF_CAT_BASE2 : 0x0000000000000000 +[ 37.927281] PVR_K: 246: BIF_CAT_BASE3 : 0x0000000000000000 +[ 37.935975] PVR_K: 246: BIF_CAT_BASE4 : 0x0000000000000000 +[ 37.944675] PVR_K: 246: BIF_CAT_BASE5 : 0x0000000000000000 +[ 37.953371] PVR_K: 246: BIF_CAT_BASE6 : 0x0000000000000000 +[ 37.962065] PVR_K: 246: BIF_CAT_BASE7 : 0x0000000000000000 +[ 37.970757] PVR_K: 246: BIF_CTRL_INVAL : 0x00000000 +[ 37.978614] PVR_K: 246: BIF_CTRL : 0x000000C0 +[ 37.986456] PVR_K: 246: BIF_PM_CAT_BASE_VCE0 : 0x0000000000000000 +[ 37.995156] PVR_K: 246: BIF_PM_CAT_BASE_TE0 : 0x0000000000000000 +[ 38.003847] PVR_K: 246: BIF_PM_CAT_BASE_ALIST0 : 0x0000000000000000 +[ 38.012572] PVR_K: 246: BIF_PM_CAT_BASE_VCE1 : 0x0000000000000000 +[ 38.021287] PVR_K: 246: BIF_PM_CAT_BASE_TE1 : 0x0000000000000000 +[ 38.029977] PVR_K: 246: BIF_PM_CAT_BASE_ALIST1 : 0x0000000000000000 +[ 38.038661] PVR_K: 246: PERF_TA_PHASE : 0x00000000 +[ 38.046490] PVR_K: 246: PERF_TA_CYCLE : 0x00000000 +[ 38.054323] PVR_K: 246: PERF_3D_PHASE : 0x00000005 +[ 38.062149] PVR_K: 246: PERF_3D_CYCLE : 0x000061B0 +[ 38.069974] PVR_K: 246: PERF_TA_OR_3D_CYCLE : 0x000061B0 +[ 38.077806] PVR_K: 246: PERF_TA_AND_3D_CYCLE : 0x00000000 +[ 38.085633] PVR_K: 246: PERF_COMPUTE_PHASE : 0x00000000 +[ 38.093456] PVR_K: 246: PERF_COMPUTE_CYCLE : 0x00000000 +[ 38.101281] PVR_K: 246: PM_PARTIAL_RENDER_ENABLE : 0x00000000 +[ 38.109110] PVR_K: 246: ISP_RENDER : 0x00000003 +[ 38.116940] PVR_K: 246: TLA_STATUS : 0x0000000000000000 +[ 38.125639] PVR_K: 246: MCU_FENCE : 0x0000018000000000 +[ 38.134343] PVR_K: 246: VDM_CONTEXT_STORE_STATUS : 0x00000001 +[ 38.142194] PVR_K: 246: VDM_CONTEXT_STORE_TASK0 : 0x0000000000000000 +[ 38.150908] PVR_K: 246: VDM_CONTEXT_STORE_TASK1 : 0x0000000000000000 +[ 38.159610] PVR_K: 246: VDM_CONTEXT_STORE_TASK2 : 0x0000000000000000 +[ 38.168312] PVR_K: 246: VDM_CONTEXT_RESUME_TASK0 : 0x0000000000000000 +[ 38.177126] PVR_K: 246: VDM_CONTEXT_RESUME_TASK1 : 0x0000000000000000 +[ 38.185884] PVR_K: 246: VDM_CONTEXT_RESUME_TASK2 : 0x0000000000000000 +[ 38.194619] PVR_K: 246: ISP_CTL : 0x0002B000 +[ 38.202459] PVR_K: 246: ISP_STATUS : 0x00000003 +[ 38.210312] PVR_K: 246: MTS_INTCTX : 0x00000000 +[ 38.218140] PVR_K: 246: MTS_BGCTX : 0x00000000 +[ 38.225982] PVR_K: 246: MTS_BGCTX_COUNTED_SCHEDULE : 0x00000000 +[ 38.233819] PVR_K: 246: MTS_SCHEDULE : 0x00000000 +[ 38.241651] PVR_K: 246: MTS_GPU_INT_STATUS : 0x00004410 +[ 38.249481] PVR_K: 246: CDM_CONTEXT_STORE_STATUS : 0x00000000 +[ 38.257327] PVR_K: 246: CDM_CONTEXT_PDS0 : 0x0000000000000000 +[ 38.266025] PVR_K: 246: CDM_CONTEXT_PDS1 : 0x0000000000000000 +[ 38.274720] PVR_K: 246: CDM_TERMINATE_PDS : 0x0000000000000000 +[ 38.283417] PVR_K: 246: CDM_TERMINATE_PDS1 : 0x0000000000000000 +[ 38.292126] PVR_K: 246: SIDEKICK_IDLE : 0x0000007E +[ 38.299949] PVR_K: 246: SLC_IDLE : 0x000000FF +[ 38.307780] PVR_K: 246: SLC_STATUS0 : 0x00000000 +[ 38.315605] PVR_K: 246: SLC_STATUS1 : 0x0000000000000000 +[ 38.324298] PVR_K: 246: SLC_STATUS2 : 0x0000000000000000 +[ 38.333108] PVR_K: 246: SLC_CTRL_BYPASS : 0x01000000 +[ 38.340961] PVR_K: 246: SLC_CTRL_MISC : 0x0000000000200003 +[ 38.349663] PVR_K: 246: MIPS_ADDR_REMAP1_CONFIG1 : 0x1FC00001 +[ 38.357515] PVR_K: 246: MIPS_ADDR_REMAP1_CONFIG2 : 0x00000008ac48900c +[ 38.366220] PVR_K: 246: MIPS_ADDR_REMAP2_CONFIG1 : 0x1FC01001 +[ 38.374049] PVR_K: 246: MIPS_ADDR_REMAP2_CONFIG2 : 0x00000008b014600c +[ 38.382741] PVR_K: 246: MIPS_ADDR_REMAP3_CONFIG1 : 0x1FC02001 +[ 38.390568] PVR_K: 246: MIPS_ADDR_REMAP3_CONFIG2 : 0x00000008ac48800c +[ 38.399268] PVR_K: 246: MIPS_ADDR_REMAP4_CONFIG1 : 0x1FC00000 +[ 38.407101] PVR_K: 246: MIPS_ADDR_REMAP4_CONFIG2 : 0x000000000000000c +[ 38.415791] PVR_K: 246: MIPS_ADDR_REMAP5_CONFIG1 : 0x00000001 +[ 38.423618] PVR_K: 246: MIPS_ADDR_REMAP5_CONFIG2 : 0x00000008ac48900c +[ 38.432314] PVR_K: 246: MIPS_WRAPPER_CONFIG : 0x000000000001cf80 +[ 38.441006] PVR_K: 246: MIPS_EXCEPTION_STATUS : 0x00000020 +[ 38.448964] PVR_K: 246: ---- [ MIPS internal state ] ---- +[ 38.455822] PVR_K: 246: PC : 0xC00171C4 +[ 38.463645] PVR_K: 246: STATUS_REGISTER : 0x00481C05 +[ 38.471472] PVR_K: 246: CAUSE_REGISTER : 0x00800000 +[ 38.479303] PVR_K: 246: BAD_REGISTER : 0xC00171C4 +[ 38.487131] PVR_K: 246: EPC : 0xC00171C0 +[ 38.494959] PVR_K: 246: SP : 0xCF600FE0 +[ 38.502783] PVR_K: 246: BAD_INSTRUCTION : 0x00000000 +[ 38.510607] PVR_K: 246: TLB : +[ 38.517242] PVR_K: 246: 0) VA 0xCF800000 ( 64k) -> PA0 0xe20000000 DV , PA1 0x00000000 C +[ 38.527991] PVR_K: 246: 1) VA 0xCF000000 ( 16k) -> PA0 0x8b0130000 DVGC, PA1 0x8b0134000 DVGC +[ 38.538861] PVR_K: 246: 2) VA 0xCF600000 ( 4k) -> PA0 0x8b0147000 DV C, PA1 0x00000000 C +[ 38.549615] PVR_K: 246: 3) VA 0xC0032000 ( 4k) -> PA0 0x8b0143000 DVGC, PA1 0x8b0144000 DVGC +[ 38.560478] PVR_K: 246: 4) VA 0xC0024000 ( 4k) -> PA0 0x8b01cb000 DVG , PA1 0x8b01cd000 VG +[ 38.571339] PVR_K: 246: 5) VA 0xC002A000 ( 4k) -> PA0 0x8b423f000 DVG , PA1 0x8b4249000 DVG +[ 38.582200] PVR_K: 246: 6) VA 0xC0016000 ( 4k) -> PA0 0x8ac486000 DVGC, PA1 0x8ac487000 DVGC +[ 38.593071] PVR_K: 246: 7) VA 0xC0004000 ( 4k) -> PA0 0x8b0114000 DVGC, PA1 0x8b0115000 DVGC +[ 38.603934] PVR_K: 246: 8) VA 0xC0010000 ( 4k) -> PA0 0x8ac480000 DVGC, PA1 0x8ac481000 DVGC +[ 38.614795] PVR_K: 246: 9) VA 0xC0008000 ( 4k) -> PA0 0x8b0118000 DVGC, PA1 0x8b0119000 DVGC +[ 38.625656] PVR_K: 246: 10) VA 0xC001A000 ( 4k) -> PA0 0x8b014a000 DVG , PA1 0x8b014c000 DVG +[ 38.636527] PVR_K: 246: 11) VA 0xC0028000 ( 4k) -> PA0 0x8ac692000 DVGC, PA1 0x8b021c000 DVGC +[ 38.647392] PVR_K: 246: 12) VA 0xC0066000 ( 4k) -> PA0 0x00000000 C, PA1 0x8b4239000 DV C +[ 38.658148] PVR_K: 246: 13) VA 0xC0006000 ( 4k) -> PA0 0x8b0116000 DVGC, PA1 0x8b0117000 DVGC +[ 38.669009] PVR_K: 246: 14) VA 0xC0020000 ( 4k) -> PA0 0x8b01c5000 DVG , PA1 0x8b01c6000 DVG +[ 38.679867] PVR_K: 246: 15) VA 0xC000A000 ( 4k) -> PA0 0x8b011a000 DVGC, PA1 0x8b011b000 DVGC +[ 38.690731] PVR_K: 246: -------------------------------- +[ 38.697473] PVR_K: 246: ------[ RGX FW Trace Info ]------ +[ 38.704323] PVR_K: 246: Debug log type: none +[ 38.709767] PVR_K: 246: RGX FW thread 0: Trace buffer not yet allocated +[ 38.718133] PVR_K: 246: ------[ Full CCB Status ]------ +[ 38.724772] PVR_K: 246: FWCtx 0xC0028300 (TQ_3D-P1026-T1032-byd_srv.out) +[ 38.733246] PVR_K: 246: `-- +[ 38.737816] PVR_K: 246: FWCtx 0xC0028040 (TA-P1026-T1032-byd_srv.out) +[ 38.745965] PVR_K: 246: `-- +[ 38.750545] PVR_K: 246: FWCtx 0xC00280E0 (3D-P1026-T1032-byd_srv.out) +[ 38.758685] PVR_K: 246: `-- +[ 38.763268] PVR_K: 246: ------[ RGX Device ID:0 End ]------ +[ 38.770340] PVR_K: 246: ------[ System Summary Device ID:0 ]------ +[ 38.778166] PVR_K: 246: Device System Power State: ON +[ 38.784583] PVR_K: 246: MaxHWTOut: 500000us, WtTryCt: 10000, WDGTOut(on,off): (10000ms,3600000ms) +[ 38.795791] PVR_K: 246: ------[ Server Thread Summary ]------ +[ 38.803085] PVR_K: 246: pvr_defer_free : Running +[ 38.809174] PVR_K: 246: Number of deferred cleanup items : 0 +[ 38.816782] PVR_K: 246: pvr_device_wdg : Running +[ 38.822873] PVR_K: 246: pvr_cacheop : Running +[ 38.828648] PVR_K: 246: Configuration: QSZ: 16, UKT: -1, KDFT: 131072, LINESIZE: 64, PGSIZE: 4096, KDF: Yes, URBF: Yes +[ 38.842541] PVR_K: 246: Pending deferred CacheOp entries : 0 +[ 38.850151] PVR_K: 246: ------[ AppHint Settings ]------ +[ 38.856885] PVR_K: 246: Build Vars +[ 38.861463] PVR_K: 246: EnableTrustedDeviceAceConfig: N +[ 38.868534] PVR_K: 246: CleanupThreadPriority: 0x00000005 +[ 38.875841] PVR_K: 246: CacheOpThreadPriority: 0x00000001 +[ 38.883137] PVR_K: 246: WatchdogThreadPriority: 0x00000000 +[ 38.890531] PVR_K: 246: HWPerfClientBufferSize: 0x000c0000 +[ 38.897923] PVR_K: 246: Module Params +[ 38.902824] PVR_K: 246: none +[ 38.906967] PVR_K: 246: Debug Info Params +[ 38.912312] PVR_K: 246: CacheOpConfig: 0x0000000c +[ 38.918722] PVR_K: 246: CacheOpUMKMThresholdSize: 0xffffffff +[ 38.926340] PVR_K: 246: Debug Info Params Device ID: 0 +[ 38.933094] PVR_K: 246: none +[ 38.937232] PVR_K: 246: ------[ HTB Log state: Off ]------ +[ 38.944196] PVR_K: 246: ------[ Active Sync Checkpoints ]------ +[ 38.951699] ------[ Native Fence Sync: timelines ]------ +[ 38.958333] foreign_sync: @0 ctx=1 refs=1 +[ 38.963340] sw: RM_SWTimeline-byd_srv.out-1026 @0 cur=0 +[ 38.969860] rogue-ta3d: @0 ctx=3 refs=1 +[ 38.974653] rogue-tq3d: @0 ctx=5 refs=1 +[ 38.979441] QE-byd_srv.out-1026: @4 ctx=6 refs=2 +[ 38.985196] @3: (++) refs=1 fwaddr=0xc002b019 enqueue=1 status=Signalled 3-TQM +[ 38.994334] PVR_K: 246: ------------[ PVR DBG: END ]------------ +[ 39.002056] ------------[ cut here ]------------ +[ 39.007930] WARNING: CPU: 0 PID: 246 at /home/hhw3516496/workspace/TDA4_1018/tda4_linux_os_v8_4/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109/binary_j721e_linux_wayland_release/target_aarch64/kbuild/services/server/common/pvr_notifier.c:529 PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 39.040661] Modules linked in: bluetooth ecdh_generic ecc rfkill xhci_plat_hcd xhci_hcd rpmsg_char omap_rng ti_am335x_adc rng_core kfifo_buf cdns3 udc_core roles irq_pruss_intc pru_rproc usbcore icss_iep usb_common crct10dif_ce snd_soc_j721e_evm ti_j721e_cpsw_virt_mac phy_can_transceiver ti_am335x_tscadc pruss ti_k3_r5_remoteproc vxe_enc vxd_dec videobuf2_dma_sg v4l2_mem2mem videobuf2_dma_contig pvrsrvkm(O) ti_k3_dsp_remoteproc sa2ul videobuf2_memops videobuf2_v4l2 sha512_generic virtio_rpmsg_bus cdns_dphy authenc videobuf2_common cdns3_ti snd_soc_pcm3168a_i2c snd_soc_pcm3168a m_can_platform m_can can_dev rti_wdt sch_fq_codel rpmsg_kdrv_switch cryptodev(O) ipv6 +[ 39.113805] CPU: 0 PID: 246 Comm: pvr_device_wdg Tainted: G O 5.10.120-g95b90aa828 #1 +[ 39.125195] Hardware name: Texas Instruments K3 J721E SoC (DT) +[ 39.132469] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) +[ 39.140083] pc : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 39.147009] lr : PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 39.153847] sp : ffff8000121fbc80 +[ 39.157976] x29: ffff8000121fbc80 x28: 0000000000000000 +[ 39.164602] x27: ffff8000120ab918 x26: ffff800008c8f7e0 +[ 39.171228] x25: ffff00082c75dd00 x24: 0000000000000009 +[ 39.177851] x23: 0000000000000002 x22: 0000000000000000 +[ 39.184477] x21: 0000000000000000 x20: ffff00082c75ddd8 +[ 39.191100] x19: ffff00082b7c0b20 x18: 0000000000000010 +[ 39.197723] x17: 00000000bff2cf6a x16: 00000000c98b03fc +[ 39.204344] x15: ffff00082b54d930 x14: 00000000000003b8 +[ 39.210963] x13: 0000000000000000 x12: 0000000000000000 +[ 39.217585] x11: 0000000000000007 x10: 00000000000009c0 +[ 39.224206] x9 : ffff8000121fbae0 x8 : ffff00082b54de20 +[ 39.230827] x7 : ffff00087f9ce1c0 x6 : ffff00087f9ce140 +[ 39.237449] x5 : 00000000410fd080 x4 : 0000000000f0000f +[ 39.244071] x3 : 0000000000000000 x2 : ffffffffffffff00 +[ 39.250693] x1 : 0000000000000000 x0 : ffff00082c7a0900 +[ 39.257316] Call trace: +[ 39.260483] PVRSRVDebugRequest+0x4d0/0x660 [pvrsrvkm] +[ 39.266951] DevicesWatchdogThread_ForEachVaCb+0x108/0x158 [pvrsrvkm] +[ 39.275048] List_PVRSRV_DEVICE_NODE_ForEach_va+0x74/0xb0 [pvrsrvkm] +[ 39.283041] DevicesWatchdogThread+0x144/0x210 [pvrsrvkm] +[ 39.289831] OSThreadRun+0x24/0x60 [pvrsrvkm] +[ 39.295271] kthread+0x140/0x160 +[ 39.299292] ret_from_fork+0x10/0x34 +[ 39.303748] ---[ end trace e7acb1207304259d ]--- + +Kong, Thank you for confirming, the team expected that this patch would have helped this issue, but since it did not, I am requesting more instructions on what more information they need to analyze the issue. I'll be posting shortly. Regards, Erick + +Erick, May I ask if there is any progress on this issue? Regards, kong + +Kong, I've received an update. Can you please blacklist the GPU driver so it does not auto-load, then initialize the GPU driver with this parameter: PVR_SRVKM_PARAMS="DisableClockGating=1" /etc/init.d/rc.pvr start Then, let us know if you still see this issue. And if so, you can gather an initial set of logs by running "pvrlogdump" Thanks, Erick + +Erick， We have tried the new method and there are still problems，The log is as follows pvrlogdump_2303032313.txt.gz Thanks, kong + +hi，Erick： It has been quite a while now. How is the progress of this issue, Thanks， kong + +Kong, Apologies, I was on leave last week. I have updated instruction that can help in this issue, the patches are on-top of your GPU kernel driver. We will need to add them, then rebuild and install the kernel driver onto your system. Can you please add these patches and let us know the results with the following pvrlogdump instructions: PVR_SRVKM_PARAMS="EnablePageFaultDebug=1" /etc/init.d/rc.pvr start + +pvrdebug -loggroups main,mts,hwr,pm,debug + +Start application Patches: 5756.CL6470972_Allocate_TQ_shaders_as_cached.patch 7658.CL6471292_cache_flush_on_cached_PMR_writes.patch Thanks, Erick + +hi Erick After incorporating the patch into the code, after multiple rounds of testing, this issue still exists, but the probability seems to have decreased. The following is the log, please check it, thank you! gpu_cash.txt root@j7-evm:~# pvrdebug -loggroups main,mts,hwr,pm,debug +----------------------- Start ----------------------- +Set FW Log type to TRACE ( main mts pm hwr debug ) +Connecting to first (0) default pvr device +[ 60.806091] PVR_K: 1023: RGX Firmware image 'rgx.fw.22.104.208.318' loaded +[ 60.843412] PVR_K: 1023: Shader binary image 'rgx.sh.22.104.208.318' loaded +------------------------ End ------------------------ +root@j7-evm:~# +root@j7-evm:~# cd /opt/vision_apps/ +root@j7-evm:/opt/vision_apps# source ./vision_apps_init.sh +[MCU2_0] 1.524158 s: CIO: Init ... Done !!! +[MCU2_0] 1.524228 s: ### CPU Frequency = 1000000000 Hz +[MCU2_0] 1.524268 s: APP: Init ... !!! +[MCU2_0] 1.524294 s: SCICLIENT: Init ... !!! +[MCU2_0] 1.524537 s: SCICLIENT: DMSC FW version [8.6.3--v08.06.03 (Chill Capybar] +[MCU2_0] 1.524589 s: SCICLIENT: DMSC FW revision 0x8 +[MCU2_0] 1.524624 s: SCICLIENT: DMSC FW ABI revision 3.1 +[MCU2_0] 1.524662 s: SCICLIENT: Init ... Done !!! +[MCU2_0] 1.524689 s: UDMA: Init ... !!! +[MCU2_0] 1.526049 s: UDMA: Init ... Done !!! +[MCU2_0] 1.526114 s: MEM: Init ... !!! +[MCU2_0] 1.526159 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ d9000000 of size 16777216 bytes !!! +[MCU2_0] 1.526237 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! +[MCU2_0] 1.526301 s: MEM: Init ... Done !!! +[MCU2_0] 1.526329 s: IPC: Init ... !!! +[MCU2_0] 1.526393 s: IPC: 6 CPUs participating in IPC !!! +[MCU2_0] 1.526444 s: IPC: Waiting for HLOS to be ready ... !!! +[MCU2_0] 10.274110 s: IPC: HLOS is ready !!! +[MCU2_0] 10.289451 s: IPC: Init ... Done !!! +[MCU2_0] 10.289520 s: APP: Syncing with 5 CPUs ... !!! +[MCU2_0] 10.460773 s: APP: Syncing with 5 CPUs ... Done !!! +[MCU2_0] 10.460958 s: REMOTE_SERVICE: Init ... !!! +[MCU2_0] 10.462593 s: REMOTE_SERVICE: Init ... Done !!! +[MCU2_0] 10.462659 s: [HHW]ETHFW: Init ... !!! +[MCU2_0] 10.467643 s: [HHW]appEthFwInit-init pin +[MCU2_0] 10.467701 s: FVID2: Init ... !!! +[MCU2_0] 10.467796 s: FVID2: Init ... Done !!! +[MCU2_0] 10.467926 s: DSS: Init ... !!! +[MCU2_0] 10.467969 s: DSS: Display type is HDMI !!! +[MCU2_0] 10.467999 s: DSS: M2M Path is enabled !!! +[MCU2_0] 10.468027 s: DSS: SoC init ... !!! +[MCU2_0] 10.468052 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 +[MCU2_0] 10.468445 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.468488 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=4 parent=6 +[MCU2_0] 10.468686 s: SCICLIENT: Sciclient_pmSetModuleClkParent success +[MCU2_0] 10.468739 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=4 freq=72540000 +[MCU2_0] 10.470697 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success +[MCU2_0] 10.470740 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=4 state=2 flag=0 +[MCU2_0] 10.470990 s: SCICLIENT: Sciclient_pmModuleClkRequest success +[MCU2_0] 10.471029 s: DSS: SoC init ... Done !!! +[MCU2_0] 10.471057 s: DSS: Board init ... !!! +[MCU2_0] 10.471082 s: DSS: Board init ... Done !!! +[MCU2_0] 10.474631 s: DSS: Init ... Done !!! +[MCU2_0] 10.474716 s: VHWA: VPAC Init ... !!! +[MCU2_0] 10.474754 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 +[MCU2_0] 10.475078 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.475124 s: VHWA: LDC Init ... !!! +[MCU2_0] 10.479676 s: VHWA: LDC Init ... Done !!! +[MCU2_0] 10.479747 s: VHWA: MSC Init ... !!! +[MCU2_0] 10.492053 s: VHWA: MSC Init ... Done !!! +[MCU2_0] 10.492119 s: VHWA: NF Init ... !!! +[MCU2_0] 10.493921 s: VHWA: NF Init ... Done !!! +[MCU2_0] 10.493982 s: VHWA: VISS Init ... !!! +[MCU2_0] 10.504891 s: VHWA: VISS Init ... Done !!! +[MCU2_0] 10.504960 s: VHWA: VPAC Init ... Done !!! +[MCU2_0] 10.505007 s: VX_ZONE_INIT:Enabled +[MCU2_0] 10.505041 s: VX_ZONE_ERROR:Enabled +[MCU2_0] 10.505073 s: VX_ZONE_WARNING:Enabled +[MCU2_0] 10.506479 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 +[MCU2_0] 10.506758 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF +[MCU2_0] 10.507012 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 +[MCU2_0] 10.507301 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 +[MCU2_0] 10.507550 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 +[MCU2_0] 10.507890 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 +App set dl default params Done! +[MCU2_0] 10.508243 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 +[MCU2_0] 10.508524 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 +[MCU2_0] 10.508823 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 +[MCU2_0] 10.509111 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 +[MCU2_0] 10.509369 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX +[MCU2_0] 10.509649 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 +[MCU2_0] 10.509949 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 +[MCU2_0] 10.510222 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 +[MCU2_0] 10.510497 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 +[MCU2_0] 10.510789 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 +[MCU2_0] 10.511070 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 +[MCU2_0] 10.511324 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 +[MCU2_0] 10.511571 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 +[MCU2_0] 10.511842 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 +[MCU2_0] 10.512109 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 +[MCU2_0] 10.512168 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! +[MCU2_0] 10.512205 s: APP: OpenVX Target kernel init ... !!! +[MCU2_0] 10.533020 s: APP: OpenVX Target kernel init ... Done !!! +[MCU2_0] 10.533075 s: CSI2RX: Init ... !!! +[MCU2_0] 10.533103 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 +[MCU2_0] 10.533234 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.533278 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 +[MCU2_0] 10.533429 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.533463 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 +[MCU2_0] 10.533604 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.533641 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 +[MCU2_0] 10.533741 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.533780 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 +[MCU2_0] 10.533869 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.534092 s: CSI2RX: Init ... Done !!! +[MCU2_0] 10.534132 s: CSI2TX: Init ... !!! +[MCU2_0] 10.534156 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 +[MCU2_0] 10.534251 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.534289 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2 +[MCU2_0] 10.534430 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.534466 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 +[MCU2_0] 10.534593 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_0] 10.534678 s: CSI2TX: Init ... Done !!! +[MCU2_0] 10.534724 s: ISS: Init ... !!! +[MCU2_0] 10.534770 s: galvin setupI2CInst +[MCU2_0] 10.534831 s: Found sensor MAX_RAW12_AR0147 at location 0 +[MCU2_0] 10.534884 s: Found sensor HY_AR1043_UYVY at location 1 +[MCU2_0] 10.534925 s: Found sensor OV_OX01F10_UYVY at location 2 +[MCU2_0] 10.534962 s: Found sensor BYD_OX01F10_UYVY at location 3 +[MCU2_0] 10.534998 s: Found sensor UNION_OX01F10_UYVY at location 4 +[MCU2_0] 10.535035 s: Found sensor MAX96705_UYVY at location 5 +[MCU2_0] 10.535072 s: Found sensor HY_AR0233_UYVY at location 6 +[MCU2_0] 10.535123 s: [hy_ar0233]-[IssSensor_hy_ar0233_Init] +App Parse User dl params Done! +[MCU2_0] 10.535153 s: IssSensor_Init ... Done !!! +App Update dl Params Done! +[MCU2_0] 10.535225 s: IttRemoteServer_Init ... Done !!! +[MCU2_0] 10.535262 s: VISS REMOTE SERVICE: Init ... !!! +[MCU2_0] 10.535327 s: VISS REMOTE SERVICE: Init ... Done !!! +[MCU2_0] 10.535362 s: UDMA Copy: Init ... !!! +[MCU2_0] 10.537236 s: UDMA Copy: Init ... Done !!! +[MCU2_0] 10.537334 s: APP: Init ... Done !!! +[MCU2_0] 10.537372 s: APP: Run ... !!! +[MCU2_0] 10.537398 s: IPC: Starting echo test ... +[MCU2_0] 10.540344 s: APP: Run ... Done !!! +[MCU2_0] 10.541967 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] +[MCU2_0] 10.542086 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.] +[MCU2_0] 10.542189 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] +[MCU2_0] 10.542279 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] +[MCU2_1] 1.531060 s: CIO: Init ... Done !!! +[MCU2_1] 1.531129 s: ### CPU Frequency = 1000000000 Hz +[MCU2_1] 1.531171 s: APP: Init ... !!! +[MCU2_1] 1.531194 s: SCICLIENT: Init ... !!! +[MCU2_1] 1.531447 s: SCICLIENT: DMSC FW version [8.6.3--v08.06.03 (Chill Capybar] +[MCU2_1] 1.531496 s: SCICLIENT: DMSC FW revision 0x8 +[MCU2_1] 1.531530 s: SCICLIENT: DMSC FW ABI revision 3.1 +[MCU2_1] 1.531565 s: SCICLIENT: Init ... Done !!! +[MCU2_1] 1.531606 s: UDMA: Init ... !!! +[MCU2_1] 1.532956 s: UDMA: Init ... Done !!! +[MCU2_1] 1.533018 s: MEM: Init ... !!! +[MCU2_1] 1.533060 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ da000000 of size 16777216 bytes !!! +[MCU2_1] 1.533130 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!! +[MCU2_1] 1.533189 s: MEM: Init ... Done !!! +[MCU2_1] 1.533214 s: IPC: Init ... !!! +[MCU2_1] 1.533273 s: IPC: 6 CPUs participating in IPC !!! +[MCU2_1] 1.533324 s: IPC: Waiting for HLOS to be ready ... !!! +[MCU2_1] 10.445553 s: IPC: HLOS is ready !!! +[MCU2_1] 10.460657 s: IPC: Init ... Done !!! +[MCU2_1] 10.460723 s: APP: Syncing with 5 CPUs ... !!! +[MCU2_1] 10.460771 s: APP: Syncing with 5 CPUs ... Done !!! +[MCU2_1] 10.460810 s: REMOTE_SERVICE: Init ... !!! +[MCU2_1] 10.462518 s: REMOTE_SERVICE: Init ... Done !!! +[MCU2_1] 10.462584 s: FVID2: Init ... !!! +[MCU2_1] 10.462662 s: FVID2: Init ... Done !!! +[MCU2_1] 10.462695 s: VHWA: DMPAC: Init ... !!! +[MCU2_1] 10.462721 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 +[MCU2_1] 10.463212 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_1] 10.463255 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 +[MCU2_1] 10.463704 s: SCICLIENT: Sciclient_pmSetModuleState success +[MCU2_1] 10.463743 s: VHWA: DOF Init ... !!! +[MCU2_1] 10.474390 s: VHWA: DOF Init ... Done !!! +[MCU2_1] 10.474457 s: VHWA: SDE Init ... !!! +[MCU2_1] 10.478323 s: VHWA: SDE Init ... Done !!! +[MCU2_1] 10.478387 s: VHWA: DMPAC: Init ... Done !!! +[MCU2_1] 10.478435 s: VX_ZONE_INIT:Enabled +[MCU2_1] 10.478466 s: VX_ZONE_ERROR:Enabled +[MCU2_1] 10.478492 s: VX_ZONE_WARNING:Enabled +[MCU2_1] 10.479947 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 +[MCU2_1] 10.480186 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE +[MCU2_1] 10.480408 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF +[MCU2_1] 10.480465 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! +[MCU2_1] 10.480501 s: APP: OpenVX Target kernel init ... !!! +app_run_task_create! +[MCU2_1] 10.480803 s: APP: OpenVX Target kernel init ... Done !!! +[MCU2_1] 10.480846 s: UDMA Copy: Init ... !!! +[MCU2_1] 10.482751 s: UDMA Copy: Init ... Done !!! +[MCU2_1] 10.482819 s: APP: Init ... Done !!! +[MCU2_1] 10.482851 s: APP: Run ... !!! +[MCU2_1] 10.482876 s: IPC: Starting echo test ... +[MCU2_1] 10.485406 s: APP: Run ... Done !!! +[MCU2_1] 10.486508 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] +[MCU2_1] 10.486628 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] +[MCU2_1] 10.486721 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] +[MCU2_1] 10.541183 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] +[C6x_1 ] 1.641339 s: CIO: Init ... Done !!! +[C6x_1 ] 1.641364 s: ### CPU Frequency = 1350000000 Hz +[C6x_1 ] 1.641374 s: APP: Init ... !!! +[C6x_1 ] 1.641382 s: SCICLIENT: Init ... !!! +[C6x_1 ] 1.641573 s: SCICLIENT: DMSC FW version [8.6.3--v08.06.03 (Chill Capybar] +[C6x_1 ] 1.641585 s: SCICLIENT: DMSC FW revision 0x8 +[C6x_1 ] 1.641594 s: SCICLIENT: DMSC FW ABI revision 3.1 +[C6x_1 ] 1.641604 s: SCICLIENT: Init ... Done !!! +[C6x_1 ] 1.641613 s: UDMA: Init ... !!! +[C6x_1 ] 1.643115 s: UDMA: Init ... Done !!! +[C6x_1 ] 1.643133 s: MEM: Init ... !!! +[C6x_1 ] 1.643146 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ dc000000 of size 157286400 bytes !!! +[C6x_1 ] 1.643164 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! +[C6x_1 ] 1.643179 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e5600000 of size 50331648 bytes !!! +[C6x_1 ] 1.643195 s: MEM: Init ... Done !!! +[C6x_1 ] 1.643203 s: IPC: Init ... !!! +[C6x_1 ] 1.643223 s: IPC: 6 CPUs participating in IPC !!! +[C6x_1 ] 1.643236 s: IPC: Waiting for HLOS to be ready ... !!! +[C6x_1 ] 9.910852 s: IPC: HLOS is ready !!! +[C6x_1 ] 9.914560 s: IPC: Init ... Done !!! +[C6x_1 ] 9.914588 s: APP: Syncing with 5 CPUs ... !!! +[C6x_1 ] 10.460772 s: APP: Syncing with 5 CPUs ... Done !!! +[C6x_1 ] 10.460784 s: REMOTE_SERVICE: Init ... !!! +[C6x_1 ] 10.461427 s: REMOTE_SERVICE: Init ... Done !!! +[C6x_1 ] 10.461467 s: VX_ZONE_INIT:Enabled +[C6x_1 ] 10.461478 s: VX_ZONE_ERROR:Enabled +[C6x_1 ] 10.461487 s: VX_ZONE_WARNING:Enabled +[C6x_1 ] 10.462281 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! +[C6x_1 ] 10.462297 s: APP: OpenVX Target kernel init ... !!! +[C6x_1 ] 10.462575 s: APP: OpenVX Target kernel init ... Done !!! +[C6x_1 ] 10.462593 s: UDMA Copy: Init ... !!! +[C6x_1 ] 10.466235 s: UDMA Copy: Init ... Done !!! +[C6x_1 ] 10.466253 s: APP: Init ... Done !!! +[C6x_1 ] 10.466261 s: APP: Run ... !!! +[C6x_1 ] 10.466269 s: IPC: Starting echo test ... +[C6x_1 ] 10.467289 s: APP: Run ... Done !!! +[C6x_1 ] 10.467596 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P] +[C6x_1 ] 10.468087 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] +[C6x_1 ] 10.485935 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] +[C6x_1 ] 10.541040 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] +[C6x_2 ] 1.764203 s: CIO: Init ... Done !!! +[C6x_2 ] 1.764228 s: ### CPU Frequency = 1350000000 Hz +[C6x_2 ] 1.764239 s: APP: Init ... !!! +[C6x_2 ] 1.764247 s: SCICLIENT: Init ... !!! +[C6x_2 ] 1.764441 s: SCICLIENT: DMSC FW version [8.6.3--v08.06.03 (Chill Capybar] +APP: Init ... !!! +[C6x_2 ] 1.764454 s: SCICLIENT: DMSC FW revision 0x8 +[C6x_2 ] 1.764463 s: SCICLIENT: DMSC FW ABI revision 3.1 +[C6x_2 ] 1.764473 s: SCICLIENT: Init ... Done !!! +[C6x_2 ] 1.764482 s: UDMA: Init ... !!! +[C6x_2 ] 1.765994 s: UDMA: Init ... Done !!! +[C6x_2 ] 1.766013 s: MEM: Init ... !!! +[C6x_2 ] 1.766026 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ e8600000 of size 157286400 bytes !!! +[C6x_2 ] 1.766044 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! +[C6x_2 ] 1.766060 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ f1c00000 of size 50331648 bytes !!! +[C6x_2 ] 1.766077 s: MEM: Init ... Done !!! +[C6x_2 ] 1.766085 s: IPC: Init ... !!! +[C6x_2 ] 1.766105 s: IPC: 6 CPUs participating in IPC !!! +[C6x_2 ] 1.766119 s: IPC: Waiting for HLOS to be ready ... !!! +[C6x_2 ] 10.127824 s: IPC: HLOS is ready !!! +[C6x_2 ] 10.131392 s: IPC: Init ... Done !!! +[C6x_2 ] 10.131419 s: APP: Syncing with 5 CPUs ... !!! +[C6x_2 ] 10.460772 s: APP: Syncing with 5 CPUs ... Done !!! +[C6x_2 ] 10.460785 s: REMOTE_SERVICE: Init ... !!! +[C6x_2 ] 10.461444 s: REMOTE_SERVICE: Init ... Done !!! +[C6x_2 ] 10.461481 s: VX_ZONE_INIT:Enabled +[C6x_2 ] 10.461491 s: VX_ZONE_ERROR:Enabled +[C6x_2 ] 10.461502 s: VX_ZONE_WARNING:Enabled +[C6x_2 ] 10.462295 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! +[C6x_2 ] 10.462310 s: APP: OpenVX Target kernel init ... !!! +[C6x_2 ] 10.462603 s: APP: OpenVX Target kernel init ... Done !!! +[C6x_2 ] 10.462620 s: UDMA Copy: Init ... !!! +MEM: Init ... !!! +[C6x_2 ] 10.466603 s: UDMA Copy: Init ... Done !!! +[C6x_2 ] 10.466623 s: APP: Init ... Done !!! +[C6x_2 ] 10.466632 s: APP: Run ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +[C6x_2 ] 10.466640 s: IPC: Starting echo test ... +MEM: Init ... Done !!! +IPC: Init ... !!! +[C6x_2 ] 10.467764 s: APP: Run ... Done !!! +[C6x_2 ] 10.468094 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.] +[C6x_2 ] 10.468127 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] +[C6x_2 ] 10.485958 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] +[C6x_2 ] 10.541089 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] +[C7x_1 ] 1.974527 s: CIO: Init ... Done !!! +[C7x_1 ] 1.974541 s: ### CPU Frequency = 1000000000 Hz +[C7x_1 ] 1.974552 s: APP: Init ... !!! +[C7x_1 ] 1.974560 s: SCICLIENT: Init ... !!! +[C7x_1 ] 1.974765 s: SCICLIENT: DMSC FW version [8.6.3--v08.06.03 (Chill Capybar] +[C7x_1 ] 1.974779 s: SCICLIENT: DMSC FW revision 0x8 +[C7x_1 ] 1.974790 s: SCICLIENT: DMSC FW ABI revision 3.1 +[C7x_1 ] 1.974800 s: SCICLIENT: Init ... Done !!! +[C7x_1 ] 1.974809 s: UDMA: Init ... !!! +[C7x_1 ] 1.975949 s: UDMA: Init ... Done !!! +[C7x_1 ] 1.975961 s: MEM: Init ... !!! +[C7x_1 ] 1.975972 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!! +[C7x_1 ] 1.975992 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!! +[C7x_1 ] 1.976010 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!! +[C7x_1 ] 1.976028 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!! +[C7x_1 ] 1.976045 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!! +[C7x_1 ] 1.976064 s: MEM: Init ... Done !!! +[C7x_1 ] 1.976072 s: IPC: Init ... !!! +IPC: Init ... Done !!! +[C7x_1 ] 1.976085 s: IPC: 6 CPUs participating in IPC !!! +REMOTE_SERVICE: Init ... !!! +[C7x_1 ] 1.976099 s: IPC: Waiting for HLOS to be ready ... !!! +[C7x_1 ] 10.349666 s: IPC: HLOS is ready !!! +[C7x_1 ] 10.351631 s: IPC: Init ... Done !!! +[C7x_1 ] 10.351645 s: APP: Syncing with 5 CPUs ... !!! +[C7x_1 ] 10.460773 s: APP: Syncing with 5 CPUs ... Done !!! +[C7x_1 ] 10.460789 s: REMOTE_SERVICE: Init ... !!! +[C7x_1 ] 10.460933 s: REMOTE_SERVICE: Init ... Done !!! +[C7x_1 ] 10.460956 s: VX_ZONE_INIT:Enabled +[C7x_1 ] 10.460967 s: VX_ZONE_ERROR:Enabled +[C7x_1 ] 10.460977 s: VX_ZONE_WARNING:Enabled +[C7x_1 ] 10.461135 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 +[C7x_1 ] 10.461224 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 +[C7x_1 ] 10.461317 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 +[C7x_1 ] 10.461394 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 +[C7x_1 ] 10.461459 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 +[C7x_1 ] 10.461534 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 +[C7x_1 ] 10.461656 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 +[C7x_1 ] 10.461724 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 +[C7x_1 ] 10.461745 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! +[C7x_1 ] 10.461757 s: APP: OpenVX Target kernel init ... !!! +[C7x_1 ] 10.461895 s: APP: OpenVX Target kernel init ... Done !!! +[C7x_1 ] 10.461909 s: APP: Init ... Done !!! +[C7x_1 ] 10.461918 s: APP: Run ... !!! +[C7x_1 ] 10.461926 s: IPC: Starting echo test ... +[C7x_1 ] 10.462072 s: APP: Run ... Done !!! +[C7x_1 ] 10.467602 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s] +[C7x_1 ] 10.468096 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] +[C7x_1 ] 10.485980 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] +[C7x_1 ] 10.541122 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] +REMOTE_SERVICE: Init ... Done !!! + 72.429041 s: GTC Frequency = 200 MHz +APP: Init ... Done !!! + 72.435760 s: VX_ZONE_INIT:Enabled + 72.435784 s: VX_ZONE_ERROR:Enabled + 72.435790 s: VX_ZONE_WARNING:Enabled + 72.437399 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 72.438473 s: VX_ZONE_INIT:[tivxHostInitLocal:93] Initialization Done for HOST !!! + 72.438540 s: ISS: Enumerating sensors ... !!! + 72.438970 s: ISS: Enumerating sensors ... found 0 : MAX_RAW12_AR0147 + 72.438979 s: ISS: Enumerating sensors ... found 1 : HY_AR1043_UYVY + 72.438984 s: ISS: Enumerating sensors ... found 2 : OV_OX01F10_UYVY + 72.438990 s: ISS: Enumerating sensors ... found 3 : BYD_OX01F10_UYVY + 72.438995 s: ISS: Enumerating sensors ... found 4 : UNION_OX01F10_UYVY + 72.439000 s: ISS: Enumerating sensors ... found 5 : MAX96705_UYVY + 72.439005 s: ISS: Enumerating sensors ... found 6 : HY_AR0233_UYVY +Sensor selected : HY_AR1043_UYVY +Querying HY_AR1043_UYVY + 72.439018 s: ISS: Querying sensor [HY_AR1043_UYVY] ... !!! + 72.439395 s: ISS: Querying sensor [HY_AR1043_UYVY] ... Done !!! +[MCU2_0] 72.438750 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_ENUMERATE +[MCU2_0] 72.439184 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_QUERY +[MCU2_0] 72.439235 s: Received Query for HY_AR1043_UYVY +Creating context done! +kxx debug Kernel loading! +Kernel loading done! + 72.478880 s: ISS: Initializing sensor [HY_AR1043_UYVY], doing IM_SENSOR_CMD_PWRON ... !!! + 72.478889 s: ISS: Initializing sensor [HY_AR1043_UYVY], doing IM_SENSOR_CMD_CONFIG ... !!! +[MCU2_0] 72.479060 s: ImageSensor_RemoteServiceHandler: IM_SENSOR_CMD_CONFIG +[MCU2_0] 72.479116 s: Application requested features = 0x120 +[MCU2_0] +[MCU2_0] 72.538708 s: Configuring all cameras on UB960_0 in broadcast mode +[MCU2_0] 72.738709 s: max9685-max96705 config start +[MCU2_0] 72.739774 s: hhq:End of max9286-max96705 config +[MCU2_0] 72.740512 s: hhq max9286 0x49 = 0x0f. sensor number = 4 +[MCU2_0] 72.740572 s: hhq max9286 0X0B = 0xe4 sensor_is_there = 0xf +[MCU2_0] 72.755749 s: file:/media/adas/X/home/xutianding/TDA4/code/my_code_v3/tda4_sdk_0806/tda4_apa_0806/imaging/sensor_drv/src/hy_ar1043_yuv/iss_sensor_hy_ar1043.c func:hy_ar1043_WriteReg +[MCU2_0] 72.756301 s: max9286_mipi: initialized sensor = 0x01. +[MCU2_0] 72.769744 s: file:/media/adas/X/home/xutianding/TDA4/code/my_code_v3/tda4_sdk_0806/tda4_apa_0806/imaging/sensor_drv/src/hy_ar1043_yuv/iss_sensor_hy_ar1043.c func:hy_ar1043_WriteReg +[MCU2_0] 72.770288 s: max9286_mipi: initialized sensor = 0x02. +[MCU2_0] 72.783743 s: file:/media/adas/X/home/xutianding/TDA4/code/my_code_v3/tda4_sdk_0806/tda4_apa_0806/imaging/sensor_drv/src/hy_ar1043_yuv/iss_sensor_hy_ar1043.c func:hy_ar1043_WriteReg +[MCU2_0] 72.784292 s: max9286_mipi: initialized sensor = 0x03. +[MCU2_0] 72.797742 s: file:/media/adas/X/home/xutianding/TDA4/code/my_code_v3/tda4_sdk_0806/tda4_apa_0806/imaging/sensor_drv/src/hy_ar1043_yuv/iss_sensor_hy_ar1043.c func:hy_ar1043_WriteReg +[MCU2_0] 72.798284 s: max9286_mipi: initialized sensor = 0x04. +[MCU2_0] 72.799025 s: max9685-max96705 config start + 72.875000 s: ISS: Initializing sensor [HY_AR1043_UYVY] ... Done !!! +Sensor init done! +Display init done! +BydSrvAppInit Done! +Graph create done! +[MCU2_0] 72.874713 s: hhq:End of max9286-max96705 config +[MCU2_0] 72.874764 s: IM_SENSOR_CMD_CONFIG channel_mask = 0 +[MCU2_0] 72.874803 s: IM_SENSOR_CMD_CONFIG returning status = 0 +Capture graph done! +[BSP]--> DSS_M2M1 m2m_node create success +UYVY->NV12 M2M graph done! +Begin open cfg file +BydSrv2dNodeCreate 1 +kxx debug:srv_cfg_set->block_bv_size.width=30 +ipc_RRWheelDriveDirection = 0 +ipc_DayLight_Left; = 0 +ipc_fullview_state = 0 +BydSrv2dNodeCreate graph done! +[BSP]--> DSS_M2M2 m2m_node create success + 72.942196 s: VX_ZONE_ERROR:[vxReplicateNode:1786] Parameter 2 direction is incorrect +2d->NV12 M2M graph done! + 72.942508 s: VX_ZONE_ERROR:[vxReplicateNode:1786] Parameter 5 direction is incorrect +BydSrvGpuNodeCreate graph done! +[BSP]--> DSS_M2M3 m2m_node create success + 72.942675 s: VX_ZONE_ERROR:[vxReplicateNode:1786] Parameter 2 direction is incorrect +DisplayM2mNodeCreate graph done! +Display graph done! +BydSrvAppCreateGraph Done! +set srv Graph start! +set srv Graph done! +BydSrvAppSetGraph Done! +Graph verify start! +[C6x_1 ] 72.975591 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:308] kxx debug:tivxByd2DSrvCreate +[C6x_1 ] 72.975618 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:314] birdview_parameter_obj allocate succeed +[C6x_1 ] 72.975637 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:327] pBirdviewObj allocate succeed +[C6x_1 ] 72.981723 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:342] birdview_buff allocate succeed +[C6x_1 ] 72.981754 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:358] win_maroc_param allocate succeed +[C6x_1 ] 72.983252 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:374] srv_cfg_set allocate succeed +[C6x_1 ] 73.200401 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:390] birdview_lut allocate succeed +[C6x_1 ] 73.203027 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:406] birdview_fuse_modle allocate succeed +[C6x_1 ] 73.211575 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:422] birdview_2d_output_frame_2 allocate succeed +[C6x_1 ] 73.211605 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:438] DmaHandle_Srv_Obj allocate succeed +[C6x_1 ] 73.214568 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:481] src_blk_L2Buf[0] allocate succeed +[C6x_1 ] 73.214826 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:497] src_blk_L2Buf[1] allocate succeed +[C6x_1 ] 73.214862 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:515] dst_blk_L2Buf[0] allocate succeed +[C6x_1 ] 73.214891 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:533] dst_blk_L2Buf[1] allocate succeed +[C6x_1 ] 73.214927 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:551] offset_L2Buf[0] allocate succeed +[C6x_1 ] 73.214962 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:569] offset_L2Buf[1] allocate succeed +[C6x_1 ] 73.214999 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:587] coeffs_L2Buf[0] allocate succeed +[C6x_1 ] 73.215035 s: VX_ZONE_ERROR:[tivxByd2DSrvCreate:605] coeffs_L2Buf[1] allocate succeed +EGL: version 1.5 +EGL: GL Version = (null) +EGL: GL Vendor = (null) +EGL: GL Renderer = (null) +EGL: GL Extensions = (null) +[BSP]--> _lut_data_path is ./bin/lut_data/ +vertex_bytes = 35238 +index_bytes = 58032 +blend_bytes = 5034 +vertex_bytes = 35238 +index_bytes = 58032 +blend_bytes = 5034 +vertex_bytes = 35238 +index_bytes = 58032 +blend_bytes = 5034 +vertex_bytes = 36582 +index_bytes = 58872 +blend_bytes = 5226 +[ 70.439376] PVR_K: 972: ------------[ PVR DBG: START (High) ]------------ +[ 70.446321] PVR_K: 972: OS kernel info: Linux 5.10.162-g76b3e88d56 #2 SMP PREEMPT Mon Aug 7 14:12:54 CST 2023 aarch64 +[ 70.457164] PVR_K: 972: DDK info: Rogue_DDK_Linux_WS rogueddk 1.15@6133109 (release) j721e_linux +[ 70.466267] PVR_K: 972: Time now: 70466259us +[ 70.470744] PVR_K: 972: Services State: OK +[ 70.475322] PVR_K: 972: Server Errors: 0 +[ 70.479341] PVR_K: 972: Connections Device ID:0(128) P1040-V1040-T1052-byd_srv.out +[ 70.486997] PVR_K: 972: ------[ Driver Info ]------ +[ 70.491982] PVR_K: 972: Comparison of UM/KM components: MATCHING +[ 70.498088] PVR_K: 972: KM Arch: 64 Bit +[ 70.502029] PVR_K: 972: UM Connected Clients: 64 Bit +[ 70.507087] PVR_K: 972: UM info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 70.514923] PVR_K: 972: KM info: 1.15 @ 6133109 (release) build options: 0x00000810 +[ 70.522747] PVR_K: 972: Window system: wayland +[ 70.527281] PVR_K: 972: ------[ RGX Device ID:0 Start ]------ +[ 70.533113] PVR_K: 972: ------[ RGX Info ]------ +[ 70.537815] PVR_K: 972: Device Node (Info): 000000001076bab3 (000000009abc3278) +[ 70.545743] PVR_K: 972: RGX BVNC: 22.104.208.318 (rogue) +[ 70.551149] PVR_K: 972: RGX Device State: Active +[ 70.555846] PVR_K: 972: RGX Power State: ON +[ 70.560117] PVR_K: 972: FW info: 1.15 @ 6133109 (release) build options: 0x80000810 +[ 70.567949] PVR_K: 972: BIF0 - OK +[ 70.571360] PVR_K: 972: RGX FW State: OK (HWRState 0x00000001: HWR OK;) +[ 70.578136] PVR_K: 972: RGX FW Power State: RGXFWIF_POW_IDLE (APM disabled: 0 ok, 0 denied, 0 non-idle, 0 retry, 0 other, 0 total. Latency: 100 ms) +[ 70.591532] PVR_K: 972: RGX DVFS: 0 frequency changes. Current frequency: 749.999 MHz (sampled at 70277315700 ns). FW frequency: 100.000 MHz. +[ 70.604377] PVR_K: 972: RGX FW OS 0 - State: active; Freelists: Ok; Priority: 0; MTS on; +[ 70.612627] PVR_K: 972: Number of HWR: GP(0/0+0), 2D(0/0+0), TA(0/0+0), 3D(1/1+0), CDM(0/0+0), RAY(0/0+0), FALSE(0,0,0,0,0,0) +[ 70.624039] PVR_K: 972: DM 0 (GP) +[ 70.627447] PVR_K: 972: DM 1 (HWRflags 0x00000000: working;) +[ 70.633183] PVR_K: 972: DM 2 (HWRflags 0x00000000: working;) +[ 70.638928] PVR_K: 972: DM 3 (HWRflags 0x00000000: working;) +[ 70.644680] PVR_K: 972: Recovery 1: PID = 1040, frame = 0, HWRTData = 0x00000000, EventStatus = 0x00004410, Guilty Lockup +[ 70.655886] PVR_K: 972: CRTimer = 0x0000073a40bb, OSTimer = 70.331044638, CyclesElapsed = 40259840 +[ 70.666143] PVR_K: 972: PreResetTimeInCycles = 35328, HWResetTimeInCycles = 23552, TotalResetTimeInCycles = 58880 +[ 70.677720] PVR_K: 972: DM 4 (HWRflags 0x00000000: working;) +[ 70.683466] PVR_K: 972: DM 5 (HWRflags 0x00000000: working;) +[ 70.689212] PVR_K: 972: RGX Kernel CCB WO:0xB RO:0xB +[ 70.694266] PVR_K: 972: RGX Firmware CCB WO:0x2 RO:0x2 +[ 70.699484] PVR_K: 972: RGX Kernel CCB commands executed = 11 +[ 70.705314] PVR_K: 972: RGX SLR: Forced UFO updates requested = 0 +[ 70.711489] PVR_K: 972: RGX Errors: WGP:0, TRP:0 +[ 70.716184] PVR_K: 972: Thread0: FW IRQ count = 12 +[ 70.721058] PVR_K: 972: Last sampled IRQ count in LISR = 12 +[ 70.726714] PVR_K: 972: FW System config flags = 0x00020000 (Ctx switch options: Medium CSW profile; VDM CS INDEX mode;) +[ 70.737700] PVR_K: 972: FW OS config flags = 0x0000000F (Ctx switch: TDM; TA; 3D; CDM;) +[ 70.745789] PVR_K: 972: ------[ RGX registers ]------ +[ 70.750928] PVR_K: 972: RGX Register Base Address (Linear): 0x00000000b2a07528 +[ 70.758403] PVR_K: 972: RGX Register Base Address (Physical): 0x4E20000000 +[ 70.765359] PVR_K: 972: CORE_ID : 0x0000000008470000 +[ 70.772314] PVR_K: 972: CORE_REVISION : 0x00D0013E +[ 70.778584] PVR_K: 972: DESIGNER_REV_FIELD1 : 0x00000000 +[ 70.784846] PVR_K: 972: DESIGNER_REV_FIELD2 : 0x00000000 +[ 70.791108] PVR_K: 972: CHANGESET_NUMBER : 0x0000000000000000 +[ 70.798070] PVR_K: 972: CLK_CTRL : 0x0aaaaa002a2aaaaa +[ 70.805026] PVR_K: 972: CLK_STATUS : 0x0000000000600000 +[ 70.811980] PVR_K: 972: CLK_CTRL2 : 0x0000000000000000 +[ 70.818934] PVR_K: 972: CLK_STATUS2 : 0x0000000000000000 +[ 70.825887] PVR_K: 972: EVENT_STATUS : 0x00004410 +[ 70.832147] PVR_K: 972: TIMER : 0x00000000074bd149 +[ 70.839102] PVR_K: 972: BIF_FAULT_BANK0_MMU_STATUS : 0x00000000 +[ 70.845363] PVR_K: 972: BIF_FAULT_BANK0_REQ_STATUS : 0x0000000000000000 +[ 70.852317] PVR_K: 972: BIF_FAULT_BANK1_MMU_STATUS : 0x00000000 +[ 70.858589] PVR_K: 972: BIF_FAULT_BANK1_REQ_STATUS : 0x0000000000000000 +[ 70.865554] PVR_K: 972: BIF_MMU_STATUS : 0x00000000 +[ 70.871818] PVR_K: 972: BIF_MMU_ENTRY : 0x00000000 +[ 70.878087] PVR_K: 972: BIF_MMU_ENTRY_STATUS : 0x0000000000000000 +[ 70.885045] PVR_K: 972: BIF_STATUS_MMU : 0x00000000 +[ 70.891306] PVR_K: 972: BIF_READS_EXT_STATUS : 0x00000000 +[ 70.897566] PVR_K: 972: BIF_READS_INT_STATUS : 0x00000000 +[ 70.903828] PVR_K: 972: BIFPM_STATUS_MMU : 0x00000000 +[ 70.910088] PVR_K: 972: BIFPM_READS_EXT_STATUS : 0x00000000 +[ 70.916356] PVR_K: 972: BIFPM_READS_INT_STATUS : 0x00000000 +[ 70.922626] PVR_K: 972: BIF_CAT_BASE_INDEX : 0x0000000000000100 +[ 70.929586] PVR_K: 972: BIF_CAT_BASE0 : 0x0000000000000000 +[ 70.936548] PVR_K: 972: BIF_CAT_BASE1 : 0x00000008d21eb000 +[ 70.943503] PVR_K: 972: BIF_CAT_BASE2 : 0x0000000000000000 +[ 70.950457] PVR_K: 972: BIF_CAT_BASE3 : 0x0000000000000000 +[ 70.957429] PVR_K: 972: BIF_CAT_BASE4 : 0x0000000000000000 +[ 70.964395] PVR_K: 972: BIF_CAT_BASE5 : 0x0000000000000000 +[ 70.971355] PVR_K: 972: BIF_CAT_BASE6 : 0x0000000000000000 +[ 70.978336] PVR_K: 972: BIF_CAT_BASE7 : 0x0000000000000000 +[ 70.985296] PVR_K: 972: BIF_CTRL_INVAL : 0x00000000 +[ 70.991564] PVR_K: 972: BIF_CTRL : 0x000000C0 +[ 70.997831] PVR_K: 972: BIF_PM_CAT_BASE_VCE0 : 0x0000000000000000 +[ 71.004787] PVR_K: 972: BIF_PM_CAT_BASE_TE0 : 0x0000000000000000 +[ 71.011787] PVR_K: 972: BIF_PM_CAT_BASE_ALIST0 : 0x0000000000000000 +[ 71.018771] PVR_K: 972: BIF_PM_CAT_BASE_VCE1 : 0x0000000000000000 +[ 71.025731] PVR_K: 972: BIF_PM_CAT_BASE_TE1 : 0x0000000000000000 +[ 71.032689] PVR_K: 972: BIF_PM_CAT_BASE_ALIST1 : 0x0000000000000000 +[ 71.039652] PVR_K: 972: PERF_TA_PHASE : 0x00000000 +[ 71.045937] PVR_K: 972: PERF_TA_CYCLE : 0x00000000 +[ 71.052207] PVR_K: 972: PERF_3D_PHASE : 0x00000005 +[ 71.058469] PVR_K: 972: PERF_3D_CYCLE : 0x000061DF +[ 71.064729] PVR_K: 972: PERF_TA_OR_3D_CYCLE : 0x000061DF +[ 71.070990] PVR_K: 972: PERF_TA_AND_3D_CYCLE : 0x00000000 +[ 71.077251] PVR_K: 972: PERF_COMPUTE_PHASE : 0x00000000 +[ 71.083517] PVR_K: 972: PERF_COMPUTE_CYCLE : 0x00000000 +[ 71.089777] PVR_K: 972: PM_PARTIAL_RENDER_ENABLE : 0x00000000 +[ 71.096039] PVR_K: 972: ISP_RENDER : 0x00000003 +[ 71.102305] PVR_K: 972: TLA_STATUS : 0x0000000000000000 +[ 71.109265] PVR_K: 972: MCU_FENCE : 0x0000018000000000 +[ 71.116219] PVR_K: 972: VDM_CONTEXT_STORE_STATUS : 0x00000001 +[ 71.122483] PVR_K: 972: VDM_CONTEXT_STORE_TASK0 : 0x0000000000000000 +[ 71.129444] PVR_K: 972: VDM_CONTEXT_STORE_TASK1 : 0x0000000000000000 +[ 71.136405] PVR_K: 972: VDM_CONTEXT_STORE_TASK2 : 0x0000000000000000 +[ 71.143360] PVR_K: 972: VDM_CONTEXT_RESUME_TASK0 : 0x0000000000000000 +[ 71.150314] PVR_K: 972: VDM_CONTEXT_RESUME_TASK1 : 0x0000000000000000 +[ 71.157278] PVR_K: 972: VDM_CONTEXT_RESUME_TASK2 : 0x0000000000000000 +[ 71.164265] PVR_K: 972: ISP_CTL : 0x0002B000 +[ 71.170559] PVR_K: 972: ISP_STATUS : 0x00000003 +[ 71.176838] PVR_K: 972: MTS_INTCTX : 0x00000000 +[ 71.183109] PVR_K: 972: MTS_BGCTX : 0x00000000 +[ 71.189413] PVR_K: 972: MTS_BGCTX_COUNTED_SCHEDULE : 0x00000000 +[ 71.195735] PVR_K: 972: MTS_SCHEDULE : 0x00000000 +[ 71.202228] PVR_K: 972: MTS_GPU_INT_STATUS : 0x00004410 +[ 71.208605] PVR_K: 972: CDM_CONTEXT_STORE_STATUS : 0x00000000 +[ 71.214884] PVR_K: 972: CDM_CONTEXT_PDS0 : 0x0000000000000000 +[ 71.221847] PVR_K: 972: CDM_CONTEXT_PDS1 : 0x0000000000000000 +[ 71.228810] PVR_K: 972: CDM_TERMINATE_PDS : 0x0000000000000000 +[ 71.235784] PVR_K: 972: CDM_TERMINATE_PDS1 : 0x0000000000000000 +[ 71.242753] PVR_K: 972: SIDEKICK_IDLE : 0x0000007E +[ 71.249023] PVR_K: 972: SLC_IDLE : 0x000000FF +[ 71.255285] PVR_K: 972: SLC_STATUS0 : 0x00000000 +[ 71.261553] PVR_K: 972: SLC_STATUS1 : 0x0000000000000000 +[ 71.268517] PVR_K: 972: SLC_STATUS2 : 0x0000000000000000 +[ 71.275474] PVR_K: 972: SLC_CTRL_BYPASS : 0x01000000 +[ 71.281736] PVR_K: 972: SLC_CTRL_MISC : 0x0000000000200003 +[ 71.288703] PVR_K: 972: MIPS_ADDR_REMAP1_CONFIG1 : 0x1FC00001 +[ 71.294976] PVR_K: 972: MIPS_ADDR_REMAP1_CONFIG2 : 0x00000008cc1e600c +[ 71.301930] PVR_K: 972: MIPS_ADDR_REMAP2_CONFIG1 : 0x1FC01001 +[ 71.308194] PVR_K: 972: MIPS_ADDR_REMAP2_CONFIG2 : 0x00000008d04ce00c +[ 71.315153] PVR_K: 972: MIPS_ADDR_REMAP3_CONFIG1 : 0x1FC02001 +[ 71.321419] PVR_K: 972: MIPS_ADDR_REMAP3_CONFIG2 : 0x00000008ce66500c +[ 71.328374] PVR_K: 972: MIPS_ADDR_REMAP4_CONFIG1 : 0x1FC00000 +[ 71.334635] PVR_K: 972: MIPS_ADDR_REMAP4_CONFIG2 : 0x000000000000000c +[ 71.341597] PVR_K: 972: MIPS_ADDR_REMAP5_CONFIG1 : 0x00000001 +[ 71.347869] PVR_K: 972: MIPS_ADDR_REMAP5_CONFIG2 : 0x00000008cc1e600c +[ 71.354829] PVR_K: 972: MIPS_WRAPPER_CONFIG : 0x000000000001cf80 +[ 71.361785] PVR_K: 972: MIPS_EXCEPTION_STATUS : 0x00000020 +[ 71.368152] PVR_K: 972: ---- [ MIPS internal state ] ---- +[ 71.373638] PVR_K: 972: PC : 0xC00171C4 +[ 71.379900] PVR_K: 972: STATUS_REGISTER : 0x00481C05 +[ 71.386159] PVR_K: 972: CAUSE_REGISTER : 0x00800000 +[ 71.392420] PVR_K: 972: BAD_REGISTER : 0xC0038160 +[ 71.398681] PVR_K: 972: EPC : 0xC00171C0 +[ 71.404940] PVR_K: 972: SP : 0xCF600FE0 +[ 71.411201] PVR_K: 972: BAD_INSTRUCTION : 0x00000000 +[ 71.417464] PVR_K: 972: TLB : +[ 71.422776] PVR_K: 972: 0) VA 0xCF800000 ( 64k) -> PA0 0xe20000000 DV , PA1 0x00000000 C +[ 71.431377] PVR_K: 972: 1) VA 0xCF000000 ( 16k) -> PA0 0x8d04b0000 DVGC, PA1 0x8d04b4000 DVGC +[ 71.440064] PVR_K: 972: 2) VA 0xCF600000 ( 4k) -> PA0 0x8d04cf000 DV C, PA1 0x00000000 C +[ 71.448664] PVR_K: 972: 3) VA 0xC0032000 ( 4k) -> PA0 0x8d0417000 DVGC, PA1 0x8d04cc000 DVGC +[ 71.457358] PVR_K: 972: 4) VA 0xC0006000 ( 4k) -> PA0 0x8d04a7000 DVGC, PA1 0x8cc270000 DVGC +[ 71.466062] PVR_K: 972: 5) VA 0xC001E000 ( 4k) -> PA0 0x8d0511000 VGC, PA1 0x8cdc93000 DVG +[ 71.474750] PVR_K: 972: 6) VA 0xC000A000 ( 4k) -> PA0 0x8cdefb000 DVGC, PA1 0x8d04de000 DVGC +[ 71.483442] PVR_K: 972: 7) VA 0xC0004000 ( 4k) -> PA0 0x8d056b000 DVGC, PA1 0x8cc067000 DVGC +[ 71.492130] PVR_K: 972: 8) VA 0xC0020000 ( 4k) -> PA0 0x8d0564000 DVG , PA1 0x8d049c000 DVG +[ 71.500818] PVR_K: 972: 9) VA 0xC000C000 ( 4k) -> PA0 0x8d04df000 DVGC, PA1 0x8d04a4000 DVGC +[ 71.509506] PVR_K: 972: 10) VA 0xC001A000 ( 4k) -> PA0 0x8cdef0000 DVG , PA1 0x8cd758000 DVG +[ 71.518194] PVR_K: 972: 11) VA 0xC0000000 ( 4k) -> PA0 0x8cdc95000 DVGC, PA1 0x8cc272000 DVGC +[ 71.526879] PVR_K: 972: 12) VA 0xC0016000 ( 4k) -> PA0 0x8d050d000 DVGC, PA1 0x8ce664000 DVGC +[ 71.535567] PVR_K: 972: 13) VA 0xC0072000 ( 4k) -> PA0 0x00000000 C, PA1 0x8d414e000 DV C +[ 71.544174] PVR_K: 972: 14) VA 0xC0028000 ( 4k) -> PA0 0x8d21f5000 DVGC, PA1 0x8d2220000 DVGC +[ 71.552872] PVR_K: 972: 15) VA 0xC0038000 ( 4k) -> PA0 0x8d20a2000 DVG , PA1 0x8d20a1000 DVG +[ 71.561566] PVR_K: 972: -------------------------------- +[ 71.566976] PVR_K: 972: ------[ RGX FW Trace Info ]------ +[ 71.572455] PVR_K: 972: Debug log type: trace ( main mts pm hwr debug ) +[ 71.579156] PVR_K: 972: ------[ RGX FW thread 0 trace START ]------ +[ 71.585503] PVR_K: 972: FWT[traceptr]: 469 +[ 71.589678] PVR_K: 972: FWT[tracebufsize]: 2EE0 +[ 71.594305] PVR_K: 972: FWT[00000000]: 7001105b 00000000 058da4ad 00000001 70027011 00000000 058da4ba 00000000 00000001 7001700d 00000000 058da4db 00000001 70017006 00000000 058da4e5 00000000 70037003 00000000 058da4f6 00000000 00000001 00000400 7000700e 00000000 058da539 70017012 00000000 058da54a 00000000 +[ 71.621566] PVR_K: 972: FWT[00000078]: 7001700d 00000000 058da572 00000001 70017006 00000000 058da57c 00000000 70037003 00000000 058da588 00000000 00000001 00000400 7000700e 00000000 058da59f 70017012 00000000 058e3d8d 00000000 7001700d 00000000 058e3db6 00000001 70017006 00000000 058e3dc0 00000000 70037003 +[ 71.648819] PVR_K: 972: FWT[000000f0]: 00000000 058e3dcb 00000000 00000001 00000400 7000700e 00000000 058e3de5 70017012 00000000 0737d73a 00000000 70037013 00000000 0737d74b 00000001 2abc0066 00000000 70037013 00000000 0737d77f 00000002 2abc0065 00000000 7003100e 00000000 0737d791 00000100 00000003 c0028300 +[ 71.676074] PVR_K: 972: FWT[00000168]: 70017006 00000000 0737d7b2 00000000 70037003 00000000 0737d7c8 00000000 00000001 00000400 7003700a 00000000 0737d7ef 00000000 00000003 c0028320 70037009 00000000 0737d7fa 00000003 c0073000 c0073000 70011045 00000000 0737d831 00000001 700310c6 00000000 0737d86a 00000002 +[ 71.703339] PVR_K: 972: FWT[000001e0]: 000003ff 0002b000 70021087 00000000 0737d874 00000000 0000000a 70021087 00000000 0737d87e 00000001 0000000a 70081079 00000000 0737d88d c0028300 00000000 00000000 00000410 00000001 00000000 00000001 00000001 7000700e 00000000 0737d906 70037003 00000000 0737d91b 00000003 +[ 71.730597] PVR_K: 972: FWT[00000258]: 00000000 00004418 70001004 00000000 0737d937 70021016 00000000 0737d957 c0028300 000000c8 70021017 00000000 0737d964 c002a000 00000001 70021017 00000000 0737d96b c002b000 00000519 7000700e 00000000 0737d9aa 70037013 00000000 0737d9c1 00000003 2abc0065 00000000 7003100e +[ 71.757854] PVR_K: 972: FWT[000002d0]: 00000000 0737d9d0 000001f8 00000003 c0028300 70017006 00000000 0737d9eb 00000000 70037003 00000000 0737d9fa 00000000 00000001 00004410 7003700a 00000000 0737da19 00000000 00000003 c0028320 70037009 00000000 0737da22 00000003 c0073000 c0073100 700310c6 00000000 0737da3e +[ 71.785112] PVR_K: 972: FWT[00000348]: 00000002 000003ff 0002b000 70021087 00000000 0737da47 00000000 0000000a 70021087 00000000 0737da4f 00000001 0000000a 70081079 00000000 0737da61 c0028300 00000100 00000000 00000410 00000001 00000000 00000002 00000002 7000700e 00000000 0737daa3 70037013 00000000 0737daba +[ 71.812368] PVR_K: 972: FWT[000003c0]: 00000004 2abc0065 00000000 7003100e 00000000 0737daca 000002f0 00000003 c0028300 70037013 00000000 0737dae7 00000005 2abc0065 00000000 7003100e 00000000 0737daef 000003e8 00000003 c0028300 70037013 00000000 0737daff 00000006 2abc0065 00000000 7003100e 00000000 0737db07 +[ 71.839630] PVR_K: 972: FWT[00000438]: 000004e8 00000003 c0028300 7001700d 00000000 0737db1a 00000001 70017006 00000000 0737db24 00000000 70037003 00000000 0737db31 00000000 00000001 00004410 7000700e 00000000 0737db4b 70017012 00000000 0737db5a 00000000 7001700d 00000000 0737db93 00000000 70017012 00000000 +[ 71.866886] PVR_K: 972: FWT[000004b0]: 0737dba0 00000000 7001700d 00000000 0737dba6 00000000 70017012 00000000 07385583 00000000 7003b049 00000000 0738559a 00000003 00007b2c 00ee0980 7003b054 00000000 073855ac 00000000 00000003 00000000 7003b030 00000000 073855b3 00000003 00000000 00000003 7001700d 00000000 +[ 71.894142] PVR_K: 972: FWT[00000528]: 073855cc 00000000 70017012 00000000 073855d9 00000000 7001700d 00000000 073855f0 00000000 70017012 00000000 0738cfcf 00000000 7003b049 00000000 0738cfe4 00000003 0000f577 00ee0980 7003b054 00000000 0738cffc 00000000 00000003 00000001 7004b056 00000000 0738d02c 00000000 +[ 71.921400] PVR_K: 972: FWT[000005a0]: 00000003 00000001 00000000 7003b060 00000000 0738d045 00000000 00000003 00000000 7003b030 00000000 0738d04d 00000003 00000000 00000002 7001700d 00000000 0738d068 00000000 70017012 00000000 0738d074 00000000 7001700d 00000000 0738d08b 00000000 70017012 00000000 0738e8ff +[ 71.948679] PVR_K: 972: FWT[00000618]: 00000000 70037013 00000000 0738e90b 00000007 2abc0066 00000000 70037013 00000000 0738e943 00000008 2abc0065 00000000 7003100e 00000000 0738e954 000005e8 00000003 c0028300 7001700d 00000000 0738e978 00000000 70017012 00000000 0738e988 00000000 7001700d 00000000 0738e98f +[ 71.975946] PVR_K: 972: FWT[00000690]: 00000000 70017012 00000000 07394a69 00000000 7003b049 00000000 07394a98 00000003 00017027 00ee0980 7003b055 00000000 07394aae 00000000 00000003 00000001 7004b056 00000000 07394ae1 00000000 00000003 00000001 00000000 7003b060 00000000 07394af5 00000000 00000003 00000001 +[ 72.003208] PVR_K: 972: FWT[00000708]: 7003b030 00000000 07394afc 00000003 00000001 00000002 7001700d 00000000 07394b1c 00000000 70017012 00000000 07394b2a 00000000 7001700d 00000000 07394b40 00000000 70017012 00000000 0739533b 00000000 70037013 00000000 07395346 00000009 2abc0066 00000000 70037013 00000000 +[ 72.030467] PVR_K: 972: FWT[00000780]: 0739537e 0000000a 2abc0065 00000000 7003100e 00000000 0739538f 000006e8 00000003 c0028300 7001700d 00000000 073953b3 00000000 70017012 00000000 073953c4 00000000 7001700d 00000000 073953cb 00000000 70017012 00000000 0739c518 00000000 7003b049 00000000 0739c548 00000003 +[ 72.057716] PVR_K: 972: FWT[000007f8]: 0001ead7 00ee0980 7003b055 00000000 0739c55e 00000000 00000003 00000001 7004b056 00000000 0739c592 00000000 00000003 00000001 00000000 7003b060 00000000 0739c5a8 00000000 00000003 00000001 7003b030 00000000 0739c5b1 00000003 00000001 00000001 7001700d 00000000 0739c5d2 +[ 72.085018] PVR_K: 972: FWT[00000870]: 00000000 70017012 00000000 0739c5df 00000000 7001700d 00000000 0739c5f5 00000000 70017012 00000000 073a3fcf 00000000 7003b049 00000000 073a3fe3 00000003 00026576 00ee0980 7003b055 00000000 073a3ff3 00000000 00000003 00000001 7004b056 00000000 073a4020 00000000 00000003 +[ 72.112320] PVR_K: 972: FWT[000008e8]: 00000001 00000000 7003b060 00000000 073a4032 00000000 00000003 00000001 7003b030 00000000 073a4039 00000003 00000001 00000000 7001b023 00000000 073a4041 00000003 7002b028 00000000 073a404c 00000003 00000001 7002b04e 00000000 073a4055 00000000 00004410 7002b03a 00000000 +[ 72.139628] PVR_K: 972: FWT[00000960]: 073a407f 00000000 00000002 7002b03a 00000000 073a4083 00000000 00000003 7002b03a 00000000 073a4089 00000000 00000004 7001b03b 00000000 073a408d 00000080 7001b04d 00000000 073a4098 00000003 700010c7 00000000 073a409d 70017006 00000000 073a40e2 00000000 70037003 00000000 +[ 72.166944] PVR_K: 972: FWT[000009d8]: 073a40ee 00000000 00000001 00004410 7001b020 00000000 073a4103 00000002 7001b020 00000000 073a4109 00000003 7001b020 00000000 073a410f 00000004 7001b020 00000000 073a4114 00000005 7002b01c 00000000 073a412d 00000003 c0028300 7001b03d 00000000 073a413e 00000000 70011045 +[ 72.194457] PVR_K: 972: FWT[00000a50]: 00000000 073a4187 00000001 7004b053 00000000 073a4196 00000000 00000000 00000000 00000000 7001b03e 00000000 073a41a3 00000000 7001b019 00000000 073a4207 00000002 70021016 00000000 073a4235 c0028300 000001c8 70021017 00000000 073a4244 c002a000 00000002 7005b018 00000000 +[ 72.221952] PVR_K: 972: FWT[00000ac8]: 073a4258 00000003 c0028300 000001f8 00000000 00000010 7002b021 00000000 073a4267 00000003 00000000 7001b019 00000000 073a426f 00000003 7001b019 00000000 073a427d 00000004 7001b019 00000000 073a4283 00000005 70017006 00000000 073a428a 00000000 7000700e 00000000 073a42b7 +[ 72.249450] PVR_K: 972: FWT[00000b40]: 70037003 00000000 073a42ce 00000000 00000001 00004410 7003700a 00000000 073a42ed 00000000 00000003 c0028320 70037009 00000000 073a42f8 00000003 c0073000 c00731f8 700310c6 00000000 073a431c 00000002 000003ff 0002b000 70021087 00000000 073a4325 00000000 0000000a 70021087 +[ 72.280277] PVR_K: 972: FWT[00000bb8]: 00000000 073a432e 00000001 0000000a 70081079 00000000 073a433e c0028300 000001f8 00000000 00000410 00000001 00000000 00000003 00000003 7000700e 00000000 073a437e 70037003 00000000 073a4395 00000003 00000000 00004418 70001004 00000000 073a43a9 70021016 00000000 073a43c5 +[ 72.321353] PVR_K: 972: FWT[00000c30]: c0028300 000002c0 70021017 00000000 073a43d2 c002a000 00000003 7003700a 00000000 073a43ee 00000000 00000003 c0028320 70037009 00000000 073a43fc 00000003 c0073000 c00732f0 700310c6 00000000 073a4419 00000002 000003ff 0002b000 70021087 00000000 073a4421 00000000 0000000a +[ 72.350861] PVR_K: 972: FWT[00000ca8]: 70021087 00000000 073a442a 00000001 0000000a 70081079 00000000 073a4438 c0028300 000002f0 00000000 00000410 00000001 00000000 00000004 00000004 7000700e 00000000 073a4460 70037003 00000000 073a4471 00000003 00000000 00004418 70001004 00000000 073a4485 70021016 00000000 +[ 72.378400] PVR_K: 972: FWT[00000d20]: 073a44a0 c0028300 000003b8 70021017 00000000 073a44ab c002a000 00000004 7003700a 00000000 073a44c7 00000000 00000003 c0028320 70037009 00000000 073a44d4 00000003 c0073000 c00733e8 700310c6 00000000 073a44ed 00000002 000003ff 0002b000 70021087 00000000 073a44f6 00000000 +[ 72.405878] PVR_K: 972: FWT[00000d98]: 0000000a 70021087 00000000 073a44ff 00000001 0000000a 70081079 00000000 073a4510 c0028300 000003e8 00000000 00000410 00000001 00000000 00000005 00000005 7000700e 00000000 073a4537 70037003 00000000 073a4545 00000003 00000000 00004418 70001004 00000000 073a4557 70021016 +[ 72.433367] PVR_K: 972: FWT[00000e10]: 00000000 073a4570 c0028300 000004b0 70021017 00000000 073a457b c002a000 00000005 70021017 00000000 073a4581 c002b008 00000519 7003700a 00000000 073a45a0 00000000 00000003 c0028320 70037009 00000000 073a45af 00000003 c0073000 c00734e8 700310c6 00000000 073a45c9 00000002 +[ 72.460968] PVR_K: 972: FWT[00000e88]: 000003ff 0002b000 70021087 00000000 073a45d2 00000000 0000000a 70021087 00000000 073a45db 00000001 0000000a 70081079 00000000 073a45e9 c0028300 000004e8 00000000 00000410 00000001 00000000 00000006 00000006 7000700e 00000000 073a4621 70037003 00000000 073a4631 00000003 +[ 72.488355] PVR_K: 972: FWT[00000f00]: 00000000 00004418 70001004 00000000 073a4645 70021016 00000000 073a4660 c0028300 000005b0 70021017 00000000 073a466a c002a000 00000006 70021017 00000000 073a4672 c002b010 00000519 7003700a 00000000 073a4690 00000000 00000003 c0028320 70037009 00000000 073a469d 00000003 +[ 72.515687] PVR_K: 972: FWT[00000f78]: c0073000 c00735e8 700310c6 00000000 073a46b5 00000002 000003ff 0002b000 70021087 00000000 073a46be 00000000 0000000a 70021087 00000000 073a46c6 00000001 0000000a 70081079 00000000 073a46d3 c0028300 000005e8 00000000 00000410 00000001 00000000 00000007 00000007 7000700e +[ 72.542977] PVR_K: 972: FWT[00000ff0]: 00000000 073a470a 70037003 00000000 073a471d 00000003 00000000 00004418 70001004 00000000 073a4735 70021016 00000000 073a474d c0028300 000006b0 70021017 00000000 073a4758 c002a000 00000007 70021017 00000000 073a4762 c002b018 00000519 7000700e 00000000 073a479b 7001700d +Graph verify done![ 72.570266] PVR_K: 972: FWT[00001068]: 00000000 073a47b3 00000001 70017006 00000000 073a47bc 00000000 70037003 00000000 073a47cb 00000000 00000001 00004410 7000700e 00000000 073a47e3 70017012 00000000 073a47f2 00000000 7001700d 00000000 073a4807 00000001 70017006 00000000 073a480e 00000000 70037003 00000000 +[ 72.599285] PVR_K: 972: FWT[000010e0]: 073a4818 00000000 00000001 00004410 7000700e 00000000 073a4837 70017012 00000000 073a4846 00000000 7001700d 00000000 073a4868 00000001 70017006 00000000 073a4871 00000000 70037003 00000000 073a487c 00000000 00000001 00004410 7000700e 00000000 073a4891 70017012 00000000 + +[ 72.626718] PVR_K: 972: FWT[00001158]: 073ae08c 00000000 7001700d 00000000 073ae0bb 00000001 70017006 00000000 073ae0c7 00000000 70037003 00000000 073ae0d2 00000000 00000001 00004410 7000700e 00000000 073ae0ef 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +[ 72.654140] PVR_K: 972: FWT[000011d0]: 00000000 ... 00000000 +[ 72.662772] PVR_K: 972: FWT[END]: 362 lines were all zero +[ 72.668463] PVR_K: 972: ------[ RGX FW thread 0 trace END ]------ +[ 72.674778] PVR_K: 972: ------[ Full CCB Status ]------ +[ 72.680254] PVR_K: 972: FWCtx 0xC0028300 (TQ_3D-P1040-T1052-byd_srv.out) +[ 72.687111] PVR_K: 972: `-- +[ 72.690849] PVR_K: 972: FWCtx 0xC0028040 (TA-P1040-T1052-byd_srv.out) +[ 72.697372] PVR_K: 972: `-- +[ 72.701029] PVR_K: 972: FWCtx 0xC00280E0 (3D-P1040-T1052-byd_srv.out) +[ 72.707550] PVR_K: 972: `-- +[ 72.711214] PVR_K: 972: ------[ RGX Device ID:0 End ]------ +[ 72.716889] PVR_K: 972: ------[ System Summary Device ID:0 ]------ +[ 72.723148] PVR_K: 972: Device System Power State: ON +[ 72.728276] PVR_K: 972: MaxHWTOut: 500000us, WtTryCt: 10000, WDGTOut(on,off): (10000ms,3600000ms) +[ 72.737224] PVR_K: 972: ------[ Server Thread Summary ]------ +[ 72.743062] PVR_K: 972: pvr_defer_free : Running +[ 72.747940] PVR_K: 972: Number of deferred cleanup items : 0 +[ 72.754027] PVR_K: 972: pvr_device_wdg : Running +[ 72.758902] PVR_K: 972: pvr_cacheop : Running +[ 72.763515] PVR_K: 972: Configuration: QSZ: 16, UKT: -1, KDFT: 131072, LINESIZE: 64, PGSIZE: 4096, KDF: Yes, URBF: Yes +[ 72.774634] PVR_K: 972: Pending deferred CacheOp entries : 0 +BydSrvAppVerifyGraph Done! +[ 72.780750] PVR_K: 972: ------[ AppHint Settings ]------ +[ 72.788593] PVR_K: 972: Build Vars +[ 72.792273] PVR_K: 972: EnableTrustedDeviceAceConfig: N +[ 72.797948] PVR_K: 972: CleanupThreadPriority: 0x00000005 +[ 72.807940] PVR_K: 972: CacheOpThreadPriority: 0x00000001 +[ 72.813766] PVR_K: 972: WatchdogThreadPriority: 0x00000000 +[ 72.819709] PVR_K: 972: HWPerfClientBufferSize: 0x000c0000 + +[ 72.825634] PVR_K: 972: Module Params +[ 72.829764] PVR_K: 972: EnablePageFaultDebug: Y +[ 72.834730] PVR_K: 972: Debug Info Params +[ 72.839047] PVR_K: 972: CacheOpConfig: 0x0000000c +[ 72.844255] PVR_K: 972: CacheOpUMKMThresholdSize: 0xffffffff +[ 72.850375] PVR_K: 972: Debug Info Params Device ID: 0 +byd_srv_ipc_init Done![ 72.855787] PVR_K: 972: EnableLogGroup: main,mts,pm,hwr,debug + +[ 72.863870] PVR_K: 972: ------[ HTB Log state: Off ]------ +[ 72.869605] PVR_K: 972: ------[ Active Sync Checkpoints ]------ +[ 72.875639] ------[ Native Fence Sync: timelines ]------ +[ 72.880958] foreign_sync: @0 ctx=1 refs=1 +start byd_ipc.out![ 72.884975] sw: RM_SWTimeline-byd_srv.out-1040 @0 cur=0 + +[ 72.891791] rogue-ta3d: @0 ctx=3 refs=1 +[ 72.895766] rogue-tq3d: @0 ctx=5 refs=1 +byd_ipc.out running succeed! +[ 72.899616] QE-byd_srv.out-1040: @4 ctx=6 refs=2 +[ 72.906805] @3: (++) refs=1 fwaddr=0xc002b019 enqueue=1 status=Signalled 3-TQM +[byd_debug]: BydDLAppCreateGraph:29 Graph create done![ 72.914176] PVR_K: 972: ------------[ PVR DBG: END ]------------ + +[ 72.924998] ------------[ cut here ]------------ +[ 72.929683] WARNING: CPU: 0 PID: 972 at /media/adas/X/home/xutianding/TDA4/code/my_code_v3/tda4_sdk_0806/tda4_linux/board-support/extra-drivers/ti-img-rogue-driver-1.15.6133109/binary_j721e_linux_wayland_release/target_aarch64/kbuild/services/server/common/pvr_notifier.c:529 0xffff800008bc9f98 +[ 72.955605] Modules linked in: pvrsrvkm(O) usb_f_fs libcomposite ti_am335x_adc kfifo_buf rpmsg_char omap_rng cdns3 udc_core roles irq_pruss_intc pru_rproc icss_iep usbcore usb_common crct10dif_ce ti_j721e_cpsw_virt_mac phy_can_transceiver vxd_dec vxe_enc ti_k3_r5_remoteproc ti_am335x_tscadc videobuf2_dma_sg ti_k3_dsp_remoteproc v4l2_mem2mem sa2ul pruss cdns_dphy videobuf2_dma_contig m_can_platform virtio_rpmsg_bus videobuf2_memops m_can videobuf2_v4l2 sha512_generic cdns3_ti authenc videobuf2_common can_dev optee_rng rng_core rti_wdt sch_fq_codel rpmsg_kdrv_switch cryptodev(O) +[ 73.006650] CPU: 0 PID: 972 Comm: pvr_device_wdg Tainted: G O 5.10.162-g76b3e88d56 #2 +[ 73.015757] Hardware name: Texas Instruments K3 J721E SoC (DT) +[ 73.021573] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO BTYPE=--) +[ 73.027559] pc : 0xffff800008bc9f98 +[ 73.031031] lr : 0xffff800008bc9f98 +[ 73.034504] sp : ffff800013bfbc80 +[ 73.037804] x29: ffff800013bfbc80 x28: 0000000000000000 +[ 73.043101] x27: ffff800013ecb9b8 x26: ffff800008c58460 +[ 73.048397] x25: ffff00084c329b00 x24: 0000000000000009 +[ 73.053693] x23: 0000000000000002 x22: 0000000000000000 +[ 73.058989] x21: 0000000000000000 x20: ffff00084c329bd8 +[ 73.064285] x19: ffff00084af7d8a0 x18: 0000000000000010 +[ 73.069580] x17: 0000000000000000 x16: 0000000000000000 +[ 73.074876] x15: ffff00084df6e910 x14: 00000000000002e0 +[ 73.080171] x13: 0000000000000000 x12: 00000000000000c3 +[ 73.085467] x11: 0000000000000287 x10: 00000000000009f0 +[ 73.090763] x9 : ffff800013bfbae0 x8 : ffff00084df6ee10 +[ 73.096058] x7 : ffff00087fa54340 x6 : ffff00087fa542c0 +[ 73.101354] x5 : 00000000410fd080 x4 : 0000000000f0000f +[ 73.106651] x3 : 0000000000000000 x2 : ffffffffffffff00 +[ 73.111947] x1 : 0000000000000000 x0 : ffff00084df10480 +[ 73.117244] Call trace: +[ 73.119678] 0xffff800008bc9f98 +[ 73.122804] 0xffff800008bcb460 +[ 73.125931] 0xffff800008bb7e74 +[ 73.129057] 0xffff800008bca31c +[ 73.132184] 0xffff800008ba12fc +[ 73.135310] 0xffff8000100737f0 +[ 73.138436] 0xffff8000100161dc +[ 73.141564] ---[ end trace 6bf0585eb6be35b0 ]--- + Thanks, KONG + +Kong, Did you happen to capture the error with the pvrlogdump to get more information? Can you please provide that? Thanks, Erick + diff --git a/data2/text/range/30001+/1286035.txt b/data2/text/range/30001+/1286035.txt new file mode 100644 index 0000000000000000000000000000000000000000..d31b1493d96ca9bd15119c59f2b102a7d26afc6a --- /dev/null +++ b/data2/text/range/30001+/1286035.txt @@ -0,0 +1,902 @@ +Ticket Name: TDA4VM: How to control DL pre proc kernel to switch different channels for processing? Only one specified channel is processed at a time. + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Dear exprets, My graph now accepts four camera inputs, but when doing deep learning processing, I want it to only process one selected channel. I know that the display kernel can select different channels for display. So I wonder if DL pre proc kernel can also select a certain channel for processing? Regards, Xin + +Responses: +Hi, Could you please elaborate more on exact use case you are looking for ? What do you mean by xiu xin said: I want it to only process one selected channel + +Hi Pratik, My graph now has four cameras, which means four channels of input, but I only want the DL pre proc kernel to receive one channel as input, and I can choose one of the four channels as input. Regards, Xin + +Hi Xin, With four cameras as input, the input to the node would be an object array out of which you would be sending the first element into the node right? May I know why are you opting for doing it one at a time rather than using vxReplicateNode and processing all the 4 images? Regards, Nikhil + +Hi Nikhil, Yes, just use the vxReplicateNode to process four data at the same time, which I saw in the demo and have practiced, but in the actual application, I only need to process the deep learning of two camera inputs, and do not need to process the two inputs at the same time. I just need to send a control command to switch these two inputs and select one of them. Moreover, the c7x kernel is very occupied by the DL node, and the four channels at the same time achieve 99% occupancy. I also need to run other nodes, so performance is a consideration. Regards, Xin + +Hi Xin, Understood. The channel switch is not readily available in the SDK, however you could modify the target implementation of the node to achieve the same. You could refer the display node implementation for the control command "TIVX_DISPLAY_SELECT_CHANNEL" and do the same implementation for the DL preproc node. I see that there is no control function in the dl pre proc node. You could add the control function in the tivxAddTargetKernelDLPreProc() in vision_apps/kernels/img_proc/c66/vx_dl_pre_proc_target.c After this, you could use this control command API and then follow the implementation of the display node. Regards, Nikhil + +Hi Nikhil, Yes, I'm doing that, but I'm not sure if porting this functionality to DL preproc node will work correctly or achieve the same functionality. I've had a few issues along the way. For example, the display node uses the TIVX_DISPLAY_SELECT_CHANNEL macro when sending control commands, which is defined as follows: #define TIVX_DISPLAY_SELECT_CHANNEL (0x30000000u), I don't understand (0x30000000u) how this value is set, suppose I define a similar macro in DL preproc node, How should the value after the macro be set? Regards, Xin + +Hi Xin, This is just a unique number assigned as enum to identify this control command in the switch case inside the control function. You could use the same 0x30000000u or use your own unique ENUM value. Regards, Nikhil + +Hi Nikhil, I added the switch channel function mimicking display node, but it failed when sending command control, causing the program to exit. Are you sure you can port this function? Regards, Xin + +Hi Xin, Could you please let me know your changes on the target side of this node? Did the call reach the control function? Regards, Nikhil + +Hi Nikhil, These are the changes I made to three files, named main.c; kernels/img_proc/c66/vx_dl_pre_proc_target.c ; kernels/img_proc/include/TI/tivx_img_proc_kernels.h Regards, Xin 2158.main.c.txt + //init ++ obj->channel_params.active_channel_id = 2; ++ obj->switch_preproc_ch_obj = vxCreateUserDataObject(obj->context, "tivx_preproc_select_channel_params_t", sizeof(tivx_preproc_select_channel_params_t),&obj->channel_params); ++ status = vxGetStatus((vx_reference)obj->switch_preproc_ch_obj); + + + ++static vx_status SendCmdtoPreProc(AppObj *obj,PreProcObj *preProcObj) ++{ ++ ++ if(obj->switch_preproc_ch_obj == NULL) ++ { ++ vx_status status = VX_FAILURE; ++ return status; ++ } ++ ++ ++ vx_reference refs[1]; ++ vx_status status = VX_FAILURE; ++ ++ obj->channel_params.active_channel_id = (obj->channel_params.active_channel_id + 1) % NUM_CAPT_CHANNELS_TOTAL; ++ APP_PRINTF("active_channel_id:%d\n",obj->channel_params.active_channel_id); ++ vxCopyUserDataObject(obj->switch_preproc_ch_obj, 0, ++ sizeof(tivx_preproc_select_channel_params_t), ++ &obj->channel_params, VX_WRITE_ONLY, VX_MEMORY_TYPE_HOST); ++ refs[0] = (vx_reference) obj->switch_preproc_ch_obj; ++ status = tivxNodeSendCommand(preProcObj->node, 0u, TIVX_PREPROC_SELECT_CHANNEL, refs, 1u); ++ APP_PRINTF("App Send Preproc Command Done!\n"); ++ ++ if(status != VX_SUCCESS) ++ { ++ APP_PRINTF("PreProc: Node send command failed!\n"); ++ } ++ ++ return status; ++} ++ + + + + ++ if(status == VX_SUCCESS ) ++ { ++ status = SendCmdtoPreProc(obj,&obj->preProcObj); ++ } + + + 2158.vx_dl_pre_proc_target.c.txt diff --git a/kernels/img_proc/c66/vx_dl_pre_proc_target.c b/kernels/img_proc/c66/vx_dl_pre_proc_target.c +index 9b9b892..4e64d79 100644 +--- a/kernels/img_proc/c66/vx_dl_pre_proc_target.c ++++ b/kernels/img_proc/c66/vx_dl_pre_proc_target.c +@@ -111,8 +111,16 @@ typedef struct { + uint64_t l2_global_base; + uint32_t alloc_size; + ++ /**< Id of active channel,duwei add*/ ++ uint32_t active_channel; ++ + } tivxDLPreProcKernelParams; + ++static vx_status VX_CALLBACK tivxKernelDLPreProcControl( ++ tivx_target_kernel_instance kernel, ++ uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], ++ uint16_t num_params, void *priv_arg); ++ + static tivx_target_kernel vx_dl_pre_proc_target_kernel = NULL; + + static vx_status VX_CALLBACK tivxKernelDLPreProcCreate +@@ -485,6 +493,96 @@ static vx_status VX_CALLBACK tivxKernelDLPreProcDelete( + return (status); + } + ++ ++static vx_status tivxPreProcSwitchChannel(tivxDLPreProcKernelParams *preproc, ++ const tivx_obj_desc_user_data_object_t *usr_data_obj) ++{ ++ vx_status status = (vx_status)VX_SUCCESS; ++ tivx_preproc_select_channel_params_t *ch_prms = NULL; ++ void *target_ptr; ++ ++ if (NULL != usr_data_obj) ++ { ++ target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr); ++ ++ tivxCheckStatus(&status, tivxMemBufferMap(target_ptr, usr_data_obj->mem_size, ++ (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); ++ ++ if (sizeof(tivx_preproc_select_channel_params_t) == ++ usr_data_obj->mem_size) ++ { ++ ch_prms = (tivx_preproc_select_channel_params_t *)target_ptr; ++ preproc->active_channel = ch_prms->active_channel_id; ++ } ++ else ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n"); ++ status = (vx_status)VX_ERROR_INVALID_PARAMETERS; ++ } ++ ++ tivxCheckStatus(&status, tivxMemBufferUnmap(target_ptr, usr_data_obj->mem_size, ++ (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); ++ } ++ else ++ { ++ VX_PRINT(VX_ZONE_ERROR, "User Data Object is NULL \n"); ++ status = (vx_status)VX_ERROR_INVALID_PARAMETERS; ++ } ++ ++ return (status); ++} ++ ++static vx_status VX_CALLBACK tivxKernelDLPreProcControl( ++ tivx_target_kernel_instance kernel, ++ uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], ++ uint16_t num_params, void *priv_arg) ++{ ++ vx_status status = (vx_status)VX_SUCCESS; ++ uint32_t size; ++ tivxDLPreProcKernelParams *preproc = NULL; ++ ++ status = tivxGetTargetKernelInstanceContext(kernel, ++ (void **)&preproc, &size); ++ ++ if ((vx_status)VX_SUCCESS != status) ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Failed to Get Target Kernel Instance Context\n"); ++ } ++ else if ((NULL == preproc) || ++ (sizeof(tivxDLPreProcKernelParams) != size)) ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Object Size\n"); ++ status = (vx_status)VX_FAILURE; ++ } ++ else ++ { ++ /* do nothing */ ++ } ++ ++ if ((vx_status)VX_SUCCESS == status) ++ { ++ switch (node_cmd_id) ++ { ++ case TIVX_PREPROC_SELECT_CHANNEL: ++ { ++ status = tivxPreProcSwitchChannel(preproc, ++ (tivx_obj_desc_user_data_object_t *)obj_desc[0U]); ++ break; ++ } ++ default: ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n"); ++ status = (vx_status)VX_FAILURE; ++ break; ++ } ++ } ++ } ++ ++ return (status); ++} ++ ++ + static inline void convertYCbCrToRGB(int32_t Y, int32_t Cb, int32_t Cr, float *R, float *G, float *B, float min_val, float max_val) + { + Y = Y - 16; +@@ -2390,7 +2488,7 @@ void tivxAddTargetKernelDLPreProc() + tivxKernelDLPreProcProcess, + tivxKernelDLPreProcCreate, + tivxKernelDLPreProcDelete, +- NULL, ++ tivxKernelDLPreProcControl, + NULL + ); + } +(END) 2158.tivx_img_proc_kernels.h.txt diff --git a/kernels/img_proc/include/TI/tivx_img_proc_kernels.h b/kernels/img_proc/include/TI/tivx_img_proc_kernels.h +index 2b4f206..3ed4ef8 100644 +--- a/kernels/img_proc/include/TI/tivx_img_proc_kernels.h ++++ b/kernels/img_proc/include/TI/tivx_img_proc_kernels.h +@@ -227,6 +227,15 @@ extern "C" { + #define TIVX_DL_COLOR_BLEND_MAX_CLASSES (256U) + #define TIVX_DL_COLOR_BLEND_MAX_COLORS (3U) + ++#define TIVX_PREPROC_SELECT_CHANNEL (0x11100000u) ++ ++typedef struct ++{ ++ /*! Id of the active channel to be displayed */ ++ uint32_t active_channel_id; ++} tivx_preproc_select_channel_params_t; ++ + /*! + * \brief + * \ingroup group_vision_apps_kernels_img_proc + +Hi, The implementation looks correct. May I know the error that you are facing? Nikhil Dasan said: Did the call reach the control function? Also are calling the node send command after vxVerifyGraph()? Regards, Nikhil + +Hi Nikhil, I don't know how to verify this(Did the call reach the control function?),But I call the node send command after vxVerifyGraph(). Regards, Xin + +Hi Xin, You could verify with logs. Could you let me know what is the error that you are getting? You could add some logs in the newly added control function and check if it is printing on the console. Did you make the change in the process function too? i.e. based on this active channel, you would extract the image from the object array. (refer display node process function for the same) Regards, Nikhil + +Hi Nikhil, The following is the error message encountered, I added some print in the contral function, but it doesn't seem to print out, I didn't modify the process function, I don't quite understand what the display process function does, what else does it need in the display process function? Regards, Xin log (2).txt REMOTE_SERVICE: Init ... Done !!! +APP: Init ... Done !!! +captureObj init done! +displayM2MObj init done! +app_init_scaler done! +OK to open file! /opt/vision_apps/test_data/psdkra/tidl_models/tidl_io_peele_300_1.bin +OK to open file! /opt/vision_apps/test_data/psdkra/tidl_models/tidl_net_peele_300.bin +Computing checksum at 0x0000FFFFA22D0FC0, size = 6853104 +createOutputTensors: ioBufDesc->numOutputBuf=1 +createOutputTensors: id = 0, input_width = 1024, input_height= 512 +createOutputTensors: id = 0, output_width = W(1405) + L(0) + R(0) +createOutputTensors: id = 0, output_height = H(1) + T(0) + B(0) +createOutputTensors: id = 0, output_channels = outNumChannels(1) +app_init_tidl done! +OD Pre Proc Update Done! +OD Pre Proc init done! +Draw detections Update Done! +width=960, height=540, num_ch=4 +Draw Detections Init Done! +app_init_display done! +is_enable_gui = 1 +graph Set Reference Name Success !! +Capture graph done ! +DisplayM2M graph done ! +replicate[0] = 1 +scaler replicate[1] = 1, Scalre: W(960), H(540) +scaler replicate[2] = 1, Scalre: W(960), H(540) +scaler replicate[3] = 1, Scalre: W(1280), H(960) +scaler replicate[4] = 1, Scalre: W(1280), H(960) +scaler replicate[5] = 0, Scalre: W(1280), H(960) +Scaler graph done ! +PreProcObj graph done! +odTIDLObj graph done! +drawDetectionsObj graph done! +Display graph done ! +set node parameter done... +vx verify graph done... +App Send Scaler Command Done! +Export Graph To Dot Done... +vxSetGraphScheduleConfig done +app_create_graph exiting +success to start remote service!!! + 11.089220 s: CIO: Init ... Done !!! + 11.089292 s: ### CPU Frequency = 1000000000 Hz + 11.089334 s: CPU is running FreeRTOS + 11.089362 s: APP: Init ... !!! + 11.089386 s: SCICLIENT: Init ... !!! + 11.089651 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar] + 11.089703 s: SCICLIENT: DMSC FW revision 0x8 + 11.089736 s: SCICLIENT: DMSC FW ABI revision 3.1 + 11.089771 s: SCICLIENT: Init ... Done !!! + 11.089797 s: UDMA: Init ... !!! + 11.091234 s: UDMA: Init ... Done !!! + 11.091297 s: MEM: Init ... !!! + 11.091342 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ db000000 of size 16777216 bytes !!! + 11.091419 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!! + 11.091483 s: MEM: Init ... Done !!! + 11.091509 s: IPC: Init ... !!! + 11.091570 s: IPC: 6 CPUs participating in IPC !!! + 11.091618 s: IPC: Waiting for HLOS to be ready ... !!! + 11.091669 s: IPC: HLOS is ready !!! + 11.106884 s: IPC: Init ... Done !!! + 11.106951 s: APP: Syncing with 5 CPUs ... !!! + 11.963519 s: APP: Syncing with 5 CPUs ... Done !!! + 11.963704 s: REMOTE_SERVICE: Init ... !!! + 11.965377 s: REMOTE_SERVICE: Init ... Done !!! + 11.965441 s: FVID2: Init ... !!! + 11.965517 s: FVID2: Init ... Done !!! + 11.965577 s: DSS: Init ... !!! + 11.965608 s: DSS: Display type is HDMI !!! + 11.965649 s: DSS: M2M Path is enabled !!! + 11.965679 s: DSS: SoC init ... !!! + 11.965705 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2 + 11.965942 s: SCICLIENT: Sciclient_pmSetModuleState success + 11.965982 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=4 parent=6 + 11.966136 s: SCICLIENT: Sciclient_pmSetModuleClkParent success + 11.966177 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=4 freq=61875000 + 11.968170 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success + 11.968209 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=4 state=2 flag=0 + 11.968812 s: SCICLIENT: Sciclient_pmModuleClkRequest success + 11.968849 s: DSS: SoC init ... Done !!! + 11.968877 s: DSS: Board init ... !!! + 11.973652 s: DSS: Board init ... Done !!! + 11.976703 s: DSS: Init ... Done !!! + 11.976768 s: VHWA: VPAC Init ... !!! + 11.976798 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2 + 11.977110 s: SCICLIENT: Sciclient_pmSetModuleState success + 11.977150 s: VHWA: LDC Init ... !!! + 11.981945 s: VHWA: LDC Init ... Done !!! + 11.982007 s: VHWA: MSC Init ... !!! + 11.994348 s: VHWA: MSC Init ... Done !!! + 11.994413 s: VHWA: NF Init ... !!! + 11.996204 s: VHWA: NF Init ... Done !!! + 11.996260 s: VHWA: VISS Init ... !!! + 12.007223 s: VHWA: VISS Init ... Done !!! + 12.007287 s: VHWA: VPAC Init ... Done !!! + 12.007336 s: VX_ZONE_INIT:Enabled + 12.007366 s: VX_ZONE_ERROR:Enabled + 12.007393 s: VX_ZONE_WARNING:Enabled + 12.008581 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 + 12.008847 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF + 12.009081 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 + 12.009317 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 + 12.009537 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 + 12.009840 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 + 12.010114 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 + 12.010385 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 + 12.010661 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 + 12.010914 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 + 12.011150 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX + 12.011412 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 + 12.011678 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 + 12.011960 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 + 12.012228 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 + 12.012489 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 + 12.012773 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 + 12.013041 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 + 12.013287 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 + 12.013531 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 + 12.013785 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 + 12.013844 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! + 12.013882 s: APP: OpenVX Target kernel init ... !!! + 12.036380 s: APP: OpenVX Target kernel init ... Done !!! + 12.036440 s: CSI2RX: Init ... !!! + 12.036468 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 + 12.036611 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.036660 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2 + 12.036838 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.036871 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2 + 12.037026 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.037058 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2 + 12.037166 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.037197 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2 + 12.037304 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.037507 s: CSI2RX: Init ... Done !!! + 12.037546 s: CSI2TX: Init ... !!! + 12.037570 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2 + 12.037676 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.037711 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2 + 12.037869 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.037901 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2 + 12.038036 s: SCICLIENT: Sciclient_pmSetModuleState success + 12.038111 s: CSI2TX: Init ... Done !!! + 12.038144 s: ISS: Init ... !!! + 12.038182 s: IssSensor_Init ... Done !!! + 12.038246 s: IttRemoteServer_Init ... Done !!! + 12.038282 s: VISS REMOTE SERVICE: Init ... !!! + 12.038344 s: VISS REMOTE SERVICE: Init ... Done !!! + 12.038380 s: UDMA Copy: Init ... !!! + 12.040242 s: UDMA Copy: Init ... Done !!! + 12.040341 s: APP: Init ... Done !!! + 12.040378 s: APP: Run ... !!! + 12.040403 s: IPC: Starting echo test ... + 12.043319 s: APP: Run ... Done !!! + 12.044890 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[.] C66X_2[.] C7X_1[.] + 12.045014 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[.] C7X_1[.] + 12.045111 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] + 12.045206 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] + 11.193050 s: CIO: Init ... Done !!! + 11.193118 s: ### CPU Frequency = 1000000000 Hz + 11.193159 s: CPU is running FreeRTOS + 11.193185 s: APP: Init ... !!! + 11.193208 s: SCICLIENT: Init ... !!! + 11.193470 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar] + 11.193519 s: SCICLIENT: DMSC FW revision 0x8 + 11.193553 s: SCICLIENT: DMSC FW ABI revision 3.1 + 11.193605 s: SCICLIENT: Init ... Done !!! + 11.193634 s: UDMA: Init ... !!! + 11.195189 s: UDMA: Init ... Done !!! + 11.195250 s: MEM: Init ... !!! + 11.195292 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ dc000000 of size 16777216 bytes !!! + 11.195365 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!! + 11.195425 s: MEM: Init ... Done !!! + 11.195451 s: IPC: Init ... !!! + 11.195512 s: IPC: 6 CPUs participating in IPC !!! + 11.195561 s: IPC: Waiting for HLOS to be ready ... !!! + 11.195615 s: IPC: HLOS is ready !!! + 11.210798 s: IPC: Init ... Done !!! + 11.210862 s: APP: Syncing with 5 CPUs ... !!! + 11.963517 s: APP: Syncing with 5 CPUs ... Done !!! + 11.963709 s: REMOTE_SERVICE: Init ... !!! + 11.965274 s: REMOTE_SERVICE: Init ... Done !!! + 11.965337 s: FVID2: Init ... !!! + 11.965407 s: FVID2: Init ... Done !!! + 11.965440 s: VHWA: DMPAC: Init ... !!! + 11.965466 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2 + 11.965691 s: SCICLIENT: Sciclient_pmSetModuleState success + 11.965734 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2 + 11.966040 s: SCICLIENT: Sciclient_pmSetModuleState success + 11.966076 s: VHWA: DOF Init ... !!! + 11.976997 s: VHWA: DOF Init ... Done !!! + 11.977064 s: VHWA: SDE Init ... !!! + 11.981002 s: VHWA: SDE Init ... Done !!! + 11.981062 s: VHWA: DMPAC: Init ... Done !!! + 11.981106 s: VX_ZONE_INIT:Enabled + 11.981135 s: VX_ZONE_ERROR:Enabled + 11.981161 s: VX_ZONE_WARNING:Enabled + 11.982352 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 + 11.982600 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE + 11.982829 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF + 11.982886 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! + 11.982924 s: APP: OpenVX Target kernel init ... !!! + 11.983200 s: APP: OpenVX Target kernel init ... Done !!! + 11.983241 s: UDMA Copy: Init ... !!! + 11.985280 s: UDMA Copy: Init ... Done !!! + 11.985347 s: APP: Init ... Done !!! + 11.985379 s: APP: Run ... !!! + 11.985405 s: IPC: Starting echo test ... + 11.987959 s: APP: Run ... Done !!! + 11.989197 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] + 11.989310 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] + 11.989403 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] + 12.044137 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] + 10.989483 s: CIO: Init ... Done !!! + 10.989508 s: ### CPU Frequency = 1350000000 Hz + 10.989519 s: CPU is running FreeRTOS + 10.989527 s: APP: Init ... !!! + 10.989534 s: SCICLIENT: Init ... !!! + 10.989762 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar] + 10.989774 s: SCICLIENT: DMSC FW revision 0x8 + 10.989783 s: SCICLIENT: DMSC FW ABI revision 3.1 + 10.989793 s: SCICLIENT: Init ... Done !!! + 10.989802 s: UDMA: Init ... !!! + 10.991443 s: UDMA: Init ... Done !!! + 10.991462 s: MEM: Init ... !!! + 10.991476 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ de000000 of size 16777216 bytes !!! + 10.991494 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! + 10.991509 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ df000000 of size 50331648 bytes !!! + 10.991525 s: MEM: Init ... Done !!! + 10.991534 s: IPC: Init ... !!! + 10.991556 s: IPC: 6 CPUs participating in IPC !!! + 10.991571 s: IPC: Waiting for HLOS to be ready ... !!! + 10.991584 s: IPC: HLOS is ready !!! + 10.995336 s: IPC: Init ... Done !!! + 10.995360 s: APP: Syncing with 5 CPUs ... !!! + 11.963516 s: APP: Syncing with 5 CPUs ... Done !!! + 11.963529 s: REMOTE_SERVICE: Init ... !!! + 11.964187 s: REMOTE_SERVICE: Init ... Done !!! + 11.964223 s: VX_ZONE_INIT:Enabled + 11.964236 s: VX_ZONE_ERROR:Enabled + 11.964250 s: VX_ZONE_WARNING:Enabled + 11.967545 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! + 11.967560 s: APP: OpenVX Target kernel init ... !!! + 11.967877 s: APP: OpenVX Target kernel init ... Done !!! + 11.967891 s: UDMA Copy: Init ... !!! + 11.971873 s: UDMA Copy: Init ... Done !!! + 11.971892 s: APP: Init ... Done !!! + 11.971901 s: APP: Run ... !!! + 11.971910 s: IPC: Starting echo test ... + 11.972997 s: APP: Run ... Done !!! + 11.973378 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[.] C7X_1[P] + 11.973634 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] + 11.988523 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] + 12.043991 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] + 11.401160 s: CIO: Init ... Done !!! + 11.401195 s: ### CPU Frequency = 1350000000 Hz + 11.401208 s: CPU is running FreeRTOS + 11.401217 s: APP: Init ... !!! + 11.401226 s: SCICLIENT: Init ... !!! + 11.401466 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar] + 11.401480 s: SCICLIENT: DMSC FW revision 0x8 + 11.401491 s: SCICLIENT: DMSC FW ABI revision 3.1 + 11.401503 s: SCICLIENT: Init ... Done !!! + 11.401512 s: UDMA: Init ... !!! + 11.403385 s: UDMA: Init ... Done !!! + 11.403411 s: MEM: Init ... !!! + 11.403430 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ e2000000 of size 16777216 bytes !!! + 11.403451 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!! + 11.403470 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e3000000 of size 50331648 bytes !!! + 11.403487 s: MEM: Init ... Done !!! + 11.403497 s: IPC: Init ... !!! + 11.403523 s: IPC: 6 CPUs participating in IPC !!! + 11.403539 s: IPC: Waiting for HLOS to be ready ... !!! + 11.403551 s: IPC: HLOS is ready !!! + 11.408221 s: IPC: Init ... Done !!! + 11.408249 s: APP: Syncing with 5 CPUs ... !!! + 11.963516 s: APP: Syncing with 5 CPUs ... Done !!! + 11.963529 s: REMOTE_SERVICE: Init ... !!! + 11.964208 s: REMOTE_SERVICE: Init ... Done !!! + 11.964245 s: VX_ZONE_INIT:Enabled + 11.964256 s: VX_ZONE_ERROR:Enabled + 11.964265 s: VX_ZONE_WARNING:Enabled + 11.967556 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! + 11.967571 s: APP: OpenVX Target kernel init ... !!! + 11.967896 s: APP: OpenVX Target kernel init ... Done !!! + 11.967912 s: UDMA Copy: Init ... !!! + 11.972037 s: UDMA Copy: Init ... Done !!! + 11.972057 s: APP: Init ... Done !!! + 11.972066 s: APP: Run ... !!! + 11.972076 s: IPC: Starting echo test ... + 11.973251 s: APP: Run ... Done !!! + 11.973572 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[.] + 11.973630 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] + 11.988550 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] + 12.044017 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] + 11.959732 s: CIO: Init ... Done !!! + 11.959747 s: ### CPU Frequency = 1000000000 Hz + 11.959758 s: CPU is running FreeRTOS + 11.959766 s: APP: Init ... !!! + 11.959773 s: SCICLIENT: Init ... !!! + 11.960004 s: SCICLIENT: DMSC FW version [8.5.2--v08.05.02 (Chill Capybar] + 11.960017 s: SCICLIENT: DMSC FW revision 0x8 + 11.960027 s: SCICLIENT: DMSC FW ABI revision 3.1 + 11.960038 s: SCICLIENT: Init ... Done !!! + 11.960047 s: UDMA: Init ... !!! + 11.961297 s: UDMA: Init ... Done !!! + 11.961309 s: MEM: Init ... !!! + 11.961320 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!! + 11.961340 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!! + 11.961358 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 458752 bytes !!! + 11.961375 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!! + 11.961392 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ 100000000 of size 385875968 bytes !!! + 11.961411 s: MEM: Init ... Done !!! + 11.961419 s: IPC: Init ... !!! + 11.961433 s: IPC: 6 CPUs participating in IPC !!! + 11.961448 s: IPC: Waiting for HLOS to be ready ... !!! + 11.961459 s: IPC: HLOS is ready !!! + 11.963490 s: IPC: Init ... Done !!! + 11.963503 s: APP: Syncing with 5 CPUs ... !!! + 11.963517 s: APP: Syncing with 5 CPUs ... Done !!! + 11.963528 s: REMOTE_SERVICE: Init ... !!! + 11.963679 s: REMOTE_SERVICE: Init ... Done !!! + 11.963701 s: VX_ZONE_INIT:Enabled + 11.963712 s: VX_ZONE_ERROR:Enabled + 11.963722 s: VX_ZONE_WARNING:Enabled + 11.963861 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 + 11.963957 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 + 11.964020 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 + 11.964125 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 + 11.964190 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 + 11.964254 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 + 11.964365 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 + 11.964432 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 + 11.964454 s: VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! + 11.964467 s: APP: OpenVX Target kernel init ... !!! + 11.964615 s: APP: OpenVX Target kernel init ... Done !!! + 11.964628 s: APP: Init ... Done !!! + 11.964637 s: APP: Run ... !!! + 11.964644 s: IPC: Starting echo test ... + 11.964802 s: APP: Run ... Done !!! + 11.973371 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[.] C7X_1[s] + 11.973628 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] + 11.988570 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] + 12.044067 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] +[2023-07-31 10:52:52.389906] [A72 ] [app_log_linux.c ] [INF] GTC Frequency = 200 MHz +[2023-07-31 10:52:52.389992] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_INIT:Enabled +[2023-07-31 10:52:52.389996] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:Enabled +[2023-07-31 10:52:52.389999] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_WARNING:Enabled +[2023-07-31 10:52:52.390693] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_INIT:[tivxInitLocal:145] Initialization Done !!! +[2023-07-31 10:52:52.391892] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_INIT:[tivxHostInitLocal:93] Initialization Done for HOST !!! + 47.564514 s: REMOTE_SERVICE_SENSOR: Received command 00001002 to configure 4 sensor(s) !!! + 47.564685 s: REMOTE_SERVICE_SENSOR: IMX390: numSensors 4 portNum 1 + 47.564749 s: REMOTE_SERVICE_SENSOR: IMX390: Configuring MAX96722 portIdMap=0 ... !!! + 47.713267 s: REMOTE_SERVICE_SENSOR: Sensor(s) configuration done !!! +active_channel_id:3 +App Send Preproc Command Done! +PreProc: Node send command failed! +delete app... +Capture Node delete done! +DisplayM2M Node delete done! +Scaler Node delete done! +PreProcObj delete done! +odTIDLObj delete done! +drawDetectionsObj delete done! +MOSAIC Node delete done! +Display Node delete done! +Graph delete done! +deinit app... +app_deinit_capture done +app_deinit_displayM2M done +app_deinit_scaler done +PreProcObj deinit done! +odTIDLObj deinit done! +Draw detections deinit Done! +Mosaic deinit Done! +app_deinit_display done +app_deinit_switch_ch_obj done +app_deinit_switch_preproc_ch_obj done +[2023-07-31 10:52:57.500629] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownContextSendControlCmd:681] Command ack message returned failure cmd_status: -1 +[2023-07-31 10:52:57.500672] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownContextSendControlCmd:718] tivxEventWait() failed. + 51.852575 s: VX_ZONE_ERROR:[ownTargetKernelControl:430] Kernel control function is NULL + 51.852596 s: VX_ZONE_ERROR:[ownTargetNodeDescNodeControl:1007] SendCommand Failed + 52.110696 s: ========================================================== +appGrpxDeInit done +tivxHwaUnLoadKernels done +tivxFileIOUnLoadKernels done +tivxTIDLUnLoadKernels done +tivxImgProcUnLoadKernels done +vxReleaseContext done +APP: Deinit ... !!! +REMOTE_SERVICE: Deinit ... !!! +REMOTE_SERVICE: Deinit ... Done !!! +IPC: Deinit ... !!! +IPC: DeInit ... Done !!! +MEM: Deinit ... !!! +DDR_SHARED_MEM: Alloc's: 143 alloc's of 158460844 bytes +DDR_SHARED_MEM: Free's : 143 free's of 158460844 bytes +DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes +DDR_SHARED_MEM: Total size: 536870912 bytes +MEM: Deinit ... Done !!! +APP: Deinit ... Done !!! +root@Linux:~# 52.110798 s: Capture Status: Instance|0 + 52.110833 s: ========================================================== + 52.110880 s: overflowCount: 0 + 52.110918 s: spuriousUdmaIntrCount: 0 + 52.110956 s: frontFIFOOvflCount: 0 + 52.110991 s: crcCount: 0 + 52.111022 s: eccCount: 0 + 52.111057 s: correctedEccCount: 0 + 52.111091 s: dataIdErrorCount: 0 + 52.111127 s: invalidAccessCount: 0 + 52.111163 s: invalidSpCount: 0 + 52.111204 s: strmFIFOOvflCount[0]: 0 + 52.111248 s: strmFIFOOvflCount[1]: 0 + 52.111280 s: Channel Num | Frame Queue Count | Frame De-queue Count | Frame Drop Count | Error Frame Count | + 52.111359 s: 0 | 104 | 104 | 6 | 0 | + 52.111437 s: 1 | 104 | 104 | 6 | 0 | + 52.111516 s: 2 | 104 | 104 | 6 | 0 | + 52.111593 s: 3 | 104 | 104 | 6 | 0 | + 52.145710 s: ========================================================== + 52.145811 s: Display M2M Status: Instance|0 + 52.145851 s: ========================================================== + 52.145900 s: Queue Count: 102 + 52.145936 s: De-queue Count: 102 + 52.145975 s: Write-back Frames Count: 102 + 52.146013 s: Underflow Count: 0 + 52.146111 s: ========================================================== + 52.146174 s: Display M2M Status: Instance|0 + 52.146209 s: ========================================================== + 52.146255 s: Queue Count: 102 + 52.146291 s: De-queue Count: 102 + 52.146329 s: Write-back Frames Count: 102 + 52.146367 s: Underflow Count: 0 + 52.146443 s: ========================================================== + 52.146502 s: Display M2M Status: Instance|0 + 52.146535 s: ========================================================== + 52.146580 s: Queue Count: 102 + 52.146614 s: De-queue Count: 102 + 52.146668 s: Write-back Frames Count: 102 + 52.146708 s: Underflow Count: 0 + 52.146786 s: ========================================================== + 52.146846 s: Display M2M Status: Instance|0 + 52.146880 s: ========================================================== + 52.146926 s: Queue Count: 102 + 52.146960 s: De-queue Count: 102 + 52.146997 s: Write-back Frames Count: 102 + 52.147036 s: Underflow Count: 0 +[2023-07-31 10:52:57.808632] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference +[2023-07-31 10:52:57.808663] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference +[2023-07-31 10:52:57.808666] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference +[2023-07-31 10:52:57.808669] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference +[2023-07-31 10:52:57.808672] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_ERROR:[ownReleaseReferenceInt:294] Invalid reference +[2023-07-31 10:52:58.305843] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_WARNING:[vxReleaseContext:1060] Found a reference 0xffffae9c08a8 of type 0000080f at external count 1, internal count 0, releasing it +[2023-07-31 10:52:58.305855] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_WARNING:[vxReleaseContext:1062] Releasing reference (name=image_104) now as a part of garbage collection +[2023-07-31 10:52:58.305886] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_INIT:[tivxHostDeInitLocal:107] De-Initialization Done for HOST !!! +[2023-07-31 10:52:58.310284] [A72 ] [tivx_platform.c ] [INF] VX_ZONE_INIT:[tivxDeInitLocal:223] De-Initialization Done !!! + +Hi Xin, The error log shows that the control command is not registered on the target. Could you please confirm if the tivxAddTargetKernelDLPreProc() is being called by putting some logs into it? May I know on which target are you running this node? Is it on C66 DSP itself? Regards, Nikhil + +Hi NIkhil, I think tivxAddTargetKernelDLPreProc () is called, because I am during program execution to the 100th cycle for DL preproc node sends the control command, before sending the application can run normally. DL preproc node This node runs the target of TI default, I have not changed it, here is the definition I see: Regards, Xin + +Hi Xin, I am suspecting that the control function that you have added in the tivxAddTargetKernelDLPreProc() is not reflected in the build. To confirm this, could you put a log in this function and see if it is getting printed (To ensure that the target file got built after your changes) 51.852575 s: VX_ZONE_ERROR:[ownTargetKernelControl:430] Kernel control function is NULL 51.852596 s: VX_ZONE_ERROR:[ownTargetNodeDescNodeControl:1007] SendCommand Failed The above logs states that the control function is still NULL in the kernel. Regards, Nikhil + +Hi Nikhil, I recompiled the SDK with these changes, but it still reported that the control functions were empty. What was the cause? Regards, Xin + +Hi Xin, I tried inserting control command in the tivxImgPreProcNode ( As DL node was not readily used in the SDK demos) and I was able to reach and print the message in the control function. I included this in the vision_apps object detection demo. Please refer the below patch on vision_apps folder in SDK 8.6 vision_apps_preproc_controlCmd.patch The same should work for tivxDLPreProcNode Regards, Nikhil + +Hi NIkhil, I refer to your patch add print log in the control function.but it still print "Kernel control function is NULL",I think the question now is why is the control function empty? Why didn't the changes I added take effect after compilation? How does the host side connect to the target side when the program is running? Do my host side and target side not correspond? Regards, Xin + +Hi NIkhil, I managed to send the control command, but it failed earlier because the target side of my DL preproc node was not vx_dl_pre_proc_target.c, but vx_image_preprocessing_target.c. The command was sent successfully, but it is not convenient for testing. I am not sure whether it works. I would like to know whether displayM2M node also supports selecting channels to facilitate testing Regards, Xin + +Hi Xin, I am assuming that now you could send a control command from the application to the control API of the target right? xiu xin said: I would like to know whether displayM2M node also supports selecting channels to facilitate testing Currently, in the SDK, only the display node has this active channel selection implementation. Since you already have the active channel implementation in place, all you have to do is to use it in the process function of the node. Please refer the implementation of "active_channel" in the process function of the display node. You could see that based on the active channel you have selected, tivxGetObjDescElement() would take only the object descriptor corresponding to the active channel and use it for processing. Regards, Nikhil + +Hi NIkhil, After I added "active_channel" functionality to the process function of vx_image_preprocessing_target.c via tivxGetObjDescElement(), the program stopped running. Taking the vision_apps object detection demo as an example, the input of DL preproc node comes from scaler node. When DL preproc node adds the selection channel function, Does DL preproc node need replicated node enabled and how is num_ch set? Here are the changes I made to vx_image_preprocessing_target.c: Regards, Xin vx_image_preprocessing_target.c.txt diff --git a/kernels/img_proc/c66/vx_image_preprocessing_target.c b/kernels/img_proc/c66/vx_image_preprocessing_target.c +index 56d27ca..757b532 100644 +--- a/kernels/img_proc/c66/vx_image_preprocessing_target.c ++++ b/kernels/img_proc/c66/vx_image_preprocessing_target.c +@@ -61,7 +61,7 @@ + */ + + +- ++#include + #include + #include + #include +@@ -129,6 +129,9 @@ typedef struct { + uint32_t l2_heap_id; + uint64_t l2_global_base; + ++ /**< Id of active channel */ ++ uint32_t active_channel; ++ + } tivxImgPreProcKernelParams; + + static vx_status img_proc_pipeline_blocks_nv12ToRgbp +@@ -192,6 +195,51 @@ static vx_status img_proc_execute_16bit_RgbiToRgbp + void *out_tensor_target_ptr + ); + ++static vx_status tivxPreProcSwitchChannel(tivxImgPreProcKernelParams *preproc, ++ const tivx_obj_desc_user_data_object_t *usr_data_obj) ++{ ++ vx_status status = (vx_status)VX_SUCCESS; ++ tivx_preproc_select_channel_params_t *ch_prms = NULL; ++ void *target_ptr; ++ ++ // printf("-----start switch channel ----- \n"); ++ if (NULL != usr_data_obj) ++ { ++ target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr); ++ ++ tivxCheckStatus(&status, tivxMemBufferMap(target_ptr, usr_data_obj->mem_size, ++ (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); ++ ++ if (sizeof(tivx_preproc_select_channel_params_t) == ++ usr_data_obj->mem_size) ++ { ++ ch_prms = (tivx_preproc_select_channel_params_t *)target_ptr; ++ preproc->active_channel = ch_prms->active_preproc_channel_id; ++ } ++ else ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n"); ++ status = (vx_status)VX_ERROR_INVALID_PARAMETERS; ++ } ++ ++ tivxCheckStatus(&status, tivxMemBufferUnmap(target_ptr, usr_data_obj->mem_size, ++ (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); ++ } ++ else ++ { ++ VX_PRINT(VX_ZONE_ERROR, "User Data Object is NULL \n"); ++ status = (vx_status)VX_ERROR_INVALID_PARAMETERS; ++ } ++ ++ return (status); ++} ++ ++static vx_status VX_CALLBACK tivxKernelImgPreProcControl( ++ tivx_target_kernel_instance kernel, ++ uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], ++ uint16_t num_params, void *priv_arg); ++ ++ + static vx_status dma_create(DMAObj *dmaObj, vx_size transfer_type, vx_uint32 dma_ch) + { + vx_status status = VX_SUCCESS; +@@ -637,6 +685,58 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcDelete( + return (status); + } + ++static vx_status VX_CALLBACK tivxKernelImgPreProcControl( ++ tivx_target_kernel_instance kernel, ++ uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], ++ uint16_t num_params, void *priv_arg) ++{ ++ vx_status status = (vx_status)VX_SUCCESS; ++ uint32_t size; ++ tivxImgPreProcKernelParams *preproc = NULL; ++ ++ status = tivxGetTargetKernelInstanceContext(kernel, ++ (void **)&preproc, &size); ++ ++ if ((vx_status)VX_SUCCESS != status) ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Failed to Get Target Kernel Instance Context\n"); ++ } ++ else if ((NULL == preproc) || ++ (sizeof(tivxImgPreProcKernelParams) != size)) ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Object Size\n"); ++ status = (vx_status)VX_FAILURE; ++ } ++ else ++ { ++ /* do nothing */ ++ // printf("Success to Get PreProc Target Kernel Instance Context\n"); ++ } ++ ++ if ((vx_status)VX_SUCCESS == status) ++ { ++ switch (node_cmd_id) ++ { ++ case TIVX_PREPROC_SELECT_CHANNEL: ++ { ++ // printf("hahahahhahhahahahahhahahahahhahaha"); ++ status = tivxPreProcSwitchChannel(preproc, ++ (tivx_obj_desc_user_data_object_t *)obj_desc[0U]); ++ break; ++ } ++ default: ++ { ++ VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n"); ++ status = (vx_status)VX_FAILURE; ++ break; ++ } ++ } ++ } ++ ++ return (status); ++} ++ ++ + static vx_status VX_CALLBACK tivxKernelImgPreProcProcess + ( + tivx_target_kernel_instance kernel, +@@ -691,6 +791,8 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcProcess + + tivx_obj_desc_image_t *in_img_desc; + void* in_image_target_ptr[2]; ++ uint32_t active_channel; ++ active_channel = prms->active_channel; + + tivx_obj_desc_tensor_t *out_tensor_desc; + void *out_tensor_target_ptr; +@@ -699,7 +801,14 @@ static vx_status VX_CALLBACK tivxKernelImgPreProcProcess + configuration_target_ptr = tivxMemShared2TargetPtr(&configuration_desc->mem_ptr); + tivxMemBufferMap(configuration_target_ptr, configuration_desc->mem_size, VX_MEMORY_TYPE_HOST,VX_READ_ONLY); + +- in_img_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX]; ++ // in_img_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX]; ++ in_img_desc = (tivx_obj_desc_image_t *) ++ tivxGetObjDescElement(obj_desc[TIVX_KERNEL_IMG_PREPROCESS_INPUT_IMAGE_IDX], ++ active_channel); ++ if (in_img_desc == NULL) ++ { ++ status = (vx_status)VX_FAILURE; ++ } + in_image_target_ptr[0] = tivxMemShared2TargetPtr(&in_img_desc->mem_ptr[0]); + tivxMemBufferMap(in_image_target_ptr[0], in_img_desc->mem_size[0], TIVX_MEMORY_TYPE_DMA, VX_READ_ONLY); + in_image_target_ptr[1] = NULL; +@@ -790,7 +899,7 @@ void tivxAddTargetKernelImgPreProc() + tivxKernelImgPreProcProcess, + tivxKernelImgPreProcCreate, + tivxKernelImgPreProcDelete, +- NULL, ++ tivxKernelImgPreProcControl, + NULL + ); + } +(END) + +Hi, xiu xin said: Taking the vision_apps object detection demo as an example, the input of DL preproc node comes from scaler node. When DL preproc node adds the selection channel function I am not sure how your usecase would be similar to the object detection demo flow. Here, the output from the preproc node would be object array of tensors which are generated at a time for multiple channels and fed to the TIDL node. As, you DL pre proc node would give only 1 channel output at a time, the TIDL node should also be aware of the same. xiu xin said: Does DL preproc node need replicated node enabled and how is num_ch set? Replicated node is not needed here if you are doing one channel at a time. The object array from which the image is extracted would have the num_ch information. The changes that you have done to the process function looks correct. Please check if your application is ready to accept this flow. Regards, Nikhil + +Hi Nikhil, I modified the graph according to the above changes, but the program does not work properly. Can you add the function of DL Preproc node switching channels with app_tidl_od_cam as an example? Looking forward to your reply. Regards, Xin + +Hi Xin, app_tidl_od_cam demo is for processing multiple camera input at a time and display the same using a mosaic node so that all camera inputs are visible on the display at a time. However, your usecase would be to receive 2 camera input and then process and display only 1 camera at a time right? This would require major changes in the code like removal of replicate nodes, removal of mosaic node etc. I would suggest you share the application source code you have developed as per your usecase which I could review at my end. Regards, Nikhil + +Hi Nikhil, My graph also accepts four cameras, but the images of one channel are randomly selected for deep learning processing. They can also be displayed on the same screen through mosaic node. One image is processed, and the remaining three are original images, which does not affect the addition of switching channel function. Alternatively, you can use the display node to display the post-processed image without creating a mosaic node during the create graph phase. The test case I wrote now is the same as the app_tidl_od_cam demo, but due to the different camera sensor used, the program is slightly different in some places, such as the register configuration, etc. If I send you my demo, it won't actually work well on your computer, it will consume more time. Thank you for your help. Regards, Xin + +Hi Xin, I shall try to modify the application. I would require some time though as there would be a lot of modifications. I shall get back to you with an application by next week. I shall do this with the imgPreProc itself instead of dlPreproc as they should be same. Regards, Nikhil + +Hi Nikhil, Thank you for your patient help and I will look forward to your reply next week. Regards, Xin + +Sure, Thank you + +Hi Nikhil, Is there any good news? Regards, Xin + +Hi Xin, I just realized while planning for the implementation. The active channel selection using control command should be for preproc, tidl and postproc node because you would be doing the full deep learning processing only for one channel right? Have you also done the same? Initially I thought the control command was required only for pre-proc. May I know what have you done at your end? Sorry for the delay in the implementation because of festival holidays here in India this week. Regards, Nikhil + +Hi Nikhil, Celebrate your wonderful holiday. What I'm doing so far is just sending a control command to the preprocessor node, using tivxGetObjDescElement() in the corresponding target, and I didn't succeed, and then I realized that I might need to enable replication on the preprocessor node before sending the control command, but when I enabled replication, it didn't work either, I am also currently learning the use of select link in the Tda2 sdk and want to port its functionality to Tda4 for use as a node, if successful this will be a perfect solution as I have seen on the forum that someone has successfully ported it. But I'm not familiar with Tda2 and I'm still working on it. Regards, Xin + +Hi Nikhil, Have you implemented switching channels? Do you have any further ideas? Regards, xin + +Hi Xin, I have a patch to switch channels in preproc on app_tidl_od_cam application. This patch is on SDK 8.6 and has to be applied on vision_apps folder. /cfs-file/__key/communityserver-discussions-components-files/791/pre_2D00_proc_5F00_switch.patch Here I had to add channel switch to post proc (drawBoxDetection) as well because this was taking reference image from input and that also should be changed when the channel is switched. To change the channel, press "c" after running the application in interactive mode. Regards, Nikhil + +Hi Nikhil, According to your patch, I have successfully implemented the switch channel, do you have any suggestions for porting TDA2 select link to TDA4? Is it convenient for the TDA4 SDK to create a select node? Regards, Xin + +Hi Xin, TDA2 has Link framework and TDA4 supports OpenVX framework. In this the select link and select nodes are not supported. I would suggest using the switch channel itself. Regards, Nikhil + +Hi Nikhil, TDA4 platform, if from four input channels select the specified two or three channels, how to achieve? Regards, Xin + +Hi Xin, I thought your usecase was to process each channel individually which was the reason for the switch channel right? xiu xin said: select the specified two or three channels Do you mean to select 2 or 3 channels in parallel? Regards, Nikhil + +Hi Nikhil， Some post-processing needs to specify one channel, some post-processing needs to specify two or three channels at the same time, how to select two or three channels at the same time? Regards Xin + +Hi Nikhil, Since this thread is too long, I have started a new one, if you have any suggestions, please share them in the thread below. TDA4VM: How can multiple specified channels be selected simultaneously? - Processors forum - Processors - TI E2E support forums Regards, Xin + diff --git a/data2/text/range/30001+/1303553.txt b/data2/text/range/30001+/1303553.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b24362afd4837ec73b999f3497bea1d39ff631a --- /dev/null +++ b/data2/text/range/30001+/1303553.txt @@ -0,0 +1,6047 @@ +Ticket Name: TDA4VM: if ub960 work in Line-Interleave mode and with 4 camera , how to separate 4 camera image into separate buffers + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2, EVM board SDK 0804 The ub960 work in line interleave mode with 4 camera , but we find all camera images combine to a single buff. How can we separate the image from the 4 cameras into separate buffers + +Responses: +Hi Jin, You would have to run additional DMA to separate them. There is no reference example in SDK to separate them. Regards, Brijesh + +hi, can you point out where should we use DMA to separate the image data in sdk + +Hi, In the SDK, all the demos assume that the DES sends in the data with separate virtual channel. Hence, the SHIM layer stores the buffer in DDR based on the Virtual channel ID. In your case, since the DDR itself has all channels interleaved as one buffer, you would require to do another dma copy to deinterleave from that buffer to another separate buffers in the DDR. However, currently we do not have a out of the box example in the SDK that does the same. Regards, Nikhil + +Hi Nikhil, Can TDA2 split the interleaved image into 4 buffers without extra DMA copy ? Deinterleaving the bufffer will consume more DDR bandwidth， so ti will low the whole performance， expecially for C7X which needs more throughout. Using another DMA to deinterleave image is not a good solution， do you have other recommendation to relsove the problem? Thank you in advance! BR Yunjie Li + +Hi Yunjie Li said: Can TDA2 split the interleaved image into 4 buffers without extra DMA copy ? May I know if you are referring to TDA2 or TDA4? I assumed the thread was opened for TDA4VM. In case of csi-rx of TDA4VM, the SHIM layer gives different UDMA PSIL thread based on a VC-DT combination. hongyao.jin said: The ub960 work in line interleave mode with 4 camera , but we find all camera images combine to a single buff. May I know why you require to use UB960 is in this mode? Regards, Nikhil + +I mean TDA2， the original design adopts TDA2(the solution is provided by other vendor). Now，we want to replace TDA2 with TDA4, so I have to follow the legacy the requirement of peer. I have no idea weather TDA2 can deinterleave the image, do you know the relevant implement of TDA2 ? BR Yunjie Li + +Hi Li, Do you mean TDA2Px? Because TDA2x doesnot support MIPI input and TDA2Px does support MIPI input via CAL module. CAL module can separate the camera data using virtual channel and data type fields and then can store them in separate buffers. This is same as CSIRX. If it is line interleaved data, CAL and CSIRX both will store them in a same buffer and then you need to separate them using another DMA. I am wondering where this data is processed. Is it going to be processed in the ISP? Regards, Brijesh + +Brijesh Jadav said: Do you mean TDA2Px? [Yunjie Li]: yes. Brijesh Jadav said: I am wondering where this data is processed. Is it going to be processed in the ISP? [Yunjie Li]: The data is processed by A72， bypass ISP， the format of data is yuv422. We try to use UDMA 2D to deinterleave an interleaved image of 12MB( 4 streams) on MCU2_0, it takes 6ms to get an image (3MB) by triggering UDMA 2D, so 4 images will take 6ms * 4 = 24ms. During this time, other components（C66， C7x）can not access DDR, it comsumes too much resource, the CV algorithm may be not deployed, so the solution does not make sense on TDA4. By the way， the camera is 30 fps. BR Yunjie Li + +Hi Li, ok, in this case, isn't it better to update CV algorithm to support this line interleaved image? CV algorithm needs to just play with the pitch and start address to get the correct image of each input camera. This will save the DDR BW and also latency.. Regards, Brijesh + +Brijesh Jadav said: isn't it better to update CV algorithm to support this line interleaved image It is impossible to persuade CV guys to accept it, I will try other method to avoid deinterleaving in SOC. Thank you so much! BR Yunjie Li + +You can probably use other HW accelerator to separate them. Like DSS M2M path can accept YUV422 and can also output YUV422, so you can use it to separate them. Regards, Brijesh + +Hi Brijesh, Need you help give more guide about the DSS M2M for customer. do we have some demo code for customer? BR, Biao + +Hi Brijesh, Customer have done DSS m2m to split this picture. The two source files customer modified and the generated patch file are in the attachment. The log running locally is as follows: Currently, all four tasks are enabled and run together. There is some running latency(around 20ms) issue, it slower than do it via MCU. Need you help to reduce the latency? In addition to the running time problem, it seems that the split image also has some problems and becomes a bit blurry. Can you help review the code? The original large picture, the four small pictures split by python script, and the four small pictures split by DSS M2M are all in below link. https://tidrive.ext.ti.com/u/9lFCH0tRQlfkUUIR/6a1ac96e-36ad-4d8e-be84-750c390b75f3?l 3;rrD8ZY BR, Biao + +We split the image through the CPU and found that the four images cost a total of 11ms, why does it seem to be faster than DMA and DSSM2M + +Hongyao, that's great to hear you make this in progress. Did you split/copy and deinterleaved those super-frame by A72 correctly, from the data integrity point of view? BTW, at least for me, it's not surprise at all the empty 2xA72 can do this memcpy better, because the frequency and performance of CPU is very high compared to all the other hardware accelerators. appreciate. + +yes, the small images split by A72 are normal + +The figure on the left is separated by memcpy, and the figure on the right is by M2M. It is obvious that the M2M image is superimposed by four images + +It seems that 4 images are overlayed, or blent. + +hi Yunjie Li, hongyao jin, Did you take care of cache operations before saving these images into a file? If not, can you check and take care of it? Buffers are typically cached mapped on all cores, so they should not be accessed without cache operation and without cache operation, the content written in the file may not be correct. Also i did not get that small size by A72 is correct?? Do you mean the above performance data is for small size image? and do you only see these one correct? Regards, Brijesh + +1. We don't think the cache is causing this problem, because the data in memory is actually modified before and after the M2M operation 2. yes, the two images above are channel 0, one is split by memcpy, the other is split by M2M, but the images of the four channels after splitting by M2M are completely consistent + +Brijesh, kindly here we need BU urgent support to work out an example, for instance, test_display_m2m.c, in order to fulfill the deinterleaving of super frame by lines of 4x/channels. Technically, as we aligned, the tiovx display node should be extended to support pitching of ovx image object. appreciate. + +Hi Xu, As discussed over the email, please find attached patch to add support for de-interleaving in DSS M2M node. Please apply this patch on top of ti-processor-sdk-rtos-j721e-evm-08_04_00_06/tiovx folder. In this patch, 1, I have added additional create time parameter “enable_deiniterleave” in DSS M2M tivx_display_m2m_params_t struct. 2, when this flag is set, DSS M2M node expects input as image and output as one of the element of the object array. It expects input frame size to be ‘n’ times the output image size and image format to be same. It also expects the ‘n’ images are line interleaved in the input image exactly at the pitch boundary. 3, the input address is calculated at the pich offset and output image is extracted from the image array. /cfs-file/__key/communityserver-discussions-components-files/791/DSSM2M_5F00_DeInterleave_5F00_Support.patch Regards, Brijesh + +After patch was applied, it was consistent with the previous phenomenon that split images still failed, and when deinterleave was enabled, the program would be stuck the log when deinterleave is enabled root@p789-adcu1:~# +root@p789-adcu1:~# cd /hirain/data/ti_dss_patch/ +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +294 +298 +312 +314 +316 +DSS_M2M: task id 0 start_time 1699996576 s 261890 us + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelValidate:241] Validating kernel com.ti.hwa.displaym2m + 0.000000 s: VX_ZONE_INNOTICE: + + the log when deinterleave is disabled root@p789-adcu1:~# +root@p789-adcu1:~# cd /hirain/data/ti_dss_patch/ +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ls -l +total 40304 +-rw-r--r-- 1 root root 1541 Nov 15 2023 app_multi_cam.cfg +-rw-r--r-- 1 root root 13158400 Nov 15 2023 img_raw.yuv +-rw-r--r-- 1 root root 28054632 Nov 15 05:17 libtivision_apps.so.8.4.0 +-rwxr-xr-x 1 root root 45720 Nov 15 05:16 vx_app_multi_cam.out +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +294 +298 +312 +314 +316 +DSS_M2M: task id 0 start_time 1699996676 s 346544 us + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelValidate:241] Validating kernel com.ti.hwa.displaym2m + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:523] Calling create callback for node node_91 + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:529] Create callback for node node_91 completed + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:578] kernel init for node 0, kernel com.ti.hwa.displaym2m ... + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:589] kernel init for node 0, kernel com.ti.hwa.displaym2m ... done !!! + 0.000000 s: VX_ZONE_INFO:[ownGraphScheduleGraph:764] Scheduling Graph (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelSchedule:627] Scheduling Node (node=12, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownCheckGraphCompleted:677] Graph Completed (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownCheckGraphCompleted:705] All Graphs Completed +334 +DSS_M2M: task id 0 stop_time 1699996676 s 363282 us + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed +Received events from Task0 + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_nf_generic destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_nf_bilateral destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dmpac_sde destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_ldc destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_msc_multi_scale destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_msc_pyramid destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dmpac_dof destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dof_visualize destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_viss destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.display destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.capture destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.csitx destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.displaym2m destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:Enabled +Display M2M Conformance Test Finished... + 0.000000 s: VX_ZONE_INIT:[tivxHostDeInitLocal:100] De-Initialization Done for HOST !!! + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:181] Is kernel use failed, index: 0 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:182] kernel name: org.khronos.openvx.absdiff + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:230] Is image use failed, index: 2 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:278] Is error use failed, index: 0 + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! +APP: Deinit ... !!! +REMOTE_SERVICE: Deinit ... !!! +REMOTE_SERVICE: Deinit ... Done !!! +IPC: Deinit ... !!! +IPC: DeInit ... Done !!! +MEM: Deinit ... !!! +DDR_SHARED_MEM: Alloc's: 8 alloc's of 52633620 bytes +DDR_SHARED_MEM: Free's : 8 free's of 52633620 bytes +DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes +DDR_SHARED_MEM: Total size: 805306368 bytes +MEM: Deinit ... Done !!! +APP: Deinit ... Done !!! +root@p789-adcu1:/hirain/data/ti_dss_patch# + The modified source file is as follows vx_display_m2m_host.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "TI/tivx.h" +#include "tivx_hwa_kernels.h" +#include "tivx_kernel_display_m2m.h" +#include "TI/tivx_target_kernel.h" + +static vx_kernel vx_display_m2m_kernel = NULL; + +static vx_status VX_CALLBACK tivxAddKernelDisplayM2MValidate(vx_node node, + const vx_reference parameters[ ], + vx_uint32 num, + vx_meta_format metas[]); +static vx_status VX_CALLBACK tivxAddKernelDisplayM2MInitialize(vx_node node, + const vx_reference parameters[ ], + vx_uint32 num_params); +vx_status tivxAddKernelDisplayM2M(vx_context context); +vx_status tivxRemoveKernelDisplayM2M(vx_context context); + +static vx_status VX_CALLBACK tivxAddKernelDisplayM2MValidate(vx_node node, + const vx_reference parameters[ ], + vx_uint32 num, + vx_meta_format metas[]) +{ + vx_status status = (vx_status)VX_SUCCESS; + + vx_user_data_object configuration = NULL; + vx_char configuration_name[VX_MAX_REFERENCE_NAME]; + vx_size configuration_size; + tivx_display_m2m_params_t params; + + vx_image input = NULL; + vx_uint32 input_w; + vx_uint32 input_h; + vx_df_image input_fmt; + + vx_image output = NULL; + vx_uint32 output_w; + vx_uint32 output_h; + vx_df_image output_fmt; + + if ( (num != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "One or more REQUIRED parameters are set to NULL\n"); + } + + if ((vx_status)VX_SUCCESS == status) + { + configuration = (vx_user_data_object)parameters[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]; + input = (vx_image)parameters[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + output = (vx_image)parameters[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + } + + + /* PARAMETER ATTRIBUTE FETCH */ + + if ((vx_status)VX_SUCCESS == status) + { + tivxCheckStatus(&status, vxQueryUserDataObject(configuration, (vx_enum)VX_USER_DATA_OBJECT_NAME, &configuration_name, sizeof(configuration_name))); + tivxCheckStatus(&status, vxQueryUserDataObject(configuration, (vx_enum)VX_USER_DATA_OBJECT_SIZE, &configuration_size, sizeof(configuration_size))); + + tivxCheckStatus(&status, vxQueryImage(input, (vx_enum)VX_IMAGE_WIDTH, &input_w, sizeof(input_w))); + tivxCheckStatus(&status, vxQueryImage(input, (vx_enum)VX_IMAGE_HEIGHT, &input_h, sizeof(input_h))); + tivxCheckStatus(&status, vxQueryImage(input, (vx_enum)VX_IMAGE_FORMAT, &input_fmt, sizeof(input_fmt))); + + tivxCheckStatus(&status, vxQueryImage(output, (vx_enum)VX_IMAGE_WIDTH, &output_w, sizeof(output_w))); + tivxCheckStatus(&status, vxQueryImage(output, (vx_enum)VX_IMAGE_HEIGHT, &output_h, sizeof(output_h))); + tivxCheckStatus(&status, vxQueryImage(output, (vx_enum)VX_IMAGE_FORMAT, &output_fmt, sizeof(output_fmt))); + } + + /* PARAMETER CHECKING */ + + if ((vx_status)VX_SUCCESS == status) + { + if ((configuration_size != sizeof(tivx_display_m2m_params_t)) || + (strncmp(configuration_name, "tivx_display_m2m_params_t", sizeof(configuration_name)) != 0)) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "'configuration' should be a user_data_object of type:\n tivx_display_m2m_params_t \n"); + } + else + { + status = vxCopyUserDataObject(configuration, 0, sizeof(tivx_display_m2m_params_t), ¶ms, (vx_enum)VX_READ_ONLY, (vx_enum)VX_MEMORY_TYPE_HOST); + } + + if ((vx_status)VX_SUCCESS == status) + { + if(1U != params.numPipe) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "'configuration.numPipe' should be set to 1 as blending is not supported currently \n"); + } + } + + if( ((vx_df_image)VX_DF_IMAGE_RGB != input_fmt) && + ((vx_df_image)VX_DF_IMAGE_RGBX != input_fmt) && + ((vx_df_image)VX_DF_IMAGE_UYVY != input_fmt) && + ((vx_df_image)VX_DF_IMAGE_YUYV != input_fmt) && + ((vx_df_image)VX_DF_IMAGE_NV12 != input_fmt)) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "'input' should be an image of type:\n VX_DF_IMAGE_RGB or VX_DF_IMAGE_RGBX or VX_DF_IMAGE_UYVY or VX_DF_IMAGE_NV12 \n"); + } + + if( ((vx_df_image)VX_DF_IMAGE_RGB != output_fmt) && + ((vx_df_image)VX_DF_IMAGE_RGBX != output_fmt) && + ((vx_df_image)VX_DF_IMAGE_UYVY != output_fmt) && + ((vx_df_image)VX_DF_IMAGE_YUYV != output_fmt) && + ((vx_df_image)VX_DF_IMAGE_NV12 != output_fmt)) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "'output' should be an image of type:\n VX_DF_IMAGE_RGB or VX_DF_IMAGE_RGBX or VX_DF_IMAGE_UYVY or VX_DF_IMAGE_NV12 \n"); + } + + if (params.enable_deiniterleave) + { + if (input_fmt != output_fmt) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "Input and output formats must be same for de-interleaving\n"); + } + + if (((input_w % output_w) != 0) || + ((input_h % output_h) != 0) || + ((input_w % output_w) != (input_h % output_h))) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "Incorrect input/output size\n"); + } + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxAddKernelDisplayM2MInitialize(vx_node node, + const vx_reference parameters[ ], + vx_uint32 num_params) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxKernelValidRectParams prms; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == parameters[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + VX_PRINT(VX_ZONE_ERROR, "One or more REQUIRED parameters are set to NULL\n"); + } + if ((vx_status)VX_SUCCESS == status) + { + tivxKernelValidRectParams_init(&prms); + + prms.in_img[0U] = (vx_image)parameters[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + prms.out_img[0U] = (vx_image)parameters[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + prms.num_input_images = 1; + prms.num_output_images = 1; + + prms.top_pad = 0; + prms.bot_pad = 0; + prms.left_pad = 0; + prms.right_pad = 0; + prms.border_mode = VX_BORDER_UNDEFINED; + + status = tivxKernelConfigValidRect(&prms); + } + + return status; +} + +vx_status tivxAddKernelDisplayM2M(vx_context context) +{ + vx_kernel kernel; + vx_status status; + uint32_t index; + vx_enum kernel_id; + + status = vxAllocateUserKernelId(context, &kernel_id); + if(status != (vx_status)VX_SUCCESS) + { + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate user kernel ID\n"); + } + + if (status == (vx_status)VX_SUCCESS) + { + kernel = vxAddUserKernel( + context, + TIVX_KERNEL_DISPLAY_M2M_NAME, + kernel_id, + NULL, + TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS, + tivxAddKernelDisplayM2MValidate, + tivxAddKernelDisplayM2MInitialize, + NULL); + + status = vxGetStatus((vx_reference)kernel); + } + if (status == (vx_status)VX_SUCCESS) + { + index = 0; + + { + status = vxAddParameterToKernel(kernel, + index, + (vx_enum)VX_INPUT, + (vx_enum)VX_TYPE_USER_DATA_OBJECT, + (vx_enum)VX_PARAMETER_STATE_REQUIRED + ); + index++; + } + if (status == (vx_status)VX_SUCCESS) + { + status = vxAddParameterToKernel(kernel, + index, + (vx_enum)VX_INPUT, + (vx_enum)VX_TYPE_IMAGE, + (vx_enum)VX_PARAMETER_STATE_REQUIRED + ); + index++; + } + if (status == (vx_status)VX_SUCCESS) + { + status = vxAddParameterToKernel(kernel, + index, + (vx_enum)VX_OUTPUT, + (vx_enum)VX_TYPE_IMAGE, + (vx_enum)VX_PARAMETER_STATE_REQUIRED + ); + index++; + } + if (status == (vx_status)VX_SUCCESS) + { + /* add supported target's */ + tivxAddKernelTarget(kernel, TIVX_TARGET_DISPLAY_M2M1); + tivxAddKernelTarget(kernel, TIVX_TARGET_DISPLAY_M2M2); + tivxAddKernelTarget(kernel, TIVX_TARGET_DISPLAY_M2M3); + tivxAddKernelTarget(kernel, TIVX_TARGET_DISPLAY_M2M4); + } + if (status == (vx_status)VX_SUCCESS) + { + status = vxFinalizeKernel(kernel); + } + if (status != (vx_status)VX_SUCCESS) + { + vxReleaseKernel(&kernel); + kernel = NULL; + } + } + else + { + kernel = NULL; + } + vx_display_m2m_kernel = kernel; + + return status; +} + +vx_status tivxRemoveKernelDisplayM2M(vx_context context) +{ + vx_status status; + vx_kernel kernel = vx_display_m2m_kernel; + + status = vxRemoveKernel(kernel); + vx_display_m2m_kernel = NULL; + + return status; +} + +void tivx_display_m2m_params_init(tivx_display_m2m_params_t *prms) +{ + uint32_t loopCnt; + + prms->instId = 0U; + prms->numPipe = 1U; + for (loopCnt = 0U ; loopCnt < TIVX_DISPLAY_M2M_MAX_PIPE ; loopCnt++) + { + prms->pipeId[loopCnt] = 1U; + } + prms->overlayId = 0U; + + prms->enable_deiniterleave = 1u; +} + 3757.vx_display_m2m_target.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include "TI/tivx.h" +#include "VX/vx.h" +#include "TI/tivx_event.h" +#include "tivx_hwa_kernels.h" +#include "tivx_kernel_display_m2m.h" +#include "TI/tivx_target_kernel.h" +#include "tivx_kernels_target_utils.h" +#include "tivx_hwa_display_m2m_priv.h" + +#include +#include +#include +#include +#include + +#define DISPLAY_MAX_VALID_PLANES 2U + +#define DISPLAY_M2M_MAX_HANDLES (10) + +typedef struct +{ + /*! IDs=> 0: Write-back pipe-line1 */ + uint32_t instId; + /*! Number of pipe-lines used, should be set to '1' as blending is not supported currently */ + uint32_t numPipe; + /*! IDs=> 0:VID1, 1:VIDL1, 2:VID2 and 3:VIDL2 */ + uint32_t pipeId[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! IDs=> 0:Overlay1, 1:Overlay2, 2:Overlay3 and 3:Overlay4 */ + uint32_t overlayId; + /*! FVID2 display driver handle */ + Fvid2_Handle drvHandle; + /*! WB pipe create parameters */ + Dss_WbCreateParams createParams; + /*! WB pipe create status */ + Dss_WbCreateStatus createStatus; + /*! Callback parameters */ + Fvid2_CbParams cbParams; + /*! WB pipe status */ + Dss_WbStatus wbStatus; + /*! WB pipe configuration */ + Dss_WbPipeCfgParams wbCfg; + /*! WB pipe DMA configuration */ + CSL_DssWbPipeDmaCfg wbDmaCfg; + /*! WB pipe MFlag configuration */ + Dss_WbPipeMflagParams wbMflagCfg; + /*! WB pipe CSC configuration */ + CSL_DssCscCoeff wbCscCfg; + /*! Display pipe configuration */ + Dss_PipeCfgParams pipeCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe MFlag configuration */ + Dss_PipeMflagParams mFlagCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe CSC configuration */ + Dss_PipeCscParams cscCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display Overlay configuration */ + Dss_DctrlOverlayParams ovrCfg; + /*! Display Layer configuration */ + Dss_DctrlOverlayLayerParams layerCfg; + /*! Display Global configuration */ + Dss_DctrlGlobalDssParams globalParams; + /*! Mutex used for waiting for process completion */ + tivx_event waitForProcessCmpl; + /*! Display M2M Driver Input Frame List, used for providing + * an array of input frames */ + Fvid2_FrameList inFrmList; + /*! Display M2M Driver Output Frame List, used for providing + * an array of output frames */ + Fvid2_FrameList outFrmList; + /*! Display M2M Driver Input Frames */ + Fvid2_Frame inFrm[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display M2M Driver Output Frames */ + Fvid2_Frame outFrm[1U]; + +} tivxDisplayM2MDrvObj; + +typedef struct +{ + /*! IDs=> 0: Object free, 1: allocated */ + uint32_t isAlloc; + /*! Display M2M driver object */ + tivxDisplayM2MDrvObj drvObj; + /*! Display M2M Node create parameters provided by application */ + tivx_display_m2m_params_t createParams; + + uint32_t numOutImgs; +} tivxDisplayM2MParams; + +typedef struct +{ + tivx_mutex lock; + tivxDisplayM2MParams m2mObj[DISPLAY_M2M_MAX_HANDLES]; +} tivxDisplayM2MInstObj; + +static tivx_target_kernel vx_display_m2m_target_kernel1 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel2 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel3 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel4 = NULL; + +tivxDisplayM2MInstObj gTivxDispM2mInstObj; + +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut); + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj); + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj); + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData); + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format); + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj); +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj); + + +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_obj_desc_image_t *input_desc; + tivx_obj_desc_image_t *output_desc; + void *input_target_ptr, *input_target_ptr2 = NULL; + void *output_target_ptr, *output_target_ptr2 = NULL; + Fvid2_Frame *frm; + int32_t fvid2_status = FVID2_SOK; + uint32_t pipeIdx, iterCnt; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + + if((vx_status)VX_SUCCESS == status) + { + uint32_t size; + input_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + output_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "DISPLAY M2M: ERROR: Instance context is NULL!\r\n"); + } + } + + if((vx_status)VX_SUCCESS == status) + { + /* Update 'input_desc' to array from only single image input to + support blending i.e. more than 1 number of pipes. */ + input_target_ptr = tivxMemShared2TargetPtr(&input_desc->mem_ptr[0]); + VX_PRINT(VX_ZONE_INFO, "input_target_ptr = %p\n", input_target_ptr); + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + input_target_ptr2 = tivxMemShared2TargetPtr(&input_desc->mem_ptr[1]); + VX_PRINT(VX_ZONE_INFO, "input_target_ptr2 = %p\n", input_target_ptr2); + } + + for (iterCnt = 0u; iterCnt < prms->numOutImgs; iterCnt ++) + { + output_desc = (tivx_obj_desc_image_t *) + tivxGetObjDescElement(obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX],iterCnt); + + output_target_ptr = tivxMemShared2TargetPtr(&output_desc->mem_ptr[0]); + VX_PRINT(VX_ZONE_INFO, "output_target_ptr = %p\n", output_target_ptr); + + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + output_target_ptr2 = tivxMemShared2TargetPtr(&output_desc->mem_ptr[1]); + VX_PRINT(VX_ZONE_INFO, "output_target_ptr2 = %p\n", output_target_ptr2); + } + + /* call kernel processing function */ + + drvObj = &prms->drvObj; + /* Assign input buffer addresses */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = &drvObj->inFrm[pipeIdx]; + frm->addr[0U] = ((uint64_t)input_target_ptr) + + iterCnt*input_desc->imagepatch_addr[0].stride_y; + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + frm->addr[1U] = ((uint64_t)input_target_ptr2) + + iterCnt*input_desc->imagepatch_addr[1].stride_y; + } + } + + /* Assign output buffer addresses */ + frm = drvObj->outFrm; + frm->addr[0U] = (uint64_t)output_target_ptr; + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + frm->addr[1U] = (uint64_t)output_target_ptr2; + } + + /* Submit the request to the driver */ + fvid2_status = Fvid2_processRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + FVID2_TIMEOUT_FOREVER); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Submit Request\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Wait for Frame Completion */ + tivxEventWait(drvObj->waitForProcessCmpl, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + fvid2_status = Fvid2_getProcessedRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + status = (vx_status)VX_FAILURE; + } + } + } + + /* kernel processing function complete */ + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivx_obj_desc_user_data_object_t *configuration_desc; + tivx_obj_desc_image_t *obj_desc_imageIn, *obj_desc_imageOut; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + + configuration_desc = (tivx_obj_desc_user_data_object_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]; + obj_desc_imageIn = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + obj_desc_imageOut = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + if (configuration_desc->mem_size != sizeof(tivx_display_m2m_params_t)) + { + VX_PRINT(VX_ZONE_ERROR, "User data object size on target does not match the size on host, possibly due to misalignment in data structure\n"); + status = (vx_status)VX_FAILURE; + } + + prms = tivxDispM2mAllocObject(&gTivxDispM2mInstObj); + if (NULL == prms) + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + + /* Create Node object elements */ + if ((vx_status)VX_SUCCESS == status) + { + status = tivxDisplayM2MSetCreateParams(prms, + configuration_desc, + obj_desc_imageIn, + obj_desc_imageOut); + } + + /* Create sync events */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxEventCreate(&prms->drvObj.waitForProcessCmpl); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to allocate Event\n"); + } + } + + /* DSS M2M Driver create and configuration */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvCfg(&prms->drvObj); + } + + if ((vx_status)VX_SUCCESS == status) + { + tivxSetTargetKernelInstanceContext(kernel, prms, sizeof(tivxDisplayM2MParams)); + } + else + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + uint32_t size; + int32_t fvid2_status = FVID2_SOK; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, + &size); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: Could not obtain kernel instance context !!!\n"); + } + if(NULL == prms) + { + VX_PRINT(VX_ZONE_ERROR, "Kernel instance context is NULL!!!\n"); + status = (vx_status)VX_FAILURE; + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Stop Display M2M Driver */ + fvid2_status = Fvid2_stop(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 DSS M2M not stopped !!!\n"); + } + } + + + if ((vx_status)VX_SUCCESS == status) + { + /* Dequeue all the request from the driver */ + while ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_getProcessedRequest(prms->drvObj.drvHandle, + &prms->drvObj.inFrmList, + &prms->drvObj.outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + if (fvid2_status != FVID2_ENO_MORE_BUFFERS) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + } + status = (vx_status)VX_FAILURE; + } + } + if (fvid2_status == FVID2_ENO_MORE_BUFFERS) + { + status = (vx_status)VX_SUCCESS; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* print status */ + fvid2_status = Fvid2_control(prms->drvObj.drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &prms->drvObj.wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + printf( "==========================================================\r\n"); + printf( " Display M2M Status: Instance|%d\r\n", prms->drvObj.instId); + printf( "==========================================================\r\n"); + printf( " Queue Count: %d\r\n", prms->drvObj.wbStatus.queueCount); + printf( " De-queue Count: %d\r\n", prms->drvObj.wbStatus.dequeueCount); + printf( " Write-back Frames Count: %d\r\n", prms->drvObj.wbStatus.wbFrmCount); + printf( " Underflow Count: %d\r\n", prms->drvObj.wbStatus.underflowCount); + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete FVID2 handle */ + fvid2_status = Fvid2_delete(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 Delete Failed !!!\n"); + } + else + { + prms->drvObj.drvHandle = NULL; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete event */ + tivxEventDelete(&prms->drvObj.waitForProcessCmpl); + } + + if ((NULL != prms) && + (sizeof(tivxDisplayM2MParams) == size)) + { + tivxDispM2mFreeObject(&gTivxDispM2mInstObj, prms); + //tivxMemFree(prms, size, (vx_enum)TIVX_MEM_EXTERNAL); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + int32_t fvid2_status = FVID2_SOK; + uint32_t size; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_display_m2m_statistics_t *m2m_status_prms = NULL; + void *target_ptr; + tivx_obj_desc_user_data_object_t *usr_data_obj; + + status = tivxGetTargetKernelInstanceContext(kernel, (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || + (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + } + + if (status == (vx_status)VX_SUCCESS) + { + switch (node_cmd_id) + { + case TIVX_DISPLAY_M2M_GET_STATISTICS: + { + if (NULL != obj_desc[0]) + { + drvObj = &prms->drvObj; + fvid2_status = Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &drvObj->wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Update return status object */ + usr_data_obj = (tivx_obj_desc_user_data_object_t *)obj_desc[0U]; + target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr); + tivxCheckStatus(&status, + tivxMemBufferMap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + if (sizeof(tivx_display_m2m_statistics_t) == + usr_data_obj->mem_size) + { + m2m_status_prms = (tivx_display_m2m_statistics_t *)target_ptr; + m2m_status_prms->queueCount = + drvObj->wbStatus.queueCount; + m2m_status_prms->dequeueCount = + drvObj->wbStatus.dequeueCount; + m2m_status_prms->wbFrmCount = + drvObj->wbStatus.wbFrmCount; + m2m_status_prms->underflowCount = + drvObj->wbStatus.underflowCount; + } + else + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n"); + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + } + + tivxCheckStatus(&status, + tivxMemBufferUnmap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + } + } + else + { + VX_PRINT(VX_ZONE_ERROR, "User data object was NULL\n"); + status = (vx_status)VX_FAILURE; + } + break; + } + default: + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + return status; +} + +void tivxAddTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_FAILURE; + char target_name[TIVX_TARGET_MAX_NAME]; + vx_enum self_cpu; + + self_cpu = tivxGetSelfCpuId(); + + if ( self_cpu == (vx_enum)TIVX_CPU_ID_MCU2_0 ) + { + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M1, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel1 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M2, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel2 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M3, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel3 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M4, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel4 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + + status = tivxMutexCreate(&gTivxDispM2mInstObj.lock); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to create Mutex\n"); + } + else + { + memset(&gTivxDispM2mInstObj.m2mObj, 0x0, + sizeof(tivxDisplayM2MParams) * DISPLAY_M2M_MAX_HANDLES); + } + } +} + +void tivxRemoveTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_SUCCESS; + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel1); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel1 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel2); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel2 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel3); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel3 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel4); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel4 = NULL; + } + + if (NULL != gTivxDispM2mInstObj.lock) + { + tivxMutexDelete(&gTivxDispM2mInstObj.lock); + } +} + + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut) +{ + vx_status status = (vx_status)VX_SUCCESS; + void *cfgPtr; + tivx_display_m2m_params_t *createParams; + tivxDisplayM2MDrvObj *drvObj; + uint32_t pipeIdx, layerIdx, pitchIdx; + Dss_DispParams *dispParams; + CSL_DssWbPipeCfg *wbPipeCfg; + Dss_DctrlOverlayParams *ovrParams; + Dss_DctrlOverlayLayerParams *layerParams; + Fvid2_Frame *frm; + + cfgPtr = tivxMemShared2TargetPtr(&obj_desc->mem_ptr); + + tivxCheckStatus(&status, tivxMemBufferMap(cfgPtr, obj_desc->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); + + if (status == (vx_status)VX_SUCCESS) + { + createParams = (tivx_display_m2m_params_t *)cfgPtr; + memcpy(&prms->createParams, createParams, sizeof(tivx_display_m2m_params_t)); + drvObj = &prms->drvObj; + /* Set Driver object */ + drvObj->instId = createParams->instId; + drvObj->numPipe = createParams->numPipe; + drvObj->overlayId = createParams->overlayId; + memcpy(&drvObj->pipeId[0U], + &createParams->pipeId[0U], + sizeof(createParams->pipeId)); + + if (createParams->enable_deiniterleave) + { + tivx_obj_desc_t *obj_desc = (tivx_obj_desc_t *)obj_desc_imageOut; + + if((vx_enum)obj_desc->type==(vx_enum)TIVX_OBJ_DESC_OBJARRAY) + { + tivx_obj_desc_object_array_t *obj_desc_obj_array; + + obj_desc_obj_array = (tivx_obj_desc_object_array_t *)obj_desc; + + prms->numOutImgs = 4;//obj_desc_obj_array->num_items; + } + else + { + if ((vx_enum)TIVX_OBJ_DESC_INVALID != (vx_enum)obj_desc->scope_obj_desc_id) + { + tivx_obj_desc_object_array_t *parent_obj_desc = NULL; + + tivxGetObjDescList( + &obj_desc->scope_obj_desc_id, + (tivx_obj_desc_t**)&parent_obj_desc, 1); + + if (parent_obj_desc != NULL) + { + prms->numOutImgs = 4;//parent_obj_desc->num_items; + } + else + { + prms->numOutImgs = 4u; + } + } + else + { + prms->numOutImgs = 4u; + } + } + } + else + { + prms->numOutImgs = 4u; + } + } + /* Initialize driver object */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvStructsInit(drvObj); + } + + /* set driver object parameters */ + if (status == (vx_status)VX_SUCCESS) + { + /* Callback parameters */ + drvObj->cbParams.cbFxn = (Fvid2_CbFxn) (&tivxDisplayM2MCallback); + drvObj->cbParams.appData = drvObj; + drvObj->createParams.numPipe = drvObj->numPipe; + drvObj->createParams.overlayId = drvObj->overlayId; + /* Set Display pipeline parameters */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + dispParams = &drvObj->pipeCfg[pipeIdx].cfgParams; + drvObj->createParams.pipeId[pipeIdx] = drvObj->pipeId[pipeIdx]; + drvObj->pipeCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->mFlagCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->cscCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + dispParams->pipeCfg.pipeType = CSL_DSS_VID_PIPE_TYPE_VID; + dispParams->layerPos.startX = 0U; + dispParams->layerPos.startY = 0U; + dispParams->pipeCfg.scEnable = FALSE; + dispParams->alphaCfg.globalAlpha = 0xFFU; + dispParams->alphaCfg.preMultiplyAlpha = FALSE; + status = tivxDisplayExtractFvid2Format( + obj_desc_imageIn, + &dispParams->pipeCfg.inFmt); + if (status == (vx_status)VX_SUCCESS) + { + /* Set video pipe output frame dimensions same as input as + no scaling is done in video pipe-line */ + dispParams->pipeCfg.outWidth = dispParams->pipeCfg.inFmt.width; + dispParams->pipeCfg.outHeight = dispParams->pipeCfg.inFmt.height; + + if (createParams->enable_deiniterleave) + { + for (pitchIdx = 0; pitchIdx < 3; pitchIdx ++) + { + dispParams->pipeCfg.inFmt.pitch[pitchIdx] = + dispParams->pipeCfg.inFmt.pitch[pitchIdx] * prms->numOutImgs; + } + } + } + else + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + break; + } + } + + /* Set Display WB pipeline parameters */ + if (((vx_status)VX_SUCCESS == status) && (pipeIdx > 0)) + { + wbPipeCfg = &drvObj->wbCfg.pipeCfg; + /* Set WB pipe input frame dimensions same as video pipe input/output frame, + no scaling is done in video pipe, it will be done in WB pipe-line */ + wbPipeCfg->inFmt.width = dispParams->pipeCfg.outWidth; + wbPipeCfg->inFmt.height = dispParams->pipeCfg.outHeight; + wbPipeCfg->inPos.startX = 0U; + wbPipeCfg->inPos.startY = 0U; + status = tivxDisplayExtractFvid2Format(obj_desc_imageOut, + &wbPipeCfg->outFmt); + if (status != (vx_status)VX_SUCCESS) + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + status = (vx_status)VX_FAILURE; + } + else + { + if ((wbPipeCfg->inFmt.width != wbPipeCfg->outFmt.width) || + (wbPipeCfg->inFmt.height != wbPipeCfg->outFmt.height)) + { + wbPipeCfg->scEnable = TRUE; + } + } + } + + /* Set Display WB pipeline parameters */ + if ((vx_status)VX_SUCCESS == status) + { + ovrParams = &drvObj->ovrCfg; + ovrParams->overlayId = drvObj->overlayId; + ovrParams->colorbarEnable = FALSE; + ovrParams->overlayCfg.colorKeyEnable = FALSE; + ovrParams->overlayCfg.colorKeySel = CSL_DSS_OVERLAY_TRANS_COLOR_DEST; + ovrParams->overlayCfg.backGroundColor = 0xc8c800U; + + layerParams = &drvObj->layerCfg; + layerParams->overlayId = drvObj->overlayId; + /* Set all layer to invalid first and then update only used ones */ + for(layerIdx = 0U ; layerIdx < CSL_DSS_VID_PIPE_ID_MAX ; layerIdx++) + { + layerParams->pipeLayerNum[layerIdx] = CSL_DSS_OVERLAY_LAYER_INVALID; + } + + /* Currently blending is not supported so only one layer is used. + This code needs to updated when blending is supported. */ + layerParams->pipeLayerNum[drvObj->createParams.pipeId[0U]] = + CSL_DSS_OVERLAY_LAYER_NUM_0; + } + + /* Update frame-lists */ + if ((vx_status)VX_SUCCESS == status) + { + drvObj->inFrmList.numFrames = drvObj->numPipe; + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = (Fvid2_Frame *) &drvObj->inFrm[pipeIdx]; + frm->chNum = drvObj->createParams.pipeId[pipeIdx]; + drvObj->inFrmList.frames[pipeIdx] = frm; + } + + frm = (Fvid2_Frame *) &drvObj->outFrm[0U]; + drvObj->outFrmList.frames[0U] = frm; + drvObj->outFrmList.numFrames = 1U; + + } + } + + return status; +} + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + + /* Initialize driver create parameters */ + Dss_m2mCreateParamsInit(&drvObj->createParams); + /* Initialize driver call-back parameters */ + Fvid2CbParams_init(&drvObj->cbParams); + /* Initialize driver pipe configuration parameters */ + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + Dss_dispParamsInit(&drvObj->pipeCfg[loopCnt].cfgParams); + Dss_dispPipeMflagParamsInit(&drvObj->mFlagCfg[loopCnt].mFlagCfg); + CSL_dssCscCoeffInit(&drvObj->cscCfg[loopCnt].csc); + } + /* Initialize WB pipeline parameters */ + Dss_m2mPipeCfgParamsInit(&drvObj->wbCfg); + CSL_dssWbPipeDmaCfgInit(&drvObj->wbDmaCfg); + Dss_m2mMFlagParamsInit(&drvObj->wbMflagCfg); + CSL_dssCscCoeffInit(&drvObj->wbCscCfg); + Dss_m2mStatusInit(&drvObj->wbStatus); + + /* Initialize Display overlay parameters */ + Dss_dctrlOverlayParamsInit(&drvObj->ovrCfg); + Dss_dctrlOverlayLayerParamsInit(&drvObj->layerCfg); + + /* Initialize Display global parameters */ + Dss_dctrlGlobalDssParamsInit(&drvObj->globalParams); + + /* Initialize input and output frame lists */ + Fvid2FrameList_init(&drvObj->inFrmList); + Fvid2FrameList_init(&drvObj->outFrmList); + + return status; +} + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + int32_t fvid2_status = FVID2_SOK; + + /* Display M2M Driver create */ + drvObj->drvHandle = Fvid2_create(DSS_M2M_DRV_ID, + drvObj->instId, + &drvObj->createParams, + &drvObj->createStatus, + &drvObj->cbParams); + if((NULL == drvObj->drvHandle) || + (drvObj->createStatus.retVal != FVID2_SOK)) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Create Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + + /* Display M2M pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_PARAMS, + &drvObj->pipeCfg[loopCnt], + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_MFLAG_PARAMS, + &drvObj->mFlagCfg[loopCnt], + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M DISP IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + /* Display M2M overlay configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS, + &drvObj->ovrCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_LAYER_PARAMS, + &drvObj->layerCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Overlay IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M global configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_GLOBAL_DSS_PARAMS, + &drvObj->globalParams, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Global IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M write-back pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_PARAMS, + &drvObj->wbCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_MFLAG_PARAMS, + &drvObj->wbMflagCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_DMA_CFG, + &drvObj->wbDmaCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M WB IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Start Display M2M Driver */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_start(drvObj->drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Driver Start Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + return status; +} + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData) +{ + tivxDisplayM2MDrvObj *drvObj = (tivxDisplayM2MDrvObj *)(appData); + + if ((NULL != drvObj) && (drvObj->waitForProcessCmpl != NULL)) + { + tivxEventPost(drvObj->waitForProcessCmpl); + } + + return (vx_status)VX_SUCCESS; +} + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format) +{ + vx_status status = (vx_status)VX_SUCCESS; + + Fvid2Format_init(format); + format->width = obj_desc_img->imagepatch_addr[0].dim_x; + format->height = obj_desc_img->imagepatch_addr[0].dim_y; + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->scanFormat = FVID2_SF_PROGRESSIVE; + + switch (obj_desc_img->format) + { + case (vx_df_image)TIVX_DF_IMAGE_RGB565: + format->dataFormat = FVID2_DF_BGR16_565; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGB: + format->dataFormat = FVID2_DF_RGB24_888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGBX: + format->dataFormat = FVID2_DF_RGBX24_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)TIVX_DF_IMAGE_BGRX: + format->dataFormat = FVID2_DF_BGRX32_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_UYVY: + format->dataFormat = FVID2_DF_YUV422I_UYVY; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_YUYV: + format->dataFormat = FVID2_DF_YUV422I_YUYV; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_NV12: + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[1].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U16: + format->ccsFormat = FVID2_CCSF_BITS12_UNPACKED16; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U8: + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + default: + status = (vx_status)VX_FAILURE; + break; + } + + return status; +} + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj) +{ + uint32_t cnt; + tivxDisplayM2MParams *m2mObj = NULL; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (0U == instObj->m2mObj[cnt].isAlloc) + { + m2mObj = &instObj->m2mObj[cnt]; + memset(m2mObj, 0x0, sizeof(tivxDisplayM2MParams)); + instObj->m2mObj[cnt].isAlloc = 1U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); + + return (m2mObj); +} + +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj) +{ + uint32_t cnt; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (m2mObj == &instObj->m2mObj[cnt]) + { + m2mObj->isAlloc = 0U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); +} + main_linux_arm.c /* + * + * Copyright (c) 2017 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +FILE *fp_src_img = NULL; +char file_name[20] = "file_name"; +FILE *fp_dst_img[4] = {0}; +uint32_t payload = 0; + +void *virt_addr1 = NULL; +void *virt_addr2 = NULL; +uint64_t phys_addr1 = 0; +uint64_t phys_addr2 = 0; +uint8_t *src_buf = NULL, *dest_buf = NULL; +uint32_t width = 1280U; +uint32_t pitch = 4U*2*1280U; +uint32_t height = 1285U; +uint32_t size = 0; + +uint8_t *image_test = NULL; + +void timer_print_start(int task_id) +{ + struct timeval tv1; + gettimeofday(&tv1, NULL); + printf("DSS_M2M: task id %d start_time %ld s %ld us\n", task_id, tv1.tv_sec, tv1.tv_usec); +} + +void timer_print_stop(int task_id) +{ + struct timeval tv1; + gettimeofday(&tv1, NULL); + printf("DSS_M2M: task id %d stop_time %ld s %ld us\n", task_id, tv1.tv_sec, tv1.tv_usec); +} + +int main(int argc, char *argv[]) +{ + int status = 0; + width = 1280U; + pitch = 4U*2*1280U; + height = 1285U; + size = pitch*height; + + status = appInit(); + + if(status==0) + { + //int app_multi_cam_main(int argc, char* argv[]); + + //status = app_multi_cam_main(argc, argv); + { + extern void main_dss_m2m_test(); + + virt_addr1 = appMemAlloc(APP_MEM_HEAP_DDR, size, 0); + virt_addr2 = appMemAlloc(APP_MEM_HEAP_DDR, size, 0); + + if (virt_addr1 == NULL || virt_addr2 == NULL) + { + printf("UDMA: MEM alloc fail !"); + } + + src_buf = (uint8_t*)virt_addr1; + dest_buf = (uint8_t*)virt_addr2; + fp_src_img = fopen("img_raw.yuv", "r"); + fread(src_buf, width*pitch, 1, fp_src_img); + //system("sync"); + sleep(2); + main_dss_m2m_test(); + #if 0 + timer_print_start(7); + for(int j = 0; j < 4; j++) + { + for(int i = 0; i < height; i++) + { + memcpy(&dest_buf[j*width*2U*height + i*width*2U], &src_buf[j*width*2U + i*pitch], width*2U); + } + } + timer_print_stop(7); + #endif + //system("sync"); + sleep(2); + for(int i = 0; i < 4; i++) + { + sprintf(file_name, "img_raw_ch%d.yuv", i); + fp_dst_img[i] = fopen(file_name, "w"); + fwrite(&dest_buf[i*width*height*2U], width*height*2U, 1, fp_dst_img[i]); + } + + } + + + + appDeInit(); + } + + return status; +} + test_display_m2m.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include +#include "test_engine/test.h" +#include +#include +#include +#include +#include "math.h" +#include +#include +#include "test_tiovx/test_tiovx.h" +#include "test_hwa_common.h" + + +#define TIVX_TARGET_DEFAULT_STACK_SIZE (256U * 1024U) +#define TIVX_TARGET_DEFAULT_TASK_PRIORITY1 (8u) + +#define DSS_M2M_NUM_CH (1U) +#define DSS_M2M_NUM_CH_MAX (4U) + +/* Common Configurations across channels */ +#define DSS_M2M_WB_PIPE_INST_ID (0U) +#define DSS_M2M_PIPE_NUM (1U) +#define DSS_M2M_PIPE_INST_ID (3U) +/* Currently Only Overlay2 can be used for M2M operations, + this can be changed through DSS initialization API available in vision_apps */ +#define DSS_M2M_OVERLAY_ID (3U) + +/* Channel 0 configurations */ +#define DSS_M2M_CH0_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH0_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH0_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH0_IN_FRAME_BPP (2U) +#define DSS_M2M_CH0_IN_FRAME_PITCH (DSS_M2M_CH0_IN_FRAME_WIDTH * \ + DSS_M2M_CH0_IN_FRAME_BPP * 4) +#define DSS_M2M_CH0_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH0_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH0_OUT_FRAME_HEIGHT (1285U) + +/* Channel 1 configurations */ +#define DSS_M2M_CH1_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH1_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH1_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH1_IN_FRAME_BPP (2U) +#define DSS_M2M_CH1_IN_FRAME_PITCH (DSS_M2M_CH1_IN_FRAME_WIDTH * \ + DSS_M2M_CH1_IN_FRAME_BPP * 4) +#define DSS_M2M_CH1_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH1_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH1_OUT_FRAME_HEIGHT (1285U) + +/* Channel 2 configurations */ +#define DSS_M2M_CH2_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH2_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH2_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH2_IN_FRAME_BPP (2U) +#define DSS_M2M_CH2_IN_FRAME_PITCH (DSS_M2M_CH2_IN_FRAME_WIDTH * \ + DSS_M2M_CH2_IN_FRAME_BPP * 4) +#define DSS_M2M_CH2_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH2_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH2_OUT_FRAME_HEIGHT (1285U) + +/* Channel 3 configurations */ +#define DSS_M2M_CH3_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH3_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH3_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH3_IN_FRAME_BPP (2U) +#define DSS_M2M_CH3_IN_FRAME_PITCH (DSS_M2M_CH3_IN_FRAME_WIDTH * \ + DSS_M2M_CH3_IN_FRAME_BPP * 4) +#define DSS_M2M_CH3_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH3_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH3_OUT_FRAME_HEIGHT (1285U) + +#define DSS_M2M_NODE_NAME_LEN_MAX (100U) + +/* Preloaded image buffers */ +/* 1920 x 1080 buffers */ +extern uint32_t gTiovxCtDisplayArrayBGR888[1555200]; +extern uint32_t gTiovxCtDisplayArrayYUV420NV12[777600]; +extern uint32_t gTiovxCtDisplayArrayYUV422[1036800]; + +TESTCASE(tivxHwaDisplayM2M, CT_VXContext, ct_setup_vx_context, 0) + +typedef struct { + uint32_t taskId; + uint32_t instId; + uint32_t numPipe; + uint32_t pipeId[TIVX_DISPLAY_M2M_MAX_PIPE]; + uint32_t overlayId; + vx_df_image inFmt; + uint32_t inWidth; + uint32_t inHeight; + uint32_t inBpp; + uint32_t inPitch; + vx_df_image outFmt; + uint32_t outWidth; + uint32_t outHeight; + uint32_t posX; + uint32_t posY; + tivx_event eventHandle_TaskFinished; + tivx_task taskHandle_m2m; + tivx_task_create_params_t taskParams_m2m; + char nodeName[DSS_M2M_NODE_NAME_LEN_MAX]; + uint32_t iterationCnt; +} tivx_display_m2m_test_params_t; + +typedef struct { + const char* name; + uint32_t Width; + uint32_t Height; + uint32_t loopCount; +} Arg; + +#define ADD_WIDTH(testArgName, nextmacro, ...) \ + CT_EXPAND(nextmacro(testArgName "/Width=1920", __VA_ARGS__, 1920)) +#define ADD_HEIGHT(testArgName, nextmacro, ...) \ + CT_EXPAND(nextmacro(testArgName "/Height=1080", __VA_ARGS__, 1080)) +#define ADD_LOOP_1000(testArgName, nextmacro, ...) \ + CT_EXPAND(nextmacro(testArgName "/loopCount=1000", __VA_ARGS__, 1000)) + +#define PARAMETERS \ + CT_GENERATE_PARAMETERS("DisplayM2M", ADD_WIDTH, ADD_HEIGHT, ADD_LOOP_1000 ,ARG), \ + +static vx_context context; +static uint32_t gLoop_cnt; +tivx_display_m2m_test_params_t gTestParams[DSS_M2M_NUM_CH_MAX]; +extern uint8_t *src_buf, *dest_buf; + +static void VX_CALLBACK tivxTask_m2m(void *app_var) +{ + vx_node m2m_node = 0; + vx_image in_image = 0; + vx_image out_image = 0; + vx_user_data_object m2m_config; + tivx_display_m2m_params_t local_m2m_config; + uint32_t wbFrmCnt = 0U; + vx_graph_parameter_queue_params_t m2m_graph_parameters_queue_params_list[1]; + vx_map_id map_id; + vx_int32 i,j; + vx_imagepatch_addressing_t addr; + uint16_t *ptr = NULL; + vx_imagepatch_addressing_t image_addr; + vx_rectangle_t rect; + vx_graph m2m_graph = 0; + tivx_display_m2m_test_params_t *testParams = + (tivx_display_m2m_test_params_t *)app_var; + uint32_t status = 0; + + vx_imagepatch_addressing_t image_addr_from_file, image_addr_from_file2; + vx_rectangle_t rect_from_file; + vx_map_id map_id1, map_id2; + void *data_ptr1, *data_ptr2; + + ASSERT_VX_OBJECT(m2m_graph = vxCreateGraph(context), VX_TYPE_GRAPH); + + printf("Graph %d: created...\n", testParams->taskId); + + /* allocate Input and Output frame refs */ + ASSERT_VX_OBJECT(in_image = vxCreateImage(context, + testParams->inWidth, + testParams->inHeight, + testParams->inFmt), + VX_TYPE_IMAGE); + ASSERT_VX_OBJECT(out_image = vxCreateImage(context, + testParams->outWidth, + testParams->outHeight, + testParams->outFmt), + VX_TYPE_IMAGE); + + vx_object_array out_img_array = vxCreateObjectArray(context, (vx_reference)out_image, 4); + vxReleaseImage(&out_image); + + out_image = (vx_image)vxGetObjectArrayItem(out_img_array, 0); + + printf("Graph %d: input and output images created...\n", testParams->taskId); + + image_addr.dim_x = testParams->inWidth; + image_addr.dim_y = testParams->inHeight; + image_addr.stride_x = testParams->inBpp; + image_addr.stride_y = testParams->inPitch; + image_addr.scale_x = VX_SCALE_UNITY; + image_addr.scale_y = VX_SCALE_UNITY; + image_addr.step_x = 1; + image_addr.step_y = 1; + rect.start_x = 0; + rect.start_y = 0; + rect.end_x = testParams->inWidth; + rect.end_y = testParams->inHeight; + printf("Graph %d: input and output images created 2 ...\n", testParams->taskId); + printf("%d\n", __LINE__); + tivxTaskWaitMsecs(1000); + /* Copy reference input image to input buffer */ + if (testParams->inFmt == VX_DF_IMAGE_RGB) + { + vxCopyImagePatch(in_image, + &rect, + 0, + &image_addr, + (void *)gTiovxCtDisplayArrayBGR888, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST); + } + else if (testParams->inFmt == VX_DF_IMAGE_YUYV) + { + vxCopyImagePatch(in_image, + &rect, + 0, + &image_addr, + (void *)gTiovxCtDisplayArrayYUV422, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST); + } + else if (testParams->inFmt == VX_DF_IMAGE_UYVY) + { + rect_from_file.start_x = 0; + rect_from_file.start_y = 0; + rect_from_file.end_x = testParams->inWidth; + rect_from_file.end_y = testParams->inHeight; + /* Update input buffer here for other formats */ + status = vxMapImagePatch(in_image, + &rect_from_file, + 0, + &map_id1, + &image_addr_from_file, + &data_ptr1, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST, + VX_NOGAP_X); + if(status != 0) + { + printf("vxMapImagePatch failed. \n"); + } + printf("%d\n", __LINE__); + memcpy(data_ptr1, &src_buf[1280U*2U*testParams->taskId], 1280U*2U*(1285U*4U - testParams->taskId)); + + } + printf("%d\n", __LINE__); + /* DSS M2M initialization */ + tivx_display_m2m_params_init(&local_m2m_config); + local_m2m_config.instId = testParams->instId; + /* Only one pipeline is supported */ + local_m2m_config.numPipe = testParams->numPipe; + local_m2m_config.pipeId[0U] = testParams->pipeId[0U]; + local_m2m_config.overlayId = testParams->overlayId; + + ASSERT_VX_OBJECT(m2m_config = vxCreateUserDataObject(context, + "tivx_display_m2m_params_t", + sizeof(tivx_display_m2m_params_t), + &local_m2m_config), + (enum vx_type_e)VX_TYPE_USER_DATA_OBJECT); + printf("%d\n", __LINE__); + ASSERT_VX_OBJECT(m2m_node = tivxDisplayM2MNode(m2m_graph, m2m_config, in_image, out_image), VX_TYPE_NODE); + printf("%d\n", __LINE__); + VX_CALL(vxSetNodeTarget(m2m_node, VX_TARGET_STRING, &testParams->nodeName[0U])); + printf("%d\n", __LINE__); + // printf("Added \'%s\' node in graph %d\n", &testParams->nodeName[0U], testParams->taskId); + + // printf("Graph %d: verifying...\n", testParams->taskId); + + // VX_CALL(vxVerifyGraph(m2m_graph)); + + // printf("Graph %d: verify done...\n", testParams->taskId); + + { + extern void timer_print_start(int task_id); + timer_print_start(testParams->taskId); + } + + //for (wbFrmCnt = 0U ; wbFrmCnt < testParams->iterationCnt ; wbFrmCnt++) + { + VX_CALL(vxProcessGraph(m2m_graph)); + } + printf("%d\n", __LINE__); + { + extern void timer_print_stop(int task_id); + timer_print_stop(testParams->taskId); + } + + { + for(int i = 0; i < 4; i++) + { + out_image = (vx_image)vxGetObjectArrayItem(out_img_array, i); + rect_from_file.start_x = 0; + rect_from_file.start_y = 0; + rect_from_file.end_x = testParams->outWidth; + rect_from_file.end_y = testParams->outHeight; + /* Update input buffer here for other formats */ + status = vxMapImagePatch(out_image, + &rect_from_file, + 0, + &map_id2, + &image_addr_from_file2, + &data_ptr2, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST, + VX_NOGAP_X); + if(status != 0) + { + printf("vxMapImagePatch failed 2. \n"); + } + memcpy(&dest_buf[1280U*1285U*2U*i], data_ptr2, 1280U*1285U*2U); + } + + } + + VX_CALL(vxReleaseNode(&m2m_node)); + VX_CALL(vxReleaseImage(&in_image)); + VX_CALL(vxReleaseImage(&out_image)); + VX_CALL(vxReleaseUserDataObject(&m2m_config)); + + VX_CALL(vxReleaseGraph(&m2m_graph)); + + /*Signal the completion of m2m graph processing*/ + tivxEventPost(testParams->eventHandle_TaskFinished); +} + +TEST_WITH_ARG(tivxHwaDisplayM2M, tivxHwaDisplayM2Mtest, Arg, PARAMETERS) +{ + + context = context_->vx_context_; + uint32_t taskIdx; + tivx_display_m2m_test_params_t *testParams; + uint32_t createTask = 0U; + + printf("Starting Display M2M Conformance Test...\n"); + + /* Initialize global test parameters structure to '0' */ + memset(&gTestParams[0U], 0, sizeof(gTestParams)); + + ASSERT(vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_DISPLAY_M2M1)); + + { + tivxHwaLoadKernels(context); + CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT); + + tivx_set_debug_zone(VX_ZONE_INFO); + + gLoop_cnt = arg_->loopCount; + + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + createTask = 0U; + testParams = &gTestParams[taskIdx]; + testParams->taskId = taskIdx; + ASSERT_EQ_VX_STATUS(VX_SUCCESS, tivxEventCreate(&testParams->eventHandle_TaskFinished)); + testParams->instId = DSS_M2M_WB_PIPE_INST_ID; + testParams->numPipe = DSS_M2M_PIPE_NUM; + /* Note: Directly assigning as only one pipe is supported currently */ + testParams->pipeId[0U] = DSS_M2M_PIPE_INST_ID; + testParams->overlayId = DSS_M2M_OVERLAY_ID; + testParams->inFmt = DSS_M2M_CH0_IN_FRAME_FORMAT; + testParams->iterationCnt = (gLoop_cnt / (taskIdx + 1U)); + switch (taskIdx) + { + case 0U: + /* Initialize test parameters for task 0 */ + createTask = 1U; + testParams->inWidth = DSS_M2M_CH0_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH0_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH0_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH0_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH0_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH0_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH0_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M1); + break; + case 1U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH1_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH1_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH1_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH1_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH1_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH1_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH1_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH1_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M2); + break; + case 2U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH2_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH2_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH2_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH2_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH2_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH2_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH2_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH2_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M3); + break; + case 3U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH3_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH3_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH3_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH3_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH3_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH3_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH3_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH3_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M4); + break; + default: + break; + } + if (createTask == 1U) + { + /* Setting up task params for m2m_task */ + tivxTaskSetDefaultCreateParams(&testParams->taskParams_m2m); + testParams->taskParams_m2m.task_main = &tivxTask_m2m; + testParams->taskParams_m2m.app_var = testParams; + testParams->taskParams_m2m.stack_ptr = NULL; + testParams->taskParams_m2m.stack_size = TIVX_TARGET_DEFAULT_STACK_SIZE; + testParams->taskParams_m2m.core_affinity = TIVX_TASK_AFFINITY_ANY; + testParams->taskParams_m2m.priority = TIVX_TARGET_DEFAULT_TASK_PRIORITY1; + + printf("Creating Task %d...\n", testParams->taskId); + /* Create Tasks */ + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxTaskCreate(&testParams->taskHandle_m2m, + &testParams->taskParams_m2m)); + } + } + + /* wait here for all tasks to finish */ + printf("Waiting for graphs to finish execution...\n"); + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + tivxEventWait(testParams->eventHandle_TaskFinished, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + printf("Received events from Task%d\n", testParams->taskId); + } + + /* Delete tasks and sync events */ + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxTaskDelete(&testParams->taskHandle_m2m)); + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxEventDelete(&testParams->eventHandle_TaskFinished)); + } + + tivxHwaUnLoadKernels(context); + + tivx_set_debug_zone(VX_ZONE_INFO); + } + + printf("Display M2M Conformance Test Finished...\n"); +} + +TESTCASE_TESTS(tivxHwaDisplayM2M, + tivxHwaDisplayM2Mtest) + + + +void main_dss_m2m_test() +{ + //context = context_->vx_context_; + uint32_t taskIdx; + tivx_display_m2m_test_params_t *testParams; + uint32_t createTask = 0U; + uint32_t status = 0; + + /* Create OpenVx Context */ + context = vxCreateContext(); + status = vxGetStatus((vx_reference)context); + printf("Creating context done status : %d!\n", status); + + printf("Starting Display M2M Conformance Test...\n"); + + /* Initialize global test parameters structure to '0' */ + memset(&gTestParams[0U], 0, sizeof(gTestParams)); + + ASSERT(vx_true_e == tivxIsTargetEnabled(TIVX_TARGET_DISPLAY_M2M1)); + + { + tivxHwaLoadKernels(context); + //CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT); + printf("Starting Display M2M Conformance Test 2...\n"); + tivx_set_debug_zone(VX_ZONE_INFO); + + //gLoop_cnt = arg_->loopCount; + gLoop_cnt = 1; + + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + createTask = 0U; + testParams = &gTestParams[taskIdx]; + testParams->taskId = taskIdx; + ASSERT_EQ_VX_STATUS(VX_SUCCESS, tivxEventCreate(&testParams->eventHandle_TaskFinished)); + testParams->instId = DSS_M2M_WB_PIPE_INST_ID; + testParams->numPipe = DSS_M2M_PIPE_NUM; + /* Note: Directly assigning as only one pipe is supported currently */ + testParams->pipeId[0U] = DSS_M2M_PIPE_INST_ID; + testParams->overlayId = DSS_M2M_OVERLAY_ID; + testParams->inFmt = DSS_M2M_CH0_IN_FRAME_FORMAT; + testParams->iterationCnt = gLoop_cnt; + switch (taskIdx) + { + case 0U: + /* Initialize test parameters for task 0 */ + createTask = 1U; + testParams->inWidth = DSS_M2M_CH0_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH0_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH0_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH0_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH0_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH0_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH0_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M1); + break; + case 1U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH1_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH1_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH1_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH1_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH1_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH1_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH1_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH1_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M2); + break; + case 2U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH2_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH2_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH2_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH2_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH2_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH2_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH2_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH2_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M3); + break; + case 3U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH3_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH3_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH3_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH3_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH3_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH3_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH3_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH3_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M4); + break; + default: + break; + } + if (createTask == 1U) + { + /* Setting up task params for m2m_task */ + tivxTaskSetDefaultCreateParams(&testParams->taskParams_m2m); + testParams->taskParams_m2m.task_main = &tivxTask_m2m; + testParams->taskParams_m2m.app_var = testParams; + testParams->taskParams_m2m.stack_ptr = NULL; + testParams->taskParams_m2m.stack_size = TIVX_TARGET_DEFAULT_STACK_SIZE; + testParams->taskParams_m2m.core_affinity = TIVX_TASK_AFFINITY_ANY; + testParams->taskParams_m2m.priority = TIVX_TARGET_DEFAULT_TASK_PRIORITY1; + + printf("Creating Task %d...\n", testParams->taskId); + /* Create Tasks */ + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxTaskCreate(&testParams->taskHandle_m2m, + &testParams->taskParams_m2m)); + } + } + + /* wait here for all tasks to finish */ + printf("Waiting for graphs to finish execution...\n"); + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + tivxEventWait(testParams->eventHandle_TaskFinished, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + printf("Received events from Task%d\n", testParams->taskId); + } + + /* Delete tasks and sync events */ + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxTaskDelete(&testParams->taskHandle_m2m)); + ASSERT_EQ_VX_STATUS(VX_SUCCESS, + tivxEventDelete(&testParams->eventHandle_TaskFinished)); + } + + tivxHwaUnLoadKernels(context); + + tivx_set_debug_zone(VX_ZONE_INFO); + } + + printf("Display M2M Conformance Test Finished...\n"); +} + +the log after adding buff address the log when deinterleave is enabled +A72： +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +294 + + + + +MCU20： +root@p789-adcu1:/hirain/data# ./vx_app_arm_remote_log.out + +[MCU2_0] 53.554546 s: dmTimer : timer count is 0. + +[MCU2_0] 58.298841 s: Output Buffer Luma=0xba5c0000 Chroma=0x0 + +[MCU2_0] 58. the log when deinterleave is disabled A72： +root@p789-adcu1:/hirain/data/ti_dss_patch# ls -l +total 40304 +-rw-r--r-- 1 root root 13158400 Nov 15 2023 img_raw.yuv +-rw-r--r-- 1 root root 28054632 Nov 15 05:17 libtivision_apps.so.8.4.0 +-rwxr-xr-x 1 root root 45720 Nov 15 05:17 vx_app_multi_cam.out +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +294 +298 +312 +314 +316 +DSS_M2M: task id 0 start_time 1699996730 s 938252 us + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelValidate:241] Validating kernel com.ti.hwa.displaym2m + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:523] Calling create callback for node node_91 + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:529] Create callback for node node_91 completed + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:578] kernel init for node 0, kernel com.ti.hwa.displaym2m ... + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:589] kernel init for node 0, kernel com.ti.hwa.displaym2m ... done !!! + 0.000000 s: VX_ZONE_INFO:[ownGraphScheduleGraph:764] Scheduling Graph (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelSchedule:627] Scheduling Node (node=12, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownCheckGraphCompleted:677] Graph Completed (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownCheckGraphCompleted:705] All Graphs Completed +334 +DSS_M2M: task id 0 stop_time 1699996730 s 955180 us + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed +Received events from Task0 + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_nf_generic destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_nf_bilateral destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dmpac_sde destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_ldc destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_msc_multi_scale destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_msc_pyramid destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dmpac_dof destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.dof_visualize destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.vpac_viss destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.display destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.capture destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.csitx destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:[ownDestructKernel:44] Kernel com.ti.hwa.displaym2m destructor called (removed from context) + 0.000000 s: VX_ZONE_INFO:Enabled +Display M2M Conformance Test Finished... + 0.000000 s: VX_ZONE_INIT:[tivxHostDeInitLocal:100] De-Initialization Done for HOST !!! + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:181] Is kernel use failed, index: 0 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:182] kernel name: org.khronos.openvx.absdiff + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:230] Is image use failed, index: 2 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:278] Is error use failed, index: 0 + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INFO:[tivxQueueDelete:182] if this hangs, please ensure all application threads have been destroyed + 0.000000 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! +APP: Deinit ... !!! +REMOTE_SERVICE: Deinit ... !!! +REMOTE_SERVICE: Deinit ... Done !!! +IPC: Deinit ... !!! +IPC: DeInit ... Done !!! +MEM: Deinit ... !!! +DDR_SHARED_MEM: Alloc's: 8 alloc's of 52633620 bytes +DDR_SHARED_MEM: Free's : 8 free's of 52633620 bytes +DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes +DDR_SHARED_MEM: Total size: 805306368 bytes +MEM: Deinit ... Done !!! +APP: Deinit ... Done !!! +root@p789-adcu1:/hirain/data/ti_dss_patch# + + + +MCU20： +root@p789-adcu1:/hirain/data# +root@p789-adcu1:/hirain/data# +root@p789-adcu1:/hirain/data# ./vx_app_arm_remote_log.out + +[MCU2_0] 153.465506 s: dmTimer : timer count is 0. + +[MCU2_0] 154.549665 s: Iteration0 Input Buffer Luma=0xb9920000 Chroma=0x0 + +[MCU2_0] 154.549757 s: Output Buffer Luma=0xba5c0000 Chroma=0x0 + +[MCU2_0] 154.567895 s: ========================================================== + +[MCU2_0] 154.567997 s: Display M2M Status: Instance|0 + +[MCU2_0] 154.568029 s: ========================================================== + +[MCU2_0] 154.568072 s: Queue Count: 1 + +[MCU2_0] 154.568135 s: Write-back Frames Count: 1 + +[MCU2_0] 154.568169 s: Underflow Count: 0 + +[MCU2_0] 158.465509 s: dmTimer : timer count is 0. + +Hi, I think somehow numPipe is becoming is 0, because i dont see print in the input buffer. This parameter is set from the input numPipe parameter in the createParams. So can you please check and make sure that numPIpe is set to correct value in the application? Regards, Brijesh + +hi The value of numPipe is defined by macros in test_display_m2m.c, which we haven't changed, so we shouldn't use the default value, right? So what should it be + +Hi, Do you have JTAG to connect to the board using CCS? If not, can we please try to figure out where it is becoming 0? Maybe please add some print statement in tivxDisplayM2MCreate API to see where it is becoming 0? Regards, Brijesh + +hi Can you provide the location of some key code for adding print debugging + +hi After I reduced the print cycle of remotelog from 10ms to 1ms, we can see the print of input buff, so we didn't see it before because the log cycle was too long, not a program bug the modefi as follow the log when deinterleave is disabled +A72： +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +294 + + + + + +MCU20： + +root@p789-adcu1:/hirain/data# ./vx_app_arm_remote_log_1ms.out +[MCU2_0] 33.502204 s: dmTimer : timer count is 0. +[MCU2_0] 38.502209 s: dmTimer : timer count is 0. +[MCU2_0] 43.502213 s: dmTimer : timer count is 0. +[MCU2_0] 43.535382 s: Iteration0 Input Buffer Luma=0xb9920000 Chroma=0x0 +[MCU2_0] 43.535472 s: tivxDisplayM2MProcess pipeIdx 1 drvObj->numPipe 1 +[MCU2_0] 43.5355 + +hongyao.jin said: the log when deinterleave is disabled Can you please also share the log with deinterleave is enabled? Because that's what we want to debug. Regards, Brijesh + +hi We get more logs through CCS and gdb, But when the program crashes, CCS prompts that the connection to the CPU is disconnected and we can't see anything anymore the log when deinterleave is enabled +A72: +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# gdb vx_app_multi_cam.out +GNU gdb (GDB) 9.1 +Copyright (C) 2020 Free Software Foundation, Inc. +License GPLv3+: GNU GPL version 3 or later +This is free software: you are free to change and redistribute it. +There is NO WARRANTY, to the extent permitted by law. +Type "show copying" and "show warranty" for details. +This GDB was configured as "aarch64-linux". +Type "show configuration" for configuration details. +For bug reporting instructions, please see: +. +Find the GDB manual and other documentation resources online at: + . + +For help, type "help". +Type "apropos word" to search for commands related to "word"... +Reading symbols from vx_app_multi_cam.out... +(gdb) r +Starting program: /hirain/data/ti_dss_patch/vx_app_multi_cam.out +warning: File "/lib/libthread_db-1.0.so" auto-loading has been declined by your `auto-load safe-path' set to "$debugdir:$datadir/auto-load". +To enable execution of this file add + add-auto-load-safe-path /lib/libthread_db-1.0.so +line to your configuration file "/home/root/.gdbinit". +To completely disable this security protection add + set auto-load safe-path / +line to your configuration file "/home/root/.gdbinit". +For more information about this security protection see the +"Auto-loading safe path" section in the GDB manual. E.g., run from the shell: + info "(gdb)Auto-loading safe path" +warning: Unable to find libthread_db matching inferior's thread library, thread debugging will not be available. +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +[New LWP 1073] +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled +[New LWP 1074] +[New LWP 1075] +[New LWP 1076] +[New LWP 1077] + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +[New LWP 1078] +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +Waiting for graphs to finish execution... +294 +298 +312 +314 +316 +DSS_M2M: task id 0 start_time 1699996630 s 261787 us + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelValidate:241] Validating kernel com.ti.hwa.displaym2m + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:523] Calling create callback for node node_91 + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:529] Create callback for node node_91 completed + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:578] kernel init for node 0, kernel com.ti.hwa.displaym2m ... + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:589] kernel init for node 0, kernel com.ti.hwa.displaym2m ... done !!! + 0.000000 s: VX_ZONE_INFO:[ownGraphScheduleGraph:764] Scheduling Graph (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelSchedule:627] Scheduling Node (node=12, pipe=0) + + + + + +MCU20: + +[MCU2_0] 127.414887 s: Iteration0 Input Buffer Luma=0xb9920000 Chroma=0x0 +[MCU2_0] 127.414978 s: tivxDisplayM2MProcess pipeIdx 1 drvObj->numPipe 1 +[MCU2_0] 127.415024 s: Output Buffer Luma=0xba5c0000 Chroma=0x0 + +And we found through debugging, when iterCnt<1 the program runs normally, but when iterCnt<2, the program crashes + +Hi, Can you please go inside this API tivxGetObjDescElement and see where exactly it crashes on the second iteration? or if it does not crash here, can you please go further in their API to figure out where it crashes? Since second iteration print did not come, i think it crashed either in tivxGetObjDescElement or in tivxMemShared2TargetPtr API call. Can you please share some more information here? Regards, Brijesh + +hi Currently we are debugging and suspect that the program crashed at Fvid2_processRequest the log when deinterleave is enabled +A72: +root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... + 0.000000 s: VX_ZONE_INFO:Enabled +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +251 +304 +308 +322 +324 +326 + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelValidate:241] Validating kernel com.ti.hwa.displaym2m + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:523] Calling create callback for node node_91 + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelInit:529] Create callback for node node_91 completed + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:578] kernel init for node 0, kernel com.ti.hwa.displaym2m ... + 0.000000 s: VX_ZONE_INFO:[ownGraphNodeKernelInit:589] kernel init for node 0, kernel com.ti.hwa.displaym2m ... done !!! +DSS_M2M: task id 0 start_time 1699996596 s 44206 us + 0.000000 s: VX_ZONE_INFO:[ownGraphScheduleGraph:764] Scheduling Graph (graph=15, pipe=0) + 0.000000 s: VX_ZONE_INFO:[ownNodeKernelSchedule:627] Scheduling Node (node=12, pipe=0) + + + + + +MCU20: + + +[MCU2_0] 38.631230 s: dmTimer : timer count is 0. +[MCU2_0] 46.219472 s: Iteration0 Input Buffer Luma=0xb9920a00 Chroma=0x0 +[MCU2_0] 46.219566 s: tivxDisplayM2MProcess pipeIdx 1 drvObj->numPipe 1 +[MCU2_0] 46.219612 s: Output Buffer Luma=0xba5c0000 Chroma=0x0 +[MCU2_0] 46.280601 s: Iteration0 Input Buffer Luma=0xb9920a00 Chroma=0x0 +[MCU2_0] 46.280695 s: tivxDisplayM2MProcess pipeIdx 1 drvObj->numPipe 1 +[MCU2_0] 46.280742 s: Output Buffer Luma=0x0 Chroma=0x0 + + 8865.vx_display_m2m_target.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include "TI/tivx.h" +#include "VX/vx.h" +#include "TI/tivx_event.h" +#include "tivx_hwa_kernels.h" +#include "tivx_kernel_display_m2m.h" +#include "TI/tivx_target_kernel.h" +#include "tivx_kernels_target_utils.h" +#include "tivx_hwa_display_m2m_priv.h" + +#include +#include +#include +#include +#include +#include + +#define DISPLAY_MAX_VALID_PLANES 2U + +#define DISPLAY_M2M_MAX_HANDLES (10) + +typedef struct +{ + /*! IDs=> 0: Write-back pipe-line1 */ + uint32_t instId; + /*! Number of pipe-lines used, should be set to '1' as blending is not supported currently */ + uint32_t numPipe; + /*! IDs=> 0:VID1, 1:VIDL1, 2:VID2 and 3:VIDL2 */ + uint32_t pipeId[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! IDs=> 0:Overlay1, 1:Overlay2, 2:Overlay3 and 3:Overlay4 */ + uint32_t overlayId; + /*! FVID2 display driver handle */ + Fvid2_Handle drvHandle; + /*! WB pipe create parameters */ + Dss_WbCreateParams createParams; + /*! WB pipe create status */ + Dss_WbCreateStatus createStatus; + /*! Callback parameters */ + Fvid2_CbParams cbParams; + /*! WB pipe status */ + Dss_WbStatus wbStatus; + /*! WB pipe configuration */ + Dss_WbPipeCfgParams wbCfg; + /*! WB pipe DMA configuration */ + CSL_DssWbPipeDmaCfg wbDmaCfg; + /*! WB pipe MFlag configuration */ + Dss_WbPipeMflagParams wbMflagCfg; + /*! WB pipe CSC configuration */ + CSL_DssCscCoeff wbCscCfg; + /*! Display pipe configuration */ + Dss_PipeCfgParams pipeCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe MFlag configuration */ + Dss_PipeMflagParams mFlagCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe CSC configuration */ + Dss_PipeCscParams cscCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display Overlay configuration */ + Dss_DctrlOverlayParams ovrCfg; + /*! Display Layer configuration */ + Dss_DctrlOverlayLayerParams layerCfg; + /*! Display Global configuration */ + Dss_DctrlGlobalDssParams globalParams; + /*! Mutex used for waiting for process completion */ + tivx_event waitForProcessCmpl; + /*! Display M2M Driver Input Frame List, used for providing + * an array of input frames */ + Fvid2_FrameList inFrmList; + /*! Display M2M Driver Output Frame List, used for providing + * an array of output frames */ + Fvid2_FrameList outFrmList; + /*! Display M2M Driver Input Frames */ + Fvid2_Frame inFrm[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display M2M Driver Output Frames */ + Fvid2_Frame outFrm[1U]; + +} tivxDisplayM2MDrvObj; + +typedef struct +{ + /*! IDs=> 0: Object free, 1: allocated */ + uint32_t isAlloc; + /*! Display M2M driver object */ + tivxDisplayM2MDrvObj drvObj; + /*! Display M2M Node create parameters provided by application */ + tivx_display_m2m_params_t createParams; + + uint32_t numOutImgs; +} tivxDisplayM2MParams; + +typedef struct +{ + tivx_mutex lock; + tivxDisplayM2MParams m2mObj[DISPLAY_M2M_MAX_HANDLES]; +} tivxDisplayM2MInstObj; + +static tivx_target_kernel vx_display_m2m_target_kernel1 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel2 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel3 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel4 = NULL; + +tivxDisplayM2MInstObj gTivxDispM2mInstObj; + +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut); + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj); + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj); + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData); + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format); + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj); +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj); + +extern void appLogPrintf(const char *format, ...); +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_obj_desc_image_t *input_desc; + tivx_obj_desc_image_t *output_desc; + void *input_target_ptr, *input_target_ptr2 = NULL; + void *output_target_ptr, *output_target_ptr2 = NULL; + Fvid2_Frame *frm; + int32_t fvid2_status = FVID2_SOK; + uint32_t pipeIdx, iterCnt; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + + if((vx_status)VX_SUCCESS == status) + { + uint32_t size; + input_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + output_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "DISPLAY M2M: ERROR: Instance context is NULL!\r\n"); + } + } + + if((vx_status)VX_SUCCESS == status) + { + /* Update 'input_desc' to array from only single image input to + support blending i.e. more than 1 number of pipes. */ + input_target_ptr = tivxMemShared2TargetPtr(&input_desc->mem_ptr[0]); + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + input_target_ptr2 = tivxMemShared2TargetPtr(&input_desc->mem_ptr[1]); + } + + for (iterCnt = 0u; iterCnt < 2; iterCnt ++) + { + output_desc = (tivx_obj_desc_image_t *) + tivxGetObjDescElement(obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX],iterCnt); + + output_target_ptr = tivxMemShared2TargetPtr(&output_desc->mem_ptr[0]); + + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + output_target_ptr2 = tivxMemShared2TargetPtr(&output_desc->mem_ptr[1]); + } + + /* call kernel processing function */ + + drvObj = &prms->drvObj; + /* Assign input buffer addresses */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = &drvObj->inFrm[pipeIdx]; + frm->addr[0U] = ((uint64_t)input_target_ptr) + + input_desc->imagepatch_addr[0].stride_y; + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + frm->addr[1U] = ((uint64_t)input_target_ptr2) + + input_desc->imagepatch_addr[1].stride_y; + } + appLogPrintf("Iteration%d Input Buffer Luma=0x%x Chroma=0x%x \n", pipeIdx, (void *)frm->addr[0U], (void *)frm->addr[1U]); + } + appLogPrintf("tivxDisplayM2MProcess pipeIdx %x drvObj->numPipe %x \n", pipeIdx, drvObj->numPipe); + /* Assign output buffer addresses */ + frm = drvObj->outFrm; + frm->addr[0U] = (uint64_t)output_target_ptr; + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + frm->addr[1U] = (uint64_t)output_target_ptr2; + } + appLogPrintf("Output Buffer Luma=0x%x Chroma=0x%x \n", (void *)frm->addr[0U], (void *)frm->addr[1U]); + /* Submit the request to the driver */ + tivxTaskWaitMsecs(50); + fvid2_status = Fvid2_processRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + FVID2_TIMEOUT_FOREVER); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Submit Request\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Wait for Frame Completion */ + tivxEventWait(drvObj->waitForProcessCmpl, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + fvid2_status = Fvid2_getProcessedRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + status = (vx_status)VX_FAILURE; + } + } + } + + /* kernel processing function complete */ + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivx_obj_desc_user_data_object_t *configuration_desc; + tivx_obj_desc_image_t *obj_desc_imageIn, *obj_desc_imageOut; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + + configuration_desc = (tivx_obj_desc_user_data_object_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]; + obj_desc_imageIn = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + obj_desc_imageOut = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + if (configuration_desc->mem_size != sizeof(tivx_display_m2m_params_t)) + { + VX_PRINT(VX_ZONE_ERROR, "User data object size on target does not match the size on host, possibly due to misalignment in data structure\n"); + status = (vx_status)VX_FAILURE; + } + + prms = tivxDispM2mAllocObject(&gTivxDispM2mInstObj); + if (NULL == prms) + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + + /* Create Node object elements */ + if ((vx_status)VX_SUCCESS == status) + { + status = tivxDisplayM2MSetCreateParams(prms, + configuration_desc, + obj_desc_imageIn, + obj_desc_imageOut); + } + + /* Create sync events */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxEventCreate(&prms->drvObj.waitForProcessCmpl); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to allocate Event\n"); + } + } + + /* DSS M2M Driver create and configuration */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvCfg(&prms->drvObj); + } + + if ((vx_status)VX_SUCCESS == status) + { + tivxSetTargetKernelInstanceContext(kernel, prms, sizeof(tivxDisplayM2MParams)); + } + else + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + uint32_t size; + int32_t fvid2_status = FVID2_SOK; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, + &size); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: Could not obtain kernel instance context !!!\n"); + } + if(NULL == prms) + { + VX_PRINT(VX_ZONE_ERROR, "Kernel instance context is NULL!!!\n"); + status = (vx_status)VX_FAILURE; + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Stop Display M2M Driver */ + fvid2_status = Fvid2_stop(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 DSS M2M not stopped !!!\n"); + } + } + + + if ((vx_status)VX_SUCCESS == status) + { + /* Dequeue all the request from the driver */ + while ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_getProcessedRequest(prms->drvObj.drvHandle, + &prms->drvObj.inFrmList, + &prms->drvObj.outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + if (fvid2_status != FVID2_ENO_MORE_BUFFERS) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + } + status = (vx_status)VX_FAILURE; + } + } + if (fvid2_status == FVID2_ENO_MORE_BUFFERS) + { + status = (vx_status)VX_SUCCESS; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* print status */ + fvid2_status = Fvid2_control(prms->drvObj.drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &prms->drvObj.wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + printf( "==========================================================\r\n"); + printf( " Display M2M Status: Instance|%d\r\n", prms->drvObj.instId); + printf( "==========================================================\r\n"); + printf( " Queue Count: %d\r\n", prms->drvObj.wbStatus.queueCount); + printf( " De-queue Count: %d\r\n", prms->drvObj.wbStatus.dequeueCount); + printf( " Write-back Frames Count: %d\r\n", prms->drvObj.wbStatus.wbFrmCount); + printf( " Underflow Count: %d\r\n", prms->drvObj.wbStatus.underflowCount); + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete FVID2 handle */ + fvid2_status = Fvid2_delete(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 Delete Failed !!!\n"); + } + else + { + prms->drvObj.drvHandle = NULL; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete event */ + tivxEventDelete(&prms->drvObj.waitForProcessCmpl); + } + + if ((NULL != prms) && + (sizeof(tivxDisplayM2MParams) == size)) + { + tivxDispM2mFreeObject(&gTivxDispM2mInstObj, prms); + //tivxMemFree(prms, size, (vx_enum)TIVX_MEM_EXTERNAL); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + int32_t fvid2_status = FVID2_SOK; + uint32_t size; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_display_m2m_statistics_t *m2m_status_prms = NULL; + void *target_ptr; + tivx_obj_desc_user_data_object_t *usr_data_obj; + + status = tivxGetTargetKernelInstanceContext(kernel, (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || + (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + } + + if (status == (vx_status)VX_SUCCESS) + { + switch (node_cmd_id) + { + case TIVX_DISPLAY_M2M_GET_STATISTICS: + { + if (NULL != obj_desc[0]) + { + drvObj = &prms->drvObj; + fvid2_status = Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &drvObj->wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Update return status object */ + usr_data_obj = (tivx_obj_desc_user_data_object_t *)obj_desc[0U]; + target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr); + tivxCheckStatus(&status, + tivxMemBufferMap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + if (sizeof(tivx_display_m2m_statistics_t) == + usr_data_obj->mem_size) + { + m2m_status_prms = (tivx_display_m2m_statistics_t *)target_ptr; + m2m_status_prms->queueCount = + drvObj->wbStatus.queueCount; + m2m_status_prms->dequeueCount = + drvObj->wbStatus.dequeueCount; + m2m_status_prms->wbFrmCount = + drvObj->wbStatus.wbFrmCount; + m2m_status_prms->underflowCount = + drvObj->wbStatus.underflowCount; + } + else + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n"); + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + } + + tivxCheckStatus(&status, + tivxMemBufferUnmap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + } + } + else + { + VX_PRINT(VX_ZONE_ERROR, "User data object was NULL\n"); + status = (vx_status)VX_FAILURE; + } + break; + } + default: + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + return status; +} + +void tivxAddTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_FAILURE; + char target_name[TIVX_TARGET_MAX_NAME]; + vx_enum self_cpu; + + self_cpu = tivxGetSelfCpuId(); + + if ( self_cpu == (vx_enum)TIVX_CPU_ID_MCU2_0 ) + { + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M1, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel1 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M2, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel2 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M3, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel3 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M4, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel4 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + + status = tivxMutexCreate(&gTivxDispM2mInstObj.lock); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to create Mutex\n"); + } + else + { + memset(&gTivxDispM2mInstObj.m2mObj, 0x0, + sizeof(tivxDisplayM2MParams) * DISPLAY_M2M_MAX_HANDLES); + } + } +} + +void tivxRemoveTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_SUCCESS; + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel1); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel1 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel2); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel2 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel3); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel3 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel4); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel4 = NULL; + } + + if (NULL != gTivxDispM2mInstObj.lock) + { + tivxMutexDelete(&gTivxDispM2mInstObj.lock); + } +} + + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut) +{ + vx_status status = (vx_status)VX_SUCCESS; + void *cfgPtr; + tivx_display_m2m_params_t *createParams; + tivxDisplayM2MDrvObj *drvObj; + uint32_t pipeIdx, layerIdx, pitchIdx; + Dss_DispParams *dispParams; + CSL_DssWbPipeCfg *wbPipeCfg; + Dss_DctrlOverlayParams *ovrParams; + Dss_DctrlOverlayLayerParams *layerParams; + Fvid2_Frame *frm; + + cfgPtr = tivxMemShared2TargetPtr(&obj_desc->mem_ptr); + + tivxCheckStatus(&status, tivxMemBufferMap(cfgPtr, obj_desc->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); + + if (status == (vx_status)VX_SUCCESS) + { + createParams = (tivx_display_m2m_params_t *)cfgPtr; + memcpy(&prms->createParams, createParams, sizeof(tivx_display_m2m_params_t)); + drvObj = &prms->drvObj; + /* Set Driver object */ + drvObj->instId = createParams->instId; + drvObj->numPipe = createParams->numPipe; + drvObj->overlayId = createParams->overlayId; + memcpy(&drvObj->pipeId[0U], + &createParams->pipeId[0U], + sizeof(createParams->pipeId)); + + if (createParams->enable_deiniterleave) + { + tivx_obj_desc_t *obj_desc = (tivx_obj_desc_t *)obj_desc_imageOut; + + if((vx_enum)obj_desc->type==(vx_enum)TIVX_OBJ_DESC_OBJARRAY) + { + tivx_obj_desc_object_array_t *obj_desc_obj_array; + + obj_desc_obj_array = (tivx_obj_desc_object_array_t *)obj_desc; + + prms->numOutImgs = obj_desc_obj_array->num_items; + } + else + { + if ((vx_enum)TIVX_OBJ_DESC_INVALID != (vx_enum)obj_desc->scope_obj_desc_id) + { + tivx_obj_desc_object_array_t *parent_obj_desc = NULL; + + tivxGetObjDescList( + &obj_desc->scope_obj_desc_id, + (tivx_obj_desc_t**)&parent_obj_desc, 1); + + if (parent_obj_desc != NULL) + { + prms->numOutImgs = parent_obj_desc->num_items; + } + else + { + prms->numOutImgs = 1u; + } + } + else + { + prms->numOutImgs = 1u; + } + } + } + else + { + prms->numOutImgs = 1u; + } + } + /* Initialize driver object */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvStructsInit(drvObj); + } + + /* set driver object parameters */ + if (status == (vx_status)VX_SUCCESS) + { + /* Callback parameters */ + drvObj->cbParams.cbFxn = (Fvid2_CbFxn) (&tivxDisplayM2MCallback); + drvObj->cbParams.appData = drvObj; + drvObj->createParams.numPipe = drvObj->numPipe; + drvObj->createParams.overlayId = drvObj->overlayId; + /* Set Display pipeline parameters */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + dispParams = &drvObj->pipeCfg[pipeIdx].cfgParams; + drvObj->createParams.pipeId[pipeIdx] = drvObj->pipeId[pipeIdx]; + drvObj->pipeCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->mFlagCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->cscCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + dispParams->pipeCfg.pipeType = CSL_DSS_VID_PIPE_TYPE_VID; + dispParams->layerPos.startX = 0U; + dispParams->layerPos.startY = 0U; + dispParams->pipeCfg.scEnable = FALSE; + dispParams->alphaCfg.globalAlpha = 0xFFU; + dispParams->alphaCfg.preMultiplyAlpha = FALSE; + status = tivxDisplayExtractFvid2Format( + obj_desc_imageIn, + &dispParams->pipeCfg.inFmt); + if (status == (vx_status)VX_SUCCESS) + { + /* Set video pipe output frame dimensions same as input as + no scaling is done in video pipe-line */ + dispParams->pipeCfg.outWidth = dispParams->pipeCfg.inFmt.width; + dispParams->pipeCfg.outHeight = dispParams->pipeCfg.inFmt.height; + + if (createParams->enable_deiniterleave) + { + for (pitchIdx = 0; pitchIdx < 3; pitchIdx ++) + { + dispParams->pipeCfg.inFmt.pitch[pitchIdx] = + dispParams->pipeCfg.inFmt.pitch[pitchIdx] * prms->numOutImgs; + } + } + } + else + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + break; + } + } + + /* Set Display WB pipeline parameters */ + if (((vx_status)VX_SUCCESS == status) && (pipeIdx > 0)) + { + wbPipeCfg = &drvObj->wbCfg.pipeCfg; + /* Set WB pipe input frame dimensions same as video pipe input/output frame, + no scaling is done in video pipe, it will be done in WB pipe-line */ + wbPipeCfg->inFmt.width = dispParams->pipeCfg.outWidth; + wbPipeCfg->inFmt.height = dispParams->pipeCfg.outHeight; + wbPipeCfg->inPos.startX = 0U; + wbPipeCfg->inPos.startY = 0U; + status = tivxDisplayExtractFvid2Format(obj_desc_imageOut, + &wbPipeCfg->outFmt); + if (status != (vx_status)VX_SUCCESS) + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + status = (vx_status)VX_FAILURE; + } + else + { + if ((wbPipeCfg->inFmt.width != wbPipeCfg->outFmt.width) || + (wbPipeCfg->inFmt.height != wbPipeCfg->outFmt.height)) + { + wbPipeCfg->scEnable = TRUE; + } + } + } + + /* Set Display WB pipeline parameters */ + if ((vx_status)VX_SUCCESS == status) + { + ovrParams = &drvObj->ovrCfg; + ovrParams->overlayId = drvObj->overlayId; + ovrParams->colorbarEnable = FALSE; + ovrParams->overlayCfg.colorKeyEnable = FALSE; + ovrParams->overlayCfg.colorKeySel = CSL_DSS_OVERLAY_TRANS_COLOR_DEST; + ovrParams->overlayCfg.backGroundColor = 0xc8c800U; + + layerParams = &drvObj->layerCfg; + layerParams->overlayId = drvObj->overlayId; + /* Set all layer to invalid first and then update only used ones */ + for(layerIdx = 0U ; layerIdx < CSL_DSS_VID_PIPE_ID_MAX ; layerIdx++) + { + layerParams->pipeLayerNum[layerIdx] = CSL_DSS_OVERLAY_LAYER_INVALID; + } + + /* Currently blending is not supported so only one layer is used. + This code needs to updated when blending is supported. */ + layerParams->pipeLayerNum[drvObj->createParams.pipeId[0U]] = + CSL_DSS_OVERLAY_LAYER_NUM_0; + } + + /* Update frame-lists */ + if ((vx_status)VX_SUCCESS == status) + { + drvObj->inFrmList.numFrames = drvObj->numPipe; + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = (Fvid2_Frame *) &drvObj->inFrm[pipeIdx]; + frm->chNum = drvObj->createParams.pipeId[pipeIdx]; + drvObj->inFrmList.frames[pipeIdx] = frm; + } + + frm = (Fvid2_Frame *) &drvObj->outFrm[0U]; + drvObj->outFrmList.frames[0U] = frm; + drvObj->outFrmList.numFrames = 1U; + + } + } + + return status; +} + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + + /* Initialize driver create parameters */ + Dss_m2mCreateParamsInit(&drvObj->createParams); + /* Initialize driver call-back parameters */ + Fvid2CbParams_init(&drvObj->cbParams); + /* Initialize driver pipe configuration parameters */ + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + Dss_dispParamsInit(&drvObj->pipeCfg[loopCnt].cfgParams); + Dss_dispPipeMflagParamsInit(&drvObj->mFlagCfg[loopCnt].mFlagCfg); + CSL_dssCscCoeffInit(&drvObj->cscCfg[loopCnt].csc); + } + /* Initialize WB pipeline parameters */ + Dss_m2mPipeCfgParamsInit(&drvObj->wbCfg); + CSL_dssWbPipeDmaCfgInit(&drvObj->wbDmaCfg); + Dss_m2mMFlagParamsInit(&drvObj->wbMflagCfg); + CSL_dssCscCoeffInit(&drvObj->wbCscCfg); + Dss_m2mStatusInit(&drvObj->wbStatus); + + /* Initialize Display overlay parameters */ + Dss_dctrlOverlayParamsInit(&drvObj->ovrCfg); + Dss_dctrlOverlayLayerParamsInit(&drvObj->layerCfg); + + /* Initialize Display global parameters */ + Dss_dctrlGlobalDssParamsInit(&drvObj->globalParams); + + /* Initialize input and output frame lists */ + Fvid2FrameList_init(&drvObj->inFrmList); + Fvid2FrameList_init(&drvObj->outFrmList); + + return status; +} + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + int32_t fvid2_status = FVID2_SOK; + + /* Display M2M Driver create */ + drvObj->drvHandle = Fvid2_create(DSS_M2M_DRV_ID, + drvObj->instId, + &drvObj->createParams, + &drvObj->createStatus, + &drvObj->cbParams); + if((NULL == drvObj->drvHandle) || + (drvObj->createStatus.retVal != FVID2_SOK)) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Create Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + + /* Display M2M pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_PARAMS, + &drvObj->pipeCfg[loopCnt], + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_MFLAG_PARAMS, + &drvObj->mFlagCfg[loopCnt], + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M DISP IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + /* Display M2M overlay configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS, + &drvObj->ovrCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_LAYER_PARAMS, + &drvObj->layerCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Overlay IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M global configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_GLOBAL_DSS_PARAMS, + &drvObj->globalParams, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Global IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M write-back pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_PARAMS, + &drvObj->wbCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_MFLAG_PARAMS, + &drvObj->wbMflagCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_DMA_CFG, + &drvObj->wbDmaCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M WB IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Start Display M2M Driver */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_start(drvObj->drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Driver Start Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + return status; +} + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData) +{ + tivxDisplayM2MDrvObj *drvObj = (tivxDisplayM2MDrvObj *)(appData); + + if ((NULL != drvObj) && (drvObj->waitForProcessCmpl != NULL)) + { + tivxEventPost(drvObj->waitForProcessCmpl); + } + + return (vx_status)VX_SUCCESS; +} + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format) +{ + vx_status status = (vx_status)VX_SUCCESS; + + Fvid2Format_init(format); + format->width = obj_desc_img->imagepatch_addr[0].dim_x; + format->height = obj_desc_img->imagepatch_addr[0].dim_y; + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->scanFormat = FVID2_SF_PROGRESSIVE; + + switch (obj_desc_img->format) + { + case (vx_df_image)TIVX_DF_IMAGE_RGB565: + format->dataFormat = FVID2_DF_BGR16_565; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGB: + format->dataFormat = FVID2_DF_RGB24_888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGBX: + format->dataFormat = FVID2_DF_RGBX24_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)TIVX_DF_IMAGE_BGRX: + format->dataFormat = FVID2_DF_BGRX32_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_UYVY: + format->dataFormat = FVID2_DF_YUV422I_UYVY; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_YUYV: + format->dataFormat = FVID2_DF_YUV422I_YUYV; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_NV12: + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[1].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U16: + format->ccsFormat = FVID2_CCSF_BITS12_UNPACKED16; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U8: + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + default: + status = (vx_status)VX_FAILURE; + break; + } + + return status; +} + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj) +{ + uint32_t cnt; + tivxDisplayM2MParams *m2mObj = NULL; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (0U == instObj->m2mObj[cnt].isAlloc) + { + m2mObj = &instObj->m2mObj[cnt]; + memset(m2mObj, 0x0, sizeof(tivxDisplayM2MParams)); + instObj->m2mObj[cnt].isAlloc = 1U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); + + return (m2mObj); +} + +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj) +{ + uint32_t cnt; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (m2mObj == &instObj->m2mObj[cnt]) + { + m2mObj->isAlloc = 0U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); +} + +hi At present, we have successfully split the image, but it took about 60ms, can you optimize the time consumed the log when deinterleave is enabled root@p789-adcu1:/hirain/data/ti_dss_patch# ./vx_app_multi_cam.out +APP: Init ... !!! +MEM: Init ... !!! +MEM: Initialized DMA HEAP (fd=4) !!! +MEM: Init ... Done !!! +IPC: Init ... !!! +IPC: Init ... Done !!! +REMOTE_SERVICE: Init ... !!! +REMOTE_SERVICE: Init ... Done !!! + 0.000000 s: GTC Frequency = 0 MHz +APP: Init ... Done !!! + 0.000000 s: VX_ZONE_INIT:Enabled + 0.000000 s: VX_ZONE_ERROR:Enabled + 0.000000 s: VX_ZONE_WARNING:Enabled + 0.000000 s: VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!! + 0.000000 s: VX_ZONE_INIT:[tivxHostInitLocal:86] Initialization Done for HOST !!! +Creating context done status : 0! +Starting Display M2M Conformance Test... +Starting Display M2M Conformance Test 2... +Creating Task 0... +Waiting for graphs to finish execution... +Graph 0: created... +Graph 0: input and output images created... +Graph 0: input and output images created 2 ... +225 +268 +272 +287 +289 +291 +293 +Graph 0: verifying... +DSS_M2M: task id 0 start_time 1699996983 s 477170 us +313 +DSS_M2M: task id 0 stop_time 1699996983 s 539877 us +Received events from Task0 +Display M2M Conformance Test Finished... + 0.000000 s: VX_ZONE_INIT:[tivxHostDeInitLocal:100] De-Initialization Done for HOST !!! + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:181] Is kernel use failed, index: 0 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:182] kernel name: org.khronos.openvx.absdiff + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:230] Is image use failed, index: 2 + 0.000000 s: VX_ZONE_ERROR:[tivxObjectDeInit:278] Is error use failed, index: 0 + 0.000000 s: VX_ZONE_INIT:[tivxDeInitLocal:193] De-Initialization Done !!! +APP: Deinit ... !!! +REMOTE_SERVICE: Deinit ... !!! +REMOTE_SERVICE: Deinit ... Done !!! +IPC: Deinit ... !!! +IPC: DeInit ... Done !!! +MEM: Deinit ... !!! +DDR_SHARED_MEM: Alloc's: 8 alloc's of 52633620 bytes +DDR_SHARED_MEM: Free's : 8 free's of 52633620 bytes +DDR_SHARED_MEM: Open's : 0 allocs of 0 bytes +DDR_SHARED_MEM: Total size: 805306368 bytes +MEM: Deinit ... Done !!! +APP: Deinit ... Done !!! +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# sync +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# ls -l +total 53160 +-rw-r--r-- 1 root root 13158400 Nov 15 2023 img_raw.yuv +-rw-r--r-- 1 root root 3289600 Nov 15 05:23 img_raw_ch0.yuv +-rw-r--r-- 1 root root 3289600 Nov 15 05:23 img_raw_ch1.yuv +-rw-r--r-- 1 root root 3289600 Nov 15 05:23 img_raw_ch2.yuv +-rw-r--r-- 1 root root 3289600 Nov 15 05:23 img_raw_ch3.yuv +-rw-r--r-- 1 root root 28045840 Nov 15 05:33 libtivision_apps.so.8.4.0 +-rwxr-xr-x 1 root root 45720 Nov 15 05:22 vx_app_multi_cam.out +root@p789-adcu1:/hirain/data/ti_dss_patch# +root@p789-adcu1:/hirain/data/ti_dss_patch# 6746.main_linux_arm.c /* + * + * Copyright (c) 2017 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +FILE *fp_src_img = NULL; +char file_name[20] = "file_name"; +FILE *fp_dst_img[4] = {0}; +uint32_t payload = 0; + +void *virt_addr1 = NULL; +void *virt_addr2 = NULL; +uint64_t phys_addr1 = 0; +uint64_t phys_addr2 = 0; +uint8_t *src_buf = NULL, *dest_buf = NULL; +uint32_t width = 1280U; +uint32_t pitch = 4U*2*1280U; +uint32_t height = 1285U; +uint32_t size = 0; + +uint8_t *image_test = NULL; + +void timer_print_start(int task_id) +{ + struct timeval tv1; + gettimeofday(&tv1, NULL); + printf("DSS_M2M: task id %d start_time %ld s %ld us\n", task_id, tv1.tv_sec, tv1.tv_usec); +} + +void timer_print_stop(int task_id) +{ + struct timeval tv1; + gettimeofday(&tv1, NULL); + printf("DSS_M2M: task id %d stop_time %ld s %ld us\n", task_id, tv1.tv_sec, tv1.tv_usec); +} + +int main(int argc, char *argv[]) +{ + int status = 0; + width = 1280U; + pitch = 4U*2*1280U; + height = 1285U; + size = pitch*height; + + status = appInit(); + + if(status==0) + { + //int app_multi_cam_main(int argc, char* argv[]); + + //status = app_multi_cam_main(argc, argv); + { + extern void main_dss_m2m_test(); + + virt_addr1 = appMemAlloc(APP_MEM_HEAP_DDR, size, 0); + virt_addr2 = appMemAlloc(APP_MEM_HEAP_DDR, size, 0); + + if (virt_addr1 == NULL || virt_addr2 == NULL) + { + printf("UDMA: MEM alloc fail !"); + } + + src_buf = (uint8_t*)virt_addr1; + dest_buf = (uint8_t*)virt_addr2; + fp_src_img = fopen("img_raw.yuv", "r"); + fread(src_buf, width*pitch, 1, fp_src_img); + //system("sync"); + sleep(2); + main_dss_m2m_test(); + #if 0 + timer_print_start(7); + for(int j = 0; j < 4; j++) + { + for(int i = 0; i < height; i++) + { + memcpy(&dest_buf[j*width*2U*height + i*width*2U], &src_buf[j*width*2U + i*pitch], width*2U); + } + } + timer_print_stop(7); + #endif + //system("sync"); + sleep(2); + + for(int i = 0; i < 4; i++) + { + sprintf(file_name, "img_raw_ch%d.yuv", i); + fp_dst_img[i] = fopen(file_name, "w"); + fwrite(&dest_buf[i*width*height*2U], width*height*2U, 1, fp_dst_img[i]); + } + + } + + + + appDeInit(); + } + + return status; +} + 1460.test_display_m2m.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "math.h" +#include +#include + + +#define TIVX_TARGET_DEFAULT_STACK_SIZE (256U * 1024U) +#define TIVX_TARGET_DEFAULT_TASK_PRIORITY1 (8u) + +#define DSS_M2M_NUM_CH (1U) +#define DSS_M2M_NUM_CH_MAX (4U) + +/* Common Configurations across channels */ +#define DSS_M2M_WB_PIPE_INST_ID (0U) +#define DSS_M2M_PIPE_NUM (1U) +#define DSS_M2M_PIPE_INST_ID (3U) +/* Currently Only Overlay2 can be used for M2M operations, + this can be changed through DSS initialization API available in vision_apps */ +#define DSS_M2M_OVERLAY_ID (3U) + +/* Channel 0 configurations */ +#define DSS_M2M_CH0_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH0_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH0_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH0_IN_FRAME_BPP (2U) +#define DSS_M2M_CH0_IN_FRAME_PITCH (DSS_M2M_CH0_IN_FRAME_WIDTH * \ + DSS_M2M_CH0_IN_FRAME_BPP * 4) +#define DSS_M2M_CH0_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH0_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH0_OUT_FRAME_HEIGHT (1285U) + +/* Channel 1 configurations */ +#define DSS_M2M_CH1_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH1_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH1_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH1_IN_FRAME_BPP (2U) +#define DSS_M2M_CH1_IN_FRAME_PITCH (DSS_M2M_CH1_IN_FRAME_WIDTH * \ + DSS_M2M_CH1_IN_FRAME_BPP * 4) +#define DSS_M2M_CH1_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH1_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH1_OUT_FRAME_HEIGHT (1285U) + +/* Channel 2 configurations */ +#define DSS_M2M_CH2_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH2_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH2_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH2_IN_FRAME_BPP (2U) +#define DSS_M2M_CH2_IN_FRAME_PITCH (DSS_M2M_CH2_IN_FRAME_WIDTH * \ + DSS_M2M_CH2_IN_FRAME_BPP * 4) +#define DSS_M2M_CH2_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH2_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH2_OUT_FRAME_HEIGHT (1285U) + +/* Channel 3 configurations */ +#define DSS_M2M_CH3_IN_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH3_IN_FRAME_WIDTH (1280U) +#define DSS_M2M_CH3_IN_FRAME_HEIGHT (1285U*4U) +#define DSS_M2M_CH3_IN_FRAME_BPP (2U) +#define DSS_M2M_CH3_IN_FRAME_PITCH (DSS_M2M_CH3_IN_FRAME_WIDTH * \ + DSS_M2M_CH3_IN_FRAME_BPP * 4) +#define DSS_M2M_CH3_OUT_FRAME_FORMAT (VX_DF_IMAGE_UYVY) +#define DSS_M2M_CH3_OUT_FRAME_WIDTH (1280U) +#define DSS_M2M_CH3_OUT_FRAME_HEIGHT (1285U) + +#define DSS_M2M_NODE_NAME_LEN_MAX (100U) + +/* Preloaded image buffers */ +/* 1920 x 1080 buffers */ +extern uint32_t gTiovxCtDisplayArrayBGR888[1555200]; +extern uint32_t gTiovxCtDisplayArrayYUV420NV12[777600]; +extern uint32_t gTiovxCtDisplayArrayYUV422[1036800]; + +typedef struct { + uint32_t taskId; + uint32_t instId; + uint32_t numPipe; + uint32_t pipeId[TIVX_DISPLAY_M2M_MAX_PIPE]; + uint32_t overlayId; + vx_df_image inFmt; + uint32_t inWidth; + uint32_t inHeight; + uint32_t inBpp; + uint32_t inPitch; + vx_df_image outFmt; + uint32_t outWidth; + uint32_t outHeight; + uint32_t posX; + uint32_t posY; + tivx_event eventHandle_TaskFinished; + tivx_task taskHandle_m2m; + tivx_task_create_params_t taskParams_m2m; + char nodeName[DSS_M2M_NODE_NAME_LEN_MAX]; + uint32_t iterationCnt; +} tivx_display_m2m_test_params_t; + +static vx_context context; +static uint32_t gLoop_cnt; +tivx_display_m2m_test_params_t gTestParams[DSS_M2M_NUM_CH_MAX]; +extern uint8_t *src_buf, *dest_buf; + +static void tivxTask_m2m(void *app_var) +{ + vx_node m2m_node = 0; + vx_image in_image = 0; + vx_image out_image = 0; + vx_user_data_object m2m_config; + tivx_display_m2m_params_t local_m2m_config; + vx_imagepatch_addressing_t image_addr; + vx_rectangle_t rect; + vx_graph m2m_graph = 0; + tivx_display_m2m_test_params_t *testParams = + (tivx_display_m2m_test_params_t *)app_var; + uint32_t status = 0; + vx_bool dss_m2m_prms_replicate[] = {vx_false_e, vx_false_e, vx_true_e}; + + vx_imagepatch_addressing_t image_addr_from_file, image_addr_from_file2; + vx_rectangle_t rect_from_file; + vx_map_id map_id1, map_id2; + void *data_ptr1, *data_ptr2; + + m2m_graph = vxCreateGraph(context); + + printf("Graph %d: created...\n", testParams->taskId); + + /* allocate Input and Output frame refs */ + in_image = vxCreateImage(context, + testParams->inWidth, + testParams->inHeight, + testParams->inFmt); + out_image = vxCreateImage(context, + testParams->outWidth, + testParams->outHeight, + testParams->outFmt); + + vx_object_array out_img_array = vxCreateObjectArray(context, (vx_reference)out_image, 4); + vxReleaseImage(&out_image); + + out_image = (vx_image)vxGetObjectArrayItem(out_img_array, 0); + + printf("Graph %d: input and output images created...\n", testParams->taskId); + + image_addr.dim_x = testParams->inWidth; + image_addr.dim_y = testParams->inHeight; + image_addr.stride_x = testParams->inBpp; + image_addr.stride_y = testParams->inPitch; + image_addr.scale_x = VX_SCALE_UNITY; + image_addr.scale_y = VX_SCALE_UNITY; + image_addr.step_x = 1; + image_addr.step_y = 1; + rect.start_x = 0; + rect.start_y = 0; + rect.end_x = testParams->inWidth; + rect.end_y = testParams->inHeight; + printf("Graph %d: input and output images created 2 ...\n", testParams->taskId); + printf("%d\n", __LINE__); + tivxTaskWaitMsecs(1000); + /* Copy reference input image to input buffer */ + if (testParams->inFmt == VX_DF_IMAGE_RGB) + { + vxCopyImagePatch(in_image, + &rect, + 0, + &image_addr, + (void *)gTiovxCtDisplayArrayBGR888, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST); + } + else if (testParams->inFmt == VX_DF_IMAGE_YUYV) + { + vxCopyImagePatch(in_image, + &rect, + 0, + &image_addr, + (void *)gTiovxCtDisplayArrayYUV422, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST); + } + else if (testParams->inFmt == VX_DF_IMAGE_UYVY) + { + rect_from_file.start_x = 0; + rect_from_file.start_y = 0; + rect_from_file.end_x = testParams->inWidth; + rect_from_file.end_y = testParams->inHeight; + /* Update input buffer here for other formats */ + status = vxMapImagePatch(in_image, + &rect_from_file, + 0, + &map_id1, + &image_addr_from_file, + &data_ptr1, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST, + VX_NOGAP_X); + if(status != 0) + { + printf("vxMapImagePatch failed. \n"); + } + printf("%d\n", __LINE__); + memcpy(data_ptr1, &src_buf[1280U*2U*testParams->taskId], 1280U*2U*(1285U*4U - testParams->taskId)); + + } + printf("%d\n", __LINE__); + /* DSS M2M initialization */ + tivx_display_m2m_params_init(&local_m2m_config); + local_m2m_config.instId = testParams->instId; + /* Only one pipeline is supported */ + local_m2m_config.numPipe = testParams->numPipe; + local_m2m_config.pipeId[0U] = testParams->pipeId[0U]; + local_m2m_config.overlayId = testParams->overlayId; + + local_m2m_config.enable_deiniterleave = 1u; + + m2m_config = vxCreateUserDataObject(context, + "tivx_display_m2m_params_t", + sizeof(tivx_display_m2m_params_t), + &local_m2m_config); + printf("%d\n", __LINE__); + m2m_node = tivxDisplayM2MNode(m2m_graph, m2m_config, in_image, out_image); + printf("%d\n", __LINE__); + vxSetNodeTarget(m2m_node, VX_TARGET_STRING, &testParams->nodeName[0U]); + printf("%d\n", __LINE__); + vxReplicateNode(m2m_graph, m2m_node, dss_m2m_prms_replicate, 3u); + printf("%d\n", __LINE__); + // printf("Added \'%s\' node in graph %d\n", &testParams->nodeName[0U], testParams->taskId); + + printf("Graph %d: verifying...\n", testParams->taskId); + + vxVerifyGraph(m2m_graph); + + sleep(10); + + // printf("Graph %d: verify done...\n", testParams->taskId); + + { + extern void timer_print_start(int task_id); + timer_print_start(testParams->taskId); + } + + //for (wbFrmCnt = 0U ; wbFrmCnt < testParams->iterationCnt ; wbFrmCnt++) + { + vxProcessGraph(m2m_graph); + } + printf("%d\n", __LINE__); + { + extern void timer_print_stop(int task_id); + timer_print_stop(testParams->taskId); + } + + { + for(int i = 0; i < 4; i++) + { + out_image = (vx_image)vxGetObjectArrayItem(out_img_array, i); + rect_from_file.start_x = 0; + rect_from_file.start_y = 0; + rect_from_file.end_x = testParams->outWidth; + rect_from_file.end_y = testParams->outHeight; + /* Update input buffer here for other formats */ + status = vxMapImagePatch(out_image, + &rect_from_file, + 0, + &map_id2, + &image_addr_from_file2, + &data_ptr2, + VX_WRITE_ONLY, + VX_MEMORY_TYPE_HOST, + VX_NOGAP_X); + if(status != 0) + { + printf("vxMapImagePatch failed 2. \n"); + } + memcpy(&dest_buf[1280U*1285U*2U*i], data_ptr2, 1280U*1285U*2U); + } + + } + + vxReleaseNode(&m2m_node); + vxReleaseImage(&in_image); + vxReleaseImage(&out_image); + vxReleaseUserDataObject(&m2m_config); + + vxReleaseGraph(&m2m_graph); + + /*Signal the completion of m2m graph processing*/ + tivxEventPost(testParams->eventHandle_TaskFinished); +} + + +void main_dss_m2m_test() +{ + //context = context_->vx_context_; + uint32_t taskIdx; + tivx_display_m2m_test_params_t *testParams; + uint32_t createTask = 0U; + uint32_t status = 0; + + /* Create OpenVx Context */ + context = vxCreateContext(); + status = vxGetStatus((vx_reference)context); + printf("Creating context done status : %d!\n", status); + + printf("Starting Display M2M Conformance Test...\n"); + + /* Initialize global test parameters structure to '0' */ + memset(&gTestParams[0U], 0, sizeof(gTestParams)); + + { + tivxHwaLoadKernels(context); + //CT_RegisterForGarbageCollection(context, ct_teardown_hwa_kernels, CT_GC_OBJECT); + printf("Starting Display M2M Conformance Test 2...\n"); + tivx_set_debug_zone(VX_ZONE_MAX); + + //gLoop_cnt = arg_->loopCount; + gLoop_cnt = 1; + + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + createTask = 0U; + testParams = &gTestParams[taskIdx]; + testParams->taskId = taskIdx; + tivxEventCreate(&testParams->eventHandle_TaskFinished); + testParams->instId = DSS_M2M_WB_PIPE_INST_ID; + testParams->numPipe = DSS_M2M_PIPE_NUM; + /* Note: Directly assigning as only one pipe is supported currently */ + testParams->pipeId[0U] = DSS_M2M_PIPE_INST_ID; + testParams->overlayId = DSS_M2M_OVERLAY_ID; + testParams->inFmt = DSS_M2M_CH0_IN_FRAME_FORMAT; + testParams->iterationCnt = gLoop_cnt; + switch (taskIdx) + { + case 0U: + /* Initialize test parameters for task 0 */ + createTask = 1U; + testParams->inWidth = DSS_M2M_CH0_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH0_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH0_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH0_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH0_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH0_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH0_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M1); + break; + case 1U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH1_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH1_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH1_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH1_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH1_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH1_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH1_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH1_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M2); + break; + case 2U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH2_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH2_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH2_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH2_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH2_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH2_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH2_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH2_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M3); + break; + case 3U: + createTask = 1U; + /* Initialize test parameters for task 1 */ + testParams->inFmt = DSS_M2M_CH3_IN_FRAME_FORMAT; + testParams->inWidth = DSS_M2M_CH3_IN_FRAME_WIDTH; + testParams->inHeight = DSS_M2M_CH3_IN_FRAME_HEIGHT; + testParams->inBpp = DSS_M2M_CH3_IN_FRAME_BPP; + testParams->inPitch = DSS_M2M_CH3_IN_FRAME_PITCH; + testParams->outFmt = DSS_M2M_CH3_OUT_FRAME_FORMAT; + testParams->outWidth = DSS_M2M_CH3_OUT_FRAME_WIDTH; + testParams->outHeight = DSS_M2M_CH3_OUT_FRAME_HEIGHT; + strcpy(&testParams->nodeName[0U], TIVX_TARGET_DISPLAY_M2M4); + break; + default: + break; + } + if (createTask == 1U) + { + /* Setting up task params for m2m_task */ + tivxTaskSetDefaultCreateParams(&testParams->taskParams_m2m); + testParams->taskParams_m2m.task_main = &tivxTask_m2m; + testParams->taskParams_m2m.app_var = testParams; + testParams->taskParams_m2m.stack_ptr = NULL; + testParams->taskParams_m2m.stack_size = TIVX_TARGET_DEFAULT_STACK_SIZE; + testParams->taskParams_m2m.core_affinity = TIVX_TASK_AFFINITY_ANY; + testParams->taskParams_m2m.priority = TIVX_TARGET_DEFAULT_TASK_PRIORITY1; + + printf("Creating Task %d...\n", testParams->taskId); + /* Create Tasks */ + tivxTaskCreate(&testParams->taskHandle_m2m, + &testParams->taskParams_m2m); + } + } + + /* wait here for all tasks to finish */ + printf("Waiting for graphs to finish execution...\n"); + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + tivxEventWait(testParams->eventHandle_TaskFinished, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + printf("Received events from Task%d\n", testParams->taskId); + } + + /* Delete tasks and sync events */ + for (taskIdx = 0U ; taskIdx < DSS_M2M_NUM_CH ; taskIdx++) + { + testParams = &gTestParams[taskIdx]; + tivxTaskDelete(&testParams->taskHandle_m2m); + tivxEventDelete(&testParams->eventHandle_TaskFinished); + } + + tivxHwaUnLoadKernels(context); + + tivx_set_debug_zone(VX_ZONE_MAX); + } + + printf("Display M2M Conformance Test Finished...\n"); +} + + 1460.vx_display_m2m_target.c /* + * + * Copyright (c) 2021 Texas Instruments Incorporated + * + * All rights reserved not granted herein. + * + * Limited License. + * + * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + * license under copyrights and patents it now or hereafter owns or controls to make, + * have made, use, import, offer to sell and sell ("Utilize") this software subject to the + * terms herein. With respect to the foregoing patent license, such license is granted + * solely to the extent that any such patent is necessary to Utilize the software alone. + * The patent license shall not apply to any combinations which include this software, + * other than combinations with devices manufactured by or for TI ("TI Devices"). + * No hardware patent is licensed hereunder. + * + * Redistributions must preserve existing copyright notices and reproduce this license + * (including the above copyright notice and the disclaimer and (if applicable) source + * code license limitations below) in the documentation and/or other materials provided + * with the distribution + * + * Redistribution and use in binary form, without modification, are permitted provided + * that the following conditions are met: + * + * * No reverse engineering, decompilation, or disassembly of this software is + * permitted with respect to any software provided in binary form. + * + * * any redistribution and use are licensed by TI for use only with TI Devices. + * + * * Nothing shall obligate TI to provide you with source code for the software + * licensed and provided to you in object code. + * + * If software source code is provided to you, modification and redistribution of the + * source code are permitted provided that the following conditions are met: + * + * * any redistribution and use of the source code, including any resulting derivative + * works, are licensed by TI for use only with TI Devices. + * + * * any redistribution and use of any object code compiled from the source code + * and any resulting derivative works, are licensed by TI for use only with TI Devices. + * + * Neither the name of Texas Instruments Incorporated nor the names of its suppliers + * + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * DISCLAIMER. + * + * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY + * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include +#include "TI/tivx.h" +#include "VX/vx.h" +#include "TI/tivx_event.h" +#include "tivx_hwa_kernels.h" +#include "tivx_kernel_display_m2m.h" +#include "TI/tivx_target_kernel.h" +#include "tivx_kernels_target_utils.h" +#include "tivx_hwa_display_m2m_priv.h" + +#include +#include +#include +#include +#include + +#define DISPLAY_MAX_VALID_PLANES 2U + +#define DISPLAY_M2M_MAX_HANDLES (10) + +typedef struct +{ + /*! IDs=> 0: Write-back pipe-line1 */ + uint32_t instId; + /*! Number of pipe-lines used, should be set to '1' as blending is not supported currently */ + uint32_t numPipe; + /*! IDs=> 0:VID1, 1:VIDL1, 2:VID2 and 3:VIDL2 */ + uint32_t pipeId[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! IDs=> 0:Overlay1, 1:Overlay2, 2:Overlay3 and 3:Overlay4 */ + uint32_t overlayId; + /*! FVID2 display driver handle */ + Fvid2_Handle drvHandle; + /*! WB pipe create parameters */ + Dss_WbCreateParams createParams; + /*! WB pipe create status */ + Dss_WbCreateStatus createStatus; + /*! Callback parameters */ + Fvid2_CbParams cbParams; + /*! WB pipe status */ + Dss_WbStatus wbStatus; + /*! WB pipe configuration */ + Dss_WbPipeCfgParams wbCfg; + /*! WB pipe DMA configuration */ + CSL_DssWbPipeDmaCfg wbDmaCfg; + /*! WB pipe MFlag configuration */ + Dss_WbPipeMflagParams wbMflagCfg; + /*! WB pipe CSC configuration */ + CSL_DssCscCoeff wbCscCfg; + /*! Display pipe configuration */ + Dss_PipeCfgParams pipeCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe MFlag configuration */ + Dss_PipeMflagParams mFlagCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display pipe CSC configuration */ + Dss_PipeCscParams cscCfg[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display Overlay configuration */ + Dss_DctrlOverlayParams ovrCfg; + /*! Display Layer configuration */ + Dss_DctrlOverlayLayerParams layerCfg; + /*! Display Global configuration */ + Dss_DctrlGlobalDssParams globalParams; + /*! Mutex used for waiting for process completion */ + tivx_event waitForProcessCmpl; + /*! Display M2M Driver Input Frame List, used for providing + * an array of input frames */ + Fvid2_FrameList inFrmList; + /*! Display M2M Driver Output Frame List, used for providing + * an array of output frames */ + Fvid2_FrameList outFrmList; + /*! Display M2M Driver Input Frames */ + Fvid2_Frame inFrm[TIVX_DISPLAY_M2M_MAX_PIPE]; + /*! Display M2M Driver Output Frames */ + Fvid2_Frame outFrm[1U]; + +} tivxDisplayM2MDrvObj; + +typedef struct +{ + /*! IDs=> 0: Object free, 1: allocated */ + uint32_t isAlloc; + /*! Display M2M driver object */ + tivxDisplayM2MDrvObj drvObj; + /*! Display M2M Node create parameters provided by application */ + tivx_display_m2m_params_t createParams; + + uint32_t numOutImgs; +} tivxDisplayM2MParams; + +typedef struct +{ + tivx_mutex lock; + tivxDisplayM2MParams m2mObj[DISPLAY_M2M_MAX_HANDLES]; +} tivxDisplayM2MInstObj; + +static tivx_target_kernel vx_display_m2m_target_kernel1 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel2 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel3 = NULL; +static tivx_target_kernel vx_display_m2m_target_kernel4 = NULL; + +tivxDisplayM2MInstObj gTivxDispM2mInstObj; + +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg); + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut); + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj); + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj); + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData); + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format); + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj); +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj); + + +static vx_status VX_CALLBACK tivxDisplayM2MProcess( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_obj_desc_image_t *input_desc; + tivx_obj_desc_image_t *output_desc; + void *input_target_ptr, *input_target_ptr2 = NULL; + void *output_target_ptr, *output_target_ptr2 = NULL; + Fvid2_Frame *frm; + int32_t fvid2_status = FVID2_SOK; + uint32_t pipeIdx, iterCnt; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + + if((vx_status)VX_SUCCESS == status) + { + uint32_t size; + input_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + output_desc = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "DISPLAY M2M: ERROR: Instance context is NULL!\r\n"); + } + } + + if((vx_status)VX_SUCCESS == status) + { + /* Update 'input_desc' to array from only single image input to + support blending i.e. more than 1 number of pipes. */ + input_target_ptr = tivxMemShared2TargetPtr(&input_desc->mem_ptr[0]); + VX_PRINT(VX_ZONE_INFO, "input_target_ptr = %p\n", input_target_ptr); + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + input_target_ptr2 = tivxMemShared2TargetPtr(&input_desc->mem_ptr[1]); + VX_PRINT(VX_ZONE_INFO, "input_target_ptr2 = %p\n", input_target_ptr2); + } + + for (iterCnt = 0u; iterCnt < prms->numOutImgs; iterCnt ++) + { + output_desc = (tivx_obj_desc_image_t *) + tivxGetObjDescElement(obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX],iterCnt); + + output_target_ptr = tivxMemShared2TargetPtr(&output_desc->mem_ptr[0]); + VX_PRINT(VX_ZONE_INFO, "output_target_ptr = %p\n", output_target_ptr); + + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + output_target_ptr2 = tivxMemShared2TargetPtr(&output_desc->mem_ptr[1]); + VX_PRINT(VX_ZONE_INFO, "output_target_ptr2 = %p\n", output_target_ptr2); + } + + /* call kernel processing function */ + + drvObj = &prms->drvObj; + /* Assign input buffer addresses */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = &drvObj->inFrm[pipeIdx]; + frm->addr[0U] = ((uint64_t)input_target_ptr) + + iterCnt*input_desc->imagepatch_addr[0].stride_y; + if((vx_df_image)VX_DF_IMAGE_NV12 == input_desc->format) + { + frm->addr[1U] = ((uint64_t)input_target_ptr2) + + iterCnt*input_desc->imagepatch_addr[1].stride_y; + } + } + + /* Assign output buffer addresses */ + frm = drvObj->outFrm; + frm->addr[0U] = (uint64_t)output_target_ptr; + if((vx_df_image)VX_DF_IMAGE_NV12 == output_desc->format) + { + frm->addr[1U] = (uint64_t)output_target_ptr2; + } + + /* Submit the request to the driver */ + fvid2_status = Fvid2_processRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + FVID2_TIMEOUT_FOREVER); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Submit Request\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Wait for Frame Completion */ + tivxEventWait(drvObj->waitForProcessCmpl, TIVX_EVENT_TIMEOUT_WAIT_FOREVER); + fvid2_status = Fvid2_getProcessedRequest(drvObj->drvHandle, + &drvObj->inFrmList, + &drvObj->outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + status = (vx_status)VX_FAILURE; + } + } + } + + /* kernel processing function complete */ + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MCreate( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + tivx_obj_desc_user_data_object_t *configuration_desc; + tivx_obj_desc_image_t *obj_desc_imageIn, *obj_desc_imageOut; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + + configuration_desc = (tivx_obj_desc_user_data_object_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]; + obj_desc_imageIn = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]; + obj_desc_imageOut = (tivx_obj_desc_image_t *)obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]; + + if (configuration_desc->mem_size != sizeof(tivx_display_m2m_params_t)) + { + VX_PRINT(VX_ZONE_ERROR, "User data object size on target does not match the size on host, possibly due to misalignment in data structure\n"); + status = (vx_status)VX_FAILURE; + } + + prms = tivxDispM2mAllocObject(&gTivxDispM2mInstObj); + if (NULL == prms) + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + + /* Create Node object elements */ + if ((vx_status)VX_SUCCESS == status) + { + status = tivxDisplayM2MSetCreateParams(prms, + configuration_desc, + obj_desc_imageIn, + obj_desc_imageOut); + } + + /* Create sync events */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxEventCreate(&prms->drvObj.waitForProcessCmpl); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to allocate Event\n"); + } + } + + /* DSS M2M Driver create and configuration */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvCfg(&prms->drvObj); + } + + if ((vx_status)VX_SUCCESS == status) + { + tivxSetTargetKernelInstanceContext(kernel, prms, sizeof(tivxDisplayM2MParams)); + } + else + { + status = (vx_status)VX_ERROR_NO_MEMORY; + VX_PRINT(VX_ZONE_ERROR, "Unable to allocate local memory\n"); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MDelete( + tivx_target_kernel_instance kernel, + tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + tivxDisplayM2MParams *prms = NULL; + uint32_t size; + int32_t fvid2_status = FVID2_SOK; + + if ( (num_params != TIVX_KERNEL_DISPLAY_M2M_MAX_PARAMS) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_CONFIGURATION_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_INPUT_IDX]) + || (NULL == obj_desc[TIVX_KERNEL_DISPLAY_M2M_OUTPUT_IDX]) + ) + { + status = (vx_status)VX_FAILURE; + } + else + { + status = tivxGetTargetKernelInstanceContext(kernel, + (void **)&prms, + &size); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: Could not obtain kernel instance context !!!\n"); + } + if(NULL == prms) + { + VX_PRINT(VX_ZONE_ERROR, "Kernel instance context is NULL!!!\n"); + status = (vx_status)VX_FAILURE; + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Stop Display M2M Driver */ + fvid2_status = Fvid2_stop(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 DSS M2M not stopped !!!\n"); + } + } + + + if ((vx_status)VX_SUCCESS == status) + { + /* Dequeue all the request from the driver */ + while ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_getProcessedRequest(prms->drvObj.drvHandle, + &prms->drvObj.inFrmList, + &prms->drvObj.outFrmList, + 0); + if (FVID2_SOK != fvid2_status) + { + if (fvid2_status != FVID2_ENO_MORE_BUFFERS) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to Get Processed Request\n"); + } + status = (vx_status)VX_FAILURE; + } + } + if (fvid2_status == FVID2_ENO_MORE_BUFFERS) + { + status = (vx_status)VX_SUCCESS; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* print status */ + fvid2_status = Fvid2_control(prms->drvObj.drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &prms->drvObj.wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + printf( "==========================================================\r\n"); + printf( " Display M2M Status: Instance|%d\r\n", prms->drvObj.instId); + printf( "==========================================================\r\n"); + printf( " Queue Count: %d\r\n", prms->drvObj.wbStatus.queueCount); + printf( " De-queue Count: %d\r\n", prms->drvObj.wbStatus.dequeueCount); + printf( " Write-back Frames Count: %d\r\n", prms->drvObj.wbStatus.wbFrmCount); + printf( " Underflow Count: %d\r\n", prms->drvObj.wbStatus.underflowCount); + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete FVID2 handle */ + fvid2_status = Fvid2_delete(prms->drvObj.drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, " DSS M2M: ERROR: FVID2 Delete Failed !!!\n"); + } + else + { + prms->drvObj.drvHandle = NULL; + } + } + + if ((vx_status)VX_SUCCESS == status) + { + /* Delete event */ + tivxEventDelete(&prms->drvObj.waitForProcessCmpl); + } + + if ((NULL != prms) && + (sizeof(tivxDisplayM2MParams) == size)) + { + tivxDispM2mFreeObject(&gTivxDispM2mInstObj, prms); + //tivxMemFree(prms, size, (vx_enum)TIVX_MEM_EXTERNAL); + } + } + + return status; +} + +static vx_status VX_CALLBACK tivxDisplayM2MControl( + tivx_target_kernel_instance kernel, + uint32_t node_cmd_id, tivx_obj_desc_t *obj_desc[], + uint16_t num_params, void *priv_arg) +{ + vx_status status = (vx_status)VX_SUCCESS; + int32_t fvid2_status = FVID2_SOK; + uint32_t size; + tivxDisplayM2MParams *prms = NULL; + tivxDisplayM2MDrvObj *drvObj; + tivx_display_m2m_statistics_t *m2m_status_prms = NULL; + void *target_ptr; + tivx_obj_desc_user_data_object_t *usr_data_obj; + + status = tivxGetTargetKernelInstanceContext(kernel, (void **)&prms, &size); + if (((vx_status)VX_SUCCESS != status) || + (NULL == prms) || + (sizeof(tivxDisplayM2MParams) != size)) + { + status = (vx_status)VX_FAILURE; + } + + if (status == (vx_status)VX_SUCCESS) + { + switch (node_cmd_id) + { + case TIVX_DISPLAY_M2M_GET_STATISTICS: + { + if (NULL != obj_desc[0]) + { + drvObj = &prms->drvObj; + fvid2_status = Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_GET_CURRENT_STATUS, + &drvObj->wbStatus, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, "Get status returned failure\n"); + status = (vx_status)VX_FAILURE; + } + else + { + /* Update return status object */ + usr_data_obj = (tivx_obj_desc_user_data_object_t *)obj_desc[0U]; + target_ptr = tivxMemShared2TargetPtr(&usr_data_obj->mem_ptr); + tivxCheckStatus(&status, + tivxMemBufferMap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + if (sizeof(tivx_display_m2m_statistics_t) == + usr_data_obj->mem_size) + { + m2m_status_prms = (tivx_display_m2m_statistics_t *)target_ptr; + m2m_status_prms->queueCount = + drvObj->wbStatus.queueCount; + m2m_status_prms->dequeueCount = + drvObj->wbStatus.dequeueCount; + m2m_status_prms->wbFrmCount = + drvObj->wbStatus.wbFrmCount; + m2m_status_prms->underflowCount = + drvObj->wbStatus.underflowCount; + } + else + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Size \n"); + status = (vx_status)VX_ERROR_INVALID_PARAMETERS; + } + + tivxCheckStatus(&status, + tivxMemBufferUnmap(target_ptr, + usr_data_obj->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, + (vx_enum)VX_WRITE_ONLY)); + } + } + else + { + VX_PRINT(VX_ZONE_ERROR, "User data object was NULL\n"); + status = (vx_status)VX_FAILURE; + } + break; + } + default: + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Command Id\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + return status; +} + +void tivxAddTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_FAILURE; + char target_name[TIVX_TARGET_MAX_NAME]; + vx_enum self_cpu; + + self_cpu = tivxGetSelfCpuId(); + + if ( self_cpu == (vx_enum)TIVX_CPU_ID_MCU2_0 ) + { + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M1, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel1 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M2, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel2 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M3, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel3 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + strncpy(target_name, TIVX_TARGET_DISPLAY_M2M4, TIVX_TARGET_MAX_NAME); + vx_display_m2m_target_kernel4 = tivxAddTargetKernelByName( + TIVX_KERNEL_DISPLAY_M2M_NAME, + target_name, + tivxDisplayM2MProcess, + tivxDisplayM2MCreate, + tivxDisplayM2MDelete, + tivxDisplayM2MControl, + NULL); + + status = tivxMutexCreate(&gTivxDispM2mInstObj.lock); + if ((vx_status)VX_SUCCESS != status) + { + VX_PRINT(VX_ZONE_ERROR, "Failed to create Mutex\n"); + } + else + { + memset(&gTivxDispM2mInstObj.m2mObj, 0x0, + sizeof(tivxDisplayM2MParams) * DISPLAY_M2M_MAX_HANDLES); + } + } +} + +void tivxRemoveTargetKernelDisplayM2M(void) +{ + vx_status status = (vx_status)VX_SUCCESS; + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel1); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel1 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel2); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel2 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel3); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel3 = NULL; + } + + status = tivxRemoveTargetKernel(vx_display_m2m_target_kernel4); + if (status == (vx_status)VX_SUCCESS) + { + vx_display_m2m_target_kernel4 = NULL; + } + + if (NULL != gTivxDispM2mInstObj.lock) + { + tivxMutexDelete(&gTivxDispM2mInstObj.lock); + } +} + + +static vx_status tivxDisplayM2MSetCreateParams( + tivxDisplayM2MParams *prms, + const tivx_obj_desc_user_data_object_t *obj_desc, + const tivx_obj_desc_image_t *obj_desc_imageIn, + const tivx_obj_desc_image_t *obj_desc_imageOut) +{ + vx_status status = (vx_status)VX_SUCCESS; + void *cfgPtr; + tivx_display_m2m_params_t *createParams; + tivxDisplayM2MDrvObj *drvObj; + uint32_t pipeIdx, layerIdx, pitchIdx; + Dss_DispParams *dispParams; + CSL_DssWbPipeCfg *wbPipeCfg; + Dss_DctrlOverlayParams *ovrParams; + Dss_DctrlOverlayLayerParams *layerParams; + Fvid2_Frame *frm; + + cfgPtr = tivxMemShared2TargetPtr(&obj_desc->mem_ptr); + + tivxCheckStatus(&status, tivxMemBufferMap(cfgPtr, obj_desc->mem_size, + (vx_enum)VX_MEMORY_TYPE_HOST, (vx_enum)VX_READ_ONLY)); + + if (status == (vx_status)VX_SUCCESS) + { + createParams = (tivx_display_m2m_params_t *)cfgPtr; + memcpy(&prms->createParams, createParams, sizeof(tivx_display_m2m_params_t)); + drvObj = &prms->drvObj; + /* Set Driver object */ + drvObj->instId = createParams->instId; + drvObj->numPipe = createParams->numPipe; + drvObj->overlayId = createParams->overlayId; + memcpy(&drvObj->pipeId[0U], + &createParams->pipeId[0U], + sizeof(createParams->pipeId)); + + if (createParams->enable_deiniterleave) + { + tivx_obj_desc_t *obj_desc = (tivx_obj_desc_t *)obj_desc_imageOut; + + if((vx_enum)obj_desc->type==(vx_enum)TIVX_OBJ_DESC_OBJARRAY) + { + tivx_obj_desc_object_array_t *obj_desc_obj_array; + + obj_desc_obj_array = (tivx_obj_desc_object_array_t *)obj_desc; + + prms->numOutImgs = 4;//obj_desc_obj_array->num_items; + } + else + { + if ((vx_enum)TIVX_OBJ_DESC_INVALID != (vx_enum)obj_desc->scope_obj_desc_id) + { + tivx_obj_desc_object_array_t *parent_obj_desc = NULL; + + tivxGetObjDescList( + &obj_desc->scope_obj_desc_id, + (tivx_obj_desc_t**)&parent_obj_desc, 1); + + if (parent_obj_desc != NULL) + { + prms->numOutImgs = 4;//parent_obj_desc->num_items; + } + else + { + prms->numOutImgs = 4u; + } + } + else + { + prms->numOutImgs = 4u; + } + } + } + else + { + prms->numOutImgs = 4u; + } + } + /* Initialize driver object */ + if (status == (vx_status)VX_SUCCESS) + { + status = tivxDisplayM2MDrvStructsInit(drvObj); + } + + /* set driver object parameters */ + if (status == (vx_status)VX_SUCCESS) + { + /* Callback parameters */ + drvObj->cbParams.cbFxn = (Fvid2_CbFxn) (&tivxDisplayM2MCallback); + drvObj->cbParams.appData = drvObj; + drvObj->createParams.numPipe = drvObj->numPipe; + drvObj->createParams.overlayId = drvObj->overlayId; + /* Set Display pipeline parameters */ + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + dispParams = &drvObj->pipeCfg[pipeIdx].cfgParams; + drvObj->createParams.pipeId[pipeIdx] = drvObj->pipeId[pipeIdx]; + drvObj->pipeCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->mFlagCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + drvObj->cscCfg[pipeIdx].pipeId = drvObj->pipeId[pipeIdx]; + dispParams->pipeCfg.pipeType = CSL_DSS_VID_PIPE_TYPE_VID; + dispParams->layerPos.startX = 0U; + dispParams->layerPos.startY = 0U; + dispParams->pipeCfg.scEnable = FALSE; + dispParams->alphaCfg.globalAlpha = 0xFFU; + dispParams->alphaCfg.preMultiplyAlpha = FALSE; + status = tivxDisplayExtractFvid2Format( + obj_desc_imageIn, + &dispParams->pipeCfg.inFmt); + if (status == (vx_status)VX_SUCCESS) + { + if (createParams->enable_deiniterleave) + { + dispParams->pipeCfg.inFmt.height = dispParams->pipeCfg.inFmt.height / prms->numOutImgs; + + /* Set video pipe output frame dimensions same as input as + no scaling is done in video pipe-line */ + dispParams->pipeCfg.outWidth = dispParams->pipeCfg.inFmt.width; + dispParams->pipeCfg.outHeight = dispParams->pipeCfg.inFmt.height; + for (pitchIdx = 0; pitchIdx < 3; pitchIdx ++) + { + dispParams->pipeCfg.inFmt.pitch[pitchIdx] = + dispParams->pipeCfg.inFmt.pitch[pitchIdx] * prms->numOutImgs; + } + } + + /* Set video pipe output frame dimensions same as input as + no scaling is done in video pipe-line */ + dispParams->pipeCfg.outWidth = dispParams->pipeCfg.inFmt.width; + dispParams->pipeCfg.outHeight = dispParams->pipeCfg.inFmt.height; + } + else + { + status = (vx_status)VX_FAILURE; + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + break; + } + } + + /* Set Display WB pipeline parameters */ + if (((vx_status)VX_SUCCESS == status) && (pipeIdx > 0)) + { + wbPipeCfg = &drvObj->wbCfg.pipeCfg; + /* Set WB pipe input frame dimensions same as video pipe input/output frame, + no scaling is done in video pipe, it will be done in WB pipe-line */ + wbPipeCfg->inFmt.width = dispParams->pipeCfg.outWidth; + wbPipeCfg->inFmt.height = dispParams->pipeCfg.outHeight; + wbPipeCfg->inPos.startX = 0U; + wbPipeCfg->inPos.startY = 0U; + status = tivxDisplayExtractFvid2Format(obj_desc_imageOut, + &wbPipeCfg->outFmt); + if (status != (vx_status)VX_SUCCESS) + { + VX_PRINT(VX_ZONE_ERROR, "Invalid Input Image\n"); + status = (vx_status)VX_FAILURE; + } + else + { + if ((wbPipeCfg->inFmt.width != wbPipeCfg->outFmt.width) || + (wbPipeCfg->inFmt.height != wbPipeCfg->outFmt.height)) + { + wbPipeCfg->scEnable = TRUE; + } + } + } + + /* Set Display WB pipeline parameters */ + if ((vx_status)VX_SUCCESS == status) + { + ovrParams = &drvObj->ovrCfg; + ovrParams->overlayId = drvObj->overlayId; + ovrParams->colorbarEnable = FALSE; + ovrParams->overlayCfg.colorKeyEnable = FALSE; + ovrParams->overlayCfg.colorKeySel = CSL_DSS_OVERLAY_TRANS_COLOR_DEST; + ovrParams->overlayCfg.backGroundColor = 0xc8c800U; + + layerParams = &drvObj->layerCfg; + layerParams->overlayId = drvObj->overlayId; + /* Set all layer to invalid first and then update only used ones */ + for(layerIdx = 0U ; layerIdx < CSL_DSS_VID_PIPE_ID_MAX ; layerIdx++) + { + layerParams->pipeLayerNum[layerIdx] = CSL_DSS_OVERLAY_LAYER_INVALID; + } + + /* Currently blending is not supported so only one layer is used. + This code needs to updated when blending is supported. */ + layerParams->pipeLayerNum[drvObj->createParams.pipeId[0U]] = + CSL_DSS_OVERLAY_LAYER_NUM_0; + } + + /* Update frame-lists */ + if ((vx_status)VX_SUCCESS == status) + { + drvObj->inFrmList.numFrames = drvObj->numPipe; + for (pipeIdx = 0U ; pipeIdx < drvObj->numPipe ; pipeIdx++) + { + frm = (Fvid2_Frame *) &drvObj->inFrm[pipeIdx]; + frm->chNum = drvObj->createParams.pipeId[pipeIdx]; + drvObj->inFrmList.frames[pipeIdx] = frm; + } + + frm = (Fvid2_Frame *) &drvObj->outFrm[0U]; + drvObj->outFrmList.frames[0U] = frm; + drvObj->outFrmList.numFrames = 1U; + + } + } + + return status; +} + +static vx_status tivxDisplayM2MDrvStructsInit(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + + /* Initialize driver create parameters */ + Dss_m2mCreateParamsInit(&drvObj->createParams); + /* Initialize driver call-back parameters */ + Fvid2CbParams_init(&drvObj->cbParams); + /* Initialize driver pipe configuration parameters */ + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + Dss_dispParamsInit(&drvObj->pipeCfg[loopCnt].cfgParams); + Dss_dispPipeMflagParamsInit(&drvObj->mFlagCfg[loopCnt].mFlagCfg); + CSL_dssCscCoeffInit(&drvObj->cscCfg[loopCnt].csc); + } + /* Initialize WB pipeline parameters */ + Dss_m2mPipeCfgParamsInit(&drvObj->wbCfg); + CSL_dssWbPipeDmaCfgInit(&drvObj->wbDmaCfg); + Dss_m2mMFlagParamsInit(&drvObj->wbMflagCfg); + CSL_dssCscCoeffInit(&drvObj->wbCscCfg); + Dss_m2mStatusInit(&drvObj->wbStatus); + + /* Initialize Display overlay parameters */ + Dss_dctrlOverlayParamsInit(&drvObj->ovrCfg); + Dss_dctrlOverlayLayerParamsInit(&drvObj->layerCfg); + + /* Initialize Display global parameters */ + Dss_dctrlGlobalDssParamsInit(&drvObj->globalParams); + + /* Initialize input and output frame lists */ + Fvid2FrameList_init(&drvObj->inFrmList); + Fvid2FrameList_init(&drvObj->outFrmList); + + return status; +} + +static vx_status tivxDisplayM2MDrvCfg(tivxDisplayM2MDrvObj *drvObj) +{ + vx_status status = (vx_status)VX_SUCCESS; + uint32_t loopCnt; + int32_t fvid2_status = FVID2_SOK; + + /* Display M2M Driver create */ + drvObj->drvHandle = Fvid2_create(DSS_M2M_DRV_ID, + drvObj->instId, + &drvObj->createParams, + &drvObj->createStatus, + &drvObj->cbParams); + if((NULL == drvObj->drvHandle) || + (drvObj->createStatus.retVal != FVID2_SOK)) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Create Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + + /* Display M2M pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + for (loopCnt = 0U ; loopCnt < drvObj->numPipe ; loopCnt++) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_PARAMS, + &drvObj->pipeCfg[loopCnt], + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_PIPE_MFLAG_PARAMS, + &drvObj->mFlagCfg[loopCnt], + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M DISP IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + break; + } + } + } + + /* Display M2M overlay configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_OVERLAY_PARAMS, + &drvObj->ovrCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_LAYER_PARAMS, + &drvObj->layerCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Overlay IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M global configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_DCTRL_SET_GLOBAL_DSS_PARAMS, + &drvObj->globalParams, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Global IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Display M2M write-back pipe configuration */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_PARAMS, + &drvObj->wbCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_MFLAG_PARAMS, + &drvObj->wbMflagCfg, + NULL); + fvid2_status += Fvid2_control(drvObj->drvHandle, + IOCTL_DSS_M2M_SET_WB_PIPE_DMA_CFG, + &drvObj->wbDmaCfg, + NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M WB IOCTL Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + /* Start Display M2M Driver */ + if ((vx_status)VX_SUCCESS == status) + { + fvid2_status = Fvid2_start(drvObj->drvHandle, NULL); + if (FVID2_SOK != fvid2_status) + { + VX_PRINT(VX_ZONE_ERROR, ": Display M2M Driver Start Failed!!!\r\n"); + status = (vx_status)VX_FAILURE; + } + } + + return status; +} + +static int32_t tivxDisplayM2MCallback(Fvid2_Handle handle, void *appData) +{ + tivxDisplayM2MDrvObj *drvObj = (tivxDisplayM2MDrvObj *)(appData); + + if ((NULL != drvObj) && (drvObj->waitForProcessCmpl != NULL)) + { + tivxEventPost(drvObj->waitForProcessCmpl); + } + + return (vx_status)VX_SUCCESS; +} + +static vx_status tivxDisplayExtractFvid2Format( + const tivx_obj_desc_image_t *obj_desc_img, + Fvid2_Format *format) +{ + vx_status status = (vx_status)VX_SUCCESS; + + Fvid2Format_init(format); + format->width = obj_desc_img->imagepatch_addr[0].dim_x; + format->height = obj_desc_img->imagepatch_addr[0].dim_y; + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->scanFormat = FVID2_SF_PROGRESSIVE; + + switch (obj_desc_img->format) + { + case (vx_df_image)TIVX_DF_IMAGE_RGB565: + format->dataFormat = FVID2_DF_BGR16_565; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGB: + format->dataFormat = FVID2_DF_RGB24_888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_RGBX: + format->dataFormat = FVID2_DF_RGBX24_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)TIVX_DF_IMAGE_BGRX: + format->dataFormat = FVID2_DF_BGRX32_8888; + format->pitch[FVID2_RGB_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_UYVY: + format->dataFormat = FVID2_DF_YUV422I_UYVY; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_YUYV: + format->dataFormat = FVID2_DF_YUV422I_YUYV; + format->pitch[FVID2_YUV_INT_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_NV12: + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[1].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U16: + format->ccsFormat = FVID2_CCSF_BITS12_UNPACKED16; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + case (vx_df_image)VX_DF_IMAGE_U8: + format->ccsFormat = FVID2_CCSF_BITS8_PACKED; + format->dataFormat = FVID2_DF_YUV420SP_UV; + format->pitch[FVID2_YUV_SP_Y_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + format->pitch[FVID2_YUV_SP_CBCR_ADDR_IDX] = (uint32_t)obj_desc_img->imagepatch_addr[0].stride_y; + break; + default: + status = (vx_status)VX_FAILURE; + break; + } + + return status; +} + +static tivxDisplayM2MParams *tivxDispM2mAllocObject(tivxDisplayM2MInstObj *instObj) +{ + uint32_t cnt; + tivxDisplayM2MParams *m2mObj = NULL; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (0U == instObj->m2mObj[cnt].isAlloc) + { + m2mObj = &instObj->m2mObj[cnt]; + memset(m2mObj, 0x0, sizeof(tivxDisplayM2MParams)); + instObj->m2mObj[cnt].isAlloc = 1U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); + + return (m2mObj); +} + +static void tivxDispM2mFreeObject(tivxDisplayM2MInstObj *instObj, + tivxDisplayM2MParams *m2mObj) +{ + uint32_t cnt; + + /* Lock instance mutex */ + tivxMutexLock(instObj->lock); + + for (cnt = 0U; cnt < DISPLAY_M2M_MAX_HANDLES; cnt ++) + { + if (m2mObj == &instObj->m2mObj[cnt]) + { + m2mObj->isAlloc = 0U; + break; + } + } + + /* Release instance mutex */ + tivxMutexUnlock(instObj->lock); +} + j7_display_m2m.h + +Hi, No, it should not take such a high time. On which SoC are you trying to run this example? Also how are you measuring the time? It should take less than 15ms to finish all 4 frame processing in the default SDK release. Have you made any changes in the SDK release? or are you using this overlay, which is also used for DSS M2M path? Regards, Brijesh + +hi The time we measure with the oscilloscope is still around 60ms, by pulling up and down the GPIO + +also, the data we moved through M2M was 12.5MB + +Hi Hirain team, I have discussed with Brijesh via Webex, it means nothing as you profile the VxProcessGraph function, because ProcessGRaph does a lot of things. So it is not good idea to check the performance around process graph. so pls move on to next step to integrate to real project, and to see the final effect. In the meanwhile TI can check the performance of DSS M2M node for this sample example and share you the result by tomorrow. BR, Biao + +Hi Biao, Hirain Team, I profiled the process function in the DSS M2M node for the same configuration and it takes around ~12ms to complete processing for all 4 frames, so DSS M2M path works as expected. Regards, Brijesh + +Hi Biao, Hirain Team, Essentially, I have added an array in dss m2m node to store the time information. Please find attached updated file. After running it for 1000 frames, we need to connect CCS to get the timestamp values. /cfs-file/__key/communityserver-discussions-components-files/791/3386.vx_5F00_display_5F00_m2m_5F00_target.c Regards, Brijesh + +Hi Brijesh, according to your suggestion, we has printed the timestamp and found that it took about 12ms for deinterleaving each time, but using the print function provided by multi_cam, this value is about 50ms, which data is credible? + +Hi Mingda xu, Are you also replicating this node? Because if you replicate this node, framework is going to create multiple replica of this node and then performance here is for addition of all nodes performance. If you are doing 4 times replication, 12 x 4 = 50 + some overhead, this will be around 50ms. So both are credible numbers. Where are going to use this node? Is it in some other replicated node? Lets say can you add LDC node after this node for YUV422 to YUV420 conversion and replicate LDC node, so that it allocates memory for all objects in input object array? Then you dont require to replicate this DSS M2M node. Regards, Brijesh + +Hello Brijesh, It is not our intention to replicate M2M node. The example you gave include the replication. Our use case is 1 image to 4 images (array). We tried to remove vxReplicateNode in the demo and the App isn't working. Regards, Sijie Zhu + +Hi Sijie Zhu, Yes, in the above application, if you remove call to vxReplicateNode, it will not work, because framework then does not allocate memory for all images of the object array. In order to allocate the memory, we need to call replicate node for one of the node, where this object array is going to be used. Because of the replicate node, the performance becomes 4 times the actual performance and this in a way proves that DSS M2M is working fine with the good performance. I would suggest to use it in your actual application, where output of DSS M2M node is going to be used in replicated node. Regards, Brijesh + +Hi Brijesh, according to my understanding, four identical m2m nodes are executed in parallel, so the execution time should be 12 ms instead of 50 ms. Or maybe it's because there is only one DMA channel causing the four m2m nodes to only be executed sequentially? In addition, a practical application scenario contains a number of nodes as follows: capture->m2m->ldc->algorithm provider self defined->display. Could you please leave us improvement with the above graph structure? Thanks a lot. Regards, Mingda + +Hi Mingda, DSS M2M is a single HW block, so it is not possible to run/execute 4 channels in parallel. It will execute/run serially only and so execution time will be around 50ms. mingda.xu said: In addition, a practical application scenario contains a number of nodes as follows: capture->m2m->ldc->algorithm provider self defined->display. Could you please leave us improvement with the above graph structure? In the above graph, - capture is a single instance node outputting a single vx_image - m2m is a single instance node, taking vx_image as input and an instance of vx_image from object array output image. - ldc node runs on 4 images, it is replicated node and takes an instance of vx_image from object array as input image. - not sure what algorithm is doing here, but if it needs to run on all 4 images, it should also be replicated. - display can be enabled to display one of the output image of the algorithm. Regards, Brijesh + +Hi Mingda, Can you please try with the attached file? I have added LDC for YUV422 to YUV420 conversion. Can you please try this? /cfs-file/__key/communityserver-discussions-components-files/791/5488.test_5F00_display_5F00_m2m.c Regards, brijesh + +Hi Brijesh, when I try to apply your patch to multi_cam demo, an error about vxReplicateNode() occurs: I try to compare the code app_ldc_module.c with your test_display_m2m.c patch and find that your patch lose the vxSetNodetarget() part for ldc node. The second image is about app_create_graph_ldc() in multi_cam demo. Any suggestion about failure in vxReplicateNode()? Thanks a lot. Regards, Mingda Xu + +Hi Mingda xu, Yes, that's one error. Can you please set the target to LDC by calling vxSetTargetNode for LDC node? You can use same as app_create_graph_ldc API. But what i am surprised is, it says the second array has 8 elements, ie output image array of LDC has 8 elements, that should not happen. I see i have created an array of 4 in below statement. Is there any change in below code? vx_object_array ldc_out_img_array = vxCreateObjectArray(context, (vx_reference)out_image, 4); vxReleaseImage(&out_image); Regards, Brijesh + diff --git a/data2/text/range/30001+/536720.txt b/data2/text/range/30001+/536720.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6b82c0acaf26a96d3aa9adc81cb9b3c27f2f9a1 --- /dev/null +++ b/data2/text/range/30001+/536720.txt @@ -0,0 +1,1331 @@ +Ticket Name: How to configure Ethernet MAC interface to MII mode of Ethernet in Vision SDK for Tda2x? + +Query Text: +Other Parts Discussed in Thread: DP83865, DP83848Q-Q1, TDA2 Hi, For Tda2x EVM, it used Gig Phyter (DP83865 Gig PHYTER V10/100/1000 Ethernet Physical Layer) and Vision SDK was set to RGMII mode for Ethernet. Our EVM use Mig Phyter (DP83848Q-Q1 PHYTERTM Extended-Temperature, Single-Port 10/100-Mbps Ethernet Physical Layer Transceiver) for Ethernet. So I must configure Ethernet MAC interface to MII mode in Vision SDK. I list my modification as follow: 1. according to HW schematics, I modified some pin mux setting in file VISION_SDK_02_10_00_00/ti_components/drivers/starterware_01_06_00_16/bootloader/sbl_utils/src/sbl_utils_tda2xx.c Phy Pin name ball Pad Name Offset Register Value MDC EPHY_MDC O D3 VIN2A_D10 0x190 0x4000F MDIO EPHY_MDIO I/O F6 VIN2A_D11 0x194 0x4000F RXD_1 EPHY_RXD I V6 RGMII0_TXD1 0x260 0x40003 RXD_2 EPHY_RXD I V9 RGMII0_TXCTL 0x254 0x40003 RXD_3 EPHY_RXD I W9 RGMII0_TXC 0x250 0x40003 RXD_0 EPHY_RXD I U6 RGMII0_TXD0 0x264 0x40003 RX_CLK EPHY_RXC I Y1 UART3_TXD 0x24C 0xE0003 RX_DV EPHY_RXDV I V2 UART3_RXD 0x248 0xC0003 TX_CLK EPHY_TXC I U5 RGMII0_RXC 0x268 0x60003 TXD_0 EPHY_TXD O W2 RGMII0_RXD0 0x27C 0x10003 TXD_1 EPHY_TXD O Y2 RGMII0_RXD1 0x278 0x10003 TXD_2 EPHY_TXD O V4 RGMII0_RXD3 0x270 0x10003 TXD_3 EPHY_TXD O V5 RGMII0_RXCTL 0x26C 0x10003 TX_ER EPHY_TXER I U4 MDIO_D 0x240 0x90003 RX_ER EPHY_RXER I U7 RGMII0_TXD2 0x25C 0x40003 COL EPHY_COL I V1 MDIO_MCLK 0x23C 0xC0003 CRS EPHY_CRS I V7 RGMII0_TXD3 0x258 0x40003 TX_EN EPHY_TXEN O V3 RGMII0_RXD2 0x274 0x10003 2. Remove this function. If not, system will restore to RGMII configure after booting. VISION_SDK_02_10_00_00/ti_components/drivers/starterware_01_06_00_16/platform/platform_tda2xx_pad_config.c void PlatformRGMIISetPinMux(void) { // PlatformRGMII0SetPinMux(); } After Booting, system still can't get IP from DHCP server. Are there any settings I need to do more? + +Responses: +Hi, Any update? 3. I also set (#define PAB_MII (1)) in VISION_SDK_02_10_00_00/vision_sdk/src/utils_common/src/ndk/ndk_nsp_hooks.c But EVM still can't get IP. + +Hi Eric, Vision SDK team has been notified to comment. Best regards Lucy + +Hello Eric, PAD configuration looks correct for MII mode, where do you calling PAD config function in VSDK? Also when you run application, do you see Link up and speed message on console? I would suggest to use standalone NSP application to get PHY up in MII mode as it would be simpler. You can gel files to configure PAD and run NSP test from CCS. Regards, Prasad + +PAD configuration function was setted in Line:557 and was called in SblUtilsConfigPadMux functino of the file VISION_SDK_02_10_00_00/ti_components/drivers/starterware_01_06_00_16/bootloader/sbl_utils/src/sbl_utils_tda2xx.c I set boot mode to sd card, so it was ran in MLO file. Is the standalone NSP application "VISION_SDK_02_10_00_00/ti_components/networking/nsp_gmacsw_4_14_00_00/packages/ti/ndk/vayu/examples_ipu1/helloWorld"?? + +Hello Eric, In addition to PAD configuration SBL also configures IO delay for RGMII PADS. These delay setting are not correct for MII mode. Also this delay configuration code will set PAD mux back to RGMII. If you have debug access through CCS, you can check values of PAD registers if they are correctly configured. Running standalone test would remove dependency on SBL. You can run either helloWorld or client app though client is recommended. You can refer to NSP user guide for building & running this app in the CCS. Just make sure you modify gel files to run TDA2xx_PAD_PAB_MII_Config function instead of TDA2xx_PAD_EVM_RGMII_Config. Please cross check the values configured in the TDA2xx_PAD_PAB_MII_Config function are as per your board layout. Please share your application log once you run it. Regards, Prasad + +Hi Prasad, I followed NSP user guide for importing client app to CCS: Step1: Copy nsp_gmacsw_4_14_00_00 folder from VISION_SDK_02_10_00_00 to workspace_v5_4 folder. Step2: Import Existing CCS Eclipse Project. Detail Step: Open CCSv5 and create a new workspace. From within the C/C++ View, select the menu option "Project -> Import Existing CCS/CCE Eclipse Project" In the window that appears, click "Select Archive File", then click the "browse" button. Navigate to the location where you installed the nsp_gmacsw_4_14_00_00 package. If you installed the NSP into C:\ti, then navigate to: C:\ti\nsp_gmacsw_4_14_00_00\packages\ti\ndk\vayu\examples Once in the examples directory, you will see the example directories for MPU & IPU1: Choose the desired directory and click open Under "Discovered Projects" you should see the examples listed. Click "Finish" to import the examples. You may now build the NDK examples within CCSv5 ------------ But I get this error message: See details below. Error: Import failed for project 'client' because its meta-data cannot be interpreted. Please contact support. ------------ I ever tried to install different versions of CCS (CCS5.4.0.00091_linux, CCS5.5.0.00077_linux and CCS6.1.3.00034_linux) and switch to different workspaces (workspace_v5_4, workspace_v5_5 and workspace_v6_1, refer to e2e Forum: delete ".metadata" folder), but the result is the same. Any idea? + +Eric, You should use CCSv6 as these applications are not compatible with older CCSv5. You should not see this issue on CCSv6. Below are modified steps Open CCSv6 and create a new workspace. Select View -> Project explorer. In project explorer, right click and select the menu option "Import-> CCS projects" In the window that appears, click "Select Search Directory", then click the "browse" button. Navigate to the location where you installed the nsp_gmacsw_4_14_00_00 package. If you installed the NSP into C:\ti, then navigate to: C:\ti\nsp_gmacsw_4_14_00_00\packages\ti\ndk\vayu\examples Once in the examples directory, you will see the example directories for MPU & IPU1: Choose the desired directory and click open Under "Discovered Projects" you should see the examples listed. Click "Finish" to import the examples. Sorry for user-guide issue. I will update it. + +Hi Prasad, After fixed some compiling issues(XDCTools, uia, SYS/BIOS packages), I can compile and execute "client" application in (VISION_SDK_02_10_00_00/ti_components/networking/nsp_gmacsw_4_14_00_00/packages/ti/ndk/vayu/examples_ipu1/client). At first, I try to run "client" application on Ti EVM for RGMII mode. It can get IP address from DHCP server. Log as follow: ------------------------------------------------------------------------------------------ [Cortex_M4_IPU1_C0] MAC Port 0 Address: d4-f5-13-b4-62-90 MAC Port 1 Address: d4-f5-13-b4-62-91 GMACSW has been started successfully Registration of the GMACSW Successful Service Status: DHCPC : Enabled : : 000 Service Status: Telnet : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: DHCPC : Enabled : Running : 000 PHY: 2, NegMode 01E1, NWAYadvertise 01E1, NWAYREadvertise 43E1 Negotiated connection: FullDuplex 100 Mbs Link Status: 100Mb/s Full Duplex on PHY 2 Network Added: If-1:192.168.213.7 Service Status: DHCPC : Enabled : Running : 017 ------------------------------------------------------------------------------------------ Then, for my board, log as follow: ------------------------------------------------------------------------------------------ [Cortex_M4_IPU1_C0] MAC Port 0 Address: d0-b5-c2-5b-42-ee MAC Port 1 Address: d0-b5-c2-5b-42-ef GMACSW has been started successfully Registration of the GMACSW Successful Service Status: DHCPC : Enabled : : 000 Service Status: Telnet : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: DHCPC : Enabled : Running : 000 <- hang on this ------------------------------------------------------------------------------------------ I list my modification for some code slice and gel file for compiling "client" application. 1. For running MII mode configuration. Line 48, 65 : TDA2xx_PAD_PAB_MII_Config.gel 2. For MDIO_MCLK and MDIO_D Line 3445~3460:TDA2xx_pad_config.gel 3. For I/O delay: vayu_init.c Line 72: #define PAB_MII (1) Line 101~106, 121~126: for I/O delay register. Line 353~418 of vayu_init function: for delay value. I am not sure these delay values are correct or not. Can you help me to check these modifications? I attach all files I described: TDA2xx_startup_common.gel TDA2xx_pad_config.gel NSPLog.txt ---------------------------------------------------------------------------------Ti EVM +Log: + +[Cortex_M4_IPU1_C0] +MAC Port 0 Address: + d4-f5-13-b4-62-90 + +MAC Port 1 Address: + d4-f5-13-b4-62-91 +GMACSW has been started successfully +Registration of the GMACSW Successful +Service Status: DHCPC : Enabled : : 000 +Service Status: Telnet : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: DHCPC : Enabled : Running : 000 +PHY: 2, NegMode 01E1, NWAYadvertise 01E1, NWAYREadvertise 43E1 +Negotiated connection: FullDuplex 100 Mbs +Link Status: 100Mb/s Full Duplex on PHY 2 +Network Added: If-1:192.168.213.7 +Service Status: DHCPC : Enabled : Running : 017 + + +---------------------------------------------------------------------------------Eric EVM: MII mode for dp83848q Phy +[Cortex_M4_IPU1_C0] +MAC Port 0 Address: + d0-b5-c2-5b-42-ee + +MAC Port 1 Address: + d0-b5-c2-5b-42-ef +GMACSW has been started successfully +Registration of the GMACSW Successful +Service Status: DHCPC : Enabled : : 000 +Service Status: Telnet : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: DHCPC : Enabled : Running : 000 + + + + +---------------------------------------------------------------------------------Eric EVM: CCS Log for running gel file +Cortex_M4_IPU1_C0: GEL Output: --->>> TDA2xx Cortex M4 Startup Sequence In Progress... <<<--- +Cortex_M4_IPU1_C0: GEL Output: --->>> TDA2xx Cortex M4 Startup Sequence DONE! <<<--- +Cortex_M4_IPU1_C1: GEL Output: --->>> TDA2xx Cortex M4 Startup Sequence In Progress... <<<--- +Cortex_M4_IPU1_C1: GEL Output: --->>> TDA2xx Cortex M4 Startup Sequence DONE! <<<--- +C66xx_DSP1: GEL Output: --->>> TDA2xx C66x DSP Startup Sequence In Progress... <<<--- +C66xx_DSP1: GEL Output: --->>> TDA2xx C66x DSP Startup Sequence DONE! <<<--- +C66xx_DSP2: GEL Output: --->>> TDA2xx C66x DSP Startup Sequence In Progress... <<<--- +C66xx_DSP2: GEL Output: --->>> TDA2xx C66x DSP Startup Sequence DONE! <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Cortex A15 Startup Sequence In Progress... <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Cortex A15 Startup Sequence DONE! <<<--- +ARP32_EVE_1: GEL Output: --->>> Configuring EVE Memory Map <<<--- +ARP32_EVE_1: GEL Output: --->>> EVE Memory Map Done! <<<--- +ARP32_EVE_2: GEL Output: --->>> Configuring EVE Memory Map <<<--- +ARP32_EVE_2: GEL Output: --->>> EVE Memory Map Done! <<<--- +ARP32_EVE_3: GEL Output: --->>> Configuring EVE Memory Map <<<--- +ARP32_EVE_3: GEL Output: --->>> EVE Memory Map Done! <<<--- +ARP32_EVE_4: GEL Output: --->>> Configuring EVE Memory Map <<<--- +ARP32_EVE_4: GEL Output: --->>> EVE Memory Map Done! <<<--- +IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset. +IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset. +IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset. +IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset. +IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset. +CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.9 GHZs <<<--- +CS_DAP_DebugSS: GEL Output: > Setup DebugSS 1.9GHz in progress... +CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz +CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS PLL Clocking 1.9GHz +CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS ATB Clocking 380MHz +CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz +CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<---- +CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> --- +CS_DAP_DebugSS: GEL Output: --->>> Mapping TIMER supsend sources to default cores <<<<<<---- +CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do. +CortexA15_0: GEL Output: --->>> TDA2xx Target Connect Sequence Begins ... <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx PG1.0 GP device <<<--- +CortexA15_0: GEL Output: --->>> The core is in non-SECURE state. <<<--- +CortexA15_0: GEL Output: --->>> PRCM Clock Configuration for OPPNOM in progress... <<<--- +CortexA15_0: GEL Output: Cortex A15 DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: Cortex A15 DPLL is already locked, now unlocking... +CortexA15_0: GEL Output: Cortex A15 DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: IVA DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: IVA DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: PER DPLL OPP 0 clock config in progress... +CortexA15_0: GEL Output: PER DPLL already locked, now unlocking +CortexA15_0: GEL Output: PER DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: CORE DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: CORE DPLL OPP already locked, now unlocking.... +CortexA15_0: GEL Output: CORE DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: ABE DPLL OPP 0 clock config in progress... +CortexA15_0: GEL Output: ABE DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: GMAC DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: GMAC DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: GPU DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: GPU DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: DSP DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: DSP DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: EVE DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: EVE DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 clock config is in progress... +CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 is DONE! +CortexA15_0: GEL Output: --->>> PRCM Clock Configuration for OPP 0 is DONE! <<<--- +CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules in progress... <<<--- +CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules is DONE! <<<--- +CortexA15_0: GEL Output: --->>> DDR3 Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DDR DPLL clock config for 532MHz is in progress... +CortexA15_0: GEL Output: DDR DPLL clock config for 532MHz is in DONE! +CortexA15_0: GEL Output: Launch full leveling +CortexA15_0: GEL Output: Updating slave ratios in PHY_STATUSx registers +CortexA15_0: GEL Output: as per HW leveling output +CortexA15_0: GEL Output: HW leveling is now disabled. Using slave ratios from +CortexA15_0: GEL Output: PHY_STATUSx registers +CortexA15_0: GEL Output: Launch full leveling +CortexA15_0: GEL Output: Updating slave ratios in PHY_STATUSx registers +CortexA15_0: GEL Output: as per HW leveling output +CortexA15_0: GEL Output: HW leveling is now disabled. Using slave ratios from +CortexA15_0: GEL Output: PHY_STATUSx registers +CortexA15_0: GEL Output: One EMIF - 512MB total memory +CortexA15_0: GEL Output: Same memory mapped at 0x80000000 and 0xA0000000 +CortexA15_0: GEL Output: --->>> DDR3 Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Begin All Pad Configuration for PAB MII Usage <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Begin GMAC_SW MDIO Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx End GMAC_SW MDIO Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Begin GMAC_SW MII0 Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx End GMAC_SW MII0 Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Begin GMAC_SW MII1 Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx End GMAC_SW MII1 Pad Configuration <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx End All Pad Configuration for PAB MII Usage <<<--- +CortexA15_0: GEL Output: --->>> TDA2xx Target Connect Sequence DONE !!!!! <<<--- +Cortex_M4_IPU1_C0: Error connecting to the target: (Error -1266 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 6.0.407.3) +CortexA15_0: GEL Output: --->>> IPU1SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: --->>> IPU1SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> IPU2SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: --->>> IPU2SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> DSP1SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Checking for data integrity in DSPSS L2RAM ... +CortexA15_0: GEL Output: DEBUG: Data integrity check in GEM L2RAM is sucessful! +CortexA15_0: GEL Output: --->>> DSP1SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> DSP2SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Checking for data integrity in DSPSS L2RAM ... +CortexA15_0: GEL Output: DEBUG: Data integrity check in GEM L2RAM is sucessful! +CortexA15_0: GEL Output: --->>> DSP2SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> EVE1SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Resetting EVE MMU ... +CortexA15_0: GEL Output: DEBUG: Configuring EVE1 MMU0 TLB entry 1: 0x00000000 --> 0x80000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE1 MMU0 TLB entry 2: 0x80000000 --> 0x80000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE1 MMU0 TLB entry 3: 0x40000000 --> 0x40000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE1 MMU0 TLB entry 4: 0x48000000 --> 0x48000000 +CortexA15_0: GEL Output: DEBUG: EVE0 MMU0 configured as per VisionSDK requirements!!!! +CortexA15_0: GEL Output: --->>> EVE1SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> EVE2SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Resetting EVE MMU ... +CortexA15_0: GEL Output: DEBUG: Configuring EVE2 MMU0 TLB entry 1: 0x00000000 --> 0x81000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE2 MMU0 TLB entry 2: 0x81000000 --> 0x81000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE2 MMU0 TLB entry 3: 0x40000000 --> 0x40000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE2 MMU0 TLB entry 4: 0x48000000 --> 0x48000000 +CortexA15_0: GEL Output: DEBUG: EVE0 MMU0 configured as per VisionSDK requirements!!!! +CortexA15_0: GEL Output: --->>> EVE2SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> EVE3SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Resetting EVE MMU ... +CortexA15_0: GEL Output: DEBUG: Configuring EVE3 MMU0 TLB entry 1: 0x00000000 --> 0x82000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE3 MMU0 TLB entry 2: 0x82000000 --> 0x82000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE3 MMU0 TLB entry 3: 0x40000000 --> 0x40000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE3 MMU0 TLB entry 4: 0x48000000 --> 0x48000000 +CortexA15_0: GEL Output: DEBUG: EVE0 MMU0 configured as per VisionSDK requirements!!!! +CortexA15_0: GEL Output: --->>> EVE3SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> EVE4SS Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: DEBUG: Resetting EVE MMU ... +CortexA15_0: GEL Output: DEBUG: Configuring EVE4 MMU0 TLB entry 1: 0x00000000 --> 0x83000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE4 MMU0 TLB entry 2: 0x83000000 --> 0x83000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE4 MMU0 TLB entry 3: 0x40000000 --> 0x40000000 +CortexA15_0: GEL Output: DEBUG: Configuring EVE4 MMU0 TLB entry 4: 0x48000000 --> 0x48000000 +CortexA15_0: GEL Output: DEBUG: EVE0 MMU0 configured as per VisionSDK requirements!!!! +CortexA15_0: GEL Output: --->>> EVE4SS Initialization is DONE! <<<--- +CortexA15_0: GEL Output: --->>> IVAHD Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: DEBUG: Clock is active ... +CortexA15_0: GEL Output: --->>> IVAHD Initialization is DONE! ... <<<--- +CortexA15_0: GEL Output: --->>> PRUSS 1 and 2 Initialization is in progress ... <<<--- +CortexA15_0: GEL Output: --->>> PRUSS 1 and 2 Initialization is in complete ... <<<--- + vayu_init.c /* + * Copyright (C) 2013, Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file vayu_init.c + * + * @brief + * Do all necessary board level initialization for NDK example. + * + */ + + +/*---------------------------------------------------------------------------*\ +| Header Files | +\*---------------------------------------------------------------------------*/ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ + +/* NDK Dependencies */ +#include + +/* NSP Dependencies */ +#include + +/* Project dependency headers */ + + +/*---------------------------------------------------------------------------*\ +| Extern Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Macros/Defines | +\*---------------------------------------------------------------------------*/ + +#define PAB_MII (1) /* Eric: Modify for MII mode: #define PAB_MII (0) */ +#define PAB_RMII (0) + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +/* I/O Delay related registers */ +#define CFG_IO_DELAY_UNLOCK_KEY (0x0000AAAA) +#define CFG_IO_DELAY_LOCK_KEY (0x0000AAAB) + +#define CFG_IO_DELAY_ACCESS_PATTERN (0x00029000) +#define CFG_IO_DELAY_LOCK_MASK (0x400) + +#define CFG_IO_DELAY_BASE (0x4844A000) +#define CFG_IO_DELAY_LOCK (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x02C)) +#define CFG_RGMII0_TXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x74C)) +#define CFG_RGMII0_TXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x758)) +#define CFG_RGMII0_TXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x764)) +#define CFG_RGMII0_TXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x770)) +#define CFG_RGMII0_TXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x77C)) +#define CFG_VIN2A_D13_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA7C)) +#define CFG_VIN2A_D17_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAAC)) +#define CFG_VIN2A_D16_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAA0)) +#define CFG_VIN2A_D15_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA94)) +#define CFG_VIN2A_D14_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA88)) + +/* Eric: Add for MII mode */ +#define CFG_RGMII0_RXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x728)) // MII0:TX_EN +#define CFG_RGMII0_RXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x710)) // MII0:TXD_0 +#define CFG_RGMII0_RXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x71C)) // MII0:TXD_1 +#define CFG_RGMII0_RXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x734)) // MII0:TXD_2 +#define CFG_RGMII0_RXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x704)) // MII0:TXD_3 + + +/* PAD Configuration Registers */ +#define SYSCFG_PAD_RGMII0_TXCTL (*(volatile uint32_t*)(0x4A003654)) +#define SYSCFG_PAD_RGMII0_TXD3 (*(volatile uint32_t*)(0x4A003658)) +#define SYSCFG_PAD_RGMII0_TXD2 (*(volatile uint32_t*)(0x4A00365C)) +#define SYSCFG_PAD_RGMII0_TXD1 (*(volatile uint32_t*)(0x4A003660)) +#define SYSCFG_PAD_RGMII0_TXD0 (*(volatile uint32_t*)(0x4A003664)) +#define SYSCFG_PAD_VIN2A_D13 (*(volatile uint32_t*)(0x4A00359C)) +#define SYSCFG_PAD_VIN2A_D14 (*(volatile uint32_t*)(0x4A0035A0)) +#define SYSCFG_PAD_VIN2A_D15 (*(volatile uint32_t*)(0x4A0035A4)) +#define SYSCFG_PAD_VIN2A_D16 (*(volatile uint32_t*)(0x4A0035A8)) +#define SYSCFG_PAD_VIN2A_D17 (*(volatile uint32_t*)(0x4A0035AC)) + +/* Eric: Add for MII mode */ +#define SYSCFG_PAD_RGMII0_RXD2 (*(volatile uint32_t*)(0x4A003674)) // MII0:TX_EN +#define SYSCFG_PAD_RGMII0_RXD0 (*(volatile uint32_t*)(0x4A00367C)) // MII0:TXD_0 +#define SYSCFG_PAD_RGMII0_RXD1 (*(volatile uint32_t*)(0x4A003678)) // MII0:TXD_1 +#define SYSCFG_PAD_RGMII0_RXD3 (*(volatile uint32_t*)(0x4A003670)) // MII0:TXD_2 +#define SYSCFG_PAD_RGMII0_RXCTL (*(volatile uint32_t*)(0x4A00366C)) // MII0:TXD_3 + + +#define CTRL_MODULE_CTRL_WKUP_ID_CODE (*(volatile uint32_t*)(0x4AE0C204)) +#define CTRL_MODULE_CTRL_CORE_SMA_SW_1 (*(volatile uint32_t*) (0x4A002534)) + +/*---------------------------------------------------------------------------*\ +| Local Typedefs/Enums | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Declarations | +\*---------------------------------------------------------------------------*/ + +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ); + + +/*---------------------------------------------------------------------------*\ +| Local Variable Declarations | +\*---------------------------------------------------------------------------*/ + +/* This string array corresponds to link state */ +static char *LinkStr[] = { "No Link", + "None", + "10Mb/s Half Duplex", + "10Mb/s Full Duplex", + "100Mb/s Half Duplex", + "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", /*not suported*/ + "1000Mb/s Full Duplex"}; + + +/*---------------------------------------------------------------------------*\ +| Global Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Function Definitions | +\*---------------------------------------------------------------------------*/ +/** + * \brief This API provides the Silicon Rev Value. + * + * \param None. + * + * \return Silicon Revision. + * + * \note For TDA2xx + * 0: Silicon Rev 1.0 + * 1: Silicon Rev 1.1 + * 2: Silicon Rev 2.0 + * For TDA3xx + * 0: Silicon Rev 1.0 + **/ +uint32_t PlatformGetSiliconRev(void) +{ + uint32_t siliconRev; + + siliconRev = CTRL_MODULE_CTRL_WKUP_ID_CODE; + + siliconRev = (siliconRev & 0xF0000000U) >> 28U; + + return (siliconRev); +} + +/* + * We changed our CFG file to point call this private init + * function. Here we initialize our some particulars for + * our board/device. + */ +void vayu_init( void ) +{ +#if ((PAB_MII != 1) && (PAB_RMII != 1)) + uint32_t regValue, delta, coarse, fine; + /* + * We do I/O delay adjustments only if GMAC internal delays are enabled. + * With TDA2xx & TDA2EX PG2.0 the option of disabling internal delays is + * added. SBL will disable the internal delays if siliconRev is 2 so no need + * to adjust I/O delay here. + */ + if (2U != PlatformGetSiliconRev()) + { + /* + * Adjust I/O delays on the Tx control and data lines of each MAC port. This is + * a workaround in order to work properly with the DP83865 PHYs on the EVM. In 3COM + * RGMII mode this PHY applies it's own internal clock delay, so we essentially need to + * counteract the DRA7xx internal delay, and we do this by delaying the control and + * data lines. If not using this PHY, you probably don't need to do this stuff! + */ + + /* Global unlock for I/O Delay registers */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; + + /* Tweaks to RGMII0 Tx Control and Data */ + CFG_RGMII0_TXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXCTL = (SYSCFG_PAD_RGMII0_TXCTL & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXCTL_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXCTL_OUT = regValue; + + CFG_RGMII0_TXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD0 = (SYSCFG_PAD_RGMII0_TXD0 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD0_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD0_OUT = regValue; + + CFG_RGMII0_TXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD1 = (SYSCFG_PAD_RGMII0_TXD1 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD1_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD1_OUT = regValue; + + CFG_RGMII0_TXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD2 = (SYSCFG_PAD_RGMII0_TXD2 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD2_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD2_OUT = regValue; + + CFG_RGMII0_TXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD3 = (SYSCFG_PAD_RGMII0_TXD3 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD3_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD3_OUT = regValue; + + + /* Tweaks to RGMII1 Tx Control and Data */ + CFG_VIN2A_D13_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D13 = (SYSCFG_PAD_VIN2A_D13 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_VIN2A_D13_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D13_OUT = regValue; + + CFG_VIN2A_D17_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D17 = (SYSCFG_PAD_VIN2A_D17 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; + regValue = CFG_VIN2A_D17_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D17_OUT = regValue; + + CFG_VIN2A_D16_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D16 = (SYSCFG_PAD_VIN2A_D16 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x2; + regValue = CFG_VIN2A_D16_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D16_OUT = regValue; + + CFG_VIN2A_D15_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D15 = (SYSCFG_PAD_VIN2A_D15 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D15_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D15_OUT = regValue; + + CFG_VIN2A_D14_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D14 = (SYSCFG_PAD_VIN2A_D14 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D14_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D14_OUT = regValue; + + /* Global lock */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; + } + else + { + /* Disable RGMII half cycle delay for ES2.0 silicon */ + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + /* Disable half cycle delay for RGMII0 */ + regValue |= (0x1 << 25U); + /* Disable half cycle delay for RGMII1 */ + regValue |= (0x1 << 26U); + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; + } +#endif + + /* Eric: Add for MII mode start */ +#if (PAB_MII == 1) + + uint32_t regValue, delta, coarse, fine; + + /* Global unlock for I/O Delay registers */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; + + /* Tweaks to RGMII0 Tx Control and Data */ + CFG_RGMII0_RXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_RXD2 = (SYSCFG_PAD_RGMII0_RXD2 & ~0xF) | 0x3; /* 0x3: mii0_txen */ + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_RXD2_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_RXD2_OUT = regValue; + + CFG_RGMII0_RXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_RXD0 = (SYSCFG_PAD_RGMII0_RXD0 & ~0xF) | 0x3; /* 0x3: mii0_txd0 */ + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_RXD0_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_RXD0_OUT = regValue; + + CFG_RGMII0_RXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_RXD1 = (SYSCFG_PAD_RGMII0_RXD1 & ~0xF) | 0x3; /* 0x3: mii0_txd1 */ + delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_RXD1_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_RXD1_OUT = regValue; + + CFG_RGMII0_RXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_RXD3 = (SYSCFG_PAD_RGMII0_RXD3 & ~0xF) | 0x3; /* 0x3: mii0_txd2 */ + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_RXD3_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_RXD3_OUT = regValue; + + CFG_RGMII0_RXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_RXCTL = (SYSCFG_PAD_RGMII0_RXCTL & ~0xF) | 0x3; /* 0x3: mii0_txd3 */ + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_RXCTL_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_RXCTL_OUT = regValue; + + /* Global lock */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; + + /* Eric: Add for MII mode End */ +#endif +} + +/* + * GMACSW_getConfig() + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + */ +GMACSW_Config *GMACSW_getConfig(void) +{ + int i = 0; + uint8_t macAddr[6]; + + /* Get digital loopback starting config */ + GMACSW_Config *pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); + + /* Update default config with the correct MAC addresses */ + for(i=0; i<(pGMACSWConfig->activeMACPortCount); i++) + { + if (0==i) + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); + } + else + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); + } + + printf("\nMAC Port %d Address:\n\t%02x-%02x-%02x-%02x-%02x-%02x\n", i, + macAddr[0], macAddr[1], macAddr[2], + macAddr[3], macAddr[4], macAddr[5]); + + /* Copy the correct MAC address into the driver config */ + memcpy( (void *)&(pGMACSWConfig->macInitCfg[i].macAddr[0]), (void *)&macAddr[0], 6 ); + +#if ((PAB_MII == 1) || (PAB_RMII == 1)) + /* + * Adjust the PHY mask numbers for the Vayu PAB. The first MAC + * port is connected to a PHY with address = 3, the second MAC + * port is connected to a PHY with address = 2. + */ + pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 - i); +#else + /* + * Adjust the PHY mask numbers for the Vayu EVM. The first MAC + * port is connected to a PHY with address = 2, the second MAC + * port is connected to a PHY with address = 3. + */ + pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (2 + i); +#endif + +#if (PAB_MII == 1) + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_MII_100; +#elif (PAB_RMII == 1) + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RMII_100; +#else + /* + * National PHY on Vayu EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; +#endif + } + + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + + /* Return the config */ + return pGMACSWConfig; +} + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + +/* + * LOCAL_linkStatus() + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + printf("Link Status: %s on PHY %" PRIu32 "\n",LinkStr[linkStatus],phy); +} + + +/*---------------------------------------------------------------------------*\ +| End of File | +\*---------------------------------------------------------------------------*/ + +Hello Eric, Thanks for very details information. It is very much useful. I reviewed your PAD config and NSP data log files. As I see in the NSP log, the MDIO is not detecting the MII PHYs. And this is because PAD configuration for MDIO PADs not happening correctly. If you see in the gel file "TDA2xx_PAD_GmacSw_EVM_MDIO_Config" configures SYSCFG_PAD_MDIO_MCLK(line 3446) and SYSCFG_PAD_MDIO_D(3454) but these PADs you are also using for MII mode. So you will need to modify this function for adding configuration VIN2A_D10 (line 1458) and VIN2A_D11(line 1469) which on your board you are using for MDIO. Once you do this please check if you are able to detect PHY when run NSP application. You should see something like below message Link Status: 100Mb/s Full Duplex on PHY 2 Once this is done, we can see if data transfer is happening correctly. If not, we can check stats registers to see what kind of errors are coming on receive. Also I see you have made changes for IO delay in MII mode. I am assuming you are using these values from correct Data manual for SR you are using. Also you are applying delays only for RX data lines. Let me know. + +Hi Prasad, I modified this configuration MDIO_MCLK and MDIO_D in the function "TDA2xx_PAD_GmacSw_PAB_MDIO_Config" with SYSCFG_PAD_VIN2A_D10 (L:3446) and SYSCFG_PAD_VIN2A_D11(L:3454) hotmenu TDA2xx_PAD_GmacSw_PAB_MDIO_Config() { GEL_TextOut("\t--->>> TDA2xx Begin GMAC_SW MDIO Pad Configuration <<<---\n"); /* MDIO (2 pads) */ SYSCFG_WR_CFG_PAD (SYSCFG_PAD_VIN2A_D10, SYSCFG_PAD_VIN2A_D10_MDIO_MCLK, SYSCFG_PULLUD_ENABLE_ENABLE, SYSCFG_PULLTYPE_SELECT_PULLUP, SYSCFG_INPUT_ENABLE_DISABLE, SYSCFG_SLEW_CONTROL_NA, SYSCFG_WAKEUP_ENABLE_DISABLE); SYSCFG_WR_CFG_PAD (SYSCFG_PAD_VIN2A_D11, SYSCFG_PAD_VIN2A_D11_MDIO_D, SYSCFG_PULLUD_ENABLE_ENABLE, SYSCFG_PULLTYPE_SELECT_PULLUP, SYSCFG_INPUT_ENABLE_ENABLE, SYSCFG_SLEW_CONTROL_NA, SYSCFG_WAKEUP_ENABLE_DISABLE); GEL_TextOut("\t--->>> TDA2xx End GMAC_SW MDIO Pad Configuration <<<---\n"); } Log that apply VIN2A_D10 and VIN2A_D11: [Cortex_M4_IPU1_C0] MAC Port 0 Address: d0-b5-c2-5b-42-ee MAC Port 1 Address: d0-b5-c2-5b-42-ef GMACSW has been started successfully Registration of the GMACSW Successful Service Status: DHCPC : Enabled : : 000 Service Status: Telnet : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: DHCPC : Enabled : Running : 000 Service Status: DHCPC : Enabled : Fault : 002 <- New log But, I can not see this line. Link Status: 100Mb/s Full Duplex on PHY 2 Which register I should check for error status? ------------------------------------------------------------------------------------------------------------- About I/O delay setting, I see only "Tx Control and Data" was set for RGMII mode in vayu_init.c. CFG_RGMII0_TXCTL_OUT //RGMII: rgmii0_txctl CFG_RGMII0_TXD0_OUT //RMIII: rgmii0_txd0 CFG_RGMII0_TXD1_OUT //RMIII: rgmii0_txd1 CFG_RGMII0_TXD2_OUT //RMIII: rgmii0_txd2 CFG_RGMII0_TXD3_OUT //RMIII: rgmii0_txd3 So, I also only set I/O delay for Tx Control and Data for MII mode in my board. But "I/O delay value" should be wrong. CFG_RGMII0_RXD2_OUT //MII: mii0_txen delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ CFG_RGMII0_RXD0_OUT //MII: mii0_txd0 delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ CFG_RGMII0_RXD1_OUT //MII:mii0_txd1 delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ CFG_RGMII0_RXD3_OUT //MII: mii0_txd2 delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ CFG_RGMII0_RXCTL_OUT //MII: mii0_txd3 delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ My board used dp83848q(in attachment) as Ethernet phy. Which pin I need to set for I/O delay value? 4174.TDA2xx_pad_config.gel NSPLog2.txt [Cortex_M4_IPU1_C0] +MAC Port 0 Address: + d0-b5-c2-5b-42-ee + +MAC Port 1 Address: + d0-b5-c2-5b-42-ef +GMACSW has been started successfully +Registration of the GMACSW Successful +Service Status: DHCPC : Enabled : : 000 +Service Status: Telnet : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: HTTP : Enabled : : 000 +Service Status: DHCPC : Enabled : Running : 000 +Service Status: DHCPC : Enabled : Fault : 002 + dp83848q-q1.pdf + +Hello Eric, The MDIO PHY link status and PHY_ALIVE registers will tell you if PHYs are detected. Check for 0x4848_5008 and 0x4848_500C for it. 0x4848_5008 should have bit set to 1 for your PHY address. If this bit is not set then issue is in PAD config or MDIO wiring on EVM. Now if bit is set then calculate PHY address and modify NSP vayu_init.c line 486 for that PHY address mask. This should enable the PHY detect print. #if ((PAB_MII == 1) || (PAB_RMII == 1)) /* * Adjust the PHY mask numbers for the Vayu PAB. The first MAC * port is connected to a PHY with address = 3, the second MAC * port is connected to a PHY with address = 2. */ pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 - i); #else Now coming to delay we have delay only for TX due to PHY issue on TDA2 EVM so only delay applied on TX. As of now i would suggest you to remove all delays altogether for MII. Once we get PHY detected and data transfer happening, i will tell the stats addresses to look if we'll need any delay + +Hi Prasad, I dump 0x4848_5008 and 0x4848_500C register. These values are show as follow: 0x4848_5008 register value is 00000001 0x4848_500C register value is 00000001 I also modified vayu_init.c as follow. 2744.vayu_init.c /* + * Copyright (C) 2013, Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file vayu_init.c + * + * @brief + * Do all necessary board level initialization for NDK example. + * + */ + + +/*---------------------------------------------------------------------------*\ +| Header Files | +\*---------------------------------------------------------------------------*/ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ + +/* NDK Dependencies */ +#include + +/* NSP Dependencies */ +#include + +/* Project dependency headers */ + + +/*---------------------------------------------------------------------------*\ +| Extern Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Macros/Defines | +\*---------------------------------------------------------------------------*/ + +#define PAB_MII (1) /* Eric: Modify for MII mode: #define PAB_MII (0) */ +#define PAB_RMII (0) + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +/* I/O Delay related registers */ +#define CFG_IO_DELAY_UNLOCK_KEY (0x0000AAAA) +#define CFG_IO_DELAY_LOCK_KEY (0x0000AAAB) + +#define CFG_IO_DELAY_ACCESS_PATTERN (0x00029000) +#define CFG_IO_DELAY_LOCK_MASK (0x400) + +#define CFG_IO_DELAY_BASE (0x4844A000) +#define CFG_IO_DELAY_LOCK (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x02C)) +#define CFG_RGMII0_TXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x74C)) +#define CFG_RGMII0_TXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x758)) +#define CFG_RGMII0_TXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x764)) +#define CFG_RGMII0_TXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x770)) +#define CFG_RGMII0_TXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x77C)) +#define CFG_VIN2A_D13_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA7C)) +#define CFG_VIN2A_D17_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAAC)) +#define CFG_VIN2A_D16_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAA0)) +#define CFG_VIN2A_D15_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA94)) +#define CFG_VIN2A_D14_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA88)) + +///* Eric: Add for MII mode */ +//#define CFG_RGMII0_RXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x728)) // MII0:TX_EN +//#define CFG_RGMII0_RXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x710)) // MII0:TXD_0 +//#define CFG_RGMII0_RXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x71C)) // MII0:TXD_1 +//#define CFG_RGMII0_RXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x734)) // MII0:TXD_2 +//#define CFG_RGMII0_RXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x704)) // MII0:TXD_3 + + +/* PAD Configuration Registers */ +#define SYSCFG_PAD_RGMII0_TXCTL (*(volatile uint32_t*)(0x4A003654)) +#define SYSCFG_PAD_RGMII0_TXD3 (*(volatile uint32_t*)(0x4A003658)) +#define SYSCFG_PAD_RGMII0_TXD2 (*(volatile uint32_t*)(0x4A00365C)) +#define SYSCFG_PAD_RGMII0_TXD1 (*(volatile uint32_t*)(0x4A003660)) +#define SYSCFG_PAD_RGMII0_TXD0 (*(volatile uint32_t*)(0x4A003664)) +#define SYSCFG_PAD_VIN2A_D13 (*(volatile uint32_t*)(0x4A00359C)) +#define SYSCFG_PAD_VIN2A_D14 (*(volatile uint32_t*)(0x4A0035A0)) +#define SYSCFG_PAD_VIN2A_D15 (*(volatile uint32_t*)(0x4A0035A4)) +#define SYSCFG_PAD_VIN2A_D16 (*(volatile uint32_t*)(0x4A0035A8)) +#define SYSCFG_PAD_VIN2A_D17 (*(volatile uint32_t*)(0x4A0035AC)) + +///* Eric: Add for MII mode */ +//#define SYSCFG_PAD_RGMII0_RXD2 (*(volatile uint32_t*)(0x4A003674)) // MII0:TX_EN +//#define SYSCFG_PAD_RGMII0_RXD0 (*(volatile uint32_t*)(0x4A00367C)) // MII0:TXD_0 +//#define SYSCFG_PAD_RGMII0_RXD1 (*(volatile uint32_t*)(0x4A003678)) // MII0:TXD_1 +//#define SYSCFG_PAD_RGMII0_RXD3 (*(volatile uint32_t*)(0x4A003670)) // MII0:TXD_2 +//#define SYSCFG_PAD_RGMII0_RXCTL (*(volatile uint32_t*)(0x4A00366C)) // MII0:TXD_3 + + +#define CTRL_MODULE_CTRL_WKUP_ID_CODE (*(volatile uint32_t*)(0x4AE0C204)) +#define CTRL_MODULE_CTRL_CORE_SMA_SW_1 (*(volatile uint32_t*) (0x4A002534)) + +/*---------------------------------------------------------------------------*\ +| Local Typedefs/Enums | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Declarations | +\*---------------------------------------------------------------------------*/ + +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ); + + +/*---------------------------------------------------------------------------*\ +| Local Variable Declarations | +\*---------------------------------------------------------------------------*/ + +/* This string array corresponds to link state */ +static char *LinkStr[] = { "No Link", + "None", + "10Mb/s Half Duplex", + "10Mb/s Full Duplex", + "100Mb/s Half Duplex", + "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", /*not suported*/ + "1000Mb/s Full Duplex"}; + + +/*---------------------------------------------------------------------------*\ +| Global Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Function Definitions | +\*---------------------------------------------------------------------------*/ +/** + * \brief This API provides the Silicon Rev Value. + * + * \param None. + * + * \return Silicon Revision. + * + * \note For TDA2xx + * 0: Silicon Rev 1.0 + * 1: Silicon Rev 1.1 + * 2: Silicon Rev 2.0 + * For TDA3xx + * 0: Silicon Rev 1.0 + **/ +uint32_t PlatformGetSiliconRev(void) +{ + uint32_t siliconRev; + + siliconRev = CTRL_MODULE_CTRL_WKUP_ID_CODE; + + siliconRev = (siliconRev & 0xF0000000U) >> 28U; + + return (siliconRev); +} + +/* + * We changed our CFG file to point call this private init + * function. Here we initialize our some particulars for + * our board/device. + */ +void vayu_init( void ) +{ +#if ((PAB_MII != 1) && (PAB_RMII != 1)) + uint32_t regValue, delta, coarse, fine; + /* + * We do I/O delay adjustments only if GMAC internal delays are enabled. + * With TDA2xx & TDA2EX PG2.0 the option of disabling internal delays is + * added. SBL will disable the internal delays if siliconRev is 2 so no need + * to adjust I/O delay here. + */ + if (2U != PlatformGetSiliconRev()) + { + /* + * Adjust I/O delays on the Tx control and data lines of each MAC port. This is + * a workaround in order to work properly with the DP83865 PHYs on the EVM. In 3COM + * RGMII mode this PHY applies it's own internal clock delay, so we essentially need to + * counteract the DRA7xx internal delay, and we do this by delaying the control and + * data lines. If not using this PHY, you probably don't need to do this stuff! + */ + + /* Global unlock for I/O Delay registers */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; + + /* Tweaks to RGMII0 Tx Control and Data */ + CFG_RGMII0_TXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXCTL = (SYSCFG_PAD_RGMII0_TXCTL & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXCTL_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXCTL_OUT = regValue; + + CFG_RGMII0_TXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD0 = (SYSCFG_PAD_RGMII0_TXD0 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD0_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD0_OUT = regValue; + + CFG_RGMII0_TXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD1 = (SYSCFG_PAD_RGMII0_TXD1 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD1_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD1_OUT = regValue; + + CFG_RGMII0_TXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD2 = (SYSCFG_PAD_RGMII0_TXD2 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD2_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD2_OUT = regValue; + + CFG_RGMII0_TXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD3 = (SYSCFG_PAD_RGMII0_TXD3 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD3_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD3_OUT = regValue; + + + /* Tweaks to RGMII1 Tx Control and Data */ + CFG_VIN2A_D13_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D13 = (SYSCFG_PAD_VIN2A_D13 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_VIN2A_D13_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D13_OUT = regValue; + + CFG_VIN2A_D17_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D17 = (SYSCFG_PAD_VIN2A_D17 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; + regValue = CFG_VIN2A_D17_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D17_OUT = regValue; + + CFG_VIN2A_D16_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D16 = (SYSCFG_PAD_VIN2A_D16 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x2; + regValue = CFG_VIN2A_D16_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D16_OUT = regValue; + + CFG_VIN2A_D15_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D15 = (SYSCFG_PAD_VIN2A_D15 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D15_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D15_OUT = regValue; + + CFG_VIN2A_D14_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D14 = (SYSCFG_PAD_VIN2A_D14 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D14_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D14_OUT = regValue; + + /* Global lock */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; + } + else + { + /* Disable RGMII half cycle delay for ES2.0 silicon */ + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + /* Disable half cycle delay for RGMII0 */ + regValue |= (0x1 << 25U); + /* Disable half cycle delay for RGMII1 */ + regValue |= (0x1 << 26U); + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; + } +#endif + +// /* Eric: Add for MII mode start */ +//#if (PAB_MII == 1) +// +// uint32_t regValue, delta, coarse, fine; +// +// /* Global unlock for I/O Delay registers */ +// CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; +// +// /* Tweaks to RGMII0 Tx Control and Data */ +// CFG_RGMII0_RXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); +// SYSCFG_PAD_RGMII0_RXD2 = (SYSCFG_PAD_RGMII0_RXD2 & ~0xF) | 0x3; /* 0x3: mii0_txen */ +// delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ +// regValue = CFG_RGMII0_RXD2_OUT & ~0xFFFFFC00; +// coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); +// coarse = (coarse > 0x1F) ? (0x1F) : (coarse); +// fine = (regValue & 0x1F) + (delta & 0x1F); +// fine = (fine > 0x1F) ? (0x1F) : (fine); +// regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); +// CFG_RGMII0_RXD2_OUT = regValue; +// +// CFG_RGMII0_RXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); +// SYSCFG_PAD_RGMII0_RXD0 = (SYSCFG_PAD_RGMII0_RXD0 & ~0xF) | 0x3; /* 0x3: mii0_txd0 */ +// delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ +// regValue = CFG_RGMII0_RXD0_OUT & ~0xFFFFFC00; +// coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); +// coarse = (coarse > 0x1F) ? (0x1F) : (coarse); +// fine = (regValue & 0x1F) + (delta & 0x1F); +// fine = (fine > 0x1F) ? (0x1F) : (fine); +// regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); +// CFG_RGMII0_RXD0_OUT = regValue; +// +// CFG_RGMII0_RXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); +// SYSCFG_PAD_RGMII0_RXD1 = (SYSCFG_PAD_RGMII0_RXD1 & ~0xF) | 0x3; /* 0x3: mii0_txd1 */ +// delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ +// regValue = CFG_RGMII0_RXD1_OUT & ~0xFFFFFC00; +// coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); +// coarse = (coarse > 0x1F) ? (0x1F) : (coarse); +// fine = (regValue & 0x1F) + (delta & 0x1F); +// fine = (fine > 0x1F) ? (0x1F) : (fine); +// regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); +// CFG_RGMII0_RXD1_OUT = regValue; +// +// CFG_RGMII0_RXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); +// SYSCFG_PAD_RGMII0_RXD3 = (SYSCFG_PAD_RGMII0_RXD3 & ~0xF) | 0x3; /* 0x3: mii0_txd2 */ +// delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ +// regValue = CFG_RGMII0_RXD3_OUT & ~0xFFFFFC00; +// coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); +// coarse = (coarse > 0x1F) ? (0x1F) : (coarse); +// fine = (regValue & 0x1F) + (delta & 0x1F); +// fine = (fine > 0x1F) ? (0x1F) : (fine); +// regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); +// CFG_RGMII0_RXD3_OUT = regValue; +// +// CFG_RGMII0_RXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); +// SYSCFG_PAD_RGMII0_RXCTL = (SYSCFG_PAD_RGMII0_RXCTL & ~0xF) | 0x3; /* 0x3: mii0_txd3 */ +// delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ +// regValue = CFG_RGMII0_RXCTL_OUT & ~0xFFFFFC00; +// coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); +// coarse = (coarse > 0x1F) ? (0x1F) : (coarse); +// fine = (regValue & 0x1F) + (delta & 0x1F); +// fine = (fine > 0x1F) ? (0x1F) : (fine); +// regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); +// CFG_RGMII0_RXCTL_OUT = regValue; +// +// /* Global lock */ +// CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; +// +// /* Eric: Add for MII mode End */ +//#endif +} + +/* + * GMACSW_getConfig() + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + */ +GMACSW_Config *GMACSW_getConfig(void) +{ + int i = 0; + uint8_t macAddr[6]; + + /* Get digital loopback starting config */ + GMACSW_Config *pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); + + /* Update default config with the correct MAC addresses */ + for(i=0; i<(pGMACSWConfig->activeMACPortCount); i++) + { + if (0==i) + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); + } + else + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); + } + + printf("\nMAC Port %d Address:\n\t%02x-%02x-%02x-%02x-%02x-%02x\n", i, + macAddr[0], macAddr[1], macAddr[2], + macAddr[3], macAddr[4], macAddr[5]); + + /* Copy the correct MAC address into the driver config */ + memcpy( (void *)&(pGMACSWConfig->macInitCfg[i].macAddr[0]), (void *)&macAddr[0], 6 ); + +#if ((PAB_MII == 1) || (PAB_RMII == 1)) + /* + * Adjust the PHY mask numbers for the Vayu PAB. The first MAC + * port is connected to a PHY with address = 3, the second MAC + * port is connected to a PHY with address = 2. + */ +// pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 - i); + pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (2 - i); +#else + /* + * Adjust the PHY mask numbers for the Vayu EVM. The first MAC + * port is connected to a PHY with address = 2, the second MAC + * port is connected to a PHY with address = 3. + */ +// pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (2 + i); + pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 + i); +#endif + +#if (PAB_MII == 1) + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_MII_100; +#elif (PAB_RMII == 1) + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RMII_100; +#else + /* + * National PHY on Vayu EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; +#endif + } + + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + + /* Return the config */ + return pGMACSWConfig; +} + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + +/* + * LOCAL_linkStatus() + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + printf("Link Status: %s on PHY %" PRIu32 "\n",LinkStr[linkStatus],phy); +} + + +/*---------------------------------------------------------------------------*\ +| End of File | +\*---------------------------------------------------------------------------*/ + Due to I defined PAB_MII to 1 in Line72, the code slice(Line473~Line489) should be executed in "#if" section, not "#else" section. 1. #define PAB_MII (1) /* Eric: Modify for MII mode: #define PAB_MII (0) */ 2. #if ((PAB_MII == 1) || (PAB_RMII == 1)) /* * Adjust the PHY mask numbers for the Vayu PAB. The first MAC * port is connected to a PHY with address = 3, the second MAC * port is connected to a PHY with address = 2. */ // pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 - i); pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (2 - i); #else /* * Adjust the PHY mask numbers for the Vayu EVM. The first MAC * port is connected to a PHY with address = 2, the second MAC * port is connected to a PHY with address = 3. */ // pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (2 + i); pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << (3 + i); #endif 3. remove all i/o delay setting for MII. I try to set PHY address mask to 2 or 3 (Line479 and Line480). But the result is the same. No PHY detect print. Are there any other registers I need to check? + +Hello Eric, As registers shows your PHY is getting detected but NSP not able to detect PHY due to incorrect PHY mask. Change your PHY mask setting in vayu_init() to below pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << i; This will set PHY correct PHY mask as your PHY address is 0 (first bit) + +Hi Prasad, After change PHY mask setting in vayu_init.c pGMACSWConfig->macInitCfg[i].phyMask = 0x1 << i; Application can print PHY detect status. Log as follow: ----------------------------------------------------------------------------------My Board [Cortex_M4_IPU1_C0] MAC Port 0 Address: d0-b5-c2-5b-42-ee MAC Port 1 Address: d0-b5-c2-5b-42-ef GMACSW has been started successfully Registration of the GMACSW Successful Service Status: DHCPC : Enabled : : 000 Service Status: Telnet : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: DHCPC : Enabled : Running : 000 PHY: 0, NegMode 01E1, NWAYadvertise 01E1, NWAYREadvertise 43E1 Negotiated connection: FullDuplex 100 Mbs Link Status: 100Mb/s Full Duplex on PHY 0 <--------wait 50 seconds..... Service Status: DHCPC : Enabled : Fault : 002 <--------hang on this point. ---------------------------------------------------------------------------------Ti EVM [Cortex_M4_IPU1_C0] MAC Port 0 Address: d4-f5-13-b4-62-90 MAC Port 1 Address: d4-f5-13-b4-62-91 GMACSW has been started successfully Registration of the GMACSW Successful Service Status: DHCPC : Enabled : : 000 Service Status: Telnet : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: HTTP : Enabled : : 000 Service Status: DHCPC : Enabled : Running : 000 PHY: 2, NegMode 01E1, NWAYadvertise 01E1, NWAYREadvertise 43E1 Negotiated connection: FullDuplex 100 Mbs Link Status: 100Mb/s Full Duplex on PHY 2 Network Added: If-1:192.168.213.7 <--------------Get IP from DHCP Service Status: DHCPC : Enabled : Running : 017 How can my board get IP from DHCP server like Ti EVM? Any register I need to set? + +Eric, Ok, now that we are able to detect PHY, we can go ahead with data transfer debug. From logs as DHCP is faulting Rx/Tx is not happening correctly. Can you let me know contents of register 0x4848_4900 till 0x4848_498c (snapshot should be fine) + +Hi Prasad, snapshot as follow: + +Hello Eric, Data movement is not happening at all. This may be because of PAD not configured correctly or some board issue. Can you please cross check PAD values are correctly programmed in registers? Next step would be to probe rx/tx signals if any toggles happening there. Meanwhile check contents of registers 0x4848_4D84, 0x4848_4D88 & 0x4848_4DC4 & 0x4848_4DC8 + +Hi Prasad, I check PAD value. These setting are from TDA2xx_PAD_GmacSw_PAB_MDIO_Config and TDA2xx_PAD_GmacSw_PAB_MII0_Config in TDA2xx_pad_config.gel. It seems ok. ------------------------------------------------------------------------------------------- dp83848q tda2x pad Addr value MDC CTRL_CORE_PAD_VIN2A_D10 RW 32 0x0000 1590 0x4A00 3590 0x00030003 MDIO CTRL_CORE_PAD_VIN2A_D11 RW 32 0x0000 1594 0x4A00 3594 0x00070003 TXD_0 CTRL_CORE_PAD_RGMII0_RXD0 RW 32 0x0000 167C 0x4A00 367C 0x00010003 TXD_1 CTRL_CORE_PAD_RGMII0_RXD1 RW 32 0x0000 1678 0x4A00 3678 0x00010003 TXD_2 CTRL_CORE_PAD_RGMII0_RXD3 RW 32 0x0000 1670 0x4A00 3670 0x00010003 TXD_3 CTRL_CORE_PAD_RGMII0_RXCTL RW 32 0x0000 166C 0x4A00 366C 0x00010003 TX_EN CTRL_CORE_PAD_RGMII0_RXD2 RW 32 0x0000 1674 0x4A00 3674 0x00010003 TX_CLK CTRL_CORE_PAD_RGMII0_RXC RW 32 0x0000 1668 0x4A00 3668 0x00060003 TX_ER CTRL_CORE_PAD_MDIO_D RW 32 0x0000 1640 0x4A00 3640 0x00090003 RXD_0 CTRL_CORE_PAD_RGMII0_TXD0 RW 32 0x0000 1664 0x4A00 3664 0x00040003 RXD_1 CTRL_CORE_PAD_RGMII0_TXD1 RW 32 0x0000 1660 0x4A00 3660 0x00040003 RXD_3 CTRL_CORE_PAD_RGMII0_TXCTL RW 32 0x0000 1654 0x4A00 3654 0x00040003 RXD_3 CTRL_CORE_PAD_RGMII0_TXC RW 32 0x0000 1650 0x4A00 3650 0x00040003 RX_DV CTRL_CORE_PAD_UART3_RXD RW 32 0x0000 1648 0x4A00 3648 0x000C0003 CRS CTRL_CORE_PAD_RGMII0_TXD3 RW 32 0x0000 1658 0x4A00 3658 0x00040003 RX_CLK CTRL_CORE_PAD_UART3_TXD RW 32 0x0000 164C 0x4A00 364C 0x000E0003 RX_ER CTRL_CORE_PAD_RGMII0_TXD2 RW 32 0x0000 165C 0x4A00 365C 0x00040003 COL CTRL_CORE_PAD_MDIO_MCLK RW 32 0x0000 163C 0x4A00 363C 0x000C0003 The first column is PHY name and the second column is tda2xx pad name. --------------------------------------------------------------------------------- After connect Target(ran gel file) After ran client application. 0x4848_4D84 0x00000000 0x00008039 0x4848_4D88 0x80000000 0x00000000 0x4848_4DC4 0x00000000 0x00000039 0x4848_4DC8 0x80000000 0x00000000 I also attach pad register snapshot. I also probe dp83848q pin signal. I list it as follow: Signal MDC High/Low toggle MDIO High/Low toggle TXD_0 Low TXD_1 Low TXD_2 Low TXD_3 Low TX_EN Low TX_CLK High TX_ER xxx RXD_0 Low RXD_1 Low RXD_3 Low RXD_3 Low RX_DV Low CRS Low RX_CLK High RX_ER High COL Low + +Hello Eric, 0x4848_4D88 should become non-zero after initialization. Only reason i see for that not happening is all pins not connected correctly. The signals you have probed are during idle time. What you have to do is run NSP example, put trigger for TX_EN and RX_DV and probe all other signals. See which all are toggling and which are not. I guess one of Pin might not be connected correctly or might have signal integrity issue etc. Are you using TDA2 EVM with MII PHY daughter board? Also what is your end application? is this for industrial use-case? Let me know. Meanwhile I will see if we can move this post to private E2E so i can share some NDA files for debug. Will let you know. + +Hi Prasad, About Pin connection issue, I will re-probe these pins (TX_EN and RX_DV and probe all other signals) from the "client" application start state to idle state and attach later. Are you using TDA2 EVM with MII PHY daughter board? Also what is your end application? is this for industrial use-case? -> No, I am using my board (our EE member design) with tda2xx and MII PHY. Not TDA2x EVM. -> For AVM application. ->No, for automotive. Meanwhile I will see if we can move this post to private E2E so i can share some NDA files for debug. Will let you know. -> Yes, but how? + +Hello Eric, Thanks for info. Though none of my concern I was wondering why in Automotive use-case you are using MII mode. Please confirm in schematic if all MII signals are connected correctly on your board. From my earlier experience this kind of issue can only come because of two reasons. 1. PAD Cfg not correct, which you have cross checked. 2. Board connection for data/control pin not done correctly. The CRC, alignment errors are due the delays and link stability but in your case we dont see any packet movement happening so we are not at this place yet. Anyway can you please contact your FAE/TI sales Support to get private E2E support? I have Ethernet debug test with which we can connect to Wireshark and analyse packet contents i can share. + +Hi Prasad, Attach the wave form of each pin for MII mode. I probed these pins from "client" application start to "client" application enter idle state. Except MDC and MDIO show H/L toggle, the other pin have no change and keep the same state. Phy pin Signal MDC High/Low toggle MDIO High/Low toggle TXD_0 Low TXD_1 Low TXD_2 Low TXD_3 Low TX_EN Low TX_CLK High TX_ER xxx RXD_0 Low RXD_1 Low RXD_3 Low RXD_3 Low RX_DV Low CRS Low RX_CLK High RX_ER High COL Low + +Hello Eric, MII data pins not toggling only suggests that board has some routing issue and signal not reaching PHY. At what point you are probing these signals? At PHY boundary or at TDA2 boundary? Also for enabling error frames processing add below line in vayu_init.c in function GMACSW_getConfig (line 472) pGMACSWConfig->macInitCfg[i].macModeFlags |= MAC_CONFIG_MODEFLG_PASSERROR | /* enable RX_CMF*/ MAC_CONFIG_MODEFLG_PASSCONTROL; /* enable RX_CSF,RX_CEF*/ Please check contents of 0x4848_4900 after this change. Many chances that it will be still non-zero but let us see. Also you can remove MDIO pins from probes as we know those are working. Regards, Prasad + +Hi Prasad, I probe these signals at PHY boundary. I also enable error frames processing in line 472. 0x4848_4900 have no change (at before and after running client application and idle state). + +Eric, You should probe signals at TDA2 boundary. I am suspecting the signal not reaching to PHY from TDA2 (issue in routing between TDA2 to PHY). Also I have asked your FAE if you can share board schematic. + +Hi Prasad, I will ask our EE member to probe PHY boundary. About board schematic, I mail to you. + +Just to confirm you mean TDA2 boundary right? + +Hi Prasad, This is Jack and I would like to show you the presence of the resistors on the board via a picture. regards, Jack + +Hello Jack, You can send picture on my mail id. Regards, Prasad + +Hello Eric, The DP83848 PHY when not configured through bootstraping for changing PHY address, takes PHY address 0 as default address. Also when all PHY ADDR bit (PHY_ADR0/4) are zero it works in MII isolate mode. This is causing data transfer not to happen. Change PHY address to 0x1 or any non-zero to remove MII isolate mode. This can be also be done through MDIO but through bootstraping is preferable. + diff --git a/data2/text/range/30001+/624239.txt b/data2/text/range/30001+/624239.txt new file mode 100644 index 0000000000000000000000000000000000000000..ca32eea09a481c6e1022ca4e7338578cbadb83dc --- /dev/null +++ b/data2/text/range/30001+/624239.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EVM5777: visual-sdk example: messageq_single.xem4 - where is the source code? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello *! I've got some trouble bringing up an "unusual" use-case on the TDA2-5777x eval board. I'm fighting with remoteproc booting the subcores with customer code compiled by gnu-toolchain. So far, I'm able to compile working code (checked with ccs and JTAG, binary load...), but something is throwing the error: "Data Access in User mode during Functional access" I didn't change the dts - stuff, so there must be something wrong in the custom build code. I would like to take a look to the "well running" code example, called: messageq_single.xem4 ...but: I can not find the sources... I grepped through the hole visual-sdk, nothing! No "cmd" or other file containing this name. I removed all "*.xem4" binaries -> "make clean all" after that... no "xem4" files have been build. I would be glad to take a look into "how this well running code" have been compiled... It's necessary to find the errors in my own code, which based on a "non supported" GNU-Build Makefile build environment, which will allow real bare metal programming of the subcores, without any "SYS/BIOS" or RTOS fragments. It's a hard job, I know! But I would be glad if I can lean on something existing, which works in another environment... Just to prohibit reinventing the wheel... TNX - Marco. + +Responses: +Additional information about the L3 custom Error: FIRST: omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 THEN after a while (some reboots of M4 core): 44000000.ocp:L3 Custom Error: MASTER IPU1 TARGET GPMC (Read): Data Access in User mode during Functional access What does that mean? Where to look out for the reason of this error? + +Full error log (dmesg): =================== [ 1050.717572] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 1050.717668] remoteproc remoteproc0: 58820000.ipu is available [ 1050.717679] remoteproc remoteproc0: Note: remoteproc is still under development and considered experimental. [ 1050.717688] remoteproc remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compa tibility isn't yet guaranteed. [ 1050.719682] remoteproc remoteproc0: rsc: type 3 [ 1050.719695] remoteproc remoteproc0: rsc: type 0 [ 1050.719705] remoteproc remoteproc0: rsc: type 0 [ 1050.719714] remoteproc remoteproc0: rsc: type 0 [ 1050.719722] remoteproc remoteproc0: rsc: type 1 [ 1050.719729] remoteproc remoteproc0: rsc: type 1 [ 1050.719736] remoteproc remoteproc0: rsc: type 1 [ 1050.719744] remoteproc remoteproc0: rsc: type 1 [ 1050.719751] remoteproc remoteproc0: rsc: type 1 [ 1050.719758] remoteproc remoteproc0: rsc: type 1 [ 1050.719765] remoteproc remoteproc0: rsc: type 1 [ 1050.719772] remoteproc remoteproc0: rsc: type 1 [ 1050.719779] remoteproc remoteproc0: rsc: type 1 [ 1050.719786] remoteproc remoteproc0: rsc: type 1 [ 1050.719793] remoteproc remoteproc0: rsc: type 1 [ 1050.719800] remoteproc remoteproc0: rsc: type 3 [ 1050.719810] remoteproc remoteproc0: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings [ 1050.719822] remoteproc remoteproc0: vdev rsc: vring0: da a0000000, qsz 256, align 4096 [ 1050.719831] remoteproc remoteproc0: vdev rsc: vring1: da a0004000, qsz 256, align 4096 [ 1050.720826] remoteproc remoteproc0: vring0: va de000000 dma 0x9e000000 size 3000 idr 0 [ 1050.720876] remoteproc remoteproc0: vring1: va de004000 dma 0x9e004000 size 3000 idr 1 [ 1050.720898] remoteproc remoteproc0: powering up 58820000.ipu [ 1050.720911] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 627416 [ 1050.721024] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 [ 1050.721052] remoteproc remoteproc0: rsc: type 3 [ 1050.721061] remoteproc remoteproc0: rsc: type 0 [ 1050.721071] remoteproc remoteproc0: carveout rsc: da 9d100000, pa 0, len 100000, flags 0 [ 1050.721453] remoteproc remoteproc0: carveout va de100000, dma 0x9e100000, len 0x100000 [ 1050.721480] remoteproc remoteproc0: carveout mapped 0x9d100000 to 0x9e100000 [ 1050.721489] remoteproc remoteproc0: rsc: type 0 [ 1050.721498] remoteproc remoteproc0: carveout rsc: da 9d200000, pa 0, len 100000, flags 0 [ 1050.722070] remoteproc remoteproc0: carveout va de200000, dma 0x9e200000, len 0x100000 [ 1050.722095] remoteproc remoteproc0: carveout mapped 0x9d200000 to 0x9e200000 [ 1050.722103] remoteproc remoteproc0: rsc: type 0 [ 1050.722112] remoteproc remoteproc0: carveout rsc: da 9d000000, pa 0, len 100000, flags 0 [ 1050.722488] remoteproc remoteproc0: carveout va de300000, dma 0x9e300000, len 0x100000 [ 1050.722512] remoteproc remoteproc0: carveout mapped 0x9d000000 to 0x9e300000 [ 1050.722521] remoteproc remoteproc0: rsc: type 1 [ 1050.722545] remoteproc remoteproc0: mapped devmem pa 0xb9000000, da 0xa0000000, len 0x100000 [ 1050.722553] remoteproc remoteproc0: rsc: type 1 [ 1050.722635] remoteproc remoteproc0: mapped devmem pa 0xba300000, da 0x90000000, len 0x500000 [ 1050.722643] remoteproc remoteproc0: rsc: type 1 [ 1050.722884] remoteproc remoteproc0: mapped devmem pa 0x60000000, da 0x60000000, len 0x10000000 [ 1050.722892] remoteproc remoteproc0: rsc: type 1 [ 1050.723017] remoteproc remoteproc0: mapped devmem pa 0x70000000, da 0x70000000, len 0x8000000 [ 1050.723025] remoteproc remoteproc0: rsc: type 1 [ 1050.723150] remoteproc remoteproc0: mapped devmem pa 0x78000000, da 0x78000000, len 0x8000000 [ 1050.723158] remoteproc remoteproc0: rsc: type 1 [ 1050.723181] remoteproc remoteproc0: mapped devmem pa 0x4a000000, da 0xaa000000, len 0x1000000 [ 1050.723189] remoteproc remoteproc0: rsc: type 1 [ 1050.723212] remoteproc remoteproc0: mapped devmem pa 0x48000000, da 0xa8000000, len 0x1000000 [ 1050.723220] remoteproc remoteproc0: rsc: type 1 [ 1050.723243] remoteproc remoteproc0: mapped devmem pa 0x54000000, da 0xb4000000, len 0x1000000 [ 1050.723251] remoteproc remoteproc0: rsc: type 1 [ 1050.723275] remoteproc remoteproc0: mapped devmem pa 0x5a000000, da 0xba000000, len 0x1000000 [ 1050.723282] remoteproc remoteproc0: rsc: type 1 [ 1050.723305] remoteproc remoteproc0: mapped devmem pa 0x5b000000, da 0xbb000000, len 0x1000000 [ 1050.723312] remoteproc remoteproc0: rsc: type 1 [ 1050.723336] remoteproc remoteproc0: mapped devmem pa 0x4e000000, da 0xae000000, len 0x100000 [ 1050.723827] remoteproc remoteproc0: rsc: type 3 [ 1050.723835] remoteproc remoteproc0: rsc: type 0 [ 1050.723843] remoteproc remoteproc0: rsc: type 0 [ 1050.723850] remoteproc remoteproc0: rsc: type 0 [ 1050.723858] remoteproc remoteproc0: rsc: type 1 [ 1050.723865] remoteproc remoteproc0: rsc: type 1 [ 1050.723872] remoteproc remoteproc0: rsc: type 1 [ 1050.723879] remoteproc remoteproc0: rsc: type 1 [ 1050.723886] remoteproc remoteproc0: rsc: type 1 [ 1050.723894] remoteproc remoteproc0: rsc: type 1 [ 1050.723901] remoteproc remoteproc0: rsc: type 1 [ 1050.723908] remoteproc remoteproc0: rsc: type 1 [ 1050.723915] remoteproc remoteproc0: rsc: type 1 [ 1050.723923] remoteproc remoteproc0: rsc: type 1 [ 1050.723930] remoteproc remoteproc0: rsc: type 1 [ 1050.724561] omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 [ 1050.724572] remoteproc remoteproc0: crash detected in 58820000.ipu: type mmufault [ 1050.724586] omap-iommu 58882000.mmu: 58882000.mmu: errs:0x00000002 da:0x00000000 pgd:0xee5b400 0 *pgd:px00000000 [ 1050.724647] remoteproc remoteproc0: remote processor 58820000.ipu is now up [ 1050.724962] virtio_rpmsg_bus virtio0: rpmsg host is online [ 1050.725967] remoteproc remoteproc0: registered virtio0 (type 7) [ 1050.725979] remoteproc remoteproc0: rsc: type 0 [ 1050.725988] remoteproc remoteproc0: rsc: type 0 [ 1050.725996] remoteproc remoteproc0: rsc: type 0 [ 1050.726004] remoteproc remoteproc0: rsc: type 1 [ 1050.726012] remoteproc remoteproc0: rsc: type 1 [ 1050.726019] remoteproc remoteproc0: rsc: type 1 [ 1050.726027] remoteproc remoteproc0: rsc: type 1 [ 1050.726035] remoteproc remoteproc0: rsc: type 1 [ 1050.726043] remoteproc remoteproc0: rsc: type 1 [ 1050.726050] remoteproc remoteproc0: rsc: type 1 [ 1050.726058] remoteproc remoteproc0: rsc: type 1 [ 1050.726066] remoteproc remoteproc0: rsc: type 1 [ 1050.726073] remoteproc remoteproc0: rsc: type 1 [ 1050.726081] remoteproc remoteproc0: rsc: type 1 [ 1050.726186] remoteproc remoteproc0: enter rproc_crash_handler_work [ 1050.726195] remoteproc remoteproc0: handling crash #1 in 58820000.ipu [ 1050.726204] remoteproc remoteproc0: recovering 58820000.ipu [ 1050.727811] remoteproc remoteproc0: stopped remote processor 58820000.ipu [ 1050.728700] remoteproc remoteproc0: rsc: type 3 [ 1050.728712] remoteproc remoteproc0: rsc: type 0 [ 1050.728721] remoteproc remoteproc0: rsc: type 0 [ 1050.728729] remoteproc remoteproc0: rsc: type 0 [ 1050.728737] remoteproc remoteproc0: rsc: type 1 [ 1050.728744] remoteproc remoteproc0: rsc: type 1 [ 1050.728752] remoteproc remoteproc0: rsc: type 1 [ 1050.728759] remoteproc remoteproc0: rsc: type 1 [ 1050.728766] remoteproc remoteproc0: rsc: type 1 [ 1050.728773] remoteproc remoteproc0: rsc: type 1 [ 1050.728780] remoteproc remoteproc0: rsc: type 1 [ 1050.728787] remoteproc remoteproc0: rsc: type 1 [ 1050.728794] remoteproc remoteproc0: rsc: type 1 [ 1050.728801] remoteproc remoteproc0: rsc: type 1 [ 1050.728809] remoteproc remoteproc0: rsc: type 1 [ 1050.728816] remoteproc remoteproc0: rsc: type 3 [ 1050.728826] remoteproc remoteproc0: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings [ 1050.728836] remoteproc remoteproc0: vdev rsc: vring0: da a0000000, qsz 256, align 4096 [ 1050.728845] remoteproc remoteproc0: vdev rsc: vring1: da a0004000, qsz 256, align 4096 [ 1050.729810] remoteproc remoteproc0: vring0: va de000000 dma 0x9e000000 size 3000 idr 0 [ 1050.729858] remoteproc remoteproc0: vring1: va de004000 dma 0x9e004000 size 3000 idr 1 [ 1050.729880] remoteproc remoteproc0: powering up 58820000.ipu [ 1050.729891] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 627416 [ 1050.729999] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 [ 1050.730027] remoteproc remoteproc0: rsc: type 3 [ 1050.730036] remoteproc remoteproc0: rsc: type 0 [ 1050.730046] remoteproc remoteproc0: carveout rsc: da 9d100000, pa 0, len 100000, flags 0 [ 1050.730418] remoteproc remoteproc0: carveout va de100000, dma 0x9e100000, len 0x100000 [ 1050.730444] remoteproc remoteproc0: carveout mapped 0x9d100000 to 0x9e100000 [ 1050.730452] remoteproc remoteproc0: rsc: type 0 [ 1050.730461] remoteproc remoteproc0: carveout rsc: da 9d200000, pa 0, len 100000, flags 0 [ 1050.731031] remoteproc remoteproc0: carveout va de200000, dma 0x9e200000, len 0x100000 [ 1050.731056] remoteproc remoteproc0: carveout mapped 0x9d200000 to 0x9e200000 [ 1050.731064] remoteproc remoteproc0: rsc: type 0 [ 1050.731073] remoteproc remoteproc0: carveout rsc: da 9d000000, pa 0, len 100000, flags 0 [ 1050.731449] remoteproc remoteproc0: carveout va de300000, dma 0x9e300000, len 0x100000 [ 1050.731473] remoteproc remoteproc0: carveout mapped 0x9d000000 to 0x9e300000 [ 1050.731481] remoteproc remoteproc0: rsc: type 1 [ 1050.731505] remoteproc remoteproc0: mapped devmem pa 0xb9000000, da 0xa0000000, len 0x100000 [ 1050.731513] remoteproc remoteproc0: rsc: type 1 [ 1050.731596] remoteproc remoteproc0: mapped devmem pa 0xba300000, da 0x90000000, len 0x500000 [ 1050.731604] remoteproc remoteproc0: rsc: type 1 [ 1050.731844] remoteproc remoteproc0: mapped devmem pa 0x60000000, da 0x60000000, len 0x10000000 [ 1050.731852] remoteproc remoteproc0: rsc: type 1 [ 1050.731977] remoteproc remoteproc0: mapped devmem pa 0x70000000, da 0x70000000, len 0x8000000 [ 1050.731985] remoteproc remoteproc0: rsc: type 1 [ 1050.732109] remoteproc remoteproc0: mapped devmem pa 0x78000000, da 0x78000000, len 0x8000000 [ 1050.732117] remoteproc remoteproc0: rsc: type 1 [ 1050.732141] remoteproc remoteproc0: mapped devmem pa 0x4a000000, da 0xaa000000, len 0x1000000 [ 1050.732148] remoteproc remoteproc0: rsc: type 1 [ 1050.732172] remoteproc remoteproc0: mapped devmem pa 0x48000000, da 0xa8000000, len 0x1000000 [ 1050.732179] remoteproc remoteproc0: rsc: type 1 [ 1050.732203] remoteproc remoteproc0: mapped devmem pa 0x54000000, da 0xb4000000, len 0x1000000 [ 1050.732210] remoteproc remoteproc0: rsc: type 1 [ 1050.732233] remoteproc remoteproc0: mapped devmem pa 0x5a000000, da 0xba000000, len 0x1000000 [ 1050.732241] remoteproc remoteproc0: rsc: type 1 [ 1050.732264] remoteproc remoteproc0: mapped devmem pa 0x5b000000, da 0xbb000000, len 0x1000000 [ 1050.732272] remoteproc remoteproc0: rsc: type 1 [ 1050.732295] remoteproc remoteproc0: mapped devmem pa 0x4e000000, da 0xae000000, len 0x100000 [ 1050.732754] remoteproc remoteproc0: rsc: type 3 [ 1050.732763] remoteproc remoteproc0: rsc: type 0 [ 1050.732770] remoteproc remoteproc0: rsc: type 0 [ 1050.732777] remoteproc remoteproc0: rsc: type 0 [ 1050.732784] remoteproc remoteproc0: rsc: type 1 [ 1050.732791] remoteproc remoteproc0: rsc: type 1 [ 1050.732799] remoteproc remoteproc0: rsc: type 1 [ 1050.732806] remoteproc remoteproc0: rsc: type 1 [ 1050.732813] remoteproc remoteproc0: rsc: type 1 [ 1050.732820] remoteproc remoteproc0: rsc: type 1 [ 1050.732827] remoteproc remoteproc0: rsc: type 1 [ 1050.732834] remoteproc remoteproc0: rsc: type 1 [ 1050.732841] remoteproc remoteproc0: rsc: type 1 [ 1050.732848] remoteproc remoteproc0: rsc: type 1 [ 1050.732855] remoteproc remoteproc0: rsc: type 1 [ 1050.733455] omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 [ 1050.733465] remoteproc remoteproc0: crash detected in 58820000.ipu: type mmufault [ 1050.733479] omap-iommu 58882000.mmu: 58882000.mmu: errs:0x00000002 da:0x00000000 pgd:0xee59c00 0 *pgd:px00000000 [ 1050.733540] remoteproc remoteproc0: remote processor 58820000.ipu is now up [ 1050.733847] virtio_rpmsg_bus virtio0: rpmsg host is online [ 1050.734856] remoteproc remoteproc0: registered virtio0 (type 7) [ 1050.734867] remoteproc remoteproc0: rsc: type 0 [ 1050.734876] remoteproc remoteproc0: rsc: type 0 [ 1050.734885] remoteproc remoteproc0: rsc: type 0 [ 1050.734893] remoteproc remoteproc0: rsc: type 1 [ 1050.734900] remoteproc remoteproc0: rsc: type 1 [ 1050.734908] remoteproc remoteproc0: rsc: type 1 [ 1050.734916] remoteproc remoteproc0: rsc: type 1 [ 1050.734924] remoteproc remoteproc0: rsc: type 1 [ 1050.734931] remoteproc remoteproc0: rsc: type 1 [ 1050.734939] remoteproc remoteproc0: rsc: type 1 [ 1050.734946] remoteproc remoteproc0: rsc: type 1 [ 1050.734954] remoteproc remoteproc0: rsc: type 1 [ 1050.734962] remoteproc remoteproc0: rsc: type 1 [ 1050.734969] remoteproc remoteproc0: rsc: type 1 [ 1050.735068] remoteproc remoteproc0: enter rproc_crash_handler_work [ 1050.735077] remoteproc remoteproc0: handling crash #2 in 58820000.ipu [ 1050.735085] remoteproc remoteproc0: recovering 58820000.ipu [ 1050.736685] remoteproc remoteproc0: stopped remote processor 58820000.ipu [ 1050.737504] remoteproc remoteproc0: rsc: type 3 [ 1050.737515] remoteproc remoteproc0: rsc: type 0 [ 1050.737524] remoteproc remoteproc0: rsc: type 0 [ 1050.737532] remoteproc remoteproc0: rsc: type 0 [ 1050.737539] remoteproc remoteproc0: rsc: type 1 [ 1050.737547] remoteproc remoteproc0: rsc: type 1 [ 1050.737555] remoteproc remoteproc0: rsc: type 1 [ 1050.737562] remoteproc remoteproc0: rsc: type 1 [ 1050.737569] remoteproc remoteproc0: rsc: type 1 [ 1050.737577] remoteproc remoteproc0: rsc: type 1 [ 1050.737584] remoteproc remoteproc0: rsc: type 1 [ 1050.737591] remoteproc remoteproc0: rsc: type 1 [ 1050.737599] remoteproc remoteproc0: rsc: type 1 [ 1050.737606] remoteproc remoteproc0: rsc: type 1 [ 1050.737614] remoteproc remoteproc0: rsc: type 1 [ 1050.737621] remoteproc remoteproc0: rsc: type 3 [ 1050.737631] remoteproc remoteproc0: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings [ 1050.737641] remoteproc remoteproc0: vdev rsc: vring0: da a0000000, qsz 256, align 4096 [ 1050.737650] remoteproc remoteproc0: vdev rsc: vring1: da a0004000, qsz 256, align 4096 [ 1050.738612] remoteproc remoteproc0: vring0: va de000000 dma 0x9e000000 size 3000 idr 0 [ 1050.738660] remoteproc remoteproc0: vring1: va de004000 dma 0x9e004000 size 3000 idr 1 [ 1050.738681] remoteproc remoteproc0: powering up 58820000.ipu [ 1050.738692] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 627416 [ 1050.738796] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 [ 1050.738823] remoteproc remoteproc0: rsc: type 3 [ 1050.738831] remoteproc remoteproc0: rsc: type 0 [ 1050.738841] remoteproc remoteproc0: carveout rsc: da 9d100000, pa 0, len 100000, flags 0 [ 1050.739212] remoteproc remoteproc0: carveout va de100000, dma 0x9e100000, len 0x100000 [ 1050.739238] remoteproc remoteproc0: carveout mapped 0x9d100000 to 0x9e100000 [ 1050.739246] remoteproc remoteproc0: rsc: type 0 [ 1050.739255] remoteproc remoteproc0: carveout rsc: da 9d200000, pa 0, len 100000, flags 0 [ 1050.739827] remoteproc remoteproc0: carveout va de200000, dma 0x9e200000, len 0x100000 [ 1050.739852] remoteproc remoteproc0: carveout mapped 0x9d200000 to 0x9e200000 [ 1050.739861] remoteproc remoteproc0: rsc: type 0 [ 1050.739870] remoteproc remoteproc0: carveout rsc: da 9d000000, pa 0, len 100000, flags 0 [ 1050.740248] remoteproc remoteproc0: carveout va de300000, dma 0x9e300000, len 0x100000 [ 1050.740273] remoteproc remoteproc0: carveout mapped 0x9d000000 to 0x9e300000 [ 1050.740281] remoteproc remoteproc0: rsc: type 1 [ 1050.740305] remoteproc remoteproc0: mapped devmem pa 0xb9000000, da 0xa0000000, len 0x100000 [ 1050.740313] remoteproc remoteproc0: rsc: type 1 [ 1050.740396] remoteproc remoteproc0: mapped devmem pa 0xba300000, da 0x90000000, len 0x500000 [ 1050.740404] remoteproc remoteproc0: rsc: type 1 [ 1050.740645] remoteproc remoteproc0: mapped devmem pa 0x60000000, da 0x60000000, len 0x10000000 [ 1050.740653] remoteproc remoteproc0: rsc: type 1 [ 1050.740778] remoteproc remoteproc0: mapped devmem pa 0x70000000, da 0x70000000, len 0x8000000 [ 1050.740786] remoteproc remoteproc0: rsc: type 1 [ 1050.740912] remoteproc remoteproc0: mapped devmem pa 0x78000000, da 0x78000000, len 0x8000000 [ 1050.740919] remoteproc remoteproc0: rsc: type 1 [ 1050.740943] remoteproc remoteproc0: mapped devmem pa 0x4a000000, da 0xaa000000, len 0x1000000 [ 1050.740950] remoteproc remoteproc0: rsc: type 1 [ 1050.740974] remoteproc remoteproc0: mapped devmem pa 0x48000000, da 0xa8000000, len 0x1000000 [ 1050.740981] remoteproc remoteproc0: rsc: type 1 [ 1050.741005] remoteproc remoteproc0: mapped devmem pa 0x54000000, da 0xb4000000, len 0x1000000 [ 1050.741012] remoteproc remoteproc0: rsc: type 1 [ 1050.741036] remoteproc remoteproc0: mapped devmem pa 0x5a000000, da 0xba000000, len 0x1000000 [ 1050.741043] remoteproc remoteproc0: rsc: type 1 [ 1050.741067] remoteproc remoteproc0: mapped devmem pa 0x5b000000, da 0xbb000000, len 0x1000000 [ 1050.741074] remoteproc remoteproc0: rsc: type 1 [ 1050.741098] remoteproc remoteproc0: mapped devmem pa 0x4e000000, da 0xae000000, len 0x100000 [ 1050.741555] remoteproc remoteproc0: rsc: type 3 [ 1050.741562] remoteproc remoteproc0: rsc: type 0 [ 1050.741570] remoteproc remoteproc0: rsc: type 0 [ 1050.741577] remoteproc remoteproc0: rsc: type 0 [ 1050.741584] remoteproc remoteproc0: rsc: type 1 [ 1050.741592] remoteproc remoteproc0: rsc: type 1 [ 1050.741599] remoteproc remoteproc0: rsc: type 1 [ 1050.741606] remoteproc remoteproc0: rsc: type 1 [ 1050.741613] remoteproc remoteproc0: rsc: type 1 [ 1050.741621] remoteproc remoteproc0: rsc: type 1 [ 1050.741628] remoteproc remoteproc0: rsc: type 1 [ 1050.741635] remoteproc remoteproc0: rsc: type 1 [ 1050.741643] remoteproc remoteproc0: rsc: type 1 [ 1050.741650] remoteproc remoteproc0: rsc: type 1 [ 1050.741657] remoteproc remoteproc0: rsc: type 1 [ 1050.742247] ------------[ cut here ]------------ [ 1050.742267] WARNING: CPU: 0 PID: 18 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x23 c/0x364() [ 1050.742276] 44000000.ocp:L3 Custom Error: MASTER IPU1 TARGET GPMC (Read): Data Access in User mode during Functional access [ 1050.742282] Modules linked in: [ 1050.742297] CPU: 0 PID: 18 Comm: kworker/0:1 Tainted: G W 4.4.45SMS_MONOLYTHIC-00 013-g7a35563-dirty #17 [ 1050.742305] Hardware name: Generic DRA74X (Flattened Device Tree) [ 1050.742318] Workqueue: events request_firmware_work_func [ 1050.742326] Backtrace: [ 1050.742346] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 1050.742353] r6:c0c672ec r5:00000000 r4:20000193 r3:ef21e000 [ 1050.742381] [] (show_stack) from [] (dump_stack+0x88/0xa8) [ 1050.742395] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) [ 1050.742402] r5:00000093 r4:ef21f8b0 [ 1050.742418] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40 ) [ 1050.742424] r8:c0a22ab4 r7:ef1fe9d0 r6:c0c67530 r5:c0c67248 r4:80080003 [ 1050.742450] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x23c/0x3 64) [ 1050.742456] r3:ef1fe840 r2:c0c67308 [ 1050.742474] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0x6 4/0x164) [ 1050.742480] r10:ef1f6840 r9:c0e3f2a6 r8:00000017 r7:00000000 r6:00000000 r5:ef1f68a0 [ 1050.742500] r4:ef1fed40 [ 1050.742513] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x 64) [ 1050.742519] r10:ef242c00 r9:00000000 r8:ef008000 r7:00000001 r6:c0dcbe04 r5:ef1f68a0 [ 1050.742538] r4:ef1f6840 [ 1050.742552] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xbc/0x194) [ 1050.742558] r6:c0dcbe04 r5:ef1f68a0 r4:ef1f6840 r3:00000000 [ 1050.742579] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x20/0x30) [ 1050.742584] r7:00000001 r6:00000000 r5:c0db9424 r4:00000000 [ 1050.742605] [] (generic_handle_irq) from [] (__handle_domain_irq+0x5c/0xbc ) [ 1050.742615] [] (__handle_domain_irq) from [] (gic_handle_irq+0x3c/0x7c) [ 1050.742620] r8:fa213000 r7:fa212000 r6:ef21fa58 r5:c0dc1914 r4:fa21200c r3:ef21fa58 [ 1050.742644] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 1050.742651] Exception stack(0xef21fa58 to 0xef21faa0) [ 1050.742659] fa40: c0dd1ef0 a0000013 [ 1050.742668] fa60: 00000001 00000044 00000000 c0dd1ef0 c0c3554c a0000013 c0dd5654 00000000 [ 1050.742677] fa80: ef242c00 ef21fab4 ef21fab8 ef21faa8 c0032448 c09e4130 20000013 ffffffff [ 1050.742683] r8:c0dd5654 r7:ef21fa8c r6:ffffffff r5:20000013 r4:c09e4130 r3:c0032448 [ 1050.742715] [] (_raw_spin_unlock_irqrestore) from [] (omap_hwmod_deassert_ hardreset+0x44/0x54) [ 1050.742728] [] (omap_hwmod_deassert_hardreset) from [] (omap_device_deasse rt_hardreset+0x40/0x5c) [ 1050.742733] r7:00000000 r6:c0c3554c r5:ef241580 r4:00000001 [ 1050.742758] [] (omap_device_deassert_hardreset) from [] (omap_rproc_device _enable+0x94/0x100) [ 1050.742764] r6:eebbe800 r5:c0c35824 r4:ef242c00 r3:c0c3582f [ 1050.742788] [] (omap_rproc_device_enable) from [] (omap_rproc_start+0xa8/0 x19c) [ 1050.742794] r5:ef242c10 r4:eebbea78 [ 1050.742809] [] (omap_rproc_start) from [] (rproc_boot+0x450/0x56c) [ 1050.742814] r10:de202000 r8:eebbe820 r7:eebbe9ac r6:eebbe9b4 r5:00000000 r4:eebbe800 [ 1050.742839] [] (rproc_boot) from [] (rproc_virtio_find_vqs+0x1a8/0x204) [ 1050.742845] r10:eebbec10 r9:c0c695a4 r8:ef21fc18 r7:ef21fc0c r6:c0a93bbc r5:ef21fc14 [ 1050.742864] r4:00000002 [ 1050.742878] [] (rproc_virtio_find_vqs) from [] (rpmsg_probe+0xac/0x45c) [ 1050.742884] r10:00000000 r9:00000000 r8:eebbe800 r7:eebbec10 r6:ee527100 r5:c0a93bb8 [ 1050.742903] r4:ef21fc08 [ 1050.742918] [] (rpmsg_probe) from [] (virtio_dev_probe+0x218/0x314) [ 1050.742924] r10:00000000 r9:00000000 r8:00000001 r7:00000000 r6:00000001 r5:00000000 [ 1050.742943] r4:00000000 [ 1050.742957] [] (virtio_dev_probe) from [] (driver_probe_device+0x1e8/0x2b0 ) [ 1050.742962] r10:00000000 r9:00000000 r8:0000001f r7:c0e2930c r6:00000000 r5:c0e7f47c [ 1050.742981] r4:eebbec20 [ 1050.742992] [] (driver_probe_device) from [] (__device_attach_driver+0x88/ 0x94) [ 1050.742998] r8:c0e7f458 r7:00000001 r6:eebbec20 r5:ef21fd30 r4:c0e2930c r3:00000000 [ 1050.743025] [] (__device_attach_driver) from [] (bus_for_each_drv+0x4c/0x9 4) [ 1050.743030] r6:c03f97c0 r5:ef21fd30 r4:00000000 r3:00000000 [ 1050.743051] [] (bus_for_each_drv) from [] (__device_attach+0xa8/0x10c) [ 1050.743057] r6:c0df5c30 r5:eebbec54 r4:eebbec20 [ 1050.743074] [] (__device_attach) from [] (device_initial_probe+0x14/0x18) [ 1050.743079] r7:eebbe820 r6:c0df5c30 r5:eebbec20 r4:eebbec20 [ 1050.743101] [] (device_initial_probe) from [] (bus_probe_device+0x8c/0x94) [ 1050.743112] [] (bus_probe_device) from [] (device_add+0x388/0x530) [ 1050.743118] r6:eebbec28 r5:00000000 r4:eebbec20 r3:00000001 [ 1050.743140] [] (device_add) from [] (device_register+0x1c/0x20) [ 1050.743145] r10:eebbe800 r9:eebbe820 r8:eea15050 r7:eebbec00 r6:eebbec20 r5:c072dca0 [ 1050.743165] r4:eebbec20 [ 1050.743178] [] (device_register) from [] (register_virtio_device+0xa8/0xf4 ) [ 1050.743184] r4:eebbec10 r3:eebbedb8 [ 1050.743200] [] (register_virtio_device) from [] (rproc_add_virtio_dev+0x44 /0xa0) [ 1050.743205] r6:00000007 r5:eebbe820 r4:eebbec00 r3:eebbe844 [ 1050.743226] [] (rproc_add_virtio_dev) from [] (rproc_handle_vdev+0x168/0x2 2c) [ 1050.743231] r7:eebbec00 r6:eebbedf0 r5:00000002 r4:eea1507c [ 1050.743251] [] (rproc_handle_vdev) from [] (rproc_handle_resources+0x68/0x 118) [ 1050.743257] r10:eebbe820 r9:eea15050 r8:00000fb0 r7:eebbe800 r6:00000000 r5:0000004c [ 1050.743276] r4:c0e28be0 [ 1050.743288] [] (rproc_handle_resources) from [] (rproc_fw_config_virtio+0x f4/0x100) [ 1050.743293] r10:00000000 r9:ef629ac0 r8:00000000 r7:00001000 r6:f2409000 r5:ee50b500 [ 1050.743312] r4:eebbe800 [ 1050.743324] [] (rproc_fw_config_virtio) from [] (request_firmware_work_fun c+0x38/0x60) [ 1050.743330] r7:ef62d200 r6:ef629ac0 r5:ee50b600 r4:ee50b600 [ 1050.743352] [] (request_firmware_work_func) from [] (process_one_work+0x12 8/0x330) [ 1050.743357] r4:ef218800 [ 1050.743369] [] (process_one_work) from [] (worker_thread+0x34/0x4b0) [ 1050.743374] r10:ef629ac0 r9:ef629ac0 r8:00000008 r7:ef218818 r6:ef218800 r5:00000001 [ 1050.743393] r4:ef629ad4 [ 1050.743407] [] (worker_thread) from [] (kthread+0xe0/0xfc) [ 1050.743413] r10:00000000 r9:00000000 r8:00000000 r7:c00555d8 r6:ef218800 r5:00000000 [ 1050.743432] r4:ef21a1c0 [ 1050.743446] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 1050.743451] r7:00000000 r6:00000000 r5:c005ac84 r4:ef21a1c0 [ 1050.743468] ---[ end trace 83eb02acdc15b598 ]--- [ 1050.743484] omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 [ 1050.743493] remoteproc remoteproc0: crash detected in 58820000.ipu: type mmufault [ 1050.743507] omap-iommu 58882000.mmu: 58882000.mmu: errs:0x00000008 da:0x00000000 pgd:0xee5f000 0 *pgd:px00000000 + +Hi Marco, which is the version of your VisionSDK? Regards, Yordan + +The basis of my development ist the linux 4.4.45. I took it out of visual-sdk 2-12-02-00, which I have fully extracted on hdd. My code is running completely outside of the SDK and I'm not able to use CCS for development. We got a very special requirement running Linux on A-15 cores and using remoteproc to bring up "Real Bare Metal" Code, without BIOS or RTOS, on the subcores. It must be something different using JTAG with CCS (and it's gel scripting...) on one side and dealing directly with remoteproc, the MMU-Stuff and linker Scripts, Remoteproc-Headers... on the other side. The code generated by the arm-linux-gnueabi-Toolchain works on M4, if loaded and jumped directly with CCS over JTAG. Uploaded by remoteproc the error above occurs. (Of course I'm using the custom header file for implementing the resource_table for remoteproc, which is tuned with the linker - file "tda2.lds" and an ARM startup code... I also tried out the ducati-startup code: Core_smp_asm_gnu.sv7M, but the error remains...) There is one special *.xem4 which is running perfeclty... it is the messageq_single.xem4... but this is not build in the SDK, it is only a copied binary and I am looking for it's building mechanism... maybe I'm able to find my mistake at least... hmmmm. CU (tmw) Marco.... + +Hi Marco, I have forwarded your question to VisionSDK experts. Regards, Yordan + +Hi I think messageq_single.xem4 is from IPC package. The source code for IPC examples shall present in the \ti_components\os_tools\ipc_3_43_03_05. But I guess you need Bios running on remote cores to work these IPC examples. I guess a better solution for you may be to use uboot to load the remote core binaries intead rproc of IPC. regards, Shiju + +Hi @Shiju! ===============> ADDITIONAL INFORMATION // NEWS: I reverse engineered some fragments of the binary above using readelf. I've seen how the MMU mapping is done... After some tuning I got the same memory mapping conditions over remoteproc, bur run into another error: [ 461.976351] remoteproc remoteproc0: releasing 58820000.ipu [ 465.794433] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 465.794531] remoteproc remoteproc0: 58820000.ipu is available [ 465.794542] remoteproc remoteproc0: Note: remoteproc is still under development and considered experimental. [ 465.794551] remoteproc remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compa tibility isn't yet guaranteed. [ 465.795463] remoteproc remoteproc0: rsc: type 3 [ 465.795475] remoteproc remoteproc0: rsc: type 0 [ 465.795484] remoteproc remoteproc0: rsc: type 0 [ 465.795492] remoteproc remoteproc0: rsc: type 0 [ 465.795500] remoteproc remoteproc0: rsc: type 2 [ 465.795507] remoteproc remoteproc0: rsc: type 1 [ 465.795514] remoteproc remoteproc0: rsc: type 3 [ 465.795524] remoteproc remoteproc0: vdev rsc: id 7, dfeatures 1, cfg len 0, 2 vrings [ 465.795536] remoteproc remoteproc0: vdev rsc: vring0: da 60000000, qsz 256, align 4096 [ 465.795545] remoteproc remoteproc0: vdev rsc: vring1: da 60004000, qsz 256, align 4096 [ 465.796878] remoteproc remoteproc0: vring0: va de000000 dma 0x9e000000 size 3000 idr 0 [ 465.796935] remoteproc remoteproc0: vring1: va de004000 dma 0x9e004000 size 3000 idr 1 [ 465.796959] remoteproc remoteproc0: powering up 58820000.ipu [ 465.796973] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 625616 [ 465.797093] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 [ 465.797116] remoteproc remoteproc0: rsc: type 3 [ 465.797126] remoteproc remoteproc0: rsc: type 0 [ 465.797152] remoteproc remoteproc0: carveout rsc: da 0, pa 0, len 100000, flags 0 [ 465.797540] remoteproc remoteproc0: carveout va de100000, dma 0x9e100000, len 0x100000 [ 465.797566] remoteproc remoteproc0: carveout mapped 0x0 to 0x9e100000 [ 465.797574] remoteproc remoteproc0: rsc: type 0 [ 465.797584] remoteproc remoteproc0: carveout rsc: da 80000000, pa 0, len 500000, flags 0 [ 465.799593] remoteproc remoteproc0: carveout va de200000, dma 0x9e200000, len 0x500000 [ 465.799678] remoteproc remoteproc0: carveout mapped 0x80000000 to 0x9e200000 [ 465.799686] remoteproc remoteproc0: rsc: type 0 [ 465.799695] remoteproc remoteproc0: carveout rsc: da 9f000000, pa 0, len 100000, flags 0 [ 465.800090] remoteproc remoteproc0: carveout va de700000, dma 0x9e700000, len 0x100000 [ 465.800115] remoteproc remoteproc0: carveout mapped 0x9f000000 to 0x9e700000 [ 465.800123] remoteproc remoteproc0: rsc: type 2 [ 465.800147] remoteproc remoteproc0: trace0 added: va de700000, da 0x9f000000, len 0x8000 [ 465.800156] remoteproc remoteproc0: rsc: type 1 [ 465.800181] remoteproc remoteproc0: mapped devmem pa 0x9d000000, da 0x60000000, len 0x100000 [ 465.800671] remoteproc remoteproc0: rsc: type 3 [ 465.800680] remoteproc remoteproc0: rsc: type 0 [ 465.800688] remoteproc remoteproc0: rsc: type 0 [ 465.800695] remoteproc remoteproc0: rsc: type 0 [ 465.800702] remoteproc remoteproc0: rsc: type 2 [ 465.800709] remoteproc remoteproc0: rsc: type 1 [ 465.801419] ------------[ cut here ]------------ [ 465.801440] WARNING: CPU: 0 PID: 18 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x23 c/0x364() [ 465.801450] 44000000.ocp: L3 Custom Error: MASTER IPU1 TARGET GPMC (Idle): Data Access in Usermode during Functional access [ 465.801456] Modules linked in: [ 465.801470] CPU: 0 PID: 18 Comm: kworker/0:1 Tainted: G W 4.4.45SMS_MONOLYTHIC-00 013-g7a35563-dirty #24 [ 465.801478] Hardware name: Generic DRA74X (Flattened Device Tree) [ 465.801490] Workqueue: events request_firmware_work_func [ 465.801499] Backtrace: [ 465.801520] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 465.801527] r6:c0c672ec r5:00000000 r4:20000193 r3:ef21e000 [ 465.801554] [] (show_stack) from [] (dump_stack+0x88/0xa8) [ 465.801569] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) [ 465.801575] r5:00000093 r4:ef21f8b0 [ 465.801593] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40 ) [ 465.801599] r8:c0a22aac r7:ef1fe9d0 r6:c0c67530 r5:c0c67248 r4:80080003 [ 465.801626] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x23c/0x3 64) [ 465.801632] r3:ef1fe840 r2:c0c67308 [ 465.801650] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0x6 4/0x164) [ 465.801656] r10:ef1f6840 r9:c0e3f2a6 r8:00000017 r7:00000000 r6:00000000 r5:ef1f68a0 [ 465.801677] r4:ef1fed40 [ 465.801690] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x 64) [ 465.801696] r10:ef242c00 r9:00000000 r8:ef008000 r7:00000001 r6:c0dcbe04 r5:ef1f68a0 [ 465.801716] r4:ef1f6840 [ 465.801730] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xbc/0x194) [ 465.801736] r6:c0dcbe04 r5:ef1f68a0 r4:ef1f6840 r3:00000000 [ 465.801757] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x20/0x30) [ 465.801763] r7:00000001 r6:00000000 r5:c0db9424 r4:00000000 [ 465.801783] [] (generic_handle_irq) from [] (__handle_domain_irq+0x5c/0xbc ) [ 465.801793] [] (__handle_domain_irq) from [] (gic_handle_irq+0x3c/0x7c) [ 465.801800] r8:fa213000 r7:fa212000 r6:ef21fa58 r5:c0dc1914 r4:fa21200c r3:ef21fa58 [ 465.801824] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 465.801831] Exception stack(0xef21fa58 to 0xef21faa0) [ 465.801839] fa40: c0dd1ef0 a0000113 [ 465.801848] fa60: 00000001 00000002 00000000 c0dd1ef0 c0c3554c a0000113 c0dd5654 00000000 [ 465.801858] fa80: ef242c00 ef21fab4 ef21fab8 ef21faa8 c0032448 c09e4130 20000113 ffffffff [ 465.801864] r8:c0dd5654 r7:ef21fa8c r6:ffffffff r5:20000113 r4:c09e4130 r3:c0032448 [ 465.801896] [] (_raw_spin_unlock_irqrestore) from [] (omap_hwmod_deassert_ hardreset+0x44/0x54) [ 465.801910] [] (omap_hwmod_deassert_hardreset) from [] (omap_device_deasse rt_hardreset+0x40/0x5c) [ 465.801916] r7:00000000 r6:c0c3554c r5:ef241580 r4:00000001 [ 465.801942] [] (omap_device_deassert_hardreset) from [] (omap_rproc_device _enable+0x94/0x100) [ 465.801948] r6:ee548c00 r5:c0c35824 r4:ef242c00 r3:c0c3582f [ 465.801971] [] (omap_rproc_device_enable) from [] (omap_rproc_start+0xa8/0 x19c) [ 465.801977] r5:ef242c10 r4:ee548e78 [ 465.801992] [] (omap_rproc_start) from [] (rproc_boot+0x450/0x56c) [ 465.801998] r10:de2795d0 r8:ee548c20 r7:ee548dac r6:ee548db4 r5:00000000 r4:ee548c00 [ 465.802023] [] (rproc_boot) from [] (rproc_virtio_find_vqs+0x1a8/0x204) [ 465.802029] r10:ee549410 r9:c0c695a4 r8:ef21fc18 r7:ef21fc0c r6:c0a93bbc r5:ef21fc14 [ 465.802049] r4:00000002 [ 465.802063] [] (rproc_virtio_find_vqs) from [] (rpmsg_probe+0xac/0x45c) [ 465.802068] r10:00000000 r9:00000000 r8:ee548c00 r7:ee549410 r6:ee51fc80 r5:c0a93bb8 [ 465.802088] r4:ef21fc08 [ 465.802103] [] (rpmsg_probe) from [] (virtio_dev_probe+0x218/0x314) [ 465.802110] r10:00000000 r9:00000000 r8:00000001 r7:00000000 r6:00000001 r5:00000000 [ 465.802129] r4:00000000 [ 465.802142] [] (virtio_dev_probe) from [] (driver_probe_device+0x1e8/0x2b0 ) [ 465.802148] r10:00000000 r9:00000000 r8:00000011 r7:c0e2930c r6:00000000 r5:c0e7f47c [ 465.802167] r4:ee549420 [ 465.802179] [] (driver_probe_device) from [] (__device_attach_driver+0x88/ 0x94) [ 465.802184] r8:c0e7f458 r7:00000001 r6:ee549420 r5:ef21fd30 r4:c0e2930c r3:00000000 [ 465.802211] [] (__device_attach_driver) from [] (bus_for_each_drv+0x4c/0x9 4) [ 465.802217] r6:c03f97c0 r5:ef21fd30 r4:00000000 r3:00000000 [ 465.802238] [] (bus_for_each_drv) from [] (__device_attach+0xa8/0x10c) [ 465.802243] r6:c0df5c30 r5:ee549454 r4:ee549420 [ 465.802260] [] (__device_attach) from [] (device_initial_probe+0x14/0x18) [ 465.802266] r7:ee548c20 r6:c0df5c30 r5:ee549420 r4:ee549420 [ 465.802288] [] (device_initial_probe) from [] (bus_probe_device+0x8c/0x94) [ 465.802300] [] (bus_probe_device) from [] (device_add+0x388/0x530) [ 465.802306] r6:ee549428 r5:00000000 r4:ee549420 r3:00000001 [ 465.802327] [] (device_add) from [] (device_register+0x1c/0x20) [ 465.802333] r10:ee548c00 r9:ee548c20 r8:ee4fe02c r7:ee549400 r6:ee549420 r5:c072dca0 [ 465.802353] r4:ee549420 [ 465.802367] [] (device_register) from [] (register_virtio_device+0xa8/0xf4 ) [ 465.802373] r4:ee549410 r3:ee5495b8 [ 465.802389] [] (register_virtio_device) from [] (rproc_add_virtio_dev+0x44 /0xa0) [ 465.802394] r6:00000007 r5:ee548c20 r4:ee549400 r3:ee548c44 [ 465.802415] [] (rproc_add_virtio_dev) from [] (rproc_handle_vdev+0x168/0x2 2c) [ 465.802421] r7:ee549400 r6:ee5495f0 r5:00000002 r4:ee4fe058 [ 465.802440] [] (rproc_handle_vdev) from [] (rproc_handle_resources+0x68/0x 118) [ 465.802446] r10:ee548c20 r9:ee4fe02c r8:00000150 r7:ee548c00 r6:00000000 r5:00000028 [ 465.802465] r4:c0e28be0 [ 465.802477] [] (rproc_handle_resources) from [] (rproc_fw_config_virtio+0x f4/0x100) [ 465.802483] r10:00000000 r9:ef629ac0 r8:00000000 r7:0000017c r6:f1d125d0 r5:ee5393c0 [ 465.802502] r4:ee548c00 [ 465.802514] [] (rproc_fw_config_virtio) from [] (request_firmware_work_fun c+0x38/0x60) [ 465.802520] r7:ef62d200 r6:ef629ac0 r5:ee539540 r4:ee539540 [ 465.802543] [] (request_firmware_work_func) from [] (process_one_work+0x12 8/0x330) [ 465.802549] r4:ef218800 [ 465.802560] [] (process_one_work) from [] (worker_thread+0x34/0x4b0) [ 465.802566] r10:ef629ac0 r9:ef629ac0 r8:00000008 r7:ef218818 r6:ef218800 r5:00000001 [ 465.802585] r4:ef629ad4 [ 465.802598] [] (worker_thread) from [] (kthread+0xe0/0xfc) [ 465.802604] r10:00000000 r9:00000000 r8:00000000 r7:c00555d8 r6:ef218800 r5:00000000 [ 465.802623] r4:ef21a1c0 [ 465.802637] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 465.802643] r7:00000000 r6:00000000 r5:c005ac84 r4:ef21a1c0 [ 465.802661] ---[ end trace f363bed9b0637e37 ]--- [ 465.802696] ------------[ cut here ]------------ [ 465.802709] WARNING: CPU: 0 PID: 18 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x23 c/0x364() [ 465.802718] 44000000.ocp:L3 Custom Error: MASTER IPU1 TARGET GPMC (Idle): Data Access in User mode during Functional access [ 465.802723] Modules linked in: [ 465.802734] CPU: 0 PID: 18 Comm: kworker/0:1 Tainted: G W 4.4.45SMS_MONOLYTHIC-00 013-g7a35563-dirty #24 [ 465.802741] Hardware name: Generic DRA74X (Flattened Device Tree) [ 465.802749] Workqueue: events request_firmware_work_func [ 465.802757] Backtrace: [ 465.802772] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 465.802778] r6:c0c672ec r5:00000000 r4:20000193 r3:ef21e000 [ 465.802803] [] (show_stack) from [] (dump_stack+0x88/0xa8) [ 465.802815] [] (dump_stack) from [] (warn_slowpath_common+0x7c/0xb8) [ 465.802821] r5:00000093 r4:ef21f8b0 [ 465.802837] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40 ) [ 465.802843] r8:c0a22aac r7:ef1fe9d0 r6:c0c67530 r5:c0c67248 r4:80080003 [ 465.802869] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x23c/0x3 64) [ 465.802874] r3:ef1fe840 r2:c0c67308 [ 465.802890] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0x6 4/0x164) [ 465.802896] r10:ef1f6840 r9:c0e3f2a6 r8:00000017 r7:00000000 r6:00000000 r5:ef1f68a0 [ 465.802916] r4:ef1fed40 [ 465.802928] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x 64) [ 465.802933] r10:ef242c00 r9:00000000 r8:ef008000 r7:00000001 r6:c0dcbe04 r5:ef1f68a0 [ 465.802953] r4:ef1f6840 [ 465.802965] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xbc/0x194) [ 465.802971] r6:c0dcbe04 r5:ef1f68a0 r4:ef1f6840 r3:00000000 [ 465.802992] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x20/0x30) [ 465.802997] r7:00000001 r6:00000000 r5:c0db9424 r4:00000000 [ 465.803017] [] (generic_handle_irq) from [] (__handle_domain_irq+0x5c/0xbc ) [ 465.803027] [] (__handle_domain_irq) from [] (gic_handle_irq+0x3c/0x7c) [ 465.803033] r8:fa213000 r7:fa212000 r6:ef21fa58 r5:c0dc1914 r4:fa21200c r3:ef21fa58 [ 465.803056] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 465.803063] Exception stack(0xef21fa58 to 0xef21faa0) [ 465.803070] fa40: c0dd1ef0 a0000113 [ 465.803080] fa60: 00000001 00000003 00000000 c0dd1ef0 c0c35554 a0000113 c0dd5654 00000000 [ 465.803089] fa80: ef242c00 ef21fab4 ef21fab8 ef21faa8 c0032448 c09e4130 20000113 ffffffff [ 465.803095] r8:c0dd5654 r7:ef21fa8c r6:ffffffff r5:20000113 r4:c09e4130 r3:c0032448 [ 465.803123] [] (_raw_spin_unlock_irqrestore) from [] (omap_hwmod_deassert_ hardreset+0x44/0x54) [ 465.803136] [] (omap_hwmod_deassert_hardreset) from [] (omap_device_deasse rt_hardreset+0x40/0x5c) [ 465.803142] r7:00000000 r6:c0c35554 r5:ef241580 r4:00000001 [ 465.803166] [] (omap_device_deassert_hardreset) from [] (omap_rproc_device _enable+0xc4/0x100) [ 465.803172] r6:ee548c00 r5:00000000 r4:ef242c00 r3:c0c3582f [ 465.803194] [] (omap_rproc_device_enable) from [] (omap_rproc_start+0xa8/0 x19c) [ 465.803200] r5:ef242c10 r4:ee548e78 [ 465.803215] [] (omap_rproc_start) from [] (rproc_boot+0x450/0x56c) [ 465.803220] r10:de2795d0 r8:ee548c20 r7:ee548dac r6:ee548db4 r5:00000000 r4:ee548c00 [ 465.803245] [] (rproc_boot) from [] (rproc_virtio_find_vqs+0x1a8/0x204) [ 465.803250] r10:ee549410 r9:c0c695a4 r8:ef21fc18 r7:ef21fc0c r6:c0a93bbc r5:ef21fc14 [ 465.803270] r4:00000002 [ 465.803283] [] (rproc_virtio_find_vqs) from [] (rpmsg_probe+0xac/0x45c) [ 465.803289] r10:00000000 r9:00000000 r8:ee548c00 r7:ee549410 r6:ee51fc80 r5:c0a93bb8 [ 465.803308] r4:ef21fc08 [ 465.803322] [] (rpmsg_probe) from [] (virtio_dev_probe+0x218/0x314) [ 465.803328] r10:00000000 r9:00000000 r8:00000001 r7:00000000 r6:00000001 r5:00000000 [ 465.803347] r4:00000000 [ 465.803359] [] (virtio_dev_probe) from [] (driver_probe_device+0x1e8/0x2b0 ) [ 465.803365] r10:00000000 r9:00000000 r8:00000011 r7:c0e2930c r6:00000000 r5:c0e7f47c [ 465.803385] r4:ee549420 [ 465.803396] [] (driver_probe_device) from [] (__device_attach_driver+0x88/ 0x94) [ 465.803402] r8:c0e7f458 r7:00000001 r6:ee549420 r5:ef21fd30 r4:c0e2930c r3:00000000 [ 465.803427] [] (__device_attach_driver) from [] (bus_for_each_drv+0x4c/0x9 4) [ 465.803433] r6:c03f97c0 r5:ef21fd30 r4:00000000 r3:00000000 [ 465.803454] [] (bus_for_each_drv) from [] (__device_attach+0xa8/0x10c) [ 465.803460] r6:c0df5c30 r5:ee549454 r4:ee549420 [ 465.803476] [] (__device_attach) from [] (device_initial_probe+0x14/0x18) [ 465.803482] r7:ee548c20 r6:c0df5c30 r5:ee549420 r4:ee549420 [ 465.803503] [] (device_initial_probe) from [] (bus_probe_device+0x8c/0x94) [ 465.803516] [] (bus_probe_device) from [] (device_add+0x388/0x530) [ 465.803521] r6:ee549428 r5:00000000 r4:ee549420 r3:00000001 [ 465.803543] [] (device_add) from [] (device_register+0x1c/0x20) [ 465.803549] r10:ee548c00 r9:ee548c20 r8:ee4fe02c r7:ee549400 r6:ee549420 r5:c072dca0 [ 465.803568] r4:ee549420 [ 465.803582] [] (device_register) from [] (register_virtio_device+0xa8/0xf4 ) [ 465.803588] r4:ee549410 r3:ee5495b8 [ 465.803604] [] (register_virtio_device) from [] (rproc_add_virtio_dev+0x44 /0xa0) [ 465.803610] r6:00000007 r5:ee548c20 r4:ee549400 r3:ee548c44 [ 465.803630] [] (rproc_add_virtio_dev) from [] (rproc_handle_vdev+0x168/0x2 2c) [ 465.803636] r7:ee549400 r6:ee5495f0 r5:00000002 r4:ee4fe058 [ 465.803656] [] (rproc_handle_vdev) from [] (rproc_handle_resources+0x68/0x 118) [ 465.803662] r10:ee548c20 r9:ee4fe02c r8:00000150 r7:ee548c00 r6:00000000 r5:00000028 [ 465.803681] r4:c0e28be0 [ 465.803692] [] (rproc_handle_resources) from [] (rproc_fw_config_virtio+0x f4/0x100) [ 465.803698] r10:00000000 r9:ef629ac0 r8:00000000 r7:0000017c r6:f1d125d0 r5:ee5393c0 [ 465.803718] r4:ee548c00 [ 465.803730] [] (rproc_fw_config_virtio) from [] (request_firmware_work_fun c+0x38/0x60) [ 465.803735] r7:ef62d200 r6:ef629ac0 r5:ee539540 r4:ee539540 [ 465.803757] [] (request_firmware_work_func) from [] (process_one_work+0x12 8/0x330) [ 465.803763] r4:ef218800 [ 465.803774] [] (process_one_work) from [] (worker_thread+0x34/0x4b0) [ 465.803780] r10:ef629ac0 r9:ef629ac0 r8:00000008 r7:ef218818 r6:ef218800 r5:00000001 [ 465.803799] r4:ef629ad4 [ 465.803812] [] (worker_thread) from [] (kthread+0xe0/0xfc) [ 465.803818] r10:00000000 r9:00000000 r8:00000000 r7:c00555d8 r6:ef218800 r5:00000000 [ 465.803838] r4:ef21a1c0 [ 465.803851] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 465.803857] r7:00000000 r6:00000000 r5:c005ac84 r4:ef21a1c0 [ 465.803874] ---[ end trace f363bed9b0637e38 ]--- [ 465.803914] remoteproc remoteproc0: remote processor 58820000.ipu is now up [ 465.804250] virtio_rpmsg_bus virtio0: rpmsg host is online [ 465.804281] remoteproc remoteproc0: registered virtio0 (type 7) [ 465.804293] remoteproc remoteproc0: rsc: type 0 [ 465.804303] remoteproc remoteproc0: rsc: type 0 [ 465.804312] remoteproc remoteproc0: rsc: type 0 [ 465.804321] remoteproc remoteproc0: rsc: type 2 [ 465.804329] remoteproc remoteproc0: rsc: type 1 At At the e2e-Forum I saw, that L3-Registers used for IPC and Co. are NOT PUBLICLY AVAILABLE... wow. Why? Can you tell me something about the error above? THANK YOU for your help .... M + +Everything I tried leads into one of two errors: (1) omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 or: (2) L3 Custom Error: MASTER IPU1 TARGET GPMC (Idle): Data Access in Usermode during Functional access And I am really not able to find out something useful for my use-case when I examine the "ipc..." sources. I do not find, where and how the "xem4" files are build. Of course... there is somewhere a messageq_single.c ...but -> maybe there must be some "pixie dust"... gluing everything together? So here's my question again: I run linux on A15 core. I have to re-use C6x and Cortex M4 code from our other projects and the best way of managing firmware of the subcores is using remoteproc. I use the gnu-linux-eabi toolchain and my editor is not a IDE, it's vi, because I have to understand how the code we will provide "EXACTLY" works. I can not provide any kind of "black box" to my customers, because of the certification we need. What works: I got a Makefile using arm-linux-gnueabi... creating some kind of code using the tda2.lds file, the ARM-startup-code (tried out startup_ARMCM4.S and Core_smp_asm_gnu.sv7M) and of course custom_rsc_table_omap5_ipu.h... I tuned everything together and I am able to configure the MMU rudimentary. But something is missing... leading into one of the two errors shown above, no matter what I try. Without a working example, at least without a working startup code, some kind of baseline... I am not able to reach the point, from which I can do what is my main job: Porting our Code into the new Board design... The usage of linux on A15 instead of RTOS or BIOS makes the usage of the MMU necessary and handling it is obviously not ease... I need help here.... TNX Marco + +Hi, The first error you mention: (1) omap-iommu 58882000.mmu: iommu fault: da 0x0 flags 0x0 Indicates an MMU fault at IPU virtual address 0x0. Based on the original remoteproc logs, I see that virtual address 0x0 was not being programmed in the MMU. The IPU expects the vector table at address 0x0. I see that later, you have added virtual address 0x0 to the resource table, and it is getting mapped. So it seems like you are past that error? For the IPC messageq_single example, the files of interest would be: packages/ti/ipc/tests/messageq_single.c --> source code for test packages/ti/ipc/tests/IpuAmmu_vayu.cfg --> AMMU config, used by SYS/BIOS to configure the AMMU (UNICACHE MMU) (remoteproc doesn't do this) packages/ti/ipc/remoteproc/rsc_table_vayu_ipu.h --> Resource table, used by remoteproc for programming the MMU and setting up IPC packages/ti/ipc/tests/package.bld --> build file Thanks, Angela + +I took a look into the ELF file (objdump) and found out, that the "Pragma" I have to convert to GNU-Style (__attribute__'s) something went wrong. After that I have fixed the linker script... in the provided lds the section of rst_vectors and startup code is not where it belongs. Than I had to fix the "far jump" Problem by fixing the way to jump into "main" and "setup" of the C-Code... and now I am able to bring up M4 with a very simple example. That is what WE NEED: Only as much code as necessary to start work on M4 subcore. BUT... such a example would be nice for everyone who wants to code on TDA2 subcores on its own, without being in the jail of the TI SDK, which links "across country" through much different directory... a little bit of XDC here, calling SYS/BIOS there... including some code (!) generated by configuration process... it is hard to brake out of this jail and this can not be the goal of an BSP (!) which should help bringing up a system in the use case of the costumer. So I'm a little bit surprised and be afraid of the future, when complex drivers of MIPI or other L3 Peripherie have to be ported from TI-SDK into our own, bare metal world... ;-) Best regards: Marco... + diff --git a/data2/text/range/30001+/637609.txt b/data2/text/range/30001+/637609.txt new file mode 100644 index 0000000000000000000000000000000000000000..d6d2d001e3ad1bfc6ca6c3f29e3ee83ea134d68b --- /dev/null +++ b/data2/text/range/30001+/637609.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2HG: About error message during booting + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2, DRA742, PMP, DRA752 Hi Sir We used TI TDA2 EVM with Linux(linux+BIOS) SDK 3.0.0 for development. we sometimes found below error message in below three stages 1. At SPL stage 2. At u-boot stage 3. At kernel init stage //=========================================================================================// U-Boot SPL 2016.05-00002-g68a4cab (Oct 27 2017 - 02:16:08) DRA752-GP ES1.1 MMC Device 1 not found *** Warning - No MMC card found, using default environment Trying to boot from MMC1 spl: falcon_args_file not set in environment, falling back to default reading args spl_load_image_fat_os: error reading image args, err - -1 reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00002-g68a4cab (Oct 27 2017 - 02:16:08 -0700) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 3 ms (53.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3634048 bytes read in 174 ms (19.9 MiB/s) 109715 bytes read in 37 ms (2.8 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x377380 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffffc92 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.45-00014-gdee2e68 (root@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Jul 11 20:44:31 PDT 2017 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES1.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef627000 s14848 r8192 d22016 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=6992fc65-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 328752K/979968K available (6627K kernel code, 371K rwdata, 2492K rodata, 332K init, 290K bss, 446416K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08f0044 (9121 kB) [ 0.000000] .init : 0xc08f1000 - 0xc0944000 ( 332 kB) [ 0.000000] .data : 0xc0944000 - 0xc09a0fd0 ( 372 kB) [ 0.000000] .bss : 0xc09a2000 - 0xc09ea880 ( 291 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000337] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000345] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000818] Console: colour dummy device 80x30 [ 0.000834] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000840] This ensures that you still see kernel messages. Please [ 0.000845] update your kernel commandline. [ 0.000858] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000871] pid_max: default: 32768 minimum: 301 [ 0.000963] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000973] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001506] Initializing cgroup subsys io [ 0.001522] Initializing cgroup subsys memory [ 0.001547] Initializing cgroup subsys devices [ 0.001559] Initializing cgroup subsys freezer [ 0.001571] Initializing cgroup subsys perf_event [ 0.001583] Initializing cgroup subsys pids [ 0.001611] CPU: Testing write buffer coherency: ok [ 0.001810] /cpus/cpu@0 missing clock-frequency property [ 0.001826] /cpus/cpu@1 missing clock-frequency property [ 0.001836] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001876] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080164] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080227] Brought up 2 CPUs [ 0.080240] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080247] CPU: All CPU(s) started in HYP mode. [ 0.080252] CPU: Virtualization extensions available. [ 0.080620] devtmpfs: initialized [ 0.110002] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110957] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.207336] omap_hwmod: vpe: no dt node [ 0.207345] ------------[ cut here ]------------ [ 0.207358] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2523 _init.constprop.23+0x200/0x428() [ 0.207365] omap_hwmod: vpe: doesn't have mpu register target base [ 0.207371] Modules linked in: [ 0.207384] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.45-00014-gdee2e68 #1 [ 0.207392] Hardware name: Generic DRA74X (Flattened Device Tree) [ 0.207399] Backtrace: [ 0.207419] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 0.207426] r7:c08fe01c r6:60000013 r5:00000000 r4:c0970e0c [ 0.207454] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 0.207467] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 0.207474] r7:c08fe01c r6:000009db r5:00000009 r4:ef073e58 [ 0.207496] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 0.207503] r8:000000ab r7:ef1e86c0 r6:00000000 r5:00000000 r4:c08257b0 [ 0.207528] [] (warn_slowpath_fmt) from [] (_init.constprop.23+0x200/0x428) [ 0.207534] r3:c0827a90 r2:c08257b0 [ 0.207545] r4:c0954e98 [ 0.207557] [] (_init.constprop.23) from [] (__omap_hwmod_setup_all+0x48/0x98) [ 0.207564] r10:00000000 r9:c08f1600 r8:000000ab r7:ef1e86c0 r6:c09496b0 r5:c094bb38 [ 0.207585] r4:c0954e98 [ 0.207598] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0x98/0x1e4) [ 0.207604] r5:c08fe32c r4:c09496b0 [ 0.207620] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) [ 0.207626] r10:00000002 r9:c08f1600 r8:000000ab r7:c0931820 r6:c093eff4 r5:c09a2000 [ 0.207647] r4:c09a2000 [ 0.207664] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) [ 0.207670] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0679ccc [ 0.207690] r4:c09a2000 [ 0.207703] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 0.207709] r5:c0679ccc r4:00000000 [ 0.207732] ---[ end trace 98c5860f6f9b790f ]--- [ 0.209863] omap_hwmod: wd_timer2: no dt node [ 0.209869] ------------[ cut here ]------------ [ 0.209880] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2523 _init.constprop.23+0x200/0x428() [ 0.209887] omap_hwmod: wd_timer2: doesn't have mpu register target base [ 0.209892] Modules linked in: [ 0.209904] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.4.45-00014-gdee2e68 #1 [ 0.209910] Hardware name: Generic DRA74X (Flattened Device Tree) [ 0.209916] Backtrace: [ 0.209932] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 0.209939] r7:c08fe01c r6:60000013 r5:00000000 r4:c0970e0c [ 0.209963] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 0.209974] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 0.209980] r7:c08fe01c r6:000009db r5:00000009 r4:ef073e58 [ 0.210001] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 0.210006] r8:000000ab r7:ef1e86c0 r6:00000000 r5:00000000 r4:c08257b0 [ 0.210030] [] (warn_slowpath_fmt) from [] (_init.constprop.23+0x200/0x428) [ 0.210036] r3:c0824ad0 r2:c08257b0 [ 0.210047] r4:c0950018 [ 0.210059] [] (_init.constprop.23) from [] (__omap_hwmod_setup_all+0x48/0x98) [ 0.210064] r10:00000000 r9:c08f1600 r8:000000ab r7:ef1e86c0 r6:c09496b0 r5:c094bb38 [ 0.210085] r4:c0950018 [ 0.210097] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0x98/0x1e4) [ 0.210103] r5:c08fe32c r4:c09496b0 [ 0.210118] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) [ 0.210124] r10:00000002 r9:c08f1600 r8:000000ab r7:c0931820 r6:c093eff4 r5:c09a2000 [ 0.210145] r4:c09a2000 [ 0.210158] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) [ 0.210164] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0679ccc [ 0.210184] r4:c09a2000 [ 0.210197] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 0.210203] r5:c0679ccc r4:00000000 [ 0.210229] ---[ end trace 98c5860f6f9b7910 ]--- [ 0.320995] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.325286] pinctrl core: initialized pinctrl subsystem [ 0.326145] NET: Registered protocol family 16 [ 0.327069] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350391] cpuidle: using governor ladder [ 0.380418] cpuidle: using governor menu [ 0.388968] OMAP GPIO hardware version 0.1 [ 0.395488] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.412325] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.412339] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.422035] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.422045] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.422514] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.422524] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.423100] OMAP DMA hardware revision 0.0 [ 0.461687] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462850] edma 43300000.edma: memcpy is disabled [ 0.467466] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471747] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471934] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472100] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472264] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472548] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472751] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475943] palmas 0-0058: IRQ missing: skipping irq request [ 0.491093] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563397] pcf857x 0-0020: probed [ 0.563980] pcf857x 0-0021: probed [ 0.564133] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.581094] pcf857x 1-0026: probed [ 0.581633] mcp230xx: probe of 1-0027 failed with error -121 [ 0.581862] mcp230xx: probe of 1-0021 failed with error -121 [ 0.582086] mcp230xx: probe of 1-0025 failed with error -121 [ 0.582816] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 0.583198] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.583406] media: Linux media interface: v0.10 [ 0.583457] Linux video capture interface: v2.00 [ 0.583495] pps_core: LinuxPPS API ver. 1 registered [ 0.583502] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.583525] PTP clock support registered [ 0.583572] EDAC MC: Ver: 3.0.0 [ 0.584345] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.584643] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.584998] Advanced Linux Sound Architecture Driver Initialized. [ 0.585846] clocksource: Switched to clocksource arch_sys_counter [ 0.596396] NET: Registered protocol family 2 [ 0.596894] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.596957] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.597082] TCP: Hash tables configured (established 8192 bind 8192) [ 0.597131] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.597162] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.597364] NET: Registered protocol family 1 [ 0.597631] RPC: Registered named UNIX socket transport module. [ 0.597640] RPC: Registered udp transport module. [ 0.597647] RPC: Registered tcp transport module. [ 0.597653] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.598649] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.601047] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.608697] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.609352] NFS: Registering the id_resolver key type [ 0.609379] Key type id_resolver registered [ 0.609386] Key type id_legacy registered [ 0.609456] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.611418] bounce: pool size: 64 pages [ 0.611568] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.611585] io scheduler noop registered [ 0.611600] io scheduler deadline registered [ 0.611635] io scheduler cfq registered (default) [ 0.616568] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.619719] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.619732] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.619765] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.619786] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.649646] dra7-pcie 51000000.pcie_rc: link is not up [ 0.649819] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.649832] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.649843] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.649853] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.650260] PCI: bus0: Fast back to back transfers disabled [ 0.650378] PCI: bus1: Fast back to back transfers enabled [ 0.650463] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.650477] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.650490] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.650711] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.652864] fpd3_serdes 1-001b: Removed conflict b/w HDMI SIL [ 0.674526] fpd3_serdes: probe of 7-002c failed with error -5 [ 0.674685] fpd3_serdes 1-001b: Serializer fpd3_24b_ser ready [ 0.676634] fpd3_serdes 7-002c: Deserializer fpd3_24b_des ready [ 0.736687] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.740031] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 2.187274] console [ttyS0] enabled [ 2.191672] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 2.201385] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 2.211438] [drm] Initialized drm 1.1.0 20060810 [ 2.218087] OMAP DSS rev 6.1 [ 2.221855] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 2.230224] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) [ 2.326199] loop: module loaded [ 2.329833] vmemexp device MAJOR num = 246 [ 2.333960] vmemexp class registered [ 2.337693] /dev/vmemexp device registered [ 2.341808] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 2.347516] nand: No NAND device found [ 2.351286] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 2.361083] m25p80 spi32766.0: unrecognized JEDEC id bytes: 00, 0, 0 [ 2.368638] libphy: Fixed MDIO Bus: probed [ 2.415878] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.422003] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 2.442218] libphy: 48485000.mdio: probed [ 2.446289] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 2.454330] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 2.463048] cpsw 48484000.ethernet: Detected MACID = 7c:66:9d:f1:d8:92 [ 2.469745] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 2.476743] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:66:9d:f1:d8:93 [ 2.485384] mousedev: PS/2 mouse device common for all mice [ 2.501806] i2c /dev entries driver [ 2.506307] ov1063x 1-0037: Failed writing register 0x0103! [ 2.511919] ov1063x: probe of 1-0037 failed with error -121 [ 2.517887] ov1063x 1-0030: Failed writing register 0x0103! [ 2.523495] ov1063x: probe of 1-0030 failed with error -121 [ 2.534165] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.566476] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.572862] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.579421] evm_3v3_sw: supplied by sysen1 [ 2.659631] mmc0: MAN_BKOPS_EN bit is not set [ 2.669512] mmc0: new HS200 MMC card at address 0001 [ 2.684959] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.689752] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.705959] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 3.030198] ledtrig-cpu: registered to indicate activity on CPUs [ 3.039333] aic_dvdd: supplied by evm_3v3_sw [ 3.045108] davinci-mcasp 48468000.mcasp: ERRATA i868 workaround is enabled [ 3.052376] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 3.059430] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok [ 3.070262] NET: Registered protocol family 10 [ 3.075542] sit: IPv6 over IPv4 tunneling driver [ 3.080751] NET: Registered protocol family 17 [ 3.085437] Key type dns_resolver registered [ 3.089856] omap_voltage_late_init: Voltage driver support not added [ 3.096778] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.102992] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.109719] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.115974] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.124188] Power Management for TI OMAP4+ devices. [ 3.129332] Registering SWP/SWPB emulation handler [ 3.136261] dmm 4e000000.dmm: initialized all PAT entries [ 3.144471] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.151147] [drm] No driver support for vblank timestamp query. [ 3.157586] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 3.164972] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 3.207180] asoc-simple-card sound@0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 3.221991] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 3.228899] hctosys: unable to open rtc device (rtc0) [ 3.242543] aic_dvdd: disabling [ 3.245699] vmmcwl_fixed: disabling [ 3.249391] ldousb: disabling [ 3.252785] ALSA device list: [ 3.255762] #0: DRA7xx-EVM [ 3.258667] #1: HDMI 58040000.encoder [ 3.263164] Waiting for root device PARTUUID=6992fc65-02... [ 3.357933] omap_hsmmc 4809c000.mmc: card busy [ 3.517930] omap_hsmmc 4809c000.mmc: card busy [ 3.678025] omap_hsmmc 4809c000.mmc: card busy [ 3.837949] omap_hsmmc 4809c000.mmc: card busy [ 3.997936] omap_hsmmc 4809c000.mmc: card busy [ 4.157945] omap_hsmmc 4809c000.mmc: card busy [ 4.317946] omap_hsmmc 4809c000.mmc: card busy [ 4.477947] omap_hsmmc 4809c000.mmc: card busy [ 4.637946] omap_hsmmc 4809c000.mmc: card busy [ 4.797946] omap_hsmmc 4809c000.mmc: card busy [ 4.835866] mmc2: Skipping voltage switch [ 4.943161] mmc2: host does not support reading read-only switch, assuming write-enable [ 4.953219] mmc2: new high speed SDHC card at address 0007 [ 4.959210] mmcblk1: mmc2:0007 SD04G 3.71 GiB [ 4.964875] mmcblk1: p1 p2 [ 5.027143] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 5.036344] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 5.502231] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 5.510436] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 5.517514] devtmpfs: mounted [ 5.520719] Freeing unused kernel memory: 332K (c08f1000 - c0944000) [ 5.528020] This architecture does not have kernel memory protection. [ 5.796953] systemd[1]: System time before build time, advancing clock. [ 5.843330] random: systemd: uninitialized urandom read (16 bytes read, 26 bits of entropy available) [ 5.856920] random: systemd: uninitialized urandom read (16 bytes read, 26 bits of entropy available) [ 5.868657] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 5.887185] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 5.917001] systemd[1]: Set hostname to . [ 5.982523] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 6.017013] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 6.027263] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 6.051717] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 28 bits of entropy available) [ 6.072356] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 28 bits of entropy available) [ 6.175084] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) [ 6.184623] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) [ 6.194592] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) [ 6.546478] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 6.554267] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 6.562034] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 6.569340] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 6.576789] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 6.586267] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 6.619639] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 6.646668] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 6.678375] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 6.706080] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 6.726157] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 6.746129] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 6.776151] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 6.806037] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 6.826214] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 6.846034] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 6.866081] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 6.886073] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 6.906180] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 6.926170] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 6.956061] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 6.976645] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 6.996149] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 7.056209] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 7.088240] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 7.118258] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 7.132326] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ 7.186269] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 7.218151] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 7.248966] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 7.278254] systemd[1]: Starting Journal Service... Starting Journal Service... [ 7.308400] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 7.342819] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 7.366126] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 7.386093] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 7.416317] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Setup Virtual Console. Starting Create Static Device Nodes in /dev... Starting udev Coldplug all Devices... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 8.067820] systemd-journald[150]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started udev Coldplug all Devices. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. [ 8.585376] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 Starting Create Volatile Files and Directories... [ 8.606067] remoteproc0: 58820000.ipu is available [ OK ] Started Load/Save Random Seed.[ 8.627800] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 8.671152] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Create Volatile Files and Directories.[ 8.706975] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 8.721856] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 [ 8.750511] remoteproc0: failed to load dra7-ipu1-fw.xem4 [ 8.761907] remoteproc1: 55020000.ipu is available [ OK ] Found device /dev/ttyS0.[ 8.767320] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 8.803676] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 8.819458] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 Starting Update UTMP about System Boot/Shutdown... [ 8.843195] remoteproc2: 40800000.dsp is available [ 8.848774] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 8.864023] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 8.888684] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 Starting Network Time Synchronization... [ 8.908499] remoteproc3: 41000000.dsp is available [ 8.915722] remoteproc3: Note: remoteproc is still under development and considered experimental. [ 8.952759] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Network Time Synchronization. Starting Synchronize System and HW clocks... [ OK ] Reached target System Time Synchronized. [ 9.629553] SCSI subsystem initialized [FAILED] Failed to start Synchronize System and HW clocks. See 'systemctl status sync-clocks.service' for details. [ OK ] Reached target System Initialization. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ OK ] Listening on RPCbind Server Activation Socket. [ 9.770798] remoteproc2: registered virtio0 (type 7) [ 9.873363] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 9.938559] CAN device driver interface [ OK ] Listening on dropbear.socket. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Reached target Basic System. Starting Avahi mDNS/DNS-SD Stack... Starting uim-sysfs.service... Starting Permit User Sessions... Starting Telephony service... [ 10.345818] remoteproc1: registered virtio1 (type 7) [ OK ] Started System Logging Service. [ OK ] Started Kernel Logging Service. [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. Starting Print notice about GPLv3 packages... [ 11.393572] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ 11.406912] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 11.413320] alg: skcipher: setkey failed on test 5 for ecb-des-omap: flags=100 [ 11.423496] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 [ 11.433144] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 Starting Save/Restore Sound Card State... [ OK ] Started D-Bus System Message Bus. [ 11.523843] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=359) [ 11.558509] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 11.568113] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 11.571951] remoteproc3: registered virtio2 (type 7) [ 11.588068] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 11.616052] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 11.684392] scsi host0: ahci [ 11.687788] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 343 [ 11.716089] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 12.055906] ata1: SATA link down (SStatus 0 SControl 300) [ 12.177197] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 12.206489] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ OK ] Started Avahi mDNS/DNS-SD Stack. [ OK ] Started Telephony service. Starting Network Service... Starting Login Service... [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 12.678155] Bluetooth: Core ver 2.21 [ 12.681790] NET: Registered protocol family 31 [ 12.732304] Bluetooth: HCI device and connection manager initialized [ 12.754329] Bluetooth: HCI socket layer initialized [ 12.759270] Bluetooth: L2CAP socket layer initialized [ 12.836263] Bluetooth: SCO socket layer initialized [ 12.841648] NET: Registered protocol family 15 [ 12.847917] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 12.880607] net eth1: initializing cpsw version 1.15 (0) [ OK ] Started Network Service. [ 12.920606] net eth0: initialized cpsw ale version 1.4 [ 12.955762] net eth0: ALE Table size 1024 [ 13.089921] net eth1: phy found : id is : 0x20005c7a [ 13.183526] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 13.307013] net eth0: initializing cpsw version 1.15 (0) [ 13.325515] Initializing XFRM netlink socket [ 13.349136] remoteproc2: powering up 40800000.dsp [ 13.373049] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 7432816 [ 13.394916] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 13.400817] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 13.406762] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 13.449662] net eth0: phy found : id is : 0x20005c7a [ 13.470338] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 13.474596] remoteproc2: remote processor 40800000.dsp is now up [ 13.482560] virtio_rpmsg_bus virtio0: rpmsg host is online [ OK ] Started uim-sysfs.service. [ 13.507102] remoteproc1: powering up 55020000.ipu [ 13.548458] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 8835344 [ 13.566799] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 13.623807] remoteproc1: remote processor 55020000.ipu is now up [ 13.656149] virtio_rpmsg_bus virtio1: rpmsg host is online [ 13.662403] remoteproc3: powering up 41000000.dsp [ 13.683376] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 7432816 [ 13.712466] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 13.718361] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 13.724297] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 13.806380] remoteproc3: remote processor 41000000.dsp is now up [ 13.813822] virtio_rpmsg_bus virtio2: rpmsg host is online [ 13.897362] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 13.906680] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 13.925890] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 13.942731] NET: Registered protocol family 41 [ 14.000289] random: nonblocking pool is initialized Starting rc.pvr.service... [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Reached target Sound Card. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Started Login Service. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ 14.391825] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started Network Name Resolution. [ 14.530235] usbcore: registered new interface driver usbfs [ 14.536703] usbcore: registered new interface driver hub [ 14.542329] usbcore: registered new device driver usb [ OK ] Started rc.pvr.service. Starting weston.service... [ 14.633326] dwc3 48890000.usb: otg: primary host xhci-hcd.1.auto registered [ 14.640541] dwc3 48890000.usb: otg: shared host xhci-hcd.1.auto registered [ 14.649690] dwc3 48890000.usb: otg: can't start till gadget registers [ 14.656854] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller [ 14.662795] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 [ 14.672561] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 14.681455] xhci-hcd xhci-hcd.2.auto: irq 502, io mem 0x488d0000 [ 14.689556] hub 1-0:1.0: USB hub found [ 14.693363] hub 1-0:1.0: 1 port detected [ 14.693676] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller [ 14.693689] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 [ 14.693755] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 14.694806] hub 2-0:1.0: USB hub found [ 14.694831] hub 2-0:1.0: 1 port detected [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# ./camnodes.sh cam device major num is BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR BusyBox v1.24.1 (2017-03-09 08:05:24 IST) multi-call binary. Usage: mknod [-m MODE] NAME TYPE MAJOR MINOR ls: /dev/cam*: No such file or directory root@dra7xx-evm:/opt/vision_sdk# ./memcache_load.sh [ 36.857533] DMA: Module install successful, device major num = 243 [ 36.863838] DRV: Module install successful root@dra7xx-evm:/opt/vision_sdk# ./apps.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb69a8000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa1fa8000 of size 0x14a00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa1ee8000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa1f28000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0530000 to 0xa1ce8000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 46.665405 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 46.665497 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 46.665497 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 46.666870 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 46.666900 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 46.666931 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 46.666961 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 46.668120 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 46.668151 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 46.668181 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 46.668212 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 46.669340 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 46.669340 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 46.669371 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 46.669401 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 46.669523 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 46.669554 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 46.669706 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 46.669737 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 46.669737 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 46.669859 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 46.670011 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 46.670133 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 46.670255 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 46.670377 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 46.670499 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 46.670621 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 46.670743 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 46.670865 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 46.671018 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 46.671109 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 46.671262 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 46.671384 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 46.671506 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 46.671689 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 46.671841 s: SGX3DSRV_0 : Init done - linkid-0x2000041 [HOST] [HOST ] 46.671963 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 46.672116 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 46.672207 s: ALGORITHM_2 : Init done - linkid-0x2000033 [ 40.333690] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 40.359911] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [HOST] [HOST ] 46.672512 s: ALGORITHM_4 : Init done - likid-0x2000035 [HOST] [HOST ] 46.672634 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 46.672756 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 46.672909 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 46.673092 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 46.673305 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 46.673458 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 46.673641 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 46.673824 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 46.673946 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 46.674068 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 46.674190 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 46.674312 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 46.674464 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 46.674586 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 46.674739 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 46.674861 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 46.675013 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 46.675166 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 46.675288 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 46.675410 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 46.678978 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 46.679100 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 46.679222 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 46.679344 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 46.679466 s: SGX3DSFM_0 : Init done - linkid-0x2000042 [HOST] [HOST ] 46.679466 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 46.680290 s: OSA: Adjusting global time, timeH by 0 units!!! VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 20.167236 s: ***** DSP1 Firmware build time 18:05:22 Jul 17 2017 [HOST] [DSP1 ] 20.167327 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 20.174190 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 20.174434 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 20.174464 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 20.174495 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 20.491337 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 20.510553 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 20.535594 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 20.555633 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 20.575642 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 20.595589 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 20.595620 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 20.595681 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 20.595742 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 20.595772 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 20.595803 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 20.595864 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 20.595894 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 20.596047 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 20.596169 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 20.596840 s: tivxInit CoreId = 3 [HOST] [DSP1 ] 20.596901 s: VX_ZONE_INIT:Enabled [HOST] [DSP1 ] 20.596931 s: VX_ZONE_ERROR:Enabled [HOST] [DSP1 ] 20.596962 s: VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 20.597297 s: VX_ZONE_INIT:[ownReserveC66xL2MEM:97] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP1 ] 20.597663 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP1 ] 20.597694 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 20.597724 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 20.597968 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 20.597999 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 20.598029 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516216 B (504 KB) [HOST] [DSP1 ] 20.598060 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 20.605288 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 20.605349 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 20.928445 s: UTILS: XMC_MPU: Segments used = 5 [HOST] [DSP1 ] 20.928475 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 20.928506 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 20.499115 s: ***** DSP2 Firmware build time 18:08:18 Jul 17 2017 [HOST] [DSP2 ] 20.499176 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 20.505459 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 20.505703 s: UTILS: CIO: Init Done !!! [HOST] [DSP2 ] 20.505734 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 20.505764 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 20.508601 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 20.510553 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 20.545507 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 20.565515 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 20.585493 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 20.605502 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 20.605532 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 20.605593 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 20.605654 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 20.605685 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 20.605746 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 20.605776 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 20.605807 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 20.605990 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 20.606081 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 20.606752 s: tivxInit CoreId = 4 [HOST] [DSP2 ] 20.606813 s: VX_ZONE_INIT:Enabled [HOST] [DSP2 ] 20.606874 s: VX_ZONE_ERROR:Enabled [HOST] [DSP2 ] 20.606905 s: VX_ZONE_WARNING:Enabled [HOST] [DSP2 ] 20.607240 s: VX_ZONE_INIT:[ownReserveC66xL2MEM:97] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP2 ] 20.607606 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP2 ] 20.607637 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 20.607667 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 20.607911 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 20.607942 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 20.607972 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516216 B (504 KB) [HOST] [DSP2 ] 20.608003 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 20.616726 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 20.616787 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 20.930458 s: UTILS: XMC_MPU: Segments used = 5 [HOST] [DSP2 ] 20.930488 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 20.930519 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 20.489050 s: ***** EVE Firmware build time 18:00:30 Jul 17 2017 [HOST] [EVE1 ] 20.490819 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 20.493991 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 20.496217 s: UTILS: CIO: Init Done !!! [HOST] [EVE1 ] 20.497193 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 20.498169 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 20.525925 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 20.535594 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 20.545507 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 20.585646 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 20.615628 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 20.635637 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 20.636735 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 20.637985 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 20.639205 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 20.640486 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 20.641706 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 20.643018 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 20.644268 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 20.645976 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 20.646861 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 20.659763 s: tivxInit CoreId = 5 [HOST] [EVE1 ] 20.661227 s: VX_ZONE_INIT:Enabled [HOST] [EVE1 ] 20.662660 s: VX_ZONE_ERROR:Enabled [HOST] [EVE1 ] 20.664124 s: VX_ZONE_WARNING:Enabled [HOST] [EVE1 ] 20.667876 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE1 ] 20.668944 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 20.669920 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 20.671323 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 20.672451 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 20.673671 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 20.675989 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE1 ] 20.678124 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 20.762520 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 20.763527 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 20.489294 s: ***** EVE Firmware build time 18:01:36 Jul 17 2017 [HOST] [EVE2 ] 20.491063 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 20.494357 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 20.496522 s: UTILS: CIO: Init Done !!! [HOST] [EVE2 ] 20.497468 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 20.498474 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 20.545964 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 20.555633 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 20.565515 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 20.585646 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 20.635484 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 20.655462 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 20.656530 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 20.657841 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 20.659153 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 20.660464 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 20.661776 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 20.663057 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 20.664460 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 20.666259 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 20.667205 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 20.680351 s: tivxInit CoreId = 6 [HOST] [EVE2 ] 20.681906 s: VX_ZONE_INIT:Enabled [HOST] [EVE2 ] 20.683401 s: VX_ZONE_ERROR:Enabled [HOST] [EVE2 ] 20.685017 s: VX_ZONE_WARNING:Enabled [HOST] [EVE2 ] 20.688891 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE2 ] 20.689989 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 20.690965 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 20.692399 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 20.693558 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 20.694900 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 20.697126 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE2 ] 20.699261 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 20.783901 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 20.784999 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 20.489233 s: ***** EVE Firmware build time 18:02:37 Jul 17 2017 [HOST] [EVE3 ] 20.490971 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 20.494265 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 20.496400 s: UTILS: CIO: Init Done !!! [HOST] [EVE3 ] 20.497346 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 20.498322 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 20.565942 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 20.575642 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 20.585493 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 20.615628 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 20.635484 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 20.675471 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 20.676538 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 20.677911 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 20.679314 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 20.680717 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 20.682089 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 20.683492 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 20.684926 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 20.686817 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 20.687824 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 20.700817 s: tivxInit CoreId = 7 [HOST] [EVE3 ] 20.702372 s: VX_ZONE_INIT:Enabled [HOST] [EVE3 ] 20.703867 s: VX_ZONE_ERROR:Enabled [HOST] [EVE3 ] 20.705514 s: VX_ZONE_WARNING:Enabled [HOST] [EVE3 ] 20.709388 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE3 ] 20.710455 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 20.711431 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 20.712865 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 20.714024 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 20.715366 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 20.717592 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE3 ] 20.719697 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 20.800646 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 20.801653 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 20.489324 s: ***** EVE Firmware build time 18:03:42 Jul 17 2017 [HOST] [EVE4 ] 20.491093 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 20.494357 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 20.496522 s: UTILS: CIO: Init Done !!! [HOST] [EVE4 ] 20.497437 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 20.498444 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 20.585951 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 20.595589 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 20.605502 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 20.635637 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 20.655462 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 20.675471 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 20.676538 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 20.677911 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 20.679314 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 20.680686 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 20.682089 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 20.683462 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 20.684895 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 20.686787 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 20.687854 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 20.700847 s: tivxInit CoreId = 8 [HOST] [EVE4 ] 20.702403 s: VX_ZONE_INIT:Enabled [HOST] [EVE4 ] 20.703928 s: VX_ZONE_ERROR:Enabled [HOST] [EVE4 ] 20.705545 s: VX_ZONE_WARNING:Enabled [HOST] [EVE4 ] 20.709418 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE4 ] 20.710486 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 20.711462 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 20.712895 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 20.714085 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 20.715427 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 20.717653 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE4 ] 20.719758 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 20.800707 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 20.801714 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 20.380070 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 20.410815 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 20.441499 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 20.473525 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 20.473647 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 20.473708 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 20.473799 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 20.473860 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 20.473952 s: ***** IPU2 Firmware build time 18:10:45 Jul 17 2017 [HOST] [IPU2 ] 20.474104 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 20.477459 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 20.488592 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 20.488714 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 20.488806 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 20.491337 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 20.508601 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 20.525925 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 20.545964 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 20.565942 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 20.585951 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 20.586042 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 20.586195 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 20.586317 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 20.586439 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 20.586561 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 20.586652 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 20.586805 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 20.588513 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 20.588909 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 20.593973 s: tivxInit CoreId = 9 [HOST] [IPU2 ] 20.594156 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 20.594278 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 20.594400 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 20.598090 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 20.598182 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 20.598243 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 20.598304 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 20.598395 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 20.598456 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 20.598548 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 20.598609 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 20.598792 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 20.598883 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 20.598944 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 20.601933 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 20.602025 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 20.602116 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 20.602238 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 20.602299 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 20.602391 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 20.602696 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 20.602818 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 20.602909 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 20.603001 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 20.603092 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 20.603153 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 20.603489 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 20.603580 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 20.603641 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 20.603763 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 20.603855 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 20.603946 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 20.604251 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 20.604343 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 20.604434 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 20.604526 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 20.604617 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 20.604709 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 20.661227 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 20.662111 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 20.662355 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 20.662477 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253784 B (247 KB) [HOST] [IPU2 ] 20.662630 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 20.662813 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 346030080 B (330 MB), Free size = 346030080 B (330 MB) [HOST] [IPU2 ] 20.663026 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 861056 B (0 MB) [HOST] [IPU2 ] 20.663179 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 20.919996 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 21.004422 s: CHAINS: Application Started !!! [HOST] [HOST ] 47.024126 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 47.526078 s: [HOST] [HOST ] [HOST] [HOST ] ========= [HOST] [HOST ] Test Menu [HOST] [HOST ] ========= [HOST] [HOST ] [HOST] [HOST ] Single Camera Use-cases, [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] Multi-Camera LVDS Use-cases, [HOST] [HOST ] ---------------------------- [HOST] [HOST ] a: 4CH VIP LVDS capture + SGX MOSAIC + DISPLAY [HOST] [HOST ] b: 4CH VIP LVDS capture + 3D SRV (SGX/A15) + DISPLAY - Only HDMI 1080p display supported [HOST] [HOST ] l: 4CH VIP LVDS 2MP capture + 3D SRV (SGX/A15) + DISPLAY - Only HDMI 1080p display supported [HOST] [HOST ] c: 4CH VIP LVDS capture + 3D SRV + 4CH SfM (3D perception demo - EVE1-4/DSP1&2) + DISPLAY - Only on TDA2xx with HDMI 1080p display [HOST] [HOST ] d: 2CH OV490 2560x720 capture + Split + 3D SRV (SGX/A15) + DISPLAY - Only HDMI 1080p display supported [HOST] [HOST ] e: Surround View Calibration [HOST] [HOST ] k: CSI2 CAL Surround View Calibration [HOST] [HOST ] o: 4CH VIP LVDS capture + Adaptive 3D SRV (SGX/A15) + DISPLAY - Only HDMI 1080p display supported [HOST] [HOST ] [HOST] [HOST ] AVB RX Use-cases, (TDA2x ONLY) [HOST] [HOST ] ------------------------------ [HOST] [HOST ] [HOST] [HOST ] OPENVX Usecase, (TDA2x ONLY) [HOST] [HOST ] ---------------------------- [HOST] [HOST ] m: OpenVX v1.1 Conformance Test [HOST] [HOST ] q: OpenVX Tutorials [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] //===================================================================// BTW, this experipment only happens when we used Linux SDK. If we do system booting by using BIOS SDK, there is no error message please advise and thanks for your help. BR Ymin + +Responses: +Hello Ymin, Looks like this has been asked before, can you try with a space in the build command like so: e2e.ti.com/.../595799 Thanks, Alex + diff --git a/data2/text/range/30001+/651610.txt b/data2/text/range/30001+/651610.txt new file mode 100644 index 0000000000000000000000000000000000000000..9695cfec03d9248ad2c45ff33c8d10018992648a --- /dev/null +++ b/data2/text/range/30001+/651610.txt @@ -0,0 +1,4671 @@ +Ticket Name: RTOS/TDA2HV: Need example code to run in the use case mode + +Query Text: +Part Number: TDA2HV Other Parts Discussed in Thread: SYSBIOS, TDA2 Tool/software: TI-RTOS Hi All, We are working on the ADAS's TDA2x platform.We designed our custom board using a TDA2HV processor.We use using the vision SDK for development.We are using the lvds_vip_multicam_view use case. We want to use SPI's data to in our use case.For SPI interfacing TI provided the utils_Mcspi.c and utils_MCspi.h file, This file only contains SPI initialization function.So, how we can write and read into the SPI transmit and receive buffer. My query is, 1) Can you please share SPI'slave example code in which we can run in the use case? Please let me know if you need the more information from our side. Thanks, Parth Modi + +Responses: +Hi Parth, Drivers folder has mcspi master slave app that you can refer. I can help you with exact path if you specify the VSDK version you are using. Thanks. Regards, Rishabh + +Hi Rishabh, Thanks for the quick support. We are using the Vision_SDK 3.0. We want to use this data in the lvds use case.So, Can you please provide as function call for spi init,spi read and writeI? Thanks, Parth + +Hi Parth, The mcspi example that caters to you requirement is present here: ti_components\drivers\pdk_01_07_00_16\packages\ti\drv\bsp_lld\mcspi\examples\mcspi_spi1tospi2. Sysbios mcspi driver is based on GIO model. For init you can use GIO_create API. API GIO_issue is used to submit the buffer to the driver and GIO_reclaim is used to get the buffer from the driver. Regards, Rishabh + +Hi Rishabh, As per your suggestion, I explored the MCSPI example code and I made demo code to test the MCSPI1 on our side. I run this code and I get all the initializing function going pass and but the code is stuck at the GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL);. I measured the SPI clock and SPI_cs0 line for confirmation to SPI initialization is worked or not.But it not works. I cant get any SPI clock and cs0 line low. I called start_spi_sample_new(Void) for all the operation. I attached my code for your information. I have some below queries for that, 1) Is there any mistake in flow? 2) Can you please share your suggestion to work this code? Please let me know if you need more information on our side. Thanks, Parth Modi mcspiSample_io.c /* + * Copyright (C) 2012-2017 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + * \file mcspiSample_io.c + * + * \brief McSPI evm to evm communication sample application + * + * This file demonstrates the use of Mcspi by using an + * EVM to EVM communication setup.This file configures one of the evm + * in master mode. + */ + +/* ========================================================================== */ +/* INCLUDE FILES */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcspiSample_io.h" + +/* ========================================================================== */ +/* LOCAL FUNCTION PROTOTYPES */ +/* ========================================================================== */ +EDMA3_DRV_Handle edma3init(UInt32 edma3Id, EDMA3_DRV_Result *); +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq); +void SPI_init(void); +/* ========================================================================== */ +/* MACRO DEFINITONS */ +/* ========================================================================== */ + +/* ========================================================================== */ +/* GLOBAL VARIABLES */ +/* ========================================================================== */ + +EDMA3_DRV_Handle gEdmaHandle; +UInt32 gIsI2cInitReq; +extern const IOM_Fxns Mcspi_IOMFXNS; +HeapMem_Handle myHeap; + +/* + * Buffers placed in external memory are aligned on a 128 bytes boundary. + * In addition, the buffer should be of a size multiple of 128 bytes for + * the cache to work optimally. + */ + +#define BUFLEN (1024 * 4) /* Buffer size */ +#define BUFALIGN 128 /* Alignment of buffer for use of L2 cache */ +#define ITERATION_CNT 100 /* Number of Iterations */ +#define NUM_BUFS 3 /* Num Bufs to be issued and reclaimed */ + +/* handle to the input and output streams */ +GIO_Handle mcspiHandle = NULL; + +/* Global SPI init config data structure */ +Mcspi_Params mcspiPrms; + +Mcspi_DataParam issueDataparam[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(rxbuf, BUFALIGN); +Ptr rxbuf[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(txbuf, BUFALIGN); +Ptr txbuf[NUM_BUFS]; + +Bool failFlag = FALSE; + +/* Function prototype */ + +static void createStream(void); +static void prime(void); + +/* ========================================================================== */ +/* FUNCTION DEFINITIONS */ +/* ========================================================================== */ + +/* + * ======== createStream ======== + */ + +static void createStream(void) +{ + GIO_Params ioParams; + Mcspi_ChanParams chanParams; + Error_Block eb; + + Error_init(&eb); + + /* + * Initialize channel attributes. + */ + GIO_Params_init(&ioParams); + + /* update the edma Handle */ + chanParams.hEdma = gEdmaHandle; + chanParams.chipSelTimeControl = MCSPI_CLK_CYCLE0; + chanParams.fifoEnable = (UInt32) TRUE; + chanParams.spiChipSelectHold = (UInt32) TRUE; + chanParams.chanNum = 0; + + /* If cross bar events are being used then make isCrossBarIntEn = TRUE and + * choose appropriate interrupt number to be mapped (assign it to + * intNumToBeMapped) + */ + /* Cross bar evt disabled */ + chanParams.crossBarEvtParam.isCrossBarIntEn = (UInt32) FALSE; + chanParams.crossBarEvtParam.intNumToBeMapped = 0xFF; /* Invalid number */ + + ioParams.chanParams = (Ptr) & chanParams; + ioParams.model = GIO_Model_ISSUERECLAIM; + ioParams.numPackets = NUM_BUFS + 1; + + mcspiHandle = GIO_create("/mcspi0", GIO_INOUT, &ioParams, &eb); + if (mcspiHandle == NULL) + { + System_printf("\r\nCreate input stream FAILED.\r\n"); + BIOS_exit(0); + } + System_printf("\r\nCreate input stream completed.\r\n"); +} +/* + * \brief Function to submit request the driver.Depending on the macro + * "NUM_BUFS" either the driver can be buffered with multiple requests + * or only one buffer by using the NUM_BUFS as 1. + * + * \param None + * + * \return None + */ +static void prime(void) +{ + + Error_Block eb; + Int32 count = 0; + IHeap_Handle iheap; + UInt32 tempCount = 0; + UInt32 size = 0; + Int status = IOM_COMPLETED; + + iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap); + Error_init(&eb); + + /* Allocate buffers for the GIO buffer exchanges */ + for (count = 0; count < (NUM_BUFS); count++) + { + rxbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == rxbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + + txbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == txbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + } + + /* Fill the buffers with known data and transmit the same and check if the* + * same pattern is received on the other EVM */ + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = tempCount; + } + } + for (count = 0; count < NUM_BUFS; count++) + { + issueDataparam[count].bufLen = BUFLEN; + issueDataparam[count].inBuffer = rxbuf[count]; + issueDataparam[count].outBuffer = txbuf[count]; + + size = issueDataparam[count].bufLen; + + /* Issue the first & second empty buffers to the input stream */ + status = GIO_issue(mcspiHandle, &issueDataparam[count], size, NULL); + + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + } + System_printf("\r\nprime completed\r\n"); +} + +void spiSampleTask(void) +{ + Int32 retVal = FVID2_SOK; + Bsp_PlatformInitParams platInitPrms; + + /* isPinMuxSettingReq parameter will be initialised to TRUE */ + BspPlatformInitParams_init(&platInitPrms); + + platInitPrms.isAllMcSPIInitReq = TRUE; + platInitPrms.isPinMuxSettingReq = TRUE; + + /* Initialize pinmux and evm related configurations */ + Bsp_platformInit(&platInitPrms); + /* System init */ + + if (retVal != FVID2_SOK) + { + System_printf("Error: : System Init Failed!!!\r\n"); + } + /* Set the pin Mux */ + Bsp_boardSetPinMux(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0, + BSP_BOARD_MODE_DEFAULT); + + + /* Set the board muxes */ + Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0); + /* call the function for the SPI application test */ + +} + +/* + * \brief This function demostrates the use of Mcspi using an EVM to EVM + * communication setup. + * + * \param None + * + * \return None + */ +void start_spi_sample_new(Void) +{ + System_printf("\r\nIn start SPI sample new\r\n"); + volatile Int32 i32Count = 0; + Mcspi_DataParam *dataparam = {0}; + UInt32 tempCount = 0; + UInt32 i, loopcount = 0; + UInt32 dataMismatchError = 0; + UInt8 temp8InBufVal = 0, temp8OutBufVal = 0; + UInt16 temp16InBufVal = 0, temp16OutBufVal = 0; + UInt32 temp32InBufVal = 0, temp32OutBufVal = 0; + UInt32 maskVal = 0; + + Int status = IOM_COMPLETED; + + spiSampleTask(); + SPI_init(); + + EDMA3_DRV_Result edmaResult = 0; + + gEdmaHandle = edma3init(0, &edmaResult); + + if (edmaResult != EDMA3_DRV_SOK) + { + /* Report EDMA Error */ + System_printf("\r\nEDMA driver initialization FAIL\r\n"); + } + else + { + System_printf("\r\nEDMA driver initialization PASS.\r\n"); + } + + /* Call createStream function to create I/O streams */ + createStream(); + + /* Call prime function to do priming */ + prime(); + + for (i = 0; i < NUM_BUFS; i++) + { + dataparam = NULL; + /* Reclaim full buffer from the stream */ + System_printf("before the reclaim \r\n"); + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + System_printf("In for loop\r\n"); + if (IOM_COMPLETED != status) + { + System_printf("Iteration %d\r\n", i32Count); + + System_printf( + "Error reclaiming empty buffer from the streams %x" + " error = 0x%d\r\n", + ((Uint8) (dataparam->outBuffer[i32Count])), + status); + break; + } + + maskVal = + ((1 << (mcspiPrms.spiHWCfgData.configChfmt[0].charLength)) - 1); + + for (tempCount = 0; tempCount < BUFLEN; ) + { + if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 8) + { + temp8InBufVal = dataparam->inBuffer[tempCount]; + temp8OutBufVal = dataparam->outBuffer[tempCount]; + + /* temp8OutBufVal & temp8InBufVal is to be aligned with + * charLength. + * temp8InBufVal alignment is required only in case of DMA Mode + */ + if ((temp8OutBufVal & maskVal) != (temp8InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount++; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 16) + { + temp16InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8); + temp16OutBufVal = dataparam->outBuffer[tempCount] + + (dataparam->outBuffer[tempCount + 1] << 8); + + /* temp16OutBufVal & temp16InBufVal is to be aligned with + * charLength. + * temp16InBufVal alignment is required only in case of DMA Mode + */ + if ((temp16OutBufVal & maskVal) != (temp16InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 2; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 32) + { + temp32InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + temp32OutBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + + /* temp32OutBufVal & temp32InBufVal is to be aligned with + * charLength + * temp32InBufVal alignment is required only in case of DMA Mode + */ + if ((temp32OutBufVal & maskVal) != (temp32InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 4; + } + else + { + System_printf("Invalid Word Length\r\n"); + } + } + } + if (dataMismatchError == 0) + { + System_printf("Loop back test passed\r\n"); + System_printf( + "\r\nRunning McSpi read in a loop to probe and verify the signals\r\n"); + } + else + { + System_printf("Loop back test Failed\r\n"); + System_printf( + "Error matching data in Buffer no: %d at location %d\r\n", i, + tempCount); + while (1) ; + } + /* Forever loop to continously recevie and transmit data */ + for (loopcount = 0;; loopcount++) + { + status = GIO_issue(mcspiHandle, &issueDataparam[0], BUFLEN, NULL); + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + if (IOM_COMPLETED != status) + { + System_printf("\r\nError In reclaim in continuous loop\r\n"); + } + if (loopcount % 100 == 0) + { + System_printf(".\r\n"); + } + } +} + +void user_mcspi_init(void) +{ + + Mcspi_init(); + + mcspiPrms.opMode = MCSPI_OPMODE_POLLED; + + mcspiPrms.instNum = 0; + mcspiPrms.hwiNumber = 7; + mcspiPrms.enableCache = (UInt32) TRUE; + mcspiPrms.edma3EventQueue = 0; + mcspiPrms.enableErrIntr = (UInt32) FALSE; + + mcspiPrms.spiHWCfgData.masterOrSlave = MCSPI_COMMMODE_MASTER; + mcspiPrms.spiHWCfgData.singleOrMultiChEnable = MCSPI_SINGLE_CHANNEL; + mcspiPrms.spiHWCfgData.pinOpModes = MCSPI_PINOPMODE_4PIN; + mcspiPrms.spiHWCfgData.fifoRxTrigLvl = 32; + mcspiPrms.spiHWCfgData.fifoTxTrigLvl = 32; + mcspiPrms.spiHWCfgData.configChfmt[0].charLength = MCSPI_LEN_8BIT; + mcspiPrms.spiHWCfgData.configChfmt[0].multiWordAccessEnable = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].clockMode = MCSPI_MODE0; + mcspiPrms.spiHWCfgData.configChfmt[0].clockRatioExtension = 0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiWordInitDelay = MCSPI_NO_DELAY; + mcspiPrms.spiHWCfgData.configChfmt[0].trasmitReceiveMode = MCSPI_BOTH_RXTX; + mcspiPrms.spiHWCfgData.configChfmt[0].granularityEnable = (UInt32) TRUE; + mcspiPrms.spiHWCfgData.configChfmt[0].busFreq = 1000000; + mcspiPrms.spiHWCfgData.configChfmt[0].spienHighPolarity = (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].slaveModeChipSelect = MCSPI_SPIEN_0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir = MCSPI_IN; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir = MCSPI_OUT; + + if (MCSPI_OPMODE_POLLED == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in polled mode\r\n"); + } + else if (MCSPI_OPMODE_INTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in interrupt mode\r\n"); + } + else if (MCSPI_OPMODE_DMAINTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in dma mode\r\n"); + } + else + { + System_printf("\r\nError: unknown mode of operation!!!!!!!!!!\r\n"); + } +} +/*spi intialization*/ +void SPI_init(void) +{ +System_printf("Running McSPI Loopback test.\r\n"); +GIO_addDevice("/mcspi0", (xdc_Ptr) & Mcspi_IOMFXNS, &user_mcspi_init, + 0U, (xdc_Ptr) & mcspiPrms); +} + +Hi Parth, You should use GIO_create to first create MCSPI handle. Then issue empty buffers using GIO_issue. Then only buffers can be reclaimed. Can you please modify the start_spi_sample_new and try. Regards, Rishabh + +Hi Rishabh, According to your suggestion, i check in the code and below is my observation, GIO_Create() function is already called by the creat steam function. then, We are calling GIO_issue, We also checked the return value of MCSPI Handler and it is not null. During debugging, i observe that in prime function, GIO_issue is getting fail with below error. "Failed to issue empty buffer to stream" I am attaching my debug logs and sample application for your reference. Please provide your inputs for resolving this. Thanks, Parth Modi 3146.mcspiSample_io.c /* + * Copyright (C) 2012-2017 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + * \file mcspiSample_io.c + * + * \brief McSPI evm to evm communication sample application + * + * This file demonstrates the use of Mcspi by using an + * EVM to EVM communication setup.This file configures one of the evm + * in master mode. + */ + +/* ========================================================================== */ +/* INCLUDE FILES */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcspiSample_io.h" + +/* ========================================================================== */ +/* LOCAL FUNCTION PROTOTYPES */ +/* ========================================================================== */ +EDMA3_DRV_Handle edma3init(UInt32 edma3Id, EDMA3_DRV_Result *); +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq); +void SPI_init(void); +/* ========================================================================== */ +/* MACRO DEFINITONS */ +/* ========================================================================== */ + +/* ========================================================================== */ +/* GLOBAL VARIABLES */ +/* ========================================================================== */ + +EDMA3_DRV_Handle gEdmaHandle; +UInt32 gIsI2cInitReq; +extern const IOM_Fxns Mcspi_IOMFXNS; +HeapMem_Handle myHeap; + +/* + * Buffers placed in external memory are aligned on a 128 bytes boundary. + * In addition, the buffer should be of a size multiple of 128 bytes for + * the cache to work optimally. + */ + +#define BUFLEN (1024 * 4) /* Buffer size */ +#define BUFALIGN 128 /* Alignment of buffer for use of L2 cache */ +#define ITERATION_CNT 100 /* Number of Iterations */ +#define NUM_BUFS 3 /* Num Bufs to be issued and reclaimed */ + +/* handle to the input and output streams */ +GIO_Handle mcspiHandle = NULL; + +/* Global SPI init config data structure */ +Mcspi_Params mcspiPrms; + +Mcspi_DataParam issueDataparam[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(rxbuf, BUFALIGN); +Ptr rxbuf[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(txbuf, BUFALIGN); +Ptr txbuf[NUM_BUFS]; + +Bool failFlag = FALSE; + +/* Function prototype */ +//#if 0 +static void createStream(void); +static void prime(void); +//#endif +/* ========================================================================== */ +/* FUNCTION DEFINITIONS */ +/* ========================================================================== */ + +/* + * ======== createStream ======== + */ +//#if 0 +static void createStream(void) +{ + GIO_Params ioParams; + Mcspi_ChanParams chanParams; + Error_Block eb; + + Error_init(&eb); + + /* + * Initialize channel attributes. + */ + GIO_Params_init(&ioParams); + + /* update the edma Handle */ + chanParams.hEdma = gEdmaHandle; + chanParams.chipSelTimeControl = MCSPI_CLK_CYCLE0; + chanParams.fifoEnable = (UInt32) TRUE; + chanParams.spiChipSelectHold = (UInt32) TRUE; + chanParams.chanNum = 0; + + /* If cross bar events are being used then make isCrossBarIntEn = TRUE and + * choose appropriate interrupt number to be mapped (assign it to + * intNumToBeMapped) + */ + /* Cross bar evt disabled */ + chanParams.crossBarEvtParam.isCrossBarIntEn = (UInt32) FALSE; + chanParams.crossBarEvtParam.intNumToBeMapped = 0xFF; /* Invalid number */ + + ioParams.chanParams = (Ptr) & chanParams; + ioParams.model = GIO_Model_ISSUERECLAIM; + ioParams.numPackets = NUM_BUFS + 1; + + mcspiHandle = GIO_create("/mcspi0", GIO_INOUT, &ioParams, &eb); + if (mcspiHandle == NULL) + { + System_printf("\r\nCreate input stream FAILED.\r\n"); + BIOS_exit(0); + } + System_printf("\r\nCreate input stream completed.\r\n"); +} +//#endif +/* + * \brief Function to submit request the driver.Depending on the macro + * "NUM_BUFS" either the driver can be buffered with multiple requests + * or only one buffer by using the NUM_BUFS as 1. + * + * \param None + * + * \return None + */ +//#if 0 +static void prime(void) +{ + + Error_Block eb; + Int32 count = 0; + IHeap_Handle iheap; + UInt32 tempCount = 0; + UInt32 size = 0; + Int status = IOM_COMPLETED; + + iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap); + Error_init(&eb); + + /* Allocate buffers for the GIO buffer exchanges */ + for (count = 0; count < (NUM_BUFS); count++) + { + rxbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == rxbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + + txbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == txbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + } + + /* Fill the buffers with known data and transmit the same and check if the* + * same pattern is received on the other EVM */ + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = tempCount; + } + } + for (count = 0; count < NUM_BUFS; count++) + { + issueDataparam[count].bufLen = BUFLEN; + issueDataparam[count].inBuffer = rxbuf[count]; + issueDataparam[count].outBuffer = txbuf[count]; + + size = issueDataparam[count].bufLen; + + /* Issue the first & second empty buffers to the input stream */ + status = GIO_issue(mcspiHandle, &issueDataparam[count], size, NULL); + + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + } + System_printf("\r\nprime completed\r\n"); +} +//#endif +void spiSampleTask(void) +{ + Int32 retVal = FVID2_SOK; + Bsp_PlatformInitParams platInitPrms; + + /* isPinMuxSettingReq parameter will be initialised to TRUE */ + BspPlatformInitParams_init(&platInitPrms); +// + platInitPrms.isAllMcSPIInitReq = TRUE; + platInitPrms.isPinMuxSettingReq = TRUE; + + /* Initialize pinmux and evm related configurations */ + Bsp_platformInit(&platInitPrms); + /* System init */ +// gIsI2cInitReq = TRUE; +// retVal = App_mcspiDefaultInit(gIsI2cInitReq); + if (retVal != FVID2_SOK) + { + System_printf("Error: : System Init Failed!!!\r\n"); + } + /* Set the pin Mux */ + Bsp_boardSetPinMux(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0, + BSP_BOARD_MODE_DEFAULT); +// Bsp_boardSetPinMux(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_1, +// BSP_BOARD_MODE_DEFAULT); + + /* Set the board muxes */ + Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0); +// Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_1); + /* call the function for the SPI application test */ + +// start_spi_sample(); +// +// App_mcspiDefaultDeInit(gIsI2cInitReq); +// +// /* Start the Heart Beat Print */ +// tskHeartBeat(); +// +// return; +} + +/* + * \brief This function demostrates the use of Mcspi using an EVM to EVM + * communication setup. + * + * \param None + * + * \return None + */ +void start_spi_sample_new(Void) +{ + System_printf("\r\nIn start SPI sample new\r\n"); + volatile Int32 i32Count = 0; + Mcspi_DataParam *dataparam = {0}; + UInt32 tempCount = 0; + UInt32 i, loopcount = 0; + UInt32 dataMismatchError = 0; + UInt8 temp8InBufVal = 0, temp8OutBufVal = 0; + UInt16 temp16InBufVal = 0, temp16OutBufVal = 0; + UInt32 temp32InBufVal = 0, temp32OutBufVal = 0; + UInt32 maskVal = 0; + + Int status = IOM_COMPLETED; +// Sleep(1000); + spiSampleTask(); +// createStream(); + SPI_init(); + + EDMA3_DRV_Result edmaResult = 0; + + gEdmaHandle = edma3init(0, &edmaResult); + + if (edmaResult != EDMA3_DRV_SOK) + { + /* Report EDMA Error */ + System_printf("\r\nEDMA driver initialization FAIL\r\n"); + } + else + { + System_printf("\r\nEDMA driver initialization PASS.\r\n"); + } + + /* Call createStream function to create I/O streams */ + createStream(); + + /* Call prime function to do priming */ + prime(); + + for (i = 0; i < NUM_BUFS; i++) + { + dataparam = NULL; + /* Reclaim full buffer from the stream */ + System_printf("before the reclaim \r\n"); + status = GIO_issue(mcspiHandle, &issueDataparam[0], BUFLEN, NULL); + System_printf("status =%u\r\n",status); + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + System_printf("In for loop\r\n"); + if (IOM_COMPLETED != status) + { + System_printf("Iteration %d\r\n", i32Count); + + System_printf( + "Error reclaiming empty buffer from the streams %x" + " error = 0x%d\r\n", + ((Uint8) (dataparam->outBuffer[i32Count])), + status); + break; + } + + maskVal = + ((1 << (mcspiPrms.spiHWCfgData.configChfmt[0].charLength)) - 1); + + for (tempCount = 0; tempCount < BUFLEN; ) + { + if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 8) + { + temp8InBufVal = dataparam->inBuffer[tempCount]; + temp8OutBufVal = dataparam->outBuffer[tempCount]; + + /* temp8OutBufVal & temp8InBufVal is to be aligned with + * charLength. + * temp8InBufVal alignment is required only in case of DMA Mode + */ + if ((temp8OutBufVal & maskVal) != (temp8InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount++; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 16) + { + temp16InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8); + temp16OutBufVal = dataparam->outBuffer[tempCount] + + (dataparam->outBuffer[tempCount + 1] << 8); + + /* temp16OutBufVal & temp16InBufVal is to be aligned with + * charLength. + * temp16InBufVal alignment is required only in case of DMA Mode + */ + if ((temp16OutBufVal & maskVal) != (temp16InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 2; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 32) + { + temp32InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + temp32OutBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + + /* temp32OutBufVal & temp32InBufVal is to be aligned with + * charLength + * temp32InBufVal alignment is required only in case of DMA Mode + */ + if ((temp32OutBufVal & maskVal) != (temp32InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 4; + } + else + { + System_printf("Invalid Word Length\r\n"); + } + } + } + if (dataMismatchError == 0) + { + System_printf("Loop back test passed\r\n"); + System_printf( + "\r\nRunning McSpi read in a loop to probe and verify the signals\r\n"); + } + else + { + System_printf("Loop back test Failed\r\n"); + System_printf( + "Error matching data in Buffer no: %d at location %d\r\n", i, + tempCount); + while (1) ; + } + /* Forever loop to continously recevie and transmit data */ + for (loopcount = 0;; loopcount++) + { + status = GIO_issue(mcspiHandle, &issueDataparam[0], BUFLEN, NULL); + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + if (IOM_COMPLETED != status) + { + System_printf("\r\nError In reclaim in continuous loop\r\n"); + } + if (loopcount % 100 == 0) + { + System_printf(".\r\n"); + } + } +} + +void user_mcspi_init(void) +{ + // Int32 opMode; + Mcspi_init(); + +// mcspiPrms = Mcspi_PARAMS; +// System_printf("Please Connect the McSPI%d MISO (DAT0) to MOSI (DAT1)\r\n", +// (inst_num + 1U)); +// System_printf( +// "And then enter the Operating mode\r\n0 - Polled Mode\ +// \r\n1 - Interrupt Mode\ +// \r\n2 - DMA Interrupt mode\r\n$>"); +//// scanf("%d", &opMode); +// if (opMode == 0) +// { + mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } +// else if (opMode == 1) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_INTERRUPT; +// } +// else if (opMode == 2) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_DMAINTERRUPT; +// } +// else +// { +// mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } + + mcspiPrms.instNum = 0; + mcspiPrms.hwiNumber = 7; + mcspiPrms.enableCache = (UInt32) TRUE; + mcspiPrms.edma3EventQueue = 0; + mcspiPrms.enableErrIntr = (UInt32) FALSE; + + mcspiPrms.spiHWCfgData.masterOrSlave = MCSPI_COMMMODE_MASTER; + mcspiPrms.spiHWCfgData.singleOrMultiChEnable = MCSPI_SINGLE_CHANNEL; + mcspiPrms.spiHWCfgData.pinOpModes = MCSPI_PINOPMODE_4PIN; + mcspiPrms.spiHWCfgData.fifoRxTrigLvl = 32; + mcspiPrms.spiHWCfgData.fifoTxTrigLvl = 32; + mcspiPrms.spiHWCfgData.configChfmt[0].charLength = MCSPI_LEN_8BIT; + mcspiPrms.spiHWCfgData.configChfmt[0].multiWordAccessEnable = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].clockMode = MCSPI_MODE0; + mcspiPrms.spiHWCfgData.configChfmt[0].clockRatioExtension = 0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiWordInitDelay = MCSPI_NO_DELAY; + mcspiPrms.spiHWCfgData.configChfmt[0].trasmitReceiveMode = MCSPI_BOTH_RXTX; + mcspiPrms.spiHWCfgData.configChfmt[0].granularityEnable = (UInt32) TRUE; + mcspiPrms.spiHWCfgData.configChfmt[0].busFreq = 1000000; + mcspiPrms.spiHWCfgData.configChfmt[0].spienHighPolarity = (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].slaveModeChipSelect = MCSPI_SPIEN_0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir = MCSPI_IN; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir = MCSPI_OUT; + + if (MCSPI_OPMODE_POLLED == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in polled mode\r\n"); + } + else if (MCSPI_OPMODE_INTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in interrupt mode\r\n"); + } + else if (MCSPI_OPMODE_DMAINTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in dma mode\r\n"); + } + else + { + System_printf("\r\nError: unknown mode of operation!!!!!!!!!!\r\n"); + } +} +void SPI_init(void) +{ +System_printf("Running McSPI Loopback test.\r\n"); +// System_printf( +// "Enter McSPI instance on which test to be run\ +// \r\n0 - McSPI1 instance\r\n1 - McSPI2 instance\r\n$>"); +// scanf("%d", &inst_num); +// if (inst_num != 0 && inst_num != 1) +// { +// inst_num = 0; +// } + GIO_addDevice("/mcspi0", (xdc_Ptr) & Mcspi_IOMFXNS, &user_mcspi_init, + 0U, (xdc_Ptr) & mcspiPrms); +} +#if 0 +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq) +{ + Int32 retVal = BSP_SOK; + UInt32 instCnt; + Bsp_CommonInitParams commonInitPrms; + Bsp_BoardInitParams boardInitPrms; + Bsp_PlatformInitParams platInitPrms; + Bsp_DeviceInitParams deviceInitPrms; + lld_hsi2c_initParam_t i2cInitParams[BSP_DEVICE_I2C_INST_ID_MAX]; + const Bsp_BoardI2cData *i2cData; + Bsp_BoardI2cInstData *i2cInstData; + BspCommonInitParams_init(&commonInitPrms); + retVal += Bsp_commonInit(&commonInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Common Init failed!!\r\n"); + } + + BspBoardInitParams_init(&boardInitPrms); + /* Override board detection if I2C is disabled */ + if (((Bool) TRUE) != ((Bool) isI2cInitReq)) + { + boardInitPrms.boardId = BSP_BOARD_UNKNOWN; + boardInitPrms.baseBoardRev = BSP_BOARD_REV_UNKNOWN; + boardInitPrms.dcBoardRev = BSP_BOARD_REV_UNKNOWN; + } + retVal += Bsp_boardInit(&boardInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Board Init failed!!\r\n"); + } + + BspPlatformInitParams_init(&platInitPrms); + retVal += Bsp_platformInit(&platInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Platform Init failed!!\r\n"); + } + + retVal += Fvid2_init(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: FVID2 Init failed!!\r\n"); + } + + /* Override I2C init for non-EVM builds */ + if (BSP_PLATFORM_ID_EVM != Bsp_platformGetId()) + { + isI2cInitReq = FALSE; + } + + if (((Bool) TRUE) == ((Bool) isI2cInitReq)) + { + i2cData = Bsp_boardGetI2cData(); + GT_assert(BspAppTrace, (NULL != i2cData)); + GT_assert(BspAppTrace, + (i2cData->numInst <= BSP_DEVICE_I2C_INST_ID_MAX)); + GT_assert(BspAppTrace, (NULL != i2cData->instData)); + + for (instCnt = 0U; instCnt < i2cData->numInst; instCnt++) + { + i2cInstData = &i2cData->instData[instCnt]; + GT_assert(BspAppTrace, + (i2cInstData->instId < BSP_DEVICE_I2C_INST_ID_MAX)); + i2cInitParams[instCnt].opMode = HSI2C_OPMODE_INTERRUPT; + i2cInitParams[instCnt].isMasterMode = TRUE; + i2cInitParams[instCnt].is10BitAddr = FALSE; + i2cInitParams[instCnt].i2cBusFreq = + (lld_i2c_busspeed) i2cInstData->busClkKHz; + i2cInitParams[instCnt].i2cIntNum = i2cInstData->intNum; + i2cInitParams[instCnt].i2cOwnAddr = 0xCC; + gI2cDevInitParams[instCnt].initParams = &i2cInitParams[instCnt]; + gI2cDevInitParams[instCnt].hsi2c_sem = + BspOsal_semCreate((Int32) 1, (Bool) TRUE); + gI2cDevInitParams[instCnt].instId = i2cInstData->instId; + } + + if (i2cData->numInst > 0) + { + retVal = I2c_GlobalInit(i2cData->numInst, &gI2cDevInitParams[0U]); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: I2C Init failed!!\r\n"); + } + } + + BspDeviceInitParams_init(&deviceInitPrms); + deviceInitPrms.isI2cProbingReq = FALSE; + retVal += Bsp_deviceInit(&deviceInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Device Init failed!!\r\n"); + } + } + + retVal += BspUtils_memInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); + } + + retVal += BspUtils_prfInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); + } + + retVal += BspUtils_appInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App Utils Init failed!!\r\n"); + } + + /* Print BSP version string and platform info*/ + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + GT_2trace(BspAppTrace, GT_INFO, + " Build time : [%s %s]\r\n", __TIME__, __DATE__); + GT_1trace(BspAppTrace, GT_INFO, + " BSP Version : [%s]\r\n", Bsp_getVersionString()); + Bsp_platformPrintInfo(); + Bsp_boardPrintInfo(); + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + + return (retVal); +} +#endif + +Hi Parth, I have asked MCSPI expert to help you further. Regards, Rishabh + +Hi Rishabh, Thanks for the quick response. I am seriously struggling with this issues. I very appreciate if you can help us ASAP. Let us know if you need any information from our side. Thanks, Parth Modi + +Hi Parth, You should not do the edma3_init when calling from the vision sdk code, use the sdk utility function to get the edma handle and use it. Can you check the return value of the GIO_Issue function and let me know for further analysis? Regards, Prasad + +Hi Prasad, We have used utility fuction as per your suggession,but Utils_dmaInit() is failing with error "UTILS: DMA: Utils_dmaInit() for instance 0 ... FAILED (-128)". We find out the reson for the failure and it is happening due to we have commented out below two function. /*retVal += BspUtils_memInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); } retVal += BspUtils_prfInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); }*/ If we tried to uncommented this fuction then during code compilation we are getting below error program will not fit into available memory. run placement with alignment fails for section "GROUP_1" size 0xf816696 . Available memory ranges: IPU1_0_DATA_MEM size: 0xb00000 unused: 0x70ceaa max hole: 0x70cea8 So, please suggest us the possible solution to resolve this compilation error. We have attached the source code and debug log and comiplation error snapshot for your referance. Thanks, Parth Modi 4885.mcspiSample_io.c /* + * Copyright (C) 2012-2017 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + * \file mcspiSample_io.c + * + * \brief McSPI evm to evm communication sample application + * + * This file demonstrates the use of Mcspi by using an + * EVM to EVM communication setup.This file configures one of the evm + * in master mode. + */ + +/* ========================================================================== */ +/* INCLUDE FILES */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcspiSample_io.h" + +/* ========================================================================== */ +/* LOCAL FUNCTION PROTOTYPES */ +/* ========================================================================== */ +EDMA3_DRV_Handle edma3init(UInt32 edma3Id, EDMA3_DRV_Result *); +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq); +void SPI_init(void); +/* ========================================================================== */ +/* MACRO DEFINITONS */ +/* ========================================================================== */ + +/* ========================================================================== */ +/* GLOBAL VARIABLES */ +/* ========================================================================== */ + +EDMA3_DRV_Handle gEdmaHandle; +UInt32 gIsI2cInitReq; +extern const IOM_Fxns Mcspi_IOMFXNS; +HeapMem_Handle myHeap; +//static I2c_DevInitParams gI2cDevInitParams[BSP_DEVICE_I2C_INST_ID_MAX]; + +/* + * Buffers placed in external memory are aligned on a 128 bytes boundary. + * In addition, the buffer should be of a size multiple of 128 bytes for + * the cache to work optimally. + */ + +#define BUFLEN (1024 * 4) /* Buffer size */ +#define BUFALIGN 128 /* Alignment of buffer for use of L2 cache */ +#define ITERATION_CNT 100 /* Number of Iterations */ +#define NUM_BUFS 3 /* Num Bufs to be issued and reclaimed */ + +/* handle to the input and output streams */ +GIO_Handle mcspiHandle = NULL; + +/* Global SPI init config data structure */ +Mcspi_Params mcspiPrms; + +Mcspi_DataParam issueDataparam[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(rxbuf, BUFALIGN); +Ptr rxbuf[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(txbuf, BUFALIGN); +Ptr txbuf[NUM_BUFS]; + +Bool failFlag = FALSE; + +/* Function prototype */ +//#if 0 +static void createStream(void); +static void prime(void); +//#endif +/* ========================================================================== */ +/* FUNCTION DEFINITIONS */ +/* ========================================================================== */ + +/* + * ======== createStream ======== + */ +//#if 0 +static void createStream(void) +{ + GIO_Params ioParams; + Mcspi_ChanParams chanParams; + Error_Block eb; + + Error_init(&eb); + + /* + * Initialize channel attributes. + */ + GIO_Params_init(&ioParams); + + /* update the edma Handle */ + chanParams.hEdma = gEdmaHandle; + chanParams.chipSelTimeControl = MCSPI_CLK_CYCLE0; + chanParams.fifoEnable = (UInt32) TRUE; + chanParams.spiChipSelectHold = (UInt32) TRUE; + chanParams.chanNum = 0; + + /* If cross bar events are being used then make isCrossBarIntEn = TRUE and + * choose appropriate interrupt number to be mapped (assign it to + * intNumToBeMapped) + */ + /* Cross bar evt disabled */ + chanParams.crossBarEvtParam.isCrossBarIntEn = (UInt32) FALSE; + chanParams.crossBarEvtParam.intNumToBeMapped = 0xFF; /* Invalid number */ + + ioParams.chanParams = (Ptr) & chanParams; + ioParams.model = GIO_Model_ISSUERECLAIM; + ioParams.numPackets = NUM_BUFS + 1; + + mcspiHandle = GIO_create("/mcspi0", GIO_INOUT, &ioParams, &eb); + if (mcspiHandle == NULL) + { + System_printf("\r\nCreate input stream FAILED.\r\n"); + BIOS_exit(0); + } + System_printf("\r\nCreate input stream completed.\r\n"); +} +//#endif +/* + * \brief Function to submit request the driver.Depending on the macro + * "NUM_BUFS" either the driver can be buffered with multiple requests + * or only one buffer by using the NUM_BUFS as 1. + * + * \param None + * + * \return None + */ +//#if 0 +static void prime(void) +{ + + Error_Block eb; + Int32 count = 0; + IHeap_Handle iheap; + UInt32 tempCount = 0; + UInt32 size = 0; + Int status = IOM_COMPLETED; + + iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap); + Error_init(&eb); + + /* Allocate buffers for the GIO buffer exchanges */ + for (count = 0; count < (NUM_BUFS); count++) + { + rxbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == rxbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + + txbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == txbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + } + + /* Fill the buffers with known data and transmit the same and check if the* + * same pattern is received on the other EVM */ + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = tempCount; + } + } + for (count = 0; count < NUM_BUFS; count++) + { + issueDataparam[count].bufLen = BUFLEN; + issueDataparam[count].inBuffer = rxbuf[count]; + issueDataparam[count].outBuffer = txbuf[count]; + + size = issueDataparam[count].bufLen; + + /* Issue the first & second empty buffers to the input stream */ + status = GIO_issue(mcspiHandle, &issueDataparam[count], size, NULL); + + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nsatus =%d\r\n",status); + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + } + System_printf("\r\nprime completed\r\n"); +} +//#endif +void spiSampleTask(void) +{ + Int32 retVal = FVID2_SOK; + Bsp_PlatformInitParams platInitPrms; + + /* isPinMuxSettingReq parameter will be initialised to TRUE */ + BspPlatformInitParams_init(&platInitPrms); +// + platInitPrms.isAllMcSPIInitReq = TRUE; + platInitPrms.isPinMuxSettingReq = TRUE; + + /* Initialize pinmux and evm related configurations */ + Bsp_platformInit(&platInitPrms); + /* System init */ + gIsI2cInitReq = FALSE; + retVal = App_mcspiDefaultInit(gIsI2cInitReq); + if (retVal != FVID2_SOK) + { + System_printf("Error: : System Init Failed!!!\r\n"); + } + /* Set the pin Mux */ + Bsp_boardSetPinMux(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0, + BSP_BOARD_MODE_DEFAULT); +// Bsp_boardSetPinMux(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_1, +// BSP_BOARD_MODE_DEFAULT); + + /* Set the board muxes */ + Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_0); +// Bsp_boardSelectDevice(BSP_DRV_ID_MCSPI, BSP_DEVICE_MCSPI_INST_ID_1); + /* call the function for the SPI application test */ + +// start_spi_sample(); +// +// App_mcspiDefaultDeInit(gIsI2cInitReq); +// +// /* Start the Heart Beat Print */ +// tskHeartBeat(); +// +// return; +} + +/* + * \brief This function demostrates the use of Mcspi using an EVM to EVM + * communication setup. + * + * \param None + * + * \return None + */ +void start_spi_sample_new(Void) +{ + System_printf("\r\nIn start SPI sample new\r\n"); + volatile Int32 i32Count = 0; + + Mcspi_DataParam *dataparam = {0}; + UInt32 tempCount = 0; + UInt32 i, loopcount = 0; + UInt32 dataMismatchError = 0; + UInt8 temp8InBufVal = 0, temp8OutBufVal = 0; + UInt16 temp16InBufVal = 0, temp16OutBufVal = 0; + UInt32 temp32InBufVal = 0, temp32OutBufVal = 0; + UInt32 maskVal = 0; + + Int status = IOM_COMPLETED; +// Sleep(1000); + spiSampleTask(); +// createStream(); + SPI_init(); + +// EDMA3_DRV_Result edmaResult = 0; + Utils_dmaInit(); + gEdmaHandle = Utils_dmaGetEdma3Hndl(0); +// gEdmaHandle = edma3init(0, &edmaResult); + + if (gEdmaHandle != NULL) + { + /* Report EDMA Error */ + System_printf("\r\nEDMA driver initialization FAIL\r\n"); + } + else + { + System_printf("\r\nEDMA driver initialization PASS.\r\n"); + } + + /* Call createStream function to create I/O streams */ + createStream(); + + /* Call prime function to do priming */ + prime(); +//#if 0 + for (i = 0; i < NUM_BUFS; i++) + { + dataparam = NULL; + /* Reclaim full buffer from the stream */ + System_printf("before the reclaim \r\n"); + status = GIO_issue(mcspiHandle, &issueDataparam[0], BUFLEN, NULL); + System_printf("status of GIO_issue =%d\r\n",status); + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + System_printf("In for loop\r\n"); + if (IOM_COMPLETED != status) + { + System_printf("Iteration %d\r\n", i32Count); + + System_printf( + "Error reclaiming empty buffer from the streams %x" + " error = 0x%d\r\n", + ((Uint8) (dataparam->outBuffer[i32Count])), + status); + break; + } + + maskVal = + ((1 << (mcspiPrms.spiHWCfgData.configChfmt[0].charLength)) - 1); + + for (tempCount = 0; tempCount < BUFLEN; ) + { + if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 8) + { + temp8InBufVal = dataparam->inBuffer[tempCount]; + temp8OutBufVal = dataparam->outBuffer[tempCount]; + + /* temp8OutBufVal & temp8InBufVal is to be aligned with + * charLength. + * temp8InBufVal alignment is required only in case of DMA Mode + */ + if ((temp8OutBufVal & maskVal) != (temp8InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount++; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 16) + { + temp16InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8); + temp16OutBufVal = dataparam->outBuffer[tempCount] + + (dataparam->outBuffer[tempCount + 1] << 8); + + /* temp16OutBufVal & temp16InBufVal is to be aligned with + * charLength. + * temp16InBufVal alignment is required only in case of DMA Mode + */ + if ((temp16OutBufVal & maskVal) != (temp16InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 2; + } + else if (mcspiPrms.spiHWCfgData.configChfmt[0].charLength <= 32) + { + temp32InBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + temp32OutBufVal = dataparam->inBuffer[tempCount] + + (dataparam->inBuffer[tempCount + 1] << 8) + + (dataparam->inBuffer[tempCount + 2] << 16) + + (dataparam->inBuffer[tempCount + 3] << 24); + + /* temp32OutBufVal & temp32InBufVal is to be aligned with + * charLength + * temp32InBufVal alignment is required only in case of DMA Mode + */ + if ((temp32OutBufVal & maskVal) != (temp32InBufVal & maskVal)) + { + dataMismatchError = 1; + break; + } + tempCount = tempCount + 4; + } + else + { + System_printf("Invalid Word Length\r\n"); + } + } + } + if (dataMismatchError == 0) + { + System_printf("Loop back test passed\r\n"); + System_printf( + "\r\nRunning McSpi read in a loop to probe and verify the signals\r\n"); + } + else + { + System_printf("Loop back test Failed\r\n"); + System_printf( + "Error matching data in Buffer no: %d at location %d\r\n", i, + tempCount); + while (1) ; + } + /* Forever loop to continously recevie and transmit data */ + for (loopcount = 0;; loopcount++) + { + status = GIO_issue(mcspiHandle, &issueDataparam[0], BUFLEN, NULL); + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + status = GIO_reclaim(mcspiHandle, (Ptr *) &dataparam, NULL, NULL); + if (IOM_COMPLETED != status) + { + System_printf("\r\nError In reclaim in continuous loop\r\n"); + } + if (loopcount % 100 == 0) + { + System_printf(".\r\n"); + } + } +//#endif +} + +void user_mcspi_init(void) +{ + // Int32 opMode; + Mcspi_init(); + +// mcspiPrms = Mcspi_PARAMS; +// System_printf("Please Connect the McSPI%d MISO (DAT0) to MOSI (DAT1)\r\n", +// (inst_num + 1U)); +// System_printf( +// "And then enter the Operating mode\r\n0 - Polled Mode\ +// \r\n1 - Interrupt Mode\ +// \r\n2 - DMA Interrupt mode\r\n$>"); +//// scanf("%d", &opMode); +// if (opMode == 0) +// { + mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } +// else if (opMode == 1) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_INTERRUPT; +// } +// else if (opMode == 2) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_DMAINTERRUPT; +// } +// else +// { +// mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } + + mcspiPrms.instNum = 0; + mcspiPrms.hwiNumber = 7; + mcspiPrms.enableCache = (UInt32) TRUE; + mcspiPrms.edma3EventQueue = 0; + mcspiPrms.enableErrIntr = (UInt32) FALSE; + + mcspiPrms.spiHWCfgData.masterOrSlave = MCSPI_COMMMODE_MASTER; + mcspiPrms.spiHWCfgData.singleOrMultiChEnable = MCSPI_SINGLE_CHANNEL; + mcspiPrms.spiHWCfgData.pinOpModes = MCSPI_PINOPMODE_4PIN; + mcspiPrms.spiHWCfgData.fifoRxTrigLvl = 32; + mcspiPrms.spiHWCfgData.fifoTxTrigLvl = 32; + mcspiPrms.spiHWCfgData.configChfmt[0].charLength = MCSPI_LEN_8BIT; + mcspiPrms.spiHWCfgData.configChfmt[0].multiWordAccessEnable = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = + (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].clockMode = MCSPI_MODE0; + mcspiPrms.spiHWCfgData.configChfmt[0].clockRatioExtension = 0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiWordInitDelay = MCSPI_NO_DELAY; + mcspiPrms.spiHWCfgData.configChfmt[0].trasmitReceiveMode = MCSPI_BOTH_RXTX; + mcspiPrms.spiHWCfgData.configChfmt[0].granularityEnable = (UInt32) TRUE; + mcspiPrms.spiHWCfgData.configChfmt[0].busFreq = 1000000; + mcspiPrms.spiHWCfgData.configChfmt[0].spienHighPolarity = (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].slaveModeChipSelect = MCSPI_SPIEN_0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir = MCSPI_IN; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir = MCSPI_OUT; + + if (MCSPI_OPMODE_POLLED == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in polled mode\r\n"); + } + else if (MCSPI_OPMODE_INTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in interrupt mode\r\n"); + } + else if (MCSPI_OPMODE_DMAINTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in dma mode\r\n"); + } + else + { + System_printf("\r\nError: unknown mode of operation!!!!!!!!!!\r\n"); + } +} +void SPI_init(void) +{ +System_printf("Running McSPI Loopback test.\r\n"); +// System_printf( +// "Enter McSPI instance on which test to be run\ +// \r\n0 - McSPI1 instance\r\n1 - McSPI2 instance\r\n$>"); +// scanf("%d", &inst_num); +// if (inst_num != 0 && inst_num != 1) +// { +// inst_num = 0; +// } + GIO_addDevice("/mcspi0", (xdc_Ptr) & Mcspi_IOMFXNS, &user_mcspi_init, + 0U, (xdc_Ptr) & mcspiPrms); +} + +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq) +{ + Int32 retVal = BSP_SOK; + //UInt32 instCnt; + Bsp_CommonInitParams commonInitPrms; + Bsp_BoardInitParams boardInitPrms; + Bsp_PlatformInitParams platInitPrms; + //Bsp_DeviceInitParams deviceInitPrms; + //lld_hsi2c_initParam_t i2cInitParams[BSP_DEVICE_I2C_INST_ID_MAX]; + //const Bsp_BoardI2cData *i2cData; + //Bsp_BoardI2cInstData *i2cInstData; + BspCommonInitParams_init(&commonInitPrms); + retVal += Bsp_commonInit(&commonInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Common Init failed!!\r\n"); + } + + BspBoardInitParams_init(&boardInitPrms); + /* Override board detection if I2C is disabled */ + if (((Bool) TRUE) != ((Bool) isI2cInitReq)) + { + boardInitPrms.boardId = BSP_BOARD_UNKNOWN; + boardInitPrms.baseBoardRev = BSP_BOARD_REV_UNKNOWN; + boardInitPrms.dcBoardRev = BSP_BOARD_REV_UNKNOWN; + } + retVal += Bsp_boardInit(&boardInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Board Init failed!!\r\n"); + } + + BspPlatformInitParams_init(&platInitPrms); + retVal += Bsp_platformInit(&platInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Platform Init failed!!\r\n"); + } + + retVal += Fvid2_init(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: FVID2 Init failed!!\r\n"); + } + + /* Override I2C init for non-EVM builds */ + if (BSP_PLATFORM_ID_EVM != Bsp_platformGetId()) + { + isI2cInitReq = FALSE; + } + + /* if (((Bool) TRUE) == ((Bool) isI2cInitReq)) + { + i2cData = Bsp_boardGetI2cData(); + GT_assert(BspAppTrace, (NULL != i2cData)); + GT_assert(BspAppTrace, + (i2cData->numInst <= BSP_DEVICE_I2C_INST_ID_MAX)); + GT_assert(BspAppTrace, (NULL != i2cData->instData)); + + for (instCnt = 0U; instCnt < i2cData->numInst; instCnt++) + { + i2cInstData = &i2cData->instData[instCnt]; + GT_assert(BspAppTrace, + (i2cInstData->instId < BSP_DEVICE_I2C_INST_ID_MAX)); + i2cInitParams[instCnt].opMode = HSI2C_OPMODE_INTERRUPT; + i2cInitParams[instCnt].isMasterMode = TRUE; + i2cInitParams[instCnt].is10BitAddr = FALSE; + i2cInitParams[instCnt].i2cBusFreq = + (lld_i2c_busspeed) i2cInstData->busClkKHz; + i2cInitParams[instCnt].i2cIntNum = i2cInstData->intNum; + i2cInitParams[instCnt].i2cOwnAddr = 0xCC; + gI2cDevInitParams[instCnt].initParams = &i2cInitParams[instCnt]; + gI2cDevInitParams[instCnt].hsi2c_sem = + BspOsal_semCreate((Int32) 1, (Bool) TRUE); + gI2cDevInitParams[instCnt].instId = i2cInstData->instId; + } + + if (i2cData->numInst > 0) + { + retVal = I2c_GlobalInit(i2cData->numInst, &gI2cDevInitParams[0U]); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: I2C Init failed!!\r\n"); + } + } + + BspDeviceInitParams_init(&deviceInitPrms); + deviceInitPrms.isI2cProbingReq = FALSE; + retVal += Bsp_deviceInit(&deviceInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Device Init failed!!\r\n"); + } + }*/ + + /*retVal += BspUtils_memInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); + } + + retVal += BspUtils_prfInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); + }*/ + + retVal += BspUtils_appInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App Utils Init failed!!\r\n"); + } + + /* Print BSP version string and platform info*/ + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + GT_2trace(BspAppTrace, GT_INFO, + " Build time : [%s %s]\r\n", __TIME__, __DATE__); + GT_1trace(BspAppTrace, GT_INFO, + " BSP Version : [%s]\r\n", Bsp_getVersionString()); + Bsp_platformPrintInfo(); + Bsp_boardPrintInfo(); + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + + return (retVal); +} + +Hi Parth, Utils_dmaInit will be called during system init once, after this you can use the API Utils_dmaGetEdma3Hndl to get the edma handle. Use this handle and pass it to the McSPI driver. Also the GIO_Issue function will call internally mcspiMdSubmitChan() function of driver code present at, ti_components\drivers\pdk_01_07_00_16\packages\ti\drv\bsp_lld\mcspi\src\bsp_mcspi.c. Can you check where you are getting the error from driver? Regards, Prasad + +Hi Prasad, Thanks for the quick response. We find out the reason for the failure and it is happening due to we have commented out on two function. /*retVal += BspUtils_memInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); } retVal += BspUtils_prfInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); }*/ If we tried to uncommented this function then during code compilation we are getting below error the program will not fit into available memory. run placement with alignment fails for section "GROUP_1" size 0xf816696 . Available memory ranges: IPU1_0_DATA_MEM size: 0xb00000 unused: 0x70ceaa max hole: 0x70cea8 So, please suggest us the possible solution to resolve this compilation error. We have attached the source code and debug log and compilation error snapshot for your reference. Thanks, Parth Modi + +Hi, Is there any update on the previous post? We are waiting for your response. Thanks, Parth + +Hi Parth, You should modify the memory definition xs file to resolve the compilation error. The files is present in directory: vision_sdk\apps\build\\mem_segment_definition_bios.xs. Regards, Rishabh + +Hi Rishabh, If we comment out Below code then it will affect our functionality ? Currently, we have commented Below code and when we issue GIO_reclaim then it is hang our application. Where we are going wrong ? Please suggest. Commented code: /*retVal += BspUtils_memInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); } retVal += BspUtils_prfInit(); if (BSP_SOK != retVal) { GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); }*/ Regards, Parth Modi + +Hi Rishabh, Can you please update on above post? We have little urgency.We have to resolve this issues before EOD. Thanks, Parth Modi + +Hi Parth, I think commenting these APIs should affect the functionality. I have asked MCSPI expert to look at it. We have to wait till he responds. Regards, Rishabh + +Hi, We are sending the data from Slave to Master on MISO line. And, we have found an issue on Master side on MSB. The issue is like, the MSB is always missed out because the clock starts after the MSB. Attached the DSO's screenshot for the reference. In the screenshot, the Yellow channel is for CLK and the blue channel is for MISO. For resolving this issue, which SPI configuration we have to implement/use? Thanks, + +Hi, Is there any update on the previous post? We are waiting for your reply. Thanks, Parth + +Hi Parth, The BspUtils_ functions need not be called from vsdk framework. Utils_mcspi.c file has functions to add device, you need to call the Utils_mcspiInit function with the mcspi instance number. Then call the GIO_Create API with the same device name used in Utils_mcspi.c file. From your earlier posts, you were facing issues with GIO_submit right, Did you check in the driver code where you are getting error? Are you now able to receive the data but it is corrupted? Also in case of McSPI master will send the clock and slave has to respond to the clock recieved, how the slave is able to send the data before master initiates the clock? Regards, Prasad + +Hi Prasad, Thanks for the reply, As of now, Our TDA2x Soc is working on the Slave mode.On slave side, we receive the data perfectly from the master (MOSI).But when we send the data from Slave to Master the First bit is missing on master side(MISO line).We used the SPI mode 3(CPOL = 1and CPHA = 1) for communication. if we send the data 129((binary)1000 0001) from the salve then we receive the master side 3 (0000 0011). I have attached CRO screenshot for your information.Inside screenshot yellow line is for SCLK and the blue channel is for the MISO line. My query is, 1) How to resolve this data going wrong on the master side? Please suggest us some solution to resolve this issue. Please let me know if you need more information on our side. Thanks, Parth Modi + +Hi Parth, The TDA2 SOC when configured in McSPI slave mode, does not control the clock. It will only responds to the clock sent from the external master. So it cont send the bit before master initiates the clock. How have you connected the slave on the board? Are the track lengths of MOSI, MISO and clock same? Regards, Prasad + +Hi Prasad, Our track length is as per below MOSI 312.61 + 4476.41 = 4789.02 mils MISO 306.11 + 3208.36 = 3514.47 mils CS# 211.32 + 3103.34 = 3314.66 mils CLK 248.9 + 3117.13 = 3366.03 mils We connected the Master device to the level shifter. Tad2x( slave) <-> levelshifter<->MCU(Master) We are getting GIO_reclaim stuck after calling GIO_issue for one time.if we call this function for 2 times than it works well(i.e one every time we need to call issues the 2 times data and reclaim claim the 2 times data). I have attached my code for your information. What is region to behind the struck the GIO_Reclaim? We want to take the SPI data on every instance of receive interrupt from the master.Can please share me some example code to implement it. Thanks, Parth Modi 2744.mcspiSample_io.c /* + * Copyright (C) 2012-2017 Texas Instruments Incorporated + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ +/** + * \file mcspiSample_io.c + * + * \brief McSPI evm to evm communication sample application + * + * This file demonstrates the use of Mcspi by using an + * EVM to EVM communication setup.This file configures one of the evm + * in master mode. + */ + +/* ========================================================================== */ +/* INCLUDE FILES */ +/* ========================================================================== */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mcspiSample_io.h" + +/* ========================================================================== */ +/* LOCAL FUNCTION PROTOTYPES */ +/* ========================================================================== */ +EDMA3_DRV_Handle edma3init(UInt32 edma3Id, EDMA3_DRV_Result *); +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq); +static Int32 App_mcspiDefaultDeInit(UInt32 isI2cInitReq); +void SPI_init(void); +/* ========================================================================== */ +/* MACRO DEFINITONS */ +/* ========================================================================== */ + +/* ========================================================================== */ +/* GLOBAL VARIABLES */ +/* ========================================================================== */ + +EDMA3_DRV_Handle gEdmaHandle; +UInt32 gIsI2cInitReq; +extern const IOM_Fxns Mcspi_IOMFXNS; +HeapMem_Handle myHeap; +Bool garbej_on_boot = TRUE; +//static I2c_DevInitParams gI2cDevInitParams[BSP_DEVICE_I2C_INST_ID_MAX]; + +/* + * Buffers placed in external memory are aligned on a 128 bytes boundary. + * In addition, the buffer should be of a size multiple of 128 bytes for + * the cache to work optimally. + */ + +//#define BUFLEN (1024 * 4) /* Buffer size */ +#define BUFLEN (16 * 1) /* Buffer size */ +#define BUFALIGN 128 /* Alignment of buffer for use of L2 cache */ +#define ITERATION_CNT 100 /* Number of Iterations */ +//#define NUM_BUFS 3 /* Num Bufs to be issued and reclaimed */ +#define NUM_BUFS 1 /* Num Bufs to be issued and reclaimed *///value is must be two +/* handle to the input and output streams */ +GIO_Handle mcspiHandle = NULL; + +/* Global SPI init config data structure */ +Mcspi_Params mcspiPrms; + +Mcspi_DataParam issueDataparam[NUM_BUFS]; + +//Mcspi_DataParam issueDataparam1[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(rxbuf, BUFALIGN); +Ptr rxbuf[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(txbuf, BUFALIGN); +Ptr txbuf[NUM_BUFS]; + +#pragma DATA_ALIGN(rxbuf, BUFALIGN); +Ptr rxbuf1[NUM_BUFS]; + +/* Buffer alignement is required when working in DMA Mode */ +#pragma DATA_ALIGN(txbuf, BUFALIGN); +Ptr txbuf1[NUM_BUFS]; + +Bool failFlag = FALSE; + +/* Function prototype */ +//#if 0 +static void createStream(void); +static void prime(void); +static void memory_allocated(void); +//static void prime1(void); +//#endif +/* ========================================================================== */ +/* FUNCTION DEFINITIONS */ +/* ========================================================================== */ + +/* + * ======== createStream ======== + */ +//#if 0 +static void createStream(void) +{ + GIO_Params ioParams; + Mcspi_ChanParams chanParams; + Error_Block eb; + + Error_init(&eb); + + /* + * Initialize channel attributes. + */ + GIO_Params_init(&ioParams); + + /* update the edma Handle */ + chanParams.hEdma = gEdmaHandle; + chanParams.chipSelTimeControl = MCSPI_CLK_CYCLE0; + chanParams.fifoEnable = (UInt32) TRUE; + chanParams.spiChipSelectHold = (UInt32) TRUE; + chanParams.chanNum = 0; + + /* If cross bar events are being used then make isCrossBarIntEn = TRUE and + * choose appropriate interrupt number to be mapped (assign it to + * intNumToBeMapped) + */ + /* Cross bar evt disabled */ + chanParams.crossBarEvtParam.isCrossBarIntEn = (UInt32) FALSE; + chanParams.crossBarEvtParam.intNumToBeMapped = 0xFF; /* Invalid number */ + + ioParams.chanParams = (Ptr) & chanParams; + ioParams.model = GIO_Model_ISSUERECLAIM; + ioParams.numPackets = NUM_BUFS + 1; +// ioParams.sync=NULL; + mcspiHandle = GIO_create("/mcspi0", GIO_INOUT, &ioParams, &eb); + if (mcspiHandle == NULL) + { + System_printf("\r\nCreate input stream FAILED.\r\n"); + BIOS_exit(0); + } + System_printf("\r\nCreate input stream completed.\r\n"); +} +//#endif +/* + * \brief Function to submit request the driver.Depending on the macro + * "NUM_BUFS" either the driver can be buffered with multiple requests + * or only one buffer by using the NUM_BUFS as 1. + * + * \param None + * + * \return None + */ + + +static void memory_allocated(void) +{ + Error_Block eb; + Int32 count = 0; + IHeap_Handle iheap; + + iheap = HeapMem_Handle_to_xdc_runtime_IHeap(myHeap); + Error_init(&eb); + + /* Allocate buffers for the GIO buffer exchanges */ + for (count = 0; count < (NUM_BUFS); count++) + { + rxbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == rxbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + txbuf[count] = (Ptr) Memory_calloc(iheap, BUFLEN, BUFALIGN, &eb); + if (NULL == txbuf[count]) + { + System_printf("\r\nMEM_calloc failed.\r\n"); + } + } +} +//if 0 +static void prime(void) +{ + + Int32 count = 0; + UInt32 tempCount = 0; + UInt32 size = 0; + Int status = IOM_COMPLETED; + UInt8 j; + UInt8 spi_dummy_data[13]={0x00,0x20,0x09,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F}; + unsigned char data = 0x0F; + + if(garbej_on_boot == TRUE) + { + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = data; + } + + } + garbej_on_boot =FALSE; + } + else + { + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0,j=0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = spi_dummy_data[j++]; + if(j==13) + j=0; + } + } + } + for (count = 0; count < NUM_BUFS; count++) + { + issueDataparam[count].bufLen = BUFLEN; + issueDataparam[count].inBuffer = rxbuf[count]; + issueDataparam[count].outBuffer = txbuf[count]; + + size = issueDataparam[count].bufLen; + System_printf("\r\n before GIO_issue \r\n"); + /* Issue the first & second empty buffers to the input stream */ + status = GIO_issue(mcspiHandle, &issueDataparam[count], size, NULL); + + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + System_printf("\r\nsatus =%d\r\n",status); + System_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + System_printf("SPI TDA2x-> MCU write frame replay\r\n"); + for(j=0;j TDA2x write frame\r\n"); + for(j=0;j<13;j++ ) + { + System_printf("SPI Data[%d byte]=%x\r\n", j,SPIdata[j]); + + } + System_printf("SPI End frame\r\n"); + + } + else if((issueDataparam[i].inBuffer[tempCount] == 0x01) && (issueDataparam[i].inBuffer[tempCount+1] == 0x22)) + { + SPIdata[0]=issueDataparam[i].inBuffer[tempCount]; + SPIdata[1]=issueDataparam[i].inBuffer[tempCount + 1]; + SPIdata[2]=issueDataparam[i].inBuffer[tempCount + 2]; + SPIdata[3]=issueDataparam[i].inBuffer[tempCount + 3]; + SPIdata[4]=issueDataparam[i].inBuffer[tempCount + 4]; + SPIdata[5]=issueDataparam[i].inBuffer[tempCount + 5]; + SPIdata[6]=issueDataparam[i].inBuffer[tempCount + 6]; + SPIdata[7]=issueDataparam[i].inBuffer[tempCount + 7]; + SPIdata[8]=issueDataparam[i].inBuffer[tempCount + 8]; + SPIdata[9]=issueDataparam[i].inBuffer[tempCount + 9]; + SPIdata[10]=issueDataparam[i].inBuffer[tempCount + 10]; + SPIdata[11]=issueDataparam[i].inBuffer[tempCount + 11]; + SPIdata[12]=issueDataparam[i].inBuffer[tempCount + 12]; + + System_printf("SPI start read frame\r\n"); + for(j=0;j<13;j++ ) + { + System_printf("SPI Data[%d byte]=%x\r\n", j,SPIdata[j]); + + } + System_printf("SPI End frame\r\n"); + } + } + else + { + System_printf("Invalid Word Length\r\n"); + + } + System_printf("in temp count=%d\r\n",tempCount); + tempCount++; + } + System_printf("in time NUM_BUFS = %d\r\n",i); + } +// System_printf("loop time = %d\r\n",k); +} + gIsI2cInitReq = FALSE; + GIO_delete(&mcspiHandle); + App_mcspiDefaultDeInit(gIsI2cInitReq); + return; +} + +void user_mcspi_init(void) +{ + // Int32 opMode; + Mcspi_init(); + +// mcspiPrms = Mcspi_PARAMS; +// System_printf("Please Connect the McSPI%d MISO (DAT0) to MOSI (DAT1)\r\n", +// (inst_num + 1U)); +// System_printf( +// "And then enter the Operating mode\r\n0 - Polled Mode\ +// \r\n1 - Interrupt Mode\ +// \r\n2 - DMA Interrupt mode\r\n$>"); +//// scanf("%d", &opMode); +// if (opMode == 0) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } +// else if (opMode == 1) +// { + mcspiPrms.opMode = MCSPI_OPMODE_INTERRUPT; +// } +// else if (opMode == 2) +// { +// mcspiPrms.opMode = MCSPI_OPMODE_DMAINTERRUPT; +// } +// else +// { +// mcspiPrms.opMode = MCSPI_OPMODE_POLLED; +// } + + mcspiPrms.instNum = 0; + mcspiPrms.hwiNumber = 7; + mcspiPrms.enableCache = (UInt32) TRUE; + mcspiPrms.edma3EventQueue = 0; + mcspiPrms.enableErrIntr = (UInt32) FALSE; + + mcspiPrms.spiHWCfgData.masterOrSlave = MCSPI_COMMMODE_SLAVE; + mcspiPrms.spiHWCfgData.singleOrMultiChEnable = MCSPI_SINGLE_CHANNEL; + mcspiPrms.spiHWCfgData.pinOpModes = MCSPI_PINOPMODE_4PIN; +// mcspiPrms.spiHWCfgData.fifoRxTrigLvl = 32; +// mcspiPrms.spiHWCfgData.fifoTxTrigLvl = 32; + mcspiPrms.spiHWCfgData.fifoRxTrigLvl = 16; + mcspiPrms.spiHWCfgData.fifoTxTrigLvl = 16; + mcspiPrms.spiHWCfgData.configChfmt[0].charLength = MCSPI_LEN_8BIT; + mcspiPrms.spiHWCfgData.configChfmt[0].multiWordAccessEnable = + (UInt32) FALSE; + + mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = + (UInt32) FALSE; + +// mcspiPrms.spiHWCfgData.configChfmt[0].spiChipSelectEnablePol = +// (UInt32) TRUE; + + + mcspiPrms.spiHWCfgData.configChfmt[0].clockMode = MCSPI_MODE3; +// mcspiPrms.spiHWCfgData.configChfmt[0].clockMode = MCSPI_MODE1; + mcspiPrms.spiHWCfgData.configChfmt[0].clockRatioExtension = 0; + mcspiPrms.spiHWCfgData.configChfmt[0].spiWordInitDelay = MCSPI_NO_DELAY; + mcspiPrms.spiHWCfgData.configChfmt[0].trasmitReceiveMode = MCSPI_BOTH_RXTX; + mcspiPrms.spiHWCfgData.configChfmt[0].granularityEnable = (UInt32) TRUE; +// mcspiPrms.spiHWCfgData.configChfmt[0].busFreq = 1000000; + mcspiPrms.spiHWCfgData.configChfmt[0].busFreq = 200000; + mcspiPrms.spiHWCfgData.configChfmt[0].spienHighPolarity = (UInt32) FALSE; + mcspiPrms.spiHWCfgData.configChfmt[0].slaveModeChipSelect = MCSPI_SPIEN_0; +// mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir = MCSPI_IN; +// mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir = MCSPI_OUT; + + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat0Dir = MCSPI_OUT; + mcspiPrms.spiHWCfgData.configChfmt[0].spiDat1Dir = MCSPI_IN; + + if (MCSPI_OPMODE_POLLED == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in polled mode\r\n"); + } + else if (MCSPI_OPMODE_INTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in interrupt mode\r\n"); + } + else if (MCSPI_OPMODE_DMAINTERRUPT == mcspiPrms.opMode) + { + System_printf("\r\nMcspi is configured in dma mode\r\n"); + } + else + { + System_printf("\r\nError: unknown mode of operation!!!!!!!!!!\r\n"); + } + +} +void SPI_init(void) +{ +System_printf("Running McSPI Loopback test.\r\n"); +// System_printf( +// "Enter McSPI instance on which test to be run\ +// \r\n0 - McSPI1 instance\r\n1 - McSPI2 instance\r\n$>"); +// scanf("%d", &inst_num); +// if (inst_num != 0 && inst_num != 1) +// { +// inst_num = 0; +// } + GIO_addDevice("/mcspi0", (xdc_Ptr) & Mcspi_IOMFXNS, &user_mcspi_init, + 0, (xdc_Ptr) & mcspiPrms); +// McSPIStartBitEnable(SOC_MCSPI1_BASE, MCSPI_CHANNEL_0); +// McSPIStartBitPolarityConfig(SOC_MCSPI1_BASE, +// MCSPI_START_BIT_POL_LOW, +// MCSPI_CHANNEL_0); +} + +Int32 App_mcspiDefaultInit(UInt32 isI2cInitReq) +{ + Int32 retVal = BSP_SOK; + //UInt32 instCnt; + Bsp_CommonInitParams commonInitPrms; + Bsp_BoardInitParams boardInitPrms; + Bsp_PlatformInitParams platInitPrms; + //Bsp_DeviceInitParams deviceInitPrms; + //lld_hsi2c_initParam_t i2cInitParams[BSP_DEVICE_I2C_INST_ID_MAX]; + //const Bsp_BoardI2cData *i2cData; + //Bsp_BoardI2cInstData *i2cInstData; + BspCommonInitParams_init(&commonInitPrms); + retVal += Bsp_commonInit(&commonInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Common Init failed!!\r\n"); + } + + BspBoardInitParams_init(&boardInitPrms); + /* Override board detection if I2C is disabled */ + if (((Bool) TRUE) != ((Bool) isI2cInitReq)) + { + boardInitPrms.boardId = BSP_BOARD_UNKNOWN; + boardInitPrms.baseBoardRev = BSP_BOARD_REV_UNKNOWN; + boardInitPrms.dcBoardRev = BSP_BOARD_REV_UNKNOWN; + } + retVal += Bsp_boardInit(&boardInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Board Init failed!!\r\n"); + } + + BspPlatformInitParams_init(&platInitPrms); + retVal += Bsp_platformInit(&platInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Platform Init failed!!\r\n"); + } + + retVal += Fvid2_init(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: FVID2 Init failed!!\r\n"); + } + + /* Override I2C init for non-EVM builds */ + if (BSP_PLATFORM_ID_EVM != Bsp_platformGetId()) + { + isI2cInitReq = FALSE; + } + + /* if (((Bool) TRUE) == ((Bool) isI2cInitReq)) + { + i2cData = Bsp_boardGetI2cData(); + GT_assert(BspAppTrace, (NULL != i2cData)); + GT_assert(BspAppTrace, + (i2cData->numInst <= BSP_DEVICE_I2C_INST_ID_MAX)); + GT_assert(BspAppTrace, (NULL != i2cData->instData)); + + for (instCnt = 0U; instCnt < i2cData->numInst; instCnt++) + { + i2cInstData = &i2cData->instData[instCnt]; + GT_assert(BspAppTrace, + (i2cInstData->instId < BSP_DEVICE_I2C_INST_ID_MAX)); + i2cInitParams[instCnt].opMode = HSI2C_OPMODE_INTERRUPT; + i2cInitParams[instCnt].isMasterMode = TRUE; + i2cInitParams[instCnt].is10BitAddr = FALSE; + i2cInitParams[instCnt].i2cBusFreq = + (lld_i2c_busspeed) i2cInstData->busClkKHz; + i2cInitParams[instCnt].i2cIntNum = i2cInstData->intNum; + i2cInitParams[instCnt].i2cOwnAddr = 0xCC; + gI2cDevInitParams[instCnt].initParams = &i2cInitParams[instCnt]; + gI2cDevInitParams[instCnt].hsi2c_sem = + BspOsal_semCreate((Int32) 1, (Bool) TRUE); + gI2cDevInitParams[instCnt].instId = i2cInstData->instId; + } + + if (i2cData->numInst > 0) + { + retVal = I2c_GlobalInit(i2cData->numInst, &gI2cDevInitParams[0U]); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: I2C Init failed!!\r\n"); + } + } + + BspDeviceInitParams_init(&deviceInitPrms); + deviceInitPrms.isI2cProbingReq = FALSE; + retVal += Bsp_deviceInit(&deviceInitPrms); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: Device Init failed!!\r\n"); + } + }*/ + +// retVal += BspUtils_memInit(); +// if (BSP_SOK != retVal) +// { +// GT_0trace(BspAppTrace, GT_ERR, "Error: App MEM Utils Init failed!!\r\n"); +// } +// +// retVal += BspUtils_prfInit(); +// if (BSP_SOK != retVal) +// { +// GT_0trace(BspAppTrace, GT_ERR, "Error: App PRF Utils Init failed!!\r\n"); +// } + + retVal += BspUtils_appInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App Utils Init failed!!\r\n"); + } + + /* Print BSP version string and platform info*/ + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + GT_2trace(BspAppTrace, GT_INFO, + " Build time : [%s %s]\r\n", __TIME__, __DATE__); + GT_1trace(BspAppTrace, GT_INFO, + " BSP Version : [%s]\r\n", Bsp_getVersionString()); + Bsp_platformPrintInfo(); + Bsp_boardPrintInfo(); + GT_0trace(BspAppTrace, GT_INFO, " \r\n"); + + return (retVal); +} +/** + * App_mcspiDefaultDeInit + * \brief Application utils function to call all the default de-init + * functions. + */ +static Int32 App_mcspiDefaultDeInit(UInt32 isI2cDeInitReq) +{ + Int32 retVal = BSP_SOK; +// const Bsp_BoardI2cData *i2cData; +// UInt32 instCnt; + + retVal += BspUtils_appDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App Utils De-Init failed!!\r\n"); + } + + retVal += BspUtils_prfDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: App PRF Utils De-Init failed!!\r\n"); + } + + retVal += BspUtils_memDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: App MEM Utils De-Init failed!!\r\n"); + } + + /* Override I2C de-init for non-EVM builds */ + if (BSP_PLATFORM_ID_EVM != Bsp_platformGetId()) + { + isI2cDeInitReq = FALSE; + } + + if (((Bool) TRUE) == ((Bool) isI2cDeInitReq)) + { +// i2cData = Bsp_boardGetI2cData(); +// GT_assert(BspAppTrace, (NULL != i2cData)); +// GT_assert(BspAppTrace, +// (i2cData->numInst <= BSP_DEVICE_I2C_INST_ID_MAX)); +// +// retVal += Bsp_deviceDeInit(NULL); +// if (BSP_SOK != retVal) +// { +// GT_0trace(BspAppTrace, GT_ERR, "Error: Device De-Init failed!!\r\n"); +// } +// if (i2cData->numInst > 0) +// { +// for (instCnt = 0U; instCnt < i2cData->numInst; instCnt++) +// { +// BspOsal_semDelete(&(gI2cDevInitParams[instCnt].hsi2c_sem)); +// } +// retVal += I2c_GlobalDeInit(NULL); +// if (BSP_SOK != retVal) +// { +// GT_0trace(BspAppTrace, GT_ERR, "Error: I2C De-Init failed!!\r\n"); +// } +// } + } + + retVal += Fvid2_deInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: FVID2 De-Init failed!!\r\n"); + } + + retVal += Bsp_platformDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: BSP Platform De-Init failed!!\r\n"); + } + + retVal += Bsp_boardDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Board De-Init failed!!\r\n"); + } + + retVal += Bsp_commonDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Common De-Init failed!!\r\n"); + } + + return (retVal); +} + +Parth, Only for the first time you need 2 GIO_issue, This is to prime the data to be sent as default response from slave. The driver internally maintains the queue for the response to be sent in case of slave mode. After this you can do GIO_reclaim followed by a GIO_issue. In the attached code I see that the issue is called only during priming. You can refer the example itself, which does multiple GIO_issue and reclaims. Regards, Prasad + +Hi, We are still facing issues in doing SPI communication So I would like to clear few points here based on your previous suggestions. For SPI communication , we should first make a call of GIO_issue twice followed by 2 GIO_reclaim call and these are calls to make SPI initialization only, please verify. Actual data transmission will start after above steps, till now no valid data read/write. Now in for loop we can call GIO_issue and GIO_reclaim for each data read/write , I mean one issue/reclaim in each loop, right ? Please clear our understanding here. Thanks. + +Hi, The first 2 GIO_Issue are required for priming to the driver with the data to be sent as response. After the first 2 GIO_Issue the transfer can start. Transfer will be initiated by the external SPI master. After this you can do the reclaim and issue in a loop. The GIO_reclaim is a blocking call and does not return till the first transfer is complete. At the end outside the loop you can do the final recalim to get all the buffers from driver. Regards, Prasad + +Hi Prasad, We are trying to implement SPI communication since long time and struggling to understand the issue, please read below description for our requirement and the issue details. We are using TDA2XX board and Vision SDK 3.1 and we are running in the slave mode. Our motive is to read 13 byte data (including checksum) from Master. Please refer attached file for our implementation, we are using GIO_ISSUE and GIO_RECLAIM API for the receiving the data. To simulate data send from Master, we are using "HI-WAVE" tool. Below is the scenario which happens while changing the data from HI-WAVE tool. 1. After SPI init, first we are changing data from HI-WAVE tool to simulate master to slave communication, and with this simulation slave should receive 13 byte from master but no data is received on slave side. 2. Now again changing data from HI-WAVE to different value, we are receiving two frames of 13 byte in which first frame is incorrect while second frame has valid data. 3. Changing data third time from HI-WAVE, we are receiving 13 byte on slave side which is garbage value. This above three points keeps repeating in subsequent changes. Please review our implementation and let us know how we can receive correct data from master to slave in single transmission only whenever master sends any data. You can refer function "getSpiData" in the attached file for the actual communication code and here are some constants which we have used in that file. / Macros for SPI Implementation / / Buffer size / #define BUFLEN (16 * 1) / Alignment of buffer for use of L2 cache / #define BUFALIGN 128 / Number of Iterations / #define ITERATION_CNT 100 / Num Bufs to be issued and reclaimed / #define NUM_BUFS 2 We are struggling with the SPI since long time, please reply with the priority as we have some urgency. Regards, chains_lvdsVipMultiCamMirrorReplacement.c /******************************************************************************** +* @file : chains_lvdsVipMultiCamMirrorReplacement.c +* +* @brief : This is the top-level use-case file. +* This file creates and initializes all the links and starts +* the usecase chain. +* The read and write from/to QSPI also happens here. +* +* @author : VVDN Technologies Pvt. Ltd. +* +* @Copyright : (c) 2012-2017 , VVDN Technologies Pvt. Ltd. +* Permission is hereby granted to everyone in VVDN Technologies +* to use the Software without restriction, including without +* limitation the rights to use, copy, modify, merge, publish, +* distribute, distribute with modifications. +******************************************************************************** +*/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_lvdsVipMultiCamMirrorReplacement_priv.h" +#include +#include +#include +#include +#include "src/rtos/mirror_replacement_files/chains_vipLvdsMultiCamMirrorReplacement_globals.h" + +/******************************************************************************* + * GLOBALS + ******************************************************************************* + */ + +/* Heap Handle */ +HeapMem_Handle myHeap; + +/*EDMA Handle */ +EDMA3_DRV_Handle gEdmaHandle; + +/* To initialize/de-initialize I2C */ +UInt32 gIsI2cInitReq; + +/* Buffer to receive date from MCU via SPI */ +Ptr rxbuf[NUM_BUFS]; + +/*Buffer to transmit data to MCU via SPI */ +Ptr txbuf[NUM_BUFS]; + +/* Flag to transmit grabage upon booting i.e upon + * receving data first time from MCU via SPI. + */ +Bool garbageOnBoot = TRUE; + +/* Structure for the spi specific buffer address to be passed to the + * Stream. + */ +Mcspi_DataParam issueDataparam[NUM_BUFS]; + +/* Handle to the input and output streams */ +GIO_Handle mcspiHandle = NULL; + +/* Global SPI init config data structure */ +Mcspi_Params mcspiPrms; + +/* Data received from MCU via SPI. + * This will be passed on to algorithms. + * It allows the user to change between views on the centre LCD. + */ +UInt32 ucSpiData; + +/* Data received from MCU via SPI. + * It allows the user to configure the Y-coordinate from where the + * top camera cropping must start. + */ +UInt16 ucSpiCropDataTopY=0; + +/* Data received from MCU via SPI. + * It allows the user to configure the Y-coordinate from where the + * left camera cropping must start. + */ +UInt16 ucSpiCropDataLeftY=0; + +/* Data received from MCU via SPI. + * It allows the user to configure the X-coordinate from where the + * left camera cropping must start. + */ +UInt16 ucSpiCropDataLeftX=0; + +/* Data received from MCU via SPI. + * It allows the user to configure the Y-coordinate from where the + * right camera cropping must start. + */ +UInt16 ucSpiCropDataRightY=0; + +/* Data received from MCU via SPI. + * It allows the user to configure the X-coordinate from where the + * right camera cropping must start. + */ +UInt16 ucSpiCropDataRightX=0; + +/******************************************************************************* + * MACROS + ******************************************************************************* + */ + +/* To turn on a LED indicating start of the use-case */ +#define WR_MEM_32(addr, data) *(unsigned int*)(addr) = (unsigned int)(data) + +/* The mode in which each look-up table file must be opened. */ +#define FILE_MODE "r" + +/* The look-up table has 4 values in each element. */ +#define VALUES_IN_EACH_ELEMENT 4 + +/* Width of the video frame to be captured from camera */ +#define CAPTURE_SENSOR_WIDTH (1280) + +/*Height of the video frame to captured from camera */ +#define CAPTURE_SENSOR_HEIGHT (720) + +/* \brief Channels with timestamp difference <= SYNC_DELTA_IN_MSEC + * are synced together by sync link + */ +#define SYNC_DELTA_IN_MSEC (16) + +/* \brief Channels with timestamp older than SYNC_DROP_THRESHOLD_IN_MSEC + * are dropped by sync link + */ +#define SYNC_DROP_THRESHOLD_IN_MSEC (33) + +/* Turn debug statements on/off + * MIRROR_REPLACEMENT_DEBUGS_OFF : to turn off the debugs for mirror replacement use-case + * MIRROR_REPLACEMENT_DEBUGS_ON : to turn on the debugs for mirror replacement use-case + */ +#define MIRROR_REPLACEMENT_DEBUGS_OFF + +/* Height of 10" centre LCD */ +#define CENTRE_LCD_HEIGHT 320 + +/* Shift a byte left/right */ +#define BYTE_SHIFT 8 +/** + ******************************************************************************* + * + * \brief Use-case object + * + * This structure contains all the LinksId's and create Params. + * The same is passed to all create, start, stop functions. + * + ******************************************************************************* +*/ +typedef struct { + + chains_lvdsVipMultiCamMirrorReplacementObj ucObj; + + UInt32 captureOutWidth; + UInt32 captureOutHeight; + UInt32 displayWidth; + UInt32 displayHeight; + + UInt32 displayActiveChId; + /**< CH ID which is shown on display */ + + UInt32 numLvdsCh; + /**< Number of channels of LVDS to enable */ + + Chains_Ctrl *chainsCfg; + +} chains_lvdsVipMultiCamMirrorReplacementAppObj; + +/** + ***************************************************************************************** + * + * \brief Store values from character buffer to integer buffer. + * + * This function converts 'char' values to 'int'. + * It is called in SetAlgLutPrm function. + * + * \param lutBufferString [IN] Buffer which holds the LUT in the form of string + * \param LUT [OUT] Buffer to store the LUT in the form of integer + * + ***************************************************************************************** +*/ + +Void chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray(UInt8 *lutBufferString,UInt32 *LUT) +{ + + char *str = NULL; + UInt32 index = 0; + + /* 'strtok' is a pre-defined C library function. + * It breaks the string (given as its first argument) into several smaller + * strings i.e. tokens, using the delimiter given as the second argument. + */ + str = strtok(((char *)lutBufferString)," "); + + while(str != NULL) + { + /* Converting the token into integer using 'atoi' C library + * function. + */ + LUT[index] = atoi(str); + index++; + + /* Signalling 'strtok' to keep searching the same string. + * This operations fetches the other LUT elements. + */ + str = strtok(NULL, " "); + } + index--; + Vps_printf("\nLUT[0]=%d , LUT[1]=%d , LUT [2]=%d , LUT[3]=%d",LUT[0],LUT[1],LUT[2],LUT[3]); + Vps_printf("\nLUT[%d]=%d , LUT[%d]=%d , LUT [%d]=%d , LUT[%d]=%d\n", + index-3,LUT[index-3],index-2,LUT[index-2],index-1,LUT[index-1],index,LUT[index-0]); + Vps_printf("Number of elements in the LUT table : %d \n",index); +} + +/** + ******************************************************************************* + * + * \brief Set Sync Create Parameters + * + * This function is used to set the sync params. + * It is called in Create function. It is advisable to have + * chains_lvdsVipMultiCamMirrorReplacement_ResetLinkPrm prior to set params + * so all the default params get set. + * Number of channels to be synced and sync delta and threshold. + * + * \param pPrm [OUT] SyncLink_CreateParams + * + ******************************************************************************* +*/ +static Void chains_lvdsVipMultiCamMirrorReplacement_SetSyncPrm( + SyncLink_CreateParams *pPrm, + UInt32 numLvdsCh + ) +{ + pPrm->syncDelta = SYNC_DELTA_IN_MSEC; + pPrm->syncThreshold = SYNC_DROP_THRESHOLD_IN_MSEC; +} + +/** + ******************************************************************************* + * + * \brief Set LUT algorithm Create Parameters + * + * It is called in Create function. + * In this function SwMs alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +static Void chains_lvdsVipMultiCamMirrorReplacement_SetAlgLutPrm( + AlgorithmLink_LutCreateParams *pPrm, + UInt32 numLvdsCh, + UInt32 displayWidth, + UInt32 displayHeight + ) +{ + + + /* Initializing link specific paramters */ + pPrm->maxOutBufWidth = displayWidth; + pPrm->maxOutBufHeight = displayHeight; + pPrm->numOutBuf = 4; + pPrm->useLocalEdma = FALSE; + + pPrm->initLayoutParams.numWin = numLvdsCh; + pPrm->initLayoutParams.outBufWidth = pPrm->maxOutBufWidth; + pPrm->initLayoutParams.outBufHeight = pPrm->maxOutBufHeight; + +} + +/** + ******************************************************************************* + * + * \brief Set Framecopy Create Parameters + * + * It is called in Create function. + * In this function framecopy alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetStitchAlgPrms( + AlgorithmLink_StitchCreateParams *pPrm, + Chains_Ctrl *chainsCfg) +{ + /* Setting algorithm ID for the link */ + if( chainsCfg->algProcId == SYSTEM_PROC_DSP1 + || + chainsCfg->algProcId == SYSTEM_PROC_DSP2) + { + pPrm->baseClassCreate.algId = ALGORITHM_LINK_DSP_ALG_FRAMECOPY; + } + else if( chainsCfg->algProcId == SYSTEM_PROC_EVE1 + || + chainsCfg->algProcId == SYSTEM_PROC_EVE2 + || + chainsCfg->algProcId == SYSTEM_PROC_EVE3 + || + chainsCfg->algProcId == SYSTEM_PROC_EVE4) + { + pPrm->baseClassCreate.algId = ALGORITHM_LINK_EVE_ALG_FRAMECOPY; + } + else if(chainsCfg->algProcId == SYSTEM_PROC_A15_0) + { + pPrm->baseClassCreate.algId = ALGORITHM_LINK_A15_ALG_FRAMECOPY; + } + + pPrm->maxWidth = CAPTURE_SENSOR_WIDTH; + pPrm->maxHeight = CENTRE_LCD_HEIGHT; + + pPrm->numOutputFrames = 3; +} + +/** + ******************************************************************************* + * + * \brief Set CrModule Create Parameters + * + * It is called in Create function. + * In this function Centre Right Seamline alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetCrModuleAlgPrms( + AlgorithmLink_CrModuleCreateParams *pPrm) +{ + + /* Setting algorithm ID for the link */ + pPrm->baseClassCreate.algId = ALGORITHM_LINK_DSP_ALG_CRMODULE; + + pPrm->maxWidth = CAPTURE_SENSOR_WIDTH; + pPrm->maxHeight = CAPTURE_SENSOR_HEIGHT; + + pPrm->numOutputFrames = 3; +} + +/** + ******************************************************************************* + * + * \brief Set LcModule Create Parameters + * + * It is called in Create function. + * In this function Left Centre Seamline alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetLcModuleAlgPrms( + AlgorithmLink_LcModuleCreateParams *pPrm) +{ + + /* Setting algorithm ID for the link */ + pPrm->baseClassCreate.algId = ALGORITHM_LINK_DSP_ALG_LCMODULE; + + pPrm->maxWidth = CAPTURE_SENSOR_WIDTH; + pPrm->maxHeight = CAPTURE_SENSOR_HEIGHT; + + pPrm->numOutputFrames = 3; +} + +/** + ******************************************************************************* + * + * \brief Set Left LCD View Change Create Parameters + * + * It is called in Create function. + * In this function Left LCD View Change alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetLeftLcdViewChangeAlgPrms( + AlgorithmLink_LeftLcdViewChangeCreateParams *pPrm) +{ + + /* Setting algorithm ID for the link */ + pPrm->baseClassCreate.algId = ALGORITHM_LINK_A15_ALG_LEFTLCDVIEWCHANGE; + + pPrm->maxWidth = 800; + pPrm->maxHeight = 480; + + pPrm->numOutputFrames = 3; +} + +/** + ******************************************************************************* + * + * \brief Set Right LCD View Change Create Parameters + * + * It is called in Create function. + * In this function Right LCD View Change alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetRightLcdViewChangeAlgPrms( + AlgorithmLink_RightLcdViewChangeCreateParams *pPrm) +{ + + /* Setting algorithm ID for the link */ + pPrm->baseClassCreate.algId = ALGORITHM_LINK_A15_ALG_RIGHTLCDVIEWCHANGE; + + pPrm->maxWidth = 800; + pPrm->maxHeight = 480; + + pPrm->numOutputFrames = 3; +} + + +/** + ******************************************************************************* + * + * \brief Set Select Link Create Parameters + * + * This function is used to set the Select link params. + * It is called in Create function. It is advisable to have + * chains_lvdsVipDualCam_DualDisplay_ResetLinkPrms prior to set params + * so all the default params get set. + * + * \param pPrm [IN] SelectLink_CreateParams + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetSelectlinkPrms(SelectLink_CreateParams *pPrm) +{ + pPrm->numOutQue = 2; + + pPrm->outQueChInfo[0].outQueId = 0; + pPrm->outQueChInfo[0].numOutCh = 1; + pPrm->outQueChInfo[0].inChNum[0] = 0; + + pPrm->outQueChInfo[1].outQueId = 1; + pPrm->outQueChInfo[1].numOutCh = 1; + pPrm->outQueChInfo[1].inChNum[0] = 1; +} + +/** + ******************************************************************************* + * + * \brief Set Display Create Parameters for all LCD's + * + * This function is used to set the Display params. + * It is called in Create function. It is advisable to have + * chains_lvdsVipDualCam_DualDisplay_ResetLinkPrms prior to set params + * so all the default params get set. + * + * \param pPrm [IN] DisplayLink_CreateParams + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetDisplayPrms( + DisplayLink_CreateParams *pPrm_VideoLCD1, + DisplayLink_CreateParams *pPrm_VideoLCD2, + DisplayLink_CreateParams *pPrm_VideoLCD3, + UInt32 displayWidthLCD, + UInt32 displayHeightLCD + + ) +{ + + if(pPrm_VideoLCD1) + { + pPrm_VideoLCD1->rtParams.tarWidth = 800; + pPrm_VideoLCD1->rtParams.tarHeight = 480; + pPrm_VideoLCD1->displayId = DISPLAY_LINK_INST_DSS_VID1; + } + + if(pPrm_VideoLCD2) + { + pPrm_VideoLCD2->rtParams.tarWidth = 800; + pPrm_VideoLCD2->rtParams.tarHeight = 480; + pPrm_VideoLCD2->displayId = DISPLAY_LINK_INST_DSS_VID2; + } + + if(pPrm_VideoLCD3) + { + pPrm_VideoLCD3->rtParams.tarWidth = 1280; + pPrm_VideoLCD3->rtParams.tarHeight = 320; + pPrm_VideoLCD3->displayId = DISPLAY_LINK_INST_DSS_VID3; + } +} + +/** + ******************************************************************************* + * + * \brief Set link Parameters + * + * It is called in Create function of the auto generated use-case file. + * + * \param pUcObj [IN] Auto-generated usecase object + * \param appObj [IN] Application specific object + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement_SetAppPrms(chains_lvdsVipMultiCamMirrorReplacementObj *pUcObj, Void *appObj) +{ + + + + + chains_lvdsVipMultiCamMirrorReplacementAppObj *pObj + = (chains_lvdsVipMultiCamMirrorReplacementAppObj*)appObj; + + UInt32 portId[VIDEO_SENSOR_MAX_LVDS_CAMERAS]; + + /* Initializing the seamline values to zero*/ + pUcObj->centreRightSeamline=0; + pUcObj->leftCentreSeamline=0; + + /* Assigning the address of 'centreRightSeamline' variable to centre right module algorithm object */ + pUcObj->Alg_CrModulePrm.centreRightSeamline = &(pUcObj->centreRightSeamline); + /* Assigning the address of 'leftCentreSeamline' variable to left centre module algorithm object */ + pUcObj->Alg_LcModulePrm.leftCentreSeamline = &(pUcObj->leftCentreSeamline); + + /* Assigning the address of 'centreRightSeamline' variable to stitch algorithm object */ + pUcObj->Alg_StitchPrm.centreRightSeamline = &(pUcObj->centreRightSeamline); + /* Assigning the address of 'leftCentreSeamline' variable to stitch algorithm object */ + pUcObj->Alg_StitchPrm.leftCentreSeamline = &(pUcObj->leftCentreSeamline); + + /* Passing on the view selection byte to algorithms */ + pUcObj->Alg_LutPrm.lutSpiData = &(ucSpiData); + pUcObj->Alg_LcModulePrm.lcSpiData = &(ucSpiData); + pUcObj->Alg_CrModulePrm.crSpiData = &(ucSpiData); + pUcObj->Alg_StitchPrm.stitchSpiData = &(ucSpiData); + + /* Passing on the Y0 cropping byte to algorithm (for TOP camera) */ + pUcObj->Alg_StitchPrm.configureCropY0 = &(ucSpiCropDataTopY); + + /* Passing on the Y0 cropping byte to algorithm (for LEFT camera) */ + pUcObj->Alg_LeftLcdViewChangePrm.leftLcdY0 = &(ucSpiCropDataLeftY); + + /* Passing on the X0 cropping byte to algorithm (for LEFT camera) */ + pUcObj->Alg_LeftLcdViewChangePrm.leftLcdX0 = &(ucSpiCropDataLeftX); + + /* Passing on the Y0 cropping byte to algorithm (for RIGHT camera) */ + pUcObj->Alg_RightLcdViewChangePrm.rightLcdY0 = &(ucSpiCropDataRightY); + + /* Passing on the X0 cropping byte to algorithm (for RIGHT camera) */ + pUcObj->Alg_RightLcdViewChangePrm.rightLcdX0 = &(ucSpiCropDataRightX); + + + + UInt32 *llut,*rlut,*clut,*cd,*length,*size; + + + /* Logic for QSPI read and write starts */ + + /* + // QSPI write starts + //UNCOMMENT THE BELOW CODE IF YOU WISH TO WRITE TO QSPI + + + Int32 fileHandle; + + // Allocate 6 buffers to read 6 lut files from SD card + char *qspiWriteLeftLutBuff = NULL; + char *qspiWriteRightLutBuff = NULL; + char *qspiWriteCentreLutBuff = NULL; + char *qspiWriteLutSizeBuff = NULL; + char *qspiWriteLutCdBuff = NULL; + char *qspiWriteLutLengthBuff = NULL; + + qspiWriteLeftLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gLlutFileSize, + 32); + UTILS_assert(qspiWriteLeftLutBuff != NULL); + + qspiWriteRightLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gRlutFileSize, + 32); + UTILS_assert(qspiWriteRightLutBuff != NULL); + + qspiWriteCentreLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gClutFileSize, + 32); + UTILS_assert(qspiWriteCentreLutBuff != NULL); + + qspiWriteLutSizeBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gSizeFileSize, + 32); + UTILS_assert(qspiWriteLutSizeBuff != NULL); + + qspiWriteLutCdBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gCdFileSize, + 32); + UTILS_assert(qspiWriteLutCdBuff != NULL); + + qspiWriteLutLengthBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gLengthFileSize, + 32); + UTILS_assert(qspiWriteLutLengthBuff != NULL); + + + + + //Open the file containing left look-up table from SD card + fileHandle = File_open(gFileNameLlut, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open the left look-up table file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: Left look-up table file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the left look-up table from SD card to local buffer. \n"); + + //Copy the left look-up table to 'qspiWriteLeftLutBuff' + + File_gets(qspiWriteLeftLutBuff,gLlutFileSize,fileHandle); + + Vps_printf(" Copied the contents of left look-up table into local buffer ! \n"); + + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteLeftLutBuff' to QSPI location pointed to by 'gLlutOffset' + System_qspiWriteSector( + gLlutOffset, + (UInt32)((UInt32 *)qspiWriteLeftLutBuff) , + gLlutFileSize); + + Vps_printf(" Left look-up table written from SD card to QSPI ! \n"); + + //Close the left look-up table file + File_close(fileHandle); + + + + //Open the file containing right look-up table from SD card + fileHandle = File_open(gFileNameRlut, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open right LUT file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: Right LUT file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the right look-up table from SD card to local buffer. \n"); + + //Copy the right look-up table to 'qspiWriteRightLutBuff' + File_gets(qspiWriteRightLutBuff,gRlutFileSize,fileHandle); + + Vps_printf(" Copied the contents of right look-up table into local buffer ! \n"); + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteRightLutBuff' to QSPI location pointed to by 'gRlutOffset' + System_qspiWriteSector( + gRlutOffset, + (UInt32)((UInt32 *)qspiWriteRightLutBuff), + gRlutFileSize); + + Vps_printf(" Right look-up table written from SD card to QSPI ! \n"); + + //Close the right look-up table file + File_close(fileHandle); + + + + + + //Open the file containing centre look-up table from SD card + fileHandle = File_open(gFileNameClut, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open centre LUT file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: Centre LUT file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the centre look-up table from SD card to local buffer. \n"); + + //Copy the centre look-up table to 'qspiWriteRightLutBuff' + File_gets(qspiWriteCentreLutBuff,gClutFileSize,fileHandle); + + Vps_printf(" Copied the contents of centre look-up table into local buffer ! \n"); + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteCentreLutBuff' to QSPI location pointed to by 'gClutOffset' + System_qspiWriteSector( + gClutOffset, + (UInt32)((UInt32 *)qspiWriteCentreLutBuff), + gClutFileSize); + + Vps_printf(" Centre look-up table written from SD card to QSPI ! \n"); + + //Close the centre look-up table file + File_close(fileHandle); + + + //Open the file containing size table from SD card + fileHandle = File_open(gFileNameSize, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open size file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: size file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the size table from SD card to local buffer. \n"); + + //Copy the size table to 'qspiWriteLutSizeBuff' + File_gets(qspiWriteLutSizeBuff,gSizeFileSize,fileHandle); + + Vps_printf(" Copied the contents of size table into local buffer ! \n"); + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteLutSizeBuff' to QSPI location pointed to by 'gSizeOffset' + System_qspiWriteSector( + gSizeOffset, + (UInt32)((UInt32 *)qspiWriteLutSizeBuff), + gSizeFileSize); + + Vps_printf(" size table written from SD card to QSPI ! \n"); + + //Close the size table file + File_close(fileHandle); + + + + //Open the file containing cd table from SD card + fileHandle = File_open(gFileNameCd, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open cd file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: cd file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the cd table from SD card to local buffer. \n"); + + //Copy the cd table to 'qspiWriteRightLutBuff' + File_gets(qspiWriteLutCdBuff,gCdFileSize,fileHandle); + + Vps_printf(" Copied the contents of cd table into local buffer ! \n"); + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteLutCdBuff' to QSPI location pointed to by 'gCdOffset' + System_qspiWriteSector( + gCdOffset, + (UInt32)((UInt32 *)qspiWriteLutCdBuff), + gCdFileSize); + + Vps_printf(" Cd table written from SD card to QSPI ! \n"); + + //Close the cd table file + File_close(fileHandle); + + + + //Open the file containing length table from SD card + fileHandle = File_open(gFileNameLength, FILE_MODE); + if(fileHandle < 0) + { + Vps_printf(" FILE OPEN ERROR: Could not open length file from SD card!!! \n"); + } + else + { + Vps_printf(" FILE OPEN SUCCESSFUL: length file opened successfully from SD Card \n"); + } + + Vps_printf(" Copying the length table from SD card to local buffer. \n"); + + //Copy the length table to 'qspiWriteLutCdBuff' + File_gets(qspiWriteLutLengthBuff,gLengthFileSize,fileHandle); + + Vps_printf(" Copied the contents of length table into local buffer ! \n"); + + //Initialize the QSPI before writing to it + System_qspiInit(); + + //Write the data from 'qspiWriteLutLengthBuff' to QSPI location pointed to by 'gLengthOffset' + System_qspiWriteSector( + gLengthOffset, + (UInt32)((UInt32 *)qspiWriteLutLengthBuff), + gLengthFileSize); + + Vps_printf(" length table written from SD card to QSPI ! \n"); + + //Close the length table file + File_close(fileHandle); + + */ + /* QSPI write ends */ + + /* QSPI read starts */ + + /* Local buffers to read left look-up table from QSPI */ + char *qspiReadLeftLutBuff = NULL; + /* Local buffers to read right look-up table from QSPI */ + char *qspiReadRightLutBuff = NULL; + /* Local buffers to read centre look-up table from QSPI */ + char *qspiReadCentreLutBuff = NULL; + + /* Local buffers to read size table from QSPI */ + char *qspiReadLutSizeBuff = NULL; + /* Local buffers to read cd table from QSPI */ + char *qspiReadLutCdBuff = NULL; + /* Local buffers to read length table from QSPI */ + char *qspiReadLutLengthBuff = NULL; + + + /* Allocating memory to the length table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the length table. + */ + length = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + 100, + 32); + + /* Allocating memory to length table local buffer */ + qspiReadLutLengthBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gLengthFileSize, + 32); + UTILS_assert(qspiReadLutLengthBuff != NULL); + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading length table file from QSPI\n"); + + /* Reading the length table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadLutLengthBuff)), + gLengthOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gLengthReadBlocks)); + + Vps_printf("\nlength table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)qspiReadLutLengthBuff, length); + + Vps_printf("**********************************************************\n"); + + + + /* Allocating memory to the left look-up table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the left look-up table. + */ + llut = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + length[0]<<4, + 32); + + /* Allocating memory to the right look-up table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the right look-up table. + */ + rlut = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + length[2]<<4, + 32); + + /* Allocating memory to the centre look-up table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the centre look-up table. + */ + clut = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + length[1]<<4, + 32); + + + + /* Allocating memory to the size table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the size table. + */ + size = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + 100, + 32); + + /* Allocating memory to the cd table buffer pointer. + * This buffer will then be used by the algorithm that does operations + * on the cd table. + */ + cd = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + 100, + 32); + + + + + + /* Allocating memory to left look-up table local buffer */ + qspiReadLeftLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gLlutFileSize, + 32); + UTILS_assert(qspiReadLeftLutBuff != NULL); + + /* Allocating memory to right look-up table local buffer */ + qspiReadRightLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gRlutFileSize, + 32); + UTILS_assert(qspiReadRightLutBuff != NULL); + + /* Allocating memory to centre look-up table local buffer */ + qspiReadCentreLutBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gClutFileSize, + 32); + UTILS_assert(qspiReadCentreLutBuff != NULL); + + + /* Allocating memory to size table local buffer */ + qspiReadLutSizeBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gSizeFileSize, + 32); + UTILS_assert(qspiReadLutSizeBuff != NULL); + + /* Allocating memory to cd table local buffer */ + qspiReadLutCdBuff = Utils_memAlloc( + UTILS_HEAPID_DDR_CACHED_SR, + gCdFileSize, + 32); + UTILS_assert(qspiReadLutCdBuff != NULL); + + + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading left look-up table file from QSPI\n"); + + /* Reading the left look-up table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadLeftLutBuff)), + gLlutOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gLlutReadBlocks)); + + Vps_printf("\nLeft look-up table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)(qspiReadLeftLutBuff), llut); + + Vps_printf("**********************************************************\n"); + + + + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading right look-up table file from QSPI\n"); + + /* Reading the right look-up table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadRightLutBuff)), + gRlutOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gRlutReadBlocks)); + + Vps_printf("\nRight look-up table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)qspiReadRightLutBuff, rlut); + + Vps_printf("**********************************************************\n"); + + + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading centre look-up table file from QSPI\n"); + + /* Reading the centre look-up table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadCentreLutBuff)), + gClutOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gClutReadBlocks)); + + Vps_printf("\nCentre look-up table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)qspiReadCentreLutBuff, clut); + + Vps_printf("**********************************************************\n"); + + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading size table file from QSPI\n"); + + /* Reading the size table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadLutSizeBuff)), + gSizeOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gSizeReadBlocks)); + + Vps_printf("\nsize table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)qspiReadLutSizeBuff, size); + + Vps_printf("**********************************************************\n"); + + + + + Vps_printf("**********************************************************\n"); + Vps_printf("\nReading cd table file from QSPI\n"); + + /* Reading the cd table from QSPI */ + System_qspiReadSector( + (UInt32)(((UInt32 *)qspiReadLutCdBuff)), + gCdOffset, + SystemUtils_align(32U , SYSTEM_QSPI_READ_WRITE_SIZE*gCdReadBlocks)); + + Vps_printf("\ncd table file read successfully\n"); + + /* Function call to store the look-up table string into an integer array */ + chains_lvdsVipMultiCamMirrorReplacement_ConvertToArray((UInt8 *)qspiReadLutCdBuff, cd); + + Vps_printf("**********************************************************\n"); + + + + + /* QSPI read ends */ + + /* Logic for QSPI read and write ends */ + + + + + + pObj->displayActiveChId = 0; + + pObj->numLvdsCh = pObj->chainsCfg->numLvdsCh; + /* Limit max LVDS channels to 4 */ + if(pObj->numLvdsCh > VIDEO_SENSOR_NUM_LVDS_CAMERAS) + pObj->numLvdsCh = VIDEO_SENSOR_NUM_LVDS_CAMERAS; + + pObj->captureOutWidth = CAPTURE_SENSOR_WIDTH; + pObj->captureOutHeight = CAPTURE_SENSOR_HEIGHT; + + ChainsCommon_GetDisplayWidthHeight( + pObj->chainsCfg->displayType, + &pObj->displayWidth, + &pObj->displayHeight + ); + + + ChainsCommon_MultiCam_StartCaptureDevice( + pObj->chainsCfg->captureSrc, + portId, + pObj->numLvdsCh + ); + + ChainsCommon_MultiCam_SetCapturePrms(&pUcObj->CapturePrm, + CAPTURE_SENSOR_WIDTH, + CAPTURE_SENSOR_HEIGHT, + portId, + pObj->numLvdsCh + ); + + + chains_lvdsVipMultiCamMirrorReplacement_SetSyncPrm( + &pUcObj->SyncPrm, + pObj->numLvdsCh + ); + + chains_lvdsVipMultiCamMirrorReplacement_SetAlgLutPrm( + &pUcObj->Alg_LutPrm, + pObj->numLvdsCh, + CAPTURE_SENSOR_WIDTH, + CAPTURE_SENSOR_HEIGHT + ); + + pUcObj->Alg_LutPrm.llut = llut; + pUcObj->Alg_LutPrm.rlut = rlut; + pUcObj->Alg_LutPrm.clut = clut; + pUcObj->Alg_LutPrm.length = length; + pUcObj->Alg_LutPrm.cd = cd; + pUcObj->Alg_LutPrm.size = size; + + chains_lvdsVipMultiCamMirrorReplacement_SetStitchAlgPrms + (&pUcObj->Alg_StitchPrm, + pObj->chainsCfg); + + pUcObj->Alg_StitchPrm.cd = cd; + pUcObj->Alg_StitchPrm.size = size; + + + + chains_lvdsVipMultiCamMirrorReplacement_SetCrModuleAlgPrms + (&pUcObj->Alg_CrModulePrm); + + pUcObj->Alg_CrModulePrm.cd = cd; + pUcObj->Alg_CrModulePrm.size = size; + + + chains_lvdsVipMultiCamMirrorReplacement_SetLcModuleAlgPrms + (&pUcObj->Alg_LcModulePrm); + + pUcObj->Alg_LcModulePrm.cd = cd; + pUcObj->Alg_LcModulePrm.size = size; + + + chains_lvdsVipMultiCamMirrorReplacement_SetSelectlinkPrms + (&pUcObj->SelectPrm); + + chains_lvdsVipMultiCamMirrorReplacement_SetLeftLcdViewChangeAlgPrms + (&pUcObj->Alg_LeftLcdViewChangePrm); + + chains_lvdsVipMultiCamMirrorReplacement_SetRightLcdViewChangeAlgPrms + (&pUcObj->Alg_RightLcdViewChangePrm); + +/* + ChainsCommon_SetGrpxSrcPrms(&pUcObj->GrpxSrcPrm, + pObj->displayWidth, + pObj->displayHeight + ); + + + ChainsCommon_SetDisplayPrms(&pUcObj->Display_videoPrm, + &pUcObj->Display_GrpxPrm, + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); + + ChainsCommon_StartDisplayCtrl( + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); +*/ + + chains_lvdsVipMultiCamMirrorReplacement_SetDisplayPrms (&pUcObj->Display_leftLcdPrm, + &pUcObj->Display_rightLcdPrm, + &pUcObj->Display_videoPrm, + pObj->displayWidth, + pObj->displayHeight + ); + + ChainsCommon_MirrorReplacement_StartDisplayCtrl(pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); + + /* LED turn on to indicate start of the use-case */ + WR_MEM_32(0x4A003664, 0x0002000E); +} + +/** + ******************************************************************************* + * + * \brief Start the capture display Links + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] chains_lvdsVipMultiCamMirrorReplacementObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +static Void chains_lvdsVipMultiCamMirrorReplacement_StartApp(chains_lvdsVipMultiCamMirrorReplacementAppObj *pObj) +{ + Chains_memPrintHeapStatus(); + + ChainsCommon_StartDisplayDevice(pObj->chainsCfg->displayType); + + chains_lvdsVipMultiCamMirrorReplacement_Start(&pObj->ucObj); + + Chains_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Delete the capture display Links + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_lvdsVipMultiCamMirrorReplacementObj + * + ******************************************************************************* +*/ +static Void chains_lvdsVipMultiCamMirrorReplacement_StopAndDeleteApp(chains_lvdsVipMultiCamMirrorReplacementAppObj *pObj) +{ + chains_lvdsVipMultiCamMirrorReplacement_Stop(&pObj->ucObj); + chains_lvdsVipMultiCamMirrorReplacement_Delete(&pObj->ucObj); + + ChainsCommon_StopDisplayCtrl(); + ChainsCommon_StopCaptureDevice(pObj->chainsCfg->captureSrc); + ChainsCommon_StopDisplayDevice(pObj->chainsCfg->displayType); + + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + Chains_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} + +/* Call the GIO_issue to issue buffers from the driver for obtaining SPI data */ +static void prime(void) +{ + + Int32 count = 0; + UInt32 tempCount = 0; + UInt32 size = 0; + Int status = IOM_COMPLETED; + UInt8 spiDummyDataCount; + UInt8 spiDummyData[13]={0x00,0x20,0x09,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F}; + unsigned char data = 0x0F; + + /* Garbage data to be transmitted via SPI to the master, first time */ + if(garbageOnBoot == TRUE) + { + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = data; + } + + } + garbageOnBoot =FALSE; + } + + /* Dummy data to be transmitted via SPI to the master, henceforth */ + else + { + for (count = 0; count < (NUM_BUFS); count++) + { + for (tempCount = 0,spiDummyDataCount=0; tempCount < BUFLEN; tempCount++) + { + ((Uint8 *) txbuf[count])[tempCount] = spiDummyData[spiDummyDataCount++]; + + if(spiDummyDataCount==13) + spiDummyDataCount=0; + } + } + } + + for (count = 0; count < NUM_BUFS; count++) + { + issueDataparam[count].bufLen = BUFLEN; + issueDataparam[count].inBuffer = rxbuf[count]; + issueDataparam[count].outBuffer = txbuf[count]; + + size = issueDataparam[count].bufLen; + + /* Issue the first & second empty buffers to the input stream */ + status = GIO_issue(mcspiHandle, &issueDataparam[count], size, NULL); + + if (status != IOM_PENDING && status != IOM_COMPLETED) + { + Vps_printf("\r\nsatus =%d\r\n",status); + Vps_printf("\r\nFailed to issue empty buffer to stream\r\n"); + } + + #if MIRROR_REPLACEMENT_DEBUGS_ON + Vps_printf("\nIn prime\n"); + Vps_printf("SPI TDA2x-> MCU write frame reply\r\n"); + for(spiDummyDataCount=0;spiDummyDataCount TDA2x Write Frame \r\n"); + + for(j=0;j<13;j++ ) + { + Vps_printf("SPI Data[%d byte]=%x\r\n", j,SPIdata[j]); + } + #endif + + /* + * Transfer the SPI values to algorithms only if the checksum is correct. + */ + if (TRUE == (checkSum_Check(SPIdata, sizeof(SPIdata)))) + { + + /* Assign the inside view selection data field to ucSpiData. + * This will be used across all agorithms. + * Views will be switched according to the value obtained. + * REFERENCE : SL SPI Guide. + */ + ucSpiData = SPIdata[3]; + + /* Allows the user to configure the Y-coordinate from where + * cropping on the top camera image can start. + */ + + operateSpi = SPIdata[10]; + operateSpi <<= BYTE_SHIFT; + operateSpi |= SPIdata[11]; + + if (operateSpi > 400) + operateSpi = 400; + + ucSpiCropDataTopY = operateSpi; + + /* Allows the user to configure the X-coordinate from where + * cropping on left camera image can start. + */ + + operateSpi = SPIdata[4]; + operateSpi <<= BYTE_SHIFT; + operateSpi |= SPIdata[5]; + + if (operateSpi > 480) + operateSpi = 480; + + ucSpiCropDataLeftX = operateSpi; + + /* Allows the user to configure the Y-coordinate from where + * cropping on left camera image can start. + */ + + operateSpi = SPIdata[6]; + + if (operateSpi > 240) + operateSpi = 240; + + ucSpiCropDataLeftY = operateSpi; + + /* Allows the user to configure the X-coordinate from where + * cropping on right camera image can start. + */ + + operateSpi = SPIdata[7]; + operateSpi <<= BYTE_SHIFT; + operateSpi |= SPIdata[8]; + + if (operateSpi > 480) + operateSpi = 480; + + ucSpiCropDataRightX = operateSpi; + + /* Allows the user to configure the Y-coordinate from where + * cropping on right camera image can start. + */ + + operateSpi = SPIdata[9]; + + if (operateSpi > 240) + operateSpi = 240; + + ucSpiCropDataRightY = operateSpi; + + } + } + + /* Fill SPIdata with Read Frame values i.e. the frame sent from SOC to MCU */ + else if((issueDataparam[i].inBuffer[tempCount] == 0x01) && (issueDataparam[i].inBuffer[tempCount+1] == 0x22)) + { + SPIdata[0]=issueDataparam[i].inBuffer[tempCount]; + SPIdata[1]=issueDataparam[i].inBuffer[tempCount + 1]; + SPIdata[2]=issueDataparam[i].inBuffer[tempCount + 2]; + SPIdata[3]=issueDataparam[i].inBuffer[tempCount + 3]; + SPIdata[4]=issueDataparam[i].inBuffer[tempCount + 4]; + SPIdata[5]=issueDataparam[i].inBuffer[tempCount + 5]; + SPIdata[6]=issueDataparam[i].inBuffer[tempCount + 6]; + SPIdata[7]=issueDataparam[i].inBuffer[tempCount + 7]; + SPIdata[8]=issueDataparam[i].inBuffer[tempCount + 8]; + SPIdata[9]=issueDataparam[i].inBuffer[tempCount + 9]; + SPIdata[10]=issueDataparam[i].inBuffer[tempCount + 10]; + SPIdata[11]=issueDataparam[i].inBuffer[tempCount + 11]; + SPIdata[12]=issueDataparam[i].inBuffer[tempCount + 12]; + + #ifdef MIRROR_REPLACEMENT_DEBUGS_ON + Vps_printf("SPI Read Frame\r\n"); + for(j=0;j<13;j++ ) + { + Vps_printf("SPI Data[%d byte]=%x\r\n", j,SPIdata[j]); + + } + #endif + } + } + + else + { + Vps_printf("\nInvalid Frame\r\n"); + + } + tempCount++; + } + } + /* Set the SPI Ready LOW after reclaiming all the issues buffers */ + setSpiReadyLow(); + } +} + +/* SPI De-Init kept commented as of now */ +#if 0 +static Int32 App_mcspiDefaultDeInit(UInt32 isI2cDeInitReq) +{ + Int32 retVal = BSP_SOK; + + retVal += BspUtils_appDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: App Utils De-Init failed!!\r\n"); + } + + retVal += BspUtils_prfDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: App PRF Utils De-Init failed!!\r\n"); + } + + retVal += BspUtils_memDeInit(); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: App MEM Utils De-Init failed!!\r\n"); + } + + retVal += Fvid2_deInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: FVID2 De-Init failed!!\r\n"); + } + + retVal += Bsp_platformDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, + "Error: BSP Platform De-Init failed!!\r\n"); + } + + retVal += Bsp_boardDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Board De-Init failed!!\r\n"); + } + + retVal += Bsp_commonDeInit(NULL); + if (BSP_SOK != retVal) + { + GT_0trace(BspAppTrace, GT_ERR, "Error: BSP Common De-Init failed!!\r\n"); + } + + return (retVal); +} +#endif + +/** + ******************************************************************************* + * + * \brief Single Channel Capture Display usecase function + * + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl/ + * + ******************************************************************************* +*/ +Void chains_lvdsVipMultiCamMirrorReplacement(Chains_Ctrl *chainsCfg) +{ + char done=FALSE; + char ch; + chains_lvdsVipMultiCamMirrorReplacementAppObj chainsObj; + + chainsObj.numLvdsCh = 0; /* KW error fix */ + chainsObj.displayActiveChId = 0; /* KW error fix */ + chainsObj.chainsCfg = chainsCfg; + chainsObj.chainsCfg->numLvdsCh = 4; + + /* Create a seperate task to send and recive data via SPI */ + Vps_printf("\nCalling SPI task\n"); + Task_create((Task_FuncPtr) getSpiData, NULL, NULL); + + chains_lvdsVipMultiCamMirrorReplacement_Create(&chainsObj.ucObj, &chainsObj); + chains_lvdsVipMultiCamMirrorReplacement_StartApp(&chainsObj); + + while(!done) + { + ch = Chains_menuRunTime(); + + switch(ch) + { + case '0': + done = TRUE; + break; + case '1': + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", ch); + break; + } + } + + chains_lvdsVipMultiCamMirrorReplacement_StopAndDeleteApp(&chainsObj); +} + +Hi Rajesh, In your code the setSpiReadyHigh sets some GPIO pin, what is it used for? You can prime the buffers before the while, Then in the while loop you add 1 reclaim at the beginning and 1 issue at the end of the loop till you want to receive the data from external master. Regards, Prasad + +Hi, setSpiReadyHigh sets pin high/low to send indication to MCD that SoC is ready for send/receive data. As I said earlier we would like to send/receive 13 byte data and after some work we found that making it 16 byte and setting buffer alignment and buffer size to 16 works for us in one direction (MCU -> SoC) but in reverse direction (SOC -> MCU) still data is received only once on MCU side for every two send from Soc. Please reply your feedback. Regards, + +Hi, Can you change the GPIO toggle after the priming? Also as I mentioned earlier you need to issue 2 buffers at the beginning which is called priming. After this you can reclaim one buffer and issue one buffer in loop till you send/receive the desired number of bytes. Can you change the code flow as above and try? Regards, Prasad + diff --git a/data2/text/range/30001+/680749.txt b/data2/text/range/30001+/680749.txt new file mode 100644 index 0000000000000000000000000000000000000000..fb66bf67f5af8b875f62f93f6a23ea7e718747bc --- /dev/null +++ b/data2/text/range/30001+/680749.txt @@ -0,0 +1,38 @@ +Ticket Name: Linux/TDA2: SDK_VISION_03_02_00_00\vision_sdk run demo usecase + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP Tool/software: Linux i build and run vision_sdk run demo usecase follow VisionSDK_Linux_UserGuide.pdf but have some problem , i do not know what is wrong? [ 7.966357] Bluetooth: HCI socket layer initialized [ 7.966993] net eth0: initialized cpsw ale version 1.4 [ 7.966997] net eth0: ALE Table size 1024 [ 7.974394] net eth1: phy found : id is : 0x20005c7a [ 8.014803] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 8.038409] Bluetooth: L2CAP socket layer initialized [ 8.056763] net eth0: initializing cpsw version 1.15 (0) [ 8.080701] Bluetooth: SCO socket layer initialized [ 8.107110] net eth0: phy found : id is : 0x20005c7a [ 8.127100] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 8.169404] Initializing XFRM netlink socket [ 8.175856] random: nonblocking pool is initialized [ 8.289821] remoteproc0: powering up 55020000.ipu [ 8.390485] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 [ 8.406599] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 8.508494] remoteproc0: remote processor 55020000.ipu is now up [ 8.531079] virtio_rpmsg_bus virtio0: rpmsg host is online [ 8.546120] remoteproc1: powering up 40800000.dsp [ 8.583619] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 [ 8.619376] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 8.625271] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 8.631221] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 8.785671] remoteproc1: remote processor 40800000.dsp is now up [ 8.813660] virtio_rpmsg_bus virtio1: rpmsg host is online [ 8.837630] remoteproc2: powering up 41000000.dsp [ 8.883390] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 [ 8.911027] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 8.916914] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 8.922848] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 9.060089] remoteproc2: remote processor 41000000.dsp is now up [ 9.078118] virtio_rpmsg_bus virtio2: rpmsg host is online [ 9.146497] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 9.159514] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 9.177810] NET: Registered protocol family 41 [ 9.192643] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 9.356133] usbcore: registered new interface driver usbfs [ 9.372034] usbcore: registered new interface driver hub [ 9.385466] usbcore: registered new device driver usb [ 9.440272] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 9.451426] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 9.466833] dwc3 48890000.usb: otg: can't start till gadget registers [ 9.482074] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 9.495761] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 9.525621] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ OK ] Started uim-sysfs.service. [ 9.535542] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 9.549951] hub 1-0:1.0: USB hub found [ 9.553742] hub 1-0:1.0: 1 port detected [ 9.558382] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 9.567958] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 9.576598] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 9.594417] hub 2-0:1.0: USB hub found [ 9.598339] hub 2-0:1.0: 1 port detected Starting rc.pvr.service... [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Login Service. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK [ 9.734916] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] ] Started Network Name Resolution. [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh [ 506.088505] DMA: Module install successful, device major num = 243 [ 506.094973] DRV: Module install successful [ 506.113938] CMEMK module: reference Linux version 4.4.84 [ 506.119990] cmemk initialized ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# ./apps.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6936000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6f36000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6e76000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6eb6000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6c76000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 533.338528 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 533.338620 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 533.338650 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 533.340206 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 533.340236 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 533.340267 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 533.340267 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 533.341456 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 533.341487 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 533.341517 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 533.341517 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 533.342646 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 533.342646 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 533.342676 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 533.342707 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 533.342859 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 533.342859 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 533.343012 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 533.343012 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 533.343012 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 533.343164 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 533.343286 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 533.343408 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 533.343530 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 533.343652 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 533.343774 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 533.343896 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 533.344049 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 533.344171 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 533.344293 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 533.344415 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 533.344567 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 533.344659 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 533.344781 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 533.344933 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 533.345055 s: SGX3DSRV_0 : Init done - linkid-0x2000041 [HOST] [HOST ] 533.345482 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 533.345604 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 533.345726 s: ALGORITHM_2 : Init done - linkid-0x2000033 [ 527.008034] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 527.027112] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [HOST] [HOST ] 533.345970 s: ALGORITHM_4 : Init done - likid-0x2000035 [HOST] [HOST ] 533.346092 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 533.346214 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 533.346336 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 533.346519 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 533.346733 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 533.346916 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 533.347129 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 533.347373 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 533.347526 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 533.347678 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 533.347861 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 533.348044 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 533.348197 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 533.348380 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 533.348563 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 533.348715 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 533.348898 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 533.349051 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 533.349203 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 533.349356 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 533.349478 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 533.349630 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 533.349783 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 533.349935 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 533.350118 s: SGX3DSFM_0 : Init done - linkid-0x2000042 [HOST] [HOST ] 533.350118 s: SYSTEM: Initializing A15 Links ... DONE !!! VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [HOST ] 533.351613 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [DSP1 ] 15.471054 s: ***** DSP1 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP1 ] 15.471146 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 15.471390 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 15.471634 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 15.471664 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 15.471664 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 15.473586 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 15.750960 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 15.776215 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 15.796193 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 15.816232 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 15.836180 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 15.836210 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 15.836271 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 15.836332 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 15.836363 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 15.836393 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 15.836454 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 15.836485 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 15.836668 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 15.836759 s: RpmsgInit in progress... [HOST] [DSP1 ] 15.836790 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 15.837034 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 15.837674 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP1 ] 15.837735 s: VX_ZONE_INIT:Enabled [HOST] [DSP1 ] 15.837766 s: VX_ZONE_ERROR:Enabled [HOST] [DSP1 ] 15.837796 s: VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 15.838162 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP1 ] 15.838498 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP1 ] 15.838528 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP1 ] 15.838528 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 15.838559 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 15.838803 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 15.838864 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 15.838894 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP1 ] 15.838925 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 15.847709 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 15.847739 s: lz4CompDecomp Init [HOST] [DSP1 ] 15.847770 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 16.179832 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 16.179893 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 15.745531 s: ***** DSP2 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP2 ] 15.745592 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 15.745836 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 15.746080 s: UTILS: CIO: Init Done !!! [HOST] [DSP2 ] 15.746111 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 15.746141 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 15.749039 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 15.750960 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 15.786097 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 15.806075 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 15.826084 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 15.846092 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 15.846153 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 15.846214 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 15.846245 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 15.846306 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 15.846336 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 15.846397 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 15.846428 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 15.846611 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 15.846733 s: RpmsgInit in progress... [HOST] [DSP2 ] 15.846763 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP2 ] 15.846977 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 15.847648 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP2 ] 15.847709 s: VX_ZONE_INIT:Enabled [HOST] [DSP2 ] 15.847739 s: VX_ZONE_ERROR:Enabled [HOST] [DSP2 ] 15.847770 s: VX_ZONE_WARNING:Enabled [HOST] [DSP2 ] 15.848136 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP2 ] 15.848471 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP2 ] 15.848502 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP2 ] 15.848502 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 15.848532 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 15.848776 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 15.848807 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 15.848868 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP2 ] 15.848929 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 15.857744 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 15.857774 s: lz4CompDecomp Init [HOST] [DSP2 ] 15.857805 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 16.181845 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 16.181876 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 15.369700 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE1 ] 15.371439 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 15.374184 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 15.376410 s: UTILS: CIO: Init Done !!! [HOST] [EVE1 ] 15.377325 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 15.378240 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 15.766485 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 15.776215 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 15.786097 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 15.826267 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 15.856249 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 15.876258 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 15.877356 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 15.878576 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 15.879796 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 15.881016 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 15.882205 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 15.883425 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 15.884645 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 15.886384 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 15.887238 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 15.899743 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE1 ] 15.901177 s: VX_ZONE_INIT:Enabled [HOST] [EVE1 ] 15.902549 s: VX_ZONE_ERROR:Enabled [HOST] [EVE1 ] 15.903983 s: VX_ZONE_WARNING:Enabled [HOST] [EVE1 ] 15.907582 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE1 ] 15.908650 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE1 ] 15.909595 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 15.910510 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 15.911883 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 15.913011 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 15.914201 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 15.916427 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE1 ] 15.918562 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 16.003111 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 16.004087 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 15.370127 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE2 ] 15.371896 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 15.374946 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 15.377020 s: UTILS: CIO: Init Done !!! [HOST] [EVE2 ] 15.377966 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 15.378911 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 15.786524 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 15.796193 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 15.806075 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 15.826267 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 15.876105 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 15.896083 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 15.897120 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 15.898401 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 15.899682 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 15.900963 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 15.902244 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 15.903525 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 15.904806 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 15.906667 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 15.907552 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 15.920362 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE2 ] 15.921856 s: VX_ZONE_INIT:Enabled [HOST] [EVE2 ] 15.923290 s: VX_ZONE_ERROR:Enabled [HOST] [EVE2 ] 15.924784 s: VX_ZONE_WARNING:Enabled [HOST] [EVE2 ] 15.928628 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE2 ] 15.929726 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE2 ] 15.930702 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 15.931647 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 15.933050 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 15.934209 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 15.935490 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 15.937656 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE2 ] 15.939699 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 16.024766 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 16.025803 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 15.370066 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE3 ] 15.371805 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 15.374733 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 15.376807 s: UTILS: CIO: Init Done !!! [HOST] [EVE3 ] 15.377722 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 15.378667 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 15.806502 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 15.816232 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 15.826084 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 15.856249 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 15.876105 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 15.916092 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 15.917159 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 15.918532 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 15.919904 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 15.921307 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 15.922680 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 15.924052 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 15.925455 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 15.927438 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 15.928353 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 15.941316 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE3 ] 15.942841 s: VX_ZONE_INIT:Enabled [HOST] [EVE3 ] 15.944305 s: VX_ZONE_ERROR:Enabled [HOST] [EVE3 ] 15.945891 s: VX_ZONE_WARNING:Enabled [HOST] [EVE3 ] 15.949612 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE3 ] 15.950710 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE3 ] 15.951686 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 15.952662 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 15.954096 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 15.955346 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 15.956597 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 15.958854 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE3 ] 15.960928 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 16.043158 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 16.044073 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 15.370127 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE4 ] 15.371866 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 15.374916 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 15.376990 s: UTILS: CIO: Init Done !!! [HOST] [EVE4 ] 15.377905 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 15.378881 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 15.826541 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 15.836180 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 15.846092 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 15.876258 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 15.896083 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 15.916092 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 15.917159 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 15.918532 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 15.919904 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 15.921277 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 15.922619 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 15.923991 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 15.925425 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 15.927499 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 15.928414 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 15.941377 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE4 ] 15.942963 s: VX_ZONE_INIT:Enabled [HOST] [EVE4 ] 15.944458 s: VX_ZONE_ERROR:Enabled [HOST] [EVE4 ] 15.946013 s: VX_ZONE_WARNING:Enabled [HOST] [EVE4 ] 15.949795 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE4 ] 15.950863 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE4 ] 15.951869 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 15.952845 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 15.954309 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 15.955529 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 15.956780 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 15.959037 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE4 ] 15.961111 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 16.043433 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 16.044378 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 15.259836 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 15.291465 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 15.322607 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 15.354114 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 15.354206 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.354297 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.354389 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.354450 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.354541 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 15.354694 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 15.357774 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 15.368754 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 15.368876 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 15.368968 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 15.473586 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 15.749039 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 15.766485 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 15.786524 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.806502 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 15.826541 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 15.826633 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 15.826785 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 15.826907 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 15.827029 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 15.827182 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 15.827304 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 15.827426 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 15.829195 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 15.830079 s: RpmsgInit in progress... [HOST] [IPU2 ] 15.830201 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 15.830781 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 15.835936 s: SYSTEM: Initializing TIOVX ... [HOST] [IPU2 ] 15.836149 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 15.836271 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 15.836393 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 15.840023 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 15.840175 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [IPU2 ] 15.840236 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 15.840297 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 15.840389 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 15.840450 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 15.840511 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 15.840755 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 15.840816 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 15.840968 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 15.841029 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 15.841090 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 15.844232 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.844354 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.844445 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 15.844537 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.844628 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.844689 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.845025 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.845147 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.845238 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 15.845360 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.845452 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.845513 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.845879 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.845970 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.846062 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 15.846184 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.846275 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.846336 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.846702 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.846794 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.846885 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 15.846977 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.847068 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.847160 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.906911 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 15.907826 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 15.908070 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 15.908253 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) [HOST] [IPU2 ] 15.908406 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 15.908558 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) [HOST] [IPU2 ] 15.908741 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 15.908924 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 16.171872 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 16.255047 s: CHAINS: Application Started !!! [HOST] [IPU2 ] 16.265326 s: BOARD: Board Init in progress !!! [HOST] [IPU2 ] 16.265784 s: BOARD: Board Init Done !!! [HOST] [IPU2 ] 16.271396 s: Initializing Multi-Deserializer Setup ...!! [HOST] [IPU2 ] 16.272799 s: MultiDes Board Init Done [HOST] [IPU2 ] 16.272860 s: [HOST] [HOST ] 533.704355 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 533.704477 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 533.704538 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST] [HOST ] 534.233239 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 541.354267 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 541.354297 s: [HOST] [HOST ] 541.354297 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 541.354328 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 541.354328 s: 2 [HOST] [HOST ] 545.530317 s: [HOST] [HOST ] [HOST] [HOST ] ============== [HOST] [HOST ] Capture Source [HOST] [HOST ] ============== [HOST] [HOST ] [HOST] [HOST ] 1: OV10635 Sensor 720P30 [HOST] [HOST ] 2: HDMI Capture 1080P60 [HOST] [HOST ] 3: OV10640 CSI2 Sensor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 4: OV10640 IMI Sennsor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 5: OV2775 CSI2 Sensor (Only on TDA3xx/TDA2px) [HOST] [HOST ] 6: D3 IMX390 CSI2 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] 7: OV2775 TIDA1130 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 545.530348 s: 1 [HOST] [HOST ] 572.435490 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 584.227719 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 584.227719 s: [HOST] [HOST ] 584.227749 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 584.227749 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 584.227749 s: 1 [HOST] [HOST ] 589.235832 s: [HOST] [HOST ] [HOST] [HOST ] ================ [HOST] [HOST ] Display Settings [HOST] [HOST ] ================ [HOST] [HOST ] [HOST] [HOST ] 1: LCD 10-inch 1280x720@60fps [HOST] [HOST ] 2: HDMI 1080P60 [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 589.235862 s: 2 [HOST] [HOST ] 607.348563 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 612.012596 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 612.012627 s: [HOST] [HOST ] 612.012627 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 612.012657 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 622.420972 s: [HOST] [IPU2 ] 622.436131 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 622.436527 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! failed to load module: /usr/lib/gbm/gbm_dri.so: cannot open shared object file: No such file or directory failed to load module: /usr/lib/gbm/gbm_gallium_drm.so: cannot open shared object file: No such file or directory loaded module : gbm_pvr.so found valid GBM backend : gbm_pvr.so [HOST] [HOST ] 622.559110 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 622.559507 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 622.559598 s: SGXFRMCPY: Create in progress for resolution: 1920x1080 !!! [HOST] [HOST ] 622.559690 s: SYSTEM_PVRSCOPE: FIFO /opt/vision_sdk/gpufifo opened successfully [HOST] [IPU2 ] 622.558012 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 622.558470 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 622.558836 s: IPC_OUT_0 : Create Done !!! [HOST] [HOST ] 622.573811 s: EGL: version 1.4 [HOST] [HOST ] 622.589397 s: EGL: GL Version = OpenGL ES 2.0 build 1.14@3699939 (MAIN) [HOST] [HOST ] 622.589397 s: EGL: GL Vendor = Imagination Technologies [HOST] [HOST ] 622.589397 s: EGL: GL Renderer = PowerVR SGX 544MP [HOST] [HOST ] 622.589428 s: EGL: GL Extensions = GL_OES_rgb8_rgba8 GL_OES_depth24 GL_OES_vertex_half_float GL_OES_texture_float GL_OES_texture_half_float GL_OES_element_index_uint GL_OES_mapbuffer GL_OES_fragment_precision_high GL_OES_compressed_ETC1_RGB8_texture GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_required_internalformat GL_OES_depth_texture GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_standard_derivatives GL_OES_vertex_array_object GL_OES_egl_sync GL_OES_texture_npot GL_OES_surfaceless_context GL_EXT_discard_framebuffer GL_EXT_blend_minmax GL_EXT_multi_draw_arrays GL_EXT_multisampled_render_to_texture GL_EXT_shader_texture_lod GL_EXT_texture_format_BGRA8888 GL_EXT_occlusion_query_boolean GL_EXT_texture_rg GL_EXT_draw_buffers GL_EXT_shader_framebuffer_fetch GL_IMG_shader_binary GL_IMG_texture_compression_pvrtc GL_IMG_texture_compression_pvrtc2 GL_IMG_texture_npot GL_IMG_texture_format_BGRA8888 GL_IMG_read_format GL_IMG_program_binary GL_IMG_uniform_buffer_ob [HOST] [HOST ] ect GL_IMG_multisampled_render_to_texture GL_KHR_debug [HOST] [HOST ] 622.637375 s: SGXFRMCPY: Create Done for resolution: 1920x1080 !!! [HOST] [HOST ] 622.637467 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 622.637650 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 622.637802 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 622.638992 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 622.639388 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 622.639937 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 622.640425 s: GRPXSRC: Create in progress !!! [HOST] [IPU2 ] 624.219270 s: GRPXSRC: Create Done !!! [HOST] [IPU2 ] 624.219727 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 624.220215 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 624.225065 s: *** UTILS: CPU KHz = 20000 Khz *** [HOST] [DSP1 ] 624.321173 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP1 ] 624.321204 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 624.321234 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [DSP2 ] 624.321478 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP2 ] 624.321509 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 624.321570 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [EVE1 ] 624.322180 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE1 ] 624.322485 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 624.323034 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE2 ] 624.324040 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE2 ] 624.324345 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 624.324894 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE3 ] 624.325931 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 624.326236 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 624.326785 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE4 ] 624.327822 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 624.328127 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 624.328676 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [IPU2 ] 624.329530 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 624.329683 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248392 B (242 KB) [HOST] [IPU2 ] 624.329866 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 624.330018 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 216524800 B (206 MB) [HOST] [IPU2 ] 624.330201 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 624.330811 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 624.331330 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 624.332214 s: src/bsp_deviceI2c.c @ Line 765: [HOST] [IPU2 ] 624.332336 s: I2C1: DEV 0x30: RD 0x300a ... ERROR !!! [HOST] [IPU2 ] 624.332428 s: src/bsp_deviceI2c.c @ Line 836: [HOST] [IPU2 ] 624.332519 s: I2C1: Error timeout 0 ms!!! [HOST] [IPU2 ] 624.332916 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 624.333007 s: Assertion @ Line: 480 in /home/htf/android/ti/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +Responses: +Hi shuai wang, From Logs, it is clear I2C fails for camera connected Could you please confirm which camera are you using for capture ? Is it single camera connected to Vision daughter board or camera from LVDS setup ? Regards Suryamani Jena + +Hi Suryamani Jena i give a picture ,you see? + +Hi shuai wang, Since you are using LVDS setup for capture, Just change the video config switch settings to LVDS capture Refer section "4.1.1 Capture switch setting" of Linux UG Regrads Suryamani Jena + +Hi Suryamani Jena SW3 is LVDS 00100101 2: Capture Settings i sellect 1 [HOST] [HOST ] 1: OV10635 Sensor 720P30 [HOST] [HOST ] 2: HDMI Capture 1080P60 [HOST] [HOST ] 3: OV10640 CSI2 Sensor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 4: OV10640 IMI Sennsor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 5: OV2775 CSI2 Sensor (Only on TDA3xx/TDA2px) [HOST] [HOST ] 6: D3 IMX390 CSI2 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] 7: OV2775 TIDA1130 Sensor on Fusion Platform (Only on TDA2px) 1: Display Settings 1: LCD 10-inch 1280x720@60fps [HOST] [HOST ] 2: HDMI 1080P60 i sellect 2 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# source vision_sdk_load.sh [ 37.958310] DMA: Module install successful, device major num = 243 [ 37.964767] DRV: Module install successful [ 37.987490] CMEMK module: reference Linux version 4.4.84 [ 37.996292] cmemk initialized ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# ./apps.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb69fc000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6ffc000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6f3c000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6f7c000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6d3c000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 50.970292 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 50.970383 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 50.970383 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 50.971756 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 50.971786 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 50.971817 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 50.971847 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 50.972915 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 50.972945 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 50.972976 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 50.972976 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 50.973952 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 50.973982 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 50.974013 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 50.974013 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 50.974165 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 50.974196 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 50.974318 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 50.974318 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 50.974348 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 50.974470 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 50.974592 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 50.974684 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 50.974806 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 50.974928 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 50.975019 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 50.975202 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 50.975385 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 50.975538 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 50.975721 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 50.975873 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 50.976026 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 50.976178 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 50.976361 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 50.976544 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 50.976727 s: SGX3DSRV_0 : Init done - linkid-0x2000041 [HOST] [HOST ] 50.977124 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 50.977368 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 50.977520 s: ALGORITHM_2 : Init done - linkid-0x2000033 [ 44.697566] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [HOST] [HOST ] 50.977673 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 50.977825 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 50.977978 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 50.978130 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 50.978313 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 50.978527 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 50.978740 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 50.978984 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 50.979198 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 50.979411 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 50.979564 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 50.979716 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 50.979899 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 50.980021 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 50.980174 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 50.980357 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 50.980540 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 50.980692 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 50.980845 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 50.980997 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 50.981180 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 50.981333 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 50.983316 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 50.983438 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 50.983560 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 50.983651 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 50.983773 s: SGX3DSFM_0 : Init done - linkid-0x2000042 [HOST] [HOST ] 50.983804 s: SYSTEM: Initializing A15 Links ... DONE !!! VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [HOST ] 50.986030 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [DSP1 ] 15.664094 s: ***** DSP1 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP1 ] 15.664155 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 15.664429 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 15.664643 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 15.664704 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 15.664704 omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) :s SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 15.66602 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 15.873452 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 15.898889 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 15.918928 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 15.938937 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 15.958884 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 15.958945 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 15.958976 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 15.959037 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 15.959067 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 15.959128 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 15.959159 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 15.959220 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 15.959403 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 15.959494 s: RpmsgInit in progress... [HOST] [DSP1 ] 15.959525 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 15.959738 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 15.960409 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP1 ] 15.960470 s: VX_ZONE_INIT:Enabled [HOST] [DSP1 ] 15.960501 s: VX_ZONE_ERROR:Enabled [HOST] [DSP1 ] 15.960562 s: VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 15.960867 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP1 ] 15.961233 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP1 ] 15.961263 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP1 ] 15.961263 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 15.961294 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 15.961538 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 15.961568 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 15.961629 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP1 ] 15.961660 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 15.970475 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 15.970536 s: lz4CompDecomp Init [HOST] [DSP1 ] 15.970536 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 16.302324 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 16.302354 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 15.867992 s: ***** DSP2 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP2 ] 15.868053 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 15.868327 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 15.868571 s: UTILS: CIO: Init Done !!! [HOST] [DSP2 ] 15.868602 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 15.868602 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 15.871530 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 15.873452 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 15.908833 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 15.928841 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 15.948819 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 15.968828 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 15.968858 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 15.968919 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 15.968980 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 15.969011 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 15.969072 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 15.969133 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 15.969163 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 15.969346 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 15.969468 s: RpmsgInit in progress... [HOST] [DSP2 ] 15.969499 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP2 ] 15.969712 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 15.970383 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP2 ] 15.970444 s: VX_ZONE_INIT:Enabled [HOST] [DSP2 ] 15.970505 s: VX_ZONE_ERROR:Enabled [HOST] [DSP2 ] 15.970536 s: VX_ZONE_WARNING:Enabled [HOST] [DSP2 ] 15.970871 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP2 ] 15.971207 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP2 ] 15.971237 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP2 ] 15.971237 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 15.971268 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 15.971512 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 15.971573 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 15.971603 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP2 ] 15.971634 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 15.980540 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 15.980570 s: lz4CompDecomp Init [HOST] [DSP2 ] 15.980601 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 16.304337 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 16.304367 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 15.552217 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE1 ] 15.553955 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 15.556914 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 15.559171 s: UTILS: CIO: Init Done !!! [HOST] [EVE1 ] 15.560117 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 15.561062 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 15.889221 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 15.898889 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 15.908833 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 15.948972 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 15.978954 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 15.998962 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 16.000061 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 16.001220 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 16.002379 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 16.003568 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 16.004758 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 16.005917 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 16.007076 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 16.008723 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 16.009516 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 16.022082 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE1 ] 16.023455 s: VX_ZONE_INIT:Enabled [HOST] [EVE1 ] 16.024827 s: VX_ZONE_ERROR:Enabled [HOST] [EVE1 ] 16.026200 s: VX_ZONE_WARNING:Enabled [HOST] [EVE1 ] 16.029799 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE1 ] 16.030836 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE1 ] 16.031720 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 16.032605 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 16.033916 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 16.034984 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 16.036143 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 16.038309 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE1 ] 16.040383 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 16.125266 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 16.126242 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 15.552491 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE2 ] 15.554260 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 15.557677 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 15.559781 s: UTILS: CIO: Init Done !!! [HOST] [EVE2 ] 15.560757 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 15.561733 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 15.909290 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 15.918928 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 15.928841 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 15.948972 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 15.998810 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 16.018819 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 16.019856 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 16.021106 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 16.022387 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 16.023638 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 16.024888 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 16.026108 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 16.027389 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 16.029189 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 16.030043 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 16.042884 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE2 ] 16.044317 s: VX_ZONE_INIT:Enabled [HOST] [EVE2 ] 16.045720 s: VX_ZONE_ERROR:Enabled [HOST] [EVE2 ] 16.047184 s: VX_ZONE_WARNING:Enabled [HOST] [EVE2 ] 16.050997 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE2 ] 16.052034 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE2 ] 16.052979 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 16.053894 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 16.055297 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 16.056426 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 16.057585 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 16.059812 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE2 ] 16.061855 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 16.146708 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 16.147745 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 15.552491 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE3 ] 15.554260 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 15.557494 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 15.559568 s: UTILS: CIO: Init Done !!! [HOST] [EVE3 ] 15.560483 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 15.561459 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 15.929268 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 15.938967 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 15.948819 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 15.978954 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 15.998810 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 16.038797 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 16.039834 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 16.041176 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 16.042548 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 16.043890 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 16.045232 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 16.046544 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 16.047947 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 16.049838 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 16.050722 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 16.063807 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE3 ] 16.065271 s: VX_ZONE_INIT:Enabled [HOST] [EVE3 ] 16.066705 s: VX_ZONE_ERROR:Enabled [HOST] [EVE3 ] 16.068260 s: VX_ZONE_WARNING:Enabled [HOST] [EVE3 ] 16.071981 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE3 ] 16.073079 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE3 ] 16.074025 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 16.074971 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 16.076374 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 16.077563 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 16.078875 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 16.081101 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE3 ] 16.083145 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 16.165222 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 16.166198 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 15.552522 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE4 ] 15.554291 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 15.557677 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 15.559781 s: UTILS: CIO: Init Done !!! [HOST] [EVE4 ] 15.560727 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 15.561703 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 15.949277 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 15.958884 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 15.968828 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 15.998962 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 16.018819 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 16.038797 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 16.039834 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 16.041176 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 16.042518 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 16.043860 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 16.045171 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 16.046483 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 16.047886 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 16.049868 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 16.050783 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 16.063838 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE4 ] 16.065332 s: VX_ZONE_INIT:Enabled [HOST] [EVE4 ] 16.066766 s: VX_ZONE_ERROR:Enabled [HOST] [EVE4 ] 16.068321 s: VX_ZONE_WARNING:Enabled [HOST] [EVE4 ] 16.072073 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE4 ] 16.073140 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE4 ] 16.074086 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 16.075062 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 16.076435 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 16.077624 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 16.078905 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 16.081132 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE4 ] 16.083206 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 16.165283 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 16.166229 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 15.444030 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 15.475324 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 15.506008 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 15.536570 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 15.536692 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.536783 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.536844 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.536936 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.536997 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 15.537150 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 15.540261 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 15.551088 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 15.551210 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 15.551302 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 15.667602 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 15.871530 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 15.889221 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 15.909290 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.929268 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 15.949277 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 15.949368 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 15.949521 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 15.949673 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 15.949795 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 15.949917 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 15.950039 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 15.950161 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 15.951900 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 15.952845 s: RpmsgInit in progress... [HOST] [IPU2 ] 15.952906 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 15.953486 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 15.958640 s: SYSTEM: Initializing TIOVX ... [HOST] [IPU2 ] 15.958823 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 15.958945 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 15.959067 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 15.962758 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 15.962849 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [IPU2 ] 15.962910 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 15.962972 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 15.963033 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 15.963124 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 15.963185 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 15.964131 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 15.964192 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 15.964344 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 15.964405 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 15.964466 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 15.967486 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.967669 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.967760 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 15.967852 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.967943 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.968004 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.968370 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.968462 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.968553 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 15.968675 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.968767 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.968858 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.969224 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.969316 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.969377 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 15.969499 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.969590 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.969682 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.970017 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.970109 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.970200 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 15.970292 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.970383 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.970475 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.029982 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 16.030897 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 16.031141 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 16.031263 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) [HOST] [IPU2 ] 16.031415 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 16.031598 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) [HOST] [IPU2 ] 16.031812 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 16.031964 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 16.294058 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 16.377752 s: CHAINS: Application Started !!! [HOST] [IPU2 ] 16.388061 s: BOARD: Board Init in progress !!! [HOST] [IPU2 ] 16.388519 s: BOARD: Board Init Done !!! [HOST] [IPU2 ] 16.394192 s: Initializing Multi-Deserializer Setup ...!! [HOST] [IPU2 ] 16.395626 s: MultiDes Board Init Done [HOST] [IPU2 ] 16.395656 s: [HOST] [HOST ] 51.335844 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 51.335966 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 51.336058 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST] [HOST ] 52.085310 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 57.040932 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 57.040962 s: [HOST] [HOST ] 57.040962 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 57.040993 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 57.040993 s: 2 [HOST] [HOST ] 59.417129 s: [HOST] [HOST ] [HOST] [HOST ] ============== [HOST] [HOST ] Capture Source [HOST] [HOST ] ============== [HOST] [HOST ] [HOST] [HOST ] 1: OV10635 Sensor 720P30 [HOST] [HOST ] 2: HDMI Capture 1080P60 [HOST] [HOST ] 3: OV10640 CSI2 Sensor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 4: OV10640 IMI Sennsor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 5: OV2775 CSI2 Sensor (Only on TDA3xx/TDA2px) [HOST] [HOST ] 6: D3 IMX390 CSI2 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] 7: OV2775 TIDA1130 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 59.417129 s: 1 [HOST] [HOST ] 71.137436 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 106.498779 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 106.498810 s: [HOST] [HOST ] 106.498810 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 106.498810 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 106.498840 s: 1 [HOST] [HOST ] 111.994875 s: [HOST] [HOST ] [HOST] [HOST ] ================ [HOST] [HOST ] Display Settings [HOST] [HOST ] ================ [HOST] [HOST ] [HOST] [HOST ] 1: LCD 10-inch 1280x720@60fps [HOST] [HOST ] 2: HDMI 1080P60 [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 111.994875 s: 2 [HOST] [HOST ] 117.875251 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 125.115506 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 125.115506 s: [HOST] [HOST ] 125.115537 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 125.115537 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 127.067437 s: [HOST] [IPU2 ] 127.082230 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 127.082657 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! failed to load module: /usr/lib/gbm/gbm_dri.so: cannot open shared object file: No such file or directory failed to load module: /usr/lib/gbm/gbm_gallium_drm.so: cannot open shared object file: No such file or directory loaded module : gbm_pvr.so found valid GBM backend : gbm_pvr.so [HOST] [HOST ] 127.204264 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 127.204691 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 127.204782 s: SGXFRMCPY: Create in progress for resolution: 1920x1080 !!! [HOST] [HOST ] 127.204843 s: SYSTEM_PVRSCOPE: FIFO /opt/vision_sdk/gpufifo opened successfully [HOST] [IPU2 ] 127.203196 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 127.203684 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 127.204020 s: IPC_OUT_0 : Create Done !!! [HOST] [HOST ] 127.218507 s: EGL: version 1.4 [HOST] [HOST ] 127.233575 s: EGL: GL Version = OpenGL ES 2.0 build 1.14@3699939 (MAIN) [HOST] [HOST ] 127.233575 s: EGL: GL Vendor = Imagination Technologies [HOST] [HOST ] 127.233575 s: EGL: GL Renderer = PowerVR SGX 544MP [HOST] [HOST ] 127.233605 s: EGL: GL Extensions = GL_OES_rgb8_rgba8 GL_OES_depth24 GL_OES_vertex_half_float GL_OES_texture_float GL_OES_texture_half_float GL_OES_element_index_uint GL_OES_mapbuffer GL_OES_fragment_precision_high GL_OES_compressed_ETC1_RGB8_texture GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_required_internalformat GL_OES_depth_texture GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_standard_derivatives GL_OES_vertex_array_object GL_OES_egl_sync GL_OES_texture_npot GL_OES_surfaceless_context GL_EXT_discard_framebuffer GL_EXT_blend_minmax GL_EXT_multi_draw_arrays GL_EXT_multisampled_render_to_texture GL_EXT_shader_texture_lod GL_EXT_texture_format_BGRA8888 GL_EXT_occlusion_query_boolean GL_EXT_texture_rg GL_EXT_draw_buffers GL_EXT_shader_framebuffer_fetch GL_IMG_shader_binary GL_IMG_texture_compression_pvrtc GL_IMG_texture_compression_pvrtc2 GL_IMG_texture_npot GL_IMG_texture_format_BGRA8888 GL_IMG_read_format GL_IMG_program_binary GL_IMG_uniform_buffer_ob [HOST] [HOST ] ect GL_IMG_multisampled_render_to_texture GL_KHR_debug [HOST] [HOST ] 127.281766 s: SGXFRMCPY: Create Done for resolution: 1920x1080 !!! [HOST] [HOST ] 127.281858 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 127.282041 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 127.282224 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 127.283352 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 127.283749 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 127.284237 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 127.284786 s: GRPXSRC: Create in progress !!! [HOST] [IPU2 ] 128.856036 s: GRPXSRC: Create Done !!! [HOST] [IPU2 ] 128.856493 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 128.857042 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 128.861099 s: *** UTILS: CPU KHz = 20000 Khz *** [HOST] [DSP1 ] 128.957695 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP1 ] 128.957725 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 128.957786 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [DSP2 ] 128.957969 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP2 ] 128.958030 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 128.958061 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [EVE1 ] 128.958549 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE1 ] 128.958854 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 128.959403 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE2 ] 128.960440 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE2 ] 128.960806 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 128.961355 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE3 ] 128.962361 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 128.962697 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 128.963216 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE4 ] 128.964222 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 128.964527 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 128.965076 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [IPU2 ] 128.965900 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 128.966052 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248392 B (242 KB) [HOST] [IPU2 ] 128.966205 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 128.966357 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 216524800 B (206 MB) [HOST] [IPU2 ] 128.966540 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 128.966998 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 128.967486 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 128.968340 s: src/bsp_deviceI2c.c @ Line 765: [HOST] [IPU2 ] 128.968431 s: I2C1: DEV 0x30: RD 0x300a ... ERROR !!! [HOST] [IPU2 ] 128.968523 s: src/bsp_deviceI2c.c @ Line 836: [HOST] [IPU2 ] 128.968675 s: I2C1: Error timeout 0 ms!!! [HOST] [IPU2 ] 128.969041 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 128.969133 s: Assertion @ Line: 480 in /home/htf/android/ti/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +Hi shuai wang, For Single cam UC, Could you please connect the cam to the cam6 port of the multides board & try ? Regard Suryamani Jena + +Hi Suryamani Jena i think i use cam 6 i up picture ,the borad light is red . i try single cam connect to P1 not use LVDS is ok ! [ OK ] Reached target System Time Synchronized. [ 6.759784] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 6.768627] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 6.782665] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst Starting Synchronize System and HW clocks... [ 6.811486] scsi host0: ahci [ 6.815470] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 [ OK ] Started Synchronize System and HW clocks. [ 6.915502] remoteproc2: registered virtio2 (type 7) [ OK ] Started Update UTMP about System Boot/Shutdown. [ 7.013700] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ OK ] Reached target System Initialization. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ 7.197224] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Listening on dropbear.socket. [ OK ] Listening on RPCbind Server Activation Socket. [ OK ] Reached target Sockets. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Reached target Basic System. [ 7.366356] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Started Kernel Logging Service. Starting TI MultiCore Tools Daemon... Starting Avahi mDNS/DNS-SD Stack... Starting Telephony service... [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. Starting Login Service... Starting Print notice about GPLv3 packages... [ OK ] Started System Logging Service. Starting Save/Restore Sound Card State... [ OK ] Started D-Bus System Message Bus. [ 7.772713] NET: Registered protocol family 15 [ OK ] Started Telephony service. [ OK ] Started Avahi mDNS/DNS-SD Stack. Starting Permit User Sessions... Starting Network Service... Starting uim-sysfs.service... [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Save/Restore Sound Card State. [ OK ] Started Permit User Sessions. [ 8.012109] net eth1: initializing cpsw version 1.15 (0) [ OK ] Started Network Service. [ 8.024447] net eth0: initialized cpsw ale version 1.4 [ 8.037229] net eth0: ALE Table size 1024 [ 8.063497] remoteproc0: powering up 55020000.ipu [ 8.064002] Bluetooth: Core ver 2.21 [ 8.064043] NET: Registered protocol family 31 [ 8.064045] Bluetooth: HCI device and connection manager initialized [ 8.064056] Bluetooth: HCI socket layer initialized [ 8.064063] Bluetooth: L2CAP socket layer initialized [ 8.064089] Bluetooth: SCO socket layer initialized [ 8.107230] net eth1: phy found : id is : 0x20005c7a [ 8.121006] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 8.129910] net eth0: initializing cpsw version 1.15 (0) [ 8.186585] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 [ 8.207337] net eth0: phy found : id is : 0x20005c7a [ 8.237088] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 8.243900] Initializing XFRM netlink socket [ 8.248647] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 8.352907] remoteproc0: remote processor 55020000.ipu is now up [ 8.389377] virtio_rpmsg_bus virtio0: rpmsg host is online [ 8.415783] remoteproc1: powering up 40800000.dsp [ 8.452435] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 [ 8.464011] random: nonblocking pool is initialized [ 8.473834] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 8.479719] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 8.485648] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 8.583616] remoteproc1: remote processor 40800000.dsp is now up [ 8.604229] virtio_rpmsg_bus virtio1: rpmsg host is online [ 8.619151] remoteproc2: powering up 41000000.dsp [ 8.647357] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 [ 8.677320] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 8.683211] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 8.689138] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 8.800493] remoteproc2: remote processor 41000000.dsp is now up [ 8.826291] virtio_rpmsg_bus virtio2: rpmsg host is online [ 8.880775] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 8.892568] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 8.912129] NET: Registered protocol family 41 [ 8.921181] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 9.136961] usbcore: registered new interface driver usbfs [ 9.149607] usbcore: registered new interface driver hub [ 9.161396] usbcore: registered new device driver usb [ 9.218839] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 9.225839] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 9.244257] dwc3 48890000.usb: otg: can't start till gadget registers [ 9.259094] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 9.271688] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 9.289886] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 9.308990] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 9.329068] hub 1-0:1.0: USB hub found [ 9.332925] hub 1-0:1.0: 1 port detected [ 9.342084] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 9.353578] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 9.371910] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 9.390120] hub 2-0:1.0: USB hub found [ 9.399646] hub 2-0:1.0: 1 port detected [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. [ OK ] Reached target Network. Starting Network Name Resolution... Starting Lightning Fast Webserver With Light System Requirements... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Login Service. [ OK ] Started Network Name Resolution. [ OK ] Started uim-sysfs.service. Starting rc.pvr.service... [ 9.814117] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting telnetd.service... Starting tiipclad-daemon.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# source vision_sdk_load.sh [ 78.098165] DMA: Module install successful, device major num = 243 [ 78.104633] DRV: Module install successful [ 78.132098] CMEMK module: reference Linux version 4.4.84 [ 78.140440] cmemk initialized ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# ./apps.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb69f3000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6ff3000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6f33000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6f73000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6d33000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 91.856829 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 91.856920 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 91.856951 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 91.858293 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 91.858323 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 91.858354 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 91.858384 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 91.859513 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 91.859543 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 91.859574 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 91.859574 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 91.860641 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 91.860672 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 91.860702 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 91.860702 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 91.860855 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 91.860855 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 91.860977 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 91.861007 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 91.861007 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 91.861160 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 91.861251 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 91.861373 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 91.861495 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 91.861587 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 91.861770 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 91.861922 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 91.862136 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 91.862288 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 91.862441 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 91.862624 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 91.862776 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 91.862959 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 91.863081 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 91.863264 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 91.863417 s: SGX3DSRV_0 : Init done - linkid-0x2000041 [HOST] [HOST ] 91.863783 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 91.863966 s: ALGORITHM_1 : Init done - linkid-0x2000032 VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [HOST ] 91.864149 s: ALGORITHM_2 : Init done - linkid-0x2000033 [HOST] [HOST ] 91.864301 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 91.864515 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 91.864698 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 91.864850 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 91.865003 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 91.865216 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 91.865430 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 91.865643 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 91.865826 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 91.866040 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 91.866223 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 91.866375 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 91.866558 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 91.866680 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 91.866863 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 91.867016 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 91.867199 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 91.867351 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 91.867504 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 91.867656 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 91.867809 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 91.867961 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 91.868083 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 91.868236 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 91.868358 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 91.868510 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 91.868632 s: SGX3DSFM_0 : Init done - linkid-0x2000042 [HOST] [HOST ] 91.868663 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 91.870249 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [DSP1 ] 15.280028 s: ***** DSP1 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP1 ] 15.280089 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 15.280333 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 15.280577 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 15.280607 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 15.280638 s: SYST omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 85.767238] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) ME: Attaching to [IPU2] ... [HOST] [DSP1 ] 15.282529 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 15.501342 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 15.521472 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 15.541450 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 15.561489 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 15.581437 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 15.581498 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 15.581528 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 15.581589 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 15.581620 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 15.581681 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 15.581711 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 15.581772 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 15.581925 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 15.582047 s: RpmsgInit in progress... [HOST] [DSP1 ] 15.582077 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 15.582291 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 15.582931 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP1 ] 15.582992 s: VX_ZONE_INIT:Enabled [HOST] [DSP1 ] 15.583053 s: VX_ZONE_ERROR:Enabled [HOST] [DSP1 ] 15.583084 s: VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 15.583419 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP1 ] 15.583785 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP1 ] 15.583816 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP1 ] 15.583816 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 15.583846 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 15.584090 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 15.584121 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 15.584151 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP1 ] 15.584182 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 15.592966 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 15.592997 s: lz4CompDecomp Init [HOST] [DSP1 ] 15.593027 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 15.924235 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 15.924266 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 15.496888 s: ***** DSP2 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP2 ] 15.496980 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 15.497224 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 15.497437 s: UTILS: CIO: Init Done !!! [HOST] [DSP2 ] 15.497498 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 15.497498 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 15.499420 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 15.501342 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 15.531324 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 15.551363 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 15.571341 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 15.591380 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 15.591410 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 15.591471 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 15.591532 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 15.591563 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 15.591624 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 15.591654 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 15.591715 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 15.591898 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 15.591990 s: RpmsgInit in progress... [HOST] [DSP2 ] 15.592020 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP2 ] 15.592264 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 15.592905 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP2 ] 15.592966 s: VX_ZONE_INIT:Enabled [HOST] [DSP2 ] 15.593027 s: VX_ZONE_ERROR:Enabled [HOST] [DSP2 ] 15.593058 s: VX_ZONE_WARNING:Enabled [HOST] [DSP2 ] 15.593393 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP2 ] 15.593759 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP2 ] 15.593790 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP2 ] 15.593790 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 15.593820 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 15.594064 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 15.594095 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 15.594125 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP2 ] 15.594156 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 15.603062 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 15.603092 s: lz4CompDecomp Init [HOST] [DSP2 ] 15.603123 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 15.926218 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 15.926249 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 15.224577 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE1 ] 15.226316 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 15.229213 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 15.231592 s: UTILS: CIO: Init Done !!! [HOST] [EVE1 ] 15.232507 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 15.233483 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 15.511742 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 15.521472 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 15.531354 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 15.571524 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 15.601506 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 15.621484 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 15.622582 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 15.623833 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 15.625053 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 15.626303 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 15.627554 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 15.628774 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 15.630025 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 15.631763 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 15.632617 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 15.645153 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE1 ] 15.646556 s: VX_ZONE_INIT:Enabled [HOST] [EVE1 ] 15.647959 s: VX_ZONE_ERROR:Enabled [HOST] [EVE1 ] 15.649362 s: VX_ZONE_WARNING:Enabled [HOST] [EVE1 ] 15.652931 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE1 ] 15.653968 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE1 ] 15.654913 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 15.655828 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 15.657201 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 15.658329 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 15.659488 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 15.661745 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE1 ] 15.663880 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 15.748276 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 15.749313 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 15.224821 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE2 ] 15.226590 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 15.230220 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 15.232416 s: UTILS: CIO: Init Done !!! [HOST] [EVE2 ] 15.233361 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 15.234398 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 15.531781 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 15.541450 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 15.551363 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 15.571524 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 15.621332 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 15.641340 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 15.642408 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 15.643689 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 15.644970 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 15.646251 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 15.647562 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 15.648813 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 15.650094 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 15.651924 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 15.652809 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 15.665649 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE2 ] 15.667144 s: VX_ZONE_INIT:Enabled [HOST] [EVE2 ] 15.668608 s: VX_ZONE_ERROR:Enabled [HOST] [EVE2 ] 15.670042 s: VX_ZONE_WARNING:Enabled [HOST] [EVE2 ] 15.674037 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE2 ] 15.675135 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE2 ] 15.676111 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 15.677087 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 15.678490 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 15.679649 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 15.680961 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 15.683126 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE2 ] 15.685201 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 15.769871 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 15.770908 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 15.224821 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE3 ] 15.226590 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 15.229732 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 15.231989 s: UTILS: CIO: Init Done !!! [HOST] [EVE3 ] 15.232904 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 15.233880 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 15.551790 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 15.561489 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 15.571341 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 15.601506 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 15.621332 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 15.661349 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 15.662416 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 15.663789 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 15.665161 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 15.666564 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 15.667937 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 15.669279 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 15.670713 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 15.672726 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 15.673641 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 15.686604 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE3 ] 15.688098 s: VX_ZONE_INIT:Enabled [HOST] [EVE3 ] 15.689562 s: VX_ZONE_ERROR:Enabled [HOST] [EVE3 ] 15.691118 s: VX_ZONE_WARNING:Enabled [HOST] [EVE3 ] 15.694808 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE3 ] 15.695906 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE3 ] 15.696852 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 15.697828 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 15.699261 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 15.700512 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 15.701732 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 15.703959 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE3 ] 15.706033 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 15.788049 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 15.789025 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 15.224852 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE4 ] 15.226590 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 15.230220 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 15.232385 s: UTILS: CIO: Init Done !!! [HOST] [EVE4 ] 15.233331 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 15.234368 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 15.571798 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 15.581437 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 15.591380 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 15.621484 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 15.641340 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 15.661349 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 15.662416 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 15.663789 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 15.665161 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 15.666534 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 15.667876 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 15.669218 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 15.670652 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 15.672848 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 15.673763 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 15.686726 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE4 ] 15.688220 s: VX_ZONE_INIT:Enabled [HOST] [EVE4 ] 15.689684 s: VX_ZONE_ERROR:Enabled [HOST] [EVE4 ] 15.691270 s: VX_ZONE_WARNING:Enabled [HOST] [EVE4 ] 15.694961 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE4 ] 15.696059 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE4 ] 15.697035 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 15.697980 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 15.699414 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 15.700634 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 15.701915 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 15.704142 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE4 ] 15.706216 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 15.788354 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 15.789300 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 15.114530 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 15.146373 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 15.177606 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 15.208961 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 15.209083 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.209144 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.209235 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.209296 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.209388 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 15.209540 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 15.212651 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 15.223723 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 15.223845 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 15.223998 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 15.282529 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 15.499420 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 15.511742 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 15.531781 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.551790 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 15.571798 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 15.571920 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 15.572073 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 15.572195 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 15.572317 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 15.572439 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 15.572561 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 15.572683 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 15.574422 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 15.575367 s: RpmsgInit in progress... [HOST] [IPU2 ] 15.575459 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 15.576069 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 15.581193 s: SYSTEM: Initializing TIOVX ... [HOST] [IPU2 ] 15.581376 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 15.581498 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 15.581620 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 15.585310 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 15.585402 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [IPU2 ] 15.585493 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 15.585554 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 15.585615 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 15.585676 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 15.585768 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 15.586134 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 15.586195 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 15.586347 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 15.586408 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 15.586500 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 15.589550 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.589672 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.589763 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 15.589855 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.589946 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.590068 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.590434 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.590526 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.590617 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 15.590709 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.590800 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.590892 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.591258 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.591349 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.591441 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 15.591563 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.591624 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.591715 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.592081 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.592173 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.592264 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 15.592386 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.592447 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.592539 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.652138 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 15.653053 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 15.653297 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 15.653388 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) [HOST] [IPU2 ] 15.653571 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 15.653724 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) [HOST] [IPU2 ] 15.653907 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 15.654090 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 15.916732 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 16.000305 s: CHAINS: Application Started !!! [HOST] [IPU2 ] 16.010492 s: BOARD: Board Init in progress !!! [HOST] [IPU2 ] 16.010949 s: BOARD: Board Init Done !!! [HOST] [IPU2 ] 16.016622 s: Initializing Multi-Deserializer Setup ...!! [HOST] [IPU2 ] 16.018025 s: MultiDes Board Init Done [HOST] [IPU2 ] 16.018086 s: [HOST] [HOST ] 92.222137 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 92.222259 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 92.222351 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST] [HOST ] 92.972518 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 98.652534 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 98.652565 s: [HOST] [HOST ] 98.652595 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 98.652595 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 98.652595 s: 1 [HOST] [HOST ] 101.724577 s: [HOST] [HOST ] [HOST] [HOST ] ================ [HOST] [HOST ] Display Settings [HOST] [HOST ] ================ [HOST] [HOST ] [HOST] [HOST ] 1: LCD 10-inch 1280x720@60fps [HOST] [HOST ] 2: HDMI 1080P60 [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 101.724608 s: 2 [HOST] [HOST ] 104.684560 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 108.684773 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 108.684804 s: [HOST] [HOST ] 108.684804 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 108.684804 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 108.684834 s: 2 [HOST] [HOST ] 112.060696 s: [HOST] [HOST ] [HOST] [HOST ] ============== [HOST] [HOST ] Capture Source [HOST] [HOST ] ============== [HOST] [HOST ] [HOST] [HOST ] 1: OV10635 Sensor 720P30 [HOST] [HOST ] 2: HDMI Capture 1080P60 [HOST] [HOST ] 3: OV10640 CSI2 Sensor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 4: OV10640 IMI Sennsor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 5: OV2775 CSI2 Sensor (Only on TDA3xx/TDA2px) [HOST] [HOST ] 6: D3 IMX390 CSI2 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] 7: OV2775 TIDA1130 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 112.060727 s: 1 [HOST] [HOST ] 141.646068 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 145.663148 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 145.663179 s: [HOST] [HOST ] 145.663179 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 145.663179 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 151.559171 s: [HOST] [IPU2 ] 151.565454 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 151.565881 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [IPU2 ] 151.687336 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 151.687793 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 151.688129 s: IPC_OUT_0 : Create Done !!! failed to load module: /usr/lib/gbm/gbm_dri.so: cannot open shared object file: No such file or directory failed to load module: /usr/lib/gbm/gbm_gallium_drm.so: cannot open shared object file: No such file or directory loaded module : gbm_pvr.so found valid GBM backend : gbm_pvr.so [HOST] [HOST ] 151.688434 s: IPC_IN_0 : Create in progress !!! [HOST] [HOST ] 151.688861 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 151.688952 s: SGXFRMCPY: Create in progress for resolution: 1920x1080 !!! [HOST] [HOST ] 151.689013 s: SYSTEM_PVRSCOPE: FIFO /opt/vision_sdk/gpufifo opened successfully [HOST] [HOST ] 151.702921 s: EGL: version 1.4 [HOST] [HOST ] 151.717806 s: EGL: GL Version = OpenGL ES 2.0 build 1.14@3699939 (MAIN) [HOST] [HOST ] 151.717806 s: EGL: GL Vendor = Imagination Technologies [HOST] [HOST ] 151.717836 s: EGL: GL Renderer = PowerVR SGX 544MP [HOST] [HOST ] 151.717836 s: EGL: GL Extensions = GL_OES_rgb8_rgba8 GL_OES_depth24 GL_OES_vertex_half_float GL_OES_texture_float GL_OES_texture_half_float GL_OES_element_index_uint GL_OES_mapbuffer GL_OES_fragment_precision_high GL_OES_compressed_ETC1_RGB8_texture GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_required_internalformat GL_OES_depth_texture GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_standard_derivatives GL_OES_vertex_array_object GL_OES_egl_sync GL_OES_texture_npot GL_OES_surfaceless_context GL_EXT_discard_framebuffer GL_EXT_blend_minmax GL_EXT_multi_draw_arrays GL_EXT_multisampled_render_to_texture GL_EXT_shader_texture_lod GL_EXT_texture_format_BGRA8888 GL_EXT_occlusion_query_boolean GL_EXT_texture_rg GL_EXT_draw_buffers GL_EXT_shader_framebuffer_fetch GL_IMG_shader_binary GL_IMG_texture_compression_pvrtc GL_IMG_texture_compression_pvrtc2 GL_IMG_texture_npot GL_IMG_texture_format_BGRA8888 GL_IMG_read_format GL_IMG_program_binary GL_IMG_uniform_buffer_ob [HOST] [HOST ] ect GL_IMG_multisampled_render_to_texture GL_KHR_debug [HOST] [HOST ] 151.765936 s: SGXFRMCPY: Create Done for resolution: 1920x1080 !!! [HOST] [HOST ] 151.766089 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 151.766302 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 151.766455 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 151.767583 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 151.768041 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 151.768559 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 151.769108 s: GRPXSRC: Create in progress !!! [HOST] [IPU2 ] 153.345299 s: GRPXSRC: Create Done !!! [HOST] [IPU2 ] 153.345818 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 153.346306 s: DISPLAY: Create Done !!! [HOST] [IPU2 ] 153.350545 s: *** UTILS: CPU KHz = 20000 Khz *** [HOST] [DSP1 ] 153.447020 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP1 ] 153.447050 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 153.447081 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [DSP2 ] 153.447294 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP2 ] 153.447325 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 153.447386 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) [HOST] [EVE1 ] 153.447843 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE1 ] 153.448148 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 153.448697 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE2 ] 153.449734 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE2 ] 153.450039 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 153.450588 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE3 ] 153.451625 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 153.451930 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 153.452479 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [EVE4 ] 153.453486 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 153.453791 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 153.454431 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) [HOST] [IPU2 ] 153.455255 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 153.455407 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248392 B (242 KB) [HOST] [IPU2 ] 153.455560 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 153.455743 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 216524800 B (206 MB) [HOST] [IPU2 ] 153.455956 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 153.456383 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 153.456902 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 153.457756 s: src/bsp_deviceI2c.c @ Line 765: [HOST] [IPU2 ] 153.457878 s: I2C1: DEV 0x30: RD 0x300a ... ERROR !!! [HOST] [IPU2 ] 153.457969 s: src/bsp_deviceI2c.c @ Line 836: [HOST] [IPU2 ] 153.458061 s: I2C1: Error timeout 1 ms!!! [HOST] [IPU2 ] 153.458427 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 153.458518 s: Assertion @ Line: 480 in /home/htf/android/ti/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +Hi shuai wang, For Single Cam Capture Display UC, You can connect camera to P1 of vision daughter board, no need to use LVDS setup In the picture above, I can see camera is connected to cam1 of LVDS Please refer below image to locate cam6 port of the multides board Regards Suryamani Jena + +Hi Suryamani Jena i change to cam 6 result is same! BEST WISHES! shuai _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# source vision_sdk_load.sh [ 41.388521] DMA: Module install successful, device major num = 243 [ 41.395006] DRV: Module install successful [ 41.418407] CMEMK module: reference Linux version 4.4.84 [ 41.426760] cmemk initialized ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# ./apps.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb69bd000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6fbd000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6efd000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6f3d000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6cfd000 of size 0x00200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 52.972610 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 52.972701 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 52.972701 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 52.974074 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 52.974104 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 52.974135 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 52.974165 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 52.975416 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 52.975446 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 52.975477 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 52.975477 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 52.976605 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 52.976605 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 52.976636 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 52.976666 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 52.976819 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 52.976819 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 52.976941 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 52.976971 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 52.976971 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 52.977093 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 52.977215 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 52.977337 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 52.977459 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 52.977551 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 52.977734 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 52.977917 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 52.978100 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 52.978252 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 52.978405 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 52.978618 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 52.978771 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 52.978923 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 52.979076 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 52.979259 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 52.979411 s: SGX3DSRV_0 : Init done - linkid-0x2000041 [HOST] [HOST ] 52.979930 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 52.980113 s: ALGORITHM_1 : Init done - linkid-0x2000032 [ 46.647902] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [HOST] [HOST ] 52.980448 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 52.980601 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 52.980753 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 52.980936 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 52.981058 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 52.981272 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 52.981486 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 52.981699 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 52.981913 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 52.982126 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 52.982309 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 52.982462 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 52.982645 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 52.982797 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 52.982980 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 52.983133 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 52.983285 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 52.983468 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 52.983651 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 52.983804 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 52.983987 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 52.984109 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 52.984231 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 52.984322 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 52.984444 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 52.984566 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 52.984688 s: SGX3DSFM_0 : Init done - linkid-0x2000042 [HOST] [HOST ] 52.984688 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 52.986061 s: OSA: Adjusting global time, timeH by 0 units!!! VX_ZONE_INIT:Enabled VX_ZONE_ERROR:Enabled VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 15.304733 s: ***** DSP1 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP1 ] 15.304794 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 15.305038 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 15.305282 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 15.305313 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 15.305343 s: SYSTEM: Attaching omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) t o [IPU2] ... [HOST] [DSP1 ] 15.848166 s: SYSTEM: Attahing to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 15.853169 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 15.873147 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 15.893125 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 15.913164 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 15.933142 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 15.933172 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 15.933233 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 15.933264 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 15.933325 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 15.933355 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 15.933416 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 15.933447 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 15.933630 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 15.933721 s: RpmsgInit in progress... [HOST] [DSP1 ] 15.933752 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 15.933965 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 15.934636 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP1 ] 15.934697 s: VX_ZONE_INIT:Enabled [HOST] [DSP1 ] 15.934728 s: VX_ZONE_ERROR:Enabled [HOST] [DSP1 ] 15.934758 s: VX_ZONE_WARNING:Enabled [HOST] [DSP1 ] 15.935124 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP1 ] 15.935460 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP1 ] 15.935490 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP1 ] 15.935490 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 15.935521 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 15.935765 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 15.935795 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 15.935826 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP1 ] 15.935887 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 15.944671 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 15.944732 s: lz4CompDecomp Init [HOST] [DSP1 ] 15.944732 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 16.276977 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 16.277008 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 15.467638 s: ***** DSP2 Firmware build time 21:06:00 Apr 2 2018 [HOST] [DSP2 ] 15.467730 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 15.467974 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 15.468218 s: UTILS: CIO: Init Done !!! [HOST] [DSP2 ] 15.468248 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 15.468248 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 15.851308 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 15.853169 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 15.883029 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 15.903037 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 15.923046 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 15.943054 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 15.943115 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 15.943146 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 15.943207 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 15.943268 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 15.943298 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 15.943359 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 15.943390 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 15.943573 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 15.943664 s: RpmsgInit in progress... [HOST] [DSP2 ] 15.943725 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP2 ] 15.943939 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 15.944610 s: SYSTEM: Initializing TIOVX ... [HOST] [DSP2 ] 15.944671 s: VX_ZONE_INIT:Enabled [HOST] [DSP2 ] 15.944702 s: VX_ZONE_ERROR:Enabled [HOST] [DSP2 ] 15.944732 s: VX_ZONE_WARNING:Enabled [HOST] [DSP2 ] 15.945098 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! [HOST] [DSP2 ] 15.945434 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [DSP2 ] 15.945464 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [DSP2 ] 15.945495 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 15.945495 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 15.945739 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 15.945769 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 15.945830 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516176 B (504 KB) [HOST] [DSP2 ] 15.945861 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 15.954736 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 15.954767 s: lz4CompDecomp Init [HOST] [DSP2 ] 15.954797 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 16.278991 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 16.279021 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 15.846580 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE1 ] 15.848319 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 15.851735 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 15.853870 s: UTILS: CIO: Init Done !!! [HOST] [EVE1 ] 15.854816 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 15.855761 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 15.863447 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 15.873147 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 15.883029 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 15.923198 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 15.953181 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 15.973189 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 15.974287 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 15.975568 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 15.976819 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 15.978039 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 15.979259 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 15.980509 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 15.981760 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 15.983499 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 15.984353 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 15.996919 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE1 ] 15.998352 s: VX_ZONE_INIT:Enabled [HOST] [EVE1 ] 15.999725 s: VX_ZONE_ERROR:Enabled [HOST] [EVE1 ] 16.001128 s: VX_ZONE_WARNING:Enabled [HOST] [EVE1 ] 16.004636 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE1 ] 16.005642 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE1 ] 16.006496 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 16.007350 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 16.008631 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 16.009699 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 16.010797 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 16.012962 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE1 ] 16.015036 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 16.099219 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 16.100195 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 15.846824 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE2 ] 15.848593 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 15.851918 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 15.854114 s: UTILS: CIO: Init Done !!! [HOST] [EVE2 ] 15.855060 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 15.856036 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 15.883486 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 15.893125 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 15.903037 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 15.923198 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 15.973037 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 15.993045 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 15.994082 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 15.995394 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 15.996675 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 15.997956 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 15.999237 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 16.000488 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 16.001677 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 16.003477 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 16.004300 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 16.017080 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE2 ] 16.018544 s: VX_ZONE_INIT:Enabled [HOST] [EVE2 ] 16.019917 s: VX_ZONE_ERROR:Enabled [HOST] [EVE2 ] 16.021350 s: VX_ZONE_WARNING:Enabled [HOST] [EVE2 ] 16.025193 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE2 ] 16.026230 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE2 ] 16.027176 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 16.028060 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 16.029433 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 16.030561 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 16.031751 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 16.033916 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE2 ] 16.035960 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 16.120142 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 16.121149 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 15.846672 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE3 ] 15.848441 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 15.851888 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 15.854053 s: UTILS: CIO: Init Done !!! [HOST] [EVE3 ] 15.855029 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 15.856005 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 15.903464 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 15.913164 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 15.923046 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 15.953181 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 15.973037 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 16.013023 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 16.014060 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 16.015402 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 16.016714 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 16.018086 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 16.019429 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 16.020740 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 16.022113 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 16.024065 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 16.024919 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 16.037851 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE3 ] 16.039315 s: VX_ZONE_INIT:Enabled [HOST] [EVE3 ] 16.040718 s: VX_ZONE_ERROR:Enabled [HOST] [EVE3 ] 16.042274 s: VX_ZONE_WARNING:Enabled [HOST] [EVE3 ] 16.045964 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE3 ] 16.047001 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE3 ] 16.047947 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 16.048862 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 16.050265 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 16.051393 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 16.052674 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 16.054870 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE3 ] 16.056914 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 16.138839 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 16.139815 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 15.846824 s: ***** EVE Firmware build time 21:04:54 Apr 2 2018 [HOST] [EVE4 ] 15.848593 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 15.851888 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 15.854084 s: UTILS: CIO: Init Done !!! [HOST] [EVE4 ] 15.855029 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 15.856005 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 15.923503 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 15.933142 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 15.943054 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 15.973189 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 15.993045 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 16.013023 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 16.014060 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 16.015372 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 16.016714 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 16.018056 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 16.019368 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 16.020679 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 16.022052 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 16.024095 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 16.024980 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 16.037912 s: SYSTEM: Initializing TIOVX ... [HOST] [EVE4 ] 16.039376 s: VX_ZONE_INIT:Enabled [HOST] [EVE4 ] 16.040779 s: VX_ZONE_ERROR:Enabled [HOST] [EVE4 ] 16.042335 s: VX_ZONE_WARNING:Enabled [HOST] [EVE4 ] 16.046056 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [EVE4 ] 16.047093 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [EVE4 ] 16.048038 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 16.048984 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 16.050356 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 16.051485 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 16.052766 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 16.054931 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254280 B (248 KB) [HOST] [EVE4 ] 16.057006 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 16.138870 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 16.139876 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 15.736930 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 15.768254 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 15.799579 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 15.830750 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 15.830872 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.830964 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.831025 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.831116 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 15.831177 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 15.831330 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 15.834441 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 15.845482 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 15.845635 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 15.845726 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 15.848166 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 15.851308 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 15.863447 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 15.883486 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.903464 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 15.923503 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 15.923595 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 15.923747 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 15.923900 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 15.924022 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 15.924144 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 15.924266 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 15.924388 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 15.926127 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 15.927072 s: RpmsgInit in progress... [HOST] [IPU2 ] 15.927133 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 15.927743 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 15.932898 s: SYSTEM: Initializing TIOVX ... [HOST] [IPU2 ] 15.933081 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 15.933203 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 15.933325 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 15.936985 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 15.937107 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [IPU2 ] 15.937168 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 15.937229 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 15.937290 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 15.937381 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 15.937442 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 15.937686 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 15.937747 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 15.937930 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 15.937991 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 15.938052 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 15.941163 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.941285 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.941377 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 15.941468 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.941560 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.941651 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.942017 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.942109 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.942200 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 15.942322 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.942383 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.942475 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.942871 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.942963 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.943024 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 15.943146 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.943237 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.943298 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.943664 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.943786 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 15.943878 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 15.943969 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.944061 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.944122 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.004300 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 16.005215 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 16.005459 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 16.005581 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) [HOST] [IPU2 ] 16.005734 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 16.005947 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) [HOST] [IPU2 ] 16.006161 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 16.006313 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 16.269535 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 16.351979 s: CHAINS: Application Started !!! [HOST] [IPU2 ] 16.362227 s: BOARD: Board Init in progress !!! [HOST] [IPU2 ] 16.362715 s: BOARD: Board Init Done !!! [HOST] [IPU2 ] 16.368358 s: Initializing Multi-Deserializer Setup ...!! [HOST] [IPU2 ] 16.369791 s: MultiDes Board Init Done [HOST] [IPU2 ] 16.369852 s: [HOST] [HOST ] 53.338223 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 53.338345 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 53.338437 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST] [HOST ] 54.089184 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 60.160464 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 60.160464 s: [HOST] [HOST ] 60.160495 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 60.160495 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 60.160495 s: 1 [HOST] [HOST ] 61.944580 s: [HOST] [HOST ] [HOST] [HOST ] ================ [HOST] [HOST ] Display Settings [HOST] [HOST ] ================ [HOST] [HOST ] [HOST] [HOST ] 1: LCD 10-inch 1280x720@60fps [HOST] [HOST ] 2: HDMI 1080P60 [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 61.944580 s: 2 [HOST] [HOST ] 64.400689 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] s [HOST] [HOST ] 67.016805 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 67.016805 s: [HOST] [HOST ] 67.016805 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 67.016805 s: [HOST] [HOST ] [HOST] [HOST ] =============== [HOST] [HOST ] System Settings [HOST] [HOST ] =============== [HOST] [HOST ] [HOST] [HOST ] 1: Display Settings [HOST] [HOST ] 2: Capture Settings [HOST] [HOST ] 3: Calibration Settings [HOST] [HOST ] 4: ISS Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 67.016836 s: 2 [HOST] [HOST ] 72.848929 s: [HOST] [HOST ] [HOST] [HOST ] ============== [HOST] [HOST ] Capture Source [HOST] [HOST ] ============== [HOST] [HOST ] [HOST] [HOST ] 1: OV10635 Sensor 720P30 [HOST] [HOST ] 2: HDMI Capture 1080P60 [HOST] [HOST ] 3: OV10640 CSI2 Sensor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 4: OV10640 IMI Sennsor 1280x720 (Only on TDA3xx/TDA2px) [HOST] [HOST ] 5: OV2775 CSI2 Sensor (Only on TDA3xx/TDA2px) [HOST] [HOST ] 6: D3 IMX390 CSI2 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] 7: OV2775 TIDA1130 Sensor on Fusion Platform (Only on TDA2px) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 72.848959 s: 1 [HOST] [HOST ] 75.137345 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 79.553162 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 79.553193 s: [HOST] [HOST ] 79.553193 s: Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 79.553193 s: [HOST] [HOST ] [HOST] [HOST ] Single Camera Usecases [HOST] [HOST ] ------------------------ [HOST] [HOST ] 1: 1CH VIP capture + SGX Copy + DISPLAY [HOST] [HOST ] 2: 1CH VIP capture + Encode + Decode + SGX Copy + DISPLAY [HOST] [HOST ] 3: 1CH VIP capture + Alg FrameCopy (EVE1) + SGX Copy + DISPLAY - (TDA2xx ONLY) [HOST] [HOST ] 5: NullSrc + Decode + Display (Only 1920x1080 H264/MJPEG Video Input Bit-Stream Supported) [HOST] [HOST ] 6: 1CH VIP capture + Alg Frame Copy (A15) + SGX Copy + DISPLAY [HOST] [HOST ] 7: 1CH VIP + Alg Frame Copy (A15) + Connetor Links (Dup, Merge, Select, Gate on A15) + SGX Copy + DISPLAY [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 2 [HOST] [HOST ] 83.049106 s: [HOST] [HOST ] 83.049106 s: [HOST] [HOST ] [HOST] [HOST ] ========================================= [HOST] [HOST ] Chains Run-time Codec Type Selection Menu [HOST] [HOST ] ========================================= [HOST] [HOST ] [HOST] [HOST ] Enter '0' for MJPEG [HOST] [HOST ] [HOST] [HOST ] Enter '1' for H.264 [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [IPU2 ] 89.921734 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 89.922283 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 89.923168 s: src/bsp_deviceI2c.c @ Line 765: [HOST] [IPU2 ] 89.923259 s: I2C1: DEV 0x30: RD 0x300a ... ERROR !!! [HOST] [IPU2 ] 89.923351 s: src/bsp_deviceI2c.c @ Line 836: [HOST] [IPU2 ] 89.923442 s: I2C1: Error timeout 1 ms!!! [HOST] [IPU2 ] 89.923869 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 89.923961 s: Assertion @ Line: 480 in /home/htf/android/ti/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! ^A + +Hi Shuai, Could you please try running UC by connecting camera to P1 port (Omnivision camera) of vision daughter board & confirm it is working ? & remember to change the video config switch to 01010101 Regards Suryamani Jena + +Hi Suryamani Jena yes it work ,but use LVDS is fail ! Regards shuai + +Hi Suryamani Jena thank you running UC by connecting camera to P1 port (Omnivision camera) of vision daughter board switch to 01010101 this is ok! and this is a new borad, i have to confirm LVDS Multi Camera is work, Can you give me some advice！ BESTWISHES SHUAI + +Hi Shuai, If you have 4 cameras , you can connect them to LVDS board &then run single UC to see if camera is capturing image or not otherwise run multicam UC (4ch capture + Mosaic + display) to see all cameras are capturing images or not Remember to keep switch setting as 00100101 Regards Suryamani Jena + +thank you Suryamani Jena, let me try, and use cam 6 5 4 3? + +Hi Suryamani Jena connect 4 cam (1 2 3 4 done i test 1235and 1236failed) run mul cameras usecase ,run silgle cameras usecase failed BESTWISHES SHUAI + +Hi Shuai, Could you please share the logs for below setup ? Is it still I2C error ? Setup: Connect cameras to 1,2,3,4 of LVDS setup Video config switch setting - 00100101 Run multicam UC Regards Suryamani Jena + +Hi Suryamani Jena Connect cameras to 1,2,3,4 of LVDS setup Video config switch setting - 00100101 Run multicam UC It's a success. but cannot run single UC, so i think the problem is solved BESTWISHES! SHUAI + diff --git a/data2/text/range/30001+/681836.txt b/data2/text/range/30001+/681836.txt new file mode 100644 index 0000000000000000000000000000000000000000..88626f2be10ca77a9a11e96b292e692ce6b039b3 --- /dev/null +++ b/data2/text/range/30001+/681836.txt @@ -0,0 +1,817 @@ +Ticket Name: Linux/TDA2: Ethernet daisy chain issue + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PCF8575, PMP, DRA752, TPD12S015, TLV320AIC3106, DS90UH925Q, WL1835 Tool/software: Linux Dear TI forum, we have some issue regarding the development of ethernet daisy chain. We are trying to connect 2 TDA2xx SoCs that are located on our custom-made board, using linux. Eth0 of SoC1 runs directly to the phy and this is working fine. We can ping our PC and send data packets. However, the RGMII connection between our 2 SoCs is direct, meaning, there is no PHY between them. This connection goes from eth1 of SoC1 to the eth0 of SoC2. As we have seen, this is something that should be done using fixed-link connection. Is this right? How can we fix this issue and make this daisy chain? Our device tree for these SoCs looks like this (we are using different builds on 2 SD cards for them): SoC1 dts: &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 1000 0 0>; phy-mode = "rgmii-id"; }; ///////////////////////////////////////////////////////////////////////////////// SoC2 dts: &cpsw_emac0 { fixed-link = <0 1 1000 0 0>; phy-mode = "rgmii-id"; }; /*For testing only, this SoC has no phy*/ &cpsw_emac1 { phy_id = <&davinci_mdio>, <7>;/*2*/ phy-mode = "rgmii-id";/*rgmii*/ dual_emac_res_vlan = <1>; }; ///////////////////////////////////////////////////////////////////////////////// SoC1 log: =~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2018.04.18 14:36:46 =~=~=~=~=~=~=~=~=~=~=~= U-Boot SPL 2016.05 (Apr 11 2018 - 18:26:37) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05 (Apr 11 2018 - 18:26:37 +0200) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1.5 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Warning: fastboot.board_rev: unknown board revision Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:189/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 2 1 0 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 163 bytes read in 2 ms (79.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 3552360 bytes read in 178 ms (19 MiB/s) 106863 bytes read in 24 ms (4.2 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x363468 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff16e ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (root@rtrkn096-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #12 SMP PREEMPT Fri Apr 13 17:46:06 CEST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=5d173897-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410840K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364328K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) [ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000326] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000334] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000763] Console: colour dummy device 80x30 [ 0.000784] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000797] pid_max: default: 32768 minimum: 301 [ 0.000894] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000904] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001441] Initializing cgroup subsys io [ 0.001457] Initializing cgroup subsys memory [ 0.001482] Initializing cgroup subsys devices [ 0.001494] Initializing cgroup subsys freezer [ 0.001505] Initializing cgroup subsys perf_event [ 0.001516] Initializing cgroup subsys pids [ 0.001543] CPU: Testing write buffer coherency: ok [ 0.001742] /cpus/cpu@0 missing clock-frequency property [ 0.001758] /cpus/cpu@1 missing clock-frequency property [ 0.001769] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001801] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080066] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080135] Brought up 2 CPUs [ 0.080147] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080154] CPU: All CPU(s) started in HYP mode. [ 0.080160] CPU: Virtualization extensions available. [ 0.080536] devtmpfs: initialized [ 0.109027] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110005] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313610] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313630] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317859] pinctrl core: initialized pinctrl subsystem [ 0.318714] NET: Registered protocol family 16 [ 0.319642] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350237] cpuidle: using governor ladder [ 0.380265] cpuidle: using governor menu [ 0.388700] OMAP GPIO hardware version 0.1 [ 0.392643] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe [ 0.392658] [ 0.392658] [ 0.394580] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.410591] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.410604] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.419811] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.419822] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.420280] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.420289] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.420885] OMAP DMA hardware revision 0.0 [ 0.461515] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462669] edma 43300000.edma: memcpy is disabled [ 0.467278] edma 43300000.edma: TI EDMA DMA engine driver [ 0.467937] [ 0.467937] [ 0.471668] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471846] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472005] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472170] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472459] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472645] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475648] palmas 0-0058: IRQ missing: skipping irq request [ 0.491093] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.552900] [ 0.552900] [ 0.553232] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.553633] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.553837] media: Linux media interface: v0.10 [ 0.553889] Linux video capture interface: v2.00 [ 0.553928] pps_core: LinuxPPS API ver. 1 registered [ 0.553936] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.553959] PTP clock support registered [ 0.554009] EDAC MC: Ver: 3.0.0 [ 0.554750] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.555048] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.555377] Advanced Linux Sound Architecture Driver Initialized. [ 0.556217] clocksource: Switched to clocksource arch_sys_counter [ 0.566697] NET: Registered protocol family 2 [ 0.567196] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.567259] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.567384] TCP: Hash tables configured (established 8192 bind 8192) [ 0.567430] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.567460] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.567670] NET: Registered protocol family 1 [ 0.567930] RPC: Registered named UNIX socket transport module. [ 0.567939] RPC: Registered udp transport module. [ 0.567945] RPC: Registered tcp transport module. [ 0.567951] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.568946] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.578907] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.579559] NFS: Registering the id_resolver key type [ 0.579584] Key type id_resolver registered [ 0.579592] Key type id_legacy registered [ 0.579653] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.580912] bounce: pool size: 64 pages [ 0.581063] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.581077] io scheduler noop registered [ 0.581089] io scheduler deadline registered [ 0.581125] io scheduler cfq registered (default) [ 0.586008] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.589236] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.589248] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.589281] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.589303] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.619455] dra7-pcie 51000000.pcie_rc: link is not up [ 0.619631] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.619644] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.619655] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.619665] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.620075] PCI: bus0: Fast back to back transfers disabled [ 0.620197] PCI: bus1: Fast back to back transfers enabled [ 0.620282] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.620297] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.620309] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.620528] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.680332] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.683708] console [ttyS0] disabled [ 0.683762] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 [ 1.729833] console [ttyS0] enabled [ 1.734226] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 [ 1.743922] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 [ 1.753960] [drm] Initialized drm 1.1.0 20060810 [ 1.760001] OMAP DSS rev 6.1 [ 1.763745] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.779520] loop: module loaded [ 1.783040] vmemexp device MAJOR num = 246 [ 1.787193] vmemexp class registered [ 1.790905] /dev/vmemexp device registered [ 1.795020] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.800705] nand: No NAND device found [ 1.804476] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.811503] [ 1.823577] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.829173] 7 ofpart partitions found on MTD device spi32766.0 [ 1.835032] Creating 7 MTD partitions on "spi32766.0": [ 1.840209] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.846354] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.852677] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.859622] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.866317] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.873699] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.880068] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.887856] libphy: Fixed MDIO Bus: probed [ 1.894057] [ 1.904192] cpsw 48484000.ethernet: Missing dual_emac_res_vlan in DT. [ 1.910886] cpsw 48484000.ethernet: Using 2 as Reserved VLAN for 1 slave [ 1.917657] cpsw 48484000.ethernet: Detected MACID = c8:fd:19:ba:83:8a [ 1.924310] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.931309] cpsw 48484000.ethernet: cpsw: Detected MACID = c8:fd:19:ba:83:8b [ 1.939957] mousedev: PS/2 mouse device common for all mice [ 1.946126] i2c /dev entries driver [ 1.954924] [ 1.964648] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.971257] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.977833] evm_3v3_sw: supplied by sysen1 [ 2.146712] [ 2.156279] ledtrig-cpu: registered to indicate activity on CPUs [ 2.164877] aic_dvdd: supplied by evm_3v3_sw [ 2.169835] [ 2.180007] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.187665] NET: Registered protocol family 10 [ 2.202985] sit: IPv6 over IPv4 tunneling driver [ 2.208224] NET: Registered protocol family 17 [ 2.212898] Key type dns_resolver registered [ 2.217312] omap_voltage_late_init: Voltage driver support not added [ 2.224195] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.230418] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.237118] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.243325] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.251548] Power Management for TI OMAP4+ devices. [ 2.256643] Registering SWP/SWPB emulation handler [ 2.263519] dmm 4e000000.dmm: initialized all PAT entries [ 2.270861] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.277541] [drm] No driver support for vblank timestamp query. [ 2.283843] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.300563] [ 2.316498] pcf857x: probe of 0-0020 failed with error -121 [ 2.322269] [ 2.331632] pcf857x: probe of 0-0021 failed with error -121 [ 2.337413] [ 2.396233] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.402530] davinci_mdio 48485000.mdio: detected phy mask ffffff7f [ 2.420572] libphy: 48485000.mdio: probed [ 2.424599] davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 [ 2.433795] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.476518] [ 2.486905] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.495968] [ 2.514164] [ 2.526191] hctosys: unable to open rtc device (rtc0) [ 2.539318] evm_1v8: disabling [ 2.542390] aic_dvdd: disabling [ 2.545715] ldousb: disabling [ 2.549105] ALSA device list: [ 2.552082] #0: DRA7xx-EVM [ 2.555612] Waiting for root device PARTUUID=5d173897-02... [ 3.103304] mmc2: host does not support reading read-only switch, assuming write-enable [ 3.113263] mmc2: new high speed SDHC card at address 59b4 [ 3.129127] mmcblk0: mmc2:59b4 USD 7.36 GiB [ 3.134357] mmcblk0: p1 p2 [ 3.137706] [ 3.216974] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 3.225676] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 3.626462] EXT4-fs (mmcblk0p2): recovery complete [ 3.639842] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 3.648010] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 3.660148] devtmpfs: mounted [ 3.663317] Freeing unused kernel memory: 340K [ 3.667794] This architecture does not have kernel memory protection. [ 3.895808] systemd[1]: System time before build time, advancing clock. [ 3.952655] random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) [ 3.965663] random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) [ 3.977447] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 3.995939] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 4.017078] systemd[1]: Set hostname to . [ 4.078966] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 4.089082] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 4.099779] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 4.137761] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) [ 4.150169] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) [ 4.244471] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.254007] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.263980] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.608984] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 4.616864] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 4.624561] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 4.631855] systemd[1]: sysinit.target: Found dependency on sockets.target/start [ 4.639339] systemd[1]: sysinit.target: Found dependency on dbus.socket/start [ 4.646524] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 4.653955] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 4.663407] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 4.698804] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 4.717716] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.736543] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 4.757012] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.776408] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.796971] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.826517] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.846496] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 4.896634] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.929279] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.948714] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems...[ 4.960778] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) [ 4.991092] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 5.018509] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 5.046645] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 5.076512] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 5.096606] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 5.116527] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 5.146996] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 5.206399] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 5.226424] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.260772] systemd[1]: Starting Journal Service... Starting Journal Service... [ 5.286687] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 5.316488] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 5.336465] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 5.396446] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 5.432719] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 5.456502] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 5.476467] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 5.496607] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Remount Root and Kernel File Systems. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Setup Virtual Console. Starting Apply Kernel Variables... Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Create Static Device Nodes in /dev. [ 6.220513] systemd-journald[144]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started udev Coldplug all Devices. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. [ 6.715480] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 6.729457] remoteproc0: 55020000.ipu is available [ 6.734382] remoteproc0: Note: remoteproc is still under development and considered experimental. Starting Create Volatile Files and Directories...[ 6.751898] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Load/Save Random Seed.[ 6.780680] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 6.806326] remoteproc1: 40800000.dsp is available [ OK ] Started Create Volatile Files and Directories.[ 6.856937] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 6.905656] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [[;32m OK ]Found device /dev/ttyS0.[ 6.923465] [ 6.923609] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 6.923651] remoteproc2: 41000000.dsp is available [ 6.923654] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 6.923656] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 7.017680] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 tSarting Update UTMP about System Boot/Shutdown...[ 7.050479] taSrting Network Time Synchronization... [ 7.140519] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 7.195806] [[;32m OK ]Started Update UTMP about System Boot/Shutdow. [ 7.718502] remoteproc1: registered virtio0 (type 7) [ 7.884492] remoteproc0: registered virtio1 (type 7) [ 7.904694] [ 7.942371] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 7.950816] [ 7.996337] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ 8.003997] CAN device driver interface [ 8.009265] [ OK ] Started Network Time Synchronization. [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... [ 8.144428] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) [ 8.166598] [ 8.230816] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 8.237620] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 8.243702] [ OK ] Started Synchronize System and HW clocks. [ OK ] Reached target System Initialization. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ OK ] Listening on RPCbind Server Activation Socket. [ OK ] Started Daily Cleanup of Temporary Directories. [ 8.430885] SCSI subsystem initialized [ OK ] Reached target Timers. [ 8.597480] remoteproc2: registered virtio2 (type 7) [ OK ] Listening on dropbear.socket. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ 8.720844] [ OK ] Reached target Basic System. [ 8.735806] [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. Starting uim-sysfs.service... Starting Print notice about GPLv3 packages... Starting Login Service... Starting Telephony service... [ OK ] Started Kernel Logging Service. Starting TI MultiCore Tools Daemon... Starting Permit User Sessions... Starting Avahi mDNS/DNS-SD Stack... [ OK ] Started System Logging Service. [ OK ] Started D-Bus System Message Bus. [ 9.156867] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ 9.171015] [ 9.256611] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 9.264920] [ 9.274797] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 9.296679] [ 9.305959] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 9.347447] scsi host0: ahci [ 9.350676] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 [ 9.370736] [ OK ] Started Avahi mDNS/DNS-SD Stack. [ OK ] Started Telephony service. [ 9.716280] ata1: SATA link down (SStatus 0 SControl 300) Starting Network Service... Starting Save/Restore Sound Card State... [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 10.095824] Bluetooth: Core ver 2.21 [ 10.114822] net eth1: initializing cpsw version 1.15 (0) [ 10.122973] NET: Registered protocol family 31 [ 10.130025] NET: Registered protocol family 15 [ OK ] Started Network Service. [ 10.149342] Bluetooth: HCI device and connection manager initialized [ 10.150406] net eth0: initialized cpsw ale version 1.4 [ 10.150410] net eth0: ALE Table size 1024 [ 10.153317] net eth1: phy found : id is : 0x0 [ 10.192439] [ 10.192439] [ 10.192439] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 10.222743] Bluetooth: HCI socket layer initialized [ 10.222752] Bluetooth: L2CAP socket layer initialized [ 10.222780] Bluetooth: SCO socket layer initialized [ 10.461206] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 10.588227] Initializing XFRM netlink socket [ 10.619032] remoteproc1: powering up 40800000.dsp [ 10.650212] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449540 [ 10.672449] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 10.678344] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 10.684321] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 10.710397] net eth0: initializing cpsw version 1.15 (0) [ 10.812547] remoteproc1: remote processor 40800000.dsp is now up [ 10.823564] net eth0: phy found : id is : 0x1410cc2 [ 10.834417] virtio_rpmsg_bus virtio0: rpmsg host is online [ 10.846563] [ 10.866609] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 10.899197] remoteproc0: powering up 55020000.ipu [ 10.908675] [ 10.978549] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507944 [ 10.999907] [ 11.012074] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ OK ] Started uim-sysfs.service. [ 11.039462] [ 11.050631] random: nonblocking pool is initialized [ 11.072338] [ 11.123154] remoteproc0: remote processor 55020000.ipu is now up [ 11.140997] virtio_rpmsg_bus virtio1: rpmsg host is online [ 11.157508] [ 11.167629] remoteproc2: powering up 41000000.dsp [ 11.173023] [ 11.190967] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449540 [ 11.201178] [ 11.212922] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 11.218988] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 11.224910] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 11.295746] remoteproc2: remote processor 41000000.dsp is now up [ 11.381496] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 11.391130] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 11.411799] virtio_rpmsg_bus virtio2: rpmsg host is online [ 11.417777] [ 11.429088] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 11.444317] [ 11.463343] NET: Registered protocol family 41 [ 11.482835] Starting rc.pvr.service... [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Network. Starting Network Name Resolution... Starting Lightning Fast Webserver With Light System Requirements... [ OK ] Reached target Sound Card. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Network Name Resolution. [ OK ] Started Login Service. [ 11.768290] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service.[ 12.146282] cpsw 48484000.ethernet eth1: Link is Up - 1Gbps/Full - flow control off [ 12.156138] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: + +Responses: +Hi Assuming the console log above is from SOC1 booting up. Can you also get dump of the following commands after the system has booted up # ifconfig -a #ethtool eth0 #ethtool eth1 When using RGMII, we have to take care adding skew(delay) between the clock and data information. It can be added at the transmitting side or by the receiver. It has to be added at either end but not both - the "phy-mode = "rgmii-id"" parameter affects this configuration. Need to review if by setting this on both sides, if the internal delay is enabled/disabled in a compatible manner You may also check by forcing the speed down to 100Mbps for the MAc-to_MAC connection instead + +Hi Stefan, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +I am sorry for the late response. I was on a sick leave... I have tried changing the speed to 100 and I have removed the delays on the receiving SoC2 side. However, this didnt solve my issue and link is still not being created. These are the current dts files and logs that you have asked for: SoC1: &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 100 0 0>; phy-mode = "rgmii-id"; }; SoC2: &cpsw_emac0 { fixed-link = <0 1 100 0 0>; /*phy-mode = "rgmii-id";*/ }; /*For testing only, this SoC has no phy*/ &cpsw_emac1 { phy_id = <&davinci_mdio>, <7>;/*2*/ phy-mode = "rgmii-id";/*rgmii*/ dual_emac_res_vlan = <1>; }; ***************************************************** SoC1: root@dra7xx-evm:~# ifconfig -a can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 NOARP MTU:16 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:10 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:70 eth0 Link encap:Ethernet HWaddr C8:FD:19:BA:83:8A inet addr:192.168.240.47 Bcast:192.168.240.255 Mask:255.255.255.0 inet6 addr: fe80::cafd:19ff:feba:838a%132400/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:206 errors:0 dropped:0 overruns:0 frame:0 TX packets:51 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:16240 (15.8 KiB) TX bytes:9254 (9.0 KiB) Interrupt:67 eth1 Link encap:Ethernet HWaddr C8:FD:19:BA:83:8B UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132400/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:166 errors:0 dropped:0 overruns:0 frame:0 TX packets:166 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:12688 (12.3 KiB) TX bytes:12688 (12.3 KiB) sit0 Link encap:IPv6-in-IPv4 NOARP MTU:1480 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) ................................................................ root@dra7xx-evm:~# ethtool eth0 Settings for eth0: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Supported pause frame use: No Supports auto-negotiation: Yes Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Advertised pause frame use: No Advertised auto-negotiation: Yes Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full Link partner advertised pause frame use: No Link partner advertised auto-negotiation: Yes Speed: 100Mb/s Duplex: Full Port: MII PHYAD: 7 Transceiver: external Auto-negotiation: on Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: yes ................................................................. root@dra7xx-evm:~# ethtool eth1 Settings for eth1: Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: no ****************************************************************** SoC2: root@dra7xx-evm:~# ifconfig -a can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 NOARP MTU:16 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:10 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:70 eth0 Link encap:Ethernet HWaddr C8:FD:19:BA:59:84 UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:67 eth1 Link encap:Ethernet HWaddr C8:FD:19:BA:59:85 UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132400/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:160 errors:0 dropped:0 overruns:0 frame:0 TX packets:160 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:12160 (11.8 KiB) TX bytes:12160 (11.8 KiB) sit0 Link encap:IPv6-in-IPv4 NOARP MTU:1480 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) .................................................................... root@dra7xx-evm:~# ethtool eth0 Settings for eth0: Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: no ******************** Could you please tell me how can I get this link to show up and run properly? Thank you for your response, Stefan. + +Hi you probably need to remove the internal delay settings for SOC1,emac1 as highlighted below SoC1: &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 100 0 0>; /*phy-mode = "rgmii-id"; */ }; If it still doesnt work, can you also attach the bootup logs for SOC1 and SOC2 after having made the changes along with ethtool outputs + +Deleting this internal delays causes the removal of the eth device also. Here are the logs. Please compare them to the logs from the posts above (without these changes). ethtool output for SOC2 is the same as before. SOC1: root@dra7xx-evm:~# ifconfig -a can0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 NOARP MTU:16 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:10 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:70 lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132976/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:160 errors:0 dropped:0 overruns:0 frame:0 TX packets:160 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:12160 (11.8 KiB) TX bytes:12160 (11.8 KiB) sit0 Link encap:IPv6-in-IPv4 NOARP MTU:1480 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) ***************************************************************************** SOC1 log: U-Boot SPL 2016.05 (May 16 2018 - 15:25:57) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05 (May 16 2018 - 15:25:57 +0200) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1.5 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Warning: fastboot.board_rev: unknown board revision Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:189/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 163 bytes read in 3 ms (52.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 3551920 bytes read in 190 ms (17.8 MiB/s) 106819 bytes read in 35 ms (2.9 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3632b0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff142 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (root@rtrkn096-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #15 SMP PREEMPT Wed May 16 15:27:01 CEST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=7859c59c-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410840K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364328K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) [ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000329] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000337] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000767] Console: colour dummy device 80x30 [ 0.000788] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000801] pid_max: default: 32768 minimum: 301 [ 0.000898] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000908] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001450] Initializing cgroup subsys io [ 0.001467] Initializing cgroup subsys memory [ 0.001491] Initializing cgroup subsys devices [ 0.001504] Initializing cgroup subsys freezer [ 0.001515] Initializing cgroup subsys perf_event [ 0.001526] Initializing cgroup subsys pids [ 0.001553] CPU: Testing write buffer coherency: ok [ 0.001750] /cpus/cpu@0 missing clock-frequency property [ 0.001767] /cpus/cpu@1 missing clock-frequency property [ 0.001777] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001811] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080065] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080133] Brought up 2 CPUs [ 0.080147] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080153] CPU: All CPU(s) started in HYP mode. [ 0.080159] CPU: Virtualization extensions available. [ 0.080538] devtmpfs: initialized [ 0.109156] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110136] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.312901] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.312921] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317154] pinctrl core: initialized pinctrl subsystem [ 0.318010] NET: Registered protocol family 16 [ 0.318928] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340221] cpuidle: using governor ladder [ 0.370249] cpuidle: using governor menu [ 0.378732] OMAP GPIO hardware version 0.1 [ 0.382684] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe [ 0.384614] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.400583] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.400597] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.409807] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.409817] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.410297] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.410307] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.410887] OMAP DMA hardware revision 0.0 [ 0.451509] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452678] edma 43300000.edma: memcpy is disabled [ 0.457336] edma 43300000.edma: TI EDMA DMA engine driver [ 0.461723] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.461908] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.462065] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.462223] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.462518] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.462702] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.465754] palmas 0-0058: IRQ missing: skipping irq request [ 0.481149] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.553316] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.553716] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.553917] media: Linux media interface: v0.10 [ 0.553969] Linux video capture interface: v2.00 [ 0.554009] pps_core: LinuxPPS API ver. 1 registered [ 0.554016] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.554040] PTP clock support registered [ 0.554089] EDAC MC: Ver: 3.0.0 [ 0.554833] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.555132] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.555463] Advanced Linux Sound Architecture Driver Initialized. [ 0.556289] clocksource: Switched to clocksource arch_sys_counter [ 0.566824] NET: Registered protocol family 2 [ 0.567317] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.567381] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.567506] TCP: Hash tables configured (established 8192 bind 8192) [ 0.567552] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.567583] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.567790] NET: Registered protocol family 1 [ 0.568055] RPC: Registered named UNIX socket transport module. [ 0.568064] RPC: Registered udp transport module. [ 0.568070] RPC: Registered tcp transport module. [ 0.568076] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.569066] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.579027] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.579677] NFS: Registering the id_resolver key type [ 0.579703] Key type id_resolver registered [ 0.579711] Key type id_legacy registered [ 0.579772] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.581030] bounce: pool size: 64 pages [ 0.581176] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.581190] io scheduler noop registered [ 0.581202] io scheduler deadline registered [ 0.581234] io scheduler cfq registered (default) [ 0.586101] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.589323] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.589335] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.589368] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.589388] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.619563] dra7-pcie 51000000.pcie_rc: link is not up [ 0.619738] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.619751] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.619761] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.619771] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.620180] PCI: bus0: Fast back to back transfers disabled [ 0.620300] PCI: bus1: Fast back to back transfers enabled [ 0.620384] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.620399] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.620412] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.620626] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.681070] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.684436] console [ttyS0] disabled [ 0.684488] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 [ 1.684224] console [ttyS0] enabled [ 1.688632] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 [ 1.698330] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 [ 1.708375] [drm] Initialized drm 1.1.0 20060810 [ 1.714383] OMAP DSS rev 6.1 [ 1.718170] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.733961] loop: module loaded [ 1.737508] vmemexp device MAJOR num = 246 [ 1.741637] vmemexp class registered [ 1.745352] /dev/vmemexp device registered [ 1.749485] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.755151] nand: No NAND device found [ 1.758942] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.768857] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.774254] 7 ofpart partitions found on MTD device spi32766.0 [ 1.780135] Creating 7 MTD partitions on "spi32766.0": [ 1.785297] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.791432] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.797777] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.804702] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.811397] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.818797] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.825138] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.832929] libphy: Fixed MDIO Bus: probed [ 1.840064] cpsw 48484000.ethernet: Missing or malformed slave[1] phy-mode property [ 1.847803] cpsw 48484000.ethernet: cpsw: platform data missing [ 1.854866] mousedev: PS/2 mouse device common for all mice [ 1.861067] i2c /dev entries driver [ 1.870374] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.876779] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.883313] evm_3v3_sw: supplied by sysen1 [ 2.057139] ledtrig-cpu: registered to indicate activity on CPUs [ 2.067245] aic_dvdd: supplied by evm_3v3_sw [ 2.073129] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.080636] NET: Registered protocol family 10 [ 2.095809] sit: IPv6 over IPv4 tunneling driver [ 2.101050] NET: Registered protocol family 17 [ 2.105730] Key type dns_resolver registered [ 2.110166] omap_voltage_late_init: Voltage driver support not added [ 2.117067] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.123275] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.129980] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.136188] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.144390] Power Management for TI OMAP4+ devices. [ 2.149484] Registering SWP/SWPB emulation handler [ 2.156320] dmm 4e000000.dmm: initialized all PAT entries [ 2.163645] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.170328] [drm] No driver support for vblank timestamp query. [ 2.176648] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.193598] pcf857x: probe of 0-0020 failed with error -121 [ 2.199387] pcf857x: probe of 0-0021 failed with error -121 [ 2.246311] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.252430] davinci_mdio 48485000.mdio: detected phy mask ffffff7f [ 2.260974] libphy: 48485000.mdio: probed [ 2.265001] davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 [ 2.274204] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.317759] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.327279] hctosys: unable to open rtc device (rtc0) [ 2.340527] evm_1v8: disabling [ 2.343598] aic_dvdd: disabling [ 2.346945] ldousb: disabling [ 2.350319] ALSA device list: [ 2.353297] #0: DRA7xx-EVM [ 2.356974] Waiting for root device PARTUUID=7859c59c-02... [ 2.993618] mmc2: host does not support reading read-only switch, assuming write-enable [ 3.003694] mmc2: new high speed SDHC card at address 59b4 [ 3.009526] mmcblk0: mmc2:59b4 USD 7.51 GiB [ 3.014928] mmcblk0: p1 p2 [ 3.127154] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 3.135843] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 4.090365] EXT4-fs (mmcblk0p2): recovery complete [ 4.098531] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 4.106742] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 4.116793] devtmpfs: mounted [ 4.119997] Freeing unused kernel memory: 340K [ 4.124458] This architecture does not have kernel memory protection. [ 4.322694] systemd[1]: System time before build time, advancing clock. [ 4.371571] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.384268] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.396002] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 4.415064] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 4.437317] systemd[1]: Set hostname to . [ 4.494953] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 4.537056] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 4.547291] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 4.547408] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 4.572577] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 4.681746] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 4.691287] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 4.701156] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 5.062116] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 5.069932] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 5.077660] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 5.084917] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 5.092368] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 5.101858] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 5.138915] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 5.166739] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 5.196540] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 5.217689] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 5.237036] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 5.296722] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 5.328804] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 5.361938] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 5.377799] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 5.407174] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 5.466539] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 5.496546] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.526631] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 5.586670] systemd[1]: Starting Journal Service... Starting Journal Service... [ 5.618578] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 5.639804] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) [ 5.657956] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 5.687138] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 5.716514] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 5.766681] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 5.786655] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 5.808599] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 5.836612] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 5.856506] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 5.876630] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 5.896672] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 5.950900] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 5.976562] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 5.996539] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 6.016708] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Setup Virtual Console. Starting udev Coldplug all Devices... Starting Apply Kernel Variables... Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Create Static Device Nodes in /dev. [ 6.672904] systemd-journald[125]: Received request to flush runtime journal from PID 1 Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started udev Coldplug all Devices. [ 7.002034] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 7.022351] remoteproc0: 55020000.ipu is available [ 7.040750] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 7.066755] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 7.106927] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 7.121850] remoteproc1: 40800000.dsp is available [ 7.140250] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 7.156398] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. Starting Load/Save Random Seed... [ 7.187684] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ OK ] Reached target Local File Systems. [ 7.221387] remoteproc2: 41000000.dsp is available Starting Create Volatile Files and Directories... [ 7.251693] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 7.270348] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Load/Save Random Seed. [ OK ] Found device /dev/ttyS0. [ 7.398230] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 7.529431] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 7.639027] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 7.899727] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 7.906381] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 7.956395] remoteproc1: registered virtio0 (type 7) [ 8.063587] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ OK ] Started Create Volatile Files and Directories. [ 8.236272] remoteproc0: registered virtio1 (type 7) Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ 8.333889] CAN device driver interface [ 8.478192] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) [ 8.590299] SCSI subsystem initialized [ 8.612683] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Reached target Sound Card. [ OK ] Started Network Time Synchronization. Starting Synchronize System and HW clocks... [ OK ] Reached target System Time Synchronized. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ 9.063851] remoteproc2: registered virtio2 (type 7) [ 9.091643] ahci 4a14000.sata: SSS flag set, parallel bus scan disabled [ OK ] Started Synchronize System and HW clocks. [ 9.108602] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ OK ] Reached target System Initialization. [ 9.139777] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 9.163085] scsi host0: ahci [ 9.169560] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Listening on RPCbind Server Activation Socket. [ OK ] Listening on dropbear.socket. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ OK ] Reached target Sockets. [ 9.394140] remoteproc1: powering up 40800000.dsp [ OK ] Reached target Basic System. [ 9.410245] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 [ 9.423853] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 9.429744] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 9.435698] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 9.462750] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 9.463241] remoteproc1: remote processor 40800000.dsp is now up [ 9.479615] virtio_rpmsg_bus virtio0: rpmsg host is online [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. [ 9.488328] remoteproc0: powering up 55020000.ipu Starting uim-sysfs.service... Starting TI MultiCore Tools Daemon... [ 9.526368] ata1: SATA link down (SStatus 0 SControl 300) [ 9.533704] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 [ OK ] Started System Logging Service.[ 9.551842] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 Starting Permit User Sessions... Starting Save/Restore Sound Card State... [ OK ] Started D-Bus System Message Bus. [ 9.645956] remoteproc0: remote processor 55020000.ipu is now up [ 9.659838] virtio_rpmsg_bus virtio1: rpmsg host is online [ 9.672921] remoteproc2: powering up 41000000.dsp [ 9.696447] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 [ 9.711632] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 9.717523] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 9.723472] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 9.760669] ------------[ cut here ]------------ [ 9.760714] remoteproc2: remote processor 41000000.dsp is now up [ 9.771436] WARNING: CPU: 0 PID: 624 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 9.780954] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access [ 9.793085] Modules linked in: virtio_rpmsg_bus(+) ahci_platform libahci_platform libahci libata pvrsrvkm(O) scsi_mod c_can_platform c_can can_dev rtc_omap extcon_usb_gpio dwc3_omap omap_aes_driver extcon omap_sham omap_rng rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 9.819866] CPU: 0 PID: 624 Comm: find Tainted: G O 4.4.84 #15 [ 9.826852] Hardware name: Generic DRA74X (Flattened Device Tree) [ 9.832966] Backtrace: [ 9.835433] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 9.843030] r7:c02de328 r6:20030193 r5:00000000 r4:c09497d0 [ 9.848739] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 9.855993] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 9.864114] r7:c02de328 r6:00000093 r5:00000009 r4:d8bb5b68 [ 9.869818] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 9.878548] r8:00000017 r7:c083c820 r6:00000002 r5:c083c458 r4:c083c4fc [ 9.885309] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 9.894213] r3:ef201240 r2:c083c4fc [ 9.897808] r4:80080003 [ 9.900358] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 9.909698] r10:c0978fcb r9:ef1ee300 r8:00000017 r7:00000000 r6:00000000 r5:ef1ee360 [ 9.917587] r4:ef201740 [ 9.920134] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 9.929038] r10:00000000 r9:00000000 r8:ef008000 r7:00000000 r6:c0931e44 r5:ef1ee360 [ 9.936929] r4:ef1ee300 [ 9.939476] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 9.948031] r7:00000000 r6:c0931e44 r5:ef1ee360 r4:ef1ee300 [ 9.953735] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 9.962377] r7:00000000 r6:00000000 r5:00000017 r4:c0926424 [ 9.968084] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 9.976818] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 9.985199] r9:00000000 r8:fa213000 r7:fa212000 r6:d8bb5d28 r5:fa21200c r4:c092c8ec [ 9.993004] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 10.000513] Exception stack(0xd8bb5d28 to 0xd8bb5d70) [ 10.005583] 5d20: 00000000 00000001 00000000 00000000 edb82160 00000001 [ 10.013792] 5d40: ee8e1190 d8bb5e38 2f2f2f2f 00000000 00000000 d8bb5d94 d8bb5d78 d8bb5d78 [ 10.021999] 5d60: c0181918 c0181918 60030013 ffffffff [ 10.027065] r9:00000000 r8:2f2f2f2f r7:d8bb5d5c r6:ffffffff r5:60030013 r4:c0181918 [ 10.034878] [] (kernfs_iop_permission) from [] (__inode_permission+0x84/0xd8) [ 10.043783] r7:d8bb5e38 r6:00000001 r5:80808080 r4:edb82160 [ 10.049491] [] (__inode_permission) from [] (inode_permission+0x18/0x4c) [ 10.057960] r7:d8bb5e38 r6:fefefeff r5:80808080 r4:d8854032 [ 10.063665] [] (inode_permission) from [] (link_path_walk+0x6c/0x4e4) [ 10.071874] [] (link_path_walk) from [] (path_lookupat+0x88/0x10c) [ 10.079819] r10:00000000 r9:00000000 r8:d8bb5f10 r7:00000000 r6:d8bb5f10 r5:d8854000 [ 10.087708] r4:d8bb5e38 [ 10.090254] [] (path_lookupat) from [] (filename_lookup+0x98/0xf4) [ 10.098200] r7:00000000 r6:d8bb5e38 r5:d8854000 r4:00000000 [ 10.103905] [] (filename_lookup) from [] (user_path_at_empty+0x4c/0x54) [ 10.112287] r8:d8bb5f40 r7:000c5040 r6:d8bb5f10 r5:ffffff9c r4:00000000 [ 10.119044] [] (user_path_at_empty) from [] (vfs_fstatat+0x54/0xa8) [ 10.127076] r6:ffffff9c r5:00000000 r4:bebeb810 [ 10.131727] [] (vfs_fstatat) from [] (SyS_lstat64+0x28/0x44) [ 10.139148] r9:d8bb4000 r8:c000fc84 r7:000000c4 r6:00087bf8 r5:000c5040 r4:bebeb810 [ 10.146958] [] (SyS_lstat64) from [] (ret_fast_syscall+0x0/0x34) [ 10.154728] r4:00000001 [ 10.157274] ---[ end trace 0dd57119339af199 ]--- [ 10.161993] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 10.173226] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 10.182466] virtio_rpmsg_bus virtio2: rpmsg host is online [ 10.189394] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 10.222315] NET: Registered protocol family 41 Starting Network Service... [ 10.297086] NET: Registered protocol family 15 Starting Telephony service... Starting Print notice about GPLv3 packages... [ OK ] Started Kernel Logging Service. Starting Login Service... Starting Avahi mDNS/DNS-SD Stack... [ OK ] Started Network Service. [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 10.847732] Bluetooth: Core ver 2.21 [ 10.851375] NET: Registered protocol family 31 [ 10.857058] Initializing XFRM netlink socket [ 10.882502] Bluetooth: HCI device and connection manager initialized [ 10.902618] Bluetooth: HCI socket layer initialized [ 10.912666] Bluetooth: L2CAP socket layer initialized [ 10.923509] Bluetooth: SCO socket layer initialized [ OK ] Started uim-sysfs.service. [ OK ] Started Telephony service. [ OK ] Started Avahi mDNS/DNS-SD Stack. [ OK ] Started Login Service. Starting rc.pvr.service... [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Network Name Resolution.[ 11.461421] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ 11.554125] random: nonblocking pool is initialized [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started tiipclad-daemon.service. [ OK ] Started telnetd.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: ************************************************************************************** SOC2 log: U-Boot SPL 2016.05 (May 09 2018 - 14:42:55) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05 (May 09 2018 - 14:42:55 +0200) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1.5 GiB MMC: i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Warning: fastboot.board_rev: unknown board revision Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:189/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 163 bytes read in 2 ms (79.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 SD/MMC found on device 0 3552160 bytes read in 182 ms (18.6 MiB/s) 106832 bytes read in 19 ms (5.4 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3633a0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff14f ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (root@rtrkn096-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #4 SMP PREEMPT Tue May 8 10:30:12 CEST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=c1259a78-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410840K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364328K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) [ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000327] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000334] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000771] Console: colour dummy device 80x30 [ 0.000792] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000805] pid_max: default: 32768 minimum: 301 [ 0.000901] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000911] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001450] Initializing cgroup subsys io [ 0.001466] Initializing cgroup subsys memory [ 0.001491] Initializing cgroup subsys devices [ 0.001503] Initializing cgroup subsys freezer [ 0.001513] Initializing cgroup subsys perf_event [ 0.001525] Initializing cgroup subsys pids [ 0.001551] CPU: Testing write buffer coherency: ok [ 0.001748] /cpus/cpu@0 missing clock-frequency property [ 0.001765] /cpus/cpu@1 missing clock-frequency property [ 0.001775] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001807] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080066] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080135] Brought up 2 CPUs [ 0.080148] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080154] CPU: All CPU(s) started in HYP mode. [ 0.080160] CPU: Virtualization extensions available. [ 0.080539] devtmpfs: initialized [ 0.109266] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110235] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313025] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313047] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317274] pinctrl core: initialized pinctrl subsystem [ 0.318128] NET: Registered protocol family 16 [ 0.319052] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340220] cpuidle: using governor ladder [ 0.370243] cpuidle: using governor menu [ 0.378751] OMAP GPIO hardware version 0.1 [ 0.382714] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe [ 0.384658] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.400723] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.400736] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.409993] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.410003] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.410483] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.410493] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.411067] OMAP DMA hardware revision 0.0 [ 0.451628] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452780] edma 43300000.edma: memcpy is disabled [ 0.457429] edma 43300000.edma: TI EDMA DMA engine driver [ 0.461845] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.462022] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.462178] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.462343] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.462632] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.462816] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.465808] palmas 0-0058: IRQ missing: skipping irq request [ 0.481271] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.543402] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.543801] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.544004] media: Linux media interface: v0.10 [ 0.544057] Linux video capture interface: v2.00 [ 0.544096] pps_core: LinuxPPS API ver. 1 registered [ 0.544103] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.544126] PTP clock support registered [ 0.544174] EDAC MC: Ver: 3.0.0 [ 0.544918] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.545214] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.545544] Advanced Linux Sound Architecture Driver Initialized. [ 0.546379] clocksource: Switched to clocksource arch_sys_counter [ 0.556943] NET: Registered protocol family 2 [ 0.557441] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.557505] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.557629] TCP: Hash tables configured (established 8192 bind 8192) [ 0.557676] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.557706] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.557914] NET: Registered protocol family 1 [ 0.558181] RPC: Registered named UNIX socket transport module. [ 0.558189] RPC: Registered udp transport module. [ 0.558196] RPC: Registered tcp transport module. [ 0.558202] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.559198] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.569166] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.569815] NFS: Registering the id_resolver key type [ 0.569839] Key type id_resolver registered [ 0.569847] Key type id_legacy registered [ 0.569908] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.571172] bounce: pool size: 64 pages [ 0.571319] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.571332] io scheduler noop registered [ 0.571343] io scheduler deadline registered [ 0.571379] io scheduler cfq registered (default) [ 0.576269] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.579495] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.579508] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.579540] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.579561] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.609866] dra7-pcie 51000000.pcie_rc: link is not up [ 0.610041] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.610054] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.610064] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.610074] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.610489] PCI: bus0: Fast back to back transfers disabled [ 0.610610] PCI: bus1: Fast back to back transfers enabled [ 0.610693] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.610709] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.610721] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.610937] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.671054] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.674427] console [ttyS0] disabled [ 0.674479] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 [ 1.674070] console [ttyS0] enabled [ 1.678475] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 [ 1.688172] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 [ 1.698218] [drm] Initialized drm 1.1.0 20060810 [ 1.704223] OMAP DSS rev 6.1 [ 1.708012] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.723801] loop: module loaded [ 1.727348] vmemexp device MAJOR num = 246 [ 1.731479] vmemexp class registered [ 1.735193] /dev/vmemexp device registered [ 1.739327] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.745001] nand: No NAND device found [ 1.748791] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.758714] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.764109] 7 ofpart partitions found on MTD device spi32766.0 [ 1.769989] Creating 7 MTD partitions on "spi32766.0": [ 1.775151] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.781290] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.787633] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.794553] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.801252] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.808656] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.814997] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.822781] libphy: Fixed MDIO Bus: probed [ 1.829653] cpsw 48484000.ethernet: Detected MACID = c8:fd:19:ba:59:84 [ 1.836303] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.843276] cpsw 48484000.ethernet: cpsw: Detected MACID = c8:fd:19:ba:59:85 [ 1.851895] mousedev: PS/2 mouse device common for all mice [ 1.858181] i2c /dev entries driver [ 1.867457] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.873842] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.880392] evm_3v3_sw: supplied by sysen1 [ 2.037323] ledtrig-cpu: registered to indicate activity on CPUs [ 2.045755] aic_dvdd: supplied by evm_3v3_sw [ 2.051654] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.059121] NET: Registered protocol family 10 [ 2.074449] sit: IPv6 over IPv4 tunneling driver [ 2.079651] NET: Registered protocol family 17 [ 2.084334] Key type dns_resolver registered [ 2.088768] omap_voltage_late_init: Voltage driver support not added [ 2.095641] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.101862] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.108570] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.114779] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.122942] Power Management for TI OMAP4+ devices. [ 2.128021] Registering SWP/SWPB emulation handler [ 2.134863] dmm 4e000000.dmm: initialized all PAT entries [ 2.142231] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.148882] [drm] No driver support for vblank timestamp query. [ 2.155178] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.172166] pcf857x: probe of 0-0020 failed with error -121 [ 2.186554] pcf857x: probe of 0-0021 failed with error -121 [ 2.236386] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.242506] davinci_mdio 48485000.mdio: no live phy, scanning all [ 2.249809] davinci_mdio: probe of 48485000.mdio failed with error -5 [ 2.256744] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.297862] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.307375] hctosys: unable to open rtc device (rtc0) [ 2.320487] evm_1v8: disabling [ 2.323557] aic_dvdd: disabling [ 2.326890] ldousb: disabling [ 2.330270] ALSA device list: [ 2.333248] #0: DRA7xx-EVM [ 2.336795] Waiting for root device PARTUUID=c1259a78-02... [ 2.993456] mmc2: host does not support reading read-only switch, assuming write-enable [ 3.003406] mmc2: new high speed SDHC card at address 59b4 [ 3.019280] mmcblk0: mmc2:59b4 USD 7.36 GiB [ 3.024510] mmcblk0: p1 p2 [ 3.107130] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 3.115686] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 4.050366] EXT4-fs (mmcblk0p2): recovery complete [ 4.059944] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 4.068124] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 4.075695] devtmpfs: mounted [ 4.078918] Freeing unused kernel memory: 340K [ 4.083379] This architecture does not have kernel memory protection. [ 4.276484] systemd[1]: System time before build time, advancing clock. [ 4.318025] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 4.331036] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 4.342781] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 4.361279] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 4.387293] systemd[1]: Set hostname to . [ 4.455891] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 4.469645] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.481476] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 4.484983] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 4.486996] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 4.578452] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 4.587952] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 4.597824] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 4.937085] systemd[1]: basic.target: Found ordering cycle on basic.target/start [ 4.944523] systemd[1]: basic.target: Found dependency on sockets.target/start [ 4.951821] systemd[1]: basic.target: Found dependency on avahi-daemon.socket/start [ 4.959535] systemd[1]: basic.target: Found dependency on sysinit.target/start [ 4.966847] systemd[1]: basic.target: Found dependency on alignment.service/start [ 4.974363] systemd[1]: basic.target: Found dependency on basic.target/start [ 4.981465] systemd[1]: basic.target: Breaking ordering cycle by deleting job sockets.target/start [ 4.990481] systemd[1]: sockets.target: Job sockets.target/start deleted to break ordering cycle starting with basic.target/start [ SKIP ] Ordering cycle found, skipping Sockets [ 5.016795] systemd[1]: basic.target: Found ordering cycle on basic.target/start [ 5.024232] systemd[1]: basic.target: Found dependency on sysinit.target/start [ 5.031531] systemd[1]: basic.target: Found dependency on alignment.service/start [ 5.039071] systemd[1]: basic.target: Found dependency on basic.target/start [ 5.046155] systemd[1]: basic.target: Breaking ordering cycle by deleting job alignment.service/start [ 5.055439] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with basic.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 5.088989] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 5.116767] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 5.136572] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 5.156648] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 5.187045] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 5.216610] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 5.236748] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 5.257807] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 5.277187] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 5.296651] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 5.316627] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 5.337140] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 5.356721] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 5.376598] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.396670] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 5.456736] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 5.488979] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 5.546751] systemd[1]: Starting Journal Service... Starting Journal Service... [ 5.569817] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 5.590577] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 5.618787] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 5.648951] systemd[1]: Starting Setup Virtual Console... [ 5.654496] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) Starting Setup Virtual Console... [ 5.688806] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 5.707243] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 5.736595] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 5.790992] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 5.816651] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 5.836634] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 5.856926] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Setup Virtual Console. Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 6.500670] systemd-journald[121]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started udev Coldplug all Devices. [ 6.897911] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 6.916663] remoteproc0: 55020000.ipu is available [ 6.941517] remoteproc0: Note: remoteproc is still under development and considered experimental. [ OK ] Reached target Local File Systems. [ 6.979753] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 6.999160] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 Starting Create Volatile Files and Directories... [ 7.052435] remoteproc1: 40800000.dsp is available [ 7.070126] remoteproc1: Note: remoteproc is still under development and considered experimental. Starting Load/Save Random Seed... [ 7.135310] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Create Volatile Files and Directories. [ 7.159623] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 7.182665] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 7.193674] remoteproc2: 41000000.dsp is available [ 7.207886] remoteproc2: Note: remoteproc is still under development and considered experimental. [ OK ] Started Load/Save Random Seed. [ 7.234418] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 7.265831] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ OK ] Found device /dev/ttyS0. [ 7.370225] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ 7.536898] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ OK ] Started Network Time Synchronization.[ 7.548330] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 7.570703] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... [ 8.042034] remoteproc0: registered virtio0 (type 7) [ 8.062139] SCSI subsystem initialized [ OK ] Reached target Sound Card. [ 8.425799] CAN device driver interface [ 8.494622] remoteproc1: registered virtio1 (type 7) [ 8.568914] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) [ 8.606544] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ OK ] Started Synchronize System and HW clocks. [ OK ] Reached target System Initialization. [ OK ] Listening on RPCbind Server Activation Socket. [ 8.832262] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 8.840694] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 8.850847] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ OK ] Listening on D-Bus System Message Bus Socket. [ 8.894749] scsi host0: ahci [ 8.899266] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 [ 8.962415] remoteproc2: registered virtio2 (type 7) [ OK ] Listening on dropbear.socket. [ OK ] Reached target Basic System. Starting Login Service... Starting TI MultiCore Tools Daemon... Starting Print notice about GPLv3 packages... Starting Telephony service... [ OK ] Started System Logging Service. Starting Permit User Sessions... Starting Save/Restore Sound Card State...[ 9.256551] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. [ OK ] Started Kernel Logging Service. Starting uim-sysfs.service... [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. Starting Avahi mDNS/DNS-SD Stack... [ OK ] Started D-Bus System Message Bus. [ 9.752451] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Started Avahi mDNS/DNS-SD Stack. [ OK ] Started Telephony service. Starting Network Service... [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 9.973699] NET: Registered protocol family 15 [ 10.112216] Bluetooth: Core ver 2.21 [ 10.118099] NET: Registered protocol family 31 [ 10.125755] remoteproc0: powering up 55020000.ipu [ 10.132279] Bluetooth: HCI device and connection manager initialized [ 10.142798] Bluetooth: HCI socket layer initialized [ 10.154227] Bluetooth: L2CAP socket layer initialized [ 10.166446] Bluetooth: SCO socket layer initialized [ 10.188405] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 [ 10.204156] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 10.266589] net eth1: initializing cpsw version 1.15 (0) [ 10.276503] net eth0: initialized cpsw ale version 1.4 [ OK ] Started Network Service. [ 10.302246] net eth0: ALE Table size 1024 [ 10.325886] libphy: PHY 48485000.mdio:03 not found [ 10.335047] remoteproc0: remote processor 55020000.ipu is now up [ 10.341022] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 [ 10.354270] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 10.385279] virtio_rpmsg_bus virtio0: rpmsg host is online [ 10.385863] net eth0: initializing cpsw version 1.15 (0) [ 10.389879] libphy: PHY 48485000.mdio:07 not found [ 10.389884] net eth0: phy "48485000.mdio:07" not found on slave 0, err -19 [ 10.401507] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 10.419641] Initializing XFRM netlink socket [ 10.447263] remoteproc1: powering up 40800000.dsp [ 10.476746] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 [ 10.490251] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 10.496141] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 10.502108] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 10.598247] remoteproc1: remote processor 40800000.dsp is now up [ 10.616903] virtio_rpmsg_bus virtio1: rpmsg host is online [ 10.623235] remoteproc2: powering up 41000000.dsp [ 10.662421] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 [ 10.683041] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 10.688932] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 10.694872] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 10.781562] remoteproc2: remote processor 41000000.dsp is now up [ 10.807640] virtio_rpmsg_bus virtio2: rpmsg host is online [ 10.860958] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 10.870340] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 10.896541] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 10.924614] NET: Registered protocol family 41 [ 10.971081] random: nonblocking pool is initialized [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Login Service. [ OK ] Started Network Name Resolution. [ OK ] Started uim-sysfs.service. Starting rc.pvr.service... [ 11.405360] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting telnetd.service... Starting tiipclad-daemon.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started Print notice about GPLv3 packages. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: **************************************************************************** Do you have any other propositions? Regards, Stefan. + +Stefan For SOC1, from the bootlog it appears that the platform data is incorrect as indicated by [ 1.840064] cpsw 48484000.ethernet: Missing or malformed slave[1] phy-mode property [ 1.847803] cpsw 48484000.ethernet: cpsw: platform data missing Please check if the changes have been carried out correctly For SOC2 , the driver seems to be looking for a PHY (on eth0 and eth1) and fails to detect one - suspect the fixed-link param has not taken effect if possible paste the dt snippets for SOC1 and SOC2 + +DTS would be like an original provided for the tda2xx with the minor changes regarding some voltages and cpsw that are needed for our board (DTS file for ALPHA AMV board). The differences between SOCs dts are only the one regarding cpsw which are located in the posts above. The problem occurs when I delete the delays of the cpsw1 of the SOC1... then the whole eth device fails. DTS that overrides the DTS below: /* * DTS file for ALPHA AMV board. * */ #include "dra7-evm-infoadas.dts" /* Power supply for SD card. */ &mmc1 { vmmc-supply = <&evm_3v3_sw>; }; /* Define custom pinmux. */ &dra7_pmx_core { gpio6_pins: gpio6_pins { pinctrl-single,pins = < 0x37C (PIN_OUTPUT_PULLUP | MUX_MODE14) /* PHY reset pin is connected to SOC GPIO6_29 [AD4] pin. */ >; }; }; /* Apply custom pinmux to GPIO6. */ &gpio6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&gpio6_pins>; }; /* Davinci MDIO resets the PHY via GPIO pin. */ &davinci_mdio { reset-gpios = <&gpio6 29 GPIO_ACTIVE_LOW>; /* PHY reset is asserted from SOC GPIO6_29 pin. */ reset-delay-us = <10>; /* PHY OSC @ 25MHz per Marvell datasheet minimal reset delay is 10 * (1 / Fosc). */ }; /* Set PHY address and mode. */ &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; /* PHY address is 0x7. */ phy-mode = "rgmii-id"; /* PHY is responsible for rgmii interface delay handling on RX and TX line. */ dual_emac_res_vlan = <1>; }; ********************************************************************************** SOC1 DTS: /* * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /dts-v1/; #include "dra74x.dtsi" #include "dra7-evm-common.dtsi" / { model = "TI DRA742"; compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; memory { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */ }; reserved_mem: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x0 0x95800000 0x0 0x3800000>; reusable; status = "okay"; }; dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0x99000000 0x0 0x4000000>; reusable; status = "okay"; }; ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9d000000 0x0 0x2000000>; reusable; status = "okay"; }; dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9f000000 0x0 0x800000>; reusable; status = "okay"; }; }; aliases { i2c7 = &disp_ser; }; evm_1v8_sw: fixedregulator-evm_1v8 { compatible = "regulator-fixed"; regulator-name = "evm_1v8"; vin-supply = <&smps9_reg>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; evm_3v3_sd: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sd"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; }; evm_3v3_sw: fixedregulator-evm_3v3_sw { compatible = "regulator-fixed"; regulator-name = "evm_3v3_sw"; vin-supply = <&sysen1>; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; aic_dvdd: fixedregulator-aic_dvdd { /* TPS77018DBVT */ compatible = "regulator-fixed"; regulator-name = "aic_dvdd"; vin-supply = <&evm_3v3_sw>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vmmcwl_fixed: fixedregulator-mmcwl { compatible = "regulator-fixed"; regulator-name = "vmmcwl_fixed"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; gpio = <&gpio5 8 0>; /* gpio5_8 */ startup-delay-us = <70000>; enable-active-high; }; vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; regulator-boot-on; enable-active-high; vin-supply = <&sysen2>; gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; }; extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; }; }; &tpd12s015 { compatible = "ti,dra7evm-tpd12s015"; pinctrl-names = "i2c", "ddc"; pinctrl-0 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_i2c>; pinctrl-1 = <&hdmi_i2c_sel_pin &hdmi_i2c_pins_ddc>; gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */ <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */ <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ ddc-i2c-bus = <&i2c2>; mcasp-gpio = <&mcasp8>; }; &dra7_pmx_core { hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin { pinctrl-single,pins = < /* this pin is used as a GPIO via mcasp */ 0x2fc (PIN_OUTPUT | MUX_MODE1) /* mcasp8_axr2 */ >; }; hdmi_i2c_pins_i2c: pinmux_hdmi_i2c_pins_default { pinctrl-single,pins = < 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ >; }; hdmi_i2c_pins_ddc: pinmux_hdmi_i2c_pins_ddc { pinctrl-single,pins = < 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ >; }; mmc1_pins_default: pinmux_mmc1_default_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_hs: pinmux_mmc1_hs_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr50: pinmux_mmc1_sdr50_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr104: pinmux_mmc1_sdr104_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc2_pins_default: mmc2_pins_default { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_hs: mmc2_pins_hs { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_ddr_1_8v: pinmux_mmc2_ddr_1_8v_pins { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc2_pins_hs200_1_8v: mmc2_pins_hs200_1_8v { pinctrl-single,pins = < 0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; mmc4_pins_default: mmc4_pins_default { pinctrl-single,pins = < 0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ 0x3ec (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ 0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ 0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ 0x3fC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ >; }; mmc4_pins_hs: mmc4_pins_hs { pinctrl-single,pins = < 0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ 0x3ec (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ 0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ 0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ 0x3fC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ >; }; mmc4_pins_sdr12: mmc4_pins_sdr12 { pinctrl-single,pins = < 0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ 0x3eC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ 0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ 0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ 0x3fc (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ >; }; mmc4_pins_sdr25: mmc4_pins_sdr25 { pinctrl-single,pins = < 0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ 0x3eC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ 0x3f0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ 0x3f4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ 0x3f8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ 0x3fc (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ >; }; }; &dra7_iodelay_core { mmc1_iodelay_ddr50_rev11_conf: mmc1_iodelay_ddr50_rev11_conf { pinctrl-single,pins = < 0x618 (A_DELAY(572) | G_DELAY(540)) /* CFG_MMC1_CLK_IN */ 0x624 (A_DELAY(0) | G_DELAY(600)) /* CFG_MMC1_CMD_IN */ 0x630 (A_DELAY(403) | G_DELAY(120)) /* CFG_MMC1_DAT0_IN */ 0x63c (A_DELAY(23) | G_DELAY(60)) /* CFG_MMC1_DAT1_IN */ 0x648 (A_DELAY(25) | G_DELAY(60)) /* CFG_MMC1_DAT2_IN */ 0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */ 0x620 (A_DELAY(1525) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62c (A_DELAY(55) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc1_iodelay_ddr50_rev20_conf: mmc1_iodelay_ddr50_rev20_conf { pinctrl-single,pins = < 0x618 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */ 0x620 (A_DELAY(1271) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */ 0x624 (A_DELAY(229) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x630 (A_DELAY(850) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(20) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x63C (A_DELAY(468) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x648 (A_DELAY(466) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */ 0x64C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x654 (A_DELAY(399) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc1_iodelay_sdr104_rev11_conf: mmc1_iodelay_sdr104_rev11_conf { pinctrl-single,pins = < 0x620 (A_DELAY(1063) | G_DELAY(17)) /* CFG_MMC1_CLK_OUT */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62c (A_DELAY(23) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(2) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc1_iodelay_sdr104_rev20_conf: mmc1_iodelay_sdr104_rev20_conf { pinctrl-single,pins = < 0x620 (A_DELAY(600) | G_DELAY(400)) /* CFG_MMC1_CLK_OUT */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x638 (A_DELAY(30) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ >; }; mmc2_iodelay_hs200_1_8v_rev11_conf: mmc2_iodelay_hs200_1_8v_rev11_conf { pinctrl-single,pins = < 0x190 (A_DELAY(621) | G_DELAY(600)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(300) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(739) | G_DELAY(600)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(812) | G_DELAY(600)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(954) | G_DELAY(600)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(1340)| G_DELAY(420)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(935) | G_DELAY(600)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(525) | G_DELAY(600)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(767) | G_DELAY(600)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(225) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(565) | G_DELAY(600)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(969) | G_DELAY(600)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(180) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; mmc2_iodelay_hs200_1_8v_rev20_conf: mmc2_iodelay_hs200_1_8v_rev20_conf { pinctrl-single,pins = < 0x190 (A_DELAY(274) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(162) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(401) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(73) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(465) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(115) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(633) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(47) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(935) | G_DELAY(280)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(621) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(183) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(467) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(262) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(46) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(684) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(76) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; mmc2_iodelay_ddr_1_8v_rev11_conf: mmc2_iodelay_ddr_1_8v_rev11_conf { pinctrl-single,pins = < 0x18c (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_IN */ 0x1a4 (A_DELAY(274) | G_DELAY(240)) /* CFG_GPMC_A20_IN */ 0x1b0 (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A21_IN */ 0x1bc (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A22_IN */ 0x1c8 (A_DELAY(514) | G_DELAY(360)) /* CFG_GPMC_A23_IN */ 0x1d4 (A_DELAY(187) | G_DELAY(120)) /* CFG_GPMC_A24_IN */ 0x1e0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_IN */ 0x1ec (A_DELAY(0) | G_DELAY(60)) /* CFG_GPMC_A26_IN */ 0x1f8 (A_DELAY(121) | G_DELAY(60)) /* CFG_GPMC_A27_IN */ 0x360 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */ 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(174) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(168) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(136) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(879) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(34) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(11) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; mmc2_iodelay_ddr_1_8v_rev20_conf: mmc2_iodelay_ddr_1_8v_rev20_conf { pinctrl-single,pins = < 0x18c (A_DELAY(270) | G_DELAY(0)) /* CFG_GPMC_A19_IN */ 0x1a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_IN */ 0x1b0 (A_DELAY(170) | G_DELAY(0)) /* CFG_GPMC_A21_IN */ 0x1bc (A_DELAY(758) | G_DELAY(0)) /* CFG_GPMC_A22_IN */ 0x1c8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_IN */ 0x1d4 (A_DELAY(81) | G_DELAY(0)) /* CFG_GPMC_A24_IN */ 0x1e0 (A_DELAY(286) | G_DELAY(0)) /* CFG_GPMC_A25_IN */ 0x1ec (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_IN */ 0x1f8 (A_DELAY(123) | G_DELAY(0)) /* CFG_GPMC_A27_IN */ 0x360 (A_DELAY(346) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */ 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x194 (A_DELAY(55) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1ac (A_DELAY(422) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1b4 (A_DELAY(642) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1c4 (A_DELAY(128) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1d0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */ 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1dc (A_DELAY(395) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1f0 (A_DELAY(623) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x1fc (A_DELAY(54) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ 0x368 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ >; }; mmc4_iodelay_ds_rev11_conf: mmc4_iodelay_ds_rev11_conf { pinctrl-single,pins = < 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */ 0x848 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */ 0x84c (A_DELAY(96) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */ 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */ 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */ 0x870 (A_DELAY(582) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */ 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */ 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */ 0x87c (A_DELAY(391) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */ 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */ 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */ 0x888 (A_DELAY(561) | G_DELAY(0)) /* CFG_UART2_RXD_IN */ 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */ 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */ 0x894 (A_DELAY(588) | G_DELAY(0)) /* CFG_UART2_TXD_IN */ 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */ 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */ >; }; mmc4_iodelay_ds_rev20_conf: mmc4_iodelay_ds_rev20_conf { pinctrl-single,pins = < 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */ 0x848 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */ 0x84c (A_DELAY(307) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */ 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */ 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */ 0x870 (A_DELAY(785) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */ 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */ 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */ 0x87c (A_DELAY(613) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */ 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */ 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */ 0x888 (A_DELAY(683) | G_DELAY(0)) /* CFG_UART2_RXD_IN */ 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */ 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */ 0x894 (A_DELAY(835) | G_DELAY(0)) /* CFG_UART2_TXD_IN */ 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */ 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */ >; }; mmc4_iodelay_sdr12_hs_sdr25_rev11_conf: mmc4_iodelay_sdr12_hs_sdr25_rev11_conf { pinctrl-single,pins = < 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */ 0x848 (A_DELAY(2651) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */ 0x84c (A_DELAY(1572) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */ 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */ 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */ 0x870 (A_DELAY(1913) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */ 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */ 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */ 0x87c (A_DELAY(1721) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */ 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */ 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */ 0x888 (A_DELAY(1891) | G_DELAY(0)) /* CFG_UART2_RXD_IN */ 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */ 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */ 0x894 (A_DELAY(1919) | G_DELAY(0)) /* CFG_UART2_TXD_IN */ 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */ 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */ >; }; mmc4_iodelay_sdr12_hs_sdr25_rev20_conf: mmc4_iodelay_sdr12_hs_sdr25_rev20_conf { pinctrl-single,pins = < 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */ 0x848 (A_DELAY(1147) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */ 0x84c (A_DELAY(1834) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */ 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */ 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */ 0x870 (A_DELAY(2165) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */ 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */ 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */ 0x87c (A_DELAY(1929) | G_DELAY(64)) /* CFG_UART2_RTSN_IN */ 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */ 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */ 0x888 (A_DELAY(1935) | G_DELAY(128)) /* CFG_UART2_RXD_IN */ 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */ 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */ 0x894 (A_DELAY(2172) | G_DELAY(44)) /* CFG_UART2_TXD_IN */ 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */ 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */ >; }; }; &i2c1 { status = "okay"; clock-frequency = <400000>; tps659038: tps659038@58 { compatible = "ti,tps659038"; reg = <0x58>; ti,palmas-override-powerhold; ti,system-power-controller; tps659038_pmic { compatible = "ti,tps659038-pmic"; regulators { smps123_reg: smps123 { /* VDD_MPU */ regulator-name = "smps123"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps45_reg: smps45 { /* VDD_DSPEVE */ regulator-name = "smps45"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps6_reg: smps6 { /* VDD_GPU - over VDD_SMPS6 */ regulator-name = "smps6"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps7_reg: smps7 { /* CORE_VDD */ regulator-name = "smps7"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; regulator-always-on; regulator-boot-on; }; smps8_reg: smps8 { /* VDD_IVAHD */ regulator-name = "smps8"; regulator-min-microvolt = < 850000>; regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; smps9_reg: smps9 { /* VDDS1V8 */ regulator-name = "smps9"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldo1_reg: ldo1 { /* LDO1_OUT --> SDIO */ regulator-name = "ldo1"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; }; ldo2_reg: ldo2 { /* VDD_RTCIO */ /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */ regulator-name = "ldo2"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; }; ldo3_reg: ldo3 { /* VDDA_1V8_PHY */ regulator-name = "ldo3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldo9_reg: ldo9 { /* VDD_RTC */ regulator-name = "ldo9"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; regulator-always-on; regulator-boot-on; regulator-allow-bypass; }; ldoln_reg: ldoln { /* VDDA_1V8_PLL */ regulator-name = "ldoln"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; ldousb_reg: ldousb { /* VDDA_3V_USB: VDDA_USBHS33 */ regulator-name = "ldousb"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; /* REGEN1 is unused */ regen2: regen2 { /* Needed for PMIC internal resources */ regulator-name = "regen2"; regulator-boot-on; regulator-always-on; }; /* REGEN3 is unused */ sysen1: sysen1 { /* PMIC_REGEN_3V3 */ regulator-name = "sysen1"; regulator-boot-on; regulator-always-on; }; sysen2: sysen2 { /* PMIC_REGEN_DDR */ regulator-name = "sysen2"; regulator-boot-on; regulator-always-on; }; }; }; }; pcf_lcd: gpio@20 { compatible = "nxp,pcf8575"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio6>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; }; pcf_gpio_21: gpio@21 { compatible = "ti,pcf8575"; reg = <0x21>; lines-initial-states = <0x1408>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio6>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; }; tlv320aic3106: tlv320aic3106@19 { #sound-dai-cells = <0>; compatible = "ti,tlv320aic3106"; reg = <0x19>; adc-settle-ms = <40>; ai3x-micbias-vg = <1>; /* 2.0V */ status = "okay"; /* Regulators */ AVDD-supply = <&evm_3v3_sw>; IOVDD-supply = <&evm_3v3_sw>; DRVDD-supply = <&evm_3v3_sw>; DVDD-supply = <&aic_dvdd>; }; }; i2c_p3_exp: &i2c2 { status = "okay"; clock-frequency = <400000>; pcf_hdmi: gpio@26 { compatible = "nxp,pcf8575"; reg = <0x26>; gpio-controller; #gpio-cells = <2>; vin6_brdmux: p1 { /* vin6_sel_s0: high: VIN6, low: audio */ gpio-hog; gpios = <1 GPIO_ACTIVE_HIGH>; output-low; line-name = "vin6_sel_s0"; }; }; ov10633@37 { compatible = "ovti,ov10633"; reg = <0x37>; mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_LOW>; /* CAM_FPD_MUX_S0 */ port { onboardLI: endpoint { remote-endpoint = <&vin1a>; hsync-active = <1>; vsync-active = <1>; pclk-sample = <0>; }; }; }; disp_ser: serializer@1b { compatible = "ti,ds90uh925q"; reg = <0x1b>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; }; &mmc1 { status = "okay"; vmmc-supply = <&evm_3v3_sd>; vmmc_aux-supply = <&ldo1_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_sdr50>; pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev11_conf>; pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>; pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev20_conf>; pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; }; &mmc2 { status = "okay"; vmmc-supply = <&evm_3v3_sw>; bus-width = <8>; max-frequency = <192000000>; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev11_conf>; pinctrl-3 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev20_conf>; pinctrl-4 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev11_conf>; pinctrl-5 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev20_conf>; }; &mmc4 { status = "okay"; vmmc-supply = <&vmmcwl_fixed>; bus-width = <4>; cap-power-off-card; keep-power-in-suspend; ti,non-removable; pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25"; pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>; pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>; pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>; pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>; #address-cells = <1>; #size-cells = <0>; wlcore: wlcore@2 { compatible = "ti,wl1835"; reg = <2>; interrupt-parent = <&gpio5>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; }; }; &oppdm_mpu { vdd-supply = <&smps123_reg>; }; &oppdm_dspeve { vdd-supply = <&smps45_reg>; }; &oppdm_gpu { vdd-supply = <&smps6_reg>; }; &oppdm_ivahd { vdd-supply = <&smps8_reg>; }; &oppdm_core { vdd-supply = <&smps7_reg>; }; &omap_dwc3_2 { extcon = <&extcon_usb2>; }; &elm { status = "okay"; }; &gpmc { status = "okay"; ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */ nand@0,0 { compatible = "ti,omap2-nand"; reg = <0 0 4>; /* device IO registers */ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; gpmc,device-width = <2>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <80>; gpmc,cs-wr-off-ns = <80>; gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <60>; gpmc,adv-wr-off-ns = <60>; gpmc,we-on-ns = <10>; gpmc,we-off-ns = <50>; gpmc,oe-on-ns = <4>; gpmc,oe-off-ns = <40>; gpmc,access-ns = <40>; gpmc,wr-access-ns = <80>; gpmc,rd-cycle-ns = <80>; gpmc,wr-cycle-ns = <80>; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x000020000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00020000 0x00020000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00040000 0x00020000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x00060000 0x00020000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00080000 0x00040000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x000c0000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x001c0000 0x00020000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x001e0000 0x00020000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00200000 0x00800000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00a00000 0x0f600000>; }; }; }; &usb2_phy1 { phy-supply = <&ldousb_reg>; }; &usb2_phy2 { phy-supply = <&ldousb_reg>; }; &gpio7 { ti,no-reset-on-init; ti,no-idle-on-init; }; &mac { status = "okay"; dual_emac; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 100 0 0>; /*phy-mode = "rgmii-id";*/ }; &dss { status = "okay"; vdda_video-supply = <&ldoln_reg>; ports { #address-cells = <1>; #size-cells = <0>; status = "disabled"; port@lcd3 { reg = <2>; dpi_out3: endpoint { data-lines = <24>; }; }; }; }; &hdmi { vdda-supply = <&ldo3_reg>; }; &mcasp8 { /* not used for audio. only the AXR2 pin is used as GPIO */ status = "okay"; }; video_in: &vin1a { status = "okay"; endpoint@0 { slave-mode; remote-endpoint = <&onboardLI>; }; }; &bb2d { status = "okay"; }; + +Hi sorry for the delayed response - from the logs it appears that commenting out the delay mode on the SOC2 cpsw0 side seems to be ok(not reported as parsing error) Can we review only the DT portion(relevant to cpsw configuration) and the boot logs corresponding to SOC1/SOC2 - you can clip the irrelevant pieces from the log - otherwise it is difficult to narrow down on the required information suggest we test with (effective configuration as below, including overrides from the board specific DT file) For SOC1 &cpsw_emac0 { phy_id = <&davinci_mdio>, <7>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 100 0 0>; dual_emac_res_vlan = <1>; }; For SOC2 &cpsw_emac0 { fixed-link = <0 1 100 0 0>; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { fixed-link = <0 1 100 0 0>; dual_emac_res_vlan = <2>; }; + +Hi Is the issue still open, can you revert back with details if further support is needed + +Hi Srirama, Stefan is currently on vacataion. Other colleague is trying the suggested changes. We will let you know about the results in few days. Regards, Milena + +Hi Srirama, Log files for both SoCs are attached. console output SoC2.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (rtrk@rtrkw287-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #3 SMP PREEMPT Thu Jun 28 15:58:57 CEST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 244992 +[ 0.000000] free_area_init_node: node 0, pgdat c0977280, node_mem_map ef69a000 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 180224 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=2274bf5c-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410840K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364328K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) + lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc08d402c (9009 kB) + .init : 0xc08d5000 - 0xc092a000 ( 340 kB) + .data : 0xc092a000 - 0xc0979d60 ( 320 kB) + .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000330] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000766] Console: colour dummy device 80x30 +[ 0.000787] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000800] pid_max: default: 32768 minimum: 301 +[ 0.000897] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000907] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001445] Initializing cgroup subsys io +[ 0.001462] Initializing cgroup subsys memory +[ 0.001487] Initializing cgroup subsys devices +[ 0.001499] Initializing cgroup subsys freezer +[ 0.001511] Initializing cgroup subsys perf_event +[ 0.001523] Initializing cgroup subsys pids +[ 0.001550] CPU: Testing write buffer coherency: ok +[ 0.001749] /cpus/cpu@0 missing clock-frequency property +[ 0.001765] /cpus/cpu@1 missing clock-frequency property +[ 0.001775] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001808] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080062] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080130] Brought up 2 CPUs +[ 0.080143] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080150] CPU: All CPU(s) started in HYP mode. +[ 0.080155] CPU: Virtualization extensions available. +[ 0.080532] devtmpfs: initialized +[ 0.109062] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110050] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.312685] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.312705] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.316937] pinctrl core: initialized pinctrl subsystem +[ 0.317785] NET: Registered protocol family 16 +[ 0.318704] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340218] cpuidle: using governor ladder +[ 0.370240] cpuidle: using governor menu +[ 0.378728] OMAP GPIO hardware version 0.1 +[ 0.382702] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe +[ 0.384645] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.400685] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.400698] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.409921] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.409931] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410405] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410414] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.410993] OMAP DMA hardware revision 0.0 +[ 0.451644] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452804] edma 43300000.edma: memcpy is disabled +[ 0.457415] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461834] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.462012] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462169] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462334] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462627] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462812] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465809] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481247] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.543399] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.543796] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.544001] media: Linux media interface: v0.10 +[ 0.544052] Linux video capture interface: v2.00 +[ 0.544093] pps_core: LinuxPPS API ver. 1 registered +[ 0.544101] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.544124] PTP clock support registered +[ 0.544173] EDAC MC: Ver: 3.0.0 +[ 0.544914] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.545210] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.545540] Advanced Linux Sound Architecture Driver Initialized. +[ 0.546364] clocksource: Switched to clocksource arch_sys_counter +[ 0.556888] NET: Registered protocol family 2 +[ 0.557380] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.557444] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.557568] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.557615] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557646] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557854] NET: Registered protocol family 1 +[ 0.558120] RPC: Registered named UNIX socket transport module. +[ 0.558129] RPC: Registered udp transport module. +[ 0.558136] RPC: Registered tcp transport module. +[ 0.558143] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.558159] PCI: CLS 0 bytes, default 64 +[ 0.559138] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.569080] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.569734] NFS: Registering the id_resolver key type +[ 0.569760] Key type id_resolver registered +[ 0.569767] Key type id_legacy registered +[ 0.569829] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.571081] bounce: pool size: 64 pages +[ 0.571226] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.571240] io scheduler noop registered +[ 0.571252] io scheduler deadline registered +[ 0.571287] io scheduler cfq registered (default) +[ 0.576165] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.579355] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.579368] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.579401] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.579422] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.586088] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.586102] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.586113] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.586123] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.586156] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 0.586198] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +[ 0.586220] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] +[ 0.586289] pci 0000:00:00.0: supports D1 +[ 0.586299] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 0.586590] PCI: bus0: Fast back to back transfers disabled +[ 0.586717] PCI: bus1: Fast back to back transfers enabled +[ 0.586802] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.586818] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.586831] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.587048] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.587061] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded +[ 0.587175] aer 0000:00:00.0:pcie02: service driver aer loaded +[ 0.645885] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.649265] console [ttyS0] disabled +[ 0.649318] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 +[ 1.643812] console [ttyS0] enabled +[ 1.648219] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 +[ 1.657916] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 +[ 1.667962] [drm] Initialized drm 1.1.0 20060810 +[ 1.673951] OMAP DSS rev 6.1 +[ 1.677743] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.693350] loop: module loaded +[ 1.696886] vmemexp device MAJOR num = 246 +[ 1.701015] vmemexp class registered +[ 1.704730] /dev/vmemexp device registered +[ 1.708864] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.714539] nand: No NAND device found +[ 1.718329] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.728252] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.733647] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.739526] Creating 7 MTD partitions on "spi32766.0": +[ 1.744689] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.750825] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.757171] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.764098] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.770811] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.778217] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.784553] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.792345] libphy: Fixed MDIO Bus: probed +[ 1.799223] cpsw 48484000.ethernet: Detected MACID = c8:fd:19:bb:08:2e +[ 1.805873] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.812844] cpsw 48484000.ethernet: cpsw: Detected MACID = c8:fd:19:bb:08:2f +[ 1.821466] mousedev: PS/2 mouse device common for all mice +[ 1.827731] i2c /dev entries driver +[ 1.837023] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.843410] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.849960] evm_3v3_sw: supplied by sysen1 +[ 2.017193] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.027333] aic_dvdd: supplied by evm_3v3_sw +[ 2.033229] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.040807] NET: Registered protocol family 10 +[ 2.056110] sit: IPv6 over IPv4 tunneling driver +[ 2.061348] NET: Registered protocol family 17 +[ 2.066030] Key type dns_resolver registered +[ 2.070467] omap_voltage_late_init: Voltage driver support not added +[ 2.077363] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.083571] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.090272] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.096518] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.104670] Power Management for TI OMAP4+ devices. +[ 2.109763] Registering SWP/SWPB emulation handler +[ 2.116593] dmm 4e000000.dmm: initialized all PAT entries +[ 2.123912] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.130591] [drm] No driver support for vblank timestamp query. +[ 2.136906] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.153872] pcf857x: probe of 0-0020 failed with error -121 +[ 2.159662] pcf857x: probe of 0-0021 failed with error -121 +[ 2.206377] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.212495] davinci_mdio 48485000.mdio: no live phy, scanning all +[ 2.219789] davinci_mdio: probe of 48485000.mdio failed with error -5 +[ 2.226710] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.267826] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.277348] hctosys: unable to open rtc device (rtc0) +[ 2.290501] evm_1v8: disabling +[ 2.293570] aic_dvdd: disabling +[ 2.296924] ldousb: disabling +[ 2.300313] ALSA device list: +[ 2.303290] #0: DRA7xx-EVM +[ 2.306823] Waiting for root device PARTUUID=2274bf5c-02... +[ 3.005436] mmc2: host does not support reading read-only switch, assuming write-enable +[ 3.017110] mmc2: new high speed SDHC card at address aaaa +[ 3.022949] mmcblk0: mmc2:aaaa SL08G 7.40 GiB +[ 3.028449] mmcblk0: p1 p2 +[ 3.077054] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 3.085598] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.547535] EXT4-fs (mmcblk0p2): recovery complete +[ 3.553872] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.562054] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 3.569105] devtmpfs: mounted +[ 3.572308] Freeing unused kernel memory: 340K +[ 3.576791] This architecture does not have kernel memory protection. +[ 3.776193] systemd[1]: System time before build time, advancing clock. +[ 3.811487] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.824160] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.836781] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.855309] systemd[1]: Detected architecture arm. +[ 3.877445] systemd[1]: Set hostname to . +[ 3.949378] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.949920] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.950098] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.985189] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 4.009134] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 4.068545] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.078084] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.087947] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.428690] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.436498] systemd[1]: sockets.target: Found dependency on dbus.socket/start +[ 4.443670] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.451122] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.458883] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.466140] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.473591] systemd[1]: sockets.target: Breaking ordering cycle by deleting job dbus.socket/start +[ 4.482528] systemd[1]: dbus.socket: Job dbus.socket/start deleted to break ordering cycle starting with sockets.target/start +[ 4.516772] systemd[1]: alignment.service: Found ordering cycle on alignment.service/start +[ 4.525079] systemd[1]: alignment.service: Found dependency on sysinit.target/start +[ 4.532791] systemd[1]: alignment.service: Found dependency on alignment.service/start +[ 4.540763] systemd[1]: alignment.service: Breaking ordering cycle by deleting job alignment.service/start +[ 4.550475] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with alignment.service/start +[ 4.578731] systemd[1]: Reached target Swap. +[ 4.596807] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 4.636563] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 4.666578] systemd[1]: Reached target Paths. +[ 4.686555] systemd[1]: Reached target Remote File Systems. +[ 4.716695] systemd[1]: Listening on Journal Socket. +[ 4.746618] systemd[1]: Listening on udev Kernel Socket. +[ 4.776591] systemd[1]: Listening on Syslog Socket. +[ 4.796634] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 4.827431] systemd[1]: Listening on Journal Socket (/dev/log). +[ 4.857795] systemd[1]: Created slice System Slice. +[ 4.916583] systemd[1]: Mounting Debug File System... +[ 4.940943] systemd[1]: Starting Load Kernel Modules... +[ 4.968819] systemd[1]: Starting Journal Service... +[ 4.997407] systemd[1]: Created slice system-getty.slice. +[ 5.015610] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 5.032194] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 5.041129] systemd[1]: Mounting Temporary Directory... +[ 5.077477] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 5.136711] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[ 5.168624] systemd[1]: Starting Setup Virtual Console... +[ 5.198793] systemd[1]: Mounting POSIX Message Queue File System... +[ 5.227237] systemd[1]: Created slice User and Session Slice. +[ 5.256747] systemd[1]: Listening on udev Control Socket. +[ 5.276806] systemd[1]: Reached target Slices. +[ 5.296739] systemd[1]: Listening on Network Service Netlink Socket. +[ 5.351042] systemd[1]: Mounted Debug File System. +[ 5.376683] systemd[1]: Mounted POSIX Message Queue File System. +[ 5.396622] systemd[1]: Mounted Temporary Directory. +[ 5.416780] systemd[1]: Started Journal Service. +[ 6.003565] systemd-journald[117]: Received request to flush runtime journal from PID 1 +[ 6.462773] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.486471] remoteproc0: 55020000.ipu is available +[ 6.491382] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.518878] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.538496] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.549991] remoteproc1: 40800000.dsp is available +[ 6.554905] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.567534] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.593253] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.622655] remoteproc2: 41000000.dsp is available +[ 6.631927] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.640943] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.580664] remoteproc1: registered virtio0 (type 7) +[ 7.634432] remoteproc2: registered virtio1 (type 7) +[ 7.694794] remoteproc0: registered virtio2 (type 7) +[ 7.745667] rtc rtc0: 48838000.rtc: dev (254:0) +[ 7.745687] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.760963] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.774637] CAN device driver interface +[ 7.802978] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 7.829133] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 7.835865] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 7.850253] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 7.985075] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) +[ 8.027464] SCSI subsystem initialized +[ 8.207361] libata version 3.00 loaded. +[ 8.396096] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 8.405505] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 8.420869] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 8.454877] scsi host0: ahci +[ 8.458132] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 +[ 8.598259] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 8.673319] net eth1: initializing cpsw version 1.15 (0) +[ 8.681800] net eth0: initialized cpsw ale version 1.4 +[ 8.694127] net eth0: ALE Table size 1024 +[ 8.704711] libphy: PHY 48485000.mdio:03 not found +[ 8.713352] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 +[ 8.733196] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.757195] net eth0: initializing cpsw version 1.15 (0) +[ 8.801545] libphy: PHY 48485000.mdio:07 not found +[ 8.813577] net eth0: phy "48485000.mdio:07" not found on slave 0, err -19 +[ 8.820572] ata1: SATA link down (SStatus 0 SControl 300) +[ 8.845416] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 9.083630] NET: Registered protocol family 15 +[ 9.272959] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 9.450681] Initializing XFRM netlink socket +[ 9.470675] remoteproc1: powering up 40800000.dsp +[ 9.493906] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449580 +[ 9.559907] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 9.565801] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 9.571754] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 9.663202] remoteproc1: remote processor 40800000.dsp is now up +[ 9.683100] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 9.700833] remoteproc2: powering up 41000000.dsp +[ 9.728289] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449580 +[ 9.743204] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.749095] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.755046] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 9.835620] remoteproc2: remote processor 41000000.dsp is now up +[ 9.854068] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 9.867370] remoteproc0: powering up 55020000.ipu +[ 9.900845] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507984 +[ 9.915035] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 9.941004] random: nonblocking pool is initialized +[ 9.987540] remoteproc0: remote processor 55020000.ipu is now up +[ 10.008811] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 10.243863] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 10.252249] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 10.285011] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 10.310903] NET: Registered protocol family 41 +[ 10.559861] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +root@dra7xx-evm:~# + + console output SoC1.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (rtrk@rtrkw287-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Jun 26 15:45:57 CEST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 244992 +[ 0.000000] free_area_init_node: node 0, pgdat c0977280, node_mem_map ef69a000 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 180224 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=b5aaa40c-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410840K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364328K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) + lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc08d402c (9009 kB) + .init : 0xc08d5000 - 0xc092a000 ( 340 kB) + .data : 0xc092a000 - 0xc0979d60 ( 320 kB) + .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000332] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000339] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000772] Console: colour dummy device 80x30 +[ 0.000794] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000808] pid_max: default: 32768 minimum: 301 +[ 0.000904] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000915] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001455] Initializing cgroup subsys io +[ 0.001471] Initializing cgroup subsys memory +[ 0.001494] Initializing cgroup subsys devices +[ 0.001506] Initializing cgroup subsys freezer +[ 0.001518] Initializing cgroup subsys perf_event +[ 0.001529] Initializing cgroup subsys pids +[ 0.001556] CPU: Testing write buffer coherency: ok +[ 0.001756] /cpus/cpu@0 missing clock-frequency property +[ 0.001773] /cpus/cpu@1 missing clock-frequency property +[ 0.001783] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001816] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080055] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080123] Brought up 2 CPUs +[ 0.080136] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080142] CPU: All CPU(s) started in HYP mode. +[ 0.080148] CPU: Virtualization extensions available. +[ 0.080526] devtmpfs: initialized +[ 0.109123] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110103] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.312410] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.312431] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.316658] pinctrl core: initialized pinctrl subsystem +[ 0.317511] NET: Registered protocol family 16 +[ 0.318435] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340217] cpuidle: using governor ladder +[ 0.370243] cpuidle: using governor menu +[ 0.378717] OMAP GPIO hardware version 0.1 +[ 0.382672] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe +[ 0.384608] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.400631] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.400644] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.409884] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.409894] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410381] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410391] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.410967] OMAP DMA hardware revision 0.0 +[ 0.451477] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452649] edma 43300000.edma: memcpy is disabled +[ 0.457287] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461685] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461864] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462022] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462187] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462478] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462664] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465655] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481107] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.543251] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.543656] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.543857] media: Linux media interface: v0.10 +[ 0.543908] Linux video capture interface: v2.00 +[ 0.543947] pps_core: LinuxPPS API ver. 1 registered +[ 0.543954] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.543977] PTP clock support registered +[ 0.544026] EDAC MC: Ver: 3.0.0 +[ 0.544764] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.545062] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.545390] Advanced Linux Sound Architecture Driver Initialized. +[ 0.546228] clocksource: Switched to clocksource arch_sys_counter +[ 0.556809] NET: Registered protocol family 2 +[ 0.557304] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.557368] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.557493] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.557540] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557570] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557778] NET: Registered protocol family 1 +[ 0.558045] RPC: Registered named UNIX socket transport module. +[ 0.558054] RPC: Registered udp transport module. +[ 0.558061] RPC: Registered tcp transport module. +[ 0.558068] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.558085] PCI: CLS 0 bytes, default 64 +[ 0.559063] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.568997] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.569648] NFS: Registering the id_resolver key type +[ 0.569676] Key type id_resolver registered +[ 0.569683] Key type id_legacy registered +[ 0.569743] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.571000] bounce: pool size: 64 pages +[ 0.571147] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.571161] io scheduler noop registered +[ 0.571172] io scheduler deadline registered +[ 0.571209] io scheduler cfq registered (default) +[ 0.576107] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.579343] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.579356] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.579390] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.579411] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.608205] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.608219] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.608230] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.608240] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.608273] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 0.608316] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +[ 0.608338] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] +[ 0.608408] pci 0000:00:00.0: supports D1 +[ 0.608418] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 0.608651] PCI: bus0: Fast back to back transfers disabled +[ 0.608776] PCI: bus1: Fast back to back transfers enabled +[ 0.608860] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.608874] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.608887] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.609102] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.609115] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded +[ 0.609230] aer 0000:00:00.0:pcie02: service driver aer loaded +[ 0.669545] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.672903] console [ttyS0] disabled +[ 0.672955] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 +[ 1.667465] console [ttyS0] enabled +[ 1.671851] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 +[ 1.681550] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 +[ 1.691592] [drm] Initialized drm 1.1.0 20060810 +[ 1.697647] OMAP DSS rev 6.1 +[ 1.701396] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.717153] loop: module loaded +[ 1.720671] vmemexp device MAJOR num = 246 +[ 1.724801] vmemexp class registered +[ 1.728535] /dev/vmemexp device registered +[ 1.732649] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.738333] nand: No NAND device found +[ 1.742103] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.752025] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.757442] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.763300] Creating 7 MTD partitions on "spi32766.0": +[ 1.768477] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.774598] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.780942] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.787889] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.794572] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.801974] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.808343] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.816095] libphy: Fixed MDIO Bus: probed +[ 1.822967] cpsw 48484000.ethernet: Detected MACID = c8:fd:19:ba:fd:58 +[ 1.829639] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.836596] cpsw 48484000.ethernet: cpsw: Detected MACID = c8:fd:19:ba:fd:59 +[ 1.845207] mousedev: PS/2 mouse device common for all mice +[ 1.851493] i2c /dev entries driver +[ 1.860780] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.867183] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.873719] evm_3v3_sw: supplied by sysen1 +[ 2.047074] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.057180] aic_dvdd: supplied by evm_3v3_sw +[ 2.063062] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.070568] NET: Registered protocol family 10 +[ 2.085899] sit: IPv6 over IPv4 tunneling driver +[ 2.091145] NET: Registered protocol family 17 +[ 2.095828] Key type dns_resolver registered +[ 2.100261] omap_voltage_late_init: Voltage driver support not added +[ 2.107152] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.113361] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.120061] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.126307] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.134495] Power Management for TI OMAP4+ devices. +[ 2.139588] Registering SWP/SWPB emulation handler +[ 2.146436] dmm 4e000000.dmm: initialized all PAT entries +[ 2.153763] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.160444] [drm] No driver support for vblank timestamp query. +[ 2.166760] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.183721] pcf857x: probe of 0-0020 failed with error -121 +[ 2.189511] pcf857x: probe of 0-0021 failed with error -121 +[ 2.236251] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.242370] davinci_mdio 48485000.mdio: detected phy mask ffffff7f +[ 2.250902] libphy: 48485000.mdio: probed +[ 2.254930] davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 +[ 2.264127] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.307706] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.317248] hctosys: unable to open rtc device (rtc0) +[ 2.330319] evm_1v8: disabling +[ 2.333390] aic_dvdd: disabling +[ 2.336735] ldousb: disabling +[ 2.340111] ALSA device list: +[ 2.343089] #0: DRA7xx-EVM +[ 2.346757] Waiting for root device PARTUUID=b5aaa40c-02... +[ 3.003248] mmc2: host does not support reading read-only switch, assuming write-enable +[ 3.013182] mmc2: new high speed SDHC card at address 59b4 +[ 3.019027] mmcblk0: mmc2:59b4 USD 7.48 GiB +[ 3.024222] mmcblk0: p1 p2 +[ 3.117083] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 3.125817] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.900608] EXT4-fs (mmcblk0p2): recovery complete +[ 3.908120] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.916303] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 3.924614] devtmpfs: mounted +[ 3.927836] Freeing unused kernel memory: 340K +[ 3.932298] This architecture does not have kernel memory protection. +[ 4.138074] systemd[1]: System time before build time, advancing clock. +[ 4.180134] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 4.192944] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 4.204313] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 4.222754] systemd[1]: Detected architecture arm. +[ 4.247153] systemd[1]: Set hostname to . +[ 4.303616] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 4.340625] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 4.351839] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 4.363151] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 4.377533] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 4.480364] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.489905] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.499857] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.844974] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 4.852808] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 4.860520] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 4.867797] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 4.875229] systemd[1]: sysinit.target: Found dependency on rpcbind.socket/start +[ 4.882727] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 4.890175] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.899628] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ 4.928815] systemd[1]: Listening on Syslog Socket. +[ 4.956566] systemd[1]: Listening on Journal Socket (/dev/log). +[ 4.986420] systemd[1]: Reached target Swap. +[ 5.016785] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 5.046511] systemd[1]: Listening on udev Control Socket. +[ 5.076569] systemd[1]: Listening on Network Service Netlink Socket. +[ 5.107619] systemd[1]: Created slice User and Session Slice. +[ 5.136555] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 5.166941] systemd[1]: Created slice System Slice. +[ 5.196412] systemd[1]: Reached target Slices. +[ 5.216984] systemd[1]: Created slice system-getty.slice. +[ 5.246407] systemd[1]: Reached target Paths. +[ 5.266460] systemd[1]: Listening on udev Kernel Socket. +[ 5.296481] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 5.326960] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 5.356573] systemd[1]: Listening on Journal Socket. +[ 5.416602] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[ 5.448524] systemd[1]: Mounting Debug File System... +[ 5.478816] systemd[1]: Starting Journal Service... +[ 5.508606] systemd[1]: Mounting POSIX Message Queue File System... +[ 5.528324] systemd[1]: Mounting Temporary Directory... +[ 5.558697] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 5.579290] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 5.586636] systemd[1]: Reached target Remote File Systems. +[ 5.646640] systemd[1]: Starting Setup Virtual Console... +[ 5.680383] systemd[1]: Starting Load Kernel Modules... +[ 5.712902] systemd[1]: Mounted POSIX Message Queue File System. +[ 5.736493] systemd[1]: Mounted Debug File System. +[ 5.756589] systemd[1]: Mounted Temporary Directory. +[ 5.786668] systemd[1]: Started Journal Service. +[ 6.432644] systemd-journald[120]: Received request to flush runtime journal from PID 1 +[ 6.788368] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.796185] remoteproc0: 55020000.ipu is available +[ 6.817685] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.828398] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.843687] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.853631] remoteproc1: 40800000.dsp is available +[ 6.865536] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.886047] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.913130] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.936616] remoteproc2: 41000000.dsp is available +[ 6.952913] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.985671] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.165592] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.192990] rtc rtc0: 48838000.rtc: dev (254:0) +[ 7.193012] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.251448] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 8.034189] remoteproc1: registered virtio0 (type 7) +[ 8.050714] remoteproc2: registered virtio1 (type 7) +[ 8.093003] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 8.109244] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.119831] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.134905] CAN device driver interface +[ 8.152702] remoteproc0: registered virtio2 (type 7) +[ 8.348480] SCSI subsystem initialized +[ 8.398761] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) +[ 8.603108] libata version 3.00 loaded. +[ 8.751239] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 8.758774] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 8.767810] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 8.808357] scsi host0: ahci +[ 8.811517] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 +[ 8.860249] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 9.186298] ata1: SATA link down (SStatus 0 SControl 300) +[ 9.591769] NET: Registered protocol family 15 +[ 9.604363] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 9.829714] net eth1: initializing cpsw version 1.15 (0) +[ 9.842639] remoteproc1: powering up 40800000.dsp +[ 9.850734] net eth0: initialized cpsw ale version 1.4 +[ 9.872280] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449580 +[ 9.884302] net eth0: ALE Table size 1024 +[ 9.902991] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 9.908884] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 9.914872] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 9.925913] libphy: PHY 48485000.mdio:03 not found +[ 9.944115] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 +[ 9.961090] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 9.977950] net eth0: initializing cpsw version 1.15 (0) +[ 10.004468] remoteproc1: remote processor 40800000.dsp is now up +[ 10.011941] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 10.022306] remoteproc2: powering up 41000000.dsp +[ 10.039830] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449580 +[ 10.062879] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 10.068770] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 10.074726] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 10.087757] net eth0: phy found : id is : 0x1410cc2 +[ 10.116256] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 10.167737] remoteproc2: remote processor 41000000.dsp is now up +[ 10.175148] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 10.207573] remoteproc0: powering up 55020000.ipu +[ 10.244979] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507980 +[ 10.256779] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 10.289292] remoteproc0: remote processor 55020000.ipu is now up +[ 10.299193] Initializing XFRM netlink socket +[ 10.305531] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 10.319038] Bluetooth: Core ver 2.21 +[ 10.322919] NET: Registered protocol family 31 +[ 10.338310] Bluetooth: HCI device and connection manager initialized +[ 10.359614] Bluetooth: HCI socket layer initialized +[ 10.375347] Bluetooth: L2CAP socket layer initialized +[ 10.384716] Bluetooth: SCO socket layer initialized +[ 10.542841] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 10.556840] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 10.585931] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 10.604817] NET: Registered protocol family 41 +[ 10.874231] random: nonblocking pool is initialized +[ 11.186468] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 14.113836] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx +[ 14.121756] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +root@dra7xx-evm:~# + + Regards, Milena + +Milena Do you have an update. Let us know if the issue has been resolved - suggest that we close the issue and re-open this thread if you confirm that the issue is still open and update on the outcome of the suggested changes + +Dear Srirama, the issue is still not resolved. We have already sent you log files in our previous posts with the changes you have ask us to do. Did you have a chance to look at them? Do you have any other propositions? Kind Regards, Stefan. + +Stefan I have reviewed the logs and did not catch anything amiss - not sure what is leading to the DT parsing errors in some cases. Unfortunately dont have means to replicate or test at my end + +Unlocking the thread to allow follow-up and closure. Regards Karthik + +Stefan Dont think we were able to take this to closure. If the issue is still open, can you summarize the current status, test results ( include the latest logs ) - will relook at this from scratch + +Stefan Please confirm if we need further follow-up on this + +Dear TI, This problem is currently not being examined by our team as the issue is no longer high priority. We will maybe get to it in the future. Regards, Stefan. + +Stefan Thanks for your response. Will close this thread for now then - we can reopen if it is necessary at a later point of time + diff --git a/data2/text/range/30001+/684752.txt b/data2/text/range/30001+/684752.txt new file mode 100644 index 0000000000000000000000000000000000000000..8331f999f04b28be1eb4b651cb918729bf889c8d --- /dev/null +++ b/data2/text/range/30001+/684752.txt @@ -0,0 +1,20 @@ +Ticket Name: usb3.0 none got detected + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA722, PMP Tool/software: Linux Hi Expert, I'm running Linux Vision SDK v03.02.00(4.4.84) on the custom PCBA and trying to access the USB 3.0 port to read media files but it not all seem to work. Test usb3.0 Transcend(32G) is succeed. But test usb3.0 SanDisk(32G/128G)、TOSHIBA(128G), doesn't get detected, and none print any message. I tried to format if as both FAT and NTFS file systems. But still doesn't get detected. Could you please give some suggestion here? Thanks in advance. + +Responses: +Hello, Can you try connecting the non-working USB3.0 flash device using a HUB and check if it works? Also since you mentioned USB3.0 port, What kind of USB receptacle does your custom PCBA have - USB3.0 Micro-AB or USB3.0 Type-A? regards, Praveen + +Hello, The non-working USB3.0 flash device using HUB(2.0), it can work. But it will detected usb2.0. USB receptacle is USB3.0 Type-A. regards, + +Hi, Can you try connecting this via a USB3.0 HUB and see if it gets enumerated? If it still does not get detected, we may have to look at the board schematics to see how the USB3.0 Type-A receptacle is hookup to the TDA2. One suggestion is to check & compare how the USB3 port is connect on the TI TDA2 EVM. regards, Praveen + +Hi, There is no usb 3.0 hub, and buying will be considered. Using hub test is suspected of power? As mentioned earlier, testing Transcend (32G) is succeed. Also need to check the board schematics? regards, + +Apart from Transcend (32G), is any other 3.0 device getting enumerated? Want to make sure that it is not a one-of device that's working.. To investigate futher, please do share the following: - Any device tree change made specific to USB - kernel boot log (dmesg) after boot. Also do share the dmesg log for working case and non-wokring case. The reason to ask for checking for board schematics is because the SS lines TXP/TXN, RXP/RXN are sensitive from signal-integrity and need to follow the layout recommentation as per recommendations in SPRAAR7. Hope this has been checked & verified. + +Hi, Testing Transcend (32G), SanDisk (32G/128G), TOSHIBA (128G). Only Transcend succeeded. fdtfile=dra72-evm-infoadas.dtb device tree change: - dra72-evm-common.dtsi extcon_usb1: extcon_usb1 { compatible = "linux,extcon-usb-gpio"; // id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; id-gpio = <&gpio6 5 GPIO_ACTIVE_HIGH>; }; extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; // id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; id-gpio = <&gpio6 5 GPIO_ACTIVE_HIGH>; }; &omap_dwc3_1 { extcon = <&extcon_usb1>; }; &omap_dwc3_2 { extcon = <&extcon_usb2>; }; &usb1 { // dr_mode = "otg"; dr_mode = "host"; }; &usb2 { dr_mode = "host"; }; - dra72-evm-tps65917.dtsi &usb2_phy1 { //' phy-supply = <&ldo4_reg>; }; &usb2_phy2 { //' phy-supply = <&ldo4_reg>; }; kernel boot log: Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00018-gd326d64-dirty (autorad@autorad-VirtualBox) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #17 SMP PREEMPT Fri Apr 13 14:46:17 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA722 Rev C EVM [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA722 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef64a000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=905c75ac-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 509272K/979968K available (6623K kernel code, 319K rwdata, 2388K rodata, 336K init, 290K bss, 298664K reserved, 172032K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d502c (9013 kB) [ 0.000000] .init : 0xc08d6000 - 0xc092a000 ( 336 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979da0 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000324] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000332] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000755] Console: colour dummy device 80x30 [ 0.000772] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000777] This ensures that you still see kernel messages. Please [ 0.000782] update your kernel commandline. [ 0.000795] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000807] pid_max: default: 32768 minimum: 301 [ 0.000907] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000918] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001476] Initializing cgroup subsys io [ 0.001494] Initializing cgroup subsys memory [ 0.001519] Initializing cgroup subsys devices [ 0.001531] Initializing cgroup subsys freezer [ 0.001543] Initializing cgroup subsys perf_event [ 0.001554] Initializing cgroup subsys pids [ 0.001582] CPU: Testing write buffer coherency: ok [ 0.001794] /cpus/cpu@0 missing clock-frequency property [ 0.001807] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001842] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.050030] Brought up 1 CPUs [ 0.050040] SMP: Total of 1 processors activated (12.29 BogoMIPS). [ 0.050047] CPU: All CPU(s) started in HYP mode. [ 0.050052] CPU: Virtualization extensions available. [ 0.050377] devtmpfs: initialized [ 0.080074] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.081093] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.262295] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.262319] futex hash table entries: 256 (order: 2, 16384 bytes) [ 0.273900] pinctrl core: initialized pinctrl subsystem [ 0.274846] NET: Registered protocol family 16 [ 0.275807] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.300210] cpuidle: using governor ladder [ 0.330237] cpuidle: using governor menu [ 0.338926] OMAP GPIO hardware version 0.1 [ 0.345277] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.367439] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.367450] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.367939] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.367948] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.368550] OMAP DMA hardware revision 0.0 [ 0.450911] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452098] edma 43300000.edma: memcpy is disabled [ 0.456797] edma 43300000.edma: TI EDMA DMA engine driver [ 0.458253] /fixedregulator-sd: could not get #gpio-cells for /ocp/i2c@48070000/gpio@21 [ 0.461374] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.461555] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.461731] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.461891] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.464614] i2c i2c-0: of_i2c: modalias failure on /ocp/i2c@48070000/gpio@20 [ 0.464628] i2c i2c-0: of_i2c: modalias failure on /ocp/i2c@48070000/gpio@21 [ 0.464996] palmas 0-0058: Irq flag is 0x00000000 [ 1.481490] omap_i2c 48070000.i2c: timeout waiting for bus ready [ 1.481504] palmas 0-0058: POLARITY_CTRL updat failed: -110 [ 1.481816] palmas: probe of 0-0058 failed with error -110 [ 1.481843] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 1.501680] pcf857x: probe of 4-0026 failed with error -121 [ 1.502081] pca953x 4-0020: failed reading register [ 1.502099] pca953x: probe of 4-0020 failed with error -121 [ 1.502252] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 100 kHz [ 1.502441] media: Linux media interface: v0.10 [ 1.502493] Linux video capture interface: v2.00 [ 1.502533] pps_core: LinuxPPS API ver. 1 registered [ 1.502540] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 1.502563] PTP clock support registered [ 1.502610] EDAC MC: Ver: 3.0.0 [ 1.512134] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 1.512337] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 1.512666] Advanced Linux Sound Architecture Driver Initialized. [ 1.513531] clocksource: Switched to clocksource arch_sys_counter [ 1.523589] NET: Registered protocol family 2 [ 1.524103] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 1.524167] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 1.524291] TCP: Hash tables configured (established 8192 bind 8192) [ 1.524348] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 1.524379] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 1.524593] NET: Registered protocol family 1 [ 1.534898] RPC: Registered named UNIX socket transport module. [ 1.534908] RPC: Registered udp transport module. [ 1.534914] RPC: Registered tcp transport module. [ 1.534920] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 1.535944] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 1.555885] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 1.566562] NFS: Registering the id_resolver key type [ 1.566590] Key type id_resolver registered [ 1.566598] Key type id_legacy registered [ 1.566653] ntfs: driver 2.1.32 [Flags: R/O]. [ 1.568180] bounce: pool size: 64 pages [ 1.568336] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 1.568351] io scheduler noop registered [ 1.568363] io scheduler deadline registered [ 1.568396] io scheduler cfq registered (default) [ 1.573209] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 1.573326] pinctrl-single 4a002e8c.pinmux: 1 pins at pa fc002e8c size 4 [ 1.576510] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 1.576523] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 1.576562] IO 0x20003000..0x20012fff -> 0x00000000 [ 1.576584] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 1.606660] dra7-pcie 51000000.pcie_rc: link is not up [ 1.606830] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 1.606843] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.606854] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 1.606864] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 1.607271] PCI: bus0: Fast back to back transfers disabled [ 1.607386] PCI: bus1: Fast back to back transfers enabled [ 1.607479] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 1.607495] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 1.607507] pci 0000:00:00.0: PCI bridge to [bus 01] [ 1.607736] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 1.663822] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 1.667280] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 2.683177] console [ttyS0] enabled [ 2.687611] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 [ 2.697627] [drm] Initialized drm 1.1.0 20060810 [ 2.703200] 58000000.dss supply vdda_video not found, using dummy regulator [ 2.710410] OMAP DSS rev 6.1 [ 2.714228] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 2.809836] loop: module loaded [ 2.813363] vmemexp device MAJOR num = 246 [ 2.817534] vmemexp class registered [ 2.821241] /dev/vmemexp device registered [ 2.825370] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 2.833033] m25p80 spi32766.0: unrecognized JEDEC id bytes: 9d, 60, 19 [ 2.840640] libphy: Fixed MDIO Bus: probed [ 2.846339] /ocp/ethernet@48484000: could not get #gpio-cells for /ocp/i2c@48070000/gpio@21 [ 2.903561] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 2.909684] libphy: 48485000.mdio: probed [ 2.916053] cpsw 48484000.ethernet: Detected MACID = 7c:01:0a:19:78:b0 [ 2.922704] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 2.929697] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:01:0a:19:78:b1 [ 2.938322] mousedev: PS/2 mouse device common for all mice [ 2.954655] i2c /dev entries driver [ 2.958859] ov490 4-0024: Failed reading register 0x300a! [ 2.964336] ov490: probe of 4-0024 failed with error -121 [ 2.974351] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 2.982424] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.987486] vsys_3v3: supplied by evm_12v0 [ 2.991651] evm_3v3: supplied by vsys_3v3 [ 2.995733] evm_3v3_sd: supplied by evm_3v3 [ 3.044048] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 3.050434] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 3.103894] omap_hsmmc 480d1000.mmc: no pinctrl state for sdr25 mode [ 3.110277] omap_hsmmc 480d1000.mmc: no pinctrl state for sdr12 mode [ 3.133535] omap_hsmmc 480d1000.mmc: no pinctrl state for hs mode [ 3.174285] ledtrig-cpu: registered to indicate activity on CPUs [ 3.194483] aic_dvdd: supplied by evm_3v3 [ 3.205121] NET: Registered protocol family 10 [ 3.213985] sit: IPv6 over IPv4 tunneling driver [ 3.219188] NET: Registered protocol family 17 [ 3.233773] Key type dns_resolver registered [ 3.238177] omap_voltage_late_init: Voltage driver support not added [ 3.264114] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.270322] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.283576] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 3.290182] Power Management for TI OMAP4+ devices. [ 3.313747] Registering SWP/SWPB emulation handler [ 3.321292] dmm 4e000000.dmm: initialized all PAT entries [ 3.334408] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.341055] [drm] No driver support for vblank timestamp query. [ 3.357636] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 3.385999] asoc-simple-card sound@0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 3.405758] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.411968] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.418246] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 3.425499] hctosys: unable to open rtc device (rtc0) [ 3.442446] mmc0: host does not support reading read-only switch, assuming write-enable [ 3.451262] aic_dvdd: disabling [ 3.454666] ALSA device list: [ 3.457645] #0: DRA7xx-EVM [ 3.461543] Waiting for root device PARTUUID=905c75ac-02... [ 3.468433] mmc0: new high speed SDHC card at address aaaa [ 3.484480] mmcblk0: mmc0:aaaa SL08G 7.40 GiB [ 3.490161] mmcblk0: p1 p2 [ 3.493862] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.500074] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.506471] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 3.557077] mmc1: MAN_BKOPS_EN bit is not set [ 3.594580] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 3.603367] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 3.672401] mmc1: new HS200 MMC card at address 0001 [ 3.688457] mmcblk1: mmc1:0001 IS008G 7.28 GiB [ 3.704163] mmcblk1boot0: mmc1:0001 IS008G partition 1 4.00 MiB [ 3.721480] mmcblk1boot1: mmc1:0001 IS008G partition 2 4.00 MiB [ 3.729466] mmcblk1: p1 p2 [ 3.734051] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 3.748377] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 3.762729] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 4.136073] EXT4-fs (mmcblk0p2): recovery complete [ 4.153541] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 4.161704] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 4.174493] devtmpfs: mounted [ 4.177691] Freeing unused kernel memory: 336K [ 4.182151] This architecture does not have kernel memory protection. [ 4.406050] systemd[1]: System time before build time, advancing clock. [ 4.453036] random: systemd: uninitialized urandom read (16 bytes read, 14 bits of entropy available) [ 4.485051] random: systemd: uninitialized urandom read (16 bytes read, 14 bits of entropy available) [ 4.505926] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 4.544003] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 4.584524] systemd[1]: Set hostname to . [ 4.662286] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 4.681155] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 4.703832] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 4.730789] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 4.769518] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) [ 4.840607] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 4.863820] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 4.883851] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 5.294826] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 5.302621] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 5.310427] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 5.317727] systemd[1]: sysinit.target: Found dependency on sockets.target/start [ 5.325178] systemd[1]: sysinit.target: Found dependency on dbus.socket/start [ 5.332349] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 5.339796] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 5.349251] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 5.386750] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 5.413924] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 5.444025] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 5.473763] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 5.495230] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 5.523876] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 5.553881] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 5.583889] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 5.613776] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.644005] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 5.687271] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 5.713828] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 5.733927] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 5.764584] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 5.796412] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 5.846329] systemd[1]: Starting Journal Service... Starting Journal Service... [ 5.876473] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 5.924016] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 5.956579] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 5.996404] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems...[ 6.028808] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) [ 6.039209] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 6.089239] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 6.126501] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 6.142841] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 6.174680] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 6.211059] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 6.243977] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 6.254016] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 6.284112] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Remount Root and Kernel File Systems. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Setup Virtual Console. Starting Apply Kernel Variables... Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Create Static Device Nodes in /dev. [ 7.151804] systemd-journald[100]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. Starting Create Volatile Files and Directories... [ OK ] Started Load/Save Random Seed. [ 8.209428] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 8.279115] remoteproc0: 55020000.ipu is available [ OK ] Started Create Volatile Files and Directories. [ 8.316285] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 8.405504] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 8.453835] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 8.461718] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 8.474088] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 8.480388] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 8.503437] remoteproc1: 40800000.dsp is available [ OK ] Started udev Coldplug all Devices. [ 8.568655] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 8.663809] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 8.795578] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 8.815045] remoteproc0: registered virtio0 (type 7) [ 8.868760] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 8.968621] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 8.994081] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ OK ] Found device /dev/ttyS0. [ 9.054765] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 9.073380] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm Starting Network Time Synchronization...[ 9.141099] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 9.212938] remoteproc1: registered virtio1 (type 7) Starting Update UTMP about System Boot/Shutdown... [ 9.289299] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 9.337778] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ 9.415182] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 9.421400] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 9.576554] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ OK ] Started Network Time Synchronization. [ 9.688641] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 9.742411] SCSI subsystem initialized [ 9.746551] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 9.752864] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 9.996095] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 10.002856] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ OK ] Started Update UTMP about System Boot/Shutdown. [ 10.179952] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 10.312406] scsi host0: ahci [ OK ] Reached target System Time Synchronized.[ 10.338271] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 340 Starting Synchronize System and HW clocks... [ 10.505789] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ OK ] Started Synchronize System and HW clocks. [ 10.562121] Error: Driver 'omap_wdt' is already registered, aborting... [ 10.592042] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 10.632492] CAN device driver interface [ 10.649004] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 10.677872] Error: Driver 'omap_wdt' is already registered, aborting... [ 10.686310] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 10.780606] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 10.787068] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 10.800844] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 10.826701] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 10.833019] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 10.844095] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 10.851718] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=351) [ 10.862024] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Reached target System Initialization. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ 10.965462] EXT4-fs (mmcblk1p2): recovery complete [ 10.970291] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 10.998652] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ OK ] Listening on dropbear.socket. [ 11.045824] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Listening on RPCbind Server Activation Socket. [ 11.081420] extcon-usb-gpio: probe of extcon_usb2 failed with error -16 [ OK ] Started Daily Cleanup of Temporary Directories. [ 11.109875] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ OK ] Reached target Timers. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ 11.191697] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ 11.198040] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ OK ] Reached target Basic System. Starting Print notice about GPLv3 packages... [ 11.295710] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 11.301926] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm Starting Login Service... [ OK ] Started Kernel Logging Service. [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. Starting Save/Restore Sound Card State... Starting Permit User Sessions... [ OK ] Started D-Bus System Message Bus. [ 11.522690] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 Starting Network Service... [ 12.166966] NET: Registered protocol family 15 [ OK ] Started System Logging Service. Starting uim-sysfs.service... Starting TI MultiCore Tools Daemon... Starting Avahi mDNS/DNS-SD Stack... Starting Telephony service... [ 12.594976] net eth1: initializing cpsw version 1.15 (0) [ 12.667712] net eth0: initialized cpsw ale version 1.4 [ OK ] Started Network Service. [ OK ] Started Save/Restore Sound Card State.[ 12.725112] net eth0: ALE Table size 1024 [ OK ] Started Permit User Sessions. [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ 12.804601] libphy: PHY 48485000.mdio:03 not found [ 12.861042] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 [ 12.968942] Bluetooth: Core ver 2.21 [ 13.009621] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 13.038210] NET: Registered protocol family 31 [ 13.090730] Bluetooth: HCI device and connection manager initialized [ 13.102834] Initializing XFRM netlink socket [ 13.109825] net eth0: initializing cpsw version 1.15 (0) [ 13.161617] Bluetooth: HCI socket layer initialized [ 13.195646] libphy: PHY 48485000.mdio:02 not found [ 13.223767] Bluetooth: L2CAP socket layer initialized [ 13.253498] net eth0: phy "48485000.mdio:02" not found on slave 0, err -19 [ 13.277877] Bluetooth: SCO socket layer initialized [ 13.352992] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 13.995695] random: nonblocking pool is initialized [ 14.889664] remoteproc0: powering up 55020000.ipu [ 15.040930] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 6042804 [ 15.113680] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 15.382867] remoteproc0: remote processor 55020000.ipu is now up [ 15.466926] virtio_rpmsg_bus virtio0: rpmsg host is online [ 15.514687] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 15.520905] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 15.528227] remoteproc1: powering up 40800000.dsp [ 15.606823] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 15.619553] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7461824 [ 15.715450] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 15.721353] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 15.727329] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 16.052032] remoteproc1: remote processor 40800000.dsp is now up [ 16.060348] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 16.164434] virtio_rpmsg_bus virtio1: rpmsg host is online [ 16.169989] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 16.220780] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 16.246077] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 16.252400] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 16.323510] NET: Registered protocol family 41 [ 16.370248] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 16.425663] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 16.473687] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 16.487999] usbcore: registered new interface driver usbfs [ 16.531919] usbcore: registered new interface driver hub [ 16.561630] usbcore: registered new device driver usb [ 16.650354] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 16.683742] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1 [ 16.731273] xhci-hcd xhci-hcd.0.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 16.793645] xhci-hcd xhci-hcd.0.auto: irq 458, io mem 0x48890000 [ 16.833129] hub 1-0:1.0: USB hub found [ 16.857677] hub 1-0:1.0: 1 port detected [ 16.876983] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 16.883200] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 16.891750] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 16.933623] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2 [ 16.972650] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 16.995209] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 17.024742] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 17.030959] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** 17.065015] hub 2-0:1.0: USB hub found [[;32m OK ]Started Print notice about GPLv3 packages. [ 17.167127] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 17.406505] hub 2-0:1.0: 1 port detected [ 17.474791] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 17.481008] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 17.546933] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 17.596958] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 17.603175] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 17.686309] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [[;32m OK ]Started Avahi mDNS/DNS-SD Stack. [[;32m OK ]Started Telephony service. [[;32m OK ]Started Login Service. [[;32m OK ]Listening on Load/Save RF Kill Switch Status dev/rfkill Watch. [ OK ] Reached target Sound Card. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Network Name Resolution. [ OK ] Started uim-sysfs.service. Starting rc.pvr.service... [ 18.946726] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started tiipclad-daemon.service. [ OK ] Started telnetd.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. custom board schematics: regards, + +Looking at the schematics, one thing that stand out is the 0.1 uF coupling capacitor looks to be mis-placed on the RXN/RXP lines instead of TXN/TXP lines. I am checking with USB H/W expert to confirm if this is the reason for the issue. So please do try testing by swapping them. One minor issue, but it is not the cause of the issue here. Looking at the DTB, both usb1 and usb2 is assigned the same id-gpio. It only mater for OTG case, but since in your case USB1 is host only, it is dont-care, but do correct it. extcon_usb1: extcon_usb1 { compatible = "linux,extcon-usb-gpio"; // id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; id-gpio = <&gpio6 5 GPIO_ACTIVE_HIGH>; }; extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; // id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; id-gpio = <&gpio6 5 GPIO_ACTIVE_HIGH>; }; -Praveen + diff --git a/data2/text/range/30001+/686793.txt b/data2/text/range/30001+/686793.txt new file mode 100644 index 0000000000000000000000000000000000000000..246a9966002a39eee9d1e7827978e3921a044eaa --- /dev/null +++ b/data2/text/range/30001+/686793.txt @@ -0,0 +1,10 @@ +Ticket Name: CCS/TDA2: Memory exception + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio i am using ccs load program and run on C66 , when i run the program the Memory exception. Memory is sometimes right and sometimes wrong， if cpu restart or relaunch Memory is Different. here is the cmd file -stack 0x3000 -heap 0x2000000 MEMORY { L1P_SRAM : origin = 0x00E00000, len = 0x8000 L1D_CACHE : origin = 0x00F00000, len = 0x8000 /* 16 KB cache */ L2_SRAM : origin = 0x00800000, len = 0x48000 /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/ DSP2_L2_SRAM : origin = 0x40800000, len = 0x48000 SL2_SRAM : origin = 0x5B000000, len = 0x40000 EXT_MEM_CACHE : origin = 0x80000000, len = 0x08000000 /* DSP Used cachable area */ } SECTIONS { vectors :> EXT_MEM_CACHE .cinit :> EXT_MEM_CACHE .cio :> EXT_MEM_CACHE .bss :> EXT_MEM_CACHE ////usually reserves space for uninitialized variables .text :> EXT_MEM_CACHE //////contains executable code .const :> EXT_MEM_CACHE .far :> EXT_MEM_CACHE .fardata :> EXT_MEM_CACHE /////usually contains initialized data .neardata :> EXT_MEM_CACHE ///////usually contains initialized data .rodata :> EXT_MEM_CACHE .sysmem :> EXT_MEM_CACHE .switch :> EXT_MEM_CACHE .L2SramSect :> L2_SRAM .stack :> L2_SRAM } here is some code #define IMG_WIDTH 768 #define IMG_HEIGHT 72 #ifdef TI_DSP #define L2SRAM_SIZE (32*1024) #pragma DATA_SECTION (L2SRAM,".L2SramSect"); unsigned char L2SRAM[L2SRAM_SIZE]; #define L2TMP_SIZE (160*1024) #pragma DATA_SECTION (L2TMP,".L2SramSect"); unsigned char L2TMP[L2TMP_SIZE]; #endif void iFreeDetBuffer(unsigned char * g_pBuffer) { if (g_pBuffer) { free(g_pBuffer); g_pBuffer = NULL; } } #ifdef TI_DSP #pragma DATA_SECTION (input_img,".L2SramSect"); unsigned char input_img[55296] = { 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}; #endif int main() { unsigned char * g_pBuffer = NULL; int BUFFER_SIZE = (1024 * 1024 * 20 * sizeof(char)); //3M is OK g_pBuffer = (unsigned char *)malloc(BUFFER_SIZE); memset(g_pBuffer,205,BUFFER_SIZE); TIMemMgr * pMemMgr; pMemMgr->L2.pMem = L2SRAM; pMemMgr->L2.nMemLen = L2SRAM_SIZE; pMemMgr->L2TMP.pMem = L2TMP; pMemMgr->L2TMP.nMemLen = L2TMP_SIZE; pMemMgr->DDR.pMem = g_pBuffer; pMemMgr->DDR.nMemLen = BUFFER_SIZE; //g_hMemMgr = (void*)pMemMgr; printf(" DDR.nMemLen_st=%d,pMemMgr->DDR.pMem=%x\n",pMemMgr->DDR.nMemLen,pMemMgr->DDR.pMem); printf(" L2.nMemLen_st=%d,pMemMgr->L2.pMem=%x\n",pMemMgr->L2.nMemLen,pMemMgr->L2.pMem); printf(" L2TMP.nMemLen_st=%d,pMemMgr->L2TMP.pMem=%x\n",pMemMgr->L2TMP.nMemLen,pMemMgr->L2TMP.pMem); MHandle g_hDetEngine = NULL; /////////////loadnet //if (!g_hDetEngine) { success = AHD_Create( (void*)pMemMgr,MAX_HAND_NUM,&g_hDetEngine); if (success != 0) { fprintf(stderr,"detector initialize err\n"); } } printf(" DDR.nMemLen_ov=%d\n",pMemMgr->DDR.nMemLen); printf(" L2.nMemLen_ov=%d\n",pMemMgr->L2.nMemLen); printf(" L2TMP.nMemLen_st=%d\n",pMemMgr->L2TMP.nMemLen); ///////////// ASVLOFFSCREEN g_sImage = { 0 }; g_sImage.i32Width = IMG_WIDTH; g_sImage.i32Height = IMG_HEIGHT; g_sImage.pi32Pitch[0] = GET_LINE_BYTES(g_sImage.i32Width,8); g_sImage.pi32Pitch[1] = GET_LINE_BYTES(g_sImage.i32Width >> 1,16); g_sImage.u32PixelArrayFormat = ASVL_PAF_NV21; g_sImage.ppu8Plane[0] = input_img; AHD_SIGNS g_sHandObj = { 0 }; success = AHD_Detect(g_hDetEngine,&g_sImage,0,0,0xFFFFFFFF - 1,NULL,&g_sHandObj); if (success != 0) { printf("detector processing err\n"); return; } if (g_sImage.ppu8Plane[0]) { free(g_sImage.ppu8Plane[0]); } iFreeDetBuffer(g_pBuffer); return 0; } console inf normal output DDR.nMemLen_st=20971520,pMemMgr->DDR.pMem=80000118 L2.nMemLen_st=32768,pMemMgr->L2.pMem=800000 L2TMP.nMemLen_st=163840,pMemMgr->L2TMP.pMem=808000 DDR.nMemLen_ov=5395480 L2.nMemLen_ov=3056 L2TMP.nMemLen_st=163840 but more often is like this DDR.nMemLen_st=-2112315241,pMemMgr->DDR.pMem=1 L2.nMemLen_st=-2147483368,pMemMgr->L2.pMem=cc0f1d26 L2TMP.nMemLen_st=2015735056,pMemMgr->L2TMP.pMem=0 detector initialize err DDR.nMemLen_ov=-2147483368 L2.nMemLen_ov=2015735056 L2TMP.nMemLen_st=-2147483368 c_times = 0.000992 ms detector processing err i donot know what may cause this problem! + +Responses: +Can you clarify if you're using any L2 cache? From a comment in your linker configuration file ( /* SARAM in L2, = 256 + 32 - 128 = 160 KB*/) it looks like 128k of L2 cache may be used. + +TIMemMgr * pMemMgr; is the problem TIMemMgr pMemMgr; is ok ! + diff --git a/data2/text/range/30001+/693833.txt b/data2/text/range/30001+/693833.txt new file mode 100644 index 0000000000000000000000000000000000000000..2ebddf07e27ab22e15dc4dce11a5a70e5c44a938 --- /dev/null +++ b/data2/text/range/30001+/693833.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: what imgproc_canny_dsp_bin in imgproc_canny.dsp_h + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux in vision_sdk\apps\src\rtos\alg_plugins\openclcannyedge\kernel\ imgproc_canny.dsp_h imgproc_canny_dsp_bin what is this file ? its for what ? + +Responses: +Hi shuai wang, Unfortunately, We are not actively supporting openCL on TDA2x. Can you let us know what you are trying to do and we can suggest you alternate way. regards yashwant + +Hi :yashwant I have some algorithms to allocate to A15 and DSP multicore, I want to pack them into a A15 library to the customer, if LINK is used as a separate LINK, and the call relationship is also exposed, so my company wants me to use OPENCL to seal up several different and upper algorithms, and the user is a A15 library. The library calls other cores without the user's concern. So I tried to run an instance of OPENCL in SDK, but I couldn't run it. Here is my LOG OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 2 ms (80.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3552144 bytes read in 89 ms (38.1 MiB/s) 106665 bytes read in 28 ms (3.6 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x363390 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00018-gd326d64 (htf@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Apr 2 20:16:47 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) [ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000327] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000335] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000769] Console: colour dummy device 80x30 [ 0.000785] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000791] This ensures that you still see kernel messages. Please [ 0.000796] update your kernel commandline. [ 0.000810] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000822] pid_max: default: 32768 minimum: 301 [ 0.000918] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000929] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001469] Initializing cgroup subsys io [ 0.001486] Initializing cgroup subsys memory [ 0.001510] Initializing cgroup subsys devices [ 0.001522] Initializing cgroup subsys freezer [ 0.001533] Initializing cgroup subsys perf_event [ 0.001545] Initializing cgroup subsys pids [ 0.001572] CPU: Testing write buffer coherency: ok [ 0.001772] /cpus/cpu@0 missing clock-frequency property [ 0.001788] /cpus/cpu@1 missing clock-frequency property [ 0.001798] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001831] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080065] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080133] Brought up 2 CPUs [ 0.080146] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080153] CPU: All CPU(s) started in HYP mode. [ 0.080158] CPU: Virtualization extensions available. [ 0.080537] devtmpfs: initialized [ 0.108980] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.109928] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.312630] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.312650] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.316873] pinctrl core: initialized pinctrl subsystem [ 0.317729] NET: Registered protocol family 16 [ 0.318651] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340221] cpuidle: using governor ladder [ 0.370245] cpuidle: using governor menu [ 0.378720] OMAP GPIO hardware version 0.1 [ 0.385098] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.401116] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.401129] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.410379] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.410389] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.410857] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.410868] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.411448] OMAP DMA hardware revision 0.0 [ 0.451378] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452550] edma 43300000.edma: memcpy is disabled [ 0.457158] edma 43300000.edma: TI EDMA DMA engine driver [ 0.461591] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.461776] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.461937] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.462092] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.462382] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.462568] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.465569] palmas 0-0058: IRQ missing: skipping irq request [ 0.481007] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.553335] pcf857x 0-0020: probed [ 0.553895] pcf857x 0-0021: probed [ 0.554045] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.554434] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.554635] media: Linux media interface: v0.10 [ 0.554687] Linux video capture interface: v2.00 [ 0.554729] pps_core: LinuxPPS API ver. 1 registered [ 0.554736] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.554761] PTP clock support registered [ 0.554806] EDAC MC: Ver: 3.0.0 [ 0.555555] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.555862] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.556193] Advanced Linux Sound Architecture Driver Initialized. [ 0.557025] clocksource: Switched to clocksource arch_sys_counter [ 0.567611] NET: Registered protocol family 2 [ 0.568108] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.568172] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.568297] TCP: Hash tables configured (established 8192 bind 8192) [ 0.568344] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.568375] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.568585] NET: Registered protocol family 1 [ 0.568853] RPC: Registered named UNIX socket transport module. [ 0.568862] RPC: Registered udp transport module. [ 0.568868] RPC: Registered tcp transport module. [ 0.568874] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.569881] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.579909] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.580558] NFS: Registering the id_resolver key type [ 0.580587] Key type id_resolver registered [ 0.580595] Key type id_legacy registered [ 0.580648] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.581913] bounce: pool size: 64 pages [ 0.582060] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.582075] io scheduler noop registered [ 0.582087] io scheduler deadline registered [ 0.582120] io scheduler cfq registered (default) [ 0.587091] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.590306] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.590319] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.590353] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.590374] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.620563] dra7-pcie 51000000.pcie_rc: link is not up [ 0.620739] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.620752] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.620762] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.620772] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.621173] PCI: bus0: Fast back to back transfers disabled [ 0.621294] PCI: bus1: Fast back to back transfers enabled [ 0.621376] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.621391] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.621403] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.621618] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.681594] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.684974] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.693337] console [ttyS0] enabled [ 1.697736] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.707442] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.717500] [drm] Initialized drm 1.1.0 20060810 [ 1.723523] OMAP DSS rev 6.1 [ 1.727302] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.742839] loop: module loaded [ 1.746352] vmemexp device MAJOR num = 246 [ 1.750499] vmemexp class registered [ 1.754207] /dev/vmemexp device registered [ 1.758338] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.764011] nand: No NAND device found [ 1.767800] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.777748] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.783145] 7 ofpart partitions found on MTD device spi32766.0 [ 1.789026] Creating 7 MTD partitions on "spi32766.0": [ 1.794188] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.800307] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.806633] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.813582] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.820286] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.827691] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.834039] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.841841] libphy: Fixed MDIO Bus: probed [ 1.897059] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.903184] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.913281] libphy: 48485000.mdio: probed [ 1.917329] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.925369] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.934061] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.940724] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.947709] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.956307] mousedev: PS/2 mouse device common for all mice [ 1.962504] i2c /dev entries driver [ 1.971226] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.976785] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.983186] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.989718] evm_3v3_sw: supplied by sysen1 [ 2.070815] mmc0: MAN_BKOPS_EN bit is not set [ 2.107576] mmc0: new HS200 MMC card at address 0001 [ 2.123036] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.137863] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.144021] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.151384] ledtrig-cpu: registered to indicate activity on CPUs [ 2.159917] aic_dvdd: supplied by evm_3v3_sw [ 2.165784] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.173309] NET: Registered protocol family 10 [ 2.188640] sit: IPv6 over IPv4 tunneling driver [ 2.193806] NET: Registered protocol family 17 [ 2.198562] Key type dns_resolver registered [ 2.202962] omap_voltage_late_init: Voltage driver support not added [ 2.209872] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.216080] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.222805] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.229058] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.237286] Power Management for TI OMAP4+ devices. [ 2.242358] Registering SWP/SWPB emulation handler [ 2.249309] dmm 4e000000.dmm: initialized all PAT entries [ 2.256628] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.263322] [drm] No driver support for vblank timestamp query. [ 2.269632] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.286474] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.328360] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.347862] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.357739] hctosys: unable to open rtc device (rtc0) [ 2.373877] evm_1v8: disabling [ 2.376950] aic_dvdd: disabling [ 2.380150] vmmcwl_fixed: disabling [ 2.383832] ldousb: disabling [ 2.387259] ALSA device list: [ 2.390250] #0: DRA7xx-EVM [ 2.396794] Waiting for root device PARTUUID=2ca9f500-02... [ 2.646335] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.661490] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.678492] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.688183] mmcblk1: p1 p2 [ 2.730331] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 2.741989] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 3.143455] EXT4-fs (mmcblk1p2): recovery complete [ 3.149151] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 3.157330] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 3.168299] devtmpfs: mounted [ 3.171505] Freeing unused kernel memory: 340K [ 3.175968] This architecture does not have kernel memory protection. [ 3.300179] systemd[1]: System time before build time, advancing clock. [ 3.331473] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.347549] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.359360] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 3.377896] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.411236] systemd[1]: Set hostname to . [ 3.470071] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.480820] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.496783] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.529001] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 3.543076] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 3.614186] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 3.623744] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 3.633714] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 3.970731] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start [ 3.978551] systemd[1]: sockets.target: Found dependency on avahi-daemon.socket/start [ 3.986420] systemd[1]: sockets.target: Found dependency on sysinit.target/start [ 3.993869] systemd[1]: sockets.target: Found dependency on alignment.service/start [ 4.001604] systemd[1]: sockets.target: Found dependency on basic.target/start [ 4.008881] systemd[1]: sockets.target: Found dependency on sockets.target/start [ 4.016313] systemd[1]: sockets.target: Breaking ordering cycle by deleting job avahi-daemon.socket/start [ 4.025947] systemd[1]: avahi-daemon.socket: Job avahi-daemon.socket/start deleted to break ordering cycle starting with sockets.target/start [ SKIP ] Ordering cycle found, skipping Avah...S/DNS-SD Stack Activation Socket [ 4.067368] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start [ 4.075151] systemd[1]: sockets.target: Found dependency on rpcbind.socket/start [ 4.082624] systemd[1]: sockets.target: Found dependency on sysinit.target/start [ 4.090070] systemd[1]: sockets.target: Found dependency on alignment.service/start [ 4.097783] systemd[1]: sockets.target: Found dependency on basic.target/start [ 4.105039] systemd[1]: sockets.target: Found dependency on sockets.target/start [ 4.112494] systemd[1]: sockets.target: Breaking ordering cycle by deleting job rpcbind.socket/start [ 4.121689] systemd[1]: rpcbind.socket: Job rpcbind.socket/start deleted to break ordering cycle starting with sockets.target/start [ SKIP ] Ordering cycle found, skipping RPCbind Server Activation Socket [ 4.157388] systemd[1]: basic.target: Found ordering cycle on basic.target/start [ 4.164823] systemd[1]: basic.target: Found dependency on sysinit.target/start [ 4.172098] systemd[1]: basic.target: Found dependency on alignment.service/start [ 4.179632] systemd[1]: basic.target: Found dependency on basic.target/start [ 4.186714] systemd[1]: basic.target: Breaking ordering cycle by deleting job alignment.service/start [ 4.195990] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with basic.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 4.229413] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.257286] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 4.277332] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 4.297412] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 4.327342] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 4.358807] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.387862] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.437232] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.459598] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 4.494950] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 4.517356] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 4.537936] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 4.567242] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.587288] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 4.607849] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.667424] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.699410] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 4.727367] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.757464] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.817431] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.832700] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ 4.847517] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 4.877459] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 4.937447] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.968192] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 5.027423] systemd[1]: Starting Journal Service... Starting Journal Service... [ 5.063536] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 5.097427] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 5.117366] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 5.147449] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Setup Virtual Console. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Create list of required sta...ce nodes for the current kernel. Starting Create Static Device Nodes in /dev... Starting udev Coldplug all Devices... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 5.805093] systemd-journald[162]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. Starting Load/Save Random Seed... [ 6.273721] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ OK ] Reached target Local File Systems. [ 6.295900] remoteproc0: 55020000.ipu is available [ 6.317112] remoteproc0: Note: remoteproc is still under development and considered experimental. Starting Create Volatile Files and Directories... [ 6.331631] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started udev Coldplug all Devices.[ 6.358034] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 6.389032] remoteproc1: 40800000.dsp is available [ OK ] Started Load/Save Random Seed.[ 6.398061] remoteproc1: Note: remoteproc is still under development and considered experimental. [ OK ] Started Create Volatile Files and Directories. [ 6.438890] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 6.452073] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 6.470097] remoteproc2: 41000000.dsp is available [ 6.485886] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 6.507309] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Found device /dev/ttyS0. Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ 6.742946] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ 6.759901] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ OK ] Started Network Time Synchronization. [ 6.963331] CAN device driver interface [ 6.972059] remoteproc1: registered virtio0 (type 7) Starting Synchronize System and HW clocks... [ 7.022042] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) [ OK ] Reached target System Time Synchronized. [ 7.074620] remoteproc2: registered virtio1 (type 7) [ 7.120236] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ OK ] Started Synchronize System and HW clocks. [ 7.172836] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Reached target System Initialization. [ 7.298842] SCSI subsystem initialized [ 7.325224] remoteproc0: registered virtio2 (type 7) [ OK ] Listening on dropbear.socket. [ OK ] Listening on D-Bus System Message Bus Socket. [ 7.363196] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 7.371400] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ OK ] Reached target Sockets. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Reached target Basic System. [ 7.465609] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ 7.502693] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled Starting TI MultiCore Tools Daemon... [ 7.525591] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ OK ] Started System Logging Service.[ 7.563805] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst Starting Permit User Sessions... [ OK ] Started Kernel Logging Service. [ 7.656392] scsi host0: ahci [ 7.659748] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 Starting Print notice about GPLv3 packages... Starting Save/Restore Sound Card State... Starting Telephony service... Starting uim-sysfs.service... [ OK ] Started D-Bus System Message Bus. [ OK ] Started Telephony service. Starting Network Service... [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. Starting Login Service... [ 8.037071] ata1: SATA link down (SStatus 0 SControl 300) [FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 8.190710] Bluetooth: Core ver 2.21 [ 8.208327] NET: Registered protocol family 31 [ 8.227226] Bluetooth: HCI device and connection manager initialized [ 8.257370] net eth1: initializing cpsw version 1.15 (0) [ 8.260315] Bluetooth: HCI socket layer initialized [ 8.260323] Bluetooth: L2CAP socket layer initialized [ 8.260356] Bluetooth: SCO socket layer initialized [ OK ] Started Network Service. [ 8.376713] net eth0: initialized cpsw ale version 1.4 [ 8.384550] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 8.440875] net eth0: ALE Table size 1024 [ 8.473309] net eth1: phy found : id is : 0x20005c7a [ 8.512692] NET: Registered protocol family 15 [ 8.553672] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 8.632955] net eth0: initializing cpsw version 1.15 (0) [ 8.702115] net eth0: phy found : id is : 0x20005c7a [ 8.743222] Initializing XFRM netlink socket [ 8.749748] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 8.777944] random: nonblocking pool is initialized [ 9.115187] remoteproc1: powering up 40800000.dsp [ 9.150786] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 [ 9.175503] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 9.181393] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 9.187321] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 9.262915] remoteproc1: remote processor 40800000.dsp is now up [ 9.299104] virtio_rpmsg_bus virtio0: rpmsg host is online [ 9.313926] remoteproc2: powering up 41000000.dsp [ 9.341126] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 [ 9.379596] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 9.385488] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 9.391428] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 9.532181] remoteproc2: remote processor 41000000.dsp is now up [ 9.554085] virtio_rpmsg_bus virtio1: rpmsg host is online [ 9.570819] remoteproc0: powering up 55020000.ipu [ 9.610506] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 [ 9.628187] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 9.715815] remoteproc0: remote processor 55020000.ipu is now up [ 9.744684] virtio_rpmsg_bus virtio2: rpmsg host is online [ 9.972804] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 9.988220] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 9.996737] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 10.043729] NET: Registered protocol family 41 [ 10.070846] usbcore: registered new interface driver usbfs [ 10.085317] usbcore: registered new interface driver hub [ 10.094748] usbcore: registered new device driver usb [ OK ] Started Login Service. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ 10.149895] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 10.156895] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 10.185974] dwc3 48890000.usb: otg: can't start till gadget registers [ 10.196141] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 10.204741] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 10.221372] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ 10.238473] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ OK ] Started Network Name Resolution. [ 10.265832] hub 1-0:1.0: USB hub found [ 10.270819] hub 1-0:1.0: 1 port detected [ 10.297154] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 10.309253] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 10.327745] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 10.349677] hub 2-0:1.0: USB hub found [ 10.357146] hub 2-0:1.0: 1 port detected *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ OK ] Started uim-sysfs.service. [ 10.704628] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 10.715231] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ OK ] Started Print notice about GPLv3 packages. Starting rc.pvr.service... [ 10.851920] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started tiipclad-daemon.service. [ OK ] Started telnetd.service. Starting thttpd.service... [ OK ] Started thttpd.service. Starting rng-tools.service... [ OK ] Started rng-tools.service. Starting gdbserverproxy.service... [ OK ] Started gdbserverproxy.service. Starting matrix-gui-2.0.service... [ OK ] Started matrix-gui-2.0.service. Starting thermal-zone-init.service... [ OK ] Started thermal-zone-init.service. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# ./start.sh Opened log file: lad.txt numProcessors = 5 id = 0 baseId = 0 Spawned daemon: /usr/bin/lad_dra7xx [ 22.545887] CMEMK module: reference Linux version 4.4.84 [ 22.552414] allocated heap buffer 0x40400000 of size 0x100000 [ 22.560124] cmemk initialized insmod: ERROR: could not load module /opt/vision_sdk/debugss_kmodule.ko: No such file or directory insmod: ERROR: could not load module /opt/vision_sdk/gdbserverproxy.ko: No such file or directory [ 22.606501] DMA: Module install successful, device major num = 242 [ 22.612880] DRV: Module install successful insmod: ERROR: could not insert module ./bin/cmemk.ko: File exists ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6644000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6c44000 of size 0x0fa00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6b84000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6bc4000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 22.878055] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 22.920078] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [ HOST] [HOST ] 29.582962 s: SYSTEM: System A15 Init in proress !!! [HOST] [HOST ] 29.583053 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 29.583084 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 29.583297 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 29.583328 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 29.583358 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 29.583358 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 29.583480 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 29.583511 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 29.583602 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 29.583602 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 29.583602 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 29.583694 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 29.583785 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 29.583877 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 29.583968 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 29.584090 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 29.584243 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 29.584395 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 29.584548 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 29.584700 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 29.584853 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 29.585005 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 29.585158 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 29.585280 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 29.585402 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 29.585554 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 29.585707 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 29.585829 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 29.585951 s: ALGORITHM_2 : Init done - linkid-0x2000033 [HOST] [HOST ] 29.586103 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 29.586225 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 29.586378 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 29.586530 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 29.586652 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 29.586835 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 29.587018 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 29.587201 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 29.587384 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 29.587537 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 29.587659 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 29.587781 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 29.587872 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 29.587964 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 29.588086 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 29.588177 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 29.588299 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 29.588421 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 29.588513 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 29.588696 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 29.588787 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 29.588909 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 29.589001 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 29.589123 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 29.589214 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 29.589306 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 29.589306 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 29.589702 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [HOST ] 29.589702 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 29.589824 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 29.589885 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [HOST] [IPU2 ] 16.495394 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 16.526749 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 16.557951 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 16.589214 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 16.589306 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 16.589397 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 16.589489 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 16.589550 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 16.589641 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 16.589763 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 16.592875 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 16.603916 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 16.604038 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 16.604160 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 16.606996 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 16.610077 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 16.621667 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 16.641706 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 16.661715 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 16.681754 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 16.681845 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 16.681998 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 16.682120 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 16.682272 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 16.682394 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 16.682516 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 16.682638 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 16.684407 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 16.685323 s: RpmsgInit in progress... [HOST] [IPU2 ] 16.685414 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 16.685994 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 16.691118 s: SYSTEM: Initializing TIOVX ... [HOST] [IPU2 ] 16.691362 s: VX_ZONE_INIT:Enabled [HOST] [IPU2 ] 16.691484 s: VX_ZONE_ERROR:Enabled [HOST] [IPU2 ] 16.691606 s: VX_ZONE_WARNING:Enabled [HOST] [IPU2 ] 16.695296 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [HOST] [IPU2 ] 16.695388 s: SYSTEM: Initializing TIOVX ... Done !!! [HOST] [IPU2 ] 16.695449 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 16.695510 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 16.695601 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 16.695662 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 16.695723 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 16.700329 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 16.700390 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 16.700573 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 16.700634 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 16.700695 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 16.703928 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 16.704050 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 16.704111 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 16.704264 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 16.704355 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 16.704416 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.704782 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 16.704874 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 16.704965 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 16.705057 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 16.705148 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 16.705240 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.705606 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 16.705697 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 16.705789 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 16.705880 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 16.705972 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 16.706063 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.706429 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 16.706521 s: VPDMA Firmware Address = 0xa035ba40 [HOST] [IPU2 ] 16.706612 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 16.706704 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 16.706795 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 16.706856 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 16.767065 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 16.768010 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 16.768315 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 16.768407 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) [HOST] [IPU2 ] 16.768590 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 16.768742 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) [HOST] [IPU2 ] 16.768925 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 16.769078 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 17.032971 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 17.120234 s: CHAINS: Application Started !!! [HOST] [IPU2 ] 17.130482 s: BOARD: Board Init in progress !!! [HOST] [IPU2 ] 17.130970 s: BOARD: Board Init Done !!! [HOST] [IPU2 ] 17.138870 s: [HOST] [HOST ] 30.141523 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Vision SDK Usecases [HOST] [HOST ] ==================== [HOST] [HOST ] 1: Single Camera Usecases [HOST] [HOST ] 2: Multi-Camera LVDS Usecases [HOST] [HOST ] 3: Open-Compute Usecases [HOST] [HOST ] [HOST] [HOST ] p: CPU Status [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) [HOST] [HOST ] [HOST] [HOST ] s: System Settings [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] x [HOST] [HOST ] 34.076252 s: SYSTEM: System A15 De-Init in progress !!! [HOST] [HOST ] 34.076282 s: SYSTEM: De-Initializing A15 Links !!! [HOST] [HOST ] 34.076374 s: IPC_OUT_0 : DeInit done - linkid-0x2000000 [HOST] [HOST ] 34.076465 s: IPC_OUT_1 : DeInit done - linkid-0x2000001 [HOST] [HOST ] 34.076557 s: IPC_OUT_2 : DeInit done - linkid-0x2000002 [HOST] [HOST ] 34.076648 s: IPC_OUT_3 : DeInit done - linkid-0x2000003 [HOST] [HOST ] 34.076801 s: IPC_OUT_4 : DeInit done - linkid-0x2000004 [HOST] [HOST ] 34.076923 s: IPC_IN_0 : DeInit done - linkid-0x200000a [HOST] [HOST ] 34.077075 s: IPC_IN_1 : DeInit done - linkid-0x200000b [HOST] [HOST ] 34.077197 s: IPC_IN_2 : DeInit done - linkid-0x200000c [HOST] [HOST ] 34.077319 s: IPC_IN_3 : DeInit done - linkid-0x200000d [HOST] [HOST ] 34.077441 s: IPC_IN_4 : DeInit done - linkid-0x200000e [HOST] [HOST ] 34.077563 s: IPC_IN_5 : DeInit done - linkid-0x200000f [HOST] [HOST ] 34.077685 s: IPC_IN_6 : DeInit done - linkid-0x2000010 [HOST] [HOST ] 34.077807 s: NULL_0 : DeInit done - linkid-0x2000014 [HOST] [HOST ] 34.077929 s: NULL_1 : DeInit done - linkid-0x2000015 [HOST] [HOST ] 34.078051 s: NULL_SRC_0 : DeInit done - linkid-0x2000039 [HOST] [HOST ] 34.078173 s: ALGORITHM_0 : DeInit done - linkid-0x2000031 [HOST] [HOST ] 34.078265 s: ALGORITHM_1 : DeInit done - linkid-0x2000032 [HOST] [HOST ] 34.078356 s: ALGORITHM_2 : DeInit done - linkid-0x2000033 [HOST] [HOST ] 34.078417 s: ALGORITHM_3 : DeInit done - linkid-0x2000034 [HOST] [HOST ] 34.078509 s: ALGORITHM_4 : DeInit done - linkid-0x2000035 [HOST] [HOST ] 34.078600 s: ALGORITHM_5 : DeInit done - linkid-0x2000036 [HOST] [HOST ] 34.078692 s: ALGORITHM_6 : DeInit done - linkid-0x2000037 [HOST] [HOST ] 34.078783 s: ALGORITHM_7 : DeInit done - linkid-0x2000038 [HOST] [HOST ] 34.078905 s: DUP0 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079027 s: DUP1 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079149 s: DUP2 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079271 s: DUP3 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079546 s: DUP4 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079668 s: SYNC_0 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079790 s: SYNC_1 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.079942 s: SYNC_2 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080034 s: SYNC_3 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080156 s: MERGE_0 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080278 s: MERGE_1 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080400 s: MERGE_2 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080522 s: MERGE_3 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080644 s: MERGE_4 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080796 s: SELECT_0 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.080918 s: SELECT_1 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.081040 s: GATE_0 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.081162 s: GATE_1 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.081284 s: GATE_2 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.081376 s: GATE_3 : DeInit done - linkid-0x0 [HOST] [HOST ] 34.081498 s: SGXFRMCPY_0 : DeInit done - linkid-0x2000040 [HOST] [HOST ] 34.081498 s: SYSTEM: De-Initializing A15 Links ... DONE !!! [HOST] [HOST ] 34.081498 s: SYSTEM: IPC: De-init in progress !!! [HOST] [HOST ] 34.081498 s: SYSTEM: MSGQ: MsgQ de-init in progress !!! [HOST] [HOST ] 34.081650 s: SYSTEM: MSGQ: MsgQ de-init DONE !!! [HOST] [HOST ] 34.081650 s: SYSTEM: IPC: Notify de-init in progress !!! [HOST] [HOST ] 34.081955 s: SYSTEM: IPC: Notify de-init DONE !!! [HOST] [HOST ] 34.081955 s: SYSTEM: IPC: De-init DONE !!! [HOST] [HOST ] 34.081986 s: SYSTEM: System A15 De-Init Done !!! CMEM Error: registerAlloc: ioctl CMEM_IOCREGUSER failed for phys addr 0xa9000000: -1 TIOCL FATAL: The TI Multicore Tools daemon (/usr/bin/ti-mctd) is not running. Re-run application after starting the daemon. Refer User Guide for details. ./start.sh: line 6: 1044 Aborted (core dumped) ./apps.out root@dra7xx-evm:~# + +can you let us know what kind of algorithm and data flow you target to implement pls? so that, we can suggest how to use visionsdk library and heterogeneous architecture more effectively. + +Hi: first of all ,i think i have to run OPENCL USE CASE ,but it fail, follow is the log , what is the problem? [HOST] [HOST ] 40.209876 s: [HOST] [HOST ] 40.209876 s: [HOST] [HOST ] [HOST] [HOST ] OpenCL Usecases [HOST] [HOST ] ---------------------------- [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY [HOST] [HOST ] 4: OpenCL framecopy Usecases [HOST] [HOST ] 5: Chains_openclFrameCopy_DecodeDisplay [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 43.154120 s: [HOST] [IPU2 ] 43.154303 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 43.154791 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 43.250289 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [HOST] [IPU2 ] 43.250625 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 43.265753 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 43.266150 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [HOST ] 43.387360 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 43.386262 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 43.386719 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 43.387085 s: IPC_OUT_0 : Create Done !!! ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) [HOST] [HOST ] 43.387817 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 43.387909 s: ALG: ERROR: No alg create function specified (algId = 6) !!! + diff --git a/data2/text/range/30001+/695363.txt b/data2/text/range/30001+/695363.txt new file mode 100644 index 0000000000000000000000000000000000000000..ef523139f45f32b7be0472ee8e29d38997faceb4 --- /dev/null +++ b/data2/text/range/30001+/695363.txt @@ -0,0 +1,2253 @@ +Ticket Name: Linux/TDA2: vip_single_cam_openclframe_copy No alg create function specified ERROR + +Query Text: +Part Number: TDA2 Tool/software: Linux I have compiled the example of(vip_single_cam_openclframe_copy) successfully， and my config is tda2xx_evm_linux_opencx， Run in a hardware environment ，An error occurred： [HOST] [HOST ] 89.268193 s: [HOST] [IPU2 ] 89.268346 s: CHAINS: Sensor create in progress [HOST] [IPU2 ] 89.268895 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [HOST] [IPU2 ] 89.365796 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [HOST] [IPU2 ] 89.366101 s: CHAINS: Sensor create ... DONE !!! [HOST] [IPU2 ] 89.381199 s: CAPTURE: Create in progress !!! [HOST] [IPU2 ] 89.381595 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [HOST] [HOST ] 89.503233 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 89.502135 s: CAPTURE: Create Done !!! [HOST] [IPU2 ] 89.502623 s: IPC_OUT_0 : Create in progress !!! [HOST] [IPU2 ] 89.502958 s: IPC_OUT_0 : Create Done !!! ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) [HOST] [HOST ] 89.503812 s: IPC_IN_0 : Create Done !!! [HOST] [HOST ] 89.503904 s: ALG: ERROR: No alg create function specified (algId = 6) !!! How can I solve this problem？ I'm stuck here. + +Responses: +Hi Xie Baojian, This is a duplicate thread Same has been tracked in below thread Can you please close this thread ? Regards Surya + +Hi Surya, they are two different questions，What you said above thread is a compile problem. i have compiled successful，But i cannot run the example successful. sorry to bother you. Regrads, Xie Baojian + +Xie Baojian, Could you please share logs from boot ? Regards Surya + +4606.boot_log.txt [ OK ] Started Update UTMP about System Boot/Shutdown. +[ 6.499631] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ OK ] Started Network Time Synchronization. + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ 6.670264] remoteproc1: registered virtio2 (type 7) +[ OK ] Started Synchronize System and HW clocks. +[ 6.726695] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ OK ] Reached target System Initialization. +[ 6.742117] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Listening on dropbear.socket. +[ 6.792879] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Reached target Sockets. +[ 6.846653] scsi host0: ahci +[ 6.850642] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Reached target Basic System. +[ 6.945491] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 + Starting Permit User Sessions... + Starting TI MultiCore Tools Daemon... + Starting Print notice about GPLv3 packages... + Starting uim-sysfs.service... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Started Kernel Logging Service. + Starting Save/Restore Sound Card State... + Starting Network Service... +[ OK ] Started System Logging Service. +[ OK ] Started Permit User Sessions. +[FAILED] Failed to start TI MultiCore Tools Daemon.[ 7.227761] ata1: SATA link down (SStatus 0 SControl 300) + +See 'systemctl status ti-mct-daemon.service' for details. +[ OK ] Started Network Service. +[ 7.324357] net eth1: initializing cpsw version 1.15 (0) +[ 7.367881] net eth0: initialized cpsw ale version 1.4 +[ 7.386019] net eth0: ALE Table size 1024 +[ 7.400353] NET: Registered protocol family 15 +[ 7.419865] net eth1: phy found : id is : 0x20005c7a +[ 7.469344] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 7.496706] net eth0: initializing cpsw version 1.15 (0) +[ 7.535041] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 7.570547] net eth0: phy found : id is : 0x20005c7a +[ 7.610123] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 7.743863] Initializing XFRM netlink socket +[ 7.995070] remoteproc0: powering up 55020000.ipu +[ 8.047979] random: nonblocking pool is initialized +[ 8.069162] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 +[ 8.085278] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ OK ] Started Save/Restore Sound Card State. +[ 8.202976] remoteproc0: remote processor 55020000.ipu is now up +[ 8.230955] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.255294] remoteproc2: powering up 41000000.dsp +[ 8.297838] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 +[ 8.322180] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 8.328070] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 8.334023] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 8.433156] remoteproc2: remote processor 41000000.dsp is now up +[ 8.451051] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 8.467716] remoteproc1: powering up 40800000.dsp +[ 8.502748] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 +[ 8.527721] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 8.533607] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 8.539549] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 8.634099] remoteproc1: remote processor 40800000.dsp is now up +[ 8.655875] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 8.717126] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 8.726608] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 8.746392] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 8.746771] NET: Registered protocol family 41 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ 8.988143] usbcore: registered new interface driver usbfs +[ 8.993855] usbcore: registered new interface driver hub +[ 8.999622] usbcore: registered new device driver usb +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ 9.076081] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 9.083600] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 9.093323] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.101153] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.106908] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.118167] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.128358] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.136311] hub 1-0:1.0: USB hub found +[ 9.142210] hub 1-0:1.0: 1 port detected +[ 9.146678] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.154523] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.163527] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.174029] hub 2-0:1.0: USB hub found +[ OK ] Started uim-sysfs.service.[ 9.183821] hub 2-0:1.0: 1 port detected + + Starting rc.pvr.service... +[ 9.267612] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ 9.574762] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 9.583820] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started matrix-gui-2.0.service. +[ OK ] Started Print notice about GPLv3 packages. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# ./start.sh +[ 23.119918] DMA: Module install successful, device major num = 243 +[ 23.126220] DRV: Module install successful +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found +updated 0x4A002AC4 value is 00930000 + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb660d000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6c0d000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6b4d000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6b8d000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + 23.353585] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 23.395412] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ HOST] [HOST ] 30.010309 s: SYSTEM: System A15 Init in proress !!! + [HOST] [HOST ] 30.010400 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 30.010431 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 30.011498 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 30.011529 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 30.011559 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 30.011559 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 30.011681 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 30.011681 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 30.011773 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 30.011773 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 30.011773 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 30.011895 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 30.011986 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 30.012078 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 30.012139 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 30.012230 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 30.012322 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 30.012413 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 30.012505 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 30.012596 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 30.012779 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 30.012871 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 30.012962 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 30.013054 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 30.013115 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 30.013237 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 30.013328 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 30.013420 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 30.013511 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 30.013603 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 30.013694 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 30.013786 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 30.013877 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 30.013969 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 30.014121 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014274 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014426 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014579 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014701 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014823 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 30.014975 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015097 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015250 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015402 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015555 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015677 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015799 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 30.015921 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016073 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016195 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016317 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016409 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016531 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016653 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 30.016744 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 + [HOST] [HOST ] 30.016775 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 30.017110 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 30.017141 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 30.017263 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 30.017324 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [IPU2 ] 14.933111 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 14.964222 s: + [HOST] [IPU2 ] EVE2 Image Load Completed + [HOST] [IPU2 ] 14.994692 s: + [HOST] [IPU2 ] EVE3 Image Load Completed + [HOST] [IPU2 ] 15.025224 s: + [HOST] [IPU2 ] EVE4 Image Load Completed + [HOST] [IPU2 ] 15.025346 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.025437 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.025498 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.025590 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.025651 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 + [HOST] [IPU2 ] 15.025803 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 15.028884 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 15.039712 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 15.039803 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 15.039925 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 15.302873 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.305862 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.317971 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.338071 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.358018 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [IPU2 ] 15.378057 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [IPU2 ] 15.378149 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 15.378332 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 15.378454 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [IPU2 ] 15.378576 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [IPU2 ] 15.378667 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [IPU2 ] 15.378789 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [IPU2 ] 15.378911 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 15.380650 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 15.381595 s: RpmsgInit in progress... + [HOST] [IPU2 ] 15.381656 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 15.382297 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 15.387390 s: SYSTEM: Initializing TIOVX ... + [HOST] [IPU2 ] 15.387573 s: VX_ZONE_INIT:Enabled + [HOST] [IPU2 ] 15.387695 s: VX_ZONE_ERROR:Enabled + [HOST] [IPU2 ] 15.387817 s: VX_ZONE_WARNING:Enabled + [HOST] [IPU2 ] 15.391508 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! + [HOST] [IPU2 ] 15.391600 s: SYSTEM: Initializing TIOVX ... Done !!! + [HOST] [IPU2 ] 15.391661 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 15.391722 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 15.391783 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 15.391874 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 15.391935 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 15.392027 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 15.392088 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 15.392271 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 15.392362 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 15.392423 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 15.395412 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.395534 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.395626 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 15.395717 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.395809 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.395900 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.396236 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.396327 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.396419 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 15.396510 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.396602 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.396693 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.397029 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.397120 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.397242 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 15.397334 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.397425 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.397517 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.397852 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.397944 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.398035 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 15.398127 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.398249 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.398340 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.457390 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 15.458366 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 15.458610 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 15.458701 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) + [HOST] [IPU2 ] 15.458854 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 15.459006 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + [HOST] [IPU2 ] 15.459250 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) + [HOST] [IPU2 ] 15.459403 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 15.720764 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 15.806563 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 15.816690 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 15.817147 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 15.825016 s: + [HOST] [HOST ] 30.569846 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Vision SDK Usecases + [HOST] [HOST ] ==================== + [HOST] [HOST ] 1: Single Camera Usecases + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + [HOST] [HOST ] 3: Open-Compute Usecases + [HOST] [HOST ] + [HOST] [HOST ] p: CPU Status + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + [HOST] [HOST ] + [HOST] [HOST ] s: System Settings + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 37.817971 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 37.818001 s: + [HOST] [HOST ] 37.818001 s: Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 37.818001 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 40.209876 s: + [HOST] [HOST ] 40.209876 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCL Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY + [HOST] [HOST ] 4: OpenCL framecopy Usecases + [HOST] [HOST ] 5: Chains_openclFrameCopy_DecodeDisplay + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +1 + [HOST] [HOST ] 43.154120 s: + [HOST] [IPU2 ] 43.154303 s: CHAINS: Sensor create in progress + [HOST] [IPU2 ] 43.154791 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 + [HOST] [IPU2 ] 43.250289 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 + [HOST] [IPU2 ] 43.250625 s: CHAINS: Sensor create ... DONE !!! + [HOST] [IPU2 ] 43.265753 s: CAPTURE: Create in progress !!! + [HOST] [IPU2 ] 43.266150 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! + [HOST] [HOST ] 43.387360 s: IPC_IN_0 : Create in progress !!! + [HOST] [IPU2 ] 43.386262 s: CAPTURE: Create Done !!! + [HOST] [IPU2 ] 43.386719 s: IPC_OUT_0 : Create in progress !!! + [HOST] [IPU2 ] 43.387085 s: IPC_OUT_0 : Create Done !!! + ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) + [HOST] [HOST ] 43.387817 s: IPC_IN_0 : Create Done !!! + [HOST] [HOST ] 43.387909 s: ALG: ERROR: No alg create function specified (algId = 6) !!! + +Hi Surya, Above is my boot log, Can you see what's going wrong? Regards, Xie Baojian + +Hi Xie Baojian, From logs, it is clear cmem module is not loaded dra7xx-evm login: root root@dra7xx-evm:~# ./start.sh [ 23.119918] DMA: Module install successful, device major num = 243 [ 23.126220] DRV: Module install successful insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 can you share the commands you are running in start.sh file Regards Surya + +2273.log_2.txt + +Hi Surya, my start.sh file is: ifconfig eth0 172.17.123.117 netmask 255.255.224.0 mount -t nfs -o nolock,nfsvers=3,vers=3 172.17.123.14:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs /mnt cd /mnt/opt/vision_sdk/ source ./vision_sdk_load.sh ./apps.out I have copy cmemk.ko file to /bin directory, and above is the new log, there are still some problems exist. Regards, Xie Baojian + +Hi Xie Baojian, Can you run "./load_ocl_kos.sh" before "source ./vision_sdk_load.sh" & try ? Regards Surya + +7002.log_3.txt ▒OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 2 ms (80.1 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3552144 bytes read in 89 ms (38.1 MiB/s) +106665 bytes read in 28 ms (3.6 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363390 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gd326d64 (htf@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Apr 2 20:16:47 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) +[ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000329] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000336] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000781] Console: colour dummy device 80x30 +[ 0.000797] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000803] This ensures that you still see kernel messages. Please +[ 0.000809] update your kernel commandline. +[ 0.000822] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000835] pid_max: default: 32768 minimum: 301 +[ 0.000933] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000944] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001487] Initializing cgroup subsys io +[ 0.001504] Initializing cgroup subsys memory +[ 0.001528] Initializing cgroup subsys devices +[ 0.001540] Initializing cgroup subsys freezer +[ 0.001551] Initializing cgroup subsys perf_event +[ 0.001563] Initializing cgroup subsys pids +[ 0.001590] CPU: Testing write buffer coherency: ok +[ 0.001789] /cpus/cpu@0 missing clock-frequency property +[ 0.001806] /cpus/cpu@1 missing clock-frequency property +[ 0.001816] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001848] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080067] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080135] Brought up 2 CPUs +[ 0.080148] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080155] CPU: All CPU(s) started in HYP mode. +[ 0.080160] CPU: Virtualization extensions available. +[ 0.080538] devtmpfs: initialized +[ 0.108944] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.109900] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.312417] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.312437] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.316666] pinctrl core: initialized pinctrl subsystem +[ 0.317526] NET: Registered protocol family 16 +[ 0.318449] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340220] cpuidle: using governor ladder +[ 0.370248] cpuidle: using governor menu +[ 0.378725] OMAP GPIO hardware version 0.1 +[ 0.385101] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401112] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401125] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.410369] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.410379] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410843] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410853] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.411437] OMAP DMA hardware revision 0.0 +[ 0.451378] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452536] edma 43300000.edma: memcpy is disabled +[ 0.457187] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461604] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461789] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.461952] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462108] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462403] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462588] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465601] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481033] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.553339] pcf857x 0-0020: probed +[ 0.553901] pcf857x 0-0021: probed +[ 0.554050] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.554436] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.554642] media: Linux media interface: v0.10 +[ 0.554693] Linux video capture interface: v2.00 +[ 0.554736] pps_core: LinuxPPS API ver. 1 registered +[ 0.554744] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.554767] PTP clock support registered +[ 0.554813] EDAC MC: Ver: 3.0.0 +[ 0.555563] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.555869] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.556198] Advanced Linux Sound Architecture Driver Initialized. +[ 0.557029] clocksource: Switched to clocksource arch_sys_counter +[ 0.567627] NET: Registered protocol family 2 +[ 0.568124] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568187] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.568312] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.568359] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568390] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568600] NET: Registered protocol family 1 +[ 0.568866] RPC: Registered named UNIX socket transport module. +[ 0.568875] RPC: Registered udp transport module. +[ 0.568881] RPC: Registered tcp transport module. +[ 0.568887] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.569885] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579854] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.580503] NFS: Registering the id_resolver key type +[ 0.580532] Key type id_resolver registered +[ 0.580540] Key type id_legacy registered +[ 0.580594] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.581860] bounce: pool size: 64 pages +[ 0.582009] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.582023] io scheduler noop registered +[ 0.582035] io scheduler deadline registered +[ 0.582068] io scheduler cfq registered (default) +[ 0.586974] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.590181] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.590194] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.590228] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.590249] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.620475] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.620651] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.620664] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.620674] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.620684] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.621084] PCI: bus0: Fast back to back transfers disabled +[ 0.621205] PCI: bus1: Fast back to back transfers enabled +[ 0.621288] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.621303] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.621316] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.621530] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.681878] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.685288] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.693599] console [ttyS0] enabled +[ 1.698002] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.707712] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.717769] [drm] Initialized drm 1.1.0 20060810 +[ 1.723804] OMAP DSS rev 6.1 +[ 1.727597] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.743397] loop: module loaded +[ 1.746916] vmemexp device MAJOR num = 246 +[ 1.751070] vmemexp class registered +[ 1.754783] /dev/vmemexp device registered +[ 1.758915] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.764589] nand: No NAND device found +[ 1.768379] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.778320] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.783717] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.789599] Creating 7 MTD partitions on "spi32766.0": +[ 1.794763] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.800877] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.807230] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.814156] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.820861] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.828261] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.834602] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.842393] libphy: Fixed MDIO Bus: probed +[ 1.897061] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.903186] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.913543] libphy: 48485000.mdio: probed +[ 1.917617] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.925659] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.934370] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 +[ 1.941065] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.948068] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 +[ 1.956678] mousedev: PS/2 mouse device common for all mice +[ 1.962896] i2c /dev entries driver +[ 1.971657] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.977268] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.983652] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.990208] evm_3v3_sw: supplied by sysen1 +[ 2.070811] mmc0: MAN_BKOPS_EN bit is not set +[ 2.107640] mmc0: new HS200 MMC card at address 0001 +[ 2.123087] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.138144] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.144341] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.152122] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.160842] aic_dvdd: supplied by evm_3v3_sw +[ 2.166739] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.174441] NET: Registered protocol family 10 +[ 2.179856] sit: IPv6 over IPv4 tunneling driver +[ 2.185071] NET: Registered protocol family 17 +[ 2.189793] Key type dns_resolver registered +[ 2.194193] omap_voltage_late_init: Voltage driver support not added +[ 2.201120] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.207353] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.214063] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.220315] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.228564] Power Management for TI OMAP4+ devices. +[ 2.233636] Registering SWP/SWPB emulation handler +[ 2.240595] dmm 4e000000.dmm: initialized all PAT entries +[ 2.247952] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.254591] [drm] No driver support for vblank timestamp query. +[ 2.260943] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.267801] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.308268] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.321010] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.327936] hctosys: unable to open rtc device (rtc0) +[ 2.341317] evm_1v8: disabling +[ 2.344390] aic_dvdd: disabling +[ 2.347567] vmmcwl_fixed: disabling +[ 2.351250] ldousb: disabling +[ 2.354641] ALSA device list: +[ 2.357636] #0: DRA7xx-EVM +[ 2.361177] Waiting for root device PARTUUID=2ca9f500-02... +[ 2.566884] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.581937] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.588823] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.598428] mmcblk1: p1 p2 +[ 2.690533] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.701990] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.045157] EXT4-fs (mmcblk1p2): recovery complete +[ 3.050857] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.059035] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 3.069759] devtmpfs: mounted +[ 3.072963] Freeing unused kernel memory: 340K +[ 3.077444] This architecture does not have kernel memory protection. +[ 3.201615] systemd[1]: System time before build time, advancing clock. +[ 3.232703] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.248143] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.259802] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.278307] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.311216] systemd[1]: Set hostname to . +[ 3.370801] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.371681] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.371838] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.429103] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.444482] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.483735] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.493239] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.503101] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.835560] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 3.843375] systemd[1]: sockets.target: Found dependency on rpcbind.socket/start +[ 3.850824] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 3.858276] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 3.865968] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 3.873294] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 3.880743] systemd[1]: sockets.target: Breaking ordering cycle by deleting job rpcbind.socket/start +[ 3.889935] systemd[1]: rpcbind.socket: Job rpcbind.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping RPCbind Server Activation Socket +[ 3.927362] systemd[1]: alignment.service: Found ordering cycle on alignment.service/start +[ 3.935670] systemd[1]: alignment.service: Found dependency on sysinit.target/start +[ 3.943382] systemd[1]: alignment.service: Found dependency on alignment.service/start +[ 3.951353] systemd[1]: alignment.service: Breaking ordering cycle by deleting job alignment.service/start +[ 3.961064] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with alignment.service/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 3.999516] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.027487] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 4.068744] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.097334] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.127302] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.157394] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.187762] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.217236] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.247289] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.297414] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.334806] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.347945] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.427387] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.443814] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.463319] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.489438] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.517430] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.547250] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.567906] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.587795] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.607422] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.637219] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.657266] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.717468] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.747281] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.769624] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.813432] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.837402] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.857264] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.877431] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. + Starting Create Static Device Nodes in /dev... + Starting udev Coldplug all Devices... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.568865] systemd-journald[156]: Received request to flush runtime journal from PID 1 +[ OK ] Reached target Local File Systems (Pre). + Mounting /var/volatile... + Mounting /media/ram... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started udev Kernel Device Manager. + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. +[ 6.011633] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 + Starting Create Volatile Files and Directories...[ 6.032803] remoteproc0: 55020000.ipu is available + +[ 6.043006] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.055746] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.069385] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ OK ] Started udev Coldplug all Devices. +[ 6.099014] remoteproc1: 40800000.dsp is available +[ 6.104785] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.121190] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.136089] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ OK ] Started Load/Save Random Seed. +[ 6.154029] remoteproc2: 41000000.dsp is available +[ 6.169539] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ OK ] Started Create Volatile Files and Directories.[ 6.186468] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + +[ OK ] Found device /dev/ttyS0. +[ 6.363916] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 6.720898] remoteproc1: registered virtio0 (type 7) +[ 6.726211] remoteproc0: registered virtio1 (type 7) + Starting Network Time Synchronization... +[ 6.757378] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 6.780069] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 + Starting Update UTMP about System Boot/Shutdown... +[ 6.797423] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 6.803986] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 6.816339] remoteproc2: registered virtio2 (type 7) +[ 6.828270] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started Network Time Synchronization. +[ 6.939933] SCSI subsystem initialized +[ OK ] Reached target System Time Synchronized. +[ 6.971813] CAN device driver interface + Starting Synchronize System and HW clocks... +[ 7.062754] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Reached target System Initialization. +[ 7.149488] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.175446] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ OK ] Listening on D-Bus System Message Bus Socket. +[ 7.206511] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ OK ] Listening on dropbear.socket. +[ 7.254258] scsi host0: ahci +[ 7.260298] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. + Starting Permit User Sessions... +[ 7.437906] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. + Starting Print notice about GPLv3 packages... + Starting Save/Restore Sound Card State... +[ OK ] Started Kernel Logging Service. + Starting Telephony service... + Starting uim-sysfs.service... + Starting Avahi mDNS/DNS-SD Stack... +[ OK ] Started System Logging Service. +[ OK ] Started D-Bus System Message Bus. +[ 7.627477] ata1: SATA link down (SStatus 0 SControl 300) +[ 7.828427] NET: Registered protocol family 15 +[ OK ] Started Avahi mDNS/DNS-SD Stack. +[ OK ] Started Telephony service. + Starting Network Service... + Starting TI MultiCore Tools Daemon... + Starting Login Service... +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State. +[ 8.079655] Bluetooth: Core ver 2.21 +[ 8.083295] NET: Registered protocol family 31 +[ 8.110063] Bluetooth: HCI device and connection manager initialized +[ 8.116461] Bluetooth: HCI socket layer initialized +[ 8.160290] Bluetooth: L2CAP socket layer initialized +[ 8.165391] Bluetooth: SCO socket layer initialized +[ 8.260617] net eth1: initializing cpsw version 1.15 (0) +[ 8.273808] net eth0: initialized cpsw ale version 1.4 +[ OK ] Started Network Service. +[ 8.298194] net eth0: ALE Table size 1024 +[ 8.323708] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 8.325073] net eth1: phy found : id is : 0x20005c7a +[ 8.346494] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.380315] net eth0: initializing cpsw version 1.15 (0) +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ 8.425001] net eth0: phy found : id is : 0x20005c7a +[ 8.468828] Initializing XFRM netlink socket +[ 8.474767] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.590945] remoteproc1: powering up 40800000.dsp +[ 8.672337] random: nonblocking pool is initialized +[ 8.672839] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 +[ 8.679468] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 8.679499] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 8.679577] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 8.768881] remoteproc1: remote processor 40800000.dsp is now up +[ 8.795111] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.829754] remoteproc0: powering up 55020000.ipu +[ 8.862880] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 +[ 8.897126] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 8.957794] remoteproc0: remote processor 55020000.ipu is now up +[ 8.992155] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 9.011094] remoteproc2: powering up 41000000.dsp +[ 9.045711] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 +[ 9.078854] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.084749] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.090680] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 9.230420] remoteproc2: remote processor 41000000.dsp is now up +[ 9.248601] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 9.315959] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 9.328408] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 9.347868] NET: Registered protocol family 41 +[ 9.375643] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. + Starting Network Name Resolution... + Starting Lightning Fast Webserver With Light System Requirements... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Started Login Service. +[ 9.755675] usbcore: registered new interface driver usbfs +[ 9.770193] usbcore: registered new interface driver hub +[ 9.782491] usbcore: registered new device driver usb +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ 9.861736] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 9.877125] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 9.884834] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.899210] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.911346] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.923427] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.937801] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.948906] hub 1-0:1.0: USB hub found +[ 9.953618] hub 1-0:1.0: 1 port detected +[ 9.961355] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.969647] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.979378] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.998173] hub 2-0:1.0: USB hub found +[ 10.007001] hub 2-0:1.0: 1 port detected +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 10.210345] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting tiipclad-daemon.service... + Starting telnetd.service... +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +0.424061] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 10.512555] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[[;32m OK ]Started tiipclad-daemon.service. +[[;32m OK ]Started Print notice about GPLv3 packages. +[[;32m OK ]Started telnetd.service. + tSarting thttpd.service... +[[;32m OK ]Started thttpd.service. + tSarting rng-tools.service... +[[;32m OK ]Started rng-tools.service. + tSarting gdbserverproxy.service... +[[;32m OK ]Started gdbserverproxy.service. + tSarting matrix-gui-2.0.service... +[[;32m OK ]Started matrix-gui-2.0.service. + tSarting thermal-zone-init.service... +[[;32m OK ]Started thermal-zone-init.service. + + ____ _ _ ____ _ _ + | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# ./start.sh + +Opened log file: lad.txt + +numProcessors = 5 id = 0 baseId = 0 + +Spawned daemon: /usr/bin/lad_dra7xx + +[ 69.578936] CMEMK module: reference Linux version 4.4.84 +[ 69.586793] allocated heap buffer 0x40400000 of size 0x100000 +[ 69.592998] cmemk initialized +insmod: ERROR: could not load module /opt/vision_sdk/debugss_kmodule.ko: No such file or directory +insmod: ERROR: could not load module /opt/vision_sdk/gdbserverproxy.ko: No such file or directory +[ 69.634689] DMA: Module install successful, device major num = 242 +[ 69.641043] DRV: Module install successful +insmod: ERROR: could not insert module ./bin/cmemk.ko: File exists +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found +updated 0x4A002AC4 value is 00930000 + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb662b000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6c2b000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6b6b000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6bab000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + 69.888855] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 69.929824] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ HOST] [HOST ] 76.522357 s: SYSTEM: System A15 Init in proress !!! + [HOST] [HOST ] 76.522479 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 76.522479 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 76.523607 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 76.523638 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 76.523668 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 76.523699 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 76.523821 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 76.523821 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 76.523943 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 76.523943 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 76.523943 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 76.524065 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 76.524187 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 76.524278 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 76.524400 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 76.524492 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 76.524614 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 76.524705 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 76.524827 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 76.524919 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 76.525041 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 76.525132 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 76.525254 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 76.525346 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 76.525437 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 76.525590 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 76.525681 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 76.525773 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 76.525895 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 76.526017 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 76.526108 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 76.526230 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 76.526322 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 76.526444 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 76.526596 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 76.526779 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 76.526932 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527084 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527298 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527481 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527633 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527786 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 76.527938 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528060 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528213 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528365 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528548 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528701 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528823 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 76.528975 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 76.529128 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 76.529250 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 76.529372 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 76.529494 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 76.529646 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 + [HOST] [HOST ] 76.529646 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 76.530012 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 76.530012 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 76.530165 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 76.530226 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [IPU2 ] 15.665863 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 15.697767 s: + [HOST] [IPU2 ] EVE2 Image Load Completed + [HOST] [IPU2 ] 15.729061 s: + [HOST] [IPU2 ] EVE3 Image Load Completed + [HOST] [IPU2 ] 15.760385 s: + [HOST] [IPU2 ] EVE4 Image Load Completed + [HOST] [IPU2 ] 15.760507 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.760568 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.760660 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.760751 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.760812 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 + [HOST] [IPU2 ] 15.760965 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 15.764076 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 15.775117 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 15.775239 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 15.775330 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 15.778076 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.875617 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.893125 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.913194 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.933172 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [IPU2 ] 15.953181 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [IPU2 ] 15.953303 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 15.953455 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 15.953577 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [IPU2 ] 15.953699 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [IPU2 ] 15.953821 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [IPU2 ] 15.953943 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [IPU2 ] 15.954065 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 15.955804 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 15.956749 s: RpmsgInit in progress... + [HOST] [IPU2 ] 15.956841 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 15.957451 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 15.962575 s: SYSTEM: Initializing TIOVX ... + [HOST] [IPU2 ] 15.962758 s: VX_ZONE_INIT:Enabled + [HOST] [IPU2 ] 15.962880 s: VX_ZONE_ERROR:Enabled + [HOST] [IPU2 ] 15.963002 s: VX_ZONE_WARNING:Enabled + [HOST] [IPU2 ] 15.966723 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! + [HOST] [IPU2 ] 15.966815 s: SYSTEM: Initializing TIOVX ... Done !!! + [HOST] [IPU2 ] 15.966876 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 15.966937 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 15.967028 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 15.967089 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 15.967150 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 15.967699 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 15.967760 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 15.967913 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 15.967974 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 15.968035 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 15.971146 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.971268 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.971359 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 15.971512 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.971603 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.971695 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.972061 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.972152 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.972213 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 15.972335 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.972457 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.972518 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.972884 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.972976 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.973067 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 15.973159 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.973250 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.973342 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 15.973708 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 15.973799 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 15.973891 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 15.974013 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 15.974074 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 15.974165 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 16.033825 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 16.034770 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 16.035014 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 16.035106 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) + [HOST] [IPU2 ] 16.035289 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 16.035472 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + [HOST] [IPU2 ] 16.035685 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) + [HOST] [IPU2 ] 16.035838 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 16.298145 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 16.381687 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 16.391966 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 16.392515 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 16.400536 s: + [HOST] [HOST ] 77.081010 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Vision SDK Usecases + [HOST] [HOST ] ==================== + [HOST] [HOST ] 1: Single Camera Usecases + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + [HOST] [HOST ] 3: Open-Compute Usecases + [HOST] [HOST ] + [HOST] [HOST ] p: CPU Status + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + [HOST] [HOST ] + [HOST] [HOST ] s: System Settings + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +x + [HOST] [HOST ] 84.200817 s: SYSTEM: System A15 De-Init in progress !!! + [HOST] [HOST ] 84.200847 s: SYSTEM: De-Initializing A15 Links !!! + [HOST] [HOST ] 84.200969 s: IPC_OUT_0 : DeInit done - linkid-0x2000000 + [HOST] [HOST ] 84.201061 s: IPC_OUT_1 : DeInit done - linkid-0x2000001 + [HOST] [HOST ] 84.201152 s: IPC_OUT_2 : DeInit done - linkid-0x2000002 + [HOST] [HOST ] 84.201244 s: IPC_OUT_3 : DeInit done - linkid-0x2000003 + [HOST] [HOST ] 84.201396 s: IPC_OUT_4 : DeInit done - linkid-0x2000004 + [HOST] [HOST ] 84.201518 s: IPC_IN_0 : DeInit done - linkid-0x200000a + [HOST] [HOST ] 84.201640 s: IPC_IN_1 : DeInit done - linkid-0x200000b + [HOST] [HOST ] 84.201762 s: IPC_IN_2 : DeInit done - linkid-0x200000c + [HOST] [HOST ] 84.201915 s: IPC_IN_3 : DeInit done - linkid-0x200000d + [HOST] [HOST ] 84.202037 s: IPC_IN_4 : DeInit done - linkid-0x200000e + [HOST] [HOST ] 84.202159 s: IPC_IN_5 : DeInit done - linkid-0x200000f + [HOST] [HOST ] 84.202250 s: IPC_IN_6 : DeInit done - linkid-0x2000010 + [HOST] [HOST ] 84.202403 s: NULL_0 : DeInit done - linkid-0x2000014 + [HOST] [HOST ] 84.202525 s: NULL_1 : DeInit done - linkid-0x2000015 + [HOST] [HOST ] 84.202647 s: NULL_SRC_0 : DeInit done - linkid-0x2000039 + [HOST] [HOST ] 84.202738 s: ALGORITHM_0 : DeInit done - linkid-0x2000031 + [HOST] [HOST ] 84.202830 s: ALGORITHM_1 : DeInit done - linkid-0x2000032 + [HOST] [HOST ] 84.202921 s: ALGORITHM_2 : DeInit done - linkid-0x2000033 + [HOST] [HOST ] 84.203013 s: ALGORITHM_3 : DeInit done - linkid-0x2000034 + [HOST] [HOST ] 84.203104 s: ALGORITHM_4 : DeInit done - linkid-0x2000035 + [HOST] [HOST ] 84.203165 s: ALGORITHM_5 : DeInit done - linkid-0x2000036 + [HOST] [HOST ] 84.203257 s: ALGORITHM_6 : DeInit done - linkid-0x2000037 + [HOST] [HOST ] 84.203348 s: ALGORITHM_7 : DeInit done - linkid-0x2000038 + [HOST] [HOST ] 84.203470 s: DUP0 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.203592 s: DUP1 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.203715 s: DUP2 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.203837 s: DUP3 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204081 s: DUP4 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204203 s: SYNC_0 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204325 s: SYNC_1 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204416 s: SYNC_2 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204538 s: SYNC_3 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204660 s: MERGE_0 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204782 s: MERGE_1 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204904 s: MERGE_2 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.204996 s: MERGE_3 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205118 s: MERGE_4 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205240 s: SELECT_0 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205362 s: SELECT_1 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205453 s: GATE_0 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205575 s: GATE_1 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205697 s: GATE_2 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.205819 s: GATE_3 : DeInit done - linkid-0x0 + [HOST] [HOST ] 84.206795 s: SGXFRMCPY_0 : DeInit done - linkid-0x2000040 + [HOST] [HOST ] 84.206826 s: SYSTEM: De-Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 84.206826 s: SYSTEM: IPC: De-init in progress !!! + [HOST] [HOST ] 84.206826 s: SYSTEM: MSGQ: MsgQ de-init in progress !!! + [HOST] [HOST ] 84.206978 s: SYSTEM: MSGQ: MsgQ de-init DONE !!! + [HOST] [HOST ] 84.206978 s: SYSTEM: IPC: Notify de-init in progress !!! + [HOST] [HOST ] 84.207283 s: SYSTEM: IPC: Notify de-init DONE !!! + [HOST] [HOST ] 84.207314 s: SYSTEM: IPC: De-init DONE !!! + [HOST] [HOST ] 84.207314 s: SYSTEM: System A15 De-Init Done !!! +CMEM Error: registerAlloc: ioctl CMEM_IOCREGUSER failed for phys addr 0xa9000000: -1 +TIOCL FATAL: The TI Multicore Tools daemon (/usr/bin/ti-mctd) is not running. Re-run application after starting the daemon. Refer User Guide for details. +./start.sh: line 6: 1014 Aborted (core dumped) ./apps.out +root@dra7xx-evm:~# + +Hi Surya, I add "./load_ocl_kos.sh" before "source ./vision_sdk_load.sh" and try , Above is my new log. Regards, Xie Baojian + +Hi Xie Baojian, It seems below files are not build or copied to /opt/vision_sdk folder properly insmod: ERROR: could not load module /opt/vision_sdk/debugss_kmodule.ko: No such file or directory insmod: ERROR: could not load module /opt/vision_sdk/gdbserverproxy.ko: No such file or directory We need to build once again Before building let us check We have everything correctly configured 1. MAKECONFIG = tda2xx_evm_linux_opencx 2. We cloned kernel,u-boot,sgx,cmem,dsptop,gdbc6x 3. filesystem downloaded & placed under targetfs folder & permission of targetfs changed to 777 4. filesystem patches under kernel\linux_kernel_addon\fs_patches are applied to filesystem 5. ti-cgt-c6000_8.1.0 is downloaded & kept under ti_components\cg_tools\linux folder 6. "ti-cgt-c6000_8.1.0\bin" path is added to system path variable Run below commands from vision_sdk\ build folder rm -rf ../binaries make clean make linux_clean make linux make linux_install make -s -j depend make -s -j opencx Build should be success without any errors Regards Surya + +Hi Surya, I checked all of above steps, But my only uncertainty is cloned cmem. I refer to the documentation， but the documentation is not detailed about clone cmem. Can you tell me in detail of clone cmem steps? Regards, Xie Baojian + +Hi Xie Baojian, Refer Linux User guide section 2.4.2.1.1 Clone kernel, After cloning OMAP, below there is procedure mentioned to clone cmem (from ludev.git) Regards Surya + +Hi Surya, I have finished following the steps above without any errors. But it still no effect, Below is my entire run log. Regards, Xie Baojian + +log6.txt OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 3 ms (53.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3552144 bytes read in 89 ms (38.1 MiB/s) +106665 bytes read in 28 ms (3.6 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363390 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gd326d64 (htf@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Apr 2 20:16:47 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) +[ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000332] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000340] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000772] Console: colour dummy device 80x30 +[ 0.000787] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000793] This ensures that you still see kernel messages. Please +[ 0.000798] update your kernel commandline. +[ 0.000812] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000825] pid_max: default: 32768 minimum: 301 +[ 0.000920] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000930] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001471] Initializing cgroup subsys io +[ 0.001488] Initializing cgroup subsys memory +[ 0.001512] Initializing cgroup subsys devices +[ 0.001525] Initializing cgroup subsys freezer +[ 0.001536] Initializing cgroup subsys perf_event +[ 0.001547] Initializing cgroup subsys pids +[ 0.001574] CPU: Testing write buffer coherency: ok +[ 0.001775] /cpus/cpu@0 missing clock-frequency property +[ 0.001791] /cpus/cpu@1 missing clock-frequency property +[ 0.001801] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001834] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080051] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080119] Brought up 2 CPUs +[ 0.080132] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080139] CPU: All CPU(s) started in HYP mode. +[ 0.080144] CPU: Virtualization extensions available. +[ 0.080525] devtmpfs: initialized +[ 0.109001] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.109984] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.314461] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.314480] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.318706] pinctrl core: initialized pinctrl subsystem +[ 0.319558] NET: Registered protocol family 16 +[ 0.320510] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350237] cpuidle: using governor ladder +[ 0.380259] cpuidle: using governor menu +[ 0.388733] OMAP GPIO hardware version 0.1 +[ 0.395120] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.411132] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.411145] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.420429] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.420439] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420903] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420913] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.421502] OMAP DMA hardware revision 0.0 +[ 0.461426] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462589] edma 43300000.edma: memcpy is disabled +[ 0.467231] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471652] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.471838] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.471997] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472152] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472442] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472626] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.475630] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491073] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563394] pcf857x 0-0020: probed +[ 0.563950] pcf857x 0-0021: probed +[ 0.564099] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564485] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.564691] media: Linux media interface: v0.10 +[ 0.564742] Linux video capture interface: v2.00 +[ 0.564786] pps_core: LinuxPPS API ver. 1 registered +[ 0.564793] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.564817] PTP clock support registered +[ 0.564863] EDAC MC: Ver: 3.0.0 +[ 0.565608] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.565908] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566236] Advanced Linux Sound Architecture Driver Initialized. +[ 0.567068] clocksource: Switched to clocksource arch_sys_counter +[ 0.577682] NET: Registered protocol family 2 +[ 0.578179] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578242] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578367] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578414] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578445] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578654] NET: Registered protocol family 1 +[ 0.578927] RPC: Registered named UNIX socket transport module. +[ 0.578937] RPC: Registered udp transport module. +[ 0.578943] RPC: Registered tcp transport module. +[ 0.578950] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.579939] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.589892] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.590545] NFS: Registering the id_resolver key type +[ 0.590571] Key type id_resolver registered +[ 0.590579] Key type id_legacy registered +[ 0.590631] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.591897] bounce: pool size: 64 pages +[ 0.592047] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.592062] io scheduler noop registered +[ 0.592073] io scheduler deadline registered +[ 0.592105] io scheduler cfq registered (default) +[ 0.597012] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.600249] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.600262] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.600295] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.600316] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.630589] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.630765] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.630778] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.630788] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.630797] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.631200] PCI: bus0: Fast back to back transfers disabled +[ 0.631321] PCI: bus1: Fast back to back transfers enabled +[ 0.631404] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.631418] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.631431] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.631648] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.691910] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.695300] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.703675] console [ttyS0] enabled +[ 1.708078] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.717777] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.727804] [drm] Initialized drm 1.1.0 20060810 +[ 1.733822] OMAP DSS rev 6.1 +[ 1.737589] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.753169] loop: module loaded +[ 1.756688] vmemexp device MAJOR num = 246 +[ 1.760835] vmemexp class registered +[ 1.764546] /dev/vmemexp device registered +[ 1.768681] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.774348] nand: No NAND device found +[ 1.778141] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.788079] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.793473] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.799355] Creating 7 MTD partitions on "spi32766.0": +[ 1.804518] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.810638] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.816971] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.823930] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.830633] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.838031] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.844382] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.852173] libphy: Fixed MDIO Bus: probed +[ 1.907100] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.913225] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.923793] libphy: 48485000.mdio: probed +[ 1.927842] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.935883] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.944582] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 +[ 1.951243] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.958227] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 +[ 1.966827] mousedev: PS/2 mouse device common for all mice +[ 1.973023] i2c /dev entries driver +[ 1.981749] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.987328] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.993713] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.000247] evm_3v3_sw: supplied by sysen1 +[ 2.080850] mmc0: MAN_BKOPS_EN bit is not set +[ 2.117621] mmc0: new HS200 MMC card at address 0001 +[ 2.123055] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.127826] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.133983] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.168910] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.177418] aic_dvdd: supplied by evm_3v3_sw +[ 2.183290] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.190822] NET: Registered protocol family 10 +[ 2.206079] sit: IPv6 over IPv4 tunneling driver +[ 2.211287] NET: Registered protocol family 17 +[ 2.215964] Key type dns_resolver registered +[ 2.220410] omap_voltage_late_init: Voltage driver support not added +[ 2.227315] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.233523] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.240281] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.246491] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.254717] Power Management for TI OMAP4+ devices. +[ 2.259823] Registering SWP/SWPB emulation handler +[ 2.266660] dmm 4e000000.dmm: initialized all PAT entries +[ 2.274048] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.280718] [drm] No driver support for vblank timestamp query. +[ 2.287007] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.293869] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.338404] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.351517] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.360442] hctosys: unable to open rtc device (rtc0) +[ 2.376786] evm_1v8: disabling +[ 2.379884] aic_dvdd: disabling +[ 2.383037] vmmcwl_fixed: disabling +[ 2.386702] ldousb: disabling +[ 2.390138] ALSA device list: +[ 2.393127] #0: DRA7xx-EVM +[ 2.396666] Waiting for root device PARTUUID=2ca9f500-02... +[ 2.616492] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.631675] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.648685] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.658363] mmcblk1: p1 p2 +[ 2.730376] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.741894] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.965756] EXT4-fs (mmcblk1p2): recovery complete +[ 2.971371] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.979539] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.989120] devtmpfs: mounted +[ 2.992292] Freeing unused kernel memory: 340K +[ 2.996754] This architecture does not have kernel memory protection. +[ 3.122391] systemd[1]: System time before build time, advancing clock. +[ 3.156049] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.172128] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.183475] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.201938] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.230938] systemd[1]: Set hostname to . +[ 3.289140] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.299405] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.315614] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.343105] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.359031] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.437436] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 3.446899] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 3.456762] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 3.789318] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 3.797130] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 3.804824] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 3.812138] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 3.819589] systemd[1]: sysinit.target: Found dependency on avahi-daemon.socket/start +[ 3.827475] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 3.834906] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 3.844362] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 3.879555] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 3.907439] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 3.948000] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.978274] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.007259] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.027288] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.047407] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.078456] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.107311] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.137239] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.157322] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.187349] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.217788] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.247901] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.277820] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.307260] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.327365] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.377484] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.409447] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.442862] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.480440] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.499093] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.514793] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.539878] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.569882] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.609498] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.643465] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.667415] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.687318] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.707492] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Remount Root and Kernel File Systems. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting udev Coldplug all Devices... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.364635] systemd-journald[122]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ 5.808826] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 + Starting Load/Save Random Seed... +[ OK ] Started udev Coldplug all Devices.[ 5.846483] remoteproc0: 55020000.ipu is available + +[ 5.855728] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 5.866818] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 5.883672] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 5.894926] remoteproc1: 40800000.dsp is available +[ OK ] Started Create Volatile Files and Directories. +[ 5.903241] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 5.923846] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Started Load/Save Random Seed. +[ 5.969192] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 5.996290] remoteproc2: 41000000.dsp is available +[ 6.013563] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.049756] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. + Starting Network Time Synchronization... +[ 6.204735] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 + Starting Update UTMP about System Boot/Shutdown... +[ OK ] Started Network Time Synchronization. +[ 6.341953] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks... +[ 6.455029] remoteproc1: registered virtio0 (type 7) +[ OK ] Started Update UTMP about System Boot/Shutdown.[ 6.498415] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 + +[ OK ] Started Synchronize System and HW clocks. +[ 6.581170] remoteproc0: registered virtio1 (type 7) +[ 6.604767] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Reached target System Initialization. +[ 6.628497] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ 6.685025] CAN device driver interface +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on RPCbind Server Activation Socket. +[ 6.748498] SCSI subsystem initialized +[ 6.771116] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ 6.931094] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Reached target Sockets. +[ 7.014744] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ OK ] Reached target Basic System. +[ 7.067478] remoteproc2: registered virtio2 (type 7) + Starting Login Service... + Starting Telephony service... + Starting Print notice about GPLv3 packages... +[ 7.151779] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.174889] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ OK ] Started Kernel Logging Service. + Starting Permit User Sessions... +[ OK ] Started System Logging Service. + Starting Avahi mDNS/DNS-SD Stack... + Starting TI MultiCore Tools Daemon... +[ OK ] Started D-Bus System Message Bus. +[ 7.254080] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 7.335187] scsi host0: ahci +[ 7.338977] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Started Telephony service. +[ OK ] Started Avahi mDNS/DNS-SD Stack. + Starting Network Service... + Starting uim-sysfs.service... + Starting Save/Restore Sound Card State... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Started Permit User Sessions. +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ 7.727099] ata1: SATA link down (SStatus 0 SControl 300) +[ 7.735828] Bluetooth: Core ver 2.21 +[ 7.755442] NET: Registered protocol family 31 +[ 7.813841] Bluetooth: HCI device and connection manager initialized +[ 7.859689] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service. +[ OK ] Started Save/Restore Sound Card State. +[ 7.906771] Bluetooth: HCI socket layer initialized +[ 7.917571] net eth0: initialized cpsw ale version 1.4 +[ 7.932446] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 7.942489] Bluetooth: L2CAP socket layer initialized +[ 7.948497] net eth0: ALE Table size 1024 +[ 7.956937] Bluetooth: SCO socket layer initialized +[ 7.984026] net eth1: phy found : id is : 0x20005c7a +[ 8.023969] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.049712] net eth0: initializing cpsw version 1.15 (0) +[ 8.109105] net eth0: phy found : id is : 0x20005c7a +[ 8.124432] NET: Registered protocol family 15 +[ 8.149678] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.314213] random: nonblocking pool is initialized +[ 8.391195] Initializing XFRM netlink socket +[ 8.514036] remoteproc1: powering up 40800000.dsp +[ 8.563120] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 +[ 8.594757] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 8.600655] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 8.606599] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 8.767210] remoteproc1: remote processor 40800000.dsp is now up +[ 8.783919] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.800599] remoteproc0: powering up 55020000.ipu +[ 8.839120] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 +[ 8.846115] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 8.934252] remoteproc0: remote processor 55020000.ipu is now up +[ 8.956001] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 8.983169] remoteproc2: powering up 41000000.dsp +[ 9.032672] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 +[ 9.064805] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.070694] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.076634] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 9.218541] remoteproc2: remote processor 41000000.dsp is now up +[ 9.244929] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 9.301552] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 9.313550] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 9.329871] NET: Registered protocol family 41 +[ 9.338706] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 9.522593] usbcore: registered new interface driver usbfs +[ 9.534571] usbcore: registered new interface driver hub +[ 9.546897] usbcore: registered new device driver usb +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. +[ 9.600242] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[[ 9.618181] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered + OK ] Started Serial Getty on ttyS0. +[ 9.631898] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.655073] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.655095] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.655422] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.655463] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.661125] hub 1-0:1.0: USB hub found +[ 9.661152] hub 1-0:1.0: 1 port detected +[ 9.661454] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.661464] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.661523] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.665158] hub 2-0:1.0: USB hub found +[ 9.665186] hub 2-0:1.0: 1 port detected +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ OK ] Started Login Service. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 10.074190] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 10.114809] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 10.131642] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting tiipclad-daemon.service... + Starting telnetd.service... +[ OK ] Started telnetd.service. +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: +[ OK ] Started tiipclad-daemon.service. + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** + Starting thttpd.service... +[ OK ] Started Print notice about GPLv3 packages. +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# ./start.sh + +Opened log file: lad.txt + +numProcessors = 5 id = 0 baseId = 0 + +Spawned daemon: /usr/bin/lad_dra7xx + +[ 23.992447] CMEMK module: reference Linux version 4.4.84 +[ 24.000338] allocated heap buffer 0x40400000 of size 0x100000 +[ 24.006324] cmemk initialized +insmod: ERROR: could not load module /opt/vision_sdk/debugss_kmodule.ko: No such file or directory +insmod: ERROR: could not load module /opt/vision_sdk/gdbserverproxy.ko: No such file or directory +[ 24.050475] DMA: Module install successful, device major num = 242 +[ 24.056913] DRV: Module install successful +insmod: ERROR: could not insert module ./bin/cmemk.ko: File exists +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found +updated 0x4A002AC4 value is 00930000 + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb65df000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6bdf000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6b1f000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6b5f000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + 24.311229] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 24.353212] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ HOST] [HOST ] 31.025224 s: SYSTEM: System A15 Init in proress !!! + [HOST] [HOST ] 31.025315 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 31.025346 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 31.025590 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 31.025590 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 31.025620 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 31.025651 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 31.025742 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 31.025742 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 31.025864 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 31.025864 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 31.025864 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 31.025986 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 31.026078 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 31.026169 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 31.026261 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 31.026383 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 31.026535 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 31.026688 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 31.026840 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 31.026993 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 31.027145 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 31.027298 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 31.027420 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 31.027572 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 31.027694 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 31.027847 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 31.027999 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 31.028121 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 31.028243 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 31.028365 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 31.028487 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 31.028640 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 31.028762 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 31.028914 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 31.029097 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 31.029280 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 31.029463 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 31.029646 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 31.029860 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 31.029951 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030104 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030195 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030317 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030439 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030561 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030653 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030744 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030866 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 31.030988 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031080 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031202 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031263 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031385 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031476 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 31.031568 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 + [HOST] [HOST ] 31.031568 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 31.031934 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 31.031934 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 31.032086 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 31.032147 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [IPU2 ] 15.722686 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 15.754620 s: + [HOST] [IPU2 ] EVE2 Image Load Completed + [HOST] [IPU2 ] 15.785853 s: + [HOST] [IPU2 ] EVE3 Image Load Completed + [HOST] [IPU2 ] 15.817025 s: + [HOST] [IPU2 ] EVE4 Image Load Completed + [HOST] [IPU2 ] 15.817147 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.817208 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.817300 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.817391 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 15.817452 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 + [HOST] [IPU2 ] 15.817605 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 15.820716 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 15.831757 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 15.831879 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 15.831970 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 15.835082 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.944396 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.959372 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [IPU2 ] 15.979411 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [IPU2 ] 15.999389 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [IPU2 ] 16.019429 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [IPU2 ] 16.019551 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 16.019673 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 16.019795 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [IPU2 ] 16.019917 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [IPU2 ] 16.020069 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [IPU2 ] 16.020222 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [IPU2 ] 16.020344 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 16.022082 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 16.022967 s: RpmsgInit in progress... + [HOST] [IPU2 ] 16.023089 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 16.023699 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 16.028823 s: SYSTEM: Initializing TIOVX ... + [HOST] [IPU2 ] 16.029006 s: VX_ZONE_INIT:Enabled + [HOST] [IPU2 ] 16.029158 s: VX_ZONE_ERROR:Enabled + [HOST] [IPU2 ] 16.029311 s: VX_ZONE_WARNING:Enabled + [HOST] [IPU2 ] 16.032940 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! + [HOST] [IPU2 ] 16.033093 s: SYSTEM: Initializing TIOVX ... Done !!! + [HOST] [IPU2 ] 16.033154 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 16.033215 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 16.033306 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 16.033367 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 16.033428 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 16.033855 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 16.033916 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 16.034099 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 16.034160 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 16.034221 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 16.037302 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 16.037424 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 16.037516 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 16.037607 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 16.037699 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 16.037790 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 16.038187 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 16.038278 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 16.038370 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 16.038461 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 16.038553 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 16.038644 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 16.038980 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 16.039102 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 16.039193 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 16.039285 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 16.039376 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 16.039468 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 16.039803 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 16.039895 s: VPDMA Firmware Address = 0xa035ba40 + [HOST] [IPU2 ] 16.039986 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 16.040108 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 16.040200 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 16.040291 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 16.099951 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 16.100866 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 16.101201 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 16.101293 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253744 B (247 KB) + [HOST] [IPU2 ] 16.101476 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 16.101628 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + [HOST] [IPU2 ] 16.101811 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) + [HOST] [IPU2 ] 16.101964 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 16.365155 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 16.447935 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 16.458274 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 16.458732 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 16.466632 s: + [HOST] [HOST ] 31.584639 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Vision SDK Usecases + [HOST] [HOST ] ==================== + [HOST] [HOST ] 1: Single Camera Usecases + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + [HOST] [HOST ] 3: Open-Compute Usecases + [HOST] [HOST ] + [HOST] [HOST ] p: CPU Status + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + [HOST] [HOST ] + [HOST] [HOST ] s: System Settings + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3^H + [HOST] [HOST ] 43.847373 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 43.847404 s: + [HOST] [HOST ] 43.847404 s: Unsupported option '. Please try again + [HOST] [HOST ] 43.847404 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 47.871530 s: + [HOST] [HOST ] 47.871530 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCL Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY + [HOST] [HOST ] 4: OpenCL framecopy Usecases + [HOST] [HOST ] 5: Chains_openclFrameCopy_DecodeDisplay + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +1 + [HOST] [HOST ] 52.783627 s: + [HOST] [IPU2 ] 52.783779 s: CHAINS: Sensor create in progress + [HOST] [IPU2 ] 52.784542 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 + [HOST] [IPU2 ] 52.881443 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 + [HOST] [IPU2 ] 52.881778 s: CHAINS: Sensor create ... DONE !!! + [HOST] [IPU2 ] 52.896663 s: CAPTURE: Create in progress !!! + [HOST] [IPU2 ] 52.897059 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! + ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) + [HOST] [HOST ] 53.019703 s: IPC_IN_0 : Create in progress !!! + [HOST] [HOST ] 53.020100 s: IPC_IN_0 : Create Done !!! + [HOST] [HOST ] 53.020191 s: ALG: ERROR: No alg create function specified (algId = 6) !!! + [HOST] [IPU2 ] 53.018544 s: CAPTURE: Create Done !!! + [HOST] [IPU2 ] 53.019032 s: IPC_OUT_0 : Create in progress !!! + [HOST] [IPU2 ] 53.019429 s: IPC_OUT_0 : Create Done !!! + +Hi Xie Baojian, From attached log, I can see the "apps.out" you are using is still the older version (built on Apr 2 2018) [HOST] [IPU2 ] 15.817452 s: ***** IPU2 Firmware build time 21:09:18 Apr 2 2018 [HOST] [IPU2 ] 15.817605 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 15.820716 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 15.831757 s: UTILS: CIO: Init Done !!! [HOST] [IPU2 ] 15.831879 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 15.831970 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 15.835082 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 15.944396 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 15.959372 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 15.979411 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.999389 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 16.019429 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! Could you please copy apps.out you built recently to /opt/vision_sdk folder & try with that Regards Surya + +Hi Surya, I have already identified my apps.out in directory /opt/vision_sdk Is the latest. I would like to know IPU2 Firmware which directory it is running in? I checked that "ti_components/os_tools/linux/targetfs/lib/firmware" the file inside is also the latest one generated. Is the system runs "ti_components/os_tools/linux/targetfs/lib/firmware" when it is running？ Regards, Xie Baojian + +Hi Xie Baojian, Depending upon the boot args passed in uenv.txt file, System will load apps.out either from SD card or nfs server path Regards Surya + +Hi Surya, my uenv.txt is: fdtfile=dra7-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" and my apps.out mounted to my VM directory through the network. I do not see the IPU2 Firmware execution path information. Regards, Xie Baojian + +Hi Xie Baojian, From the boot args, it is clear System is loading "apps.out" from SD card Attaching "uenv_nfs.txt" (also available under build/hlos/scripts/linux folder ) Use this if you want to load from nfs server path Modify the file & point to your file system path uenv_nfs.txt fdtfile=dra7-evm-infoadas.dtb +args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.24.210.101:/adasuser/shiju/ADAS/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' + Regards Surya + +Hi Surya, I try your uenv_nfs.txt， But it cannot log in . the info is： _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: [ 28.044468] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [ 28.058608] omap_hwmod: mmu1_dsp2: _wait_target_disable failed [ 28.072453] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 28.086292] omap_hwmod: mmu0_dsp2: _wait_target_disable failed _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root Login incorrect dra7xx-evm login: Is it necessary to add any parameters? Regards, Xie Baojian + +Hi Xie Baojian, This thread is duplicate to below thread e2e.ti.com/.../697488 could you please close this thread ? Regards Surya + diff --git a/data2/text/range/30001+/696622.txt b/data2/text/range/30001+/696622.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7292c5f85f0196e5022b5645ffa475b0fa632d2 --- /dev/null +++ b/data2/text/range/30001+/696622.txt @@ -0,0 +1,1606 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux [FAILED] Failed to start Load Kernel Modules + +Query Text: +Part Number: TDA2 Tool/software: Linux when i start the system， In the boot phase There is an error message： [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. Why did this error occur? here is my boot_log： log_boot.txt OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 3 ms (53.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3552144 bytes read in 89 ms (38.1 MiB/s) +106665 bytes read in 29 ms (3.5 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363390 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gd326d64 (htf@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Apr 2 20:16:47 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) +[ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000333] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000341] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000776] Console: colour dummy device 80x30 +[ 0.000793] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000799] This ensures that you still see kernel messages. Please +[ 0.000805] update your kernel commandline. +[ 0.000817] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000830] pid_max: default: 32768 minimum: 301 +[ 0.000927] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000937] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001480] Initializing cgroup subsys io +[ 0.001496] Initializing cgroup subsys memory +[ 0.001521] Initializing cgroup subsys devices +[ 0.001532] Initializing cgroup subsys freezer +[ 0.001544] Initializing cgroup subsys perf_event +[ 0.001555] Initializing cgroup subsys pids +[ 0.001583] CPU: Testing write buffer coherency: ok +[ 0.001784] /cpus/cpu@0 missing clock-frequency property +[ 0.001799] /cpus/cpu@1 missing clock-frequency property +[ 0.001810] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001842] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080060] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080129] Brought up 2 CPUs +[ 0.080142] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080149] CPU: All CPU(s) started in HYP mode. +[ 0.080154] CPU: Virtualization extensions available. +[ 0.080534] devtmpfs: initialized +[ 0.109254] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110223] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313022] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313043] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.317268] pinctrl core: initialized pinctrl subsystem +[ 0.318123] NET: Registered protocol family 16 +[ 0.319047] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340216] cpuidle: using governor ladder +[ 0.370237] cpuidle: using governor menu +[ 0.378716] OMAP GPIO hardware version 0.1 +[ 0.385122] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401175] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401189] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.410442] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.410452] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410920] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410929] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.411516] OMAP DMA hardware revision 0.0 +[ 0.451432] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452588] edma 43300000.edma: memcpy is disabled +[ 0.457247] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461657] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461841] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462004] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462162] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462453] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462638] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465650] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481077] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.553399] pcf857x 0-0020: probed +[ 0.553952] pcf857x 0-0021: probed +[ 0.554101] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.554490] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.554695] media: Linux media interface: v0.10 +[ 0.554746] Linux video capture interface: v2.00 +[ 0.554789] pps_core: LinuxPPS API ver. 1 registered +[ 0.554797] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.554821] PTP clock support registered +[ 0.554867] EDAC MC: Ver: 3.0.0 +[ 0.555616] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.555919] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.556247] Advanced Linux Sound Architecture Driver Initialized. +[ 0.557082] clocksource: Switched to clocksource arch_sys_counter +[ 0.567652] NET: Registered protocol family 2 +[ 0.568150] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568213] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.568338] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.568384] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568415] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568625] NET: Registered protocol family 1 +[ 0.568895] RPC: Registered named UNIX socket transport module. +[ 0.568904] RPC: Registered udp transport module. +[ 0.568911] RPC: Registered tcp transport module. +[ 0.568917] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.569915] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579841] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.580488] NFS: Registering the id_resolver key type +[ 0.580516] Key type id_resolver registered +[ 0.580523] Key type id_legacy registered +[ 0.580577] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.581840] bounce: pool size: 64 pages +[ 0.581990] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.582005] io scheduler noop registered +[ 0.582016] io scheduler deadline registered +[ 0.582048] io scheduler cfq registered (default) +[ 0.586948] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.590159] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.590172] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.590206] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.590227] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.620339] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.620518] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.620531] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.620542] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.620552] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.620949] PCI: bus0: Fast back to back transfers disabled +[ 0.621068] PCI: bus1: Fast back to back transfers enabled +[ 0.621152] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.621167] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.621180] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.621397] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.681308] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.684700] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.693036] console [ttyS0] enabled +[ 1.697444] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.707157] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.717212] [drm] Initialized drm 1.1.0 20060810 +[ 1.723222] OMAP DSS rev 6.1 +[ 1.726966] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.742737] loop: module loaded +[ 1.746247] vmemexp device MAJOR num = 246 +[ 1.750401] vmemexp class registered +[ 1.754112] /dev/vmemexp device registered +[ 1.758246] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.763921] nand: No NAND device found +[ 1.767710] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.777644] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.783042] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.788920] Creating 7 MTD partitions on "spi32766.0": +[ 1.794084] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.800200] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.806529] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.813476] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.820174] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.827579] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.833925] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.841707] libphy: Fixed MDIO Bus: probed +[ 1.897114] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.903239] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.913520] libphy: 48485000.mdio: probed +[ 1.917591] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.925634] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.934347] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 +[ 1.941044] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.948050] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 +[ 1.956656] mousedev: PS/2 mouse device common for all mice +[ 1.962872] i2c /dev entries driver +[ 1.971657] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.977264] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.983648] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.990206] evm_3v3_sw: supplied by sysen1 +[ 2.070864] mmc0: MAN_BKOPS_EN bit is not set +[ 2.107574] mmc0: new HS200 MMC card at address 0001 +[ 2.123013] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.138074] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.144273] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.152055] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.160755] aic_dvdd: supplied by evm_3v3_sw +[ 2.166656] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.174313] NET: Registered protocol family 10 +[ 2.179724] sit: IPv6 over IPv4 tunneling driver +[ 2.184969] NET: Registered protocol family 17 +[ 2.189690] Key type dns_resolver registered +[ 2.194090] omap_voltage_late_init: Voltage driver support not added +[ 2.201018] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.207250] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.213959] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.220209] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.228508] Power Management for TI OMAP4+ devices. +[ 2.233583] Registering SWP/SWPB emulation handler +[ 2.240531] dmm 4e000000.dmm: initialized all PAT entries +[ 2.247886] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.254527] [drm] No driver support for vblank timestamp query. +[ 2.260879] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.267733] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.308327] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.321067] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.327995] hctosys: unable to open rtc device (rtc0) +[ 2.341324] evm_1v8: disabling +[ 2.344395] aic_dvdd: disabling +[ 2.347571] vmmcwl_fixed: disabling +[ 2.351253] ldousb: disabling +[ 2.354633] ALSA device list: +[ 2.357628] #0: DRA7xx-EVM +[ 2.361167] Waiting for root device PARTUUID=2ca9f500-02... +[ 2.566938] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.581986] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.588873] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.598492] mmcblk1: p1 p2 +[ 2.690402] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.701855] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.920888] EXT4-fs (mmcblk1p2): recovery complete +[ 2.929446] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.937619] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.947186] devtmpfs: mounted +[ 2.950358] Freeing unused kernel memory: 340K +[ 2.954819] This architecture does not have kernel memory protection. +[ 3.077237] systemd[1]: System time before build time, advancing clock. +[ 3.107526] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.122619] random: systemd: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.134000] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.152464] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.181228] systemd[1]: Set hostname to . +[ 3.237533] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.249356] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.268457] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.296989] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.310517] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.385834] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.395364] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.405247] random: systemd: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.738362] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 3.746151] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 3.753941] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 3.761235] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 3.768702] systemd[1]: sysinit.target: Found dependency on dbus.socket/start +[ 3.775871] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 3.783314] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 3.792766] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 3.829606] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 3.857490] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 3.887367] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.917447] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 3.948485] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 3.977342] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 3.997257] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.017370] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.037357] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.057830] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.077285] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.097864] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.147460] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.168016] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.184597] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.247304] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.269444] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.299437] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.329492] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.344493] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.358847] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.377648] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.407284] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.427376] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.487470] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.507434] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.543564] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.577490] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.597308] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.617481] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.266750] systemd-journald[160]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ 5.701263] omap-rproc 55020000.ipu: assigned reserved memory nod ipu2_cma@95800000 + Starting Load/Save Random Seed... +[ 5.722109] remoteproc0: 55020000.ipu is available +[ 5.732773] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ OK ] Started Create Volatile Files and Directories.[ 5.759577] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + +[ 5.785158] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ OK ] Started Load/Save Random Seed.[ 5.803472] remoteproc1: 40800000.dsp is available + +[ 5.826897] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 5.844034] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 5.870124] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 5.887878] remoteproc2: 41000000.dsp is available +[ 5.902123] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 5.922263] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.099693] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 6.147227] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ OK ] Found device /dev/ttyS0. + Starting Network Time Synchronization... + Starting Update UTMP about System Boot/Shutdown... +[ 6.385896] remoteproc0: registered virtio0 (type 7) +[ 6.391204] remoteproc1: registered virtio1 (type 7) +[ 6.557513] SCSI subsystem initialized +[ 6.589340] remoteproc2: registered virtio2 (type 7) +[ 6.630733] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 6.641954] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 6.670333] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 6.706123] CAN device driver interface +[ OK ] Started Network Time Synchronization. +[ 6.763187] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ 6.779580] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ OK ] Reached target System Time Synchronized. +[ 6.843052] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled + Starting Synchronize System and HW clocks... +[ 6.866972] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ OK ] Started Synchronize System and HW clocks. +[ 6.945559] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 7.035579] scsi host0: ahci +[ 7.039115] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ 7.082236] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ OK ] Reached target System Initialization. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 7.322022] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Started D-Bus System Message Bus. +[ 7.407133] ata1: SATA link down (SStatus 0 SControl 300) + Starting Network Service... +[ OK ] Started Kernel Logging Service. +[ 7.583958] net eth1: initializing cpsw version 1.15 (0) + Starting uim-sysfs.service... +[ 7.600117] net eth0: initialized cpsw ale version 1.4 +[ OK ] Started System Logging Service. +[ 7.629012] net eth0: ALE Table size 1024 + Starting Avahi mDNS/DNS-SD Stack... +[ 7.683860] net eth1: phy found : id is : 0x20005c7a + Starting Save/Restore Sound Card State... + Starting TI MultiCore Tools Daemon... +[ 7.736484] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready + Starting Permit User Sessions... +[ 7.769368] net eth0: initializing cpsw version 1.15 (0) + Starting Print notice about GPLv3 packages... +[ 7.804077] net eth0: phy found : id is : 0x20005c7a +[ 7.824165] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready + Starting Login Service... + Starting Telephony service... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ 7.884302] remoteproc0: powering up 55020000.ipu +[ 7.922692] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9507952 +[ OK ] Started Network Service.[ 7.945417] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 + +[ OK ] Started Save/Restore Sound Card State. +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ OK ] Started Permit User Sessions. +[ 7.991051] remoteproc0: remote processor 55020000.ipu is now up +[ 7.999012] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.005751] remoteproc1: powering up 40800000.dsp +[ 8.023869] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7449552 +[ 8.061079] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 8.066975] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 8.072928] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 8.206524] remoteproc1: remote processor 40800000.dsp is now up +[ 8.240428] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 8.257438] remoteproc2: powering up 41000000.dsp +[ 8.283116] Bluetooth: Core ver 2.21 +[ 8.286754] NET: Registered protocol family 31 +[ 8.301927] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7449552 +[ 8.306965] NET: Registered protocol family 15 +[ 8.329597] Bluetooth: HCI device and connection manager initialized +[ 8.335994] Bluetooth: HCI socket layer initialized +[ 8.363724] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 8.369617] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 8.375552] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 8.389062] Bluetooth: L2CAP socket layer initialized +[ 8.394165] Bluetooth: SCO socket layer initialized +[ 8.504235] Initializing XFRM netlink socket +[ 8.535389] remoteproc2: remote processor 41000000.dsp is now up +[ 8.560392] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 8.576235] random: nonblocking pool is initialized +[ 8.620850] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 8.633950] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 8.661879] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 8.669718] NET: Registered protocol family 41 +[ 8.960751] usbcore: registered new interface driver usbfs +[ 8.977353] usbcore: registered new interface driver hub +[ 8.991814] usbcore: registered new device driver usb +[ 9.044703] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 9.059356] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 9.084766] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.111763] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.125832] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.143576] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.163045] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.177784] hub 1-0:1.0: USB hub found +[ 9.185835] hub 1-0:1.0: 1 port detected +[ 9.194877] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.208965] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.225699] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.244658] hub 2-0:1.0: USB hub found +[ 9.252525] hub 2-0:1.0: 1 port detected +[ OK ] Started Avahi mDNS/DNS-SD Stack. +[ OK ] Started Telephony service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Reached target Network. + Starting Network Name Resolution... + Starting Lightning Fast Webserver With Light System Requirements... +[ OK ] Started Login Service. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 9.748072] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 9.804755] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 9.813933] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started Print notice about GPLv3 packages. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: + +Responses: +Hi , Are you able to login from the prompt . ? Regards Chetan.M + +Hi Chetan.M, Now i cannot log in use root, the info is: _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: [ 28.044468] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [ 28.058608] omap_hwmod: mmu1_dsp2: _wait_target_disable failed [ 28.072453] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 28.086292] omap_hwmod: mmu0_dsp2: _wait_target_disable failed _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root Login incorrect dra7xx-evm login: How can I log in? Regards, Xie Baojian + +Hi Xie, From your logs I notice that the kernel still continues to load and you're able to get to prompt. Do you notice this error every time? Can you run the below commands on the target ? systemctl status systemd-modules-load.service lsmod Which boot media are you using? Can you try an SD boot with the rootfs and boot partitions flashed to the SD card? It's possible the zImage and the kernel modules (in the targetfs) are not in sync. Regards Shravan + +Hi Shravan, I booted from the path of the virtual machine I mounted，not use SD boot. My start.sh is: ifconfig eth0 172.17.123.117 netmask 255.255.224.0 mount -t nfs -o nolock,nfsvers=3,vers=3 172.17.123.14:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs /mnt cd /mnt/opt/vision_sdk/ ./load_ocl_kos.sh source ./vision_sdk_load.sh ./apps.out My uenv.txt is: fdtfile=dra7-evm-infoadas.dtb args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.123.14:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' Is there a problem with this setting? Regards, Xie Baojian + +add: i boot from SD card， and log in to the mount path。 + +Hi Xie, Have you made any changes to the kernel? If yes, please recreate the SD card (using the steps in the vision-SDK user guide -- how to create a SD card). Your uenv.txt settings are fine, but it looks to me that the zImage and the kernel modules are out of sync. Creating the card is a one-time step (provided you're not making any more changes to the linux kernel), and you can subsequently use NFS. Regards Shravan + +Hi Shravan, I have create my SD card, when i use NFS + SD boot mode , Is only MLO、u-boot.img、uenv.txt three files in the SD card? Where is the zImage file placed? Regards， Xie Baojian + +Hi Shravan, If i use NFS + SD boot mode, Do I need to use tisdk-rootfs-image-dra7xx-evm.tar.xz ? and Do I need to Format SD card and create two partitions (boot (FAT32) and rootfs(ext4)) ? Regards, Xie Baojian + +Hi Xie, Yes you need to format your card and create two partitions -- boot (FAT32) and rootfs (ext4). The script mksdboot.sh does this (refer section 4.2 of docs/Linux/VisionSDK_LinuxUserGuide.pdf in vision-sdk). The zImage is present in the '/boot' folder of the rootfs (ext4) partition. Regards Shravan + +Hi Shravan, I have recreate my SD card and My compilation mode is tda2xx_evm_linux_opencx. But it is still cannot log in use root. Below is the boot log： log-boot.txt dra7xx-evm login: [ 32.044515] omap_hwmod: mmu1_dsp2: _wait_target_disable failed [ 32.058657] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [ 32.072498] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 32.086190] omap_hwmod: mmu0_dsp1: _wait_target_disable failed How can I solve it? Regards, Xie Baojian + +Hi Xie, Please try the following: 1. Ensure you're booting your board in production SD boot mode. This can be achieved by setting the SYSBOOT settings as below: SYSBOOT [ 0:15] : 00001100 10000001 2. Ensure the SD card is connected to your pc and run the below command (replace the contents of the uenv.txt in your FAT-32 partition): PC# cp /build/hlos/scripts/linux/uenv_sd.txt /uenv.txt 3. Halt at u-boot and run the below commands: env default -fa saveenv 4. Reboot the board. You should be able to log into the system. Regards Shravan + +Hi Shravan, Thank for your approach，I can log in ， But I cannot run the openclframecopy usecase successfully. I have done Following steps: 1、MAKECONFIG = tda2xx_evm_linux_opencx； Run below commands from vision_sdk\ build folder rm -rf ../binaries make clean make linux_clean make linux make linux_install make -s -j depend make -s -j opencx and build success without any errors my uenv.txt is uenv_sd.txt But it cannot run success on the target. Is there a problem with my build environment? Below is the log I have been plagued by this problem for a long time. I really hope to get your help. log13.txt at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> pri +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baudrate=115200 +board=dra7xx +board_name=dra7xx +board_rev=H.0 +boot_fdt=try +boot_fit=0 +boot_os=0 +bootargs=androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyO0,115200n8 +cpu=armv7 +dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 +dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 +dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 +dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 +dfu_bufsiz=0x10000 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +ethaddr=7c:38:66:a1:e2:a6 +fastboot.board_rev=H.0 +fastboot.cpu=J6 +fastboot.secure=GP +fastboot.userdata_size=unknown +fdt_addr_r=0x88000000 +fdtaddr=0x88000000 +fdtcontroladdr=fdf0a598 +fdtfile=undefined +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=0 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} +partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=10M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +scsidevs=0 +serial#=0b0140144bb600a2 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +stderr=serial@4806a000 +stdin=serial@4806a000 +stdout=serial@4806a000 +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=ti +ver=U-Boot 2016.05-00008-g1fbee98 (Jun 07 2018 - 20:31:19 +0800) +vram=16M + +Environment size: 7470/131067 bytes +=> env default -fa +## Resetting to default environment +=> saveenv +Saving Environment to MMC... +Writing to redundant MMC(1)... done +=> reboot +Unknown command 'reboot' - try 'help' +=> boot +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 2 ms (80.1 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3552160 bytes read in 110 ms (30.8 MiB/s) +106665 bytes read in 15 ms (6.8 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x3633a0 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gd326d64 (hancan@hancan-virtual-machine) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Thu Jun 7 20:42:56 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) +[ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000329] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000337] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000772] Console: colour dummy device 80x30 +[ 0.000787] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000794] This ensures that you still see kernel messages. Please +[ 0.000799] update your kernel commandline. +[ 0.000813] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000825] pid_max: default: 32768 minimum: 301 +[ 0.000921] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000931] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001474] Initializing cgroup subsys io +[ 0.001490] Initializing cgroup subsys memory +[ 0.001514] Initializing cgroup subsys devices +[ 0.001526] Initializing cgroup subsys freezer +[ 0.001537] Initializing cgroup subsys perf_event +[ 0.001548] Initializing cgroup subsys pids +[ 0.001575] CPU: Testing write buffer coherency: ok +[ 0.001777] /cpus/cpu@0 missing clock-frequency property +[ 0.001792] /cpus/cpu@1 missing clock-frequency property +[ 0.001802] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001834] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080058] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080128] Brought up 2 CPUs +[ 0.080141] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080147] CPU: All CPU(s) started in HYP mode. +[ 0.080152] CPU: Virtualization extensions available. +[ 0.080531] devtmpfs: initialized +[ 0.109242] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110221] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313080] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313100] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.317325] pinctrl core: initialized pinctrl subsystem +[ 0.318175] NET: Registered protocol family 16 +[ 0.319103] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340217] cpuidle: using governor ladder +[ 0.370245] cpuidle: using governor menu +[ 0.378708] OMAP GPIO hardware version 0.1 +[ 0.385082] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401068] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401081] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.410323] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.410334] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410795] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410805] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.411376] OMAP DMA hardware revision 0.0 +[ 0.451372] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452531] edma 43300000.edma: memcpy is disabled +[ 0.457176] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461567] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461744] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.461910] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462064] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462353] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462539] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465540] palmas 0-0058: IRQ missing: skipping irq request +[ 0.480976] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.553288] pcf857x 0-0020: probed +[ 0.553850] pcf857x 0-0021: probed +[ 0.554000] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.554391] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.554596] media: Linux media interface: v0.10 +[ 0.554647] Linux video capture interface: v2.00 +[ 0.554690] pps_core: LinuxPPS API ver. 1 registered +[ 0.554697] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.554721] PTP clock support registered +[ 0.554766] EDAC MC: Ver: 3.0.0 +[ 0.555511] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.555809] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.556139] Advanced Linux Sound Architecture Driver Initialized. +[ 0.556976] clocksource: Switched to clocksource arch_sys_counter +[ 0.567594] NET: Registered protocol family 2 +[ 0.568088] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568151] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.568276] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.568322] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568353] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568562] NET: Registered protocol family 1 +[ 0.568831] RPC: Registered named UNIX socket transport module. +[ 0.568840] RPC: Registered udp transport module. +[ 0.568847] RPC: Registered tcp transport module. +[ 0.568853] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.569851] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579807] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.580457] NFS: Registering the id_resolver key type +[ 0.580484] Key type id_resolver registered +[ 0.580492] Key type id_legacy registered +[ 0.580545] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.581805] bounce: pool size: 64 pages +[ 0.581952] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.581965] io scheduler noop registered +[ 0.581977] io scheduler deadline registered +[ 0.582010] io scheduler cfq registered (default) +[ 0.586905] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.590173] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.590186] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.590219] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.590241] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.620429] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.620605] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.620618] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.620628] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.620638] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.621042] PCI: bus0: Fast back to back transfers disabled +[ 0.621160] PCI: bus1: Fast back to back transfers enabled +[ 0.621242] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.621257] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.621270] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.621489] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.681968] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.685355] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.695337] console [ttyS0] enabled +[ 1.699736] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.709441] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.719491] [drm] Initialized drm 1.1.0 20060810 +[ 1.725499] OMAP DSS rev 6.1 +[ 1.729295] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.745084] loop: module loaded +[ 1.748626] vmemexp device MAJOR num = 246 +[ 1.752755] vmemexp class registered +[ 1.756467] /dev/vmemexp device registered +[ 1.760602] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.766274] nand: No NAND device found +[ 1.770064] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.780008] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.785405] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.791288] Creating 7 MTD partitions on "spi32766.0": +[ 1.796451] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.802569] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.808925] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.815850] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.822557] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.829958] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.836301] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.844100] libphy: Fixed MDIO Bus: probed +[ 1.897007] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.903132] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.913632] libphy: 48485000.mdio: probed +[ 1.917704] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.925746] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.934473] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 +[ 1.941169] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.948182] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 +[ 1.956804] mousedev: PS/2 mouse device common for all mice +[ 1.963036] i2c /dev entries driver +[ 1.971772] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.977389] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.983773] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.990332] evm_3v3_sw: supplied by sysen1 +[ 2.070762] mmc0: MAN_BKOPS_EN bit is not set +[ 2.107563] mmc0: new HS200 MMC card at address 0001 +[ 2.123001] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.138059] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.144243] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.151978] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.160720] aic_dvdd: supplied by evm_3v3_sw +[ 2.166623] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.174329] NET: Registered protocol family 10 +[ 2.179735] sit: IPv6 over IPv4 tunneling driver +[ 2.184944] NET: Registered protocol family 17 +[ 2.189669] Key type dns_resolver registered +[ 2.194071] omap_voltage_late_init: Voltage driver support not added +[ 2.200999] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.207230] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.213938] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.220191] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.228443] Power Management for TI OMAP4+ devices. +[ 2.233519] Registering SWP/SWPB emulation handler +[ 2.240461] dmm 4e000000.dmm: initialized all PAT entries +[ 2.247819] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.254460] [drm] No driver support for vblank timestamp query. +[ 2.260815] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.267669] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.308218] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.327906] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.334795] hctosys: unable to open rtc device (rtc0) +[ 2.348137] evm_1v8: disabling +[ 2.351220] aic_dvdd: disabling +[ 2.354379] vmmcwl_fixed: disabling +[ 2.358073] ldousb: disabling +[ 2.361473] ALSA device list: +[ 2.364452] #0: DRA7xx-EVM +[ 2.367999] Waiting for root device PARTUUID=2ca9f500-02... +[ 2.566831] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.581884] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.598785] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.608384] mmcblk1: p1 p2 +[ 2.700446] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.711919] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.649335] EXT4-fs (mmcblk1p2): recovery complete +[ 3.655107] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.663289] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 3.674130] devtmpfs: mounted +[ 3.677382] Freeing unused kernel memory: 340K +[ 3.681843] This architecture does not have kernel memory protection. +[ 3.807209] systemd[1]: System time before build time, advancing clock. +[ 3.842182] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.857727] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.873367] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.891880] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.921000] systemd[1]: Set hostname to . +[ 3.978497] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.990435] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.997224] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.025881] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.042360] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.120504] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.129985] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.139825] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.468095] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.475884] systemd[1]: sockets.target: Found dependency on dbus.socket/start +[ 4.483108] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.490560] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.498293] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.505548] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.512998] systemd[1]: sockets.target: Breaking ordering cycle by deleting job dbus.socket/start +[ 4.521929] systemd[1]: dbus.socket: Job dbus.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping D-Bus System Message Bus Socket +[ 4.557398] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.565184] systemd[1]: sockets.target: Found dependency on rpcbind.socket/start +[ 4.572661] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.580130] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.587867] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.595125] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.602592] systemd[1]: sockets.target: Breaking ordering cycle by deleting job rpcbind.socket/start +[ 4.611803] systemd[1]: rpcbind.socket: Job rpcbind.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping RPCbind Server Activation Socket +[ 4.637317] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.645101] systemd[1]: sockets.target: Found dependency on avahi-daemon.socket/start +[ 4.653015] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.660481] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.668218] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.675475] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.682942] systemd[1]: sockets.target: Breaking ordering cycle by deleting job avahi-daemon.socket/start +[ 4.692590] systemd[1]: avahi-daemon.socket: Job avahi-daemon.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping Avah...S/DNS-SD Stack Activation Socket +[ 4.727345] systemd[1]: dropbear.socket: Found ordering cycle on dropbear.socket/stop +[ 4.735216] systemd[1]: dropbear.socket: Found dependency on sysinit.target/start +[ 4.742781] systemd[1]: dropbear.socket: Found dependency on alignment.service/start +[ 4.750598] systemd[1]: dropbear.socket: Found dependency on basic.target/start +[ 4.758002] systemd[1]: dropbear.socket: Found dependency on sockets.target/start +[ 4.765520] systemd[1]: dropbear.socket: Found dependency on dropbear.socket/stop +[ 4.773075] systemd[1]: dropbear.socket: Breaking ordering cycle by deleting job alignment.service/start +[ 4.782636] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with dropbear.socket/stop +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.820458] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.847295] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.867357] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.887254] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.907263] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.927225] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.947223] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.967324] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.997313] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 5.028394] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 5.077428] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.107907] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 5.187335] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 5.209453] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 5.244658] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 5.269357] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 5.299520] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 5.327844] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 5.387308] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 5.404701] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 5.410440] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 5.438622] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 5.457179] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 5.477182] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 5.497227] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 5.547349] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 5.573372] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.597238] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.617319] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.647409] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Setup Virtual Console. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 6.269836] systemd-journald[117]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ 6.645296] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.671979] remoteproc0: 55020000.ipu is available +[ 6.684290] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.705705] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.740884] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.759524] remoteproc1: 40800000.dsp is available + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. +[ 6.781929] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.795057] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Create Volatile Files and Directories... +[ 6.826685] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.850174] remoteproc2: 41000000.dsp is available +[ 6.865408] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.888574] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. +[ 6.942505] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 6.957989] remoteproc0: registered virtio0 (type 7) +[ 6.982793] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Volatile Files and Directories. +[ 7.068743] remoteproc1: registered virtio1 (type 7) +[ 7.084233] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.158582] remoteproc2: registered virtio2 (type 7) + Starting Update UTMP about System Boot/Shutdown... +[ 7.262284] SCSI subsystem initialized + Starting Network Time Synchronization... +[ 7.339781] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Network Time Synchronization. +[ 7.406262] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Update UTMP about System Boot/Shutdown.[ 7.417726] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 + +[ 7.440443] CAN device driver interface +[ 7.517218] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ 7.590342] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 7.607359] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.628143] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.661923] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 7.776003] scsi host0: ahci +[ 7.779739] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 7.969023] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. + Starting Print notice about GPLv3 packages... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. + Starting Save/Restore Sound Card State... + Starting uim-sysfs.service... + Starting TI MultiCore Tools Daemon... +[ OK ] Started System Logging Service. + Starting Permit User Sessions... + Starting Network Service... +[ OK ] Started Kernel Logging Service. +[ OK ] Started Save/Restore Sound Card State. +[ OK ] Started Permit User Sessions. +[ 8.157037] ata1: SATA link down (SStatus 0 SControl 300) +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ 8.195868] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service. +[ 8.234583] net eth0: initialized cpsw ale version 1.4 +[ 8.263256] net eth0: ALE Table size 1024 +[ 8.293195] NET: Registered protocol family 15 +[ 8.318197] net eth1: phy found : id is : 0x20005c7a +[ 8.371771] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.411130] net eth0: initializing cpsw version 1.15 (0) +[ 8.454059] net eth0: phy found : id is : 0x20005c7a +[ 8.499265] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.594856] Initializing XFRM netlink socket +[ 8.949514] remoteproc0: powering up 55020000.ipu +[ 8.969231] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 3506540 +[ 8.986247] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 9.040504] remoteproc0: remote processor 55020000.ipu is now up +[ 9.058215] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 9.072003] remoteproc1: powering up 40800000.dsp +[ 9.082869] random: nonblocking pool is initialized +[ 9.089121] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 9.098842] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2851415 +[ 9.118291] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 9.124176] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 9.130114] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 9.177883] remoteproc1: remote processor 40800000.dsp is now up +[ 9.192761] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 9.198343] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x3d +[ 9.214629] remoteproc2: powering up 41000000.dsp +[ 9.231706] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2851415 +[ 9.253303] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.259191] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.265153] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ 9.333515] remoteproc2: remote processor 41000000.dsp is now up +[ 9.352288] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 9.357869] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x3d +[ 9.396790] NET: Registered protocol family 41 +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 9.802990] usbcore: registered new interface driver usbfs +[ 9.815713] usbcore: registered new interface driver hub +[ 9.821311] usbcore: registered new device driver usb +[ 9.875783] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 9.882994] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 9.891959] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.898961] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 9.899590] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.899610] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.919300] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.928175] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.934831] hub 1-0:1.0: USB hub found +[ 9.941470] hub 1-0:1.0: 1 port detected +[ 9.945820] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.953060] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.962386] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.972707] hub 2-0:1.0: USB hub found +[ 9.976564] hub 2-0:1.0: 1 port detected +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +[ 10.454575] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 10.462890] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started Print notice about GPLv3 packages. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# [ 19.194447] omap_hwmod: mmu1_dsp1: _wait_target_disable failed +[ 19.208354] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 20.084449] omap_hwmod: mmu1_dsp2: _wait_target_disable failed +[ 20.098354] omap_hwmod: mmu0_dsp2: _wait_target_disable failed + +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# root +-sh: root: command not found +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# ls +FragShader.fsh VipClockInversion.sh cmemk.ko enableIpu2CCSConectivity.sh load_ocl_kos.sh opencl_env.sh ub964Init.sh +FragShader3Dsfm.fsh apps.out debugss_kmodule.ko gdbserverproxy.ko memcache_load.sh ov106x3Config.sh vision_sdk_load.sh +VertShader.vsh bin disableDssInterruptsOnA15.sh hdmiReceiverConfig.sh memcache_unload.sh pvrscope vision_sdk_ov490_pinmux.sh +VertShader3Dsfm.vsh car.pod enableImx290.sh jeep2.bmp models tda2exEnableAVB.sh vision_sdk_unload.sh +root@dra7xx-evm:/opt/vision_sdk# ./load_ocl_kos.sh + +Opened log file: lad.txt + +numProcessors = 5 id = 0 baseId = 0 + +Spawned daemon: /usr/bin/lad_dra7xx + +[ 49.788875] CMEMK module: reference Linux version 4.4.84 +[ 49.794888] allocated heap buffer 0x40400000 of size 0x100000 +[ 49.801212] cmemk initialized +root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh +[ 71.469463] DMA: Module install successful, device major num = 242 +[ 71.475909] DRV: Module install successful +insmod: ERROR: could not insert module ./bin/cmemk.ko: File exists +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found +updated 0x4A002AC4 value is 00930000 +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb65af000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6baf000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6aef000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6b2f000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + 80.228166] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 80.265311] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ HOST] [HOST ] 143.146098 s: SYSTEM: System A15 Init in proress !!! + [HOST] [HOST ] 143.146190 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 143.146190 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 143.147501 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 143.147532 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 143.147593 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 143.147593 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 143.147715 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 143.147745 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 143.147959 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 143.148081 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 143.148173 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 143.148264 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 143.148478 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 143.148600 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 143.148722 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 143.148844 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 143.148935 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 143.149057 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 143.149149 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 143.149271 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 143.149362 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 143.149454 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 143.149576 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 143.149667 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 143.149789 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 143.149881 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 143.150003 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 143.150094 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 143.150186 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 143.150277 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 143.150369 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 143.150552 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.150704 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.150857 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151040 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151192 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151284 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151436 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151589 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151741 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151924 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155005 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155127 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155249 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155523 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155645 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155767 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155859 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155950 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.156011 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.156103 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.157201 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 + [HOST] [HOST ] 143.157231 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 143.157689 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 143.157689 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 143.157841 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 143.157902 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [IPU2 ] 72.002958 s: ***** IPU2 Firmware build time 20:58:27 Jun 7 2018 + [HOST] [IPU2 ] 72.003141 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 72.006008 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 72.014975 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 72.015097 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 72.016836 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 72.017781 s: RpmsgInit in progress... + [HOST] [IPU2 ] 72.017842 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 72.018513 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 72.023607 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 72.023699 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 72.023790 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 72.023851 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 72.023912 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 72.024004 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 72.024065 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 72.024217 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 72.024278 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 72.024370 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 72.027176 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.027298 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.027450 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 72.027542 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.027633 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.027694 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.028030 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.028121 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.028213 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 72.028304 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.028396 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.028487 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.028792 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.028884 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.028975 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 72.029067 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.029158 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.029219 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.082779 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 72.083633 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 72.083877 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 72.083968 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 260728 B (254 KB) + [HOST] [IPU2 ] 72.084121 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 72.084273 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + [HOST] [IPU2 ] 72.084517 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1047168 B (0 MB), Free size = 1047168 B (0 MB) + [HOST] [IPU2 ] 72.084670 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 72.233697 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 72.234368 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 72.243183 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 72.243640 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 72.250594 s: + [HOST] [HOST ] 143.704508 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Vision SDK Usecases + [HOST] [HOST ] ==================== + [HOST] [HOST ] 1: Single Camera Usecases + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + [HOST] [HOST ] 3: Open-Compute Usecases + [HOST] [HOST ] + [HOST] [HOST ] p: CPU Status + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + [HOST] [HOST ] + [HOST] [HOST ] s: System Settings + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 147.803117 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 147.803178 s: + [HOST] [HOST ] 147.803178 s: Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 147.803178 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 153.651375 s: + [HOST] [HOST ] 153.651375 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCL Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +1 + [HOST] [HOST ] 159.932105 s: + [HOST] [IPU2 ] 159.932257 s: CHAINS: Sensor create in progress + [HOST] [IPU2 ] 159.932776 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 + [HOST] [IPU2 ] 160.026932 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 + [HOST] [IPU2 ] 160.027237 s: CHAINS: Sensor create ... DONE !!! + [HOST] [IPU2 ] 160.042213 s: CAPTURE: Create in progress !!! + [HOST] [IPU2 ] 160.042579 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! + ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) + [HOST] [HOST ] 160.158726 s: IPC_IN_0 : Create in progress !!! + [HOST] [HOST ] 160.159092 s: IPC_IN_0 : Create Done !!! + [HOST] [HOST ] 160.159153 s: ALG: ERROR: No alg create function specified (algId = 6) !!! + [HOST] [IPU2 ] 160.157658 s: CAPTURE: Create Done !!! + [HOST] [IPU2 ] 160.158146 s: IPC_OUT_0 : Create in progress !!! + [HOST] [IPU2 ] 160.158482 s: IPC_OUT_0 : Create Done !!! + +Hi Shravan, my all Steps is ： 1. clone kernel, uboot, cmem,sgx driver and target file system; 2. run hlos/scripts/linux/setup-linux-build-env.sh and ./hlos/scripts/linux/setup_linux.sh; 3. set git config; 4. git Opencl supported package; 5. MAKECONFIG = tda2xx_evm_linux_opencx； 6. my system path is :PATH="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/clocl:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games" 7. KERNEL_INSTALL_DIR="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel" 8. cd /vision_sdk/build run "rm -rf ../binaries/"; 9. make clean ; make liunx_clean; make -s -j dpend ; make -s -j opencx; 10. use uenv_sd.txt as uenv.txt; There is no error in the above steps . Can you see any clues? Regards, Xie Baojian + +Hi Xie, Would it be possible to create another thread for this issue? The issue pertaining to loading kernel modules seems to be resolved. Please create another thread on running openvx on VSDK and we will support you. Regards Shravan + +Hi Shravan, I have create another thread: e2e.ti.com/.../697488 and i will close this thread. Thank you for a lot. Regards, Xie Baojian + diff --git a/data2/text/range/30001+/697488.txt b/data2/text/range/30001+/697488.txt new file mode 100644 index 0000000000000000000000000000000000000000..255ec727cd1fe58a903a1aa04729fbbf468c2332 --- /dev/null +++ b/data2/text/range/30001+/697488.txt @@ -0,0 +1,966 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux opencx on vision_sdk + +Query Text: +Part Number: TDA2 Tool/software: Linux I cannot run the openclframecopy usecase successfully. I have done Following steps: 1. clone kernel, uboot, cmem,sgx driver and target file system; 2. run hlos/scripts/linux/setup-linux-build-env.sh and ./hlos/scripts/linux/setup_linux.sh; 3. set git config; 4. git Opencl supported package; 5. MAKECONFIG = tda2xx_evm_linux_opencx； 6. my system path is :PATH="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/clocl:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games" 7. KERNEL_INSTALL_DIR="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel" 8. cd /vision_sdk/build run "rm -rf ../binaries/"; 9. make clean ; make liunx_clean; make -s -j dpend ; make -s -j opencx; 10. use uenv_sd.txt as uenv.txt; There is no error in the above steps . But it cannot run success on the target. Below is my running log: 7457.log13.txt at arch/arm/cpu/armv7/omap-common/utils.c:195/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> pri +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baudrate=115200 +board=dra7xx +board_name=dra7xx +board_rev=H.0 +boot_fdt=try +boot_fit=0 +boot_os=0 +bootargs=androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyO0,115200n8 +cpu=armv7 +dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 +dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 +dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 +dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 +dfu_bufsiz=0x10000 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +ethaddr=7c:38:66:a1:e2:a6 +fastboot.board_rev=H.0 +fastboot.cpu=J6 +fastboot.secure=GP +fastboot.userdata_size=unknown +fdt_addr_r=0x88000000 +fdtaddr=0x88000000 +fdtcontroladdr=fdf0a598 +fdtfile=undefined +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=0 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} +partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=10M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +scsidevs=0 +serial#=0b0140144bb600a2 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +stderr=serial@4806a000 +stdin=serial@4806a000 +stdout=serial@4806a000 +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=ti +ver=U-Boot 2016.05-00008-g1fbee98 (Jun 07 2018 - 20:31:19 +0800) +vram=16M + +Environment size: 7470/131067 bytes +=> env default -fa +## Resetting to default environment +=> saveenv +Saving Environment to MMC... +Writing to redundant MMC(1)... done +=> reboot +Unknown command 'reboot' - try 'help' +=> boot +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 2 ms (80.1 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3552160 bytes read in 110 ms (30.8 MiB/s) +106665 bytes read in 15 ms (6.8 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x3633a0 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0a8 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gd326d64 (hancan@hancan-virtual-machine) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Thu Jun 7 20:42:56 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6619K kernel code, 319K rwdata, 2388K rodata, 340K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d402c (9009 kB) +[ 0.000000] .init : 0xc08d5000 - 0xc092a000 ( 340 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979d60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000329] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000337] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000772] Console: colour dummy device 80x30 +[ 0.000787] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000794] This ensures that you still see kernel messages. Please +[ 0.000799] update your kernel commandline. +[ 0.000813] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000825] pid_max: default: 32768 minimum: 301 +[ 0.000921] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000931] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001474] Initializing cgroup subsys io +[ 0.001490] Initializing cgroup subsys memory +[ 0.001514] Initializing cgroup subsys devices +[ 0.001526] Initializing cgroup subsys freezer +[ 0.001537] Initializing cgroup subsys perf_event +[ 0.001548] Initializing cgroup subsys pids +[ 0.001575] CPU: Testing write buffer coherency: ok +[ 0.001777] /cpus/cpu@0 missing clock-frequency property +[ 0.001792] /cpus/cpu@1 missing clock-frequency property +[ 0.001802] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001834] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080058] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080128] Brought up 2 CPUs +[ 0.080141] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080147] CPU: All CPU(s) started in HYP mode. +[ 0.080152] CPU: Virtualization extensions available. +[ 0.080531] devtmpfs: initialized +[ 0.109242] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110221] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313080] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313100] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.317325] pinctrl core: initialized pinctrl subsystem +[ 0.318175] NET: Registered protocol family 16 +[ 0.319103] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340217] cpuidle: using governor ladder +[ 0.370245] cpuidle: using governor menu +[ 0.378708] OMAP GPIO hardware version 0.1 +[ 0.385082] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401068] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401081] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.410323] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.410334] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410795] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410805] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.411376] OMAP DMA hardware revision 0.0 +[ 0.451372] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452531] edma 43300000.edma: memcpy is disabled +[ 0.457176] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461567] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461744] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.461910] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462064] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462353] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462539] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465540] palmas 0-0058: IRQ missing: skipping irq request +[ 0.480976] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.553288] pcf857x 0-0020: probed +[ 0.553850] pcf857x 0-0021: probed +[ 0.554000] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.554391] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.554596] media: Linux media interface: v0.10 +[ 0.554647] Linux video capture interface: v2.00 +[ 0.554690] pps_core: LinuxPPS API ver. 1 registered +[ 0.554697] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.554721] PTP clock support registered +[ 0.554766] EDAC MC: Ver: 3.0.0 +[ 0.555511] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.555809] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.556139] Advanced Linux Sound Architecture Driver Initialized. +[ 0.556976] clocksource: Switched to clocksource arch_sys_counter +[ 0.567594] NET: Registered protocol family 2 +[ 0.568088] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568151] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.568276] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.568322] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568353] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568562] NET: Registered protocol family 1 +[ 0.568831] RPC: Registered named UNIX socket transport module. +[ 0.568840] RPC: Registered udp transport module. +[ 0.568847] RPC: Registered tcp transport module. +[ 0.568853] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.569851] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579807] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.580457] NFS: Registering the id_resolver key type +[ 0.580484] Key type id_resolver registered +[ 0.580492] Key type id_legacy registered +[ 0.580545] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.581805] bounce: pool size: 64 pages +[ 0.581952] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.581965] io scheduler noop registered +[ 0.581977] io scheduler deadline registered +[ 0.582010] io scheduler cfq registered (default) +[ 0.586905] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.590173] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.590186] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.590219] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.590241] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.620429] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.620605] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.620618] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.620628] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.620638] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.621042] PCI: bus0: Fast back to back transfers disabled +[ 0.621160] PCI: bus1: Fast back to back transfers enabled +[ 0.621242] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.621257] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.621270] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.621489] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.681968] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.685355] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.695337] console [ttyS0] enabled +[ 1.699736] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.709441] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.719491] [drm] Initialized drm 1.1.0 20060810 +[ 1.725499] OMAP DSS rev 6.1 +[ 1.729295] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.745084] loop: module loaded +[ 1.748626] vmemexp device MAJOR num = 246 +[ 1.752755] vmemexp class registered +[ 1.756467] /dev/vmemexp device registered +[ 1.760602] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.766274] nand: No NAND device found +[ 1.770064] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.780008] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.785405] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.791288] Creating 7 MTD partitions on "spi32766.0": +[ 1.796451] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.802569] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.808925] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.815850] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.822557] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.829958] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.836301] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.844100] libphy: Fixed MDIO Bus: probed +[ 1.897007] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.903132] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.913632] libphy: 48485000.mdio: probed +[ 1.917704] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.925746] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.934473] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 +[ 1.941169] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.948182] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 +[ 1.956804] mousedev: PS/2 mouse device common for all mice +[ 1.963036] i2c /dev entries driver +[ 1.971772] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.977389] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.983773] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.990332] evm_3v3_sw: supplied by sysen1 +[ 2.070762] mmc0: MAN_BKOPS_EN bit is not set +[ 2.107563] mmc0: new HS200 MMC card at address 0001 +[ 2.123001] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.138059] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.144243] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.151978] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.160720] aic_dvdd: supplied by evm_3v3_sw +[ 2.166623] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.174329] NET: Registered protocol family 10 +[ 2.179735] sit: IPv6 over IPv4 tunneling driver +[ 2.184944] NET: Registered protocol family 17 +[ 2.189669] Key type dns_resolver registered +[ 2.194071] omap_voltage_late_init: Voltage driver support not added +[ 2.200999] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.207230] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.213938] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.220191] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.228443] Power Management for TI OMAP4+ devices. +[ 2.233519] Registering SWP/SWPB emulation handler +[ 2.240461] dmm 4e000000.dmm: initialized all PAT entries +[ 2.247819] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.254460] [drm] No driver support for vblank timestamp query. +[ 2.260815] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.267669] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.308218] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.327906] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.334795] hctosys: unable to open rtc device (rtc0) +[ 2.348137] evm_1v8: disabling +[ 2.351220] aic_dvdd: disabling +[ 2.354379] vmmcwl_fixed: disabling +[ 2.358073] ldousb: disabling +[ 2.361473] ALSA device list: +[ 2.364452] #0: DRA7xx-EVM +[ 2.367999] Waiting for root device PARTUUID=2ca9f500-02... +[ 2.566831] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.581884] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.598785] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.608384] mmcblk1: p1 p2 +[ 2.700446] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.711919] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.649335] EXT4-fs (mmcblk1p2): recovery complete +[ 3.655107] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.663289] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 3.674130] devtmpfs: mounted +[ 3.677382] Freeing unused kernel memory: 340K +[ 3.681843] This architecture does not have kernel memory protection. +[ 3.807209] systemd[1]: System time before build time, advancing clock. +[ 3.842182] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.857727] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.873367] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.891880] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.921000] systemd[1]: Set hostname to . +[ 3.978497] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.990435] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.997224] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.025881] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.042360] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.120504] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.129985] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.139825] random: systemd: uninitialized urandom read (16 bytes read, 31 bits of entropy available) +[ 4.468095] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.475884] systemd[1]: sockets.target: Found dependency on dbus.socket/start +[ 4.483108] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.490560] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.498293] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.505548] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.512998] systemd[1]: sockets.target: Breaking ordering cycle by deleting job dbus.socket/start +[ 4.521929] systemd[1]: dbus.socket: Job dbus.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping D-Bus System Message Bus Socket +[ 4.557398] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.565184] systemd[1]: sockets.target: Found dependency on rpcbind.socket/start +[ 4.572661] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.580130] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.587867] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.595125] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.602592] systemd[1]: sockets.target: Breaking ordering cycle by deleting job rpcbind.socket/start +[ 4.611803] systemd[1]: rpcbind.socket: Job rpcbind.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping RPCbind Server Activation Socket +[ 4.637317] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 4.645101] systemd[1]: sockets.target: Found dependency on avahi-daemon.socket/start +[ 4.653015] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 4.660481] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 4.668218] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 4.675475] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 4.682942] systemd[1]: sockets.target: Breaking ordering cycle by deleting job avahi-daemon.socket/start +[ 4.692590] systemd[1]: avahi-daemon.socket: Job avahi-daemon.socket/start deleted to break ordering cycle starting with sockets.target/start +[ SKIP ] Ordering cycle found, skipping Avah...S/DNS-SD Stack Activation Socket +[ 4.727345] systemd[1]: dropbear.socket: Found ordering cycle on dropbear.socket/stop +[ 4.735216] systemd[1]: dropbear.socket: Found dependency on sysinit.target/start +[ 4.742781] systemd[1]: dropbear.socket: Found dependency on alignment.service/start +[ 4.750598] systemd[1]: dropbear.socket: Found dependency on basic.target/start +[ 4.758002] systemd[1]: dropbear.socket: Found dependency on sockets.target/start +[ 4.765520] systemd[1]: dropbear.socket: Found dependency on dropbear.socket/stop +[ 4.773075] systemd[1]: dropbear.socket: Breaking ordering cycle by deleting job alignment.service/start +[ 4.782636] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with dropbear.socket/stop +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.820458] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.847295] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.867357] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.887254] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.907263] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.927225] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.947223] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.967324] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.997313] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 5.028394] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 5.077428] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.107907] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 5.187335] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 5.209453] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 5.244658] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 5.269357] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 5.299520] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 5.327844] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 5.387308] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 5.404701] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 5.410440] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 5.438622] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 5.457179] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 5.477182] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 5.497227] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 5.547349] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 5.573372] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.597238] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.617319] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.647409] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Setup Virtual Console. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 6.269836] systemd-journald[117]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ 6.645296] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.671979] remoteproc0: 55020000.ipu is available +[ 6.684290] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.705705] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.740884] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.759524] remoteproc1: 40800000.dsp is available + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. +[ 6.781929] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.795057] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Create Volatile Files and Directories... +[ 6.826685] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.850174] remoteproc2: 41000000.dsp is available +[ 6.865408] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.888574] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. +[ 6.942505] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 6.957989] remoteproc0: registered virtio0 (type 7) +[ 6.982793] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Volatile Files and Directories. +[ 7.068743] remoteproc1: registered virtio1 (type 7) +[ 7.084233] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.158582] remoteproc2: registered virtio2 (type 7) + Starting Update UTMP about System Boot/Shutdown... +[ 7.262284] SCSI subsystem initialized + Starting Network Time Synchronization... +[ 7.339781] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Network Time Synchronization. +[ 7.406262] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Update UTMP about System Boot/Shutdown.[ 7.417726] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 + +[ 7.440443] CAN device driver interface +[ 7.517218] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ 7.590342] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 7.607359] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.628143] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.661923] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 7.776003] scsi host0: ahci +[ 7.779739] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 7.969023] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. + Starting Print notice about GPLv3 packages... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. + Starting Save/Restore Sound Card State... + Starting uim-sysfs.service... + Starting TI MultiCore Tools Daemon... +[ OK ] Started System Logging Service. + Starting Permit User Sessions... + Starting Network Service... +[ OK ] Started Kernel Logging Service. +[ OK ] Started Save/Restore Sound Card State. +[ OK ] Started Permit User Sessions. +[ 8.157037] ata1: SATA link down (SStatus 0 SControl 300) +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ 8.195868] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service. +[ 8.234583] net eth0: initialized cpsw ale version 1.4 +[ 8.263256] net eth0: ALE Table size 1024 +[ 8.293195] NET: Registered protocol family 15 +[ 8.318197] net eth1: phy found : id is : 0x20005c7a +[ 8.371771] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.411130] net eth0: initializing cpsw version 1.15 (0) +[ 8.454059] net eth0: phy found : id is : 0x20005c7a +[ 8.499265] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.594856] Initializing XFRM netlink socket +[ 8.949514] remoteproc0: powering up 55020000.ipu +[ 8.969231] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 3506540 +[ 8.986247] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 9.040504] remoteproc0: remote processor 55020000.ipu is now up +[ 9.058215] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 9.072003] remoteproc1: powering up 40800000.dsp +[ 9.082869] random: nonblocking pool is initialized +[ 9.089121] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 9.098842] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2851415 +[ 9.118291] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 9.124176] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 9.130114] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 9.177883] remoteproc1: remote processor 40800000.dsp is now up +[ 9.192761] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 9.198343] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x3d +[ 9.214629] remoteproc2: powering up 41000000.dsp +[ 9.231706] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2851415 +[ 9.253303] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.259191] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.265153] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ 9.333515] remoteproc2: remote processor 41000000.dsp is now up +[ 9.352288] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 9.357869] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x3d +[ 9.396790] NET: Registered protocol family 41 +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 9.802990] usbcore: registered new interface driver usbfs +[ 9.815713] usbcore: registered new interface driver hub +[ 9.821311] usbcore: registered new device driver usb +[ 9.875783] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 9.882994] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 9.891959] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.898961] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 9.899590] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.899610] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 9.919300] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.928175] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 9.934831] hub 1-0:1.0: USB hub found +[ 9.941470] hub 1-0:1.0: 1 port detected +[ 9.945820] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 9.953060] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 9.962386] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.972707] hub 2-0:1.0: USB hub found +[ 9.976564] hub 2-0:1.0: 1 port detected +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +[ 10.454575] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx +[ 10.462890] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started Print notice about GPLv3 packages. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# [ 19.194447] omap_hwmod: mmu1_dsp1: _wait_target_disable failed +[ 19.208354] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 20.084449] omap_hwmod: mmu1_dsp2: _wait_target_disable failed +[ 20.098354] omap_hwmod: mmu0_dsp2: _wait_target_disable failed + +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# root +-sh: root: command not found +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# ls +FragShader.fsh VipClockInversion.sh cmemk.ko enableIpu2CCSConectivity.sh load_ocl_kos.sh opencl_env.sh ub964Init.sh +FragShader3Dsfm.fsh apps.out debugss_kmodule.ko gdbserverproxy.ko memcache_load.sh ov106x3Config.sh vision_sdk_load.sh +VertShader.vsh bin disableDssInterruptsOnA15.sh hdmiReceiverConfig.sh memcache_unload.sh pvrscope vision_sdk_ov490_pinmux.sh +VertShader3Dsfm.vsh car.pod enableImx290.sh jeep2.bmp models tda2exEnableAVB.sh vision_sdk_unload.sh +root@dra7xx-evm:/opt/vision_sdk# ./load_ocl_kos.sh + +Opened log file: lad.txt + +numProcessors = 5 id = 0 baseId = 0 + +Spawned daemon: /usr/bin/lad_dra7xx + +[ 49.788875] CMEMK module: reference Linux version 4.4.84 +[ 49.794888] allocated heap buffer 0x40400000 of size 0x100000 +[ 49.801212] cmemk initialized +root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh +[ 71.469463] DMA: Module install successful, device major num = 242 +[ 71.475909] DRV: Module install successful +insmod: ERROR: could not insert module ./bin/cmemk.ko: File exists +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found +updated 0x4A002AC4 value is 00930000 +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb65af000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6baf000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6aef000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6b2f000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + 80.228166] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 80.265311] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ HOST] [HOST ] 143.146098 s: SYSTEM: System A15 Init in proress !!! + [HOST] [HOST ] 143.146190 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 143.146190 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 143.147501 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 143.147532 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 143.147593 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 143.147593 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 143.147715 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 143.147745 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 143.147837 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 143.147959 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 143.148081 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 143.148173 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 143.148264 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 143.148478 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 143.148600 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 143.148722 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 143.148844 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 143.148935 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 143.149057 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 143.149149 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 143.149271 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 143.149362 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 143.149454 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 143.149576 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 143.149667 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 143.149789 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 143.149881 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 143.150003 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 143.150094 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 143.150186 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 143.150277 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 143.150369 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 143.150552 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.150704 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.150857 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151040 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151192 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151284 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151436 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151589 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151741 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.151924 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155005 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155127 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155249 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155523 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155645 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155767 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155859 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 143.155950 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 143.156011 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 143.156103 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 143.157201 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 + [HOST] [HOST ] 143.157231 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 143.157689 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 143.157689 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 143.157841 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 143.157902 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [IPU2 ] 72.002958 s: ***** IPU2 Firmware build time 20:58:27 Jun 7 2018 + [HOST] [IPU2 ] 72.003141 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 72.006008 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 72.014975 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 72.015097 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 72.016836 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 72.017781 s: RpmsgInit in progress... + [HOST] [IPU2 ] 72.017842 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 72.018513 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 72.023607 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 72.023699 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 72.023790 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 72.023851 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 72.023912 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 72.024004 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 72.024065 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 72.024217 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 72.024278 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 72.024370 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 72.027176 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.027298 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.027450 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 72.027542 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.027633 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.027694 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.028030 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.028121 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.028213 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 72.028304 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.028396 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.028487 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.028792 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 72.028884 s: VPDMA Firmware Address = 0xa0349a80 + [HOST] [IPU2 ] 72.028975 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 72.029067 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 72.029158 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 72.029219 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 72.082779 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 72.083633 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 72.083877 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 72.083968 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 260728 B (254 KB) + [HOST] [IPU2 ] 72.084121 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 72.084273 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + [HOST] [IPU2 ] 72.084517 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1047168 B (0 MB), Free size = 1047168 B (0 MB) + [HOST] [IPU2 ] 72.084670 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 72.233697 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 72.234368 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 72.243183 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 72.243640 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 72.250594 s: + [HOST] [HOST ] 143.704508 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Vision SDK Usecases + [HOST] [HOST ] ==================== + [HOST] [HOST ] 1: Single Camera Usecases + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + [HOST] [HOST ] 3: Open-Compute Usecases + [HOST] [HOST ] + [HOST] [HOST ] p: CPU Status + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + [HOST] [HOST ] + [HOST] [HOST ] s: System Settings + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 147.803117 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 147.803178 s: + [HOST] [HOST ] 147.803178 s: Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 147.803178 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCompute Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 2: OpenCV Usecases + [HOST] [HOST ] 3: OpenCL Usecases + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +3 + [HOST] [HOST ] 153.651375 s: + [HOST] [HOST ] 153.651375 s: + [HOST] [HOST ] + [HOST] [HOST ] OpenCL Usecases + [HOST] [HOST ] ---------------------------- + [HOST] [HOST ] 1: 1CH VIP capture + OpenCL Copy (A15->DSP) + SGX Copy + DISPLAY + [HOST] [HOST ] + [HOST] [HOST ] x: Exit + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +1 + [HOST] [HOST ] 159.932105 s: + [HOST] [IPU2 ] 159.932257 s: CHAINS: Sensor create in progress + [HOST] [IPU2 ] 159.932776 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 + [HOST] [IPU2 ] 160.026932 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 + [HOST] [IPU2 ] 160.027237 s: CHAINS: Sensor create ... DONE !!! + [HOST] [IPU2 ] 160.042213 s: CAPTURE: Create in progress !!! + [HOST] [IPU2 ] 160.042579 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! + ASSERT (chains_vipSingleCamOpenCLFrameCopySgxDisplay_priv.c|chains_vipSingleCamOpenCLFrameCopySgxDisplay_Create|165) + [HOST] [HOST ] 160.158726 s: IPC_IN_0 : Create in progress !!! + [HOST] [HOST ] 160.159092 s: IPC_IN_0 : Create Done !!! + [HOST] [HOST ] 160.159153 s: ALG: ERROR: No alg create function specified (algId = 6) !!! + [HOST] [IPU2 ] 160.157658 s: CAPTURE: Create Done !!! + [HOST] [IPU2 ] 160.158146 s: IPC_OUT_0 : Create in progress !!! + [HOST] [IPU2 ] 160.158482 s: IPC_OUT_0 : Create Done !!! Is there a problem with my build environment or other reasons? I have been plagued by this problem for a long time. + +Responses: +Hi Xie Baojian, As per step-9, I can see you didn't run these commands make linux and make linux_install Could you please confirm ? Regards Surya + +Hi Surya, Sorry, I forgot to write, i ran make linux and make linux_install. 9. make clean ; make liunx_clean; make linux； make linux_install； make -s -j dpend ; make -s -j opencx; Regards, Xie Baojian + +Is it tda2xx_evm can not support openclframecopy usecase ? + +Hi Xie Baojian, Yes tda2xx-evm supports openclframecopy usecase We are trying to reproduce the issue in our end We will revert back you soon Regards Surya + +Hi Surya, I am very much looking forward to your response. Below I will list my steps in detail in order to give you a better positioning problem. Follow the steps below to build the vision_sdk environment to run the opencl example： 1、 Install A15 Compiler： $> cd $INSTALL_DIR/ti_components/os_tools/linux/linaro $> tar –xvf gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf.tar.xz Install 64-bit packages： $>sudo apt-get install ia32-libs lib32stdc++6 lib32z1-dev lib32z1 lib32ncurses5 lib32bz2-1.0 2、 Clone Linux kernel, cmem,uboot, sgx driver and target file system 2.1. Install software packages：run hlos/scripts/linux/setup-linux-build-env.sh 2.2. Softwore Install: $> bash $> ./PROCESSOR_SDK_VISION_XX_XX_XX_XX_setuplinux.bin export INSTALL_DIR=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00 2.3. Edit gitconfig，create git-proxy.sh. 2.4. run script: ./hlos/scripts/linux/setup_linux.sh. 2.5. Clone kernel. 2.6. Clone cmem. 2.7. Clone u-boot. 2.8. Clone sgx driver. 2.9. Download and untar file system.add permissions for $INSTALL_DIR/ti_components/os_tools/linux/targetfs：chmod 777 ../targetfs. 2.10. Install Opencl supported package. Clone dsptop and Clone gdbc6x. 2.11. untar opencl_fs_patches.tar.gz in $INSTALL_DIR/ti_components/os_tools/linux/targetfs . 3、 Compile and Build 3.1. Select make config in Rules.make:MAKECONFIG=tda2xx_evm_linux_opencx. 3.2. set system path: PATH="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/clocl:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games". KERNEL_INSTALL_DIR="/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel" 3.3. Cd /vision_sdk/build. 3.4. run: rm -rf ../binaries/. 3.5. run: make clean. 3.6. run: make linux_clean. 3.7. run: make linux. 3.8. run: make linux_install. 3.9. run: make –s –j depend. 3.10. run: make –s –j opencx. 3.11. use uenv_sd.txt as boot's uenv.txt. 4、 There is no error in the above steps.cd to the path :/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs and run :cp -Rf * /media/hancan/rootfs. 5、 Insert SD card into board.Log in used root and run :source ./opencl_env.sh. 6、 run :./load_ocl_kos.sh. 7、 run :source ./vision_sdk_load.sh. 8、 run :./apps.out. Regards, Xie Baojian + diff --git a/data2/text/range/30001+/708147.txt b/data2/text/range/30001+/708147.txt new file mode 100644 index 0000000000000000000000000000000000000000..a1daa163d0728b901f8e599bb4ec24c9d522910b --- /dev/null +++ b/data2/text/range/30001+/708147.txt @@ -0,0 +1,13 @@ +Ticket Name: Linux/TDA2: Compilation Error for Linux + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: MATHLIB, SYSBIOS, SYSCONFIG Tool/software: Linux Hi, I am trying to compile the SDK3.4 for tda2xx_evm_linux_all, following the steps mentioned in VisionSDK_Linux_UserGuide.pdf. I am experiencing the following error in PROCESSOR_SDK_VISION_03_04_00_00. Converting binary file [/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/AppImage] to C array ... Done. (1822684 bytes) # Invoking configuro... # Configuro done! # Making tda2xx-evm:ipu2:release:vision_sdk_lib... # Compiling tda2xx-evm:ipu2:release:vision_sdk: src/eve_firmware.c # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # ‘/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h’ -> ‘/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h’ # system: tda2xx-evm: Compiling system_ipc.c # osa: tda2xx-evm: Compiling osa_mem.c # osa: tda2xx-evm: Compiling osa_remote_log_client.c # osa: tda2xx-evm: Compiling osa_remote_log_server.c # system: tda2xx-evm: Creating archive system.a # osa: tda2xx-evm: Creating archive osa.a # apps: tda2xx-evm: Compiling sgxRender3Dsfm.cpp # apps: tda2xx-evm: Creating archive apps.a # apps: tda2xx-evm: Linking /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(sgxRender3Dsfm.o): In function `SgxRender3Dsfm_renderFrame': sgxRender3Dsfm.cpp:(.text+0x704): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x724): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x748): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x74e): undefined reference to `CPVRTPrint3D::Flush()' sgxRender3Dsfm.cpp:(.text+0x796): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x7b4): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x7ba): undefined reference to `CPVRTPrint3D::Flush()' sgxRender3Dsfm.cpp:(.text+0x820): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x83e): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x844): undefined reference to `CPVRTPrint3D::Flush()' sgxRender3Dsfm.cpp:(.text+0x88c): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x8aa): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x8b0): undefined reference to `CPVRTPrint3D::Flush()' sgxRender3Dsfm.cpp:(.text+0x8f4): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x914): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x91c): undefined reference to `CPVRTPrint3D::Flush()' sgxRender3Dsfm.cpp:(.text+0x942): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' sgxRender3Dsfm.cpp:(.text+0x962): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x982): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x9a2): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x9c2): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' sgxRender3Dsfm.cpp:(.text+0x9e6): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(sgxRender3Dsfm.o):sgxRender3Dsfm.cpp:(.text+0xa0a): more undefined references to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' follow /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(sgxRender3Dsfm.o): In function `SgxRender3Dsfm_renderFrame': sgxRender3Dsfm.cpp:(.text+0xa50): undefined reference to `CPVRTPrint3D::Flush()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(sgxRender3Dsfm.o): In function `_GLOBAL__sub_I_sgxRender3Dsfm.cpp': sgxRender3Dsfm.cpp:(.text.startup+0x12): undefined reference to `CPVRTPrint3D::CPVRTPrint3D()' sgxRender3Dsfm.cpp:(.text.startup+0x7c): undefined reference to `CPVRTPrint3D::~CPVRTPrint3D()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(billboard.o): In function `distance_info_draw(SgxRender3DsfmSharedObj*, Point3D_f*, unsigned int, Pose3D_f*, float*)': billboard.cpp:(.text+0x11f0): undefined reference to `CPVRTPrint3D::SetTextures(SPVRTContext const*, unsigned int, unsigned int, bool, bool)' billboard.cpp:(.text+0x16ae): undefined reference to `CPVRTPrint3D::Print3D(float, float, float, unsigned int, char const*, ...)' billboard.cpp:(.text+0x16b8): undefined reference to `CPVRTPrint3D::Flush()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(billboard.o): In function `_GLOBAL__sub_I_billboard.cpp': billboard.cpp:(.text.startup+0xe): undefined reference to `CPVRTPrint3D::CPVRTPrint3D()' billboard.cpp:(.text.startup+0x2c): undefined reference to `CPVRTPrint3D::~CPVRTPrint3D()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car3Dsfm.o): In function `LoadShaders(CPVRTString*)': car3Dsfm.cpp:(.text+0xce): undefined reference to `PVRTShaderLoadFromFile(char const*, char const*, unsigned int, unsigned int, unsigned int*, CPVRTString*, SPVRTContext const*, char const* const*, unsigned int)' car3Dsfm.cpp:(.text+0xf8): undefined reference to `PVRTShaderLoadFromFile(char const*, char const*, unsigned int, unsigned int, unsigned int*, CPVRTString*, SPVRTContext const*, char const* const*, unsigned int)' car3Dsfm.cpp:(.text+0x124): undefined reference to `PVRTCreateProgram(unsigned int*, unsigned int, unsigned int, char const**, int, CPVRTString*)' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car3Dsfm.o): In function `LoadVbos(CPVRTString*)': car3Dsfm.cpp:(.text+0x244): undefined reference to `PVRTModelPODCountIndices(SPODMesh const&)' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car3Dsfm.o): In function `car_draw_vbo(SgxRender3DsfmSharedObj*)': car3Dsfm.cpp:(.text+0x4a0): undefined reference to `CPVRTModelPOD::SetFrame(float)' car3Dsfm.cpp:(.text+0x4a8): undefined reference to `CPVRTModelPOD::GetLightDirection(unsigned int) const' car3Dsfm.cpp:(.text+0x4fe): undefined reference to `CPVRTModelPOD::GetWorldMatrix(SPODNode const&) const' car3Dsfm.cpp:(.text+0xaa8): undefined reference to `PVRTMat4::inverse() const' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car3Dsfm.o): In function `car_init_vertices_vbo(SgxRender3DsfmSharedObj*)': car3Dsfm.cpp:(.text+0xbe4): undefined reference to `CPVRTString::CPVRTString()' car3Dsfm.cpp:(.text+0xbfa): undefined reference to `CPVRTModelPOD::ReadFromFile(char const*, char*, unsigned int, char*, unsigned int)' car3Dsfm.cpp:(.text+0xc0a): undefined reference to `CPVRTString::~CPVRTString()' car3Dsfm.cpp:(.text+0xc5e): undefined reference to `CPVRTString::~CPVRTString()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car3Dsfm.o): In function `_GLOBAL__sub_I_car3Dsfm.cpp': car3Dsfm.cpp:(.text.startup+0xa): undefined reference to `CPVRTModelPOD::CPVRTModelPOD()' car3Dsfm.cpp:(.text.startup+0x2c): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car.o): In function `LoadVbos(_car_data*)': car.cpp:(.text+0x236): undefined reference to `PVRTModelPODCountIndices(SPODMesh const&)' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car.o): In function `InitView()': car.cpp:(.text+0x310): undefined reference to `CPVRTModelPOD::CPVRTModelPOD()' car.cpp:(.text+0x31c): undefined reference to `CPVRTModelPOD::CPVRTModelPOD()' car.cpp:(.text+0x352): undefined reference to `CPVRTModelPOD::ReadFromFile(char const*, char*, unsigned int, char*, unsigned int)' car.cpp:(.text+0x370): undefined reference to `PVRTModelPODToggleInterleaved(SPODMesh&, unsigned int)' car.cpp:(.text+0x384): undefined reference to `PVRTModelPODFlattenToWorldSpace(CPVRTModelPOD&, CPVRTModelPOD&)' car.cpp:(.text+0x3b2): undefined reference to `PVRTModelPODToggleInterleaved(SPODMesh&, unsigned int)' car.cpp:(.text+0x3e6): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' car.cpp:(.text+0x410): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' car.cpp:(.text+0x490): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' car.cpp:(.text+0x4be): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' car.cpp:(.text+0x506): undefined reference to `CPVRTModelPOD::~CPVRTModelPOD()' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release/apps.a(car.o):car.cpp:(.text+0x53a): more undefined references to `CPVRTModelPOD::~CPVRTModelPOD()' follow collect2: error: ld returned 1 exit status make[6]: *** [exe] Error 1 make[5]: *** [demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 I had observed this similar error with sdk3.3 version too. I tried on with SDK3.1 which we could compile successfully. Kindly help me to resolve this. + +Responses: +Hi Blessy, Few clarifications needed 1. Did you download the new file system ie. part of 3.4 release or still using the old file system ? 2. What all build commands you run ? Regards Surya + +Hi Surya, 1. I had downloaded and used the file system that was part of SDK3.4 release. 2. Build commands - make linux, make linux_install was done. Make clean and removal of binaries were done before make -s -j depend. This error was seen during make -s -j. + +Hi Blessy, Could you please run make command without -s & -j command & share the logs Regards Surya + +Hi Surya, make apps make[1]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make links_fw_libs make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos libs make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos linkfw_libs make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_algorithm.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_algorithm.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_algorithm.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_algorithm.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_algorithm.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_algorithm.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_algorithm.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_algorithm.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_algorithm.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_algorithm.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_algorithm.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_algorithm.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_algorithm.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_algorithm.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/algorithm' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_rx CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_rx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_avb_rx.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_rx' make[6]: Nothing to be done for `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_avb_rx.aem4'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_rx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_rx' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_tx CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_avb_tx.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_tx' make[6]: Nothing to be done for `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_avb_tx.aem4'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/avb_tx' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_dup.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_dup.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_dup.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_dup.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_dup.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_dup.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_dup.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_dup.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_dup.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_dup.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_dup.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_dup.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_dup.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_dup.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/dup' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_gate.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_gate.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_gate.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_gate.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_gate.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_gate.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_gate.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_gate.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_gate.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_gate.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_gate.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_gate.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_gate.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_gate.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/gate' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcIn.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcIn.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcIn.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcIn.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcIn.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcIn.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcIn.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcIn.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcIn.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcIn.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcIn.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcIn.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcIn.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcIn.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcIn' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcOut.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcOut.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcOut.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcOut.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcOut.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcOut.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcOut.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcOut.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcOut.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcOut.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcOut.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcOut.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcOut.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcOut.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/ipcOut' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_merge.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_merge.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_merge.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_merge.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_merge.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_merge.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_merge.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_merge.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_merge.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_merge.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_merge.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_merge.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_merge.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_merge.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/merge' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_null.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_null.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_null.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_null.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_null.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_null.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_null.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_null.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_null.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_null.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_null.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_null.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_null.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_null.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/null' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_tx.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_tx.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_network_tx.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_network_tx.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_network_tx.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_network_tx.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_network_tx.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_network_tx.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_network_tx.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_network_tx.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_network_tx.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_network_tx.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_network_tx.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_network_tx.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_tx' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_rx CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_rx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_rx.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_rx' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_rx.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_rx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/network_rx' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/nullSrc CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/nullSrc' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_nullSrc.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/nullSrc' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_nullSrc.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/nullSrc' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/nullSrc' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_select.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_select.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_select.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_select.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_select.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_select.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_select.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_select.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_select.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_select.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_select.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_select.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_select.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_select.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/select' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_sync.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_sync.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_sync.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_sync.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_sync.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_sync.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_sync.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_sync.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_sync.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_sync.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_sync.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_sync.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_sync.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_sync.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/sync' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/tfdtp_rx CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/tfdtp_rx' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_tfdtp_rx.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/tfdtp_rx' make[6]: Nothing to be done for `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_tfdtp_rx.aem4'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/tfdtp_rx' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/tfdtp_rx' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display_ctrl CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display_ctrl' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display_ctrl.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display_ctrl' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display_ctrl.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display_ctrl' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/display_ctrl' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/iva CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/iva' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_iva.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/iva' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_iva.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/iva' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/iva' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vip_capture CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vip_capture' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vip_capture.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vip_capture' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vip_capture.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vip_capture' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vip_capture' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vpe CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vpe' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vpe.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vpe' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vpe.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vpe' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/vpe' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/dss_m2mwb CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/dss_m2mwb' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_dssM2mWb.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/dss_m2mwb' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_dssM2mWb.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/dss_m2mwb' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/dss_m2mwb' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/utils_common.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/utils_common.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/utils_common.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/utils_common.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/utils_common.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/utils_common.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/utils_common.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/utils_common.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/utils_common.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/utils_common.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/utils_common.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/utils_common.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=ipu2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=c66xdsp_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_system.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_system.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_system.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_system.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_system.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_system.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_common/system' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system CORE=c66xdsp_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system CORE=c66xdsp_2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_dsp_system.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_dsp_system.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_dsp_system.ae66 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_dsp_system.ae66' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_dsp/system' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system CORE=arp32_1 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system CORE=arp32_2 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system CORE=arp32_3 ; make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system CORE=arp32_4 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_eve_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_eve_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_eve_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_eve_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_eve_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_eve_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_eve_system.aearp32F make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_eve_system.aearp32F' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_eve/system' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/system CORE=ipu2 ; make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/system' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_system.aem4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/system' make[6]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_system.aem4' is up to date. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/system' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/links_ipu/system' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[3]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make app_alg_plugins make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make CORE=ipu2 make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[5]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4' is up to date. make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make CORE=c66xdsp_1 make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule. /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule. make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/app_alg_plugins.ae66 make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule. /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule. make[5]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/app_alg_plugins.ae66' is up to date. make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make CORE=arp32_1 make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[5]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F' is up to date. make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[3]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins' make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make apps_libs make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps CORE=ipu2 make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/app_libs.aem4 make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[5]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/app_libs.aem4' is up to date. make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[3]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make video_sensor_libs make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps video_sensor_libs make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/video_sensor CORE=ipu2 make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/video_sensor' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/video_sensor_libs.aem4 make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/video_sensor' make[5]: `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/video_sensor_libs.aem4' is up to date. make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/video_sensor' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/video_sensor' make[3]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make apps_exe APP_PATH=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps apps make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make -fMAKEFILE.MK -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos apps make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -fMAKEFILE.MK apps_parallel make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1 xdc_configuro CORE=arp32_1 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_1.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_1.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_eve1_pearp32F.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1 CORE=arp32_1 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' # Making tda2xx-evm:arp32_1:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F... # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/bin/lnk-arp32 --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=off --rom_model -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/main_common_eve1.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/tlb_config_eve1.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/tlb_config_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/main_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/main_eve1.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/app_init_eve.oearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_1/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_rm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_drv.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/arp32/release/firewall_l3l4.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/arp32/release/vps_osal_tirtos.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/lib/rtsarp32_v203.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/edgedetection/lib/edgedetection_release.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.00/algframework/lib/eve/release/algframework.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevekernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevenatckernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/apps_nonbam/lib/release/libeveapps.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/ti_pd_feature_plane_computation/algo/lib/release/libeveFeaturePlaneComputation.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/clahe/algo/lib/release/libeveClahe.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/soft_isp/algo/lib/release/libeveSoftISP.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/census/algo/lib/release/libeveCensus.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/disparity/algo/lib/release/libeveDisparity.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/remap_merge/algo/lib/release/libeveRemapMerge.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/imagePyramid_u8/algo/lib/release/libeveImagePyramid_u8.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/harrisCornerDetection32/algo/lib/release/libeveHarrisCornerDetection32.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fft/algo/lib/release/libeveFFT.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/peak_detection/algo/lib/release/libevePeakDetection.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/beam_forming/algo/lib/release/libeveBeamForming.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/pyramid_lk_tracker/algo/lib/release/libevePyramidLKTracker.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_best_feature_to_front/algo/lib/release/libeveFAST9BestFeatureToFront.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_corner_detect/algo/lib/release/libeveFast9CornerDetect.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_padding/algo/lib/release/libeveYUVPAdding.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/starterware/libs/vayu/eve/release/libevestarterware_eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/algorithms/pyramid_lk_sof/algo/lib/release/libevesof.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/filter_2d/algo/lib/release/libeveFilter2D.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_scalar/algo/lib/release/libeveYUVScalar.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/bin_image_to_list/algo/lib/release/libeveBinImageToList.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/denseopticalflow/lib/libeveapps_opticalflow.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/eve/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_algorithm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_dup.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_gate.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcIn.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_ipcOut.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_merge.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_null.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_network_tx.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_select.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_sync.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/utils_common.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_common_system.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_1/release/links_eve_system.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_hal.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_lib.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/arp32/release/ti.csl.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/link_eve.cmd /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 7: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 8: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 13: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 14: warning: no matching section # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F created. # mono /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/out2rprc.exe /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc Parsing the input object file, /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F. File conversion complete! make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2 xdc_configuro CORE=arp32_2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_2.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_2.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_eve2_pearp32F.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2 CORE=arp32_2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' # Making tda2xx-evm:arp32_2:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F... # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/bin/lnk-arp32 --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=off --rom_model -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/main_common_eve2.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/tlb_config_eve2.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/tlb_config_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/main_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/main_eve2.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/app_init_eve.oearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_2/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_rm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_drv.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/arp32/release/firewall_l3l4.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/arp32/release/vps_osal_tirtos.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/lib/rtsarp32_v203.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/edgedetection/lib/edgedetection_release.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.00/algframework/lib/eve/release/algframework.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevekernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevenatckernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/apps_nonbam/lib/release/libeveapps.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/ti_pd_feature_plane_computation/algo/lib/release/libeveFeaturePlaneComputation.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/clahe/algo/lib/release/libeveClahe.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/soft_isp/algo/lib/release/libeveSoftISP.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/census/algo/lib/release/libeveCensus.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/disparity/algo/lib/release/libeveDisparity.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/remap_merge/algo/lib/release/libeveRemapMerge.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/imagePyramid_u8/algo/lib/release/libeveImagePyramid_u8.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/harrisCornerDetection32/algo/lib/release/libeveHarrisCornerDetection32.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fft/algo/lib/release/libeveFFT.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/peak_detection/algo/lib/release/libevePeakDetection.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/beam_forming/algo/lib/release/libeveBeamForming.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/pyramid_lk_tracker/algo/lib/release/libevePyramidLKTracker.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_best_feature_to_front/algo/lib/release/libeveFAST9BestFeatureToFront.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_corner_detect/algo/lib/release/libeveFast9CornerDetect.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_padding/algo/lib/release/libeveYUVPAdding.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/starterware/libs/vayu/eve/release/libevestarterware_eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/algorithms/pyramid_lk_sof/algo/lib/release/libevesof.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/filter_2d/algo/lib/release/libeveFilter2D.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_scalar/algo/lib/release/libeveYUVScalar.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/bin_image_to_list/algo/lib/release/libeveBinImageToList.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/denseopticalflow/lib/libeveapps_opticalflow.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/eve/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_algorithm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_dup.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_gate.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcIn.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_ipcOut.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_merge.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_null.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_network_tx.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_select.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_sync.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/utils_common.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_common_system.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_2/release/links_eve_system.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_hal.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_lib.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/arp32/release/ti.csl.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/link_eve.cmd /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2/linker_cmd_eve2_release.cmd "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2/linker_cmd_eve2_release.cmd", line 7: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2/linker_cmd_eve2_release.cmd", line 8: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2/linker_cmd_eve2_release.cmd", line 13: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2/linker_cmd_eve2_release.cmd", line 14: warning: no matching section # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F created. # mono /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/out2rprc.exe /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc Parsing the input object file, /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F. File conversion complete! make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve2' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3 xdc_configuro CORE=arp32_3 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_3.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_3.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/vision_sdk_configuro/package/cfg/MAIN_APP_eve3_pearp32F.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3 CORE=arp32_3 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' # Making tda2xx-evm:arp32_3:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F... # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/bin/lnk-arp32 --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=off --rom_model -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/main_common_eve3.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/tlb_config_eve3.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/tlb_config_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/main_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/main_eve3.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/app_init_eve.oearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_3/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_rm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_drv.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/arp32/release/firewall_l3l4.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/arp32/release/vps_osal_tirtos.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/lib/rtsarp32_v203.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/edgedetection/lib/edgedetection_release.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.00/algframework/lib/eve/release/algframework.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevekernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevenatckernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/apps_nonbam/lib/release/libeveapps.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/ti_pd_feature_plane_computation/algo/lib/release/libeveFeaturePlaneComputation.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/clahe/algo/lib/release/libeveClahe.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/soft_isp/algo/lib/release/libeveSoftISP.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/census/algo/lib/release/libeveCensus.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/disparity/algo/lib/release/libeveDisparity.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/remap_merge/algo/lib/release/libeveRemapMerge.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/imagePyramid_u8/algo/lib/release/libeveImagePyramid_u8.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/harrisCornerDetection32/algo/lib/release/libeveHarrisCornerDetection32.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fft/algo/lib/release/libeveFFT.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/peak_detection/algo/lib/release/libevePeakDetection.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/beam_forming/algo/lib/release/libeveBeamForming.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/pyramid_lk_tracker/algo/lib/release/libevePyramidLKTracker.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_best_feature_to_front/algo/lib/release/libeveFAST9BestFeatureToFront.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_corner_detect/algo/lib/release/libeveFast9CornerDetect.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_padding/algo/lib/release/libeveYUVPAdding.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/starterware/libs/vayu/eve/release/libevestarterware_eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/algorithms/pyramid_lk_sof/algo/lib/release/libevesof.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/filter_2d/algo/lib/release/libeveFilter2D.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_scalar/algo/lib/release/libeveYUVScalar.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/bin_image_to_list/algo/lib/release/libeveBinImageToList.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/denseopticalflow/lib/libeveapps_opticalflow.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/eve/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_algorithm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_dup.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_gate.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcIn.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_ipcOut.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_merge.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_null.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_network_tx.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_select.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_sync.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/utils_common.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_common_system.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_3/release/links_eve_system.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_hal.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_lib.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/arp32/release/ti.csl.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/link_eve.cmd /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3/linker_cmd_eve3_release.cmd "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3/linker_cmd_eve3_release.cmd", line 7: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3/linker_cmd_eve3_release.cmd", line 8: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3/linker_cmd_eve3_release.cmd", line 13: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3/linker_cmd_eve3_release.cmd", line 14: warning: no matching section # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F created. # mono /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/out2rprc.exe /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc Parsing the input object file, /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F. File conversion complete! make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve3' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4 xdc_configuro CORE=arp32_4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_4.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_arp32_4.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/vision_sdk_configuro/package/cfg/MAIN_APP_eve4_pearp32F.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4 CORE=arp32_4 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' # Making tda2xx-evm:arp32_4:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F... # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/bin/lnk-arp32 --warn_sections -q -e=_c_int00 --silicon_version=arp32 -c -x --zero_init=off --rom_model -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/main_common_eve4.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/tlb_config_eve4.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/tlb_config_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/main_eve_common.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/main_eve4.oearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/app_init_eve.oearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/arp32_4/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_rm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/edma3lld_drv.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/arp32/release/firewall_l3l4.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/arp32/release/vps_osal_tirtos.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/arp32_1.0.7/lib/rtsarp32_v203.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32/release/app_alg_plugins.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/edgedetection/lib/edgedetection_release.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.00/algframework/lib/eve/release/algframework.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevekernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/kernels/lib/release/libevenatckernels.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/apps_nonbam/lib/release/libeveapps.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/ti_pd_feature_plane_computation/algo/lib/release/libeveFeaturePlaneComputation.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/clahe/algo/lib/release/libeveClahe.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/soft_isp/algo/lib/release/libeveSoftISP.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/census/algo/lib/release/libeveCensus.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/disparity/algo/lib/release/libeveDisparity.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/remap_merge/algo/lib/release/libeveRemapMerge.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/imagePyramid_u8/algo/lib/release/libeveImagePyramid_u8.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/harrisCornerDetection32/algo/lib/release/libeveHarrisCornerDetection32.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fft/algo/lib/release/libeveFFT.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/peak_detection/algo/lib/release/libevePeakDetection.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/beam_forming/algo/lib/release/libeveBeamForming.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/pyramid_lk_tracker/algo/lib/release/libevePyramidLKTracker.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_best_feature_to_front/algo/lib/release/libeveFAST9BestFeatureToFront.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/fast9_corner_detect/algo/lib/release/libeveFast9CornerDetect.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_padding/algo/lib/release/libeveYUVPAdding.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/starterware/libs/vayu/eve/release/libevestarterware_eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/algorithms/pyramid_lk_sof/algo/lib/release/libevesof.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/filter_2d/algo/lib/release/libeveFilter2D.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/yuv_scalar/algo/lib/release/libeveYUVScalar.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/bin_image_to_list/algo/lib/release/libeveBinImageToList.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/denseopticalflow/lib/libeveapps_opticalflow.eve.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/eve/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_algorithm.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_dup.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_gate.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcIn.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_ipcOut.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_merge.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_null.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_network_tx.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_select.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_sync.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/utils_common.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_common_system.aearp32F -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/arp32_4/release/links_eve_system.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_hal.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/arp32/release/pm_lib.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/arp32/release/ti.csl.aearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/link_eve.cmd /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4/linker_cmd_eve4_release.cmd "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4/linker_cmd_eve4_release.cmd", line 7: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4/linker_cmd_eve4_release.cmd", line 8: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4/linker_cmd_eve4_release.cmd", line 13: warning: no matching section "/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4/linker_cmd_eve4_release.cmd", line 14: warning: no matching section # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F created. # mono /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/out2rprc.exe /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc Parsing the input object file, /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F. File conversion complete! make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve4' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1 xdc_configuro CORE=c66xdsp_1 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_c66xdsp_1.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_c66xdsp_1.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1 CORE=c66xdsp_1 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' # Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/C6000_7.4.2/bin/lnk6x --priority --reread_libs --warn_sections -q -e=_c_int00 --silicon_version=6600 --rom_model --zero_init=off --dynamic -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/main_common_c6xdsp1.oe66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/main_c6xdsp1.oe66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/app_init_dsp.oe66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/app_alg_plugins.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib_c66x_1_1_1_0/packages/ti/vxlib/lib/vxlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib_c66x_1_1_1_0/packages/ti/vxlib/lib/vxlib_bamplugin.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/rear_view_panorama/lib/rear_view_panorama_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/stereo_app/lib/stereo_app_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/dsplib_c66x_3_4_0_0/packages/ti/dsplib/lib/dsplib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/mmwave_sdk_01_02_00_05/packages/ti/alg/mmwavelib/lib/libmmwavealg_xwr16xx.ae674 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/mathlib_c66x_3_1_0_0/packages/ti/mathlib/lib/mathlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/commonutils/lib/commonutils_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/structurefrommotion/lib/structurefrommotion_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/surroundview/lib/surroundview_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/autocalibration/lib/autocalibration_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/autoremap/lib/autoremap_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/vlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/vlib_cn.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/common.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.LD.C66X.00.03.00.00/200.V.LD.C66X.00.03/modules/ti_lane_detection/lib/dsp/release/lane_detection_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_ground_plane_estimation/lib/dsp/release/ti_gpe_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_sfm/lib/dsp/release/ti_sfm_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.CLR.C66X.00.02.00.00/200.V.CLR.C66X.00.02/modules/ti_circular_light_recognition/lib/dsp/release/ti_circular_light_recognition_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_forward_collision_warning/lib/dsp/release/ti_fcw_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.OD.C66X.00.06.02.00/200.V.OD.C66X.00.06/modules/ti_object_detection/lib/dsp/release/ti_object_detection.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.OC.C66X.00.02.00.00/200.V.OC.C66X.00.02/modules/ti_object_classification/lib/dsp/release/ti_object_classification.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/dsp/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.ST.C66X.00.03.00.00/200.V.ST.C66X.00.03.00.00/modules/ti_stereovision/lib/dsp/release/stereovision_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SOD.C66X.00.02.00.00/200.V.SOD.C66X.02.00/modules/ti_scene_obstruction_detect/lib/dsp/release/sceneObstructionDetect_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/dsp/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/C6000_7.4.2/lib/libc.a -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_rm.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/c66/release/vps_osal_tirtos.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/c66/release/ti.csl.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/c66/release/firewall_l3l4.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/stw_lld/platform/lib/tda2xx/c66/release/stw_platform.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_algorithm.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_dup.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_gate.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcIn.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_ipcOut.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_merge.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_null.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_network_tx.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_select.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_sync.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_common_system.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_1/release/links_dsp_system.ae66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/c66/release/pm_hal.ae66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/c66/release/pm_lib.ae66 # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 created. # make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp1' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2 xdc_configuro CORE=c66xdsp_2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_c66xdsp_2.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_c66xdsp_2.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2 CORE=c66xdsp_2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' # Making tda2xx-evm:c66xdsp_2:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66... /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/C6000_7.4.2/bin/lnk6x --priority --reread_libs --warn_sections -q -e=_c_int00 --silicon_version=6600 --rom_model --zero_init=off --dynamic -o2 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/main_common_c6xdsp2.oe66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/main_c6xdsp2.oe66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/app_init_dsp.oe66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/app_alg_plugins.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib_c66x_1_1_1_0/packages/ti/vxlib/lib/vxlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vxlib_c66x_1_1_1_0/packages/ti/vxlib/lib/vxlib_bamplugin.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/rear_view_panorama/lib/rear_view_panorama_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/stereo_app/lib/stereo_app_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/dsplib_c66x_3_4_0_0/packages/ti/dsplib/lib/dsplib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/mmwave_sdk_01_02_00_05/packages/ti/alg/mmwavelib/lib/libmmwavealg_xwr16xx.ae674 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/mathlib_c66x_3_1_0_0/packages/ti/mathlib/lib/mathlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/commonutils/lib/commonutils_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/structurefrommotion/lib/structurefrommotion_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/surroundview/lib/surroundview_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/autocalibration/lib/autocalibration_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/alg_plugins/autoremap/lib/autoremap_c66xdsp_release.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/vlib.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/vlib_cn.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/lib/common.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.LD.C66X.00.03.00.00/200.V.LD.C66X.00.03/modules/ti_lane_detection/lib/dsp/release/lane_detection_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_ground_plane_estimation/lib/dsp/release/ti_gpe_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_sfm/lib/dsp/release/ti_sfm_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.CLR.C66X.00.02.00.00/200.V.CLR.C66X.00.02/modules/ti_circular_light_recognition/lib/dsp/release/ti_circular_light_recognition_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SFM.C66X.00.02.00.00/200.V.SFM.C66X.00.02/modules/ti_forward_collision_warning/lib/dsp/release/ti_fcw_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.OD.C66X.00.06.02.00/200.V.OD.C66X.00.06/modules/ti_object_detection/lib/dsp/release/ti_object_detection.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.OC.C66X.00.02.00.00/200.V.OC.C66X.00.02/modules/ti_object_classification/lib/dsp/release/ti_object_classification.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/dsp/release/dmautils.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.ST.C66X.00.03.00.00/200.V.ST.C66X.00.03.00.00/modules/ti_stereovision/lib/dsp/release/stereovision_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.200.V.SOD.C66X.00.02.00.00/200.V.SOD.C66X.02.00/modules/ti_scene_obstruction_detect/lib/dsp/release/sceneObstructionDetect_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/lib/dsp/release/tidl_algo.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/C6000_7.4.2/lib/libc.a -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_rm.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/c66/release/vps_osal_tirtos.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/c66/release/ti.csl.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/c66/release/firewall_l3l4.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/stw_lld/platform/lib/tda2xx/c66/release/stw_platform.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_algorithm.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_dup.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_gate.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcIn.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_ipcOut.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_merge.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_null.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_network_tx.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_select.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_sync.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/utils_common.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_common_system.ae66 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/c66xdsp_2/release/links_dsp_system.ae66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/c66/release/pm_hal.ae66 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/c66/release/pm_lib.ae66 # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 created. # make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/dsp2' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -fMAKEFILE.MK apps_ipu1_eveloader make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -f /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules/build_ipu_eve_loader_firmware_gen.mk make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/MulticoreImageGen64.out LE 55 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/AppImage 10 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F.rprc 11 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F.rprc 12 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F.rprc 13 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F.rprc /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/tools/bin2c64.out /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/AppImage > /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader/utils_eve_firmware.h Converting binary file [/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/AppImage] to C array ... Done. (1822684 bytes) make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make -fMAKEFILE.MK apps_ipu1_0 apps_ipu2 make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[5]: Nothing to be done for `apps_ipu1_0'. make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2 xdc_configuro CORE=ipu2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' # Invoking configuro... mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all /bin/chmod a+x /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_ipu2.bat /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/maketemp_configuro_cmd_ipu2.bat /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.xdl /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/linker_mod.cmd # Configuro done! make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2 CORE=ipu2 make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' make vision_sdk_lib make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' # Making tda2xx-evm:ipu2:release:vision_sdk_lib... make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' make /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 make[7]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' # Compiling tda2xx-evm:ipu2:release:vision_sdk: src/eve_firmware.c /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armcl -ppd=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/.deps/eve_firmware.P -c -qq -pdsw225 --endian=little -mv7M4 --float_support=vfplib --abi=eabi -eo.oem4 -ea.sem4 --symdebug:dwarf --embed_inline_assembly -DBIOS_BUILD -DSYSBIOS --common=off --emit_warnings_as_errors -DA15_TARGET_OS_LINUX -DDDR_MEM_1024M -DBSP_DISABLE_I2C0 -DBSP_DISABLE_I2C2 -DBSP_DISABLE_I2C5 -DIPU1_LOAD_EVES -DDDR_MEM_1024M -DCPU_IDLE_ENABLED -g -ms -D___DSPBIOS___ -D___DUCATI_FW___ -Dxdc_target_name__=M4 -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_6_1 -ms -oe -O3 -op0 -os --optimize_with_debug --inline_recursion_limit=20 -Dxdc_cfg__header__=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.h -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DRELEASE_BUILD -DBUILD_M4 -DBUILD_M4_2 -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -D_LOCAL_vision_sdk_lib_ -D_BUILD_vision_sdk_lib_ -D_LOCAL_CORE_ipu2_ -D_REMOTE_vision_sdk_lib_ -D_BUILD_vision_sdk_lib_ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/include -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/framework_components_3_40_02_07/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/xdais_7_24_00_04/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvdec_01_00_13_01_production/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvenc_01_00_16_01_production/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/codecs/ipumm -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/codec_engine_3_24_00_08/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/ndk_2_24_02_31/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -I/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/common -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/inc -fr=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release -fs=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release -fc src/eve_firmware.c /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armcl -c -qq -pdsw225 --endian=little -mv7M4 --float_support=vfplib --abi=eabi -eo.oem4 -ea.sem4 --symdebug:dwarf --embed_inline_assembly -DBIOS_BUILD -DSYSBIOS --common=off --emit_warnings_as_errors -DA15_TARGET_OS_LINUX -DDDR_MEM_1024M -DBSP_DISABLE_I2C0 -DBSP_DISABLE_I2C2 -DBSP_DISABLE_I2C5 -DIPU1_LOAD_EVES -DDDR_MEM_1024M -DCPU_IDLE_ENABLED -g -ms -D___DSPBIOS___ -D___DUCATI_FW___ -Dxdc_target_name__=M4 -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_6_1 -ms -oe -O3 -op0 -os --optimize_with_debug --inline_recursion_limit=20 -Dxdc_cfg__header__=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu2_pem4.h -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DRELEASE_BUILD -DBUILD_M4 -DBUILD_M4_2 -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -D_LOCAL_vision_sdk_lib_ -D_BUILD_vision_sdk_lib_ -D_LOCAL_CORE_ipu2_ -D_REMOTE_vision_sdk_lib_ -D_BUILD_vision_sdk_lib_ -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DPLATFORM_EVM_SI -DVPS_VIP_BUILD -DVPS_VPE_BUILD -DVPS_DSS_BUILD -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/include -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/utils_common/src/eveloader -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/bios_6_46_04_53/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/framework_components_3_40_02_07/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/xdais_7_24_00_04/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvdec_01_00_13_01_production/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvenc_01_00_16_01_production/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/codecs/ipumm -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/codec_engine_3_24_00_08/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/ndk_2_24_02_31/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/networking/nsp_gmacsw_4_15_00_00/packages -I/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/eve_sw_01_19_00_00/common -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/algorithms/REL.TIDL.01.01.01.00/modules/ti_dl/inc -fr=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release -fs=/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release -fc src/eve_firmware.c # Linking into /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # /bin/cp /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/MAIN_APP_ipu2_pem4.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/package/cfg /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armlnk -w -q -u _c_int00 --silicon_version=7M4 -c --diag_suppress=16032 --strict_compatibility=on -x --zero_init=on --dynamic --retain=_Ipc_ResetVector --retain=.resource_table --cinit_compression=off /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/main_common_ipu2.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/eve_firmware.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/ipu_primary.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/main_ipu2.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/app_init_ipu_primary.oem4 /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/linker_mod.cmd -o /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 -m /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4.map -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/app_libs.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/video_sensor_libs.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/radar/mmwave_dfp_01_01_00_00/ti/control/mmwavelink/lib/mmwavelink_m4.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/bsp_lld/i2c/lib/tda2xx/m4/release/bsp_i2c.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/bsp_lld/uart/lib/tda2xx/m4/release/bsp_uart.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/bsp_lld/mcspi/lib/tda2xx/m4/release/bsp_mcspi.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx-evm/m4/release/vps_boards.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_common.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_devices.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/fvid2.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_osal_tirtos.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_platforms.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vpslib.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx-evm/m4/release/vps_examples_utility.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/stw_lld/i2clld/lib/tda2xx/m4/release/i2c_lld.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/boot/sbl_auto/qspiflash/lib/tda2xx/m4/release/qspiflash_lib.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/csl/lib/tda2xx/m4/release/ti.csl.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/vps/lib/tda2xx/m4/release/vpsdrv.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/stw_lld/platform/lib/tda2xx/m4/release/stw_platform.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/m4/release/pm_hal.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/pm/lib/tda2xx/m4/release/pm_lib.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/boot/sbl_auto/lib/tda2xx-evm/m4/release/sbl_lib.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/stw_lld/fatlib/lib/tda2xx/m4/release/stw_fatlib.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/pdk_01_10_00_08/packages/ti/drv/fw_l3l4/lib/tda2xx/m4/release/firewall_l3l4.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvdec_01_00_13_01_production/packages/ti/sdo/codecs/jpegvdec/lib/jpegvdec_ti_host.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_jpegvenc_01_00_16_01_production/packages/ti/sdo/codecs/jpegvenc/lib/jpegenc_ti_host.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_h264enc_02_00_09_01_production/packages/ti/sdo/codecs/h264enc/lib/h264enc_ti_host.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_h264vdec_02_00_17_01_production/packages/ti/sdo/codecs/h264vdec/lib/h264vdec_ti.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/codecs/ivahd_hdvicp20api_01_00_00_23_production/packages/ti/sdo/codecs/hdvicp20api/lib/ivahd_ti_api_vM3.lib -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/m4/release/edma3lld_rm.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/m4/release/edma3lld_drv.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/lib/libc.a -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_algorithm.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_dup.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_gate.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcIn.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_ipcOut.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_merge.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_null.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_tx.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_network_rx.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_nullSrc.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_select.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_sync.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_display_ctrl.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_iva.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vip_capture.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_vpe.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_dssM2mWb.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/utils_common.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_common_system.aem4 -l/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/ipu2/release/links_ipu_system.aem4 # # /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # make[7]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/ipu2' make[5]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[4]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' make[3]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -C ./hlos/makerules/linux -f build_kernel.mk header_install make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' cp -fRv /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include ‘/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h’ -> ‘/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h’ make[2]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/hlos/makerules/linux' make apps_hlos make[2]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make links_fw_libs_hlos make[3]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' make -fMAKEFILE.MK -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos libs make[4]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos linkfw_libs make[5]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_algorithm/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/drivers/edma3_lld_02_12_00_20/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/linux-kernel-addon/memcache/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/linux-kernel-addon/memcache/include/osa -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/sample_app algorithmLink_algPluginSupport.c algorithmLink_cfg.c algorithmLink_tsk.c algorithmLink_tsk_create_single_mbx.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/algorithm' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_dup/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include dupLink_tsk.c dupLink_tsk_create_single_mbx.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dup' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_gate/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include gateLink_tsk.c gateLink_tsk_create_single_mbx.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/gate' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_ipcIn/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include ipcInLink_drv.c ipcInLink_tsk.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcIn' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_ipcOut/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include ipcOutLink_drv.c ipcOutLink_tsk.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/ipcOut' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_merge/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include mergeLink_tsk.c mergeLink_tsk_create_single_mbx.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/merge' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_nullSrc/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include nullSrcLink_tsk.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/nullSrc' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_null/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include nullLink_tsk.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/null' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_select/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include selectLink_tsk.c selectLink_tsk_create_single_mbx.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/select' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_sgxFrmcpy/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/libdrm -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/EGL -I./include/gbm -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/gbm -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include/omap esTransform.c sgxFrmcpyLink_drv.c sgxFrmcpyLink_tsk.c sgxRender1x1.c sgxRender2x2.c sgxRender2x4.c sgxRender3x3.c sgxRenderKmsCube.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sgxFrmcpy' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_sync/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/linux/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/hlos_common/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/ipc_3_45_00_00/packages -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/omap/include/generated/uapi -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/link_api -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/osa/include syncLink_tsk.c -M > MAKEFILE.DEPEND make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync CORE=a15_0 ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync' make[6]: Nothing to be done for `lib'. make[6]: Leaving directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/sync' make -C /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dispDistSrc CORE=a15_0 depend ; make[6]: Entering directory `/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/hlos/links_a15/dispDistSrc' mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/lib/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/links_a15_dispDistSrc/tda2xx-evm/a15_0/release mkdir -p /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/ /home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-gcc -DTDA2XX_BUILD -DTDA2XX_FAMILY_BUILD -DSOC_TDA2XX -DPLATFORM_EVM_SI -D_DRA7xx -D_SC_VER_1_16 -D__sysbios__ -DUTILS_ASSERT_ENABLE -DFVID2_BACKWARD_COMPATIBLE -DUSE_STD_ASSERT -DTRACE_ENABLE -DASSERT_ENABLE -DENABLE_UART_LOG -D_GNU_SOURCE -DBOARD_TYPE_TDA2XX_EVM -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DIVAHD_INCLUDE -DDSS_INCLUDE -DVPE_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -DIPU_SECONDARY_CORE_IPU1 -DCIO_REDIRECT -DA15_TARGET_OS_LINUX -DLINUX_BUILD -DDYNAMIC_LUT -DPLATFORM_EGL -DPROC_IPU2_INCLUDE -DPROC_DSP1_INCLUDE -DPROC_DSP2_INCLUDE -DPROC_EVE1_INCLUDE -DPROC_EVE2_INCLUDE -DPROC_EVE3_INCLUDE -DPROC_EVE4_INCLUDE -DPROC_A15_0_INCLUDE -DIPU_PRIMARY_CORE_IPU2 -I. -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/ -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/hlos/include -I/home/vkchlt0160/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_compone \ No newline at end of file diff --git a/data2/text/range/30001+/708731.txt b/data2/text/range/30001+/708731.txt new file mode 100644 index 0000000000000000000000000000000000000000..b28c616edf8b7b6e69c3e5c9ff9456a46fb17e48 --- /dev/null +++ b/data2/text/range/30001+/708731.txt @@ -0,0 +1,44 @@ +Ticket Name: Linux/TDA2: TDA2x RVP build failed in Linux, using TI's original Vision SDK(PROCESSOR_SDK_VISION_03_04_00_00) + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA71, DRA752, PMP Tool/software: Linux I followed instruction "VisionSDK_Linux_UserGuide.pdf" to build for tda2x-rvp-linux-all by using TI's original Vision SDK(PROCESSOR_SDK_VISION_03_04_00_00). If I executed "gmake linux", the error message showed below: ***Can't find default configuration "arch/../configs/d3_tda2x_defconfig"! *** scripts/kconfig/Makefile:114:recipe for target 'd3_tda2x_defconfig' failed If I added d3-tda2x-deconfig d3-tda2x-fpd8ch.dts, da-fpd8ch-baseboard.dtsi from Vision SDK 2.10 released by D3. After exectued "gmake linux" the error message showed below: make[5]: *** No rule to make target 'arch/arm/boot/dts/d3-tda2x-fpd8ch.dtb'. Stop. arch/arm/Makefile:333: recipe for target 'd3-tda2x-fpd8ch.dtb' failed make[4]: *** [d3-tda2x-fpd8ch.dtb] Error 2 make[4]: Leaving directory '/home/mbit/TI_VSDK_03_04/ti_components/os_tools/linux/kernel/omap' build_kernel.mk:11: recipe for target 'kernel_build' failed make[3]: *** [kernel_build] Error 2 make[3]: Leaving directory '/home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux' build_kernel.mk:43: recipe for target 'dtb' failed make[2]: *** [dtb] Error 2 make[2]: Leaving directory '/home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux' build_kernel.mk:18: recipe for target 'kernel' failed make[1]: *** [kernel] Error 2 make[1]: Leaving directory '/home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux' gmake: *** [kernel] Error 2 If I built for tda2x-evm-linux-all (just for test). After executed "gmake linux", the error message showed below: arch/arm/kernel/devtree.c: In function 'setup_machine_fdt': arch/arm/kernel/devtree.c:261:2: error: '__machine_arch_type' undeclared (first use in this function) __machine_arch_type = mdesc->nr; ^ arch/arm/kernel/devtree.c:261:2: note: each undeclared identifier is reported only once for each function it appears in scripts/Makefile.build:258: recipe for target 'arch/arm/kernel/devtree.o' failed make[4]: *** [arch/arm/kernel/devtree.o] Error 1 Makefile:964: recipe for target 'arch/arm/kernel' failed make[3]: *** [arch/arm/kernel] Error 2 make[3]: Leaving directory '/home/mbit/TI_VSDK_03_04/ti_components/os_tools/linux/kernel/omap' build_kernel.mk:11: recipe for target 'kernel_build' failed make[2]: *** [kernel_build] Error 2 make[2]: Leaving directory '/home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux' build_kernel.mk:18: recipe for target 'kernel' failed make[1]: *** [kernel] Error 2 make[1]: Leaving directory '/home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux' gmake: *** [kernel] Error 2 Then I wanted to know what would happen if I skipped this step(still built for tda2x-rvp-linux-all) . I executed "gmake -s -j depend", it worked and no error message. Then I executed "gmake -s -j" , the error message showed below: dispDistSrcLink_tsk.c:81:45: fatal error: vdrm_controller/v_controller_if.h: No such file or directory compilation terminated. /home/mbit/TI_VSDK_03_04/vision_sdk/build/hlos/makerules/linux/common_footer_a15.mk:81: recipe for target 'depend' failed make[6]: *** [depend] Error 1 Makefile:16: recipe for target 'links_a15_dispDistSrc' failed make[5]: *** [links_a15_dispDistSrc] Error 2 # utils: tda2xx-rvp: Compiling MultiProc.c # utils: tda2xx-rvp: Compiling MultiProcCfg_dra7xx.c # links_a15_null: tda2xx-rvp: Compiling nullLink_tsk.c # network_utils: tda2xx-rvp: Compiling network_api.c # links_a15_sync: tda2xx-rvp: Compiling syncLink_tsk.c # links_a15_nullSrc: tda2xx-rvp: Compiling nullSrcLink_tsk.c # links_a15_dup: tda2xx-rvp: Compiling dupLink_tsk.c # links_a15_dup: tda2xx-rvp: Compiling dupLink_tsk_create_single_mbx.c # links_a15_merge: tda2xx-rvp: Compiling mergeLink_tsk.c # links_a15_merge: tda2xx-rvp: Compiling mergeLink_tsk_create_single_mbx.c # links_a15_select: tda2xx-rvp: Compiling selectLink_tsk_create_single_mbx.c # links_a15_select: tda2xx-rvp: Compiling selectLink_tsk.c # links_a15_gate: tda2xx-rvp: Compiling gateLink_tsk.c # links_a15_gate: tda2xx-rvp: Compiling gateLink_tsk_create_single_mbx.c # links_a15_algorithm: tda2xx-rvp: Compiling algorithmLink_tsk_create_single_mbx.c # links_a15_algorithm: tda2xx-rvp: Compiling algorithmLink_cfg.c # links_a15_algorithm: tda2xx-rvp: Compiling algorithmLink_algPluginSupport.c # links_a15_algorithm: tda2xx-rvp: Compiling algorithmLink_tsk.c # links_a15_ipcIn: tda2xx-rvp: Compiling ipcInLink_tsk.c # links_a15_ipcIn: tda2xx-rvp: Compiling ipcInLink_drv.c # links_a15_ipcOut: tda2xx-rvp: Compiling ipcOutLink_tsk.c # links_a15_ipcOut: tda2xx-rvp: Compiling ipcOutLink_drv.c # utils: tda2xx-rvp: Creating archive utils.a # links_a15_null: tda2xx-rvp: Creating archive links_a15_null.a # links_a15_gate: tda2xx-rvp: Creating archive links_a15_gate.a # links_a15_merge: tda2xx-rvp: Creating archive links_a15_merge.a # network_utils: tda2xx-rvp: Creating archive network_utils.a # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxRenderKmsCube.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling esTransform.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxRender3x3.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxRender1x1.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxFrmcpyLink_drv.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxRender2x4.c # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxFrmcpyLink_tsk.c # links_a15_select: tda2xx-rvp: Creating archive links_a15_select.a # links_a15_sgxFrmcpy: tda2xx-rvp: Compiling sgxRender2x2.c # links_a15_dup: tda2xx-rvp: Creating archive links_a15_dup.a # osa: tda2xx-rvp: Compiling osa_remote_log_client.c # osa: tda2xx-rvp: Compiling osa_msgq.c # osa: tda2xx-rvp: Compiling osa_prf.c # osa: tda2xx-rvp: Compiling osa_que.c # osa: tda2xx-rvp: Compiling osa_timer.c # osa: tda2xx-rvp: Compiling osa_buf.c # osa: tda2xx-rvp: Compiling osa_ipc_que.c # osa: tda2xx-rvp: Compiling osa_remote_log_server.c # osa: tda2xx-rvp: Compiling osa.c # osa: tda2xx-rvp: Compiling osa_file.c # osa: tda2xx-rvp: Compiling osa_mbx.c # osa: tda2xx-rvp: Compiling osa_global_time.c # osa: tda2xx-rvp: Compiling osa_thr.c # osa: tda2xx-rvp: Compiling osa_mutex.c # osa: tda2xx-rvp: Compiling osa_dma.c # osa: tda2xx-rvp: Compiling osa_cache.c # links_a15_sync: tda2xx-rvp: Creating archive links_a15_sync.a # osa: tda2xx-rvp: Compiling osa_mem.c # system: tda2xx-rvp: Compiling system_pvrscope_if.c # system: tda2xx-rvp: Compiling system_linkApi.c # osa: tda2xx-rvp: Compiling osa_tsk.c # links_a15_algorithm: tda2xx-rvp: Creating archive links_a15_algorithm.a # osa: tda2xx-rvp: Compiling osa_sem.c # system: tda2xx-rvp: Compiling system_ipc_msgq.c # system: tda2xx-rvp: Compiling system_gl_egl_utils.c # system: tda2xx-rvp: Compiling system_common.c # system: tda2xx-rvp: Compiling system_rpmsg_notify.c # system: tda2xx-rvp: Compiling system_openvx.c # system: tda2xx-rvp: Compiling system_gbm_allocator.c # system: tda2xx-rvp: Compiling system_ipc.c # system: tda2xx-rvp: Compiling system_linkId_alloc.c # system: tda2xx-rvp: Compiling system_linkApi_local.c # links_a15_ipcOut: tda2xx-rvp: Creating archive links_a15_ipcOut.a # links_a15_ipcIn: tda2xx-rvp: Creating archive links_a15_ipcIn.a # links_a15_sgxFrmcpy: tda2xx-rvp: Creating archive links_a15_sgxFrmcpy.a # osa: tda2xx-rvp: Creating archive osa.a # links_a15_nullSrc: tda2xx-rvp: Creating archive links_a15_nullSrc.a # system: tda2xx-rvp: Creating archive system.a MAKEFILE.MK:16: recipe for target 'vision_sdk_linux_lib' failed make[4]: *** [vision_sdk_linux_lib] Error 2 Makefile:229: recipe for target 'links_fw_libs_hlos' failed make[3]: *** [links_fw_libs_hlos] Error 2 Makefile:64: recipe for target 'apps_hlos' failed make[2]: *** [apps_hlos] Error 2 Makefile:36: recipe for target 'apps' failed make[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 What should I do next? Thank you. Best regards + +Responses: +Hi Could you please let us know the version of your Linux Ubuntu machine ? Installation of Vision SDK release needs a Linux Ubuntu 14.04 machine. IMPORTANT NOTE: If you are installing Ubuntu on a virtual machine, ensure it’s a 64 bit Ubuntu. Regards Surya + +Dear Surya Thanks for your reply. My Ubuntu version is 16.04, it's not a virtual machine. Regards Daniel + +Hi Daniel, You need not to copy below files d3-tda2x-deconfig d3-tda2x-fpd8ch.dts, da-fpd8ch-baseboard.dtsi from Vision SDK 2.10 released by D3 These are already part of new kernel released with vision sdk 3.4 release 1. Could you please send us the commit ids/tag name of kernel, u-boot, sgx ? Run below command git log --oneline --decorate (from respective folder) 2. Could you please confirm you downloaded the new file system released with 3.4 release ? Regards Surya + +Dear Surya 1. After executed this command, I got a lot of information. I didn't know which one is correct, so I copied some information that you might need: omap dd891d3 (HEAD) arm: dts: dra7: Re-route PCF interrupts 742f844 (tag: processor-sdk-linux-automotive-3.04.00.02-3.x, origin/infoadas-on-psdkla3.04) e2f5adb (tag: processor-sdk-linux-automotive-3.00.00.04_rc1) mmc: omap_hsmmc: Workaround errata regarding SDR104/HS200 tuning failures (i929) u-boot 9551b3d (HEAD, tag: REL_VISION_SDK_03_04_00_00, tag: DEV_VISION_SDK_03_04_00_03, origin/infoadas-on-psdkla3.04) board: Add support for D3 TDA2x RVP ac1d50f (tag: VISION_SDK_03_04_00_00, tag: VISION_SDK_03_03_00_02, tag: REL_VISION_SDK_03_03_00_00, tag: DEV_VISION_SDK_03_04_00_00) spl: dra7xx: early boot: Match timer configuration with dra7xx-infoadas DT 4d68cab (tag: VISION_SDK_03_03_00_01) board: dra7xx: Pin-mux changes for Vin2a and Vin3a in TDA2px 333293e (tag: processor-sdk-linux-automotive-3.04.00.02) ti: dra76: Remove Vin1a_fld conflicting with VOUT1 HDMI power 6f6aaab (tag: 6AO.1.0) ARM: DRA7: Add clock fixup for DSP on dra76x 14464da (tag: processor-sdk-linux-automotive-3.00.00.04_rc1, tag: 6AM.1.3-P1) dra7x: fastboot: Increase recovery partition size c8a0b5ce (tag: processor-sdk-linux-automotive-3.03.00.03) ti: dra71: Add J6entry vision pinmux 5802ae3 (tag: processor-sdk-linux-automotive-3.03.00.01) Merge branch 'ti-u-boot-2016.05' of git://git.ti.com/ti-u-boot/ti-u-boot into p-ti-u-boot-2016.05 sgx fd47e44 (HEAD -> sgx_dev, origin/ti-img-sgx/1.14.3699939/k4.4) Revert "km: build: remove dependency on user-mode builds" fed0756 (origin/ti-img-sgx/1.14.3699939/k4.1) KM: Make kernel configuration variable SUPPORT_LISR_MISR_SYNC conditional cb46ba4 (origin/img-sgx) IMG DDK 1.14 ED3699939 2. You mean the file "tisdk-rootfs-image-dra7xx-evm_vsdk_3_4.tar.xz"? Yes I downloaded this. Regards Daniel + +Hi Daniel, You are on very old kernel Could you run below commands to rebase to latest ? git fetch git rebase origin/infoadas-on-psdkla3.04 After rebase, run git log --oneline --decorate & confirm HEAD is at below tag/commit ID 018eb62 (HEAD, tag: REL_VISION_SDK_03_04_00_00) Once you are on latest, clean & build for tda2x_rvp_linux_all config Regards Surya + +Dear Surya I tried to rebase, the returned info showed that the HEAD is the latest. However, after I executed git log --oneline --decorate , I can't get the same tag as you listed. So I decided to deleted omap and re-download this part. The internet speed is slow, so it may take some time to finish it. Thank you. Regards Daniel + +Hi Daniel, Are you able to clone omap & checkout the tag of VSDK 3.4 release ? & did that fix the build issue ? Regards Surya + +Dear Surya Sorry for the late reply. I have been unable to log in for the past few days due to unknown reasons. I managed to build for TDA2X after I re-downloaded omap and executed " git checkout -b kernel_dev tags/REL_VISION_SDK_03_04_00_00 " Thank you so much. However I had other problem. My TDA2x couldn't run the system I built, the error information showed below: U-Boot SPL 2016.05-00010-g9551b3d (Jul 20 2018 - 16:49:22) DRA752-GP ES2.0 Trying to boot from MMC1 reading single-stage-boot.dtb spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d (Jul 20 2018 - 16:49:22 +0800) CPU : DRA752-GP ES2.0 Board: D3 TDA2x I2C: ready DRAM: 2 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 reading uboot.env ** Unable to read "uboot.env" from mmc0:1 ** Using default environment Unable to read Board-ID Unable to read Expansion-ID SCSI: 0 device not found ERROR: scsi device not found at drivers/block/disk-uclass.c:43/scsi_init() Net: not set. Validating first E-fuse MAC Could not get PHY for cpsw: addr 2 cpsw Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 163 bytes read in 3 ms (52.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3803872 bytes read in 222 ms (16.3 MiB/s) 107539 bytes read in 77 ms (1.3 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x3a0ae0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff412 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (mbit@mbit-YangTianT4900d-00) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Fri Jul 20 16:50:10 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: D3 TDA2X FPD8CH [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9e000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@a1000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@a3000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef626000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=a5901957-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 328292K/979968K available (6959K kernel code, 378K rwdata, 2596K rodata, 344K init, 291K bss, 446876K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc095d02c (9557 kB) [ 0.000000] .init : 0xc095e000 - 0xc09b4000 ( 344 kB) [ 0.000000] .data : 0xc09b4000 - 0xc0a12b20 ( 379 kB) [ 0.000000] .bss : 0xc0a14000 - 0xc0a5cd00 ( 292 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000322] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000330] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000806] Console: colour dummy device 80x30 [ 0.000823] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000829] This ensures that you still see kernel messages. Please [ 0.000835] update your kernel commandline. [ 0.000849] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000862] pid_max: default: 32768 minimum: 301 [ 0.000961] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000970] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001535] Initializing cgroup subsys io [ 0.001552] Initializing cgroup subsys memory [ 0.001578] Initializing cgroup subsys devices [ 0.001591] Initializing cgroup subsys freezer [ 0.001602] Initializing cgroup subsys perf_event [ 0.001613] Initializing cgroup subsys pids [ 0.001638] CPU: Testing write buffer coherency: ok [ 0.001858] /cpus/cpu@0 missing clock-frequency property [ 0.001874] /cpus/cpu@1 missing clock-frequency property [ 0.001884] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001926] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080044] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080115] Brought up 2 CPUs [ 0.080128] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080134] CPU: All CPU(s) started in HYP mode. [ 0.080139] CPU: Virtualization extensions available. [ 0.080532] devtmpfs: initialized [ 0.111136] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.112101] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.296175] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.296200] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.300651] pinctrl core: initialized pinctrl subsystem [ 0.301536] NET: Registered protocol family 16 [ 0.302487] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.330213] cpuidle: using governor ladder [ 0.360234] cpuidle: using governor menu [ 0.368386] OMAP GPIO hardware version 0.1 [ 0.374979] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.375427] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.397595] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.397605] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.398086] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.398096] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.398682] OMAP DMA hardware revision 0.0 [ 0.441260] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.442355] edma 43300000.edma: memcpy is disabled [ 0.447020] edma 43300000.edma: TI EDMA DMA engine driver [ 0.450771] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.450961] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.451127] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.451284] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.451564] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.451750] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.453774] usbcore: registered new interface driver usbfs [ 0.453832] usbcore: registered new interface driver hub [ 0.453920] usbcore: registered new device driver usb [ 0.454887] pca953x 0-0074: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio_exp_som_default, deferring probe [ 0.455590] palmas 0-0058: IRQ missing: skipping irq request [ 0.470681] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 [ 0.542124] pca953x 0-0075: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio_exp_bb_default, deferring probe [ 0.542173] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.542234] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/i2c3_pins_default, deferring probe [ 0.542383] media: Linux media interface: v0.10 [ 0.542433] Linux video capture interface: v2.00 [ 0.542472] pps_core: LinuxPPS API ver. 1 registered [ 0.542479] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.542502] PTP clock support registered [ 0.542549] EDAC MC: Ver: 3.0.0 [ 0.543337] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.543635] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.543960] Advanced Linux Sound Architecture Driver Initialized. [ 0.544797] clocksource: Switched to clocksource arch_sys_counter [ 0.555163] NET: Registered protocol family 2 [ 0.555680] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.555744] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.555869] TCP: Hash tables configured (established 8192 bind 8192) [ 0.555925] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.555957] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.556168] NET: Registered protocol family 1 [ 0.556412] RPC: Registered named UNIX socket transport module. [ 0.556421] RPC: Registered udp transport module. [ 0.556427] RPC: Registered tcp transport module. [ 0.556433] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.557388] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.567308] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.567968] NFS: Registering the id_resolver key type [ 0.568001] Key type id_resolver registered [ 0.568009] Key type id_legacy registered [ 0.568076] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.570075] bounce: pool size: 64 pages [ 0.570228] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.570242] io scheduler noop registered [ 0.570253] io scheduler deadline registered [ 0.570284] io scheduler cfq registered (default) [ 0.575023] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.634691] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.638104] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250 [ 1.592588] console [ttyS0] enabled [ 1.597007] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 300, base_baud = 3000000) is a 8250 [ 1.606701] 48422000.serial: ttyS7 at MMIO 0x48422000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.616655] [drm] Initialized drm 1.1.0 20060810 [ 1.622584] OMAP DSS rev 6.1 [ 1.626396] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.641786] loop: module loaded [ 1.645178] at24 0-0054: 65536 byte 24c512 EEPROM, writable, 128 bytes/write [ 1.652442] vmemexp device MAJOR num = 246 [ 1.656595] vmemexp class registered [ 1.660314] /dev/vmemexp device registered [ 1.664426] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.670914] pinctrl-single 4a003400.pinmux: pin 4a0037a4.0 already requested by 4a003400.pinmux; cannot claim for 48098000.spi [ 1.682377] pinctrl-single 4a003400.pinmux: pin-233 (48098000.spi) status -22 [ 1.689559] pinctrl-single 4a003400.pinmux: could not request pin 233 (4a0037a4.0) from group mcspi1_pins_default on device pinctrl-single [ 1.702146] omap2_mcspi 48098000.spi: Error applying setting, reverse things back [ 1.711719] m25p80 spi32766.0: n25q512ax3 (65536 Kbytes) [ 1.717139] 8 ofpart partitions found on MTD device spi32766.0 [ 1.722997] Creating 8 MTD partitions on "spi32766.0": [ 1.728172] 0x000000000000-0x000000010000 : "QSPI.SPL" [ 1.734278] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" [ 1.741055] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" [ 1.747824] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" [ 1.754551] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.760901] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.767853] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.774536] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.782890] libphy: Fixed MDIO Bus: probed [ 1.834829] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.840951] libphy: 48485000.mdio: probed [ 1.847284] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver TI DP83867 [ 1.856203] cpsw 48484000.ethernet: Detected MACID = 94:e3:6d:28:0d:4a [ 1.862850] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.870768] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 1.877344] ehci-pci: EHCI PCI platform driver [ 1.881856] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 1.888097] ohci-platform: OHCI generic platform driver [ 1.894218] mousedev: PS/2 mouse device common for all mice [ 1.900401] i2c /dev entries driver [ 1.908599] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.913435] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode [ 1.919922] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode [ 1.926321] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode [ 1.932702] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode [ 1.939099] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode [ 1.995184] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.001568] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.024805] omap_hsmmc 480b4000.mmc: no pinctrl state for ddr_1_8v mode [ 2.031449] omap_hsmmc 480b4000.mmc: no pinctrl state for hs200_1_8v mode [ 2.038459] VDD_3V3: supplied by VDD_3V3_IN [ 2.075829] ledtrig-cpu: registered to indicate activity on CPUs [ 2.085459] NET: Registered protocol family 10 [ 2.100673] sit: IPv6 over IPv4 tunneling driver [ 2.105880] NET: Registered protocol family 17 [ 2.110543] Key type dns_resolver registered [ 2.114988] omap_voltage_late_init: Voltage driver support not added [ 2.121880] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.128102] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.134819] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.141026] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.148352] Power Management for TI OMAP4+ devices. [ 2.153466] Registering SWP/SWPB emulation handler [ 2.159651] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.167308] dmm 4e000000.dmm: initialized all PAT entries [ 2.175411] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.182066] [drm] No driver support for vblank timestamp query. [ 2.188516] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.212247] mmc0: host does not support reading read-only switch, assuming write-enable [ 2.222340] mmc0: new high speed SDHC card at address 0002 [ 2.228804] mmcblk0: mmc0:0002 00000 7.42 GiB [ 2.237524] mmcblk0: p1 p2 [ 2.458939] mmc1: MAN_BKOPS_EN bit is not set [ 2.467209] mmc1: new high speed MMC card at address 0001 [ 2.473134] mmcblk1: mmc1:0001 MMC08G 7.33 GiB [ 2.477977] mmcblk1boot0: mmc1:0001 MMC08G partition 1 2.00 MiB [ 2.494228] mmcblk1boot1: mmc1:0001 MMC08G partition 2 2.00 MiB [ 2.501806] mmcblk1: p1 p2 p3 [ 2.598274] fpd3_serdes 2-000c: Not a fpd3_24b_ser chip [ 2.603536] fpd3_serdes: probe of 19-002c failed with error -5 [ 2.609475] i2c i2c-19: of_i2c: invalid reg on /ocp/i2c@48060000/serializer@0c/display@0 [ 2.617643] fpd3_serdes 2-000c: Serializer fpd3_24b_ser ready [ 2.623444] omap_i2c 48060000.i2c: bus 2 rev0.12 at 100 kHz [ 2.630936] hctosys: unable to open rtc device (rtc0) [ 2.648857] ALSA device list: [ 2.651843] No soundcards found. [ 2.657349] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 2.666506] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 6.182146] EXT4-fs (mmcblk0p2): recovery complete [ 6.189480] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 6.197655] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 6.204954] devtmpfs: mounted [ 6.208169] Freeing unused kernel memory: 344K [ 6.212629] This architecture does not have kernel memory protection. [ 6.440840] systemd[1]: System time before build time, advancing clock. [ 6.482023] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 6.496087] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 6.507797] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 6.526303] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 6.556515] systemd[1]: Set hostname to . [ 6.622391] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 6.632662] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 6.634567] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 6.684226] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 26 bits of entropy available) [ 6.703548] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) [ 6.827236] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) [ 6.836758] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) [ 6.846672] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) [ 7.435449] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 7.443243] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 7.450987] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 7.458319] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 7.465791] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 7.475248] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 7.507260] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 7.537957] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 7.565740] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 7.595222] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 7.625113] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 7.645186] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 7.705062] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 7.727655] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 7.755331] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 7.785198] systemd[1]: tmp.mount: Directory /tmp to mount over is not empty, mounting anyway. [ 7.824986] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 7.855238] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 7.925246] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 7.957716] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 7.995391] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 8.015263] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 8.045024] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 8.065775] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 8.125228] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 8.155794] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 8.193692] systemd[1]: Starting Journal Service... Starting Journal Service... [ 8.215078] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 8.235198] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 8.255086] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 8.285202] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 8.355244] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 8.380449] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [FAILED] Failed to mount Debug File System. See 'systemctl status sys-kernel-debug.mount' for details. [FAILED] Failed to mount POSIX Message Queue File System. See 'systemctl status dev-mqueue.mount' for details. [FAILED] Failed to mount Temporary Directory. See 'systemctl status tmp.mount' for details. [DEPEND] Dependency failed for Network Time Synchronization. [FAILED] Failed to start Remount Root and Kernel File Systems. See 'systemctl status systemd-remount-fs.service' for details. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Setup Virtual Console. Starting Apply Kernel Variables... Starting Create Static Device Nodes in /dev... Starting udev Coldplug all Devices... [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Create Static Device Nodes in /dev. [FAILED] Failed to start Synchronize System and HW clocks. See 'systemctl status sync-clocks.service' for details. [ 9.448916] systemd-journald[143]: Received request to flush runtime journal from PID 1 [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... Starting udev Kernel Device Manager... [ OK ] Started Flush Journal to Persistent Storage. [FAILED] Failed to mount /var/volatile. See 'systemctl status var-volatile.mount' for details. [DEPEND] Dependency failed for Bind mount volatile /var/lib. [DEPEND] Dependency failed for Local File Systems. [FAILED] Failed to mount /media/ram. See 'systemctl status media-ram.mount' for details. [ OK ] Started udev Coldplug all Devices. [ OK ] Started udev Kernel Device Manager. [ SKIP ] Ordering cycle found, skipping alignment.service [ 9.940314] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9e000000 [ 9.954920] remoteproc0: 58820000.ipu is available [ 9.959826] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 9.994827] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 10.028694] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@99000000 [ 10.036632] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 [ 10.054786] remoteproc0: failed to load dra7-ipu1-fw.xem4 [ 10.079326] remoteproc1: 55020000.ipu is available [ 10.084235] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 10.128587] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 10.170531] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@a1000000 [ OK ] Stopped target Multi-User System. [ 10.193596] remoteproc2: 40800000.dsp is available [ OK ] Stopped D-Bus System Message Bus.[ 10.214906] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 10.238305] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Stopped tiipclad-daemon.service.[ 10.252416] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@a3000000 [ 10.265864] remoteproc3: 41000000.dsp is available [ 10.270950] remoteproc3: Note: remoteproc is still under development and considered experimental. [ OK ] Stopped Save/Restore Sound Card State. [ 10.290465] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 10.312205] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ OK ] Stopped Manage Sound Card State (restore and store). [ OK ] Stopped Login Service. [ 10.392987] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 10.416235] alg: skcipher: setkey failed on test 5 for ecb-des-omap: flags=100 [ OK ] Closed Network Service Bus Name. [ 10.441433] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 [ 10.450196] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 [ OK ] Stopped Network Name Resolution. [ OK ] Closed Network Name Resolution Service Bus Name. Starting Network Service... [ OK ] Stopped Serial Getty on ttyS0. [ OK ] Closed D-Bus System Message Bus Socket. [ OK ] Stopped Serial Getty on ttyO0. [ 10.561641] CAN device driver interface [ OK ] Stopped Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Stopped telnetd.service. [ OK ] Stopped weston.service. [ OK ] Stopped rc.pvr.service. [ OK ] Stopped Kernel Logging Service. [ OK ] Stopped Getty on tty1. [ OK ] Stopped Permit User Sessions. [ OK ] Reached target Login Prompts. [ 10.734735] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=345) [ 10.745619] c_can_platform 48480000.can: c_can_platform device registered (regs=fa480000, irq=346) [ OK ] Stopped System Logging Service. [ OK ] Stopped target Basic System. [ OK ] Reached target Sockets. [ OK ] Stopped target System Initialization. [ 10.843891] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ OK ] Started Emergency Shell. [ OK ] Reached target Emergency Mode. [ 10.928275] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 Starting Load/Save Random Seed... Starting Create Volatile Files and Directories... [ OK ] Found device /dev/ttyS0. [ 11.055911] remoteproc2: registered virtio0 (type 7) [ OK ] Started Load/Save Random Seed. [ 11.235594] remoteproc1: registered virtio1 (type 7) [ OK ] Started Create Volatile Files and Directories. Starting Update UTMP about System Boot/Shutdown... [ OK ] Started Network Service. [ OK ] Reached target Network. [ OK ] Started Update UTMP about System Boot/Shutdown. [ 11.696147] remoteproc3: registered virtio2 (type 7) Starting Update UTMP about System Runlevel Changes... [ OK ] Started Update UTMP about System Runlevel Changes. [ 11.832110] SCSI subsystem initialized [ 11.851819] net eth0: initializing cpsw version 1.15 (0) [ 11.861789] net eth0: initialized cpsw ale version 1.4 [ 11.882316] net eth0: ALE Table size 1024 [ 11.906704] libphy: PHY 48485000.mdio:02 not found [ 11.938085] net eth0: phy "48485000.mdio:02" not found on slave 0, err -19 [ 12.012660] net eth0: phy found : id is : 0x2000a231 [ 12.049883] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 12.168365] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 12.377630] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 12.930661] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 12.943393] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1 [ 12.955973] xhci-hcd xhci-hcd.0.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 12.985628] xhci-hcd xhci-hcd.0.auto: irq 439, io mem 0x48890000 [ 13.011628] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 13.050071] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 13.081865] usb usb1: Product: xHCI Host Controller [ 13.090506] usb usb1: Manufacturer: Linux 4.4.84 xhci-hcd [ 13.096577] usb usb1: SerialNumber: xhci-hcd.0.auto [ 13.103242] hub 1-0:1.0: USB hub found [ 13.110020] hub 1-0:1.0: 1 port detected [ 13.119445] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 13.129792] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2 [ 13.152365] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch.[ 13.168135] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 [ 13.193274] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 13.212132] usb usb2: Product: xHCI Host Controller [ 13.228106] usb usb2: Manufacturer: Linux 4.4.84 xhci-hcd [ 13.250421] usb usb2: SerialNumber: xhci-hcd.0.auto [ 13.267205] hub 2-0:1.0: USB hub found [ 13.277323] hub 2-0:1.0: 1 port detected [ 13.710755] remoteproc2: powering up 40800000.dsp [ 13.725908] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 13.731448] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3 [ 13.743256] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 6960839 [ 13.755214] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 13.764015] xhci-hcd xhci-hcd.1.auto: irq 440, io mem 0x488d0000 [ 13.773614] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 13.776813] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002 [ 13.776820] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 13.776825] usb usb3: Product: xHCI Host Controller [ 13.776829] usb usb3: Manufacturer: Linux 4.4.84 xhci-hcd [ 13.776834] usb usb3: SerialNumber: xhci-hcd.1.auto [ 13.808785] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 13.814758] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 13.823711] hub 3-0:1.0: USB hub found [ 13.827962] hub 3-0:1.0: 1 port detected [ 13.849915] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 13.857102] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 4 [ 13.868025] remoteproc2: remote processor 40800000.dsp is now up [ 13.875573] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM. [ 13.875772] virtio_rpmsg_bus virtio0: rpmsg host is online [ 13.889385] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003 [ 13.894852] remoteproc1: powering up 55020000.ipu [ 13.903154] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 13.911561] usb usb4: Product: xHCI Host Controller [ 13.916805] usb usb4: Manufacturer: Linux 4.4.84 xhci-hcd [ 13.921823] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 9408748 [ 13.921921] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 13.935991] usb usb4: SerialNumber: xhci-hcd.1.auto [ 13.942213] hub 4-0:1.0: USB hub found [ 13.947781] hub 4-0:1.0: 1 port detected [ 13.956452] ahci 4a140000.sata: forcing port_map 0x0 -> 0x1 [ 13.962094] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 13.984830] ahci 4a140000.sata: flags: 64bit ncq sntf pm led clo only pmp pio slum part ccc apst [ 14.030969] remoteproc1: remote processor 55020000.ipu is now up [ 14.046655] scsi host0: ahci [ 14.053939] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 337 [ 14.073208] virtio_rpmsg_bus virtio1: rpmsg host is online [ 14.083233] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ 14.093204] remoteproc3: powering up 41000000.dsp [ 14.125130] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 6960839 [ 14.139106] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 14.145000] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 14.150956] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 14.189680] ------------[ cut here ]------------ [ 14.194341] WARNING: CPU: 0 PID: 230 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 14.203866] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access [ 14.216000] Modules linked in: virtio_rpmsg_bus(+) pvrsrvkm(O) ecb ahci_platform libahci_platform sha512_generic libahci libata sha512_arm scsi_mod sha256_generic hmac md5 dwc3_omap sha1_generic sha1_arm_neon sha1_arm omap_aes_driver omap_sham rtc_omap c_can_platform c_can can_dev omap_des omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 14.248735] CPU: 0 PID: 230 Comm: systemd-udevd Tainted: G O 4.4.84 #2 [ 14.256424] Hardware name: Generic DRA74X (Flattened Device Tree) [ 14.262540] Backtrace: [ 14.265016] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 14.272615] r7:c02e2868 r6:20070193 r5:00000000 r4:c09e1490 [ 14.278338] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 14.285594] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 14.293716] r7:c02e2868 r6:00000093 r5:00000009 r4:ee7eb860 [ 14.299432] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 14.308164] r8:00000017 r7:c08ba5ac r6:00000002 r5:c08ba1e4 r4:c08ba288 [ 14.314938] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 14.323846] r3:ef214280 r2:c08ba288 [ 14.327447] r4:80080003 [ 14.330002] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 14.339346] r10:c0a11d8b r9:ef208300 r8:00000017 r7:00000000 r6:00000000 r5:ef208360 [ 14.347249] r4:ef214780 [ 14.349804] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 14.358711] r10:00000001 r9:ef272200 r8:ef008000 r7:00000000 r6:c09bc104 r5:ef208360 [ 14.366611] r4:ef208300 [ 14.369164] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 14.377722] r7:00000000 r6:c09bc104 r5:ef208360 r4:ef208300 [ 14.383440] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 14.392084] r7:00000000 r6:00000000 r5:00000017 r4:c09b0424 [ 14.397802] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 14.406541] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 14.414835] ata1: SATA link down (SStatus 0 SControl 300) [ 14.420339] r9:ef272200 r8:fa213000 r7:fa212000 r6:ee7eba20 r5:fa21200c r4:c09b68ec [ 14.428159] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 14.435671] Exception stack(0xee7eba20 to 0xee7eba68) [ 14.440746] ba20: ef249074 60070013 00000001 0000000e 00000000 00000004 ef249074 60070013 [ 14.448958] ba40: 00000000 ef272200 00000001 ee7eba7c ee7eba80 ee7eba70 c03f0318 c06d1bfc [ 14.457167] ba60: 20070013 ffffffff [ 14.460667] r9:ef272200 r8:00000000 r7:ee7eba54 r6:ffffffff r5:20070013 r4:c06d1bfc [ 14.468493] [] (_raw_spin_unlock_irqrestore) from [] (__pm_runtime_idle+0x74/0x84) [ 14.477846] [] (__pm_runtime_idle) from [] (_omap_dm_timer_request+0x10c/0x31c) [ 14.486927] r7:00000000 r6:ef6736ec r5:00000003 r4:ef37b610 [ 14.492646] [] (_omap_dm_timer_request) from [] (omap_dm_timer_request_by_node+0x1c/0x28) [ 14.502600] r9:ef272200 r8:ef6736ec r7:ee7a3278 r6:ef6736ec r5:edba2c10 r4:00000000 [ 14.510419] [] (omap_dm_timer_request_by_node) from [] (omap_rproc_request_timer+0x14/0x88) [ 14.520562] [] (omap_rproc_request_timer) from [] (omap_rproc_enable_timers+0xd8/0x274 [omap_remoteproc]) [ 14.531912] r7:ee7a3278 r6:c09c5bdc r5:edba2c10 r4:00000000 [ 14.537635] [] (omap_rproc_enable_timers [omap_remoteproc]) from [] (omap_rproc_start+0x90/0x1a0 [omap_remoteproc]) [ 14.549857] r10:e3100000 r9:ef272200 r8:c09c5b5c r7:ee7a3000 r6:00000000 r5:ef272210 [ 14.557757] r4:ee7a3278 [ 14.560326] [] (omap_rproc_start [omap_remoteproc]) from [] (rproc_boot+0x45c/0x55c [remoteproc]) [ 14.570977] r9:00000000 r8:ee7a3020 r7:ee7a31ac r6:ee7a31b4 r5:00000000 r4:ee7a3000 [ 14.578813] [] (rproc_boot [remoteproc]) from [] (rproc_virtio_find_vqs+0x18c/0x1f0 [remoteproc]) [ 14.589465] r10:ee7a3020 r9:00000002 r8:bf263d5c r7:ee7a2010 r6:ee7a21f0 r5:ee7ebc44 [ 14.597368] r4:00000002 [ 14.599942] [] (rproc_virtio_find_vqs [remoteproc]) from [] (rpmsg_probe+0xbc/0x474 [virtio_rpmsg_bus]) [ 14.611117] r10:00000000 r9:00000000 r8:ee7a2010 r7:ee7ebc38 r6:ee7a3000 r5:ed915600 [ 14.619017] r4:bf05b96c [ 14.621584] [] (rpmsg_probe [virtio_rpmsg_bus]) from [] (virtio_dev_probe+0x230/0x310 [virtio]) [ 14.632061] r10:00000000 r9:00000000 r8:00000000 r7:ee7a2020 r6:ee7a2010 r5:00000000 [ 14.639962] r4:00000000 [ 14.642520] [] (virtio_dev_probe [virtio]) from [] (driver_probe_device+0x204/0x2f8) [ 14.652039] r10:00000000 r9:ed92fd88 r8:00000025 r7:bf263dfc r6:00000000 r5:ee7a2020 [ 14.659940] r4:c0a4f7dc [ 14.662493] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 14.670964] r9:ed92fd88 r8:126d029c r7:00000000 r6:ee7a2054 r5:bf263dfc r4:ee7a2020 [ 14.678784] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 14.686993] r7:00000000 r6:c03e6da8 r5:bf263dfc r4:00000000 [ 14.692710] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 14.700744] r6:bf035d58 r5:ee777700 r4:bf263dfc [ 14.705405] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 14.713445] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 14.721567] r7:ed919340 r6:c09b99b0 r5:bf26c000 r4:bf263dfc [ 14.727287] [] (driver_register) from [] (register_virtio_driver+0x30/0x44 [virtio]) [ 14.736805] r5:bf26c000 r4:00000000 [ 14.740423] [] (register_virtio_driver [virtio]) from [] (rpmsg_init+0x44/0x84 [virtio_rpmsg_bus]) [ 14.751175] [] (rpmsg_init [virtio_rpmsg_bus]) from [] (do_one_initcall+0x98/0x1e4) [ 14.760605] r5:bf26c000 r4:c09b99b0 [ 14.764222] [] (do_one_initcall) from [] (do_init_module+0x68/0x378) [ 14.772343] r10:bf263f00 r9:ed92fd88 r8:126d029c r7:00000001 r6:ed919300 r5:00000001 [ 14.780243] r4:bf263f00 [ 14.782798] [] (do_init_module) from [] (load_module+0x1df8/0x2068) [ 14.790833] r6:ed92fd80 r5:00000001 r4:ee7ebf44 [ 14.795496] [] (load_module) from [] (SyS_finit_module+0x88/0x98) [ 14.803356] r10:00000000 r9:ee7ea000 r8:c000fc84 r7:0000017b r6:b6debd90 r5:00000007 [ 14.811255] r4:00000000 [ 14.813809] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x34) [ 14.822017] r6:00000000 r5:0048f928 r4:00000000 [ 14.826677] ---[ end trace 8811aaa4b0a3bdfd ]--- [ 14.831674] ------------[ cut here ]------------ [ 14.836321] WARNING: CPU: 0 PID: 227 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 14.842676] remoteproc3: remote processor 41000000.dsp is now up [ 14.851969] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access [ 14.864103] Modules linked in: virtio_rpmsg_bus(+) pvrsrvkm(O) ecb ahci_platform libahci_platform sha512_generic libahci libata sha512_arm scsi_mod sha256_generic hmac md5 dwc3_omap sha1_generic sha1_arm_neon sha1_arm omap_aes_driver omap_sham rtc_omap c_can_platform c_can can_dev omap_des omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 14.896829] CPU: 0 PID: 227 Comm: systemd-udevd Tainted: G W O 4.4.84 #2 [ 14.904517] Hardware name: Generic DRA74X (Flattened Device Tree) [ 14.910632] Backtrace: [ 14.913102] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 14.920701] r7:c02e2868 r6:200d0193 r5:00000000 r4:c09e1490 [ 14.926421] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 14.933677] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 14.941799] r7:c02e2868 r6:00000093 r5:00000009 r4:ee7d1c50 [ 14.947515] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 14.956248] r8:00000017 r7:c08ba5ac r6:00000002 r5:c08ba1e4 r4:c08ba288 [ 14.963021] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 14.971928] r3:ef214280 r2:c08ba288 [ 14.975530] r4:80080003 [ 14.978086] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 14.987430] r10:c0a11d8b r9:ef208300 r8:00000017 r7:00000000 r6:00000000 r5:ef208360 [ 14.995331] r4:ef214780 [ 14.997886] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 15.006793] r10:ed6f9180 r9:ed8299c0 r8:ef008000 r7:00000000 r6:c09bc104 r5:ef208360 [ 15.014696] r4:ef208300 [ 15.017250] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 15.025808] r7:00000000 r6:c09bc104 r5:ef208360 r4:ef208300 [ 15.031527] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 15.040172] r7:00000000 r6:00000000 r5:00000017 r4:c09b0424 [ 15.045892] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 15.054630] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 15.063012] r9:ed8299c0 r8:fa213000 r7:fa212000 r6:ee7d1e10 r5:fa21200c r4:c09b68ec [ 15.070831] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 15.078344] Exception stack(0xee7d1e10 to 0xee7d1e58) [ 15.083415] 1e00: ed829eb0 ed829d30 c00fc27c ed829d31 [ 15.091628] 1e20: ed829910 ed8299d0 00000000 ed6f9184 ed829eb0 ed8299c0 ed6f9180 ee7d1e84 [ 15.099839] 1e40: ed829911 ee7d1e60 ed829910 c02bc778 a00d0013 ffffffff [ 15.106479] r9:ed8299c0 r8:ed829eb0 r7:ee7d1e44 r6:ffffffff r5:a00d0013 r4:c02bc778 [ 15.114309] [] (__rb_insert_augmented) from [] (__vma_link_rb+0x64/0x74) [ 15.122780] r7:ed829eb4 r6:ed6f9180 r5:ed8299d0 r4:ed8299c0 [ 15.128501] [] (__vma_link_rb) from [] (copy_process+0x11d4/0x14c8) [ 15.136536] r9:ed8299c0 r8:00000000 r7:00000000 r6:eee70974 r5:ee4683c0 r4:eee70990 [ 15.144358] [] (copy_process) from [] (_do_fork+0x78/0x334) [ 15.151694] r10:00000000 r9:ee7d0000 r8:c000fc84 r7:00000000 r6:00000000 r5:bef53930 [ 15.159596] r4:01200011 [ 15.162150] [] (_do_fork) from [] (SyS_clone+0x28/0x30) [ 15.169139] r10:00000000 r9:ee7d0000 r8:c000fc84 r7:00000078 r6:b6f75000 r5:bef53930 [ 15.177041] r4:b6f75068 [ 15.179596] [] (SyS_clone) from [] (ret_fast_syscall+0x0/0x34) [ 15.187196] ---[ end trace 8811aaa4b0a3bdfe ]--- [ 15.193207] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 15.200762] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 15.214608] virtio_rpmsg_bus virtio2: rpmsg host is online [ 15.223632] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 15.248745] NET: Registered protocol family 41 Welcome to emergency mode! After logging in, type "journalctl -xb" to view system logs, "systemctl reboot" to reboot, "systemctl default" or ^D to try again to boot into default mode. Press Enter for maintenance (or press Control-D to continue): What can I do now? Thank you. Regards Daniel + +Hi Daniel, We are able to reproduce the issue at our end and waiting support from D3 engineers Regards Surya + +Dear Surya I will wait for your response. Thank you. Regards Daniel + +Hi Daniel, Can you please share the contents of the uenv.txt file on the boot partition of your SD card? Please delete the first line that defines the fdtfile= if you are currently defining it. Thanks, Ben + +Hi Ben, The contents of the uenv.txt as below: args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M" Regards, Daniel + +Hi Ben & Daniel, I am also facing the same issue , I tried to run VSDK 3.4 on TDA2XX EVM board and I am getting the error as below Fixing recursive fault but reboot is needed Once I removed the first line "fdtfile=dra7-evm-infoadas.dtb " in uenv.txt , it could load successfully . However when I try to run apps.out after executing vision_sdk_load.sh it is not loading to usecase menu . Instead following lines are getting printed continuously. [HOST] [DSP1 ] 11.374611 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 11.374611 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 12.374336 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 12.725553 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 13.374367 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 14.374397 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 15.374428 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 16.374458 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 17.374489 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 18.374519 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 19.374550 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 20.374550 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 21.374580 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 22.374611 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 23.374641 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 24.374672 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 25.374702 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 26.374733 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 27.374763 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 28.374763 s: SYSTEM: Attaching to [DSP2] ... [HOST] [DSP1 ] 29.374794 s: SYSTEM: Attaching to [DSP2] ... I beleive there is some issue in latching to DSP2 core . Kindly help us on resolving this issue Regards, Surendar + +Hello, I just tried several times and have not had an issue. I downloaded Vision SDK 3.04 from ti.com, and followed the steps from the user guide: 1. run setup_linux.sh to download linux components 2. download and install compilers 3. edit Rules.make so the target is tda2xx_rvp_linux_all 4. make linux 5. make linux_install 6. make depend 7. make 8. copy boot and rootfs files 9. edit uenv.txt to use the correct dtb file (deleting the line also works). Did you follow all of these steps? Thanks, Ben + +Hi Ben , Yes, I followed all the steps you have mentioned . But I am compiling for tda2xx_evm_linux_all and I am not sure about 9th step , I just removed the first line . Regards , Surendar + +Hi Ben, I resolved my issue after re-extracted tisdk-rootfs-image-dra7xx-evm_vsdk_3_4.tar.xz and re-built. Thank you. But I still have a little problem. There is no vision_sdk_demo.sh in the directory home/root. I copied all files from same directory in micro sd card which came with the TDA2X , then it works. So I wonder if this is normal? Regards, Daniel. + +Hi, vision_sdk_demo.sh is not part of the TI software release, that is something that is added by D3. So if you are using the TI release then it will not be there. Cheers, Ben + +Surendar, To be clear, you are using the TDA2x RVP correct? Then you must select tda2xx_rvp_linux_all as a build target. tda2xx_evm_linux_all is for different hardware. Cheers, Ben + +Hi Ben, Thanks for your help. Regards, Daniel + diff --git a/data2/text/range/30001+/709978.txt b/data2/text/range/30001+/709978.txt new file mode 100644 index 0000000000000000000000000000000000000000..1d9185395fbd99ed165b8be3a5c8f4dba9dd1bed --- /dev/null +++ b/data2/text/range/30001+/709978.txt @@ -0,0 +1,945 @@ +Ticket Name: TDA2: clock issue when multiple displays + +Query Text: +Part Number: TDA2 Hi, all My project have 2 LCD output. Refer to the "chains_lvdsVipDualCam_DualDisplay" usecase I write a configuration here. Void chains_vipMultiCamEncodeAdasDualDisplay_SetDisplayLinkPrms ( + DisplayLink_CreateParams *pDpi1Prm, + DisplayLink_CreateParams *pDpi2Prm, + UInt32 width, UInt32 height) +{ + pDpi1Prm->displayId = DISPLAY_LINK_INST_DSS_VID1; + pDpi1Prm->displayScanFormat = SYSTEM_SF_PROGRESSIVE; + pDpi1Prm->rtParams.tarWidth = width; + pDpi1Prm->rtParams.tarHeight = height; + + pDpi2Prm->displayId = DISPLAY_LINK_INST_DSS_VID2; + pDpi2Prm->displayScanFormat = SYSTEM_SF_PROGRESSIVE; + pDpi2Prm->rtParams.tarWidth = width; + pDpi2Prm->rtParams.tarHeight = height; +} + + + +Int32 chains_vipMultiCamEncodeAdasDualDisplay_StartDisplayCtrl( + chains_vipMultiCamEncodeAdasDualDisplayObj *pUcObj, Void *appObj) +{ + Int32 status = OSA_SOK; + chains_vipMultiCamEncodeAdasDualDisplayAppObj *pObj + = (chains_vipMultiCamEncodeAdasDualDisplayAppObj*)appObj; + DisplayCtrlLink_ConfigParams *pPrm = &pObj->dctrlCfgPrms; + DisplayCtrlLink_VencInfo *pVInfo; + DisplayCtrlLink_OvlyParams *pOvlyPrms; + DisplayCtrlLink_OvlyPipeParams *pPipeOvlyPrms; + DisplayCtrlLink_OvlyParams ovlyPrms[2]; + + /* Set the link id */ + pObj->displayCtrlLinkId = SYSTEM_LINK_ID_DISPLAYCTRL; + + /* Number of valid entries in vencInfo array */ + pPrm->numVencs = 2; + /* Bitmask of tied vencs. Two vencs, which uses same pixel clock and whose vsync are synchronized, can be tied together. */ + pPrm->tiedVencs = 0; + /* Activate the HDMI BSP layer in the Dctrl link. This is not required if there is no HDMI display in use. */ + pPrm->deviceId = DISPLAYCTRL_LINK_USE_LCD; + + /* Configure LCD */ + pVInfo = &pPrm->vencInfo[0]; + pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD1; + //pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_BT1120_EMBSYNC; + pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_YUV422I_YUYV; + pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_16BIT; + pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; + + pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI1_OUTPUT; + pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; + pVInfo->mInfo.width = 1280; + pVInfo->mInfo.height = 720; + pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; + //pVInfo->mInfo.pixelClock = 74250U; + pVInfo->mInfo.pixelClock = 28125U;/* 28.125Mhz */ + //pVInfo->mInfo.pixelClock = 26250U;/* 26.25Mhz */ + pVInfo->mInfo.fps = 25U; + pVInfo->mInfo.hFrontPorch = 111u; + pVInfo->mInfo.hBackPorch = 111u; + pVInfo->mInfo.hSyncLen = 212u;/**/ + pVInfo->mInfo.vFrontPorch = 14u; + pVInfo->mInfo.vBackPorch = 14u; + pVInfo->mInfo.vSyncLen = 3u; + pVInfo->vencDivisorInfo.divisorLCD = 1; + pVInfo->vencDivisorInfo.divisorPCD = 1; + pVInfo->mode = 0; + pVInfo->isInputPipeConnected[0] = TRUE; + pVInfo->isInputPipeConnected[1] = FALSE; + pVInfo->isInputPipeConnected[2] = FALSE; + pVInfo->isInputPipeConnected[3] = FALSE; + pVInfo->writeBackEnabledFlag = FALSE; + + + /* Configure LCD overlay params */ + pOvlyPrms = &ovlyPrms[0]; + pOvlyPrms->vencId = pVInfo->vencId; + pOvlyPrms->deltaLinesPerPanel = 0; + pOvlyPrms->alphaBlenderEnable = 0; + pOvlyPrms->backGroundColor = 0x10; + pOvlyPrms->colorKeyEnable = 1; + pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; + pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; + pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; + + /* Setting LCD overlay pipe parameters */ + pPipeOvlyPrms = &pObj->pipeParams[0]; + pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_VID1; + pPipeOvlyPrms->globalAlpha = 0xFF; + pPipeOvlyPrms->preMultiplyAlpha = 0; + pPipeOvlyPrms->zorderEnable = TRUE; + pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER0; + + + + /* Configure LCD2 */ + pVInfo = &pPrm->vencInfo[1]; + pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_LCD2; + //pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_BT1120_EMBSYNC; + pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_YUV422I_YUYV; + pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_16BIT; + pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; + + pVInfo->outputPort = SYSTEM_DCTRL_DSS_DPI2_OUTPUT; + pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; + pVInfo->mInfo.width = 1280; + pVInfo->mInfo.height = 720; + pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; + //pVInfo->mInfo.pixelClock = 74250U; + pVInfo->mInfo.pixelClock = 28125U;/* 28.125Mhz */ + //pVInfo->mInfo.pixelClock = 26250U;/* 26.25Mhz */ + pVInfo->mInfo.fps = 25U; + pVInfo->mInfo.hFrontPorch = 111u; + pVInfo->mInfo.hBackPorch = 111u; + pVInfo->mInfo.hSyncLen = 212u;/**/ + pVInfo->mInfo.vFrontPorch = 14u; + pVInfo->mInfo.vBackPorch = 14u; + pVInfo->mInfo.vSyncLen = 3u; + pVInfo->vencDivisorInfo.divisorLCD = 1; + pVInfo->vencDivisorInfo.divisorPCD = 1; + pVInfo->mode = 0; + pVInfo->isInputPipeConnected[0] = FALSE; + pVInfo->isInputPipeConnected[1] = TRUE; + pVInfo->isInputPipeConnected[2] = FALSE; + pVInfo->isInputPipeConnected[3] = FALSE; + pVInfo->writeBackEnabledFlag = FALSE; + + + /* Configure LCD overlay params */ + pOvlyPrms = &ovlyPrms[1]; + pOvlyPrms->vencId = pVInfo->vencId; + pOvlyPrms->deltaLinesPerPanel = 0; + pOvlyPrms->alphaBlenderEnable = 0; + pOvlyPrms->backGroundColor = 0x10; + pOvlyPrms->colorKeyEnable = 1; + pOvlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; + pOvlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; + pOvlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; + + /* Setting LCD overlay pipe parameters */ + pPipeOvlyPrms = &pObj->pipeParams[1]; + pPipeOvlyPrms->pipeLine = SYSTEM_DSS_DISPC_PIPE_VID2; + pPipeOvlyPrms->globalAlpha = 0xFF; + pPipeOvlyPrms->preMultiplyAlpha = 0; + pPipeOvlyPrms->zorderEnable = TRUE; + pPipeOvlyPrms->zorder = SYSTEM_DSS_DISPC_ZORDER0; + + + + /* Create, configure and start the Display Ctrl link */ + status = System_linkCreate(pObj->displayCtrlLinkId, + NULL, + 0); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + status = System_linkControl(pObj->displayCtrlLinkId, + DISPLAYCTRL_LINK_CMD_SET_CONFIG, + &pObj->dctrlCfgPrms, + sizeof(DisplayCtrlLink_ConfigParams), + TRUE); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + status = System_linkControl(pObj->displayCtrlLinkId, + DISPLAYCTRL_LINK_CMD_SET_OVLY_PARAMS, + &ovlyPrms[0], + sizeof(DisplayCtrlLink_OvlyParams), + TRUE); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + status = System_linkControl(pObj->displayCtrlLinkId, + DISPLAYCTRL_LINK_CMD_SET_OVLY_PARAMS, + &ovlyPrms[1], + sizeof(DisplayCtrlLink_OvlyParams), + TRUE); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + status = System_linkControl(pObj->displayCtrlLinkId, + DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, + &pObj->pipeParams[0], + sizeof(DisplayCtrlLink_OvlyPipeParams), + TRUE); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + status = System_linkControl(pObj->displayCtrlLinkId, + DISPLAYCTRL_LINK_CMD_SET_OVLY_PIPELINE_PARAMS, + &pObj->pipeParams[1], + sizeof(DisplayCtrlLink_OvlyPipeParams), + TRUE); + UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); + + return status; +} + + Then I use "dss_clockdumps.sh" script to dump the clock. I find that the LCD2 clock overlay LCD1, and LCD1 clock is 0Hz. LCD1_LCD2.txt +~ # cd /home/ +/home # sh dss_clockdumps.sh + + +=====================DSS clock script=================== +Dumps internal clocks and muxes of DSS + +CTRL_CORE_DSS_PLL_CONTROL (0x4a002538) = 0x00000286 +video1 PLL : Enabled +video2 PLL : Disabled +HDMI PLL : Disabled +DSI1_A_CLK mux : DPLL Video1 +DSI1_B_CLK mux : DPLL Video1 +DSI1_C_CLK mux : DPLL Video1 + +DSS_CTRL (0x58000040) = 0x00011001 + 2: LCD1 clk switch : DSI1_A_CLK + 3: LCD2 clk switch : DSI1_B_CLK +10: LCD3 clk switch : DSS clk + 1: func clk switch : DSS clk +13: DPI1 output : LCD1 + +DSS_STATUS (0x5800005C) = 0x01409280 + +DSI_CLK_CTRL (0x58004054) = 0x80004001 + +CM_DSS_CLKSTCTRL (0x4A009100) = 0x00061F02 + +CM_DSS_DSS_CLKCTRL (0x4A009120) = 0x00003F02 + +======================================================== +Register dump for DPLL video1 +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58004300 | 0x00000018 | +| 0x58004304 | 0x00002603 | +| 0x58004308 | 0x00000000 | +| 0x5800430C | 0x02AF78FE | +| 0x58004310 | 0x00E06108 | +| 0x58004314 | 0x00000015 | +| 0x58004318 | 0x00000000 | +| 0x5800431C | 0x00000000 | +| 0x58004320 | 0x00000000 | +|----------------------------| +Details for DPLL video1 +PLL status : Locked +M4 hsdiv(1) : inactive +M5 hsdiv(2) : inactive +M6 hsdiv(3) : Active +M7 hsdiv(4) : inactive + +PLL_REGM = 1980 +PLL_REGN = 127 +M4 DIV = 21 +M6 DIV = 21 +M7 DIV = 0 + +Clock calculations (DPLL video1) +sysclk = 20000000 +DCO clk = sysclk * 2 * REGM / (REGN + 1) = 618750000 +M4clk (clkcout1) = DCO clk / (M4 DIV + 1) = 0 +M6clk (clkcout3) = DCO clk / (M6 DIV + 1) = 28125000 +M7clk (clkcout4) = DCO clk / (M7 DIV + 1) = 0 + +======================================================== +Clock O/P of MUXes +DPLL PER H12 Output 192000000 +CM_DIV_H12_DPLL_PER (0x4A00815C) = 0x00000204 + +DSI1_A_CLK : 0 +DSI1_B_CLK : 28125000 +DSI1_C_CLK : 28125000 + +DISPC_DIVISOR (0x58001804) = 0x00010001 + + 2: LCD1 clk : 0 + 3: LCD2 clk : 28125000 +10: LCD3 clk : 192000000 + 1: func clk : 192000000 + +LCD1 logic clk(/ 1 ) : 0 pix clk(/ 1 ) : 0 +LCD2 logic clk(/ 1 ) : 28125000 pix clk(/ 1 ) : 28125000 +LCD3 logic clk(/ 4 ) : 48000000 pix clk(/ 1 ) : 48000000 + +/home # +/home # +/home # +/home # +/home # sh dss_ +dss_clockdumps.sh dss_regdumps.sh +/home # sh dss_regdumps.sh +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58000000 | 0x00000061 | +| 0x58000010 | 0x00000000 | +| 0x58000014 | 0x00000001 | +| 0x58000040 | 0x00011001 | +| 0x5800005C | 0x01409280 | +| 0x4A0A0000 | 0x50060006 | +| 0x4A0A0010 | 0x00000011 | +| 0x4A0A0014 | 0x00000001 | +| 0x4A0A0018 | 0x00000001 | +| 0x58004054 | 0x80004001 | +| 0x58005054 | 0x00000001 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58004300 | 0x00000018 | +| 0x58004304 | 0x00002603 | +| 0x58004308 | 0x00000000 | +| 0x5800430C | 0x02AF78FE | +| 0x58004310 | 0x00E06108 | +| 0x58004314 | 0x00000015 | +| 0x58004318 | 0x00000000 | +| 0x5800431C | 0x00000000 | +| 0x58004320 | 0x00000000 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58040200 | 0x00000000 | +| 0x58040204 | 0x00000000 | +| 0x58040208 | 0x00000000 | +| 0x5804020C | 0x00000000 | +| 0x58040210 | 0x00000000 | +| 0x58040214 | 0x00000000 | +| 0x58040218 | 0x00000000 | +| 0x5804021C | 0x00000000 | +| 0x58040220 | 0x00000000 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58040000 | 0x50031D00 | +| 0x58040004 | 0x00000000 | +| 0x58040008 | 0x00000000 | +| 0x5804000C | 0x00000000 | +| 0x58040010 | 0x00000008 | +| 0x58040014 | 0x00000000 | +| 0x58040018 | 0x00000000 | +| 0x5804001C | 0x00000000 | +| 0x58040020 | 0x00000000 | +| 0x58040024 | 0x00000000 | +| 0x58040028 | 0x00000000 | +| 0x5804002C | 0x00000000 | +| 0x58040030 | 0x00000000 | +| 0x58040034 | 0x00000000 | +| 0x58040038 | 0x00000000 | +| 0x5804003C | 0x00000000 | +| 0x58040040 | 0x00000000 | +| 0x58040044 | 0x00001414 | +| 0x58040048 | 0x00000000 | +| 0x5804004C | 0x00000000 | +| 0x58040050 | 0x00000700 | +| 0x58040054 | 0x00000000 | +| 0x58040058 | 0x00000000 | +| 0x5804005C | 0x00000000 | +| 0x58040060 | 0x00000000 | +| 0x58040064 | 0x00000000 | +| 0x58040068 | 0x00000000 | +| 0x5804006C | 0x00000000 | +| 0x58040070 | 0x00000700 | +| 0x58040074 | 0x00000000 | +| 0x58040078 | 0x00000000 | +| 0x5804007C | 0x00000000 | +| 0x58040080 | 0x01030005 | +| 0x58040084 | 0x000010C0 | +| 0x58040088 | 0x00000010 | +| 0x5804008C | 0x00000000 | +| 0x58040090 | 0x00000000 | +| 0x58040094 | 0x00000000 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001000 | 0x00000051 | +| 0x58001004 | 0x00000000 | +| 0x58001008 | 0x00000000 | +| 0x5800100C | 0x00000000 | +| 0x58001010 | 0x00000001 | +| 0x58001014 | 0x00000001 | +| 0x58001018 | 0x00000000 | +| 0x5800101C | 0x02165662 | +| 0x58001020 | 0x00000000 | +| 0x58001024 | 0x00000000 | +| 0x58001028 | 0x00000000 | +| 0x5800102C | 0x00000000 | +| 0x58001030 | 0x00000000 | +| 0x58001034 | 0x00000000 | +| 0x58001038 | 0x00000000 | +| 0x5800103C | 0x00000000 | +| 0x58001040 | 0x00000129 | +| 0x58001044 | 0x01200C04 | +| 0x58001048 | 0x00000000 | +| 0x5800104C | 0x00000010 | +| 0x58001050 | 0x00000000 | +| 0x58001054 | 0x00000000 | +| 0x58001058 | 0x00000000 | +| 0x5800105C | 0x00000000 | +| 0x58001060 | 0x000002CB | +| 0x58001064 | 0x06E06ED3 | +| 0x58001068 | 0x00E00E02 | +| 0x5800106C | 0x00000000 | +| 0x58001070 | 0x00010001 | +| 0x58001074 | 0xFFFFFFFF | +| 0x58001078 | 0x00000000 | +| 0x5800107C | 0x02CF04FF | +| 0x58001080 | 0x00000000 | +| 0x58001084 | 0x00000000 | +| 0x58001088 | 0x00000000 | +| 0x5800108C | 0x00000000 | +| 0x58001090 | 0x00000000 | +| 0x58001094 | 0x00000000 | +| 0x58001098 | 0x00000000 | +| 0x5800109C | 0x00000000 | +| 0x580010A0 | 0x000000A0 | +| 0x580010A4 | 0x04FF04F8 | +| 0x580010A8 | 0x00000500 | +| 0x580010AC | 0x00000001 | +| 0x580010B0 | 0x00000001 | +| 0x580010B4 | 0x00000000 | +| 0x580010B8 | 0x00000000 | +| 0x580010BC | 0x8994F400 | +| 0x580010C0 | 0x00000000 | +| 0x580010C4 | 0x00000000 | +| 0x580010C8 | 0x02CF04FF | +| 0x580010CC | 0x02200A61 | +| 0x580010D0 | 0x07FF07F8 | +| 0x580010D4 | 0x00000800 | +| 0x580010D8 | 0x00000001 | +| 0x580010DC | 0x00000001 | +| 0x580010E0 | 0x04000400 | +| 0x580010E4 | 0x02CF04FF | +| 0x580010E8 | 0x00000000 | +| 0x580010EC | 0x00000000 | +| 0x580010F0 | 0x00800000 | +| 0x580010F4 | 0x00800000 | +| 0x580010F8 | 0x0E7DF601 | +| 0x580010FC | 0x0E7DF6FE | +| 0x58001100 | 0x2172F102 | +| 0x58001104 | 0x2172F1FA | +| 0x58001108 | 0x3762F001 | +| 0x5800110C | 0x3762F0F6 | +| 0x58001110 | 0xF24E4EF2 | +| 0x58001114 | 0xF24E4E00 | +| 0x58001118 | 0xF06237F6 | +| 0x5800111C | 0xF0623701 | +| 0x58001120 | 0xF17221FA | +| 0x58001124 | 0xF1722102 | +| 0x58001128 | 0xF67D0EFE | +| 0x5800112C | 0xF67D0E01 | +| 0x58001130 | 0x0199012A | +| 0x58001134 | 0x012A0000 | +| 0x58001138 | 0x079C0730 | +| 0x5800113C | 0x0000012A | +| 0x58001140 | 0x00000205 | +| 0x58001144 | 0x00000000 | +| 0x58001148 | 0x00000000 | +| 0x5800114C | 0x897FDC00 | +| 0x58001150 | 0x00000000 | +| 0x58001154 | 0x00000000 | +| 0x58001158 | 0x02CF04FF | +| 0x5800115C | 0x42200A61 | +| 0x58001160 | 0x07FF07F8 | +| 0x58001164 | 0x00000800 | +| 0x58001168 | 0x00000001 | +| 0x5800116C | 0x00000001 | +| 0x58001170 | 0x04000400 | +| 0x58001174 | 0x02CF04FF | +| 0x58001178 | 0x00000000 | +| 0x5800117C | 0x00000000 | +| 0x58001180 | 0x00800000 | +| 0x58001184 | 0x00800000 | +| 0x58001188 | 0x0E7DF601 | +| 0x5800118C | 0x0E7DF6FE | +| 0x58001190 | 0x2172F102 | +| 0x58001194 | 0x2172F1FA | +| 0x58001198 | 0x3762F001 | +| 0x5800119C | 0x3762F0F6 | +| 0x580011A0 | 0xF24E4EF2 | +| 0x580011A4 | 0xF24E4E00 | +| 0x580011A8 | 0xF06237F6 | +| 0x580011AC | 0xF0623701 | +| 0x580011B0 | 0xF17221FA | +| 0x580011B4 | 0xF1722102 | +| 0x580011B8 | 0xF67D0EFE | +| 0x580011BC | 0xF67D0E01 | +| 0x580011C0 | 0x0199012A | +| 0x580011C4 | 0x012A0000 | +| 0x580011C8 | 0x079C0730 | +| 0x580011CC | 0x0000012A | +| 0x580011D0 | 0x00000205 | +| 0x580011D4 | 0x00000000 | +| 0x580011D8 | 0x00000000 | +| 0x580011DC | 0x00000000 | +| 0x580011E0 | 0x00000000 | +| 0x580011E4 | 0x0000FE01 | +| 0x580011E8 | 0x0000FA02 | +| 0x580011EC | 0x0000F601 | +| 0x580011F0 | 0x000000F2 | +| 0x580011F4 | 0x000001F6 | +| 0x580011F8 | 0x000002FA | +| 0x580011FC | 0x000001FE | +| 0x58001200 | 0x00000000 | +| 0x58001204 | 0x0000FE01 | +| 0x58001208 | 0x0000FA02 | +| 0x5800120C | 0x0000F601 | +| 0x58001210 | 0x000000F2 | +| 0x58001214 | 0x000001F6 | +| 0x58001218 | 0x000002FA | +| 0x5800121C | 0x000001FE | +| 0x58001220 | 0x1344B01D | +| 0x58001224 | 0xF51D4883 | +| 0x58001228 | 0x20DC93EB | +| 0x5800122C | 0x00000100 | +| 0x58001230 | 0x00000100 | +| 0x58001234 | 0x00000100 | +| 0x58001238 | 0x00000129 | +| 0x5800123C | 0x00000000 | +| 0x58001240 | 0x00000000 | +| 0x58001244 | 0x00000000 | +| 0x58001248 | 0x00000000 | +| 0x5800124C | 0x00000000 | +| 0x58001250 | 0x00000000 | +| 0x58001254 | 0x00000000 | +| 0x58001258 | 0x00000000 | +| 0x5800125C | 0x00000000 | +| 0x58001260 | 0x00000000 | +| 0x58001264 | 0x00000000 | +| 0x58001268 | 0x00000000 | +| 0x5800126C | 0x00000000 | +| 0x58001270 | 0x00000000 | +| 0x58001274 | 0x00000000 | +| 0x58001278 | 0x00000000 | +| 0x5800127C | 0x00000000 | +| 0x58001280 | 0x00000000 | +| 0x58001284 | 0x00000000 | +| 0x58001288 | 0x00000000 | +| 0x5800128C | 0x00000000 | +| 0x58001290 | 0x00000000 | +| 0x58001294 | 0x00000000 | +| 0x58001298 | 0x00000000 | +| 0x5800129C | 0x00000000 | +| 0x580012A0 | 0x00000000 | +| 0x580012A4 | 0x00000000 | +| 0x580012A8 | 0x00000000 | +| 0x580012AC | 0x00000000 | +| 0x580012B0 | 0x00000000 | +| 0x580012B4 | 0x00000000 | +| 0x580012B8 | 0x00000000 | +| 0x580012BC | 0x00000000 | +| 0x580012C0 | 0x00000000 | +| 0x580012C4 | 0x00000000 | +| 0x580012C8 | 0x00000000 | +| 0x580012CC | 0x00000000 | +| 0x580012D0 | 0x00000000 | +| 0x580012D4 | 0x00000000 | +| 0x580012D8 | 0x00000000 | +| 0x580012DC | 0x00000000 | +| 0x580012E0 | 0x00000000 | +| 0x580012E4 | 0x00000000 | +| 0x580012E8 | 0x00000000 | +| 0x580012EC | 0x00000000 | +| 0x580012F0 | 0x00000000 | +| 0x580012F4 | 0x00000000 | +| 0x580012F8 | 0x00000000 | +| 0x580012FC | 0x00000000 | +| 0x58001300 | 0x00000000 | +| 0x58001304 | 0x00000000 | +| 0x58001308 | 0x00000000 | +| 0x5800130C | 0x00000000 | +| 0x58001310 | 0x00000000 | +| 0x58001314 | 0x00000000 | +| 0x58001318 | 0x00000000 | +| 0x5800131C | 0x00000000 | +| 0x58001320 | 0x00000000 | +| 0x58001324 | 0x00000000 | +| 0x58001328 | 0x00000000 | +| 0x5800132C | 0x00000000 | +| 0x58001330 | 0x00000000 | +| 0x58001334 | 0x00000000 | +| 0x58001338 | 0x00000000 | +| 0x5800133C | 0x00000000 | +| 0x58001340 | 0x00000000 | +| 0x58001344 | 0x00000000 | +| 0x58001348 | 0x00000000 | +| 0x5800134C | 0x00000000 | +| 0x58001350 | 0x00000000 | +| 0x58001354 | 0x00000000 | +| 0x58001358 | 0x00000000 | +| 0x5800135C | 0x00000000 | +| 0x58001360 | 0x00000000 | +| 0x58001364 | 0x00000000 | +| 0x58001368 | 0x00000000 | +| 0x5800136C | 0x00000000 | +| 0x58001370 | 0x00008400 | +| 0x58001374 | 0x00000000 | +| 0x58001378 | 0x00000000 | +| 0x5800137C | 0x00000000 | +| 0x58001380 | 0x00000000 | +| 0x58001384 | 0x00000000 | +| 0x58001388 | 0x00000800 | +| 0x5800138C | 0x07FF07F8 | +| 0x58001390 | 0x04000400 | +| 0x58001394 | 0x00000000 | +| 0x58001398 | 0x00000001 | +| 0x5800139C | 0x00000000 | +| 0x580013A0 | 0x00000100 | +| 0x580013A4 | 0x00000001 | +| 0x580013A8 | 0x00000000 | +| 0x580013AC | 0x00000010 | +| 0x580013B0 | 0x00000000 | +| 0x580013B4 | 0x20DC93EB | +| 0x580013B8 | 0xF51D4883 | +| 0x580013BC | 0x1344B01D | +| 0x580013C0 | 0x00000000 | +| 0x580013C4 | 0x00000000 | +| 0x580013C8 | 0x00000000 | +| 0x580013CC | 0x02CF04FF | +| 0x580013D0 | 0x00000000 | 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| 0x00008000 | +| 0x58001574 | 0x00000000 | +| 0x58001578 | 0x00000000 | +| 0x5800157C | 0x00000000 | +| 0x58001580 | 0x00000000 | +| 0x58001584 | 0x00000000 | +| 0x58001588 | 0x00000800 | +| 0x5800158C | 0x07FF07F8 | +| 0x58001590 | 0x04000400 | +| 0x58001594 | 0x00000000 | +| 0x58001598 | 0x00000001 | +| 0x5800159C | 0x00000000 | +| 0x580015A0 | 0x00000000 | +| 0x580015A4 | 0x00000001 | +| 0x580015A8 | 0x00000000 | +| 0x580015AC | 0x00000000 | +| 0x580015B0 | 0x00000000 | +| 0x580015B4 | 0x00000000 | +| 0x580015B8 | 0x00000000 | +| 0x580015BC | 0x00000000 | +| 0x580015C0 | 0x00000000 | +| 0x580015C4 | 0x00000000 | +| 0x580015C8 | 0x00000000 | +| 0x580015CC | 0x00000000 | +| 0x580015D0 | 0x00000000 | +| 0x580015D4 | 0x00000000 | +| 0x580015D8 | 0x00000000 | +| 0x580015DC | 0x00000000 | +| 0x580015E0 | 0x00000000 | +| 0x580015E4 | 0x00000000 | +| 0x580015E8 | 0x00000000 | +| 0x580015EC | 0x00000000 | +| 0x580015F0 | 0x00000000 | +| 0x580015F4 | 0x00000000 | +| 0x580015F8 | 0x00000000 | +| 0x580015FC | 0x00000000 | +| 0x58001600 | 0x89A30400 | +| 0x58001604 | 0x00000000 | +| 0x58001608 | 0x898DEC00 | +| 0x5800160C | 0x00000000 | +| 0x58001610 | 0x00000000 | +| 0x58001614 | 0x00000000 | +| 0x58001618 | 0x00000000 | +| 0x5800161C | 0x00000000 | +| 0x58001620 | 0x01200C00 | + | 0x00000100 | +| 0x58001628 | 0x00000100 | +| 0x5800162C | 0x00000000 | +| 0x58001630 | 0x00000000 | +| 0x58001634 | 0x00000000 | +| 0x58001638 | 0x00000000 | +| 0x5800163C | 0x02000200 | +| 0x58001640 | 0x00000000 | +| 0x58001644 | 0x00000000 | +| 0x58001648 | 0x00800000 | +| 0x5800164C | 0x00800000 | +| 0x58001650 | 0x0E7DF601 | +| 0x58001654 | 0x0E7DF6FE | +| 0x58001658 | 0x2172F102 | +| 0x5800165C | 0x2172F1FA | +| 0x58001660 | 0x3762F001 | +| 0x58001664 | 0x3762F0F6 | +| 0x58001668 | 0xF24E4EF2 | +| 0x5800166C | 0xF24E4E00 | +| 0x58001670 | 0xF06237F6 | +| 0x58001674 | 0xF0623701 | +| 0x58001678 | 0xF17221FA | +| 0x5800167C | 0xF1722102 | +| 0x58001680 | 0xF67D0EFE | +| 0x58001684 | 0xF67D0E01 | +| 0x58001688 | 0x00000000 | +| 0x5800168C | 0x0000FE01 | +| 0x58001690 | 0x0000FA02 | +| 0x58001694 | 0x0000F601 | +| 0x58001698 | 0x000000F2 | +| 0x5800169C | 0x000001F6 | +| 0x580016A0 | 0x000002FA | +| 0x580016A4 | 0x000001FE | +| 0x580016A8 | 0x02000200 | +| 0x580016AC | 0x00000000 | +| 0x580016B0 | 0x00000000 | +| 0x580016B4 | 0x00800000 | +| 0x580016B8 | 0x00800000 | +| 0x580016BC | 0x0E7DF601 | +| 0x580016C0 | 0x0E7DF6FE | +| 0x580016C4 | 0x2172F102 | +| 0x580016C8 | 0x2172F1FA | +| 0x580016CC | 0x3762F001 | +| 0x580016D0 | 0x3762F0F6 | +| 0x580016D4 | 0xF24E4EF2 | +| 0x580016D8 | 0xF24E4E00 | +| 0x580016DC | 0xF06237F6 | +| 0x580016E0 | 0xF0623701 | +| 0x580016E4 | 0xF17221FA | +| 0x580016E8 | 0xF1722102 | +| 0x580016EC | 0xF67D0EFE | +| 0x580016F0 | 0xF67D0E01 | +| 0x580016F4 | 0x00000000 | +| 0x580016F8 | 0x0000FE01 | +| 0x580016FC | 0x0000FA02 | +| 0x58001700 | 0x0000F601 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001700 | 0x0000F601 | +| 0x58001704 | 0x000000F2 | +| 0x58001708 | 0x000001F6 | +| 0x5800170C | 0x000002FA | +| 0x58001710 | 0x000001FE | +| 0x58001714 | 0x00000000 | +| 0x58001718 | 0x00000000 | +| 0x5800171C | 0x00000000 | +| 0x58001720 | 0x00000000 | +| 0x58001724 | 0x04000400 | +| 0x58001728 | 0x00000000 | +| 0x5800172C | 0x00000000 | +| 0x58001730 | 0x00000000 | +| 0x58001734 | 0x00000000 | +| 0x58001738 | 0x00000000 | +| 0x5800173C | 0x00000000 | +| 0x58001740 | 0x00000000 | +| 0x58001744 | 0x00000000 | +| 0x58001748 | 0x00000000 | +| 0x5800174C | 0x00000000 | +| 0x58001750 | 0x00000000 | +| 0x58001754 | 0x00000000 | +| 0x58001758 | 0x00000000 | +| 0x5800175C | 0x00000000 | +| 0x58001760 | 0x00000000 | +| 0x58001764 | 0x00000000 | +| 0x58001768 | 0x00000000 | +| 0x5800176C | 0x00000000 | +| 0x58001770 | 0x00000000 | +| 0x58001774 | 0x00000000 | +| 0x58001778 | 0x00000000 | +| 0x5800177C | 0x00000000 | +| 0x58001780 | 0x00000000 | +| 0x58001784 | 0x00000000 | +| 0x58001788 | 0x00000000 | +| 0x5800178C | 0x00000000 | +| 0x58001790 | 0x04000400 | +| 0x58001794 | 0x00000000 | +| 0x58001798 | 0x00000000 | +| 0x5800179C | 0x00000000 | +| 0x580017A0 | 0x00000000 | +| 0x580017A4 | 0x00000000 | +| 0x580017A8 | 0x00000000 | +| 0x580017AC | 0x00000000 | +| 0x580017B0 | 0x00000000 | +| 0x580017B4 | 0x00000000 | +| 0x580017B8 | 0x00000000 | +| 0x580017BC | 0x00000000 | +| 0x580017C0 | 0x00000000 | +| 0x580017C4 | 0x00000000 | +| 0x580017C8 | 0x00000000 | +| 0x580017CC | 0x00000000 | +| 0x580017D0 | 0x00000000 | +| 0x580017D4 | 0x00000000 | +| 0x580017D8 | 0x00000000 | +| 0x580017DC | 0x00000000 | +| 0x580017E0 | 0x00000000 | +| 0x580017E4 | 0x00000000 | +| 0x580017E8 | 0x00000000 | +| 0x580017EC | 0x00000000 | +| 0x580017F0 | 0x00000000 | +| 0x580017F4 | 0x00000000 | +| 0x580017F8 | 0x00000000 | +| 0x580017FC | 0x00000000 | +| 0x58001800 | 0x246D2240 | +|----------------------------| +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001800 | 0x246D2240 | +| 0x58001804 | 0x00010001 | +| 0x58001808 | 0x00000000 | +| 0x5800180C | 0x00000000 | +| 0x58001810 | 0x00000000 | +| 0x58001814 | 0x00000000 | +| 0x58001818 | 0x00000000 | +| 0x5800181C | 0x00000000 | +| 0x58001820 | 0x00000000 | +| 0x58001824 | 0x00000000 | +| 0x58001828 | 0x00000000 | +| 0x5800182C | 0x00000000 | +| 0x58001830 | 0x00000000 | +| 0x58001834 | 0x00000000 | +| 0x58001838 | 0x00040001 | +| 0x5800183C | 0x00000000 | +| 0x58001840 | 0x00000000 | +| 0x58001844 | 0x00000000 | +| 0x58001848 | 0x00000300 | +| 0x5800184C | 0x00000000 | +| 0x58001850 | 0x00000000 | +| 0x58001854 | 0x00000000 | +| 0x58001858 | 0x00000001 | +| 0x5800185C | 0x00000005 | +| 0x58001860 | 0x00000000 | +| 0x58001864 | 0x00000000 | +| 0x58001868 | 0x00000000 | +| 0x5800186C | 0x00000000 | +| 0x58001870 | 0x00000000 | +|----------------------------| +/home # Is there any problem with my configuration? Please help me to check it. Best Regards Jaye + +Responses: +Hi, Which version of software are you using? There was an issue with enabling the dual LCD output. which was fixed in the vsdk 3.3 release. Can you try using the latest vsdk release? Regards, Prasad + +Hi, Prasad I'm sorry to reply you so late. We use vsdk2.9 and vsdk3.2. Can I transplant the corresponding patch from vsdk3.3 directly? Regards, Jaye + +Hi Jaye, The patches for the Bug fixes are listed in below link. processors.wiki.ti.com/.../PDK_Patches Please check the bug PDK-2134, You can apply the changes. Regards, prasad + diff --git a/data2/text/range/30001+/710354.txt b/data2/text/range/30001+/710354.txt new file mode 100644 index 0000000000000000000000000000000000000000..eaad80f56469e6be448dcd9978f375787ddaf274 --- /dev/null +++ b/data2/text/range/30001+/710354.txt @@ -0,0 +1,865 @@ +Ticket Name: TDA2: Compatible of OV10635 module with the latest demo + +Query Text: +Part Number: TDA2 Dear TI I would like to check with you is notice it since like the code is running on OV10640 sensor but i purchase the module which is OV10635. Rightfully is it able to work? + +Responses: +Hi Willson, you can use OV10635 - see VisionSDK_ReleaseNotes.pdf. Also please check VisionSDK_UserGuide_TDA2xx.pdf - there are some video capture pins that needs to be configured on the EVM. Regards, Yordan + +Dear Yordan Not sure ya i try running the 1CH VIP capture + Display option there is no video streaming with OV10635 not sure is it faulty or what + +Hi Willson, can you show the console log when you try the usecase? Regards, Yordan + +Dear Yordan Not sure what console log you are refer. I guess guess should be this. Note: i am running the single camera 1641.capture.txt [IPU1-0] 358.176965 s: +[IPU1-0] 358.177026 s: CPU [IPU1-0 ] Statistics, +[IPU1-0] 358.177087 s: ************************* +[IPU1-0] 358.177148 s: +[IPU1-0] 358.177209 s: LOAD: CPU: 13.2% HWI: 0.8%, SWI:0.4%, Low Power: 84.0% +[IPU1-0] 358.177362 s: +[IPU1-0] 358.177484 s: LOAD: TSK: GrpxSrc0 : 8.1% +[IPU1-0] 358.177575 s: LOAD: TSK: STAT_COLL : 2.7% +[IPU1-0] 358.177667 s: LOAD: TSK: MISC : 1.2% +[IPU1-0] 358.177758 s: +[IPU1-0] 358.177789 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.177880 s: +[IPU1-0] 358.177941 s: SYSTEM: Sempahores Objects, 151 of 1024 free +[IPU1-0] 358.178216 s: SYSTEM: Task Objects , 17 of 100 free +[IPU1-0] 358.178307 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 358.178399 s: SYSTEM: Hwi Objects , 89 of 100 free +[IPU1-0] 358.178460 s: +[IPU1-0] 358.178521 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 246768 B (240 KB) +[IPU1-0] 358.178673 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 358.178826 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 360290304 B (343 MB) +[IPU1-0] 358.179009 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 358.179192 s: +[IPU1-0] 358.179222 s: +[IPU1-0] 358.179253 s: CPU [IPU1-1 ] Statistics, +[IPU1-0] 358.179314 s: ************************* +[IPU1-0] 358.179375 s: +[IPU1-0] 358.179436 s: LOAD: CPU: 1.1% HWI: 0.6%, SWI:0.3%, Low Power: 83.9% +[IPU1-0] 358.179558 s: +[IPU1-0] 358.179680 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 358.179741 s: +[IPU1-0] 358.179802 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.179863 s: +[IPU1-0] 358.179924 s: SYSTEM: Sempahores Objects, 411 of 1024 free +[IPU1-0] 358.180015 s: SYSTEM: Task Objects , 38 of 100 free +[IPU1-0] 358.180107 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.180198 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.180290 s: +[IPU1-0] 358.180320 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643328 B (628 KB) +[IPU1-0] 358.180473 s: +[IPU1-0] 358.180534 s: +[IPU1-0] 358.180564 s: CPU [HOST ] Statistics, +[IPU1-0] 358.180625 s: ************************* +[IPU1-0] 358.180686 s: +[IPU1-0] 358.180747 s: LOAD: CPU: 1.5% HWI: 0.1%, SWI:0.0%, Low Power: 97.3% +[IPU1-0] 358.180869 s: +[IPU1-0] 358.180991 s: LOAD: TSK: MISC : 1.4% +[IPU1-0] 358.181083 s: +[IPU1-0] 358.181113 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.181205 s: +[IPU1-0] 358.181235 s: SYSTEM: Sempahores Objects, 412 of 1024 free +[IPU1-0] 358.181327 s: SYSTEM: Task Objects , 38 of 100 free +[IPU1-0] 358.181418 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.181510 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.181601 s: +[IPU1-0] 358.181632 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6246648 B (6100 KB) +[IPU1-0] 358.181784 s: +[IPU1-0] 358.181845 s: +[IPU1-0] 358.181876 s: CPU [DSP1 ] Statistics, +[IPU1-0] 358.181937 s: ************************* +[IPU1-0] 358.181998 s: +[IPU1-0] 358.182059 s: LOAD: CPU: 0.3% HWI: 0.1%, SWI:0.0%, Low Power: 99.0% +[IPU1-0] 358.182181 s: +[IPU1-0] 358.182242 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 358.182333 s: +[IPU1-0] 358.182364 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.182455 s: +[IPU1-0] 358.182486 s: SYSTEM: Sempahores Objects, 425 of 1024 free +[IPU1-0] 358.182577 s: SYSTEM: Task Objects , 91 of 100 free +[IPU1-0] 358.182669 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.182760 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 358.182821 s: +[IPU1-0] 358.182882 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 358.183218 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514544 B (502 KB) +[IPU1-0] 358.183370 s: +[IPU1-0] 358.183431 s: +[IPU1-0] 358.183462 s: CPU [DSP2 ] Statistics, +[IPU1-0] 358.183523 s: ************************* +[IPU1-0] 358.183584 s: +[IPU1-0] 358.183614 s: LOAD: CPU: 0.3% HWI: 0.1%, SWI:0.0%, Low Power: 99.0% +[IPU1-0] 358.183767 s: +[IPU1-0] 358.183797 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 358.183889 s: +[IPU1-0] 358.183919 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.184041 s: +[IPU1-0] 358.184102 s: SYSTEM: Sempahores Objects, 425 of 1024 free +[IPU1-0] 358.184194 s: SYSTEM: Task Objects , 91 of 100 free +[IPU1-0] 358.184285 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.184346 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 358.184438 s: +[IPU1-0] 358.184468 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 358.184651 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514544 B (502 KB) +[IPU1-0] 358.184804 s: +[IPU1-0] 358.184834 s: +[IPU1-0] 358.184865 s: CPU [EVE1 ] Statistics, +[IPU1-0] 358.184926 s: ************************* +[IPU1-0] 358.185017 s: +[IPU1-0] 358.185078 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.3% +[IPU1-0] 358.185201 s: +[IPU1-0] 358.185262 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 358.185384 s: +[IPU1-0] 358.185445 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.185506 s: +[IPU1-0] 358.185567 s: SYSTEM: Sempahores Objects, 426 of 1024 free +[IPU1-0] 358.185628 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 358.185719 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.185811 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.185902 s: +[IPU1-0] 358.185933 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 358.186116 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252392 B (246 KB) +[IPU1-0] 358.186268 s: +[IPU1-0] 358.186329 s: +[IPU1-0] 358.186360 s: CPU [EVE2 ] Statistics, +[IPU1-0] 358.186421 s: ************************* +[IPU1-0] 358.186482 s: +[IPU1-0] 358.186512 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.3% +[IPU1-0] 358.186665 s: +[IPU1-0] 358.186726 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 358.186787 s: +[IPU1-0] 358.186848 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.186909 s: +[IPU1-0] 358.186970 s: SYSTEM: Sempahores Objects, 426 of 1024 free +[IPU1-0] 358.187061 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 358.187153 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.187244 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.187336 s: +[IPU1-0] 358.187366 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 358.187519 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252392 B (246 KB) +[IPU1-0] 358.187671 s: +[IPU1-0] 358.187732 s: +[IPU1-0] 358.187763 s: CPU [EVE3 ] Statistics, +[IPU1-0] 358.187824 s: ************************* +[IPU1-0] 358.187885 s: +[IPU1-0] 358.187915 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.3% +[IPU1-0] 358.188251 s: +[IPU1-0] 358.188312 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 358.188373 s: +[IPU1-0] 358.188434 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.188495 s: +[IPU1-0] 358.188556 s: SYSTEM: Sempahores Objects, 426 of 1024 free +[IPU1-0] 358.188647 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 358.188708 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.188800 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.188891 s: +[IPU1-0] 358.188922 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 358.189105 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252392 B (246 KB) +[IPU1-0] 358.189288 s: +[IPU1-0] 358.189318 s: +[IPU1-0] 358.189349 s: CPU [EVE4 ] Statistics, +[IPU1-0] 358.189410 s: ************************* +[IPU1-0] 358.189471 s: +[IPU1-0] 358.189532 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.4% +[IPU1-0] 358.189654 s: +[IPU1-0] 358.189715 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 358.189806 s: +[IPU1-0] 358.189837 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.189928 s: +[IPU1-0] 358.189989 s: SYSTEM: Sempahores Objects, 426 of 1024 free +[IPU1-0] 358.190081 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 358.190172 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.190233 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.190325 s: +[IPU1-0] 358.190386 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 358.190538 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252392 B (246 KB) +[IPU1-0] 358.190691 s: +[IPU1-0] 358.190721 s: +[IPU1-0] 358.190782 s: CPU [IPU2 ] Statistics, +[IPU1-0] 358.190843 s: ************************* +[IPU1-0] 358.190904 s: +[IPU1-0] 358.190935 s: LOAD: CPU: 0.9% HWI: 0.5%, SWI:0.3%, Low Power: 96.3% +[IPU1-0] 358.191087 s: +[IPU1-0] 358.191209 s: LOAD: TSK: MISC : 0.1% +[IPU1-0] 358.191301 s: +[IPU1-0] 358.191331 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 358.191423 s: +[IPU1-0] 358.191453 s: SYSTEM: Sempahores Objects, 416 of 1024 free +[IPU1-0] 358.191545 s: SYSTEM: Task Objects , 39 of 100 free +[IPU1-0] 358.191636 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 358.191728 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 358.191789 s: +[IPU1-0] 358.191850 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) +[IPU1-0] 358.192002 s: +[IPU1-0] 358.192338 s: +[IPU1-0] 358.192399 s: UTILS_PRCM_STATS: Current Temperature, +[IPU1-0] 358.192460 s: +[IPU1-0] 358.192490 s: Voltage Rail || Curr Temp Min - Max +[IPU1-0] 358.192582 s: --------------------------------------------------------- +[IPU1-0] 358.192673 s: PMHAL_PRCM_VD_MPU || [68. 0 , 68.400] +[IPU1-0] 358.192765 s: PMHAL_PRCM_VD_CORE || [69.600 , 70. 0] +[IPU1-0] 358.192856 s: PMHAL_PRCM_VD_IVAHD || [67.600 , 68. 0] +[IPU1-0] 358.193161 s: PMHAL_PRCM_VD_DSPEVE || [67.600 , 68. 0] +[IPU1-0] 358.193314 s: PMHAL_PRCM_VD_GPU || [70.400 , 70.800] +[IPU1-0] 358.193405 s: +[IPU1-0] 358.193436 s: ============================================================================ +[IPU1-0] 358.193527 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) +[IPU1-0] 358.193619 s: ---------------------------------------------------------------------------- +[IPU1-0] 358.198956 s: UTILS_PRCM_STATS: Reading the regulator data failed +[IPU1-0] 358.199048 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! +[IPU1-0] 358.199383 s: +[IPU1-0] 358.199414 s: Statistics Collector, +[IPU1-0] 358.199475 s: +[IPU1-0] 358.199505 s: STATISTIC Avg Data Peak Data +[IPU1-0] 358.199597 s: COLLECTOR MB/s MB/s +[IPU1-0] 358.199658 s: -------------------------------------------------- +[IPU1-0] 358.199749 s: SCI_EMIF1 RD+WR | 287.681025 511.655602 +[IPU1-0] 358.199871 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 +[IPU1-0] 358.199993 s: SCI_EMIF1 RD ONLY | 271.523375 426.183866 +[IPU1-0] 358.200115 s: SCI_EMIF1 WR ONLY | 16.234569 85.729229 +[IPU1-0] 358.200207 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 +[IPU1-0] 358.200329 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 +[IPU1-0] 358.200420 s: SCI_MA_MPU_P1 | 0.023539 2.152855 +[IPU1-0] 358.200512 s: SCI_MA_MPU_P2 | 0.000000 0.000000 +[IPU1-0] 358.200634 s: SCI_DSS | 248.364367 260.454636 +[IPU1-0] 358.200725 s: SCI_IPU1 | 4.622774 35.080468 +[IPU1-0] 358.200847 s: SCI_VIP1_P1 | 0.000000 0.000000 +[IPU1-0] 358.200969 s: SCI_VIP1_P2 | 0.000000 0.000000 +[IPU1-0] 358.201061 s: SCI_VPE_P1 | 0.000000 0.000000 +[IPU1-0] 358.201183 s: SCI_VPE_P2 | 0.000000 0.000000 +[IPU1-0] 358.201274 s: SCI_DSP1_MDMA | 0.108764 11.834691 +[IPU1-0] 358.201366 s: SCI_DSP1_EDMA | 0.000000 0.000000 +[IPU1-0] 358.201488 s: SCI_DSP2_MDMA | 0.108751 11.831512 +[IPU1-0] 358.201579 s: SCI_DSP2_EDMA | 0.000000 0.000000 +[IPU1-0] 358.201671 s: SCI_EVE1_TC0 | 2.401219 15.607391 +[IPU1-0] 358.201793 s: SCI_EVE1_TC1 | 0.000000 0.000000 +[IPU1-0] 358.201884 s: SCI_EVE2_TC0 | 2.413161 18.273184 +[IPU1-0] 358.202098 s: SCI_EVE2_TC1 | 0.000000 0.000000 +[IPU1-0] 358.202189 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 +[IPU1-0] 358.202281 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 +[IPU1-0] 358.202372 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 +[IPU1-0] 358.202494 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 +[IPU1-0] 358.202586 s: SCI_VIP2_P1 | 0.000000 0.000000 +[IPU1-0] 358.202677 s: SCI_VIP2_P2 | 0.000000 0.000000 +[IPU1-0] 358.202769 s: SCI_VIP3_P1 | 0.000000 0.000000 +[IPU1-0] 358.202891 s: SCI_VIP3_P2 | 0.000000 0.000000 +[IPU1-0] 358.203196 s: SCI_EVE3_TC0 | 2.416630 18.327901 +[IPU1-0] 358.203287 s: SCI_EVE3_TC1 | 0.000000 0.000000 +[IPU1-0] 358.203409 s: SCI_EVE4_TC0 | 2.390452 22.117079 +[IPU1-0] 358.203501 s: SCI_EVE4_TC1 | 0.000000 0.000000 +[IPU1-0] 358.203653 s: SCI_IVA | 0.000000 0.000000 +[IPU1-0] 358.203776 s: SCI_GPU_P1 | 0.000000 0.000000 +[IPU1-0] 358.203867 s: SCI_GPU_P2 | 0.000000 0.000000 +[IPU1-0] 358.203989 s: SCI_GMAC_SW | 0.000000 0.000000 +[IPU1-0] 358.204111 s: SCI_OCMC_RAM1 | 0.000000 0.000000 +[IPU1-0] 358.204203 s: SCI_OCMC_RAM2 | 0.000000 0.000000 +[IPU1-0] 358.204294 s: SCI_OCMC_RAM3 | 0.000000 0.000000 +[IPU1-0] 358.303971 s: +[IPU1-0] 358.304062 s: +[IPU1-0] 358.304154 s: +[IPU1-0] 358.304215 s: ### CPU [IPU1-0], LinkID [ 68], +[IPU1-0] 358.304276 s: +[IPU1-0] 358.304306 s: [ CAPTURE ] Link Statistics, +[IPU1-0] 358.304367 s: ****************************** +[IPU1-0] 358.304428 s: +[IPU1-0] 358.304489 s: Elapsed time = 338159 msec +[IPU1-0] 358.304550 s: +[IPU1-0] 358.304581 s: +[IPU1-0] 358.304642 s: Input Statistics, +[IPU1-0] 358.304672 s: +[IPU1-0] 358.304733 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 358.304794 s: | FPS | FPS | FPS | FPS +[IPU1-0] 358.304886 s: -------------------------------------------------- +[IPU1-0] 358.304977 s: +[IPU1-0] 358.305038 s: Output Statistics, +[IPU1-0] 358.305069 s: +[IPU1-0] 358.305130 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 358.305191 s: | ID | FPS | FPS | FPS +[IPU1-0] 358.305282 s: --------------------------------------------- +[IPU1-0] 358.305343 s: +[IPU1-0] 358.305404 s: [ CAPTURE ] LATENCY, +[IPU1-0] 358.305435 s: ******************** +[IPU1-0] 358.305496 s: +[IPU1-0] 358.305618 s: +[IPU1-0] 358.305648 s: ### CPU [IPU1-0], LinkID [ 71], +[IPU1-0] 358.305709 s: +[IPU1-0] 358.305770 s: [ DISPLAY ] Link Statistics, +[IPU1-0] 358.305831 s: ****************************** +[IPU1-0] 358.305892 s: +[IPU1-0] 358.305923 s: Elapsed time = 338159 msec +[IPU1-0] 358.306014 s: +[IPU1-0] 358.306045 s: +[IPU1-0] 358.306075 s: Input Statistics, +[IPU1-0] 358.306136 s: +[IPU1-0] 358.306167 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 358.306258 s: | FPS | FPS | FPS | FPS +[IPU1-0] 358.306319 s: -------------------------------------------------- +[IPU1-0] 358.306411 s: +[IPU1-0] 358.306441 s: Output Statistics, +[IPU1-0] 358.306502 s: +[IPU1-0] 358.306533 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 358.306624 s: | ID | FPS | FPS | FPS +[IPU1-0] 358.306685 s: --------------------------------------------- +[IPU1-0] 358.306777 s: +[IPU1-0] 358.306807 s: [ DISPLAY ] LATENCY, +[IPU1-0] 358.306868 s: ******************** +[IPU1-0] 358.306929 s: +[IPU1-0] 358.306960 s: Display UnderFlow Count = 0 +[IPU1-0] 358.307051 s: +[IPU1-0] 358.307082 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! +[IPU1-0] 358.307234 s: +[IPU1-0] 358.307295 s: ### CPU [IPU1-0], LinkID [ 72], +[IPU1-0] 358.307356 s: +[IPU1-0] 358.307387 s: [ DISPLAY ] Link Statistics, +[IPU1-0] 358.307478 s: ****************************** +[IPU1-0] 358.307570 s: +[IPU1-0] 358.307631 s: Elapsed time = 336340 msec +[IPU1-0] 358.307692 s: +[IPU1-0] 358.307722 s: Driver/Notify Cb = 60.3 fps +[IPU1-0] 358.307814 s: +[IPU1-0] 358.307844 s: Input Statistics, +[IPU1-0] 358.307905 s: +[IPU1-0] 358.307936 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 358.308210 s: | FPS | FPS | FPS | FPS +[IPU1-0] 358.308302 s: -------------------------------------------------- +[IPU1-0] 358.308363 s: 0 | 0. 0 0. 0 0. 0 0. 0 +[IPU1-0] 358.308515 s: +[IPU1-0] 358.308546 s: [ DISPLAY ] LATENCY, +[IPU1-0] 358.308607 s: ******************** +[IPU1-0] 358.308637 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, +[IPU1-0] 358.308759 s: Source to Link Latency : Avg = 117306 us, Min = 117306 us, Max = 117306 us, +[IPU1-0] 358.308881 s: +[IPU1-0] 358.308912 s: Display UnderFlow Count = 0 +[IPU1-0] 358.309003 s: +[IPU1-0] 358.809003 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Chains Run-time Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 0: Stop Chain +[IPU1-0] +[IPU1-0] 2: Pause Capture +[IPU1-0] 3: Resume Capture +[IPU1-0] 4: Demonstrate Task Timer utility +[IPU1-0] +[IPU1-0] p: Print Performance Statistics +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] + +Hi, Can you share your full boot log. Regards, Anuj + +Dear Anuj Sorry i am not sure what you mean by full boot log? Is the display terminal(rs232) log upon power up or there is a file call boot log ? + +Dear Anuj The attach is the capture from the terminal upon start up 3240.capture.txt + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 144395 (12.32 ms) + SOC Init Cycles - 170828 (14.57 ms) + DDR Config Clock Cycles - 43323 (3.69 ms) + App Image Load Cycles - 89583258 (7644.43 ms) + Slave Core Bootup Cycles - 208039 (17.75 ms) + SBL Boot-up Cycles - 90150902 (7692.87 ms) + Time at which SBL started IPU1_0 - 261873 (22.34 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 7.993045 s: ***** IPU1_0 Firmware build time 16:11:25 Jun 13 2018 +[IPU1-0] 7.993228 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 8.756877 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU1-0] 8.757060 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 8.757152 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 8.757274 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 8.757396 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 8.757487 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 8.757609 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-0] 8.757731 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-0] 8.757853 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 8.759653 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 8.759806 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 8.773256 s: UTILS: CIO: Init Done !!! +[IPU1-0] 8.773348 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 8.773439 s: SYSTEM: Notify init done !!! +[IPU1-0] 8.775300 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 8.775391 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 8.779326 s: SYSTEM: Initializing TIOVX ... +[IPU1-0] 8.779509 s: VX_ZONE_INIT:Enabled +[IPU1-0] 8.779631 s: VX_ZONE_ERROR:Enabled +[IPU1-0] 8.779753 s: VX_ZONE_WARNING:Enabled +[IPU1-0] 8.784054 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[IPU1-0] 8.784176 s: SYSTEM: Initializing TIOVX ... Done !!! +[IPU1-0] 8.784267 s: SYSTEM: Initializing TIOVX HOST ... +[IPU1-0] 8.784725 s: VX_ZONE_INIT:[tivxHostInit:22] Initialization Done for HOST !!! +[IPU1-0] 8.784847 s: SYSTEM: Initializing TIOVX HOST ... Done !!! +[IPU1-0] 8.784999 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 8.785091 s: SYSTEM: System Init in progress !!! +[IPU1-0] 8.785152 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 8.785243 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 8.785335 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 8.785487 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 8.785548 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 8.785762 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 8.785884 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 8.786158 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 8.790215 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 8.790367 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 8.790489 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 8.790611 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 8.790703 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 8.790764 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 8.791252 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 8.791374 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 8.791465 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 8.791557 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 8.791648 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 8.791740 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 8.792228 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 8.792350 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 8.792411 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 8.792563 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 8.792685 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 8.792807 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 8.793478 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 8.793600 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 8.793692 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 8.793783 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 8.793875 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 8.793997 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 8.858293 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 8.859299 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 8.859543 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 8.859635 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252288 B (246 KB) +[IPU1-0] 8.859787 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 8.860001 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 368037888 B (350 MB) +[IPU1-0] 8.860214 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 8.860397 s: SYSTEM: Initializing Links !!! +[IPU1-0] 9.130543 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 9.217989 s: BOARD: Board Init in progress !!! +[IPU1-0] 9.218385 s: BOARD: Board Init Done !!! +[IPU1-0] 9.229793 s: +[IPU1-0] 9.229854 s: Vision SDK Version : [REL_VISION_SDK_03_03_00_00] +[IPU1-0] 9.229945 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 9.230037 s: BSP Version : [PDK_01_09_00_xx] +[IPU1-0] 9.230098 s: Platform : [EVM] +[IPU1-0] 9.230159 s: SOC : [TDA2XX] +[IPU1-0] 9.230220 s: SOC Revision : [ES2.0] +[IPU1-0] 9.230281 s: Board Detected : [Vision] +[IPU1-0] 9.236228 s: EEPROM Base Board Name: [5777xCPU-DDR3] +[IPU1-0] 9.236320 s: Base Board Revision : [REV E] +[IPU1-0] 9.237631 s: Daughter Card Revision: [REV D] +[IPU1-0] 9.237692 s: +[IPU1-0] 9.241475 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 8.009516 s: ***** IPU1_1 Firmware build time 16:07:56 Jun 13 2018 +[IPU1-1] 8.009729 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 8.759470 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU1-1] 8.759684 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 8.759836 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 8.759958 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 8.760080 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 8.760202 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 8.760324 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-1] 8.760446 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-1] 8.760538 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 8.762612 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 8.763893 s: UTILS: CIO: Init Done !!! +[IPU1-1] 8.763984 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 8.764076 s: SYSTEM: Notify init done !!! +[IPU1-1] 8.765875 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 8.766028 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 8.769688 s: SYSTEM: Initializing TIOVX ... +[IPU1-1] 8.769901 s: VX_ZONE_INIT:Enabled +[IPU1-1] 8.770084 s: VX_ZONE_ERROR:Enabled +[IPU1-1] 8.770206 s: VX_ZONE_WARNING:Enabled +[IPU1-1] 8.774049 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[IPU1-1] 8.774171 s: SYSTEM: Initializing TIOVX ... Done !!! +[IPU1-1] 8.774232 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 8.774324 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 8.775208 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 8.775452 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 8.775574 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645648 B (630 KB) +[IPU1-1] 8.775727 s: SYSTEM: Initializing Links !!! +[IPU1-1] 8.891661 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 8.894589 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 8.897730 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 8.901146 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 8.904318 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 8.907918 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 8.911303 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 8.914597 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 8.918349 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 8.921673 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 8.925425 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 8.925577 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 8.925638 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 8.074849 s: ***** A15_0 Firmware build time 16:10:05 Jun 13 2018 +[HOST ] 8.074879 s: *** SYSTEM: CPU Frequency , +[HOST ] 8.757945 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[HOST ] 8.757975 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[HOST ] 8.757975 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 8.758006 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 8.758006 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 8.758006 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 8.758036 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 8.758036 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[HOST ] 8.758067 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[HOST ] 8.760294 s: SYSTEM: System Common Init in progress !!! +[HOST ] 8.760324 s: SYSTEM: IPC init in progress !!! +[HOST ] 8.760355 s: SYSTEM: Notify init done !!! +[HOST ] 8.760385 s: SYSTEM: MsgQ init done !!! +[HOST ] 8.760385 s: SYSTEM: IPC init DONE !!! +[HOST ] 8.760965 s: SYSTEM: Initializing TIOVX ... +[HOST ] 8.760995 s: SYSTEM: Initializing TIOVX ... Done !!! +[HOST ] 8.761026 s: SYSTEM: System Common Init Done !!! +[HOST ] 8.761026 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 8.761087 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 8.761087 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[HOST ] 8.761117 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6247480 B (6101 KB) +[HOST ] 8.761148 s: SYSTEM: Initializing Links !!! +[HOST ] 8.763710 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[HOST ] 8.763771 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[HOST ] 8.763862 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[HOST ] 8.763923 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[HOST ] 8.764015 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[HOST ] 8.764106 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[HOST ] 8.764167 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[HOST ] 8.764259 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[HOST ] 8.764350 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[HOST ] 8.764411 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[HOST ] 8.764503 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[HOST ] 8.764503 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 8.764564 s: SYSTEM: System A15 Init Done !!! +[HOST ] 9.058378 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 9.058836 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 8.087232 s: ***** DSP1 Firmware build time 16:03:32 Jun 13 2018 +[DSP1 ] 8.087323 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 8.762124 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP1 ] 8.762215 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP1 ] 8.762246 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 8.762307 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 8.762368 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 8.762429 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 8.762490 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP1 ] 8.762520 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP1 ] 8.762581 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 8.762886 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 8.762947 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 8.763252 s: UTILS: CIO: Init Done !!! +[DSP1 ] 8.763313 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 8.763344 s: SYSTEM: Notify init done !!! +[DSP1 ] 8.763557 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 8.763618 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 8.764472 s: SYSTEM: Initializing TIOVX ... +[DSP1 ] 8.764564 s: VX_ZONE_INIT:Enabled +[DSP1 ] 8.764594 s: VX_ZONE_ERROR:Enabled +[DSP1 ] 8.764655 s: VX_ZONE_WARNING:Enabled +[DSP1 ] 8.765052 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! +[DSP1 ] 8.765509 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[DSP1 ] 8.765540 s: SYSTEM: Initializing TIOVX ... Done !!! +[DSP1 ] 8.765570 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 8.765570 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 8.765875 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 8.765906 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 8.765967 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514744 B (502 KB) +[DSP1 ] 8.766028 s: SYSTEM: Initializing Links !!! +[DSP1 ] 8.776825 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 8.776886 s: lz4CompDecomp Init +[DSP1 ] 8.776916 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 9.144268 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 9.144329 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 8.087201 s: ***** DSP2 Firmware build time 16:05:57 Jun 13 2018 +[DSP2 ] 8.087293 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 8.763527 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP2 ] 8.763618 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP2 ] 8.763679 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 8.763710 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 8.763771 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 8.763832 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 8.763893 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP2 ] 8.763923 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP2 ] 8.763984 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 8.764259 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 8.764320 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 8.764625 s: UTILS: CIO: Init Done !!! +[DSP2 ] 8.764655 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 8.764686 s: SYSTEM: Notify init done !!! +[DSP2 ] 8.764899 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 8.764930 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 8.765723 s: SYSTEM: Initializing TIOVX ... +[DSP2 ] 8.765814 s: VX_ZONE_INIT:Enabled +[DSP2 ] 8.765845 s: VX_ZONE_ERROR:Enabled +[DSP2 ] 8.765906 s: VX_ZONE_WARNING:Enabled +[DSP2 ] 8.766333 s: VX_ZONE_INIT:[tivxReserveC66xL2MEM:361] BAM memory config: IBUF 180224 bytes @ 0x00800000, WBUF 45056 bytes @ 0x0082c000 !!! +[DSP2 ] 8.766760 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[DSP2 ] 8.766790 s: SYSTEM: Initializing TIOVX ... Done !!! +[DSP2 ] 8.766821 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 8.766851 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 8.767126 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 8.767187 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 8.767248 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514744 B (502 KB) +[DSP2 ] 8.767309 s: SYSTEM: Initializing Links !!! +[DSP2 ] 8.778076 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 8.778137 s: lz4CompDecomp Init +[DSP2 ] 8.778137 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 9.146281 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 9.146312 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 8.739797 s: ***** EVE Firmware build time 15:57:37 Jun 13 2018 +[EVE1 ] 8.741780 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 8.767339 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE1 ] 8.768986 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE1 ] 8.770603 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 8.772128 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 8.773622 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 8.775178 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 8.776703 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE1 ] 8.778167 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE1 ] 8.779601 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 8.781827 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 8.784267 s: UTILS: CIO: Init Done !!! +[EVE1 ] 8.785182 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 8.786494 s: SYSTEM: Notify init done !!! +[EVE1 ] 8.788598 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 8.789513 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 8.804184 s: SYSTEM: Initializing TIOVX ... +[EVE1 ] 8.805740 s: VX_ZONE_INIT:Enabled +[EVE1 ] 8.807417 s: VX_ZONE_ERROR:Enabled +[EVE1 ] 8.809034 s: VX_ZONE_WARNING:Enabled +[EVE1 ] 8.813243 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[EVE1 ] 8.814615 s: SYSTEM: Initializing TIOVX ... Done !!! +[EVE1 ] 8.816110 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 8.817544 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 8.819038 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 8.820258 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 8.821570 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 8.824010 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) +[EVE1 ] 8.826267 s: SYSTEM: Initializing Links !!! +[EVE1 ] 8.922253 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 8.923320 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 8.747392 s: ***** EVE Firmware build time 15:59:05 Jun 13 2018 +[EVE2 ] 8.749405 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 8.769657 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE2 ] 8.771304 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE2 ] 8.772829 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 8.774354 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 8.775879 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 8.777374 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 8.778838 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE2 ] 8.780241 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE2 ] 8.781827 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 8.784054 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 8.786829 s: UTILS: CIO: Init Done !!! +[EVE2 ] 8.787836 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 8.788995 s: SYSTEM: Notify init done !!! +[EVE2 ] 8.790825 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 8.791709 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 8.806136 s: SYSTEM: Initializing TIOVX ... +[EVE2 ] 8.807875 s: VX_ZONE_INIT:Enabled +[EVE2 ] 8.809461 s: VX_ZONE_ERROR:Enabled +[EVE2 ] 8.811504 s: VX_ZONE_WARNING:Enabled +[EVE2 ] 8.816781 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[EVE2 ] 8.818001 s: SYSTEM: Initializing TIOVX ... Done !!! +[EVE2 ] 8.819008 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 8.820014 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 8.821539 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 8.822759 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 8.824162 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 8.826511 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) +[EVE2 ] 8.828920 s: SYSTEM: Initializing Links !!! +[EVE2 ] 8.924662 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 8.925669 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 8.742756 s: ***** EVE Firmware build time 16:00:25 Jun 13 2018 +[EVE3 ] 8.744586 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 8.772006 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE3 ] 8.773561 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE3 ] 8.775117 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE3 ] 8.776642 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE3 ] 8.778106 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE3 ] 8.779540 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE3 ] 8.780943 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE3 ] 8.782590 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE3 ] 8.784145 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE3 ] 8.786616 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 8.789208 s: UTILS: CIO: Init Done !!! +[EVE3 ] 8.790154 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 8.791221 s: SYSTEM: Notify init done !!! +[EVE3 ] 8.793295 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 8.794210 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 8.808302 s: SYSTEM: Initializing TIOVX ... +[EVE3 ] 8.809888 s: VX_ZONE_INIT:Enabled +[EVE3 ] 8.811901 s: VX_ZONE_ERROR:Enabled +[EVE3 ] 8.813853 s: VX_ZONE_WARNING:Enabled +[EVE3 ] 8.818642 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[EVE3 ] 8.819770 s: SYSTEM: Initializing TIOVX ... Done !!! +[EVE3 ] 8.820807 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 8.821814 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 8.823400 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 8.824589 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 8.825901 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 8.828524 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) +[EVE3 ] 8.830933 s: SYSTEM: Initializing Links !!! +[EVE3 ] 8.925547 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 8.926676 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 8.749832 s: ***** EVE Firmware build time 16:01:43 Jun 13 2018 +[EVE4 ] 8.751662 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 8.772006 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE4 ] 8.773561 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE4 ] 8.775117 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE4 ] 8.776611 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE4 ] 8.778106 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE4 ] 8.779509 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE4 ] 8.780912 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE4 ] 8.782498 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE4 ] 8.784115 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE4 ] 8.786585 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 8.789056 s: UTILS: CIO: Init Done !!! +[EVE4 ] 8.790001 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 8.791160 s: SYSTEM: Notify init done !!! +[EVE4 ] 8.793204 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 8.794119 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 8.808210 s: SYSTEM: Initializing TIOVX ... +[EVE4 ] 8.809796 s: VX_ZONE_INIT:Enabled +[EVE4 ] 8.811657 s: VX_ZONE_ERROR:Enabled +[EVE4 ] 8.813639 s: VX_ZONE_WARNING:Enabled +[EVE4 ] 8.818489 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! +[EVE4 ] 8.819618 s: SYSTEM: Initializing TIOVX ... Done !!! +[EVE4 ] 8.820624 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 8.821661 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 8.823247 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 8.824467 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 8.825748 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 8.828188 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) +[EVE4 ] 8.830628 s: SYSTEM: Initializing Links !!! +[EVE4 ] 8.925516 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 8.926554 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 7.990880 s: ***** IPU2 Firmware build time 16:14:12 Jun 13 2018 +[IPU2 ] 7.991063 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 8.760782 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU2 ] 8.760965 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU2 ] 8.761087 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 8.761209 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 8.761331 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 8.761453 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 8.761544 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU2 ] 8.761666 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU2 ] 8.761788 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 8.764686 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 8.765845 s: UTILS: CIO: Init Done !!! +[IPU2 ] 8.765997 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 8.766058 s: SYSTEM: Notify init done !!! +[IPU2 ] 8.767888 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 8.768071 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 8.773256 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 8.773378 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 8.774293 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 8.774568 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU2 ] 8.774690 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252424 B (246 KB) +[IPU2 ] 8.774842 s: SYSTEM: Initializing Links !!! +[IPU2 ] 8.886201 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU2 ] 8.889282 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU2 ] 8.892149 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU2 ] 8.895260 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU2 ] 8.898310 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU2 ] 8.901390 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU2 ] 8.904471 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU2 ] 8.907582 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU2 ] 8.910754 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU2 ] 8.914079 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU2 ] 8.917281 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU2 ] 8.917464 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 8.917556 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 10.376746 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines +[IPU1-0] 10.381229 s: QSPI Init Started +[IPU1-0] 10.381504 s: MID - 1 +[IPU1-0] 10.381565 s: DID - 18 +[IPU1-0] 10.381595 s: QSPI Init Completed Sucessfully +[IPU1-0] 10.394772 s: +[IPU1-0] 10.394833 s: Current System Settings, +[IPU1-0] 10.394894 s: ======================== +[IPU1-0] 10.394955 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 10.395046 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[IPU1-0] 10.395138 s: My IP address : 0.0.0.0 +[IPU1-0] 10.395199 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 10.395260 s: +[IPU1-0] 10.395290 s: ============ +[IPU1-0] 10.395351 s: Usecase Menu +[IPU1-0] 10.395382 s: ============ +[IPU1-0] 10.395443 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] c: OPENVX Usecases +[IPU1-0] f: TIDL Usecase +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 13.764259 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 13.764289 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + +Hi, This log is not complete. Here you did not run the usecase. Please run the usecase and after that press p and capture its output also. First make sure you have right switch configuration for your camera. Please check the section 2.3.3 of the below doc vision_sdk\docs\UserGuides\VisionSDK_UserGuide_TDA2xx.pdf Regards, Anuj + +Hi, I hope after checking the pin configuration the issue should be resolved. If yes then please close the thread. Regards, Anuj + +Hi Anuj It board faulty + diff --git a/data2/text/range/30001+/711823.txt b/data2/text/range/30001+/711823.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff886665bd33191a788e83efa6e129d84b05c2bf --- /dev/null +++ b/data2/text/range/30001+/711823.txt @@ -0,0 +1,378 @@ +Ticket Name: Linux/TDA2PXEVM: Error in VSDK compilatiom + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi I am facing issues while compiling the config "tda2px_evm_linux_all". make -s -j depend is successful but make -s -j is giving error 1) Unresolved symbols for the following: IpcMgr_rpmsgStartup /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 NameMap_register /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 NameMap_unregister /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 RPMessage_create /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 RPMessage_delete /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 RPMessage_send /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 ti_ipc_remoteproc_Resource_getVdevStatus__E /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 error: unresolved symbols remain ../../master/ELFLNK/build.c:2612:internal fatal error #10251: ("xdc.meta:MAIN_APP_ipu1_1_pem4.oem4") INTERNAL ERROR: /home/deepika/FFC/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armlnk had an internal inconsistency and aborted I have downloaded and reinstalled ti-cgt-arm_16.9.2.LTS again n the ti_components/linux directory I am attaching the full error. Thanks Deep error_compilation_log.txt Compilation log + + + +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/utils' +making /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios/sysbios.ae66 ... +gmake[1]: Entering directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' +cle66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/BIOS.c ... +# Linking into /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu1_1_release.xem4... +# +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: error: + no valid memory range(null) available for placement of "GROUP_1" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: error: + program will not fit into available memory. run placement with alignment + fails for section "GROUP_1" size 0x1be600 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: error: + no valid memory range(null) available for placement of + ".bss:taskStackSection" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: error: + program will not fit into available memory. run placement with alignment + fails for section ".bss:taskStackSection" size 0x1b6000 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: error: + no valid memory range(null) available for placement of ".text" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: error: + program will not fit into available memory. placement with alignment fails + for section ".text" size 0x36730 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: error: + no valid memory range(null) available for placement of ".data" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: error: + program will not fit into available memory. run placement with alignment + fails for section ".data" size 0x30ef6 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: error: + no valid memory range(null) available for placement of ".const" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: error: + program will not fit into available memory. placement with alignment fails + for section ".const" size 0x8a74 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: error: + no valid memory range(null) available for placement of ".stack" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: error: + program will not fit into available memory. run placement with alignment + fails for section ".stack" size 0x4000 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: error: + no valid memory range(null) available for placement of ".args" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: error: + program will not fit into available memory. placement with alignment fails + for section ".args" size 0x64 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: error: + program will not fit into available memory. run placement with alignment + fails for section ".binit" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 228: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 228: error: + program will not fit into available memory. run placement with alignment + fails for section ".init_array" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 231: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 231: error: + program will not fit into available memory. run placement with alignment + fails for section ".fardata" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 232: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 232: error: + program will not fit into available memory. run placement with alignment + fails for section ".switch" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: error: + program will not fit into available memory. run placement with alignment + fails for section ".sysmem" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: error: + program will not fit into available memory. run placement with alignment + fails for section ".far" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: error: + program will not fit into available memory. run placement with alignment + fails for section ".cio" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: error: + program will not fit into available memory. run placement with alignment + fails for section ".ARM.exidx" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: error: + program will not fit into available memory. run placement with alignment + fails for section ".ARM.extab" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 246: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 246: error: + program will not fit into available memory. run placement with alignment + fails for section ".plt" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 252: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 252: error: + program will not fit into available memory. placement with alignment fails + for section "xdc.meta" size 0x147 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +error: program will not fit into available memory. run placement with + alignment fails for section ".TI.persistent" size 0x0 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... +are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/sysbios' +Build of libraries done. +warning: xdc.cfg.Program: "/home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. +# Configuro done! +# Making tda2px-evm:c66xdsp_2:release:vision_sdk_lib... +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: src/main_common_c6xdsp2.c +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/app_init/app_init_dsp.c +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/main_app/tda2px/dsp2/src/main_c6xdsp2.c +# Compiling generated MAIN_APP_c6xdsp2_pe66.oe66 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: + no valid memory range(null) available for placement of ".cinit" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: + program will not fit into available memory. placement with alignment fails + for section ".cinit" size 0x2091 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... +are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' +warning: xdc.cfg.Program: "/home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. +Build of libraries done. +# Configuro done! +# Making tda2px-evm:c66xdsp_1:release:vision_sdk_lib... +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/app_init/app_init_dsp.c +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/main_app/tda2px/dsp1/src/main_c6xdsp1.c +# Compiling generated MAIN_APP_c6xdsp1_pe66.oe66 +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: src/main_common_c6xdsp1.c + + undefined first referenced + symbol in file + --------- ---------------- + IpcMgr_rpmsgStartup /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + NameMap_register /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + NameMap_unregister /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_create /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_delete /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_send /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + ti_ipc_remoteproc_Resource_getVdevStatus__E /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + +error: unresolved symbols remain +../../master/ELFLNK/build.c:2612:internal fatal error #10251: + ("xdc.meta:MAIN_APP_ipu1_1_pem4.oem4") + +INTERNAL ERROR: /home/deepika/FFC/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armlnk had an internal inconsistency and aborted + +Responses: +Hi Deep, Can you just rung make -s showconfig & share ? Also is there any change in your build config ? Regards Surya + +Hi Suryamani, Regarding the changes,yes I have enabled IPU1_0 and IPU1_1 and disable IPU2 Please find the showconfig: deepika@deepika-OptiPlex-3040:~/FFC/source/vision/platform/ti/tda2/build$ make -s showconfig # # Build Config is [ tda2px_evm_linux_all ] # Build Config file is @ /home/deepika/FFC/source/vision/platform/ti/tda2/configs/tda2px_evm_linux_all/cfg.mk # Build Config .h file is @ /home/deepika/FFC/source/vision/platform/ti/tda2/links_fw/include/config/apps/tda2px_evm_linux_all/system_cfg.h # Build CPUs is @ ipu1_0 ipu1_1 a15_0 dsp1 dsp2 eve1 eve2 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=yes # PROC_IPU1_1_INCLUDE=yes # PROC_IPU2_INCLUDE=no # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=no # PROC_EVE4_INCLUDE=no # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2PX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP HARMAN_TDA2XX_EVM HARMAN_TDA2PX_EVM HARMAN_TDA2PX_PROTO_A ] # PLATFORM=tda2px-evm # DUAL_A15_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=yes # ISS_INCLUDE=yes # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=/home/deepika/FFC/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_INCLUDE=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig # DEFAULT_DTB=dra76-evm-infoadas.dtb # CMEM_INCLUDE=yes # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=yes # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_autocalibration ALG_dmaSwMs ALG_framecopy ALG_sceneobstruction ALG_surroundview ALG_iss_aewb # # Use-cases included in build, # UC_iss_capture_isp_simcop_display UC_srv_calibration UC_lvds_vip_multi_cam_3d_srv UC_csi2Cal_multi_cam_3d_srv UC_csi2Cal_multi_cam_view UC_lvds_vip_multi_cam_view_sgx_display UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display UC_iss_multi_cam_isp_sgx_3d_srv_display UC_iss_multi_cam_isp_sgx_2mp_3d_srv # # # CPUs that are NOT required but included in config [ tda2px_evm_linux_all ], # # WARNING: IPU1_1 can be excluded from application # WARNING: DSP2 can be excluded from application # WARNING: EVE2 can be excluded from application # # CPUs that are required but not included in config [ tda2px_evm_linux_all ], # # # Edit /home/deepika/FFC/source/vision/platform/ti/tda2/build/configs/tda2px_evm_linux_all/cfg.mk to include or exclude CPUs in an application Thanks + +Hi Deep, Did you try without -j? Regards, Rishabh + +Hi Rishabh, Attaching log file again for your reference. 4150.error_compilation_log.txt Compilation log + + + +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/utils' +making /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios/sysbios.ae66 ... +gmake[1]: Entering directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' +cle66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/BIOS.c ... +# Linking into /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu1_1_release.xem4... +# +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: error: + no valid memory range(null) available for placement of "GROUP_1" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 220: error: + program will not fit into available memory. run placement with alignment + fails for section "GROUP_1" size 0x1be600 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: error: + no valid memory range(null) available for placement of + ".bss:taskStackSection" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 247: error: + program will not fit into available memory. run placement with alignment + fails for section ".bss:taskStackSection" size 0x1b6000 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: error: + no valid memory range(null) available for placement of ".text" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 218: error: + program will not fit into available memory. placement with alignment fails + for section ".text" size 0x36730 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: error: + no valid memory range(null) available for placement of ".data" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: error: + program will not fit into available memory. run placement with alignment + fails for section ".data" size 0x30ef6 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: error: + no valid memory range(null) available for placement of ".const" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 229: error: + program will not fit into available memory. placement with alignment fails + for section ".const" size 0x8a74 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: error: + no valid memory range(null) available for placement of ".stack" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 219: error: + program will not fit into available memory. run placement with alignment + fails for section ".stack" size 0x4000 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: error: + no valid memory range(null) available for placement of ".args" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 235: error: + program will not fit into available memory. placement with alignment fails + for section ".args" size 0x64 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 226: error: + program will not fit into available memory. run placement with alignment + fails for section ".binit" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 228: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 228: error: + program will not fit into available memory. run placement with alignment + fails for section ".init_array" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 231: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 231: error: + program will not fit into available memory. run placement with alignment + fails for section ".fardata" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 232: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 232: error: + program will not fit into available memory. run placement with alignment + fails for section ".switch" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 233: error: + program will not fit into available memory. run placement with alignment + fails for section ".sysmem" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 234: error: + program will not fit into available memory. run placement with alignment + fails for section ".far" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 236: error: + program will not fit into available memory. run placement with alignment + fails for section ".cio" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 237: error: + program will not fit into available memory. run placement with alignment + fails for section ".ARM.exidx" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 238: error: + program will not fit into available memory. run placement with alignment + fails for section ".ARM.extab" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 246: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 246: error: + program will not fit into available memory. run placement with alignment + fails for section ".plt" size 0x0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 252: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 252: error: + program will not fit into available memory. placement with alignment fails + for section "xdc.meta" size 0x147 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 230: warning: + memory range not found: IPU1_1_DATA_MEM on page 0 +error: program will not fit into available memory. run placement with + alignment fails for section ".TI.persistent" size 0x0 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... +are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.src/sysbios' +Build of libraries done. +warning: xdc.cfg.Program: "/home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. +# Configuro done! +# Making tda2px-evm:c66xdsp_2:release:vision_sdk_lib... +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: src/main_common_c6xdsp2.c +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/app_init/app_init_dsp.c +# Compiling tda2px-evm:c66xdsp_2:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/main_app/tda2px/dsp2/src/main_c6xdsp2.c +# Compiling generated MAIN_APP_c6xdsp2_pe66.oe66 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Exception_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_asm_switch.s62 ... +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: warning: + memory range not found: IPU1_1_CODE_MEM on page 0 +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: + no valid memory range(null) available for placement of ".cinit" +"/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu1_1/release/vision_sdk_configuro/linker_mod.cmd", line 227: error: + program will not fit into available memory. placement with alignment fails + for section ".cinit" size 0x2091 +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c64p/Hwi_disp_always.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/timers/dmtimer/Timer_asm.s64P ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/family/c62/TaskSupport_asm.s62 ... +asme66 /home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/bios_6_46_04_53/packages/ti/sysbios/rts/ti/tls_get_tp.asm ... +are66 BIOS.obj c64p_Exception_asm.obj c64p_Hwi_asm.obj c64p_Hwi_asm_switch.obj c64p_Hwi_disp_always.obj dmtimer_Timer_asm.obj c62_TaskSupport_asm.obj ti_tls_get_tp.obj ... +gmake[1]: Leaving directory `/home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.src/sysbios' +warning: xdc.cfg.Program: "/home/deepika/FFC/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/packages/xdc/cfg/Program.xs", line 110: xdc.cfg.Program.SectionSpec#0 : Entry for the section '.bss:heapMemL2' in Program.sectMap is set to 'undefined'. This section allocation will be ignored. +Build of libraries done. +# Configuro done! +# Making tda2px-evm:c66xdsp_1:release:vision_sdk_lib... +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/app_init/app_init_dsp.c +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: /home/deepika/FFC/source/vision/platform/ti/tda2/apps/src/common/main_app/tda2px/dsp1/src/main_c6xdsp1.c +# Compiling generated MAIN_APP_c6xdsp1_pe66.oe66 +# Compiling tda2px-evm:c66xdsp_1:release:vision_sdk: src/main_common_c6xdsp1.c + + undefined first referenced + symbol in file + --------- ---------------- + IpcMgr_rpmsgStartup /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + NameMap_register /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + NameMap_unregister /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_create /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_delete /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + RPMessage_send /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + ti_ipc_remoteproc_Resource_getVdevStatus__E /home/deepika/FFC/source/vision/platform/ti/tda2/binaries/apps/tda2px_evm_linux_all/lib/tda2px-evm/ipu1_1/release/links_common_system.aem4 + +error: unresolved symbols remain +../../master/ELFLNK/build.c:2612:internal fatal error #10251: + ("xdc.meta:MAIN_APP_ipu1_1_pem4.oem4") + +INTERNAL ERROR: /home/deepika/FFC/scripts/..//sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/cg_tools/linux/ti-cgt-arm_16.9.2.LTS/bin/armlnk had an internal inconsistency and aborted + + Tried without -j...Same result. As we are not including IPU2..we don't need its memory. We have all the applications in IPU1_0 AND IPU1_1. Can you tell what changes we can do in file mem_segment_definition_linux.xs As far as I can see the log,there is some memory availability issue. Thanks Deep + +Hi, Have you made any changes in SDK or you are trying default SDK with changes in cfg.mk. Can you try default SDK and list what all changes you have made. Regards, Rishabh + +Hi Rishabh, I have made changes in the cfg.mk. I have included IPU1_0,IPU1_1 and excluded IPU2 Also our applications are included in IPU1_0 so we had to included that. Also I have made IPU1_0 as primary Thanks + +Hi Deep, IPU runs in SMP mode. Can you make PROC_IPU1_1_INCLUDE to no in cfg.mk and try a clean build. Regards, Rishabh + +Thanks a lot Rishabh, This resolved my issue. Regards, Deep + +Great. Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/30001+/716101.txt b/data2/text/range/30001+/716101.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa735080a571982ca83eb6bd3f9117029e5210aa --- /dev/null +++ b/data2/text/range/30001+/716101.txt @@ -0,0 +1,1103 @@ +Ticket Name: Linux/TDA2: Usecase working in VSDK 3.02 but not in VSDK 3.03 + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I'm using Ubuntu 16.04 with kernel version 4.16.7. I have a usecase that is working with VSDK 3.02 but when it is built with VSDK 3.03 one of the links' processData() never gets called so nothing is happening. There is no error reported. I would like to ask what might be causing this and if there is any significant difference between VSDK 3.02 and 3.03. Thanks in advance. Regards, Nick + +Responses: +Hi, For any major changes please refer the release notes. Can you tell about your usecase. You need to 1st debug which link is not getting the SYSTEM_NEW_DATA cmd. Check the previous link whether its sending the that command to the next link. Is the buffers are available to all link or it went to a hang state due to unavailability of buffers. Regards, Anuj + +Hi Anuj, The usecase obtains video from Capture link (IPU2) after which it is Duplicated and one branch goes to Display link (IPU2) and the other one goes to a custom link (A15) which is supposed to send the frame over PCIe to the usecase running on another SoC. The strange thing is that the usecase runs correctly on VSDK 3.02 but when the same code is built in VSDK 3.03 it is like explained in original post. The processData() doesn't get called even once so I would not say that it is due to unavailability of buffers. Is there any reason why the Capture link wouldn't send a SYSTEM_NEW_DATA cmd to the next links in the chain? Regards, Nick + +Hi, Which link is not getting the SYSTEM_NEW_DATA cmd? Your custom link on A15 or the link running on other soc. Regards, Anuj + +Hi, The custom link on A15 is not getting the SYSTEM_NEW_DATA cmd. The other SoC is not a problem, at least for now. Regards, Nick + +Hi, Have you verifed inside the tskMain function of A15 link that its not receiving any command. Can you please verify the same on ipc link on A15 whether that it receiving the cmd or not. Please confirm also that capture link is sending any cmd or not? Regards, Anuj + +Hi Anuj, I added some debug printfs and it seems that the Capture link is not sending SYSTEM_NEW_DATA commands. I also tried another usecase which is only Capture -> Display and it works correctly, Capture link prints that the SYSTEM_NEW_DATA cmd is being sent. So, it has something to with the usecase from original post. Is there any reason why Capture would not send the SYSTEM_NEW_DATA there? Regards, Nick + +Hi, So according to you capture link itself is not sending cmd but in a simpler usecase it send the cmd. Can you check inside the process function of capture link where exactly it is stucking. Regards, Anuj + +Hi Anuj, I managed to track down the place where the execution gets stuck and it is in captureLink_tsk.c within CaptureLink_tskRun(). status = Utils_tskRecvMsg(pTsk, &pRunMsg, BSP_OSAL_WAIT_FOREVER); This is the call that the execution gets stuck in. What would be the next steps? Regards, Nick + +Hi, can you check whether you are registering the call back function CaptureLink_drvCallback if(!pInst->isSubframeEnabled) { pInst->cbPrm.cbFxn = &CaptureLink_drvCallback; } please add log inside the if condition and check whether its hitting the if condition or not If its hitting then add log inside CaptureLink_drvCallback function and check whether driver is giving any callbacks or not? Regards, Anuj + +Hi Anuj, The logs have shown that the callback gets registered (so it goes into the 'if' branch) but the driver is not giving any callbacks. Do you have any idea why this would happen? Regards, Nick + +Hi, Please confirm the below question. 1. Did you not get even 1 log inside the callback function.? 2. Earlier you said you are able to run capture->display usecase, is that on VSK3.3? 3.If that is on 3.3 the can you verify the capture link params from both the usecase and make sure both are same. 4. Can you add a dup link and put a display link with the 2nd output queue of dup and check whether you are going inside the callback function? 5.If you have access to ccs and jtag then can you add a global variable in code and inside the callback function change that variable to a particular value and after running check that value in ccs.(Sometimes logs are not reliable so you can use this technique) Regards, Anuj + +Hi Anuj, 1. I did not get any logs inside callback function, not even 1. 2. Yes, the mentioned usecase was on VSDK 3.03. 3. I can confirm that the params are the same for both usecases. 4. I made a usecase as follows: Capture -> Dup Dup -> Null (A15) Dup -> Display GrpxSrc -> Display_Grpx It is very close to the usecase with problems, only has Null on A15 instead of my custom link. It works correctly. Not sure what could be making Capture stuck in my usecase. As I mentioned, it works on VSDK 3.02. 5. Unfortunately I have no jtag in my possession. Regards, Nick + +Hi, Please do not use null link instead of your custom link. Use the belo usecase Capture -> Dup Dup -> custom link(A15) Dup -> Display GrpxSrc -> Display_Grpx Share the complete log of this usecase from the create phase and press p and share that log too. Please try to replace capture link by a NullSrc link in the above usecase and share the log. Regards, Anuj + +Hi Anuj, The usecase that you have written in the previous post is exactly the same as the usecase I have problems with. Find its log attached as 1.log. As for the change from Capture to NullSrc, that usecase throws a lot of errors and its log can be found attached as 2.log. Regards, Nick 1.log 2.log +U-Boot SPL 2016.05 (Jul 12 2018 - 21:07:33) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +Card did not respond to voltage select! +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +Card did not respond to voltage select! +*** Warning - MMC init failed, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Jul 12 2018 - 21:07:33 +0200) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Card did not respond to voltage select! +*** Warning - MMC init failed, using default environment + +Warning: fastboot.board_rev: unknown board revision +Card did not respond to voltage select! +ERROR: invalid mmc device + +at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 2  1  0 +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +switch to partitions #0, OK +mmc0 is current device +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +163 bytes read in 3 ms (52.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +switch to partitions #0, OK +mmc0 is current device +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +SD/MMC found on device 0 +3563528 bytes read in 175 ms (19.4 MiB/s) +106972 bytes read in 40 ms (2.6 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x366008 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff1db ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (rtrk@rtrkw637-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #12 SMP PREEMPT Tue Aug 7 09:35:59 CEST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=1f69d138-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410804K/979968K available (6643K kernel code, 320K rwdata, 2400K rodata, 336K init, 290K bss, 364364K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08dd02c (9045 kB) +[ 0.000000] .init : 0xc08de000 - 0xc0932000 ( 336 kB) +[ 0.000000] .data : 0xc0932000 - 0xc0982260 ( 321 kB) +[ 0.000000] .bss : 0xc0984000 - 0xc09cc8c0 ( 291 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000338] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000345] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000783] Console: colour dummy device 80x30 +[ 0.000799] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000805] This ensures that you still see kernel messages. Please +[ 0.000811] update your kernel commandline. +[ 0.000825] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000838] pid_max: default: 32768 minimum: 301 +[ 0.000937] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000947] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001491] Initializing cgroup subsys io +[ 0.001508] Initializing cgroup subsys memory +[ 0.001533] Initializing cgroup subsys devices +[ 0.001546] Initializing cgroup subsys freezer +[ 0.001557] Initializing cgroup subsys perf_event +[ 0.001569] Initializing cgroup subsys pids +[ 0.001595] CPU: Testing write buffer coherency: ok +[ 0.001792] /cpus/cpu@0 missing clock-frequency property +[ 0.001807] /cpus/cpu@1 missing clock-frequency property +[ 0.001818] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001850] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080059] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080126] Brought up 2 CPUs +[ 0.080139] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080145] CPU: All CPU(s) started in HYP mode. +[ 0.080151] CPU: Virtualization extensions available. +[ 0.080527] devtmpfs: initialized +[ 0.109084] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110050] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313099] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313121] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.317371] pinctrl core: initialized pinctrl subsystem +[ 0.318217] NET: Registered protocol family 16 +[ 0.319136] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340214] cpuidle: using governor ladder +[ 0.370237] cpuidle: using governor menu +[ 0.378637] OMAP GPIO hardware version 0.1 +[ 0.382726] omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe +[ 0.384708] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.400988] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401001] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.410276] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.410286] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410750] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410759] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.411348] OMAP DMA hardware revision 0.0 +[ 0.451526] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.457436] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461791] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461967] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462125] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462286] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462575] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462766] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465765] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481206] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.543357] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.543769] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.543972] media: Linux media interface: v0.10 +[ 0.544024] Linux video capture interface: v2.00 +[ 0.544064] pps_core: LinuxPPS API ver. 1 registered +[ 0.544071] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.544095] PTP clock support registered +[ 0.544147] EDAC MC: Ver: 3.0.0 +[ 0.544895] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.545187] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.545517] Advanced Linux Sound Architecture Driver Initialized. +[ 0.546362] clocksource: Switched to clocksource arch_sys_counter +[ 0.556981] NET: Registered protocol family 2 +[ 0.557477] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.557540] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.557665] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.557717] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557749] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.557957] NET: Registered protocol family 1 +[ 0.558219] RPC: Registered named UNIX socket transport module. +[ 0.558228] RPC: Registered udp transport module. +[ 0.558235] RPC: Registered tcp transport module. +[ 0.558242] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.559242] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.569137] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.569778] NFS: Registering the id_resolver key type +[ 0.569803] Key type id_resolver registered +[ 0.569811] Key type id_legacy registered +[ 0.569872] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.571157] bounce: pool size: 64 pages +[ 0.571311] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.571325] io scheduler noop registered +[ 0.571338] io scheduler deadline registered +[ 0.571371] io scheduler cfq registered (default) +[ 0.576978] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.639636] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.642988] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 268, base_baud = 3000000) is a 8250 +[ 1.560265] console [ttyS0] enabled +[ 1.564660] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 269, base_baud = 3000000) is a 8250 +[ 1.574364] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 270, base_baud = 3000000) is a 8250 +[ 1.584413] [drm] Initialized drm 1.1.0 20060810 +[ 1.590465] OMAP DSS rev 6.1 +[ 1.594205] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.609895] loop: module loaded +[ 1.613445] vmemexp device MAJOR num = 246 +[ 1.617598] vmemexp class registered +[ 1.621312] /dev/vmemexp device registered +[ 1.625426] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.631122] nand: No NAND device found +[ 1.634892] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.644808] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.650228] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.656087] Creating 7 MTD partitions on "spi32766.0": +[ 1.661265] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.667431] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.673762] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.680699] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.687403] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.694762] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.701118] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.708879] libphy: Fixed MDIO Bus: probed +[ 1.715764] cpsw 48484000.ethernet: Detected MACID = 9c:1d:58:cc:ff:fe +[ 1.722446] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.729424] cpsw 48484000.ethernet: cpsw: Detected MACID = 9c:1d:58:cc:ff:ff +[ 1.738065] mousedev: PS/2 mouse device common for all mice +[ 1.744318] i2c /dev entries driver +[ 1.753661] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.760094] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.766662] evm_3v3_sw: supplied by sysen1 +[ 1.937222] ledtrig-cpu: registered to indicate activity on CPUs +[ 1.947296] aic_dvdd: supplied by evm_3v3_sw +[ 1.953191] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 1.960737] NET: Registered protocol family 10 +[ 1.976033] sit: IPv6 over IPv4 tunneling driver +[ 1.981243] NET: Registered protocol family 17 +[ 1.985924] Key type dns_resolver registered +[ 1.990366] omap_voltage_late_init: Voltage driver support not added +[ 1.997255] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.003464] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.010165] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.016395] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.023708] Power Management for TI OMAP4+ devices. +[ 2.028839] Registering SWP/SWPB emulation handler +[ 2.034901] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.042449] dmm 4e000000.dmm: initialized all PAT entries +[ 2.050383] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.057046] [drm] No driver support for vblank timestamp query. +[ 2.063468] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.090912] pcf857x: probe of 0-0020 failed with error -121 +[ 2.096757] pcf857x: probe of 0-0021 failed with error -121 +[ 2.146390] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.152513] davinci_mdio 48485000.mdio: no live phy, scanning all +[ 2.160132] davinci_mdio: probe of 48485000.mdio failed with error -5 +[ 2.167268] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.208493] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.228919] hctosys: unable to open rtc device (rtc0) +[ 2.246385] evm_1v8: disabling +[ 2.249465] aic_dvdd: disabling +[ 2.252815] ldousb: disabling +[ 2.256284] ALSA device list: +[ 2.259283] #0: DRA7xx-EVM +[ 2.263045] Waiting for root device PARTUUID=1f69d138-02... +[ 2.903441] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.913389] mmc2: new high speed SDHC card at address 1234 +[ 2.919403] mmcblk0: mmc2:1234 SA16G 14.5 GiB +[ 2.924958] mmcblk0: p1 p2 +[ 2.938023] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.947603] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.978819] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.987014] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 2.995835] devtmpfs: mounted +[ 2.999050] Freeing unused kernel memory: 336K +[ 3.003512] This architecture does not have kernel memory protection. +[ 3.256198] systemd[1]: System time before build time, advancing clock. +[ 3.313867] random: systemd: uninitialized urandom read (16 bytes read, 13 bits of entropy available) +[ 3.327226] random: systemd: uninitialized urandom read (16 bytes read, 13 bits of entropy available) +[ 3.339017] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.357593] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.387476] systemd[1]: Set hostname to . +[ 3.444587] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 14 bits of entropy available) +[ 3.484682] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 3.485991] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 3.491199] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 3.514808] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) +[ 3.592372] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.601940] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.611923] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.981278] systemd[1]: basic.target: Found ordering cycle on basic.target/start +[ 3.988752] systemd[1]: basic.target: Found dependency on sysinit.target/start +[ 3.996016] systemd[1]: basic.target: Found dependency on alignment.service/start +[ 4.003593] systemd[1]: basic.target: Found dependency on basic.target/start +[ 4.010703] systemd[1]: basic.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.020027] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with basic.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.069941] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.096808] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.126819] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.156581] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.176666] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.198093] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.226703] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.257254] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.287304] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.316607] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.337285] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.366705] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.436781] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.469080] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.483755] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.519141] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.549002] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.579094] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.609398] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.686812] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.706991] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch.[ 4.716939] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) + +[ 4.746962] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[[0;32m OK  ]Started Forward Password Requests to Wall Dirctory Watch. +[ 4.776622] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.796991] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.826655] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.881778] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.906678] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.926650] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.956860] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Mounting Configuration File System... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted Configuration File System. +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.815379] systemd-journald[130]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ 6.336015] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.351962] remoteproc0: 55020000.ipu is available +[ 6.356886] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.399952] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.427047] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.459054] remoteproc1: 40800000.dsp is available +[ 6.472224] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.517550] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.554845] remoteproc1: Direct firmware load for dra7-dsp1-fw.xe66 failed with error -2 +[ 6.564978] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.573883] remoteproc2: 41000000.dsp is available +[ 6.578165] remoteproc1: failed to load dra7-dsp1-fw.xe66 +[ 6.612623] remoteproc2: Note: remoteproc is still under development and considered experimental. + Starting Load/Save Random Seed... +[ 6.629994] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.656777] remoteproc2: Direct firmware load for dra7-dsp2-fw.xe66 failed with error -2 +[ 6.679663] remoteproc2: failed to load dra7-dsp2-fw.xe66 +[ OK ] Reached target Local File Systems. +[ 6.764741] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 + Starting Create Volatile Files and Directories... +[ 6.832076] remoteproc0: registered virtio0 (type 7) +[ 6.838378] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ OK ] Started Load/Save Random Seed.[ 6.877096] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 + +[ OK ] Found device /dev/ttyS0. +[ OK ] Started Create Volatile Files and Directories. +[ 7.169554] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 7.189515] CAN device driver interface +[ 7.233357] SCSI subsystem initialized +[ 7.300755] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=325) + Starting Network Time Synchronization... + Starting Update UTMP about System Boot/Shutdown...[ 7.356952] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 + +[ 7.437394] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Started Network Time Synchronization. +[ 7.678897] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 7.698607] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.714110] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.767318] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 7.863564] scsi host0: ahci +[ 7.866970] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 309 +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ 8.256426] ata1: SATA link down (SStatus 0 SControl 300) +[ 8.364945] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 8.472269] remoteproc0: powering up 55020000.ipu +[ 8.495796] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 5723312 +[ 8.522055] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 8.589234] remoteproc0: remote processor 55020000.ipu is now up +[ 8.597274] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.640672] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 8.667402] NET: Registered protocol family 41 +[ OK ] Reached target System Initialization. +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. + Starting Print notice about GPLv3 packages... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Started System Logging Service. +[ OK ] Started Kernel Logging Service. + Starting TI MultiCore Tools Daemon... + Starting Login Service... + Starting Avahi mDNS/DNS-SD Stack... + Starting Network Service... + Starting uim-sysfs.service... + Starting Save/Restore Sound Card State... +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. + Starting Telephony service... +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State. +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ 9.641680] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service. +[ 9.661557] net eth0: initialized cpsw ale version 1.4 +[ 9.675404] net eth0: ALE Table size 1024 +[ 9.690151] libphy: PHY 48485000.mdio:03 not found +[ 9.694974] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 +[ 9.733110] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 9.756738] net eth0: initializing cpsw version 1.15 (0) +[ 9.772082] libphy: PHY 48485000.mdio:07 not found +[ 9.785999] net eth0: phy "48485000.mdio:07" not found on slave 0, err -19 +[ 9.822803] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 9.922487] Bluetooth: Core ver 2.21 +[ 9.932682] NET: Registered protocol family 31 +[ 9.951040] Bluetooth: HCI device and connection manager initialized +[ 9.964962] Bluetooth: HCI socket layer initialized +[ 9.977619] Bluetooth: L2CAP socket layer initialized +[ 9.989453] Bluetooth: SCO socket layer initialized +[ OK ] Started Telephony service. +[ OK ] Started Avahi mDNS/DNS-SD Stack. +[ OK ] Started Login Service. +[ OK ] Reached target Network. +[ 10.075517] NET: Registered protocol family 15 + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ 10.396932] Initializing XFRM netlink socket +[ 10.946657] random: nonblocking pool is initialized +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 11.198554] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting tiipclad-daemon.service... + Starting telnetd.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** + + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root + +78root@dra7xx-evm:~# cd /opvi  t/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# ./vision_sdk_load.sh +[ 37.649470] DMA: Module install successful, device major num = 243 +[ 37.656019] DRV: Module install successful +[ 37.681969] CMEMK module: reference Linux version 4.4.84 +[ 37.688036] cmemk initialized +./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC6:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC6:: command not found +updated 0x4A002AC6 value is 00930000 +root@dra7xx-evm:/opt/vision_sdk# ./ub914_config.sh +config UB914... +config UB913... +Config DONE... +root@dra7xx-evm:/opt/vision_sdk# ./ov1063x_config.sh +OV1063X config ... +OV1063X config DONE +root@dra7xx-evm:/opt/vision_sdk# ./p apps.out \   + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb694b000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa6f4b000 of size 0x0fa00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa6e8b000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa6ecb000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0xa0440000 to 0xa6c8b000 of size 0x00200000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 56.582840 s: SYSTEM: System A15 Init in progress !!! + + [HOST] [HOST ] 56.582931 s: SYSTEM: IPC: Init in progress !!! + + [HOST] [HOST ] 56.582931 s: SYSTEM: IPC: Notify init in progress !!! + + [HOST] [HOST ] 56.583206 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + + [HOST] [HOST ] 56.583236 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + + [HOST] [HOST ] 56.583267 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + + [HOST] [HOST ] 56.583267 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + + [HOST] [HOST ] 56.583389 s: SYSTEM: IPC: Notify init DONE !!! + + [HOST] [HOST ] 56.583419 s: SYSTEM: MSGQ: MsgQ init in progress !!! + + [HOST] [HOST ] 56.583511 s: SYSTEM: MSGQ: MsgQ init DONE !!! + + [HOST] [HOST ] 56.583541 s: SYSTEM: IPC: Init DONE !!! + + [HOST] [HOST ] 56.583541 s: SYSTEM: Initializing A15 Links !!! + + [HOST] [HOST ] 56.583663 s: IPC_OUT_0 : Init done - linkid-0x2000000 + + [HOST] [HOST ] 56.583785 s: IPC_OUT_1 : Init done - linkid-0x2000001 + + [HOST] [HOST ] 56.583877 s: IPC_OUT_2 : Init done - linkid-0x2000002 + + [HOST] [HOST ] 56.583999 s: IPC_OUT_3 : Init done - linkid-0x2000003 + + [HOST] [HOST ] 56.584090 s: IPC_OUT_4 : Init done - linkid-0x2000004 + + [HOST] [HOST ] 56.584487 s: IPC_IN_0 : Init done - linkid-0x200000a + + [HOST] [HOST ] 56.584578 s: IPC_IN_1 : Init done - linkid-0x200000b + + [HOST] [HOST ] 56.584700 s: IPC_IN_2 : Init done - linkid-0x200000c + + [HOST] [HOST ] 56.584822 s: IPC_IN_3 : Init done - linkid-0x200000d + + [HOST] [HOST ] 56.584914 s: IPC_IN_4 : Init done - linkid-0x200000e + + [HOST] [HOST ] 56.585036 s: IPC_IN_5 : Init done - linkid-0x200000f + + [HOST] [HOST ] 56.585127 s: IPC_IN_6 : Init done - linkid-0x2000010 + + [HOST] [HOST ] 56.585249 s: NULL_0 : Init done - linkid-0x2000014 + + [HOST] [HOST ] 56.585402 s: NULL_1 : Init done - linkid-0x2000015 + + [HOST] [HOST ] 56.585585 s: NULL_SRC_0 : Init done - linkid-0x2000039 + + [HOST] [HOST ] 56.585737 s: PCIE_S_0 : Init done - linkid-0x2000043 + + [HOST] [HOST ] 56.585890 s: PCIE_R_0 : Init done - linkid-0x2000044 + + [HOST] [HOST ] 56.586073 s: ALGORITHM_0 : Init done - linkid-0x2000031 + + [HOST] [HOST ] 56.586225 s: ALGORITHM_1 : Init done - linkid-0x2000032 + + [HOST] [HOST ] 56.586378 s: ALGORITHM_2 : Init done - linkid-0x2000033 + + [HOST] [HOST ] 56.586530 s: ALGORITHM_3 : Init done - linkid-0x2000034 + + [HOST] [HOST ] 56.586683 s: ALGORITHM_4 : Init done - linkid-0x2000035 + + [HOST] [HOST ] 56.586805 s: ALGORITHM_5 : Init done - linkid-0x2000036 + + [HOST] [HOST ] 56.586957 s: ALGORITHM_6 : Init done - linkid-0x2000037 + + [HOST] [HOST ] 56.587110 s: ALGORITHM_7 : Init done - linkid-0x2000038 + + [HOST] [HOST ] 56.587293 s: DUP0 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.587537 s: DUP1 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.587781 s: DUP2 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.587994 s: DUP3 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.588238 s: DUP4 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.588421 s: SYNC_0 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.588574 s: SYNC_1 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.588757 s: SYNC_2 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.588909 s: SYNC_3 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.589092 s: MERGE_0 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.589275 s: MERGE_1 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.589428 s: MERGE_2 : Init done - linkid-0x0 + + VX_ZONE_INIT:Enabled[ 50.999208] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 51.023612] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) + + +VX_ZONE_ERROR:Enabled + VX_ZONE_WARNING:Enabled + [HOST] [HOST ] 56.589611 s: MERGE_3 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.589794 s: MERGE_4 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.589946 s: SELECT_0 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590129 s: SELECT_1 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590343 s: GATE_0 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590526 s: GATE_1 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590678 s: GATE_2 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590800 s: GATE_3 : Init done - linkid-0x0 + + [HOST] [HOST ] 56.590953 s: SGXFRMCPY_0 : Init done - linkid-0x2000046 + + [HOST] [HOST ] 56.590953 s: SYSTEM: Initializing A15 Links ... DONE !!! + + [HOST] [HOST ] 56.591319 s: OSA: Adjusting global time, timeH by 0 units!!! + + [HOST] [IPU2 ] 14.567437 s: ***** IPU2 Firmware build time 14:54:54 Aug 8 2018 + + [HOST] [IPU2 ] 14.567620 s: *** SYSTEM: CPU Frequency , + + [HOST] [IPU2 ] 14.570548 s: SYSTEM: System Common Init in progress !!! + + [HOST] [IPU2 ] 14.580064 s: UTILS: CIO: Init Done !!! + + [HOST] [IPU2 ] 14.580156 s: SYSTEM: IPC init in progress !!! + + [HOST] [IPU2 ] 14.580247 s: SYSTEM: Notify init done !!! + + [HOST] [IPU2 ] 14.581986 s: SYSTEM: MsgQ init done !!! + + [HOST] [IPU2 ] 14.582901 s: RpmsgInit in progress... + + [HOST] [IPU2 ] 14.582992 s: Connection established with HLOS, calling rpmsgInit + + [HOST] [IPU2 ] 14.583633 s: SYSTEM: IPC init DONE !!! + + [HOST] [IPU2 ] 14.588726 s: SYSTEM: Initializing TIOVX ... + + [HOST] [IPU2 ] 14.588940 s: VX_ZONE_INIT:Enabled + + [HOST] [IPU2 ] 14.589062 s: VX_ZONE_ERROR:Enabled + + [HOST] [IPU2 ] 14.589184 s: VX_ZONE_WARNING:Enabled + + [HOST] [IPU2 ] 14.592783 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! + + [HOST] [IPU2 ] 14.592936 s: SYSTEM: Initializing TIOVX ... Done !!! + + [HOST] [IPU2 ] 14.592997 s: SYSTEM: System Common Init Done !!! + + [HOST] [IPU2 ] 14.593058 s: SYSTEM: System Init in progress !!! + + [HOST] [IPU2 ] 14.593149 s: SYSTEM: BSP Common Init in progress !!! + + [HOST] [IPU2 ] 14.593210 s: SYSTEM: BSP Common Init Done !!! + + [HOST] [IPU2 ] 14.593271 s: SYSTEM: BSP Platform Init in progress !!! + + [HOST] [IPU2 ] 14.596870 s: SYSTEM: BSP Platform Init Done !!! + + [HOST] [IPU2 ] 14.596931 s: SYSTEM: FVID2 Init in progress !!! + + [HOST] [IPU2 ] 14.597084 s: SYSTEM: FVID2 Init Done !!! + + [HOST] [IPU2 ] 14.597145 s: SYSTEM: VPS Init in progress !!! + + [HOST] [IPU2 ] 14.597206 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + + [HOST] [IPU2 ] 14.600164 s: *** VPDMA Firmware Loading... *** + + [HOST] [IPU2 ] 14.600286 s: VPDMA Firmware Address = 0xa035c4c0 + + [HOST] [IPU2 ] 14.600347 s: VPDMA Load Address = 0x4897d004 + + [HOST] [IPU2 ] 14.600469 s: VPDMA Firmware Version = 0x4d0001b8 + + [HOST] [IPU2 ] 14.600530 s: VPDMA List Busy Status = 0x00000000 + + [HOST] [IPU2 ] 14.600622 s: *** VPDMA Firmware Load Success *** + + [HOST] [IPU2 ] 14.600957 s: *** VPDMA Firmware Loading... *** + + [HOST] [IPU2 ] 14.601049 s: VPDMA Firmware Address = 0xa035c4c0 + + [HOST] [IPU2 ] 14.601140 s: VPDMA Load Address = 0x4899d004 + + [HOST] [IPU2 ] 14.601232 s: VPDMA Firmware Version = 0x4d0001b8 + + [HOST] [IPU2 ] 14.601323 s: VPDMA List Busy Status = 0x00000000 + + [HOST] [IPU2 ] 14.601384 s: *** VPDMA Firmware Load Success *** + + [HOST] [IPU2 ] 14.601689 s: *** VPDMA Firmware Loading... *** + + [HOST] [IPU2 ] 14.601781 s: VPDMA Firmware Address = 0xa035c4c0 + + [HOST] [IPU2 ] 14.601872 s: VPDMA Load Address = 0x489bd004 + + [HOST] [IPU2 ] 14.601994 s: VPDMA Firmware Version = 0x4d0001b8 + + [HOST] [IPU2 ] 14.602055 s: VPDMA List Busy Status = 0x00000000 + + [HOST] [IPU2 ] 14.602147 s: *** VPDMA Firmware Load Success *** + + [HOST] [IPU2 ] 14.602452 s: *** VPDMA Firmware Loading... *** + + [HOST] [IPU2 ] 14.602543 s: VPDMA Firmware Address = 0xa035c4c0 + + [HOST] [IPU2 ] 14.602635 s: VPDMA Load Address = 0x489dd004 + + [HOST] [IPU2 ] 14.602726 s: VPDMA Firmware Version = 0x4d0001b8 + + [HOST] [IPU2 ] 14.602818 s: VPDMA List Busy Status = 0x00000000 + + [HOST] [IPU2 ] 14.602909 s: *** VPDMA Firmware Load Success *** + + [HOST] [IPU2 ] 14.661196 s: SYSTEM: VPS Init Done !!! + + [HOST] [IPU2 ] 14.662081 s: UTILS: DMA: HWI Create for INT25 !!! + + [HOST] [IPU2 ] 14.662355 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + + [HOST] [IPU2 ] 14.662447 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 260608 B (254 KB) + + [HOST] [IPU2 ] 14.662599 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + + [HOST] [IPU2 ] 14.662752 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 262144000 B (250 MB) + + [HOST] [IPU2 ] 14.662965 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1047168 B (0 MB), Free size = 1047168 B (0 MB) + + [HOST] [IPU2 ] 14.663148 s: SYSTEM: Initializing Links !!! + + [HOST] [IPU2 ] 14.925516 s: SYSTEM: Initializing Links ... DONE !!! + + [HOST] [IPU2 ] 14.925944 s: CHAINS: Application Started !!! + + [HOST] [IPU2 ] 14.936131 s: BOARD: Board Init in progress !!! + + [HOST] [IPU2 ] 14.936558 s: BOARD: Board Init Done !!! + + [HOST] [IPU2 ] 14.944671 s: + + [HOST] [HOST ] 56.940980 s: SYSTEM: System A15 Init Done !!! + + [HOST] [HOST ] 56.941163 s: NETWORK_CTRL: Starting Server (port=5000) !!! + + [HOST] [HOST ] 56.941224 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + + [HOST] [HOST ] 57.475538 s: + + [HOST] [HOST ] + + [HOST] [HOST ] ==================== + + [HOST] [HOST ] Vision SDK Usecases + + [HOST] [HOST ] ==================== + + [HOST] [HOST ] 1: Single Camera Usecases + + [HOST] [HOST ] 2: Multi-Camera LVDS Usecases + + [HOST] [HOST ] 3: Open-Compute Usecases + + [HOST] [HOST ] + + [HOST] [HOST ] p: CPU Status + + [HOST] [HOST ] i: Show IP Addr (IPU + NDK + AVB) + + [HOST] [HOST ] + + [HOST] [HOST ] s: System Settings + + [HOST] [HOST ] + + [HOST] [HOST ] x: Exit + + [HOST] [HOST ] z: Exit - AND SHUTDOWN Remote CPUs + + [HOST] [HOST ] + + [HOST] [HOST ] Enter Choice: + + [HOST] [HOST ] + +1 + [HOST] [HOST ] 59.618312 s: + + [HOST] [HOST ] + + [HOST] [HOST ] Single Camera Usecases + + [HOST] [HOST ] ------------------------ + + [HOST] [HOST ] 1: FFN Single Camera View + + [HOST] [HOST ] + + [HOST] [HOST ] 2: Capture + pcieS + + [HOST] [HOST ] + + [HOST] [HOST ] + + [HOST] [HOST ] x: Exit + + [HOST] [HOST ] + + [HOST] [HOST ] Enter Choice: + + [HOST] [HOST ] + +2 + [HOST] [HOST ] 61.241841 s: + + [HOST] [HOST ] 62.315927 s: IPC_IN_0 : Create in progress !!! + + [HOST] [HOST ] 62.316385 s: IPC_IN_0 : Create Done !!! + + [HOST] [IPU2 ] 62.315317 s: IPC_OUT_0 : Create in progress !!! + + [HOST] [IPU2 ] 62.315683 s: IPC_OUT_0 : Create Done !!! + + [HOST] [IPU2 ] 62.316629 s: DISPLAY: Create in progress !!! + + [HOST] [IPU2 ] 62.317269 s: DISPLAY: Create Done !!! + + [HOST] [IPU2 ] 62.317605 s: GRPXSRC: Create in progress !!! + + [HOST] [IPU2 ] 63.888824 s: GRPXSRC: Create Done !!! + + [HOST] [IPU2 ] 63.889282 s: DISPLAY: Create in progress !!! + + [HOST] [IPU2 ] 63.889800 s: DISPLAY: Create Done !!! + + [HOST] [IPU2 ] 63.890471 s: *** UTILS: CPU KHz = 20000 Khz *** + + [HOST] [IPU2 ] 63.990575 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + + [HOST] [IPU2 ] 63.990697 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 255176 B (249 KB) + + [HOST] [IPU2 ] 63.990880 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + + [HOST] [IPU2 ] 63.991002 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 255692800 B (243 MB) + + [HOST] [IPU2 ] 63.991246 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1047168 B (0 MB), Free size = 1047168 B (0 MB) + + [HOST] [IPU2 ] 63.991673 s: DISPLAY: Start in progress !!! + + [HOST] [IPU2 ] 63.991734 s: DISPLAY: Start Done !!! + + 58.089232] virtio_rpmsg_bus virtio0: msg received with no recipient +[H OST] [HOST ] 64.002013 s: + + [HOST] [HOST ] + + [HOST][HOST ] ==================== + + [HOST] [HOST ] Chains Run-time Menu + + [HOST] [HOST ] ==================== + + [HOST] [HOST[ 58.133132] virtio_rpmsg_bus virtio0: msg received with no recipient + ] + + [HOST] [HOST ] 0: Stop Chain + + [HOST] [HOST ] + + [OST] [HOST ] p: Print Performance Statistics + + [HOST] [HOST ] + + [HOST] [HOST ] Enter Choice: + + [HOST] [HOST ] + + [HOST] [IPU2 ] 64.000762 s: DISPLAY: Start in progress !!! + + [HOST] [IPU2 ] 64.000854 s: DISPLAY: Start Done !!! + + +****** Segmentation fault caught .... +Faulty address is 0xffffffff, called from 0x2c51b +Totally Obtained 0 stack frames. signal number =11 + Signal number = 11, Signal errno = 0 + SI code = 1 (Address not mapped to object) + Fault addr = 0xffffffff +[bt] Execution path: + 58.156311] virtio_rpmsg_bus virtio0: msg received with no recipient +orot@dra7xx-evm:/opt/vision_sdk# [ 60.960595] virtio_rpmsg_bus virtio0: msg received with no recipient + +orot@dra7xx-evm:/opt/vision_sdk# + +Hi, I have asked you to replace capture link By Null link in your faulty usecase to confirm that the issue is with capture link or your custome link. Currently from the log i can say that the issue seems to be in your custom link but just wanted to be sure about that. Can you take a refrence from bios null_src_display usecase and try the null link. Can you tell me what basically your custom link is doing and if it has any kind of dependency from any driver? Regards, Anuj + +Hi Anuj, I added some stuff from null_src_display to my usecase with NullSource and it works without errors meaning the SYSTEM_CMD_NEW_DATA is being sent from NullSource and received by IPC_In and my custom link on A15. My custom link receives a frame, copies is to a buffer which is allocated in kernel space and mmaped up to VSDK, that kernel space buffer is then sent over PCIe by a driver to a driver on another SoC where it is copied from driver to its custom link and then displayed. Regards, Nick + +Hi, Can you share your capture link params. Regards, Anuj + +Hi, Did you able to resolve the issue. Regards, Anuj + +Hi Anuj, I have not resolved my issue and have quit trying for now since other stuff to work on came by. Thank you for your assistance so far, maybe I'll get back to it when I have more time. Regards, Nick + +Hi, So can you close this issue? Regards, Anuj + diff --git a/data2/text/range/30001+/719002.txt b/data2/text/range/30001+/719002.txt new file mode 100644 index 0000000000000000000000000000000000000000..6cc65c7de906129c9dafbb70be93fee15d8846ee --- /dev/null +++ b/data2/text/range/30001+/719002.txt @@ -0,0 +1,66 @@ +Ticket Name: RTOS/TDA2: TIDL (Deep Learning) on Caffe and TensorFlow + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: INA226 Tool/software: TI-RTOS Dear TI, Understand a TI customized Caffe-Jacinto model is supported by TI, and "Only certain models" of Caffe and TensorFlow are supported. My questions are: 1) I can use official Caffe and TensorFlow model but only certain models can be used, correct? If this is true, what are these "certain models"? 2) For TensorFlow, Can you provide a example of the .txt file to use for the converting tool? e.g. in the current user guild, the below example is given for caffe: tidl_model_import.out.exe ..\..\test\testvecs\config\import\tidl_import_jseg21.txt inputNetFile = ..\..\test\testvecs\config\caffe_models\tiscapes_jseg21\jacintonet11.prototxt inputParamsFile = ..\..\test\testvecs\config\caffe_models\tiscapes_jseg21\jacintonet11.caffemodel What could be input files if using TensorFlow? Thanks and best regards He Wei + +Responses: +Hi He Wei, 1. Any caffe or TensorFlow model with layers supported by TIDL can be imported and run using TIDL, please refer to data sheet for supported layers. 2. Please refer to "tidl_import_mobileNet1.txt " file in the "ti_dl\test\testvecs\config\import" folder as reference for converting TensorFlow models. Also, copied below.. # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 1 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 50 numParamBits = 10 inputNetFile = "..\..\test\testvecs\config\tensorflow_models\mobilenet\mobilenet_1_224.pb" inputParamsFile = "NA" outputNetFile = "..\..\test\testvecs\config\tidl_models\tidl_net_mobilenet_1_224.bin" outputParamsFile = "..\..\test\testvecs\config\tidl_models\tidl_param_mobilenet_1_224.bin" preProcType = 2 sampleInData = "..\..\test\testvecs\input\airshow.jpg" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" inWidth = 224 inHeight = 224 inNumChannels = 3 Thanks, Praveen + +Thanks a lot Praveen, 1. Beside CNN is supported, does TIDL support RNN and LSTM? (I didn't find these on TI data sheet) 2. Can we install and build github.com/.../caffe-jacinto in Windows environment? Thanks and best regards He Wei + +1. No, TIDL does not support RNN and LSTM. 2. No Thanks, Praveen + +Thanks Praveen, In the "TIDL OD Usecase", there is "square box" GUI to show on each identified vehicle, This " square box" GUI is done by display module or by algorithm module? (We replace the net and parameter bin fie with some face detection trained model but no more effect) Thanks and best regards He Wei + +Hi He Wei, It is done by display module. Thanks, Praveen + +H, Praveen, For the TIDL OD demo, there are 2 places to input the input source file: 1. In "TIDL_SSD_CFG.TXT", inputFile=inData_OD 2. During the Tool conversion: sampleInData = "..\..\test\testvecs\input\000100_1024x512_bgr.y" So what is the usage/difference for each input source? (The reason I am asking is because when I changed the input to use the live camera, then there is no more object detection effect. i.e. no more "square box" GUI, I am wondering if the OD algo. is acting on the live camera or still the video file defined in the tool conversion. ) Basically our 1st approach is to make this OD demo working on live camera capture first. What could be major modification beside changing the source capture from Camera instead from file? Thanks and best regards He Wei + +Hi, In the TIDL OD demo you can use input from live camera, but this input need to be converted raw data before giving to the usecase. You can refer below thread for more details on how to use camera source to the input of OD usecase. e2e.ti.com/.../2278546 Regarding the other input for tool conversion , it is one time process to convert to your model to get net and params bin files to use in the OD usecase, so the input to tool conversion can be any one frame of data from the training data set used in training your model. Thanks, Praveen + +Dear Praveen, Based on that link, "TIDL algorithm requires BGR planar input". We did modification based on the VSDK existing TIDL_OD use case: " UseCase: chains_tidlOD NullSource -> Decode -> VPE -> Dup Dup -> Merge Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) ... " We replaced the "NullSource -> Decode -> VPE" to "Capture link" (The video capture is working after this change). You can see actually after video capturing, it will go to "Alg_tidlpreproc (A15)" before entering TIDL algorithm , and the "Alg_tidlpreproc (A15)" will perform the YUV to RGB change, hence the format will be correct for TIDL algo. now and it should be working, am I right? (But there is still no effect..) Thanks and best regards He Wei + +In addition: The procMode for Alg_tidlpreproc (A15) set as: pUcObj->Alg_tidlpreprocPrm.procMode = TIDLPREPROC_LINK_PROCMODE_Y2R; Thanks and best regards He Wei + +One more question: Can you provide the original "caffe_jacinto_models\trained\image_detection\jdetNet_768x320\deploy.prototxt" used to convert to TIDL_OD "tidl_net_jdetNet_ssd.bin"? I have download the caffe_jacinto_models source code from TI Github but cannot find that deploy.prototxt. Thanks and best regards He Wei + +Hi He Wei, You may be searching in some wrong place, so please check the link following thread and also follow steps mentioned in that thread to import and run the OD usecase. e2e.ti.com/.../689617 Regarding the other question, please try to run the existing OD use case and then you import and run your model. Thanks, Praveen + +Thanks Praveen, Thanks for the sharing and this seems a break thread. My other question is: I have modified the TI_OD use case to capture live video from Camera, then passing to a pre-process to done the YUV to RGB conversion, then passing to algo. but no any effect. i.e. no GUI, Any opinions? Thanks and best regards He Wei + +Hi He Wei, Did you successfully import your model to generate the "tidl_net_jdetNet_ssd.bin" and tidl_param_jdetNet_ssd.bin" files using TIDL import tool ? Because these bin files should be used in runnign use case with live video. Thanks, Praveen + +Dear Praveen, Yes. I successfully import generate and import the " "tidl_net_jdetNet_ssd.bin" and tidl_param_jdetNet_ssd.bin" by following the your link, then I modify the TIDL_OD use case from file input to camera live feed, but there is still no impact, i.e. no "square" GUI.. And there is TIDL pre-process module to perform YUV-> RGB conversion before fitting into algo. Any opinions? or any way to debug to understand the problem? Thanks and best regards He Wei + +In addition, the log when running the modified TIDL_OD use case (video is capturing from Camera instead of File): [IPU1-0] 15.260111 s: [IPU1-0] 15.302293 s: TIDL Configuration parameters [IPU1-0] 15.302385 s: ----------------------------- [IPU1-0] 15.302446 s: inputWidth = 768 [IPU1-0] 15.302507 s: inputHeight = 320 [IPU1-0] 15.302568 s: inputFile = inData_OD [IPU1-0] 15.302598 s: inputFile = inHeader_OD [IPU1-0] 15.302659 s: netFileName = tidl_net_jdetNet_ssd.bin [IPU1-0] 15.302751 s: paramFileName = tidl_param_jdetNet_ssd.bin [IPU1-0] 15.302812 s: inputfps = 30 [IPU1-0] 15.302903 s: threshold = 0.300000 [IPU1-0] 15.302995 s: ----------------------------- [IPU1-0] 16.075306 s: CAPTURE: Create in progress !!! [IPU1-0] 16.075520 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [IPU1-0] 16.166503 s: CAPTURE: Create Done !!! [IPU1-0] 16.167663 s: IPC_OUT_0 : Create in progress !!! [IPU1-0] 16.168029 s: IPC_OUT_0 : Create Done !!! [HOST ] 16.168212 s: IPC_IN_0 : Create in progress !!! [HOST ] 16.168517 s: IPC_IN_0 : Create Done !!! [HOST ] 16.168639 s: ALGORITHM: Create in progress (algId = 12) !!! [HOST ] 16.182486 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) [HOST ] 16.182516 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) [HOST ] 16.182516 s: ALGORITHM: Create Done (algId = 12) !!! [HOST ] 16.182638 s: IPC_OUT_3 : Create in progress !!! [HOST ] 16.182669 s: IPC_OUT_3 : Create Done !!! [EVE4 ] 16.182943 s: IPC_IN_0 : Create in progress !!! [EVE4 ] 16.183828 s: IPC_IN_0 : Create Done !!! [EVE4 ] 16.184407 s: ALGORITHM: Create in progress (algId = 14) !!! [HOST ] 18.199902 s: IPC_OUT_2 : Create in progress !!! [HOST ] 18.199932 s: IPC_OUT_2 : Create Done !!! [DSP1 ] 18.199322 s: IPC_IN_3 : Create in progress !!! [DSP1 ] 18.199810 s: IPC_IN_3 : Create Done !!! [EVE3 ] 18.200237 s: IPC_IN_0 : Create in progress !!! [EVE3 ] 18.201152 s: IPC_IN_0 : Create Done !!! [EVE3 ] 18.201823 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE4 ] 18.197614 s: ALGORITHM: Create Done (algId = 14) !!! [EVE4 ] 18.198407 s: IPC_OUT_0 : Create in progress !!! [EVE4 ] 18.198895 s: IPC_OUT_0 : Create Done !!! [HOST ] 20.215610 s: IPC_OUT_1 : Create in progress !!! [HOST ] 20.215671 s: IPC_OUT_1 : Create Done !!! [DSP1 ] 20.215030 s: IPC_IN_2 : Create in progress !!! [DSP1 ] 20.215518 s: IPC_IN_2 : Create Done !!! [EVE2 ] 20.215915 s: IPC_IN_0 : Create in progress !!! [EVE2 ] 20.216860 s: IPC_IN_0 : Create Done !!! [EVE2 ] 20.217623 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE3 ] 20.213505 s: ALGORITHM: Create Done (algId = 14) !!! [EVE3 ] 20.214146 s: IPC_OUT_0 : Create in progress !!! [EVE3 ] 20.214603 s: IPC_OUT_0 : Create Done !!! [HOST ] 22.251662 s: IPC_OUT_0 : Create in progress !!! [HOST ] 22.251692 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 22.251052 s: IPC_IN_1 : Create in progress !!! [DSP1 ] 22.251509 s: IPC_IN_1 : Create Done !!! [EVE1 ] 22.251997 s: IPC_IN_0 : Create in progress !!! [EVE1 ] 22.252912 s: IPC_IN_0 : Create Done !!! [EVE1 ] 22.253492 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE2 ] 22.249344 s: ALGORITHM: Create Done (algId = 14) !!! [EVE2 ] 22.250137 s: IPC_OUT_0 : Create in progress !!! [EVE2 ] 22.250625 s: IPC_OUT_0 : Create Done !!! [EVE1 ] 24.276001 s: ALGORITHM: Create Done (algId = 14) !!! [EVE1 ] 24.276764 s: IPC_OUT_0 : Create in progress !!! [EVE1 ] 24.277221 s: IPC_OUT_0 : Create Done !!! [IPU1-0] 24.290459 s: IPC_IN_0 : Create in progress !!! [IPU1-0] 24.291465 s: IPC_IN_0 : Create Done !!! [IPU1-0] 24.292746 s: ALGORITHM: Create in progress (algId = 1) !!! [IPU1-0] 24.293783 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) [IPU1-0] 24.293905 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) [IPU1-0] 24.316385 s: ALGORITHM: Create Done (algId = 1) !!! [IPU1-0] 24.316568 s: DISPLAY: Create in progress !!! [IPU1-0] 24.317147 s: DISPLAY: Create Done !!! [IPU1-0] 24.317513 s: GRPXSRC: Create in progress !!! [IPU1-0] 24.863203 s: GRPXSRC: Create Done !!! [IPU1-0] 24.863569 s: DISPLAY: Create in progress !!! [IPU1-0] 24.864027 s: DISPLAY: Create Done !!! [IPU1-0] 24.864240 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 24.864362 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243176 B (237 KB) [IPU1-0] 24.864515 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 24.864667 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 190116352 B (181 MB) [IPU1-0] 24.864850 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 24.874001 s: CHAINS: Sensor create in progress [IPU1-0] 24.874550 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [IPU1-0] 24.965686 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 [IPU1-0] 24.966052 s: CHAINS: Sensor create ... DONE !!! [IPU1-0] 24.966357 s: DISPLAY: Start in progress !!! [IPU1-0] 24.966418 s: DISPLAY: Start Done !!! [IPU1-0] 24.973403 s: DISPLAY: Start in progress !!! [IPU1-0] 24.973464 s: DISPLAY: Start Done !!! [IPU1-0] 24.978923 s: CAPTURE: Start in progress !!! [IPU1-0] 24.980479 s: CAPTURE: Start Done !!! Any clue? Thanks and best regards He Wei + +In addition: I did the same modification on "vision_sdk\apps\src\rtos\usecases\semSeg" and change the live source using Camera in stead of file, and I can see the GUI effect. Thanks and best regards He Wei + +Hi, Can you press p after 1 min running of usecase and share the usecase. Regards, Anuj + +Dear Anuj, Below is the log after press p after 1min running ( and I put a toy car in front of camera during testing): [IPU1-0] Enter Choice: [IPU1-0] p [IPU1-0] 235.003568 s: [IPU1-0] 235.003660 s: CPU [IPU1-0 ] Statistics, [IPU1-0] 235.003721 s: ************************* [IPU1-0] 235.003782 s: [IPU1-0] 235.003843 s: LOAD: CPU: 11.0% HWI: 1.9%, SWI:0.6%, Low Power: 85.1% [IPU1-0] 235.004087 s: [IPU1-0] 235.004178 s: LOAD: TSK: DUP0 : 0.1% [IPU1-0] 235.004270 s: LOAD: TSK: IPC_IN_0 : 0.2% [IPU1-0] 235.004392 s: LOAD: TSK: IPC_OUT_0 : 0.4% [IPU1-0] 235.004727 s: LOAD: TSK: MERGE0 : 0.2% [IPU1-0] 235.004849 s: LOAD: TSK: SYNC0 : 0.6% [IPU1-0] 235.004941 s: LOAD: TSK: DISPLAY0 : 0.4% [IPU1-0] 235.005032 s: LOAD: TSK: CAPTURE : 0.2% [IPU1-0] 235.005124 s: LOAD: TSK: ALGORITHM0 : 1.0% [IPU1-0] 235.005246 s: LOAD: TSK: GrpxSrc0 : 0.2% [IPU1-0] 235.005337 s: LOAD: TSK: STAT_COLL : 3.5% [IPU1-0] 235.005429 s: LOAD: TSK: MISC : 1.7% [IPU1-0] 235.005520 s: [IPU1-0] 235.005764 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.005886 s: [IPU1-0] 235.005917 s: SYSTEM: Sempahores Objects, 178 of 1050 free [IPU1-0] 235.006008 s: SYSTEM: Task Objects , 18 of 100 free [IPU1-0] 235.006069 s: SYSTEM: Clock Objects , 95 of 100 free [IPU1-0] 235.006161 s: SYSTEM: Hwi Objects , 89 of 100 free [IPU1-0] 235.006252 s: [IPU1-0] 235.006283 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243176 B (237 KB) [IPU1-0] 235.006466 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 235.006649 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 190116352 B (181 MB) [IPU1-0] 235.006832 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 235.007015 s: [IPU1-0] 235.007076 s: [IPU1-0] 235.007106 s: CPU [IPU1-1 ] Statistics, [IPU1-0] 235.007167 s: ************************* [IPU1-0] 235.007228 s: [IPU1-0] 235.007289 s: LOAD: CPU: 1.1% HWI: 0.6%, SWI:0.3%, Low Power: 84.8% [IPU1-0] 235.007442 s: [IPU1-0] 235.007716 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 235.007838 s: [IPU1-0] 235.007869 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.007991 s: [IPU1-0] 235.008021 s: SYSTEM: Sempahores Objects, 442 of 1050 free [IPU1-0] 235.008113 s: SYSTEM: Task Objects , 39 of 100 free [IPU1-0] 235.008235 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 235.008326 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 235.008418 s: [IPU1-0] 235.008479 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643368 B (628 KB) [IPU1-0] 235.008723 s: [IPU1-0] 235.008784 s: [IPU1-0] 235.008845 s: CPU [HOST ] Statistics, [IPU1-0] 235.008906 s: ************************* [IPU1-0] 235.008967 s: [IPU1-0] 235.008997 s: LOAD: CPU: 48.5% HWI: 0.1%, SWI:0.1%, Low Power: 50.5% [IPU1-0] 235.009150 s: [IPU1-0] 235.009241 s: LOAD: TSK: MISC : 48.3% [IPU1-0] 235.009333 s: [IPU1-0] 235.009363 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.009455 s: [IPU1-0] 235.009516 s: SYSTEM: Sempahores Objects, 439 of 1050 free [IPU1-0] 235.009607 s: SYSTEM: Task Objects , 38 of 100 free [IPU1-0] 235.009729 s: SYSTEM: Clock Objects , 95 of 100 free [IPU1-0] 235.009821 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 235.009882 s: [IPU1-0] 235.009943 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6236464 B (6090 KB) [IPU1-0] 235.010095 s: [IPU1-0] 235.010156 s: [IPU1-0] 235.010187 s: CPU [DSP1 ] Statistics, [IPU1-0] 235.010248 s: ************************* [IPU1-0] 235.010309 s: [IPU1-0] 235.010370 s: LOAD: CPU: 41.2% HWI: 0.3%, SWI:0.1%, Low Power: 57.9% [IPU1-0] 235.010492 s: [IPU1-0] 235.010736 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 40.6% [IPU1-0] 235.010858 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 235.010949 s: [IPU1-0] 235.011010 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.011071 s: [IPU1-0] 235.011132 s: SYSTEM: Sempahores Objects, 451 of 1050 free [IPU1-0] 235.011224 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 235.011315 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 235.011407 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 235.011498 s: [IPU1-0] 235.011529 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65600 B (64 KB) [IPU1-0] 235.011712 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 497720 B (486 KB) [IPU1-0] 235.011895 s: [IPU1-0] 235.011925 s: [IPU1-0] 235.011986 s: CPU [DSP2 ] Statistics, [IPU1-0] 235.012047 s: ************************* [IPU1-0] 235.012108 s: [IPU1-0] 235.012139 s: LOAD: CPU: 0.2% HWI: 0.1%, SWI:0.0%, Low Power: 98.7% [IPU1-0] 235.012291 s: [IPU1-0] 235.012352 s: LOAD: TSK: MISC : 0.1% [IPU1-0] 235.012413 s: [IPU1-0] 235.012474 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.012566 s: [IPU1-0] 235.012596 s: SYSTEM: Sempahores Objects, 456 of 1050 free [IPU1-0] 235.012688 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 235.012779 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 235.012871 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 235.012962 s: [IPU1-0] 235.012993 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [IPU1-0] 235.013176 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) [IPU1-0] 235.013328 s: [IPU1-0] 235.013359 s: [IPU1-0] 235.013420 s: CPU [EVE1 ] Statistics, [IPU1-0] 235.013481 s: ************************* [IPU1-0] 235.013511 s: CPU: EVE1: Unable to get CPU statistics !!! [IPU1-0] 235.013633 s: [IPU1-0] 235.013664 s: [IPU1-0] 235.013694 s: [IPU1-0] 235.013755 s: CPU [EVE2 ] Statistics, [IPU1-0] 235.013816 s: ************************* [IPU1-0] 235.013877 s: CPU: EVE2: Unable to get CPU statistics !!! [IPU1-0] 235.013938 s: [IPU1-0] 235.013969 s: [IPU1-0] 235.014030 s: [IPU1-0] 235.014060 s: CPU [EVE3 ] Statistics, [IPU1-0] 235.014121 s: ************************* [IPU1-0] 235.014182 s: CPU: EVE3: Unable to get CPU statistics !!! [IPU1-0] 235.014853 s: [IPU1-0] 235.014945 s: [IPU1-0] 235.014975 s: [IPU1-0] 235.015006 s: CPU [EVE4 ] Statistics, [IPU1-0] 235.015097 s: ************************* [IPU1-0] 235.015158 s: CPU: EVE4: Unable to get CPU statistics !!! [IPU1-0] 235.015219 s: [IPU1-0] 235.015280 s: [IPU1-0] 235.015311 s: [IPU1-0] 235.015341 s: CPU [IPU2 ] Statistics, [IPU1-0] 235.015402 s: ************************* [IPU1-0] 235.015463 s: [IPU1-0] 235.015524 s: LOAD: CPU: 1.0% HWI: 0.5%, SWI:0.3%, Low Power: 95.8% [IPU1-0] 235.015921 s: [IPU1-0] 235.016043 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 235.016134 s: [IPU1-0] 235.016165 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 235.016256 s: [IPU1-0] 235.016317 s: SYSTEM: Sempahores Objects, 442 of 1050 free [IPU1-0] 235.016378 s: SYSTEM: Task Objects , 39 of 100 free [IPU1-0] 235.016470 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 235.016622 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 235.016714 s: [IPU1-0] 235.016744 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) [IPU1-0] 235.016897 s: [IPU1-0] 235.017232 s: [IPU1-0] 235.017293 s: UTILS_PRCM_STATS: Current Temperature, [IPU1-0] 235.017354 s: [IPU1-0] 235.017415 s: Voltage Rail || Curr Temp Min - Max [IPU1-0] 235.017476 s: --------------------------------------------------------- [IPU1-0] 235.017598 s: PMHAL_PRCM_VD_MPU || [48. 0 , 48.400] [IPU1-0] 235.017720 s: PMHAL_PRCM_VD_CORE || [48. 0 , 48.400] [IPU1-0] 235.017842 s: PMHAL_PRCM_VD_IVAHD || [48. 0 , 48.400] [IPU1-0] 235.017934 s: PMHAL_PRCM_VD_DSPEVE || [48. 0 , 48.400] [IPU1-0] 235.018056 s: PMHAL_PRCM_VD_GPU || [47.600 , 48. 0] [IPU1-0] 235.018147 s: [IPU1-0] 235.018208 s: ============================================================================ [IPU1-0] 235.018300 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) [IPU1-0] 235.018391 s: ---------------------------------------------------------------------------- [IPU1-0] 235.023882 s: UTILS_PRCM_STATS: Reading the regulator data failed [IPU1-0] 235.024004 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! [IPU1-0] 235.024339 s: [IPU1-0] 235.024370 s: Statistics Collector, [IPU1-0] 235.024431 s: [IPU1-0] 235.024461 s: STATISTIC Avg Data Peak Data [IPU1-0] 235.024583 s: COLLECTOR MB/s MB/s [IPU1-0] 235.024675 s: -------------------------------------------------- [IPU1-0] 235.024766 s: SCI_EMIF1 RD+WR | 1007.632457 1661.457017 [IPU1-0] 235.024888 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 [IPU1-0] 235.024980 s: SCI_EMIF1 RD ONLY | 755.861823 1263.723194 [IPU1-0] 235.025102 s: SCI_EMIF1 WR ONLY | 252.255321 606.915526 [IPU1-0] 235.025193 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 [IPU1-0] 235.025315 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 [IPU1-0] 235.026200 s: SCI_MA_MPU_P1 | 86.414913 347.237105 [IPU1-0] 235.026474 s: SCI_MA_MPU_P2 | 0.000000 0.000000 [IPU1-0] 235.027145 s: SCI_DSS | 108.501272 260.068396 [IPU1-0] 235.027267 s: SCI_IPU1 | 8.236708 31.516290 [IPU1-0] 235.027389 s: SCI_VIP1_P1 | 5.597743 8.367213 [IPU1-0] 235.027481 s: SCI_VIP1_P2 | 11.199666 16.550819 [IPU1-0] 235.027633 s: SCI_VPE_P1 | 0.000000 0.000000 [IPU1-0] 235.027755 s: SCI_VPE_P2 | 0.000000 0.000000 [IPU1-0] 235.027877 s: SCI_DSP1_MDMA | 13.851011 88.900834 [IPU1-0] 235.027969 s: SCI_DSP1_EDMA | 19.868974 157.143555 [IPU1-0] 235.028091 s: SCI_DSP2_MDMA | 0.102729 1.558375 [IPU1-0] 235.028182 s: SCI_DSP2_EDMA | 0.000000 0.000000 [IPU1-0] 235.028304 s: SCI_EVE1_TC0 | 203.576094 635.578439 [IPU1-0] 235.028396 s: SCI_EVE1_TC1 | 298.174472 862.216857 [IPU1-0] 235.028609 s: SCI_EVE2_TC0 | 203.490501 630.630456 [IPU1-0] 235.028731 s: SCI_EVE2_TC1 | 298.532028 860.491651 [IPU1-0] 235.028823 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 [IPU1-0] 235.028914 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 [IPU1-0] 235.029036 s: SCI_EDMA_TC1_RD | 7.958074 83.915319 [IPU1-0] 235.029158 s: SCI_EDMA_TC1_WR | 7.958304 83.915319 [IPU1-0] 235.029250 s: SCI_VIP2_P1 | 0.000000 0.000000 [IPU1-0] 235.029341 s: SCI_VIP2_P2 | 0.000000 0.000000 [IPU1-0] 235.029463 s: SCI_VIP3_P1 | 0.000000 0.000000 [IPU1-0] 235.029585 s: SCI_VIP3_P2 | 0.000000 0.000000 [IPU1-0] 235.029707 s: SCI_EVE3_TC0 | 203.399701 622.044120 [IPU1-0] 235.029829 s: SCI_EVE3_TC1 | 298.186714 860.370072 [IPU1-0] 235.029921 s: SCI_EVE4_TC0 | 203.484090 631.942063 [IPU1-0] 235.030043 s: SCI_EVE4_TC1 | 298.435920 859.513176 [IPU1-0] 235.030165 s: SCI_IVA | 0.000000 0.000000 [IPU1-0] 235.030256 s: SCI_GPU_P1 | 0.000000 0.000000 [IPU1-0] 235.030348 s: SCI_GPU_P2 | 0.000000 0.000000 [IPU1-0] 235.030470 s: SCI_GMAC_SW | 0.000000 0.000000 [IPU1-0] 235.030805 s: SCI_OCMC_RAM1 | 298.400696 861.168141 [IPU1-0] 235.030927 s: SCI_OCMC_RAM2 | 298.611762 859.616173 [IPU1-0] 235.031049 s: SCI_OCMC_RAM3 | 597.521011 1158.204344 [IPU1-0] 235.130787 s: [IPU1-0] 235.130879 s: [IPU1-0] 235.130970 s: [IPU1-0] 235.131031 s: ### CPU [IPU1-0], LinkID [ 68], [IPU1-0] 235.131092 s: [IPU1-0] 235.131153 s: [ CAPTURE ] Link Statistics, [IPU1-0] 235.131214 s: ****************************** [IPU1-0] 235.131275 s: [IPU1-0] 235.131306 s: Elapsed time = 154244 msec [IPU1-0] 235.131367 s: [IPU1-0] 235.131428 s: New data Recv = 30.0 fps [IPU1-0] 235.131489 s: Get Full Buf Cb = 21.47 fps [IPU1-0] 235.131611 s: Put Empty Buf Cb = 42.91 fps [IPU1-0] 235.131702 s: Driver/Notify Cb = 30.0 fps [IPU1-0] 235.131763 s: [IPU1-0] 235.131794 s: Input Statistics, [IPU1-0] 235.131855 s: [IPU1-0] 235.131885 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 235.131977 s: | FPS | FPS | FPS | FPS [IPU1-0] 235.132068 s: -------------------------------------------------- [IPU1-0] 235.132129 s: 0 | 21.44 0. 0 0. 0 21.44 [IPU1-0] 235.132282 s: [IPU1-0] 235.132312 s: Output Statistics, [IPU1-0] 235.132373 s: [IPU1-0] 235.132404 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 235.132465 s: | ID | FPS | FPS | FPS [IPU1-0] 235.132587 s: --------------------------------------------- [IPU1-0] 235.132678 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 235.132770 s: [IPU1-0] 235.132831 s: [ CAPTURE ] LATENCY, [IPU1-0] 235.132892 s: ******************** [IPU1-0] 235.132953 s: [IPU1-0] 235.132983 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! [IPU1-0] 235.133166 s: [IPU1-0] 235.133197 s: ### CPU [IPU1-0], LinkID [ 0], [IPU1-0] 235.133288 s: [IPU1-0] 235.133319 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 235.133380 s: ****************************** [IPU1-0] 235.133441 s: [IPU1-0] 235.133502 s: Elapsed time = 154246 msec [IPU1-0] 235.134112 s: [IPU1-0] 235.134264 s: New data Recv = 21.47 fps [IPU1-0] 235.134417 s: Release data Recv = 21.48 fps [IPU1-0] 235.134539 s: Driver/Notify Cb = 121.46 fps [IPU1-0] 235.135179 s: [IPU1-0] 235.135240 s: Input Statistics, [IPU1-0] 235.135301 s: [IPU1-0] 235.135332 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 235.135423 s: | FPS | FPS | FPS | FPS [IPU1-0] 235.135850 s: -------------------------------------------------- [IPU1-0] 235.135972 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 235.136094 s: [IPU1-0] 235.136125 s: Output Statistics, [IPU1-0] 235.136186 s: [IPU1-0] 235.136216 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 235.136308 s: | ID | FPS | FPS | FPS [IPU1-0] 235.136369 s: --------------------------------------------- [IPU1-0] 235.136460 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 235.136613 s: [IPU1-0] 235.136674 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 235.136735 s: ******************** [IPU1-0] 235.136796 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 92 us, [IPU1-0] 235.136918 s: Source to Link Latency : Avg = 221 us, Min = 152 us, Max = 519 us, [IPU1-0] 235.137009 s: [IPU1-0] 235.636826 s: [IPU1-0] 235.637070 s: ### CPU [ HOST], LinkID [ 10], [IPU1-0] 235.637162 s: [IPU1-0] 235.637192 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 235.637253 s: ****************************** [IPU1-0] 235.637314 s: [IPU1-0] 235.637375 s: Elapsed time = 154750 msec [IPU1-0] 235.637436 s: [IPU1-0] 235.637467 s: Get Full Buf Cb = 21.47 fps [IPU1-0] 235.637558 s: Put Empty Buf Cb = 21.47 fps [IPU1-0] 235.637650 s: Driver/Notify Cb = 21.47 fps [IPU1-0] 235.637741 s: [IPU1-0] 235.637802 s: Input Statistics, [IPU1-0] 235.637833 s: [IPU1-0] 235.637894 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 235.637955 s: | FPS | FPS | FPS | FPS [IPU1-0] 235.638046 s: -------------------------------------------------- [IPU1-0] 235.638138 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 235.638260 s: [IPU1-0] 235.638290 s: Output Statistics, [IPU1-0] 235.638351 s: [IPU1-0] 235.638382 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 235.638443 s: | ID | FPS | FPS | FPS [IPU1-0] 235.638534 s: --------------------------------------------- [IPU1-0] 235.638626 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 235.638748 s: [IPU1-0] 235.638778 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 235.638839 s: ******************** [IPU1-0] 235.638900 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 31 us, [IPU1-0] 235.639022 s: Source to Link Latency : Avg = 317 us, Min = 244 us, Max = 641 us, [IPU1-0] 235.639144 s: [IPU1-0] 235.639327 s: [IPU1-0] 235.639358 s: ### CPU [ HOST], LinkID [ 49], [IPU1-0] 235.639449 s: [IPU1-0] 235.639480 s: [ ALG_TIDLPREPROC ] Link Statistics, [IPU1-0] 235.639602 s: ****************************** [IPU1-0] 235.639693 s: [IPU1-0] 235.639724 s: Elapsed time = 154752 msec [IPU1-0] 235.639815 s: [IPU1-0] 235.639846 s: New data Recv = 21.47 fps [IPU1-0] 235.639937 s: [IPU1-0] 235.639968 s: Input Statistics, [IPU1-0] 235.640029 s: [IPU1-0] 235.640059 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 235.640151 s: | FPS | FPS | FPS | FPS [IPU1-0] 235.640242 s: -------------------------------------------------- [IPU1-0] 235.640334 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 235.640486 s: [IPU1-0] 235.640517 s: Output Statistics, [IPU1-0] 235.640883 s: [IPU1-0] 235.640944 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 235.641035 s: | ID | FPS | FPS | FPS [IPU1-0] 235.641127 s: --------------------------------------------- [IPU1-0] 235.641218 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 235.641371 s: [IPU1-0] 235.641401 s: [ ALG_TIDLPREPROC ] LATENCY, [IPU1-0] 235.641462 s: ******************** [IPU1-0] 235.641523 s: Local Link Latency : Avg = 524 us, Min = 366 us, Max = 1708 us, [IPU1-0] 235.641676 s: Source to Link Latency : Avg = 22494 us, Min = 16654 us, Max = 23821 us, [IPU1-0] 235.641828 s: [IPU1-0] 235.641950 s: [IPU1-0] 235.641981 s: ### CPU [ HOST], LinkID [ 3], [IPU1-0] 235.642072 s: [IPU1-0] 235.642103 s: [ IPC_OUT_3 ] Link Statistics, [IPU1-0] 235.642164 s: ****************************** [IPU1-0] 235.642225 s: [IPU1-0] 235.642286 s: Elapsed time = 154634 msec [IPU1-0] 235.642347 s: [IPU1-0] 235.642408 s: New data Recv = 5.37 fps [IPU1-0] 235.642469 s: Release data Recv = 5.36 fps [IPU1-0] 235.642591 s: Driver/Notify Cb = 105.35 fps [IPU1-0] 235.642652 s: [IPU1-0] 235.642713 s: Input Statistics, [IPU1-0] 235.642743 s: [IPU1-0] 235.642804 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 235.642865 s: | FPS | FPS | FPS | FPS [IPU1-0] 235.642957 s: -------------------------------------------------- [IPU1-0] 235.643018 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 235.643170 s: [IPU1-0] 235.643201 s: Output Statistics, [IPU1-0] 235.643262 s: [IPU1-0] 235.643292 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 235.643384 s: | ID | FPS | FPS | FPS [IPU1-0] 235.643445 s: --------------------------------------------- [IPU1-0] 235.643536 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 235.643658 s: [IPU1-0] 235.643719 s: [ IPC_OUT_3 ] LATENCY, [IPU1-0] 235.643780 s: ******************** [IPU1-0] 235.643841 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 235.643963 s: Source to Link Latency : Avg = 22551 us, Min = 21625 us, Max = 23700 us, [IPU1-0] 235.644055 s: [IPU1-0] 236.144238 s: [IPU1-0] 236.144390 s: ### CPU [ EVE4], LinkID [ 10], [IPU1-0] 236.145000 s: [IPU1-0] 236.145061 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 236.145122 s: ****************************** [IPU1-0] 236.145183 s: [IPU1-0] 236.145244 s: Elapsed time = 155135 msec [IPU1-0] 236.145305 s: [IPU1-0] 236.145336 s: Get Full Buf Cb = 5.36 fps [IPU1-0] 236.145427 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 236.145488 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 236.145854 s: [IPU1-0] 236.145915 s: Input Statistics, [IPU1-0] 236.145976 s: [IPU1-0] 236.146007 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 236.146098 s: | FPS | FPS | FPS | FPS [IPU1-0] 236.146159 s: -------------------------------------------------- [IPU1-0] 236.146251 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 236.146373 s: [IPU1-0] 236.146403 s: Output Statistics, [IPU1-0] 236.146464 s: [IPU1-0] 236.146495 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 236.146617 s: | ID | FPS | FPS | FPS [IPU1-0] 236.146708 s: --------------------------------------------- [IPU1-0] 236.146769 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 236.146891 s: [IPU1-0] 236.146952 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 236.147013 s: ******************** [IPU1-0] 236.147044 s: Local Link Latency : Avg = 35 us, Min = 30 us, Max = 153 us, [IPU1-0] 236.147166 s: Source to Link Latency : Avg = 49352 us, Min = 21930 us, Max = 73782 us, [IPU1-0] 236.147928 s: [IPU1-0] 236.148111 s: [IPU1-0] 236.148142 s: ### CPU [ EVE4], LinkID [ 49], [IPU1-0] 236.148234 s: [IPU1-0] 236.148264 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 236.148325 s: ****************************** [IPU1-0] 236.148417 s: [IPU1-0] 236.148447 s: Elapsed time = 155139 msec [IPU1-0] 236.148508 s: [IPU1-0] 236.148569 s: New data Recv = 5.36 fps [IPU1-0] 236.148691 s: [IPU1-0] 236.148722 s: Input Statistics, [IPU1-0] 236.148844 s: [IPU1-0] 236.148905 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 236.148996 s: | FPS | FPS | FPS | FPS [IPU1-0] 236.149057 s: -------------------------------------------------- [IPU1-0] 236.149179 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 236.149301 s: [IPU1-0] 236.149332 s: Output Statistics, [IPU1-0] 236.149393 s: [IPU1-0] 236.149454 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 236.149515 s: | ID | FPS | FPS | FPS [IPU1-0] 236.149637 s: --------------------------------------------- [IPU1-0] 236.149698 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 236.149820 s: [IPU1-0] 236.149881 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 236.149942 s: ******************** [IPU1-0] 236.150003 s: Local Link Latency : Avg = 185543 us, Min = 184622 us, Max = 186360 us, [IPU1-0] 236.150125 s: Source to Link Latency : Avg = 235088 us, Min = 206765 us, Max = 259532 us, [IPU1-0] 236.150247 s: [IPU1-0] 236.150369 s: [IPU1-0] 236.150430 s: ### CPU [ EVE4], LinkID [ 0], [IPU1-0] 236.150491 s: [IPU1-0] 236.150552 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 236.150857 s: ****************************** [IPU1-0] 236.150948 s: [IPU1-0] 236.151009 s: Elapsed time = 154956 msec [IPU1-0] 236.151070 s: [IPU1-0] 236.151131 s: New data Recv = 5.36 fps [IPU1-0] 236.151192 s: Release data Recv = 5.36 fps [IPU1-0] 236.151284 s: Driver/Notify Cb = 15.37 fps [IPU1-0] 236.151375 s: [IPU1-0] 236.151406 s: Input Statistics, [IPU1-0] 236.151467 s: [IPU1-0] 236.151497 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 236.151619 s: | FPS | FPS | FPS | FPS [IPU1-0] 236.151711 s: -------------------------------------------------- [IPU1-0] 236.151802 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 236.151924 s: [IPU1-0] 236.151985 s: Output Statistics, [IPU1-0] 236.152016 s: [IPU1-0] 236.152077 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 236.152138 s: | ID | FPS | FPS | FPS [IPU1-0] 236.152229 s: --------------------------------------------- [IPU1-0] 236.152321 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 236.152412 s: [IPU1-0] 236.152473 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 236.152534 s: ******************** [IPU1-0] 236.152626 s: Local Link Latency : Avg = 27 us, Min = 0 us, Max = 122 us, [IPU1-0] 236.152748 s: Source to Link Latency : Avg = 235451 us, Min = 207314 us, Max = 259898 us, [IPU1-0] 236.152870 s: [IPU1-0] 236.652687 s: [IPU1-0] 236.652778 s: ### CPU [ DSP1], LinkID [ 13], [IPU1-0] 236.652839 s: [IPU1-0] 236.652900 s: [ IPC_IN_3 ] Link Statistics, [IPU1-0] 236.652961 s: ****************************** [IPU1-0] 236.653022 s: [IPU1-0] 236.653053 s: Elapsed time = 155458 msec [IPU1-0] 236.653388 s: [IPU1-0] 236.653449 s: Get Full Buf Cb = 21.46 fps [IPU1-0] 236.653541 s: Put Empty Buf Cb = 5.37 fps [IPU1-0] 236.653632 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 236.653724 s: [IPU1-0] 236.653785 s: Input Statistics, [IPU1-0] 236.653815 s: [IPU1-0] 236.653876 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 236.653937 s: | FPS | FPS | FPS | FPS [IPU1-0] 236.654029 s: -------------------------------------------------- [IPU1-0] 236.654120 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 236.654242 s: [IPU1-0] 236.654303 s: Output Statistics, [IPU1-0] 236.654334 s: [IPU1-0] 236.654395 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 236.654456 s: | ID | FPS | FPS | FPS [IPU1-0] 236.654547 s: --------------------------------------------- [IPU1-0] 236.654639 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 236.654761 s: [IPU1-0] 236.654822 s: [ IPC_IN_3 ] LATENCY, [IPU1-0] 236.654883 s: ******************** [IPU1-0] 236.654944 s: Local Link Latency : Avg = 9 us, Min = 0 us, Max = 31 us, [IPU1-0] 236.655066 s: Source to Link Latency : Avg = 235622 us, Min = 207497 us, Max = 260050 us, [IPU1-0] 236.655157 s: [IPU1-0] 237.154730 s: [IPU1-0] 237.154822 s: ### CPU [ HOST], LinkID [ 2], [IPU1-0] 237.154913 s: [IPU1-0] 237.154944 s: [ IPC_OUT_2 ] Link Statistics, [IPU1-0] 237.155005 s: ****************************** [IPU1-0] 237.155066 s: [IPU1-0] 237.155096 s: Elapsed time = 156184 msec [IPU1-0] 237.155188 s: [IPU1-0] 237.155218 s: New data Recv = 5.37 fps [IPU1-0] 237.155279 s: Release data Recv = 5.36 fps [IPU1-0] 237.155432 s: Driver/Notify Cb = 105.36 fps [IPU1-0] 237.155523 s: [IPU1-0] 237.155554 s: Input Statistics, [IPU1-0] 237.155889 s: [IPU1-0] 237.155920 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 237.156011 s: | FPS | FPS | FPS | FPS [IPU1-0] 237.156103 s: -------------------------------------------------- [IPU1-0] 237.156194 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 237.156316 s: [IPU1-0] 237.156347 s: Output Statistics, [IPU1-0] 237.156408 s: [IPU1-0] 237.156438 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 237.156530 s: | ID | FPS | FPS | FPS [IPU1-0] 237.156591 s: --------------------------------------------- [IPU1-0] 237.156713 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 237.156835 s: [IPU1-0] 237.156896 s: [ IPC_OUT_2 ] LATENCY, [IPU1-0] 237.156957 s: ******************** [IPU1-0] 237.157018 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 237.157140 s: Source to Link Latency : Avg = 22547 us, Min = 16745 us, Max = 23852 us, [IPU1-0] 237.157262 s: [IPU1-0] 237.656743 s: [IPU1-0] 237.656804 s: ### CPU [ EVE3], LinkID [ 10], [IPU1-0] 237.656896 s: [IPU1-0] 237.656926 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 237.657018 s: ****************************** [IPU1-0] 237.657079 s: [IPU1-0] 237.657109 s: Elapsed time = 156686 msec [IPU1-0] 237.657170 s: [IPU1-0] 237.657231 s: Get Full Buf Cb = 5.36 fps [IPU1-0] 237.657323 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 237.657384 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 237.657475 s: [IPU1-0] 237.657506 s: Input Statistics, [IPU1-0] 237.657567 s: [IPU1-0] 237.657597 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 237.657719 s: | FPS | FPS | FPS | FPS [IPU1-0] 237.657811 s: -------------------------------------------------- [IPU1-0] 237.657902 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 237.658024 s: [IPU1-0] 237.658055 s: Output Statistics, [IPU1-0] 237.658116 s: [IPU1-0] 237.658177 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 237.658238 s: | ID | FPS | FPS | FPS [IPU1-0] 237.658329 s: --------------------------------------------- [IPU1-0] 237.658390 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 237.658512 s: [IPU1-0] 237.658543 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 237.658634 s: ******************** [IPU1-0] 237.658695 s: Local Link Latency : Avg = 36 us, Min = 30 us, Max = 122 us, [IPU1-0] 237.658817 s: Source to Link Latency : Avg = 49229 us, Min = 17050 us, Max = 69298 us, [IPU1-0] 237.658939 s: [IPU1-0] 237.659061 s: [IPU1-0] 237.659092 s: ### CPU [ EVE3], LinkID [ 49], [IPU1-0] 237.659183 s: [IPU1-0] 237.659214 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 237.659275 s: ****************************** [IPU1-0] 237.659336 s: [IPU1-0] 237.659397 s: Elapsed time = 156688 msec [IPU1-0] 237.659458 s: [IPU1-0] 237.659488 s: New data Recv = 5.36 fps [IPU1-0] 237.659580 s: [IPU1-0] 237.659610 s: Input Statistics, [IPU1-0] 237.659702 s: [IPU1-0] 237.659732 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 237.659824 s: | FPS | FPS | FPS | FPS [IPU1-0] 237.659915 s: -------------------------------------------------- [IPU1-0] 237.659976 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 237.660129 s: [IPU1-0] 237.660159 s: Output Statistics, [IPU1-0] 237.660220 s: [IPU1-0] 237.660251 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 237.660312 s: | ID | FPS | FPS | FPS [IPU1-0] 237.660403 s: --------------------------------------------- [IPU1-0] 237.660464 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 237.660586 s: [IPU1-0] 237.660861 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 237.660952 s: ******************** [IPU1-0] 237.661013 s: Local Link Latency : Avg = 185542 us, Min = 184713 us, Max = 186574 us, [IPU1-0] 237.661135 s: Source to Link Latency : Avg = 234977 us, Min = 202343 us, Max = 255933 us, [IPU1-0] 237.661257 s: [IPU1-0] 237.661379 s: [IPU1-0] 237.661410 s: ### CPU [ EVE3], LinkID [ 0], [IPU1-0] 237.661471 s: [IPU1-0] 237.661532 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 237.661593 s: ****************************** [IPU1-0] 237.661715 s: [IPU1-0] 237.661776 s: Elapsed time = 156505 msec [IPU1-0] 237.661837 s: [IPU1-0] 237.661898 s: New data Recv = 5.36 fps [IPU1-0] 237.661959 s: Release data Recv = 5.36 fps [IPU1-0] 237.662050 s: Driver/Notify Cb = 15.36 fps [IPU1-0] 237.662111 s: [IPU1-0] 237.662142 s: Input Statistics, [IPU1-0] 237.662203 s: [IPU1-0] 237.662233 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 237.662325 s: | FPS | FPS | FPS | FPS [IPU1-0] 237.662416 s: -------------------------------------------------- [IPU1-0] 237.662477 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 237.662630 s: [IPU1-0] 237.662691 s: Output Statistics, [IPU1-0] 237.662752 s: [IPU1-0] 237.662782 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 237.662843 s: | ID | FPS | FPS | FPS [IPU1-0] 237.662935 s: --------------------------------------------- [IPU1-0] 237.662996 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 237.663118 s: [IPU1-0] 237.663148 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 237.663209 s: ******************** [IPU1-0] 237.663270 s: Local Link Latency : Avg = 27 us, Min = 0 us, Max = 122 us, [IPU1-0] 237.663392 s: Source to Link Latency : Avg = 235344 us, Min = 202892 us, Max = 256299 us, [IPU1-0] 237.663514 s: [IPU1-0] 238.162721 s: [IPU1-0] 238.162813 s: ### CPU [ DSP1], LinkID [ 12], [IPU1-0] 238.162874 s: [IPU1-0] 238.162935 s: [ IPC_IN_2 ] Link Statistics, [IPU1-0] 238.162996 s: ****************************** [IPU1-0] 238.163057 s: [IPU1-0] 238.163087 s: Elapsed time = 157005 msec [IPU1-0] 238.163148 s: [IPU1-0] 238.163209 s: Get Full Buf Cb = 21.46 fps [IPU1-0] 238.163270 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 238.163362 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 238.163453 s: [IPU1-0] 238.163484 s: Input Statistics, [IPU1-0] 238.163545 s: [IPU1-0] 238.163575 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 238.163697 s: | FPS | FPS | FPS | FPS [IPU1-0] 238.163789 s: -------------------------------------------------- [IPU1-0] 238.163850 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 238.164002 s: [IPU1-0] 238.164033 s: Output Statistics, [IPU1-0] 238.164094 s: [IPU1-0] 238.164124 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 238.164216 s: | ID | FPS | FPS | FPS [IPU1-0] 238.164277 s: --------------------------------------------- [IPU1-0] 238.164368 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 238.164490 s: [IPU1-0] 238.164521 s: [ IPC_IN_2 ] LATENCY, [IPU1-0] 238.164582 s: ******************** [IPU1-0] 238.164673 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 31 us, [IPU1-0] 238.164795 s: Source to Link Latency : Avg = 235517 us, Min = 203044 us, Max = 256451 us, [IPU1-0] 238.164917 s: [IPU1-0] 238.664856 s: [IPU1-0] 238.664948 s: ### CPU [ HOST], LinkID [ 1], [IPU1-0] 238.665009 s: [IPU1-0] 238.665070 s: [ IPC_OUT_1 ] Link Statistics, [IPU1-0] 238.665131 s: ****************************** [IPU1-0] 238.665192 s: [IPU1-0] 238.665222 s: Elapsed time = 157728 msec [IPU1-0] 238.665314 s: [IPU1-0] 238.665344 s: New data Recv = 5.37 fps [IPU1-0] 238.665405 s: Release data Recv = 5.36 fps [IPU1-0] 238.665497 s: Driver/Notify Cb = 105.36 fps [IPU1-0] 238.665558 s: [IPU1-0] 238.665619 s: Input Statistics, [IPU1-0] 238.665893 s: [IPU1-0] 238.665954 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 238.666046 s: | FPS | FPS | FPS | FPS [IPU1-0] 238.666107 s: -------------------------------------------------- [IPU1-0] 238.666198 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 238.666351 s: [IPU1-0] 238.666381 s: Output Statistics, [IPU1-0] 238.666442 s: [IPU1-0] 238.666473 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 238.666534 s: | ID | FPS | FPS | FPS [IPU1-0] 238.666625 s: --------------------------------------------- [IPU1-0] 238.666717 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 238.666839 s: [IPU1-0] 238.666900 s: [ IPC_OUT_1 ] LATENCY, [IPU1-0] 238.666961 s: ******************** [IPU1-0] 238.667022 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 238.667144 s: Source to Link Latency : Avg = 22501 us, Min = 16684 us, Max = 23729 us, [IPU1-0] 238.667266 s: [IPU1-0] 239.166809 s: [IPU1-0] 239.166900 s: ### CPU [ EVE2], LinkID [ 10], [IPU1-0] 239.166992 s: [IPU1-0] 239.167022 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 239.167083 s: ****************************** [IPU1-0] 239.167175 s: [IPU1-0] 239.167205 s: Elapsed time = 158229 msec [IPU1-0] 239.167266 s: [IPU1-0] 239.167327 s: Get Full Buf Cb = 5.37 fps [IPU1-0] 239.167388 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 239.167480 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 239.167571 s: [IPU1-0] 239.167602 s: Input Statistics, [IPU1-0] 239.167693 s: [IPU1-0] 239.167754 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 239.167846 s: | FPS | FPS | FPS | FPS [IPU1-0] 239.167907 s: -------------------------------------------------- [IPU1-0] 239.167998 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 239.168151 s: [IPU1-0] 239.168181 s: Output Statistics, [IPU1-0] 239.168242 s: [IPU1-0] 239.168273 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 239.168364 s: | ID | FPS | FPS | FPS [IPU1-0] 239.168425 s: --------------------------------------------- [IPU1-0] 239.168791 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 239.169066 s: [IPU1-0] 239.169127 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 239.169340 s: ******************** [IPU1-0] 239.169401 s: Local Link Latency : Avg = 35 us, Min = 30 us, Max = 122 us, [IPU1-0] 239.169523 s: Source to Link Latency : Avg = 49163 us, Min = 16989 us, Max = 68749 us, [IPU1-0] 239.169645 s: [IPU1-0] 239.169798 s: [IPU1-0] 239.169859 s: ### CPU [ EVE2], LinkID [ 49], [IPU1-0] 239.169950 s: [IPU1-0] 239.169981 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 239.170042 s: ****************************** [IPU1-0] 239.170103 s: [IPU1-0] 239.170133 s: Elapsed time = 158232 msec [IPU1-0] 239.170225 s: [IPU1-0] 239.170255 s: New data Recv = 5.37 fps [IPU1-0] 239.170347 s: [IPU1-0] 239.170377 s: Input Statistics, [IPU1-0] 239.170438 s: [IPU1-0] 239.170469 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 239.170530 s: | FPS | FPS | FPS | FPS [IPU1-0] 239.170621 s: -------------------------------------------------- [IPU1-0] 239.170957 s: 0 | 5.37 0. 0 0. 0 5.36 [IPU1-0] 239.171109 s: [IPU1-0] 239.171140 s: Output Statistics, [IPU1-0] 239.171201 s: [IPU1-0] 239.171231 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 239.171323 s: | ID | FPS | FPS | FPS [IPU1-0] 239.171384 s: --------------------------------------------- [IPU1-0] 239.171475 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 239.171597 s: [IPU1-0] 239.171628 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 239.171719 s: ******************** [IPU1-0] 239.171811 s: Local Link Latency : Avg = 185529 us, Min = 184499 us, Max = 186512 us, [IPU1-0] 239.171933 s: Source to Link Latency : Avg = 234895 us, Min = 201733 us, Max = 255719 us, [IPU1-0] 239.172055 s: [IPU1-0] 239.172146 s: [IPU1-0] 239.172207 s: ### CPU [ EVE2], LinkID [ 0], [IPU1-0] 239.172268 s: [IPU1-0] 239.172299 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 239.172390 s: ****************************** [IPU1-0] 239.172451 s: [IPU1-0] 239.172482 s: Elapsed time = 158050 msec [IPU1-0] 239.172543 s: [IPU1-0] 239.172604 s: New data Recv = 5.37 fps [IPU1-0] 239.172695 s: Release data Recv = 5.37 fps [IPU1-0] 239.172787 s: Driver/Notify Cb = 15.36 fps [IPU1-0] 239.172848 s: [IPU1-0] 239.172909 s: Input Statistics, [IPU1-0] 239.172939 s: [IPU1-0] 239.173000 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 239.173061 s: | FPS | FPS | FPS | FPS [IPU1-0] 239.173153 s: -------------------------------------------------- [IPU1-0] 239.173214 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 239.173366 s: [IPU1-0] 239.173397 s: Output Statistics, [IPU1-0] 239.173458 s: [IPU1-0] 239.173488 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 239.173549 s: | ID | FPS | FPS | FPS [IPU1-0] 239.173641 s: --------------------------------------------- [IPU1-0] 239.173732 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 239.173854 s: [IPU1-0] 239.173885 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 239.173946 s: ******************** [IPU1-0] 239.174007 s: Local Link Latency : Avg = 29 us, Min = 0 us, Max = 122 us, [IPU1-0] 239.174129 s: Source to Link Latency : Avg = 235266 us, Min = 202312 us, Max = 256085 us, [IPU1-0] 239.174251 s: [IPU1-0] 239.673763 s: [IPU1-0] 239.673854 s: ### CPU [ DSP1], LinkID [ 11], [IPU1-0] 239.673915 s: [IPU1-0] 239.673976 s: [ IPC_IN_1 ] Link Statistics, [IPU1-0] 239.674037 s: ****************************** [IPU1-0] 239.674098 s: [IPU1-0] 239.674159 s: Elapsed time = 158550 msec [IPU1-0] 239.674220 s: [IPU1-0] 239.674251 s: Get Full Buf Cb = 21.46 fps [IPU1-0] 239.674342 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 239.674403 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 239.674495 s: [IPU1-0] 239.674525 s: Input Statistics, [IPU1-0] 239.674586 s: [IPU1-0] 239.674617 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 239.674739 s: | FPS | FPS | FPS | FPS [IPU1-0] 239.674830 s: -------------------------------------------------- [IPU1-0] 239.674922 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 239.675044 s: [IPU1-0] 239.675074 s: Output Statistics, [IPU1-0] 239.675135 s: [IPU1-0] 239.675166 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 239.675257 s: | ID | FPS | FPS | FPS [IPU1-0] 239.675318 s: --------------------------------------------- [IPU1-0] 239.675410 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 239.675532 s: [IPU1-0] 239.675562 s: [ IPC_IN_1 ] LATENCY, [IPU1-0] 239.675623 s: ******************** [IPU1-0] 239.675928 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 31 us, [IPU1-0] 239.676050 s: Source to Link Latency : Avg = 235443 us, Min = 202465 us, Max = 256237 us, [IPU1-0] 239.676172 s: [IPU1-0] 240.175989 s: [IPU1-0] 240.176081 s: ### CPU [ HOST], LinkID [ 0], [IPU1-0] 240.176142 s: [IPU1-0] 240.176172 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 240.176264 s: ****************************** [IPU1-0] 240.176325 s: [IPU1-0] 240.176355 s: Elapsed time = 159272 msec [IPU1-0] 240.176416 s: [IPU1-0] 240.176477 s: New data Recv = 5.36 fps [IPU1-0] 240.176538 s: Release data Recv = 5.36 fps [IPU1-0] 240.176630 s: Driver/Notify Cb = 105.36 fps [IPU1-0] 240.176721 s: [IPU1-0] 240.176782 s: Input Statistics, [IPU1-0] 240.176813 s: [IPU1-0] 240.176874 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 240.176935 s: | FPS | FPS | FPS | FPS [IPU1-0] 240.177026 s: -------------------------------------------------- [IPU1-0] 240.177087 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 240.177240 s: [IPU1-0] 240.177270 s: Output Statistics, [IPU1-0] 240.177331 s: [IPU1-0] 240.177362 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 240.177423 s: | ID | FPS | FPS | FPS [IPU1-0] 240.177514 s: --------------------------------------------- [IPU1-0] 240.177575 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 240.177728 s: [IPU1-0] 240.177758 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 240.177819 s: ******************** [IPU1-0] 240.177880 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 240.178002 s: Source to Link Latency : Avg = 22467 us, Min = 16745 us, Max = 23669 us, [IPU1-0] 240.178124 s: [IPU1-0] 240.677819 s: [IPU1-0] 240.677880 s: ### CPU [ EVE1], LinkID [ 10], [IPU1-0] 240.677972 s: [IPU1-0] 240.678002 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 240.678094 s: ****************************** [IPU1-0] 240.678155 s: [IPU1-0] 240.678185 s: Elapsed time = 159773 msec [IPU1-0] 240.678246 s: [IPU1-0] 240.678307 s: Get Full Buf Cb = 5.37 fps [IPU1-0] 240.678368 s: Put Empty Buf Cb = 5.36 fps [IPU1-0] 240.678460 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 240.678521 s: [IPU1-0] 240.678582 s: Input Statistics, [IPU1-0] 240.678612 s: [IPU1-0] 240.678673 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 240.678765 s: | FPS | FPS | FPS | FPS [IPU1-0] 240.678856 s: -------------------------------------------------- [IPU1-0] 240.678948 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 240.679070 s: [IPU1-0] 240.679131 s: Output Statistics, [IPU1-0] 240.679192 s: [IPU1-0] 240.679222 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 240.679314 s: | ID | FPS | FPS | FPS [IPU1-0] 240.679405 s: --------------------------------------------- [IPU1-0] 240.679680 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 240.679832 s: [IPU1-0] 240.679893 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 240.679954 s: ******************** [IPU1-0] 240.680015 s: Local Link Latency : Avg = 34 us, Min = 30 us, Max = 153 us, [IPU1-0] 240.680137 s: Source to Link Latency : Avg = 49510 us, Min = 17080 us, Max = 67925 us, [IPU1-0] 240.680259 s: [IPU1-0] 240.680381 s: [IPU1-0] 240.680412 s: ### CPU [ EVE1], LinkID [ 49], [IPU1-0] 240.680503 s: [IPU1-0] 240.680534 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 240.680595 s: ****************************** [IPU1-0] 240.680656 s: [IPU1-0] 240.680930 s: Elapsed time = 159776 msec [IPU1-0] 240.681022 s: [IPU1-0] 240.681083 s: New data Recv = 5.37 fps [IPU1-0] 240.681144 s: [IPU1-0] 240.681205 s: Input Statistics, [IPU1-0] 240.681235 s: [IPU1-0] 240.681296 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 240.681357 s: | FPS | FPS | FPS | FPS [IPU1-0] 240.681449 s: -------------------------------------------------- [IPU1-0] 240.681540 s: 0 | 5.37 0. 0 0. 0 5.36 [IPU1-0] 240.681662 s: [IPU1-0] 240.681723 s: Output Statistics, [IPU1-0] 240.681784 s: [IPU1-0] 240.681845 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 240.681906 s: | ID | FPS | FPS | FPS [IPU1-0] 240.681998 s: --------------------------------------------- [IPU1-0] 240.682059 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 240.682181 s: [IPU1-0] 240.682242 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 240.682303 s: ******************** [IPU1-0] 240.682333 s: Local Link Latency : Avg = 185530 us, Min = 183676 us, Max = 186604 us, [IPU1-0] 240.682455 s: Source to Link Latency : Avg = 235250 us, Min = 200970 us, Max = 253645 us, [IPU1-0] 240.682577 s: [IPU1-0] 240.682730 s: [IPU1-0] 240.682791 s: ### CPU [ EVE1], LinkID [ 0], [IPU1-0] 240.682852 s: [IPU1-0] 240.682913 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 240.682974 s: ****************************** [IPU1-0] 240.683035 s: [IPU1-0] 240.683065 s: Elapsed time = 159594 msec [IPU1-0] 240.683157 s: [IPU1-0] 240.683187 s: New data Recv = 5.36 fps [IPU1-0] 240.683279 s: Release data Recv = 5.36 fps [IPU1-0] 240.683340 s: Driver/Notify Cb = 15.36 fps [IPU1-0] 240.683431 s: [IPU1-0] 240.683462 s: Input Statistics, [IPU1-0] 240.683523 s: [IPU1-0] 240.683553 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 240.683645 s: | FPS | FPS | FPS | FPS [IPU1-0] 240.683828 s: -------------------------------------------------- [IPU1-0] 240.683950 s: 0 | 5.36 0. 0 0. 0 5.36 [IPU1-0] 240.684072 s: [IPU1-0] 240.684102 s: Output Statistics, [IPU1-0] 240.684163 s: [IPU1-0] 240.684224 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 240.684285 s: | ID | FPS | FPS | FPS [IPU1-0] 240.684560 s: --------------------------------------------- [IPU1-0] 240.684651 s: 0 | 0 5.36 0. 0 0. 0 [IPU1-0] 240.684834 s: [IPU1-0] 240.684865 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 240.684926 s: ******************** [IPU1-0] 240.684987 s: Local Link Latency : Avg = 27 us, Min = 0 us, Max = 122 us, [IPU1-0] 240.685109 s: Source to Link Latency : Avg = 235622 us, Min = 201519 us, Max = 253980 us, [IPU1-0] 240.685231 s: [IPU1-0] 241.184956 s: [IPU1-0] 241.185048 s: ### CPU [ DSP1], LinkID [ 10], [IPU1-0] 241.185109 s: [IPU1-0] 241.185139 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 241.185231 s: ****************************** [IPU1-0] 241.185292 s: [IPU1-0] 241.185323 s: Elapsed time = 160096 msec [IPU1-0] 241.185414 s: [IPU1-0] 241.185445 s: Get Full Buf Cb = 21.46 fps [IPU1-0] 241.185536 s: Put Empty Buf Cb = 5.37 fps [IPU1-0] 241.185597 s: Driver/Notify Cb = 5.36 fps [IPU1-0] 241.185689 s: [IPU1-0] 241.185963 s: Input Statistics, [IPU1-0] 241.186055 s: [IPU1-0] 241.186085 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.186177 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.186238 s: -------------------------------------------------- [IPU1-0] 241.186329 s: 0 | 5.37 0. 0 0. 0 5.37 [IPU1-0] 241.186451 s: [IPU1-0] 241.186482 s: Output Statistics, [IPU1-0] 241.186543 s: [IPU1-0] 241.186573 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.186665 s: | ID | FPS | FPS | FPS [IPU1-0] 241.186787 s: --------------------------------------------- [IPU1-0] 241.186878 s: 0 | 0 5.37 0. 0 0. 0 [IPU1-0] 241.187000 s: [IPU1-0] 241.187031 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 241.187092 s: ******************** [IPU1-0] 241.187153 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 31 us, [IPU1-0] 241.187275 s: Source to Link Latency : Avg = 235781 us, Min = 201671 us, Max = 254133 us, [IPU1-0] 241.187397 s: [IPU1-0] 241.187427 s: CPU [ DSP1], LinkID [ 38], Link Statistics not available ! [IPU1-0] 241.187610 s: [IPU1-0] 241.187641 s: ### CPU [ DSP1], LinkID [ 49], [IPU1-0] 241.187763 s: [IPU1-0] 241.187793 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 241.187854 s: ****************************** [IPU1-0] 241.187946 s: [IPU1-0] 241.187976 s: Elapsed time = 160098 msec [IPU1-0] 241.188037 s: [IPU1-0] 241.188098 s: New data Recv = 42.93 fps [IPU1-0] 241.188159 s: [IPU1-0] 241.188220 s: Input Statistics, [IPU1-0] 241.188251 s: [IPU1-0] 241.188312 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.188373 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.188464 s: -------------------------------------------------- [IPU1-0] 241.188556 s: 0 | 21.46 0. 0 0. 0 21.46 [IPU1-0] 241.188708 s: [IPU1-0] 241.188769 s: Output Statistics, [IPU1-0] 241.188830 s: [IPU1-0] 241.188861 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.188922 s: | ID | FPS | FPS | FPS [IPU1-0] 241.189013 s: --------------------------------------------- [IPU1-0] 241.189105 s: 0 | 0 21.46 0. 0 0. 0 [IPU1-0] 241.189196 s: [IPU1-0] 241.189257 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 241.189318 s: ******************** [IPU1-0] 241.189349 s: Local Link Latency : Avg = 18867 us, Min = 18636 us, Max = 24553 us, [IPU1-0] 241.189471 s: Source to Link Latency : Avg = 254509 us, Min = 220704 us, Max = 279296 us, [IPU1-0] 241.189593 s: [IPU1-0] 241.189745 s: [IPU1-0] 241.189806 s: ### CPU [ DSP1], LinkID [ 0], [IPU1-0] 241.189867 s: [IPU1-0] 241.189898 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 241.189989 s: ****************************** [IPU1-0] 241.190050 s: [IPU1-0] 241.190081 s: Elapsed time = 160081 msec [IPU1-0] 241.190142 s: [IPU1-0] 241.190203 s: New data Recv = 21.47 fps [IPU1-0] 241.190264 s: Release data Recv = 21.48 fps [IPU1-0] 241.190355 s: Driver/Notify Cb = 121.46 fps [IPU1-0] 241.190416 s: [IPU1-0] 241.190447 s: Input Statistics, [IPU1-0] 241.190508 s: [IPU1-0] 241.190538 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.190630 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.190691 s: -------------------------------------------------- [IPU1-0] 241.190996 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 241.191148 s: [IPU1-0] 241.191209 s: Output Statistics, [IPU1-0] 241.191240 s: [IPU1-0] 241.191270 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.191362 s: | ID | FPS | FPS | FPS [IPU1-0] 241.191423 s: --------------------------------------------- [IPU1-0] 241.191514 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 241.191636 s: [IPU1-0] 241.191667 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 241.191758 s: ******************** [IPU1-0] 241.191850 s: Local Link Latency : Avg = 2 us, Min = 0 us, Max = 31 us, [IPU1-0] 241.191941 s: Source to Link Latency : Avg = 254606 us, Min = 220795 us, Max = 279449 us, [IPU1-0] 241.192063 s: [IPU1-0] 241.691850 s: [IPU1-0] 241.691911 s: ### CPU [IPU1-0], LinkID [ 10], [IPU1-0] 241.692002 s: [IPU1-0] 241.692033 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 241.692094 s: ****************************** [IPU1-0] 241.692155 s: [IPU1-0] 241.692185 s: Elapsed time = 160583 msec [IPU1-0] 241.692277 s: [IPU1-0] 241.692307 s: Get Full Buf Cb = 42.93 fps [IPU1-0] 241.692399 s: Put Empty Buf Cb = 21.47 fps [IPU1-0] 241.692460 s: Driver/Notify Cb = 21.46 fps [IPU1-0] 241.692551 s: [IPU1-0] 241.692582 s: Input Statistics, [IPU1-0] 241.692643 s: [IPU1-0] 241.692673 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.692765 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.692856 s: -------------------------------------------------- [IPU1-0] 241.692948 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 241.693070 s: [IPU1-0] 241.693131 s: Output Statistics, [IPU1-0] 241.693161 s: [IPU1-0] 241.693222 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.693283 s: | ID | FPS | FPS | FPS [IPU1-0] 241.693344 s: --------------------------------------------- [IPU1-0] 241.693436 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 241.693558 s: [IPU1-0] 241.693588 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 241.693649 s: ******************** [IPU1-0] 241.693710 s: Local Link Latency : Avg = 22 us, Min = 0 us, Max = 213 us, [IPU1-0] 241.693832 s: Source to Link Latency : Avg = 254773 us, Min = 220978 us, Max = 279601 us, [IPU1-0] 241.693985 s: [IPU1-0] 241.694015 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! [IPU1-0] 241.694198 s: [IPU1-0] 241.694229 s: ### CPU [IPU1-0], LinkID [ 34], [IPU1-0] 241.694290 s: [IPU1-0] 241.694351 s: [ SYNC_0 ] Link Statistics, [IPU1-0] 241.694412 s: ****************************** [IPU1-0] 241.694473 s: [IPU1-0] 241.694503 s: Elapsed time = 160867 msec [IPU1-0] 241.694564 s: [IPU1-0] 241.694625 s: New data Recv = 72.97 fps [IPU1-0] 241.694686 s: Get Full Buf Cb = 21.43 fps [IPU1-0] 241.694808 s: Put Empty Buf Cb = 21.43 fps [IPU1-0] 241.694900 s: Driver/Notify Cb = 30.29 fps [IPU1-0] 241.694961 s: [IPU1-0] 241.694991 s: Input Statistics, [IPU1-0] 241.695052 s: [IPU1-0] 241.695083 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.695174 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.695266 s: -------------------------------------------------- [IPU1-0] 241.695327 s: 0 | 21.46 0. 0 0. 0 21.43 [IPU1-0] 241.695479 s: 1 | 21.43 0. 0 0. 0 21.43 [IPU1-0] 241.695601 s: [IPU1-0] 241.695632 s: Output Statistics, [IPU1-0] 241.695693 s: [IPU1-0] 241.695967 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.696059 s: | ID | FPS | FPS | FPS [IPU1-0] 241.696150 s: --------------------------------------------- [IPU1-0] 241.696211 s: 0 | 0 21.43 0. 0 0. 0 [IPU1-0] 241.696333 s: [IPU1-0] 241.696364 s: [ SYNC_0 ] LATENCY, [IPU1-0] 241.696425 s: ******************** [IPU1-0] 241.696486 s: Local Link Latency : Avg = 127331 us, Min = 30 us, Max = 279662 us, [IPU1-0] 241.696608 s: Source to Link Latency : Avg = 254981 us, Min = 221222 us, Max = 279998 us, [IPU1-0] 241.696760 s: [IPU1-0] 241.696882 s: [IPU1-0] 241.696913 s: ### CPU [IPU1-0], LinkID [ 49], [IPU1-0] 241.697004 s: [IPU1-0] 241.697035 s: [ ALG_OBJECT_DRAW ] Link Statistics, [IPU1-0] 241.697126 s: ****************************** [IPU1-0] 241.697187 s: [IPU1-0] 241.697218 s: Elapsed time = 160589 msec [IPU1-0] 241.697279 s: [IPU1-0] 241.697340 s: New data Recv = 21.47 fps [IPU1-0] 241.697401 s: [IPU1-0] 241.697462 s: Input Statistics, [IPU1-0] 241.697492 s: [IPU1-0] 241.697553 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.697614 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.697706 s: -------------------------------------------------- [IPU1-0] 241.697797 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 241.697950 s: [IPU1-0] 241.697980 s: Output Statistics, [IPU1-0] 241.698041 s: [IPU1-0] 241.698072 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 241.698163 s: | ID | FPS | FPS | FPS [IPU1-0] 241.698224 s: --------------------------------------------- [IPU1-0] 241.698316 s: 0 | 0 21.47 0. 0 0. 0 [IPU1-0] 241.698438 s: [IPU1-0] 241.698468 s: [ ALG_OBJECT_DRAW ] LATENCY, [IPU1-0] 241.698529 s: ******************** [IPU1-0] 241.698590 s: Local Link Latency : Avg = 581 us, Min = 427 us, Max = 1525 us, [IPU1-0] 241.698743 s: Source to Link Latency : Avg = 255682 us, Min = 222198 us, Max = 281004 us, [IPU1-0] 241.698865 s: [IPU1-0] 241.698987 s: [IPU1-0] 241.699017 s: ### CPU [IPU1-0], LinkID [ 71], [IPU1-0] 241.699109 s: [IPU1-0] 241.699139 s: [ DISPLAY ] Link Statistics, [IPU1-0] 241.699200 s: ****************************** [IPU1-0] 241.699261 s: [IPU1-0] 241.699292 s: Elapsed time = 160590 msec [IPU1-0] 241.699383 s: [IPU1-0] 241.699414 s: New data Recv = 21.46 fps [IPU1-0] 241.699475 s: Driver/Notify Cb = 60.2 fps [IPU1-0] 241.699566 s: [IPU1-0] 241.699597 s: Input Statistics, [IPU1-0] 241.699658 s: [IPU1-0] 241.699688 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.699810 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.699871 s: -------------------------------------------------- [IPU1-0] 241.699963 s: 0 | 21.47 0. 0 0. 0 21.47 [IPU1-0] 241.700085 s: [IPU1-0] 241.700146 s: [ DISPLAY ] LATENCY, [IPU1-0] 241.700207 s: ******************** [IPU1-0] 241.700268 s: Local Link Latency : Avg = 56 us, Min = 30 us, Max = 671 us, [IPU1-0] 241.700359 s: Source to Link Latency : Avg = 255867 us, Min = 222595 us, Max = 281187 us, [IPU1-0] 241.700573 s: [IPU1-0] 241.700634 s: Display UnderFlow Count = 0 [IPU1-0] 241.700695 s: [IPU1-0] 241.700969 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! [IPU1-0] 241.701152 s: [IPU1-0] 241.701213 s: ### CPU [IPU1-0], LinkID [ 72], [IPU1-0] 241.701274 s: [IPU1-0] 241.701305 s: [ DISPLAY ] Link Statistics, [IPU1-0] 241.701396 s: ****************************** [IPU1-0] 241.701457 s: [IPU1-0] 241.701488 s: Elapsed time = 160907 msec [IPU1-0] 241.701549 s: [IPU1-0] 241.701579 s: Driver/Notify Cb = 60.3 fps [IPU1-0] 241.701671 s: [IPU1-0] 241.701701 s: Input Statistics, [IPU1-0] 241.701793 s: [IPU1-0] 241.701823 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 241.701915 s: | FPS | FPS | FPS | FPS [IPU1-0] 241.701976 s: -------------------------------------------------- [IPU1-0] 241.702067 s: 0 | 0. 0 0. 0 0. 0 0. 0 [IPU1-0] 241.702189 s: [IPU1-0] 241.702250 s: [ DISPLAY ] LATENCY, [IPU1-0] 241.702311 s: ******************** [IPU1-0] 241.702372 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [IPU1-0] 241.702494 s: Source to Link Latency : Avg = 110108 us, Min = 110108 us, Max = 110108 us, [IPU1-0] 241.702677 s: [IPU1-0] 241.702708 s: Display UnderFlow Count = 0 [IPU1-0] 241.702952 s: [IPU1-0] 242.202830 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Stop Chain [IPU1-0] [IPU1-0] 1: Pause Chain [IPU1-0] 2: Resume Chain [IPU1-0] [IPU1-0] p: Print Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 242.203074 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Stop Chain [IPU1-0] [IPU1-0] 1: Pause Chain [IPU1-0] 2: Resume Chain [IPU1-0] [IPU1-0] p: Print Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] + +Hi He Wei, Form the log, usecase is running properly without dropping any frame, so issue is either in RGB input may be going wrong or net and params.bin files may be wrong. So, please follow below steps 1. Verify that "tidl_net_jdetNet_ssd.bin" and tidl_param_jdetNet_ssd.bin" generated are correct, for that check import tool output (stats_tool_out.bin) for detection's while generating net and param bin files. For visualisation code (to see the detected objects in the output) please refer to below thread. e2e.ti.com/.../2502331 2. After verifying that "tidl_net_jdetNet_ssd.bin" and tidl_param_jdetNet_ssd.bin" are correct, then we can check RGB input is correct or not Thanks, Praveen + +Dear Praveen, I put some debug log inside objectDrawLink_algPlugin.c, indeed, there are object detection observed from the log but got the below issues: 1. It is so "easy" to come out the "vehicle" object detection even I don't put the toy car in front of the capture camera. - Is the threshold set too low? Will it help if I increase the detection threshold? 2. The bounding box is not drawn correctly: I can see the color dot blinking when detecting corresponding object.e.g. vehicle. but not the drawing box. Is the bounding box's x, y label output from algorithm module? It could be the "tidl_net_jdetNet_ssd.bin" and tidl_param_jdetNet_ssd.bin" issue? Thanks and best regards He Wei + +In addition: By enabling the log: Vps_printf(" ALG_OBJECT_DRAW: Tag=%d, Type=%d, SubType=%d, Score=%f, Scale=%f, (%d, %d : %d x %d)\n", pObjectDataDesc->objTag, pObjectDataDesc->objType, pObjectDataDesc->objSubType, pObjectDataDesc->objScore, pObjectDataDesc->objScale, pObjectDataDesc->xPos, pObjectDataDesc->yPos, pObjectDataDesc->objWidth, pObjectDataDesc->objHeight ); [IPU1-0] 260.159824 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.398224, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 260.196425 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.319275, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 260.231592 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.323944, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 260.417983 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.429199, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 260.496583 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.430817, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 260.532574 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.421326, Scale=1.000000, (4, 4 : 0 x 0) So the Width and Height is always 0x0. Any opinion where could go wrong? Thanks and best regards He Wei + +In addition, By enabling the log: Vps_printf(" ALG_OBJECT_DRAW: Tag=%d, Type=%d, SubType=%d, Score=%f, Scale=%f, (%d, %d : %d x %d)\n", pObjectDataDesc->objTag, pObjectDataDesc->objType, pObjectDataDesc->objSubType, pObjectDataDesc->objScore, pObjectDataDesc->objScale, pObjectDataDesc->xPos, pObjectDataDesc->yPos, pObjectDataDesc->objWidth, pObjectDataDesc->objHeight ); 7145, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 545.842524 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.415833, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 545.955865 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.301208, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 545.991856 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418396, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 546.623040 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.301331, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 547.332672 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.428680, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 547.519520 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.428894, Scale=1.000000, (4, 4 : 0 x 0) [IPU1-0] 547.892362 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.429138, Scale=1.000000, (4, 4 : 0 x 0) So actually the algorithm is working and detected the vehicle or pedestraint , but x and y is always 4 and width and Height is always 0. What could be going wrong? Thanks and best regards He Wei + +Hi He wei, I am not VSDK expert, so I am checking with VSDK team on this and will come back. Meanwhile, I can validate the net and param bin files generated are proper or not, if you share them with me along with the input used for importing them. Thanks, Praveen + +Dear Praveen, Any update? by enabling the log print: [IPU1-0] 260.532574 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.421326, Scale=1.000000, (4, 4 : 0 x 0) The x, y = 4 and height and Width x Height= 0x0. So object is detected but location and size is not correct. Do you know which layer defined the output of x,y, width and height? (Referring to deploy.prototxt). Thanks and best regards He Wei + +0451.input.zipTIDL_net_para.zipDear Praveen, Seems this thread got issue, I did't see your previous reply till I send my above reply, and the net and param files I generated are attached: input.zip - prototxt and trained caffe model TIDL_net_para.zip - output bin file after using conversion tool + +Dear Praveen, I need to have more information before can close this thread. Thanks and best regards He Wei + +He Wei, Did you retain the model or are you using the model provided by TI. If you retained the model, did you change the parameters to match your camera and device setup configuration? Did you validate the output of the import step with an image from your camera? or your dataset If you are using TI provided model, you may not find any detections with the Live camera as the as the prior box setting used may not match with the setup. Object detection models are sensitive to the prior box setting. We recommend you to finetune the model with your setup if you are using live camera. + +Dear Kumar, I am using the TI provided model and with our live camera. Can you advise how we can finetune to be able to see the "bonding box" effect? Thanks and best regards He Wei + +Dear Kumar, Let me give you my detail setup:: Step 1: Take from existing VSDK TIDL_OD (object detection) use case, change the file input to live camera, we are using the standard camera 10635 supported by VSDK package. - Video display is OK. Step 2: following e2e.ti.com/.../689617 and generated net and parameter bin file for live camera. - tool and all the files are converted correctly. Step 3: Put the net and param bin file into sd card and run it. Result: Object is detected with x=y=4 and Width x Height= 0 x 0. Can you advise if some step is not correct? Or any parameters shall be change and finetune? Thanks and best regards He Wei + +Dear Kumar, any update? Thanks and best regards He wei + diff --git a/data2/text/range/30001+/720774.txt b/data2/text/range/30001+/720774.txt new file mode 100644 index 0000000000000000000000000000000000000000..9b2e98b1cb8224cb3d289ebdf291b1e917393c9e --- /dev/null +++ b/data2/text/range/30001+/720774.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2PXEVM: How to run TIDL Usecases on TDA2PXEVM + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: INA226, TDA2 I want the usecase(UC_tidl_OD) to run on the TDA2PXEVM. However, I found that there is no UC_tidl_OD anywhere in uc_cfg.mk file. Could you let me know how to run TIDL Usecases on TDA2PXEVM My development environment is as follows. -.MAKECONFIG?=tda2px_evm_bios_all -.vsison sdk version 3.3.0.0 -.camera 3 x ov2775 via Sensor Fusion(rev3) Thanks & regards, khethan + +Responses: +Hi Khethan, TIDL is only supported on TDA2x as of now Regards Surya + +Hi Surya Thanks for your reply I know TDA2x as well as TDA2p support TIDL . So I purchased the TDA2P EVM and our ADAS project is underway. There are related articles in various links including the link below. e2e.ti.com/.../2600027 For reference, I built REL.TIDLSRC.01.01.01.01 which is received through CDDS and confirmed that the generated file eve_test_dl_algo.out is uploaded to TDA2P EVM through CCS to generate the stats_tool_out.bin file. If you are talking about usecase, could I be made a usecase for tda2p by referring to tda2xx UC_tidl_OD? Thanks & regards, khethan + +Hi Khethan, Yes, you need to create a new use-case referring tda2xx tidl_OD use-case as there are only 2 eves on tda2p Current use-case (supported on tda2x) uses 2 dsp & 4 eve (refer chains_tidlOD.txt file) Min requirement for TIDL OD UC is 1 eve & 1 dsp Regards Surya + +Hi Surya, Thanks for reply. I made a usecase for TDA2p with reference to TDA2x tidl_OD usecase and changed pipeline number(4->2). I did a successful build and confirmed that the output file for EVE/DSP/A15/IPU was generated. Then I copied the files (NET_OD, PRM_OD) in visionsdk and the files (inData_OD, inHeader_OD) received from CDDS to the SD card and ran TIDL OD usecase via CCS When you run usecase, the test video appears on the monitor and a few frames of vehicles are detected and the video hangs as below. could you check what's wrong? refer to below information # my tda2p OD usecase NullSource -> Decode -> VPE -> Dup Dup -> Merge Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge Merge -> Sync -> Alg_ObjectDraw -> Display GrpxSrc -> Display_Grpx # terminal debug log when selecting 'TIDL OD Usecase' Vision SDK Usecases, [IPU1-0] -------------------- [IPU1-0] 1: Single Camera Usecases [IPU1-0] 2: Multi-Camera LVDS Usecases [IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) [IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) [IPU1-0] 5: ISS Usecases, (TDA3x ONLY) [IPU1-0] 6: TDA2x Stereo Usecases [IPU1-0] 7: Network RX/TX Usecases [IPU1-0] a: Miscellaneous test's [IPU1-0] f: TIDL Usecase [IPU1-0] [IPU1-0] s: System Settings [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [HOST ] 64.210028 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST ] 64.210059 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [IPU1-0] 73.409809 s: [IPU1-0] 73.409992 s: [IPU1-0] [IPU1-0] TIDL Usecases [IPU1-0] --------------- [IPU1-0] 1: TIDL File I/O Usecase [IPU1-0] 2: Semantic Segmentation Usecase [IPU1-0] 3: TIDL OD Usecase [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 76.650003 s: [IPU1-0] 77.208869 s: FILE: Reading file [inHeader_OD] ... [IPU1-0] 77.213414 s: FILE: File read Done. [12000 bytes] [IPU1-0] 77.244189 s: DECODE: Create in progress ... !!! [IPU1-0] 77.512444 s: DECODE: Creating CH0 of 768 x 320 [1] [0],target bitrate = 10000 Kbps ... [IPU1-0] 77.513420 s: DECODE: All CH Create ... DONE !!! [IPU1-0] 77.515860 s: DECODE: Create ... DONE !!! [IPU1-0] 77.516256 s: VPE: Create in progress !!! [IPU1-0] 77.615842 s: VPE: Loading Down-scaling Co-effs [IPU1-0] 77.616177 s: VPE: Co-effs Loading ... DONE !!! [IPU1-0] 77.616421 s: VPE: Create Done !!! [IPU1-0] 77.617946 s: IPC_OUT_0 : Create in progress !!! [IPU1-0] 77.618343 s: IPC_OUT_0 : Create Done !!! [HOST ] 77.618526 s: IPC_IN_0 : Create in progress !!! [HOST ] 77.618892 s: IPC_IN_0 : Create Done !!! [HOST ] 77.619105 s: ALGORITHM: Create in progress (algId = 12) !!! [HOST ] 77.622765 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) [HOST ] 77.622765 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) [HOST ] 77.622796 s: ALGORITHM: Create Done (algId = 12) !!! [HOST ] 77.622887 s: IPC_OUT_1 : Create in progress !!! [HOST ] 77.622948 s: IPC_OUT_1 : Create Done !!! [EVE2 ] 77.623253 s: IPC_IN_0 : Create in progress !!! [EVE2 ] 77.624168 s: IPC_IN_0 : Create Done !!! [EVE2 ] 77.624809 s: ALGORITHM: Create in progress (algId = 14) !!! [HOST ] 79.448148 s: IPC_OUT_0 : Create in progress !!! [HOST ] 79.448179 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 79.447416 s: IPC_IN_1 : Create in progress !!! [DSP1 ] 79.447996 s: IPC_IN_1 : Create Done !!! [EVE1 ] 79.448484 s: IPC_IN_0 : Create in progress !!! [EVE1 ] 79.449429 s: IPC_IN_0 : Create Done !!! [EVE1 ] 79.450039 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE2 ] 79.445830 s: ALGORITHM: Create Done (algId = 14) !!! [EVE2 ] 79.446471 s: IPC_OUT_0 : Create in progress !!! [EVE2 ] 79.446959 s: IPC_OUT_0 : Create Done !!! [EVE1 ] 81.267705 s: ALGORITHM: Create Done (algId = 14) !!! [EVE1 ] 81.268376 s: IPC_OUT_0 : Create in progress !!! [EVE1 ] 81.268925 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 81.269383 s: IPC_IN_0 : Create in progress !!! [DSP1 ] 81.269932 s: IPC_IN_0 : Create Done !!! [DSP1 ] 81.270359 s: ALGORITHM: Create in progress (algId = 36) !!! [DSP1 ] 81.285670 s: ALGORITHM: Create Done (algId = 36) !!! [DSP1 ] 81.285914 s: IPC_OUT_0 : Create in progress !!! [DSP1 ] 81.286006 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 82.052461 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 82.052522 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65600 B (64 KB) [DSP1 ] 82.052583 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 500104 B (488 KB) [DSP2 ] 82.052766 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP2 ] 82.052827 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 82.052857 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516456 B (504 KB) [EVE1 ] 82.053254 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE1 ] 82.053528 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE1 ] 82.054047 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 238136 B (232 KB) [EVE2 ] 82.054992 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE2 ] 82.055267 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE2 ] 82.055816 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 238136 B (232 KB) [IPU2 ] 82.056609 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU2 ] 82.056762 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252056 B (246 KB) [IPU1-0] 81.286128 s: IPC_IN_0 : Create in progress !!! [IPU1-0] 81.287348 s: IPC_IN_0 : Create Done !!! [IPU1-0] 81.288903 s: ALGORITHM: Create in progress (algId = 1) !!! [IPU1-0] 81.290520 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) [IPU1-0] 81.290642 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) [IPU1-0] 81.308820 s: ALGORITHM: Create Done (algId = 1) !!! [IPU1-0] 81.309034 s: DISPLAY: Create in progress !!! [IPU1-0] 81.309827 s: DISPLAY: Create Done !!! [IPU1-0] 81.310254 s: GRPXSRC: Create in progress !!! [IPU1-0] 82.049258 s: GRPXSRC: Create Done !!! [IPU1-0] 82.049777 s: DISPLAY: Create in progress !!! [IPU1-0] 82.050448 s: DISPLAY: Create Done !!! [IPU1-0] 82.050631 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 82.050814 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 244160 B (238 KB) [IPU1-0] 82.050997 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 82.051149 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88103000, Total size = 368037888 B (350 MB), Free size = 257107456 B (245 MB) [IPU1-0] 82.051332 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127872 B (0 MB), Free size = 106368 B (0 MB) [IPU1-0] 82.057128 s: DISPLAY: Start in progress !!! [IPU1-0] 82.057219 s: DISPLAY: Start Done !!! [IPU1-0] 82.059171 s: DISPLAY: Start in progress !!! [IPU1-0] 82.059263 s: DISPLAY: Start Done !!! [IPU1-0] 82.064875 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Stop Chain [IPU1-0] [IPU1-0] 1: Pause Chain [IPU1-0] 2: Resume Chain [IPU1-0] [IPU1-0] p: Print Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-1] 82.051759 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 82.051942 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645320 B (630 KB) [HOST ] 82.052339 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 82.052339 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6240800 B (6094 KB) # terminal debug log when selecting 'p' ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Stop Chain [IPU1-0] [IPU1-0] 1: Pause Chain [IPU1-0] 2: Resume Chain [IPU1-0] [IPU1-0] p: Print Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-1] 82.051759 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 82.051942 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645320 B (630 KB) [HOST ] 82.052339 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 82.052339 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6240800 B (6094 KB) [IPU1-0] 96.434179 s: [IPU1-0] 96.434240 s: CPU [IPU1-0 ] Statistics, [IPU1-0] 96.434301 s: ************************* [IPU1-0] 96.434362 s: [IPU1-0] 96.434423 s: LOAD: CPU: 11.4% HWI: 1.6%, SWI:0.8%, Low Power: 0.0% [IPU1-0] 96.434575 s: [IPU1-0] 96.434667 s: LOAD: TSK: IPC_OUT_0 : 0.2% [IPU1-0] 96.434758 s: LOAD: TSK: MERGE0 : 0.1% [IPU1-0] 96.434880 s: LOAD: TSK: NULL_SRC0 : 1.2% [IPU1-0] 96.434972 s: LOAD: TSK: SYNC0 : 0.4% [IPU1-0] 96.435124 s: LOAD: TSK: DEC0 : 0.2% [IPU1-0] 96.435429 s: LOAD: TSK: VPE0 : 0.5% [IPU1-0] 96.435582 s: LOAD: TSK: GrpxSrc0 : 0.1% [IPU1-0] 96.435673 s: LOAD: TSK: STAT_COLL : 4.0% [IPU1-0] 96.435765 s: LOAD: TSK: DEC_PROCESS_TSK_0 : 0.5% [IPU1-0] 96.435856 s: LOAD: TSK: MISC : 1.8% [IPU1-0] 96.435948 s: [IPU1-0] 96.435978 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.436070 s: [IPU1-0] 96.436131 s: SYSTEM: Sempahores Objects, 18 of 1024 free [IPU1-0] 96.436253 s: SYSTEM: Task Objects , 6 of 100 free [IPU1-0] 96.436344 s: SYSTEM: Clock Objects , 94 of 100 free [IPU1-0] 96.436436 s: SYSTEM: Hwi Objects , 87 of 100 free [IPU1-0] 96.436527 s: [IPU1-0] 96.436558 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 244152 B (238 KB) [IPU1-0] 96.436741 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 96.436893 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88103000, Total size = 368037888 B (350 MB), Free size = 257107456 B (245 MB) [IPU1-0] 96.437076 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127872 B (0 MB), Free size = 106368 B (0 MB) [IPU1-0] 96.437259 s: [IPU1-0] 96.437320 s: [IPU1-0] 96.437351 s: CPU [IPU1-1 ] Statistics, [IPU1-0] 96.437412 s: ************************* [IPU1-0] 96.437473 s: [IPU1-0] 96.437534 s: LOAD: CPU: 1.1% HWI: 0.7%, SWI:0.3%, Low Power: 0.0% [IPU1-0] 96.437686 s: [IPU1-0] 96.437808 s: LOAD: TSK: MISC : 0.1% [IPU1-0] 96.437900 s: [IPU1-0] 96.437930 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.438022 s: [IPU1-0] 96.438052 s: SYSTEM: Sempahores Objects, 416 of 1024 free [IPU1-0] 96.438174 s: SYSTEM: Task Objects , 39 of 100 free [IPU1-0] 96.438266 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 96.438357 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 96.438449 s: [IPU1-0] 96.438510 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645320 B (630 KB) [IPU1-0] 96.438662 s: [IPU1-0] 96.438723 s: [IPU1-0] 96.438754 s: CPU [HOST ] Statistics, [IPU1-0] 96.438815 s: ************************* [IPU1-0] 96.438876 s: [IPU1-0] 96.438937 s: LOAD: CPU: 20.1% HWI: 0.1%, SWI:0.1%, Low Power: 0.0% [IPU1-0] 96.439059 s: [IPU1-0] 96.439211 s: LOAD: TSK: MISC : 19.9% [IPU1-0] 96.439303 s: [IPU1-0] 96.439364 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.439455 s: [IPU1-0] 96.439486 s: SYSTEM: Sempahores Objects, 413 of 1024 free [IPU1-0] 96.439577 s: SYSTEM: Task Objects , 38 of 100 free [IPU1-0] 96.439669 s: SYSTEM: Clock Objects , 97 of 100 free [IPU1-0] 96.439760 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 96.439852 s: [IPU1-0] 96.439882 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6240800 B (6094 KB) [IPU1-0] 96.440065 s: [IPU1-0] 96.440096 s: [IPU1-0] 96.440340 s: CPU [DSP1 ] Statistics, [IPU1-0] 96.440401 s: ************************* [IPU1-0] 96.440462 s: CPU: DSP1: Unable to get CPU statistics !!! [IPU1-0] 96.440553 s: [IPU1-0] 96.440584 s: [IPU1-0] 96.440645 s: [IPU1-0] 96.440675 s: CPU [DSP2 ] Statistics, [IPU1-0] 96.440736 s: ************************* [IPU1-0] 96.440797 s: [IPU1-0] 96.440858 s: LOAD: CPU: 0.3% HWI: 0.1%, SWI:0.0%, Low Power: 0.0% [IPU1-0] 96.440980 s: [IPU1-0] 96.441041 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 96.441163 s: [IPU1-0] 96.441224 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.441316 s: [IPU1-0] 96.441346 s: SYSTEM: Sempahores Objects, 430 of 1024 free [IPU1-0] 96.441438 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 96.441529 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 96.441621 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 96.441712 s: [IPU1-0] 96.441773 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [IPU1-0] 96.441926 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516456 B (504 KB) [IPU1-0] 96.442109 s: [IPU1-0] 96.442170 s: [IPU1-0] 96.442231 s: CPU [EVE1 ] Statistics, [IPU1-0] 96.442292 s: ************************* [IPU1-0] 96.442353 s: [IPU1-0] 96.442383 s: LOAD: CPU: 69.1% HWI: 0.3%, SWI:0.2%, Low Power: 0.0% [IPU1-0] 96.442536 s: [IPU1-0] 96.442597 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 68.3% [IPU1-0] 96.442688 s: LOAD: TSK: MISC : 0.3% [IPU1-0] 96.442780 s: [IPU1-0] 96.442810 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.442932 s: [IPU1-0] 96.442963 s: SYSTEM: Sempahores Objects, 430 of 1024 free [IPU1-0] 96.443054 s: SYSTEM: Task Objects , 93 of 100 free [IPU1-0] 96.443176 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 96.443268 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 96.443359 s: [IPU1-0] 96.443390 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [IPU1-0] 96.443542 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 238136 B (232 KB) [IPU1-0] 96.443725 s: [IPU1-0] 96.443756 s: [IPU1-0] 96.443817 s: CPU [EVE2 ] Statistics, [IPU1-0] 96.443878 s: ************************* [IPU1-0] 96.443939 s: [IPU1-0] 96.443969 s: LOAD: CPU: 67.6% HWI: 0.3%, SWI:0.2%, Low Power: 0.0% [IPU1-0] 96.444152 s: [IPU1-0] 96.444183 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 66.9% [IPU1-0] 96.444305 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 96.444396 s: [IPU1-0] 96.444427 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.444519 s: [IPU1-0] 96.444549 s: SYSTEM: Sempahores Objects, 430 of 1024 free [IPU1-0] 96.444641 s: SYSTEM: Task Objects , 93 of 100 free [IPU1-0] 96.444732 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 96.444824 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 96.444915 s: [IPU1-0] 96.444946 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [IPU1-0] 96.445129 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 238136 B (232 KB) [IPU1-0] 96.445495 s: [IPU1-0] 96.445525 s: [IPU1-0] 96.445586 s: CPU [IPU2 ] Statistics, [IPU1-0] 96.445647 s: ************************* [IPU1-0] 96.445708 s: [IPU1-0] 96.445739 s: LOAD: CPU: 0.8% HWI: 0.4%, SWI:0.3%, Low Power: 0.0% [IPU1-0] 96.445891 s: [IPU1-0] 96.446013 s: LOAD: TSK: MISC : 0.1% [IPU1-0] 96.446105 s: [IPU1-0] 96.446196 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 96.446288 s: [IPU1-0] 96.446318 s: SYSTEM: Sempahores Objects, 416 of 1024 free [IPU1-0] 96.446410 s: SYSTEM: Task Objects , 39 of 100 free [IPU1-0] 96.446501 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 96.446593 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 96.446684 s: [IPU1-0] 96.446745 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252056 B (246 KB) [IPU1-0] 96.446898 s: [IPU1-0] 96.447447 s: [IPU1-0] 96.447630 s: UTILS_PRCM_STATS: Current Temperature, [IPU1-0] 96.447721 s: [IPU1-0] 96.447752 s: Voltage Rail || Curr Temp Min - Max [IPU1-0] 96.447843 s: --------------------------------------------------------- [IPU1-0] 96.447935 s: PMHAL_PRCM_VD_MPU || [46.400 , 46.800] [IPU1-0] 96.448057 s: PMHAL_PRCM_VD_CORE || [43.400 , 44. 0] [IPU1-0] 96.448240 s: PMHAL_PRCM_VD_IVAHD || [44.800 , 45.200] [IPU1-0] 96.448362 s: PMHAL_PRCM_VD_DSPEVE || [42.800 , 43.400] [IPU1-0] 96.448484 s: PMHAL_PRCM_VD_GPU || [44. 0 , 44.400] [IPU1-0] 96.448575 s: [IPU1-0] 96.448606 s: ============================================================================ [IPU1-0] 96.448728 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) [IPU1-0] 96.448819 s: ---------------------------------------------------------------------------- [IPU1-0] 96.449948 s: UTILS_PRCM_STATS: Reading the regulator data failed [IPU1-0] 96.450039 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! [IPU1-0] 96.450558 s: [IPU1-0] 96.450588 s: Statistics Collector, [IPU1-0] 96.450649 s: [IPU1-0] 96.450710 s: STATISTIC Avg Data Peak Data [IPU1-0] 96.450771 s: COLLECTOR MB/s MB/s [IPU1-0] 96.450863 s: -------------------------------------------------- [IPU1-0] 96.450954 s: SCI_EMIF1 RD+WR | 642.275199 1725.373597 [IPU1-0] 96.451076 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 [IPU1-0] 96.451229 s: SCI_EMIF1 RD ONLY | 527.639259 1269.898188 [IPU1-0] 96.451351 s: SCI_EMIF1 WR ONLY | 114.947101 625.518533 [IPU1-0] 96.451473 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 [IPU1-0] 96.451564 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 [IPU1-0] 96.451686 s: SCI_MA_MPU_P1 | 13.678527 165.603038 [IPU1-0] 96.451778 s: SCI_MA_MPU_P2 | 0.000000 0.000000 [IPU1-0] 96.451900 s: SCI_DSS | 108.465721 259.939649 [IPU1-0] 96.452022 s: SCI_IPU1 | 11.192178 46.279609 [IPU1-0] 96.452113 s: SCI_VIP1_P1 | 0.000000 0.000000 [IPU1-0] 96.452235 s: SCI_VIP1_P2 | 0.000000 0.000000 [IPU1-0] 96.452357 s: SCI_VPE_P1 | 3.006943 68.837887 [IPU1-0] 96.452479 s: SCI_VPE_P2 | 3.007096 68.837887 [IPU1-0] 96.452571 s: SCI_DSP1_MDMA | 14.654557 137.045981 [IPU1-0] 96.452693 s: SCI_DSP1_EDMA | 0.000000 0.000000 [IPU1-0] 96.452784 s: SCI_DSP2_MDMA | 4.583008 4.895414 [IPU1-0] 96.452906 s: SCI_DSP2_EDMA | 0.000000 0.000000 [IPU1-0] 96.453028 s: SCI_EVE1_TC0 | 217.813818 680.187924 [IPU1-0] 96.453150 s: SCI_EVE1_TC1 | 210.721622 869.895414 [IPU1-0] 96.453272 s: SCI_EVE2_TC0 | 212.349324 699.172496 [IPU1-0] 96.453394 s: SCI_EVE2_TC1 | 204.263670 869.437824 [IPU1-0] 96.453486 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 [IPU1-0] 96.453608 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 [IPU1-0] 96.453699 s: SCI_EDMA_TC1_RD | 0.380498 8.700519 [IPU1-0] 96.453913 s: SCI_EDMA_TC1_WR | 0.391070 8.972411 [IPU1-0] 96.454035 s: SCI_VIP2_P1 | 0.000000 0.000000 [IPU1-0] 96.454187 s: SCI_VIP2_P2 | 0.000000 0.000000 [IPU1-0] 96.454309 s: SCI_IVA | 3.165989 570.757595 [IPU1-0] 96.454401 s: SCI_GPU_P1 | 0.000000 0.000000 [IPU1-0] 96.454523 s: SCI_GPU_P2 | 0.000000 0.000000 [IPU1-0] 96.454614 s: SCI_GMAC_SW | 0.000000 0.000000 [IPU1-0] 96.454736 s: SCI_OCMC_RAM1 | 0.000000 0.000000 [IPU1-0] 96.454828 s: SCI_OCMC_RAM2 | 0.000000 0.000000 [IPU1-0] 96.454950 s: SCI_OCMC_RAM3 | 67.320717 1178.613354 [IPU1-0] 96.455041 s: SCI_ISS_RT | 0.000000 0.000000 [IPU1-0] 96.455377 s: SCI_ISS_NRT1 | 0.000000 0.000000 [IPU1-0] 96.455499 s: SCI_ISS_NRT2 | 0.000000 0.000000 [IPU1-0] 96.455590 s: SCI_CAL | 0.000000 0.000000 [IPU1-0] 96.555358 s: [IPU1-0] 96.555419 s: [IPU1-0] 96.555541 s: [IPU1-0] 96.555572 s: ### CPU [IPU1-0], LinkID [ 57], [IPU1-0] 96.555664 s: [IPU1-0] 96.555694 s: [ NULL_SRC ] Link Statistics, [IPU1-0] 96.555786 s: ****************************** [IPU1-0] 96.555847 s: [IPU1-0] 96.555877 s: Elapsed time = 14393 msec [IPU1-0] 96.555938 s: [IPU1-0] 96.555999 s: New data Recv = 10.0 fps [IPU1-0] 96.556060 s: Get Full Buf Cb = 10.0 fps [IPU1-0] 96.556182 s: Put Empty Buf Cb = 10.0 fps [IPU1-0] 96.556274 s: Driver/Notify Cb = 9.93 fps [IPU1-0] 96.556365 s: [IPU1-0] 96.556396 s: Input Statistics, [IPU1-0] 96.556457 s: [IPU1-0] 96.556487 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 96.556579 s: | FPS | FPS | FPS | FPS [IPU1-0] 96.556670 s: -------------------------------------------------- [IPU1-0] 96.556762 s: 0 | 10. 0 0. 0 0. 0 10. 0 [IPU1-0] 96.556884 s: [IPU1-0] 96.556914 s: Output Statistics, [IPU1-0] 96.556975 s: [IPU1-0] 96.557036 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 96.557097 s: | ID | FPS | FPS | FPS [IPU1-0] 96.557219 s: --------------------------------------------- [IPU1-0] 96.557311 s: 0 | 0 10. 0 0. 0 0. 0 [IPU1-0] 96.557433 s: [IPU1-0] 96.557463 s: [ NULL_SRC ] LATENCY, [IPU1-0] 96.557524 s: ******************** [IPU1-0] 96.557585 s: [IPU1-0] 96.557707 s: [IPU1-0] 96.557738 s: ### CPU [IPU1-0], LinkID [ 80], [IPU1-0] 96.557829 s: [IPU1-0] 96.557860 s: [ DECODE ] Link Statistics, [IPU1-0] 96.557921 s: ****************************** [IPU1-0] 96.558012 s: [IPU1-0] 96.558043 s: Elapsed time = 14386 msec [IPU1-0] 96.558104 s: [IPU1-0] 96.558165 s: New data Recv = 10.0 fps [IPU1-0] 96.558256 s: Release data Recv = 10.0 fps [IPU1-0] 96.558348 s: Get Full Buf Cb = 20.1 fps [IPU1-0] 96.558409 s: Put Empty Buf Cb = 10.0 fps [IPU1-0] 96.558500 s: [IPU1-0] 96.558531 s: Input Statistics, [IPU1-0] 96.558592 s: [IPU1-0] 96.558622 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 96.558714 s: | FPS | FPS | FPS | FPS [IPU1-0] 96.558775 s: -------------------------------------------------- [IPU1-0] 96.558866 s: 0 | 10. 0 0. 0 0. 0 10. 0 [IPU1-0] 96.559019 s: [IPU1-0] 96.559049 s: Output Statistics, [IPU1-0] 96.559110 s: [IPU1-0] 96.559171 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 96.559263 s: | ID | FPS | FPS | FPS [IPU1-0] 96.559324 s: --------------------------------------------- [IPU1-0] 96.559415 s: 0 | 0 10. 0 0. 0 0. 0 [IPU1-0] 96.559537 s: [IPU1-0] 96.559568 s: [ DECODE ] LATENCY, [IPU1-0] 96.559720 s: ******************** [IPU1-0] 96.559781 s: Local Link Latency : Avg = 2607 us, Min = 2501 us, Max = 4209 us, [IPU1-0] 96.559903 s: Source to Link Latency : Avg = 2799 us, Min = 2684 us, Max = 4666 us, [IPU1-0] 96.560025 s: [IPU1-0] 96.560361 s: [IPU1-0] 96.560422 s: ### CPU [IPU1-0], LinkID [ 75], [IPU1-0] 96.560513 s: [IPU1-0] 96.560544 s: [ VPE ] Link Statistics, [IPU1-0] 96.560605 s: ****************************** [IPU1-0] 96.560696 s: [IPU1-0] 96.560727 s: Elapsed time = 14384 msec [IPU1-0] 96.560788 s: [IPU1-0] 96.560849 s: New data Recv = 10.1 fps [IPU1-0] 96.560910 s: Get Full Buf Cb = 8.69 fps [IPU1-0] 96.561001 s: Put Empty Buf Cb = 17.3 fps [IPU1-0] 96.561062 s: Driver/Notify Cb = 10.1 fps [IPU1-0] 96.561184 s: [IPU1-0] 96.561245 s: Input Statistics, [IPU1-0] 96.561306 s: [IPU1-0] 96.561337 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 96.561398 s: | FPS | FPS | FPS | FPS [IPU1-0] 96.561489 s: -------------------------------------------------- [IPU1-0] 96.561581 s: 0 | 10. 1 0. 0 0. 0 8.69 [IPU1-0] 96.561703 s: [IPU1-0] 96.561764 s: Output Statistics, [IPU1-0] 96.561825 s: [IPU1-0] 96.561855 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 96.561916 s: | ID | FPS | FPS | FPS [IPU1-0] 96.562008 s: --------------------------------------------- [IPU1-0] 96.562099 s: 0 | 0 8.69 1.32 0. 0 [IPU1-0] 96.562221 s: [IPU1-0] 96.562282 s: [ VPE ] LATENCY, [IPU1-0] 96.562343 s: ******************** [IPU1-0] 96.562404 s: Local Link Latency : Avg = 1412 us, Min = 1372 us, Max = 1525 us, [IPU1-0] 96.562526 s: Source to Link Latency : Avg = 4394 us, Min = 4270 us, Max = 6252 us, [IPU1-0] 96.562648 s: [IPU1-0] 96.562709 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! [IPU1-0] 96.562862 s: [IPU1-0] 96.562923 s: ### CPU [IPU1-0], LinkID [ 0], [IPU1-0] 96.562984 s: [IPU1-0] 96.563014 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 96.563106 s: ****************************** [IPU1-0] 96.563716 s: [IPU1-0] 96.563777 s: Elapsed time = 14385 msec [IPU1-0] 96.563868 s: [IPU1-0] 96.563899 s: New data Recv = 8.68 fps [IPU1-0] 96.563990 s: Release data Recv = 8.68 fps [IPU1-0] 96.564051 s: Driver/Notify Cb = 108.65 fps [IPU1-0] 96.564326 s: [IPU1-0] 96.564356 s: Input Statistics, [IPU1-0] 96.564417 s: [IPU1-0] 96.564448 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 96.564539 s: | FPS | FPS | FPS | FPS [IPU1-0] 96.564631 s: -------------------------------------------------- [IPU1-0] 96.564722 s: 0 | 8.68 0. 0 0. 0 8.68 [IPU1-0] 96.564844 s: [IPU1-0] 96.564875 s: Output Statistics, [IPU1-0] 96.564936 s: [IPU1-0] 96.564966 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 96.565058 s: | ID | FPS | FPS | FPS [IPU1-0] 96.565363 s: --------------------------------------------- [IPU1-0] 96.565454 s: 0 | 0 8.68 0. 0 0. 0 [IPU1-0] 96.565576 s: [IPU1-0] 96.565607 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 96.565698 s: ******************** [IPU1-0] 96.565759 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 31 us, [IPU1-0] 96.565881 s: Source to Link Latency : Avg = 4722 us, Min = 4575 us, Max = 6649 us, [IPU1-0] 96.565973 s: [IPU1-0] 97.065454 s: [IPU1-0] 97.065546 s: ### CPU [ HOST], LinkID [ 10], [IPU1-0] 97.065637 s: [IPU1-0] 97.065668 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 97.065729 s: ****************************** [IPU1-0] 97.065790 s: [IPU1-0] 97.065851 s: Elapsed time = 14887 msec [IPU1-0] 97.065912 s: [IPU1-0] 97.065942 s: Get Full Buf Cb = 8.73 fps [IPU1-0] 97.066034 s: Put Empty Buf Cb = 8.73 fps [IPU1-0] 97.066125 s: Driver/Notify Cb = 8.66 fps [IPU1-0] 97.066217 s: [IPU1-0] 97.066278 s: Input Statistics, [IPU1-0] 97.066339 s: [IPU1-0] 97.066369 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.066461 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.066522 s: -------------------------------------------------- [IPU1-0] 97.066613 s: 0 | 8.73 0. 0 0. 0 8.73 [IPU1-0] 97.066857 s: [IPU1-0] 97.066888 s: Output Statistics, [IPU1-0] 97.066949 s: [IPU1-0] 97.066979 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.067071 s: | ID | FPS | FPS | FPS [IPU1-0] 97.067162 s: --------------------------------------------- [IPU1-0] 97.067254 s: 0 | 0 8.73 0. 0 0. 0 [IPU1-0] 97.067376 s: [IPU1-0] 97.067406 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 97.067467 s: ******************** [IPU1-0] 97.067528 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 31 us, [IPU1-0] 97.067650 s: Source to Link Latency : Avg = 4823 us, Min = 4666 us, Max = 6740 us, [IPU1-0] 97.067772 s: [IPU1-0] 97.067894 s: [IPU1-0] 97.067925 s: ### CPU [ HOST], LinkID [ 49], [IPU1-0] 97.068016 s: [IPU1-0] 97.068047 s: [ ALG_TIDLPREPROC ] Link Statistics, [IPU1-0] 97.068474 s: ****************************** [IPU1-0] 97.068565 s: [IPU1-0] 97.068626 s: Elapsed time = 14890 msec [IPU1-0] 97.068687 s: [IPU1-0] 97.068718 s: New data Recv = 8.73 fps [IPU1-0] 97.068809 s: [IPU1-0] 97.068840 s: Input Statistics, [IPU1-0] 97.068901 s: [IPU1-0] 97.069694 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.069785 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.069877 s: -------------------------------------------------- [IPU1-0] 97.069968 s: 0 | 8.73 1.61 0. 0 7.11 [IPU1-0] 97.070121 s: [IPU1-0] 97.070456 s: Output Statistics, [IPU1-0] 97.070548 s: [IPU1-0] 97.070578 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.070670 s: | ID | FPS | FPS | FPS [IPU1-0] 97.070761 s: --------------------------------------------- [IPU1-0] 97.070853 s: 0 | 0 7.11 1.61 0. 0 [IPU1-0] 97.070975 s: [IPU1-0] 97.071005 s: [ ALG_TIDLPREPROC ] LATENCY, [IPU1-0] 97.071097 s: ******************** [IPU1-0] 97.071188 s: Local Link Latency : Avg = 207 us, Min = 152 us, Max = 1312 us, [IPU1-0] 97.071341 s: Source to Link Latency : Avg = 31442 us, Min = 31263 us, Max = 34435 us, [IPU1-0] 97.071463 s: [IPU1-0] 97.072439 s: [IPU1-0] 97.072500 s: ### CPU [ HOST], LinkID [ 1], [IPU1-0] 97.072591 s: [IPU1-0] 97.072622 s: [ IPC_OUT_1 ] Link Statistics, [IPU1-0] 97.072713 s: ****************************** [IPU1-0] 97.072774 s: [IPU1-0] 97.072805 s: Elapsed time = 14774 msec [IPU1-0] 97.072896 s: [IPU1-0] 97.072927 s: New data Recv = 3.58 fps [IPU1-0] 97.073018 s: Release data Recv = 3.31 fps [IPU1-0] 97.073110 s: Driver/Notify Cb = 103.28 fps [IPU1-0] 97.073201 s: [IPU1-0] 97.073262 s: Input Statistics, [IPU1-0] 97.073323 s: [IPU1-0] 97.073354 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.073659 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.073750 s: -------------------------------------------------- [IPU1-0] 97.073842 s: 0 | 3.58 0. 0 0. 0 3.58 [IPU1-0] 97.073964 s: [IPU1-0] 97.073994 s: Output Statistics, [IPU1-0] 97.074055 s: [IPU1-0] 97.074086 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.074391 s: | ID | FPS | FPS | FPS [IPU1-0] 97.074483 s: --------------------------------------------- [IPU1-0] 97.074574 s: 0 | 0 3.58 0. 0 0. 0 [IPU1-0] 97.074696 s: [IPU1-0] 97.074727 s: [ IPC_OUT_1 ] LATENCY, [IPU1-0] 97.074788 s: ******************** [IPU1-0] 97.074849 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 97.074971 s: Source to Link Latency : Avg = 31431 us, Min = 31293 us, Max = 31873 us, [IPU1-0] 97.075093 s: [IPU1-0] 97.575489 s: [IPU1-0] 97.575581 s: ### CPU [ EVE2], LinkID [ 10], [IPU1-0] 97.575672 s: [IPU1-0] 97.575703 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 97.575764 s: ****************************** [IPU1-0] 97.575825 s: [IPU1-0] 97.575886 s: Elapsed time = 15277 msec [IPU1-0] 97.575947 s: [IPU1-0] 97.576008 s: Get Full Buf Cb = 1.76 fps [IPU1-0] 97.576069 s: Put Empty Buf Cb = 3.27 fps [IPU1-0] 97.576191 s: Driver/Notify Cb = 3.46 fps [IPU1-0] 97.576282 s: [IPU1-0] 97.576313 s: Input Statistics, [IPU1-0] 97.576374 s: [IPU1-0] 97.576404 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.576496 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.576587 s: -------------------------------------------------- [IPU1-0] 97.576648 s: 0 | 3.46 0. 0 0. 0 3.46 [IPU1-0] 97.576801 s: [IPU1-0] 97.576831 s: Output Statistics, [IPU1-0] 97.576892 s: [IPU1-0] 97.576923 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.577014 s: | ID | FPS | FPS | FPS [IPU1-0] 97.577075 s: --------------------------------------------- [IPU1-0] 97.577197 s: 0 | 0 3.46 0. 0 0. 0 [IPU1-0] 97.577411 s: [IPU1-0] 97.577441 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 97.577502 s: ******************** [IPU1-0] 97.577563 s: Local Link Latency : Avg = 35 us, Min = 30 us, Max = 61 us, [IPU1-0] 97.577685 s: Source to Link Latency : Avg = 85285 us, Min = 31569 us, Max = 240438 us, [IPU1-0] 97.577807 s: [IPU1-0] 97.577929 s: [IPU1-0] 97.577990 s: ### CPU [ EVE2], LinkID [ 49], [IPU1-0] 97.578051 s: [IPU1-0] 97.578112 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 97.578204 s: ****************************** [IPU1-0] 97.578265 s: [IPU1-0] 97.578295 s: Elapsed time = 15279 msec [IPU1-0] 97.578387 s: [IPU1-0] 97.578417 s: New data Recv = 6.8 fps [IPU1-0] 97.578478 s: [IPU1-0] 97.578539 s: Input Statistics, [IPU1-0] 97.578600 s: [IPU1-0] 97.578631 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.578722 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.578783 s: -------------------------------------------------- [IPU1-0] 97.578875 s: 0 | 3.40 0. 0 0. 0 3.27 [IPU1-0] 97.578997 s: [IPU1-0] 97.579058 s: Output Statistics, [IPU1-0] 97.579119 s: [IPU1-0] 97.579149 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.579241 s: | ID | FPS | FPS | FPS [IPU1-0] 97.579332 s: --------------------------------------------- [IPU1-0] 97.579424 s: 0 | 0 3.27 0. 0 0. 0 [IPU1-0] 97.579546 s: [IPU1-0] 97.579576 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 97.579637 s: ******************** [IPU1-0] 97.579698 s: Local Link Latency : Avg = 208902 us, Min = 208473 us, Max = 209784 us, [IPU1-0] 97.579820 s: Source to Link Latency : Avg = 903549 us, Min = 240987 us, Max = 1261392 us, [IPU1-0] 97.579942 s: [IPU1-0] 97.580064 s: [IPU1-0] 97.580095 s: ### CPU [ EVE2], LinkID [ 0], [IPU1-0] 97.580552 s: [IPU1-0] 97.580613 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 97.580674 s: ****************************** [IPU1-0] 97.580735 s: [IPU1-0] 97.580796 s: Elapsed time = 15072 msec [IPU1-0] 97.580857 s: [IPU1-0] 97.580888 s: New data Recv = 3.31 fps [IPU1-0] 97.580979 s: Release data Recv = 3.11 fps [IPU1-0] 97.581040 s: Driver/Notify Cb = 14.39 fps [IPU1-0] 97.581132 s: [IPU1-0] 97.581193 s: Input Statistics, [IPU1-0] 97.581284 s: [IPU1-0] 97.581315 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 97.581406 s: | FPS | FPS | FPS | FPS [IPU1-0] 97.581467 s: -------------------------------------------------- [IPU1-0] 97.581559 s: 0 | 3.31 0. 0 0. 0 3.31 [IPU1-0] 97.581681 s: [IPU1-0] 97.581742 s: Output Statistics, [IPU1-0] 97.581803 s: [IPU1-0] 97.581833 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 97.581894 s: | ID | FPS | FPS | FPS [IPU1-0] 97.581986 s: --------------------------------------------- [IPU1-0] 97.582077 s: 0 | 0 3.31 0. 0 0. 0 [IPU1-0] 97.582199 s: [IPU1-0] 97.582260 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 97.582321 s: ******************** [IPU1-0] 97.582382 s: Local Link Latency : Avg = 28 us, Min = 0 us, Max = 31 us, [IPU1-0] 97.582504 s: Source to Link Latency : Avg = 903980 us, Min = 241536 us, Max = 1261880 us, [IPU1-0] 97.582626 s: [IPU1-0] 98.082291 s: [IPU1-0] 98.082352 s: ### CPU [ DSP1], LinkID [ 11], [IPU1-0] 98.082443 s: [IPU1-0] 98.082474 s: [ IPC_IN_1 ] Link Statistics, [IPU1-0] 98.082535 s: ****************************** [IPU1-0] 98.082596 s: [IPU1-0] 98.082657 s: Elapsed time = 15509 msec [IPU1-0] 98.082718 s: [IPU1-0] 98.082779 s: Get Full Buf Cb = 6.64 fps [IPU1-0] 98.082840 s: Put Empty Buf Cb = 3.15 fps [IPU1-0] 98.082931 s: Driver/Notify Cb = 3.28 fps [IPU1-0] 98.082992 s: [IPU1-0] 98.083053 s: Input Statistics, [IPU1-0] 98.083084 s: [IPU1-0] 98.083145 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 98.083267 s: | FPS | FPS | FPS | FPS [IPU1-0] 98.083419 s: -------------------------------------------------- [IPU1-0] 98.083511 s: 0 | 3.35 0. 0 0. 0 3.35 [IPU1-0] 98.083633 s: [IPU1-0] 98.083694 s: Output Statistics, [IPU1-0] 98.083755 s: [IPU1-0] 98.083785 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 98.083877 s: | ID | FPS | FPS | FPS [IPU1-0] 98.083938 s: --------------------------------------------- [IPU1-0] 98.084029 s: 0 | 0 3.35 0. 0 0. 0 [IPU1-0] 98.084151 s: [IPU1-0] 98.084212 s: [ IPC_IN_1 ] LATENCY, [IPU1-0] 98.084273 s: ******************** [IPU1-0] 98.084334 s: Local Link Latency : Avg = 11 us, Min = 0 us, Max = 31 us, [IPU1-0] 98.084456 s: Source to Link Latency : Avg = 1002056 us, Min = 263558 us, Max = 1359971 us, [IPU1-0] 98.084578 s: [IPU1-0] 98.584304 s: [IPU1-0] 98.584365 s: ### CPU [ HOST], LinkID [ 0], [IPU1-0] 98.584456 s: [IPU1-0] 98.584487 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 98.584548 s: ****************************** [IPU1-0] 98.584609 s: [IPU1-0] 98.584670 s: Elapsed time = 16379 msec [IPU1-0] 98.584731 s: [IPU1-0] 98.584792 s: New data Recv = 3.48 fps [IPU1-0] 98.584853 s: Release data Recv = 3.35 fps [IPU1-0] 98.584944 s: Driver/Notify Cb = 103.36 fps [IPU1-0] 98.585005 s: [IPU1-0] 98.585066 s: Input Statistics, [IPU1-0] 98.585097 s: [IPU1-0] 98.585158 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 98.585463 s: | FPS | FPS | FPS | FPS [IPU1-0] 98.585554 s: -------------------------------------------------- [IPU1-0] 98.585646 s: 0 | 3.48 0. 0 0. 0 3.48 [IPU1-0] 98.585798 s: [IPU1-0] 98.585829 s: Output Statistics, [IPU1-0] 98.585890 s: [IPU1-0] 98.585920 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 98.586012 s: | ID | FPS | FPS | FPS [IPU1-0] 98.586073 s: --------------------------------------------- [IPU1-0] 98.586164 s: 0 | 0 3.48 0. 0 0. 0 [IPU1-0] 98.586317 s: [IPU1-0] 98.586347 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 98.586408 s: ******************** [IPU1-0] 98.586469 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, [IPU1-0] 98.586591 s: Source to Link Latency : Avg = 31483 us, Min = 31263 us, Max = 34435 us, [IPU1-0] 98.586713 s: [IPU1-0] 99.086317 s: [IPU1-0] 99.086378 s: ### CPU [ EVE1], LinkID [ 10], [IPU1-0] 99.086469 s: [IPU1-0] 99.086500 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 99.086561 s: ****************************** [IPU1-0] 99.086652 s: [IPU1-0] 99.086683 s: Elapsed time = 16880 msec [IPU1-0] 99.086744 s: [IPU1-0] 99.086805 s: Get Full Buf Cb = 1.83 fps [IPU1-0] 99.086866 s: Put Empty Buf Cb = 3.31 fps [IPU1-0] 99.086957 s: Driver/Notify Cb = 3.43 fps [IPU1-0] 99.087018 s: [IPU1-0] 99.087079 s: Input Statistics, [IPU1-0] 99.087110 s: [IPU1-0] 99.087171 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.087384 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.087476 s: -------------------------------------------------- [IPU1-0] 99.087567 s: 0 | 3.49 0. 0 0. 0 3.49 [IPU1-0] 99.087720 s: [IPU1-0] 99.087750 s: Output Statistics, [IPU1-0] 99.087811 s: [IPU1-0] 99.087842 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.087933 s: | ID | FPS | FPS | FPS [IPU1-0] 99.087994 s: --------------------------------------------- [IPU1-0] 99.088086 s: 0 | 0 3.49 0. 0 0. 0 [IPU1-0] 99.088238 s: [IPU1-0] 99.088299 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 99.088360 s: ******************** [IPU1-0] 99.088482 s: Local Link Latency : Avg = 34 us, Min = 30 us, Max = 61 us, [IPU1-0] 99.088635 s: Source to Link Latency : Avg = 95928 us, Min = 31568 us, Max = 227018 us, [IPU1-0] 99.088757 s: [IPU1-0] 99.088848 s: [IPU1-0] 99.088909 s: ### CPU [ EVE1], LinkID [ 49], [IPU1-0] 99.088970 s: [IPU1-0] 99.089031 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 99.089092 s: ****************************** [IPU1-0] 99.089153 s: [IPU1-0] 99.089214 s: Elapsed time = 16882 msec [IPU1-0] 99.089306 s: [IPU1-0] 99.089336 s: New data Recv = 5.86 fps [IPU1-0] 99.089428 s: [IPU1-0] 99.089458 s: Input Statistics, [IPU1-0] 99.089519 s: [IPU1-0] 99.089550 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.089641 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.089702 s: -------------------------------------------------- [IPU1-0] 99.089794 s: 0 | 3.49 0. 0 0. 0 3.31 [IPU1-0] 99.089916 s: [IPU1-0] 99.089977 s: Output Statistics, [IPU1-0] 99.090038 s: [IPU1-0] 99.090068 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.090129 s: | ID | FPS | FPS | FPS [IPU1-0] 99.090434 s: --------------------------------------------- [IPU1-0] 99.090526 s: 0 | 0 3.31 0. 0 0. 0 [IPU1-0] 99.090648 s: [IPU1-0] 99.090678 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 99.090739 s: ******************** [IPU1-0] 99.090800 s: Local Link Latency : Avg = 208891 us, Min = 208473 us, Max = 209541 us, [IPU1-0] 99.090922 s: Source to Link Latency : Avg = 906493 us, Min = 240957 us, Max = 1266119 us, [IPU1-0] 99.091075 s: [IPU1-0] 99.091166 s: [IPU1-0] 99.091258 s: ### CPU [ EVE1], LinkID [ 0], [IPU1-0] 99.091349 s: [IPU1-0] 99.091380 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 99.091441 s: ****************************** [IPU1-0] 99.091502 s: [IPU1-0] 99.091563 s: Elapsed time = 16676 msec [IPU1-0] 99.091624 s: [IPU1-0] 99.091654 s: New data Recv = 3.35 fps [IPU1-0] 99.091746 s: Release data Recv = 3.11 fps [IPU1-0] 99.091837 s: Driver/Notify Cb = 14.39 fps [IPU1-0] 99.091898 s: [IPU1-0] 99.091959 s: Input Statistics, [IPU1-0] 99.091990 s: [IPU1-0] 99.092051 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.092112 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.092234 s: -------------------------------------------------- [IPU1-0] 99.092325 s: 0 | 3.35 0. 0 0. 0 3.35 [IPU1-0] 99.092447 s: [IPU1-0] 99.092508 s: Output Statistics, [IPU1-0] 99.092539 s: [IPU1-0] 99.092600 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.092661 s: | ID | FPS | FPS | FPS [IPU1-0] 99.092753 s: --------------------------------------------- [IPU1-0] 99.092814 s: 0 | 0 3.35 0. 0 0. 0 [IPU1-0] 99.092936 s: [IPU1-0] 99.092997 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 99.093058 s: ******************** [IPU1-0] 99.093119 s: Local Link Latency : Avg = 28 us, Min = 0 us, Max = 31 us, [IPU1-0] 99.093241 s: Source to Link Latency : Avg = 906910 us, Min = 241292 us, Max = 1266394 us, [IPU1-0] 99.093485 s: [IPU1-0] 99.593332 s: [IPU1-0] 99.593393 s: ### CPU [ DSP1], LinkID [ 10], [IPU1-0] 99.593485 s: [IPU1-0] 99.593515 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 99.593607 s: ****************************** [IPU1-0] 99.593668 s: [IPU1-0] 99.593698 s: Elapsed time = 17177 msec [IPU1-0] 99.593759 s: [IPU1-0] 99.593820 s: Get Full Buf Cb = 6.63 fps [IPU1-0] 99.593912 s: Put Empty Buf Cb = 3.20 fps [IPU1-0] 99.593973 s: Driver/Notify Cb = 3.26 fps [IPU1-0] 99.594064 s: [IPU1-0] 99.594095 s: Input Statistics, [IPU1-0] 99.594156 s: [IPU1-0] 99.594186 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.594308 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.594461 s: -------------------------------------------------- [IPU1-0] 99.594552 s: 0 | 3.31 0. 0 0. 0 3.31 [IPU1-0] 99.594674 s: [IPU1-0] 99.594705 s: Output Statistics, [IPU1-0] 99.594766 s: [IPU1-0] 99.594827 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.594888 s: | ID | FPS | FPS | FPS [IPU1-0] 99.594979 s: --------------------------------------------- [IPU1-0] 99.595071 s: 0 | 0 3.31 0. 0 0. 0 [IPU1-0] 99.595193 s: [IPU1-0] 99.595437 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 99.595528 s: ******************** [IPU1-0] 99.595589 s: Local Link Latency : Avg = 11 us, Min = 0 us, Max = 31 us, [IPU1-0] 99.595711 s: Source to Link Latency : Avg = 1002270 us, Min = 244677 us, Max = 1372811 us, [IPU1-0] 99.595986 s: [IPU1-0] 99.596047 s: CPU [ DSP1], LinkID [ 38], Link Statistics not available ! [IPU1-0] 99.596260 s: [IPU1-0] 99.596291 s: ### CPU [ DSP1], LinkID [ 49], [IPU1-0] 99.596382 s: [IPU1-0] 99.596413 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 99.596504 s: ****************************** [IPU1-0] 99.596565 s: [IPU1-0] 99.596596 s: Elapsed time = 17180 msec [IPU1-0] 99.596657 s: [IPU1-0] 99.596718 s: New data Recv = 6.34 fps [IPU1-0] 99.596779 s: [IPU1-0] 99.596840 s: Input Statistics, [IPU1-0] 99.596870 s: [IPU1-0] 99.596931 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.596992 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.597084 s: -------------------------------------------------- [IPU1-0] 99.597175 s: 0 | 6.57 0. 0 0. 0 6.28 [IPU1-0] 99.597328 s: [IPU1-0] 99.597358 s: Output Statistics, [IPU1-0] 99.597419 s: [IPU1-0] 99.597480 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.597541 s: | ID | FPS | FPS | FPS [IPU1-0] 99.597633 s: --------------------------------------------- [IPU1-0] 99.597694 s: 0 | 0 6.28 0. 0 0. 0 [IPU1-0] 99.597816 s: [IPU1-0] 99.597877 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 99.597938 s: ******************** [IPU1-0] 99.597999 s: Local Link Latency : Avg = 158515 us, Min = 157354 us, Max = 194260 us, [IPU1-0] 99.598121 s: Source to Link Latency : Avg = 1885011 us, Min = 402122 us, Max = 2319343 us, [IPU1-0] 99.598243 s: [IPU1-0] 99.598365 s: [IPU1-0] 99.598426 s: ### CPU [ DSP1], LinkID [ 0], [IPU1-0] 99.598487 s: [IPU1-0] 99.598548 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 99.598609 s: ****************************** [IPU1-0] 99.598670 s: [IPU1-0] 99.598700 s: Elapsed time = 17025 msec [IPU1-0] 99.598792 s: [IPU1-0] 99.598822 s: New data Recv = 6.34 fps [IPU1-0] 99.598914 s: Release data Recv = 6.34 fps [IPU1-0] 99.598975 s: Driver/Notify Cb = 106.31 fps [IPU1-0] 99.599066 s: [IPU1-0] 99.599097 s: Input Statistics, [IPU1-0] 99.599158 s: [IPU1-0] 99.599188 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 99.599310 s: | FPS | FPS | FPS | FPS [IPU1-0] 99.599371 s: -------------------------------------------------- [IPU1-0] 99.599463 s: 0 | 6.34 0. 0 0. 0 6.34 [IPU1-0] 99.599585 s: [IPU1-0] 99.599646 s: Output Statistics, [IPU1-0] 99.599707 s: [IPU1-0] 99.599737 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 99.599798 s: | ID | FPS | FPS | FPS [IPU1-0] 99.599890 s: --------------------------------------------- [IPU1-0] 99.599981 s: 0 | 0 6.34 0. 0 0. 0 [IPU1-0] 99.600103 s: [IPU1-0] 99.600134 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 99.600195 s: ******************** [IPU1-0] 99.600469 s: Local Link Latency : Avg = 4 us, Min = 0 us, Max = 31 us, [IPU1-0] 99.600622 s: Source to Link Latency : Avg = 1885182 us, Min = 402275 us, Max = 2319496 us, [IPU1-0] 99.600744 s: [IPU1-0] 100.100530 s: [IPU1-0] 100.100591 s: ### CPU [IPU1-0], LinkID [ 10], [IPU1-0] 100.100683 s: [IPU1-0] 100.100713 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 100.100805 s: ****************************** [IPU1-0] 100.100866 s: [IPU1-0] 100.100927 s: Elapsed time = 17526 msec [IPU1-0] 100.101171 s: [IPU1-0] 100.101232 s: Get Full Buf Cb = 14.94 fps [IPU1-0] 100.101354 s: Put Empty Buf Cb = 6.33 fps [IPU1-0] 100.101445 s: Driver/Notify Cb = 6.27 fps [IPU1-0] 100.101506 s: [IPU1-0] 100.101537 s: Input Statistics, [IPU1-0] 100.101598 s: [IPU1-0] 100.101659 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 100.101720 s: | FPS | FPS | FPS | FPS [IPU1-0] 100.101811 s: -------------------------------------------------- [IPU1-0] 100.101903 s: 0 | 6.33 0. 0 0. 0 6.33 [IPU1-0] 100.102025 s: [IPU1-0] 100.102055 s: Output Statistics, [IPU1-0] 100.102116 s: [IPU1-0] 100.102177 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 100.102269 s: | ID | FPS | FPS | FPS [IPU1-0] 100.102330 s: --------------------------------------------- [IPU1-0] 100.102421 s: 0 | 0 6.33 0. 0 0. 0 [IPU1-0] 100.102543 s: [IPU1-0] 100.102574 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 100.102665 s: ******************** [IPU1-0] 100.102696 s: Local Link Latency : Avg = 22 us, Min = 0 us, Max = 61 us, [IPU1-0] 100.102848 s: Source to Link Latency : Avg = 1894295 us, Min = 402702 us, Max = 2319679 us, [IPU1-0] 100.102970 s: [IPU1-0] 100.103031 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! [IPU1-0] 100.103184 s: [IPU1-0] 100.103275 s: ### CPU [IPU1-0], LinkID [ 34], [IPU1-0] 100.103336 s: [IPU1-0] 100.103397 s: [ SYNC_0 ] Link Statistics, [IPU1-0] 100.103458 s: ****************************** [IPU1-0] 100.103519 s: [IPU1-0] 100.103550 s: Elapsed time = 18012 msec [IPU1-0] 100.103641 s: [IPU1-0] 100.103672 s: New data Recv = 45.8 fps [IPU1-0] 100.103763 s: Get Full Buf Cb = 0.22 fps [IPU1-0] 100.103824 s: Put Empty Buf Cb = 0.22 fps [IPU1-0] 100.103916 s: Driver/Notify Cb = 30.25 fps [IPU1-0] 100.103977 s: [IPU1-0] 100.104038 s: Input Statistics, [IPU1-0] 100.104068 s: [IPU1-0] 100.104129 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 100.104190 s: | FPS | FPS | FPS | FPS [IPU1-0] 100.104373 s: -------------------------------------------------- [IPU1-0] 100.104465 s: 0 | 8.66 8.16 0. 0 0.22 [IPU1-0] 100.104617 s: 1 | 6.16 5.94 0. 0 0.22 [IPU1-0] 100.104739 s: [IPU1-0] 100.104800 s: Output Statistics, [IPU1-0] 100.104861 s: [IPU1-0] 100.104892 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 100.104953 s: | ID | FPS | FPS | FPS [IPU1-0] 100.105044 s: --------------------------------------------- [IPU1-0] 100.105136 s: 0 | 0 0.22 0. 0 0. 0 [IPU1-0] 100.105471 s: [IPU1-0] 100.105532 s: [ SYNC_0 ] LATENCY, [IPU1-0] 100.105593 s: ******************** [IPU1-0] 100.105654 s: Local Link Latency : Avg = 243575 us, Min = 61 us, Max = 575337 us, [IPU1-0] 100.105776 s: Source to Link Latency : Avg = 492504 us, Min = 402916 us, Max = 580278 us, [IPU1-0] 100.105898 s: [IPU1-0] 100.106020 s: [IPU1-0] 100.106051 s: ### CPU [IPU1-0], LinkID [ 49], [IPU1-0] 100.106142 s: [IPU1-0] 100.106173 s: [ ALG_OBJECT_DRAW ] Link Statistics, [IPU1-0] 100.106295 s: ****************************** [IPU1-0] 100.106356 s: [IPU1-0] 100.106417 s: Elapsed time = 17532 msec [IPU1-0] 100.106478 s: [IPU1-0] 100.106508 s: New data Recv = 0.22 fps [IPU1-0] 100.106600 s: [IPU1-0] 100.106630 s: Input Statistics, [IPU1-0] 100.106691 s: [IPU1-0] 100.106752 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 100.106813 s: | FPS | FPS | FPS | FPS [IPU1-0] 100.106905 s: -------------------------------------------------- [IPU1-0] 100.106996 s: 0 | 0.22 0. 0 0. 0 0.22 [IPU1-0] 100.107118 s: [IPU1-0] 100.107179 s: Output Statistics, [IPU1-0] 100.107240 s: [IPU1-0] 100.107271 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 100.107362 s: | ID | FPS | FPS | FPS [IPU1-0] 100.107454 s: --------------------------------------------- [IPU1-0] 100.107515 s: 0 | 0 0.22 0. 0 0. 0 [IPU1-0] 100.107637 s: [IPU1-0] 100.107698 s: [ ALG_OBJECT_DRAW ] LATENCY, [IPU1-0] 100.107759 s: ******************** [IPU1-0] 100.107820 s: Local Link Latency : Avg = 1205 us, Min = 1098 us, Max = 1312 us, [IPU1-0] 100.107942 s: Source to Link Latency : Avg = 493854 us, Min = 404288 us, Max = 581651 us, [IPU1-0] 100.108064 s: [IPU1-0] 100.108186 s: [IPU1-0] 100.108247 s: ### CPU [IPU1-0], LinkID [ 71], [IPU1-0] 100.108338 s: [IPU1-0] 100.108369 s: [ DISPLAY ] Link Statistics, [IPU1-0] 100.108430 s: ****************************** [IPU1-0] 100.108521 s: [IPU1-0] 100.108552 s: Elapsed time = 17533 msec [IPU1-0] 100.108613 s: [IPU1-0] 100.108674 s: New data Recv = 0.17 fps [IPU1-0] 100.108735 s: Driver/Notify Cb = 60.0 fps [IPU1-0] 100.108826 s: [IPU1-0] 100.108857 s: Input Statistics, [IPU1-0] 100.108918 s: [IPU1-0] 100.108948 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 100.109040 s: | FPS | FPS | FPS | FPS [IPU1-0] 100.109131 s: -------------------------------------------------- [IPU1-0] 100.109192 s: 0 | 0.22 0. 0 0. 0 0.22 [IPU1-0] 100.109375 s: [IPU1-0] 100.109406 s: [ DISPLAY ] LATENCY, [IPU1-0] 100.109467 s: ******************** [IPU1-0] 100.109528 s: Local Link Latency : Avg = 61 us, Min = 61 us, Max = 61 us, [IPU1-0] 100.109650 s: Source to Link Latency : Avg = 494090 us, Min = 404532 us, Max = 581925 us, [IPU1-0] 100.109772 s: [IPU1-0] 100.109802 s: Display UnderFlow Count = 0 [IPU1-0] 100.109894 s: [IPU1-0] 100.109955 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! [IPU1-0] 100.110107 s: [IPU1-0] 100.110168 s: ### CPU [IPU1-0], LinkID [ 72], [IPU1-0] 100.110595 s: [IPU1-0] 100.110656 s: [ DISPLAY ] Link Statistics, [IPU1-0] 100.110717 s: ****************************** [IPU1-0] 100.110778 s: [IPU1-0] 100.110809 s: Elapsed time = 18052 msec [IPU1-0] 100.110900 s: [IPU1-0] 100.110931 s: Driver/Notify Cb = 59.99 fps [IPU1-0] 100.111022 s: [IPU1-0] 100.111053 s: Input Statistics, [IPU1-0] 100.111114 s: [IPU1-0] 100.111145 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 100.111267 s: | FPS | FPS | FPS | FPS [IPU1-0] 100.111358 s: -------------------------------------------------- [IPU1-0] 100.111450 s: 0 | 0. 5 0. 0 0. 0 0. 5 [IPU1-0] 100.111572 s: [IPU1-0] 100.111633 s: [ DISPLAY ] LATENCY, [IPU1-0] 100.111694 s: ******************** [IPU1-0] 100.111755 s: Local Link Latency : Avg = 61 us, Min = 61 us, Max = 61 us, [IPU1-0] 100.111877 s: Source to Link Latency : Avg = 9516 us, Min = 9516 us, Max = 9516 us, [IPU1-0] 100.111999 s: [IPU1-0] 100.112029 s: Display UnderFlow Count = 0 [IPU1-0] 100.112090 s: [IPU1-0] 100.611297 s: Thanks & regard, Khethan + +Hi Khethan, Looking like EVEs are running slow, so Sync is dropping all frames Could you please try below experiments ? 1. Instead of loading from CCS, try with SD boot Create AppImage & MLO, copy to SD card & run (try with OPP_HIGH MLO) 2. Reduce FPS in the TIDL_OD use-case, re-build vision sdk & then run Hard code TIDL_OD_FPS_OPPNOM/TIDL_OD_FPS_OPPHIGH to some lower value in TIDl_OD use-case Regards Surya + +Hi Surya, Thanks for reply. I tested with fps parameters(5/4) and confirmed that the problem was improved. but fps is 3.9, which is so slowly. So, I adjusted the syn parameter(100/1200) as well as the fps(12/10) to improve the performance, and confirmed that the symptom of the problem is improved even though the fps is default value. But even with some values(12/10/100/1200, 20/18/100/1200) applied, the fps is 6 as below debug_log, which does not seem to be performing well. Here is my questions Q1. What is the maximum performance while using the default JDetNet(768x320)tidl_od bin distributed in VSDK on TDA2p ? I want to improve performance(FPS) to the level that it supports. Q2. According to below log (or attached full log file), It seems that there is a frame drop at the VPE link, can you help me? ### CPU [IPU1-0], LinkID [ 75], [IPU1-0] 75.848532 s: [IPU1-0] 75.848624 s: [ VPE ] Link Statistics, [IPU1-0] 75.848685 s: ****************************** [IPU1-0] 75.848746 s: [IPU1-0] 75.848807 s: Elapsed time = 18805 msec [IPU1-0] 75.848868 s: [IPU1-0] 75.848929 s: New data Recv = 18.18 fps [IPU1-0] 75.849020 s: Get Full Buf Cb = 6.48 fps [IPU1-0] 75.849081 s: Put Empty Buf Cb = 12.70 fps [IPU1-0] 75.849173 s: Driver/Notify Cb = 18.18 fps [IPU1-0] 75.849264 s: [IPU1-0] 75.849295 s: Input Statistics, [IPU1-0] 75.849356 s: [IPU1-0] 75.849417 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 75.850484 s: | FPS | FPS | FPS | FPS [IPU1-0] 75.850911 s: -------------------------------------------------- [IPU1-0] 75.851033 s: 0 | 18.18 0. 0 0. 0 6.48 [IPU1-0] 75.851186 s: [IPU1-0] 75.851216 s: Output Statistics, [IPU1-0] 75.851277 s: [IPU1-0] 75.851308 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 75.851399 s: | ID | FPS | FPS | FPS [IPU1-0] 75.851460 s: --------------------------------------------- [IPU1-0] 75.852254 s: 0 | 0 6.48 11.69 0. 0 [IPU1-0] 75.852406 s: [IPU1-0] 75.852467 s: [ VPE ] LATENCY, [IPU1-0] 75.852528 s: ******************** [IPU1-0] 75.852620 s: Local Link Latency : Avg = 1416 us, Min = 1372 us, Max = 1739 us, [IPU1-0] 75.852742 s: Source to Link Latency : Avg = 4379 us, Min = 4270 us, Max = 6131 us, [IPU1-0] 75.852864 s: [IPU1-0] 75.852955 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! tidl_od_ok_20_18_100_1200_fps.zip Q3. Could you explain syn parameter(SYNC_DELTA , SYNC_THRESHOLD) in detail. Q3.1. What is that ? How to use that ? Q3.2. What is TIDL_process time? How to know with attached logfile(.zip) -. To adjust SYNC_THRESHOLD, I need to know TIDL process time according below TI's comment . "The threshold should be more than the TIDL process time" Thanks & regards, Khethan + +Hi Khethan, Q1. What is the maximum performance while using the default JDetNet(768x320)tidl_od bin distributed in VSDK on TDA2p ? I want to improve performance(FPS) to the level that it supports. [Surya] On TDA2P, TIDL_OD is not validated till now However on TDA2 (with 4 EVEs) & OPP_HIGH (EVE @650MHz) configuration, We are getting max of 19fps (i.e 4.8fps with each EVEs) So with this assumption on TDA2P, you should get max of 9fps (with 2 EVEs running @650MHz) Q2. According to below log (or attached full log file), It seems that there is a frame drop at the VPE link, can you help me? [Surya] Expected as VPE link output buffers are acquired by next link & wait till it is free Q3. Could you explain syn parameter(SYNC_DELTA , SYNC_THRESHOLD) in detail. Q3.1. What is that ? How to use that ? [Surya] SYNC_DELTA - time difference between 2 frames received SYNC_THRESHOLD - Max time to wait before dropping Q3.2. What is TIDL_process time? How to know with attached logfile(.zip) -. To adjust SYNC_THRESHOLD, I need to know TIDL process time according below TI's comment . "The threshold should be more than the TIDL process time" [Surya] EVE1 & EVE2 is taking ~210ms, DSP1 is taking ~158ms ALG_TIDL Process time: EVE2: ------ [IPU1-0] 76.864423 s: ### CPU [ EVE2], LinkID [ 49], [IPU1-0] 76.864484 s: [IPU1-0] 76.864545 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 76.864637 s: ****************************** [IPU1-0] 76.864698 s: [IPU1-0] 76.864728 s: Elapsed time = 19743 msec [IPU1-0] 76.864820 s: [IPU1-0] 76.864850 s: New data Recv = 6.23 fps [IPU1-0] 76.864942 s: [IPU1-0] 76.864972 s: Input Statistics, [IPU1-0] 76.865033 s: [IPU1-0] 76.865064 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 76.865155 s: | FPS | FPS | FPS | FPS [IPU1-0] 76.865247 s: -------------------------------------------------- [IPU1-0] 76.865308 s: 0 | 3.24 0. 0 0. 0 3.24 [IPU1-0] 76.865460 s: [IPU1-0] 76.865491 s: Output Statistics, [IPU1-0] 76.865552 s: [IPU1-0] 76.865735 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 76.865826 s: | ID | FPS | FPS | FPS [IPU1-0] 76.865918 s: --------------------------------------------- [IPU1-0] 76.866009 s: 0 | 0 3.24 0. 0 0. 0 [IPU1-0] 76.866131 s: [IPU1-0] 76.866162 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 76.866223 s: ******************** [IPU1-0] 76.866284 s: Local Link Latency : Avg = 209046 us, Min = 208535 us, Max = 210090 us, [IPU1-0] 76.866406 s: Source to Link Latency : Avg = 246429 us, Min = 239492 us, Max = 442445 us, EVE1: ------ [IPU1-0] 78.375556 s: ### CPU [ EVE1], LinkID [ 49], [IPU1-0] 78.375678 s: [IPU1-0] 78.375709 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 78.375770 s: ****************************** [IPU1-0] 78.375831 s: [IPU1-0] 78.375892 s: Elapsed time = 21304 msec [IPU1-0] 78.375953 s: [IPU1-0] 78.376014 s: New data Recv = 6.28 fps [IPU1-0] 78.376075 s: [IPU1-0] 78.376136 s: Input Statistics, [IPU1-0] 78.376166 s: [IPU1-0] 78.376227 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 78.376288 s: | FPS | FPS | FPS | FPS [IPU1-0] 78.376380 s: -------------------------------------------------- [IPU1-0] 78.376471 s: 0 | 3.28 0. 0 0. 0 3.23 [IPU1-0] 78.376593 s: [IPU1-0] 78.377203 s: Output Statistics, [IPU1-0] 78.377295 s: [IPU1-0] 78.377325 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 78.377417 s: | ID | FPS | FPS | FPS [IPU1-0] 78.377478 s: --------------------------------------------- [IPU1-0] 78.378332 s: 0 | 0 3.23 0. 0 0. 0 [IPU1-0] 78.378515 s: [IPU1-0] 78.378576 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 78.378698 s: ******************** [IPU1-0] 78.378789 s: Local Link Latency : Avg = 208989 us, Min = 208747 us, Max = 209693 us, [IPU1-0] 78.378942 s: Source to Link Latency : Avg = 248739 us, Min = 239645 us, Max = 444885 us, DSP1: ----------- [IPU1-0] 78.885499 s: ### CPU [ DSP1], LinkID [ 49], [IPU1-0] 78.885560 s: [IPU1-0] 78.885621 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 78.885713 s: ****************************** [IPU1-0] 78.885774 s: [IPU1-0] 78.885804 s: Elapsed time = 21604 msec [IPU1-0] 78.885896 s: [IPU1-0] 78.885926 s: New data Recv = 6.34 fps [IPU1-0] 78.886018 s: [IPU1-0] 78.886048 s: Input Statistics, [IPU1-0] 78.886109 s: [IPU1-0] 78.886140 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 78.886231 s: | FPS | FPS | FPS | FPS [IPU1-0] 78.886323 s: -------------------------------------------------- [IPU1-0] 78.886384 s: 0 | 6.38 0. 0 0. 0 6.29 [IPU1-0] 78.886536 s: [IPU1-0] 78.886567 s: Output Statistics, [IPU1-0] 78.886841 s: [IPU1-0] 78.886902 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 78.886994 s: | ID | FPS | FPS | FPS [IPU1-0] 78.887055 s: --------------------------------------------- [IPU1-0] 78.887146 s: 0 | 0 6.29 0. 0 0. 0 [IPU1-0] 78.887268 s: [IPU1-0] 78.887299 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 78.887360 s: ******************** [IPU1-0] 78.887421 s: Local Link Latency : Avg = 157848 us, Min = 156805 us, Max = 190692 us, [IPU1-0] 78.887573 s: Source to Link Latency : Avg = 908349 us, Min = 399500 us, Max = 1031965 us, Regards Surya + +Hi Surya, Thanks for reply, I have solved many questions due to you. I raised the performance of tidl_od to 10 fps through changing the build-option from debug to release. So I want to do some more performance work. I know that tda2p will have a higher CPU clock(DSP:1000MHz, EVE:900MHz ) than tda2x. I just think that the performance will go up to 14fps at least when I raise the EVE clock to 900M, So I would like to see the clock for better performance. The attached logs show that the DSP (267MHz) and EVE (600M) clocks are very low. tidl_od_ok_20_18_100_1200_fps_rel.txt Could you point me how to increase the clock of DSP/EVE/A15 ? BR, Khethan + +Hi Khethan, Good to hear that you are getting 10fps with release build Attaching the modified file to support DSP @1GHz & EVE @900MHz you need to replace the file in below folder & build sbl ti_components\drivers\pdk_01_09_00_17\packages\ti\boot\sbl_auto\sbl_lib\src\tda2xx sbl_lib_tda2xx_prcm_dpll.zip Regards Surya + +Hi Surya, Thanks for quick reply. I have built sbl after replace the file and the performance was improved to 16 fps. However, there is one strange thing. Most of the clocks seem to be set correctly as below log but EVE clock is 450MHz. tidl_od_16fps_1_450clk_h_sd.txt ipu1_1: 212MHz, ipu1_2: 212MHz, A15_0: 1.17GHz, DSP1/2 : 1GHz, EVE1/2: 450MHz Could you please explain whether the setting is wrong or the log is strange? BR, Khethan + +Hi Khethan, You can quickly check all cores frequency by navigating to System setting -> Print PRCM statistics -> Show CPU Frequency from Main menu & also when you stop use-case it use to print the frequeny of all cores [IPU1-0] 213.090312 s: #### EVE CLK = 535.0 Mhz [IPU1-0] 213.090434 s: #### DSP CLK = 600.0 Mhz [IPU1-0] 213.090556 s: #### IPU CLK = 212.800000 Mhz [IPU1-0] 213.090678 s: #### A15 CLK = 750.0 Mhz Regards Surya + +Hi Surya, I have confirmed that the desired clock is set by the method you have given. Thank you very much for your kind support in detail. BR, Khethan + +This issue is closed + diff --git a/data2/text/range/30001+/721475.txt b/data2/text/range/30001+/721475.txt new file mode 100644 index 0000000000000000000000000000000000000000..cd9eb9d5a5034a647151ccf59b342e68a47ff5a0 --- /dev/null +++ b/data2/text/range/30001+/721475.txt @@ -0,0 +1,601 @@ +Ticket Name: TDA2: [Vision_SDK 03.04.00.00] TIDL OD usecase - fail to create display link + +Query Text: +Part Number: TDA2 Hello, I train my own model with 300x300 net input, and update the net file and param file to tidlOD usecase. When I run the usecase in TDA2 EVB, it failed to create display link, the error messages is showed below.// --------------------------------------------------------------- [IPU1-0] dssPrms->inFmt.width: 300 [IPU1-0] 36.048587 s: [IPU1-0] dssPrms->inFmt.height: 300 [IPU1-0] 36.048648 s: [IPU1-0] dssPrms->inFmt.pitch0: 288 [IPU1-0] 36.048709 s: [IPU1-0] dssPrms->inFmt.pitch1: 288 [IPU1-0] 36.048770 s: [IPU1-0] dssPrms->inFmt.pitch2: 288 [IPU1-0] 36.048831 s: [IPU1-0] dssPrms->inFmt.dataFormat: 7 [IPU1-0] 36.048923 s: [IPU1-0] pObj->createArgs.rtParams.tarWidth 600 [IPU1-0] 36.048984 s: [IPU1-0] pObj->createArgs.rtParams.tarHeight 600 [IPU1-0] 36.049045 s: [IPU1-0] pObj->createArgs.rtParams.posX 660 [IPU1-0] 36.049106 s: [IPU1-0] pObj->createArgs.rtParams.posY 64 [IPU1-0] 36.049289 s: dispcore/src/vpscore_dss.c @ Line 1053: [IPU1-0] 36.049380 s: Pitch less than Width [IPU1-0] 36.049441 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: [IPU1-0] 36.049533 s: Set DSS parameter failed [IPU1-0] 36.049563 s: Assertion @ Line: 472 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! [IPU1-0] 36.050021 s: Assertion @ Line: 472 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! --------------------------------------------------------------- I think there are something wrong in inFmt.pitch2. My config file is showed belowed. //When I change (inputWidth, inputHeight) back to (768, 320), the problem disappears ------------------------------------------ inputWidth=300 inputHeight=300 inputFile=inData inputHDRFile=inHeader netFileName=tidl_net_jPNet_ssd.bin paramFileName=tidl_param_jPNet_ssd.bin fps=15 threshold=0.3 ---------------------------------------------------- So I should modified something else? Thanks a lot + +Responses: +hi, jerrytte, Did you follow the steps given in the following post? Regards, Mariya + +Hello Mariya, For VisionSDK 3.4, the following setting code is absent in vision_sdk\apps\src\rtos\usecases\tidl_OD\chains_tidlOD.c #define TIDL_OD_INPUT_WIDTH (480) #define TIDL_OD_INPUT_HEIGHT (270) #define DEC_OUT_WIDTH (480) #define DEC_OUT_HEIGHT (270) All configure parameters are provided in TIDL_SSD_CFG.txt. So I only change the TIDL_SSD_CFG.txt. ------------------------------------------ inputWidth=300 inputHeight=300 inputFile=inData inputHDRFile=inHeader netFileName=tidl_net_jPNet_ssd.bin paramFileName=tidl_param_jPNet_ssd.bin fps=15 threshold=0.3 ---------------------------------------------------- Do you mean I add the display setting code manually #define TIDL_OD_INPUT_WIDTH (300) #define TIDL_OD_INPUT_HEIGHT (300) #define DEC_OUT_WIDTH (300) #define DEC_OUT_HEIGHT (300) Thanks a lot. jerry + +Hi Mariya, I have tried to run my net model again as the info you provide in VSDK3.3, and my model's info is showed below: input image: 300x300; nclasses = 4; keep_top_k: 20 And I also change the parameters below #define TIDL_OD_INPUT_WIDTH (300) #define TIDL_OD_INPUT_HEIGHT (300) #define DEC_OUT_WIDTH (300) #define DEC_OUT_HEIGHT (300) But the result is the same to VSDK3.4, so could you give me more help? thanks a lot Best regards, Jerry + +Hi Jerry, Could you please share the complete log (1) With original settings of (768, 320) values and (2) After changing to (300,300) ? Thanks, Praveen + +Hello Praveen, Logs are provided in attachments. Thanks, Jerry 300x300_log.txt TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cyc les + + SBL Initial Config Cycles - 132388 (11.29 ms) + SOC Init Cycles - 264248 (22.54 ms) + DDR Config Clock Cycles - 67805 (5.78 ms) + App Image Load Cycles - 335738790 (28649.71 ms) + Slave Core Bootup Cycles - 322784 (27.54 ms) + SBL Boot-up Cycles - 336527348 (28717.0 ms) + Time at which SBL started IPU1_0 - 616822 (52.63 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 18.819313 s: ***** IPU1_0 Firmware build time 17:54:15 Aug 22 2018 +[IPU1-0] 18.819496 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 19.558409 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[IPU1-0] 19.558622 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 19.558714 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 19.558836 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 19.558958 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 19.559080 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 19.559171 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-0] 19.559293 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-0] 19.559415 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 19.561245 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 19.561428 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 19.575550 s: UTILS: CIO: Init Done !!! +[IPU1-0] 19.575642 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 19.575733 s: SYSTEM: Notify init done !!! +[IPU1-0] 19.577563 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 19.577655 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 19.581559 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 19.581681 s: SYSTEM: System Init in progress !!! +[IPU1-0] 19.581742 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 19.581833 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 19.581894 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 19.582016 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 19.582108 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 19.582260 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 19.582352 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 19.582504 s: SYSTEM: VPDMA Descriptor Memory Address translation E NABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 19.586469 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 19.586622 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 19.586713 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 19.586835 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 19.586957 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 19.587049 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 19.587842 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 19.587964 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 19.588025 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 19.588147 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 19.588238 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 19.588299 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 19.588757 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 19.588879 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 19.588970 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 19.589092 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 19.589214 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 19.589306 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 19.589946 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 19.590099 s: VPDMA Firmware Address = 0x9fd1c4c0 +[IPU1-0] 19.590190 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 19.590282 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 19.590373 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 19.590495 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 19.653693 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 19.654761 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 19.654944 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-0] 19.655066 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252328 B (246 KB) +[IPU1-0] 19.655249 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Tot al size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 19.655462 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Tot al size = 368037888 B (350 MB), Free size = 368037888 B (350 MB) +[IPU1-0] 19.655676 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Tot al size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 19.655859 s: SYSTEM: Initializing Links !!! +[IPU1-0] 19.921795 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 20.019429 s: BOARD: Board Init in progress !!! +[IPU1-0] 20.019825 s: BOARD: Board Init Done !!! +[IPU1-0] 20.030988 s: +[IPU1-0] 20.031080 s: Vision SDK Version : [REL_VISION_SDK_03_04_00_00] +[IPU1-0] 20.031141 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 20.031232 s: BSP Version : [PDK_01_10_00_xx] +[IPU1-0] 20.031293 s: Platform : [EVM] +[IPU1-0] 20.031354 s: SOC : [TDA2XX] +[IPU1-0] 20.031446 s: SOC Revision : [ES2.0] +[IPU1-0] 20.031507 s: Board Detected : [Vision] +[IPU1-0] 20.037668 s: EEPROM Base Board Name: [5777xCPU-DDR3] +[IPU1-0] 20.037729 s: Base Board Revision : [REV E] +[IPU1-0] 20.039071 s: Daughter Card Revision: [REV D] +[IPU1-0] 20.039132 s: +[IPU1-0] 20.042884 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 18.835417 s: ***** IPU1_1 Firmware build time 17:51:28 Aug 22 2018 +[IPU1-1] 18.835600 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 19.560879 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[IPU1-1] 19.561093 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 19.561245 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 19.561398 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 19.561520 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 19.561672 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 19.561794 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-1] 19.561916 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-1] 19.562069 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 19.564265 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 19.565424 s: UTILS: CIO: Init Done !!! +[IPU1-1] 19.565546 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 19.565637 s: SYSTEM: Notify init done !!! +[IPU1-1] 19.567589 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 19.567711 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 19.571432 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 19.571554 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 19.572500 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 19.572713 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-1] 19.572835 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 655360 B (640 KB), Free size = 645688 B (630 KB) +[IPU1-1] 19.572988 s: SYSTEM: Initializing Links !!! +[IPU1-1] 19.686970 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[IPU1-1] 19.689989 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[IPU1-1] 19.693283 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[IPU1-1] 19.696577 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[IPU1-1] 19.699749 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[IPU1-1] 19.703501 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[IPU1-1] 19.706765 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[IPU1-1] 19.710577 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[IPU1-1] 19.713780 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[IPU1-1] 19.717379 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[IPU1-1] 19.720703 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[IPU1-1] 19.720825 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 19.720917 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 18.896724 s: ***** A15_0 Firmware build time 17:50:51 Aug 22 2018 +[HOST ] 18.896754 s: *** SYSTEM: CPU Frequency , +[HOST ] 19.559415 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[HOST ] 19.559446 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[HOST ] 19.559446 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 19.559476 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 19.559476 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 19.559476 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 19.559476 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 19.559507 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[HOST ] 19.559507 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[HOST ] 19.561306 s: SYSTEM: System Common Init in progress !!! +[HOST ] 19.561337 s: SYSTEM: IPC init in progress !!! +[HOST ] 19.561367 s: SYSTEM: Notify init done !!! +[HOST ] 19.561398 s: SYSTEM: MsgQ init done !!! +[HOST ] 19.561398 s: SYSTEM: IPC init DONE !!! +[HOST ] 19.561764 s: SYSTEM: System Common Init Done !!! +[HOST ] 19.561764 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 19.561825 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 19.561825 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[HOST ] 19.561825 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 6291456 B (6144 KB), Free size = 6248512 B (6102 KB) +[HOST ] 19.561855 s: SYSTEM: Initializing Links !!! +[HOST ] 19.563838 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[HOST ] 19.563899 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[HOST ] 19.563960 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[HOST ] 19.564021 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[HOST ] 19.564082 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[HOST ] 19.564143 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[HOST ] 19.564204 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[HOST ] 19.564265 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[HOST ] 19.564326 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[HOST ] 19.564417 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[HOST ] 19.564478 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[HOST ] 19.564478 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 19.564509 s: SYSTEM: System A15 Init Done !!! +[HOST ] 19.859818 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 19.860275 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 18.882510 s: ***** DSP1 Firmware build time 17:51:57 Aug 22 2018 +[DSP1 ] 18.882602 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 19.563502 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP1 ] 19.563563 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP1 ] 19.563594 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 19.563624 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 19.563655 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 19.563685 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 19.563716 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP1 ] 19.563746 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP1 ] 19.563777 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 19.563929 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 19.563990 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 19.564204 s: UTILS: CIO: Init Done !!! +[DSP1 ] 19.564265 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 19.564265 s: SYSTEM: Notify init done !!! +[DSP1 ] 19.564417 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 19.564448 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 19.565058 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 19.565088 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 19.565302 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP1 ] 19.565332 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 19.565363 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP1 ] 19.565393 s: SYSTEM: Initializing Links !!! +[DSP1 ] 19.573140 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 19.573171 s: lz4CompDecomp Init +[DSP1 ] 19.573201 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 19.936253 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP1 ] 19.936283 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[DSP2 ] 18.882571 s: ***** DSP2 Firmware build time 17:51:57 Aug 22 2018 +[DSP2 ] 18.882632 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 19.564844 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP2 ] 19.564905 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP2 ] 19.564936 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 19.564936 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 19.564966 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 19.564997 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 19.565027 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP2 ] 19.565058 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP2 ] 19.565088 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 19.565241 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 19.565271 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 19.565454 s: UTILS: CIO: Init Done !!! +[DSP2 ] 19.565485 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 19.565515 s: SYSTEM: Notify init done !!! +[DSP2 ] 19.565637 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 19.565668 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 19.566308 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 19.566339 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 19.566522 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP2 ] 19.566552 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 19.566613 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP2 ] 19.566644 s: SYSTEM: Initializing Links !!! +[DSP2 ] 19.574300 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 19.574330 s: lz4CompDecomp Init +[DSP2 ] 19.574361 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 19.938235 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP2 ] 19.938266 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[EVE1 ] 19.547764 s: ***** EVE Firmware build time 17:51:11 Aug 22 2018 +[EVE1 ] 19.549655 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 19.568870 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE1 ] 19.570548 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE1 ] 19.572195 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 19.573781 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 19.575215 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 19.576648 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 19.578051 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE1 ] 19.579454 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE1 ] 19.580888 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 19.583114 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 19.585524 s: UTILS: CIO: Init Done !!! +[EVE1 ] 19.586530 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 19.588116 s: SYSTEM: Notify init done !!! +[EVE1 ] 19.590160 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 19.591166 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 19.607149 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 19.608338 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 19.610016 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 19.611358 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE1 ] 19.612731 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 19.615262 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE1 ] 19.617550 s: SYSTEM: Initializing Links !!! +[EVE1 ] 19.709906 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 19.711004 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 19.543036 s: ***** EVE Firmware build time 17:51:09 Aug 22 2018 +[EVE2 ] 19.544927 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 19.571097 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE2 ] 19.572744 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE2 ] 19.574300 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 19.575733 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 19.577167 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 19.578570 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 19.580003 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE2 ] 19.581406 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE2 ] 19.583053 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 19.585249 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 19.588147 s: UTILS: CIO: Init Done !!! +[EVE2 ] 19.589275 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 19.590404 s: SYSTEM: Notify init done !!! +[EVE2 ] 19.592417 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 19.593424 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 19.608643 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 19.609833 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 19.611450 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 19.612731 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE2 ] 19.614225 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 19.616665 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE2 ] 19.619075 s: SYSTEM: Initializing Links !!! +[EVE2 ] 19.711797 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 19.712865 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 19.544988 s: ***** EVE Firmware build time 17:51:10 Aug 22 2018 +[EVE3 ] 19.546971 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 19.573323 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE3 ] 19.574849 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE3 ] 19.576252 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE3 ] 19.577685 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE3 ] 19.579088 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE3 ] 19.580522 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE3 ] 19.581925 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE3 ] 19.583572 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE3 ] 19.585219 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE3 ] 19.587872 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 19.590434 s: UTILS: CIO: Init Done !!! +[EVE3 ] 19.591471 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 19.592631 s: SYSTEM: Notify init done !!! +[EVE3 ] 19.594888 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 19.595894 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 19.610778 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 19.611938 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 19.613554 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 19.614866 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE3 ] 19.616238 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 19.618800 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE3 ] 19.621393 s: SYSTEM: Initializing Links !!! +[EVE3 ] 19.713292 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 19.714359 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 19.549960 s: ***** EVE Firmware build time 17:51:10 Aug 22 2018 +[EVE4 ] 19.551759 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 19.573323 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE4 ] 19.574849 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE4 ] 19.576252 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE4 ] 19.577716 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE4 ] 19.579119 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE4 ] 19.580522 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE4 ] 19.581925 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE4 ] 19.583511 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE4 ] 19.585188 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE4 ] 19.587872 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 19.590373 s: UTILS: CIO: Init Done !!! +[EVE4 ] 19.591380 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 19.592600 s: SYSTEM: Notify init done !!! +[EVE4 ] 19.594888 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 19.595864 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 19.610717 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 19.611877 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 19.613524 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 19.614835 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE4 ] 19.616177 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 19.618678 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE4 ] 19.621271 s: SYSTEM: Initializing Links !!! +[EVE4 ] 19.712987 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 19.714085 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 18.817117 s: ***** IPU2 Firmware build time 17:54:15 Aug 22 2018 +[IPU2 ] 18.817300 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 19.562221 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[IPU2 ] 19.562435 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[IPU2 ] 19.562557 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 19.562679 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 19.562801 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 19.562923 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 19.563014 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU2 ] 19.563136 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU2 ] 19.563258 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 19.566095 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 19.567528 s: UTILS: CIO: Init Done !!! +[IPU2 ] 19.567650 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 19.567742 s: SYSTEM: Notify init done !!! +[IPU2 ] 19.569694 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 19.569816 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 19.575001 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 19.575093 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 19.575947 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 19.576221 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU2 ] 19.576343 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 252424 B (246 KB) +[IPU2 ] 19.576557 s: SYSTEM: Initializing Links !!! +[IPU2 ] 19.687732 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[IPU2 ] 19.690599 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[IPU2 ] 19.693588 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[IPU2 ] 19.696638 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[IPU2 ] 19.699719 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[IPU2 ] 19.702891 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[IPU2 ] 19.705941 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[IPU2 ] 19.709083 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[IPU2 ] 19.712133 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[IPU2 ] 19.715183 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[IPU2 ] 19.718233 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[IPU2 ] 19.718355 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 19.718507 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 21.178338 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA22 6 is connected on I2C3 Lines +[IPU1-0] 21.182486 s: QSPI Init Started +[IPU1-0] 21.182760 s: MID - 1 +[IPU1-0] 21.182821 s: DID - 18 +[IPU1-0] 21.182882 s: QSPI Init Completed Sucessfully +[IPU1-0] 21.195327 s: +[IPU1-0] 21.195388 s: Current System Settings, +[IPU1-0] 21.195479 s: ======================== +[IPU1-0] 21.195540 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 21.195601 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - V IP, YUV422 +[IPU1-0] 21.195693 s: My IP address : 0.0.0.0 +[IPU1-0] 21.195754 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 21.195815 s: +[IPU1-0] 21.195845 s: ============ +[IPU1-0] 21.195906 s: Usecase Menu +[IPU1-0] 21.195937 s: ============ +[IPU1-0] 21.195998 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 24.563685 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 24.563716 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !! ! +[IPU1-0] 84.680381 s: +[IPU1-0] 84.680534 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 2: Semantic Segmentation Usecase +[IPU1-0] 3: TIDL OD Usecase +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 86.148447 s: +[IPU1-0] 86.202128 s: TIDL Configuration parameters +[IPU1-0] 86.202250 s: ----------------------------- +[IPU1-0] 86.202311 s: inputWidth = 300 +[IPU1-0] 86.202372 s: inputHeight = 300 +[IPU1-0] 86.202433 s: inputFile = inData +[IPU1-0] 86.202464 s: inputHDRFile = inHeader +[IPU1-0] 86.202525 s: netFileName = tidl_net_jpNet300x300_ssd.bin +[IPU1-0] 86.202616 s: paramFileName = tidl_param_jpNet300x300_ssd.bin +[IPU1-0] 86.202677 s: inputfps = 15 +[IPU1-0] 86.202738 s: threshold = 0.300000 +[IPU1-0] 86.202860 s: ----------------------------- +[IPU1-0] 87.265692 s: +[IPU1-0] pChInfo->width: 300 +[IPU1-0] 87.265753 s: +[IPU1-0] pChInfo->height: 300 +[IPU1-0] 87.265814 s: +[IPU1-0] pChInfo->pitch0: 320 +[IPU1-0] 87.265875 s: +[IPU1-0] pChInfo->pitch1: 320 +[IPU1-0] 87.288781 s: FILE: Reading file [inHeader +[IPU1-0] ] ... +[IPU1-0] 87.301439 s: FILE: File read Done. [10868 bytes] +[IPU1-0] 87.312816 s: DECODE: Create in progress ... !!! +[IPU1-0] 87.443725 s: DECODE: Creating CH0 of 300 x 300 [1] [0],target bitr ate = 10000 Kbps ... +[IPU1-0] 87.444519 s: DECODE: All CH Create ... DONE !!! +[IPU1-0] 87.446288 s: DECODE: Create ... DONE !!! +[IPU1-0] 87.446654 s: VPE: Create in progress !!! +[IPU1-0] 87.519673 s: VPE: Loading Down-scaling Co-effs +[IPU1-0] 87.519947 s: VPE: Co-effs Loading ... DONE !!! +[IPU1-0] 87.520191 s: VPE: Create Done !!! +[IPU1-0] 87.521350 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 87.521686 s: IPC_OUT_0 : Create Done !!! +[HOST ] 87.521838 s: IPC_IN_0 : Create in progress !!! +[HOST ] 87.522113 s: IPC_IN_0 : Create Done !!! +[HOST ] 87.522326 s: ALGORITHM: Create in progress (algId = 12) !!! +[HOST ] 87.526139 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) +[HOST ] 87.526139 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) +[HOST ] 87.526169 s: ALGORITHM: Create Done (algId = 12) !!! +[HOST ] 87.526261 s: IPC_OUT_3 : Create in progress !!! +[HOST ] 87.526291 s: IPC_OUT_3 : Create Done !!! +[EVE4 ] 87.526566 s: IPC_IN_0 : Create in progress !!! +[EVE4 ] 87.527450 s: IPC_IN_0 : Create Done !!! +[EVE4 ] 87.528182 s: ALGORITHM: Create in progress (algId = 14) !!! +[HOST ] 89.390837 s: IPC_OUT_2 : Create in progress !!! +[HOST ] 89.390868 s: IPC_OUT_2 : Create Done !!! +[DSP1 ] 89.390105 s: IPC_IN_3 : Create in progress !!! +[DSP1 ] 89.390715 s: IPC_IN_3 : Create Done !!! +[EVE3 ] 89.391142 s: IPC_IN_0 : Create in progress !!! +[EVE3 ] 89.391996 s: IPC_IN_0 : Create Done !!! +[EVE3 ] 89.392545 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE4 ] 89.388580 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE4 ] 89.389160 s: IPC_OUT_0 : Create in progress !!! +[EVE4 ] 89.389617 s: IPC_OUT_0 : Create Done !!! +[EVE3 ] 91.252821 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE3 ] 91.253431 s: IPC_OUT_0 : Create in progress !!! +[EVE3 ] 91.253858 s: IPC_OUT_0 : Create Done !!! +[HOST ] 91.254864 s: IPC_OUT_1 : Create in progress !!! +[HOST ] 91.254864 s: IPC_OUT_1 : Create Done !!! +[DSP1 ] 91.254254 s: IPC_IN_2 : Create in progress !!! +[DSP1 ] 91.254712 s: IPC_IN_2 : Create Done !!! +[EVE2 ] 91.255139 s: IPC_IN_0 : Create in progress !!! +[EVE2 ] 91.256023 s: IPC_IN_0 : Create Done !!! +[EVE2 ] 91.256755 s: ALGORITHM: Create in progress (algId = 14) !!! +[HOST ] 93.136704 s: IPC_OUT_0 : Create in progress !!! +[HOST ] 93.136735 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 93.135972 s: IPC_IN_1 : Create in progress !!! +[DSP1 ] 93.136582 s: IPC_IN_1 : Create Done !!! +[EVE1 ] 93.137009 s: IPC_IN_0 : Create in progress !!! +[EVE1 ] 93.137863 s: IPC_IN_0 : Create Done !!! +[EVE1 ] 93.138412 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE2 ] 93.134508 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE2 ] 93.135118 s: IPC_OUT_0 : Create in progress !!! +[EVE2 ] 93.135545 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 95.013115 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 95.013572 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 95.013908 s: ALGORITHM: Create in progress (algId = 36) !!! +[DSP1 ] 95.021564 s: ALGORITHM: Create Done (algId = 36) !!! +[DSP1 ] 95.021716 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 95.021777 s: IPC_OUT_0 : Create Done !!! +[EVE1 ] 95.011529 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE1 ] 95.012291 s: IPC_OUT_0 : Create in progress !!! +[EVE1 ] 95.012749 s: IPC_OUT_0 : Create Done !!! +[IPU1-0] 95.021869 s: IPC_IN_0 : Create in progress !!! +[IPU1-0] 95.022906 s: IPC_IN_0 : Create Done !!! +[IPU1-0] 95.023973 s: ALGORITHM: Create in progress (algId = 1) !!! +[IPU1-0] 95.024980 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) +[IPU1-0] 95.025132 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) +[IPU1-0] 95.031629 s: ALGORITHM: Create Done (algId = 1) !!! +[IPU1-0] 95.031842 s: DISPLAY: Create in progress !!! +[IPU1-0] 95.032086 s: +[IPU1-0] dssPrms->inFmt.width: 300 +[IPU1-0] 95.032147 s: +[IPU1-0] dssPrms->inFmt.height: 300 +[IPU1-0] 95.032208 s: +[IPU1-0] dssPrms->inFmt.pitch0: 288 +[IPU1-0] 95.032269 s: +[IPU1-0] dssPrms->inFmt.pitch1: 288 +[IPU1-0] 95.032330 s: +[IPU1-0] dssPrms->inFmt.pitch2: 288 +[IPU1-0] 95.032391 s: +[IPU1-0] dssPrms->inFmt.dataFormat: 7 +[IPU1-0] 95.032513 s: +[IPU1-0] pObj->createArgs.rtParams.tarWidth 600 +[IPU1-0] 95.032605 s: +[IPU1-0] pObj->createArgs.rtParams.tarHeight 600 +[IPU1-0] 95.032666 s: +[IPU1-0] pObj->createArgs.rtParams.posX 660 +[IPU1-0] 95.032727 s: +[IPU1-0] pObj->createArgs.rtParams.posY 64 +[IPU1-0] 95.032849 s: dispcore/src/vpscore_dss.c @ Line 1053: +[IPU1-0] 95.032910 s: Pitch less than Width +[IPU1-0] 95.033001 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: +[IPU1-0] 95.033062 s: Set DSS parameter failed +[IPU1-0] 95.033123 s: Assertion @ Line: 472 in displayLink_drv.c: status==S YSTEM_LINK_STATUS_SOK : failed !!! +[IPU1-0] 95.033611 s: Assertion @ Line: 472 in displayLink_drv.c: status==S YSTEM_LINK_STATUS_SOK : failed !!! + + 768x320_log.txt + +Hi Jerry, We are not able to get from exactly the assertion is coming. Can you please try with a input sizes whose width and height are 32 byte aligned, say (320*320) and check? Thanks, Praveen + +Hello Praveen, I have tried 576x288 and 320x320, both are OK. For 300x300, dssPrms->inFmt.pitch0 is 288 according to the log, and it hints 'Pitch less than Width' So I think there are something wrong when calculating dssPrms->inFmt.pitch. For 300x300, I think the pitch should be 320, not 288. Thanks Jerry + +Hi Jerry, Is this issue resolved? if so I will close the thread. Thanks, Praveen + diff --git a/data2/text/range/30001+/724244.txt b/data2/text/range/30001+/724244.txt new file mode 100644 index 0000000000000000000000000000000000000000..e9e5524ad452870c12cb3cb7abfff8974b302579 --- /dev/null +++ b/data2/text/range/30001+/724244.txt @@ -0,0 +1,665 @@ +Ticket Name: Linux/TDA2: TDA2xx support for PCIe EP Linux driver. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, We are using two TDA2xx evms for PCI interface integration between two boards. This the link which we followed http://processors.wiki.ti.com/index.php/Linux_Core_PCIe_EP_User%27s_Guide For the endpoint device we got error like below. How to resolve this error in endpoint controller device? The kernel log is shown below:- [ 0.599817] ---[ end trace 89b6ef26cae49ac5 ]--- [ 0.599829] dra7-pcie 51000000.pcie_ep: pm_runtime_get_sync failed [ 0.599857] dra7-pcie: probe of 51000000.pcie_ep failed with error -22 We are using PROCESSOR_SDK_VISION_03_04_00_00 + +Responses: +Hi Sreerag, I have pinged an expert to comment. Regards, Yordan + +Hi have you made the required Device tree modifications to configure on of the boards in Endpoint mode. Can you attach the full boot up log and brief summary of changes carried out + +attached the code changes and kernel log. changes.diff diff --git a/ti_components/os_tools/linux/kernel/omap/.config b/ti_components/os_tools/linux/kernel/omap/.config +index f31cd9a..3a9f9f6 100644 +--- a/ti_components/os_tools/linux/kernel/omap/.config ++++ b/ti_components/os_tools/linux/kernel/omap/.config +@@ -493,9 +493,11 @@ CONFIG_PCI_MSI=y + # PCI controller drivers + # + CONFIG_PCI_DRA7XX=y +-CONFIG_PCI_DRA7XX_HOST=y ++# CONFIG_PCI_DRA7XX_HOST is not set ++CONFIG_PCI_DRA7XX_EP=y ++# CONFIG_PCI_DRA7XX_HOST_EP is not set + CONFIG_PCIE_DW=y +-CONFIG_PCIE_DW_HOST=y ++CONFIG_PCIE_DW_EP=y + CONFIG_PCI_HOST_GENERIC=y + # CONFIG_PCI_LAYERSCAPE is not set + # CONFIG_PCIE_IPROC is not set +@@ -504,7 +506,8 @@ CONFIG_PCI_HOST_GENERIC=y + # + # PCI Endpoint + # +-# CONFIG_PCI_ENDPOINT is not set ++CONFIG_PCI_ENDPOINT=y ++CONFIG_PCI_EPF_TEST=y + CONFIG_PCIEPORTBUS=y + CONFIG_PCIEAER=y + # CONFIG_PCIE_ECRC is not set +@@ -1420,7 +1423,7 @@ CONFIG_ISL29003=y + # CONFIG_USB_SWITCH_FSA9480 is not set + # CONFIG_LATTICE_ECP3_CONFIG is not set + CONFIG_SRAM=y +-# CONFIG_PCI_ENDPOINT_TEST is not set ++CONFIG_PCI_ENDPOINT_TEST=y + # CONFIG_C2PORT is not set + + # +@@ -4648,7 +4651,7 @@ CONFIG_TMPFS=y + CONFIG_TMPFS_POSIX_ACL=y + CONFIG_TMPFS_XATTR=y + # CONFIG_HUGETLB_PAGE is not set +-CONFIG_CONFIGFS_FS=m ++CONFIG_CONFIGFS_FS=y + CONFIG_MISC_FILESYSTEMS=y + # CONFIG_ADFS_FS is not set + # CONFIG_AFFS_FS is not set +diff --git a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/am572x-idk.dts b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/am572x-idk.dts +index c64e047..e888250 100644 +--- a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/am572x-idk.dts ++++ b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/am572x-idk.dts +@@ -414,11 +414,11 @@ + }; + + &pcie1_rc { +- status = "okay"; + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + }; + + &pcie1_ep { ++ status = "okay"; + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + }; + +diff --git a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts +index 7da016d..244b70e 100644 +--- a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts ++++ b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm.dts +@@ -952,6 +952,10 @@ i2c_p3_exp: &i2c2 { + vdd-supply = <&smps7_reg>; + }; + ++&pcie1_ep { ++ status = "okay"; ++}; ++ + &omap_dwc3_2 { + extcon = <&extcon_usb2>; + }; +diff --git a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-common.dtsi b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-common.dtsi +index 37b4e13..5ac99c8 100644 +--- a/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-common.dtsi ++++ b/ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra72-evm-common.dtsi +@@ -738,6 +738,6 @@ i2c_p3_exp: &i2c5 { + watchdog-timers = <&timer10>; + }; + +-&pcie1_rc { ++&pcie1_ep { + status = "okay"; + }; + 3678.kernel_log.txt Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00027-g018eb62-dirty (vkchlt0200@vkchlt0200-HP-Laptop-15-bs1xx) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #31 SMP PREEMPT Mon Sep 3 14:31:11 IST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 +[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0xbe400000 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=37bb6f82-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 411820K/980992K available (6687K kernel code, 319K rwdata, 2404K rodata, 336K init, 286K bss, 364372K reserved, 204800K cma-reserved, 235520K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e900c (9093 kB) +[ 0.000000] .init : 0xc08ea000 - 0xc093e000 ( 336 kB) +[ 0.000000] .data : 0xc093e000 - 0xc098dda0 ( 320 kB) +[ 0.000000] .bss : 0xc098f000 - 0xc09d6a00 ( 287 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000334] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000342] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000791] Console: colour dummy device 80x30 +[ 0.000806] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000813] This ensures that you still see kernel messages. Please +[ 0.000818] update your kernel commandline. +[ 0.000832] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000845] pid_max: default: 32768 minimum: 301 +[ 0.000941] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000951] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001493] Initializing cgroup subsys io +[ 0.001510] Initializing cgroup subsys memory +[ 0.001533] Initializing cgroup subsys devices +[ 0.001545] Initializing cgroup subsys freezer +[ 0.001557] Initializing cgroup subsys perf_event +[ 0.001567] Initializing cgroup subsys pids +[ 0.001593] CPU: Testing write buffer coherency: ok +[ 0.001799] /cpus/cpu@0 missing clock-frequency property +[ 0.001815] /cpus/cpu@1 missing clock-frequency property +[ 0.001825] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001866] Setting up static identity map for 0x80008340 - 0x800083a0 +[ 0.080175] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080243] Brought up 2 CPUs +[ 0.080255] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080262] CPU: All CPU(s) started in HYP mode. +[ 0.080267] CPU: Virtualization extensions available. +[ 0.081299] devtmpfs: initialized +[ 0.109498] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110490] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.317190] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.317210] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.321263] pinctrl core: initialized pinctrl subsystem +[ 0.322098] NET: Registered protocol family 16 +[ 0.323014] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350244] cpuidle: using governor ladder +[ 0.380273] cpuidle: using governor menu +[ 0.389240] OMAP GPIO hardware version 0.1 +[ 0.395831] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.412398] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.412412] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.422055] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.422065] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.422538] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.422546] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.423022] OMAP DMA hardware revision 0.0 +[ 0.461649] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462829] edma 43300000.edma: memcpy is disabled +[ 0.467449] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471824] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.471999] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472156] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472311] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472619] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472807] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.475820] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491233] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563516] pcf857x 0-0020: probed +[ 0.564077] pcf857x 0-0021: probed +[ 0.564227] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564637] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.564843] media: Linux media interface: v0.10 +[ 0.564894] Linux video capture interface: v2.00 +[ 0.564933] pps_core: LinuxPPS API ver. 1 registered +[ 0.564940] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.564963] PTP clock support registered +[ 0.565008] EDAC MC: Ver: 3.0.0 +[ 0.565762] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.566060] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566401] Advanced Linux Sound Architecture Driver Initialized. +[ 0.567229] clocksource: Switched to clocksource arch_sys_counter +[ 0.577672] NET: Registered protocol family 2 +[ 0.578170] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578233] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578358] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578404] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578435] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578640] NET: Registered protocol family 1 +[ 0.578902] RPC: Registered named UNIX socket transport module. +[ 0.578910] RPC: Registered udp transport module. +[ 0.578917] RPC: Registered tcp transport module. +[ 0.578923] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.579935] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.588741] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.589374] NFS: Registering the id_resolver key type +[ 0.589402] Key type id_resolver registered +[ 0.589410] Key type id_legacy registered +[ 0.589481] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.590724] bounce: pool size: 64 pages +[ 0.590875] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.590890] io scheduler noop registered +[ 0.590901] io scheduler deadline registered +[ 0.590932] io scheduler cfq registered (default) +[ 0.595797] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.599400] ------------[ cut here ]------------ +[ 0.599417] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2108 _enable+0x2bc/0x2d8() +[ 0.599424] omap_hwmod: pcie1: enabled state can only be entered from initialized, idle, or disabled state +[ 0.599431] Modules linked in: +[ 0.599444] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84-00027-g018eb62-dirty #31 +[ 0.599452] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 0.599458] Backtrace: +[ 0.599478] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 0.599485] r7:c0025730 r6:20000093 r5:00000000 r4:c095d690 +[ 0.599514] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 0.599527] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 0.599533] r7:c0025730 r6:0000083c r5:00000009 r4:ef07dbf0 +[ 0.599554] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 0.599560] r8:00000004 r7:c0027128 r6:a0000013 r5:c094bac0 r4:c08268c0 +[ 0.599585] [] (warn_slowpath_fmt) from [] (_enable+0x2bc/0x2d8) +[ 0.599591] r3:c082890c r2:c08268c0 +[ 0.599601] r4:c094ba60 +[ 0.599613] [] (_enable) from [] (omap_hwmod_enable+0x2c/0x4c) +[ 0.599619] r7:c0027128 r6:a0000013 r5:c094bac0 r4:c094ba60 +[ 0.599641] [] (omap_hwmod_enable) from [] (omap_device_enable+0x48/0x98) +[ 0.599647] r7:c0027128 r6:ef21c080 r5:00000000 r4:00000001 +[ 0.599668] [] (omap_device_enable) from [] (_od_runtime_resume+0x18/0x2c) +[ 0.599674] r7:c0027128 r6:c0027128 r5:ef21b074 r4:ef21b010 +[ 0.599700] [] (_od_runtime_resume) from [] (__rpm_callback+0x34/0x68) +[ 0.599705] r5:ef21b074 r4:ef21b010 +[ 0.599722] [] (__rpm_callback) from [] (rpm_callback+0x28/0x88) +[ 0.599728] r7:c0027128 r6:ef21ac10 r5:ef21b010 r4:ef21b010 +[ 0.599751] [] (rpm_callback) from [] (rpm_resume+0x374/0x56c) +[ 0.599757] r7:c0027128 r6:ef21ac10 r5:c0940100 r4:ef21b010 +[ 0.599779] [] (rpm_resume) from [] (__pm_runtime_resume+0x54/0x6c) +[ 0.599785] r10:00000000 r9:ee88b914 r8:00000001 r7:60000013 r6:00000004 r5:ef21b074 +[ 0.599806] r4:ef21b010 +[ 0.599820] [] (__pm_runtime_resume) from [] (dra7xx_pcie_probe+0x270/0x7e8) +[ 0.599826] r7:ef21b000 r6:ee88b790 r5:ee860810 r4:ef21b010 +[ 0.599850] [] (dra7xx_pcie_probe) from [] (platform_drv_probe+0x54/0xb8) +[ 0.599856] r10:00000000 r9:c08ea600 r8:00000000 r7:fffffdfb r6:c095fcf4 r5:ef21b010 +[ 0.599875] r4:c09c9ac4 +[ 0.599889] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) +[ 0.599895] r7:c095fcf4 r6:00000000 r5:ef21b010 r4:c09c9ac4 +[ 0.599917] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 0.599923] r9:c08ea600 r8:000000ab r7:00000000 r6:ef21b044 r5:c095fcf4 r4:ef21b010 +[ 0.599949] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) +[ 0.599955] r7:00000000 r6:c03ee300 r5:c095fcf4 r4:00000000 +[ 0.599976] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 0.599982] r6:c096e630 r5:ee863f00 r4:c095fcf4 +[ 0.600000] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) +[ 0.600012] [] (bus_add_driver) from [] (driver_register+0x80/0x100) +[ 0.600017] r7:ee88b3c0 r6:c095fcf4 r5:c096e630 r4:c095fcf4 +[ 0.600040] [] (driver_register) from [] (__platform_driver_probe+0x70/0x11c) +[ 0.600046] r5:c096e630 r4:c095fce0 +[ 0.600062] [] (__platform_driver_probe) from [] (dra7xx_pcie_driver_init+0x24/0x28) +[ 0.600068] r7:ee88b3c0 r6:c09436f0 r5:c090c030 r4:c09436f0 +[ 0.600090] [] (dra7xx_pcie_driver_init) from [] (do_one_initcall+0x98/0x1e4) +[ 0.600102] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) +[ 0.600107] r10:00000007 r9:c08ea600 r8:000000ab r7:c092a834 r6:c0938730 r5:c098f000 +[ 0.600127] r4:c098f000 +[ 0.600144] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) +[ 0.600150] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0688ffc +[ 0.600169] r4:c098f000 +[ 0.600183] [] (kernel_init) from [] (ret_from_fork+0x14/0x3c) +[ 0.600189] r5:c0688ffc r4:00000000 +[ 0.600208] ---[ end trace 14ea3df428d3e8d5 ]--- +[ 0.600221] dra7-pcie 51000000.pcie_ep: pm_runtime_get_sync failed +[ 0.600250] dra7-pcie: probe of 51000000.pcie_ep failed with error -22 +[ 0.658229] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.661559] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.997894] console [ttyS0] enabled +[ 2.002271] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 2.011950] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 2.022005] [drm] Initialized drm 1.1.0 20060810 +[ 2.027543] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.034188] [drm] No driver support for vblank timestamp query. +[ 2.040422] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 2.047621] OMAP DSS rev 6.1 +[ 2.051357] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 2.087047] loop: module loaded +[ 2.090622] vmemexp device MAJOR num = 245 +[ 2.094758] vmemexp class registered +[ 2.098492] /dev/vmemexp device registered +[ 2.102607] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 2.108301] nand: No NAND device found +[ 2.112071] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 2.121970] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 2.127388] 7 ofpart partitions found on MTD device spi32766.0 +[ 2.133247] Creating 7 MTD partitions on "spi32766.0": +[ 2.138426] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 2.144532] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 2.150890] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 2.157834] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 2.164489] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 2.171867] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 2.178194] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 2.185902] libphy: Fixed MDIO Bus: probed +[ 2.237263] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.243389] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 2.253682] libphy: 48485000.mdio: probed +[ 2.257730] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 2.265771] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 2.274467] cpsw 48484000.ethernet: Detected MACID = e8:eb:11:6d:45:78 +[ 2.281126] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 2.288116] cpsw 48484000.ethernet: cpsw: Detected MACID = e8:eb:11:6d:45:79 +[ 2.296739] mousedev: PS/2 mouse device common for all mice +[ 2.302917] i2c /dev entries driver +[ 2.311660] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.317279] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.323663] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.330196] evm_3v3_sw: supplied by sysen1 +[ 2.411007] mmc0: MAN_BKOPS_EN bit is not set +[ 2.422913] mmc0: new HS200 MMC card at address 0001 +[ 2.428354] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.433142] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.439318] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.489044] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.497553] aic_dvdd: supplied by evm_3v3_sw +[ 2.503456] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.510937] NET: Registered protocol family 10 +[ 2.526200] sit: IPv6 over IPv4 tunneling driver +[ 2.531421] NET: Registered protocol family 17 +[ 2.536099] Key type dns_resolver registered +[ 2.540558] omap_voltage_late_init: Voltage driver support not added +[ 2.547475] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.553685] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.560400] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.566609] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.574838] Power Management for TI OMAP4+ devices. +[ 2.579935] Registering SWP/SWPB emulation handler +[ 2.585627] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.592883] dmm 4e000000.dmm: initialized all PAT entries +[ 2.600165] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.606803] [drm] No driver support for vblank timestamp query. +[ 2.613119] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.629973] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.668580] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.688172] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.697311] hctosys: unable to open rtc device (rtc0) +[ 2.710670] evm_1v8: disabling +[ 2.713748] aic_dvdd: disabling +[ 2.716906] vmmcwl_fixed: disabling +[ 2.720606] ldousb: disabling +[ 2.724010] ALSA device list: +[ 2.726986] #0: DRA7xx-EVM +[ 2.730538] Waiting for root device PARTUUID=37bb6f82-02... +[ 2.799294] omap_hsmmc 4809c000.mmc: card busy +[ 2.919293] omap_hsmmc 4809c000.mmc: card busy +[ 3.039314] omap_hsmmc 4809c000.mmc: card busy +[ 3.159313] omap_hsmmc 4809c000.mmc: card busy +[ 3.279309] omap_hsmmc 4809c000.mmc: card busy +[ 3.399330] omap_hsmmc 4809c000.mmc: card busy +[ 3.519328] omap_hsmmc 4809c000.mmc: card busy +[ 3.639326] omap_hsmmc 4809c000.mmc: card busy +[ 3.759328] omap_hsmmc 4809c000.mmc: card busy +[ 3.879324] omap_hsmmc 4809c000.mmc: card busy +[ 3.917248] mmc2: Skipping voltage switch +[ 3.984388] mmc2: host does not support reading read-only switch, assuming write-enable +[ 3.994384] mmc2: new high speed SDHC card at address 0007 +[ 4.000357] mmcblk1: mmc2:0007 SL16G 14.5 GiB +[ 4.006040] mmcblk1: p1 p2 +[ 4.048046] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 4.056868] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 17.520748] EXT4-fs (mmcblk1p2): recovery complete +[ 17.544176] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 17.552387] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 17.562073] devtmpfs: mounted +[ 17.565291] Freeing unused kernel memory: 336K +[ 17.569771] This architecture does not have kernel memory protection. +[ 17.781690] systemd[1]: System time before build time, advancing clock. +[ 17.831991] random: systemd: uninitialized urandom read (16 bytes read, 34 bits of entropy available) +[ 17.845136] random: systemd: uninitialized urandom read (16 bytes read, 34 bits of entropy available) +[ 17.862918] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -ID) +[ 17.881544] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 17.908381] systemd[1]: Set hostname to . +[ 17.967178] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 34 bits of entropy available) +[ 18.001972] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 35 bits of entropy available) +[ 18.012176] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 35 bits of entropy available) +[ 18.032138] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 35 bits of entropy available) +[ 18.051190] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 36 bits of entropy available) +[ 18.144036] random: systemd: uninitialized urandom read (16 bytes read, 39 bits of entropy available) +[ 18.153576] random: systemd: uninitialized urandom read (16 bytes read, 39 bits of entropy available) +[ 18.163620] random: systemd: uninitialized urandom read (16 bytes read, 39 bits of entropy available) +[ 18.543709] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 18.551548] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 18.559319] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 18.566577] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 18.574286] systemd[1]: sysinit.target: Found dependency on dbus.socket/start +[ 18.581471] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 18.588916] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 18.598368] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 18.629431] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 18.657572] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 18.677633] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 18.697504] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 18.727517] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 18.757623] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 18.777423] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 18.800227] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 18.827426] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 18.857464] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 18.877551] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 18.907395] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 18.939561] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 18.968043] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 19.027423] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 19.048289] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 19.082780] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 19.107505] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 19.157442] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 19.189665] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 19.205968] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 19.219891] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 19.259613] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 19.273769] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 19.298228] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 19.357445] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 19.393785] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 19.427557] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 19.447482] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 19.467664] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Setup Virtual Console. + Starting Create Static Device Nodes in /dev... + Starting udev Coldplug all Devices... + Mounting Configuration File System... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted Configuration File System. +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 20.209672] systemd-journald[157]: Received request to flush runtime journal from PID 1 + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Flush Journal to Persistent Storage. +[ 20.565228] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 20.578140] remoteproc0: 55020000.ipu is available +[ 20.592980] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 20.608131] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Load/Save Random Seed... +[ 20.643442] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ OK ] Reached target Local File Systems.[ 20.664429] remoteproc1: 40800000.dsp is available + +[ 20.689410] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 20.708747] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Create Volatile Files and Directories... +[ 20.736312] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ OK ] Started udev Coldplug all Devices.[ 20.765005] remoteproc2: 41000000.dsp is available + +[ 20.786252] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 20.814636] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Volatile Files and Directories. +[ OK ] Found device /dev/ttyS0. +[ 21.014867] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 21.099891] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 21.148803] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ 21.617634] SCSI subsystem initialized +[ 21.893364] remoteproc0: registered virtio0 (type 7) +[ 21.930154] remoteproc2: registered virtio1 (type 7) +[ 21.992284] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 21.998979] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 22.049209] CAN device driver interface +[ 22.176308] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ OK ] Started Network Time Synchronization. +[ OK ] Reached target System Time Synchronized. +[ 22.365557] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 22.395945] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled + Starting Synchronize System and HW clocks...[ 22.409698] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode + +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 22.440491] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 22.456270] remoteproc1: registered virtio2 (type 7) +[ 22.493779] scsi host0: ahci +[ 22.496915] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 22.847275] ata1: SATA link down (SStatus 0 SControl 300) +[ 22.854940] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ OK ] Started System Logging Service. + Starting rc.pvr.service... + Starting Save/Restore Sound Card State... +[ OK ] Started Kernel Logging Service. + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. +[ 23.104634] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] + Starting Network Service... + Starting Login Service... +[ OK ] Started Network Service. +[ 23.359307] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started rc.pvr.service. +[ 23.394966] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Started Save/Restore Sound Card State. +[ 23.434329] net eth0: initialized cpsw ale version 1.4 +[ OK ] Started Permit User Sessions. +[ 23.451513] net eth0: ALE Table size 1024 +[ 23.479774] net eth1: phy found : id is : 0x20005c7a +[ 23.517970] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 23.548982] net eth0: initializing cpsw version 1.15 (0) +[ 23.583935] net eth0: phy found : id is : 0x20005c7a +[ 23.617620] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 23.761736] remoteproc0: powering up 55020000.ipu +[ 23.799626] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9441564 +[ 23.817335] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 23.872052] remoteproc0: remote processor 55020000.ipu is now up +[ 23.884908] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 23.897917] remoteproc2: powering up 41000000.dsp +[ 23.918404] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6966879 +[ 23.931945] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 23.937825] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 23.943764] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 24.021680] remoteproc2: remote processor 41000000.dsp is now up +[ 24.039393] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 24.057985] remoteproc1: powering up 40800000.dsp +[ 24.080187] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6966879 +[ 24.093691] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 24.099574] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 24.105496] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 24.167292] remoteproc1: remote processor 40800000.dsp is now up +[ 24.188347] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 24.256625] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 24.268680] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 24.287275] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 24.307336] NET: Registered protocol family 41 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. + Starting weston.service... +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started weston.service. +[ OK ] Started Login Service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started Network Name Resolution. +[ 24.624346] usbcore: registered new interface driver usbfs +[ 24.632132] usbcore: registered new interface driver hub +[ OK ] Started telnetd.service.[ 24.639111] usbcore: registered new device driver usb + +[ OK ] Started tiipclad-daemon.service. +[ 24.743102] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 24.750226] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 24.757141] dwc3 48890000.usb: otg: can't start till gadget registers +[ 24.763857] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 24.769513] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 24.777582] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 24.777623] xhci-hcd xhci-hcd.1.auto: irq 467, io mem 0x488d0000 +[ 24.794151] hub 1-0:1.0: USB hub found +[ 24.797993] hub 1-0:1.0: 1 port detected +[ 24.802332] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 24.808732] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 24.816495] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 24.826028] hub 2-0:1.0: USB hub found +[ 24.829998] hub 2-0:1.0: 1 port detected + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: + +RC dt node should be disabled in order to enable EP . Instead of changing dra7-evm.dts, please try changing dra7-evm-common.dtsi. In dra7-evm-common.dtsi, replace &pcie1_rc with &pcie1_ep Thanks Kishon + diff --git a/data2/text/range/30001+/726952.txt b/data2/text/range/30001+/726952.txt new file mode 100644 index 0000000000000000000000000000000000000000..5a11f2fe4b837ae103cd3b6b481cd143cd8abcd3 --- /dev/null +++ b/data2/text/range/30001+/726952.txt @@ -0,0 +1,732 @@ +Ticket Name: Linux/TDA2: Issue while booting in DRA7xx for VAYU ES1.1 EVM5777G-02-01-00 board + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear Team, We found pre-built below binaries for DRA7x binaries on below link http://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/latest/index_FDS.html tisdk-rootfs-image-dra7xx-evm.tar.xz DRA7xx Linux Target File System 578930K boot-dra7xx-evm.tar.gz DRA7xx Linux Boot Partition 674K We copied the respective contents of rootfs and boot on the respective partitions of the SD card. In minicom, after board boot-up, the kernel starts, but we are not getting the root prompt to login , so this ends up with the following message. | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: [ 20.120519] omap_hwmod: mmu1_dsp1: _wait_target_disable failed [ 20.133704] omap_hwmod: mmu1_dsp2: _wait_target_disable failed [ 20.146850] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 20.159971] omap_hwmod: mmu0_dsp2: _wait_target_disable failed please refer the attached boot log. 0181.boot-log.txt U-Boot SPL 2016.05-g333293e877 (Dec 28 2017 - 05:17:21) +DRA752-GP ES1.1 +no pinctrl for ddr_1_8v +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment +Trying to boot from MMC1 +*** Warning - bad CRC, using default environment +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img +U-Boot 2016.05-g333293e877 (Dec 28 2017 - 05:17:21 +0530) +CPU : DRA752-GP ES1.1 +Model: TI DRA742 +Board: DRA74x EVM REV G.0 +DRAM: 1.5 GiB +MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND +mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND +mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND +mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environmentGUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +234 bytes read in 2 ms (114.3 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 03553072 bytes read in 105 ms (32.3 MiB/s) +108307 bytes read in 14 ms (7.4 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363730 ] +## Flattened Device Tree blob at 88000000 +Booting using the fdt blob at 0x88000000 +Loading Device Tree to 8ffe2000, end 8ffff712 ... OK +Starting kernel ... +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-g742f84423d (tiiappadmin@swubn03) (gcc version 5.3.1 20160113 +(Linaro GCC 5.3-2016.02) ) #1 SMP 7 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] bootconsole [earlycon0] enabled +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0x00000000b0000000[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000dfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES1.1 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef1af000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 389440 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=PARTUUID=327091ef- +02 rw rootwait earlyprintk fixrtc om1 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 1244200K/1564672K available (6615K kernel code, 319K rwdata, 2456K rodata, +340K init, 290K bss, 25560K reserv) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e402c (9073 kB) +[ 0.000000] .init : 0xc08e5000 - 0xc093a000 ( 340 kB) +[ 0.000000] .data : 0xc093a000 - 0xc0989ee0 ( 320 kB) +[ 0.000000] .bss : 0xc098b000 - 0xc09d3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, +max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.008309] Switching to timer-based delay loop, resolution 162ns +[ 0.014969] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: +58327039986419 ns +[ 0.025230] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.030984] Console: colour dummy device 80x30 +[ 0.035639] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.042432] This ensures that you still see kernel messages. Please +[ 0.048948] update your kernel commandline. +[ 0.053340] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS +(lpj=61475) +[ 0.063975] pid_max: default: 32768 minimum: 301 +[ 0.068892] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.075780] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.083638] Initializing cgroup subsys io +[ 0.087859] Initializing cgroup subsys memory +[ 0.092431] Initializing cgroup subsys devices +[ 0.097083] Initializing cgroup subsys freezer +[ 0.101741] Initializing cgroup subsys perf_event +[ 0.106659] Initializing cgroup subsys pids +[ 0.111054] CPU: Testing write buffer coherency: ok +[ 0.116347] /cpus/cpu@0 missing clock-frequency property +[ 0.121891] /cpus/cpu@1 missing clock-frequency property +[ 0.127446] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.133368] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.220453] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001[ 0.220521] Brought up 2 CPUs +[ 0.229541] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.235983] CPU: All CPU(s) started in HYP mode. +[ 0.240804] CPU: Virtualization extensions available. +[ 0.246458] devtmpfs: initialized +[ 0.279019] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.287928] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.499431] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: +19112604462750000 ns +[ 0.509629] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.521440] pinctrl core: initialized pinctrl subsystem +[ 0.527760] NET: Registered protocol family 16 +[ 0.533512] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.562495] cpuidle: using governor ladder +[ 0.592523] cpuidle: using governor menu +[ 0.605512] OMAP GPIO hardware version 0.1 +[ 0.613956] GPIO line 161 (radio_rst) hogged as output/low +[ 0.622047] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.647304] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.652685] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.671054] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.679376] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.685911] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.693603] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.701855] OMAP DMA hardware revision 0.0 +[ 0.747418] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 +supported) +[ 0.758393] edma 43300000.edma: memcpy is disabled +[ 0.768157] edma 43300000.edma: TI EDMA DMA engine driver[ 0.778381] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.784445] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.790506] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.796548] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.802752] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.808830] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.817958] palmas 0-0058: IRQ missing: skipping irq request +[ 0.835114] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.907413] pcf857x 0-0020: probed +[ 0.911552] pcf857x 0-0021: probed +[ 0.915291] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.935407] GPIO line 463 (vin6_sel_s0) hogged as output/low +[ 0.941390] pcf857x 1-0026: probed +[ 0.945577] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz +[ 0.951755] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.977683] pcf857x: probe of 3-0021 failed with error -121 +[ 0.983518] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz +[ 0.989553] media: Linux media interface: v0.10 +[ 0.994331] Linux video capture interface: v2.00 +[ 0.999188] pps_core: LinuxPPS API ver. 1 registered +[ 1.004383] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 1.013862] PTP clock support registered +[ 1.018022] EDAC MC: Ver: 3.0.0 +[ 1.022109] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 1.028753] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 1.035457] Advanced Linux Sound Architecture Driver Initialized. +[ 1.042686] clocksource: Switched to clocksource arch_sys_counter +[ 1.059513] NET: Registered protocol family 2 +[ 1.064578] TCP established hash table entries: 8192 (order: 3, 32768 bytes)[ 1.071952] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 1.078783] TCP: Hash tables configured (established 8192 bind 8192) +[ 1.085446] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 1.091629] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 1.098452] NET: Registered protocol family 1 +[ 1.103278] RPC: Registered named UNIX socket transport module. +[ 1.109441] RPC: Registered udp transport module. +[ 1.114369] RPC: Registered tcp transport module. +[ 1.119279] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 1.127078] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 1.145689] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 1.152407] NFS: Registering the id_resolver key type +[ 1.157758] Key type id_resolver registered +[ 1.162137] Key type id_legacy registered +[ 1.166420] ntfs: driver 2.1.32 [Flags: R/O]. +[ 1.172325] bounce: pool size: 64 pages +[ 1.176531] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 1.184260] io scheduler noop registered (default) +[ 1.189266] io scheduler deadline registered +[ 1.193792] io scheduler cfq registered +[ 1.202779] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 1.213493] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 1.219659] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 1.227643] IO 0x20003000..0x20012fff -> 0x00000000 +[ 1.233030] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 1.271322] dra7-pcie 51000000.pcie_rc: link is not up +[ 1.276856] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 1.283664] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 1.289383] pci_bus 0000:00: root bus resource [io 0x0000-0xffff][ 1.295826] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 1.303385] PCI: bus0: Fast back to back transfers disabled +[ 1.309307] PCI: bus1: Fast back to back transfers enabled +[ 1.315121] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 1.322180] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 1.329254] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 1.334667] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 1.403761] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 1.413844] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.423040] console [ttyS0] enabled +[ 1.423040] console [ttyS0] enabled +[ 1.430201] bootconsole [earlycon0] disabled +[ 1.430201] bootconsole [earlycon0] disabled +[ 1.439851] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.449542] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.459654] [drm] Initialized drm 1.1.0 20060810 +[ 1.466398] OMAP DSS rev 6.1 +[ 1.470150] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.478592] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 1.488486] connector-hdmi connector@1: failed to find video source +[ 1.501175] loop: module loaded +[ 1.505350] nand: No NAND device found +[ 1.509122] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.519098] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.524516] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.530375] Creating 7 MTD partitions on "spi32766.0": +[ 1.535552] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.541608] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.547920] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os"[ 1.554854] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.561492] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.568869] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.575198] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.582916] libphy: Fixed MDIO Bus: probed +[ 1.632720] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.638844] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.649087] libphy: 48485000.mdio: probed +[ 1.653135] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.661175] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.669889] cpsw 48484000.ethernet: Detected MACID = d4:f5:13:b3:8e:7a +[ 1.676550] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.683528] cpsw 48484000.ethernet: cpsw: Detected MACID = d4:f5:13:b3:8e:7b +[ 1.692202] mousedev: PS/2 mouse device common for all mice +[ 1.698492] i2c /dev entries driver +[ 1.702707] tvp5158 1-0058: Unable to of_probe +[ 1.707514] ov1063x 1-0037: Failed writing register 0x0103! +[ 1.713138] ov1063x: probe of 1-0037 failed with error -121 +[ 1.719489] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 1.726588] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 1.737062] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.742755] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.742851] vip 48970000.vip: VPDMA firmware loaded +[ 1.754077] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.754152] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 1.766472] evm_3v3_sw: supplied by sysen1 +[ 1.846443] mmc0: MAN_BKOPS_EN bit is not set +[ 1.856306] mmc0: new HS200 MMC card at address 0001 +[ 1.861744] mmcblk0: mmc0:0001 MMC08G 7.25 GiB[ 1.866549] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 1.872769] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 1.924552] ledtrig-cpu: registered to indicate activity on CPUs +[ 1.935756] hwspinlock_user gatemp: requested 20 hwspinlocks +[ 1.942739] aic_dvdd: supplied by evm_3v3_sw +[ 1.949495] davinci-mcasp 48464000.mcasp: DAI is shared +[ 1.955408] davinci-mcasp 48468000.mcasp: ERRATA i868 workaround is enabled +[ 1.962623] davinci-mcasp 48474000.mcasp: DAI is shared +[ 1.967938] davinci-mcasp 48474000.mcasp: ERRATA i868 workaround is enabled +[ 1.975162] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 1.982223] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder +mapping ok +[ 1.993103] NET: Registered protocol family 10 +[ 2.008379] sit: IPv6 over IPv4 tunneling driver +[ 2.013603] NET: Registered protocol family 17 +[ 2.018306] Key type dns_resolver registered +[ 2.022819] omap_voltage_late_init: Voltage driver support not added +[ 2.029716] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.035946] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.042641] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.048878] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.057111] Power Management for TI OMAP4+ devices. +[ 2.062216] Registering SWP/SWPB emulation handler +[ 2.068001] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.075233] dmm 4e000000.dmm: initialized all PAT entries +[ 2.082430] tvp5158 1-0058: Unable to of_probe +[ 2.087383] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.143535] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.163638] asoc-simple-card jamr3_sound: tlv320aic3x-hifi <-> 48474000.mcasp mapping ok[ 2.195397] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.202037] [drm] No driver support for vblank timestamp query. +[ 2.208004] omapdrm omapdrm.0: No connectors reported connected with modes +[ 2.214919] [drm] Cannot find any crtc or sizes - going 1024x768 +[ 2.223625] [drm] Enabling DMM ywrap scrolling +[ 2.232417] Console: switching to colour frame buffer device 128x48 +[ 2.243205] omapdrm omapdrm.0: fb0: omapdrm frame buffer device +[ 2.273450] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.279561] tvp5158 1-0058: Unable to of_probe +[ 2.284867] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.291762] hctosys: unable to open rtc device (rtc0) +[ 2.292845] tvp5158 1-0058: Unable to of_probe +[ 2.309399] evm_1v8: disabling +[ 2.312470] aic_dvdd: disabling +[ 2.315633] vmmcwl_fixed: disabling +[ 2.319304] ldousb: disabling +[ 2.322705] ALSA device list: +[ 2.325684] #0: DRA7xx-EVM +[ 2.328573] #1: HDMI 58040000.encoder +[ 2.332420] #2: DRA7xx-JAMR3 +[ 2.336166] Waiting for root device PARTUUID=327091ef-02... +[ 2.421650] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.434123] mmc2: new ultra high speed DDR50 SDHC card at address aaaa +[ 2.441046] mmcblk1: mmc2:aaaa SS08G 7.40 GiB +[ 2.448193] mmcblk1: p1 p2 +[ 2.451607] tvp5158 1-0058: Unable to of_probe +[ 2.818908] EXT4-fs (mmcblk1p2): recovery complete +[ 2.824586] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.832767] VFS: Mounted root (ext4 filesystem) on device 179:50.[ 2.845225] devtmpfs: mounted +[ 2.848415] Freeing unused kernel memory: 340K +[ 2.852900] This architecture does not have kernel memory protection. +[ 3.005093] systemd[1]: System time before build time, advancing clock. +[ 3.036662] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.050689] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.062378] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA - +APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPT) +[ 3.081581] systemd[1]: Detected architecture arm. +Welcome to Arago 2016.12! +[ 3.107719] systemd[1]: Set hostname to . +[ 3.173582] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy +available) +[ 3.199005] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy +available) +[ 3.209230] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 25 bits of entropy +available) +[ 3.213658] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy +available) +[ 3.218160] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy +available) +[ 3.276854] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.286380] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.296253] random: systemd: uninitialized urandom read (16 bytes read, 29 bits of entropy available) +[ 3.628061] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 3.635902] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 3.643694] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 3.650952] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 3.658414] systemd[1]: sysinit.target: Found dependency on dbus.socket/start[ 3.665600] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 3.673043] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 3.682480] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle +starting with sysinit.targt +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 3.715225] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 3.742993] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.772965] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 3.803082] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 3.832970] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 3.852891] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 3.872968] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 3.904113] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 3.962920] systemd[1]: Mounting Debug File System... +Mounting Debug File System... +[ 3.987547] systemd[1]: Starting Load Kernel Modules... +Starting Load Kernel Modules... +[ 4.001515] CMEMK module: reference Linux version 4.4.84 +[ 4.007476] no physical memory specified +[ 4.011420] cmemk initialized +[ 4.032608] cryptodev: driver 1.8 loaded.[ 4.043132] systemd[1]: Starting Setup Virtual Console... +Starting Setup Virtual Console... +[ 4.075093] systemd[1]: Mounting POSIX Message Queue File System... +Mounting POSIX Message Queue File System... +[ 4.111183] systemd[1]: Mounting Temporary Directory... +Mounting Temporary Directory... +[ 4.145359] systemd[1]: Starting Create list of required static device nodes for the current kernel... +Starting Create list of required st... nodes for the current kernel... +[ 4.174962] systemd[1]: Starting Remount Root and Kernel File Systems... +Starting Remount Root and Kernel File Systems... +[ 4.191156] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.197126] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.223255] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.253057] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 4.282893] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.302867] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.333506] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.362909] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.383482] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.413518] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice.[ 4.473117] systemd[1]: Starting Journal Service... +Starting Journal Service... +[ 4.509299] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.532994] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.562997] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.593127] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Load Kernel Modules. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +Starting udev Coldplug all Devices... +Starting Create Static Device Nodes in /dev... +Starting Apply Kernel Variables... +Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.226209] systemd-journald[166]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. +Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). +Mounting /var/volatile... +Mounting /media/ram... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager.[ 5.545226] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 5.600713] remoteproc0: 58820000.ipu is available +[ 5.606024] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 5.622397] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility +isn't yet guaranteed. +[ 5.633273] tvp5158 1-0058: Unable to of_probe +[ 5.639638] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ OK ] Started udev Coldplug all Devices.[ 5.650639] remoteproc1: 55020000.ipu is available +[ 5.661219] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 5.671083] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility +isn't yet guaranteed. +[ 5.693214] tvp5158 1-0058: Unable to of_probe +[ 5.698191] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 5.725069] remoteproc2: 40800000.dsp is available +[ 5.730207] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 5.760166] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility +isn't yet guaranteed. +[ 5.783853] tvp5158 1-0058: Unable to of_probe +[ 5.790407] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 5.81708] remoteproc3: 41000000.dsp is available +[ 5.825296] remoteproc3: Note: remoteproc is still under development and considered experimental. +[ OK ] Reached target Local File Systems. +[ 5.843943] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility +isn't yet guaranteed. +[ 5.862011] tvp5158 1-0058: Unable to of_probe +Starting Create Volatile Files and Directories... +[ 5.971856] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +Starting Load/Save Random Seed... +[ 5.994945] tvp5158 1-0058: Unable to of_probe[ OK ] Found device /dev/ttyS0. +[ 6.039135] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 6.076678] tvp5158 1-0058: Unable to of_probe +[ 6.097083] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 6.115504] remoteproc1: registered virtio0 (type 7) +[ 6.120861] tvp5158 1-0058: Unable to of_probe +[ OK ] Started Load/Save Random Seed. +[ 6.169151] remoteproc0: registered virtio1 (type 7) +[ OK ] Started Create Volatile Files and Directories. +[ 6.233924] SCSI subsystem initialized +Starting Network Time Synchronization... +Starting Update UTMP about System Boot/Shutdown... +[ 6.333590] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 6.353071] tvp5158 1-0058: Unable to of_probe +[ 6.353187] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 6.383832] remoteproc2: registered virtio2 (type 7) +[ 6.396957] tvp5158 1-0058: Unable to of_probe +[ 6.400717] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 6.401322] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 6.416295] tvp5158 1-0058: Unable to of_probe +[ 6.426501] CAN device driver interface +[ 6.453654] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 6.460406] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 6.472106] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 6.508222] remoteproc3: registered virtio3 (type 7) +[ 6.508564] scsi host0: ahci +[ 6.508822] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 345 +[ 6.509754] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=365)[ 6.514707] tvp5158 1-0058: Unable to of_probe +[ OK ] Started Network Time Synchronization. +[ OK ] Reached target System Time Synchronized. +[ 6.644223] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 6.661336] tvp5158 1-0058: Unable to of_probe +Starting Synchronize System and HW clocks... +[ OK ] Started Synchronize System and HW clocks. +[ 6.768473] tvp5158 1-0058: Unable to of_probe +[ OK ] Reached target Sound Card. +[ OK ] Reached target System Initialization. +[ 6.873214] ata1: SATA link down (SStatus 0 SControl 300) +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ 7.065286] FAT-fs (mmcblk1p1): Volume was not properlyunmounted. Some data may be corrupt. +Please run fsck. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +Starting uim-sysfs.service... +[ OK ] Started Kernel Logging Service. +Starting TI MultiCore Tools Daemon... +[ OK ] Started System Logging Service. +Starting Permit User Sessions... +Starting Save/Restore Sound Card State... +Starting Login Service...[ 7.375129] NET: Registered protocol family 15 +Starting Avahi mDNS/DNS-SD Stack... +Starting Telephony service... +[ OK ] Started D-Bus System Message Bus. +[ 7.636254] Initializing XFRM netlink socket +[ OK ] Started Telephony service. +[ 7.660442] Bluetooth: Core ver 2.21 +[ 7.667887] NET: Registered protocol family 31 +[ OK ] Started Avahi mDNS/DNS-SD Stack. +[ 7.689306] Bluetooth: HCI device and connection manager initialized +Starting Print notice about GPLv3 packages... +[ 7.708488] Bluetooth: HCI socket layer initialized +[ 7.722001] Bluetooth: L2CAP socket layer initialized +[ 7.732330] Bluetooth: SCO socket layer initialized +Starting Network Service... +[FAILED] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ OK ] Started Permit User Sessions. +[ 7.917091] remoteproc1: powering up 55020000.ipu +[ 7.928915] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Save/Restore Sound Card State. +[ OK ] Started Network Service. +[ 7.967740] net eth0: initialized cpsw ale version 1.4 +[ 7.979978] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3743112 +[ 8.015771] net eth0: ALE Table size 1024 +[ 8.036634] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 8.047788] tvp5158 1-0058: Unable to of_probe +[ 8.064766] net eth1: phy found : id is : 0x20005c7a +[ 8.099078] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready[ 8.134015] net eth0: initializing cpsw version 1.15 (0) +[ 8.170919] tvp5158 1-0058: Unable to of_probe +[ 8.178440] random: nonblocking pool is initialized +[ 8.186462] net eth0: phy found : id is : 0x20005c7a +[ 8.222598] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.269619] remoteproc1: remote processor 55020000.ipu is now up +[ 8.293113] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.296269] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x65 +[ 8.297159] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x66 +[ 8.340912] tvp5158 1-0058: Unable to of_probe +[ 8.347772] remoteproc0: powering up 58820000.ipu +[ 8.382368] remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 4794908 +[ 8.406444] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 +[ 8.442903] tvp5158 1-0058: Unable to of_probe +[ 8.448336] remoteproc0: remote processor 58820000.ipu is now up +[ 8.468550] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 8.469899] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x32 +[ 8.470039] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x33 +[ 8.470204] virtio_rpmsg_bus virtio1: creating channel rpmsg-omx addr 0x3c +[ 8.470367] virtio_rpmsg_bus virtio1: creating channel rpmsg-rpc addr 0x65 +[ 8.580096] tvp5158 1-0058: Unable to of_probe +[ 8.586135] remoteproc2: powering up 40800000.dsp +[ 8.623950] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 5635840 +[ 8.656166] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 8.662065] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 8.668023] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 8.737215] remoteproc2: remote processor 40800000.dsp is now up +[ 8.776430] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 8.777252] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x32[ 8.777800] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x33 +[ 8.777923] virtio_rpmsg_bus virtio2: creating channel rpmsg-omx addr 0x3c +[ 8.778021] virtio_rpmsg_bus virtio2: creating channel rpmsg-rpc addr 0x65 +[ 8.864689] tvp5158 1-0058: Unable to of_probe +[ 8.882124] remoteproc3: powering up 41000000.dsp +[ 8.906495] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 5635844 +[ 8.944915] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 8.950814] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 8.956739] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 8.990863] tvp5158 1-0058: Unable to of_probe +[ 9.017864] remoteproc3: remote processor 41000000.dsp is now up +[ 9.028461] usbcore: registered new interface driver usbfs +[ 9.036881] virtio_rpmsg_bus virtio3: rpmsg host is online +[ 9.037707] virtio_rpmsg_bus virtio3: creating channel rpmsg-client-sample addr 0x32 +[ 9.038014] virtio_rpmsg_bus virtio3: creating channel rpmsg-client-sample addr 0x33 +[ 9.038138] virtio_rpmsg_bus virtio3: creating channel rpmsg-omx addr 0x3c +[ 9.038851] virtio_rpmsg_bus virtio3: creating channel rpmsg-rpc addr 0x65 +[ 9.092917] usbcore: registered new interface driver hub +[ 9.106835] tvp5158 1-0058: Unable to of_probe +[ 9.134253] usbcore: registered new device driver usb +[ 9.135726] rpmsg_rpc rpmsg0: probing service dce-callback with src 1024 dst 101 +[ 9.146994] rpmsg_rpc rpmsg1: probing service rpmsg-dce with src 1025 dst 102 +[ 9.147429] rpmsg_rpc rpmsg0: published functions = 4 +[ 9.150023] tvp5158 1-0058: Unable to of_probe +[ 9.200365] rpmsg_rpc rpmsg5: probing service rpc_example_2 with src 1024 dst 101 +[ 9.200773] tvp5158 1-0058: Unable to of_probe +[ 9.200822] rpmsg_rpc rpmsg1: published functions = 9 +[ 9.222806] dwc3 48890000.usb: otg: primary host xhci-hcd.1.auto registered +[ 9.229804] dwc3 48890000.usb: otg: shared host xhci-hcd.1.auto registered[ 9.252729] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.268837] rpmsg_rpc rpmsg9: probing service rpc_example_4 with src 1024 dst 101 +[ 9.269264] tvp5158 1-0058: Unable to of_probe +[ 9.269351] rpmsg_rpc rpmsg5: published functions = 8 +[ 9.287360] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 9.287511] tvp5158 1-0058: Unable to of_probe +[ 9.307761] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[ 9.326068] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.342746] rpmsg_rpc rpmsg9: published functions = 8 +[ 9.354162] xhci-hcd xhci-hcd.2.auto: irq 511, io mem 0x488d0000 +[ 9.362495] rpmsg_rpc rpmsg13: probing service rpc_example_3 with src 1024 dst 101 +[ 9.374463] tvp5158 1-0058: Unable to of_probe +[ 9.385158] rpmsg_rpc rpmsg13: published functions = 8 +[ 9.385438] hub 1-0:1.0: USB hub found +[ 9.385476] hub 1-0:1.0: 1 port detected +[ 9.385778] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 9.385791] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[ 9.385870] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.419750] hub 2-0:1.0: USB hub found +[ 9.425348] hub 2-0:1.0: 1 port detected +[ 9.429206] tvp5158 1-0058: Unable to of_probe +[ 9.455106] tvp5158 1-0058: Unable to of_probe +[ 9.460858] tvp5158 1-0058: Unable to of_probe +[ OK ] Started Login Service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. +Starting Lightning Fast Webserver With Light System Requirements... +Starting Network Name Resolution... +[ OK ] Started Getty on tty1.[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Network Name Resolution. +[ OK ] Started uim-sysfs.service. +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: +Starting rc.pvr.service... +autoconf +binutils-dev +binutils +bison-dev +bison +cpp-symlinks +cpp +dosfstools +g++-symlinks +g++ +gawk-dev +gawk +gcc-symlinks +gcc +gdb +gdbc6x +gdbserver +gstreamer1.0-libav +libcairo-perf-utils +libgmp10 +libidn11libmpc3 +libmpfr4 +m4-dev +m4 +make +nettle +parted +swig-dev +swig +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: +opkg remove +Where is the name printed in the list above +NOTE: If the package is a dependency of another package you +will be notified of the dependent packages. You should +use the --force-removal-of-dependent-packages option to +also remove the dependent packages as well +*************************************************************** +*************************************************************** +10.045430] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started Print notice about GPLv3 packages. +[ OK ] Started rc.pvr.service. +Starting weston.service... +[ OK ] Started weston.service. +Starting tiipclad-daemon.service... +Starting telnetd.service...[ OK ] Started tiipclad-daemon.service. +[ OK ] Started telnetd.service. +Starting thttpd.service... +[ OK ] Started thttpd.service. +Starting rng-tools.service... +[ OK ] Started rng-tools.service. +Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. +Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. +Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +_____ +_____ +_ +_ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| +| _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| +|___| +|___| +Arago Project http://arago-project.org dra7xx-evm ttyS0 +Arago 2016.12 dra7xx-evm ttyS0 +dra7xx-evm login: [ 20.120519] omap_hwmod: mmu1_dsp1: _wait_target_disable failed +[ 20.133704] omap_hwmod: mmu1_dsp2: _wait_target_disable failed +[ 20.146850] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 20.159971] omap_hwmod: mmu0_dsp2: _wait_target_disable failed + Please suggest how this can be resolved. Regards, Pallavi Ghorpade + +Responses: +Hi Pallavi, the "omap_hwmod: mmu0_dsp2: _wait_target_disable failed" messages are expected and do not indicate error: e2e.ti.com/.../2471730 I see you get "dra7xx-evm login:" but "omap_hwmod: " messages seems to pop just afterwards. Can you press enter to see if "dra7xx-evm login:" will appear again (or just type root to log-in)? Regards, Yordan + +Hi Yordan, We are not able to type anything in console, and even if we press enter, console is not responding. I doubt kernel is crashing.What should we try? Thanks, Pallavi + +Hi Pallavi, I have pinged Linux experts for further help. Regards, Yordan + +Hi have you looked at and followed the instructions from the Quick Start Guide and Software developers guide in preparing your boot images and choosing the right Device tree file, boot args for the kernel + diff --git a/data2/text/range/30001+/730047.txt b/data2/text/range/30001+/730047.txt new file mode 100644 index 0000000000000000000000000000000000000000..dfb8182ebaec2dce3313c855b12d85e116f44ec3 --- /dev/null +++ b/data2/text/range/30001+/730047.txt @@ -0,0 +1,717 @@ +Ticket Name: Linux/TDA2: TDA2 linux auto login & run app.out + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PMP, DRA752 Tool/software: Linux Dear All, now i use send command : dra7xx-evm login: root cd /opt/vision_sdk ./vision_sdk_load.sh ./app.out i want use auto login to linux & run app.out, how to do? + +Responses: +Hi Owen, can you try this for auto login as root: e2e.ti.com/.../656992 and this for autorunning load scripts and app.out: e2e.ti.com/.../718464 Regards, Yordan + +Dear Yordan, Thank your information, i can auto login as root, but auto running load scripts and app.out isn't to use. I'm fellow that advice put vsdk.service in /etc/systemd/system/multi-user.target.wants/ and autorun.sh in / opt / vision_sdk /. + +Hi Owen, did you make sure both files have executable permissions? Do you see file "/tmp/vsdk.log"? Regards, Yordan + +Dear Yordan, that file have executable permissions, but i can't find /tmp/vsdk.log + +Hi Owen, Can you try the below steps (please rename autorun.sh as vsdkautorun.sh). 1. Copy vsdkautorun.sh to /etc/init.d folder 2. chmod 755 vsdkautorun.sh 3. update-rc.d vsdkautorun.sh defaults 4. sync Reboot your board, and you should see VSDK launching. Regards Shravan + +Dear Shravan, i'm try but can't run and stop in there. this is my log: U-Boot SPL 2016.05-00009-gac1d50f (Sep 17 2018 - 14:27:06) DRA752-GP ES2.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00009-gac1d50f (Sep 17 2018 - 14:27:06 +0800) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV H.0 DRAM: 4 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 3 ms (53.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3554264 bytes read in 72 ms (47.1 MiB/s) 106677 bytes read in 51 ms (2 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x363bd8 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff0b4 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00018-gc66ba60 (owen@owen-virtual-machine) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #13 SMP PREEMPT Mon Sep 17 14:27:52 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=1e7f9ebc-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 410844K/979968K available (6623K kernel code, 319K rwdata, 2388K rodata, 336K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08d502c (9013 kB) [ 0.000000] .init : 0xc08d6000 - 0xc092a000 ( 336 kB) [ 0.000000] .data : 0xc092a000 - 0xc0979f60 ( 320 kB) [ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000331] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000785] Console: colour dummy device 80x30 [ 0.000800] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000806] This ensures that you still see kernel messages. Please [ 0.000811] update your kernel commandline. [ 0.000825] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000838] pid_max: default: 32768 minimum: 301 [ 0.000935] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000946] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001490] Initializing cgroup subsys io [ 0.001506] Initializing cgroup subsys memory [ 0.001531] Initializing cgroup subsys devices [ 0.001544] Initializing cgroup subsys freezer [ 0.001555] Initializing cgroup subsys perf_event [ 0.001566] Initializing cgroup subsys pids [ 0.001593] CPU: Testing write buffer coherency: ok [ 0.001790] /cpus/cpu@0 missing clock-frequency property [ 0.001806] /cpus/cpu@1 missing clock-frequency property [ 0.001817] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001850] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080062] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080131] Brought up 2 CPUs [ 0.080143] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080150] CPU: All CPU(s) started in HYP mode. [ 0.080155] CPU: Virtualization extensions available. [ 0.080534] devtmpfs: initialized [ 0.109069] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110052] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.313202] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.313223] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.317468] pinctrl core: initialized pinctrl subsystem [ 0.318323] NET: Registered protocol family 16 [ 0.319239] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.340228] cpuidle: using governor ladder [ 0.370252] cpuidle: using governor menu [ 0.378794] OMAP GPIO hardware version 0.1 [ 0.385349] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.401735] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.401749] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.411135] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.411144] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.411607] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.411616] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.412194] OMAP DMA hardware revision 0.0 [ 0.451474] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.452626] edma 43300000.edma: memcpy is disabled [ 0.457327] edma 43300000.edma: TI EDMA DMA engine driver [ 0.461707] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.461884] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.462045] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.462200] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.462491] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.462675] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.465708] palmas 0-0058: IRQ missing: skipping irq request [ 0.481133] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.553443] pcf857x 0-0020: probed [ 0.554003] pcf857x 0-0021: probed [ 0.554152] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.554551] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.554757] media: Linux media interface: v0.10 [ 0.554809] Linux video capture interface: v2.00 [ 0.554851] pps_core: LinuxPPS API ver. 1 registered [ 0.554859] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.554883] PTP clock support registered [ 0.554929] EDAC MC: Ver: 3.0.0 [ 0.555684] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.555981] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.556309] Advanced Linux Sound Architecture Driver Initialized. [ 0.557149] clocksource: Switched to clocksource arch_sys_counter [ 0.567809] NET: Registered protocol family 2 [ 0.568309] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.568372] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.568497] TCP: Hash tables configured (established 8192 bind 8192) [ 0.568547] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.568577] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.568788] NET: Registered protocol family 1 [ 0.569050] RPC: Registered named UNIX socket transport module. [ 0.569059] RPC: Registered udp transport module. [ 0.569065] RPC: Registered tcp transport module. [ 0.569072] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.570058] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.580042] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.580690] NFS: Registering the id_resolver key type [ 0.580721] Key type id_resolver registered [ 0.580729] Key type id_legacy registered [ 0.580783] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.582056] bounce: pool size: 64 pages [ 0.582209] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.582224] io scheduler noop registered [ 0.582236] io scheduler deadline registered [ 0.582269] io scheduler cfq registered (default) [ 0.587206] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.590349] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.590361] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.590396] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.590417] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.620377] dra7-pcie 51000000.pcie_rc: link is not up [ 0.620554] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.620566] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.620577] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.620586] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.620988] PCI: bus0: Fast back to back transfers disabled [ 0.621109] PCI: bus1: Fast back to back transfers enabled [ 0.621192] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.621207] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.621219] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.621432] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.682241] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.685631] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.695430] console [ttyS0] enabled [ 1.699833] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.709540] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.719578] [drm] Initialized drm 1.1.0 20060810 [ 1.725589] OMAP DSS rev 6.1 [ 1.729376] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.745030] loop: module loaded [ 1.748578] vmemexp device MAJOR num = 246 [ 1.752707] vmemexp class registered [ 1.756421] /dev/vmemexp device registered [ 1.760555] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.766226] nand: No NAND device found [ 1.770017] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.779958] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.785353] 7 ofpart partitions found on MTD device spi32766.0 [ 1.791239] Creating 7 MTD partitions on "spi32766.0": [ 1.796402] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.802528] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.808878] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.815807] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.822508] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.829912] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.836255] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.844034] libphy: Fixed MDIO Bus: probed [ 1.897184] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.903308] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.913484] libphy: 48485000.mdio: probed [ 1.917557] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.925597] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.934309] cpsw 48484000.ethernet: Detected MACID = fc:0f:4b:be:c4:be [ 1.941010] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.948016] cpsw 48484000.ethernet: cpsw: Detected MACID = fc:0f:4b:be:c4:bf [ 1.956623] mousedev: PS/2 mouse device common for all mice [ 1.962841] i2c /dev entries driver [ 1.971637] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.977294] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 1.983678] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 1.990236] evm_3v3_sw: supplied by sysen1 [ 2.070952] mmc0: MAN_BKOPS_EN bit is not set [ 2.108597] mmc0: new HS200 MMC card at address 0001 [ 2.124035] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.139094] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.148936] ledtrig-cpu: registered to indicate activity on CPUs [ 2.155311] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.163856] aic_dvdd: supplied by evm_3v3_sw [ 2.169775] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.177203] NET: Registered protocol family 10 [ 2.182455] sit: IPv6 over IPv4 tunneling driver [ 2.187656] NET: Registered protocol family 17 [ 2.192333] Key type dns_resolver registered [ 2.196734] omap_voltage_late_init: Voltage driver support not added [ 2.203635] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.209864] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.216567] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.222799] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.231013] Power Management for TI OMAP4+ devices. [ 2.236079] Registering SWP/SWPB emulation handler [ 2.241848] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.249094] dmm 4e000000.dmm: initialized all PAT entries [ 2.256406] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.263065] [drm] No driver support for vblank timestamp query. [ 2.269369] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.276191] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.318380] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.338018] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.347232] hctosys: unable to open rtc device (rtc0) [ 2.360432] evm_1v8: disabling [ 2.363505] aic_dvdd: disabling [ 2.366655] vmmcwl_fixed: disabling [ 2.370396] ldousb: disabling [ 2.373792] ALSA device list: [ 2.376775] #0: DRA7xx-EVM [ 2.380376] Waiting for root device PARTUUID=1e7f9ebc-02... [ 2.594833] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.622253] mmc2: new ultra high speed SDR104 SDHC card at address 0001 [ 2.639329] mmcblk1: mmc2:0001 SD8GB 7.32 GiB [ 2.645017] mmcblk1: p1 p2 [ 2.707669] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 2.716291] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 2.746022] EXT4-fs (mmcblk1p2): recovery complete [ 2.754872] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 2.763069] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 2.771469] devtmpfs: mounted [ 2.774651] Freeing unused kernel memory: 336K [ 2.779129] This architecture does not have kernel memory protection. [ 2.900529] systemd[1]: System time before build time, advancing clock. [ 2.937087] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 2.949893] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 2.961237] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 2.979701] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.008353] systemd[1]: Set hostname to . [ 3.082369] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.082664] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.082817] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.131460] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.150556] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.197622] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.207087] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.217000] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [ 3.475942] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 3.492322] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 3.510420] systemd[1]: [/etc/systemd/system/multi-user.target.wants/vsdk.service:3] Failed to add dependency on rc.pvr, ignoring: Invalid argument [ 3.613534] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 3.621364] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 3.629079] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 3.636336] systemd[1]: sysinit.target: Found dependency on sockets.target/start [ 3.643807] systemd[1]: sysinit.target: Found dependency on dropbear.socket/stop [ 3.651258] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 3.658721] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 3.668179] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 3.699782] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 3.717550] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 3.748580] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 3.767378] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 3.787341] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 3.817397] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 3.837360] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 3.857455] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 3.877413] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 3.897415] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 3.917455] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 3.947339] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 3.975215] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.027379] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 4.049447] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 4.078103] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.147472] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.182358] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 4.207392] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.229562] systemd[1]: Starting Journal Service... Starting Journal Service... [ 4.259600] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.287404] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.337494] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.358469] systemd[1]: Created slice system-serial\x2dgetty.slice. [ 4.358737] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.400646] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.433282] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 4.457431] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 4.488220] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 4.517566] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Setup Virtual Console. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Remount Root and Kernel File Systems. Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 5.161842] systemd-journald[140]: Received request to flush runtime journal from PID 1 [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started udev Kernel Device Manager. [ OK ] Started udev Coldplug all Devices. [ 5.541113] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 5.572412] remoteproc0: 55020000.ipu is available [ 5.589950] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 5.631495] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Reached target Local File Systems.[ 5.665690] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 5.706266] remoteproc1: 40800000.dsp is available Starting Create Volatile Files and Directories...[ 5.743343] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 5.795271] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. Starting Load/Save Random Seed...[ 5.821059] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 5.837550] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ OK ] Started Create Volatile Files and Directories. [ 5.886225] remoteproc2: 41000000.dsp is available [ OK ] Started Load/Save Random Seed. [ 5.915286] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 5.935557] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 5.954859] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ OK ] Found device /dev/ttyS0. [ 6.005703] remoteproc0: registered virtio0 (type 7) [ 6.041897] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ 6.183344] remoteproc1: registered virtio1 (type 7) Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ 6.261947] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 6.311120] SCSI subsystem initialized [ 6.327013] remoteproc2: registered virtio2 (type 7) [ 6.337442] CAN device driver interface [ OK ] Started Network Time Synchronization. [ 6.365963] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 6.418522] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 6.425680] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) [ 6.497197] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 6.505277] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ OK ] Started Update UTMP about System Boot/Shutdown. [ 6.570537] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 6.653588] scsi host0: ahci [ 6.656728] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 Starting Synchronize System and HW clocks... [ 6.698532] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 [ OK ] Reached target System Time Synchronized. [ OK ] Started Synchronize System and HW clocks. [ 6.977934] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. [ 7.027195] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Reached target System Initialization. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Listening on RPCbind Server Activation Socket. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Listening on dropbear.socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ 7.256091] remoteproc0: powering up 55020000.ipu [ OK ] Started System Logging Service. [ 7.292499] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9552960 [ OK ] Started Launching Vision SDK App. [ 7.303291] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 Starting Telephony service... Starting uim-sysfs.service... [ 7.359798] remoteproc0: remote processor 55020000.ipu is now up [ 7.373161] virtio_rpmsg_bus virtio0: rpmsg host is online [ 7.380753] remoteproc1: powering up 40800000.dsp [ 7.391236] DMA: Module install successful, device major num = 244 Starting TI MultiCore Tools Daemon...[ 7.398941] DRV: Module install successful Starting Login Service... [ 7.424504] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7455648 [ 7.453626] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 7.459520] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 7.465468] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 Starting Print notice about GPLv3 packages... Starting Avahi mDNS/DNS-SD Stack... Starting Permit User Sessions... [ OK ] Started Kernel Logging Service. [ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. [ OK ] Started D-Bus System Message Bus. [ 7.664224] remoteproc1: remote processor 40800000.dsp is now up [ 7.698934] virtio_rpmsg_bus virtio1: rpmsg host is online [ OK ] Started Telephony service. [ OK ] Started Avahi mDNS/DNS-SD Stack. [ 7.727798] remoteproc2: powering up 41000000.dsp Starting Network Service... Starting Save/Restore Sound Card State... [ 7.777718] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7455648 [ 7.791246] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 7.797141] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [FAILED[ 7.803102] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 ] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 7.904452] remoteproc2: remote processor 41000000.dsp is now up [ 7.932326] virtio_rpmsg_bus virtio2: rpmsg host is online [ 7.943194] Bluetooth: Core ver 2.21 [ 7.946855] NET: Registered protocol family 31 [ 7.960355] Bluetooth: HCI device and connection manager initialized [ 7.973464] NET: Registered protocol family 15 [ 7.986514] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 7.997416] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 8.009587] Bluetooth: HCI socket layer initialized [ 8.037672] NET: Registered protocol family 41 [ 8.046628] Bluetooth: L2CAP socket layer initialized [ 8.055216] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 8.075981] Bluetooth: SCO socket layer initialized [ 8.093240] net eth1: initializing cpsw version 1.15 (0) [ OK ] Started Network Service. [ 8.112362] net eth0: initialized cpsw ale version 1.4 [ 8.138987] net eth0: ALE Table size 1024 [ 8.173014] net eth1: phy found : id is : 0x20005c7a [ 8.213915] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 8.244037] net eth0: initializing cpsw version 1.15 (0) [ 8.278065] net eth0: phy found : id is : 0x20005c7a [ 8.288148] usbcore: registered new interface driver usbfs [ 8.294604] Initializing XFRM netlink socket [ 8.299209] usbcore: registered new interface driver hub [ 8.319473] usbcore: registered new device driver usb [ 8.327264] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 8.392494] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 8.410532] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 8.444385] dwc3 48890000.usb: otg: can't start till gadget registers [ 8.463007] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.476209] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 8.489192] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 8.497341] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [ 8.514210] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 8.534820] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 8.552549] hub 1-0:1.0: USB hub found [ 8.558236] hub 1-0:1.0: 1 port detected [ 8.570666] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.592284] random: nonblocking pool is initialized [ 8.604136] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 8.632921] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 8.673055] hub 2-0:1.0: USB hub found [ 8.686352] hub 2-0:1.0: 1 port detected [ OK ] Reached target Network. Starting Lightning Fast Webserver With Light System Requirements... Starting Network Name Resolution... [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Started Login Service. [ OK ] Started Network Name Resolution. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started uim-sysfs.service. Starting rc.pvr.service... [ 10.159817] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. Starting weston.service... [ OK ] Started weston.service. Starting telnetd.service... Starting tiipclad-daemon.service... [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. Starting vsdkautorun.service... Starting thttpd.service... [FAILED] Failed to start vsdkautorun.service. See 'systemctl status vsdkautorun.service' for details. [ OK ] Started thttpd.service. Starting rng-tools.service... *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf binutils-dev binutils bison-dev bison cpp-symlinks cpp dosfstools g++-symlinks g++ gawk-dev gawk gcc-symlinks gcc gdb gdbc6x gdbserver gstreamer1.0-libav libcairo-perf-utils libgmp10 libidn11 libmpc3 libmpfr4 m4-dev m4 make nettle parted swig-dev swig If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** + +Dear Shravan, i'm try but cant run and stop in there. this is my log. uart_log.txt +U-Boot SPL 2016.05-00009-gac1d50f (Sep 17 2018 - 14:27:06) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - bad CRC, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05-00009-gac1d50f (Sep 17 2018 - 14:27:06 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV H.0 +DRAM: 4 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 3 ms (53.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3554264 bytes read in 72 ms (47.1 MiB/s) +106677 bytes read in 51 ms (2 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363bd8 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff0b4 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00018-gc66ba60 (owen@owen-virtual-machine) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #13 SMP PREEMPT Mon Sep 17 14:27:52 CST 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62b000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=1e7f9ebc-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 410844K/979968K available (6623K kernel code, 319K rwdata, 2388K rodata, 336K init, 290K bss, 364324K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d502c (9013 kB) +[ 0.000000] .init : 0xc08d6000 - 0xc092a000 ( 336 kB) +[ 0.000000] .data : 0xc092a000 - 0xc0979f60 ( 320 kB) +[ 0.000000] .bss : 0xc097b000 - 0xc09c3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000331] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000785] Console: colour dummy device 80x30 +[ 0.000800] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000806] This ensures that you still see kernel messages. Please +[ 0.000811] update your kernel commandline. +[ 0.000825] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000838] pid_max: default: 32768 minimum: 301 +[ 0.000935] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000946] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001490] Initializing cgroup subsys io +[ 0.001506] Initializing cgroup subsys memory +[ 0.001531] Initializing cgroup subsys devices +[ 0.001544] Initializing cgroup subsys freezer +[ 0.001555] Initializing cgroup subsys perf_event +[ 0.001566] Initializing cgroup subsys pids +[ 0.001593] CPU: Testing write buffer coherency: ok +[ 0.001790] /cpus/cpu@0 missing clock-frequency property +[ 0.001806] /cpus/cpu@1 missing clock-frequency property +[ 0.001817] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001850] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080062] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080131] Brought up 2 CPUs +[ 0.080143] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080150] CPU: All CPU(s) started in HYP mode. +[ 0.080155] CPU: Virtualization extensions available. +[ 0.080534] devtmpfs: initialized +[ 0.109069] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110052] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313202] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313223] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.317468] pinctrl core: initialized pinctrl subsystem +[ 0.318323] NET: Registered protocol family 16 +[ 0.319239] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340228] cpuidle: using governor ladder +[ 0.370252] cpuidle: using governor menu +[ 0.378794] OMAP GPIO hardware version 0.1 +[ 0.385349] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401735] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401749] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.411135] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.411144] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.411607] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.411616] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.412194] OMAP DMA hardware revision 0.0 +[ 0.451474] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452626] edma 43300000.edma: memcpy is disabled +[ 0.457327] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461707] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461884] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462045] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462200] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462491] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462675] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.465708] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481133] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.553443] pcf857x 0-0020: probed +[ 0.554003] pcf857x 0-0021: probed +[ 0.554152] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.554551] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.554757] media: Linux media interface: v0.10 +[ 0.554809] Linux video capture interface: v2.00 +[ 0.554851] pps_core: LinuxPPS API ver. 1 registered +[ 0.554859] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.554883] PTP clock support registered +[ 0.554929] EDAC MC: Ver: 3.0.0 +[ 0.555684] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.555981] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.556309] Advanced Linux Sound Architecture Driver Initialized. +[ 0.557149] clocksource: Switched to clocksource arch_sys_counter +[ 0.567809] NET: Registered protocol family 2 +[ 0.568309] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568372] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.568497] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.568547] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568577] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.568788] NET: Registered protocol family 1 +[ 0.569050] RPC: Registered named UNIX socket transport module. +[ 0.569059] RPC: Registered udp transport module. +[ 0.569065] RPC: Registered tcp transport module. +[ 0.569072] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.570058] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.580042] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.580690] NFS: Registering the id_resolver key type +[ 0.580721] Key type id_resolver registered +[ 0.580729] Key type id_legacy registered +[ 0.580783] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.582056] bounce: pool size: 64 pages +[ 0.582209] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.582224] io scheduler noop registered +[ 0.582236] io scheduler deadline registered +[ 0.582269] io scheduler cfq registered (default) +[ 0.587206] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.590349] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.590361] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.590396] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.590417] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.620377] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.620554] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.620566] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.620577] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.620586] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.620988] PCI: bus0: Fast back to back transfers disabled +[ 0.621109] PCI: bus1: Fast back to back transfers enabled +[ 0.621192] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.621207] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.621219] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.621432] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.682241] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.685631] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.695430] console [ttyS0] enabled +[ 1.699833] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.709540] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.719578] [drm] Initialized drm 1.1.0 20060810 +[ 1.725589] OMAP DSS rev 6.1 +[ 1.729376] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.745030] loop: module loaded +[ 1.748578] vmemexp device MAJOR num = 246 +[ 1.752707] vmemexp class registered +[ 1.756421] /dev/vmemexp device registered +[ 1.760555] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.766226] nand: No NAND device found +[ 1.770017] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.779958] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.785353] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.791239] Creating 7 MTD partitions on "spi32766.0": +[ 1.796402] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.802528] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.808878] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.815807] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.822508] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.829912] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.836255] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.844034] libphy: Fixed MDIO Bus: probed +[ 1.897184] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.903308] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.913484] libphy: 48485000.mdio: probed +[ 1.917557] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.925597] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.934309] cpsw 48484000.ethernet: Detected MACID = fc:0f:4b:be:c4:be +[ 1.941010] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.948016] cpsw 48484000.ethernet: cpsw: Detected MACID = fc:0f:4b:be:c4:bf +[ 1.956623] mousedev: PS/2 mouse device common for all mice +[ 1.962841] i2c /dev entries driver +[ 1.971637] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.977294] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.983678] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.990236] evm_3v3_sw: supplied by sysen1 +[ 2.070952] mmc0: MAN_BKOPS_EN bit is not set +[ 2.108597] mmc0: new HS200 MMC card at address 0001 +[ 2.124035] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.139094] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.148936] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.155311] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.163856] aic_dvdd: supplied by evm_3v3_sw +[ 2.169775] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.177203] NET: Registered protocol family 10 +[ 2.182455] sit: IPv6 over IPv4 tunneling driver +[ 2.187656] NET: Registered protocol family 17 +[ 2.192333] Key type dns_resolver registered +[ 2.196734] omap_voltage_late_init: Voltage driver support not added +[ 2.203635] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.209864] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.216567] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.222799] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.231013] Power Management for TI OMAP4+ devices. +[ 2.236079] Registering SWP/SWPB emulation handler +[ 2.241848] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.249094] dmm 4e000000.dmm: initialized all PAT entries +[ 2.256406] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.263065] [drm] No driver support for vblank timestamp query. +[ 2.269369] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.276191] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.318380] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.338018] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.347232] hctosys: unable to open rtc device (rtc0) +[ 2.360432] evm_1v8: disabling +[ 2.363505] aic_dvdd: disabling +[ 2.366655] vmmcwl_fixed: disabling +[ 2.370396] ldousb: disabling +[ 2.373792] ALSA device list: +[ 2.376775] #0: DRA7xx-EVM +[ 2.380376] Waiting for root device PARTUUID=1e7f9ebc-02... +[ 2.594833] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.622253] mmc2: new ultra high speed SDR104 SDHC card at address 0001 +[ 2.639329] mmcblk1: mmc2:0001 SD8GB 7.32 GiB +[ 2.645017] mmcblk1: p1 p2 +[ 2.707669] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.716291] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.746022] EXT4-fs (mmcblk1p2): recovery complete +[ 2.754872] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.763069] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.771469] devtmpfs: mounted +[ 2.774651] Freeing unused kernel memory: 336K +[ 2.779129] This architecture does not have kernel memory protection. +[ 2.900529] systemd[1]: System time before build time, advancing clock. +[ 2.937087] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +[ 2.949893] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +[ 2.961237] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 2.979701] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.008353] systemd[1]: Set hostname to . +[ 3.082369] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.082664] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.082817] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.131460] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.150556] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.197622] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.207087] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.217000] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 3.475942] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.492322] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. +[ 3.510420] systemd[1]: [/etc/systemd/system/multi-user.target.wants/vsdk.service:3] Failed to add dependency on rc.pvr, ignoring: Invalid argument +[ 3.613534] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 3.621364] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 3.629079] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 3.636336] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 3.643807] systemd[1]: sysinit.target: Found dependency on dropbear.socket/stop +[ 3.651258] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 3.658721] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 3.668179] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 3.699782] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 3.717550] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 3.748580] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 3.767378] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 3.787341] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 3.817397] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.837360] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 3.857455] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 3.877413] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 3.897415] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 3.917455] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 3.947339] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 3.975215] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.027379] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.049447] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.078103] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.147472] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.182358] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.207392] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.229562] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.259600] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.287404] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.337494] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.358469] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 4.358737] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.400646] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.433282] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.457431] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.488220] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 4.517566] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.161842] systemd-journald[140]: Received request to flush runtime journal from PID 1 +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ 5.541113] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 5.572412] remoteproc0: 55020000.ipu is available +[ 5.589950] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 5.631495] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Reached target Local File Systems.[ 5.665690] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 + +[ 5.706266] remoteproc1: 40800000.dsp is available + Starting Create Volatile Files and Directories...[ 5.743343] remoteproc1: Note: remoteproc is still under development and considered experimental. + +[ 5.795271] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Load/Save Random Seed...[ 5.821059] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 + +[ 5.837550] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ OK ] Started Create Volatile Files and Directories. +[ 5.886225] remoteproc2: 41000000.dsp is available +[ OK ] Started Load/Save Random Seed. +[ 5.915286] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 5.935557] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 5.954859] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ OK ] Found device /dev/ttyS0. +[ 6.005703] remoteproc0: registered virtio0 (type 7) +[ 6.041897] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 6.183344] remoteproc1: registered virtio1 (type 7) + Starting Network Time Synchronization... + Starting Update UTMP about System Boot/Shutdown... +[ 6.261947] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 6.311120] SCSI subsystem initialized +[ 6.327013] remoteproc2: registered virtio2 (type 7) +[ 6.337442] CAN device driver interface +[ OK ] Started Network Time Synchronization. +[ 6.365963] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 6.418522] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 6.425680] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ 6.497197] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 6.505277] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 6.570537] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 6.653588] scsi host0: ahci +[ 6.656728] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 + Starting Synchronize System and HW clocks... +[ 6.698532] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ 6.977934] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ 7.027195] ata1: SATA link down (SStatus 0 SControl 300) +[ OK ] Reached target System Initialization. +[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 7.256091] remoteproc0: powering up 55020000.ipu +[ OK ] Started System Logging Service. +[ 7.292499] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9552960 +[ OK ] Started Launching Vision SDK App. +[ 7.303291] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 + Starting Telephony service... + Starting uim-sysfs.service... +[ 7.359798] remoteproc0: remote processor 55020000.ipu is now up +[ 7.373161] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 7.380753] remoteproc1: powering up 40800000.dsp +[ 7.391236] DMA: Module install successful, device major num = 244 + Starting TI MultiCore Tools Daemon...[ 7.398941] DRV: Module install successful + + Starting Login Service... +[ 7.424504] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 7455648 +[ 7.453626] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 7.459520] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 7.465468] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 + Starting Print notice about GPLv3 packages... + Starting Avahi mDNS/DNS-SD Stack... + Starting Permit User Sessions... +[ OK ] Started Kernel Logging Service. +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Started D-Bus System Message Bus. +[ 7.664224] remoteproc1: remote processor 40800000.dsp is now up +[ 7.698934] virtio_rpmsg_bus virtio1: rpmsg host is online +[ OK ] Started Telephony service. +[ OK ] Started Avahi mDNS/DNS-SD Stack. +[ 7.727798] remoteproc2: powering up 41000000.dsp + Starting Network Service... + Starting Save/Restore Sound Card State... +[ 7.777718] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 7455648 +[ 7.791246] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 7.797141] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[FAILED[ 7.803102] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +] Failed to start TI MultiCore Tools Daemon. +See 'systemctl status ti-mct-daemon.service' for details. +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State. +[ 7.904452] remoteproc2: remote processor 41000000.dsp is now up +[ 7.932326] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 7.943194] Bluetooth: Core ver 2.21 +[ 7.946855] NET: Registered protocol family 31 +[ 7.960355] Bluetooth: HCI device and connection manager initialized +[ 7.973464] NET: Registered protocol family 15 +[ 7.986514] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 7.997416] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 8.009587] Bluetooth: HCI socket layer initialized +[ 8.037672] NET: Registered protocol family 41 +[ 8.046628] Bluetooth: L2CAP socket layer initialized +[ 8.055216] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 8.075981] Bluetooth: SCO socket layer initialized +[ 8.093240] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Network Service. +[ 8.112362] net eth0: initialized cpsw ale version 1.4 +[ 8.138987] net eth0: ALE Table size 1024 +[ 8.173014] net eth1: phy found : id is : 0x20005c7a +[ 8.213915] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.244037] net eth0: initializing cpsw version 1.15 (0) +[ 8.278065] net eth0: phy found : id is : 0x20005c7a +[ 8.288148] usbcore: registered new interface driver usbfs +[ 8.294604] Initializing XFRM netlink socket +[ 8.299209] usbcore: registered new interface driver hub +[ 8.319473] usbcore: registered new device driver usb +[ 8.327264] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.392494] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 8.410532] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 8.444385] dwc3 48890000.usb: otg: can't start till gadget registers +[ 8.463007] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 8.476209] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 8.489192] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 8.497341] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ 8.514210] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 8.534820] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 +[ 8.552549] hub 1-0:1.0: USB hub found +[ 8.558236] hub 1-0:1.0: 1 port detected +[ 8.570666] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 8.592284] random: nonblocking pool is initialized +[ 8.604136] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 8.632921] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 8.673055] hub 2-0:1.0: USB hub found +[ 8.686352] hub 2-0:1.0: 1 port detected +[ OK ] Reached target Network. + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Started Login Service. +[ OK ] Started Network Name Resolution. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 10.159817] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + Starting vsdkautorun.service... + Starting thttpd.service... +[FAILED] Failed to start vsdkautorun.service. +See 'systemctl status vsdkautorun.service' for details. +[ OK ] Started thttpd.service. + Starting rng-tools.service... +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + binutils-dev + binutils + bison-dev + bison + cpp-symlinks + cpp + dosfstools + g++-symlinks + g++ + gawk-dev + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gstreamer1.0-libav + libcairo-perf-utils + libgmp10 + libidn11 + libmpc3 + libmpfr4 + m4-dev + m4 + make + nettle + parted + swig-dev + swig + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** + +Hi Owen, As indicated in the logs, please run 'systemctl status vsdkautorun.service' for more details. Please make sure user input is disabled in VSDK. You can't run an app in the background and take user input, the app launch will fail. Regards Shravan + +Dear Shravan, [FAILED] Failed to start vsdkautorun.service. See 'systemctl status vsdkautorun.service' for details.[ 11.418326] systemd[1]: vsdkautorun.service: Unit entered failed state. 7823.uart_log_new.txt vsdkautorun.service.txt [Unit] +Description=Launching Vision SDK App +After=rc.pvr + +[Service] +ExecStart=/bin/sh /opt/vision_sdk/autorun.sh +Restart=always +Type=simple + +[Install] +WantedBy=multi-user-target + + 8080.autorun.sh.txt echo "Inside the script" > /tmp/vsdk.log +cd /opt/vision_sdk +./vision_sdk_load.sh >> /tmp/vsdk.log +./apps.out >> /tmp/vsdk.log + +Dear Shravan this is my new log, vsdkautorun.service and autorun.sh. 8306.autorun.sh.txt echo "Inside the script" > /tmp/vsdk.log +cd /opt/vision_sdk +./vision_sdk_load.sh >> /tmp/vsdk.log +./apps.out >> /tmp/vsdk.log + + 2476.vsdkautorun.service.txt [Unit] +Description=Launching Vision SDK App +After=rc.pvr + +[Service] +ExecStart=/bin/sh /opt/vision_sdk/autorun.sh +Restart=always +Type=simple + +[Install] +WantedBy=multi-user-target + + 5556.uart_log_new.txt + +Hi Owen, From your logs I see that the modprobe has failed for all modules. This could be due to a mismatch in the kernel and modules. Please make sure you follow all the steps mentioned in VSDK Linux user guide. Please make sure you're able to launch the use-case by manually logging in and running the commands, and then run the auto launch steps mentioned above. Regards Shravan + +Dear Shravan, i'm rebuild my vsdk (3.03), but have the same issuse: 1.[FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. 2.[FAILED] Failed to start TI MultiCore Tools Daemon. See 'systemctl status ti-mct-daemon.service' for details.[ 7.644509] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready how to do? + +Hi Owen, Please ensure that the folder name similar to the kernel version (you can get the kernel version by running uname -a on the target) exist in /lib/modules. This will ensure that the modules are loaded. Regards Shravan + +Dear Shravan, uname -a : Linux dra7xx-evm 4.4.84-00018-gc66ba60 #15 SMP PREEMPT Mon Oct 8 16:01:27 CST 2018 armv7l GNU/Linux This is my modules file + +Hi Owen, Thank you for the information. The modules and kernel version are the same. I would recommend creating a new card with the file-system provided as part of the release, and rebuild vision-SDK, linux. Don't make the changes for auto-login, and check if you're able to run Vision-SDK. Only after this is working, please try the change mentioned above for auto-login. You also need to make sure your vision-SDK application takes no input from stdin. Running a process in background will not work if there is user input. Regards Shravan + diff --git a/data2/text/range/30001+/732835.txt b/data2/text/range/30001+/732835.txt new file mode 100644 index 0000000000000000000000000000000000000000..c47590b9c541eb9ba55b3d535e2993ba53e57388 --- /dev/null +++ b/data2/text/range/30001+/732835.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: SDK_VISION_03_04_00_00 install + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux i install and build SDK_VISION_03_04_00_00 follow SDK_VISION_03_04_00_00\vision_sdk\docs\Linux\ VisionSDK_Linux_UserGuide.pdf at last when i boot the evm have some problem , follow is the log ,could you please check what is the problem! OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 2 ms (80.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3559792 bytes read in 110 ms (30.9 MiB/s) 106875 bytes read in 15 ms (6.8 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x365170 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff17a ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00027-g018eb62 (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #1 SMP PREEMPT Sat Sep 29 16:51:15 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0xbe400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 411860K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364332K reserved, 204800K cma-reserved, 235520K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) [ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) [ 0.000000] .data : 0xc0934000 - 0xc09839e0 ( 319 kB) [ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000330] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000788] Console: colour dummy device 80x30 [ 0.000804] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000810] This ensures that you still see kernel messages. Please [ 0.000816] update your kernel commandline. [ 0.000828] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000840] pid_max: default: 32768 minimum: 301 [ 0.000936] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000946] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001487] Initializing cgroup subsys io [ 0.001504] Initializing cgroup subsys memory [ 0.001529] Initializing cgroup subsys devices [ 0.001540] Initializing cgroup subsys freezer [ 0.001551] Initializing cgroup subsys perf_event [ 0.001563] Initializing cgroup subsys pids [ 0.001589] CPU: Testing write buffer coherency: ok [ 0.001791] /cpus/cpu@0 missing clock-frequency property [ 0.001808] /cpus/cpu@1 missing clock-frequency property [ 0.001818] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001861] Setting up static identity map for 0x80008340 - 0x800083a0 [ 0.080189] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080257] Brought up 2 CPUs [ 0.080269] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080275] CPU: All CPU(s) started in HYP mode. [ 0.080281] CPU: Virtualization extensions available. [ 0.081313] devtmpfs: initialized [ 0.110392] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.111350] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.314517] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.314541] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.318608] pinctrl core: initialized pinctrl subsystem [ 0.319471] NET: Registered protocol family 16 [ 0.320417] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350249] cpuidle: using governor ladder [ 0.380277] cpuidle: using governor menu [ 0.388885] OMAP GPIO hardware version 0.1 [ 0.395360] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411830] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411843] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.421463] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.421473] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.421945] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.421954] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.422432] OMAP DMA hardware revision 0.0 [ 0.461590] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462753] edma 43300000.edma: memcpy is disabled [ 0.467440] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471791] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471967] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472124] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472277] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472573] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472763] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475833] palmas 0-0058: IRQ missing: skipping irq request [ 0.491205] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563494] pcf857x 0-0020: probed [ 0.564055] pcf857x 0-0021: probed [ 0.564211] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.564606] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564811] media: Linux media interface: v0.10 [ 0.564861] Linux video capture interface: v2.00 [ 0.564900] pps_core: LinuxPPS API ver. 1 registered [ 0.564907] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564936] PTP clock support registered [ 0.564980] EDAC MC: Ver: 3.0.0 [ 0.565737] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.566025] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.566377] Advanced Linux Sound Architecture Driver Initialized. [ 0.567229] clocksource: Switched to clocksource arch_sys_counter [ 0.577765] NET: Registered protocol family 2 [ 0.578266] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.578330] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.578455] TCP: Hash tables configured (established 8192 bind 8192) [ 0.578503] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.578534] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578738] NET: Registered protocol family 1 [ 0.578979] RPC: Registered named UNIX socket transport module. [ 0.578989] RPC: Registered udp transport module. [ 0.578996] RPC: Registered tcp transport module. [ 0.579002] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.580007] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.588957] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.589589] NFS: Registering the id_resolver key type [ 0.589618] Key type id_resolver registered [ 0.589625] Key type id_legacy registered [ 0.589693] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.590975] bounce: pool size: 64 pages [ 0.591121] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.591134] io scheduler noop registered [ 0.591145] io scheduler deadline registered [ 0.591175] io scheduler cfq registered (default) [ 0.596031] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599322] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599335] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599368] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599388] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629513] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629688] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629701] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629712] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.629721] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.630122] PCI: bus0: Fast back to back transfers disabled [ 0.630246] PCI: bus1: Fast back to back transfers enabled [ 0.630328] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630342] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630354] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630570] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.690414] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.693758] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.698595] console [ttyS0] enabled [ 1.702981] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.712672] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.722730] [drm] Initialized drm 1.1.0 20060810 [ 1.728289] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.734934] [drm] No driver support for vblank timestamp query. [ 1.741104] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.748301] OMAP DSS rev 6.1 [ 1.752049] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.767648] loop: module loaded [ 1.771193] vmemexp device MAJOR num = 245 [ 1.775319] vmemexp class registered [ 1.779052] /dev/vmemexp device registered [ 1.783166] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.788884] nand: No NAND device found [ 1.792655] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.802578] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.807997] 7 ofpart partitions found on MTD device spi32766.0 [ 1.813855] Creating 7 MTD partitions on "spi32766.0": [ 1.819036] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.825169] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.831544] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.838477] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.845131] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.852522] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.858864] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.866582] libphy: Fixed MDIO Bus: probed [ 1.917261] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.923384] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.933707] libphy: 48485000.mdio: probed [ 1.937755] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.945794] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.954491] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.961157] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.968150] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.976773] mousedev: PS/2 mouse device common for all mice [ 1.982965] i2c /dev entries driver [ 1.991698] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.997315] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.003701] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.010238] evm_3v3_sw: supplied by sysen1 [ 2.091013] mmc0: MAN_BKOPS_EN bit is not set [ 2.102934] mmc0: new HS200 MMC card at address 0001 [ 2.108384] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.123189] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.139432] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.169047] ledtrig-cpu: registered to indicate activity on CPUs [ 2.177567] aic_dvdd: supplied by evm_3v3_sw [ 2.183476] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.190976] NET: Registered protocol family 10 [ 2.206229] sit: IPv6 over IPv4 tunneling driver [ 2.211450] NET: Registered protocol family 17 [ 2.216122] Key type dns_resolver registered [ 2.220562] omap_voltage_late_init: Voltage driver support not added [ 2.227475] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.233684] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.240440] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.246647] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.254866] Power Management for TI OMAP4+ devices. [ 2.259964] Registering SWP/SWPB emulation handler [ 2.265689] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.272936] dmm 4e000000.dmm: initialized all PAT entries [ 2.280207] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.286849] [drm] No driver support for vblank timestamp query. [ 2.293158] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.310018] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.348561] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.368213] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.376092] hctosys: unable to open rtc device (rtc0) [ 2.393150] evm_1v8: disabling [ 2.396222] aic_dvdd: disabling [ 2.399396] vmmcwl_fixed: disabling [ 2.403078] ldousb: disabling [ 2.406466] ALSA device list: [ 2.409462] #0: DRA7xx-EVM [ 2.412994] Waiting for root device PARTUUID=2ca9f500-02... [ 2.617258] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.632319] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.639297] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.648994] mmcblk1: p1 p2 [ 2.750631] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 2.762152] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 3.044527] EXT4-fs (mmcblk1p2): recovery complete [ 3.059453] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 3.067630] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 3.078335] devtmpfs: mounted [ 3.081533] Freeing unused kernel memory: 332K [ 3.085996] This architecture does not have kernel memory protection. [ 3.218650] systemd[1]: System time before build time, advancing clock. [ 3.254109] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.269588] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [ 3.290758] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 3.309367] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.340921] systemd[1]: Set hostname to . [ 3.397120] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.403711] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ .417290] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.431616] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.448929] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.516273] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 3.525775] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 3.535777] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) [ 3.843482] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 3.851316] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 3.859037] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 3.866472] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 3.875948] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 3.914636] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 3.937439] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 3.968150] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 3.997528] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 4.017406] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 4.047580] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 4.077578] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.107426] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 4.128025] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.158072] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.188021] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.217518] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 4.247444] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.267511] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 4.317648] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.353044] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.385080] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 4.400358] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 4.429745] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.447587] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 4.469622] systemd[1]: Starting Journal Service... Starting Journal Service... [ 4.482617] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 4.507607] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.577607] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.599955] systemd[1]: Mounting Debug File System... [ 4.606409] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) Mounting Debug File System... [ 4.634013] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 4.657566] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 4.677481] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 4.697673] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Setup Virtual Console. [ OK ] Started Remount Root and Kernel File Systems. Starting udev Coldplug all Devices... Starting Apply Kernel Variables... Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... [ OK ] Started Apply Kernel Variables. [ OK ] Started Create Static Device Nodes in /dev. [ 5.310982] systemd-journald[144]: Received request to flush runtime journal from PID 1 [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started udev Coldplug all Devices. [ 5.787322] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 5.803005] remoteproc0: 55020000.ipu is available [ 5.824790] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 5.836233] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 5.848445] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 5.874658] remoteproc1: 40800000.dsp is available [ 5.883051] remoteproc1: Note: remoteproc is still under development and considered experimental. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. [ 5.926419] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 5.946934] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 5.965236] remoteproc2: 41000000.dsp is available [ 5.971810] remoteproc2: Note: remoteproc is still under development and considered experimental. Starting Create Volatile Files and Directories... [ 6.002069] remoteproc1: registered virtio0 (type 7) [ OK ] Started Load/Save Random Seed. [ 6.033190] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Create Volatile Files and Directories. [ 6.097471] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 6.108535] remoteproc0: registered virtio1 (type 7) [ 6.116355] remoteproc2: registered virtio2 (type 7) [ 6.129023] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ OK ] Found device /dev/ttyS0. [ 6.224188] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 Starting Update UTMP about System Boot/Shutdown... [ 6.357847] SCSI subsystem initialized Starting Network Time Synchronization... [ 6.477795] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 6.519462] CAN device driver nterface [ OK ] Started Network Time Synchronization. [ 6.549357] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 6.610457] omap-aes 4b700000.aes: OMAP AES h accel rev: 3.3 [ OK ] Started Update UTMP about System Boot/Shutdown. [ 6.621226] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 6.683547] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 6.736633] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 6.805465] scsi host0: ahci [ 6.808655] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 [ 6.833635] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) Starting Synchronize System and HW clocks... [ OK ] Reached target System Time Synchronized. [ 6.907406] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [ OK ] Started Synchronize System and HW clocks. [ 6.930815] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ 7.157274] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. [ OK ] Reached target System Initialization. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ OK ] Started Kernel Logging Service. Starting Permit User Sessions... Starting Save/Restore Sound Card State... Starting Login Service... [ OK ] Started System Logging Service. [ 7.544036] remoteproc1: powering up 40800000.dsp [ 7.557775] remoeproc1: Booting fw image dra7-dsp1-fw.xe66, size 598197 [ OK ] Started D-Bus System Message Bus. [ 7.578011] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 7.583902] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 7.589839] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 7.616377] remoteproc1: remote processor 40800000.dsp is now up [ 7.626695] virtio_rpmsg_bus virtio0: rpmsg host is online [ 7.650061] remoteproc0: powering up 55020000.ipu [ 7.679578] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4612468 [ 7.697589] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 7.731993] remoteproc0: remote processor 55020000.ipu is now up Starting rc.pvr.service... [ 7.741735] virtio_rpmsg_bus virtio1: rpmsg host is online [ 7.750180] remoteproc2: powering up 41000000.dsp [ 7.757211] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 598197 [ 7.775518] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 7.781408] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 7.787355] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 Starting Network Service... [ 7.812242] remoteproc2: remote processor 41000000.dsp is now up [ 7.820322] virtio_rpmsg_bus virtio2: rpmsg host is online [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers.[ 7.843064] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ 7.867593] net eth1: initializing cpsw version 1.15 (0) [ 7.872945] net eth0: initialized cpsw ale version 1.4 [ OK ] Started Permit User Sessions.[ 7.880983] net eth0: ALE Table size 1024 [ 7.910378] net eth1: phy found : id is : 0x20005c7a [ OK ] Started Save/Restore Sound Card State. [ OK ] Started Network Service.[ 7.924749] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 7.936541] net eth0: initializing cpsw version 1.15 (0) [ 7.944889] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 7.949894] net eth0: phy found : id is : 0x20005c7a [ 7.954899] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 7.979108] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 7.994363] NET: Registered protocol family 41 [ 8.005189] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ OK ] Started rc.pvr.service. [ 8.306123] usbcore: registered new interface driver usbfs [ 8.312391] usbcore: registered new interface driver hub [ 8.317997] usbcore: registered new device driver usb [ 8.363266] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 8.370417] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 8.379433] dwc3 48890000.usb: otg: can't start till gadget registers [ 8.386013] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.393259] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 8.402177] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 8.411919] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 8.420778] hub 1-0:1.0: USB hub found [ 8.424569] hub 1-0:1.0: 1 port detected [ 8.430778] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.436293] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 8.445713] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 8.455690] hub 2-0:1.0: USB hub found [ 8.460563] hub 2-0:1.0: 1 port detected Starting weston.service... [ OK ] Reached target Network. Starting Network Name Resolution... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Network Name Resolution. [ OK ] Started weston.service. [ OK ] Started Login Service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started tiipclad-daemon.service. [ OK ] Started telnetd.service. [ 9.944465] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 9.952540] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# [ 32.942522] random: nonblocking pool is initialized root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh [ 62.868503] DMA: Module install successful, device major num = 242 [ 62.874964] DRV: Module install successful insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# thanks shuai + +Responses: +i copy opt/vision_sdk/cmemk.ko to bin/ and follow is the new log i run sample_app.out ] 1: Null Source -> Display (Supports only 1920x1080 HDMI display) this usecase failed. + +OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 165 bytes read in 2 ms (80.1 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3560088 bytes read in 106 ms (32 MiB/s) 106875 bytes read in 14 ms (7.3 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x365298 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff17a ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00027-g018eb62 (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #2 SMP PREEMPT Sun Sep 30 10:05:17 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0xbe400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=2ca9f500-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 411860K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364332K reserved, 204800K cma-reserved, 235520K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) [ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) [ 0.000000] .data : 0xc0934000 - 0xc09839e0 ( 319 kB) [ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000337] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000344] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000787] Console: colour dummy device 80x30 [ 0.000802] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000809] This ensures that you still see kernel messages. Please [ 0.000814] update your kernel commandline. [ 0.000827] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000839] pid_max: default: 32768 minimum: 301 [ 0.000935] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000945] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001486] Initializing cgroup subsys io [ 0.001502] Initializing cgroup subsys memory [ 0.001527] Initializing cgroup subsys devices [ 0.001540] Initializing cgroup subsys freezer [ 0.001551] Initializing cgroup subsys perf_event [ 0.001562] Initializing cgroup subsys pids [ 0.001589] CPU: Testing write buffer coherency: ok [ 0.001791] /cpus/cpu@0 missing clock-frequency property [ 0.001807] /cpus/cpu@1 missing clock-frequency property [ 0.001818] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001864] Setting up static identity map for 0x80008340 - 0x800083a0 [ 0.080190] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080257] Brought up 2 CPUs [ 0.080270] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080277] CPU: All CPU(s) started in HYP mode. [ 0.080283] CPU: Virtualization extensions available. [ 0.081315] devtmpfs: initialized [ 0.110496] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.111448] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.315251] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.315275] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.319267] pinctrl core: initialized pinctrl subsystem [ 0.320130] NET: Registered protocol family 16 [ 0.321093] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350257] cpuidle: using governor ladder [ 0.380287] cpuidle: using governor menu [ 0.388857] OMAP GPIO hardware version 0.1 [ 0.395397] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411921] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411935] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.421553] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.421563] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.422030] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.422040] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.422518] OMAP DMA hardware revision 0.0 [ 0.461432] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462596] edma 43300000.edma: memcpy is disabled [ 0.467249] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471589] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471763] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.471919] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472074] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472370] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472561] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475592] palmas 0-0058: IRQ missing: skipping irq request [ 0.491018] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563309] pcf857x 0-0020: probed [ 0.563871] pcf857x 0-0021: probed [ 0.564026] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.564424] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564631] media: Linux media interface: v0.10 [ 0.564682] Linux video capture interface: v2.00 [ 0.564722] pps_core: LinuxPPS API ver. 1 registered [ 0.564729] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564757] PTP clock support registered [ 0.564801] EDAC MC: Ver: 3.0.0 [ 0.565557] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.565847] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.566197] Advanced Linux Sound Architecture Driver Initialized. [ 0.567051] clocksource: Switched to clocksource arch_sys_counter [ 0.577566] NET: Registered protocol family 2 [ 0.578065] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.578129] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.578253] TCP: Hash tables configured (established 8192 bind 8192) [ 0.578299] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.578330] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578534] NET: Registered protocol family 1 [ 0.578777] RPC: Registered named UNIX socket transport module. [ 0.578786] RPC: Registered udp transport module. [ 0.578793] RPC: Registered tcp transport module. [ 0.578798] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.579808] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.588696] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.589327] NFS: Registering the id_resolver key type [ 0.589354] Key type id_resolver registered [ 0.589362] Key type id_legacy registered [ 0.589430] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.590716] bounce: pool size: 64 pages [ 0.590861] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.590874] io scheduler noop registered [ 0.590885] io scheduler deadline registered [ 0.590916] io scheduler cfq registered (default) [ 0.595768] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599004] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599018] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599051] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599071] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629201] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629376] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629389] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629399] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.629409] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.629810] PCI: bus0: Fast back to back transfers disabled [ 0.629933] PCI: bus1: Fast back to back transfers enabled [ 0.630014] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630030] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630042] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630261] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.690333] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.693660] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.698533] console [ttyS0] enabled [ 1.702919] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.712613] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.722668] [drm] Initialized drm 1.1.0 20060810 [ 1.728225] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.734870] [drm] No driver support for vblank timestamp query. [ 1.741039] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.748230] OMAP DSS rev 6.1 [ 1.751977] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.767618] loop: module loaded [ 1.771165] vmemexp device MAJOR num = 245 [ 1.775292] vmemexp class registered [ 1.779030] /dev/vmemexp device registered [ 1.783145] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.788857] nand: No NAND device found [ 1.792627] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.802579] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.807999] 7 ofpart partitions found on MTD device spi32766.0 [ 1.813857] Creating 7 MTD partitions on "spi32766.0": [ 1.819034] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.825168] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.831533] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.838462] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.845111] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.852506] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.858852] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.866589] libphy: Fixed MDIO Bus: probed [ 1.917086] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.923212] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.933769] libphy: 48485000.mdio: probed [ 1.937819] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.945861] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.954561] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.961224] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.968212] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.976827] mousedev: PS/2 mouse device common for all mice [ 1.983016] i2c /dev entries driver [ 1.991756] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.997378] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.003763] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.010301] evm_3v3_sw: supplied by sysen1 [ 2.090833] mmc0: MAN_BKOPS_EN bit is not set [ 2.102786] mmc0: new HS200 MMC card at address 0001 [ 2.118261] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.133056] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.149298] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.168849] ledtrig-cpu: registered to indicate activity on CPUs [ 2.177342] aic_dvdd: supplied by evm_3v3_sw [ 2.183242] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.190722] NET: Registered protocol family 10 [ 2.205967] sit: IPv6 over IPv4 tunneling driver [ 2.211175] NET: Registered protocol family 17 [ 2.215858] Key type dns_resolver registered [ 2.220300] omap_voltage_late_init: Voltage driver support not added [ 2.227213] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.233423] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.240135] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.246342] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.254584] Power Management for TI OMAP4+ devices. [ 2.259662] Registering SWP/SWPB emulation handler [ 2.265399] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.272622] dmm 4e000000.dmm: initialized all PAT entries [ 2.279883] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.286525] [drm] No driver support for vblank timestamp query. [ 2.292822] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.309688] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.348383] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.367990] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.377135] hctosys: unable to open rtc device (rtc0) [ 2.390533] evm_1v8: disabling [ 2.393650] aic_dvdd: disabling [ 2.396809] vmmcwl_fixed: disabling [ 2.400511] ldousb: disabling [ 2.403970] ALSA device list: [ 2.406980] #0: DRA7xx-EVM [ 2.410561] Waiting for root device PARTUUID=2ca9f500-02... [ 2.646945] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.662018] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.679006] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.688714] mmcblk1: p1 p2 [ 2.740504] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities [ 2.751960] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities [ 3.170576] EXT4-fs (mmcblk1p2): recovery complete [ 3.184625] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 3.192811] VFS: Mounted root (ext4 filesystem) on device 179:50. [ 3.199014] devtmpfs: mounted [ 3.202212] Freeing unused kernel memory: 332K [ 3.206675] This architecture does not have kernel memory protection. [ 3.327601] systemd[1]: System time before build time, advancing clock. [ 3.361317] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.376714] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.394341] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 3.412903] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.440798] systemd[1]: Set hostname to . [ 3.502329] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.512653] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.530554] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) [ 3.551449] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.568936] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) [ 3.631850] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.641403] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.651564] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) [ 3.957802] systemd[1]: alignment.service: Found ordering cycle on alignment.service/start [ 3.966117] systemd[1]: alignment.service: Found dependency on sysinit.target/start [ 3.973849] systemd[1]: alignment.service: Found dependency on alignment.service/start [ 3.981824] systemd[1]: alignment.service: Breaking ordering cycle by deleting job alignment.service/start [ 3.991573] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with alignment.service/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 4.029220] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 4.047385] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 4.077448] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 4.107254] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 4.147525] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.167322] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 4.192528] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 4.217319] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 4.247843] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 4.317413] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.347262] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.367933] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.427323] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 4.463265] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.490750] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.506149] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ 4.518602] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.554832] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 4.577528] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 4.607512] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.637258] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 4.687465] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.719830] systemd[1]: Starting Journal Service... Starting Journal Service... [ 4.747746] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.817236] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 4.847410] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 4.911736] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 4.937353] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 4.957266] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 4.977441] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [ OK ] Started Setup Virtual Console. [ OK ] Started Remount Root and Kernel File Systems. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Create list of required sta...ce nodes for the current kernel. Starting Create Static Device Nodes in /dev... Starting Apply Kernel Variables... Starting udev Coldplug all Devices... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 5.654893] systemd-journald[155]: Received request to flush runtime journal from PID 1 Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started Flush Journal to Persistent Storage. [ 6.022421] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ OK ] Started udev Coldplug all Devices. [ 6.046334] remoteproc0: 55020000.ipu is available [ 6.053430] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 6.062715] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 6.096800] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 6.112490] remoteproc1: 40800000.dsp is available [ 6.136704] remoteproc1: Note: remoteproc is still under development and considered experimental. [ OK ] Reached target Local File Systems. [ 6.160209] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 6.190935] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 6.206396] remoteproc2: 41000000.dsp is available Starting Create Volatile Files and Directories... [ 6.236028] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 6.251880] remoteproc1: registered virtio0 (type 7) Starting Load/Save Random Seed... [ 6.275691] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Create Volatile Files and Directories. [ 6.317133] remoteproc0: registered virtio1 (type 7) [ OK ] Started Load/Save Random Seed. [ 6.361993] remoteproc2: registered virtio2 (type 7) [ OK ] Found device /dev/ttyS0.[ 6.376771] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 6.389359] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 6.488245] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ OK ] Started Network Time Synchronization. [ 6.730733] SCSI subsystem initialized [ 6.748098] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 6.776957] CAN device driver interface [ OK ] Started Update UTMP about System Boot/Shutdown.[ 6.842705] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ OK ] Reached target System Time Synchronized.[ 6.917486] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 6.937738] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) [ 6.963168] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 6.976116] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode Starting Synchronize System and HW clocks... [ 7.005551] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ OK ] Started Synchronize System and HW clocks. [ 7.131125] scsi host0: ahci [ 7.135194] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 [ 7.205418] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [ OK ] Reached target Sound Card. [ OK ] Reached target System Initialization. [ 7.331397] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. Starting rc.pvr.service... [ OK ] Started D-Bus System Message Bus. [ 7.520288] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ 7.527662] ata1: SATA link down (SStatus 0 SControl 300) Starting Network Service... Starting Save/Restore Sound Card State... [ 7.659351] net eth1: initializing cpsw version 1.15 (0) [ 7.670701] net eth0: initialized cpsw ale version 1.4 [ OK ] Started System Logging Service.[ 7.681817] net eth0: ALE Table size 1024 [ 7.705328] net eth1: phy found : id is : 0x20005c7a Starting Login Service... [ OK ] Started Kernel Logging Service.[ 7.740562] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready Starting Permit User Sessions... [ 7.778078] net eth0: initializing cpsw version 1.15 (0) [ OK ] Started Daily Cleanup of Temporary Directories. [ 7.808748] net eth0: phy found : id is : 0x20005c7a [ OK ] Reached target Timers. [ 7.844077] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ OK ] Started Network Service. [ OK ] Started rc.pvr.service. [ OK ] Started Save/Restore Sound Card State.[ 7.926611] remoteproc1: powering up 40800000.dsp [ 7.941453] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 598197 [ OK ] Started Permit User Sessions. [ 7.986545] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 7.992435] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 7.998394] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 8.042579] remoteproc1: remote processor 40800000.dsp is now up [ 8.049134] virtio_rpmsg_bus virtio0: rpmsg host is online [ 8.055443] remoteproc0: powering up 55020000.ipu [ 8.077671] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4612468 [ 8.084649] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 8.137011] remoteproc0: remote processor 55020000.ipu is now up [ 8.158235] virtio_rpmsg_bus virtio1: rpmsg host is online [ 8.166873] remoteproc2: powering up 41000000.dsp [ 8.181686] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 598197 [ 8.204405] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 8.210288] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 8.216210] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 8.280919] remoteproc2: remote processor 41000000.dsp is now up [ 8.288231] virtio_rpmsg_bus virtio2: rpmsg host is online [ 8.368866] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 8.387093] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 8.394825] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 8.412554] NET: Registered protocol family 41 [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Started Serial Getty on ttyS0. [ 8.626092] usbcore: registered new interface driver usbfs [ 8.632408] usbcore: registered new interface driver hub [ 8.637999] usbcore: registered new device driver usb [ OK ] Started Getty on tty1. [ 8.683572] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 8.690787] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 8.699772] dwc3 48890000.usb: otg: can't start till gadget registers [ 8.711526] xhci-hcd xhci-hcd.1.auto: xHCI Host Contrller [ 8.716990] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 Starting weston.service...[ 8.726875] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 8.738468] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 8.746672] hub 1-0:1.0: USB hub found [ 8.750832] hub 1-0:1.0: 1 port detected [ 8.755091] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 8.760729] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 8.760790] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 8.762103] hub 2-0:1.0: USB hub found [ 8.762129] hub 2-0:1.0: 1 port detected [ OK ] Reached target Network. Starting Network Name Resolution... [ OK ] Started weston.service. [ OK ] Started Network Name Resolution. [ OK ] Started Login Service. Starting tiipclad-daemon.service... Starting telnetd.service... [ OK ] Started tiipclad-daemon.service. [ OK ] Started telnetd.service. [ 9.814787] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 9.822867] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root root@dra7xx-evm:~# cd [ 34.135481] random: nonblocking pool is initialized root@dra7xx-evm:~# cd /opt/vision_sdk/ root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh [ 77.296534] DMA: Module install successful, device major num = 242 [ 77.303234] DRV: Module install successful [ 77.322118] CMEMK module: reference Linux version 4.4.84 [ 77.328206] cmemk initialized ./disableDssInterruptsOnA15.sh: line 11: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 12: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 13: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 14: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 15: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 16: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 17: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 18: @0x4A002AC4:: command not found ./disableDssInterruptsOnA15.sh: line 19: @0x4A002AC4:: command not found updated 0x4A002AC4 value is 00930000 root@dra7xx-evm:/opt/vision_sdk# ./sample_app.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6a18000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa2018000 of size 0x14a00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa1f58000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa1f98000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 97.688922] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [ 97.754743] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [ HOST] [HOST ] 104.339352 s: SYSTEM: System A15 Init in proress !!! [HOST] [HOST ] 104.339443 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 104.339474 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 104.339779 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 104.339779 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 104.339809 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 104.339840 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 104.340053 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 104.340053 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 104.340084 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 104.340084 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 104.340389 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) [HOST] [HOST ] 104.340389 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 104.340419 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) [HOST] [HOST ] 104.340450 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 104.340663 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 104.340663 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 104.340846 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 104.340846 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 104.340846 s: SYSTEM: Initializing A15 Links !!! [HOST] [HOST ] 104.340999 s: IPC_OUT_0 : Init done - linkid-0x2000000 [HOST] [HOST ] 104.341151 s: IPC_OUT_1 : Init done - linkid-0x2000001 [HOST] [HOST ] 104.341304 s: IPC_OUT_2 : Init done - linkid-0x2000002 [HOST] [HOST ] 104.341456 s: IPC_OUT_3 : Init done - linkid-0x2000003 [HOST] [HOST ] 104.341609 s: IPC_OUT_4 : Init done - linkid-0x2000004 [HOST] [HOST ] 104.341761 s: IPC_IN_0 : Init done - linkid-0x200000a [HOST] [HOST ] 104.341914 s: IPC_IN_1 : Init done - linkid-0x200000b [HOST] [HOST ] 104.342066 s: IPC_IN_2 : Init done - linkid-0x200000c [HOST] [HOST ] 104.342219 s: IPC_IN_3 : Init done - linkid-0x200000d [HOST] [HOST ] 104.342463 s: IPC_IN_4 : Init done - linkid-0x200000e [HOST] [HOST ] 104.342646 s: IPC_IN_5 : Init done - linkid-0x200000f [HOST] [HOST ] 104.342829 s: IPC_IN_6 : Init done - linkid-0x2000010 [HOST] [HOST ] 104.342981 s: NULL_0 : Init done - linkid-0x2000014 [HOST] [HOST ] 104.343134 s: NULL_1 : Init done - linkid-0x2000015 [HOST] [HOST ] 104.343347 s: NULL_SRC_0 : Init done - linkid-0x2000039 [HOST] [HOST ] 104.343561 s: DISP_DIST_SRC_0 : Init done - linkid-0x200005c [HOST] [HOST ] 104.343713 s: DISP_DIST_SRC_1 : Init done - linkid-0x200005d [HOST] [HOST ] 104.343866 s: DISP_DIST_SRC_2 : Init done - linkid-0x200005e [HOST] [HOST ] 104.343988 s: DISP_DIST_SRC_3 : Init done - linkid-0x200005f [HOST] [HOST ] 104.344140 s: DISP_DIST_SRC_4 : Init done - linkid-0x2000060 [HOST] [HOST ] 104.344262 s: DISP_DIST_SRC_5 : Init done - linkid-0x2000061 [HOST] [HOST ] 104.344384 s: DISP_DIST_SRC_6 : Init done - linkid-0x2000062 [HOST] [HOST ] 104.344506 s: DISP_DIST_SRC_7 : Init done - linkid-0x2000063 [HOST] [HOST ] 104.344689 s: ALGORITHM_0 : Init done - linkid-0x2000031 [HOST] [HOST ] 104.344842 s: ALGORITHM_1 : Init done - linkid-0x2000032 [HOST] [HOST ] 104.344994 s: ALGORITHM_2 : Init done - linkid-0x2000033 [HOST] [HOST ] 104.345177 s: ALGORITHM_3 : Init done - linkid-0x2000034 [HOST] [HOST ] 104.345330 s: ALGORITHM_4 : Init done - linkid-0x2000035 [HOST] [HOST ] 104.345513 s: ALGORITHM_5 : Init done - linkid-0x2000036 [HOST] [HOST ] 104.345665 s: ALGORITHM_6 : Init done - linkid-0x2000037 [HOST] [HOST ] 104.345787 s: ALGORITHM_7 : Init done - linkid-0x2000038 [HOST] [HOST ] 104.346001 s: DUP0 : Init done - linkid-0x0 [HOST] [HOST ] 104.346245 s: DUP1 : Init done - linkid-0x0 [HOST] [HOST ] 104.346428 s: DUP2 : Init done - linkid-0x0 [HOST] [HOST ] 104.346641 s: DUP3 : Init done - linkid-0x0 [HOST] [HOST ] 104.346855 s: DUP4 : Init done - linkid-0x0 [HOST] [HOST ] 104.346977 s: SYNC_0 : Init done - linkid-0x0 [HOST] [HOST ] 104.347129 s: SYNC_1 : Init done - linkid-0x0 [HOST] [HOST ] 104.347251 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 104.347373 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 104.347526 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 104.347648 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 104.347800 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 104.347953 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 104.348075 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 104.348227 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 104.348349 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 104.348471 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 104.348593 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 104.348685 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 104.348776 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 104.348898 s: SGXFRMCPY_0 : Init done - linkid-0x2000044 [HOST] [HOST ] 104.348929 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 104.352406 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [HOST ] 104.352437 s: SYSTEM: System A15 Init Done !!! [HOST] [DSP1 ] 14.706582 s: ***** DSP1 Firmware build time 10:33:27 Sep 30 2018 [HOST] [DSP1 ] 14.706643 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 14.706887 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 14.707070 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 14.707100 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 14.934087 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 14.949338 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 14.977124 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 14.997132 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 15.017171 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 15.037119 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 15.037150 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 15.037211 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [DSP1 ] 15.037272 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP1 ] 15.037302 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP1 ] 15.037333 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP1 ] 15.037363 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP1 ] 15.037394 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 15.037577 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 15.037668 s: RpmsgInit in progress... [HOST] [DSP1 ] 15.037668 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 15.037882 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 15.038553 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 15.038583 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 15.038827 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 15.038858 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 15.038888 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516232 B (504 KB) [HOST] [DSP1 ] 15.038919 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 15.047977 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP1 ] 15.048008 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP1 ] 15.380253 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP1 ] 15.380284 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [DSP2 ] 14.944915 s: ***** DSP2 Firmware build time 10:33:27 Sep 30 2018 [HOST] [DSP2 ] 14.944976 s: *** SYSTEM: CPU Frequency , [HOST] [DSP2 ] 14.945220 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP2 ] 14.945403 s: SYSTEM: IPC init in progress !!! [HOST] [DSP2 ] 14.945434 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP2 ] 14.947416 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP2 ] 14.949338 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [DSP2 ] 14.987037 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP2 ] 15.007045 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP2 ] 15.027054 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP2 ] 15.047062 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP2 ] 15.047093 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP2 ] 15.047154 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [DSP2 ] 15.047184 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [DSP2 ] 15.047215 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [DSP2 ] 15.047276 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [DSP2 ] 15.047337 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [DSP2 ] 15.047367 s: SYSTEM: Notify init done !!! [HOST] [DSP2 ] 15.047520 s: SYSTEM: MsgQ init done !!! [HOST] [DSP2 ] 15.047611 s: RpmsgInit in progress... [HOST] [DSP2 ] 15.047642 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP2 ] 15.047855 s: SYSTEM: IPC init DONE !!! [HOST] [DSP2 ] 15.048526 s: SYSTEM: System Common Init Done !!! [HOST] [DSP2 ] 15.048557 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP2 ] 15.048801 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP2 ] 15.048831 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 15.048862 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516232 B (504 KB) [HOST] [DSP2 ] 15.048892 s: SYSTEM: Initializing Links !!! [HOST] [DSP2 ] 15.057982 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [DSP2 ] 15.058012 s: SYSTEM: System DSP Init Done !!! [HOST] [DSP2 ] 15.382236 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [HOST] [DSP2 ] 15.382297 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [HOST] [EVE1 ] 14.930580 s: ***** EVE Firmware build time 10:32:07 Sep 30 2018 [HOST] [EVE1 ] 14.932349 s: *** SYSTEM: CPU Frequency , [HOST] [EVE1 ] 14.935765 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE1 ] 14.937107 s: SYSTEM: IPC init in progress !!! [HOST] [EVE1 ] 14.938083 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE1 ] 14.967425 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE1 ] 14.977124 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE1 ] 14.987037 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE1 ] 15.027237 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE1 ] 15.057158 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE1 ] 15.087140 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE1 ] 15.088147 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE1 ] 15.089336 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE1 ] 15.090556 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE1 ] 15.091776 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE1 ] 15.092966 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE1 ] 15.094186 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE1 ] 15.095376 s: SYSTEM: Notify init done !!! [HOST] [EVE1 ] 15.097023 s: SYSTEM: MsgQ init done !!! [HOST] [EVE1 ] 15.097877 s: SYSTEM: IPC init DONE !!! [HOST] [EVE1 ] 15.110290 s: SYSTEM: System Common Init Done !!! [HOST] [EVE1 ] 15.111206 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE1 ] 15.112548 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE1 ] 15.113676 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE1 ] 15.114896 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 15.117214 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254336 B (248 KB) [HOST] [EVE1 ] 15.119227 s: SYSTEM: Initializing Links !!! [HOST] [EVE1 ] 15.204325 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE1 ] 15.205331 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE2 ] 14.930580 s: ***** EVE Firmware build time 10:32:07 Sep 30 2018 [HOST] [EVE2 ] 14.932349 s: *** SYSTEM: CPU Frequency , [HOST] [EVE2 ] 14.935856 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE2 ] 14.937229 s: SYSTEM: IPC init in progress !!! [HOST] [EVE2 ] 14.938205 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE2 ] 14.987494 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE2 ] 14.997132 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE2 ] 15.007045 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE2 ] 15.027237 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE2 ] 15.077045 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE2 ] 15.107027 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE2 ] 15.108064 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE2 ] 15.109345 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE2 ] 15.110626 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE2 ] 15.111877 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE2 ] 15.113158 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE2 ] 15.114469 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE2 ] 15.115750 s: SYSTEM: Notify init done !!! [HOST] [EVE2 ] 15.117489 s: SYSTEM: MsgQ init done !!! [HOST] [EVE2 ] 15.118373 s: SYSTEM: IPC init DONE !!! [HOST] [EVE2 ] 15.131306 s: SYSTEM: System Common Init Done !!! [HOST] [EVE2 ] 15.132251 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE2 ] 15.133685 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE2 ] 15.134874 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE2 ] 15.136216 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 15.138656 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254336 B (248 KB) [HOST] [EVE2 ] 15.140761 s: SYSTEM: Initializing Links !!! [HOST] [EVE2 ] 15.226438 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE2 ] 15.227414 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE3 ] 14.930641 s: ***** EVE Firmware build time 10:32:07 Sep 30 2018 [HOST] [EVE3 ] 14.932410 s: *** SYSTEM: CPU Frequency , [HOST] [EVE3 ] 14.935795 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE3 ] 14.937137 s: SYSTEM: IPC init in progress !!! [HOST] [EVE3 ] 14.938113 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE3 ] 15.007472 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE3 ] 15.017171 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE3 ] 15.027054 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE3 ] 15.057158 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE3 ] 15.077045 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE3 ] 15.127035 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [EVE3 ] 15.128103 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE3 ] 15.129445 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE3 ] 15.130818 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE3 ] 15.132129 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE3 ] 15.133502 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE3 ] 15.134874 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [EVE3 ] 15.136277 s: SYSTEM: Notify init done !!! [HOST] [EVE3 ] 15.138168 s: SYSTEM: MsgQ init done !!! [HOST] [EVE3 ] 15.139114 s: SYSTEM: IPC init DONE !!! [HOST] [EVE3 ] 15.152107 s: SYSTEM: System Common Init Done !!! [HOST] [EVE3 ] 15.153114 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE3 ] 15.154608 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE3 ] 15.155798 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE3 ] 15.157140 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 15.159366 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254336 B (248 KB) [HOST] [EVE3 ] 15.161501 s: SYSTEM: Initializing Links !!! [HOST] [EVE3 ] 15.245043 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE3 ] 15.246111 s: SYSTEM: System EVE Init Done !!! [HOST] [EVE4 ] 14.930641 s: ***** EVE Firmware build time 10:32:06 Sep 30 2018 [HOST] [EVE4 ] 14.932410 s: *** SYSTEM: CPU Frequency , [HOST] [EVE4 ] 14.935887 s: SYSTEM: System Common Init in progress !!! [HOST] [EVE4 ] 14.937259 s: SYSTEM: IPC init in progress !!! [HOST] [EVE4 ] 14.938205 s: SYSTEM: Attaching to [IPU2] ... [HOST] [EVE4 ] 15.027511 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [EVE4 ] 15.037119 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [EVE4 ] 15.047062 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [EVE4 ] 15.087140 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [EVE4 ] 15.107027 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [EVE4 ] 15.127035 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [EVE4 ] 15.128103 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [EVE4 ] 15.129445 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [EVE4 ] 15.130787 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [EVE4 ] 15.132129 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [EVE4 ] 15.133471 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [EVE4 ] 15.134844 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [EVE4 ] 15.136277 s: SYSTEM: Notify init done !!! [HOST] [EVE4 ] 15.138138 s: SYSTEM: MsgQ init done !!! [HOST] [EVE4 ] 15.139053 s: SYSTEM: IPC init DONE !!! [HOST] [EVE4 ] 15.152138 s: SYSTEM: System Common Init Done !!! [HOST] [EVE4 ] 15.153114 s: SYSTEM: System EVE Init in progress !!! [HOST] [EVE4 ] 15.154608 s: UTILS: DMA: HWI Create for INT8 !!! [HOST] [EVE4 ] 15.155798 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [EVE4 ] 15.157140 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 15.159397 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254336 B (248 KB) [HOST] [EVE4 ] 15.161501 s: SYSTEM: Initializing Links !!! [HOST] [EVE4 ] 15.245135 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [EVE4 ] 15.246172 s: SYSTEM: System EVE Init Done !!! [HOST] [IPU2 ] 14.855304 s: [HOST] [IPU2 ] EVE1 Image Load Completed [HOST] [IPU2 ] 14.875556 s: [HOST] [IPU2 ] EVE2 Image Load Completed [HOST] [IPU2 ] 14.895687 s: [HOST] [IPU2 ] EVE3 Image Load Completed [HOST] [IPU2 ] 14.915848 s: [HOST] [IPU2 ] EVE4 Image Load Completed [HOST] [IPU2 ] 14.915970 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 14.916031 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 14.916122 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 14.916183 s: [HOST] [IPU2 ] EVE MMU configuration completed [HOST] [IPU2 ] 14.916275 s: ***** IPU2 Firmware build time 10:36:07 Sep 30 2018 [HOST] [IPU2 ] 14.916427 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 14.919477 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 14.930763 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 14.930915 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 14.934087 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 14.947416 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [IPU2 ] 14.967425 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [IPU2 ] 14.987494 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [IPU2 ] 15.007472 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [IPU2 ] 15.027511 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [IPU2 ] 15.027633 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 15.027786 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST] [IPU2 ] 15.027908 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST] [IPU2 ] 15.028060 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST] [IPU2 ] 15.028182 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST] [IPU2 ] 15.028274 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST] [IPU2 ] 15.028396 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 15.030165 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 15.031110 s: RpmsgInit in progress... [HOST] [IPU2 ] 15.031171 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 15.031751 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 15.036905 s: SYSTEM: System Common Init Done !!! [HOST] [IPU2 ] 15.037027 s: SYSTEM: System Init in progress !!! [HOST] [IPU2 ] 15.037089 s: SYSTEM: BSP Common Init in progress !!! [HOST] [IPU2 ] 15.037150 s: SYSTEM: BSP Common Init Done !!! [HOST] [IPU2 ] 15.037211 s: SYSTEM: BSP Platform Init in progress !!! [HOST] [IPU2 ] 15.037302 s: SYSTEM: BSP Platform Init Done !!! [HOST] [IPU2 ] 15.037394 s: SYSTEM: FVID2 Init in progress !!! [HOST] [IPU2 ] 15.037516 s: SYSTEM: FVID2 Init Done !!! [HOST] [IPU2 ] 15.037577 s: SYSTEM: VPS Init in progress !!! [HOST] [IPU2 ] 15.037638 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] [HOST] [IPU2 ] 15.040749 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.040932 s: VPDMA Firmware Address = 0xa035c4c0 [HOST] [IPU2 ] 15.041023 s: VPDMA Load Address = 0x4897d004 [HOST] [IPU2 ] 15.041145 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.041206 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.041298 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.041633 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.041725 s: VPDMA Firmware Address = 0xa035c4c0 [HOST] [IPU2 ] 15.041816 s: VPDMA Load Address = 0x4899d004 [HOST] [IPU2 ] 15.041938 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.042030 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.042091 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.042426 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.042518 s: VPDMA Firmware Address = 0xa035c4c0 [HOST] [IPU2 ] 15.042609 s: VPDMA Load Address = 0x489bd004 [HOST] [IPU2 ] 15.042701 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.042792 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.042884 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.043219 s: *** VPDMA Firmware Loading... *** [HOST] [IPU2 ] 15.043311 s: VPDMA Firmware Address = 0xa035c4c0 [HOST] [IPU2 ] 15.043372 s: VPDMA Load Address = 0x489dd004 [HOST] [IPU2 ] 15.043494 s: VPDMA Firmware Version = 0x4d0001b8 [HOST] [IPU2 ] 15.043555 s: VPDMA List Busy Status = 0x00000000 [HOST] [IPU2 ] 15.043646 s: *** VPDMA Firmware Load Success *** [HOST] [IPU2 ] 15.103031 s: SYSTEM: VPS Init Done !!! [HOST] [IPU2 ] 15.103946 s: UTILS: DMA: HWI Create for INT25 !!! [HOST] [IPU2 ] 15.104190 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [IPU2 ] 15.104312 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253800 B (247 KB) [HOST] [IPU2 ] 15.104465 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 15.104617 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 346030080 B (330 MB), Free size = 346030080 B (330 MB) [HOST] [IPU2 ] 15.104831 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 861056 B (0 MB) [HOST] [IPU2 ] 15.104983 s: SYSTEM: Initializing Links !!! [HOST] [IPU2 ] 15.372262 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 15.445983 s: CHAINS: Application Started !!! [HOST] [HOST ] 104.860336 s: [HOST] [HOST ] [HOST] [HOST ] Sample Application Usecases, [HOST] [HOST ] --------------------------- [HOST] [HOST ] 1: Null Source -> Display (Supports only 1920x1080 HDMI display) [HOST] [HOST ] [HOST] [HOST ] x: Exit [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] 1 [HOST] [HOST ] 110.056030 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [HOST] [HOST ] 111.069846 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 111.069907 s: IPC_OUT_0 : Create Done !!! [HOST] [DSP1 ] 111.070029 s: IPC_IN_0 : Create in progress !!! [HOST] [DSP1 ] 111.070365 s: IPC_IN_0 : Create Done !!! [HOST] [DSP1 ] 111.070578 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [DSP1 ] 111.070700 s: ALG_FRAMECOPY: DMA: Allocated CH (TCC) = 0 (0) [HOST] [DSP1 ] 111.121149 s: ALGORITHM: Create Done (algId = 0) !!! [HOST] [DSP1 ] 111.121362 s: IPC_OUT_0 : Create in progress !!! [HOST] [DSP1 ] 111.121454 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 111.121698 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 111.122765 s: IPC_IN_0 : Create Done !!! [HOST] [IPU2 ] 111.123162 s: DISPLAY: Create in progress !!! [HOST] [IPU2 ] 111.123802 s: DISPLAY: Create Done !!! [HOST] [DSP1 ] 111.226895 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP1 ] 111.226956 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 111.226987 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 501296 B (489 KB) [HOST] [DSP2 ] 111.227200 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP2 ] 111.227261 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 111.227292 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516032 B (503 KB) [HOST] [EVE1 ] 111.227780 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE1 ] 111.228085 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE1 ] 111.228695 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [EVE2 ] 111.229762 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE2 ] 111.230067 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE2 ] 111.230616 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [EVE3 ] 111.231653 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 111.231958 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 111.232507 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [HOST ] 111.239919 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Chains Run-time Menu [HOST] [HOST ] ==================== [HOST] [HOST ] [HOST] [HOST ] 0: Stop Chain [HOST] [HOST ] [HOST] [HOST ] p: Print Performance Statistics [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [HOST ] 111.239949 s: [HOST] [HOST ] Unsupported option ' [HOST] [HOST ] '. Please try again [HOST] [HOST ] 111.239949 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Chains Run-time Menu [HOST] [HOST ] ==================== [HOST] [HOST ] [HOST] [HOST ] 0: Stop Chain [HOST] [HOST ] [HOST] [HOST ] p: Print Performance Statistics [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [EVE4 ] 111.233575 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 111.233880 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 111.234429 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [IPU2 ] 111.235252 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 111.235435 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248552 B (242 KB) [HOST] [IPU2 ] 111.235588 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 111.235740 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 346030080 B (330 MB), Free size = 322805760 B (307 MB) [HOST] [IPU2 ] 111.235954 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 111.236381 s: DISPLAY: Start in progress !!! [HOST] [IPU2 ] 111.236472 s: DISPLAY: Start Done !!! + +Hi, This is the known issue while running vision_sdk_load.sh And from the log i can see that your usecase has started without any issue. Regards, Anuj + diff --git a/data2/text/range/30001+/733266.txt b/data2/text/range/30001+/733266.txt new file mode 100644 index 0000000000000000000000000000000000000000..2d7acb53579ac4107aa7ca4cb6a732b35d9abaee --- /dev/null +++ b/data2/text/range/30001+/733266.txt @@ -0,0 +1,1731 @@ +Ticket Name: CCS/TDA2PXEVM: Custom cascade board usecase development + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: AWR1243, TDA2 Tool/software: Code Composer Studio Hi, I'm currently developing on the TDA2PXEVM with fusion application board and a custom cascade radar board with four AWR1243 chips. I am using CCS studio version 8.1.0.00011 and Vision SDK version 3.04. With some modifications to the radar chip control logic, I was able to run the camera radar capture display usecase with a single radar chip on my custom board and a D3 IMX390 camera. However, when I try to run the radar capture only usecase, I get an "i2c4 transfer to slave address 0x74 failed" error, and I can't run the cascade radar capture usecase because I don't have access to the TDA2xx processing board and cascade radar board required. Currently, I am creating a custom usecase for interfacing with the radar chips on my custom radar board, based on the existing radar capture only, camera radar capture display, cascade radar capture usecases. However, when I try to run this usecase, I get the i2c4 transfer error for the addresses of the 4 serializers, 0x74, 0x76, 0x78, and 0x7a. The custom radar board is set up the same way as for running the camera radar capture display usecase, except with the 4 radar chips connected instead of 1 radar and 1 camera. How do I need to modify my usecase code and/or the underlying configuration code in order for the SDK to recognize the 4 serializers and sensors on my custom board? Attached are the files for my custom usecase. radar_board_capture_only.zip Thanks, Richard + +Responses: +Hi Stanley, Attached is the output from the cascade object detect usecase with networking on the A15. print.txt [IPU1-0] 6059.331665 s: +[IPU1-0] 6059.331726 s: CPU [IPU1-0 ] Statistics, +[IPU1-0] 6059.331787 s: ************************* +[IPU1-0] 6059.331848 s: +[IPU1-0] 6059.331879 s: LOAD: CPU: 4.6% HWI: 0.5%, SWI:0.5%, Low Power: 92.4% +[IPU1-0] 6059.332031 s: +[IPU1-0] 6059.332153 s: LOAD: TSK: SYNC0 : 0.1% +[IPU1-0] 6059.332275 s: LOAD: TSK: STAT_COLL : 2.6% +[IPU1-0] 6059.332367 s: LOAD: TSK: MISC : 0.9% +[IPU1-0] 6059.332458 s: +[IPU1-0] 6059.332489 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.332580 s: +[IPU1-0] 6059.332611 s: SYSTEM: Sempahores Objects, 49 of 1050 free +[IPU1-0] 6059.332794 s: SYSTEM: Task Objects , 5 of 100 free +[IPU1-0] 6059.332916 s: SYSTEM: Clock Objects , 96 of 100 free +[IPU1-0] 6059.332977 s: SYSTEM: Hwi Objects , 86 of 100 free +[IPU1-0] 6059.333068 s: +[IPU1-0] 6059.333129 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 156560 B (152 KB) +[IPU1-0] 6059.333282 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 6059.333435 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88103000, Total size = 368037888 B (350 MB), Free size = 265179136 B (252 MB) +[IPU1-0] 6059.333587 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 128128 B (0 MB), Free size = 112000 B (0 MB) +[IPU1-0] 6059.333770 s: +[IPU1-0] 6059.333831 s: +[IPU1-0] 6059.333862 s: CPU [IPU1-1 ] Statistics, +[IPU1-0] 6059.333923 s: ************************* +[IPU1-0] 6059.333984 s: +[IPU1-0] 6059.334045 s: LOAD: CPU: 1.0% HWI: 0.6%, SWI:0.3%, Low Power: 92.5% +[IPU1-0] 6059.334167 s: +[IPU1-0] 6059.334289 s: LOAD: TSK: MISC : 0.1% +[IPU1-0] 6059.334350 s: +[IPU1-0] 6059.334411 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.334502 s: +[IPU1-0] 6059.334533 s: SYSTEM: Sempahores Objects, 440 of 1050 free +[IPU1-0] 6059.334624 s: SYSTEM: Task Objects , 38 of 100 free +[IPU1-0] 6059.334868 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 6059.334960 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 6059.335051 s: +[IPU1-0] 6059.335082 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 646208 B (631 KB) +[IPU1-0] 6059.335265 s: +[IPU1-0] 6059.335295 s: +[IPU1-0] 6059.335326 s: CPU [HOST ] Statistics, +[IPU1-0] 6059.335387 s: ************************* +[IPU1-0] 6059.335448 s: +[IPU1-0] 6059.335509 s: LOAD: CPU: 1.2% HWI: 0.0%, SWI:0.0%, Low Power: 98.0% +[IPU1-0] 6059.335661 s: +[IPU1-0] 6059.335783 s: LOAD: TSK: MISC : 1.2% +[IPU1-0] 6059.335844 s: +[IPU1-0] 6059.335905 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.335997 s: +[IPU1-0] 6059.336027 s: SYSTEM: Sempahores Objects, 439 of 1050 free +[IPU1-0] 6059.336119 s: SYSTEM: Task Objects , 37 of 100 free +[IPU1-0] 6059.336210 s: SYSTEM: Clock Objects , 98 of 100 free +[IPU1-0] 6059.336271 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 6059.336363 s: +[IPU1-0] 6059.336424 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6248128 B (6101 KB) +[IPU1-0] 6059.336576 s: +[IPU1-0] 6059.336607 s: +[IPU1-0] 6059.336668 s: CPU [DSP1 ] Statistics, +[IPU1-0] 6059.336759 s: ************************* +[IPU1-0] 6059.336820 s: +[IPU1-0] 6059.336851 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 99.3% +[IPU1-0] 6059.337003 s: +[IPU1-0] 6059.337034 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 6059.337125 s: +[IPU1-0] 6059.337156 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.337247 s: +[IPU1-0] 6059.337308 s: SYSTEM: Sempahores Objects, 453 of 1050 free +[IPU1-0] 6059.337369 s: SYSTEM: Task Objects , 91 of 100 free +[IPU1-0] 6059.337461 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 6059.337552 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 6059.337674 s: +[IPU1-0] 6059.337705 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 148928 B (145 KB) +[IPU1-0] 6059.337888 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 492272 B (480 KB) +[IPU1-0] 6059.338040 s: +[IPU1-0] 6059.338071 s: +[IPU1-0] 6059.338101 s: CPU [DSP2 ] Statistics, +[IPU1-0] 6059.338162 s: ************************* +[IPU1-0] 6059.338223 s: +[IPU1-0] 6059.338284 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 99.3% +[IPU1-0] 6059.338406 s: +[IPU1-0] 6059.338467 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 6059.338559 s: +[IPU1-0] 6059.338589 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.338711 s: +[IPU1-0] 6059.338742 s: SYSTEM: Sempahores Objects, 454 of 1050 free +[IPU1-0] 6059.338833 s: SYSTEM: Task Objects , 91 of 100 free +[IPU1-0] 6059.338925 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 6059.339016 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 6059.339108 s: +[IPU1-0] 6059.339138 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 6059.339291 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 517352 B (505 KB) +[IPU1-0] 6059.339443 s: +[IPU1-0] 6059.339504 s: +[IPU1-0] 6059.339535 s: CPU [EVE1 ] Statistics, +[IPU1-0] 6059.339596 s: ************************* +[IPU1-0] 6059.339809 s: +[IPU1-0] 6059.339870 s: LOAD: CPU: 0.4% HWI: 0.2%, SWI:0.1%, Low Power: 94.5% +[IPU1-0] 6059.340023 s: +[IPU1-0] 6059.340053 s: LOAD: TSK: MISC : 0.1% +[IPU1-0] 6059.340145 s: +[IPU1-0] 6059.340175 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.340267 s: +[IPU1-0] 6059.340328 s: SYSTEM: Sempahores Objects, 455 of 1050 free +[IPU1-0] 6059.340389 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 6059.340480 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 6059.340572 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 6059.340694 s: +[IPU1-0] 6059.340755 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 18304 B (17 KB) +[IPU1-0] 6059.340907 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254792 B (248 KB) +[IPU1-0] 6059.341060 s: +[IPU1-0] 6059.341090 s: +[IPU1-0] 6059.341151 s: CPU [EVE2 ] Statistics, +[IPU1-0] 6059.341212 s: ************************* +[IPU1-0] 6059.341273 s: +[IPU1-0] 6059.341304 s: LOAD: CPU: 0.4% HWI: 0.2%, SWI:0.1%, Low Power: 94.5% +[IPU1-0] 6059.341456 s: +[IPU1-0] 6059.341487 s: LOAD: TSK: MISC : 0.1% +[IPU1-0] 6059.341578 s: +[IPU1-0] 6059.341609 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 6059.341731 s: +[IPU1-0] 6059.341792 s: SYSTEM: Sempahores Objects, 455 of 1050 free +[IPU1-0] 6059.341853 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 6059.341944 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 6059.342036 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 6059.342127 s: +[IPU1-0] 6059.342158 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 18304 B (17 KB) +[IPU1-0] 6059.342310 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254792 B (248 KB) +[IPU1-0] 6059.342493 s: +[IPU1-0] 6059.342768 s: +[IPU1-0] 6059.342829 s: UTILS_PRCM_STATS: Current Temperature, +[IPU1-0] 6059.342890 s: +[IPU1-0] 6059.342951 s: Voltage Rail || Curr Temp Min - Max +[IPU1-0] 6059.343012 s: --------------------------------------------------------- +[IPU1-0] 6059.343103 s: PMHAL_PRCM_VD_MPU || [41.600 , 42. 0] +[IPU1-0] 6059.343225 s: PMHAL_PRCM_VD_CORE || [40.400 , 40.800] +[IPU1-0] 6059.343317 s: PMHAL_PRCM_VD_IVAHD || [42. 0 , 42.400] +[IPU1-0] 6059.343439 s: PMHAL_PRCM_VD_DSPEVE || [38.400 , 38.800] +[IPU1-0] 6059.343530 s: PMHAL_PRCM_VD_GPU || [40. 0 , 40.400] +[IPU1-0] 6059.343683 s: +[IPU1-0] 6059.343713 s: ============================================================================ +[IPU1-0] 6059.343805 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) +[IPU1-0] 6059.343896 s: ---------------------------------------------------------------------------- +[IPU1-0] 6059.345482 s: UTILS_PRCM_STATS: Reading the regulator data failed +[IPU1-0] 6059.345574 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! +[IPU1-0] 6059.345818 s: +[IPU1-0] 6059.345879 s: Statistics Collector, +[IPU1-0] 6059.345940 s: +[IPU1-0] 6059.345970 s: STATISTIC Avg Data Peak Data +[IPU1-0] 6059.346062 s: COLLECTOR MB/s MB/s +[IPU1-0] 6059.346123 s: -------------------------------------------------- +[IPU1-0] 6059.346214 s: SCI_EMIF1 RD+WR | 22.967652 50.239104 +[IPU1-0] 6059.346336 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 +[IPU1-0] 6059.346428 s: SCI_EMIF1 RD ONLY | 13.864876 31.085165 +[IPU1-0] 6059.346519 s: SCI_EMIF1 WR ONLY | 9.108072 19.192323 +[IPU1-0] 6059.346672 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 +[IPU1-0] 6059.346763 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 +[IPU1-0] 6059.346885 s: SCI_MA_MPU_P1 | 0.014537 0.166333 +[IPU1-0] 6059.346977 s: SCI_MA_MPU_P2 | 0.000000 0.000000 +[IPU1-0] 6059.347068 s: SCI_DSS | 0.000000 0.000000 +[IPU1-0] 6059.347190 s: SCI_IPU1 | 4.452944 11.108285 +[IPU1-0] 6059.347282 s: SCI_VIP1_P1 | 0.000000 0.000000 +[IPU1-0] 6059.347373 s: SCI_VIP1_P2 | 0.000000 0.000000 +[IPU1-0] 6059.347495 s: SCI_VPE_P1 | 0.000000 0.000000 +[IPU1-0] 6059.347587 s: SCI_VPE_P2 | 0.000000 0.000000 +[IPU1-0] 6059.347709 s: SCI_DSP1_MDMA | 0.098532 0.850667 +[IPU1-0] 6059.347831 s: SCI_DSP1_EDMA | 0.000000 0.000000 +[IPU1-0] 6059.347922 s: SCI_DSP2_MDMA | 0.089791 1.018503 +[IPU1-0] 6059.348044 s: SCI_DSP2_EDMA | 0.000000 0.000000 +[IPU1-0] 6059.348136 s: SCI_EVE1_TC0 | 2.712402 7.309076 +[IPU1-0] 6059.348227 s: SCI_EVE1_TC1 | 0.000000 0.000000 +[IPU1-0] 6059.348349 s: SCI_EVE2_TC0 | 2.713741 7.421031 +[IPU1-0] 6059.348441 s: SCI_EVE2_TC1 | 0.000000 0.000000 +[IPU1-0] 6059.348532 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 +[IPU1-0] 6059.348654 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 +[IPU1-0] 6059.348776 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 +[IPU1-0] 6059.348868 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 +[IPU1-0] 6059.348990 s: SCI_VIP2_P1 | 0.000000 0.000000 +[IPU1-0] 6059.349081 s: SCI_VIP2_P2 | 0.000000 0.000000 +[IPU1-0] 6059.349173 s: SCI_IVA | 0.000000 0.000000 +[IPU1-0] 6059.349356 s: SCI_GPU_P1 | 0.000000 0.000000 +[IPU1-0] 6059.349447 s: SCI_GPU_P2 | 0.000000 0.000000 +[IPU1-0] 6059.349569 s: SCI_GMAC_SW | 0.000444 0.086365 +[IPU1-0] 6059.349844 s: SCI_OCMC_RAM1 | 0.000000 0.000000 +[IPU1-0] 6059.349935 s: SCI_OCMC_RAM2 | 0.000000 0.000000 +[IPU1-0] 6059.350057 s: SCI_OCMC_RAM3 | 0.000000 0.000000 +[IPU1-0] 6059.350149 s: SCI_ISS_RT | 0.000000 0.000000 +[IPU1-0] 6059.350240 s: SCI_ISS_NRT1 | 0.000000 0.000000 +[IPU1-0] 6059.350362 s: SCI_ISS_NRT2 | 0.000000 0.000000 +[IPU1-0] 6059.350454 s: SCI_CAL | 0.000000 0.000000 +[IPU1-0] 6059.450649 s: +[IPU1-0] 6059.450741 s: +[IPU1-0] 6059.450832 s: +[IPU1-0] 6059.450863 s: ### CPU [IPU1-0], LinkID [ 70], +[IPU1-0] 6059.450954 s: +[IPU1-0] 6059.450985 s: [ CAPTURE ] Link Statistics, +[IPU1-0] 6059.451076 s: ****************************** +[IPU1-0] 6059.451137 s: +[IPU1-0] 6059.451168 s: Elapsed time = 5252477 msec +[IPU1-0] 6059.451229 s: +[IPU1-0] 6059.451259 s: +[IPU1-0] 6059.451320 s: Input Statistics, +[IPU1-0] 6059.451381 s: +[IPU1-0] 6059.451412 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.451473 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.451564 s: -------------------------------------------------- +[IPU1-0] 6059.451656 s: +[IPU1-0] 6059.451717 s: Output Statistics, +[IPU1-0] 6059.451747 s: +[IPU1-0] 6059.451808 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.451869 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.451961 s: --------------------------------------------- +[IPU1-0] 6059.452022 s: +[IPU1-0] 6059.452083 s: [ CAPTURE ] LATENCY, +[IPU1-0] 6059.452113 s: ******************** +[IPU1-0] 6059.452174 s: +[IPU1-0] 6059.452235 s: CPU [ IPU1-0], LinkID [ 43], Link Statistics not available ! +[IPU1-0] 6059.452388 s: +[IPU1-0] 6059.452418 s: ### CPU [IPU1-0], LinkID [ 52], +[IPU1-0] 6059.452510 s: +[IPU1-0] 6059.452540 s: [ ti.radar.fft ] Link Statistics, +[IPU1-0] 6059.452601 s: ****************************** +[IPU1-0] 6059.452693 s: +[IPU1-0] 6059.452723 s: Elapsed time = 5251659 msec +[IPU1-0] 6059.452815 s: +[IPU1-0] 6059.452845 s: +[IPU1-0] 6059.452876 s: Input Statistics, +[IPU1-0] 6059.452937 s: +[IPU1-0] 6059.453028 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.453120 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.453181 s: -------------------------------------------------- +[IPU1-0] 6059.453272 s: +[IPU1-0] 6059.453303 s: Output Statistics, +[IPU1-0] 6059.453364 s: +[IPU1-0] 6059.453394 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.453455 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.453547 s: --------------------------------------------- +[IPU1-0] 6059.453608 s: +[IPU1-0] 6059.453669 s: [ ti.radar.fft ] LATENCY, +[IPU1-0] 6059.453760 s: ******************** +[IPU1-0] 6059.453791 s: +[IPU1-0] 6059.453913 s: +[IPU1-0] 6059.453943 s: ### CPU [IPU1-0], LinkID [ 51], +[IPU1-0] 6059.454035 s: +[IPU1-0] 6059.454065 s: [ ti.radar.fft ] Link Statistics, +[IPU1-0] 6059.454126 s: ****************************** +[IPU1-0] 6059.454187 s: +[IPU1-0] 6059.454218 s: Elapsed time = 5250842 msec +[IPU1-0] 6059.454309 s: +[IPU1-0] 6059.454340 s: +[IPU1-0] 6059.454370 s: Input Statistics, +[IPU1-0] 6059.454431 s: +[IPU1-0] 6059.454462 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.454553 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.454797 s: -------------------------------------------------- +[IPU1-0] 6059.454889 s: +[IPU1-0] 6059.454919 s: Output Statistics, +[IPU1-0] 6059.454980 s: +[IPU1-0] 6059.455011 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.455072 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.455163 s: --------------------------------------------- +[IPU1-0] 6059.455224 s: +[IPU1-0] 6059.455285 s: [ ti.radar.fft ] LATENCY, +[IPU1-0] 6059.455346 s: ******************** +[IPU1-0] 6059.455377 s: +[IPU1-0] 6059.455499 s: +[IPU1-0] 6059.455529 s: ### CPU [IPU1-0], LinkID [ 50], +[IPU1-0] 6059.455621 s: +[IPU1-0] 6059.455682 s: [ ti.radar.fft ] Link Statistics, +[IPU1-0] 6059.455743 s: ****************************** +[IPU1-0] 6059.455804 s: +[IPU1-0] 6059.455865 s: Elapsed time = 5250026 msec +[IPU1-0] 6059.455926 s: +[IPU1-0] 6059.455956 s: +[IPU1-0] 6059.456017 s: Input Statistics, +[IPU1-0] 6059.456048 s: +[IPU1-0] 6059.456109 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.456170 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.456261 s: -------------------------------------------------- +[IPU1-0] 6059.456322 s: +[IPU1-0] 6059.456383 s: Output Statistics, +[IPU1-0] 6059.456414 s: +[IPU1-0] 6059.456475 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.456536 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.456597 s: --------------------------------------------- +[IPU1-0] 6059.456719 s: +[IPU1-0] 6059.456749 s: [ ti.radar.fft ] LATENCY, +[IPU1-0] 6059.456810 s: ******************** +[IPU1-0] 6059.456871 s: +[IPU1-0] 6059.456963 s: +[IPU1-0] 6059.457024 s: ### CPU [IPU1-0], LinkID [ 49], +[IPU1-0] 6059.457085 s: +[IPU1-0] 6059.457115 s: [ ti.radar.fft ] Link Statistics, +[IPU1-0] 6059.457207 s: ****************************** +[IPU1-0] 6059.457268 s: +[IPU1-0] 6059.457298 s: Elapsed time = 5249211 msec +[IPU1-0] 6059.457359 s: +[IPU1-0] 6059.457420 s: +[IPU1-0] 6059.457451 s: Input Statistics, +[IPU1-0] 6059.457512 s: +[IPU1-0] 6059.457542 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.457603 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.457725 s: -------------------------------------------------- +[IPU1-0] 6059.457786 s: +[IPU1-0] 6059.457847 s: Output Statistics, +[IPU1-0] 6059.457939 s: +[IPU1-0] 6059.458000 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.458061 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.458122 s: --------------------------------------------- +[IPU1-0] 6059.458213 s: +[IPU1-0] 6059.458244 s: [ ti.radar.fft ] LATENCY, +[IPU1-0] 6059.458335 s: ******************** +[IPU1-0] 6059.458366 s: +[IPU1-0] 6059.458427 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! +[IPU1-0] 6059.458579 s: +[IPU1-0] 6059.458610 s: ### CPU [IPU1-0], LinkID [ 34], +[IPU1-0] 6059.458732 s: +[IPU1-0] 6059.458762 s: [ SYNC_0 ] Link Statistics, +[IPU1-0] 6059.458823 s: ****************************** +[IPU1-0] 6059.458884 s: +[IPU1-0] 6059.458945 s: Elapsed time = 5248489 msec +[IPU1-0] 6059.459006 s: +[IPU1-0] 6059.459037 s: New data Recv = 30.30 fps +[IPU1-0] 6059.459128 s: Driver/Notify Cb = 30.30 fps +[IPU1-0] 6059.459189 s: +[IPU1-0] 6059.459250 s: Input Statistics, +[IPU1-0] 6059.459281 s: +[IPU1-0] 6059.459342 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.459403 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.459494 s: -------------------------------------------------- +[IPU1-0] 6059.459555 s: +[IPU1-0] 6059.459616 s: Output Statistics, +[IPU1-0] 6059.459830 s: +[IPU1-0] 6059.459860 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.459952 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.460013 s: --------------------------------------------- +[IPU1-0] 6059.460104 s: +[IPU1-0] 6059.460135 s: [ SYNC_0 ] LATENCY, +[IPU1-0] 6059.460196 s: ******************** +[IPU1-0] 6059.460257 s: +[IPU1-0] 6059.460348 s: +[IPU1-0] 6059.460409 s: ### CPU [IPU1-0], LinkID [ 0], +[IPU1-0] 6059.460470 s: +[IPU1-0] 6059.460531 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 6059.460592 s: ****************************** +[IPU1-0] 6059.460684 s: +[IPU1-0] 6059.460714 s: Elapsed time = 5249212 msec +[IPU1-0] 6059.460806 s: +[IPU1-0] 6059.460836 s: Driver/Notify Cb = 33.32 fps +[IPU1-0] 6059.460897 s: +[IPU1-0] 6059.460958 s: Input Statistics, +[IPU1-0] 6059.460989 s: +[IPU1-0] 6059.461050 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.461111 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.461202 s: -------------------------------------------------- +[IPU1-0] 6059.461263 s: +[IPU1-0] 6059.461324 s: Output Statistics, +[IPU1-0] 6059.461355 s: +[IPU1-0] 6059.461416 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.461477 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.461568 s: --------------------------------------------- +[IPU1-0] 6059.461660 s: +[IPU1-0] 6059.461690 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 6059.461751 s: ******************** +[IPU1-0] 6059.461812 s: +[IPU1-0] 6059.961751 s: +[IPU1-0] 6059.961812 s: ### CPU [ DSP1], LinkID [ 10], +[IPU1-0] 6059.961873 s: +[IPU1-0] 6059.961934 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 6059.961995 s: ****************************** +[IPU1-0] 6059.962056 s: +[IPU1-0] 6059.962087 s: Elapsed time = 5249712 msec +[IPU1-0] 6059.962178 s: +[IPU1-0] 6059.962270 s: Driver/Notify Cb = 33.32 fps +[IPU1-0] 6059.962361 s: +[IPU1-0] 6059.962392 s: Input Statistics, +[IPU1-0] 6059.962453 s: +[IPU1-0] 6059.962483 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.962544 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.962636 s: -------------------------------------------------- +[IPU1-0] 6059.962758 s: +[IPU1-0] 6059.962788 s: Output Statistics, +[IPU1-0] 6059.962849 s: +[IPU1-0] 6059.962880 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.962941 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.963033 s: --------------------------------------------- +[IPU1-0] 6059.963094 s: +[IPU1-0] 6059.963155 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 6059.963216 s: ******************** +[IPU1-0] 6059.963277 s: +[IPU1-0] 6059.963368 s: +[IPU1-0] 6059.963399 s: ### CPU [ DSP1], LinkID [ 49], +[IPU1-0] 6059.963490 s: +[IPU1-0] 6059.963521 s: [ ti.radar.dspprocess ] Link Statistics, +[IPU1-0] 6059.963612 s: ****************************** +[IPU1-0] 6059.963673 s: +[IPU1-0] 6059.963734 s: Elapsed time = 5249680 msec +[IPU1-0] 6059.963795 s: +[IPU1-0] 6059.963826 s: +[IPU1-0] 6059.963887 s: Input Statistics, +[IPU1-0] 6059.963917 s: +[IPU1-0] 6059.963978 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.964039 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.964131 s: -------------------------------------------------- +[IPU1-0] 6059.964192 s: +[IPU1-0] 6059.964222 s: Output Statistics, +[IPU1-0] 6059.964283 s: +[IPU1-0] 6059.964344 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.964405 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.964466 s: --------------------------------------------- +[IPU1-0] 6059.964558 s: +[IPU1-0] 6059.964588 s: [ ti.radar.dspprocess ] LATENCY, +[IPU1-0] 6059.964832 s: ******************** +[IPU1-0] 6059.964893 s: +[IPU1-0] 6059.964985 s: +[IPU1-0] 6059.965046 s: ### CPU [ DSP1], LinkID [ 0], +[IPU1-0] 6059.965107 s: +[IPU1-0] 6059.965168 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 6059.965229 s: ****************************** +[IPU1-0] 6059.965290 s: +[IPU1-0] 6059.965320 s: Elapsed time = 5249681 msec +[IPU1-0] 6059.965381 s: +[IPU1-0] 6059.965442 s: Driver/Notify Cb = 33.32 fps +[IPU1-0] 6059.965503 s: +[IPU1-0] 6059.965564 s: Input Statistics, +[IPU1-0] 6059.965595 s: +[IPU1-0] 6059.965656 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6059.965747 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6059.965839 s: -------------------------------------------------- +[IPU1-0] 6059.965900 s: +[IPU1-0] 6059.965961 s: Output Statistics, +[IPU1-0] 6059.965991 s: +[IPU1-0] 6059.966052 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6059.966113 s: | ID | FPS | FPS | FPS +[IPU1-0] 6059.966174 s: --------------------------------------------- +[IPU1-0] 6059.966266 s: +[IPU1-0] 6059.966296 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 6059.966357 s: ******************** +[IPU1-0] 6059.966418 s: +[IPU1-0] 6060.465747 s: +[IPU1-0] 6060.465808 s: ### CPU [ HOST], LinkID [ 10], +[IPU1-0] 6060.465900 s: +[IPU1-0] 6060.465930 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 6060.466022 s: ****************************** +[IPU1-0] 6060.466083 s: +[IPU1-0] 6060.466113 s: Elapsed time = 5250181 msec +[IPU1-0] 6060.466174 s: +[IPU1-0] 6060.466235 s: Driver/Notify Cb = 33.32 fps +[IPU1-0] 6060.466296 s: +[IPU1-0] 6060.466327 s: Input Statistics, +[IPU1-0] 6060.466388 s: +[IPU1-0] 6060.466418 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6060.466510 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6060.466571 s: -------------------------------------------------- +[IPU1-0] 6060.466693 s: +[IPU1-0] 6060.466723 s: Output Statistics, +[IPU1-0] 6060.466784 s: +[IPU1-0] 6060.466815 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6060.466906 s: | ID | FPS | FPS | FPS +[IPU1-0] 6060.466967 s: --------------------------------------------- +[IPU1-0] 6060.467059 s: +[IPU1-0] 6060.467089 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 6060.467150 s: ******************** +[IPU1-0] 6060.467211 s: +[IPU1-0] 6060.467303 s: +[IPU1-0] 6060.467364 s: ### CPU [ HOST], LinkID [ 63], +[IPU1-0] 6060.467425 s: +[IPU1-0] 6060.467455 s: [ NETWORK TX ] Link Statistics, +[IPU1-0] 6060.467547 s: ****************************** +[IPU1-0] 6060.467608 s: +[IPU1-0] 6060.467638 s: Elapsed time = 5250183 msec +[IPU1-0] 6060.467730 s: +[IPU1-0] 6060.467791 s: +[IPU1-0] 6060.467821 s: Input Statistics, +[IPU1-0] 6060.467882 s: +[IPU1-0] 6060.467913 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 6060.467974 s: | FPS | FPS | FPS | FPS +[IPU1-0] 6060.468065 s: -------------------------------------------------- +[IPU1-0] 6060.468126 s: +[IPU1-0] 6060.468187 s: Output Statistics, +[IPU1-0] 6060.468218 s: +[IPU1-0] 6060.468279 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 6060.468340 s: | ID | FPS | FPS | FPS +[IPU1-0] 6060.468401 s: --------------------------------------------- +[IPU1-0] 6060.468492 s: +[IPU1-0] 6060.468523 s: [ NETWORK TX ] LATENCY, +[IPU1-0] 6060.468584 s: ******************** +[IPU1-0] 6060.468645 s: +[IPU1-0] 6060.968706 s: Thanks, Richard + +Hi Richard, The use case doesn't look like it is working. If it is working, you should see frame rate printed. Can you connect the JTAG debugger to the EVM to check if you are getting data from radar? Regards, Stanley + +Hi Stanley, I now have the cascade object detect usecase running after loading from CCS via the JTAG debugger (networking on IPU1_1). How can I check whether I am getting radar data back? Thanks, Richard + +Hi Richard, issCaptDrvCallback() function will be called every time a frame captured by the driver. You can set a breakpoint at this function to see if it is getting hit constantly. Regards, Stanley + +Hi Stanley, I set breakpoints at issCaptDrvCallback() and IssCaptureLink_drvSetDrvCfg(), and neither of them are called when I run the cascade object detect usecase. However, both of them are called multiple times when I run the single radar object detect usecase, which also displays the real-time radar data. Might I need to use the IssCapture link instead of the out-of-the-box Capture link on the cascade object detect usecase? On a related note, through a combination of looking at the serial output and probing the I2C-SPI bridges to the AWR1243 chips, I've noticed that in the cascade object detect usecase, firmware is only downloaded to the master AWR1243 and slave 1. Is this normal, or should there be separate firmware downloads to slaves 2 and 3 as well? Attached is the serial output from running the cascade object detect usecase for reference. cascade serial 2.txt [IPU1-0] 2230.572439 s: CHAINS: UB960 is configured for 2Gbps Mode +[IPU1-0] 2230.572622 s: Using gUb960Cfg_D3AR1243 and gUB953SerCfg +[IPU1-0] 2230.572713 s: Using AR12xx +[IPU1-0] 2230.572988 s: Detected UB960 !!! +[IPU1-0] 2235.627279 s: Port 0 done +[IPU1-0] 2235.684468 s: AR12XX: ES2.0 Device detected!! +[IPU1-0] 2235.684590 s: AR12XX: Firmware Download Started : Ftype: MSS_BUILD +[IPU1-0] 2300.551180 s: AR12XX: Firmware Download Successful : Ftype: MSS_BUILD +[IPU1-0] 2300.551332 s: AR12XX: Firmware Download Started : Ftype: BSS_BUILD +[IPU1-0] 2430.293570 s: AR12XX: Firmware Download Successful : Ftype: BSS_BUILD +[IPU1-0] 2430.293692 s: AR12XX: Firmware Download Started : Ftype: CONFIG_INFO +[IPU1-0] 2430.390563 s: AR12XX: Firmware Download Successful : Ftype: CONFIG_INFO +[IPU1-0] 2430.602574 s: AR12XX: ES2.0 Device detected!! +[IPU1-0] 2430.716616 s: AWR12XX: Version Master : 1.10.0.23 +[IPU1-0] 2430.716708 s: AWR12XX: Version RF:2.0.0.15 +[IPU1-0] 2430.716830 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 2430.716921 s: AWR12XX: Version Master Patch[dd.mm.yy]:78.224.4 +[IPU1-0] 2430.717043 s: AWR12XX: Version RF Patch[dd.mm.yy]:0.0.0 +[IPU1-0] 2430.760568 s: CHAINS: Config AR12xx ... +[IPU1-0] 2430.760629 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 2431.150613 s: AWR12XX: RF Boot Status = 0xb +[IPU1-0] 2431.150704 s: AWR12XX: RF Boot Time = 4486 us +[IPU1-0] 2431.821661 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 2431.875983 s: ISSCAPTURE: Create in progress !!! +[IPU1-0] 2463.623863 s: ISSCAPTURE: Create Done !!! +[IPU1-0] 2463.624717 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 2463.625053 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 2463.625236 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 2463.625663 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 2463.625968 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 2465.146800 s: ALG: ti.radar.fft: CH0 BUF0: 0x88914000 ( 2097152 B ) +[DSP1 ] 2465.151375 s: ALG: ti.radar.fft: CH0 BUF1: 0x88b14200 ( 2097152 B ) +[DSP1 ] 2465.151436 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 2465.151680 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 2465.200786 s: ALG: ti.radar.pkDetect: CH0 BUF0: 0x8901ac00 ( 6340616 B ) +[DSP1 ] 2465.213810 s: ALG: ti.radar.pkDetect: CH0 BUF1: 0x89626e00 ( 6340616 B ) +[DSP1 ] 2465.213871 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 2465.214115 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 2465.218294 s: ALG: ti.radar.beamForm: CH0 BUF0: 0x89c35800 ( 16392 B ) +[DSP1 ] 2465.218568 s: ALG: ti.radar.beamForm: CH0 BUF1: 0x89c39a00 ( 16392 B ) +[DSP1 ] 2465.218629 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 2465.218812 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 2465.236106 s: UTILS: DMA: Allocated CH (TCC) = 24 (24) +[DSP1 ] 2465.236137 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 24 (0x43305200) +[DSP1 ] 2465.256359 s: ALG: ti.radar.draw: CH0 BUF0: 0x8a426c00 ( 4147200 B ) +[DSP1 ] 2465.264991 s: ALG: ti.radar.draw: CH0 BUF1: 0x8a81b400 ( 4147200 B ) +[DSP1 ] 2465.273622 s: ALG: ti.radar.draw: CH0 BUF2: 0x8ac0fc00 ( 4147200 B ) +[DSP1 ] 2465.273683 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 2465.273897 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 2465.273988 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 2466.955194 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP1 ] 2466.955224 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 2466.955285 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 428768 B (418 KB) +[DSP2 ] 2466.955712 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP2 ] 2466.955743 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 2466.955804 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 517352 B (505 KB) +[EVE1 ] 2466.956444 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE1 ] 2466.956749 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 10432 B (10 KB) +[EVE1 ] 2466.957298 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254192 B (248 KB) +[EVE2 ] 2466.958793 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE2 ] 2466.959098 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 2466.959647 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 255176 B (249 KB) +[IPU1-0] 2465.274141 s: IPC_IN_0 : Create in progress !!! +[IPU1-0] 2465.275178 s: IPC_IN_0 : Create Done !!! +[IPU1-0] 2465.275757 s: DISPLAY: Create in progress !!! +[IPU1-0] 2465.276215 s: DISPLAY: Create Done !!! +[IPU1-0] 2465.276367 s: GRPXSRC: Create in progress !!! +[IPU1-0] 2466.951900 s: GRPXSRC: Create Done !!! +[IPU1-0] 2466.952327 s: DISPLAY: Create in progress !!! +[IPU1-0] 2466.952845 s: DISPLAY: Create Done !!! +[IPU1-0] 2466.953059 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 +[IPU1-0] 2466.953181 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 249144 B (243 KB) +[IPU1-0] 2466.953333 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 2466.953547 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88103000, Total size = 368037888 B (350 MB), Free size = 314602496 B (300 MB) +[IPU1-0] 2466.953730 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 128128 B (0 MB), Free size = 112000 B (0 MB) +[IPU1-0] 2466.960409 s: DISPLAY: Start in progress !!! +[IPU1-0] 2466.960531 s: DISPLAY: Start Done !!! +[IPU1-0] 2466.961904 s: *** UTILS: CPU KHz = 20000 Khz *** +[IPU1-0] 2466.971817 s: DISPLAY: Start in progress !!! +[IPU1-0] 2466.971878 s: DISPLAY: Start Done !!! +[IPU1-0] 2466.972610 s: ISSCAPTURE: Start in progress !!! +[IPU1-0] 2466.972762 s: ISSCAPTURE: Start Done !!! +[IPU1-0] 2466.972854 s: CHAINS: AR12xx Starting Radar Sensor ... +[IPU1-0] 2467.043494 s: CHAINS: AR12xx Starting Radar Sensor ... DONE !!! +[IPU1-1] 2466.954401 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-1] 2466.954584 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 622968 B (608 KB) +[HOST ] 2466.954980 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[HOST ] 2466.955011 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6279920 B (6132 KB) +[IPU1-0] 2483.166381 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Chains Run-time Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 0: Stop Chain +[IPU1-0] +[IPU1-0] c: Read-back and Check AR params +[IPU1-0] +[IPU1-0] d: Dynamically change params +[IPU1-0] +[IPU1-0] p: Print Performance Statistics +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] Thanks, Richard + +Hi Richard, When data comes to TDA2P thru CSI2 port, you have to use IssCapture Link. If the data comes to TDA2P thru VIP ports, you have to use Capture Link. On your board, I think you connect the Radar via FPD-Link to UB960 and UB960 connects to CSI2 port. On TI Cascade Radar EVM, the radar data goes to FPGAs and FPGAs connect to VIP ports. Please make sure you use IssCapture Link in your use case. The firmware should be downloaded to all 4 radars. I think the traces only show once for all slaves. Can you share your source file for cascade radar use case so I can review it? Regards, Stanley + +Hi Stanley, I have modified the use case to use the IssCapture Link. When I run it, I get a new error: I probed the I2C-SPI bridges again and the firmware is downloaded to all 4 radars. Attached are my source files for the cascade use case. cascade_radar_object_detect.zip Thanks, Richard + +Hi Richard, I don't see anything obviously wrong from the configuration in the source file. Could you build "debug" version by using "gmake -s -j PROFILE=debug depend && gmake -s -j PROFILE=debug"? With the debug build, you can step thru the code in CCS to see what causes the assertion. The assertion is in the vcoreCaptAllocCalRes() under ~/ti_components/drivers/pdk_xx_xx_xx_xx/packages/ti/drv/vps/src/vpslib/calcore/src/vpscore_calapi.c. You can set a breakpoint at that function and step thru it. Regards, Stanley + +Hi Stanley, I stepped through vcoreCaptAllocCalRes() and found that when Irm_allocResource() returns 4, the if "FVID2_SOK == rtnVal" check fails and the program drops down into the else block, where vcoreCaptDeAllocCalRes() also returns 4, causing the GT_assert() to fail. I'm not sure what to make of this return value? Thanks, Richard + +Hi Stanley, I realized stepping through the release build wasn't working correctly so I rebuilt the SDK in debug mode and traced through again. Now I can see that in vcoreCaptAllocCalRes(), the for loop executes 5 times, and on the 5th iteration, Irm_allocResource() returns -2 instead of 0, which causes the assertion error. Is it possible that the for loop is simply executing one too many times, since there should only be 4 streams of radar data and not 5? Thanks, Richard + +Hi Richard, Could you double check, in the use case chains_cascadeRadarOd_SetAppPrms(),if pObj->ar12xxCfg.fusionEnabled is equal to 0? If not, you need to set it to 0. If it is 0, check if numRadars is 4? Regards, Stanley + +Hi Stanley, After setting pObj->ar12xxCfg.fusionEnabled to 0 and verifying that numRadars is 4, the for loop now only executes 4 times and the use case gets to the runtime menu. However, now neither the Matlab script nor the Network_Rx tool are able to connect, because the board is no longer getting an IP address? Thanks, Richard + +Richard, From the run-time menu, could you type 'p' option and share the log? You can check the output frame rate of IssCapture Link. Please make sure the network stack is running on IPU1_1. If you have the debugger connected in CCS, you should see some log from CCS console showing MAC address and DHCP service status. Regards, Stanley + +Hi Stanley, I have resolved the IP address problem, by connecting the PC and EVM to a dedicated network router. I have set the network stack to run on IPU1_1. However, now I am facing a new i2c error, one I haven't run into before: "Bus busy detected recover I2C bus !!!" This error occurs when I try to run the cascade use case, in addition to the "Failed to probe sensor" and 'Radar Device Power On Failed" errors that I have seen before, on the initial bring-up of the use case. Attached is the full serial log for reference. bus busy.txt [IPU1-0] 34.649515 s: CHAINS: UB960 is configured for 2Gbps Mode +[IPU1-0] 34.649759 s: Using gUb960Cfg_D3AR1243 and gUB953SerCfg +[IPU1-0] 34.649850 s: Using AR12xx +[IPU1-0] 34.650186 s: Detected UB960 !!! +[IPU1-0] 37.612304 s: src/bsputils_ub960.c @ Line 1358: +[IPU1-0] 37.612426 s: Failed to probe sensor at alias: 40 | status: -1 +[IPU1-0] 37.617245 s: +[IPU1-0] 37.617580 s: i2cMdSubmitChan: i2c4 transfer to slave address 0x76 failed +[IPU1-0] 37.617733 s: src/bsp_deviceI2c.c @ Line 1567: +[IPU1-0] 37.617824 s: Bus busy detected recover I2C bus !!! +[IPU1-0] 37.617916 s: src/bsp_deviceI2c.c @ Line 580: +[IPU1-0] 37.618007 s: I2C4: DEV 0x76: WR 0x01 = 0x01 ... ERROR !!! +[IPU1-0] 37.618160 s: src/bsp_deviceI2c.c @ Line 602: +[IPU1-0] 37.618251 s: I2C4: Error timeout 6 ms!!! +[IPU1-0] 37.618343 s: src/bsputils_ub960.c @ Line 1541: +[IPU1-0] 37.618404 s: Could not configure UB913 Ser !!! +[IPU1-0] 37.619410 s: src/bsputils_ub960.c @ Line 1349: +[IPU1-0] 37.619502 s: Failed to probe serializer at alias: 76 | status: -1 +[IPU1-0] 37.620478 s: src/bsputils_ub960.c @ Line 1358: +[IPU1-0] 37.620600 s: Failed to probe sensor at alias: 42 | status: -1 +[IPU1-0] 42.620203 s: +[IPU1-0] 42.620539 s: i2cMdSubmitChan: i2c transfer Timeout IRQ not received +[IPU1-0] 42.621606 s: src/bsp_deviceI2c.c @ Line 580: +[IPU1-0] 42.621698 s: I2C4: DEV 0x78: WR 0x01 = 0x01 ... ERROR !!! +[IPU1-0] 42.621820 s: src/bsp_deviceI2c.c @ Line 602: +[IPU1-0] 42.621911 s: I2C4: Error timeout 5001 ms!!! +[IPU1-0] 42.622003 s: src/bsputils_ub960.c @ Line 1541: +[IPU1-0] 42.622094 s: Could not configure UB913 Ser !!! +[IPU1-0] 43.920484 s: +[IPU1-0] 43.920850 s: i2cMdSubmitChan: i2c4 transfer to slave address 0x40 failed +[IPU1-0] 43.920972 s: src/bsp_deviceI2c.c @ Line 667: +[IPU1-0] 43.921063 s: I2C4: DEV 0x40: ERROR !!! +[IPU1-0] 43.921155 s: src/bsp_deviceI2c.c @ Line 689: +[IPU1-0] 43.921277 s: I2C4: Error timeout 255 ms!!! +[IPU1-0] 43.921368 s: radar_ar12xx/src/bspdrv_ar12xxPriv.c @ Line 120: +[IPU1-0] 43.921460 s: AR12XX: Radar Device Power On failed!! +[IPU1-0] 43.921551 s: Assertion @ Line: 273 in C:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/apps/src/rtos/radar/src/common/chains_common_ar12xx.c: SYSTEM_LINK_STATUS_SOK == retVal : failed !!! +[IPU1-0] 43.922741 s: Assertion @ Line: 273 in C:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/apps/src/rtos/radar/src/common/chains_common_ar12xx.c: SYSTEM_LINK_STATUS_SOK == retVal : failed !!! Thanks, Richard + +Richard, Is the single radar use case still working? Maybe something is broken in HW between UB960 -> UB953 -> AWR1243 so I2C command is not getting thru. Regards, Stanley + +Hi Stanley, The cascade use case runs now, turns out there was a HW mod failure on the master AWR1243. However, now we're back to the situation before switching to the IssCapture link from the Capture link, namely, I can connect to the EVM via the Matlab script, Network_Rx tool, or PuTTy, but no data comes back through any of these? Below is the output from Matlab: Should there be additional status messages, or is some action required on the host side to begin data transmission? Edit: IssCaptureLink_drvSetDrvCfg() is called, but issCaptDrvCallback() never is. Thanks, Richard + +Richard, If issCaptDrvCallback() is not called, the radar data is not received at the CSI2 port on TDA2P. It is not a network issue. There is just no data to be sent. You need to check if UB960 is receiving any data from radar. Regards, Stanley + +Hi Stanley, Below is the scope output when probing the FPD links, where the yellow waveform is the cascade use case and the white waveform is the single use case. Is there some way to tell whether the cascade radar data is valid? In addition, I tried to inspect the UB960 registers via CCS, but it seems like I can only access the TDA2 registers? Thanks, Richard + +Hi Richard, You can verify the radar data by using test mode from Radar. This can be enabled by using ChainsCommon_ar12xxEnableTestSource() API. This can be enabled by uncommenting "#define ENABLE_TEST_SOURCE" in ~/vision_sdk/apps/src/rtos/radar/src/common/chains_common_ar12xx.c. You can refer to ~/ti_components/drivers/pdk_xx_xx_xx/packages/ti/drv/vps/unit_test/cascadeRadarUt/src/CascadeRadar_main.c to see how the data is verified in CascadeRadar_vipCbFxn(). However, this method can only be used if the data is actually received by TDA2P. Based on the discussion earlier, it sounds like TDA2P didn't even receive the data from CSI-2 port. As for UB960 registers, you have to access via I2C commands. Regards, Stanley + +Hi Stanley, When I read the line registers from the UB960 (0x73-0x76), they are all zeros. I would assume this means the UB960 isn't getting any radar data? Why might this be the case? Attached are the corresponding code modifications: chains_cascadeRadarOd.c /****************************************************************************** +Copyright (c) [2018] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI’S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_cascadeRadarOd_priv.h" +#include +#include +#include + +#define RADAR_CASCADE_NUM_TX_AZIMUTH_ANT (5U) +#define RADAR_CASCADE_NUM_TX_ELEVATION_ANT (3U) + + +#define CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS (16U) +#define CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS_LENGTH (8U) + +/** + ******************************************************************************* + * \brief Channels with timestamp difference <= SYNC_DELTA_IN_MSEC + * are synced together by sync link + ******************************************************************************* + */ +#define SYNC_DELTA_IN_MSEC (50) + +/** + ******************************************************************************* + * \brief Channels with timestamp older than SYNC_DROP_THRESHOLD_IN_MSEC + * are dropped by sync link + ******************************************************************************* + */ +#define SYNC_DROP_THRESHOLD_IN_MSEC (100) + +char Chains_cascadeRadarOd_runTimeMenu(); +static Void Chains_parseCmd(char* inputStr, UInt16 *argc, char **argv); +static Void Chains_readString(char* inputString, UInt8 maxNumChar); + +/** + ******************************************************************************* + * + * \brief Chains_cascadeRadarOdObj + * + * This structure contains all the LinksId's and create Params. + * The same is passed to all create, start, stop functions. + * + ******************************************************************************* +*/ +typedef struct { + + //Added members for SD card + chains_cascadeRadarOdObj ucObj; + + ChainsCommon_Ar12xxConfigOut ar12xxCfg; + + Chains_Ctrl *chainsCfg; + + /* Algorithm */ + AlgorithmFxn_RadarFftCreateParams radarFftParams1; + AlgorithmFxn_RadarFftCreateParams radarFftParams2; + AlgorithmFxn_RadarFftCreateParams radarFftParams3; + AlgorithmFxn_RadarFftCreateParams radarFftParams4; + AlgorithmFxn_RadarDspProcessCreateParams radarDspOdParams; + + Chains_DataRdWrType linkType; + +} Chains_cascadeRadarOdAppObj; + +typedef struct +{ + UInt16 antAzimOffs[RADAR_CASCADE_NUM_TX_AZIMUTH_ANT + RADAR_CASCADE_NUM_TX_ELEVATION_ANT]; + UInt16 antElevOffs[RADAR_CASCADE_NUM_TX_AZIMUTH_ANT + RADAR_CASCADE_NUM_TX_ELEVATION_ANT]; + UInt16 antRowOffs[RADAR_CASCADE_NUM_TX_AZIMUTH_ANT + RADAR_CASCADE_NUM_TX_ELEVATION_ANT]; +} aoa_txAntOffset_t; + +typedef struct +{ + UInt16 sensorInd; + UInt16 txAntInd; + UInt16 rxAntInd; + UInt16 pad; +} aoa_overlap_antenna; + +typedef struct +{ + aoa_overlap_antenna previous; + aoa_overlap_antenna current; +} aoa_overlapAntennaPairs; + +typedef struct +{ + UInt16 sensorAzimOffs; + UInt16 antAzimOffs[4U]; + UInt16 antElevOffs[4U]; + UInt16 antRowOffs[4U]; +} aoa_rxAntOffset_t; + +aoa_txAntOffset_t gAoa_txAntOffset = +{ + .antAzimOffs = {0, 8, 16, 24, 32, 9, 10, 11}, + .antElevOffs = {0, 0, 0, 0, 0, 1, 4, 6}, + .antRowOffs = {0, 0, 0, 0, 0, 1, 2, 3} +}; + +aoa_rxAntOffset_t gAoa_sensorRxOffset[] = +{ + { + .sensorAzimOffs = 0, + .antAzimOffs = {0, 1, 2, 3}, + .antElevOffs = {0, 0, 0, 0}, + .antRowOffs = {0, 0, 0, 0} + }, + { + .sensorAzimOffs = 11, + .antAzimOffs = {0, 1, 2, 3}, + .antElevOffs = {0, 0, 0, 0}, + .antRowOffs = {0, 0, 0, 0} + }, + { + .sensorAzimOffs = 50, + .antAzimOffs = {0, 1, 2, 3}, + .antElevOffs = {0, 0, 0, 0}, + .antRowOffs = {0, 0, 0, 0} + }, + { + .sensorAzimOffs = 46, + .antAzimOffs = {0, 1, 2, 3}, + .antElevOffs = {0, 0, 0, 0}, + .antRowOffs = {0, 0, 0, 0} + }, +}; + +UInt8 gAoa_rowToElevationIdx[] = {0, 1, 4, 6}; + +aoa_overlapAntennaPairs gAoa_overlapAntennaPairs[] = +{ + {.previous = {1,0,0}, .current = {0,1,3}}, + {.previous = {1,1,0}, .current = {0,2,3}}, + {.previous = {1,2,0}, .current = {0,3,3}}, + {.previous = {1,3,0}, .current = {0,4,3}} +}; + +/* For TI RF calibration coefficients. The values are stored as: real value is + * in odd memory position, negative imaginary value is in even position */ +AlgorithmFxn_RadarDspProcessComplexNum gChanCompCoefs [] = +{ + {0.5493532, -0.5382177}, + {0.5768175, -0.5527835}, + {0.5161927, -0.5520395}, + {0.6684260, -0.4948089}, + {0.8705083, -0.0142706}, + {0.9357420, -0.0385306}, + {0.8456463, -0.0404831}, + {0.8996814, 0.0715656}, + {0.8015795, 0.4135538}, + {0.8284975, 0.4534344}, + {0.7886266, 0.3798872}, + {0.7884426, 0.4827199}, + {0.9043464, -0.5787817}, + {0.9169999, -0.4995597}, + {0.7730544, -0.6039488}, + {0.8425182, -0.5128371}, + {0.6421999, -0.6221311}, + {0.7653940, -0.5754842}, + {0.5956402, -0.5352713}, + {0.6980371, -0.5140949}, + {-0.9440165, -0.4547817}, + {-0.9657323, -0.4828662}, + {-0.8692111, -0.3945761}, + {-0.9100713, -0.5279803}, + {-1.0462480, -0.3236595}, + {-1.0991201, -0.4520575}, + {-1.0783755, -0.3171692}, + {-1.0389148, -0.6105903}, + {-0.9620396, -0.5932578}, + {-0.9969274, -0.8560573}, + {-0.9548815, -0.5968009}, + {-0.8344880, -0.6344868}, + {-0.2610382, 0.8056180}, + {-0.0744242, 0.7477865}, + {0.0357804, 0.7951190}, + {-0.0672695, 0.9055505}, + {-0.7162539, 0.7644633}, + {-0.4306506, 0.7946529}, + {-0.3173126, 0.9336312}, + {-0.4023159, 0.9914214}, + {-0.7082964, 0.5728868}, + {-0.4729874, 0.5966918}, + {-0.3494343, 0.6950704}, + {-0.4710852, 0.7765141}, + {0.1380861, 0.9279386}, + {0.2620542, 0.7777091}, + {0.3737004, 0.7224874}, + {0.3094909, 0.8602797}, + {0.0152542, 0.9000005}, + {0.1287354, 0.7438046}, + {0.1883689, 0.7285966}, + {0.0906799, 0.9174668}, + {0.9756498, -0.1790750}, + {0.8663723, -0.3665421}, + {0.8054178, -0.4799407}, + {0.8859414, -0.5562888}, + {0.7894852, -0.2141689}, + {0.6803175, -0.2256978}, + {0.7058089, -0.3263418}, + {0.7997218, -0.4023758}, + {0.7420773, -0.1433966}, + {0.6557204, -0.1798879}, + {0.6311873, -0.2957738}, + {0.7367190, -0.3197846}, + {0.9505693, 0.5551325}, + {1.0414761, 0.2603690}, + {1.0285757, 0.2223947}, + {0.9209221, 0.4473050}, + {0.5513432, 0.9571931}, + {0.6988582, 0.7050428}, + {0.6979669, 0.6630686}, + {0.5570068, 0.8025689}, + {0.0603978, 0.9334203}, + {0.1390159, 0.8628576}, + {0.1593458, 0.8764020}, + {0.0672695, 0.9055505}, + {0.7194937, 0.8075950}, + {0.7881971, 0.8207001}, + {0.9099478, 0.7524568}, + {0.8386164, 0.8298808}, + {0.6049777, 1.3151687}, + {0.6597368, 1.6299380}, + {0.9598035, 1.4212475}, + {0.8693603, 1.3277503}, + {-0.0969632, -1.1811885}, + {-0.1869433, -1.0982921}, + {-0.0996534, -1.1460146}, + {-0.0559669, -1.1273338}, + {0.1046557, -1.5399344}, + {-0.2260024, -1.4831409}, + {-0.1675737, -1.6254649}, + {0.0268146, -1.4613965}, + {0.5782658, -1.3448040}, + {0.3903018, -1.7666292}, + {0.4525752, -1.7119149}, + {0.4306256, -1.4497730}, + {0.7551180, -0.5264555}, + {0.8770092, -0.6521350}, + {0.5232915, -0.9318889}, + {0.8842050, -0.6499285}, + {0.9872881, -0.0490578}, + {1.2393565, -0.1770509}, + {0.9860778, -0.4277838}, + {1.1080856, -0.1248547}, + {0.7946622, 0.3169462}, + {0.9816368, 0.2814026}, + {0.9127659, 0.0524578}, + {0.9422511, 0.3161500}, + {0.8290837, -0.3437664}, + {0.9458543, -0.4355012}, + {0.8430626, -0.6393225}, + {1.0346645, -0.3523857}, + {1.0268174, -0.1486183}, + {1.1788297, -0.1506775}, + {1.1617876, -0.4094825}, + {1.3399067, -0.1717829}, + {-1.0016693, -0.4021300}, + {-1.2705544, -0.4578574}, + {-1.2365324, -0.1864612}, + {-1.1850164, -0.3788167}, + {-1.2087471, -0.5384420}, + {-1.5229037, -0.8674768}, + {-1.7853301, -0.2872945}, + {-1.5511544, -0.6345631}, + {-0.9038273, -0.9582747}, + {-0.9570825, -1.3264828}, + {-1.2853311, -1.0740438}, + {-1.1545604, -1.1380666} +}; + +Void Chains_aoAReadCascadeCoeffs( + AlgorithmFxn_RadarDspProcessComplexNum *rxChPhaseComp) +{ + Int32 fpReadDataStream; + char filename[64]; + size_t coffFileSize; + UInt32 bytesRead = 0; + AlgorithmFxn_RadarDspProcessComplexNum *pCalibrationTable; + + pCalibrationTable = gChanCompCoefs; + UTILS_assert(pCalibrationTable != NULL); + + /* read coeff from a file */ + sprintf(filename, "calib_coef.bin"); + + /* Open file */ + fpReadDataStream = File_open((Char *)filename, "r"); + if(fpReadDataStream == -1) + { + memcpy((Uint8 *) rxChPhaseComp, + pCalibrationTable, + sizeof(AlgorithmFxn_RadarDspProcessComplexNum) * + ALGORITHMFXN_RADAR_DSP_PROCESS_MAX_VIRT_ANTENNA); + Vps_printf("FILE_IO: Calibration file(%s) is NOT present in sd card! Used built-in coefficients!\n", filename); + } + else + { + coffFileSize = File_size(fpReadDataStream); + if(coffFileSize <= + (sizeof(AlgorithmFxn_RadarDspProcessComplexNum) * + ALGORITHMFXN_RADAR_DSP_PROCESS_MAX_VIRT_ANTENNA)) + { + File_read(fpReadDataStream, (Uint8 *) rxChPhaseComp, + coffFileSize, &bytesRead); + Vps_printf( + "FILE_IO: Calibration file(%s) is present in sd card \n", + filename); + } + else + { + memcpy((Uint8 *) rxChPhaseComp, pCalibrationTable, + sizeof(AlgorithmFxn_RadarDspProcessComplexNum) * + ALGORITHMFXN_RADAR_DSP_PROCESS_MAX_VIRT_ANTENNA); + Vps_printf( + "FILE_IO: Calibration file(%s) size is NOT compatible (expected %d Bytes). Used built-in coefficients!\n", + filename, + (sizeof(AlgorithmFxn_RadarDspProcessComplexNum) * + ALGORITHMFXN_RADAR_DSP_PROCESS_MAX_VIRT_ANTENNA)); + } + } +} + +// static Void Chains_MultiVip_SetCapturePrms( +// CaptureLink_CreateParams *pPrm, +// ChainsCommon_Ar12xxConfigOut *ar12xxCfg, +// UInt32 portId[] +// ) +// { +// UInt32 i, streamId; +// UInt32 numCh = ar12xxCfg->numRadars; +// CaptureLink_VipInstParams *pInstPrm; +// CaptureLink_InParams *pInprms; +// CaptureLink_OutParams *pOutprms; +// CaptureLink_VipScParams *pScPrm; +// CaptureLink_VipPortConfig *pPortCfg; + +// memset(pPrm, 0, sizeof(*pPrm)); + +// pPrm->numVipInst = numCh; +// pPrm->numDssWbInst = 0; + +// for (i=0; ivipInst[i]; + +// UTILS_assert(portId != NULL); +// pInstPrm->vipInstId = portId[i]; + +// pInstPrm->videoIfMode = SYSTEM_VIFM_SCH_DS_AVID_VSYNC; +// pInstPrm->videoIfWidth = SYSTEM_VIFW_16BIT; +// pInstPrm->bufCaptMode = SYSTEM_CAPT_BCM_FRM_DROP; +// pInstPrm->numStream = 1; + +// pInprms = &pInstPrm->inParams; +// if (i < numCh) +// { +// pInprms->width = ar12xxCfg->radarParams[i].csi2OutWidth; +// pInprms->height = ar12xxCfg->radarParams[i].csi2OutHeight; +// } +// else +// { +// pInprms->width = 0; +// pInprms->height = 0; +// } +// pInprms->dataFormat = SYSTEM_DF_YUV422I_YUYV; +// pInprms->scanFormat = SYSTEM_SF_PROGRESSIVE; + +// for (streamId = 0; streamId < CAPTURE_LINK_MAX_OUTPUT_PER_INST; +// streamId++) +// { +// pOutprms = &pInstPrm->outParams[streamId]; +// pOutprms->width = pInprms->width; +// pOutprms->height = pInprms->height; +// pOutprms->dataFormat = SYSTEM_DF_YUV422I_YUYV; +// pOutprms->maxWidth = pOutprms->width; +// pOutprms->maxHeight = pOutprms->height; +// pOutprms->scEnable = FALSE; + +// /* sub-frame not supported, set to FALSE */ +// pOutprms->subFrmPrms.subFrameEnable = FALSE; +// pOutprms->subFrmPrms.numLinesPerSubFrame = 0; + +// } +// pScPrm = &pInstPrm->scPrms; +// pScPrm->inCropCfg.cropStartX = 0; +// pScPrm->inCropCfg.cropStartY = 0; +// pScPrm->inCropCfg.cropWidth = pInprms->width; +// pScPrm->inCropCfg.cropHeight = pInprms->height; + +// pScPrm->scCfg.bypass = FALSE; +// pScPrm->scCfg.nonLinear = FALSE; +// pScPrm->scCfg.stripSize = 0; + +// pScPrm->userCoeff = FALSE; + +// pPortCfg = &pInstPrm->vipPortCfg; +// pPortCfg->syncType = SYSTEM_VIP_SYNC_TYPE_DIS_SINGLE_YUV; +// pPortCfg->ancCropEnable = FALSE; + +// pPortCfg->intfCfg.clipActive = FALSE; +// pPortCfg->intfCfg.clipBlank = FALSE; +// pPortCfg->intfCfg.intfWidth = SYSTEM_VIFW_16BIT; + +// pPortCfg->disCfg.fidSkewPostCnt = 0; +// pPortCfg->disCfg.fidSkewPreCnt = 0; +// pPortCfg->disCfg.lineCaptureStyle = +// SYSTEM_VIP_LINE_CAPTURE_STYLE_ACTVID; +// pPortCfg->disCfg.fidDetectMode = SYSTEM_VIP_FID_DETECT_MODE_PIN; +// pPortCfg->disCfg.actvidPol = SYSTEM_POL_HIGH; +// pPortCfg->disCfg.vsyncPol = SYSTEM_POL_HIGH; +// pPortCfg->disCfg.hsyncPol = SYSTEM_POL_LOW; +// pPortCfg->disCfg.discreteBasicMode = TRUE; + +// pPortCfg->comCfg.ctrlChanSel = SYSTEM_VIP_CTRL_CHAN_SEL_7_0; +// pPortCfg->comCfg.ancChSel8b = +// SYSTEM_VIP_ANC_CH_SEL_8B_LUMA_SIDE; +// if (portId[i] == VPS_CAPT_VIP_MAKE_INST_ID(VPS_VIP2, VPS_VIP_S0, VPS_VIP_PORTA)) +// { +// pPortCfg->comCfg.pixClkEdgePol = SYSTEM_EDGE_POL_RISING; +// } +// else +// { +// pPortCfg->comCfg.pixClkEdgePol = SYSTEM_EDGE_POL_FALLING; +// Bsp_platformSetVipClkInversion(pInstPrm->vipInstId, TRUE); +// } +// pPortCfg->comCfg.invertFidPol = FALSE; +// pPortCfg->comCfg.enablePort = FALSE; +// pPortCfg->comCfg.expectedNumLines = pInprms->height; +// pPortCfg->comCfg.expectedNumPix = pInprms->width; +// pPortCfg->comCfg.repackerMode = SYSTEM_VIP_REPACK_CBA_TO_CBA; + +// pPortCfg->actCropEnable = FALSE; + +// pPortCfg->ancCropCfg.srcNum = 0; +// pPortCfg->ancCropCfg.cropCfg.cropStartX = 0; +// pPortCfg->ancCropCfg.cropCfg.cropStartY = 0; +// pPortCfg->ancCropCfg.cropCfg.cropWidth = 0; +// pPortCfg->ancCropCfg.cropCfg.cropHeight = 0; + +// pInstPrm->numBufs = CAPTURE_LINK_NUM_BUFS_PER_CH_DEFAULT + 2; +// } +// } + +void Chains_RadarDspProcess_SetPrms (AlgorithmFxn_RadarDspProcessCreateParams *pPrms, + ChainsCommon_Ar12xxConfigOut *pAr12xxCfg) +{ + AlgorithmFxn_RadarDspProcChCreateParams *chCreateParams; + AlgorithmFxn_RadarDspProcCfarCreateParams *cfarCreateParams; + AlgorithmFxn_RadarDspProcAoaCreateParams *aoaCreateParams; + UInt16 *rxAngleIndxLUT, *rxRowIndxLUT; + UInt32 i, j, numTx, numChirps; + AlgorithmFxn_RadarDspProcessOpBlobControlParams *opControlParams; + + AlgorithmFxn_RadarDspProcess_Init(pPrms); + pPrms->inputBufferType = SYSTEM_BUFFER_TYPE_VIDEO_FRAME_CONTAINER; + pPrms->numChannels = 1U; /* cascade configuration */ + pPrms->enableClutterRemoval = 0U; + + chCreateParams = &pPrms->chCreateParams[0]; + chCreateParams->numSensorDevPerChannel = pAr12xxCfg->numRadars; + chCreateParams->numProfiles = pAr12xxCfg->radarParams[0].numProfiles; + for (i = 0U; i < pAr12xxCfg->radarParams[0].numProfiles; i++) + { + chCreateParams->numAdcSamples[i] = pAr12xxCfg->radarParams[0].radarWidth[i]; + chCreateParams->numChirpLoops[i] = pAr12xxCfg->radarParams[0].radarHeight[i]; + chCreateParams->rangeRes[i] = pAr12xxCfg->radarParams[0].rangeRes[i]; + chCreateParams->dopplerRes[i] = pAr12xxCfg->radarParams[0].velocityRes[i]; + for (j = 0U; j < pAr12xxCfg->numRadars; j++) + { + numTx = 0U; + for (numChirps = 0U; numChirps < pAr12xxCfg->radarParams[j].ar12xxConfig.numChirpCfgArgs; + numChirps++) + { + numTx = numTx | pAr12xxCfg->radarParams[j].ar12xxConfig.chirpCfgArgs[numChirps].txEnable; + } + chCreateParams->numTxAnt[j][i] = Chains_ar12xxCountOnes(numTx); + chCreateParams->numRxAnt[j][i] = pAr12xxCfg->radarParams[j].numRxAntenna[i]; + } + /* Board Specific Parameters */ + chCreateParams->numTxAzimuthAnt[i] = RADAR_CASCADE_NUM_TX_AZIMUTH_ANT; + chCreateParams->numTxElevationAnt[i] = RADAR_CASCADE_NUM_TX_ELEVATION_ANT; + } + cfarCreateParams = &pPrms->cfarCreateParams; + cfarCreateParams->cfarType = ALG_FXN_RADAR_DSP_PROCESS_CFAR_CASO; + cfarCreateParams->pfa = (float)1e-6; + cfarCreateParams->K0 = 6.3; + cfarCreateParams->dopplerSearchRelThr = 6.3; + cfarCreateParams->enableSecondPassSearch= 1U; + cfarCreateParams->searchWinSizeRange = 16; + cfarCreateParams->guardSizeRange = 4; + cfarCreateParams->searchWinSizeDoppler = 8; + cfarCreateParams->guardSizeDoppler = 0; + cfarCreateParams->maxNumDetObj = ALGORITHMFXN_RADAR_DSP_PROCESS_MAX_OBJECTS >> 1U; + cfarCreateParams->leftSkipSize = 1; + cfarCreateParams->rightSkipSize = 18; + cfarCreateParams->leftSkipSizeAzimuth = 0; + cfarCreateParams->rightSkipSizeAzimuth = 0; + cfarCreateParams->log2MagFlag = 0U; + + aoaCreateParams = &pPrms->aoaCreateParams; + aoaCreateParams->rxMainRowIndex = 0; + aoaCreateParams->azimuthFFTsize = 128; + aoaCreateParams->numAzimuthFFTs = 4; + aoaCreateParams->elevationFFTsize = 64; + aoaCreateParams->multiPeakThresholdScale= 0.95; + aoaCreateParams->enableClutterRemoval = 0U; + aoaCreateParams->enableExtendedMaxVelocity = 0U; + aoaCreateParams->numOverlapAntennaPairs = 4; /* Board Specific */ + rxAngleIndxLUT = aoaCreateParams->rxAngleIndxLUT; + rxRowIndxLUT = aoaCreateParams->rxRowIndxLUT; + j = 0; /* Single Profile Assumed */ + numTx = chCreateParams->numTxAzimuthAnt[j] + chCreateParams->numTxElevationAnt[j]; + for (i = 0; i < pAr12xxCfg->numRadars; i++) + { + UInt32 txInd, rxInd, ind; + for (txInd = 0; txInd < numTx; txInd++) + { + for (rxInd = 0; rxInd < pAr12xxCfg->radarParams[i].numRxAntenna[j]; rxInd++) + { + ind = i * (numTx * pAr12xxCfg->radarParams[i].numRxAntenna[j]) + + txInd * pAr12xxCfg->radarParams[i].numRxAntenna[j] + rxInd; + rxAngleIndxLUT[ind] = gAoa_txAntOffset.antAzimOffs[txInd] + + gAoa_sensorRxOffset[i].sensorAzimOffs + + gAoa_sensorRxOffset[i].antAzimOffs[rxInd]; + rxRowIndxLUT[ind] = gAoa_txAntOffset.antRowOffs[txInd] + + gAoa_sensorRxOffset[i].antRowOffs[rxInd]; + } + } + } + for (i = 0; i < aoaCreateParams->numAzimuthFFTs; i++) + { + aoaCreateParams->rxRowToElevIdxLUT[i] = gAoa_rowToElevationIdx[i]; + } + for (i = 0; i < aoaCreateParams->numOverlapAntennaPairs; i++) + { + aoaCreateParams->overlapAntennaPairs[i] = + (Uint32) (gAoa_overlapAntennaPairs[i].previous.sensorInd * numTx * + pAr12xxCfg->radarParams[0].numRxAntenna[0] + + gAoa_overlapAntennaPairs[i].previous.txAntInd * + pAr12xxCfg->radarParams[0].numRxAntenna[0] + + gAoa_overlapAntennaPairs[i].previous.rxAntInd) | + (((Uint32) (gAoa_overlapAntennaPairs[i].current.sensorInd * numTx * + pAr12xxCfg->radarParams[0].numRxAntenna[0] + + gAoa_overlapAntennaPairs[i].current.txAntInd * + pAr12xxCfg->radarParams[0].numRxAntenna[0] + + gAoa_overlapAntennaPairs[i].current.rxAntInd)) << 16); + } + Chains_aoAReadCascadeCoeffs(aoaCreateParams->rxChPhaseComp); + aoaCreateParams->calibParams.state = + ALGORITHMFXN_RADAR_DSP_PROCESS_NORMAL_RUNNING; + + opControlParams = &pPrms->opControlParams; + opControlParams->pointCloud = 1U; + opControlParams->rangeProfile = 1U; + opControlParams->noiseProfile = 0U; + opControlParams->rangeDopHeatMap = 0U; + opControlParams->azimuthHeatMap = 0U; +} + +static Void Chains_setSelectParams(SelectLink_CreateParams *pPrm) +{ + pPrm->numOutQue = 4; + + pPrm->outQueChInfo[0].outQueId = 0; + pPrm->outQueChInfo[0].numOutCh = 1; + pPrm->outQueChInfo[0].inChNum[0] = 0; + + pPrm->outQueChInfo[1].outQueId = 1; + pPrm->outQueChInfo[1].numOutCh = 1; + pPrm->outQueChInfo[1].inChNum[0] = 1; + + pPrm->outQueChInfo[2].outQueId = 2; + pPrm->outQueChInfo[2].numOutCh = 1; + pPrm->outQueChInfo[2].inChNum[0] = 2; + + pPrm->outQueChInfo[3].outQueId = 3; + pPrm->outQueChInfo[3].numOutCh = 1; + pPrm->outQueChInfo[3].inChNum[0] = 3; +} + +/** + ******************************************************************************* + * + * \brief Set Sync Create Parameters + * + * This function is used to set the sync params. + * It is called in Create function. + * + * \param pPrm [OUT] SyncLink_CreateParams + * + ******************************************************************************* +*/ +static Void Chains_SetSyncParams(SyncLink_CreateParams *pPrm) +{ + pPrm->syncDelta = SYNC_DELTA_IN_MSEC; + pPrm->syncThreshold = SYNC_DROP_THRESHOLD_IN_MSEC; +} + +/** + ******************************************************************************* + * + * \brief Start the Links + * + * Function sends a control command to all the links to + * to Start them. Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] Chains_cascadeRadarOdAppObj + * + * /return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_cascadeRadarOd_StartApp(Chains_cascadeRadarOdAppObj *pObj) +{ + Chains_memPrintHeapStatus(); + + ChainsCommon_ar12xxStart(); + chains_cascadeRadarOd_Start(&pObj->ucObj); + + Chains_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Delete the usecase Links + * + * Function sends a control command to all usecase links to + * to delete them + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] Chains_cascadeRadarOdAppObj + * + ******************************************************************************* +*/ +Void chains_cascadeRadarOd_StopAndDeleteApp(Chains_cascadeRadarOdAppObj *pObj) +{ + chains_cascadeRadarOd_Stop(&pObj->ucObj); + chains_cascadeRadarOd_Delete(&pObj->ucObj); + ChainsCommon_ar12xxStop(&pObj->ar12xxCfg); + + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + Chains_prfLoadCalcEnable(FALSE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Set link Parameters + * + * It is called in Create function of the auto generated use-case file. + * + * \param pUcObj [IN] Auto-generated usecase object + * \param appObj [IN] Application specific object + * + ******************************************************************************* +*/ +Void chains_cascadeRadarOd_SetAppPrms(chains_cascadeRadarOdObj *pUcObj, Void *appObj) +{ + Chains_cascadeRadarOdAppObj *pObj + = (Chains_cascadeRadarOdAppObj*)appObj; + // UInt32 portId[SYSTEM_CAPTURE_VIP_INST_MAX] = { + // VPS_CAPT_VIP_MAKE_INST_ID(VPS_VIP1, VPS_VIP_S1, VPS_VIP_PORTA), /* Master - VIN2A */ + // VPS_CAPT_VIP_MAKE_INST_ID(VPS_VIP2, VPS_VIP_S0, VPS_VIP_PORTA), + // VPS_CAPT_VIP_MAKE_INST_ID(VPS_VIP2, VPS_VIP_S1, VPS_VIP_PORTA), + // VPS_CAPT_VIP_MAKE_INST_ID(VPS_VIP1, VPS_VIP_S0, VPS_VIP_PORTA), + // }; + + /* Fill params for cascade, params are used in cascade Algo */ + pObj->ar12xxCfg.fusionEnabled = 0; + Chains_ar12xxGetSampleCascadeConfig(&pObj->ar12xxCfg); + ChainsCommon_ar12xxConfig(&pObj->ar12xxCfg); + ChainsCommon_ar12xxSetIssCaptureParams(&pUcObj->IssCapturePrm, &pObj->ar12xxCfg); + + // Chains_MultiVip_SetCapturePrms(&pUcObj->CapturePrm, + // &pObj->ar12xxCfg, + // portId); + + Chains_setSelectParams(&pUcObj->SelectPrm); + + ChainsCommon_ar12xxSetFFTParams(&pObj->radarFftParams1, + &pObj->ar12xxCfg); + /* EVE only does 1D FFT */ + pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; + pObj->radarFftParams1.baseClassCreateParams.numOutputBuffers = 4; + pObj->radarFftParams1.workQcpuId = SYSTEM_PROC_EVE1; + + ChainsCommon_ar12xxSetFFTParams(&pObj->radarFftParams2, + &pObj->ar12xxCfg); + /* EVE only does 1D FFT */ + pObj->radarFftParams2.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; + pObj->radarFftParams2.baseClassCreateParams.numOutputBuffers = 4; + pObj->radarFftParams2.workQcpuId = SYSTEM_PROC_EVE1; + + + ChainsCommon_ar12xxSetFFTParams(&pObj->radarFftParams3, + &pObj->ar12xxCfg); + /* EVE only does 1D FFT */ + pObj->radarFftParams3.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; + pObj->radarFftParams3.baseClassCreateParams.numOutputBuffers = 4; + pObj->radarFftParams3.workQcpuId = SYSTEM_PROC_EVE2; + + ChainsCommon_ar12xxSetFFTParams(&pObj->radarFftParams4, + &pObj->ar12xxCfg); + /* EVE only does 1D FFT */ + pObj->radarFftParams4.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; + pObj->radarFftParams4.baseClassCreateParams.numOutputBuffers = 4; + pObj->radarFftParams4.workQcpuId = SYSTEM_PROC_EVE2; + + Chains_SetSyncParams(&pUcObj->SyncPrm); + + Chains_RadarDspProcess_SetPrms(&pObj->radarDspOdParams, + &pObj->ar12xxCfg); + + /* Select network mode */ +#if !defined(NSP_TFDTP_INCLUDE) + Vps_printf("Chains: Using TCP/IP\n"); + pUcObj->NetworkTxPrm.transmitDataType = NETWORK_TX_LINK_TRANSMIT_TYPE_TCPIP; +#else + Vps_printf("Chains: Using TFDTP. Ensure using –-usetfdtp with network tools..\n"); + pUcObj->NetworkTxPrm.transmitDataType = NETWORK_TX_LINK_TRANSMIT_TYPE_TFDTP; + /* no. of retry count */ + pUcObj->NetworkTxPrm.retryCount = NETWORK_TFDTP_RETRANSMIT_COUNT; +#endif + return; +} + +/** + ******************************************************************************* + * + * \brief Cascade 4 channel radar sensor (AWR1243) capture, object detection + * and network output + * + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void Chains_cascadeRadarOd(Chains_Ctrl *chainsCfg) +{ + char ch; + UInt32 done = FALSE; + UInt32 localDone = FALSE; + Chains_cascadeRadarOdAppObj chainsObj; + char inputStr[100]; + UInt16 argc; + char *argv[CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS]; + AlgorithmFxn_RadarDspProcessControlParams ctrlPrms; + + // Variables for print UB960 register values + Int32 status; + UInt8 tempAddr = 0x4C; + UInt8 tempData = 0x01; + UInt8 lineAddr[4] = {0x73, 0x74, 0x75, 0x76}; + UInt8 lineData[4]; + + chainsObj.chainsCfg = chainsCfg; + + chainsObj.ucObj.Alg_RadarProcess_fft1Prm = + (AlgorithmLink_RadarProcessCreateParams *)&chainsObj.radarFftParams1; + chainsObj.ucObj.Alg_RadarProcess_fft2Prm = + (AlgorithmLink_RadarProcessCreateParams *)&chainsObj.radarFftParams2; + chainsObj.ucObj.Alg_RadarProcess_fft3Prm = + (AlgorithmLink_RadarProcessCreateParams *)&chainsObj.radarFftParams3; + chainsObj.ucObj.Alg_RadarProcess_fft4Prm = + (AlgorithmLink_RadarProcessCreateParams *)&chainsObj.radarFftParams4; + + chainsObj.ucObj.Alg_RadarProcess_objectDetectPrm = + (AlgorithmLink_RadarProcessCreateParams *)&chainsObj.radarDspOdParams; + + chains_cascadeRadarOd_Create(&chainsObj.ucObj, &chainsObj); + + chains_cascadeRadarOd_StartApp(&chainsObj); + + while(!done) + { + ch = Chains_cascadeRadarOd_runTimeMenu(); + + switch(ch) + { + case '0': + done = TRUE; + break; + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + chains_cascadeRadarOd_printStatistics(&chainsObj.ucObj); + /* Also print UB960 register values for debug */ + // Select RX port 0 on UB960 + status = Bsp_deviceWrite8( UB960_ACCESSIBLE_FROM_I2C_INST, + UB960_SLAVE_ADDR, + &tempAddr, + &tempData, + (UInt32) 1U); + if (status != BSP_SOK) { + Vps_printf("\nFailed to select RX port for reading!\n"); + } + // Read line count and line length + status = Bsp_deviceRead8( UB960_ACCESSIBLE_FROM_I2C_INST, + UB960_SLAVE_ADDR, + lineAddr, + lineData, + (UInt32) 4U); + if (status != BSP_SOK) { + Vps_printf("\nFailed to read line registers!\n"); + } + Vps_printf("\nHigh byte of line count is: %x\n", lineData[0]); + Vps_printf("\nLow byte of line count is: %x\n", lineData[1]); + Vps_printf("\nHigh byte of line length is: %x\n", lineData[2]); + Vps_printf("\nLow byte of line length is: %x\n", lineData[3]); + break; + case 'g': + case 'G': +#ifdef ENABLE_NETWORK_LOG + Chains_readChar(); +#endif + localDone = FALSE; + while(!localDone) + { + Vps_printf("GUI Monitor (0/1) ( ):"); + Chains_readString(inputStr, CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS * (CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS_LENGTH +1)); + Chains_parseCmd(inputStr, &argc, (char **) &argv); + + if(argc != 5) + { + Vps_printf("\nIncorrect number of arguments(%d)'. Please try again\n", argc); + } + else + { + ctrlPrms.baseClassControl.baseClassControl.size = sizeof(ctrlPrms); + ctrlPrms.baseClassControl.controlCmd = ALGORITHM_LINK_RADAR_PROCESS_CONTROL_CMD; + ctrlPrms.opControlParams.pointCloud = atoi(argv[0]); + ctrlPrms.opControlParams.rangeProfile = atoi(argv[1]); + ctrlPrms.opControlParams.noiseProfile = atoi(argv[2]); + ctrlPrms.opControlParams.rangeDopHeatMap= atoi(argv[3]); + ctrlPrms.opControlParams.azimuthHeatMap = atoi(argv[4]); + ctrlPrms.dspControlCmd = ALGORITHM_FXN_RADAR_DSP_PROCESS_CMD_CHANGE_GUI; + System_linkControl( + chainsObj.ucObj.Alg_RadarProcess_objectDetectLinkID, + ALGORITHM_LINK_CMD_CONFIG, + &ctrlPrms, + sizeof(ctrlPrms), + TRUE + ); + localDone = TRUE; + } + } + break; + case 'c': + case 'C': +#ifdef ENABLE_NETWORK_LOG + Chains_readChar(); +#endif + localDone = FALSE; + while(!localDone) + { + Vps_printf("Calibration setting ( ):"); + Chains_readString(inputStr, CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS * (CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS_LENGTH +1)); + Chains_parseCmd(inputStr, &argc, (char **) &argv); + + if(argc != 3) + { + Vps_printf("\nIncorrect number of arguments(%d)'. Please try again\n", argc); + } + else + { + ctrlPrms.baseClassControl.baseClassControl.size = sizeof(ctrlPrms); + ctrlPrms.baseClassControl.controlCmd = ALGORITHM_LINK_RADAR_PROCESS_CONTROL_CMD; + ctrlPrms.calibParams.state = ALGORITHMFXN_RADAR_DSP_PROCESS_CALIBRATION; + ctrlPrms.calibParams.numFrames = atoi(argv[0]); + ctrlPrms.calibParams.refTargetRangeWindowStart = atoi(argv[1]); + ctrlPrms.calibParams.refTargetRangeWindowEnd = atoi(argv[2]); + ctrlPrms.dspControlCmd = ALGORITHM_FXN_RADAR_DSP_PROCESS_CMD_RUN_CALIBRATION; + System_linkControl( + chainsObj.ucObj.Alg_RadarProcess_objectDetectLinkID, + ALGORITHM_LINK_CMD_CONFIG, + &ctrlPrms, + sizeof(ctrlPrms), + TRUE + ); + localDone = TRUE; + } + } + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", ch); + break; + } + } + + chains_cascadeRadarOd_StopAndDeleteApp(&chainsObj); +} + +/** + ******************************************************************************* + * \brief Run Time Menu string. + ******************************************************************************* + */ +char gChains_cascadeRadarOd_customRunTimeMenu[] = { + "\r\n " + "\r\n ====================" + "\r\n Chains Run-time Menu" + "\r\n ====================" + "\r\n " + "\r\n 0: Stop Chain" + "\r\n " + "\r\n p: Print Performance Statistics " + "\r\n " + "\r\n g: Control GUI output " + "\r\n " + "\r\n c: Control Calibration " + "\r\n " + "\r\n Enter Choice: " + "\r\n " +}; + +char Chains_cascadeRadarOd_runTimeMenu() +{ + Vps_printf(gChains_cascadeRadarOd_customRunTimeMenu); + + return Chains_readChar(); +} + +static Void Chains_readString(char* inputString, UInt8 maxNumChar) +{ + char ch; + UInt8 numChar = 0; + + while ( numChar < maxNumChar) + { + ch = Chains_readChar(); + +#ifdef ENABLE_UART_LOG + Vps_printf("%c",ch); +#endif + if((ch == 0x0d) || (ch==0x0a)) + break; + + inputString[numChar++] = ch; + } + inputString[numChar] = 0; +} +static Void Chains_parseCmd(char* inputStr, UInt16 *argc, char **argv) +{ + UInt16 argIndex = 0; + while (1) + { + /* Tokenize the arguments: */ + argv[argIndex] = strtok(inputStr, " "); + if (argv[argIndex] == NULL) + break; + + /* Increment the argument index: */ + argIndex++; + if (argIndex >= CHAINS_CASCADE_RADAR_MAX_INPUT_ARGS) + break; + + /* Reset the command string */ + inputStr = NULL; + } + *argc = argIndex; +} + + Thanks, Richard + +Hi Richard, If I remember correctly, the single radar use case is working on your board. Could you run Cascade use case with number of radar set to 1 and see if you are getting data from master radar? The cascade radar algorithm link may not work but at least you should get the data from master. Regards, Stanley + +Hi Stanley, When I run the cascade use case with number of radars set to 1, the line registers still all read 0. I will try to read the line registers from the single radar use case to verify that I'm doing it correctly. Thanks, Richard + +Hi Stanley, I have verified that I can read the line registers from the single radar use case (line count = 0x0100, line length = 0x0810). Thanks, Richard + +Hi Richard, Could you compare the UB960, UB953, and ISSCapture configurations between the 2 use cases? Regards, Stanley + +Hi Stanley, Both the cascade and single use cases use gUb960Cfg_D3AR1243 and gUB953SerCfg. I'm not sure how to compare their ISSCapture configurations? Thanks, Richard + +Hi Stanley, I set a breakpoint at ChainsCommon_ar12xxSetIssCaptureParams() and compared the values of the arguments pPrm and pCfgOut. The values for both were similar, but contained a number of differences. I'm not sure how to tell which values are different intentionally, and which could be preventing the cascade use case from working. Attached are screenshots of the values for both use cases. Cascade_pCfgOut (2).zip Cascade_pPrm (2).zip Single_pCfgOut (2).zip Single_pPrm (2).zip Thanks, Richard + +Hi Richard, Let me try this out on my TDA2P EVM. I will see if the cascade radar use case with single radar will work on my EVM. Regards, Stanley + +Hi Richard, After reviewing the use case, there is one change required in ChainsCommon_ar12xxConfig() for cascade use case. In ChainsCommon_ar12xxConfig(), please change Bsp_ar12xxBoot(0U); to Bsp_ar12xxBoot(1U); This will enable downloading some firmware patch to AWR1243 RAM. Regards, Stanley + +Hi Richard, Please let me know if you have any further question. Regards, Stanley + +Hi Stanley, I am in contact with D3 now, and they have been able to give us more dedicated help to supplement your assistance on the E2E forum. Thanks for supporting this thread for the past several months, I'm sure we'll be in touch in the future! Richard + diff --git a/data2/text/range/30001+/733563.txt b/data2/text/range/30001+/733563.txt new file mode 100644 index 0000000000000000000000000000000000000000..eb0fcff50b7bcd48d87738d8d6f493cc812585d3 --- /dev/null +++ b/data2/text/range/30001+/733563.txt @@ -0,0 +1,773 @@ +Ticket Name: Linux/TDA2: MMC driver crash while flashing + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi I'm observing the following crash while we're flashing an upgrade on our system: vpc168 login: [85245.871960] ------------[ cut here ]------------ +[85245.871967] Kernel BUG at c04a25a0 [verbose debug info unavailable] +[85245.871973] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM +[85245.871994] Modules linked in: can_raw can c_can_platform c_can can_dev at24 tmp102 +[85245.872003] CPU: 1 PID: 899 Comm: mmcqd/1 Not tainted 4.1.18-rt17+ #20 +[85245.872007] Hardware name: Generic DRA74X (Flattened Device Tree) +[85245.872012] task: ef29e800 ti: eea0e000 task.ti: eea0e000 +[85245.872025] PC is at omap_hsmmc_request+0x330/0x550 +[85245.872039] LR is at mmc_start_request+0x158/0x288 +[85245.872045] pc : [] lr : [] psr: 20070113 +[85245.872045] sp : eea0fd80 ip : eea0fde8 fp : eea0fde4 +[85245.872049] r10: 00000000 r9 : ee90c01c r8 : ee90c150 +[85245.872054] r7 : ee90c048 r6 : c09d7a28 r5 : eea00800 r4 : eea00800 +[85245.872058] r3 : 00000001 r2 : 00000000 r1 : ee90c048 r0 : eea00800 +[85245.872064] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel +[85245.872069] Control: 30c5387d Table: ae0f5fc0 DAC: 55555555 +[85245.872074] Process mmcqd/1 (pid: 899, stack limit = 0xeea0e218) +[85245.872079] Stack: (0xeea0fd80 to 0xeea10000) +[85245.872087] fd80: eeafc000 00000001 d9000000 c001f53c ee90c10c c0959b9c 00000000 eea00c1c +[85245.872094] fda0: ef2f4610 00000000 eea0fdfc eea0fdb8 c04a0b6c c001f548 00000000 ee90c048 +[85245.872100] fdc0: eea00800 c09d7a28 ee90c048 ee90c150 ee90c01c 00000000 eea0fe1c eea0fde8 +[85245.872106] fde0: c0487f90 c04a227c ee90c01c 00000000 eea0fe1c eea0fe00 c04a0c94 eea00800 +[85245.872112] fe00: 00000000 ee90c044 ee90c150 ee90c01c eea0fe6c eea0fe20 c0488f90 c0487e44 +[85245.872118] fe20: eea0fe6c eea0fe30 c04989c0 c049bb7c 00000000 ee90c01c ee90c10c ee90c000 +[85245.872125] fe40: eea0fe6c d7de41a0 ee90c150 ee90c044 00000000 00000000 ee90c01c ee980000 +[85245.872131] fe60: eea0fed4 eea0fe70 c0498de0 c0488cd8 eea00b30 eea00800 00000001 c006575c +[85245.872137] fe80: eea00b30 eea00800 ee90c000 00000000 00000001 00000000 ee90c000 00000000 +[85245.872143] fea0: ef29e800 00000003 eea0fed4 ee980000 ee90c01c eea00b30 eea00800 ee90c000 +[85245.872149] fec0: d7de41a0 00000000 eea0ff24 eea0fed8 c049965c c0498a88 c049af78 00000000 +[85245.872156] fee0: eea0ff04 eea0fef0 c0063b68 c00e7e84 eea00800 00000000 eea0ff24 ee90c01c +[85245.872163] ff00: 00000000 eea7c000 c049af2c c049af78 d7de41a0 eea0e000 eea0ff5c eea0ff28 +[85245.872169] ff20: c049b040 c049955c ef29e800 ee90c024 c049aecc 00000000 ee8387c0 ee90c01c +[85245.872176] ff40: c049aecc 00000000 00000000 00000000 eea0ffac eea0ff60 c005ade8 c049aed8 +[85245.872183] ff60: 00000000 00000000 00000000 ee90c01c 00000000 00000000 eea0ff78 eea0ff78 +[85245.872189] ff80: 00000000 00000000 eea0ff88 eea0ff88 ee8387c0 c005ad00 00000000 00000000 +[85245.872195] ffa0: 00000000 eea0ffb0 c00109b8 c005ad0c 00000000 00000000 00000000 00000000 +[85245.872201] ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +[85245.872208] ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 +[85245.872223] [] (omap_hsmmc_request) from [] (mmc_start_request+0x158/0x288) +[85245.872236] [] (mmc_start_request) from [] (mmc_start_req+0x2c4/0x3d8) +[85245.872254] [] (mmc_start_req) from [] (mmc_blk_issue_rw_rq+0x364/0xad4) +[85245.872266] [] (mmc_blk_issue_rw_rq) from [] (mmc_blk_issue_rq+0x10c/0x4e4) +[85245.872278] [] (mmc_blk_issue_rq) from [] (mmc_queue_thread+0x174/0x1c8) +[85245.872292] [] (mmc_queue_thread) from [] (kthread+0xe8/0x104) +[85245.872305] [] (kthread) from [] (ret_from_fork+0x14/0x3c) +[85245.872314] Code: e34c1078 e5930000 ebfd3a07 eaffffb8 (e7f001f2) +[85246.206940] ---[ end trace 0000000000000002 ]--- +[85246.206947] Kernel panic - not syncing: Fatal exception +[85246.206954] CPU0: stopping +[85246.206962] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D 4.1.18-rt17+ #20 +[85246.206965] Hardware name: Generic DRA74X (Flattened Device Tree) +[85246.206980] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) +[85246.206993] [] (show_stack) from [] (dump_stack+0xb4/0xe4) +[85246.207002] [] (dump_stack) from [] (handle_IPI+0x308/0x360) +[85246.207010] [] (handle_IPI) from [] (gic_handle_irq+0x68/0x6c) +[85246.207018] [] (gic_handle_irq) from [] (__irq_svc+0x44/0x90) +[85246.207022] Exception stack(0xc0949f18 to 0xc0949f60) +[85246.207027] 9f00: ef6c9840 00000000 +[85246.207033] 9f20: 00000000 c095500c 00000001 c0948000 c09540f8 c0954000 c09cbc84 c05bb6e8 +[85246.207039] 9f40: c08b75ec c0949f6c c0949f60 c0949f60 c0011524 c0011528 60070013 ffffffff +[85246.207049] [] (__irq_svc) from [] (arch_cpu_idle+0x34/0x4c) +[85246.207059] [] (arch_cpu_idle) from [] (cpu_startup_entry+0x1b4/0x350) +[85246.207068] [] (cpu_startup_entry) from [] (rest_init+0x98/0x9c) +[85246.207079] [] (rest_init) from [] (start_kernel+0x390/0x39c) + This happens only occasionally. It's not 100% reproducible. I'd say it happens about 30% of the time on at least one board. Any help would be much appreciated. There was an identical thread here: but the user Ishaqe Ahamed unfortunately didn't post his resolution. Any ideas? + +Responses: +Hi Philipp, Could you provide information on which TI SDK you are using? Regards, Vishal + +We started with ti-processor-sdk-linux-rt-am57xx-evm-02.00.01.07 We've since upgraded the kernel from whatever was in there to 4.1.18-rt17 as per the dump I posted originally. At the time that was the most recent stable version of TI's RT branches on git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git. + +Hi Philipp, which processor are you using? The selected Part Number in your initial post is TDA2, but you use SDK which is for AM57xx processors. Regards, Yordan + +Maybe I'm missing something. The version of the kernel we're using is 4.1.18-rt17+ (which is not in the SDK we started with) and this is a kernel crash. Can you elaborate why the SDK is important here? We're using barely any pieces of it because of a need to use a different userspace. + +Hi Philipp, Catalog processors (such as AM57xx) and Auto processors (such as TDAx) have different SDKs and are supported by different teams. While both processors families and SDKs have some similarities they are mostly different. If you clarify which is your processor we can forward you to the right experts to provide help. Regards, Yordan + +We extracted a few binary files like pvrsrvinit and some gstreamer-related libraries from ti-processor-sdk-linux-rt-am57xx-evm-02.00.01.07 for some experiments, but they are not used in the system that experienced the crash above. We are using a TDA2 processor. I don't have access to the schematic right this moment to look up the part number. U-boot prints this at startup: CPU : DRA752-GP ES2.0 + +full-kernel-log.log U-Boot SPL 2015.07-00040-gd9ea473-dirty (Mar 05 2018 - 14:41:57) +DRA752-GP ES2.0 + + +U-Boot 2015.07-00040-gd9ea473-dirty (Mar 05 2018 - 14:41:57 -0800) + +CPU : DRA752-GP ES2.0 +Board: 117_005 + Watchdog enabled +I2C: ready +DRAM: +RAM Configuration: +Bank #0: 80000000 Bank #1: 200000000 +DRAM: 4 GiB +Board Init +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Card did not respond to voltage select! +** Bad device mmc 0 ** +Using default environment + +SOM: TDA2X_DE r3 +Configured: PVT1 Controller SOM +Hercules Initial State + +Initialized watchdog +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: not set. Validating first E-fuse MAC + not set. Validating second E-fuse MAC +cpsw +Hit any key to stop autoboot: 0 +Card did not respond to voltage select! +Card did not respond to voltage select! +new partition table with 6 partitions is: +Partition 1: +Start 1MiB, size 12MiB +Block size 512, name backup_kernel +Type U-Boot, bootable 0 +UUID 012b3303-34ac-284d-99b4-34e03a2335f4 + +Partition 2: +Start 13MiB, size 12MiB +Block size 512, name 1 +Type U-Boot, bootable 0 +UUID faec2ecf-8544-e241-b19d-757e796da607 + +Partition 3: +Start 25MiB, size 500MiB +Block size 512, name backup_var +Type U-Boot, bootable 0 +UUID f13a0978-b1b5-1a4e-8821-39438e24b627 + +Partition 4: +Start 525MiB, size 500MiB +Block size 512, name primary_var +Type U-Boot, bootable 0 +UUID b710eb04-45b9-e94a-8d0b-21458d596f54 + +Partition 5: +Start 1025MiB, size 2848MiB +Block size 512, name backup_rootfs +Type U-Boot, bootable 0 +UUID ad5ec4b6-2d9f-8544-9417-fe3bd1c9b1b3 + +Partition 6: +Start 3873MiB, size 2848MiB +Block size 512, name primary_rootfs +Type U-Boot, bootable 0 +UUID cceb0b18-39cb-d547-9db7-03b405fa77d4 + +success! +kernel on mmcblk1p2 +rootfs on mmcblk0p6 +bootcount is 1 +SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB, mapped at 5c000000 +device 0 offset 0x180000, size 0x20000 +SF: 131072 bytes @ 0x180000 Read: OK +## Executing script at 82000000 +Setting Controller bootargs from QSPI . . . +loading kernel from eMMC 1:2 . . . +reading zImage +Reading Filename: zImage +4418376 bytes read in 223 ms (18.9 MiB/s) +loading device-tree from eMMC 1:2 . . . +fdtfile file is peloton-controller-pvt1.dtb +reading peloton-controller-pvt1.dtb +Reading Filename: peloton-controller-pvt1.dtb +97760 bytes read in 12 ms (7.8 MiB/s) +Booting with rootfs on /dev/mmcblk0p6 . . . +Kernel image @ 0x82000000 [ 0x000000 - 0x436b48 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe5000, end 8ffffddf ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.1.18-rt17+ (sarah@sarah-debian) (gcc version 4.9.3 20150413 (prerelease) (Linaro GCC 4.9-2015.05) ) #20 SMP PREEMPT RT Fri Aug 31 12:03:08 PDT 2018 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: PVT1 Controller +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000fd800000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x000000027fd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 152 pages/cpu @ef639000 s593024 r8192 d21376 u622592 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 993040 +[ 0.000000] Kernel command line: console=ttyS2,115200n8 elevator=noop root=/dev/mmcblk0p6 ro rootwait earlyprintk consoleblank=0 rootfstype=xfs kernelpart=1:2 systemd.unit=multi-user.target +[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) +[ 0.000000] Memory: 3876868K/3978240K available (6303K kernel code, 583K rwdata, 2132K rodata, 1032K init, 281K bss, 44028K reserved, 57344K cma-reserved, 3372032K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc084500c (8437 kB) +[ 0.000000] .init : 0xc0846000 - 0xc0948000 (1032 kB) +[ 0.000000] .data : 0xc0948000 - 0xc09d9d14 ( 584 kB) +[ 0.000000] .bss : 0xc09dc000 - 0xc0a22784 ( 282 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] RCU debugfs-based tracing is enabled. +[ 0.000000] Additional per-CPU info printed with stalls. +[ 0.000000] RCU kthread priority: 1. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] Offload RCU callbacks from all CPUs +[ 0.000000] Offload RCU callbacks from CPUs: 0-1. +[ 0.000000] OMAP clockevent source: timer1 at 32768 Hz +[ 0.000000] clocksource 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65535999984741ns +[ 0.000000] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000457] Architected cp15 timer(s) running at 6.14MHz (virt). +[ 0.000457] clocksource arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000462] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000469] Switching to timer-based delay loop, resolution 162ns +[ 0.001057] Console: colour dummy device 80x30 +[ 0.001194] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=6147) +[ 0.001198] pid_max: default: 32768 minimum: 301 +[ 0.001313] Security Framework initialized +[ 0.001374] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) +[ 0.001381] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) +[ 0.002056] Initializing cgroup subsys net_prio +[ 0.002113] CPU: Testing write buffer coherency: ok +[ 0.002118] ftrace: allocating 19986 entries in 59 pages +[ 0.036080] /cpus/cpu@0 missing clock-frequency property +[ 0.036162] /cpus/cpu@1 missing clock-frequency property +[ 0.036176] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.036233] Setting up static identity map for 0x800082c0 - 0x80008318 +[ 0.055760] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.055866] Brought up 2 CPUs +[ 0.055883] SMP: Total of 2 processors activated (24.58 BogoMIPS). +[ 0.055894] CPU: All CPU(s) started in SVC mode. +[ 0.056623] devtmpfs: initialized +[ 0.099892] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.101043] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.354280] clocksource jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns +[ 0.356361] pinctrl core: initialized pinctrl subsystem +[ 0.358319] NET: Registered protocol family 16 +[ 0.360702] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.378638] OMAP GPIO hardware version 0.1 +[ 0.381125] GPIO line 92 (Novatel GPS Reset) hogged as output/low +[ 0.384258] GPIO line 135 (gpio135) hogged as input +[ 0.384289] GPIO line 137 (gpio137) hogged as input +[ 0.384318] GPIO line 134 (gpio134) hogged as output/low +[ 0.384345] GPIO line 136 (gpio136) hogged as output/low +[ 0.390311] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.390894] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.427142] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.427156] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.427702] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.427716] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.428127] OMAP DMA hardware revision 0.0 +[ 0.453544] edma 43300000.edma: memcpy is disabled +[ 0.468139] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.476263] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver +[ 0.484726] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.485151] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.485481] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.485825] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.486346] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.486713] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.490920] palmas 0-0058: IRQ missing: skipping irq request +[ 0.502752] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 +[ 0.532464] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.532837] pps_core: LinuxPPS API ver. 1 registered +[ 0.532849] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.534839] omap-mailbox 4883c000.mailbox: omap mailbox rev 0x400 +[ 0.535492] omap-mailbox 4883e000.mailbox: omap mailbox rev 0x400 +[ 0.535875] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.536053] omap-mailbox: probe of 48842000.mailbox failed with error -22 +[ 0.538236] Switched to clocksource arch_sys_counter +[ 0.688479] NET: Registered protocol family 2 +[ 0.689329] TCP established hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.689390] TCP bind hash table entries: 4096 (order: 4, 114688 bytes) +[ 0.689564] TCP: Hash tables configured (established 4096 bind 4096) +[ 0.689640] UDP hash table entries: 256 (order: 2, 16384 bytes) +[ 0.689679] UDP-Lite hash table entries: 256 (order: 2, 16384 bytes) +[ 0.689933] NET: Registered protocol family 1 +[ 0.690902] CPU PMU: Failed to parse /pmu/interrupt-affinity[0] +[ 0.690948] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.696003] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.718733] VFS: Disk quotas dquot_6.6.0 +[ 0.719191] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) +[ 0.722895] SGI XFS with security attributes, no debug enabled +[ 0.734390] alg: No test for stdrng (krng) +[ 0.734615] bounce: pool size: 64 pages +[ 0.734633] io scheduler noop registered (default) +[ 0.734648] io scheduler deadline registered +[ 0.734697] io scheduler cfq registered +[ 0.740226] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124 +[ 0.746682] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled +[ 0.750881] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 0.751765] console [ttyS2] disabled +[ 0.751868] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.529419] console [ttyS2] enabled +[ 1.533786] 48066000.serial: ttyS4 at MMIO 0x48066000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.545005] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 1.565398] brd: module loaded +[ 1.575807] loop: module loaded +[ 1.582848] m25p80 spi32766.0: n25q512ax3 (65536 Kbytes) +[ 1.588276] 10 ofpart partitions found on MTD device spi32766.0 +[ 1.594227] Creating 10 MTD partitions on "spi32766.0": +[ 1.599484] 0x000000000000-0x000000020000 : "QSPI.SPL" +[ 1.605225] 0x000000020000-0x000000040000 : "QSPI.SPL.backup1" +[ 1.611617] 0x000000040000-0x000000060000 : "QSPI.SPL.backup2" +[ 1.617976] 0x000000060000-0x000000080000 : "QSPI.SPL.backup3" +[ 1.624375] 0x000000080000-0x000000180000 : "QSPI.u-boot" +[ 1.630329] 0x000000180000-0x000000190000 : "QSPI.u-boot-env" +[ 1.636580] 0x000000190000-0x0000001a0000 : "QSPI.u-boot-env.backup" +[ 1.643479] 0x0000001a0000-0x000000da0000 : "QSPI.kernel" +[ 1.649439] 0x000000da0000-0x000000de0000 : "QSPI.device-tree" +[ 1.655778] 0x000000de0000-0x000004000000 : "QSPI.userspace" +[ 1.699060] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.705191] libphy: 48485000.mdio: probed +[ 1.713503] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown +[ 1.721557] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.730442] cpsw 48484000.ethernet: Detected MACID = c8:fd:19:bd:64:ce +[ 1.738381] cpsw 48484000.ethernet: cpsw: Detected MACID = c8:fd:19:bd:64:cf +[ 1.748878] rtc-ds3232 0-0068: rtc core: registered ds3232 as rtc0 +[ 1.755177] i2c /dev entries driver +[ 1.759655] pps pps0: new PPS source pps.-1 +[ 1.764084] pps pps0: Registered IRQ 135 as PPS source +[ 1.771876] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 1.780478] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.785270] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode +[ 1.791748] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode +[ 1.798138] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode +[ 1.804525] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode +[ 1.810916] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode +[ 1.840700] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.847091] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.853481] omap_hsmmc 480b4000.mmc: no pinctrl state for ddr_1_8v mode +[ 1.860132] omap_hsmmc 480b4000.mmc: no pinctrl state for hs200_1_8v mode +[ 1.867334] VDD_3V3: supplied by VDD_3V3_IN +[ 1.893891] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 1.909837] alg: aead: Test 2 failed on encryption for gcm-aes-omap +[ 1.916141] 00000000: f7 95 aa ab 49 4b 59 23 f7 fd 89 ff 94 8b c1 e0 +[ 1.922629] 00000010: 8b 47 c2 3c b8 e1 c4 95 cb 1d 2e 8a 46 56 73 c1 +[ 1.929446] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 1.933109] mmc1: MAN_BKOPS_EN bit is not set +[ 1.939440] mmc1: new high speed MMC card at address 0001 +[ 1.941133] mmcblk0: mmc1:0001 P1XXXX 7.20 GiB +[ 1.946412] mmcblk0: p1 p2 p3 p4 p5 p6 +[ 1.954325] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 1.960748] alg: skcipher: setkey failed on test 5 for ecb-des-omap: flags=100 +[ 1.968539] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 +[ 1.976752] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 +[ 1.991540] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 2.016561] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 2.024416] remoteproc0: 58820000.ipu is available +[ 2.029324] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 2.038327] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 2.049001] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 +[ 2.055207] omap-rproc 55020000.ipu: device does not have specific CMA pool +[ 2.055215] remoteproc1: releasing 55020000.ipu +[ 2.055365] omap-rproc 40800000.dsp: device does not have specific CMA pool +[ 2.055372] remoteproc1: releasing 40800000.dsp +[ 2.055666] omap-rproc 41000000.dsp: device does not have specific CMA pool +[ 2.055672] remoteproc1: releasing 41000000.dsp +[ 2.057777] Netfilter messages via NETLINK v0.30. +[ 2.057894] nf_conntrack version 0.5.0 (16384 buckets, 65536 max) +[ 2.059961] ip_tables: (C) 2000-2006 Netfilter Core Team +[ 2.061237] Initializing XFRM netlink socket +[ 2.061274] NET: Registered protocol family 17 +[ 2.061314] NET: Registered protocol family 15 +[ 2.061354] Key type dns_resolver registered +[ 2.061368] NET: Registered protocol family 41 +[ 2.061580] omap_voltage_late_init: Voltage driver support not added +[ 2.061975] Power Management for TI OMAP4+ devices. +[ 2.063322] ThumbEE CPU extension supported. +[ 2.063344] Registering SWP/SWPB emulation handler +[ 2.156555] console [netcon0] enabled +[ 2.160239] netconsole: network logging started +[ 2.163051] remoteproc0: Falling back to user helper +[ 2.170354] rtc-ds3232 0-0068: setting system clock to 2018-10-03 00:39:23 UTC (1538527163) +[ 2.212462] XFS (mmcblk0p6): Mounting V4 Filesystem +[ 2.424087] XFS (mmcblk0p6): Ending clean mount +[ 2.428706] VFS: Mounted root (xfs filesystem) readonly on device 179:6. +[ 2.436998] devtmpfs: mounted +[ 2.441292] Freeing unused kernel memory: 1032K (c0846000 - c0948000) +[ 2.571603] random: systemd urandom read with 25 bits of entropy available +[ 2.582457] systemd[1]: systemd 215 running in system mode. (+PAM +AUDIT +SELINUX +IMA +SYSVINIT +LIBCRYPTSETUP +GCRYPT +ACL +XZ -SECCOMP -APPARMOR) +[ 2.596143] systemd[1]: Detected architecture 'arm'. + +Welcome to Debian GNU/Linux 8 (jessie)! + +[ 2.621341] systemd[1]: Failed to insert module 'ipv6' +[ 2.628482] systemd[1]: Set hostname to . +[ 2.847169] systemd[1]: Cannot add dependency job for unit dbus.socket, ignoring: Unit dbus.socket failed to load: No such file or directory. +[ 2.861912] systemd[1]: Starting Forward Password Requests to Wall Directory Watch. +[ 2.870069] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 2.877721] systemd[1]: Expecting device dev-ttyS2.device... + Expecting device dev-ttyS2.device... +[ 2.890336] systemd[1]: Starting Remote File Systems (Pre). +[ OK ] Reached target Remote File Systems (Pre). +[ 2.902374] systemd[1]: Reached target Remote File Systems (Pre). +[ 2.908596] systemd[1]: Starting Dispatch Password Requests to Console Directory Watch. +[ 2.916952] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 2.924949] systemd[1]: Starting Paths. +[ OK ] Reached target Paths. +[ 2.933336] systemd[1]: Reached target Paths. +[ 2.937848] systemd[1]: Starting Arbitrary Executable File Formats File System Automount Point. +[ OK ] Set up automount Arbitrary Executable File Formats F...utomount Point. +[ 2.957322] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point. +[ 2.966831] systemd[1]: Starting Encrypted Volumes. +[ OK ] Reached target Encrypted Volumes. +[ 2.978329] systemd[1]: Reached target Encrypted Volumes. +[ 2.983798] systemd[1]: Starting Swap. +[ OK ] Reached target Swap. +[ 2.992321] systemd[1]: Reached target Swap. +[ 2.996657] systemd[1]: Starting Root Slice. +[ OK ] Created slice Root Slice. +[ 3.007312] systemd[1]: Created slice Root Slice. +[ 3.012110] systemd[1]: Starting User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 3.024318] systemd[1]: Created slice User and Session Slice. +[ 3.030135] systemd[1]: Starting /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 3.045376] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 3.052417] systemd[1]: Starting Delayed Shutdown Socket. +[ OK ] Listening on Delayed Shutdown Socket. +[ 3.064283] systemd[1]: Listening on Delayed Shutdown Socket. +[ 3.070102] systemd[1]: Starting Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.082358] systemd[1]: Listening on Journal Socket (/dev/log). +[ 3.088371] systemd[1]: Starting udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 3.100360] systemd[1]: Listening on udev Control Socket. +[ 3.105849] systemd[1]: Starting udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 3.117323] systemd[1]: Listening on udev Kernel Socket. +[ 3.122713] systemd[1]: Starting Journal Socket. +[ OK ] Listening on Journal Socket. +[ 3.134349] systemd[1]: Listening on Journal Socket. +[ 3.139403] systemd[1]: Starting System Slice. +[ OK ] Created slice System Slice. +[ 3.150318] systemd[1]: Created slice System Slice. +[ 3.155269] systemd[1]: Starting system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 3.166356] systemd[1]: Created slice system-getty.slice. +[ 3.171826] systemd[1]: Starting system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 3.184278] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 3.190740] systemd[1]: Starting Increase datagram queue length... + Starting Increase datagram queue length... +[ 3.206414] systemd[1]: Starting Nameserver information manager... + Starting Nameserver information manager... +[ 3.223974] systemd[1]: Mounted Huge Pages File System. +[ 3.234703] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 3.249867] systemd[1]: Started Set Up Additional Binary Formats. +[ 3.256194] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 3.273755] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required static device nodes...rrent kernel... +[ 3.295219] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 3.308942] systemd[1]: Starting udev Coldplug all Devices... + Starting udev Coldplug all Devices... +[ 3.323465] systemd[1]: Starting Slices. +[ OK ] Reached target Slices. +[ 3.333407] systemd[1]: Reached target Slices. +[ 3.338292] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 3.354542] systemd[1]: Starting system-systemd\x2dfsck.slice. +[ OK ] Created slice system-systemd\x2dfsck.slice. +[ 3.375780] systemd[1]: Created slice system-systemd\x2dfsck.slice. +[ 3.382335] systemd[1]: Expecting device dev-disk-by\x2dpartlabel-primary_var.device... + Expecting device dev-disk-by\x2dpartlabel-primary_var.device... +[ OK ] Mounted Debug File System. +[ 3.410312] systemd[1]: Mounted Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 3.421321] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Started Increase datagram queue length. +[ 3.435381] systemd[1]: Started Increase datagram queue length. +[ OK ] Started Load Kernel Modules. +[ 3.457352] systemd[1]: Started Load Kernel Modules. +[ OK ] Started Create list of required static device nodes ...current kernel. +[ 3.475309] systemd[1]: Started Create list of required static device nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +[ 3.498381] systemd[1]: Started Remount Root and Kernel File Systems. +[ OK ] Started Nameserver information manager. +[ 3.520491] systemd[1]: Started Nameserver information manager. +[ OK ] Started udev Coldplug all Devices. +[ 3.693442] systemd[1]: Started udev Coldplug all Devices. +[ 3.775481] systemd[1]: Starting Create Static Device Nodes in /dev... + Starting Create Static Device Nodes in /dev... +[ 3.791780] systemd[1]: Mounted FUSE Control File System. +[ 3.797310] systemd[1]: Starting Apply Kernel Variables... + Starting Apply Kernel Variables... +[ 3.810986] systemd[1]: Mounting Configuration File System... + Mounting Configuration File System... +[ 3.825768] systemd[1]: Starting Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 3.838390] systemd[1]: Listening on Syslog Socket. +[ 3.843371] systemd[1]: Starting Sockets. +[ OK ] Reached target Sockets. +[ 3.852338] systemd[1]: Reached target Sockets. +[ 3.856957] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ OK ] Started Journal Service. +[ 3.874361] systemd[1]: Started Journal Service. +[ OK ] Mounted Configuration File System. +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /opt/peloton-tech/updates... +[ 3.967480] systemd-udevd[1772]: starting version 215 + Mounting /tmp... +[ OK ] Started udev Kernel Device Manager. +[ OK ] Mounted /tmp. +[ OK ] Mounted /opt/peloton-tech/updates. + Starting Copy rules generated while the root was ro... +[ OK ] Started Copy rules generated while the root was ro. +[ OK ] Found device /dev/ttyS2. +[ 4.458428] tmp102 0-0048: initialized +[ 4.466369] at24 0-0054: 65536 byte 24c512 EEPROM, writable, 128 bytes/write +[ 5.073430] CAN device driver interface +[ 5.209436] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=364) +[ 5.293958] c_can_platform 48480000.can: c_can_platform device registered (regs=fa480000, irq=365) +[ OK ] Created slice system-ifup.slice. +[ 5.792077] remoteproc0: powering up 58820000.ipu +[ 5.798293] remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 569816 +[ 5.835514] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 +[ OK ] Found device /dev/disk/by-partlabel/primary_var. +[ 5.869630] remoteproc0: remote processor 58820000.ipu is now up +[ 5.877430] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 5.886171] remoteproc0: registered virtio0 (type 7) + Starting File System Check on /dev/disk/by-partlabel/primary_var... +[ 5.949843] virtio_rpmsg_bus virtio0: creating channel rpmsg-pru addr 0x33 +[ 5.974856] rpmsg_pru rpmsg0: new rpmsg_pru device: /dev/rpmsg_pru51 +[ 5.981844] virtio_rpmsg_bus virtio0: creating channel rpmsg-pru addr 0x34 +[ 6.005750] rpmsg_pru rpmsg1: new rpmsg_pru device: /dev/rpmsg_pru52 +[ 6.012534] omap-rproc 58820000.ipu: received echo reply from 58820000.ipu +[ OK ] Started File System Check on /dev/disk/by-partlabel/primary_var. +[ 6.106654] systemd-fsck[1899]: /sbin/fsck.xfs: XFS file system. + Mounting /var... +[ 6.231181] XFS (mmcblk0p4): Mounting V4 Filesystem +[ 6.507082] random: nonblocking pool is initialized +[ 7.201542] XFS (mmcblk0p4): Starting recovery (logdev: internal) +[ 7.220208] XFS (mmcblk0p4): Ending recovery (logdev: internal) +[ OK ] Mounted /var. + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. +[ OK ] Reached target Remote File Systems. + Starting Trigger Flushing of Journal to Persistent Storage... + Starting Create Volatile Files and Directories... +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Volatile Files and Directories. +[ 7.334269] systemd-journald[1761]: Received request to flush runtime journal from PID 1 +[ OK ] Started Trigger Flushing of Journal to Persistent Storage. + Starting Restore time on boot... + Starting Update UTMP about System Boot/Shutdown... + Starting LSB: Raise network interfaces.... +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 7.613897] net can0: c_can_hw_raminit_wait_syscon: time out +[ 7.620000] c_can_platform 4ae3c000.can can0: setting BTR=1c04 BRPE=0000 +[ OK ] Started Restore time on boot. +[ 7.738878] c_can_platform 48480000.can can1: setting BTR=0504 BRPE=0000 +[ 7.826884] net eth1: initializing cpsw version 1.15 (0) +[ 7.892809] net eth1: phy found : id is : 0x2000a231 +[ 7.897968] cpsw-phy-sel 4a002554.cpsw-phy-sel: SLAVE 1 +[ 8.031425] net eth0: initializing cpsw version 1.15 (0) +[ 8.097170] net eth0: phy found : id is : 0x2000a231 +[ 8.102331] cpsw-phy-sel 4a002554.cpsw-phy-sel: SLAVE 0 +[ OK ] Started LSB: Raise network interfaces.. + Starting ifup for eth1... +[ OK ] Started ifup for eth1. + Starting ifup for eth0... +[ OK ] Started ifup for eth0. +[ OK ] Reached target Network. +[ OK ] Reached target Network is Online. +[ OK ] Reached target System Initialization. +[ OK ] Reached target Timers. +[ OK ] Reached target Basic System. + Starting Attach data ubi partition to QSPI userspace data partition... + Starting Run anacron jobs... +[ 8.254932] ubi0: attaching mtd9 +[ OK ] Started Run anacron jobs. + Starting Regular background program processing daemon... +[ OK ] Started Regular background program processing daemon. + Starting Enable netconsole... + Starting Rename booted partitions as 'primary' for u-boot... + Starting OpenBSD Secure Shell server... +[ OK ] Started OpenBSD Secure Shell server. + Starting Peloton's application runner and manager... + Starting getty on tty2-tty6 if dbus and logind are not available... + Starting System Logging Service... +[ 8.533516] ubi0: scanning is finished + Starting Permit User Sessions... +[ 8.569503] ubi0: attached mtd9 (name "QSPI.userspace", size 50 MiB) +[ 8.575904] ubi0: PEB size: 65536 bytes (64 KiB), LEB size: 65408 bytes +[ 8.587421] ubi0: min./max. I/O unit sizes: 1/256, sub-page size 1 +[ 8.598890] ubi0: VID header offset: 64 (aligned 64), data offset: 128 +[ 8.609472] ubi0: good PEBs: 802, bad PEBs: 0, corrupted PEBs: 0 +[ 8.619739] ubi0: user volume: 1, internal volumes: 1, max. volumes count: 128 +[ 8.629487] ubi0: max/mean erase counter: 23/11, WL threshold: 4096, image sequence number: 1290976078 +[ 8.640652] ubi0: available PEBs: 0, total reserved PEBs: 802, PEBs reserved for bad PEB handling: 0 +[ OK ] Started Permit User Sessions. +[ 8.652391] ubi0: background thread "ubi_bgt0d" started, PID 2194 +[ OK ] Started Attach data ubi partition to QSPI userspace data partition. +[ OK ] Started System Logging Service. + Starting Getty on tty4... +[ OK ] Started Getty on tty4. + Starting Getty on tty3... +[ OK ] Started Getty on tty3. + Starting Getty on tty2... +[ OK ] Started Getty on tty2. + Mounting Mount UBIFS partition on /spiroot... + Starting Getty on tty1... +[ OK ] Started Getty on tty1. + Starting Serial Getty on ttyS2... +[ OK ] Started Serial Getty on ttyS2. +[ 9.035359] UBIFS (ubi0:0): UBIFS: mounted UBI device 0, volume 0, name "userspace", R/O mode +[ 9.051079] UBIFS (ubi0:0): LEB size: 65408 bytes (63 KiB), min./max. I/O unit sizes: 8 bytes/256 bytes +[ 9.079197] UBIFS (ubi0:0): FS size: 51541504 bytes (49 MiB, 788 LEBs), journal size 2550912 bytes (2 MiB, 39 LEBs) +[ 9.079208] UBIFS (ubi0:0): reserved for root: 2434432 bytes (2377 KiB) +[ 9.079217] UBIFS (ubi0:0): media format: w4/r0 (latest is w4/r0), UUID E651EC8E-2DDD-4258-A8CF-FDF3B4EFA277, small LPT model +[ OK ] Started getty on tty2-tty6 if dbus and logind are not available. +[ OK ] Mounted Mount UBIFS partition on /spiroot. + Starting Bind-mount UBIFS hostname file on eMMC... +[ 9.286953] netpoll: netconsole: local port 6665 +[ 9.291686] netpoll: netconsole: local IPv4 address 169.254.254.9 +[ 9.311065] netpoll: netconsole: interface 'eth0' +[ 9.326303] netpoll: netconsole: remote port 6666 +[ 9.339471] netpoll: netconsole: remote IPv4 address 169.254.254.2 +[ 9.352980] netpoll: netconsole: remote ethernet address ff:ff:ff:ff:ff:ff + Starting Getty on tty6... +[ 9.395226] netconsole: netconsole: network logging started +[ OK ] Started Getty on tty6. + Starting Getty on tty5... +[ OK ] Started Getty on tty5. +[ OK ] Reached target Login Prompts. +[ OK ] Started Enable netconsole. +[ OK ] Started Peloton's application runner and manager. +[ OK ] Started Bind-mount UBIFS hostname file on eMMC. + Starting Set hostname as soon as /spiroot partition ...d is mounted... +[ OK ] Started Set hostname as soon as /spiroot partition w...red is mounted. +[ OK ] Started Rename booted partitions as 'primary' for u-boot. +[ OK ] Reached target Multi-User System. + Starting Update UTMP about System Runlevel Changes... +[ OK ] Started Update UTMP about System Runlevel Changes. +[ 11.633848] can: controller area network core (rev 20120528 abi 9) +[ 11.642821] NET: Registered protocol family 29 +[ 11.685988] can: raw protocol (rev 20120528) +[ 11.916579] cpsw 48484000.ethernet eth1: Link is Up - 1Gbps/Full - flow control rx/tx +[ 12.119919] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off + +Debian GNU/Linux 8 vpc168 ttyS2 + +vpc168 login: [ 918.848716] cpsw 48484000.ethernet eth0: Link is Down +[ 921.871863] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 935.920696] cpsw 48484000.ethernet eth0: Link is Down +[ 936.933674] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 942.959939] cpsw 48484000.ethernet eth0: Link is Down +[ 944.977621] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 961.032535] cpsw 48484000.ethernet eth0: Link is Down +[ 963.050661] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +ro[ 1833.651292] cpsw 48484000.ethernet eth0: Link is Down +ot +[ 1836.676138] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 1850.726012] cpsw 48484000.ethernet eth0: Link is Down +[ 1851.737938] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 1857.762779] cpsw 48484000.ethernet eth0: Link is Down +[ 1859.779769] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 1875.836812] cpsw 48484000.ethernet eth0: Link is Down +[ 1878.860640] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 2035.587470] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.597375] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.602904] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.608429] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.613952] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.619475] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.624996] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.631089] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.636621] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2035.642143] rpmsg_pru rpmsg0: Not enough space on the FIFO +[ 2585.173343] ------------[ cut here ]------------ +[ 2585.173350] Kernel BUG at c04a25a0 [verbose debug info unavailable] +[ 2585.173356] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM +[ 2585.173377] Modules linked in: can_raw can c_can_platform c_can can_dev at24 tmp102 +[ 2585.173386] CPU: 1 PID: 898 Comm: mmcqd/1 Not tainted 4.1.18-rt17+ #20 +[ 2585.173390] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 2585.173395] task: ef29f500 ti: eeaf2000 task.ti: eeaf2000 +[ 2585.173406] PC is at omap_hsmmc_request+0x330/0x550 +[ 2585.173419] LR is at mmc_start_request+0x158/0x288 +[ 2585.173425] pc : [] lr : [] psr: 20070113 +[ 2585.173425] sp : eeaf3d80 ip : eeaf3de8 fp : eeaf3de4 +[ 2585.173429] r10: 00000000 r9 : ef37dc1c r8 : ef37dd50 +[ 2585.173434] r7 : ef37dc48 r6 : c09d7a28 r5 : ee85e000 r4 : ee85e000 +[ 2585.173438] r3 : 00000001 r2 : 00000000 r1 : ef37dc48 r0 : ee85e000 +[ 2585.173444] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel +[ 2585.173449] Control: 30c5387d Table: aeb96180 DAC: 55555555 +[ 2585.173453] Process mmcqd/1 (pid: 898, stack limit = 0xeeaf2218) +[ 2585.173458] Stack: (0xeeaf3d80 to 0xeeaf4000) +[ 2585.173466] 3d80: eeae8000 00000001 d9000000 c001f53c ef37dd0c c0959b9c 00000000 ee85e41c +[ 2585.173473] 3da0: ef2e2610 00000000 eeaf3dfc eeaf3db8 c04a0b6c c001f548 00000000 ef37dc48 +[ 2585.173479] 3dc0: ee85e000 c09d7a28 ef37dc48 ef37dd50 ef37dc1c 00000000 eeaf3e1c eeaf3de8 +[ 2585.173485] 3de0: c0487f90 c04a227c ef37dc1c 00000000 eeaf3e1c eeaf3e00 c04a0c94 ee85e000 +[ 2585.173492] 3e00: 00000000 ef37dc44 ef37dd50 ef37dc1c eeaf3e6c eeaf3e20 c0488f90 c0487e44 +[ 2585.173498] 3e20: eeaf3e6c eeaf3e30 c04989c0 c049bb7c 00000000 ef37dc1c ef37dd0c ef37dc00 +[ 2585.173504] 3e40: eeaf3e6c d8151410 ef37dd50 ef37dc44 00000000 00000000 ef37dc1c ef012800 +[ 2585.173511] 3e60: eeaf3ed4 eeaf3e70 c0498de0 c0488cd8 ee85e330 ee85e000 00000001 c006575c +[ 2585.173517] 3e80: ee85e330 ee85e000 ef37dc00 00000000 00000001 00000000 ef37dc00 00000000 +[ 2585.173523] 3ea0: ef29f500 00000003 eeaf3ed4 ef012800 ef37dc1c ee85e330 ee85e000 ef37dc00 +[ 2585.173529] 3ec0: d8151410 00000000 eeaf3f24 eeaf3ed8 c049965c c0498a88 c049af78 00000000 +[ 2585.173536] 3ee0: eeaf3f04 eeaf3ef0 c0063b68 c00e7e84 ee85e000 00000000 eeaf3f24 ef37dc1c +[ 2585.173543] 3f00: 00000000 eead8000 c049af2c c049af78 d8151410 eeaf2000 eeaf3f5c eeaf3f28 +[ 2585.173549] 3f20: c049b040 c049955c ef29f500 ef37dc24 c049aecc 00000000 ef3d4800 ef37dc1c +[ 2585.173556] 3f40: c049aecc 00000000 00000000 00000000 eeaf3fac eeaf3f60 c005ade8 c049aed8 +[ 2585.173563] 3f60: 00000000 00000000 00000000 ef37dc1c 00000000 00000000 eeaf3f78 eeaf3f78 +[ 2585.173569] 3f80: 00000000 00000000 eeaf3f88 eeaf3f88 ef3d4800 c005ad00 00000000 00000000 +[ 2585.173575] 3fa0: 00000000 eeaf3fb0 c00109b8 c005ad0c 00000000 00000000 00000000 00000000 +[ 2585.173581] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 +[ 2585.173588] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 +[ 2585.173603] [] (omap_hsmmc_request) from [] (mmc_start_request+0x158/0x288) +[ 2585.173617] [] (mmc_start_request) from [] (mmc_start_req+0x2c4/0x3d8) +[ 2585.173631] [] (mmc_start_req) from [] (mmc_blk_issue_rw_rq+0x364/0xad4) +[ 2585.173642] [] (mmc_blk_issue_rw_rq) from [] (mmc_blk_issue_rq+0x10c/0x4e4) +[ 2585.173654] [] (mmc_blk_issue_rq) from [] (mmc_queue_thread+0x174/0x1c8) +[ 2585.173667] [] (mmc_queue_thread) from [] (kthread+0xe8/0x104) +[ 2585.173680] [] (kthread) from [] (ret_from_fork+0x14/0x3c) +[ 2585.173690] Code: e34c1078 e5930000 ebfd3a07 eaffffb8 (e7f001f2) +[ 2585.508425] ---[ end trace 0000000000000002 ]--- +[ 2585.508432] Kernel panic - not syncing: Fatal exception +[ 2585.508439] CPU0: stopping +[ 2585.508447] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D 4.1.18-rt17+ #20 +[ 2585.508450] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 2585.508465] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) +[ 2585.508477] [] (show_stack) from [] (dump_stack+0xb4/0xe4) +[ 2585.508486] [] (dump_stack) from [] (handle_IPI+0x308/0x360) +[ 2585.508494] [] (handle_IPI) from [] (gic_handle_irq+0x68/0x6c) +[ 2585.508502] [] (gic_handle_irq) from [] (__irq_svc+0x44/0x90) +[ 2585.508505] Exception stack(0xc0949f18 to 0xc0949f60) +[ 2585.508510] 9f00: ef6c9840 00000000 +[ 2585.508517] 9f20: 00000000 c095500c 00000001 c0948000 c09540f8 c0954000 c09cbc84 c05bb6e8 +[ 2585.508522] 9f40: c08b75ec c0949f6c c0949f60 c0949f60 c0011524 c0011528 60070013 ffffffff +[ 2585.508532] [] (__irq_svc) from [] (arch_cpu_idle+0x34/0x4c) +[ 2585.508542] [] (arch_cpu_idle) from [] (cpu_startup_entry+0x1b4/0x350) +[ 2585.508550] [] (cpu_startup_entry) from [] (rest_init+0x98/0x9c) +[ 2585.508560] [] (rest_init) from [] (start_kernel+0x390/0x39c) + + Here is the console log that shows the crash if that helps. + +Hi, -1- Could you get logs with CONFIG_MMC_DEBUG config enabled in kernel? this might also need increasing the loglevel (append loglevel=9 to Kernel bootargs) to see the MMC_DEBUG logs. -2- The update operation is performed on SD card or eMMC? -3- Could you share the command used? I can try it on TI EVM to see if it can be reproduced. Regards, Vishal + +Hi Vishal, I was on vacation this week. We'll try to gather some data with additional kernel options and get back to you. However, we can answer some questions: -2- The update is performed on eMMC. -3- The command is a swupdate invocation: I don't have an invocation for you because it would require a _lot_ of setup. We'll see if we can reproduce this using dd(1) or something like that. Thanks, Phil + +Hi Philip, Could you try testing with the attached patch? 0001-mmc-host-omap_hsmmc-Fix-ADMA-descriptor-table-alloca.patch Regards, Vishal + +Hi Vishal, Thank you very much, we will definitely try this out. I've been asked to prioritize other things so it'll be a week or so before I can get back to you with any results. Thanks a lot for your thoughts! Philipp + +Actually, looks like the patch you posted only applies to Linux 4.4 onwards. Since we're on 4.1 we don't have ADMA2 support. + +Yes, you are right. In that case we would need the previously requested information. + +Hi Philip, Could you open a new question when you work on this issue again? Closing it for now. + diff --git a/data2/text/range/30001+/733740.txt b/data2/text/range/30001+/733740.txt new file mode 100644 index 0000000000000000000000000000000000000000..b55b65ec4040fe7938ff1323d9e44f4ceb9252f4 --- /dev/null +++ b/data2/text/range/30001+/733740.txt @@ -0,0 +1,12 @@ +Ticket Name: RTOS/TDA2: VPE drop many frame + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: INA226 Tool/software: TI-RTOS Hi, The usecase is below. ========================================================================================= Capture -> VPE -> Dup_capture -> Merge_alg Dup_capture -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) Alg_tidl_Eve2 (EVE2) -> Merge_OD (DSP1) Alg_tidl_Eve3 (EVE3) -> Merge_OD (DSP1) Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge_alg Dup_capture -> Alg_ImagePreProcess (EVE4) -> Alg_ImgPyramid -> Alg_LaneDetect (DSP1) -> Merge_alg Merge_alg -> Sync -> Alg_ObjectDraw -> Display ========================================================================================= The performance log is below. ************************************************************************************************************************************* [IPU1-0] 31.395229 s: [IPU1-0] 31.395290 s: CPU [IPU1-0 ] Statistics, [IPU1-0] 31.395351 s: ************************* [IPU1-0] 31.395412 s: [IPU1-0] 31.395473 s: LOAD: CPU: 7.3% HWI: 1.1%, SWI:0.8%, Low Power: 89.2% [IPU1-0] 31.395595 s: [IPU1-0] 31.395717 s: LOAD: TSK: SYNC0 : 0.1% [IPU1-0] 31.395809 s: LOAD: TSK: CAPTURE : 0.2% [IPU1-0] 31.395900 s: LOAD: TSK: VPE0 : 0.8% [IPU1-0] 31.396022 s: LOAD: TSK: STAT_COLL : 2.9% [IPU1-0] 31.396114 s: LOAD: TSK: MISC : 1.4% [IPU1-0] 31.396205 s: [IPU1-0] 31.396266 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.396358 s: [IPU1-0] 31.396388 s: SYSTEM: Sempahores Objects, 158 of 1050 free [IPU1-0] 31.396480 s: SYSTEM: Task Objects , 17 of 100 free [IPU1-0] 31.396571 s: SYSTEM: Clock Objects , 93 of 100 free [IPU1-0] 31.396663 s: SYSTEM: Hwi Objects , 89 of 100 free [IPU1-0] 31.396724 s: [IPU1-0] 31.396785 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 239104 B (233 KB) [IPU1-0] 31.396937 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 31.397059 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 223514624 B (213 MB) [IPU1-0] 31.397242 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 31.397425 s: [IPU1-0] 31.397456 s: [IPU1-0] 31.397486 s: CPU [IPU1-1 ] Statistics, [IPU1-0] 31.397547 s: ************************* [IPU1-0] 31.397608 s: [IPU1-0] 31.397669 s: LOAD: CPU: 1.2% HWI: 0.7%, SWI:0.3%, Low Power: 87.9% [IPU1-0] 31.397791 s: [IPU1-0] 31.397913 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 31.397974 s: [IPU1-0] 31.398005 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.398096 s: [IPU1-0] 31.398127 s: SYSTEM: Sempahores Objects, 430 of 1050 free [IPU1-0] 31.398401 s: SYSTEM: Task Objects , 36 of 100 free [IPU1-0] 31.398493 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 31.398584 s: SYSTEM: Hwi Objects , 98 of 100 free [IPU1-0] 31.398676 s: [IPU1-0] 31.398706 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643240 B (628 KB) [IPU1-0] 31.398859 s: [IPU1-0] 31.398889 s: [IPU1-0] 31.398920 s: CPU [HOST ] Statistics, [IPU1-0] 31.398981 s: ************************* [IPU1-0] 31.399042 s: [IPU1-0] 31.399103 s: LOAD: CPU: 0.7% HWI: 0.0%, SWI:0.0%, Low Power: 96.8% [IPU1-0] 31.399255 s: [IPU1-0] 31.399347 s: LOAD: TSK: MISC : 0.7% [IPU1-0] 31.399438 s: [IPU1-0] 31.399469 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.399560 s: [IPU1-0] 31.399591 s: SYSTEM: Sempahores Objects, 429 of 1050 free [IPU1-0] 31.399682 s: SYSTEM: Task Objects , 37 of 100 free [IPU1-0] 31.399774 s: SYSTEM: Clock Objects , 96 of 100 free [IPU1-0] 31.399865 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 31.399926 s: [IPU1-0] 31.399987 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6237600 B (6091 KB) [IPU1-0] 31.400140 s: [IPU1-0] 31.400170 s: [IPU1-0] 31.400231 s: CPU [DSP1 ] Statistics, [IPU1-0] 31.400292 s: ************************* [IPU1-0] 31.400353 s: [IPU1-0] 31.400414 s: LOAD: CPU: 0.9% HWI: 0.1%, SWI:0.0%, Low Power: 96.9% [IPU1-0] 31.400536 s: [IPU1-0] 31.400597 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 0.6% [IPU1-0] 31.400689 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 31.400780 s: [IPU1-0] 31.400811 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.400902 s: [IPU1-0] 31.400933 s: SYSTEM: Sempahores Objects, 441 of 1050 free [IPU1-0] 31.401024 s: SYSTEM: Task Objects , 91 of 100 free [IPU1-0] 31.401085 s: SYSTEM: Clock Objects , 97 of 100 free [IPU1-0] 31.401177 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 31.401299 s: [IPU1-0] 31.401329 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 42944 B (41 KB) [IPU1-0] 31.401482 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 494440 B (482 KB) [IPU1-0] 31.401665 s: [IPU1-0] 31.401695 s: [IPU1-0] 31.401726 s: CPU [DSP2 ] Statistics, [IPU1-0] 31.401787 s: ************************* [IPU1-0] 31.401848 s: [IPU1-0] 31.401878 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 97.6% [IPU1-0] 31.402031 s: [IPU1-0] 31.402061 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 31.402153 s: [IPU1-0] 31.402183 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.402305 s: [IPU1-0] 31.402336 s: SYSTEM: Sempahores Objects, 446 of 1050 free [IPU1-0] 31.402427 s: SYSTEM: Task Objects , 91 of 100 free [IPU1-0] 31.402519 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 31.402580 s: SYSTEM: Hwi Objects , 100 of 100 free [IPU1-0] 31.402671 s: [IPU1-0] 31.402702 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [IPU1-0] 31.402885 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514544 B (502 KB) [IPU1-0] 31.403037 s: [IPU1-0] 31.403068 s: [IPU1-0] 31.403098 s: CPU [EVE1 ] Statistics, [IPU1-0] 31.403159 s: ************************* [IPU1-0] 31.403464 s: [IPU1-0] 31.403525 s: LOAD: CPU: 3.9% HWI: 0.2%, SWI:0.1%, Low Power: 90.5% [IPU1-0] 31.403678 s: [IPU1-0] 31.403708 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 3.3% [IPU1-0] 31.403830 s: LOAD: TSK: MISC : 0.3% [IPU1-0] 31.403891 s: [IPU1-0] 31.403952 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.404013 s: [IPU1-0] 31.404044 s: SYSTEM: Sempahores Objects, 446 of 1050 free [IPU1-0] 31.404135 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 31.404257 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 31.404349 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 31.404440 s: [IPU1-0] 31.404471 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [IPU1-0] 31.404623 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235632 B (230 KB) [IPU1-0] 31.404776 s: [IPU1-0] 31.404837 s: [IPU1-0] 31.404867 s: CPU [EVE2 ] Statistics, [IPU1-0] 31.404928 s: ************************* [IPU1-0] 31.404959 s: [IPU1-0] 31.405020 s: LOAD: CPU: 3.9% HWI: 0.2%, SWI:0.1%, Low Power: 89.2% [IPU1-0] 31.405172 s: [IPU1-0] 31.405203 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 3.3% [IPU1-0] 31.405325 s: LOAD: TSK: MISC : 0.3% [IPU1-0] 31.405416 s: [IPU1-0] 31.405447 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.405538 s: [IPU1-0] 31.405569 s: SYSTEM: Sempahores Objects, 446 of 1050 free [IPU1-0] 31.405660 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 31.405752 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 31.405813 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 31.405904 s: [IPU1-0] 31.405965 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [IPU1-0] 31.406118 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235632 B (230 KB) [IPU1-0] 31.406301 s: [IPU1-0] 31.406331 s: [IPU1-0] 31.406392 s: CPU [EVE3 ] Statistics, [IPU1-0] 31.406453 s: ************************* [IPU1-0] 31.406484 s: [IPU1-0] 31.406545 s: LOAD: CPU: 3.8% HWI: 0.2%, SWI:0.1%, Low Power: 88.0% [IPU1-0] 31.406697 s: [IPU1-0] 31.406728 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 3.2% [IPU1-0] 31.406850 s: LOAD: TSK: MISC : 0.3% [IPU1-0] 31.406911 s: [IPU1-0] 31.406941 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.407033 s: [IPU1-0] 31.407063 s: SYSTEM: Sempahores Objects, 446 of 1050 free [IPU1-0] 31.407155 s: SYSTEM: Task Objects , 92 of 100 free [IPU1-0] 31.407277 s: SYSTEM: Clock Objects , 98 of 100 free [IPU1-0] 31.407368 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 31.407430 s: [IPU1-0] 31.407491 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [IPU1-0] 31.407643 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235632 B (230 KB) [IPU1-0] 31.407796 s: [IPU1-0] 31.407826 s: [IPU1-0] 31.407857 s: CPU [EVE4 ] Statistics, [IPU1-0] 31.407918 s: ************************* [IPU1-0] 31.407979 s: CPU: EVE4: Unable to get CPU statistics !!! [IPU1-0] 31.408040 s: [IPU1-0] 31.408101 s: [IPU1-0] 31.408131 s: [IPU1-0] 31.408162 s: CPU [IPU2 ] Statistics, [IPU1-0] 31.408406 s: ************************* [IPU1-0] 31.408467 s: [IPU1-0] 31.408528 s: LOAD: CPU: 0.9% HWI: 0.4%, SWI:0.3%, Low Power: 95.1% [IPU1-0] 31.408650 s: [IPU1-0] 31.408772 s: LOAD: TSK: MISC : 0.2% [IPU1-0] 31.408833 s: [IPU1-0] 31.408894 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 31.408955 s: [IPU1-0] 31.409016 s: SYSTEM: Sempahores Objects, 432 of 1050 free [IPU1-0] 31.409077 s: SYSTEM: Task Objects , 38 of 100 free [IPU1-0] 31.409168 s: SYSTEM: Clock Objects , 99 of 100 free [IPU1-0] 31.409290 s: SYSTEM: Hwi Objects , 99 of 100 free [IPU1-0] 31.409382 s: [IPU1-0] 31.409412 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250064 B (244 KB) [IPU1-0] 31.409565 s: [IPU1-0] 31.409839 s: [IPU1-0] 31.409900 s: UTILS_PRCM_STATS: Current Temperature, [IPU1-0] 31.409961 s: [IPU1-0] 31.409992 s: Voltage Rail || Curr Temp Min - Max [IPU1-0] 31.410083 s: --------------------------------------------------------- [IPU1-0] 31.410175 s: PMHAL_PRCM_VD_MPU || [38.800 , 39.200] [IPU1-0] 31.410327 s: PMHAL_PRCM_VD_CORE || [40.400 , 40.800] [IPU1-0] 31.410419 s: PMHAL_PRCM_VD_IVAHD || [41.200 , 41.600] [IPU1-0] 31.410541 s: PMHAL_PRCM_VD_DSPEVE || [38.800 , 39.200] [IPU1-0] 31.410632 s: PMHAL_PRCM_VD_GPU || [39.200 , 39.600] [IPU1-0] 31.410724 s: [IPU1-0] 31.410785 s: ============================================================================ [IPU1-0] 31.410876 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) [IPU1-0] 31.410968 s: ---------------------------------------------------------------------------- [IPU1-0] 31.412432 s: UTILS_PRCM_STATS: Reading the regulator data failed [IPU1-0] 31.412523 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! [IPU1-0] 31.412706 s: [IPU1-0] 31.412767 s: Statistics Collector, [IPU1-0] 31.412828 s: [IPU1-0] 31.412859 s: STATISTIC Avg Data Peak Data [IPU1-0] 31.412920 s: COLLECTOR MB/s MB/s [IPU1-0] 31.413011 s: -------------------------------------------------- [IPU1-0] 31.413103 s: SCI_EMIF1 RD+WR | 159.170387 2010.534479 [IPU1-0] 31.413865 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 [IPU1-0] 31.414018 s: SCI_EMIF1 RD ONLY | 80.486130 1061.748370 [IPU1-0] 31.414109 s: SCI_EMIF1 WR ONLY | 78.772003 2007.493104 [IPU1-0] 31.414262 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 [IPU1-0] 31.414384 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 [IPU1-0] 31.414475 s: SCI_MA_MPU_P1 | 2.150765 1775.082864 [IPU1-0] 31.414597 s: SCI_MA_MPU_P2 | 0.000000 0.000000 [IPU1-0] 31.414689 s: SCI_DSS | 0.000000 0.000000 [IPU1-0] 31.414963 s: SCI_IPU1 | 10.615027 151.644001 [IPU1-0] 31.415085 s: SCI_VIP1_P1 | 0.932323 5.869670 [IPU1-0] 31.415177 s: SCI_VIP1_P2 | 1.865085 11.584875 [IPU1-0] 31.415329 s: SCI_VPE_P1 | 2.292507 63.566338 [IPU1-0] 31.415421 s: SCI_VPE_P2 | 2.292596 63.566338 [IPU1-0] 31.415543 s: SCI_DSP1_MDMA | 2.944789 1182.023990 [IPU1-0] 31.415634 s: SCI_DSP1_EDMA | 0.474285 144.389444 [IPU1-0] 31.415726 s: SCI_DSP2_MDMA | 0.104326 20.650040 [IPU1-0] 31.415848 s: SCI_DSP2_EDMA | 0.000000 0.000000 [IPU1-0] 31.415939 s: SCI_EVE1_TC0 | 17.166832 709.492203 [IPU1-0] 31.416061 s: SCI_EVE1_TC1 | 12.789403 1139.333869 [IPU1-0] 31.416153 s: SCI_EVE2_TC0 | 16.769397 711.781687 [IPU1-0] 31.416366 s: SCI_EVE2_TC1 | 12.789144 1138.616553 [IPU1-0] 31.416488 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 [IPU1-0] 31.416580 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 [IPU1-0] 31.416671 s: SCI_EDMA_TC1_RD | 0.350906 7.267493 [IPU1-0] 31.416793 s: SCI_EDMA_TC1_WR | 0.360943 7.494602 [IPU1-0] 31.416885 s: SCI_VIP2_P1 | 0.000000 0.000000 [IPU1-0] 31.416976 s: SCI_VIP2_P2 | 0.000000 0.000000 [IPU1-0] 31.417068 s: SCI_VIP3_P1 | 0.000000 0.000000 [IPU1-0] 31.417190 s: SCI_VIP3_P2 | 0.000000 0.000000 [IPU1-0] 31.417312 s: SCI_EVE3_TC0 | 0.000000 0.000000 [IPU1-0] 31.417403 s: SCI_EVE3_TC1 | 0.000000 0.000000 [IPU1-0] 31.417495 s: SCI_EVE4_TC0 | 0.000000 0.000000 [IPU1-0] 31.417586 s: SCI_EVE4_TC1 | 0.000000 0.000000 [IPU1-0] 31.417678 s: SCI_IVA | 0.000000 0.000000 [IPU1-0] 31.417800 s: SCI_GPU_P1 | 0.000000 0.000000 [IPU1-0] 31.417891 s: SCI_GPU_P2 | 0.000000 0.000000 [IPU1-0] 31.417983 s: SCI_GMAC_SW | 0.000000 0.000000 [IPU1-0] 31.418074 s: SCI_OCMC_RAM1 | 0.000000 0.000000 [IPU1-0] 31.418166 s: SCI_OCMC_RAM2 | 0.000000 0.000000 [IPU1-0] 31.418471 s: SCI_OCMC_RAM3 | 0.000000 0.000000 [IPU1-0] 31.518391 s: [IPU1-0] 31.518452 s: [IPU1-0] 31.518575 s: [IPU1-0] 31.518605 s: ### CPU [IPU1-0], LinkID [ 69], [IPU1-0] 31.518697 s: [IPU1-0] 31.518727 s: [ CAPTURE ] Link Statistics, [IPU1-0] 31.518788 s: ****************************** [IPU1-0] 31.518849 s: [IPU1-0] 31.518880 s: Elapsed time = 9937 msec [IPU1-0] 31.518941 s: [IPU1-0] 31.519002 s: New data Recv = 29.98 fps [IPU1-0] 31.519063 s: Get Full Buf Cb = 30.8 fps [IPU1-0] 31.519124 s: Put Empty Buf Cb = 30.8 fps [IPU1-0] 31.519246 s: Driver/Notify Cb = 29.98 fps [IPU1-0] 31.519307 s: [IPU1-0] 31.519368 s: Input Statistics, [IPU1-0] 31.519398 s: [IPU1-0] 31.519459 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 31.519520 s: | FPS | FPS | FPS | FPS [IPU1-0] 31.519612 s: -------------------------------------------------- [IPU1-0] 31.519673 s: 0 | 30. 8 0. 0 0. 0 30. 8 [IPU1-0] 31.519795 s: [IPU1-0] 31.519825 s: Output Statistics, [IPU1-0] 31.519886 s: [IPU1-0] 31.519917 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 31.520008 s: | ID | FPS | FPS | FPS [IPU1-0] 31.520069 s: --------------------------------------------- [IPU1-0] 31.520130 s: 0 | 0 30. 8 0. 0 0. 0 [IPU1-0] 31.520283 s: [IPU1-0] 31.520344 s: [ CAPTURE ] LATENCY, [IPU1-0] 31.520374 s: ******************** [IPU1-0] 31.520435 s: [IPU1-0] 31.520527 s: [IPU1-0] 31.520588 s: ### CPU [IPU1-0], LinkID [ 76], [IPU1-0] 31.520649 s: [IPU1-0] 31.520679 s: [ VPE ] Link Statistics, [IPU1-0] 31.520740 s: ****************************** [IPU1-0] 31.520862 s: [IPU1-0] 31.520893 s: Elapsed time = 9939 msec [IPU1-0] 31.520954 s: [IPU1-0] 31.521015 s: New data Recv = 30.8 fps [IPU1-0] 31.521076 s: Get Full Buf Cb = 0.60 fps [IPU1-0] 31.521137 s: Put Empty Buf Cb = 1.20 fps [IPU1-0] 31.521259 s: Driver/Notify Cb = 30.8 fps [IPU1-0] 31.521320 s: [IPU1-0] 31.521350 s: Input Statistics, [IPU1-0] 31.521411 s: [IPU1-0] 31.521442 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 31.521533 s: | FPS | FPS | FPS | FPS [IPU1-0] 31.521594 s: -------------------------------------------------- [IPU1-0] 31.521686 s: 0 | 30. 8 0. 0 0. 0 0.60 [IPU1-0] 31.521808 s: [IPU1-0] 31.521838 s: Output Statistics, [IPU1-0] 31.521899 s: [IPU1-0] 31.521930 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 31.521991 s: | ID | FPS | FPS | FPS [IPU1-0] 31.522052 s: --------------------------------------------- [IPU1-0] 31.522143 s: 0 | 0 0.60 29.47 0. 0 [IPU1-0] 31.522265 s: [IPU1-0] 31.522326 s: [ VPE ] LATENCY, [IPU1-0] 31.522357 s: ******************** [IPU1-0] 31.522418 s: Local Link Latency : Avg = 1286 us, Min = 1281 us, Max = 1311 us, [IPU1-0] 31.522540 s: Source to Link Latency : Avg = 1433 us, Min = 1403 us, Max = 1464 us, [IPU1-0] 31.522631 s: [IPU1-0] 31.522692 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! [IPU1-0] 31.522845 s: [IPU1-0] 31.522906 s: ### CPU [IPU1-0], LinkID [ 1], [IPU1-0] 31.522967 s: [IPU1-0] 31.522997 s: [ IPC_OUT_1 ] Link Statistics, [IPU1-0] 31.523058 s: ****************************** [IPU1-0] 31.523119 s: [IPU1-0] 31.523180 s: Elapsed time = 9939 msec [IPU1-0] 31.523424 s: [IPU1-0] 31.523455 s: New data Recv = 0.60 fps [IPU1-0] 31.523546 s: Driver/Notify Cb = 100.1 fps [IPU1-0] 31.523607 s: [IPU1-0] 31.523638 s: Input Statistics, [IPU1-0] 31.523699 s: [IPU1-0] 31.523729 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 31.523821 s: | FPS | FPS | FPS | FPS [IPU1-0] 31.523882 s: -------------------------------------------------- [IPU1-0] 31.523943 s: 0 | 0.60 0. 0 0. 0 0.60 [IPU1-0] 31.524095 s: [IPU1-0] 31.524126 s: Output Statistics, [IPU1-0] 31.524156 s: [IPU1-0] 31.524248 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 31.524309 s: | ID | FPS | FPS | FPS [IPU1-0] 31.524400 s: --------------------------------------------- [IPU1-0] 31.524461 s: 0 | 0 0.60 0. 0 0. 0 [IPU1-0] 31.524583 s: [IPU1-0] 31.524614 s: [ IPC_OUT_1 ] LATENCY, [IPU1-0] 31.524675 s: ******************** [IPU1-0] 31.524705 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 31.524827 s: Source to Link Latency : Avg = 1850 us, Min = 1830 us, Max = 1861 us, [IPU1-0] 31.524949 s: [IPU1-0] 32.024339 s: [IPU1-0] 32.024400 s: ### CPU [ EVE4], LinkID [ 10], [IPU1-0] 32.024461 s: [IPU1-0] 32.024522 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 32.024583 s: ****************************** [IPU1-0] 32.024644 s: [IPU1-0] 32.024675 s: Elapsed time = 10441 msec [IPU1-0] 32.024736 s: [IPU1-0] 32.024766 s: Get Full Buf Cb = 0.9 fps [IPU1-0] 32.024858 s: Driver/Notify Cb = 0.47 fps [IPU1-0] 32.024919 s: [IPU1-0] 32.024949 s: Input Statistics, [IPU1-0] 32.025010 s: [IPU1-0] 32.025041 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.025132 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.025193 s: -------------------------------------------------- [IPU1-0] 32.025285 s: 0 | 0. 9 0. 0 0. 0 0. 9 [IPU1-0] 32.025437 s: [IPU1-0] 32.025468 s: Output Statistics, [IPU1-0] 32.025529 s: [IPU1-0] 32.025559 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.025620 s: | ID | FPS | FPS | FPS [IPU1-0] 32.025712 s: --------------------------------------------- [IPU1-0] 32.025773 s: 0 | 0 0. 9 0. 0 0. 0 [IPU1-0] 32.025895 s: [IPU1-0] 32.025925 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 32.025986 s: ******************** [IPU1-0] 32.026047 s: Local Link Latency : Avg = 31 us, Min = 31 us, Max = 31 us, [IPU1-0] 32.026139 s: Source to Link Latency : Avg = 2165 us, Min = 2165 us, Max = 2165 us, [IPU1-0] 32.026291 s: [IPU1-0] 32.026383 s: [IPU1-0] 32.026444 s: ### CPU [ EVE4], LinkID [ 49], [IPU1-0] 32.026505 s: [IPU1-0] 32.026535 s: [ ALG_IMAGEPREPROCESS ] Link Statistics, [IPU1-0] 32.026627 s: ****************************** [IPU1-0] 32.026688 s: [IPU1-0] 32.026718 s: Elapsed time = 10442 msec [IPU1-0] 32.026779 s: [IPU1-0] 32.026840 s: New data Recv = 0.9 fps [IPU1-0] 32.026901 s: [IPU1-0] 32.026932 s: Input Statistics, [IPU1-0] 32.026993 s: [IPU1-0] 32.027023 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.027084 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.027176 s: -------------------------------------------------- [IPU1-0] 32.027267 s: 0 | 0. 9 0. 0 0. 0 0. 0 [IPU1-0] 32.027450 s: [IPU1-0] 32.027511 s: Output Statistics, [IPU1-0] 32.027542 s: [IPU1-0] 32.027572 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.027664 s: | ID | FPS | FPS | FPS [IPU1-0] 32.027725 s: --------------------------------------------- [IPU1-0] 32.027786 s: [IPU1-0] 32.027847 s: [ ALG_IMAGEPREPROCESS ] LATENCY, [IPU1-0] 32.027908 s: ******************** [IPU1-0] 32.027969 s: [IPU1-0] 32.028060 s: [IPU1-0] 32.028091 s: ### CPU [ EVE4], LinkID [ 0], [IPU1-0] 32.028182 s: [IPU1-0] 32.028213 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 32.028457 s: ****************************** [IPU1-0] 32.028548 s: [IPU1-0] 32.028579 s: Elapsed time = 16644 msec [IPU1-0] 32.028640 s: [IPU1-0] 32.028670 s: Driver/Notify Cb = 6.24 fps [IPU1-0] 32.028762 s: [IPU1-0] 32.028792 s: Input Statistics, [IPU1-0] 32.028823 s: [IPU1-0] 32.028884 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.028945 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.029036 s: -------------------------------------------------- [IPU1-0] 32.029097 s: [IPU1-0] 32.029128 s: Output Statistics, [IPU1-0] 32.029189 s: [IPU1-0] 32.029250 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.029341 s: | ID | FPS | FPS | FPS [IPU1-0] 32.029402 s: --------------------------------------------- [IPU1-0] 32.029494 s: [IPU1-0] 32.029524 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 32.029585 s: ******************** [IPU1-0] 32.029646 s: [IPU1-0] 32.529341 s: [IPU1-0] 32.529402 s: ### CPU [IPU1-0], LinkID [ 11], [IPU1-0] 32.529494 s: [IPU1-0] 32.529524 s: [ IPC_IN_1 ] Link Statistics, [IPU1-0] 32.529585 s: ****************************** [IPU1-0] 32.529646 s: [IPU1-0] 32.529677 s: Elapsed time = 17143 msec [IPU1-0] 32.529738 s: [IPU1-0] 32.529799 s: [IPU1-0] 32.529829 s: Input Statistics, [IPU1-0] 32.529890 s: [IPU1-0] 32.529921 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.529982 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.530073 s: -------------------------------------------------- [IPU1-0] 32.530134 s: [IPU1-0] 32.530165 s: Output Statistics, [IPU1-0] 32.530226 s: [IPU1-0] 32.530287 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.530378 s: | ID | FPS | FPS | FPS [IPU1-0] 32.530439 s: --------------------------------------------- [IPU1-0] 32.530531 s: [IPU1-0] 32.530561 s: [ IPC_IN_1 ] LATENCY, [IPU1-0] 32.530622 s: ******************** [IPU1-0] 32.530714 s: [IPU1-0] 32.530836 s: [IPU1-0] 32.530866 s: ### CPU [IPU1-0], LinkID [ 49], [IPU1-0] 32.530958 s: [IPU1-0] 32.530988 s: [ ALG_IMG_PYRAMID ] Link Statistics, [IPU1-0] 32.531049 s: ****************************** [IPU1-0] 32.531110 s: [IPU1-0] 32.531141 s: Elapsed time = 17029 msec [IPU1-0] 32.531202 s: [IPU1-0] 32.531293 s: [IPU1-0] 32.531324 s: Input Statistics, [IPU1-0] 32.531385 s: [IPU1-0] 32.531415 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.531507 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.531568 s: -------------------------------------------------- [IPU1-0] 32.531629 s: [IPU1-0] 32.531690 s: Output Statistics, [IPU1-0] 32.531720 s: [IPU1-0] 32.531781 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.531842 s: | ID | FPS | FPS | FPS [IPU1-0] 32.531903 s: --------------------------------------------- [IPU1-0] 32.531995 s: [IPU1-0] 32.532025 s: [ ALG_IMG_PYRAMID ] LATENCY, [IPU1-0] 32.532086 s: ******************** [IPU1-0] 32.532147 s: [IPU1-0] 32.532269 s: [IPU1-0] 32.532300 s: ### CPU [IPU1-0], LinkID [ 2], [IPU1-0] 32.532391 s: [IPU1-0] 32.532422 s: [ IPC_OUT_2 ] Link Statistics, [IPU1-0] 32.532483 s: ****************************** [IPU1-0] 32.532544 s: [IPU1-0] 32.532574 s: Elapsed time = 17030 msec [IPU1-0] 32.532635 s: [IPU1-0] 32.532696 s: Driver/Notify Cb = 64.53 fps [IPU1-0] 32.532757 s: [IPU1-0] 32.532788 s: Input Statistics, [IPU1-0] 32.532849 s: [IPU1-0] 32.532879 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 32.532971 s: | FPS | FPS | FPS | FPS [IPU1-0] 32.533032 s: -------------------------------------------------- [IPU1-0] 32.533123 s: [IPU1-0] 32.533154 s: Output Statistics, [IPU1-0] 32.533184 s: [IPU1-0] 32.533428 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 32.533520 s: | ID | FPS | FPS | FPS [IPU1-0] 32.533581 s: --------------------------------------------- [IPU1-0] 32.533672 s: [IPU1-0] 32.533703 s: [ IPC_OUT_2 ] LATENCY, [IPU1-0] 32.533764 s: ******************** [IPU1-0] 32.533794 s: [IPU1-0] 33.033489 s: [IPU1-0] 33.033550 s: ### CPU [ DSP1], LinkID [ 13], [IPU1-0] 33.033642 s: [IPU1-0] 33.033672 s: [ IPC_IN_3 ] Link Statistics, [IPU1-0] 33.033733 s: ****************************** [IPU1-0] 33.033794 s: [IPU1-0] 33.033825 s: Elapsed time = 17531 msec [IPU1-0] 33.033916 s: [IPU1-0] 33.033947 s: [IPU1-0] 33.033977 s: Input Statistics, [IPU1-0] 33.034038 s: [IPU1-0] 33.034069 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 33.034130 s: | FPS | FPS | FPS | FPS [IPU1-0] 33.034221 s: -------------------------------------------------- [IPU1-0] 33.034313 s: [IPU1-0] 33.034374 s: Output Statistics, [IPU1-0] 33.034435 s: [IPU1-0] 33.034465 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 33.034526 s: | ID | FPS | FPS | FPS [IPU1-0] 33.034618 s: --------------------------------------------- [IPU1-0] 33.034679 s: [IPU1-0] 33.034709 s: [ IPC_IN_3 ] LATENCY, [IPU1-0] 33.034831 s: ******************** [IPU1-0] 33.034892 s: [IPU1-0] 33.035014 s: [IPU1-0] 33.035045 s: ### CPU [ DSP1], LinkID [ 50], [IPU1-0] 33.035106 s: [IPU1-0] 33.035136 s: [ ALG_LANE_DETECT ] Link Statistics, [IPU1-0] 33.035228 s: ****************************** [IPU1-0] 33.035319 s: [IPU1-0] 33.035350 s: Elapsed time = 17520 msec [IPU1-0] 33.035411 s: [IPU1-0] 33.035441 s: [IPU1-0] 33.035502 s: Input Statistics, [IPU1-0] 33.035533 s: [IPU1-0] 33.035594 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 33.035655 s: | FPS | FPS | FPS | FPS [IPU1-0] 33.035746 s: -------------------------------------------------- [IPU1-0] 33.035807 s: [IPU1-0] 33.035838 s: Output Statistics, [IPU1-0] 33.035899 s: [IPU1-0] 33.035929 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 33.035990 s: | ID | FPS | FPS | FPS [IPU1-0] 33.036082 s: --------------------------------------------- [IPU1-0] 33.036173 s: [IPU1-0] 33.036204 s: [ ALG_LANE_DETECT ] LATENCY, [IPU1-0] 33.036295 s: ******************** [IPU1-0] 33.036356 s: [IPU1-0] 33.036448 s: [IPU1-0] 33.036478 s: ### CPU [ DSP1], LinkID [ 1], [IPU1-0] 33.036570 s: [IPU1-0] 33.036600 s: [ IPC_OUT_1 ] Link Statistics, [IPU1-0] 33.036661 s: ****************************** [IPU1-0] 33.036722 s: [IPU1-0] 33.036753 s: Elapsed time = 17521 msec [IPU1-0] 33.036814 s: [IPU1-0] 33.036875 s: Driver/Notify Cb = 65.57 fps [IPU1-0] 33.036936 s: [IPU1-0] 33.036966 s: Input Statistics, [IPU1-0] 33.037027 s: [IPU1-0] 33.037058 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 33.037150 s: | FPS | FPS | FPS | FPS [IPU1-0] 33.037211 s: -------------------------------------------------- [IPU1-0] 33.037302 s: [IPU1-0] 33.037363 s: Output Statistics, [IPU1-0] 33.037394 s: [IPU1-0] 33.037455 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 33.037516 s: | ID | FPS | FPS | FPS [IPU1-0] 33.037577 s: --------------------------------------------- [IPU1-0] 33.037668 s: [IPU1-0] 33.037699 s: [ IPC_OUT_1 ] LATENCY, [IPU1-0] 33.037760 s: ******************** [IPU1-0] 33.037821 s: [IPU1-0] 33.537363 s: [IPU1-0] 33.537485 s: ### CPU [IPU1-0], LinkID [ 12], [IPU1-0] 33.537577 s: [IPU1-0] 33.537607 s: [ IPC_IN_2 ] Link Statistics, [IPU1-0] 33.537668 s: ****************************** [IPU1-0] 33.537729 s: [IPU1-0] 33.537760 s: Elapsed time = 18020 msec [IPU1-0] 33.537821 s: [IPU1-0] 33.537882 s: Get Full Buf Cb = 0.66 fps [IPU1-0] 33.537943 s: [IPU1-0] 33.537973 s: Input Statistics, [IPU1-0] 33.538034 s: [IPU1-0] 33.538065 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 33.538156 s: | FPS | FPS | FPS | FPS [IPU1-0] 33.538217 s: -------------------------------------------------- [IPU1-0] 33.538492 s: [IPU1-0] 33.538553 s: Output Statistics, [IPU1-0] 33.538583 s: [IPU1-0] 33.538614 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 33.538705 s: | ID | FPS | FPS | FPS [IPU1-0] 33.538766 s: --------------------------------------------- [IPU1-0] 33.538858 s: [IPU1-0] 33.538888 s: [ IPC_IN_2 ] LATENCY, [IPU1-0] 33.538949 s: ******************** [IPU1-0] 33.539010 s: [IPU1-0] 33.539102 s: [IPU1-0] 33.539132 s: ### CPU [IPU1-0], LinkID [ 0], [IPU1-0] 33.539224 s: [IPU1-0] 33.539254 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 33.539346 s: ****************************** [IPU1-0] 33.539407 s: [IPU1-0] 33.539468 s: Elapsed time = 11956 msec [IPU1-0] 33.539529 s: [IPU1-0] 33.539559 s: New data Recv = 0.50 fps [IPU1-0] 33.539620 s: Release data Recv = 0.50 fps [IPU1-0] 33.539712 s: Driver/Notify Cb = 100.45 fps [IPU1-0] 33.539773 s: [IPU1-0] 33.539803 s: Input Statistics, [IPU1-0] 33.539864 s: [IPU1-0] 33.539895 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 33.539986 s: | FPS | FPS | FPS | FPS [IPU1-0] 33.540047 s: -------------------------------------------------- [IPU1-0] 33.540139 s: 0 | 0.50 0. 0 0. 0 0.50 [IPU1-0] 33.540261 s: [IPU1-0] 33.540322 s: Output Statistics, [IPU1-0] 33.540383 s: [IPU1-0] 33.540413 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 33.540474 s: | ID | FPS | FPS | FPS [IPU1-0] 33.540566 s: --------------------------------------------- [IPU1-0] 33.540627 s: 0 | 0 0.50 0. 0 0. 0 [IPU1-0] 33.540749 s: [IPU1-0] 33.540779 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 33.540840 s: ******************** [IPU1-0] 33.540901 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 33.540993 s: Source to Link Latency : Avg = 1718 us, Min = 1677 us, Max = 1739 us, [IPU1-0] 33.541115 s: [IPU1-0] 34.040383 s: [IPU1-0] 34.040444 s: ### CPU [ HOST], LinkID [ 10], [IPU1-0] 34.040535 s: [IPU1-0] 34.040566 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 34.040688 s: ****************************** [IPU1-0] 34.040749 s: [IPU1-0] 34.040779 s: Elapsed time = 12457 msec [IPU1-0] 34.040840 s: [IPU1-0] 34.040901 s: Get Full Buf Cb = 0.48 fps [IPU1-0] 34.040962 s: Put Empty Buf Cb = 0.48 fps [IPU1-0] 34.041023 s: Driver/Notify Cb = 0.40 fps [IPU1-0] 34.041115 s: [IPU1-0] 34.041145 s: Input Statistics, [IPU1-0] 34.041206 s: [IPU1-0] 34.041237 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.041328 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.041420 s: -------------------------------------------------- [IPU1-0] 34.041511 s: 0 | 0.48 0. 0 0. 0 0.48 [IPU1-0] 34.041633 s: [IPU1-0] 34.041664 s: Output Statistics, [IPU1-0] 34.041725 s: [IPU1-0] 34.041755 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.041816 s: | ID | FPS | FPS | FPS [IPU1-0] 34.041908 s: --------------------------------------------- [IPU1-0] 34.041969 s: 0 | 0 0.48 0. 0 0. 0 [IPU1-0] 34.042091 s: [IPU1-0] 34.042121 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 34.042182 s: ******************** [IPU1-0] 34.042243 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 34.042365 s: Source to Link Latency : Avg = 1809 us, Min = 1769 us, Max = 1830 us, [IPU1-0] 34.042487 s: [IPU1-0] 34.042579 s: [IPU1-0] 34.042640 s: ### CPU [ HOST], LinkID [ 49], [IPU1-0] 34.042701 s: [IPU1-0] 34.042731 s: [ ALG_TIDLPREPROC ] Link Statistics, [IPU1-0] 34.042823 s: ****************************** [IPU1-0] 34.042884 s: [IPU1-0] 34.042914 s: Elapsed time = 12459 msec [IPU1-0] 34.042975 s: [IPU1-0] 34.043006 s: New data Recv = 0.48 fps [IPU1-0] 34.043097 s: [IPU1-0] 34.043128 s: Input Statistics, [IPU1-0] 34.043189 s: [IPU1-0] 34.043219 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.043555 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.043646 s: -------------------------------------------------- [IPU1-0] 34.043738 s: 0 | 0.48 0. 0 0. 0 0.48 [IPU1-0] 34.043860 s: [IPU1-0] 34.043890 s: Output Statistics, [IPU1-0] 34.043951 s: [IPU1-0] 34.043982 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.044043 s: | ID | FPS | FPS | FPS [IPU1-0] 34.044134 s: --------------------------------------------- [IPU1-0] 34.044195 s: 0 | 0 0.48 0. 0 0. 0 [IPU1-0] 34.044348 s: [IPU1-0] 34.044378 s: [ ALG_TIDLPREPROC ] LATENCY, [IPU1-0] 34.044439 s: ******************** [IPU1-0] 34.044500 s: Local Link Latency : Avg = 244 us, Min = 213 us, Max = 275 us, [IPU1-0] 34.044622 s: Source to Link Latency : Avg = 8499 us, Min = 8448 us, Max = 8541 us, [IPU1-0] 34.044744 s: [IPU1-0] 34.044836 s: [IPU1-0] 34.044866 s: ### CPU [ HOST], LinkID [ 2], [IPU1-0] 34.044958 s: [IPU1-0] 34.044988 s: [ IPC_OUT_2 ] Link Statistics, [IPU1-0] 34.045049 s: ****************************** [IPU1-0] 34.045110 s: [IPU1-0] 34.045141 s: Elapsed time = 12387 msec [IPU1-0] 34.045232 s: [IPU1-0] 34.045263 s: New data Recv = 0.16 fps [IPU1-0] 34.045354 s: Release data Recv = 0.16 fps [IPU1-0] 34.045446 s: Driver/Notify Cb = 100.18 fps [IPU1-0] 34.045507 s: [IPU1-0] 34.045537 s: Input Statistics, [IPU1-0] 34.045598 s: [IPU1-0] 34.045629 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.045720 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.045781 s: -------------------------------------------------- [IPU1-0] 34.045873 s: 0 | 0.16 0. 0 0. 0 0.16 [IPU1-0] 34.045995 s: [IPU1-0] 34.046025 s: Output Statistics, [IPU1-0] 34.046574 s: [IPU1-0] 34.046635 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.046727 s: | ID | FPS | FPS | FPS [IPU1-0] 34.046788 s: --------------------------------------------- [IPU1-0] 34.046879 s: 0 | 0 0.16 0. 0 0. 0 [IPU1-0] 34.046971 s: [IPU1-0] 34.047032 s: [ IPC_OUT_2 ] LATENCY, [IPU1-0] 34.047093 s: ******************** [IPU1-0] 34.047154 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 34.047245 s: Source to Link Latency : Avg = 8540 us, Min = 8540 us, Max = 8540 us, [IPU1-0] 34.047428 s: [IPU1-0] 34.547398 s: [IPU1-0] 34.547703 s: ### CPU [ EVE3], LinkID [ 10], [IPU1-0] 34.547794 s: [IPU1-0] 34.547825 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 34.547886 s: ****************************** [IPU1-0] 34.547947 s: [IPU1-0] 34.547977 s: Elapsed time = 12890 msec [IPU1-0] 34.548038 s: [IPU1-0] 34.548099 s: Get Full Buf Cb = 0.31 fps [IPU1-0] 34.548160 s: Put Empty Buf Cb = 0.15 fps [IPU1-0] 34.548252 s: Driver/Notify Cb = 0.7 fps [IPU1-0] 34.548557 s: [IPU1-0] 34.548587 s: Input Statistics, [IPU1-0] 34.548648 s: [IPU1-0] 34.548679 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.548770 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.548831 s: -------------------------------------------------- [IPU1-0] 34.548923 s: 0 | 0.15 0. 0 0. 0 0.15 [IPU1-0] 34.549045 s: [IPU1-0] 34.549075 s: Output Statistics, [IPU1-0] 34.549136 s: [IPU1-0] 34.549167 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.549258 s: | ID | FPS | FPS | FPS [IPU1-0] 34.549350 s: --------------------------------------------- [IPU1-0] 34.549441 s: 0 | 0 0.15 0. 0 0. 0 [IPU1-0] 34.549563 s: [IPU1-0] 34.549594 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 34.549655 s: ******************** [IPU1-0] 34.549716 s: Local Link Latency : Avg = 46 us, Min = 31 us, Max = 61 us, [IPU1-0] 34.549838 s: Source to Link Latency : Avg = 36784 us, Min = 8845 us, Max = 64723 us, [IPU1-0] 34.549929 s: [IPU1-0] 34.550051 s: [IPU1-0] 34.550082 s: ### CPU [ EVE3], LinkID [ 49], [IPU1-0] 34.550173 s: [IPU1-0] 34.550204 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 34.550265 s: ****************************** [IPU1-0] 34.550356 s: [IPU1-0] 34.550387 s: Elapsed time = 12893 msec [IPU1-0] 34.550478 s: [IPU1-0] 34.550509 s: New data Recv = 0.31 fps [IPU1-0] 34.550570 s: [IPU1-0] 34.550600 s: Input Statistics, [IPU1-0] 34.550661 s: [IPU1-0] 34.550692 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.550783 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.550844 s: -------------------------------------------------- [IPU1-0] 34.550936 s: 0 | 0.15 0. 0 0. 0 0.15 [IPU1-0] 34.551058 s: [IPU1-0] 34.551088 s: Output Statistics, [IPU1-0] 34.551149 s: [IPU1-0] 34.551180 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.551271 s: | ID | FPS | FPS | FPS [IPU1-0] 34.551363 s: --------------------------------------------- [IPU1-0] 34.551424 s: 0 | 0 0.15 0. 0 0. 0 [IPU1-0] 34.551546 s: [IPU1-0] 34.551576 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 34.551637 s: ******************** [IPU1-0] 34.551698 s: Local Link Latency : Avg = 154547 us, Min = 153633 us, Max = 155462 us, [IPU1-0] 34.551820 s: Source to Link Latency : Avg = 191606 us, Min = 164491 us, Max = 218722 us, [IPU1-0] 34.551942 s: [IPU1-0] 34.552034 s: [IPU1-0] 34.552064 s: ### CPU [ EVE3], LinkID [ 0], [IPU1-0] 34.552156 s: [IPU1-0] 34.552186 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 34.552247 s: ****************************** [IPU1-0] 34.552339 s: [IPU1-0] 34.552369 s: Elapsed time = 12739 msec [IPU1-0] 34.552491 s: [IPU1-0] 34.552552 s: New data Recv = 0.15 fps [IPU1-0] 34.552613 s: Release data Recv = 0.15 fps [IPU1-0] 34.552674 s: Driver/Notify Cb = 10.20 fps [IPU1-0] 34.552766 s: [IPU1-0] 34.552796 s: Input Statistics, [IPU1-0] 34.552857 s: [IPU1-0] 34.552888 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 34.552949 s: | FPS | FPS | FPS | FPS [IPU1-0] 34.553040 s: -------------------------------------------------- [IPU1-0] 34.553101 s: 0 | 0.15 0. 0 0. 0 0.15 [IPU1-0] 34.553254 s: [IPU1-0] 34.553284 s: Output Statistics, [IPU1-0] 34.553528 s: [IPU1-0] 34.553559 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 34.553650 s: | ID | FPS | FPS | FPS [IPU1-0] 34.553711 s: --------------------------------------------- [IPU1-0] 34.553803 s: 0 | 0 0.15 0. 0 0. 0 [IPU1-0] 34.553894 s: [IPU1-0] 34.553955 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 34.553986 s: ******************** [IPU1-0] 34.554047 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 30 us, [IPU1-0] 34.554169 s: Source to Link Latency : Avg = 191987 us, Min = 164948 us, Max = 219027 us, [IPU1-0] 34.554291 s: [IPU1-0] 35.054413 s: [IPU1-0] 35.054474 s: ### CPU [ DSP1], LinkID [ 12], [IPU1-0] 35.054565 s: [IPU1-0] 35.054596 s: [ IPC_IN_2 ] Link Statistics, [IPU1-0] 35.054657 s: ****************************** [IPU1-0] 35.054718 s: [IPU1-0] 35.054748 s: Elapsed time = 13241 msec [IPU1-0] 35.054840 s: [IPU1-0] 35.054870 s: Get Full Buf Cb = 0.30 fps [IPU1-0] 35.054931 s: Put Empty Buf Cb = 0.15 fps [IPU1-0] 35.055023 s: Driver/Notify Cb = 0.7 fps [IPU1-0] 35.055084 s: [IPU1-0] 35.055114 s: Input Statistics, [IPU1-0] 35.055175 s: [IPU1-0] 35.055206 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 35.055297 s: | FPS | FPS | FPS | FPS [IPU1-0] 35.055389 s: -------------------------------------------------- [IPU1-0] 35.055480 s: 0 | 0.15 0. 0 0. 0 0.15 [IPU1-0] 35.055603 s: [IPU1-0] 35.055633 s: Output Statistics, [IPU1-0] 35.055694 s: [IPU1-0] 35.055725 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 35.055847 s: | ID | FPS | FPS | FPS [IPU1-0] 35.055938 s: --------------------------------------------- [IPU1-0] 35.055999 s: 0 | 0 0.15 0. 0 0. 0 [IPU1-0] 35.056121 s: [IPU1-0] 35.056152 s: [ IPC_IN_2 ] LATENCY, [IPU1-0] 35.056213 s: ******************** [IPU1-0] 35.056274 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 35.056396 s: Source to Link Latency : Avg = 192125 us, Min = 165101 us, Max = 219149 us, [IPU1-0] 35.056518 s: [IPU1-0] 35.556426 s: [IPU1-0] 35.556487 s: ### CPU [ HOST], LinkID [ 1], [IPU1-0] 35.556579 s: [IPU1-0] 35.556609 s: [ IPC_OUT_1 ] Link Statistics, [IPU1-0] 35.556670 s: ****************************** [IPU1-0] 35.556731 s: [IPU1-0] 35.556762 s: Elapsed time = 13933 msec [IPU1-0] 35.556823 s: [IPU1-0] 35.556884 s: New data Recv = 0.14 fps [IPU1-0] 35.556945 s: Release data Recv = 0.14 fps [IPU1-0] 35.557006 s: Driver/Notify Cb = 100.12 fps [IPU1-0] 35.557097 s: [IPU1-0] 35.557128 s: Input Statistics, [IPU1-0] 35.557189 s: [IPU1-0] 35.557219 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 35.557280 s: | FPS | FPS | FPS | FPS [IPU1-0] 35.557402 s: -------------------------------------------------- [IPU1-0] 35.557463 s: 0 | 0.14 0. 0 0. 0 0.14 [IPU1-0] 35.557616 s: [IPU1-0] 35.557646 s: Output Statistics, [IPU1-0] 35.557707 s: [IPU1-0] 35.557738 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 35.557799 s: | ID | FPS | FPS | FPS [IPU1-0] 35.557890 s: --------------------------------------------- [IPU1-0] 35.557951 s: 0 | 0 0.14 0. 0 0. 0 [IPU1-0] 35.558073 s: [IPU1-0] 35.558104 s: [ IPC_OUT_1 ] LATENCY, [IPU1-0] 35.558165 s: ******************** [IPU1-0] 35.558226 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 35.558531 s: Source to Link Latency : Avg = 8479 us, Min = 8479 us, Max = 8479 us, [IPU1-0] 35.558653 s: [IPU1-0] 36.058592 s: [IPU1-0] 36.058653 s: ### CPU [ EVE2], LinkID [ 10], [IPU1-0] 36.058744 s: [IPU1-0] 36.058775 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 36.058836 s: ****************************** [IPU1-0] 36.058897 s: [IPU1-0] 36.058958 s: Elapsed time = 14435 msec [IPU1-0] 36.059019 s: [IPU1-0] 36.059049 s: Get Full Buf Cb = 0.27 fps [IPU1-0] 36.059110 s: Put Empty Buf Cb = 0.13 fps [IPU1-0] 36.059202 s: Driver/Notify Cb = 0.6 fps [IPU1-0] 36.059263 s: [IPU1-0] 36.059293 s: Input Statistics, [IPU1-0] 36.059385 s: [IPU1-0] 36.059415 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 36.059507 s: | FPS | FPS | FPS | FPS [IPU1-0] 36.059568 s: -------------------------------------------------- [IPU1-0] 36.059659 s: 0 | 0.13 0. 0 0. 0 0.13 [IPU1-0] 36.059781 s: [IPU1-0] 36.059812 s: Output Statistics, [IPU1-0] 36.059873 s: [IPU1-0] 36.059903 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 36.059995 s: | ID | FPS | FPS | FPS [IPU1-0] 36.060056 s: --------------------------------------------- [IPU1-0] 36.060117 s: 0 | 0 0.13 0. 0 0. 0 [IPU1-0] 36.060239 s: [IPU1-0] 36.060269 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 36.060361 s: ******************** [IPU1-0] 36.060422 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 30 us, [IPU1-0] 36.060544 s: Source to Link Latency : Avg = 36402 us, Min = 8753 us, Max = 64052 us, [IPU1-0] 36.060635 s: [IPU1-0] 36.060757 s: [IPU1-0] 36.060788 s: ### CPU [ EVE2], LinkID [ 49], [IPU1-0] 36.060849 s: [IPU1-0] 36.060910 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 36.060971 s: ****************************** [IPU1-0] 36.061032 s: [IPU1-0] 36.061062 s: Elapsed time = 14436 msec [IPU1-0] 36.061123 s: [IPU1-0] 36.061154 s: New data Recv = 0.27 fps [IPU1-0] 36.061245 s: [IPU1-0] 36.061276 s: Input Statistics, [IPU1-0] 36.061337 s: [IPU1-0] 36.061398 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 36.061489 s: | FPS | FPS | FPS | FPS [IPU1-0] 36.061550 s: -------------------------------------------------- [IPU1-0] 36.061642 s: 0 | 0.13 0. 0 0. 0 0.13 [IPU1-0] 36.061764 s: [IPU1-0] 36.061794 s: Output Statistics, [IPU1-0] 36.061855 s: [IPU1-0] 36.061886 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 36.061947 s: | ID | FPS | FPS | FPS [IPU1-0] 36.062008 s: --------------------------------------------- [IPU1-0] 36.062099 s: 0 | 0 0.13 0. 0 0. 0 [IPU1-0] 36.062221 s: [IPU1-0] 36.062252 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 36.062313 s: ******************** [IPU1-0] 36.062374 s: Local Link Latency : Avg = 154578 us, Min = 154365 us, Max = 154792 us, [IPU1-0] 36.062496 s: Source to Link Latency : Avg = 191270 us, Min = 163759 us, Max = 218782 us, [IPU1-0] 36.062618 s: [IPU1-0] 36.062709 s: [IPU1-0] 36.062740 s: ### CPU [ EVE2], LinkID [ 0], [IPU1-0] 36.062831 s: [IPU1-0] 36.062862 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 36.062923 s: ****************************** [IPU1-0] 36.062984 s: [IPU1-0] 36.063014 s: Elapsed time = 14283 msec [IPU1-0] 36.063075 s: [IPU1-0] 36.063136 s: New data Recv = 0.14 fps [IPU1-0] 36.063197 s: Release data Recv = 0.14 fps [IPU1-0] 36.063258 s: Driver/Notify Cb = 10.15 fps [IPU1-0] 36.063533 s: [IPU1-0] 36.063594 s: Input Statistics, [IPU1-0] 36.063655 s: [IPU1-0] 36.063685 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 36.063777 s: | FPS | FPS | FPS | FPS [IPU1-0] 36.063838 s: -------------------------------------------------- [IPU1-0] 36.063929 s: 0 | 0.14 0. 0 0. 0 0.14 [IPU1-0] 36.064051 s: [IPU1-0] 36.064082 s: Output Statistics, [IPU1-0] 36.064143 s: [IPU1-0] 36.064173 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 36.064234 s: | ID | FPS | FPS | FPS [IPU1-0] 36.064326 s: --------------------------------------------- [IPU1-0] 36.064417 s: 0 | 0 0.14 0. 0 0. 0 [IPU1-0] 36.064539 s: [IPU1-0] 36.064570 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 36.064631 s: ******************** [IPU1-0] 36.064692 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 31 us, [IPU1-0] 36.064783 s: Source to Link Latency : Avg = 191651 us, Min = 164216 us, Max = 219087 us, [IPU1-0] 36.064905 s: [IPU1-0] 36.564448 s: [IPU1-0] 36.564509 s: ### CPU [ DSP1], LinkID [ 11], [IPU1-0] 36.564600 s: [IPU1-0] 36.564631 s: [ IPC_IN_1 ] Link Statistics, [IPU1-0] 36.564692 s: ****************************** [IPU1-0] 36.564753 s: [IPU1-0] 36.564783 s: Elapsed time = 14785 msec [IPU1-0] 36.564875 s: [IPU1-0] 36.564905 s: Get Full Buf Cb = 0.33 fps [IPU1-0] 36.564966 s: Put Empty Buf Cb = 0.13 fps [IPU1-0] 36.565058 s: Driver/Notify Cb = 0.6 fps [IPU1-0] 36.565119 s: [IPU1-0] 36.565149 s: Input Statistics, [IPU1-0] 36.565210 s: [IPU1-0] 36.565241 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 36.565332 s: | FPS | FPS | FPS | FPS [IPU1-0] 36.565424 s: -------------------------------------------------- [IPU1-0] 36.565515 s: 0 | 0.13 0. 0 0. 0 0.13 [IPU1-0] 36.565637 s: [IPU1-0] 36.565668 s: Output Statistics, [IPU1-0] 36.565729 s: [IPU1-0] 36.565759 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 36.565820 s: | ID | FPS | FPS | FPS [IPU1-0] 36.565912 s: --------------------------------------------- [IPU1-0] 36.565973 s: 0 | 0 0.13 0. 0 0. 0 [IPU1-0] 36.566095 s: [IPU1-0] 36.566125 s: [ IPC_IN_1 ] LATENCY, [IPU1-0] 36.566186 s: ******************** [IPU1-0] 36.566247 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 31 us, [IPU1-0] 36.566369 s: Source to Link Latency : Avg = 191804 us, Min = 164369 us, Max = 219240 us, [IPU1-0] 36.566491 s: [IPU1-0] 37.066461 s: [IPU1-0] 37.066522 s: ### CPU [ HOST], LinkID [ 0], [IPU1-0] 37.066613 s: [IPU1-0] 37.066644 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 37.066705 s: ****************************** [IPU1-0] 37.066766 s: [IPU1-0] 37.066796 s: Elapsed time = 15476 msec [IPU1-0] 37.066888 s: [IPU1-0] 37.066918 s: New data Recv = 0.12 fps [IPU1-0] 37.066979 s: Release data Recv = 0.12 fps [IPU1-0] 37.067071 s: Driver/Notify Cb = 100.9 fps [IPU1-0] 37.067132 s: [IPU1-0] 37.067162 s: Input Statistics, [IPU1-0] 37.067223 s: [IPU1-0] 37.067254 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 37.067345 s: | FPS | FPS | FPS | FPS [IPU1-0] 37.067437 s: -------------------------------------------------- [IPU1-0] 37.067528 s: 0 | 0.12 0. 0 0. 0 0.12 [IPU1-0] 37.067650 s: [IPU1-0] 37.067681 s: Output Statistics, [IPU1-0] 37.067742 s: [IPU1-0] 37.067772 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 37.067833 s: | ID | FPS | FPS | FPS [IPU1-0] 37.067925 s: --------------------------------------------- [IPU1-0] 37.067986 s: 0 | 0 0.12 0. 0 0. 0 [IPU1-0] 37.068108 s: [IPU1-0] 37.068138 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 37.068199 s: ******************** [IPU1-0] 37.068260 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 37.068565 s: Source to Link Latency : Avg = 8525 us, Min = 8509 us, Max = 8541 us, [IPU1-0] 37.068687 s: [IPU1-0] 37.568626 s: [IPU1-0] 37.568687 s: ### CPU [ EVE1], LinkID [ 10], [IPU1-0] 37.568779 s: [IPU1-0] 37.568809 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 37.568870 s: ****************************** [IPU1-0] 37.568931 s: [IPU1-0] 37.568962 s: Elapsed time = 15978 msec [IPU1-0] 37.569023 s: [IPU1-0] 37.569084 s: Get Full Buf Cb = 0.25 fps [IPU1-0] 37.569145 s: Put Empty Buf Cb = 0.12 fps [IPU1-0] 37.569206 s: Driver/Notify Cb = 0.6 fps [IPU1-0] 37.569297 s: [IPU1-0] 37.569328 s: Input Statistics, [IPU1-0] 37.569419 s: [IPU1-0] 37.569450 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 37.569541 s: | FPS | FPS | FPS | FPS [IPU1-0] 37.569602 s: -------------------------------------------------- [IPU1-0] 37.569694 s: 0 | 0.12 0. 0 0. 0 0.12 [IPU1-0] 37.569816 s: [IPU1-0] 37.569846 s: Output Statistics, [IPU1-0] 37.569907 s: [IPU1-0] 37.569938 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 37.569999 s: | ID | FPS | FPS | FPS [IPU1-0] 37.570090 s: --------------------------------------------- [IPU1-0] 37.570151 s: 0 | 0 0.12 0. 0 0. 0 [IPU1-0] 37.570273 s: [IPU1-0] 37.570304 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 37.570365 s: ******************** [IPU1-0] 37.570456 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, [IPU1-0] 37.570578 s: Source to Link Latency : Avg = 35945 us, Min = 8784 us, Max = 63107 us, [IPU1-0] 37.570670 s: [IPU1-0] 37.570792 s: [IPU1-0] 37.570822 s: ### CPU [ EVE1], LinkID [ 49], [IPU1-0] 37.570883 s: [IPU1-0] 37.570944 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 37.571005 s: ****************************** [IPU1-0] 37.571066 s: [IPU1-0] 37.571097 s: Elapsed time = 15980 msec [IPU1-0] 37.571158 s: [IPU1-0] 37.571188 s: New data Recv = 0.25 fps [IPU1-0] 37.571280 s: [IPU1-0] 37.571310 s: Input Statistics, [IPU1-0] 37.571371 s: [IPU1-0] 37.571432 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 37.571493 s: | FPS | FPS | FPS | FPS [IPU1-0] 37.571585 s: -------------------------------------------------- [IPU1-0] 37.571646 s: 0 | 0.12 0. 0 0. 0 0.12 [IPU1-0] 37.571798 s: [IPU1-0] 37.571829 s: Output Statistics, [IPU1-0] 37.571859 s: [IPU1-0] 37.571920 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 37.571981 s: | ID | FPS | FPS | FPS [IPU1-0] 37.572042 s: --------------------------------------------- [IPU1-0] 37.572134 s: 0 | 0 0.12 0. 0 0. 0 [IPU1-0] 37.572225 s: [IPU1-0] 37.572286 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 37.572347 s: ******************** [IPU1-0] 37.572408 s: Local Link Latency : Avg = 154700 us, Min = 153877 us, Max = 155524 us, [IPU1-0] 37.572530 s: Source to Link Latency : Avg = 190904 us, Min = 162813 us, Max = 218996 us, [IPU1-0] 37.572652 s: [IPU1-0] 37.572744 s: [IPU1-0] 37.572774 s: ### CPU [ EVE1], LinkID [ 0], [IPU1-0] 37.572866 s: [IPU1-0] 37.572896 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 37.572957 s: ****************************** [IPU1-0] 37.573018 s: [IPU1-0] 37.573049 s: Elapsed time = 15827 msec [IPU1-0] 37.573110 s: [IPU1-0] 37.573171 s: New data Recv = 0.12 fps [IPU1-0] 37.573232 s: Release data Recv = 0.12 fps [IPU1-0] 37.573293 s: Driver/Notify Cb = 10.10 fps [IPU1-0] 37.573567 s: [IPU1-0] 37.573628 s: Input Statistics, [IPU1-0] 37.573689 s: [IPU1-0] 37.573720 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 37.573781 s: | FPS | FPS | FPS | FPS [IPU1-0] 37.573872 s: -------------------------------------------------- [IPU1-0] 37.573933 s: 0 | 0.12 0. 0 0. 0 0.12 [IPU1-0] 37.574086 s: [IPU1-0] 37.574117 s: Output Statistics, [IPU1-0] 37.574178 s: [IPU1-0] 37.574208 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 37.574269 s: | ID | FPS | FPS | FPS [IPU1-0] 37.574330 s: --------------------------------------------- [IPU1-0] 37.574544 s: 0 | 0 0.12 0. 0 0. 0 [IPU1-0] 37.574666 s: [IPU1-0] 37.574696 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 37.574757 s: ******************** [IPU1-0] 37.574818 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 30 us, [IPU1-0] 37.574910 s: Source to Link Latency : Avg = 191301 us, Min = 163301 us, Max = 219301 us, [IPU1-0] 37.575032 s: [IPU1-0] 38.074483 s: [IPU1-0] 38.074574 s: ### CPU [ DSP1], LinkID [ 10], [IPU1-0] 38.074635 s: [IPU1-0] 38.074666 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 38.074727 s: ****************************** [IPU1-0] 38.074788 s: [IPU1-0] 38.074849 s: Elapsed time = 16329 msec [IPU1-0] 38.074910 s: [IPU1-0] 38.074940 s: Get Full Buf Cb = 0.36 fps [IPU1-0] 38.075032 s: Put Empty Buf Cb = 0.12 fps [IPU1-0] 38.075093 s: Driver/Notify Cb = 0.6 fps [IPU1-0] 38.075154 s: [IPU1-0] 38.075215 s: Input Statistics, [IPU1-0] 38.075245 s: [IPU1-0] 38.075276 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.075367 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.075459 s: -------------------------------------------------- [IPU1-0] 38.075550 s: 0 | 0.12 0. 0 0. 0 0.12 [IPU1-0] 38.075672 s: [IPU1-0] 38.075703 s: Output Statistics, [IPU1-0] 38.075764 s: [IPU1-0] 38.075794 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.075886 s: | ID | FPS | FPS | FPS [IPU1-0] 38.075947 s: --------------------------------------------- [IPU1-0] 38.076038 s: 0 | 0 0.12 0. 0 0. 0 [IPU1-0] 38.076130 s: [IPU1-0] 38.076191 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 38.076221 s: ******************** [IPU1-0] 38.076282 s: Local Link Latency : Avg = 0 us, Min = 0 us, Max = 0 us, [IPU1-0] 38.076435 s: Source to Link Latency : Avg = 191454 us, Min = 163454 us, Max = 219454 us, [IPU1-0] 38.076557 s: [IPU1-0] 38.076587 s: CPU [ DSP1], LinkID [ 38], Link Statistics not available ! [IPU1-0] 38.076770 s: [IPU1-0] 38.076801 s: ### CPU [ DSP1], LinkID [ 49], [IPU1-0] 38.076862 s: [IPU1-0] 38.076892 s: [ ALG_TIDL ] Link Statistics, [IPU1-0] 38.076984 s: ****************************** [IPU1-0] 38.077014 s: [IPU1-0] 38.077075 s: Elapsed time = 16331 msec [IPU1-0] 38.077136 s: [IPU1-0] 38.077167 s: New data Recv = 0.73 fps [IPU1-0] 38.077258 s: [IPU1-0] 38.077289 s: Input Statistics, [IPU1-0] 38.077319 s: [IPU1-0] 38.077380 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.077472 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.077533 s: -------------------------------------------------- [IPU1-0] 38.077624 s: 0 | 0.36 0. 0 0. 0 0.36 [IPU1-0] 38.077746 s: [IPU1-0] 38.077777 s: Output Statistics, [IPU1-0] 38.077838 s: [IPU1-0] 38.077868 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.077960 s: | ID | FPS | FPS | FPS [IPU1-0] 38.078021 s: --------------------------------------------- [IPU1-0] 38.078082 s: 0 | 0 0.36 0. 0 0. 0 [IPU1-0] 38.078204 s: [IPU1-0] 38.078234 s: [ ALG_TIDL ] LATENCY, [IPU1-0] 38.078295 s: ******************** [IPU1-0] 38.078356 s: Local Link Latency : Avg = 9465 us, Min = 9272 us, Max = 9669 us, [IPU1-0] 38.079119 s: Source to Link Latency : Avg = 288507 us, Min = 173092 us, Max = 490270 us, [IPU1-0] 38.079271 s: [IPU1-0] 38.079424 s: [IPU1-0] 38.079485 s: ### CPU [ DSP1], LinkID [ 0], [IPU1-0] 38.079546 s: [IPU1-0] 38.079607 s: [ IPC_OUT_0 ] Link Statistics, [IPU1-0] 38.079668 s: ****************************** [IPU1-0] 38.079729 s: [IPU1-0] 38.079759 s: Elapsed time = 16324 msec [IPU1-0] 38.079820 s: [IPU1-0] 38.079881 s: New data Recv = 0.36 fps [IPU1-0] 38.079942 s: Release data Recv = 0.36 fps [IPU1-0] 38.080034 s: Driver/Notify Cb = 100.40 fps [IPU1-0] 38.080278 s: [IPU1-0] 38.080339 s: Input Statistics, [IPU1-0] 38.080369 s: [IPU1-0] 38.080461 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.080552 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.080613 s: -------------------------------------------------- [IPU1-0] 38.080705 s: 0 | 0.36 0. 0 0. 0 0.36 [IPU1-0] 38.080827 s: [IPU1-0] 38.080857 s: Output Statistics, [IPU1-0] 38.080918 s: [IPU1-0] 38.080949 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.081040 s: | ID | FPS | FPS | FPS [IPU1-0] 38.081101 s: --------------------------------------------- [IPU1-0] 38.081162 s: 0 | 0 0.36 0. 0 0. 0 [IPU1-0] 38.081284 s: [IPU1-0] 38.081315 s: [ IPC_OUT_0 ] LATENCY, [IPU1-0] 38.081406 s: ******************** [IPU1-0] 38.081467 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 30 us, [IPU1-0] 38.081589 s: Source to Link Latency : Avg = 288598 us, Min = 173183 us, Max = 490331 us, [IPU1-0] 38.081681 s: [IPU1-0] 38.581620 s: [IPU1-0] 38.581681 s: ### CPU [IPU1-0], LinkID [ 10], [IPU1-0] 38.581742 s: [IPU1-0] 38.581803 s: [ IPC_IN_0 ] Link Statistics, [IPU1-0] 38.581864 s: ****************************** [IPU1-0] 38.581925 s: [IPU1-0] 38.581955 s: Elapsed time = 16826 msec [IPU1-0] 38.582016 s: [IPU1-0] 38.582047 s: Get Full Buf Cb = 0.35 fps [IPU1-0] 38.582138 s: Put Empty Buf Cb = 0.35 fps [IPU1-0] 38.582199 s: Driver/Notify Cb = 0.29 fps [IPU1-0] 38.582291 s: [IPU1-0] 38.582321 s: Input Statistics, [IPU1-0] 38.582382 s: [IPU1-0] 38.582443 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.582504 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.582596 s: -------------------------------------------------- [IPU1-0] 38.582687 s: 0 | 0.35 0. 0 0. 0 0.35 [IPU1-0] 38.582809 s: [IPU1-0] 38.582840 s: Output Statistics, [IPU1-0] 38.582901 s: [IPU1-0] 38.582931 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.582992 s: | ID | FPS | FPS | FPS [IPU1-0] 38.583084 s: --------------------------------------------- [IPU1-0] 38.583145 s: 0 | 0 0.35 0. 0 0. 0 [IPU1-0] 38.583267 s: [IPU1-0] 38.583297 s: [ IPC_IN_0 ] LATENCY, [IPU1-0] 38.583358 s: ******************** [IPU1-0] 38.583633 s: Local Link Latency : Avg = 20 us, Min = 0 us, Max = 31 us, [IPU1-0] 38.583755 s: Source to Link Latency : Avg = 288756 us, Min = 173366 us, Max = 490484 us, [IPU1-0] 38.583877 s: [IPU1-0] 38.583938 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! [IPU1-0] 38.584090 s: [IPU1-0] 38.584121 s: ### CPU [IPU1-0], LinkID [ 34], [IPU1-0] 38.584212 s: [IPU1-0] 38.584243 s: [ SYNC_0 ] Link Statistics, [IPU1-0] 38.584304 s: ****************************** [IPU1-0] 38.584365 s: [IPU1-0] 38.584426 s: Elapsed time = 17015 msec [IPU1-0] 38.584517 s: [IPU1-0] 38.584548 s: New data Recv = 31.3 fps [IPU1-0] 38.584609 s: Driver/Notify Cb = 30.26 fps [IPU1-0] 38.584700 s: [IPU1-0] 38.584731 s: Input Statistics, [IPU1-0] 38.584761 s: [IPU1-0] 38.584822 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.584883 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.584975 s: -------------------------------------------------- [IPU1-0] 38.585036 s: 0 | 0.35 0.35 0. 0 0. 0 [IPU1-0] 38.585158 s: 1 | 0.35 0.35 0. 0 0. 0 [IPU1-0] 38.585280 s: [IPU1-0] 38.585341 s: Output Statistics, [IPU1-0] 38.585371 s: [IPU1-0] 38.585432 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.585524 s: | ID | FPS | FPS | FPS [IPU1-0] 38.585585 s: --------------------------------------------- [IPU1-0] 38.585646 s: [IPU1-0] 38.585707 s: [ SYNC_0 ] LATENCY, [IPU1-0] 38.585737 s: ******************** [IPU1-0] 38.585798 s: [IPU1-0] 38.585920 s: [IPU1-0] 38.585951 s: ### CPU [IPU1-0], LinkID [ 50], [IPU1-0] 38.586012 s: [IPU1-0] 38.586042 s: [ ALG_OBJECT_DRAW ] Link Statistics, [IPU1-0] 38.586134 s: ****************************** [IPU1-0] 38.586195 s: [IPU1-0] 38.586225 s: Elapsed time = 18065 msec [IPU1-0] 38.586286 s: [IPU1-0] 38.586347 s: [IPU1-0] 38.586378 s: Input Statistics, [IPU1-0] 38.586439 s: [IPU1-0] 38.586500 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.586561 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.586652 s: -------------------------------------------------- [IPU1-0] 38.586713 s: [IPU1-0] 38.586744 s: Output Statistics, [IPU1-0] 38.586805 s: [IPU1-0] 38.586835 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.586927 s: | ID | FPS | FPS | FPS [IPU1-0] 38.586988 s: --------------------------------------------- [IPU1-0] 38.587079 s: [IPU1-0] 38.587110 s: [ ALG_OBJECT_DRAW ] LATENCY, [IPU1-0] 38.587171 s: ******************** [IPU1-0] 38.587232 s: [IPU1-0] 38.587323 s: [IPU1-0] 38.587354 s: ### CPU [IPU1-0], LinkID [ 72], [IPU1-0] 38.587445 s: [IPU1-0] 38.587506 s: [ DISPLAY ] Link Statistics, [IPU1-0] 38.587567 s: ****************************** [IPU1-0] 38.587628 s: [IPU1-0] 38.587659 s: Elapsed time = 18066 msec [IPU1-0] 38.587720 s: [IPU1-0] 38.587781 s: [IPU1-0] 38.587811 s: Input Statistics, [IPU1-0] 38.587842 s: [IPU1-0] 38.587903 s: CH | In Recv | In Drop | In User Drop | In Process [IPU1-0] 38.587964 s: | FPS | FPS | FPS | FPS [IPU1-0] 38.588055 s: -------------------------------------------------- [IPU1-0] 38.588116 s: [IPU1-0] 38.588147 s: Output Statistics, [IPU1-0] 38.588208 s: [IPU1-0] 38.588238 s: CH | Out | Out | Out Drop | Out User Drop [IPU1-0] 38.588330 s: | ID | FPS | FPS | FPS [IPU1-0] 38.588604 s: --------------------------------------------- [IPU1-0] 38.588696 s: [IPU1-0] 38.588726 s: [ DISPLAY ] LATENCY, [IPU1-0] 38.588787 s: ******************** [IPU1-0] 38.588848 s: [IPU1-0] 38.588879 s: Display UnderFlow Count = 0 [IPU1-0] 38.588940 s: [IPU1-0] 39.088604 s: ************************************************************************************************************************************* The VPE drops many frames. Can you tell me where is problem? Regards, Allen + +Responses: +Hi Allen, VPE seems to be running in real time, but it looks like it is running out of output buffers. Could you please check why the link after VPE links are holding buffers for longer period of time. Rgds, Brijesh + +Hi, I don't quite understand what you mean. Can you explain it in detail? How can I check it? Regards, Allen + +Allen, VPE requires output buffers to store the output to. Now if the next link after VPE link in the chain does not return the buffer in time, then eventually VPE runs out of the output buffers, in this case, it has input buffer to process, but it does not have output buffer to write to. so it drop the buffer and returns the input buffer to the previous link back without processing. You need to check which link is not running real time and not returning buffers to vpe, and slowing down whole chain. Rgds, Brijesh + diff --git a/data2/text/range/30001+/737948.txt b/data2/text/range/30001+/737948.txt new file mode 100644 index 0000000000000000000000000000000000000000..a5e4dfcb3676454e526d43d1825f3f4d48163644 --- /dev/null +++ b/data2/text/range/30001+/737948.txt @@ -0,0 +1,403 @@ +Ticket Name: TDA2: ssd model import problem + +Query Text: +Part Number: TDA2 Hi All, I have already confirmed that it works well on TDA2p EVM as below when running tidl usecase using the already converted model bin(NET_OD/PRM_OD) -. bbox : ok, display fps : ok(16fps) However, I confirmed that the bin(NET_OD, PRM_OD) changed through tild_model_import.out does not work as it did before. -. bbox: no, display fps : fail(8.4fps) Below is the problem log and import file file. Can you help me with what is wrong? modelImportIssue.zip My development environment is as follows. VSDK : 3.3.0.0 TIDLSRC: 1.1.1.0 bootmode ; SDBOOT EVM: tda2p protobuf ver : 3.2.0rc2 model: JDetNet Thank you in advance. BR, Khethan + +Responses: +Hi Khethan, Can you please check with new vision SDK release version 03.05.00.00, if you still face the issue please share the generated NET.bin and PARAM.bin from import tool for verification. Thanks, Praveen + +Hi all I am sorry, It's take a long time to write back. I downloaded the version(3.5.0.0) you mentioned, but which is does not have a TIDL. The stats_tool_out.bin file created using my import tool has been confirmed to work normally as below. please refer my environment file. I would appreciate any help on what is wrong. modelImportIssue_2.zip BR, Khethan + +Hi Khethan, I did not see any issue with your import tool files, because I just now imported and verified that it is detecting objects properly. I used the import executable (tidl_model_import.out.exe) from latest TIDL 01.01.02.00 release. Can you please check with latest TIDL release? Thanks, Praveen + +Hi Praveen, I've just checked with the new version(1.1.2.0) you mentioned, but I still have problems. please refer my log file. import_tidl_1_1_2_0_log.txt Microsoft Windows [Version 6.1.7601] +Copyright (c) 2009 Microsoft Corporation. All rights reserved. + +c:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDLSRC.01.01.02.00\modules\ti_dl\utils\tidlModel +Import>tidl_model_import.out.exe c:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDLSRC.01.01.02 +.00\modules\ti_dl\test\testvecs\config\import\tidl_import_JDetNet.txt +Caffe Network File : d:\work\adas\TI\work_space\tidl\model\caffe_jacinto_models\trained\object_detection\voc0712\J +DetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\sparse\deploy.prototxt +Caffe Model File : d:\work\adas\TI\work_space\tidl\model\caffe_jacinto_models\trained\object_detection\voc0712\J +DetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\sparse\voc0712_ssdJacintoNetV2_iter_120000.caffemodel +TIDL Network File : ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_net_jdetNet_ssd.bin +TIDL Model File : ..\..\test\testvecs\config\tidl_models\jdetnet\tidl_param_jdetNet_ssd.bin +Name of the Network : ssdJacintoNetV2_deploy +Num Inputs : 1 +Could not find detection_out Params + Num of Layer Detected : 50 + 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , + x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , 0 + , + 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , + x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , 737280 + , + 2, TIDL_ConvolutionLayer , conv1a 1, 1 , 1 , 1 , x , x , x , + x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , 147456000 + , + 3, TIDL_ConvolutionLayer , conv1b 1, 1 , 1 , 2 , x , x , x , + x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 80 , 192 , 141557760 + , + 4, TIDL_ConvolutionLayer , res2a_branch2a 1, 1 , 1 , 3 , x , x , x , + x , x , x , x , 4 , 1 , 32 , 80 , 192 , 1 , 64 , 80 , 192 , 283115520 + , + 5, TIDL_ConvolutionLayer , res2a_branch2b 1, 1 , 1 , 4 , x , x , x , + x , x , x , x , 5 , 1 , 64 , 80 , 192 , 1 , 64 , 40 , 96 , 141557760 + , + 6, TIDL_ConvolutionLayer , res3a_branch2a 1, 1 , 1 , 5 , x , x , x , + x , x , x , x , 6 , 1 , 64 , 40 , 96 , 1 , 128 , 40 , 96 , 283115520 + , + 7, TIDL_ConvolutionLayer , res3a_branch2b 1, 1 , 1 , 6 , x , x , x , + x , x , x , x , 7 , 1 , 128 , 40 , 96 , 1 , 128 , 20 , 48 , 141557760 + , + 8, TIDL_ConvolutionLayer , res4a_branch2a 1, 1 , 1 , 7 , x , x , x , + x , x , x , x , 8 , 1 , 128 , 20 , 48 , 1 , 256 , 20 , 48 , 283115520 + , + 9, TIDL_ConvolutionLayer , res4a_branch2b 1, 1 , 1 , 8 , x , x , x , + x , x , x , x , 9 , 1 , 256 , 20 , 48 , 1 , 256 , 20 , 48 , 141557760 + , + 10, TIDL_PoolingLayer , pool4 1, 1 , 1 , 9 , x , x , x , + x , x , x , x , 10 , 1 , 256 , 20 , 48 , 1 , 256 , 10 , 24 , 245760 + , + 11, TIDL_ConvolutionLayer , res5a_branch2a 1, 1 , 1 , 10 , x , x , x , + x , x , x , x , 11 , 1 , 256 , 10 , 24 , 1 , 512 , 10 , 24 , 283115520 + , + 12, TIDL_ConvolutionLayer , res5a_branch2b 1, 1 , 1 , 11 , x , x , x , + x , x , x , x , 12 , 1 , 512 , 10 , 24 , 1 , 512 , 10 , 24 , 141557760 + , + 13, TIDL_PoolingLayer , pool6 1, 1 , 1 , 12 , x , x , x , + x , x , x , x , 13 , 1 , 512 , 10 , 24 , 1 , 512 , 5 , 12 , 122880 + , + 14, TIDL_PoolingLayer , pool7 1, 1 , 1 , 13 , x , x , x , + x , x , x , x , 14 , 1 , 512 , 5 , 12 , 1 , 512 , 3 , 6 , 36864 + , + 15, TIDL_PoolingLayer , pool8 1, 1 , 1 , 14 , x , x , x , + x , x , x , x , 15 , 1 , 512 , 3 , 6 , 1 , 512 , 2 , 3 , 12288 + , + 16, TIDL_ConvolutionLayer , ctx_output1 1, 1 , 1 , 9 , x , x , x , + x , x , x , x , 16 , 1 , 256 , 20 , 48 , 1 , 256 , 20 , 48 , 62914560 + , + 17, TIDL_ConvolutionLayer , ctx_output2 1, 1 , 1 , 12 , x , x , x , + x , x , x , x , 17 , 1 , 512 , 10 , 24 , 1 , 256 , 10 , 24 , 31457280 + , + 18, TIDL_ConvolutionLayer , ctx_output3 1, 1 , 1 , 13 , x , x , x , + x , x , x , x , 18 , 1 , 512 , 5 , 12 , 1 , 256 , 5 , 12 , 7864320 + , + 19, TIDL_ConvolutionLayer , ctx_output4 1, 1 , 1 , 14 , x , x , x , + x , x , x , x , 19 , 1 , 512 , 3 , 6 , 1 , 256 , 3 , 6 , 2359296 + , + 20, TIDL_ConvolutionLayer , ctx_output5 1, 1 , 1 , 15 , x , x , x , + x , x , x , x , 20 , 1 , 512 , 2 , 3 , 1 , 256 , 2 , 3 , 786432 + , + 21, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_loc 1, 1 , 1 , 16 , x , x , x , + x , x , x , x , 21 , 1 , 256 , 20 , 48 , 1 , 16 , 20 , 48 , 3932160 + , + 22, TIDL_FlattenLayer , ctx_output1/relu_mbox_loc_perm 1, 1 , 1 , 21 , x , x , x , + x , x , x , x , 22 , 1 , 16 , 20 , 48 , 1 , 1 , 1 , 15360 , 1 + , + 23, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_conf 1, 1 , 1 , 16 , x , x , x , + x , x , x , x , 23 , 1 , 256 , 20 , 48 , 1 , 84 , 20 , 48 , 20643840 + , + 24, TIDL_FlattenLayer , ctx_output1/relu_mbox_conf_perm 1, 1 , 1 , 23 , x , x , x , + x , x , x , x , 24 , 1 , 84 , 20 , 48 , 1 , 1 , 1 , 80640 , 1 + , + 26, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_loc 1, 1 , 1 , 17 , x , x , x , + x , x , x , x , 26 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , 1474560 + , + 27, TIDL_FlattenLayer , ctx_output2/relu_mbox_loc_perm 1, 1 , 1 , 26 , x , x , x , + x , x , x , x , 27 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , 1 + , + 28, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_conf 1, 1 , 1 , 17 , x , x , x , + x , x , x , x , 28 , 1 , 256 , 10 , 24 , 1 , 126 , 10 , 24 , 7741440 + , + 29, TIDL_FlattenLayer , ctx_output2/relu_mbox_conf_perm 1, 1 , 1 , 28 , x , x , x , + x , x , x , x , 29 , 1 , 126 , 10 , 24 , 1 , 1 , 1 , 30240 , 1 + , + 31, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_loc 1, 1 , 1 , 18 , x , x , x , + x , x , x , x , 31 , 1 , 256 , 5 , 12 , 1 , 24 , 5 , 12 , 368640 + , + 32, TIDL_FlattenLayer , ctx_output3/relu_mbox_loc_perm 1, 1 , 1 , 31 , x , x , x , + x , x , x , x , 32 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , 1 + , + 33, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_conf 1, 1 , 1 , 18 , x , x , x , + x , x , x , x , 33 , 1 , 256 , 5 , 12 , 1 , 126 , 5 , 12 , 1935360 + , + 34, TIDL_FlattenLayer , ctx_output3/relu_mbox_conf_perm 1, 1 , 1 , 33 , x , x , x , + x , x , x , x , 34 , 1 , 126 , 5 , 12 , 1 , 1 , 1 , 7560 , 1 + , + 36, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_loc 1, 1 , 1 , 19 , x , x , x , + x , x , x , x , 36 , 1 , 256 , 3 , 6 , 1 , 24 , 3 , 6 , 110592 + , + 37, TIDL_FlattenLayer , ctx_output4/relu_mbox_loc_perm 1, 1 , 1 , 36 , x , x , x , + x , x , x , x , 37 , 1 , 24 , 3 , 6 , 1 , 1 , 1 , 432 , 1 + , + 38, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_conf 1, 1 , 1 , 19 , x , x , x , + x , x , x , x , 38 , 1 , 256 , 3 , 6 , 1 , 126 , 3 , 6 , 580608 + , + 39, TIDL_FlattenLayer , ctx_output4/relu_mbox_conf_perm 1, 1 , 1 , 38 , x , x , x , + x , x , x , x , 39 , 1 , 126 , 3 , 6 , 1 , 1 , 1 , 2268 , 1 + , + 41, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_loc 1, 1 , 1 , 20 , x , x , x , + x , x , x , x , 41 , 1 , 256 , 2 , 3 , 1 , 16 , 2 , 3 , 24576 + , + 42, TIDL_FlattenLayer , ctx_output5/relu_mbox_loc_perm 1, 1 , 1 , 41 , x , x , x , + x , x , x , x , 42 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , 1 + , + 43, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_conf 1, 1 , 1 , 20 , x , x , x , + x , x , x , x , 43 , 1 , 256 , 2 , 3 , 1 , 84 , 2 , 3 , 129024 + , + 44, TIDL_FlattenLayer , ctx_output5/relu_mbox_conf_perm 1, 1 , 1 , 43 , x , x , x , + x , x , x , x , 44 , 1 , 84 , 2 , 3 , 1 , 1 , 1 , 504 , 1 + , + 46, TIDL_ConcatLayer , mbox_loc 1, 5 , 1 , 22 , 27 , 32 , 37 , +42 , x , x , x , 46 , 1 , 1 , 1 , 15360 , 1 , 1 , 1 , 23088 , 1 + , + 47, TIDL_ConcatLayer , mbox_conf 1, 5 , 1 , 24 , 29 , 34 , 39 , +44 , x , x , x , 47 , 1 , 1 , 1 , 80640 , 1 , 1 , 1 , 121212 , 1 + , + 49, TIDL_DetectionOutputLayer , detection_out 2, 2 , 1 , 46 , 47 , x , x , + x , x , x , x , 49 , 1 , 1 , 1 , 23088 , 1 , 1 , 1 , 560 , 1 + , +Total Giga Macs : 2.1312 + 1개 파일이 복사되었습니다. + +Processing config file .\tempDir\qunat_stats_config.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , +0 , 0 , 1 , 3 , 320 , 768 , + 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 32 +0 , 768 , 1 , 3 , 320 , 768 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 32 +0 , 768 , 1 , 32 , 160 , 384 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 16 +0 , 384 , 1 , 32 , 80 , 192 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 8 +0 , 192 , 1 , 64 , 80 , 192 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 8 +0 , 192 , 1 , 64 , 40 , 96 , + 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 4 +0 , 96 , 1 , 128 , 40 , 96 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 4 +0 , 96 , 1 , 128 , 20 , 48 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 2 +0 , 48 , 1 , 256 , 20 , 48 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 256 , 2 +0 , 48 , 1 , 256 , 20 , 48 , + 10, TIDL_PoolingLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 2 +0 , 48 , 1 , 256 , 10 , 24 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 1 +0 , 24 , 1 , 512 , 10 , 24 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 1 +0 , 24 , 1 , 512 , 10 , 24 , + 13, TIDL_PoolingLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 1 +0 , 24 , 1 , 512 , 5 , 12 , + 14, TIDL_PoolingLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , +5 , 12 , 1 , 512 , 3 , 6 , + 15, TIDL_PoolingLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , +3 , 6 , 1 , 512 , 2 , 3 , + 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 16 , 1 , 256 , 2 +0 , 48 , 1 , 256 , 20 , 48 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 17 , 1 , 512 , 1 +0 , 24 , 1 , 256 , 10 , 24 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 18 , 1 , 512 , +5 , 12 , 1 , 256 , 5 , 12 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 19 , 1 , 512 , +3 , 6 , 1 , 256 , 3 , 6 , + 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 20 , 1 , 512 , +2 , 3 , 1 , 256 , 2 , 3 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 21 , 1 , 256 , 2 +0 , 48 , 1 , 16 , 20 , 48 , + 22, TIDL_FlattenLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 16 , 2 +0 , 48 , 1 , 1 , 1 ,15360 , + 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 23 , 1 , 256 , 2 +0 , 48 , 1 , 84 , 20 , 48 , + 24, TIDL_FlattenLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 84 , 2 +0 , 48 , 1 , 1 , 1 ,80640 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 26 , 1 , 256 , 1 +0 , 24 , 1 , 24 , 10 , 24 , + 26, TIDL_FlattenLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 24 , 1 +0 , 24 , 1 , 1 , 1 , 5760 , + 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 28 , 1 , 256 , 1 +0 , 24 , 1 , 126 , 10 , 24 , + 28, TIDL_FlattenLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 126 , 1 +0 , 24 , 1 , 1 , 1 ,30240 , + 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 31 , 1 , 256 , +5 , 12 , 1 , 24 , 5 , 12 , + 30, TIDL_FlattenLayer , 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 32 , 1 , 24 , +5 , 12 , 1 , 1 , 1 , 1440 , + 31, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 33 , 1 , 256 , +5 , 12 , 1 , 126 , 5 , 12 , + 32, TIDL_FlattenLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 126 , +5 , 12 , 1 , 1 , 1 , 7560 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 36 , 1 , 256 , +3 , 6 , 1 , 24 , 3 , 6 , + 34, TIDL_FlattenLayer , 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 24 , +3 , 6 , 1 , 1 , 1 , 432 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 38 , 1 , 256 , +3 , 6 , 1 , 126 , 3 , 6 , + 36, TIDL_FlattenLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 126 , +3 , 6 , 1 , 1 , 1 , 2268 , + 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 41 , 1 , 256 , +2 , 3 , 1 , 16 , 2 , 3 , + 38, TIDL_FlattenLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 42 , 1 , 16 , +2 , 3 , 1 , 1 , 1 , 96 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 43 , 1 , 256 , +2 , 3 , 1 , 84 , 2 , 3 , + 40, TIDL_FlattenLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 84 , +2 , 3 , 1 , 1 , 1 , 504 , + 41, TIDL_ConcatLayer , 1, 5 , 1 , 22 , 27 , 32 , 37 , 42 , x , x , x , 46 , 1 , 1 , +1 ,15360 , 1 , 1 , 1 ,23088 , + 42, TIDL_ConcatLayer , 1, 5 , 1 , 24 , 29 , 34 , 39 , 44 , x , x , x , 47 , 1 , 1 , +1 ,80640 , 1 , 1 , 1 ,121212 , + 43, TIDL_DetectionOutputLayer , 1, 2 , 1 , 46 , 47 , x , x , x , x , x , x , 49 , 1 , 1 , +1 ,23088 , 1 , 1 , 1 , 560 , + 44, TIDL_DataLayer , 0, 1 , -1 , 49 , x , x , x , x , x , x , x , 0 , 1 , 1 , +1 , 560 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs + ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkC +hPitc,alignOrNot + 2 72 72 72 32 32 32 3 32 + 3 1 8 1 3 12 5 5184 1024 + 1 + 3 40 34 40 32 32 32 8 8 + 8 4 8 1 2 12 5 1360 1024 + 1 + 4 40 22 40 32 20 32 32 64 + 32 8 8 1 4 6 4 880 640 + 1 + 5 40 22 40 32 20 32 16 16 + 16 8 8 1 2 6 4 880 640 + 1 + 6 40 22 40 32 20 32 64 128 + 64 8 8 1 8 3 2 880 640 + 1 + 7 40 22 40 32 20 32 32 32 + 32 8 8 1 4 3 2 880 640 + 1 + 8 56 22 56 48 20 48 128 256 + 128 7 8 1 19 1 1 1232 960 + 1 + 9 56 22 56 48 20 48 64 64 + 64 7 8 1 10 1 1 1232 960 + 1 + 11 40 12 40 32 10 32 256 512 + 256 8 8 1 32 1 1 480 320 + 1 + 12 40 12 40 32 10 32 128 128 + 128 8 8 1 16 1 1 480 320 + 1 + 16 48 4 48 48 4 48 256 256 + 256 32 8 1 8 1 5 192 192 + 1 + 17 24 10 24 24 10 24 512 256 + 512 32 32 1 16 1 1 240 240 + 1 + 18 12 5 12 12 5 12 512 256 + 512 32 32 1 16 1 1 60 60 + 1 + 19 6 3 6 6 3 6 512 256 + 512 32 32 1 16 1 1 18 18 + 1 + 20 3 2 3 3 2 3 512 256 + 512 32 32 1 16 1 1 6 6 + 1 + 21 48 4 48 48 4 48 256 16 + 256 32 8 1 8 1 5 192 192 + 1 + 23 48 4 48 48 4 48 256 88 + 256 32 8 1 8 1 5 192 192 + 1 + 25 24 10 24 24 10 24 256 24 + 256 32 24 1 8 1 1 240 240 + 1 + 27 24 10 24 24 10 24 256 128 + 256 32 32 1 8 1 1 240 240 + 1 + 29 12 5 12 12 5 12 256 24 + 256 32 24 1 8 1 1 60 60 + 1 + 31 12 5 12 12 5 12 256 128 + 256 32 32 1 8 1 1 60 60 + 1 + 33 6 3 6 6 3 6 256 24 + 256 32 24 1 8 1 1 18 18 + 1 + 35 6 3 6 6 3 6 256 128 + 256 32 32 1 8 1 1 18 18 + 1 + 37 3 2 3 3 2 3 256 16 + 256 32 16 1 8 1 1 6 6 + 1 + 39 3 2 3 3 2 3 256 96 + 256 32 32 1 8 1 1 6 6 + 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 254 , TIDL_BatchNormLayer , PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 2 : Out Q : 4787 , TIDL_ConvolutionLayer, PASSED #MMACs = 147.46, 92.65, Sparsity : 37.17 + Layer 3 : Out Q : 4230 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 53.33, Sparsity : 62.33 + Layer 4 : Out Q : 7280 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 83.44, Sparsity : 70.53 + Layer 5 : Out Q : 10223 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 66.11, Sparsity : 53.30 + Layer 6 : Out Q : 8988 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 91.59, Sparsity : 67.65 + Layer 7 : Out Q : 10923 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 57.32, Sparsity : 59.51 + Layer 8 : Out Q : 20852 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 96.27, Sparsity : 66.00 + Layer 9 : Out Q : 18101 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 52.28, Sparsity : 63.07 + Layer 10 :TIDL_PoolingLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 11 : Out Q : 27171 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 76.31, Sparsity : 73.04 + Layer 12 : Out Q : 5405 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 31.40, Sparsity : 77.82 + Layer 13 :TIDL_PoolingLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 14 :TIDL_PoolingLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 15 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 16 : Out Q : 15924 , TIDL_ConvolutionLayer, PASSED #MMACs = 62.91, 62.91, Sparsity : 0.00 + Layer 17 : Out Q : 10177 , TIDL_ConvolutionLayer, PASSED #MMACs = 31.46, 31.46, Sparsity : 0.00 + Layer 18 : Out Q : 14028 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.86, 7.86, Sparsity : 0.00 + Layer 19 : Out Q : 17569 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.36, 2.36, Sparsity : 0.00 + Layer 20 : Out Q : 26121 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.79, 0.79, Sparsity : 0.00 + Layer 21 : Out Q : 4366 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.93, 3.93, Sparsity : 0.00 + Layer 22 :TIDL_FlattenLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 23 : Out Q : 3862 , TIDL_ConvolutionLayer, PASSED #MMACs = 21.63, 21.63, Sparsity : 0.00 + Layer 24 :TIDL_FlattenLayer, PASSED #MMACs = 0.08, 0.08, Sparsity : 0.00 + Layer 25 : Out Q : 5460 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.47, 1.47, Sparsity : 0.00 + Layer 26 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 27 : Out Q : 2597 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.86, 7.86, Sparsity : 0.00 + Layer 28 :TIDL_FlattenLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 29 : Out Q : 6983 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 30 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 31 : Out Q : 2508 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.97, 1.97, Sparsity : 0.00 + Layer 32 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 33 : Out Q : 9470 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.11, 0.11, Sparsity : 0.00 + Layer 34 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 35 : Out Q : 3264 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.59, 0.59, Sparsity : 0.00 + Layer 36 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 37 : Out Q : 8417 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 38 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 39 : Out Q : 3940 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.15, 0.15, Sparsity : 0.00 + Layer 40 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 41 : Out Q : 4383 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 42 : Out Q : 2518 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 43 : #MMACs = 0.00, 0.00, Sparsity : 0.00 +End of config list found ! + +c:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDLSRC.01.01.02.00\modules\ti_dl\utils\tidlModel +Import> What else should I check? Thank you for your help. BR, Khethan + +Hi Khethan, Can you share your output ? Thanks, Praveen + +Hi Praveen, Here I attach the output for the input. tempDir.zip BR, Khethan + +Hi Praveen, I have tested on TDA2P EVM, but the output data is initialized as below attachment files. evm_output.zip This phenomenon seems to be the same in PC simulation mode. As mentioned earlier, if I use eve_test_dl_algo.out.exe, which is included in the package by default, the output is very good. The TIDL build was referenced in the TIDeepLearningLibrary_UserGuide.pdf document. BR, Khethan + +Hi Praveen, I tried to compile eve and dsp again with TIDL_SRC(1.1.2), and confirmed that the generated file (dsp_test_dl_algo.out, eve_test_dl_algo.out) works fine on EVM through CCS as output file(stats_tool_out.bin). However, when I execute the same model file with "tidl od usecase" in EVM(sd_boot), the video is played but the bbox is not displayed. please refer my data. eve_data_log.zip I would appreciate your advice on what went wrong. BR, Khethan + +Hi Khethan, Were you able get TIDL Usecase working as is from release package? Thanks, Praveen + +Hi Praveen, The package(3.3.0.0) which i use current was not supported TIDL usecase for TDA2P, but I confirmed that it works well after modifying the chain etc with reference to TDA2X. Regarding above issue, It was related to layersGroupId valule in tidl_import_JDetNex.txt. When I values just change as below regardless of version, the problem was solved. before: layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 after: layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 But there was another problem. 1. When tidl usecase is executed, bbox is not displayed from the beginning and box is displayed from about 20sec of video. 2. When video(inData and inHeader) are replaced with mine, frame is played at 1 ~ 2fps slowly, resulting in frame reversal. the Problem is not reproduced when using ti demo clip. I made this clip using the program(ffmpeg&ffprobe&sizeBin) and It seem like to have no problem. BR, Khethan + +Hi Praveen #1 I have reduced the time to 6sec by adjusting parameters( quantHistoryParam1 / 2 and quantMargin) as below. 20, 5, 0 -> 40, 40, 40 Is there any problem using this value? How can we reduce the lead time further? I have read for the doc(tidl user guide) for parameter but I do not understand it enough. could you please explain about the parameter in detail(unit.etc) #2 The attached log file does not seem to be a problem. revers_sym_log.txt Referencing TIDeepLearningLibrary_UserGuide.pdf 3.7 (Input and Output Data Formats), clip format is below. right? width: 760(video)+4(MAX_PAD), height; 312(video)+4(MAX_PAD) If it is not related to it, What should I do ? BR, Khethan + +I am sorry, The clip size should be modified as follows due to my mistake width: 760(video)+2*4(MAX_PAD), height; 312(video)+2*4(MAX_PAD) BR, Khethan + +Hi Khethan, #1 The lead time can not be reduced by changing these quant parameters, these parameters are used to improve the accuracy, I explained these parameters in detail below, In TIDL, we use the current computation of min and max to update the quantization parameters for next frame. We don’t directly use it in the next frame, we gradually update. This quantHistoryParam1 / 2 and quantMargin values are used to control, how fast we need update the quantization parameter. If quantHistoryParam1 / 2 are higher than the update will happen faster. QuantMargin controls the margin that would want for max to grow. #2 Yes, this padding is correct Thanks, Praveen + +Hi Praveen, My issue was solved Thank you for your support. BR, Khethan + diff --git a/data2/text/range/30001+/737974.txt b/data2/text/range/30001+/737974.txt new file mode 100644 index 0000000000000000000000000000000000000000..ca35192703cd39f9f1db385a6fe9d3da8e035a4b --- /dev/null +++ b/data2/text/range/30001+/737974.txt @@ -0,0 +1,814 @@ +Ticket Name: Linux/TDA2: TIDL usecase on Linux + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi everyone, I transfered TIDL usecase from RTOS to Linux. I have a problem with execution because results of execution differ on TIDL algorithm which runs on DSP1. I checked input data in TIDL algorithm link and they are same every time so buffers are communicated correctly between links. However, output buffers are usually different with every new execution. Only when I insert in algorithm link code that print large amount of data (e.g. print all bytes of neural network structure), sometimes I get correct output. My usecase consists of same links as original TIDL usecase on RTOS. Does anyone have any idea what is happening here? Regards, Sasa + +Responses: +Hi Sasa, Could you please let us know which version of SDK & TIDL version you are using ? Regards Surya + +Hi Surya, I'm using PROCESSOR SDK 3.03 and TIDL 1.0.0.0. + +Hi, TIDL usecase is not been tested on Linux platform. Still you can modify the usecase and run only 1 tidl link on eve and 1 on dsp and dump the input of eve and output of dsp for multiple cases assuming you are using the same input files. Can you let us know what all changes have you done to port TIDL usecase on linux? Regards, Anuj + +Hi Anuj, original usecase link chain is: NullSource(IPU1_0) -> Alg_tidlpreproc (A15) -> Alg_tidl_1 (DSP1) -> Merge (IPU1_0) -> Merge (IPU1_0) -> Null (IPU1_0). Ported usecase link chain is: NullSource(A15) -> Alg_tidlpreproc (IPU1_0) -> Alg_tidl_1 (DSP1) -> Merge (IPU1_0) -> Merge (IPU1_0) -> Null (A15). As linux is running on A15 it was necessary to use NullSource and Null links on A15 core because of read and write operations with memory card. Regarding this change we had to replace BspOsal function calls with OSA function calls in usecase.We had no changes in tidlPreproc and tidl algorithm. Also, we checked in several ways content which is read from SD card and sent to tidl algorithm plugin. We used CRC on output buffer of tidlPreproc and input buffer of tidl plugin. CRC are always equal and more importantly same with every execution. However, output is always different and with adding or removing Vps_printf calls(for "debugging" purposes) can cause different behavior. For example, if we have a lot of printing on console, usecase sometimes work correctly, but if we remove all of it, it doesn't even write anything to output file. I'm sending you tidl usecase files we changed. If you can take a look and tell as if there is some problem we would appreciate that. Best regards, Sasa tidl_uc.tar.gz + +Hi, wt think we narrowed down a problem a little bit. In chains_common_tidl.c file we checked function Chains_tidlFillNetParamsMem function as it is reading neural network parameters from file and write them to shared memory. It appears reading is ok. To make it easier to check parameters, we calculated CRC over those parameters. After that we checked those same parameters on DSP core where they are used for processing input image. We used here CRC again and it appears that we often get different CRC value than in function Chains_tidlFillNetParamsMem. As CRC is calculated over several different buffers which represents parameters of neural network. Interesting is that whenever CRC is wrong, that value is 0 and it is on one or two buffers, but every time it is some different buffer. More interestingly content of those "faulty" buffers are allways the same. I'm sure that CRC function is working fine. You have chains_common_tidl.c file in attachment if it is of some help. Regards, Sasa chains_common_tidl.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI’S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include +#include +#include + +#define INIT 0xffffffff +#define XOROT 0xffffffff + +uint32_t crctable[256] = +{ + 0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL, + 0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L, + 0x0EDB8832L, 0x79DCB8A4L, 0xE0D5E91EL, 0x97D2D988L, + 0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L, 0x90BF1D91L, + 0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL, + 0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L, + 0x136C9856L, 0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL, + 0x14015C4FL, 0x63066CD9L, 0xFA0F3D63L, 0x8D080DF5L, + 0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L, 0xA2677172L, + 0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL, + 0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L, + 0x32D86CE3L, 0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L, + 0x26D930ACL, 0x51DE003AL, 0xC8D75180L, 0xBFD06116L, + 0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L, 0xB8BDA50FL, + 0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L, + 0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL, + 0x76DC4190L, 0x01DB7106L, 0x98D220BCL, 0xEFD5102AL, + 0x71B18589L, 0x06B6B51FL, 0x9FBFE4A5L, 0xE8B8D433L, + 0x7807C9A2L, 0x0F00F934L, 0x9609A88EL, 0xE10E9818L, + 0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L, + 0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL, + 0x6C0695EDL, 0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L, + 0x65B0D9C6L, 0x12B7E950L, 0x8BBEB8EAL, 0xFCB9887CL, + 0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L, 0xFBD44C65L, + 0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L, + 0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL, + 0x4369E96AL, 0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L, + 0x44042D73L, 0x33031DE5L, 0xAA0A4C5FL, 0xDD0D7CC9L, + 0x5005713CL, 0x270241AAL, 0xBE0B1010L, 0xC90C2086L, + 0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL, + 0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L, + 0x59B33D17L, 0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL, + 0xEDB88320L, 0x9ABFB3B6L, 0x03B6E20CL, 0x74B1D29AL, + 0xEAD54739L, 0x9DD277AFL, 0x04DB2615L, 0x73DC1683L, + 0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L, + 0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L, + 0xF00F9344L, 0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL, + 0xF762575DL, 0x806567CBL, 0x196C3671L, 0x6E6B06E7L, + 0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL, 0x67DD4ACCL, + 0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L, + 0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L, + 0xD1BB67F1L, 0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL, + 0xD80D2BDAL, 0xAF0A1B4CL, 0x36034AF6L, 0x41047A60L, + 0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL, 0x4669BE79L, + 0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L, + 0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL, + 0xC5BA3BBEL, 0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L, + 0xC2D7FFA7L, 0xB5D0CF31L, 0x2CD99E8BL, 0x5BDEAE1DL, + 0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL, 0x026D930AL, + 0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L, + 0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L, + 0x92D28E9BL, 0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L, + 0x86D3D2D4L, 0xF1D4E242L, 0x68DDB3F8L, 0x1FDA836EL, + 0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L, 0x18B74777L, + 0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL, + 0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L, + 0xA00AE278L, 0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L, + 0xA7672661L, 0xD06016F7L, 0x4969474DL, 0x3E6E77DBL, + 0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L, 0x37D83BF0L, + 0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L, + 0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L, + 0xBAD03605L, 0xCDD70693L, 0x54DE5729L, 0x23D967BFL, + 0xB3667A2EL, 0xC4614AB8L, 0x5D681B02L, 0x2A6F2B94L, + 0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL, 0x2D02EF8DL +}; + + + +uint32_t crc_normal (uint8_t *blk_adr, uint32_t blk_len) +{ + uint32_t crc = INIT; + while (blk_len--) + crc = crctable[(crc ^ *blk_adr++) & 0xFFL] ^ (crc >> 8); + return crc^XOROT; +} + +/****************************************************************************** + * TIDL Common functions: + * The following functions should be in sync with the similar functions + * defined in the $(tidl_PATH)\modules\ti_dl\test\src\tidl_tb.c file. + * Chains_tidlReadNet <-> tidl_readNet + * Chains_tidlAllocNetParamsMem <-> tidl_allocNetParamsMem + * Chains_tidlFillNetParamsMem <-> tidl_fillNetParamsMem + ******************************************************************************/ + + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Int32 Chains_tidlReadNet(sTIDL_Network_t *net, char *netFile) +{ + Int32 fp; + UInt32 readSize; + + fp = ChainsCommon_Osal_fileOpen( + netFile, + CHAINSCOMMON_OSAL_FILEMODE_READ_BIN); + UTILS_assert(-1 != fp); + + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)net, + sizeof(sTIDL_Network_t), + &readSize); + UTILS_assert(readSize == sizeof(sTIDL_Network_t)); + + ChainsCommon_Osal_fileClose(fp); + + return SYSTEM_LINK_STATUS_SOK; +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Int32 Chains_tidlAllocNetParamsMem(sTIDL_Network_t *net) +{ + Int32 i; + + for(i = 0; i < net->numLayers; i++) + { + if((TIDL_ConvolutionLayer == net->TIDLLayers[i].layerType) || + (TIDL_Deconv2DLayer == net->TIDLLayers[i].layerType)) + { + sTIDL_ConvParams_t *conv2dPrms = \ + &net->TIDLLayers[i].layerParams.convParams; + conv2dPrms->weights.bufSize = \ + net->weightsElementSize * (conv2dPrms->kernelW * conv2dPrms->kernelH * + conv2dPrms->numInChannels * conv2dPrms->numOutChannels) + /conv2dPrms->numGroups; + conv2dPrms->weights.ptr = \ + ChainsCommon_Osal_memAlloc(conv2dPrms->weights.bufSize, 32); + + conv2dPrms->bias.bufSize = net->biasElementSize * conv2dPrms->numOutChannels; + conv2dPrms->bias.ptr = \ + ChainsCommon_Osal_memAlloc(conv2dPrms->bias.bufSize, 32); + } + else if(TIDL_BiasLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BiasParams_t *biasPrms = &net->TIDLLayers[i].layerParams.biasParams; + biasPrms->bias.bufSize = net->biasElementSize * biasPrms->numChannels; + biasPrms->bias.ptr = \ + ChainsCommon_Osal_memAlloc(biasPrms->bias.bufSize, 32); + } + else if(TIDL_BatchNormLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BatchNormParams_t *batchNormPrms = \ + &net->TIDLLayers[i].layerParams.batchNormParams; + batchNormPrms->weights.bufSize = \ + net->weightsElementSize * batchNormPrms->numChannels; + batchNormPrms->weights.ptr = + ChainsCommon_Osal_memAlloc(batchNormPrms->weights.bufSize, 32); + batchNormPrms->bias.bufSize = \ + net->biasElementSize * batchNormPrms->numChannels; + batchNormPrms->bias.ptr = + ChainsCommon_Osal_memAlloc(batchNormPrms->bias.bufSize, 32); + + batchNormPrms->reluParams.slope.bufSize = + net->slopeElementSize * batchNormPrms->numChannels; + if(TIDL_PRelU == batchNormPrms->reluParams.reluType) + { + batchNormPrms->reluParams.slope.ptr = + ChainsCommon_Osal_memAlloc( + batchNormPrms->reluParams.slope.bufSize, 32); + } + } + else if(TIDL_InnerProductLayer == net->TIDLLayers[i].layerType) + { + sTIDL_InnerProductParams_t *ipPrms = \ + &net->TIDLLayers[i].layerParams.innerProductParams; + ipPrms->bias.bufSize = net->biasElementSize * ipPrms->numOutNodes; + ipPrms->bias.ptr = \ + ChainsCommon_Osal_memAlloc( + SystemUtils_align(ipPrms->bias.bufSize, 128), 32); + + ipPrms->weights.bufSize = \ + net->weightsElementSize* ipPrms->numInNodes * ipPrms->numOutNodes; + ipPrms->weights.ptr = \ + ChainsCommon_Osal_memAlloc( + SystemUtils_align((ipPrms->weights.bufSize + 16 * \ + net->TIDLLayers[i].layerParams.innerProductParams.numInNodes), + 1024), 32); + } + else if(TIDL_DetectionOutputLayer == net->TIDLLayers[i].layerType) + { + sTIDL_DetectOutputParams_t *detectPrms = \ + &net->TIDLLayers[i].layerParams.detectOutParams; + detectPrms->priorBox.bufSize = detectPrms->priorBoxSize * sizeof(float); + detectPrms->priorBox.ptr = ChainsCommon_Osal_memAlloc( + SystemUtils_align(detectPrms->priorBoxSize * + detectPrms->priorBox.bufSize, 128), 32); + } + } + + return SYSTEM_LINK_STATUS_SOK; +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Void Chains_sparseConv2dCoffesS8(Int8 *ptr, Int32 n, UInt8 thr) +{ + Int32 i0; + + for(i0 = 0; i0 < n; i0++) + { + if(((UInt8)(rand() & 0xFF)) > thr) + { + ptr[i0] = 0; + } + } +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Void Chains_createRandPatternS16(Int16 *ptr, Int16 n, Int16 width, Int16 height, + Int16 pitch, Int32 chOffset) +{ + Int16 val; + Int32 i0, i1, i2; + for(i0 = 0; i0 < n; i0++) + { + for(i1 = 0; i1 < height; i1++) + { + for(i2 = 0; i2 < width; i2++) + { + val = rand() & 0x7FFF; + ptr[i0 * chOffset + i1 * pitch + i2] = (rand() & 1) ? val : -val; + } + } + } +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Void Chains_createRandPatternS8(Int8 *ptr, Int16 roi, Int16 n, + Int16 width, Int16 height, Int16 pitch, + Int32 chOffset) +{ + Int16 val; + Int32 i0, i1, i2, i3; + + for(i3 = 0; i3 < roi; i3++) + { + for(i0 = 0; i0 < n; i0++) + { + for(i1 = 0; i1 < height; i1++) + { + for(i2 = 0; i2 < width; i2++) + { + val = rand() & 0x7F; + ptr[i3 * n * chOffset + i0 * chOffset + i1 * pitch +i2] = \ + (rand() & 1) ? val : -val; + } + } + } + } +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Int32 Chains_tidlFillNetParamsMem(sTIDL_Network_t *net, char *prmFile) +{ + Int32 i; + Int32 fp; + UInt32 dataSize, readSize; + fp = ChainsCommon_Osal_fileOpen( + prmFile, + CHAINSCOMMON_OSAL_FILEMODE_READ_BIN); + UTILS_assert(-1 != fp); + + for(i = 0; i < net->numLayers; i++) + { + if((TIDL_ConvolutionLayer == net->TIDLLayers[i].layerType) || + (TIDL_Deconv2DLayer == net->TIDLLayers[i].layerType)) + { + sTIDL_ConvParams_t *conv2dPrms = &net->TIDLLayers[i].layerParams.convParams; + + if(RANDOM_INPUT) + { + Chains_createRandPatternS8( + (Int8 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + 1, + conv2dPrms->numInChannels/conv2dPrms->numGroups, + conv2dPrms->numOutChannels, + conv2dPrms->kernelW * conv2dPrms->kernelH, + conv2dPrms->numOutChannels, + conv2dPrms->kernelW * conv2dPrms->kernelW * conv2dPrms->numOutChannels); + + if(NO_ZERO_COEFF_PERCENT < 100) + { + Chains_sparseConv2dCoffesS8((Int8 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + conv2dPrms->weights.bufSize, + NO_ZERO_COEFF_PERCENT * 2.55); + } + + if(conv2dPrms->enableBias) + { + dataSize = conv2dPrms->numOutChannels; + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr),1,dataSize,1,1,1); + } + else + { + memset( + (Int8 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr),0,conv2dPrms->numOutChannels * 2); + } + } + else + { + dataSize = (conv2dPrms->numInChannels * conv2dPrms->numOutChannels * + conv2dPrms->kernelW * conv2dPrms->kernelH)/conv2dPrms->numGroups; + + /* Read weights based on its size */ + if(net->weightsElementSize == 2) + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + dataSize, + &readSize); + UTILS_assert(readSize == dataSize); + } + UInt8* ptr = (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr); + //int ij = 0; + UInt32 bufCrc = crc_normal(ptr, conv2dPrms->weights.bufSize); + Vps_printf("Buf crc: %x\n", bufCrc); + /* for (ij = 0; ij < conv2dPrms->weights.bufSize; ij++) + { + Vps_printf("Pos %d - Val %x\n", ij, *(ptr + ij)); + } */ + + + if(NO_ZERO_COEFF_PERCENT < 100) + { + Chains_sparseConv2dCoffesS8((Int8 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + conv2dPrms->weights.bufSize, + NO_ZERO_COEFF_PERCENT * 2.55); + } + + if(conv2dPrms->enableBias) + { + dataSize = conv2dPrms->numOutChannels; + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + } + else + { + memset( + (Int8 *)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr),0,conv2dPrms->numOutChannels * 2); + } + } + + /* Cache Wb of the buffers */ + dataSize = (conv2dPrms->numInChannels * conv2dPrms->numOutChannels * + conv2dPrms->kernelW * conv2dPrms->kernelH)/conv2dPrms->numGroups; + if(net->weightsElementSize == 2) + { + dataSize *= 2; + } + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr) + dataSize)); + + dataSize = conv2dPrms->numOutChannels; + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->bias.ptr) + dataSize)); + } + else if(TIDL_BiasLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BiasParams_t *biasPrms =&net->TIDLLayers[i].layerParams.biasParams; + dataSize = biasPrms->numChannels; + + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr),1,dataSize,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr) + dataSize)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)biasPrms->bias.ptr) + dataSize * 2)); + } + } + else if(TIDL_BatchNormLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BatchNormParams_t *bNPrms = \ + &net->TIDLLayers[i].layerParams.batchNormParams; + dataSize = bNPrms->numChannels; + + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr),1,dataSize,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr) + dataSize)); + } + else + { + if(net->weightsElementSize == 2) + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr) + dataSize * 2)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr), + dataSize, + &readSize); + UTILS_assert(readSize == dataSize); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr), + (unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->weights.ptr + dataSize)); + } + } + + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr), 1,dataSize,1,1, 1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr) + dataSize)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->bias.ptr) + dataSize * 2)); + } + + if(TIDL_PRelU == bNPrms->reluParams.reluType) + { + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr),1,dataSize,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr) + dataSize)); + } + else + { + if(net->slopeElementSize == 2) + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr) + dataSize * 2)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr), + dataSize, + &readSize); + UTILS_assert(readSize == dataSize); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)bNPrms->reluParams.slope.ptr) + dataSize)); + } + } + } + } + else if(TIDL_InnerProductLayer == net->TIDLLayers[i].layerType) + { + sTIDL_InnerProductParams_t *ipPrms = \ + &net->TIDLLayers[i].layerParams.innerProductParams; + dataSize = ipPrms->numInNodes * ipPrms->numOutNodes; + + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr),1,dataSize,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr) + dataSize)); + } + else + { + /* Read weights based on its size */ + if(net->weightsElementSize == 2) + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr) + dataSize * 2)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr), + dataSize, + &readSize); + UTILS_assert(readSize == dataSize); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->weights.ptr) + dataSize)); + } + } + + dataSize = ipPrms->numOutNodes; + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr),1,dataSize,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr) + dataSize)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr), + (dataSize * 2), + &readSize); + UTILS_assert(readSize == (dataSize * 2)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)ipPrms->bias.ptr) + dataSize *2)); + } + } + else if(TIDL_DetectionOutputLayer == net->TIDLLayers[i].layerType) + { + sTIDL_DetectOutputParams_t *detectPrms = \ + &net->TIDLLayers[i].layerParams.detectOutParams; + dataSize = detectPrms->priorBoxSize; + + if(RANDOM_INPUT) + { + Chains_createRandPatternS16((Int16 *)ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr),1,dataSize*4,1,1,1); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr) + dataSize * 4)); + } + else + { + ChainsCommon_Osal_fileRead( + fp, + (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr), + (dataSize * 4), + &readSize); + UTILS_assert(readSize == (dataSize * 4)); + + OSA_memCacheWb((unsigned int)ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr), + (unsigned int)(ChainsCommon_Osal_getVirtAddr((UInt32)detectPrms->priorBox.ptr) + dataSize * 4)); + } + } + } + + ChainsCommon_Osal_fileClose(fp); + + /* Cache wb since it is read on EVE and DSP */ + OSA_memCacheWb((unsigned int)net, + (unsigned int)(net + sizeof(sTIDL_Network_t))); + + return SYSTEM_LINK_STATUS_SOK; +} + +/** + ******************************************************************************* + * + * \brief This function Reset the statCollector registers + * SYSTEM_COMMON_CMD_RESET_STAT_COLL send to only IPU1_0 core. + * + * \return SYSTEM_LINK_STATUS_SOK on success + ******************************************************************************* +*/ +Int32 Chains_tidlFreeNetParamsMem(sTIDL_Network_t *net) +{ + Int32 i; + + for(i = 0; i < net->numLayers; i++) + { + if((TIDL_ConvolutionLayer == net->TIDLLayers[i].layerType) || + (TIDL_Deconv2DLayer == net->TIDLLayers[i].layerType)) + { + sTIDL_ConvParams_t *conv2dPrms = \ + &net->TIDLLayers[i].layerParams.convParams; + conv2dPrms->weights.bufSize = \ + net->weightsElementSize * (conv2dPrms->kernelW * conv2dPrms->kernelH * + conv2dPrms->numInChannels * conv2dPrms->numOutChannels) + /conv2dPrms->numGroups; + ChainsCommon_Osal_memFree( + conv2dPrms->weights.ptr, conv2dPrms->weights.bufSize); + + conv2dPrms->bias.bufSize = net->biasElementSize * conv2dPrms->numOutChannels; + ChainsCommon_Osal_memFree( + conv2dPrms->bias.ptr, conv2dPrms->bias.bufSize); + } + else if(TIDL_BiasLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BiasParams_t *biasPrms = &net->TIDLLayers[i].layerParams.biasParams; + biasPrms->bias.bufSize = net->biasElementSize * biasPrms->numChannels; + ChainsCommon_Osal_memFree( + biasPrms->bias.ptr, biasPrms->bias.bufSize); + } + else if(TIDL_BatchNormLayer == net->TIDLLayers[i].layerType) + { + sTIDL_BatchNormParams_t *batchNormPrms = \ + &net->TIDLLayers[i].layerParams.batchNormParams; + batchNormPrms->weights.bufSize = \ + net->weightsElementSize * batchNormPrms->numChannels; + ChainsCommon_Osal_memFree( + batchNormPrms->weights.ptr, batchNormPrms->weights.bufSize); + + batchNormPrms->bias.bufSize = \ + net->biasElementSize * batchNormPrms->numChannels; + ChainsCommon_Osal_memFree( + batchNormPrms->bias.ptr, batchNormPrms->bias.bufSize); + + batchNormPrms->reluParams.slope.bufSize = + net->slopeElementSize * batchNormPrms->numChannels; + if(TIDL_PRelU == batchNormPrms->reluParams.reluType) + { + ChainsCommon_Osal_memFree( + batchNormPrms->reluParams.slope.ptr, + batchNormPrms->reluParams.slope.bufSize); + } + } + else if(TIDL_InnerProductLayer == net->TIDLLayers[i].layerType) + { + sTIDL_InnerProductParams_t *ipPrms = \ + &net->TIDLLayers[i].layerParams.innerProductParams; + ipPrms->bias.bufSize = net->biasElementSize * ipPrms->numOutNodes; + ChainsCommon_Osal_memFree( + ipPrms->bias.ptr, SystemUtils_align(ipPrms->bias.bufSize, 128)); + + + ipPrms->weights.bufSize = \ + net->weightsElementSize* ipPrms->numInNodes * ipPrms->numOutNodes; + ChainsCommon_Osal_memFree( + ipPrms->weights.ptr, + SystemUtils_align((ipPrms->weights.bufSize + 16 * \ + net->TIDLLayers[i].layerParams.innerProductParams.numInNodes), + 1024)); + } + } + + return SYSTEM_LINK_STATUS_SOK; +} + +Hi, Please 1st check if you are handelling the address translation properly. like if you allocates a memory from linux then before sending to any core running bios 1st get its physical address then send it. Similarly if any data comes to A15 from any other core then 1st get the virtual address of it then work on that buffer with virtual address. Regards, Anuj + diff --git a/data2/text/range/30001+/738356.txt b/data2/text/range/30001+/738356.txt new file mode 100644 index 0000000000000000000000000000000000000000..eb08f039dc245442a6bdc2be766463350d9b1883 --- /dev/null +++ b/data2/text/range/30001+/738356.txt @@ -0,0 +1,318 @@ +Ticket Name: RTOS/TDA2: ADAS SDK 03_05_00_00 can't compiler + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I download ADAS SDK v03_05_00_00 for linux version and want to compiler to generate FW, Below compiler option is success. 1. #make pdk 2. #make -s -j depend but "#make - s -j" will get error information from compiler. Please see attachment to get error log. SDK 03_05_00_00 build error log.txt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/utils_common/tda2xx-evm/ipu1_0/release/.deps/ndk_nsp_hooks.P:415: *** missing separator. Stop. +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target '/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target '/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target '/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target '/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +# Configuro done! +# Configuro done! +# Making tda2xx-evm:arp32_2:release:vision_sdk_lib... +# Making tda2xx-evm:arp32_1:release:vision_sdk_lib... +# Configuro done! +# Configuro done! +# Configuro done! +# Configuro done! +# Configuro done! +# Configuro done! +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F... +# +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F... +# Making tda2xx-evm:a15_0:release:vision_sdk_lib... +# +# Making tda2xx-evm:c66xdsp_2:release:vision_sdk_lib... +# Making tda2xx-evm:ipu1_1:release:vision_sdk_lib... +# Making tda2xx-evm:c66xdsp_1:release:vision_sdk_lib... +# Making tda2xx-evm:arp32_3:release:vision_sdk_lib... +# Making tda2xx-evm:arp32_4:release:vision_sdk_lib... +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg... +# +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4... +# +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66... +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F... +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F... +# +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg created. +# +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F created. +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_3_release.xearp32F created. +# +# +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_2_release.xearp32F created. +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_4_release.xearp32F created. +# +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66 created. +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 created. +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_1_release.xem4 created. +# +# Invoking configuro... +# Invoking configuro... +# Configuro done! +# Configuro done! +# Making tda2xx-evm:ipu1_0:release:vision_sdk_lib... +# Making tda2xx-evm:ipu2:release:vision_sdk_lib... +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4... +# +# Linking into /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... +# +# +# /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. +# + + undefined first referenced + symbol in file + --------- ---------------- + BspSafetyOsal_getSafetyMode /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_algorithm.aem4 + BspSafetyOsal_setSafetyMode /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/drivers/pdk_01_10_01_06/packages/ti/drv/vps/lib/tda2xx/m4/release/vps_osal_tirtos.aem4 + File_chDir /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_close /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + File_deInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_delete /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + File_eof /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_nullSrc.aem4 + File_flush /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_null.aem4 + File_gets /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_init /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_mountFs /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_open /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + File_read /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_seek /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_size /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + File_unmountFs /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + File_write /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Network_close /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + Network_open /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + Network_read /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_rx.aem4 + Network_sessionClose /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + Network_sessionOpen /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + Network_waitConnect /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + Network_write /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_network_tx.aem4 + RemoteLog_init /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/main_common_ipu1_0.oem4 + System_qspiEraseSector /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + System_qspiInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + System_qspiReadSector /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + System_qspiWriteSector /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + System_uartInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_TestTimer /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_bufCreate /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufCreateExt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_iva.aem4 + Utils_bufDelete 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/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufGetFullBuffer /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vpe.aem4 + Utils_bufGetFullExt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_iva.aem4 + Utils_bufInitFrame /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufPrintStatus /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vip_capture.aem4 + Utils_bufPutEmpty /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufPutEmptyBuffer /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufPutEmptyBufferExt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_iva.aem4 + Utils_bufPutEmptyExt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_iva.aem4 + Utils_bufPutFull /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_bufPutFullBuffer /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcIn.aem4 + Utils_bufPutFullExt /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_iva.aem4 + Utils_calcFps /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vip_capture.aem4 + Utils_cbufOcmcAlloc /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vip_capture.aem4 + Utils_cbufOcmcDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vip_capture.aem4 + Utils_cbufOcmcFree /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_vip_capture.aem4 + Utils_cbufOcmcInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_cioDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_cioInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_commonErrorRaiseHook /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu1_0_pem4.oem4 + Utils_dmaCopy2D /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_dmaCreateCh /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_dmaDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_dmaDeleteCh /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_dmaFill2D /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_dmaInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_dmaTestCopyFill /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_doSkipBuf /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_emifEccDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_emifEccInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_fileReadFile /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_fileTestRun /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_getAppInitState /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/main_common_ipu1_0.oem4 + Utils_getClkHz /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/main_common_ipu1_0.oem4 + Utils_getCurGlobalTimeInMsec /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/codecs/framework_components_3_40_02_07/packages/ti/sdo/fc/ires/hdvicp/lib/release/hdvicp2.aem4 + Utils_getCurGlobalTimeInUsec /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_getCurTimeInMsec /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_getGlobalTimeCounterValue /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_ipu_system.aem4 + Utils_globalTimerInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_idleFxn /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu1_0_pem4.oem4 + Utils_idlePrepare /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/main_common_ipu1_0.oem4 + Utils_ipcQueCreate /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcOut.aem4 + Utils_ipcQueDelete /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcOut.aem4 + Utils_ipcQueIsEmpty /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcIn.aem4 + Utils_ipcQueRead /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcIn.aem4 + Utils_ipcQueReset /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcIn.aem4 + Utils_ipcQueWrite /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_ipcIn.aem4 + Utils_linkStatsCollectorAllocInst /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_linkStatsCollectorDeAllocInst /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_linkStatsCollectorDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_linkStatsCollectorInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_linkStatsCollectorProcessCmd /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Utils_linkStatsGetGetMaxPrfLoadInst /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_linkStatsGetPrfLoadInst /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_linkStatsPrintDisplayErrorStats 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/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/package/cfg/MAIN_APP_ipu1_0_pem4.oem4 + Utils_taskTimerTestRun /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempChangeColdThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempChangeHotThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempChangeStepSize /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempConfigDeInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempConfigInit /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempGetColdThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempGetCurrTemperature /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempGetHotThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempGetLimpHomeState /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempGetStepSize /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempReadAllColdThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempReadAllHotThreshold /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tempUpdateAllVoltLimpHomeState /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tskCreate /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tskDelete /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tskFlushMsg /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tskMultiMbxCreate /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + Utils_tskMultiMbxSetupTskHndl /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/links_common_system.aem4 + Utils_updateLatency /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + Vps_printf /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/main_common_ipu1_0.oem4 + g_AssertFailLoop /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/m4/release/app_alg_plugins.aem4 + uartRead /home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 + +error: unresolved symbols remain +error: errors encountered during linking; + "/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/t + da2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4" + not built +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_m4.mk:303: recipe for target '/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4' failed +make[7]: *** [/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error 1 +/home/princekuo/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu1_0' failed +make[6]: *** [ipu1_0] Error 2 +MAKEFILE.MK:151: recipe for target 'apps_ipu1_0' failed +make[5]: *** [apps_ipu1_0] Error 2 +MAKEFILE.MK:31: recipe for target 'apps' failed +make[4]: *** [apps] Error 2 +MAKEFILE.MK:298: recipe for target 'apps' failed +make[3]: *** [apps] Error 2 +Makefile:171: recipe for target 'apps_exe' failed +make[2]: *** [apps_exe] Error 2 +Makefile:36: recipe for target 'apps' failed +make[1]: *** [apps] Error 2 +Makefile:12: recipe for target 'vision_sdk' failed +make: *** [vision_sdk] Error 2 + + Could you please give me some advise. Thanks. + +Responses: +Hi Prince, can you make sure of the following: 1. You have the right kernel and u-boot sources (described in chapter "2.4.2 Install Linux Components" in VisionSDK_Linux_UserGuide.pdf ) 2. you use the rootfs from here: software-dl.ti.com/.../index_FDS.html Also can you remove "binaries" directory and try a clean build? Regards, Yordan + +Hi Prince, Can you run the following two commands "make -s depend" and "make -s" after removing binaries folder. Regards, Rishabh + +Hi Prince, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/30001+/740856.txt b/data2/text/range/30001+/740856.txt new file mode 100644 index 0000000000000000000000000000000000000000..f20aaf8b8a5b4049e723d8786806437e2d957e37 --- /dev/null +++ b/data2/text/range/30001+/740856.txt @@ -0,0 +1,36 @@ +Ticket Name: RTOS/TDA2: encode link whether to support two instances + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DM385 Tool/software: TI-RTOS I use two channlel one is h264,the ohter is MJPEG. the encoude input is 30 FPS, but the output is 15. (It should be 30); Please help me to check this issue! how to config the parameter to complete that the output is 30FPS. the test result as below: [HOST] [IPU2 ] 43.881199 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 43.881321 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 43.881473 s: -------------------------------------------------- [HOST] [IPU2 ] 43.881595 s: 0 | 30.17 0. 0 0. 0 15. 8 [HOST] [IPU2 ] 43.881839 s: 1 | 30.17 0. 0 0. 0 15. 8 the parameter is: case '0': /* MJPEG */ pLinkChPrm->format = SYSTEM_IVIDEO_MJPEG; pLinkChPrm->profile = 0; pLinkChPrm->dataLayout = VENC_FIELD_SEPARATED; pLinkChPrm->fieldMergeEncodeEnable = TRUE; pLinkChPrm->enableAnalyticinfo = 0; pLinkChPrm->enableWaterMarking = 0; pLinkChPrm->maxBitRate = 0; pLinkChPrm->encodingPreset = 0; pLinkChPrm->rateControlPreset = 0; pLinkChPrm->enableHighSpeed = 0; pLinkChPrm->enableSVCExtensionFlag = 0; pLinkChPrm->numTemporalLayer = 0; pLinkChPrm->overrideInputScanFormat= 0; pLinkChPrm->fieldPicEncode = 0; pLinkDynPrm->intraFrameInterval = 0; pLinkDynPrm->targetBitRate = (10 * 1000 * 1000); pLinkDynPrm->interFrameInterval = 0; pLinkDynPrm->mvAccuracy = 0; pLinkDynPrm->inputFrameRate = 30; pLinkDynPrm->rcAlg = 0; pLinkDynPrm->qpMin = 0; pLinkDynPrm->qpMax = 0; pLinkDynPrm->qpInit = -1; pLinkDynPrm->vbrDuration = 0; pLinkDynPrm->vbrSensitivity = 0; break; case '1': /* H264 */ pLinkChPrm->format = SYSTEM_IVIDEO_H264HP; pLinkChPrm->profile = 100; pLinkChPrm->dataLayout = VENC_FIELD_SEPARATED; pLinkChPrm->fieldMergeEncodeEnable = TRUE; pLinkChPrm->enableAnalyticinfo = 0; pLinkChPrm->enableWaterMarking = 0; pLinkChPrm->maxBitRate = -1; pLinkChPrm->encodingPreset = SYSTEM_XDM_MED_SPEED_HIGH_QUALITY; /* Set to SYSTEM_XDM_USER_DEFINED if SEI/meta data needs to be enabled */ /* pLinkChPrm->encodingPreset = SYSTEM_XDM_USER_DEFINED; */ pLinkChPrm->rateControlPreset = SYSTEM_IVIDEO_LOW_DELAY; pLinkChPrm->enableHighSpeed = FALSE; pLinkChPrm->enableSVCExtensionFlag = FALSE; pLinkChPrm->numTemporalLayer = 0; pLinkChPrm->overrideInputScanFormat= 0; pLinkChPrm->fieldPicEncode = 0; pLinkChPrm->IDRFrameInterval = 1; pLinkDynPrm->intraFrameInterval = 30; pLinkDynPrm->targetBitRate = (10 * 1000 * 1000); pLinkDynPrm->interFrameInterval = 1; pLinkDynPrm->mvAccuracy = SYSTEM_IVIDENC2_MOTIONVECTOR_QUARTERPEL; pLinkDynPrm->inputFrameRate = 30; pLinkDynPrm->rcAlg = 0; pLinkDynPrm->qpMin = 0; pLinkDynPrm->qpMax = 51; pLinkDynPrm->qpInit = 25; pLinkDynPrm->vbrDuration = 8; pLinkDynPrm->vbrSensitivity = 0; pLinkDynPrm->maxPicSizeRatioI = 640; break; + +Responses: +my issue is how to config encode link output 30FPS. when I set pLinkDynPrm->inputFrameRate = 60 , the output is 7.5, why ? + +Hi, Are you using enc/dec anywhere else also? IVA has some capability for encoding and it can not encode more than that. Can you please press p after running your usecase for 1 min and share that log. Regards, Anuj + +Hi, Anuj The log as below: [HOST] [IPU2 ] 214.711065 s: CPU [DSP1 ] Statistics, [HOST] [IPU2 ] 214.711157 s: ************************* [HOST] [IPU2 ] 214.711218 s: [HOST] [IPU2 ] 214.711279 s: LOAD: CPU: 0.3% HWI: 0.1%, SWI:0.0%, Low Power: 0.0% [HOST] [IPU2 ] 214.711401 s: [HOST] [IPU2 ] 214.711462 s: LOAD: TSK: MISC : 0.2% [HOST] [IPU2 ] 214.711553 s: [HOST] [IPU2 ] 214.711614 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [HOST] [IPU2 ] 214.711706 s: [HOST] [IPU2 ] 214.711736 s: SYSTEM: Sempahores Objects, 456 of 1050 free [HOST] [IPU2 ] 214.711828 s: SYSTEM: Task Objects , 91 of 100 free [HOST] [IPU2 ] 214.711950 s: SYSTEM: Clock Objects , 99 of 100 free [HOST] [IPU2 ] 214.712072 s: SYSTEM: Hwi Objects , 100 of 100 free [HOST] [IPU2 ] 214.712163 s: [HOST] [IPU2 ] 214.712194 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [IPU2 ] 214.712346 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 521576 B (509 KB) [HOST] [IPU2 ] 214.712529 s: [HOST] [IPU2 ] 214.712560 s: [HOST] [IPU2 ] 214.712621 s: CPU [IPU2 ] Statistics, [HOST] [IPU2 ] 214.712682 s: ************************* [HOST] [IPU2 ] 214.712743 s: [HOST] [IPU2 ] 214.712804 s: LOAD: CPU: 41.0% HWI: 8.8%, SWI:6.7%, Low Power: 0.0% [HOST] [IPU2 ] 214.712956 s: [HOST] [IPU2 ] 214.713017 s: LOAD: TSK: DUP0 : 1.0% [HOST] [IPU2 ] 214.713109 s: LOAD: TSK: DUP1 : 0.3% [HOST] [IPU2 ] 214.713231 s: LOAD: TSK: IPC_OUT_0 : 3.4% [HOST] [IPU2 ] 214.713322 s: LOAD: TSK: MERGE0 : 0.4% [HOST] [IPU2 ] 214.713444 s: LOAD: TSK: SYNC0 : 1.6% [HOST] [IPU2 ] 214.713536 s: LOAD: TSK: SYNC1 : 0.6% [HOST] [IPU2 ] 214.713627 s: LOAD: TSK: DISPLAY0 : 1.4% [HOST] [IPU2 ] 214.713749 s: LOAD: TSK: ENC0 : 1.3% [HOST] [IPU2 ] 214.713841 s: LOAD: TSK: CAPTURE : 2.3% [HOST] [IPU2 ] 214.714115 s: LOAD: TSK: VPE0 : 6.4% [HOST] [IPU2 ] 214.714207 s: LOAD: TSK: ALGORITHM0 : 1.2% [HOST] [IPU2 ] 214.714329 s: LOAD: TSK: GrpxSrc0 : 2.8% [HOST] [IPU2 ] 214.714420 s: LOAD: TSK: STAT_COLL : 2.5% [HOST] [IPU2 ] 214.714512 s: LOAD: TSK: ENC_PROCESS_TSK_0 : 2.3% [HOST] [IPU2 ] 214.714634 s: LOAD: TSK: MISC : -2.0% [HOST] [IPU2 ] 214.714725 s: [HOST] [IPU2 ] 214.714756 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [HOST] [IPU2 ] 214.714847 s: [HOST] [IPU2 ] 214.714908 s: SYSTEM: Sempahores Objects, 174 of 1050 free [HOST] [IPU2 ] 214.715030 s: SYSTEM: Task Objects , 17 of 100 free [HOST] [IPU2 ] 214.715122 s: SYSTEM: Clock Objects , 95 of 100 free [HOST] [IPU2 ] 214.715213 s: SYSTEM: Hwi Objects , 94 of 100 free [HOST] [IPU2 ] 214.715305 s: [HOST] [IPU2 ] 214.715335 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250024 B (244 KB) [HOST] [IPU2 ] 214.715488 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 214.717470 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 262144000 B (250 MB), Free size = 163736576 B (156 MB) [HOST] [IPU2 ] 214.717714 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1047040 B (0 MB), Free size = 1037824 B (0 MB) [HOST] [IPU2 ] 214.717958 s: [HOST] [HOST ] 214.769474 s: chNum is 0 [HOST] [HOST ] 214.836759 s: chNum is 0 [HOST] [HOST ] 214.903586 s: chNum is 0 [HOST] [HOST ] 214.903647 s: CBB_REC: 91 sec [HOST] [HOST ] 214.969499 s: chNum is 0 [HOST] [HOST ] 215.036997 s: chNum is 0 [HOST] [HOST ] 215.103672 s: chNum is 0 [HOST] [HOST ] 215.169828 s: chNum is 0 [HOST] [HOST ] 215.236625 s: chNum is 0 [HOST] [HOST ] 215.303666 s: chNum is 0 [HOST] [HOST ] 215.370554 s: chNum is 0 [HOST] [HOST ] 215.436771 s: chNum is 0 [HOST] [HOST ] 215.503599 s: chNum is 0 [HOST] [HOST ] 215.570853 s: chNum is 0 [HOST] [HOST ] 215.637589 s: chNum is 0 0[HOST] [HOST ] 215.703806 s: chNum is 0 [HOST] [IPU2 ] 215.722015 s: [HOST] [IPU2 ] 215.722106 s: Statistics Collector, [HOST] [IPU2 ] 215.722167 s: [HOST] [IPU2 ] 215.722198 s: STATISTIC Avg Data Peak Data [HOST] [IPU2 ] 215.722290 s: COLLECTOR MB/s MB/s [HOST] [IPU2 ] 215.722381 s: -------------------------------------------------- [HOST] [IPU2 ] 215.722473 s: SCI_EMIF1 RD+WR | 0.000000 0.000000 [HOST] [IPU2 ] 215.722564 s: SCI_EMIF1 RD ONLY | 0.000000 0.000000 [HOST] [IPU2 ] 215.722686 s: SCI_EMIF1 WR ONLY | 0.000000 0.000000 [HOST] [IPU2 ] 215.722778 s: SCI_MA_MPU_P1 | 0.000000 0.000000 [HOST] [IPU2 ] 215.722869 s: SCI_MA_MPU_P2 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723022 s: SCI_DSS | 0.000000 0.000000 [HOST] [IPU2 ] 215.723144 s: SCI_IPU1 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723266 s: SCI_VIP1_P1 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723357 s: SCI_VIP1_P2 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723479 s: SCI_VPE_P1 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723571 s: SCI_VPE_P2 | 0.000000 0.000000 [HOST] [IPU2 ] 215.723662 s: SCI_DSP1_MDMA | 0.000000 0.000000 [HOST] [IPU2 ] 215.723784 s: SCI_DSP1_EDMA | 0.000000 0.000000 [HOST] [IPU2 ] 215.724089 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 [HOST] [IPU2 ] 215.724211 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 [HOST] [IPU2 ] 215.724303 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 [HOST] [IPU2 ] 215.724425 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 [HOST] [IPU2 ] 215.724516 s: CAL | 0.000000 0.000000 [HOST] [IPU2 ] 215.724638 s: SCI_IVA | 0.000000 0.000000 [HOST] [IPU2 ] 215.724760 s: SCI_GPU_P1 | 0.000000 0.000000 [HOST] [IPU2 ] 215.724852 s: SCI_GPU_P2 | 0.000000 0.000000 [HOST] [IPU2 ] 215.725004 s: SCI_GMAC_SW | 0.000000 0.000000 [HOST] [HOST ] 215.770542 s: chNum is 0 [HOST] [IPU2 ] 215.830232 s: [HOST] [IPU2 ] 215.830323 s: [HOST] [IPU2 ] 215.835082 s: CAPTURE: VIP1 Slice1 PortB FRAME MODE [HOST] [IPU2 ] 215.835204 s: [HOST] [IPU2 ] 215.835265 s: [ CAPTURE ] Link Statistics, [HOST] [IPU2 ] 215.835326 s: ****************************** [HOST] [IPU2 ] 215.835387 s: [HOST] [IPU2 ] 215.835448 s: Elapsed time = 173205 msec [HOST] [IPU2 ] 215.835539 s: [HOST] [IPU2 ] 215.835570 s: New data Recv = 239.79 fps [HOST] [IPU2 ] 215.835661 s: Get Full Buf Cb = 97.12 fps [HOST] [IPU2 ] 215.835753 s: Put Empty Buf Cb = 95.30 fps [HOST] [IPU2 ] 215.835844 s: Driver/Notify Cb = 239.79 fps [HOST] [IPU2 ] 215.835936 s: [HOST] [IPU2 ] 215.835997 s: Input Statistics, [HOST] [IPU2 ] 215.836058 s: [HOST] [IPU2 ] 215.836119 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.836210 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.836302 s: -------------------------------------------------- [HOST] [IPU2 ] 215.836393 s: 0 | 44.95 0. 0 0. 0 44.95 [HOST] [IPU2 ] 215.836515 s: 1 | 44.95 0. 0 0. 0 44.95 [HOST] [IPU2 ] 215.836668 s: 2 | 44.95 0. 0 0. 0 44.95 [HOST] [IPU2 ] 215.836820 s: 3 | 44.95 0. 0 0. 0 44.95 [HOST] [IPU2 ] 215.836973 s: [HOST] [IPU2 ] 215.837034 s: Output Statistics, [HOST] [IPU2 ] 215.837095 s: [HOST] [IPU2 ] 215.837125 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.837217 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.837308 s: --------------------------------------------- [HOST] [IPU2 ] 215.837400 s: 0 | 0 44.95 0. 0 0. 0 [HOST] [IPU2 ] 215.837522 s: 1 | 0 44.95 0. 0 0. 0 [HOST] [IPU2 ] 215.837644 s: 2 | 0 44.95 0. 0 0. 0 [HOST] [IPU2 ] 215.837796 s: 3 | 0 44.95 0. 0 0. 0 [HOST] [IPU2 ] 215.837979 s: [HOST] [IPU2 ] 215.838040 s: [VIP1 Slice1 PortB] Statistics [HOST] [IPU2 ] 215.838132 s: ============================== [HOST] [IPU2 ] 215.838193 s: Number of request queued : 32923 [HOST] [IPU2 ] 215.838345 s: Number of request dequeued: 24161 [HOST] [IPU2 ] 215.838437 s: Overflow Count : 0 [HOST] [IPU2 ] 215.838498 s: [HOST] [IPU2 ] 215.838559 s: CH | Q DQ Total Top Bot Total Top Bot Min/Max Min/Max Dropped Repeat Fid Desc [HOST] [IPU2 ] 215.838681 s: (I/S/CH) | Count Count Fields Fields Fields FPS FPS FPS Width Height Frames Frames Repeat Error [HOST] [IPU2 ] 215.838833 s: --------------------------------------------------------------------------------------------------------------------------- [HOST] [IPU2 ] 215.839199 s: 03.0.00 | 8236 8233 10977 5489 5488 59 29 29 720/720 240/240 2744 0 1 0 [HOST] [IPU2 ] 215.839504 s: 03.0.01 | 8235 8233 10977 5489 5488 59 29 29 720/720 240/240 2744 0 1 0 [HOST] [IPU2 ] 215.839809 s: 03.0.02 | 8236 8233 10977 5489 5488 59 29 29 720/720 240/240 2744 0 1 0 [HOST] [IPU2 ] 215.840175 s: 03.0.03 | 8236 8233 10977 5489 5488 59 29 29 720/720 240/240 2744 0 1 0 [HOST] [IPU2 ] 215.840297 s: [HOST] [IPU2 ] 215.844445 s: [HOST] [IPU2 ] 215.844537 s: [ VPE ] Link Statistics, [HOST] [IPU2 ] 215.844598 s: ****************************** [HOST] [IPU2 ] 215.844659 s: [HOST] [IPU2 ] 215.844689 s: Elapsed time = 173204 msec [HOST] [IPU2 ] 215.844781 s: [HOST] [IPU2 ] 215.844811 s: New data Recv = 97.12 fps [HOST] [IPU2 ] 215.844903 s: Get Full Buf Cb = 62.6 fps [HOST] [IPU2 ] 215.845025 s: Put Empty Buf Cb = 114.95 fps [HOST] [IPU2 ] 215.845116 s: Driver/Notify Cb = 62.6 fps [HOST] [IPU2 ] 215.845177 s: [HOST] [IPU2 ] 215.845238 s: Input Statistics, [HOST] [IPU2 ] 215.845299 s: [HOST] [IPU2 ] 215.845330 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.845421 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.845513 s: -------------------------------------------------- [HOST] [IPU2 ] 215.845574 s: 0 | 44.95 14.98 0. 0 29.96 [HOST] [IPU2 ] 215.845726 s: 1 | 44.95 14.99 0. 0 29.95 [HOST] [IPU2 ] 215.845879 s: 2 | 44.95 14.98 0. 0 29.96 [HOST] [IPU2 ] 215.846031 s: 3 | 44.95 14.98 0. 0 29.96 [HOST] [IPU2 ] 215.846184 s: [HOST] [IPU2 ] 215.846214 s: Output Statistics, [HOST] [IPU2 ] 215.846275 s: [HOST] [IPU2 ] 215.846306 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.846397 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.846458 s: --------------------------------------------- [HOST] [IPU2 ] 215.846550 s: 0 | 0 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.846672 s: 1 | 0 29.95 0. 0 0. 0 [HOST] [IPU2 ] 215.846794 s: 2 | 0 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.846946 s: 3 | 0 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.847099 s: [HOST] [IPU2 ] 215.847160 s: [ VPE ] LATENCY, [HOST] [IPU2 ] 215.847190 s: ******************** [HOST] [IPU2 ] 215.847251 s: Local Link Latency : Avg = 4159 us, Min = 1708 us, Max = 10035 us, [HOST] [IPU2 ] 215.847404 s: Source to Link Latency : Avg = 5724 us, Min = 1860 us, Max = 14183 us, [HOST] [IPU2 ] 215.847526 s: [HOST] [IPU2 ] 215.855243 s: [HOST] [IPU2 ] 215.855304 s: [ SYNC_LINK_0 ] Link Statistics, [HOST] [IPU2 ] 215.855365 s: ****************************** [HOST] [IPU2 ] 215.855426 s: [HOST] [IPU2 ] 215.855487 s: Elapsed time = 173205 msec [HOST] [IPU2 ] 215.855548 s: [HOST] [IPU2 ] 215.855578 s: New data Recv = 91.96 fps [HOST] [IPU2 ] 215.855670 s: Get Full Buf Cb = 29.95 fps [HOST] [IPU2 ] 215.855761 s: Put Empty Buf Cb = 29.95 fps [HOST] [IPU2 ] 215.855822 s: Driver/Notify Cb = 30.30 fps [HOST] [IPU2 ] 215.855944 s: [HOST] [IPU2 ] 215.856005 s: Input Statistics, [HOST] [IPU2 ] 215.856066 s: [HOST] [IPU2 ] 215.856097 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.856188 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.856249 s: -------------------------------------------------- [HOST] [IPU2 ] 215.856341 s: 0 | 29.96 0. 1 0. 0 29.95 [HOST] [IPU2 ] 215.856493 s: 1 | 29.95 0. 0 0. 0 29.95 [HOST] [IPU2 ] 215.856615 s: 2 | 29.96 0. 1 0. 0 29.95 [HOST] [IPU2 ] 215.856768 s: 3 | 29.96 0. 1 0. 0 29.95 [HOST] [IPU2 ] 215.856920 s: [HOST] [IPU2 ] 215.856981 s: Output Statistics, [HOST] [IPU2 ] 215.857042 s: [HOST] [IPU2 ] 215.857073 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.857134 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.857378 s: --------------------------------------------- [HOST] [IPU2 ] 215.857469 s: 0 | 0 29.95 0. 0 0. 0 [HOST] [IPU2 ] 215.857622 s: [HOST] [IPU2 ] 215.857683 s: [ SYNC_LINK_0 ] LATENCY, [HOST] [IPU2 ] 215.857744 s: ******************** [HOST] [IPU2 ] 215.857805 s: Local Link Latency : Avg = 4190 us, Min = 61 us, Max = 24675 us, [HOST] [IPU2 ] 215.857957 s: Source to Link Latency : Avg = 10578 us, Min = 7213 us, Max = 17485 us, [HOST] [IPU2 ] 215.858079 s: [HOST] [IPU2 ] 215.875160 s: [HOST] [IPU2 ] 215.875221 s: [ ALG_DMA_SWMS ] Link Statistics, [HOST] [IPU2 ] 215.875312 s: ****************************** [HOST] [IPU2 ] 215.875373 s: [HOST] [IPU2 ] 215.875404 s: Elapsed time = 173216 msec [HOST] [IPU2 ] 215.875495 s: [HOST] [IPU2 ] 215.875556 s: New data Recv = 29.95 fps [HOST] [IPU2 ] 215.875617 s: [HOST] [IPU2 ] 215.877142 s: Input Statistics, [HOST] [IPU2 ] 215.877203 s: [HOST] [IPU2 ] 215.877264 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.877356 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.877417 s: -------------------------------------------------- [HOST] [IPU2 ] 215.877508 s: 0 | 29.95 0. 0 0. 0 29.95 [HOST] [IPU2 ] 215.877661 s: [HOST] [IPU2 ] 215.877691 s: Output Statistics, [HOST] [IPU2 ] 215.877752 s: [HOST] [IPU2 ] 215.877783 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.877874 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.877996 s: --------------------------------------------- [HOST] [IPU2 ] 215.878088 s: 0 | 0 29.95 0. 0 0. 0 [HOST] [IPU2 ] 215.878240 s: [HOST] [IPU2 ] 215.878271 s: [ ALG_DMA_SWMS ] LATENCY, [HOST] [IPU2 ] 215.878332 s: ******************** [HOST] [IPU2 ] 215.878393 s: [HOST] [IPU2 ] 215.886140 s: [HOST] [IPU2 ] 215.886201 s: [ SYNC_LINK_1 ] Link Statistics, [HOST] [IPU2 ] 215.886262 s: ****************************** [HOST] [IPU2 ] 215.886323 s: [HOST] [IPU2 ] 215.886353 s: Elapsed time = 173217 msec [HOST] [IPU2 ] 215.886445 s: [HOST] [IPU2 ] 215.886475 s: New data Recv = 60.1 fps [HOST] [IPU2 ] 215.886567 s: Get Full Buf Cb = 59.90 fps [HOST] [IPU2 ] 215.886658 s: Put Empty Buf Cb = 14.98 fps [HOST] [IPU2 ] 215.886719 s: Driver/Notify Cb = 30.30 fps [HOST] [IPU2 ] 215.886811 s: [HOST] [IPU2 ] 215.886841 s: Input Statistics, [HOST] [IPU2 ] 215.886933 s: [HOST] [IPU2 ] 215.886994 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.887085 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.887146 s: -------------------------------------------------- [HOST] [IPU2 ] 215.887238 s: 0 | 29.95 0. 0 0. 0 29.95 [HOST] [IPU2 ] 215.887390 s: [HOST] [IPU2 ] 215.887421 s: Output Statistics, [HOST] [IPU2 ] 215.887482 s: [HOST] [IPU2 ] 215.887512 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.887604 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.887665 s: --------------------------------------------- [HOST] [IPU2 ] 215.887756 s: 0 | 0 29.95 0. 0 0. 0 [HOST] [IPU2 ] 215.887909 s: [HOST] [IPU2 ] 215.887970 s: [ SYNC_LINK_1 ] LATENCY, [HOST] [IPU2 ] 215.888031 s: ******************** [HOST] [IPU2 ] 215.888092 s: Local Link Latency : Avg = 50 us, Min = 30 us, Max = 518 us, [HOST] [IPU2 ] 215.888214 s: Source to Link Latency : Avg = 13045 us, Min = 9173 us, Max = 34322 us, [HOST] [IPU2 ] 215.888336 s: [HOST] [IPU2 ] 215.896449 s: [HOST] [IPU2 ] 215.896541 s: [ ENCODE ] Link Statistics, [HOST] [IPU2 ] 215.896602 s: ****************************** [HOST] [IPU2 ] 215.896663 s: [HOST] [IPU2 ] 215.896724 s: Elapsed time = 173214 msec [HOST] [IPU2 ] 215.896785 s: [HOST] [IPU2 ] 215.896846 s: New data Recv = 29.95 fps [HOST] [IPU2 ] 215.896998 s: Release data Recv = 29.95 fps [HOST] [IPU2 ] 215.897059 s: Get Full Buf Cb = 89.85 fps [HOST] [IPU2 ] 215.897151 s: Put Empty Buf Cb = 59.92 fps [HOST] [IPU2 ] 215.897242 s: [HOST] [IPU2 ] 215.897273 s: Input Statistics, [HOST] [IPU2 ] 215.897334 s: [HOST] [IPU2 ] 215.897395 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.897486 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.897578 s: -------------------------------------------------- [HOST] [IPU2 ] 215.897639 s: 0 | 29.95 0. 0 0. 0 14.97 [HOST] [IPU2 ] 215.897791 s: 1 | 29.95 0. 0 0. 0 14.97 [HOST] [IPU2 ] 215.897974 s: ENCODE: Num process reqest count for chId: 0 = 2744 [HOST] [IPU2 ] 215.898096 s: ENCODE: Num process complete count for chId: 0 = 2744 [HOST] [IPU2 ] 215.898188 s: ENCODE: Num process reqest count for chId: 1 = 2744 [HOST] [IPU2 ] 215.898279 s: ENCODE: Num process complete count for chId: 1 = 2744 [HOST] [IPU2 ] 215.898401 s: [HOST] [IPU2 ] 215.898432 s: [ ENCODE ] LATENCY, [HOST] [IPU2 ] 215.898493 s: ******************** [HOST] [IPU2 ] 215.898554 s: Local Link Latency : Avg = 12404 us, Min = 9425 us, Max = 40963 us, [HOST] [IPU2 ] 215.898706 s: Source to Link Latency : Avg = 24631 us, Min = 19345 us, Max = 77975 us, [HOST] [IPU2 ] 215.898828 s: [HOST] [IPU2 ] 215.898889 s: HDVICP-ID: 0 [HOST] [IPU2 ] 215.899103 s: All percentage figures are based of totalElapsedTime [HOST] [IPU2 ] 215.899225 s: [HOST] [IPU2 ] totalAcquire2Wait :1 % [HOST] [IPU2 ] totalWait2Isr :18 % [HOST] [IPU2 ] totalIsr2Done :0 % [HOST] [IPU2 ] totalWait2Done :19 % [HOST] [IPU2 ] totalDone2Release :0 % [HOST] [IPU2 ] totalAcquire2Release :22 % [HOST] [IPU2 ] totalRelease2AcquireDelay :77 % [HOST] [IPU2 ] totalElapsedTime in msec : 183119 [HOST] [IPU2 ] numAccessCnt: 5488 [HOST] [IPU2 ] 215.899560 s: IVA-FPS : 29 [HOST] [IPU2 ] 215.899621 s: Average time spent per frame in microsec: 6006 [HOST] [IPU2 ] 215.899713 s: [HOST] [IPU2 ] 215.904105 s: [HOST] [IPU2 ] 215.904166 s: [ IPC_OUT_0 ] Link Statistics, [HOST] [IPU2 ] 215.904227 s: ****************************** [HOST] [IPU2 ] 215.904288 s: [HOST] [IPU2 ] 215.904349 s: Elapsed time = 173212 msec [HOST] [IPU2 ] 215.904410 s: [HOST] [IPU2 ] 215.904471 s: New data Recv = 29.95 fps [HOST] [IPU2 ] 215.904532 s: Release data Recv = 30.0 fps [HOST] [IPU2 ] 215.904623 s: Driver/Notify Cb = 129.95 fps [HOST] [IPU2 ] 215.904684 s: [HOST] [IPU2 ] 215.904745 s: Input Statistics, [HOST] [IPU2 ] 215.904806 s: [HOST] [IPU2 ] 215.904837 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.904959 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.905050 s: -------------------------------------------------- [HOST] [IPU2 ] 215.905142 s: 0 | 14.98 0. 0 0. 0 14.98 [HOST] [IPU2 ] 215.905264 s: 1 | 14.98 0. 0 0. 0 14.98 [HOST] [IPU2 ] 215.905416 s: [HOST] [IPU2 ] 215.905447 s: Output Statistics, [HOST] [IPU2 ] 215.905508 s: [HOST] [IPU2 ] 215.905538 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.905630 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.905691 s: --------------------------------------------- [HOST] [IPU2 ] 215.905782 s: 0 | 0 14.98 0. 0 0. 0 [HOST] [IPU2 ] 215.905965 s: 1 | 0 14.98 0. 0 0. 0 [HOST] [IPU2 ] 215.906087 s: [HOST] [IPU2 ] 215.906148 s: [ IPC_OUT_0 ] LATENCY, [HOST] [IPU2 ] 215.906209 s: ******************** [HOST] [IPU2 ] 215.906270 s: Local Link Latency : Avg = 13 us, Min = 0 us, Max = 274 us, [HOST] [IPU2 ] 215.906392 s: Source to Link Latency : Avg = 24896 us, Min = 19681 us, Max = 78280 us, [HOST] [IPU2 ] 215.906514 s: [HOST] [IPU2 ] 215.911883 s: [HOST] [IPU2 ] 215.912005 s: [ DISPLAY ] Link Statistics, [HOST] [IPU2 ] 215.912066 s: ****************************** [HOST] [IPU2 ] 215.912127 s: [HOST] [IPU2 ] 215.912188 s: Elapsed time = 173208 msec [HOST] [IPU2 ] 215.912249 s: [HOST] [IPU2 ] 215.912310 s: New data Recv = 62.6 fps [HOST] [IPU2 ] 215.912371 s: Driver/Notify Cb = 59.96 fps [HOST] [IPU2 ] 215.912462 s: [HOST] [IPU2 ] 215.912493 s: Input Statistics, [HOST] [IPU2 ] 215.912554 s: [HOST] [IPU2 ] 215.912615 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.912676 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.912767 s: -------------------------------------------------- [HOST] [IPU2 ] 215.912859 s: 0 | 29.96 0. 0 0. 0 29.96 [HOST] [IPU2 ] 215.913011 s: 1 | 29.96 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.913164 s: 2 | 29.96 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.913286 s: 3 | 29.96 29.96 0. 0 0. 0 [HOST] [IPU2 ] 215.913438 s: [HOST] [IPU2 ] 215.913499 s: [ DISPLAY ] LATENCY, [HOST] [IPU2 ] 215.913560 s: ******************** [HOST] [IPU2 ] 215.913621 s: Local Link Latency : Avg = 63 us, Min = 30 us, Max = 335 us, [HOST] [IPU2 ] 215.913743 s: Source to Link Latency : Avg = 5977 us, Min = 2348 us, Max = 14092 us, [HOST] [IPU2 ] 215.913865 s: [HOST] [IPU2 ] 215.913957 s: [HOST] [IPU2 ] 215.914018 s: [ DISPLAY VID1 ] Additional Statistics, [HOST] [IPU2 ] 215.914079 s: ************************************ [HOST] [IPU2 ] 215.914170 s: Driver Queued = 5492 frames [HOST] [IPU2 ] 215.914231 s: Driver De-Queued = 5490 frames [HOST] [IPU2 ] 215.914292 s: Driver Displayed = 10983 frames [HOST] [IPU2 ] 215.914384 s: Driver Repeated = 5493 frames [HOST] [IPU2 ] 215.914445 s: [HOST] [IPU2 ] 215.914506 s: ##### DSS DISPC Underflow Count = 0 ##### [HOST] [IPU2 ] 215.914567 s: [HOST] [IPU2 ] 215.929451 s: [HOST] [IPU2 ] 215.929512 s: [ DISPLAY ] Link Statistics, [HOST] [IPU2 ] 215.929573 s: ****************************** [HOST] [IPU2 ] 215.929634 s: [HOST] [IPU2 ] 215.929695 s: Elapsed time = 173214 msec [HOST] [IPU2 ] 215.929756 s: [HOST] [IPU2 ] 215.929817 s: Driver/Notify Cb = 59.96 fps [HOST] [IPU2 ] 215.929878 s: [HOST] [IPU2 ] 215.929970 s: Input Statistics, [HOST] [IPU2 ] 215.930031 s: [HOST] [IPU2 ] 215.930061 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.930153 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.930244 s: -------------------------------------------------- [HOST] [IPU2 ] 215.930336 s: [HOST] [IPU2 ] 215.930397 s: [ DISPLAY ] LATENCY, [HOST] [IPU2 ] 215.930427 s: ******************** [HOST] [IPU2 ] 215.930519 s: [HOST] [IPU2 ] 215.930580 s: [HOST] [IPU2 ] 215.930641 s: [ DISPLAY GRPX1 ] Additional Statistics, [HOST] [IPU2 ] 215.930702 s: ************************************ [HOST] [IPU2 ] 215.930763 s: Driver Queued = 1 frames [HOST] [IPU2 ] 215.930854 s: Driver De-Queued = 0 frames [HOST] [IPU2 ] 215.930946 s: Driver Displayed = 10988 frames [HOST] [IPU2 ] 215.931037 s: Driver Repeated = 10988 frames [HOST] [IPU2 ] 215.931098 s: [HOST] [IPU2 ] 215.931159 s: ##### DSS DISPC Underflow Count = 0 ##### [HOST] [IPU2 ] 215.931220 s: [HOST] [IPU2 ] 215.936710 s: [HOST] [IPU2 ] 215.936741 s: [ IPC_IN_0 ] Link Statistics, [HOST] [IPU2 ] 215.936832 s: ****************************** [HOST] [IPU2 ] 215.936893 s: [HOST] [IPU2 ] 215.936985 s: Elapsed time = 173212 msec [HOST] [IPU2 ] 215.937046 s: [HOST] [IPU2 ] 215.937107 s: [HOST] [IPU2 ] 215.937137 s: Input Statistics, [HOST] [IPU2 ] 215.937198 s: [HOST] [IPU2 ] 215.937229 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.937320 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.937412 s: -------------------------------------------------- [HOST] [IPU2 ] 215.937503 s: [HOST] [IPU2 ] 215.937534 s: Output Statistics, [HOST] [IPU2 ] 215.937595 s: [HOST] [IPU2 ] 215.937656 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.937717 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.937808 s: --------------------------------------------- [HOST] [IPU2 ] 215.938052 s: [HOST] [IPU2 ] 215.938083 s: [ IPC_IN_0 ] LATENCY, [HOST] [IPU2 ] 215.938144 s: ******************** [HOST] [IPU2 ] 215.938205 s: [HOST] [IPU2 ] 215.938266 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ HOST -> IPU2 ] , [HOST] [IPU2 ] 215.938357 s: *************************************************************** [HOST] [IPU2 ] 215.942536 s: [HOST] [IPU2 ] 215.942597 s: [ DECODE ] Link Statistics, [HOST] [IPU2 ] 215.942658 s: ****************************** [HOST] [IPU2 ] 215.942719 s: [HOST] [IPU2 ] 215.942780 s: Elapsed time = 173213 msec [HOST] [IPU2 ] 215.942841 s: [HOST] [IPU2 ] 215.942902 s: [HOST] [IPU2 ] 215.943207 s: Input Statistics, [HOST] [IPU2 ] 215.943268 s: [HOST] [IPU2 ] 215.943298 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.943390 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.943481 s: -------------------------------------------------- [HOST] [IPU2 ] 215.943603 s: Num frames inside the codec for chId: 0 = 0 [HOST] [IPU2 ] 215.943695 s: Num process reqest count for chId: 0 = 0 [HOST] [IPU2 ] 215.943786 s: Num process complete count for chId: 0 = 0 [HOST] [IPU2 ] 215.943878 s: [HOST] [IPU2 ] 215.943939 s: [ DECODE ] LATENCY, [HOST] [IPU2 ] 215.944000 s: ******************** [HOST] [IPU2 ] 215.944061 s: [HOST] [IPU2 ] 215.944122 s: HDVICP-ID: 0 [HOST] [IPU2 ] 215.944183 s: All percentage figures are based of totalElapsedTime [HOST] [IPU2 ] 215.944274 s: [HOST] [IPU2 ] totalAcquire2Wait :1 % [HOST] [IPU2 ] totalWait2Isr :18 % [HOST] [IPU2 ] totalIsr2Done :0 % [HOST] [IPU2 ] totalWait2Done :19 % [HOST] [IPU2 ] totalDone2Release :0 % [HOST] [IPU2 ] totalAcquire2Release :22 % [HOST] [IPU2 ] totalRelease2AcquireDelay :77 % [HOST] [IPU2 ] totalElapsedTime in msec : 183119 [HOST] [IPU2 ] numAccessCnt: 5488 [HOST] [IPU2 ] 215.944580 s: IVA-FPS : 29 [HOST] [IPU2 ] 215.944641 s: Average time spent per frame in microsec: 6006 [HOST] [IPU2 ] 215.944732 s: [HOST] [IPU2 ] 215.948331 s: [HOST] [IPU2 ] 215.948392 s: [ DISPLAY ] Link Statistics, [HOST] [IPU2 ] 215.948453 s: ****************************** [HOST] [IPU2 ] 215.948514 s: [HOST] [IPU2 ] 215.948575 s: Elapsed time = 173212 msec [HOST] [IPU2 ] 215.948636 s: [HOST] [IPU2 ] 215.948697 s: [HOST] [IPU2 ] 215.948728 s: Input Statistics, [HOST] [IPU2 ] 215.948789 s: [HOST] [IPU2 ] 215.948819 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 215.948941 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 215.949033 s: -------------------------------------------------- [HOST] [IPU2 ] 215.949124 s: [HOST] [IPU2 ] 215.949185 s: Output Statistics, [HOST] [IPU2 ] 215.949246 s: [HOST] [IPU2 ] 215.949277 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 215.949368 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 215.949429 s: --------------------------------------------- [HOST] [IPU2 ] 215.949643 s: [HOST] [IPU2 ] 215.949704 s: [ DISPLAY ] LATENCY, [HOST] [IPU2 ] 215.949765 s: ******************** [HOST] [IPU2 ] 215.949826 s: [HOST] [IPU2 ] 215.949887 s: [HOST] [IPU2 ] 215.949978 s: [ DISPLAY VID3 ] Additional Statistics, [HOST] [IPU2 ] 215.950039 s: ************************************ [HOST] [IPU2 ] 215.950131 s: Driver Queued = 0 frames [HOST] [IPU2 ] 215.950466 s: Driver De-Queued = 0 frames [HOST] [IPU2 ] 215.950588 s: Driver Displayed = 0 frames [HOST] [IPU2 ] 215.950832 s: Driver Repeated = 0 frames [HOST] [IPU2 ] 215.951168 s: [HOST] [IPU2 ] 215.951229 s: ##### DSS DISPC Underflow Count = 0 ##### [HOST] [IPU2 ] 215.951595 s: [HOST] [IPU2 ] 215.956139 s: [CAPTURE] Buffer Q Status, [HOST] [IPU2 ] 215.956261 s: Empty Q : Elements in Q = 0, Write Idx = 0, Read Idx = 0 [HOST] [IPU2 ] 215.956353 s: Full Q : Elements in Q = 0, Write Idx = 312, Read Idx = 312 [HOST] [IPU2 ] 215.961660 s: [VPE OUT0] Buffer Q Status, [HOST] [IPU2 ] 215.961751 s: Empty Q : Elements in Q = 0, Write Idx = 0, Read Idx = 0 [HOST] [IPU2 ] 215.961843 s: Full Q : Elements in Q = 0, Write Idx = 83, Read Idx = 83 [HOST] [IPU2 ] 215.962026 s: [VPE OUT1] Buffer Q Status, [HOST] [IPU2 ] 215.962087 s: Empty Q : Elements in Q = 0, Write Idx = 0, Read Idx = 0 [HOST] [IPU2 ] 215.962209 s: Full Q : Elements in Q = 0, Write Idx = 0, Read Idx = 0 [HOST] [IPU2 ] 215.997315 s: ENCODE Out BufExt Q Status [HOST] [IPU2 ] 216.009973 s: Empty Q 0 -> count 6, wrPtr 120, rdPtr 114 [HOST] [IPU2 ] 216.010095 s: Full Q -> count 0, wrPtr 112, rdPtr 112 [HOST] [IPU2 ] 216.029372 s: DECODE OUT BufExt Q Status [HOST] [IPU2 ] 216.033001 s: Empty Q 0 -> count 3, wrPtr 3, rdPtr 0 [HOST] [IPU2 ] 216.033123 s: Full Q -> count 0, wrPtr 0, rdPtr 0 [HOST] [HOST ] 215.865338 s: chNum is 0 [HOST] [HOST ] 215.908375 s: [HOST] [HOST ] 215.908375 s: [ IPC_IN_0 ] Link Statistics, [HOST] [HOST ] 215.908375 s: ****************************** [HOST] [HOST ] 215.908406 s: [HOST] [HOST ] 215.908406 s: Elapsed time = 173214 msec [HOST] [HOST ] 215.908406 s: [HOST] [HOST ] 215.908406 s: Get Full Buf Cb = 29.95 fps [HOST] [HOST ] 215.908406 s: Put Empty Buf Cb = 29.96 fps [HOST] [HOST ] 215.908406 s: Driver/Notify Cb = 29.95 fps [HOST] [HOST ] 215.908436 s: [HOST] [HOST ] 215.908436 s: Input Statistics, [HOST] [HOST ] 215.908436 s: [HOST] [HOST ] 215.908436 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.908436 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.908436 s: -------------------------------------------------- [HOST] [HOST ] 215.908467 s: 0 | 14.98 0. 0 0. 0 14.98 [HOST] [HOST ] 215.908467 s: 1 | 14.98 0. 0 0. 0 14.98 [HOST] [HOST ] 215.908467 s: [HOST] [HOST ] 215.908467 s: Output Statistics, [HOST] [HOST ] 215.908467 s: [HOST] [HOST ] 215.908497 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.908497 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.908497 s: --------------------------------------------- [HOST] [HOST ] 215.908497 s: 0 | 0 14.98 0. 0 0. 0 [HOST] [HOST ] 215.908497 s: 1 | 0 14.98 0. 0 0. 0 [HOST] [HOST ] 215.908528 s: [HOST] [HOST ] 215.908528 s: [ IPC_IN_0 ] LATENCY, [HOST] [HOST ] 215.908528 s: ******************** [HOST] [HOST ] 215.908528 s: Local Link Latency : Avg = 6 us, Min = 0 us, Max = 61 us, [HOST] [HOST ] 215.908528 s: Source to Link Latency : Avg = 26065 us, Min = 21084 us, Max = 81818 us, [HOST] [HOST ] 215.908528 s: [HOST] [HOST ] 215.908558 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ IPU2 -> HOST ] , [HOST] [HOST ] 215.908558 s: *************************************************************** [HOST] [HOST ] 215.908558 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 1208, Min = 915, Max = 13145 [HOST] [HOST ] 215.908558 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 1126, Min = 824, Max = 13115 [HOST] [HOST ] 215.932867 s: [HOST] [HOST ] 215.932867 s: [ NULL_SRC ] Link Statistics, [HOST] [HOST ] 215.932898 s: ****************************** [HOST] [HOST ] 215.932898 s: [HOST] [HOST ] 215.932898 s: Elapsed time = 173213 msec [HOST] [HOST ] 215.932898 s: [HOST] [HOST ] 215.932959 s: [HOST] [HOST ] 215.932959 s: [ IPC_OUT_0 ] Link Statistics, [HOST] [HOST ] 215.932959 s: ****************************** [HOST] [HOST ] 215.932959 s: [HOST] [HOST ] 215.932959 s: Elapsed time = 173213 msec [HOST] [HOST ] 215.932959 s: [HOST] [HOST ] 215.932989 s: [HOST] [HOST ] 215.932989 s: Input Statistics, [HOST] [HOST ] 215.932989 s: [HOST] [HOST ] 215.932989 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [HOST ] 215.932989 s: | FPS | FPS | FPS | FPS [HOST] [HOST ] 215.932989 s: -------------------------------------------------- [HOST] [HOST ] 215.932989 s: [HOST] [HOST ] 215.932989 s: Output Statistics, [HOST] [HOST ] 215.933020 s: [HOST] [HOST ] 215.933020 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [HOST ] 215.933020 s: | ID | FPS | FPS | FPS [HOST] [HOST ] 215.933020 s: --------------------------------------------- [HOST] [HOST ] 216.011620 s: chNum is 0 [HOST] [HOST ] 216.033611 s: + +Hi, Can you simplify your usecase like below and try. Capture -> Dup -> Merge Dup -> Merge -> Enc -> Null. Regards, Anuj + +Dup->Merge Dup->Merge I test about this, this only has a Dup->merge ? + +Hi, Basically from dup will be having 2 out queue and merge having 2 input queue. Regards, Anuj + +I checked about this, It has only a output. thanks + +I have solved about this. thanks. + +I have solved about this, thanks + +Can you give others an idea what you have done, please? + +Hi, Can you tell me your exact query. Regards, Anuj + +Well, in my case it appeared to be pure coincidence. When I added DUP and MERGE links to my system, output frame rate for each channel became about twice lower then initial frame rate. But the key was in "about twice", cause in reality it was not exactly every second frame. The system just reached maximum of its throughput (for the settings used) and kept its maximum at about half frame rate for two channels. Sorry for distracting question GB + +Hi, What is FPS and resolution are you trying to encode. Are you trying to encode both stream as H264 Please done use merge with dup, use it like below dup - > merge dup -> vpe -> merge. Regards, Anuj + +Hi! If you don't mind conversation then: I'm trying to obtain next configuration (at DM385 machine) Camera provides FHD video (1920x1080) at 25fps and at the output I need two H.264 encoded channels from this video first - at 25 fps, second - at lower fps (lets say 5fps) and correspondingly lower bitrate. so far I'm doing that with cam->swosd->dup->merge->encoder, and decimating one channel at encoder. Processor, DDR clocks are not at maximum to reduce consumption, that's why system throughput is lower then FHD at 60 fps + +Hi, Please post a query on DM385 platform. Regards, Anuj + diff --git a/data2/text/range/30001+/743180.txt b/data2/text/range/30001+/743180.txt new file mode 100644 index 0000000000000000000000000000000000000000..313278c91af04893193133fb1869d80dc0e669c8 --- /dev/null +++ b/data2/text/range/30001+/743180.txt @@ -0,0 +1,1458 @@ +Ticket Name: Linux/TDA2E: Error while MLO Booting: + +Query Text: +Part Number: TDA2E Tool/software: Linux Hi, I am using Vision SDK 03.04 and build images for Custom board based on TDA2Ex I have config file based on Hardware design and make changes also related config /include files. But getting Error while Booting Board: Error: U-Boot SPL 2016.05-00010-g9551b3d-dirty (Nov 02 2018 - 18:24:17) DRA722-GP ES2.0 Trying to boot from MMC1 MMC Device 0 not found spl: could not find mmc device. error: -19 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Could you help to debug this issues? Please provide any pointer to solve this problem. Thanks, Anand Kumar + +Responses: +Hi, Can you share more information on what changes you made to U-boot? Are there any changes related to PINMUX, connection to SD/MMC etc.? Regards, Somnath + +5756.changes_config_dts_file_u_boot.txt diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts +index ceee1a7..ecfaf60 100644 +--- a/arch/arm/dts/dra7-evm.dts ++++ b/arch/arm/dts/dra7-evm.dts +@@ -8,14 +8,17 @@ + /dts-v1/; + + #include "dra74x.dtsi" +-#include "dra7-evm-common.dtsi" + #include +-#include + + / { + model = "TI DRA742"; + compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; + ++ chosen { ++ stdout-path = &uart1; ++ tick-timer = &timer2; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x80000000 0x60000000>; /* 1536 MB */ +@@ -30,34 +33,23 @@ + gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; + }; + +- evm_3v3_sw: fixedregulator-evm_3v3_sw { ++ mmc2_3v3: fixedregulator-mmc2 { + compatible = "regulator-fixed"; +- regulator-name = "evm_3v3_sw"; +- vin-supply = <&sysen1>; ++ regulator-name = "mmc2_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + +- aic_dvdd: fixedregulator-aic_dvdd { +- /* TPS77018DBVT */ +- compatible = "regulator-fixed"; +- regulator-name = "aic_dvdd"; +- vin-supply = <&evm_3v3_sw>; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; ++ extcon_usb1: extcon_usb1 { ++ compatible = "linux,extcon-usb-gpio"; ++ id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; + }; + +- vmmcwl_fixed: fixedregulator-mmcwl { +- compatible = "regulator-fixed"; +- regulator-name = "vmmcwl_fixed"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- gpio = <&gpio5 8 0>; /* gpio5_8 */ +- startup-delay-us = <70000>; +- enable-active-high; ++ extcon_usb2: extcon_usb2 { ++ compatible = "linux,extcon-usb-gpio"; ++ id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; + }; + +- + vtt_fixed: fixedregulator-vtt { + compatible = "regulator-fixed"; + regulator-name = "vtt_fixed"; +@@ -66,30 +58,234 @@ + regulator-always-on; + regulator-boot-on; + enable-active-high; +- vin-supply = <&sysen2>; + gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; + }; + }; + + &dra7_pmx_core { +- hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vtt_pin>; ++ ++ vtt_pin: pinmux_vtt_pin { ++ pinctrl-single,pins = < ++ 0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */ ++ >; ++ }; ++ ++ i2c1_pins: pinmux_i2c1_pins { ++ pinctrl-single,pins = < ++ 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ ++ 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ ++ >; ++ }; ++ ++ i2c2_pins: pinmux_i2c2_pins { ++ pinctrl-single,pins = < ++ 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */ ++ 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */ ++ >; ++ }; ++ ++ i2c3_pins: pinmux_i2c3_pins { ++ pinctrl-single,pins = < ++ 0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */ ++ 0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */ ++ >; ++ }; ++ ++ mcspi1_pins: pinmux_mcspi1_pins { ++ pinctrl-single,pins = < ++ 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */ ++ 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */ ++ 0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */ ++ 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */ ++ 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */ ++ 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */ ++ >; ++ }; ++ ++ mcspi2_pins: pinmux_mcspi2_pins { ++ pinctrl-single,pins = < ++ 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */ ++ 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ ++ 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */ ++ 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */ ++ >; ++ }; ++ ++ uart1_pins: pinmux_uart1_pins { ++ pinctrl-single,pins = < ++ 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */ ++ 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */ ++ 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */ ++ 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */ ++ >; ++ }; ++ ++ uart2_pins: pinmux_uart2_pins { ++ pinctrl-single,pins = < ++ 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ ++ 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ ++ 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ ++ 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */ ++ >; ++ }; ++ ++ uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < +- /* this pin is used as a GPIO via mcasp */ +- 0x2fc (PIN_OUTPUT | MUX_MODE1) /* mcasp8_axr2 */ ++ 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ ++ 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ + >; + }; + +- hdmi_i2c_pins_i2c: pinmux_hdmi_i2c_pins_default { ++ qspi1_pins: pinmux_qspi1_pins { + pinctrl-single,pins = < +- 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */ +- 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */ ++ 0x4c (PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ ++ 0x50 (PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ ++ 0x74 (PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ ++ 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ ++ 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ ++ 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ ++ 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ ++ 0x88 (PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ ++ 0xb8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ ++ 0xbc (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ + >; + }; + +- hdmi_i2c_pins_ddc: pinmux_hdmi_i2c_pins_ddc { ++ usb1_pins: pinmux_usb1_pins { ++ pinctrl-single,pins = < ++ 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ ++ >; ++ }; ++ ++ usb2_pins: pinmux_usb2_pins { ++ pinctrl-single,pins = < ++ 0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */ ++ >; ++ }; ++ ++ nand_flash_x16: nand_flash_x16 { ++ /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch ++ * So NAND flash requires following switch settings: ++ * SW5.9 (GPMC_WPN) = LOW ++ * SW5.1 (NAND_BOOTn) = HIGH */ + pinctrl-single,pins = < +- 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ +- 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ ++ 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ ++ 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */ ++ 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */ ++ 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */ ++ 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */ ++ 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */ ++ 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */ ++ 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */ ++ 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */ ++ 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */ ++ 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */ ++ 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */ ++ 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */ ++ 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */ ++ 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */ ++ 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */ ++ 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */ ++ 0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */ ++ 0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */ ++ 0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */ ++ 0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */ ++ 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */ ++ >; ++ }; ++ ++ cpsw_default: cpsw_default { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */ ++ 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */ ++ 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */ ++ 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */ ++ 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */ ++ 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */ ++ 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */ ++ 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */ ++ 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */ ++ 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */ ++ 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */ ++ 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */ ++ ++ /* Slave 2 */ ++ 0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */ ++ 0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ ++ 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ ++ 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ ++ 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ ++ 0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ ++ 0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ ++ 0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ ++ 0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ ++ 0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ ++ 0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ ++ 0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ ++ >; ++ ++ }; ++ ++ cpsw_sleep: cpsw_sleep { ++ pinctrl-single,pins = < ++ /* Slave 1 */ ++ 0x250 (MUX_MODE15) ++ 0x254 (MUX_MODE15) ++ 0x258 (MUX_MODE15) ++ 0x25c (MUX_MODE15) ++ 0x260 (MUX_MODE15) ++ 0x264 (MUX_MODE15) ++ 0x268 (MUX_MODE15) ++ 0x26c (MUX_MODE15) ++ 0x270 (MUX_MODE15) ++ 0x274 (MUX_MODE15) ++ 0x278 (MUX_MODE15) ++ 0x27c (MUX_MODE15) ++ ++ /* Slave 2 */ ++ 0x198 (MUX_MODE15) ++ 0x19c (MUX_MODE15) ++ 0x1a0 (MUX_MODE15) ++ 0x1a4 (MUX_MODE15) ++ 0x1a8 (MUX_MODE15) ++ 0x1ac (MUX_MODE15) ++ 0x1b0 (MUX_MODE15) ++ 0x1b4 (MUX_MODE15) ++ 0x1b8 (MUX_MODE15) ++ 0x1bc (MUX_MODE15) ++ 0x1c0 (MUX_MODE15) ++ 0x1c4 (MUX_MODE15) ++ >; ++ }; ++ ++ davinci_mdio_default: davinci_mdio_default { ++ pinctrl-single,pins = < ++ 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */ ++ 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ ++ >; ++ }; ++ ++ davinci_mdio_sleep: davinci_mdio_sleep { ++ pinctrl-single,pins = < ++ 0x23c (MUX_MODE15) ++ 0x240 (MUX_MODE15) ++ >; ++ }; ++ ++ dcan1_pins_default: dcan1_pins_default { ++ pinctrl-single,pins = < ++ 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ ++ 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ ++ >; ++ }; ++ ++ dcan1_pins_sleep: dcan1_pins_sleep { ++ pinctrl-single,pins = < ++ 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ ++ 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ + >; + }; + +@@ -427,6 +623,8 @@ + + &i2c1 { + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; + + tps659038: tps659038@58 { +@@ -450,7 +648,7 @@ + /* VDD_DSPEVE */ + regulator-name = "smps45"; + regulator-min-microvolt = < 850000>; +- regulator-max-microvolt = <1250000>; ++ regulator-max-microvolt = <1150000>; + regulator-always-on; + regulator-boot-on; + }; +@@ -468,7 +666,7 @@ + /* CORE_VDD */ + regulator-name = "smps7"; + regulator-min-microvolt = <850000>; +- regulator-max-microvolt = <1150000>; ++ regulator-max-microvolt = <1060000>; + regulator-always-on; + regulator-boot-on; + }; +@@ -496,7 +694,6 @@ + regulator-name = "ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; +- regulator-always-on; + regulator-boot-on; + }; + +@@ -526,7 +723,6 @@ + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; +- regulator-allow-bypass; + }; + + ldoln_reg: ldoln { +@@ -545,46 +741,10 @@ + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; +- +- /* REGEN1 is unused */ +- +- regen2: regen2 { +- /* Needed for PMIC internal resources */ +- regulator-name = "regen2"; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- /* REGEN3 is unused */ +- +- sysen1: sysen1 { +- /* PMIC_REGEN_3V3 */ +- regulator-name = "sysen1"; +- regulator-boot-on; +- regulator-always-on; +- }; +- +- sysen2: sysen2 { +- /* PMIC_REGEN_DDR */ +- regulator-name = "sysen2"; +- regulator-boot-on; +- regulator-always-on; +- }; + }; + }; + }; + +- pcf_lcd: gpio@20 { +- compatible = "nxp,pcf8575"; +- reg = <0x20>; +- gpio-controller; +- #gpio-cells = <2>; +- interrupt-parent = <&gpio6>; +- interrupts = <11 IRQ_TYPE_EDGE_FALLING>; +- interrupt-controller; +- #interrupt-cells = <2>; +- }; +- + pcf_gpio_21: gpio@21 { + compatible = "ti,pcf8575"; + reg = <0x21>; +@@ -597,39 +757,52 @@ + #interrupt-cells = <2>; + }; + +- tlv320aic3106: tlv320aic3106@19 { +- #sound-dai-cells = <0>; +- compatible = "ti,tlv320aic3106"; +- reg = <0x19>; +- adc-settle-ms = <40>; +- ai3x-micbias-vg = <1>; /* 2.0V */ +- status = "okay"; +- +- /* Regulators */ +- AVDD-supply = <&evm_3v3_sw>; +- IOVDD-supply = <&evm_3v3_sw>; +- DRVDD-supply = <&evm_3v3_sw>; +- DVDD-supply = <&aic_dvdd>; +- }; + }; + + &i2c2 { + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; ++}; + +- pcf_hdmi: gpio@26 { +- compatible = "nxp,pcf8575"; +- reg = <0x26>; +- gpio-controller; +- #gpio-cells = <2>; +- p1 { +- /* vin6_sel_s0: high: VIN6, low: audio */ +- gpio-hog; +- gpios = <1 GPIO_ACTIVE_HIGH>; +- output-low; +- line-name = "vin6_sel_s0"; +- }; +- }; ++&i2c3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; ++ clock-frequency = <400000>; ++}; ++ ++&mcspi1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcspi1_pins>; ++}; ++ ++&mcspi2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcspi2_pins>; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, ++ <&dra7_pmx_core 0x3e0>; ++}; ++ ++&uart2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++}; ++ ++&uart3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; + }; + + &mmc1 { +@@ -657,7 +830,7 @@ + + &mmc2 { + status = "okay"; +- vmmc-supply = <&evm_3v3_sw>; ++ vmmc-supply = <&mmc2_3v3>; + bus-width = <8>; + max-frequency = <192000000>; + pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; +@@ -673,12 +846,97 @@ + cpu0-supply = <&smps123_reg>; + }; + ++&qspi { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&qspi1_pins>; ++ ++ spi-max-frequency = <64000000>; ++ m25p80@0 { ++ compatible = "s25fl256s1","spi-flash"; ++ spi-max-frequency = <76800000>; ++ reg = <0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <4>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* MTD partition table. ++ * The ROM checks the first four physical blocks ++ * for a valid file to boot and the flash here is ++ * 64KiB block size. ++ */ ++ partition@0 { ++ label = "QSPI.SPL"; ++ reg = <0x00000000 0x000010000>; ++ }; ++ partition@1 { ++ label = "QSPI.SPL.backup1"; ++ reg = <0x00010000 0x00010000>; ++ }; ++ partition@2 { ++ label = "QSPI.SPL.backup2"; ++ reg = <0x00020000 0x00010000>; ++ }; ++ partition@3 { ++ label = "QSPI.SPL.backup3"; ++ reg = <0x00030000 0x00010000>; ++ }; ++ partition@4 { ++ label = "QSPI.u-boot"; ++ reg = <0x00040000 0x00100000>; ++ }; ++ partition@5 { ++ label = "QSPI.u-boot-spl-os"; ++ reg = <0x00140000 0x00080000>; ++ }; ++ partition@6 { ++ label = "QSPI.u-boot-env"; ++ reg = <0x001c0000 0x00010000>; ++ }; ++ partition@7 { ++ label = "QSPI.u-boot-env.backup1"; ++ reg = <0x001d0000 0x0010000>; ++ }; ++ partition@8 { ++ label = "QSPI.kernel"; ++ reg = <0x001e0000 0x0800000>; ++ }; ++ partition@9 { ++ label = "QSPI.file-system"; ++ reg = <0x009e0000 0x01620000>; ++ }; ++ }; ++}; ++ ++&omap_dwc3_1 { ++ extcon = <&extcon_usb1>; ++}; ++ ++&omap_dwc3_2 { ++ extcon = <&extcon_usb2>; ++}; ++ ++&usb1 { ++ dr_mode = "peripheral"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb1_pins>; ++}; ++ ++&usb2 { ++ dr_mode = "host"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb2_pins>; ++}; ++ + &elm { + status = "okay"; + }; + + &gpmc { + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&nand_flash_x16>; + ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ + nand@0,0 { + reg = <0 0 4>; /* device IO registers */ +@@ -770,6 +1028,9 @@ + + &mac { + status = "okay"; ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&cpsw_default>; ++ pinctrl-1 = <&cpsw_sleep>; + dual_emac; + }; + +@@ -784,3 +1045,17 @@ + phy-mode = "rgmii"; + dual_emac_res_vlan = <2>; + }; ++ ++&davinci_mdio { ++ pinctrl-names = "default", "sleep"; ++ pinctrl-0 = <&davinci_mdio_default>; ++ pinctrl-1 = <&davinci_mdio_sleep>; ++}; ++ ++&dcan1 { ++ status = "ok"; ++ pinctrl-names = "default", "sleep", "active"; ++ pinctrl-0 = <&dcan1_pins_sleep>; ++ pinctrl-1 = <&dcan1_pins_sleep>; ++ pinctrl-2 = <&dcan1_pins_default>; ++}; +diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi +index e9eb8f0..4fc3985 100644 +--- a/arch/arm/dts/dra7.dtsi ++++ b/arch/arm/dts/dra7.dtsi +@@ -906,7 +906,7 @@ + ti,needs-special-reset; + dmas = <&sdma 47>, <&sdma 48>; + dma-names = "tx", "rx"; +- mmc-hs200-1_8v; ++ /*mmc-hs200-1_8v; BOOT_OPT */ + mmc-ddr-1_8v; + status = "disabled"; + }; +diff --git a/arch/arm/dts/dra71-evm.dts b/arch/arm/dts/dra71-evm.dts +index 9ca33a8..c201fef 100644 +--- a/arch/arm/dts/dra71-evm.dts ++++ b/arch/arm/dts/dra71-evm.dts +@@ -365,6 +365,7 @@ + lp8733_regulators: regulators { + lp8733_buck0_reg: buck0 { + /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */ ++ compatible = "ti,lp873x-buck0"; + regulator-name = "lp8733-buck0"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; +@@ -375,6 +376,7 @@ + + lp8733_buck1_reg: buck1 { + /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */ ++ compatible = "ti,lp873x-buck1"; + regulator-name = "lp8733-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; +@@ -385,6 +387,7 @@ + + lp8733_ldo0_reg: ldo0 { + /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */ ++ compatible = "ti,lp873x-ldo0"; + regulator-name = "lp8733-ldo0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +@@ -393,6 +396,7 @@ + + lp8733_ldo1_reg: ldo1 { + /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */ ++ compatible = "ti,lp873x-ldo1"; + regulator-name = "lp8733-ldo1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +@@ -410,6 +414,7 @@ + lp8732_regulators: regulators { + lp8732_buck0_reg: buck0 { + /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */ ++ compatible = "ti,lp873x-buck0"; + regulator-name = "lp8732-buck0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +@@ -420,6 +425,7 @@ + + LP8732_buck1_reg: buck1 { + /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */ ++ compatible = "ti,lp873x-buck1"; + regulator-name = "lp8732-buck1"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; +@@ -430,6 +436,7 @@ + + lp8732_ldo0_reg: ldo0 { + /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */ ++ compatible = "ti,lp873x-ldo0"; + regulator-name = "lp8732-ldo0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +@@ -440,6 +447,7 @@ + + lp8732_ldo1_reg: ldo1 { + /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */ ++ compatible = "ti,lp873x-ldo1"; + regulator-name = "lp8732-ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +diff --git a/arch/arm/dts/dra72-evm-common.dtsi b/arch/arm/dts/dra72-evm-common.dtsi +index c59edf9..6853d4d 100644 +--- a/arch/arm/dts/dra72-evm-common.dtsi ++++ b/arch/arm/dts/dra72-evm-common.dtsi +@@ -242,6 +242,38 @@ + 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ + >; + }; ++ ++ nand_flash_x16: nand_flash_x16 { ++ /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch ++ * So NAND flash requires following switch settings: ++ * SW5.9 (GPMC_WPN) = LOW ++ * SW5.1 (NAND_BOOTn) = HIGH */ ++ pinctrl-single,pins = < ++ 0x00 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ ++ 0x04 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ ++ 0x08 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ ++ 0x0c (PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ ++ 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ ++ 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ ++ 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ ++ 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad7 */ ++ 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */ ++ 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */ ++ 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */ ++ 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */ ++ 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */ ++ 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */ ++ 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */ ++ 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */ ++ 0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* T1 : gpmc_cs0 */ ++ 0xb8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* P2 : gpmc_cs1.gpmc_wp */ ++ 0xc4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* N1 : gpmc_advn_ale */ ++ 0xc8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* M5 : gpmc_oen_ren */ ++ 0xcc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* M3 : gpmc_wen */ ++ 0xd0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* N6 : gpmc_ben0 */ ++ 0xd8 (PIN_INPUT | MUX_MODE0) /* N2 : gpmc_wait0 */ ++ >; ++ }; + }; + + &dra7_iodelay_core { +@@ -408,6 +440,11 @@ + }; + }; + ++&i2c4 { ++ status = "okay"; ++ clock-frequency = <400000>; ++}; ++ + &i2c5 { + status = "okay"; + clock-frequency = <400000>; +@@ -451,7 +488,9 @@ + * support NAND on dra72-evm. Keep it disabled. Enabling it + * requires a different configuration by U-Boot. + */ +- status = "disabled"; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&nand_flash_x16>; + ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */ + nand@0,0 { + /* To use NAND, DIP switch SW5 must be set like so: +@@ -587,11 +626,12 @@ + &mmc2 { + /* SW5-3 in ON position */ + status = "okay"; +- pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; ++ /*pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; FS:RAJ*/ ++ pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_1_8v>; +- pinctrl-3 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_conf>; ++ /*pinctrl-3 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_conf>; FS:RAJ*/ + + vmmc-supply = <&evm_3v3>; + bus-width = <8>; +@@ -608,7 +648,7 @@ + }; + + &qspi { +- status = "okay"; ++ status = "disabled"; + + spi-max-frequency = <64000000>; + m25p80@0 { +diff --git a/include/config_defaults.h b/include/config_defaults.h +index ad08c1d..8411bed 100644 +--- a/include/config_defaults.h ++++ b/include/config_defaults.h +@@ -9,8 +9,11 @@ + #ifndef _CONFIG_DEFAULTS_H_ + #define _CONFIG_DEFAULTS_H_ + ++/* FS:RAJ */ ++#define BOOT_OPT + /* Support bootm-ing different OSes */ + #define CONFIG_BOOTM_LINUX 1 ++#ifndef BOOT_OPT + #define CONFIG_BOOTM_NETBSD 1 + #define CONFIG_BOOTM_PLAN9 1 + #define CONFIG_BOOTM_RTEMS 1 +@@ -18,6 +21,7 @@ + + #define CONFIG_GZIP 1 + #define CONFIG_ZLIB 1 ++#endif + #define CONFIG_PARTITIONS 1 + + #endif +diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h +index 766a212..2c87310 100644 +--- a/include/config_distro_defaults.h ++++ b/include/config_distro_defaults.h +@@ -12,13 +12,14 @@ + * features required by distros to support boards in a standardised and + * consistent manner. + */ +- ++#ifndef BOOT_OPT + #define CONFIG_BOOTP_BOOTPATH + #define CONFIG_BOOTP_DNS + #define CONFIG_BOOTP_GATEWAY + #define CONFIG_BOOTP_HOSTNAME + #define CONFIG_BOOTP_PXE + #define CONFIG_BOOTP_SUBNETMASK ++#endif + + #if defined(__arm__) || defined(__aarch64__) + #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 +@@ -44,17 +45,18 @@ + #ifdef CONFIG_ARM64 + #define CONFIG_CMD_BOOTI + #endif ++#define CONFIG_BOOTDELAY 0 ++#define CONFIG_MENU ++#define CONFIG_DOS_PARTITION ++#define CONFIG_EFI_PARTITION ++#ifndef BOOT_OPT + #define CONFIG_CMD_PXE +- + #define CONFIG_CMDLINE_EDITING + #define CONFIG_AUTO_COMPLETE +-#define CONFIG_BOOTDELAY 2 + #define CONFIG_SYS_LONGHELP +-#define CONFIG_MENU +-#define CONFIG_DOS_PARTITION +-#define CONFIG_EFI_PARTITION + #define CONFIG_ISO_PARTITION + #define CONFIG_SUPPORT_RAW_INITRD ++#endif + #define CONFIG_ENV_VARS_UBOOT_CONFIG + + #endif /* _CONFIG_CMD_DISTRO_DEFAULTS_H */ +diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h +index 35d373e..db0c9d8 100644 +--- a/include/configs/dra7xx_evm.h ++++ b/include/configs/dra7xx_evm.h +@@ -12,8 +12,6 @@ + #ifndef __CONFIG_DRA7XX_EVM_H + #define __CONFIG_DRA7XX_EVM_H + +-#include +- + #define CONFIG_DRA7XX + #define CONFIG_BOARD_EARLY_INIT_F + +@@ -30,7 +28,7 @@ + #define CONFIG_ENV_IS_IN_MMC + #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ + #define CONFIG_ENV_SIZE (128 << 10) +-#define CONFIG_ENV_OFFSET 0x260000 ++#define CONFIG_ENV_OFFSET 0x140000 + #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) + #define CONFIG_SYS_REDUNDAND_ENVIRONMENT + #endif +@@ -47,6 +45,7 @@ + + #define CONFIG_SYS_OMAP_ABE_SYSCK + ++ + #ifndef CONFIG_SPL_BUILD + /* Define the default GPT table for eMMC */ + #define PARTS_DEFAULT \ +@@ -56,17 +55,16 @@ + /* Android partitions */ \ + "partitions_android=" \ + "uuid_disk=${uuid_gpt_disk};" \ +- "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ +- "name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};" \ +- "name=environment,size=256K,uuid=${uuid_gpt_environment};" \ ++ "name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \ ++ "name=bootloader,size=768K,uuid=${uuid_gpt_bootloader};" \ ++ "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ + "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ + "name=reserved,size=384K,uuid=${uuid_gpt_reserved};" \ + "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ + "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ +- "name=recovery,size=30M,uuid=${uuid_gpt_recovery};" \ ++ "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ + "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ + "name=system,size=768M,uuid=${uuid_gpt_system};" \ +- "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \ + "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ + "name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};" \ + "name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};" \ +@@ -74,6 +72,50 @@ + "name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};" \ + "name=userdata,size=-,uuid=${uuid_gpt_userdata}" + ++#define DFU_ALT_INFO_MMC \ ++ "dfu_alt_info_mmc=" \ ++ "boot part 0 1;" \ ++ "rootfs part 0 2;" \ ++ "MLO fat 0 1;" \ ++ "MLO.raw raw 0x100 0x100;" \ ++ "u-boot.img.raw raw 0x300 0x400;" \ ++ "spl-os-args.raw raw 0x80 0x80;" \ ++ "spl-os-image.raw raw 0x900 0x2000;" \ ++ "spl-os-args fat 0 1;" \ ++ "spl-os-image fat 0 1;" \ ++ "u-boot.img fat 0 1;" \ ++ "uEnv.txt fat 0 1\0" ++ ++#define DFU_ALT_INFO_EMMC \ ++ "dfu_alt_info_emmc=" \ ++ "rawemmc raw 0 3751936;" \ ++ "boot part 1 1;" \ ++ "rootfs part 1 2;" \ ++ "MLO fat 1 1;" \ ++ "MLO.raw raw 0x100 0x100;" \ ++ "u-boot.img.raw raw 0x300 0x400;" \ ++ "spl-os-args.raw raw 0x80 0x80;" \ ++ "spl-os-image.raw raw 0x900 0x2000;" \ ++ "spl-os-args fat 1 1;" \ ++ "spl-os-image fat 1 1;" \ ++ "u-boot.img fat 1 1;" \ ++ "uEnv.txt fat 1 1\0" ++ ++#define DFU_ALT_INFO_RAM \ ++ "dfu_alt_info_ram=" \ ++ "kernel ram 0x80200000 0x4000000;" \ ++ "fdt ram 0x80f80000 0x80000;" \ ++ "ramdisk ram 0x81000000 0x4000000\0" ++ ++#define DFU_ALT_INFO_QSPI \ ++ "dfu_alt_info_qspi=" \ ++ "MLO raw 0x0 0x040000;" \ ++ "u-boot.img raw 0x040000 0x0100000;" \ ++ "u-boot-spl-os raw 0x140000 0x080000;" \ ++ "u-boot-env raw 0x1C0000 0x010000;" \ ++ "u-boot-env.backup raw 0x1D0000 0x010000;" \ ++ "kernel raw 0x1E0000 0x800000\0" ++ + #define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_MMC \ +@@ -92,21 +134,19 @@ + + #define CONFIG_ANDROID_BOOT_IMAGE + ++#define CONFIG_BOOTARGS_BOARD "console=ttyS0,115200 " \ ++ "androidboot.console=ttyS0 " \ ++ "androidboot.hardware=jacinto6evmboard" ++ + #ifdef CONFIG_SPL_BUILD + #undef CONFIG_CMD_BOOTD + #ifdef CONFIG_SPL_DFU_SUPPORT + #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 + #define CONFIG_SPL_ENV_SUPPORT + #define CONFIG_SPL_HASH_SUPPORT +- +-#ifdef CONFIG_SPL_LOAD_FIT +-#define DFUARGS \ +- "dfu_bufsiz=0x10000\0" \ +- DFU_ALT_INFO_RAM +-#else + #define DFU_ALT_INFO_RAM \ + "dfu_alt_info_ram=" \ +- "kernel ram 0x807fffc0 0x4000000;" \ ++ "kernel ram 0x80200000 0x4000000;" \ + "fdt ram 0x80f80000 0x80000;" \ + "ramdisk ram 0x81000000 0x4000000\0" + #define DFUARGS \ +@@ -114,7 +154,6 @@ + DFU_ALT_INFO_RAM + #endif + #endif +-#endif + + #include + +@@ -166,6 +205,8 @@ + /* In SPL, use the environment and discard MMC support for space. */ + #ifdef CONFIG_SPL_BUILD + #undef CONFIG_SPL_MMC_SUPPORT ++#undef CONFIG_SPL_MAX_SIZE ++#define CONFIG_SPL_MAX_SIZE (256 << 10) /* 256 KiB */ + #endif + #define CONFIG_SPL_ENV_SUPPORT + #define CONFIG_ENV_IS_IN_SPI_FLASH +@@ -198,8 +239,6 @@ + #define CONFIG_OMAP_USB_PHY + #define CONFIG_OMAP_USB2PHY2_HOST + +-#define CONFIG_USB_FUNCTION_MASS_STORAGE +- + /* USB Device Firmware Update support */ + #define CONFIG_USB_FUNCTION_DFU + #define CONFIG_DFU_RAM +@@ -220,6 +259,8 @@ + #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + ++ ++#define CONFIG_NAND 1 + /* NAND support */ + #ifdef CONFIG_NAND + /* NAND: device related configs */ +@@ -232,9 +273,14 @@ + #define CONFIG_SYS_NAND_5_ADDR_CYCLE + /* NAND: driver related configs */ + #define CONFIG_NAND_OMAP_GPMC ++#define CONFIG_SYS_NAND_BASE 0x8000000 ++#define CONFIG_SYS_MAX_NAND_DEVICE 1 + #define CONFIG_NAND_OMAP_ELM + #define CONFIG_SYS_NAND_ONFI_DETECTION + #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW ++#define CONFIG_MTD_DEVICE ++#define CONFIG_MTD ++#define CONFIG_CMD_MTDPARTS + #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS + #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ +@@ -316,8 +362,6 @@ + #define CONFIG_PCF8575_GPIO + #endif + +-#define CONFIG_LZO +- + /* JAMR3 board pin mux */ + #define CONFIG_DRA7XX_JAMR3 + +diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h +index 7d5255c..a748b24 100644 +--- a/include/configs/ti_armv7_common.h ++++ b/include/configs/ti_armv7_common.h +@@ -64,32 +64,11 @@ + "args_mmc=run finduuid;setenv bootargs console=${console} " \ + "${optargs} " \ + "root=PARTUUID=${uuid} rw " \ ++ "lpj=61475 " \ + "rootfstype=${mmcrootfstype}\0" \ +- "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ +- "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ +- "source ${loadaddr}\0" \ +- "bootenvfile=uEnv.txt\0" \ +- "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ +- "env import -t ${loadaddr} ${filesize}\0" \ +- "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}\0" \ + "loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "envboot=mmc dev ${mmcdev}; " \ +- "if mmc rescan; then " \ +- "echo SD/MMC found on device ${mmcdev};" \ +- "if run loadbootscript; then " \ +- "run bootscript;" \ +- "else " \ +- "if run loadbootenv; then " \ +- "echo Loaded env from ${bootenvfile};" \ +- "run importbootenv;" \ +- "fi;" \ +- "if test -n $uenvcmd; then " \ +- "echo Running uenvcmd ...;" \ +- "run uenvcmd;" \ +- "fi;" \ +- "fi;" \ +- "fi;\0" \ + "mmcloados=run args_mmc; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ +@@ -110,6 +89,16 @@ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadimage; then " \ ++ "run mmcloados;" \ ++ "fi;" \ ++ "fi;\0" \ ++/* BOOT_OPT */ ++/* "mmcboot=mmc dev ${mmcdev}; " \ ++ "setenv devnum ${mmcdev}; " \ ++ "setenv devtype mmc; " \ ++ "if mmc rescan; then " \ ++ "echo SD/MMC found on device ${mmcdev};" \ ++ "if run loadimage; then " \ + "if test ${boot_fit} -eq 1; then " \ + "run loadfit; " \ + "else " \ +@@ -117,6 +106,7 @@ + "fi;" \ + "fi;" \ + "fi;\0" \ ++*/ + + #define DEFAULT_FIT_TI_ARGS \ + "boot_fit=0\0" \ +@@ -170,8 +160,10 @@ + #define CONFIG_MMC + #define CONFIG_GENERIC_MMC + ++#ifndef BOOT_OPT + /* McSPI IP block */ + #define CONFIG_SPI ++#endif + + /* GPIO block */ + +@@ -195,9 +187,12 @@ + #define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ + + /* As stated above, the following choices are optional. */ ++/* BOOT_OPT */ ++/* + #define CONFIG_SYS_LONGHELP + #define CONFIG_AUTO_COMPLETE + #define CONFIG_CMDLINE_EDITING ++*/ + #define CONFIG_VERSION_VARIABLE + + /* We set the max number of command args high to avoid HUSH bugs. */ +@@ -252,17 +247,20 @@ + #define CONFIG_SPL_OS_BOOT + #endif + ++/* BOOT_OPT */ ++#undef CONFIG_SPL_OS_BOOT ++ + /* + * Place the image at the start of the ROM defined image space (per + * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined +- * downloaded image area minus 1KiB for scratch space. We initalize DRAM as +- * soon as we can so that we can place stack, malloc and BSS there. We load +- * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict +- * with older SPLs). We have our BSS be placed 2MiB after this, to allow for +- * the default Linux kernel address of 0x80008000 to work with most sized +- * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end +- * of the BSS area. We suggest that the stack be placed at 32MiB after the +- * start of DRAM to allow room for all of the above (handled in Kconfig). ++ * downloaded image area. We initalize DRAM as soon as we can so that ++ * we can place stack, malloc and BSS there. We load U-Boot itself into ++ * memory at 0x80800000 for legacy reasons (to not conflict with older ++ * SPLs). We have our BSS be placed 2MiB after this, to allow for the ++ * default Linux kernel address of 0x80008000 to work with most sized ++ * kernels, in the Falcon Mode case. We have the SPL malloc pool at the ++ * end of the BSS area. We suggest that the stack be placed at 32MiB after ++ * the start of DRAM to allow room for all of the above (handled in Kconfig). + */ + #ifndef CONFIG_SYS_TEXT_BASE + #define CONFIG_SYS_TEXT_BASE 0x80800000 +@@ -276,14 +274,10 @@ + CONFIG_SPL_BSS_MAX_SIZE) + #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN + #endif +-#ifndef CONFIG_SPL_MAX_SIZE +-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ +- CONFIG_SPL_TEXT_BASE) +-#endif + + /* RAW SD card / eMMC locations. */ +-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x1000 /* 2048 KB */ ++#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 /* address 0x40000 */ ++#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 /* 384 KB */ + + /* FAT sd card locations. */ + #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +@@ -292,13 +286,12 @@ + #ifdef CONFIG_SPL_OS_BOOT + /* FAT */ + #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +-#define CONFIG_SPL_FS_LOAD_ARGS_NAME "single-stage-boot.dtb" ++#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" + + /* RAW SD card / eMMC */ +-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1700 /* address 0x2E0000 */ +-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */ +-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */ +- ++#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ ++#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ ++#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ + + /* spl export command */ + #define CONFIG_CMD_SPL +diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h +index 7548170..de91789 100644 +--- a/include/configs/ti_armv7_omap.h ++++ b/include/configs/ti_armv7_omap.h +@@ -24,8 +24,10 @@ + /* MMC/SD IP block */ + #define CONFIG_OMAP_HSMMC + ++#ifndef BOOT_OPT + /* SPI IP Block */ + #define CONFIG_OMAP3_SPI ++#endif + + /* GPIO block */ + #define CONFIG_OMAP_GPIO +diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h +index b68e47a..ee4df51 100644 +--- a/include/configs/ti_omap5_common.h ++++ b/include/configs/ti_omap5_common.h +@@ -63,32 +63,80 @@ + #define DFUARGS + #endif + +-#ifndef CONFIG_EXTRA_BOARD_ENV_SETTINGS +-#define CONFIG_EXTRA_BOARD_ENV_SETTINGS ++#ifndef BOOT_OPT ++#define NANDARGS \ ++ "mtdids=" MTDIDS_DEFAULT "\0" \ ++ "mtdparts=" MTDPARTS_DEFAULT "\0" \ ++ "nandargs=setenv bootargs console=${console}" \ ++ "${optargs}" \ ++ "root=${nandroot}" \ ++ "rootfstype=${nandrootfstype}\0" \ ++ "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ ++ "nandrootfstype=ubifs rootwait=1\0" \ ++ "nandboot=echo Booting from nand ...;" \ ++ "run bootargs;" \ ++ "nand read ${fdtaddr} NAND.u-boot-spl-os;" \ ++ "nand read ${loadaddr} NAND.kernel;" \ ++ "bootz ${loadaddr} - ${fdtaddr}\0" ++#define NANDBOOT "run nandboot;" + #endif + + #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + #define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ +- DEFAULT_FIT_TI_ARGS \ ++ /* DEFAULT_FIT_TI_ARGS \ BOOT_OPT */ \ + "console=" CONSOLEDEV ",115200n8\0" \ +- "fdtfile=undefined\0" \ ++ "fdtfile=dra72-evm-infoadas.dtb\0" \ + "reboot_image=boot\0" \ + "boot_os=0\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ +- "usbtty=cdc_acm\0" \ ++ /* "usbtty=cdc_acm\0" \ BOOT_OPT */ \ + "vram=16M\0" \ + "partitions=" PARTS_DEFAULT "\0" \ + "optargs=\0" \ +- "dofastboot=0\0" \ +- "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ +- "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ +- "source ${loadaddr}\0" \ ++ /* "dofastboot=0\0" \ BOOT_OPT */ \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ ++ "emmcboot_count=0\0" \ ++ "max_emmcboot_count=3\0" \ ++ "emmcboot_os=0\0" \ ++ "emmcloados_0=" \ ++ "setenv bootpart 1:2; " \ ++ "setexpr emmcboot_count ${emmcboot_count} + 1; " \ ++ "saveenv; " \ ++ "run args_mmc; " \ ++ "if mmc rescan; then " \ ++ "if run loadimage; then " \ ++ "if run loadfdt; then " \ ++ "bootz ${loadaddr} - ${fdtaddr}; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT;" \ ++ "fi;" \ ++ "else " \ ++ "echo WARN: Cannot load the zimage;" \ ++ "fi;" \ ++ "fi;\0" \ ++ "emmcloados_1=" \ ++ "setenv bootpart 1:3; " \ ++ "setexpr emmcboot_count ${emmcboot_count} + 1; " \ ++ "saveenv; " \ ++ "run args_mmc; " \ ++ "if mmc rescan; then " \ ++ "if run loadimage; then " \ ++ "if run loadfdt; then " \ ++ "bootz ${loadaddr} - ${fdtaddr}; " \ ++ "else " \ ++ "echo WARN: Cannot load the DT;" \ ++ "fi;" \ ++ "else " \ ++ "echo WARN: Cannot load the zimage;" \ ++ "fi;" \ ++ "fi;\0" \ + "mmcboot=" \ ++ "setenv bootpart 0:2; " \ ++ "saveenv; " \ + "if mmc dev ${mmcdev}; then " \ + "setenv devtype mmc; " \ + "if mmc rescan; then " \ +@@ -101,7 +149,31 @@ + "fi; " \ + "fi; " \ + "fi;\0" \ +- "emmc_android_boot=" \ ++ "emmcboot=" \ ++ "setenv mmcdev 1;" \ ++ "mmc dev ${mmcdev}; " \ ++ "setenv devtype mmc; " \ ++ "setenv devnum ${mmcdev}; " \ ++ "if test ${emmcboot_count} -ge ${max_emmcboot_count}; then " \ ++ "setenv emmcboot_count 0; saveenv; " \ ++ "if test ${emmcboot_os} -eq 0; then " \ ++ "echo Booting from image 1...;" \ ++ "run emmcloados_1;" \ ++ "else " \ ++ "echo Booting from image 0...;" \ ++ "run emmcloados_0;" \ ++ "fi;" \ ++ "elif test ${emmcboot_os} -eq 0; then " \ ++ "echo Booting from image 0...;" \ ++ "run emmcloados_0;" \ ++ "elif test ${emmcboot_os} -eq 1; then " \ ++ "echo Booting from image 1...;" \ ++ "run emmcloados_1;" \ ++ "else " \ ++ "echo ${emmcboot_os} selection wrong; " \ ++ "fi;\0" \ ++/*BOOT_OPT start */ \ ++ /*"emmc_android_boot=" \ + "setenv eval_bootargs setenv bootargs $bootargs; " \ + "run eval_bootargs; " \ + "setenv mmcdev 1; " \ +@@ -132,8 +204,6 @@ + "setenv fdtfile dra72-evm.dtb; fi;" \ + "if test $board_name = dra71x; then " \ + "setenv fdtfile dra71-evm.dtb; fi;" \ +- "if test $board_name = dra76x; then " \ +- "setenv fdtfile dra76-evm.dtb; fi;" \ + "if test $board_name = beagle_x15; then " \ + "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \ + "if test $board_name = beagle_x15_revb1; then " \ +@@ -154,23 +224,29 @@ + "setenv fdtfile am571x-idk-lcd-osd.dtb; fi;" \ + "if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then " \ + "setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;" \ +- "if test $board_findfdt != undefined; then " \ +- "run board_findfdt; fi;" \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine device tree to use; fi; \0" \ ++ NANDARGS \ + DFUARGS \ +- NETARGS \ +- CONFIG_EXTRA_BOARD_ENV_SETTINGS \ ++ NETARGS \*/ ++/* BOOT_OPT end */ + + #ifndef CONFIG_BOOTARGS_BOARD + #define CONFIG_BOOTARGS_BOARD + #endif ++#ifndef BOOT_OPT + #define CONFIG_BOOTARGS "androidboot.serialno=${serial#} " \ + CONFIG_BOOTARGS_BOARD ++#else ++#define CONFIG_BOOTARGS "serialno=${serial#} " \ ++ CONFIG_BOOTARGS_BOARD ++#endif + + #ifndef CONFIG_FASTBOOT_USB_DEV + #define CONFIG_FASTBOOT_USB_DEV 0 + #endif ++ ++#ifndef BOOT_OPT + #define CONFIG_BOOTCOMMAND \ + "if test ${dofastboot} -eq 1; then " \ + "echo Boot fastboot requested, resetting dofastboot ...;" \ +@@ -181,12 +257,17 @@ + "if test ${boot_fit} -eq 1; then " \ + "run update_to_fit;" \ + "fi;" \ +- "run findfdt; " \ +- "run envboot; " \ + "run mmcboot;" \ ++ "run emmcboot;" \ + "run emmc_android_boot; " \ ++ "run nandboot;" \ + "" +- ++#else ++#define CONFIG_BOOTCOMMAND \ ++ "run mmcboot;" \ ++ "run emmcboot;" \ ++ "" ++#endif + /* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5. +@@ -220,6 +301,12 @@ + #endif + + /* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */ ++#if defined(CONFIG_DRA7XX) ++#define CONFIG_SPL_BOOT_END 0x4037E000 ++#else ++#define CONFIG_SPL_BOOT_END 0x4031E000 ++#endif ++#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_BOOT_END - CONFIG_SPL_TEXT_BASE) + #define CONFIG_SPL_DISPLAY_PRINT + #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ +@@ -239,12 +326,12 @@ + #undef CONFIG_DM_ETH + #endif + +-#define MAX_REMOTECORE_BIN_SIZE (12*0x100000) ++#define MAX_REMOTECORE_BIN_SIZE (8*0x100000) + + /* Define the address to which the IPU1 binary is + * loaded from persistent storage + */ +-#define IPU1_LOAD_ADDR (0xb0000000) ++#define IPU1_LOAD_ADDR (0xa0fff000) + + /* + * Set load address for each core 8 MB after load +@@ -254,11 +341,6 @@ + #define DSP1_LOAD_ADDR (IPU2_LOAD_ADDR+MAX_REMOTECORE_BIN_SIZE) + #define DSP2_LOAD_ADDR (DSP1_LOAD_ADDR+MAX_REMOTECORE_BIN_SIZE) + +-#define IPU1_COMP_ADDR (DSP2_LOAD_ADDR+MAX_REMOTECORE_BIN_SIZE) +-#define IPU2_COMP_ADDR (IPU1_COMP_ADDR+MAX_REMOTECORE_BIN_SIZE) +-#define DSP1_COMP_ADDR (IPU2_COMP_ADDR+MAX_REMOTECORE_BIN_SIZE) +-#define DSP2_COMP_ADDR (DSP1_COMP_ADDR+MAX_REMOTECORE_BIN_SIZE) +- + /* Define the GPT partition names only when they are used. + * This prevents warnings of invalid GPT table when loading + * binaries from FAT partition. + Hi Somnath, I changed config file and dts file related to this. Please check diff of configs files and dts files. Thanks, Anand Kumar + +Hi, Seems like both PINMUX and Power-supply have changed that may affect MMC operation. Can you please review them once more? Please look into spl_mmc_find_device() in common/spl/spl_mmc.c The error is generated from there. Regards, Somnath + +Hi, Let us know if you have any follow up question? Regards, Somnath + +Hi Somnath, Thanks for update. I didnot check with your inputs. Now, i will close this issue and later, will update on this. Thanks, Anand Kumar + diff --git a/data2/text/range/30001+/746164.txt b/data2/text/range/30001+/746164.txt new file mode 100644 index 0000000000000000000000000000000000000000..7c67ca5a198057ca006187e538c292c7a1ead0f5 --- /dev/null +++ b/data2/text/range/30001+/746164.txt @@ -0,0 +1,580 @@ +Ticket Name: Linux/TDA2: build the PSDK by yocto, error:unknown type name 'ucs4_t' + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi TI, When I use the yocto to build a recipes, I got some error. Like this: work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ ./build-specific-recipe.sh dra7xx-evm meta-toolchain-qt5 +[PSDKLA]> +[PSDKLA]> Current Directory is /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers +[PSDKLA]> PATH is /home/work/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/oe-core/scripts:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/bitbake/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games +[PSDKLA]> Building on ubuntu running Linux ubuntu 4.4.0-31-generic #50~14.04.1-Ubuntu SMP Wed Jul 13 01:07:32 UTC 2016 x86_64 x86_64 x86_64 GNU/Linux +[PSDKLA]> Starting Yocto build at Tue Nov 13 17:51:43 HKT 2018 +[PSDKLA]> +[PSDKLA]> cd build +[PSDKLA]> cp conf/local.conf conf/local.conf.pristine +[PSDKLA]> . conf/setenv +[PSDKLA]> MACHINE=dra7xx-evm bitbake meta-toolchain-qt5 +NOTE: Started PRServer with DBfile: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 37152, PID: 34203 +Loading cache: 100% |###########################################################################################| ETA: 00:00:00 +Loaded 2849 entries from dependency cache. +NOTE: Resolving any missing task queue dependencies + +Build Configuration: +BB_VERSION = "1.30.0" +BUILD_SYS = "x86_64-linux" +NATIVELSBSTRING = "Ubuntu-14.04" +TARGET_SYS = "arm-linux-gnueabi" +MACHINE = "dra7xx-evm" +DISTRO = "arago" +DISTRO_VERSION = "2016.12" +TUNE_FEATURES = "arm armv7a vfp thumb neon callconvention-hard" +TARGET_FPU = "hard" +meta-glsdk = "HEAD:66cfd8ef55344508d6e7b306259f34c05b828194" +meta-arago-distro +meta-arago-extras = "HEAD:4c01410ffde8853224567fb6078d7d9f190b942f" +meta-qt5 = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f" +meta-networking +meta-ruby +meta-python +meta-oe = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e" +meta-ti = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93" +meta-linaro-toolchain +meta-optee = "HEAD:2f51d38048599d9878f149d6d15539fb97603f8f" +meta = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d" + +NOTE: Preparing RunQueue +NOTE: Executing SetScene Tasks +NOTE: Executing RunQueue Tasks +ERROR: nativesdk-gettext-0.19.6-r0 do_compile: oe_runmake failed +ERROR: nativesdk-gettext-0.19.6-r0 do_compile: Function failed: do_compile (log file is located at /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.34250) +ERROR: Logfile of failure stored in: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.34250 +Log data follows: +| DEBUG: SITE files ['endian-little', 'common-linux', 'common-glibc', 'bit-64', 'x86_64-linux', 'common'] +| DEBUG: Executing shell function do_compile and I got the error messege: | In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c:21:0: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.h:70:21: error: unknown type name 'ucs4_t' +| unilbrkprop_lookup (ucs4_t uc) +| ^ + SO, how can I fix it ? Thanks! Regards, Sam. + +Responses: +Hi Sam, Can you please attach the complete failure log that is located at "/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.34250" Please also confirm that you have installed all the host tools on this machine? Regards Karthik + +Hi Karthik, Thanks for your reply. Sorry, here is the complete log: log.do_compile.34250.txt DEBUG: SITE files ['endian-little', 'common-linux', 'common-glibc', 'bit-64', 'x86_64-linux', 'common'] +DEBUG: Executing shell function do_compile +NOTE: make -j 4 +make all-recursive +make[1]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build' +Making all in gnulib-local +make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gnulib-local' +make[2]: Nothing to be done for `all'. +make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gnulib-local' +Making all in gettext-runtime +make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +make all-recursive +make[3]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +Making all in doc +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/doc' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/doc' +Making all in intl +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl' +Making all in intl-java +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-java' +cd ../../../gettext-0.19.6/gettext-runtime/intl-java && test ! -d /usr/lib/jdk1.3.1 || env PATH=/usr/lib/jdk1.3.1/bin:$PATH javadoc -d javadoc2 gnu.gettext gnu/gettext/*.java +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-java' +Making all in intl-csharp +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-csharp' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-csharp' +Making all in gnulib-lib +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +make all-recursive +make[5]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +make[6]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +make[6]: Nothing to be done for `all-am'. +make[6]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +make[5]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +Making all in src +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/src' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/src' +Making all in po +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/po' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/po' +Making all in man +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/man' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/man' +Making all in m4 +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/m4' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/m4' +Making all in tests +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/tests' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/tests' +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +make[3]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +Making all in gettext-tools +make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +make all-recursive +make[3]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +Making all in doc +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/doc' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/doc' +Making all in intl +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/intl' +make[4]: Nothing to be done for `all'. +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/intl' +Making all in gnulib-lib +make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +make all-am +make[5]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unictype/ctype_space.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c +../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/lbrktables.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c +../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/u8-possible-linebreaks.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c +../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/u8-width-linebreaks.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c +x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c -fPIC -DPIC -o unilbrk/.libs/lbrktables.o +In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c:21:0: +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.h:70:21: error: unknown type name 'ucs4_t' + unilbrkprop_lookup (ucs4_t uc) + ^ +x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c -fPIC -DPIC -o unilbrk/.libs/u8-possible-linebreaks.o +x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c -fPIC -DPIC -o unictype/.libs/ctype_space.o +In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:26:0: +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.h:70:21: error: unknown type name 'ucs4_t' + unilbrkprop_lookup (ucs4_t uc) + ^ +In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/uniwidth/cjk.h:18:0, + from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:27: +../../../gettext-0.19.6/gettext-tools/gnulib-lib/streq.h: In function 'streq9': +../../../gettext-0.19.6/gettext-tools/gnulib-lib/streq.h:37:10: warning: implicit declaration of function 'strcmp' [-Wimplicit-function-declaration] + return strcmp (s1 + 9, s2 + 9) == 0; + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c: At top level: +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:31:31: error: unknown type name 'uint8_t' + u8_possible_linebreaks (const uint8_t *s, size_t n, const char *encoding, char *p) + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:31:43: error: unknown type name 'size_t' + u8_possible_linebreaks (const uint8_t *s, size_t n, const char *encoding, char *p) + ^ +make[5]: *** [unilbrk/lbrktables.lo] Error 1 +make[5]: *** Waiting for unfinished jobs.... +make[5]: *** [unilbrk/u8-possible-linebreaks.lo] Error 1 +In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:23:0: +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/bitmap.h:18:53: error: unknown type name 'ucs4_t' + static inline int bitmap_lookup (const void *table, ucs4_t uc); + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/bitmap.h:27:35: error: unknown type name 'ucs4_t' + bitmap_lookup (const void *table, ucs4_t uc) + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:28:1: error: unknown type name 'bool' + bool + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:29:14: error: unknown type name 'ucs4_t' + uc_is_space (ucs4_t uc) + ^ +make[5]: *** [unictype/ctype_space.lo] Error 1 +x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c -fPIC -DPIC -o unilbrk/.libs/u8-width-linebreaks.o +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c:27:28: error: unknown type name 'uint8_t' + u8_width_linebreaks (const uint8_t *s, size_t n, + ^ +../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c:27:40: error: unknown type name 'size_t' + u8_width_linebreaks (const uint8_t *s, size_t n, + ^ +make[5]: *** [unilbrk/u8-width-linebreaks.lo] Error 1 +make[5]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +make[4]: *** [all] Error 2 +make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +make[3]: *** [all-recursive] Error 1 +make[3]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +make[2]: *** [all] Error 2 +make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +make[1]: *** [all-recursive] Error 1 +make[1]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build' +make: *** [all] Error 2 +ERROR: oe_runmake failed +ERROR: Function failed: do_compile (log file is located at /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.34250) + 2. I can build the images successfully, like "./build-core-sdk.sh dra7xx-evm". So I don't know if I should install anyother host tools. Where I can find the tools list? Regards, Sam. + +Hi, Is there any update? Regards, Sam. + +Hi Sam, The list of host tools that need to be installed are captured in the Software Developers Guide. Here is the link for the same: processors.wiki.ti.com/index.php Please make sure that you install all the host tools. Now, regarding your comment #2, I need some further clarity. You said "I can build the images successfully, like "./build-core-sdk.sh dra7xx-evm"", it means that you have successfully completed the Yocto build. Can you please clarify when you are facing the error that you reported previously? Please provide me with the steps that you did when see the error. Regards Karthik + +Hi Regards, 1. I have already installed these tools before compiling. 2. Yes, this is my steps in the log file. 2100.log.txt work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ ./build-core-sdk.sh dra7xx-evm +[PSDKLA]> +[PSDKLA]> Current Directory is /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers +[PSDKLA]> PATH is /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/oe-core/scripts:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/bitbake/bin:/home/work/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games +[PSDKLA]> Building on ubuntu running Linux ubuntu 4.4.0-31-generic #50~14.04.1-Ubuntu SMP Wed Jul 13 01:07:32 UTC 2016 x86_64 x86_64 x86_64 GNU/Linux +[PSDKLA]> Starting Yocto build at Mon Nov 26 08:55:09 HKT 2018 +[PSDKLA]> +[PSDKLA]> cd build +[PSDKLA]> . conf/setenv +[PSDKLA]> cp conf/local.conf conf/local.conf.pristine +[PSDKLA]> MACHINE=dra7xx-evm bitbake tisdk-rootfs-image +NOTE: Started PRServer with DBfile: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 44404, PID: 44758 +Loading cache: 100% |#########################################################################################################################################################################| ETA: 00:00:00 +Loaded 2849 entries from dependency cache. +NOTE: Resolving any missing task queue dependencies + +Build Configuration: +BB_VERSION = "1.30.0" +BUILD_SYS = "x86_64-linux" +NATIVELSBSTRING = "Ubuntu-14.04" +TARGET_SYS = "arm-linux-gnueabi" +MACHINE = "dra7xx-evm" +DISTRO = "arago" +DISTRO_VERSION = "2016.12" +TUNE_FEATURES = "arm armv7a vfp thumb neon callconvention-hard" +TARGET_FPU = "hard" +meta-glsdk = "HEAD:66cfd8ef55344508d6e7b306259f34c05b828194" +meta-arago-distro +meta-arago-extras = "HEAD:4c01410ffde8853224567fb6078d7d9f190b942f" +meta-qt5 = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f" +meta-networking +meta-ruby +meta-python +meta-oe = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e" +meta-ti = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93" +meta-linaro-toolchain +meta-optee = "HEAD:2f51d38048599d9878f149d6d15539fb97603f8f" +meta = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d" + +NOTE: Preparing RunQueue +WARNING: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/meta-arago/meta-arago-extras/recipes-graphics/omapdrmtest/omapdrmtest_1.0.0.bb.do_compile is tainted from a forced run +NOTE: Executing SetScene Tasks +NOTE: Executing RunQueue Tasks +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The postinstall intercept hook 'update_pixbuf_cache' failed (exit code: 1)! See log for details! +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The postinstall intercept hook 'update_icon_cache' failed (exit code: 1)! See log for details! +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed Thai-Open-Source-Software-Center was not in the licenses collected for recipe ti-cgt6x +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: The license listed Hewlett-Packard was not in the licenses collected for recipe ti-cgt6x +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The postinstall intercept hook 'update_pixbuf_cache' failed (exit code: 1)! See log for details! + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The postinstall intercept hook 'update_icon_cache' failed (exit code: 1)! See log for details! + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed GPL-3-with-GCC-exception was not in the licenses collected for recipe external-linaro-toolchain + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed Thai-Open-Source-Software-Center was not in the licenses collected for recipe ti-cgt6x + +WARNING: tisdk-rootfs-image-1.0-r0 do_rootfs: [log_check] tisdk-rootfs-image: found a warning message in the logfile (keyword 'WARNING:'): +[log_check] WARNING: The license listed Hewlett-Packard was not in the licenses collected for recipe ti-cgt6x + +NOTE: Tasks Summary: Attempted 7428 tasks of which 7413 didn't need to be rerun and all succeeded. +NOTE: Writing buildhistory + +Summary: There were 41 WARNING messages shown. +[PSDKLA]> +[PSDKLA]> Completed Yocto build at Mon Nov 26 09:24:25 HKT 2018 +[PSDKLA]> +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ ./build-specific-recipe.sh dra7xx-evm meta-toolchain-qt5 +[PSDKLA]> +[PSDKLA]> Current Directory is /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers +[PSDKLA]> PATH is /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/oe-core/scripts:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/bitbake/bin:/home/work/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games +[PSDKLA]> Building on ubuntu running Linux ubuntu 4.4.0-31-generic #50~14.04.1-Ubuntu SMP Wed Jul 13 01:07:32 UTC 2016 x86_64 x86_64 x86_64 GNU/Linux +[PSDKLA]> Starting Yocto build at Mon Nov 26 09:48:07 HKT 2018 +[PSDKLA]> +[PSDKLA]> cd build +[PSDKLA]> cp conf/local.conf conf/local.conf.pristine +[PSDKLA]> . conf/setenv +[PSDKLA]> MACHINE=dra7xx-evm bitbake meta-toolchain-qt5 +NOTE: Started PRServer with DBfile: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 36985, PID: 62725 +Loading cache: 100% |#########################################################################################################################################################################| ETA: 00:00:00 +Loaded 2849 entries from dependency cache. +NOTE: Resolving any missing task queue dependencies + +Build Configuration: +BB_VERSION = "1.30.0" +BUILD_SYS = "x86_64-linux" +NATIVELSBSTRING = "Ubuntu-14.04" +TARGET_SYS = "arm-linux-gnueabi" +MACHINE = "dra7xx-evm" +DISTRO = "arago" +DISTRO_VERSION = "2016.12" +TUNE_FEATURES = "arm armv7a vfp thumb neon callconvention-hard" +TARGET_FPU = "hard" +meta-glsdk = "HEAD:66cfd8ef55344508d6e7b306259f34c05b828194" +meta-arago-distro +meta-arago-extras = "HEAD:4c01410ffde8853224567fb6078d7d9f190b942f" +meta-qt5 = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f" +meta-networking +meta-ruby +meta-python +meta-oe = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e" +meta-ti = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93" +meta-linaro-toolchain +meta-optee = "HEAD:2f51d38048599d9878f149d6d15539fb97603f8f" +meta = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d" + +NOTE: Preparing RunQueue +NOTE: Executing SetScene Tasks +NOTE: Executing RunQueue Tasks +ERROR: nativesdk-gettext-0.19.6-r0 do_compile: oe_runmake failed +ERROR: nativesdk-gettext-0.19.6-r0 do_compile: Function failed: do_compile (log file is located at /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.62771) +ERROR: Logfile of failure stored in: /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.62771 +Log data follows: +| DEBUG: SITE files ['endian-little', 'common-linux', 'common-glibc', 'bit-64', 'x86_64-linux', 'common'] +| DEBUG: Executing shell function do_compile +| NOTE: make -j 4 +| make all-recursive +| make[1]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build' +| Making all in gnulib-local +| make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gnulib-local' +| make[2]: Nothing to be done for `all'. +| make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gnulib-local' +| Making all in gettext-runtime +| make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| make all-recursive +| make[3]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| Making all in doc +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/doc' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/doc' +| Making all in intl +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl' +| Making all in intl-java +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-java' +| cd ../../../gettext-0.19.6/gettext-runtime/intl-java && test ! -d /usr/lib/jdk1.3.1 || env PATH=/usr/lib/jdk1.3.1/bin:$PATH javadoc -d javadoc2 gnu.gettext gnu/gettext/*.java +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-java' +| Making all in intl-csharp +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-csharp' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/intl-csharp' +| Making all in gnulib-lib +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| make all-recursive +| make[5]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| make[6]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| make[6]: Nothing to be done for `all-am'. +| make[6]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| make[5]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/gnulib-lib' +| Making all in src +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/src' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/src' +| Making all in po +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/po' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/po' +| Making all in man +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/man' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/man' +| Making all in m4 +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/m4' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/m4' +| Making all in tests +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/tests' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime/tests' +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| make[3]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-runtime' +| Making all in gettext-tools +| make[2]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +| make all-recursive +| make[3]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +| Making all in doc +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/doc' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/doc' +| Making all in intl +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/intl' +| make[4]: Nothing to be done for `all'. +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/intl' +| Making all in gnulib-lib +| make[4]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +| make all-am +| make[5]: Entering directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +| ../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unictype/ctype_space.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c +| ../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/lbrktables.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c +| ../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/u8-possible-linebreaks.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c +| ../x86_64-arago-linux-libtool --tag=CC --mode=compile x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c -o unilbrk/u8-width-linebreaks.lo ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c +| x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c -fPIC -DPIC -o unictype/.libs/ctype_space.o +| x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c -fPIC -DPIC -o unilbrk/.libs/u8-possible-linebreaks.o +| x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c -fPIC -DPIC -o unilbrk/.libs/lbrktables.o +| x86_64-arago-linux-libtool: compile: x86_64-arago-linux-gcc --sysroot=/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux -DHAVE_CONFIG_H -DEXEEXT=\"\" -DEXEEXT=\"\" -DEXEEXT=\"\" -I. -I../../../gettext-0.19.6/gettext-tools/gnulib-lib -I.. -I../intl -I../../../gettext-0.19.6/gettext-tools/intl -I.. -I../../../gettext-0.19.6/gettext-tools -DDEPENDS_ON_LIBICONV=1 -DDEPENDS_ON_LIBINTL=1 -DLIBXML_STATIC -I../../../gettext-0.19.6/gettext-tools/gnulib-lib/libcroco -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -isystem/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-nativesdk-arago-linux/tmp/xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/yyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyyy/sysroots/x86_64-arago-linux/usr/include -O2 -pipe -c ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c -fPIC -DPIC -o unilbrk/.libs/u8-width-linebreaks.o +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c:27:28: error: unknown type name 'uint8_t' +| u8_width_linebreaks (const uint8_t *s, size_t n, +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-width-linebreaks.c:27:40: error: unknown type name 'size_t' +| u8_width_linebreaks (const uint8_t *s, size_t n, +| ^ +| In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:23:0: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/bitmap.h:18:53: error: unknown type name 'ucs4_t' +| static inline int bitmap_lookup (const void *table, ucs4_t uc); +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/bitmap.h:27:35: error: unknown type name 'ucs4_t' +| bitmap_lookup (const void *table, ucs4_t uc) +| ^ +| In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.c:21:0: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.h:70:21: error: unknown type name 'ucs4_t' +| unilbrkprop_lookup (ucs4_t uc) +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:28:1: error: unknown type name 'bool' +| bool +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unictype/ctype_space.c:29:14: error: unknown type name 'ucs4_t' +| uc_is_space (ucs4_t uc) +| ^ +| In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:26:0: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/lbrktables.h:70:21: error: unknown type name 'ucs4_t' +| unilbrkprop_lookup (ucs4_t uc) +| ^ +| make[5]: *** [unictype/ctype_space.lo] Error 1 +| make[5]: *** Waiting for unfinished jobs.... +| make[5]: *** [unilbrk/u8-width-linebreaks.lo] Error 1 +| make[5]: *** [unilbrk/lbrktables.lo] Error 1 +| In file included from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/uniwidth/cjk.h:18:0, +| from ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:27: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/streq.h: In function 'streq9': +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/streq.h:37:10: warning: implicit declaration of function 'strcmp' [-Wimplicit-function-declaration] +| return strcmp (s1 + 9, s2 + 9) == 0; +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c: At top level: +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:31:31: error: unknown type name 'uint8_t' +| u8_possible_linebreaks (const uint8_t *s, size_t n, const char *encoding, char *p) +| ^ +| ../../../gettext-0.19.6/gettext-tools/gnulib-lib/unilbrk/u8-possible-linebreaks.c:31:43: error: unknown type name 'size_t' +| u8_possible_linebreaks (const uint8_t *s, size_t n, const char *encoding, char *p) +| ^ +| make[5]: *** [unilbrk/u8-possible-linebreaks.lo] Error 1 +| make[5]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +| make[4]: *** [all] Error 2 +| make[4]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools/gnulib-lib' +| make[3]: *** [all-recursive] Error 1 +| make[3]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +| make[2]: *** [all] Error 2 +| make[2]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build/gettext-tools' +| make[1]: *** [all-recursive] Error 1 +| make[1]: Leaving directory `/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/build' +| make: *** [all] Error 2 +| ERROR: oe_runmake failed +| ERROR: Function failed: do_compile (log file is located at /home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/x86_64-nativesdk-arago-linux/nativesdk-gettext/0.19.6-r0/temp/log.do_compile.62771) +ERROR: Task 1760 (virtual:nativesdk:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/oe-core/meta/recipes-core/gettext/gettext_0.19.6.bb, do_compile) failed with exit code '1' +NOTE: Tasks Summary: Attempted 3735 tasks of which 3734 didn't need to be rerun and 1 failed. +NOTE: Writing buildhistory +No currently running tasks (1514 of 3929) + +Summary: 1 task failed: + virtual:nativesdk:/home/work/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers/sources/oe-core/meta/recipes-core/gettext/gettext_0.19.6.bb, do_compile +Summary: There were 2 ERROR messages shown, returning a non-zero exit code. +[PSDKLA]> +[PSDKLA]> Completed Yocto build at Mon Nov 26 09:48:40 HKT 2018 +[PSDKLA]> +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ +work@ubuntu:~/project/ti-processor-sdk-linux-automotive-dra7xx-evm-03_04_00_03/yocto-layers$ + Thanks ! Regards Sam. + +Hi Sam, I will try to replicate the steps that you have done and then report back results by Monday. Regards Karthik + +Hi Karthik, Any update? How to separate the QT compilation environment from yocto, I want to use QT official source to transplant QT。 Regards, Sam. + +Hi Sam, You can separate the QT compilation from Yocto by removing the QT specific layers and packagegroups from the tisdk-rootfs-image. From a top level configuration you should also remove the Qt support etc. You can look into the meta-arago as the starting point for such changes. Regards Karthik + +Hi Karthik, So how do I get the build environment that supports PSDK3.04? This is TI configuration: ./configure -v \ + ... + ... + ... + -platform linux-oe-g++ \ + -xplatform linux-oe-g++ \ + ... + ... + ... If I use QT official source porting, how should I configure it? And this is the problem when I use PSDK3.04 : when I run a qml app: So, how can I fix it ? Thanks BR, Sam + +Hi Sam, To get the Qt build environment, we recommend to use Yocto as the starting point and you can find a reference in the Software Developers Guide ( processors.wiki.ti.com/.../Processor_SDK_Linux_Automotive_Software_Developers_Guide) on how to get started. With regard to the qml_app, I've seen this issue previously and the customer solved by moving to the next version of Qt. For someone who is familiar with Yocto, this can be achieved with some hours of effort with the PSDKLA 3.04 as the starting point. Regards Karthik + diff --git a/data2/text/range/30001+/746573.txt b/data2/text/range/30001+/746573.txt new file mode 100644 index 0000000000000000000000000000000000000000..0031d7c5311b969f1d2ff804ab503b4c53ef5d50 --- /dev/null +++ b/data2/text/range/30001+/746573.txt @@ -0,0 +1,30 @@ +Ticket Name: RTOS/TDA2: Linux+RTOS: VDRM crashes if weston is run automatically on boot + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, DRA752, PMP Tool/software: TI-RTOS Hello all, We are using ProcessorSDK Vision 3.04, on Tda2xx SoC. When we set apps.out to run on Linux boot automatically with Weston usecase (dispDistSrc + Display), vdrm errors start appearing with given kernel log backtrace: ------------[ cut here ]------------ 4,443,333116644,-;WARNING: CPU: 1 PID: 60 at drivers/gpu/drm/vdrm/v_crtc.c:414 v_crtc_atomic_begin+0x54/0x58() 4,444,333126162,-;Modules linked in: cmemk(O) memcache(O) rpmsg_proto virtio_rpmsg_bus bc_example(O) extcon_usb_gpio pvrsrvkm(O) c_can_platform ahci_platform c_can libahci_platform libahci can_dev omap_aes_driver omap_sham libata omap_des rtc_omap scsi_mod dwc3_omap extcon omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel 4,445,333156852,-;CPU: 1 PID: 60 Comm: kworker/1:1 Tainted: G W O 4.4.84-00027-g018eb62-dirty #2 4,446,333166107,-;Hardware name: Generic DRA74X (Flattened Device Tree) 4,447,333172226,-;Workqueue: events v_atomic_work 4,448,333176434,-;Backtrace: 4,449,333178903,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,450,333186504,-; r7:c03b2130 r6:20070093 r5:00000000 r4:c0953590 4,451,333192221,-;[] (show_stack) from [] (dump_stack+0x8c/0xa0) 4,452,333199475,-;[] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) 4,453,333207598,-; r7:c03b2130 r6:0000019e r5:00000009 r4:00000000 4,454,333213313,-;[] (warn_slowpath_common) from [] (warn_slowpath_null+0x24/0x2c) 4,455,333222131,-; r8:d8cf6d40 r7:00000000 r6:60070013 r5:ee9c4324 r4:ee9c4000 4,456,333228894,-;[] (warn_slowpath_null) from [] (v_crtc_atomic_begin+0x54/0x58) 4,457,333237633,-;[] (v_crtc_atomic_begin) from [] (drm_atomic_helper_commit_planes+0x78/0x278) 4,458,333247585,-; r7:00000000 r6:c03b20dc r5:00000000 r4:d8cf6040 4,459,333253295,-;[] (drm_atomic_helper_commit_planes) from [] (v_atomic_complete+0x34/0xcc) 4,460,333262986,-; r10:ef63d9c0 r9:00000000 r8:d8cf6d40 r7:00000000 r6:ee813000 r5:d8cf6040 4,461,333270881,-; r4:d8cf6d40 r3:00000001 4,462,333274487,-;[] (v_atomic_complete) from [] (v_atomic_work+0x10/0x14) 4,463,333282608,-; r9:00000000 r8:ef641000 r7:00000000 r6:ef63d9c0 r5:ef0c4180 r4:d8cf6d40 4,464,333290419,-;[] (v_atomic_work) from [] (process_one_work+0x124/0x3f4) 4,465,333298632,-;[] (process_one_work) from [] (worker_thread+0x4c/0x524) 4,466,333306753,-; r10:ef63d9c0 r9:ef0c4180 r8:00000008 r7:eeb16000 r6:ef63d9d4 r5:ef0c4198 4,467,333314648,-; r4:ef63d9c0 4,468,333317201,-;[] (worker_thread) from [] (kthread+0x100/0x118) 4,469,333324625,-; r10:00000000 r9:00000000 r8:c004bb80 r7:ef0c4180 r6:eeb16000 r5:ef0c2040 4,470,333332523,-; r4:00000000 4,471,333335074,-;[] (kthread) from [] (ret_from_fork+0x14/0x3c) 4,472,333342323,-; r8:00000000 r7:00000000 r6:00000000 r5:c0051604 r4:ef0c2040 4,473,333349084,-;---[ end trace 16b9e86ac44d03be ]--- After certain time, whole Linux crashes. This happens when Weston usecase is run automatically on Linux boot. Thanks in advance, Milena + +Responses: +What are the changes that you have to enable early weston? Does the crash happen all the time or is it partially reproducible? + +Hi, It happens each time. First the crashes start appearing in the log, and then the Linux crashes (after approx. 30-60 mins). We have made apps.out to boot automatically by adding it to init.d RC3. The use case dispDistSrc + Display is set to auto run in apps.out. Then we run weston-simple-egl (no matter is it autoboot or not). With our custom use case and app which uses weston/egl, Linux crashes 5 mins after boot. Regards, Milena + +Hello, Any news regarding this topic ? Best regards, Marko + +Sorry for the late reply. Can you send me the console logs from system boot start to crash? + +Of course, here they are. 6,0,0,-;Booting Linux on physical CPU 0x0 6,1,0,-;Initializing cgroup subsys cpuset 6,2,0,-;Initializing cgroup subsys cpu 6,3,0,-;Initializing cgroup subsys cpuacct 5,4,0,-;Linux version 4.4.84-00027-g018eb62-dirty (rtrk@rtrkn367-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Wed Sep 12 09:15:55 CEST 2018 6,5,0,-;CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d 6,6,0,-;CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache 6,7,0,-;Machine model: TI DRA742 6,8,0,-;Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB 6,9,0,-;Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool 3,10,0,-;Reserved memory: regions without no-map are not yet supported 6,11,0,-;Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB 6,12,0,-;Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool 6,13,0,-;Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB 6,14,0,-;Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool 3,15,0,-;Reserved memory: regions without no-map are not yet supported 6,16,0,-;Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB 6,17,0,-;Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool 6,18,0,-;Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB 6,19,0,-;Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool 3,20,0,-;Reserved memory: regions without no-map are not yet supported 6,21,0,-;Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB 6,22,0,-;Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool 6,23,0,-;cma: Reserved 128 MiB at 0xb7c00000 6,24,0,-;Memory policy: Data cache writealloc 6,25,0,-;OMAP4: Map 0xbfe00000 to fe600000 for dram barrier 7,26,0,-;On node 0 totalpages: 245248 7,27,0,-;free_area_init_node: node 0, pgdat c0981340, node_mem_map ef6a0000 7,28,0,-; Normal zone: 1728 pages used for memmap 7,29,0,-; Normal zone: 0 pages reserved 7,30,0,-; Normal zone: 180224 pages, LIFO batch:31 7,31,0,-; HighMem zone: 65024 pages, LIFO batch:15 6,32,0,-;DRA752 ES2.0 6,33,0,-;PERCPU: Embedded 11 pages/cpu @ef630000 s14912 r8192 d21952 u45056 7,34,0,-;pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 7,35,0,-;pcpu-alloc: [0] 0 [0] 1 6,36,0,-;Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 5,37,0,-;Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=d58b897b-02 rw rootwait ip=none mem=1024M cma=128M 6,38,0,-;PID hash table entries: 4096 (order: 2, 16384 bytes) 6,39,0,-;Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) 6,40,0,-;Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) 6,41,0,-;Memory: 305360K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364336K reserved, 311296K cma-reserved, 129024K highmem) 5,42,0,-;Virtual kernel memory layout:\x0a vector : 0xffff0000 - 0xffff1000 ( 4 kB)\x0a fixmap : 0xffc00000 - 0xfff00000 (3072 kB)\x0a vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)\x0a lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)\x0a pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)\x0a modules : 0xbf000000 - 0xbfe00000 ( 14 MB)\x0a .text : 0xc0008000 - 0xc08e000c (9057 kB)\x0a .init : 0xc08e1000 - 0xc0934000 ( 332 kB)\x0a .data : 0xc0934000 - 0xc09839e0 ( 319 kB)\x0a .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) 6,43,0,-;SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 6,44,0,-;Preemptible hierarchical RCU implementation. 6,45,0,-;\x09Build-time adjustment of leaf fanout to 32. 6,46,0,-;NR_IRQS:16 nr_irqs:16 16 4,47,0,-;ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div 6,48,0,-;OMAP clockevent source: timer1 at 32786 Hz 6,49,0,-;Architected cp15 timer(s) running at 6.14MHz (phys). 6,50,0,-;clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns 6,51,4,-;sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns 6,52,16,-;Switching to timer-based delay loop, resolution 162ns 6,53,334,-;clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns 6,54,343,-;OMAP clocksource: 32k_counter at 32768 Hz 6,55,792,-;Console: colour dummy device 80x30 3,56,808,-;WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' 3,57,814,-;This ensures that you still see kernel messages. Please 3,58,820,-;update your kernel commandline. 6,59,833,-;Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) 6,60,845,-;pid_max: default: 32768 minimum: 301 6,61,939,-;Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,62,950,-;Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,63,1490,-;Initializing cgroup subsys io 6,64,1506,-;Initializing cgroup subsys memory 6,65,1529,-;Initializing cgroup subsys devices 6,66,1542,-;Initializing cgroup subsys freezer 6,67,1553,-;Initializing cgroup subsys perf_event 6,68,1564,-;Initializing cgroup subsys pids 6,69,1590,-;CPU: Testing write buffer coherency: ok 3,70,1796,-;/cpus/cpu@0 missing clock-frequency property 3,71,1812,-;/cpus/cpu@1 missing clock-frequency property 6,72,1822,-;CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 6,73,1862,-;Setting up static identity map for 0x80008340 - 0x800083a0 6,74,80180,-;CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 6,75,80248,-;Brought up 2 CPUs 6,76,80262,-;SMP: Total of 2 processors activated (24.59 BogoMIPS). 6,77,80268,-;CPU: All CPU(s) started in HYP mode. 6,78,80273,-;CPU: Virtualization extensions available. 6,79,81303,-;devtmpfs: initialized 6,80,110244,-;VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 4,81,111205,-;omap_hwmod: l3_main_2 using broken dt data from ocp 6,82,314972,-;clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns 6,83,314995,-;futex hash table entries: 512 (order: 3, 32768 bytes) 6,84,320982,-;pinctrl core: initialized pinctrl subsystem 6,85,321842,-;NET: Registered protocol family 16 6,86,322791,-;DMA: preallocated 256 KiB pool for atomic coherent allocations 6,87,350250,-;cpuidle: using governor ladder 6,88,380280,-;cpuidle: using governor menu 6,89,388949,-;OMAP GPIO hardware version 0.1 6,90,393033,-;omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe SUBSYSTEM=platform DEVICE=+platform:4805d000.gpio 4,91,395021,-;irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! 6,92,411644,-;omap-gpmc 50000000.gpmc: GPMC revision 6.0 SUBSYSTEM=platform DEVICE=+platform:50000000.gpmc 4,93,411657,-;gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 6,94,421316,-;hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. 6,95,421325,-;hw-breakpoint: maximum watchpoint size is 8 bytes. 4,96,421800,-;omap4_sram_init:Unable to allocate sram needed to handle errata I688 4,97,421809,-;omap4_sram_init:Unable to get sram pool needed to handle errata I688 6,98,422284,-;OMAP DMA hardware revision 0.0 6,99,461754,-;omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) SUBSYSTEM=platform DEVICE=+platform:4a056000.dma-controller 6,100,462913,-;edma 43300000.edma: memcpy is disabled SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,101,467652,-;edma 43300000.edma: TI EDMA DMA engine driver SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,102,472034,-;omap-iommu 40d01000.mmu: 40d01000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,103,472213,-;omap-iommu 40d02000.mmu: 40d02000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,104,472369,-;omap-iommu 58882000.mmu: 58882000.mmu registered SUBSYSTEM=platform DEVICE=+platform:58882000.mmu 6,105,472525,-;omap-iommu 55082000.mmu: 55082000.mmu registered SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,106,472817,-;omap-iommu 41501000.mmu: 41501000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,107,473012,-;omap-iommu 41502000.mmu: 41502000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 4,108,476059,-;palmas 0-0058: IRQ missing: skipping irq request SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,109,491436,-;palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,110,553589,-;omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48070000.i2c 6,111,553996,-;omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48060000.i2c 6,112,554200,-;media: Linux media interface: v0.10 6,113,554251,-;Linux video capture interface: v2.00 6,114,554296,-;pps_core: LinuxPPS API ver. 1 registered 6,115,554303,-;pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti 6,116,554326,-;PTP clock support registered 6,117,554370,-;EDAC MC: Ver: 3.0.0 6,118,555126,-;omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48840000.mailbox 6,119,555420,-;omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48842000.mailbox 6,120,555775,-;Advanced Linux Sound Architecture Driver Initialized. 6,121,556620,-;clocksource: Switched to clocksource arch_sys_counter 6,122,567288,-;NET: Registered protocol family 2 6,123,567781,-;TCP established hash table entries: 8192 (order: 3, 32768 bytes) 6,124,567848,-;TCP bind hash table entries: 8192 (order: 4, 65536 bytes) 6,125,567973,-;TCP: Hash tables configured (established 8192 bind 8192) 6,126,568022,-;UDP hash table entries: 512 (order: 2, 16384 bytes) 6,127,568053,-;UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) 6,128,568244,-;NET: Registered protocol family 1 6,129,568482,-;RPC: Registered named UNIX socket transport module. 6,130,568491,-;RPC: Registered udp transport module. 6,131,568497,-;RPC: Registered tcp transport module. 6,132,568503,-;RPC: Registered tcp NFSv4.1 backchannel transport module. 7,133,568519,-;PCI: CLS 0 bytes, default 64 6,134,569525,-;hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available 6,135,578520,-;squashfs: version 4.0 (2009/01/31) Phillip Lougher 5,136,579162,-;NFS: Registering the id_resolver key type 5,137,579189,-;Key type id_resolver registered 5,138,579197,-;Key type id_legacy registered 6,139,579269,-;ntfs: driver 2.1.32 [Flags: R/O]. 6,140,580578,-;bounce: pool size: 64 pages 6,141,580725,-;Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) 6,142,580738,-;io scheduler noop registered 6,143,580749,-;io scheduler deadline registered 6,144,580780,-;io scheduler cfq registered (default) 6,145,585657,-;pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 SUBSYSTEM=platform DEVICE=+platform:4a003400.pinmux 6,146,588877,-;PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: 6,147,588890,-; No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] 6,148,588923,-; IO 0x20003000..0x20012fff -> 0x00000000 6,149,588944,-; MEM 0x20013000..0x2fffffff -> 0x20013000 3,150,619023,-;dra7-pcie 51000000.pcie_rc: link is not up SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,151,619193,-;dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,152,619206,-;pci_bus 0000:00: root bus resource [bus 00-ff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,153,619217,-;pci_bus 0000:00: root bus resource [io 0x0000-0xffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,154,619226,-;pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 7,155,619264,-;pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,156,619308,-;pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,157,619330,-;pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,158,619397,-;pci 0000:00:00.0: supports D1 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,159,619407,-;pci 0000:00:00.0: PME# supported from D0 D1 D3hot SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,160,619633,-;PCI: bus0: Fast back to back transfers disabled 6,161,619757,-;PCI: bus1: Fast back to back transfers enabled 6,162,619841,-;pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,163,619855,-;pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,164,619868,-;pci 0000:00:00.0: PCI bridge to [bus 01] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,165,620089,-;pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,166,620102,-;pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie01 7,167,620219,-;aer 0000:00:00.0:pcie02: service driver aer loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie02 6,168,681030,-;Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled 6,169,684387,-;4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 6,170,1689263,-;console [ttyS0] enabled 6,171,1693664,-;4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 6,172,1703363,-;48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 6,173,1713430,-;[drm] Initialized drm 1.1.0 20060810 6,174,1718991,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,175,1725635,-;[drm] No driver support for vblank timestamp query. 6,176,1731803,-;[drm] Initialized vdrm 1.0.0 20110917 on minor 0 6,177,1738990,-;OMAP DSS rev 6.1 6,178,1742728,-;omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) SUBSYSTEM=platform DEVICE=+platform:58000000.dss 6,179,1758504,-;loop: module loaded 6,180,1762048,-;vmemexp device MAJOR num = 245 6,181,1766175,-;vmemexp class registered 6,182,1769909,-;/dev/vmemexp device registered 6,183,1774024,-;ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 4,184,1779740,-;nand: No NAND device found 3,185,1783510,-;omap2-nand 8000000.nand: scan failed, may be bus-width mismatch SUBSYSTEM=platform DEVICE=+platform:8000000.nand 6,186,1793417,-;m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) SUBSYSTEM=spi DEVICE=+spi:spi32766.0 5,187,1798835,-;7 ofpart partitions found on MTD device spi32766.0 5,188,1804695,-;Creating 7 MTD partitions on "spi32766.0": 5,189,1809870,-;0x000000000000-0x000000040000 : "QSPI.SPL" 5,190,1815999,-;0x000000040000-0x000000140000 : "QSPI.u-boot" 5,191,1822369,-;0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" 5,192,1829317,-;0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" 5,193,1835976,-;0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" 5,194,1843370,-;0x0000001e0000-0x0000009e0000 : "QSPI.kernel" 5,195,1849709,-;0x0000009e0000-0x000002000000 : "QSPI.file-system" 6,196,1857470,-;libphy: Fixed MDIO Bus: probed 6,197,1864342,-;cpsw 48484000.ethernet: Detected MACID = d4:36:39:2a:80:b4 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,198,1871022,-;cpsw 48484000.ethernet: cpts: overflow check period 800 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,199,1878003,-;cpsw 48484000.ethernet: cpsw: Detected MACID = d4:36:39:2a:80:b5 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,200,1886720,-;mousedev: PS/2 mouse device common for all mice 6,201,1892960,-;i2c /dev entries driver 3,202,1902310,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 3,203,1908749,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 6,204,1915285,-;evm_3v3_sw: supplied by sysen1 6,205,2087457,-;ledtrig-cpu: registered to indicate activity on CPUs 6,206,2097561,-;aic_dvdd: supplied by evm_3v3_sw 3,207,2103444,-;davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 SUBSYSTEM=platform DEVICE=+platform:4847c000.mcasp 6,208,2110905,-;NET: Registered protocol family 10 6,209,2126220,-;sit: IPv6 over IPv4 tunneling driver 6,210,2131426,-;NET: Registered protocol family 17 5,211,2136112,-;Key type dns_resolver registered 3,212,2140562,-;omap_voltage_late_init: Voltage driver support not added 6,213,2147453,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,214,2153661,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,215,2160365,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,216,2166573,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,217,2174726,-;Power Management for TI OMAP4+ devices. 5,218,2179795,-;Registering SWP/SWPB emulation handler 6,219,2185530,-;dmm 4e000000.dmm: workaround for errata i878 in use SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,220,2192695,-;dmm 4e000000.dmm: initialized all PAT entries SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,221,2199973,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,222,2206624,-;[drm] No driver support for vblank timestamp query. 6,223,2212912,-;[drm] Initialized omapdrm 1.0.0 20110917 on minor 1 4,224,2239929,-;pcf857x: probe of 0-0020 failed with error -121 4,225,2245699,-;pcf857x: probe of 0-0021 failed with error -121 6,226,2296637,-;davinci_mdio 48485000.mdio: davinci mdio revision 1.6 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,227,2302756,-;davinci_mdio 48485000.mdio: detected phy mask ffffff7f SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,228,2320967,-;libphy: 48485000.mdio: probed 6,229,2324994,-;davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,230,2334189,-;omap_hsmmc 4809c000.mmc: Got CD GPIO SUBSYSTEM=platform DEVICE=+platform:4809c000.mmc 6,231,2378099,-;asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok SUBSYSTEM=platform DEVICE=+platform:sound0 6,232,2387638,-;hctosys: unable to open rtc device (rtc0) 6,233,2401100,-;evm_1v8: disabling 6,234,2404171,-;aic_dvdd: disabling 6,235,2407636,-;ldousb: disabling 6,236,2411020,-;ALSA device list: 6,237,2413998,-; #0: DRA7xx-EVM 6,238,2417533,-;Waiting for root device PARTUUID=d58b897b-02... 4,239,3033949,-;mmc2: host does not support reading read-only switch, assuming write-enable 6,240,3044050,-;mmc2: new high speed SDHC card at address 59b4 6,241,3049893,-;mmcblk0: mmc2:59b4 USD 7.51 GiB 6,242,3055253,-; mmcblk0: p1 p2 3,243,3077648,-;EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities 3,244,3086332,-;EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities 6,245,3345563,-;EXT4-fs (mmcblk0p2): recovery complete 6,246,3354863,-;EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) 6,247,3363040,-;VFS: Mounted root (ext4 filesystem) on device 179:2. 6,248,3372659,-;devtmpfs: mounted 6,249,3375852,-;Freeing unused kernel memory: 332K 4,250,3380329,-;This architecture does not have kernel memory protection. 30,251,3598259,-;systemd[1]: System time before build time, advancing clock. 5,252,3661090,-;random: systemd: uninitialized urandom read (16 bytes read, 14 bits of entropy available) 5,253,3673855,-;random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 30,254,3691625,-;systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) 30,255,3710249,-;systemd[1]: Detected architecture arm. 30,256,3738023,-;systemd[1]: Set hostname to . 5,257,3800823,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 5,258,3811094,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 5,259,3838152,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,260,3858836,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) 5,261,3878872,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) 5,262,3940725,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,263,3950315,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,264,3960481,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 28,265,4315246,-;systemd[1]: alignment.service: Found ordering cycle on alignment.service/start 28,266,4323601,-;systemd[1]: alignment.service: Found dependency on sysinit.target/start 28,267,4331316,-;systemd[1]: alignment.service: Found dependency on alignment.service/start 28,268,4339294,-;systemd[1]: alignment.service: Breaking ordering cycle by deleting job alignment.service/start 27,269,4349014,-;systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with alignment.service/start 30,270,4388913,-;systemd[1]: Started Dispatch Password Requests to Console Directory Watch. 30,271,4416906,-;systemd[1]: Listening on udev Control Socket. 30,272,4460428,-;systemd[1]: Created slice System Slice. 30,273,4486909,-;systemd[1]: Reached target Remote File Systems. 30,274,4517453,-;systemd[1]: Created slice system-serial\x5cx2dgetty.slice. 30,275,4546949,-;systemd[1]: Listening on Journal Socket (/dev/log). 30,276,4566906,-;systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. 30,277,4586881,-;systemd[1]: Listening on Syslog Socket. 30,278,4606855,-;systemd[1]: Listening on udev Kernel Socket. 30,279,4627381,-;systemd[1]: Created slice User and Session Slice. 30,280,4646802,-;systemd[1]: Reached target Slices. 30,281,4667049,-;systemd[1]: Reached target Swap. 30,282,4687408,-;systemd[1]: Created slice system-getty.slice. 30,283,4706910,-;systemd[1]: Listening on Journal Socket. 30,284,4767007,-;systemd[1]: Starting Load Kernel Modules... 30,285,4799158,-;systemd[1]: Starting Create list of required static device nodes for the current kernel... 30,286,4829084,-;systemd[1]: Starting Setup Virtual Console... 30,287,4858975,-;systemd[1]: Mounting Debug File System... 30,288,4889116,-;systemd[1]: Starting Journal Service... 30,289,4919638,-;systemd[1]: Mounting Temporary Directory... 30,290,4949126,-;systemd[1]: Starting Remount Root and Kernel File Systems... 6,291,4972906,-;EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) 30,292,4981229,-;systemd[1]: Mounting POSIX Message Queue File System... 30,293,5017092,-;systemd[1]: Started Forward Password Requests to Wall Directory Watch. 30,294,5046826,-;systemd[1]: Reached target Paths. 30,295,5067040,-;systemd[1]: Listening on Network Service Netlink Socket. 30,296,5141350,-;systemd[1]: Mounted POSIX Message Queue File System. 30,297,5166901,-;systemd[1]: Mounted Debug File System. 30,298,5186917,-;systemd[1]: Mounted Temporary Directory. 30,299,5207056,-;systemd[1]: Started Journal Service. 46,300,5866055,-;systemd-journald[129]: Received request to flush runtime journal from PID 1 6,301,6243410,-;omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 SUBSYSTEM=platform DEVICE=+platform:55020000.ipu 6,302,6278206,-; remoteproc0: 55020000.ipu is available 6,303,6283413,-; remoteproc0: Note: remoteproc is still under development and considered experimental. 6,304,6300063,-; remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,305,6323426,-;omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 SUBSYSTEM=platform DEVICE=+platform:40800000.dsp 6,306,6358113,-; remoteproc1: 40800000.dsp is available 6,307,6369248,-; remoteproc1: Note: remoteproc is still under development and considered experimental. 6,308,6388848,-; remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,309,6416441,-;omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 SUBSYSTEM=platform DEVICE=+platform:41000000.dsp 6,310,6462172,-; remoteproc2: 41000000.dsp is available 6,311,6472505,-; remoteproc2: Note: remoteproc is still under development and considered experimental. 6,312,6490654,-; remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,313,6528652,-;omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 SUBSYSTEM=platform DEVICE=+platform:480a5000.des 6,314,6580894,-;omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 SUBSYSTEM=platform DEVICE=+platform:48090000.rng 6,315,7378852,-; remoteproc1: registered virtio0 (type 7) 6,316,7429913,-; remoteproc0: registered virtio1 (type 7) 7,317,7436396,-;rtc rtc0: 48838000.rtc: dev (254:0) SUBSYSTEM=rtc DEVICE=c254:0 6,318,7436414,-;omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 SUBSYSTEM=platform DEVICE=+platform:48838000.rtc 6,319,7517225,-;CAN device driver interface 6,320,7630145,-; remoteproc2: registered virtio2 (type 7) 6,321,7675150,-;omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 SUBSYSTEM=platform DEVICE=+platform:4b101000.sham 6,322,7697156,-;omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b500000.aes 6,323,7703901,-;omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b700000.aes 6,324,7726535,-;c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) SUBSYSTEM=platform DEVICE=+platform:4ae3c000.can 5,325,7744265,-;SCSI subsystem initialized 7,326,7963665,-;libata version 3.00 loaded. 6,327,8057922,-;ahci 4a140000.sata: SSS flag set, parallel bus scan disabled SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,328,8068428,-;ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,329,8093265,-;ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,330,8114387,-;scsi host0: ahci SUBSYSTEM=scsi DEVICE=+scsi:host0 6,331,8120741,-;ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 6,332,8277098,-;[drm] Initialized pvr 1.14.3699939 20110701 on minor 2 6,333,8486669,-;ata1: SATA link down (SStatus 0 SControl 300) 6,334,8555182,-;PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] 4,335,8719425,-;FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. 6,336,8876955,-;net eth1: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n3 6,337,8899544,-;net eth0: initialized cpsw ale version 1.4 SUBSYSTEM=net DEVICE=n2 6,338,8924148,-;net eth0: ALE Table size 1024 SUBSYSTEM=net DEVICE=n2 3,339,8941450,-;libphy: PHY 48485000.mdio:03 not found 3,340,8947684,-;net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 SUBSYSTEM=net DEVICE=n3 6,341,8962932,-;IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready 6,342,8973041,-;net eth0: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n2 6,343,9007346,-; remoteproc1: powering up 40800000.dsp 6,344,9025663,-; remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6969075 4,345,9039568,-;omap_hwmod: mmu0_dsp1: _wait_target_disable failed 6,346,9045454,-;omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,347,9051414,-;omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,348,9063784,-;net eth0: phy found : id is : 0x1410cc2 SUBSYSTEM=net DEVICE=n2 6,349,9082946,-; remoteproc1: remote processor 40800000.dsp is now up 6,350,9084946,-;IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready 6,351,9098484,-;virtio_rpmsg_bus virtio0: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,352,9116210,-; remoteproc0: powering up 55020000.ipu 6,353,9133009,-; remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9441556 6,354,9140415,-;omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,355,9171831,-; remoteproc0: remote processor 55020000.ipu is now up 6,356,9179658,-;virtio_rpmsg_bus virtio1: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,357,9188983,-; remoteproc2: powering up 41000000.dsp 6,358,9202624,-; remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6969075 4,359,9216258,-;omap_hwmod: mmu0_dsp2: _wait_target_disable failed 6,360,9222144,-;omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,361,9228073,-;omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 6,362,9256056,-; remoteproc2: remote processor 41000000.dsp is now up 6,363,9265885,-;virtio_rpmsg_bus virtio2: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,364,9424016,-;virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,365,9432869,-;virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,366,9445239,-;virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,367,9465207,-;NET: Registered protocol family 41 6,368,10187191,-;DMA: Module install successful, device major num = 242 6,369,10193664,-;DRV: Module install successful 6,370,10224570,-;CMEMK module: reference Linux version 4.4.84 6,371,10232424,-;cmemk initialized 6,372,13064212,-;cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,373,13072136,-;IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready 3,374,15553263,-;omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 3,375,15561463,-;omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 5,376,19996781,-;random: nonblocking pool is initialized root@dra7xx-evm:~# cat /dev/kmsg 6,0,0,-;Booting Linux on physical CPU 0x0 6,1,0,-;Initializing cgroup subsys cpuset 6,2,0,-;Initializing cgroup subsys cpu 6,3,0,-;Initializing cgroup subsys cpuacct 5,4,0,-;Linux version 4.4.84-00027-g018eb62-dirty (rtrk@rtrkn367-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Wed Sep 12 09:15:55 CEST 2018 6,5,0,-;CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d 6,6,0,-;CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache 6,7,0,-;Machine model: TI DRA742 6,8,0,-;Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB 6,9,0,-;Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool 3,10,0,-;Reserved memory: regions without no-map are not yet supported 6,11,0,-;Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB 6,12,0,-;Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool 6,13,0,-;Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB 6,14,0,-;Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool 3,15,0,-;Reserved memory: regions without no-map are not yet supported 6,16,0,-;Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB 6,17,0,-;Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool 6,18,0,-;Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB 6,19,0,-;Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool 3,20,0,-;Reserved memory: regions without no-map are not yet supported 6,21,0,-;Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB 6,22,0,-;Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool 6,23,0,-;cma: Reserved 128 MiB at 0xb7c00000 6,24,0,-;Memory policy: Data cache writealloc 6,25,0,-;OMAP4: Map 0xbfe00000 to fe600000 for dram barrier 7,26,0,-;On node 0 totalpages: 245248 7,27,0,-;free_area_init_node: node 0, pgdat c0981340, node_mem_map ef6a0000 7,28,0,-; Normal zone: 1728 pages used for memmap 7,29,0,-; Normal zone: 0 pages reserved 7,30,0,-; Normal zone: 180224 pages, LIFO batch:31 7,31,0,-; HighMem zone: 65024 pages, LIFO batch:15 6,32,0,-;DRA752 ES2.0 6,33,0,-;PERCPU: Embedded 11 pages/cpu @ef630000 s14912 r8192 d21952 u45056 7,34,0,-;pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 7,35,0,-;pcpu-alloc: [0] 0 [0] 1 6,36,0,-;Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 5,37,0,-;Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=d58b897b-02 rw rootwait ip=none mem=1024M cma=128M 6,38,0,-;PID hash table entries: 4096 (order: 2, 16384 bytes) 6,39,0,-;Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) 6,40,0,-;Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) 6,41,0,-;Memory: 305360K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364336K reserved, 311296K cma-reserved, 129024K highmem) 5,42,0,-;Virtual kernel memory layout:\x0a vector : 0xffff0000 - 0xffff1000 ( 4 kB)\x0a fixmap : 0xffc00000 - 0xfff00000 (3072 kB)\x0a vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)\x0a lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)\x0a pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)\x0a modules : 0xbf000000 - 0xbfe00000 ( 14 MB)\x0a .text : 0xc0008000 - 0xc08e000c (9057 kB)\x0a .init : 0xc08e1000 - 0xc0934000 ( 332 kB)\x0a .data : 0xc0934000 - 0xc09839e0 ( 319 kB)\x0a .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) 6,43,0,-;SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 6,44,0,-;Preemptible hierarchical RCU implementation. 6,45,0,-;\x09Build-time adjustment of leaf fanout to 32. 6,46,0,-;NR_IRQS:16 nr_irqs:16 16 4,47,0,-;ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div 6,48,0,-;OMAP clockevent source: timer1 at 32786 Hz 6,49,0,-;Architected cp15 timer(s) running at 6.14MHz (phys). 6,50,0,-;clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns 6,51,4,-;sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns 6,52,16,-;Switching to timer-based delay loop, resolution 162ns 6,53,333,-;clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns 6,54,340,-;OMAP clocksource: 32k_counter at 32768 Hz 6,55,784,-;Console: colour dummy device 80x30 3,56,800,-;WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' 3,57,806,-;This ensures that you still see kernel messages. Please 3,58,812,-;update your kernel commandline. 6,59,826,-;Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) 6,60,839,-;pid_max: default: 32768 minimum: 301 6,61,934,-;Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,62,945,-;Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,63,1487,-;Initializing cgroup subsys io 6,64,1503,-;Initializing cgroup subsys memory 6,65,1526,-;Initializing cgroup subsys devices 6,66,1538,-;Initializing cgroup subsys freezer 6,67,1549,-;Initializing cgroup subsys perf_event 6,68,1560,-;Initializing cgroup subsys pids 6,69,1587,-;CPU: Testing write buffer coherency: ok 3,70,1795,-;/cpus/cpu@0 missing clock-frequency property 3,71,1810,-;/cpus/cpu@1 missing clock-frequency property 6,72,1821,-;CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 6,73,1861,-;Setting up static identity map for 0x80008340 - 0x800083a0 6,74,80168,-;CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 6,75,80235,-;Brought up 2 CPUs 6,76,80248,-;SMP: Total of 2 processors activated (24.59 BogoMIPS). 6,77,80255,-;CPU: All CPU(s) started in HYP mode. 6,78,80260,-;CPU: Virtualization extensions available. 6,79,81290,-;devtmpfs: initialized 6,80,110013,-;VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 4,81,110968,-;omap_hwmod: l3_main_2 using broken dt data from ocp 6,82,314814,-;clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns 6,83,314837,-;futex hash table entries: 512 (order: 3, 32768 bytes) 6,84,320789,-;pinctrl core: initialized pinctrl subsystem 6,85,321647,-;NET: Registered protocol family 16 6,86,322597,-;DMA: preallocated 256 KiB pool for atomic coherent allocations 6,87,350249,-;cpuidle: using governor ladder 6,88,380276,-;cpuidle: using governor menu 6,89,388921,-;OMAP GPIO hardware version 0.1 6,90,393009,-;omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe SUBSYSTEM=platform DEVICE=+platform:4805d000.gpio 4,91,394999,-;irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! 6,92,411623,-;omap-gpmc 50000000.gpmc: GPMC revision 6.0 SUBSYSTEM=platform DEVICE=+platform:50000000.gpmc 4,93,411636,-;gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 6,94,421279,-;hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. 6,95,421290,-;hw-breakpoint: maximum watchpoint size is 8 bytes. 4,96,421762,-;omap4_sram_init:Unable to allocate sram needed to handle errata I688 4,97,421771,-;omap4_sram_init:Unable to get sram pool needed to handle errata I688 6,98,422250,-;OMAP DMA hardware revision 0.0 6,99,461732,-;omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) SUBSYSTEM=platform DEVICE=+platform:4a056000.dma-controller 6,100,462892,-;edma 43300000.edma: memcpy is disabled SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,101,467596,-;edma 43300000.edma: TI EDMA DMA engine driver SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,102,471970,-;omap-iommu 40d01000.mmu: 40d01000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,103,472151,-;omap-iommu 40d02000.mmu: 40d02000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,104,472309,-;omap-iommu 58882000.mmu: 58882000.mmu registered SUBSYSTEM=platform DEVICE=+platform:58882000.mmu 6,105,472462,-;omap-iommu 55082000.mmu: 55082000.mmu registered SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,106,472756,-;omap-iommu 41501000.mmu: 41501000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,107,472951,-;omap-iommu 41502000.mmu: 41502000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 4,108,475978,-;palmas 0-0058: IRQ missing: skipping irq request SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,109,491370,-;palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,110,553521,-;omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48070000.i2c 6,111,553927,-;omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48060000.i2c 6,112,554130,-;media: Linux media interface: v0.10 6,113,554182,-;Linux video capture interface: v2.00 6,114,554225,-;pps_core: LinuxPPS API ver. 1 registered 6,115,554232,-;pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti 6,116,554256,-;PTP clock support registered 6,117,554300,-;EDAC MC: Ver: 3.0.0 6,118,555057,-;omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48840000.mailbox 6,119,555352,-;omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48842000.mailbox 6,120,555700,-;Advanced Linux Sound Architecture Driver Initialized. 6,121,556565,-;clocksource: Switched to clocksource arch_sys_counter 6,122,567105,-;NET: Registered protocol family 2 6,123,567596,-;TCP established hash table entries: 8192 (order: 3, 32768 bytes) 6,124,567663,-;TCP bind hash table entries: 8192 (order: 4, 65536 bytes) 6,125,567788,-;TCP: Hash tables configured (established 8192 bind 8192) 6,126,567837,-;UDP hash table entries: 512 (order: 2, 16384 bytes) 6,127,567868,-;UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) 6,128,568056,-;NET: Registered protocol family 1 6,129,568310,-;RPC: Registered named UNIX socket transport module. 6,130,568319,-;RPC: Registered udp transport module. 6,131,568325,-;RPC: Registered tcp transport module. 6,132,568331,-;RPC: Registered tcp NFSv4.1 backchannel transport module. 7,133,568347,-;PCI: CLS 0 bytes, default 64 6,134,569353,-;hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available 6,135,578303,-;squashfs: version 4.0 (2009/01/31) Phillip Lougher 5,136,578940,-;NFS: Registering the id_resolver key type 5,137,578964,-;Key type id_resolver registered 5,138,578972,-;Key type id_legacy registered 6,139,579045,-;ntfs: driver 2.1.32 [Flags: R/O]. 6,140,580342,-;bounce: pool size: 64 pages 6,141,580488,-;Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) 6,142,580501,-;io scheduler noop registered 6,143,580512,-;io scheduler deadline registered 6,144,580542,-;io scheduler cfq registered (default) 6,145,585415,-;pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 SUBSYSTEM=platform DEVICE=+platform:4a003400.pinmux 6,146,588642,-;PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: 6,147,588656,-; No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] 6,148,588690,-; IO 0x20003000..0x20012fff -> 0x00000000 6,149,588710,-; MEM 0x20013000..0x2fffffff -> 0x20013000 3,150,618654,-;dra7-pcie 51000000.pcie_rc: link is not up SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,151,618826,-;dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,152,618839,-;pci_bus 0000:00: root bus resource [bus 00-ff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,153,618849,-;pci_bus 0000:00: root bus resource [io 0x0000-0xffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,154,618859,-;pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 7,155,618896,-;pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,156,618939,-;pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,157,618961,-;pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,158,619029,-;pci 0000:00:00.0: supports D1 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,159,619039,-;pci 0000:00:00.0: PME# supported from D0 D1 D3hot SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,160,619265,-;PCI: bus0: Fast back to back transfers disabled 6,161,619389,-;PCI: bus1: Fast back to back transfers enabled 6,162,619473,-;pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,163,619488,-;pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,164,619501,-;pci 0000:00:00.0: PCI bridge to [bus 01] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,165,619721,-;pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,166,619735,-;pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie01 7,167,619853,-;aer 0000:00:00.0:pcie02: service driver aer loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie02 6,168,680398,-;Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled 6,169,683761,-;4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 6,170,1688708,-;console [ttyS0] enabled 6,171,1693108,-;4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 6,172,1702808,-;48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 6,173,1712867,-;[drm] Initialized drm 1.1.0 20060810 6,174,1718438,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,175,1725084,-;[drm] No driver support for vblank timestamp query. 6,176,1731250,-;[drm] Initialized vdrm 1.0.0 20110917 on minor 0 6,177,1738438,-;OMAP DSS rev 6.1 6,178,1742174,-;omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) SUBSYSTEM=platform DEVICE=+platform:58000000.dss 6,179,1757933,-;loop: module loaded 6,180,1761477,-;vmemexp device MAJOR num = 245 6,181,1765605,-;vmemexp class registered 6,182,1769339,-;/dev/vmemexp device registered 6,183,1773454,-;ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 4,184,1779170,-;nand: No NAND device found 3,185,1782940,-;omap2-nand 8000000.nand: scan failed, may be bus-width mismatch SUBSYSTEM=platform DEVICE=+platform:8000000.nand 6,186,1792847,-;m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) SUBSYSTEM=spi DEVICE=+spi:spi32766.0 5,187,1798266,-;7 ofpart partitions found on MTD device spi32766.0 5,188,1804124,-;Creating 7 MTD partitions on "spi32766.0": 5,189,1809302,-;0x000000000000-0x000000040000 : "QSPI.SPL" 5,190,1815432,-;0x000000040000-0x000000140000 : "QSPI.u-boot" 5,191,1821796,-;0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" 5,192,1828746,-;0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" 5,193,1835411,-;0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" 5,194,1842800,-;0x0000001e0000-0x0000009e0000 : "QSPI.kernel" 5,195,1849136,-;0x0000009e0000-0x000002000000 : "QSPI.file-system" 6,196,1856887,-;libphy: Fixed MDIO Bus: probed 6,197,1863763,-;cpsw 48484000.ethernet: Detected MACID = d4:36:39:2a:80:b4 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,198,1870440,-;cpsw 48484000.ethernet: cpts: overflow check period 800 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,199,1877418,-;cpsw 48484000.ethernet: cpsw: Detected MACID = d4:36:39:2a:80:b5 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,200,1886059,-;mousedev: PS/2 mouse device common for all mice 6,201,1892332,-;i2c /dev entries driver 3,202,1901678,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 3,203,1908081,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 6,204,1914615,-;evm_3v3_sw: supplied by sysen1 6,205,2087408,-;ledtrig-cpu: registered to indicate activity on CPUs 6,206,2097520,-;aic_dvdd: supplied by evm_3v3_sw 3,207,2103403,-;davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 SUBSYSTEM=platform DEVICE=+platform:4847c000.mcasp 6,208,2110892,-;NET: Registered protocol family 10 6,209,2126201,-;sit: IPv6 over IPv4 tunneling driver 6,210,2131438,-;NET: Registered protocol family 17 5,211,2136121,-;Key type dns_resolver registered 3,212,2140563,-;omap_voltage_late_init: Voltage driver support not added 6,213,2147456,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,214,2153665,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,215,2160364,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,216,2166610,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,217,2174746,-;Power Management for TI OMAP4+ devices. 5,218,2179827,-;Registering SWP/SWPB emulation handler 6,219,2185551,-;dmm 4e000000.dmm: workaround for errata i878 in use SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,220,2192735,-;dmm 4e000000.dmm: initialized all PAT entries SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,221,2200031,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,222,2206694,-;[drm] No driver support for vblank timestamp query. 6,223,2212981,-;[drm] Initialized omapdrm 1.0.0 20110917 on minor 1 4,224,2240015,-;pcf857x: probe of 0-0020 failed with error -121 4,225,2245785,-;pcf857x: probe of 0-0021 failed with error -121 6,226,2296581,-;davinci_mdio 48485000.mdio: davinci mdio revision 1.6 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,227,2302700,-;davinci_mdio 48485000.mdio: detected phy mask ffffff7f SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,228,2320918,-;libphy: 48485000.mdio: probed 6,229,2324945,-;davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,230,2334147,-;omap_hsmmc 4809c000.mmc: Got CD GPIO SUBSYSTEM=platform DEVICE=+platform:4809c000.mmc 6,231,2378046,-;asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok SUBSYSTEM=platform DEVICE=+platform:sound0 6,232,2387582,-;hctosys: unable to open rtc device (rtc0) 6,233,2401066,-;evm_1v8: disabling 6,234,2404138,-;aic_dvdd: disabling 6,235,2407584,-;ldousb: disabling 6,236,2410963,-;ALSA device list: 6,237,2413941,-; #0: DRA7xx-EVM 6,238,2417470,-;Waiting for root device PARTUUID=d58b897b-02... 4,239,3023897,-;mmc2: host does not support reading read-only switch, assuming write-enable 6,240,3033970,-;mmc2: new high speed SDHC card at address 59b4 6,241,3049849,-;mmcblk0: mmc2:59b4 USD 7.51 GiB 6,242,3055211,-; mmcblk0: p1 p2 3,243,3077593,-;EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities 3,244,3086278,-;EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities 6,245,3788350,-;EXT4-fs (mmcblk0p2): recovery complete 6,246,3797520,-;EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) 6,247,3805675,-;VFS: Mounted root (ext4 filesystem) on device 179:2. 6,248,3815296,-;devtmpfs: mounted 6,249,3818508,-;Freeing unused kernel memory: 332K 4,250,3822971,-;This architecture does not have kernel memory protection. 30,251,4041046,-;systemd[1]: System time before build time, advancing clock. 5,252,4103928,-;random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 5,253,4116700,-;random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 30,254,4134328,-;systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) 30,255,4152893,-;systemd[1]: Detected architecture arm. 30,256,4177956,-;systemd[1]: Set hostname to . 5,257,4249805,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,258,4260320,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,259,4262973,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,260,4311327,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) 5,261,4325468,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) 5,262,4413869,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,263,4423366,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,264,4433367,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 28,265,4780412,-;systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start 28,266,4788248,-;systemd[1]: sysinit.target: Found dependency on alignment.service/start 28,267,4795946,-;systemd[1]: sysinit.target: Found dependency on basic.target/start 28,268,4803276,-;systemd[1]: sysinit.target: Found dependency on sockets.target/start 28,269,4810739,-;systemd[1]: sysinit.target: Found dependency on dbus.socket/start 28,270,4817925,-;systemd[1]: sysinit.target: Found dependency on sysinit.target/start 28,271,4825359,-;systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start 27,272,4834812,-;systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start 30,273,4871224,-;systemd[1]: Created slice System Slice. 30,274,4898277,-;systemd[1]: Created slice system-serial\x5cx2dgetty.slice. 30,275,4927382,-;systemd[1]: Created slice system-getty.slice. 30,276,4956867,-;systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. 30,277,4987324,-;systemd[1]: Created slice User and Session Slice. 30,278,5016842,-;systemd[1]: Listening on Journal Socket (/dev/log). 30,279,5058210,-;systemd[1]: Started Forward Password Requests to Wall Directory Watch. 30,280,5086925,-;systemd[1]: Started Dispatch Password Requests to Console Directory Watch. 30,281,5116833,-;systemd[1]: Listening on Syslog Socket. 30,282,5136745,-;systemd[1]: Reached target Remote File Systems. 30,283,5166894,-;systemd[1]: Listening on udev Control Socket. 30,284,5196849,-;systemd[1]: Listening on Journal Socket. 30,285,5246943,-;systemd[1]: Starting Setup Virtual Console... 30,286,5279080,-;systemd[1]: Starting Create list of required static device nodes for the current kernel... 30,287,5312107,-;systemd[1]: Starting Load Kernel Modules... 30,288,5338885,-;systemd[1]: Starting Remount Root and Kernel File Systems... 6,289,5358756,-;EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) 30,290,5369325,-;systemd[1]: Mounting POSIX Message Queue File System... 30,291,5436901,-;systemd[1]: Starting Journal Service... 30,292,5459929,-;systemd[1]: Mounting Debug File System... 30,293,5486970,-;systemd[1]: Reached target Slices. 30,294,5506888,-;systemd[1]: Listening on udev Kernel Socket. 30,295,5536992,-;systemd[1]: Listening on Network Service Netlink Socket. 30,296,5566769,-;systemd[1]: Reached target Paths. 30,297,5626825,-;systemd[1]: Mounting Temporary Directory... 30,298,5656804,-;systemd[1]: Reached target Swap. 30,299,5683438,-;systemd[1]: Mounted POSIX Message Queue File System. 30,300,5706808,-;systemd[1]: Mounted Debug File System. 30,301,5726783,-;systemd[1]: Mounted Temporary Directory. 30,302,5746957,-;systemd[1]: Started Journal Service. 46,303,6427820,-;systemd-journald[134]: Received request to flush runtime journal from PID 1 6,304,6855841,-;omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 SUBSYSTEM=platform DEVICE=+platform:55020000.ipu 6,305,6875357,-; remoteproc0: 55020000.ipu is available 6,306,6898872,-; remoteproc0: Note: remoteproc is still under development and considered experimental. 6,307,6935498,-; remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,308,7000237,-;omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 SUBSYSTEM=platform DEVICE=+platform:40800000.dsp 6,309,7021964,-; remoteproc1: 40800000.dsp is available 6,310,7040030,-; remoteproc1: Note: remoteproc is still under development and considered experimental. 6,311,7065824,-; remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,312,7096780,-;omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 SUBSYSTEM=platform DEVICE=+platform:41000000.dsp 6,313,7117093,-; remoteproc2: 41000000.dsp is available 6,314,7127665,-; remoteproc2: Note: remoteproc is still under development and considered experimental. 6,315,7138702,-; remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,316,7155663,-;omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 SUBSYSTEM=platform DEVICE=+platform:48090000.rng 6,317,7171154,-;omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 SUBSYSTEM=platform DEVICE=+platform:480a5000.des 7,318,7513236,-;rtc rtc0: 48838000.rtc: dev (254:0) SUBSYSTEM=rtc DEVICE=c254:0 6,319,7513255,-;omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 SUBSYSTEM=platform DEVICE=+platform:48838000.rtc 6,320,7666118,-;CAN device driver interface 6,321,7826721,-;c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) SUBSYSTEM=platform DEVICE=+platform:4ae3c000.can 6,322,7985433,-; remoteproc1: registered virtio0 (type 7) 6,323,8022114,-; remoteproc0: registered virtio1 (type 7) 6,324,8110957,-;omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b500000.aes 6,325,8117603,-;omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b700000.aes 5,326,8336385,-;SCSI subsystem initialized 6,327,8387423,-;omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 SUBSYSTEM=platform DEVICE=+platform:4b101000.sham 6,328,8532136,-; remoteproc2: registered virtio2 (type 7) 6,329,8702903,-;[drm] Initialized pvr 1.14.3699939 20110701 on minor 2 7,330,8771142,-;libata version 3.00 loaded. 6,331,8825979,-;ahci 4a140000.sata: SSS flag set, parallel bus scan disabled SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,332,8839061,-;ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,333,8862749,-;ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,334,8910579,-;scsi host0: ahci SUBSYSTEM=scsi DEVICE=+scsi:host0 6,335,8913786,-;ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 4,336,9197349,-;FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. 6,337,9278074,-;ata1: SATA link down (SStatus 0 SControl 300) 6,338,9376231,-;PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] 6,339,9584210,-;net eth1: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n3 6,340,9609402,-;net eth0: initialized cpsw ale version 1.4 SUBSYSTEM=net DEVICE=n2 6,341,9629115,-;net eth0: ALE Table size 1024 SUBSYSTEM=net DEVICE=n2 3,342,9646329,-;libphy: PHY 48485000.mdio:03 not found 3,343,9662601,-;net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 SUBSYSTEM=net DEVICE=n3 6,344,9682766,-; remoteproc1: powering up 40800000.dsp 6,345,9687303,-;IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready 6,346,9689302,-;net eth0: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n2 6,347,9736273,-; remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6969075 4,348,9756874,-;omap_hwmod: mmu0_dsp1: _wait_target_disable failed 6,349,9762759,-;omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,350,9768711,-;omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,351,9773591,-;net eth0: phy found : id is : 0x1410cc2 SUBSYSTEM=net DEVICE=n2 6,352,9786878,-;IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready 6,353,9844979,-; remoteproc1: remote processor 40800000.dsp is now up 6,354,9852194,-;virtio_rpmsg_bus virtio0: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,355,9858633,-; remoteproc0: powering up 55020000.ipu 6,356,9873098,-; remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9441556 6,357,9880442,-;omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,358,9911309,-; remoteproc0: remote processor 55020000.ipu is now up 6,359,9919145,-;virtio_rpmsg_bus virtio1: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,360,9925450,-; remoteproc2: powering up 41000000.dsp 6,361,9938524,-; remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6969075 4,362,9952030,-;omap_hwmod: mmu0_dsp2: _wait_target_disable failed 6,363,9957914,-;omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,364,9963865,-;omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 6,365,9991677,-; remoteproc2: remote processor 41000000.dsp is now up 6,366,10001528,-;virtio_rpmsg_bus virtio2: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,367,10167329,-;virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,368,10186618,-;virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,369,10194576,-;virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,370,10204542,-;NET: Registered protocol family 41 6,371,10909399,-;DMA: Module install successful, device major num = 242 6,372,10915849,-;DRV: Module install successful 6,373,10939514,-;CMEMK module: reference Linux version 4.4.84 6,374,10945642,-;cmemk initialized 6,375,13774172,-;cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,376,13782098,-;IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready 3,377,16272527,-;omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 3,378,16280716,-;omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 5,379,22615708,-;random: nonblocking pool is initialized 3,380,482166555,-;INFO: rcu_preempt detected stalls on CPUs/tasks: 3,381,482172249,-;\x09(detected by 1, t=2102 jiffies, g=27167, c=27166, q=636) 3,382,482178723,-;All QSes seen, last rcu_preempt kthread activity 2103 (18218-16115), jiffies_till_next_fqs=1, root ->qsmask 0x0 6,383,482189898,-;swapper/1 R running 0 0 1 0x00000000 4,384,482196287,-;Backtrace: 4,385,482198760,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,386,482206358,-; r7:ef0abd20 r6:00000001 r5:00000001 r4:ef083c00 4,387,482212069,-;[] (show_stack) from [] (sched_show_task+0xbc/0x110) 4,388,482219845,-;[] (sched_show_task) from [] (rcu_check_callbacks+0x918/0x92c) 4,389,482228488,-; r5:2ed0b000 r4:c0933700 4,390,482232088,-;[] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) 4,391,482240993,-; r10:c00a3bd8 r9:00000003 r8:ef63bc4c r7:00000070 r6:00000000 r5:ef083c00 4,392,482248886,-; r4:ffffe000 4,393,482251435,-;[] (update_process_times) from [] (tick_sched_handle+0x50/0x54) 4,394,482260165,-; r7:00000070 r6:42f9c213 r5:ef0abf40 r4:ef63be50 4,395,482265870,-;[] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) 4,396,482274255,-;[] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) 4,397,482283072,-; r7:00000000 r6:ef63bc40 r5:ef63be50 r4:ef63bc00 4,398,482288777,-;[] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1fc) 4,399,482297594,-; r10:ef63bc78 r9:ef63bcb8 r8:ef63bc98 r7:ef63bc14 r6:ffffffff r5:00000003 4,400,482305483,-; r4:ef63bc00 4,401,482308031,-;[] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) 4,402,482317022,-; r10:c0936504 r9:c068c27c r8:00000012 r7:ef0455c0 r6:c0953708 r5:ef005d80 4,403,482324910,-; r4:ef640b80 4,404,482327457,-;[] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) 4,405,482336976,-;[] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) 4,406,482346055,-; r9:c068c27c r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c093140c 4,407,482353860,-;[] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) 4,408,482362594,-;[] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) 4,409,482370976,-; r9:c068c27c r8:fa213000 r7:fa212000 r6:ef0abf40 r5:fa21200c r4:c09368e4 4,410,482378780,-;[] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) 4,411,482386289,-;Exception stack(0xef0abf40 to 0xef0abf88) 4,412,482391360,-;bf40: 00000001 00000000 fe600000 00000000 ef0aa000 c09364a4 00000000 00000000 4,413,482399568,-;bf60: ef0abfb0 c068c27c c0936504 ef0abf9c ef0abf7c ef0abf90 c00284e8 c00107a0 4,414,482407775,-;bf80: 600d0013 ffffffff 4,415,482411273,-; r9:c068c27c r8:ef0abfb0 r7:ef0abf74 r6:ffffffff r5:600d0013 r4:c00107a0 4,416,482419081,-;[] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) 4,417,482427205,-;[] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) 4,418,482435852,-;[] (cpu_startup_entry) from [] (secondary_start_kernel+0x164/0x170) 4,419,482444930,-; r7:c09852a8 4,420,482447478,-;[] (secondary_start_kernel) from [<800095cc>] (0x800095cc) 4,421,482454899,-; r7:c09852a8 r6:10c0387d r5:00000051 r4:af09006a 3,422,482460604,-;rcu_preempt kthread starved for 2131 jiffies! g27167 c27166 f0x2 s3 ->state=0x0 3,423,505726557,-;INFO: rcu_preempt detected stalls on CPUs/tasks: 3,424,505732253,-;\x09(detected by 1, t=2102 jiffies, g=27257, c=27256, q=718) 3,425,505738728,-;All QSes seen, last rcu_preempt kthread activity 2103 (20574-18471), jiffies_till_next_fqs=1, root ->qsmask 0x0 6,426,505749901,-;swapper/1 R running 0 0 1 0x00000000 4,427,505756292,-;Backtrace: 4,428,505758762,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,429,505766360,-; r7:ef0abd20 r6:00000001 r5:00000001 r4:ef083c00 4,430,505772072,-;[] (show_stack) from [] (sched_show_task+0xbc/0x110) 4,431,505779847,-;[] (sched_show_task) from [] (rcu_check_callbacks+0x918/0x92c) 4,432,505788490,-; r5:2ed0b000 r4:c0933700 4,433,505792090,-;[] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) 4,434,505800995,-; r10:c00a3bd8 r9:00000003 r8:ef63bc4c r7:00000075 r6:00000000 r5:ef083c00 4,435,505808884,-; r4:ffffe000 4,436,505811434,-;[] (update_process_times) from [] (tick_sched_handle+0x50/0x54) 4,437,505820164,-; r7:00000075 r6:bf42d5fe r5:ef0abf40 r4:ef63be50 4,438,505825870,-;[] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) 4,439,505834256,-;[] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) 4,440,505843073,-; r7:00000000 r6:ef63bc40 r5:ef63be50 r4:ef63bc00 4,441,505848777,-;[] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1fc) 4,442,505857594,-; r10:ef63bc78 r9:ef63bcb8 r8:ef63bc98 r7:ef63bc14 r6:ffffffff r5:00000003 4,443,505865485,-; r4:ef63bc00 4,444,505868033,-;[] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) 4,445,505877025,-; r10:c0936504 r9:c068c27c r8:00000012 r7:ef0455c0 r6:c0953708 r5:ef005d80 4,446,505884913,-; r4:ef640b80 4,447,505887460,-;[] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) 4,448,505896978,-;[] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) 4,449,505906058,-; r9:c068c27c r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c093140c 4,450,505913864,-;[] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) 4,451,505922597,-;[] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) 4,452,505930977,-; r9:c068c27c r8:fa213000 r7:fa212000 r6:ef0abf40 r5:fa21200c r4:c09368e4 4,453,505938782,-;[] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) 4,454,505946291,-;Exception stack(0xef0abf40 to 0xef0abf88) 4,455,505951362,-;bf40: 00000001 00000000 fe600000 00000000 ef0aa000 c09364a4 00000000 00000000 4,456,505959572,-;bf60: ef0abfb0 c068c27c c0936504 ef0abf9c ef0abf7c ef0abf90 c00284e8 c00107a0 4,457,505967780,-;bf80: 600d0013 ffffffff 4,458,505971277,-; r9:c068c27c r8:ef0abfb0 r7:ef0abf74 r6:ffffffff r5:600d0013 r4:c00107a0 4,459,505979086,-;[] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) 4,460,505987209,-;[] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) 4,461,505995856,-;[] (cpu_startup_entry) from [] (secondary_start_kernel+0x164/0x170) 4,462,506004934,-; r7:c09852a8 4,463,506007480,-;[] (secondary_start_kernel) from [<800095cc>] (0x800095cc) 4,464,506014901,-; r7:c09852a8 r6:10c0387d r5:00000051 r4:af09006a 3,465,506020609,-;rcu_preempt kthread starved for 2131 jiffies! g27257 c27256 f0x2 s3 ->state=0x0 3,466,531236556,-;INFO: rcu_preempt detected stalls on CPUs/tasks: 3,467,531242250,-;\x09(detected by 1, t=2102 jiffies, g=27436, c=27435, q=665) 3,468,531248723,-;All QSes seen, last rcu_preempt kthread activity 2103 (23125-21022), jiffies_till_next_fqs=1, root ->qsmask 0x0 6,469,531259897,-;swapper/1 R running 0 0 1 0x00000000 4,470,531266285,-;Backtrace: 4,471,531268755,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,472,531276353,-; r7:ef0abd20 r6:00000001 r5:00000001 r4:ef083c00 4,473,531282063,-;[] (show_stack) from [] (sched_show_task+0xbc/0x110) 4,474,531289839,-;[] (sched_show_task) from [] (rcu_check_callbacks+0x918/0x92c) 4,475,531298482,-; r5:2ed0b000 r4:c0933700 4,476,531302084,-;[] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) 4,477,531310988,-; r10:c00a3bd8 r9:00000003 r8:ef63bc4c r7:0000007b r6:00000000 r5:ef083c00 4,478,531318878,-; r4:ffffe000 4,479,531321428,-;[] (update_process_times) from [] (tick_sched_handle+0x50/0x54) 4,480,531330158,-; r7:0000007b r6:afc68ae6 r5:ef0abf40 r4:ef63be50 4,481,531335866,-;[] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) 4,482,531344253,-;[] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) 4,483,531353069,-; r7:00000000 r6:ef63bc40 r5:ef63be50 r4:ef63bc00 4,484,531358775,-;[] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1fc) 4,485,531367592,-; r10:ef63bc78 r9:ef63bcb8 r8:ef63bc98 r7:ef63bc14 r6:ffffffff r5:00000003 4,486,531375483,-; r4:ef63bc00 4,487,531378032,-;[] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) 4,488,531387023,-; r10:c0936504 r9:c068c27c r8:00000012 r7:ef0455c0 r6:c0953708 r5:ef005d80 4,489,531394913,-; r4:ef640b80 4,490,531397461,-;[] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) 4,491,531406980,-;[] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) 4,492,531416058,-; r9:c068c27c r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c093140c 4,493,531423865,-;[] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) 4,494,531432598,-;[] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) 4,495,531440980,-; r9:c068c27c r8:fa213000 r7:fa212000 r6:ef0abf40 r5:fa21200c r4:c09368e4 4,496,531448787,-;[] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) 4,497,531456297,-;Exception stack(0xef0abf40 to 0xef0abf88) 4,498,531461367,-;bf40: 00000001 00000000 fe600000 00000000 ef0aa000 c09364a4 00000000 00000000 4,499,531469576,-;bf60: ef0abfb0 c068c27c c0936504 ef0abf9c ef0abf7c ef0abf90 c00284e8 c00107a0 4,500,531477783,-;bf80: 600d0013 ffffffff 4,501,531481280,-; r9:c068c27c r8:ef0abfb0 r7:ef0abf74 r6:ffffffff r5:600d0013 r4:c00107a0 4,502,531489090,-;[] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) 4,503,531497215,-;[] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) 4,504,531505862,-;[] (cpu_startup_entry) from [] (secondary_start_kernel+0x164/0x170) 4,505,531514940,-; r7:c09852a8 4,506,531517485,-;[] (secondary_start_kernel) from [<800095cc>] (0x800095cc) 4,507,531524906,-; r7:c09852a8 r6:10c0387d r5:00000051 r4:af09006a 3,508,531530613,-;rcu_preempt kthread starved for 2131 jiffies! g27436 c27435 f0x2 s3 ->state=0x0 3,509,562436555,-;INFO: rcu_preempt detected stalls on CPUs/tasks: 3,510,562442249,-;\x09(detected by 1, t=2102 jiffies, g=27812, c=27811, q=89) 3,511,562448635,-;All QSes seen, last rcu_preempt kthread activity 2103 (26245-24142), jiffies_till_next_fqs=1, root ->qsmask 0x0 6,512,562459809,-;swapper/1 R running 0 0 1 0x00000000 4,513,562466198,-;Backtrace: 4,514,562468667,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,515,562476265,-; r7:ef0abd20 r6:00000001 r5:00000001 r4:ef083c00 4,516,562481975,-;[] (show_stack) from [] (sched_show_task+0xbc/0x110) 4,517,562489750,-;[] (sched_show_task) from [] (rcu_check_callbacks+0x918/0x92c) 4,518,562498393,-; r5:2ed0b000 r4:c0933700 4,519,562501993,-;[] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) 4,520,562510898,-; r10:c00a3bd8 r9:00000003 r8:ef63bc4c r7:00000082 r6:00000000 r5:ef083c00 4,521,562518789,-; r4:ffffe000 4,522,562521338,-;[] (update_process_times) from [] (tick_sched_handle+0x50/0x54) 4,523,562530068,-; r7:00000082 r6:f370c2c1 r5:ef0abf40 r4:ef63be50 4,524,562535777,-;[] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) 4,525,562544162,-;[] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) 4,526,562552979,-; r7:00000000 r6:ef63bc40 r5:ef63be50 r4:ef63bc00 4,527,562558686,-;[] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1fc) 4,528,562567501,-; r10:ef63bc78 r9:ef63bcb8 r8:ef63bc98 r7:ef63bc14 r6:ffffffff r5:00000003 4,529,562575390,-; r4:ef63bc00 4,530,562577938,-;[] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) 4,531,562586929,-; r10:c0936504 r9:c068c27c r8:00000012 r7:ef0455c0 r6:c0953708 r5:ef005d80 4,532,562594817,-; r4:ef640b80 4,533,562597364,-;[] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) 4,534,562606883,-;[] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) 4,535,562615961,-; r9:c068c27c r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c093140c 4,536,562623767,-;[] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) 4,537,562632500,-;[] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) 4,538,562640881,-; r9:c068c27c r8:fa213000 r7:fa212000 r6:ef0abf40 r5:fa21200c r4:c09368e4 4,539,562648684,-;[] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) 4,540,562656193,-;Exception stack(0xef0abf40 to 0xef0abf88) 4,541,562661264,-;bf40: 00000001 00000000 fe600000 00000000 ef0aa000 c09364a4 00000000 00000000 4,542,562669473,-;bf60: ef0abfb0 c068c27c c0936504 ef0abf9c ef0abf7c ef0abf90 c00284e8 c00107a0 4,543,562677680,-;bf80: 600d0013 ffffffff 4,544,562681176,-; r9:c068c27c r8:ef0abfb0 r7:ef0abf74 r6:ffffffff r5:600d0013 r4:c00107a0 4,545,562688984,-;[] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) 4,546,562697108,-;[] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) 4,547,562705755,-;[] (cpu_startup_entry) from [] (secondary_start_kernel+0x164/0x170) 4,548,562714832,-; r7:c09852a8 4,549,562717379,-;[] (secondary_start_kernel) from [<800095cc>] (0x800095cc) 4,550,562724801,-; r7:c09852a8 r6:10c0387d r5:00000051 r4:af09006a 3,551,562730506,-;rcu_preempt kthread starved for 2131 jiffies! g27812 c27811 f0x2 s3 ->state=0x0 3,552,583816556,-;INFO: rcu_preempt detected stalls on CPUs/tasks: 3,553,583822252,-;\x09(detected by 0, t=2102 jiffies, g=27816, c=27815, q=706) 3,554,583828725,-;All QSes seen, last rcu_preempt kthread activity 2102 (28383-26281), jiffies_till_next_fqs=1, root ->qsmask 0x0 6,555,583839899,-;swapper/0 R running 0 0 0 0x00000000 4,556,583846289,-;Backtrace: 4,557,583848763,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,558,583856360,-; r7:c0935ce0 r6:00000001 r5:00000000 r4:c09398b8 4,559,583862074,-;[] (show_stack) from [] (sched_show_task+0xbc/0x110) 4,560,583869849,-;[] (sched_show_task) from [] (rcu_check_callbacks+0x918/0x92c) 4,561,583878492,-; r5:2ed00000 r4:c0933700 4,562,583882094,-;[] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) 4,563,583890999,-; r10:c00a3bd8 r9:00000005 r8:ef630c4c r7:00000087 r6:00000000 r5:c09398b8 4,564,583898891,-; r4:ffffe000 4,565,583901440,-;[] (update_process_times) from [] (tick_sched_handle+0x50/0x54) 4,566,583910170,-; r7:00000087 r6:edc9aca5 r5:c0935f00 r4:ef630e50 4,567,583915877,-;[] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) 4,568,583924263,-;[] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) 4,569,583933080,-; r7:00000000 r6:ef630c40 r5:ef630e50 r4:ef630c00 4,570,583938786,-;[] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1fc) 4,571,583947603,-; r10:ef630c78 r9:ef630cb8 r8:ef630c98 r7:ef630c14 r6:ffffffff r5:00000003 4,572,583955493,-; r4:ef630c00 4,573,583958042,-;[] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) 4,574,583967033,-; r10:c0936504 r9:c068c27c r8:00000012 r7:ef0455c0 r6:c0953708 r5:ef005d80 4,575,583974923,-; r4:ef635b80 4,576,583977471,-;[] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) 4,577,583986990,-;[] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) 4,578,583996069,-; r9:c068c27c r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c093140c 4,579,584003876,-;[] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) 4,580,584012610,-;[] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) 4,581,584020991,-; r9:c068c27c r8:fa213000 r7:fa212000 r6:c0935f00 r5:fa21200c r4:c09368e4 4,582,584028795,-;[] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) 4,583,584036304,-;Exception stack(0xc0935f00 to 0xc0935f48) 4,584,584041374,-;5f00: 00000001 00000000 fe600000 00000000 c0934000 c09364a4 00000000 00000000 4,585,584049583,-;5f20: c0935f70 c068c27c c0936504 c0935f5c c0935f3c c0935f50 c00284e8 c00107a0 4,586,584057790,-;5f40: 600d0013 ffffffff 4,587,584061288,-; r9:c068c27c r8:c0935f70 r7:c0935f34 r6:ffffffff r5:600d0013 r4:c00107a0 4,588,584069097,-;[] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) 4,589,584077222,-;[] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) 4,590,584085871,-;[] (cpu_startup_entry) from [] (rest_init+0x90/0x94) 4,591,584093642,-; r7:c0936400 4,592,584096190,-;[] (rest_init) from [] (start_kernel+0x3d8/0x3e4) 4,593,584103699,-; r5:c0985000 r4:c0985040 4,594,584107297,-;[] (start_kernel) from [<8000807c>] (0x8000807c) 3,595,584113850,-;rcu_preempt kthread starved for 2130 jiffies! g27816 c27815 f0x2 s3 ->state=0x0 + +From the log provided I do not see anything specific to virtual DRM, so its hard to say virtual DRM is causing the crash. Virtual DRM uses hrtimer for vsync emulation, and I can see a lot of timer related warnings. + +My apologies for the inconvenience caused, I have accidentally sent a wrong log. Here is correct log. 6,0,0,-;Booting Linux on physical CPU 0x0 6,1,0,-;Initializing cgroup subsys cpuset 6,2,0,-;Initializing cgroup subsys cpu 6,3,0,-;Initializing cgroup subsys cpuacct 5,4,0,-;Linux version 4.4.84-00027-g018eb62-dirty (rtrk@rtrkn367-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Wed Sep 12 09:15:55 CEST 2018 6,5,0,-;CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d 6,6,0,-;CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache 6,7,0,-;Machine model: TI DRA742 6,8,0,-;Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB 6,9,0,-;Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool 3,10,0,-;Reserved memory: regions without no-map are not yet supported 6,11,0,-;Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB 6,12,0,-;Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool 6,13,0,-;Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB 6,14,0,-;Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool 3,15,0,-;Reserved memory: regions without no-map are not yet supported 6,16,0,-;Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB 6,17,0,-;Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool 6,18,0,-;Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB 6,19,0,-;Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool 3,20,0,-;Reserved memory: regions without no-map are not yet supported 6,21,0,-;Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB 6,22,0,-;Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool 6,23,0,-;cma: Reserved 128 MiB at 0xb7c00000 6,24,0,-;Memory policy: Data cache writealloc 6,25,0,-;OMAP4: Map 0xbfe00000 to fe600000 for dram barrier 7,26,0,-;On node 0 totalpages: 245248 7,27,0,-;free_area_init_node: node 0, pgdat c0981340, node_mem_map ef6a0000 7,28,0,-; Normal zone: 1728 pages used for memmap 7,29,0,-; Normal zone: 0 pages reserved 7,30,0,-; Normal zone: 180224 pages, LIFO batch:31 7,31,0,-; HighMem zone: 65024 pages, LIFO batch:15 6,32,0,-;DRA752 ES2.0 6,33,0,-;PERCPU: Embedded 11 pages/cpu @ef630000 s14912 r8192 d21952 u45056 7,34,0,-;pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 7,35,0,-;pcpu-alloc: [0] 0 [0] 1 6,36,0,-;Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 5,37,0,-;Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=d58b897b-02 rw rootwait ip=none mem=1024M cma=128M 6,38,0,-;PID hash table entries: 4096 (order: 2, 16384 bytes) 6,39,0,-;Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) 6,40,0,-;Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) 6,41,0,-;Memory: 305360K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364336K reserved, 311296K cma-reserved, 129024K highmem) 5,42,0,-;Virtual kernel memory layout:\x0a vector : 0xffff0000 - 0xffff1000 ( 4 kB)\x0a fixmap : 0xffc00000 - 0xfff00000 (3072 kB)\x0a vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)\x0a lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)\x0a pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)\x0a modules : 0xbf000000 - 0xbfe00000 ( 14 MB)\x0a .text : 0xc0008000 - 0xc08e000c (9057 kB)\x0a .init : 0xc08e1000 - 0xc0934000 ( 332 kB)\x0a .data : 0xc0934000 - 0xc09839e0 ( 319 kB)\x0a .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) 6,43,0,-;SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 6,44,0,-;Preemptible hierarchical RCU implementation. 6,45,0,-;\x09Build-time adjustment of leaf fanout to 32. 6,46,0,-;NR_IRQS:16 nr_irqs:16 16 4,47,0,-;ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div 6,48,0,-;OMAP clockevent source: timer1 at 32786 Hz 6,49,0,-;Architected cp15 timer(s) running at 6.14MHz (phys). 6,50,0,-;clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns 6,51,5,-;sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns 6,52,16,-;Switching to timer-based delay loop, resolution 162ns 6,53,332,-;clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns 6,54,339,-;OMAP clocksource: 32k_counter at 32768 Hz 6,55,788,-;Console: colour dummy device 80x30 3,56,803,-;WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' 3,57,809,-;This ensures that you still see kernel messages. Please 3,58,815,-;update your kernel commandline. 6,59,828,-;Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) 6,60,841,-;pid_max: default: 32768 minimum: 301 6,61,936,-;Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,62,947,-;Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) 6,63,1491,-;Initializing cgroup subsys io 6,64,1507,-;Initializing cgroup subsys memory 6,65,1530,-;Initializing cgroup subsys devices 6,66,1543,-;Initializing cgroup subsys freezer 6,67,1553,-;Initializing cgroup subsys perf_event 6,68,1565,-;Initializing cgroup subsys pids 6,69,1591,-;CPU: Testing write buffer coherency: ok 3,70,1798,-;/cpus/cpu@0 missing clock-frequency property 3,71,1814,-;/cpus/cpu@1 missing clock-frequency property 6,72,1823,-;CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 6,73,1867,-;Setting up static identity map for 0x80008340 - 0x800083a0 6,74,80176,-;CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 6,75,80247,-;Brought up 2 CPUs 6,76,80260,-;SMP: Total of 2 processors activated (24.59 BogoMIPS). 6,77,80266,-;CPU: All CPU(s) started in HYP mode. 6,78,80272,-;CPU: Virtualization extensions available. 6,79,81301,-;devtmpfs: initialized 6,80,110295,-;VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 4,81,111252,-;omap_hwmod: l3_main_2 using broken dt data from ocp 6,82,315092,-;clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns 6,83,315115,-;futex hash table entries: 512 (order: 3, 32768 bytes) 6,84,321100,-;pinctrl core: initialized pinctrl subsystem 6,85,321968,-;NET: Registered protocol family 16 6,86,322918,-;DMA: preallocated 256 KiB pool for atomic coherent allocations 6,87,350252,-;cpuidle: using governor ladder 6,88,380278,-;cpuidle: using governor menu 6,89,388925,-;OMAP GPIO hardware version 0.1 6,90,393020,-;omap_gpio 4805d000.gpio: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/gpio6_pins, deferring probe SUBSYSTEM=platform DEVICE=+platform:4805d000.gpio 4,91,395000,-;irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! 6,92,411614,-;omap-gpmc 50000000.gpmc: GPMC revision 6.0 SUBSYSTEM=platform DEVICE=+platform:50000000.gpmc 4,93,411627,-;gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 6,94,421289,-;hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. 6,95,421299,-;hw-breakpoint: maximum watchpoint size is 8 bytes. 4,96,421773,-;omap4_sram_init:Unable to allocate sram needed to handle errata I688 4,97,421782,-;omap4_sram_init:Unable to get sram pool needed to handle errata I688 6,98,422262,-;OMAP DMA hardware revision 0.0 6,99,461737,-;omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) SUBSYSTEM=platform DEVICE=+platform:4a056000.dma-controller 6,100,462902,-;edma 43300000.edma: memcpy is disabled SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,101,467653,-;edma 43300000.edma: TI EDMA DMA engine driver SUBSYSTEM=platform DEVICE=+platform:43300000.edma 6,102,472034,-;omap-iommu 40d01000.mmu: 40d01000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,103,472216,-;omap-iommu 40d02000.mmu: 40d02000.mmu registered SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,104,472374,-;omap-iommu 58882000.mmu: 58882000.mmu registered SUBSYSTEM=platform DEVICE=+platform:58882000.mmu 6,105,472527,-;omap-iommu 55082000.mmu: 55082000.mmu registered SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,106,472820,-;omap-iommu 41501000.mmu: 41501000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,107,473012,-;omap-iommu 41502000.mmu: 41502000.mmu registered SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 4,108,476048,-;palmas 0-0058: IRQ missing: skipping irq request SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,109,491449,-;palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 SUBSYSTEM=i2c DEVICE=+i2c:0-0058 6,110,553569,-;omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48070000.i2c 6,111,553975,-;omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz SUBSYSTEM=platform DEVICE=+platform:48060000.i2c 6,112,554180,-;media: Linux media interface: v0.10 6,113,554232,-;Linux video capture interface: v2.00 6,114,554276,-;pps_core: LinuxPPS API ver. 1 registered 6,115,554284,-;pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti 6,116,554306,-;PTP clock support registered 6,117,554351,-;EDAC MC: Ver: 3.0.0 6,118,555102,-;omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48840000.mailbox 6,119,555398,-;omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 SUBSYSTEM=platform DEVICE=+platform:48842000.mailbox 6,120,555746,-;Advanced Linux Sound Architecture Driver Initialized. 6,121,556616,-;clocksource: Switched to clocksource arch_sys_counter 6,122,567177,-;NET: Registered protocol family 2 6,123,567672,-;TCP established hash table entries: 8192 (order: 3, 32768 bytes) 6,124,567739,-;TCP bind hash table entries: 8192 (order: 4, 65536 bytes) 6,125,567864,-;TCP: Hash tables configured (established 8192 bind 8192) 6,126,567911,-;UDP hash table entries: 512 (order: 2, 16384 bytes) 6,127,567942,-;UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) 6,128,568131,-;NET: Registered protocol family 1 6,129,568389,-;RPC: Registered named UNIX socket transport module. 6,130,568398,-;RPC: Registered udp transport module. 6,131,568404,-;RPC: Registered tcp transport module. 6,132,568410,-;RPC: Registered tcp NFSv4.1 backchannel transport module. 7,133,568426,-;PCI: CLS 0 bytes, default 64 6,134,569445,-;hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available 6,135,578442,-;squashfs: version 4.0 (2009/01/31) Phillip Lougher 5,136,579078,-;NFS: Registering the id_resolver key type 5,137,579106,-;Key type id_resolver registered 5,138,579114,-;Key type id_legacy registered 6,139,579185,-;ntfs: driver 2.1.32 [Flags: R/O]. 6,140,580491,-;bounce: pool size: 64 pages 6,141,580638,-;Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) 6,142,580651,-;io scheduler noop registered 6,143,580662,-;io scheduler deadline registered 6,144,580693,-;io scheduler cfq registered (default) 6,145,585582,-;pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 SUBSYSTEM=platform DEVICE=+platform:4a003400.pinmux 6,146,588818,-;PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: 6,147,588831,-; No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] 6,148,588864,-; IO 0x20003000..0x20012fff -> 0x00000000 6,149,588885,-; MEM 0x20013000..0x2fffffff -> 0x20013000 3,150,618747,-;dra7-pcie 51000000.pcie_rc: link is not up SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,151,618915,-;dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 SUBSYSTEM=platform DEVICE=+platform:51000000.pcie_rc 6,152,618928,-;pci_bus 0000:00: root bus resource [bus 00-ff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,153,618939,-;pci_bus 0000:00: root bus resource [io 0x0000-0xffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 6,154,618949,-;pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] SUBSYSTEM=pci_bus DEVICE=+pci_bus:0000:00 7,155,618986,-;pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,156,619029,-;pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,157,619051,-;pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,158,619122,-;pci 0000:00:00.0: supports D1 SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,159,619131,-;pci 0000:00:00.0: PME# supported from D0 D1 D3hot SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,160,619358,-;PCI: bus0: Fast back to back transfers disabled 6,161,619484,-;PCI: bus1: Fast back to back transfers enabled 6,162,619568,-;pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,163,619582,-;pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,164,619595,-;pci 0000:00:00.0: PCI bridge to [bus 01] SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 6,165,619816,-;pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt SUBSYSTEM=pci DEVICE=+pci:0000:00:00.0 7,166,619829,-;pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie01 7,167,619946,-;aer 0000:00:00.0:pcie02: service driver aer loaded SUBSYSTEM=pci_express DEVICE=+pci_express:0000:00:00.0:pcie02 6,168,680217,-;Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled 6,169,683577,-;4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 269, base_baud = 3000000) is a 8250 6,170,1688513,-;console [ttyS0] enabled 6,171,1692915,-;4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 270, base_baud = 3000000) is a 8250 6,172,1702614,-;48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 271, base_baud = 3000000) is a 8250 6,173,1712678,-;[drm] Initialized drm 1.1.0 20060810 6,174,1718239,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,175,1724884,-;[drm] No driver support for vblank timestamp query. 6,176,1731049,-;[drm] Initialized vdrm 1.0.0 20110917 on minor 0 6,177,1738245,-;OMAP DSS rev 6.1 6,178,1741982,-;omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) SUBSYSTEM=platform DEVICE=+platform:58000000.dss 6,179,1757752,-;loop: module loaded 6,180,1761294,-;vmemexp device MAJOR num = 245 6,181,1765422,-;vmemexp class registered 6,182,1769160,-;/dev/vmemexp device registered 6,183,1773273,-;ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 4,184,1778985,-;nand: No NAND device found 3,185,1782756,-;omap2-nand 8000000.nand: scan failed, may be bus-width mismatch SUBSYSTEM=platform DEVICE=+platform:8000000.nand 6,186,1792697,-;m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) SUBSYSTEM=spi DEVICE=+spi:spi32766.0 5,187,1798114,-;7 ofpart partitions found on MTD device spi32766.0 5,188,1803973,-;Creating 7 MTD partitions on "spi32766.0": 5,189,1809151,-;0x000000000000-0x000000040000 : "QSPI.SPL" 5,190,1815279,-;0x000000040000-0x000000140000 : "QSPI.u-boot" 5,191,1821652,-;0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" 5,192,1828598,-;0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" 5,193,1835262,-;0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" 5,194,1842651,-;0x0000001e0000-0x0000009e0000 : "QSPI.kernel" 5,195,1848989,-;0x0000009e0000-0x000002000000 : "QSPI.file-system" 6,196,1856752,-;libphy: Fixed MDIO Bus: probed 6,197,1863615,-;cpsw 48484000.ethernet: Detected MACID = d4:36:39:2a:80:b4 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,198,1870292,-;cpsw 48484000.ethernet: cpts: overflow check period 800 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,199,1877277,-;cpsw 48484000.ethernet: cpsw: Detected MACID = d4:36:39:2a:80:b5 SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,200,1885931,-;mousedev: PS/2 mouse device common for all mice 6,201,1892204,-;i2c /dev entries driver 3,202,1901560,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 3,203,1907988,-;omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode SUBSYSTEM=platform DEVICE=+platform:480b4000.mmc 6,204,1914519,-;evm_3v3_sw: supplied by sysen1 6,205,2087455,-;ledtrig-cpu: registered to indicate activity on CPUs 6,206,2097559,-;aic_dvdd: supplied by evm_3v3_sw 3,207,2103440,-;davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 SUBSYSTEM=platform DEVICE=+platform:4847c000.mcasp 6,208,2110918,-;NET: Registered protocol family 10 6,209,2126235,-;sit: IPv6 over IPv4 tunneling driver 6,210,2131440,-;NET: Registered protocol family 17 5,211,2136121,-;Key type dns_resolver registered 3,212,2140567,-;omap_voltage_late_init: Voltage driver support not added 6,213,2147458,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,214,2153665,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,215,2160385,-;Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm 6,216,2166593,-;Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm 6,217,2174751,-;Power Management for TI OMAP4+ devices. 5,218,2179817,-;Registering SWP/SWPB emulation handler 6,219,2185550,-;dmm 4e000000.dmm: workaround for errata i878 in use SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,220,2192723,-;dmm 4e000000.dmm: initialized all PAT entries SUBSYSTEM=platform DEVICE=+platform:4e000000.dmm 6,221,2200013,-;[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 6,222,2206666,-;[drm] No driver support for vblank timestamp query. 6,223,2212951,-;[drm] Initialized omapdrm 1.0.0 20110917 on minor 1 4,224,2239974,-;pcf857x: probe of 0-0020 failed with error -121 4,225,2245746,-;pcf857x: probe of 0-0021 failed with error -121 6,226,2296629,-;davinci_mdio 48485000.mdio: davinci mdio revision 1.6 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,227,2302747,-;davinci_mdio 48485000.mdio: detected phy mask ffffff7f SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,228,2320934,-;libphy: 48485000.mdio: probed 6,229,2324961,-;davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver Marvell 88E1111 SUBSYSTEM=platform DEVICE=+platform:48485000.mdio 6,230,2334151,-;omap_hsmmc 4809c000.mmc: Got CD GPIO SUBSYSTEM=platform DEVICE=+platform:4809c000.mmc 6,231,2378094,-;asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok SUBSYSTEM=platform DEVICE=+platform:sound0 6,232,2387628,-;hctosys: unable to open rtc device (rtc0) 6,233,2401155,-;evm_1v8: disabling 6,234,2404227,-;aic_dvdd: disabling 6,235,2408107,-;ldousb: disabling 6,236,2411485,-;ALSA device list: 6,237,2414463,-; #0: DRA7xx-EVM 6,238,2417992,-;Waiting for root device PARTUUID=d58b897b-02... 4,239,3053944,-;mmc2: host does not support reading read-only switch, assuming write-enable 6,240,3064018,-;mmc2: new high speed SDHC card at address 59b4 6,241,3079902,-;mmcblk0: mmc2:59b4 USD 7.51 GiB 6,242,3085261,-; mmcblk0: p1 p2 3,243,3187662,-;EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities 3,244,3196350,-;EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities 6,245,4090596,-;EXT4-fs (mmcblk0p2): recovery complete 6,246,4099765,-;EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) 6,247,4107965,-;VFS: Mounted root (ext4 filesystem) on device 179:2. 6,248,4117998,-;devtmpfs: mounted 6,249,4121193,-;Freeing unused kernel memory: 332K 4,250,4125656,-;This architecture does not have kernel memory protection. 30,251,4343065,-;systemd[1]: System time before build time, advancing clock. 5,252,4405920,-;random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 5,253,4418680,-;random: systemd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) 30,254,4436396,-;systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) 30,255,4455020,-;systemd[1]: Detected architecture arm. 30,256,4478024,-;systemd[1]: Set hostname to . 5,257,4547518,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,258,4557970,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,259,4561995,-;random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) 5,260,4597789,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) 5,261,4611910,-;random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) 5,262,4700169,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,263,4709721,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 5,264,4719871,-;random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) 28,265,5069279,-;systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start 28,266,5077112,-;systemd[1]: sysinit.target: Found dependency on alignment.service/start 28,267,5084810,-;systemd[1]: sysinit.target: Found dependency on basic.target/start 28,268,5092135,-;systemd[1]: sysinit.target: Found dependency on sysinit.target/start 28,269,5099601,-;systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start 27,270,5109056,-;systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start 30,271,5152168,-;systemd[1]: Created slice User and Session Slice. 30,272,5176971,-;systemd[1]: Listening on Journal Socket. 30,273,5206960,-;systemd[1]: Started Forward Password Requests to Wall Directory Watch. 30,274,5236888,-;systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. 30,275,5266847,-;systemd[1]: Listening on udev Kernel Socket. 30,276,5296838,-;systemd[1]: Listening on Syslog Socket. 30,277,5316843,-;systemd[1]: Listening on Journal Socket (/dev/log). 30,278,5346782,-;systemd[1]: Reached target Remote File Systems. 30,279,5376975,-;systemd[1]: Listening on Network Service Netlink Socket. 30,280,5406873,-;systemd[1]: Listening on udev Control Socket. 30,281,5436940,-;systemd[1]: Started Dispatch Password Requests to Console Directory Watch. 30,282,5466789,-;systemd[1]: Reached target Paths. 30,283,5487389,-;systemd[1]: Created slice System Slice. 30,284,5556956,-;systemd[1]: Starting Load Kernel Modules... 30,285,5579165,-;systemd[1]: Starting Setup Virtual Console... 30,286,5599027,-;systemd[1]: Starting Journal Service... 30,287,5632389,-;systemd[1]: Mounting Temporary Directory... 30,288,5667839,-;systemd[1]: Created slice system-serial\x5cx2dgetty.slice. 30,289,5736829,-;systemd[1]: Mounting POSIX Message Queue File System... 30,290,5766909,-;systemd[1]: Reached target Slices. 30,291,5787510,-;systemd[1]: Created slice system-getty.slice. 30,292,5806803,-;systemd[1]: Reached target Swap. 30,293,5856780,-;systemd[1]: Mounting Debug File System... 30,294,5879050,-;systemd[1]: Starting Remount Root and Kernel File Systems... 6,295,5895284,-;EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) 30,296,5909423,-;systemd[1]: Starting Create list of required static device nodes for the current kernel... 30,297,5981964,-;systemd[1]: Mounted POSIX Message Queue File System. 30,298,6006915,-;systemd[1]: Mounted Debug File System. 30,299,6026863,-;systemd[1]: Mounted Temporary Directory. 30,300,6047052,-;systemd[1]: Started Journal Service. 46,301,6701112,-;systemd-journald[118]: Received request to flush runtime journal from PID 1 6,302,7117261,-;omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 SUBSYSTEM=platform DEVICE=+platform:55020000.ipu 6,303,7128286,-; remoteproc0: 55020000.ipu is available 6,304,7133187,-; remoteproc0: Note: remoteproc is still under development and considered experimental. 6,305,7142375,-; remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,306,7153176,-;omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 SUBSYSTEM=platform DEVICE=+platform:40800000.dsp 6,307,7162745,-; remoteproc1: 40800000.dsp is available 6,308,7167794,-; remoteproc1: Note: remoteproc is still under development and considered experimental. 6,309,7177362,-; remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,310,7194340,-;omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 SUBSYSTEM=platform DEVICE=+platform:41000000.dsp 6,311,7207167,-; remoteproc2: 41000000.dsp is available 6,312,7212068,-; remoteproc2: Note: remoteproc is still under development and considered experimental. 6,313,7237002,-; remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. 6,314,7499789,-;omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 SUBSYSTEM=platform DEVICE=+platform:480a5000.des 7,315,7517654,-;rtc rtc0: 48838000.rtc: dev (254:0) SUBSYSTEM=rtc DEVICE=c254:0 6,316,7517677,-;omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 SUBSYSTEM=platform DEVICE=+platform:48838000.rtc 6,317,7585011,-;omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 SUBSYSTEM=platform DEVICE=+platform:48090000.rng 5,318,7998185,-;SCSI subsystem initialized 6,319,8160779,-; remoteproc1: registered virtio0 (type 7) 7,320,8294766,-;libata version 3.00 loaded. 6,321,8301062,-; remoteproc2: registered virtio1 (type 7) 6,322,8383850,-;omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b500000.aes 6,323,8398160,-;omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 SUBSYSTEM=platform DEVICE=+platform:4b700000.aes 6,324,8706294,-;ahci 4a140000.sata: SSS flag set, parallel bus scan disabled SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,325,8713078,-;ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,326,8722934,-;ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst SUBSYSTEM=platform DEVICE=+platform:4a140000.sata 6,327,8743841,-;scsi host0: ahci SUBSYSTEM=scsi DEVICE=+scsi:host0 6,328,8748079,-;ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 310 6,329,8769897,-;omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 SUBSYSTEM=platform DEVICE=+platform:4b101000.sham 6,330,8874810,-;CAN device driver interface 6,331,8902603,-; remoteproc0: registered virtio2 (type 7) 6,332,8995749,-;[drm] Initialized pvr 1.14.3699939 20110701 on minor 2 6,333,9048498,-;c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=326) SUBSYSTEM=platform DEVICE=+platform:4ae3c000.can 6,334,9106696,-;ata1: SATA link down (SStatus 0 SControl 300) 4,335,9634422,-;FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. 6,336,9761453,-;net eth1: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n3 6,337,9783225,-;net eth0: initialized cpsw ale version 1.4 SUBSYSTEM=net DEVICE=n2 6,338,9802457,-;net eth0: ALE Table size 1024 SUBSYSTEM=net DEVICE=n2 3,339,9812504,-;libphy: PHY 48485000.mdio:03 not found 3,340,9821037,-;net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 SUBSYSTEM=net DEVICE=n3 6,341,9866919,-;PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] 6,342,9873915,-;IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready 6,343,9918405,-;net eth0: initializing cpsw version 1.15 (0) SUBSYSTEM=net DEVICE=n2 6,344,10034685,-;net eth0: phy found : id is : 0x1410cc2 SUBSYSTEM=net DEVICE=n2 6,345,10061756,-;IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready 6,346,10073557,-; remoteproc1: powering up 40800000.dsp 6,347,10107705,-; remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6969075 4,348,10130294,-;omap_hwmod: mmu0_dsp1: _wait_target_disable failed 6,349,10136178,-;omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d01000.mmu 6,350,10142115,-;omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:40d02000.mmu 6,351,10186318,-; remoteproc1: remote processor 40800000.dsp is now up 6,352,10207880,-;virtio_rpmsg_bus virtio0: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,353,10222461,-; remoteproc2: powering up 41000000.dsp 6,354,10247964,-; remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6969075 4,355,10269585,-;omap_hwmod: mmu0_dsp2: _wait_target_disable failed 6,356,10275469,-;omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41501000.mmu 6,357,10281407,-;omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 SUBSYSTEM=platform DEVICE=+platform:41502000.mmu 6,358,10304947,-; remoteproc2: remote processor 41000000.dsp is now up 6,359,10312199,-;virtio_rpmsg_bus virtio1: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,360,10320298,-; remoteproc0: powering up 55020000.ipu 6,361,10334945,-; remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9441556 6,362,10341955,-;omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 SUBSYSTEM=platform DEVICE=+platform:55082000.mmu 6,363,10373024,-; remoteproc0: remote processor 55020000.ipu is now up 6,364,10383194,-;virtio_rpmsg_bus virtio2: rpmsg host is online SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,365,10626713,-;virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio2 6,366,10634731,-;virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio0 6,367,10649316,-;virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 SUBSYSTEM=virtio DEVICE=+virtio:virtio1 6,368,10668545,-;NET: Registered protocol family 41 6,369,11251107,-;DMA: Module install successful, device major num = 242 6,370,11257491,-;DRV: Module install successful 6,371,11299787,-;CMEMK module: reference Linux version 4.4.84 6,372,11305809,-;cmemk initialized 6,373,14034213,-;cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx SUBSYSTEM=platform DEVICE=+platform:48484000.ethernet 6,374,14042136,-;IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready 3,375,16631928,-;omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 3,376,16640141,-;omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) SUBSYSTEM=platform DEVICE=+platform:44000000.ocp 5,377,23182389,-;random: nonblocking pool is initialized 1,378,316639356,-;Unable to handle kernel NULL pointer dereference at virtual address 00000000 1,379,316647579,-;pgd = ed354000 1,380,316650338,-;[00000000] *pgd=b6f52831 0,381,316653985,-;Internal error: Oops: 17 [#1] PREEMPT SMP ARM 4,382,316659405,-;Modules linked in: cmemk(O) memcache(O) rpmsg_proto virtio_rpmsg_bus bc_example(O) extcon_usb_gpio c_can_platform pvrsrvkm(O) c_can can_dev omap_sham ahci_platform libahci_platform libahci dwc3_omap omap_aes_driver extcon libata scsi_mod omap_rng rng_core rtc_omap omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel 4,383,316690085,-;CPU: 1 PID: 1014 Comm: cat Tainted: G O 4.4.84-00027-g018eb62-dirty #2 4,384,316698818,-;Hardware name: Generic DRA74X (Flattened Device Tree) 4,385,316704937,-;task: d8748600 ti: eebca000 task.ti: eebca000 4,386,316710362,-;PC is at __copy_to_user_std+0x4c/0x3c4 4,387,316715174,-;LR is at read_kmem+0x220/0x27c 4,388,316719284,-;pc : [] lr : [] psr: 20070013\x0asp : eebcbe7c ip : 00000000 fp : eebcbedc 4,389,316730806,-;r10: eebca000 r9 : 00000000 r8 : 00000000 4,390,316736050,-;r7 : bee56ab0 r6 : 00001000 r5 : 00001000 r4 : 00001000 4,391,316742602,-;r3 : 00000000 r2 : 00000f80 r1 : 00000000 r0 : bee56ab0 4,392,316749154,-;Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user 4,393,316756315,-;Control: 10c5387d Table: ad35406a DAC: 00000055 0,394,316762085,-;Process cat (pid: 1014, stack limit = 0xeebca210) 0,395,316767853,-;Stack: (0xeebcbe7c to 0xeebcc000) 0,396,316772225,-;be60: 00001000 0,397,316780437,-;be80: 00001000 bee56ab0 00000000 bee56ab0 00001000 00000000 00001000 c03762e4 0,398,316788652,-;bea0: eebcbf30 eebcbf80 00000051 00000000 eebcbf0c ee7d4000 eebcbf80 c03760c4 0,399,316796862,-;bec0: 00001000 00001000 eebca000 00000000 eebcbf4c eebcbee0 c011ff64 c03760d0 0,400,316805073,-;bee0: 00000000 00000000 ee7d4000 ee7d4000 01000000 00000000 ee6ce480 ee6ce480 0,401,316813284,-;bf00: eebcbf64 eebcbf10 c0120eb4 c014b8f8 01000000 00000000 00000020 ef0ca4c0 0,402,316821494,-;bf20: 00000000 00000000 bee56ab0 ee7d4000 eebcbf80 00001000 c000fe24 eebca000 0,403,316829707,-;bf40: eebcbf7c eebcbf50 c01207a4 c011ff3c eebca000 01000000 ee7d4000 ee7d4000 0,404,316837917,-;bf60: bee56ab0 00001000 c000fe24 eebca000 eebcbfa4 eebcbf80 c0121090 c0120730 0,405,316846130,-;bf80: 00000000 00000000 000bc9b8 00001000 bee56ab0 00000003 00000000 eebcbfa8 0,406,316854341,-;bfa0: c000fc60 c0121050 000bc9b8 00001000 00000003 bee56ab0 00001000 ffffffff 0,407,316862552,-;bfc0: 000bc9b8 00001000 bee56ab0 00000003 00000001 00000000 00000001 ffffffff 0,408,316870764,-;bfe0: 00000000 bee56a8c 0001b644 b6ee84d6 40070030 00000003 00000000 00000000 4,409,316878972,-;Backtrace: 4,410,316881437,-;[] (read_kmem) from [] (__vfs_read+0x34/0xdc) 4,411,316888598,-; r10:00000000 r9:eebca000 r8:00001000 r7:00001000 r6:c03760c4 r5:eebcbf80 4,412,316896495,-; r4:ee7d4000 4,413,316899042,-;[] (__vfs_read) from [] (vfs_read+0x80/0x10c) 4,414,316906203,-; r9:eebca000 r8:c000fe24 r7:00001000 r6:eebcbf80 r5:ee7d4000 r4:bee56ab0 4,415,316914023,-;[] (vfs_read) from [] (SyS_read+0x4c/0xa8) 4,416,316920922,-; r9:eebca000 r8:c000fe24 r7:00001000 r6:bee56ab0 r5:ee7d4000 r4:ee7d4000 4,417,316928748,-;[] (SyS_read) from [] (ret_fast_syscall+0x0/0x3c) 4,418,316936259,-; r7:00000003 r6:bee56ab0 r5:00001000 r4:000bc9b8 0,419,316941967,-;Code: ba000002 f5d1f03c f5d1f05c f5d1f07c (e8b151f8) 4,420,316962048,-;---[ end trace 6707ca74033234c4 ]--- 4,421,399824300,-;------------[ cut here ]------------ 4,422,399838279,-;WARNING: CPU: 1 PID: 1032 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() 4,423,399851868,-;492 pages are still in use! 4,424,399855820,-;Modules linked in: cmemk(O) memcache(O) rpmsg_proto virtio_rpmsg_bus bc_example(O) extcon_usb_gpio c_can_platform pvrsrvkm(O) c_can can_dev omap_sham ahci_platform libahci_platform libahci dwc3_omap omap_aes_driver extcon libata scsi_mod omap_rng rng_core rtc_omap omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel 4,425,399891918,-;CPU: 0 PID: 1032 Comm: BirdViewReborn Tainted: G D O 4.4.84-00027-g018eb62-dirty #2 4,426,399901612,-;Hardware name: Generic DRA74X (Flattened Device Tree) 4,427,399907731,-;Backtrace: 4,428,399910207,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,429,399917806,-; r7:c00daf84 r6:600d0013 r5:00000000 r4:c0953590 4,430,399923529,-;[] (show_stack) from [] (dump_stack+0x8c/0xa0) 4,431,399930784,-;[] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) 4,432,399938904,-; r7:c00daf84 r6:00001aab r5:00000009 r4:ed277bc8 4,433,399944620,-;[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) 4,434,399953353,-; r8:c09b27c0 r7:c09395d0 r6:000b97ec r5:000001ec r4:c0829e60 4,435,399960119,-;[] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) 4,436,399968587,-; r3:000001ec r2:c0829e60 4,437,399972194,-; r4:000b97ec 4,438,399974747,-;[] (free_contig_range) from [] (cma_release+0x90/0xb0) 4,439,399982693,-; r9:ef6a0000 r8:ef25fc10 r7:00000001 r6:efeb1800 r5:c09b37a8 r4:000b9600 4,440,399990517,-;[] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) 4,441,399999337,-; r5:00811800 r4:001ec000 4,442,400002940,-;[] (dma_release_from_contiguous) from [] (__arm_dma_free+0xec/0x1c4) 4,443,400012110,-;[] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) 4,444,400019882,-; r10:00000001 r9:c001cf34 r8:b9600000 r7:efeb1800 r6:001ec000 r5:ef25fc10 4,445,400027780,-; r4:ee72a480 4,446,400030337,-;[] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) 4,447,400038551,-;[] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) 4,448,400047194,-; r9:c039069c r8:ee72a780 r7:00000001 r6:ee813000 r5:ee72a480 r4:ee813000 4,449,400055017,-;[] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) 4,450,400065929,-; r5:ee813034 r4:ee72a480 4,451,400069538,-;[] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) 4,452,400081235,-; r5:ee72a780 r4:ee72a480 4,453,400084839,-;[] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) 4,454,400093920,-; r7:00000001 r6:000000ff r5:ed277d28 r4:00000000 4,455,400099632,-;[] (idr_for_each) from [] (drm_gem_release+0x24/0x30) 4,456,400107490,-; r10:ee72a7fc r9:ee813034 r8:ee8130f8 r7:ee8130f4 r6:ee72a800 r5:ee813000 4,457,400115397,-; r4:ee72a7a0 4,458,400117944,-;[] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) 4,459,400125890,-; r5:ee813000 r4:ee72a780 4,460,400129497,-;[] (drm_release) from [] (__fput+0x88/0x1d0) 4,461,400136574,-; r10:ee72ae48 r9:00000008 r8:eec435d8 r7:eeb4c810 r6:00000000 r5:ee9b2f78 4,462,400144468,-; r4:ee72ae40 4,463,400147013,-;[] (__fput) from [] (____fput+0x10/0x14) 4,464,400153738,-; r10:ffffe000 r9:ed276000 r8:ee767c38 r7:d874ec00 r6:ee794cc0 r5:c09867a8 4,465,400161640,-; r4:d874f060 4,466,400164188,-;[] (____fput) from [] (task_work_run+0x98/0xcc) 4,467,400171529,-;[] (task_work_run) from [] (do_exit+0x300/0x9b8) 4,468,400178953,-; r7:ed277e40 r6:00000002 r5:d874f078 r4:d874ec00 4,469,400184664,-;[] (do_exit) from [] (do_group_exit+0x48/0xc4) 4,470,400191912,-; r7:ed277edc 4,471,400194468,-;[] (do_group_exit) from [] (get_signal+0x22c/0x5b0) 4,472,400202152,-; r7:ed277edc r6:00418004 r5:ed276000 r4:08430000 4,473,400207866,-;[] (get_signal) from [] (do_signal+0x35c/0x414) 4,474,400215202,-; r10:00000000 r9:ed276000 r8:fffffdfc r7:b6f03ca6 r6:ed277ec8 r5:b6f03ca4 4,475,400223101,-; r4:ed277fb0 4,476,400225649,-;[] (do_signal) from [] (do_work_pending+0xa8/0xc0) 4,477,400233248,-; r10:00000000 r9:ed276000 r8:c000fe24 r7:000000f0 r6:ed277fb0 r5:c000fe24 4,478,400241153,-; r4:ed276000 4,479,400243705,-;[] (do_work_pending) from [] (slow_work_pending+0xc/0x20) 4,480,400251913,-; r7:000000f0 r6:00000080 r5:b6f2b000 r4:b3e66e40 4,481,400276089,-;---[ end trace 6707ca74033234c5 ]--- 4,482,400285687,-;------------[ cut here ]------------ 4,483,400296199,-;WARNING: CPU: 0 PID: 1032 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() 4,484,400314325,-;492 pages are still in use! 4,485,400322317,-;Modules linked in: cmemk(O) memcache(O) rpmsg_proto virtio_rpmsg_bus bc_example(O) extcon_usb_gpio c_can_platform pvrsrvkm(O) c_can can_dev omap_sham ahci_platform libahci_platform libahci dwc3_omap omap_aes_driver extcon libata scsi_mod omap_rng rng_core rtc_omap omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel 4,486,400362113,-;CPU: 0 PID: 1032 Comm: BirdViewReborn Tainted: G D W O 4.4.84-00027-g018eb62-dirty #2 4,487,400371806,-;Hardware name: Generic DRA74X (Flattened Device Tree) 4,488,400377921,-;Backtrace: 4,489,400380397,-;[] (dump_backtrace) from [] (show_stack+0x18/0x1c) 4,490,400387994,-; r7:c00daf84 r6:600f0013 r5:00000000 r4:c0953590 4,491,400393707,-;[] (show_stack) from [] (dump_stack+0x8c/0xa0) 4,492,400400961,-;[] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) 4,493,400409083,-; r7:c00daf84 r6:00001aab r5:00000009 r4:ed277bc8 4,494,400414792,-;[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) 4,495,400423523,-; r8:c09b27c0 r7:c09395d0 r6:000b99ec r5:000001ec r4:c0829e60 4,496,400430294,-;[] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) 4,497,400438763,-; r3:000001ec r2:c0829e60 4,498,400442367,-; r4:000b99ec 4,499,400444922,-;[] (free_contig_range) from [] (cma_release+0x90/0xb0) 4,500,400452868,-; r9:ef6a0000 r8:ef25fc10 r7:00000001 r6:efeb6000 r5:c09b37a8 r4:000b9800 4,501,400460682,-;[] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) 4,502,400469500,-; r5:00816000 r4:001ec000 4,503,400473103,-;[] (dma_release_from_contiguous) from [] (__arm_dma_free+0xec/0x1c4) 4,504,400482273,-;[] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) 4,505,400490045,-; r10:00000002 r9:c001cf34 r8:b9800000 r7:efeb6000 r6:001ec000 r5:ef25fc10 4,506,400497939,-; r4:ee72ab40 4,507,400500491,-;[] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) 4,508,400508705,-;[] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) 4,509,400517351,-; r9:c039069c r8:ee72a780 r7:00000001 r6:ee813000 r5:ee72ab40 r4:ee813000 4,510,400525169,-;[] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) 4,511,400536082,-; r5:ee813034 r4:ee72ab40 4,512,400539684,-;[] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) 4,513,400551380,-; r5:ee72a780 r4:ee72ab40 4,514,400554986,-;[] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) 4,515,400564066,-; r7:00000001 r6:000000ff r5:ed277d28 r4:00000000 4,516,400569784,-;[] (idr_for_each) from [] (drm_gem_release+0x24/0x30) 4,517,400577645,-; r10:ee72a7fc r9:ee813034 r8:ee8130f8 r7:ee8130f4 r6:ee72a800 r5:ee813000 4,518,400585543,-; r4:ee72a7a0 4,519,400588093,-;[] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) 4,520,400596039,-; r5:ee813000 r4:ee72a780 4,521,400599641,-;[] (drm_release) from [] (__fput+0x88/0x1d0) 4,522,400606716,-; r10:ee72ae48 r9:00000008 r8:eec435d8 r7:eeb4c810 r6:00000000 r5:ee9b2f78 4,523,400614623,-; r4:ee72ae40 4,524,400617169,-;[] (__fput) from [] (____fput+0x10/0x14) 4,525,400623894,-; r10:ffffe000 r9:ed276000 r8:ee767c38 r7:d874ec00 r6:ee794cc0 r5:c09867a8 4,526,400631794,-; r4:d874f060 4,527,400634344,-;[] (____fput) from [] (task_work_run+0x98/0xcc) 4,528,400641682,-;[] (task_work_run) from [] (do_exit+0x300/0x9b8) 4,529,400649105,-; r7:ed277e40 r6:00000002 r5:d874f078 r4:d874ec00 4,530,400654825,-;[] (do_exit) from [] (do_group_exit+0x48/0xc4) 4,531,400662073,-; r7:ed277edc 4,532,400664621,-;[] (do_group_exit) from [] (get_signal+0x22c/0x5b0) 4,533,400672306,-; r7:ed277edc r6:00418004 r5:ed276000 r4:08430000 4,534,400678017,-;[] (get_signal) from [] (do_signal+0x35c/0x414) 4,535,400685352,-; r10:00000000 r9:ed276000 r8:fffffdfc r7:b6f03ca6 r6:ed277ec8 r5:b6f03ca4 4,536,400693258,-; r4:ed277fb0 4,537,400695812,-;[] (do_signal) from [] (do_work_pending+0xa8/0xc0) 4,538,400703409,-; r10:00000000 r9:ed276000 r8:c000fe24 r7:000000f0 r6:ed277fb0 r5:c000fe24 4,539,400711311,-; r4:ed276000 4,540,400713861,-;[] (do_work_pending) from [] (slow_work_pending+0xc/0x20) 4,541,400722069,-; r7:000000f0 r6:00000080 r5:b6f2b000 r4:b3e66e40 4,542,400752257,-;---[ end trace 6707ca74033234c6 ]--- + +Marko, I have seen this warnings before I remember. Give me 4-5 days and I will look at this and come back to you. I need to reproduce this on my setup. - Subhajit + +Marko, I am still trying to reproduce this on my setup. I will need more time to get back on this. + +Marko, I could not reproduce this issue on our setup. Can you migrate to Processor SDK Vision 3.06 (which has some fixes related to virtual DRM) and see if the issue is fixed automatically? - Subhajit + +Marco, did you move to vision SDK 3.06? Did it resolve your issue? + +It seems that migration to Processor SDK Vision 3.06 fixed the problem. VDRM is more stable. Thank you very much for your help Subhajit! + diff --git a/data2/text/range/30001+/752066.txt b/data2/text/range/30001+/752066.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce4dc610969974e362e19e7a066163ebf3daf877 --- /dev/null +++ b/data2/text/range/30001+/752066.txt @@ -0,0 +1,891 @@ +Ticket Name: Linux/TDA2P-ABZ: TDA2P-ABZ: + +Query Text: +Part Number: TDA2P-ABZ Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello TI team, we have a customer working on a high speed data transfer between a TDA2PEVM and PC using PCIe. A third party has has managed to develop a single lane implementation and this seems to be quite stable. Our customer tried to replicate the same demonstration using a very similar motherboard however for some reason the PC is not enumerating correctly with the TDA2P SOC and the PCIe root complex on the PC motherboard is not mapping the memory correctly. We need some support so that we can understand why they see a failure here, is this a software diver issue on the SOC or is this a hardware issue with the PCie . The ultimate goal is to support 2 x PCIe lanes via One Stop Systems passive PCIe extender cards although this has yet to be evaluated due to the enumeration issue that the customer is experiencing. PC motherboard is running Ubuntu Linux TDA2P SOC EVM running Linux Steve + +Responses: +Hello TI team, we have a custom TDA2p board with two PCIe lanes. The TDA2p board is connected to PC running Ubuntu Linux and the ultimate goal is to transfer video data over PCIe in both directions (TDA2p -> PC, PC->TDA2p). The TDA2p board is connected to the PC with a custom PCIe cable as suggested by TI EP User Guide: http://processors.wiki.ti.com/index.php/Linux_Core_PCIe_EP_User%27s_Guide To enable the TDA2p to operate in EP mode and to receive PCIe reference clock from PCIe connector we had to apply a patch suggested by following forum thread: https://e2e.ti.com/support/processors/f/791/t/688574#pi320627=2 We also added the following patch to TDA2p side which handles unaligned memory access: https://e2e.ti.com/support/processors/f/791/p/750967/2774735#2774735 On PC side we have Ubuntu 18.04 LTS with custom built kernel (4.16.7) where we enabled PCI Endpoint Test driver. On TDA2p we also enabled the PCI Endpoint Test driver. To test the PCIe communication we use pcitest tool which is provided with Linux kernel source. Our PC has a ASUS B250M-C PRO motherboard. So far we have two issues: 1. The PCIe enumeration on PC side is not always working as expected, 2. When we run the pcitest tool the TDA2p board becomes unresponsive and the pcitest tool on PC side also. Regarding issue 1, after we first time power up the PC and the TDA2p board and enumerate the PCIe bus on PC with following command: echo 1 > /sys/bus/pci/rescan the TDA2p EP is enumerated and we can confirm this with lspci command: lspci -s 4:00.0 -vv +04:00.0 Unassigned class [ff00]: Texas Instruments Device b500 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- (32-bit, prefetchable) + Capabilities: [40] Power Management version 3 + Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [50] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee01004 Data: 4021 + Capabilities: [70] Express (v2) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- + LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us + ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+ + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled + LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- + Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- + Compliance De-emphasis: -6dB + LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- + EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- + Capabilities: [100 v2] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr+ BadTLP- BadDLLP+ Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- + Kernel driver in use: pci-endpoint-test + Kernel modules: pci_endpoint_test + however, when we do a devmem2 read on the BAR addresses we only get 0xFFFFFFFF which means that we can not write to those memory locations devmem2 0xc8404600 +/dev/mem opened. +Memory mapped at address 0x7fe1d480b000. +Value at address 0xC8404600 (0x7fe1d480b600): 0xFFFFFFFF + So far we can partially fix this issue when we remove the parent PCI bridge device on which the TDA2p is registered, in our case we have the following topology: lspci +00:00.0 Host bridge: Intel Corporation Intel Kaby Lake Host Bridge (rev 05) +00:02.0 VGA compatible controller: Intel Corporation HD Graphics 630 (rev 04) +00:14.0 USB controller: Intel Corporation 200 Series PCH USB 3.0 xHCI Controller +00:16.0 Communication controller: Intel Corporation 200 Series PCH CSME HECI #1 +00:17.0 SATA controller: Intel Corporation 200 Series PCH SATA controller [AHCI mode] +00:1c.0 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #5 (rev f0) +00:1c.5 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #6 (rev f0) +00:1d.0 PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #9 (rev f0) +00:1f.0 ISA bridge: Intel Corporation 200 Series PCH LPC Controller (B250) +00:1f.2 Memory controller: Intel Corporation 200 Series PCH PMC +00:1f.3 Audio device: Intel Corporation 200 Series PCH HD Audio +00:1f.4 SMBus: Intel Corporation 200 Series PCH SMBus Controller +00:1f.6 Ethernet controller: Intel Corporation Ethernet Connection (2) I219-V +02:00.0 PCI bridge: ASMedia Technology Inc. ASM1083/1085 PCIe to PCI Bridge (rev 04) +04:00.0 Unassigned class [ff00]: Texas Instruments Device b500 + lspci -tvv +-[0000:00]-+-00.0 Intel Corporation Intel Kaby Lake Host Bridge + +-02.0 Intel Corporation HD Graphics 630 + +-14.0 Intel Corporation 200 Series PCH USB 3.0 xHCI Controller + +-16.0 Intel Corporation 200 Series PCH CSME HECI #1 + +-17.0 Intel Corporation 200 Series PCH SATA controller [AHCI mode] + +-1c.0-[01]-- + +-1c.5-[02-03]----00.0-[03]-- + +-1d.0-[04]----00.0 Texas Instruments Device b500 + +-1f.0 Intel Corporation 200 Series PCH LPC Controller (B250) + +-1f.2 Intel Corporation 200 Series PCH PMC + +-1f.3 Intel Corporation 200 Series PCH HD Audio + +-1f.4 Intel Corporation 200 Series PCH SMBus Controller + \-1f.6 Intel Corporation Ethernet Connection (2) I219-V + From the above output we can see that the TDA2p is beneath 00:1d.0 PCI Bridge device. Now when we remove the 00:1d.0 device with following command: echo 1 > /sys/bus/pci/devices/0000\:00\:1d.0/remove and rescan the bus with: echo 1 > /sys/bus/pci/rescan the TDA2p is enumerated and now we can write to the BAR locations and when we devmem2 read the BAR location we get: devmem2 0xc8404600 +/dev/mem opened. +Memory mapped at address 0x7f0af73ca000. +Value at address 0xC8404600 (0x7f0af73ca600): 0x0 + From this point we can run the pcitest tool. Also, when we now remove the TDA2p device from the PCI device tree and enumerate the bus again the BAR locations are writable - we don't have to remove the parent bridge device. Regarding issue 2, when we finish the procedure described under issue 1, we run the pcitest command and after few invocations the pcitest application freezes on PC and the TDA2p board becomes unresponsive (we need to reboot the board to use it again) on serial console on TDA2p we also get the following error message before the board freezes: [ 134.853511] omap_l3_noc 44000000.ocp: L3 application error: target 5 mod:1 (unclearable) +[ 134.861682] omap_l3_noc 44000000.ocp: L3 debug error: target 5 mod:1 (unclearable) Sometimes when we run the pcitest tool we get the above error message but the board remains usable and after few more pcitest invocations the board freezes. Do you have any ideas or suggestions how to fix this issues? Best regards, Gordan + +Hi Gordan, Sorry about the delayed response here. Few questions: 1. I recollect the same setup was running on a ASUS mother-board (around Mid July/Sep). Is there a change in the setup running the PCIe-RC stack? 2. Does the enumeration issue still occur when you set the EP to run in Gen-2 mode ( I assume you're running in Gen-3 currently). 3. When is the L3 error observed? Is it during bar access or when you read/write data? If its the latter, what's the bandwidth of data being moved? Regards Shravan + +Hello Shravan, Here are the answers to your questions: 1.Yes there was a similar setup running around Mid July/Sep. Back then we used only one PCIe lane (PCIe GEN2) and we tested everything on ASUS B250M-C PRO motherboard - with this setup the enumeration bug was not observed. But when our customer tried to test our code with a slightly different motherboard (ASUS PRIME B250M-C) he encountered those enumeration problems described in my previous post. We also observed that on the customers motherboard the PCIe was only GEN1 (on our motherboard we where able to use PCIe GEN2). Our current setup is that we have a TDA2p as PCIe EP and the connection to PC is over two lane PCIe cable. 2. Yes the enumeration problem is present also in PCIe GEN2 mode. Currently, our motherboard is configured in BIOS to automatically switch between PCIe GEN1, GEN2 and GEN3. The TDA2p board is now connected to our PC (ASUS B250M-C PRO motherboard) with two-lane PCIe cable and the PCIe connection between them is on GEN2. 3. The L3 error is observed when we read/write data over PCIe. For now we use the generic pcitest application shipped with the Linux kernel source to test the PCIe data transfer. There is no pattern when the L3 error occurs, sometime it occurs after we transfer few KB, sometimes after few MB. We use following pcitest command invocations (not necessarily in this order): pcitest -r -s 1 +pcitest -r -s 1024 +pcitest -r -s 1025 +pcitest -r -s 1024000 +pcitest -r -s 1024001 + +pcitest -w -s 1 +pcitest -w -s 1024 +pcitest -w -s 1025 +pcitest -w -s 1024000 +pcitest -w -s 1024001 + +pcitest -c -s 1 +pcitest -c -s 1024 +pcitest -c -s 1025 +pcitest -c -s 1024000 +pcitest -c -s 1024001 + Best regards, Gordan + +Hello Shravan, would you be able to give me a quick call re progress here? I will ping you an email with my details etc. Steve D (TI) + +Hi Gordon, Thanks for the reply. Is the enumeration and subsequent L3-error observed only when you configure the device to use two lanes or the issue is observed even when you configure it to run using 1 lane (my understanding is the earlier discussions only one lane was configured). While I expect the result to be the same, can you also try to write to other bar regions? Also which bar is mapped to 0xc8404600? Regards Shravan + +Hi Shravan, you are correct - in earlier discussion we had only one lane configured. Back then when we configured one lane we also noticed the L3 error, but the error was not showing up after we configured the TDA2p to receive the PCIe reference clock from host PC. The following post describes the issues we had earlier: https://e2e.ti.com/support/processors/f/791/t/688574#pi320627=2 Back then, we tested everything on ASUS B250M-C PRO motherboard and first it looked like the enumeration worked correct. But when our customer tested our code on a slightly different motherboard ASUS PRIME B250M-C the enumeration problem showed up, later the enumeration problem showed also on our motherboard. Currently, we have the enumeration issue both in one lane configuration and two lane configuration. After we shortened the PCIe cable that connects the TDA2p and PC, the L3 error is not appearing anymore. Is it possible that the L3 error is introduced by signal interference on PCIe cable? The other bar regions are also not writable when the enumeration issue happens. For testing the PCIe communication we use the pci_endpoint_test driver found in ti_components/os_tools/linux/kernel/omap/drivers/misc. BAR0 is mapped to 0xc8404600. Best regards, Gordan + +Hi Gordan, Sorry about the delay here. I am discussing internally with the team here, and will update this thread with next steps in the next 1-2 days. Regards Shravan + +Hi Gordan, Below are some comments/observations and next steps: Issue-1: The PC will enumerate the PCIe bus soon after it powers-up, and it will timeout enumeration of TDA2 if TDA2 has not started Link Training within a certain amount of time. One way to avoid this, would be powering up the EVM before the PC. Can you confirm that the TDA2 device is enumerated always when the EVM is powered on before the PC? Also, can you confirm if the changes discussed in the below thread are implemented? e2e.ti.com/.../2593664 If the TDA2 EVM is powered on after the PC, I would recommend keeping the approach of removing the parent bridge and re-scanning the bus. Issue-2: The fact that a shorter cable prevents the hang-up indicates a signal integrity issue. Is your final system going to use a cable? Signal integrity should be much better with PCB-only routing. Regards Shravan + +Hi Shravan, we tried your suggestions and here are the results: Issue-1: when we first power up the EVM and then the PC, the BAR locations are writable. The EVM is always enumerated correctly with this approach. However, there is one issue, with this approach (power up EVM fist, then PC) the EVM is always enumerated as PCI Gen1 device. Do you have any suggestions on how to fix this new issue? We need the EVM to operate as PCI Gen2 device. On the other side, when we remove the parent bridge device and then rescan the PCI bus, the EVM is recognized as PCI Gen2 device. The parent bridge device removal and rescaning is not practical - for us it is more acceptable to first power up the EVM and then the PC. Issue-2: in our final product, the TDA2p will be connected to the PC over PCIe redriver cable. For the development phase we use ordinary PCIe X4 short cable and for now there are no new issues regarding this configuration. Regards, Gordan + +Hi Gordan, The reason the link is in Gen-1 mode, is that the link training of the link may be enabled before the clocks are stable. Thus link training at higher gen speeds may fail. This is the only explanation considering the link is in Gen-2 when the bus is re-scanned. One hack could be to try would be to add a delay after link request reset is set in drivers/pci/controller/pci-dra7xx.c. This could provide sufficient time for the clocks to become stable. Regards Shravan + +Hi Shravan, can you point out where exactly to put the mentioned delay (e.g., function name)? Looking at pci-dra7xx.c we see that there is only a irq handler where the link reset is observed. Should we put the delay into this irq handler? What do you think how long the delay should be? Regards, Gordan + +Hi Gordan, I was looking at the code (drivers/pci/controller/pci-dra7xx.c), and I notice that the reset interrupt is sent to the driver, there's little control on the link training / negotiation on the driver. To confirm can you please add the below snippet to your driver? diff --git a/drivers/pci/controller/pci-dra7xx.c b/drivers/pci/controller/pci-dra7xx.c index 330866f..cd12959 100644 --- a/drivers/pci/controller/pci-dra7xx.c +++ b/drivers/pci/controller/pci-dra7xx.c @@ -151,7 +151,14 @@ static int dra7xx_pcie_start_link(struct dw_pcie *pci) dev_err(pci->dev, "link is already up\n"); return -EBUSY; } - + dw_pcie_read(pci->dbi_base + exp_cap_off + PCI_EXP_LNKCAP, + 4, ®); + if ((reg & PCI_EXP_LNKCAP_SLS) == PCI_EXP_LNKCAP_SLS_2_5GB) { + printk("Link capability is gen-1"); + } + if ((reg & PCI_EXP_LNKCAP_SLS) != PCI_EXP_LNKCAP_SLS_2_5GB) { + printk("Link capability is gen-2"); + } if (dra7xx->is_gen1) { dw_pcie_read(pci->dbi_base + exp_cap_off + PCI_EXP_LNKCAP, 4, ®); This would help indicate if the link capability is set to Gen-1 from the EP side (it shouldn't). Can you also post the lspci -vv output in gen-1 and gen-2 scenario. Also when you say, "On the other side, when we remove the parent bridge device and then rescan the PCI bus, the EVM is recognized as PCI Gen2 device." Is this as part of the same boot? What I mean is, when you boot the PC (assuming TDA2p board is up and endpoint function setup), does this enumerate as Gen-1, but when you rescan and remove bridge its gen-2? This is surprsing as when we rescan the bus, the link training doesn't happen (atleast it doesn't on our platform, not sure what's the operation on x86 though). The link stop (from EP), happens only when the end-point function driver is stopped (which doesn't happen on rescan from EP). So I would assume the link speed should be the same and shouldn't change. Regards Shravan + +Hi Gordan, Any updates here? Regards Shravan + +Hi Shravan, sorry for the delay, this is a busy week for me. Based on the output from your code snippet, the EP is always GEN2. I have attached the dmesg output from TDA2p and lspci from PC in the text files bellow. "On the other side, when we remove the parent bridge device and then rescan the PCI bus, the EVM is recognized as PCI Gen2 device." This is not part of the same boot - for this to work I have to first powerup the PC (wait until I login to my Linux) then I powerup the TDA2p, do a PCI rescan with echo 1 > /sys/bus/pci/rescan after this step the TDA2p is recognized as GEN2 however the BAR addresses are not writable. Then I remove the parent bridge of TDA2p on my motherboard it is PCI bridge: Intel Corporation 200 Series PCH PCI Express Root Port #9 (rev f0), do the PCI rescan again and from this point I have writable BAR addresses and GEN2. When I first powerup the TDA2p and then the PC, the TDA2p is always enumerated as GEN1. I tried to remove the parent bridge, in this scenario, and rescan the PCI bus, but only GEN1 is shown in lspci on PC side. Regards, Gordan dmesg_tda2p.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (root@rtrkw850-lin) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #24 SMP PREEMPT Wed Feb 6 14:03:18 CET 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA762 EVM +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 244992 +[ 0.000000] free_area_init_node: node 0, pgdat c09d1640, node_mem_map ef69a000 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 180224 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA762 ES1.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62c000 s14912 r8192 d21952 u45056 +[ 0.000000] pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=af29c687-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 328512K/979968K available (6799K kernel code, 374K rwdata, 2564K rodata, 344K init, 290K bss, 446656K reserved, 204800K cma-reserved, 234496K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) + lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc092d02c (9365 kB) + .init : 0xc092e000 - 0xc0984000 ( 344 kB) + .data : 0xc0984000 - 0xc09e1b00 ( 375 kB) + .bss : 0xc09e3000 - 0xc0a2b880 ( 291 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000336] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000344] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000783] Console: colour dummy device 80x30 +[ 0.000805] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000818] pid_max: default: 32768 minimum: 301 +[ 0.000915] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000925] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001457] Initializing cgroup subsys io +[ 0.001475] Initializing cgroup subsys memory +[ 0.001498] Initializing cgroup subsys devices +[ 0.001510] Initializing cgroup subsys freezer +[ 0.001521] Initializing cgroup subsys perf_event +[ 0.001532] Initializing cgroup subsys pids +[ 0.001558] CPU: Testing write buffer coherency: ok +[ 0.001751] /cpus/cpu@0 missing clock-frequency property +[ 0.001767] /cpus/cpu@1 missing clock-frequency property +[ 0.001777] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001817] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080048] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080118] Brought up 2 CPUs +[ 0.080131] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080138] CPU: All CPU(s) started in HYP mode. +[ 0.080143] CPU: Virtualization extensions available. +[ 0.080519] devtmpfs: initialized +[ 0.107895] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.108832] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.212292] omap_hwmod: mcan: cannot clk_get main_clk mcan_clk +[ 0.212307] omap_hwmod: mcan: cannot _init_clocks +[ 0.212313] ------------[ cut here ]------------ +[ 0.212328] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2529 _init.constprop.25+0x488/0x51c() +[ 0.212334] omap_hwmod: mcan: couldn't init clocks +[ 0.212340] Modules linked in: +[ 0.212354] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84 #24 +[ 0.212361] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 0.212367] Backtrace: +[ 0.212386] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 0.212393] r7:c093b768 r6:60000013 r5:00000000 r4:c09a38d0 +[ 0.212419] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 0.212432] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 0.212438] r7:c093b768 r6:000009e1 r5:00000009 r4:ef06be58 +[ 0.212459] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 0.212465] r8:00000000 r7:00000000 r6:ffffffea r5:ffffffea r4:c0853134 +[ 0.212490] [] (warn_slowpath_fmt) from [] (_init.constprop.25+0x488/0x51c) +[ 0.212496] r3:c0855524 r2:c0853134 +[ 0.212507] r4:c09901a8 +[ 0.212520] [] (_init.constprop.25) from [] (__omap_hwmod_setup_all+0x48/0x98) +[ 0.212526] r10:00000000 r9:c092e614 r8:000000ac r7:ef1dfb40 r6:c09896f0 r5:c098bb78 +[ 0.212547] r4:c09901a8 +[ 0.212559] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0xc4/0x208) +[ 0.212565] r5:c093b91c r4:c09896f0 +[ 0.212582] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) +[ 0.212587] r10:00000002 r9:c092e614 r8:000000ac r7:c0970820 r6:c097e450 r5:c09e3000 +[ 0.212608] r4:c09e3000 +[ 0.212624] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) +[ 0.212629] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c06a4e28 +[ 0.212650] r4:c09e3000 +[ 0.212662] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 0.212668] r5:c06a4e28 r4:00000000 +[ 0.212690] ---[ end trace 0503dadbba25aaa5 ]--- +[ 0.309436] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.309455] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.313985] pinctrl core: initialized pinctrl subsystem +[ 0.314076] device class 'regulator': registering +[ 0.314835] NET: Registered protocol family 16 +[ 0.315766] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.315798] device class 'bdi': registering +[ 0.315858] device class 'gpio': registering +[ 0.315930] device class 'pci_bus': registering +[ 0.315999] device class 'backlight': registering +[ 0.316024] device class 'tty': registering +[ 0.316047] device class 'vtconsole': registering +[ 0.316143] device class 'iommu': registering +[ 0.316288] device class 'spi_master': registering +[ 0.340226] cpuidle: using governor ladder +[ 0.370252] cpuidle: using governor menu +[ 0.378637] OMAP GPIO hardware version 0.1 +[ 0.385011] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.407796] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.407806] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.408260] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.408270] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.408834] OMAP DMA hardware revision 0.0 +[ 0.408916] device class 'dma': registering +[ 0.440822] device class 'block': registering +[ 0.441847] device class 'pwm': registering +[ 0.441899] device class 'graphics': registering +[ 0.451260] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452389] edma 43300000.edma: memcpy is disabled +[ 0.457029] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.460149] device class 'misc': registering +[ 0.461690] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461864] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462035] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462191] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462460] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462641] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.464256] device class 'mdio_bus': registering +[ 0.464590] device class 'input': registering +[ 0.464626] device class 'rtc': registering +[ 0.465646] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481167] palmas 0-0058: Muxing GPIO 51, PWM 0, LED 2 +[ 0.531697] irq: no irq domain found for /ocp/i2c@48070000/tps65917@58 ! +[ 0.532242] pcf857x: probe of 0-0020 failed with error -121 +[ 0.532500] pcf857x: probe of 0-0021 failed with error -121 +[ 0.532725] pcf857x: probe of 0-0026 failed with error -121 +[ 0.532882] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.533274] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.533460] media: Linux media interface: v0.10 +[ 0.533510] Linux video capture interface: v2.00 +[ 0.533519] device class 'video4linux': registering +[ 0.533543] device class 'pps': registering +[ 0.533562] pps_core: LinuxPPS API ver. 1 registered +[ 0.533569] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.533579] device class 'ptp': registering +[ 0.533597] PTP clock support registered +[ 0.533609] device class 'power_supply': registering +[ 0.533631] device class 'hwmon': registering +[ 0.533657] EDAC MC: Ver: 3.0.0 +[ 0.533926] device class 'mmc_host': registering +[ 0.533989] device class 'leds': registering +[ 0.534017] device class 'mbox': registering +[ 0.534406] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.534693] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.534958] device class 'tee': registering +[ 0.534986] device class 'sound': registering +[ 0.535039] Advanced Linux Sound Architecture Driver Initialized. +[ 0.535074] device class 'net': registering +[ 0.535526] device class 'rfkill': registering +[ 0.535700] device class 'watchdog': registering +[ 0.535874] clocksource: Switched to clocksource arch_sys_counter +[ 0.536485] device class 'mem': registering +[ 0.537737] device class 'vc': registering +[ 0.545314] device class 'thermal': registering +[ 0.546337] NET: Registered protocol family 2 +[ 0.546837] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.546900] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.547024] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.547068] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.547099] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.547301] NET: Registered protocol family 1 +[ 0.547559] RPC: Registered named UNIX socket transport module. +[ 0.547568] RPC: Registered udp transport module. +[ 0.547574] RPC: Registered tcp transport module. +[ 0.547580] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.547596] PCI: CLS 0 bytes, default 64 +[ 0.548559] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.549633] ------------[ cut here ]------------ +[ 0.549650] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2108 _enable+0x2f0/0x30c() +[ 0.549657] omap_hwmod: timer12: enabled state can only be entered from initialized, idle, or disabled state +[ 0.549664] Modules linked in: +[ 0.549677] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.4.84 #24 +[ 0.549684] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 0.549691] Backtrace: +[ 0.549713] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 0.549720] r7:c0026430 r6:20000093 r5:00000000 r4:c09a38d0 +[ 0.549746] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 0.549758] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 0.549765] r7:c0026430 r6:0000083c r5:00000009 r4:ef06bc38 +[ 0.549786] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 0.549792] r8:00000004 r7:c00281ac r6:a0000093 r5:c0991038 r4:c0852ba8 +[ 0.549817] [] (warn_slowpath_fmt) from [] (_enable+0x2f0/0x30c) +[ 0.549823] r3:c0855730 r2:c0852ba8 +[ 0.549833] r4:c0990fd8 +[ 0.549844] [] (_enable) from [] (omap_hwmod_enable+0x2c/0x4c) +[ 0.549850] r7:c00281ac r6:a0000093 r5:c0991038 r4:c0990fd8 +[ 0.549873] [] (omap_hwmod_enable) from [] (omap_device_enable+0x48/0x98) +[ 0.549878] r7:c00281ac r6:ef23ae40 r5:00000000 r4:00000001 +[ 0.549900] [] (omap_device_enable) from [] (_od_runtime_resume+0x18/0x2c) +[ 0.549905] r7:c00281ac r6:c00281ac r5:ef237e74 r4:ef237e10 +[ 0.549928] [] (_od_runtime_resume) from [] (__rpm_callback+0x34/0x68) +[ 0.549934] r5:ef237e74 r4:ef237e10 +[ 0.549948] [] (__rpm_callback) from [] (rpm_callback+0x28/0x88) +[ 0.549954] r7:c00281ac r6:ef200c10 r5:ef237e10 r4:ef237e10 +[ 0.549974] [] (rpm_callback) from [] (rpm_resume+0x374/0x56c) +[ 0.549980] r7:c00281ac r6:ef200c10 r5:c0986100 r4:ef237e10 +[ 0.550001] [] (rpm_resume) from [] (__pm_runtime_resume+0x54/0x6c) +[ 0.550006] r10:00000000 r9:ef235b00 r8:00000000 r7:60000013 r6:00000004 r5:ef237e74 +[ 0.550027] r4:ef237e10 +[ 0.550042] [] (__pm_runtime_resume) from [] (omap_dm_timer_probe+0x20c/0x420) +[ 0.550048] r7:c06ae8c0 r6:ef237e10 r5:ef237e00 r4:ef3b70d0 +[ 0.550070] [] (omap_dm_timer_probe) from [] (platform_drv_probe+0x54/0xb8) +[ 0.550076] r9:00000000 r8:c0995d5c r7:fffffdfb r6:c0995d5c r5:ef237e10 r4:c0a1e7dc +[ 0.550100] [] (platform_drv_probe) from [] (driver_probe_device+0x230/0x474) +[ 0.550106] r7:00000000 r6:c09da8d0 r5:ef237e10 r4:c0a1e7dc +[ 0.550126] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 0.550131] r9:c092e614 r8:00000000 r7:c09da7f8 r6:ef237e44 r5:c0995d5c r4:ef237e10 +[ 0.550158] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) +[ 0.550163] r7:c09da7f8 r6:c03fb4e8 r5:c0995d5c r4:00000000 +[ 0.550186] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 0.550192] r6:c09b4718 r5:ef375880 r4:c0995d5c +[ 0.550212] [] (driver_attach) from [] (bus_add_driver+0x1dc/0x274) +[ 0.550222] [] (bus_add_driver) from [] (driver_register+0x80/0x100) +[ 0.550228] r8:000000ac r7:ef36fbc0 r6:c09896f0 r5:c093ebd4 r4:c0995d5c +[ 0.550252] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) +[ 0.550258] r5:c093ebd4 r4:c09b4718 +[ 0.550274] [] (__platform_driver_register) from [] (omap_dm_timer_driver_init+0x18/0x20) +[ 0.550279] r5:c093ebd4 r4:c09896f0 +[ 0.550296] [] (omap_dm_timer_driver_init) from [] (do_one_initcall+0xc4/0x208) +[ 0.550307] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) +[ 0.550312] r10:00000007 r9:c092e614 r8:000000ac r7:c0970834 r6:c097e79c r5:c09e3000 +[ 0.550332] r4:c09e3000 +[ 0.550346] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) +[ 0.550352] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c06a4e28 +[ 0.550372] r4:c09e3000 +[ 0.550385] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 0.550390] r5:c06a4e28 r4:00000000 +[ 0.550401] ---[ end trace 0503dadbba25aaa6 ]--- +[ 0.550412] omap_timer 4ae20000.timer: omap_dm_timer_probe: pm_runtime_get_sync failed! +[ 0.550432] omap_timer: probe of 4ae20000.timer failed with error -22 +[ 0.559269] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.559922] NFS: Registering the id_resolver key type +[ 0.559948] Key type id_resolver registered +[ 0.559956] Key type id_legacy registered +[ 0.560027] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.561294] bounce: pool size: 64 pages +[ 0.561420] device class 'bsg': registering +[ 0.561444] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.561457] io scheduler noop registered +[ 0.561468] io scheduler deadline registered +[ 0.561499] io scheduler cfq registered (default) +[ 0.563281] device class 'phy': registering +[ 0.563836] vsys_5v0: supplied by vsys_12v0 +[ 0.563883] ldo3: supplied by vsys_5v0 +[ 0.567538] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.569919] device class 'pci_epc': registering +[ 32.344242] INFO: rcu_preempt self-detected stall on CPU +[ 32.344260] 0-...: (1 ticks this GP) idle=5fb/140000000000001/0 softirq=12/12 fqs=0 +[ 32.344267] (t=3049 jiffies g=-291 c=-292 q=11) +[ 32.344282] rcu_preempt kthread starved for 3049 jiffies! g4294967005 c4294967004 f0x0 s3 ->state=0x1 +[ 32.344290] Task dump for CPU 0: +[ 32.344297] swapper/0 R running 0 1 0 0x00000000 +[ 32.344311] Backtrace: +[ 32.344330] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 32.344337] r7:c098653c r6:80000193 r5:00000000 r4:ef078000 +[ 32.344367] [] (show_stack) from [] (sched_show_task+0xbc/0x110) +[ 32.344380] [] (sched_show_task) from [] (dump_cpu_task+0x40/0x48) +[ 32.344386] r5:c0998d40 r4:00000000 +[ 32.344407] [] (dump_cpu_task) from [] (rcu_dump_cpu_stacks+0x94/0xd0) +[ 32.344413] r5:c0998d40 r4:00000001 +[ 32.344430] [] (rcu_dump_cpu_stacks) from [] (rcu_check_callbacks+0x51c/0x92c) +[ 32.344436] r9:ef62f700 r8:c0998d40 r7:ef06ba80 r6:c0986100 r5:2ecad000 r4:c0982700 +[ 32.344463] [] (rcu_check_callbacks) from [] (update_process_times+0x44/0x6c) +[ 32.344469] r10:c00a48a0 r9:00000001 r8:ef62cc4c r7:00000007 r6:00000000 r5:ef078000 +[ 32.344490] r4:ffffe000 +[ 32.344505] [] (update_process_times) from [] (tick_sched_handle+0x50/0x54) +[ 32.344511] r7:00000007 r6:878449a3 r5:ef06bca0 r4:ef62ce50 +[ 32.344534] [] (tick_sched_handle) from [] (tick_sched_timer+0x50/0x94) +[ 32.344546] [] (tick_sched_timer) from [] (__hrtimer_run_queues+0x11c/0x1ac) +[ 32.344552] r7:00000000 r6:ef62cc40 r5:ef62ce50 r4:ef62cc00 +[ 32.344574] [] (__hrtimer_run_queues) from [] (hrtimer_interrupt+0xac/0x1f8) +[ 32.344580] r10:ef62cc78 r9:ef62ccb8 r8:ef62cc98 r7:ef62cc14 r6:ffffffff r5:00000003 +[ 32.344601] r4:ef62cc00 +[ 32.344615] [] (hrtimer_interrupt) from [] (arch_timer_handler_phys+0x38/0x40) +[ 32.344622] r10:00000000 r9:ee87b418 r8:00000012 r7:ef0431c0 r6:c09a3a48 r5:ef006d80 +[ 32.344642] r4:ef631c40 +[ 32.344654] [] (arch_timer_handler_phys) from [] (handle_percpu_devid_irq+0x74/0x8c) +[ 32.344666] [] (handle_percpu_devid_irq) from [] (generic_handle_irq+0x2c/0x3c) +[ 32.344672] r9:ee87b418 r8:ef008000 r7:00000000 r6:00000000 r5:00000012 r4:c0980424 +[ 32.344699] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) +[ 32.344710] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) +[ 32.344716] r9:ee87b418 r8:fa213000 r7:fa212000 r6:ef06bca0 r5:fa21200c r4:c09868ec +[ 32.344740] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) +[ 32.344747] Exception stack(0xef06bca0 to 0xef06bce8) +[ 32.344756] bca0: 00000000 60000013 00000000 f1888000 ef210e10 00000000 ee87b290 ef210e00 +[ 32.344766] bcc0: ef3c1a00 ee87b418 00000000 ef06bdac ef06bcd0 ef06bcf0 c0405260 c0951cfc +[ 32.344772] bce0: 60000013 ffffffff +[ 32.344778] r9:ee87b418 r8:ef3c1a00 r7:ef06bcd4 r6:ffffffff r5:60000013 r4:c0951cfc +[ 32.344806] [] (dra7xx_pcie_probe) from [] (platform_drv_probe+0x54/0xb8) +[ 32.344812] r10:00000000 r9:00000000 r8:c09a5f44 r7:fffffdfb r6:c09a5f44 r5:ef210e10 +[ 32.344833] r4:c0a1e7dc +[ 32.344845] [] (platform_drv_probe) from [] (driver_probe_device+0x230/0x474) +[ 32.344850] r7:00000000 r6:c09da8d0 r5:ef210e10 r4:c0a1e7dc +[ 32.344871] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 32.344876] r9:c092e614 r8:00000000 r7:c09da7f8 r6:ef210e44 r5:c09a5f44 r4:ef210e10 +[ 32.344903] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) +[ 32.344908] r7:c09da7f8 r6:c03fb4e8 r5:c09a5f44 r4:00000000 +[ 32.344932] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 32.344938] r6:c09b4718 r5:ee87d400 r4:c09a5f44 +[ 32.344958] [] (driver_attach) from [] (bus_add_driver+0x1dc/0x274) +[ 32.344969] [] (bus_add_driver) from [] (driver_register+0x80/0x100) +[ 32.344975] r8:000000ac r7:ee87b240 r6:c09a5f44 r5:c09b4718 r4:c09a5f44 +[ 32.344999] [] (driver_register) from [] (__platform_driver_probe+0x70/0x11c) +[ 32.345005] r5:c09b4718 r4:c09a5f30 +[ 32.345020] [] (__platform_driver_probe) from [] (dra7xx_pcie_driver_init+0x24/0x28) +[ 32.345026] r7:ee87b240 r6:c09896f0 r5:c0951920 r4:c09896f0 +[ 32.345048] [] (dra7xx_pcie_driver_init) from [] (do_one_initcall+0xc4/0x208) +[ 32.345059] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x268) +[ 32.345064] r10:00000007 r9:c092e614 r8:000000ac r7:c0970834 r6:c097e914 r5:c09e3000 +[ 32.345085] r4:c09e3000 +[ 32.345098] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf4) +[ 32.345104] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c06a4e28 +[ 32.345124] r4:c09e3000 +[ 32.345137] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) +[ 32.345143] r5:c06a4e28 r4:00000000 +[ 32.345154] Task dump for CPU 1: +[ 32.345160] ksoftirqd/1 R running 0 12 2 0x00000000 +[ 32.345173] Backtrace: +[ 32.345184] [] (0xef0a7f0c) from [] (0xef0a7f24) +[ 32.345211] omap_l3_noc 44000000.ocp: L3 application error: target 5 mod:1 (unclearable) +[ 32.345228] omap_l3_noc 44000000.ocp: L3 debug error: target 5 mod:1 (unclearable) +[ 32.404754] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 32.408047] console [ttyS0] disabled +[ 32.408095] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 300, base_baud = 3000000) is a 8250 +[ 33.449846] console [ttyS0] enabled +[ 33.454224] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 301, base_baud = 3000000) is a 8250 +[ 33.463908] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 +[ 33.473885] device class 'drm': registering +[ 33.473924] [drm] Initialized drm 1.1.0 20060810 +[ 33.479659] vsys_3v3: supplied by vsys_12v0 +[ 33.483899] ldo5: supplied by vsys_3v3 +[ 33.488309] OMAP DSS rev 6.1 +[ 33.492053] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 33.502456] device class 'devcoredump': registering +[ 33.567847] loop: module loaded +[ 33.573806] vmemexp device MAJOR num = 246 +[ 33.577945] device class 'vmemexp': registering +[ 33.577967] vmemexp class registered +[ 33.581679] /dev/vmemexp device registered +[ 33.585793] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 33.590973] device class 'mtd': registering +[ 33.594026] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 33.599445] 7 ofpart partitions found on MTD device spi32766.0 +[ 33.605303] Creating 7 MTD partitions on "spi32766.0": +[ 33.610498] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 33.626668] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 33.643035] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 33.650003] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 33.656670] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 33.664017] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 33.670352] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 33.678070] libphy: Fixed MDIO Bus: probed +[ 33.725907] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 33.732032] libphy: 48485000.mdio: probed +[ 33.739168] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 +[ 33.748149] cpsw 48484000.ethernet: Detected MACID = 0c:ae:7d:0f:ee:a6 +[ 33.754796] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 33.761793] cpsw 48484000.ethernet: cpsw: Detected MACID = 0c:ae:7d:0f:ee:a7 +[ 33.769465] device class 'uio': registering +[ 33.770471] mousedev: PS/2 mouse device common for all mice +[ 33.776703] i2c /dev entries driver +[ 33.780216] device class 'i2c-dev': registering +[ 33.785116] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 33.789976] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode +[ 33.796493] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode +[ 33.802876] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode +[ 33.809274] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode +[ 33.815656] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode +[ 33.822227] vio_3v3: supplied by vsys_3v3 +[ 33.826315] vio_3v3_sd: supplied by vio_3v3 +[ 33.830656] ldo4: supplied by vsys_5v0 +[ 33.876287] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 33.882672] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 33.906040] smps5: supplied by vsys_3v3 +[ 33.910097] vio_1v8: supplied by smps5 +[ 33.956741] ledtrig-cpu: registered to indicate activity on CPUs +[ 33.965148] aic_dvdd: supplied by vio_3v3 +[ 33.971769] NET: Registered protocol family 10 +[ 33.987097] sit: IPv6 over IPv4 tunneling driver +[ 33.992275] NET: Registered protocol family 17 +[ 33.996993] Key type dns_resolver registered +[ 34.001394] omap_voltage_late_init: Voltage driver support not added +[ 34.008325] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 34.014534] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 34.020828] buck10: supplied by vsys_3v3 +[ 34.025411] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 34.031641] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 34.038963] Power Management for TI OMAP4+ devices. +[ 34.044070] Registering SWP/SWPB emulation handler +[ 34.051500] dmm 4e000000.dmm: initialized all PAT entries +[ 34.059460] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 34.066121] [drm] No driver support for vblank timestamp query. +[ 34.072543] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 34.073108] mmc0: host does not support reading read-only switch, assuming write-enable +[ 34.075102] mmc0: new high speed SDHC card at address 59b4 +[ 34.085606] mmcblk0: mmc0:59b4 USD 7.51 GiB +[ 34.096586] mmcblk0: p1 p2 +[ 34.121476] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 34.141285] device class 'ubi': registering +[ 34.141795] hctosys: unable to open rtc device (rtc0) +[ 34.158699] aic_dvdd: disabling +[ 34.162117] ALSA device list: +[ 34.165097] #0: DRA7xx-EVM +[ 34.169741] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 34.178417] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 36.534563] EXT4-fs (mmcblk0p2): recovery complete +[ 36.574358] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 36.582534] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 36.589552] devtmpfs: mounted +[ 36.592765] Freeing unused kernel memory: 344K +[ 36.597248] This architecture does not have kernel memory protection. +[ 36.800913] systemd[1]: System time before build time, advancing clock. +[ 36.845438] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 36.858247] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 36.869946] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 36.888457] systemd[1]: Detected architecture arm. +[ 36.916836] systemd[1]: Set hostname to . +[ 36.984466] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 37.018322] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 37.028644] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 37.038774] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 37.066677] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 37.133255] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 37.142821] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 37.152801] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 37.517601] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 37.525392] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 37.533119] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 37.540606] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 37.550348] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ 37.578878] systemd[1]: Listening on udev Control Socket. +[ 37.606337] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 37.648598] systemd[1]: Created slice System Slice. +[ 37.676244] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 37.706772] systemd[1]: Created slice system-getty.slice. +[ 37.736088] systemd[1]: Reached target Swap. +[ 37.756176] systemd[1]: Listening on Syslog Socket. +[ 37.776906] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 37.806140] systemd[1]: Listening on udev Kernel Socket. +[ 37.836240] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 37.866184] systemd[1]: Listening on Journal Socket. +[ 37.926253] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 37.949691] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 37.958751] systemd[1]: Starting Setup Virtual Console... +[ 37.973810] systemd[1]: Mounting Temporary Directory... +[ 37.998736] systemd[1]: Mounting Debug File System... +[ 38.056305] systemd[1]: Starting Load Kernel Modules... +[ 38.086151] systemd[1]: Reached target Remote File Systems. +[ 38.116525] systemd[1]: Listening on Journal Socket (/dev/log). +[ 38.186318] systemd[1]: Starting Journal Service... +[ 38.218658] systemd[1]: Mounting POSIX Message Queue File System... +[ 38.247003] systemd[1]: Created slice User and Session Slice. +[ 38.276198] systemd[1]: Reached target Slices. +[ 38.296372] systemd[1]: Listening on Network Service Netlink Socket. +[ 38.326122] systemd[1]: Reached target Paths. +[ 38.376314] systemd[1]: Starting Create Static Device Nodes in /dev... +[ 38.413438] systemd[1]: Mounted POSIX Message Queue File System. +[ 38.436309] systemd[1]: Mounted Debug File System. +[ 38.446370] systemd[1]: Mounted Temporary Directory. +[ 38.476367] systemd[1]: Started Journal Service. +[ 39.545201] systemd-journald[136]: Received request to flush runtime journal from PID 1 +[ 39.913258] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 39.936199] remoteproc0: 55020000.ipu is available +[ 39.969396] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 40.027611] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 40.067329] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 40.091549] remoteproc1: 40800000.dsp is available +[ 40.120311] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 40.148040] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 40.171753] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 40.185639] remoteproc2: 41000000.dsp is available +[ 40.193437] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 40.227309] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 40.368171] ------------[ cut here ]------------ +[ 40.372826] WARNING: CPU: 1 PID: 245 at arch/arm/mach-omap2/omap_hwmod.c:2108 _enable+0x2f0/0x30c() +[ 40.381912] omap_hwmod: rng: enabled state can only be entered from initialized, idle, or disabled state +[ 40.381920] Modules linked in: omap_rng(+) rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[ 40.381960] CPU: 1 PID: 245 Comm: systemd-udevd Tainted: G W 4.4.84 #24 +[ 40.381968] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 40.381976] Backtrace: +[ 40.381994] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 40.382001] r7:c0026430 r6:20030193 r5:00000000 r4:c09a38d0 +[ 40.382029] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 40.382042] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 40.382048] r7:c0026430 r6:0000083c r5:00000009 r4:ee33fb28 +[ 40.382071] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 40.382078] r8:00000004 r7:c00281ac r6:a0030113 r5:c0990710 r4:c0852ba8 +[ 40.382103] [] (warn_slowpath_fmt) from [] (_enable+0x2f0/0x30c) +[ 40.382109] r3:c0851a8c r2:c0852ba8 +[ 40.382120] r4:c09906b0 +[ 40.382133] [] (_enable) from [] (omap_hwmod_enable+0x2c/0x4c) +[ 40.382139] r7:c00281ac r6:a0030113 r5:c0990710 r4:c09906b0 +[ 40.382162] [] (omap_hwmod_enable) from [] (omap_device_enable+0x48/0x98) +[ 40.382167] r7:c00281ac r6:ef25ab40 r5:00000000 r4:00000001 +[ 40.382189] [] (omap_device_enable) from [] (_od_runtime_resume+0x18/0x2c) +[ 40.382195] r7:c00281ac r6:c00281ac r5:ef257a74 r4:ef257a10 +[ 40.382218] [] (_od_runtime_resume) from [] (__rpm_callback+0x34/0x68) +[ 40.382224] r5:ef257a74 r4:ef257a10 +[ 40.382239] [] (__rpm_callback) from [] (rpm_callback+0x28/0x88) +[ 40.382245] r7:c00281ac r6:ef200c10 r5:ef257a10 r4:ef257a10 +[ 40.382267] [] (rpm_callback) from [] (rpm_resume+0x374/0x56c) +[ 40.382273] r7:c00281ac r6:ef200c10 r5:c0986100 r4:ef257a10 +[ 40.382294] [] (rpm_resume) from [] (__pm_runtime_resume+0x54/0x6c) +[ 40.382300] r10:00000000 r9:00000005 r8:ef257a00 r7:60030113 r6:00000004 r5:ef257a74 +[ 40.382321] r4:ef257a10 +[ 40.382340] [] (__pm_runtime_resume) from [] (omap_rng_probe+0x88/0x278 [omap_rng]) +[ 40.382346] r7:ee3f2650 r6:ef257a10 r5:ef257a10 r4:bf0bfaec +[ 40.382372] [] (omap_rng_probe [omap_rng]) from [] (platform_drv_probe+0x54/0xb8) +[ 40.382378] r8:bf0bfb50 r7:fffffdfb r6:bf0bfb50 r5:ef257a10 r4:c0a1e7dc +[ 40.382402] [] (platform_drv_probe) from [] (driver_probe_device+0x230/0x474) +[ 40.382408] r7:00000000 r6:c09da8d0 r5:ef257a10 r4:c0a1e7dc +[ 40.382428] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 40.382435] r9:ee35ffc8 r8:00000000 r7:c09da7f8 r6:ef257a44 r5:bf0bfb50 r4:ef257a10 +[ 40.382462] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) +[ 40.382468] r7:c09da7f8 r6:c03fb4e8 r5:bf0bfb50 r4:00000000 +[ 40.382492] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 40.382498] r6:c09b4718 r5:ee34bb00 r4:bf0bfb50 +[ 40.382518] [] (driver_attach) from [] (bus_add_driver+0x1dc/0x274) +[ 40.382530] [] (bus_add_driver) from [] (driver_register+0x80/0x100) +[ 40.382535] r8:11ca005c r7:ee3f2980 r6:c09896f0 r5:bf0c2000 r4:bf0bfb50 +[ 40.382559] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) +[ 40.382565] r5:bf0c2000 r4:c09b4718 +[ 40.382584] [] (__platform_driver_register) from [] (omap_rng_driver_init+0x1c/0x24 [omap_rng]) +[ 40.382590] r5:bf0c2000 r4:c09896f0 +[ 40.382609] [] (omap_rng_driver_init [omap_rng]) from [] (do_one_initcall+0xc4/0x208) +[ 40.382623] [] (do_one_initcall) from [] (do_init_module+0x68/0x378) +[ 40.382629] r10:bf0bfbc0 r9:ee35ffc8 r8:11ca005c r7:00000001 r6:ee3f2540 r5:00000001 +[ 40.382651] r4:bf0bfbc0 +[ 40.382665] [] (do_init_module) from [] (load_module+0x1d50/0x22bc) +[ 40.382671] r6:ee35ffc0 r5:00000001 r4:ee33ff44 +[ 40.382691] [] (load_module) from [] (SyS_finit_module+0x94/0xd0) +[ 40.382696] r10:00000000 r9:ee33e000 r8:c0010904 r7:0000017b r6:b6e3fd90 r5:0000000f +[ 40.382717] r4:00000000 +[ 40.382730] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x34) +[ 40.382736] r6:00000000 r5:00507928 r4:00000000 +[ 40.382751] ---[ end trace 0503dadbba25aaa8 ]--- +[ 40.410498] omap_rng 48090000.rng: Failed to runtime_get device: -22 +[ 40.421348] omap_rng 48090000.rng: initialization failed. +[ 40.427334] omap_rng: probe of 48090000.rng failed with error -22 +[ 40.474188] device class 'extcon': registering +[ 40.478973] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 41.012863] remoteproc1: registered virtio0 (type 7) +[ 41.242697] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 41.334748] CAN device driver interface +[ 41.409183] remoteproc0: registered virtio1 (type 7) +[ 41.524296] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 41.724937] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=348) +[ 41.797018] device class 'scsi_host': registering +[ 41.797118] device class 'scsi_device': registering +[ 41.797148] SCSI subsystem initialized +[ 41.899538] remoteproc2: registered virtio2 (type 7) +[ 41.988172] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 42.040715] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 42.046875] device class 'ata_link': registering +[ 42.046924] device class 'ata_port': registering +[ 42.046954] device class 'ata_device': registering +[ 42.046990] libata version 3.00 loaded. +[ 42.122835] ahci 4a140000.sata: forcing port_map 0x0 -> 0x1 +[ 42.137059] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 42.196872] ahci 4a140000.sata: flags: 64bit ncq sntf pm led clo only pmp pio slum part ccc apst +[ 42.287948] scsi host0: ahci +[ 42.292142] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 339 +[ 42.687130] ata1: SATA link down (SStatus 0 SControl 300) +[ 42.897233] net eth1: initializing cpsw version 1.15 (0) +[ 42.910431] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 42.929033] net eth0: initialized cpsw ale version 1.4 +[ 42.966499] net eth0: ALE Table size 1024 +[ 42.983668] libphy: PHY 48485000.mdio:03 not found +[ 42.990610] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 +[ 43.043856] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 43.093488] net eth0: initializing cpsw version 1.15 (0) +[ 43.242057] net eth0: phy found : id is : 0x2000a231 +[ 43.271159] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 43.430451] NET: Registered protocol family 15 +[ 43.502368] Bluetooth: Core ver 2.21 +[ 43.515231] device class 'bluetooth': registering +[ 43.515293] NET: Registered protocol family 31 +[ 43.529960] Bluetooth: HCI device and connection manager initialized +[ 43.541366] device class 'udc': registering +[ 43.561161] remoteproc1: powering up 40800000.dsp +[ 43.566517] Bluetooth: HCI socket layer initialized +[ 43.589457] Bluetooth: L2CAP socket layer initialized +[ 43.600617] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 5572323 +[ 43.608120] Bluetooth: SCO socket layer initialized +[ 43.628562] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 43.634464] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 43.640446] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 43.804341] Initializing XFRM netlink socket +[ 43.874491] remoteproc1: remote processor 40800000.dsp is now up +[ 43.898920] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 43.920705] remoteproc0: powering up 55020000.ipu +[ 43.980255] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9830692 +[ 44.001847] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 44.149036] remoteproc0: remote processor 55020000.ipu is now up +[ 44.178338] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 44.205438] remoteproc2: powering up 41000000.dsp +[ 44.239178] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 5572323 +[ 44.258050] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 44.263949] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 44.269927] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 44.373647] remoteproc2: remote processor 41000000.dsp is now up +[ 44.391352] usbcore: registered new interface driver usbfs +[ 44.403610] usbcore: registered new interface driver hub +[ 44.413810] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 44.416821] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 44.423284] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 44.433178] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 44.449396] usbcore: registered new device driver usb +[ 44.469602] random: nonblocking pool is initialized +[ 44.569323] NET: Registered protocol family 41 +[ 44.578601] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 44.584139] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[ 44.618565] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 44.642297] xhci-hcd xhci-hcd.2.auto: irq 424, io mem 0x488d0000 +[ 44.663277] hub 1-0:1.0: USB hub found +[ 44.673224] hub 1-0:1.0: 1 port detected +[ 44.685461] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 44.700430] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[ 44.719794] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 44.745373] hub 2-0:1.0: USB hub found +[ 44.755255] hub 2-0:1.0: 1 port detected +[ 45.843164] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 45.912328] device class 'bc_example': registering +[ 46.435547] dra7-pcie 51000000.pcie_ep: no free inbound window +[ 46.442245] pci_epf_test pci_epf_test.0: failed to set BAR4 +[ 46.449765] dra7-pcie 51000000.pcie_ep: no free inbound window +[ 46.455812] pci_epf_test pci_epf_test.0: failed to set BAR5 +[ 46.461561] Link capability is gen-2 + ls_pci_gen1.txt 04:00.0 Unassigned class [ff00]: Texas Instruments Device b500 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- (32-bit, prefetchable) + Capabilities: [40] Power Management version 3 + Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [50] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee08004 Data: 4022 + Capabilities: [70] Express (v2) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- + LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us + ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+ + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 2.5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled + LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- + Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- + Compliance De-emphasis: -6dB + LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1- + EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- + Capabilities: [100 v2] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- + Kernel driver in use: pci-endpoint-test + Kernel modules: pci_endpoint_test + + ls_pci_gen2.txt 04:00.0 Unassigned class [ff00]: Texas Instruments Device b500 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- (32-bit, prefetchable) + Capabilities: [40] Power Management version 3 + Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [50] MSI: Enable+ Count=1/16 Maskable- 64bit- + Address: fee01004 Data: 4021 + Capabilities: [70] Express (v2) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- + LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us + ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+ + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled + LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- + Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- + Compliance De-emphasis: -6dB + LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- + EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- + Capabilities: [100 v2] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr+ BadTLP- BadDLLP+ Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- + Kernel driver in use: pci-endpoint-test + Kernel modules: pci_endpoint_test + diff --git a/data2/text/range/30001+/753988.txt b/data2/text/range/30001+/753988.txt new file mode 100644 index 0000000000000000000000000000000000000000..2322bce8a257d513f3746f3dcf0ea1ca3093fd7e --- /dev/null +++ b/data2/text/range/30001+/753988.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: TDA2xx linux failed to boot from SD card + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752, CSD Tool/software: Linux Hi I have a TDA2xx board and followed the procedure of VisionSDK_LinuxUserGuide.pdf to install the filesystem.now the filesystem can execute the "make -j" command correctly, but when I use the shell .mksdboot.sh to generate a SD card(This step also shows no problem),But when I insert the SD card to boot the TDA2xx,It is not boot correctly and the log is as below: U-Boot SPL 2014.07-dirty (Dec 06 2018 - 09:39:12) DRA752-GP ES2.0 ti_i2c_eeprom_init failed 1 spl_mmc_load_image reading dra7-evm.dtb spl_load_image_fat_os: error reading image dra7-evm.dtb, err - -1 reading u-boot.img reading u-boot.img ti_i2c_eeprom_init failed 1 U-Boot 2014.07-dirty (Dec 06 2018 - 09:39:12) CPU : DRA752-GP ES2.0 Board: DRA74x EVM REV I2C: ready DRAM: 1 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Using default environment serial# not set, setting... SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). SCSI: Net: not set. Validating first E-fuse MAC cpsw Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading uEnv.txt 164 bytes read in 4 ms (40 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc0 ... 5082576 bytes read in 296 ms (16.4 MiB/s) 107679 bytes read in 55 ms (1.9 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x4d8dd0 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 reserving fdt memory region: addr=84000000 size=10000000 reserving fdt memory region: addr=a2000000 size=4000000 reserving fdt memory region: addr=a0000000 size=2000000 Loading Device Tree to 83fe2000, end 83fff49e ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 3.14.63 (kaosu@fille) (gcc version 4.7.3 20130226 (prerelease) (crosstool-NG linaro-1.13.1-4.7-2013.03-20130313 - Linaro GCC 2013.03) ) #1 SMP PREEMPT Sat Nov 5 00:41:20 CST 2016 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Reserved memory: created CMA memory pool at 0x94000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 64 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9d000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9f000000, size 16 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0xa8000000, size 32 MiB [ 0.000000] Reserved memory: initialized node cmem@A6000000, compatible id shared-dma-pool [ 0.000000] cma: CMA: reserved 24 MiB at ae000000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 8 pages/cpu @ed748000 s8640 r8192 d15936 u32768 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 252176 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=ef281dfe-02 rw rootwait ip=none mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 412784K/1014784K available (6743K kernel code, 692K rwdata, 2456K rodata, 376K init, 267K bss, 602000K reserved, 269312K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc09040d4 (9201 kB) [ 0.000000] .init : 0xc0905000 - 0xc09631c0 ( 377 kB) [ 0.000000] .data : 0xc0964000 - 0xc0a11120 ( 693 kB) [ 0.000000] .bss : 0xc0a1112c - 0xc0a53e54 ( 268 kB) [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns [ 0.000030] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000457] Architected cp15 timer(s) running at 6.14MHz (virt). [ 0.000462] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 2794592043008ns [ 0.000470] Switching to timer-based delay loop [ 0.001533] Console: colour dummy device 80x30 [ 0.001550] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.001557] This ensures that you still see kernel messages. Please [ 0.001563] update your kernel commandline. [ 0.001578] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.001590] pid_max: default: 32768 minimum: 301 [ 0.001703] Security Framework initialized [ 0.001754] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001766] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.026880] CPU: Testing write buffer coherency: ok [ 0.027123] /cpus/cpu@0 missing clock-frequency property [ 0.027161] /cpus/cpu@1 missing clock-frequency property [ 0.027173] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.027197] Setting up static identity map for 0x8069c0a8 - 0x8069c118 [ 0.080899] CPU1: Booted secondary processor [ 0.080929] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.081062] Brought up 2 CPUs [ 0.081078] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.081085] CPU: All CPU(s) started in SVC mode. [ 0.081500] devtmpfs: initialized [ 0.082121] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.083875] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.097808] omap_hwmod: tptc0 using broken dt data from edma-controller [ 0.098321] omap_hwmod: tptc1 using broken dt data from edma-controller [ 0.168630] omap_hwmod: vpe: no dt node [ 0.168638] ------------[ cut here ]------------ [ 0.168657] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2581 _init+0x41c/0x478() [ 0.168664] omap_hwmod: vpe: doesn't have mpu register target base [ 0.168670] Modules linked in: [ 0.168684] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.63 #1 [ 0.168691] Backtrace: [ 0.168714] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 0.168721] r6:60000013 r5:ffffffff r4:00000000 r3:00000000 [ 0.168750] [] (show_stack) from [] (dump_stack+0x80/0xa0) [ 0.168766] [] (dump_stack) from [] (warn_slowpath_common+0x70/0x94) [ 0.168773] r7:00000a15 r6:c0912d0c r5:00000009 r4:ec90de48 [ 0.168799] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 0.168805] r8:c09132e0 r7:00000003 r6:00000000 r5:00000000 r4:c09b0a00 [ 0.168834] [] (warn_slowpath_fmt) from [] (_init+0x41c/0x478) [ 0.168841] r3:c082b264 r2:c0823bb8 [ 0.168859] [] (_init) from [] (omap_hwmod_for_each+0x38/0x64) [ 0.168866] r10:c094a67c r8:c09132e0 r7:00000000 r6:c09128f0 r5:c0973820 r4:c09b0a00 [ 0.168896] [] (omap_hwmod_for_each) from [] (__omap_hwmod_setup_all+0x2c/0x48) [ 0.168903] r7:c090555c r6:c0a11140 r5:00000001 r4:c095fce8 [ 0.168927] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0xf4/0x154) [ 0.168940] [] (do_one_initcall) from [] (kernel_init_freeable+0x104/0x1d4) [ 0.168946] r10:c094a67c r9:c094a65c r8:000000e9 r7:c090555c r6:c0a11140 r5:00000001 [ 0.168970] r4:c095fce8 [ 0.168985] [] (kernel_init_freeable) from [] (kernel_init+0x10/0xf4) [ 0.168991] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c068c8b8 [ 0.169014] r4:00000000 [ 0.169028] [] (kernel_init) from [] (ret_from_fork+0x14/0x34) [ 0.169034] r4:00000000 r3:ec90c000 [ 0.169060] ---[ end trace 70900123c7d4dfb0 ]--- [ 0.171008] omap_hwmod: wd_timer2: no dt node [ 0.171016] ------------[ cut here ]------------ [ 0.171028] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2581 _init+0x41c/0x478() [ 0.171035] omap_hwmod: wd_timer2: doesn't have mpu register target base [ 0.171041] Modules linked in: [ 0.171053] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.14.63 #1 [ 0.171058] Backtrace: [ 0.171075] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 0.171082] r6:60000013 r5:ffffffff r4:00000000 r3:00000000 [ 0.171106] [] (show_stack) from [] (dump_stack+0x80/0xa0) [ 0.171119] [] (dump_stack) from [] (warn_slowpath_common+0x70/0x94) [ 0.171125] r7:00000a15 r6:c0912d0c r5:00000009 r4:ec90de48 [ 0.171151] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 0.171157] r8:c09132e0 r7:00000003 r6:00000000 r5:00000000 r4:c09b0b08 [ 0.171187] [] (warn_slowpath_fmt) from [] (_init+0x41c/0x478) [ 0.171193] r3:c0822fec r2:c0823bb8 [ 0.171211] [] (_init) from [] (omap_hwmod_for_each+0x38/0x64) [ 0.171218] r10:c094a67c r8:c09132e0 r7:00000000 r6:c09128f0 r5:c0973820 r4:c09b0b08 [ 0.171246] [] (omap_hwmod_for_each) from [] (__omap_hwmod_setup_all+0x2c/0x48) [ 0.171253] r7:c090555c r6:c0a11140 r5:00000001 r4:c095fce8 [ 0.171276] [] (__omap_hwmod_setup_all) from [] (do_one_initcall+0xf4/0x154) [ 0.171288] [] (do_one_initcall) from [] (kernel_init_freeable+0x104/0x1d4) [ 0.171295] r10:c094a67c r9:c094a65c r8:000000e9 r7:c090555c r6:c0a11140 r5:00000001 [ 0.171317] r4:c095fce8 [ 0.171331] [] (kernel_init_freeable) from [] (kernel_init+0x10/0xf4) [ 0.171338] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c068c8b8 [ 0.171361] r4:00000000 [ 0.171375] [] (kernel_init) from [] (ret_from_fork+0x14/0x34) [ 0.171381] r4:00000000 r3:ec90c000 [ 0.171393] ---[ end trace 70900123c7d4dfb1 ]--- [ 0.198284] omap_hwmod: dcan1: _wait_target_disable failed [ 0.296213] pinctrl core: initialized pinctrl subsystem [ 0.296960] regulator-dummy: no parameters [ 0.301331] NET: Registered protocol family 16 [ 0.303137] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.305228] cpuidle: using governor ladder [ 0.305238] cpuidle: using governor menu [ 0.352103] syscon 4a002000.tisysconcore: regmap [mem 0x4a002000-0x4a0026cf] registered [ 0.352439] syscon 4a002e00.tisyscon: regmap [mem 0x4a002e00-0x4a002e7b] registered [ 0.355276] OMAP GPIO hardware version 0.1 [ 0.361722] irq: no irq domain found for /ocp/pinmux@4a003400 ! [ 0.368356] platform 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 0.368663] platform 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 0.368952] platform 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 0.385956] platform 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 0.391904] No ATAGs? [ 0.391930] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.391939] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.394852] OMAP DMA hardware revision 0.0 [ 0.423358] bio: create slab at 0 [ 0.438861] edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver [ 0.445010] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver [ 0.445674] platform fixedregulator-sd: Driver reg-fixed-voltage requests probe deferral [ 0.445941] evm_3v3_sw: 3300 mV [ 0.445989] reg-fixed-voltage fixedregulator-evm_3v3_sw: Failed to find supply vin [ 0.446173] reg-fixed-voltage fixedregulator-evm_3v3_sw: Failed to register regulator: -517 [ 0.446192] platform fixedregulator-evm_3v3_sw: Driver reg-fixed-voltage requests probe deferral [ 0.446439] aic_dvdd: 1800 mV [ 0.446500] reg-fixed-voltage fixedregulator-aic_dvdd: Failed to find supply vin [ 0.446682] reg-fixed-voltage fixedregulator-aic_dvdd: Failed to register regulator: -517 [ 0.446701] platform fixedregulator-aic_dvdd: Driver reg-fixed-voltage requests probe deferral [ 0.447005] vmmcwl_fixed: 1800 mV [ 0.447367] vtt_fixed: 1350 mV [ 0.447415] reg-fixed-voltage fixedregulator-vtt: Failed to find supply vin [ 0.447639] reg-fixed-voltage fixedregulator-vtt: Failed to register regulator: -517 [ 0.447658] platform fixedregulator-vtt: Driver reg-fixed-voltage requests probe deferral [ 0.452353] vgaarb: loaded [ 0.452778] i2c-core: driver [palmas] using legacy suspend method [ 0.452787] i2c-core: driver [palmas] using legacy resume method [ 0.453378] SCSI subsystem initialized [ 0.454606] usbcore: registered new interface driver usbfs [ 0.454767] usbcore: registered new interface driver hub [ 0.454940] usbcore: registered new device driver usb [ 0.457196] palmas 0-0058: IRQ missing: skipping irq request [ 0.457531] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.457678] prom_parse: Bad cell count for /ocp/i2c@48070000/tps659038@58 [ 0.459802] smps123: 850 <--> 1500 mV at 1070 mV [ 0.461435] smps45: 850 <--> 1500 mV at 990 mV [ 0.463008] smps6: 850 <--> 1500 mV at 1080 mV [ 0.464458] smps7: 850 <--> 1500 mV at 1050 mV [ 0.466061] smps8: 850 <--> 1500 mV at 1010 mV [ 0.467496] smps9: 1800 mV [ 0.472671] ldo1: 1800 <--> 3300 mV at 3000 mV [ 0.481186] ldo2: 3300 mV [ 0.491394] ldo3: 1800 mV [ 0.492242] LDO4: at 1800 mV [ 0.492810] LDO5: no parameters [ 0.493400] LDO6: no parameters [ 0.493988] LDO7: no parameters [ 0.494557] LDO8: no parameters [ 0.501213] ldo9: 1050 mV [ 0.511239] ldoln: 1800 mV [ 0.521301] ldousb: 3300 mV [ 0.521999] REGEN1: no parameters [ 0.522518] regen2: no parameters [ 0.523081] sysen1: no parameters [ 0.523661] sysen2: no parameters [ 0.524377] pcf857x: probe of 0-0020 failed with error -121 [ 0.524860] pcf857x: probe of 0-0027 failed with error -121 [ 0.525616] pcf857x: probe of 0-0021 failed with error -121 [ 0.526020] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.526906] pcf857x: probe of 1-0026 failed with error -121 [ 0.527639] i2c i2c-1: of_i2c: modalias failure on /ocp/i2c@48072000/hdmirec@31 [ 0.528099] mcp230xx: probe of 1-0027 failed with error -121 [ 0.528587] mcp230xx: probe of 1-0021 failed with error -121 [ 0.529068] mcp230xx: probe of 1-0025 failed with error -121 [ 0.531272] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 0.531694] omap_i2c 48060000.i2c: bus 2 rev0.12 at 3400 kHz [ 0.532008] media: Linux media interface: v0.10 [ 0.532154] Linux video capture interface: v2.00 [ 0.532384] pps_core: LinuxPPS API ver. 1 registered [ 0.532393] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.532506] PTP clock support registered [ 0.533973] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.534433] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.535543] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.535653] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.535758] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.535872] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.536054] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.536160] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.536945] Advanced Linux Sound Architecture Driver Initialized. [ 0.538284] Switched to clocksource arch_sys_counter [ 0.556775] NET: Registered protocol family 2 [ 0.557481] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.557546] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.557678] TCP: Hash tables configured (established 8192 bind 8192) [ 0.557722] TCP: reno registered [ 0.557735] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.557766] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.557952] NET: Registered protocol family 1 [ 0.558225] RPC: Registered named UNIX socket transport module. [ 0.558234] RPC: Registered udp transport module. [ 0.558241] RPC: Registered tcp transport module. [ 0.558248] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.559354] hw perfevents: enabled with ARMv7 Cortex-A15 PMU driver, 7 counters available [ 0.562357] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.658613] bounce pool size: 64 pages [ 0.658884] VFS: Disk quotas dquot_6.5.2 [ 0.658994] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.659605] NFS: Registering the id_resolver key type [ 0.659638] Key type id_resolver registered [ 0.659648] Key type id_legacy registered [ 0.659679] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. [ 0.659871] msgmni has been set to 712 [ 0.663863] alg: No test for stdrng (krng) [ 0.664040] NET: Registered protocol family 38 [ 0.664069] io scheduler noop registered [ 0.664077] io scheduler deadline registered [ 0.664111] io scheduler cfq registered (default) [ 0.670269] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124 [ 0.708860] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 [ 0.708874] pci_bus 0000:00: root bus resource [io 0x1000-0x10000] [ 0.708886] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.708898] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 0.709395] PCI: bus0: Fast back to back transfers disabled [ 0.709635] PCI: bus1: Fast back to back transfers enabled [ 0.709753] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.709768] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.709781] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.709802] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.712216] OMAP DSS rev 6.1 [ 0.717522] i2c 1-0060: Driver fpd3_serdes requests probe deferral [ 0.717598] i2c 1-0064: Driver fpd3_serdes requests probe deferral [ 0.717667] i2c 1-0068: Driver fpd3_serdes requests probe deferral [ 0.717735] i2c 1-006c: Driver fpd3_serdes requests probe deferral [ 0.717802] i2c 1-0061: Driver fpd3_serdes requests probe deferral [ 0.717869] i2c 1-0069: Driver fpd3_serdes requests probe deferral [ 0.718677] pbias_mmc_omap5: 1800 <--> 3000 mV at 3000 mV [ 0.719453] abb_mpu: 1100 <--> 1210 mV [ 0.719811] abb_ivahd: 1060 <--> 1250 mV [ 0.720171] abb_dspeve: 1060 <--> 1250 mV [ 0.720518] abb_gpu: 1060 <--> 1280 mV [ 0.721659] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled [ 0.726086] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250 [ 2.322297] console [ttyS0] enabled [ 2.326588] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 300, base_baud = 3000000) is a 8250 [ 2.335857] platform 48020000.serial: Driver omap8250 requests probe deferral [ 2.344497] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 2.351692] [drm] Initialized drm 1.1.0 20060810 [ 2.366917] brd: module loaded [ 2.375468] loop: module loaded [ 2.378890] (stk) :sysfs entries created [ 2.382860] (stk) : debugfs entries created [ 2.387132] (hci_tty): inside hci_tty_init [ 2.391804] (hci_tty): allocated 249, 0 [ 2.398171] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 2.404939] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 2.413521] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 2.424003] scsi0 : ahci_platform [ 2.427822] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 336 [ 2.437130] mtdoops: mtd device (mtddev=name/number) must be supplied [ 2.448168] CAN device driver interface [ 2.453254] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=350) [ 2.464311] usbcore: registered new interface driver asix [ 2.469894] usbcore: registered new interface driver ax88179_178a [ 2.476152] usbcore: registered new interface driver cdc_ether [ 2.482193] usbcore: registered new interface driver smsc95xx [ 2.488105] usbcore: registered new interface driver net1080 [ 2.493955] usbcore: registered new interface driver cdc_subset [ 2.500058] usbcore: registered new interface driver zaurus [ 2.505828] usbcore: registered new interface driver cdc_ncm [ 2.512333] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 2.518908] ehci-pci: EHCI PCI platform driver [ 2.523518] ehci-omap: OMAP-EHCI Host Controller driver [ 2.529230] usbcore: registered new interface driver cdc_wdm [ 2.535082] usbcore: registered new interface driver usb-storage [ 2.542245] mousedev: PS/2 mouse device common for all mice [ 2.550393] i2c-core: driver [rtc-ds1307] using legacy suspend method [ 2.556862] i2c-core: driver [rtc-ds1307] using legacy resume method [ 2.563934] omap_rtc 48838000.rtcss: rtc core: registered 48838000.rtcss as rtc0 [ 2.572261] i2c /dev entries driver [ 2.576896] i2c 1-0037: Driver ov1063x requests probe deferral [ 2.582835] i2c 1-0030: Driver ov1063x requests probe deferral [ 2.590014] Driver for 1-wire Dallas network protocol. [ 2.596271] coproc iva_coproc: probe [ 2.599973] Adding alias for supply vdd,iva_coproc -> vdd,4a0025cc.voltdm [ 2.606791] Adding alias for supply vbb,iva_coproc -> vbb,4a0025cc.voltdm [ 2.614802] coproc iva_coproc: coproc_probe result=0 [ 2.620005] coproc dsp_coproc: probe [ 2.623679] Adding alias for supply vdd,dsp_coproc -> vdd,4a0025e0.voltdm [ 2.630536] Adding alias for supply vbb,dsp_coproc -> vbb,4a0025e0.voltdm [ 2.638421] coproc dsp_coproc: coproc_probe result=0 [ 2.648748] omap_hsmmc 4809c000.mmc: unable to get vmmc regulator -517 [ 2.655422] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral [ 2.662988] omap_hsmmc 480b4000.mmc: unable to get vmmc regulator -517 [ 2.669625] platform 480b4000.mmc: Driver omap_hsmmc requests probe deferral [ 2.778317] ata1: SATA link down (SStatus 0 SControl 300) [ 2.790120] ledtrig-cpu: registered to indicate activity on CPUs [ 2.798481] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 2.819587] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 2.825880] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 2.832217] alg: skcipher: setkey failed on test 5 for ecb-des-omap: flags=100 [ 2.839877] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 [ 2.847971] alg: skcipher-ddst: setkey failed on test 5 for ecb-des-omap: flags=100 [ 2.861018] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 2.866801] omap-sham 4b101000.sham: initialization failed. [ 2.872436] omap-sham: probe of 4b101000.sham failed with error -22 [ 2.879384] usbcore: registered new interface driver usbhid [ 2.884981] usbhid: USB HID core driver [ 2.890230] remoteproc0: 58820000.ipu is available [ 2.895132] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 2.904146] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 2.914708] remoteproc0: Direct firmware load failed with error -2 [ 2.921127] remoteproc1: 55020000.ipu is available [ 2.926027] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 2.935043] remoteproc0: Falling back to user helper [ 2.940271] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 2.950898] remoteproc1: Direct firmware load failed with error -2 [ 2.957192] remoteproc1: Falling back to user helper [ 2.962372] remoteproc2: 40800000.dsp is available [ 2.967272] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 2.976432] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 2.987047] remoteproc2: Direct firmware load failed with error -2 [ 2.993567] remoteproc3: 41000000.dsp is available [ 2.998492] remoteproc2: Falling back to user helper [ 3.003697] remoteproc3: Note: remoteproc is still under development and considered experimental. [ 3.012738] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 3.023311] remoteproc3: Direct firmware load failed with error -2 [ 3.029746] remoteproc3: Falling back to user helper [ 3.036270] platform extcon_usb1: Driver extcon-usb-gpio requests probe deferral [ 3.043846] platform extcon_usb2: Driver extcon-usb-gpio requests probe deferral [ 3.053659] tlv320aic3x-codec 0-0018: Failed to get supply 'IOVDD': -517 [ 3.060410] tlv320aic3x-codec 0-0018: Failed to request supplies: -517 [ 3.067065] i2c 0-0018: Driver tlv320aic3x-codec requests probe deferral [ 3.074285] platform bt_sco_card: Driver asoc-simple-card requests probe deferral [ 3.082553] asoc-simple-card asoc-simple-card.0: hdmi-hifi <-> 58040000.encoder mapping ok [ 3.095270] davinci_evm primary_sound: ASoC: CODEC (null) not registered [ 3.102045] davinci_evm primary_sound: snd_soc_register_card failed (-517) [ 3.108980] platform primary_sound: Driver davinci_evm requests probe deferral [ 3.117468] oprofile: using timer interrupt. [ 3.121848] nf_conntrack version 0.5.0 (9905 buckets, 39620 max) [ 3.128332] ip_tables: (C) 2000-2006 Netfilter Core Team [ 3.133746] TCP: cubic registered [ 3.137074] Initializing XFRM netlink socket [ 3.141451] NET: Registered protocol family 17 [ 3.145932] NET: Registered protocol family 15 [ 3.150492] Bridge firewalling registered [ 3.154525] can: controller area network core (rev 20120528 abi 9) [ 3.160807] NET: Registered protocol family 29 [ 3.165282] can: raw protocol (rev 20120528) [ 3.169584] can: broadcast manager protocol (rev 20120528 t) [ 3.175274] can: netlink gateway (rev 20130117) max_hops=1 [ 3.180851] 8021q: 802.1Q VLAN Support v1.8 [ 3.185092] Key type dns_resolver registered [ 3.189395] NET: Registered protocol family 41 [ 3.194519] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.voltdm [ 3.200833] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.voltdm [ 3.207477] cpu cpu0: of_pm_voltdm_notifier_register: Fail calculating voltage latency[1100000<->1100000]:-22 [ 3.218105] Power Management for TI OMAP4+ devices. [ 3.223213] ThumbEE CPU extension supported. [ 3.227514] Registering SWP/SWPB emulation handler [ 3.232338] SmartReflex Class3 initialized [ 3.238513] vmmcwl_fixed: disabling [ 3.242018] regulator-dummy: disabling [ 3.246028] dmm 4e000000.dmm: workaround for errata i878 in use [ 3.254322] dmm 4e000000.dmm: initialized all PAT entries [ 3.262543] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.269206] [drm] No driver support for vblank timestamp query. [ 3.275159] omapdrm omapdrm.0: No connectors reported connected with modes [ 3.282079] [drm] Cannot find any crtc or sizes - going 1024x768 [ 3.292589] [drm] Enabling DMM ywrap scrolling [ 3.303085] Console: switching to colour frame buffer device 128x48 [ 3.314837] omapdrm omapdrm.0: fb0: omapdrm frame buffer device [ 3.320798] omapdrm omapdrm.0: registered panic notifier [ 3.326141] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 3.333750] platform fixedregulator-sd: Driver reg-fixed-voltage requests probe deferral [ 3.342435] evm_3v3_sw: 3300 mV [ 3.345718] evm_3v3_sw: supplied by sysen1 [ 3.350418] aic_dvdd: 1800 mV [ 3.353539] aic_dvdd: supplied by evm_3v3_sw [ 3.358225] vtt_fixed: 1350 mV [ 3.361441] vtt_fixed: supplied by sysen2 [ 3.365831] i2c 1-0060: Driver fpd3_serdes requests probe deferral [ 3.372281] i2c 1-0064: Driver fpd3_serdes requests probe deferral [ 3.378645] i2c 1-0068: Driver fpd3_serdes requests probe deferral [ 3.384965] i2c 1-006c: Driver fpd3_serdes requests probe deferral [ 3.391326] i2c 1-0061: Driver fpd3_serdes requests probe deferral [ 3.397645] i2c 1-0069: Driver fpd3_serdes requests probe deferral [ 3.404112] platform 48020000.serial: Driver omap8250 requests probe deferral [ 3.411523] i2c 1-0037: Driver ov1063x requests probe deferral [ 3.417487] i2c 1-0030: Driver ov1063x requests probe deferral [ 3.424146] omap_hsmmc 4809c000.mmc: unable to get vmmc regulator -517 [ 3.430832] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral [ 3.478734] platform extcon_usb1: Driver extcon-usb-gpio requests probe deferral [ 3.488543] platform extcon_usb2: Driver extcon-usb-gpio requests probe deferral [ 3.497632] asoc-simple-card bt_sco_card: bt-sco-pcm <-> 48478000.mcasp mapping ok [ 3.506897] ALSA sound/core/init.c:213 cannot find the slot for index 0 (range 0-1), error: -16 [ 3.515675] davinci_evm primary_sound: ASoC: can't create sound card for card DRA7xx-EVM: -16 [ 3.524302] davinci_evm primary_sound: snd_soc_register_card failed (-16) [ 3.531180] davinci_evm: probe of primary_sound failed with error -16 [ 3.537788] platform fixedregulator-sd: Driver reg-fixed-voltage requests probe deferral [ 3.546221] i2c 1-0060: Driver fpd3_serdes requests probe deferral [ 3.552608] i2c 1-0064: Driver fpd3_serdes requests probe deferral [ 3.558948] i2c 1-0068: Driver fpd3_serdes requests probe deferral [ 3.565182] mmc1: unrecognised EXT_CSD revision 8 [ 3.569927] mmc1: error -22 whilst initialising MMC card [ 3.576394] i2c 1-006c: Driver fpd3_serdes requests probe deferral [ 3.582725] i2c 1-0061: Driver fpd3_serdes requests probe deferral [ 3.589056] i2c 1-0069: Driver fpd3_serdes requests probe deferral [ 3.595489] platform 48020000.serial: Driver omap8250 requests probe deferral [ 3.602885] i2c 1-0037: Driver ov1063x requests probe deferral [ 3.608863] i2c 1-0030: Driver ov1063x requests probe deferral [ 3.615456] omap_hsmmc 4809c000.mmc: unable to get vmmc regulator -517 [ 3.622135] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral [ 3.629602] platform extcon_usb1: Driver extcon-usb-gpio requests probe deferral [ 3.637356] platform extcon_usb2: Driver extcon-usb-gpio requests probe deferral [ 3.688323] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 3.688332] davinci_mdio 48485000.mdio: detected phy mask fffffffb [ 3.700821] libphy: 48485000.mdio: probed [ 3.704853] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 3.713024] platform fixedregulator-sd: Driver reg-fixed-voltage requests probe deferral [ 3.721814] cpsw 48484000.ethernet: Detected MACID = 50:33:8b:d0:ef:40 [ 3.728630] i2c 1-0060: Driver fpd3_serdes requests probe deferral [ 3.729558] cpsw 48484000.ethernet: cpsw: Detected MACID = 50:33:8b:d0:ef:41 [ 3.741954] omap_rtc 48838000.rtcss: setting system clock to 2000-01-01 00:00:01 UTC (946684801) [ 3.742094] i2c 1-0064: Driver fpd3_serdes requests probe deferral [ 3.742217] i2c 1-0068: Driver fpd3_serdes requests probe deferral [ 3.742341] i2c 1-006c: Driver fpd3_serdes requests probe deferral [ 3.742463] i2c 1-0061: Driver fpd3_serdes requests probe deferral [ 3.742586] i2c 1-0069: Driver fpd3_serdes requests probe deferral [ 3.742839] platform 48020000.serial: Driver omap8250 requests probe deferral [ 3.743082] i2c 1-0037: Driver ov1063x requests probe deferral [ 3.743198] i2c 1-0030: Driver ov1063x requests probe deferral [ 3.743997] omap_hsmmc 4809c000.mmc: unable to get vmmc regulator -517 [ 3.744121] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral [ 3.744499] platform extcon_usb1: Driver extcon-usb-gpio requests probe deferral [ 3.744838] platform extcon_usb2: Driver extcon-usb-gpio requests probe deferral [ 3.744968] platform fixedregulator-sd: Driver reg-fixed-voltage requests probe deferral [ 3.745271] i2c 1-0060: Driver fpd3_serdes requests probe deferral [ 3.843485] sr_init: No PMIC hook to init smartreflex [ 3.848910] sr_init: platform driver register failed for SR [ 3.867338] ALSA device list: [ 3.870391] #0: DRA7xx-WiLink [ 3.873547] #1: HDMI 58040000.encoder [ 3.877846] Waiting for root device PARTUUID=ef281dfe-02... Is there any procedure i missed or not done correctly?What hints can be found from the boot information? Thanks! ZeYuLu + +Responses: +Hi ZeYuLu, from the version of your kernel and u-boot it seems that you are using very old version of the SDK. Can you try with the latest version (it is based on 4.4 kernel): software-dl.ti.com/.../index_FDS.html Also to what is set fdtfile in your uenv.txt, for TDA2x it should be fdtfile=dra7-evm-infoadas.dtb (at least in current versions) Regards, Yordan + +Hi ZeYuLu, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + diff --git a/data2/text/range/30001+/754163.txt b/data2/text/range/30001+/754163.txt new file mode 100644 index 0000000000000000000000000000000000000000..ae4ac67e997b854b31a4f36671e16c89243c814a --- /dev/null +++ b/data2/text/range/30001+/754163.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/TDA2: TIDL_OD usecase failed Decode Error + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: INA226 Tool/software: TI-RTOS I'm running the TIDL usecase, the system is booted OK, and I put the required files in my sd card, I generated our own data into inData_OD and inHeaderOD based on the instructions I found from the forum , but the dimension of our original data is 1920*1080, so I compress the video dimension to 768*320 according to the original TIDL_SSD_CFG.TXT , but when I tried to run the use case, I got the decode error. And below is the log from my terminal: TDA2xx SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed DDR Config Completed App Image Download Begins SD Boot - file open completed successfully MPU CPU0 Image Load Completed IPU1 CPU0 Image Load Completed IPU1 CPU1 Image Load Completed IPU2 CPU0 and CPU1 Image Load Completed DSP1 Image Load Completed DSP2 Image Load Completed EVE1 Image Load Completed EVE2 Image Load Completed EVE3 Image Load Completed EVE4 Image Load Completed App Image Download Completed Putting MPU CPU1 in Off mode EVE MMU configuration completed EVE MMU configuration completed EVE MMU configuration completed EVE MMU configuration completed ***************************************************************** PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles SBL Initial Config Cycles - 144537 (12.33 ms) SOC Init Cycles - 263987 (22.52 ms) DDR Config Clock Cycles - 67644 (5.77 ms) App Image Load Cycles - 190820787 (16283.37 ms) Slave Core Bootup Cycles - 322861 (27.55 ms) SBL Boot-up Cycles - 191621149 (16351.67 ms) Time at which SBL started IPU1_0 - 352088 (30.4 ms) ***************************************************************** Jumping to MPU CPU0 App [IPU1-0] 10.744708 s: ***** IPU1_0 Firmware build time 12:23:57 Nov 22 2018 [IPU1-0] 10.744891 s: *** SYSTEM: CPU Frequency , [IPU1-0] 11.512627 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [IPU1-0] 11.512810 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [IPU1-0] 11.512932 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-0] 11.513023 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU1-0] 11.513145 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU1-0] 11.513237 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [IPU1-0] 11.513359 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [IPU1-0] 11.513481 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [IPU1-0] 11.513572 s: SYSTEM: Notify register to [HOST] line 0, event 15... [IPU1-0] 11.515524 s: *** UTILS: CPU MHz = 20 Mhz *** [IPU1-0] 11.515738 s: SYSTEM: System Common Init in progress !!! [IPU1-0] 11.529219 s: UTILS: CIO: Init Done !!! [IPU1-0] 11.529341 s: SYSTEM: IPC init in progress !!! [IPU1-0] 11.529402 s: SYSTEM: Notify init done !!! [IPU1-0] 11.531202 s: SYSTEM: MsgQ init done !!! [IPU1-0] 11.531293 s: SYSTEM: IPC init DONE !!! [IPU1-0] 11.535197 s: SYSTEM: System Common Init Done !!! [IPU1-0] 11.535289 s: SYSTEM: System Init in progress !!! [IPU1-0] 11.535350 s: SYSTEM: BSP Common Init in progress !!! [IPU1-0] 11.535441 s: SYSTEM: BSP Common Init Done !!! [IPU1-0] 11.535502 s: SYSTEM: BSP Platform Init in progress !!! [IPU1-0] 11.535655 s: SYSTEM: BSP Platform Init Done !!! [IPU1-0] 11.535777 s: SYSTEM: FVID2 Init in progress !!! [IPU1-0] 11.535929 s: SYSTEM: FVID2 Init Done !!! [IPU1-0] 11.536021 s: SYSTEM: VPS Init in progress !!! [IPU1-0] 11.536082 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] [IPU1-0] 11.540078 s: *** VPDMA Firmware Loading... *** [IPU1-0] 11.540200 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 11.540291 s: VPDMA Load Address = 0x4897d004 [IPU1-0] 11.540413 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 11.540535 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 11.540627 s: *** VPDMA Firmware Load Success *** [IPU1-0] 11.541481 s: *** VPDMA Firmware Loading... *** [IPU1-0] 11.541603 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 11.541755 s: VPDMA Load Address = 0x4899d004 [IPU1-0] 11.541877 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 11.541969 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 11.542030 s: *** VPDMA Firmware Load Success *** [IPU1-0] 11.542457 s: *** VPDMA Firmware Loading... *** [IPU1-0] 11.542548 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 11.542640 s: VPDMA Load Address = 0x489bd004 [IPU1-0] 11.542914 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 11.543006 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 11.543097 s: *** VPDMA Firmware Load Success *** [IPU1-0] 11.543799 s: *** VPDMA Firmware Loading... *** [IPU1-0] 11.543921 s: VPDMA Firmware Address = 0x9fd1c4c0 [IPU1-0] 11.544012 s: VPDMA Load Address = 0x489dd004 [IPU1-0] 11.544134 s: VPDMA Firmware Version = 0x4d0001b8 [IPU1-0] 11.544226 s: VPDMA List Busy Status = 0x00000000 [IPU1-0] 11.544317 s: *** VPDMA Firmware Load Success *** [IPU1-0] 11.608277 s: SYSTEM: VPS Init Done !!! [IPU1-0] 11.609253 s: UTILS: DMA: HWI Create for INT34 !!! [IPU1-0] 11.609467 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU1-0] 11.609589 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252328 B (246 KB) [IPU1-0] 11.609833 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 11.610046 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 368037888 B (350 MB) [IPU1-0] 11.610260 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 11.610412 s: SYSTEM: Initializing Links !!! [IPU1-0] 11.877325 s: SYSTEM: Initializing Links ... DONE !!! [IPU1-0] 11.972732 s: BOARD: Board Init in progress !!! [IPU1-0] 11.973128 s: BOARD: Board Init Done !!! [IPU1-0] 11.984475 s: [IPU1-0] 11.984566 s: Vision SDK Version : [REL_VISION_SDK_03_04_00_00] [IPU1-0] 11.984627 s: FVID2 Version : [FVID_02_01_00_01] [IPU1-0] 11.984719 s: BSP Version : [PDK_01_10_00_xx] [IPU1-0] 11.984780 s: Platform : [EVM] [IPU1-0] 11.984841 s: SOC : [TDA2XX] [IPU1-0] 11.984902 s: SOC Revision : [ES2.0] [IPU1-0] 11.984963 s: Board Detected : [Vision] [IPU1-0] 11.990971 s: EEPROM Base Board Name: [5777xCPU-DDR3] [IPU1-0] 11.991063 s: Base Board Revision : [REV E] [IPU1-0] 11.992374 s: Daughter Card Revision: [REV D] [IPU1-0] 11.992435 s: [IPU1-0] 11.996187 s: SYSTEM: UART: INTERRUPT Mode is Selected [IPU1-1] 10.761880 s: ***** IPU1_1 Firmware build time 12:20:32 Nov 22 2018 [IPU1-1] 10.762063 s: *** SYSTEM: CPU Frequency , [IPU1-1] 11.515311 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [IPU1-1] 11.515555 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [IPU1-1] 11.515707 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU1-1] 11.515860 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU1-1] 11.515982 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU1-1] 11.516104 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [IPU1-1] 11.516226 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [IPU1-1] 11.516348 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [IPU1-1] 11.516470 s: SYSTEM: Notify register to [HOST] line 0, event 15... [IPU1-1] 11.526017 s: SYSTEM: System Common Init in progress !!! [IPU1-1] 11.527176 s: UTILS: CIO: Init Done !!! [IPU1-1] 11.527267 s: SYSTEM: IPC init in progress !!! [IPU1-1] 11.527359 s: SYSTEM: Notify init done !!! [IPU1-1] 11.529128 s: SYSTEM: MsgQ init done !!! [IPU1-1] 11.529219 s: SYSTEM: IPC init DONE !!! [IPU1-1] 11.533062 s: SYSTEM: System Common Init Done !!! [IPU1-1] 11.533184 s: SYSTEM: System IPU1_1 Init in progress !!! [IPU1-1] 11.534069 s: UTILS: DMA: HWI Create for INT25 !!! [IPU1-1] 11.534313 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU1-1] 11.534404 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 620344 B (605 KB) [IPU1-1] 11.534587 s: SYSTEM: Initializing Links !!! [IPU1-1] 11.651009 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### [IPU1-1] 11.654059 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### [IPU1-1] 11.657140 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### [IPU1-1] 11.660800 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### [IPU1-1] 11.664063 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### [IPU1-1] 11.667785 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### [IPU1-1] 11.670987 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### [IPU1-1] 11.674342 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### [IPU1-1] 11.677850 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### [IPU1-1] 11.681052 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### [IPU1-1] 11.685048 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### [IPU1-1] 11.685170 s: SYSTEM: Initializing Links ... DONE !!! [IPU1-1] 11.686482 s: SYSTEM: System IPU1_1 Init Done !!! [IPU1-1] 11.820045 s: NSP GMAC: PHY 2 Found on MAC Port 0 [IPU1-1] 11.820594 s: NSP GMAC: PHY 3 Found on MAC Port 1 [HOST ] 10.821997 s: ***** A15_0 Firmware build time 12:22:36 Nov 22 2018 [HOST ] 10.822027 s: *** SYSTEM: CPU Frequency , [HOST ] 11.513633 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [HOST ] 11.513633 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [HOST ] 11.513633 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST ] 11.513664 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST ] 11.513664 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [HOST ] 11.513664 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [HOST ] 11.513694 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [HOST ] 11.513694 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [HOST ] 11.513694 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [HOST ] 11.513755 s: SYSTEM: System Common Init in progress !!! [HOST ] 11.513786 s: SYSTEM: IPC init in progress !!! [HOST ] 11.513786 s: SYSTEM: Notify init done !!! [HOST ] 11.513847 s: SYSTEM: MsgQ init done !!! [HOST ] 11.513847 s: SYSTEM: IPC init DONE !!! [HOST ] 11.514213 s: SYSTEM: System Common Init Done !!! [HOST ] 11.514213 s: SYSTEM: System A15 Init in progress !!! [HOST ] 11.514243 s: UTILS: DMA: HWI Create for INT66 !!! [HOST ] 11.514274 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST ] 11.514274 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6280568 B (6133 KB) [HOST ] 11.514304 s: SYSTEM: Initializing Links !!! [HOST ] 11.516287 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### [HOST ] 11.516348 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### [HOST ] 11.516409 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### [HOST ] 11.516470 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### [HOST ] 11.516531 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### [HOST ] 11.516592 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### [HOST ] 11.516653 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### [HOST ] 11.516714 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### [HOST ] 11.516775 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### [HOST ] 11.516836 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### [HOST ] 11.516897 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### [HOST ] 11.516897 s: SYSTEM: Initializing Links ... DONE !!! [HOST ] 11.516897 s: SYSTEM: System A15 Init Done !!! [DSP1 ] 10.813334 s: ***** DSP1 Firmware build time 12:16:11 Nov 22 2018 [DSP1 ] 10.813426 s: *** SYSTEM: CPU Frequency , [DSP1 ] 11.517720 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP1 ] 11.517781 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [DSP1 ] 11.517812 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [DSP1 ] 11.517842 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [DSP1 ] 11.517873 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [DSP1 ] 11.517903 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [DSP1 ] 11.517934 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [DSP1 ] 11.517964 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [DSP1 ] 11.517995 s: SYSTEM: Notify register to [HOST] line 0, event 15... [DSP1 ] 11.518147 s: *** UTILS: CPU MHz = 20 Mhz *** [DSP1 ] 11.518178 s: SYSTEM: System Common Init in progress !!! [DSP1 ] 11.518361 s: UTILS: CIO: Init Done !!! [DSP1 ] 11.518391 s: SYSTEM: IPC init in progress !!! [DSP1 ] 11.518422 s: SYSTEM: Notify init done !!! [DSP1 ] 11.518544 s: SYSTEM: MsgQ init done !!! [DSP1 ] 11.518575 s: SYSTEM: IPC init DONE !!! [DSP1 ] 11.519246 s: SYSTEM: System Common Init Done !!! [DSP1 ] 11.519276 s: SYSTEM: System DSP Init in progress !!! [DSP1 ] 11.519490 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [DSP1 ] 11.519520 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 11.519551 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) [DSP1 ] 11.519581 s: SYSTEM: Initializing Links !!! [DSP1 ] 11.527542 s: SYSTEM: Initializing Links ... DONE !!! [DSP1 ] 11.527572 s: lz4CompDecomp Init [DSP1 ] 11.527603 s: SYSTEM: System DSP Init Done !!! [DSP1 ] 11.891295 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [DSP1 ] 11.891325 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [DSP2 ] 10.813304 s: ***** DSP2 Firmware build time 12:18:29 Nov 22 2018 [DSP2 ] 10.813395 s: *** SYSTEM: CPU Frequency , [DSP2 ] 11.518849 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [DSP2 ] 11.518910 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [DSP2 ] 11.518941 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [DSP2 ] 11.518971 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [DSP2 ] 11.519002 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [DSP2 ] 11.519032 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [DSP2 ] 11.519063 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [DSP2 ] 11.519093 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [DSP2 ] 11.519124 s: SYSTEM: Notify register to [HOST] line 0, event 15... [DSP2 ] 11.519276 s: *** UTILS: CPU MHz = 20 Mhz *** [DSP2 ] 11.519337 s: SYSTEM: System Common Init in progress !!! [DSP2 ] 11.519520 s: UTILS: CIO: Init Done !!! [DSP2 ] 11.519551 s: SYSTEM: IPC init in progress !!! [DSP2 ] 11.519581 s: SYSTEM: Notify init done !!! [DSP2 ] 11.519703 s: SYSTEM: MsgQ init done !!! [DSP2 ] 11.519734 s: SYSTEM: IPC init DONE !!! [DSP2 ] 11.520435 s: SYSTEM: System Common Init Done !!! [DSP2 ] 11.520466 s: SYSTEM: System DSP Init in progress !!! [DSP2 ] 11.520679 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [DSP2 ] 11.520710 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 11.520740 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) [DSP2 ] 11.520771 s: SYSTEM: Initializing Links !!! [DSP2 ] 11.528640 s: SYSTEM: Initializing Links ... DONE !!! [DSP2 ] 11.528670 s: lz4CompDecomp Init [DSP2 ] 11.528701 s: SYSTEM: System DSP Init Done !!! [DSP2 ] 11.893308 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! [DSP2 ] 11.893338 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! [EVE1 ] 11.502013 s: ***** EVE Firmware build time 12:10:47 Nov 22 2018 [EVE1 ] 11.503812 s: *** SYSTEM: CPU Frequency , [EVE1 ] 11.522845 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE1 ] 11.524553 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE1 ] 11.526139 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE1 ] 11.527725 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE1 ] 11.529189 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE1 ] 11.530592 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [EVE1 ] 11.531995 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [EVE1 ] 11.533398 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE1 ] 11.534831 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE1 ] 11.537058 s: SYSTEM: System Common Init in progress !!! [EVE1 ] 11.539437 s: UTILS: CIO: Init Done !!! [EVE1 ] 11.540413 s: SYSTEM: IPC init in progress !!! [EVE1 ] 11.541877 s: SYSTEM: Notify init done !!! [EVE1 ] 11.543951 s: SYSTEM: MsgQ init done !!! [EVE1 ] 11.544927 s: SYSTEM: IPC init DONE !!! [EVE1 ] 11.560910 s: SYSTEM: System Common Init Done !!! [EVE1 ] 11.562038 s: SYSTEM: System EVE Init in progress !!! [EVE1 ] 11.563685 s: UTILS: DMA: HWI Create for INT8 !!! [EVE1 ] 11.565027 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE1 ] 11.566369 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE1 ] 11.568901 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) [EVE1 ] 11.571188 s: SYSTEM: Initializing Links !!! [EVE1 ] 11.664917 s: SYSTEM: Initializing Links ... DONE !!! [EVE1 ] 11.666046 s: SYSTEM: System EVE Init Done !!! [EVE2 ] 11.482980 s: ***** EVE Firmware build time 12:12:03 Nov 22 2018 [EVE2 ] 11.484902 s: *** SYSTEM: CPU Frequency , [EVE2 ] 11.525102 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE2 ] 11.526718 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE2 ] 11.528304 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE2 ] 11.529707 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE2 ] 11.531110 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE2 ] 11.532513 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [EVE2 ] 11.533947 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [EVE2 ] 11.535380 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE2 ] 11.536966 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE2 ] 11.539163 s: SYSTEM: System Common Init in progress !!! [EVE2 ] 11.541969 s: UTILS: CIO: Init Done !!! [EVE2 ] 11.543067 s: SYSTEM: IPC init in progress !!! [EVE2 ] 11.544195 s: SYSTEM: Notify init done !!! [EVE2 ] 11.546178 s: SYSTEM: MsgQ init done !!! [EVE2 ] 11.547154 s: SYSTEM: IPC init DONE !!! [EVE2 ] 11.562374 s: SYSTEM: System Common Init Done !!! [EVE2 ] 11.563502 s: SYSTEM: System EVE Init in progress !!! [EVE2 ] 11.565088 s: UTILS: DMA: HWI Create for INT8 !!! [EVE2 ] 11.566369 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE2 ] 11.567803 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE2 ] 11.570243 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) [EVE2 ] 11.572652 s: SYSTEM: Initializing Links !!! [EVE2 ] 11.666503 s: SYSTEM: Initializing Links ... DONE !!! [EVE2 ] 11.667541 s: SYSTEM: System EVE Init Done !!! [EVE3 ] 11.500518 s: ***** EVE Firmware build time 12:13:16 Nov 22 2018 [EVE3 ] 11.502440 s: *** SYSTEM: CPU Frequency , [EVE3 ] 11.527237 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE3 ] 11.528792 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE3 ] 11.530195 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE3 ] 11.531629 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE3 ] 11.533032 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE3 ] 11.534465 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [EVE3 ] 11.535838 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [EVE3 ] 11.537455 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE3 ] 11.539071 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE3 ] 11.541542 s: SYSTEM: System Common Init in progress !!! [EVE3 ] 11.544134 s: UTILS: CIO: Init Done !!! [EVE3 ] 11.545110 s: SYSTEM: IPC init in progress !!! [EVE3 ] 11.546239 s: SYSTEM: Notify init done !!! [EVE3 ] 11.548465 s: SYSTEM: MsgQ init done !!! [EVE3 ] 11.549441 s: SYSTEM: IPC init DONE !!! [EVE3 ] 11.564356 s: SYSTEM: System Common Init Done !!! [EVE3 ] 11.565454 s: SYSTEM: System EVE Init in progress !!! [EVE3 ] 11.567071 s: UTILS: DMA: HWI Create for INT8 !!! [EVE3 ] 11.568352 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE3 ] 11.569694 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE3 ] 11.572195 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) [EVE3 ] 11.574788 s: SYSTEM: Initializing Links !!! [EVE3 ] 11.667388 s: SYSTEM: Initializing Links ... DONE !!! [EVE3 ] 11.668486 s: SYSTEM: System EVE Init Done !!! [EVE4 ] 11.492679 s: ***** EVE Firmware build time 12:14:23 Nov 22 2018 [EVE4 ] 11.494509 s: *** SYSTEM: CPU Frequency , [EVE4 ] 11.527237 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE4 ] 11.528792 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE4 ] 11.530195 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE4 ] 11.531629 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE4 ] 11.533032 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE4 ] 11.534465 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [EVE4 ] 11.535838 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [EVE4 ] 11.537394 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [EVE4 ] 11.539010 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE4 ] 11.541450 s: SYSTEM: System Common Init in progress !!! [EVE4 ] 11.543982 s: UTILS: CIO: Init Done !!! [EVE4 ] 11.544958 s: SYSTEM: IPC init in progress !!! [EVE4 ] 11.546178 s: SYSTEM: Notify init done !!! [EVE4 ] 11.548374 s: SYSTEM: MsgQ init done !!! [EVE4 ] 11.549380 s: SYSTEM: IPC init DONE !!! [EVE4 ] 11.564234 s: SYSTEM: System Common Init Done !!! [EVE4 ] 11.565332 s: SYSTEM: System EVE Init in progress !!! [EVE4 ] 11.566979 s: UTILS: DMA: HWI Create for INT8 !!! [EVE4 ] 11.568260 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE4 ] 11.569602 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE4 ] 11.572073 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) [EVE4 ] 11.574544 s: SYSTEM: Initializing Links !!! [EVE4 ] 11.667266 s: SYSTEM: Initializing Links ... DONE !!! [EVE4 ] 11.668364 s: SYSTEM: System EVE Init Done !!! [IPU2 ] 10.742481 s: ***** IPU2 Firmware build time 12:26:35 Nov 22 2018 [IPU2 ] 10.742664 s: *** SYSTEM: CPU Frequency , [IPU2 ] 11.516714 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [IPU2 ] 11.516927 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [IPU2 ] 11.517019 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [IPU2 ] 11.517141 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [IPU2 ] 11.517232 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [IPU2 ] 11.517354 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [IPU2 ] 11.517476 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [IPU2 ] 11.517568 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [IPU2 ] 11.517690 s: SYSTEM: Notify register to [HOST] line 0, event 15... [IPU2 ] 11.520405 s: SYSTEM: System Common Init in progress !!! [IPU2 ] 11.521838 s: UTILS: CIO: Init Done !!! [IPU2 ] 11.521960 s: SYSTEM: IPC init in progress !!! [IPU2 ] 11.522052 s: SYSTEM: Notify init done !!! [IPU2 ] 11.523973 s: SYSTEM: MsgQ init done !!! [IPU2 ] 11.524095 s: SYSTEM: IPC init DONE !!! [IPU2 ] 11.529280 s: SYSTEM: System Common Init Done !!! [IPU2 ] 11.529402 s: SYSTEM: System IPU2 Init in progress !!! [IPU2 ] 11.530226 s: UTILS: DMA: HWI Create for INT25 !!! [IPU2 ] 11.530500 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [IPU2 ] 11.530622 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252424 B (246 KB) [IPU2 ] 11.530836 s: SYSTEM: Initializing Links !!! [IPU2 ] 11.643109 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### [IPU2 ] 11.646068 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### [IPU2 ] 11.649027 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### [IPU2 ] 11.652138 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### [IPU2 ] 11.655218 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### [IPU2 ] 11.658421 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### [IPU2 ] 11.661501 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### [IPU2 ] 11.664765 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### [IPU2 ] 11.667876 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### [IPU2 ] 11.670957 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### [IPU2 ] 11.674068 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### [IPU2 ] 11.674190 s: SYSTEM: Initializing Links ... DONE !!! [IPU2 ] 11.674281 s: SYSTEM: System IPU2 Init Done !!! [IPU1-0] 13.131489 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines [IPU1-0] 13.135881 s: QSPI Init Started [IPU1-0] 13.136155 s: MID - 1 [IPU1-0] 13.136186 s: DID - 18 [IPU1-0] 13.136247 s: QSPI Init Completed Sucessfully [IPU1-0] 13.149301 s: [IPU1-0] 13.149362 s: Current System Settings, [IPU1-0] 13.149423 s: ======================== [IPU1-0] 13.149484 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 13.149545 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 [IPU1-0] 13.149637 s: My IP address : 0.0.0.0 [IPU1-0] 13.149698 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] [IPU1-0] 13.149789 s: [IPU1-0] 13.149820 s: ============ [IPU1-0] 13.149881 s: Usecase Menu [IPU1-0] 13.149911 s: ============ [IPU1-0] 13.149972 s: [IPU1-0] [IPU1-0] Vision SDK Usecases, [IPU1-0] -------------------- [IPU1-0] 1: Single Camera Usecases [IPU1-0] 2: Multi-Camera LVDS Usecases [IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) [IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) [IPU1-0] 5: ISS Usecases, (TDA3x ONLY) [IPU1-0] 6: TDA2x Stereo Usecases [IPU1-0] 7: Network RX/TX Usecases [IPU1-0] 9: RADAR Usecases [IPU1-0] a: Miscellaneous test's [IPU1-0] f: TIDL Usecase [IPU1-0] g: Camera Radar Combo Usecases [IPU1-0] [IPU1-0] s: System Settings [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-1] 16.685841 s: NETWORK_CTRL: Starting Server (port=5000) !!! [IPU1-1] 16.686116 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [IPU1-0] 19.804977 s: [IPU1-0] 19.805099 s: [IPU1-0] [IPU1-0] TIDL Usecases [IPU1-0] --------------- [IPU1-0] 1: TIDL File I/O Usecase [IPU1-0] 2: Semantic Segmentation Usecase [IPU1-0] 3: TIDL OD Usecase [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 21.062648 s: [IPU1-0] 21.104556 s: TIDL Configuration parameters [IPU1-0] 21.104617 s: ----------------------------- [IPU1-0] 21.104678 s: inputWidth = 768 [IPU1-0] 21.104739 s: inputHeight = 320 [IPU1-0] 21.104800 s: inputFile = inData_OD [IPU1-0] 21.104861 s: inputFile = inHeader_OD [IPU1-0] 21.104922 s: netFileName = tidl_net_jdetNet_ssd.bin [IPU1-0] 21.105014 s: paramFileName = tidl_param_jdetNet_ssd.bin [IPU1-0] 21.105105 s: inputfps = 30 [IPU1-0] 21.105166 s: threshold = 0.300000 [IPU1-0] 21.105258 s: ----------------------------- [IPU1-0] 22.229030 s: FILE: Reading file [inHeader_OD [IPU1-0] ] ... [IPU1-0] 22.233300 s: FILE: File read Done. [120 bytes] [IPU1-0] 22.262429 s: DECODE: Create in progress ... !!! [IPU1-0] 22.516195 s: DECODE: Creating CH0 of 768 x 320 [1] [0],target bitrate = 10000 Kbps ... [IPU1-0] 22.516927 s: DECODE: All CH Create ... DONE !!! [IPU1-0] 22.518758 s: DECODE: Create ... DONE !!! [IPU1-0] 22.519185 s: VPE: Create in progress !!! [IPU1-0] 22.612365 s: VPE: Loading Down-scaling Co-effs [IPU1-0] 22.612609 s: VPE: Co-effs Loading ... DONE !!! [IPU1-0] 22.612822 s: VPE: Create Done !!! [IPU1-0] 22.613890 s: IPC_OUT_0 : Create in progress !!! [IPU1-0] 22.614286 s: IPC_OUT_0 : Create Done !!! [HOST ] 22.614469 s: IPC_IN_0 : Create in progress !!! [HOST ] 22.614744 s: IPC_IN_0 : Create Done !!! [HOST ] 22.614896 s: ALGORITHM: Create in progress (algId = 12) !!! [HOST ] 22.621027 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) [HOST ] 22.621057 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) [HOST ] 22.621057 s: ALGORITHM: Create Done (algId = 12) !!! [HOST ] 22.621149 s: IPC_OUT_3 : Create in progress !!! [HOST ] 22.621179 s: IPC_OUT_3 : Create Done !!! [EVE4 ] 22.621454 s: IPC_IN_0 : Create in progress !!! [EVE4 ] 22.622399 s: IPC_IN_0 : Create Done !!! [EVE4 ] 22.622948 s: ALGORITHM: Create in progress (algId = 14) !!! [HOST ] 24.283291 s: IPC_OUT_2 : Create in progress !!! [HOST ] 24.283322 s: IPC_OUT_2 : Create Done !!! [DSP1 ] 24.282681 s: IPC_IN_3 : Create in progress !!! [DSP1 ] 24.283139 s: IPC_IN_3 : Create Done !!! [EVE3 ] 24.283596 s: IPC_IN_0 : Create in progress !!! [EVE3 ] 24.284450 s: IPC_IN_0 : Create Done !!! [EVE3 ] 24.284999 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE4 ] 24.281187 s: ALGORITHM: Create Done (algId = 14) !!! [EVE4 ] 24.281766 s: IPC_OUT_0 : Create in progress !!! [EVE4 ] 24.282285 s: IPC_OUT_0 : Create Done !!! [HOST ] 25.946166 s: IPC_OUT_1 : Create in progress !!! [HOST ] 25.946196 s: IPC_OUT_1 : Create Done !!! [DSP1 ] 25.945617 s: IPC_IN_2 : Create in progress !!! [DSP1 ] 25.946044 s: IPC_IN_2 : Create Done !!! [EVE2 ] 25.946471 s: IPC_IN_0 : Create in progress !!! [EVE2 ] 25.947355 s: IPC_IN_0 : Create Done !!! [EVE2 ] 25.947904 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE3 ] 25.944000 s: ALGORITHM: Create Done (algId = 14) !!! [EVE3 ] 25.944793 s: IPC_OUT_0 : Create in progress !!! [EVE3 ] 25.945220 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 27.617001 s: IPC_IN_1 : Create in progress !!! [DSP1 ] 27.617458 s: IPC_IN_1 : Create Done !!! [EVE1 ] 27.617855 s: IPC_IN_0 : Create in progress !!! [EVE1 ] 27.618739 s: IPC_IN_0 : Create Done !!! [EVE1 ] 27.619471 s: ALGORITHM: Create in progress (algId = 14) !!! [EVE2 ] 27.615537 s: ALGORITHM: Create Done (algId = 14) !!! [EVE2 ] 27.616147 s: IPC_OUT_0 : Create in progress !!! [EVE2 ] 27.616604 s: IPC_OUT_0 : Create Done !!! [HOST ] 27.617580 s: IPC_OUT_0 : Create in progress !!! [HOST ] 27.617611 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 29.286006 s: IPC_IN_0 : Create in progress !!! [DSP1 ] 29.286585 s: IPC_IN_0 : Create Done !!! [DSP1 ] 29.286921 s: ALGORITHM: Create in progress (algId = 36) !!! [DSP1 ] 29.294119 s: ALGORITHM: Create Done (algId = 36) !!! [DSP1 ] 29.294271 s: IPC_OUT_0 : Create in progress !!! [DSP1 ] 29.294332 s: IPC_OUT_0 : Create Done !!! [DSP1 ] 29.870432 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 29.870493 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65600 B (64 KB) [DSP1 ] 29.870524 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 497720 B (486 KB) [DSP2 ] 29.870676 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP2 ] 29.870707 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 29.870737 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) [EVE1 ] 29.284572 s: ALGORITHM: Create Done (algId = 14) !!! [EVE1 ] 29.285182 s: IPC_OUT_0 : Create in progress !!! [EVE1 ] 29.285609 s: IPC_OUT_0 : Create Done !!! [EVE1 ] 29.871073 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE1 ] 29.871347 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE1 ] 29.871835 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) [EVE2 ] 29.872811 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE2 ] 29.873086 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE2 ] 29.873574 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) [EVE3 ] 29.874428 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE3 ] 29.874702 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE3 ] 29.875190 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) [EVE4 ] 29.875983 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE4 ] 29.876258 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) [EVE4 ] 29.876746 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) [IPU2 ] 29.877478 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU2 ] 29.877600 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) [IPU1-0] 29.294454 s: IPC_IN_0 : Create in progress !!! [IPU1-0] 29.295491 s: IPC_IN_0 : Create Done !!! [IPU1-0] 29.296559 s: ALGORITHM: Create in progress (algId = 1) !!! [IPU1-0] 29.297779 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) [IPU1-0] 29.297901 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) [IPU1-0] 29.315104 s: ALGORITHM: Create Done (algId = 1) !!! [IPU1-0] 29.315348 s: DISPLAY: Create in progress !!! [IPU1-0] 29.315897 s: DISPLAY: Create Done !!! [IPU1-0] 29.316263 s: GRPXSRC: Create in progress !!! [IPU1-0] 29.867595 s: GRPXSRC: Create Done !!! [IPU1-0] 29.867992 s: DISPLAY: Create in progress !!! [IPU1-0] 29.868510 s: DISPLAY: Create Done !!! [IPU1-0] 29.868815 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-0] 29.868937 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 242664 B (236 KB) [IPU1-0] 29.869090 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 29.869273 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 368037888 B (350 MB), Free size = 163697664 B (156 MB) [IPU1-0] 29.869456 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 29.877874 s: DISPLAY: Start in progress !!! [IPU1-0] 29.878027 s: DISPLAY: Start Done !!! [IPU1-0] 29.887482 s: DISPLAY: Start in progress !!! [IPU1-0] 29.887543 s: DISPLAY: Start Done !!! [IPU1-0] 29.895534 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Stop Chain [IPU1-0] [IPU1-0] 1: Pause Chain [IPU1-0] 2: Resume Chain [IPU1-0] [IPU1-0] p: Print Statistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 29.926432 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 29.926554 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 29.926645 s: DEC_LINK: Sequence called number 1 [IPU1-0] 29.959403 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 29.959525 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 29.959616 s: DEC_LINK: Sequence called number 2 [IPU1-0] 29.992405 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 29.992649 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 29.992771 s: DEC_LINK: Sequence called number 3 [IPU1-0] 30.025407 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.025529 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.025620 s: DEC_LINK: Sequence called number 4 [IPU1-0] 30.058409 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.058531 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.058653 s: DEC_LINK: Sequence called number 5 [IPU1-0] 30.091410 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.091532 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.091624 s: DEC_LINK: Sequence called number 6 [IPU1-0] 30.124412 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.124534 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.124626 s: DEC_LINK: Sequence called number 7 [IPU1-0] 30.157414 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.157506 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.157628 s: DEC_LINK: Sequence called number 8 [IPU1-0] 30.190416 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.190538 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.190630 s: DEC_LINK: Sequence called number 9 [IPU1-0] 30.223418 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.223540 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.223632 s: DEC_LINK: Sequence called number 10 [IPU1-0] 30.256420 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.256511 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.256633 s: DEC_LINK: Sequence called number 11 [IPU1-0] 30.289483 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.289605 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.289696 s: DEC_LINK: Sequence called number 12 [IPU1-0] 30.322454 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.322576 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.322668 s: DEC_LINK: Sequence called number 13 [IPU1-0] 30.355456 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.355578 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.355700 s: DEC_LINK: Sequence called number 14 [IPU1-0] 30.388427 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.388519 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.388641 s: DEC_LINK: Sequence called number 15 [IPU1-0] 30.421490 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.421612 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.421704 s: DEC_LINK: Sequence called number 16 [IPU1-0] 30.454431 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.454523 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.454645 s: DEC_LINK: Sequence called number 17 [IPU1-0] 30.487403 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.487525 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.487647 s: DEC_LINK: Sequence called number 18 [IPU1-0] 30.520435 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.520527 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.520649 s: DEC_LINK: Sequence called number 19 [IPU1-0] 30.553467 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.553589 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.553681 s: DEC_LINK: Sequence called number 20 [IPU1-0] 30.586408 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 30.586530 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 30.586622 s: DEC_LINK: Sequence called number 21 Any solution on this problem? Thanks!! + +Responses: +Hi, Can you try to play the same files using the NullSrc decode display usecase? I guess there is some issue in your input files. Please test it with above mentioed usecase and check whether are you getting the same decoder error. Regards, Anuj + +Hello Anuj, Thanks for your reply. According to your suggestion, below is what I do, 1. I put these 4 files in my SD card: MLO, AppImage, inData_OD, inHeader_OD(these two are the same file I tried to run TIDL_OD usecase). 2. I boot the SD card, and choose "1" for Single Camera Usecase, then "n" for NullSrc(File IO) + Decode + Display, then "1" for H.264, the next, I tried to run all the three Output Choices(Memory Dump, File Write, Return Buffer), the results are the same. Here is the log from my terminal: [IPU1-0] Vision SDK Usecases, [IPU1-0] -------------------- [IPU1-0] 1: Single Camera Usecases [IPU1-0] 2: Multi-Camera LVDS Usecases [IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) [IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) [IPU1-0] 5: ISS Usecases, (TDA3x ONLY) [IPU1-0] 6: TDA2x Stereo Usecases [IPU1-0] 7: Network RX/TX Usecases [IPU1-0] 9: RADAR Usecases [IPU1-0] a: Miscellaneous test's [IPU1-0] f: TIDL Usecase [IPU1-0] g: Camera Radar Combo Usecases [IPU1-0] [IPU1-0] s: System Settings [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-1] 16.771548 s: NETWORK_CTRL: Starting Server (port=5000) !!! [IPU1-1] 16.771823 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [IPU1-0] 22.893369 s: [IPU1-0] 22.893521 s: [IPU1-0] [IPU1-0] Single Camera Usecases [IPU1-0] ------------------------ [IPU1-0] 1: 1CH VIP capture + Display [IPU1-0] 2: 1CH VIP capture + Alg Frame Copy (DSP1) + Display [IPU1-0] 3: 1CH VIP capture + Alg Frame Copy (EVE1) + Display [IPU1-0] 4: 1CH VIP capture + Alg Frame Copy (A15) + Display [IPU1-0] 5: 1CH VIP capture + Edge Detect (EVE1) + Display [IPU1-0] 6: 1CH VIP capture + Dense Optical Flow (EVEx) + Display (HDMI) [IPU1-0] 7: 1CH VIP capture (HDMI) + Sparse Optical Flow (EVE1) + Display [IPU1-0] 8: 1CH VIP capture + Alg Subframe Copy (EVE1) + Display [IPU1-0] a: 1CH VIP capture + ENC + DEC + VPE + Display [IPU1-0] b: 1CH VIP capture (HDMI) + Lane Detect (DSP1 + EVE1) + Display [IPU1-0] c: 1CH VIP capture (HDMI) + SOF (EVE1) + SFM (DSP1) + Display [IPU1-0] d: 1CH VIP capture (HDMI) + Traffic Light Recognition (TLR) (DSP1) + Display [IPU1-0] e: 1CH VIP capture (HDMI) + Pedestrian, Traffic Sign, Vehicle Detect 2 (EVE1 + DSP1) + Display [IPU1-0] f: 1CH VIP capture (HDMI) + FrontCam Analytics 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx, EVEx) + Display (HDMI) [IPU1-0] g: 1CH VIP capture + QM Alg Frame Copy with FFI (DSP1) + Display [IPU1-0] h: 1CH VIP capture + QM Alg Frame Copy with FFI (EVE1) + Display (TDA3x only) [IPU1-0] i: 1CH VIP capture + Safe Frame Copy (A15) + Display [IPU1-0] n: NullSrc (File IO) + Decode + Display [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 27.460745 s: [IPU1-0] 27.460836 s: [IPU1-0] [IPU1-0] ========================================= [IPU1-0] Chains Run-time Codec Type Selection Menu [IPU1-0] ========================================= [IPU1-0] [IPU1-0] Enter '0' for MJPEG [IPU1-0] [IPU1-0] Enter '1' for H.264 [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 30.279875 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Select Null Link Output [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: Memory Dump [IPU1-0] [IPU1-0] 1: File Write [IPU1-0] [IPU1-0] 2: Return Buffer [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 33.725919 s: Assertion @ Line: 1364 in nullSrcLink_tsk.c: pObj->fpDataStream[chId] != SYSTEM_LINK_STATUS_EFAIL : failed !!! [IPU1-0] 33.726529 s: Assertion @ Line: 1364 in nullSrcLink_tsk.c: pObj->fpDataStream[chId] != SYSTEM_LINK_STATUS_EFAIL : failed !!! [IPU1-1] 179.615293 s: Service Status: DHCPC : Enabled : Fault : 002 I'm still a green hand on TDA, so did I do anything wrong here? And I was wondering if this could cause the problem, I use windows 7 (tda2xx_evm_bios_all) to compile VSDK while I use Ubuntu 14.04 to generate the inData_OD and inHeader_OD files, will the OS cause the decoding problem? + +Hi, The usecase you are trying that needs to be modified. That usecase is looking for some input file which are not present in sd card. So you to modify the usecase , input file names and the input resolution also. Please try only option 2.(Return buffer).That will be sufficient. Regards, Anuj + +Hello Anuj, Thanks for your suggestion. I have modified the resolution and filename in the ./null_src_dec_display/chains_nullSrcDecDisplay.c, and the same encoding problem happens again, below is the log: 27.000305 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 27.000396 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 27.000518 s: DEC_LINK: Sequence called number 1 [IPU1-0] 27.032269 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 27.032391 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 27.032483 s: DEC_LINK: Sequence called number 2 [IPU1-0] 27.064295 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 27.064417 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 [IPU1-0] 27.064509 s: DEC_LINK: Sequence called number 3 [IPU1-0] 27.096260 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00004400) !!! [IPU1-0] 27.096382 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x4400 Like you previously said, the input file cause this issue, then how should I get the things through? My original input file is .MP4, the dimension is 1920 * 1080 (which is the resolution I modified in the chains_nullSrcDecDisplay.c), and I use ffmpeg(suggested from another thread) to generate the .h264 and .hdr file, is there any problem here? Below is the commands when I tried to generate the data files: Generate inData_OD(.h264): ffmpeg -i input.mp4 -y -c:v libx264 -vframes 30 outputfile.h264 Generate inHead_OD(.hdr): 1. ffprobe -show_packets ./outputfile.h264 >index.idx 2. PAT=size sed -n "/$PAT/p" index.idx | cut -d' ' -f3 >> size_extracted.txt 3. cat size_extracted.txt | perl -n -e 'printf("%08x\n",$_)' | sed 's/\(..\)\(..\)\(..\)\(..\)/0x\4\n0x\3\n0x\2\n0x\1/' | xxd -r -p > Size_test.bin && du -b Size_test.bin Compress the video(for smaller dimension): ffmpeg -y -i input.mp4 -s 768*320 -vcodec libx264 -preset fast -b 800000 output.mp4 + +Hi, If you are compressing the input video then you have to generate the .hdr file again. And please provide the compressed resolution as input, not the original one. Regards, Anuj + +Sorry, I did't make myself clear just now, I compress the video first and then I generate the .hdr and .h264 file + +And I also use the compressed resolution as input. But the problem is like I talked above. + +Hi, Can you 1st play your mp4 file in vlc and check the codec information. Whether your mp4 file contain h264 file or something else. If it contain h264 file then follow below steps. Can you use below command to generate .h264 file ffmpeg -i infile.mp4 -an -vcodec libx264 -crf 23 outfile.h264 and first play the .h264 file using ffmpeg only . Then create the .hdr file and use both files as input. For now please done scale it 768*320. Use it original resolution as input resolution. Regards, Anuj + +Hi Anuj， Thank you for your reply. I play my original mp4 file(dimension 1920 * 1080) in vlc, and according to the codec information, the codec of my MP4 video stream is : H264-MPEG-AVC, and then I generated the h264 using the command you provided except I changed 23 to 30(the frame rate of my video). Then I prepared the required files for both nullSrcDecDisplay and TIDL_OD in my SD card, for the nullSrcDecDisplay usecase, I'm still getting the decode error...like previously, for the TIDL_OD usecase, I'm getting a different error: [IPU1-0] 65.571005 s: IPC_IN_0 : Create in progress !!! [IPU1-0] 65.572012 s: IPC_IN_0 : Create Done !!! [IPU1-0] 65.573110 s: ALGORITHM: Create in progress (algId = 1) !!! [IPU1-0] 65.574330 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) [IPU1-0] 65.574452 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) [IPU1-0] 65.712560 s: ALGORITHM: Create Done (algId = 1) !!! [IPU1-0] 65.712743 s: DISPLAY: Create in progress !!! [IPU1-0] 65.713017 s: dispcore/src/vpscore_dss.c @ Line 1407: [IPU1-0] 65.713170 s: Input width+posx/height+posy > display width /height [IPU1-0] 65.713292 s: dispdrv/src/vpsdrv_displayCore.c @ Line 304: [IPU1-0] 65.713353 s: Set DSS parameter failed [IPU1-0] 65.713414 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! [IPU1-0] 65.713871 s: Assertion @ Line: 459 in displayLink_drv.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! Is there any dispaly parameter that I need to change in order to display the video? Thanks. + +Hi, Please use the default display params as it was earlier in TIDL usecase. If you are still getting the decode error then there must be some issue with the input file. Please use some other file. Regards, Anuj + diff --git a/data2/text/range/30001+/758347.txt b/data2/text/range/30001+/758347.txt new file mode 100644 index 0000000000000000000000000000000000000000..93fb1985de45b1e7401dff6f11de939d50b8b3a9 --- /dev/null +++ b/data2/text/range/30001+/758347.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: Login incorrect + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux i am useing tda2 evm PROCESSOR_SDK_VISION_03_04_00_00 my uenv file is follow fdtfile=dra7-evm-infoadas.dtb args_mmc=setenv bootargs 'console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.25:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M' Yesterday was normal. Today there are problems Login incorrect this is the log [ 0.591112] io scheduler cfq registered (default) [ 0.595966] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599205] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599218] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599252] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599272] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629321] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629498] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629511] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629521] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.629530] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.629930] PCI: bus0: Fast back to back transfers disabled [ 0.630054] PCI: bus1: Fast back to back transfers enabled [ 0.630137] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630152] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630165] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630382] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.690757] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.694073] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.707078] console [ttyS0] enabled [ 1.711468] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.721162] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.731218] [drm] Initialized drm 1.1.0 20060810 [ 1.736723] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.743409] [drm] No driver support for vblank timestamp query. [ 1.749572] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.756726] OMAP DSS rev 6.1 [ 1.760512] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.776273] loop: module loaded [ 1.779854] vmemexp device MAJOR num = 245 [ 1.783982] vmemexp class registered [ 1.787712] /dev/vmemexp device registered [ 1.791828] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.797545] nand: No NAND device found [ 1.801315] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.811238] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.816636] 7 ofpart partitions found on MTD device spi32766.0 [ 1.822518] Creating 7 MTD partitions on "spi32766.0": [ 1.827695] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.833832] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.840203] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.847126] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.853783] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.861173] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.867511] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.875238] libphy: Fixed MDIO Bus: probed [ 1.927088] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.933214] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.943774] libphy: 48485000.mdio: probed [ 1.947849] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.955888] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.964615] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.971316] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.978328] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.986945] mousedev: PS/2 mouse device common for all mice [ 1.993155] i2c /dev entries driver [ 2.001938] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.007583] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.013968] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.020536] evm_3v3_sw: supplied by sysen1 [ 2.100848] mmc0: MAN_BKOPS_EN bit is not set [ 2.112813] mmc0: new HS200 MMC card at address 0001 [ 2.128280] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.143087] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.149309] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.178947] ledtrig-cpu: registered to indicate activity on CPUs [ 2.190466] aic_dvdd: supplied by evm_3v3_sw [ 2.196387] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.204062] NET: Registered protocol family 10 [ 2.210537] sit: IPv6 over IPv4 tunneling driver [ 2.215723] NET: Registered protocol family 17 [ 2.220429] Key type dns_resolver registered [ 2.224851] omap_voltage_late_init: Voltage driver support not added [ 2.231753] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.237981] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.244671] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.250954] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.259183] Power Management for TI OMAP4+ devices. [ 2.264241] Registering SWP/SWPB emulation handler [ 2.270026] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.277242] dmm 4e000000.dmm: initialized all PAT entries [ 2.284528] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.291203] [drm] No driver support for vblank timestamp query. [ 2.297529] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.304356] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.348388] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.366647] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.373552] hctosys: unable to open rtc device (rtc0) [ 2.386960] net eth0: initializing cpsw version 1.15 (0) [ 2.392350] net eth0: initialized cpsw ale version 1.4 [ 2.397538] net eth0: ALE Table size 1024 [ 2.408755] net eth0: phy found : id is : 0x20005c7a [ 2.419803] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 2.425681] net eth1: initializing cpsw version 1.15 (0) [ 2.437872] net eth1: phy found : id is : 0x20005c7a [ 2.447486] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 2.607084] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.622142] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.629124] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.638837] mmcblk1: p1 p2 [ 4.414668] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 4.427093] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 4.447077] Sending DHCP requests ., OK [ 4.597075] IP-Config: Got DHCP answer from 172.17.192.1, my address is 172.17.218.40 [ 4.610692] IP-Config: Complete: [ 4.613939] device=eth0, hwaddr=7c:38:66:a1:e2:a6, ipaddr=172.17.218.40, mask=255.255.224.0, gw=172.17.192.1 [ 4.624272] host=172.17.218.40, domain=apac.arcsoft.corp, nis-domain=(none) [ 4.631718] bootserver=172.17.11.203, rootserver=172.17.218.25, rootpath= [ 4.638814] nameserver0=172.17.10.20, nameserver1=172.17.10.31 [ 4.645449] evm_1v8: disabling [ 4.648558] aic_dvdd: disabling [ 4.651714] vmmcwl_fixed: disabling [ 4.655427] ldousb: disabling [ 4.658946] ALSA device list: [ 4.661928] #0: DRA7xx-EVM [ 99.720593] VFS: Unable to mount root fs via NFS, trying floppy. [ 99.726869] VFS: Cannot open root device "nfs" or unknown-block(2,0): error -6 [ 99.734143] Please append a correct "root=" boot option; here are the available partitions: [ 99.742560] 1f00 256 mtdblock0 (driver?) [ 99.747658] 1f01 1024 mtdblock1 (driver?) [ 99.752744] 1f02 512 mtdblock2 (driver?) [ 99.758108] 1f03 64 mtdblock3 (driver?) [ 99.763196] 1f04 64 mtdblock4 (driver?) [ 99.768294] 1f05 8192 mtdblock5 (driver?) [ 99.773378] 1f06 22656 mtdblock6 (driver?) [ 99.778476] b300 7602176 mmcblk0 driver: mmcblk [ 99.783821] b320 8192 mmcblk0boot1 (driver?) [ 99.789178] b310 8192 mmcblk0boot0 (driver?) [ 99.794520] b330 7761920 mmcblk1 driver: mmcblk [ 99.799916] b331 262144 mmcblk1p1 2ca9f500-01 [ 99.805272] b332 7498752 mmcblk1p2 2ca9f500-02 [ 99.810649] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0) [ 99.818956] CPU1: stopping [ 99.821680] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.4.84-00027-g018eb62 #4 [ 99.828931] Hardware name: Generic DRA74X (Flattened Device Tree) [ 99.835049] Backtrace: [ 99.837528] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 99.845129] r7:ef0abf40 r6:20000193 r5:00000000 r4:c0953590 [ 99.850857] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 99.858114] [] (dump_stack) from [] (handle_IPI+0x184/0x198) [ 99.865538] r7:ef0abf40 r6:00000000 r5:00000001 r4:c093140c [ 99.871259] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) [ 99.878858] r7:fa212000 r6:ef0abf40 r5:fa21200c r4:c09368e4 [ 99.884576] [] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) [ 99.892090] Exception stack(0xef0abf40 to 0xef0abf88) [ 99.897167] bf40: 00000001 00000000 fe600000 00000000 ef0aa000 c068c28c 00000000 c0824a3c [ 99.905380] bf60: 00000000 ef0abfb0 c0936504 ef0abf9c ef0abf7c ef0abf90 c00284a8 c0010720 [ 99.913591] bf80: 60000013 ffffffff [ 99.917090] r9:ef0abfb0 r8:00000000 r7:ef0abf74 r6:ffffffff r5:60000013 r4:c0010720 [ 99.924920] [] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) [ 99.933051] [] (default_idle_call) from [] (cpu_startup_entry+0x208/0x264) [ 99.941703] [] (cpu_startup_entry) from [] (secondary_start_kernel+0x164/0x170) [ 99.950784] r7:c09852a8 [ 99.953336] [] (secondary_start_kernel) from [<800095cc>] (0x800095cc) [ 99.960760] r7:c09852a8 r6:10c0387d r5:00000051 r4:af09006a [ 99.966482] ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0) OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 239 bytes read in 2 ms (116.2 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3560088 bytes read in 118 ms (28.8 MiB/s) 106875 bytes read in 18 ms (5.7 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x365298 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff17a ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00027-g018eb62 (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #4 SMP PREEMPT Wed Dec 19 17:14:56 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0xbe400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef630000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.25:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 411856K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364336K reserved, 204800K cma-reserved, 235520K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) [ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) [ 0.000000] .data : 0xc0934000 - 0xc09839e0 ( 319 kB) [ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000339] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000347] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000803] Console: colour dummy device 80x30 [ 0.000820] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000827] This ensures that you still see kernel messages. Please [ 0.000832] update your kernel commandline. [ 0.000845] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000857] pid_max: default: 32768 minimum: 301 [ 0.000954] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000964] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001506] Initializing cgroup subsys io [ 0.001522] Initializing cgroup subsys memory [ 0.001548] Initializing cgroup subsys devices [ 0.001561] Initializing cgroup subsys freezer [ 0.001572] Initializing cgroup subsys perf_event [ 0.001583] Initializing cgroup subsys pids [ 0.001609] CPU: Testing write buffer coherency: ok [ 0.001815] /cpus/cpu@0 missing clock-frequency property [ 0.001830] /cpus/cpu@1 missing clock-frequency property [ 0.001840] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001884] Setting up static identity map for 0x80008340 - 0x800083a0 [ 0.080187] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080256] Brought up 2 CPUs [ 0.080268] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080275] CPU: All CPU(s) started in HYP mode. [ 0.080280] CPU: Virtualization extensions available. [ 0.081311] devtmpfs: initialized [ 0.110840] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.111798] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.316620] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.316644] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.320666] pinctrl core: initialized pinctrl subsystem [ 0.321527] NET: Registered protocol family 16 [ 0.322456] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350262] cpuidle: using governor ladder [ 0.380292] cpuidle: using governor menu [ 0.388871] OMAP GPIO hardware version 0.1 [ 0.395431] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.411967] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.411980] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 0.421559] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.421569] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.422039] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.422048] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.422528] OMAP DMA hardware revision 0.0 [ 0.461481] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462642] edma 43300000.edma: memcpy is disabled [ 0.467293] edma 43300000.edma: TI EDMA DMA engine driver [ 0.471623] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.471800] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.471956] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472109] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472407] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.472597] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.475646] palmas 0-0058: IRQ missing: skipping irq request [ 0.491044] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.563361] pcf857x 0-0020: probed [ 0.563923] pcf857x 0-0021: probed [ 0.564078] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.564479] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.564684] media: Linux media interface: v0.10 [ 0.564737] Linux video capture interface: v2.00 [ 0.564777] pps_core: LinuxPPS API ver. 1 registered [ 0.564784] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.564813] PTP clock support registered [ 0.564858] EDAC MC: Ver: 3.0.0 [ 0.565619] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.565907] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.566260] Advanced Linux Sound Architecture Driver Initialized. [ 0.567123] clocksource: Switched to clocksource arch_sys_counter [ 0.577724] NET: Registered protocol family 2 [ 0.578225] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.578288] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.578413] TCP: Hash tables configured (established 8192 bind 8192) [ 0.578461] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.578492] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.578692] NET: Registered protocol family 1 [ 0.578955] RPC: Registered named UNIX socket transport module. [ 0.578965] RPC: Registered udp transport module. [ 0.578971] RPC: Registered tcp transport module. [ 0.578977] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.580000] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.588933] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.589569] NFS: Registering the id_resolver key type [ 0.589597] Key type id_resolver registered [ 0.589605] Key type id_legacy registered [ 0.589672] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.590954] bounce: pool size: 64 pages [ 0.591100] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.591114] io scheduler noop registered [ 0.591125] io scheduler deadline registered [ 0.591155] io scheduler cfq registered (default) [ 0.596006] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.599312] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.599325] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.599359] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.599380] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.629535] dra7-pcie 51000000.pcie_rc: link is not up [ 0.629712] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.629725] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.629736] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.629745] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.630146] PCI: bus0: Fast back to back transfers disabled [ 0.630268] PCI: bus1: Fast back to back transfers enabled [ 0.630353] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.630368] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.630380] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.630598] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.690627] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.693959] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.706942] console [ttyS0] enabled [ 1.711345] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.721040] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.731092] [drm] Initialized drm 1.1.0 20060810 [ 1.736605] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.743291] [drm] No driver support for vblank timestamp query. [ 1.749453] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.756611] OMAP DSS rev 6.1 [ 1.760395] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [ 1.776111] loop: module loaded [ 1.779688] vmemexp device MAJOR num = 245 [ 1.783816] vmemexp class registered [ 1.787545] /dev/vmemexp device registered [ 1.791661] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.797377] nand: No NAND device found [ 1.801147] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [ 1.811058] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.816454] 7 ofpart partitions found on MTD device spi32766.0 [ 1.822336] Creating 7 MTD partitions on "spi32766.0": [ 1.827518] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.833654] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.840026] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.846932] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.853604] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.860996] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.867343] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.875068] libphy: Fixed MDIO Bus: probed [ 1.927157] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.933281] davinci_mdio 48485000.mdio: detected phy mask fffffff3 [ 1.943841] libphy: 48485000.mdio: probed [ 1.947913] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown [ 1.955954] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown [ 1.964670] cpsw 48484000.ethernet: Detected MACID = 7c:38:66:a1:e2:a6 [ 1.971371] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 1.978385] cpsw 48484000.ethernet: cpsw: Detected MACID = 7c:38:66:a1:e2:a7 [ 1.987006] mousedev: PS/2 mouse device common for all mice [ 1.993215] i2c /dev entries driver [ 2.001995] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.007644] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.014028] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.020590] evm_3v3_sw: supplied by sysen1 [ 2.100914] mmc0: MAN_BKOPS_EN bit is not set [ 2.112843] mmc0: new HS200 MMC card at address 0001 [ 2.128309] mmcblk0: mmc0:0001 MMC08G 7.25 GiB [ 2.143108] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB [ 2.149325] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB [ 2.179008] ledtrig-cpu: registered to indicate activity on CPUs [ 2.190516] aic_dvdd: supplied by evm_3v3_sw [ 2.196453] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 2.204133] NET: Registered protocol family 10 [ 2.210613] sit: IPv6 over IPv4 tunneling driver [ 2.215799] NET: Registered protocol family 17 [ 2.220498] Key type dns_resolver registered [ 2.224919] omap_voltage_late_init: Voltage driver support not added [ 2.231820] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.238049] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.244742] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.251024] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.259296] Power Management for TI OMAP4+ devices. [ 2.264354] Registering SWP/SWPB emulation handler [ 2.270129] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.277337] dmm 4e000000.dmm: initialized all PAT entries [ 2.284623] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.291300] [drm] No driver support for vblank timestamp query. [ 2.297625] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.304453] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.348455] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.360635] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.367544] hctosys: unable to open rtc device (rtc0) [ 2.380988] net eth0: initializing cpsw version 1.15 (0) [ 2.386338] net eth0: initialized cpsw ale version 1.4 [ 2.391536] net eth0: ALE Table size 1024 [ 2.402788] net eth0: phy found : id is : 0x20005c7a [ 2.413816] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 2.419730] net eth1: initializing cpsw version 1.15 (0) [ 2.431911] net eth1: phy found : id is : 0x20005c7a [ 2.441557] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 2.596982] mmc2: host does not support reading read-only switch, assuming write-enable [ 2.612189] mmc2: new ultra high speed DDR50 SDHC card at address aaaa [ 2.619148] mmcblk1: mmc2:aaaa SS08G 7.40 GiB [ 2.628870] mmcblk1: p1 p2 [ 4.404728] cpsw 48484000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 4.412802] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 4.427148] Sending DHCP requests ., OK [ 4.487154] IP-Config: Got DHCP answer from 172.17.192.1, my address is 172.17.218.40 [ 4.500231] IP-Config: Complete: [ 4.503477] device=eth0, hwaddr=7c:38:66:a1:e2:a6, ipaddr=172.17.218.40, mask=255.255.224.0, gw=172.17.192.1 [ 4.513827] host=172.17.218.40, domain=apac.arcsoft.corp, nis-domain=(none) [ 4.521296] bootserver=172.17.11.203, rootserver=172.17.218.25, rootpath= [ 4.528442] nameserver0=172.17.10.20, nameserver1=172.17.10.31 [ 4.535080] evm_1v8: disabling [ 4.538167] aic_dvdd: disabling [ 4.541322] vmmcwl_fixed: disabling [ 4.545036] ldousb: disabling [ 4.548565] ALSA device list: [ 4.551547] #0: DRA7xx-EVM [ 39.639604] VFS: Mounted root (nfs filesystem) on device 0:15. [ 39.658037] devtmpfs: mounted [ 39.661237] Freeing unused kernel memory: 332K [ 39.665700] This architecture does not have kernel memory protection. [ 40.511487] systemd[1]: System time before build time, advancing clock. [ 40.669926] random: nonblocking pool is initialized [ 40.698080] systemd[1]: Configuration file /etc/systemd/system.conf is marked executable. Please remove executable permission bits. Proceeding anyway. [ 40.711639] systemd[1]: Configuration file /etc/systemd/system.conf is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 40.750892] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [ 40.769675] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 40.833217] systemd[1]: Set hostname to . [ 41.028010] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/run-postinsts.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.044529] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/run-postinsts.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.096987] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/alsa-state.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.113189] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/alsa-state.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.138121] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/busybox-syslog.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.154667] systemd-sysv-generator[98]: Configuration file /lib/systemd/system/busybox-syslog.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.174936] systemd-sysv-generator[98]: Configuration file /etc/systemd/system/systemd-udevd.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.191420] systemd-sysv-generator[98]: Configuration file /etc/systemd/system/systemd-udevd.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.288136] systemd[1]: Configuration file /lib/systemd/system/remote-fs.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.302833] systemd[1]: Configuration file /lib/systemd/system/remote-fs.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.320105] systemd[1]: Configuration file /lib/systemd/system/shutdown.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.334648] systemd[1]: Configuration file /lib/systemd/system/shutdown.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.351667] systemd[1]: Configuration file /lib/systemd/system/remote-fs-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.366646] systemd[1]: Configuration file /lib/systemd/system/remote-fs-pre.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.386059] systemd[1]: Configuration file /lib/systemd/system/-.slice is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.399904] systemd[1]: Configuration file /lib/systemd/system/-.slice is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.416167] systemd[1]: Configuration file /lib/systemd/system/slices.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.430539] systemd[1]: Configuration file /lib/systemd/system/slices.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.447410] systemd[1]: Configuration file /lib/systemd/system/system.slice is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.461689] systemd[1]: Configuration file /lib/systemd/system/system.slice is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.490324] systemd[1]: Configuration file /lib/systemd/system/local-fs.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.504909] systemd[1]: Configuration file /lib/systemd/system/local-fs.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.523495] systemd[1]: Configuration file /lib/systemd/system/systemd-remount-fs.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.538976] systemd[1]: Configuration file /lib/systemd/system/systemd-remount-fs.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.557508] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.572718] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.592521] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.607822] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.627041] systemd[1]: Configuration file /lib/systemd/system/sysinit.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.641468] systemd[1]: Configuration file /lib/systemd/system/sysinit.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.662507] systemd[1]: Configuration file /lib/systemd/system/basic.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.676763] systemd[1]: Configuration file /lib/systemd/system/basic.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.694749] systemd[1]: Configuration file /lib/systemd/system/alsa-state.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.709527] systemd[1]: Configuration file /lib/systemd/system/alsa-state.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.726014] systemd[1]: Configuration file /lib/systemd/system/alsa-restore.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.740965] systemd[1]: Configuration file /lib/systemd/system/alsa-restore.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.758475] systemd[1]: Configuration file /lib/systemd/system/paths.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.772726] systemd[1]: Configuration file /lib/systemd/system/paths.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.789050] systemd[1]: Configuration file /lib/systemd/system/timers.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.803387] systemd[1]: Configuration file /lib/systemd/system/timers.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.821265] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.timer is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.836911] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.timer is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.855105] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.870927] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.891518] systemd[1]: Configuration file /lib/systemd/system/time-sync.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.906121] systemd[1]: Configuration file /lib/systemd/system/time-sync.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.923790] systemd[1]: Configuration file /lib/systemd/system/reboot.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.938131] systemd[1]: Configuration file /lib/systemd/system/reboot.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.960092] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp-runlevel.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 41.976439] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp-runlevel.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 41.996387] systemd[1]: Configuration file /lib/systemd/system/graphical.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.011013] systemd[1]: Configuration file /lib/systemd/system/graphical.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.046112] systemd[1]: Configuration file /lib/systemd/system/rescue.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.060541] systemd[1]: Configuration file /lib/systemd/system/rescue.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.080197] systemd[1]: Configuration file /lib/systemd/system/multi-user.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.094886] systemd[1]: Configuration file /lib/systemd/system/multi-user.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.119024] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.path is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.134849] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.path is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.153278] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.169364] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.192142] systemd[1]: Configuration file /lib/systemd/system/getty.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.206411] systemd[1]: Configuration file /lib/systemd/system/getty.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.224514] systemd[1]: Configuration file /etc/systemd/system/getty.target.wants/../../../../lib/systemd/system/getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.243301] systemd[1]: Configuration file /etc/systemd/system/getty.target.wants/../../../../lib/systemd/system/getty@.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.265237] systemd[1]: Configuration file /lib/systemd/system/rc-local.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.279837] systemd[1]: Configuration file /lib/systemd/system/rc-local.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.296885] systemd[1]: Configuration file /lib/systemd/system/network.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.311311] systemd[1]: Configuration file /lib/systemd/system/network.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.327897] systemd[1]: Configuration file /lib/systemd/system/network-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.342670] systemd[1]: Configuration file /lib/systemd/system/network-pre.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.360727] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.375763] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.394503] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.409539] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.426537] systemd[1]: Configuration file /lib/systemd/system/systemd-logind.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.441661] systemd[1]: Configuration file /lib/systemd/system/systemd-logind.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.459666] systemd[1]: Configuration file /lib/systemd/system/dbus.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.473830] systemd[1]: Configuration file /lib/systemd/system/dbus.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.490379] systemd[1]: Configuration file /lib/systemd/system/nss-user-lookup.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.505504] systemd[1]: Configuration file /lib/systemd/system/nss-user-lookup.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.524151] systemd[1]: Configuration file /lib/systemd/system/user.slice is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.538229] systemd[1]: Configuration file /lib/systemd/system/user.slice is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.554782] systemd[1]: Configuration file /lib/systemd/system/systemd-user-sessions.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.570537] systemd[1]: Configuration file /lib/systemd/system/systemd-user-sessions.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.588908] systemd[1]: Configuration file /lib/systemd/system/dbus.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.603159] systemd[1]: Configuration file /lib/systemd/system/dbus.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.622295] systemd[1]: Configuration file /lib/systemd/system/busybox-klogd.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.637331] systemd[1]: Configuration file /lib/systemd/system/busybox-klogd.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.654712] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.670008] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.688374] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.network1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.704370] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.network1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.723423] systemd[1]: Configuration file /lib/systemd/system/busnames.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.737935] systemd[1]: Configuration file /lib/systemd/system/busnames.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.755681] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.machine1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.771676] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.machine1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.790111] systemd[1]: Configuration file /lib/systemd/system/systemd-machined.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.805408] systemd[1]: Configuration file /lib/systemd/system/systemd-machined.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.824155] systemd[1]: Configuration file /lib/systemd/system/machine.slice is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.838493] systemd[1]: Configuration file /lib/systemd/system/machine.slice is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.855089] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.locale1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.870997] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.locale1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.890559] systemd[1]: Configuration file /lib/systemd/system/systemd-localed.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.905770] systemd[1]: Configuration file /lib/systemd/system/systemd-localed.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.923994] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.systemd1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.939990] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.systemd1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.958647] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.hostname1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 42.974732] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.hostname1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 42.993226] systemd[1]: Configuration file /etc/systemd/system/systemd-hostnamed.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.008631] systemd[1]: Configuration file /etc/systemd/system/systemd-hostnamed.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.026798] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.timedate1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.042880] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.timedate1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.061519] systemd[1]: Configuration file /lib/systemd/system/systemd-timedated.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.076904] systemd[1]: Configuration file /lib/systemd/system/systemd-timedated.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.096102] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.login1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.111924] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.login1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.130356] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.resolve1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.146351] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.resolve1.busname is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.164759] systemd[1]: Configuration file /lib/systemd/system/busybox-syslog.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.179885] systemd[1]: Configuration file /lib/systemd/system/busybox-syslog.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.197292] systemd[1]: Configuration file /lib/systemd/system/systemd-resolved.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.212589] systemd[1]: Configuration file /lib/systemd/system/systemd-resolved.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.264378] systemd[1]: Configuration file /lib/systemd/system/rescue.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.278738] systemd[1]: Configuration file /lib/systemd/system/rescue.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.297878] systemd[1]: Configuration file /lib/systemd/system/systemd-reboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.313004] systemd[1]: Configuration file /lib/systemd/system/systemd-reboot.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.331183] systemd[1]: Configuration file /lib/systemd/system/final.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.345434] systemd[1]: Configuration file /lib/systemd/system/final.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.362026] systemd[1]: Configuration file /lib/systemd/system/umount.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.376362] systemd[1]: Configuration file /lib/systemd/system/umount.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.394307] systemd[1]: Configuration file /lib/systemd/system/poweroff.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.408820] systemd[1]: Configuration file /lib/systemd/system/poweroff.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.426907] systemd[1]: Configuration file /lib/systemd/system/systemd-poweroff.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.442208] systemd[1]: Configuration file /lib/systemd/system/systemd-poweroff.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.461107] systemd[1]: Configuration file /etc/systemd/system/systemd-udevd.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.476143] systemd[1]: Configuration file /etc/systemd/system/systemd-udevd.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.493071] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-kernel.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.508631] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-kernel.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.526937] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-control.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.542585] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-control.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.560832] systemd[1]: Configuration file /lib/systemd/system/systemd-hwdb-update.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.576393] systemd[1]: Configuration file /lib/systemd/system/systemd-hwdb-update.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.594421] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-catalog-update.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.610939] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-catalog-update.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.631148] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.646727] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.664701] systemd[1]: Configuration file /lib/systemd/system/kmod-static-nodes.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.680086] systemd[1]: Configuration file /lib/systemd/system/kmod-static-nodes.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.698239] systemd[1]: Configuration file /lib/systemd/system/systemd-sysctl.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.713361] systemd[1]: Configuration file /lib/systemd/system/systemd-sysctl.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.732754] systemd[1]: Configuration file /lib/systemd/system/systemd-random-seed.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.748314] systemd[1]: Configuration file /lib/systemd/system/systemd-random-seed.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.767660] systemd[1]: Configuration file /lib/systemd/system/systemd-firstboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.783044] systemd[1]: Configuration file /lib/systemd/system/systemd-firstboot.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.800855] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.816677] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.860284] systemd[1]: Configuration file /lib/systemd/system/systemd-udev-trigger.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.875934] systemd[1]: Configuration file /lib/systemd/system/systemd-udev-trigger.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.894230] systemd[1]: Configuration file /lib/systemd/system/sys-fs-fuse-connections.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.909965] systemd[1]: Configuration file /lib/systemd/system/sys-fs-fuse-connections.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.928419] systemd[1]: Configuration file /lib/systemd/system/systemd-vconsole-setup.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.944240] systemd[1]: Configuration file /lib/systemd/system/systemd-vconsole-setup.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.962615] systemd[1]: Configuration file /lib/systemd/system/systemd-update-done.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 43.978174] systemd[1]: Configuration file /lib/systemd/system/systemd-update-done.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 43.998372] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-debug.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.013518] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-debug.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.030962] systemd[1]: Configuration file /lib/systemd/system/dev-hugepages.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.045826] systemd[1]: Configuration file /lib/systemd/system/dev-hugepages.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.063274] systemd[1]: Configuration file /lib/systemd/system/systemd-machine-id-commit.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.079359] systemd[1]: Configuration file /lib/systemd/system/systemd-machine-id-commit.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.098062] systemd[1]: Configuration file /lib/systemd/system/ldconfig.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.112662] systemd[1]: Configuration file /lib/systemd/system/ldconfig.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.129839] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-flush.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.145572] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-flush.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.163868] systemd[1]: Configuration file /lib/systemd/system/systemd-modules-load.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.179515] systemd[1]: Configuration file /lib/systemd/system/systemd-modules-load.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.197693] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup-dev.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.213864] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup-dev.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.239926] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-config.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.255136] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-config.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.273009] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.path is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.289092] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.path is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.307660] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.324007] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.344240] systemd[1]: Configuration file /lib/systemd/system/dev-mqueue.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.358861] systemd[1]: Configuration file /lib/systemd/system/dev-mqueue.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.375994] systemd[1]: Configuration file /lib/systemd/system/run-postinsts.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.391032] systemd[1]: Configuration file /lib/systemd/system/run-postinsts.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.407779] systemd[1]: Configuration file /etc/systemd/system/sync-clocks.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.422639] systemd[1]: Configuration file /etc/systemd/system/sync-clocks.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.440030] systemd[1]: Configuration file /lib/systemd/system/systemd-timesyncd.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.455415] systemd[1]: Configuration file /lib/systemd/system/systemd-timesyncd.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.474270] systemd[1]: Configuration file /lib/systemd/system/swap.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.488435] systemd[1]: Configuration file /lib/systemd/system/swap.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.504915] systemd[1]: Configuration file /lib/systemd/system/emergency.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.519603] systemd[1]: Configuration file /lib/systemd/system/emergency.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.538445] systemd[1]: Configuration file /lib/systemd/system/syslog.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.552783] systemd[1]: Configuration file /lib/systemd/system/syslog.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.570231] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-audit.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.585964] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-audit.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.605256] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-dev-log.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.621164] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-dev-log.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.639836] systemd[1]: Configuration file /lib/systemd/system/sockets.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.654263] systemd[1]: Configuration file /lib/systemd/system/sockets.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.680234] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.695363] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.713191] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.728424] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.774293] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.socket is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.789507] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.socket is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.817615] systemd[1]: Configuration file /lib/systemd/system/tmp.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.831604] systemd[1]: Configuration file /lib/systemd/system/tmp.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.867027] systemd[1]: Configuration file /lib/systemd/system/var-lib-machines.mount is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.882153] systemd[1]: Configuration file /lib/systemd/system/var-lib-machines.mount is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.900652] systemd[1]: Configuration file /lib/systemd/system/systemd-fsck-root.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.916041] systemd[1]: Configuration file /lib/systemd/system/systemd-fsck-root.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.934386] systemd[1]: Configuration file /lib/systemd/system/var-volatile-lib.service is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.949687] systemd[1]: Configuration file /lib/systemd/system/var-volatile-lib.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.967301] systemd[1]: Configuration file /lib/systemd/system/emergency.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 44.981900] systemd[1]: Configuration file /lib/systemd/system/emergency.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 44.998779] systemd[1]: Configuration file /lib/systemd/system/local-fs-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. [ 45.013661] systemd[1]: Configuration file /lib/systemd/system/local-fs-pre.target is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ 45.034138] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 45.041938] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 45.049645] systemd[1]: sysinit.target: Found dependency on basic.target/start [ 45.056899] systemd[1]: sysinit.target: Found dependency on sockets.target/start [ 45.064341] systemd[1]: sysinit.target: Found dependency on dbus.socket/start [ 45.071521] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 45.078999] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 45.088449] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 45.119876] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 45.137295] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 45.157285] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 45.177817] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 45.199343] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 45.267289] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 45.303323] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 45.327571] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 45.357953] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 45.387382] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 45.417359] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 45.487469] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 45.517737] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 45.549635] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 45.647456] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 45.677571] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 45.707485] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 45.767465] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 45.798097] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 45.827367] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 45.847408] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 45.897526] systemd[1]: Starting Journal Service... Starting Journal Service... [ 45.917592] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 45.949643] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 45.960133] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 45.994466] systemd[1]: Mounted Debug File System. [ 45.999403] systemd-journald[153]: Configuration file /etc/systemd/journald.conf is marked executable. Please remove executable permission bits. Proceeding anyway. [ 46.014182] systemd-journald[153]: Configuration file /etc/systemd/journald.conf is marked world-writable. Please remove world writability permission bits. Proceeding anyway. [ OK ] Mounted Debug File System. [ 46.047511] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 46.067408] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 46.098117] systemd[1]: systemd-modules-load.service: Main process exited, code=exited, status=1/FAILURE [ 46.109119] systemd[1]: Failed to start Load Kernel Modules. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ 46.147452] systemd[1]: systemd-modules-load.service: Unit entered failed state. [ 46.154896] systemd[1]: systemd-modules-load.service: Failed with result 'exit-code'. [ 46.164208] systemd[1]: Started Remount Root and Kernel File Systems. [ OK ] Started Remount Root and Kernel File Systems. [ 46.188516] systemd[1]: Started Create list of required static device nodes for the current kernel. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ 46.218616] systemd[1]: Started Setup Virtual Console. [ OK ] Started Setup Virtual Console. [ 46.247783] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... Starting udev Coldplug all Devices... Starting Apply Kernel Variables... [ 46.755337] systemd-journald[153]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. Starting Create Volatile Files and Directories... [ OK ] Started udev Coldplug all Devices. [ OK ] Started Load/Save Random Seed. [ OK ] Started Create Volatile Files and Directories. Starting Update UTMP about System Boot/Shutdown... Starting Network Time Synchronization... [ 47.898261] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 47.925013] remoteproc0: 55020000.ipu is available [ 47.936171] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 47.965551] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 47.984574] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ OK ] Started Update UTMP about System Boot/Shutdown. [ 47.999045] remoteproc1: 40800000.dsp is available [ 48.016408] remoteproc1: Note: remoteproc is still under development and considered experimental. [ 48.026752] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Started Network Time Synchronization. [ 48.037934] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 48.051102] remoteproc2: 41000000.dsp is available [ 48.057060] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 48.073854] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... [ 48.706634] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 48.740022] remoteproc1: registered virtio0 (type 7) [ 48.745972] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ 48.786213] remoteproc2: registered virtio1 (type 7) [ OK ] Found device /dev/ttyS0. [FAILED] Failed to start Synchronize System and HW clocks. See 'systemctl status sync-clocks.service' for details. [ 48.986245] remoteproc0: registered virtio2 (type 7) [ OK ] Reached target System Initialization. [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ 49.087050] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ OK ] Started D-Bus System Message Bus. [ 49.690127] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 49.748299] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 49.765655] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 49.778078] CAN device driver interface [ 49.974819] SCSI subsystem initialized [ 49.981128] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) Starting Network Service... Starting rc.pvr.service... [ OK ] Started Kernel Logging Service. [ 50.812692] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 50.822950] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 50.858650] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 50.885471] EXT4-fs (mmcblk1p2): recovery complete Starting Permit User Sessions... [ 50.897826] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 50.919119] scsi host0: ahci [ 50.924697] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 Starting Save/Restore Sound Card State... [ 50.997377] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [ 51.011631] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. Starting Login Service... [ OK ] Started System Logging Service. [ 51.297155] ata1: SATA link down (SStatus 0 SControl 300) [ OK ] Started Network Service. [ OK ] Started Permit User Sessions. [ OK ] Started Save/Restore Sound Card State. [ 51.494449] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ OK ] Started rc.pvr.service. [ 52.155146] remoteproc1: powering up 40800000.dsp [ 52.170408] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2341503 [ 52.185969] omap_hwmod: mmu0_dsp1: _wait_target_disable failed [ 52.191859] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 [ 52.197818] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 [ 52.225857] remoteproc1: remote processor 40800000.dsp is now up [ 52.233283] virtio_rpmsg_bus virtio0: rpmsg host is online [ 52.240757] remoteproc2: powering up 41000000.dsp [ 52.267698] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2341503 [ 52.281814] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 52.287704] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 52.293641] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 52.313316] ------------[ cut here ]------------ [ 52.313365] remoteproc2: remote processor 41000000.dsp is now up [ 52.324083] WARNING: CPU: 0 PID: 222 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 52.333601] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER3_P3 (Read): Data Access in User mode during Functional access [ 52.345732] Modules linked in: dwc3(+) udc_core virtio_rpmsg_bus(+) bc_example(O) extcon_usb_gpio pvrsrvkm(O) ahci_platform libahci_platform libahci libata c_can_platform scsi_mod c_can can_dev omap_aes_driver omap_sham dwc3_omap extcon rtc_omap omap_des omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [ 52.375233] CPU: 0 PID: 222 Comm: systemd-udevd Tainted: G O 4.4.84-00027-g018eb62 #4 [ 52.384226] Hardware name: Generic DRA74X (Flattened Device Tree) [ 52.390342] Backtrace: [ 52.392810] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 52.400407] r7:c02dffc8 r6:200b0193 r5:00000000 r4:c0953590 [ 52.406117] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 52.413368] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 52.421488] r7:c02dffc8 r6:00000093 r5:00000009 r4:ee6c3a08 [ 52.427194] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 52.435925] r8:00000017 r7:c0848ccc r6:00000002 r5:c0848904 r4:c08489a8 [ 52.442682] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 52.451587] r3:ef206800 r2:c08489a8 [ 52.455184] r4:80080003 [ 52.457733] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 52.467073] r10:c0982c4b r9:ef1f4240 r8:00000017 r7:00000000 r6:00000000 r5:ef1f42a0 [ 52.474962] r4:ef206d00 [ 52.477511] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 52.486416] r10:00000001 r9:066665b0 r8:ef008000 r7:00000000 r6:c093bc84 r5:ef1f42a0 [ 52.494306] r4:ef1f4240 [ 52.496854] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 52.505410] r7:00000000 r6:c093bc84 r5:ef1f42a0 r4:ef1f4240 [ 52.511116] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 52.519758] r7:00000000 r6:00000000 r5:00000017 r4:c093140c [ 52.525465] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 52.534198] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 52.542580] r9:066665b0 r8:fa213000 r7:fa212000 r6:ee6c3bc8 r5:fa21200c r4:c09368e4 [ 52.550386] [] (gic_handle_irq) from [] (__irq_svc+0x54/0x90) [ 52.557896] Exception stack(0xee6c3bc8 to 0xee6c3c10) [ 52.562964] 3bc0: 0000113d 00000000 df54e710 c04fdd10 c09b7768 00001803 [ 52.571173] 3be0: 159f7037 0000005c c0953578 066665b0 00000001 ee6c3c24 ee6c3c28 ee6c3c18 [ 52.579382] 3c00: c0017844 c04fdd20 a00b0013 ffffffff [ 52.584449] r9:066665b0 r8:c0953578 r7:ee6c3bfc r6:ffffffff r5:a00b0013 r4:c04fdd20 [ 52.592259] [] (arch_counter_get_cntpct) from [] (arch_timer_read_counter_long+0x1c/0x20) [ 52.602214] [] (arch_timer_read_counter_long) from [] (__timer_delay+0x54/0x64) [ 52.611296] [] (__timer_delay) from [] (__timer_const_udelay+0x28/0x2c) [ 52.619677] r7:0000005c r6:ee638880 r5:ee65ca10 r4:ee406810 [ 52.625397] [] (__timer_const_udelay) from [] (dwc3_probe+0xf20/0x1938 [dwc3]) [ 52.634404] [] (dwc3_probe [dwc3]) from [] (platform_drv_probe+0x54/0xb8) [ 52.642960] r10:00000000 r9:d8c62748 r8:00000019 r7:fffffdfb r6:bf283c84 r5:ee65ca10 [ 52.650851] r4:c09bfa44 [ 52.653397] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) [ 52.662300] r7:bf283c84 r6:00000000 r5:ee65ca10 r4:c09bfa44 [ 52.668006] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 52.676474] r9:d8c62748 r8:2739d8dc r7:00000000 r6:ee65ca44 r5:bf283c84 r4:ee65ca10 [ 52.684281] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 52.692488] r7:00000000 r6:c03e9548 r5:bf283c84 r4:00000000 [ 52.698196] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 52.706227] r6:c0964310 r5:eda90880 r4:bf283c84 [ 52.710881] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 52.718917] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 52.727036] r7:d8c62700 r6:c09396f0 r5:bf29e000 r4:bf283c84 [ 52.732742] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) [ 52.741820] r5:bf29e000 r4:c0964310 [ 52.745428] [] (__platform_driver_register) from [] (dwc3_driver_init+0x1c/0x24 [dwc3]) [ 52.755205] r5:bf29e000 r4:c09396f0 [ 52.758813] [] (dwc3_driver_init [dwc3]) from [] (do_one_initcall+0x98/0x1e4) [ 52.767724] [] (do_one_initcall) from [] (do_init_module+0x68/0x394) [ 52.775843] r10:bf283d00 r9:d8c62748 r8:2739d8dc r7:00000001 r6:d8c62340 r5:00000001 [ 52.783732] r4:bf283d00 [ 52.786282] [] (do_init_module) from [] (load_module+0x1df8/0x2068) [ 52.794313] r6:d8c62740 r5:00000001 r4:ee6c3f44 [ 52.798966] [] (load_module) from [] (SyS_finit_module+0x88/0x98) [ 52.806823] r10:00000000 r9:ee6c2000 r8:c000fda4 r7:0000017b r6:b6dfdd90 r5:0000000f [ 52.814711] r4:00000000 [ 52.817259] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x3c) [ 52.825466] r6:00000000 r5:004b3928 r4:00000000 [ 52.830115] ---[ end trace 6367cc86190e24fb ]--- [ 52.834955] virtio_rpmsg_bus virtio1: rpmsg host is online [ 52.841920] remoteproc0: powering up 55020000.ipu [ 52.855484] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4612468 [ 52.866617] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 52.914724] remoteproc0: remote processor 55020000.ipu is now up [ 52.922200] virtio_rpmsg_bus virtio2: rpmsg host is online [ 53.126752] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 [ 53.134204] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [ 53.144677] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 [ 53.209001] NET: Registered protocol family 41 [ 53.524465] usbcore: registered new interface driver usbfs [ 53.530527] usbcore: registered new interface driver hub [ 53.536348] usbcore: registered new device driver usb [ 53.664179] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered [ 53.671491] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered [ 53.678689] dwc3 48890000.usb: otg: can't start till gadget registers [ 53.685441] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 53.691133] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 [ 53.699506] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 53.708377] xhci-hcd xhci-hcd.1.auto: irq 500, io mem 0x488d0000 [ 53.718578] hub 1-0:1.0: USB hub found [ 53.722454] hub 1-0:1.0: 1 port detected [ 53.726989] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller [ 53.732791] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 [ 53.740870] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 53.751050] hub 2-0:1.0: USB hub found [ 53.755044] hub 2-0:1.0: 1 port detected [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Reached target Sound Card. Starting weston.service... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Reached target Network. Starting Network Name Resolution... [ OK ] Started Login Service. [ OK ] Started weston.service. Starting telnetd.service... Starting tiipclad-daemon.service... [ OK ] Started Network Name Resolution. [ OK ] Started telnetd.service. [ OK ] Started tiipclad-daemon.service. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root Login incorrect dra7xx-evm login: ls Password: Login incorrect dra7xx-evm login: root Login incorrect dra7xx-evm login: i donot know what is wrong , thanks Shuai + +Responses: +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: root [ 64.197073] nfs: server 172.17.218.25 not responding, still trying [ 64.203667] nfs: server 172.17.218.25 OK Login incorrect dra7xx-evm login: [ 91.377066] nfs: server 172.17.218.25 not responding, still trying [ 91.384526] nfs: server 172.17.218.25 OK Login timed out after 60 seconds. _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org dra7xx-evm ttyS0 Arago 2016.12 dra7xx-evm ttyS0 dra7xx-evm login: why offen ( not responding, still trying) then a litter later ( nfs: server 172.17.218.25 OK)? thanks! Shuai + +Hi Shuai, Are you facing this issue even with the file-system on SD card and you enable SD-boot? Can you please extract the file-system once again and see if you're facing the same issue? Please make sure you're setting the correct path while building Vision-SDK. Its important that the file-system path is set correctly so that when kernel/u-boot/vision-SDK is built the changes are propagated to the file-system. Please follow all steps in the Vision-SDK Linux user-guide for more details. Regards Shravan + diff --git a/data2/text/range/30001+/759776.txt b/data2/text/range/30001+/759776.txt new file mode 100644 index 0000000000000000000000000000000000000000..510d21c4588510b645f6a287ede4147e7995c3a7 --- /dev/null +++ b/data2/text/range/30001+/759776.txt @@ -0,0 +1,56 @@ +Ticket Name: Linux/TDA2: Linux boot problem from Micro SD card + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PMP, DRA752, DRA72 Tool/software: Linux Hello, Have built the vision SDK for linux for the TDA2xx EVM5777BG Created the SD card. the two partitions viz boot and root are created and have the contents as mentioned in the user manual. When i try to boot the board with the micro SD card, i get the following errors on the UART console. i do not get the login prompt. Pls. advise. Thanks and Regards, ----------------------------------------------------------------------------------------------------------------------------------- U-Boot SPL 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39) DRA752-GP ES1.1 no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39 +0530) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 173 bytes read in 3 ms (55.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** File not found /boot/zImage ** ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => + +Responses: +Hi, zImage needs to be present in in root partition /boot folder. Can you confirm if it is available. + +Hi, I think you need to follow the steps here, looks like there is error in partition creation too: software-dl.ti.com/.../Overview_Getting_Started_Guide.html + +Hi Archit, can you stop at the u-boot prompt and run following commands: env default -f -a saveenv and try again? Regards, Yordan + +ZImage in present in the boot folder of the root file system. Also, i am using the SDK and documentation from the following link. http://www.ti.com/tool/PROCESSOR-SDK-TDAX THis seems different from the link suggested. Kindly advice. Regards, Archit Adwant + +Hi Archit, Yes, I missed to note it to be vision sdk. The link you are following is correct. Please make sure mmc device is correct. You can follow the step suggested by Yordan to jump to the default env and see. + +Hi, Tried the env default -f -a and the saveenv commands ( lines 206 and 210) in the attached log. Still the problem persists. I am using a smaller micro SD card currently. Only 2 GB, but the image is smaller, so seems to be sufficient. The targetfs tar is approx 800 MB. Kindly advise. Thanks and Regards, U-Boot SPL 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39) DRA752-GP ES1.1 no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39 +0530) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 173 bytes read in 3 ms (55.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** File not found /boot/zImage ** ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => U-Boot SPL 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39) DRA752-GP ES1.1 no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39 +0530) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 => env default -f -a ## Resetting to default environment => saveend Unknown command 'saveend' - try 'help' => saveenv Saving Environment to MMC... Writing to redundant MMC(1)... done => U-Boot SPL 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39) DRA752-GP ES1.1 no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39 +0530) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV G.0 DRAM: 1.5 GiB MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 173 bytes read in 3 ms (55.7 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** File not found /boot/zImage ** ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => + +Hi Archit, Looks like there is similar issue here: e2e.ti.com/.../709450 Please follow the suggestion in the link + +Hi, I am still facing the problem. I check i the micro SD card size was a problem. Used a 32GB card. but still problem persists. Also, the target fs is only approx 800 MB. So that should not be an issue. Browsed the code a bit. It seems that u-boot is not able to find the kernel image at all. Looks like some wrong arguments are passed to be bootm command. Do i need to set the board type to something specific, so that it gets the right bootm command line arguments? The micro SD card has 2 partitions. First is the boot ( which is FAT). it has the MLO, u-boot.img, and the uenv.txt. The other partition is the root partition. It is ext4. It has the targetfs extracted. It has the uImage, zImage and the dtb files in the /boot folder. Do i need to copy the iImage file in the boot filer? I am stuck on this. So requesting urgent support please. Thanks and Regards, Achit + +Hi Achit, can you stop at u-boot prompt and run "printenv" command and show the output? Regards, Yordan + +Hi, The following is the output of printenv command at the u-boot prompt. ------------------------------------ => printenv arch=arm args_fit=setenv bootargs console=${console} args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw r ootfstype=${mmcrootfstype} baudrate=115200 board=dra7xx board_name=dra7xx board_rev=G.0 boot_fdt=try boot_fit=0 boot_os=0 bootargs=androidboot.serialno=${serial#} bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot . ..;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_ fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_android_b oot; bootdelay=2 bootdir=/boot bootenvfile=uEnv.txt bootfile=zImage bootm_size=0x10000000 bootpart=0:2 bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} console=ttyO0,115200n8 cpu=armv7 dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1 500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.i mg fat 1 1;uEnv.txt fat 1 1 dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img. raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image. raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x1 40000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x8100 0000 0x4000000 dfu_bufsiz=0x10000 dofastboot=0 emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mm cdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv b oot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc resc an; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_si ze; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boo t_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boo t_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run lo adbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenv file};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;f i;fi; ethaddr=d4:f5:13:b3:8e:36 fastboot.board_rev=G.0 fastboot.cpu=DRA752 fastboot.secure=GP fastboot.userdata_size=unknown fdt_addr_r=0x88000000 fdtaddr=0x88000000 fdtcontroladdr=def0b438 fdtfile=undefined findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $boa rd_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72 -evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $boar d_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv f dtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile a m57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3 .dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-id k.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; t hen setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && tes t $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb ; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefi ned; then echo WARNING: Could not determine device tree to use; fi; finduuid=part uuid mmc ${bootpart} uuid fit_bootfile=fitImage.itb fit_loadaddr=0x88000000 importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${fi lesize} kernel_addr_r=0x82000000 loadaddr=0x82000000 loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found o n device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; mmcdev=0 mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadf dt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; mmcrootfstype=ext4 rootwait netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${root path},${nfsopts} rw ip=dhcp netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netload fdt; run netargs; bootz ${loadaddr} - ${fdtaddr} netloadfdt=tftp ${fdtaddr} ${fdtfile} netloadimage=tftp ${loadaddr} ${bootfile} nfsopts=nolock partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gp t_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,u uid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K, uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${u uid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uui d_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gp t_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1}; name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size =8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} pxefile_addr_r=0x80100000 ramdisk_addr_r=0x88080000 rdaddr=0x88080000 reboot_image=boot rootpath=/export/rootfs scriptaddr=0x80000000 scsidevs=0 serial#=0600601170e00121 soc=omap5 static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off stderr=serial@4806a000 stdin=serial@4806a000 stdout=serial@4806a000 update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} usbtty=cdc_acm vendor=ti ver=U-Boot 2016.05-00010-g9551b3d23ef3 (Nov 26 2018 - 09:04:39 +0530) vram=16M Environment size: 7459/131067 bytes => => ------------------------------------ + +hi, Also find the output of a few mmc commands below. => mmc dev ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device => mmc list OMAP SD/MMC: 0 (SD) OMAP SD/MMC: 1 (eMMC) => mmc dev ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device => mmc part ## Unknown partition table type 0 => mmc part ## Unknown partition table type 0 => mmc info Device: OMAP SD/MMC Manufacturer ID: fe OEM: 14e Name: MMC08 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.5 High Capacity: Yes Capacity: 7.3 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 7.3 GiB WRREL Boot Capacity: 8 MiB ENH RPMB Capacity: 128 KiB ENH => mmc rescan ** First descriptor is NOT a primary desc on 1:1 ** => mmc list OMAP SD/MMC: 0 (SD) OMAP SD/MMC: 1 (eMMC) => mmc dev ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device => => + +Hi Archit, can you make sure your sysboot pins are set correctly for sd boot as described in chapter "4.2 Preparing SD card & Boot" in VisionSDK_Linux_UserGuide.pdf. Also ensure your kernel and u-boot are at the right branch shown in the same document and the build and sd card creation went without errors. Make sure fdtfile in your uenv.txt is set to "fdtfile=dra7-evm-infoadas.dtb". Regards, Yordan + +Hi Yordan, I checked the sysboot pins. These are as described in the document. i think, since u-boot is taking control, it is booting from SD card. Also tried removing the SD and then booting. It fails. The build was successful. The kernel image and binaries were created. There are copied to the mentioned location in the targetfs ( the /boot folder and the opt/firmware) Also, the u-boot, MLO and the uenv.txt are copied to the /boot partition. the targetfs is copied and extracted to the /root partiion on the micro SD card. The uenv.txt has the fdtfile as mentioned above. The only probable suspected cause might be that i am using ubuntu on top of virtual box. i think due to this reason the mksdboot script fails sometimes. It fails with the message "unable to mount /dev/sdb1.." this is unpredictable. it also works sometimes. do not know any apparent reason for this. it also succeeds some times. So, i think there might be problem when the script is trying to partition or format the SD card. May be interference from underlying windows? Any idea about this. Can this be a possible cause of trouble. As such the card does get mounted and in accessible from linux. Alternately, can the card be prepared manually, instead of using the script. Is there any way to confirm the card is created perfectly. also, evaluating possibly using nfs to boot the system. Requesting your advice. Thanks and Regards, Archit Adwant + +Hi Archit, Since your file-system is present in SD, in the file uenv.txt can you set 'root=/dev/mmcblk1p2' instead of root=PARTUUID=${uuid} and give it a try? Regards Shravan + +Hi Shravan, Tried it out. Problem persists. the uenv.txt file on the boot partition in the SD card is like this. ----------------------------------------------------------------------------- fdtfile=dra7-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=/dev/mmcblk1p2 rw rootwait ip=none mem=1024M cma=64M" ----------------------------------------------------------------------------------- the mmc list and mmc dev and mmc part commands output is same as listed above. can i try and nfs in this scenario? Not sure why the partition is not visible. Kindly advise Thanks and Regards, Archit Adwant + +this is now the /boot folder in the root partition on the SD card looks like + +I checked the micro SD card by connecting it to the PC, via a reader. Both the partitions are mounted on ubuntu linux. The root partition is also visible ( as in the snap shot above) with its contents. I am using ubuntu 18.04. So, if the partition is recognized on desktop, then is it realy a SD card preparation issue? Or is it a compatibility issue. May be u-boot is older version or so...? + +Hi Archit, Can you set the root as root=/dev/mmcblk0p2 instead (maybe the MMC is being enumerated as mmcblk0 instead of mmcblk1 -- rare but possible). If the issue still persits can you reflash the card (preferably using a new card), and after reflashing, the first time you boot, halt at u-boot and run => env default -fa => saveenv and reboot. You can revert changes to the uenv.txt file too. I assume you're working off a release, with no changes to u-boot/kernel. Regards Shravan + +Hi, I tried mmcblk0p2. It did not work. trying out the env default option after a rebuild. I am using the release as it is . No changes to u-boot. Some more observations. I tried the fatls, ext2ls, and ext4ls commands. the following are the output.s the same sd card gets mounted properly on ubuntu desktop and shows the partition as ext4. So, file system if mismatch or similar, due to which u-boot cannot recognize the ext4 file system? Will update after the rebuild, and the default option. THanks and Regards, Archit Adwant => ext4ls mmc 1 Failed to mount ext2 filesystem... ** Unrecognized filesystem type ** => ext2ls mmc 1 Failed to mount ext2 filesystem... ** Unrecognized filesystem type ** => fatls mmc 0 system volume information/ 127316 mlo 820356 u-boot.img 171 uenv.txt 3 file(s), 1 dir(s) + +HI, Is it possible to provide me with a prebuilt binary image of u-boot, uenv.txt and MLO, which i can try and put on the boot partition and see it it loads the rootfs and the kernel? It it fails, then i know it is partition problem. Thanks and Regards, Archit Adwant + +Hi Archit, Attached the pre-built boot partition which successfully boots to Linux (its a tar.gz file). Please let us know if this works (you may want to run env default -fa and saveenv on the first boot). Regards Shravan boot.tar.gz.txt + +Thanks Shravan, I tried the files. Copied all three files (MLO, u-boot image, uenv.txt) to the boot partition on the micro SD card, and tried to boot the board. I got exactly the same result. -------------------------------------- Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! -------------------------------------- So, since this is a working image, it seems the ext4 partition created on ubuntu 18 is not being recognized by u-boot. i will try to format the card using a ubuntu 16 machine and check. Can NFS work in this scenario? Also, can any body suggest any minor modifications to uboot can make it read the ext4 partition created on the ubuntu 18 machine. Kindly let me know. Thanks and Regards, Archit Adwant + +Hi Shravan, I just checked in the VisionSDK_linux_UserGuide.pdf. It is mentioned that the host machine needs ubuntu 14.04. Can you confirm the working version on which the above image has been created, and works? Has it been tested with ubuntu 16.04 on the host? kindly confirm. Thanks and Regards, Archit Adwant + +Hi Archit, Vision-SDK has been tested with Ubuntu-16.04 as the host, there are no issues. Please check the switch settings for (SYSBOOT and USERCONFIG and SW5 settings). NFS won't really help as the initialization fails at loading kernel image (NFS is useful when the kernel image is present in the SD card, and the rest of the file-system is accessible over the network). Regards Shravan + +Hi Shravan, All Finally i got the EVM to boot into linux. See log below. Basically, i used another ubuntu 16.04 machine to format the card, and them simply copied the files built onto the partitions. It worked. So, it is either a issue with formatting with Ubuntu 18, or else with the virtual box, while formatting from the Ubuntu 18 hosted inside it. Will update you once if figure out the exact cause. Thanks for all the support. Regards, Archit Adwant + diff --git a/data2/text/range/30001+/761228.txt b/data2/text/range/30001+/761228.txt new file mode 100644 index 0000000000000000000000000000000000000000..b3f818e3d3bac599da42bd625540a9ffe9eac53b --- /dev/null +++ b/data2/text/range/30001+/761228.txt @@ -0,0 +1,1031 @@ +Ticket Name: Linux: [EXTERNAL] How to create a custom image file (4CH AVB capture +SVM) on TDA2 EVM + +Query Text: +Tool/software: Linux Hi Prasad, Thanks for your recommendation. (same as the AVB/SVR topic) I confirmed that XDC build AVBTP package successfully. But it still can't print out any debug message from UART, After modified the \vision_sdk\apps\configs\tda2xx_evm_linux_all\cfg.mk, rebuild image (debug mode) again. ## Applies profile to all cores # # Supported profiles: release debug #PROFILE=debug PROFILE ?= release PROFILE_ipu1_0 ?= $(PROFILE) PROFILE_ipu1_1 ?= $(PROFILE) PROFILE_ipu2 ?= debug PROFILE_c66xdsp_1 ?= $(PROFILE) PROFILE_a15_0 ?= $(PROFILE) It could print out some debug message via GT_trace() from UART, but it occurred the exception of “### XDC ASSERT - ERROR CALLBACK START ###” when call bsp_deviceI2CInit() function [found 4 I2C instance : i2c0, i2c1, i2c2, i2c3]. /ti_components/drivers/pdk_01_10_01_06/packages/ti/drv/vps/src/devices/src/bsp_deviceI2c.c Could you help provide suggestion for fix the issue ? Thanks. Ps. BTW, from Log message, it showed error message in debug mode: [ 13.677475] omap_i2c 48070000.i2c: controller timed out [ 15.044513] omap_hwmod: i2c1: _wait_target_disable failed Regards, Sam Hsieh + +Responses: +log_avb_build.txt /home/sam/proj/TI_VISION_SDK_V3_5/ti_components/networking/avbtp_0_10_00_00/../../os_tools/linux/xdctools_3_32_01_22_core/xdc --xdcpath="/home/sam/proj/TI_VISION_SDK_V3_5/ti_components/networking/avbtp_0_10_00_00/../../os_tools/bios_6_46_04_53/packages" --jobs 8 -P packages/ti/avbtp/ +making all: Wed Jan 9 13:45:44 CST 2019 ... +======== .interfaces [packages/ti/avbtp/] ======== +making package.mak (because of package.bld) ... +commonCopts : +generating interfaces for package ti.avbtp (because package/package.xdc.inc is older than package.xdc) ... + translating AVBTP +.interfaces files complete: Wed Jan 9 13:45:46 CST 2019. +======== .libraries [packages/ti/avbtp/] ======== +clem3 package/package_ti.avbtp.c ... +clem3 avbtp.c ... +clem3 avb2nsp.c ... +clem3 avbtp_queue.c ... +clem3 package/package_ti.avbtp.c ... +clem3 avbtp.c ... +clem3 avb2nsp.c ... +clem3 avbtp_queue.c ... +clem3 package/package_ti.avbtp.c ... +clem3 avbtp.c ... +clem3 avb2nsp.c ... +clem3 avbtp_queue.c ... +clem3 package/package_ti.avbtp.c ... +clem3 avbtp.c ... +clem3 avb2nsp.c ... +clem3 avbtp_queue.c ... +clem4 package/package_ti.avbtp.c ... +clem4 avbtp.c ... +clem4 avb2nsp.c ... +clem4 avbtp_queue.c ... +clem4 package/package_ti.avbtp.c ... +clem4 avbtp.c ... +clem4 avb2nsp.c ... +clem4 avbtp_queue.c ... +clem4 package/package_ti.avbtp.c ... +clem4 avbtp.c ... +clem4 avb2nsp.c ... +clem4 avbtp_queue.c ... +clem4 package/package_ti.avbtp.c ... +clem4 avbtp.c ... +clem4 avb2nsp.c ... +clem4 avbtp_queue.c ... +clea8f package/package_ti.avbtp.c ... +clea8f avbtp.c ... +clea8f avb2nsp.c ... +clea8f avbtp_queue.c ... +clea8f package/package_ti.avbtp.c ... +clea8f avbtp.c ... +clea8f avb2nsp.c ... +clea8f avbtp_queue.c ... +clea8f package/package_ti.avbtp.c ... +clea8f avbtp.c ... +clea8f avb2nsp.c ... +clea8f avbtp_queue.c ... +clea8f package/package_ti.avbtp.c ... +clea8f avbtp.c ... +clea8f avb2nsp.c ... +clea8f avbtp_queue.c ... +cla15fg package/package_ti.avbtp.c ... +cla15fg avbtp.c ... +cla15fg avb2nsp.c ... +cla15fg avbtp_queue.c ... +cla15fg package/package_ti.avbtp.c ... +cla15fg avbtp.c ... +cla15fg avb2nsp.c ... +cla15fg avbtp_queue.c ... +cla15fg package/package_ti.avbtp.c ... +cla15fg avbtp.c ... +cla15fg avb2nsp.c ... +cla15fg avbtp_queue.c ... +cla15fg package/package_ti.avbtp.c ... +cla15fg avbtp.c ... +cla15fg avb2nsp.c ... +cla15fg avbtp_queue.c ... +archiving package/lib/lib/debug/ti.avbtp/package/package_ti.avbtp.oem3 package/lib/lib/debug/ti.avbtp/avbtp.oem3 package/lib/lib/debug/ti.avbtp/avb2nsp.oem3 package/lib/lib/debug/ti.avbtp/avbtp_queue.oem3 into lib/debug/ti.avbtp.aem3 ... +archiving package/lib/lib/debug/ti.avbtp_instr/package/package_ti.avbtp.oem3 package/lib/lib/debug/ti.avbtp_instr/avbtp.oem3 package/lib/lib/debug/ti.avbtp_instr/avb2nsp.oem3 package/lib/lib/debug/ti.avbtp_instr/avbtp_queue.oem3 into lib/debug/ti.avbtp_instr.aem3 ... +archiving package/lib/lib/release/ti.avbtp/package/package_ti.avbtp.oem3 package/lib/lib/release/ti.avbtp/avbtp.oem3 package/lib/lib/release/ti.avbtp/avb2nsp.oem3 package/lib/lib/release/ti.avbtp/avbtp_queue.oem3 into lib/release/ti.avbtp.aem3 ... +archiving package/lib/lib/release/ti.avbtp_instr/package/package_ti.avbtp.oem3 package/lib/lib/release/ti.avbtp_instr/avbtp.oem3 package/lib/lib/release/ti.avbtp_instr/avb2nsp.oem3 package/lib/lib/release/ti.avbtp_instr/avbtp_queue.oem3 into lib/release/ti.avbtp_instr.aem3 ... +archiving package/lib/lib/debug/ti.avbtp/package/package_ti.avbtp.oem4 package/lib/lib/debug/ti.avbtp/avbtp.oem4 package/lib/lib/debug/ti.avbtp/avb2nsp.oem4 package/lib/lib/debug/ti.avbtp/avbtp_queue.oem4 into lib/debug/ti.avbtp.aem4 ... +archiving package/lib/lib/debug/ti.avbtp_instr/package/package_ti.avbtp.oem4 package/lib/lib/debug/ti.avbtp_instr/avbtp.oem4 package/lib/lib/debug/ti.avbtp_instr/avb2nsp.oem4 package/lib/lib/debug/ti.avbtp_instr/avbtp_queue.oem4 into lib/debug/ti.avbtp_instr.aem4 ... +archiving package/lib/lib/release/ti.avbtp/package/package_ti.avbtp.oem4 package/lib/lib/release/ti.avbtp/avbtp.oem4 package/lib/lib/release/ti.avbtp/avb2nsp.oem4 package/lib/lib/release/ti.avbtp/avbtp_queue.oem4 into lib/release/ti.avbtp.aem4 ... +archiving package/lib/lib/debug/ti.avbtp/package/package_ti.avbtp.oea8f package/lib/lib/debug/ti.avbtp/avbtp.oea8f package/lib/lib/debug/ti.avbtp/avb2nsp.oea8f package/lib/lib/debug/ti.avbtp/avbtp_queue.oea8f into lib/debug/ti.avbtp.aea8f ... +archiving package/lib/lib/debug/ti.avbtp_instr/package/package_ti.avbtp.oea8f package/lib/lib/debug/ti.avbtp_instr/avbtp.oea8f package/lib/lib/debug/ti.avbtp_instr/avb2nsp.oea8f package/lib/lib/debug/ti.avbtp_instr/avbtp_queue.oea8f into lib/debug/ti.avbtp_instr.aea8f ... +archiving package/lib/lib/debug/ti.avbtp/package/package_ti.avbtp.oa15fg package/lib/lib/debug/ti.avbtp/avbtp.oa15fg package/lib/lib/debug/ti.avbtp/avb2nsp.oa15fg package/lib/lib/debug/ti.avbtp/avbtp_queue.oa15fg into lib/debug/ti.avbtp.aa15fg ... +archiving package/lib/lib/debug/ti.avbtp_instr/package/package_ti.avbtp.oa15fg package/lib/lib/debug/ti.avbtp_instr/avbtp.oa15fg package/lib/lib/debug/ti.avbtp_instr/avb2nsp.oa15fg package/lib/lib/debug/ti.avbtp_instr/avbtp_queue.oa15fg into lib/debug/ti.avbtp_instr.aa15fg ... +archiving package/lib/lib/release/ti.avbtp/package/package_ti.avbtp.oa15fg package/lib/lib/release/ti.avbtp/avbtp.oa15fg package/lib/lib/release/ti.avbtp/avb2nsp.oa15fg package/lib/lib/release/ti.avbtp/avbtp_queue.oa15fg into lib/release/ti.avbtp.aa15fg ... +archiving package/lib/lib/release/ti.avbtp_instr/package/package_ti.avbtp.oem4 package/lib/lib/release/ti.avbtp_instr/avbtp.oem4 package/lib/lib/release/ti.avbtp_instr/avb2nsp.oem4 package/lib/lib/release/ti.avbtp_instr/avbtp_queue.oem4 into lib/release/ti.avbtp_instr.aem4 ... +archiving package/lib/lib/release/ti.avbtp_instr/package/package_ti.avbtp.oa15fg package/lib/lib/release/ti.avbtp_instr/avbtp.oa15fg package/lib/lib/release/ti.avbtp_instr/avb2nsp.oa15fg package/lib/lib/release/ti.avbtp_instr/avbtp_queue.oa15fg into lib/release/ti.avbtp_instr.aa15fg ... +archiving package/lib/lib/release/ti.avbtp/package/package_ti.avbtp.oea8f package/lib/lib/release/ti.avbtp/avbtp.oea8f package/lib/lib/release/ti.avbtp/avb2nsp.oea8f package/lib/lib/release/ti.avbtp/avbtp_queue.oea8f into lib/release/ti.avbtp.aea8f ... +archiving package/lib/lib/release/ti.avbtp_instr/package/package_ti.avbtp.oea8f package/lib/lib/release/ti.avbtp_instr/avbtp.oea8f package/lib/lib/release/ti.avbtp_instr/avb2nsp.oea8f package/lib/lib/release/ti.avbtp_instr/avbtp_queue.oea8f into lib/release/ti.avbtp_instr.aea8f ... +.libraries files complete: Wed Jan 9 13:45:51 CST 2019. +======== .dlls [packages/ti/avbtp/] ======== +.dlls files complete: Wed Jan 9 13:45:51 CST 2019. +======== .executables [packages/ti/avbtp/] ======== +.executables files complete: Wed Jan 9 13:45:51 CST 2019. +======== all [packages/ti/avbtp/] ======== +all files complete. +all files complete: Wed Jan 9 13:45:51 CST 2019. + log_avb_2019_0109.txt @ +U-Boot SPL 2016.05 (Jan 07 2019 - 18:28:06) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - MMC init failed, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Jan 07 2019 - 18:28:06 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +173 bytes read in 6 ms (27.3 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3560800 bytes read in 338 ms (10 MiB/s) +106933 bytes read in 28 ms (3.6 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x365560 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff1b4 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00032-g0f6b93d-dirty (sam@ubuntu-ML-Server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Jan 7 18:30:07 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=9814ac18-02 rw rootwait ip=none mem=1024M cma=64M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 353188K/1012736K available (6635K kernel code, 320K rwdata, 2392K rodata, 336K init, 290K bss, 413788K reserved, 245760K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d902c (9029 kB) +[ 0.000000] .init : 0xc08da000 - 0xc092e000 ( 336 kB) +[ 0.000000] .data : 0xc092e000 - 0xc097e120 ( 321 kB) +[ 0.000000] .bss : 0xc0980000 - 0xc09c8800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000326] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000334] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000773] Console: colour dummy device 80x30 +[ 0.000789] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000795] This ensures that you still see kernel messages. Please +[ 0.000800] update your kernel commandline. +[ 0.000814] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000826] pid_max: default: 32768 minimum: 301 +[ 0.000923] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000934] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001471] Initializing cgroup subsys io +[ 0.001489] Initializing cgroup subsys memory +[ 0.001513] Initializing cgroup subsys devices +[ 0.001525] Initializing cgroup subsys freezer +[ 0.001537] Initializing cgroup subsys perf_event +[ 0.001548] Initializing cgroup subsys pids +[ 0.001575] CPU: Testing write buffer coherency: ok +[ 0.001775] /cpus/cpu@0 missing clock-frequency property +[ 0.001791] /cpus/cpu@1 missing clock-frequency property +[ 0.001801] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001840] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080069] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080137] Brought up 2 CPUs +[ 0.080150] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080157] CPU: All CPU(s) started in HYP mode. +[ 0.080162] CPU: Virtualization extensions available. +[ 0.080535] devtmpfs: initialized +[ 0.109131] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110101] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313699] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313722] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.318923] pinctrl core: initialized pinctrl subsystem +[ 0.319795] NET: Registered protocol family 16 +[ 0.320769] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350238] cpuidle: using governor ladder +[ 0.380262] cpuidle: using governor menu +[ 0.388850] OMAP GPIO hardware version 0.1 +[ 0.395316] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.411837] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.411851] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.419901] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.419912] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420394] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420404] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.420990] OMAP DMA hardware revision 0.0 +[ 0.461662] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462805] edma 43300000.edma: memcpy is disabled +[ 0.467597] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471910] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.472089] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472254] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472411] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472700] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472886] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.475898] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491348] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563701] pcf857x 0-0020: probed +[ 0.564273] pcf857x 0-0021: probed +[ 0.564425] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564822] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.565019] media: Linux media interface: v0.10 +[ 0.565071] Linux video capture interface: v2.00 +[ 0.565110] pps_core: LinuxPPS API ver. 1 registered +[ 0.565117] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.565143] PTP clock support registered +[ 0.565191] EDAC MC: Ver: 3.0.0 +[ 0.565947] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.566239] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566575] Advanced Linux Sound Architecture Driver Initialized. +[ 0.567458] clocksource: Switched to clocksource arch_sys_counter +[ 0.578140] NET: Registered protocol family 2 +[ 0.578630] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578693] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578818] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578865] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578896] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.579102] NET: Registered protocol family 1 +[ 0.579347] RPC: Registered named UNIX socket transport module. +[ 0.579356] RPC: Registered udp transport module. +[ 0.579362] RPC: Registered tcp transport module. +[ 0.579368] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.580386] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.590444] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.591106] NFS: Registering the id_resolver key type +[ 0.591136] Key type id_resolver registered +[ 0.591143] Key type id_legacy registered +[ 0.591211] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.592521] bounce: pool size: 64 pages +[ 0.592674] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.592692] io scheduler noop registered +[ 0.592707] io scheduler deadline registered +[ 0.592743] io scheduler cfq registered (default) +[ 0.597667] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.600832] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.600844] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.600878] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.600898] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.630814] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.630982] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.630995] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.631005] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.631015] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.631425] PCI: bus0: Fast back to back transfers disabled +[ 0.631550] PCI: bus1: Fast back to back transfers enabled +[ 0.631633] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.631648] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.631661] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.631883] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.692301] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.695691] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.706199] console [ttyS0] enabled +[ 1.710601] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.720289] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.730324] [drm] Initialized drm 1.1.0 20060810 +[ 1.735832] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.742520] [drm] No driver support for vblank timestamp query. +[ 1.748687] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.761694] loop: module loaded +[ 1.765238] vmemexp device MAJOR num = 245 +[ 1.769416] vmemexp class registered +[ 1.773133] /dev/vmemexp device registered +[ 1.777248] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.782973] nand: No NAND device found +[ 1.786745] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.796582] m25p80 spi32766.0: found w25q256, expected s25fl256s1 +[ 1.802743] m25p80 spi32766.0: w25q256 (32768 Kbytes) +[ 1.807892] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.813749] Creating 7 MTD partitions on "spi32766.0": +[ 1.818927] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.825039] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.831379] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.838329] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.844992] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.852402] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.858754] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.866523] libphy: Fixed MDIO Bus: probed +[ 1.873264] mousedev: PS/2 mouse device common for all mice +[ 1.879519] i2c /dev entries driver +[ 1.888287] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.893912] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.900314] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.906849] evm_3v3_sw: supplied by sysen1 +[ 1.990255] mmc0: MAN_BKOPS_EN bit is not set +[ 2.001546] mmc0: new HS200 MMC card at address 0001 +[ 2.006952] mmcblk0: mmc0:0001 R1J55A 7.28 GiB +[ 2.011761] mmcblk0boot0: mmc0:0001 R1J55A partition 1 8.00 MiB +[ 2.017963] mmcblk0boot1: mmc0:0001 R1J55A partition 2 8.00 MiB +[ 2.069328] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.078451] aic_dvdd: supplied by evm_3v3_sw +[ 2.084365] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.091893] NET: Registered protocol family 10 +[ 2.096976] sit: IPv6 over IPv4 tunneling driver +[ 2.102222] NET: Registered protocol family 17 +[ 2.106893] Key type dns_resolver registered +[ 2.111323] omap_voltage_late_init: Voltage driver support not added +[ 2.118224] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.124434] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.131141] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.137350] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.145605] Power Management for TI OMAP4+ devices. +[ 2.150708] Registering SWP/SWPB emulation handler +[ 2.156439] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.163703] dmm 4e000000.dmm: initialized all PAT entries +[ 2.169820] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.176715] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.218776] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.238387] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.247537] hctosys: unable to open rtc device (rtc0) +[ 2.260958] evm_1v8: disabling +[ 2.264037] aic_dvdd: disabling +[ 2.267194] vmmcwl_fixed: disabling +[ 2.270885] ldousb: disabling +[ 2.274290] ALSA device list: +[ 2.277267] #0: DRA7xx-EVM +[ 2.280807] Waiting for root device PARTUUID=9814ac18-02... +[ 2.396635] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.404737] mmc2: new SDHC card at address e624 +[ 2.409630] mmcblk1: mmc2:e624 SU08G 7.40 GiB +[ 2.421499] mmcblk1: p1 p2 +[ 2.498507] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.507227] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.805804] EXT4-fs (mmcblk1p2): recovery complete +[ 2.812495] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.820662] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.828507] devtmpfs: mounted +[ 2.831675] Freeing unused kernel memory: 336K +[ 2.836137] This architecture does not have kernel memory protection. +[ 3.214605] systemd[1]: System time before build time, advancing clock. +[ 3.296277] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.311120] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.322853] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.341384] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.369165] systemd[1]: Set hostname to . +[ 3.491801] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.502988] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.513245] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.536804] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.550749] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.703157] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.712649] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 3.722495] random: systemd: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.292072] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 4.299911] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 4.307650] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 4.315084] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.324584] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.362650] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.404671] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.457691] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.479757] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.491685] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.518357] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.547826] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 4.617682] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.642384] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.667818] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.697681] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.727833] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.757915] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.787646] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.807634] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.857789] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.871737] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.890008] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.927774] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.948310] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.967731] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.987738] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 5.047870] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.068328] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 5.099746] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 5.127979] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 5.191981] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.217808] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.247705] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.267870] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. + Starting Create Static Device Nodes in /dev... + Starting udev Coldplug all Devices... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 5.958807] systemd-journald[152]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... + Starting Load/Save Random Seed... +[ 6.501028] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.517536] remoteproc0: 55020000.ipu is available +[ 6.533034] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.558989] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.578527] omap-rproc 40800000.dsp: assigned reserved memorynode dsp1_cma@99000000 +[ OK ] Started Create Volatile Files and Directories. +[ 6.603653] remoteproc1: 40800000.dsp is available +[ 6.624576] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ OK ] Started Load/Save Random Seed. +[ 6.644808] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.658460] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.667191] remoteproc2: 41000000.dsp is available +[ 6.673483] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.688891] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. +[ 6.767909] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 + Starting Network Time Synchronization... + Starting Update UTMP about System Boot/Shutdown... +[ 8.405728] remoteproc0: registered virtio0 (type 7) +[ 8.494017] remoteproc2: registered virtio1 (type 7) +[ 8.546829] remoteproc1: registered virtio2 (type 7) +[ 8.637612] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.644242] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.672960] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 8.680001] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 8.708996] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started Network Time Synchronization. +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks...[ 8.860813] CAN device driver interface + +[ 9.128758] SCSI subsystem initialized +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Reached target System Initialization. +[ 9.239200] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=354) +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started Kernel Logging Service. +[ OK ] Started System Logging Service. + Starting Save/Restore Sound Card State... + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. +[ 9.966188] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ 9.973423] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 10.009503] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 10.039393] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 10.064824] scsi host0: ahci +[ 10.072570] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 + Starting Login Service... + Starting rc.pvr.service... + Starting Network Service... +[ OK ] Started Save/Restore Sound Card State. +[ 10.437606] ata1: SATA link down (SStatus 0 SControl 300) +[ OK ] Started Permit User Sessions. +[ 10.556187] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started Network Service. +[ OK ] Started rc.pvr.service. +[ 10.703179] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. + Starting weston.service... +[ OK ] Reached target Sound Card. +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started weston.service. +[ OK ] Started Login Service. +[ 11.075519] remoteproc0: powering up 55020000.ipu +[ OK ] Started Network Name Resolution. +[ 11.090326] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 7316692 +[ 11.097870] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 11.131726] remoteproc0: remote processor 55020000.ipu is now up +[ 11.141867] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 11.149297] remoteproc2: powering up 41000000.dsp +[ 11.165077] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6967486 +[ 11.180268] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 11.186158] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 11.192103] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 11.222520] remoteproc2: remote processor 41000000.dsp is now up +[ 11.230289] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 11.236600] remoteproc1: powering up 40800000.dsp +[ 11.251194] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6967486 +[ 11.264698] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 11.270584] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 11.276547] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 11.305604] remoteproc1: remote processor 40800000.dsp is now up +[ 11.314788] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 11.324151] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 11.332429] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 11.339452] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 11.382789] NET: Registered protocol family 41 + Starting tiipclad-daemon.service... + Starting telnetd.service... +[ OK ] Started tiipclad-daemon.service. +[ OK ] Started telnetd.service. +[ 11.714141] ------------[ cut here ]------------ +[ 11.718788] WARNING: CPU: 0 PID: 228 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() +[ 11.728306] 44000000.ocp:L3 Custom Error: MASTER IPU2 TARGET L4_PER1_P3 (Read): Data Access in User mode during Functional access +[ 11.740001] Modules linked in: rpmsg_proto dwc3(+) udc_core virtio_rpmsg_bus bc_example(O) ahci_platform pvrsrvkm(O) libahci_platform libahci extcon_usb_gpio libata c_can_platform scsi_mod c_can dwc3_omap can_dev rtc_omap omap_des omap_sham omap_aes_driver extcon omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[ 11.770297] CPU: 0 PID: 228 Comm: systemd-udevd Tainted: G O 4.4.84-00032-g0f6b93d-dirty #1 +[ 11.779813] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 11.785926] Backtrace: +[ 11.788392] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 11.795990] r7:c02de608 r6:200b0193 r5:00000000 r4:c094d810 +[ 11.801701] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 11.808952] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 11.817071] r7:c02de608 r6:00000093 r5:00000009 r4:ed4c1a08 +[ 11.822779] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 11.831508] r8:00000017 r7:c0841e24 r6:00000002 r5:c08419b8 r4:c0841a5c +[ 11.838267] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) +[ 11.847171] r3:ef201b00 r2:c0841a5c +[ 11.850766] r4:80080003 +[ 11.853315] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) +[ 11.862655] r10:c097d38b r9:ef1f1300 r8:00000017 r7:00000000 r6:00000000 r5:ef1f1360 +[ 11.870547] r4:ef211000 +[ 11.873094] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) +[ 11.881999] r10:ee7eaf00 r9:c094d7f8 r8:ef008000 r7:00000000 r6:c0935e44 r5:ef1f1360 +[ 11.889888] r4:ef1f1300 +[ 11.892437] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) +[ 11.900993] r7:00000000 r6:c0935e44 r5:ef1f1360 r4:ef1f1300 +[ 11.906701] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) +[ 11.915344] r7:00000000 r6:00000000 r5:00000017 r4:c092b424 +[ 11.921053] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) +[ 11.929787] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) +[ 11.938168] r9:c094d7f8 r8:fa213000 r7:fa212000 r6:ed4c1bc8 r5:fa21200c r4:c09308ec +[ 11.945974] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) +[ 11.953485] Exception stack(0xed4c1bc8 to 0xed4c1c10) +[ 11.958555] 1bc0: 000011ca 00000000 df54e710 c04f9ebc c09b3428 00001803 +[ 11.966764] 1be0: 06a90216 ed454010 00002500 c094d7f8 ee7eaf00 ed4c1c24 ed4c1c28 ed4c1c18 +[ 11.974972] 1c00: c0016f30 c04f9ec8 a00b0013 ffffffff +[ 11.980039] r9:c094d7f8 r8:00002500 r7:ed4c1bfc r6:ffffffff r5:a00b0013 r4:c04f9ec8 +[ 11.987850] [] (arch_counter_get_cntpct) from [] (arch_timer_read_counter_long+0x1c/0x20) +[ 11.997805] [] (arch_timer_read_counter_long) from [] (__timer_delay+0x54/0x64) +[ 12.006887] [] (__timer_delay) from [] (__timer_const_udelay+0x28/0x2c) +[ 12.015268] r7:ed454010 r6:066665b0 r5:00000029 r4:ed01d010 +[ 12.020988] [] (__timer_const_udelay) from [] (dwc3_probe+0xff4/0x1944 [dwc3]) +[ 12.029994] [] (dwc3_probe [dwc3]) from [] (platform_drv_probe+0x54/0xb8) +[ 12.038549] r10:00000000 r9:ed277a08 r8:0000001d r7:fffffdfb r6:bf27fc44 r5:ed454010 +[ 12.046439] r4:c09bb7a4 +[ 12.048985] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) +[ 12.057889] r7:bf27fc44 r6:00000000 r5:ed454010 r4:c09bb7a4 +[ 12.063593] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) +[ 12.072061] r9:ed277a08 r8:12d8861c r7:00000000 r6:ed454044 r5:bf27fc44 r4:ed454010 +[ 12.079868] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) +[ 12.088075] r7:00000000 r6:c03e67f0 r5:bf27fc44 r4:00000000 +[ 12.093784] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) +[ 12.101815] r6:c095e5b8 r5:ed419e00 r4:bf27fc44 +[ 12.106469] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) +[ 12.114505] [] (bus_add_driver) from [] (driver_register+0x80/0x100) +[ 12.122623] r7:ed277b00 r6:c09336f0 r5:bf284000 r4:bf27fc44 +[ 12.128330] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) +[ 12.137407] r5:bf284000 r4:c095e5b8 +[ 12.141018] [] (__platform_driver_register) from [] (dwc3_driver_init+0x1c/0x24 [dwc3]) +[ 12.150793] r5:bf284000 r4:c09336f0 +[ 12.154401] [] (dwc3_driver_init [dwc3]) from [] (do_one_initcall+0x98/0x1e4) +[ 12.163314] [] (do_one_initcall) from [] (do_init_module+0x68/0x378) +[ 12.171433] r10:bf27fcc0 r9:ed277a08 r8:12d8861c r7:00000001 r6:ed277ac0 r5:00000001 +[ 12.179323] r4:bf27fcc0 +[ 12.181871] [] (do_init_module) from [] (load_module+0x1df8/0x2068) +[ 12.189903] r6:ed277a00 r5:00000001 r4:ed4c1f44 +[ 12.194556] [] (load_module) from [] (SyS_finit_module+0x88/0x98) +[ 12.202414] r10:00000000 r9:ed4c0000 r8:c000fc84 r7:0000017b r6:b6e57d90 r5:00000010 +[ 12.210306] r4:00000000 +[ 12.212855] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x34) +[ 12.221060] r6:00000000 r5:004a7928 r4:00000000 +[ 12.225710] ---[ end trace 871bc50112867729 ]--- +[ 12.675851] usbcore: registered new interface driver usbfs +[ 12.682418] usbcore: registered new interface driver hub +[ 12.689591] usbcore: registered new device driver usb +[ 12.822550] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 12.829593] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 12.836510] dwc3 48890000.usb: otg: can't start till gadget registers +[ 12.846303] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 12.852889] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 12.862178] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 12.872003] xhci-hcd xhci-hcd.1.auto: irq 495, io mem 0x488d0000 +[ 12.879747] hub 1-0:1.0: USB hub found +[ 12.883569] hub 1-0:1.0: 1 port detected +[ 12.890204] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 12.895735] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 12.905381] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 12.914942] hub 2-0:1.0: USB hub found +[ 12.919882] hub 2-0:1.0: 1 port detected +[ 13.677475] omap_i2c 48070000.i2c: controller timed out +[ 15.044513] omap_hwmod: i2c1: _wait_target_disable failed + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root + [ 65.766876] random: nonblocking pool is initialized +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# source ./vision_sdk_load.sh +[ 88.319646] DMA: Module install successful, device major num = 242 +[ 88.326111] DRV: Module install successful +[ 88.358429] CMEMK module: reference Linux version 4.4.84 +[ 88.364462] cmemk initialized +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + + ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! + No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + + ### WARNING ###: use the following I2C [read | write] commands at your own risk! + No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6a11000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3e11000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3d51000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3d91000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 100.025254 s: SYSTEM: System A15 Init in progress !!! + [HOST] [HOST ] 100.025346 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 100.025346 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 100.026688 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 100.026749 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 100.026779 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 100.026779 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 100.027969 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) + [HOST] [HOST ] 100.027999 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 100.028030 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) + [HOST] [HOST ] 100.028030 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 100.029128 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) + [HOST] [HOST ] 100.029128 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 100.029158 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) + [HOST] [HOST ] 100.029158 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 100.029311 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 100.029341 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 100.029463 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 100.029463 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 100.029463 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 100.029616 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 100.029738 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 100.029860 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 100.029982 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 100.030073 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 100.030287 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 100.030439 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 100.030622 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 100.030744 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 100.030927 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 100.031080 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 100.031202 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 100.031324 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 100.031446 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 100.031629 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 100.031812 s: DISP_DIST_SRC_0 : Init done - linkid-0x200005e + [HOST] [HOST ] 100.031934 s: DISP_DIST_SRC_1 : Init done - linkid-0x200005f + [HOST] [HOST ] 100.032056 s: DISP_DIST_SRC_2 : Init done - linkid-0x2000060 + [HOST] [HOST ] 100.032208 s: DISP_DIST_SRC_3 : Init done - linkid-0x2000061 + [HOST] [HOST ] 100.032330 s: DISP_DIST_SRC_4 : Init done - linkid-0x2000062 + [HOST] [HOST ] 100.032452 s: DISP_DIST_SRC_5 : Init done - linkid-0x2000063 + [HOST] [HOST ] 100.032605 s: DISP_DIST_SRC_6 : Init done - linkid-0x2000064 + [HOST] [HOST ] 100.032727 s: DISP_DIST_SRC_7 : Init done - linkid-0x2000065 + [HOST] [HOST ] 100.032879 s: SGX3DSRV_0 : Init done - linkid-0x2000047 + [HOST] [HOST ] 100.033062 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 100.033215 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 100.033337 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 100.033459 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 100.033581 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 100.033703 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 100.033855 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 100.033947 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 100.034130 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 100.034343 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 100.034557 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 100.034740 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 100.034984 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 100.035106 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 100.035228 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 100.035380 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 100.035533 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 100.035716 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 100.036539 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 100.036692 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 100.036814 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 100.036936 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037089 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037211 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037302 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037424 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037546 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037638 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 100.037729 s: SGXFRMCPY_0 : Init done - linkid-0x2000046 + [HOST] [HOST ] 100.038034 s: SGX3DSFM_0 : Init done - linkid-0x2000048 + [HOST] [HOST ] 100.038065 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [DSP1 ] 17.771823 s: ***** DSP1 Firmware build time 10:34:35 Jan 9 2019 + [HOST] [DSP1 ] 17.771884 s: *** SYSTEM: CPU Frequency , + [HOST] [DSP1 ] 17.772158 s: SYSTEM: System Common Init in progress !!! + [HOST] [DSP1 ] 17.772372 s: UTILS: CIO: Init Done !!! + [HOST] [DSP1 ] 17.772402 s: SYSTEM: IPC init in progress !!! + [HOST] [DSP1 ] 17.772433 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 17.774324 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [DSP1 ] 17.779265 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [DSP1 ] 17.779296 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [DSP1 ] 17.779357 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [DSP1 ] 17.779387 s: SYSTEM: Notify init done !!! + [HOST] [DSP1 ] 17.779570 s: SYSTEM: MsgQ init done !!! + [HOST] [DSP1 ] 17.779662 s: RpmsgInit in progress... + [HOST] [DSP1 ] 17.779723 s: SYSTEM: IPC init DONE !!! + [HOST] [DSP1 ] 17.780363 s: SYSTEM: System Common Init Done !!! + [HOST] [DSP1 ] 17.780394 s: SYSTEM: System DSP Init in progress !!! + [HOST] [DSP1 ] 17.780638 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [DSP1 ] 17.780668 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [DSP1 ] 17.780699 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 520944 B (508 KB) + [HOST] [DSP1 ] 17.780729 s: SYSTEM: Initializing Links !!! + [HOST] [DSP1 ] 17.789727 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [DSP1 ] 17.789757 s: lz4CompDecomp Init + [HOST] [DSP1 ] 17.789788 s: SYSTEM: System DSP Init Done !!! + [HOST] [DSP1 ] 17.799152 s: Connection established with HLOS, calling rpmsgInit + [HOST] [DSP1 ] 18.158146 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! + [HOST] [DSP1 ] 18.158207 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! + [HOST] [DSP2 ] 17.688739 s: ***** DSP2 Firmware build time 10:34:34 Jan 9 2019 + [HOST] [DSP2 ] 17.688830 s: *** SYSTEM: CPU Frequency , + [HOST] [DSP2 ] 17.689074 s: SYSTEM: System Common Init in progress !!! + [HOST] [DSP2 ] 17.689288 s: UTILS: CIO: Init Done !!! + [HOST] [DSP2 ] 17.689349 s: SYSTEM: IPC init in progress !!! + [HOST] [DSP2 ] 17.689349 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 17.777343 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [DSP2 ] 17.779265 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [DSP2 ] 17.779296 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [DSP2 ] 17.779357 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [DSP2 ] 17.779387 s: SYSTEM: Notify init done !!! + [HOST] [DSP2 ] 17.779570 s: SYSTEM: MsgQ init done !!! + [HOST] [DSP2 ] 17.779662 s: RpmsgInit in progress... + [HOST] [DSP2 ] 17.779692 s: Connection established with HLOS, calling rpmsgInit + [HOST] [DSP2 ] 17.779906 s: SYSTEM: IPC init DONE !!! + [HOST] [DSP2 ] 17.780577 s: SYSTEM: System Common Init Done !!! + [HOST] [DSP2 ] 17.780607 s: SYSTEM: System DSP Init in progress !!! + [HOST] [DSP2 ] 17.780851 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [DSP2 ] 17.780882 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [DSP2 ] 17.780943 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 520664 B (508 KB) + [HOST] [DSP2 ] 17.780973 s: SYSTEM: Initializing Links !!! + [HOST] [DSP2 ] 17.789940 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [DSP2 ] 17.789971 s: lz4CompDecomp Init + [HOST] [DSP2 ] 17.790001 s: SYSTEM: System DSP Init Done !!! + [HOST] [DSP2 ] 18.160159 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! + [HOST] [DSP2 ] 18.160190 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! + [HOST] [IPU2 ] 17.631519 s: ***** IPU2 Firmware build time 10:35:41 Jan 9 2019 + [HOST] [IPU2 ] 17.631763 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 17.642469 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 17.654181 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 17.654273 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 17.654364 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 17.774324 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 17.777343 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 17.777435 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 17.777587 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 17.777709 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 17.779479 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 17.780455 s: RpmsgInit in progress... + [HOST] [IPU2 ] 17.780546 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 17.784481 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 17.790306 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 17.790398 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 17.790459 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 17.790550 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 17.790611 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 17.790703 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 17.790794 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 17.790947 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 17.791008 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 17.791130 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 17.794210 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 17.794332 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 17.794424 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 17.794546 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 17.794637 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 17.794698 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 17.795064 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 17.795156 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 17.795247 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 17.795339 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 17.795430 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 17.795522 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 17.795827 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 17.795918 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 17.796010 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 17.796132 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 17.796223 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 17.796315 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 17.796651 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 17.796742 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 17.796834 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 17.796925 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 17.797047 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 17.797139 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 17.854602 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 17.856402 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 17.856676 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 17.856798 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235224 B (229 KB) + [HOST] [IPU2 ] 17.856951 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 17.857164 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 314572800 B (300 MB), Free size = 314572800 B (300 MB) + [HOST] [IPU2 ] 17.857347 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1046912 B (0 MB), Free size = 1019264 B (0 MB) + [HOST] [IPU2 ] 17.857530 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 17.935368 s: NSP GMAC: PHY 2 Found on MAC Port 0 + [HOST] [IPU2 ] 17.935948 s: NSP GMAC: PHY 3 Found on MAC Port 1 + [HOST] [IPU2 ] 18.153419 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 18.160159 s: Chains_main: Application Started !!! + [HOST] [IPU2 ] 18.174556 s: Board_init: Board Init in progress !!! + [HOST] [IPU2 ] 18.175135 s: Board_init: Board Init Done !!! + [HOST] [IPU2 ] 18.175257 s: Board_init: Call Bsp_boardGetI2cData!!! + [HOST] [IPU2 ] 18.175349 s: Bsp_boardGetI2cData: Enter call :Bsp_boardGetI2cDataTda2xx + [HOST] [IPU2 ] 18.175440 s: Bsp_boardGetI2cData: Exit !!! + [HOST] [IPU2 ] 18.175532 s: Board_init: Get I2C num=4 instances!!! + [HOST] [IPU2 ] 18.176538 s: Board_init: Call I2c_GlobalInit!!! + [HOST] [IPU2 ] 18.176721 s: Board_init: Call BspDeviceInitParams_init!!! + [HOST] [IPU2 ] 18.176813 s: Bsp_deviceInit: Enter !!! + [HOST] [IPU2 ] 18.176904 s: Bsp_boardGetI2cData: Enter call :Bsp_boardGetI2cDataTda2xx + [HOST] [IPU2 ] 18.177026 s: Bsp_boardGetI2cData: Exit !!! + [HOST] [IPU2 ] 18.177148 s: Bsp_deviceI2cInit: Enter + [HOST] [IPU2 ] 18.177240 s: Bsp_deviceI2cInit: Enter dev_name=i2c0 + [HOST] [IPU2 ] 18.177362 s: Bsp_deviceI2cInit: Enter sync packet=2 + [HOST] [IPU2 ] 18.177606 s: Bsp_deviceI2cInit: Enter I2C Handle[i2c0] + [HOST] [IPU2 ] 18.178155 s: Bsp_deviceI2cInit: Enter dev_name=i2c1 + [HOST] [IPU2 ] 18.178277 s: Bsp_deviceI2cInit: Enter sync packet=2 + [HOST] [IPU2 ] 18.178521 s: Bsp_deviceI2cInit: Enter I2C Handle[i2c1] + [HOST] [IPU2 ] 18.178948 s: Bsp_deviceI2cInit: Enter dev_name=i2c2 + [HOST] [IPU2 ] 18.179161 s: Bsp_deviceI2cInit: Enter sync packet=2 + [HOST] [IPU2 ] 18.179619 s: + [HOST] [IPU2 ] 18.179649 s: ### XDC ASSERT - ERROR CALLBACK START ### + [HOST] [IPU2 ] 18.179741 s: + [HOST] [IPU2 ] 18.179863 s: E_hardFault: FORCED + [HOST] [IPU2 ] 18.179924 s: + [HOST] [IPU2 ] 18.179954 s: ### XDC ASSERT - ERROR CALLBACK END ### + [HOST] [IPU2 ] 18.180015 s: + [HOST] [IPU2 ] 18.180686 s: + [HOST] [IPU2 ] 18.180717 s: ### XDC ASSERT - ERROR CALLBACK START ### + [HOST] [IPU2 ] 18.180808 s: + [HOST] [IPU2 ] 18.180930 s: E_busFault: PRECISERR: Immediate Bus Fault, exact addr known, address: 48060010 + [HOST] [IPU2 ] 18.181022 s: + [HOST] [IPU2 ] 18.181083 s: ### XDC ASSERT - ERROR CALLBACK END ### + [HOST] [IPU2 ] 18.181144 s: + +Hi Sam, Can you make the build profile as debug for all cores and try. Regards, Anuj + +Hi Anuj, OK, I try to build debug .profile for all cores again. BTW, Rollback the release profile, I observed that it’s very surprising at I2C instance between release and debug profile. *Release profile: Board_init: Get I2C num=1 instances!!! *Debug profile: Board_init: Get I2C num=4 instances!!! BR, Sam Hsieh + +Hi, Its been long since any update on this thread. I hope the issue is resolved. Regards, Anuj + +Hi Anuj, Thanks for your support. We could have preview the user-case of 4CH AVB Capture + Decode + SGX MOSAIC + DISPLAY, but the IQ of 3D- SRV is not acceptable after use default LUT. We would like to support the SRV calibration for AVB capture interface. Could you help instruct us how to implement the SRV calibration? Thanks. PS. A15 run Linux, IPU2 run Rtos. regards, Sam . + +Hi, You have to calibration manually. Please follow below guide vision_sdk\docs\SurroundView\VisionSDK_UserGuide_3D_SurroundView_Manual_CalibTool.pdf vision_sdk\docs\SurroundView\VisionSDK_UserGuide_SurroundView_Calibration_TDA2xx.pdf Regards, Anuj + +Hi Anuj, Thank you for your instruction. We will try to calibrate manually. BTW, even though copy those LENS.BIN into /mnt folder We had ever met the following problem when executed 3D SRV case. "Reading file [/home/root/.calibtable] ... [HOST] ERROR Could you let us know how to generate the file ".calibtable"? Thanks. Best Regards, Sam. + +Hi. Please go through the suggested docs. You will get your answers. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the thread is resolved. Regards, Anuj + +Hi Anju, We try to use default LUT first, but can't stop the 3DSRV multiview rotate to save the synthesis output frame then check whether if the image quality is acceptable after stitched frame. Tracing the function of Sgx3DsrvLink_drvDoProcessFrames() [File:vision_sdk/apps/src/hlos/modules/sgx3Dsrv/sgx3DsrvLink_drv.c /Ln: 544] It's a continus while loop. Could you teach us How/(When) could stop the rotate the multiview of Sgx3DsrvLink? Thanks. regards, Sam. + +Hi Anju, Luke Thanks you for your support. We could have Turn Animation Off for AVB 3DSRV. regards, Sam Hsieh + diff --git a/data2/text/range/30001+/763467.txt b/data2/text/range/30001+/763467.txt new file mode 100644 index 0000000000000000000000000000000000000000..de611a0ac470902b4a97d5b83e8bef85dc2341b8 --- /dev/null +++ b/data2/text/range/30001+/763467.txt @@ -0,0 +1,482 @@ +Ticket Name: Linux/TDA2EVM5777: USB3.0 on EVM Board and Doughterboard usb non functional... any ideas? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello *! Today I have to ask something quite simple: I use: tisdk-rootfs-image-dra7xx-evm.tar.xz downloaded from: "http://downloads.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/03_01_00_03/index_FDS.html" to boot my DRA7xx EVM Board with TDA2+. Linux is booting, login is possible... much is working well, except USB: USB "port" 2 is working without problems, but: The USB on the "piggaback" Board don't. I need the USB3.0 Port (USB "port" 1), which is also non functional. XHCI have been probed "OKAY", usb-device shows: T: Bus=01 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#= 1 Spd=480 MxCh= 1 D: Ver= 2.00 Cls=09(hub ) Sub=00 Prot=01 MxPS=64 #Cfgs= 1 P: Vendor=1d6b ProdID=0002 Rev=04.04 S: Manufacturer=Linux 4.4.84-g742f84423d xhci-hcd S: Product=xHCI Host Controller S: SerialNumber=xhci-hcd.3.auto C: #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=0mA I: If#= 0 Alt= 0 #EPs= 1 Cls=09(hub ) Sub=00 Prot=00 Driver=hub T: Bus=01 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=480 MxCh= 2 D: Ver= 2.10 Cls=09(hub ) Sub=00 Prot=02 MxPS=64 #Cfgs= 1 P: Vendor=0451 ProdID=8027 Rev=01.10 S: SerialNumber=10020059913E C: #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=0mA I: If#= 0 Alt= 1 #EPs= 1 Cls=09(hub ) Sub=00 Prot=02 Driver=hub T: Bus=02 Lev=00 Prnt=00 Port=00 Cnt=00 Dev#= 1 Spd=5000 MxCh= 1 D: Ver= 3.00 Cls=09(hub ) Sub=00 Prot=03 MxPS= 9 #Cfgs= 1 P: Vendor=1d6b ProdID=0003 Rev=04.04 S: Manufacturer=Linux 4.4.84-g742f84423d xhci-hcd S: Product=xHCI Host Controller S: SerialNumber=xhci-hcd.3.auto C: #Ifs= 1 Cfg#= 1 Atr=e0 MxPwr=0mA I: If#= 0 Alt= 0 #EPs= 1 Cls=09(hub ) Sub=00 Prot=00 Driver=hub Controller looks fine, but Port is non functional. Do you have any idea why the USB 3.0 (Port 2) is non functional out-of-the-box on original EVM Board with 100% TI build software-image? (3v3 missing, or any known issues on this?) TNX - Marco. + +Responses: +Hi Marco, Looking the lsusb dump your have provided, I am not really seeing the xhci host controller lisiting for USB0(usb@48890000). The first and third listing you have above is for USB1((usb@488d0000). Note that there will be 2 entry per USB instance (one for HS and one for SS). Note that as per the device tree entry, USB0 is configured in OTG mode. So it will switch to either HOST or DEVICE mode based on the ID pin. You can verify this by typing the below command: cat /sys/kernel/debug/48890000.usb/mode One thing is you can force it to HOST mode by tying below: echo "host" > /sys/kernel/debug/48890000.usb/mode Try lsusb after this. Please let me know what you see when run the above. Also let me know what device did you connect to USB0 port and how did you connect? What kind of USB3 adapter you are using? A picture of it will help me identify the issue you may be seeing. regards, Praveen + +Back again, thank you for the quick response! I will keep it short: USB3.0 micro B cable on both sides connecting a SSD (working well under Ubuntu on PC) "Intenso premium portable 512GB" Mode is OTG I forced HOST mode -> without success :-( lsusb shows: Bus 002 Device 001: ID 1d6b:0003 Linux Foundation Bus 001 Device 002: ID 0451:8027 Texas Instruments, Inc. Bus 001 Device 001: ID 1d6b:0002 Linux Foundation It seems the port is not powered? (But: USB Port 2 works well...?) Never the less: Maybe Dip-switch setting or setting of GPIO is necessary to power up the port? TNX - Marco + +Hi Marco, Are you using the OTG adapter to connect the SSD to the TI-EVM board? if yes, Can you check this link (http://processors.wiki.ti.com/index.php/Linux_Core_DWC3_User's_Guide#Testing ) and see if you have similar OTG adapter. I don't see that the USB Port1 (USB@48890000) is not switching to HOST mode. Can you share the full kernel log? -Praveen + +Hi again! My SSD connection looks like this: (In my Hand: SSD and cable, below: Connection on EVM) What about the issue that the LED of my SSD never light? It is not powered (no 5V), so there is no chance for enumaration anyhow. .... I will take a look in to the schematic and see if the 5V are at the connector. (Any DIP-Switches or GPIO neccessary? You didn't answer this question... So I've to ask again ;-) ) Pin 1 of the micro B Jacket: There is no 5V voltage present... Thanks... Marco. + +a dmesg of the boot process shows following: [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.008309] Switching to timer-based delay loop, resolution 162ns +[ 0.014968] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.025229] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.030969] Console: colour dummy device 80x30 +[ 0.035622] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.042415] This ensures that you still see kernel messages. Please +[ 0.048930] update your kernel commandline. +[ 0.053322] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.063958] pid_max: default: 32768 minimum: 301 +[ 0.068871] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.075758] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.083615] Initializing cgroup subsys io +[ 0.087835] Initializing cgroup subsys memory +[ 0.092409] Initializing cgroup subsys devices +[ 0.097057] Initializing cgroup subsys freezer +[ 0.101718] Initializing cgroup subsys perf_event +[ 0.106635] Initializing cgroup subsys pids +[ 0.111030] CPU: Testing write buffer coherency: ok +[ 0.116318] /cpus/cpu@0 missing clock-frequency property +[ 0.121864] /cpus/cpu@1 missing clock-frequency property +[ 0.127419] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.133343] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.220420] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.220491] Brought up 2 CPUs +[ 0.229510] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.235950] CPU: All CPU(s) started in HYP mode. +[ 0.240771] CPU: Virtualization extensions available. +[ 0.246426] devtmpfs: initialized +[ 0.278956] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.287844] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.407992] omap_hwmod: dcan1: _wait_target_disable failed +[ 0.513524] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.523721] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.533994] pinctrl core: initialized pinctrl subsystem +[ 0.540279] NET: Registered protocol family 16 +[ 0.545889] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.575007] cpuidle: using governor ladder +[ 0.605031] cpuidle: using governor menu +[ 0.617946] OMAP GPIO hardware version 0.1 +[ 0.626369] GPIO line 161 (radio_rst) hogged as output/low +[ 0.634449] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.669366] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.677685] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.684226] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.691918] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.700159] OMAP DMA hardware revision 0.0 +[ 0.745635] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.756542] edma 43300000.edma: memcpy is disabled +[ 0.766239] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.776827] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.782902] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.788980] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.795028] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.801202] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.807273] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.816444] palmas 0-0058: IRQ missing: skipping irq request +[ 0.833540] palmas 0-0058: Muxing GPIO 51, PWM 0, LED 2 +[ 0.894091] irq: no irq domain found for /ocp/i2c@48070000/tps65917@58 ! +[ 0.901983] pcf857x 0-0020: probed +[ 0.906141] pcf857x 0-0021: probed +[ 0.910091] GPIO line 465 (vin6_sel_s0) hogged as output/low +[ 0.916087] pcf857x 0-0026: probed +[ 0.919807] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.926024] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.946118] pcf857x: probe of 3-0021 failed with error -121 +[ 0.951953] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz +[ 0.977867] pca953x 4-0020: failed reading register +[ 0.982966] pca953x: probe of 4-0020 failed with error -121 +[ 0.989384] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 400 kHz +[ 0.995390] media: Linux media interface: v0.10 +[ 1.000188] Linux video capture interface: v2.00 +[ 1.005044] pps_core: LinuxPPS API ver. 1 registered +[ 1.010238] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 1.019712] PTP clock support registered +[ 1.023874] EDAC MC: Ver: 3.0.0 +[ 1.027951] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 1.034590] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 1.041281] Advanced Linux Sound Architecture Driver Initialized. +[ 1.048502] clocksource: Switched to clocksource arch_sys_counter +[ 1.065601] NET: Registered protocol family 2 +[ 1.070664] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 1.078037] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 1.084867] TCP: Hash tables configured (established 8192 bind 8192) +[ 1.091526] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 1.097708] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 1.104523] NET: Registered protocol family 1 +[ 1.109359] RPC: Registered named UNIX socket transport module. +[ 1.115522] RPC: Registered udp transport module. +[ 1.120448] RPC: Registered tcp transport module. +[ 1.125361] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 1.132079] PCI: CLS 0 bytes, default 64 +[ 1.133097] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 1.151654] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 1.158386] NFS: Registering the id_resolver key type +[ 1.163736] Key type id_resolver registered +[ 1.168114] Key type id_legacy registered +[ 1.172391] ntfs: driver 2.1.32 [Flags: R/O]. +[ 1.178319] bounce: pool size: 64 pages +[ 1.182525] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 1.190251] io scheduler noop registered (default) +[ 1.195257] io scheduler deadline registered +[ 1.199781] io scheduler cfq registered +[ 1.206187] vsys_5v0: supplied by vsys_12v0 +[ 1.210644] ldo3: supplied by vsys_5v0 +[ 1.218248] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 1.229051] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 1.235217] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 1.243205] IO 0x20003000..0x20012fff -> 0x00000000 +[ 1.248594] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 1.286708] dra7-pcie 51000000.pcie_rc: link is not up +[ 1.292242] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 1.299049] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 1.304767] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 1.311210] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 1.318378] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 1.318420] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +[ 1.318443] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] +[ 1.318528] pci 0000:00:00.0: supports D1 +[ 1.318539] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 1.318762] PCI: bus0: Fast back to back transfers disabled +[ 1.324681] PCI: bus1: Fast back to back transfers enabled +[ 1.330486] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 1.337544] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 1.344616] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 1.350026] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 1.357260] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded +[ 1.357381] aer 0000:00:00.0:pcie02: service driver aer loaded +[ 1.418993] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 1.429109] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.438289] console [ttyS0] enabled +[ 1.445496] bootconsole [earlycon0] disabled +[ 1.455165] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.464867] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.474975] [drm] Initialized drm 1.1.0 20060810 +[ 1.481336] vsys_3v3: supplied by vsys_12v0 +[ 1.485585] ldo5: supplied by vsys_3v3 +[ 1.489992] OMAP DSS rev 6.1 +[ 1.493732] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.502190] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 1.518307] loop: module loaded +[ 1.527517] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.532937] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.538810] Creating 7 MTD partitions on "spi32766.0": +[ 1.543974] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.550046] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.556350] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.563273] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.569924] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.577259] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.583587] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.591282] libphy: Fixed MDIO Bus: probed +[ 1.638538] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.644661] libphy: 48485000.mdio: probed +[ 1.653018] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 +[ 1.661362] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver TI DP83867 +[ 1.670347] cpsw 48484000.ethernet: Detected MACID = 0c:b2:b7:92:97:5c +[ 1.677000] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.684020] cpsw 48484000.ethernet: cpsw: Detected MACID = 0c:b2:b7:92:97:5d +[ 1.692748] mousedev: PS/2 mouse device common for all mice +[ 1.699099] i2c /dev entries driver +[ 1.703251] tvp5158 4-0058: Unable to of_probe +[ 1.708229] ov1063x 4-0037: Failed writing register 0x0103! +[ 1.713885] ov1063x: probe of 4-0037 failed with error -121 +[ 1.719699] ov490 4-0024: Failed reading register 0x300a! +[ 1.725129] ov490: probe of 4-0024 failed with error -121 +[ 1.731252] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 1.738306] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 1.748727] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 1.754944] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.759615] vip 48970000.vip: VPDMA firmware loaded +[ 1.764844] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode +[ 1.771339] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode +[ 1.777722] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode +[ 1.784118] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode +[ 1.790512] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode +[ 1.797084] vio_3v3: supplied by vsys_3v3 +[ 1.801167] vio_3v3_sd: supplied by vio_3v3 +[ 1.805502] ldo4: supplied by vsys_5v0 +[ 1.858941] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.865328] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.888675] smps5: supplied by vsys_3v3 +[ 1.892730] vio_1v8: supplied by smps5 +[ 1.950302] ledtrig-cpu: registered to indicate activity on CPUs +[ 1.971894] hwspinlock_user gatemp: requested 20 hwspinlocks +[ 1.978926] aic_dvdd: supplied by vio_3v3 +[ 1.985449] davinci-mcasp 48464000.mcasp: DAI is shared +[ 1.991580] davinci-mcasp 48474000.mcasp: DAI is shared +[ 1.997668] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 2.008425] NET: Registered protocol family 10 +[ 2.023877] sit: IPv6 over IPv4 tunneling driver +[ 2.029066] NET: Registered protocol family 17 +[ 2.033755] Key type dns_resolver registered +[ 2.038191] omap_voltage_late_init: Voltage driver support not added +[ 2.045100] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.051355] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.057639] buck10: supplied by vsys_3v3 +[ 2.062227] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.068437] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.076669] Power Management for TI OMAP4+ devices. +[ 2.081764] Registering SWP/SWPB emulation handler +[ 2.087397] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.094522] dmm 4e000000.dmm: initialized all PAT entries +[ 2.100254] ldo1: supplied by vsys_3v3 +[ 2.107026] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.113727] [drm] No driver support for vblank timestamp query. +[ 2.119732] omapdrm omapdrm.0: No connectors reported connected with modes +[ 2.126671] [drm] Cannot find any crtc or sizes - going 1024x768 +[ 2.134977] [drm] Enabling DMM ywrap scrolling +[ 2.143026] Console: switching to colour frame buffer device 128x48 +[ 2.152342] omapdrm omapdrm.0: fb0: omapdrm frame buffer device +[ 2.179189] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.185353] tvp5158 4-0058: Unable to of_probe +[ 2.190845] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.200516] asoc-simple-card jamr3_sound: tlv320aic3x-hifi <-> 48474000.mcasp mapping ok +[ 2.209786] tvp5158 4-0058: Unable to of_probe +[ 2.214967] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.221873] hctosys: unable to open rtc device (rtc0) +[ 2.221897] tvp5158 4-0058: Unable to of_probe +[ 2.231418] mmc0: host does not support reading read-only switch, assuming write-enable +[ 2.241383] mmc0: new high speed SDHC card at address 0007 +[ 2.247650] aic_dvdd: disabling +[ 2.250954] ALSA device list: +[ 2.253930] #0: DRA7xx-EVM +[ 2.256817] #1: HDMI 58040000.encoder +[ 2.257262] mmcblk0: mmc0:0007 SD4GB 3.71 GiB +[ 2.260723] mmcblk0: p1 p2 +[ 2.261261] tvp5158 4-0058: Unable to of_probe +[ 2.272477] #2: DRA7xx-JAMR3 +[ 2.312247] mmc1: MAN_BKOPS_EN bit is not set +[ 2.323531] mmc1: new HS200 MMC card at address 0001 +[ 2.338862] mmcblk1: mmc1:0001 MMC08G 7.25 GiB +[ 2.343577] mmcblk1boot0: mmc1:0001 MMC08G partition 1 8.00 MiB +[ 2.359724] mmcblk1boot1: mmc1:0001 MMC08G partition 2 8.00 MiB +[ 2.366798] tvp5158 4-0058: Unable to of_probe +[ 5.176434] EXT4-fs (mmcblk0p2): recovery complete +[ 5.184089] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 5.192266] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 5.199644] devtmpfs: mounted +[ 5.202831] Freeing unused kernel memory: 340K +[ 5.207293] This architecture does not have kernel memory protection. +[ 5.422569] systemd[1]: System time before build time, advancing clock. +[ 5.460478] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 5.472937] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 5.486710] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +) +[ 5.505187] systemd[1]: Detected architecture arm. +[ 5.529481] systemd[1]: Set hostname to . +[ 5.607583] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 23 bits of entropy available) +[ 5.627756] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 5.638192] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 5.654663] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 5.672871] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 5.777935] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 5.787424] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 5.797295] random: systemd: uninitialized urandom read (16 bytes read, 28 bits of entropy available) +[ 6.190492] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 6.198280] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 6.205996] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 6.213285] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 6.220733] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 6.230207] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ 6.260963] systemd[1]: Reached target Remote File Systems. +[ 6.290743] systemd[1]: Listening on Syslog Socket. +[ 6.308897] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 6.328859] systemd[1]: Listening on Network Service Netlink Socket. +[ 6.359917] systemd[1]: Created slice User and Session Slice. +[ 6.378774] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 6.399245] systemd[1]: Created slice System Slice. +[ 6.418692] systemd[1]: Reached target Slices. +[ 6.439279] systemd[1]: Created slice system-getty.slice. +[ 6.459224] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 6.488799] systemd[1]: Reached target Swap. +[ 6.508712] systemd[1]: Listening on Journal Socket (/dev/log). +[ 6.538733] systemd[1]: Listening on udev Control Socket. +[ 6.568936] systemd[1]: Listening on Journal Socket. +[ 6.628652] systemd[1]: Mounting Temporary Directory... +[ 6.650647] systemd[1]: Starting Setup Virtual Console... +[ 6.670342] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 6.684053] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 6.691628] systemd[1]: Mounting Debug File System... +[ 6.720445] systemd[1]: Starting Journal Service... +[ 6.740652] systemd[1]: Mounting POSIX Message Queue File System... +[ 6.772937] systemd[1]: Starting Load Kernel Modules... +[ 6.793507] CMEMK module: reference Linux version 4.4.84 +[ 6.800938] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[ 6.810948] no physical memory specified +[ 6.814940] cmemk initialized +[ 6.832578] cryptodev: driver 1.8 loaded. +[ 6.838883] systemd[1]: Listening on udev Kernel Socket. +[ 6.858967] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 6.888754] systemd[1]: Reached target Paths. +[ 6.943203] systemd[1]: Mounted Debug File System. +[ 6.968750] systemd[1]: Mounted POSIX Message Queue File System. +[ 6.998712] systemd[1]: Mounted Temporary Directory. +[ 7.018893] systemd[1]: Started Journal Service. +[ 7.658918] systemd-journald[141]: Received request to flush runtime journal from PID 1 +[ 8.081668] CAN device driver interface +[ 8.087905] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 8.107638] remoteproc0: 58820000.ipu is available +[ 8.113854] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 8.124722] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 8.144785] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 8.145446] tvp5158 4-0058: Unable to of_probe +[ 8.178426] remoteproc1: 55020000.ipu is available +[ 8.204198] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 8.236136] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 8.260238] tvp5158 4-0058: Unable to of_probe +[ 8.260285] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 8.260322] remoteproc2: 40800000.dsp is available +[ 8.260325] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 8.260327] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 8.261274] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 8.261308] remoteproc3: 41000000.dsp is available +[ 8.261310] remoteproc3: Note: remoteproc is still under development and considered experimental. +[ 8.261312] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 8.276566] m_can 42c01a00.mcan: hclk could not be found +[ 8.277095] m_can 42c01a00.mcan: m_can device registered (irq=367, version=32) +[ 8.352377] tvp5158 4-0058: Unable to of_probe +[ 8.572777] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 8.605980] tvp5158 4-0058: Unable to of_probe +[ 8.625782] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 8.633706] tvp5158 4-0058: Unable to of_probe +[ 8.843647] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 8.853192] tvp5158 4-0058: Unable to of_probe +[ 8.861797] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 8.880394] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.880919] tvp5158 4-0058: Unable to of_probe +[ 8.891865] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.892171] tvp5158 4-0058: Unable to of_probe +[ 8.904048] tvp5158 4-0058: Unable to of_probe +[ 8.929535] tvp5158 4-0058: Unable to of_probe +[ 9.040173] SCSI subsystem initialized +[ 9.158741] remoteproc1: registered virtio0 (type 7) +[ 9.194845] remoteproc0: registered virtio1 (type 7) +[ 9.239306] libata version 3.00 loaded. +[ 9.404385] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 9.412846] ahci 4a140000.sata: Enable 32-bit DMA instead of 64-bit. +[ 9.447574] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 9.465305] remoteproc2: registered virtio2 (type 7) +[ 9.473639] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 9.477451] remoteproc3: registered virtio3 (type 7) +[ 9.525487] scsi host0: ahci +[ 9.549684] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 343 +[ 9.601369] tvp5158 4-0058: Unable to of_probe +[ 9.625752] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 9.635031] tvp5158 4-0058: Unable to of_probe +[ 9.641812] tvp5158 4-0058: Unable to of_probe +[ 9.948651] ata1: SATA link down (SStatus 0 SControl 300) +[ 10.199003] Bluetooth: Core ver 2.21 +[ 10.206859] NET: Registered protocol family 31 +[ 10.224017] Bluetooth: HCI device and connection manager initialized +[ 10.245844] Bluetooth: HCI socket layer initialized +[ 10.267496] Bluetooth: L2CAP socket layer initialized +[ 10.284165] Bluetooth: SCO socket layer initialized +[ 10.349248] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 10.397676] net eth1: initializing cpsw version 1.15 (0) +[ 10.429836] net eth0: initialized cpsw ale version 1.4 +[ 10.464351] net eth0: ALE Table size 1024 +[ 10.483238] NET: Registered protocol family 15 +[ 10.529972] remoteproc1: powering up 55020000.ipu +[ 10.543455] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3743112 +[ 10.575001] random: nonblocking pool is initialized +[ 10.584409] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 10.657244] net eth1: phy found : id is : 0x2000a231 +[ 10.667184] Initializing XFRM netlink socket +[ 10.699747] remoteproc1: remote processor 55020000.ipu is now up +[ 10.718971] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 10.726420] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 10.729566] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x65 +[ 10.730451] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x66 +[ 10.756284] net eth0: initializing cpsw version 1.15 (0) +[ 10.770942] tvp5158 4-0058: Unable to of_probe +[ 10.776238] remoteproc0: powering up 58820000.ipu +[ 10.805340] remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 4794908 +[ 10.831864] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 +[ 10.873164] remoteproc0: remote processor 58820000.ipu is now up +[ 10.898549] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 10.899881] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x32 +[ 10.899997] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x33 +[ 10.900190] virtio_rpmsg_bus virtio1: creating channel rpmsg-omx addr 0x3c +[ 10.900324] virtio_rpmsg_bus virtio1: creating channel rpmsg-rpc addr 0x65 +[ 10.939393] net eth0: phy found : id is : 0x2000a231 +[ 10.955363] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 10.990185] tvp5158 4-0058: Unable to of_probe +[ 10.999802] remoteproc2: powering up 40800000.dsp +[ 11.019464] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 5635840 +[ 11.032959] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 11.038840] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 11.044776] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 11.104180] remoteproc2: remote processor 40800000.dsp is now up +[ 11.115406] tvp5158 4-0058: Unable to of_probe +[ 11.135010] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 11.135756] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x32 +[ 11.135966] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x33 +[ 11.136240] virtio_rpmsg_bus virtio2: creating channel rpmsg-omx addr 0x3c +[ 11.136352] virtio_rpmsg_bus virtio2: creating channel rpmsg-rpc addr 0x65 +[ 11.210258] tvp5158 4-0058: Unable to of_probe +[ 11.216839] remoteproc3: powering up 41000000.dsp +[ 11.233942] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 5635844 +[ 11.267784] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 11.273667] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 11.279588] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 11.317822] remoteproc3: remote processor 41000000.dsp is now up +[ 11.339324] virtio_rpmsg_bus virtio3: rpmsg host is online +[ 11.340072] virtio_rpmsg_bus virtio3: creating channel rpmsg-client-sample addr 0x32 +[ 11.340386] virtio_rpmsg_bus virtio3: creating channel rpmsg-client-sample addr 0x33 +[ 11.340479] virtio_rpmsg_bus virtio3: creating channel rpmsg-omx addr 0x3c +[ 11.340673] virtio_rpmsg_bus virtio3: creating channel rpmsg-rpc addr 0x65 +[ 11.413261] tvp5158 4-0058: Unable to of_probe +[ 11.439581] rpmsg_rpc rpmsg0: probing service dce-callback with src 1024 dst 101 +[ 11.478310] tvp5158 4-0058: Unable to of_probe +[ 11.478410] rpmsg_rpc rpmsg0: published functions = 4 +[ 11.478696] rpmsg_rpc rpmsg1: probing service rpmsg-dce with src 1025 dst 102 +[ 11.495340] rpmsg_rpc rpmsg5: probing service rpc_example_2 with src 1024 dst 101 +[ 11.507167] rpmsg_rpc rpmsg1: published functions = 9 +[ 11.507345] tvp5158 4-0058: Unable to of_probe +[ 11.526849] tvp5158 4-0058: Unable to of_probe +[ 11.527169] rpmsg_rpc rpmsg9: probing service rpc_example_4 with src 1024 dst 101 +[ 11.527552] tvp5158 4-0058: Unable to of_probe +[ 11.527605] rpmsg_rpc rpmsg13: probing service rpc_example_3 with src 1024 dst 101 +[ 11.527787] rpmsg_rpc rpmsg5: published functions = 8 +[ 11.527845] rpmsg_rpc rpmsg9: published functions = 8 +[ 11.528391] tvp5158 4-0058: Unable to of_probe +[ 11.537928] rpmsg_rpc rpmsg13: published functions = 8 +[ 11.684020] tvp5158 4-0058: Unable to of_probe +[ 11.738924] usbcore: registered new interface driver usbfs +[ 11.756992] usbcore: registered new interface driver hub +[ 11.768195] usbcore: registered new device driver usb +[ 11.822497] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[ 11.828023] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 1 +[ 11.847070] xhci-hcd xhci-hcd.3.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 11.865922] xhci-hcd xhci-hcd.3.auto: irq 503, io mem 0x488d0000 +[ 11.883094] hub 1-0:1.0: USB hub found +[ 11.896697] hub 1-0:1.0: 1 port detected +[ 11.907231] tvp5158 4-0058: Unable to of_probe +[ 11.908357] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller +[ 11.908367] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 2 +[ 11.908447] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 11.935663] hub 2-0:1.0: USB hub found +[ 11.941246] hub 2-0:1.0: 1 port detected +[ 11.954510] dwc3 48890000.usb: otg: primary host xhci-hcd.4.auto registered +[ 11.962403] tvp5158 4-0058: Unable to of_probe +[ 11.967026] dwc3 48890000.usb: otg: shared host xhci-hcd.4.auto registered +[ 11.980576] dwc3 48890000.usb: otg: can't start till gadget registers +[ 11.990458] tvp5158 4-0058: Unable to of_probe +[ 12.218555] usb 1-1: new high-speed USB device number 2 using xhci-hcd +[ 12.269346] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 12.388921] hub 1-1:1.0: USB hub found +[ 12.396832] hub 1-1:1.0: 2 ports detected +[ 12.421538] tvp5158 4-0058: Unable to of_probe +[ 13.956103] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx +[ 13.964088] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready + +Additional information: I am not able to "force" Host Mode: root@dra7xx-evm:~# echo "host" > /sys/kernel/debug/48890000.usb/mode + +root@dra7xx-evm:~# cat /sys/kernel/debug/48890000.usb/mode +OTG + +I don't see the xhci host controller getting probed. Since this USB instance is configured in OTG mode in the kernel device tree file, we could force it to switch to Host mode. So , I suspect the issue to be due to the ID pin. Looks like the USB cable is not grounding the ID pin. There is a way to force the ID pin low on DRA7-evm. It can be done using DIP switch SW1 switch 2. Just flip it to the ON position and see if you get GPIO ID interrupt and XHCI host controller getting probed. The Voltage of VBUS pin of USB1 will be zero if usb cable is not inserted as it is in device mode. The moment you plug in the connect the OTG compliant able (which has ID grounded) you should see VBUS on USB1 as it now has entered in host mode. So if we don't see the voltage on VBUS pin, then most probably the usb cable used to connect the SSD drive is not OTG compliant and It will not work on the EVM. -Praveen + diff --git a/data2/text/range/30001+/764828.txt b/data2/text/range/30001+/764828.txt new file mode 100644 index 0000000000000000000000000000000000000000..895b21f50f9645f892801f5206c2d17ef03ae81d --- /dev/null +++ b/data2/text/range/30001+/764828.txt @@ -0,0 +1,56 @@ +Ticket Name: TDA2: AdaBoost Training with CaltechUsa + +Query Text: +Part Number: TDA2 Hi, I am a beginner and I just started to work on TDA2EVM and Adaboost for OD application. I want to train the Adaboost classifier for Pedestrian detection which should execute on TDA2. From the previous discussions about AdaBoost training on this forum, I got to know that we can use Adaboost object detection training tool (Matlab based github.com/.../acf-jacinto ) to generate .descriptor. I read the info in the Readme file ## Usage + +* Open Matlab and navigate to detector folder. +* Open acfJacintoExample.m in editor +* Make changes for your dataset path, list of videos and annotations files, object type to be trained etc. +* Run the file to do train and test. I want to do the Adaboost training with Caltech dataset for pedestrian detection---- > http://www.vision.caltech.edu/Image_Datasets/CaltechPedestrians/ Has anyone tried training and testing the Adaboost classifier with Caltech dataset? So In acfJacintoExample.m I should just give the respective paths to .seq and respective annotations .vbb file and then execute the .m? elseif strcmp(dataName, 'CaltechUsa') %error('Define the dataset paths here'); exptName='AcfJacintoClatechUsa'; extractType='all'; extractFormat=''; dataDir='E:\HOG_SVM\Training_datasets_SVM\Calltech_for_Adaboost'; vidList={ ... {'videos/set00/V000.seq', 'videos/set00/V001.seq','videos/set00/V002.seq', 'videos/set00/V003.seq','videos/set00/V004.seq', 'videos/set00/V005.seq'}, ... {'videos/set01/V000.seq', 'videos/set01/V001.seq','videos/set01/V002.seq', 'videos/set01/V003.seq','videos/set01/V004.seq', 'videos/set01/V005.seq'} ... }; vbbList={ ... {'annotations/set00/V000.vbb', 'annotations/set00/V001.vbb', 'annotations/set00/V002.vbb', 'annotations/set00/V003.vbb', 'annotations/set00/V004.vbb', 'annotations/set00/V005.vbb'}, ... {'annotations/set01/V000.vbb', 'annotations/set01/V001.vbb', 'annotations/set01/V002.vbb', 'annotations/set01/V003.vbb', 'annotations/set01/V004.vbb', 'annotations/set01/V005.vbb'} ... }; config = []; ------------------------------------------------------------------------------------------------------------------------------------------------- Do I need to do anything else like setting up any parameters before training and executing acfJacintoExample.m ?? ------------------------------------------------------------------------------------------------------------------------------------------------- I got to know that after execution know that a .descriptor file will be generated which we need to convert into binary format which is TDA OD application compatiable weight file by using AdaboostTableGen.exe. Anything else I should know more like type conversions of some variables or so? + +Responses: +Did you try the changes that you mentioned? What was the outcome? Did you face any issue? I suggest not to try a large dataset initially. Please try the example that is already given. Or try training with a part of the large dataset to get an initial understanding of the training and usage of the descriptor file. Once you are sure that everything works, you will be more confident to try a large dataset training. If you face any specific issue, let us know. + +Hi Manu, I gave the respective path to the Caltech dataset and there were 2 .descriptor files generated in C:\ti\Adaboost_Training_Tool_acf-jacinto-master\detector\models folder namely 'AcfJacintoClatechUsaDetectorCascade.descriptor' size of which is 883 KB and another one 'AcfJacintoClatechUsaDetectorCompact.descriptor' size of which is 181 KB. Which one of these should I use further? For now I used 'AcfJacintoClatechUsaDetectorCascade.descriptor' to generate .bin file using AdaboostTableGen.exe I will soon test the TI OD code by configuring the object_detection.cfg to read the weight .bin file and update you. How do I use this .bin in Vision SDK? Thanks and Regards, Ganesh + +Have you tried the example that is provided in VisionSDK? Please try it and let us know if you face any specific issue. I have looped in the expert. + +Hi Manu, I used ‘AcfJacintoClatechUsaDetectorCascade.descriptor’ along with AdaboostTableGen.exe provided in ‘C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\200.V.OD.C66XSRC.00.06\modules\ti_object_detection\utils’ to generate a ‘pd_adaboost_weight_Caltech.bin’ weights file which can be used in OD test application. I ran the test application with the TI provided ‘VIRB0008_0r_4p_PedSegments_1280x720_nv12_10fr.bin’ as input and configured the ‘object_detection.cfg’ to use external weights from ‘pd_adaboost_weight_Caltech.bin’ but there were no pedestrians detected. It seems that the ‘VIRB0008_0r_4p_PedSegments_1280x720_nv12_10fr.bin’ does not have any pedestrians. 1. Could you please provide us similar input file containing pedestrians ? 2. Also how can we generate the file, ‘adaboost_const_pd.c’ provided in ‘C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\200.V.OD.C66XSRC.00.06\modules\ti_object_detection\algo\src’which contains AdaBoost classifier weights? The comments in this file say that it is autogenerated. I would like to use the trained weights from ‘pd_adaboost_weight_Caltech.bin’ in VisionSDK OD usecase. How are the values from above descriptor files mapped into the ‘pd_adaBoost_Table’ and 'pd_adaBoost_IndexTable' in adaboost_const_pd.c ? Is there some application provided by TI to do that? Thanks and Regards, Ganesh + +Hi the ti_object_detection library which runs on C66x DSP only does the ADABOOST part on a multi-scale HOG feature pyramid. This Multi-scale feature pyramid is generated by "ti_pd_feature_plane_computation" which is available part of EVE library. So you can take any image with pedestrians, vehicles or traffic signs and first run the "ti_pd_feature_plane_computation" to get the multi-scale HOG feature pyramid and then run the "ti_object_detection" library to detect pedestrians, vehicles and traffic signs. 2. The file "adaboost_const_pd.c" is a set of default weights for detecting pedestrians. You can train on a different dataset using ACF Jacinto, convert the .descriptor filed to.bin file and supply the new weights externally by using the "useExtWeightsPD" flag and provide path in "pdWeightsFileName". Please refer to "object_detection.cfg" for usage. This external weights is provided using an additional buffer in the "inBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]". Please refer to object_detection_tb.c for usage. Regards, Shyam + +Hi Shyam, Thanks for your answer. I already used the external weights .bin file in the tb as mentioned by you. The test bench is executing ok but it seems there are no pedestrians in 'VIRB0008_0r_4p_PedSegments_1280x720_nv12_10fr.bin' provided by TI as an test input and only TSR are being detected. Can you provide an input .bin with pedestrians? I would like to use the same weights in the OD usecase scenario. How can I do that? Is there some mapping between 'adaboost_const_pd.c' and the .descriptor file, so that I could copy the values from .descriptor file into adaboost_const_pd.c ---> ‘pd_adaBoost_Table’ and 'pd_adaBoost_IndexTable'? Regards, Ganesh + +Hi Shyam, Thanks for your answer. I already used the external weights .bin file in the tb as mentioned by you. The test bench is executing ok but it seems there are no pedestrians in 'VIRB0008_0r_4p_PedSegments_1280x720_nv12_10fr.bin' provided by TI as an test input and only TSR are being detected. Can you provide an input .bin with pedestrians? I would like to use the same weights in the OD usecase scenario. How can I do that? Is there some mapping between 'adaboost_const_pd.c' and the .descriptor file, so that I could copy the values from .descriptor file into adaboost_const_pd.c ---> ‘pd_adaBoost_Table’ and 'pd_adaBoost_IndexTable'? Regards, Ganesh + +Hi Ganesh, As mentioned earlier, you will have to use "ti_pd_feature_plane_computation" library to create an input to "ti_object_detection" library. Please take any image with pedestrian and run the "ti_pd_feature_plane_computation" application first. Provide the output of this application to the ti_object_detection application. The pd_adaboost_weights.bin file is simply the binary version of the adaboost_const_pd.c file. You dont have to modify the adaboost_const_pd.c file. You can generate a new pd_adaboost_weights.bin file by running the "ti_object_detection\utils\AdaboostTableGen.exe". You can then supply this .bin file externally to detect pedestrians. Hope this helps. Regards, Shyam + +Hi Shyam, ---->As mentioned earlier, you will have to use "ti_pd_feature_plane_computation" library to create an input to "ti_object_detection" library. Please take any image with pedestrian and run the "ti_pd_feature_plane_computation" application first. Provide the output of this application to the ti_object_detection application. I will try doing this to generate an input file to test the OD code with external weights. -----> The pd_adaboost_weights.bin file is simply the binary version of the adaboost_const_pd.c file. You dont have to modify the adaboost_const_pd.c file. You can generate a new pd_adaboost_weights.bin file by running the "ti_object_detection\utils\AdaboostTableGen.exe". You can then supply this .bin file externally to detect pedestrians. I think there is some misunderstanding. I know how to generate new pd_adaboost_weights based on the .descriptor file, which I got after training AdaBoost classifier with the Caltech dataset. I also know how to use the external weights .bin file for testing the OD code. My question is : how can I use this external weights to run the Use case for OD in real-time application instead of the values in the file 'adaboost_const_pd.c'? regards, Ganesh + +Hi Ganesh, Just as how its done in object_detection_tb.c, you will have to allocate a buffer and supply as part of "inBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]". So you will have to modify Vision SDK application to allocate a buffer in the ARM side, copy the external weights and share it with DSP. The weights in "adaboost_const_pd.c" will be used only if "useExtWeightsPD = 0", when "useExtWeightsPD = 1" the ti_object_detection libraray expects the host to allocate and share the buffer with new weights. Regards, Shyam + +Hi Shyam, Again thanks for your reply! I will try doing that and update you. regards, Ganesh + +Hi Shyam, I tried the following option that you mentioned previously, ---->As mentioned earlier, you will have to use "ti_pd_feature_plane_computation" library to create an input to "ti_object_detection" library. Please take any image with pedestrian and run the "ti_pd_feature_plane_computation" application first. Provide the output of this application to the ti_object_detection application. I tried to compile the code for TARGET_PLATFORM=PC, and I am facing some compilation error. I have followed instrustions mentioned in 'eve_sw_getting_started.pdf' I successfully compiled the target code by doing just 'gmake' as mentioned in above image. Then I run vcvarshall.bat and again 'gmake TARGET_PLATFORM=PC' But getting the following error! Can you please help me solve it? Thanks and regards, Ganesh + +Hi Shyam, It would be very nice if could give some pointers of how I can proceed with this. I am new to vision sdk. Thanks and Regards, Ganesh + +Hi Shyam, You had suggested me the following thing to use the external weights .bin file in Vision SDK. I have some doubts regarding the same. Just as how its done in object_detection_tb.c, you will have to allocate a buffer and supply as part of "inBufs->bufDesc[TI_OD_IN_BUFDESC_PD_ADABOOST_WEIGHTS]". So you will have to modify Vision SDK application to allocate a buffer in the ARM side, copy the external weights and share it with DSP. The weights in "adaboost_const_pd.c" will be used only if "useExtWeightsPD = 0", when "useExtWeightsPD = 1" the ti_object_detection libraray expects the host to allocate and share the buffer with new weights. -> Which file or files do I need to modify in VisionSDK and how exactly? Is it objectDetectionLink_algPlugin.c? -> How do I read a .bin file and store in the buffer which I will declare for the binary weights? can I used the usual fopen() and fread() commands to do this? Looking forward to your reply. Thanks and Regards, Ganesh + +Hi Ganesh, Sorry for late reply. I've forwarded your EVE build query to another expert, he will be helping you on that issue. As for implementing the additional buffer in VisionSDK, you will have to allocate a buffer from ARM and supply to C66x DSP. In the objectDetectionLink_algPlugin file, you will have to assign the inBufs pointers just like how its done in object_detection_tb.c but memory allocation cannot happen there. This is because ARM should allocate a buffer, read a .bin file and pass the buffer to DSP after doing a cache write-back. This needs to happen only once per run. For reading the .bin file you can use regular fread() open the file in "rb" mode. I will also check with VisionSDK expert if he can provide some pointers on the specifics. Regards, Shyam + +Hi Shyam, Thanks for your answer. Looking forward to your reply. regards, Ganesh + +Hi Ganesh, Can you try building the full EVE SW code in host emulation mode before building the ti_pd_feature_plane_computation. For this you need to go to the top most directory of EVE SW and run the following command : gmake TARGET_PLATFORM=PC Regards, Anshu + +Hi Anshu, Tried doing that, getting the same error as mentioned before! Just for your info, we have the source code version: eve_sw_src_01_18_00_00. Thanks and Regards, Ganesh + +Ganesh, Can you confirm whether you have made any modifications to the makefile or applet files? It looks like vcop.h file is not added. Can you include cop.h file in feature_plane_comp_alg.c and see if that fixes the issue. Regards, Anshu + +Hi Anshu, When I do >> gmake .... the eve code is compiling without any problem but when I do >> gmake TARGET_PLATFORM=PC ....then I am getting errors one of them is the following. Yes I did modify some paths. Following is my make file -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- #****************************************************************************** #* Copyright (C) 2009-2013 Texas Instruments Incorporated. * #* All Rights Reserved * #****************************************************************************** # # This makefile expects the following environment variables from the user: # ARP32_TOOLS : Directory pointing to ARP32 compiler # DSP_TOOLS : Directory pointing to DSP compiler # xdais_PATH : Directory pointing to root of XDAIS installation. # EVE_SW_ROOT : Directory pointing to the root of the EVE SW installation. # This is optional and is current directory by default. # UTILS_PATH : Directory pointing to util commands mkdir and rm # (CCS users can find them at ccsv5/utils/cygwin) # # Please note that the path names should use forward slash (/) and should # not contain quotes and spaces. As an example, if we want to set ARP32 compiler # path as C:/Program Files/Texas Instruments/ARP32_tools, use # set ARP32_TOOLS=C:/PROGRA~1/TEXASI~1/ARP32_tools # #****************************************************************************** ifdef SystemRoot START_TIME := $(shell echo . |time|findstr [0-9]) START_TIME := $(lastword $(START_TIME)) else START_TIME = $(shell date +%H:%M:%S) endif $(info START_TIME $(START_TIME)) ############################################################## #optional : only for: gmake format FORMATTER = "C:/Tools/AStyle/bin/AStyle.exe" FORMATOPT = --recursive --suffix=none --style=allman --convert-tabs --min-conditional-indent=1 --indent-col1-comments --align-pointer=name ############################################################## TI_SW_ROOT := $(abspath ../../) UTILS_PATH ?=$(TI_SW_ROOT)\os_tools\windows\xdctools_3_32_00_06_core\bin EVE_SW_ROOT ?=$(TI_SW_ROOT)\algorithms_codecs\eve_sw_src_01_18_00_00 DSP_TOOLS ?=$(TI_SW_ROOT)\cg_tools\windows\C6000_7.4.2 ARP32_TOOLS ?=$(TI_SW_ROOT)\cg_tools\windows\arp32_1.0.7 xdais_PATH ?= $(TI_SW_ROOT)\algorithms_codecs\xdais_7_24_00_04 ALGFRAMEWORK_PATH ?= $(TI_SW_ROOT)\algorithms_codecs\REL.ALGFRAMEWORK.02.08.00.00\algframework DMAUTILS_PATH ?= $(TI_SW_ROOT)\algorithms_codecs\REL.DMAUTILS.00.08.00.02\dmautils export EVE_SW_ROOT ?= $(CURDIR) export ARP32_TOOLS export DSP_TOOLS export xdais_PATH export UTILS_PATH export ALGFRAMEWORK_PATH export DMAUTILS_PATH all: @echo ======== STARTERWARE ================= gmake -C ./starterware -f Makefile TARGET_SOC=vayu CORE=eve gmake -C ./starterware -f Makefile TARGET_SOC=vayu CORE=dsp gmake -C ./starterware -f Makefile TARGET_SOC=vme CORE=eve gmake -C ./starterware -f Makefile TARGET_SOC=vme CORE=dsp @echo . @echo ======== KERNELS ================= gmake -C ./kernels -f makefile @echo ======== APPS ================= gmake -C ./apps -f makefile @echo ======== ALGORITHMS ================= gmake -C ./algorithms -f makefile @echo The start time is: $(START_TIME) ifdef SystemRoot @echo . |time|findstr [0-9] else @echo The end time is: `date +%H:%M:%S` endif .IGNORE: clean clean: @echo ======== STARTERWARE ================= gmake -C ./starterware -f Makefile clean TARGET_SOC=vayu CORE=eve gmake -C ./starterware -f Makefile clean TARGET_SOC=vayu CORE=dsp gmake -C ./starterware -f Makefile clean TARGET_SOC=vme CORE=eve gmake -C ./starterware -f Makefile clean TARGET_SOC=vme CORE=dsp rmdir /S /Q ./starterware/libs @echo ======== KERNELS ================= gmake -C ./kernels -f makefile clean @echo ======== APPS ================= gmake -C ./apps -f makefile clean @echo ======== ALGORITHMS ================= gmake -C ./algorithms -f makefile clean @echo The start time is: $(START_TIME) ifdef SystemRoot @echo . |time|findstr [0-9] else @echo The end time is: `date +%H:%M:%S` endif scrub: clean ifdef SystemRoot attrib +r +s ./kernels/inc/evekernels_include.h $(UTILS_PATH)/rm -rf ./kernels/inc/* attrib -r -s ./kernels/inc/evekernels_include.h $(UTILS_PATH)/rm -rf ./out else mv ./kernels/inc/evekernels_include.h ./out rm -rf ./kernels/inc/* mv ./out/evekernels_include.h ./kernels/inc rm -rf ./out endif format: $(FORMATTER) $(FORMATOPT) "./coresw/*.c" "./coresw/*.h" $(FORMATTER) $(FORMATOPT) "./algorithms/*.h" "./algorithms/*.c" ---------------------------------------------------------------------------------------------------------------------------------------------------- As seen in the previous error log, I get error in vlib\vcop_harrisScore_7x7\scr_kernelC\xgrad.c I tried to skip the compilation of this file by removing its name from C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\kernels\kernel_priv_list.txt , but then I get some other errors. and vcop.h is also there in vcop_harrisSScore_7x7/src_kernelC as shown in the image below: Could you please let me know how to proceed? Thanks and Regards, Ganesh + +Hi Anshu, Any updates ?? Regards, Ganesh + +Ganesh, Can you do the build with following command and share the logs : gmake TARGET_PLATFORM=PC SHOW_COMMANDS=1 Regards, Anshu + +Hi Anshu, I executed >> gmake TARGET_PLATFORM=PC SHOW_COMMANDS=1 Following is the log for the same. Microsoft Windows [Version 10.0.17134.471] (c) 2018 Microsoft Corporation. Alle Rechte vorbehalten. C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00>gmake TARGET_PLATFORM=PC SHOW_COMMANDS=1 START_TIME 11:07:45,29 ======== STARTERWARE ================= gmake -C ./starterware -f Makefile TARGET_SOC=vayu CORE=eve gmake[1]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' C:/VISION_SDK_02_12_00_00/ti_components\os_tools\windows\xdctools_3_32_00_06_core\bin\mkdir -p ".\libs\PC\debug" || cd ".\libs\PC\debug" echo Linking .\libs\PC\debug\libevestarterware_eve.lib Linking .\libs\PC\debug\libevestarterware_eve.lib echo rs ./libs/PC/debug/libevestarterware_eve.lib > ar_cmd.txt FOR %%i IN (C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/INTH.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mbox.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mmu.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/pcache.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/sctm.obj ) DO echo %%i >> ar_cmd.txt C:/MinGW/bin/ar @ar_cmd.txt del ar_cmd.txt gmake[1]: Leaving directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' gmake -C ./starterware -f Makefile TARGET_SOC=vayu CORE=dsp gmake[1]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' C:/VISION_SDK_02_12_00_00/ti_components\os_tools\windows\xdctools_3_32_00_06_core\bin\mkdir -p ".\libs\PC\debug" || cd ".\libs\PC\debug" echo Linking .\libs\PC\debug\libevestarterware_eve.lib Linking .\libs\PC\debug\libevestarterware_eve.lib echo rs ./libs/PC/debug/libevestarterware_eve.lib > ar_cmd.txt FOR %%i IN (C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/INTH.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mbox.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mmu.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/pcache.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/sctm.obj ) DO echo %%i >> ar_cmd.txt C:/MinGW/bin/ar @ar_cmd.txt del ar_cmd.txt gmake[1]: Leaving directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' gmake -C ./starterware -f Makefile TARGET_SOC=vme CORE=eve gmake[1]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' C:/VISION_SDK_02_12_00_00/ti_components\os_tools\windows\xdctools_3_32_00_06_core\bin\mkdir -p ".\libs\PC\debug" || cd ".\libs\PC\debug" echo Linking .\libs\PC\debug\libevestarterware_eve.lib Linking .\libs\PC\debug\libevestarterware_eve.lib echo rs ./libs/PC/debug/libevestarterware_eve.lib > ar_cmd.txt FOR %%i IN (C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/INTH.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mbox.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mmu.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/pcache.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/sctm.obj ) DO echo %%i >> ar_cmd.txt C:/MinGW/bin/ar @ar_cmd.txt del ar_cmd.txt gmake[1]: Leaving directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' gmake -C ./starterware -f Makefile TARGET_SOC=vme CORE=dsp gmake[1]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' C:/VISION_SDK_02_12_00_00/ti_components\os_tools\windows\xdctools_3_32_00_06_core\bin\mkdir -p ".\libs\PC\debug" || cd ".\libs\PC\debug" echo Linking .\libs\PC\debug\libevestarterware_eve.lib Linking .\libs\PC\debug\libevestarterware_eve.lib echo rs ./libs/PC/debug/libevestarterware_eve.lib > ar_cmd.txt FOR %%i IN (C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/INTH.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mbox.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/mmu.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/pcache.obj C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/out/PC/debug/starterware/drivers/src/host_pc/sctm.obj ) DO echo %%i >> ar_cmd.txt C:/MinGW/bin/ar @ar_cmd.txt del ar_cmd.txt gmake[1]: Leaving directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/starterware' . ======== KERNELS ================= gmake -C ./kernels -f makefile gmake[1]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/kernels' . ======== IP KERNELS KERNELC ================= gmake -f makefile_generatelib KERNEL_MODE=KERNELC FILE_LIST=kernel_priv_list.txt LIB_NAME=libeveprivkernels.eve.lib gmake[2]: Entering directory `C:/VISION_SDK_02_12_00_00/ti_components/algorithms_codecs/eve_sw_src_01_18_00_00/kernels' echo compiling .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c compiling .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c C:\MinGW\bin\g++ -c -O3 -DVCOP_HOST_EMULATION -DHOST_EMULATION -fpermissive -m32 -I ..\kernels\common -I C:\VISION_SDK_02_12_00_00\ti_components\cg_tools\windows\arp32_1.0.7\include\vcop -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\starterware\inc\baseaddress\vayu\eve -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\REL.DMAUTILS.00.08.00.02\dmautils\inc -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\REL.DMAUTILS.00.08.00.02\dmautils\inc\edma_csl -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\REL.DMAUTILS.00.08.00.02\dmautils\inc\edma_utils -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\starterware\inc -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\REL.ALGFRAMEWORK.02.08.00.00\algframework\inc -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\kernels\inc -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\kernels -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\common -I C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\xdais_7_24_00_04\packages -I C:\VISION_SDK_02_12_00_00\ti_components\cg_tools\windows\arp32_1.0.7\include\vcop -I ../starterware/inc -I ../starterware/inc/edma_utils -I ../starterware/inc/edma_csl -I ../algframework/inc -I vlib/blockSortU32/inc/ -I vlib/vcop_bhattacharyaDistance/inc/ -I vlib/vcop_block_statistics/inc/ -I vlib/vcop_calc_determinant_tensor_matrix/inc/ -I vlib/vcop_calc_inverse_structure_tensor_2x2/inc/ -I vlib/vcop_calc_new_lk_xy/inc/ -I vlib/vcop_canny_non_maximum_suppression/inc/ -I vlib/vcop_census_16bits/inc/ -I vlib/vcop_census_8bits/inc/ -I vlib/vcop_compute_rBrief/inc/ -I vlib/vcop_copy_new_lk_xy/inc/ -I vlib/vcop_disparity_hammingDistance_row/inc/ -I vlib/vcop_disparity_sad16_row/inc/ -I vlib/vcop_disparity_sad8_row/inc/ -I vlib/vcop_extract_bit_field_u32/inc/ -I vlib/vcop_fast9/inc/ -I vlib/vcop_fast9_score/inc/ -I vlib/vcop_foreach_multiblock_bilinear_interp_7x7_u8/inc/ -I vlib/vcop_generateList/inc/ -I vlib/vcop_glcm/inc/ -I vlib/vcop_gradient5x5PyramidKernel_8/inc/ -I vlib/vcop_grayscale_morphology_flat/inc/ -I vlib/vcop_hammingDistance/inc/ -I vlib/vcop_harrisScore_32_7x7/inc/ -I vlib/vcop_harrisScore_7x7/inc/ -I vlib/vcop_horizontal_non_max_suppression/inc/ -I vlib/vcop_hough_for_circles/inc/ -I vlib/vcop_hough_for_lines/inc/ -I vlib/vcop_location_matrix/inc/ -I vlib/vcop_median_filter_mxn_u8/inc/ -I vlib/vcop_multiblock_bilinear_interp_7x7_u8/inc/ -I vlib/vcop_multiblock_bilinear_interp_intlv_7x7_s16/inc/ -I vlib/vcop_multiblock_gradient_xy/inc/ -I vlib/vcop_multipoint_harrisScore_u16/inc/ -I vlib/vcop_ncc/inc/ -I vlib/vcop_nonMaxSuppress_mxn_S16/inc/ -I vlib/vcop_nonMaxSuppress_mxn_S32/inc/ -I vlib/vcop_normalFlow/inc/ -I vlib/vcop_nxn_block_sum/inc/ -I vlib/vcop_orientation_binning/inc/ -I vlib/vcop_prune_big_list/inc/ -I vlib/vcop_remap/inc/ -I vlib/vcop_sad_error_measure_lk/inc/ -I vlib/vcop_sum_grad_cross_inter_frame_diff_7x7/inc/ -I vlib/vcop_tensor_matrix_7x7_s16_grad/inc/ -I vlib/vcop_vec_array_l1_distance/inc/ -I vlib/vcop_vec_bin_image_dilate_cross/inc/ -I vlib/vcop_vec_bin_image_dilate_mask/inc/ -I vlib/vcop_vec_bin_image_dilate_square/inc/ -I vlib/vcop_vec_bin_image_erode_cross/inc/ -I vlib/vcop_vec_bin_image_erode_mask/inc/ -I vlib/vcop_vec_bin_image_erode_single_pixel/inc/ -I vlib/vcop_vec_bin_image_erode_square/inc/ -I vlib/vcop_vec_bin_image_morph_diff/inc/ -I vlib/vcop_vec_gradients_xy_and_magnitude/inc/ -I vlib/vcop_vec_update_ewr_mean_s16/inc/ -I vlib/vcop_vec_update_ewr_variance_s16/inc/ -I vlib/vcop_vertical_non_max_suppression/inc/ -I vlib/vcop_weight_address_bilinear_interpolation/inc/ -I vlib/vcop_weight_computation/inc/ -I imgsiglib/Average2x2/inc/ -I imgsiglib/Bayer_CFA_Horz_Upsample/inc/ -I imgsiglib/Bayer_CFA_Interpolation_Avg/inc/ -I imgsiglib/BlockAverage2x2/inc/ -I imgsiglib/Color_Space_Conversion/inc/ -I imgsiglib/Filter/inc/ -I imgsiglib/Horz_Upsample/inc/ -I imgsiglib/Integral_image/inc/ -I imgsiglib/Matrix_Mul/inc/ -I imgsiglib/Median_filter_col/inc/ -I imgsiglib/Median_filter_row/inc/ -I imgsiglib/Polyphase_Filter_Vertical_Resampling/inc/ -I imgsiglib/RGB16bitPack/inc/ -I imgsiglib/RGB16bitUnpack/inc/ -I imgsiglib/Rotate/inc/ -I imgsiglib/SAD/inc/ -I imgsiglib/TransparentBlt/inc/ -I imgsiglib/UYVY_to_YUVpl/inc/ -I imgsiglib/YCbCr422Deinterleave/inc/ -I imgsiglib/YCbCr444Deinterleave/inc/ -I imgsiglib/YCbCr444toYCbCr422/inc/ -I imgsiglib/dct8x8col_chen/inc/ -I imgsiglib/dct8x8col_odd_even/inc/ -I imgsiglib/dct8x8row_chen/inc/ -I imgsiglib/dct8x8row_odd_even/inc/ -I imgsiglib/vcop_alpha_blend_yuv420nv12/inc/ -I imgsiglib/vcop_alpha_blend_yuv422i/inc/ -I imgsiglib/vcop_bin_image_to_list/inc/ -I imgsiglib/vcop_binary_masking/inc/ -I imgsiglib/vcop_clahe_generate_lut/inc/ -I imgsiglib/vcop_clahe_process/inc/ -I imgsiglib/vcop_contrast_stretching/inc/ -I imgsiglib/vcop_fft_1024_32x16t_ver3/inc/ -I imgsiglib/vcop_fft_64_16x16t_ver1/inc/ -I imgsiglib/vcop_fft_N_16x16t_ver1/inc/ -I imgsiglib/vcop_gauss5x5PyramidKernel_16/inc/ -I imgsiglib/vcop_gauss5x5PyramidKernel_8/inc/ -I imgsiglib/vcop_image_bayer2rgb/inc/ -I imgsiglib/vcop_image_bilateral_filter/inc/ -I imgsiglib/vcop_image_deinterleave/inc/ -I imgsiglib/vcop_image_gammaCorrection/inc/ -I imgsiglib/vcop_image_interleave/inc/ -I imgsiglib/vcop_image_pyramid_uv_u8/inc/ -I imgsiglib/vcop_image_raw2rgb/inc/ -I imgsiglib/vcop_image_rgb2srgb/inc/ -I imgsiglib/vcop_image_rgb2yuv/inc/ -I imgsiglib/vcop_image_subSampling/inc/ -I imgsiglib/vcop_image_whiteBalance/inc/ -I imgsiglib/vcop_intensity_scaling/inc/ -I imgsiglib/vcop_median3x3/inc/ -I imgsiglib/vcop_rgb24_rgb/inc/ -I imgsiglib/vcop_select_list_elements/inc/ -I imgsiglib/vcop_sobel_xy/inc/ -I imgsiglib/vcop_soft_isp/inc/ -I imgsiglib/vcop_yuv420_fir2d_separable/inc/ -I imgsiglib/vcop_yuv_420nv12_to_422uyvy/inc/ -I imgsiglib/vcop_yuv_422uyvy_to_420nv12/inc/ -I imgsiglib/vcop_yuv_padding/inc/ -I imgsiglib/vcop_yuv_scalar/inc/ -I radarlib/vcop_beam_forming/inc/ -I radarlib/vcop_dcoffset_windowing/inc/ -I radarlib/vcop_fft_npt_16ix16o/inc/ -I radarlib/vcop_peak_detection/inc/ -I ./common -I ./inc -DINPUTTILE .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c -oC:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\eve_sw_src_01_18_00_00\out\PC\debug\kernels\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.obj .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65377' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] }; ^ .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65338' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65393' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65456' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65450' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65354' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65431' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65423' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65385' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65516' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65339' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65392' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65326' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65328' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65482' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65415' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65499' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65400' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65336' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65363' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65426' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65338' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65443' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65317' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65357' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65441' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65420' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65482' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65355' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65425' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65455' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65349' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65308' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65340' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65400' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65395' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65410' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65388' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65516' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65402' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65343' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65370' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65455' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65315' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65349' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65391' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65443' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65315' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65413' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65322' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65512' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65318' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65342' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65419' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65354' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65349' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65299' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65481' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65364' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65303' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65335' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65321' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65325' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65352' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65402' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65422' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65364' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65479' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65394' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65479' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65378' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65336' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65354' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65349' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65325' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65354' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65386' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65428' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65326' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65297' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65360' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65384' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65326' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65512' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65437' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65311' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65428' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65339' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65391' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65431' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65479' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65499' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65481' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65436' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65346' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65348' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65305' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65516' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65305' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65384' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65394' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65426' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65343' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65450' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65373' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65313' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65320' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65382' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65311' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65314' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65314' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65382' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65344' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65377' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65329' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65306' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65365' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65339' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65352' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65374' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65330' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65386' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65365' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65443' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65346' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65314' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65408' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65418' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65436' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65526' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65357' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65437' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65328' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65352' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65319' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65336' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65353' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65413' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65381' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65369' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65283' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65479' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65499' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65418' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65441' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65373' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65339' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65381' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65337' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65426' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65326' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65419' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65391' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65395' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65408' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65402' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65351' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65322' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65338' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65338' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65330' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65413' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65355' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65374' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65463' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65441' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65419' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65377' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65456' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65295' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65389' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65344' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65382' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65285' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65499' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65526' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65323' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65369' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65328' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65360' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65309' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65335' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65512' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65425' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65437' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65423' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65349' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65371' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65379' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65482' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65343' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65456' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65424' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65352' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65422' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65378' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65436' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65425' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65313' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65321' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65377' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65428' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65526' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65420' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65355' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65385' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65404' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65316' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65404' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65424' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65391' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65481' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65415' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65311' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65446' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65352' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65521' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65389' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65350' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65516' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65443' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65455' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65425' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65394' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65455' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65392' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65436' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65482' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65311' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65402' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65363' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65299' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65431' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65336' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65428' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65402' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65481' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65326' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65315' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65346' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65460' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65512' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65308' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65431' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65361' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65333' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65335' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65374' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65348' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65418' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65314' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65392' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65357' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65393' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65305' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65450' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65373' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65351' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65302' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65374' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65397' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65394' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65516' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65346' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65363' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65361' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65375' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65362' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65421' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65393' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65381' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65329' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65416' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65356' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65386' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65418' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65400' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65443' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65359' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65415' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65420' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65488' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65312' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65450' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65496' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65436' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65292' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65317' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65401' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65390' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65367' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65399' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65387' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65309' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65330' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65330' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65422' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65334' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65393' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65381' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65390' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65401' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65365' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65375' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65472' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65483' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65385' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65422' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65384' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65423' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65356' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65383' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65487' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65371' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65395' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65491' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65438' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65466' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65362' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65325' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65377' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65385' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65455' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65441' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65520' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65351' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65312' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65388' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65403' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65463' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65505' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65368' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65471' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65373' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65447' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65319' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65465' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65400' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65484' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65364' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65406' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65389' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65461' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65388' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65449' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65382' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65518' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65492' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65336' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65396' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65332' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65524' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65482' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65468' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65506' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65395' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65375' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65464' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65372' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65378' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65414' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65305' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65475' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65430' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65378' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65334' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65440' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65454' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65469' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65437' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65527' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65448' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65391' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65489' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65371' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65514' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65534' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65347' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65507' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65511' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65338' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65478' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65418' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65532' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65376' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65452' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65444' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65432' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65457' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65423' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65525' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65401' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65405' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65439' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65485' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65411' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65529' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65473' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65459' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65413' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65431' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65407' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65476' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65490' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65531' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65486' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65456' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65533' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65409' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65502' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65497' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65508' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65474' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65504' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65462' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65477' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65513' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65458' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65523' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65530' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65404' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65500' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65429' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65415' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65493' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65398' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65417' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65420' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65519' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65509' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65470' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65342' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65401' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65358' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65517' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65515' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65501' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65451' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65380' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65445' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65503' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65356' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65387' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65346' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65435' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65434' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65494' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65424' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65385' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65498' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65320' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65427' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65467' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65442' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65480' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65412' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65453' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65479' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65522' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65333' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65495' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65433' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65535' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65415' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65441' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65528' from 'int' to 'int16_t {aka short int}' inside { } [-Wnarrowing] .\.\vlib\vcop_harrisScore_7x7\src_kernelC\xgrad.c:5136:1: error: narrowing conversion of '65510' from 'int' to 'int16_t {aka short int}' in \ No newline at end of file diff --git a/data2/text/range/30001+/774658.txt b/data2/text/range/30001+/774658.txt new file mode 100644 index 0000000000000000000000000000000000000000..25e637eec0619bbc42031a2daf165928f04375dd --- /dev/null +++ b/data2/text/range/30001+/774658.txt @@ -0,0 +1,2653 @@ +Ticket Name: Linux/TDA2: Linux/TDA2: TDA2 linux Software reboot failure + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742 Tool/software: Linux Hi, We are developing a custom board based on TDA2 ( using SD card boot), and build the Linux image on VSDKv3.5 source File: ../../vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk VSDK_BOARD_TYPE=TDA2XX_EVM IPU_PRIMARY_CORE=ipu2 Both the u-boot & kernel, user-case application works fine. System also stop all services and detach device normally when execute "reboot" command via console. But system doesn't reboot, it need manually power reset then system reboot. The log as the attached. Could you help teach us how to solve the SW reboot issue ? Thanks. BR, Sam Hsieh reboot_log.txt +U-Boot SPL 2016.05 (Feb 21 2019 - 10:03:14) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - MMC init failed, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Feb 21 2019 - 10:03:14 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +173 bytes read in 6 ms (27.3 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3560608 bytes read in 337 ms (10.1 MiB/s) +106933 bytes read in 27 ms (3.8 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x3654a0 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff1b4 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00032-g0f6b93d-dirty (sam@ubuntu-ML-Server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Thu Feb 21 10:05:16 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=ea41f9b5-02 rw rootwait ip=none mem=1024M cma=64M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 353188K/1012736K available (6635K kernel code, 320K rwdata, 2392K rodata, 336K init, 290K bss, 413788K reserved, 245760K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d902c (9029 kB) +[ 0.000000] .init : 0xc08da000 - 0xc092e000 ( 336 kB) +[ 0.000000] .data : 0xc092e000 - 0xc097e120 ( 321 kB) +[ 0.000000] .bss : 0xc0980000 - 0xc09c8800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000334] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000342] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000779] Console: colour dummy device 80x30 +[ 0.000795] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000801] This ensures that you still see kernel messages. Please +[ 0.000806] update your kernel commandline. +[ 0.000820] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000832] pid_max: default: 32768 minimum: 301 +[ 0.000930] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000939] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001479] Initializing cgroup subsys io +[ 0.001496] Initializing cgroup subsys memory +[ 0.001520] Initializing cgroup subsys devices +[ 0.001533] Initializing cgroup subsys freezer +[ 0.001544] Initializing cgroup subsys perf_event +[ 0.001555] Initializing cgroup subsys pids +[ 0.001583] CPU: Testing write buffer coherency: ok +[ 0.001783] /cpus/cpu@0 missing clock-frequency property +[ 0.001800] /cpus/cpu@1 missing clock-frequency property +[ 0.001809] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001849] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080059] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080127] Brought up 2 CPUs +[ 0.080140] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080146] CPU: All CPU(s) started in HYP mode. +[ 0.080152] CPU: Virtualization extensions available. +[ 0.080527] devtmpfs: initialized +[ 0.109160] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110133] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313846] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313871] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.319054] pinctrl core: initialized pinctrl subsystem +[ 0.319924] NET: Registered protocol family 16 +[ 0.320910] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350242] cpuidle: using governor ladder +[ 0.380269] cpuidle: using governor menu +[ 0.388882] OMAP GPIO hardware version 0.1 +[ 0.395362] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.411852] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.411866] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.419906] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.419917] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420401] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420411] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.420990] OMAP DMA hardware revision 0.0 +[ 0.461724] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462878] edma 43300000.edma: memcpy is disabled +[ 0.467627] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471966] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.472144] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472305] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472462] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472752] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472938] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.475940] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491389] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563720] pcf857x 0-0020: probed +[ 0.564311] pcf857x 0-0021: probed +[ 0.564463] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564862] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.565061] media: Linux media interface: v0.10 +[ 0.565112] Linux video capture interface: v2.00 +[ 0.565151] pps_core: LinuxPPS API ver. 1 registered +[ 0.565158] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.565185] PTP clock support registered +[ 0.565233] EDAC MC: Ver: 3.0.0 +[ 0.565992] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.566285] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566624] Advanced Linux Sound Architecture Driver Initialized. +[ 0.567505] clocksource: Switched to clocksource arch_sys_counter +[ 0.578192] NET: Registered protocol family 2 +[ 0.578686] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578749] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578874] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578921] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578952] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.579158] NET: Registered protocol family 1 +[ 0.579403] RPC: Registered named UNIX socket transport module. +[ 0.579411] RPC: Registered udp transport module. +[ 0.579418] RPC: Registered tcp transport module. +[ 0.579424] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.580427] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.590517] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.591178] NFS: Registering the id_resolver key type +[ 0.591209] Key type id_resolver registered +[ 0.591217] Key type id_legacy registered +[ 0.591285] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.592600] bounce: pool size: 64 pages +[ 0.592758] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.592775] io scheduler noop registered +[ 0.592790] io scheduler deadline registered +[ 0.592826] io scheduler cfq registered (default) +[ 0.597738] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.600911] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.600923] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.600955] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.600976] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.630892] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.631060] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.631072] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.631082] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.631093] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.631503] PCI: bus0: Fast back to back transfers disabled +[ 0.631629] PCI: bus1: Fast back to back transfers enabled +[ 0.631715] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.631730] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.631742] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.631965] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.692469] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.695860] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.706432] console [ttyS0] enabled +[ 1.710829] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.720522] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.730553] [drm] Initialized drm 1.1.0 20060810 +[ 1.736062] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.742749] [drm] No driver support for vblank timestamp query. +[ 1.748913] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.761866] loop: module loaded +[ 1.765411] vmemexp device MAJOR num = 245 +[ 1.769560] vmemexp class registered +[ 1.773276] /dev/vmemexp device registered +[ 1.777392] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.783118] nand: No NAND device found +[ 1.786889] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.796743] m25p80 spi32766.0: found w25q256, expected s25fl256s1 +[ 1.802905] m25p80 spi32766.0: w25q256 (32768 Kbytes) +[ 1.808053] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.813912] Creating 7 MTD partitions on "spi32766.0": +[ 1.819088] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.825197] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.831537] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.838491] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.845160] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.852568] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.858919] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.866692] libphy: Fixed MDIO Bus: probed +[ 1.873436] mousedev: PS/2 mouse device common for all mice +[ 1.879676] i2c /dev entries driver +[ 1.888450] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.894078] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.900480] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.907015] evm_3v3_sw: supplied by sysen1 +[ 1.990307] mmc0: MAN_BKOPS_EN bit is not set +[ 2.001602] mmc0: new HS200 MMC card at address 0001 +[ 2.007032] mmcblk0: mmc0:0001 R1J55A 7.28 GiB +[ 2.011839] mmcblk0boot0: mmc0:0001 R1J55A partition 1 8.00 MiB +[ 2.018038] mmcblk0boot1: mmc0:0001 R1J55A partition 2 8.00 MiB +[ 2.070302] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.080909] aic_dvdd: supplied by evm_3v3_sw +[ 2.087100] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.094623] NET: Registered protocol family 10 +[ 2.110810] sit: IPv6 over IPv4 tunneling driver +[ 2.116009] NET: Registered protocol family 17 +[ 2.120762] Key type dns_resolver registered +[ 2.125174] omap_voltage_late_init: Voltage driver support not added +[ 2.132074] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.138308] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.145020] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.151257] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.159436] Power Management for TI OMAP4+ devices. +[ 2.164510] Registering SWP/SWPB emulation handler +[ 2.170276] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.177566] dmm 4e000000.dmm: initialized all PAT entries +[ 2.183675] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.190596] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.228831] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.248475] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.255383] hctosys: unable to open rtc device (rtc0) +[ 2.268837] evm_1v8: disabling +[ 2.271920] aic_dvdd: disabling +[ 2.275071] vmmcwl_fixed: disabling +[ 2.278753] ldousb: disabling +[ 2.282149] ALSA device list: +[ 2.285127] #0: DRA7xx-EVM +[ 2.288678] Waiting for root device PARTUUID=ea41f9b5-02... +[ 2.396345] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.404443] mmc2: new SDHC card at address e624 +[ 2.409352] mmcblk1: mmc2:e624 SU08G 7.40 GiB +[ 2.421588] mmcblk1: p1 p2 +[ 2.508559] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.517292] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.973289] EXT4-fs (mmcblk1p2): recovery complete +[ 2.980330] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.988509] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.996907] devtmpfs: mounted +[ 3.000129] Freeing unused kernel memory: 336K +[ 3.004591] This architecture does not have kernel memory protection. +[ 3.357337] systemd[1]: System time before build time, advancing clock. +[ 3.414568] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.429296] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.440989] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.459495] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.489056] systemd[1]: Set hostname to . +[ 3.567160] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.578051] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.605353] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.646523] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.664871] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.811436] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.820959] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.830887] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 4.400257] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 4.408091] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 4.415786] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 4.423111] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 4.430578] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.440033] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.482618] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.507743] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.527851] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.587749] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.611720] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.625843] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.651065] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.677718] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.697785] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.717773] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.787896] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.817845] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.839805] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.858387] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.878516] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.927894] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.957930] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.987919] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 5.057863] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 5.077402] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 5.088112] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 5.108164] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 5.127689] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 5.147771] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 5.177744] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 5.227915] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.265398] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.287831] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.317776] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.337948] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Create Static Device Nodes in /dev. +[ 6.012966] systemd-journald[158]: Received request to flush runtime journal from PID 1 +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started udev Kernel Device Manager. +[ 6.525611] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.539077] remoteproc0: 55020000.ipu is available + Starting Load/Save Random Seed... +[ 6.563287] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ OK ] Reached target Local File Systems. +[ 6.583586] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.610967] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 + Starting Create Volatile Files and Directories... +[ 6.648206] remoteproc1: 40800000.dsp is available +[ OK ] Started Load/Save Random Seed.[ 6.670439] remoteproc1: Note: remoteproc is still under development and considered experimental. + +[ 6.683404] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. +[ 6.699373] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 6.711719] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.722530] remoteproc2: 41000000.dsp is available +[ 6.727431] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.739313] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Started Create Volatile Files and Directories. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ 7.079528] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.769614] SCSI subsystem initialized +[ 8.324081] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ 8.333326] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 8.720662] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 8.727412] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 8.744921] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 8.771467] scsi host0: ahci +[ 8.774581] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ 9.127525] ata1: SATA link down (SStatus 0 SControl 300) +[ 9.416501] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 9.423193] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 9.430985] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 9.603932] remoteproc0: registered virtio0 (type 7) +[ 9.639682] CAN device driver interface +[ OK ] Reached target Sound Card. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 9.830737] remoteproc2: registered virtio1 (type 7) +[ 9.966478] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=354) +[ OK ] Started Network Time Synchronization. +[ 10.004974] remoteproc1: registered virtio2 (type 7) +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks... +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Reached target System Initialization. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. + Starting Login Service... + Starting Permit User Sessions... +[ OK ] Started System Logging Service. +[ OK ] Started D-Bus System Message Bus. +[ 10.795721] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Started Kernel Logging Service. + Starting Save/Restore Sound Card State... + Starting rc.pvr.service... + Starting Network Service... +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State. +[ OK ] Started Network Service. +[ 11.040002] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. +[ 11.242847] remoteproc0: powering up 55020000.ipu +[ 11.257383] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9553028 +[ 11.266970] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 11.298897] remoteproc0: remote processor 55020000.ipu is now up +[ 11.306350] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 11.314818] remoteproc2: powering up 41000000.dsp +[ 11.327747] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6967530 +[ 11.342115] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 11.348008] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 11.353977] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 11.403274] remoteproc2: remote processor 41000000.dsp is now up +[ 11.419519] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 11.425692] remoteproc1: powering up 40800000.dsp +[ 11.454052] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6967530 +[ 11.474917] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 11.480800] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 11.486717] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 11.568780] remoteproc1: remote processor 40800000.dsp is now up +[ 11.588565] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 11.660430] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 11.679811] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 11.689018] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 11.717869] NET: Registered protocol family 41 +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. + Starting weston.service... +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started weston.service. +[ OK ] Started Login Service. +[ OK ] Started Network Name Resolution. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. +[ 12.247106] usbcore: registered new interface driver usbfs +[ 12.252942] usbcore: registered new interface driver hub +[ 12.258707] usbcore: registered new device driver usb +[ 12.407990] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 12.414990] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 12.422143] dwc3 48890000.usb: otg: can't start till gadget registers +[ 12.428878] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 12.434460] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 12.442565] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 12.451495] xhci-hcd xhci-hcd.1.auto: irq 495, io mem 0x488d0000 +[ 12.459526] hub 1-0:1.0: USB hub found +[ 12.463324] hub 1-0:1.0: 1 port detected +[ 12.467656] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 12.473177] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 12.480965] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 12.490537] hub 2-0:1.0: USB hub found +[ 12.494330] hub 2-0:1.0: 1 port detected + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root (automatic login) + +root@dra7xx-evm:~# cat /proc/cmdline +console=ttyO0,115200n8 vram=16M root=PARTUUID=ea41f9b5-02 rw rootwait ip=none mem=1024M cma=64M +root@dra7xx-evm:~# reb[ 38.285417] random: nonblocking pool is initialized +root@dra7xx-evm:~# +root@dra7xx-evm:~# reboot + Unmounting /run/user/0... +[ OK ] Stopped target Swap. + Stopping Stopping Session c1 of user root. +[ OK ] Stopped target Sound Card. + Stopping User Manager for UID 0... +[ OK ] Stopped target Timers. +[ OK ] Stopped Daily Cleanup of Temporary Directories. +[ OK ] Stopped Create Static Device Nodes in /dev. + Stopping Save/Restore Sound Card State... +[ OK ] Stopped target System Time Synchronized. + Stopping Network Time Synchronization... +[ OK ] Stopped Update UTMP about System Runlevel Changes. +[ OK ] Stopped target Multi-User System. + Stopping System Logging Service... + Stopping Kernel Logging Service... + Stopping telnetd.service... + Stopping Network Name Resolution... + Unmounting /run/media/mmcblk1p1... +[ OK ] Stopped target Login Prompts. +[ OK ] Stopped Serial Getty on ttyO0. + Stopping Getty on tty1... + Stopping Serial Getty on ttyS0... + Stopping tiipclad-daemon.service... +[ OK ] Closed Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Stopped Network Time Synchronization. +[ OK ] Stopped System Logging Service. +[ OK ] Stopped Kernel Logging Service. +[ OK ] Stopped Network Name Resolution. +[ OK ] Stopped Getty on tty1. +[ OK ] Stopped Serial Getty on ttyS0. +[ OK ] Stopped User Manager for UID 0. +[FAILED] Failed unmounting /run/user/0. +[ OK ] Stopped Load/Save Random Seed. +[ OK ] Stopped Session c1 of user root. +[ OK ] Stopped Save/Restore Sound Card State. +[ OK ] Stopped telnetd.service. +[ OK ] Unmounted /run/media/mmcblk1p1. +[ OK ] Stopped tiipclad-daemon.service. +[ OK ] Stopped User Manager for UID 0. + Stopping weston.service... +[ OK ] Reached target Unmount All Filesystems. +[ OK ] Removed slice User Slice of root. + Stopping Login Service... +[ OK ] Removed slice system-serial\x2dgetty.slice. + Stopping Permit User Sessions... +[ OK ] Removed slice system-getty.slice. +[ OK ] Stopped target Network. + Stopping Network Service... +[ OK ] Stopped Create Volatile Files and Directories. +[ OK ] Stopped Remount Root and Kernel File Systems. +[ OK ] Stopped Login Service. +[ OK ] Stopped Network Service. +[ OK ] Stopped weston.service. +[ OK ] Stopped Permit User Sessions. + Stopping rc.pvr.service... +[ OK ] Stopped target Remote File Systems. + Stopping D-Bus System Message Bus... +[ OK ] Stopped D-Bus System Message Bus. +[ OK ] Stopped rc.pvr.service. +[ OK ] Stopped target Basic System. +[ OK ] Stopped target Paths. +[ OK ] Stopped Forward Password Requests to Wall Directory Watch. +[ OK ] Stopped Dispatch Password Requests to Console Directory Watch. +[ OK ] Stopped target Slices. +[ OK ] Removed slice User and Session Slice. +[ OK ] Stopped target Sockets. +[ OK ] Closed Syslog Socket. +[ OK ] Closed D-Bus System Message Bus Socket. +[ OK ] Reached target Shutdown. +[ OK ] Reached target Final Step. + Starting Reboot... +[ 54.347208] systemd-shutdown[1]: Sending SIGTERM to remaining processes... +[ 54.370903] systemd-journald[158]: Received SIGTERM from PID 1 (systemd-shutdow). +[ 54.390825] ------------[ cut here ]------------ +[ 54.395475] WARNING: CPU: 0 PID: 703 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 54.403810] 2025 pages are still in use! +[ 54.407992] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 virtio_rpmsg_bus udc_core c_can_platform c_can can_dev omap_sham omap_aes_driver ahci_platform libahci_platform dwc3_omap extcon_usb_gpio libahci rtc_omap pvrsrvkm(O) libata scsi_mod omap_des extcon omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 54.442077] CPU: 0 PID: 703 Comm: weston Tainted: G O 4.4.84-00032-g0f6b93d-dirty #1 +[ 54.450985] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 54.457100] Backtrace: +[ 54.459575] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 54.467173] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 54.472890] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 54.480143] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 54.488264] r7:c00d939c r6:00001aab r5:00000009 r4:ed479bb8 +[ 54.493977] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 54.502709] r8:c09ad880 r7:c09335d0 r6:000bc5e9 r5:000007e9 r4:c0822e84 +[ 54.509476] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 54.517946] r3:000007e9 r2:c0822e84 +[ 54.521546] r4:000bc5e9 +[ 54.524102] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 54.532049] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff05800 r5:c09af470 r4:000bbe00 +[ 54.539869] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 54.548687] r5:0086b800 r4:007e9000 +[ 54.552295] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 54.561553] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 54.569324] r10:00000001 r9:c001c9d8 r8:bbe00000 r7:eff05800 r6:007e9000 r5:ef26a010 +[ 54.577219] r4:ed42a180 +[ 54.579770] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 54.587984] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 54.596628] r9:c038e78c r8:ed43d180 r7:00000001 r6:ee822c00 r5:ed42a180 r4:ee822c00 +[ 54.604443] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 54.615355] r5:ee822c34 r4:ed42a180 +[ 54.618958] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 54.630655] r5:ed43d180 r4:ed42a180 +[ 54.634260] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 54.643341] r7:00000001 r6:000000ff r5:ed479d28 r4:00000000 +[ 54.649053] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 54.656912] r10:ed43d1fc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ed43d200 r5:ee822c00 +[ 54.664809] r4:ed43d1a0 +[ 54.667358] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 54.675304] r5:ee822c00 r4:ed43d180 +[ 54.678906] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 54.685980] r10:ed43d6c8 r9:00000008 r8:eec435d8 r7:eeb65b10 r6:00000000 r5:ee9bcf78 +[ 54.693878] r4:ed43d6c0 +[ 54.696426] [] (__fput) from [] (____fput+0x10/0x14) +[ 54.703152] r10:ed410f84 r9:ee64f200 r8:ec97d6fc r7:eccaec00 r6:ed42acc0 r5:c098181c +[ 54.711048] r4:eccaf060 +[ 54.713598] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 54.720937] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 54.728360] r7:ed479e40 r6:00000001 r5:eccaf078 r4:eccaec00 +[ 54.734072] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 54.741321] r7:ed479edc +[ 54.743872] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 54.751556] r7:ed479edc r6:418004fc r5:ed478000 r4:08430000 +[ 54.757269] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 54.764518] r10:00000000 r9:ed478000 r8:00000001 r7:b6ce0916 r6:ed479ec8 r5:b6ce0914 +[ 54.772415] r4:ed479fb0 +[ 54.774966] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 54.782562] r10:00000000 r9:ed478000 r8:c000fc84 r7:000000fc r6:ed479fb0 r5:c000fc84 +[ 54.790459] r4:ed478000 +[ 54.793009] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 54.801216] r7:000000fc r6:00043608 r5:ffffffff r4:beb267d0 +[ 54.807349] ---[ end trace c9fd645ba65d31ba ]--- +[ 54.812468] ------------[ cut here ]------------ +[ 54.817106] WARNING: CPU: 0 PID: 703 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 54.825413] 2025 pages are still in use! +[ 54.829418] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 virtio_rpmsg_bus udc_core c_can_platform c_can can_dev omap_sham omap_aes_driver ahci_platform libahci_platform dwc3_omap extcon_usb_gpio libahci rtc_omap pvrsrvkm(O) libata scsi_mod omap_des extcon omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 54.863413] CPU: 0 PID: 703 Comm: weston Tainted: G W O 4.4.84-00032-g0f6b93d-dirty #1 +[ 54.872318] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 54.878430] Backtrace: +[ 54.880892] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 54.888488] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 54.894194] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 54.901445] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 54.909563] r7:c00d939c r6:00001aab r5:00000009 r4:ed479bb8 +[ 54.915269] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 54.923998] r8:c09ad880 r7:c09335d0 r6:000bcde9 r5:000007e9 r4:c0822e84 +[ 54.930755] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 54.939223] r3:000007e9 r2:c0822e84 +[ 54.942818] r4:000bcde9 +[ 54.945365] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 54.953309] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff17800 r5:c09af470 r4:000bc600 +[ 54.961117] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 54.969934] r5:0087d800 r4:007e9000 +[ 54.973534] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 54.982789] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 54.990558] r10:00000002 r9:c001c9d8 r8:bc600000 r7:eff17800 r6:007e9000 r5:ef26a010 +[ 54.998445] r4:ed42aa80 +[ 55.000992] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 55.009202] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 55.017845] r9:c038e78c r8:ed43d180 r7:00000001 r6:ee822c00 r5:ed42aa80 r4:ee822c00 +[ 55.025649] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 55.036559] r5:ee822c34 r4:ed42aa80 +[ 55.040158] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 55.051852] r5:ed43d180 r4:ed42aa80 +[ 55.055451] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 55.064529] r7:00000001 r6:000000ff r5:ed479d28 r4:00000000 +[ 55.070236] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 55.078093] r10:ed43d1fc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ed43d200 r5:ee822c00 +[ 55.085982] r4:ed43d1a0 +[ 55.088528] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 55.096471] r5:ee822c00 r4:ed43d180 +[ 55.100070] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 55.107142] r10:ed43d6c8 r9:00000008 r8:eec435d8 r7:eeb65b10 r6:00000000 r5:ee9bcf78 +[ 55.115033] r4:ed43d6c0 +[ 55.117578] [] (__fput) from [] (____fput+0x10/0x14) +[ 55.124301] r10:ed410f84 r9:ee64f200 r8:ec97d6fc r7:eccaec00 r6:ed42acc0 r5:c098181c +[ 55.132188] r4:eccaf060 +[ 55.134734] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 55.142070] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 55.149491] r7:ed479e40 r6:00000001 r5:eccaf078 r4:eccaec00 +[ 55.155197] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 55.162444] r7:ed479edc +[ 55.164988] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 55.172672] r7:ed479edc r6:418004fc r5:ed478000 r4:08430000 +[ 55.178378] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 55.185624] r10:00000000 r9:ed478000 r8:00000001 r7:b6ce0916 r6:ed479ec8 r5:b6ce0914 +[ 55.193513] r4:ed479fb0 +[ 55.196059] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 55.203655] r10:00000000 r9:ed478000 r8:c000fc84 r7:000000fc r6:ed479fb0 r5:c000fc84 +[ 55.211543] r4:ed478000 +[ 55.214090] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 55.222296] r7:000000fc r6:00043608 r5:ffffffff r4:beb267d0 +[ 55.228787] ---[ end trace c9fd645ba65d31bb ]--- +[ 55.233702] ------------[ cut here ]------------ +[ 55.238351] WARNING: CPU: 0 PID: 703 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 55.246645] 2025 pages are still in use! +[ 55.250588] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto dwc3 virtio_rpmsg_bus udc_core c_can_platform c_can can_dev omap_sham omap_aes_driver ahci_platform libahci_platform dwc3_omap extcon_usb_gpio libahci rtc_omap pvrsrvkm(O) libata scsi_mod omap_des extcon omap_rng rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 55.284592] CPU: 0 PID: 703 Comm: weston Tainted: G W O 4.4.84-00032-g0f6b93d-dirty #1 +[ 55.293497] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 55.299610] Backtrace: +[ 55.302072] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 55.309667] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 55.315375] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 55.322625] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 55.330744] r7:c00d939c r6:00001aab r5:00000009 r4:ed479bb8 +[ 55.336450] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 55.345180] r8:c09ad880 r7:c09335d0 r6:000bd5e9 r5:000007e9 r4:c0822e84 +[ 55.351938] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 55.360406] r3:000007e9 r2:c0822e84 +[ 55.364002] r4:000bd5e9 +[ 55.366550] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 55.374494] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff29800 r5:c09af470 r4:000bce00 +[ 55.382304] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 55.391120] r5:0088f800 r4:007e9000 +[ 55.394722] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 55.403978] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 55.411749] r10:00000003 r9:c001c9d8 r8:bce00000 r7:eff29800 r6:007e9000 r5:ef26a010 +[ 55.419640] r4:ed42ad80 +[ 55.422187] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 55.430397] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 55.439039] r9:c038e78c r8:ed43d180 r7:00000001 r6:ee822c00 r5:ed42ad80 r4:ee822c00 +[ 55.446846] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 55.457757] r5:ee822c34 r4:ed42ad80 +[ 55.461357] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 55.473051] r5:ed43d180 r4:ed42ad80 +[ 55.476652] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 55.485731] r7:00000001 r6:000000ff r5:ed479d28 r4:00000000 +[ 55.491437] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 55.499295] r10:ed43d1fc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ed43d200 r5:ee822c00 +[ 55.507183] r4:ed43d1a0 +[ 55.509729] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 55.517674] r5:ee822c00 r4:ed43d180 +[ 55.521273] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 55.528346] r10:ed43d6c8 r9:00000008 r8:eec435d8 r7:eeb65b10 r6:00000000 r5:ee9bcf78 +[ 55.536237] r4:ed43d6c0 +[ 55.538783] [] (__fput) from [] (____fput+0x10/0x14) +[ 55.545508] r10:ed410f84 r9:ee64f200 r8:ec97d6fc r7:eccaec00 r6:ed42acc0 r5:c098181c +[ 55.553398] r4:eccaf060 +[ 55.555944] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 55.563280] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 55.570702] r7:ed479e40 r6:00000001 r5:eccaf078 r4:eccaec00 +[ 55.576408] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 55.583654] r7:ed479edc +[ 55.586201] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 55.593884] r7:ed479edc r6:418004fc r5:ed478000 r4:08430000 +[ 55.599590] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 55.606838] r10:00000000 r9:ed478000 r8:00000001 r7:b6ce0916 r6:ed479ec8 r5:b6ce0914 +[ 55.614729] r4:ed479fb0 +[ 55.617278] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 55.624874] r10:00000000 r9:ed478000 r8:c000fc84 r7:000000fc r6:ed479fb0 r5:c000fc84 +[ 55.632764] r4:ed478000 +[ 55.635312] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 55.643519] r7:000000fc r6:00043608 r5:ffffffff r4:beb267d0 +[ 55.649460] ---[ end trace c9fd645ba65d31bc ]--- +[ 55.716876] systemd-shutdown[1]: Sending SIGKILL to remaining processes... +[ 55.735705] systemd-shutdown[1]: Unmounting file systems. +[ 55.741529] systemd-shutdown[1]: Remounting '/run/user/0' read-only with options 'size=59932k,mode=700'. +[ 55.751362] systemd-shutdown[1]: Unmounting /run/user/0. +[ 55.787617] systemd-shutdown[1]: Remounting '/var/volatile' read-only with options 'size=51200k'. +[ 55.796553] systemd-shutdown[1]: Unmounting /var/volatile. +[ 55.827604] systemd-shutdown[1]: Remounting '/media/ram' read-only with options 'size=16384k'. +[ 55.836277] systemd-shutdown[1]: Unmounting /media/ram. +[ 55.867557] systemd-shutdown[1]: Remounting '/tmp' read-only with options ''. +[ 55.874744] systemd-shutdown[1]: Unmounting /tmp. +[ 55.907654] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 56.673303] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 56.682733] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 56.690789] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 56.696755] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 56.704784] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 56.710825] systemd-shutdown[1]: All filesystems unmounted. +[ 56.716427] systemd-shutdown[1]: Deactivating swaps. +[ 56.721623] systemd-shutdown[1]: All swaps deactivated. +[ 56.726879] systemd-shutdown[1]: Detaching loop devices. +[ 56.740826] systemd-shutdown[1]: All loop devices detached. +[ 56.746433] systemd-shutdown[1]: Detaching DM devices. +[ 56.751927] systemd-shutdown[1]: All DM devices detached. +[ 56.773276] systemd-shutdown[1]: Rebooting. +[ 56.783052] reboot: Restarting system + +Responses: +HI For reboot command to work we should be able to gracefully shutdown all active devices/drivers. From the logs the kernel seems to have hit an error condition trying to free up a display subsystem allocated buffer. Can you review and confirm what was running while the reboot command is being attempted - which peripherals , cores were active? Is this feature required for development, debug environment or in production environment - can you elaborate on the intended purpose + +Hi Sam, You may find this thread useful. e2e.ti.com/.../749458 Regards Shravan + +Hi Shravan,Sriram I have executed the unload and reload a remotecore at runtime from Linux before execute "reboot" command. $ cd /sys/bus/platform/drivers/omap-rproc/ $ echo 55020000.ipu > unbind $ echo 55020000.ipu > bind but the result is the same phenomenon, need power reset manually. Because the user-case is that 3D SRV on TDA2 board controlled by another ECU, it need reboot system without power reset. In general, the reboot command should be triggered CPU reset, then reload boot image and execute re-initialize CPU& memory. But it seems that the system is hang up at the time after display the message of "reboot: restarting system" . regards, Sam. + +Hi In addition to the CPU reset, the reboot sequence should also cleanup peripheral state - For instance, teardown gracefully any DMA operations in flight etc. Linux as part of the reboot sequence, will invoke all registered driver remove() hooks. The failure log seems to indicate that the driver stop/cleanup sequence encountered an error when trying to free up the buffers. Need to diagnose and identify the offending module and the reason for the failure - can you pay closer attention to GPU, display module usage when the reboot is initiated + +Hi From the log message: Modules linked in: ... [last unloaded: bc_example], I traced the all loaded modules in system by lsmod command, observed that the "bc_example" module on the list. then unload the module by rmmod command, We couldn't unload the pvrsrvkmm module successfully, the error message is in use. From the Backtrace stack: it locates at DRM device driver(Direct Render ) FILE: ti_components/os_tools/linux/kernel/omap/drivers/gpu/drm/drm_gem.c. I confirmed that the there is no modification in the driver of kernel. Does it result from the configuration issue of Linux kernel? BR, Sam Hsieh 4721.list_module_log.txt +root@dra7xx-evm:~# lsmod +Module Size Used by +xhci_plat_hcd 5183 0 +xhci_hcd 108888 1 xhci_plat_hcd +usbcore 194450 2 xhci_plat_hcd,xhci_hcd +bc_example 7058 0 +rpmsg_proto 7791 0 +dwc3 64067 0 +udc_core 12063 1 dwc3 +virtio_rpmsg_bus 12974 1 rpmsg_proto +pvrsrvkm 412372 3 bc_example +ahci_platform 3218 0 +libahci_platform 8821 1 ahci_platform +libahci 27699 2 libahci_platform,ahci_platform +libata 195741 3 libahci,libahci_platform,ahci_platform +dwc3_omap 4926 0 +extcon_usb_gpio 3756 0 +scsi_mod 129524 1 libata +extcon 13815 3 dwc3,dwc3_omap,extcon_usb_gpio +c_can_platform 6604 0 +omap_aes_driver 19230 0 +c_can 9590 1 c_can_platform +omap_sham 21089 0 +can_dev 12991 1 c_can +rtc_omap 8272 0 +omap_des 11446 0 +omap_rng 4835 0 +rng_core 7691 1 omap_rng +omap_remoteproc 13155 3 +remoteproc 27185 3 omap_remoteproc,virtio_rpmsg_bus,rpmsg_proto +virtio 7452 2 remoteproc,virtio_rpmsg_bus +virtio_ring 12291 2 remoteproc,virtio_rpmsg_bus +sch_fq_codel 8059 1 + +root@dra7xx-evm:~# rmmod pvrsrvkm +rmmod: ERROR: Module pvrsrvkm is in use +root@dra7xx-evm:~# rmmod pvrsrvkm +rmmod: ERROR: Module pvrsrvkm is in use +root@dra7xx-evm:~# modinfo pvrsrvkm +filename: /lib/modules/4.4.84-00032-g0f6b93d-dirty/extra/pvrsrvkm.ko +license: Dual MIT/GPL +author: Imagination Technologies Ltd. +license: Dual MIT/GPL +author: Imagination Technologies Ltd. +srcversion: 533BB7E5866E52F63B9ACCB +alias: of:N*T*Cti,dra7-sgx544* +depends: +vermagic: 4.4.84-00032-g0f6b93d-dirty SMP preempt mod_unload modversions ARMv7 p2v8 +parm: gPVRDebugLevel:Sets the level of debug output (default 0x7) (uint) + + 4150.kernel_config.txt + +Hi Yes, as i had written earlier the clean up with GPU driver seems to be failing. Do you have HMI , wayland compositor running while you try to initiate a reboot. Can you check by manually stopping the wayland compositor as well. Also, do elaborate on what was running from GPU, display perspective while the reboot is being attempted. + +Hi Sam, As part of Vision-SDK main menu can you select "z: Exit - AND SHUTDOWN Remote CPUs" and then try reboot? Regards Shravan + +Hi Shravan, I selected the item of SHUTDOWN Remote CPUs, then executed "reboot" command. BTW, I also try to kill the process of "runWeston" then execute reboot command. 683 root 2668 S {runWeston} /bin/sh /usr/bin/runWeston But both the result are the same phenomenon, system still can't boot up. The log as the attached. Could you help suggest us how to look into issue? Thanks. regards, Sam. + +Hi, The GPU applications need to be shutdown first. This includes any Wayland applications which are running and Weston. After that point, GPU shutdown sequence is as follows: /etc/init.d/rc.pvr stop Please do this and let us know if you see a problem. The Linux file system initialization is done using systemd init which runs rc.pvr script. The shutdown sequence needs to also go through systemd. Regards, Anand + +Hi Anand, Thank you for your reply. I executed the script of "/etc/init.d/rc.pvr stop", but it shows the error message of rmmod: ERROR: Module pvrsrvkm is in use Couldn't unload modules It seems that couldn't unload pvrsrvkm module, the same phenomenon. Could you help suggest us how to debug the dependency? Thanks. regards, Sam Hsieh reboot_log_0304.txt +root@dra7xx-evm:~# < +U-Boot SPL 2016.05 (Feb 27 2019 - 21:47:31) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - MMC init failed, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Feb 27 2019 - 21:47:31 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +173 bytes read in 6 ms (27.3 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3560352 bytes read in 338 ms (10 MiB/s) +106933 bytes read in 27 ms (3.8 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x3653a0 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff1b4 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00032-g0f6b93d-dirty (sam@ubuntu-ML-Server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Wed Feb 27 21:47:36 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=47fcf07e-02 rw rootwait ip=none mem=1024M cma=64M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 353188K/1012736K available (6635K kernel code, 320K rwdata, 2392K rodata, 336K init, 290K bss, 413788K reserved, 245760K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08d902c (9029 kB) +[ 0.000000] .init : 0xc08da000 - 0xc092e000 ( 336 kB) +[ 0.000000] .data : 0xc092e000 - 0xc097e120 ( 321 kB) +[ 0.000000] .bss : 0xc0980000 - 0xc09c8800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000330] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000772] Console: colour dummy device 80x30 +[ 0.000788] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000794] This ensures that you still see kernel messages. Please +[ 0.000799] update your kernel commandline. +[ 0.000813] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000825] pid_max: default: 32768 minimum: 301 +[ 0.000922] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000932] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001474] Initializing cgroup subsys io +[ 0.001490] Initializing cgroup subsys memory +[ 0.001514] Initializing cgroup subsys devices +[ 0.001528] Initializing cgroup subsys freezer +[ 0.001539] Initializing cgroup subsys perf_event +[ 0.001550] Initializing cgroup subsys pids +[ 0.001575] CPU: Testing write buffer coherency: ok +[ 0.001774] /cpus/cpu@0 missing clock-frequency property +[ 0.001789] /cpus/cpu@1 missing clock-frequency property +[ 0.001800] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001835] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080065] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080135] Brought up 2 CPUs +[ 0.080148] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080154] CPU: All CPU(s) started in HYP mode. +[ 0.080160] CPU: Virtualization extensions available. +[ 0.080534] devtmpfs: initialized +[ 0.109047] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110022] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.314218] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.314241] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.319178] pinctrl core: initialized pinctrl subsystem +[ 0.320044] NET: Registered protocol family 16 +[ 0.321024] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350240] cpuidle: using governor ladder +[ 0.380262] cpuidle: using governor menu +[ 0.388874] OMAP GPIO hardware version 0.1 +[ 0.395346] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.411849] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.411863] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.419909] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.419919] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420404] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420413] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.420993] OMAP DMA hardware revision 0.0 +[ 0.461601] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462750] edma 43300000.edma: memcpy is disabled +[ 0.467525] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471894] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.472072] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472234] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472390] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472679] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472863] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.475867] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491317] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563628] pcf857x 0-0020: probed +[ 0.564197] pcf857x 0-0021: probed +[ 0.564347] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564741] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.564939] media: Linux media interface: v0.10 +[ 0.564989] Linux video capture interface: v2.00 +[ 0.565029] pps_core: LinuxPPS API ver. 1 registered +[ 0.565036] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.565062] PTP clock support registered +[ 0.565111] EDAC MC: Ver: 3.0.0 +[ 0.565866] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.566156] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566494] Advanced Linux Sound Architecture Driver Initialized. +[ 0.567370] clocksource: Switched to clocksource arch_sys_counter +[ 0.577995] NET: Registered protocol family 2 +[ 0.578487] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578550] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578675] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578723] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578754] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578961] NET: Registered protocol family 1 +[ 0.579225] RPC: Registered named UNIX socket transport module. +[ 0.579234] RPC: Registered udp transport module. +[ 0.579241] RPC: Registered tcp transport module. +[ 0.579248] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.580252] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.590322] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.590979] NFS: Registering the id_resolver key type +[ 0.591013] Key type id_resolver registered +[ 0.591021] Key type id_legacy registered +[ 0.591090] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.592394] bounce: pool size: 64 pages +[ 0.592552] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.592571] io scheduler noop registered +[ 0.592585] io scheduler deadline registered +[ 0.592621] io scheduler cfq registered (default) +[ 0.597532] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.600691] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.600703] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.600736] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.600758] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.630607] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.630774] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.630787] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.630797] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.630807] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.631217] PCI: bus0: Fast back to back transfers disabled +[ 0.631340] PCI: bus1: Fast back to back transfers enabled +[ 0.631424] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.631440] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.631452] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.631674] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.691911] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.695309] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.705886] console [ttyS0] enabled +[ 1.710291] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.719985] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.730025] [drm] Initialized drm 1.1.0 20060810 +[ 1.735537] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.742225] [drm] No driver support for vblank timestamp query. +[ 1.748392] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.761356] loop: module loaded +[ 1.764904] vmemexp device MAJOR num = 245 +[ 1.769051] vmemexp class registered +[ 1.772766] /dev/vmemexp device registered +[ 1.776880] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.782598] nand: No NAND device found +[ 1.786369] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.796234] m25p80 spi32766.0: found w25q256, expected s25fl256s1 +[ 1.802397] m25p80 spi32766.0: w25q256 (32768 Kbytes) +[ 1.807549] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.813407] Creating 7 MTD partitions on "spi32766.0": +[ 1.818584] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.824698] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.831045] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.837985] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.844657] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.852072] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.858422] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.866196] libphy: Fixed MDIO Bus: probed +[ 1.872955] mousedev: PS/2 mouse device common for all mice +[ 1.879187] i2c /dev entries driver +[ 1.887960] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.893583] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.899986] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.906520] evm_3v3_sw: supplied by sysen1 +[ 1.990167] mmc0: MAN_BKOPS_EN bit is not set +[ 2.001477] mmc0: new HS200 MMC card at address 0001 +[ 2.006903] mmcblk0: mmc0:0001 R1J55A 7.28 GiB +[ 2.011714] mmcblk0boot0: mmc0:0001 R1J55A partition 1 8.00 MiB +[ 2.017915] mmcblk0boot1: mmc0:0001 R1J55A partition 2 8.00 MiB +[ 2.069239] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.078350] aic_dvdd: supplied by evm_3v3_sw +[ 2.084256] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.091787] NET: Registered protocol family 10 +[ 2.096867] sit: IPv6 over IPv4 tunneling driver +[ 2.102117] NET: Registered protocol family 17 +[ 2.106791] Key type dns_resolver registered +[ 2.111223] omap_voltage_late_init: Voltage driver support not added +[ 2.118119] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.124326] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.131059] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.137269] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.145509] Power Management for TI OMAP4+ devices. +[ 2.150611] Registering SWP/SWPB emulation handler +[ 2.156341] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.163610] dmm 4e000000.dmm: initialized all PAT entries +[ 2.169728] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.176631] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.228231] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.247896] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.254778] hctosys: unable to open rtc device (rtc0) +[ 2.268094] evm_1v8: disabling +[ 2.271166] aic_dvdd: disabling +[ 2.274317] vmmcwl_fixed: disabling +[ 2.278030] ldousb: disabling +[ 2.281448] ALSA device list: +[ 2.284425] #0: DRA7xx-EVM +[ 2.287966] Waiting for root device PARTUUID=47fcf07e-02... +[ 2.386244] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.394354] mmc2: new SDHC card at address e624 +[ 2.409352] mmcblk1: mmc2:e624 SU08G 7.40 GiB +[ 2.421037] mmcblk1: p1 p2 +[ 2.508449] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.517227] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.945104] EXT4-fs (mmcblk1p2): recovery complete +[ 2.951994] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.960256] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 2.968731] devtmpfs: mounted +[ 2.971933] Freeing unused kernel memory: 336K +[ 2.976394] This architecture does not have kernel memory protection. +[ 3.330949] systemd[1]: System time before build time, advancing clock. +[ 3.388043] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.402679] random: systemd: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.414373] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.432923] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.458774] systemd[1]: Set hostname to . +[ 3.556329] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.599307] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.610634] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.621989] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.641943] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 21 bits of entropy available) +[ 3.800868] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.810365] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.820226] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 4.388911] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 4.396700] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 4.404450] systemd[1]: sysinit.target: Found dependency on basic.target/start +[ 4.411735] systemd[1]: sysinit.target: Found dependency on sockets.target/start +[ 4.419185] systemd[1]: sysinit.target: Found dependency on dbus.socket/start +[ 4.426355] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 4.433827] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.443285] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.479555] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 4.524060] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.547646] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.567700] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.600632] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.628178] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.658131] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.677643] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.697718] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.747754] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.779657] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.802155] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 4.857701] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.879844] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.910681] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.939653] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.967571] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.987625] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 5.017634] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 5.037544] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 5.057588] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 5.107718] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.129993] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 5.158237] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 5.187656] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 5.207736] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 5.272012] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.297662] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.327615] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.347783] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Remount Root and Kernel File Systems. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting udev Coldplug all Devices... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Create Static Device Nodes in /dev. +[ 6.035780] systemd-journald[147]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... + Starting Load/Save Random Seed... +[ OK ] Started Create Volatile Files and Directories. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started udev Coldplug all Devices. +[ 6.596979] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.605595] remoteproc0: 55020000.ipu is available +[ 6.615589] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 6.630446] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.651079] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.672767] remoteproc1: 40800000.dsp is available +[ 6.685920] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.703428] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.726428] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 6.735349] remoteproc2: 41000000.dsp is available +[ 6.749654] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.761518] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Found device /dev/ttyS0. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ 6.932318] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.093317] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.518466] SCSI subsystem initialized +[ 7.633853] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 8.260808] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.293300] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.303199] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 8.323427] CAN device driver interface +[ OK ] Started Network Time Synchronization. +[ 8.468452] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=354) + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ 9.328231] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ 9.532952] remoteproc0: registered virtio0 (type 7) +[ OK ] Reached target Basic System. + Starting Login Service... +[ OK ] Started Kernel Logging Service. +[ 10.029519] remoteproc2: registered virtio1 (type 7) +[ 10.043471] remoteproc1: registered virtio2 (type 7) + Starting Save/Restore Sound Card State... + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. +[ 10.502360] remoteproc0: powering up 55020000.ipu +[ 10.519884] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 9553028 +[ 10.526886] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 10.567839] remoteproc0: remote processor 55020000.ipu is now up +[ 10.575546] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 10.583768] remoteproc2: powering up 41000000.dsp +[ 10.654904] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 10.661707] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 10.671144] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 10.683968] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 6967530 +[ 10.697804] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 10.703695] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 10.709632] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 10.717659] scsi host0: ahci +[ 10.722455] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ 10.765138] remoteproc2: remote processor 41000000.dsp is now up +[ 10.772921] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 10.779504] remoteproc1: powering up 40800000.dsp +[ 10.792428] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 6967530 +[ 10.806120] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 10.812010] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 10.817955] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 10.850425] remoteproc1: remote processor 40800000.dsp is now up +[ 10.867716] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 10.933069] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 10.940331] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 10.949684] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 10.995905] NET: Registered protocol family 41 +[ 11.004148] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. + Starting Network Service... +[ 11.077632] ata1: SATA link down (SStatus 0 SControl 300) +[ OK ] Started System Logging Service. + Starting rc.pvr.service... +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Sound Card. +[ OK ] Started Network Service. +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State. +[ 11.406056] usbcore: registered new interface driver usbfs +[ 11.412380] usbcore: registered new interface driver hub +[ 11.418512] usbcore: registered new device driver usb +[ 11.553319] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 11.581088] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 11.598774] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 11.605837] dwc3 48890000.usb: otg: can't start till gadget registers +[ 11.614802] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 11.625412] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 11.636044] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 11.649039] xhci-hcd xhci-hcd.1.auto: irq 495, io mem 0x488d0000 +[ 11.663414] hub 1-0:1.0: USB hub found +[ 11.669278] hub 1-0:1.0: 1 port detected +[ 11.673580] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 11.681956] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 11.691414] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 11.703493] hub 2-0:1.0: USB hub found +[ OK ] Started rc.pvr.service.[ 11.708379] hub 2-0:1.0: 1 port detected + + Starting weston.service... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started weston.service. +[ OK ] Started Login Service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started Network Name Resolution. +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root (automatic login) + +root@dra7xx-evm:~# /etc/ini[ 49.101149] random: nonblocking pool is initialized +root@dra7xx-evm:~# +root@dra7xx-evm:~# /etc/init.d/rc.pvr stop +rmmod: ERROR: Module pvrsrvkm is in use +Couldn't unload modules +root@dra7xx-evm:~# cat /etc/powervr.ini +[default] +#WindowSystem=libpvrws_WAYLAND.so + +[weston] +DbmDriverName=vdrm + +root@dra7xx-evm:~# cat /proc/pvr/version +Version SGX_DDK sgxddk MAIN@3699939 (release) omap_linux +System Version String: SGX revision = 116 +root@dra7xx-evm:~# lsmod +Module Size Used by +xhci_plat_hcd 5183 0 +xhci_hcd 108888 1 xhci_plat_hcd +usbcore 194450 2 xhci_plat_hcd,xhci_hcd +rpmsg_proto 7791 0 +ahci_platform 3218 0 +dwc3 64067 0 +libahci_platform 8821 1 ahci_platform +virtio_rpmsg_bus 12974 1 rpmsg_proto +libahci 27699 2 libahci_platform,ahci_platform +udc_core 12063 1 dwc3 +libata 195741 3 libahci,libahci_platform,ahci_platform +extcon_usb_gpio 3756 0 +dwc3_omap 4926 0 +pvrsrvkm 412372 2 +c_can_platform 6604 0 +c_can 9590 1 c_can_platform +can_dev 12991 1 c_can +extcon 13815 3 dwc3,dwc3_omap,extcon_usb_gpio +omap_sham 21089 0 +omap_aes_driver 19230 0 +omap_rng 4835 0 +scsi_mod 129524 1 libata +rtc_omap 8272 0 +rng_core 7691 1 omap_rng +omap_des 11446 0 +omap_remoteproc 13155 3 +remoteproc 27185 3 omap_remoteproc,virtio_rpmsg_bus,rpmsg_proto +virtio 7452 2 remoteproc,virtio_rpmsg_bus +virtio_ring 12291 2 remoteproc,virtio_rpmsg_bus +sch_fq_codel 8059 1 +root@dra7xx-evm:~# reboot +[ OK ] Stopped Create Static Device Nodes in /dev. +[ OK ] Stopped Setup Virtual Console. +[ OK ] Stopped target Swap. + Stopping Load/Save Random Seed... +[ OK ] Stopped target Multi-User System. + Stopping tiipclad-daemon.service... +[ OK ] Closed Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Stopped target Local File Systems. + U Stopping Session c1 of user root. + Stopping User Manager for UID 0... +[ OK ] Stopped Daily Cleanup of Temporary Directories. + Stopping Save/Restore Sound Card State... +[ OK ] Stopped target Login Prompts. + Stopping Getty on tty1... + Stopping Serial Getty on ttyS0... +[ OK ] Stopped target Sound Card. + Stopping telnetd.service... + Stopping Kernel Logging Service... + Stopping Network Name Resolution... +[ OK ] Stopped Network Time Synchronization. +[ OK ] Stopped Kernel Logging Service. +[ OK ] Stopped System Logging Service. +[ OK ] Stopped Getty on tty1. +[ OK ] Stopped Serial Getty on ttyS0. +[ OK ] Stopped Network Name Resolution. +[ OK ] Stopped User Manager for UID 0. +[ OK ] Stopped Load/Save Random Seed. +[ OK ] Stopped tiipclad-daemon.service. +[FAILED] Failed unmounting /run/user/0. +[ OK ] Unmounted /run/media/mmcblk1p1. +[ OK ] Stopped Session c1 of user root. +[ OK ] Stopped Save/Restore Sound Card State. +[ OK ] Stopped telnetd.service. +[ OK ] Stopped User Manager for UID 0. + Stopping weston.service... +[ OK ] Removed slice User Slice of root. + Stopping Login Service... +[ OK ] Stopped target Network. + Stopping Network Service... +[ OK ] Removed slice system-serial\x2dgetty.slice. + Stopping Permit User Sessions... +[ OK ] Removed slice system-getty.slice. +[ OK ] Stopped Remount Root and Kernel File Systems. +[ OK ] Stopped Login Service. +[ OK ] Stopped Network Service. +[ OK ] Stopped weston.service. +[ OK ] Stopped Permit User Sessions. +[ OK ] Stopped target Remote File Systems. + Stopping rc.pvr.service... + Stopping D-Bus System Message Bus... +[ OK ] Stopped Apply Kernel Variables. +[ OK ] Stopped D-Bus System Message Bus. +[ OK ] Stopped rc.pvr.service. +[ OK ] Stopped target Basic System. +[ OK ] Stopped target Slices. +[ OK ] Removed slice User and Session Slice. + Unmounting Temporary Directory... +[ OK ] Stopped target Paths. +[ OK ] Stopped Forward Password Requests to Wall Directory Watch. +[ OK ] Stopped Dispatch Password Requests to Console Directory Watch. +[ OK ] Stopped target Sockets. +[ OK ] Closed Syslog Socket. +[ OK ] Closed D-Bus System Message Bus Socket. +[ OK ] Reached target Shutdown. +[ 204.758878] systemd-shutdown[1]: Sending SIGTERM to remaining processes... +[ 204.787804] systemd-journald[147]: Received SIGTERM from PID 1 (systemd-shutdow). +[ 204.798694] ------------[ cut here ]------------ +[ 204.803342] WARNING: CPU: 1 PID: 729 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 204.812054] 2025 pages are still in use! +[ 204.815993] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto ahci_platform dwc3 libahci_platform virtio_rpmsg_bus libahci udc_core libata extcon_usb_gpio dwc3_omap pvrsrvkm(O) c_can_platform c_can can_dev extcon omap_sham omap_aes_driver omap_rng scsi_mod rtc_omap rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 204.850124] CPU: 1 PID: 729 Comm: weston Tainted: G O 4.4.84-00032-g0f6b93d-dirty #2 +[ 204.859031] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 204.865146] Backtrace: +[ 204.867619] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 204.875216] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 204.880933] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 204.888188] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 204.896308] r7:c00d939c r6:00001aab r5:00000009 r4:ec5d7bb8 +[ 204.902020] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 204.910751] r8:c09ad880 r7:c09335d0 r6:000bc5e9 r5:000007e9 r4:c0822e84 +[ 204.917517] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 204.925986] r3:000007e9 r2:c0822e84 +[ 204.929585] r4:000bc5e9 +[ 204.932138] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 204.940084] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff05800 r5:c09af470 r4:000bbe00 +[ 204.947901] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 204.956719] r5:0086b800 r4:007e9000 +[ 204.960325] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 204.969584] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 204.977355] r10:00000001 r9:c001c9d8 r8:bbe00000 r7:eff05800 r6:007e9000 r5:ef26a010 +[ 204.985251] r4:ee7b4000 +[ 204.987803] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 204.996017] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 205.004660] r9:c038e78c r8:ee75ce40 r7:00000001 r6:ee822c00 r5:ee7b4000 r4:ee822c00 +[ 205.012472] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 205.023384] r5:ee822c34 r4:ee7b4000 +[ 205.026987] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 205.038683] r5:ee75ce40 r4:ee7b4000 +[ 205.042288] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 205.051367] r7:00000001 r6:000000ff r5:ec5d7d28 r4:00000000 +[ 205.057078] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 205.064937] r10:ee75cebc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ee75cec0 r5:ee822c00 +[ 205.072831] r4:ee75ce60 +[ 205.075380] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 205.083327] r5:ee822c00 r4:ee75ce40 +[ 205.086928] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 205.094003] r10:ee75c848 r9:00000008 r8:eec435d8 r7:eeb80a10 r6:00000000 r5:ee9bcf78 +[ 205.101899] r4:ee75c840 +[ 205.104447] [] (__fput) from [] (____fput+0x10/0x14) +[ 205.111173] r10:ee661a04 r9:eebbfd40 r8:ed48ec7c r7:ee7a3c00 r6:ee7b4900 r5:c098181c +[ 205.119069] r4:ee7a4060 +[ 205.121618] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 205.128957] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 205.136380] r7:ec5d7e40 r6:00000001 r5:ee7a4078 r4:ee7a3c00 +[ 205.142093] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 205.149341] r7:ec5d7edc +[ 205.151892] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 205.159575] r7:ec5d7edc r6:418004fc r5:ec5d6000 r4:08430000 +[ 205.165288] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 205.172536] r10:00000000 r9:ec5d6000 r8:fffffffc r7:b6d87916 r6:ec5d7ec8 r5:b6d87914 +[ 205.180432] r4:ec5d7fb0 +[ 205.182982] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 205.190579] r10:00000000 r9:ec5d6000 r8:c000fc84 r7:000000fc r6:ec5d7fb0 r5:c000fc84 +[ 205.198475] r4:ec5d6000 +[ 205.201025] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 205.209232] r7:000000fc r6:00043608 r5:ffffffff r4:bee877d0 +[ 205.215392] ---[ end trace bb1f77db84193301 ]--- +[ 205.220465] ------------[ cut here ]------------ +[ 205.225125] WARNING: CPU: 1 PID: 729 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 205.233554] 2025 pages are still in use! +[ 205.237500] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto ahci_platform dwc3 libahci_platform virtio_rpmsg_bus libahci udc_core libata extcon_usb_gpio dwc3_omap pvrsrvkm(O) c_can_platform c_can can_dev extcon omap_sham omap_aes_driver omap_rng scsi_mod rtc_omap rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 205.271498] CPU: 1 PID: 729 Comm: weston Tainted: G W O 4.4.84-00032-g0f6b93d-dirty #2 +[ 205.280403] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 205.286516] Backtrace: +[ 205.288979] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 205.296575] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 205.302283] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 205.309533] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 205.317651] r7:c00d939c r6:00001aab r5:00000009 r4:ec5d7bb8 +[ 205.323357] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 205.332086] r8:c09ad880 r7:c09335d0 r6:000bcde9 r5:000007e9 r4:c0822e84 +[ 205.338846] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 205.347313] r3:000007e9 r2:c0822e84 +[ 205.350910] r4:000bcde9 +[ 205.353457] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 205.361402] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff17800 r5:c09af470 r4:000bc600 +[ 205.369210] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 205.378026] r5:0087d800 r4:007e9000 +[ 205.381628] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 205.390884] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 205.398654] r10:00000002 r9:c001c9d8 r8:bc600000 r7:eff17800 r6:007e9000 r5:ef26a010 +[ 205.406544] r4:ee7b40c0 +[ 205.409090] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 205.417300] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 205.425942] r9:c038e78c r8:ee75ce40 r7:00000001 r6:ee822c00 r5:ee7b40c0 r4:ee822c00 +[ 205.433750] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 205.444660] r5:ee822c34 r4:ee7b40c0 +[ 205.448258] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 205.459952] r5:ee75ce40 r4:ee7b40c0 +[ 205.463552] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 205.472629] r7:00000001 r6:000000ff r5:ec5d7d28 r4:00000000 +[ 205.478333] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 205.486190] r10:ee75cebc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ee75cec0 r5:ee822c00 +[ 205.494078] r4:ee75ce60 +[ 205.496624] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 205.504568] r5:ee822c00 r4:ee75ce40 +[ 205.508168] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 205.515241] r10:ee75c848 r9:00000008 r8:eec435d8 r7:eeb80a10 r6:00000000 r5:ee9bcf78 +[ 205.523129] r4:ee75c840 +[ 205.525674] [] (__fput) from [] (____fput+0x10/0x14) +[ 205.532398] r10:ee661a04 r9:eebbfd40 r8:ed48ec7c r7:ee7a3c00 r6:ee7b4900 r5:c098181c +[ 205.540285] r4:ee7a4060 +[ 205.542831] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 205.550169] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 205.557590] r7:ec5d7e40 r6:00000001 r5:ee7a4078 r4:ee7a3c00 +[ 205.563296] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 205.570542] r7:ec5d7edc +[ 205.573087] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 205.580771] r7:ec5d7edc r6:418004fc r5:ec5d6000 r4:08430000 +[ 205.586476] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 205.593723] r10:00000000 r9:ec5d6000 r8:fffffffc r7:b6d87916 r6:ec5d7ec8 r5:b6d87914 +[ 205.601613] r4:ec5d7fb0 +[ 205.604161] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 205.611758] r10:00000000 r9:ec5d6000 r8:c000fc84 r7:000000fc r6:ec5d7fb0 r5:c000fc84 +[ 205.619646] r4:ec5d6000 +[ 205.622193] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 205.630398] r7:000000fc r6:00043608 r5:ffffffff r4:bee877d0 +[ 205.636133] ---[ end trace bb1f77db84193302 ]--- +[ 205.641064] ------------[ cut here ]------------ +[ 205.645704] WARNING: CPU: 1 PID: 729 at mm/page_alloc.c:6827 free_contig_range+0x98/0x9c() +[ 205.654010] 2025 pages are still in use! +[ 205.657949] Modules linked in: xhci_plat_hcd xhci_hcd usbcore rpmsg_proto ahci_platform dwc3 libahci_platform virtio_rpmsg_bus libahci udc_core libata extcon_usb_gpio dwc3_omap pvrsrvkm(O) c_can_platform c_can can_dev extcon omap_sham omap_aes_driver omap_rng scsi_mod rtc_omap rng_core omap_des omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel [last unloaded: bc_example] +[ 205.691930] CPU: 1 PID: 729 Comm: weston Tainted: G W O 4.4.84-00032-g0f6b93d-dirty #2 +[ 205.700835] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 205.706948] Backtrace: +[ 205.709410] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 205.717006] r7:c00d939c r6:600b0013 r5:00000000 r4:c094d810 +[ 205.722712] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 205.729961] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 205.738080] r7:c00d939c r6:00001aab r5:00000009 r4:ec5d7bb8 +[ 205.743785] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) +[ 205.752516] r8:c09ad880 r7:c09335d0 r6:000bd5e9 r5:000007e9 r4:c0822e84 +[ 205.759274] [] (warn_slowpath_fmt) from [] (free_contig_range+0x98/0x9c) +[ 205.767742] r3:000007e9 r2:c0822e84 +[ 205.771337] r4:000bd5e9 +[ 205.773887] [] (free_contig_range) from [] (cma_release+0x90/0xb0) +[ 205.781832] r9:ef69a000 r8:ef26a010 r7:00000001 r6:eff29800 r5:c09af470 r4:000bce00 +[ 205.789639] [] (cma_release) from [] (dma_release_from_contiguous+0x38/0x40) +[ 205.798456] r5:0088f800 r4:007e9000 +[ 205.802057] [] (dma_release_from_contiguous) from [] (__arm_dma_free+0x124/0x1fc) +[ 205.811313] [] (__arm_dma_free) from [] (arm_dma_free+0x20/0x28) +[ 205.819083] r10:00000003 r9:c001c9d8 r8:bce00000 r7:eff29800 r6:007e9000 r5:ef26a010 +[ 205.826972] r4:ee7b4a80 +[ 205.829522] [] (arm_dma_free) from [] (v_gem_free_object+0x10c/0x144) +[ 205.837733] [] (v_gem_free_object) from [] (drm_gem_object_free+0x38/0x50) +[ 205.846374] r9:c038e78c r8:ee75ce40 r7:00000001 r6:ee822c00 r5:ee7b4a80 r4:ee822c00 +[ 205.854178] [] (drm_gem_object_free) from [] (drm_gem_object_handle_unreference_unlocked+0xf0/0x124) +[ 205.865088] r5:ee822c34 r4:ee7b4a80 +[ 205.868687] [] (drm_gem_object_handle_unreference_unlocked) from [] (drm_gem_object_release_handle+0x58/0x70) +[ 205.880381] r5:ee75ce40 r4:ee7b4a80 +[ 205.883982] [] (drm_gem_object_release_handle) from [] (idr_for_each+0xac/0xe0) +[ 205.893061] r7:00000001 r6:000000ff r5:ec5d7d28 r4:00000000 +[ 205.898766] [] (idr_for_each) from [] (drm_gem_release+0x24/0x30) +[ 205.906623] r10:ee75cebc r9:ee822c34 r8:ee822cf8 r7:ee822cf4 r6:ee75cec0 r5:ee822c00 +[ 205.914513] r4:ee75ce60 +[ 205.917058] [] (drm_gem_release) from [] (drm_release+0x3f0/0x4b4) +[ 205.925002] r5:ee822c00 r4:ee75ce40 +[ 205.928600] [] (drm_release) from [] (__fput+0x88/0x1d0) +[ 205.935673] r10:ee75c848 r9:00000008 r8:eec435d8 r7:eeb80a10 r6:00000000 r5:ee9bcf78 +[ 205.943562] r4:ee75c840 +[ 205.946107] [] (__fput) from [] (____fput+0x10/0x14) +[ 205.952831] r10:ee661a04 r9:eebbfd40 r8:ed48ec7c r7:ee7a3c00 r6:ee7b4900 r5:c098181c +[ 205.960720] r4:ee7a4060 +[ 205.963265] [] (____fput) from [] (task_work_run+0x98/0xcc) +[ 205.970602] [] (task_work_run) from [] (do_exit+0x300/0x9b8) +[ 205.978023] r7:ec5d7e40 r6:00000001 r5:ee7a4078 r4:ee7a3c00 +[ 205.983727] [] (do_exit) from [] (do_group_exit+0x48/0xc4) +[ 205.990974] r7:ec5d7edc +[ 205.993520] [] (do_group_exit) from [] (get_signal+0x22c/0x5b0) +[ 206.001203] r7:ec5d7edc r6:418004fc r5:ec5d6000 r4:08430000 +[ 206.006910] [] (get_signal) from [] (do_signal+0xd0/0x3b4) +[ 206.014157] r10:00000000 r9:ec5d6000 r8:fffffffc r7:b6d87916 r6:ec5d7ec8 r5:b6d87914 +[ 206.022048] r4:ec5d7fb0 +[ 206.024595] [] (do_signal) from [] (do_work_pending+0xa8/0xc0) +[ 206.032192] r10:00000000 r9:ec5d6000 r8:c000fc84 r7:000000fc r6:ec5d7fb0 r5:c000fc84 +[ 206.040081] r4:ec5d6000 +[ 206.042629] [] (do_work_pending) from [] (slow_work_pending+0xc/0x20) +[ 206.050835] r7:000000fc r6:00043608 r5:ffffffff r4:bee877d0 +[ 206.056784] ---[ end trace bb1f77db84193303 ]--- +[ 206.123673] systemd-shutdown[1]: Sending SIGKILL to remaining processes... +[ 206.142707] systemd-shutdown[1]: Unmounting file systems. +[ 206.148669] systemd-shutdown[1]: Remounting '/run/user/0' read-only with options 'size=59932k,mode=700'. +[ 206.158260] systemd-shutdown[1]: Unmounting /run/user/0. +[ 206.187441] systemd-shutdown[1]: Remounting '/var/volatile' read-only with options 'size=51200k'. +[ 206.196377] systemd-shutdown[1]: Unmounting /var/volatile. +[ 206.227493] systemd-shutdown[1]: Remounting '/media/ram' read-only with options 'size=16384k'. +[ 206.236166] systemd-shutdown[1]: Unmounting /media/ram. +[ 206.267414] systemd-shutdown[1]: Remounting '/tmp' read-only with options ''. +[ 206.274603] systemd-shutdown[1]: Unmounting /tmp. +[ 206.307482] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 206.471145] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 206.480180] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 206.488216] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 206.494177] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 206.502205] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 206.508230] systemd-shutdown[1]: All filesystems unmounted. +[ 206.513829] systemd-shutdown[1]: Deactivating swaps. +[ 206.518980] systemd-shutdown[1]: All swaps deactivated. +[ 206.524233] systemd-shutdown[1]: Detaching loop devices. +[ 206.536507] systemd-shutdown[1]: All loop devices detached. +[ 206.542162] systemd-shutdown[1]: Detaching DM devices. +[ 206.547676] systemd-shutdown[1]: All DM devices detached. +[ 206.569995] systemd-shutdown[1]: Rebooting. +[ 206.580185] reboot: Restarting system + +Hi Sam, The log shows the following sequence during startup. The rc.pvr (SGX) is started. The Weston has a dependency on OpenGLES. It is started after rc.pvr. [ OK ] Started rc.pvr.service.[ 11.708379] hub 2-0:1.0: 1 port detected Starting weston.service... [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Reached target Network. Starting Network Name Resolution... [ OK ] Started weston.service. On the teardown path, the Weston service needs to be shutdown first. I see that Weston is being stopped by systemd followed by rc.pvr. Hence, the sequencing is correct. However, the logs show the following error triggered by Weston which suggests that Weston shutdown is not successful. [ 205.271498] CPU: 1 PID: 729 Comm: weston Tainted: G W O 4.4.84-00032-g0f6b93d-dirty #2 Can you please try the following on target and share the results? This should be done after system initialization is completed. /etc/init.d/weston stop /etc/init.d/rc.pvr stop Regards, Anand + +Hi Anand, Here the test result of the commands (shutdown Weston service). root@dra7xx-evm:~# /etc/init.d/weston stop Stopping Weston Terminated root@dra7xx-evm:~# /etc/init.d/rc.pvr stop rmmod: ERROR: Module pvrsrvkm is in use Couldn't unload modules BTW, I observed that the special phenomenon about Weston service: #1) The process of Weston (PID=701) 701 root 55092 S weston --idle-time=0 root@dra7xx-evm:~# kill 701 root@dra7xx-evm:~# /etc/init.d/rc.pvr stop Unloaded PowerVR consumer services. but got the same phenomenon after executed reboot command. #2) run the Weston commands: root@dra7xx-evm:~# weston Date: 2018-09-17 UTC [09:37:15.528] weston 1.9.0 http://wayland.freedesktop.org Bug reports to: bugs.freedesktop.org/enter_bug.cgi Build: 1.8.93-2-gb05cdb8 configure.ac: bump to version 1.9.0 for the official release (2015-09-21 18:11:26 -0700) [09:37:15.528] OS: Linux, 4.4.84-00032-g0f6b93d-dirty, #2 SMP PREEMPT Wed Feb 27 21:47:36 CST 2019, armv7l [09:37:15.528] Using config file '/etc//weston.ini' [09:37:15.528] Loading module '/usr/lib/weston/wayland-backend.so' [09:37:15.529] Failed to load module: /usr/lib/weston/wayland-backend.so: cannot open shared object file: No such file or directory I couldn't found the module file of "wayland-backend.so" in the root filesystem. BR, Sam Hsieh + +Hi, I assume you are using VisionSDK Linux 3.5 on an TDA2xx SoC. Is this correct? Which end application is this targeted for? Head Unit, Cluster, Surround View, Front Camera, etc? I am asking the question because your setup has Weston running. An ADAS application is analytics based and does not typically use Weston. The display, compositor, etc are usually a part of Infotainment applications like head unit. We also have different SDKs targeted for Infotainment vs ADAS markets. VisionSDK is used for ADAS applications. Regards, Anand + +Hi Anand, Yes, We used VisionSDK v3.5 on TDA2xx SOC. We aimed at the 3D surround view application (ADAS), used 4 CHs AVB camera input via ethernet port, then output AVBTP video stream (H.264) to remote ECU after TDA2xx GeoAlign & Synthesis, I tried to remove initiate Weston running by the command of "update-rc.d -f Weston remove", it got the same phenomenon after reboot. BTW, I also got the same phenomenon when run "reset" at u-boot command prompt. => reset resetting … Could you let us know how trigger system/CPU boot up again ? thanks. BR, Sam Hsieh + +Hi Sam, Thanks for the details. I believe we have rootcaused the issue of PVR not being unloaded during reboot. The Weston service is shutdown by systemd. But, in reality, the Weston process is still running in background. Due to this, PVR driver sees that pvrsrvkm module is still in use. The rc.pvr shutdown fails becuase of that. If you manually kill weston process before reboot command, the PVR errors are not seen. Having said that, I think we may have missed the problem statement. We have been going after the PVR unable to load error. However, it looks like your main problem is that board is not rebooting. Is the assessment correct? Just so that we are on the same page - please confirm the following: 1. You had removed weston with update-rc.d. When you issued reboot, I assume unload of PVR services was successful. When you mentioned same phenomenon, what do you mean? That the board does not reboot correctly? 2. When you trigger a reset from u-boot prompt, the board does not reboot. At this point, drivers are not loaded and filesystem is not initialized. Even then, the reset does not trigger CPU boot up. Regaards, Anand + +Hi Anand, I tested your mentioned the issue of PVR unload before execute reboot commend. And the detailed log as the attached. Yes, my main problem is the TDA2XX EVM board could not rebooting correctly from shell command, it need manually power reset then system reboot. Due to I can't make sure whether if the A15 be triggered reset & boot up, try to simulate like power reset. PS: Current TDA2xx boot from SD card. BR, Sam Hsieh reboot_fail_0312.log + +Hi Anand, Could you help update why the board could not reboot correctly after issue reboot command? Thanks. BR, Sam Hsieh + +Hi Sam, I mainly look at Graphics portion of TDA2x / J6. The baseport team is looking into the reboot issue and will respond. Regards, Anand + +Hi Anand, Thank you for your feedback. BTW, TDA2 board could not reboot correctly even though press the Warn reset (CPU reset button on EVM). It could reboot only press the Cold reset (Power reset button of EVM). We are looking forward to receive your Baseport team feedback. BR, Sam Hsieh + +Hi Can you check on the EVM revision that you are using . Some of the earlier samples had an errata related to handling of warm reset -please refer to the official errata document for further details Additionally we had verified that we are able to successfully able to reboot from SW with the SDK binaries. Can you review any additional changes that you may have done - init sequence, startup scripts etc + +Hi Sriram, Thank you for your feedback. Our board as the following: CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV (H) DRAM: 1.5 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 B, I observed that the http://www.ti.com/lit/er/sprz397i/sprz397i.pdf i729: DDR Access Hang after Warm Reset It described that the workaround solution to use external circuitry to apply reset on DDR RESET# pin when warm reset assert. Does it mean that the schematics? BR, Sam Hsieh + +Hi On some of the earlier EVM revisions, the workaround employed was to convert the Warm Reset request into PORz at the PMIC side. For the EVM revision that you are using, believe the issue should have been addressed already. As a sanity check did you verify with the default SDK pre-built images and check if the reset works on your setup + +Hi Sriram, Thank you for your suggestion. But I don't find out the pre-built Linux image (It stored the BIOS pre-built image of VisionSDK v3.6) on site http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html . Could you help let me know where could download the pre-built image ? Thanks. BR, Sam Hsieh + +Sam The package includes pre-built binary for kernel, bootloader and the target filesystem. For the M4, DSP firmware you will need to build the image following instructions from the Vision SDK Linux Userguide + +Hi Srirama, I download the latest pre-built image (VISION SDK Linux File System) from the http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html And copy the following files into $INSTALL_DIR/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot folder tisdk-rootfs-image-dra7xx-evm.tar.xz (vsdk v3.6 root filesystem ) MLO u-boot.img uenv.txt Then make a bootable SD by the following command: cd $INSTALL_DIR/vision_sdk/build (Important! must be in this directory) ./hlos/scripts/linux/mksdboot.sh --device /dev/sde --appname apps --makeconfig tda2xx_evm_linux_all And check this SD can boot the EVM, but it still can't trigger EVM boot up successfully after run "reboot command. The reboot log message & pre-build image as the attached. Could you help validate whether if the TDA2X EVM need to be revised ? Thanks. regards, Sam Hsieh 1018.reboot_fail_0401_log.txt +U-Boot SPL 2016.05-00010-g9551b3d (Jul 18 2018 - 13:28:14) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - MMC init failed, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - MMC init failed, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05-00010-g9551b3d (Jul 18 2018 - 13:28:14 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +** First descriptor is NOT a primary desc on 1:1 ** +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +165 bytes read in 3 ms (53.7 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3553296 bytes read in 265 ms (12.8 MiB/s) +** File not found /boot/dra7-evm-infoadas.dtb ** +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363810 ] +ERROR: Did not find a cmdline Flattened Device Tree +Could not find a valid device tree +** First descriptor is NOT a primary desc on 1:1 ** +switch to partitions #0, OK +mmc1(part 0) is current device +** First descriptor is NOT a primary desc on 1:1 ** +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +mmc - MMC sub system + +Usage: +mmc info - display info of the current MMC device +mmc read addr blk# cnt +mmc write addr blk# cnt +mmc erase blk# cnt +mmc rescan +mmc part - lists available partition on current mmc device +mmc dev [dev] [part] - show or set current mmc device [partition] +mmc list - lists available devices +mmc hwpartition [args...] - does hardware partitioning + arguments (sizes in 512-byte blocks): + [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes + [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition + [check|set|complete] - mode, complete set partitioning completed + WARNING: Partitioning is a write-once setting once it is set to complete. + Power cycling is required to initialize partitions after set to complete. +mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode + - Set the BOOT_BUS_WIDTH field of the specified device +mmc bootpart-resize + - Change sizes of boot and RPMB partitions of specified device +mmc partconf dev boot_ack boot_partition partition_access + - Change the bits of the PARTITION_CONFIG field of the specified device +mmc rst-function dev value + - Change the RST_n_FUNCTION field of the specified device + WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. +mmc setdsr - set DSR register value + +Booting from eMMC ... +Wrong Image Format for bootm command +ERROR: can't get kernel image! +=> boot +## Error: "board_findfdt" not defined +** First descriptor is NOT a primary desc on 1:1 ** +switch to partitions #0, OK +mmc1(part 0) is current device +** First descriptor is NOT a primary desc on 1:1 ** +SD/MMC found on device 1 +** Unrecognized filesystem type ** +** Unrecognized filesystem type ** +** First descriptor is NOT a primary desc on 1:1 ** +switch to partitions #0, OK +mmc1(part 0) is current device +** First descriptor is NOT a primary desc on 1:1 ** +SD/MMC found on device 1 +3553296 bytes read in 264 ms (12.8 MiB/s) +108307 bytes read in 51 ms (2 MiB/s) +Booting from mmc1 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x363810 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff712 ... OK +Using machid 0xfe6 from environment + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-g742f84423d (tiiappadmin@swubn03) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Wed Jan 2 18:58:14 IST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be000000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 258368 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=24f460fe-02 rw rootwait ip=none mem=1024M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 831020K/1040384K available (6615K kernel code, 319K rwdata, 2456K rodata, 340K init, 290K bss, 20948K reserved, 188416K cma-reserved, 233472K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e402c (9073 kB) +[ 0.000000] .init : 0xc08e5000 - 0xc093a000 ( 340 kB) +[ 0.000000] .data : 0xc093a000 - 0xc0989ee0 ( 320 kB) +[ 0.000000] .bss : 0xc098b000 - 0xc09d3800 ( 290 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000337] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000345] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000792] Console: colour dummy device 80x30 +[ 0.000807] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000813] This ensures that you still see kernel messages. Please +[ 0.000818] update your kernel commandline. +[ 0.000831] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000845] pid_max: default: 32768 minimum: 301 +[ 0.000944] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000955] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001503] Initializing cgroup subsys io +[ 0.001520] Initializing cgroup subsys memory +[ 0.001545] Initializing cgroup subsys devices +[ 0.001557] Initializing cgroup subsys freezer +[ 0.001568] Initializing cgroup subsys perf_event +[ 0.001579] Initializing cgroup subsys pids +[ 0.001606] CPU: Testing write buffer coherency: ok +[ 0.001809] /cpus/cpu@0 missing clock-frequency property +[ 0.001825] /cpus/cpu@1 missing clock-frequency property +[ 0.001836] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001872] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080062] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080130] Brought up 2 CPUs +[ 0.080143] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080149] CPU: All CPU(s) started in HYP mode. +[ 0.080155] CPU: Virtualization extensions available. +[ 0.080535] devtmpfs: initialized +[ 0.109464] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110448] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.316249] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.316270] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.319893] pinctrl core: initialized pinctrl subsystem +[ 0.320799] NET: Registered protocol family 16 +[ 0.321728] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350229] cpuidle: using governor ladder +[ 0.380254] cpuidle: using governor menu +[ 0.389044] OMAP GPIO hardware version 0.1 +[ 0.393224] GPIO line 161 (radio_rst) hogged as output/low +[ 0.395605] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.413218] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.413232] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.425264] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.425274] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.425741] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.425750] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.426336] OMAP DMA hardware revision 0.0 +[ 0.471651] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.472879] edma 43300000.edma: memcpy is disabled +[ 0.477634] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.482235] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.482413] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.482571] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.482727] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.483026] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.483218] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.486455] palmas 0-0058: IRQ missing: skipping irq request +[ 0.500745] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.573062] pcf857x 0-0020: probed +[ 0.573638] pcf857x 0-0021: probed +[ 0.573791] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.590784] GPIO line 463 (vin6_sel_s0) hogged as output/low +[ 0.590882] pcf857x 1-0026: probed +[ 0.591476] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz +[ 0.591853] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.610650] pcf857x: probe of 3-0021 failed with error -121 +[ 0.610688] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz +[ 0.610909] media: Linux media interface: v0.10 +[ 0.610959] Linux video capture interface: v2.00 +[ 0.610999] pps_core: LinuxPPS API ver. 1 registered +[ 0.611006] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.611032] PTP clock support registered +[ 0.611077] EDAC MC: Ver: 3.0.0 +[ 0.611855] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.612150] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.612519] Advanced Linux Sound Architecture Driver Initialized. +[ 0.613354] clocksource: Switched to clocksource arch_sys_counter +[ 0.623751] NET: Registered protocol family 2 +[ 0.624247] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.624311] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.624436] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.624485] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.624516] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.624722] NET: Registered protocol family 1 +[ 0.624967] RPC: Registered named UNIX socket transport module. +[ 0.624975] RPC: Registered udp transport module. +[ 0.624981] RPC: Registered tcp transport module. +[ 0.624988] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.626019] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.636121] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.636771] NFS: Registering the id_resolver key type +[ 0.636797] Key type id_resolver registered +[ 0.636804] Key type id_legacy registered +[ 0.636877] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.638171] bounce: pool size: 64 pages +[ 0.638325] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.638339] io scheduler noop registered +[ 0.638350] io scheduler deadline registered +[ 0.638383] io scheduler cfq registered (default) +[ 0.643315] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.646633] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.646646] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.646679] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.646699] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.676851] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.677016] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.677029] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.677040] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.677050] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.677455] PCI: bus0: Fast back to back transfers disabled +[ 0.677578] PCI: bus1: Fast back to back transfers enabled +[ 0.677662] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.677677] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.677690] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.677912] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.738197] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.741555] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.728662] console [ttyS0] enabled +[ 1.733049] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.742752] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.752877] [drm] Initialized drm 1.1.0 20060810 +[ 1.759619] OMAP DSS rev 6.1 +[ 1.763405] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 1.771834] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 1.781732] connector-hdmi connector@1: failed to find video source +[ 1.794443] loop: module loaded +[ 1.798582] nand: No NAND device found +[ 1.802353] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.812230] m25p80 spi32766.0: found w25q256, expected s25fl256s1 +[ 1.818391] m25p80 spi32766.0: w25q256 (32768 Kbytes) +[ 1.823536] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.829395] Creating 7 MTD partitions on "spi32766.0": +[ 1.834572] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.840673] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.847036] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.854012] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.860700] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.868134] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.874485] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.882230] libphy: Fixed MDIO Bus: probed +[ 1.933384] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.939509] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.949685] libphy: 48485000.mdio: probed +[ 1.953734] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.961775] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.970500] cpsw 48484000.ethernet: Detected MACID = f0:b5:d1:16:51:9c +[ 1.977159] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.984129] cpsw 48484000.ethernet: cpsw: Detected MACID = f0:b5:d1:16:51:9d +[ 1.992807] mousedev: PS/2 mouse device common for all mice +[ 1.999097] i2c /dev entries driver +[ 2.003296] tvp5158 1-0058: Unable to of_probe +[ 2.008124] ov1063x 1-0037: Failed writing register 0x0103! +[ 2.013751] ov1063x: probe of 1-0037 failed with error -121 +[ 2.020102] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 2.027185] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 2.037632] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.043259] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.049720] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.053382] vip 48970000.vip: VPDMA firmware loaded +[ 2.056225] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 2.067111] evm_3v3_sw: supplied by sysen1 +[ 2.146158] mmc0: MAN_BKOPS_EN bit is not set +[ 2.157467] mmc0: new HS200 MMC card at address 0001 +[ 2.162907] mmcblk0: mmc0:0001 R1J55A 7.28 GiB +[ 2.167714] mmcblk0boot0: mmc0:0001 R1J55A partition 1 8.00 MiB +[ 2.173888] mmcblk0boot1: mmc0:0001 R1J55A partition 2 8.00 MiB +[ 2.225225] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.236419] hwspinlock_user gatemp: requested 20 hwspinlocks +[ 2.243407] aic_dvdd: supplied by evm_3v3_sw +[ 2.250174] davinci-mcasp 48464000.mcasp: DAI is shared +[ 2.256303] davinci-mcasp 48474000.mcasp: DAI is shared +[ 2.261753] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.268847] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 2.279725] NET: Registered protocol family 10 +[ 2.295025] sit: IPv6 over IPv4 tunneling driver +[ 2.300214] NET: Registered protocol family 17 +[ 2.304964] Key type dns_resolver registered +[ 2.309365] omap_voltage_late_init: Voltage driver support not added +[ 2.316281] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.322491] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.329240] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.335479] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.343695] Power Management for TI OMAP4+ devices. +[ 2.348803] Registering SWP/SWPB emulation handler +[ 2.354588] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.361798] dmm 4e000000.dmm: initialized all PAT entries +[ 2.369001] tvp5158 1-0058: Unable to of_probe +[ 2.373948] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.414587] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.434763] asoc-simple-card jamr3_sound: tlv320aic3x-hifi <-> 48474000.mcasp mapping ok +[ 2.466047] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.472690] [drm] No driver support for vblank timestamp query. +[ 2.555430] omap_hsmmc 4809c000.mmc: card busy +[ 2.685470] omap_hsmmc 4809c000.mmc: card busy +[ 2.754498] [drm] Enabling DMM ywrap scrolling +[ 2.790189] Console: switching to colour frame buffer device 240x67 +[ 2.811326] omapdrm omapdrm.0: fb0: omapdrm frame buffer device +[ 2.819350] omap_hsmmc 4809c000.mmc: card busy +[ 2.843818] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 2.850001] tvp5158 1-0058: Unable to of_probe +[ 2.855508] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.862467] hctosys: unable to open rtc device (rtc0) +[ 2.862541] tvp5158 1-0058: Unable to of_probe +[ 2.882245] evm_1v8: disabling +[ 2.885341] aic_dvdd: disabling +[ 2.888494] vmmcwl_fixed: disabling +[ 2.892180] ldousb: disabling +[ 2.895632] ALSA device list: +[ 2.898611] #0: DRA7xx-EVM +[ 2.901499] #1: HDMI 58040000.encoder +[ 2.905361] #2: DRA7xx-JAMR3 +[ 2.909248] Waiting for root device PARTUUID=24f460fe-02... +[ 2.935459] omap_hsmmc 4809c000.mmc: card busy +[ 3.065460] omap_hsmmc 4809c000.mmc: card busy +[ 3.195434] omap_hsmmc 4809c000.mmc: card busy +[ 3.325535] omap_hsmmc 4809c000.mmc: card busy +[ 3.455451] omap_hsmmc 4809c000.mmc: card busy +[ 3.585451] omap_hsmmc 4809c000.mmc: card busy +[ 3.715451] omap_hsmmc 4809c000.mmc: card busy +[ 3.763366] mmc2: Skipping voltage switch +[ 3.830498] mmc2: host does not support reading read-only switch, assuming write-enable +[ 3.840470] mmc2: new high speed SDHC card at address 0007 +[ 3.856483] mmcblk1: mmc2:0007 SD16G 14.5 GiB +[ 3.862151] mmcblk1: p1 p2 +[ 3.865735] tvp5158 1-0058: Unable to of_probe +[ 3.904178] EXT4-fs (mmcblk1p2): couldn't mount as ext3 due to feature incompatibilities +[ 3.913071] EXT4-fs (mmcblk1p2): couldn't mount as ext2 due to feature incompatibilities +[ 3.960372] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.968544] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 3.978956] devtmpfs: mounted +[ 3.982142] Freeing unused kernel memory: 340K +[ 3.986623] This architecture does not have kernel memory protection. +[ 4.242132] systemd[1]: System time before build time, advancing clock. +[ 4.282332] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 4.295484] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 4.307230] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 4.325778] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 4.354679] systemd[1]: Set hostname to . +[ 4.415410] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 25 bits of entropy available) +[ 4.453197] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 26 bits of entropy available) +[ 4.464527] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 26 bits of entropy available) +[ 4.481575] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.494854] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 4.597439] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 4.606960] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 4.616852] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 5.057244] systemd[1]: alignment.service: Found ordering cycle on alignment.service/start +[ 5.065611] systemd[1]: alignment.service: Found dependency on sysinit.target/start +[ 5.073307] systemd[1]: alignment.service: Found dependency on alignment.service/start +[ 5.081346] systemd[1]: alignment.service: Breaking ordering cycle by deleting job alignment.service/start +[ 5.091080] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with alignment.service/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 5.125511] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 5.153758] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 5.198332] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 5.234793] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 5.263747] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 5.293653] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 5.313536] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 5.333615] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 5.363546] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 5.393543] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 5.413606] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 5.444098] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 5.474172] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 5.503553] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 5.524080] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 5.553649] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 5.613776] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 5.656209] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 5.694049] systemd[1]: Mounting Temporary Directory... +[ 5.700267] CMEMK module: reference Linux version 4.4.84 +[ 5.706777] no physical memory specified +[ 5.710748] cmemk initialized + Mounting Temporary Directory... +[ 5.735761] systemd[1]: Mounting POSIX Message Queue File System... +[ 5.742633] cryptodev: driver 1.8 loaded. + Mounting POSIX Message Queue File System... +[ 5.775875] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 5.805835] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 5.835719] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 5.852781] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 5.865738] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 5.893954] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 5.947950] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 5.973694] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 5.993584] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 6.013779] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Load Kernel Modules. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Setup Virtual Console. + Starting udev Coldplug all Devices... + Starting Create Static Device Nodes in /dev... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ 6.653898] systemd-journald[127]: Received request to flush runtime journal from PID 1 + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started udev Coldplug all Devices. +[ 7.003069] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 7.025803] remoteproc0: 58820000.ipu is available +[ 7.030729] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 7.064862] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.076761] tvp5158 1-0058: Unable to of_probe +[ 7.081803] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 +[ 7.092530] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 7.102131] remoteproc0: failed to load dra7-ipu1-fw.xem4 +[ 7.107814] remoteproc1: 55020000.ipu is available +[ 7.114290] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 7.124574] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Load/Save Random Seed... +[ 7.150172] tvp5158 1-0058: Unable to of_probe +[ 7.157696] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 7.182166] remoteproc2: 40800000.dsp is available +[ 7.187332] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ OK ] Reached target Local File Systems. +[ 7.212707] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.236415] remoteproc2: Direct firmware load for dra7-dsp1-fw.xe66 failed with error -2 +[ 7.246209] tvp5158 1-0058: Unable to of_probe +[ 7.252682] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 7.268839] remoteproc2: failed to load dra7-dsp1-fw.xe66 +[ 7.279691] remoteproc3: 41000000.dsp is available +[ 7.284681] remoteproc3: Note: remoteproc is still under development and considered experimental. +[ 7.294602] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. + Starting Create Volatile Files and Directories... +[ 7.317897] remoteproc3: Direct firmware load for dra7-dsp2-fw.xe66 failed with error -2 +[ 7.329149] tvp5158 1-0058: Unable to of_probe +[ 7.329756] remoteproc3: failed to load dra7-dsp2-fw.xe66 +[ OK [ 7.412131] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +] Started Load/Save Random Seed.[ 7.424091] tvp5158 1-0058: Unable to of_probe + +[ OK ] Started Create Volatile Files and Directories. +[ 7.442996] remoteproc1: registered virtio0 (type 7) +[ 7.456358] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ OK ] Found device /dev/ttyS0. +[ 7.526794] tvp5158 1-0058: Unable to of_probe +[ 7.531693] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 7.548323] tvp5158 1-0058: Unable to of_probe +[ 7.653846] SCSI subsystem initialized + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ 7.729808] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 7.752846] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.775572] CAN device driver interface +[ 7.814194] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ OK ] Started Network Time Synchronization. +[ 7.867112] scsi host0: ahci +[ 7.870321] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 345 +[ 7.899230] tvp5158 1-0058: Unable to of_probe +[ 7.904564] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 7.914460] tvp5158 1-0058: Unable t of_probe +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ 7.930073] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 + Starting Synchronize System and HW clocks... +[ 8.052277] tvp5158 1-0058: Unable to of_probe +[ 8.057530] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ OK ] Reached target System Time Synchronized. +[ 8.09851] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.098609] tvp5158 1-0058: Unable to of_probe +[ 8.109472] tvp5158 1-0058: Unable to of_probe +[ 8.116225] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=365) +[ OK ] Started Synchronize System and HW clocks. +[ 8.137850] tvp5158 1-0058: Unable to of_probe +[ 8.178797] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 8.190128] tvp5158 1-0058: Unable to of_probe +[ 8.228141] tvp5158 1-0058: Unable to of_probe +[ 8.237494] ata1: SATA link down (SStatus 0 SControl 300) +[ OK ] Reached target Sound Card. +[ OK ] Reached target System Initialization. +[ OK ] Listening on dropbear.socket. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started D-Bus System Message Bus. +[ 8.783212] remoteproc1: powering up 55020000.ipu +[ 8.812642] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3743164 +[ 8.822921] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 8.882390] remoteproc1: remote processor 55020000.ipu is now up +[ 8.889239] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 8.892395] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x65 +[ 8.893278] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x66 +[ 8.909895] tvp5158 1-0058: Unable to of_probe + Starting Login Service... +[ 8.940599] rpmsg_rpc rpmsg0: probing service dce-callback with src 1024 dst 101 +[ 8.949916] tvp5158 1-0058: Unable to of_probe +[ 8.954447] rpmsg_rpc rpmsg0: published functions = 4 +[ 8.959714] rpmsg_rpc rpmsg1: probing service rpmsg-dce with src 1025 dst 102 +[ 8.967588] tvp5158 1-0058: Unable to of_probe +[ 8.967854] rpmsg_rpc rpmsg1: published functions = 9 + Starting rc.pvr.service... +[ 9.053174] tvp5158 1-0058: Unable to of_probe +[ OK ] Started System Logging Service. + Starting Save/Restore Sound Card State... +[ 9.109947] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] + Starting Permit User Sessions... + Starting Network Service... +[ OK ] Started Kernel Logging Service. +[ OK ] Started rc.pvr.service. +[ OK ] Started Save/Restore Sound Card State.[ 9.234540] net eth1: initializing cpsw version 1.15 (0) + +[ OK ] Started Permit User Sessions.[ 9.256580] net eth0: initialized cpsw ale version 1.4 + +[ 9.270118] net eth0: ALE Table size 1024 +[ OK ] Started Network Service.[ 9.285115] tvp5158 1-0058: Unable to of_probe + +[ 9.294895] net eth1: phy found : id is : 0x20005c7a +[ 9.316457] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 9.331714] net eth0: initializing cpsw version 1.15 (0) +[ 9.337321] tvp5158 1-0058: Unable to of_probe +[ 9.362154] tvp5158 1-0058: Unable to of_probe +[ 9.380286] usbcore: registered new interface driver usbfs +[ 9.390579] net eth0: phy found : id is : 0x20005c7a +[ 9.402262] usbcore: registered new interface driver hub +[ 9.420634] usbcore: registered new device driver usb +[ 9.433402] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 9.460494] dwc3 48890000.usb: otg: primary host xhci-hcd.1.auto registered +[ 9.468221] dwc3 48890000.usb: otg: shared host xhci-hcd.1.auto registered +[ 9.477038] dwc3 48890000.usb: otg: can't start till gadget registers +[ 9.484930] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 9.485066] tvp5158 1-0058: Unable to of_probe +[ 9.496967] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[ 9.505873] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 9.515522] xhci-hcd xhci-hcd.2.auto: irq 511, io mem 0x488d0000 +[ 9.522171] hub 1-0:1.0: USB hub found +[ 9.527841] hub 1-0:1.0: 1 port detected +[ 9.532100] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 9.532127] tvp5158 1-0058: Unable to of_probe +[ 9.545343] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[ 9.553097] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 9.563180] hub 2-0:1.0: USB hub found +[ 9.567956] hub 2-0:1.0: 1 port detected +[ 9.572224] tvp5158 1-0058: Unable to of_probe +[ 9.578195] tvp5158 1-0058: Unable to of_probe +[ OK ] Started Login Service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. + Starting weston.service... +[ OK ] Started Network Name Resolution. +[ OK ] Started weston.service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. +[ 11.859928] random: nonblocking pool is initialized + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# reboot +[ OK ] Stopped target System Time Synchronized. + Stopping Network Time Synchronization... +[ OK ] Stopped target Sound Card. +[ OK ] Stopped target Multi-User System. + Stopping Network Name Resolution... + Starting Update UT Stopping Session c1 of user root. + Stopping System Logging Service... +[ OK ] Stopped target Login Prompts. +[ OK ] Stopped Serial Getty on ttyO0. + Stopping Kernel Logging Service... + Unmounting /run/media/mmcblk1p1... +[ OK ] Closed Load/Save RF Kill Switch Status /dev/rfkill Watch. + Unmounting /run/user/0... + Stopping telnetd.service... + Stopping Getty on tty1... +[ OK ] Stopped target Timers. +[ OK ] Stopped Daily Cleanup of Temporary Directories. + Stopping Serial Getty on ttyS0... + Stopping tiipclad-daemon.service... + Stopping Save/Restore Sound Card State... + Stopping User Manager for UID 0... +[ OK ] Stopped Network Time Synchronization. +[ OK ] Stopped System Logging Service. +[ OK ] Stopped Kernel Logging Service. +[ OK ] Stopped Network Name Resolution. +[ OK ] Stopped Getty on tty1. +[ OK ] Stopped Serial Getty on ttyS0. +[ OK ] Started Update UTMP about System Runlevel Changes. +[ OK ] Removed slice system-serial\x2dgetty.slice. +[ OK ] Removed slice system-getty.slice. +[ OK ] Stopped target Network. + Stopping Network Service... +[ OK ] Stopped Network Service. +[ OK ] Stopped Apply Kernel Variables. +[ OK ] Stopped Load Kernel Modules. + Stopping D-Bus System Message Bus... +[ OK ] Stopped D-Bus System Message Bus. +[ OK ] Stopped Session c1 of user root. +[ OK ] Unmounted /run/media/mmcblk1p1. +[ OK ] Stopped User Manager for UID 0. +[FAILED] Failed unmounting /run/user/0. +[ OK ] Stopped telnetd.service. +[ OK ] Stopped tiipclad-daemon.service. + Stopping weston.service... +[ OK ] Stopped target Local File Systems (Pre). +[ OK ] Stopped Remount Root and Kernel File Systems. +[ OK ] Removed slice User Slice of root. + Stopping Login Service... + Stopping Permit User Sessions... +[ OK ] Stopped Login Service. +[ OK ] Stopped weston.service. +[ OK ] Stopped Permit User Sessions. +[ OK ] Stopped target Remote File Systems. + Stopping rc.pvr.service... +[ OK ] Stopped rc.pvr.service. +[ OK ] Stopped Save/Restore Sound Card State. +[ OK ] Stopped target Basic System. +[ OK ] Stopped target Slices. +[ OK ] Removed slice User and Session Slice. +[ OK ] Stopped target Sockets. +[ OK ] Closed D-Bus System Message Bus Socket. +[ OK ] Closed dropbear.socket. +[ OK ] Closed Syslog Socket. +[ OK ] Stopped target Paths. +[ OK ] Stopped Forward Password Requests to Wall Directory Watch. +[ OK ] Reached target Shutdown. + Unmounting Temporary Directory... +[FAILED] Failed unmounting Temporary Directory. +[ OK ] Reached target Unmount All Filesystems. +[ OK ] Reached target Final Step. + Starting Reboot... +[ 37.674824] watchdog watchdog0: watchdog did not stop! +[ 38.181632] systemd-shutdown[1]: Sending SIGTERM to remaining processes... +[ 38.205833] systemd-journald[127]: Received SIGTERM from PID 1 (systemd-shutdow). +[ 38.346515] systemd-shutdown[1]: Sending SIGKILL to remaining processes... +[ 38.370746] systemd-shutdown[1]: Hardware watchdog 'OMAP Watchdog', version 0 +[ 38.379442] systemd-shutdown[1]: Unmounting file systems. +[ 38.391524] systemd-shutdown[1]: Remounting '/run/user/0' read-only with options 'size=101980k,mode=700'. +[ 38.401255] systemd-shutdown[1]: Unmounting /run/user/0. +[ 38.433586] systemd-shutdown[1]: Remounting '/var/volatile' read-only with options 'size=51200k'. +[ 38.442538] systemd-shutdown[1]: Unmounting /var/volatile. +[ 38.473505] systemd-shutdown[1]: Remounting '/media/ram' read-only with options 'size=16384k'. +[ 38.482202] systemd-shutdown[1]: Unmounting /media/ram. +[ 38.513427] systemd-shutdown[1]: Remounting '/tmp' read-only with options ''. +[ 38.520639] systemd-shutdown[1]: Unmounting /tmp. +[ 38.563521] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 45.182324] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 45.191222] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 45.199280] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 45.205304] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 45.213291] EXT4-fs (mmcblk1p2): re-mounted. Opts: data=ordered +[ 45.219361] systemd-shutdown[1]: All filesystems unmounted. +[ 45.224984] systemd-shutdown[1]: Deactivating swaps. +[ 45.230140] systemd-shutdown[1]: All swaps deactivated. +[ 45.235448] systemd-shutdown[1]: Detaching loop devices. +[ 45.247241] systemd-shutdown[1]: All loop devices detached. +[ 45.252854] systemd-shutdown[1]: Detaching DM devices. +[ 45.258375] systemd-shutdown[1]: All DM devices detached. +[ 45.275941] systemd-shutdown[1]: Rebooting. +[ 45.315620] reboot: Restarting system + +Hi We have validated reboot command on DRA76x, DRA75x, DRA72x as part of the release checkout from Vision SDK 3.05 release onwards. Would it be possible for you to try on some other board + +Hi do you have further updates , have you been able to verify the behavior on another . Please post back if your issue is still not resolved + diff --git a/data2/text/range/30001+/778002.txt b/data2/text/range/30001+/778002.txt new file mode 100644 index 0000000000000000000000000000000000000000..470bad9c27420281529ee69cf72facceee951590 --- /dev/null +++ b/data2/text/range/30001+/778002.txt @@ -0,0 +1,354 @@ +Ticket Name: Linux/TDA2PXEVM: How to enable IPUMM with IPUMM and VSDK-Linux on IPU-2 + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi, I manage to enable GST encode/decode based on IPUMM for VSDK 3.05. According to <>, there are two options to enable IPUMM. 1. IPUMM on VSDK-Linux and IPU-1 as primary IPU for Vision-SDK Per the instructions in the guide, It works fine for me. 2. IPUMM and VSDK-Linux on IPU-2 But for the option 2, I still cannot figure it out. I follow section 2.4.2.2 to prepare ipumm, Codec Engine and Framework components. IVAHD is set to no in the corresponding cfg.mk. Whether or not to enbable IPUMM in the same file, I always encounter assert failure with the resultant apps.out launch. Please help if something is missing. Thanks! Regards, Simon [HOST] [HOST ] 3151.468401 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 3151.468492 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 3151.468614 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 3151.468706 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 3151.468797 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 3151.468889 s: SGXFRMCPY_0 : Init done - linkid-0x2000046 [HOST] [HOST ] 3151.468980 s: ZMCAMERA_0 : Init done - linkid-0x2000066 [HOST] [HOST ] 3151.469072 s: ZMOutput_0 : Init done - linkid-0x2000067 [HOST] [HOST ] 3151.469102 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 3151.469163 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! [HOST] [HOST ] 3151.469163 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! [HOST] [HOST ] 3151.469163 s: SYSTEM: System A15 Init Done !!! [HOST] [HOST ] 3151.469316 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! [HOST] [HOST ] 3151.469316 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! [HOST] [HOST ] 3151.469316 s: NETWORK_CTRL: Starting Server (port=5000) !!! [HOST] [HOST ] 3151.469377 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! ASSERT (chains_common.c|ChainsCommon_appCtrlCommonInit|296) + +Responses: +Hi, Have you revert the changes done in dts file in step1? And also share your complete log for running apps.out. Regards, Anuj + +Hi Anuj, Thanks for your support. Yes, I have reverted the dts change. I will double check it. And log for running apps.out is attached for your reference. Regards, Simon ipumm.log =~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2019.03.01 13:38:51 =~=~=~=~=~=~=~=~=~=~=~= + +root@dra7xx-evm:/opt/vision_sdk# ls ls +FragShader.fsh apps.out enableImx290.sh load_ocl_kos.sh ov106x3Config.sh vision_sdk_load.sh +FragShader3Dsfm.fsh bin enableIpu2CCSConectivity.sh memcache_load.sh pvrscope vision_sdk_ov490_pinmux.sh +VertShader.vsh car.pod gpufifo memcache_unload.sh setupUltrasonicPinMux.sh vision_sdk_unload.sh +VertShader3Dsfm.vsh cmemk.ko hdmiReceiverConfig.sh models tda2exEnableAVB.sh +VipClockInversion.sh disableDssInterruptsOnA15.sh jeep2.bmp opencl_env.sh ub964Init.sh +root@dra7xx-evm:/opt/vision_sdk# ./vision_sdk_load.sh [ 87.304820] random: nonblocking pool is initialized + +[ 87.346757] DMA: Module install successful, device major num = 241 +[ 87.353059] DRV: Module install successful +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +Error: I2C Read failed +Error: I2C Read failed +Error: I2C Read failed +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + +### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! +No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + +### WARNING ###: use the following I2C [read | write] commands at your own risk! +No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# ls ./vision_sdk_ ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6988000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d88000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3cc8000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3d08000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 103.668425 s: SYSTEM: System A15 Init in progress !!! + [HOST] [HOST ] 103.668517 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 103.668547 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 103.671536 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 103.671567 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 103.671597 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 103.671597 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1026) !!! + [HOST] [HOST ] 103.674220 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) + [HOST] [HOST ] 103.674220 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 103.674251 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) + [HOST] [HOST ] 103.674251 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 103.676874 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) + [HOST] [HOST ] 103.676904 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 103.676935 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) + [HOST] [HOST ] 103.676935 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 103.677118 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 103.677118 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 103.677240 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 103.677240 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 103.677240 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 103.677362 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 103.677484 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 103.677606 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 103.677728 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 103.677819 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 103.677941 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 103.678094 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 103.678216 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 103.678307 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 103.678429 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [DSP1 ] _;o~{Ol{uo-;]/}{OoL>~_~[s_wsvOp{ypFouo[6wu|5|q;Sko*w?]{~_fVz3?a{~{Ow.{g{_]k~}oOs?3[}uy/i~=}?}_=={y}ukv~o?z5^_;^O + [HOST] [DSP1 ] _O_?r?Bw_\w[~?_vzj_>|wt^g~=/^~jz?zc~}k}?\vynO{7~{]]yw_o}zU?n?zw{;;mk}on?]~v+O}|__o?}{_~?_Zon{8G�?r{)o>>{?s7GwM_oww~t}ggo~ + [HOST] [DSP1 ] ~7 + [HOST] [DSP2 ] K?gw~?~_~{?~?ys}~}{_+_w~7~}{^zwo_}/w{_wxs_?wu~~_?wwk?w~{{_~??[_k=w}vlwW?>=2~W2}oy|}{<{_y{_O}}o__?u=w{}o]s?>?} + [HOST] [DSP2 ] ~[?o + [HOST] [DSP2 ] [m}n~>}oJ?K;}{on{K{o_yww{iww}{f~6>][wL_wWw~W}~76W{yK&wsu?w??k_N^g;?y=^9{ + [HOST] [EVE1 ] 5^?_jOoy~~{_wwnsws!?[ox7~o{Z~W{kyOs~wo:{~?;zsk}{}{?_?G}nV?}/go/}o}?\wym^}{~\5_?wwim_ww{w]?ooknQ}w~>Ovlogyg}m?[gr} + [HOST] [EVE1 ] _WmO?t~{}_;~}oY{guw}{~^.n?{{|y}{>}w_r~\mwNRoUVN|?{n_K=?_w?__i?{}my{?#}?Owv_w~~}~Oo=v + [HOST] [EVE2 ] _}#o_m{o{/u7{f{?:.}sQ6vW/-km}_};w=w}>[ywwyuw{?~__yJovx~w_j<~>o9o<=}w=_w;}{voW{r_zy_q75]?M}o.}_z?9w#^s{}?Y]_~_o}T3__o=w~ + [HOST] [EVE2 ] ?_Vw}zm~vs?{/oW?|/87wwjo6{>_V>vf?in?~~_|?]_ + [HOST] [EVE2 ] ~g[nOw{+{^~.w_9v|:O_ioowv{w}w}^o~^>]~>->+~7/} + [HOST] [IPU2 ] 20.087293 s: + [HOST] [IPU2 ] WARNING: Device Id Does not Match + [HOST] [IPU2 ] 20.108094 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 20.128652 s: + [HOST] [IPU2 ] EVE2 Image Load Completed + [HOST] [IPU2 ] 20.128774 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 20.128835 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 20.130482 s: ***** IPU2 Firmware build time 13:34:20 Feb 28 2019 + [HOST] [IPU2 ] 20.130696 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 20.133471 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 20.143994 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 20.144085 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 20.144146 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 20.146495 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 20.149484 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 20.156865 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [IPU2 ] 20.176935 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [IPU2 ] 20.177026 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 20.177148 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 20.177270 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [IPU2 ] 20.177362 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [IPU2 ] 20.177484 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 20.179161 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 20.180076 s: RpmsgInit in progress... + [HOST] [IPU2 ] 20.180168 s: Connection established with HLOS, calling rpmsgInit + [HOST] [IPU2 ] 20.180473 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 20.185384 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 20.185475 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 20.185536 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 20.185597 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 20.185689 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 20.185841 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 20.185933 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 20.186055 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 20.186116 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 20.186177 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 20.189105 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 20.189227 s: VPDMA Firmware Address = 0xa035b5c0 + [HOST] [IPU2 ] 20.189318 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 20.189440 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 20.189501 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 20.189593 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 20.189928 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 20.190020 s: VPDMA Firmware Address = 0xa035b5c0 + [HOST] [IPU2 ] 20.190111 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 20.190203 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 20.190294 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 20.190386 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 20.190691 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 20.190782 s: VPDMA Firmware Address = 0xa035b5c0 + [HOST] [IPU2 ] 20.190904 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 20.190996 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 20.191087 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 20.191148 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 20.264716 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 20.265601 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 20.265906 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 20.265997 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 41943040 B (40960 KB), Free size = 41876096 B (40894 KB) + [HOST] [IPU2 ] 20.266150 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 20.266302 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 314572800 B (300 MB), Free size = 314572800 B (300 MB) + [HOST] [IPU2 ] 20.266485 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1046656 B (0 MB), Free size = 954496 B (0 MB) + [HOST] [IPU2 ] 20.266638 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 20.474165 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 20.515494 s: CHAINS: Application Started !!! + [HOST] [IPU2 ] 20.528304 s: BOARD: Board Init in progress !!! + [HOST] [IPU2 ] 20.577838 s: BOARD: Board Init Done !!! + [HOST] [IPU2 ] 20.587567 s: + ASSERT (chains_common.c|ChainsCommon_appCtrlCommonInit|296) + [HOST] [HOST ] 103.682394 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 103.682638 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 103.682791 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 103.682913 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 103.683096 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 103.683309 s: DISP_DIST_SRC_0 : Init done - linkid-0x200005e + [HOST] [HOST ] 103.683462 s: DISP_DIST_SRC_1 : Init done - linkid-0x200005f + [HOST] [HOST ] 103.683584 s: DISP_DIST_SRC_2 : Init done - linkid-0x2000060 + [HOST] [HOST ] 103.683706 s: DISP_DIST_SRC_3 : Init done - linkid-0x2000061 + [HOST] [HOST ] 103.683828 s: DISP_DIST_SRC_4 : Init done - linkid-0x2000062 + [HOST] [HOST ] 103.683950 s: DISP_DIST_SRC_5 : Init done - linkid-0x2000063 + [HOST] [HOST ] 103.684072 s: DISP_DIST_SRC_6 : Init done - linkid-0x2000064 + [HOST] [HOST ] 103.684163 s: DISP_DIST_SRC_7 : Init done - linkid-0x2000065 + [HOST] [HOST ] 103.684316 s: SGX3DSRV_0 : Init done - linkid-0x2000047 + [HOST] [HOST ] 103.684468 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 103.684590 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 103.684712 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 103.684804 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 103.684926 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 103.685048 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 103.685170 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 103.685262 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 103.685445 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 103.685628 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 103.685811 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 103.685994 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686238 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686360 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686482 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686604 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686756 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 103.686878 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687031 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687153 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687275 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687397 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687519 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687641 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687763 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687854 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 103.687976 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 103.688068 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 103.688190 s: SGXFRMCPY_0 : Init done - linkid-0x2000046 + [HOST] [HOST ] 103.688281 s: ZMCAMERA_0 : Init done - linkid-0x2000066 + [HOST] [HOST ] 103.688373 s: ZMOutput_0 : Init done - linkid-0x2000067 + [HOST] [HOST ] 103.688373 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 103.688464 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! + [HOST] [HOST ] 103.688464 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! + [HOST] [HOST ] 103.688464 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 103.688617 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 103.688678 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [HOST ] 103.688708 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! + [HOST] [HOST ] 103.688739 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! + +^C +root@dra7xx-evm:/opt/vision_sdk# s ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb697a000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d7a000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3cba000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3cfa000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 158.092173 s: SYSTEM: System A15 Init in progress !!! + [HOST] [HOST ] 158.092264 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 158.092264 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 158.094339 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 158.094369 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 158.094430 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 158.094430 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1026) !!! + [HOST] [HOST ] 158.096047 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) + [HOST] [HOST ] 158.096077 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 158.096108 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) + [HOST] [HOST ] 158.096108 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 158.097755 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) + [HOST] [HOST ] 158.097785 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 158.097785 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) + [HOST] [HOST ] 158.097816 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 158.098029 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 158.098029 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 158.098151 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 158.098182 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 158.098182 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 158.098304 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 158.098426 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 158.098578 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 158.098670 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 158.098792 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 158.098944 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 158.099097 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 158.099188 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 158.099341 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 158.099463 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 158.099554 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 158.099676 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 158.099798 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 158.099890 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 158.100073 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 158.100256 s: DISP_DIST_SRC_0 : Init done - linkid-0x200005e + [HOST] [HOST ] 158.100378 s: DISP_DIST_SRC_1 : Init done - linkid-0x200005f + [HOST] [HOST ] 158.100469 s: DISP_DIST_SRC_2 : Init done - linkid-0x2000060 + [HOST] [HOST ] 158.100591 s: DISP_DIST_SRC_3 : Init done - linkid-0x2000061 + ASSERT (chains_common.c|ChainsCommon_appCtrlCommonInit|296) + [HOST] [HOST ] 158.100683 s: DISP_DIST_SRC_4 : Init done - linkid-0x2000062 + [HOST] [HOST ] 158.100805 s: DISP_DIST_SRC_5 : Init done - linkid-0x2000063 + [HOST] [HOST ] 158.100896 s: DISP_DIST_SRC_6 : Init done - linkid-0x2000064 + [HOST] [HOST ] 158.100988 s: DISP_DIST_SRC_7 : Init done - linkid-0x2000065 + [HOST] [HOST ] 158.101140 s: SGX3DSRV_0 : Init done - linkid-0x2000047 + [HOST] [HOST ] 158.101262 s: ALGORITHM_0 : Init done - linkid-0x2000031 + [HOST] [HOST ] 158.101415 s: ALGORITHM_1 : Init done - linkid-0x2000032 + [HOST] [HOST ] 158.101567 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 158.101689 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 158.101811 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 158.101933 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 158.102055 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 158.102177 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 158.105532 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 158.105746 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 158.105929 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106112 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106264 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106386 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106508 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106630 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106783 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 158.106905 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107027 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107179 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107301 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107423 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107576 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107728 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107820 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 158.107942 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 158.108033 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 158.108186 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 158.108338 s: SGXFRMCPY_0 : Init done - linkid-0x2000046 + [HOST] [HOST ] 158.108491 s: ZMCAMERA_0 : Init done - linkid-0x2000066 + [HOST] [HOST ] 158.108643 s: ZMOutput_0 : Init done - linkid-0x2000067 + [HOST] [HOST ] 158.108643 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 158.108704 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! + [HOST] [HOST ] 158.108735 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! + [HOST] [HOST ] 158.108735 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 158.111877 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 158.111968 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [HOST ] 158.111999 s: SYSTEM: IPC: [IPU1-0] Notify send failed (Socket operation on non-socket, 88) !!! + [HOST] [HOST ] 158.111999 s: SYSTEM: MSGQ: [IPU1-0] MsgQ send failed !!! + +^C + +Hi Anuj, After a clean build, the issue doesn't take place . But for the option 2, 1. without enabling IPUMM in the corresponding cfg.mk, seems /dev/rpmsg-dce is not available in the system image, root@dra7xx-evm:~# ./decode_ipumm.sh Setting pipeline to PAUSED ... Pipeline is PREROLLING ... MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4Redistribute latency... Caught SIGSEGV Pipeline is PREROLLED ... 2. enabling IPUMM in the corresponding cfg.mk, I encounter the following build error. # Compiling generated MAIN_APP_ipu2_pem4.oem4 # Linking into /home/arch/work/tda2p/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4... # "/home/arch/work/tda2p/vision_sdk/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu2/release/vision_sdk_configuro/linker_mod.cmd", line 422: error: program will not fit into available memory. run placement with alignment fails for section ".systemHeap" size 0x2800000 . Available memory ranges: IPU2_DATA_MEM size: 0x1400000 unused: 0x716961 max hole: 0x716948 error: errors encountered during linking; "/home/arch/work/tda2p/tda2x_linux_zadas.video/vision_sdk/binaries/apps/tda2 px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4" not built Please help suggest whether or not IPUMM should be enabled (besides IVAHA is disabled.) and how to solve the build error. Thanks！ Regards, Simon + +Hi Simon, You need to enable IPUMM in your cfg file. To solve issue 2. raised in your previous post, can you make the following change, and let us know if it works? --- a/apps/build/tda2px/mem_segment_definition_linux.xs +++ b/apps/build/tda2px/mem_segment_definition_linux.xs @@ -72,7 +72,7 @@ var ipummSupport = java.lang.System.getenv("IPUMM_INCLUDE"); /* Keep both IPU1 & IPU2 with same code & data sizes, * this allows to select any IPU subsystem as primary IPU core */ IPU2_START_ADDR = 0x99000000; -IPU2_CODE_SIZE = 10*MB; +IPU2_CODE_SIZE = 16*MB; if (ipummSupport == "yes") { IPU2_DATA_SIZE = 60*MB; } Regards Shravan + +Hi Shravan, Even i was facing the same problem. By doing changes mentioned by you, I'm able to resolve "/home/arch/work/tda2p/vision_sdk/binaries/apps/tda2px_evm_linux_all/obj/vision_sdk/tda2px-evm/ipu2/release/vision_sdk_configuro/linker_mod.cmd", line 422: error: program will not fit into available memory. run placement with alignment fails for section ".systemHeap" size 0x2800000 . Available memory ranges: IPU2_DATA_MEM size: 0x1400000 unused: 0x716961 max hole: 0x716948 However, I am still getting below mentioned error g_HDVICP_logTbl /home/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/codecs/framework_components_3_40_02_07/packages/ti/sdo/fc/ires/hdvicp/lib/debug/hdvicp2.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2p x_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_debug.xem4" not built Kindly let me know if this can be resolved? Thanks and regards, Sunil + +Hi Sunil, Please build your system in a release configuration and not debug (set the apps/configs//cfg.mk set PROFILE=release). We don't support IPUMM in VSDK in debug config. Regards Shravan + +Hi Shravan, Thank you for the reply. Even after changing the PROFILE to release mode, I am stilling getting below mentioned error. # Linking into /home/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4... # undefined first referenced symbol in file --------- ---------------- g_HDVICP_logTbl /home/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/codecs/framework_components_3_40_02_07/packages/ti/sdo/fc/ires/hdvicp/lib/debug/hdvicp2.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2p x_evm_linux_all/vision_sdk/bin/tda2px-evm/vision_sdk_ipu2_release.xem4" not built Kindly let me know if anything else has to be modified. Regards, Sunil + +Hi Sunil. Please ensure you have all changes made for including IPUMM. Also please perform a clean build. Regards Shravan + +Hi Shravan, The issue was because of framework components. I installed the framework components required for the IPUMM freshly into a new location and modified the fc_PATH in apps/configs//cfg.mk to the latest path and the error was resolved. Thank you for the support. Regards, Sunil + diff --git a/data2/text/range/30001+/783587.txt b/data2/text/range/30001+/783587.txt new file mode 100644 index 0000000000000000000000000000000000000000..a173c44116a1888308e71bcec085f166f8559dfc --- /dev/null +++ b/data2/text/range/30001+/783587.txt @@ -0,0 +1,720 @@ +Ticket Name: Linux/TDA2PXEVM: It will load EVE fail based on 512MB DDR + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello, We are ready to use EVE, But, after cold reboot, sometimes, it will attach EVE fail, about seventy percent . And then, if we execute reboot command, it will be normal, everytime. On the other hand, we followed the chapter 6.6 of VisionSDK_UserGuide_MemoryMap to change the map to 512MB DDR.Because, Our board's DDR size is only 512MB. Please find the log in the attachment. Thanks Terence add_log_for_eve_attach_fail.log + +Responses: +Hi Terence, I've attached a sample patch we had on TDA2x to enable EVE-1 (and later modified to use EVE-2). Can you apply these patches for TDA2p and let us know your observations? Please enable EVE-2 (instead of EVE-1), and make the board config as tda2p instead of tda2. Regards Shravan TDA2x-Linux-512MB-patch-with-EVE1-and-DSPs.zip + +Hi Shravan, I will try it today. Thanks Terence + +Hi Shravan, After applying your patches, this issue still remain. Please find the log in the attachment. Thanks Terence attach_fail.log [BEGIN] 2019/3/18 19:26:00 +root@dra7xx-evm:/opt/vision_sdk# +U-Boot SPL 2016.05 (Mar 18 2019 - 04:05:43) +DRA762-GP ES1.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +** First descriptor is NOT a primary desc on 1:1 ** +*** Warning - bad CRC, using default environment + +i2c_write: error waiting for data ACK (status=0x116) +i2c_write: error waiting for data ACK (status=0x116) +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - bad CRC, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (root@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #3 SMP PREEMPT Mon Mar 18 04:06:00 PDT 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA762 EVM +[ 0.000000] Reserved memory: OVERLAP DETECTED! +[ 0.000000] vsdk_sr1_mem@86000000 (0x86000000--0x96000000) overlaps with cmem@95400000 (0x95400000--0x95800000) +[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x96000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@98000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x98000000, size 16 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@9A000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9b000000, size 16 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9B000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9c000000, size 16 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9C000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created DMA memory pool at 0x9e000000, size 16 MiB +[ 0.000000] Reserved memory: initialized node cmem@9e000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] cma: Reserved 24 MiB at 0x99800000 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x9fe00000 to fe600000 for dram barrier +[ 0.000000] DRA762 ES1.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @df5c9000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 124288 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=00566269-02 rw rootwait ip=none mem=512M +[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) +[ 0.000000] Memory: 102196K/501760K available (6663K kernel code, 319K rwdata, 2392K rodata, 332K init, 286K bss, 293068K reserved, 106496K cma-reserved, 0K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xe0800000 - 0xff800000 ( 496 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) +[ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) +[ 0.000000] .data : 0xc0934000 - 0xc0983e20 ( 320 kB) +[ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000334] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000342] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000813] Console: colour dummy device 80x30 +[ 0.000833] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000845] pid_max: default: 32768 minimum: 301 +[ 0.000941] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) +[ 0.000952] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) +[ 0.001492] Initializing cgroup subsys io +[ 0.001509] Initializing cgroup subsys memory +[ 0.001532] Initializing cgroup subsys devices +[ 0.001545] Initializing cgroup subsys freezer +[ 0.001556] Initializing cgroup subsys perf_event +[ 0.001567] Initializing cgroup subsys pids +[ 0.001593] CPU: Testing write buffer coherency: ok +[ 0.001796] /cpus/cpu@0 missing clock-frequency property +[ 0.001811] /cpus/cpu@1 missing clock-frequency property +[ 0.001822] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001866] Setting up static identity map for 0x80008340 - 0x800083a0 +[ 0.080088] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080158] Brought up 2 CPUs +[ 0.080170] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080177] CPU: All CPU(s) started in HYP mode. +[ 0.080183] CPU: Virtualization extensions available. +[ 0.081223] devtmpfs: initialized +[ 0.110883] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.111845] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.227195] omap_hwmod: dcan1: _wait_target_disable failed +[ 0.323628] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.323652] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.325807] pinctrl core: initialized pinctrl subsystem +[ 0.326652] NET: Registered protocol family 16 +[ 0.327614] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350198] cpuidle: using governor ladder +[ 0.380225] cpuidle: using governor menu +[ 0.388861] OMAP GPIO hardware version 0.1 +[ 0.393030] GPIO line 161 (radio_rst) hogged as output/low +[ 0.395430] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.419806] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.419816] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420317] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420327] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.420809] OMAP DMA hardware revision 0.0 +[ 0.461597] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462746] edma 43300000.edma: memcpy is disabled +[ 0.467567] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.472220] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.472394] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472563] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472720] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472995] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.473192] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.476242] palmas 0-0058: IRQ missing: skipping irq request +[ 0.490716] palmas 0-0058: Muxing GPIO 51, PWM 0, LED 2 +[ 0.541252] irq: no irq domain found for /ocp/i2c@48070000/tps65917@58 ! +[ 0.541797] pcf857x: probe of 0-0020 failed with error -121 +[ 0.542052] pcf857x: probe of 0-0021 failed with error -121 +[ 0.542278] pcf857x: probe of 0-0026 failed with error -121 +[ 0.542438] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.542854] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.560583] pcf857x: probe of 3-0021 failed with error -121 +[ 0.560621] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz +[ 0.560814] media: Linux media interface: v0.10 +[ 0.560865] Linux video capture interface: v2.00 +[ 0.560904] pps_core: LinuxPPS API ver. 1 registered +[ 0.560911] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.560934] PTP clock support registered +[ 0.560978] EDAC MC: Ver: 3.0.0 +[ 0.561738] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.562038] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.562386] Advanced Linux Sound Architecture Driver Initialized. +[ 0.563238] clocksource: Switched to clocksource arch_sys_counter +[ 0.573561] NET: Registered protocol family 2 +[ 0.574054] TCP established hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.574094] TCP bind hash table entries: 4096 (order: 3, 32768 bytes) +[ 0.574161] TCP: Hash tables configured (established 4096 bind 4096) +[ 0.574198] UDP hash table entries: 256 (order: 1, 8192 bytes) +[ 0.574219] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) +[ 0.574407] NET: Registered protocol family 1 +[ 0.574666] RPC: Registered named UNIX socket transport module. +[ 0.574674] RPC: Registered udp transport module. +[ 0.574681] RPC: Registered tcp transport module. +[ 0.574687] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.575672] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.584725] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.585360] NFS: Registering the id_resolver key type +[ 0.585388] Key type id_resolver registered +[ 0.585396] Key type id_legacy registered +[ 0.585462] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.586862] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.586882] io scheduler noop registered +[ 0.586893] io scheduler deadline registered +[ 0.586924] io scheduler cfq registered (default) +[ 0.589308] vsys_5v0: supplied by vsys_12v0 +[ 0.589354] ldo3: supplied by vsys_5v0 +[ 0.593000] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.596306] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.596318] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.596351] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.596373] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.626103] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.626268] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.626282] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.626292] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.626302] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.626709] PCI: bus0: Fast back to back transfers disabled +[ 0.626832] PCI: bus1: Fast back to back transfers enabled +[ 0.626913] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.626928] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.626941] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.627160] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.687228] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.690587] console [ttyS0] disabled +[ 0.690640] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.719112] console [ttyS0] enabled +[ 1.723520] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.733207] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.742858] 4ae2b000.serial: ttyS9 at MMIO 0x4ae2b000 (irq = 304, base_baud = 3000000) is a 8250 +[ 1.752909] [drm] Initialized drm 1.1.0 20060810 +[ 1.758452] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.765137] [drm] No driver support for vblank timestamp query. +[ 1.771263] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.784307] loop: module loaded +[ 1.790136] vmemexp device MAJOR num = 245 +[ 1.794282] vmemexp class registered +[ 1.797993] /dev/vmemexp device registered +[ 1.802107] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.810390] m25p80 spi32766.0: unrecognized JEDEC id bytes: 00, 0, 0 +[ 1.818086] libphy: Fixed MDIO Bus: probed +[ 1.873269] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.879391] libphy: 48485000.mdio: probed +[ 1.886433] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver RTL9000A Gigabit Ethernet +[ 1.896686] cpsw 48484000.ethernet: Detected MACID = f8:36:9b:97:4f:e8 +[ 1.903347] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.910300] cpsw 48484000.ethernet: cpsw: Detected MACID = f8:36:9b:97:4f:e9 +[ 1.918915] mousedev: PS/2 mouse device common for all mice +[ 1.925151] i2c /dev entries driver +[ 1.933861] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.938690] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode +[ 1.945175] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode +[ 1.951557] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode +[ 1.957956] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode +[ 1.964351] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode +[ 1.970980] vsys_3v3: supplied by vsys_12v0 +[ 1.975249] vio_3v3: supplied by vsys_3v3 +[ 1.979307] vio_3v3_sd: supplied by vio_3v3 +[ 1.983832] ldo4: supplied by vsys_5v0 +[ 2.033729] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.040114] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.063413] smps5: supplied by vsys_3v3 +[ 2.067457] vio_1v8: supplied by smps5 +[ 2.124084] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.136668] hwspinlock_user gatemp: requested 20 hwspinlocks +[ 2.143635] aic_dvdd: supplied by vio_3v3 +[ 2.148904] davinci-mcasp 48464000.mcasp: DAI is shared +[ 2.155030] davinci-mcasp 48474000.mcasp: DAI is shared +[ 2.161508] NET: Registered protocol family 10 +[ 2.176853] sit: IPv6 over IPv4 tunneling driver +[ 2.182032] NET: Registered protocol family 17 +[ 2.186750] Key type dns_resolver registered +[ 2.191147] omap_voltage_late_init: Voltage driver support not added +[ 2.198035] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.204256] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.210537] buck10: supplied by vsys_3v3 +[ 2.215106] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.221314] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.229445] Power Management for TI OMAP4+ devices. +[ 2.234501] Registering SWP/SWPB emulation handler +[ 2.240100] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.247140] dmm 4e000000.dmm: initialized all PAT entries +[ 2.253133] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.270324] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.279664] hctosys: unable to open rtc device (rtc0) +[ 2.291676] aic_dvdd: disabling +[ 2.295027] ALSA device list: +[ 2.298003] #0: DRA7xx-EVM +[ 2.298786] mmc0: host does not support reading read-only switch, assuming write-enable +[ 2.298842] mmc0: new SDHC card at address 0001 +[ 2.309172] mmcblk0: mmc0:0001 SD8GB 7.28 GiB +[ 2.314469] mmcblk0: p1 p2 +[ 2.322235] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 2.330966] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 2.356920] mmc1: MAN_BKOPS_EN bit is not set +[ 2.369930] mmc1: new HS200 MMC card at address 0001 +[ 2.375211] mmcblk1: mmc1:0001 DG4008 7.28 GiB +[ 2.379868] mmcblk1boot0: mmc1:0001 DG4008 partition 1 4.00 MiB +[ 2.385941] mmcblk1boot1: mmc1:0001 DG4008 partition 2 4.00 MiB +[ 2.740269] EXT4-fs (mmcblk0p2): recovery complete +[ 2.748229] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.756401] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 2.766390] devtmpfs: mounted +[ 2.769552] Freeing unused kernel memory: 332K +[ 2.774028] This architecture does not have kernel memory protection. +[ 3.137322] systemd[1]: System time before build time, advancing clock. +[ 3.198607] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +[ 3.211988] random: systemd: uninitialized urandom read (16 bytes read, 17 bits of entropy available) +CCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.246898] systemd[1]: Detected architecture arm. + +Welcome to Arago 2016.12! + +[ 3.274725] systemd[1]: Set hostname to . +[ 3.344354] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 3.384595] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.391898] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.398369] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) +[ 3.414756] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 20 bits of entropy available) +[ 3.546233] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.555733] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 3.565755] random: systemd: uninitialized urandom read (16 bytes read, 22 bits of entropy available) +[ 4.040714] systemd[1]: basic.target: Found ordering cycle on basic.target/start +[ 4.048227] systemd[1]: basic.target: Found dependency on sysinit.target/start +[ 4.055521] systemd[1]: basic.target: Found dependency on alignment.service/start +[ 4.063042] systemd[1]: basic.target: Found dependency on basic.target/start +[ 4.070182] systemd[1]: basic.target: Breaking ordering cycle by deleting job alignment.service/start +[ 4.079462] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with basic.target/start +[ SKIP ] Ordering cycle found, skipping alignment.service +[ 4.115487] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 4.143582] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ 4.173523] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.203641] systemd[1]: Listening on Network Service Netlink Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ 4.233499] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 4.280029] systemd[1]: Listening on Journal Socket. +[ OK ] Listening on Journal Socket. +[ 4.306479] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 4.333471] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 4.353425] systemd[1]: Reached target Swap. +[ OK ] Reached target Swap. +[ 4.373999] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.433577] systemd[1]: Starting Create list of required static device nodes for the current kernel... + Starting Create list of required st... nodes for the current kernel... +[ 4.465612] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 4.480504] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.533586] systemd[1]: Starting Journal Service... + Starting Journal Service... +[ 4.561123] systemd[1]: Mounting Temporary Directory... + Mounting Temporary Directory... +[ 4.594225] systemd[1]: Created slice system-getty.slice. +[ OK ] Created slice system-getty.slice. +[ 4.653437] systemd[1]: Mounting Debug File System... + Mounting Debug File System... +[ 4.673548] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.693526] systemd[1]: Reached target Slices. +[ OK ] Reached target Slices. +[ 4.715550] systemd[1]: Starting Setup Virtual Console... + Starting Setup Virtual Console... +[ 4.743680] systemd[1]: Reached target Remote File Systems. +[ OK ] Reached target Remote File Systems. +[ 4.793614] systemd[1]: Starting Load Kernel Modules... + Starting Load Kernel Modules... +[ 4.825605] systemd[1]: Starting Remount Root and Kernel File Systems... + Starting Remount Root and Kernel File Systems... +[ 4.844106] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 4.853612] systemd[1]: Listening on udev Kernel Socket. +[ OK ] Listening on udev Kernel Socket. +[ 4.873695] systemd[1]: Reached target Paths. +[ OK ] Reached target Paths. +[ 4.928245] systemd[1]: Mounted Debug File System. +[ OK ] Mounted Debug File System. +[ 4.953556] systemd[1]: Mounted POSIX Message Queue File System. +[ OK ] Mounted POSIX Message Queue File System. +[ 4.983471] systemd[1]: Mounted Temporary Directory. +[ OK ] Mounted Temporary Directory. +[ 5.003679] systemd[1]: Started Journal Service. +[ OK ] Started Journal Service. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Apply Kernel Variables... + Starting Create Static Device Nodes in /dev... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Apply Kernel Variables. +[ 5.599567] systemd-journald[115]: Received request to flush runtime journal from PID 1 +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started Create Static Device Nodes in /dev. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started udev Coldplug all Devices. +[ 6.086209] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@98000000 +[ OK ] Found device /dev/ttyS0.[ 6.097119] remoteproc0: 55020000.ipu is available + + Starting Load/Save Random Seed...[ 6.132118] remoteproc0: Note: remoteproc is still under development and considered experimental. + +[ 6.150151] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ 6.198880] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@9A000000 +[ OK ] Started Load/Save Random Seed. +[ 6.229163] remoteproc1: 40800000.dsp is available +[ 6.245045] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.259317] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.272597] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 6.292157] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ OK ] Started Create Volatile Files and Directories. +[ 6.378510] remoteproc1: registered virtio0 (type 7) + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ 6.584657] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 6.591883] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 6.669560] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ OK ] Reached target Sound Card. +[ OK ] Started Network Time Synchronization. + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[FAILED] Failed to start Synchronize System and HW clocks. +See 'systemctl status sync-clocks.service' for details. +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ 9.076604] remoteproc0: registered virtio1 (type 7) +[ 9.091348] SCSI subsystem initialized +[ 9.107855] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. + Starting Permit User Sessions... + Starting Login Service... +[ OK ] Started Kernel Logging Service. +[ OK ] Started D-Bus System Message Bus. +[ 9.498387] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 9.507623] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 9.520178] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 9.531137] scsi host0: ahci +[ 9.537260] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 + Starting rc.pvr.service... + Starting Save/Restore Sound Card State... + Starting Network Service... +[ 9.893296] ata1: SATA link down (SStatus 0 SControl 300) +[ 9.902150] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ OK ] Started System Logging Service. +[ OK ] Started Permit User Sessions. +[ OK ] Started Save/Restore Sound Card State.[ 9.966617] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] + +[ 9.974814] net eth1: initializing cpsw version 1.15 (0) +[ 9.984840] net eth0: initialized cpsw ale version 1.4 +[ 9.992690] net eth0: ALE Table size 1024 +[ 10.002579] libphy: PHY 48485000.mdio:03 not found +[ OK ] Started Network Service.[ 10.010660] net eth1: phy "48485000.mdio:03" not found on slave 1, err -19 + +[ 10.051120] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 10.074196] net eth0: initializing cpsw version 1.15 (0) +[ 10.102595] remoteproc1: powering up 40800000.dsp +[ 10.108260] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 619641 +[ 10.123320] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 10.129204] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 10.135139] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 10.155438] remoteproc1: remote processor 40800000.dsp is now up +[ 10.161862] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 10.170115] remoteproc0: powering up 55020000.ipu +[ 10.187059] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 7778556 +[ 10.194063] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ OK ] Started rc.pvr.service. +[ 10.225050] remoteproc0: remote processor 55020000.ipu is now up +[ 10.232698] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 10.255220] net eth0: phy found : id is : 0x1ccb00 +[ 10.265317] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ OK ] Started Login Service. + Starting weston.service... + Starting LSB: Dropbear Secure Shell server... +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Started weston.service. +[ OK ] Started LSB: Dropbear Secure Shell server. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started Network Name Resolution. +[ 11.115961] usbcore: registered new interface driver usbfs +[ 11.121919] usbcore: registered new interface driver hub +[ 11.129051] usbcore: registered new device driver usb +[ OK ] Started tiipclad-daemon.service. + Starting ecarxinit.service... +[ OK ] Started ecarxinit.service.[ 11.287926] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller + +[ 11.296021] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 1 +[ 11.306357] xhci-hcd xhci-hcd.2.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 11.316310] xhci-hcd xhci-hcd.2.auto: irq 462, io mem 0x488d0000 +[ 11.323091] hub 1-0:1.0: USB hub found +[ 11.330243] hub 1-0:1.0: 1 port detected +[ 11.338012] xhci-hcd xhci-hcd.2.auto: xHCI Host Controller +[ 11.344913] xhci-hcd xhci-hcd.2.auto: new USB bus registered, assigned bus number 2 +[ 11.352678] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 11.361608] hub 2-0:1.0: USB hub found +[ 11.365519] hub 2-0:1.0: 1 port detected + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# ls +app_apa apps.sh decode_ipumm.sh init-demo.sh vision_pd_mod vision_psld +root@dra7xx-evm:~# +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# ls +FragShader.fsh bin enableIpu2CCSConectivity.sh models vision_sdk_load.sh +FragShader3Dsfm.fsh car.pod gpufifo opencl_env.sh vision_sdk_ov490_pinmux.sh +VertShader.vsh car.rgb hdmiReceiverConfig.sh ov106x3Config.sh vision_sdk_unload.sh +VertShader3Dsfm.vsh car.yuv jeep2.bmp pvrscope +VipClockInversion.sh cmemk.ko load_ocl_kos.sh setupUltrasonicPinMux.sh +apps.out disableDssInterruptsOnA15.sh memcache_load.sh tda2exEnableAVB.sh +avm_qt_app_res enableImx290.sh memcache_unload.sh ub964Init.sh +root@dra7xx-evm:/opt/vision_sdk# source vision_sdk_load.sh +[ 28.055722] DMA: Module install successful, device major num = 242 +[ 28.062186] DRV: Module install successful +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +Error: I2C Read failed +Error: I2C Read failed +Error: I2C Read failed +./disableDssInterruptsOnA15.sh: line 11: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 12: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 13: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 14: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 15: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 16: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 17: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 18: COMMANDS: command not found +./disableDssInterruptsOnA15.sh: line 19: COMMANDS: command not found +updated value is + + +COMMANDS + + ### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! + No address check done, may generate: + - bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read any OMAP memory address (register), given its or as listed in TRM. + + Write at any OMAP memory address (register), given its or as listed in TRM. + + Set bit at into any OMAP memory address (register), given its or as listed in TRM. + + Clear bit at into any OMAP memory address (register), given its or as listed in TRM. + + Dump a range of OMAP memory addresses, from to . + Note all addresses within given range must be valid and accessible. + + ### WARNING ###: use the following I2C [read | write] commands at your own risk! + No address check done, may generate: + - I2C bus error (invalid or not accessible , + - platform crash/hang (bad ). + + Read I2C register at address from I2C chip at on I2C . + + Write in I2C register at address from I2C chip at on I2C . +root@dra7xx-evm:/opt/vision_sdk# +root@dra7xx-evm:/opt/vision_sdk# +root@dra7xx-evm:/opt/vision_sdk# ./apps.out 4 + [HOST] OSA: MEM: 0: Mapped 0x9fc00000 to 0xb5e35000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x86203000 to 0xa9135000 of size 0x0cd00000 + [HOST] OSA: MEM: 2: Mapped 0x9fd00000 to 0xa9075000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0x9fdc0000 to 0xa90b5000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0x9fd4f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0x9fd769e0 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0x9fdc5b20 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0x9fe63da0 + [HOST] [HOST ] 39.452815 s: SYSTEM: System A15 Init in progress !!! + [HOST] [HOST ] 39.452906 s: OSA_mutexCreate returned with Status = 0 + [HOST] [HOST ] 39.452937 s: OSA_mbxCreate returned with Status = 0 + [HOST] [DSP1 ] 17.607606 s: ***** DSP1 Firmware build time 03:29:59 Mar 18 2019 + [HOST] [DSP1 ] 17.607667 s: *** SYSTEM: CPU Frequency , + [HOST] [DSP1 ] 17.607850 s: SYSTEM: System Common Init in progress !!! + [HOST] [DSP1 ] 17.608003 s: UTILS: CIO: Init Done !!! + [HOST] [DSP1 ] 17.608033 s: SYSTEM: IPC init in progress !!! + [HOST] [DSP1 ] 17.608033 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 17.734002 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [DSP1 ] 18.607850 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 19.607881 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 20.607911 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 21.607942 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 22.607972 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 23.608003 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 24.608033 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 25.608064 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 26.608094 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 27.608094 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 28.608125 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 29.608155 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 30.608186 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 31.608216 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 32.608247 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 33.608277 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 34.608308 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 35.608338 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 36.608338 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 37.608369 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 38.608399 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 17.711431 s: + [HOST] [IPU2 ] WARNING: Device Id Does not Match + [HOST] [IPU2 ] 17.718751 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 17.718873 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 17.719026 s: *** SYSTEM: CPU Frequency , + [HOST] [IPU2 ] 17.721923 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 17.731501 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 17.731592 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 17.731684 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 17.734002 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 18.732324 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 19.732324 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 20.732355 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 21.732385 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 22.732416 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 23.732446 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 24.732477 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 25.732507 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 26.732538 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 27.732568 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 28.732568 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 29.732599 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 30.732629 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 31.732660 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 32.732690 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 33.732721 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 34.732751 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 35.732782 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 36.732812 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 37.732812 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 38.732843 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 39.732873 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 39.608430 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 40.608460 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 40.732904 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 41.608491 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 41.732934 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 42.608521 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 42.732965 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 43.608552 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 43.732995 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 44.608552 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 44.733026 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 45.608582 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 45.733026 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 46.608613 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 46.733056 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [DSP1 ] 47.608643 s: SYSTEM: Attaching to [EVE1] ... + [HOST] [IPU2 ] 47.733087 s: SYSTEM: Attaching to [EVE1] ... + +[END] 2019/3/18 19:26:55 + +Hi Shravan, In your patches, about EVE, the total size of vecs+code+data are over the size reserved in the dts. I don't understand why? Are you sure it is right? Thanks Terence ========================.xs in your patches================================ EVE1_VECS_SIZE = 0.5*MB; EVE1_CODE_SIZE = 2*MB; EVE1_DATA_SIZE = 10.5*MB; EVE2_VECS_SIZE = 0.5*MB; EVE2_CODE_SIZE = 0.5*MB; EVE2_DATA_SIZE = 0.5*MB; EVE3_VECS_SIZE = 0.5*MB; EVE3_CODE_SIZE = 0.5*MB; EVE3_DATA_SIZE = 0.5*MB; EVE4_VECS_SIZE = 0.5*MB; EVE4_CODE_SIZE = 0.5*MB; EVE4_DATA_SIZE = 0.5*MB; =======================.dts in your patches================================= vsdk_eve_mem: vsdk_eve_mem@84000000 { compatible = "shared-dma-pool"; reg = <0x0 0x84000000 0x0 0x1000000>; status = "okay"; }; + +Hi Shravan, Is there any way to resolve this issue? It is still not work on TDA2PX board. Thanks a lot Terence + +Hi Terence, Can you share the following files from Vision-SDK: 1. apps/build/tda2px/mem_segment_definition_linux.xs 2. apps/configs/tda2px_evm_linux_all/cfg.mk 3. links_fw/include/links_api/system_vring_config.h 4. links_fw/src/hlos/osa/include/osa_mem_map.h 5. links_fw/src/rtos/bios_app_common/tda2px/ipu2/gen_system_mem_map.xs 6. links_fw/src/rtos/links_common/system/system_rsc_table_ipu.h 7. links_fw/src/rtos/links_ipu/system/system_bsp_init.c Can you also share dra76-evm-infoadas.dts used. I will rebuild with your config and test it on my EVM. Regards Shravan + +Hi Shravan， Please find files in the attachment. Thanks a lot Terence TDA2PX-Linux-512MB-patch-with-EVE1-and-DSPs.zip + +Hi Shravan, According to local TI employee's suggestion, we change the PROFILE ?= release to PROFILE ?= debug in the cfg.mk. It is normal now for attaching EVE, after cold reboot. We try it 10 times. Do you know why? Thanks a lot terence + +Hi Terence, I tried the changes you suggested, however, it fails at kernel load. Can you please provide the uenv.txt file used? Regards Shravan + +Hi Shravan, Please find the uenv.txt file in the attachment. Thanks Terence 8547.uenv.txt fdtfile=dra76-evm-infoadas.dtb +args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyS9,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=512M" + +Hi Terence, Based on your config I would recommend a couple of debug steps: 1. Modification of memory map config: a) Can you increase the retain the code and data-size provided for the EVEs? Let the EVE_1_CODE_SIZE = 2MB and the EVE1_DATA_SIZE=13.5MB and similarly EVE2_CODE_SIZE=2MB and EVE2_DATA_SIZE=13.5MB. Make the corresponding changes to the Linux DTB too. b) Can you decrease the SR-1 size to 160MB? This will provide you the space you need for increasing the EVE size. 2. Can you add a slight delay before the loading of the EVE firmware: diff --git a/links_fw/src/rtos/utils_common/src/utils_eveloader.c b/links_fw/src/rtos/utils_common/src/utils_eve loader.c index 0a97fa6..83fe882 100644 --- a/links_fw/src/rtos/utils_common/src/utils_eveloader.c +++ b/links_fw/src/rtos/utils_common/src/utils_eveloader.c @@ -135,6 +135,7 @@ void Utils_eveLoaderPrintFxn(const char *message) */ Int32 Utils_eveBoot(void) { + BspOsal_sleep(100 * 1000); // sleep for 100ms before EVE load Int32 retVal = SYSTEM_LINK_STATUS_SOK; UInt32 sblBuildMode = SBLLIB_SBL_BUILD_MODE_PROD; UInt32 oppId = SBLLIB_PRCM_DPLL_OPP_NOM; For all of the above changes, please build with the release config. Regards Shravan + +Hi Shravan, Thanks. Understood. For memory map config you said, we've already started using it, "Let the EVE_1_CODE_SIZE = 2MB and the EVE1_DATA_SIZE=13.5MB and similarly EVE2_CODE_SIZE=2MB and EVE2_DATA_SIZE=13.5MB." The config for TDA2PX I gave you is changed from your TDA2XX config. So, we just need to add the 100ms sleep before EVE load, but it will occur the assertion failure, and can not continue to run. below is the fail log, ====================================================================== root@dra7xx-evm:/opt/vision_sdk# ./apps.out 4 [HOST] OSA: MEM: 0: Mapped 0x9f100000 to 0xb5dde000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x86203000 to 0xac2de000 of size 0x09b00000 [HOST] OSA: MEM: 2: Mapped 0x9f200000 to 0xac21e000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0x9f2c0000 to 0xac25e000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 [HOST] OSA: IPU1-0 Remote Log Shared Memory @ 0x9f200000 [HOST] OSA: HOST Remote Log Shared Memory @ 0x9f24f140 [HOST] OSA: EVE1 Remote Log Shared Memory @ 0x9f2c5b20 [HOST] OSA: EVE2 Remote Log Shared Memory @ 0x9f2ed3c0 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0x9f363da0 [HOST] [IPU1-0] 17.976788 s: ***** IPU1_0 Firmware build time 10:01:16 Apr 2 2019 [HOST] [IPU1-0] 17.976971 s: *** SYSTEM: CPU Frequency , [HOST] [IPU1-0] 17.979564 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU1-0] 17.980601 s: UTILS: CIO: Init Done !!! [HOST] [IPU1-0] 17.980692 s: SYSTEM: IPC init in progress !!! [HOST] [IPU1-0] 17.980753 s: SYSTEM: Attaching to [IPU2] ... [HOST] [IPU1-0] 18.083877 s: ***** tda2px IPU2 Firmware build time 10:01:19 Apr 2 2019 [HOST] [HOST ] 48.605014 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 48.605105 s: OSA_mutexCreate returned with Status = 0 [HOST] [HOST ] 48.605136 s: OSA_mbxCreate returned with Status = 0 [HOST] [IPU2 ] 18.112609 s: [HOST] [IPU2 ] 18.112670 s: ### XDC ASSERT - ERROR CALLBACK START ### [HOST] [IPU2 ] 18.112761 s: [HOST] [IPU2 ] 18.112883 s: assertion failure: A_sleepTaskDisabled: Cannot call Task_sleep() while the Task scheduler is disabled. [HOST] [IPU2 ] 18.112975 s: [HOST] [IPU2 ] 18.113005 s: ### XDC ASSERT - ERROR CALLBACK END ### [HOST] [IPU2 ] 18.113097 s: + +Hi Shravan, Is there any suggestion for this issue? Thanks a lot Terence + +Hi Terence, I notice that the SBL code which loads the EVE is present at 0x98000000. I also notice that the DSP-1 start address is 0x98000000. Can you disable DSP-1 from your build and let us know if it works. If you need DSP-1 can you move the start address of DSP-1 to some other address other than 0x98000000 and give it a try. Please note you need changes both on VSDK and on kernel. Regards Shravan + +Hi Shravan I don't understand your word " the SBL code which loads the EVE is present at 0x98000000 ", I know the ipu2 load the eve, does the SBL code is IPU2 code? Where did you notice it? Thanks a lot Terence + +Hi Terence, The SBL libraries which is compiled as part of the IPU image is loaded at the address 0x98000000. This address is defined in SBL_LIB_APP_IMAGE_DDR_ADDRESS in pdk/packages/ti/boot/sbl_auto/sbl_lib/src/tda2xx/sbl_lib_config_tda2xx.h Can you ensure the address 0x98000000 - 0x99000000 is reserved with no firmware being loaded? Regards Shravan + +Hi Shravan, According to your suggestion, it will still occur this issue, even if not use the address 0x98000000 - 0x99000000 to load firmware. Please find the log in the attachment. Thanks a lot Terence attach_eve_fail.log + +Hi Terence, Can you please share the memory map changes made (in both VSDK and kernel) for moving the address. Regards Shravan + +Hi Shravan, Please find the memory map we used in the attachment. I changed the IPU2 address from 0x98000000 to 0x96000000. I modified four files, include mem_segment_definition_linux.xs, system_vring_config.h, dra76-evm-infoadas.dts, and dra76-evm.dts. Below is the patch for moving the address. --------------------------- mem_segment_definition_linux.xs-------------------------- -IPU2_START_ADDR = 0x98000000; +IPU2_START_ADDR = 0x96000000; --------------------------system_vring_config.h------------------------------------------- #ifdef BUILD_M4_2 -#define IPU_PHYS_MEM_IPC_VRING 0x98000000 +#define IPU_PHYS_MEM_IPC_VRING 0x96000000 #endif ----------------------dra76-evm-infoadas.dts---------------------------------------------- &ipu2_cma_pool { - reg = <0x0 0x98000000 0x0 0x2000000>; + reg = <0x0 0x96000000 0x0 0x2000000>; }; --------------------dra76-evm.dts---------------------------------------------------------------- - ipu2_cma_pool: ipu2_cma@98000000 { + ipu2_cma_pool: ipu2_cma@96000000 { compatible = "shared-dma-pool"; - reg = <0x0 0x98000000 0x0 0x2000000>; + reg = <0x0 0x96000000 0x0 0x2000000>; reusable; status = "okay"; }; ------------------------------------------------------------------------------------------------------- Terence + +Hi Terence, My guess is this is an issue with the timing that EVE-2 firmware is loaded. Can you revert to the older memory map configuration and add the below snippet of code? I wan't to introduce some delay before loading EVE-2. diff --git a/links_fw/src/rtos/utils_common/src/utils_eveloader.c b/links_fw/src/rtos/utils_common/src/utils_eveloader.c index 0a97fa6..fbcde98 100644 --- a/links_fw/src/rtos/utils_common/src/utils_eveloader.c +++ b/links_fw/src/rtos/utils_common/src/utils_eveloader.c @@ -142,7 +142,7 @@ Int32 Utils_eveBoot(void) pmhalPrcmDpllConfig_t *dpllParams; pmhalPrcmSysClkVal_t sysClkFreq = PMHALCMGetSysClockFreqEnum(); sbllibInitParams_t sblInitPrms; - + volatile uint32_t counter =0; /* Default initialization of SBL Lib Params */ SBLLibInitParamsInit(&sblInitPrms); @@ -181,6 +181,10 @@ Int32 Utils_eveBoot(void) SBLLibEVE1BringUp(gUtilsEntryPoints.entryPoint[SBLLIB_CORE_ID_EVE1], sblBuildMode); #endif + while(counter < 100000000) // introduce a delay of about 500ms before loading EVE-2 + counter++; + if(counter > 100000000) + Vps_printf("Counter complete"); #ifdef PROC_EVE2_INCLUDE SBLLibEVE2BringUp(gUtilsEntryPoints.entryPoint[SBLLIB_CORE_ID_EVE2], sblBuildMode); Regards Shravan EDIT: Please add a delay even before loading the EVE image, updated patch below (reduce delay to ~700ms instead of 7s -- 100000000 takes 7s). --- a/links_fw/src/rtos/utils_common/src/utils_eveloader.c +++ b/links_fw/src/rtos/utils_common/src/utils_eveloader.c @@ -142,7 +142,7 @@ Int32 Utils_eveBoot(void) pmhalPrcmDpllConfig_t *dpllParams; pmhalPrcmSysClkVal_t sysClkFreq = PMHALCMGetSysClockFreqEnum(); sbllibInitParams_t sblInitPrms; - + volatile uint32_t counter =0; /* Default initialization of SBL Lib Params */ SBLLibInitParamsInit(&sblInitPrms); @@ -174,13 +174,21 @@ Int32 Utils_eveBoot(void) appImgParams.appImgRPRCHeader = &gUtilsAppRPRCHeader; appImgParams.entryPoints = &gUtilsEntryPoints; appImgParams.skipDDRCopy = 1U; - + while(counter < 1000000) // introduce a delay of about 500ms before loading EVE-2 + counter++; + if(counter > 10000000) + Vps_printf("Counter complete"); + counter=0; Utils_loadAppImage(&appImgParams); + while(counter < 1000000) // introduce a delay of about 500ms before loading EVE-2 + counter++; + if(counter > 10000000) + Vps_printf("Counter complete"); + counter=0; #ifdef PROC_EVE1_INCLUDE SBLLibEVE1BringUp(gUtilsEntryPoints.entryPoint[SBLLIB_CORE_ID_EVE1], sblBuildMode); #endif + while(counter < 1000000) // introduce a delay of about 500ms before loading EVE-2 + counter++; + if(counter > 10000000) + Vps_printf("Counter complete"); + +Hi Shravan, According to your suggestion, to introduce a delay, this issue still remains. On the other hand, in your code, it will never printf "Counter complete". Are you sure the counter need to add 1000000, or 10000000? which will be equal with 700ms,?I guess 10000000, but it still not work. Thanks Terence + +Hi Shravan, If I modified PROFILE ?= debug in the cfg.mk， it will be normal, I said this before. But, I don't know why? Thanks Terence + +Hi Terence, The issue has been identified to be a problem in setting up the EVE-MMU configuration. Can you add the below delay: --- a/links_fw/src/rtos/bios_app_common/tda2px/eve2/src/tlb_config_eve2.c +++ b/links_fw/src/rtos/bios_app_common/tda2px/eve2/src/tlb_config_eve2.c @@ -96,7 +96,11 @@ void eve2MmuConfig(void); */ void eve2MmuConfig(void) { - eveCommonMmuConfig(SOC_EVE_MMU0_BASE); + volatile uint32_t debugWait=0; + while(debugWait < 10000000) + debugWait++; + if(debugWait) + eveCommonMmuConfig(SOC_EVE_MMU0_BASE); + while(debugWait < 20000000) + debugWait++; } If the above still fails, can you continue to build only your EVE firmware in debug mode? Regards Shravan + +Hi Shravan, Thanks a lot. According to your suggestion, I recover the PROFILE ?= releaase in the cfg.mk, and add a delay in EVE-MMU configuration. I try it 10 times, it is normal now. Terence + +Dear Terence. We found EVE2 setup need a little more time. Please help merge attached change and let us know the test result. Thanks a lot 0001-Patch-reserve-time-to-wait-EVE2-MMU-ready.zip yong + diff --git a/data2/text/range/30001+/791141.txt b/data2/text/range/30001+/791141.txt new file mode 100644 index 0000000000000000000000000000000000000000..170c6fdc369222ea1d03ad614ba22f0e02b3fdd2 --- /dev/null +++ b/data2/text/range/30001+/791141.txt @@ -0,0 +1,864 @@ +Ticket Name: TDA2SX: TIDL - Input image file format + +Query Text: +Part Number: TDA2SX Hi everyone, I want to convert one object detection model but it is accepting pixel values as 32-bit floating point format. Up until now I always used 8-bit hex values for representing pixels of input image. Can eve_test_dl_algo.exe application read floating point image when testing conversion? Regards, Sasa + +Responses: +Float input needs to be converted to 8 bit signed/ unsigned by multiplying with a scale. These converted fixed point 8 bit input along with scale can be used for model importing. Refer users guide for more details on setting scale in the config file + +Can you explain me a bit more this one. Are you telling that input sample image have to be 8-bit format and than along with scale it will be transformed via the import tool to floating point format and then used like that as input to model? If this is correct, can you tell me more about scale in config file? I saw question 10 in FAQ section of TIDL user guide but I don't think it is what I need. Regards, Sasa + +Yes sample input shall be 8bit. Scale can be spacifed with "inQuantFactor" with Q8 format in import confgi file. Example, if the sacle 4.5 then the inQuantFactor shall be set as 1147 (4.5*255) + +Thanks Kumar, this seems to solve my problem. Still I have question regrading execution of TIDL usecase on SoC. Do I need to have some conversion of 8-bit input image to floating point in preprocessing phase or conversion has taken care of that and I simply pass 8-bit image and model knows how to deal with it? Regrads, Sasa + +Yes, you can pass 8-bit to TIDL usecase on SoC. TIDL only accepts 8-bit fixed point input + +Problem with usecase is that I am not getting any valid bounding box as output when running model on SoC. Are there some changes that needs to be made to ucescase before running this model? Regards, Sasa + +Did you get right result during the import process? + +Yes. Result of import process is as expected to be. In attachment is config file I am using. 4034.tidl_import_mobileNet1.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 25 +numParamBits = 8 +inElementType = 0 +inQuantFactor = 32512 + +inputNetFile = "../../test/testvecs/models/zf_model/deploy.prototxt" +inputParamsFile = "../../test/testvecs/models/zf_model/deploy_model.caffemodel" +outputNetFile = "../../test/testvecs/output/zf_net.bin" +outputParamsFile = "../../test/testvecs/output/zf_param.bin" + +#preProcType = 4 +rawSampleInData = 1 +sampleInData = "../../test/testvecs/input/zf_300x300_bgr.y" +tidlStatsTool = "../quantStatsTool/eve_test_dl_algo.out.exe" + +Can you try giving the input given to import as input to running model on SoC. Can you make sure you can get the simialr result as import step and then you try with other inputs + +I used the same input image for import process and running model on SoC. It is 8-bit image in BGR planar format. + +May I know which Vision app that you using for running on Soc? + +I am using TIDL usecase from VisionSDK 3.04. NullSrc -> PreprocTIDL -> TIDL -> Null. I made some modifications as original usecase was made for image segmentation. Modifications concern only writing results to file. See function dumpOutCb in attachment file. 0654.chains_tidlGray.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include +#include +#include +#include +#include +//#include +#include +#include "itidl_ti.h" +#include +#include "chains_tidlGray_priv.h" +#include "chains_tidlGray.h" + +//#include + + +/******************************************************************************* + * DEFINES + ******************************************************************************* + */ + +#define TIDL_FILEWRITE_TASK_STACK_SIZE (32 * KB) +#define NUM_OUTPUT_CLASSES (2800) + +/******************************************************************************* + * GLOBALS + ******************************************************************************* + */ + +chains_tidlGrayAppObj gChainsObjTidl; + +//static UInt8 fileWriteTaskStack[TIDL_FILEWRITE_TASK_STACK_SIZE]; + + +static char tidlUseCaseModeMenu[] = { +"\n " +"\n ====================" +"\n Use case Mode" +"\n ====================" +"\n " +"\n 1: Dump Output Frames to file" +"\n 2: Free Run (Output Frames are not dumped)" +"\n " +"\n Enter Choice: " +"\n " +}; + +static char tidlRunTimeMenu[] = { +"\n " +"\n ====================" +"\n Chains Run-time Menu" +"\n ====================" +"\n " +"\n 0: Stop Chain" +"\n " +"\n p: Print Statistics" +"\n " +"\n Enter Choice: " +"\n " +}; + +/******************************************************************************* + * GLOBALS + ******************************************************************************* + */ + +/** + ******************************************************************************* + * + * \brief TIDL Init + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ + +static Void tidlGrayInit(chains_tidlGrayAppObj *pObj) +{ + unsigned int virt_addr; + unsigned int pAlg_virt_addr; + + virt_addr = OSA_memPhys2Virt((unsigned int)&pObj->pAlgCreateParams->net, OSA_MEM_REGION_TYPE_AUTO); + pAlg_virt_addr = OSA_memPhys2Virt((unsigned int)pObj->pAlgCreateParams, OSA_MEM_REGION_TYPE_AUTO); + + /* Read the network file */ + Chains_tidlReadNet((sTIDL_Network_t *)virt_addr, pObj->netFileName); + /* Allocate memory for the net */ + Chains_tidlAllocNetParamsMem((sTIDL_Network_t *)virt_addr); + /* Fill the new parameters */ + Chains_tidlFillNetParamsMem((sTIDL_Network_t *)virt_addr, pObj->paramFileName); + OSA_memCacheWb(pAlg_virt_addr, pAlg_virt_addr+sizeof(TIDL_CreateParams)); + /* Init all the 3 instances of the OCMC */ +// Utils_cbufOcmcInit(UTILS_OCMC_RAM1); +//#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) +// Utils_cbufOcmcInit(UTILS_OCMC_RAM2); +// Utils_cbufOcmcInit(UTILS_OCMC_RAM3); +//#endif +} + +/** + ******************************************************************************* + * + * \brief Deinit TIDL + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +static Void tidlGrayDeInit(chains_tidlGrayAppObj *pObj) +{ + unsigned int virt_addr; + /* Free the net memories */ + virt_addr = OSA_memPhys2Virt((unsigned int)&pObj->pAlgCreateParams->net, OSA_MEM_REGION_TYPE_AUTO); + Chains_tidlFreeNetParamsMem((sTIDL_Network_t *)virt_addr); +} + + +/** + ******************************************************************************* + * + * \brief Parse the TIDL config file + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +static Int32 parseCfg(chains_tidlGrayAppObj *pObj) +{ + Int32 fd; + char string[256U]; + char *pArg, *pVal; + UInt32 numArg = 0; + + fd = ChainsCommon_Osal_fileOpen( + TIDL_UC_CFG_FILE, + CHAINSCOMMON_OSAL_FILEMODE_READ); + + if(-1 != fd) + { + while(NULL != fgets(string, 256U, (FILE*)fd)) + { + pArg = strtok(string, "="); + pVal = strtok(NULL, "\n"); + if(NULL != pArg) + { + if(0 == strcmp(pArg,"inputWidth")) + { + pObj->inWidth = atoi(pVal); + numArg ++; + } + else if(0 == strcmp(pArg,"inputHeight")) + { + pObj->inHeight = atoi(pVal); + numArg ++; + } + else if(0 == strcmp(pArg,"inputFile")) + { + strcpy(pObj->inFileName,pVal); + numArg ++; + } + else if(0 == strcmp(pArg,"outputFile")) + { + strcpy(pObj->outFileName,pVal); + numArg ++; + } + else if(0 == strcmp(pArg,"netFileName")) + { + strcpy(pObj->netFileName,pVal); + numArg ++; + } + else if(0 == strcmp(pArg,"paramFileName")) + { + strcpy(pObj->paramFileName,pVal); + numArg ++; + } + } + } + + ChainsCommon_Osal_fileClose(fd); + + if(TIDL_NUM_ARGS != numArg) + { + Vps_printf(" TIDL: Insufficient no of configuration parameters ..."); + return SYSTEM_LINK_STATUS_EFAIL; + } + else + { + Vps_printf(" TIDL Configuration parameters"); + Vps_printf(" -----------------------------"); + Vps_printf(" inputWidth = %d\n",pObj->inWidth); + Vps_printf(" inputHeight = %d\n",pObj->inHeight); + Vps_printf(" inputFile = %s\n",pObj->inFileName); + Vps_printf(" outputFile = %s\n",pObj->outFileName); + Vps_printf(" netFileName = %s\n",pObj->netFileName); + Vps_printf(" paramFileName = %s\n",pObj->paramFileName); + Vps_printf(" -----------------------------"); + + return SYSTEM_LINK_STATUS_SOK; + } + } + else + { + Vps_printf(" Use case config file (%s) is NOT present ...",\ + TIDL_UC_CFG_FILE); + return SYSTEM_LINK_STATUS_EFAIL; + } +} + +/** + ******************************************************************************* + * + * \brief chains_tidl_CreateApp + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] chains_tidlAppObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_tidlGray_CreateApp(chains_tidlGrayAppObj *pObj) +{ + +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + chains_tidlGray_Create(&pObj->eveUcObj, pObj); +#endif + +} + +/** + ******************************************************************************* + * + * \brief chains_tidl_StartApp + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] chains_tidlAppObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_tidlGray_StartApp(chains_tidlGrayAppObj *pObj) +{ + ChainsCommon_memPrintHeapStatus(); + +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + chains_tidlGray_Start(&pObj->eveUcObj); +#endif + ChainsCommon_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief chains_tidl_StopAndDelete + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +Void chains_tidlGray_StopAndDelete(chains_tidlGrayAppObj *pObj) +{ +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + chains_tidlGray_Stop(&pObj->eveUcObj); + chains_tidlGray_Delete(&pObj->eveUcObj); +#endif + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + ChainsCommon_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} + +/** + ******************************************************************************* + * + * \brief chains_tidl_printStatisticsApp + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +Void chains_tidlGray_printStatisticsApp(chains_tidlGrayAppObj *pObj) +{ +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + chains_tidlGray_printStatistics(&pObj->eveUcObj); +#endif +} + +/** + ******************************************************************************* + * + * \brief inputEofCb + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +static Void inputEofCb(UInt32 numFrames) +{ + /* End of input file reached */ + Vps_printf(" No of input frames = %d\n",numFrames); + gChainsObjTidl.outNumFrames = numFrames; + OSA_semSignal(&gChainsObjTidl.eofSem); +} + +/** + ******************************************************************************* + * + * \brief setNullSrcPrm + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] chains_tidlAppObj + * + ******************************************************************************* +*/ +static Void setNullSrcPrm(chains_tidlGrayAppObj *pObj) +{ + System_LinkChInfo *pChInfo; + NullSrcLink_CreateParams *pNullSrcPrm; + +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + pNullSrcPrm = &pObj->eveUcObj.NullSourcePrm; +#endif + + NullSrcLink_CreateParams_Init(pNullSrcPrm); + + if(TRUE == pObj->enableOutFileWrite) + { + /* For the file write mode the Null source latency is high + to allow for file write delays */ + pNullSrcPrm->timerPeriodMilliSecs = NULLSRC_TIMER_PERIOD_FW; + } + else + { + pNullSrcPrm->timerPeriodMilliSecs = NULLSRC_TIMER_PERIOD; + } + pNullSrcPrm->outQueInfo.numCh = 1; + pNullSrcPrm->channelParams[0].numBuffers = 4; + + pChInfo = &pNullSrcPrm->outQueInfo.chInfo[0]; + + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, + SYSTEM_DF_BGR24_888); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pChInfo->flags, + SYSTEM_SF_PROGRESSIVE); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, + SYSTEM_BUFFER_TYPE_VIDEO_FRAME); + pChInfo->width = pObj->inWidth; + pChInfo->height = pObj->inHeight; + pChInfo->startX = 0; + pChInfo->startY = 0; + pChInfo->pitch[0] = SystemUtils_align(pChInfo->width * 3, 32); + pChInfo->pitch[1] = SystemUtils_align(pChInfo->width * 3, 32); + + pNullSrcPrm->channelParams[0].fileReadMode = NULLSRC_LINK_FILEREAD_RUN_TIME; + strncpy(pNullSrcPrm->channelParams[0].nameDataFile, pObj->inFileName, 260); + + if(TRUE == pObj->enableOutFileWrite) + { + pNullSrcPrm->inEofCb = inputEofCb; + } + else + { + pNullSrcPrm->inEofCb = NULL; + } + pNullSrcPrm->dataRxMode = NULLSRC_LINK_DATA_RX_MODE_FILE; +} + +static Void dumpOutCb(System_LinkChInfo *pChInfo, Void *pBuf, Void *arg) +{ + //UInt32 ht; + UInt32 inBufOffset; + System_Buffer *pFrameBuf = (System_Buffer*)pBuf; + System_MetaDataBuffer *pMetaDataBuf = \ + (System_MetaDataBuffer*)pFrameBuf->payload; + chains_tidlGrayAppObj *pObj = (chains_tidlGrayAppObj*)arg; + // Utils_DmaCopyFill2D dmaPrm; + + // pObj->curOutputBufAddr = pObj->outputBuf[pObj->curOutBuf]; + pObj->curOutputBufAddr = ChainsCommon_Osal_getVirtAddr((UInt32)pObj->outputBuf[pObj->curOutBuf]); + pObj->curOutBuf = (pObj->curOutBuf == 0) ? 1 : 0; + pObj->curQue = pFrameBuf->chNum; + + ChainsCommon_Osal_cacheInv((UInt32)(pMetaDataBuf->bufAddr[0]), + ((UInt32)(pObj->inWidth + (2 * TIDL_MAX_PAD_SIZE)) * (pObj->inHeight + (2 * TIDL_MAX_PAD_SIZE)))); + + /* Remove the padding */ + inBufOffset = \ + (((NUM_OUTPUT_CLASSES + (2 * TIDL_MAX_PAD_SIZE)) * TIDL_MAX_PAD_SIZE) + TIDL_MAX_PAD_SIZE); + + //for (ht = 0U;ht < pObj->inHeight;ht++) + // { + memcpy( + (Ptr)(pObj->curOutputBufAddr),//(ht * pObj->inWidth)), + (Ptr)(((UInt32)pMetaDataBuf->bufAddr[0] + inBufOffset)),// + (ht * (pObj->inWidth + (2 * TIDL_MAX_PAD_SIZE)))), + NUM_OUTPUT_CLASSES); + // } + + ChainsCommon_Osal_cacheWb((UInt32)pObj->curOutputBufAddr, + (UInt32)(1U * pObj->inWidth * pObj->inHeight)); + + /* Post file write sem */ + OSA_semSignal(&(pObj->fileWriteSem)); +} + + +/* Background low priority task for writing the output frame to file */ +void* fileWriteTaskMainGray(void* arg0) +{ + Bool dump; + chains_tidlGrayAppObj *pObj = (chains_tidlGrayAppObj*)arg0; + + while (1) + { + OSA_semWait(&(pObj->fileWriteSem), OSA_TIMEOUT_FOREVER); + + dump = TRUE; + if (0 != pObj->outNumFrames) + { + if(pObj->outFrameNum == pObj->outNumFrames) + { + /* All the frames are dumped */ + dump = FALSE; + } + } + + if (TRUE == dump) + { + /* Write the output buffer to file */ + UInt32 max = 0; + Int32 i = 0; + UInt8* buf = (UInt8*)pObj->curOutputBufAddr; + for (i = 1; i < NUM_OUTPUT_CLASSES; i++) + { + if (buf[i] > buf[max]) + { + max = i; + } + } + + Vps_printf("########## DETECTED: %u ##########", max); + + ChainsCommon_Osal_fileWrite( + pObj->outFp, + (UInt8*)pObj->curOutputBufAddr, + (NUM_OUTPUT_CLASSES)); + Vps_printf("########## FRAME # %d, QUEUE = %d ###########\n",\ + pObj->outFrameNum++,pObj->curQue); + } + } +} + +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) +/** + ******************************************************************************* + * + * \brief chains_tidlGray_SetAppPrms + * + * This function configure, creates, link various links to establish + * usecase. + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_tidlGray_SetAppPrms(chains_tidlGrayObj *pUcObj, Void *appObj) +{ + chains_tidlGrayAppObj *pObj = (chains_tidlGrayAppObj*)appObj; + + /* Null Source Parameters */ + setNullSrcPrm(pObj); + + /* TIDL Pre Process */ + pUcObj->Alg_tidlpreprocPrm.outPad = TIDL_MAX_PAD_SIZE; + pUcObj->Alg_tidlpreprocPrm.numOutputQueues = NUM_PIPELINES; + pUcObj->Alg_tidlpreprocPrm.procMode = TIDLPREPROC_LINK_PROCMODE_RGBPAD; + + /* + * Set the TIDL algorithm parameters for all the 'NUM_PIPELINES' instances. + * Make sure to distribute the OCMC instance across the algorithm + * instances like OCMC_1 for TIDL_1 and OCMC_2 for TIDL_2 + */ + + /* TIDL on EVE1 */ + pUcObj->Alg_tidl_1Prm.cacheInvInBuf = 0; + pUcObj->Alg_tidl_1Prm.cacheWbOutBuf = 0; + pUcObj->Alg_tidl_1Prm.pAlgCreateParams = pObj->pAlgCreateParams; + pUcObj->Alg_tidl_1Prm.curCoreId = TIDL_COREID_EVE1; + pUcObj->Alg_tidl_1Prm.currLayersGroupId = TIDL_LAYER_GROUPID_EVE1; + pUcObj->Alg_tidl_1Prm.ocmcAddr = ChainsCommon_Osal_getVirtAddr(OCMC_1_BASE_ADDRESS); + + /* Null Link */ + if(TRUE == pObj->enableOutFileWrite) + { + pUcObj->NullPrm.appCb = dumpOutCb; + pUcObj->NullPrm.appCbArg = pObj; + } + else + { + pUcObj->NullPrm.appCb = NULL; + pUcObj->NullPrm.appCbArg = NULL; + } +} +#endif + +/** + ******************************************************************************* + * + * \brief chanis_tidl + * + * This function configure, creates, link various links to establish + * usecase. + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_tidlGray(Chains_Ctrl *chainsCfg) +{ + char ch; + Bool done = FALSE; + Int32 status; +// Utils_DmaChCreateParams dmaParams; + UInt32 nullSourceLinkID; + + /* Parse the Use Case Config file */ + if(SYSTEM_LINK_STATUS_SOK == parseCfg(&gChainsObjTidl)) + { + gChainsObjTidl.chainsCfg = chainsCfg; + ch = Chains_readChar(); + gChainsObjTidl.tidlCore = TIDL_CORE_EVE; + + /* TIDL Use case Mode selection + File Dump/Free Run */ + Vps_printf(tidlUseCaseModeMenu); + ch = Chains_readChar(); + + switch(ch) + { + case '1': + gChainsObjTidl.enableOutFileWrite = TRUE; + break; + default: + case '2': + gChainsObjTidl.enableOutFileWrite = FALSE; + break; + } + + /* Allocate the Algorithm create structure */ + gChainsObjTidl.pAlgCreateParams = ChainsCommon_Osal_memAlloc( + sizeof(TIDL_CreateParams), + 32); + OSA_assert(NULL != gChainsObjTidl.pAlgCreateParams); + + if(TRUE == gChainsObjTidl.enableOutFileWrite) + { + /* EDMA channel for dumping the frame */ + //status = (UInt32)ChainsCommon_Osal_dmaCreate() + //OSA_assert(status == SYSTEM_LINK_STATUS_SOK); + + /* Semaphore to flag end of input */ + status = (Int32)OSA_semCreate(&gChainsObjTidl.eofSem, 1, 0); + + OSA_assert(OSA_SOK == status); + + /* Allocate buffer to copy the output frame after removing the padding */ + gChainsObjTidl.outputBuf[0] = (UInt32)ChainsCommon_Osal_memAlloc( + (gChainsObjTidl.inWidth * gChainsObjTidl.inHeight), + 32); + OSA_assert(0 != gChainsObjTidl.outputBuf[0]); + + gChainsObjTidl.outputBuf[1] = (UInt32)ChainsCommon_Osal_memAlloc( + (gChainsObjTidl.inWidth * gChainsObjTidl.inHeight), + 32); + OSA_assert(0 != gChainsObjTidl.outputBuf[1]); + + /* Open the output file */ + gChainsObjTidl.outFp = ChainsCommon_Osal_fileOpen( + gChainsObjTidl.outFileName, + CHAINSCOMMON_OSAL_FILEMODE_WRITE_BIN); + OSA_assert(-1 != gChainsObjTidl.outFp); + /* File Writer Task */ + // status = (Int32)OSA_tskCreate(&gChainsObjTidl.fileWriteTask, + // (OSA_TskFncMain)fileWriteTaskMain, + // TIDL_UC_FILEWRITE_TSK_PRI, + // TIDL_FILEWRITE_TASK_STACK_SIZE, + // 0, + // &gChainsObjTidl, + // "fileWriteTaskMain"); + // OSA_assert(OSA_SOK == status); + + status = OSA_thrCreate(&gChainsObjTidl.fileWriteTask, + fileWriteTaskMainGray, + TIDL_UC_FILEWRITE_TSK_PRI, + TIDL_FILEWRITE_TASK_STACK_SIZE, + (void *)&gChainsObjTidl); + OSA_assert(OSA_SOK == status); + + /* Semaphore for file write sync */ + status = OSA_semCreate(&gChainsObjTidl.fileWriteSem, 1, 0); + OSA_assert(OSA_SOK == status); + + gChainsObjTidl.outFrameNum = 0; + gChainsObjTidl.outNumFrames = 0; + gChainsObjTidl.curOutBuf = 0; + } + + /* TIDL init */ + tidlGrayInit(&gChainsObjTidl); + chains_tidlGray_CreateApp(&gChainsObjTidl); + chains_tidlGray_StartApp(&gChainsObjTidl); + + if(TRUE == gChainsObjTidl.enableOutFileWrite) + { + /* Wait for processing of all the frames */ + status = OSA_semWait(&gChainsObjTidl.eofSem, OSA_TIMEOUT_FOREVER); + OSA_assert(OSA_SOK == status); +// ChainsCommon_PrintStatistics(); +// chains_tidl_printStatisticsApp(&gChainsObjTidl); + +#if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) + nullSourceLinkID = gChainsObjTidl.eveUcObj.NullSourceLinkID; +#endif + /* Pause the Null Source Link */ + status = System_linkControl( + nullSourceLinkID, + NULL_SRC_LINK_CMD_PAUSE, + NULL, + 0, + TRUE); + OSA_assert (SYSTEM_LINK_STATUS_SOK == status); + + /* Wait till all the output frames are dumped */ + while(gChainsObjTidl.outFrameNum < gChainsObjTidl.outNumFrames) + { + system("usleep 1000"); + } + } + else + { + do + { + Vps_printf(tidlRunTimeMenu); + ch = Chains_readChar(); + + switch(ch) + { + case '0': + done = TRUE; + break; + + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + chains_tidlGray_printStatisticsApp(&gChainsObjTidl); + break; + + default: + break; + } + }while(FALSE == done); + } + + chains_tidlGray_StopAndDelete(&gChainsObjTidl); + /* TIDL DeInit */ + tidlGrayDeInit(&gChainsObjTidl); + + if(TRUE == gChainsObjTidl.enableOutFileWrite) + { + ChainsCommon_Osal_fileClose(gChainsObjTidl.outFp); + OSA_thrDelete(&gChainsObjTidl.fileWriteTask); + OSA_semDelete(&gChainsObjTidl.fileWriteSem); + OSA_semDelete(&gChainsObjTidl.eofSem); + ChainsCommon_Osal_dmaDelete(&gChainsObjTidl.dumpFramesDmaObj); + ChainsCommon_Osal_memFree( + (Ptr)gChainsObjTidl.outputBuf[0], + (gChainsObjTidl.inWidth * gChainsObjTidl.inHeight)); + + ChainsCommon_Osal_memFree( + (Ptr)gChainsObjTidl.outputBuf[1], + (gChainsObjTidl.inWidth * gChainsObjTidl.inHeight)); + } + /* Free the Algorithm create structure */ + ChainsCommon_Osal_memFree( + gChainsObjTidl.pAlgCreateParams, + sizeof(TIDL_CreateParams)); + } + + Vps_printf(" ############## END OF TIDL FILE I/O USE CASE ###############"); +} + +Sinyour network is SSD based, recomend you to refer the TIDL OD use case. Also make sure you are passing input tensor as required by Library refer PreprocTIDL function for more deatils. + +I will look into that. But I have another question. I noticed that at the beginning of import process there is output Num of Layer Detected : 69 for my model. But in net.bin file I can see that first for bytes, which should correspond to numLayers field of sTIDL_Network_t structure in TIDL library, have value 0x40 which is 64. Is this difference result of conversion from caffemodel to TIDL or there is some problem? + +Some of the layers (Example prior box etc) are merged at the end. As m,entioned earlir that the output was right during import step, this means you model conversion is proper. + +I had a look into TIDL OD use case, but I can't see major difference to my usecase. Data format is different, for TIDL OD it is set to take YUV format, but conversion is done and 3 planes (R, G, B) are sent to TIDL algorithm. In my usecase, I am sending image with R, G and B components which are split by preproc and sent to TIDL algortihm in same way. I don't see any other difference regarding inputs in TIDL lib. Model files are read in same way, also. So, I can't see any input to be different for TIDL OD usecase. Is there anything else that can make influence on the way the TIDL is working? + +I took further analysis of usecase. Can this problem be related to the currLayersGroupId parametar? As currently I am executing all layers on same core, either EVE or DSP. If it is so, how can I get same result during import process whether I set layersGroupId paramter in config file or not? + +Hi, This "layersGroupId" parameter is explained in the user guide with examples, please refer to FAQ 21 and 22 in the TIDeepLearningLibrary_UserGuide.pdf on the usage of this "layersGroupId" parameter. + diff --git a/data2/text/range/30001+/791877.txt b/data2/text/range/30001+/791877.txt new file mode 100644 index 0000000000000000000000000000000000000000..550210f09a722acbb0549ccadb3bec5bd4ebb6b8 --- /dev/null +++ b/data2/text/range/30001+/791877.txt @@ -0,0 +1,32 @@ +Ticket Name: RTOS/TDA2PXEVM: I want to change DDR memory map form 1GB to 2GB + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hi, I made custom board. So, I changed DDR3 2GiB.(1GiB + 1GiB) I changed the code by referring to the Memory Map for vision SDK application report(Draft v0.3) so, I try the option Dual_emif_2X512MB and Dual_emif_1GB_512MB. Both of these options will boot normally. but, I change 2GiB memory map.It stops like the following log. ------------------------------------------------------------------------------------ TDA2Px SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed TDA2Px DDR Configuration DDR Config Completed App Image Download Begins SD Boot - file open completed successfully MPU CPU0 Image Load Completed IPU1 CPU0 Image Load Completed IPU1 CPU1 Image Load Completed IPU2 CPU0 and CPU1 Image Load Completed DSP1 Image Load Completed DSP2 Image Load Completed EVE1 Image Load Completed EVE2 Image Load Completed App Image Download Completed Putting MPU CPU1 in Off mode EVE MMU configuration completed EVE MMU configuration completed ***************************************************************** PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles SBL Initial Config Cycles - 116295 (9.92 ms) SOC Init Cycles - 171037 (14.59 ms) DDR Config Clock Cycles - 89904 (7.67 ms) App Image Load Cycles - 153145209 (13068.39 ms) Slave Core Bootup Cycles - 130271 (11.11 ms) SBL Boot-up Cycles - 153653773 (13111.78 ms) Time at which SBL started IPU1_0 - 551351 (47.4 ms) ***************************************************************** Jumping to MPU CPU0 App ------------------------------------------------------------------------------------ And 2GiB was modified as shown below. ------------------------------------------------------------------------------------ diff --git a/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/sbl_utils/src/tda2xx/sbl_utils_tda2px_ddr_config.c b/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/sbl_utils/src/tda2xx/sbl_utils_tda2px_ddr_config.c index 6151b14..1620eb1 100644 --- a/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/sbl_utils/src/tda2xx/sbl_utils_tda2px_ddr_config.c +++ b/ti_components/drivers/pdk_01_10_02_07/packages/ti/boot/sbl_auto/sbl_utils/src/tda2xx/sbl_utils_tda2px_ddr_config.c @@ -484,11 +484,11 @@ static void TDA2Px_set_lisa_maps(void) SBLLibPrintf(SBLLIB_TRACE_LEVEL_DEBUG, " Two EMIFs in non interleaved mode (2GB total)\n"); /* MA_LISA_MAP_i */ - HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_0, 0x80740300U); - HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_1, 0xFF020100U); + HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_0, 0x80700200U); + HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_1, 0xC0700100U); /* DMM_LISA_MAP_i */ - HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_0, 0x80740300U); - HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_1, 0xFF020100U); + HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_0, 0x80700200U); + HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_1, 0xC0700100U); } #endif diff --git a/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs b/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs index 9a19da1..5e3b7be 100755 --- a/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs +++ b/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs @@ -18,7 +18,7 @@ function getMemSegmentDefinition_external(core) MB=KB*KB; DDR3_ADDR = 0x80000000; - DDR3_SIZE = 512*MB; + DDR3_SIZE = 2048*MB; /* * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 @@ -27,7 +27,7 @@ function getMemSegmentDefinition_external(core) * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg */ DDR3_BASE_ADDR_0 = DDR3_ADDR; - DDR3_BASE_SIZE_0 = 508*MB; + DDR3_BASE_SIZE_0 = 1024*MB; /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE @@ -42,7 +42,7 @@ function getMemSegmentDefinition_external(core) * in non-cached virtual address of * DDR3_BASE_ADDR_1 + 512*MB */ - DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; +/* DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; */ } DSP1_L2_SRAM_ADDR = 0x40800000; diff --git a/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk b/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk index 9bc797c..479221a 100755 --- a/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk +++ b/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk @@ -31,7 +31,7 @@ VSDK_BOARD_TYPE=TDA2PX_EVM DUAL_A15_SMP_BIOS=no # Supported values: DDR_MEM_512M -DDR_MEM=DDR_MEM_512M +DDR_MEM=DDR_MEM_1024M EMIFMODE=DUAL_EMIF_1GB_1GB # Supported values: ipu1_0 ipu1_1 a15_0 none diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg index efa9900..e287d61 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg @@ -146,7 +146,7 @@ attrs1.shareable = 2; // sharerable attrs1.attrIndx = 2; // Cached, normal memory // Set the descriptor for each entry in the address range -for (var i=0x80000000; i < 0xA0000000; i = i + 0x00200000) { +for (var i=0x80000000; i < 0xC0000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs1); } @@ -160,9 +160,9 @@ attrs2.shareable = 2; // sharerable attrs2.attrIndx = 0; // Non-cache, normal memory // Set the descriptor for each entry in the address range -for (var i=0xA0000000; i < 0xC0000000; i = i + 0x00200000) { +for (var i=0xC0000000; i <= 0xFFFFFFFF; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range - Mmu.setSecondLevelDescMeta(i, i-0x20000000, attrs2); + Mmu.setSecondLevelDescMeta(i, i, attrs2); } // Region for NDK packet data buffers. diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg index a5b6652..46da588 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg @@ -204,13 +204,14 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,6 +222,6 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ + } diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg index f7ca5f8..60aa355 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg @@ -204,13 +204,13 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,5 +221,5 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ -} \ No newline at end of file + +} ------------------------------------------------------------------------------------ There is a normal 1.5GiB. ------------------------------------------------------------------------------------ diff --git a/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs b/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs index 9a19da1..139434e 100755 --- a/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs +++ b/vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs @@ -18,7 +18,7 @@ function getMemSegmentDefinition_external(core) MB=KB*KB; DDR3_ADDR = 0x80000000; - DDR3_SIZE = 512*MB; + DDR3_SIZE = (1024+512)*MB; /* * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 @@ -27,7 +27,7 @@ function getMemSegmentDefinition_external(core) * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg */ DDR3_BASE_ADDR_0 = DDR3_ADDR; - DDR3_BASE_SIZE_0 = 508*MB; + DDR3_BASE_SIZE_0 = 512*MB; /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE @@ -42,7 +42,7 @@ function getMemSegmentDefinition_external(core) * in non-cached virtual address of * DDR3_BASE_ADDR_1 + 512*MB */ - DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; +/* DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; */ } DSP1_L2_SRAM_ADDR = 0x40800000; diff --git a/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk b/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk index 9bc797c..479221a 100755 --- a/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk +++ b/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk @@ -31,7 +31,7 @@ VSDK_BOARD_TYPE=TDA2PX_EVM DUAL_A15_SMP_BIOS=no # Supported values: DDR_MEM_512M -DDR_MEM=DDR_MEM_512M +DDR_MEM=DDR_MEM_1024M EMIFMODE=DUAL_EMIF_1GB_1GB # Supported values: ipu1_0 ipu1_1 a15_0 none diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg index efa9900..4dd1e55 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg @@ -162,7 +162,7 @@ attrs2.attrIndx = 0; // Non-cache, normal memory // Set the descriptor for each entry in the address range for (var i=0xA0000000; i < 0xC0000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range - Mmu.setSecondLevelDescMeta(i, i-0x20000000, attrs2); + Mmu.setSecondLevelDescMeta(i, i, attrs2); } // Region for NDK packet data buffers. diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg index a5b6652..46da588 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg @@ -204,13 +204,14 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,6 +222,6 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ + } diff --git a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg index f7ca5f8..60aa355 100755 --- a/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg +++ b/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg @@ -204,13 +204,13 @@ function init() entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; - entry.translatedAddress = 0x80000000; + entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -/* + var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; @@ -221,5 +221,5 @@ function init() entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; -*/ -} \ No newline at end of file + +} ------------------------------------------------------------------------------------ Thanks. + +Responses: +Hi, Can you try to connect to all CPUs using CCS (make sure configuration has no gel) and see their states. You might need to load symbols to identify the CPU that has crashed. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, Our company system has blocked file updates. So, I would like to receive a guide from the Vision SDK that changed the DDR memory map from 512MB to 2GB. Regards, kyungtae + +Hi, I am not asking for file updates. You can check for CPU states using CCS. Also did you update vpsLibInitPrms.isAddrTransReq to FALSE for changing the memory map to 2 GB? Regards, Rishabh + +Hi, I am sorry. I misunderstood your comment. I set isAddrTransReq to FALSE in the file below. vision_sdk/links_fw/src/rtos/links_ipu/system/system_bsp_init.c 290 line /* This one to one mapping is required for the 1GB builds */ vpsInitPrms.virtBaseAddr = 0x80000000U; vpsInitPrms.physBaseAddr = 0x80000000U; vpsInitPrms.isAddrTransReq = FALSE; Thanks Regards, kyungtae + +Hi, Can you please update on the state of different CPUs in order to progress on this issue. Also did the VPS change have any effect on the boot? Regards, Rishabh + +Hi, 1. Can you please update on the state of different CPUs in order to progress on this issue. - CortexA15_0 is follows. main_common_a15_0.c(168 line, BIOS start())-->system_common.c(752 line, memset(&gSystem_objCommon, 0, sizeof(gSystem_objCommon));) -> system_ipc_bios_ipc.c(474 line) Void System_ipcStart(void) { Int32 status = Ipc_S_SUCCESS; do { status = Ipc_start(); } while (status != Ipc_S_SUCCESS); ---> this point hang /* In case of fast boot System_ipcStart() will be called late, * after all cores are up & Notify_registerEvent is not called * under System_ipcNotifyInit(), so needs to be called here. */ if(ti_sdo_ipc_Ipc_procSync == ti_sdo_ipc_Ipc_ProcSync_ALL) { System_ipcNotifyRegister(); } } IPC.c(698 line) /* Check whether Ipc_start has been called. If so, succeed. */ if (Ipc_module->ipcSharedAddr != NULL) { return (Ipc_S_ALREADYSETUP); } - M4_IPU1_C0 is follows. ti_sysbios_family_arm_m3_Hwi_excHandler_I -> ti_sysbios_family_arm_m3_Hwi_excHandlerMax_I -> ti_sysbios_BIOS_exitFunc_I -> xdc_runtime_System_exit_E -> exit -> abort - M4_IPU1_C1 is follows. main_ipu1_1.c - M4_IPU2_C0 is follows. ti_sysbios_BIOS_errorRaiseHook_I -> Utils_commonErrorRaiseHook -> vpsprint -> RemoteLog_serverPustring 2. Also did the VPS change have any effect on the boot? Sorry, I don't know. Regards, kyungtae + +Hi, Can you check the board schematics to make sure that you have indeed got 1 GB memory each connected on EMIF1 and EMIF2 port. Regards, Rishabh + +Hi, I check the board schematics. our schematics two MT41K256M16TW in EMIF1 and two MT41K256M16TW in EMIF2. Thanks. Regards, kyungtae + +Hi, Sorry for the delayed response. Can you shared the modified files i.e. xs file, a15 cfg and ipu cfg. Regards, Rishabh + +Hi, 1. vision_sdk/apps/build/tda2px/mem_segment_definition_bios.xs /* ******************************************************************************* * * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * ALL RIGHTS RESERVED * ******************************************************************************* */ /* * ======== mem_segment_definition.xs ======== * ======== Single file for the memory map configuration of all cores ========= */ function getMemSegmentDefinition_external(core) { KB=1024; MB=KB*KB; DDR3_ADDR = 0x80000000; DDR3_SIZE = (1024+1024)*MB; /* * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 * are hard-coded in as values of gIpcNonCachedDataAddr and * gIpcNonCachedDataSize in Ipu1_0.cfg * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg */ DDR3_BASE_ADDR_0 = DDR3_ADDR; DDR3_BASE_SIZE_0 = 1024*MB; /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE * to map SR0, REMOTE_LOG_MEM sections. * tlb_config_eveX.c need to be modified otherwise */ DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0; DDR3_BASE_SIZE_1 = DDR3_SIZE - DDR3_BASE_SIZE_0; if(core=="ipu1_1" || core=="ipu1_0" || core=="ipu2" || core=="a15_0") { /* for ipu1_0, ipu1_1, ipu2 DDR3_BASE_ADDR_1 should be * in non-cached virtual address of * DDR3_BASE_ADDR_1 + 512*MB */ /* DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; */ } DSP1_L2_SRAM_ADDR = 0x40800000; DSP1_L2_SRAM_SIZE = 288*KB; DSP2_L2_SRAM_ADDR = 0x41000000; DSP2_L2_SRAM_SIZE = 288*KB; EVE1_SRAM_ADDR = 0x42000000; EVE1_SRAM_SIZE = 1*MB; EVE2_SRAM_ADDR = 0x42100000; EVE2_SRAM_SIZE = 1*MB; TOTAL_MEM_SIZE = (DDR3_SIZE); /* First 512 MB - cached */ /* EVE vecs space should be align with 16MB boundary, and if possible try to fit * the entire vecs+code+data in 16MB section. In this case a single TLB map would * be enough to map vecs+code+data of an EVE. * tlb_config_eveX.c need to be modified if any of these EVE memory sections or * SR1_FRAME_BUFFER_MEM section is modified. */ /* EVE self-branch instruction block - EVE1_VECS * In SBL, EVE self-branch instruction is inserted @ 0x80000000 if no AppImage for EVE. * This could overwrites the code/data loaded at 0x80000000. * So Reserving a small memory block in the beginning of the DDR @0x8000 0000 for * EVE self-branch instruction if no AppImage for EVE. * If EVE enabled, then the EVE VECS/DATA/CODE is placed @0x8000 0000, * and hence we did not observe any issue. * If EVE is disabled, then also DO NOT remove this EVE1_VECS section @0x80000000, * if no AppImage for EVE. This could overwrites the code/data loaded at 0x80000000 */ EVE1_VECS_SIZE = 0.5*MB; EVE1_CODE_SIZE = 2*MB; EVE1_DATA_SIZE =13.5*MB; EVE2_VECS_SIZE = 0.5*MB; EVE2_CODE_SIZE = 2*MB; EVE2_DATA_SIZE =13.5*MB; NDK_DATA_SIZE = 4*MB; IPU1_1_CODE_SIZE = 2*MB; IPU1_1_DATA_SIZE = 9*MB; IPU1_0_CODE_SIZE = 12*MB; IPU1_0_DATA_SIZE = 17*MB; IPU2_CODE_SIZE = 2*MB; IPU2_DATA_SIZE = 9*MB; DSP1_CODE_SIZE = 4*MB; DSP1_DATA_SIZE = 12.5*MB; DSP1_DATA_SIZE_2 = 1*MB; DSP2_CODE_SIZE = 2*MB; DSP2_DATA_SIZE = 12.5*MB; DSP2_DATA_SIZE_2 = 1*MB; /* A15_0_CODE_SIZE reduced since it is not used in .bld file. * Check .bld for details. Originally 2 + 14 MB. */ A15_0_DATA_SIZE = 13*MB; if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { A15_0_DATA_SIZE_INC = 101*MB /* in MB */ A15_0_DATA_SIZE = (A15_0_DATA_SIZE + A15_0_DATA_SIZE_INC); } if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") { /* Ensure ECC regions are 64kB aligned */ SR1_FRAME_BUFFER_SIZE = 309*MB; SR1_BUFF_ECC_ASIL_SIZE = 1*MB; SR1_BUFF_ECC_QM_SIZE = 40*MB; SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; } else { SR1_BUFF_ECC_ASIL_SIZE = 4*KB; SR1_BUFF_ECC_QM_SIZE = 4*KB; SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; SR1_FRAME_BUFFER_SIZE = 351*MB - (SR1_BUFF_ECC_ASIL_SIZE + SR1_BUFF_ECC_QM_SIZE + SR1_BUFF_NON_ECC_ASIL_SIZE); if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { SR1_FRAME_BUFFER_SIZE = SR1_FRAME_BUFFER_SIZE - A15_0_DATA_SIZE_INC; } } /* Second 512 MB - non-cached */ /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE * to map SR0, REMOTE_LOG_MEM sections. * tlb_config_eveX.c need to be modified otherwise */ REMOTE_LOG_SIZE = 160*KB; SYSTEM_IPC_SHM_SIZE = 480*KB; LINK_STATS_SIZE = 256*KB; HDVPSS_DESC_SIZE = 1024*KB; SR0_SIZE = 128*KB; OPENVX_SHM_SIZE = 2*MB; if((java.lang.System.getenv("OPENCL_INCLUDE") == "yes")) { /* when OpenCL is enabled we need more SR0 space */ SR0_SIZE = 2*MB; } /* Cached Section */ /* EVE vecs space should be align with 16MB boundary, and if possible try to fit * the entire vecs+code+data in 16MB section. In this case a single TLB map would * be enough to map vecs+code+data of an EVE. * tlb_config_eveX.c need to be modified if any of these EVE memory sections or * SR1_FRAME_BUFFER_MEM section is modified. */ /* EVE self-branch instruction block - EVE1_VECS * In SBL, EVE self-branch instruction is inserted @ 0x80000000 if no AppImage for EVE. * This could overwrites the code/data loaded at 0x80000000. * So Reserving a small memory block in the beginning of the DDR @0x8000 0000 for * EVE self-branch instruction if no AppImage for EVE. * If EVE enabled, then the EVE VECS/DATA/CODE is placed @0x8000 0000, * and hence we did not observe any issue. * If EVE is disabled, then also DO NOT remove this EVE1_VECS section @0x80000000, * if no AppImage for EVE. This could overwrites the code/data loaded at 0x80000000 */ /* Changes for ECC * EVE code will run only from non-ECC region * All code section should be next to non-ECC region (using EVE section) to * allow them to be easily taken out of ECC region for debugging. * Make sure DSP1_DATA_ADDR_2 and DSP2_DATA_ADDR_2 are immediately after * SR1_BUFF_ECC_QM_ADDR and should be 2*MB in total - this size should * be kept constant across all platforms and should match the increment * to heapStats.heapSize in utils_xmc_mpu.c */ EVE1_VECS_ADDR = DDR3_BASE_ADDR_0; EVE1_CODE_ADDR = EVE1_VECS_ADDR + EVE1_VECS_SIZE; EVE1_DATA_ADDR = EVE1_CODE_ADDR + EVE1_CODE_SIZE; EVE2_VECS_ADDR = EVE1_DATA_ADDR + EVE1_DATA_SIZE; EVE2_CODE_ADDR = EVE2_VECS_ADDR + EVE2_VECS_SIZE; EVE2_DATA_ADDR = EVE2_CODE_ADDR + EVE2_CODE_SIZE; NDK_DATA_ADDR = EVE2_DATA_ADDR + EVE2_DATA_SIZE; IPU1_1_CODE_ADDR = NDK_DATA_ADDR + NDK_DATA_SIZE; IPU1_0_CODE_ADDR = IPU1_1_CODE_ADDR + IPU1_1_CODE_SIZE; IPU2_CODE_ADDR = IPU1_0_CODE_ADDR + IPU1_0_CODE_SIZE; DSP1_CODE_ADDR = IPU2_CODE_ADDR + IPU2_CODE_SIZE; DSP2_CODE_ADDR = DSP1_CODE_ADDR + DSP1_CODE_SIZE; IPU1_1_DATA_ADDR = DSP2_CODE_ADDR + DSP2_CODE_SIZE; IPU1_0_DATA_ADDR = IPU1_1_DATA_ADDR + IPU1_1_DATA_SIZE; IPU2_DATA_ADDR = IPU1_0_DATA_ADDR + IPU1_0_DATA_SIZE; DSP1_DATA_ADDR = IPU2_DATA_ADDR + IPU2_DATA_SIZE; DSP2_DATA_ADDR = DSP1_DATA_ADDR + DSP1_DATA_SIZE; A15_0_DATA_ADDR = DSP2_DATA_ADDR + DSP2_DATA_SIZE; SR1_BUFF_ECC_ASIL_ADDR = A15_0_DATA_ADDR + A15_0_DATA_SIZE; SR1_BUFF_ECC_QM_ADDR = SR1_BUFF_ECC_ASIL_ADDR + SR1_BUFF_ECC_ASIL_SIZE; DSP1_DATA_ADDR_2 = SR1_BUFF_ECC_QM_ADDR + SR1_BUFF_ECC_QM_SIZE; DSP2_DATA_ADDR_2 = DSP1_DATA_ADDR_2 + DSP1_DATA_SIZE_2; SR1_BUFF_NON_ECC_ASIL_ADDR = DSP2_DATA_ADDR_2 + DSP2_DATA_SIZE_2; SR1_FRAME_BUFFER_ADDR = SR1_BUFF_NON_ECC_ASIL_ADDR + SR1_BUFF_NON_ECC_ASIL_SIZE; /* Non Cached Section */ /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE * to map SR0, REMOTE_LOG_MEM sections. * tlb_config_eveX.c need to be modified otherwise */ SR0_ADDR = DDR3_BASE_ADDR_1; REMOTE_LOG_ADDR = SR0_ADDR + SR0_SIZE; LINK_STATS_ADDR = REMOTE_LOG_ADDR + REMOTE_LOG_SIZE; SYSTEM_IPC_SHM_ADDR = LINK_STATS_ADDR + LINK_STATS_SIZE; HDVPSS_DESC_ADDR = SYSTEM_IPC_SHM_ADDR + SYSTEM_IPC_SHM_SIZE; OPENVX_SHM_ADDR = HDVPSS_DESC_ADDR + HDVPSS_DESC_SIZE; if ((SR1_FRAME_BUFFER_ADDR + SR1_FRAME_BUFFER_SIZE) > (DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0)) { throw xdc.$$XDCException("MEMORY_MAP OVERFLOW ERROR ", "\nRegion End: " + "0x" + java.lang.Long.toHexString(DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0) + "\nActual End: " + "0x" + java.lang.Long.toHexString(SR1_FRAME_BUFFER_ADDR + SR1_FRAME_BUFFER_SIZE)); } if(java.lang.System.getenv("OPENVX_INCLUDE")=="yes") { if ((OPENVX_SHM_ADDR + OPENVX_SHM_SIZE) > (DDR3_BASE_ADDR_1 + DDR3_BASE_SIZE_1)) { throw xdc.$$XDCException("MEMORY_MAP OVERFLOW ERROR with OpenVx", "\nRegion End: " + "0x" + java.lang.Long.toHexString(DDR3_BASE_ADDR_1 + DDR3_BASE_SIZE_1) + "\nActual End: " + "0x" + java.lang.Long.toHexString(OPENVX_SHM_ADDR + OPENVX_SHM_SIZE)); } } else { if ((HDVPSS_DESC_ADDR + HDVPSS_DESC_SIZE) > (DDR3_BASE_ADDR_1 + DDR3_BASE_SIZE_1)) { throw xdc.$$XDCException("MEMORY_MAP OVERFLOW ERROR", "\nRegion End: " + "0x" + java.lang.Long.toHexString(DDR3_BASE_ADDR_1 + DDR3_BASE_SIZE_1) + "\nActual End: " + "0x" + java.lang.Long.toHexString(HDVPSS_DESC_ADDR + HDVPSS_DESC_SIZE)); } } if ((DDR3_BASE_SIZE_1 + DDR3_BASE_SIZE_0) > (TOTAL_MEM_SIZE)) { throw xdc.$$XDCException("MEMORY_MAP EXCEEDS DDR SIZE ERROR ", "\nRegion End: " + "0x" + java.lang.Long.toHexString(DDR3_BASE_SIZE_1 + DDR3_BASE_SIZE_0) + "\nActual End: " + "0x" + java.lang.Long.toHexString(TOTAL_MEM_SIZE)); } var memory = new Array(); var index = 0; memory[index++] = ["IPU1_1_CODE_MEM", { comment : "IPU1_1_CODE_MEM", name : "IPU1_1_CODE_MEM", base : IPU1_1_CODE_ADDR, len : IPU1_1_CODE_SIZE }]; memory[index++] = ["IPU1_1_DATA_MEM", { comment : "IPU1_1_DATA_MEM", name : "IPU1_1_DATA_MEM", base : IPU1_1_DATA_ADDR, len : IPU1_1_DATA_SIZE }]; memory[index++] = ["IPU1_0_CODE_MEM", { comment : "IPU1_0_CODE_MEM", name : "IPU1_0_CODE_MEM", base : IPU1_0_CODE_ADDR, len : IPU1_0_CODE_SIZE }]; memory[index++] = ["IPU1_0_DATA_MEM", { comment : "IPU1_0_DATA_MEM", name : "IPU1_0_DATA_MEM", base : IPU1_0_DATA_ADDR, len : IPU1_0_DATA_SIZE }]; memory[index++] = ["IPU2_CODE_MEM", { comment : "IPU2_CODE_MEM", name : "IPU2_CODE_MEM", base : IPU2_CODE_ADDR, len : IPU2_CODE_SIZE }]; memory[index++] = ["IPU2_DATA_MEM", { comment : "IPU2_DATA_MEM", name : "IPU2_DATA_MEM", base : IPU2_DATA_ADDR, len : IPU2_DATA_SIZE }]; memory[index++] = ["DSP1_CODE_MEM", { comment : "DSP1_CODE_MEM", name : "DSP1_CODE_MEM", base : DSP1_CODE_ADDR, len : DSP1_CODE_SIZE }]; memory[index++] = ["DSP1_DATA_MEM", { comment : "DSP1_DATA_MEM", name : "DSP1_DATA_MEM", base : DSP1_DATA_ADDR, len : DSP1_DATA_SIZE }]; memory[index++] = ["DSP1_DATA_MEM_2", { comment : "DSP1_DATA_MEM_2", name : "DSP1_DATA_MEM_2", base : DSP1_DATA_ADDR_2, len : DSP1_DATA_SIZE_2 }]; memory[index++] = ["DSP2_CODE_MEM", { comment : "DSP2_CODE_MEM", name : "DSP2_CODE_MEM", base : DSP2_CODE_ADDR, len : DSP2_CODE_SIZE }]; memory[index++] = ["DSP2_DATA_MEM", { comment : "DSP2_DATA_MEM", name : "DSP2_DATA_MEM", base : DSP2_DATA_ADDR, len : DSP2_DATA_SIZE }]; memory[index++] = ["DSP2_DATA_MEM_2", { comment : "DSP2_DATA_MEM_2", name : "DSP2_DATA_MEM_2", base : DSP2_DATA_ADDR_2, len : DSP2_DATA_SIZE_2 }]; memory[index++] = ["NDK_MEM", { comment : "NDK_MEM", name : "NDK_MEM", base : NDK_DATA_ADDR, len : NDK_DATA_SIZE }]; memory[index++] = ["A15_0_DATA_MEM", { comment : "A15_0_DATA_MEM", name : "A15_0_DATA_MEM", base : A15_0_DATA_ADDR, len : A15_0_DATA_SIZE }]; memory[index++] = ["EVE1_VECS_MEM", { comment : "EVE1_VECS_MEM", name : "EVE1_VECS_MEM", base : EVE1_VECS_ADDR, len : EVE1_VECS_SIZE }]; memory[index++] = ["EVE1_CODE_MEM", { comment : "EVE1_CODE_MEM", name : "EVE1_CODE_MEM", base : EVE1_CODE_ADDR, len : EVE1_CODE_SIZE }]; memory[index++] = ["EVE1_DATA_MEM", { comment : "EVE1_DATA_MEM", name : "EVE1_DATA_MEM", base : EVE1_DATA_ADDR, len : EVE1_DATA_SIZE }]; memory[index++] = ["EVE2_VECS_MEM", { comment : "EVE2_VECS_MEM", name : "EVE2_VECS_MEM", base : EVE2_VECS_ADDR, len : EVE2_VECS_SIZE }]; memory[index++] = ["EVE2_CODE_MEM", { comment : "EVE2_CODE_MEM", name : "EVE2_CODE_MEM", base : EVE2_CODE_ADDR, len : EVE2_CODE_SIZE }]; memory[index++] = ["EVE2_DATA_MEM", { comment : "EVE2_DATA_MEM", name : "EVE2_DATA_MEM", base : EVE2_DATA_ADDR, len : EVE2_DATA_SIZE }]; memory[index++] = ["SR1_FRAME_BUFFER_MEM", { comment : "SR1_FRAME_BUFFER_MEM", name : "SR1_FRAME_BUFFER_MEM", base : SR1_FRAME_BUFFER_ADDR, len : SR1_FRAME_BUFFER_SIZE }]; memory[index++] = ["SR1_BUFF_ECC_ASIL_MEM", { comment : "SR1_BUFF_ECC_ASIL_MEM", name : "SR1_BUFF_ECC_ASIL_MEM", base : SR1_BUFF_ECC_ASIL_ADDR, len : SR1_BUFF_ECC_ASIL_SIZE }]; memory[index++] = ["SR1_BUFF_ECC_QM_MEM", { comment : "SR1_BUFF_ECC_QM_MEM", name : "SR1_BUFF_ECC_QM_MEM", base : SR1_BUFF_ECC_QM_ADDR, len : SR1_BUFF_ECC_QM_SIZE }]; memory[index++] = ["SR1_BUFF_NON_ECC_ASIL_MEM", { comment : "SR1_BUFF_NON_ECC_ASIL_MEM", name : "SR1_BUFF_NON_ECC_ASIL_MEM", base : SR1_BUFF_NON_ECC_ASIL_ADDR, len : SR1_BUFF_NON_ECC_ASIL_SIZE }]; memory[index++] = ["SR0", { comment : "SR0", name : "SR0", base : SR0_ADDR, len : SR0_SIZE }]; memory[index++] = ["HDVPSS_DESC_MEM", { comment : "HDVPSS_DESC_MEM", name : "HDVPSS_DESC_MEM", base : HDVPSS_DESC_ADDR, len : HDVPSS_DESC_SIZE }]; memory[index++] = ["REMOTE_LOG_MEM", { comment : "REMOTE_LOG_MEM", name : "REMOTE_LOG_MEM", base : REMOTE_LOG_ADDR, len : REMOTE_LOG_SIZE }]; memory[index++] = ["LINK_STATS_MEM", { comment : "LINK_STATS_MEM", name : "LINK_STATS_MEM", base : LINK_STATS_ADDR, len : LINK_STATS_SIZE }]; memory[index++] = ["SYSTEM_IPC_SHM_MEM", { comment : "SYSTEM_IPC_SHM_MEM", name : "SYSTEM_IPC_SHM_MEM", base : SYSTEM_IPC_SHM_ADDR, len : SYSTEM_IPC_SHM_SIZE }]; xdc.print("# !!! Core is [" + core + "] !!!" ); memory[index++] = ["DSP1_L2_SRAM", { comment: "DSP1_L2_SRAM", name: "DSP1_L2_SRAM", base: DSP1_L2_SRAM_ADDR, len: DSP1_L2_SRAM_SIZE }]; memory[index++] = ["DSP2_L2_SRAM", { comment: "DSP2_L2_SRAM", name: "DSP2_L2_SRAM", base: DSP2_L2_SRAM_ADDR, len: DSP2_L2_SRAM_SIZE }]; if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { /* This is a dummy section needed for OpenCL */ L1DSRAM_ADDR = 0x00F00000; L1DSRAM_SIZE = 0x00008000; OCL_LOCAL_ADDR = 0x0083B000; OCL_LOCAL_SIZE = 0x00004000; memory[index++] = ["L1DSRAM", { comment: "L1DSRAM", name: "L1DSRAM", base: L1DSRAM_ADDR, len: L1DSRAM_SIZE }]; } if(java.lang.System.getenv("OPENVX_INCLUDE")=="yes") { memory[index++] = ["OPENVX_SHM_MEM", { comment: "OPENVX_SHM_MEM", name: "OPENVX_SHM_MEM", base: OPENVX_SHM_ADDR, len: OPENVX_SHM_SIZE }]; } return (memory); } 2. vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg /******************************************************************************* * file name: a15_0.cfg * Set A15 core 0 specific configuration * *******************************************************************************/ var CurrentPlatform = java.lang.System.getenv("PLATFORM"); var DualA15_smpbios = java.lang.System.getenv("DUAL_A15_SMP_BIOS"); var OpenCL = java.lang.System.getenv("OPENCL_INCLUDE"); var OpenCV = java.lang.System.getenv("ENABLE_OPENCV"); xdc.print("# !!! Current build platform is [" + CurrentPlatform + "] !!!" ); xdc.loadPackage('ti.sysbios').profile = "release"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/BIOS_common.cfg"); /* root of the configuration object model */ var Program = xdc.useModule('xdc.cfg.Program'); xdc.useModule('ti.sysbios.gates.GateHwi'); var BIOS = xdc.useModule('ti.sysbios.BIOS'); if(OpenCL=="yes") { var SecondsClock = xdc.useModule('ti.sysbios.hal.SecondsClock'); } BIOS.cpuFreq.hi = 0; BIOS.cpuFreq.lo = 750000000; /* 750 MHz */ if(DualA15_smpbios=="yes") { BIOS.smpEnabled = true; } else { BIOS.smpEnabled = false; } /* * ======== IPC Configuration ======== */ Program.global.procName = "HOST"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/IPC_common.cfg"); var NdkProcToUse = java.lang.System.getenv("NDK_PROC_TO_USE"); if(NdkProcToUse=="a15_0") { xdc.print("# !!! Linking to NDK !!!" ); xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/NDK_config.cfg"); } /* * ======== Operating System Configuration ======== */ /* no rts heap */ Program.heap = 0; Program.argSize = 100; /* minimum size */ if(OpenCL=="yes") { Program.stack = 0x4000; } else { Program.stack = 0x4000; } /* create a default heap */ var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var heapMemParams = new HeapMem.Params(); if(OpenCL=="yes") { heapMemParams.size = 0x6000000; } else { heapMemParams.size = 0x600000; } var Memory = xdc.useModule('xdc.runtime.Memory'); Memory.defaultHeapInstance = HeapMem.create(heapMemParams); if(OpenCL=="yes") { Memory.defaultHeapSize = 0x6000000; } /* Enable Cache */ if(DualA15_smpbios=="yes") { var Cache = xdc.useModule('ti.sysbios.family.arm.a15.smp.Cache'); } else { var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache'); } Cache.enableCache = true; /*********************************************** * MMU Configuration * ***********************************************/ var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu'); Mmu.enableMMU = true; /****************************************************************************** * * SYS/BIOS assigns the following defaults to MAIR0 ATTR0, ATTR1 and ATTR2: * * ATTR0 -> 0x44 (mark memory region as non-cacheable normal memory) * ATTR1 -> 0x00 (mark memory region as device memory, i.e. strongly * ordered and non-cacheable) * ATTR2 -> 0xFF (mark memory region as normal memory, RW cacheable and * RW allocate) ****************************************************************************** */ // descriptor attribute structure var attrs0 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs0); attrs0.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs0.noExecute = true; // not executable attrs0.accPerm = 0; // read/write at PL1 attrs0.shareable = 2; // shareable attrs0.attrIndx = 1; // strongly ordered and non-cacheable // Set the descriptor for each entry in the address range // NOTE: Currently mapping all region as non-cacheable, device memory. //If in future application want to use OCMC memories it needs to remove corresponding MMU entries from below and make it cacheable. for (var i=0x40000000; i < 0x60000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs0); } // descriptor attribute structure var attrs1 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs1); attrs1.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs1.shareable = 2; // sharerable attrs1.attrIndx = 2; // Cached, normal memory // Set the descriptor for each entry in the address range for (var i=0x80000000; i < 0xC0000000; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs1); } // descriptor attribute structure var attrs2 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs2); attrs2.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs2.shareable = 2; // sharerable attrs2.attrIndx = 0; // Non-cache, normal memory // Set the descriptor for each entry in the address range for (var i=0xA0000000; i <= 0xFFFFFFFF; i = i + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(i, i, attrs2); } // Region for NDK packet data buffers. for (var i = 0; i < Program.cpu.memoryMap.length; i++) { memSegment = Program.cpu.memoryMap[i]; if (memSegment.name == "NDK_MEM") { var attrs3 = new Mmu.DescriptorAttrs(); Mmu.initDescAttrsMeta(attrs3); attrs3.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs3.noExecute = true; // not executable attrs3.shareable = 2; // shareable attrs3.accPerm = 0; // read/write at PL1 attrs3.attrIndx = 2; // Mark mem regions as cached, normal memory // Set the descriptor for each entry in the address range for (var j=memSegment.base; j < (memSegment.base + memSegment.len); j = j + 0x00200000) { // Each 'BLOCK' descriptor entry spans a 2MB address range Mmu.setSecondLevelDescMeta(j, j, attrs3); } } } /* .text is allocated as per "codeMemory" defined in .bld file. * .data, .stack, .bss, .sysmem, etc are allocated as per * "dataMemory" defined in .bld file */ Program.sectMap[".bss:extMemNonCache:remoteLogCoreShm"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:hcfResourceTable"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:ipcShm"] = "SYSTEM_IPC_SHM_MEM"; Program.sectMap[".bss:extMemNonCache:linkStats"] = "LINK_STATS_MEM"; if (java.lang.System.getenv("OPENVX_INCLUDE") == "yes") { Program.sectMap[".bss:extMemNonCache:tiovxObjDescShm"] = "OPENVX_SHM_MEM"; } Program.sectMap[".bss:NDK_PACKETMEM"] = "NDK_MEM"; Program.sectMap[".bss:NDK_MMBUFFER"] = "NDK_MEM"; var InitXbar = xdc.useModule("ti.sysbios.family.shared.vayu.IntXbar"); /* Exception hook function */ var ExceptionA15 = xdc.useModule('ti.sysbios.family.arm.exc.Exception'); /* enable print of exception handing info */ ExceptionA15.excHookFunc ='&Utils_a15ExceptionHookFxn'; ExceptionA15.enableDecode=true; /* XDC runtime function */ var Error = xdc.useModule("xdc.runtime.Error"); Error.raiseHook = "&Utils_commonErrorRaiseHook"; /* Add an idle thread 'Utils_idleFxn' that monitors interrupts. */ var Idle = xdc.useModule("ti.sysbios.knl.Idle"); if (DualA15_smpbios == "yes") { Idle.addCoreFunc('&Utils_idleFxn', 0); Idle.addCoreFunc('&Utils_idleFxn', 1); } else { Idle.addFunc('&Utils_idleFxn'); } /* Assign GPTimer2 to be used for BIOS Clock 1-ms tick */ /*********************************************** * CLOCK Module Configuraion * ***********************************************/ var Clock = xdc.useModule("ti.sysbios.knl.Clock"); if(OpenCL=="yes") { Clock.tickMode = Clock.TickMode_PERIODIC; } else { Clock.tickMode = Clock.TickMode_PERIODIC; Clock.tickSource = Clock.TickSource_USER; } /*********************************************** * Timer Module Configuraion * ***********************************************/ /* Assign GPTimer2 to be used for Timestamp */ /* Set to 1-ms Tick and Enable Wakeup for OVF interrupt */ var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams = new Timer.Params(); timerParams.period = 1000; timerParams.twer.ovf_wup_ena = 1; timerParams.tiocpCfg.emufree = 1; timerParams.tsicr.posted = 0; /* Timer ID = 1 for GPTimer2 and input clock runs at 20 MHz */ Timer.intFreqs[1].hi = 0; Timer.intFreqs[1].lo = 20000000; Timer.create(1, '&mainA15TimerTick', timerParams); /* Assign GPTimer3 to be used for Timestamp */ /* Timer ID = 2 for GPTimer3 and input clock runs at 20 MHz */ var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams2 = new DMTimer.Params(); timerParams2.tsicr.posted = 0; DMTimer.intFreqs[2].hi = 0; DMTimer.intFreqs[2].lo = 20000000; var DMTimestampProvider = xdc.useModule("ti.sysbios.timers.dmtimer.TimestampProvider"); DMTimestampProvider.timerId = 2; DMTimestampProvider.useClockTimer = false; var Timestamp = xdc.useModule("xdc.runtime.Timestamp"); Timestamp.SupportProxy = DMTimestampProvider; /* Indicate GPT2 & GPT3 are used */ var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport'); TimerSupport.availMask = 0x0006; /* In order to check how much percentange of Idle time the CPU is in Low power */ var LocalTimestampProvider = xdc.useModule('ti.sysbios.family.arm.a15.TimestampProvider'); /* Add POSIX Support */ if(OpenCV=="yes") { var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; } if(OpenCL=="yes") { var Settings = xdc.useModule('ti.sysbios.posix.Settings'); Settings.supportsMutexPriority = true; xdc.global.oclProcName = "HOST"; var OCL = xdc.useModule('ti.opencl.OpenCL'); OCL.computeUnitList = "0"; OCL.OCL_ipc_customized = true; OCL.OCL_memory_customized =true; OCL.OCL_HOSTPROG_base = Program.cpu.memoryMap["A15_0_DATA_MEM"].base; OCL.OCL_HOSTPROG_len = Program.cpu.memoryMap["SR1_FRAME_BUFFER_MEM"].base - Program.cpu.memoryMap["A15_0_DATA_MEM"].base + Program.cpu.memoryMap["SR1_FRAME_BUFFER_MEM"].len; OCL.OCL_GLOBAL_base = Program.cpu.memoryMap["EVE2_CODE_MEM"].base; OCL.OCL_GLOBAL_len = Program.cpu.memoryMap["EVE2_CODE_MEM"].len; OCL.OCL_LOCAL_base = Program.cpu.memoryMap["OCMC_RAM2"].base; OCL.OCL_LOCAL_len = Program.cpu.memoryMap["OCMC_RAM2"].len; } 3. vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ipu1_0.cfg /******************************************************************************* * file name: Ipu1_0.cfg * Set IPU1 core0 specific configuration * Platform: VAYU_bios_elf * Target: ti.targets.arm.elf.M4 * *******************************************************************************/ var CurrentPlatform = java.lang.System.getenv("PLATFORM"); var A15TargetOS = java.lang.System.getenv("A15_TARGET_OS"); if (A15TargetOS == "Qnx") { A15TargetOS = "Linux"; } xdc.print("# !!! Current build platform is [" + CurrentPlatform + "] !!!" ); xdc.loadPackage('ti.sysbios').profile = "release"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/BIOS_common.cfg"); var NdkProcToUse = java.lang.System.getenv("NDK_PROC_TO_USE"); if(NdkProcToUse=="ipu1_0") { xdc.print("# !!! Linking to NDK !!!" ); xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/NDK_config.cfg"); } var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); /* root of the configuration object model */ var Program = xdc.useModule('xdc.cfg.Program'); var GIO = xdc.useModule('ti.sysbios.io.GIO'); var Core = xdc.useModule('ti.sysbios.family.arm.ducati.Core'); /* set the ipuId and coreId */ Core.ipuId = 1; Core.id = 0; var BIOS = xdc.useModule('ti.sysbios.BIOS'); if (A15TargetOS == "Linux") { BIOS.smpEnabled = true; } else { BIOS.smpEnabled = false; } /* Physical address of VPDMA desc is HDVPSS_DESC_ADDR */ Program.global.XDC_CFG_VPDMA_DESC_PHYS_ADDR = Program.cpu.memoryMap['HDVPSS_DESC_MEM'].base; /* Memory section address and size */ Program.global.XDC_SR1_FRAME_BUFFER_ADDR = Program.cpu.memoryMap['SR1_FRAME_BUFFER_MEM'].base; Program.global.XDC_SR1_FRAME_BUFFER_SIZE = Program.cpu.memoryMap['SR1_FRAME_BUFFER_MEM'].len; Program.global.XDC_SR1_BUFF_ECC_ASIL_ADDR = Program.cpu.memoryMap['SR1_BUFF_ECC_ASIL_MEM'].base; Program.global.XDC_SR1_BUFF_ECC_ASIL_SIZE = Program.cpu.memoryMap['SR1_BUFF_ECC_ASIL_MEM'].len; Program.global.XDC_SR1_BUFF_ECC_QM_ADDR = Program.cpu.memoryMap['SR1_BUFF_ECC_QM_MEM'].base; Program.global.XDC_SR1_BUFF_ECC_QM_SIZE = Program.cpu.memoryMap['SR1_BUFF_ECC_QM_MEM'].len; Program.global.XDC_SR1_BUFF_NON_ECC_ASIL_ADDR = Program.cpu.memoryMap['SR1_BUFF_NON_ECC_ASIL_MEM'].base; Program.global.XDC_SR1_BUFF_NON_ECC_ASIL_SIZE = Program.cpu.memoryMap['SR1_BUFF_NON_ECC_ASIL_MEM'].len; /* * ======== IPU1 CORE0 Processor (primary core) ======== * AMMU config need to be done only on one core * This is done in primary core (CORE0) , so do it here */ /*********************************************** * Ammu Configuraiton * ***********************************************/ if (A15TargetOS == "Linux") { var ammu = xdc.loadCapsule("Ammu1_linux.cfg"); } if (A15TargetOS == "Bios") { var ammu = xdc.loadCapsule("Ammu1_bios.cfg"); } ammu.init(); /* * ======== IPC Configuration ======== */ Program.global.procName = "IPU1-0"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/IPC_common.cfg"); /* * ======== Operating System Configuration ======== */ /* no rts heap */ Program.heap = 0; Program.argSize = 100; /* minimum size */ Program.stack = 0x4000; /* create a default heap */ var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var heapMemParams = new HeapMem.Params(); heapMemParams.size = 0x40000; var Memory = xdc.useModule('xdc.runtime.Memory'); Memory.defaultHeapInstance = HeapMem.create(heapMemParams); Memory.defaultHeapSize = 0x15000; Program.sectMap[".bss:extMemNonCache:remoteLogCoreShm"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:hcfResourceTable"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:ipcShm"] = "SYSTEM_IPC_SHM_MEM"; Program.sectMap[".bss:extMemNonCache:linkStats"] = "LINK_STATS_MEM"; if (java.lang.System.getenv("OPENVX_INCLUDE") == "yes") { Program.sectMap[".bss:extMemNonCache:tiovxObjDescShm"] = "OPENVX_SHM_MEM"; } Program.sectMap[".text"] = "IPU1_0_CODE_MEM"; Program.sectMap[".const"] = "IPU1_0_CODE_MEM"; Program.sectMap[".plt"] = "IPU1_0_CODE_MEM"; Program.sectMap[".data"] = "IPU1_0_DATA_MEM"; Program.sectMap[".bss"] = "IPU1_0_DATA_MEM"; Program.sectMap[".neardata"] = "IPU1_0_DATA_MEM"; Program.sectMap[".rodata"] = "IPU1_0_DATA_MEM"; Program.sectMap[".bss:taskStackSection"] = "IPU1_0_DATA_MEM"; var ipu_pri = java.lang.System.getenv("IPU_PRIMARY_CORE"); if (ipu_pri == "ipu1_0") { Program.sectMap[".bss:extMemNonCache:vpdma"] = "HDVPSS_DESC_MEM"; Program.sectMap[".bss:heapMemDDR"] = "SR1_FRAME_BUFFER_MEM"; Program.sectMap[".bss:heapMemDDREccAsil"] = "SR1_BUFF_ECC_ASIL_MEM"; Program.sectMap[".bss:heapMemDDREccQM"] = "SR1_BUFF_ECC_QM_MEM"; Program.sectMap[".bss:heapMemDDRNonEccAsil"] = "SR1_BUFF_NON_ECC_ASIL_MEM"; Program.sectMap[".bss:heapMemOCMC"] = "OCMC_RAM1"; Program.sectMap[".bss:NDK_PACKETMEM"] = "NDK_MEM"; Program.sectMap[".bss:NDK_MMBUFFER"] = "NDK_MEM"; var DSP1_DATA_MEM = Program.cpu.memoryMap['DSP1_DATA_MEM']; Program.global.gXdcDsp1DataAddr = DSP1_DATA_MEM.base; Program.global.gXdcDsp1DataSize = DSP1_DATA_MEM.len; var DSP2_DATA_MEM = Program.cpu.memoryMap['DSP2_DATA_MEM']; Program.global.gXdcDsp2DataAddr = DSP2_DATA_MEM.base; Program.global.gXdcDsp2DataSize = DSP2_DATA_MEM.len; var EVE1_DATA_MEM = Program.cpu.memoryMap['EVE1_DATA_MEM']; Program.global.gXdcEve1DataAddr = EVE1_DATA_MEM.base; Program.global.gXdcEve1DataSize = EVE1_DATA_MEM.len; /* The following value is used by L3FW, so subtract 0x20000000 to get * physical address. M4 uses the alias at 0xA0000000. */ var LINK_STATS_MEM = Program.cpu.memoryMap['LINK_STATS_MEM']; Program.global.gXdcLinkStatsAddr = LINK_STATS_MEM.base - 0x20000000; Program.global.gXdcLinkStatsSize = LINK_STATS_MEM.len; if(java.lang.System.getenv("IVAHD_INCLUDE")=="yes") { xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/RMAN_IRES_iva.cfg"); } } /* Exception hook function */ var HwiM3 = xdc.useModule('ti.sysbios.family.arm.m3.Hwi'); /* enable print of exception handing info */ HwiM3.enableException = true; HwiM3.nvicCCR.DIV_0_TRP = 1; HwiM3.excHookFunc = '&Utils_m4ExceptionHookFxn'; /* XDC runtime function */ var Error = xdc.useModule("xdc.runtime.Error"); Error.raiseHook = "&Utils_commonErrorRaiseHook"; var InitXbar = xdc.useModule("ti.sysbios.family.shared.vayu.IntXbar"); /* Add an idle thread 'Utils_idleFxn' that monitors interrupts. */ var Idle = xdc.useModule("ti.sysbios.knl.Idle"); Idle.addFunc('&Utils_idleFxn'); if (A15TargetOS == "Linux") { xdc.loadCapsule("src/rtos/bios_app_common/tda2px/ipu1_0/Ipu1_0_a15_linux.cfg"); } else { /*********************************************** * CLOCK Module Configuraion * ***********************************************/ var Clock = xdc.useModule("ti.sysbios.knl.Clock"); Clock.tickMode = Clock.TickMode_PERIODIC; Clock.tickSource = Clock.TickSource_USER; /*********************************************** * Timer Module Configuraion * ***********************************************/ var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); Timer.intFreqs[8].hi = 0; /* system clock runs at 20 MHz */ Timer.intFreqs[8].lo = 20000000; var timerParams = new Timer.Params(); timerParams.period = 1000; timerParams.twer.ovf_wup_ena = 1; timerParams.tiocpCfg.emufree = 1; timerParams.tsicr.posted = 0; Timer.create(8, '&mainIPU1_C0TimerTick', timerParams); var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams2 = new DMTimer.Params(); timerParams2.tsicr.posted = 0; DMTimer.intFreqs[10].hi = 0; DMTimer.intFreqs[10].lo = 20000000; var DMTimestampProvider = xdc.useModule("ti.sysbios.timers.dmtimer.TimestampProvider"); DMTimestampProvider.timerId = 10; DMTimestampProvider.useClockTimer = false; var Timestamp = xdc.useModule("xdc.runtime.Timestamp"); Timestamp.SupportProxy = DMTimestampProvider; /* allocate timer 9 to IPU0 */ var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport'); TimerSupport.availMask = 0x0500; if (java.lang.System.getenv("ENABLE_TASK_PROFILE_UTIL") == "yes") { /*********************************************** * Task Timer utility * ***********************************************/ var Task = xdc.useModule('ti.sysbios.knl.Task'); /* Define and add one Task Hook Set */ Task.addHookSet({ registerFxn: '&Utils_taskTimerRegisterHook', createFxn: '&Utils_taskTimerCreateHook', readyFxn: '&Utils_taskTimerReadyHook', switchFxn: '&Utils_taskTimerSwitchHook', exitFxn: '&Utils_taskTimerExitHook', deleteFxn: '&Utils_taskTimerDeleteHook', }); } } /* In order to check how much percentange of Idle time the CPU is in Low power */ var LocalTimestampProvider = xdc.useModule('ti.sysbios.family.arm.ducati.TimestampProvider'); 4. vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg /******************************************************************************* * file name: Ammu1.cfg * Set IPU1 (core 0 and core 1) AMMU configuration * *******************************************************************************/ /****************************************************************************** * * NOTE: * * Region 0x42000000 to 0x44000000 (32MB) is BitBand region in IPU. * * Any L3/L4 peripherals mapped to this region must be accsssed via virtual * address on IPU side. * * On TDA2xx below peripherals fall in this BitBand region * - EVE1/2/3/4 MBOX0/1 * - System EDMA * * Further IPC package by default acceses System mailbox's on IPU side via * virtual address's * * In AMMU config, one large page can be used to do this virutal to physical * address mapping as shown below, * * Virutal Address Physical Address * 0x60000000:0x7FFFFFFF -> 0x40000000:0x5FFFFFFF (512MB) * * However this wastes a large page which can be used for other purposes * Ex, mapping GPMC NOR memory of 64MB. * * Hence AMMU config below maps multiple small and medium pages to specific * address ranges of the required peripherals. * ****************************************************************************** */ function init() { var Program = xdc.useModule('xdc.cfg.Program'); var Cache = xdc.useModule('ti.sysbios.hal.unicache.Cache'); Cache.enableCache = true; var AMMU = xdc.useModule('ti.sysbios.hal.ammu.AMMU'); AMMU.configureAmmu = true; /*********************** Medium Pages *************************/ /* ISS */ var entry = AMMU.mediumPages[0]; entry.pageEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62200000; entry.translatedAddress = 0x42200000; entry.translationEnabled = AMMU.Enable_YES; entry.size = AMMU.Medium_256K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_THROUGH; entry.L1_allocate = AMMU.AllocatePolicy_NON_ALLOCATE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* ISS */ var entry = AMMU.mediumPages[1]; entry.pageEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62240000; entry.translatedAddress = 0x42240000; entry.translationEnabled = AMMU.Enable_YES; entry.size = AMMU.Medium_256K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_THROUGH; entry.L1_allocate = AMMU.AllocatePolicy_NON_ALLOCATE; entry.L1_posted = AMMU.PostedPolicy_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /*********************** Small Pages *************************/ /* EVE1 MBOX0 */ var entry = AMMU.smallPages[2]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62088000; entry.translatedAddress = 0x42088000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE1 MBOX1 */ var entry = AMMU.smallPages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x6208C000; entry.translatedAddress = 0x4208C000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE2 MBOX0 */ var entry = AMMU.smallPages[4]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62188000; entry.translatedAddress = 0x42188000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE2 MBOX1 */ var entry = AMMU.smallPages[5]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x6218C000; entry.translatedAddress = 0x4218C000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System EDMA TPCC */ var entry = AMMU.smallPages[6]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x63300000; entry.translatedAddress = 0x43300000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System EDMA TPCC */ var entry = AMMU.smallPages[7]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x63304000; entry.translatedAddress = 0x43304000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System Mailbox 5, 6 */ var entry = AMMU.smallPages[8]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x68840000; entry.translatedAddress = 0x48840000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System Mailbox 7, 8 */ var entry = AMMU.smallPages[9]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x68844000; entry.translatedAddress = 0x48844000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /*********************** Large Pages *************************/ var entry = AMMU.largePages[0]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x40000000; entry.translatedAddress = 0x40000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* map program code/data memory into ammu (cacheable) */ var entry = AMMU.largePages[1]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x80000000; entry.translatedAddress = 0x80000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_POSTED; entry.L1_allocate = AMMU.AllocatePolicy_ALLOCATE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_BACK; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* map SR_0 data memory into ammu (non-cacheable) */ var entry = AMMU.largePages[2]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x60000000; entry.translatedAddress = 0x40000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; } 5. vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ipu2.cfg /******************************************************************************* * file name: Ipu2.cfg * Set IPU2 core0 & core1 specific configuration * Platform: VAYU_bios_elf * Target: ti.targets.arm.elf.M4 * *******************************************************************************/ var CurrentPlatform = java.lang.System.getenv("PLATFORM"); var A15TargetOS = java.lang.System.getenv("A15_TARGET_OS"); if (A15TargetOS == "Qnx") { A15TargetOS = "Linux"; } xdc.print("# !!! Current build platform is [" + CurrentPlatform + "] !!!" ); xdc.loadPackage('ti.sysbios').profile = "release"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/BIOS_common.cfg"); var NdkProcToUse = java.lang.System.getenv("NDK_PROC_TO_USE"); if(NdkProcToUse=="ipu2") { xdc.print("# !!! Linking to NDK !!!" ); xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/NDK_config.cfg"); } var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); /* root of the configuration object model */ var Program = xdc.useModule('xdc.cfg.Program'); var GIO = xdc.useModule('ti.sysbios.io.GIO'); var Core = xdc.useModule('ti.sysbios.family.arm.ducati.Core'); /* set the ipuId and coreId */ Core.ipuId = 2; Core.id = 0; var BIOS = xdc.useModule('ti.sysbios.BIOS'); BIOS.smpEnabled = true; /* Physical address of VPDMA desc is HDVPSS_DESC_ADDR */ Program.global.XDC_CFG_VPDMA_DESC_PHYS_ADDR = Program.cpu.memoryMap['HDVPSS_DESC_MEM'].base; /* Memory section address and size */ Program.global.XDC_SR1_FRAME_BUFFER_ADDR = Program.cpu.memoryMap['SR1_FRAME_BUFFER_MEM'].base; Program.global.XDC_SR1_FRAME_BUFFER_SIZE = Program.cpu.memoryMap['SR1_FRAME_BUFFER_MEM'].len; Program.global.XDC_SR1_BUFF_ECC_ASIL_ADDR = Program.cpu.memoryMap['SR1_BUFF_ECC_ASIL_MEM'].base; Program.global.XDC_SR1_BUFF_ECC_ASIL_SIZE = Program.cpu.memoryMap['SR1_BUFF_ECC_ASIL_MEM'].len; Program.global.XDC_SR1_BUFF_ECC_QM_ADDR = Program.cpu.memoryMap['SR1_BUFF_ECC_QM_MEM'].base; Program.global.XDC_SR1_BUFF_ECC_QM_SIZE = Program.cpu.memoryMap['SR1_BUFF_ECC_QM_MEM'].len; Program.global.XDC_SR1_BUFF_NON_ECC_ASIL_ADDR = Program.cpu.memoryMap['SR1_BUFF_NON_ECC_ASIL_MEM'].base; Program.global.XDC_SR1_BUFF_NON_ECC_ASIL_SIZE = Program.cpu.memoryMap['SR1_BUFF_NON_ECC_ASIL_MEM'].len; /* * ======== IPU2 CORE0 Processor (primary core) ======== * AMMU config need to be done only on one core * This is done in primary core (CORE0) , so do it here */ /*********************************************** * Ammu Configuraiton * ***********************************************/ if (A15TargetOS == "Linux") { var ammu = xdc.loadCapsule("Ammu2_linux.cfg"); } if (A15TargetOS == "Bios") { var ammu = xdc.loadCapsule("Ammu2_bios.cfg"); } ammu.init(); /* * ======== IPC Configuration ======== */ Program.global.procName = "IPU2"; xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/IPC_common.cfg"); /* * ======== Operating System Configuration ======== */ /* no rts heap */ Program.heap = 0; Program.argSize = 100; /* minimum size */ Program.stack = 0x4000; /* create a default heap */ var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); var heapMemParams = new HeapMem.Params(); heapMemParams.size = 0x40000; var Memory = xdc.useModule('xdc.runtime.Memory'); Memory.defaultHeapInstance = HeapMem.create(heapMemParams); Memory.defaultHeapSize = 0x15000; Program.sectMap[".bss:extMemNonCache:remoteLogCoreShm"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:hcfResourceTable"] = "REMOTE_LOG_MEM"; Program.sectMap[".bss:extMemNonCache:ipcShm"] = "SYSTEM_IPC_SHM_MEM"; Program.sectMap[".bss:extMemNonCache:linkStats"] = "LINK_STATS_MEM"; if (java.lang.System.getenv("OPENVX_INCLUDE") == "yes") { Program.sectMap[".bss:extMemNonCache:tiovxObjDescShm"] = "OPENVX_SHM_MEM"; } Program.sectMap[".text"] = "IPU2_CODE_MEM"; Program.sectMap[".const"] = "IPU2_CODE_MEM"; Program.sectMap[".plt"] = "IPU2_CODE_MEM"; Program.sectMap[".data"] = "IPU2_DATA_MEM"; Program.sectMap[".bss"] = "IPU2_DATA_MEM"; Program.sectMap[".neardata"] = "IPU2_DATA_MEM"; Program.sectMap[".rodata"] = "IPU2_DATA_MEM"; Program.sectMap[".bss:taskStackSection"] = "IPU2_DATA_MEM"; var ipu_pri = java.lang.System.getenv("IPU_PRIMARY_CORE"); if (ipu_pri == "ipu2") { Program.sectMap[".bss:extMemNonCache:vpdma"] = "HDVPSS_DESC_MEM"; Program.sectMap[".bss:heapMemDDR"] = "SR1_FRAME_BUFFER_MEM"; Program.sectMap[".bss:heapMemDDREccAsil"] = "SR1_BUFF_ECC_ASIL_MEM"; Program.sectMap[".bss:heapMemDDREccQM"] = "SR1_BUFF_ECC_QM_MEM"; Program.sectMap[".bss:heapMemDDRNonEccAsil"] = "SR1_BUFF_NON_ECC_ASIL_MEM"; Program.sectMap[".bss:heapMemOCMC"] = "OCMC_RAM1"; Program.sectMap[".bss:NDK_PACKETMEM"] = "NDK_MEM"; Program.sectMap[".bss:NDK_MMBUFFER"] = "NDK_MEM"; var DSP1_DATA_MEM = Program.cpu.memoryMap['DSP1_DATA_MEM']; Program.global.gXdcDsp1DataAddr = DSP1_DATA_MEM.base; Program.global.gXdcDsp1DataSize = DSP1_DATA_MEM.len; var DSP2_DATA_MEM = Program.cpu.memoryMap['DSP2_DATA_MEM']; Program.global.gXdcDsp2DataAddr = DSP2_DATA_MEM.base; Program.global.gXdcDsp2DataSize = DSP2_DATA_MEM.len; var EVE1_DATA_MEM = Program.cpu.memoryMap['EVE1_DATA_MEM']; Program.global.gXdcEve1DataAddr = EVE1_DATA_MEM.base; Program.global.gXdcEve1DataSize = EVE1_DATA_MEM.len; /* The following value is used by L3FW, so subtract 0x20000000 to get * physical address. M4 uses the alias at 0xA0000000. */ var LINK_STATS_MEM = Program.cpu.memoryMap['LINK_STATS_MEM']; Program.global.gXdcLinkStatsAddr = LINK_STATS_MEM.base - 0x20000000; Program.global.gXdcLinkStatsSize = LINK_STATS_MEM.len; if(java.lang.System.getenv("IVAHD_INCLUDE")=="yes") { xdc.loadCapsule("src/rtos/bios_app_common/tda2px/cfg/RMAN_IRES_iva.cfg"); } } /* Exception hook function */ var HwiM3 = xdc.useModule('ti.sysbios.family.arm.m3.Hwi'); /* enable print of exception handing info */ HwiM3.enableException = true; HwiM3.nvicCCR.DIV_0_TRP = 1; HwiM3.excHookFunc = '&Utils_m4ExceptionHookFxn'; /* XDC runtime function */ var Error = xdc.useModule("xdc.runtime.Error"); Error.raiseHook = "&Utils_commonErrorRaiseHook"; var InitXbar = xdc.useModule("ti.sysbios.family.shared.vayu.IntXbar"); /* Add an idle thread 'Utils_idleFxn' that monitors interrupts. */ var Idle = xdc.useModule("ti.sysbios.knl.Idle"); Idle.addCoreFunc('&Utils_idleFxn', 0); Idle.addCoreFunc('&Utils_idleFxn', 1); if (A15TargetOS == "Linux") { xdc.loadCapsule("src/rtos/bios_app_common/tda2px/ipu2/Ipu2_a15_linux.cfg"); } else { /*********************************************** * CLOCK Module Configuraion * ***********************************************/ var Clock = xdc.useModule("ti.sysbios.knl.Clock"); Clock.tickMode = Clock.TickMode_PERIODIC; Clock.tickSource = Clock.TickSource_USER; /*********************************************** * Timer Module Configuraion * ***********************************************/ var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); Timer.intFreqs[8].hi = 0; /* system clock runs at 20 MHz */ Timer.intFreqs[8].lo = 20000000; var timerParams = new Timer.Params(); timerParams.period = 1000; timerParams.twer.ovf_wup_ena = 1; timerParams.tiocpCfg.emufree = 1; timerParams.tsicr.posted = 0; Timer.create(8, '&mainIPU2_TimerTick', timerParams); var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); var timerParams2 = new DMTimer.Params(); timerParams2.tsicr.posted = 0; DMTimer.intFreqs[10].hi = 0; DMTimer.intFreqs[10].lo = 20000000; var DMTimestampProvider = xdc.useModule("ti.sysbios.timers.dmtimer.TimestampProvider"); DMTimestampProvider.timerId = 10; DMTimestampProvider.useClockTimer = false; var Timestamp = xdc.useModule("xdc.runtime.Timestamp"); Timestamp.SupportProxy = DMTimestampProvider; /* allocate timer 9 to IPU0 */ var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport'); TimerSupport.availMask = 0x0500; } /* In order to check how much percentange of Idle time the CPU is in Low power */ var LocalTimestampProvider = xdc.useModule('ti.sysbios.family.arm.ducati.TimestampProvider'); 6. vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg /******************************************************************************* * file name: Ammu1.cfg * Set IPU1 (core 0 and core 1) AMMU configuration * *******************************************************************************/ /****************************************************************************** * * NOTE: * * Region 0x42000000 to 0x44000000 (32MB) is BitBand region in IPU. * * Any L3/L4 peripherals mapped to this region must be accsssed via virtual * address on IPU side. * * On TDA2xx below peripherals fall in this BitBand region * - EVE1/2/3/4 MBOX0/1 * - System EDMA * * Further IPC package by default acceses System mailbox's on IPU side via * virtual address's * * In AMMU config, one large page can be used to do this virutal to physical * address mapping as shown below, * * Virutal Address Physical Address * 0x60000000:0x7FFFFFFF -> 0x40000000:0x5FFFFFFF (512MB) * * However this wastes a large page which can be used for other purposes * Ex, mapping GPMC NOR memory of 64MB. * * Hence AMMU config below maps multiple small and medium pages to specific * address ranges of the required peripherals. * ****************************************************************************** */ function init() { var Program = xdc.useModule('xdc.cfg.Program'); var Cache = xdc.useModule('ti.sysbios.hal.unicache.Cache'); Cache.enableCache = true; var AMMU = xdc.useModule('ti.sysbios.hal.ammu.AMMU'); AMMU.configureAmmu = true; /*********************** Medium Pages *************************/ /* ISS */ var entry = AMMU.mediumPages[0]; entry.pageEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62200000; entry.translatedAddress = 0x42200000; entry.translationEnabled = AMMU.Enable_YES; entry.size = AMMU.Medium_256K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_THROUGH; entry.L1_allocate = AMMU.AllocatePolicy_NON_ALLOCATE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* ISS */ var entry = AMMU.mediumPages[1]; entry.pageEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62240000; entry.translatedAddress = 0x42240000; entry.translationEnabled = AMMU.Enable_YES; entry.size = AMMU.Medium_256K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_THROUGH; entry.L1_allocate = AMMU.AllocatePolicy_NON_ALLOCATE; entry.L1_posted = AMMU.PostedPolicy_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /*********************** Small Pages *************************/ /* EVE1 MBOX0 */ var entry = AMMU.smallPages[2]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62088000; entry.translatedAddress = 0x42088000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE1 MBOX1 */ var entry = AMMU.smallPages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x6208C000; entry.translatedAddress = 0x4208C000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE2 MBOX0 */ var entry = AMMU.smallPages[4]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x62188000; entry.translatedAddress = 0x42188000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* EVE2 MBOX1 */ var entry = AMMU.smallPages[5]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x6218C000; entry.translatedAddress = 0x4218C000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System EDMA TPCC */ var entry = AMMU.smallPages[6]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x63300000; entry.translatedAddress = 0x43300000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System EDMA TPCC */ var entry = AMMU.smallPages[7]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x63304000; entry.translatedAddress = 0x43304000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System Mailbox 5, 6 */ var entry = AMMU.smallPages[8]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x68840000; entry.translatedAddress = 0x48840000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* System Mailbox 7, 8 */ var entry = AMMU.smallPages[9]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x68844000; entry.translatedAddress = 0x48844000; entry.size = AMMU.Small_16K; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /*********************** Large Pages *************************/ var entry = AMMU.largePages[0]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x40000000; entry.translatedAddress = 0x40000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* map program code/data memory into ammu (cacheable) */ var entry = AMMU.largePages[1]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x80000000; entry.translatedAddress = 0x80000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_POSTED; entry.L1_allocate = AMMU.AllocatePolicy_ALLOCATE; entry.L1_writePolicy = AMMU.WritePolicy_WRITE_BACK; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; /* map SR_0 data memory into ammu (non-cacheable) */ var entry = AMMU.largePages[2]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0xA0000000; entry.translatedAddress = 0xA0000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; var entry = AMMU.largePages[3]; entry.pageEnabled = AMMU.Enable_YES; entry.translationEnabled = AMMU.Enable_YES; entry.logicalAddress = 0x60000000; entry.translatedAddress = 0x40000000; entry.size = AMMU.Large_512M; entry.L1_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L1_posted = AMMU.PostedPolicy_NON_POSTED; entry.L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE; entry.L2_posted = AMMU.PostedPolicy_NON_POSTED; } Regards, kyungtae + +Hi Rishabh, I refer to your xs file on e2e and make the following changes. e2e.ti.com/.../2277707 So I changed the size value below and confirmed that it boot normally. -DDR3_BASE_SIZE_0 = 1024*MB; +DDR3_BASE_SIZE_0 = 1008*MB; I am glad that your help has solved the problem. Thanks. Regards, kyungtae + +Hi, Glad that the issue is resolved. Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/30001+/807513.txt b/data2/text/range/30001+/807513.txt new file mode 100644 index 0000000000000000000000000000000000000000..d2aa616717a0f592e05cfaa3b784f196043a41d7 --- /dev/null +++ b/data2/text/range/30001+/807513.txt @@ -0,0 +1,860 @@ +Ticket Name: Linux/TDA2SX: Linux halted when root from emmc + +Query Text: +Part Number: TDA2SX Tool/software: Linux Hello， I want to use the Linux to my own board card, which is started by emmc，and the processor is TDA2SX Due to different hardware, I have modified the DTS file, attached is the DTS file I modified, and the log.txt file is the printed debugging information of kernel startup, which shows that emmc cannot be mounted. dts.tar 2086.log.txt buaawkp@buaawkp-computer:~$ sudo minicom +[sudo] buaawkp 的密码： + + +Welcome to minicom 2.7 + +OPTIONS: I18n +Compiled on Nov 15 2018, 20:18:47. +Port /dev/ttyUSB0, 16:44:58 + +Press CTRL-A Z for help on special keys + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +U-Boot SPL 2016.05-00013-g3331a8a-dirty (Jun 03 2019 - 11:42:05) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +Trying to boot from MMC2_2 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +spl: falcon_args_file not set in environment, falling back to default +reading single-stage-boot.dtb +spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05-00013-g3331a8a-dirty (Jun 03 2019 - 11:42:05 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: Could not get PHY for ethernet@48484000: addr 2 +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +134 bytes read in 2 ms (65.4 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +3476592 bytes read in 28 ms (118.4 MiB/s) +107051 bytes read in 11 ms (9.3 MiB/s) +Booting from mmc1 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x350c70 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff22a ... OK +Using machid 0xfe6 from environment + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00039-g845ce97-dirty (wang@buaawkp) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT 9 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/mmcblk1p2 ip=none mem=1024M cm6 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 394396K/1012736K available (6479K kernel code, 309K rwdata, 2312K rodata, 340K init, 288K bss, 413540K reserved, 204800) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc089e04c (8793 kB) +[ 0.000000] .init : 0xc089f000 - 0xc08f4000 ( 340 kB) +[ 0.000000] .data : 0xc08f4000 - 0xc0941420 ( 310 kB) +[ 0.000000] .bss : 0xc0943000 - 0xc098b000 ( 288 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000335] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000342] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000784] Console: colour dummy device 80x30 +[ 0.000799] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000805] This ensures that you still see kernel messages. Please +[ 0.000810] update your kernel commandline. +[ 0.000823] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000836] pid_max: default: 32768 minimum: 301 +[ 0.000931] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000941] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001481] Initializing cgroup subsys io +[ 0.001497] Initializing cgroup subsys memory +[ 0.001521] Initializing cgroup subsys devices +[ 0.001533] Initializing cgroup subsys freezer +[ 0.001544] Initializing cgroup subsys perf_event +[ 0.001555] Initializing cgroup subsys pids +[ 0.001581] CPU: Testing write buffer coherency: ok +[ 0.001780] /cpus/cpu@0 missing clock-frequency property +[ 0.001796] /cpus/cpu@1 missing clock-frequency property +[ 0.001805] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001844] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080065] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080134] Brought up 2 CPUs +[ 0.080147] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080153] CPU: All CPU(s) started in HYP mode. +[ 0.080158] CPU: Virtualization extensions available. +[ 0.080532] devtmpfs: initialized +[ 0.109324] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110292] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.312602] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.312623] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.316848] pinctrl core: initialized pinctrl subsystem +[ 0.317707] NET: Registered protocol family 16 +[ 0.318623] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340221] cpuidle: using governor ladder +[ 0.370241] cpuidle: using governor menu +[ 0.378798] OMAP GPIO hardware version 0.1 +[ 0.385259] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401903] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401916] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.409801] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.409810] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410214] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410223] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.410822] OMAP DMA hardware revision 0.0 +[ 0.451551] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452694] edma 43300000.edma: memcpy is disabled +[ 0.457534] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461916] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.462092] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462249] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462407] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462692] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462875] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.466194] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481301] palmas: probe of 0-0058 failed with error -121 +[ 0.481563] pcf857x: probe of 0-0020 failed with error -121 +[ 0.481811] pcf857x: probe of 0-0021 failed with error -121 +[ 0.481969] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.482371] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.482557] media: Linux media interface: v0.10 +[ 0.482613] Linux video capture interface: v2.00 +[ 0.482653] pps_core: LinuxPPS API ver. 1 registered +[ 0.482660] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.482683] PTP clock support registered +[ 0.482729] EDAC MC: Ver: 3.0.0 +[ 0.483487] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.483787] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.484862] clocksource: Switched to clocksource arch_sys_counter +[ 0.495292] NET: Registered protocol family 2 +[ 0.495779] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.495843] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.495968] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.496017] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.496047] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.496250] NET: Registered protocol family 1 +[ 0.496506] RPC: Registered named UNIX socket transport module. +[ 0.496515] RPC: Registered udp transport module. +[ 0.496521] RPC: Registered tcp transport module. +[ 0.496527] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.497489] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.507632] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.508291] NFS: Registering the id_resolver key type +[ 0.508316] Key type id_resolver registered +[ 0.508323] Key type id_legacy registered +[ 0.508400] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.509667] bounce: pool size: 64 pages +[ 0.509812] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.509827] io scheduler noop registered +[ 0.509838] io scheduler deadline registered +[ 0.509869] io scheduler cfq registered (default) +[ 0.514263] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.517484] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.517496] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.517528] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.517549] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.547604] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.547779] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.547791] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.547801] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.547811] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.548214] PCI: bus0: Fast back to back transfers disabled +[ 0.548332] PCI: bus1: Fast back to back transfers enabled +[ 0.548414] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.548429] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.548441] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.548658] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.609398] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.612748] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.619101] console [ttyS0] enabled +[ 1.623494] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.633197] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.643208] [drm] Initialized drm 1.1.0 20060810 +[ 1.648754] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.655440] [drm] No driver support for vblank timestamp query. +[ 1.661572] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.674335] loop: module loaded +[ 1.677860] vmemexp device MAJOR num = 245 +[ 1.681987] vmemexp class registered +[ 1.685722] /dev/vmemexp device registered +[ 1.689836] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.695529] nand: No NAND device found +[ 1.699301] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.709289] m25p80 spi32766.0: found s25fl512s, expected s25fl256s1 +[ 1.978543] m25p80 spi32766.0: s25fl512s (65536 Kbytes) +[ 1.983849] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.989728] Creating 7 MTD partitions on "spi32766.0": +[ 1.994906] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 2.001042] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 2.007416] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 2.014358] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 2.020152] mtd: partition "QSPI.u-boot-env" doesn't end on an erase block -- force read-only +[ 2.029643] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 2.036200] mtd: partition "QSPI.u-boot-env.backup1" doesn't start on an erase block boundary -- force read-only +[ 2.057404] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 2.062826] mtd: partition "QSPI.kernel" doesn't start on an erase block boundary -- force read-only +[ 2.082944] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 2.088822] mtd: partition "QSPI.file-system" doesn't start on an erase block boundary -- force read-only +[ 2.100828] libphy: Fixed MDIO Bus: probed +[ 2.154893] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.161019] davinci_mdio 48485000.mdio: detected phy mask fffffffe +[ 2.169186] libphy: 48485000.mdio: probed +[ 2.173219] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown +[ 2.181940] cpsw 48484000.ethernet: Detected MACID = 6c:c3:74:33:3c:6a +[ 2.188631] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 2.195653] cpsw 48484000.ethernet: cpsw: Detected MACID = 6c:c3:74:33:3c:6b +[ 2.204262] mousedev: PS/2 mouse device common for all mice +[ 2.210457] i2c /dev entries driver +[ 2.219809] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.225468] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.231853] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.358842] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.366926] NET: Registered protocol family 10 +[ 2.372371] sit: IPv6 over IPv4 tunneling driver +[ 2.378634] NET: Registered protocol family 17 +[ 2.383308] Key type dns_resolver registered +[ 2.387713] omap_voltage_late_init: Voltage driver support not added +[ 2.394615] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.400845] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.407095] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.413685] Power Management for TI OMAP4+ devices. +[ 2.418815] Registering SWP/SWPB emulation handler +[ 2.425039] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.432609] dmm 4e000000.dmm: initialized all PAT entries +[ 2.439075] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.446748] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.452504] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.458957] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.465954] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.472164] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.478454] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.485476] hctosys: unable to open rtc device (rtc0) +[ 2.502450] evm_1v8: disabling +[ 2.505556] evm_3v3_sw: disabling +[ 2.508887] aic_dvdd: disabling +[ 2.512039] vmmcwl_fixed: disabling +[ 2.515561] pbias_mmc_omap5: disabling +[ 2.520529] VFS: Cannot open root device "mmcblk1p2" or unknown-block(0,0): error -6 +[ 2.528366] Please append a correct "root=" boot option; here are the available partitions: +[ 2.536784] 1f00 256 mtdblock0 (driver?) +[ 2.541870] 1f01 1024 mtdblock1 (driver?) +[ 2.546979] 1f02 512 mtdblock2 (driver?) +[ 2.552062] 1f03 64 mtdblock3 (driver?) +[ 2.557166] 1f04 64 mtdblock4 (driver?) +[ 2.562249] 1f05 8192 mtdblock5 (driver?) +[ 2.567354] 1f06 22656 mtdblock6 (driver?) +[ 2.572437] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) +[ 2.580744] CPU0: stopping +[ 2.583468] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.84-00039-g845ce97-dirty #1 +[ 2.591244] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 2.597362] Backtrace: +[ 2.599840] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 2.607441] r7:c08f5ef0 r6:20000193 r5:00000000 r4:c0913690 +[ 2.613169] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 2.620428] [] (dump_stack) from [] (handle_IPI+0x184/0x198) +[ 2.627852] r7:c08f5ef0 r6:00000000 r5:00000000 r4:c08f0424 +[ 2.633575] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) +[ 2.641175] r7:fa212000 r6:c08f5ef0 r5:fa21200c r4:c08f68ec +[ 2.646895] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) +[ 2.654409] Exception stack(0xc08f5ef0 to 0xc08f5f38) +[ 2.659484] 5ee0: 00000001 00000000 fe600000 00000000 +[ 2.667699] 5f00: c08f4000 c08f64ac 00000000 00000000 c08f5f60 c065e26c c08f650c c08f5f4c +[ 2.675913] 5f20: c08f5f2c c08f5f40 c0027fec c0010600 60000013 ffffffff +[ 2.682552] r9:c065e26c r8:c08f5f60 r7:c08f5f24 r6:ffffffff r5:60000013 r4:c0010600 +[ 2.690383] [] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) +[ 2.698512] [] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) +[ 2.707170] [] (cpu_startup_entry) from [] (rest_init+0x90/0x94) +[ 2.714943] r7:00000000 +[ 2.717501] [] (rest_init) from [] (start_kernel+0x400/0x40c) +[ 2.725012] r5:c0943000 r4:c0943040 +[ 2.728622] [] (start_kernel) from [<80008090>] (0x80008090) +[ 2.735176] r10:00000000 r9:412fc0f2 r8:80007000 r7:c08fab38 r6:c08e0a24 r5:c08f6484 +[ 2.743079] r4:c0943214 +[ 2.745636] ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +U-Boot SPL 2016.05-00013-g3331a8a-dirty (Jun 03 2019 - 11:42:05) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +Trying to boot from MMC2_2 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +spl: falcon_args_file not set in environment, falling back to default +reading single-stage-boot.dtb +spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05-00013-g3331a8a-dirty (Jun 03 2019 - 11:42:05 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1.5 GiB +MMC: i2c_write: error waiting for data ACK (status=0x116) +pcf8575_i2c_write_le16 i2c write failed to addr 21 +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: Could not get PHY for ethernet@48484000: addr 2 +eth0: ethernet@48484000 +Hit any key to stop autoboot: 2 +CTRL-A Z for help | 115200 8N1 | NOR | Minicom 2.7 | VT102 | Offline | ttyUSB0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +134 bytes read in 2 ms (65.4 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +3476592 bytes read in 28 ms (118.4 MiB/s) +107051 bytes read in 11 ms (9.3 MiB/s) +Booting from mmc1 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x350c70 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff22a ... OK +Using machid 0xfe6 from environment + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00039-g845ce97-dirty (wang@buaawkp) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT 9 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/mmcblk1p2 ip=none mem=1024M cm6 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 394396K/1012736K available (6479K kernel code, 309K rwdata, 2312K rodata, 340K init, 288K bss, 413540K reserved, 204800) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc089e04c (8793 kB) +[ 0.000000] .init : 0xc089f000 - 0xc08f4000 ( 340 kB) +[ 0.000000] .data : 0xc08f4000 - 0xc0941420 ( 310 kB) +[ 0.000000] .bss : 0xc0943000 - 0xc098b000 ( 288 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000339] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000347] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000797] Console: colour dummy device 80x30 +[ 0.000812] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000818] This ensures that you still see kernel messages. Please +[ 0.000823] update your kernel commandline. +[ 0.000836] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000849] pid_max: default: 32768 minimum: 301 +[ 0.000946] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000956] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001496] Initializing cgroup subsys io +[ 0.001512] Initializing cgroup subsys memory +[ 0.001537] Initializing cgroup subsys devices +[ 0.001549] Initializing cgroup subsys freezer +[ 0.001559] Initializing cgroup subsys perf_event +[ 0.001571] Initializing cgroup subsys pids +[ 0.001597] CPU: Testing write buffer coherency: ok +[ 0.001795] /cpus/cpu@0 missing clock-frequency property +[ 0.001811] /cpus/cpu@1 missing clock-frequency property +[ 0.001820] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001857] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080061] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080130] Brought up 2 CPUs +[ 0.080143] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080149] CPU: All CPU(s) started in HYP mode. +[ 0.080154] CPU: Virtualization extensions available. +[ 0.080529] devtmpfs: initialized +[ 0.109215] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.110181] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.312561] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.312582] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.316808] pinctrl core: initialized pinctrl subsystem +[ 0.317662] NET: Registered protocol family 16 +[ 0.318571] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.340220] cpuidle: using governor ladder +[ 0.370244] cpuidle: using governor menu +[ 0.378761] OMAP GPIO hardware version 0.1 +[ 0.385218] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.401879] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.401892] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.409778] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.409789] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.410189] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.410198] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.410801] OMAP DMA hardware revision 0.0 +[ 0.451569] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452711] edma 43300000.edma: memcpy is disabled +[ 0.457555] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461928] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.462103] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.462259] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462416] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462701] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462883] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.466196] palmas 0-0058: IRQ missing: skipping irq request +[ 0.481323] palmas: probe of 0-0058 failed with error -121 +[ 0.481582] pcf857x: probe of 0-0020 failed with error -121 +[ 0.481830] pcf857x: probe of 0-0021 failed with error -121 +[ 0.481986] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.482385] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.482570] media: Linux media interface: v0.10 +[ 0.482627] Linux video capture interface: v2.00 +[ 0.482666] pps_core: LinuxPPS API ver. 1 registered +[ 0.482673] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.482697] PTP clock support registered +[ 0.482744] EDAC MC: Ver: 3.0.0 +[ 0.483503] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.483799] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.484874] clocksource: Switched to clocksource arch_sys_counter +[ 0.495211] NET: Registered protocol family 2 +[ 0.495696] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.495759] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.495884] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.495932] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.495963] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.496165] NET: Registered protocol family 1 +[ 0.496422] RPC: Registered named UNIX socket transport module. +[ 0.496431] RPC: Registered udp transport module. +[ 0.496437] RPC: Registered tcp transport module. +[ 0.496443] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.497406] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.507491] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.508145] NFS: Registering the id_resolver key type +[ 0.508176] Key type id_resolver registered +[ 0.508183] Key type id_legacy registered +[ 0.508259] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.509515] bounce: pool size: 64 pages +[ 0.509660] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.509675] io scheduler noop registered +[ 0.509686] io scheduler deadline registered +[ 0.509718] io scheduler cfq registered (default) +[ 0.514125] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.517383] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.517396] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.517429] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.517449] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.547312] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.547485] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.547499] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.547509] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.547519] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.547927] PCI: bus0: Fast back to back transfers disabled +[ 0.548044] PCI: bus1: Fast back to back transfers enabled +[ 0.548127] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.548141] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.548154] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.548371] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.608738] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.612099] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.618502] console [ttyS0] enabled +[ 1.622905] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.632611] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.642623] [drm] Initialized drm 1.1.0 20060810 +[ 1.648168] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.654812] [drm] No driver support for vblank timestamp query. +[ 1.660984] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.673722] loop: module loaded +[ 1.677247] vmemexp device MAJOR num = 245 +[ 1.681376] vmemexp class registered +[ 1.685109] /dev/vmemexp device registered +[ 1.689224] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.694918] nand: No NAND device found +[ 1.698689] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.708665] m25p80 spi32766.0: found s25fl512s, expected s25fl256s1 +[ 1.975994] m25p80 spi32766.0: s25fl512s (65536 Kbytes) +[ 1.981305] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.987182] Creating 7 MTD partitions on "spi32766.0": +[ 1.992346] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.998499] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 2.004846] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 2.011816] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 2.017609] mtd: partition "QSPI.u-boot-env" doesn't end on an erase block -- force read-only +[ 2.027103] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 2.033574] mtd: partition "QSPI.u-boot-env.backup1" doesn't start on an erase block boundary -- force read-only +[ 2.054835] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 2.060278] mtd: partition "QSPI.kernel" doesn't start on an erase block boundary -- force read-only +[ 2.080390] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 2.086269] mtd: partition "QSPI.file-system" doesn't start on an erase block boundary -- force read-only +[ 2.098263] libphy: Fixed MDIO Bus: probed +[ 2.144907] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 2.151032] davinci_mdio 48485000.mdio: detected phy mask fffffffe +[ 2.159661] libphy: 48485000.mdio: probed +[ 2.163693] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown +[ 2.172403] cpsw 48484000.ethernet: Detected MACID = 6c:c3:74:33:3c:6a +[ 2.179087] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 2.186100] cpsw 48484000.ethernet: cpsw: Detected MACID = 6c:c3:74:33:3c:6b +[ 2.194714] mousedev: PS/2 mouse device common for all mice +[ 2.200907] i2c /dev entries driver +[ 2.210248] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.215904] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.222288] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.348850] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.356943] NET: Registered protocol family 10 +[ 2.362389] sit: IPv6 over IPv4 tunneling driver +[ 2.368656] NET: Registered protocol family 17 +[ 2.373334] Key type dns_resolver registered +[ 2.377740] omap_voltage_late_init: Voltage driver support not added +[ 2.384644] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.390872] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.397126] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.403710] Power Management for TI OMAP4+ devices. +[ 2.408840] Registering SWP/SWPB emulation handler +[ 2.415076] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.422656] dmm 4e000000.dmm: initialized all PAT entries +[ 2.429119] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.436775] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.442534] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 2.448984] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.455981] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.462188] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.468482] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.475499] hctosys: unable to open rtc device (rtc0) +[ 2.492504] evm_1v8: disabling +[ 2.495610] evm_3v3_sw: disabling +[ 2.498940] aic_dvdd: disabling +[ 2.502095] vmmcwl_fixed: disabling +[ 2.505618] pbias_mmc_omap5: disabling +[ 2.510582] VFS: Cannot open root device "mmcblk1p2" or unknown-block(0,0): error -6 +[ 2.518415] Please append a correct "root=" boot option; here are the available partitions: +[ 2.526831] 1f00 256 mtdblock0 (driver?) +[ 2.531918] 1f01 1024 mtdblock1 (driver?) +[ 2.537027] 1f02 512 mtdblock2 (driver?) +[ 2.542109] 1f03 64 mtdblock3 (driver?) +[ 2.547215] 1f04 64 mtdblock4 (driver?) +[ 2.552300] 1f05 8192 mtdblock5 (driver?) +[ 2.557407] 1f06 22656 mtdblock6 (driver?) +[ 2.562488] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) +[ 2.570796] CPU0: stopping +[ 2.573521] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.84-00039-g845ce97-dirty #1 +[ 2.581297] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 2.587415] Backtrace: +[ 2.589892] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 2.597493] r7:c08f5ef0 r6:20000193 r5:00000000 r4:c0913690 +[ 2.603218] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 2.610476] [] (dump_stack) from [] (handle_IPI+0x184/0x198) +[ 2.617900] r7:c08f5ef0 r6:00000000 r5:00000000 r4:c08f0424 +[ 2.623621] [] (handle_IPI) from [] (gic_handle_irq+0x78/0x7c) +[ 2.631220] r7:fa212000 r6:c08f5ef0 r5:fa21200c r4:c08f68ec +[ 2.636938] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) +[ 2.644454] Exception stack(0xc08f5ef0 to 0xc08f5f38) +[ 2.649526] 5ee0: 00000001 00000000 fe600000 00000000 +[ 2.657742] 5f00: c08f4000 c08f64ac 00000000 00000000 c08f5f60 c065e26c c08f650c c08f5f4c +[ 2.665953] 5f20: c08f5f2c c08f5f40 c0027fec c0010600 60000013 ffffffff +[ 2.672592] r9:c065e26c r8:c08f5f60 r7:c08f5f24 r6:ffffffff r5:60000013 r4:c0010600 +[ 2.680422] [] (arch_cpu_idle) from [] (default_idle_call+0x28/0x34) +[ 2.688551] [] (default_idle_call) from [] (cpu_startup_entry+0x200/0x260) +[ 2.697207] [] (cpu_startup_entry) from [] (rest_init+0x90/0x94) +[ 2.704981] r7:00000000 +[ 2.707541] [] (rest_init) from [] (start_kernel+0x400/0x40c) +[ 2.715052] r5:c0943000 r4:c0943040 +[ 2.718662] [] (start_kernel) from [<80008090>] (0x80008090) +[ 2.725213] r10:00000000 r9:412fc0f2 r8:80007000 r7:c08fab38 r6:c08e0a24 r5:c08f6484 +[ 2.733118] r4:c0943214 +[ 2.735676] ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) + +CTRL-A Z for help | 115200 8N1 | NOR | Minicom 2.7 | VT102 | Offline | ttyUSB0 + + Does anyone help me solve this problem? + +Responses: +This is the schematic about emmc + +Hi, I see this fragment in the log: [ 2.520529] VFS: Cannot open root device "mmcblk1p2" or unknown-block(0,0): error -6 [ 2.528366] Please append a correct "root=" boot option; here are the available partitions: [ 2.536784] 1f00 256 mtdblock0 (driver?) [ 2.541870] 1f01 1024 mtdblock1 (driver?) [ 2.546979] 1f02 512 mtdblock2 (driver?) [ 2.552062] 1f03 64 mtdblock3 (driver?) [ 2.557166] 1f04 64 mtdblock4 (driver?) [ 2.562249] 1f05 8192 mtdblock5 (driver?) [ 2.567354] 1f06 22656 mtdblock6 (driver?) [ 2.572437] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) Can you try in the kernel command line to change "root=/dev/mmcblk1p2" to "root=/dev/mtdblock0" (I am not sure exactly which partition should be used) and see if it works? Regards, Yordan + +Hi Yordan, Thank you for your reply. In the log file can see the mtdblk0-6 is aspirations flash，so I don't think it will work. but I will try it Best regards Kepei + +Hi Yordan, Thans for you suggestion! I had resolved the problem, there has some thing wrong in the schematic. Regards, Kepei + diff --git a/data2/text/range/30001+/824486.txt b/data2/text/range/30001+/824486.txt new file mode 100644 index 0000000000000000000000000000000000000000..a762204ae242965433596fa9f815da02f0a49ef0 --- /dev/null +++ b/data2/text/range/30001+/824486.txt @@ -0,0 +1,1353 @@ +Ticket Name: TDA2E: Not able to run PROCESSOR_SDK_RADAR_03_07_00_00 usecase tda2xx_cascade_bios_radar on board + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: MMWCAS-DSP-EVM, TDA2, AWR1243 Hello, I have a TDA2 board(MMWCAS-DSP-EVM) which TI has confirmed is same as TDA2 EVM. So i compiled the PROCESSOR_SDK_RADAR_03_07_00_00 for usecase tda2xx_cascade_bios_radar and than trying to run this test case on the board but i cannot see any thing on the network or on the Tera Term console. what i can see is that on Serial port the use case ask me prompt for to enter Radar Use case to run and than ask further details regarding the details of the testcase and than exit without giving further indication. Is this expected behavior? On Console logs i can see following information about board and SW [IPU1-0] 3.298969 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] [IPU1-0] 3.299060 s: FVID2 Version : [FVID_02_01_00_01] [IPU1-0] 3.299121 s: BSP Version : [PDK_01_10_03_xx] [IPU1-0] 3.299182 s: Platform : [EVM] [IPU1-0] 3.299243 s: SOC : [TDA2XX] [IPU1-0] 3.299304 s: SOC Revision : [ES2.0] [IPU1-0] 3.299396 s: Board Detected : [TDA2XX CASCADE RADAR] [IPU1-0] 3.299487 s: Base Board Revision : [REV E] [IPU1-0] 3.299548 s: Daughter Card Revision: [REV A] Also before prompting for next run it terminates with below message , it mentions Display Type as HDMI even though we don't have any display. [IPU1-0] 4.309125 s: Current System Settings, [IPU1-0] 4.309186 s: ======================== [IPU1-0] 4.309217 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 4.309308 s: My IP address for interface 1 : 0.0.0.0 [IPU1-0] 4.309369 s: My IP address for interface 2 : 0.0.0.0 [IPU1-0] 4.309461 s: [IPU1-0] 4.309491 s: ============ [IPU1-0] 4.309552 s: Usecase Menu [IPU1-0] 4.309583 s: ============ I am attaching the complete logs of multiple attempt with various combination (like trying 2nd stage FFT on EVE or DSP and getting logs on TCP/IP or TFDTP) except to run 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) (NetworkLogs.txt) Can some one please comment if the below attached Serials logs are ok and what i am expected to see? Also why i don't see any activity of TCP/IP packet on network ? In next step i will also run the corresponding use case Matlab file but before that i wanted to just see if i can see any activity on network interface. Br Deepak Joshi NetworkLogs.txt + +Responses: +Hi, In the log i can not see IP address for the board. Have connected any your board with ethernet cable. If you have connected then sometime it takes some time to get the IP address, so please wait untill you get the IP address, you can keep pressing enter after 2-3 sec and look for IP address. Please go through the below document for more information Z:\ADAS\vision_sdk\docs\Radar\ProcessorSDKRadar_UserGuide.pdf Regards, Anuj + +Hello Anuj, I read the document and also checked the matlab scripts placed under PROCESSOR_SDK_RADAR_03_07_00_00\vision_sdk\apps\src\rtos\radar\src\usecases and based on the this i configured the IP address as TCP/IP V4 with IP address of the host as: Ethernet adapter EvalBoard_Connection: Connection-specific DNS Suffix . : vnet.valeo.com IPv4 Address. . . . . . . . . . . : 128.247.75.131 Subnet Mask . . . . . . . . . . . : 255.255.0.0 Default Gateway . . . . . . . . . : After this I waited for some time as suggested by you and than can see in tera term some new message coming up: [IPU1-1] 6.661105 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-1] 8.143414 s: NETWORK_CTRL: Starting Server (port=5000) !!! [IPU1-1] 8.143689 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! Which i guess configures the IP Address on host side(My PC here i use Ethernet to USB adapter as my onboard ethernet is configured for other purpose) After this again going on loop as mentioned earlier and on wireshark i don't see any activity on this link. I am reattaching the logs of the serial port (NetworkLogs_2.txt) Br Deepak Joshi NetworkLogs_2.txt + + + + + + + + + + + + + + + + + + + + + + + +[IPU1-0] 64.269840 s: +[IPU1-0] 64.270389 s: +[IPU1-0] 64.270450 s: Current System Settings, +[IPU1-0] 64.270511 s: ======================== +[IPU1-0] 64.270572 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 64.270633 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 64.270694 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 64.270786 s: +[IPU1-0] 64.270816 s: ============ +[IPU1-0] 64.270847 s: Usecase Menu +[IPU1-0] 64.270908 s: ============ +[IPU1-0] 64.270938 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 66.125114 s: +[IPU1-0] 66.125266 s: +[IPU1-0] +[IPU1-0] RADAR Usecases +[IPU1-0] --------------- +[IPU1-0] +[IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 69.693649 s: +[IPU1-0] 69.693802 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-0] 71.293448 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 71.293661 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 71.300890 s: !!!No Valid Configuration file is found. Use Default Configurations!!! +[IPU1-0] 71.301012 s: CHAINS: Init AR12xx ... +[IPU1-0] 71.301287 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 71.301866 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 71.302049 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 71.302202 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 71.527420 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 71.527572 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 71.621362 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 71.653937 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 72.271914 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 72.543341 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 72.578722 s: AWR12XX: Version Master : 1.10.0.20 +[IPU1-0] 72.578844 s: AWR12XX: Version RF:2.0.0.1 +[IPU1-0] 72.578936 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 72.579027 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 72.579119 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 72.580735 s: CHAINS: Config AR12xx ... +[IPU1-0] 72.580796 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 72.580918 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 2 +[IPU1-0] 72.581010 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 3 +[IPU1-0] 72.581101 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 4 +[IPU1-0] 72.587720 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 72.587811 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 72.604221 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 72.604312 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 72.621118 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 72.621210 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 72.638107 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 72.638199 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 72.648905 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 72.649027 s: Chains: NetworkTx Link +[IPU1-0] 72.649088 s: +[IPU1-0] +[IPU1-0] Select Network Mode, +[IPU1-0] -------------------- +[IPU1-0] 1: TFDTP +[IPU1-0] 2: TCP/IP +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 74.429909 s: Chains: Using TFDTP. Ensure using –-usetfdtp with network tools.. +[IPU1-0] 74.430061 s: CAPTURE: Create in progress !!! +[IPU1-0] 74.430275 s: CAPTURE: VIP1 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 74.992405 s: CAPTURE: VIP2 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 75.554870 s: CAPTURE: VIP2 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 76.117245 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 76.679863 s: CAPTURE: Create Done !!! +[IPU1-0] 76.680717 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 76.681052 s: IPC_OUT_0 : Create Done !!! +[IPU1-0] 76.683431 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 76.683553 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 256792 B (250 KB) +[IPU1-0] 76.683767 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 76.683919 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 188207104 B (179 MB) +[IPU1-0] 76.684072 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 76.707344 s: CHAINS: AR12xx Starting Radar Sensor ... +[IPU1-0] 76.710760 s: CHAINS: AR12xx Starting Radar Sensor ... DONE !!! +[IPU1-0] 76.711279 s: CAPTURE: Start in progress !! + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 124413 (10.61 ms) + SOC Init Cycles - 170999 (14.59 ms) + DDR Config Clock Cycles - 58848 (5.2 ms) + App Image Load Cycles - 31187220 (2661.30 ms) + Slave Core Bootup Cycles - 208489 (17.79 ms) + SBL Boot-up Cycles - 31751030 (2709.42 ms) + Time at which SBL started IPU1_0 - 96416 (2942.38 ms) +***************************************************************** + + Putting MPU in Retention... +[IPU1-0] 2.946227 s: ***** IPU1_0 Firmware build time 15:52:53 Jul 23 2019 +[IPU1-0] 2.946410 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 2.948240 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 2.959037 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 2.959159 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-0] 2.959555 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[IPU1-0] 2.959647 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-0] 2.959738 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-0] 2.959860 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-0] 2.959952 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-0] 2.960043 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-0] 2.960135 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-0] 2.960196 s: SYSTEM: Notify init done !!! +[IPU1-0] 2.961995 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 2.962819 s: SYSTEM: Work Queue init done !!! +[IPU1-0] 2.962941 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 2.966662 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 2.966754 s: SYSTEM: System Init in progress !!! +[IPU1-0] 2.966815 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 2.966906 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 2.966967 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 2.967089 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 2.967150 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 2.967394 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 2.967486 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 2.967547 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 2.970780 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.970902 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.970993 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 2.971085 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.971176 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.971298 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.971634 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.971725 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.971817 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 2.971908 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.972000 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.972091 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.972427 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.972518 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.972610 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 2.972701 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.972793 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.972884 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 3.028182 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 3.029036 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 3.029311 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 3.029433 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261576 B (255 KB) +[IPU1-0] 3.029585 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 3.029738 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 3.029921 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 3.030073 s: SYSTEM: Initializing Links !!! +[IPU1-0] 3.194320 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 3.280912 s: BOARD: Board Init in progress !!! +[IPU1-0] 3.281492 s: BOARD: Board Init Done !!! +[IPU1-0] 3.291465 s: EEPROM Base Board Name: [DRA74CAS] +[IPU1-0] 3.291801 s: +[IPU1-0] 3.291831 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 3.291923 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 3.291984 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 3.292045 s: Platform : [EVM] +[IPU1-0] 3.292106 s: SOC : [TDA2XX] +[IPU1-0] 3.292167 s: SOC Revision : [ES2.0] +[IPU1-0] 3.292258 s: Board Detected : [TDA2XX CASCADE RADAR] +[IPU1-0] 3.292350 s: Base Board Revision : [REV E] +[IPU1-0] 3.292411 s: Daughter Card Revision: [REV A] +[IPU1-0] 3.292472 s: +[IPU1-1] 2.958152 s: ***** IPU1_1 Firmware build time 15:51:24 Jul 23 2019 +[IPU1-1] 2.958335 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 2.961599 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 2.991490 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 2.991825 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 2.991947 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-1] 2.992374 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[IPU1-1] 2.992496 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-1] 2.992588 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-1] 2.992679 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-1] 2.992801 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-1] 2.992923 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-1] 2.993015 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-1] 2.993076 s: SYSTEM: Notify init done !!! +[IPU1-1] 2.994936 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 2.995760 s: SYSTEM: Work Queue init done !!! +[IPU1-1] 2.995851 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 2.999786 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 2.999908 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 3.000000 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 3.000091 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 627720 B (613 KB) +[IPU1-1] 3.000335 s: SYSTEM: Initializing Links !!! +[IPU1-1] 3.106081 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 3.109070 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 3.111968 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 3.114988 s: UTILS: PRF: ##### Cannot allocate Object for TFDTPRX #### +[IPU1-1] 3.118465 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 3.121911 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 3.125388 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 3.128926 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 3.132800 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 3.136704 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 3.140395 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 3.143963 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 3.144116 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 3.145214 s: SYSTEM: System IPU1_1 Init Done !!! +[IPU1-1] 3.260507 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[DSP1 ] 2.944091 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 2.944122 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 2.944305 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 2.944335 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 2.944366 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 524128 B (511 KB) +[DSP1 ] 2.944427 s: SYSTEM: Initializing Links !!! +[DSP1 ] 2.951808 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 2.951839 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 3.204874 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 3.204904 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 2.956780 s: ***** EVE Firmware build time 15:46:16 Jul 23 2019 +[EVE1 ] 2.958488 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 2.961019 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 2.962178 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 2.963002 s: SYSTEM: IPCLIB init in progress !!! +[EVE1 ] 2.964527 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE1 ] 2.965656 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE1 ] 2.966784 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE1 ] 2.967943 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE1 ] 2.969072 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE1 ] 2.970170 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE1 ] 2.971329 s: SYSTEM: IPCLIB init DONE !!! +[EVE1 ] 2.972244 s: SYSTEM: Notify init done !!! +[EVE1 ] 2.973891 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 2.975202 s: SYSTEM: Work Queue init done !!! +[EVE1 ] 2.976117 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 2.989782 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 2.990727 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 2.992191 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 2.993289 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 2.994509 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 2.996766 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE1 ] 2.998901 s: SYSTEM: Initializing Links !!! +[EVE1 ] 3.085615 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 3.086500 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 2.960165 s: ***** EVE Firmware build time 15:47:11 Jul 23 2019 +[EVE2 ] 2.961934 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 2.964436 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 2.965625 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 2.966571 s: SYSTEM: IPCLIB init in progress !!! +[EVE2 ] 2.968096 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE2 ] 2.969224 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE2 ] 2.970353 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE2 ] 2.971542 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE2 ] 2.972671 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE2 ] 2.973860 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE2 ] 2.974989 s: SYSTEM: IPCLIB init DONE !!! +[EVE2 ] 2.975904 s: SYSTEM: Notify init done !!! +[EVE2 ] 2.977581 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 2.978862 s: SYSTEM: Work Queue init done !!! +[EVE2 ] 2.979777 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 2.993564 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 2.994479 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 2.995882 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 2.997010 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 2.998230 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 3.000518 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE2 ] 3.002684 s: SYSTEM: Initializing Links !!! +[EVE2 ] 3.089153 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 3.090007 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 2.963521 s: ***** EVE Firmware build time 15:48:06 Jul 23 2019 +[EVE3 ] 2.965229 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 2.967699 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 2.968889 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 2.969804 s: SYSTEM: IPCLIB init in progress !!! +[EVE3 ] 2.971359 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE3 ] 2.972488 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE3 ] 2.973708 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE3 ] 2.974836 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE3 ] 2.975965 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE3 ] 2.977093 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE3 ] 2.978222 s: SYSTEM: IPCLIB init DONE !!! +[EVE3 ] 2.979106 s: SYSTEM: Notify init done !!! +[EVE3 ] 2.980784 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 2.982157 s: SYSTEM: Work Queue init done !!! +[EVE3 ] 2.983041 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 2.996644 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 2.997559 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 2.998962 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 3.000091 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 3.001281 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 3.003538 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE3 ] 3.005612 s: SYSTEM: Initializing Links !!! +[EVE3 ] 3.091227 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 3.092081 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 2.966845 s: ***** EVE Firmware build time 15:49:01 Jul 23 2019 +[EVE4 ] 2.968462 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 2.970841 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 2.972061 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 2.972945 s: SYSTEM: IPCLIB init in progress !!! +[EVE4 ] 2.974531 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE4 ] 2.975660 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE4 ] 2.976788 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE4 ] 2.977978 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE4 ] 2.979106 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE4 ] 2.980235 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE4 ] 2.981455 s: SYSTEM: IPCLIB init DONE !!! +[EVE4 ] 2.982340 s: SYSTEM: Notify init done !!! +[EVE4 ] 2.983987 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 2.985268 s: SYSTEM: Work Queue init done !!! +[EVE4 ] 2.986183 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 2.999694 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 3.000640 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 3.002013 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 3.003050 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 3.004239 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 3.006527 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE4 ] 3.008540 s: SYSTEM: Initializing Links !!! +[EVE4 ] 3.093729 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 3.094552 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 4.296040 s: QSPI Init Started +[IPU1-0] 4.296284 s: MID - 20 +[IPU1-0] 4.296346 s: DID - 21 +[IPU1-0] 4.296407 s: QSPI Init Completed Sucessfully +[IPU1-0] 4.301897 s: +[IPU1-0] 4.301988 s: Current System Settings, +[IPU1-0] 4.302019 s: ======================== +[IPU1-0] 4.302080 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 4.302141 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 4.302202 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 4.302324 s: +[IPU1-0] 4.302354 s: ============ +[IPU1-0] 4.302385 s: Usecase Menu +[IPU1-0] 4.302446 s: ============ +[IPU1-0] 4.302476 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 6.760934 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 +[IPU1-1] 8.144390 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 8.144665 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 8.200878 s: +[IPU1-0] 8.201000 s: +[IPU1-0] +[IPU1-0] RADAR Usecases +[IPU1-0] --------------- +[IPU1-0] +[IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 10.136643 s: +[IPU1-0] 10.136704 s: +[IPU1-0] +[IPU1-0] ======================== +[IPU1-0] 2D FFT Core Selection +[IPU1-0] ======================== +[IPU1-0] +[IPU1-0] 1: DSP +[IPU1-0] +[IPU1-0] 2: EVE +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 11.561245 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-0] 13.160525 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 13.160739 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 13.168242 s: !!!No Valid Configuration file is found. Use Default Configurations!!! +[IPU1-0] 13.168364 s: CHAINS: Init AR12xx ... +[IPU1-0] 13.168608 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 13.169005 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 13.169157 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 13.169310 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 13.394345 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 13.394467 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 13.491795 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 13.524004 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 14.142103 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 14.420270 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 14.455804 s: AWR12XX: Version Master : 1.10.0.20 +[IPU1-0] 14.455926 s: AWR12XX: Version RF:2.0.0.1 +[IPU1-0] 14.456017 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 14.456109 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 14.456231 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 14.458030 s: CHAINS: Config AR12xx ... +[IPU1-0] 14.458122 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 14.458213 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 2 +[IPU1-0] 14.458305 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 3 +[IPU1-0] 14.458427 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 4 +[IPU1-0] 14.465107 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 14.465198 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 14.482370 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 14.482462 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 14.499115 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 14.499206 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 14.516104 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 14.516195 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 14.526932 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 14.527115 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 14.527298 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 14.527389 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 14.527511 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 14.527725 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 14.527969 s: FILE_IO: Calibration file(calib_coef.bin) is NOT present in sd card! Used built-in coefficients! +[IPU1-0] 14.528091 s: Chains: NetworkTx Link +[IPU1-0] 14.528121 s: +[IPU1-0] +[IPU1-0] Select Network Mode, +[IPU1-0] -------------------- +[IPU1-0] 1: TFDTP +[IPU1-0] 2: TCP/IP +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 18.794088 s: Chains: Using TCP/IP +[IPU1-0] 18.794210 s: CAPTURE: Create in progress !!! +[IPU1-0] 18.794393 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 19.361892 s: CAPTURE: VIP1 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 19.929390 s: CAPTURE: VIP2 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 20.497010 s: CAPTURE: VIP2 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 21.064631 s: CAPTURE: Create Done !!! +[IPU1-0] 21.065088 s: SELECT: OUT QUE0: OUT CH0: IN CH0: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 21.065241 s: SELECT: OUT QUE1: OUT CH0: IN CH1: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 21.065363 s: SELECT: OUT QUE2: OUT CH0: IN CH2: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 21.065485 s: SELECT: OUT QUE3: OUT CH0: IN CH3: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 21.065668 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 21.199170 s: ALG: ti.radar.fft: CH0 BUF0: 0x94788c00 ( 2621440 B ) +[IPU1-0] 21.236381 s: ALG: ti.radar.fft: CH0 BUF1: 0x94a08e00 ( 2621440 B ) +[IPU1-0] 21.273439 s: ALG: ti.radar.fft: CH0 BUF2: 0x94c89000 ( 2621440 B ) +[IPU1-0] 21.310620 s: ALG: ti.radar.fft: CH0 BUF3: 0x94f09200 ( 2621440 B ) +[IPU1-0] 21.310986 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 21.311321 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 21.444458 s: ALG: ti.radar.fft: CH0 BUF0: 0x9518f000 ( 2621440 B ) +[IPU1-0] 21.481669 s: ALG: ti.radar.fft: CH0 BUF1: 0x9540f200 ( 2621440 B ) +[IPU1-0] 21.518697 s: ALG: ti.radar.fft: CH0 BUF2: 0x9568f400 ( 2621440 B ) +[IPU1-0] 21.555969 s: ALG: ti.radar.fft: CH0 BUF3: 0x9590f600 ( 2621440 B ) +[IPU1-0] 21.556274 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 21.556609 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 21.690569 s: ALG: ti.radar.fft: CH0 BUF0: 0x95b95400 ( 2621440 B ) +[IPU1-0] 21.727627 s: ALG: ti.radar.fft: CH0 BUF1: 0x95e15600 ( 2621440 B ) +[IPU1-0] 21.764655 s: ALG: ti.radar.fft: CH0 BUF2: 0x96095800 ( 2621440 B ) +[IPU1-0] 21.801927 s: ALG: ti.radar.fft: CH0 BUF3: 0x96315a00 ( 2621440 B ) +[IPU1-0] 21.802232 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 21.802568 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 21.937503 s: ALG: ti.radar.fft: CH0 BUF0: 0x9659b800 ( 2621440 B ) +[IPU1-0] 21.974531 s: ALG: ti.radar.fft: CH0 BUF1: 0x9681ba00 ( 2621440 B ) +[IPU1-0] 22.011742 s: ALG: ti.radar.fft: CH0 BUF2: 0x96a9bc00 ( 2621440 B ) +[IPU1-0] 22.048831 s: ALG: ti.radar.fft: CH0 BUF3: 0x96d1be00 ( 2621440 B ) +[IPU1-0] 22.049136 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 22.050570 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 22.050936 s: IPC_OUT_0 : Create Done !!! +[IPU1-1] 22.093424 s: IPC_IN_0 : Create in progress !!! +[IPU1-1] 22.094339 s: IPC_IN_0 : Create Done !!! +[IPU1-1] 22.095071 s: NETWORK_TX: NETWORK_TX: Server listening (port=29172) !!! +[IPU1-1] 22.096291 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-1] 22.096413 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 627432 B (612 KB) +[DSP1 ] 22.051119 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 22.051454 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 22.051820 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 22.090068 s: ALG: ti.radar.dspcascademimo: CH0 BUF0: 0x9839c000 ( 675616 B ) +[DSP1 ] 22.091410 s: ALG: ti.radar.dspcascademimo: CH0 BUF1: 0x98441000 ( 675616 B ) +[DSP1 ] 22.092783 s: ALG: ti.radar.dspcascademimo: CH0 BUF2: 0x984e6000 ( 675616 B ) +[DSP1 ] 22.092844 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 22.093180 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 22.093241 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 22.096687 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP1 ] 22.096718 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 72640 B (70 KB) +[DSP1 ] 22.096779 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 498816 B (487 KB) +[EVE1 ] 22.097084 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE1 ] 22.098212 s: SYST + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 124432 (10.61 ms) + SOC Init Cycles - 170931 (14.58 ms) + DDR Config Clock Cycles - 58927 (5.2 ms) + App Image Load Cycles - 31187830 (2661.36 ms) + Slave Core Bootup Cycles - 208528 (17.79 ms) + SBL Boot-up Cycles - 31751709 (2709.47 ms) + Time at which SBL started IPU1_0 - 96418 (2942.44 ms) +***************************************************************** + + Putting MPU in Retention... +[IPU1-0] 2.946257 s: ***** IPU1_0 Firmware build time 15:52:53 Jul 23 2019 +[IPU1-0] 2.946471 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 2.948301 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 2.958884 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 2.959006 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-0] 2.959403 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[IPU1-0] 2.959494 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-0] 2.959586 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-0] 2.959677 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-0] 2.959769 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-0] 2.959860 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-0] 2.959952 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-0] 2.960043 s: SYSTEM: Notify init done !!! +[IPU1-0] 2.961843 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 2.962666 s: SYSTEM: Work Queue init done !!! +[IPU1-0] 2.962758 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 2.966510 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 2.966632 s: SYSTEM: System Init in progress !!! +[IPU1-0] 2.966693 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 2.966784 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 2.966845 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 2.966967 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 2.967028 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 2.967181 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 2.967272 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 2.967364 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 2.970536 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.970658 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.970749 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 2.970841 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.970932 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.971024 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.971390 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.971481 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.971573 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 2.971664 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.971756 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.971817 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.972183 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.972274 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.972366 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 2.972457 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.972549 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.972640 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 3.027054 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 3.027908 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 3.028091 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 3.028213 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261576 B (255 KB) +[IPU1-0] 3.028426 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 3.028609 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 3.028823 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 3.028975 s: SYSTEM: Initializing Links !!! +[IPU1-0] 3.192155 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 3.281004 s: BOARD: Board Init in progress !!! +[IPU1-0] 3.281583 s: BOARD: Board Init Done !!! +[IPU1-0] 3.291465 s: EEPROM Base Board Name: [DRA74CAS] +[IPU1-0] 3.291801 s: +[IPU1-0] 3.291831 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 3.291923 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 3.291984 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 3.292045 s: Platform : [EVM] +[IPU1-0] 3.292106 s: SOC : [TDA2XX] +[IPU1-0] 3.292167 s: SOC Revision : [ES2.0] +[IPU1-0] 3.292258 s: Board Detected : [TDA2XX CASCADE RADAR] +[IPU1-0] 3.292350 s: Base Board Revision : [REV E] +[IPU1-0] 3.292411 s: Daughter Card Revision: [REV A] +[IPU1-0] 3.292472 s: +[IPU1-1] 2.958183 s: ***** IPU1_1 Firmware build time 15:51:24 Jul 23 2019 +[IPU1-1] 2.958366 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 2.961629 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 2.991429 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 2.991795 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 2.991886 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-1] 2.992313 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[IPU1-1] 2.992435 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-1] 2.992527 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-1] 2.992618 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-1] 2.992740 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-1] 2.992862 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-1] 2.992954 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-1] 2.993015 s: SYSTEM: Notify init done !!! +[IPU1-1] 2.994845 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 2.995668 s: SYSTEM: Work Queue init done !!! +[IPU1-1] 2.995790 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 2.999725 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 2.999816 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 2.999877 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 3.000000 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 627720 B (613 KB) +[IPU1-1] 3.000183 s: SYSTEM: Initializing Links !!! +[IPU1-1] 3.104953 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 3.107820 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 3.110687 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 3.113859 s: UTILS: PRF: ##### Cannot allocate Object for TFDTPRX #### +[IPU1-1] 3.117336 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 3.120783 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 3.124229 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 3.127706 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 3.131519 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 3.135240 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 3.138809 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 3.142377 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 3.142530 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 3.143628 s: SYSTEM: System IPU1_1 Init Done !!! +[IPU1-1] 3.260538 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[DSP1 ] 2.944152 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 2.944183 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 2.944366 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 2.944396 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 2.944427 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 524128 B (511 KB) +[DSP1 ] 2.944488 s: SYSTEM: Initializing Links !!! +[DSP1 ] 2.951839 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 2.951869 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 3.202952 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 3.202982 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 2.956871 s: ***** EVE Firmware build time 15:46:16 Jul 23 2019 +[EVE1 ] 2.958579 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 2.961141 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 2.962270 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 2.963124 s: SYSTEM: IPCLIB init in progress !!! +[EVE1 ] 2.964649 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE1 ] 2.965747 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE1 ] 2.966906 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE1 ] 2.968096 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE1 ] 2.969194 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE1 ] 2.970322 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE1 ] 2.971481 s: SYSTEM: IPCLIB init DONE !!! +[EVE1 ] 2.972366 s: SYSTEM: Notify init done !!! +[EVE1 ] 2.974043 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 2.975355 s: SYSTEM: Work Queue init done !!! +[EVE1 ] 2.976270 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 2.989934 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 2.990880 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 2.992344 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 2.993442 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 2.994662 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 2.996919 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE1 ] 2.999054 s: SYSTEM: Initializing Links !!! +[EVE1 ] 3.085737 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 3.086622 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 2.960257 s: ***** EVE Firmware build time 15:47:11 Jul 23 2019 +[EVE2 ] 2.962026 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 2.964558 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 2.965747 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 2.966662 s: SYSTEM: IPCLIB init in progress !!! +[EVE2 ] 2.968218 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE2 ] 2.969346 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE2 ] 2.970475 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE2 ] 2.971664 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE2 ] 2.972793 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE2 ] 2.973982 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE2 ] 2.975111 s: SYSTEM: IPCLIB init DONE !!! +[EVE2 ] 2.975995 s: SYSTEM: Notify init done !!! +[EVE2 ] 2.977673 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 2.978954 s: SYSTEM: Work Queue init done !!! +[EVE2 ] 2.979899 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 2.993655 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 2.994601 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 2.996004 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 2.997132 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 2.998352 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 3.000640 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE2 ] 3.002775 s: SYSTEM: Initializing Links !!! +[EVE2 ] 3.089062 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 3.089946 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 2.963582 s: ***** EVE Firmware build time 15:48:06 Jul 23 2019 +[EVE3 ] 2.965320 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 2.967760 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 2.968950 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 2.969865 s: SYSTEM: IPCLIB init in progress !!! +[EVE3 ] 2.971390 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE3 ] 2.972549 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE3 ] 2.973738 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE3 ] 2.974897 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE3 ] 2.975995 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE3 ] 2.977124 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE3 ] 2.978283 s: SYSTEM: IPCLIB init DONE !!! +[EVE3 ] 2.979198 s: SYSTEM: Notify init done !!! +[EVE3 ] 2.980875 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 2.982248 s: SYSTEM: Work Queue init done !!! +[EVE3 ] 2.983133 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 2.996736 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 2.997651 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 2.999023 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 3.000152 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 3.001403 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 3.003660 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE3 ] 3.005734 s: SYSTEM: Initializing Links !!! +[EVE3 ] 3.091410 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 3.092264 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 2.966937 s: ***** EVE Firmware build time 15:49:01 Jul 23 2019 +[EVE4 ] 2.968553 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 2.970932 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 2.972152 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 2.973067 s: SYSTEM: IPCLIB init in progress !!! +[EVE4 ] 2.974653 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE4 ] 2.975782 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE4 ] 2.976910 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE4 ] 2.978100 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE4 ] 2.979228 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE4 ] 2.980357 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE4 ] 2.981577 s: SYSTEM: IPCLIB init DONE !!! +[EVE4 ] 2.982462 s: SYSTEM: Notify init done !!! +[EVE4 ] 2.984139 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 2.985420 s: SYSTEM: Work Queue init done !!! +[EVE4 ] 2.986335 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 2.999877 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 3.000793 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 3.002196 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 3.003233 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 3.004392 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 3.006649 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE4 ] 3.008662 s: SYSTEM: Initializing Links !!! +[EVE4 ] 3.093515 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 3.094339 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 4.296071 s: QSPI Init Started +[IPU1-0] 4.296315 s: MID - 20 +[IPU1-0] 4.296346 s: DID - 21 +[IPU1-0] 4.296407 s: QSPI Init Completed Sucessfully +[IPU1-0] 4.301897 s: +[IPU1-0] 4.301958 s: Current System Settings, +[IPU1-0] 4.302019 s: ======================== +[IPU1-0] 4.302080 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 4.302141 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 4.302202 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 4.302293 s: +[IPU1-0] 4.302354 s: ============ +[IPU1-0] 4.302385 s: Usecase Menu +[IPU1-0] 4.302446 s: ============ +[IPU1-0] 4.302476 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 6.661105 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 +[IPU1-1] 8.143414 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 8.143689 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + +Hi, Still EVM is not getting IP Address [IPU1-0] 4.301988 s: Current System Settings, [IPU1-0] 4.302019 s: ======================== [IPU1-0] 4.302080 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 4.302141 s: My IP address for interface 1 : 0.0.0.0 [IPU1-0] 4.302202 s: My IP address for interface 2 : 0.0.0.0 You can see the ip addr is 0. So first get the ip addr then check anything. Regards, Anuj + +Hello Anuj, Can you suggest what i need to do. As this is first time i am using this board or even TDA2 SoC. With great effort and lots of post on E2E i was able to compile the Sw. So not sure my Image is correct, Is it possible if you can try my attached image? Is there any special compilation or i need to set some Host or Target IP address before compilation ? What i have done is i have set IP address of my Host as seen in the log (128.247.75.131) based on the matlab scripts radar_cascade_bf_demo.m line no 40 %usage: radar_cascade_bf_demo('128.247.75.78', '128.247.75.131', 'aa-bb-cc-dd-00-11', 'TI', RangeDepthInMeters, profileNum); function [] = radar_cascade_bf_demo(tgt_ip_addr, host_ip_addr, host_mac_address, platform, range_depth, profileNum) I can see when i run the sample app for tda2xx_cascade_bios_radar the network connection gets disabled and then enabled and i see message on tera term saying [IPU1-1] 6.760934 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-1] 8.144390 s: NETWORK_CTRL: Starting Server (port=5000) !!! [IPU1-1] 8.144665 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! which to me means link is up. Also i see both LED's for Ethernet are glowing. Can you please suggest what i missed or what i am doing wrong? Br Deepak Joshi Attached (MLO and AppImage)3618.Image.zip + +Hi Deepak, I can see that the link status says it's connected. But are you communicating with the right IP addresses? In your matlab script, I see that you have used 128.247.75.78 as the target IP. Did you set this IP as a static IP for your board? If I remember right, the default static IPs for interface 0 and 1 are 192.168.1.x and 192.168.2.x. If you are using your own static IP, you should make that change in the config file (And obviously your PC should have a static IP in the same subnet). But if this is a dynamic IP address, then please check the UART log where it shows "My IP Address for interface x". You should see an IP there, which should match with 128.247.75.78. Once your link status print comes, before trying any usecase, do a ping from your PC to the board to make sure that the connection is intact. Regards, Anand + +Hello Anand, I tried all combination with dynamic and static IP address. I saw in the NDK_config.cfg the static IP address for ports if (enableStaticIpEth0) { /* Settings for static IP configuration */ Ip.address = "192.168.1.200"; Ip.mask = "255.255.255.0"; Ip.gatewayIpAddr = "192.168.1.1"; Ip.ifIdx = 1; } So i even tried with Static IP address of 192.168.1.x and even 192.168.2.x and i am getting this message on the serial port [IPU1-1] 6.646037 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 [IPU1-1] 8.127310 s: NETWORK_CTRL: Starting Server (port=5000) !!! [IPU1-1] 8.127584 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! [IPU1-1] 810.567437 s: NDK: Link Status: No Link on PHY 2 [IPU1-1] 814.767675 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 Now i am not sure what else i need to do as i can still see same behavior and same message: [IPU1-0] 4.286006 s: ======================== [IPU1-0] 4.286067 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 4.286128 s: My IP address for interface 1 : 0.0.0.0 [IPU1-0] 4.286189 s: My IP address for interface 2 : 0.0.0.0 Can you please explain me what and how i need to do proceed from here. This is the first time i am using this board. Br Deepak Joshi + +Hi Deepak, Let me give you a clear picture on this. In the NDK_config.cfg file, you have option to enable static IP on interface 0 and 1. To do this make the variables enableStaticIpEth0 and enableStaticIpEth1 as 1. Now, IP address of your interface 0 will be 192.168.1.200 and for interface 1 will be 192.168.2.4. After changing this, you need to rebuild SDK. Then when you reboot again, you should see these IP addresses in the "My IP Address " UART print. Now, your host PC should have a static IP configured in the subnet 192.168.1.x if you want to communicate to interface 0 and 192.168.2.x if you want to communicate to interface 1. Also setting static IP means you need to connect the board to the host PC directly using an Ethernet cable. Is it connected like that? Please let me know these things in your setup : 1) In your NDK_config file, what are the values of the enableStaticIpEth0 and enableStaticIpEth1 variables? If these are zero, it means IP will be given to the interface from a dhcp server in the network. 2) How have you physically connected the board to the host PC? Have you directly connected directly from board's RJ45 port to the PC port? Or have you connected both the PC and the board to the same network? 3) Are you using a windows or linux PC? If windows do an ipconfig in cmd and tell me what's the IPv4 address. If linux, do "ip addr | grep inet" in linux terminal and tell me what's the IPv4 address Regards, Anand + +Hello Anand, Thanks for yours reply. So in my NDK_config files following lines were there: var enableStaticIpEth0 = 0; var enableStaticIpEth1 = 0; Based on yours previous mail i have started compiling the Sw(in windows environment) by changing the both to be 1 to make the static IP Address. It will take another half an hour before i can get APPImage and MLO files. My setup is windows based one and I am connecting the the board Ethernet port to my laptop using USB to Ethernet converter and on this USB to Ethernet interface i was trying to setup either Dynamic Address or Static Address. When i do the dynamic address with one lan wire connected to USBtoEthernet connector and TDA2 eval board i get this IP address Ethernet adapter EvalBoard_Connection: Connection-specific DNS Suffix . : vnet.valeo.com Autoconfiguration IPv4 Address. . : 169.254.76.191 Subnet Mask . . . . . . . . . . . : 255.255.0.0 Default Gateway . . . . . . . . . : Where as with dynamic it get the address which i configure Ethernet adapter EvalBoard_Connection: Connection-specific DNS Suffix . : vnet.valeo.com IPv4 Address. . . . . . . . . . . : 192.168.2.33 Subnet Mask . . . . . . . . . . . : 255.255.255.0 Default Gateway . . . . . . . . . : Now I don't understand the interface 1 and interface 2 IP address in eval board as I am not too familiar with the TDA2 architecture. Which one do you propose i use? Also which Static IP address should i use on my host machine 192.168.2.33 or 192.168.1.33 when my compilation is complete and i am ready with new MLO and Appimage? Br Deepak Joshi + +Hello Anand, I tried the Static IP address with my new compilation of the SW. In UART terminal i now see [IPU1-0] 4.307265 s: Current System Settings, [IPU1-0] 4.307326 s: ======================== [IPU1-0] 4.307387 s: Display Type : HDMI 1920x1080 @ 60fps [IPU1-0] 4.307448 s: My IP address for interface 1 : 192.168.1.200 [IPU1-0] 4.307509 s: My IP address for interface 2 : 0.0.0.0 [IPU1-0] 4.307631 s: [IPU1-0] 4.307661 s: ============ [IPU1-0] 4.307722 s: Usecase Menu [IPU1-0] 4.307753 s: ============ As in NDK_Config i have made var enableStaticIpEth0 = 1; var enableStaticIpEth1 = 1; On the Host side my IP address is C:\Users\djoshi>ipconfig Windows IP Configuration Ethernet adapter Ethernet: Media State . . . . . . . . . . . : Media disconnected Connection-specific DNS Suffix . : vnet.valeo.com Ethernet adapter VectorBox_basestation: Media State . . . . . . . . . . . : Media disconnected Connection-specific DNS Suffix . : Ethernet adapter EvalBoard_Connection: Connection-specific DNS Suffix . : vnet.valeo.com IPv4 Address. . . . . . . . . . . : 192.168.1.101 Subnet Mask . . . . . . . . . . . : 255.255.255.0 Default Gateway . . . . . . . . . : But the result is same the use case doesn't run and its again ask me again and again the . I am attaching the Serial logs also is it possible can you run the image i have generated at yours end as this was also first time i compiled the SW image for this MMWCAS-DSP-EVM (StaticIpAdd.zip) Br Deepak JoshiStaticIpAdd.zip NetworkLogs_3.txt [IPU1-0] 96.899652 s: +[IPU1-0] 96.900170 s: +[IPU1-0] 96.900231 s: Current System Settings, +[IPU1-0] 96.900292 s: ======================== +[IPU1-0] 96.900323 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 96.900414 s: My IP address for interface 1 : 192.168.1.200 +[IPU1-0] 96.900475 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 96.900536 s: +[IPU1-0] 96.900628 s: ============ +[IPU1-0] 96.900658 s: Usecase Menu +[IPU1-0] 96.900719 s: ============ +[IPU1-0] 96.900750 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 99.203348 s: +[IPU1-0] 99.203470 s: +[IPU1-0] +[IPU1-0] RADAR Usecases +[IPU1-0] --------------- +[IPU1-0] +[IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 101.172268 s: +[IPU1-0] 101.172360 s: +[IPU1-0] +[IPU1-0] ======================== +[IPU1-0] 2D FFT Core Selection +[IPU1-0] ======================== +[IPU1-0] +[IPU1-0] 1: DSP +[IPU1-0] +[IPU1-0] 2: EVE +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 102.692460 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-0] 104.291770 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 104.291984 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 104.299579 s: !!!No Valid Configuration file is found. Use Default Configurations!!! +[IPU1-0] 104.299701 s: CHAINS: Init AR12xx ... +[IPU1-0] 104.299975 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 104.300311 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 104.300463 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 104.300616 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 104.525590 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 104.525712 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 104.622338 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 104.654547 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 105.272067 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 105.549777 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 105.585737 s: AWR12XX: Version Master : 1.10.0.20 +[IPU1-0] 105.585859 s: AWR12XX: Version RF:2.0.0.1 +[IPU1-0] 105.585981 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 105.586073 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 105.586195 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 105.587750 s: CHAINS: Config AR12xx ... +[IPU1-0] 105.587842 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 105.587964 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 2 +[IPU1-0] 105.588055 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 3 +[IPU1-0] 105.588147 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 4 +[IPU1-0] 105.594644 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 105.594735 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 105.611419 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 105.611511 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 105.628377 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 105.628469 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 105.645366 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 105.645458 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 105.655676 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 105.655889 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 105.656072 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 105.656164 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 105.656286 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 105.656438 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 105.656682 s: FILE_IO: Calibration file(calib_coef.bin) is NOT present in sd card! Used built-in coefficients! +[IPU1-0] 105.656896 s: Chains: NetworkTx Link +[IPU1-0] 105.656987 s: +[IPU1-0] +[IPU1-0] Select Network Mode, +[IPU1-0] -------------------- +[IPU1-0] 1: TFDTP +[IPU1-0] 2: TCP/IP +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 109.588330 s: Chains: Using TCP/IP +[IPU1-0] 109.588452 s: CAPTURE: Create in progress !!! +[IPU1-0] 109.588665 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 110.156316 s: CAPTURE: VIP1 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 110.724059 s: CAPTURE: VIP2 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 111.291679 s: CAPTURE: VIP2 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 111.859482 s: CAPTURE: Create Done !!! +[IPU1-0] 111.859879 s: SELECT: OUT QUE0: OUT CH0: IN CH0: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 111.860092 s: SELECT: OUT QUE1: OUT CH0: IN CH1: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 111.860214 s: SELECT: OUT QUE2: OUT CH0: IN CH2: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 111.860367 s: SELECT: OUT QUE3: OUT CH0: IN CH3: 2048 x 640, pitch = (4096, 0) +[IPU1-0] 111.860550 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 112.162935 s: ALG: ti.radar.fft: CH0 BUF0: 0x94a0d000 ( 5242880 B ) +[IPU1-0] 112.237235 s: ALG: ti.radar.fft: CH0 BUF1: 0x94f0d200 ( 5242880 B ) +[IPU1-0] 112.311535 s: ALG: ti.radar.fft: CH0 BUF2: 0x9540d400 ( 5242880 B ) +[IPU1-0] 112.385774 s: ALG: ti.radar.fft: CH0 BUF3: 0x9590d600 ( 5242880 B ) +[IPU1-0] 112.386109 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 112.386445 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 112.688861 s: ALG: ti.radar.fft: CH0 BUF0: 0x96097800 ( 5242880 B ) +[IPU1-0] 112.763191 s: ALG: ti.radar.fft: CH0 BUF1: 0x96597a00 ( 5242880 B ) +[IPU1-0] 112.837461 s: ALG: ti.radar.fft: CH0 BUF2: 0x96a97c00 ( 5242880 B ) +[IPU1-0] 112.911761 s: ALG: ti.radar.fft: CH0 BUF3: 0x96f97e00 ( 5242880 B ) +[IPU1-0] 112.912096 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 112.912432 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 113.215701 s: ALG: ti.radar.fft: CH0 BUF0: 0x97722000 ( 5242880 B ) +[IPU1-0] 113.289971 s: ALG: ti.radar.fft: CH0 BUF1: 0x97c22200 ( 5242880 B ) +[IPU1-0] 113.364301 s: ALG: ti.radar.fft: CH0 BUF2: 0x98122400 ( 5242880 B ) +[IPU1-0] 113.438357 s: ALG: ti.radar.fft: CH0 BUF3: 0x98622600 ( 5242880 B ) +[IPU1-0] 113.438662 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 113.439242 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 113.745104 s: ALG: ti.radar.fft: CH0 BUF0: 0x98dac800 ( 5242880 B ) +[IPU1-0] 113.819404 s: ALG: ti.radar.fft: CH0 BUF1: 0x992aca00 ( 5242880 B ) +[IPU1-0] 113.893460 s: ALG: ti.radar.fft: CH0 BUF2: 0x997acc00 ( 5242880 B ) +[IPU1-0] 113.967760 s: ALG: ti.radar.fft: CH0 BUF3: 0x99cace00 ( 5242880 B ) +[IPU1-0] 113.968096 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 113.969621 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 113.969926 s: IPC_OUT_0 : Create Done !!! +[IPU1-1] 114.011895 s: IPC_IN_0 : Create in progress !!! +[IPU1-1] 114.012810 s: IPC_IN_0 : Create Done !!! +[IPU1-1] 114.013511 s: NETWORK_TX: NETWORK_TX: Server listening (port=29172) !!! +[IPU1-1] 114.014945 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-1] 114.015097 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 639400 B (624 KB) +[DSP1 ] 113.970139 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 113.970475 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 113.970780 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 114.008509 s: ALG: ti.radar.dspcascademimo: CH0 BUF0: 0x9b5ad000 ( 675616 B ) +[DSP1 ] 114.009851 s: ALG: ti.radar.dspcascademimo: CH0 BUF1: 0x9b652000 ( 675616 B ) +[DSP1 ] 114.011254 s: ALG: ti.radar.dspcascademimo: CH0 BUF2: 0x9b6f7000 ( 675616 B ) +[DSP1 ] 114.011285 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 114.011651 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 114.011712 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 114.015372 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP1 ] 114.015402 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 122944 B (120 KB) +[DSP1 ] 114.015463 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 498816 B (487 KB) +[EVE1 ] 114.015768 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE1 ] 114.016958 s: SYSTEM: + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 124374 (10.61 ms) + SOC Init Cycles - 170812 (14.57 ms) + DDR Config Clock Cycles - 58997 (5.3 ms) + App Image Load Cycles - 31169369 (2659.78 ms) + Slave Core Bootup Cycles - 208288 (17.77 ms) + SBL Boot-up Cycles - 31732900 (2707.87 ms) + Time at which SBL started IPU1_0 - 96586 (2947.57 ms) +***************************************************************** + + Putting MPU in Retention... +[IPU1-0] 2.951412 s: ***** IPU1_0 Firmware build time 09:44:45 Jul 30 2019 +[IPU1-0] 2.951595 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 2.953455 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 2.964253 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 2.964375 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-0] 2.964771 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[IPU1-0] 2.964893 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-0] 2.964954 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-0] 2.965076 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-0] 2.965168 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-0] 2.965259 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-0] 2.965351 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-0] 2.965412 s: SYSTEM: Notify init done !!! +[IPU1-0] 2.967211 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 2.968035 s: SYSTEM: Work Queue init done !!! +[IPU1-0] 2.968157 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 2.971878 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 2.972000 s: SYSTEM: System Init in progress !!! +[IPU1-0] 2.972061 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 2.972122 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 2.972183 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 2.972335 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 2.972396 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 2.972579 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 2.972671 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 2.972762 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 2.975995 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.976117 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.976209 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 2.976300 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.976392 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.976453 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.976849 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.976941 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.977032 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 2.977124 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.977215 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.977276 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 2.977642 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 2.977734 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 2.977825 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 2.977917 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 2.978008 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 2.978100 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 3.033367 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 3.034252 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 3.034465 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 3.034618 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261576 B (255 KB) +[IPU1-0] 3.034770 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 3.034953 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 3.035106 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 3.035258 s: SYSTEM: Initializing Links !!! +[IPU1-0] 3.199627 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 3.286158 s: BOARD: Board Init in progress !!! +[IPU1-0] 3.286707 s: BOARD: Board Init Done !!! +[IPU1-0] 3.296773 s: EEPROM Base Board Name: [DRA74CAS] +[IPU1-0] 3.297108 s: +[IPU1-0] 3.297139 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 3.297230 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 3.297291 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 3.297352 s: Platform : [EVM] +[IPU1-0] 3.297413 s: SOC : [TDA2XX] +[IPU1-0] 3.297474 s: SOC Revision : [ES2.0] +[IPU1-0] 3.297566 s: Board Detected : [TDA2XX CASCADE RADAR] +[IPU1-0] 3.297657 s: Base Board Revision : [REV E] +[IPU1-0] 3.297718 s: Daughter Card Revision: [REV A] +[IPU1-0] 3.297779 s: +[IPU1-1] 2.963460 s: ***** IPU1_1 Firmware build time 09:43:17 Jul 30 2019 +[IPU1-1] 2.963643 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 2.966906 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 2.995790 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 2.996126 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 2.996248 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-1] 2.996644 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[IPU1-1] 2.996797 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-1] 2.996888 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-1] 2.996980 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-1] 2.997102 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-1] 2.997224 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-1] 2.997315 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-1] 2.997376 s: SYSTEM: Notify init done !!! +[IPU1-1] 2.999237 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 3.000061 s: SYSTEM: Work Queue init done !!! +[IPU1-1] 3.000152 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 3.004117 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 3.004239 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 3.004300 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 3.004422 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 639688 B (624 KB) +[IPU1-1] 3.004666 s: SYSTEM: Initializing Links !!! +[IPU1-1] 3.110656 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 3.113829 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 3.116909 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 3.119959 s: UTILS: PRF: ##### Cannot allocate Object for TFDTPRX #### +[IPU1-1] 3.123131 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 3.126761 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 3.130299 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 3.134051 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 3.137924 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 3.141920 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 3.145671 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 3.149057 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 3.149179 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 3.150308 s: SYSTEM: System IPU1_1 Init Done !!! +[IPU1-1] 3.265845 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[DSP1 ] 2.949277 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 2.949307 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 2.949490 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 2.949521 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 2.949582 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 524128 B (511 KB) +[DSP1 ] 2.949612 s: SYSTEM: Initializing Links !!! +[DSP1 ] 2.956963 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 2.956993 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 3.210059 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 3.210089 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 2.962056 s: ***** EVE Firmware build time 09:38:12 Jul 30 2019 +[EVE1 ] 2.963734 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 2.966296 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 2.967425 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 2.968248 s: SYSTEM: IPCLIB init in progress !!! +[EVE1 ] 2.969804 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE1 ] 2.970902 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE1 ] 2.972061 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE1 ] 2.973250 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE1 ] 2.974379 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE1 ] 2.975507 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE1 ] 2.976666 s: SYSTEM: IPCLIB init DONE !!! +[EVE1 ] 2.977551 s: SYSTEM: Notify init done !!! +[EVE1 ] 2.979228 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 2.980540 s: SYSTEM: Work Queue init done !!! +[EVE1 ] 2.981455 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 2.995211 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 2.996217 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 2.997590 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 2.998718 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 2.999938 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 3.002196 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE1 ] 3.004300 s: SYSTEM: Initializing Links !!! +[EVE1 ] 3.091563 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 3.092447 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 2.965381 s: ***** EVE Firmware build time 09:39:06 Jul 30 2019 +[EVE2 ] 2.967150 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 2.969712 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 2.970871 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 2.971847 s: SYSTEM: IPCLIB init in progress !!! +[EVE2 ] 2.973372 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE2 ] 2.974531 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE2 ] 2.975660 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE2 ] 2.976849 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE2 ] 2.978008 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE2 ] 2.979167 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE2 ] 2.980326 s: SYSTEM: IPCLIB init DONE !!! +[EVE2 ] 2.981211 s: SYSTEM: Notify init done !!! +[EVE2 ] 2.982919 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 2.984200 s: SYSTEM: Work Queue init done !!! +[EVE2 ] 2.985115 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 2.998901 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 2.999847 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 3.001250 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 3.002287 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 3.003477 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 3.005734 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE2 ] 3.007930 s: SYSTEM: Initializing Links !!! +[EVE2 ] 3.094979 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 3.095864 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 2.968736 s: ***** EVE Firmware build time 09:39:59 Jul 30 2019 +[EVE3 ] 2.970475 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 2.972945 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 2.974135 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 2.975050 s: SYSTEM: IPCLIB init in progress !!! +[EVE3 ] 2.976605 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE3 ] 2.977734 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE3 ] 2.978954 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE3 ] 2.980082 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE3 ] 2.981211 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE3 ] 2.982340 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE3 ] 2.983499 s: SYSTEM: IPCLIB init DONE !!! +[EVE3 ] 2.984414 s: SYSTEM: Notify init done !!! +[EVE3 ] 2.986183 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 2.987464 s: SYSTEM: Work Queue init done !!! +[EVE3 ] 2.988348 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 3.001982 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 3.002867 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 3.004209 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 3.005307 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 3.006557 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 3.008845 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE3 ] 3.010919 s: SYSTEM: Initializing Links !!! +[EVE3 ] 3.097114 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 3.097968 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 2.972030 s: ***** EVE Firmware build time 09:40:53 Jul 30 2019 +[EVE4 ] 2.973677 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 2.976056 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 2.977276 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 2.978191 s: SYSTEM: IPCLIB init in progress !!! +[EVE4 ] 2.979777 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE4 ] 2.980936 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE4 ] 2.982065 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE4 ] 2.983255 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE4 ] 2.984383 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE4 ] 2.985512 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE4 ] 2.986762 s: SYSTEM: IPCLIB init DONE !!! +[EVE4 ] 2.987647 s: SYSTEM: Notify init done !!! +[EVE4 ] 2.989324 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 2.990575 s: SYSTEM: Work Queue init done !!! +[EVE4 ] 2.991520 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 3.005063 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 3.005947 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 3.007411 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 3.008448 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 3.009668 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 3.011895 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE4 ] 3.013969 s: SYSTEM: Initializing Links !!! +[EVE4 ] 3.099615 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 3.100469 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 4.301378 s: QSPI Init Started +[IPU1-0] 4.301592 s: MID - 20 +[IPU1-0] 4.301653 s: DID - 21 +[IPU1-0] 4.301714 s: QSPI Init Completed Sucessfully +[IPU1-0] 4.307204 s: +[IPU1-0] 4.307265 s: Current System Settings, +[IPU1-0] 4.307326 s: ======================== +[IPU1-0] 4.307387 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 4.307448 s: My IP address for interface 1 : 192.168.1.200 +[IPU1-0] 4.307509 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 4.307631 s: +[IPU1-0] 4.307661 s: ============ +[IPU1-0] 4.307722 s: Usecase Menu +[IPU1-0] 4.307753 s: ============ +[IPU1-0] 4.307844 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 6.666198 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 +[IPU1-1] 8.149698 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 8.149972 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + +Hi Deepak, This IP address 192.168.1.101 at your PC, is that something you configured (Setting the static IP in control panel)? Or is it something that your router gave you? Also, which ethernet port of the board did you connect to your laptop? (There are two. One has the IP address 192.168.1.200 and other 192.168.2.4). And as I said, before running any usecase, test if ping works. You can do "ping 192.168.1.200" from your PC. Regards, Anand + +Hello Anand, I forget to put yes i can ping the IP address of the board. C:\Users\djoshi>ping 192.168.1.200 Pinging 192.168.1.200 with 32 bytes of data: Reply from 192.168.1.200: bytes=32 time=1ms TTL=255 Reply from 192.168.1.200: bytes=32 time<1ms TTL=255 Reply from 192.168.1.200: bytes=32 time<1ms TTL=255 Reply from 192.168.1.200: bytes=32 time<1ms TTL=255 Ping statistics for 192.168.1.200: Packets: Sent = 4, Received = 4, Lost = 0 (0% loss), Approximate round trip times in milli-seconds: Minimum = 0ms, Maximum = 1ms, Average = 0ms The Ip adress is Static once which i have configured through Control Panel. I am attaching the snapshot. Here EvalBoard_Connection is shown Also attached is picture of my board showing how i connect ethenet cable to usb to ethernet converter. Br Deepak Joshi + +Hi Deepak, Thanks for the image and info. Okay, so if ping works, it confirms that there is a connection. Your setup looks correct to me. Did you change the IP addresses in your MATLAB script also? Regards, Anand + +Hello Anand, No i didn't run the matlab script till now as i expect first to see something on wireshark before i start running Matlab script. Attached are wireshark logs which doesn't see any traffic on this port(in zipped file). Also i have one more question the MMWCAS-DSP-EVM sends the TCP/IP or UDP packets ? Br Deepak JoshiWireSharkLogs.zip + +Hi Deepak, I am not familiar with the usecase, so I am not sure if the app is supposed to send out data as UDP packets. Did you start the app before checking the wireshark? Anyways, if you want to double check the connection, you can go to networking/ndk_xx_xx_xx_xx/packages/ti/ndk/winapps. You'll find a send.exe application there. You can use it in cmd as "send.exe 192.168.1.200". While this is running, you can check in wireshark if transfers are happening. You can probably put "ip.addr == 192.168.1.100" as a capture filter in Wireshark so that you don't see irrelevant packets in the capture. Regards, Anand + +Hello Anand, Thanks for yours reply, So i guess i now need for someone who has worked on tda2xx_cascade_bios_radar to guide me with the usage of this usecase as theoretically we have done whatever can be done from black box perspective. Is it possible for you to check the binary i have compiled and attached to just reproduce the same issue at yours end? I am reattaching it here Br Deepak Joshi 2500.StaticIpAdd.zip + +Hi, I hope after the discussion with TI this issue is resolved and you are able to run your usecase. Main issue was your power supply and after changing your power supply the issue got resolved. Please close this thread by verifying the answer. Regards, Anuj + diff --git a/data2/text/range/30001+/834307.txt b/data2/text/range/30001+/834307.txt new file mode 100644 index 0000000000000000000000000000000000000000..663d395e38b3988a3bf7012853cc948a75247132 --- /dev/null +++ b/data2/text/range/30001+/834307.txt @@ -0,0 +1,967 @@ +Ticket Name: Compiler: The difference network bandwidth between DP83TC811R-Q1's specifications and Linux's dmesg + +Query Text: +Other Parts Discussed in Thread: DP83TC811R-Q1, DP83TC811EVM Tool/software: TI C/C++ Compiler The system information as below: 1. Broad: TDA2EX-17 2. Ethernet PHY: DP83TC811R-Q1 3. Linux System: 4.4.84-00041-geb8fba6-dirty 4. PROCESSOR SDK Version: 3.07 The bandwidth in hardware specifications of DP83TC811R-Q1 is 100 Mbps. Then I followed this specifications to verify by those steps: 1. Device connect to another one directly. 2. Using the "iperf" software to test the bandwidth. (The one device as server, and the other as client.) The software shows that the bandwidth between two devices is 91Mbps and the bandwidth anneals to the hardware's specification. But the system's message(dmesg) shows the ethernet bandwidth is 10 Mbps/Half(cpsw 48484000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off). So, I have questions about the difference between system's message and hardware's specifications: (1) Does the hardware's actual bandwidth reach to 100 Mbps? (2) I guess the system's driver go wrong. How to solve it? Wxchen + +Responses: +Hi there are two parts to your observation First is the speed at which the link is negotiated between the peers you can dump the link status by using the ethtool command from Linux console on your board syntax for usage would be #ethttool eth0 this will help ascertain whether you have an active link and speed of operation Second is the throughput as measured by iperf (or similar) - the b/w measured in this case depends on a number of factors, but in general each packet sent on the wire comes with additional overhead(inter-packet gap, preamble etc) Additionally you have packetization overhead of adding L2/L3 headers etc. Hence the throughput measured will always be less than the theoretical b/w possible. Lastly CPU cycles are spent in generating the packet content and hence that could also throttle the throughput. for sufficiently large packet MTU size, you should be able to get close enough especially for 100Mbps link where CPU cycles may not be limiting factor Can you clarify on the overall goal in terms of performance requirement + +Hi, Thanks for your reply, I want to estimate the system's capability. I tried the ethtool to observe the link's speed, the tool showed 10 Mbps( same as dmesg ). Message shows in below: root@dra7xx-evm:/home# ./ethtool eth0 +Settings for eth0: +Supported ports: [ TP AUI BNC MII FIBRE ] +Supported link modes: Not reported +Supported pause frame use: No +Supports auto-negotiation: No +Supported FEC modes: Not reported +Advertised link modes: Not reported +Advertised pause frame use: No +Advertised auto-negotiation: No +Advertised FEC modes: Not reported +Speed: 10Mb/s +Duplex: Half +Port: MII +PHYAD: 0 +Transceiver: external +Auto-negotiation: on +Supports Wake-on: d +Wake-on: d +Current message level: 0x00000000 (0) + +Link detected: yes But I tested the link's speed by using iperf , it showed 91.X Mbps( similar to my last testing result ). Result shows in below: root@dra7xx-evm:/home# ./iperf -c 192.168.107.236 -w 16M -t 60 -i 10 -d +------------------------------------------------------------ +Server listening on TCP port 5001 +TCP window size: 320 KByte (WARNING: requested 16.0 MByte) +------------------------------------------------------------ +------------------------------------------------------------ +Client connecting to 192.168.107.236, TCP port 5001 +TCP window size: 320 KByte (WARNING: requested 16.0 MByte) +------------------------------------------------------------ +[ 3] local 192.168.107.188 port 48488 connected with 192.168.107.236 port 5001 +[ 5] local 192.168.107.188 port 5001 connected with 192.168.107.236 port 41190 +[ ID] Interval Transfer Bandwidth +[ 3] 0.0-10.0 sec 109 MBytes 91.4 Mbits/sec +[ 5] 0.0-10.0 sec 109 MBytes 91.5 Mbits/sec +[ 3] 10.0-20.0 sec 109 MBytes 91.3 Mbits/sec +[ 5] 10.0-20.0 sec 109 MBytes 91.5 Mbits/sec +[ 5] 20.0-30.0 sec 109 MBytes 91.3 Mbits/sec +[ 3] 20.0-30.0 sec 109 MBytes 91.4 Mbits/sec +[ 3] 30.0-40.0 sec 109 MBytes 91.2 Mbits/sec +[ 5] 30.0-40.0 sec 109 MBytes 91.3 Mbits/sec +[ 3] 40.0-50.0 sec 108 MBytes 90.9 Mbits/sec +[ 5] 40.0-50.0 sec 109 MBytes 91.3 Mbits/sec +[ 3] 50.0-60.0 sec 109 MBytes 91.3 Mbits/sec +[ 3] 0.0-60.0 sec 653 MBytes 91.3 Mbits/sec +[ 5] 50.0-60.0 sec 109 MBytes 91.6 Mbits/sec +[ 5] 0.0-60.0 sec 654 MBytes 91.4 Mbits/sec So, I'm wondering that: 1. Why makes the different result between system message(dmesg) and software testing? 2. What is the exactly speed about this hardware? 3. Is it a bug to the system's driver? How to fix it? 4. I tried different MTU, but I can't set the value more than 1500(it can set any value below 1500), is it possible to set it up to 9000? + +Hi can you confirm if there is only one network interface i.e eth0 and that all traffic is being sent over that interface i am actually concerned that the link is being negotiated at 10Mb/s , half-duplex. Most modern equipment today support auto-negotiation and will establish link at 100/1000Mbps , full duplex. Can you first review why the link is being established at 10Mbps can you get dump of the following #ifconfig if you have more than one network I/F, dump the routing table with # route -n Laslty, i am puzzled at how the reported iperf b/w is actually higher than the link speed. Will need to review the complete data to analyze why this could be + +Hi Are there updates on this - is the issue still open. If so, can you revert back with details from my earlier post + +1. ifconfig shows the following message: root@dra7xx-evm:~# ifconfig +eth0 Link encap:Ethernet HWaddr 6C:C3:74:0D:62:EE + inet addr:192.168.107.188 Bcast:192.168.107.255 Mask:255.255.255.0 + inet6 addr: fe80::6ec3:74ff:fe0d:62ee%132688/64 Scope:Link + UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 + RX packets:284 errors:0 dropped:24 overruns:0 frame:0 + TX packets:39 errors:0 dropped:0 overruns:0 carrier:0 + collisions:0 txqueuelen:1000 + RX bytes:26730 (26.1 KiB) TX bytes:3934 (3.8 KiB) + Interrupt:89 + +lo Link encap:Local Loopback + inet addr:127.0.0.1 Mask:255.0.0.0 + inet6 addr: ::1%132688/128 Scope:Host + UP LOOPBACK RUNNING MTU:65536 Metric:1 + RX packets:166 errors:0 dropped:0 overruns:0 frame:0 + TX packets:166 errors:0 dropped:0 overruns:0 carrier:0 + collisions:0 txqueuelen:1 + RX bytes:12688 (12.3 KiB) TX bytes:12688 (12.3 KiB) 2. the route -n shows the following message: root@dra7xx-evm:~# route -n +Kernel IP routing table +Destination Gateway Genmask Flags Metric Ref Use Iface +0.0.0.0 192.168.107.254 0.0.0.0 UG 1024 0 0 eth0 +192.168.107.0 0.0.0.0 255.255.255.0 U 0 0 0 eth0 +192.168.107.254 0.0.0.0 255.255.255.255 UH 1024 0 0 eth0 Is there any other software to test and verify the actual speed? + +Hi Link speed should be reported correctly with #ethtool eth0, but in your case, we seem to negotiate 10Mbps only Can you confirm if you see this on TI EVM or on a custom board and also share details of what is it connected to Also, if possible share the complete boot up log + +Hi: 1. I have two types of broad ( TDA2-evm, TDA2EX-17 ), the boot up log as attachment. The TDA2EX-17 broad is my custom broad and using 'DP83TC811EVM broad' to convert ethernet signal from 2-pins PHY to RJ-45. Then, two devices respectively connect to 1G-switch using the same cable(RJ-45). tda2ex-17.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00041-geb8fba6-dirty (user@tw-eh01005308) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Aug 26 10:00:45 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA718 EVM +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 244992 +[ 0.000000] free_area_init_node: node 0, pgdat c0985740, node_mem_map ef6aa000 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 180224 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA722 ES2.1 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef649000 s14912 r8192 d21952 u45056 +[ 0.000000] pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 +[ 0.000000] pcpu-alloc: [0] 0 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243264 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/mmcblk0p2 rw rootwait ip=none mem=1024M cma=64M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 468248K/979968K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 298728K reserved, 212992K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) +[ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) +[ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) +[ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. +[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1 +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000328] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000336] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000759] Console: colour dummy device 80x30 +[ 0.000774] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000780] This ensures that you still see kernel messages. Please +[ 0.000785] update your kernel commandline. +[ 0.000798] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000810] pid_max: default: 32768 minimum: 301 +[ 0.000909] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000918] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001452] Initializing cgroup subsys io +[ 0.001468] Initializing cgroup subsys memory +[ 0.001492] Initializing cgroup subsys devices +[ 0.001504] Initializing cgroup subsys freezer +[ 0.001515] Initializing cgroup subsys perf_event +[ 0.001525] Initializing cgroup subsys pids +[ 0.001552] CPU: Testing write buffer coherency: ok +[ 0.001757] /cpus/cpu@0 missing clock-frequency property +[ 0.001769] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001803] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.050026] Brought up 1 CPUs +[ 0.050038] SMP: Total of 1 processors activated (12.29 BogoMIPS). +[ 0.050044] CPU: All CPU(s) started in HYP mode. +[ 0.050050] CPU: Virtualization extensions available. +[ 0.050359] devtmpfs: initialized +[ 0.080082] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.081066] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.261254] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.261277] futex hash table entries: 256 (order: 2, 16384 bytes) +[ 0.274625] pinctrl core: initialized pinctrl subsystem +[ 0.275532] NET: Registered protocol family 16 +[ 0.276491] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.300188] cpuidle: using governor ladder +[ 0.330214] cpuidle: using governor menu +[ 0.338936] OMAP GPIO hardware version 0.1 +[ 0.345352] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.366434] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.366445] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.366942] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.366953] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.367553] OMAP DMA hardware revision 0.0 +[ 0.450960] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.452120] edma 43300000.edma: memcpy is disabled +[ 0.456852] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.461646] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461831] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.461996] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.462163] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.480909] pcf857x: probe of 0-0020 failed with error -121 +[ 0.481169] pcf857x: probe of 0-0021 failed with error -121 +[ 0.481549] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.482003] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.482171] media: Linux media interface: v0.10 +[ 0.482223] Linux video capture interface: v2.00 +[ 0.482265] pps_core: LinuxPPS API ver. 1 registered +[ 0.482272] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.482297] PTP clock support registered +[ 0.482347] EDAC MC: Ver: 3.0.0 +[ 0.491409] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.491611] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.491937] Advanced Linux Sound Architecture Driver Initialized. +[ 0.492809] clocksource: Switched to clocksource arch_sys_counter +[ 0.502865] NET: Registered protocol family 2 +[ 0.503358] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.503421] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.503546] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.503598] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.503629] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.503849] NET: Registered protocol family 1 +[ 0.514143] RPC: Registered named UNIX socket transport module. +[ 0.514153] RPC: Registered udp transport module. +[ 0.514159] RPC: Registered tcp transport module. +[ 0.514165] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.514184] PCI: CLS 0 bytes, default 64 +[ 0.515174] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.535116] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.545801] NFS: Registering the id_resolver key type +[ 0.545832] Key type id_resolver registered +[ 0.545840] Key type id_legacy registered +[ 0.545898] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.547418] bounce: pool size: 64 pages +[ 0.547574] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.547589] io scheduler noop registered +[ 0.547601] io scheduler deadline registered +[ 0.547635] io scheduler cfq registered (default) +[ 0.551658] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.551785] pinctrl-single 4a002e8c.pinmux: 1 pins at pa fc002e8c size 4 +[ 0.554948] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.554961] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.554995] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.555016] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.584416] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.584591] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.584604] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.584614] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.584624] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.584658] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 0.584701] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +[ 0.584722] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] +[ 0.584788] pci 0000:00:00.0: supports D1 +[ 0.584797] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 0.585019] PCI: bus0: Fast back to back transfers disabled +[ 0.585142] PCI: bus1: Fast back to back transfers enabled +[ 0.585232] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.585247] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.585259] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.585480] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.585493] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded +[ 0.585610] aer 0000:00:00.0:pcie02: service driver aer loaded +[ 0.641463] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.644854] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.610600] console [ttyS0] enabled +[ 1.615024] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.625003] [drm] Initialized drm 1.1.0 20060810 +[ 1.630510] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.637203] [drm] No driver support for vblank timestamp query. +[ 1.643361] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.736334] loop: module loaded +[ 1.747037] vmemexp device MAJOR num = 245 +[ 1.751167] vmemexp class registered +[ 1.754893] /dev/vmemexp device registered +[ 1.759006] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.776845] m25p80 spi32766.0: unrecognized JEDEC id bytes: 00, 0, 0 +[ 1.784418] libphy: Fixed MDIO Bus: probed +[ 1.832842] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.838966] davinci_mdio 48485000.mdio: detected phy mask fffffffe +[ 1.857240] libphy: 48485000.mdio: probed +[ 1.861272] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown +[ 1.869904] cpsw 48484000.ethernet: Detected MACID = 6c:c3:74:0d:62:ee +[ 1.876601] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.884723] mousedev: PS/2 mouse device common for all mice +[ 1.900923] i2c /dev entries driver +[ 1.909685] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.914826] vsys_3v3: supplied by evm_12v0 +[ 1.918985] evm_3v3: supplied by vsys_3v3 +[ 1.923076] evm_3v3_sd: supplied by evm_3v3 +[ 1.973301] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.979686] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 2.033190] omap_hsmmc 480d1000.mmc: no pinctrl state for sdr25 mode +[ 2.039573] omap_hsmmc 480d1000.mmc: no pinctrl state for sdr12 mode +[ 2.062814] omap_hsmmc 480d1000.mmc: no pinctrl state for hs mode +[ 2.103561] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.123751] aic_dvdd: supplied by evm_3v3 +[ 2.134401] NET: Registered protocol family 10 +[ 2.143169] sit: IPv6 over IPv4 tunneling driver +[ 2.148351] NET: Registered protocol family 17 +[ 2.163038] Key type dns_resolver registered +[ 2.167454] omap_voltage_late_init: Voltage driver support not added +[ 2.193354] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.199563] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.212839] cpu0 supply vdd not found, using dummy regulator +[ 2.218784] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.242848] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.249070] cpu0 supply vdd not found, using dummy regulator +[ 2.263657] Power Management for TI OMAP4+ devices. +[ 2.268770] Registering SWP/SWPB emulation handler +[ 2.283905] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.303373] dmm 4e000000.dmm: initialized all PAT entries +[ 2.313292] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.342771] evm_5v0: supplied by evm_12v0 +[ 2.346877] lp8733-ldo1: supplied by evm_5v0 +[ 2.354238] asoc-simple-card sound@0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.373032] mmc1: MAN_BKOPS_EN bit is not set +[ 2.378537] hctosys: unable to open rtc device (rtc0) +[ 2.388404] mmc1: new HS200 MMC card at address 0001 +[ 2.402073] aic_dvdd: disabling +[ 2.406550] vddshv8: disabling +[ 2.409850] ALSA device list: +[ 2.412853] #0: DRA7xx-EVM +[ 2.416795] mmcblk0: mmc1:0001 8GTF4R 7.28 GiB +[ 2.431611] mmcblk0boot0: mmc1:0001 8GTF4R partition 1 4.00 MiB +[ 2.447852] mmcblk0boot1: mmc1:0001 8GTF4R partition 2 4.00 MiB +[ 2.454460] mmcblk0: p1 p2 +[ 2.459219] EXT4-fs (mmcblk0p2): mounting ext3 file system using the ext4 subsystem +[ 2.486714] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.494910] VFS: Mounted root (ext3 filesystem) on device 179:2. +[ 2.502820] devtmpfs: mounted +[ 2.506072] Freeing unused kernel memory: 336K +[ 2.510534] This architecture does not have kernel memory protection. +[ 2.578130] systemd[1]: System time before build time, advancing clock. +[ 2.599022] random: systemd: uninitialized urandom read (16 bytes read, 12 bits of entropy available) +[ 2.610945] random: systemd: uninitialized urandom read (16 bytes read, 12 bits of entropy available) +[ 2.622650] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 2.641255] systemd[1]: Detected architecture arm. +[ 2.663437] systemd[1]: Set hostname to . +[ 2.708557] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 14 bits of entropy available) +[ 2.723680] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 14 bits of entropy available) +[ 2.734892] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 2.746476] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 2.764837] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) +[ 2.794046] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 2.803662] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 2.813749] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) +[ 2.932982] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start +[ 2.940775] systemd[1]: sysinit.target: Found dependency on alignment.service/start +[ 2.948559] systemd[1]: sysinit.target: Found dependency on sysinit.target/start +[ 2.956009] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start +[ 2.965466] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start +[ 3.005389] systemd[1]: Listening on Journal Socket (/dev/log). +[ 3.033215] systemd[1]: Listening on udev Control Socket. +[ 3.070226] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 3.104597] systemd[1]: Created slice User and Session Slice. +[ 3.133280] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 3.163790] systemd[1]: Created slice System Slice. +[ 3.193803] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 3.223303] systemd[1]: Listening on Network Service Netlink Socket. +[ 3.253758] systemd[1]: Created slice system-getty.slice. +[ 3.283240] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 3.313125] systemd[1]: Listening on Syslog Socket. +[ 3.333035] systemd[1]: Reached target Slices. +[ 3.353038] systemd[1]: Reached target Swap. +[ 3.373024] systemd[1]: Reached target Paths. +[ 3.393086] systemd[1]: Listening on udev Kernel Socket. +[ 3.423033] systemd[1]: Reached target Remote File Systems. +[ 3.453158] systemd[1]: Listening on Journal Socket. +[ 3.486516] systemd[1]: Starting Load Kernel Modules... +[ 3.527306] systemd[1]: Mounting Temporary Directory... +[ 3.565689] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[ 3.615765] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 3.647083] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ 3.665827] systemd[1]: Mounting Debug File System... +[ 3.695501] systemd[1]: Starting Setup Virtual Console... +[ 3.725739] systemd[1]: Starting Journal Service... +[ 3.755651] systemd[1]: Mounting POSIX Message Queue File System... +[ 3.817001] systemd[1]: Mounted POSIX Message Queue File System. +[ 3.853203] systemd[1]: Mounted Debug File System. +[ 3.863313] systemd[1]: Mounted Temporary Directory. +[ 3.893356] systemd[1]: Started Journal Service. +[ 4.726116] systemd-journald[131]: Received request to flush runtime journal from PID 1 +[ 5.629252] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 5.699126] remoteproc0: 58820000.ipu is available +[ 5.745244] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 5.849626] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 5.989746] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 +[ 6.005040] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 6.054472] remoteproc0: failed to load dra7-ipu1-fw.xem4 +[ 6.060199] remoteproc1: 55020000.ipu is available +[ 6.136319] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 6.179413] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.266153] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 6.328411] remoteproc2: 40800000.dsp is available +[ 6.378259] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 6.412710] remoteproc1: registered virtio0 (type 7) +[ 6.432511] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 6.575320] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 6.648523] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 6.754108] remoteproc2: registered virtio1 (type 7) +[ 7.511386] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 7.522403] CAN device driver interface +[ 7.671808] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 7.687822] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 7.749033] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 7.767833] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=348) +[ 7.863945] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ 9.016104] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 9.131077] net eth0: initializing cpsw version 1.15 (0) +[ 9.170662] net eth0: initialized cpsw ale version 1.4 +[ 9.210366] net eth0: ALE Table size 1024 +[ 9.259737] net eth0: phy found : id is : 0x2000a253 +[ 9.332743] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 10.080897] remoteproc1: powering up 55020000.ipu +[ 10.167715] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 8106188 +[ 10.191219] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 10.269675] remoteproc1: remote processor 55020000.ipu is now up +[ 10.298382] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 10.317054] remoteproc2: powering up 40800000.dsp +[ 10.340534] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 6884588 +[ 10.370252] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 10.376151] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 10.382086] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 10.472288] remoteproc2: remote processor 40800000.dsp is now up +[ 10.479358] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 10.504681] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 10.510234] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 10.552250] NET: Registered protocol family 41 +[ 11.258442] cpsw 48484000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off +[ 11.303790] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready + tda2-evm.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84-00038-g0af2ab5-dirty (root@tw-eh01005308) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Thu Sep 19 19:24:00 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 253184 +[ 0.000000] free_area_init_node: node 0, pgdat c099b740, node_mem_map ef69a000 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 188416 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef62a000 s14912 r8192 d21952 u45056 +[ 0.000000] pcpu-alloc: s14912 r8192 d21952 u45056 alloc=11*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251456 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=5d031825-02 rw rootwait ip=none mem=1024M cma=64M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 353060K/1012736K available (6671K kernel code, 320K rwdata, 2480K rodata, 340K init, 290K bss, 413916K reserved, 245760K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08f802c (9153 kB) +[ 0.000000] .init : 0xc08f9000 - 0xc094e000 ( 340 kB) +[ 0.000000] .data : 0xc094e000 - 0xc099e220 ( 321 kB) +[ 0.000000] .bss : 0xc09a0000 - 0xc09e8880 ( 291 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000335] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000343] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000790] Console: colour dummy device 80x30 +[ 0.000806] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000812] This ensures that you still see kernel messages. Please +[ 0.000817] update your kernel commandline. +[ 0.000832] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000845] pid_max: default: 32768 minimum: 301 +[ 0.000943] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000952] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001494] Initializing cgroup subsys io +[ 0.001510] Initializing cgroup subsys memory +[ 0.001535] Initializing cgroup subsys devices +[ 0.001548] Initializing cgroup subsys freezer +[ 0.001559] Initializing cgroup subsys perf_event +[ 0.001570] Initializing cgroup subsys pids +[ 0.001596] CPU: Testing write buffer coherency: ok +[ 0.001797] /cpus/cpu@0 missing clock-frequency property +[ 0.001813] /cpus/cpu@1 missing clock-frequency property +[ 0.001824] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001857] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080056] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080124] Brought up 2 CPUs +[ 0.080137] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080143] CPU: All CPU(s) started in HYP mode. +[ 0.080149] CPU: Virtualization extensions available. +[ 0.080528] devtmpfs: initialized +[ 0.108874] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.109815] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.313560] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.313581] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.318512] pinctrl core: initialized pinctrl subsystem +[ 0.319383] NET: Registered protocol family 16 +[ 0.320361] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350228] cpuidle: using governor ladder +[ 0.380253] cpuidle: using governor menu +[ 0.388782] OMAP GPIO hardware version 0.1 +[ 0.395253] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.411805] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.411819] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.420399] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.420409] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.420883] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.420893] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.421469] OMAP DMA hardware revision 0.0 +[ 0.461710] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462861] edma 43300000.edma: memcpy is disabled +[ 0.467700] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.472091] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.472268] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472429] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472586] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472883] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.473068] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.476072] palmas 0-0058: IRQ missing: skipping irq request +[ 0.490799] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.563116] pcf857x 0-0020: probed +[ 0.563692] pcf857x 0-0021: probed +[ 0.563848] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.564248] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.564454] media: Linux media interface: v0.10 +[ 0.564507] Linux video capture interface: v2.00 +[ 0.564551] pps_core: LinuxPPS API ver. 1 registered +[ 0.564559] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.564584] PTP clock support registered +[ 0.564633] EDAC MC: Ver: 3.0.0 +[ 0.565382] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.565676] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566011] Advanced Linux Sound Architecture Driver Initialized. +[ 0.566883] clocksource: Switched to clocksource arch_sys_counter +[ 0.577472] NET: Registered protocol family 2 +[ 0.577971] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.578034] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.578159] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.578207] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578238] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.578448] NET: Registered protocol family 1 +[ 0.578717] RPC: Registered named UNIX socket transport module. +[ 0.578726] RPC: Registered udp transport module. +[ 0.578733] RPC: Registered tcp transport module. +[ 0.578739] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.578758] PCI: CLS 0 bytes, default 64 +[ 0.579754] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.589787] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.590437] NFS: Registering the id_resolver key type +[ 0.590463] Key type id_resolver registered +[ 0.590471] Key type id_legacy registered +[ 0.590531] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.591819] bounce: pool size: 64 pages +[ 0.591974] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.591991] io scheduler noop registered +[ 0.592004] io scheduler deadline registered +[ 0.592038] io scheduler cfq registered (default) +[ 0.596973] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.600156] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 0.600168] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 0.600202] IO 0x20003000..0x20012fff -> 0x00000000 +[ 0.600223] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 0.630054] dra7-pcie 51000000.pcie_rc: link is not up +[ 0.630225] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 0.630237] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 0.630247] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 0.630257] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 0.630290] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 0.630333] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] +[ 0.630355] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] +[ 0.630422] pci 0000:00:00.0: supports D1 +[ 0.630431] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 0.630650] PCI: bus0: Fast back to back transfers disabled +[ 0.630778] PCI: bus1: Fast back to back transfers enabled +[ 0.630861] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 0.630876] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 0.630888] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 0.631106] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 0.631119] pcie_pme 0000:00:00.0:pcie01: service driver pcie_pme loaded +[ 0.631235] aer 0000:00:00.0:pcie02: service driver aer loaded +[ 0.692035] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.695416] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 1.705829] console [ttyS0] enabled +[ 1.710245] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 1.719956] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 1.729993] [drm] Initialized drm 1.1.0 20060810 +[ 1.735510] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 1.742197] [drm] No driver support for vblank timestamp query. +[ 1.748354] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 +[ 1.761301] loop: module loaded +[ 1.764826] vmemexp device MAJOR num = 245 +[ 1.768972] vmemexp class registered +[ 1.772691] /dev/vmemexp device registered +[ 1.776804] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 1.782703] nand: No NAND device found +[ 1.786473] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 1.796421] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) +[ 1.801839] 7 ofpart partitions found on MTD device spi32766.0 +[ 1.807715] Creating 7 MTD partitions on "spi32766.0": +[ 1.812878] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 1.818993] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.825322] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.832283] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.838992] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.846370] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.852729] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.860549] libphy: Fixed MDIO Bus: probed +[ 1.906918] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 1.913043] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 1.923269] libphy: 48485000.mdio: probed +[ 1.927319] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 1.935359] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 1.944042] cpsw 48484000.ethernet: Detected MACID = f0:b5:d1:0d:a2:5a +[ 1.950712] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 1.957682] cpsw 48484000.ethernet: cpsw: Detected MACID = f0:b5:d1:0d:a2:5b +[ 1.966314] mousedev: PS/2 mouse device common for all mice +[ 1.972523] i2c /dev entries driver +[ 1.981292] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 1.986925] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 1.993311] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 1.999869] evm_3v3_sw: supplied by sysen1 +[ 2.080684] mmc0: MAN_BKOPS_EN bit is not set +[ 2.092607] mmc0: new HS200 MMC card at address 0001 +[ 2.098055] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 2.102840] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 2.109021] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 2.158714] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.167204] aic_dvdd: supplied by evm_3v3_sw +[ 2.173106] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 2.180619] NET: Registered protocol family 10 +[ 2.195875] sit: IPv6 over IPv4 tunneling driver +[ 2.201088] NET: Registered protocol family 17 +[ 2.205758] Key type dns_resolver registered +[ 2.210238] omap_voltage_late_init: Voltage driver support not added +[ 2.217140] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.223348] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.230068] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.236279] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.244515] Power Management for TI OMAP4+ devices. +[ 2.249619] Registering SWP/SWPB emulation handler +[ 2.255346] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.262649] dmm 4e000000.dmm: initialized all PAT entries +[ 2.268775] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 +[ 2.285604] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 2.328214] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 2.347800] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 2.356692] hctosys: unable to open rtc device (rtc0) +[ 2.373115] evm_1v8: disabling +[ 2.376185] aic_dvdd: disabling +[ 2.379357] vmmcwl_fixed: disabling +[ 2.383028] ldousb: disabling +[ 2.386413] ALSA device list: +[ 2.389402] #0: DRA7xx-EVM +[ 2.392937] Waiting for root device PARTUUID=5d031825-02... +[ 2.854330] mmc2: host does not support reading read-only switch, assuming write-enable +[ 2.865623] mmc2: new ultra high speed SDR104 SDXC card at address 0001 +[ 2.872678] mmcblk1: mmc2:0001 ED4QT 119 GiB +[ 2.878193] mmcblk1: p1 p2 +[ 2.947848] EXT4-fs (mmcblk1p2): mounting ext3 file system using the ext4 subsystem +[ 3.246476] EXT4-fs (mmcblk1p2): recovery complete +[ 3.277019] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.285179] VFS: Mounted root (ext3 filesystem) on device 179:50. +[ 3.293387] devtmpfs: mounted +[ 3.296592] Freeing unused kernel memory: 340K +[ 3.301075] This architecture does not have kernel memory protection. +[ 3.405716] systemd[1]: System time before build time, advancing clock. +[ 3.440952] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.450387] systemd[1]: Configuration file /etc/systemd/system.conf is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.467983] random: systemd: uninitialized urandom read (16 bytes read, 24 bits of entropy available) +[ 3.480588] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) +[ 3.499096] systemd[1]: Detected architecture arm. +[ 3.518045] systemd[1]: Set hostname to . +[ 3.601465] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 26 bits of entropy available) +[ 3.603455] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 26 bits of entropy available) +[ 3.603631] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 26 bits of entropy available) +[ 3.635597] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.647629] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 27 bits of entropy available) +[ 3.658395] systemd-sysv-generator[99]: Configuration file /etc/systemd/system/systemd-udevd.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.675753] systemd-sysv-generator[99]: Configuration file /lib/systemd/system/run-postinsts.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.695688] systemd-sysv-generator[99]: Configuration file /lib/systemd/system/alsa-state.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.712924] systemd-sysv-generator[99]: Configuration file /lib/systemd/system/busybox-syslog.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.753076] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 3.762570] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 3.772431] random: systemd: uninitialized urandom read (16 bytes read, 30 bits of entropy available) +[ 3.918999] systemd[1]: Configuration file /lib/systemd/system/local-fs.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.936687] systemd[1]: Configuration file /lib/systemd/system/tmp.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.951926] systemd[1]: Configuration file /lib/systemd/system/system.slice is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.967039] systemd[1]: Configuration file /lib/systemd/system/-.slice is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.982458] systemd[1]: Configuration file /lib/systemd/system/slices.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 3.997602] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.014181] systemd[1]: Configuration file /lib/systemd/system/systemd-journald.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.031461] systemd[1]: Configuration file /lib/systemd/system/sysinit.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.049638] systemd[1]: Configuration file /lib/systemd/system/basic.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.065502] systemd[1]: Configuration file /lib/systemd/system/alsa-state.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.080544] systemd[1]: Configuration file /lib/systemd/system/alsa-restore.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.096283] systemd[1]: Configuration file /lib/systemd/system/paths.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.111237] systemd[1]: Configuration file /lib/systemd/system/timers.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.126659] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.timer is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.143086] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-clean.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.159707] systemd[1]: Configuration file /lib/systemd/system/time-sync.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.175828] systemd[1]: Configuration file /lib/systemd/system/remote-fs.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.191150] systemd[1]: Configuration file /lib/systemd/system/remote-fs-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.207173] systemd[1]: Configuration file /lib/systemd/system/reboot.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.223863] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp-runlevel.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.241422] systemd[1]: Configuration file /lib/systemd/system/graphical.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.257695] systemd[1]: Configuration file /lib/systemd/system/rescue.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.273201] systemd[1]: Configuration file /lib/systemd/system/multi-user.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.290840] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.path is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.307831] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-wall.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.324717] systemd[1]: Configuration file /lib/systemd/system/dbus.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.339751] systemd[1]: Configuration file /lib/systemd/system/dbus.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.354830] systemd[1]: Configuration file /lib/systemd/system/getty.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.370629] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.386997] systemd[1]: Configuration file /etc/systemd/system/getty.target.wants/../../../../lib/systemd/system/getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.407060] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.422654] systemd[1]: Configuration file /lib/systemd/system/systemd-user-sessions.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.439375] systemd[1]: Configuration file /lib/systemd/system/nss-user-lookup.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.455200] systemd[1]: Configuration file /lib/systemd/system/systemd-logind.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.471477] systemd[1]: Configuration file /lib/systemd/system/user.slice is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.487047] systemd[1]: Configuration file /lib/systemd/system/rc-local.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.502478] systemd[1]: Configuration file /lib/systemd/system/network.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.517625] systemd[1]: Configuration file /lib/systemd/system/network-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.533214] systemd[1]: Configuration file /lib/systemd/system/systemd-resolved.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.549389] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.resolve1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.566172] systemd[1]: Configuration file /lib/systemd/system/busnames.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.582310] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.network1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.599390] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.hostname1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.616259] systemd[1]: Configuration file /etc/systemd/system/systemd-hostnamed.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.633023] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.machine1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.649801] systemd[1]: Configuration file /lib/systemd/system/systemd-machined.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.666090] systemd[1]: Configuration file /lib/systemd/system/machine.slice is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.681160] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.login1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.697772] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.timedate1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.714645] systemd[1]: Configuration file /lib/systemd/system/systemd-timedated.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.731016] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.systemd1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.747765] systemd[1]: Configuration file /lib/systemd/system/org.freedesktop.locale1.busname is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.764503] systemd[1]: Configuration file /lib/systemd/system/systemd-localed.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.780710] systemd[1]: Configuration file /lib/systemd/system/busybox-klogd.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.796568] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.812824] systemd[1]: Configuration file /lib/systemd/system/busybox-syslog.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.830982] systemd[1]: Configuration file /lib/systemd/system/rescue.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.847175] systemd[1]: Configuration file /lib/systemd/system/systemd-reboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.863101] systemd[1]: Configuration file /lib/systemd/system/final.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.878053] systemd[1]: Configuration file /lib/systemd/system/poweroff.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.894018] systemd[1]: Configuration file /lib/systemd/system/systemd-poweroff.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.911373] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.path is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.928314] systemd[1]: Configuration file /lib/systemd/system/systemd-ask-password-console.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.945487] systemd[1]: Configuration file /lib/systemd/system/kmod-static-nodes.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.961653] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-config.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.978529] systemd[1]: Configuration file /lib/systemd/system/sys-fs-fuse-connections.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 4.995165] systemd[1]: Configuration file /lib/systemd/system/systemd-random-seed.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.012597] systemd[1]: Configuration file /lib/systemd/system/systemd-update-done.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.029075] systemd[1]: Configuration file /lib/systemd/system/systemd-vconsole-setup.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.045719] systemd[1]: Configuration file /lib/systemd/system/systemd-firstboot.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.061919] systemd[1]: Configuration file /lib/systemd/system/sys-kernel-debug.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.077837] systemd[1]: Configuration file /lib/systemd/system/systemd-hwdb-update.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.094221] systemd[1]: Configuration file /lib/systemd/system/ldconfig.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.109615] systemd[1]: Configuration file /lib/systemd/system/systemd-modules-load.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.126100] systemd[1]: Configuration file /lib/systemd/system/systemd-machine-id-commit.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.143007] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-flush.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.159647] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.176284] systemd[1]: Configuration file /lib/systemd/system/systemd-udev-trigger.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.192786] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-control.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.209341] systemd[1]: Configuration file /lib/systemd/system/systemd-udevd-kernel.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.225691] systemd[1]: Configuration file /lib/systemd/system/systemd-sysctl.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.241665] systemd[1]: Configuration file /lib/systemd/system/systemd-tmpfiles-setup-dev.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.258645] systemd[1]: Configuration file /etc/systemd/system/systemd-udevd.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.274069] systemd[1]: Configuration file /lib/systemd/system/systemd-update-utmp.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.290529] systemd[1]: Configuration file /lib/systemd/system/systemd-journal-catalog-update.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.307982] systemd[1]: Configuration file /lib/systemd/system/dev-mqueue.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.323394] systemd[1]: Configuration file /lib/systemd/system/dev-hugepages.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.339053] systemd[1]: Configuration file /lib/systemd/system/systemd-timesyncd.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.355476] systemd[1]: Configuration file /etc/systemd/system/sync-clocks.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.371413] systemd[1]: Configuration file /lib/systemd/system/run-postinsts.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.386752] systemd[1]: Configuration file /lib/systemd/system/swap.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.401992] systemd[1]: Configuration file /lib/systemd/system/emergency.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.417493] systemd[1]: Configuration file /lib/systemd/system/syslog.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.432842] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-audit.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.449353] systemd[1]: Configuration file /lib/systemd/system/systemd-journald-dev-log.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.466172] systemd[1]: Configuration file /lib/systemd/system/sockets.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.483557] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.499874] systemd[1]: Configuration file /lib/systemd/system/systemd-initctl.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.515830] systemd[1]: Configuration file /lib/systemd/system/dropbear.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.531949] systemd[1]: Configuration file /lib/systemd/system/systemd-networkd.socket is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.547916] systemd[1]: Configuration file /lib/systemd/system/umount.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.562928] systemd[1]: Configuration file /lib/systemd/system/var-lib-machines.mount is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.578916] systemd[1]: Configuration file /lib/systemd/system/systemd-remount-fs.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.595779] systemd[1]: Configuration file /lib/systemd/system/systemd-fsck-root.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.611948] systemd[1]: Configuration file /lib/systemd/system/var-volatile-lib.service is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.628073] systemd[1]: Configuration file /lib/systemd/system/emergency.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.643387] systemd[1]: Configuration file /lib/systemd/system/local-fs-pre.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.658937] systemd[1]: Configuration file /lib/systemd/system/shutdown.target is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 5.677185] systemd[1]: sockets.target: Found ordering cycle on sockets.target/start +[ 5.684967] systemd[1]: sockets.target: Found dependency on dropbear.socket/stop +[ 5.692413] systemd[1]: sockets.target: Found dependency on sysinit.target/start +[ 5.699859] systemd[1]: sockets.target: Found dependency on alignment.service/start +[ 5.707563] systemd[1]: sockets.target: Found dependency on basic.target/start +[ 5.714817] systemd[1]: sockets.target: Found dependency on sockets.target/start +[ 5.722260] systemd[1]: sockets.target: Breaking ordering cycle by deleting job dropbear.socket/stop +[ 5.731461] systemd[1]: dropbear.socket: Job dropbear.socket/stop deleted to break ordering cycle starting with sockets.target/start +[ 5.767081] systemd[1]: basic.target: Found ordering cycle on basic.target/start +[ 5.774511] systemd[1]: basic.target: Found dependency on sysinit.target/start +[ 5.781799] systemd[1]: basic.target: Found dependency on alignment.service/start +[ 5.789328] systemd[1]: basic.target: Found dependency on basic.target/start +[ 5.796407] systemd[1]: basic.target: Breaking ordering cycle by deleting job alignment.service/start +[ 5.805683] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with basic.target/start +[ 5.838522] systemd[1]: Reached target Swap. +[ 5.865799] systemd[1]: Created slice System Slice. +[ 5.887175] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ 5.907146] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 5.927523] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ 5.947114] systemd[1]: Listening on Syslog Socket. +[ 5.967072] systemd[1]: Listening on udev Kernel Socket. +[ 5.987089] systemd[1]: Listening on Journal Socket (/dev/log). +[ 6.007028] systemd[1]: Reached target Remote File Systems. +[ 6.027496] systemd[1]: Created slice system-getty.slice. +[ 6.047098] systemd[1]: Listening on udev Control Socket. +[ 6.067147] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ 6.097030] systemd[1]: Reached target Paths. +[ 6.117098] systemd[1]: Listening on Journal Socket. +[ 6.167193] systemd[1]: Starting Setup Virtual Console... +[ 6.188754] systemd[1]: Mounting Debug File System... +[ 6.219210] systemd[1]: Mounting POSIX Message Queue File System... +[ 6.249983] systemd[1]: Mounting Temporary Directory... +[ 6.279380] systemd[1]: Starting Journal Service... +[ 6.299756] systemd-journald[138]: Configuration file /etc/systemd/journald.conf is marked executable. Please remove executable permission bits. Proceeding anyway. +[ 6.321258] systemd[1]: Starting Load Kernel Modules... +[ 6.347843] systemd[1]: Created slice User and Session Slice. +[ 6.367219] systemd[1]: Reached target Slices. +[ 6.417226] systemd[1]: Starting Create list of required static device nodes for the current kernel... +[ 6.449099] systemd[1]: Starting Remount Root and Kernel File Systems... +[ 6.464022] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) +[ 6.477451] systemd[1]: Listening on Network Service Netlink Socket. +[ 6.507587] systemd[1]: Mounted Debug File System. +[ 6.527153] systemd[1]: Mounted POSIX Message Queue File System. +[ 6.547215] systemd[1]: Mounted Temporary Directory. +[ 6.577302] systemd[1]: Started Journal Service. +[ 7.192194] systemd-journald[138]: Received request to flush runtime journal from PID 1 +[ 7.557424] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 +[ 7.565239] remoteproc0: 58820000.ipu is available +[ 7.582901] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 7.599922] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.612728] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 7.623080] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 +[ 7.632818] remoteproc0: failed to load dra7-ipu1-fw.xem4 +[ 7.639901] remoteproc1: 55020000.ipu is available +[ 7.639904] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 7.639906] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.640159] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 7.640196] remoteproc2: 40800000.dsp is available +[ 7.640199] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 7.640201] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.640488] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 7.640527] remoteproc3: 41000000.dsp is available +[ 7.640529] remoteproc3: Note: remoteproc is still under development and considered experimental. +[ 7.640531] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 7.799313] remoteproc2: registered virtio0 (type 7) +[ 7.911923] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.933780] remoteproc3: registered virtio1 (type 7) +[ 7.978800] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 +[ 7.980972] remoteproc1: registered virtio2 (type 7) +[ 7.995190] rtc rtc0: 48838000.rtc: dev (254:0) +[ 7.995204] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 8.123082] SCSI subsystem initialized +[ 8.187423] libata version 3.00 loaded. +[ 8.225251] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled +[ 8.261594] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 8.289245] CAN device driver interface +[ 8.296477] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst +[ 8.340251] scsi host0: ahci +[ 8.345311] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 342 +[ 8.377281] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 8.494013] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.549517] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.568903] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=358) +[ 8.659009] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 8.704764] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 +[ 8.727458] ata1: SATA link down (SStatus 0 SControl 300) +[ 9.284593] remoteproc2: powering up 40800000.dsp +[ 9.292523] remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 2851416 +[ 9.299116] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 9.299146] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 9.299220] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 9.322751] remoteproc2: remote processor 40800000.dsp is now up +[ 9.327180] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 9.327274] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x3d +[ 9.329291] remoteproc3: powering up 41000000.dsp +[ 9.337031] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 2851416 +[ 9.343603] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 9.343633] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 9.343676] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 9.372323] remoteproc3: remote processor 41000000.dsp is now up +[ 9.397071] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 9.397152] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x3d +[ 9.416922] remoteproc1: powering up 55020000.ipu +[ 9.423754] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 6452356 +[ 9.423831] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 9.484243] remoteproc1: remote processor 55020000.ipu is now up +[ 9.485270] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 9.524588] NET: Registered protocol family 41 +[ 9.534545] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 9.883274] net eth1: initializing cpsw version 1.15 (0) +[ 9.892488] net eth0: initialized cpsw ale version 1.4 +[ 9.897719] net eth0: ALE Table size 1024 +[ 9.920001] net eth1: phy found : id is : 0x20005c7a +[ 9.941698] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 9.949627] net eth0: initializing cpsw version 1.15 (0) +[ 9.962122] net eth0: phy found : id is : 0x20005c7a +[ 9.973396] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 9.984750] usbcore: registered new interface driver usbfs +[ 9.990996] usbcore: registered new interface driver hub +[ 9.996939] usbcore: registered new device driver usb +[ 10.040623] dwc3 48890000.usb: otg: primary host xhci-hcd.0.auto registered +[ 10.054235] dwc3 48890000.usb: otg: shared host xhci-hcd.0.auto registered +[ 10.063871] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 10.070764] dwc3 48890000.usb: otg: can't start till gadget registers +[ 10.088185] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.093761] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 10.104533] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 +[ 10.113954] xhci-hcd xhci-hcd.1.auto: irq 499, io mem 0x488d0000 +[ 10.129511] hub 1-0:1.0: USB hub found +[ 10.133808] hub 1-0:1.0: 1 port detected +[ 10.153047] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.167028] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 10.185457] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 10.205147] hub 2-0:1.0: USB hub found +[ 10.209027] hub 2-0:1.0: 1 port detected +[ 11.047352] random: nonblocking pool is initialized +[ 11.964000] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx +[ 11.971896] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 20.044375] omap_hwmod: mmu1_dsp2: _wait_target_disable failed +[ 20.058497] omap_hwmod: mmu1_dsp1: _wait_target_disable failed +[ 20.071628] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 20.084695] omap_hwmod: mmu0_dsp1: _wait_target_disable failed + 2. it seems that the driver is not fully supported for 'DP83TC811R-Q1'. Is there any patch to resolve it? Thank you. + +Hi This does not seem to be related to the ethernet driver but more a link negotiation issue at the PHY level I am not entirely familiar with the PHY part that you have mentioned above. What changes did you make for enabling support for the new PHY part Have you ensured that the PHY boot strap settings are for 100Mbps, full-duplex, auto-negotiation enabled - with this the PHY should link up at 100Mbps without need for SW intervention, you can check at the external switch side if there is a visual LED indication for this + +HI Are there further updates from your side - has the issue been resolved + diff --git a/data2/text/range/30001+/836567.txt b/data2/text/range/30001+/836567.txt new file mode 100644 index 0000000000000000000000000000000000000000..e70a3f7227bfcf4c4361d519be94b89a7ee46f61 --- /dev/null +++ b/data2/text/range/30001+/836567.txt @@ -0,0 +1,26 @@ +Ticket Name: Compiler: TDA2Px-ACD Can't get Kernel Omage + +Query Text: +Other Parts Discussed in Thread: PMP Tool/software: TI C/C++ Compiler Hello Sir We need your help to solve our issue about can't boot up TDA2Px-ACD board, we always get the can not get Kernel image. Like below picture, anything we need modified. We have already prepare the SD card according to ch3 and ch4.2 of VisionSDK_Linux_UserGuide.pdf, and setting the System Boot 1 1 1 0 0 0 0 1 0 0 0 0 0 0 1 SD Card information as below, ls -al $INSTALL_DIR/vision_sdk/binaries/apps/tda2px_evm_linux_all/hlos/linux/boot total 693428 drwxr-xr-x 2 michaelwu michaelwu 4096 九 5 11:38 . drwxr-xr-x 3 michaelwu michaelwu 4096 九 5 10:38 .. -rwxr-xr-x 1 michaelwu michaelwu 128100 九 5 10:27 MLO -rw-rw-r-- 1 michaelwu michaelwu 709079040 九 4 17:33 tisdk-rootfs-image-dra7xx-evm.tar.xz -rwxr-xr-x 1 michaelwu michaelwu 839960 九 5 10:27 u-boot.img -rwxrwxr-x 1 michaelwu michaelwu 173 九 5 10:40 uenv.txt sudo fdisk /dev/sdb1 Device Boot Start End Sectors Size Id Type /dev/sdb1p1 * 2048 526335 524288 256M c W95 FAT32 (LBA) /dev/sdb1p2 526336 15521791 14995456 7.2G 83 Linux Thanks. Michael Wu + +Responses: +Hi Michael, did you set fdtfile=dra76-evm-infoada.dtb in uenv.txt as described in chapter "3.1.2 SD only boot" in VisionSDK_Linux_UserGuide.pdf? Regards, Yordan + +Hello Yordan, Yes, we set fdtfile=dra76-evm-infoada.dtb in uenv.txt. Do you have your build image as below we can downloaded and installed to SD Card? Maybe our build environment incorrect. MLO, tisdk-rootfs-image-dra7xx-evm.tar.xz, u-boot.img and uenv.txt Thanks Michael Wu + +Hello Yordan, Added our uenv.txt information to you, michaelwu@michaelwu:~/PROCESSOR_SDK_VISION_03_07_00_00$ cat /home/michaelwu/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/binaries/apps/tda2px_evm_linux_all/hlos/linux/boot/uenv.txt fdtfile=dra76-evm-infoada.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M cma=64M" Thanks Michael Wu + +Hi Michael, can you check if dra76-evm-infoada.dtb is copied to the /boot directory on the SD card? Regards, Yordan + +Hello Yordan We have added dra76-evm-infoadas.dtb to boot folder, still can't work. SYSTEMConfig setting 11100000 10000001 Some log following, do we generate the boot SD have incorrect method? Thanks Michael Wu michaelwu@michaelwu:~/PROCESSOR_SDK_VISION_03_07_00_00$ ls -al vision_sdk/binaries/apps/tda2px_evm_linux_all/hlos/linux/boot/ total 693536 drwxr-xr-x 2 michaelwu michaelwu 4096 九 12 10:29 . drwxr-xr-x 3 michaelwu michaelwu 4096 九 5 10:38 .. -rw-rw-r-- 1 michaelwu michaelwu 108033 九 12 10:29 dra76-evm-infoadas.dtb -rwxr-xr-x 1 michaelwu michaelwu 128100 九 5 10:27 MLO -rw-rw-r-- 1 michaelwu michaelwu 709079040 九 4 17:33 tisdk-rootfs-image-dra7xx-evm.tar.xz -rwxr-xr-x 1 michaelwu michaelwu 839960 九 5 10:27 u-boot.img -rwxrwxr-x 1 michaelwu michaelwu 173 九 5 10:40 uenv.txt michaelwu@michaelwu:~/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/build$ sudo ./hlos/scripts/linux/mksdboot.sh --device /dev/sdb1 --appname apps --makeconfig tda2px_evm_linux_all [sudo] password for michaelwu: -- Main device is: /dev/sda5 ************************************************************ * THIS WILL DELETE ALL THE DATA ON /dev/sdb1 * * * * WARNING! Make sure your computer does not go * * in to idle mode while this script is * * running. The script will complete, * * but your SD card may be corrupted. * * * * Press to confirm.... * ************************************************************ ls: cannot access '/dev/sdb1?': No such file or directory 1024+0 records in 1024+0 records out 1048576 bytes (1.0 MB, 1.0 MiB) copied, 0.0047449 s, 221 MB/s Welcome to fdisk (util-linux 2.27.1). Changes will remain in memory only, until you decide to write them. Be careful before using the write command. Device does not contain a recognized partition table. Created a new DOS disklabel with disk identifier 0xdbf06816. Command (m for help): Partition type p primary (0 primary, 0 extended, 4 free) e extended (container for logical partitions) Select (default p): Partition number (1-4, default 1): First sector (2048-15521791, default 2048): Last sector, +sectors or +size{K,M,G,T,P} (2048-15521791, default 15521791): Created a new partition 1 of type 'Linux' and of size 256 MiB. Command (m for help): Partition type p primary (1 primary, 0 extended, 3 free) e extended (container for logical partitions) Select (default p): Partition number (2-4, default 2): First sector (526336-15521791, default 526336): Last sector, +sectors or +size{K,M,G,T,P} (526336-15521791, default 15521791): Created a new partition 2 of type 'Linux' and of size 7.2 GiB. Command (m for help): Partition number (1,2, default 2): Partition type (type L to list all types): Changed type of partition 'Linux' to 'W95 FAT32 (LBA)'. Command (m for help): Partition number (1,2, default 2): The bootable flag on partition 1 is enabled now. Command (m for help): The partition table has been altered. Calling ioctl() to re-read partition table. Re-reading the partition table failed.: Invalid argument The kernel still uses the old table. The new table will be used at the next reboot or after you run partprobe(8) or kpartx(8). Press enter to continue. ./hlos/scripts/linux/mksdboot.sh: 156: read: arg count Formating /dev/sdb11 ... Cant find boot partition in /dev mke2fs 1.42.13 (17-May-2015) The file /dev/sdb1p2 does not exist and no size was specified. Copying filesystem on /dev/sdb11,/dev/sdb12 mount: special device /dev/sdb11 does not exist ERROR: executing mount /dev/sdb11 /tmp/sdk/27133/boot + +Hi Michael, the command for creating the SD card should be changed from: sudo ./hlos/scripts/linux/mksdboot.sh --device /dev/sdb1 --appname apps --makeconfig tda2px_evm_linux_all to: sudo ./hlos/scripts/linux/mksdboot.sh --device /dev/sdb --appname apps --makeconfig tda2px_evm_linux_all (it takes the parent device /dev/sdb as argument, /dev/sdb1 indicates the first partition on this device) Regards, Yordan + +Hello Yordan We do below script, now the EV board can boot up, but u-boot show below, maybe we miss some steps. Thanks for you support. Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => sudo ./hlos/scripts/linux/mksdboot.sh --device /dev/sdb --appname apps --makeconfig tda2px_evm_linux_all Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00016-gcc5b418 (Sep 05 2019 - 10:25:19 +0800) CPU : DRA762-GP ES1.0 Model: TI DRA762 EVM Board: DRA76x EVM REV A.2 DRAM: 4 GiB MMC: mmc@4809c000: fail to find sdr104 mode FDT_ERR_NOTFOUND no pinctrl for sdr104 mmc@4809c000: fail to find ddr50 mode FDT_ERR_NOTFOUND no pinctrl for ddr50 mmc@4809c000: fail to find sdr50 mode FDT_ERR_NOTFOUND no pinctrl for sdr50 mmc@4809c000: fail to find sdr25 mode FDT_ERR_NOTFOUND no pinctrl for sdr25 mmc@4809c000: fail to find sdr12 mode FDT_ERR_NOTFOUND no pinctrl for sdr12 OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 173 bytes read in 2 ms (84 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3576904 bytes read in 170 ms (20.1 MiB/s) ** File not found /boot/dra76-evm-infoada.dtb ** Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x369448 ] ERROR: Did not find a cmdline Flattened Device Tree Could not find a valid device tree Card did not respond to voltage select! Card did not respond to voltage select! ** Bad device mmc 1 ** Card did not respond to voltage select! ** Bad device mmc 1 ** Card did not respond to voltage select! ** Bad device mmc 1 ** Card did not respond to voltage select! ** Bad device mmc 1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => Thanks your help. Michael Wu + +Hi Michael, sorry for the delay. I see error: ** File not found /boot/dra76-evm-infoada.dtb ** can you change the name in uenv.txt to dra76-evm-infoadas.dtb (it seems it is a typo in the linux userguide). Regards, Yordan + +Hello Yordan Yes, we can load the Kernel Image now after change the name in uenv.txt to dra76-evm-infoadas.dtb. But still we can not fully bootup success, below are logs. Thanks Michael Wu U-Boot SPL 2016.05-00016-gcc5b418 (Sep 05 2019 - 10:25:19) DRA762-GP ES1.0 no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... Card did not respond to voltage select! *** Warning - MMC init failed, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00016-gcc5b418 (Sep 05 2019 - 10:25:19 +0800) CPU : DRA762-GP ES1.0 Model: TI DRA762 EVM Board: DRA76x EVM REV A.2 DRAM: 4 GiB MMC: mmc@4809c000: fail to find sdr104 mode FDT_ERR_NOTFOUND no pinctrl for sdr104 mmc@4809c000: fail to find ddr50 mode FDT_ERR_NOTFOUND no pinctrl for ddr50 mmc@4809c000: fail to find sdr50 mode FDT_ERR_NOTFOUND no pinctrl for sdr50 mmc@4809c000: fail to find sdr25 mode FDT_ERR_NOTFOUND no pinctrl for sdr25 mmc@4809c000: fail to find sdr12 mode FDT_ERR_NOTFOUND no pinctrl for sdr12 OMAP SD/MMC: 0, OMAP SD/MMC: 1 Card did not respond to voltage select! *** Warning - MMC init failed, using default environment Card did not respond to voltage select! ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 174 bytes read in 3 ms (56.6 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3576904 bytes read in 171 ms (19.9 MiB/s) 108033 bytes read in 23 ms (4.5 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x369448 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff600 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00038-g0af2ab5 (michaelwu@michaelwu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Wed Sep 4 17:02:53 CST 2019 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA762 EVM [ 0.000000] Reserved memory: OVERLAP DETECTED! [ 0.000000] vsdk_sr1_mem@84000000 (0x0000000084000000--0x0000000097000000) overlaps with cmem@95400000 (0x0000000095400000--0x0000000095800000) [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 64 MiB at 0x00000000bb800000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA762 ES1.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef629000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 250176 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=788d18e2-02 rw rootwait ip=none mem=1024M cma=64M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 352156K/1007616K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 409700K reserved, 245760K cma-reserved, 192512K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) [ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) [ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) [ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000015] Switching to timer-based delay loop, resolution 162ns [ 0.000330] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000338] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000794] Console: colour dummy device 80x30 [ 0.000810] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000816] This ensures that you still see kernel messages. Please [ 0.000822] update your kernel commandline. [ 0.000836] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000849] pid_max: default: 32768 minimum: 301 [ 0.000948] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000958] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001494] Initializing cgroup subsys io [ 0.001511] Initializing cgroup subsys memory [ 0.001535] Initializing cgroup subsys devices [ 0.001547] Initializing cgroup subsys freezer [ 0.001558] Initializing cgroup subsys perf_event [ 0.001569] Initializing cgroup subsys pids [ 0.001594] CPU: Testing write buffer coherency: ok [ 0.001788] /cpus/cpu@0 missing clock-frequency property [ 0.001804] /cpus/cpu@1 missing clock-frequency property [ 0.001815] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.001847] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.080040] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.080109] Brought up 2 CPUs [ 0.080122] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.080129] CPU: All CPU(s) started in HYP mode. [ 0.080134] CPU: Virtualization extensions available. [ 0.080509] devtmpfs: initialized [ 0.109995] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110938] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.225302] omap_hwmod: dcan1: _wait_target_disable failed [ 0.322395] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.322417] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.327347] pinctrl core: initialized pinctrl subsystem [ 0.328208] NET: Registered protocol family 16 [ 0.329146] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.350209] cpuidle: using governor ladder [ 0.380230] cpuidle: using governor menu [ 0.388752] OMAP GPIO hardware version 0.1 [ 0.392862] GPIO line 161 (radio_rst) hogged as output/low [ 0.395233] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [ 0.419450] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.419461] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.419946] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.419955] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.420558] OMAP DMA hardware revision 0.0 [ 0.461414] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.462566] edma 43300000.edma: memcpy is disabled [ 0.467248] edma 43300000.edma: TI EDMA DMA engine driver [ 0.472103] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.472280] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.472448] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.472610] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.472886] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.473069] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.476068] palmas 0-0058: IRQ missing: skipping irq request [ 0.490704] palmas 0-0058: Muxing GPIO 51, PWM 0, LED 2 [ 0.541249] irq: no irq domain found for /ocp/i2c@48070000/tps65917@58 ! [ 0.542154] pcf857x 0-0020: probed [ 0.542719] pcf857x 0-0021: probed [ 0.543101] GPIO line 465 (vin6_sel_s0) hogged as output/low [ 0.543229] GPIO line 466 (vin2_s0) hogged as output/low [ 0.543356] GPIO line 471 (vin2_s2) hogged as output/high [ 0.543482] GPIO line 473 (exvin2_s0) hogged as output/low [ 0.543607] GPIO line 474 (exvin2_s2) hogged as output/high [ 0.543700] pcf857x 0-0026: probed [ 0.543845] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.544250] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.560554] pcf857x: probe of 3-0021 failed with error -121 [ 0.560592] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz [ 0.560796] media: Linux media interface: v0.10 [ 0.560848] Linux video capture interface: v2.00 [ 0.560889] pps_core: LinuxPPS API ver. 1 registered [ 0.560896] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.560925] PTP clock support registered [ 0.560975] EDAC MC: Ver: 3.0.0 [ 0.561735] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.562027] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.562366] Advanced Linux Sound Architecture Driver Initialized. [ 0.563222] clocksource: Switched to clocksource arch_sys_counter [ 0.573562] NET: Registered protocol family 2 [ 0.574056] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.574120] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.574245] TCP: Hash tables configured (established 8192 bind 8192) [ 0.574290] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.574321] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.574528] NET: Registered protocol family 1 [ 0.574792] RPC: Registered named UNIX socket transport module. [ 0.574801] RPC: Registered udp transport module. [ 0.574808] RPC: Registered tcp transport module. [ 0.574814] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.575805] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.585830] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.586471] NFS: Registering the id_resolver key type [ 0.586499] Key type id_resolver registered [ 0.586506] Key type id_legacy registered [ 0.586564] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.587839] bounce: pool size: 64 pages [ 0.587994] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [ 0.588009] io scheduler noop registered [ 0.588021] io scheduler deadline registered [ 0.588054] io scheduler cfq registered (default) [ 0.590446] vsys_5v0: supplied by vsys_12v0 [ 0.590500] ldo3: supplied by vsys_5v0 [ 0.594251] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [ 0.597518] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [ 0.597531] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [ 0.597563] IO 0x20003000..0x20012fff -> 0x00000000 [ 0.597584] MEM 0x20013000..0x2fffffff -> 0x20013000 [ 0.627423] dra7-pcie 51000000.pcie_rc: link is not up [ 0.627586] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [ 0.627599] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.627609] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.627618] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 0.628019] PCI: bus0: Fast back to back transfers disabled [ 0.628135] PCI: bus1: Fast back to back transfers enabled [ 0.628218] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [ 0.628234] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [ 0.628245] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.628469] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [ 0.688784] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.692174] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 [ 1.776238] console [ttyS0] enabled [ 1.780632] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.790343] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.800381] [drm] Initialized drm 1.1.0 20060810 [ 1.805917] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 1.812562] [drm] No driver support for vblank timestamp query. [ 1.818721] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [ 1.831661] loop: module loaded [ 1.837667] vmemexp device MAJOR num = 245 [ 1.841794] vmemexp class registered [ 1.845534] /dev/vmemexp device registered [ 1.849649] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 1.858162] m25p80 spi32766.0: s25fl256s1 (32768 Kbytes) [ 1.863582] 7 ofpart partitions found on MTD device spi32766.0 [ 1.869441] Creating 7 MTD partitions on "spi32766.0": [ 1.874619] 0x000000000000-0x000000040000 : "QSPI.SPL" [ 1.880725] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 1.887079] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 1.894051] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 1.900728] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 1.908137] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 1.914504] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 1.922257] libphy: Fixed MDIO Bus: probed [ 1.973258] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [ 1.979380] libphy: 48485000.mdio: probed [ 1.987395] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 [ 1.995741] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver TI DP83867 [ 2.004717] cpsw 48484000.ethernet: Detected MACID = f8:36:9b:0c:5f:2e [ 2.011362] cpsw 48484000.ethernet: cpts: overflow check period 800 [ 2.018364] cpsw 48484000.ethernet: cpsw: Detected MACID = f8:36:9b:0c:5f:2f [ 2.027077] mousedev: PS/2 mouse device common for all mice [ 2.033423] i2c /dev entries driver [ 2.042206] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.047089] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr104 mode [ 2.053600] omap_hsmmc 4809c000.mmc: no pinctrl state for ddr50 mode [ 2.059983] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr50 mode [ 2.066380] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr25 mode [ 2.072760] omap_hsmmc 4809c000.mmc: no pinctrl state for sdr12 mode [ 2.079397] vsys_3v3: supplied by vsys_12v0 [ 2.083929] vio_3v3: supplied by vsys_3v3 [ 2.088000] vio_3v3_sd: supplied by vio_3v3 [ 2.092331] ldo4: supplied by vsys_5v0 [ 2.133816] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.140199] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.163395] smps5: supplied by vsys_3v3 [ 2.183314] vio_1v8: supplied by smps5 [ 2.224974] ledtrig-cpu: registered to indicate activity on CPUs [ 2.236610] hwspinlock_user gatemp: requested 20 hwspinlocks [ 2.243550] aic_dvdd: supplied by vio_3v3 [ 2.248801] davinci-mcasp 48464000.mcasp: DAI is shared [ 2.254915] davinci-mcasp 48474000.mcasp: DAI is shared [ 2.261421] NET: Registered protocol family 10 [ 2.276764] sit: IPv6 over IPv4 tunneling driver [ 2.281932] NET: Registered protocol family 17 [ 2.286650] Key type dns_resolver registered [ 2.291058] omap_voltage_late_init: Voltage driver support not added [ 2.297940] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.304163] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.310446] buck10: supplied by vsys_3v3 [ 2.315065] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.321275] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.329502] Power Management for TI OMAP4+ devices. [ 2.334550] Registering SWP/SWPB emulation handler [ 2.340131] dmm 4e000000.dmm: workaround for errata i878 in use [ 2.347204] dmm 4e000000.dmm: initialized all PAT entries [ 2.353236] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [ 2.360240] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.379904] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.387029] hctosys: unable to open rtc device (rtc0) [ 2.399058] aic_dvdd: disabling [ 2.402342] ALSA device list: [ 2.405340] #0: DRA7xx-EVM [ 2.408793] Waiting for root device PARTUUID=788d18e2-02... [ 2.420448] mmc0: host does not support reading read-only switch, assuming write-enable [ 2.430404] mmc0: new high speed SDHC card at address 0001 [ 2.436210] mmcblk0: mmc0:0001 SD32G 29.1 GiB [ 2.441977] mmcblk0: p1 p2 [ 2.523733] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [ 2.532353] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [ 2.632854] EXT4-fs (mmcblk0p2): recovery complete [ 2.639011] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [ 2.647158] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 2.655165] devtmpfs: mounted [ 2.658291] Freeing unused kernel memory: 336K [ 2.662751] This architecture does not have kernel memory protection. [ 2.905021] systemd[1]: System time before build time, advancing clock. [ 2.942885] random: systemd: uninitialized urandom read (16 bytes read, 14 bits of entropy available) [ 2.956361] random: systemd: uninitialized urandom read (16 bytes read, 14 bits of entropy available) [ 2.967293] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +B) [ 2.985671] systemd[1]: Detected architecture arm. Welcome to Arago 2016.12! [ 3.014302] systemd[1]: Set hostname to . [ 3.124902] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 15 bits of entropy available) [ 3.143380] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 3.154517] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 3.182001] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 16 bits of entropy available) [ 3.198366] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 17 bits of entropy available) [ 3.286562] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.295998] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.305639] random: systemd: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [ 3.616695] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [ 3.624500] systemd[1]: sysinit.target: Found dependency on alignment.service/start [ 3.632189] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [ 3.639629] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [ 3.649091] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [ SKIP ] Ordering cycle found, skipping alignment.service [ 3.675600] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 3.694663] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 3.713638] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 3.743537] systemd[1]: Listening on Journal Socket. [ OK ] Listening on Journal Socket. [ 3.773467] systemd[1]: Listening on udev Kernel Socket. [ OK ] Listening on udev Kernel Socket. [ 3.803472] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 3.846573] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 3.903451] systemd[1]: Mounting POSIX Message Queue File System... Mounting POSIX Message Queue File System... [ 3.937788] systemd[1]: Starting Load Kernel Modules... Starting Load Kernel Modules... [ 3.965781] systemd[1]: Starting Create list of required static device nodes for the current kernel... Starting Create list of required st... nodes for the current kernel... [ 4.033488] systemd[1]: Mounting Debug File System... Mounting Debug File System... [ 4.065409] systemd[1]: Starting Setup Virtual Console... Starting Setup Virtual Console... [ 4.084124] systemd[1]: Created slice system-serial\x2dgetty.slice. [ OK ] Created slice system-serial\x2dgetty.slice. [ 4.105410] systemd[1]: Starting Remount Root and Kernel File Systems... Starting Remount Root and Kernel File Systems... [ 4.119953] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) [ 4.125687] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ 4.153618] systemd[1]: Reached target Swap. [ OK ] Reached target Swap. [ 4.203406] systemd[1]: Mounting Temporary Directory... Mounting Temporary Directory... [ 4.223513] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 4.245526] systemd[1]: Starting Journal Service... Starting Journal Service... [ 4.273558] systemd[1]: Listening on udev Control Socket. [ OK ] Listening on udev Control Socket. [ 4.293703] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ 4.324383] systemd[1]: Created slice system-getty.slice. [ OK ] Created slice system-getty.slice. [ 4.353592] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ 4.373569] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 4.393402] systemd[1]: Reached target Paths. [ OK ] Reached target Paths. [ 4.447855] systemd[1]: Mounted POSIX Message Queue File System. [ OK ] Mounted POSIX Message Queue File System. [ 4.473542] systemd[1]: Mounted Debug File System. [ OK ] Mounted Debug File System. [ 4.493449] systemd[1]: Mounted Temporary Directory. [ OK ] Mounted Temporary Directory. [ 4.513624] systemd[1]: Started Journal Service. [ OK ] Started Journal Service. [FAILED] Failed to start Load Kernel Modules. See 'systemctl status systemd-modules-load.service' for details. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK ] Started Setup Virtual Console. [ OK ] Started Remount Root and Kernel File Systems. Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ 5.137021] systemd-journald[148]: Received request to flush runtime journal from PID 1 [ OK ] Reached target Local File Systems (Pre). Mounting /media/ram... Mounting /var/volatile... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. [ OK ] Started udev Kernel Device Manager. [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started udev Coldplug all Devices. [ 5.446727] CAN device driver interface [ 5.470118] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 5.485964] remoteproc0: 58820000.ipu is available [ 5.507868] remoteproc0: Note: remoteproc is still under development and considered experimental. [ 5.536626] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 5.576999] m_can 42c01a00.mcan: hclk could not be found [ 5.582709] remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2 [ 5.591977] m_can 42c01a00.mcan: m_can device registered (irq=361, version=32) [ 5.605279] remoteproc0: failed to load dra7-ipu1-fw.xem4 [ 5.619410] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [ 5.634147] remoteproc1: 55020000.ipu is available [ 5.651181] remoteproc1: Note: remoteproc is still under development and considered experimental. [ OK ] Found device /dev/ttyS0. [ 5.665461] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ 5.708829] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [ 5.727305] remoteproc2: 40800000.dsp is available Starting Load/Save Random Seed...[ 5.734875] remoteproc2: Note: remoteproc is still under development and considered experimental. [ 5.750251] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [ OK ] Reached target Local File Systems.[ 5.766810] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [ 5.779575] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [ 5.793548] remoteproc3: 41000000.dsp is available [ 5.802721] remoteproc3: Note: remoteproc is still under development and considered experimental. [ 5.814222] remoteproc3: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. Starting Create Volatile Files and Directories... [ 5.838244] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [ OK ] Started Load/Save Random Seed. [ OK ] Started Create Volatile Files and Directories. [ 6.080159] remoteproc1: registered virtio0 (type 7) Starting Update UTMP about System Boot/Shutdown... Starting Network Time Synchronization... [ 6.115783] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [ 6.229599] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [ 6.238290] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [ 7.023741] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Network Time Synchronization. [ OK ] Reached target System Time Synchronized. Starting Synchronize System and HW clocks... [FAILED] Failed to start Synchronize System and HW clocks. See 'systemctl status sync-clocks.service' for details. [ OK ] Reached target System Initialization. [ OK ] Listening on D-Bus System Message Bus Socket. [ 7.355052] SCSI subsystem initialized [ OK ] Listening on dropbear.socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ 8.079131] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 8.085918] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 8.094985] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 8.115001] scsi host0: ahci [ 8.118082] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 341 [ OK ] Started System Logging Service. [ OK ] Started D-Bus System Message Bus. [ 8.434307] remoteproc3: registered virtio1 (type 7) [ 8.473551] ata1: SATA link down (SStatus 0 SControl 300) [ 8.518930] remoteproc2: registered virtio2 (type 7) Starting Network Service... Starting Login Service... Starting Permit User Sessions... [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. Starting Save/Restore Sound Card State... [ 8.822935] net eth1: initializing cpsw version 1.15 (0) [ OK ] Started Kernel Logging Service. [ 8.843296] net eth0: initialized cpsw ale version 1.4 [ 8.860225] net eth0: ALE Table size 1024 [ 8.874839] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. Starting rc.pvr.service... [ OK ] Started Network Service. [ OK ] Started Permit User Sessions. [ 8.976532] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [ 8.987142] net eth1: phy found : id is : 0x2000a231 [ OK ] Started Save/Restore Sound Card State. [ 9.013766] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready [ 9.044713] net eth0: initializing cpsw version 1.15 (0) [ 9.074125] remoteproc1: powering up 55020000.ipu [ 9.105632] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3743164 [ 9.128491] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ OK ] Started rc.pvr.service. [ 9.197799] remoteproc1: remote processor 55020000.ipu is now up [ 9.203936] ------------[ cut here ]------------ [ 9.203945] WARNING: CPU: 0 PID: 222 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 9.203948] 44000000.ocp:L3 Custom Error: MASTER IPU2 TARGET L4_PER1_P3 (Idle): Data Access in Supervisor mode during Functional access [ 9.203977] Modules linked in: dwc3(+) udc_core bc_example(O) virtio_rpmsg_bus(+) ahci_platform libahci_platform libahci dwc3_omap extcon_usb_gpio libata scsi_mod extcon pvrsrvl [ 9.203982] CPU: 0 PID: 222 Comm: systemd-udevd Tainted: G O 4.4.84-00038-g0af2ab5 #1 [ 9.203984] Hardware name: Generic DRA74X (Flattened Device Tree) [ 9.203986] Backtrace: [ 9.203996] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 9.204001] r7:c02de608 r6:20070193 r5:00000000 r4:c0957810 [ 9.204008] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 9.204013] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 9.204018] r7:c02de608 r6:00000093 r5:00000009 r4:ed4bb660 [ 9.204022] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 9.204028] r8:00000017 r7:c084b9d8 r6:00000000 r5:c084b56c r4:c084b610 [ 9.204032] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 9.204035] r3:ef1f8d80 r2:c084b610 [ 9.204037] r4:80080003 [ 9.204043] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 9.204049] r10:c098748b r9:ef1f7300 r8:00000017 r7:00000000 r6:00000000 r5:ef1f7360 [ 9.204051] r4:ef210280 [ 9.204056] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 9.204062] r10:c09ace60 r9:00000170 r8:ef008000 r7:00000000 r6:c093fe44 r5:ef1f7360 [ 9.204064] r4:ef1f7300 [ 9.204068] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 9.204073] r7:00000000 r6:c093fe44 r5:ef1f7360 r4:ef1f7300 [ 9.204077] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 9.204082] r7:00000000 r6:ed4bb938 r5:00000017 r4:c0935424 [ 9.204086] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 9.204091] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 9.204097] r9:00000170 r8:fa213000 r7:fa212000 r6:ed4bb820 r5:fa21200c r4:c093a8ec [ 9.204100] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 9.204102] Exception stack(0xed4bb820 to 0xed4bb868) [ 9.204106] b820: 00000000 c098b300 00000000 00000000 00000202 00000012 ed4ba000 00000000 [ 9.204109] b840: ef008000 00000170 c09ace60 ed4bb8cc ed4bb8d0 ed4bb870 c0039204 c0038d70 [ 9.204111] b860: 60070113 ffffffff [ 9.204117] r9:00000170 r8:ef008000 r7:ed4bb854 r6:ffffffff r5:60070113 r4:c0038d70 [ 9.204121] [] (__do_softirq) from [] (irq_exit+0xbc/0x11c) [ 9.204127] r10:c09ace60 r9:00000170 r8:ef008000 r7:00000000 r6:00000000 r5:00000012 [ 9.204129] r4:ffffe000 [ 9.204133] [] (irq_exit) from [] (__handle_domain_irq+0x68/0xbc) [ 9.204136] r5:00000012 r4:c0935424 [ 9.204140] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 9.204146] r9:00000170 r8:fa213000 r7:fa212000 r6:ed4bb938 r5:fa21200c r4:c093a8ec [ 9.204149] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 9.204151] Exception stack(0xed4bb938 to 0xed4bb980) [ 9.204153] b920: 00000000 00000000 [ 9.204156] b940: 00000001 20070013 00000000 c0994cc8 00000000 00000006 00000045 00000170 [ 9.204159] b960: c09ace60 ed4bb9e4 ed4bb8c0 ed4bb988 c036b7a4 c007ee14 60070013 ffffffff [ 9.204165] r9:00000170 r8:00000045 r7:ed4bb96c r6:ffffffff r5:60070013 r4:c007ee14 [ 9.204169] [] (console_unlock) from [] (vprintk_emit+0x2a8/0x534) [ 9.204175] r10:00000000 r9:00000000 r8:00000000 r7:c098cee0 r6:c09af834 r5:00000003 [ 9.204177] r4:00000035 [ 9.204184] [] (vprintk_emit) from [] (dev_vprintk_emit+0xa8/0x1d0) [ 9.204190] r10:d9103000 r9:ed4bbb24 r8:c086680c r7:00000006 r6:ed60c1b4 r5:ed60c020 [ 9.204191] r4:ed60c000 [ 9.204196] [] (dev_vprintk_emit) from [] (dev_printk_emit+0x28/0x30) [ 9.204201] r10:d9103000 r9:00000000 r8:ed60c020 r7:ed60c1ac r6:ed60c1b4 r5:00000000 [ 9.204203] r4:ed60c000 [ 9.204207] [] (dev_printk_emit) from [] (__dev_printk+0x54/0x94) [ 9.204210] r3:c082f390 r2:c086680c [ 9.204214] [] (__dev_printk) from [] (_dev_info+0x40/0x48) [ 9.204228] [] (_dev_info) from [] (rproc_boot+0x4d0/0x55c [remoteproc]) [ 9.204232] r3:00000002 r2:c082432c r1:bf04cf98 [ 9.204247] [] (rproc_boot [remoteproc]) from [] (rproc_virtio_find_vqs+0x18c/0x1f0 [remoteproc]) [ 9.204253] r10:ed60c020 r9:00000002 r8:bf22fd5c r7:ed60dc10 r6:ed60ddf0 r5:ed4bbc44 [ 9.204254] r4:00000002 [ 9.204271] [] (rproc_virtio_find_vqs [remoteproc]) from [] (rpmsg_probe+0xbc/0x474 [virtio_rpmsg_bus]) [ 9.204277] r10:00000000 r9:00000000 r8:ed60dc10 r7:ed4bbc38 r6:ed60c000 r5:ed57d900 [ 9.204278] r4:bf04b96c [ 9.204290] [] (rpmsg_probe [virtio_rpmsg_bus]) from [] (virtio_dev_probe+0x230/0x310 [virtio]) [ 9.204296] r10:00000000 r9:00000000 r8:00000000 r7:ed60dc20 r6:ed60dc10 r5:00000000 [ 9.204297] r4:00000000 [ 9.204305] [] (virtio_dev_probe [virtio]) from [] (driver_probe_device+0x204/0x2f8) [ 9.204310] r10:00000000 r9:ecffda88 r8:00000013 r7:bf22fdfc r6:00000000 r5:ed60dc20 [ 9.204312] r4:c09c57a4 [ 9.204315] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 9.204321] r9:ecffda88 r8:1300259c r7:00000000 r6:ed60dc54 r5:bf22fdfc r4:ed60dc20 [ 9.204326] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 9.204330] r7:00000000 r6:c03e6838 r5:bf22fdfc r4:00000000 [ 9.204335] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 9.204339] r6:bf01dd58 r5:ed57d780 r4:bf22fdfc [ 9.204344] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 9.204349] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 9.204353] r7:ed4f3c40 r6:c093d6f0 r5:bf233000 r4:bf22fdfc [ 9.204359] [] (driver_register) from [] (register_virtio_driver+0x30/0x44 [virtio]) [ 9.204362] r5:bf233000 r4:00000000 [ 9.204373] [] (register_virtio_driver [virtio]) from [] (rpmsg_init+0x44/0x84 [virtio_rpmsg_bus]) [ 9.204381] [] (rpmsg_init [virtio_rpmsg_bus]) from [] (do_one_initcall+0x98/0x1e4) [ 9.204384] r5:bf233000 r4:c093d6f0 [ 9.204391] [] (do_one_initcall) from [] (do_init_module+0x68/0x378) [ 9.204397] r10:bf22ff00 r9:ecffda88 r8:1300259c r7:00000001 r6:ecffd0c0 r5:00000001 [ 9.204399] r4:bf22ff00 [ 9.204404] [] (do_init_module) from [] (load_module+0x1df8/0x2068) [ 9.204408] r6:ecffda80 r5:00000001 r4:ed4bbf44 [ 9.204412] [] (load_module) from [] (SyS_finit_module+0x88/0x98) [ 9.204418] r10:00000000 r9:ed4ba000 r8:c000fc84 r7:0000017b r6:b6e35d90 r5:00000007 [ 9.204420] r4:00000000 [ 9.204424] [] (SyS_finit_module) from [] (ret_fast_syscall+0x0/0x34) [ 9.204428] r6:00000000 r5:0053f928 r4:00000000 [ 9.204430] ---[ end trace 0e04da5f16e89a11 ]--- [ 9.226340] net eth0: phy found : id is : 0x2000a231 [ 9.231189] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9.898739] usbcore: registered new interface driver usbfs [ 9.899234] usbcore: registered new interface driver hub [ 9.899733] usbcore: registered new device driver usb [ 9.929910] omap-rproc 55020000.ipu: omap rproc 55020000.ipu crashed [ 9.937474] remoteproc1: crash detected in 55020000.ipu: type device exception [ 9.945513] virtio_rpmsg_bus virtio0: rpmsg host is online [ 9.945770] remoteproc1: handling crash #1 in 55020000.ipu [ 9.945772] remoteproc1: recovering 55020000.ipu [ 9.980822] remoteproc1: stopped remote processor 55020000.ipu [ 9.988075] remoteproc3: powering up 41000000.dsp [ 9.993022] remoteproc1: powering up 55020000.ipu [ 9.997991] remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3743164 [ 10.005738] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [ 10.020136] dwc3 48890000.usb: otg: primary host xhci-hcd.2.auto registered [ 10.040936] remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 19745928 [ 10.043323] dwc3 48890000.usb: otg: shared host xhci-hcd.2.auto registered [ 10.043326] dwc3 48890000.usb: otg: can't start till gadget registers [ 10.043434] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller [ 10.043451] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 1 [ 10.075532] xhci-hcd xhci-hcd.3.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x00210010 [ 10.102673] omap_hwmod: mmu0_dsp2: _wait_target_disable failed [ 10.108563] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 [ 10.113263] xhci-hcd xhci-hcd.3.auto: irq 496, io mem 0x488d0000 [ 10.120530] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 [ 10.126715] hub 1-0:1.0: USB hub found [ 10.130517] hub 1-0:1.0: 1 port detected [ 10.135279] remoteproc1: remote processor 55020000.ipu is now up [ 10.141409] ------------[ cut here ]------------ [ 10.141420] WARNING: CPU: 0 PID: 18 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368() [ 10.141423] 44000000.ocp:L3 Custom Error: MASTER IPU2 TARGET L4_PER1_P3 (Idle): Data Access in Supervisor mode during Functional access [ 10.141457] Modules linked in: xhci_plat_hcd(+) xhci_hcd usbcore dwc3 udc_core bc_example(O) virtio_rpmsg_bus(+) ahci_platform libahci_platform libahci dwc3_omap extcon_usb_gpil [ 10.141462] CPU: 0 PID: 18 Comm: kworker/0:1 Tainted: G W O 4.4.84-00038-g0af2ab5 #1 [ 10.141464] Hardware name: Generic DRA74X (Flattened Device Tree) [ 10.141472] Workqueue: events request_firmware_work_func [ 10.141474] Backtrace: [ 10.141484] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) [ 10.141490] r7:c02de608 r6:20070193 r5:00000000 r4:c0957810 [ 10.141497] [] (show_stack) from [] (dump_stack+0x8c/0xa0) [ 10.141501] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) [ 10.141507] r7:c02de608 r6:00000093 r5:00000009 r4:ef22b770 [ 10.141511] [] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x38/0x40) [ 10.141516] r8:00000017 r7:c084b9d8 r6:00000000 r5:c084b56c r4:c084b610 [ 10.141520] [] (warn_slowpath_fmt) from [] (l3_interrupt_handler+0x25c/0x368) [ 10.141523] r3:ef1f8d80 r2:c084b610 [ 10.141525] r4:80080003 [ 10.141532] [] (l3_interrupt_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 10.141538] r10:c098748b r9:ef1f7300 r8:00000017 r7:00000000 r6:00000000 r5:ef1f7360 [ 10.141540] r4:ef210280 [ 10.141545] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 10.141552] r10:c09ace60 r9:000001f1 r8:ef008000 r7:00000000 r6:c093fe44 r5:ef1f7360 [ 10.141553] r4:ef1f7300 [ 10.141558] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 10.141563] r7:00000000 r6:c093fe44 r5:ef1f7360 r4:ef1f7300 [ 10.141566] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 10.141572] r7:00000000 r6:00000000 r5:00000017 r4:c0935424 [ 10.141576] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 10.141580] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 10.141587] r9:000001f1 r8:fa213000 r7:fa212000 r6:ef22b930 r5:fa21200c r4:c093a8ec [ 10.141590] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 10.141592] Exception stack(0xef22b930 to 0xef22b978) [ 10.141595] b920: 00000000 00000000 00000001 20070013 [ 10.141598] b940: 00000000 c0997678 00000000 00000006 00000045 000001f1 c09ace60 ef22b9dc [ 10.141601] b960: ef22b8b8 ef22b980 c036b7a4 c007ee14 60070013 ffffffff [ 10.141607] r9:000001f1 r8:00000045 r7:ef22b964 r6:ffffffff r5:60070013 r4:c007ee14 [ 10.141612] [] (console_unlock) from [] (vprintk_emit+0x2a8/0x534) [ 10.141618] r10:00000000 r9:00000000 r8:00000000 r7:c098cee0 r6:c09af834 r5:00000003 [ 10.141620] r4:00000035 [ 10.141626] [] (vprintk_emit) from [] (dev_vprintk_emit+0xa8/0x1d0) [ 10.141632] r10:d9103000 r9:ef22bb1c r8:c086680c r7:00000006 r6:ed60c1b4 r5:ed60c020 [ 10.141634] r4:ed60c000 [ 10.141638] [] (dev_vprintk_emit) from [] (dev_printk_emit+0x28/0x30) [ 10.141644] r10:d9103000 r9:00000000 r8:ed60c020 r7:ed60c1ac r6:ed60c1b4 r5:00000000 [ 10.141645] r4:ed60c000 [ 10.141649] [] (dev_printk_emit) from [] (__dev_printk+0x54/0x94) [ 10.141652] r3:c082f390 r2:c086680c [ 10.141657] [] (__dev_printk) from [] (_dev_info+0x40/0x48) [ 10.141671] [] (_dev_info) from [] (rproc_boot+0x4d0/0x55c [remoteproc]) [ 10.141675] r3:00000002 r2:c082432c r1:bf04cf98 [ 10.141689] [] (rproc_boot [remoteproc]) from [] (rproc_virtio_find_vqs+0x18c/0x1f0 [remoteproc]) [ 10.141696] r10:ed60c020 r9:00000002 r8:bf22fd5c r7:ed60dc10 r6:ed60ddf0 r5:ef22bc3c [ 10.141697] r4:00000002 [ 10.141714] [] (rproc_virtio_find_vqs [remoteproc]) from [] (rpmsg_probe+0xbc/0x474 [virtio_rpmsg_bus]) [ 10.141720] r10:00000000 r9:00000000 r8:ed60dc10 r7:ef22bc30 r6:ed60c000 r5:ed57d280 [ 10.141722] r4:bf04b96c [ 10.141735] [] (rpmsg_probe [virtio_rpmsg_bus]) from [] (virtio_dev_probe+0x230/0x310 [virtio]) [ 10.141741] r10:00000000 r9:00000000 r8:00000000 r7:ed60dc20 r6:ed60dc10 r5:00000000 [ 10.141742] r4:00000000 [ 10.141749] [] (virtio_dev_probe [virtio]) from [] (driver_probe_device+0x204/0x2f8) [ 10.141755] r10:00000000 r9:00000000 r8:00000016 r7:bf22fdfc r6:00000000 r5:ed60dc20 [ 10.141757] r4:c09c57a4 [ 10.141760] [] (driver_probe_device) from [] (__device_attach_driver+0x8c/0xb4) [ 10.141766] r9:00000000 r8:c09c5780 r7:00000001 r6:ed60dc20 r5:ef22bd50 r4:bf22fdfc [ 10.141770] [] (__device_attach_driver) from [] (bus_for_each_drv+0x68/0x9c) [ 10.141775] r7:00000001 r6:c03e68d0 r5:ef22bd50 r4:00000000 [ 10.141779] [] (bus_for_each_drv) from [] (__device_attach+0xb8/0x11c) [ 10.141783] r6:ed60dc54 r5:ed60dc20 r4:ed60dc20 [ 10.141786] [] (__device_attach) from [] (device_initial_probe+0x14/0x18) [ 10.141791] r7:00000000 r6:bf01dd58 r5:ed60dc20 r4:ed60dc28 [ 10.141795] [] (device_initial_probe) from [] (bus_probe_device+0x8c/0x94) [ 10.141800] [] (bus_probe_device) from [] (device_add+0x3f4/0x57c) [ 10.141805] r7:00000000 r6:ed60dc20 r5:ed60c020 r4:ed60dc28 [ 10.141810] [] (device_add) from [] (device_register+0x1c/0x20) [ 10.141816] r10:bf049280 r9:ed60c020 r8:00000058 r7:ed60c020 r6:ed60dc20 r5:bf04b78c [ 10.141818] r4:ed60dc20 [ 10.141824] [] (device_register) from [] (register_virtio_device+0xb4/0xf4 [virtio]) [ 10.141827] r5:bf04b78c r4:ed60dc10 [ 10.141839] [] (register_virtio_device [virtio]) from [] (rproc_add_virtio_dev+0x4c/0xa0 [remoteproc]) [ 10.141844] r7:ed60c020 r6:00000007 r5:ed60c020 r4:ed60dc00 [ 10.141859] [] (rproc_add_virtio_dev [remoteproc]) from [] (rproc_handle_vdev+0x138/0x1ec [remoteproc]) [ 10.141864] r7:ed60c020 r6:ed60c000 r5:ed60dc00 r4:ed5b2858 [ 10.141878] [] (rproc_handle_vdev [remoteproc]) from [] (rproc_handle_resources+0x64/0xe8 [remoteproc]) [ 10.141884] r9:ed60c020 r8:bf04c914 r7:bf04d414 r6:00000410 r5:ed60c000 r4:00000000 [ 10.141898] [] (rproc_handle_resources [remoteproc]) from [] (rproc_fw_config_virtio+0xf8/0x100 [remoteproc]) [ 10.141904] r10:ef62b9c0 r9:00000000 r8:ef62f100 r7:00000410 r6:f2252000 r5:ecefe4c0 [ 10.141907] r4:ed60c000 r3:ffffffff [ 10.141916] [] (rproc_fw_config_virtio [remoteproc]) from [] (request_firmware_work_func+0x38/0x60) [ 10.141922] r7:00000000 r6:ef62b9c0 r5:ef21db00 r4:ecefe0c0 [ 10.141930] [] (request_firmware_work_func) from [] (process_one_work+0x124/0x3f4) [ 10.141931] r4:ecefe0c0 [ 10.141936] [] (process_one_work) from [] (worker_thread+0x4c/0x524) [ 10.141942] r10:ef62b9c0 r9:ef21db00 r8:00000008 r7:ef22a000 r6:ef62b9d4 r5:ef21db18 [ 10.141944] r4:ef62b9c0 [ 10.141951] [] (worker_thread) from [] (kthread+0x100/0x118) [ 10.141957] r10:00000000 r9:00000000 r8:c004a984 r7:ef21db00 r6:ef22a000 r5:ef222780 [ 10.141959] r4:00000000 [ 10.141964] [] (kthread) from [] (ret_from_fork+0x14/0x2c) [ 10.141970] r8:00000000 r7:00000000 r6:00000000 r5:c0050408 r4:ef222780 [ 10.141972] ---[ end trace 0e04da5f16e89a12 ]--- [ 10.345504] xhci-hcd xhci-hcd.3.auto: xHCI Host Controller [ 10.345514] xhci-hcd xhci-hcd.3.auto: new USB bus registered, assigned bus number 2 [ 10.345575] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 10.346688] hub 2-0:1.0: USB hub found [ 10.346710] hub 2-0:1.0: 1 port detected [ 10.892919] omap-rproc 55020000.ipu: omap rproc 55020000.ipu crashed [ 10.899329] remoteproc1: crash detected in 55020000.ipu: type device exception [ 10.900087] remoteproc1: handling crash #2 in 55020000.ipu + +Hi Michael, this error: [FAILED] Failed to start Load Kernel Modules. might happen because of mismatch between versions of the kernel and the modules. Can you try to recreate the SD card after rebuilding the kernel and the modules and see if the issue persists? Regards, Yordan + diff --git a/data2/text/range/30001+/839810.txt b/data2/text/range/30001+/839810.txt new file mode 100644 index 0000000000000000000000000000000000000000..53e58d9da5487c70b03a59e01c7a394a3bd33d19 --- /dev/null +++ b/data2/text/range/30001+/839810.txt @@ -0,0 +1,673 @@ +Ticket Name: AM5728: Camera screen is missing when running tidl sample model of object detection on TDA2 + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2 Hi sirs, I imported a tidl trained model ( voc0712_ssdJacintoNetV2_iter_120000.caffemodel in caffe-jacinto-models-caffe-0.16) to TDA2. The camera screen doesn't display correctly when I was running the model. Do you have any ideas to solve this problem? My VSDK version is 3.7 . Thank you, Gary + +Responses: +Hi, Can you first try with file based TIDL OD usecase and check that works or not. Then please try share the details of the usecase and other modification which you did for camera based input. Please share the stats logs of the usecase with camera. Regards, Anuj + +Hi Anuj, 1. The TIDL OD usecase works fine. 2. I use the trained model in caffe-jacinto-models-caffe-0.16 without any editing. Then I put the generated bin files into SD card and modify the bin file names in TIDL_SSD_CFG.txt . The other files are the same as previous working fine TIDL OD usecase. a) The deploy.prototxt & caffemodel used as the input files of import tools are in ".\caffe-jacinto-models-caffe-0.16\trained\object_detection\voc0712\JDetNet\ssd768x320_ds_PSP_dsFac_32_hdDS8_0\sparse" Here are my question: 1. The working fine TIDL OD usecase (jdetNet_ssd.bin) is given by TI Taiwan branch. We don't know which model is used to generate the bin files. Do you have any ideas? 2. In my opinion, I just replace the model without changing anything for camera (compare to the working usecase), it should be working, right? Please find attachment as the camera modified files and logs. camera_modified_files.rar 4572.logs.txt TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 144065 (12.29 ms) + SOC Init Cycles - 170883 (14.58 ms) + DDR Config Clock Cycles - 43352 (3.69 ms) + App Image Load Cycles - 91311391 (7791.90 ms) + Slave Core Bootup Cycles - 208340 (17.77 ms) + SBL Boot-up Cycles - 91879097 (7840.34 ms) + Time at which SBL started IPU1_0 - 271541 (8286.77 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 8.287958 s: ***** IPU1_0 Firmware build time 02:05:20 Aug 11 2019 +[IPU1-0] 8.288171 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 9.085676 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU1-0] 9.085859 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 9.085981 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 9.086073 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 9.086195 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 9.086317 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 9.086408 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-0] 9.086530 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-0] 9.086622 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 9.088421 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 9.088604 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 9.102909 s: UTILS: CIO: Init Done !!! +[IPU1-0] 9.103001 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 9.103092 s: SYSTEM: Notify init done !!! +[IPU1-0] 9.104953 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 9.105044 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 9.108948 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 9.109040 s: SYSTEM: System Init in progress !!! +[IPU1-0] 9.109131 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 9.109192 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 9.109284 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 9.109406 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 9.109497 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 9.109741 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 9.109833 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 9.109924 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 9.113859 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.113981 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.114073 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 9.114195 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.114317 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.114439 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.115201 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.115323 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.115415 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 9.115506 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.115598 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.115720 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.116147 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.116238 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.116330 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 9.116482 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.116696 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.116848 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.117367 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.117458 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.117550 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 9.117733 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.117824 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.117916 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.182333 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 9.183340 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 9.183553 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 9.183706 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252328 B (246 KB) +[IPU1-0] 9.183889 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 9.184072 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 9.184285 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 9.184438 s: SYSTEM: Initializing Links !!! +[IPU1-0] 9.453425 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 9.546666 s: BOARD: Board Init in progress !!! +[IPU1-0] 9.547062 s: BOARD: Board Init Done !!! +[IPU1-0] 9.558287 s: +[IPU1-0] 9.558348 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 9.558439 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 9.558500 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 9.558592 s: Platform : [EVM] +[IPU1-0] 9.558653 s: SOC : [TDA2XX] +[IPU1-0] 9.558714 s: SOC Revision : [ES1.1] +[IPU1-0] 9.558805 s: Board Detected : [Vision] +[IPU1-0] 9.564905 s: EEPROM Base Board Name: [5777xCPU] +[IPU1-0] 9.564997 s: Base Board Revision : [REV E] +[IPU1-0] 9.566308 s: Daughter Card Revision: [REV D] +[IPU1-0] 9.566369 s: +[IPU1-0] 9.570151 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 8.304123 s: ***** IPU1_1 Firmware build time 02:02:16 Aug 11 2019 +[IPU1-1] 8.304337 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 9.088177 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU1-1] 9.088391 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 9.088543 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 9.088665 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 9.088818 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 9.088940 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 9.089062 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-1] 9.089153 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-1] 9.089275 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 9.091410 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 9.092753 s: UTILS: CIO: Init Done !!! +[IPU1-1] 9.092875 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 9.092966 s: SYSTEM: Notify init done !!! +[IPU1-1] 9.094979 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 9.095101 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 9.098822 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 9.098944 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 9.099890 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 9.100103 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 9.100225 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645688 B (630 KB) +[IPU1-1] 9.100408 s: SYSTEM: Initializing Links !!! +[IPU1-1] 9.216098 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 9.219209 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 9.222625 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 9.225858 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 9.229427 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 9.232843 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 9.236137 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 9.239919 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 9.243152 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 9.246904 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 9.250106 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 9.250259 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 9.250320 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 8.374336 s: ***** A15_0 Firmware build time 02:04:07 Aug 11 2019 +[HOST ] 8.374367 s: *** SYSTEM: CPU Frequency , +[HOST ] 9.086713 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[HOST ] 9.086744 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[HOST ] 9.086744 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 9.086744 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 9.086774 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 9.086774 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 9.086805 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 9.086805 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[HOST ] 9.086805 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[HOST ] 9.089458 s: SYSTEM: System Common Init in progress !!! +[HOST ] 9.089519 s: SYSTEM: IPC init in progress !!! +[HOST ] 9.089519 s: SYSTEM: Notify init done !!! +[HOST ] 9.089580 s: SYSTEM: MsgQ init done !!! +[HOST ] 9.089580 s: SYSTEM: IPC init DONE !!! +[HOST ] 9.090160 s: SYSTEM: System Common Init Done !!! +[HOST ] 9.090160 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 9.090221 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 9.090221 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[HOST ] 9.090251 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6246704 B (6100 KB) +[HOST ] 9.090282 s: SYSTEM: Initializing Links !!! +[HOST ] 9.092814 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[HOST ] 9.092905 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[HOST ] 9.092966 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[HOST ] 9.093058 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[HOST ] 9.093119 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[HOST ] 9.093210 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[HOST ] 9.093271 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[HOST ] 9.093363 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[HOST ] 9.093454 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[HOST ] 9.093515 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[HOST ] 9.093607 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[HOST ] 9.093607 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 9.093668 s: SYSTEM: System A15 Init Done !!! +[HOST ] 9.387177 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 9.387634 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 8.368022 s: ***** DSP1 Firmware build time 01:58:26 Aug 11 2019 +[DSP1 ] 8.368083 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 9.090556 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP1 ] 9.090648 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP1 ] 9.090678 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 9.090739 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 9.090770 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 9.090800 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 9.090831 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP1 ] 9.090892 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP1 ] 9.090922 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 9.091105 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 9.091166 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 9.091410 s: UTILS: CIO: Init Done !!! +[DSP1 ] 9.091441 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 9.091471 s: SYSTEM: Notify init done !!! +[DSP1 ] 9.091654 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 9.091685 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 9.092508 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 9.092539 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 9.092814 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 9.092844 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 9.092905 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP1 ] 9.092936 s: SYSTEM: Initializing Links !!! +[DSP1 ] 9.101506 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 9.101567 s: lz4CompDecomp Init +[DSP1 ] 9.101598 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 9.467608 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 9.467638 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 8.367931 s: ***** DSP2 Firmware build time 02:00:38 Aug 11 2019 +[DSP2 ] 8.368022 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 9.092051 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP2 ] 9.092112 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP2 ] 9.092142 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 9.092203 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 9.092234 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 9.092264 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 9.092295 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP2 ] 9.092356 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP2 ] 9.092386 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 9.092569 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 9.092631 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 9.092875 s: UTILS: CIO: Init Done !!! +[DSP2 ] 9.092905 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 9.092936 s: SYSTEM: Notify init done !!! +[DSP2 ] 9.093119 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 9.093180 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 9.093973 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 9.094003 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 9.094217 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 9.094247 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 9.094308 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP2 ] 9.094339 s: SYSTEM: Initializing Links !!! +[DSP2 ] 9.102696 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 9.102757 s: lz4CompDecomp Init +[DSP2 ] 9.102787 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 9.469590 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 9.469621 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 9.074788 s: ***** EVE Firmware build time 01:52:46 Aug 11 2019 +[EVE1 ] 9.076587 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 9.096382 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE1 ] 9.097999 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE1 ] 9.099524 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 9.101049 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 9.102574 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 9.104007 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 9.105410 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE1 ] 9.106813 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE1 ] 9.108247 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 9.110504 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 9.112914 s: UTILS: CIO: Init Done !!! +[EVE1 ] 9.113890 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 9.115201 s: SYSTEM: Notify init done !!! +[EVE1 ] 9.117245 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 9.118221 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 9.133532 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 9.134600 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 9.136247 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 9.137589 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 9.138992 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 9.141584 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE1 ] 9.143933 s: SYSTEM: Initializing Links !!! +[EVE1 ] 9.241139 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 9.242268 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 9.055206 s: ***** EVE Firmware build time 01:54:00 Aug 11 2019 +[EVE2 ] 9.057158 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 9.098670 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE2 ] 9.100225 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE2 ] 9.101842 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 9.103275 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 9.104709 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 9.106112 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 9.107545 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE2 ] 9.108948 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE2 ] 9.110504 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 9.112761 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 9.115506 s: UTILS: CIO: Init Done !!! +[EVE2 ] 9.116665 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 9.117763 s: SYSTEM: Notify init done !!! +[EVE2 ] 9.119715 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 9.120691 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 9.136003 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 9.137131 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 9.138717 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 9.139998 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 9.141523 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 9.143994 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE2 ] 9.146495 s: SYSTEM: Initializing Links !!! +[EVE2 ] 9.244220 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 9.245348 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 9.072927 s: ***** EVE Firmware build time 01:55:13 Aug 11 2019 +[EVE3 ] 9.074818 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 9.100896 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE3 ] 9.102452 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE3 ] 9.103916 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE3 ] 9.105349 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE3 ] 9.106752 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE3 ] 9.108155 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE3 ] 9.109589 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE3 ] 9.111206 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE3 ] 9.112853 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE3 ] 9.115232 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 9.117855 s: UTILS: CIO: Init Done !!! +[EVE3 ] 9.118861 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 9.119959 s: SYSTEM: Notify init done !!! +[EVE3 ] 9.122521 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 9.123497 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 9.138260 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 9.139327 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 9.141066 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 9.142347 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 9.143719 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 9.146403 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE3 ] 9.148966 s: SYSTEM: Initializing Links !!! +[EVE3 ] 9.246355 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 9.247392 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 9.065363 s: ***** EVE Firmware build time 01:56:26 Aug 11 2019 +[EVE4 ] 9.067193 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 9.100896 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE4 ] 9.102452 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE4 ] 9.103916 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE4 ] 9.105349 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE4 ] 9.106752 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE4 ] 9.108155 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE4 ] 9.109589 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE4 ] 9.111114 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE4 ] 9.112761 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE4 ] 9.115201 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 9.117763 s: UTILS: CIO: Init Done !!! +[EVE4 ] 9.118770 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 9.119959 s: SYSTEM: Notify init done !!! +[EVE4 ] 9.122521 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 9.123497 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 9.138229 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 9.139327 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 9.141066 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 9.142347 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 9.143719 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 9.146342 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE4 ] 9.148905 s: SYSTEM: Initializing Links !!! +[EVE4 ] 9.246385 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 9.247422 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 8.285762 s: ***** IPU2 Firmware build time 02:07:28 Aug 11 2019 +[IPU2 ] 8.285945 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 9.089397 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU2 ] 9.089580 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU2 ] 9.089702 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 9.089824 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 9.089916 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 9.090038 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 9.090129 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU2 ] 9.090251 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU2 ] 9.090373 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 9.093424 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 9.094796 s: UTILS: CIO: Init Done !!! +[IPU2 ] 9.094949 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 9.095040 s: SYSTEM: Notify init done !!! +[IPU2 ] 9.096992 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 9.097084 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 9.102330 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 9.102452 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 9.103306 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 9.103580 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU2 ] 9.103763 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252424 B (246 KB) +[IPU2 ] 9.103916 s: SYSTEM: Initializing Links !!! +[IPU2 ] 9.214634 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU2 ] 9.217501 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU2 ] 9.220398 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU2 ] 9.223418 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU2 ] 9.226407 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU2 ] 9.229488 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU2 ] 9.232629 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU2 ] 9.235771 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU2 ] 9.238882 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU2 ] 9.242024 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU2 ] 9.245043 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU2 ] 9.245196 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 9.245257 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 10.604282 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines +[IPU1-0] 10.608582 s: QSPI Init Started +[IPU1-0] 10.608918 s: MID - 1 +[IPU1-0] 10.608979 s: DID - 18 +[IPU1-0] 10.609009 s: QSPI Init Completed Sucessfully +[IPU1-0] 10.622247 s: +[IPU1-0] 10.622308 s: Current System Settings, +[IPU1-0] 10.622338 s: ======================== +[IPU1-0] 10.622399 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 10.622460 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[IPU1-0] 10.622552 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 10.622613 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 10.622704 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 10.622796 s: +[IPU1-0] 10.622826 s: ============ +[IPU1-0] 10.622887 s: Usecase Menu +[IPU1-0] 10.622918 s: ============ +[IPU1-0] 10.622979 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 14.093027 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 14.093058 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 53.525102 s: +[IPU1-0] 53.525224 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 2: Semantic Segmentation Usecase +[IPU1-0] 3: Semantic Segmentation Usecase (Camera Input) +[IPU1-0] 4: TIDL OD Usecase +[IPU1-0] 5: TIDL OD Usecase (Camera Input) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 55.581040 s: +[IPU1-0] 55.609131 s: TIDL Configuration parameters +[IPU1-0] 55.609223 s: ----------------------------- +[IPU1-0] 55.609284 s: inputWidth = 768 +[IPU1-0] 55.609345 s: inputHeight = 320 +[IPU1-0] 55.609406 s: inputFile = inData_OD +[IPU1-0] 55.609467 s: inputFile = inHeader_OD +[IPU1-0] 55.609528 s: netFileName = tidl_net_jdetnet.bin +[IPU1-0] 55.609589 s: paramFileName = tidl_param_jdetnet.bin +[IPU1-0] 55.609650 s: inputfps = 10 +[IPU1-0] 55.609711 s: threshold = 0.300000 +[IPU1-0] 55.609802 s: ----------------------------- +[IPU1-0] 57.950375 s: CAPTURE: Create in progress !!! +[IPU1-0] 57.950619 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! +[IPU1-0] 57.978496 s: CAPTURE: Create Done !!! +[IPU1-0] 57.978862 s: VPE: Create in progress !!! +[IPU1-0] 58.073232 s: VPE: Loading Down-scaling Co-effs +[IPU1-0] 58.073476 s: VPE: Co-effs Loading ... DONE !!! +[IPU1-0] 58.073689 s: VPE: Create Done !!! +[IPU1-0] 58.074788 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 58.075184 s: IPC_OUT_0 : Create Done !!! +[HOST ] 58.075367 s: IPC_IN_0 : Create in progress !!! +[HOST ] 58.075672 s: IPC_IN_0 : Create Done !!! +[HOST ] 58.075794 s: ALGORITHM: Create in progress (algId = 12) !!! +[HOST ] 58.083328 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) +[HOST ] 58.083358 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) +[HOST ] 58.083358 s: ALGORITHM: Create Done (algId = 12) !!! +[HOST ] 58.083450 s: IPC_OUT_3 : Create in progress !!! +[HOST ] 58.083511 s: IPC_OUT_3 : Create Done !!! +[EVE4 ] 58.083755 s: IPC_IN_0 : Create in progress !!! +[EVE4 ] 58.084670 s: IPC_IN_0 : Create Done !!! +[EVE4 ] 58.085463 s: ALGORITHM: Create in progress (algId = 14) !!! +[HOST ] 62.290916 s: IPC_OUT_2 : Create in progress !!! +[HOST ] 62.290947 s: IPC_OUT_2 : Create Done !!! +[DSP1 ] 62.290123 s: IPC_IN_3 : Create in progress !!! +[DSP1 ] 62.290794 s: IPC_IN_3 : Create Done !!! +[EVE3 ] 62.291221 s: IPC_IN_0 : Create in progress !!! +[EVE3 ] 62.292136 s: IPC_IN_0 : Create Done !!! +[EVE3 ] 62.292929 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE4 ] 62.288568 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE4 ] 62.289208 s: IPC_OUT_0 : Create in progress !!! +[EVE4 ] 62.289666 s: IPC_OUT_0 : Create Done !!! +[HOST ] 66.496858 s: IPC_OUT_1 : Create in progress !!! +[HOST ] 66.496888 s: IPC_OUT_1 : Create Done !!! +[DSP1 ] 66.496278 s: IPC_IN_2 : Create in progress !!! +[DSP1 ] 66.496736 s: IPC_IN_2 : Create Done !!! +[EVE2 ] 66.497285 s: IPC_IN_0 : Create in progress !!! +[EVE2 ] 66.498200 s: IPC_IN_0 : Create Done !!! +[EVE2 ] 66.498810 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE3 ] 66.494723 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE3 ] 66.495363 s: IPC_OUT_0 : Create in progress !!! +[EVE3 ] 66.495821 s: IPC_OUT_0 : Create Done !!! +[HOST ] 70.739736 s: IPC_OUT_0 : Create in progress !!! +[HOST ] 70.739766 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 70.739065 s: IPC_IN_1 : Create in progress !!! +[DSP1 ] 70.739583 s: IPC_IN_1 : Create Done !!! +[EVE1 ] 70.740041 s: IPC_IN_0 : Create in progress !!! +[EVE1 ] 70.740956 s: IPC_IN_0 : Create Done !!! +[EVE1 ] 70.741780 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE2 ] 70.737540 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE2 ] 70.738180 s: IPC_OUT_0 : Create in progress !!! +[EVE2 ] 70.738668 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 74.973830 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 74.974287 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 74.974836 s: ALGORITHM: Create in progress (algId = 36) !!! +[DSP1 ] 74.986244 s: ALGORITHM: Create Done (algId = 36) !!! +[DSP1 ] 74.986427 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 74.986488 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 74.989324 s: IPC_IN_4 : Create in progress !!! +[DSP1 ] 74.989782 s: IPC_IN_4 : Create Done !!! +[DSP1 ] 74.989934 s: ALGORITHM: Create in progress (algId = 39) !!! +[DSP1 ] 74.991642 s: ALGORITHM: Create Done (algId = 39) !!! +[DSP1 ] 74.991856 s: IPC_OUT_1 : Create in progress !!! +[DSP1 ] 74.991917 s: IPC_OUT_1 : Create Done !!! +[DSP1 ] 75.576130 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP1 ] 75.576160 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65312 B (63 KB) +[DSP1 ] 75.576221 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 486168 B (474 KB) +[DSP2 ] 75.576374 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP2 ] 75.576404 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 75.576465 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) +[EVE1 ] 74.972274 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE1 ] 74.972915 s: IPC_OUT_0 : Create in progress !!! +[EVE1 ] 74.973403 s: IPC_OUT_0 : Create Done !!! +[EVE1 ] 75.576801 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE1 ] 75.577197 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[EVE1 ] 75.577746 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[EVE2 ] 75.578692 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE2 ] 75.578997 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[EVE2 ] 75.579576 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[EVE3 ] 75.580461 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE3 ] 75.580766 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[EVE3 ] 75.581315 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[EVE4 ] 75.582199 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE4 ] 75.582504 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[EVE4 ] 75.583053 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[IPU2 ] 75.583846 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU2 ] 75.583968 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) +[IPU1-0] 74.986610 s: IPC_IN_0 : Create in progress !!! +[IPU1-0] 74.987708 s: IPC_IN_0 : Create Done !!! +[IPU1-0] 74.988806 s: IPC_OUT_1 : Create in progress !!! +[IPU1-0] 74.989141 s: IPC_OUT_1 : Create Done !!! +[IPU1-0] 74.992008 s: IPC_IN_1 : Create in progress !!! +[IPU1-0] 74.993015 s: IPC_IN_1 : Create Done !!! +[IPU1-0] 74.993198 s: ALGORITHM: Create in progress (algId = 1) !!! +[IPU1-0] 74.994235 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) +[IPU1-0] 74.994357 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) +[IPU1-0] 75.011803 s: ALGORITHM: Create Done (algId = 1) !!! +[IPU1-0] 75.012017 s: DISPLAY: Create in progress !!! +[IPU1-0] 75.012596 s: DISPLAY: Create Done !!! +[IPU1-0] 75.012932 s: GRPXSRC: Create in progress !!! +[IPU1-0] 75.573171 s: GRPXSRC: Create Done !!! +[IPU1-0] 75.573598 s: DISPLAY: Create in progress !!! +[IPU1-0] 75.574086 s: DISPLAY: Create Done !!! +[IPU1-0] 75.574239 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 75.574361 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243176 B (237 KB) +[IPU1-0] 75.574788 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 75.574940 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 107020800 B (102 MB) +[IPU1-0] 75.575123 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 75.584212 s: CHAINS: Sensor create in progress +[IPU1-0] 75.584914 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 +[IPU1-0] 75.676691 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 +[IPU1-0] 75.676996 s: CHAINS: Sensor create ... DONE !!! +[IPU1-0] 75.677118 s: DISPLAY: Start in progress !!! +[IPU1-0] 75.677179 s: DISPLAY: Start Done !!! +[IPU1-0] 75.682730 s: DISPLAY: Start in progress !!! +[IPU1-0] 75.682821 s: DISPLAY: Start Done !!! +[IPU1-0] 75.690020 s: CAPTURE: Start in progress !!! +[IPU1-0] 75.691819 s: CAPTURE: Start Done !!! +[IPU1-0] 75.694290 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Chains Run-time Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 0: Stop Chain +[IPU1-0] +[IPU1-0] 1: Pause Chain +[IPU1-0] 2: Resume Chain +[IPU1-0] +[IPU1-0] p: Print Statistics +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 75.575520 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-1] 75.575672 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643368 B (628 KB) +[HOST ] 75.576008 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[HOST ] 75.576008 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6234656 B (6088 KB) + Thank you, Gary + +Hi Anuj, I have solved the camera display problem. However, there comes another issue. When I'm using self trained OD model on TDA2, there are no detected box showing. But the TIDL usecase works fine. The self trained model is based on the TIDL usecase which is working fine with OD. The only difference is the OD model. Are there any parameters should be modified? I've tried changing the threshold value in the TIDL_SSD_CFG.txt, but it doesn't work. Do you have any ideas to fix it? Thank you, Gary + +Hi, You can check inside object draw link and check whether link is getting any detected objects to draw? If not then please dump the output of tidl link running on dsp and check whether you are getting any data there. Regards, Anuj + +Hi Anuj, Thank you for your reply. Can you suggest me where are the related codes? I can't figure out where to start. Thank you, Gary + +Hi, There is a file i/o usecase for TIDL. You can run that and check whether you are getting proper output or not. You can find the source code for objectdraw link here Z:\ADAS\vision_sdk\apps\src\rtos\alg_plugins\objectdetection Regards, Anuj + +Hi Gary, Please refer to below thread for importing your own trained model as you may need to update the protoxt file before importing as shown in the thread below, https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen + +Hi , Thank you for your reply. I have output the detected object, but the object always kept the same. So I am now trying to check my model though pc. Please find the attachment is the testing files. Kindly notes that I use the ssd_detect.ipynb to check my result. ssd_detect.rar Here are my questions, 1. when it runs to 'net = caffe.Net(model_def,model_weights,caffe.TEST)' , the kernel dies. Do you know how this happen? 2. I can't find the way to list detected results ( positions, scores), can you point me where I can find some docs for reference? thank you, Gary + +Hi Gary, You can refer to FAQ 11 in the TIDL user guide (TIDeepLearningLibrary_UserGuide.pdf) to understand the output format of SSD from TIDL. (or) refer to below e2e thread https://e2e.ti.com/support/processors/f/791/p/679186/2502331#2502331 Thanks, Praveen + +Hi sirs, I met missing screen problem as my top post again. Last time I solve this by modify the "top_k" and "keep_top_k" values from [400,200] to [20,20] in the deploy file. However, it does not work this time. I've tried: 1. Change top_k & keep_top_k & confidence to lower value. Not working. 2. I added a message box in objectDrawLink_algPlugin.c to check # of detected objects. The message box shows correctly at usecase, but fail in my own case. The process seems not entering it. Here are my questions, 1. Are there any other way to check where the problem is? 2. Could you also suggest me how to avoid this problem? The attachments are logs and model I used to import. TTY_log_2019-09-25.rar The import file is as below: 1321.tidl_import_jdetnet.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 25 + +numParamBits = 8 +# 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 +inElementType = 0 + +inputNetFile = "D:\vm_share\jacinto_test\deploy_jdetnet.prototxt +inputParamsFile = "D:\vm_share\jacinto_test\jdetnet_iter_500.caffemodel" +outputNetFile = "D:\vm_share\jacinto_test\tidl_net_jdetnet_gpu.bin" +outputParamsFile = "D:\vm_share\jacinto_test\tidl_param_jdetnet_gpu.bin" + +rawSampleInData = 1 +preProcType = 4 +sampleInData = "..\..\test\testvecs\input\trace_dump_0_768x320.y" +tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" +layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 +conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + + + + + I tested on TDA2x CPU board ( ES1.1) + Vision Application Board + OV10635 Image Sensor with VSDK 3.7. Thank you, Gary + +Hi Gary, The import config file looks fine, if the import tool output is not correct then this needs to be debugged to match TIDL import tool output with caffe inference output. Could you please refer to section 3.8 (Matching TIDL inference result) in the TIDL user guide for debugging to match layer level outputs between TIDL import tool and caffe inference. Thanks, Praveen + +Hi Gary, I tired importing your model and observed that some convolution layer weights are becoming too large after merging them with BatchNorm layer. This is because of the weights are not normalized in the training. Could you please use Weight decay (Regularization) for all the layers including BatchNorm for your model and try. Thanks, Praveen + diff --git a/data2/text/range/30001+/848357.txt b/data2/text/range/30001+/848357.txt new file mode 100644 index 0000000000000000000000000000000000000000..1baed0d4ccc5a4e3d8046768597f6404bfe6c972 --- /dev/null +++ b/data2/text/range/30001+/848357.txt @@ -0,0 +1,1496 @@ +Ticket Name: D3-3P-TDA3X-SK: Issues with Ethernet initialization + +Query Text: +Part Number: D3-3P-TDA3X-SK Other Parts Discussed in Thread: TDA2 Hi, We have a couple of D3 TDA3 Starter Kit board on which we're trying to enable Ethernet, both using the Vision SDK (v03.07.00.00) and using a smaller stand-alone program based on the Sys/BIOS and NSP/NDK version shipped in the SDK. We're having some issues getting this to work. Using the GMACSW_getConfig from the SDK (removing the TDA2 parts) to map port 2 (RGMII1?) to PHY address 12 does not seem to work, and GMACSW/NSP never finds a working interface (even though the PHY on the board should be on address 12). Mapping it to PHY address 0 allows GMACSW/NSP to find it, and when it has done so it also correctly responds to pulling the Ethernet cable out by calling the link status callback we register. However, no packets are sent or received if we try to observe the Ethernet traffic using Wireshark on a connected PC. The interface is configured with a static IP address, and the PC has a correctly configured address in the same subnet. Additionally, when trying to send packets directly to the IP address of the PC, ICMP "host unreachable" packets are returned by the GMACSW (but again, we cannot observe these using Wireshark). Is there some configuration we are missing? What could cause the PHY to appear to work (on the wrong address) yet not send any packets? Regards, Simon + +Responses: +Hi Simon, Can you attach the ndk_nsp_hooks.c file with your modifications? Regards, Anand + +Hi, See attached file below. We're building with MAKECONFIG=tda3xx_rvp_bios_all and NDK_PROC_TO_USE=ipu1_0. Also attached is the smaller stand-alone program I mentioned above. Both exhibit the same issue. Regards, Simon ndk_nsp_hooks.c: 4544.ndk_nsp_hooks.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + ******************************************************************************* + * \file ndk_nsp_hooks.c + * + * \brief Do all necessary board level initialization for NDK. + * + ******************************************************************************* + */ + + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ + +/* NDK Dependencies */ +#include +#include +#include +#include + +/* NSP Dependencies */ +#include +#include + +/* Project dependency headers */ +#include +#include +#include + +#include +#include + +/******************************************************************************* + * Defines + ******************************************************************************* + */ + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +/* I/O Delay related registers */ +#define CFG_IO_DELAY_UNLOCK_KEY (0x0000AAAA) +#define CFG_IO_DELAY_LOCK_KEY (0x0000AAAB) + +#define CFG_IO_DELAY_ACCESS_PATTERN (0x00029000) +#define CFG_IO_DELAY_LOCK_MASK (0x400) + +#define CFG_IO_DELAY_BASE (0x4844A000) +#define CFG_IO_DELAY_LOCK (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x02C)) +#define CFG_RGMII0_TXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x74C)) +#define CFG_RGMII0_TXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x758)) +#define CFG_RGMII0_TXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x764)) +#define CFG_RGMII0_TXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x770)) +#define CFG_RGMII0_TXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x77C)) +#define CFG_VIN2A_D13_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA7C)) +#define CFG_VIN2A_D17_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAAC)) +#define CFG_VIN2A_D16_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAA0)) +#define CFG_VIN2A_D15_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA94)) +#define CFG_VIN2A_D14_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA88)) + +/* PAD Configuration Registers */ +#define SYSCFG_PAD_RGMII0_TXCTL (*(volatile uint32_t*)(0x4A003654)) +#define SYSCFG_PAD_RGMII0_TXD3 (*(volatile uint32_t*)(0x4A003658)) +#define SYSCFG_PAD_RGMII0_TXD2 (*(volatile uint32_t*)(0x4A00365C)) +#define SYSCFG_PAD_RGMII0_TXD1 (*(volatile uint32_t*)(0x4A003660)) +#define SYSCFG_PAD_RGMII0_TXD0 (*(volatile uint32_t*)(0x4A003664)) +#define SYSCFG_PAD_VIN2A_D13 (*(volatile uint32_t*)(0x4A00359C)) +#define SYSCFG_PAD_VIN2A_D14 (*(volatile uint32_t*)(0x4A0035A0)) +#define SYSCFG_PAD_VIN2A_D15 (*(volatile uint32_t*)(0x4A0035A4)) +#define SYSCFG_PAD_VIN2A_D16 (*(volatile uint32_t*)(0x4A0035A8)) +#define SYSCFG_PAD_VIN2A_D17 (*(volatile uint32_t*)(0x4A0035AC)) + +#define CTRL_MODULE_CTRL_CORE_SMA_SW_1 (*(volatile uint32_t*) (0x4A002534)) + +#if defined(BOARD_TYPE_TDA3XX_RVP) +/* DP83867IR Register details for delay configuration */ +#define DP83867_CTRL (0x1FU) +#define DP83867_RGMIICTL (0x0032U) +#define DP83867_RGMIIDCTL (0x0086U) +#define DP83867_IO_MUX_CTRL (0x0170U) +/* PHY CTRL bits */ +#define DP83867_SW_RESET (15) +#define DP83867_SW_RESTART (14) +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB (0x00U) +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB (0x01U) +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB (0x02U) +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB (0x03U) +/* RGMIIDCTL internal delay for rx and tx */ +#define DP83867_RGMIIDCTL_250_PS (0x0U) +#define DP83867_RGMIIDCTL_500_PS (0x1U) +#define DP83867_RGMIIDCTL_750_PS (0x2U) +#define DP83867_RGMIIDCTL_1_NS (0x3U) +#define DP83867_RGMIIDCTL_1_25_NS (0x4U) +#define DP83867_RGMIIDCTL_1_50_NS (0x5U) +#define DP83867_RGMIIDCTL_1_75_NS (0x6U) +#define DP83867_RGMIIDCTL_2_00_NS (0x7U) +#define DP83867_RGMIIDCTL_2_25_NS (0x8U) +#define DP83867_RGMIIDCTL_2_50_NS (0x9U) +#define DP83867_RGMIIDCTL_2_75_NS (0xaU) +#define DP83867_RGMIIDCTL_3_00_NS (0xbU) +#define DP83867_RGMIIDCTL_3_25_NS (0xcU) +#define DP83867_RGMIIDCTL_3_50_NS (0xdU) +#define DP83867_RGMIIDCTL_3_75_NS (0xeU) +#define DP83867_RGMIIDCTL_4_00_NS (0xfU) +#endif + + +/******************************************************************************* + * Function's + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ); +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy); +void stackInitHookStaticEth1(void *hCfg); +void stackInitHookDynEth1(void *hCfg); + +/******************************************************************************* + * Global's + ******************************************************************************* + */ + +/* This string array corresponds to link state */ +static char *LinkStr[] = { "No Link", + "None", + "10Mb/s Half Duplex", + "10Mb/s Full Duplex", + "100Mb/s Half Duplex", + "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", /*not suported*/ + "1000Mb/s Full Duplex"}; + + +/** + ******************************************************************************* + * + * \brief HW specific initialization + * + * We changed our CFG file to point call this private init + * function. Here we initialize our board and read in our + * MAC address. + * + ******************************************************************************* + */ + +void NDK_NSP_Init( void ) +{ +} + +/** + ******************************************************************************* + * + * \brief Callback to get GMAC HW config + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + * + ******************************************************************************* + */ +GMACSW_Config* GMACSW_getConfig(void) +{ +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) && \ + (defined(BOARD_TYPE_TDA3XX_EVM) || defined(BOARD_TYPE_TDA3XX_RVP)) + /* Get default starting config */ + GMACSW_Config *pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); +#else + GMACSW_Config *pGMACSWConfig = NULL; +#endif + + if (pGMACSWConfig != NULL) + { + /* Set callbacks */ + pGMACSWConfig->mdioCfg.phyFoundCallback = &LOCAL_phyFoundCb; + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + +#if defined(BOARD_TYPE_TDA3XX_EVM) + /* TDA3XX-EVM: Map MAC port 1 to PHY address 0 */ + pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_1; + pGMACSWConfig->macInitCfg[0].phyMask = (1u << 0u); + + pGMACSWConfig->macInitCfg[0].macConnectionType = MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + pGMACSWConfig->macInitCfg[0].macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + pGMACSWConfig->macInitCfg[0].macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + pGMACSWConfig->macInitCfg[0].macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + pGMACSWConfig->macInitCfg[0].macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + pGMACSWConfig->macInitCfg[0].macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + pGMACSWConfig->macInitCfg[0].macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); +#elif defined(BOARD_TYPE_TDA3XX_RVP) + /* TDA3XX-RVP: Map MAC port 2 to PHY address 12 */ + pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_2; + pGMACSWConfig->macInitCfg[1].phyMask = (1u << 12u); + + pGMACSWConfig->macInitCfg[1].macConnectionType = MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + pGMACSWConfig->macInitCfg[1].macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + pGMACSWConfig->macInitCfg[1].macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + pGMACSWConfig->macInitCfg[1].macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + pGMACSWConfig->macInitCfg[1].macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + pGMACSWConfig->macInitCfg[1].macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + pGMACSWConfig->macInitCfg[1].macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); +#endif + } + + /* Return the config */ + return pGMACSWConfig; +} + +#if defined(BOARD_TYPE_TDA3XX_RVP) +/** + ******************************************************************************* + * + * \brief PHY DP83867IR delay config function + * + * This function is used for configuring the receive and transmit delays + * for DP83867IR PHY on TDA2EX PG 2.0 EVM (RevC). + * For PHY configuration, need to configure DP83867’s RGMII Control + * Register (RGMIICTL) for RGMII mode and RGMII Delay Control Register + * (RGMIIDCTL) for 0ns TX delay, 2.25ns RX delay. Set IO Drive Strength + * Register (IO_IMPEDANCE_CTRL) to maximum drive. + * NOTE: Call this function after NSP initialization as it requires GMAC + * handle to call GMAC IOCTL. + * + ******************************************************************************* + */ +void DP83867_configurePhyDelays(GMACSW_DeviceHandle hGMACSW, uint32_t portNum) +{ + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal; + cmd.portNum = portNum; + + /* PHY software reset */ + regVal = (1U << DP83867_SW_RESET); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set RGMII Delay values: Tx delay 0 and Rx delay 2.25ns */ + regVal = 0x08; + cmd.regAddr = DP83867_RGMIIDCTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Enable RGMII and CLK delay bits */ + regVal = 0x0D1; + cmd.regAddr = DP83867_RGMIICTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set Drive Strength bits */ + regVal = 0x61F; + cmd.regAddr = DP83867_IO_MUX_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* software restart */ + regVal = (1U << DP83867_SW_RESTART); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); +} +#endif + +/** + ******************************************************************************* + * \brief String to displayed on telnet terminal + ******************************************************************************* + */ +char *VerStr = "\n\n **** Vision SDK **** \n\n"; + +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) + static HANDLE hEcho = 0; + static HANDLE hEchoUdp = 0; + static HANDLE hData = 0; + static HANDLE hNull = 0; + static HANDLE hOob = 0; +#endif + +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) +/** + ******************************************************************************* + * + * \brief IPv6 initialization callback function + * + ******************************************************************************* + */ + +#if defined(NDK_ENABLE_IPV6) +static void IPv6DADStatus(IP6N Address, unsigned short dev_index, + unsigned char Status) +{ + char strIPAddress[40]; + + /* Convert the IP Address to String Format. */ + inet_ntop(AF_INET6, &Address, strIPAddress, 40); + + /* Print the status of the address. */ + Vps_printf(" Network :Address %s on device %d is %s\n", strIPAddress, dev_index, + (Status == 1) ? "UNIQUE" : "DUPLICATE"); + + System_flush(); + + return; +} +#endif +#endif + +/** + ******************************************************************************* + * + * \brief Stack init hook function to configure the second mac port + * + ******************************************************************************* + */ +void stackInitHookStaticEth1(void *config) +{ + /* Set up static IP for interface 2 */ + { + CI_ROUTE route; + memset(&route, 0, sizeof(route)); + route.IPDestAddr = 0; + route.IPDestMask = 0; + route.IPGateAddr = inet_addr("192.168.2.1"); + CfgAddEntry(config, CFGTAG_ROUTE, 0U, 0U, sizeof(CI_ROUTE), (void *)&route, 0); + + CI_IPNET ip_net; + ip_net.IPAddr = inet_addr("192.168.2.100"); + ip_net.IPMask = inet_addr("255.255.255.0"); + CfgAddEntry(config, CFGTAG_IPNET, 2U, 0U, sizeof(CI_IPNET), (void *)&ip_net, 0); + } + + /* Set up static IP for interface 1 */ + { + CI_ROUTE route; + memset(&route, 0, sizeof(route)); + route.IPDestAddr = 0; + route.IPDestMask = 0; + route.IPGateAddr = inet_addr("192.168.1.1"); + CfgAddEntry(config, CFGTAG_ROUTE, 0U, 0U, sizeof(CI_ROUTE), (void *)&route, 0); + + CI_IPNET ip_net; + ip_net.IPAddr = inet_addr("192.168.1.100"); + ip_net.IPMask = inet_addr("255.255.255.0"); + CfgAddEntry(config, CFGTAG_IPNET, 1U, 0U, sizeof(CI_IPNET), (void *)&ip_net, 0); + } +} + +void stackInitHookDynEth1(void *config) +{ + static const UINT8 options[] = { DHCPOPT_SUBNET_MASK }; + CI_SERVICE_DHCPC dhcpc; + memset(&dhcpc, 0, sizeof(dhcpc)); + dhcpc.cisargs.Mode = 1U; + dhcpc.param.pOptions = (UINT8*)&options[0]; + dhcpc.param.len = 1; + + /* Set up DHCP for interface 2 */ + dhcpc.cisargs.IfIdx = 2U; + CfgAddEntry(config, CFGTAG_SERVICE, CFGITEM_SERVICE_DHCPCLIENT, 0U, sizeof(dhcpc), (void *)&dhcpc, 0); + + /* Set up DHCP for interface 1 */ + dhcpc.cisargs.IfIdx = 1U; + CfgAddEntry(config, CFGTAG_SERVICE, CFGITEM_SERVICE_DHCPCLIENT, 0U, sizeof(dhcpc), (void *)&dhcpc, 0); +} + +/** + ******************************************************************************* + * + * \brief NDK callback to start DEAMON services + * + ******************************************************************************* + */ +void netOpenHook(void) +{ +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) + /* Create our local servers */ + hEcho = DaemonNew( SOCK_STREAMNC, 0, 7, dtask_tcp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hEchoUdp = DaemonNew( SOCK_DGRAM, 0, 7, dtask_udp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 1 ); + hData = DaemonNew( SOCK_STREAM, 0, 1000, dtask_tcp_datasrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hNull = DaemonNew( SOCK_STREAMNC, 0, 1001, dtask_tcp_nullsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hOob = DaemonNew( SOCK_STREAMNC, 0, 999, dtask_tcp_oobsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + +#if defined (NDK_ENABLE_IPV6) + IPv6InterfaceInit(1, IPv6DADStatus); + IPv6InterfaceInit(2, IPv6DADStatus); +#endif +#endif +} + +/** + ******************************************************************************* + * + * \brief NDK callback to stop DEAMON services + * + ******************************************************************************* + */ +void netCloseHook(void) +{ +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) +#if defined (NDK_ENABLE_IPV6) + /* Enter the kernel Mode. */ + llEnter (); + IPv6InterfaceDeInit(1); + IPv6InterfaceDeInit(2); + llExit (); +#endif + + DaemonFree(hOob); + DaemonFree(hNull); + DaemonFree(hData); + DaemonFree(hEchoUdp); + DaemonFree(hEcho); +#endif +} + +/** + ******************************************************************************* + * + * \brief Print link status + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + * + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + Vps_printf(" NDK: Link Status: %s on PHY %" PRIu32 "\n",LinkStr[linkStatus],phy); +} + +/** + ******************************************************************************* + * + * \brief PHY Found callback + * + * This is a callback from the Ethernet driver. This function + * is called when PHY is found at PHY mask. This can be used for PHY + * specific configuration. + * + ******************************************************************************* + */ +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy) +{ + Vps_printf(" NSP GMAC: PHY %d Found on MAC Port %" PRIu32 "\n",phy, portNum); + +#if defined (BOARD_TYPE_TDA3XX_RVP) + GMACSW_DeviceHandle handle = GMACSW_open(NULL); + DP83867_configurePhyDelays(handle, portNum); + GMACSW_close(handle); +#endif +} + +/** + * \brief Return ID of processor on which networking runs + */ +UInt32 Utils_netGetProcId(void) +{ + UInt32 procId = SYSTEM_PROC_INVALID; + + #ifdef NDK_PROC_TO_USE_IPU1_0 + procId = SYSTEM_PROC_IPU1_0; + #endif + + return procId; +} + +/** + ******************************************************************************* + * \brief Retrun IP address as a string + * + * If network stack is not initialized correctly 0.0.0.0 IP address + * is returned + * + * \param ipAddrStr [OUT] Assigned IP address as a string + * + ******************************************************************************* + */ +void Utils_ndkGetIpAddrStr(char *ipAddrStr, UInt32 ifIdx) +{ + IPN ipAddr; + + memset(&ipAddr, 0, sizeof(ipAddr)); + + strcpy(ipAddrStr,"none"); + +#if (defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0)) + + NtIfIdx2Ip(ifIdx, &ipAddr); + NtIPN2Str(ipAddr, ipAddrStr); + +#endif + +} + +Int32 Utils_netGetIpAddrStr(char *ipAddr, UInt32 ifIdx) +{ + UInt32 linkId, procId; + Int32 status; + SystemCommon_IpAddr prm; + + prm.ifIdx = ifIdx; + + strcpy(ipAddr, "none" ); + + procId = Utils_netGetProcId(); + + if(procId==SYSTEM_PROC_INVALID) + { + status = SYSTEM_LINK_STATUS_EFAIL; + } + else + { + linkId = SYSTEM_MAKE_LINK_ID(procId, SYSTEM_LINK_ID_PROCK_LINK_ID); + + status = System_linkControl( + linkId, + SYSTEM_COMMON_CMD_GET_IP_ADDR, + &prm, + sizeof(prm), + TRUE + ); + + if(status==SYSTEM_LINK_STATUS_SOK) + { + strcpy(ipAddr, prm.ipAddr); + } + } + + return status; +} + +Bool Utils_netIsNetworkEnabled(void) +{ + Bool status = (Bool)FALSE; + +#if defined(NDK_PROC_TO_USE_IPU1_0) + status = (Bool)TRUE; +#endif + + return status; +} + + ndk-testing.zip: ndk-testing.zip + +Hi Simon, I'll take a look at this and get back to you ASAP. Most probably it should be a small error in the hooks file. Regards, Anand + +Hi Simon, The file looks fine to me, in the current configuration you are assigning PHY 0 to interface 0 and PHY 12 to interface 1. Did you try assigning PHY 0 to interface 1 when it didn't work? I need to check the pinmux to see if there is something more we need to do to determine which interface is enabled. Regards, Anand + +Hi, Assigning PHY 0 to interface 1 does not work either. It does cause the program to print "Link Status: 1000Mb/s Full Duplex on PHY 0" on the console (and the link status changes when the ethernet cable is unplugged), but no packets can be observed using Wireshark on the PC side. Regards, Simon + +Hi Simon, Are you using a static or dynamic IP address? Regards, Anand + +Hi, The example uses a static IP address, but we've also tried using a dynamic IP address. In either case, there are no Ethernet packets being sent from the board. Regards, Simon + +Hi Simon, Did you try using the pre-built binary for D3 starter kit and see if the network is working? If it doesn't work with 1Gbps switch, please try again with 100Mbps switch. If that doesn't work, you can ask D3 for RMA. Regards, Stanley + +Hi, The pre-built binary for the D3 starter kit seems to be working fine, I can receive DHCP requests from the board on the PC side. We noticed that the pre-built image is running an older Vision SDK (v03.02.00.00) than the one we're building with. Has there been any changes to the PDK, NDK/NSP, or networking setup in the Vision SDK between these versions that may have caused it to stop working? Regards, Simon + +The issue you are facing is most likely related to IO delay setting for ethernet phy or pin mux. We need to check with D3 to see if there is any change missing in 3.7 release. Just to confirm... You did the build with 3.7 release using tda3xx_rvp_bios_all config for both SBL and AppImage without any change? + +Hi, I've been building the sample_app for tda3xx_rvp_bios_all without code changes (other than adding the RVP config in the sample_app and enabling the NDK). I've been using CCS to flash the firmware, and haven't touched anything SBL-related. I have a colleague in another team that has built the apps/ (configured for SBL, IIRC) with similar results regarding Ethernet, though. Regards, Simon + +Hi Simon, D3 has found a workaround for the ethernet issue. Please apply the attached patch to Vision SDK 3.6 release and use 3.6 release for now. Network should be working on D3 board with the patched 3.6 release. However, Vision SDK 3.7 is still not working yet and we are debugging it. 0001-tda3x-eth-Fixed-bug-for-TDA3x-RVP-Ethernet.patch Regards, Stanley + +Hello, I have a work around for this issue. First, apply the attached patch to vision sdk (extension changed to a .txt for upload) 0001-tda3x-eth-Fixed-bug-for-TDA3x-RVP-Ethernet.txt From e0f9ab6f43d7d649d3893e160000434c327e194d Mon Sep 17 00:00:00 2001 +From: Ben McGee +Date: Wed, 20 Nov 2019 09:49:01 -0500 +Subject: [PATCH] tda3x:eth: Fixed bug for TDA3x RVP Ethernet + +--- + links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c b/links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c +index 23ffff1..b71a973 100644 +--- a/links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c ++++ b/links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c +@@ -578,7 +578,7 @@ GMACSW_Config *GMACSW_getConfig(void) + * port is connected to a PHY with address = 12, the second MAC + * port is connected to a PHY with address = 11. + */ +- pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(12U - i)); ++ pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(13U - i)); + #else + /* + * Adjust the PHY mask numbers for TDA3xx EVM. The first MAC +-- +2.7.4 + + Second, Copy the ti_components/network/nsp_gmacsw from vision sdk 3.06 (version 4.16.00.00) to overwrite the 4.16.01.01 version in Vision SDK 3.07 Cheers, Ben + +Hi, I've applied the patch and down-graded NSP to 4.16.00.00, but unfortunately still can't see any Ethernet packets being sent from the board. The MDIO_ALIVE register looks correct (indicating PHY 12 is alive) now, and the link status callback also reacts to the correct PHY, but unfortunately no packets are being sent. This applies to both Vision SDK 3.06 and 3.07. Regards, Simon + +Hi Simon, Did you do a clean rebuild? Are you using DHCP? Thanks, Ben + +Hi, Yes; a clean rebuild of 3.7 and a completely clean install of 3.6; both with and without DHCP (does not seem to make any difference). Regards, Simon + +Hi All, Please try this attached AppImage and let me know if it works on your systems. It uses DHCP. Please note it take about 10 seconds after boot for the IP address to be acquired. Thanks, BenAppImage.zip + +Hi, The attached AppImage seems to work; I can see DHCP Discover messages from the D3 board. Is there any specific initialization performed by the applications in apps/ that is not performed by the sample_app/ shipped with the Vision SDK? Regards, Simon + +Hi Simon, Any initialisation required is done for all the apps in SDK. Did you rebuild vision_sdk after applying the patch in ndk_nsp_hooks.c? Are you not able to see an IP address when you build with a DHCP IP address? Can you provide a UART log of the non-working case? Because the patch BenM provided should fix your issue with PHY + +Hi, Yes, I've done a clean rebuild after applying the patch and downgrading NSP to 4.16.00.00; I can see no Ethernet packages being sent from the board, and consequently the board does not get an IP address using DHCP. I have attached an UART log of the non-working case: UART-log.txt. Here's also a copy of the AppImage, if that helps: AppImage.zip. Regards, Simon + +Hi Simon, I get a broken link when I open the UART log. Can you attach is once more? + +Hi, Here's the contents of the UART log: AL! + TDA3xx SBL Boot + + Identified 15X15 Silicon + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Configuration Completed + + DDR Configuration Completed + + TDA3xx SOC Init Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + App Image Download Completed + + EVE MMU configuration completed + +***************************************************************** + + 32K Timer is used to measure cycles, divide by 32K to get time in seconds + + Reset to SBL Init Cycles - 650 (19.83 ms) + + SBL Initial Config Cycles - 334 (10.19 ms) + + SOC Init Cycles - 493 (15.04 ms) + + DDR Config Clock Cycles - 230 (7.01 ms) + + App Image Load Cycles - 19942 (608.58 ms) + + Slave Core Bootup Cycles - 710 (21.66 ms) + + SBL Boot-up Cycles - 21710 (662.53 ms) + +***************************************************************** + + No IPU1 CPU1 App Found, Switching to while Loop + + Jumping to IPU1 CPU0 App +[IPU1-0] 0.739156 s: ***** IPU1_0 Firmware build time 10:49:42 Nov 29 2019 +[IPU1-0] 0.739309 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 0.748886 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 0.755932 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 0.755993 s: SYSTEM: Notify init done !!! +[IPU1-0] 0.756145 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 0.756206 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 0.758219 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 0.758280 s: SYSTEM: System Init in progress !!! +[IPU1-0] 0.758341 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 0.758402 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 0.758463 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 0.758555 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 0.758616 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 0.758738 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 0.758799 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 0.758860 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 0.761087 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 0.761209 s: VPDMA Firmware Address = 0x9ffc7800 +[IPU1-0] 0.761270 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 0.761361 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 0.761453 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 0.761514 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 0.796864 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 0.797566 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 0.797810 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 0.797932 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 247736 B (241 KB) +[IPU1-0] 0.798084 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 0.798206 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x86103000, Total size = 369086464 B (351 MB), Free size = 369086464 B (351 MB) +[IPU1-0] 0.798359 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfe00000, Total size = 916224 B (0 MB), Free size = 916224 B (0 MB) +[IPU1-0] 0.798511 s: SYSTEM: Initializing Links !!! +[IPU1-0] 0.871896 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 0.872872 s: BOARD: Board Init in progress !!! +[IPU1-0] 0.873848 s: BOARD: Board Init Done !!! +[IPU1-0] 0.877874 s: +[IPU1-0] 0.877935 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 0.877996 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 0.878057 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 0.878118 s: Platform : [EVM] +[IPU1-0] 0.878179 s: SOC : [TDA3XX] +[IPU1-0] 0.878240 s: SOC Revision : [ES2.0] +[IPU1-0] 0.878667 s: Board Detected : [TDA3XX D3 Starter Kit] +[IPU1-0] 0.878911 s: Base Board Revision : [REV - SK DASH] +[IPU1-0] 0.878972 s: Daughter Card Revision: [REV A] +[IPU1-0] 0.879033 s: +[IPU1-0] 1.040108 s: NSP GMAC: PHY 12 Found on MAC Port 1 +[IPU1-0] 1.740498 s: Network :Address fe80::5a7a:62ff:febf:ee9c on device 1 is UNIQUE +[IPU1-0] 1.878850 s: QSPI Init Started +[IPU1-0] 1.879033 s: MID - 20 +[IPU1-0] 1.879064 s: DID - ba +[IPU1-0] 1.879125 s: QSPI Init Completed Sucessfully +[IPU1-0] 1.879186 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 1.879247 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 3.840663 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 12 + Regards, Simon + +Hi Simon, Thanks a lot for the log. So I take it that you don't see anything after this, as in the IP address is not getting printed (Not even "0.0.0.0" as the default?). You have to wait for a while for the IP address to be assigned by DHCP. But you are not seeing any DHCP requests on wireshark as well, right. Do you see something like "My IP Address : x.x.x.x" when you hit enter? + +Hi, Correct; no IP address is getting printed (not after waiting at least a few minutes), not even after hitting enter. There are no DHCP requests visible in Wireshark. Regards, Simon + +Hi Simon, In additional to applying the previously provided patch for phy Id, a change has to be made to the nsp: ----------------------- packages/ti/nsp/drv/config.bld ------------------------ index 45eb349..9061511 100755 @@ -81,9 +81,9 @@ var gccInc = " -I\"" + gccRoot + "/include\" "; //gccCommonCopts += " -DNSP_DYNAMIC_ALLOCATION"; /* Uncomment below to enable Dual MAC mode */ -// tiDspCommonCopts += " -DDUAL_MAC_MODE "; -// tiArmCommonCopts += " -DDUAL_MAC_MODE "; -// gccCommonCopts += " -DDUAL_MAC_MODE "; +tiDspCommonCopts += " -DDUAL_MAC_MODE "; +tiArmCommonCopts += " -DDUAL_MAC_MODE "; +gccCommonCopts += " -DDUAL_MAC_MODE "; /* TI C674x DSP Target compiler options */ var tiC674DSPTarget = xdc.useModule('ti.targets.elf.C674'); And then nsp has to be rebuilt. The easiest way to rebuild nsp is to update paths in packages/ti/nsp/drv/.xdcenv.mak and then make the component Cheers, Ben + +Hi, I applied the patch and rebuilt the NSP, then did a clean rebuild of the sample_app, but unfortunately I still cannot see any DHCP requests in Wireshark. Regards, Simon + +Hi Simon, I follow the same instructions from Ben and now I can get IP address on my D3 board. Did you do a clean build of NSP? First "gmake clean" and then "gmake all". Regards, Stanley + +Hi, After doing a clean rebuild of everything again, Ethernet seems to be working when building both apps and sample_app. However, I still cannot get a freestanding (non-Vision SDK) application to work with Ethernet. Regards. Simon + +Simon, There are configuration/initialization steps required for NSP/NDK, which are taken care by Vision SDK framework when building/running with Vision SDK applications. If you are creating your own application outside of Vision SDK framework, you should follow the example from NSP to config/initialize NSP/NDK. You can find those examples under ~\ti_components\networking\nsp_gmacsw_4_16_00_00\packages\ti\ndk\tda3xx\examples_ipu1 Regards, Stanley + +In NSP example, you have to update the configuration for PHY address, similar to the patch provided by Ben. The example is based on EVM, not RVP. + +Hi, I have been following the example from the NSP (with the updated PHY config and patched NSP, and also added the DP83867_configurePhyDelays function which the Vision SDK includes when building for the RVP), but I cannot get any Ethernet working. I have attached two applications in which Ethernet is not working for me; both are more or less based on the examples from the NSP. Regards, Simon external-loopback-tda3xx-ipu1.zip ndk-testing.zip + +Hi Simon, One problem I have observed when running NSP example is the pin mux for RGMII1 port. In CCS, the default GEL file pad config enables RGMII0 port based on EVM, not RGMII1 port used by RVP. When running with Vision SDK app, there is an initialization routine which will take care of this. Please refer to RvpInitEthernet() function in ~ti_components/drivers/pdk_xx_xx_xx_xx/packages/ti/drv/vps/src/boards/src/bsp_boardTda3xx.c. You need to port this function to tda3xx_init() function in NSP example. This should be called before PHY delays are configured by DP83867_configurePhyDelays() since the above function will reset PHY. Regards, Stanley + +Hi Stanley, I have tried including the RGMII1 pinmux settings from the PDK in both of the examples I attached in my previous message (although they are commented-out in the external-loopback-tda3xx-ipu1.zip sources), but unfortunately I still cannot get any Ethernet packets from the board. Regards, Simon + +Could you share your latest changes? + +Hi, See attached files. Regards, Simon external-loopback-tda3xx-ipu1.zip ndk-testing.zip + +Hi Simon, Even after adding the pinmux, the PHY is still not being detected by the example. My guess is there are more RVP board related configurations which are taken care by SDK. I don't think it is worth the effort to port all the missing pieces to NSP example. Could you add your application under Vision SDK? You don't have to use Link framework in your application but you can rely on SDK framework to initialize the board properly. Regards, Stanley + +Hi, When you say we can "rely on SDK framework to initialize the board", do you mean we should use the BSP platform initialization from the VPS/PDK? In order to integrate this code in our existing build system, we would like to depend on as few components (preferably self-contained) as possible; depending on the PDK should be fine but having to build our application in the Vision SDK build system is not an option for us. I tried adding the PDK (build for TDA3xx-RVP) to the NSP example, running the BSP board/platform initialization routines in the main task of the application, but unfortunately this did not seem to help in getting Ethernet working. Regards, Simon + +Hi Simon, I have taken a closer look at the problem. The issue turns out to be pinmux still. The pin VOUT1_FLD is configured as GPIO2_22 and control the IO buffer OE input. Pinmux for this pin was configured as GPIO2_22 correctly but it is not set to drive the line HIGH. This somehow creates some bus contention on the line even though there is external pullup. So, the IO buffer didn't get OE as HIGH and disconnected all the RX pin between TDA and PHY. After this, PHY is up. However, for DHCP to work for Port 1, there is also some configuration file change required. I have attached the changes required here. 4442.helloWorld.cfg tda3xx_init.c /* + * Copyright (C) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file tda3xx_init.c + * + * @brief + * Do all necessary board level initialization for NDK example. + * + */ + + +/*---------------------------------------------------------------------------*\ +| Header Files | +\*---------------------------------------------------------------------------*/ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ +#include +#include + +/* NDK Dependencies */ +#include + +/* NSP Dependencies */ +#include +#include + +/* Project dependency headers */ + + +/*---------------------------------------------------------------------------*\ +| Extern Declarations | +\*---------------------------------------------------------------------------*/ + +void DP83867_configurePhyDelays(GMACSW_DeviceHandle, uint32_t); +void configureRGMII1(void); + +/*---------------------------------------------------------------------------*\ +| Local Macros/Defines | +\*---------------------------------------------------------------------------*/ + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +#define DP83867_PHYADRESS_TDA3_RVP (0xCU) + +/*---------------------------------------------------------------------------*\ +| Local Typedefs/Enums | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Declarations | +\*---------------------------------------------------------------------------*/ + +static void LOCAL_linkStatus(uint32_t phy, uint32_t linkStatus); +static void LOCAL_phyFound(uint32_t portNum, uint32_t phy); +static uint32_t log2(uint32_t v); + +/*---------------------------------------------------------------------------*\ +| Local Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Function Definitions | +\*---------------------------------------------------------------------------*/ + +/* + * We changed our CFG file to point call this private init + * function. Here we initialize our some particulars for + * our board/device. + */ +void tda3xx_init( void ) +{ + /* Nothing to do for this platform */ + configureRGMII1(); +} + +/* + * GMACSW_getConfig() + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + */ +GMACSW_Config *GMACSW_getConfig(void) +{ + static const char* ConnTypeStr[] = { + "MII 10Mb/s", "MII 100Mb/s", + "RMII 10Mb/s", "RMII 100Mb/s", + "RGMII 100Mb/s Half Duplex", + "RGMII 100Mb/s Full Duplex", + "RGMII 1000Mb/s Full Duplex", + "RGMII Inband Detection Mode" + }; + + int i = 0; + uint8_t macAddr[6]; + + /* Get default starting config */ + GMACSW_Config *pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); + + /* Set count of active MAC ports */ + /*pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_BOTH;*/ + pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_2; + + /* Update default config with the correct MAC addresses */ + for(i=0; iactiveMACPortMask ) + { + if (0==i) + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); + } + else + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); + } + + printf("\nMAC Port %d Address:\n\t%02x-%02x-%02x-%02x-%02x-%02x\n", i, + macAddr[0], macAddr[1], macAddr[2], + macAddr[3], macAddr[4], macAddr[5]); + + /* Copy the correct MAC address into the driver config */ + memcpy( (void *)&(pGMACSWConfig->macInitCfg[i].macAddr[0]), (void *)&macAddr[0], 6 ); + + /* + * Adjust the PHY mask numbers for the Vayu EVM. The first MAC + * port is connected to a PHY with address = 2, the second MAC + * port is connected to a PHY with address = 3. + */ + /*GMACSWConfig->macInitCfg[i].phyMask = 0x1 << i;*/ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t) DP83867_PHYADRESS_TDA3_RVP); + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + } + } + + /* Print MAC configurations */ + const int NUM_MACS = (sizeof(pGMACSWConfig->macInitCfg) / sizeof(pGMACSWConfig->macInitCfg[0])); + for (i = 0; i < NUM_MACS; ++i) + { + const MAC_Config* cfg = &pGMACSWConfig->macInitCfg[i]; + + printf("MAC port %d, PHY %u\n", i, log2(cfg->phyMask)); + printf(" address: %02x:%02x:%02x:%02x:%02x:%02x\n", + cfg->macAddr[0], cfg->macAddr[1], cfg->macAddr[2], + cfg->macAddr[3], cfg->macAddr[4], cfg->macAddr[5]); + printf(" MTU: %u, PRI: %u, CFI: %u, VID: %u\n", + cfg->PktMTU, cfg->portPri, cfg->portCfi, cfg->portVID); + printf(" Flags: MAC [%08x] MDIO [%08x]\n", cfg->macModeFlags, cfg->mdioModeFlags); + printf(" Masks: PHY [%08x] Mlink [%08x]\n", cfg->phyMask, cfg->MLinkMask); + printf(" Connection type: %s\n", ConnTypeStr[cfg->macConnectionType]); + } + + /* Set callbacks */ + pGMACSWConfig->mdioCfg.phyFoundCallback = &LOCAL_phyFound; + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + + /* Return the config */ + return pGMACSWConfig; +} + +void stackInitHookDynEth1(void *hCfg) +{ + /*Add the setup for DHCP for interface 2*/ + CI_SERVICE_DHCPC dhcpc; + static UINT8 DHCP_OPTIONS[] = { DHCPOPT_SUBNET_MASK }; + + bzero(&dhcpc, sizeof(dhcpc)); + dhcpc.cisargs.Mode = 1U; + dhcpc.cisargs.IfIdx = 2U; + dhcpc.param.pOptions = DHCP_OPTIONS; + dhcpc.param.len = 1; + + CfgAddEntry(hCfg, (uint32_t)CFGTAG_SERVICE, (uint32_t)CFGITEM_SERVICE_DHCPCLIENT, 0U, (int32_t)sizeof(dhcpc), (UINT8 *)(void *)&dhcpc, 0); +} + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + +/* + * LOCAL_linkStatus() + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + static const char* LinkStr[] = { + "No Link", "None", + "10Mb/s Half Duplex", "10Mb/s Full Duplex", + "100Mb/s Half Duplex", "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", "1000Mb/s Full Duplex", + }; + printf("Link Status: %s on PHY %d\n", LinkStr[linkStatus], phy); +} + +/* + * LOCAL_phyFound() + */ +static void LOCAL_phyFound(uint32_t portNum, uint32_t phy) +{ + printf("GMAC: PHY %u found on MAC port %u\n", phy, portNum); + + GMACSW_DeviceHandle handle = GMACSW_open(NULL); + DP83867_configurePhyDelays(handle, portNum); + GMACSW_close(handle); +} + +/* + * log2() + */ +static uint32_t log2(uint32_t v) +{ + uint32_t r = 0; + while (v >>= 1u) + { + r++; + } + return r; +} + +/*---------------------------------------------------------------------------*\ +| End of File | +\*---------------------------------------------------------------------------*/ + tda3xx_rvp_init.c /* + * Copyright (C) 2014, Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file tda3xx_init.c + * + * @brief + * Do all necessary board level initialization for NDK example. + * + */ + + +/*---------------------------------------------------------------------------*\ +| Header Files | +\*---------------------------------------------------------------------------*/ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ +#include +#include +#include + +/* NDK Dependencies */ + +/* NSP Dependencies */ +#include +#include + +/* Project dependency headers */ +#include "hw_ctrl_core_pad_io.h" + + +/*---------------------------------------------------------------------------*\ +| Extern Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Macros/Defines | +\*---------------------------------------------------------------------------*/ + +/* From PDK CSL (soc.h and hw_types.h) */ +#define SOC_CORE_PAD_IO_REGISTERS_BASE (0x4a003400U) +#define SOC_GPIO2_BASE (0x48055000U) + +#define HW_RD_REG32(addr) (HW_RD_REG32_RAW((uint32_t) (addr))) +#define HW_WR_REG32(addr, value) (HW_WR_REG32_RAW((uint32_t) (addr), (uint32_t) (value))) + +static inline uint32_t HW_RD_REG32_RAW(uint32_t addr) +{ + uint32_t regVal = *(volatile uint32_t *) addr; + asm(" dsb"); + return (regVal); +} + +static inline void HW_WR_REG32_RAW(uint32_t addr, uint32_t value) +{ + *(volatile uint32_t *) addr = value; + asm(" dsb"); + return; +} + +/* From PDK headers (bsp_platform.h) */ +#define BSP_PLATFORM_IOPAD_CFG_DEFAULT ((uint32_t) 0xFFU) +#define BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE ((uint32_t) 0x00U) +#define BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_DISABLE ((uint32_t) 0x01U) +#define BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_DOWN ((uint32_t) 0x00U) +#define BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP ((uint32_t) 0x02U) +#define BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_OUT ((uint32_t) 0x00U) +#define BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI ((uint32_t) 0x04U) + +/* From PDK internal headers (gpio_v2.h) */ +#define GPIO_DIR_INPUT (uint32_t) (0x1U) +#define GPIO_DIR_OUTPUT (uint32_t) (0x0U) +#define GPIO_PIN_LOW (uint32_t) (0x0U) +#define GPIO_PIN_HIGH (uint32_t) (0x1U) + +/* From PDK headers (hw_gpio.h) */ +#define GPIO_OE (0x134U) +#define GPIO_CLEARDATAOUT (0x190U) +#define GPIO_SETDATAOUT (0x194U) + +/* DP83867IR register details */ +#define DP83867_CTRL (0x1FU) +#define DP83867_RGMIICTL (0x0032U) +#define DP83867_RGMIIDCTL (0x0086U) +#define DP83867_IO_MUX_CTRL (0x0170U) +#define DP83867_SW_RESET (15) +#define DP83867_SW_RESTART (14) + +/*---------------------------------------------------------------------------*\ +| Local Typedefs/Enums | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Declarations | +\*---------------------------------------------------------------------------*/ + +static void setPinMuxRegs(uint32_t mode_index, uint32_t offset, uint32_t pupd_info); +static void GPIODirModeSet(uint32_t baseAdd, uint32_t pinNumber, uint32_t pinDirection); +static void GPIOPinWrite(uint32_t baseAdd, uint32_t pinNumber, uint32_t pinValue); + +/*---------------------------------------------------------------------------*\ +| Local Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Variable Declarations | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------------*\ +| Global Function Definitions | +\*---------------------------------------------------------------------------*/ + +void DP83867_configurePhyDelays(GMACSW_DeviceHandle hGMACSW, uint32_t portNum) +{ + printf("Configuring DP83867 PHY delays...\n"); + + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal; + cmd.portNum = portNum; + + /* PHY software reset */ + regVal = (1U << DP83867_SW_RESET); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl(hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void*)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set RGMII Delay values: Tx delay 0 and Rx delay 2.25ns */ + regVal = 0x08; + cmd.regAddr = DP83867_RGMIIDCTL; + cmd.regVal = ®Val; + GMACSW_ioctl(hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void*)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Enable RGMII and CLK delay bits */ + regVal = 0x0D1; + cmd.regAddr = DP83867_RGMIICTL; + cmd.regVal = ®Val; + GMACSW_ioctl(hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void*)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set Drive Strength bits */ + regVal = 0x61F; + cmd.regAddr = DP83867_IO_MUX_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl(hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void*)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* software restart */ + regVal = (1U << DP83867_SW_RESTART); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl(hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void*)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); +} + +void configureRGMII1(void) +{ + System_printf("Configuring RGMII1 pin mux...\n"); + + /* RGMII1 mux */ + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_CLK_MUXMODE_RGMII1_TXC_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_CLK, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_BEN0_MUXMODE_RGMII1_TXCTL_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_BEN0, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_BEN1_MUXMODE_RGMII1_TXD3_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_BEN1, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_ADVN_ALE_MUXMODE_RGMII1_TXD2_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_ADVN_ALE, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_OEN_REN_MUXMODE_RGMII1_TXD1_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_OEN_REN, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_WEN_MUXMODE_RGMII1_TXD0_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_WEN, + BSP_PLATFORM_IOPAD_CFG_PULLUDENABLE_ENABLE); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_CS0_MUXMODE_RGMII1_RXCTL_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_CS0, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_WAIT0_MUXMODE_RGMII1_RXD3_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_WAIT0, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD0_MUXMODE_RGMII1_RXD2_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD0, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD1_MUXMODE_RGMII1_RXD1_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD1, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD2_MUXMODE_RGMII1_RXD0_1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD2, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) 1, + (uint32_t) CTRL_CORE_PAD_IO_GPMC_AD13, + BSP_PLATFORM_IOPAD_CFG_INPUTENABLE_BI); + setPinMuxRegs( + (uint32_t) 0, + (uint32_t) CTRL_CORE_PAD_IO_MDIO_MCLK, + BSP_PLATFORM_IOPAD_CFG_PULLTYPESELECT_UP); + setPinMuxRegs( + (uint32_t) 0, + (uint32_t) CTRL_CORE_PAD_IO_MDIO_D, + 0x06); + + /* GPIO2_19 */ + /* Active low reset line on PHY */ + setPinMuxRegs( + (uint32_t) 14, + (uint32_t) CTRL_CORE_PAD_IO_VIN2A_CLK0, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + + /* GPIO2_22 */ + /* Controls bus switch on the RGMII1 receive pins + * Low - disconnected from PHY + * High - connected to PHY + */ + setPinMuxRegs( + (uint32_t) CTRL_CORE_PAD_IO_VOUT1_FLD_MUXMODE_GPIO2_22_14, + (uint32_t) CTRL_CORE_PAD_IO_VOUT1_FLD, + BSP_PLATFORM_IOPAD_CFG_DEFAULT); + GPIODirModeSet(SOC_GPIO2_BASE, 22, GPIO_DIR_OUTPUT); + GPIOPinWrite(SOC_GPIO2_BASE, 19, GPIO_PIN_HIGH); + + /* toggle phy reset_n */ + GPIODirModeSet(SOC_GPIO2_BASE, 19, GPIO_DIR_OUTPUT); + GPIOPinWrite(SOC_GPIO2_BASE, 19, GPIO_PIN_LOW); + { + volatile uint32_t dummy = 100000U; + while (--dummy); + } + GPIOPinWrite(SOC_GPIO2_BASE, 19, GPIO_PIN_HIGH); +} + +/*---------------------------------------------------------------------------*\ +| Local Function Definitions | +\*---------------------------------------------------------------------------*/ + +static void setPinMuxRegs(uint32_t mode_index, uint32_t offset, uint32_t pupd_info) +{ + /* Unlock MMR_5 for pin muxing*/ + //HW_WR_REG32(0x4A002550U, 0x143F832CU); + + /* IO input glitches may occur when switching pull type and + * mux mode simultaneously. To avoid such glitches it is expected + * two separate register writes to transition to the desired state */ + if (offset != 0xffffu) + { + uint32_t muxVal = HW_RD_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE + offset); + if (pupd_info != 0xFFu) + { + muxVal &= ~(0x70000U); + muxVal |= ((pupd_info & 0x07U) << 16U); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE + offset, muxVal); + } + muxVal &= ~((uint32_t) 0x0FU); + muxVal |= (mode_index & 0x0000000FU); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE + offset, muxVal); + } + + /* Lock MMR_5 for pin muxing*/ + //HW_WR_REG32(0x4A002550U, 0x6F361E05U); +} + +static void GPIODirModeSet(uint32_t baseAdd, + uint32_t pinNumber, + uint32_t pinDirection) +{ + uint32_t gpioOeValue = HW_RD_REG32(baseAdd + GPIO_OE); + /* Checking if pin is required to be an output pin. */ + if (GPIO_DIR_OUTPUT == pinDirection) + { + gpioOeValue &= ~((uint32_t) 1 << pinNumber); + } + else + { + gpioOeValue |= (uint32_t) 1 << pinNumber; + } + HW_WR_REG32(baseAdd + GPIO_OE, gpioOeValue); +} + +static void GPIOPinWrite(uint32_t baseAdd, + uint32_t pinNumber, + uint32_t pinValue) +{ + if (GPIO_PIN_HIGH == pinValue) + { + HW_WR_REG32(baseAdd + GPIO_SETDATAOUT, (uint32_t) 1 << pinNumber); + } + else + { + HW_WR_REG32(baseAdd + GPIO_CLEARDATAOUT, (uint32_t) 1 << pinNumber); + } +} + +/*---------------------------------------------------------------------------*\ +| End of File | +\*---------------------------------------------------------------------------*/ + I tested "HelloWorld" example and was able to get IP address. I was also able to ping the RVP with the IP address. You can apply the same changes to other examples. Regards, Stanley + +Hi, That seems to be the final missing piece of the puzzle! I can confirm that with the changes suggested we have both Ethernet and DHCP working on our board as well. Thank you very much for your assistance with this issue. Regards, Simon + diff --git a/data2/text/range/30001+/856819.txt b/data2/text/range/30001+/856819.txt new file mode 100644 index 0000000000000000000000000000000000000000..9eddd89179ee855aaf870d9c29c2ecf4560eb9c2 --- /dev/null +++ b/data2/text/range/30001+/856819.txt @@ -0,0 +1,1503 @@ +Ticket Name: TDA2EXEVM: How to disable EVE cores in a usecase + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi sir, I'm testing with a TDA2 board with 4 EVEs. It works well. Now I'm trying to used only 3 EVEs (1-3), but I got an "Jumping to MPU CPU0 App" error when run TDA2 with a SD card. I used tidlOD usecase to modify. Here are my steps: 1. Mark all EVE4 related links in chains_tidlOD.c, chains_tidlOD_priv.c 2. set "PROC_EVE4_INCLUDE=no" in ../tda2xx+evm_bios_all/cfg.mk 3. set "NEED_PROC_EVE4=no" in ../usecase/tidlOD/cfg.mk I would like to know where do I miss and how to do it. Thank you, Gary + +Responses: +Hi Gary, can you try to edit vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD.txt and remove EVE4 from there and then regenerate the usecase (check vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_UsecaseGen.pdf for instructions). Regards, Yordan + +Hi Yordan, I've tried to generate a new usecase, but the error remains. Is there any other way to solve it? Another question is, how to generate chains_tidlOD.c? The above testing was using old usecase chains_tidlOD.c and remove EVE4 related part. Thank you, Gary + +HI, Can you share your log and changes you have made. Regards, Anunj + +Hi Anunj, Please find attachments as the testing usecase files and log screen. Please also note chains_tidlOD_priv.c & .h are generated from tool. And chains_tidlOD.c is copied from original usecase. Thank you, Gary 0841.tidl_OD.zip + +Hi Anunj, I tried above code in debug mode, it didn't stop at "Jumping to MPU CPU0 App". I could enter the tidl menu and then stop at "C:/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status == SYSTEM_LINK_STATUS_SOK : failed !!!" The reference code is: status = System_linkCreate(pObj->Alg_tiopLinkID, &pObj->Alg_tiopPrm, sizeof(pObj->Alg_tiopPrm)); +UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); Here are my problems, 1. how to solve this tiop issue? 2.Why I can passed "Jumping to MPU CPU0 App" issue is debug mode? I've double checked when booting with SD card only, the error remained the same. 3. Are there any other usecase to be a reference to disable eve(s)? Thany you, Gary + +Hi sir, I've solved no2&3 problems in last post. But I still can't figure out how to fix tiop issue. So I re-arrange my problem here. ---- I ran tidlOD usecase on TDA2 with SD card. When entering the tidl menu, it stopped at "C:/PROCESSOR_SDK_VISION_03_07_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status == SYSTEM_LINK_STATUS_SOK : failed !!!" The reference code is: 1 2 status = System_linkCreate(pObj->Alg_tiopLinkID, &pObj->Alg_tiopPrm, sizeof (pObj->Alg_tiopPrm)); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); tiop_error_log.txt TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cyc les + + SBL Initial Config Cycles - 1804655 (153.99 ms) + SOC Init Cycles - 307261 (26.21 ms) + DDR Config Clock Cycles - 71651 (6.11 ms) + App Image Load Cycles - 156288857 (13336.64 ms) + Slave Core Bootup Cycles - 272513 (23.25 ms) + SBL Boot-up Cycles - 158755043 (13547.9 ms) + Time at which SBL started IPU1_0 - 304006 (9277.52 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 9.278167 s: ***** IPU1_0 Firmware build time 14:50:36 Oct 28 2019 +[IPU1-0] 9.278350 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 9.941682 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[IPU1-0] 9.941865 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 9.941987 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 9.942109 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 9.942231 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 9.942353 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 9.942475 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-0] 9.942597 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 9.944366 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 9.944549 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 9.958335 s: UTILS: CIO: Init Done !!! +[IPU1-0] 9.958427 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 9.958518 s: SYSTEM: Notify init done !!! +[IPU1-0] 9.960348 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 9.960440 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 9.964832 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 9.965046 s: SYSTEM: System Init in progress !!! +[IPU1-0] 9.965107 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 9.965259 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 9.965351 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 9.965473 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 9.965564 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 9.965717 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 9.965778 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 9.965839 s: SYSTEM: VPDMA Descriptor Memory Address translation E NABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 9.969621 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.969743 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.969834 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 9.969926 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.970017 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.970109 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.970566 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.970719 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.970841 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 9.970993 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.971298 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.971390 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.971786 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.971878 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.971969 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 9.972091 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.972244 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.972335 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 9.972732 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 9.972854 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 9.972945 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 9.973037 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 9.973128 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 9.973281 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 10.034648 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 10.035624 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 10.035838 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-0] 10.035960 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 253304 B (247 KB) +[IPU1-0] 10.036112 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Tot al size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 10.036326 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Tot al size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 10.036570 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Tot al size = 127616 B (0 MB), Free size = 99968 B (0 MB) +[IPU1-0] 10.036753 s: SYSTEM: Initializing Links !!! +[IPU1-0] 10.301805 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 10.377203 s: BOARD: Board Init in progress !!! +[IPU1-0] 10.377600 s: BOARD: Board Init Done !!! +[IPU1-0] 10.388916 s: +[IPU1-0] 10.389007 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 10.389068 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 10.389129 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 10.389221 s: Platform : [EVM] +[IPU1-0] 10.389282 s: SOC : [TDA2XX] +[IPU1-0] 10.389343 s: SOC Revision : [ES1.1] +[IPU1-0] 10.389404 s: Board Detected : [Vision] +[IPU1-0] 10.395443 s: EEPROM Base Board Name: [5777xCPU] +[IPU1-0] 10.395504 s: Base Board Revision : [REV E] +[IPU1-0] 10.396846 s: Daughter Card Revision: [REV D] +[IPU1-0] 10.396907 s: +[IPU1-0] 10.400658 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 9.294210 s: ***** IPU1_1 Firmware build time 14:47:38 Oct 28 2019 +[IPU1-1] 9.294424 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 9.944030 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[IPU1-1] 9.944213 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 9.944366 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 9.944519 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 9.944641 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 9.944793 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 9.944915 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-1] 9.945007 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 9.947081 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 9.948362 s: UTILS: CIO: Init Done !!! +[IPU1-1] 9.948484 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 9.948575 s: SYSTEM: Notify init done !!! +[IPU1-1] 9.950588 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 9.950710 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 9.954431 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 9.954523 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 9.955438 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 9.955682 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-1] 9.955773 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 655360 B (640 KB), Free size = 646664 B (631 KB) +[IPU1-1] 9.955956 s: SYSTEM: Initializing Links !!! +[IPU1-1] 10.069358 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[IPU1-1] 10.072347 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[IPU1-1] 10.075367 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[IPU1-1] 10.078844 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[IPU1-1] 10.081833 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[IPU1-1] 10.084883 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[IPU1-1] 10.088360 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[IPU1-1] 10.091441 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[IPU1-1] 10.094888 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[IPU1-1] 10.098212 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[IPU1-1] 10.101354 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[IPU1-1] 10.101476 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 10.101567 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 9.359055 s: ***** A15_0 Firmware build time 11:37:38 Oct 29 2019 +[HOST ] 9.359086 s: *** SYSTEM: CPU Frequency , +[HOST ] 9.942627 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[HOST ] 9.942658 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[HOST ] 9.942658 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 9.942658 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 9.942688 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 9.942688 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 9.942688 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 9.942719 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[HOST ] 9.945068 s: SYSTEM: System Common Init in progress !!! +[HOST ] 9.945098 s: SYSTEM: IPC init in progress !!! +[HOST ] 9.945129 s: SYSTEM: Notify init done !!! +[HOST ] 9.945159 s: SYSTEM: MsgQ init done !!! +[HOST ] 9.945159 s: SYSTEM: IPC init DONE !!! +[HOST ] 9.945708 s: SYSTEM: System Common Init Done !!! +[HOST ] 9.945708 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 9.945861 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 9.945861 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[HOST ] 9.945891 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 6291456 B (6144 KB), Free size = 6247688 B (6101 KB) +[HOST ] 9.945891 s: SYSTEM: Initializing Links !!! +[HOST ] 9.948819 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[HOST ] 9.948911 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[HOST ] 9.949002 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[HOST ] 9.949124 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[HOST ] 9.949216 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[HOST ] 9.949307 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[HOST ] 9.949399 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[HOST ] 9.949490 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[HOST ] 9.949582 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[HOST ] 9.949704 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[HOST ] 9.949795 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[HOST ] 9.949795 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 9.949856 s: SYSTEM: System A15 Init Done !!! +[HOST ] 10.243030 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 10.243488 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 9.340602 s: ***** DSP1 Firmware build time 14:43:35 Oct 28 2019 +[DSP1 ] 9.340663 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 9.946227 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP1 ] 9.946288 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP1 ] 9.946318 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 9.946379 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 9.946410 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 9.946440 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 9.946471 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP1 ] 9.946501 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 9.946654 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 9.946715 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 9.946898 s: UTILS: CIO: Init Done !!! +[DSP1 ] 9.946928 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 9.946928 s: SYSTEM: Notify init done !!! +[DSP1 ] 9.947081 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 9.947111 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 9.947813 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 9.947843 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 9.948057 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP1 ] 9.948087 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 9.948148 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 515720 B (503 KB) +[DSP1 ] 9.948179 s: SYSTEM: Initializing Links !!! +[DSP1 ] 9.955834 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 9.955865 s: lz4CompDecomp Init +[DSP1 ] 9.955895 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 10.314982 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP1 ] 10.315012 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[DSP2 ] 9.340633 s: ***** DSP2 Firmware build time 14:45:58 Oct 28 2019 +[DSP2 ] 9.340694 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 9.947508 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP2 ] 9.947569 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP2 ] 9.947599 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 9.947630 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 9.947691 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 9.947721 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 9.947752 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP2 ] 9.947782 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 9.947965 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 9.947996 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 9.948209 s: UTILS: CIO: Init Done !!! +[DSP2 ] 9.948240 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 9.948270 s: SYSTEM: Notify init done !!! +[DSP2 ] 9.948423 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 9.948453 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 9.949155 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 9.949185 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 9.949399 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP2 ] 9.949460 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 9.949490 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 515720 B (503 KB) +[DSP2 ] 9.949551 s: SYSTEM: Initializing Links !!! +[DSP2 ] 9.956902 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 9.956932 s: lz4CompDecomp Init +[DSP2 ] 9.956963 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 10.316964 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP2 ] 10.316995 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[EVE1 ] 9.930610 s: ***** EVE Firmware build time 14:38:06 Oct 28 2019 +[EVE1 ] 9.932349 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 9.950405 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE1 ] 9.952144 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE1 ] 9.953669 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 9.955163 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 9.956597 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 9.957939 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 9.959250 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE1 ] 9.960592 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 9.962605 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 9.965229 s: UTILS: CIO: Init Done !!! +[EVE1 ] 9.966144 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 9.967181 s: SYSTEM: Notify init done !!! +[EVE1 ] 9.969011 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 9.969895 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 9.983926 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 9.984963 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 9.986518 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 9.987708 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE1 ] 9.989050 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 9.991337 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 253520 B (247 KB) +[EVE1 ] 9.993503 s: SYSTEM: Initializing Links !!! +[EVE1 ] 10.082840 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 10.083846 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 9.933721 s: ***** EVE Firmware build time 14:39:13 Oct 28 2019 +[EVE2 ] 9.935490 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 9.952784 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE2 ] 9.954309 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE2 ] 9.955804 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 9.957237 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 9.958579 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 9.959891 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 9.961233 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE2 ] 9.962727 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 9.965137 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 9.967425 s: UTILS: CIO: Init Done !!! +[EVE2 ] 9.968340 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 9.969407 s: SYSTEM: Notify init done !!! +[EVE2 ] 9.971420 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 9.972305 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 9.986091 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 9.987067 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 9.988623 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 9.989812 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE2 ] 9.991093 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 9.993381 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 253520 B (247 KB) +[EVE2 ] 9.995729 s: SYSTEM: Initializing Links !!! +[EVE2 ] 10.085219 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 10.086256 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 9.936314 s: ***** EVE Firmware build time 14:40:21 Oct 28 2019 +[EVE3 ] 9.938022 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 9.952784 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE3 ] 9.954309 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE3 ] 9.955804 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE3 ] 9.957237 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE3 ] 9.958579 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE3 ] 9.959891 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE3 ] 9.961233 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE3 ] 9.962727 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE3 ] 9.965168 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 9.967425 s: UTILS: CIO: Init Done !!! +[EVE3 ] 9.968340 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 9.969468 s: SYSTEM: Notify init done !!! +[EVE3 ] 9.971420 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 9.972335 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 9.986091 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 9.987098 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 9.988623 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 9.989843 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE3 ] 9.991093 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 9.993381 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 253520 B (247 KB) +[EVE3 ] 9.995760 s: SYSTEM: Initializing Links !!! +[EVE3 ] 10.085524 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 10.086561 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 9.276032 s: ***** IPU2 Firmware build time 14:52:55 Oct 28 2019 +[IPU2 ] 9.276215 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 9.945190 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[IPU2 ] 9.945342 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[IPU2 ] 9.945434 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 9.945556 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 9.945678 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 9.945769 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 9.945891 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU2 ] 9.946013 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 9.948911 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 9.950405 s: UTILS: CIO: Init Done !!! +[IPU2 ] 9.950527 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 9.950619 s: SYSTEM: Notify init done !!! +[IPU2 ] 9.952540 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 9.952662 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 9.957847 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 9.957969 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 9.958823 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 9.959067 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU2 ] 9.959250 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 253400 B (247 KB) +[IPU2 ] 9.959403 s: SYSTEM: Initializing Links !!! +[IPU2 ] 10.067284 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[IPU2 ] 10.070151 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[IPU2 ] 10.072988 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[IPU2 ] 10.075947 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[IPU2 ] 10.078966 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[IPU2 ] 10.081955 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[IPU2 ] 10.084914 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[IPU2 ] 10.087903 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[IPU2 ] 10.090861 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[IPU2 ] 10.093820 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[IPU2 ] 10.096779 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[IPU2 ] 10.096901 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 10.096992 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 11.434941 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA22 6 is connected on I2C3 Lines +[IPU1-0] 11.439272 s: QSPI Init Started +[IPU1-0] 11.439547 s: MID - 1 +[IPU1-0] 11.439608 s: DID - 18 +[IPU1-0] 11.439638 s: QSPI Init Completed Sucessfully +[IPU1-0] 11.452418 s: +[IPU1-0] 11.452479 s: Current System Settings, +[IPU1-0] 11.452540 s: ======================== +[IPU1-0] 11.452601 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 11.452662 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - V IP, YUV422 +[IPU1-0] 11.452754 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 11.452815 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 11.452876 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 11.452967 s: +[IPU1-0] 11.452998 s: ============ +[IPU1-0] 11.453028 s: Usecase Menu +[IPU1-0] 11.453089 s: ============ +[IPU1-0] 11.453120 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 14.949582 s: +[IPU1-0] 14.949734 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 2: Semantic Segmentation Usecase +[IPU1-0] 3: Semantic Segmentation Usecase (Camera Input) +[IPU1-0] 4: TIDL OD Usecase +[IPU1-0] 5: TIDL OD Usecase (Camera Input) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 14.949887 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 14.949917 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !! ! +[IPU1-0] 15.996492 s: +[IPU1-0] 15.996583 s: gTIDLCamIn = +[IPU1-0] 16.027023 s: TIDL Configuration parameters +[IPU1-0] 16.027115 s: ----------------------------- +[IPU1-0] 16.027176 s: inputWidth = 768 +[IPU1-0] 16.027237 s: inputHeight = 320 +[IPU1-0] 16.027298 s: inputFile = inData_OD_T002 +[IPU1-0] 16.027389 s: inputFile = inHeader_OD_T002 +[IPU1-0] 16.027450 s: netFileName = tidl_net_jdetNet_2019Nov08_cnf01 5.bin +[IPU1-0] 16.027542 s: paramFileName = tidl_param_jdetNet_2019Nov08_cnf 015.bin +[IPU1-0] 16.027633 s: inputfps = 30 +[IPU1-0] 16.027664 s: threshold = 0.000000 +[IPU1-0] 16.027755 s: ----------------------------- +[IPU1-0] 17.943115 s: FILE: Reading file [inHeader_OD_T002 +[IPU1-0] ] ... +[IPU1-0] 17.952601 s: FILE: File read Done. [3864 bytes] +[IPU1-0] 17.981821 s: DECODE: Create in progress ... !!! +[IPU1-0] 18.237204 s: DECODE: Creating CH0 of 768 x 320 [1] [0],target bitr ate = 10000 Kbps ... +[IPU1-0] 18.237997 s: DECODE: All CH Create ... DONE !!! +[IPU1-0] 18.239736 s: DECODE: Create ... DONE !!! +[IPU1-0] 18.240102 s: VPE: Create in progress !!! +[IPU1-0] 18.333953 s: VPE: Loading Down-scaling Co-effs +[IPU1-0] 18.334167 s: VPE: Co-effs Loading ... DONE !!! +[IPU1-0] 18.334411 s: VPE: Create Done !!! +[IPU1-0] 18.335539 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 18.335936 s: IPC_OUT_0 : Create Done !!! +[HOST ] 18.336088 s: IPC_IN_0 : Create in progress !!! +[HOST ] 18.336363 s: IPC_IN_0 : Create Done !!! +[HOST ] 18.336546 s: ALGORITHM: Create in progress (algId = 12) !!! +[HOST ] 18.342737 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) +[HOST ] 18.342768 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) +[HOST ] 18.342768 s: ALGORITHM: Create Done (algId = 12) !!! +[HOST ] 18.342859 s: IPC_OUT_2 : Create in progress !!! +[HOST ] 18.342890 s: IPC_OUT_2 : Create Done !!! +[EVE3 ] 18.343164 s: IPC_IN_0 : Create in progress !!! +[EVE3 ] 18.344018 s: IPC_IN_0 : Create Done !!! +[EVE3 ] 18.344750 s: ALGORITHM: Create in progress (algId = 14) !!! +[HOST ] 20.088696 s: IPC_OUT_1 : Create in progress !!! +[HOST ] 20.088726 s: IPC_OUT_1 : Create Done !!! +[DSP1 ] 20.088116 s: IPC_IN_2 : Create in progress !!! +[DSP1 ] 20.088543 s: IPC_IN_2 : Create Done !!! +[EVE2 ] 20.089001 s: IPC_IN_0 : Create in progress !!! +[EVE2 ] 20.089855 s: IPC_IN_0 : Create Done !!! +[EVE2 ] 20.090617 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE3 ] 20.086530 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE3 ] 20.087293 s: IPC_OUT_0 : Create in progress !!! +[EVE3 ] 20.087720 s: IPC_OUT_0 : Create Done !!! +[HOST ] 21.848715 s: IPC_OUT_0 : Create in progress !!! +[HOST ] 21.848746 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 21.848044 s: IPC_IN_1 : Create in progress !!! +[DSP1 ] 21.848593 s: IPC_IN_1 : Create Done !!! +[EVE1 ] 21.849020 s: IPC_IN_0 : Create in progress !!! +[EVE1 ] 21.849874 s: IPC_IN_0 : Create Done !!! +[EVE1 ] 21.850637 s: ALGORITHM: Create in progress (algId = 14) !!! +[EVE2 ] 21.846580 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE2 ] 21.847190 s: IPC_OUT_0 : Create in progress !!! +[EVE2 ] 21.847617 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 23.602452 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 23.602879 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 23.603214 s: ALGORITHM: Create in progress (algId = 36) !!! +[DSP1 ] 23.610534 s: ALGORITHM: Create Done (algId = 36) !!! +[DSP1 ] 23.610717 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 23.610778 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 23.613463 s: IPC_IN_3 : Create in progress !!! +[DSP1 ] 23.613859 s: IPC_IN_3 : Create Done !!! +[DSP1 ] 23.614012 s: ALGORITHM: Create in progress (algId = 0) !!! +[DSP1 ] 23.614317 s: ALGORITHM: Create Done (algId = 0) !!! +[EVE1 ] 23.600835 s: ALGORITHM: Create Done (algId = 14) !!! +[EVE1 ] 23.601598 s: IPC_OUT_0 : Create in progress !!! +[EVE1 ] 23.602055 s: IPC_OUT_0 : Create Done !!! +[IPU1-0] 23.610870 s: IPC_IN_0 : Create in progress !!! +[IPU1-0] 23.611907 s: IPC_IN_0 : Create Done !!! +[IPU1-0] 23.612975 s: IPC_OUT_1 : Create in progress !!! +[IPU1-0] 23.613280 s: IPC_OUT_1 : Create Done !!! +[IPU1-0] 23.614408 s: Assertion @ Line: 465 in C:/PROCESSOR_SDK_VISION_03_0 7_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status = = SYSTEM_LINK_STATUS_SOK : failed !!! +[IPU1-0] 23.615567 s: Assertion @ Line: 465 in C:/PROCESSOR_SDK_VISION_03_0 7_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status = = SYSTEM_LINK_STATUS_SOK : failed !!! + Thank you, Gary + +Hi, I hope 2&3 are solved after doing a clean build which is required whenever you change any config. I have checked your usecase file and it seems like you have not generated it using usecase generation tool. in tidlOD-priv.c file chains_tidlOD_SetPrms() I cannot see alg id for tiop link but for other links it is available . can you please check. Regards, Anuj + +Hi Anuj, Thank you for your help. Now I can work correctly. But when I used only one EVE, the eve loading was only 5x% and fps is 3.x . Comparing to use all 4 eves, the loading was 9x% and 5.x fps for each eve. My question is, Can I improve fps rate by upgrading eve usage rate under one eve circumstance? eg. upgrade fps from 3.x -> 5.x If above is possible, how to achieve this? Thank you, Gary + +Hi, Please make sure you are using release profile binary and OPP_HIGH MLO. And using a high speed sd card. Please share you stats logs after running the usecase for 1-2 min and after pressing p. Regards, Anuj + +Hi Anuj, 1. I've checked OPP_HIGH MLO is used. 2. SD card is the same one with 4 eve test, which EVE loading can achieve 9x%. So I think the writing speed is fast enough. 3. The stats logs is as follow, teraterm_TDA2.log Thank you, Gary + +Hi, Can you try setting input FPS of Null Source link at 5 fps. And please where exactly tidlPrecproc link is dropping frames at input end and output end as well. Regards, Anuj + +Hi Anuj, 1. When setting input FPS of Null Source link at 5 fps, the EVE can only deal with 1.24 fps. TDA2_log.txt [IPU1-0] 257.538339 s: cpuload 0 +[IPU1-0] 257.538400 s: cpuload 2 +[IPU1-0] 260.747514 s: cpuload 0 +[IPU1-0] 260.747575 s: cpuload 2 +[IPU1-0] 263.943542 s: cpuload 0 +[IPU1-0] 263.943603 s: cpuload 2 +[IPU1-0] 267.130604 s: cpuload 0 +[IPU1-0] 267.130665 s: cpuload 2 +[IPU1-0] 268.717501 s: +[IPU1-0] 268.717562 s: CPU [IPU1-0 ] Statistics, +[IPU1-0] 268.717623 s: ************************* +[IPU1-0] 268.717653 s: +[IPU1-0] 268.717714 s: LOAD: CPU: 18.9% HWI: 1.3%, SWI:0.8%, Low Power: 77.9% +[IPU1-0] 268.717867 s: +[IPU1-0] 268.717958 s: LOAD: TSK: NULL_SRC0 : 1.1% +[IPU1-0] 268.718050 s: LOAD: TSK: SYNC0 : 0.2% +[IPU1-0] 268.718141 s: LOAD: TSK: DEC0 : 0.1% +[IPU1-0] 268.718233 s: LOAD: TSK: VPE0 : 0.1% +[IPU1-0] 268.718355 s: LOAD: TSK: GrpxSrc0 : 10.5% +[IPU1-0] 268.718446 s: LOAD: TSK: STAT_COLL : 2.8% +[IPU1-0] 268.718538 s: LOAD: TSK: DEC_PROCESS_TSK_0 : 0.2% +[IPU1-0] 268.718629 s: LOAD: TSK: MISC : 1.8% +[IPU1-0] 268.718721 s: +[IPU1-0] 268.718751 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.718843 s: +[IPU1-0] 268.718873 s: SYSTEM: Sempahores Objects, 161 of 1050 free +[IPU1-0] 268.718965 s: SYSTEM: Task Objects , 17 of 100 free +[IPU1-0] 268.719056 s: SYSTEM: Clock Objects , 91 of 100 free +[IPU1-0] 268.719148 s: SYSTEM: Hwi Objects , 89 of 100 free +[IPU1-0] 268.719209 s: +[IPU1-0] 268.719270 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243632 B (237 KB) +[IPU1-0] 268.719422 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 268.719727 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 275621888 B (262 MB) +[IPU1-0] 268.719910 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127616 B (0 MB), Free size = 99968 B (0 MB) +[IPU1-0] 268.720063 s: +[IPU1-0] 268.720093 s: +[IPU1-0] 268.720124 s: CPU [IPU1-1 ] Statistics, +[IPU1-0] 268.720185 s: ************************* +[IPU1-0] 268.720246 s: +[IPU1-0] 268.720307 s: LOAD: CPU: 1.2% HWI: 0.6%, SWI:0.4%, Low Power: 80.8% +[IPU1-0] 268.720429 s: +[IPU1-0] 268.720551 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 268.720642 s: +[IPU1-0] 268.720673 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.720764 s: +[IPU1-0] 268.720795 s: SYSTEM: Sempahores Objects, 442 of 1050 free +[IPU1-0] 268.720886 s: SYSTEM: Task Objects , 39 of 100 free +[IPU1-0] 268.720978 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 268.721069 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.721130 s: +[IPU1-0] 268.721191 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 644344 B (629 KB) +[IPU1-0] 268.721344 s: +[IPU1-0] 268.721374 s: +[IPU1-0] 268.721405 s: CPU [HOST ] Statistics, +[IPU1-0] 268.721496 s: ************************* +[IPU1-0] 268.721557 s: +[IPU1-0] 268.721588 s: LOAD: CPU: 5.8% HWI: 0.0%, SWI:0.0%, Low Power: 93.3% +[IPU1-0] 268.721740 s: +[IPU1-0] 268.721832 s: LOAD: TSK: MISC : 5.8% +[IPU1-0] 268.721923 s: +[IPU1-0] 268.721954 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.722045 s: +[IPU1-0] 268.722076 s: SYSTEM: Sempahores Objects, 439 of 1050 free +[IPU1-0] 268.722167 s: SYSTEM: Task Objects , 38 of 100 free +[IPU1-0] 268.722259 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 268.722351 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.722442 s: +[IPU1-0] 268.722503 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6239192 B (6092 KB) +[IPU1-0] 268.722656 s: +[IPU1-0] 268.722717 s: +[IPU1-0] 268.722747 s: CPU [DSP1 ] Statistics, +[IPU1-0] 268.722808 s: ************************* +[IPU1-0] 268.722869 s: +[IPU1-0] 268.722900 s: LOAD: CPU: 0.7% HWI: 0.1%, SWI:0.0%, Low Power: 98.7% +[IPU1-0] 268.723052 s: +[IPU1-0] 268.723083 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 0.4% +[IPU1-0] 268.723205 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 268.723296 s: +[IPU1-0] 268.723327 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.723418 s: +[IPU1-0] 268.723449 s: SYSTEM: Sempahores Objects, 453 of 1050 free +[IPU1-0] 268.723540 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 268.723632 s: SYSTEM: Clock Objects , 95 of 100 free +[IPU1-0] 268.723723 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 268.723815 s: +[IPU1-0] 268.723845 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65312 B (63 KB) +[IPU1-0] 268.723998 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 487104 B (475 KB) +[IPU1-0] 268.724150 s: +[IPU1-0] 268.724211 s: +[IPU1-0] 268.724242 s: CPU [DSP2 ] Statistics, +[IPU1-0] 268.724303 s: ************************* +[IPU1-0] 268.724364 s: +[IPU1-0] 268.724394 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 99.1% +[IPU1-0] 268.724699 s: +[IPU1-0] 268.724760 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 268.724852 s: +[IPU1-0] 268.724882 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.724974 s: +[IPU1-0] 268.725004 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 268.725096 s: SYSTEM: Task Objects , 92 of 100 free +[IPU1-0] 268.725187 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 268.725279 s: SYSTEM: Hwi Objects , 100 of 100 free +[IPU1-0] 268.725370 s: +[IPU1-0] 268.725401 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1-0] 268.725584 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 515520 B (503 KB) +[IPU1-0] 268.725736 s: +[IPU1-0] 268.725767 s: +[IPU1-0] 268.725828 s: CPU [EVE1 ] Statistics, +[IPU1-0] 268.725889 s: ************************* +[IPU1-0] 268.725950 s: +[IPU1-0] 268.725980 s: LOAD: CPU: 13.7% HWI: 0.2%, SWI:0.1%, Low Power: 81.3% +[IPU1-0] 268.726133 s: +[IPU1-0] 268.726163 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 13.0% +[IPU1-0] 268.726255 s: LOAD: TSK: MISC : 0.4% +[IPU1-0] 268.726346 s: +[IPU1-0] 268.726377 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.726499 s: +[IPU1-0] 268.726529 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[IPU1-0] 268.726621 s: SYSTEM: Task Objects , 93 of 100 free +[IPU1-0] 268.726712 s: SYSTEM: Clock Objects , 97 of 100 free +[IPU1-0] 268.726804 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.726865 s: +[IPU1-0] 268.726926 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[IPU1-0] 268.727078 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 236600 B (231 KB) +[IPU1-0] 268.727231 s: +[IPU1-0] 268.727261 s: +[IPU1-0] 268.727292 s: CPU [EVE2 ] Statistics, +[IPU1-0] 268.727444 s: ************************* +[IPU1-0] 268.727505 s: +[IPU1-0] 268.727566 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.7% +[IPU1-0] 268.727719 s: +[IPU1-0] 268.727749 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 268.727841 s: +[IPU1-0] 268.727871 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.727963 s: +[IPU1-0] 268.727993 s: SYSTEM: Sempahores Objects, 457 of 1050 free +[IPU1-0] 268.728085 s: SYSTEM: Task Objects , 93 of 100 free +[IPU1-0] 268.728176 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 268.728237 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.728329 s: +[IPU1-0] 268.728359 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 268.728542 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253360 B (247 KB) +[IPU1-0] 268.728695 s: +[IPU1-0] 268.728725 s: +[IPU1-0] 268.728786 s: CPU [EVE3 ] Statistics, +[IPU1-0] 268.728847 s: ************************* +[IPU1-0] 268.728878 s: +[IPU1-0] 268.728939 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.7% +[IPU1-0] 268.729061 s: +[IPU1-0] 268.729122 s: LOAD: TSK: MISC : 0.3% +[IPU1-0] 268.729213 s: +[IPU1-0] 268.729244 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.729335 s: +[IPU1-0] 268.729366 s: SYSTEM: Sempahores Objects, 457 of 1050 free +[IPU1-0] 268.729457 s: SYSTEM: Task Objects , 93 of 100 free +[IPU1-0] 268.729701 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 268.729823 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.729884 s: +[IPU1-0] 268.729945 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[IPU1-0] 268.730098 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 253360 B (247 KB) +[IPU1-0] 268.730250 s: +[IPU1-0] 268.730281 s: +[IPU1-0] 268.730311 s: CPU [IPU2 ] Statistics, +[IPU1-0] 268.730372 s: ************************* +[IPU1-0] 268.730433 s: +[IPU1-0] 268.730494 s: LOAD: CPU: 0.9% HWI: 0.4%, SWI:0.3%, Low Power: 96.5% +[IPU1-0] 268.730647 s: +[IPU1-0] 268.730738 s: LOAD: TSK: MISC : 0.2% +[IPU1-0] 268.730830 s: +[IPU1-0] 268.730860 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 268.730952 s: +[IPU1-0] 268.730982 s: SYSTEM: Sempahores Objects, 442 of 1050 free +[IPU1-0] 268.731074 s: SYSTEM: Task Objects , 39 of 100 free +[IPU1-0] 268.731165 s: SYSTEM: Clock Objects , 99 of 100 free +[IPU1-0] 268.731257 s: SYSTEM: Hwi Objects , 99 of 100 free +[IPU1-0] 268.731318 s: +[IPU1-0] 268.731379 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 251080 B (245 KB) +[IPU1-0] 268.731531 s: +[IPU1-0] 268.733117 s: +[IPU1-0] 268.733178 s: UTILS_PRCM_STATS: Current Temperature, +[IPU1-0] 268.733270 s: +[IPU1-0] 268.733300 s: Voltage Rail || Curr Temp Min - Max +[IPU1-0] 268.733361 s: --------------------------------------------------------- +[IPU1-0] 268.733575 s: PMHAL_PRCM_VD_MPU || [34.400 , 34.800] +[IPU1-0] 268.733697 s: PMHAL_PRCM_VD_CORE || [34.400 , 34.800] +[IPU1-0] 268.733819 s: PMHAL_PRCM_VD_IVAHD || [34.800 , 35.200] +[IPU1-0] 268.733910 s: PMHAL_PRCM_VD_DSPEVE || [34. 0 , 34.400] +[IPU1-0] 268.734002 s: PMHAL_PRCM_VD_GPU || [33.600 , 34. 0] +[IPU1-0] 268.734124 s: +[IPU1-0] 268.734154 s: ============================================================================ +[IPU1-0] 268.734246 s: Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) +[IPU1-0] 268.734337 s: ---------------------------------------------------------------------------- +[IPU1-0] 268.735984 s: UTILS_PRCM_STATS: Reading the regulator data failed +[IPU1-0] 268.736106 s: UTILS_PRCM_STATS: PM INA226 Power Read Failed !! +[IPU1-0] 268.736320 s: +[IPU1-0] 268.736350 s: Statistics Collector, +[IPU1-0] 268.736411 s: +[IPU1-0] 268.736472 s: STATISTIC Avg Data Peak Data +[IPU1-0] 268.736564 s: COLLECTOR MB/s MB/s +[IPU1-0] 268.736655 s: -------------------------------------------------- +[IPU1-0] 268.736716 s: SCI_EMIF1 RD+WR | 221.699741 1047.966372 +[IPU1-0] 268.736838 s: SCI_EMIF2 RD+WR | 0.000000 0.000000 +[IPU1-0] 268.736930 s: SCI_EMIF1 RD ONLY | 188.093862 834.536078 +[IPU1-0] 268.737052 s: SCI_EMIF1 WR ONLY | 33.703460 369.816510 +[IPU1-0] 268.737143 s: SCI_EMIF2 RD ONLY | 0.000000 0.000000 +[IPU1-0] 268.737235 s: SCI_EMIF2 WR ONLY | 0.000000 0.000000 +[IPU1-0] 268.737326 s: SCI_MA_MPU_P1 | 2.511724 181.136994 +[IPU1-0] 268.737448 s: SCI_MA_MPU_P2 | 0.000000 0.000000 +[IPU1-0] 268.737570 s: SCI_DSS | 120.969352 260.400635 +[IPU1-0] 268.737662 s: SCI_IPU1 | 9.680294 44.200719 +[IPU1-0] 268.737784 s: SCI_VIP1_P1 | 0.000000 0.000000 +[IPU1-0] 268.737875 s: SCI_VIP1_P2 | 0.000000 0.000000 +[IPU1-0] 268.737967 s: SCI_VPE_P1 | 1.492376 65.428051 +[IPU1-0] 268.738089 s: SCI_VPE_P2 | 1.492785 65.428051 +[IPU1-0] 268.738180 s: SCI_DSP1_MDMA | 1.855002 187.697933 +[IPU1-0] 268.738302 s: SCI_DSP1_EDMA | 0.385418 59.084442 +[IPU1-0] 268.738394 s: SCI_DSP2_MDMA | 0.114033 8.826869 +[IPU1-0] 268.738516 s: SCI_DSP2_EDMA | 0.000000 0.000000 +[IPU1-0] 268.738607 s: SCI_EVE1_TC0 | 49.094795 717.705551 +[IPU1-0] 268.738729 s: SCI_EVE1_TC1 | 69.065480 1049.028364 +[IPU1-0] 268.738821 s: SCI_EVE2_TC0 | 2.671829 15.868052 +[IPU1-0] 268.738943 s: SCI_EVE2_TC1 | 0.000000 0.000000 +[IPU1-0] 268.739034 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 +[IPU1-0] 268.739126 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 +[IPU1-0] 268.739248 s: SCI_EDMA_TC1_RD | 0.838503 79.516824 +[IPU1-0] 268.739339 s: SCI_EDMA_TC1_WR | 0.848408 79.516824 +[IPU1-0] 268.739431 s: SCI_VIP2_P1 | 0.000000 0.000000 +[IPU1-0] 268.739797 s: SCI_VIP2_P2 | 0.000000 0.000000 +[IPU1-0] 268.739919 s: SCI_VIP3_P1 | 0.000000 0.000000 +[IPU1-0] 268.740010 s: SCI_VIP3_P2 | 0.000000 0.000000 +[IPU1-0] 268.740102 s: SCI_EVE3_TC0 | 2.650627 15.707160 +[IPU1-0] 268.740224 s: SCI_EVE3_TC1 | 0.000000 0.000000 +[IPU1-0] 268.740315 s: SCI_EVE4_TC0 | 0.000000 0.000000 +[IPU1-0] 268.740407 s: SCI_EVE4_TC1 | 0.000000 0.000000 +[IPU1-0] 268.740559 s: SCI_IVA | 11.549087 483.268852 +[IPU1-0] 268.740651 s: SCI_GPU_P1 | 0.000000 0.000000 +[IPU1-0] 268.740743 s: SCI_GPU_P2 | 0.000000 0.000000 +[IPU1-0] 268.740865 s: SCI_GMAC_SW | 0.000000 0.000000 +[IPU1-0] 268.740956 s: SCI_OCMC_RAM1 | 0.000000 0.000000 +[IPU1-0] 268.741048 s: SCI_OCMC_RAM2 | 0.000000 0.000000 +[IPU1-0] 268.741139 s: SCI_OCMC_RAM3 | 63.794286 1048.616374 +[IPU1-0] 268.840541 s: +[IPU1-0] 268.840602 s: +[IPU1-0] 268.840724 s: +[IPU1-0] 268.840755 s: ### CPU [IPU1-0], LinkID [ 57], +[IPU1-0] 268.840846 s: +[IPU1-0] 268.840877 s: [ NULL_SRC ] Link Statistics, +[IPU1-0] 268.840938 s: ****************************** +[IPU1-0] 268.840999 s: +[IPU1-0] 268.841060 s: Elapsed time = 202903 msec +[IPU1-0] 268.841121 s: +[IPU1-0] 268.841151 s: New data Recv = 5.0 fps +[IPU1-0] 268.841243 s: Get Full Buf Cb = 5.0 fps +[IPU1-0] 268.841304 s: Put Empty Buf Cb = 5.0 fps +[IPU1-0] 268.841365 s: Driver/Notify Cb = 4.99 fps +[IPU1-0] 268.841487 s: +[IPU1-0] 268.841517 s: Input Statistics, +[IPU1-0] 268.841578 s: +[IPU1-0] 268.841609 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 268.841700 s: | FPS | FPS | FPS | FPS +[IPU1-0] 268.841761 s: -------------------------------------------------- +[IPU1-0] 268.841853 s: 0 | 5. 0 0. 0 0. 0 5. 0 +[IPU1-0] 268.841975 s: +[IPU1-0] 268.842036 s: Output Statistics, +[IPU1-0] 268.842066 s: +[IPU1-0] 268.842127 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 268.842188 s: | ID | FPS | FPS | FPS +[IPU1-0] 268.842249 s: --------------------------------------------- +[IPU1-0] 268.842341 s: 0 | 0 5. 0 0. 0 0. 0 +[IPU1-0] 268.842493 s: +[IPU1-0] 268.842524 s: [ NULL_SRC ] LATENCY, +[IPU1-0] 268.842585 s: ******************** +[IPU1-0] 268.842646 s: +[IPU1-0] 268.842768 s: +[IPU1-0] 268.842798 s: ### CPU [IPU1-0], LinkID [ 86], +[IPU1-0] 268.842890 s: +[IPU1-0] 268.842920 s: [ DECODE ] Link Statistics, +[IPU1-0] 268.842981 s: ****************************** +[IPU1-0] 268.843042 s: +[IPU1-0] 268.843103 s: Elapsed time = 202892 msec +[IPU1-0] 268.843164 s: +[IPU1-0] 268.843195 s: New data Recv = 5.0 fps +[IPU1-0] 268.843286 s: Release data Recv = 5.0 fps +[IPU1-0] 268.843347 s: Get Full Buf Cb = 10.0 fps +[IPU1-0] 268.843439 s: Put Empty Buf Cb = 5.0 fps +[IPU1-0] 268.843530 s: +[IPU1-0] 268.843561 s: Input Statistics, +[IPU1-0] 268.843622 s: +[IPU1-0] 268.843652 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 268.843713 s: | FPS | FPS | FPS | FPS +[IPU1-0] 268.843805 s: -------------------------------------------------- +[IPU1-0] 268.843896 s: 0 | 5. 0 0. 0 0. 0 5. 0 +[IPU1-0] 268.844079 s: +[IPU1-0] 268.844140 s: Output Statistics, +[IPU1-0] 268.844171 s: +[IPU1-0] 268.844232 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 268.844293 s: | ID | FPS | FPS | FPS +[IPU1-0] 268.844354 s: --------------------------------------------- +[IPU1-0] 268.844445 s: 0 | 0 5. 0 0. 0 0. 0 +[IPU1-0] 268.844750 s: +[IPU1-0] 268.844811 s: [ DECODE ] LATENCY, +[IPU1-0] 268.844872 s: ******************** +[IPU1-0] 268.844933 s: Local Link Latency : Avg = 2837 us, Min = 2013 us, Max = 4667 us, +[IPU1-0] 268.845025 s: Source to Link Latency : Avg = 2967 us, Min = 2104 us, Max = 4819 us, +[IPU1-0] 268.845147 s: +[IPU1-0] 268.845238 s: +[IPU1-0] 268.845299 s: ### CPU [IPU1-0], LinkID [ 81], +[IPU1-0] 268.845360 s: +[IPU1-0] 268.845391 s: [ VPE ] Link Statistics, +[IPU1-0] 268.845482 s: ****************************** +[IPU1-0] 268.845543 s: +[IPU1-0] 268.845604 s: Elapsed time = 202893 msec +[IPU1-0] 268.845665 s: +[IPU1-0] 268.845696 s: New data Recv = 5.0 fps +[IPU1-0] 268.845757 s: Get Full Buf Cb = 5.0 fps +[IPU1-0] 268.845848 s: Put Empty Buf Cb = 9.99 fps +[IPU1-0] 268.845909 s: Driver/Notify Cb = 5.0 fps +[IPU1-0] 268.845970 s: +[IPU1-0] 268.846031 s: Input Statistics, +[IPU1-0] 268.846062 s: +[IPU1-0] 268.846123 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 268.846184 s: | FPS | FPS | FPS | FPS +[IPU1-0] 268.846275 s: -------------------------------------------------- +[IPU1-0] 268.846336 s: 0 | 5. 0 0. 0 0. 0 5. 0 +[IPU1-0] 268.846489 s: +[IPU1-0] 268.846519 s: Output Statistics, +[IPU1-0] 268.846580 s: +[IPU1-0] 268.846611 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 268.846702 s: | ID | FPS | FPS | FPS +[IPU1-0] 268.846763 s: --------------------------------------------- +[IPU1-0] 268.846824 s: 0 | 0 5. 0 0. 0 0. 0 +[IPU1-0] 268.846946 s: +[IPU1-0] 268.846977 s: [ VPE ] LATENCY, +[IPU1-0] 268.847038 s: ******************** +[IPU1-0] 268.847099 s: Local Link Latency : Avg = 1294 us, Min = 1250 us, Max = 1525 us, +[IPU1-0] 268.847190 s: Source to Link Latency : Avg = 4399 us, Min = 3508 us, Max = 6222 us, +[IPU1-0] 268.847312 s: +[IPU1-0] 268.847373 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! +[IPU1-0] 268.847556 s: +[IPU1-0] 268.847587 s: ### CPU [IPU1-0], LinkID [ 0], +[IPU1-0] 268.847648 s: +[IPU1-0] 268.847709 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 268.847770 s: ****************************** +[IPU1-0] 268.847831 s: +[IPU1-0] 268.847861 s: Elapsed time = 202893 msec +[IPU1-0] 268.847922 s: +[IPU1-0] 268.847983 s: New data Recv = 5.0 fps +[IPU1-0] 268.848044 s: Release data Recv = 5.0 fps +[IPU1-0] 268.848105 s: Driver/Notify Cb = 38.33 fps +[IPU1-0] 268.848197 s: +[IPU1-0] 268.848227 s: Input Statistics, +[IPU1-0] 268.848258 s: +[IPU1-0] 268.848319 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 268.848380 s: | FPS | FPS | FPS | FPS +[IPU1-0] 268.848471 s: -------------------------------------------------- +[IPU1-0] 268.848563 s: 0 | 5. 0 0. 0 0. 0 5. 0 +[IPU1-0] 268.848685 s: +[IPU1-0] 268.848715 s: Output Statistics, +[IPU1-0] 268.848776 s: +[IPU1-0] 268.848807 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 268.848898 s: | ID | FPS | FPS | FPS +[IPU1-0] 268.848959 s: --------------------------------------------- +[IPU1-0] 268.849020 s: 0 | 0 5. 0 0. 0 0. 0 +[IPU1-0] 268.849142 s: +[IPU1-0] 268.849173 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 268.849234 s: ******************** +[IPU1-0] 268.849295 s: Local Link Latency : Avg = 8 us, Min = 0 us, Max = 122 us, +[IPU1-0] 268.849417 s: Source to Link Latency : Avg = 4640 us, Min = 3752 us, Max = 6436 us, +[IPU1-0] 268.849691 s: +[IPU1-0] 269.350301 s: +[IPU1-0] 269.350362 s: ### CPU [ HOST], LinkID [ 10], +[IPU1-0] 269.350454 s: +[IPU1-0] 269.350515 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 269.350606 s: ****************************** +[IPU1-0] 269.350667 s: +[IPU1-0] 269.350698 s: Elapsed time = 202799 msec +[IPU1-0] 269.350759 s: +[IPU1-0] 269.350820 s: Get Full Buf Cb = 5.0 fps +[IPU1-0] 269.350881 s: Put Empty Buf Cb = 5.0 fps +[IPU1-0] 269.350972 s: Driver/Notify Cb = 38.32 fps +[IPU1-0] 269.351033 s: +[IPU1-0] 269.351735 s: Input Statistics, +[IPU1-0] 269.351826 s: +[IPU1-0] 269.351857 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.351918 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.352010 s: -------------------------------------------------- +[IPU1-0] 269.352101 s: 0 | 5. 0 0. 0 0. 0 5. 0 +[IPU1-0] 269.352223 s: +[IPU1-0] 269.352254 s: Output Statistics, +[IPU1-0] 269.352315 s: +[IPU1-0] 269.352345 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.352437 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.352528 s: --------------------------------------------- +[IPU1-0] 269.352620 s: 0 | 0 5. 0 0. 0 0. 0 +[IPU1-0] 269.352742 s: +[IPU1-0] 269.352803 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 269.352864 s: ******************** +[IPU1-0] 269.352925 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 31 us, +[IPU1-0] 269.353016 s: Source to Link Latency : Avg = 4729 us, Min = 3813 us, Max = 6527 us, +[IPU1-0] 269.353138 s: +[IPU1-0] 269.353260 s: +[IPU1-0] 269.353291 s: ### CPU [ HOST], LinkID [ 49], +[IPU1-0] 269.353382 s: +[IPU1-0] 269.353413 s: [ ALG_TIDLPREPROC ] Link Statistics, +[IPU1-0] 269.353504 s: ****************************** +[IPU1-0] 269.353565 s: +[IPU1-0] 269.353596 s: Elapsed time = 202802 msec +[IPU1-0] 269.353657 s: +[IPU1-0] 269.353718 s: New data Recv = 5.0 fps +[IPU1-0] 269.353779 s: +[IPU1-0] 269.353809 s: Input Statistics, +[IPU1-0] 269.353870 s: +[IPU1-0] 269.353901 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.353992 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.354053 s: -------------------------------------------------- +[IPU1-0] 269.354145 s: 0 | 5. 0 3.75 0. 0 1.24 +[IPU1-0] 269.354267 s: +[IPU1-0] 269.354297 s: Output Statistics, +[IPU1-0] 269.354358 s: +[IPU1-0] 269.354389 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.354480 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.354755 s: --------------------------------------------- +[IPU1-0] 269.354846 s: 0 | 0 1.24 3.75 0. 0 +[IPU1-0] 269.354968 s: +[IPU1-0] 269.354999 s: [ ALG_TIDLPREPROC ] LATENCY, +[IPU1-0] 269.355060 s: ******************** +[IPU1-0] 269.355121 s: Local Link Latency : Avg = 176 us, Min = 152 us, Max = 305 us, +[IPU1-0] 269.355243 s: Source to Link Latency : Avg = 26846 us, Min = 25987 us, Max = 28091 us, +[IPU1-0] 269.355334 s: +[IPU1-0] 269.355456 s: +[IPU1-0] 269.355517 s: ### CPU [ HOST], LinkID [ 0], +[IPU1-0] 269.355609 s: +[IPU1-0] 269.355639 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 269.355700 s: ****************************** +[IPU1-0] 269.355761 s: +[IPU1-0] 269.355792 s: Elapsed time = 202982 msec +[IPU1-0] 269.355883 s: +[IPU1-0] 269.355914 s: New data Recv = 1.25 fps +[IPU1-0] 269.355975 s: Release data Recv = 1.25 fps +[IPU1-0] 269.356066 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 269.356127 s: +[IPU1-0] 269.356188 s: Input Statistics, +[IPU1-0] 269.356219 s: +[IPU1-0] 269.356280 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.356341 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.356432 s: -------------------------------------------------- +[IPU1-0] 269.356524 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 269.356646 s: +[IPU1-0] 269.356676 s: Output Statistics, +[IPU1-0] 269.356737 s: +[IPU1-0] 269.356768 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.356859 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.356920 s: --------------------------------------------- +[IPU1-0] 269.357012 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 269.357134 s: +[IPU1-0] 269.357164 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 269.357225 s: ******************** +[IPU1-0] 269.357286 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, +[IPU1-0] 269.357378 s: Source to Link Latency : Avg = 26864 us, Min = 25987 us, Max = 28121 us, +[IPU1-0] 269.357530 s: +[IPU1-0] 269.857591 s: +[IPU1-0] 269.857652 s: ### CPU [ EVE1], LinkID [ 10], +[IPU1-0] 269.857744 s: +[IPU1-0] 269.857774 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 269.857835 s: ****************************** +[IPU1-0] 269.857896 s: +[IPU1-0] 269.857957 s: Elapsed time = 202686 msec +[IPU1-0] 269.858018 s: +[IPU1-0] 269.858049 s: Get Full Buf Cb = 2.50 fps +[IPU1-0] 269.858140 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 269.858201 s: Driver/Notify Cb = 4.58 fps +[IPU1-0] 269.858293 s: +[IPU1-0] 269.858323 s: Input Statistics, +[IPU1-0] 269.858384 s: +[IPU1-0] 269.858415 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.858506 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.858598 s: -------------------------------------------------- +[IPU1-0] 269.858689 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 269.858811 s: +[IPU1-0] 269.858842 s: Output Statistics, +[IPU1-0] 269.858903 s: +[IPU1-0] 269.858933 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.858994 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.859086 s: --------------------------------------------- +[IPU1-0] 269.859147 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 269.859269 s: +[IPU1-0] 269.859299 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 269.859360 s: ******************** +[IPU1-0] 269.859421 s: Local Link Latency : Avg = 30 us, Min = 0 us, Max = 31 us, +[IPU1-0] 269.859726 s: Source to Link Latency : Avg = 27124 us, Min = 26261 us, Max = 28365 us, +[IPU1-0] 269.859848 s: +[IPU1-0] 269.859970 s: +[IPU1-0] 269.860001 s: ### CPU [ EVE1], LinkID [ 49], +[IPU1-0] 269.860153 s: +[IPU1-0] 269.860214 s: [ ALG_TIDL ] Link Statistics, +[IPU1-0] 269.860275 s: ****************************** +[IPU1-0] 269.860336 s: +[IPU1-0] 269.860367 s: Elapsed time = 202689 msec +[IPU1-0] 269.860428 s: +[IPU1-0] 269.860458 s: New data Recv = 2.50 fps +[IPU1-0] 269.860580 s: +[IPU1-0] 269.860611 s: Input Statistics, +[IPU1-0] 269.860672 s: +[IPU1-0] 269.860702 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.860794 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.860855 s: -------------------------------------------------- +[IPU1-0] 269.860946 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 269.861068 s: +[IPU1-0] 269.861099 s: Output Statistics, +[IPU1-0] 269.861160 s: +[IPU1-0] 269.861190 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.861312 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.861404 s: --------------------------------------------- +[IPU1-0] 269.861465 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 269.861617 s: +[IPU1-0] 269.861648 s: [ ALG_TIDL ] LATENCY, +[IPU1-0] 269.861709 s: ******************** +[IPU1-0] 269.861770 s: Local Link Latency : Avg = 142361 us, Min = 142133 us, Max = 142743 us, +[IPU1-0] 269.861892 s: Source to Link Latency : Avg = 169640 us, Min = 168700 us, Max = 171140 us, +[IPU1-0] 269.861983 s: +[IPU1-0] 269.862105 s: +[IPU1-0] 269.862136 s: ### CPU [ EVE1], LinkID [ 0], +[IPU1-0] 269.862197 s: +[IPU1-0] 269.862258 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 269.862319 s: ****************************** +[IPU1-0] 269.862380 s: +[IPU1-0] 269.862410 s: Elapsed time = 202548 msec +[IPU1-0] 269.862502 s: +[IPU1-0] 269.862563 s: New data Recv = 1.25 fps +[IPU1-0] 269.862624 s: Release data Recv = 1.25 fps +[IPU1-0] 269.862685 s: Driver/Notify Cb = 4.59 fps +[IPU1-0] 269.862776 s: +[IPU1-0] 269.862807 s: Input Statistics, +[IPU1-0] 269.862868 s: +[IPU1-0] 269.862898 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 269.862990 s: | FPS | FPS | FPS | FPS +[IPU1-0] 269.863051 s: -------------------------------------------------- +[IPU1-0] 269.863142 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 269.863264 s: +[IPU1-0] 269.863295 s: Output Statistics, +[IPU1-0] 269.863356 s: +[IPU1-0] 269.863386 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 269.863447 s: | ID | FPS | FPS | FPS +[IPU1-0] 269.863539 s: --------------------------------------------- +[IPU1-0] 269.863630 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 269.863752 s: +[IPU1-0] 269.863783 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 269.863844 s: ******************** +[IPU1-0] 269.863905 s: Local Link Latency : Avg = 23 us, Min = 0 us, Max = 31 us, +[IPU1-0] 269.863996 s: Source to Link Latency : Avg = 169922 us, Min = 168944 us, Max = 171384 us, +[IPU1-0] 269.864118 s: +[IPU1-0] 270.324833 s: cpuload 0 +[IPU1-0] 270.324894 s: cpuload 2 +[IPU1-0] 270.363600 s: +[IPU1-0] 270.363661 s: ### CPU [ DSP1], LinkID [ 10], +[IPU1-0] 270.363752 s: +[IPU1-0] 270.363783 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 270.363844 s: ****************************** +[IPU1-0] 270.363905 s: +[IPU1-0] 270.363966 s: Elapsed time = 202248 msec +[IPU1-0] 270.364027 s: +[IPU1-0] 270.364057 s: Get Full Buf Cb = 1.25 fps +[IPU1-0] 270.364149 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 270.364210 s: Driver/Notify Cb = 34.57 fps +[IPU1-0] 270.364271 s: +[IPU1-0] 270.364332 s: Input Statistics, +[IPU1-0] 270.364362 s: +[IPU1-0] 270.364423 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.364484 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.364759 s: -------------------------------------------------- +[IPU1-0] 270.364850 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.364972 s: +[IPU1-0] 270.365003 s: Output Statistics, +[IPU1-0] 270.365064 s: +[IPU1-0] 270.365094 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.365186 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.365247 s: --------------------------------------------- +[IPU1-0] 270.365308 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.365430 s: +[IPU1-0] 270.365491 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 270.365552 s: ******************** +[IPU1-0] 270.365613 s: Local Link Latency : Avg = 7 us, Min = 0 us, Max = 31 us, +[IPU1-0] 270.365735 s: Source to Link Latency : Avg = 170067 us, Min = 169096 us, Max = 171536 us, +[IPU1-0] 270.365857 s: +[IPU1-0] 270.365948 s: CPU [ DSP1], LinkID [ 38], Link Statistics not available ! +[IPU1-0] 270.366131 s: +[IPU1-0] 270.366162 s: ### CPU [ DSP1], LinkID [ 49], +[IPU1-0] 270.366223 s: +[IPU1-0] 270.366253 s: [ ALG_TIDL ] Link Statistics, +[IPU1-0] 270.366345 s: ****************************** +[IPU1-0] 270.366406 s: +[IPU1-0] 270.366436 s: Elapsed time = 202251 msec +[IPU1-0] 270.366497 s: +[IPU1-0] 270.366558 s: New data Recv = 2.50 fps +[IPU1-0] 270.366619 s: +[IPU1-0] 270.366680 s: Input Statistics, +[IPU1-0] 270.366711 s: +[IPU1-0] 270.366772 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.366833 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.366924 s: -------------------------------------------------- +[IPU1-0] 270.366985 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.367107 s: +[IPU1-0] 270.367138 s: Output Statistics, +[IPU1-0] 270.367199 s: +[IPU1-0] 270.367229 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.367321 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.367382 s: --------------------------------------------- +[IPU1-0] 270.367443 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.367595 s: +[IPU1-0] 270.367626 s: [ ALG_TIDL ] LATENCY, +[IPU1-0] 270.367687 s: ******************** +[IPU1-0] 270.367748 s: Local Link Latency : Avg = 3815 us, Min = 3751 us, Max = 3935 us, +[IPU1-0] 270.367870 s: Source to Link Latency : Avg = 173923 us, Min = 172940 us, Max = 175349 us, +[IPU1-0] 270.367992 s: +[IPU1-0] 270.368083 s: +[IPU1-0] 270.368114 s: ### CPU [ DSP1], LinkID [ 0], +[IPU1-0] 270.368205 s: +[IPU1-0] 270.368236 s: [ IPC_OUT_0 ] Link Statistics, +[IPU1-0] 270.368297 s: ****************************** +[IPU1-0] 270.368358 s: +[IPU1-0] 270.368388 s: Elapsed time = 202249 msec +[IPU1-0] 270.368449 s: +[IPU1-0] 270.368510 s: New data Recv = 1.25 fps +[IPU1-0] 270.368602 s: Release data Recv = 1.25 fps +[IPU1-0] 270.368663 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 270.368754 s: +[IPU1-0] 270.368785 s: Input Statistics, +[IPU1-0] 270.368815 s: +[IPU1-0] 270.368876 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.368937 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.369029 s: -------------------------------------------------- +[IPU1-0] 270.369090 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.369212 s: +[IPU1-0] 270.369242 s: Output Statistics, +[IPU1-0] 270.369303 s: +[IPU1-0] 270.369334 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.369425 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.369486 s: --------------------------------------------- +[IPU1-0] 270.369730 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.369883 s: +[IPU1-0] 270.369913 s: [ IPC_OUT_0 ] LATENCY, +[IPU1-0] 270.369974 s: ******************** +[IPU1-0] 270.370005 s: Local Link Latency : Avg = 3 us, Min = 0 us, Max = 31 us, +[IPU1-0] 270.370127 s: Source to Link Latency : Avg = 173996 us, Min = 173001 us, Max = 175440 us, +[IPU1-0] 270.370249 s: +[IPU1-0] 270.870127 s: +[IPU1-0] 270.870218 s: ### CPU [IPU1-0], LinkID [ 10], +[IPU1-0] 270.870279 s: +[IPU1-0] 270.870310 s: [ IPC_IN_0 ] Link Statistics, +[IPU1-0] 270.870402 s: ****************************** +[IPU1-0] 270.870463 s: +[IPU1-0] 270.870493 s: Elapsed time = 202751 msec +[IPU1-0] 270.870585 s: +[IPU1-0] 270.870646 s: Get Full Buf Cb = 6.25 fps +[IPU1-0] 270.870707 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 270.870798 s: Driver/Notify Cb = 34.57 fps +[IPU1-0] 270.870859 s: +[IPU1-0] 270.870920 s: Input Statistics, +[IPU1-0] 270.870951 s: +[IPU1-0] 270.870981 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.871134 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.871195 s: -------------------------------------------------- +[IPU1-0] 270.871286 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.871408 s: +[IPU1-0] 270.871469 s: Output Statistics, +[IPU1-0] 270.871500 s: +[IPU1-0] 270.871561 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.871652 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.871713 s: --------------------------------------------- +[IPU1-0] 270.871805 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.871927 s: +[IPU1-0] 270.871957 s: [ IPC_IN_0 ] LATENCY, +[IPU1-0] 270.872018 s: ******************** +[IPU1-0] 270.872079 s: Local Link Latency : Avg = 18 us, Min = 0 us, Max = 61 us, +[IPU1-0] 270.872201 s: Source to Link Latency : Avg = 174151 us, Min = 173153 us, Max = 175593 us, +[IPU1-0] 270.872293 s: +[IPU1-0] 270.872354 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! +[IPU1-0] 270.872537 s: +[IPU1-0] 270.872598 s: ### CPU [IPU1-0], LinkID [ 34], +[IPU1-0] 270.872659 s: +[IPU1-0] 270.872720 s: [ SYNC_0 ] Link Statistics, +[IPU1-0] 270.872781 s: ****************************** +[IPU1-0] 270.872842 s: +[IPU1-0] 270.872872 s: Elapsed time = 202982 msec +[IPU1-0] 270.872933 s: +[IPU1-0] 270.872994 s: New data Recv = 36.49 fps +[IPU1-0] 270.873055 s: Get Full Buf Cb = 1.25 fps +[IPU1-0] 270.873147 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 270.873208 s: Driver/Notify Cb = 30.29 fps +[IPU1-0] 270.873299 s: +[IPU1-0] 270.873330 s: Input Statistics, +[IPU1-0] 270.873360 s: +[IPU1-0] 270.873421 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.873482 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.873574 s: -------------------------------------------------- +[IPU1-0] 270.873665 s: 0 | 5. 0 3.75 0. 0 1.25 +[IPU1-0] 270.873787 s: 1 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.873940 s: +[IPU1-0] 270.873970 s: Output Statistics, +[IPU1-0] 270.874031 s: +[IPU1-0] 270.874062 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.874123 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.874214 s: --------------------------------------------- +[IPU1-0] 270.874275 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.874397 s: +[IPU1-0] 270.874428 s: [ SYNC_0 ] LATENCY, +[IPU1-0] 270.874489 s: ******************** +[IPU1-0] 270.874733 s: Local Link Latency : Avg = 84854 us, Min = 91 us, Max = 170195 us, +[IPU1-0] 270.874855 s: Source to Link Latency : Avg = 174416 us, Min = 173397 us, Max = 175867 us, +[IPU1-0] 270.874977 s: +[IPU1-0] 270.875099 s: +[IPU1-0] 270.875129 s: ### CPU [IPU1-0], LinkID [ 1], +[IPU1-0] 270.875190 s: +[IPU1-0] 270.875251 s: [ IPC_OUT_1 ] Link Statistics, +[IPU1-0] 270.875312 s: ****************************** +[IPU1-0] 270.875373 s: +[IPU1-0] 270.875404 s: Elapsed time = 202756 msec +[IPU1-0] 270.875495 s: +[IPU1-0] 270.875556 s: New data Recv = 1.25 fps +[IPU1-0] 270.875617 s: Release data Recv = 1.25 fps +[IPU1-0] 270.875709 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 270.875770 s: +[IPU1-0] 270.875831 s: Input Statistics, +[IPU1-0] 270.875861 s: +[IPU1-0] 270.875953 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 270.876044 s: | FPS | FPS | FPS | FPS +[IPU1-0] 270.876105 s: -------------------------------------------------- +[IPU1-0] 270.876197 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 270.876410 s: +[IPU1-0] 270.876441 s: Output Statistics, +[IPU1-0] 270.876502 s: +[IPU1-0] 270.876563 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 270.876624 s: | ID | FPS | FPS | FPS +[IPU1-0] 270.876715 s: --------------------------------------------- +[IPU1-0] 270.876776 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 270.876898 s: +[IPU1-0] 270.876929 s: [ IPC_OUT_1 ] LATENCY, +[IPU1-0] 270.876990 s: ******************** +[IPU1-0] 270.877051 s: Local Link Latency : Avg = 5 us, Min = 0 us, Max = 61 us, +[IPU1-0] 270.877142 s: Source to Link Latency : Avg = 174506 us, Min = 173489 us, Max = 175959 us, +[IPU1-0] 270.877264 s: +[IPU1-0] 271.376654 s: +[IPU1-0] 271.376715 s: ### CPU [ DSP1], LinkID [ 11], +[IPU1-0] 271.376776 s: +[IPU1-0] 271.376837 s: [ IPC_IN_1 ] Link Statistics, +[IPU1-0] 271.376898 s: ****************************** +[IPU1-0] 271.376959 s: +[IPU1-0] 271.376990 s: Elapsed time = 202455 msec +[IPU1-0] 271.377051 s: +[IPU1-0] 271.377112 s: Get Full Buf Cb = 2.50 fps +[IPU1-0] 271.377173 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 271.377234 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 271.377325 s: +[IPU1-0] 271.377356 s: Input Statistics, +[IPU1-0] 271.377417 s: +[IPU1-0] 271.377447 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.377508 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.377630 s: -------------------------------------------------- +[IPU1-0] 271.377722 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.377844 s: +[IPU1-0] 271.377874 s: Output Statistics, +[IPU1-0] 271.377935 s: +[IPU1-0] 271.377966 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.378027 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.378118 s: --------------------------------------------- +[IPU1-0] 271.378179 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 271.378301 s: +[IPU1-0] 271.378332 s: [ IPC_IN_1 ] LATENCY, +[IPU1-0] 271.378393 s: ******************** +[IPU1-0] 271.378454 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 31 us, +[IPU1-0] 271.378576 s: Source to Link Latency : Avg = 174649 us, Min = 173641 us, Max = 176111 us, +[IPU1-0] 271.378698 s: +[IPU1-0] 271.378820 s: +[IPU1-0] 271.378850 s: ### CPU [ DSP1], LinkID [ 50], +[IPU1-0] 271.378911 s: +[IPU1-0] 271.378942 s: [ ALG_TIOP ] Link Statistics, +[IPU1-0] 271.379033 s: ****************************** +[IPU1-0] 271.379064 s: +[IPU1-0] 271.379125 s: Elapsed time = 202457 msec +[IPU1-0] 271.379186 s: +[IPU1-0] 271.379216 s: New data Recv = 2.50 fps +[IPU1-0] 271.379308 s: +[IPU1-0] 271.379338 s: Input Statistics, +[IPU1-0] 271.379369 s: +[IPU1-0] 271.379430 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.379491 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.379765 s: -------------------------------------------------- +[IPU1-0] 271.379857 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.379979 s: +[IPU1-0] 271.380009 s: Output Statistics, +[IPU1-0] 271.380070 s: +[IPU1-0] 271.380101 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.380223 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.380314 s: --------------------------------------------- +[IPU1-0] 271.380375 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 271.380497 s: +[IPU1-0] 271.380558 s: [ ALG_TIOP ] LATENCY, +[IPU1-0] 271.380619 s: ******************** +[IPU1-0] 271.380680 s: Local Link Latency : Avg = 631 us, Min = 457 us, Max = 1708 us, +[IPU1-0] 271.380802 s: Source to Link Latency : Avg = 175267 us, Min = 174129 us, Max = 176905 us, +[IPU1-0] 271.380894 s: +[IPU1-0] 271.381016 s: +[IPU1-0] 271.381046 s: ### CPU [ DSP1], LinkID [ 1], +[IPU1-0] 271.381107 s: +[IPU1-0] 271.381168 s: [ IPC_OUT_1 ] Link Statistics, +[IPU1-0] 271.381229 s: ****************************** +[IPU1-0] 271.381290 s: +[IPU1-0] 271.381321 s: Elapsed time = 202460 msec +[IPU1-0] 271.381382 s: +[IPU1-0] 271.381443 s: New data Recv = 1.25 fps +[IPU1-0] 271.381504 s: Release data Recv = 1.25 fps +[IPU1-0] 271.381595 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 271.381656 s: +[IPU1-0] 271.381717 s: Input Statistics, +[IPU1-0] 271.381748 s: +[IPU1-0] 271.381809 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.381870 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.381961 s: -------------------------------------------------- +[IPU1-0] 271.382022 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.382144 s: +[IPU1-0] 271.382175 s: Output Statistics, +[IPU1-0] 271.382236 s: +[IPU1-0] 271.382266 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.382358 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.382419 s: --------------------------------------------- +[IPU1-0] 271.382510 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 271.382632 s: +[IPU1-0] 271.382693 s: [ IPC_OUT_1 ] LATENCY, +[IPU1-0] 271.382754 s: ******************** +[IPU1-0] 271.382815 s: Local Link Latency : Avg = 3 us, Min = 0 us, Max = 31 us, +[IPU1-0] 271.382907 s: Source to Link Latency : Avg = 175330 us, Min = 174190 us, Max = 176966 us, +[IPU1-0] 271.383029 s: +[IPU1-0] 271.882663 s: +[IPU1-0] 271.882724 s: ### CPU [IPU1-0], LinkID [ 11], +[IPU1-0] 271.882815 s: +[IPU1-0] 271.882846 s: [ IPC_IN_1 ] Link Statistics, +[IPU1-0] 271.882907 s: ****************************** +[IPU1-0] 271.883029 s: +[IPU1-0] 271.883090 s: Elapsed time = 202961 msec +[IPU1-0] 271.883151 s: +[IPU1-0] 271.883181 s: Get Full Buf Cb = 1.25 fps +[IPU1-0] 271.883273 s: Put Empty Buf Cb = 1.25 fps +[IPU1-0] 271.883334 s: Driver/Notify Cb = 34.58 fps +[IPU1-0] 271.883395 s: +[IPU1-0] 271.883456 s: Input Statistics, +[IPU1-0] 271.883486 s: +[IPU1-0] 271.883517 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.883639 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.883730 s: -------------------------------------------------- +[IPU1-0] 271.883791 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.883913 s: +[IPU1-0] 271.883974 s: Output Statistics, +[IPU1-0] 271.884005 s: +[IPU1-0] 271.884035 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.884127 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.884188 s: --------------------------------------------- +[IPU1-0] 271.884279 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 271.884371 s: +[IPU1-0] 271.884432 s: [ IPC_IN_1 ] LATENCY, +[IPU1-0] 271.884493 s: ******************** +[IPU1-0] 271.884523 s: Local Link Latency : Avg = 37 us, Min = 30 us, Max = 91 us, +[IPU1-0] 271.884828 s: Source to Link Latency : Avg = 175585 us, Min = 174434 us, Max = 177210 us, +[IPU1-0] 271.884950 s: +[IPU1-0] 271.885072 s: +[IPU1-0] 271.885103 s: ### CPU [IPU1-0], LinkID [ 49], +[IPU1-0] 271.885194 s: +[IPU1-0] 271.885225 s: [ ALG_OBJECT_DRAW ] Link Statistics, +[IPU1-0] 271.885286 s: ****************************** +[IPU1-0] 271.885347 s: +[IPU1-0] 271.885377 s: Elapsed time = 202963 msec +[IPU1-0] 271.885469 s: +[IPU1-0] 271.885499 s: New data Recv = 1.25 fps +[IPU1-0] 271.885591 s: +[IPU1-0] 271.885652 s: Input Statistics, +[IPU1-0] 271.885682 s: +[IPU1-0] 271.885713 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.885804 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.885865 s: -------------------------------------------------- +[IPU1-0] 271.885957 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.886079 s: +[IPU1-0] 271.886140 s: Output Statistics, +[IPU1-0] 271.886170 s: +[IPU1-0] 271.886201 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.886292 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.886353 s: --------------------------------------------- +[IPU1-0] 271.886445 s: 0 | 0 1.25 0. 0 0. 0 +[IPU1-0] 271.886567 s: +[IPU1-0] 271.886628 s: [ ALG_OBJECT_DRAW ] LATENCY, +[IPU1-0] 271.886689 s: ******************** +[IPU1-0] 271.886750 s: Local Link Latency : Avg = 730 us, Min = 396 us, Max = 1921 us, +[IPU1-0] 271.886872 s: Source to Link Latency : Avg = 176446 us, Min = 175044 us, Max = 178705 us, +[IPU1-0] 271.886963 s: +[IPU1-0] 271.887085 s: +[IPU1-0] 271.887116 s: ### CPU [IPU1-0], LinkID [ 77], +[IPU1-0] 271.887207 s: +[IPU1-0] 271.887238 s: [ DISPLAY ] Link Statistics, +[IPU1-0] 271.887299 s: ****************************** +[IPU1-0] 271.887360 s: +[IPU1-0] 271.887390 s: Elapsed time = 202965 msec +[IPU1-0] 271.887482 s: +[IPU1-0] 271.887512 s: New data Recv = 1.25 fps +[IPU1-0] 271.887604 s: Driver/Notify Cb = 60.3 fps +[IPU1-0] 271.887695 s: +[IPU1-0] 271.887726 s: Input Statistics, +[IPU1-0] 271.887787 s: +[IPU1-0] 271.887817 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.887939 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.888031 s: -------------------------------------------------- +[IPU1-0] 271.888122 s: 0 | 1.25 0. 0 0. 0 1.25 +[IPU1-0] 271.888244 s: +[IPU1-0] 271.888275 s: Output Statistics, +[IPU1-0] 271.888336 s: +[IPU1-0] 271.888366 s: CH | Out | Out | Out Drop | Out User Drop +[IPU1-0] 271.888427 s: | ID | FPS | FPS | FPS +[IPU1-0] 271.888519 s: --------------------------------------------- +[IPU1-0] 271.888610 s: +[IPU1-0] 271.888671 s: [ DISPLAY ] LATENCY, +[IPU1-0] 271.888732 s: ******************** +[IPU1-0] 271.888763 s: Local Link Latency : Avg = 50 us, Min = 30 us, Max = 427 us, +[IPU1-0] 271.888885 s: Source to Link Latency : Avg = 176619 us, Min = 175197 us, Max = 178857 us, +[IPU1-0] 271.889007 s: +[IPU1-0] 271.889038 s: Display UnderFlow Count = 0 +[IPU1-0] 271.889099 s: +[IPU1-0] 271.889160 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! +[IPU1-0] 271.889312 s: +[IPU1-0] 271.889373 s: ### CPU [IPU1-0], LinkID [ 78], +[IPU1-0] 271.889434 s: +[IPU1-0] 271.889465 s: [ DISPLAY ] Link Statistics, +[IPU1-0] 271.889709 s: ****************************** +[IPU1-0] 271.889800 s: +[IPU1-0] 271.889831 s: Elapsed time = 251358 msec +[IPU1-0] 271.889892 s: +[IPU1-0] 271.889922 s: Driver/Notify Cb = 60.2 fps +[IPU1-0] 271.890014 s: +[IPU1-0] 271.890044 s: Input Statistics, +[IPU1-0] 271.890105 s: +[IPU1-0] 271.890136 s: CH | In Recv | In Drop | In User Drop | In Process +[IPU1-0] 271.890227 s: | FPS | FPS | FPS | FPS +[IPU1-0] 271.890288 s: -------------------------------------------------- +[IPU1-0] 271.890380 s: 0 | 0. 0 0. 0 0. 0 0. 0 +[IPU1-0] 271.890502 s: +[IPU1-0] 271.890532 s: [ DISPLAY ] LATENCY, +[IPU1-0] 271.890624 s: ******************** +[IPU1-0] 271.890685 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, +[IPU1-0] 271.890807 s: Source to Link Latency : Avg = 23577 us, Min = 23577 us, Max = 23577 us, +[IPU1-0] 271.890898 s: +[IPU1-0] 271.890959 s: Display UnderFlow Count = 0 +[IPU1-0] 271.891020 s: +[IPU1-0] 272.390593 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Chains Run-time Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 0: Stop Chain +[IPU1-0] +[IPU1-0] 1: Pause Chain +[IPU1-0] 2: Resume Chain +[IPU1-0] +[IPU1-0] p: Print Statistics +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 273.530866 s: cpuload 0 +[IPU1-0] 273.530927 s: cpuload 2 +[IPU1-0] 276.735008 s: cpuload 0 +[IPU1-0] 276.735100 s: cpuload 2 2. "...where exactly tidlPrecproc link is dropping frames at input end and output" How to get this information? Can you give me some hints? Thank you, Gary + +Hi, You can check the process function of tidlprecproc link and inside that there will be multiple places where it will drop frames. Please check that. Regards, Anuj + +Hi, Its been long since any update on this threads. I hope the issue is resolved. if not then please reply below or create a new thread for different issue. Regards, Anuj + diff --git a/data2/text/range/30001+/858638.txt b/data2/text/range/30001+/858638.txt new file mode 100644 index 0000000000000000000000000000000000000000..e6ba4ad5b7911b1d6d926b59d6f14afb04b91a94 --- /dev/null +++ b/data2/text/range/30001+/858638.txt @@ -0,0 +1,486 @@ +Ticket Name: TDA2SX: Regarding the NTSC camera ADV7182 chip + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, TVP5158 Hi, I'm working on custom board with TDA2SX processor,In my board we are using the adv7182 Analog NTSC. I'm facing the issue like below. root@dra7xx-evm:~# dmesg | grep adv [ 0.563399] i2c i2c-0: Failed to register i2c client adv7180 at 0x21 (-16) [ 0.563410] i2c i2c-0: of_i2c: Failure registering /ocp/i2c@48070000/adv7180@21 [ 3.086968] systemd[1]: System time before build time, advancing clock. root@dra7xx-evm:~# i2cdetect -y -r 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- 09 -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- 28 -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- UU -- -- -- -- -- -- -- 50: -- -- -- -- 54 -- -- -- UU UU UU 5b 5c -- -- -- 60: -- -- -- -- -- -- -- -- -- -- UU -- -- -- -- -- 70: -- -- -- -- -- -- -- -- The NTSC is connected via i2c1 with slave address as 0x21. here is my dts information, &i2c1{ status = "okay"; clock-frequency = <400000>; adv7180@21 { compatible = "adi,adv7180"; reg = <0x21>; status = "okay"; port { adv7180_1: endpoint{ remore-endpoint=<&vin3a>; }; }; }; }; &vip1 { status = "okay"; }; &vin2b { status = "okay"; endpoint@0 { slave-mode; remote-endpoint = <&adv7180_1>; }; }; Please help me to solve this issue. Thanks & Regards, A.Kavya Harini + +Responses: +Hi, I believe you want to use the camera from Linux driver (not from the RTOS driver, which is typical for TDA2 platforms) Please confirm if this is correct. From the kernel log, I can see that the adv7180 driver has failed with error code -16 (EBUSY) You can check the i2c subdevice driver for adv7180 about why this failure occured. Also, the fact that i2cdetect does not show the device 0x21 indicates that the chip is not responding to i2c transactions with chip address = 0x21 Please confirm if the address is correct Also, if you need to driver any GPIOs to turn on the decoder, you should do that based on your board design. Regards, Nikhil D + +Hi Nikhil, I believe you want to use the camera from Linux driver (not from the RTOS driver, which is typical for TDA2 platforms) YES Now,I am able to load the ADV7180 driver. But while loading the driver,I am getting below issue. insmod adv7180.ko adv7180 0-0021: chip found @ 0x21 (OMAP I2C adapter) [ 37.543365] omap_i2c 48070000.i2c: controller timed out [ 37.594780] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 37.600992] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm Manually also I try to write value 80 into 0x0f register by using i2cset command,I am getting same i2c timeout problem. Before load the ADV7180 driver,I need to load any other dependency drivers ? Could you please help me to solve this issue. Regards, Kavya. + +Hi Kavya, The i2c controller timeout happens when the external device does not respond to the commands. This might be because the address you have specified in DT is not correct or the adv device is in reset and not responding to any i2c commands. Check your board schematics if you need to get the ADV out of reset. Regards, Nikhil D + +Hi Nikhil, I am able to read and write the registers. root@dra7xx-evm:~# i2cget -f -y 0 0x21 0x00 b 0x0e root@dra7xx-evm:~# i2cset -f -y 0 0x21 0x00 0 b root@dra7xx-evm:~# i2cget -f -y 0 0x21 0x00 b 0x00 root@dra7xx-evm:~# i2cset -y -r 0 0x21 0x0f 0x80 b \\ for this register only I am getting time out error. [ 800.403403] omap_i2c 48070000.i2c: controller timed out Error: Write failed root@dra7xx-evm:~# i2cget -f -y 0 0x21 0x00 b 0x0e root@dra7xx-evm:~# Reset and powerdown I am handling though GPIO's by using sysfs. As per the datasheet after successful reset,all the register values goes to their default value,as per above i2c commands It is happened. But,after loading the adv7180 I am not seen any video node in /dev Could you please help me to solve this problem. Regards, Kavya. + +Hi Kavya, The problem is not with the TI VIP driver. It will register the /dev/video device if the external camera driver (in this case adv driver) implements all the subdevice calls and returns success to all of them. You are getting a timeout as part of probe, and also confirmed by directly read/write. The timeout is caused because the chip is responding to the i2c master. You might want to check the i2c speed and try reducing it so as to support this sensor. You can go from 400khz to 100khz. See if that helps. Regards, Nikhil D + +Hi Nikhil, Thanks for the reply. After reducing the i2c speed from 400khz(default) to 100khz in the dts.Now, I'm able to load the driver without time-out issue. I followed the procedure like below to load the NTSC camera driver : root@dra7xx-evm:~# insmod ti-vpdma.ko root@dra7xx-evm:~# insmod ti-csc.ko root@dra7xx-evm:~# insmod ti-sc.ko root@dra7xx-evm:~# insmod ti-vip.ko root@dra7xx-evm:~# insmod adv7180.ko While loading the drivers i'm not getting any debug messages,I checked in /dev node there is no video port in /dev. Please help me to get the node & to capture the data from camera. Note: we are using adv7182 chip in our custom board.Is this adv7180.ko supports this chip? Thanks, kavya + +Hi Kavya, Refer to this app note https://www.ti.com/lit/an/spracd8/spracd8.pdf You will have to modify the device tree and the kernel subdevice driver for linking VIP and adv Regards, Nikhil D + +Hi Nikhil, We are using the vin2b 8-bit data lines.vin2b is configured under vip1. Please find the below dts information we are using. &i2c1{ status = okay; adv7180@20 { compatible = "adi,adv7180"; reg = <0x21>; status = "okay"; port { adv7182: endpoint{ status = "okay"; remote-endpoint=<&vin2b>; }; }; }; }; &vip1 { status = "okay"; }; /* composite video input */ &vin2b { status = "okay"; endpoint@0 { status = "okay"; slave-mode; remote-endpoint = <&adv7182>; bus_width = <8>; }; }; In vip driver probe, we added the printk but we are not getting any debug messages after loading the driver(we tried as static & modules).It didn't work,I'm wondering why it's not showing atleast printk messages also. Please check once our dts info wether it is correct or not? If it is correct then guide me how to solve the issue. Thanks, kavya + +Hi Nikhil, Now we are able to see the debug messages but i'm not getting the /dev/video* node. root@dra7xx-evm:~#dmesg | grep vip [ 2.092434] vip 48970000.vip: sc_create_inst [ 2.092450] vip 48970000.vip: csc_create [ 2.092823] vip 48970000.vip: sc_create_inst [ 2.092838] vip 48970000.vip: csc_create [ 2.100040] vip 48970000.vip: vpdma_create [ 2.100059] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.105766] vip 48970000.vip: firmware callback [ 2.123678] vip 48970000.vip: VPDMA firmware loaded [ 32.441003] vip1-s1: Port B: Using subdev adv7180 0-0021 for capture Driver is loaded properly & adv7180 is also detected.But node is not created.Please help me. Thanks, kavya + +Hi Nikhil, Finally we got the /dev/video0 node. But unable to open the node. Please find the log. root@dra7xx-evm:~# cat /dev/video0 cat: can't open '/dev/video0': No such device root@dra7xx-evm:~# dmesg | grep vip vip_probe [ 2.102665] vip 48970000.vip: sc_create_inst [ 2.102681] vip 48970000.vip: csc_create [ 2.103055] vip 48970000.vip: sc_create_inst [ 2.103070] vip 48970000.vip: csc_create [ 2.110269] vip 48970000.vip: vpdma_create [ 2.110289] vip 48970000.vip: loading firmware vpdma-1b8.bin [ 2.115995] vip 48970000.vip: firmware callback [ 2.133914] vip 48970000.vip: VPDMA firmware loaded [ 33.284856] vip1-s1: Port B: Using subdev adv7180 0-0021 for capture [ 33.292636] vip1-s1: device registered as video0 root@dra7xx-evm:~# Please help me to solve this issue. Thanks, kavya + +HI Kavya, This is because the subdevice driver (adv) is returning ENODEV as part of the subdev ioctls. Please review the driver where it is returning ENODEV. Regards, Nikhil D + +Hi Nikhil, Thanks for the quick reply. May i know,why adv7180 giving ENODEV error ? Regards, Kavya. + +Hi, I would want you to debug that. TI supports neither hardware or software for the adv devices. I suggest you read through the driver to find out where it is failing the subdev API. Any failed subdev API will result into ENODEV being returned by ti-vip driver. You can enable the debug logs in ti-vip by passing additional kernel command line parameter ti_vip.debug=8 Regards, Nikhil D + +Hi Nikhil, After debugging in to the driver, we are able to solve the ENODEV error.To solve the ENODEV error we added the below patch in the vip.c static int vip_calc_format_size(struct vip_port *port, } field = &f->fmt.pix.field; - if (*field == V4L2_FIELD_ANY) + //if (*field == V4L2_FIELD_ANY) + switch (*field) { + case V4L2_FIELD_ANY: *field = V4L2_FIELD_NONE; - else if (V4L2_FIELD_NONE != *field && V4L2_FIELD_ALTERNATE != *field) +// else if (V4L2_FIELD_NONE != *field && V4L2_FIELD_ALTERNATE != *field) + break; + case V4L2_FIELD_NONE: + case V4L2_FIELD_ALTERNATE: + case V4L2_FIELD_INTERLACED: + break; + default: Now, we are facing kernel crash while capturing from using the command yavta.Please find the attached log for dmesg and kernel crash log. vip.txt root@dra7xx-evm:~#yavta /dev/video0 -c10 -fUYVY -Fvout_test.yuv -s720x576 +Device /dev/video0 opened. +Device `vip' on `platform:vip' is a video output (without mplanes) device.[ 50.089373] ------------[ cut here ]------------ + +Video format set: UYVY (59565955) 128x128 (stride 256) field none buffer size 32768 +Video format: UYVY (59565955) 128x128 (stride 256) field none buffer size 32768 +8 buffers requested. +length: 32768 offset: 0 timestamp type/source: mono/EoF +Buffer 0/0 mapped at address 0xb6fdf000. +length: 32768 offset: 32768 timestamp type/source: mono/EoF +Buffer 1/0 mapped at address 0xb6ea1000. +length: 32768 offset: 65536 timestamp type/source: mono/EoF +Buffer 2/0 mapped at address 0xb6e99000. +length: 32768 offset: 98304 timestamp type/source: mono/EoF +Buffer 3/0 mapped at address 0xb6e91000. +length: 32768 offset: 131072 timestamp type/source: mono/EoF +Buffer 4/0 mapped at address 0xb6e89000. +length: 32768 offset: 163840 timestamp type/source: mono/EoF +Buffer 5/0 mapped at address 0xb6e81000. +length: 32768 offset: 196608 timestamp type/source: mono/EoF +Buffer 6/0 mapped at address 0xb6e79000. +length: 32768 offset: 229376 timestamp type/source: mono/EoF +Buffer 7/0 mapped at address 0xb6e71000. +0.101242] WARNING: CPU: 1 PID: 956 at drivers/media/v4l2-core/videobuf2-core.c:1315 vb2_start_streaming+0xe0/0x15c() +[ 50.199675] Modules linked in: adv7180 bc_example(O) rpmsg_proto xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 virtio_rpmsg_bus ah4 af_key xfrm_algo bluetooth ahci_p +latform libahci_platform pvrsrvkm(O) libahci libata c_can_platform extcon_usb_gpio c_can omap_aes_driver scsi_mod can_dev omap_sham dwc3_omap extcon rtc_omap omap_rng om +ap_des rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel +[ 50.236221] CPU: 1 PID: 956 Comm: yavta Tainted: G W O 4.4.84-00031-g9bee036-dirty #190 +[ 50.245217] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 50.251334] Backtrace: +[ 50.253808] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 50.261407] r7:c04ac55c r6:600f0013 r5:00000000 r4:c09b5590 +[ 50.267130] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 50.274387] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 50.282510] r7:c04ac55c r6:00000523 r5:00000009 r4:00000000 +[ 50.288228] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x24/0x2c) +[ 50.297047] r8:c09d0964 r7:fffffdfd r6:edf5f87c r5:edf5fad0 r4:edf5f9d8 +[ 50.303821] [] (warn_slowpath_null) from [] (vb2_start_streaming+0xe0/0x15c) +[ 50.312648] [] (vb2_start_streaming) from [] (vb2_core_streamon+0x114/0x160) +[ 50.321469] r7:c0498b80 r6:ee6d1000 r5:edc82300 r4:edf5f87c +[ 50.327189] [] (vb2_core_streamon) from [] (vb2_streamon+0x38/0x58) +[ 50.335223] r5:edc82300 r4:00000001 +[ 50.338830] [] (vb2_streamon) from [] (vb2_ioctl_streamon+0x44/0x48) +[ 50.346962] [] (vb2_ioctl_streamon) from [] (v4l_streamon+0x24/0x28) +[ 50.355084] r5:40045612 r4:c04affd8 +[ 50.358696] [] (v4l_streamon) from [] (__video_do_ioctl+0x2c0/0x334) +[ 50.366818] r5:40045612 r4:00000001 +[ 50.370427] [] (__video_do_ioctl) from [] (video_usercopy+0x1d0/0x4fc) +[ 50.378723] r10:edcf1e30 r9:bec0270c r8:00000001 r7:00000000 r6:00000004 r5:00000004 +[ 50.386624] r4:40045612 +[ 50.389178] [] (video_usercopy) from [] (video_ioctl2+0x18/0x1c) +[ 50.396952] r10:00000000 r9:edcf0000 r8:eeac10cc r7:bec0270c r6:40045612 r5:edc82300 +[ 50.404854] r4:ee6d1000 +[ 50.407407] [] (video_ioctl2) from [] (v4l2_ioctl+0xa8/0xe0) +[ 50.414839] [] (v4l2_ioctl) from [] (do_vfs_ioctl+0x460/0x6dc) +[ 50.422439] r9:edcf0000 r8:bec0270c r7:00000003 r6:edc82300 r5:d8c2c4c0 r4:bec0270c +[ 50.430262] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x3c/0x64) +[ 50.437600] r10:00000000 r9:edcf0000 r8:bec0270c r7:40045612 r6:edc82300 r5:00000003 +[ 50.445499] r4:edc82300 +[ 50.448053] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x3c) +[ 50.455653] r9:edcf0000 r8:c000fe24 r7:00000036 r6:0002736c r5:00000000 r4:00000008 +[ 50.463535] ---[ end trace 8fa707bf247eebb8 ]--- +Unable to start streaming: Inappropriate ioctl for device (25). +8 buffers released. +root@dra7xx-evm:~# dmesg | grep vip +[ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=ac319478-02 rw rootwait ip=none mem=1024M ti_vip.debug=8 +[ 2.096169] vip1-s0: vip_set_slice_path: +[ 2.096181] vip1-s0: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000 +[ 2.096198] vip 48970000.vip: sc_create_inst +[ 2.096213] vip 48970000.vip: csc_create +[ 2.096578] vip1-s1: vip_set_slice_path: +[ 2.096589] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80008000 +[ 2.096605] vip 48970000.vip: sc_create_inst +[ 2.096620] vip 48970000.vip: csc_create +[ 2.096633] vip 48970000.vip: vpdma_create +[ 2.096651] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 2.102342] vip 48970000.vip: firmware callback +[ 2.115035] vip 48970000.vip: VPDMA firmware loaded +[ 2.119999] vip1-s0: can't get next endpoint: loop: 1 +[ 2.120007] vip1-s0: register async notifier for 1 subdevs +[ 2.120073] vip1-s1: can't get next endpoint: loop: 1 +[ 2.120080] vip1-s1: register async notifier for 1 subdevs +[ 47.365057] vip1-s1: vip_async_bound +[ 47.365068] vip1-s1: Port B: Using subdev adv7180 0-0021 for capture +[ 47.371453] vip1-s1: subdev adv7180 0-0021: code: 2006 idx: 0 +[ 47.371462] vip1-s1: matched fourcc: NV12: code: 2006 idx: 0 +[ 47.371470] vip1-s1: matched fourcc: UYVY: code: 2006 idx: 1 +[ 47.371478] vip1-s1: matched fourcc: YUYV: code: 2006 idx: 2 +[ 47.371485] vip1-s1: matched fourcc: VYUY: code: 2006 idx: 3 +[ 47.371492] vip1-s1: matched fourcc: YVYU: code: 2006 idx: 4 +[ 47.371499] vip1-s1: matched fourcc: RGB3: code: 2006 idx: 5 +[ 47.371506] vip1-s1: matched fourcc: RGB4: code: 2006 idx: 6 +[ 47.371512] vip1-s1: matched fourcc: BGR3: code: 2006 idx: 7 +[ 47.371519] vip1-s1: matched fourcc: BGR4: code: 2006 idx: 8 +[ 47.372741] vip1-s1: device registered as video0 +[ 47.377896] vip1-s1: vip_async_complete +[ 47.387612] vip1-s1: vip_open +[ 47.387635] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x576 +[ 47.387650] vip1-s1: calc_format_size: fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 47.387660] vip1-s1: init_stream fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 47.387668] vip1-s1: init_stream vpdma data type: 0x02 +[ 47.387678] vip1-s1: vip_init_stream: stream instance 0xedf5f000 +[ 47.387685] vip1-s1: + vip_open sucess +[ 47.387766] vip1-s1: vip_release +[ 47.387780] vip1-s1: vip_release_stream: stream instance 0xedf5f000 +[ 47.387789] vip1-s1: vip_release_port: port instance 0xeead1c10 +[ 50.086399] vip1-s1: vip_open +[ 50.086422] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x576 +[ 50.086438] vip1-s1: calc_format_size: fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 50.086447] vip1-s1: init_stream fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 50.086455] vip1-s1: init_stream vpdma data type: 0x02 +[ 50.086464] vip1-s1: vip_init_stream: stream instance 0xedf5f000 +[ 50.086470] vip1-s1: + vip_open sucess +[ 50.086621] vip1-s1: s_fmt input fourcc:UYVY size: 720x576 +[ 50.086630] vip1-s1: try_fmt fourcc:UYVY size: 720x576 +[ 50.086639] vip1-s1: try_fmt best subdev size: 0x0 +[ 50.086647] vip1-s1: calc_format_size: fourcc:UYVY size: 128x128 bpl:256 img_size:32768 +[ 50.086654] vip1-s1: s_fmt try_fmt fourcc:UYVY size: 128x128 +[ 50.086662] vip1-s1: s_fmt fourcc:UYVY size: 128x128 bpl:256 img_size:32768 +[ 50.086670] vip1-s1: s_fmt pix_to_mbus mbus_code: 2006 size: 0x0 +[ 50.086678] vip1-s1: s_fmt subdev fmt mbus_code: 2006 size: 720x576 +[ 50.086684] vip1-s1: s_fmt vpdma data type: 0x27 +[ 50.086716] vip1-s1: g_fmt fourcc:UYVY code: 2006 size: 128x128 bpl:256 img_size:32768 +[ 50.086723] vip1-s1: g_fmt vpdma data type: 0x27 +[ 50.086754] vip1-s1: get 8 buffer(s) of size 32768 each. +[ 50.087757] vip 48970000.vip: hs config: src_w = 720, dst_w = 128, decimation = 4x, lin_acc_inc = 0168d1a3 +[ 50.087772] vip 48970000.vip: vs config(RAV): src_h = 576, dst_h = 128, factor = 227, acc_init = 00000155, acc_init_b = 00000000 +[ 50.087804] vip1-s1: Added mmr_adb config desc +[ 50.087841] vip1-s1: Added sc_coeff_h config desc +[ 50.087878] vip1-s1: Added sc_coeff_v config desc +[ 50.087884] vip1-s1: CFD_SC_CLIENT 8 slice_id: 1 +[ 50.087890] vip1-s1: Submitting desc on list# 0 +[ 50.089026] vip1-s1: vip_set_slice_path: +[ 50.089036] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 20000018 +[ 50.089043] vip1-s1: vip_set_slice_path: +[ 50.089050] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 70001018 +[ 50.089056] vip1-s1: vip_set_slice_path: +[ 50.089064] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 90011018 +[ 50.089070] vip1-s1: vip_set_slice_path: +[ 50.089077] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): A0031018 +[ 50.089083] vip1-s1: vip_set_slice_path: +[ 50.089091] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 50031018 +[ 50.089366] vip1-s1: stream on failed in subdev +[ 50.468531] vip1-s1: vip_release +[ 50.468545] vip1-s1: vip_release_stream: stream instance 0xedf5f000 +[ 50.468554] vip1-s1: vip_release_port: port instance 0xeead1c10 + + Thanks, Kavya. + +Hi Kavya, You should not need to change anything in the VIP driver. It supports all types of video devices in generic way. A video source should not provide the FIELD_INTERLACED as format. The expected value is FIELD_ALTERNATE. You should modify the adv driver to report correct field value. Regards, Nikhil D + +Hi Nikhil, I had enable below debugs echo 3 >/sys/class/video4linux/video1/dev_debug echo 3 > /sys/module/videobuf2_core/parameters/debug I got below error, vip1-s1: stream on failed in subdev [ 62.322583] vb2: vb2_start_streaming: driver refused to start streaming For more details,please find the attached error.txt. 4812.error.txt [ 23.525232] adv7180 0-0021: chip found @ 0x21 (OMAP I2C adapter) +[ 23.544910] vip1-s1: vip_async_bound +[ 23.544922] vip1-s1: Port B: Using subdev adv7180 0-0021 for capture +[ 23.551305] vip1-s1: subdev adv7180 0-0021: code: 2006 idx: 0 +[ 23.551314] vip1-s1: matched fourcc: NV12: code: 2006 idx: 0 +[ 23.551322] vip1-s1: matched fourcc: UYVY: code: 2006 idx: 1 +[ 23.551330] vip1-s1: matched fourcc: YUYV: code: 2006 idx: 2 +[ 23.551337] vip1-s1: matched fourcc: VYUY: code: 2006 idx: 3 +[ 23.551343] vip1-s1: matched fourcc: YVYU: code: 2006 idx: 4 +[ 23.551350] vip1-s1: matched fourcc: RGB3: code: 2006 idx: 5 +[ 23.551357] vip1-s1: matched fourcc: RGB4: code: 2006 idx: 6 +[ 23.551364] vip1-s1: matched fourcc: BGR3: code: 2006 idx: 7 +[ 23.551370] vip1-s1: matched fourcc: BGR4: code: 2006 idx: 8 +[ 23.552737] vip1-s1: device registered as video0 +[ 23.557881] vip1-s1: vip_async_complete +[ 23.564302] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 23.566494] vip1-s1: vip_open +[ 23.566509] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x480 +[ 23.566519] vip1-s1: calc_format_size: fourcc:NV12 size: 720x480 bpl:720 img_size:518400 +[ 23.566523] vip1-s1: init_stream fourcc:NV12 size: 720x480 bpl:720 img_size:518400 +[ 23.566526] vip1-s1: init_stream vpdma data type: 0x02 +[ 23.566531] vip1-s1: vip_init_stream: stream instance 0xee59c000 +[ 23.566638] vip1-s1: vip_release +[ 23.566646] vip1-s1: vip_release_stream: stream instance 0xee59c000 +[ 23.566650] vip1-s1: vip_release_port: port instance 0xeead5c10 +[ 23.573209] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 23.580254] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 62.210007] vip1-s1: vip_open +[ 62.210030] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x480 +[ 62.210044] vip1-s1: calc_format_size: fourcc:NV12 size: 720x480 bpl:720 img_size:518400 +[ 62.210053] vip1-s1: init_stream fourcc:NV12 size: 720x480 bpl:720 img_size:518400 +[ 62.210060] vip1-s1: init_stream vpdma data type: 0x02 +[ 62.210069] vip1-s1: vip_init_stream: stream instance 0xee59c000 +[ 62.210086] video0: VIDIOC_QUERYCAP: driver=vip, card=vip, bus=platform:vip, version=0x00040454, capabilities=0x85200001, device_caps=0x05200001 +[ 62.210115] video0: VIDIOC_CROPCAP: type=vid-cap, bounds wxh=720x480, x,y=0,0, defrect wxh=720x480, x,y=0,0, pixelaspect 1/1 +[ 62.210142] vip1-s1: cropped (0,0)/720x480 of 720x480 +[ 62.210148] video0: VIDIOC_S_CROP: type=vid-cap, wxh=720x480, x,y=0,0 +[ 62.210172] vip1-s1: g_fmt fourcc:NV12 code: 2006 size: 720x480 bpl:720 img_size:518400 +[ 62.210179] vip1-s1: g_fmt vpdma data type: 0x02 +[ 62.210185] video0: VIDIOC_G_FMT: type=vid-cap, width=720, height=480, pixelformat=NV12, field=interlaced, bytesperline=720, sizeimage=518400, colorspace=1, flags=0x0 +[ 62.210219] vip1-s1: get 4 buffer(s) of size 518400 each. +[ 62.212019] vb2: __setup_offsets: buffer 0, plane 0 offset 0x00000000 +[ 62.230638] vb2: __setup_offsets: buffer 1, plane 0 offset 0x0007f000 +[ 62.237163] vb2: __setup_offsets: buffer 2, plane 0 offset 0x000fe000 +[ 62.245339] vb2: __setup_offsets: buffer 3, plane 0 offset 0x0017d000 +[ 62.251810] vb2: __vb2_queue_alloc: allocated 4 buffers, 1 plane(s) each +[ 62.260211] video0: VIDIOC_REQBUFS: count=4, type=vid-cap, memory=mmap +[ 62.260403] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=0, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x0, 0 +[ 62.260433] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 62.260459] vb2: vb2_mmap: buffer 0, plane 0 successfully mapped +[ 62.269672] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=1, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x7f00 +[ 62.269703] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 62.269729] vb2: vb2_mmap: buffer 1, plane 0 successfully mapped +[ 62.278177] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=2, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0xfe00 +[ 62.278207] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 62.278229] vb2: vb2_mmap: buffer 2, plane 0 successfully mapped +[ 62.286686] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=3, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x17d0 +[ 62.286715] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 62.286737] vb2: vb2_mmap: buffer 3, plane 0 successfully mapped +[ 62.292780] vb2: vb2_core_qbuf: qbuf of buffer 0 succeeded +[ 62.298364] vb2: vb2_core_qbuf: qbuf of buffer 1 succeeded +[ 62.304046] vb2: vb2_core_qbuf: qbuf of buffer 2 succeeded +[ 62.309559] vb2: vb2_core_qbuf: qbuf of buffer 3 succeeded +[ 62.315117] vip1-s1: vip_set_slice_path: +[ 62.315128] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 70004000 +[ 62.315136] vip1-s1: vip_set_slice_path: +[ 62.315144] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): A0004000 +[ 62.315154] vip1-s1: vip_set_slice_path: +[ 62.315171] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80004000 +[ 62.315178] vip1-s1: vip_set_slice_path: +[ 62.315185] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 40004000 +[ 62.322573] vip1-s1: stream on failed in subdev +[ 62.322583] vb2: vb2_start_streaming: driver refused to start streaming +[ 62.330803] ------------[ cut here ]------------ +[ 62.336275] WARNING: CPU: 0 PID: 952 at drivers/media/v4l2-core/videobuf2-core.c:1315 vb2_start_streaming+0xe0/0x15c() +[ 62.347847] Modules linked in: adv7180 bc_example(O) rpmsg_proto xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 virtio_rpmsg_bus ah4 af_key xfrm_algo bluetooth pvrsrl +[ 62.384457] CPU: 1 PID: 952 Comm: capure Tainted: G O 4.4.84-00031-g9bee036-dirty #210 +[ 62.393541] Hardware name: Generic DRA74X (Flattened Device Tree) +[ 62.399657] Backtrace: +[ 62.402133] [] (dump_backtrace) from [] (show_stack+0x18/0x1c) +[ 62.409733] r7:c04ac55c r6:600c0013 r5:00000000 r4:c09b5590 +[ 62.415459] [] (show_stack) from [] (dump_stack+0x8c/0xa0) +[ 62.422714] [] (dump_stack) from [] (warn_slowpath_common+0x88/0xb8) +[ 62.430837] r7:c04ac55c r6:00000523 r5:00000009 r4:00000000 +[ 62.436554] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x24/0x2c) +[ 62.445375] r8:c09d0964 r7:fffffdfd r6:ee59c87c r5:ee59cad0 r4:ee59c9d8 +[ 62.452152] [] (warn_slowpath_null) from [] (vb2_start_streaming+0xe0/0x15c) +[ 62.460979] [] (vb2_start_streaming) from [] (vb2_core_streamon+0x114/0x160) +[ 62.469799] r7:c0498b80 r6:ee2fcc00 r5:ee1099c0 r4:ee59c87c +[ 62.475519] [] (vb2_core_streamon) from [] (vb2_streamon+0x38/0x58) +[ 62.483553] r5:ee1099c0 r4:00000001 +[ 62.487159] [] (vb2_streamon) from [] (vb2_ioctl_streamon+0x44/0x48) +[ 62.495290] [] (vb2_ioctl_streamon) from [] (v4l_streamon+0x24/0x28) +[ 62.503411] r5:40045612 r4:c04affd8 +[ 62.507022] [] (v4l_streamon) from [] (__video_do_ioctl+0x2c0/0x334) +[ 62.515144] r5:40045612 r4:00000001 +[ 62.518754] [] (__video_do_ioctl) from [] (video_usercopy+0x1d0/0x4fc) +[ 62.527050] r10:ee0a7e30 r9:bee22bb0 r8:00000001 r7:00000000 r6:00000004 r5:00000004 +[ 62.534951] r4:40045612 +[ 62.537506] [] (video_usercopy) from [] (video_ioctl2+0x18/0x1c) +[ 62.545279] r10:00000000 r9:ee0a6000 r8:eeab50cc r7:bee22bb0 r6:40045612 r5:ee1099c0 +[ 62.553184] r4:ee2fcc00 +[ 62.555739] [] (video_ioctl2) from [] (v4l2_ioctl+0xa8/0xe0) +[ 62.563170] [] (v4l2_ioctl) from [] (do_vfs_ioctl+0x460/0x6dc) +[ 62.570769] r9:ee0a6000 r8:bee22bb0 r7:00000003 r6:ee1099c0 r5:ed14d720 r4:bee22bb0 +[ 62.578589] [] (do_vfs_ioctl) from [] (SyS_ioctl+0x3c/0x64) +[ 62.585926] r10:00000000 r9:ee0a6000 r8:bee22bb0 r7:40045612 r6:ee1099c0 r5:00000003 +[ 62.593828] r4:ee1099c0 +[ 62.596381] [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x3c) +[ 62.603981] r9:ee0a6000 r8:c000fe24 r7:00000036 r6:00000000 r5:00000000 r4:bee22bf8 +[ 62.615850] ---[ end trace 8a98eca6f1a727d2 ]--- +[ 62.620619] video0: VIDIOC_STREAMON: error -515: type=vid-cap +[ 62.620961] vip1-s1: vip_release +[ 62.621057] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 0 +[ 62.632035] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 1 +[ 62.638172] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 2 +[ 62.644299] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 3 +[ 62.650163] vip1-s1: vip_release_stream: stream instance 0xee59c000 +[ 62.650171] vip1-s1: vip_release_port: port instance 0xeead5c10 + + I got "video0: VIDIOC_STREAMON: error -515" no ioctl command error, so please tell me,is there any functionality need to be included in adv7180 regarding ioctl calls ? Regards, Kavya. + +Hi, As I said earlier, you have to implement the subdev operations in the adv driver. You can use the tvp 5158 driver as a reference for implementation. TVP5158 is TI supported NTSC analog camera I hope you find it helpful. Regards, Nikhil D + +Hi Nikhil, Thanks for your inputs. I modified the ADV7180 driver by taking reference from TVP5158. While capturing the data I got below error "vb2: __vb2_wait_for_done_vb: will sleep waiting for buffers" Please find the attachment for more details. adv7182_dmesg_log.txt [ 23.919942] adv7180 0-0021: chip found @ 0x21 (OMAP I2C adapter) +[ 23.934920] vip1-s1: vip_async_bound +[ 23.934932] vip1-s1: Port B: Using subdev adv7180 0-0021 for capture +[ 23.941316] vip1-s1: subdev adv7180 0-0021: code: 2006 idx: 0 +[ 23.941325] vip1-s1: matched fourcc: NV12: code: 2006 idx: 0 +[ 23.941333] vip1-s1: matched fourcc: UYVY: code: 2006 idx: 1 +[ 23.941341] vip1-s1: matched fourcc: YUYV: code: 2006 idx: 2 +[ 23.941348] vip1-s1: matched fourcc: VYUY: code: 2006 idx: 3 +[ 23.941354] vip1-s1: matched fourcc: YVYU: code: 2006 idx: 4 +[ 23.941361] vip1-s1: matched fourcc: RGB3: code: 2006 idx: 5 +[ 23.941368] vip1-s1: matched fourcc: RGB4: code: 2006 idx: 6 +[ 23.941374] vip1-s1: matched fourcc: BGR3: code: 2006 idx: 7 +[ 23.941380] vip1-s1: matched fourcc: BGR4: code: 2006 idx: 8 +[ 23.942762] vip1-s1: device registered as video0 +[ 23.947532] vip1-s1: vip_async_complete +[ 23.951625] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 23.959942] vip1-s1: vip_open +[ 23.959962] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x576 +[ 23.959977] vip1-s1: calc_format_size: fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 23.959987] vip1-s1: init_stream fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 23.959995] vip1-s1: init_stream vpdma data type: 0x02 +[ 23.960004] vip1-s1: vip_init_stream: stream instance 0xedce2000 +[ 23.960021] video0: VIDIOC_QUERYCAP: driver=vip, card=vip, bus=platform:vip, version=0x00040454, capabilities=0x85200001, device_caps=0x05200001 +[ 23.960148] vip1-s1: vip_release +[ 23.960161] vip1-s1: vip_release_stream: stream instance 0xedce2000 +[ 23.960170] vip1-s1: vip_release_port: port instance 0xeead5c10 +[ 23.963382] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 23.970765] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 25.891822] vip1-s1: vip_open +[ 25.891844] vip1-s1: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:NV12 size: 720x576 +[ 25.891858] vip1-s1: calc_format_size: fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 25.891867] vip1-s1: init_stream fourcc:NV12 size: 720x576 bpl:720 img_size:622080 +[ 25.891874] vip1-s1: init_stream vpdma data type: 0x02 +[ 25.891884] vip1-s1: vip_init_stream: stream instance 0xedce2000 +[ 25.891993] video0: VIDIOC_QUERYCAP: driver=vip, card=vip, bus=platform:vip, version=0x00040454, capabilities=0x85200001, device_caps=0x05200001 +[ 25.892044] vip1-s1: s_fmt input fourcc:UYVY size: 720x576 +[ 25.892054] vip1-s1: try_fmt fourcc:UYVY size: 720x576 +[ 25.892065] vip1-s1: try_fmt loop:0 fourcc:UYVY size: -335545356x-485097464 +[ 25.892073] vip1-s1: try_fmt best subdev size: 0x0 +[ 25.892081] vip1-s1: calc_format_size: fourcc:UYVY size: 128x128 bpl:256 img_size:32768 +[ 25.892088] vip1-s1: s_fmt try_fmt fourcc:UYVY size: 128x128 +[ 25.892096] vip1-s1: s_fmt fourcc:UYVY size: 128x128 bpl:256 img_size:32768 +[ 25.892104] vip1-s1: s_fmt pix_to_mbus mbus_code: 2006 size: 0x0 +[ 25.892112] vip1-s1: s_fmt subdev fmt mbus_code: 2006 size: 720x576 +[ 25.892118] vip1-s1: s_fmt vpdma data type: 0x27 +[ 25.892123] video0: VIDIOC_S_FMT: type=vid-cap, width=128, height=128, pixelformat=UYVY, field=none, bytesperline=256, sizeimage=32768, colorspace=1, flags=0x0, ycbc0 +[ 25.892175] vip1-s1: g_fmt fourcc:UYVY code: 2006 size: 128x128 bpl:256 img_size:32768 +[ 25.892183] vip1-s1: g_fmt vpdma data type: 0x27 +[ 25.892188] video0: VIDIOC_G_FMT: type=vid-cap, width=128, height=128, pixelformat=UYVY, field=none, bytesperline=256, sizeimage=32768, colorspace=1, flags=0x0, ycbc0 +[ 25.892235] vip1-s1: get 4 buffer(s) of size 32768 each. +[ 25.892583] vb2: __setup_offsets: buffer 0, plane 0 offset 0x00000000 +[ 25.907880] vb2: __setup_offsets: buffer 1, plane 0 offset 0x00008000 +[ 25.928523] vb2: __setup_offsets: buffer 2, plane 0 offset 0x00010000 +[ 25.935062] vb2: __setup_offsets: buffer 3, plane 0 offset 0x00018000 +[ 25.941532] vb2: __vb2_queue_alloc: allocated 4 buffers, 1 plane(s) each +[ 25.948358] video0: VIDIOC_REQBUFS: count=4, type=vid-cap, memory=mmap +[ 25.948521] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=0, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x0, 8 +[ 25.948553] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 25.948597] vb2: vb2_mmap: buffer 0, plane 0 successfully mapped +[ 25.961305] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=1, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x8008 +[ 25.961334] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 25.961371] vb2: vb2_mmap: buffer 1, plane 0 successfully mapped +[ 25.976297] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=2, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x1008 +[ 25.976325] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 25.976362] vb2: vb2_mmap: buffer 2, plane 0 successfully mapped +[ 25.991360] video0: VIDIOC_QUERYBUF: 00:00:00.00000000 index=3, type=vid-cap, flags=0x00002000, field=any, sequence=0, memory=mmap, bytesused=0, offset/userptr=0x1808 +[ 25.991388] timecode=00:00:00 type=0, flags=0x00000000, frames=0, userbits=0x00000000 +[ 25.991423] vb2: vb2_mmap: buffer 3, plane 0 successfully mapped +[ 26.006327] vb2: vb2_core_qbuf: qbuf of buffer 0 succeeded +[ 26.018276] vb2: vb2_core_qbuf: qbuf of buffer 1 succeeded +[ 26.024644] vb2: vb2_core_qbuf: qbuf of buffer 2 succeeded +[ 26.030160] vb2: vb2_core_qbuf: qbuf of buffer 3 succeeded +[ 26.035852] vip 48970000.vip: hs config: src_w = 720, dst_w = 128, decimation = 4x, lin_acc_inc = 0168d1a3 +[ 26.035867] vip 48970000.vip: vs config(RAV): src_h = 576, dst_h = 128, factor = 227, acc_init = 00000155, acc_init_b = 00000000 +[ 26.035879] config descriptor of payload class: address data block +[ 26.035886] word2: payload_addr = 0xad0ef100 +[ 26.035894] word3: pkt_type = 11, direct = 0, class = 0, dest = 0, payload_len = 13 +[ 26.035901] vip1-s1: Added mmr_adb config desc +[ 26.035909] config descriptor of payload class: simple block +[ 26.035918] word0: dst_addr_offset = 0x00000000 +[ 26.035923] word1: num_data_wrds = 1024 +[ 26.035929] word2: payload_addr = 0xadcdd800 +[ 26.035936] word3: pkt_type = 11, direct = 0, class = 1, dest = 8, payload_len = 64 +[ 26.035942] vip1-s1: Added sc_coeff_h config desc +[ 26.035949] config descriptor of payload class: simple block +[ 26.035955] word0: dst_addr_offset = 0x00000040 +[ 26.035961] word1: num_data_wrds = 1024 +[ 26.035966] word2: payload_addr = 0xadcde000 +[ 26.035973] word3: pkt_type = 11, direct = 0, class = 1, dest = 8, payload_len = 64 +[ 26.035979] vip1-s1: Added sc_coeff_v config desc +[ 26.035985] vip1-s1: CFD_SC_CLIENT 8 slice_id: 1 +[ 26.035992] vip1-s1: Submitting desc on list# 0 +[ 26.037123] vip1-s1: vip_set_slice_path: +[ 26.037133] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 20000018 +[ 26.037139] vip1-s1: vip_set_slice_path: +[ 26.037150] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 70001018 +[ 26.037156] vip1-s1: vip_set_slice_path: +[ 26.037163] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 90011018 +[ 26.037169] vip1-s1: vip_set_slice_path: +[ 26.037177] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): A0031018 +[ 26.037183] vip1-s1: vip_set_slice_path: +[ 26.037190] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 50031018 +[ 26.037476] outbound data transfer descriptor for channel 173 +[ 26.037486] word0: data_type = 39, notify = 1, field = 0, 1D = 0, even_ln_skp = 0, odd_ln_skp = 0, line_stride = 256 +[ 26.037493] word2: start_addr = 0x00000000 +[ 26.037500] word3: pkt_type = 10, mode = 0, dir = 1, chan = 173, pri = 0, next_chan = 173 +[ 26.037508] word4: desc_write_addr = 0x00000000, write_desc = 0, drp_data = 0, use_desc_reg = 0 +[ 26.037516] word5: max_width 2, max_height 2 +[ 26.037522] word6: client specific attr0 = 0x00000000 +[ 26.037528] word7: client specific attr1 = 0x00000000 +[ 26.037537] vip1-s1: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:0 +[ 26.037545] vip1-s1: start_dma: vb2 buf idx:0, dma_addr:0xbe448000 +[ 26.037552] outbound data transfer descriptor for channel 173 +[ 26.037560] word0: data_type = 39, notify = 1, field = 0, 1D = 0, even_ln_skp = 0, odd_ln_skp = 0, line_stride = 256 +[ 26.037567] word2: start_addr = 0xbe448000 +[ 26.037574] word3: pkt_type = 10, mode = 0, dir = 1, chan = 173, pri = 0, next_chan = 173 +[ 26.037581] word4: desc_write_addr = 0xadcdfde0, write_desc = 1, drp_data = 0, use_desc_reg = 0 +[ 26.037588] word5: max_width 2, max_height 2 +[ 26.037593] word6: client specific attr0 = 0x00000000 +[ 26.037601] word7: client specific attr1 = 0x00000000 +[ 26.038726] vip1-s1: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:1 +[ 26.038735] vip1-s1: start_dma: vb2 buf idx:1, dma_addr:0xbe450000 +[ 26.038743] outbound data transfer descriptor for channel 173 +[ 26.038750] word0: data_type = 39, notify = 1, field = 0, 1D = 0, even_ln_skp = 0, odd_ln_skp = 0, line_stride = 256 +[ 26.038757] word2: start_addr = 0xbe450000 +[ 26.038764] word3: pkt_type = 10, mode = 0, dir = 1, chan = 173, pri = 0, next_chan = 173 +[ 26.038773] word4: desc_write_addr = 0xadcdfde0, write_desc = 1, drp_data = 0, use_desc_reg = 0 +[ 26.038779] word5: max_width 2, max_height 2 +[ 26.038785] word6: client specific attr0 = 0x00000000 +[ 26.038791] word7: client specific attr1 = 0x00000000 +[ 26.039915] vip1-s1: added next buffer +[ 26.039925] vip1-s1: start_dma: vb2 buf idx:2, dma_addr:0xbe458000 +[ 26.039935] outbound data transfer descriptor for channel 173 +[ 26.039943] word0: data_type = 39, notify = 1, field = 0, 1D = 0, even_ln_skp = 0, odd_ln_skp = 0, line_stride = 256 +[ 26.039950] word2: start_addr = 0xbe458000 +[ 26.039957] word3: pkt_type = 10, mode = 0, dir = 1, chan = 173, pri = 0, next_chan = 173 +[ 26.039964] word4: desc_write_addr = 0xadcdfde0, write_desc = 1, drp_data = 0, use_desc_reg = 0 +[ 26.039970] word5: max_width 2, max_height 2 +[ 26.039975] word6: client specific attr0 = 0x00000000 +[ 26.039981] word7: client specific attr1 = 0x00000000 +[ 26.039990] vb2: vb2_core_streamon: successful +[ 26.044565] video0: VIDIOC_STREAMON: type=vid-cap +[ 26.044627] vb2: __vb2_wait_for_done_vb: will sleep waiting for buffers +[ 33.470497] vb2: __vb2_wait_for_done_vb: sleep was interrupted +[ 33.476772] vip1-s1: vip_release +[ 33.476783] vip1-s1: vip_stop_streaming: +[ 33.476791] vip1-s1: vip_disable_sc_path: +[ 33.476798] vip1-s1: vip_set_slice_path: +[ 33.476807] vip1-s1: vip_set_slice_path: DATA_PATH_SELECT(00000110): 20031000 +[ 33.476818] vip1-s1: Clear channel no: 173 +[ 33.476826] control descriptor +[ 33.476833] word3: pkt_type = 12, source = 173, ctl_type = 8 +[ 33.476877] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 0 +[ 33.482746] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 1 +[ 33.488647] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 2 +[ 33.494697] vb2: __vb2_buf_mem_free: freed plane 0 of buffer 3 +[ 33.500653] vip1-s1: vip_release_stream: stream instance 0xedce2000 +[ 33.500663] vip1-s1: vip_release_port: port instance 0xeead5c10 + + I am using "yavta -f UYVY -s 720x576 -n 4 --capture=1 --file=image.rgb -F /dev/video0" command for capture the data. Could you please give me some inputs to solve this issue. Regards, Kavya. + +Hi, That is happening because the VIP is not able to detect frames. Please make sure that you have the right endpoint properties described for the adv subdevice. Again, refer to tvp5158 DT entry for dra7 jamr board Regards, Nikhil D + +Hi Nikhil, Please find the below dts information what i'm using now. adv7180@21 { compatible = "adi,adv7180"; reg = <0x21>; status = "okay"; port { adv7182: endpoint@0{ status = "okay"; pclk-sample = <0>; channels = <0>; }; }; }; }; &vip1 { status = "okay"; }; /* composite video input */ &vin2a { status = "okay"; endpoint { status = "okay"; slave-mode; remote-endpoint = <&adv7182>; }; }; Please tell me wether this DTS information & pinmuxing i'm using is correct or not? I'm using the VIN2A_D16-VIN2A_D23 pins for digital output of NTSC decoder,these are mapped to vin2b_d7-vin2b_d0.In dts which port i have to use either vin2a or vin2b? I'm configuring the pins in u-boot. Please find the below pinmuxing details. {VIN2A_D16, (M2 | PIN_INPUT)}, /* vin2a_d16.vin2b_d7 */ {VIN2A_D17, (M2 | PIN_INPUT)}, /* vin2a_d17.vin2b_d6 */ {VIN2A_D18, (M2 | PIN_INPUT)}, /* vin2a_d18.vin2b_d5 */ {VIN2A_D19, (M2 | PIN_INPUT)}, /* vin2a_d19.vin2b_d4 */ {VIN2A_D20, (M2 | PIN_INPUT)}, /* vin2a_d20.vin2b_d3 */ {VIN2A_D21, (M2 | PIN_INPUT)}, /* vin2a_d21.vin2b_d2 */ {VIN2A_D22, (M2 | PIN_INPUT)}, /* vin2a_d22.vin2b_d1 */ {VIN2A_D23, (M2 | PIN_INPUT)}, /* vin2a_d23.vin2b_d0 */ {VIN2A_FLD0, (M2 | PIN_INPUT)}, /* vin2a_fld0.vin2b_clk1 */ {VIN2A_HSYNC0, (M3 | PIN_INPUT)}, /* vin2a_hsync0.vin2b_hsync1 */ {VIN2A_VSYNC0, (M3 | PIN_INPUT_PULLDOWN)}, /* vin2a_vsync0.vin2b_vsync0 */ I'm not getting any buffers.Please help me to solve this issue. Thanks, kavya + +Hi Nikhil, I am waiting for your valuable inputs. Regards, Kavya. + +Hi Kavya, Sorry for the delay. You should be adding the endpoint node in vin2b. You are using vin2b video port. VIN2A is just name of the pad Regards, Nikhil D + +Hi Nikhil, Could you please confirm devicetree support and pinmuxing. If everything fine means,where could be the problem ? Regards, Kavya. + +Hi Kavya, I pointed out your problem in last reply. You should add the endpoint in vin2b port. The DTS snippet you posted is wrong. Regards, Nikhil D + +Hi Nikhil, I already added the endpoint in vin2b port,at that time also i'm not getting any buffers.Please help me to solve the issue. Again I'm giving the DTS info,Please check it wether I'm missing anything. adv7180@21 { compatible = "adi,adv7182"; reg = <0x21>; status = "okay"; port { adv7182: endpoint@0{ status = "okay"; pclk-sample = <0>; channels = <0>; remote-endpoint=<&vin2b>; }; }; }; }; &vip1 { status = "okay"; }; /* composite video input*/ &vin2b { status = "okay"; endpoint { status = "okay"; slave-mode; remote-endpoint = <&adv7182>; }; }; Thanks, Kavya. + +Hi Kavya, You can refer to this app note for debugging failures with video capture. http://www.ti.com/lit/an/spracd3/spracd3.pdf Hope you find this useful. Regards, Nikhil D + diff --git a/data2/text/range/30001+/858840.txt b/data2/text/range/30001+/858840.txt new file mode 100644 index 0000000000000000000000000000000000000000..9293a735a3080a37c6c4342ae2262f87436d15d5 --- /dev/null +++ b/data2/text/range/30001+/858840.txt @@ -0,0 +1,645 @@ +Ticket Name: TDA2SX: TIDL on hlos + +Query Text: +Part Number: TDA2SX Hi, I transplant RTOS TIDL usecase on HLOS like the picture， and changge algtidlpreproc on A15 to DSP1 ，Compile ok，and run without fail。 but only the display link proecess one time，and then there is no Other phenomena。 I want to ask if tidl can run like that。 1462.log.txt [HOST] [HOST ] 3.625236 s: SYSTEM: System A15 Init in progress !!! + [HOST] [HOST ] 3.625358 s: SYSTEM: IPC: Init in progress !!! + [HOST] [HOST ] 3.625358 s: SYSTEM: IPC: Notify init in progress !!! + [HOST] [HOST ] 3.625602 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) + [HOST] [HOST ] 3.625632 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 3.625663 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) + [HOST] [HOST ] 3.625663 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 3.625815 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) + [HOST] [HOST ] 3.625846 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 3.625876 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) + [HOST] [HOST ] 3.625876 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 3.626029 s: SYSTEM: IPC: [DSP2] socket bind success !!! (dst vproc = 3, endpt = 81) + [HOST] [HOST ] 3.626059 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! + [HOST] [HOST ] 3.626059 s: SYSTEM: IPC: [DSP2] socket connect success !!! (dst vproc = 3, endpt = 80) + [HOST] [HOST ] 3.626090 s: SYSTEM: IPC: [DSP2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! + [HOST] [HOST ] 3.626242 s: SYSTEM: IPC: Notify init DONE !!! + [HOST] [HOST ] 3.626242 s: SYSTEM: MSGQ: MsgQ init in progress !!! + [HOST] [HOST ] 3.626364 s: SYSTEM: MSGQ: MsgQ init DONE !!! + [HOST] [HOST ] 3.626364 s: SYSTEM: IPC: Init DONE !!! + [HOST] [HOST ] 3.626364 s: SYSTEM: Initializing A15 Links !!! + [HOST] [HOST ] 3.626486 s: IPC_OUT_0 : Init done - linkid-0x2000000 + [HOST] [HOST ] 3.626608 s: IPC_OUT_1 : Init done - linkid-0x2000001 + [HOST] [HOST ] 3.626730 s: IPC_OUT_2 : Init done - linkid-0x2000002 + [HOST] [HOST ] 3.626852 s: IPC_OUT_3 : Init done - linkid-0x2000003 + [HOST] [HOST ] 3.626974 s: IPC_OUT_4 : Init done - linkid-0x2000004 + [HOST] [HOST ] 3.627096 s: IPC_IN_0 : Init done - linkid-0x200000a + [HOST] [HOST ] 3.627218 s: IPC_IN_1 : Init done - linkid-0x200000b + [HOST] [HOST ] 3.627340 s: IPC_IN_2 : Init done - linkid-0x200000c + [HOST] [HOST ] 3.627462 s: IPC_IN_3 : Init done - linkid-0x200000d + [HOST] [HOST ] 3.627584 s: IPC_IN_4 : Init done - linkid-0x200000e + [HOST] [HOST ] 3.627706 s: IPC_IN_5 : Init done - linkid-0x200000f + [HOST] [HOST ] 3.627828 s: IPC_IN_6 : Init done - linkid-0x2000010 + [HOST] [HOST ] 3.627950 s: NULL_0 : Init done - linkid-0x2000014 + [HOST] [HOST ] 3.628072 s: NULL_1 : Init done - linkid-0x2000015 + [HOST] [HOST ] 3.628255 s: NULL_SRC_0 : Init done - linkid-0x2000039 + [HOST] [HOST ] 3.628408 s: DISP_DIST_SRC_0 : Init done - linkid-0x2000067 + [HOST] [HOST ] 3.628530 s: DISP_DIST_SRC_1 : Init done - linkid-0x2000068 + [HOST] [HOST ] 3.628621 s: DISP_DIST_SRC_2 : Init done - linkid-0x2000069 + [HOST] [HOST ] 3.628713 s: DISP_DIST_SRC_3 : Init done - linkid-0x200006a + [HOST] [HOST ] 3.629079 s: SGX2DSRV_0 : Init done - linkid-0x2000072 + [HOST] [HOST ] 3.629170 s: SGX2DSRV_1 : Init done - linkid-0x2000073 + [HOST] [HOST ] 3.629262 s: GRPXRENDER_0 : Init done - linkid-0x2000074 +(none) [HOST] [HOST ] 3.629353 s: ALGORITHM_0 : Init done - linkid-0x2000031 +login: root (automatic login) + [HOST] [HOST ] 3.629445 s: ALGORITHM_1 : Init done - linkid-0x2000032 + + [HOST] [HOST ] 3.629567 s: ALGORITHM_2 : Init done - linkid-0x2000033 + [HOST] [HOST ] 3.629659 s: ALGORITHM_3 : Init done - linkid-0x2000034 + [HOST] [HOST ] 3.629720 s: ALGORITHM_4 : Init done - linkid-0x2000035 + [HOST] [HOST ] 3.629872 s: ALGORITHM_5 : Init done - linkid-0x2000036 + [HOST] [HOST ] 3.629994 s: ALGORITHM_6 : Init done - linkid-0x2000037 + [HOST] [HOST ] 3.630086 s: ALGORITHM_7 : Init done - linkid-0x2000038 + [HOST] [HOST ] 3.630208 s: DUP0 : Init done - linkid-0x0 + [HOST] [HOST ] 3.630330 s: DUP1 : Init done - linkid-0x0 + [HOST] [HOST ] 3.630482 s: DUP2 : Init done - linkid-0x0 + [HOST] [HOST ] 3.630604 s: DUP3 : Init done - linkid-0x0 + [HOST] [HOST ] 3.630818 s: DUP4 : Init done - linkid-0x0 + [HOST] [HOST ] 3.630940 s: SYNC_0 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631031 s: SYNC_1 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631123 s: SYNC_2 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631214 s: SYNC_3 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631306 s: MERGE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631428 s: MERGE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631519 s: MERGE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631611 s: MERGE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631733 s: MERGE_4 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631824 s: SELECT_0 : Init done - linkid-0x0 + [HOST] [HOST ] 3.631916 s: SELECT_1 : Init done - linkid-0x0 + [HOST] [HOST ] 3.632007 s: GATE_0 : Init done - linkid-0x0 + [HOST] [HOST ] 3.632068 s: GATE_1 : Init done - linkid-0x0 + [HOST] [HOST ] 3.632160 s: GATE_2 : Init done - linkid-0x0 + [HOST] [HOST ] 3.632251 s: GATE_3 : Init done - linkid-0x0 + [HOST] [HOST ] 3.632312 s: SGXFRMCPY_0 : Init done - linkid-0x200004f + [HOST] [HOST ] 3.632312 s: SYSTEM: Initializing A15 Links ... DONE !!! + [HOST] [HOST ] 3.632648 s: OSA: Adjusting global time, timeH by 0 units!!! + [HOST] [HOST ] 3.632648 s: SYSTEM: System A15 Init Done !!! + [HOST] [HOST ] 3.632770 s: NETWORK_CTRL: Starting Server (port=5000) !!! + [HOST] [HOST ] 3.632861 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! + [HOST] [DSP1 ] 1.259318 s: ***** DSP1 Firmware build time 08:45:00 Nov 13 2019 + [HOST] [DSP1 ] 1.259409 s: *** SYSTEM: CPU Frequency , + [HOST] [DSP1 ] 1.259653 s: SYSTEM: System Common Init in progress !!! + [HOST] [DSP1 ] 1.259897 s: UTILS: CIO: Init Done !!! + [HOST] [DSP1 ] 1.259958 s: SYSTEM: IPC init in progress !!! + [HOST] [DSP1 ] 1.259958 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP1 ] 1.374092 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [DSP1 ] 1.379033 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [DSP1 ] 1.404288 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [DSP1 ] 1.424296 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [DSP1 ] 1.444335 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [DSP1 ] 1.464314 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [DSP1 ] 1.464344 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [DSP1 ] 1.464405 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [DSP1 ] 1.464466 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [DSP1 ] 1.464497 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [DSP1 ] 1.464558 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [DSP1 ] 1.464588 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [DSP1 ] 1.464649 s: SYSTEM: Notify init done !!! + [HOST] [DSP1 ] 1.464802 s: SYSTEM: MsgQ init done !!! + [HOST] [DSP1 ] 1.464954 s: RpmsgInit in progress... + [HOST] [DSP1 ] 1.464985 s: SYSTEM: IPC init DONE !!! + [HOST] [DSP1 ] 1.465686 s: SYSTEM: System Common Init Done !!! + [HOST] [DSP1 ] 1.465717 s: SYSTEM: System DSP Init in progress !!! + [HOST] [DSP1 ] 1.465991 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [DSP1 ] 1.466052 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [DSP1 ] 1.466083 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516496 B (504 KB) + [HOST] [DSP1 ] 1.466113 s: SYSTEM: Initializing Links !!! + [HOST] [DSP1 ] 1.476636 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [DSP1 ] 1.476666 s: AlgorithmLink_tidlpreproc_initPluginDsp **************** + [HOST] [DSP1 ] 1.476697 s: SYSTEM: System DSP Init Done !!! + [HOST] [DSP1 ] 1.818916 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! + [HOST] [DSP1 ] 1.818947 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! + [HOST] [DSP1 ] 2.994936 s: Connection established with HLOS, calling rpmsgInit + [HOST] [DSP2 ] 1.333557 s: ***** DSP2 Firmware build time 08:44:59 Nov 13 2019 + [HOST] [DSP2 ] 1.333618 s: *** SYSTEM: CPU Frequency , + [HOST] [DSP2 ] 1.333892 s: SYSTEM: System Common Init in progress !!! + [HOST] [DSP2 ] 1.334136 s: UTILS: CIO: Init Done !!! + [HOST] [DSP2 ] 1.334167 s: SYSTEM: IPC init in progress !!! + [HOST] [DSP2 ] 1.334197 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [DSP2 ] 1.377173 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [DSP2 ] 1.379033 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [DSP2 ] 1.414201 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [DSP2 ] 1.434209 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [DSP2 ] 1.454218 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [DSP2 ] 1.474226 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [DSP2 ] 1.474257 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [DSP2 ] 1.474318 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [DSP2 ] 1.474379 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [DSP2 ] 1.474409 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [DSP2 ] 1.474470 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [DSP2 ] 1.474501 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [DSP2 ] 1.474562 s: SYSTEM: Notify init done !!! + [HOST] [DSP2 ] 1.474745 s: SYSTEM: MsgQ init done !!! + [HOST] [DSP2 ] 1.474836 s: RpmsgInit in progress... + [HOST] [DSP2 ] 1.474867 s: SYSTEM: IPC init DONE !!! + [HOST] [DSP2 ] 1.475599 s: SYSTEM: System Common Init Done !!! + [HOST] [DSP2 ] 1.475629 s: SYSTEM: System DSP Init in progress !!! + [HOST] [DSP2 ] 1.475934 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [DSP2 ] 1.475965 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [DSP2 ] 1.476026 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516496 B (504 KB) + [HOST] [DSP2 ] 1.476056 s: SYSTEM: Initializing Links !!! + [HOST] [DSP2 ] 1.486610 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [DSP2 ] 1.486640 s: AlgorithmLink_tidlpreproc_initPluginDsp **************** + [HOST] [DSP2 ] 1.486671 s: SYSTEM: System DSP Init Done !!! + [HOST] [DSP2 ] 1.820899 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! + [HOST] [DSP2 ] 1.820929 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! + [HOST] [DSP2 ] 3.003934 s: Connection established with HLOS, calling rpmsgInit + [HOST] [EVE1 ] 1.377783 s: ***** EVE Firmware build time 08:44:59 Nov 13 2019 + [HOST] [EVE1 ] 1.379430 s: *** SYSTEM: CPU Frequency , + [HOST] [EVE1 ] 1.382419 s: SYSTEM: System Common Init in progress !!! + [HOST] [EVE1 ] 1.384432 s: UTILS: CIO: Init Done !!! + [HOST] [EVE1 ] 1.385255 s: SYSTEM: IPC init in progress !!! + [HOST] [EVE1 ] 1.386109 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [EVE1 ] 1.394619 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [EVE1 ] 1.404318 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [EVE1 ] 1.414201 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [EVE1 ] 1.454401 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [EVE1 ] 1.484353 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [EVE1 ] 1.504361 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [EVE1 ] 1.505337 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [EVE1 ] 1.506496 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [EVE1 ] 1.507625 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [EVE1 ] 1.508753 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [EVE1 ] 1.509882 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [EVE1 ] 1.511041 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [EVE1 ] 1.512169 s: SYSTEM: Notify init done !!! + [HOST] [EVE1 ] 1.513847 s: SYSTEM: MsgQ init done !!! + [HOST] [EVE1 ] 1.514640 s: SYSTEM: IPC init DONE !!! + [HOST] [EVE1 ] 1.527115 s: SYSTEM: System Common Init Done !!! + [HOST] [EVE1 ] 1.527969 s: SYSTEM: System EVE Init in progress !!! + [HOST] [EVE1 ] 1.529250 s: UTILS: DMA: HWI Create for INT8 !!! + [HOST] [EVE1 ] 1.530287 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [EVE1 ] 1.531446 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [EVE1 ] 1.533642 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254320 B (248 KB) + [HOST] [EVE1 ] 1.535655 s: SYSTEM: Initializing Links !!! + [HOST] [EVE1 ] 1.634478 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [EVE1 ] 1.635393 s: AlgorithmLink_tidl_initPluginEve ******************* + [HOST] [EVE1 ] 1.636399 s: SYSTEM: System EVE Init Done !!! + [HOST] [EVE2 ] 1.377935 s: ***** EVE Firmware build time 08:44:59 Nov 13 2019 + [HOST] [EVE2 ] 1.379582 s: *** SYSTEM: CPU Frequency , + [HOST] [EVE2 ] 1.383090 s: SYSTEM: System Common Init in progress !!! + [HOST] [EVE2 ] 1.385103 s: UTILS: CIO: Init Done !!! + [HOST] [EVE2 ] 1.385957 s: SYSTEM: IPC init in progress !!! + [HOST] [EVE2 ] 1.386841 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [EVE2 ] 1.414689 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [EVE2 ] 1.424327 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [EVE2 ] 1.434209 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [EVE2 ] 1.454401 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [EVE2 ] 1.504209 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [EVE2 ] 1.524217 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [EVE2 ] 1.525163 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [EVE2 ] 1.526383 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [EVE2 ] 1.527603 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [EVE2 ] 1.528792 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [EVE2 ] 1.530012 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [EVE2 ] 1.531202 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [EVE2 ] 1.532452 s: SYSTEM: Notify init done !!! + [HOST] [EVE2 ] 1.534160 s: SYSTEM: MsgQ init done !!! + [HOST] [EVE2 ] 1.534984 s: SYSTEM: IPC init DONE !!! + [HOST] [EVE2 ] 1.548038 s: SYSTEM: System Common Init Done !!! + [HOST] [EVE2 ] 1.548923 s: SYSTEM: System EVE Init in progress !!! + [HOST] [EVE2 ] 1.550295 s: UTILS: DMA: HWI Create for INT8 !!! + [HOST] [EVE2 ] 1.551424 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [EVE2 ] 1.552644 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [EVE2 ] 1.555145 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254320 B (248 KB) + [HOST] [EVE2 ] 1.557189 s: SYSTEM: Initializing Links !!! + [HOST] [EVE2 ] 1.656042 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [EVE2 ] 1.656957 s: AlgorithmLink_tidl_initPluginEve ******************* + [HOST] [EVE2 ] 1.657902 s: SYSTEM: System EVE Init Done !!! + [HOST] [EVE3 ] 1.377905 s: ***** EVE Firmware build time 08:45:00 Nov 13 2019 + [HOST] [EVE3 ] 1.379582 s: *** SYSTEM: CPU Frequency , + [HOST] [EVE3 ] 1.382571 s: SYSTEM: System Common Init in progress !!! + [HOST] [EVE3 ] 1.384584 s: UTILS: CIO: Init Done !!! + [HOST] [EVE3 ] 1.385408 s: SYSTEM: IPC init in progress !!! + [HOST] [EVE3 ] 1.386262 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [EVE3 ] 1.434636 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [EVE3 ] 1.444335 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [EVE3 ] 1.454218 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [EVE3 ] 1.484353 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [EVE3 ] 1.504209 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [EVE3 ] 1.544226 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [EVE3 ] 1.545202 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [EVE3 ] 1.546452 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [EVE3 ] 1.547733 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [EVE3 ] 1.549014 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [EVE3 ] 1.550295 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [EVE3 ] 1.551607 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [EVE3 ] 1.552918 s: SYSTEM: Notify init done !!! + [HOST] [EVE3 ] 1.554840 s: SYSTEM: MsgQ init done !!! + [HOST] [EVE3 ] 1.555664 s: SYSTEM: IPC init DONE !!! + [HOST] [EVE3 ] 1.569206 s: SYSTEM: System Common Init Done !!! + [HOST] [EVE3 ] 1.570182 s: SYSTEM: System EVE Init in progress !!! + [HOST] [EVE3 ] 1.571646 s: UTILS: DMA: HWI Create for INT8 !!! + [HOST] [EVE3 ] 1.572927 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [EVE3 ] 1.574330 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [EVE3 ] 1.576740 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254320 B (248 KB) + [HOST] [EVE3 ] 1.578966 s: SYSTEM: Initializing Links !!! + [HOST] [EVE3 ] 1.674525 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [EVE3 ] 1.675379 s: AlgorithmLink_tidl_initPluginEve ******************* + [HOST] [EVE3 ] 1.676294 s: SYSTEM: System EVE Init Done !!! + [HOST] [EVE4 ] 1.377966 s: ***** EVE Firmware build time 08:44:59 Nov 13 2019 + [HOST] [EVE4 ] 1.379613 s: *** SYSTEM: CPU Frequency , + [HOST] [EVE4 ] 1.383090 s: SYSTEM: System Common Init in progress !!! + [HOST] [EVE4 ] 1.385103 s: UTILS: CIO: Init Done !!! + [HOST] [EVE4 ] 1.385957 s: SYSTEM: IPC init in progress !!! + [HOST] [EVE4 ] 1.386811 s: SYSTEM: Attaching to [IPU2] ... + [HOST] [EVE4 ] 1.454675 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! + [HOST] [EVE4 ] 1.464314 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [EVE4 ] 1.474226 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [EVE4 ] 1.504361 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [EVE4 ] 1.524217 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [EVE4 ] 1.544226 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [EVE4 ] 1.545202 s: SYSTEM: Notify register to [IPU2] line 0, event 15... + [HOST] [EVE4 ] 1.546452 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [EVE4 ] 1.547733 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [EVE4 ] 1.549014 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [EVE4 ] 1.550295 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [EVE4 ] 1.551607 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [EVE4 ] 1.552888 s: SYSTEM: Notify init done !!! + [HOST] [EVE4 ] 1.554809 s: SYSTEM: MsgQ init done !!! + [HOST] [EVE4 ] 1.555633 s: SYSTEM: IPC init DONE !!! + [HOST] [EVE4 ] 1.569236 s: SYSTEM: System Common Init Done !!! + [HOST] [EVE4 ] 1.570212 s: SYSTEM: System EVE Init in progress !!! + [HOST] [EVE4 ] 1.571707 s: UTILS: DMA: HWI Create for INT8 !!! + [HOST] [EVE4 ] 1.572988 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [EVE4 ] 1.574391 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [EVE4 ] 1.576831 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254320 B (248 KB) + [HOST] [EVE4 ] 1.579058 s: SYSTEM: Initializing Links !!! + [HOST] [EVE4 ] 1.674739 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [EVE4 ] 1.675623 s: AlgorithmLink_tidl_initPluginEve ******************* + [HOST] [EVE4 ] 1.676538 s: SYSTEM: System EVE Init Done !!! + [HOST] [IPU2 ] 1.194778 s: M4 System_First start + [HOST] [IPU2 ] 1.257762 s: + [HOST] [IPU2 ] EVE1 Image Load Completed + [HOST] [IPU2 ] 1.292380 s: + [HOST] [IPU2 ] EVE2 Image Load Completed + [HOST] [IPU2 ] 1.327212 s: + [HOST] [IPU2 ] EVE3 Image Load Completed + [HOST] [IPU2 ] 1.362136 s: + [HOST] [IPU2 ] EVE4 Image Load Completed + [HOST] [IPU2 ] 1.362227 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 1.362319 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 1.362380 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 1.362471 s: + [HOST] [IPU2 ] EVE MMU configuration completed + [HOST] [IPU2 ] 1.362532 s: SYSTEM: System Common Init in progress !!! + [HOST] [IPU2 ] 1.371561 s: UTILS: CIO: Init Done !!! + [HOST] [IPU2 ] 1.371652 s: SYSTEM: IPC init in progress !!! + [HOST] [IPU2 ] 1.371744 s: SYSTEM: Attaching to [DSP1] ... + [HOST] [IPU2 ] 1.374123 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! + [HOST] [IPU2 ] 1.377173 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! + [HOST] [IPU2 ] 1.394619 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! + [HOST] [IPU2 ] 1.414689 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! + [HOST] [IPU2 ] 1.434667 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! + [HOST] [IPU2 ] 1.454675 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! + [HOST] [IPU2 ] 1.454797 s: SYSTEM: Notify register to [DSP1] line 0, event 15... + [HOST] [IPU2 ] 1.454919 s: SYSTEM: Notify register to [DSP2] line 0, event 15... + [HOST] [IPU2 ] 1.455041 s: SYSTEM: Notify register to [EVE1] line 0, event 15... + [HOST] [IPU2 ] 1.455194 s: SYSTEM: Notify register to [EVE2] line 0, event 15... + [HOST] [IPU2 ] 1.455285 s: SYSTEM: Notify register to [EVE3] line 0, event 15... + [HOST] [IPU2 ] 1.455407 s: SYSTEM: Notify register to [EVE4] line 0, event 15... + [HOST] [IPU2 ] 1.455529 s: SYSTEM: Notify init done !!! + [HOST] [IPU2 ] 1.457268 s: SYSTEM: MsgQ init done !!! + [HOST] [IPU2 ] 1.458183 s: RpmsgInit in progress... + [HOST] [IPU2 ] 1.458305 s: SYSTEM: IPC init DONE !!! + [HOST] [IPU2 ] 1.463460 s: SYSTEM: System Common Init Done !!! + [HOST] [IPU2 ] 1.463551 s: SYSTEM: System Init in progress !!! + [HOST] [IPU2 ] 1.463612 s: SYSTEM: BSP Common Init in progress !!! + [HOST] [IPU2 ] 1.463673 s: SYSTEM: BSP Common Init Done !!! + [HOST] [IPU2 ] 1.463734 s: SYSTEM: BSP Platform Init in progress !!! + [HOST] [IPU2 ] 1.463826 s: SYSTEM: BSP Platform Init Done !!! + [HOST] [IPU2 ] 1.463887 s: SYSTEM: FVID2 Init in progress !!! + [HOST] [IPU2 ] 1.464039 s: SYSTEM: FVID2 Init Done !!! + [HOST] [IPU2 ] 1.464100 s: SYSTEM: VPS Init in progress !!! + [HOST] [IPU2 ] 1.464192 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] + [HOST] [IPU2 ] 1.467211 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 1.467333 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 1.467425 s: VPDMA Load Address = 0x4897d004 + [HOST] [IPU2 ] 1.467516 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 1.467608 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 1.467669 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 1.468004 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 1.468065 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 1.468248 s: VPDMA Load Address = 0x4899d004 + [HOST] [IPU2 ] 1.468370 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 1.468431 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 1.468523 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 1.468858 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 1.468919 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 1.469011 s: VPDMA Load Address = 0x489bd004 + [HOST] [IPU2 ] 1.469133 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 1.469224 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 1.469316 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 1.469621 s: *** VPDMA Firmware Loading... *** + [HOST] [IPU2 ] 1.469712 s: VPDMA Firmware Address = 0xa03dc4c0 + [HOST] [IPU2 ] 1.469804 s: VPDMA Load Address = 0x489dd004 + [HOST] [IPU2 ] 1.469895 s: VPDMA Firmware Version = 0x4d0001b8 + [HOST] [IPU2 ] 1.469956 s: VPDMA List Busy Status = 0x00000000 + [HOST] [IPU2 ] 1.470048 s: *** VPDMA Firmware Load Success *** + [HOST] [IPU2 ] 1.526810 s: SYSTEM: VPS Init Done !!! + [HOST] [IPU2 ] 1.527725 s: UTILS: DMA: HWI Create for INT25 !!! + [HOST] [IPU2 ] 1.527969 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 + [HOST] [IPU2 ] 1.528060 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254016 B (248 KB) + [HOST] [IPU2 ] 1.528335 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 1.528487 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 314572800 B (300 MB), Free size = 314572800 B (300 MB) + [HOST] [IPU2 ] 1.528701 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 861056 B (0 MB) + [HOST] [IPU2 ] 1.528853 s: SYSTEM: Initializing Links !!! + [HOST] [IPU2 ] 1.810010 s: SYSTEM: Initializing Links ... DONE !!! + [HOST] [IPU2 ] 1.893186 s: Chains_tidlOD enter######### + [HOST] [IPU2 ] 2.988165 s: Connection established with HLOS, calling rpmsgInit +root@(none):~# [HOST] [HOST ] 6.904440 s: NULLSRC LINK SYSTEM_RTOS_OPENFILE + [HOST] [HOST ] 6.904532 s: name:./tidl_net_jdetNet_ssd.bin RTOS_FILE_op.mode:2 + [HOST] [HOST ] 6.904745 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 6.904745 s: SYSTEM_RTOS_READFILE read:76024 + [HOST] [HOST ] 6.922405 s: NULLSRC LINK SYSTEM_RTOS_CLOSEFILE + [HOST] [IPU2 ] 6.922100 s: RTOS_FILE_op.mode:2 0-4:HEX:2d 0 0 0 1 + [HOST] [HOST ] 7.007991 s: NULLSRC LINK SYSTEM_RTOS_OPENFILE + [HOST] [HOST ] 7.010461 s: name:./tidl_param_jdetNet_ssd.bin RTOS_FILE_op.mode:2 + [HOST] [HOST ] 7.010736 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.010736 s: SYSTEM_RTOS_READFILE read:3 + [HOST] [HOST ] 7.011590 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.011590 s: SYSTEM_RTOS_READFILE read:6 + [HOST] [HOST ] 7.011925 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.011925 s: SYSTEM_RTOS_READFILE read:960 + [HOST] [HOST ] 7.012505 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.012535 s: SYSTEM_RTOS_READFILE read:40 + [HOST] [HOST ] 7.012871 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.012901 s: SYSTEM_RTOS_READFILE read:900 + [HOST] [HOST ] 7.013511 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.013542 s: SYSTEM_RTOS_READFILE read:40 + [HOST] [HOST ] 7.013908 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.013908 s: SYSTEM_RTOS_READFILE read:4800 + [HOST] [IPU2 ] 7.011346 s: RTOS_ReadFile 0-4:HEX:ff ff ff 0 1 + [HOST] [IPU2 ] 7.011712 s: RTOS_ReadFile 0-4:HEX:0 80 0 80 0 + [HOST] [IPU2 ] 7.012078 s: RTOS_ReadFile 0-4:HEX:7a 93 c3 93 7e + [HOST] [IPU2 ] 7.012627 s: RTOS_ReadFile 0-4:HEX:84 9c a4 78 30 + [HOST] [IPU2 ] 7.013084 s: RTOS_ReadFile 0-4:HEX:9b 90 90 81 8a + [HOST] [IPU2 ] 7.013633 s: RTOS_ReadFile 0-4:HEX:e9 ee 31 10 2f + [HOST] [IPU2 ] 7.014457 s: RTOS_ReadFile 0-4:HEX:92 92 92 92 92 + [HOST] [HOST ] 7.016195 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.016195 s: SYSTEM_RTOS_READFILE read:80 + [HOST] [HOST ] 7.016653 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.016653 s: SYSTEM_RTOS_READFILE read:2400 + [HOST] [HOST ] 7.017934 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.017934 s: SYSTEM_RTOS_READFILE read:80 + [HOST] [HOST ] 7.018330 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.018330 s: SYSTEM_RTOS_READFILE read:12000 + [HOST] [IPU2 ] 7.016348 s: RTOS_ReadFile 0-4:HEX:a4 4d 71 1b e1 + [HOST] [IPU2 ] 7.016927 s: RTOS_ReadFile 0-4:HEX:94 94 94 94 94 + [HOST] [IPU2 ] 7.018056 s: RTOS_ReadFile 0-4:HEX:58 1f 80 23 68 + [HOST] [IPU2 ] 7.020191 s: RTOS_ReadFile 0-4:HEX:9e 8c 8c 8c 8c + [HOST] [HOST ] 7.026505 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.026505 s: SYSTEM_RTOS_READFILE read:100 + [HOST] [HOST ] 7.026962 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.026962 s: SYSTEM_RTOS_READFILE read:9000 + [HOST] [HOST ] 7.031232 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.031263 s: SYSTEM_RTOS_READFILE read:100 + [HOST] [HOST ] 7.031690 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.031690 s: SYSTEM_RTOS_READFILE read:48000 + [HOST] [IPU2 ] 7.026657 s: RTOS_ReadFile 0-4:HEX:76 1e 37 eb 92 + [HOST] [IPU2 ] 7.027969 s: RTOS_ReadFile 0-4:HEX:51 6e 88 33 33 + [HOST] [IPU2 ] 7.031385 s: RTOS_ReadFile 0-4:HEX:70 51 f8 2c 99 + [HOST] [IPU2 ] 7.039163 s: RTOS_ReadFile 0-4:HEX:46 46 46 46 46 + [HOST] [HOST ] 7.063838 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.063838 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.064295 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.064326 s: SYSTEM_RTOS_READFILE read:24000 + [HOST] [IPU2 ] 7.063960 s: RTOS_ReadFile 0-4:HEX:c1 fb a7 fa 1d + [HOST] [IPU2 ] 7.067803 s: RTOS_ReadFile 0-4:HEX:3e 54 4c 5a 67 + [HOST] [HOST ] 7.080125 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.080156 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.080644 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.080644 s: SYSTEM_RTOS_READFILE read:120000 + [HOST] [IPU2 ] 7.080308 s: RTOS_ReadFile 0-4:HEX:6c 29 d9 28 37 + [HOST] [IPU2 ] 7.110900 s: RTOS_ReadFile 0-4:HEX:69 70 70 62 66 + [HOST] [HOST ] 7.206826 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.206826 s: SYSTEM_RTOS_READFILE read:400 + [HOST] [IPU2 ] 7.206978 s: RTOS_ReadFile 0-4:HEX:d8 f7 c5 36 93 + [HOST] [HOST ] 7.207466 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.207466 s: SYSTEM_RTOS_READFILE read:90000 + [HOST] [IPU2 ] 7.223022 s: RTOS_ReadFile 0-4:HEX:86 8e 86 86 77 + [HOST] [HOST ] 7.271121 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.271121 s: SYSTEM_RTOS_READFILE read:400 + [HOST] [HOST ] 7.271670 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.271701 s: SYSTEM_RTOS_READFILE read:10000 + [HOST] [IPU2 ] 7.271304 s: RTOS_ReadFile 0-4:HEX:8b 2e 50 5 4c + [HOST] [IPU2 ] 7.273256 s: RTOS_ReadFile 0-4:HEX:96 7e 84 8c 7d + [HOST] [HOST ] 7.278869 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.278869 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.279326 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.279357 s: SYSTEM_RTOS_READFILE read:20000 + [HOST] [IPU2 ] 7.278991 s: RTOS_ReadFile 0-4:HEX:c9 11 13 16 9d + [HOST] [IPU2 ] 7.282468 s: RTOS_ReadFile 0-4:HEX:cc 8a 86 96 73 + [HOST] [HOST ] 7.293417 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.293417 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.293905 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.293905 s: SYSTEM_RTOS_READFILE read:20000 + [HOST] [IPU2 ] 7.293570 s: RTOS_ReadFile 0-4:HEX:5d 2b 40 14 58 + [HOST] [IPU2 ] 7.297017 s: RTOS_ReadFile 0-4:HEX:a5 a1 8e 95 91 + [HOST] [HOST ] 7.307936 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.307966 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [IPU2 ] 7.308088 s: RTOS_ReadFile 0-4:HEX:49 ff 61 5 d3 + [HOST] [HOST ] 7.308454 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.308454 s: SYSTEM_RTOS_READFILE read:20000 + [HOST] [IPU2 ] 7.311596 s: RTOS_ReadFile 0-4:HEX:99 87 76 99 9b + [HOST] [HOST ] 7.322546 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.322546 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.323034 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.323034 s: SYSTEM_RTOS_READFILE read:20000 + [HOST] [IPU2 ] 7.322698 s: RTOS_ReadFile 0-4:HEX:ee 4e 1e e 75 + [HOST] [IPU2 ] 7.326267 s: RTOS_ReadFile 0-4:HEX:79 88 7d 84 88 + [HOST] [HOST ] 7.337186 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.337217 s: SYSTEM_RTOS_READFILE read:200 + [HOST] [HOST ] 7.337705 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.337705 s: SYSTEM_RTOS_READFILE read:1000 + [HOST] [HOST ] 7.338467 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.338467 s: SYSTEM_RTOS_READFILE read:20 + [HOST] [IPU2 ] 7.337369 s: RTOS_ReadFile 0-4:HEX:72 bc d2 e 2d + [HOST] [IPU2 ] 7.337888 s: RTOS_ReadFile 0-4:HEX:76 83 75 79 79 + [HOST] [IPU2 ] 7.338589 s: RTOS_ReadFile 0-4:HEX:db 7 96 9 b + [HOST] [HOST ] 7.338894 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.338894 s: SYSTEM_RTOS_READFILE read:5400 + [HOST] [HOST ] 7.341456 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.341456 s: SYSTEM_RTOS_READFILE read:a8 + [HOST] [HOST ] 7.341883 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.341883 s: SYSTEM_RTOS_READFILE read:1800 + [HOST] [HOST ] 7.342890 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.342890 s: SYSTEM_RTOS_READFILE read:30 + [HOST] [HOST ] 7.343256 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.343256 s: SYSTEM_RTOS_READFILE read:7e00 + [HOST] [HOST ] 7.347068 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.347068 s: SYSTEM_RTOS_READFILE read:fc + [HOST] [HOST ] 7.347526 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.347556 s: SYSTEM_RTOS_READFILE read:1800 + [HOST] [HOST ] 7.348502 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.348502 s: SYSTEM_RTOS_READFILE read:30 + [HOST] [HOST ] 7.349020 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.349051 s: SYSTEM_RTOS_READFILE read:7e00 + [HOST] [HOST ] 7.352742 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.352772 s: SYSTEM_RTOS_READFILE read:fc + [HOST] [HOST ] 7.353199 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.353199 s: SYSTEM_RTOS_READFILE read:1800 + [HOST] [HOST ] 7.354206 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.354206 s: SYSTEM_RTOS_READFILE read:30 + [HOST] [HOST ] 7.354633 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.354633 s: SYSTEM_RTOS_READFILE read:7e00 + [HOST] [HOST ] 7.358293 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.358293 s: SYSTEM_RTOS_READFILE read:fc + [HOST] [HOST ] 7.358720 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.358720 s: SYSTEM_RTOS_READFILE read:1000 + [HOST] [HOST ] 7.359482 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.359513 s: SYSTEM_RTOS_READFILE read:20 + [HOST] [HOST ] 7.359848 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.359879 s: SYSTEM_RTOS_READFILE read:5400 + [HOST] [HOST ] 7.362471 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.362502 s: SYSTEM_RTOS_READFILE read:a8 + [HOST] [HOST ] 7.362898 s: NULLSRC LINK SYSTEM_RTOS_READFILE + [HOST] [HOST ] 7.362929 s: SYSTEM_RTOS_READFILE read:1c4 + [HOST] [HOST ] 7.363295 s: NULLSRC LINK SYSTEM_RTOS_CLOSEFILE + [HOST] [DSP1 ] 7.586835 s: IPC_IN_0 : Create in progress !!! + [HOST] [DSP1 ] 7.587415 s: IPC_IN_0 : Create Done !!! + [HOST] [DSP1 ] 7.587598 s: ALGORITHM: Create in progress (algId = 40) !!! + [HOST] [DSP1 ] 7.603367 s: UTILS: DMA: Allocated CH (TCC) = 56 (56) + [HOST] [DSP1 ] 7.603397 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 56 (0x43305200) + [HOST] [DSP1 ] 7.603428 s: ALGORITHM: Create Done (algId = 40) !!! + [HOST] [DSP1 ] 7.603641 s: IPC_OUT_3 : Create in progress !!! + [HOST] [DSP1 ] 7.603733 s: IPC_OUT_3 : Create Done !!! + [HOST] [EVE4 ] 7.604068 s: IPC_IN_0 : Create in progress !!! + [HOST] [EVE4 ] 7.604922 s: IPC_IN_0 : Create Done !!! + [HOST] [EVE4 ] 7.605654 s: ALGORITHM: Create in progress (algId = 14) !!! + [HOST] [IPU2 ] 7.339443 s: RTOS_ReadFile 0-4:HEX:8d 8d 94 91 88 + [HOST] [IPU2 ] 7.341578 s: RTOS_ReadFile 0-4:HEX:54 78 4f f5 a2 + [HOST] [IPU2 ] 7.342127 s: RTOS_ReadFile 0-4:HEX:81 69 82 76 45 + [HOST] [IPU2 ] 7.342981 s: RTOS_ReadFile 0-4:HEX:e4 b dd 15 81 + [HOST] [IPU2 ] 7.344171 s: RTOS_ReadFile 0-4:HEX:a6 a3 b0 ad a3 + [HOST] [IPU2 ] 7.347190 s: RTOS_ReadFile 0-4:HEX:59 72 37 f5 a0 + [HOST] [IPU2 ] 7.347739 s: RTOS_ReadFile 0-4:HEX:74 80 bb 78 7e + [HOST] [IPU2 ] 7.348593 s: RTOS_ReadFile 0-4:HEX:84 4 61 11 10 + [HOST] [IPU2 ] 7.349844 s: RTOS_ReadFile 0-4:HEX:aa 90 a1 a5 b1 + [HOST] [IPU2 ] 7.352894 s: RTOS_ReadFile 0-4:HEX:9c 69 b3 f1 75 + [HOST] [IPU2 ] 7.353474 s: RTOS_ReadFile 0-4:HEX:88 87 8d 83 88 + [HOST] [IPU2 ] 7.354358 s: RTOS_ReadFile 0-4:HEX:46 f8 6c fd 22 + [HOST] [IPU2 ] 7.355426 s: RTOS_ReadFile 0-4:HEX:a4 84 bc a9 bc + [HOST] [IPU2 ] 7.358415 s: RTOS_ReadFile 0-4:HEX:dd 5d bf ee b3 + [HOST] [IPU2 ] 7.358903 s: RTOS_ReadFile 0-4:HEX:7e 8b 89 83 85 + [HOST] [IPU2 ] 7.359604 s: RTOS_ReadFile 0-4:HEX:db fc 9d 7 72 + [HOST] [IPU2 ] 7.360458 s: RTOS_ReadFile 0-4:HEX:a6 a5 92 94 ac + [HOST] [IPU2 ] 7.362624 s: RTOS_ReadFile 0-4:HEX:22 60 76 f2 13 + [HOST] [IPU2 ] 7.363020 s: RTOS_ReadFile 0-4:HEX:0 0 a0 40 0 + [HOST] [IPU2 ] 7.363630 s: ChainsCommon_MultiCam_SetCapturePrms enter + [HOST] [IPU2 ] 7.367717 s: ChainsCommon_StartDisplayCtrl ************* + [HOST] [IPU2 ] 7.367870 s: CAPTURE: Create in progress !!! + [HOST] [IPU2 ] 7.368083 s: CAPTURE: VIP1 Slice1 PortA capture mode is [ 8-bit] !!! + [HOST] [IPU2 ] 7.494967 s: CAPTURE: Create Done !!! + [HOST] [IPU2 ] 7.495150 s: VPE: Create in progress !!! + [HOST] [IPU2 ] 7.584853 s: VPE: Loading Down-scaling Co-effs + [HOST] [IPU2 ] 7.585097 s: VPE: Co-effs Loading ... DONE !!! + [HOST] [IPU2 ] 7.585310 s: VPE: Create Done !!! + [HOST] [IPU2 ] 7.586225 s: IPC_OUT_0 : Create in progress !!! + [HOST] [IPU2 ] 7.586591 s: IPC_OUT_0 : Create Done !!! + [HOST] [DSP1 ] 9.604404 s: IPC_IN_3 : Create in progress !!! + [HOST] [DSP1 ] 9.604892 s: IPC_IN_3 : Create Done !!! + [HOST] [DSP1 ] 9.605075 s: IPC_OUT_2 : Create in progress !!! + [HOST] [DSP1 ] 9.605166 s: IPC_OUT_2 : Create Done !!! + [HOST] [EVE3 ] 9.605502 s: IPC_IN_0 : Create in progress !!! + [HOST] [EVE3 ] 9.606508 s: IPC_IN_0 : Create Done !!! + [HOST] [EVE3 ] 9.607088 s: ALGORITHM: Create in progress (algId = 14) !!! + [HOST] [EVE4 ] 9.602879 s: ALGORITHM: Create Done (algId = 14) !!! + [HOST] [EVE4 ] 9.603580 s: IPC_OUT_0 : Create in progress !!! + [HOST] [EVE4 ] 9.603977 s: IPC_OUT_0 : Create Done !!! + [HOST] [DSP1 ] 11.604190 s: IPC_IN_2 : Create in progress !!! + [HOST] [DSP1 ] 11.604678 s: IPC_IN_2 : Create Done !!! + [HOST] [DSP1 ] 11.604861 s: IPC_OUT_1 : Create in progress !!! + [HOST] [DSP1 ] 11.604953 s: IPC_OUT_1 : Create Done !!! + [HOST] [EVE2 ] 11.605288 s: IPC_IN_0 : Create in progress !!! + [HOST] [EVE3 ] 11.602665 s: ALGORITHM: Create Done (algId = 14) !!! + [HOST] [EVE3 ] 11.603275 s: IPC_OUT_0 : Create in progress !!! + [HOST] [EVE3 ] 11.603763 s: IPC_OUT_0 : Create Done !!! + [HOST] [EVE2 ] 11.606325 s: IPC_IN_0 : Create Done !!! + [HOST] [EVE2 ] 11.606905 s: ALGORITHM: Create in progress (algId = 14) !!! + [HOST] [DSP1 ] 13.619288 s: IPC_IN_1 : Create in progress !!! + [HOST] [DSP1 ] 13.619776 s: IPC_IN_1 : Create Done !!! + [HOST] [DSP1 ] 13.619959 s: IPC_OUT_0 : Create in progress !!! + [HOST] [DSP1 ] 13.620051 s: IPC_OUT_0 : Create Done !!! + [HOST] [EVE1 ] 13.620356 s: IPC_IN_0 : Create in progress !!! + [HOST] [EVE2 ] 13.617824 s: ALGORITHM: Create Done (algId = 14) !!! + [HOST] [EVE2 ] 13.618465 s: IPC_OUT_0 : Create in progress !!! + [HOST] [EVE2 ] 13.618861 s: IPC_OUT_0 : Create Done !!! + [HOST] [EVE1 ] 13.621423 s: IPC_IN_0 : Create Done !!! + [HOST] [EVE1 ] 13.622003 s: ALGORITHM: Create in progress (algId = 14) !!! + [HOST] [DSP1 ] 15.629506 s: ALGORITHM: Create in progress (algId = 36) !!! + [HOST] [EVE1 ] 15.627676 s: ALGORITHM: Create Done (algId = 14) !!! + [HOST] [EVE1 ] 15.628286 s: IPC_OUT_0 : Create in progress !!! + [HOST] [EVE1 ] 15.628713 s: IPC_OUT_0 : Create Done !!! + [HOST] [DSP1 ] 15.643811 s: ALGORITHM: Create Done (algId = 36) !!! + [HOST] [DSP1 ] 15.646617 s: IPC_IN_4 : Create in progress !!! + [HOST] [DSP1 ] 15.647044 s: IPC_IN_4 : Create Done !!! + [HOST] [DSP1 ] 15.647257 s: ALGORITHM: Create in progress (algId = 39) !!! + [HOST] [IPU2 ] 15.644085 s: IPC_IN_0 : Create in progress !!! + [HOST] [IPU2 ] 15.645061 s: IPC_IN_0 : Create Done !!! + [HOST] [IPU2 ] 15.646098 s: IPC_OUT_1 : Create in progress !!! + [HOST] [IPU2 ] 15.646373 s: IPC_OUT_1 : Create Done !!! + [HOST] [DSP1 ] 15.649637 s: ALGORITHM: Create Done (algId = 39) !!! + [HOST] [DSP1 ] 15.649820 s: IPC_OUT_4 : Create in progress !!! + [HOST] [DSP1 ] 15.649911 s: IPC_OUT_4 : Create Done !!! + [HOST] [IPU2 ] 15.650033 s: IPC_IN_1 : Create in progress !!! + [HOST] [IPU2 ] 15.651009 s: IPC_IN_1 : Create Done !!! + [HOST] [IPU2 ] 15.651223 s: ALGORITHM: Create in progress (algId = 1) !!! + [HOST] [IPU2 ] 15.652199 s: UTILS: DMA: Allocated CH (TCC) = 32 (32) + [HOST] [IPU2 ] 15.652321 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 32 (0x63304800) + [HOST] [DSP1 ] 15.669035 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [DSP1 ] 15.669096 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65312 B (63 KB) + [HOST] [DSP1 ] 15.669127 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 484256 B (472 KB) + [HOST] [DSP2 ] 15.669340 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [DSP2 ] 15.669401 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [DSP2 ] 15.669432 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) + [HOST] [EVE1 ] 15.669798 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [EVE1 ] 15.670103 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) + [HOST] [EVE1 ] 15.670621 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 237464 B (231 KB) + [HOST] [EVE2 ] 15.671475 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [EVE2 ] 15.671780 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) + [HOST] [EVE2 ] 15.672299 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 237464 B (231 KB) + [HOST] [EVE3 ] 15.673153 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [EVE3 ] 15.673519 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) + [HOST] [EVE3 ] 15.674037 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 237464 B (231 KB) + [HOST] [EVE4 ] 15.674922 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [EVE4 ] 15.675196 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) + [HOST] [EVE4 ] 15.675715 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 237464 B (231 KB) + [HOST] [IPU2 ] 15.668029 s: ALGORITHM: Create Done (algId = 1) !!! + [HOST] [IPU2 ] 15.668242 s: DISPLAY: Create in progress !!! + [HOST] [IPU2 ] 15.668822 s: DISPLAY: Create Done !!! + [HOST] [IPU2 ] 15.676386 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [IPU2 ] 15.676538 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 244768 B (239 KB) + [HOST] [IPU2 ] 15.676691 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 15.676843 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 314572800 B (300 MB), Free size = 134788096 B (128 MB) + [HOST] [IPU2 ] 15.677026 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) + [HOST] [IPU2 ] 15.677240 s: chains_tidlOD_Start********************* + [HOST] [IPU2 ] 15.677331 s: DISPLAY: Start in progress !!! + [HOST] [IPU2 ] 15.677392 s: DISPLAY: Start Done !!! + [HOST] [IPU2 ] 15.684194 s: CAPTURE: Start in progress !!! + [HOST] [IPU2 ] 15.685811 s: CAPTURE: Start Done !!! + [HOST] [IPU2 ] 15.979747 s: DisplayLink_drvProcessData + [HOST] [IPU2 ] 15.979838 s: bufList.numBuf:1 + [HOST] [IPU2 ] 15.979960 s: DisplayLink_drvProcessData 333333333333333333 + [HOST] [IPU2 ] 15.980143 s: freeBufList.numBuf:0 + [HOST] [IPU2 ] 15.980204 s: DisplayLink_drvProcessData end + [HOST] [IPU2 ] 20.687671 s: test OD ****************** + [HOST] [IPU2 ] 20.687763 s: + [HOST] [IPU2 ] + [HOST] [IPU2 ] ==================== + +Responses: +Inaddition，How many layers can tda2s run tidl on caffe-jacinto。 + +Hi, From ti, we have not tested tidl usecase on HLOS. We have 1 usecase where we run TIDL usecase using openvx which uses only 1 eve core and output fps is only 5. Running with 4 EVE is not tested by TI but some of the customer has done that so its possible to run this usecase on linux. Please search over E2E, you will fild some similar question. Regards, Anuj + +howcan i test tidl on hlos use 4eve .is this has the usecase i can test？ + +Hi, As told earlier, Ti does not support running tidl on all 4 eves while running linux. So we can not help in running or testing this usecase. Please check RTOS usecase and try to port the same on linux. Regards, Anuj + diff --git a/data2/text/range/30001+/860682.txt b/data2/text/range/30001+/860682.txt new file mode 100644 index 0000000000000000000000000000000000000000..47805d007986f3558e8cdd0cb20a82340dcaec66 --- /dev/null +++ b/data2/text/range/30001+/860682.txt @@ -0,0 +1,1567 @@ +Ticket Name: TDA3XEVM: Create link error on TDA3 + +Query Text: +Part Number: TDA3XEVM Other Parts Discussed in Thread: TDA2 Hi Sirs, I'm working on migrating TDA2 TIDL_OD to TDA3. When running TDA3, I got an error: [IPU1-0] 19.150948 s: SYSTEM: ERROR: No link registered at link ID [86] !!! [IPU1-0] 19.151040 s: Assertion @ Line: 296 in C:/PROCESSOR_SDK_VISION_03_0 7_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status = = SYSTEM_LINK_STATUS_SOK : failed !!! TDA3_log.txt TDA3xx SBL Boot + + Identified 15X15 Silicon + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Configuration Completed + + DDR Configuration Completed + + TDA3xx SOC Init Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + App Image Download Completed + + EVE MMU configuration completed + +***************************************************************** + + 32K Timer is used to measure cycles, divide by 32K to get time in seconds + + Reset to SBL Init Cycles - 529 (16.14 ms) + + SBL Initial Config Cycles - 230 (7.01 ms) + + SOC Init Cycles - 468 (14.28 ms) + + DDR Config Clock Cycles - 229 (6.98 ms) + + App Image Load Cycles - 238772 (7286.74 ms) + + Slave Core Bootup Cycles - 112 (3.41 ms) + + SBL Boot-up Cycles - 239813 (7318.51 ms) + + Time at which SBL started IPU1_0 - 240342 (7334.65 ms) + +***************************************************************** + + Jumping to IPU1 CPU1 App + + Jumping to IPU1 CPU0 App +[IPU1-0] 7.391600 s: ***** IPU1_0 Firmware build time 11:56:37 Nov 26 2019 +[IPU1-0] 7.391783 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 7.868327 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[IPU1-0] 7.868480 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 7.868602 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 7.868724 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 7.868998 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 7.878301 s: UTILS: CIO: Init Done !!! +[IPU1-0] 7.878393 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 7.878484 s: SYSTEM: Notify init done !!! +[IPU1-0] 7.878667 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 7.878759 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 7.880924 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 7.881016 s: SYSTEM: System Init in progress !!! +[IPU1-0] 7.881077 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 7.881168 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 7.881229 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 7.881351 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 7.881412 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 7.881504 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 7.881565 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 7.881626 s: SYSTEM: VPDMA Descriptor Memory Address translation E NABLED [0x80000000 -> 0x80000000] +[IPU1-0] 7.884188 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 7.884310 s: VPDMA Firmware Address = 0xa02e7800 +[IPU1-0] 7.884371 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 7.884493 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 7.884584 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 7.884676 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 7.919874 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 7.920697 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 7.920941 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-0] 7.921063 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 257272 B (251 KB) +[IPU1-0] 7.921277 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Tot al size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 7.921490 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x82703000, Tot al size = 494915584 B (471 MB), Free size = 494915584 B (471 MB) +[IPU1-0] 7.921673 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0000000, Tot al size = 2095360 B (1 MB), Free size = 2087680 B (1 MB) +[IPU1-0] 7.921856 s: SYSTEM: Initializing Links !!! +[IPU1-0] 8.002348 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 8.025834 s: BOARD: Board Init in progress !!! +[IPU1-0] 8.027145 s: BOARD: Board Init Done !!! +[IPU1-0] 8.031995 s: RVP Late Init +[IPU1-0] 8.032086 s: +[IPU1-0] 8.032147 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 8.032208 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 8.032269 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 8.032361 s: Platform : [EVM] +[IPU1-0] 8.032422 s: SOC : [TDA3XX] +[IPU1-0] 8.032483 s: SOC Revision : [ES1.0] +[IPU1-0] 8.032544 s: Board Detected : [TDA3XX RVP A] +[IPU1-0] 8.032788 s: Base Board Revision : [REV A] +[IPU1-0] 8.032849 s: Daughter Card Revision: [REV A] +[IPU1-0] 8.032910 s: +[IPU1-0] 8.034099 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 7.403159 s: ***** IPU1_1 Firmware build time 11:54:38 Nov 26 2019 +[IPU1-1] 7.403342 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 7.869364 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[IPU1-1] 7.869547 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 7.869639 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 7.869761 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 7.878728 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 7.879674 s: UTILS: CIO: Init Done !!! +[IPU1-1] 7.879765 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 7.879826 s: SYSTEM: Notify init done !!! +[IPU1-1] 7.880009 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 7.880070 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 7.882236 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 7.882327 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 7.883029 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 7.883273 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[IPU1-1] 7.883364 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 230304 B (224 KB) +[IPU1-1] 7.883547 s: SYSTEM: Initializing Links !!! +[IPU1-1] 7.927621 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 ## ## +[IPU1-1] 7.929024 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 ## ## +[IPU1-1] 7.930549 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 ## ## +[IPU1-1] 7.932196 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M0 #### +[IPU1-1] 7.933752 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M1 #### +[IPU1-1] 7.935460 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M2 #### +[IPU1-1] 7.937229 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M3 #### +[IPU1-1] 7.938967 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M4 #### +[IPU1-1] 7.940950 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M5 #### +[IPU1-1] 7.942932 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M6 #### +[IPU1-1] 7.944976 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITH M7 #### +[IPU1-1] 7.945098 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 7.945708 s: UTILS: DCAN INTERRUPT: HWI Create for INT28 !!! +[IPU1-1] 7.946105 s: UTILS: PRF: ##### Cannot allocate Object for DCANRX # ### +[IPU1-1] 7.946837 s: UTILS: PRF: ##### Cannot allocate Object for DCANTX # ### +[IPU1-1] 7.946959 s: SYSTEM: System IPU1_1 Init Done !!! +[IPU1-1] 8.170408 s: NSP GMAC: PHY 12 Found on MAC Port 0 +[DSP1 ] 7.406789 s: ***** DSP1 Firmware build time 11:50:22 Nov 26 2019 +[DSP1 ] 7.406850 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 7.870157 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP1 ] 7.870218 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP1 ] 7.870249 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 7.870310 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 7.870402 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 7.870585 s: UTILS: CIO: Init Done !!! +[DSP1 ] 7.870615 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 7.870615 s: SYSTEM: Notify init done !!! +[DSP1 ] 7.870676 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 7.870707 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 7.871408 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 7.871408 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 7.871591 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP1 ] 7.871652 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 7.871683 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 519608 B (507 KB) +[DSP1 ] 7.871744 s: SYSTEM: Initializing Links !!! +[DSP1 ] 7.878362 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 7.878393 s: lz4CompDecomp Init +[DSP1 ] 7.878423 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 8.010248 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP1 ] 8.010278 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[DSP2 ] 7.406789 s: ***** DSP2 Firmware build time 11:52:46 Nov 26 2019 +[DSP2 ] 7.406850 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 7.871012 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[DSP2 ] 7.871073 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[DSP2 ] 7.871103 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 7.871134 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 7.871225 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 7.871408 s: UTILS: CIO: Init Done !!! +[DSP2 ] 7.871439 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 7.871469 s: SYSTEM: Notify init done !!! +[DSP2 ] 7.871530 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 7.871561 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 7.872262 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 7.872293 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 7.872476 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[DSP2 ] 7.872537 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Tot al size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 7.872567 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 524288 B (512 KB), Free size = 519608 B (507 KB) +[DSP2 ] 7.872628 s: SYSTEM: Initializing Links !!! +[DSP2 ] 7.879186 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 7.879247 s: lz4CompDecomp Init +[DSP2 ] 7.879277 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 8.012230 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after boot !!! +[DSP2 ] 8.012261 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB . .. after update by APP !!! +[EVE1 ] 7.864118 s: ***** EVE1 Firmware build time 11:48:06 Nov 26 2019 +[EVE1 ] 7.865430 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 7.871012 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15. .. +[EVE1 ] 7.872110 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15. .. +[EVE1 ] 7.873330 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 7.874428 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 7.875800 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 7.877600 s: UTILS: CIO: Init Done !!! +[EVE1 ] 7.878393 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 7.879155 s: SYSTEM: Notify init done !!! +[EVE1 ] 7.880192 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 7.880894 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 7.891417 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 7.892179 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 7.893338 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 7.894284 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 102 4 +[EVE1 ] 7.895290 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Tot al size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 7.897181 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Tot al size = 262144 B (256 KB), Free size = 257432 B (251 KB) +[EVE1 ] 7.898920 s: SYSTEM: Initializing Links !!! +[EVE1 ] 7.969255 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 7.970078 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 9.036966 s: QSPI Init Started +[IPU1-0] 9.037150 s: MID - 20 +[IPU1-0] 9.037211 s: DID - ba +[IPU1-0] 9.037272 s: QSPI Init Completed Sucessfully +[IPU1-0] 9.044836 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 9.044927 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 9.046361 s: +[IPU1-0] 9.046422 s: Current System Settings, +[IPU1-0] 9.046452 s: ======================== +[IPU1-0] 9.046513 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 9.046574 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - V IP, YUV422 +[IPU1-0] 9.046666 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 9.046727 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 9.046788 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 9.046849 s: +[IPU1-0] 9.046910 s: ============ +[IPU1-0] 9.046940 s: Usecase Menu +[IPU1-0] 9.046971 s: ============ +[IPU1-0] 9.047032 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 12.945281 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 12.945525 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !! ! +[IPU1-0] 17.258646 s: +[IPU1-0] 17.258768 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 4: TIDL OD Usecase +[IPU1-0] 5: TIDL OD Usecase (Camera Input) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 17.867351 s: +[IPU1-0] 17.867443 s: gTIDLCamIn = +[IPU1-0] 17.903952 s: TIDL Configuration parameters +[IPU1-0] 17.904013 s: ----------------------------- +[IPU1-0] 17.904074 s: inputWidth = 768 +[IPU1-0] 17.904135 s: inputHeight = 320 +[IPU1-0] 17.904196 s: inputFile = inData_OD_yutu_f2 +[IPU1-0] 17.904257 s: inputFile = inHeader_OD_youtube_f2 +[IPU1-0] 17.904318 s: netFileName = tidl_net_jdetNet_2019Nov08_cnf01 5.bin +[IPU1-0] 17.904410 s: paramFileName = tidl_param_jdetNet_2019Nov08_cnf 015.bin +[IPU1-0] 17.904501 s: inputfps = 30 +[IPU1-0] 17.904562 s: threshold = 0.000000 +[IPU1-0] 17.904623 s: ----------------------------- +[IPU1-0] 19.117123 s: FILE: Reading file [inHeader_OD_youtube_f2 +[IPU1-0] ] ... +[IPU1-0] 19.125449 s: FILE: File read Done. [1404 bytes] +[IPU1-0] 19.150948 s: SYSTEM: ERROR: No link registered at link ID [86] !!! +[IPU1-0] 19.151040 s: Assertion @ Line: 296 in C:/PROCESSOR_SDK_VISION_03_0 7_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status = = SYSTEM_LINK_STATUS_SOK : failed !!! +[IPU1-0] 19.151863 s: Assertion @ Line: 296 in C:/PROCESSOR_SDK_VISION_03_0 7_00_00/vision_sdk/apps/src/rtos/usecases/tidl_OD/chains_tidlOD_priv.c: status = = SYSTEM_LINK_STATUS_SOK : failed !!! +[IPU1-1] 175.882998 s: Service Status: DHCPC : Enabled : Fault : 002 My questions is, Error "Assertion @ Line: 296 in ../tidl_OD/chains_tidlOD_priv.c", the related code is as below status = System_linkCreate(pObj->DecodeLinkID, &pObj->DecodePrm, sizeof(pObj->DecodePrm)); +UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); Below are my steps migrating from TDA2 to TDA3: (i) I modified tidlOD usecase only use 2*DSP + 1*EVE, and it worked fine on TDA2. (ii) Adding UC_tidl_OD to uc_cfg.mk in TDA3xx_rvp_bios_all. (iii) re-compile What am I missing? How to resolve this problem? Thank you, Gary + +Responses: +Hi, TDA3 EVM doesn't have IVA. So you cannot run my encoder or decoder link. As on tda3 we have only 1 EVE, so max you can get 5 FPS. So its better to read a raw file instead of an encoded file and skip the decoder link. You have to change OCMC address also in your Usecase. TDA3 has only 1 ocmc ram compared to TDA2xx which has 3. Regards, Anuj + +Hi Anuj, To skip decode link, I regenerated tidlOD usecase by removing "NullSource -> Decode -> VPE -> Dup" to "NullSource -> Dup" in chains_tidlOD.txt. And I also edited EVE1 ocmc address to ocmc_1. But when I ran on TDA3, the log stoped at "Jumping to IPU1 CPU0 App". Please find attachment is my regenerated usecase. tidl_OD.7z How to resolve this problem? Thank you, Gary + +Hi, Have you made any other changes also. As by only changing the usecase, your boot process should not stop. you must have changes some other files also apart from your usecase files. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope it is resolved. If not then please reply below or create a new thread for a different query. Regards, Anuj + +Hi Anuj, I used a clean build to test tidlOD usecase on TDA3 rvp. As you mentioned in previous reply, "..you cannot run my encoder or decoder link." For my understanding, it means I can't use vcodec and vpe on TDA3x. So, I modified my tidl_OD usecase and regenerated it, which is as below. NullSource -> Alg_tidlpreproc (A15) + +Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) + +Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) + +Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge + +Merge -> Sync -> Alg_tiop (DSP1) -> Alg_ObjectDraw -> Display + +GrpxSrc -> Display_Grpx + When I tested on TDA3x, there was an error: "[IPU1-0] 13.602940 s: Assertion @ Line: 199 in system_ipc_bios_ipc.c: (Bool)FALSE : failed !!!" 3817.teraterm.log � + TDA3xx SBL Boot + + Identified 15X15 Silicon + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Configuration Completed + + DDR Configuration Completed + + TDA3xx SOC Init Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + App Image Download Completed + + EVE MMU configuration completed + +***************************************************************** + + 32K Timer is used to measure cycles, divide by 32K to get time in seconds + + Reset to SBL Init Cycles - 529 (16.14 ms) + + SBL Initial Config Cycles - 230 (7.01 ms) + + SOC Init Cycles - 471 (14.37 ms) + + DDR Config Clock Cycles - 228 (6.95 ms) + + App Image Load Cycles - 235679 (7192.35 ms) + + Slave Core Bootup Cycles - 112 (3.41 ms) + + SBL Boot-up Cycles - 236722 (7224.18 ms) + + Time at which SBL started IPU1_0 - 237251 (7240.32 ms) + +***************************************************************** + + Jumping to IPU1 CPU1 App + + Jumping to IPU1 CPU0 App +[IPU1-0] 7.297352 s: ***** IPU1_0 Firmware build time 15:56:56 Dec 11 2019 +[IPU1-0] 7.297535 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 7.741505 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU1-0] 7.741658 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 7.741780 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 7.741902 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 7.742176 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 7.751723 s: UTILS: CIO: Init Done !!! +[IPU1-0] 7.751814 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 7.751875 s: SYSTEM: Notify init done !!! +[IPU1-0] 7.752089 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 7.752180 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 7.754376 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 7.754468 s: SYSTEM: System Init in progress !!! +[IPU1-0] 7.754529 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 7.754590 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 7.754651 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 7.754773 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 7.754834 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 7.754956 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 7.755017 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 7.755078 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0x80000000 -> 0x80000000] +[IPU1-0] 7.757640 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 7.757762 s: VPDMA Firmware Address = 0xa02e7800 +[IPU1-0] 7.757853 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 7.757975 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 7.758067 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 7.758158 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 7.795522 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 7.796315 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 7.796590 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 7.796712 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 257272 B (251 KB) +[IPU1-0] 7.796895 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 7.797047 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x82703000, Total size = 494915584 B (471 MB), Free size = 494915584 B (471 MB) +[IPU1-0] 7.797322 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0000000, Total size = 2095360 B (1 MB), Free size = 2087680 B (1 MB) +[IPU1-0] 7.797505 s: SYSTEM: Initializing Links !!! +[IPU1-0] 7.877417 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 7.898767 s: BOARD: Board Init in progress !!! +[IPU1-0] 7.899316 s: BOARD: Board Init Done !!! +[IPU1-0] 7.903983 s: RVP Late Init +[IPU1-0] 7.904074 s: +[IPU1-0] 7.904105 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[IPU1-0] 7.904166 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 7.904257 s: BSP Version : [PDK_01_10_03_xx] +[IPU1-0] 7.904349 s: Platform : [EVM] +[IPU1-0] 7.904410 s: SOC : [TDA3XX] +[IPU1-0] 7.904471 s: SOC Revision : [ES1.0] +[IPU1-0] 7.904532 s: Board Detected : [TDA3XX RVP A] +[IPU1-0] 7.904776 s: Base Board Revision : [REV A] +[IPU1-0] 7.904837 s: Daughter Card Revision: [REV A] +[IPU1-0] 7.904898 s: +[IPU1-0] 7.905996 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 7.308759 s: ***** IPU1_1 Firmware build time 15:54:52 Dec 11 2019 +[IPU1-1] 7.308942 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 7.742542 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU1-1] 7.742695 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 7.742817 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 7.742908 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 7.751875 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 7.752790 s: UTILS: CIO: Init Done !!! +[IPU1-1] 7.752882 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 7.752973 s: SYSTEM: Notify init done !!! +[IPU1-1] 7.753126 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 7.753187 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 7.755352 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 7.755444 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 7.756145 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 7.756389 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 7.756511 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 230304 B (224 KB) +[IPU1-1] 7.756664 s: SYSTEM: Initializing Links !!! +[IPU1-1] 7.800860 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 7.802476 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 7.803849 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 7.805435 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 7.807082 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 7.808790 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 7.810650 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 7.812480 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 7.814371 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 7.816263 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 7.818337 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 7.818459 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 7.819008 s: UTILS: DCAN INTERRUPT: HWI Create for INT28 !!! +[IPU1-1] 7.819465 s: UTILS: PRF: ##### Cannot allocate Object for DCANRX #### +[IPU1-1] 7.820136 s: UTILS: PRF: ##### Cannot allocate Object for DCANTX #### +[IPU1-1] 7.820258 s: SYSTEM: System IPU1_1 Init Done !!! +[IPU1-1] 8.043555 s: NSP GMAC: PHY 12 Found on MAC Port 0 +[DSP1 ] 7.743274 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP1 ] 7.743335 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP1 ] 7.743335 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 7.743366 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 7.743457 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 7.743579 s: UTILS: CIO: Init Done !!! +[DSP1 ] 7.743610 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 7.743640 s: SYSTEM: Notify init done !!! +[DSP1 ] 7.743671 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 7.743701 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 7.744159 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 7.744189 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 7.744342 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 7.744372 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 7.744433 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519608 B (507 KB) +[DSP1 ] 7.744464 s: SYSTEM: Initializing Links !!! +[DSP1 ] 7.749374 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 7.749405 s: lz4CompDecomp Init +[DSP1 ] 7.749405 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 7.886231 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 7.886262 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 7.744067 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP2 ] 7.744128 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP2 ] 7.744128 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 7.744159 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 7.744250 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 7.744403 s: UTILS: CIO: Init Done !!! +[DSP2 ] 7.744433 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 7.744433 s: SYSTEM: Notify init done !!! +[DSP2 ] 7.744494 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 7.744525 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 7.744982 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 7.745013 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 7.745165 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 7.745196 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 7.745226 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519608 B (507 KB) +[DSP2 ] 7.745287 s: SYSTEM: Initializing Links !!! +[DSP2 ] 7.750167 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 7.750228 s: lz4CompDecomp Init +[DSP2 ] 7.750228 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 7.888244 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 7.888275 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 7.737601 s: ***** EVE1 Firmware build time 15:48:06 Dec 11 2019 +[EVE1 ] 7.738821 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 7.744067 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE1 ] 7.745226 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE1 ] 7.746355 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 7.747422 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 7.748734 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 7.750381 s: UTILS: CIO: Init Done !!! +[EVE1 ] 7.751052 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 7.751723 s: SYSTEM: Notify init done !!! +[EVE1 ] 7.752699 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 7.753339 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 7.763252 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 7.763954 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 7.765021 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 7.765845 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 7.766760 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 7.768437 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 257432 B (251 KB) +[EVE1 ] 7.770084 s: SYSTEM: Initializing Links !!! +[EVE1 ] 7.835509 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 7.836241 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 8.907826 s: QSPI Init Started +[IPU1-0] 8.908009 s: MID - 20 +[IPU1-0] 8.908070 s: DID - ba +[IPU1-0] 8.908101 s: QSPI Init Completed Sucessfully +[IPU1-0] 8.915024 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 8.915116 s: UTILS: DMM: API NOT supported in TDA3xx !!! +[IPU1-0] 8.916580 s: +[IPU1-0] 8.916641 s: Current System Settings, +[IPU1-0] 8.916671 s: ======================== +[IPU1-0] 8.916732 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 8.916793 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[IPU1-0] 8.916885 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 8.916946 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 8.917007 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 8.917068 s: +[IPU1-0] 8.917129 s: ============ +[IPU1-0] 8.917159 s: Usecase Menu +[IPU1-0] 8.917190 s: ============ +[IPU1-0] 8.917251 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 10.278411 s: +[IPU1-0] 10.278533 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 3: TIDL OD Usecase +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 12.005947 s: +[IPU1-0] 12.416336 s: TIDL Configuration parameters +[IPU1-0] 12.416427 s: ----------------------------- +[IPU1-0] 12.416488 s: inputWidth = 768 +[IPU1-0] 12.416549 s: inputHeight = 320 +[IPU1-0] 12.416610 s: inputFile = inData_OD +[IPU1-0] 12.416671 s: inputFile = inHeader_OD +[IPU1-0] 12.416732 s: netFileName = tidl_net_jdetNet_ssd.bin +[IPU1-0] 12.416793 s: paramFileName = tidl_param_jdetNet_ssd.bin +[IPU1-0] 12.416854 s: inputfps = 10 +[IPU1-0] 12.416915 s: threshold = 0.000000 +[IPU1-0] 12.417007 s: ----------------------------- +[IPU1-1] 12.818428 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 12.818703 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 13.602391 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 13.602726 s: IPC_OUT_0 : Create Done !!! +[IPU1-0] 13.602848 s: SYSTEM: NOTIFY: [HOST] is NOT ENABLED in this build !!! +[IPU1-0] 13.602940 s: Assertion @ Line: 199 in system_ipc_bios_ipc.c: (Bool)FALSE : failed !!! +[IPU1-0] 13.603336 s: Assertion @ Line: 199 in system_ipc_bios_ipc.c: (Bool)FALSE : failed !!! + So my questions are: 1. Does my modified chains_tidlOD.txt correct? If no, can you suggest how to correct? 2. How to solve "system_ipc_bios_ipc.c" issue? Do I miss something in tidl_OD usecase? Thank you, Gary + +Hi, TDA3x SOC does not have A15 core. So you can move your Alg_tidlpreproc to DSP1 core. Regards, Anuj + +Hi Anuj, I had modified my tidlOD.txt into UseCase: chains_tidlOD + +NullSource -> Alg_tidlpreproc (DSP1) + +Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve1 (EVE1) + +Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) +Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge + +Merge -> Sync -> Alg_tiop (DSP1) -> Alg_ObjectDraw -> Display + +GrpxSrc -> Display_Grpx When running on TDA3 with tidlOD usecase, I got an error : "[IPU1-0] 19.947020 s: Assertion @ Line: 269 in objectdetection/objectDrawLink_algPlugin.c: status == SYSTEM_LINK_STATUS_SOK : failed !!!" Could you give me advice? Thank you, Gary + +Hi TI Champs: I have communicated with the Gary (Original poster for this E2E). What I think this is ODD is below, may you help to solve this? THanks. The use case txt is saying the DSP->EVE. Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve1 (EVE1) And the .c (Generated code) is dying here: IPU -> DSP. status = System_linkCreate(pObj->IPCOut_IPU1_0_DSP1_0LinkID, &pObj->IPCOut_IPU1_0_DSP1_0Prm, sizeof(pObj->IPCOut_IPU1_0_DSP1_0Prm)); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); BR Rionew_tidl_OD.rar + +Hi, Your usecase does not seems to be correct. I hope you are trying with a raw video file instead of input files. Please try with below usecase UseCase: chains_tidlOD NullSource -> VPE -> Dup Dup -> Merge Dup -> Alg_tidlpreproc (DSP1) Alg_tidlpreproc (DSP1) -> Alg_tidl_Eve1 (EVE1) Alg_tidl_Eve1 (EVE1) -> Merge_OD (DSP1) Merge_OD (DSP1) -> Alg_tidl_Dsp (DSP1) -> Merge Merge -> Sync -> Alg_tiop (DSP1) -> Alg_ObjectDraw -> Display GrpxSrc -> Display_Grpx And make your you are taking care of OCMC address in .c file as tda3xx has only 1 OCMC as compared to TDA2xx having 3 OCMC Regards, Anuj + +Hi Anuj: Customer feedback the result after updating the TXT file. Their Debug CCS will be stopped on this following step. Any comments? SYSTEM: ERROR: No link registered at link ID [81] status = System_linkCreate(pObj->VPELinkID, &pObj->VPEPrm, sizeof(pObj->VPEPrm)); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); BR Rio + +Hi, Can you try to remove VPE link and try. Sorry i forget about VPE. Regards, Anuj + +Hi Anuj, Thank you for your help, now I can enter the usecase without errors. -- In previous post, you suggested to use raw video as input for tidlOD. But I only know how to use input file and single VIP capture link. Can you tell me how to use raw video as an input of tidlOD? -- Also, if I want to try multi cameras as input for tidl, do you have any advise? Which usecase will be a better reference? -- Thank you, Gary + +Hi, Raw video means a yuv video which you can directly feed to tidl_preproc link. Tidl works on only 1 stream so what you will do with multiple camera. Basically tidl should be taking input from the front camera in real scenario. It does not required input from multiple cameras and its not supported yet. Regards, Anuj + +Hi Anuj, How do you feed yuv video to tidl_preproc link? Can you show me more details? Or are there any usecases can be referenced? Thank you, Gary + +Hi, I mean directly feeding yuv data to tild_preproc link by use nullsource link and read a yuv data and connect nullsource with tidl_preproc link. In our reference usecase we read encoded data using null source and decode that data and scale it then feed to tidl_preproc link. As tda3xx does not have decoder link so you have to read yuv data using nullSource and feed its output to tidl_preproc link. In my previous post i have already told the final usecase just remove VPE from that usecase and that should work. You should be reading a yuv data input file. Regards, Anuj + +Hi Anuj, Thank you for your clearly reply. When I ran the usecase, I got an error about lacking "inHeader" file. As this thread () , it suggests "Make sure to change frame type and YUV format in the use-case params." Can you point me where I can set these parameters? Thank you, Gary + +Hi, If you are reading a video frame data then inHeader is not required. It is required when you read bitstream data only. Please set buf type as video frame pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, SYSTEM_BUFFER_TYPE_VIDEO_FRAME); Regards, Anuj + +Hi Anuj, After I added the "pChInfo->flags" and some nullSource link related codes (refer to null_src_display uscase) in tidlOD_SetAppPrms(), I can enter the TIDLOD Menu without errors. But when I checked the display result, it only showed TIDL text on screen, no video screen & detected results. Please find attached for the reference. I also checked the statistic results, I found: 1. Cores dropped too many frames a) The nullSrc link received 30fps, but it dropped 26.6fps. So there were only 3.6 fps output. b) ALG_TIDLPREPROC link dropped another 2.7 frames, c) SYNC_0 dropped all the rest frames, so there were no frames output. Is it the reason why there did not show video screen? How can I fix this? Please advise me, thank you. I also attach usecase link map and log, hope they can be helped.tidl_OD.rar Gary + +Based on IPU1_0 CPU load, it shows ALGORITHM0 (ALG_OBJECT_DRAW) taking 92.5%. This is not normal for the object draw link to take that much time so it is possible object draw link is blocking the whole chain to run. Could you first find out why Object Draw Link on IPU1_0 seems to be blocking other links to run? Regards, Stanley + +Hi Stanley, I did some tests 1. remove ALG_OBJECT_DRAW, the IPU1_0 usage is still high (LOAD: TSK: ALGORITHM0 : 94.0%) 2. assign Alg_tidlpreproc running on DSP1 but keep ALG_OBJECT_DRAW, the DSP1 usage became high ( LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 92.1%) At this time, IPU1_0 usage is "CPU: 5.0%." So I guess the link is stuck in Alg_tidlpreproc. But I'm not clear about how to find out Alg_tidlpreproc Link block other links to run, can you give me some hints? Where should I start? Thank you, Gary + +Hi Gary, I think there are multiple issues here. Let's start from the beginning. On TDA2, the use case reads inData file which contains h.264 video stream plus the index file and decodes frame to YUV format and pass to TIDL. On TDA3, since there is no h.264 decoder, you have to pass YUV frame in input file and set the bufferType to SYSTEM_BUFFER_TYPE_VIDEO_FRAME. Did you create a new input file which contains YUV frame, instead of h.264 video stream included in SDK? Regards, Stanley + +Hi Stanley, I understand that I need use raw video as the input of tidlOD on TDA3. So I followed Anuj's suggestions to 1. set buffer type to SYSTEM_BUFFER_TYPE_VIDEO_FRAME in chains_tidlOD_SetAppPrms() 2. generate a YUV raw video as input for tidlOD Thank you, Gary + +Hi Gary, Could you try to run just NullSrc -> Display first with that YUV raw video input file and see if it runs correctly at 30 fps? Regards, Stanley + +Hi Stanley, I tried "NullSrc -> Display" and got an error in status = System_linkCreate(pObj->NullSourceLinkID, &pObj->NullSourcePrm, sizeof(pObj->NullSourcePrm)); UTILS_assert(status == SYSTEM_LINK_STATUS_SOK) I modified 2 parameters for nullSource in ChainsCommon_SetFileRxPrms() in usecase.c. 1. pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags,SYSTEM_DF_YUV420P); 2 . pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags,SYSTEM_BUFFER_TYPE_VIDEO_FRAME); Please give me some adivse, thank you Gary + +Hi Gary, Did you set NullSourcePrm.dataRxMode to NULLSRC_LINK_DATA_RX_MODE_FILE? Regards, Stanley + +Hi Stanley, Yes, it locates at the last of ChainsCommon_SetFileRxPrms(). Here is the ChainsCommon_SetFileRxPrms() function. Void ChainsCommon_SetFileRxPrms( + NullSrcLink_CreateParams *pPrm, + UInt32 maxWidth, + UInt32 maxHeight, + UInt32 numCh, + UInt32 fps /* in msecs */ + ) +{ + UInt32 chId; + System_LinkChInfo *pChInfo; + + pPrm->outQueInfo.numCh = numCh; + + pPrm->outQueInfo.numCh = 1; + + pPrm->timerPeriodMilliSecs = (1000/fps); + + for (chId = 0; chId < pPrm->outQueInfo.numCh; chId++) + { + pPrm->channelParams[chId].numBuffers = 4; + + pChInfo = &pPrm->outQueInfo.chInfo[chId]; + + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, + SYSTEM_DF_YUV420P + /*SYSTEM_DF_YUV422SP_UV*/); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Scan_Format(pChInfo->flags, + SYSTEM_SF_PROGRESSIVE); + pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, + SYSTEM_BUFFER_TYPE_VIDEO_FRAME + /*SYSTEM_BUFFER_TYPE_BITSTREAM*/); + pChInfo->width = maxWidth; + pChInfo->height = maxHeight; + pChInfo->startX = 0; + pChInfo->startY = 0; + pChInfo->pitch[0] = SystemUtils_align(pChInfo->width, 32); + pChInfo->pitch[1] = SystemUtils_align(pChInfo->width, 32); + + pPrm->channelParams[chId].fileReadMode = NULLSRC_LINK_FILEREAD_RUN_TIME; + + strncpy(pPrm->channelParams[chId].nameDataFile, "inData", 260); + //strncpy(pPrm->channelParams[chId].nameIndexFile, "inHeader", 260); + } + + pPrm->dataRxMode = NULLSRC_LINK_DATA_RX_MODE_FILE; +} Is there any other advise? Thank you, Gary + +Gary, The configuration seems to be okay. Could you check inside NullSrcLink_create() under ~\vision_sdk\links_fw\src\rtos\links_common\nullSrc\nullSrcLink_tsk.c to see what causes NullSrc Link to fail? You can either use debug print, Vps_printf(), or connect JTAG and debug in CCS. Regards, Stanley + +Hi Stanley, It doesn't enter NullSrcLink_create(). I put breakpoints at system_iniDeinitLinks.c. I found the progress didn't enter linksInclude_ipu1_0.h, so that links_common_nullSrc flag was not defined and skipped NullSrcLink_init() . The linksInclude_ipu1_0.h is controlled by BUILD_M4_0 flag, I'm not sure where to define it. I try to remove the "ifdef" to force entering linksInclude_ipu1_0.h, but there is an undefined symbol error. Please give me advise, thank you, Gary + +Hi Gary, linksInclude_ipu1_0.h is auto-generated during "make -s -j depend". You shouldn't modify this file. NullSrc Link is always included in common link. I am not sure why it is not in your build. Please do a clean build and then "make -s -j depend" & "make -s -j". You can check again if linksInclude_ipu1_0.h has the correct flag to enable NullSrc Link after "make -s -j depend". Could you also do "make -s -j showconfig" and share the log? Regards, Stanley + +Hi Stanley, I have retry from "make -j depend", it remained the same. Here is my config logs, nullSrc_config_logs.txt $ make -s -j showconfig +# +# Build Config is [ tda3xx_rvp_bios_all ] +# Build Config file is @ C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/configs/tda3xx_rvp_bios_all/cfg.mk +# Build Config .h file is @ C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/links_fw/include/config/apps/tda3xx_rvp_bios_all/system_cfg.h +# Build CPUs is @ ipu1_0 ipu1_1 dsp1 dsp2 eve1 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=yes +# PROC_IPU1_1_INCLUDE=yes +# PROC_IPU2_INCLUDE=no +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=yes +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=no +# PROC_EVE3_INCLUDE=no +# PROC_EVE4_INCLUDE=no +# PROC_A15_0_INCLUDE=no +# +# Platform config, +# VSDK_BOARD_TYPE=TDA3XX_RVP [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda3xx-rvp +# DUAL_A15_SMP_BIOS=no +# IPU1_SMP_BIOS=no +# DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# EMIFMODE=SINGLE_EMIF_1GB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] +# NDK_PROC_TO_USE=ipu1_1 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=no [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Windows_NT [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=debug [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Bios [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=no +# VPE_INCLUDE=no +# CAL_INCLUDE=yes +# ISS_INCLUDE=yes +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=yes +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/src/rtos/opencl +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=no +# +# Log config, +# ENABLE_UART_LOG=yes +# ENABLE_NETWORK_LOG=no +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=yes +# +# IPC config, +# WORKQ_INCLUDE=no +# IPC_LIB_INCLUDE=no +# +# AUTOSAR_APP=no +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=yes +# RADAR_ONLY=no +# RADAR_STUDIO=no +# CPU_IDLE_ENABLED=no +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# PGA450= +# PGA460= +# ENABLE_ALL_DEPTH= +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb +# CMEM_INCLUDE=no +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=no +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_autocalibration ALG_autoremap ALG_census ALG_deWarp ALG_disparityhamdist ALG_dmaSwMs ALG_drawRearview ALG_framecopy ALG_objectdetection ALG_remapmerge ALG_stereo_postprocessing ALG_surroundview ALG_stereo_app ALG_tidl ALG_tiop ALG_radarprocess ALG_iss_aewb ALG_iss_aewb2 +# +# Use-cases included in build, +# UC_iss_mult_capture_isp_2d_3d_sv_tda3x UC_iss_mult_capture_isp_dewarp_3dsv_tda3xx UC_iss_mult_capture_isp_dewarp_3dsv_rearview_tda3xx UC_iss_mult_capture_isp_dewarp_stereo_tda3xx UC_iss_mult_capture_isp_dewarp_stereoplus_tda3xx UC_iss_mult_capture_isp_simcop_stereo_tda3xx UC_iss_mult_capture_isp_simcop_sv_tda3xx UC_iss_mult_capture_isp_stereo_autocalib_tda3xx UC_srv_calibration UC_saveDisFrame UC_vip_single_cam_frame_copy UC_vip_single_cam_view UC_tidl UC_tidl_OD UC_radar_objectdetect_display +# +# +# CPUs that are NOT required but included in config [ tda3xx_rvp_bios_all ], +# +# +# CPUs that are required but not included in config [ tda3xx_rvp_bios_all ], +# +# +# Edit C:/PROCESSOR_SDK_VISION_03_07/vision_sdk/apps/configs/tda3xx_rvp_bios_all/cfg.mk to include or exclude CPUs in an application +# + thank you, Gary + +Hi Gary, In ~/vision_sdk/apps/configs/tda3xx_rvp_bios_all/uc_cfg.mk, could you add "UC_null_src_display=yes"? Please delete "binaries" folder and build again. Once build is done, try to run and a new use case "3: NullSrc (YUV) + Display and Null" should be available in the main menu. Please try this and see if it works. Regards, Stanley + +Hi Stanley, I followed your suggestion to test "NullSrc (YUV) + Display and Null". I found if I set data format to "SYSTEM_DF_YUV420SP_UV", the system worked correctly. If I set to "SYSTEM_DF_YUV420P", it stopped at NullSrc link creat step as mentioned in previous thread. So I used YUV420SP format video to test tidl_OD use case. But the fps was quite low, only 2.x fps and no frames showed on screen. I checked the "NullSrc (YUV) + Display and Null" use case at the same setting and it could reach 30fps. Here are my questions, 1. YUV format issue Do you have a yuv video for me to test? I wounder if I set correct parameters for my yuv video. 2. Low fps issue and no frames show on screen I share my logs for reference. 6428.logs.txt [2020-01-22 17:03:25.516] [IPU1-1] 1562.867778 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-01-22 17:03:25.532] [IPU1-1] 1562.867900 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 230000 B (224 KB) +[2020-01-22 17:03:25.532] [DSP1 ] 1562.330018 s: IPC_IN_0 : Create in progress !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.330537 s: IPC_IN_0 : Create Done !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.330842 s: ALGORITHM: Create in progress (algId = 36) !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.338132 s: ALGORITHM: Create Done (algId = 36) !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.338284 s: IPC_OUT_0 : Create in progress !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.338345 s: IPC_OUT_0 : Create Done !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.340877 s: IPC_IN_1 : Create in progress !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.341212 s: IPC_IN_1 : Create Done !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.341334 s: ALGORITHM: Create in progress (algId = 39) !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.343042 s: ALGORITHM: Create Done (algId = 39) !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.343195 s: IPC_OUT_1 : Create in progress !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.343256 s: IPC_OUT_1 : Create Done !!! +[2020-01-22 17:03:25.532] [DSP1 ] 1562.868205 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-01-22 17:03:25.548] [DSP1 ] 1562.868236 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65312 B (63 KB) +[2020-01-22 17:03:25.548] [DSP1 ] 1562.868297 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 490992 B (479 KB) +[2020-01-22 17:03:25.548] [DSP2 ] 1562.868419 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-01-22 17:03:25.548] [DSP2 ] 1562.868449 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[2020-01-22 17:03:25.548] [DSP2 ] 1562.868510 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519408 B (507 KB) +[2020-01-22 17:03:25.548] [EVE1 ] 1562.328585 s: ALGORITHM: Create Done (algId = 14) !!! +[2020-01-22 17:03:25.548] [EVE1 ] 1562.329134 s: IPC_OUT_0 : Create in progress !!! +[2020-01-22 17:03:25.548] [EVE1 ] 1562.329622 s: IPC_OUT_0 : Create Done !!! +[2020-01-22 17:03:25.548] [EVE1 ] 1562.868785 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-01-22 17:03:25.548] [EVE1 ] 1562.869120 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-01-22 17:03:25.548] [EVE1 ] 1562.869700 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 240512 B (234 KB) +[2020-01-22 17:03:33.940] [IPU1-0] 1571.614805 s: +[2020-01-22 17:03:33.940] [IPU1-0] 1571.614866 s: CPU [IPU1-0 ] Statistics, +[2020-01-22 17:03:33.940] [IPU1-0] 1571.614927 s: ************************* +[2020-01-22 17:03:33.940] [IPU1-0] 1571.614988 s: +[2020-01-22 17:03:33.940] [IPU1-0] 1571.615049 s: LOAD: CPU: 76.4% HWI: 5.3%, SWI:1.1%, Low Power: 20.8% +[2020-01-22 17:03:33.940] [IPU1-0] 1571.615201 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.615598 s: LOAD: TSK: NULL_SRC0 : 28.3% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.615720 s: LOAD: TSK: SYNC0 : 0.2% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.615842 s: LOAD: TSK: ALGORITHM0 : 38.0% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.615933 s: LOAD: TSK: ALGORITHM1 : 0.4% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616208 s: LOAD: TSK: STAT_COLL : 2.2% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616299 s: LOAD: TSK: MISC : 0.9% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616391 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616421 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 997 +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616513 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616543 s: SYSTEM: Sempahores Objects, 134 of 1050 free +[2020-01-22 17:03:34.393] [IPU1-0] 1571.616909 s: SYSTEM: Task Objects , 13 of 100 free +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617001 s: SYSTEM: Clock Objects , 91 of 100 free +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617092 s: SYSTEM: Hwi Objects , 87 of 100 free +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617184 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617214 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 246112 B (240 KB) +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617672 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[2020-01-22 17:03:34.393] [IPU1-0] 1571.617855 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x82703000, Total size = 494915584 B (471 MB), Free size = 442429440 B (421 MB) +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618038 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0000000, Total size = 2095360 B (1 MB), Free size = 2087680 B (1 MB) +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618343 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618404 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618465 s: CPU [IPU1-1 ] Statistics, +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618526 s: ************************* +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618556 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618617 s: LOAD: CPU: 2.5% HWI: 1.1%, SWI:0.6%, Low Power: 24.1% +[2020-01-22 17:03:34.393] [IPU1-0] 1571.618953 s: +[2020-01-22 17:03:34.393] [IPU1-0] 1571.619075 s: LOAD: TSK: MISC : 0.8% +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619136 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619197 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 997 +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619258 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619319 s: SYSTEM: Sempahores Objects, 440 of 1050 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619685 s: SYSTEM: Task Objects , 36 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619807 s: SYSTEM: Clock Objects , 98 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619898 s: SYSTEM: Hwi Objects , 98 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.619990 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620020 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 230000 B (224 KB) +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620325 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620417 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620447 s: CPU [DSP1 ] Statistics, +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620508 s: ************************* +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620630 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.620691 s: LOAD: CPU: 3.9% HWI: 0.1%, SWI:0.1%, Low Power: 91.6% +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621088 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621149 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 3.5% +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621240 s: LOAD: TSK: MISC : 0.2% +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621332 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621362 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 997 +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621454 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.621484 s: SYSTEM: Sempahores Objects, 453 of 1050 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622033 s: SYSTEM: Task Objects , 92 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622125 s: SYSTEM: Clock Objects , 95 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622216 s: SYSTEM: Hwi Objects , 100 of 100 free +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622308 s: +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622338 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65312 B (63 KB) +[2020-01-22 17:03:34.830] [IPU1-0] 1571.622643 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 490992 B (479 KB) +[2020-01-22 17:03:35.282] [IPU1-0] 1571.622826 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.622887 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.622918 s: CPU [DSP2 ] Statistics, +[2020-01-22 17:03:35.282] [IPU1-0] 1571.622979 s: ************************* +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623040 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623253 s: LOAD: CPU: 0.3% HWI: 0.1%, SWI:0.0%, Low Power: 96.3% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623375 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623436 s: LOAD: TSK: MISC : 0.2% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623528 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623558 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 997 +[2020-01-22 17:03:35.282] [IPU1-0] 1571.623650 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624016 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624107 s: SYSTEM: Task Objects , 92 of 100 free +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624199 s: SYSTEM: Clock Objects , 99 of 100 free +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624290 s: SYSTEM: Hwi Objects , 100 of 100 free +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624382 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624534 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624748 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 519408 B (507 KB) +[2020-01-22 17:03:35.282] [IPU1-0] 1571.624900 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625083 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625144 s: CPU [EVE1 ] Statistics, +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625205 s: ************************* +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625236 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625297 s: LOAD: CPU: 41.7% HWI: 0.2%, SWI:0.1%, Low Power: 56.1% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625449 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625815 s: LOAD: TSK: SYSTEM : 0.1% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625907 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 41.0% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.625998 s: LOAD: TSK: MISC : 0.3% +[2020-01-22 17:03:35.282] [IPU1-0] 1571.626090 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.626120 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 997 +[2020-01-22 17:03:35.282] [IPU1-0] 1571.626364 s: +[2020-01-22 17:03:35.282] [IPU1-0] 1571.626425 s: SYSTEM: Sempahores Objects, 456 of 1050 free +[2020-01-22 17:03:35.282] [IPU1-0] 1571.626486 s: SYSTEM: Task Objects , 93 of 100 free +[2020-01-22 17:03:35.719] [IPU1-0] 1571.626578 s: SYSTEM: Clock Objects , 97 of 100 free +[2020-01-22 17:03:35.719] [IPU1-0] 1571.626669 s: SYSTEM: Hwi Objects , 99 of 100 free +[2020-01-22 17:03:35.719] [IPU1-0] 1571.627005 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.627066 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-01-22 17:03:35.719] [IPU1-0] 1571.627218 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 240512 B (234 KB) +[2020-01-22 17:03:35.719] [IPU1-0] 1571.627676 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.627981 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628042 s: UTILS_PRCM_STATS: Current Temperature, +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628286 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628316 s: Voltage Rail || Curr Temp Min - Max +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628408 s: --------------------------------------------------------- +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628499 s: PMHAL_PRCM_VD_CORE || [38.800 , 39.200] +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628591 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628835 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628896 s: Statistics Collector, +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628957 s: +[2020-01-22 17:03:35.719] [IPU1-0] 1571.628987 s: STATISTIC Avg Data Peak Data +[2020-01-22 17:03:35.719] [IPU1-0] 1571.629079 s: COLLECTOR MB/s MB/s +[2020-01-22 17:03:35.719] [IPU1-0] 1571.629140 s: -------------------------------------------------- +[2020-01-22 17:03:35.719] [IPU1-0] 1571.629536 s: SCI_EMIF_SYS | 151.121802 1041.581657 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.629750 s: SCI_IPU | 29.214183 164.839664 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.629872 s: SCI_DSP1_MDMA | 3.693685 823.970417 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.630147 s: SCI_DSP2_MDMA | 0.640193 13.115055 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.630269 s: SCI_DSS | 59.659875 260.630420 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.630391 s: SCI_MMU | 0.000000 0.000000 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.630482 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 +[2020-01-22 17:03:35.719] [IPU1-0] 1571.630818 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.630940 s: SCI_VIP_P1 | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.631031 s: SCI_VIP_P2 | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.631123 s: SCI_ISS_RT | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.631519 s: SCI_ISS_NRT2 | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.631641 s: SCI_EVE_P1 | 56.872099 617.748994 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.631885 s: SCI_EVE_P2 | 76.759631 877.077113 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632160 s: SCI_GMAC_SW | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632282 s: SCI_ISS_NRT1 | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632373 s: SCI_DSP2_CFG | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632465 s: SCI_DSP2_EDMA | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632739 s: SCI_OCMC_RAM | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632831 s: SCI_DSP1_CFG | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.632953 s: SCI_DSP1_EDMA | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.633044 s: SCI_GPMC | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.633441 s: SCI_MCASP | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.633563 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.633654 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 +[2020-01-22 17:03:36.156] [IPU1-0] 1571.928811 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.931403 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.931525 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.931922 s: ### CPU [IPU1-0], LinkID [ 57], +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932013 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932044 s: [ NULL_SRC ] Link Statistics, +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932105 s: ****************************** +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932166 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932623 s: Elapsed time = 9039 msec +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932745 s: +[2020-01-22 17:03:36.156] [IPU1-0] 1571.932776 s: New data Recv = 2.32 fps +[2020-01-22 17:03:36.592] [IPU1-0] 1571.932867 s: Get Full Buf Cb = 2.21 fps +[2020-01-22 17:03:36.592] [IPU1-0] 1571.932928 s: Put Empty Buf Cb = 4.20 fps +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933203 s: Driver/Notify Cb = 62.39 fps +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933294 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933325 s: Input Statistics, +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933386 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933416 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933477 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933569 s: -------------------------------------------------- +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933843 s: 0 | 2.32 0. 0 0. 0 2.21 +[2020-01-22 17:03:36.592] [IPU1-0] 1571.933965 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934026 s: Output Statistics, +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934057 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934118 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934179 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934545 s: --------------------------------------------- +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934636 s: 0 | 0 2.21 0. 0 0. 0 +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934789 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934850 s: [ NULL_SRC ] LATENCY, +[2020-01-22 17:03:36.592] [IPU1-0] 1571.934911 s: ******************** +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935124 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935185 s: CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935338 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935368 s: ### CPU [IPU1-0], LinkID [ 49], +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935460 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935643 s: [ ALG_TIDLPREPROC ] Link Statistics, +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935765 s: ****************************** +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935826 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935856 s: Elapsed time = 8608 msec +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935917 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.935978 s: New data Recv = 2.32 fps +[2020-01-22 17:03:36.592] [IPU1-0] 1571.936344 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.936405 s: Input Statistics, +[2020-01-22 17:03:36.592] [IPU1-0] 1571.936466 s: +[2020-01-22 17:03:36.592] [IPU1-0] 1571.936497 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:37.045] [IPU1-0] 1571.936558 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:37.045] [IPU1-0] 1571.936649 s: -------------------------------------------------- +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937015 s: 0 | 2.32 0. 0 0. 0 2.32 +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937534 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937564 s: Output Statistics, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937625 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937656 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937778 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:37.045] [IPU1-0] 1571.937869 s: --------------------------------------------- +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938266 s: 0 | 0 2.32 0. 0 0. 0 +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938388 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938449 s: [ ALG_TIDLPREPROC ] LATENCY, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938510 s: ******************** +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938540 s: Local Link Latency : Avg = 109 us, Min = 31 us, Max = 397 us, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938845 s: Source to Link Latency : Avg = 279655 us, Min = 277893 us, Max = 281614 us, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.938998 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939089 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939120 s: ### CPU [IPU1-0], LinkID [ 0], +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939211 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939394 s: [ IPC_OUT_0 ] Link Statistics, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939455 s: ****************************** +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939516 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939547 s: Elapsed time = 8334 msec +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939638 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.939669 s: New data Recv = 2.39 fps +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940096 s: Release data Recv = 2.27 fps +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940187 s: Driver/Notify Cb = 35.63 fps +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940248 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940279 s: Input Statistics, +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940340 s: +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940370 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940462 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:37.045] [IPU1-0] 1571.940645 s: -------------------------------------------------- +[2020-01-22 17:03:37.482] [IPU1-0] 1571.940767 s: 0 | 2.39 0. 0 0. 0 2.39 +[2020-01-22 17:03:37.482] [IPU1-0] 1571.940919 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1571.940950 s: Output Statistics, +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941011 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941041 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941255 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941346 s: --------------------------------------------- +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941407 s: 0 | 0 2.39 0. 0 0. 0 +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941529 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941560 s: [ IPC_OUT_0 ] LATENCY, +[2020-01-22 17:03:37.482] [IPU1-0] 1571.941621 s: ******************** +[2020-01-22 17:03:37.482] [IPU1-0] 1571.942139 s: Local Link Latency : Avg = 7 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:37.482] [IPU1-0] 1571.942261 s: Source to Link Latency : Avg = 279747 us, Min = 277954 us, Max = 281675 us, +[2020-01-22 17:03:37.482] [IPU1-0] 1571.942353 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442048 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442109 s: ### CPU [ EVE1], LinkID [ 10], +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442200 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442231 s: [ IPC_IN_0 ] Link Statistics, +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442292 s: ****************************** +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442658 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442749 s: Elapsed time = 8837 msec +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442810 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442871 s: Get Full Buf Cb = 4.63 fps +[2020-01-22 17:03:37.482] [IPU1-0] 1572.442932 s: Put Empty Buf Cb = 2.26 fps +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443024 s: Driver/Notify Cb = 5.54 fps +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443085 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443298 s: Input Statistics, +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443359 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443390 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443481 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443542 s: -------------------------------------------------- +[2020-01-22 17:03:37.482] [IPU1-0] 1572.443634 s: 0 | 2.37 0. 0 0. 0 2.37 +[2020-01-22 17:03:37.482] [IPU1-0] 1572.444000 s: +[2020-01-22 17:03:37.482] [IPU1-0] 1572.444061 s: Output Statistics, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444091 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444152 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444213 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444274 s: --------------------------------------------- +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444366 s: 0 | 0 2.37 0. 0 0. 0 +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444824 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444854 s: [ IPC_IN_0 ] LATENCY, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444915 s: ******************** +[2020-01-22 17:03:37.918] [IPU1-0] 1572.444976 s: Local Link Latency : Avg = 39 us, Min = 30 us, Max = 61 us, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445098 s: Source to Link Latency : Avg = 280096 us, Min = 278351 us, Max = 281980 us, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445190 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445464 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445495 s: ### CPU [ EVE1], LinkID [ 49], +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445586 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445617 s: [ ALG_TIDL ] Link Statistics, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.445678 s: ****************************** +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446013 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446074 s: Elapsed time = 8840 msec +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446135 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446196 s: New data Recv = 4.63 fps +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446257 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446288 s: Input Statistics, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446349 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446379 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446898 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:37.918] [IPU1-0] 1572.446989 s: -------------------------------------------------- +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447050 s: 0 | 2.37 0. 0 0. 0 2.26 +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447355 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447416 s: Output Statistics, +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447477 s: +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447508 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447569 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447660 s: --------------------------------------------- +[2020-01-22 17:03:37.918] [IPU1-0] 1572.447904 s: 0 | 0 2.26 0. 0 0. 0 +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448026 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448087 s: [ ALG_TIDL ] LATENCY, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448148 s: ******************** +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448179 s: Local Link Latency : Avg = 195702 us, Min = 195358 us, Max = 195877 us, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448606 s: Source to Link Latency : Avg = 475980 us, Min = 474227 us, Max = 477886 us, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448758 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448880 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.448911 s: ### CPU [ EVE1], LinkID [ 0], +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449155 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449216 s: [ IPC_OUT_0 ] Link Statistics, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449277 s: ****************************** +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449338 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449368 s: Elapsed time = 8648 msec +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449460 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449490 s: New data Recv = 2.31 fps +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449704 s: Release data Recv = 2.31 fps +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449826 s: Driver/Notify Cb = 5.55 fps +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449887 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449917 s: Input Statistics, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.449978 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450009 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450405 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450497 s: -------------------------------------------------- +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450558 s: 0 | 2.31 0. 0 0. 0 2.31 +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450710 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450771 s: Output Statistics, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.450985 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451046 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451107 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451198 s: --------------------------------------------- +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451259 s: 0 | 0 2.31 0. 0 0. 0 +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451503 s: +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451564 s: [ IPC_OUT_0 ] LATENCY, +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451625 s: ******************** +[2020-01-22 17:03:38.355] [IPU1-0] 1572.451656 s: Local Link Latency : Avg = 30 us, Min = 30 us, Max = 31 us, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.452235 s: Source to Link Latency : Avg = 476239 us, Min = 474471 us, Max = 478130 us, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.452357 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.951991 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952083 s: ### CPU [ DSP1], LinkID [ 10], +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952144 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952174 s: [ IPC_IN_0 ] Link Statistics, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952510 s: ****************************** +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952571 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952601 s: Elapsed time = 9151 msec +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952662 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952723 s: Get Full Buf Cb = 2.29 fps +[2020-01-22 17:03:38.808] [IPU1-0] 1572.952815 s: Put Empty Buf Cb = 2.29 fps +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953059 s: Driver/Notify Cb = 35.51 fps +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953150 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953181 s: Input Statistics, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953242 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953272 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953364 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953425 s: -------------------------------------------------- +[2020-01-22 17:03:38.808] [IPU1-0] 1572.953852 s: 0 | 2.29 0. 0 0. 0 2.29 +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954065 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954126 s: Output Statistics, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954157 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954218 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954462 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954523 s: --------------------------------------------- +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954614 s: 0 | 0 2.29 0. 0 0. 0 +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954767 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954797 s: [ IPC_IN_0 ] LATENCY, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.954858 s: ******************** +[2020-01-22 17:03:38.808] [IPU1-0] 1572.955072 s: Local Link Latency : Avg = 10 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.955194 s: Source to Link Latency : Avg = 476405 us, Min = 474624 us, Max = 478252 us, +[2020-01-22 17:03:38.808] [IPU1-0] 1572.955316 s: +[2020-01-22 17:03:38.808] [IPU1-0] 1572.955377 s: CPU [ DSP1], LinkID [ 38], Link Statistics not available ! +[2020-01-22 17:03:39.229] [IPU1-0] 1572.955865 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.955926 s: ### CPU [ DSP1], LinkID [ 49], +[2020-01-22 17:03:39.229] [IPU1-0] 1572.955987 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956048 s: [ ALG_TIDL ] Link Statistics, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956109 s: ****************************** +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956170 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956200 s: Elapsed time = 9154 msec +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956261 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956444 s: New data Recv = 4.47 fps +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956536 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956566 s: Input Statistics, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956627 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956658 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:39.229] [IPU1-0] 1572.956871 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957176 s: -------------------------------------------------- +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957268 s: 0 | 2.29 0. 0 0. 0 2.29 +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957420 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957451 s: Output Statistics, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957481 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957542 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:39.229] [IPU1-0] 1572.957603 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958061 s: --------------------------------------------- +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958152 s: 0 | 0 2.29 0. 0 0. 0 +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958244 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958274 s: [ ALG_TIDL ] LATENCY, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958335 s: ******************** +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958396 s: Local Link Latency : Avg = 13368 us, Min = 12322 us, Max = 22936 us, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958671 s: Source to Link Latency : Avg = 489818 us, Min = 487007 us, Max = 500366 us, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958823 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958945 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.958976 s: ### CPU [ DSP1], LinkID [ 0], +[2020-01-22 17:03:39.229] [IPU1-0] 1572.959037 s: +[2020-01-22 17:03:39.229] [IPU1-0] 1572.959250 s: [ IPC_OUT_0 ] Link Statistics, +[2020-01-22 17:03:39.229] [IPU1-0] 1572.959311 s: ****************************** +[2020-01-22 17:03:39.681] [IPU1-0] 1572.959372 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.959403 s: Elapsed time = 9145 msec +[2020-01-22 17:03:39.681] [IPU1-0] 1572.959494 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.959525 s: New data Recv = 2.29 fps +[2020-01-22 17:03:39.681] [IPU1-0] 1572.959586 s: Release data Recv = 2.18 fps +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960013 s: Driver/Notify Cb = 35.53 fps +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960104 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960135 s: Input Statistics, +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960196 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960226 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960318 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960379 s: -------------------------------------------------- +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960592 s: 0 | 2.29 0. 0 0. 0 2.29 +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960775 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960806 s: Output Statistics, +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960867 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960897 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:39.681] [IPU1-0] 1572.960989 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961202 s: --------------------------------------------- +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961294 s: 0 | 0 2.29 0. 0 0. 0 +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961385 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961446 s: [ IPC_OUT_0 ] LATENCY, +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961507 s: ******************** +[2020-01-22 17:03:39.681] [IPU1-0] 1572.961538 s: Local Link Latency : Avg = 2 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:39.681] [IPU1-0] 1572.962087 s: Source to Link Latency : Avg = 489897 us, Min = 487068 us, Max = 500458 us, +[2020-01-22 17:03:39.681] [IPU1-0] 1572.962239 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1573.690996 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691057 s: ### CPU [IPU1-0], LinkID [ 10], +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691484 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691545 s: [ IPC_IN_0 ] Link Statistics, +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691606 s: ****************************** +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691667 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1573.691697 s: Elapsed time = 9877 msec +[2020-01-22 17:03:39.681] [IPU1-0] 1573.692094 s: +[2020-01-22 17:03:39.681] [IPU1-0] 1573.692155 s: Get Full Buf Cb = 4.55 fps +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692216 s: Put Empty Buf Cb = 2.22 fps +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692307 s: Driver/Notify Cb = 35.53 fps +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692368 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692551 s: Input Statistics, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692612 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692643 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692734 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:40.118] [IPU1-0] 1573.692887 s: -------------------------------------------------- +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693314 s: 0 | 2.32 0. 0 0. 0 2.32 +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693466 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693497 s: Output Statistics, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693558 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693588 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693649 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:40.118] [IPU1-0] 1573.693924 s: --------------------------------------------- +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694015 s: 0 | 0 2.32 0. 0 0. 0 +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694137 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694168 s: [ IPC_IN_0 ] LATENCY, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694229 s: ******************** +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694290 s: Local Link Latency : Avg = 18 us, Min = 0 us, Max = 61 us, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694534 s: Source to Link Latency : Avg = 489916 us, Min = 487220 us, Max = 500580 us, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694656 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694717 s: CPU [ IPU1-0], LinkID [ 38], Link Statistics not available ! +[2020-01-22 17:03:40.118] [IPU1-0] 1573.694900 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695266 s: ### CPU [IPU1-0], LinkID [ 34], +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695357 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695388 s: [ SYNC_0 ] Link Statistics, +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695449 s: ****************************** +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695510 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695540 s: Elapsed time = 10787 msec +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695632 s: +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695845 s: New data Recv = 34.67 fps +[2020-01-22 17:03:40.118] [IPU1-0] 1573.695906 s: Get Full Buf Cb = 2.13 fps +[2020-01-22 17:03:40.555] [IPU1-0] 1573.695998 s: Put Empty Buf Cb = 2.3 fps +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696059 s: Driver/Notify Cb = 30.22 fps +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696150 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696181 s: Input Statistics, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696364 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696425 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696486 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696577 s: -------------------------------------------------- +[2020-01-22 17:03:40.555] [IPU1-0] 1573.696638 s: 0 | 2.22 0. 0 0. 0 2.13 +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697218 s: 1 | 2.13 0. 0 0. 0 2.13 +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697370 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697401 s: Output Statistics, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697462 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697492 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697706 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697828 s: --------------------------------------------- +[2020-01-22 17:03:40.555] [IPU1-0] 1573.697919 s: 0 | 0 2.13 0. 0 0. 0 +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698041 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698072 s: [ SYNC_0 ] LATENCY, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698285 s: ******************** +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698346 s: Local Link Latency : Avg = 244985 us, Min = 30 us, Max = 500549 us, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698468 s: Source to Link Latency : Avg = 490093 us, Min = 487403 us, Max = 500763 us, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.698590 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699048 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699109 s: ### CPU [IPU1-0], LinkID [ 1], +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699170 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699231 s: [ IPC_OUT_1 ] Link Statistics, +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699292 s: ****************************** +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699353 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699383 s: Elapsed time = 9885 msec +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699597 s: +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699658 s: New data Recv = 2.32 fps +[2020-01-22 17:03:40.555] [IPU1-0] 1573.699719 s: Release data Recv = 2.22 fps +[2020-01-22 17:03:40.992] [IPU1-0] 1573.699932 s: Driver/Notify Cb = 35.50 fps +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700176 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700237 s: Input Statistics, +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700298 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700329 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700390 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700481 s: -------------------------------------------------- +[2020-01-22 17:03:40.992] [IPU1-0] 1573.700542 s: 0 | 2.32 0. 0 0. 0 2.32 +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701030 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701091 s: Output Statistics, +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701152 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701183 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701244 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701335 s: --------------------------------------------- +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701396 s: 0 | 0 2.32 0. 0 0. 0 +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701671 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701701 s: [ IPC_OUT_1 ] LATENCY, +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701915 s: ******************** +[2020-01-22 17:03:40.992] [IPU1-0] 1573.701976 s: Local Link Latency : Avg = 2 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:40.992] [IPU1-0] 1573.702250 s: Source to Link Latency : Avg = 490174 us, Min = 487465 us, Max = 500824 us, +[2020-01-22 17:03:40.992] [IPU1-0] 1573.702372 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.201945 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202342 s: ### CPU [ DSP1], LinkID [ 11], +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202433 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202464 s: [ IPC_IN_1 ] Link Statistics, +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202525 s: ****************************** +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202586 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202616 s: Elapsed time = 10388 msec +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202708 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.202738 s: Get Full Buf Cb = 4.62 fps +[2020-01-22 17:03:40.992] [IPU1-0] 1574.203013 s: Put Empty Buf Cb = 2.21 fps +[2020-01-22 17:03:40.992] [IPU1-0] 1574.203165 s: Driver/Notify Cb = 35.52 fps +[2020-01-22 17:03:40.992] [IPU1-0] 1574.203257 s: +[2020-01-22 17:03:40.992] [IPU1-0] 1574.203287 s: Input Statistics, +[2020-01-22 17:03:40.992] [IPU1-0] 1574.203348 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.203379 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:41.428] [IPU1-0] 1574.203592 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:41.428] [IPU1-0] 1574.203684 s: -------------------------------------------------- +[2020-01-22 17:03:41.428] [IPU1-0] 1574.203745 s: 0 | 2.31 0. 0 0. 0 2.31 +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204355 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204416 s: Output Statistics, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204447 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204508 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204569 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204630 s: --------------------------------------------- +[2020-01-22 17:03:41.428] [IPU1-0] 1574.204721 s: 0 | 0 2.31 0. 0 0. 0 +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205026 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205087 s: [ IPC_IN_1 ] LATENCY, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205148 s: ******************** +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205209 s: Local Link Latency : Avg = 15 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205301 s: Source to Link Latency : Avg = 490253 us, Min = 487587 us, Max = 500946 us, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205423 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205667 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205697 s: ### CPU [ DSP1], LinkID [ 50], +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205819 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205880 s: [ ALG_TIOP ] Link Statistics, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.205941 s: ****************************** +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206002 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206338 s: Elapsed time = 10391 msec +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206429 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206460 s: New data Recv = 4.61 fps +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206551 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206582 s: Input Statistics, +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206643 s: +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206673 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:41.428] [IPU1-0] 1574.206734 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:41.428] [IPU1-0] 1574.207100 s: -------------------------------------------------- +[2020-01-22 17:03:41.428] [IPU1-0] 1574.207192 s: 0 | 2.30 0. 0 0. 0 2.30 +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207314 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207375 s: Output Statistics, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207405 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207619 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207680 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207802 s: --------------------------------------------- +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207863 s: 0 | 0 2.30 0. 0 0. 0 +[2020-01-22 17:03:41.881] [IPU1-0] 1574.207985 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208015 s: [ ALG_TIOP ] LATENCY, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208412 s: ******************** +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208473 s: Local Link Latency : Avg = 3099 us, Min = 1129 us, Max = 12962 us, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208595 s: Source to Link Latency : Avg = 493344 us, Min = 488898 us, Max = 511681 us, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208686 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.208991 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209052 s: ### CPU [ DSP1], LinkID [ 1], +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209144 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209174 s: [ IPC_OUT_1 ] Link Statistics, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209235 s: ****************************** +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209296 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209479 s: Elapsed time = 10394 msec +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209540 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209601 s: New data Recv = 2.30 fps +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209662 s: Release data Recv = 2.30 fps +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209723 s: Driver/Notify Cb = 35.59 fps +[2020-01-22 17:03:41.881] [IPU1-0] 1574.209845 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210211 s: Input Statistics, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210272 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210303 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210364 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210455 s: -------------------------------------------------- +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210516 s: 0 | 2.30 0. 0 0. 0 2.30 +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210821 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210882 s: Output Statistics, +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210913 s: +[2020-01-22 17:03:41.881] [IPU1-0] 1574.210974 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211035 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211096 s: --------------------------------------------- +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211187 s: 0 | 0 2.30 0. 0 0. 0 +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211462 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211492 s: [ IPC_OUT_1 ] LATENCY, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211553 s: ******************** +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211614 s: Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.211706 s: Source to Link Latency : Avg = 493409 us, Min = 488959 us, Max = 511742 us, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.212285 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712041 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712102 s: ### CPU [IPU1-0], LinkID [ 11], +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712194 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712224 s: [ IPC_IN_1 ] Link Statistics, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712621 s: ****************************** +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712682 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712743 s: Elapsed time = 10896 msec +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712834 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712865 s: Get Full Buf Cb = 2.29 fps +[2020-01-22 17:03:42.318] [IPU1-0] 1574.712956 s: Put Empty Buf Cb = 2.29 fps +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713200 s: Driver/Notify Cb = 35.51 fps +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713292 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713322 s: Input Statistics, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713353 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713414 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713475 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713566 s: -------------------------------------------------- +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713749 s: 0 | 2.29 0. 0 0. 0 2.29 +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713932 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.713963 s: Output Statistics, +[2020-01-22 17:03:42.318] [IPU1-0] 1574.714024 s: +[2020-01-22 17:03:42.318] [IPU1-0] 1574.714054 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:42.318] [IPU1-0] 1574.714146 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:42.318] [IPU1-0] 1574.714512 s: --------------------------------------------- +[2020-01-22 17:03:42.754] [IPU1-0] 1574.714603 s: 0 | 0 2.29 0. 0 0. 0 +[2020-01-22 17:03:42.754] [IPU1-0] 1574.714695 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.714756 s: [ IPC_IN_1 ] LATENCY, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.714847 s: ******************** +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715061 s: Local Link Latency : Avg = 39 us, Min = 30 us, Max = 92 us, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715183 s: Source to Link Latency : Avg = 493597 us, Min = 489173 us, Max = 512047 us, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715305 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715427 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715457 s: ### CPU [IPU1-0], LinkID [ 50], +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715671 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715732 s: [ ALG_OBJECT_DRAW ] Link Statistics, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715823 s: ****************************** +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715884 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.715915 s: Elapsed time = 10673 msec +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716006 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716037 s: New data Recv = 2.34 fps +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716433 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716494 s: Input Statistics, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716525 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716555 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:42.754] [IPU1-0] 1574.716708 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717104 s: -------------------------------------------------- +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717196 s: 0 | 2.34 0. 0 0. 0 2.34 +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717318 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717348 s: Output Statistics, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717409 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717440 s: CH | Out | Out | Out Drop | Out User Drop +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717653 s: | ID | FPS | FPS | FPS +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717745 s: --------------------------------------------- +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717867 s: 0 | 0 2.34 0. 0 0. 0 +[2020-01-22 17:03:42.754] [IPU1-0] 1574.717989 s: +[2020-01-22 17:03:42.754] [IPU1-0] 1574.718019 s: [ ALG_OBJECT_DRAW ] LATENCY, +[2020-01-22 17:03:42.754] [IPU1-0] 1574.718416 s: ******************** +[2020-01-22 17:03:42.754] [IPU1-0] 1574.718477 s: Local Link Latency : Avg = 3507 us, Min = 1342 us, Max = 10248 us, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.718599 s: Source to Link Latency : Avg = 722073 us, Min = 717715 us, Max = 728329 us, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.718721 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719026 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719056 s: ### CPU [IPU1-0], LinkID [ 77], +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719148 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719178 s: [ DISPLAY ] Link Statistics, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719239 s: ****************************** +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719300 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719331 s: Elapsed time = 10675 msec +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719422 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719575 s: New data Recv = 2.24 fps +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719666 s: Driver/Notify Cb = 59.95 fps +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719758 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719819 s: Input Statistics, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719880 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.719910 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:43.191] [IPU1-0] 1574.720002 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:43.191] [IPU1-0] 1574.720368 s: -------------------------------------------------- +[2020-01-22 17:03:43.191] [IPU1-0] 1574.720490 s: 0 | 2.34 0. 0 0. 0 2.34 +[2020-01-22 17:03:43.191] [IPU1-0] 1574.720703 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.720734 s: [ DISPLAY ] LATENCY, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721008 s: ******************** +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721069 s: Local Link Latency : Avg = 68 us, Min = 30 us, Max = 396 us, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721191 s: Source to Link Latency : Avg = 722395 us, Min = 718233 us, Max = 728481 us, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721313 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721344 s: Display UnderFlow Count = 0 +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721405 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721588 s: CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721771 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.721923 s: ### CPU [IPU1-0], LinkID [ 78], +[2020-01-22 17:03:43.191] [IPU1-0] 1574.722351 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.722381 s: [ DISPLAY ] Link Statistics, +[2020-01-22 17:03:43.191] [IPU1-0] 1574.722442 s: ****************************** +[2020-01-22 17:03:43.191] [IPU1-0] 1574.722503 s: +[2020-01-22 17:03:43.191] [IPU1-0] 1574.722564 s: Elapsed time = 11847 msec +[2020-01-22 17:03:43.581] [IPU1-0] 1574.722625 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1574.722656 s: Driver/Notify Cb = 60.1 fps +[2020-01-22 17:03:43.581] [IPU1-0] 1574.722747 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723022 s: Input Statistics, +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723113 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723144 s: CH | In Recv | In Drop | In User Drop | In Process +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723205 s: | FPS | FPS | FPS | FPS +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723296 s: -------------------------------------------------- +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723357 s: 0 | 0. 8 0. 0 0. 0 0. 8 +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723632 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723693 s: [ DISPLAY ] LATENCY, +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723754 s: ******************** +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723815 s: Local Link Latency : Avg = 31 us, Min = 31 us, Max = 31 us, +[2020-01-22 17:03:43.581] [IPU1-0] 1574.723937 s: Source to Link Latency : Avg = 9669 us, Min = 9669 us, Max = 9669 us, +[2020-01-22 17:03:43.581] [IPU1-0] 1574.724059 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1574.724394 s: Display UnderFlow Count = 0 +[2020-01-22 17:03:43.581] [IPU1-0] 1574.724486 s: +[2020-01-22 17:03:43.581] [IPU1-0] 1575.451290 s: I used a clean tidl_OD use case and regenerated it without using VPE and vcodec. Then I modified below for nullSrc input pChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pChInfo->flags, SYSTEM_DF_YUV420SP_UV); +pChInfo->flags = System_Link_Ch_Info_Set_Flag_Buf_Type(pChInfo->flags, SYSTEM_BUFFER_TYPE_VIDEO_FRAME); I used the model located in "VSDK3.7\apps\tools\TIDL_files\" to test. Please advise me, thank you. Gary + +Hi Gary, Sorry, I missed that. SYSTEM_DF_YUV420P is not supported. Please use SYSTEM_DF_YUV420SP_UV (YUV 420 Semi-Planar - Y separate, UV interleaved). You have to create input video in the same format. I don't have video stream to share at the moment. In the example, the input data is not read from file but it is already in DDR so it is much faster. Regards, Stanley + +Hi Stanley, Now I can show the video on TDA3 correctly, thank you. But the fps is quite low, it's only 2.3 in OPP_HIGH mode. For my understanding, TDA3 can run 5fps max. I checked the usage of IPU1_0, DSP1 and EVE, they were 76.9%, 3.9% and 44%, which still have space to speed up. Can you suggest me how to improve fps? Thank you, Gary + +Hi Gary, OPP_HIGH won't help since IPU and CORE only supports one speed. It only helps DSP and EVE and they are not the bottleneck. You can try a faster SD card like UHS-3. However, it will still be quite limited. Another way would be streaming via Ethernet using TFDTP feature in SDK. The throughput is higher than reading from SD card. Regards, Stanley + diff --git a/data2/text/range/30001+/867947.txt b/data2/text/range/30001+/867947.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf3b952cfaf377a2dddfd07629610ec7b983b232 --- /dev/null +++ b/data2/text/range/30001+/867947.txt @@ -0,0 +1,473 @@ +Ticket Name: TDA2SG: TDA2SG VIP porting + +Query Text: +Part Number: TDA2SG I am trying to porting VSDK_03_07 to my new TDA2x board with four LVDS cameras (Serailizer and Deserializer) input to VIPs. A15 runs Linux and all peripherals connected to I2C bus are configured in Linux, the video signals now can be captured by oscilloscope at the VIP input pins which means input video signals are ready for VIP. I would like to run the VSDK built-in sample codes (usecases), would you please tell me where I should do modifications on current VSDK? + +Responses: +the usercase: Linux lvds_vip_single_cam_view_sgx_display + +I am sorry i did not get the question, do you want to check first your input connections? Rgds, Brijesh + +Hello Brijesh, thanks for your response. I am using different camera(ON AP0101+AR0143 YUV422 8bit output) and trying to run TI VSDK 0307 usecases (hlos --> adas --> chains_main_linux_single_cam --> chains_vipSingleCam_SgxDisplay). The deserializer and the camera side have already been configured correctly in Linux and I am pretty sure the video signal from camera is correct. now the output on HDMI display screen is shown below, but without camera image. but I noticed that on the top left corner, it seems the camera signals shown there, because when I disconnect my camera, the top left corner image stopped. would you please suggest what be the next step I should check to get my camera image shown on the screen? HW configurations: SOC: TDA2S RAM: 1GB DDR3 SD card HDMI Output + +Hi, Can you press 'p' on the console and see if capture is working fine first? Rgds, Brijesh + +Hello Brijesh, please check attached for printed performance statistics information. thanks. Jeffrey Yu print_performance_statistics.txt + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +p + [HOST] [IPU2 ] 103.322454 s: + [HOST] [IPU2 ] 103.322546 s: CPU [DSP1 ] Statistics, + [HOST] [IPU2 ] 103.322607 s: ************************* + [HOST] [IPU2 ] 103.322668 s: + [HOST] [IPU2 ] 103.322729 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 99.1% + [HOST] [IPU2 ] 103.322942 s: + [HOST] [IPU2 ] 103.323003 s: LOAD: TSK: MISC : 0.2% + [HOST] [IPU2 ] 103.323095 s: + [HOST] [IPU2 ] 103.323125 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.323247 s: + [HOST] [IPU2 ] 103.323278 s: SYSTEM: Sempahores Objects, 456 of 1050 free + [HOST] [IPU2 ] 103.323369 s: SYSTEM: Task Objects , 91 of 100 free + [HOST] [IPU2 ] 103.323461 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.323552 s: SYSTEM: Hwi Objects , 100 of 100 free + [HOST] [IPU2 ] 103.323644 s: + [HOST] [IPU2 ] 103.323674 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [IPU2 ] 103.323857 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) + [HOST] [IPU2 ] 103.324040 s: + [HOST] [IPU2 ] 103.324071 s: + [HOST] [IPU2 ] 103.324132 s: CPU [DSP2 ] Statistics, + [HOST] [IPU2 ] 103.324193 s: ************************* + [HOST] [IPU2 ] 103.324254 s: + [HOST] [IPU2 ] 103.324284 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%, Low Power: 99.1% + [HOST] [IPU2 ] 103.324437 s: + [HOST] [IPU2 ] 103.324498 s: LOAD: TSK: MISC : 0.2% + [HOST] [IPU2 ] 103.324589 s: + [HOST] [IPU2 ] 103.324620 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.324711 s: + [HOST] [IPU2 ] 103.324742 s: SYSTEM: Sempahores Objects, 456 of 1050 free + [HOST] [IPU2 ] 103.324864 s: SYSTEM: Task Objects , 91 of 100 free + [HOST] [IPU2 ] 103.324955 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.325047 s: SYSTEM: Hwi Objects , 100 of 100 free + [HOST] [IPU2 ] 103.325138 s: + [HOST] [IPU2 ] 103.325169 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + [HOST] [IPU2 ] 103.325352 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516016 B (503 KB) + [HOST] [IPU2 ] 103.325504 s: + [HOST] [IPU2 ] 103.325565 s: + [HOST] [IPU2 ] 103.325596 s: CPU [EVE1 ] Statistics, + [HOST] [IPU2 ] 103.325657 s: ************************* + [HOST] [IPU2 ] 103.325718 s: + [HOST] [IPU2 ] 103.325779 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.1% + [HOST] [IPU2 ] 103.325931 s: + [HOST] [IPU2 ] 103.325992 s: LOAD: TSK: MISC : 0.3% + [HOST] [IPU2 ] 103.326084 s: + [HOST] [IPU2 ] 103.326145 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.326236 s: + [HOST] [IPU2 ] 103.326267 s: SYSTEM: Sempahores Objects, 457 of 1050 free + [HOST] [IPU2 ] 103.326358 s: SYSTEM: Task Objects , 93 of 100 free + [HOST] [IPU2 ] 103.326450 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.326541 s: SYSTEM: Hwi Objects , 99 of 100 free + [HOST] [IPU2 ] 103.326633 s: + [HOST] [IPU2 ] 103.326663 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [IPU2 ] 103.355670 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) + [HOST] [IPU2 ] 103.355914 s: + [HOST] [IPU2 ] 103.355975 s: + [HOST] [IPU2 ] 103.356005 s: CPU [EVE2 ] Statistics, + [HOST] [IPU2 ] 103.356066 s: ************************* + [HOST] [IPU2 ] 103.356127 s: + [HOST] [IPU2 ] 103.356188 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.1% + [HOST] [IPU2 ] 103.356341 s: + [HOST] [IPU2 ] 103.356402 s: LOAD: TSK: MISC : 0.3% + [HOST] [IPU2 ] 103.356493 s: + [HOST] [IPU2 ] 103.356524 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.356615 s: + [HOST] [IPU2 ] 103.356646 s: SYSTEM: Sempahores Objects, 457 of 1050 free + [HOST] [IPU2 ] 103.356737 s: SYSTEM: Task Objects , 93 of 100 free + [HOST] [IPU2 ] 103.356859 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.356951 s: SYSTEM: Hwi Objects , 99 of 100 free + [HOST] [IPU2 ] 103.357042 s: + [HOST] [IPU2 ] 103.357103 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [IPU2 ] 103.357256 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) + [HOST] [IPU2 ] 103.357408 s: + [HOST] [IPU2 ] 103.357469 s: + [HOST] [IPU2 ] 103.357500 s: CPU [EVE3 ] Statistics, + [HOST] [IPU2 ] 103.357561 s: ************************* + [HOST] [IPU2 ] 103.357622 s: + [HOST] [IPU2 ] 103.357683 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.1% + [HOST] [IPU2 ] 103.357835 s: + [HOST] [IPU2 ] 103.357896 s: LOAD: TSK: MISC : 0.3% + [HOST] [IPU2 ] 103.357988 s: + [HOST] [IPU2 ] 103.358018 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.358110 s: + [HOST] [IPU2 ] 103.358171 s: SYSTEM: Sempahores Objects, 457 of 1050 free + [HOST] [IPU2 ] 103.358262 s: SYSTEM: Task Objects , 93 of 100 free + [HOST] [IPU2 ] 103.358354 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.358445 s: SYSTEM: Hwi Objects , 99 of 100 free + [HOST] [IPU2 ] 103.358537 s: + [HOST] [IPU2 ] 103.358567 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [IPU2 ] 103.358720 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) + [HOST] [IPU2 ] 103.358903 s: + [HOST] [IPU2 ] 103.358964 s: + [HOST] [IPU2 ] 103.358994 s: CPU [EVE4 ] Statistics, + [HOST] [IPU2 ] 103.359055 s: ************************* + [HOST] [IPU2 ] 103.359116 s: + [HOST] [IPU2 ] 103.359177 s: LOAD: CPU: 0.6% HWI: 0.2%, SWI:0.1%, Low Power: 93.1% + [HOST] [IPU2 ] 103.359330 s: + [HOST] [IPU2 ] 103.359360 s: LOAD: TSK: MISC : 0.3% + [HOST] [IPU2 ] 103.359452 s: + [HOST] [IPU2 ] 103.359513 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.359604 s: + [HOST] [IPU2 ] 103.359635 s: SYSTEM: Sempahores Objects, 457 of 1050 free + [HOST] [IPU2 ] 103.359726 s: SYSTEM: Task Objects , 93 of 100 free + [HOST] [IPU2 ] 103.360031 s: SYSTEM: Clock Objects , 99 of 100 free + [HOST] [IPU2 ] 103.360123 s: SYSTEM: Hwi Objects , 99 of 100 free + [HOST] [IPU2 ] 103.360214 s: + [HOST] [IPU2 ] 103.360275 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [IPU2 ] 103.389038 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254160 B (248 KB) + [HOST] [IPU2 ] 103.389251 s: + [HOST] [IPU2 ] 103.389312 s: + [HOST] [IPU2 ] 103.389343 s: CPU [IPU2 ] Statistics, + [HOST] [IPU2 ] 103.389404 s: ************************* + [HOST] [IPU2 ] 103.389465 s: + [HOST] [IPU2 ] 103.389526 s: LOAD: CPU: 82.4% HWI: 67.1%, SWI:0.5%, Low Power: 28.8% + [HOST] [IPU2 ] 103.389678 s: + [HOST] [IPU2 ] 103.389739 s: LOAD: TSK: IPC_IN_0 : 0.5% + [HOST] [IPU2 ] 103.389892 s: LOAD: TSK: IPC_OUT_0 : 0.5% + [HOST] [IPU2 ] 103.390014 s: LOAD: TSK: DISPLAY0 : 0.8% + [HOST] [IPU2 ] 103.390136 s: LOAD: TSK: CAPTURE : 10.9% + [HOST] [IPU2 ] 103.390258 s: LOAD: TSK: GrpxSrc0 : 3.1% + [HOST] [IPU2 ] 103.390349 s: LOAD: TSK: STAT_COLL : 1.7% + [HOST] [IPU2 ] 103.390441 s: LOAD: TSK: MISC : -2.-7% + [HOST] [IPU2 ] 103.390532 s: + [HOST] [IPU2 ] 103.390563 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + [HOST] [IPU2 ] 103.390654 s: + [HOST] [IPU2 ] 103.390715 s: SYSTEM: Sempahores Objects, 223 of 1050 free + [HOST] [IPU2 ] 103.390807 s: SYSTEM: Task Objects , 19 of 100 free + [HOST] [IPU2 ] 103.390898 s: SYSTEM: Clock Objects , 96 of 100 free + [HOST] [IPU2 ] 103.390990 s: SYSTEM: Hwi Objects , 93 of 100 free + [HOST] [IPU2 ] 103.391081 s: + [HOST] [IPU2 ] 103.391142 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248360 B (242 KB) + [HOST] [IPU2 ] 103.391295 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 103.391447 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 314572800 B (300 MB), Free size = 268953600 B (256 MB) + [HOST] [IPU2 ] 103.391630 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) + [HOST] [IPU2 ] 103.391783 s: + [HOST] [IPU2 ] 103.392179 s: + [HOST] [IPU2 ] 103.392240 s: Statistics Collector, + [HOST] [IPU2 ] 103.392301 s: + [HOST] [IPU2 ] 103.392362 s: STATISTIC Avg Data Peak Data + [HOST] [IPU2 ] 103.392454 s: COLLECTOR MB/s MB/s + [HOST] [IPU2 ] 103.392545 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.392637 s: SCI_EMIF1 RD+WR | 606.694464 1445.500910 + [HOST] [IPU2 ] 103.392850 s: SCI_EMIF2 RD+WR | 634.348911 1471.543264 + [HOST] [IPU2 ] 103.393003 s: SCI_EMIF1 RD ONLY | 426.342491 574.291438 + [HOST] [IPU2 ] 103.393125 s: SCI_EMIF1 WR ONLY | 180.418724 871.413479 + [HOST] [IPU2 ] 103.393308 s: SCI_EMIF2 RD ONLY | 440.988927 615.366495 + [HOST] [IPU2 ] 103.393430 s: SCI_EMIF2 WR ONLY | 193.447643 877.231043 + [HOST] [IPU2 ] 103.393552 s: SCI_MA_MPU_P1 | 0.924634 158.111475 + [HOST] [IPU2 ] 103.393643 s: SCI_MA_MPU_P2 | 0.794952 156.912412 + [HOST] [IPU2 ] 103.423320 s: SCI_DSS | 746.399444 781.606983 + [HOST] [IPU2 ] 103.423442 s: SCI_IPU1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.423564 s: SCI_VIP1_P1 | 0.058746 0.100423 + [HOST] [IPU2 ] 103.423686 s: SCI_VIP1_P2 | 1.286508 1.549356 + [HOST] [IPU2 ] 103.423778 s: SCI_VPE_P1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.423930 s: SCI_VPE_P2 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424022 s: SCI_DSP1_MDMA | 0.050661 1.131361 + [HOST] [IPU2 ] 103.424144 s: SCI_DSP1_EDMA | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424235 s: SCI_DSP2_MDMA | 0.050650 1.414604 + [HOST] [IPU2 ] 103.424357 s: SCI_DSP2_EDMA | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424449 s: SCI_EVE1_TC0 | 2.464777 6.076142 + [HOST] [IPU2 ] 103.424571 s: SCI_EVE1_TC1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424662 s: SCI_EVE2_TC0 | 2.629806 6.214588 + [HOST] [IPU2 ] 103.424784 s: SCI_EVE2_TC1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424906 s: SCI_EDMA_TC0_RD | 0.000000 0.000000 + [HOST] [IPU2 ] 103.424998 s: SCI_EDMA_TC0_WR | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425120 s: SCI_EDMA_TC1_RD | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425211 s: SCI_EDMA_TC1_WR | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425333 s: SCI_VIP2_P1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425425 s: SCI_VIP2_P2 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425516 s: SCI_VIP3_P1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425638 s: SCI_VIP3_P2 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425730 s: SCI_EVE3_TC0 | 2.627305 7.435715 + [HOST] [IPU2 ] 103.425882 s: SCI_EVE3_TC1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.425974 s: SCI_EVE4_TC0 | 2.622944 7.394196 + [HOST] [IPU2 ] 103.426066 s: SCI_EVE4_TC1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.426188 s: SCI_IVA | 0.000000 0.000000 + [HOST] [IPU2 ] 103.426279 s: SCI_GPU_P1 | 219.774062 1050.625920 + [HOST] [IPU2 ] 103.426401 s: SCI_GPU_P2 | 217.996839 1039.880437 + [HOST] [IPU2 ] 103.426523 s: SCI_GMAC_SW | 0.000000 0.000000 + [HOST] [IPU2 ] 103.426615 s: SCI_OCMC_RAM1 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.426706 s: SCI_OCMC_RAM2 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.426859 s: SCI_OCMC_RAM3 | 0.000000 0.000000 + [HOST] [IPU2 ] 103.556670 s: + [HOST] [IPU2 ] 103.556762 s: + [HOST] [IPU2 ] 103.557158 s: CAPTURE: VIP1 Slice0 PortA FRAME MODE + [HOST] [IPU2 ] 103.557250 s: + [HOST] [IPU2 ] 103.557311 s: [ CAPTURE ] Link Statistics, + [HOST] [IPU2 ] 103.557372 s: ****************************** + [HOST] [IPU2 ] 103.557433 s: + [HOST] [IPU2 ] 103.557463 s: Elapsed time = 30694 msec + [HOST] [IPU2 ] 103.557555 s: + [HOST] [IPU2 ] 103.557585 s: New data Recv = 10467.44 fps + [HOST] [IPU2 ] 103.557677 s: Get Full Buf Cb = 13.71 fps + [HOST] [IPU2 ] 103.557738 s: Put Empty Buf Cb = 13.71 fps + [HOST] [IPU2 ] 103.557860 s: Driver/Notify Cb = 10467.44 fps + [HOST] [IPU2 ] 103.557951 s: + [HOST] [IPU2 ] 103.557982 s: Input Statistics, + [HOST] [IPU2 ] 103.558043 s: + [HOST] [IPU2 ] 103.558073 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [IPU2 ] 103.558165 s: | FPS | FPS | FPS | FPS + [HOST] [IPU2 ] 103.558256 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.558317 s: 0 | 41.18 0. 0 0. 0 41.18 + [HOST] [IPU2 ] 103.558470 s: + [HOST] [IPU2 ] 103.558500 s: Output Statistics, + [HOST] [IPU2 ] 103.558561 s: + [HOST] [IPU2 ] 103.558592 s: CH | Out | Out | Out Drop | Out User Drop + [HOST] [IPU2 ] 103.558683 s: | ID | FPS | FPS | FPS + [HOST] [IPU2 ] 103.558775 s: --------------------------------------------- + [HOST] [IPU2 ] 103.558866 s: 0 | 0 41.18 0. 0 0. 0 + [HOST] [IPU2 ] 103.559019 s: + [HOST] [IPU2 ] 103.559080 s: [VIP1 Slice0 PortA] Statistics + [HOST] [IPU2 ] 103.559141 s: ============================== + [HOST] [IPU2 ] 103.559202 s: Number of request queued : 2075 + [HOST] [IPU2 ] 103.559263 s: Number of request dequeued: 619 + [HOST] [IPU2 ] 103.559354 s: Overflow Count : 0 + [HOST] [IPU2 ] 103.559415 s: + [HOST] [IPU2 ] 103.559446 s: CH | Q DQ Total Top Bot Total Top Bot Min/Max Min/Max Dropped Repeat Fid Desc + [HOST] [IPU2 ] 103.559598 s: (I/S/CH) | Count Count Fields Fields Fields FPS FPS FPS Width Height Frames Frames Repeat Error + [HOST] [IPU2 ] 103.559751 s: --------------------------------------------------------------------------------------------------------------------------- + [HOST] [IPU2 ] 103.560086 s: 00.0.00 | 2080 2080 524386 524386 0 10425 10425 0 1/124 1/18 522306 0 0 0 + [HOST] [IPU2 ] 103.560208 s: + [HOST] [IPU2 ] 103.560574 s: + [HOST] [IPU2 ] 103.560635 s: [ IPC_OUT_0 ] Link Statistics, + [HOST] [IPU2 ] 103.560696 s: ****************************** + [HOST] [IPU2 ] 103.585036 s: + [HOST] [IPU2 ] 103.585097 s: Elapsed time = 30669 msec + [HOST] [IPU2 ] 103.585158 s: + [HOST] [IPU2 ] 103.585219 s: New data Recv = 13.72 fps + [HOST] [IPU2 ] 103.585310 s: Release data Recv = 13.75 fps + [HOST] [IPU2 ] 103.585402 s: Driver/Notify Cb = 23.93 fps + [HOST] [IPU2 ] 103.585463 s: + [HOST] [IPU2 ] 103.585524 s: Input Statistics, + [HOST] [IPU2 ] 103.585585 s: + [HOST] [IPU2 ] 103.585615 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [IPU2 ] 103.585707 s: | FPS | FPS | FPS | FPS + [HOST] [IPU2 ] 103.585798 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.585890 s: 0 | 41.21 0. 0 0. 0 41.21 + [HOST] [IPU2 ] 103.586042 s: + [HOST] [IPU2 ] 103.586073 s: Output Statistics, + [HOST] [IPU2 ] 103.586134 s: + [HOST] [IPU2 ] 103.586164 s: CH | Out | Out | Out Drop | Out User Drop + [HOST] [IPU2 ] 103.586256 s: | ID | FPS | FPS | FPS + [HOST] [IPU2 ] 103.586317 s: --------------------------------------------- + [HOST] [IPU2 ] 103.586408 s: 0 | 0 41.21 0. 0 0. 0 + [HOST] [IPU2 ] 103.586530 s: + [HOST] [IPU2 ] 103.586561 s: [ IPC_OUT_0 ] LATENCY, + [HOST] [IPU2 ] 103.586622 s: ******************** + [HOST] [IPU2 ] 103.586683 s: Local Link Latency : Avg = 7 us, Min = 0 us, Max = 122 us, + [HOST] [IPU2 ] 103.586835 s: Source to Link Latency : Avg = 185 us, Min = 91 us, Max = 397 us, + [HOST] [IPU2 ] 103.586957 s: + [HOST] [IPU2 ] 103.690264 s: + [HOST] [IPU2 ] 103.690325 s: [ IPC_IN_0 ] Link Statistics, + [HOST] [IPU2 ] 103.690386 s: ****************************** + [HOST] [IPU2 ] 103.690447 s: + [HOST] [IPU2 ] 103.690477 s: Elapsed time = 30698 msec + [HOST] [IPU2 ] 103.690569 s: + [HOST] [IPU2 ] 103.690599 s: Get Full Buf Cb = 41.17 fps + [HOST] [IPU2 ] 103.690691 s: Put Empty Buf Cb = 41.14 fps + [HOST] [IPU2 ] 103.690752 s: Driver/Notify Cb = 51.33 fps + [HOST] [IPU2 ] 103.690874 s: + [HOST] [IPU2 ] 103.690904 s: Input Statistics, + [HOST] [IPU2 ] 103.690965 s: + [HOST] [IPU2 ] 103.691026 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [IPU2 ] 103.691087 s: | FPS | FPS | FPS | FPS + [HOST] [IPU2 ] 103.691179 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.691270 s: 0 | 41.14 0. 0 0. 0 41.14 + [HOST] [IPU2 ] 103.691392 s: + [HOST] [IPU2 ] 103.691453 s: Output Statistics, + [HOST] [IPU2 ] 103.691514 s: + [HOST] [IPU2 ] 103.691545 s: CH | Out | Out | Out Drop | Out User Drop + [HOST] [IPU2 ] 103.691636 s: | ID | FPS | FPS | FPS + [HOST] [IPU2 ] 103.691697 s: --------------------------------------------- + [HOST] [IPU2 ] 103.691789 s: 0 | 0 41.14 0. 0 0. 0 + [HOST] [IPU2 ] 103.691941 s: + [HOST] [IPU2 ] 103.692002 s: [ IPC_IN_0 ] LATENCY, + [HOST] [IPU2 ] 103.692033 s: ******************** + [HOST] [IPU2 ] 103.692124 s: Local Link Latency : Avg = 21 us, Min = 0 us, Max = 152 us, + [HOST] [IPU2 ] 103.692246 s: Source to Link Latency : Avg = 97472 us, Min = 33551 us, Max = 166931 us, + [HOST] [IPU2 ] 103.692368 s: + [HOST] [IPU2 ] 103.692429 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ HOST -> IPU2 ] , + [HOST] [IPU2 ] 103.692521 s: *************************************************************** + [HOST] [IPU2 ] 103.692643 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 270, Min = 183, Max = 519 + [HOST] [IPU2 ] 103.692765 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 206, Min = 122, Max = 458 + [HOST] [IPU2 ] 103.693253 s: + [HOST] [IPU2 ] 103.693283 s: [ DISPLAY ] Link Statistics, + [HOST] [IPU2 ] 103.693375 s: ****************************** + [HOST] [IPU2 ] 103.693436 s: + [HOST] [IPU2 ] 103.693466 s: Elapsed time = 30694 msec + [HOST] [IPU2 ] 103.693558 s: + [HOST] [IPU2 ] 103.693588 s: New data Recv = 41.14 fps + [HOST] [IPU2 ] 103.693680 s: Driver/Notify Cb = 60.1 fps + [HOST] [IPU2 ] 103.693741 s: + [HOST] [IPU2 ] 103.693802 s: Input Statistics, + [HOST] [IPU2 ] 103.693893 s: + [HOST] [IPU2 ] 103.693924 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [IPU2 ] 103.694015 s: | FPS | FPS | FPS | FPS + [HOST] [IPU2 ] 103.694076 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.694290 s: 0 | 41.14 0. 0 0. 0 41.14 + [HOST] [IPU2 ] 103.722747 s: + [HOST] [IPU2 ] 103.722869 s: [ DISPLAY ] LATENCY, + [HOST] [IPU2 ] 103.722930 s: ******************** + [HOST] [IPU2 ] 103.722991 s: Local Link Latency : Avg = 41 us, Min = 0 us, Max = 518 us, + [HOST] [IPU2 ] 103.723113 s: Source to Link Latency : Avg = 98721 us, Min = 37455 us, Max = 171079 us, + [HOST] [IPU2 ] 103.723235 s: + [HOST] [IPU2 ] 103.723296 s: + [HOST] [IPU2 ] 103.723327 s: [ DISPLAY VID1 ] Additional Statistics, + [HOST] [IPU2 ] 103.723418 s: ************************************ + [HOST] [IPU2 ] 103.723479 s: Driver Queued = 2080 frames + [HOST] [IPU2 ] 103.723540 s: Driver De-Queued = 2079 frames + [HOST] [IPU2 ] 103.723601 s: Driver Displayed = 3028 frames + [HOST] [IPU2 ] 103.723693 s: Driver Repeated = 949 frames + [HOST] [IPU2 ] 103.723754 s: + [HOST] [IPU2 ] 103.723784 s: ##### DSS DISPC Underflow Count = 0 ##### + [HOST] [IPU2 ] 103.723906 s: + [HOST] [IPU2 ] 103.756847 s: + [HOST] [IPU2 ] 103.756938 s: [ DISPLAY ] Link Statistics, + [HOST] [IPU2 ] 103.756999 s: ****************************** + [HOST] [IPU2 ] 103.757060 s: + [HOST] [IPU2 ] 103.757091 s: Elapsed time = 30694 msec + [HOST] [IPU2 ] 103.757182 s: + [HOST] [IPU2 ] 103.757213 s: Driver/Notify Cb = 60.1 fps + [HOST] [IPU2 ] 103.757304 s: + [HOST] [IPU2 ] 103.757335 s: Input Statistics, + [HOST] [IPU2 ] 103.757396 s: + [HOST] [IPU2 ] 103.757426 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [IPU2 ] 103.757518 s: | FPS | FPS | FPS | FPS + [HOST] [IPU2 ] 103.757609 s: -------------------------------------------------- + [HOST] [IPU2 ] 103.757701 s: + [HOST] [IPU2 ] 103.757731 s: [ DISPLAY ] LATENCY, + [HOST] [IPU2 ] 103.757792 s: ******************** + [HOST] [IPU2 ] 103.757884 s: + [HOST] [IPU2 ] 103.757945 s: + [HOST] [IPU2 ] 103.757975 s: [ DISPLAY GRPX1 ] Additional Statistics, + [HOST] [IPU2 ] 103.758067 s: ************************************ + [HOST] [IPU2 ] 103.758128 s: Driver Queued = 1 frames + [HOST] [IPU2 ] 103.758189 s: Driver De-Queued = 0 frames + [HOST] [IPU2 ] 103.758280 s: Driver Displayed = 3034 frames + [HOST] [IPU2 ] 103.758341 s: Driver Repeated = 3034 frames + [HOST] [IPU2 ] 103.758433 s: + [HOST] [IPU2 ] 103.758463 s: ##### DSS DISPC Underflow Count = 0 ##### + [HOST] [IPU2 ] 103.758555 s: + [HOST] [IPU2 ] 103.759470 s: [CAPTURE] Buffer Q Status, + [HOST] [IPU2 ] 103.759562 s: Empty Q : Elements in Q = 0, Write Idx = 0, Read Idx = 0 + [HOST] [IPU2 ] 103.759653 s: Full Q : Elements in Q = 0, Write Idx = 168, Read Idx = 168 + [HOST] [HOST ] 103.587750 s: + [HOST] [HOST ] 103.587750 s: [ IPC_IN_0 ] Link Statistics, + [HOST] [HOST ] 103.587750 s: ****************************** + [HOST] [HOST ] 103.587750 s: + [HOST] [HOST ] 103.587781 s: Elapsed time = 30695 msec + [HOST] [HOST ] 103.587781 s: + [HOST] [HOST ] 103.587781 s: Get Full Buf Cb = 13.71 fps + [HOST] [HOST ] 103.587781 s: Put Empty Buf Cb = 41.17 fps + [HOST] [HOST ] 103.587781 s: Driver/Notify Cb = 13.71 fps + [HOST] [HOST ] 103.587811 s: + [HOST] [HOST ] 103.587811 s: Input Statistics, + [HOST] [HOST ] 103.587811 s: + [HOST] [HOST ] 103.587811 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [HOST ] 103.587842 s: | FPS | FPS | FPS | FPS + [HOST] [HOST ] 103.587842 s: -------------------------------------------------- + [HOST] [HOST ] 103.587842 s: 0 | 41.17 0. 0 0. 0 41.17 + [HOST] [HOST ] 103.587842 s: + [HOST] [HOST ] 103.587872 s: Output Statistics, + [HOST] [HOST ] 103.587872 s: + [HOST] [HOST ] 103.587872 s: CH | Out | Out | Out Drop | Out User Drop + [HOST] [HOST ] 103.587872 s: | ID | FPS | FPS | FPS + [HOST] [HOST ] 103.587872 s: --------------------------------------------- + [HOST] [HOST ] 103.587872 s: 0 | 0 41.17 0. 0 0. 0 + [HOST] [HOST ] 103.587903 s: + [HOST] [HOST ] 103.587903 s: [ IPC_IN_0 ] LATENCY, + [HOST] [HOST ] 103.587903 s: ******************** + [HOST] [HOST ] 103.587903 s: Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, + [HOST] [HOST ] 103.587933 s: Source to Link Latency : Avg = 424 us, Min = 305 us, Max = 1037 us, + [HOST] [HOST ] 103.587933 s: + [HOST] [HOST ] 103.587933 s: [ IPC_IN_0 ] Detailed IPC Latency Statistics [ IPU2 -> HOST ] , + [HOST] [HOST ] 103.587933 s: *************************************************************** + [HOST] [HOST ] 103.587964 s: IPC One-way Buffer Passing Latency (usecs) : Avg = 264, Min = 152, Max = 915 + [HOST] [HOST ] 103.587964 s: IPC One-way Notify Interrupt Latency (usecs) : Avg = 209, Min = 122, Max = 885 + [HOST] [HOST ] 103.689074 s: + [HOST] [HOST ] 103.689074 s: [ SGXFRMCPY ] Link Statistics, + [HOST] [HOST ] 103.689074 s: ****************************** + [HOST] [HOST ] 103.689105 s: + [HOST] [HOST ] 103.689105 s: Elapsed time = 30728 msec + [HOST] [HOST ] 103.689105 s: + [HOST] [HOST ] 103.689105 s: New data Recv = 13.70 fps + [HOST] [HOST ] 103.689105 s: + [HOST] [HOST ] 103.689105 s: Input Statistics, + [HOST] [HOST ] 103.689135 s: + [HOST] [HOST ] 103.689135 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [HOST ] 103.689135 s: | FPS | FPS | FPS | FPS + [HOST] [HOST ] 103.689135 s: -------------------------------------------------- + [HOST] [HOST ] 103.689135 s: 0 | 41.13 0. 0 0. 0 41.13 + [HOST] [HOST ] 103.689166 s: + [HOST] [HOST ] 103.689166 s: [ SGXFRMCPY ] LATENCY, + [HOST] [HOST ] 103.689166 s: ******************** + [HOST] [HOST ] 103.689166 s: Local Link Latency : Avg = 24291 us, Min = 30 us, Max = 40383 us, + [HOST] [HOST ] 103.689196 s: Source to Link Latency : Avg = 89450 us, Min = 8876 us, Max = 139724 us, + [HOST] [HOST ] 103.689196 s: + [HOST] [HOST ] 103.689288 s: + [HOST] [HOST ] 103.689288 s: [ IPC_OUT_0 ] Link Statistics, + [HOST] [HOST ] 103.689318 s: ****************************** + [HOST] [HOST ] 103.689318 s: + [HOST] [HOST ] 103.689318 s: Elapsed time = 30722 msec + [HOST] [HOST ] 103.689318 s: + [HOST] [HOST ] 103.689318 s: New data Recv = 41.11 fps + [HOST] [HOST ] 103.689349 s: Release data Recv = 33.78 fps + [HOST] [HOST ] 103.689349 s: Driver/Notify Cb = 33.85 fps + [HOST] [HOST ] 103.689349 s: + [HOST] [HOST ] 103.689349 s: Input Statistics, + [HOST] [HOST ] 103.689349 s: + [HOST] [HOST ] 103.689379 s: CH | In Recv | In Drop | In User Drop | In Process + [HOST] [HOST ] 103.689379 s: | FPS | FPS | FPS | FPS + [HOST] [HOST ] 103.689379 s: -------------------------------------------------- + [HOST] [HOST ] 103.689379 s: 0 | 41.11 0. 0 0. 0 41.11 + [HOST] [HOST ] 103.689379 s: + [HOST] [HOST ] 103.689410 s: Output Statistics, + [HOST] [HOST ] 103.689410 s: + [HOST] [HOST ] 103.689410 s: CH | Out | Out | Out Drop | Out User Drop + [HOST] [HOST ] 103.689410 s: | ID | FPS | FPS | FPS + [HOST] [HOST ] 103.689410 s: --------------------------------------------- + [HOST] [HOST ] 103.689410 s: 0 | 0 41.11 0. 0 0. 0 + [HOST] [HOST ] 103.689440 s: + [HOST] [HOST ] 103.689440 s: [ IPC_OUT_0 ] LATENCY, + [HOST] [HOST ] 103.689440 s: ******************** + [HOST] [HOST ] 103.689440 s: Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, + [HOST] [HOST ] 103.689471 s: Source to Link Latency : Avg = 90788 us, Min = 9791 us, Max = 143384 us, + [HOST] [HOST ] 103.689471 s: + [HOST] [HOST ] 103.923717 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] +▒ + +Hi, Brijesh, I have another more questions about VIP. In VSDK_03_07, the VIP in/output default configuration in the function ChainsCommon_SingleCam_SetCapturePrms() in file chains_common.c pInprms->dataFormat = SYSTEM_DF_YUV422P; pOutprms->dataFormat = SYSTEM_DF_YUV420SP_UV; my question: 1. do I need to configure elsewhere to implement this VIP CSC feature? 2. why OV10635 camera signals is configured as YUV422P, not YUV422I_UYVY? 3. If my camera is YUV422I_UYVY, can the VIP be configured as below? pInprms->dataFormat = SYSTEM_DF_YUV422I_UYVY; pOutprms->dataFormat = SYSTEM_DF_YUV420SP_UV; + +Hello TI guys, any feedback? Jeffrey Yu + +Hi Jeffrey, As can be seen from the performance stats. lot of frames are dropped and lot of errornous frames, the frame size is varying from 1 to 128.. This essentially means, your input signal is not correct. Please correct the input, VIP will be able to capture. Rgds, Brijesh + +Hello Brijesh, thanks for your support. it's solved and working correctly. thanks. Jeffrey Yu + diff --git a/data2/text/range/30001+/871212.txt b/data2/text/range/30001+/871212.txt new file mode 100644 index 0000000000000000000000000000000000000000..7bde1406f647fc79a6135e9ff4daf9d6405eb249 --- /dev/null +++ b/data2/text/range/30001+/871212.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2EG-17: TDA2EG-17 vsdk0305 + +Query Text: +Part Number: TDA2EG-17 Other Parts Discussed in Thread: DRA718, DRA722 Hi,master SDK：PROCESSOR_SDK_VISION_03_05_00_00 DRAM: 1 GiB It needs to be started quickly, Load dra7-ipu2-fw.lzop dra7-dsp1-fw.lzop from mol, Linux has been patched under ti'u components \ os'u tools \ Linux \ kernel \ Linux kernel Addon \ earlyboot kernel patches, Start exception, It should be as follows, latea_pagetbl: late_pgtbl@bfc00000 { reg = <0x0 0xbfc00000 0x0 0x100000>; No-map; status = "okay"; } Here is log： Starting kernel ... -->>>4056 [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (ubt@SRV-001) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #10 SMP PREEMPT Tue Jan 7 14:32:52 CST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA718 EVM [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA722 ES2.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef656000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243008 [ 0.000000] Kernel command line: console=ttyO0,921600n8 elevator=noop root=PARTUUID=3e0229c4-03 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 CMA=64M rootfstype=ext4 snd.slots_reserved=1,1 [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 510168K/978944K available (5351K kernel code, 249K rwdata, 1896K rodata, 300K init, 286K bss, 296744K reserved, 172032K cma-reserved, 233472K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc071c04c (7249 kB) [ 0.000000] .init : 0xc071d000 - 0xc0768000 ( 300 kB) [ 0.000000] .data : 0xc0768000 - 0xc07a67e0 ( 250 kB) [ 0.000000] .bss : 0xc07a8000 - 0xc07efb0c ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.001103] Switching to timer-based delay loop, resolution 162ns [ 0.002243] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.003596] OMAP clocksource: 32k_counter at 32768 Hz [ 0.004676] Console: colour dummy device 80x30 [ 0.005304] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.006200] This ensures that you still see kernel messages. Please [ 0.007060] update your kernel commandline. [ 0.007674] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.009081] pid_max: default: 32768 minimum: 301 [ 0.009810] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.010720] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.012215] Initializing cgroup subsys io [ 0.012782] Initializing cgroup subsys memory [ 0.013404] Initializing cgroup subsys devices [ 0.014026] Initializing cgroup subsys freezer [ 0.014644] Initializing cgroup subsys perf_event [ 0.015299] Initializing cgroup subsys pids [ 0.015897] CPU: Testing write buffer coherency: ok [ 0.016767] /cpus/cpu@0 missing clock-frequency property [ 0.017503] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.018334] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.068554] Brought up 1 CPUs [ 0.068973] SMP: Total of 1 processors activated (12.29 BogoMIPS). [ 0.069820] CPU: All CPU(s) started in HYP mode. [ 0.070458] CPU: Virtualization extensions available. [ 0.071468] devtmpfs: initialized [ 0.108593] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110418] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.199929] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.201280] futex hash table entries: 256 (order: 2, 16384 bytes) [ 0.212243] pinctrl core: initialized pinctrl subsystem [ 0.213846] NET: Registered protocol family 16 [ 0.215389] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.238646] cpuidle: using governor ladder [ 0.268667] cpuidle: using governor menu [ 0.276077] platform 43300000.edma: Cannot lookup hwmod 'tpcc' [ 0.277151] platform 43400000.tptc: Cannot lookup hwmod 'tptc0' [ 0.278234] platform 43500000.tptc: Cannot lookup hwmod 'tptc1' [ 0.280182] OMAP GPIO hardware version 0.1 [ 0.306718] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.307818] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.309029] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.310069] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.311350] OMAP DMA hardware revision 0.0 [ 0.390292] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.392115] edma3-tptc 43400000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.393373] edma3-tptc 43500000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.394806] edma 43300000.edma: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.395953] edma 43300000.edma: pm_runtime_get_sync() failed [ 0.401376] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.402339] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.403282] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.404171] Unable to handle kernel paging request at virtual address ffffffec [ 0.405161] pgd = c0003000 [ 0.405541] [ffffffec] *pgd=80000080007003, *pmd=affb6003, *pte=00000000 [ 0.406476] Internal error: Oops: 207 [#1] PREEMPT SMP ARM [ 0.407233] Modules linked in: [ 0.407666] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84 #10 [ 0.408493] Hardware name: Generic DRA72X (Flattened Device Tree) [ 0.409332] task: ef07c000 ti: ef072000 task.ti: ef072000 [ 0.410085] PC is at iommu_fault_handler+0x18/0x14c [ 0.410765] LR is at handle_irq_event_percpu+0xb4/0x160 [ 0.411489] pc : [] lr : [] psr: a0000193 [ 0.411489] sp : ef073b60 ip : ef073ba0 fp : ef073b9c [ 0.413067] r10: c07a5acb r9 : ef1fbc00 r8 : 00000150 [ 0.413787] r7 : 00000000 r6 : 00000000 r5 : ef28f010 r4 : ef28e880 [ 0.414683] r3 : c03022a8 r2 : c068bc6c r1 : ef28f010 r0 : 00000000 [ 0.415580] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 0.416595] Control: 30c5387d Table: 80003000 DAC: fffffffd [ 0.417388] Process swapper/0 (pid: 1, stack limit = 0xef072210) [ 0.418214] Stack: (0xef073b60 to 0xef074000) [ 0.418820] 3b60: 00000000 00000100 c07a4e88 026212c0 00000141 c0765248 ef28e880 ef1fbc60 [ 0.419938] 3b80: 00000000 00000000 00000150 ef1fbc00 ef073be4 ef073ba0 c0083b48 c03022b4 [ 0.421060] 3ba0: ef073bcc ef073bb0 c041b924 c068bc80 c068bc6c c068bc44 60000013 ef1fbc00 [ 0.422180] 3bc0: ef1fbc60 c0784d24 00000000 ef006000 60000013 ef1fbc38 ef073c04 ef073be8 [ 0.423300] 3be0: c0083c34 c0083aa0 ef1fbc00 ef1fbc60 c0784d24 00000000 ef073c24 ef073c08 [ 0.424420] 3c00: c0086f78 c0083c00 c0765424 00000150 00000000 00000000 ef073c34 ef073c28 [ 0.425538] 3c20: c0083174 c0086ec4 ef073c5c ef073c38 c008344c c0083154 c076a8e4 fa21200c [ 0.426659] 3c40: ef073c88 fa212000 fa213000 60000013 ef073c84 ef073c60 c000948c c00833f4 [ 0.427777] 3c60: c054017c 60000013 ffffffff ef073cbc ef1fbc60 60000013 ef073ce4 ef073c88 [ 0.428898] 3c80: c0013e80 c0009458 ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.430017] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.431136] 3cc0: c0085a40 c054017c 60000013 ffffffff ef28f010 00000150 ef073d2c ef073ce8 [ 0.432255] 3ce0: c0085a40 c0540160 ef073d1c ef073cf8 c0089564 ef1fbc10 c03022a8 00000001 [ 0.433374] 3d00: ef073d1c ef28e880 c03022a8 ef28f010 00000000 00000150 00000080 ef1fbc00 [ 0.434492] 3d20: ef073d5c ef073d30 c0085d64 c0085610 00000080 c03022a8 ef28e850 ef28f010 [ 0.435610] 3d40: 00000150 00000000 ef203a10 00000000 ef073d8c ef073d60 c0087fd8 c0085ca0 [ 0.436728] 3d60: c06876a8 ef28f010 ef28f010 ef203a00 00000000 ef203a10 ef69e210 c071d600 [ 0.437847] 3d80: ef073dc4 ef073d90 c0302afc c0087f7c 00000080 c06876a8 ef28f010 c07e655c [ 0.438967] 3da0: ef203a10 c07e655c ef203a10 c0792a58 fffffdfb 00000000 ef073de4 ef073dc8 [ 0.440087] 3dc0: c036c01c c0302918 c07e655c ef203a10 00000000 c0792a58 ef073e0c ef073de8 [ 0.441208] 3de0: c036a5a4 c036bfd4 ef203a10 c0792a58 ef203a44 00000000 00000066 c071d600 [ 0.442328] 3e00: ef073e2c ef073e10 c036a72c c036a3ac 00000000 c0792a58 c036a698 00000000 [ 0.443448] 3e20: ef073e54 ef073e30 c036882c c036a6a4 ef05e05c ef2026b4 ef05e070 c0792a58 [ 0.444567] 3e40: ef28b380 c0794960 ef073e64 ef073e58 c0369e90 c03687c8 ef073e8c ef073e68 [ 0.445685] 3e60: c0369acc c0369e78 c06b2510 ef073e78 c0792a58 c07416b4 c076d6b0 ef287f40 [ 0.446802] 3e80: ef073ea4 ef073e90 c036aecc c0369930 c0794960 c07416b4 ef073ebc ef073ea8 [ 0.447922] 3ea0: c036bf44 c036ae58 c076d6b0 c07416b4 ef073ed4 ef073ec0 c0741744 c036bf08 [ 0.449041] 3ec0: c0302118 00000000 ef073f54 ef073ed8 c000982c c07416c0 ef073efc ef073ee8 [ 0.450158] 3ee0: c071d61c c025763c ef663a00 c055f0bc ef073f54 ef073f00 c0052f84 c071d60c [ 0.451277] 3f00: c002aa2c c0689ae8 c0689b34 c06894dc 00000004 00000004 00000000 c071a220 [ 0.452396] 3f20: c067ff5c 00000000 c002aa2c c07a8000 c071a220 c0763450 c075782c 00000066 [ 0.453515] 3f40: c071d600 00000005 ef073f94 ef073f58 c071dfb4 c00097a0 00000004 00000004 [ 0.454636] 3f60: 00000000 c071d600 00000000 c07a8000 c053b604 00000000 00000000 00000000 [ 0.455755] 3f80: 00000000 00000000 ef073fac ef073f98 c053b61c c071ddec 00000000 c053b604 [ 0.456875] 3fa0: 00000000 ef073fb0 c000fb88 c053b610 00000000 00000000 00000000 00000000 [ 0.457995] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 0.459114] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 0.460229] Backtrace: [ 0.460585] [] (iommu_fault_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 0.461842] r9:ef1fbc00 r8:00000150 r7:00000000 r6:00000000 r5:ef1fbc60 r4:ef28e880 [ 0.462923] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 0.464135] r10:ef1fbc38 r9:60000013 r8:ef006000 r7:00000000 r6:c0784d24 r5:ef1fbc60 [ 0.465221] r4:ef1fbc00 [ 0.465587] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 0.466751] r7:00000000 r6:c0784d24 r5:ef1fbc60 r4:ef1fbc00 [ 0.467546] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 0.468719] r7:00000000 r6:00000000 r5:00000150 r4:c0765424 [ 0.469514] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 0.470706] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 0.471843] r9:60000013 r8:fa213000 r7:fa212000 r6:ef073c88 r5:fa21200c r4:c076a8e4 [ 0.472920] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 0.473945] Exception stack(0xef073c88 to 0xef073cd0) [ 0.474643] 3c80: ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.475761] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.476877] 3cc0: c0085a40 c054017c 60000013 ffffffff [ 0.477573] r9:60000013 r8:ef1fbc60 r7:ef073cbc r6:ffffffff r5:60000013 r4:c054017c [ 0.478660] [] (_raw_spin_unlock_irqrestore) from [] (__setup_irq+0x43c/0x5fc) [ 0.479884] [] (__setup_irq) from [] (request_threaded_irq+0xd0/0x158) [ 0.481013] r10:ef1fbc00 r9:00000080 r8:00000150 r7:00000000 r6:ef28f010 r5:c03022a8 [ 0.482101] r4:ef28e880 [ 0.482464] [] (request_threaded_irq) from [] (devm_request_threaded_irq+0x68/0xac) [ 0.483742] r10:00000000 r9:ef203a10 r8:00000000 r7:00000150 r6:ef28f010 r5:ef28e850 [ 0.484824] r4:c03022a8 r3:00000080 [ 0.485334] [] (devm_request_threaded_irq) from [] (omap_iommu_probe+0x1f0/0x364) [ 0.486589] r9:c071d600 r8:ef69e210 r7:ef203a10 r6:00000000 r5:ef203a00 r4:ef28f010 [ 0.487671] [] (omap_iommu_probe) from [] (platform_drv_probe+0x54/0xb8) [ 0.488822] r8:00000000 r7:fffffdfb r6:c0792a58 r5:ef203a10 r4:c07e655c [ 0.489762] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) [ 0.490970] r7:c0792a58 r6:00000000 r5:ef203a10 r4:c07e655c [ 0.491764] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 0.492914] r9:c071d600 r8:00000066 r7:00000000 r6:ef203a44 r5:c0792a58 r4:ef203a10 [ 0.493993] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 0.495108] r7:00000000 r6:c036a698 r5:c0792a58 r4:00000000 [ 0.495901] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 0.496993] r6:c0794960 r5:ef28b380 r4:c0792a58 [ 0.497644] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 0.498743] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 0.499846] r7:ef287f40 r6:c076d6b0 r5:c07416b4 r4:c0792a58 [ 0.500638] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) [ 0.501869] r5:c07416b4 r4:c0794960 [ 0.502377] [] (__platform_driver_register) from [] (omap_iommu_init+0x90/0xa0) [ 0.503611] r5:c07416b4 r4:c076d6b0 [ 0.504119] [] (omap_iommu_init) from [] (do_one_initcall+0x98/0x1e4) [ 0.505242] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x278) [ 0.506428] r10:00000005 r9:c071d600 r8:00000066 r7:c075782c r6:c0763450 r5:c071a220 [ 0.507513] r4:c07a8000 [ 0.507876] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf8) [ 0.508990] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c053b604 [ 0.510074] r4:c07a8000 [ 0.510441] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 0.511474] r5:c053b604 r4:00000000 [ 0.511981] Code: e24cb004 e24dd018 e1a05001 e5910010 (e5103014) [ 0.512831] ---[ end trace 66e0dc7b52edd6a2 ]--- [ 0.513470] Kernel panic - not syncing: Fatal exception in interrupt [ 0.514347] ---[ end Kernel panic - not syncing: Fatal exception in interrupt * Remote cores loaded by bootloader */ LATE_ATTACH(ipu1); LATE_ATTACH(mmu_ipu1); #if 1 LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); #endif /* timers used by the remote cores */ LATE_ATTACH(timer3); LATE_ATTACH(timer4); LATE_ATTACH(timer5); LATE_ATTACH(timer6); LATE_ATTACH(timer7); LATE_ATTACH(timer9); LATE_ATTACH(timer11); LATE_ATTACH(timer13); LATE_ATTACH(timer14); LATE_ATTACH(mailbox5); LATE_ATTACH(mailbox6); LATE_ATTACH(mailbox7); delete #if 1 LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); #endif The system can start normally and apps.out can also start normally. If deleted #if 1 LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); #endif Whether IPU DSP is booted by mol, how to judge whether it is booted by MLO? + +Responses: +Hi, You can judge from the kernel log if kernel is loading images or not. You should see a print while booting which indicates that kernel is actually loading image on the remoteproc core If the print is not there, then kernel will only do late attach and proc will be up. Regards, Nikhil D + +Uboot does not boot, it should be turned on LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); Need to boot DSP IPU from MLO However, the following exceptions will be reported after opening Here is log： Starting kernel ... -->>>4056 [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (ubt@SRV-001) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #10 SMP PREEMPT Tue Jan 7 14:32:52 CST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA718 EVM [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA722 ES2.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef656000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243008 [ 0.000000] Kernel command line: console=ttyO0,921600n8 elevator=noop root=PARTUUID=3e0229c4-03 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 CMA=64M rootfstype=ext4 snd.slots_reserved=1,1 [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 510168K/978944K available (5351K kernel code, 249K rwdata, 1896K rodata, 300K init, 286K bss, 296744K reserved, 172032K cma-reserved, 233472K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc071c04c (7249 kB) [ 0.000000] .init : 0xc071d000 - 0xc0768000 ( 300 kB) [ 0.000000] .data : 0xc0768000 - 0xc07a67e0 ( 250 kB) [ 0.000000] .bss : 0xc07a8000 - 0xc07efb0c ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.001103] Switching to timer-based delay loop, resolution 162ns [ 0.002243] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.003596] OMAP clocksource: 32k_counter at 32768 Hz [ 0.004676] Console: colour dummy device 80x30 [ 0.005304] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.006200] This ensures that you still see kernel messages. Please [ 0.007060] update your kernel commandline. [ 0.007674] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.009081] pid_max: default: 32768 minimum: 301 [ 0.009810] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.010720] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.012215] Initializing cgroup subsys io [ 0.012782] Initializing cgroup subsys memory [ 0.013404] Initializing cgroup subsys devices [ 0.014026] Initializing cgroup subsys freezer [ 0.014644] Initializing cgroup subsys perf_event [ 0.015299] Initializing cgroup subsys pids [ 0.015897] CPU: Testing write buffer coherency: ok [ 0.016767] /cpus/cpu@0 missing clock-frequency property [ 0.017503] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.018334] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.068554] Brought up 1 CPUs [ 0.068973] SMP: Total of 1 processors activated (12.29 BogoMIPS). [ 0.069820] CPU: All CPU(s) started in HYP mode. [ 0.070458] CPU: Virtualization extensions available. [ 0.071468] devtmpfs: initialized [ 0.108593] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110418] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.199929] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.201280] futex hash table entries: 256 (order: 2, 16384 bytes) [ 0.212243] pinctrl core: initialized pinctrl subsystem [ 0.213846] NET: Registered protocol family 16 [ 0.215389] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.238646] cpuidle: using governor ladder [ 0.268667] cpuidle: using governor menu [ 0.276077] platform 43300000.edma: Cannot lookup hwmod 'tpcc' [ 0.277151] platform 43400000.tptc: Cannot lookup hwmod 'tptc0' [ 0.278234] platform 43500000.tptc: Cannot lookup hwmod 'tptc1' [ 0.280182] OMAP GPIO hardware version 0.1 [ 0.306718] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.307818] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.309029] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.310069] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.311350] OMAP DMA hardware revision 0.0 [ 0.390292] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.392115] edma3-tptc 43400000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.393373] edma3-tptc 43500000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.394806] edma 43300000.edma: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.395953] edma 43300000.edma: pm_runtime_get_sync() failed [ 0.401376] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.402339] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.403282] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.404171] Unable to handle kernel paging request at virtual address ffffffec [ 0.405161] pgd = c0003000 [ 0.405541] [ffffffec] *pgd=80000080007003, *pmd=affb6003, *pte=00000000 [ 0.406476] Internal error: Oops: 207 [#1] PREEMPT SMP ARM [ 0.407233] Modules linked in: [ 0.407666] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84 #10 [ 0.408493] Hardware name: Generic DRA72X (Flattened Device Tree) [ 0.409332] task: ef07c000 ti: ef072000 task.ti: ef072000 [ 0.410085] PC is at iommu_fault_handler+0x18/0x14c [ 0.410765] LR is at handle_irq_event_percpu+0xb4/0x160 [ 0.411489] pc : [] lr : [] psr: a0000193 [ 0.411489] sp : ef073b60 ip : ef073ba0 fp : ef073b9c [ 0.413067] r10: c07a5acb r9 : ef1fbc00 r8 : 00000150 [ 0.413787] r7 : 00000000 r6 : 00000000 r5 : ef28f010 r4 : ef28e880 [ 0.414683] r3 : c03022a8 r2 : c068bc6c r1 : ef28f010 r0 : 00000000 [ 0.415580] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 0.416595] Control: 30c5387d Table: 80003000 DAC: fffffffd [ 0.417388] Process swapper/0 (pid: 1, stack limit = 0xef072210) [ 0.418214] Stack: (0xef073b60 to 0xef074000) [ 0.418820] 3b60: 00000000 00000100 c07a4e88 026212c0 00000141 c0765248 ef28e880 ef1fbc60 [ 0.419938] 3b80: 00000000 00000000 00000150 ef1fbc00 ef073be4 ef073ba0 c0083b48 c03022b4 [ 0.421060] 3ba0: ef073bcc ef073bb0 c041b924 c068bc80 c068bc6c c068bc44 60000013 ef1fbc00 [ 0.422180] 3bc0: ef1fbc60 c0784d24 00000000 ef006000 60000013 ef1fbc38 ef073c04 ef073be8 [ 0.423300] 3be0: c0083c34 c0083aa0 ef1fbc00 ef1fbc60 c0784d24 00000000 ef073c24 ef073c08 [ 0.424420] 3c00: c0086f78 c0083c00 c0765424 00000150 00000000 00000000 ef073c34 ef073c28 [ 0.425538] 3c20: c0083174 c0086ec4 ef073c5c ef073c38 c008344c c0083154 c076a8e4 fa21200c [ 0.426659] 3c40: ef073c88 fa212000 fa213000 60000013 ef073c84 ef073c60 c000948c c00833f4 [ 0.427777] 3c60: c054017c 60000013 ffffffff ef073cbc ef1fbc60 60000013 ef073ce4 ef073c88 [ 0.428898] 3c80: c0013e80 c0009458 ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.430017] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.431136] 3cc0: c0085a40 c054017c 60000013 ffffffff ef28f010 00000150 ef073d2c ef073ce8 [ 0.432255] 3ce0: c0085a40 c0540160 ef073d1c ef073cf8 c0089564 ef1fbc10 c03022a8 00000001 [ 0.433374] 3d00: ef073d1c ef28e880 c03022a8 ef28f010 00000000 00000150 00000080 ef1fbc00 [ 0.434492] 3d20: ef073d5c ef073d30 c0085d64 c0085610 00000080 c03022a8 ef28e850 ef28f010 [ 0.435610] 3d40: 00000150 00000000 ef203a10 00000000 ef073d8c ef073d60 c0087fd8 c0085ca0 [ 0.436728] 3d60: c06876a8 ef28f010 ef28f010 ef203a00 00000000 ef203a10 ef69e210 c071d600 [ 0.437847] 3d80: ef073dc4 ef073d90 c0302afc c0087f7c 00000080 c06876a8 ef28f010 c07e655c [ 0.438967] 3da0: ef203a10 c07e655c ef203a10 c0792a58 fffffdfb 00000000 ef073de4 ef073dc8 [ 0.440087] 3dc0: c036c01c c0302918 c07e655c ef203a10 00000000 c0792a58 ef073e0c ef073de8 [ 0.441208] 3de0: c036a5a4 c036bfd4 ef203a10 c0792a58 ef203a44 00000000 00000066 c071d600 [ 0.442328] 3e00: ef073e2c ef073e10 c036a72c c036a3ac 00000000 c0792a58 c036a698 00000000 [ 0.443448] 3e20: ef073e54 ef073e30 c036882c c036a6a4 ef05e05c ef2026b4 ef05e070 c0792a58 [ 0.444567] 3e40: ef28b380 c0794960 ef073e64 ef073e58 c0369e90 c03687c8 ef073e8c ef073e68 [ 0.445685] 3e60: c0369acc c0369e78 c06b2510 ef073e78 c0792a58 c07416b4 c076d6b0 ef287f40 [ 0.446802] 3e80: ef073ea4 ef073e90 c036aecc c0369930 c0794960 c07416b4 ef073ebc ef073ea8 [ 0.447922] 3ea0: c036bf44 c036ae58 c076d6b0 c07416b4 ef073ed4 ef073ec0 c0741744 c036bf08 [ 0.449041] 3ec0: c0302118 00000000 ef073f54 ef073ed8 c000982c c07416c0 ef073efc ef073ee8 [ 0.450158] 3ee0: c071d61c c025763c ef663a00 c055f0bc ef073f54 ef073f00 c0052f84 c071d60c [ 0.451277] 3f00: c002aa2c c0689ae8 c0689b34 c06894dc 00000004 00000004 00000000 c071a220 [ 0.452396] 3f20: c067ff5c 00000000 c002aa2c c07a8000 c071a220 c0763450 c075782c 00000066 [ 0.453515] 3f40: c071d600 00000005 ef073f94 ef073f58 c071dfb4 c00097a0 00000004 00000004 [ 0.454636] 3f60: 00000000 c071d600 00000000 c07a8000 c053b604 00000000 00000000 00000000 [ 0.455755] 3f80: 00000000 00000000 ef073fac ef073f98 c053b61c c071ddec 00000000 c053b604 [ 0.456875] 3fa0: 00000000 ef073fb0 c000fb88 c053b610 00000000 00000000 00000000 00000000 [ 0.457995] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 0.459114] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 0.460229] Backtrace: [ 0.460585] [] (iommu_fault_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 0.461842] r9:ef1fbc00 r8:00000150 r7:00000000 r6:00000000 r5:ef1fbc60 r4:ef28e880 [ 0.462923] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 0.464135] r10:ef1fbc38 r9:60000013 r8:ef006000 r7:00000000 r6:c0784d24 r5:ef1fbc60 [ 0.465221] r4:ef1fbc00 [ 0.465587] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 0.466751] r7:00000000 r6:c0784d24 r5:ef1fbc60 r4:ef1fbc00 [ 0.467546] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 0.468719] r7:00000000 r6:00000000 r5:00000150 r4:c0765424 [ 0.469514] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 0.470706] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 0.471843] r9:60000013 r8:fa213000 r7:fa212000 r6:ef073c88 r5:fa21200c r4:c076a8e4 [ 0.472920] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 0.473945] Exception stack(0xef073c88 to 0xef073cd0) [ 0.474643] 3c80: ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.475761] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.476877] 3cc0: c0085a40 c054017c 60000013 ffffffff [ 0.477573] r9:60000013 r8:ef1fbc60 r7:ef073cbc r6:ffffffff r5:60000013 r4:c054017c [ 0.478660] [] (_raw_spin_unlock_irqrestore) from [] (__setup_irq+0x43c/0x5fc) [ 0.479884] [] (__setup_irq) from [] (request_threaded_irq+0xd0/0x158) [ 0.481013] r10:ef1fbc00 r9:00000080 r8:00000150 r7:00000000 r6:ef28f010 r5:c03022a8 [ 0.482101] r4:ef28e880 [ 0.482464] [] (request_threaded_irq) from [] (devm_request_threaded_irq+0x68/0xac) [ 0.483742] r10:00000000 r9:ef203a10 r8:00000000 r7:00000150 r6:ef28f010 r5:ef28e850 [ 0.484824] r4:c03022a8 r3:00000080 [ 0.485334] [] (devm_request_threaded_irq) from [] (omap_iommu_probe+0x1f0/0x364) [ 0.486589] r9:c071d600 r8:ef69e210 r7:ef203a10 r6:00000000 r5:ef203a00 r4:ef28f010 [ 0.487671] [] (omap_iommu_probe) from [] (platform_drv_probe+0x54/0xb8) [ 0.488822] r8:00000000 r7:fffffdfb r6:c0792a58 r5:ef203a10 r4:c07e655c [ 0.489762] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) [ 0.490970] r7:c0792a58 r6:00000000 r5:ef203a10 r4:c07e655c [ 0.491764] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 0.492914] r9:c071d600 r8:00000066 r7:00000000 r6:ef203a44 r5:c0792a58 r4:ef203a10 [ 0.493993] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 0.495108] r7:00000000 r6:c036a698 r5:c0792a58 r4:00000000 [ 0.495901] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 0.496993] r6:c0794960 r5:ef28b380 r4:c0792a58 [ 0.497644] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 0.498743] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 0.499846] r7:ef287f40 r6:c076d6b0 r5:c07416b4 r4:c0792a58 [ 0.500638] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) [ 0.501869] r5:c07416b4 r4:c0794960 [ 0.502377] [] (__platform_driver_register) from [] (omap_iommu_init+0x90/0xa0) [ 0.503611] r5:c07416b4 r4:c076d6b0 [ 0.504119] [] (omap_iommu_init) from [] (do_one_initcall+0x98/0x1e4) [ 0.505242] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x278) [ 0.506428] r10:00000005 r9:c071d600 r8:00000066 r7:c075782c r6:c0763450 r5:c071a220 [ 0.507513] r4:c07a8000 [ 0.507876] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf8) [ 0.508990] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c053b604 [ 0.510074] r4:c07a8000 [ 0.510441] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 0.511474] r5:c053b604 r4:00000000 [ 0.511981] Code: e24cb004 e24dd018 e1a05001 e5910010 (e5103014) [ 0.512831] ---[ end trace 66e0dc7b52edd6a2 ]--- [ 0.513470] Kernel panic - not syncing: Fatal exception in interrupt [ 0.514347] ---[ end Kernel panic - not syncing: Fatal exception in interrupt + +Uboot does not boot, it should be turned on LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); Need to boot DSP IPU from MLO However, the following exceptions will be reported after opening Here is log： Starting kernel ... -->>>4056 [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84 (ubt@SRV-001) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #10 SMP PREEMPT Tue Jan 7 14:32:52 CST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA718 EVM [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0x00000000be400000 [ 0.000000] Forcing write-allocate cache policy for SMP [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier [ 0.000000] DRA722 ES2.1 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef656000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243008 [ 0.000000] Kernel command line: console=ttyO0,921600n8 elevator=noop root=PARTUUID=3e0229c4-03 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 CMA=64M rootfstype=ext4 snd.slots_reserved=1,1 [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 510168K/978944K available (5351K kernel code, 249K rwdata, 1896K rodata, 300K init, 286K bss, 296744K reserved, 172032K cma-reserved, 233472K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc071c04c (7249 kB) [ 0.000000] .init : 0xc071d000 - 0xc0768000 ( 300 kB) [ 0.000000] .data : 0xc0768000 - 0xc07a67e0 ( 250 kB) [ 0.000000] .bss : 0xc07a8000 - 0xc07efb0c ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. [ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.001103] Switching to timer-based delay loop, resolution 162ns [ 0.002243] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.003596] OMAP clocksource: 32k_counter at 32768 Hz [ 0.004676] Console: colour dummy device 80x30 [ 0.005304] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.006200] This ensures that you still see kernel messages. Please [ 0.007060] update your kernel commandline. [ 0.007674] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.009081] pid_max: default: 32768 minimum: 301 [ 0.009810] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.010720] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.012215] Initializing cgroup subsys io [ 0.012782] Initializing cgroup subsys memory [ 0.013404] Initializing cgroup subsys devices [ 0.014026] Initializing cgroup subsys freezer [ 0.014644] Initializing cgroup subsys perf_event [ 0.015299] Initializing cgroup subsys pids [ 0.015897] CPU: Testing write buffer coherency: ok [ 0.016767] /cpus/cpu@0 missing clock-frequency property [ 0.017503] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.018334] Setting up static identity map for 0x80008380 - 0x800083e0 [ 0.068554] Brought up 1 CPUs [ 0.068973] SMP: Total of 1 processors activated (12.29 BogoMIPS). [ 0.069820] CPU: All CPU(s) started in HYP mode. [ 0.070458] CPU: Virtualization extensions available. [ 0.071468] devtmpfs: initialized [ 0.108593] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.110418] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.199929] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.201280] futex hash table entries: 256 (order: 2, 16384 bytes) [ 0.212243] pinctrl core: initialized pinctrl subsystem [ 0.213846] NET: Registered protocol family 16 [ 0.215389] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.238646] cpuidle: using governor ladder [ 0.268667] cpuidle: using governor menu [ 0.276077] platform 43300000.edma: Cannot lookup hwmod 'tpcc' [ 0.277151] platform 43400000.tptc: Cannot lookup hwmod 'tptc0' [ 0.278234] platform 43500000.tptc: Cannot lookup hwmod 'tptc1' [ 0.280182] OMAP GPIO hardware version 0.1 [ 0.306718] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.307818] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.309029] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.310069] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.311350] OMAP DMA hardware revision 0.0 [ 0.390292] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.392115] edma3-tptc 43400000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.393373] edma3-tptc 43500000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.394806] edma 43300000.edma: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.395953] edma 43300000.edma: pm_runtime_get_sync() failed [ 0.401376] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.402339] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.403282] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.404171] Unable to handle kernel paging request at virtual address ffffffec [ 0.405161] pgd = c0003000 [ 0.405541] [ffffffec] *pgd=80000080007003, *pmd=affb6003, *pte=00000000 [ 0.406476] Internal error: Oops: 207 [#1] PREEMPT SMP ARM [ 0.407233] Modules linked in: [ 0.407666] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.84 #10 [ 0.408493] Hardware name: Generic DRA72X (Flattened Device Tree) [ 0.409332] task: ef07c000 ti: ef072000 task.ti: ef072000 [ 0.410085] PC is at iommu_fault_handler+0x18/0x14c [ 0.410765] LR is at handle_irq_event_percpu+0xb4/0x160 [ 0.411489] pc : [] lr : [] psr: a0000193 [ 0.411489] sp : ef073b60 ip : ef073ba0 fp : ef073b9c [ 0.413067] r10: c07a5acb r9 : ef1fbc00 r8 : 00000150 [ 0.413787] r7 : 00000000 r6 : 00000000 r5 : ef28f010 r4 : ef28e880 [ 0.414683] r3 : c03022a8 r2 : c068bc6c r1 : ef28f010 r0 : 00000000 [ 0.415580] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 0.416595] Control: 30c5387d Table: 80003000 DAC: fffffffd [ 0.417388] Process swapper/0 (pid: 1, stack limit = 0xef072210) [ 0.418214] Stack: (0xef073b60 to 0xef074000) [ 0.418820] 3b60: 00000000 00000100 c07a4e88 026212c0 00000141 c0765248 ef28e880 ef1fbc60 [ 0.419938] 3b80: 00000000 00000000 00000150 ef1fbc00 ef073be4 ef073ba0 c0083b48 c03022b4 [ 0.421060] 3ba0: ef073bcc ef073bb0 c041b924 c068bc80 c068bc6c c068bc44 60000013 ef1fbc00 [ 0.422180] 3bc0: ef1fbc60 c0784d24 00000000 ef006000 60000013 ef1fbc38 ef073c04 ef073be8 [ 0.423300] 3be0: c0083c34 c0083aa0 ef1fbc00 ef1fbc60 c0784d24 00000000 ef073c24 ef073c08 [ 0.424420] 3c00: c0086f78 c0083c00 c0765424 00000150 00000000 00000000 ef073c34 ef073c28 [ 0.425538] 3c20: c0083174 c0086ec4 ef073c5c ef073c38 c008344c c0083154 c076a8e4 fa21200c [ 0.426659] 3c40: ef073c88 fa212000 fa213000 60000013 ef073c84 ef073c60 c000948c c00833f4 [ 0.427777] 3c60: c054017c 60000013 ffffffff ef073cbc ef1fbc60 60000013 ef073ce4 ef073c88 [ 0.428898] 3c80: c0013e80 c0009458 ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.430017] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.431136] 3cc0: c0085a40 c054017c 60000013 ffffffff ef28f010 00000150 ef073d2c ef073ce8 [ 0.432255] 3ce0: c0085a40 c0540160 ef073d1c ef073cf8 c0089564 ef1fbc10 c03022a8 00000001 [ 0.433374] 3d00: ef073d1c ef28e880 c03022a8 ef28f010 00000000 00000150 00000080 ef1fbc00 [ 0.434492] 3d20: ef073d5c ef073d30 c0085d64 c0085610 00000080 c03022a8 ef28e850 ef28f010 [ 0.435610] 3d40: 00000150 00000000 ef203a10 00000000 ef073d8c ef073d60 c0087fd8 c0085ca0 [ 0.436728] 3d60: c06876a8 ef28f010 ef28f010 ef203a00 00000000 ef203a10 ef69e210 c071d600 [ 0.437847] 3d80: ef073dc4 ef073d90 c0302afc c0087f7c 00000080 c06876a8 ef28f010 c07e655c [ 0.438967] 3da0: ef203a10 c07e655c ef203a10 c0792a58 fffffdfb 00000000 ef073de4 ef073dc8 [ 0.440087] 3dc0: c036c01c c0302918 c07e655c ef203a10 00000000 c0792a58 ef073e0c ef073de8 [ 0.441208] 3de0: c036a5a4 c036bfd4 ef203a10 c0792a58 ef203a44 00000000 00000066 c071d600 [ 0.442328] 3e00: ef073e2c ef073e10 c036a72c c036a3ac 00000000 c0792a58 c036a698 00000000 [ 0.443448] 3e20: ef073e54 ef073e30 c036882c c036a6a4 ef05e05c ef2026b4 ef05e070 c0792a58 [ 0.444567] 3e40: ef28b380 c0794960 ef073e64 ef073e58 c0369e90 c03687c8 ef073e8c ef073e68 [ 0.445685] 3e60: c0369acc c0369e78 c06b2510 ef073e78 c0792a58 c07416b4 c076d6b0 ef287f40 [ 0.446802] 3e80: ef073ea4 ef073e90 c036aecc c0369930 c0794960 c07416b4 ef073ebc ef073ea8 [ 0.447922] 3ea0: c036bf44 c036ae58 c076d6b0 c07416b4 ef073ed4 ef073ec0 c0741744 c036bf08 [ 0.449041] 3ec0: c0302118 00000000 ef073f54 ef073ed8 c000982c c07416c0 ef073efc ef073ee8 [ 0.450158] 3ee0: c071d61c c025763c ef663a00 c055f0bc ef073f54 ef073f00 c0052f84 c071d60c [ 0.451277] 3f00: c002aa2c c0689ae8 c0689b34 c06894dc 00000004 00000004 00000000 c071a220 [ 0.452396] 3f20: c067ff5c 00000000 c002aa2c c07a8000 c071a220 c0763450 c075782c 00000066 [ 0.453515] 3f40: c071d600 00000005 ef073f94 ef073f58 c071dfb4 c00097a0 00000004 00000004 [ 0.454636] 3f60: 00000000 c071d600 00000000 c07a8000 c053b604 00000000 00000000 00000000 [ 0.455755] 3f80: 00000000 00000000 ef073fac ef073f98 c053b61c c071ddec 00000000 c053b604 [ 0.456875] 3fa0: 00000000 ef073fb0 c000fb88 c053b610 00000000 00000000 00000000 00000000 [ 0.457995] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 0.459114] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 0.460229] Backtrace: [ 0.460585] [] (iommu_fault_handler) from [] (handle_irq_event_percpu+0xb4/0x160) [ 0.461842] r9:ef1fbc00 r8:00000150 r7:00000000 r6:00000000 r5:ef1fbc60 r4:ef28e880 [ 0.462923] [] (handle_irq_event_percpu) from [] (handle_irq_event+0x40/0x64) [ 0.464135] r10:ef1fbc38 r9:60000013 r8:ef006000 r7:00000000 r6:c0784d24 r5:ef1fbc60 [ 0.465221] r4:ef1fbc00 [ 0.465587] [] (handle_irq_event) from [] (handle_fasteoi_irq+0xc0/0x194) [ 0.466751] r7:00000000 r6:c0784d24 r5:ef1fbc60 r4:ef1fbc00 [ 0.467546] [] (handle_fasteoi_irq) from [] (generic_handle_irq+0x2c/0x3c) [ 0.468719] r7:00000000 r6:00000000 r5:00000150 r4:c0765424 [ 0.469514] [] (generic_handle_irq) from [] (__handle_domain_irq+0x64/0xbc) [ 0.470706] [] (__handle_domain_irq) from [] (gic_handle_irq+0x40/0x7c) [ 0.471843] r9:60000013 r8:fa213000 r7:fa212000 r6:ef073c88 r5:fa21200c r4:c076a8e4 [ 0.472920] [] (gic_handle_irq) from [] (__irq_svc+0x40/0x74) [ 0.473945] Exception stack(0xef073c88 to 0xef073cd0) [ 0.474643] 3c80: ef1fbc60 60000013 00000000 00000006 ef1fbc00 ef28e880 [ 0.475761] 3ca0: ef28f010 00000150 ef1fbc60 60000013 ef1fbc38 ef073ce4 ef073ce8 ef073cd8 [ 0.476877] 3cc0: c0085a40 c054017c 60000013 ffffffff [ 0.477573] r9:60000013 r8:ef1fbc60 r7:ef073cbc r6:ffffffff r5:60000013 r4:c054017c [ 0.478660] [] (_raw_spin_unlock_irqrestore) from [] (__setup_irq+0x43c/0x5fc) [ 0.479884] [] (__setup_irq) from [] (request_threaded_irq+0xd0/0x158) [ 0.481013] r10:ef1fbc00 r9:00000080 r8:00000150 r7:00000000 r6:ef28f010 r5:c03022a8 [ 0.482101] r4:ef28e880 [ 0.482464] [] (request_threaded_irq) from [] (devm_request_threaded_irq+0x68/0xac) [ 0.483742] r10:00000000 r9:ef203a10 r8:00000000 r7:00000150 r6:ef28f010 r5:ef28e850 [ 0.484824] r4:c03022a8 r3:00000080 [ 0.485334] [] (devm_request_threaded_irq) from [] (omap_iommu_probe+0x1f0/0x364) [ 0.486589] r9:c071d600 r8:ef69e210 r7:ef203a10 r6:00000000 r5:ef203a00 r4:ef28f010 [ 0.487671] [] (omap_iommu_probe) from [] (platform_drv_probe+0x54/0xb8) [ 0.488822] r8:00000000 r7:fffffdfb r6:c0792a58 r5:ef203a10 r4:c07e655c [ 0.489762] [] (platform_drv_probe) from [] (driver_probe_device+0x204/0x2f8) [ 0.490970] r7:c0792a58 r6:00000000 r5:ef203a10 r4:c07e655c [ 0.491764] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 0.492914] r9:c071d600 r8:00000066 r7:00000000 r6:ef203a44 r5:c0792a58 r4:ef203a10 [ 0.493993] [] (__driver_attach) from [] (bus_for_each_dev+0x70/0xa4) [ 0.495108] r7:00000000 r6:c036a698 r5:c0792a58 r4:00000000 [ 0.495901] [] (bus_for_each_dev) from [] (driver_attach+0x24/0x28) [ 0.496993] r6:c0794960 r5:ef28b380 r4:c0792a58 [ 0.497644] [] (driver_attach) from [] (bus_add_driver+0x1a8/0x220) [ 0.498743] [] (bus_add_driver) from [] (driver_register+0x80/0x100) [ 0.499846] r7:ef287f40 r6:c076d6b0 r5:c07416b4 r4:c0792a58 [ 0.500638] [] (driver_register) from [] (__platform_driver_register+0x48/0x50) [ 0.501869] r5:c07416b4 r4:c0794960 [ 0.502377] [] (__platform_driver_register) from [] (omap_iommu_init+0x90/0xa0) [ 0.503611] r5:c07416b4 r4:c076d6b0 [ 0.504119] [] (omap_iommu_init) from [] (do_one_initcall+0x98/0x1e4) [ 0.505242] [] (do_one_initcall) from [] (kernel_init_freeable+0x1d4/0x278) [ 0.506428] r10:00000005 r9:c071d600 r8:00000066 r7:c075782c r6:c0763450 r5:c071a220 [ 0.507513] r4:c07a8000 [ 0.507876] [] (kernel_init_freeable) from [] (kernel_init+0x18/0xf8) [ 0.508990] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c053b604 [ 0.510074] r4:c07a8000 [ 0.510441] [] (kernel_init) from [] (ret_from_fork+0x14/0x2c) [ 0.511474] r5:c053b604 r4:00000000 [ 0.511981] Code: e24cb004 e24dd018 e1a05001 e5910010 (e5103014) [ 0.512831] ---[ end trace 66e0dc7b52edd6a2 ]--- [ 0.513470] Kernel panic - not syncing: Fatal exception in interrupt [ 0.514347] ---[ end Kernel panic - not syncing: Fatal exception in interrupt + +Hello, The iommu fault handler is getting triggered because your IOMMU is not setup properly. Please make sure the resource table used, reserved memory nodes in kernel DTS, MMU table addresses in u-boot are all synced with the binary you are trying to load. Regards, Nikhil D + +uboot: board/ti/dra7xx/Lateattach.c， No changes to official source documents #define DRA7_PGTBL_BASE_ADDR 0xbfc00000 dts: /* Memory reserved for IOMMU table carveout in u-boot */ latea_pagetbl: late_pgtbl@bfc00000 { reg = <0x0 0xbfc00000 0x0 0x100000>; no-map; status = "okay"; }; address No conflict found The address of IOMMU is all code, all according to the official code According to the official patch, boot firewmare from MLO. Tda2s is normal. Tda2e-17 is the above exception + +Hi, What about the kernel dts file? This will be different for each patform. Make sure that is also in sync, Regards, Nikhil D + +kernel dra71-evm-infoadas.dts： #include "dra71-evm.dts" #define DISABLE_PRCM(label) &label { ti,no-idle; ti,no-reset-on-init; } #define DISABLE_COMPLETE(label) &label { status = "disabled"; ti,no-idle; ti,no-reset-on-init; } #define LATE_ATTACH(label) &label { ti,late-attach; ti,no-idle; ti,no-reset-on-init; } / { chosen { bootargs = "console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk1p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=64M rootfstype=ext4 snd.slots_reserved=1,1 loglevel=0 init=/home/root/init-demo.sh clk_ignore_unused"; }; }; /* modules used by BIOS, disable from Linux */ DISABLE_COMPLETE(vip1); DISABLE_COMPLETE(cal); DISABLE_COMPLETE(i2c1); DISABLE_COMPLETE(i2c5); DISABLE_COMPLETE(wdt2); DISABLE_COMPLETE(vpe); DISABLE_COMPLETE(ocmcram1); DISABLE_COMPLETE(hdmi); DISABLE_COMPLETE(hdmi0); DISABLE_COMPLETE(dss); DISABLE_COMPLETE(dispc); /* modules shared between BIOS and Linux, Do not reset or cutoff clks */ DISABLE_PRCM(gpio1); DISABLE_PRCM(gpio2); DISABLE_PRCM(gpio4); DISABLE_PRCM(gpio6); /* Remote cores loaded by bootloader */ LATE_ATTACH(ipu1); LATE_ATTACH(mmu_ipu1); #if 1 LATE_ATTACH(ipu2); LATE_ATTACH(mmu_ipu2); LATE_ATTACH(dsp1); LATE_ATTACH(mmu0_dsp1); LATE_ATTACH(mmu1_dsp1); #endif /* timers used by the remote cores */ LATE_ATTACH(timer3); LATE_ATTACH(timer4); LATE_ATTACH(timer5); LATE_ATTACH(timer6); LATE_ATTACH(timer7); LATE_ATTACH(timer9); LATE_ATTACH(timer11); LATE_ATTACH(timer13); LATE_ATTACH(timer14); LATE_ATTACH(mailbox5); LATE_ATTACH(mailbox6); LATE_ATTACH(mailbox7); /* Linux uses first 32 channels, BIOS uses last 32 */ &edma { dma-requests = <32>; }; /* Update the CMA regions for Vision SDK binaries */ &ipu2_cma_pool { reg = <0x0 0x99000000 0x0 0x5000000>; }; &dsp1_cma_pool { reg = <0x0 0xa1000000 0x0 0x2000000>; }; &ipu1_cma_pool { reg = <0x0 0x9e000000 0x0 0x2000000>; }; /* Additional memory regions required for Vision SDK * Keep this in sync with VSDK apps/build/tda2ex/mem_segment_definition_linux.xs */ &reserved_mem { cmem_ocmc: cmem@40300000 { compatible = "shared-dma-pool"; reg = <0x0 0x40300000 0x0 0x300000>; sram = <&ocmcram1>; no-map; status = "okay"; }; cmem_pool: cmem@A9000000 { compatible = "shared-dma-pool"; reg = <0x0 0xA9000000 0x0 0x4000000>; no-map; status = "okay"; }; vsdk_sr1_mem: vsdk_sr1_mem@84000000 { compatible = "shared-dma-pool"; reg = <0x0 0x84000000 0x0 0x10000000>; status = "okay"; }; vsdk_sr0_mem: vsdk_sr0_mem@A0000000 { compatible = "shared-dma-pool"; reg = <0x0 0xA0000000 0x0 0x1000000>; status = "okay"; }; #if 1 /* Memory reserved for IOMMU table carveout in u-boot */ latea_pagetbl: late_pgtbl@bfc00000 { reg = <0x0 0xbfc00000 0x0 0x100000>; no-map; status = "okay"; }; #endif }; &ipu1 { status= "disabled"; /delete-property/ watchdog-timers; }; &ipu2 { /delete-property/ watchdog-timers; timers= <&timer9> , <&timer11>; }; &dsp1 { /delete-property/ watchdog-timers; timers= <&timer5> , <&timer6>; }; + +SI this issue resolved? + diff --git a/data2/text/range/30001+/874558.txt b/data2/text/range/30001+/874558.txt new file mode 100644 index 0000000000000000000000000000000000000000..ab735eb44bfb9d71db80d4199b44d61dfa004033 --- /dev/null +++ b/data2/text/range/30001+/874558.txt @@ -0,0 +1,464 @@ +Ticket Name: TDA2: TI Vision SDK - TIDL - Verifying that inceptionV1 works with TIDL + +Query Text: +Hi, I successfuly generated .bin files from the TF-Slim-based inceptionV1 example that is provided by Vision SDK 3.04. I have read that it has been validated by TI support, and I'm wondering how to validate it so that I can trust that it works and then continue on with my further developments. There are tidl, tidl_OD usecase. I would like to modify one of them in order to introduce classification for inceptionV1 in order to validate it. Where to start? Has it been done before by TI experts? (Even a text saying the image is an aircraft works for me) If so, could you help me? Thank you very much. + +Responses: +Hi, For confirmation, you can check the import tool log, which will print the Max Index of the input used. For example, for airshow it gives index as 896 as shown below.. Layer 82 :-------Max Index 896 : 204 ------- #MMACs = 0.00, 0.00, Sparsity : 0.00 Thanks, Praveen + +Hi Praveen, Thanks for your reply. I have two questions. 1) How do I get a better understanding of which number is used for a particular object? (An online reference would do if you have it) 2) To my understanding Algorithms for TI-VisionSDK are not open source, therefore how do I find a basic algorithm example for deep learning for identifying an object, for starters in real embedded hardware (TDA2x). Thank you. + +Hi, 1. You can refer to this link (https://gist.github.com/yrevar/942d3a0ac09ec9e5eb3a) for labels. Note that subtract one from MaxIndex(896-1 = 895 is plane) for tensorflow based models to check the labels and caffe models it will directly match. 2. You can refer to TIDL OD usecase for object detection and TIDL fileIO usecase for classification Thanks, Praveen + +Hi Praveen, Thank you for your reply. Could you please help us get a better understanding of the file I/O example? As far as I can see, the implementations are done in a .lib file, whose .c file is not available with the SDK. From chains_semSeg.c, we are unable to monitor MaxIndex. Could you please point us to where this might be existing so that we can go forward with our implementations? (We are using SDK 3.04) Cheers, + +Hi, The file I/O use case only dumps final layer output, so for classification network with 1000 classes the output is 1000 bytes, we need to manually scan through the output for max value to get the MaxIndex of the input label. So, we would suggest you to consider the newly implemented Object classification use case for your tests as this will give the object classification with index on display. This use case is available with VSDK 3.7 release & later versions. TIDL OC usecase location is: vision_sdk\apps\src\rtos\usecases\tidl_oc_openvx Thanks, Praveen + +Hi Praveen, In the meantime I will try the example you stated in SDK 3.08. However, I made all the prepwork in 3.04, so I still prefer doing this on 3.04. To what I can see in tidl file I/O usecase example, fileWriteTaskMain is responsible for dumping the final image to OUT.BIN, which is of inWidthxinHeight size. For that I simply added to the task: static Void printBinaryFile(UInt8 *addr, int size) { int i; for (i=0; icurOutputBufAddr, 1000); and it will print all 0's for the first 1000 bytes. Is this what you are referring to for 1000 bytes output? I believe not. If not, could you tell me where I can find the final layer output so that I can implement the index finding in it? Thank you very much in advance. + +Hi, You can refer to below code in this function AlgorithmLink_objectDrawSetMetaDataBuf" in "vision_sdk\apps\src\rtos\alg_plugins\objectdetection\objectDrawLink_algPlugin.c" file to get the offset for the actual metadata , if(algId == ALGORITHM_LINK_OBJECT_DETECT_DRAW_ALG_TIDL_OD) { TI_OD_outputList *tempoutPutList; tempoutPutList = &pObj->TIDLOdOutput; /* Convert the tidl output to TI_OD_outputList format */ tempoutPutList->numObjects = 0; /* Metadata is passed from algo in buffer */ bufferOffset = *(UInt32*)(metaDataAddr); bboxPtr = (float *)((char *)metaDataAddr + (bufferOffset*4)+4); Thanks, Praveen + +Hi Praveen, Thanks for your reply. As far as I understood from your suggestion, what I am doing for iterating over OUT.BIN (to look for the MaxIndex) is correct, but I need to do it with a correct offset. As in: static Void printBinaryFile(UInt8 *addr, int size, UInt32 offset) { int i; for (i=0; ifileWriteSem, BSP_OSAL_WAIT_FOREVER); dump = TRUE; if(0 != pObj->outNumFrames) { if(pObj->outFrameNum == pObj->outNumFrames) { /* All the frames are dumped */ dump = FALSE; } } if(TRUE == dump) { /* Write the output buffer to file */ ChainsCommon_Osal_fileWrite( pObj->outFp, (UInt8*)pObj->curOutputBufAddr, (pObj->inWidth * pObj->inHeight)); Void *metaDataAddr; // TODO: This should be set! UInt32 bufferOffset; bufferOffset = *(UInt32*)(metaDataAddr); printBinaryFile ((UInt8*)pObj->curOutputBufAddr, 1000, bufferOffset); Vps_printf(" ########## FRAME # %d, QUEUE = %d ###########\n",\ pObj->outFrameNum++,pObj->curQue); } } } The only doubt I now have is regarding metaDataAddr as it is set in the code you suggested as: if(chIdnumFrames) { metaDataAddr = pCompositeBuffer->bufAddr[0][chId]; } with pCompositeBuffer being a System_VideoFrameCompositeBuffer *. How do I set it in the context of the task I am using, which is fileWriteTaskMain from tidl file I/O usecase. Thank you. + +Hi, If you have check our last reply then you find 2 lines for getting actual offset. bufferOffset = *(UInt32*)(metaDataAddr); bboxPtr = (float *)((char *)metaDataAddr + (bufferOffset*4)+4); So bboxPtr is the actual address from where data start so your offset should be (bufferOffset*4)+4. metaDataAddr is actually buffer address of actual data. So in your case it should be pObj->curOutputBufAddr. Regards, Anuj + +I think I implemented your suggestion, trying to find max index from pObj->curOutputBufAddr. (just after it is dumped to file OUT.BIN) I have converted airshow.jpg to IN.RGB, I have modified TIDLCFG.TXT as: inputWidth=512 inputHeight=357 inputFile=IN.RGB outputFile=OUT.BIN netFileName=net1.bin paramFileName=param1.bin where net1.bin and param1.bin are the inception v1 example binaries. All are deployed to the SD card. What I do to print the max value is as follows: static Void printBinaryFile(UInt8 addr, UInt32 size, UInt32 offset) { UInt32 i; UInt8 max_val = 0; UInt32 max_idx = 0; for (i=0; i max_val) { max_val = val; max_idx = i; } Vps_printf("i=%d, value=%d\n", i, val); } Vps_printf("MAX i=%d, value=%d\n", max_idx, max_val); } Void fileWriteTaskMain(UArg arg1, UArg arg2) { Bool dump; chains_tidlAppObj *pObj = (chains_tidlAppObj*)arg1; while(1) { BspOsal_semWait(pObj->fileWriteSem, BSP_OSAL_WAIT_FOREVER); dump = TRUE; if(0 != pObj->outNumFrames) { if(pObj->outFrameNum == pObj->outNumFrames) { /* All the frames are dumped */ dump = FALSE; } } if(TRUE == dump) { /* Write the output buffer to file */ ChainsCommon_Osal_fileWrite( pObj->outFp, (UInt8*)pObj->curOutputBufAddr, (pObj->inWidth * pObj->inHeight)); UInt8 bufferOffset; bufferOffset = *(UInt8*)(pObj->curOutputBufAddr); printBinaryFile (bufferOffset, 1000, *(UInt32*)((bufferOffset*4)+4)); Vps_printf(" ########## FRAME # %d, QUEUE = %d ###########\n",\ pObj->outFrameNum++,pObj->curQue); } } } I got the output as follows (which clearly is not 895, aircraft): ............ [IPU1-0] 24.121454 s: i=986, value=251 [IPU1-0] 24.121545 s: i=987, value=51 [IPU1-0] 24.121576 s: i=988, value=72 [IPU1-0] 24.121637 s: i=989, value=36 [IPU1-0] 24.121698 s: i=990, value=230 [IPU1-0] 24.121759 s: i=991, value=93 [IPU1-0] 24.121820 s: i=992, value=135 [IPU1-0] 24.121881 s: i=993, value=42 [IPU1-0] 24.121942 s: i=994, value=166 [IPU1-0] 24.122003 s: i=995, value=29 [IPU1-0] 24.122064 s: i=996, value=175 [IPU1-0] 24.122125 s: i=997, value=72 [IPU1-0] 24.122186 s: i=998, value=74 [IPU1-0] 24.122247 s: i=999, value=158 [IPU1-0] 24.122308 s: MAX i=52, value=255 [IPU1-0] 24.122369 s: ########## FRAME # 0, QUEUE = 0 ########### Is there something wrong with my logic here? Could you please help what might be missing here? Thanks. + +Hi, Can you cross check this output with import output of last year, this 1000 values should match with that? Thanks, Praveen + +Hi, What do you mean by import output of last year, might I ask? Thanks + +Hi, In the very first post you said "I successfuly generated .bin files from the TF-Slim-based inceptionV1 example that is provided by Vision SDK 3.04.".. so while generating these .bin files through import tool, it also dumps layer level traces, so I am referring to last layer traces/outputs from import tool. Thanks, Praveen + +Hi, Thanks for the clarification, but I already cross checked the result with the import tool (see log.txt). 6177.log.txt.txt Mustafa@DESKTOP-1JJ390C MINGW64 ~/Desktop/tidl_windows_folder +$ ./tidl_model_import.out.exe tidl_import_inceptionNetv1.txt +TF Model File : inceptionnet_v1.pb + Num of Layer Detected : 484 + 0, TIDL_DataLayer 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 224 , 224 , 0 , + 1, TIDL_ConvolutionLayer 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 224 , 224 , 1 , 64 , 112 , 112 , 118013952 , + 2, TIDL_PoolingLayer 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 64 , 112 , 112 , 1 , 64 , 56 , 56 , 1806336 , + 3, TIDL_ConvolutionLayer 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 56 , 56 , 1 , 64 , 56 , 56 , 12845056 , + 4, TIDL_ConvolutionLayer 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 56 , 56 , 1 , 192 , 56 , 56 , 346816512 , + 5, TIDL_PoolingLayer 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 192 , 56 , 56 , 1 , 192 , 28 , 28 , 1354752 , + 6, TIDL_ConvolutionLayer 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 192 , 28 , 28 , 1 , 64 , 28 , 28 , 9633792 , + 7, TIDL_ConvolutionLayer 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 7 , 1 , 192 , 28 , 28 , 1 , 96 , 28 , 28 , 14450688 , + 8, TIDL_ConvolutionLayer 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 96 , 28 , 28 , 1 , 128 , 28 , 28 , 86704128 , + 9, TIDL_ConvolutionLayer 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 9 , 1 , 192 , 28 , 28 , 1 , 16 , 28 , 28 , 2408448 , + 10, TIDL_ConvolutionLayer 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 16 , 28 , 28 , 1 , 32 , 28 , 28 , 3612672 , + 11, TIDL_PoolingLayer 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 11 , 1 , 192 , 28 , 28 , 1 , 192 , 28 , 28 , 1354752 , + 12, TIDL_ConvolutionLayer 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 192 , 28 , 28 , 1 , 32 , 28 , 28 , 4816896 , + 13, TIDL_ConcatLayer 1, 4 , 1 , 6 , 8 , 10 , 12 , x , x , x , x , 13 , 1 , 64 , 28 , 28 , 1 , 256 , 28 , 28 , 200704 , + 14, TIDL_ConvolutionLayer 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 256 , 28 , 28 , 1 , 128 , 28 , 28 , 25690112 , + 15, TIDL_ConvolutionLayer 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 15 , 1 , 256 , 28 , 28 , 1 , 128 , 28 , 28 , 25690112 , + 16, TIDL_ConvolutionLayer 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 128 , 28 , 28 , 1 , 192 , 28 , 28 , 173408256 , + 17, TIDL_ConvolutionLayer 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 17 , 1 , 256 , 28 , 28 , 1 , 32 , 28 , 28 , 6422528 , + 18, TIDL_ConvolutionLayer 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 32 , 28 , 28 , 1 , 96 , 28 , 28 , 21676032 , + 19, TIDL_PoolingLayer 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 19 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 1806336 , + 20, TIDL_ConvolutionLayer 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 256 , 28 , 28 , 1 , 64 , 28 , 28 , 12845056 , + 21, TIDL_ConcatLayer 1, 4 , 1 , 14 , 16 , 18 , 20 , x , x , x , x , 21 , 1 , 128 , 28 , 28 , 1 , 480 , 28 , 28 , 376320 , + 22, TIDL_PoolingLayer 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 480 , 28 , 28 , 1 , 480 , 14 , 14 , 846720 , + 23, TIDL_ConvolutionLayer 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 480 , 14 , 14 , 1 , 192 , 14 , 14 , 18063360 , + 24, TIDL_ConvolutionLayer 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 24 , 1 , 480 , 14 , 14 , 1 , 96 , 14 , 14 , 9031680 , + 25, TIDL_ConvolutionLayer 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 96 , 14 , 14 , 1 , 208 , 14 , 14 , 35223552 , + 26, TIDL_ConvolutionLayer 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 26 , 1 , 480 , 14 , 14 , 1 , 16 , 14 , 14 , 1505280 , + 27, TIDL_ConvolutionLayer 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 16 , 14 , 14 , 1 , 48 , 14 , 14 , 1354752 , + 28, TIDL_PoolingLayer 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 28 , 1 , 480 , 14 , 14 , 1 , 480 , 14 , 14 , 846720 , + 29, TIDL_ConvolutionLayer 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 480 , 14 , 14 , 1 , 64 , 14 , 14 , 6021120 , + 30, TIDL_ConcatLayer 1, 4 , 1 , 23 , 25 , 27 , 29 , x , x , x , x , 30 , 1 , 192 , 14 , 14 , 1 , 512 , 14 , 14 , 100352 , + 31, TIDL_ConvolutionLayer 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 14 , 14 , 1 , 160 , 14 , 14 , 16056320 , + 32, TIDL_ConvolutionLayer 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 32 , 1 , 512 , 14 , 14 , 1 , 112 , 14 , 14 , 11239424 , + 33, TIDL_ConvolutionLayer 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 112 , 14 , 14 , 1 , 224 , 14 , 14 , 44255232 , + 34, TIDL_ConvolutionLayer 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 34 , 1 , 512 , 14 , 14 , 1 , 24 , 14 , 14 , 2408448 , + 35, TIDL_ConvolutionLayer 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 24 , 14 , 14 , 1 , 64 , 14 , 14 , 2709504 , + 36, TIDL_PoolingLayer 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 36 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , + 37, TIDL_ConvolutionLayer 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 512 , 14 , 14 , 1 , 64 , 14 , 14 , 6422528 , + 38, TIDL_ConcatLayer 1, 4 , 1 , 31 , 33 , 35 , 37 , x , x , x , x , 38 , 1 , 160 , 14 , 14 , 1 , 512 , 14 , 14 , 100352 , + 39, TIDL_ConvolutionLayer 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 512 , 14 , 14 , 1 , 128 , 14 , 14 , 12845056 , + 40, TIDL_ConvolutionLayer 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 40 , 1 , 512 , 14 , 14 , 1 , 128 , 14 , 14 , 12845056 , + 41, TIDL_ConvolutionLayer 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 14 , 14 , 1 , 256 , 14 , 14 , 57802752 , + 42, TIDL_ConvolutionLayer 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 42 , 1 , 512 , 14 , 14 , 1 , 24 , 14 , 14 , 2408448 , + 43, TIDL_ConvolutionLayer 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 24 , 14 , 14 , 1 , 64 , 14 , 14 , 2709504 , + 44, TIDL_PoolingLayer 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 44 , 1 , 512 , 14 , 14 , 1 , 512 , 14 , 14 , 903168 , + 45, TIDL_ConvolutionLayer 1, 1 , 1 , 44 , x , x , x , x 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x , x , x , x , x , 53 , 1 , 512 , 14 , 14 , 1 , 64 , 14 , 14 , 6422528 , + 54, TIDL_ConcatLayer 1, 4 , 1 , 47 , 49 , 51 , 53 , x , x , x , x , 54 , 1 , 112 , 14 , 14 , 1 , 528 , 14 , 14 , 103488 , + 55, TIDL_ConvolutionLayer 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 55 , 1 , 528 , 14 , 14 , 1 , 256 , 14 , 14 , 26492928 , + 56, TIDL_ConvolutionLayer 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 56 , 1 , 528 , 14 , 14 , 1 , 160 , 14 , 14 , 16558080 , + 57, TIDL_ConvolutionLayer 1, 1 , 1 , 56 , x , x , x , x , x , x , x , 57 , 1 , 160 , 14 , 14 , 1 , 320 , 14 , 14 , 90316800 , + 58, TIDL_ConvolutionLayer 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 58 , 1 , 528 , 14 , 14 , 1 , 32 , 14 , 14 , 3311616 , + 59, TIDL_ConvolutionLayer 1, 1 , 1 , 58 , x , x , x , x , x , x , x , 59 , 1 , 32 , 14 , 14 , 1 , 128 , 14 , 14 , 7225344 , + 60, TIDL_PoolingLayer 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 60 , 1 , 528 , 14 , 14 , 1 , 528 , 14 , 14 , 931392 , + 61, TIDL_ConvolutionLayer 1, 1 , 1 , 60 , x , x , x , x , x , x , x , 61 , 1 , 528 , 14 , 14 , 1 , 128 , 14 , 14 , 13246464 , + 62, TIDL_ConcatLayer 1, 4 , 1 , 55 , 57 , 59 , 61 , x , x , x , x , 62 , 1 , 256 , 14 , 14 , 1 , 832 , 14 , 14 , 163072 , + 63, TIDL_PoolingLayer 1, 1 , 1 , 62 , x , x , x , x , x , x , x , 63 , 1 , 832 , 14 , 14 , 1 , 832 , 7 , 7 , 163072 , + 64, TIDL_ConvolutionLayer 1, 1 , 1 , 63 , x , x , x , x , x , x , x , 64 , 1 , 832 , 7 , 7 , 1 , 256 , 7 , 7 , 10436608 , + 65, TIDL_ConvolutionLayer 1, 1 , 1 , 63 , x , x , x , x , x , x , x , 65 , 1 , 832 , 7 , 7 , 1 , 160 , 7 , 7 , 6522880 , + 66, TIDL_ConvolutionLayer 1, 1 , 1 , 65 , x , x , x , x , x , x , x , 66 , 1 , 160 , 7 , 7 , 1 , 320 , 7 , 7 , 22579200 , + 67, TIDL_ConvolutionLayer 1, 1 , 1 , 63 , x , x , x , x , x , x , x , 67 , 1 , 832 , 7 , 7 , 1 , 32 , 7 , 7 , 1304576 , + 68, TIDL_ConvolutionLayer 1, 1 , 1 , 67 , x , x , x , x , x , x , x , 68 , 1 , 32 , 7 , 7 , 1 , 128 , 7 , 7 , 1806336 , + 69, TIDL_PoolingLayer 1, 1 , 1 , 63 , x , x , x , x , x , x , x , 69 , 1 , 832 , 7 , 7 , 1 , 832 , 7 , 7 , 366912 , + 70, TIDL_ConvolutionLayer 1, 1 , 1 , 69 , x , x , x , x , x , x , x , 70 , 1 , 832 , 7 , 7 , 1 , 128 , 7 , 7 , 5218304 , + 71, TIDL_ConcatLayer 1, 4 , 1 , 64 , 66 , 68 , 70 , x , x , x , x , 71 , 1 , 256 , 7 , 7 , 1 , 832 , 7 , 7 , 40768 , + 72, TIDL_ConvolutionLayer 1, 1 , 1 , 71 , x , x , x , x , x , x , x , 72 , 1 , 832 , 7 , 7 , 1 , 384 , 7 , 7 , 15654912 , + 73, TIDL_ConvolutionLayer 1, 1 , 1 , 71 , x , x , x , x , x , x , x , 73 , 1 , 832 , 7 , 7 , 1 , 192 , 7 , 7 , 7827456 , + 74, TIDL_ConvolutionLayer 1, 1 , 1 , 73 , x , x , x , x , x , x , 1 file(s) copied. + +Processing config file .\tempDir\qunat_stats_config.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 224 , 224 , + 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 224 , 224 , 1 , 64 , 112 , 112 , + 2, TIDL_PoolingLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 64 , 112 , 112 , 1 , 64 , 56 , 56 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 56 , 56 , 1 , 64 , 56 , 56 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 56 , 56 , 1 , 192 , 56 , 56 , + 5, TIDL_PoolingLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 192 , 56 , 56 , 1 , 192 , 28 , 28 , + 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 192 , 28 , 28 , 1 , 64 , 28 , 28 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 7 , 1 , 192 , 28 , 28 , 1 , 96 , 28 , 28 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 96 , 28 , 28 , 1 , 128 , 28 , 28 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 9 , 1 , 192 , 28 , 28 , 1 , 16 , 28 , 28 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 16 , 28 , 28 , 1 , 32 , 28 , 28 , + 11, TIDL_PoolingLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 11 , 1 , 192 , 28 , 28 , 1 , 192 , 28 , 28 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 192 , 28 , 28 , 1 , 32 , 28 , 28 , + 13, TIDL_ConcatLayer , 1, 4 , 1 , 6 , 8 , 10 , 12 , x , x , x , x , 13 , 1 , 64 , 28 , 28 , 1 , 256 , 28 , 28 , + 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 256 , 28 , 28 , 1 , 128 , 28 , 28 , + 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 15 , 1 , 256 , 28 , 28 , 1 , 128 , 28 , 28 , + 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 128 , 28 , 28 , 1 , 192 , 28 , 28 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 17 , 1 , 256 , 28 , 28 , 1 , 32 , 28 , 28 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 32 , 28 , 28 , 1 , 96 , 28 , 28 , + 19, TIDL_PoolingLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 19 , 1 , 256 , 28 , 28 , 1 , 256 , 28 , 28 , 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80, TIDL_PoolingLayer , 1, 1 , 1 , 79 , x , x , x , x , x , x , x , 80 , 1 , 1024 , 7 , 7 , 1 , 1 , 1 , 1024 , + 81, TIDL_InnerProductLayer , 1, 1 , 1 , 80 , x , x , x , x , x , x , x , 81 , 1 , 1 , 1 , 1024 , 1 , 1 , 1 , 1001 , + 82, TIDL_SoftMaxLayer , 1, 1 , 1 , 81 , x , x , x , x , x , x , x , 82 , 1 , 1 , 1 , 1001 , 1 , 1 , 1 , 1001 , + 83, TIDL_DataLayer , 0, 1 , -1 , 82 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 1001 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 1 80 68 80 32 28 32 3 64 3 1 8 1 3 4 4 5440 896 1 + 3 32 28 32 32 28 32 64 64 64 8 8 1 8 2 2 896 896 1 + 4 40 30 40 32 28 32 64 192 64 7 8 1 10 2 2 1200 896 1 + 6 32 28 32 32 28 32 192 64 192 8 8 1 24 1 1 896 896 1 + 7 32 28 32 32 28 32 192 96 192 8 8 1 24 1 1 896 896 1 + 8 40 30 40 32 28 32 96 128 96 7 8 1 14 1 1 1200 896 1 + 9 32 28 32 32 28 32 192 16 192 8 8 1 24 1 1 896 896 1 + 10 40 30 40 32 28 32 16 32 16 7 8 1 3 1 1 1200 896 1 + 12 32 28 32 32 28 32 192 32 192 8 8 1 24 1 1 896 896 1 + 14 32 28 32 32 28 32 256 128 256 8 8 1 32 1 1 896 896 1 + 15 32 28 32 32 28 32 256 128 256 8 8 1 32 1 1 896 896 1 + 16 40 30 40 32 28 32 128 192 128 7 8 1 19 1 1 1200 896 1 + 17 32 28 32 32 28 32 256 32 256 8 8 1 32 1 1 896 896 1 + 18 40 30 40 32 28 32 32 96 32 7 8 1 5 1 1 1200 896 1 + 20 32 28 32 32 28 32 256 64 256 8 8 1 32 1 1 896 896 1 + 23 16 14 16 16 14 16 480 192 480 8 8 1 60 1 1 224 224 1 + 24 16 14 16 16 14 16 480 96 480 8 8 1 60 1 1 224 224 1 + 25 24 16 24 16 14 16 96 208 96 8 8 1 12 1 1 384 224 1 + 26 16 14 16 16 14 16 480 16 480 8 8 1 60 1 1 224 224 1 + 27 24 16 24 16 14 16 16 48 16 8 8 1 2 1 1 384 224 1 + 29 16 14 16 16 14 16 480 64 480 8 8 1 60 1 1 224 224 1 + 31 16 14 16 16 14 16 512 160 512 8 8 1 64 1 1 224 224 1 + 32 16 14 16 16 14 16 512 112 512 8 8 1 64 1 1 224 224 1 + 33 24 16 24 16 14 16 112 224 112 8 8 1 14 1 1 384 224 1 + 34 16 14 16 16 14 16 512 24 512 8 8 1 64 1 1 224 224 1 + 35 24 16 24 16 14 16 24 64 24 8 8 1 3 1 1 384 224 1 + 37 16 14 16 16 14 16 512 64 512 8 8 1 64 1 1 224 224 1 + 39 16 14 16 16 14 16 512 128 512 8 8 1 64 1 1 224 224 1 + 40 16 14 16 16 14 16 512 128 512 8 8 1 64 1 1 224 224 1 + 41 24 16 24 16 14 16 128 256 128 8 8 1 16 1 1 384 224 1 + 42 16 14 16 16 14 16 512 24 512 8 8 1 64 1 1 224 224 1 + 43 24 16 24 16 14 16 24 64 24 8 8 1 3 1 1 384 224 1 + 45 16 14 16 16 14 16 512 64 512 8 8 1 64 1 1 224 224 1 + 47 16 14 16 16 14 16 512 112 512 8 8 1 64 1 1 224 224 1 + 48 16 14 16 16 14 16 512 144 512 8 8 1 64 1 1 224 224 1 + 49 24 16 24 16 14 16 144 288 144 8 8 1 18 1 1 384 224 1 + 50 16 14 16 16 14 16 512 32 512 8 8 1 64 1 1 224 224 1 + 51 24 16 24 16 14 16 32 64 32 8 8 1 4 1 1 384 224 1 + 53 16 14 16 16 14 16 512 64 512 8 8 1 64 1 1 224 224 1 + 55 16 14 16 16 14 16 528 256 528 8 8 1 66 1 1 224 224 1 + 56 16 14 16 16 14 16 528 160 528 8 8 1 66 1 1 224 224 1 + 57 24 16 24 16 14 16 160 320 160 8 8 1 20 1 1 384 224 1 + 58 16 14 16 16 14 16 528 32 528 8 8 1 66 1 1 224 224 1 + 59 24 16 24 16 14 16 32 128 32 8 8 1 4 1 1 384 224 1 + 61 16 14 16 16 14 16 528 128 528 8 8 1 66 1 1 224 224 1 + 64 16 7 16 16 7 16 832 256 832 8 8 1 104 1 1 112 112 1 + 65 16 7 16 16 7 16 832 160 832 8 8 1 104 1 1 112 112 1 + 66 24 9 24 16 7 16 160 320 160 8 8 1 20 1 1 216 112 1 + 67 16 7 16 16 7 16 832 32 832 8 8 1 104 1 1 112 112 1 + 68 24 9 24 16 7 16 32 128 32 8 8 1 4 1 1 216 112 1 + 70 16 7 16 16 7 16 832 128 832 8 8 1 104 1 1 112 112 1 + 72 16 7 16 16 7 16 832 384 832 8 8 1 104 1 1 112 112 1 + 73 16 7 16 16 7 16 832 192 832 8 8 1 104 1 1 112 112 1 + 74 24 9 24 16 7 16 192 384 192 8 8 1 24 1 1 216 112 1 + 75 16 7 16 16 7 16 832 48 832 8 8 1 104 1 1 112 112 1 + 76 24 9 24 16 7 16 48 128 48 8 8 1 6 1 1 216 112 1 + 78 16 7 16 16 7 16 832 128 832 8 8 1 104 1 1 112 112 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 5796 , TIDL_ConvolutionLayer, PASSED #MMACs = 118.01, 111.94, Sparsity : 5.14 + Layer 2 :TIDL_PoolingLayer, PASSED #MMACs = 0.20, 0.20, Sparsity : 0.00 + Layer 3 : Out Q : 9674 , TIDL_ConvolutionLayer, PASSED #MMACs = 12.85, 12.39, Sparsity : 3.52 + Layer 4 : Out Q : 9266 , TIDL_ConvolutionLayer, PASSED #MMACs = 346.82, 329.03, Sparsity : 5.13 + Layer 5 :TIDL_PoolingLayer, PASSED #MMACs = 0.15, 0.15, Sparsity : 0.00 + Layer 6 : Out Q : 8796 , TIDL_ConvolutionLayer, PASSED #MMACs = 9.63, 9.62, Sparsity : 0.10 + Layer 7 : Out Q : 9581 , TIDL_ConvolutionLayer, PASSED #MMACs = 14.45, 14.45, Sparsity : 0.02 + Layer 8 : Out Q : 11917 , TIDL_ConvolutionLayer, PASSED #MMACs = 86.70, 83.57, Sparsity : 3.61 + Layer 9 : Out Q : 12024 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.41, 2.41, Sparsity : 0.13 + Layer 10 : Out Q : 10297 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.41, Sparsity : 5.73 + Layer 11 :TIDL_PoolingLayer, PASSED #MMACs = 0.15, 0.15, Sparsity : 0.00 + Layer 12 : Out Q : 13036 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.82, 4.81, Sparsity : 0.13 + Layer 13 : Out Q : 8831 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 14 : Out Q : 9861 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.67, Sparsity : 0.06 + Layer 15 : Out Q : 10266 , TIDL_ConvolutionLayer, PASSED #MMACs = 25.69, 25.68, Sparsity : 0.02 + Layer 16 : Out Q : 11299 , TIDL_ConvolutionLayer, PASSED #MMACs = 173.41, 170.74, Sparsity : 1.54 + Layer 17 : Out Q : 11189 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.42, 6.42, Sparsity : 0.00 + Layer 18 : Out Q : 16253 , TIDL_ConvolutionLayer, PASSED #MMACs = 21.68, 21.51, Sparsity : 0.75 + Layer 19 :TIDL_PoolingLayer, PASSED #MMACs = 0.20, 0.20, Sparsity : 0.00 + Layer 20 : Out Q : 14587 , TIDL_ConvolutionLayer, PASSED #MMACs = 12.85, 12.85, Sparsity : 0.00 + Layer 21 : Out Q : 9900 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 22 :TIDL_PoolingLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 23 : Out Q : 11452 , TIDL_ConvolutionLayer, PASSED #MMACs = 18.06, 18.05, Sparsity : 0.08 + Layer 24 : Out Q : 11148 , TIDL_ConvolutionLayer, PASSED #MMACs = 9.03, 9.02, Sparsity : 0.13 + Layer 25 : Out Q : 8721 , TIDL_ConvolutionLayer, PASSED #MMACs = 35.22, 34.13, Sparsity : 3.12 + Layer 26 : Out Q : 13268 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.51, 1.50, Sparsity : 0.57 + Layer 27 : Out Q : 12536 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.35, 1.26, Sparsity : 6.77 + Layer 28 :TIDL_PoolingLayer, PASSED #MMACs = 0.09, 0.09, Sparsity : 0.00 + Layer 29 : Out Q : 14538 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.02, 6.01, Sparsity : 0.22 + Layer 30 : Out Q : 8755 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 31 : Out Q : 9558 , TIDL_ConvolutionLayer, PASSED #MMACs = 16.06, 16.05, Sparsity : 0.02 + Layer 32 : Out Q : 8802 , TIDL_ConvolutionLayer, PASSED #MMACs = 11.24, 11.24, Sparsity : 0.03 + Layer 33 : Out Q : 11638 , TIDL_ConvolutionLayer, PASSED #MMACs = 44.26, 42.62, Sparsity : 3.70 + Layer 34 : Out Q : 9256 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.41, 2.41, Sparsity : 0.03 + Layer 35 : Out Q : 9879 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.71, 2.66, Sparsity : 1.68 + Layer 36 :TIDL_PoolingLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 37 : Out Q : 18705 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.42, 6.42, Sparsity : 0.00 + Layer 38 : Out Q : 9596 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 39 : Out Q : 7860 , TIDL_ConvolutionLayer, PASSED #MMACs = 12.85, 12.84, Sparsity : 0.01 + Layer 40 : Out Q : 9368 , TIDL_ConvolutionLayer, PASSED #MMACs = 12.85, 12.84, Sparsity : 0.02 + Layer 41 : Out Q : 10023 , TIDL_ConvolutionLayer, PASSED #MMACs = 57.80, 57.08, Sparsity : 1.25 + Layer 42 : Out Q : 7963 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.41, 2.41, Sparsity : 0.00 + Layer 43 : Out Q : 5393 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.71, 2.59, Sparsity : 4.37 + Layer 44 :TIDL_PoolingLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 45 : Out Q : 17239 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.42, 6.42, Sparsity : 0.00 + Layer 46 : Out Q : 5414 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 47 : Out Q : 6296 , TIDL_ConvolutionLayer, PASSED #MMACs = 11.24, 11.24, Sparsity : 0.01 + Layer 48 : Out Q : 7850 , TIDL_ConvolutionLayer, PASSED #MMACs = 14.45, 14.45, Sparsity : 0.01 + Layer 49 : Out Q : 7172 , TIDL_ConvolutionLayer, PASSED #MMACs = 73.16, 72.17, Sparsity : 1.34 + Layer 50 : Out Q : 8559 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.21, 3.21, Sparsity : 0.00 + Layer 51 : Out Q : 16500 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.61, 3.53, Sparsity : 2.24 + Layer 52 :TIDL_PoolingLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 53 : Out Q : 14699 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.42, 6.42, Sparsity : 0.01 + Layer 54 : Out Q : 6321 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 55 : Out Q : 7881 , TIDL_ConvolutionLayer, PASSED #MMACs = 26.49, 26.49, Sparsity : 0.01 + Layer 56 : Out Q : 9619 , TIDL_ConvolutionLayer, PASSED #MMACs = 16.56, 16.56, Sparsity : 0.01 + Layer 57 : Out Q : 12884 , TIDL_ConvolutionLayer, PASSED #MMACs = 90.32, 89.34, Sparsity : 1.08 + Layer 58 : Out Q : 6451 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.31, 3.31, Sparsity : 0.00 + Layer 59 : Out Q : 4961 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.23, 7.12, Sparsity : 1.39 + Layer 60 :TIDL_PoolingLayer, PASSED #MMACs = 0.10, 0.10, Sparsity : 0.00 + Layer 61 : Out Q : 13416 , TIDL_ConvolutionLayer, PASSED #MMACs = 13.25, 13.25, Sparsity : 0.00 + Layer 62 : Out Q : 4981 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 63 :TIDL_PoolingLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 64 : Out Q : 12738 , TIDL_ConvolutionLayer, PASSED #MMACs = 10.44, 10.43, Sparsity : 0.02 + Layer 65 : Out Q : 7225 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.52, 6.52, Sparsity : 0.02 + Layer 66 : Out Q : 8555 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.58, 22.26, Sparsity : 1.44 + Layer 67 : Out Q : 8422 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.30, 1.30, Sparsity : 0.02 + Layer 68 : Out Q : 10068 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.81, 1.80, Sparsity : 0.50 + Layer 69 :TIDL_PoolingLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 70 : Out Q : 22176 , TIDL_ConvolutionLayer, PASSED #MMACs = 5.22, 5.22, Sparsity : 0.01 + Layer 71 : Out Q : 8589 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 72 : Out Q : 11305 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.65, 15.65, Sparsity : 0.05 + Layer 73 : Out Q : 8266 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.83, 7.83, Sparsity : 0.01 + Layer 74 : Out Q : 7903 , TIDL_ConvolutionLayer, PASSED #MMACs = 32.51, 32.13, Sparsity : 1.18 + Layer 75 : Out Q : 9221 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.96, 1.96, Sparsity : 0.00 + Layer 76 : Out Q : 12157 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.71, 2.67, Sparsity : 1.29 + Layer 77 :TIDL_PoolingLayer, PASSED #MMACs = 0.04, 0.04, Sparsity : 0.00 + Layer 78 : Out Q : 11910 , TIDL_ConvolutionLayer, PASSED #MMACs = 5.22, 5.22, Sparsity : 0.00 + Layer 79 : Out Q : 7934 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 80 : Out Q : 22172 , TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 81 : Out Q : 2946 , TIDL_InnerProductLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 82 :-------Max Index 896 : 254 ------- #MMACs = 0.00, 0.00, Sparsity : 0.00 +End of config list found ! + x , 74 , 1 , 192 , 7 , 7 , 1 , 384 , 7 , 7 , 32514048 , + 75, TIDL_ConvolutionLayer 1, 1 , 1 , 71 , x , x , x , x , x , x , x , 75 , 1 , 832 , 7 , 7 , 1 , 48 , 7 , 7 , 1956864 , + 76, TIDL_ConvolutionLayer 1, 1 , 1 , 75 , x , x , x , x , x , x , x , 76 , 1 , 48 , 7 , 7 , 1 , 128 , 7 , 7 , 2709504 , + 77, TIDL_PoolingLayer 1, 1 , 1 , 71 , x , x , x , x , x , x , x , 77 , 1 , 832 , 7 , 7 , 1 , 832 , 7 , 7 , 366912 , + 78, TIDL_ConvolutionLayer 1, 1 , 1 , 77 , x , x , x , x , x , x , x , 78 , 1 , 832 , 7 , 7 , 1 , 128 , 7 , 7 , 5218304 , + 79, TIDL_ConcatLayer 1, 4 , 1 , 72 , 74 , 76 , 78 , x , x , x , x , 79 , 1 , 384 , 7 , 7 , 1 , 1024 , 7 , 7 , 50176 , + 80, TIDL_PoolingLayer 1, 1 , 1 , 79 , x , x , x , x , x , x , x , 80 , 1 , 1024 , 7 , 7 , 1 , 1 , 1 , 1024 , 50176 , + 81, TIDL_InnerProductLayer 1, 1 , 1 , 80 , x , x , x , x , x , x , x , 81 , 1 , 1 , 1 , 1024 , 1 , 1 , 1 , 1001 , 1025024 , + 82, TIDL_SoftMaxLayer 1, 1 , 1 , 81 , x , x , x , x , x , x , x , 82 , 1 , 1 , 1 , 1001 , 1 , 1 , 1 , 1001 , 1001 , +Total Giga Macs : 1.5122 + There seems to be somehing wrong. Import tool gives 896 as MaxIndex whereas I find it as 52 with the current version of my code. Import tool , as far as I know, do not dump all the 1000 bytes, so I am unable to check if all 1000 bytes match. Should I implement the same thing at the import tool side? Can you think of any other possible problems here? Thank you. + +Hi Dear Mr. kumar.desappan, Anuj Gupta , I'd appreciate if you could take a look at the problem I'm having regarding TIDL-TensorFlow-InceptionV1 verification/classification in VSDK 3.04. As a reminder, my goal is to verify that inception v1 works on actual board (or rather getting the Max Index 896 that the tidl import tool prints, while the tidl algorithm is running on the actual hardware). The File I/O usecase (namely, tidl) outputs an OUT.BIN, which according to Praveen Eppa1 contains 1000 bytes of meta information somewhere with an offset (where object classification can be implemented). My goal is to implement Max Index finding where the metadata (last layer output) is present from within the tidl usecase. My current approach is to iterate through pObj->curOutputBufAddr, with an offset. Please see below. Implemented binary print in chains_tidl.c ---------------------------------------------- static Void printBinaryFile(UInt8 addr, UInt32 size, UInt32 offset) { UInt32 i; UInt8 max_val = 0; UInt32 max_idx = 0; Vps_printf("OFFSET=%d\n", offset); for (i=0; i max_val) { max_val = val; max_idx = i; } Vps_printf("i=%d, value=%d\n", i, val); } Vps_printf("MAX i=%d, value=%d\n", max_idx, max_val); } Void fileWriteTaskMain(UArg arg1, UArg arg2) { Bool dump; chains_tidlAppObj *pObj = (chains_tidlAppObj*)arg1; while(1) { BspOsal_semWait(pObj->fileWriteSem, BSP_OSAL_WAIT_FOREVER); dump = TRUE; if(0 != pObj->outNumFrames) { if(pObj->outFrameNum == pObj->outNumFrames) { /* All the frames are dumped */ dump = FALSE; } } if(TRUE == dump) { /* Write the output buffer to file */ ChainsCommon_Osal_fileWrite( pObj->outFp, (UInt8*)pObj->curOutputBufAddr, (pObj->inWidth * pObj->inHeight)); UInt8 bufferOffset; bufferOffset = *(UInt8*)(pObj->curOutputBufAddr); printBinaryFile (bufferOffset, 1000, *(UInt32*)((bufferOffset*4)+4)); Vps_printf(" ########## FRAME # %d, QUEUE = %d ###########\n",\ pObj->outFrameNum++,pObj->curQue); } } } Python code to print OUT.BIN -------------------------------------------- fdOUT = open('OUT.BIN', 'rb') fOUT = np.fromfile(fdOUT, dtype=np.uint8, count=sizeOUT) offset = 9 # Offset from the usecase above for i in list(range(1,1000)): print ("i="+str(i)+" "+"val="+str(fOUT[offset+i])) However, two outputs does not match, what am I missing here? Any help is greately appreciated as I am stuck on this issue. Thank you. + +Hi We are debugging the issue, and also busy with the release this week, so we will come back next week. Thanks Gaviraju + +Hi, Sorry for the late response. Please find the attached patch file & apply these changes to your local file. I added 2 more parameters in "TIDLCFG.txt" & these parameters used for dumping the output frame. 0763.patch.txt diff --git a/apps/src/rtos/usecases/tidl/chains_tidl.c b/apps/src/rtos/usecases/tidl/chains_tidl.c +index 21e54431e..e4673ffa7 100755 +--- a/apps/src/rtos/usecases/tidl/chains_tidl.c ++++ b/apps/src/rtos/usecases/tidl/chains_tidl.c +@@ -231,6 +231,16 @@ static Int32 parseCfg(chains_tidlAppObj *pObj) + pObj->inHeight = atoi(pVal); + numArg ++; + } ++ if(0 == strcmp(pArg,"outputWidth")) ++ { ++ pObj->outWidth = atoi(pVal); ++ numArg ++; ++ } ++ else if(0 == strcmp(pArg,"outputHeight")) ++ { ++ pObj->outHeight = atoi(pVal); ++ numArg ++; ++ } + else if(0 == strcmp(pArg,"inputFile")) + { + strcpy(pObj->inFileName,pVal); +@@ -267,6 +277,8 @@ static Int32 parseCfg(chains_tidlAppObj *pObj) + Vps_printf(" -----------------------------"); + Vps_printf(" inputWidth = %d\n",pObj->inWidth); + Vps_printf(" inputHeight = %d\n",pObj->inHeight); ++ Vps_printf(" outputWidth = %d\n",pObj->outWidth); ++ Vps_printf(" outputHeight = %d\n",pObj->outHeight); + Vps_printf(" inputFile = %s\n",pObj->inFileName); + Vps_printf(" outputFile = %s\n",pObj->outFileName); + Vps_printf(" netFileName = %s\n",pObj->netFileName); +@@ -572,27 +584,27 @@ static Void dumpOutCb(System_LinkChInfo *pChInfo, Void *pBuf, Void *arg) + pObj->curOutputBufAddr = pObj->outputBuf[pObj->curOutBuf]; + pObj->curOutBuf = (pObj->curOutBuf == 0)?1:0; + pObj->curQue = pFrameBuf->chNum; +- ++ + Cache_inv( + pMetaDataBuf->bufAddr[0], +- ((pObj->inWidth + (2 * TIDL_MAX_PAD_SIZE)) * \ +- (pObj->inHeight + (2 * TIDL_MAX_PAD_SIZE))), ++ ((pObj->outWidth + (2 * TIDL_MAX_PAD_SIZE)) * \ ++ (pObj->outHeight + (2 * TIDL_MAX_PAD_SIZE))), + Cache_Type_ALL, + TRUE); + + /* Remove the padding */ +- dmaPrm.srcPitch[0] = (pObj->inWidth + (2 * TIDL_MAX_PAD_SIZE)); ++ dmaPrm.srcPitch[0] = (pObj->outWidth + (2 * TIDL_MAX_PAD_SIZE)); + inBufOffset = \ + ((dmaPrm.srcPitch[0] * TIDL_MAX_PAD_SIZE) + TIDL_MAX_PAD_SIZE); + dmaPrm.dataFormat = SYSTEM_DF_RAW08; + dmaPrm.destAddr[0] = (Ptr)(pObj->curOutputBufAddr); + dmaPrm.destAddr[1] = NULL; +- dmaPrm.destPitch[0] = pObj->inWidth; ++ dmaPrm.destPitch[0] = pObj->outWidth; + dmaPrm.destPitch[1] = 0; + dmaPrm.destStartX = 0; + dmaPrm.destStartY = 0; +- dmaPrm.width = pObj->inWidth; +- dmaPrm.height = pObj->inHeight; ++ dmaPrm.width = pObj->outWidth; ++ dmaPrm.height = pObj->outHeight; + dmaPrm.srcAddr[0] = (Ptr)((UInt32)pMetaDataBuf->bufAddr[0] + inBufOffset); + dmaPrm.srcAddr[1] = NULL; + dmaPrm.srcPitch[1] = 0; +@@ -604,7 +616,7 @@ static Void dumpOutCb(System_LinkChInfo *pChInfo, Void *pBuf, Void *arg) + + Cache_wb( + (Ptr)pObj->curOutputBufAddr, +- (pObj->inWidth * pObj->inHeight), ++ (pObj->outWidth * pObj->outHeight), + Cache_Type_ALL, + TRUE); + +@@ -638,7 +650,7 @@ Void fileWriteTaskMain(UArg arg1, UArg arg2) + ChainsCommon_Osal_fileWrite( + pObj->outFp, + (UInt8*)pObj->curOutputBufAddr, +- (pObj->inWidth * pObj->inHeight)); ++ (pObj->outWidth * pObj->outHeight)); + Vps_printf(" ########## FRAME # %d, QUEUE = %d ###########\n",\ + pObj->outFrameNum++,pObj->curQue); + } +diff --git a/apps/src/rtos/usecases/tidl/chains_tidl.h b/apps/src/rtos/usecases/tidl/chains_tidl.h +index 1672564a7..7fa677e3c 100755 +--- a/apps/src/rtos/usecases/tidl/chains_tidl.h ++++ b/apps/src/rtos/usecases/tidl/chains_tidl.h +@@ -94,7 +94,7 @@ Limited License. + #define NULLSRC_TIMER_PERIOD_FW (2000) + + /* Number of configuration parameters */ +-#define TIDL_NUM_ARGS (6) ++#define TIDL_NUM_ARGS (8) + + /* Priority of the File write task */ + #define TIDL_UC_FILEWRITE_TSK_PRI (1) +@@ -140,6 +140,8 @@ typedef struct + + UInt32 inWidth; + UInt32 inHeight; ++ UInt32 outWidth; ++ UInt32 outHeight; + char netFileName[64U]; + char paramFileName[64U]; + char inFileName[64U]; + TIDLCFG.TXT Thanks Gaviraju + diff --git a/data2/text/range/30001+/875504.txt b/data2/text/range/30001+/875504.txt new file mode 100644 index 0000000000000000000000000000000000000000..71409ef1547f58265ff067957923752896b340ba --- /dev/null +++ b/data2/text/range/30001+/875504.txt @@ -0,0 +1,630 @@ +Ticket Name: TDA2P-ACD: Stream camera feed from the board to PC + +Query Text: +Part Number: TDA2P-ACD I want to stream camera feed from the board to PC. I am trying to run following usecases after selecting AR143 camera from settings. (ISS Usecase “1: 1CH ISS capture + ISS ISP + ISS LDC+VTNF + Display” works fine) Vision SDK Usecases -> 7: Network RX/TX Usecases -> 3: 1CH VIP Capture + Network TX AND -> 4: 1CH VIP Capture + Encode + Network TX (TDA2x ONLY) I see below assertion in both the cases. [IPU1-0] 372.109101 s: Chains: Using TCP/IP [IPU1-0] 372.113493 s: CAPTURE: Create in progress !!! [IPU1-0] 372.113707 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [IPU1-0] 372.113829 s: captdrv/src/vpsdrv_capturePriv.c @ Line 266: [IPU1-0] 372.114012 s: Invalid number of streams(0) - Supported max streams 8 [IPU1-0] 372.114103 s: Assertion @ Line: 559 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! [IPU1-0] 372.114561 s: Assertion @ Line: 559 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! I see from the source code that FVID2_create is failed. Attached gmake_showconfig_22Jan2020.txt and TDA2P-RTOS-Boot-log-camera-selection-stream-assertion_25Jan2020.txt TDA2P-RTOS-Boot-log-camera-selection-stream-assertion_25Jan2020.txt [IPU1-0] 372.114561 s: Assertion @ Line: 559 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! +▒ + TDA2Px SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + TDA2Px DDR Configuration + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 118114 (10.7 ms) + SOC Init Cycles - 170546 (14.55 ms) + DDR Config Clock Cycles - 89689 (7.65 ms) + App Image Load Cycles - 277535614 (23683.3 ms) + Slave Core Bootup Cycles - 130558 (11.14 ms) + SBL Boot-up Cycles - 278045577 (23726.55 ms) + Time at which SBL started IPU1_0 - 788132 (24051.87 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 24.044348 s: ***** IPU1_0 Firmware build time 10:13:14 Jan 15 2020 +[IPU1-0] 24.044531 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 24.127188 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU1-0] 24.127371 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 24.127493 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 24.127584 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 24.127706 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 24.127798 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 24.127920 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 24.129659 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 24.129811 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 24.141767 s: UTILS: CIO: Init Done !!! +[IPU1-0] 24.141889 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 24.141950 s: SYSTEM: Notify init done !!! +[IPU1-0] 24.143750 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 24.144573 s: SYSTEM: Work Queue init done !!! +[IPU1-0] 24.144665 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 24.148600 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 24.148691 s: SYSTEM: System Init in progress !!! +[IPU1-0] 24.148783 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 24.148844 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 24.148905 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 24.149027 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 24.149118 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 24.149271 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 24.149393 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 24.149484 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 24.152961 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 24.153083 s: VPDMA Firmware Address = 0x9fd1b5c0 +[IPU1-0] 24.153175 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 24.153266 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 24.153358 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 24.153480 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 24.153876 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 24.153968 s: VPDMA Firmware Address = 0x9fd1b5c0 +[IPU1-0] 24.154059 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 24.154181 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 24.154273 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 24.154334 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 24.154791 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 24.154883 s: VPDMA Firmware Address = 0x9fd1b5c0 +[IPU1-0] 24.154974 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 24.155096 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 24.155157 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 24.155249 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 24.230921 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 24.231836 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 24.232050 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 24.232141 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254232 B (248 KB) +[IPU1-0] 24.232294 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 24.232507 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88583000, Total size = 368037888 B (350 MB), Free size = 368037888 B (350 MB) +[IPU1-0] 24.232751 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127872 B (0 MB), Free size = 106368 B (0 MB) +[IPU1-0] 24.232934 s: SYSTEM: Initializing Links !!! +[IPU1-0] 24.533916 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 24.587384 s: BOARD: Board Init in progress !!! +[IPU1-0] 24.587842 s: BOARD: Board Init Done !!! +[IPU1-0] 24.601598 s: +[IPU1-0] 24.601659 s: Vision SDK Version : [REL_VISION_SDK_03_08_00_00] +[IPU1-0] 24.601750 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 24.601811 s: BSP Version : [PDK_01_10_04__xx] +[IPU1-0] 24.601872 s: Platform : [EVM] +[IPU1-0] 24.601964 s: SOC : [TDA2PX] +[IPU1-0] 24.602025 s: SOC Revision : [ES1.0] +[IPU1-0] 24.602086 s: Board Detected : [Vision] +[IPU1-0] 24.607637 s: EEPROM Base Board Name: [DRA76/7xP,TDA2P] +[IPU1-0] 24.607728 s: Base Board Revision : [REV A] +[IPU1-0] 24.609040 s: Daughter Card Revision: [REV D] +[IPU1-0] 24.609131 s: +[IPU1-0] 24.612853 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 24.060300 s: ***** IPU1_1 Firmware build time 10:08:42 Jan 15 2020 +[IPU1-1] 24.060483 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 24.129475 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU1-1] 24.129689 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 24.129811 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 24.129964 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 24.130055 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 24.130177 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 24.130269 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 24.132190 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 24.133288 s: UTILS: CIO: Init Done !!! +[IPU1-1] 24.133410 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 24.133502 s: SYSTEM: Notify init done !!! +[IPU1-1] 24.135271 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 24.136064 s: SYSTEM: Work Queue init done !!! +[IPU1-1] 24.136155 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 24.139754 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 24.139876 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 24.140700 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 24.140913 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 24.141035 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 647600 B (632 KB) +[IPU1-1] 24.141188 s: SYSTEM: Initializing Links !!! +[IPU1-1] 24.252577 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 24.252729 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 24.252790 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 24.121606 s: ***** A15_0 Firmware build time 10:11:39 Jan 15 2020 +[HOST ] 24.121637 s: *** SYSTEM: CPU Frequency , +[HOST ] 24.128103 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[HOST ] 24.128133 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[HOST ] 24.128164 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 24.128164 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 24.128164 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 24.128194 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 24.128194 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 24.130818 s: SYSTEM: System Common Init in progress !!! +[HOST ] 24.130848 s: SYSTEM: IPC init in progress !!! +[HOST ] 24.130848 s: SYSTEM: Notify init done !!! +[HOST ] 24.130879 s: SYSTEM: MsgQ init done !!! +[HOST ] 24.130909 s: SYSTEM: Work Queue init done !!! +[HOST ] 24.130940 s: SYSTEM: IPC init DONE !!! +[HOST ] 24.131489 s: SYSTEM: System Common Init Done !!! +[HOST ] 24.131519 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 24.131550 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 24.131580 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[HOST ] 24.131580 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6248624 B (6102 KB) +[HOST ] 24.131611 s: SYSTEM: Initializing Links !!! +[HOST ] 24.133929 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[HOST ] 24.133990 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[HOST ] 24.134081 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[HOST ] 24.134142 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[HOST ] 24.134203 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[HOST ] 24.134295 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[HOST ] 24.134356 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[HOST ] 24.134447 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[HOST ] 24.134508 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[HOST ] 24.134600 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[HOST ] 24.134691 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[HOST ] 24.134691 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 24.134752 s: SYSTEM: System A15 Init Done !!! +[HOST ] 24.428536 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 24.430854 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 24.106081 s: ***** DSP1 Firmware build time 10:02:32 Jan 15 2020 +[DSP1 ] 24.106142 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 24.131641 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP1 ] 24.131702 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP1 ] 24.131733 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 24.131763 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 24.131794 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 24.131824 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 24.131855 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 24.132007 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 24.132068 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 24.132251 s: UTILS: CIO: Init Done !!! +[DSP1 ] 24.132282 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 24.132312 s: SYSTEM: Notify init done !!! +[DSP1 ] 24.132465 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 24.132587 s: SYSTEM: Work Queue init done !!! +[DSP1 ] 24.132617 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 24.133349 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 24.133380 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 24.133563 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 24.133624 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 24.133685 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516616 B (504 KB) +[DSP1 ] 24.133715 s: SYSTEM: Initializing Links !!! +[DSP1 ] 24.141798 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 24.141859 s: lz4CompDecomp Init +[DSP1 ] 24.141859 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 24.548221 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 24.548252 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 24.106081 s: ***** DSP2 Firmware build time 10:05:49 Jan 15 2020 +[DSP2 ] 24.106142 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 24.132831 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP2 ] 24.132892 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP2 ] 24.132922 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 24.132953 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 24.132983 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 24.133014 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 24.133044 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 24.133197 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 24.133227 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 24.133441 s: UTILS: CIO: Init Done !!! +[DSP2 ] 24.133471 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 24.133502 s: SYSTEM: Notify init done !!! +[DSP2 ] 24.133624 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 24.133746 s: SYSTEM: Work Queue init done !!! +[DSP2 ] 24.133776 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 24.134539 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 24.134569 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 24.134783 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 24.134813 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 24.134874 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516616 B (504 KB) +[DSP2 ] 24.134905 s: SYSTEM: Initializing Links !!! +[DSP2 ] 24.142835 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 24.142896 s: lz4CompDecomp Init +[DSP2 ] 24.142896 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 24.550204 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 24.550234 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 24.057616 s: ***** EVE Firmware build time 09:52:02 Jan 15 2020 +[EVE1 ] 24.059385 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 24.135362 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE1 ] 24.136887 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE1 ] 24.138321 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 24.139663 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 24.141035 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 24.142377 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 24.143658 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 24.145885 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 24.147928 s: UTILS: CIO: Init Done !!! +[EVE1 ] 24.148844 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 24.149789 s: SYSTEM: Notify init done !!! +[EVE1 ] 24.151619 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 24.153022 s: SYSTEM: Work Queue init done !!! +[EVE1 ] 24.153968 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 24.166534 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 24.167510 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 24.168944 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 24.170103 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 24.171353 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 24.173549 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254408 B (248 KB) +[EVE1 ] 24.175623 s: SYSTEM: Initializing Links !!! +[EVE1 ] 24.263161 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 24.264198 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 24.061123 s: ***** EVE Firmware build time 09:59:12 Jan 15 2020 +[EVE2 ] 24.062801 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 24.135362 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE2 ] 24.136887 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE2 ] 24.138321 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 24.139663 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 24.141035 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 24.142408 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 24.143689 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 24.145915 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 24.147959 s: UTILS: CIO: Init Done !!! +[EVE2 ] 24.148874 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 24.149820 s: SYSTEM: Notify init done !!! +[EVE2 ] 24.151650 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 24.153053 s: SYSTEM: Work Queue init done !!! +[EVE2 ] 24.153998 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 24.166595 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 24.167541 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 24.169005 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 24.170133 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 24.171384 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 24.173580 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254408 B (248 KB) +[EVE2 ] 24.175654 s: SYSTEM: Initializing Links !!! +[EVE2 ] 24.263130 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 24.264167 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 24.042152 s: ***** IPU2 Firmware build time 10:16:53 Jan 15 2020 +[IPU2 ] 24.042365 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 24.130635 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU2 ] 24.130787 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU2 ] 24.130909 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 24.131001 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 24.131123 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 24.131245 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 24.131336 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 24.134051 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 24.135271 s: UTILS: CIO: Init Done !!! +[IPU2 ] 24.135423 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 24.135515 s: SYSTEM: Notify init done !!! +[IPU2 ] 24.137314 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 24.138077 s: SYSTEM: Work Queue init done !!! +[IPU2 ] 24.138168 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 24.143323 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 24.143475 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 24.144238 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 24.144512 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU2 ] 24.144604 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254336 B (248 KB) +[IPU2 ] 24.144756 s: SYSTEM: Initializing Links !!! +[IPU2 ] 24.248551 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU2 ] 24.251235 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU2 ] 24.253949 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU2 ] 24.256847 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU2 ] 24.259684 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU2 ] 24.262612 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU2 ] 24.265509 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU2 ] 24.268315 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU2 ] 24.271182 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU2 ] 24.274049 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU2 ] 24.276947 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU2 ] 24.277069 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 24.277130 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 25.646281 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines +[IPU1-0] 25.651192 s: QSPI Init Started +[IPU1-0] 25.651467 s: MID - 1 +[IPU1-0] 25.651528 s: DID - 18 +[IPU1-0] 25.651558 s: QSPI Init Completed Sucessfully +[IPU1-0] 25.666839 s: +[IPU1-0] 25.666900 s: Current System Settings, +[IPU1-0] 25.666961 s: ======================== +[IPU1-0] 25.667022 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 25.667083 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[IPU1-0] 25.667175 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 25.667236 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 25.667297 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 25.667388 s: +[IPU1-0] 25.667449 s: ============ +[IPU1-0] 25.667510 s: Usecase Menu +[IPU1-0] 25.667541 s: ============ +[IPU1-0] 25.667602 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 26.029219 s: NDK: Link Status: 100Mb/s Full Duplex on PHY 2 +[HOST ] 29.134386 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 29.134417 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 50.425150 s: +[IPU1-0] 50.425211 s: +[IPU1-0] +[IPU1-0] =============== +[IPU1-0] System Settings +[IPU1-0] =============== +[IPU1-0] +[IPU1-0] 1: Display Settings +[IPU1-0] 2: Capture Settings +[IPU1-0] 3: ISS Settings (TDA3x ONLY) +[IPU1-0] 4: Enable Charging via USB2 Port (TDA2x EVM ONLY) +[IPU1-0] 5: Print PRCM Statistics +[IPU1-0] 6: Show Memory/CPU/DDR BW usage +[IPU1-0] 7: Calibration Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 50.425486 s: +[IPU1-0] 52.297535 s: +[IPU1-0] +[IPU1-0] ============== +[IPU1-0] Capture Source +[IPU1-0] ============== +[IPU1-0] +[IPU1-0] 1: OV10635 Sensor 720P30 +[IPU1-0] 2: HDMI Capture 1080P60 (Not Supported in TDA2x/TDA2Ex Multi-serdes board) +[IPU1-0] 3: OV10640 Sensor 720P30 - CSI2 (TDA3x ONLY) +[IPU1-0] 4: OV10640 Sensor 720P30 - Parallel (TDA3x ONLY) +[IPU1-0] 5: AR0132 Sensor 720P60 - Parallel (TDA3x ONLY) +[IPU1-0] 6: AR0140 Sensor 720P60 - Parallel (TDA3x ONLY) +[IPU1-0] 7: IMX224 Sensor 1280x960 - CSI2 (TDA3x ONLY) +[IPU1-0] 8: AR0140 Sensor for SV - TIDA00262 (TDA3x ONLY) +[IPU1-0] 9: OV10640 Sensor for SV - IMI (TDA3x ONLY) +[IPU1-0] a: OV10635 Sensor for Mosaic Display - SAT0088/OV10635 (TDA2PX, TDA2EX & TDA3x) +[IPU1-0] b: OV2775 Sensor 1080p30 (TDA3x ONLY) +[IPU1-0] c: AR143 MARS Camera (TDA3x ONLY) +[IPU1-0] d: Skip Sensor configuration +[IPU1-0] e: OV2775 Sensor 1080p30 - TIDA001130 +[IPU1-0] f: IMX390 Sensor 1080p30 - D3 +[IPU1-0] g: OV10640 Sensor + OV490 ISP - IMI +[IPU1-0] h: AR0233 RCCB UB953 - MARS +[IPU1-0] i: OV2311 UB953 - Leopard Imaging +[IPU1-0] j: AR0239 RGBIR UB953 - MARS +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 52.298328 s: +[IPU1-0] 55.784786 s: MARS AR0143 Selected +[IPU1-0] 55.785060 s: +[IPU1-0] 55.785091 s: Current System Settings, +[IPU1-0] 55.785152 s: ======================== +[IPU1-0] 55.785243 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 55.785304 s: Capture Source : Sensor AR0143 MARS 1280x800 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY) +[IPU1-0] 55.785426 s: My IP address for interface 1 : 192.168.1.3 +[IPU1-0] 55.785487 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 55.785548 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 55.785640 s: +[IPU1-0] 55.785670 s: ============ +[IPU1-0] 55.785701 s: Usecase Menu +[IPU1-0] 55.785762 s: ============ +[IPU1-0] 55.785792 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 61.590373 s: +[IPU1-0] 61.590526 s: +[IPU1-0] +[IPU1-0] Select use-case, +[IPU1-0] ---------------- +[IPU1-0] 1: Network RX + Display +[IPU1-0] 2: Network RX + Decode + Display (TDA2x ONLY) +[IPU1-0] 3: 1CH VIP Capture + Network TX +[IPU1-0] 4: 1CH VIP Capture + Encode + Network TX (TDA2x ONLY) +[IPU1-0] 5: 4CH VIP Capture + Network TX +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 66.717013 s: Chains: Using TCP/IP +[IPU1-0] 66.720917 s: CAPTURE: Create in progress !!! +[IPU1-0] 66.721130 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! +[IPU1-0] 66.721252 s: captdrv/src/vpsdrv_capturePriv.c @ Line 266: +[IPU1-0] 66.721344 s: Invalid number of streams(0) - Supported max streams 8 +[IPU1-0] 66.721435 s: Assertion @ Line: 559 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! +[IPU1-0] 66.721954 s: Assertion @ Line: 559 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! + gmake_showconfig_22Jan2020.txt Microsoft Windows [Version 10.0.10240] +(c) 2015 Microsoft Corporation. All rights reserved. + +C:\Users\sgandiga>cd C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\build + +C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\build> +C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\build>gmake showconfig +gmake -C C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs -f build_makeconfig.mk showconfig +gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs' +# +# Build Config is [ tda2px_evm_bios_all ] +# Build Config file is @ C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/configs/tda2px_evm_bios_all/cfg.mk +# Build Config .h file is @ C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/include/config/apps/tda2px_evm_bios_all/system_cfg.h +# Build CPUs is @ ipu1_0 ipu1_1 ipu2 a15_0 dsp1 dsp2 eve1 eve2 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=yes +# PROC_IPU1_1_INCLUDE=yes +# PROC_IPU2_INCLUDE=yes +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=yes +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=yes +# PROC_EVE3_INCLUDE=no +# PROC_EVE4_INCLUDE=no +# PROC_A15_0_INCLUDE=yes +# +# Platform config, +# VSDK_BOARD_TYPE=TDA2PX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda2px-evm +# DUAL_A15_SMP_BIOS=no +# IPU1_SMP_BIOS=no +# DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] +# NDK_PROC_TO_USE=a15_0 [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=no [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Windows_NT [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=release [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Bios [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=yes +# VPE_INCLUDE=yes +# CAL_INCLUDE=yes +# ISS_INCLUDE=yes +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=no +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/src/rtos/opencl +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=no +# +# Log config, +# ENABLE_UART_LOG=yes +# ENABLE_NETWORK_LOG=no +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=yes +# +# IPC config, +# WORKQ_INCLUDE=yes +# IPC_LIB_INCLUDE=no +# +# AUTOSAR_APP=no +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=no +# RADAR_ONLY=no +# RADAR_STUDIO=no +# CPU_IDLE_ENABLED=yes +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# PGA450= +# PGA460= +# ENABLE_ALL_DEPTH= +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb +# CMEM_INCLUDE=no +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=no +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_autocalibration ALG_clr ALG_deWarp ALG_dmaSwMs ALG_vpeSwMs ALG_edgedetection ALG_framecopy ALG_lanedetection ALG_objectdetection ALG_safe_framecopy ALG_sceneobstruction ALG_sfm ALG_sparseopticalflow ALG_subframecopy ALG_surroundview ALG_tidl ALG_rgbirprocess ALG_rgbirmux ALG_radarprocess ALG_iss_aewb +# +# Use-cases included in build, +# UC_iss_capture_isp_simcop_display UC_iss_mult_capture_isp_2d_3d_sv_tda3x UC_iss_mult_capture_isp_dewarp_3dsv_tda3xx UC_iss_mult_capture_isp_simcop_sv_tda3xx UC_iss_multi_inst_capture_display UC_srv_calibration UC_lvds_vip_multi_cam_view UC_lvds_vip_sv_standalone UC_network_rx_tx UC_null_src_dec_display UC_null_src_display UC_saveDisFrame UC_vip_single_cam_analytics2 UC_vip_single_cam_edge_detection UC_vip_single_cam_frame_copy UC_vip_single_cam_frame_copy_safety UC_vip_single_cam_lane_detection UC_vip_single_cam_object_detection2 UC_vip_single_cam_sfm UC_vip_single_cam_sparse_optical_flow UC_vip_single_cam_subframe_copy UC_vip_single_cam_tlr UC_vip_single_cam_view UC_vip_single_cam_view_encdec UC_csi2_cal_multi_cam_view UC_camera_radar_capture_display UC_tidl_OD_radar_process_display UC_iss_capture_rgbir_isp_display UC_radar_objectdetect_display +# +gmake -s -fbuild_makeconfig.mk check_cpu_include +gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs' +# +# CPUs that are NOT required but included in config [ tda2px_evm_bios_all ], +# +# WARNING: IPU1_1 can be excluded from application +# WARNING: IPU2 can be excluded from application +# +# CPUs that are required but not included in config [ tda2px_evm_bios_all ], +# +# +# Edit C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk to include or exclude CPUs in an application +# +gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs' +gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs' + +C:\PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\build> + +Responses: +Hi Sandeep, If i remember correctly, AR0143 sensor is supported for ISS usecases, but not for VIP usecases. I think OV10635 sensor is supported for VIP usecases. Rgds, Brijesh + +Hi Brijesh, Thanks for the info. Could you please suggest how to expand/modify this use case to allow any capture source (AR143 camera in my case, selected under “System Settings/Capture source”)? Thanks, Sandeep + +Hi Sandeep, But how is your sensor connected to the TDA device? Is it over parallel interface or CSI? If it is parallel, is it connected over VIP or ISS? Based on where it is connected, we need to use either ISS capture link or VIP capture link. Rest of the pipeline you could reuse from the existing usecase. Regards, Brijesh + +Hi Brijesh, This is what I see in the log "Capture Source : Sensor AR0143 MARS 1280x800 @ 30fps - ISS CSI2, Bayer (TDA3x EVM ONLY)". I understand the camera is connected over ISS-CSI2, so we are looking at merging ISS capture, encode and Network usecases into one. I am wondering if you already have this working, if yes, we would like to get it, if not, please suggest us the parts in the existing use cases on how we should modify them. Thanks, Sandeep + +Hi Sandeep, I dont think we have a usecase. You could use single camera ISS usecase and merge it with encoder link at the ISP output. Please note that you need to use ISP, because this sensor outputs RAW data, that needs to be converted into YUV420 using ISP. Regards, Brijesh + diff --git a/data2/text/range/30001+/878919.txt b/data2/text/range/30001+/878919.txt new file mode 100644 index 0000000000000000000000000000000000000000..b28de14003b3f47e473e6ca641379cfa53a6c8be --- /dev/null +++ b/data2/text/range/30001+/878919.txt @@ -0,0 +1,293 @@ +Ticket Name: TDA2EVM5777: [TIDL_OD] The detection result is not stable + +Query Text: +Part Number: TDA2EVM5777 Hi, This is regarding TIDL (REL.TIDL.01.02.00.00) To evaluate TIDL_OD, my customer created a video input data which consists of exactly the same frames. Even though the input frames has same data, the detection result are not the same. In a frame some objects were detected, in another frame the size of bounding box was changed, new object was found, etc. Please find below example. (1) Please let me know why the detection result is not stable? (2) Can we modify network, parameters, input data etc to get the same result from the same input frame? I also attach the input data and logs. result.log [IPU1-0] 12.905782 s: +[IPU1-0] 12.952113 s: TIDL Configuration parameters +[IPU1-0] 12.952205 s: ----------------------------- +[IPU1-0] 12.952266 s: inputWidth = 768 +[IPU1-0] 12.952327 s: inputHeight = 320 +[IPU1-0] 12.952388 s: inputFile = car_test1.h264 +[IPU1-0] 12.952449 s: inputFile = car_test1_HD.bin +[IPU1-0] 12.952510 s: netFileName = tidl_net_jdetNet_ssd.bin +[IPU1-0] 12.952571 s: paramFileName = tidl_param_jdetNet_ssd.bin +[IPU1-0] 12.952662 s: inputfps = 1 +[IPU1-0] 12.952723 s: threshold = 0.300000 +[IPU1-0] 12.952845 s: ----------------------------- + + + +[IPU1-0] 23.094949 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.939484, Scale=1.000000, (391, 169 : 356 x 147) +[IPU1-0] 23.096138 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.775635, Scale=1.000000, (272, 167 : 296 x 101) +[IPU1-0] 23.097267 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.939484, Scale=1.000000, (391, 169 : 356 x 147) +[IPU1-0] 23.098212 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.775635, Scale=1.000000, (272, 167 : 296 x 101) + +[IPU1-0] 24.086683 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 24.087659 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 24.088787 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 24.089855 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 24.090800 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.349518, Scale=1.000000, (11, 139 : 190 x 90) + +[IPU1-0] 25.086927 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 25.087903 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 25.089123 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 25.090068 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 25.091044 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.349518, Scale=1.000000, (11, 139 : 190 x 90) + +[IPU1-0] 26.086500 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 26.087476 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 26.088696 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.948730, Scale=1.000000, (408, 169 : 344 x 147) +[IPU1-0] 26.089611 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.843292, Scale=1.000000, (264, 173 : 302 x 97) +[IPU1-0] 26.090587 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.349518, Scale=1.000000, (11, 139 : 190 x 90) + +[IPU1-0] 27.087110 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991943, Scale=1.000000, (413, 170 : 337 x 146) +[IPU1-0] 27.088177 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.933624, Scale=1.000000, (269, 172 : 298 x 97) +[IPU1-0] 27.088940 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.349091, Scale=1.000000, (10, 139 : 190 x 91) + +[IPU1-0] 28.086591 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 28.087659 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 28.088757 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 28.089672 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 28.090648 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.398132, Scale=1.000000, (10, 137 : 191 x 92) + +[IPU1-0] 29.087079 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 29.088025 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 29.089123 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 29.090068 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 29.091014 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.398132, Scale=1.000000, (10, 137 : 191 x 92) + +[IPU1-0] 30.086622 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 30.087567 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 30.088665 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.991882, Scale=1.000000, (417, 169 : 334 x 147) +[IPU1-0] 30.089611 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.922333, Scale=1.000000, (263, 174 : 300 x 97) +[IPU1-0] 30.090587 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.398132, Scale=1.000000, (10, 137 : 191 x 92) + +[IPU1-0] 31.087201 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.958282, Scale=1.000000, (417, 168 : 332 x 148) +[IPU1-0] 31.088177 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.865356, Scale=1.000000, (266, 173 : 302 x 99) +[IPU1-0] 31.089275 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.958282, Scale=1.000000, (417, 168 : 332 x 148) +[IPU1-0] 31.090221 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.865356, Scale=1.000000, (266, 173 : 302 x 99) +[IPU1-0] 31.091197 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.385529, Scale=1.000000, (11, 138 : 190 x 91) + +[IPU1-0] 32.086744 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 32.087689 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 32.088787 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 32.089702 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 32.090678 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.364990, Scale=1.000000, (10, 138 : 190 x 90) + +[IPU1-0] 33.086957 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 33.087903 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 33.089123 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 33.090068 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 33.091044 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.364990, Scale=1.000000, (10, 138 : 190 x 90) + +[IPU1-0] 34.086591 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 34.087537 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 34.088635 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.956421, Scale=1.000000, (413, 167 : 339 x 149) +[IPU1-0] 34.089550 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.854279, Scale=1.000000, (264, 172 : 296 x 96) +[IPU1-0] 34.090282 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.364990, Scale=1.000000, (10, 138 : 190 x 90) + +[IPU1-0] 35.098304 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.663879, Scale=1.000000, (417, 168 : 338 x 148) +[IPU1-0] 35.099158 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499176, Scale=1.000000, (231, 156 : 189 x 115) +[IPU1-0] 35.099890 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499176, Scale=1.000000, (12, 156 : 185 x 83) +[IPU1-0] 35.101201 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499115, Scale=1.000000, (160, 123 : 279 x 119) +[IPU1-0] 35.102238 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498810, Scale=1.000000, (266, 169 : 297 x 108) +[IPU1-0] 35.102696 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496826, Scale=1.000000, (182, 157 : 49 x 38) +[IPU1-0] 35.103153 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496826, Scale=1.000000, (127, 148 : 73 x 53) +[IPU1-0] 35.103580 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496826, Scale=1.000000, (4, 155 : 36 x 54) +[IPU1-0] 35.103977 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.496826, Scale=1.000000, (722, 24 : 40 x 47) +[IPU1-0] 35.104465 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.496826, Scale=1.000000, (28, 4 : 58 x 58) +[IPU1-0] 35.105166 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.479980, Scale=1.000000, (96, 128 : 168 x 105) +[IPU1-0] 35.105776 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.477692, Scale=1.000000, (34, 25 : 35 x 34) +[IPU1-0] 35.106142 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.477692, Scale=1.000000, (35, 4 : 36 x 37) +[IPU1-0] 35.106539 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.458588, Scale=1.000000, (138, 162 : 59 x 27) +[IPU1-0] 35.106874 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.420837, Scale=1.000000, (356, 125 : 22 x 39) +[IPU1-0] 35.107179 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.420837, Scale=1.000000, (4, 164 : 31 x 25) +[IPU1-0] 35.107576 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.420837, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 35.108552 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.404175, Scale=1.000000, (31, 161 : 306 x 108) +[IPU1-0] 35.109009 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.383972, Scale=1.000000, (412, 222 : 62 x 55) +[IPU1-0] 35.109650 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.350555, Scale=1.000000, (51, 138 : 160 x 69) + +[IPU1-0] 36.095803 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.694489, Scale=1.000000, (416, 168 : 337 x 148) +[IPU1-0] 36.096779 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.536591, Scale=1.000000, (267, 169 : 298 x 106) +[IPU1-0] 36.097541 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499420, Scale=1.000000, (12, 137 : 187 x 89) +[IPU1-0] 36.097999 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498108, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 36.098365 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.479279, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 36.098761 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.479279, Scale=1.000000, (733, 29 : 31 x 38) +[IPU1-0] 36.099707 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443115, Scale=1.000000, (227, 156 : 193 x 115) +[IPU1-0] 36.100896 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443024, Scale=1.000000, (161, 124 : 278 x 119) +[IPU1-0] 36.101293 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.441833, Scale=1.000000, (182, 157 : 49 x 38) +[IPU1-0] 36.101750 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (30, 7 : 53 x 56) +[IPU1-0] 36.102086 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (33, 25 : 35 x 35) +[IPU1-0] 36.102421 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (35, 4 : 36 x 37) +[IPU1-0] 36.103153 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.424469, Scale=1.000000, (96, 130 : 168 x 102) +[IPU1-0] 36.103550 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.405029, Scale=1.000000, (138, 162 : 59 x 28) +[IPU1-0] 36.103885 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.420837, Scale=1.000000, (356, 125 : 22 x 39) +[IPU1-0] 36.104190 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.369263, Scale=1.000000, (4, 164 : 31 x 26) +[IPU1-0] 36.105136 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.352783, Scale=1.000000, (29, 162 : 307 x 105) +[IPU1-0] 36.105807 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.351654, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 36.106600 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.303131, Scale=1.000000, (423, 171 : 162 x 126) +[IPU1-0] 36.106996 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.302185, Scale=1.000000, (395, 37 : 53 x 36) + +[IPU1-0] 37.095254 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.694489, Scale=1.000000, (416, 168 : 337 x 148) +[IPU1-0] 37.096504 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.536591, Scale=1.000000, (267, 169 : 298 x 106) +[IPU1-0] 37.097236 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499420, Scale=1.000000, (12, 137 : 187 x 89) +[IPU1-0] 37.097724 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498108, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 37.098121 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.479279, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 37.098517 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.479279, Scale=1.000000, (733, 29 : 31 x 38) +[IPU1-0] 37.099402 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443115, Scale=1.000000, (227, 156 : 193 x 115) +[IPU1-0] 37.100347 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443024, Scale=1.000000, (161, 124 : 278 x 119) +[IPU1-0] 37.101018 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.441833, Scale=1.000000, (182, 157 : 49 x 38) +[IPU1-0] 37.101506 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (30, 7 : 53 x 56) +[IPU1-0] 37.101872 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (33, 25 : 35 x 35) +[IPU1-0] 37.102177 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (35, 4 : 36 x 37) +[IPU1-0] 37.102909 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.424469, Scale=1.000000, (96, 130 : 168 x 102) +[IPU1-0] 37.103306 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.405029, Scale=1.000000, (138, 162 : 59 x 28) +[IPU1-0] 37.103641 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.420837, Scale=1.000000, (356, 125 : 22 x 39) +[IPU1-0] 37.103977 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.369263, Scale=1.000000, (4, 164 : 31 x 26) +[IPU1-0] 37.104892 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.352783, Scale=1.000000, (29, 162 : 307 x 105) +[IPU1-0] 37.105319 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.351654, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 37.106325 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.303131, Scale=1.000000, (423, 171 : 162 x 126) +[IPU1-0] 37.106783 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.302185, Scale=1.000000, (395, 37 : 53 x 36) + +[IPU1-0] 38.095925 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.694489, Scale=1.000000, (416, 168 : 337 x 148) +[IPU1-0] 38.096931 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.536591, Scale=1.000000, (267, 169 : 298 x 106) +[IPU1-0] 38.097694 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499420, Scale=1.000000, (12, 137 : 187 x 89) +[IPU1-0] 38.098151 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498108, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 38.098670 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.479279, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 38.099036 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.479279, Scale=1.000000, (733, 29 : 31 x 38) +[IPU1-0] 38.099859 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443115, Scale=1.000000, (227, 156 : 193 x 115) +[IPU1-0] 38.101049 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.443024, Scale=1.000000, (161, 124 : 278 x 119) +[IPU1-0] 38.101445 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.441833, Scale=1.000000, (182, 157 : 49 x 38) +[IPU1-0] 38.101903 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (30, 7 : 53 x 56) +[IPU1-0] 38.102269 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (33, 25 : 35 x 35) +[IPU1-0] 38.102604 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.441833, Scale=1.000000, (35, 4 : 36 x 37) +[IPU1-0] 38.103306 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.424469, Scale=1.000000, (96, 130 : 168 x 102) +[IPU1-0] 38.103733 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.405029, Scale=1.000000, (138, 162 : 59 x 28) +[IPU1-0] 38.104068 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.420837, Scale=1.000000, (356, 125 : 22 x 39) +[IPU1-0] 38.104373 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.369263, Scale=1.000000, (4, 164 : 31 x 26) +[IPU1-0] 38.105410 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.352783, Scale=1.000000, (29, 162 : 307 x 105) +[IPU1-0] 38.106112 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.351654, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 38.106905 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.303131, Scale=1.000000, (423, 171 : 162 x 126) +[IPU1-0] 38.107301 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.302185, Scale=1.000000, (395, 37 : 53 x 36) + +[IPU1-0] 39.099371 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.638580, Scale=1.000000, (424, 168 : 332 x 148) +[IPU1-0] 39.100195 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499176, Scale=1.000000, (4, 128 : 197 x 97) +[IPU1-0] 39.101232 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499176, Scale=1.000000, (228, 156 : 192 x 115) +[IPU1-0] 39.102208 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498810, Scale=1.000000, (267, 172 : 299 x 107) +[IPU1-0] 39.102635 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496429, Scale=1.000000, (137, 162 : 60 x 28) +[IPU1-0] 39.103031 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496429, Scale=1.000000, (182, 157 : 49 x 38) +[IPU1-0] 39.103458 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496429, Scale=1.000000, (127, 148 : 74 x 53) +[IPU1-0] 39.103885 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496429, Scale=1.000000, (4, 155 : 35 x 54) +[IPU1-0] 39.104831 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.459869, Scale=1.000000, (163, 122 : 276 x 119) +[IPU1-0] 39.105197 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.457123, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 39.105776 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.444122, Scale=1.000000, (356, 125 : 22 x 40) +[IPU1-0] 39.106112 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.444122, Scale=1.000000, (4, 164 : 31 x 25) +[IPU1-0] 39.106844 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.433868, Scale=1.000000, (96, 126 : 167 x 106) +[IPU1-0] 39.107240 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.431213, Scale=1.000000, (151, 189 : 51 x 46) +[IPU1-0] 39.107698 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431213, Scale=1.000000, (30, 9 : 52 x 54) +[IPU1-0] 39.108064 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418365, Scale=1.000000, (34, 25 : 34 x 35) +[IPU1-0] 39.108369 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418365, Scale=1.000000, (36, 4 : 34 x 37) +[IPU1-0] 39.109070 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.395660, Scale=1.000000, (10, 174 : 187 x 75) +[IPU1-0] 39.109589 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.380585, Scale=1.000000, (419, 218 : 69 x 66) +[IPU1-0] 39.110809 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.370514, Scale=1.000000, (28, 166 : 306 x 107) + +[IPU1-0] 40.100408 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.651062, Scale=1.000000, (426, 167 : 328 x 149) +[IPU1-0] 40.101476 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499268, Scale=1.000000, (4, 128 : 197 x 97) +[IPU1-0] 40.102421 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498932, Scale=1.000000, (267, 172 : 299 x 107) +[IPU1-0] 40.102879 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (182, 157 : 48 x 38) +[IPU1-0] 40.103336 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 40.103733 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 40.104526 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.486053, Scale=1.000000, (226, 156 : 195 x 115) +[IPU1-0] 40.104953 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.483490, Scale=1.000000, (137, 162 : 60 x 27) +[IPU1-0] 40.105319 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.470367, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 40.106447 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.446808, Scale=1.000000, (165, 123 : 275 x 119) +[IPU1-0] 40.106813 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.444244, Scale=1.000000, (4, 164 : 30 x 25) +[IPU1-0] 40.107149 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.431274, Scale=1.000000, (356, 124 : 22 x 40) +[IPU1-0] 40.107576 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.431274, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 40.108003 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431274, Scale=1.000000, (29, 8 : 53 x 54) +[IPU1-0] 40.108765 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.420929, Scale=1.000000, (96, 125 : 167 x 107) +[IPU1-0] 40.109131 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (33, 25 : 35 x 34) +[IPU1-0] 40.109436 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (35, 4 : 35 x 37) +[IPU1-0] 40.110138 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.395508, Scale=1.000000, (10, 174 : 186 x 74) +[IPU1-0] 40.110839 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368225, Scale=1.000000, (206, 153 : 61 x 39) +[IPU1-0] 40.111297 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368042, Scale=1.000000, (413, 222 : 61 x 55) + +[IPU1-0] 41.099981 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.651062, Scale=1.000000, (426, 167 : 328 x 149) +[IPU1-0] 41.101049 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499268, Scale=1.000000, (4, 128 : 197 x 97) +[IPU1-0] 41.101994 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498932, Scale=1.000000, (267, 172 : 299 x 107) +[IPU1-0] 41.102421 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (182, 157 : 48 x 38) +[IPU1-0] 41.102879 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 41.103275 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 41.104068 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.486053, Scale=1.000000, (226, 156 : 195 x 115) +[IPU1-0] 41.104465 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.483490, Scale=1.000000, (137, 162 : 60 x 27) +[IPU1-0] 41.104861 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.470367, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 41.106508 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.446808, Scale=1.000000, (165, 123 : 275 x 119) +[IPU1-0] 41.106905 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.444244, Scale=1.000000, (4, 164 : 30 x 25) +[IPU1-0] 41.107240 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.431274, Scale=1.000000, (356, 124 : 22 x 40) +[IPU1-0] 41.107759 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.431274, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 41.108186 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431274, Scale=1.000000, (29, 8 : 53 x 54) +[IPU1-0] 41.108948 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.420929, Scale=1.000000, (96, 125 : 167 x 107) +[IPU1-0] 41.109284 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (33, 25 : 35 x 34) +[IPU1-0] 41.109680 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (35, 4 : 35 x 37) +[IPU1-0] 41.110351 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.395508, Scale=1.000000, (10, 174 : 186 x 74) +[IPU1-0] 41.110992 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368225, Scale=1.000000, (206, 153 : 61 x 39) +[IPU1-0] 41.111450 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368042, Scale=1.000000, (413, 222 : 61 x 55) + +[IPU1-0] 42.100286 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.651062, Scale=1.000000, (426, 167 : 328 x 149) +[IPU1-0] 42.101293 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.499268, Scale=1.000000, (4, 128 : 197 x 97) +[IPU1-0] 42.102238 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.498932, Scale=1.000000, (267, 172 : 299 x 107) +[IPU1-0] 42.102696 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (182, 157 : 48 x 38) +[IPU1-0] 42.103153 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (126, 148 : 74 x 53) +[IPU1-0] 42.103519 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (4, 156 : 35 x 53) +[IPU1-0] 42.104343 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.486053, Scale=1.000000, (226, 156 : 195 x 115) +[IPU1-0] 42.104770 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.483490, Scale=1.000000, (137, 162 : 60 x 27) +[IPU1-0] 42.105136 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.470367, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 42.106234 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.446808, Scale=1.000000, (165, 123 : 275 x 119) +[IPU1-0] 42.106569 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.444244, Scale=1.000000, (4, 164 : 30 x 25) +[IPU1-0] 42.106905 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.431274, Scale=1.000000, (356, 124 : 22 x 40) +[IPU1-0] 42.107332 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.431274, Scale=1.000000, (152, 189 : 50 x 46) +[IPU1-0] 42.107789 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431274, Scale=1.000000, (29, 8 : 53 x 54) +[IPU1-0] 42.108491 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.420929, Scale=1.000000, (96, 125 : 167 x 107) +[IPU1-0] 42.108887 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (33, 25 : 35 x 34) +[IPU1-0] 42.109223 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (35, 4 : 35 x 37) +[IPU1-0] 42.109894 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.395508, Scale=1.000000, (10, 174 : 186 x 74) +[IPU1-0] 42.110321 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368225, Scale=1.000000, (206, 153 : 61 x 39) +[IPU1-0] 42.110992 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.368042, Scale=1.000000, (413, 222 : 61 x 55) + +[IPU1-0] 43.092417 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.835663, Scale=1.000000, (426, 168 : 329 x 148) +[IPU1-0] 43.093393 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.734375, Scale=1.000000, (264, 174 : 299 x 101) +[IPU1-0] 43.093698 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.499969, Scale=1.000000, (147, 62 : 12 x 7) +[IPU1-0] 43.093942 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.499969, Scale=1.000000, (146, 58 : 13 x 7) +[IPU1-0] 43.094674 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.469269, Scale=1.000000, (12, 137 : 188 x 88) +[IPU1-0] 43.095132 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.438446, Scale=1.000000, (125, 148 : 74 x 53) +[IPU1-0] 43.095528 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (182, 157 : 48 x 38) +[IPU1-0] 43.096230 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.470367, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 43.097175 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.446808, Scale=1.000000, (165, 123 : 275 x 119) +[IPU1-0] 43.097511 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.431274, Scale=1.000000, (356, 124 : 22 x 40) +[IPU1-0] 43.097938 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431274, Scale=1.000000, (29, 8 : 53 x 54) +[IPU1-0] 43.098304 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (33, 25 : 35 x 34) +[IPU1-0] 43.098639 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (35, 4 : 35 x 37) + +[IPU1-0] 44.092478 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.833740, Scale=1.000000, (422, 168 : 332 x 148) +[IPU1-0] 44.093454 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.737671, Scale=1.000000, (263, 174 : 302 x 101) +[IPU1-0] 44.093759 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.499969, Scale=1.000000, (146, 58 : 13 x 7) +[IPU1-0] 44.094003 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.499969, Scale=1.000000, (147, 61 : 12 x 7) +[IPU1-0] 44.094735 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.489441, Scale=1.000000, (11, 137 : 189 x 88) +[IPU1-0] 44.095193 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.457855, Scale=1.000000, (125, 148 : 75 x 53) +[IPU1-0] 44.095925 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.496643, Scale=1.000000, (182, 157 : 48 x 38) +[IPU1-0] 44.096291 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.470367, Scale=1.000000, (733, 28 : 31 x 39) +[IPU1-0] 44.097206 s: ALG_OBJECT_DRAW: Tag=0, Type=2, SubType=1, Score=0.446808, Scale=1.000000, (165, 123 : 275 x 119) +[IPU1-0] 44.097541 s: ALG_OBJECT_DRAW: Tag=0, Type=0, SubType=1, Score=0.431274, Scale=1.000000, (356, 124 : 22 x 40) +[IPU1-0] 44.097999 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.431274, Scale=1.000000, (29, 8 : 53 x 54) +[IPU1-0] 44.098334 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (33, 25 : 35 x 34) +[IPU1-0] 44.098700 s: ALG_OBJECT_DRAW: Tag=0, Type=1, SubType=1, Score=0.418427, Scale=1.000000, (35, 4 : 35 x 37) + Thanks, -Shibata + +Responses: +Hi Shibata, Could you please ask customer to try by setting the below create time parameters (quantization) to zero ? createParams.quantHistoryParam1 = 0; createParams.quantHistoryParam2 = 0; createParams.quantMargin = 0; Thanks, Praveen + +Hi Praveen, Based on your suggestion, customer tried below changes: pAlgCreateParams->quantHistoryParam1 (changed from 20 to 0) pAlgCreateParams->quantHistoryParam2 (changed from 5 to 0) pAlgCreateParams->quantMargin (no change: 0) With these changes, the detection result becomes stable. Thanks for your suggestion. Now I have some additional questions on this. (1) If these parameters are set to more than 0, TIDL_OD updates some quantization related parametes on each frame? And the update of the detection result on each frame is due to that? (2) Could you please elaborate how quantHistoryParam is used in TIDL_OD? Thanks, -Shibata + +Hi Shibata, (1) Yes, in this case updation is not required as exactly the same frames in the video. (2) You can refer to section 3.8 in the TIDL user guide. Thanks, Praveen + +Hi Praveen, Sorry for the late reply. Please close this thread as I understand your answers. Best regards, -Shibata + diff --git a/data2/text/range/30001+/883122.txt b/data2/text/range/30001+/883122.txt new file mode 100644 index 0000000000000000000000000000000000000000..56ad427450e90a0d6c20d5c5b4435b5302b75154 --- /dev/null +++ b/data2/text/range/30001+/883122.txt @@ -0,0 +1,519 @@ +Ticket Name: CCS/TMS320C6748: how to load or burn output.bin into nor flash for TMS320C6748 DSP? + +Query Text: +Part Number: TMS320C6748 Tool/software: Code Composer Studio Hai sir, I am using TMS320C6748 DSP with MT28EW512ABA NOR FLASH, Through CCS it's generated output.out(in Release mode) and through AISGen software i am generated output.bin but how to load or burn into nor flash? it's supporting OMPA-L138_FLASH_BOOT_UTILITY(NOR WRITER) FOR MT28EW512ABA or not support? could you give me some suggestions for load or burn the files? Actually through OMPA-L138_FLASH_BOOT_UTILITY(NOR WRITER) i loaded the .bin file and it's showing original data in CCS memory browser, But after poweroff not booting. Thanking you, Regards, Ramachandra + +Responses: +Part Number: TMS320C6748 Tool/software: Code Composer Studio Hai sir, I am using TMS320C6748 processor and MT28EW512ABA NOR FLASH i am able to read device ID and Manufacture ID's and able to write data into nor flash. 1) I am able to write the data into Parallel NOR flash(MT28EW512ABA) using OMAPL-138 FLASH BOOT UTILITY Nor write (Through AMD-Buffer Write Programming). 2) After flashing through Memory Browser in CCS option i am able to check the original bin data. i Have some doubts. 1) Is't works with OMAPL-138 FLASH BOOT UTILITY( NOR Writer) or not because previously i used for(M29W064) Device it's working for fine for same C6748 processor. 2)Actually OMAPL-138 FLASH BOOT UTILITY( NOR Writer) able to write the data because i have checked in Memory Browser in CCS. 3)But not booting any thing extra to add for that particular device (Like boot code). 4)One thing i am observer in the device after flash burning i am able to read the data but after power off it's showing 0XFF. After AMD-SoftRest it's properly showing. 5)But Reset is Happening properly when power on we have probed and through GPIO also we checked(RST pin- GPOutput -- Low some Delay and High we have done). it's properly working. 6)But we have added some manual code below i am attaching the file it's not working only ID's i am getting. Give me some suggestions thanking you sir, Flash.c /* + * flash.c + * + * Created on: Aug 31, 2012 + * Author: Administrator + */ + +#include "Flash.h" +#include "types.h" +#include +#include "c6748_psc.h" +#include "c6748.h" +#include "uart.h" +#include +#include "evmc6748_emif.h" +#include "DAC.h" +#define DWORD uint32_t + +union StatusReg +{ + struct Bits + { + uint32_t DQ0:1; + uint32_t DQ1:1; //Buffered Program Abort bit + uint32_t DQ2:1; + uint32_t DQ3:1; + uint32_t DQ4:1; + uint32_t DQ5:1; + uint32_t DQ6:1; + uint32_t DQ7:1; + }sBits; + uint16_t wStatusReg; +}uStatusReg; + + +void NORFLASH_Reset(uint32_t dwAddress) +{ + src(FLASH_CMD1_ADDR) = 0xF0; // 0x555 << 1 + src(dwAddress) = 0xF0; +} + +void NORFLASH_AutoSelectCommand(void) +{ + volatile uint8_t i; + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + for(i=0;i<5;i++); + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + for(i=0;i<5;i++); + src(FLASH_CMD1_ADDR) = 0x90; // 0x555 << 1 + //for(i=0;i<10;i++); +} + +void NORFLASH_fReadIDs(void) +{ + uint16_t wManufacturerCode,wDeviceCode,wProtBlockStat; + /* + * Manufacturer Code = 0x0089 + * Device Code = 0x227E + * Protect Block Status = 0x0000 + */ + + NORFLASH_AutoSelectCommand(); + + wManufacturerCode = src(0x60000000); + UART_txString(DEBUG_PORT,"\n\r Manufacturer Code :\t"); + Display_Data(wManufacturerCode); + + wDeviceCode = src(0x60000002); + UART_txString(DEBUG_PORT,"\n\r Device code :\t"); + Display_Data(wDeviceCode); + + wProtBlockStat = src(0x60000004); + UART_txString(DEBUG_PORT,"\n\r Protected Block status :\t"); + Display_Data(wProtBlockStat); + + UART_txString(DEBUG_PORT,"\n\r"); + NORFLASH_Reset(FLASH_BASE_ADDR); + +} + + +bool NORFLASH_fPollStatusReg(uint32_t dwAddress) +{ + uint32_t DQ6 = 0; + volatile DWORD dwTimeoutValue,j; + for(j=0;j<100;j++); + + uStatusReg.wStatusReg = src(dwAddress); + DQ6 = uStatusReg.sBits.DQ6; + + //-------------------------------------------------TIME OUT-------------- + dwTimeoutValue = 8000000; + + do + { + uStatusReg.wStatusReg = src(dwAddress); + if (uStatusReg.sBits.DQ6 == DQ6) + { + return true;// Done + } + + DQ6 = uStatusReg.sBits.DQ6; + + dwTimeoutValue--; + if(!dwTimeoutValue) + { + break;// timeout + } + }while(!uStatusReg.sBits.DQ5); // Check for Timeout + + uStatusReg.wStatusReg = src(dwAddress); + DQ6 = uStatusReg.sBits.DQ6; + + uStatusReg.wStatusReg = src(dwAddress); + if(DQ6 == uStatusReg.sBits.DQ6) + return true; // Done + + src(dwAddress) = 0xF0; // Reset Device + return false; // Failed +} + +bool NORFLASH_fEraseBlock() +{ + uint8_t i=0,block_no; + volatile uint8_t j=0; + uint16_t block_num=0; + uint32_t dwAddress=0; + bool fEraseStatus; + volatile DWORD dwTimeoutValue,dwIndex; + UART_txString(DEBUG_PORT,"\n\r Enter block number (4 - 132)\n\r"); + + for(i=0;i<3;i++) + { + UART_rxByte(DEBUG_PORT, &block_no); + block_no = block_no - 0x30; + block_num = (block_num * 10) + block_no; + } + + while(block_num < 4 || block_num > 132) + { + UART_txString(DEBUG_PORT,"\n\r The Block is Out of Range or Protected"); + return false; + } + dwAddress = FLASH_BASE_ADDR +( block_num * FLASH_BLOCK_SIZE); + + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + for(j=0;j<5;j++); + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + for(j=0;j<5;j++); + src(FLASH_CMD1_ADDR) = 0x80; // 0x555 << 1 + for(j=0;j<5;j++); + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + for(j=0;j<5;j++); + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + for(j=0;j<5;j++); + src(dwAddress) = 0x30; + + dwTimeoutValue = 6000000; + do + { + uStatusReg.wStatusReg = src(dwAddress); + + dwTimeoutValue--; + if(!dwTimeoutValue) + { + return false; + } + }while(!uStatusReg.sBits.DQ3); // Wait for Sector Erase Timeout + + fEraseStatus = NORFLASH_fPollStatusReg(dwAddress); + + if(fEraseStatus) + { + for(dwIndex=0; dwIndex<(DWORD)0x2C000; dwIndex++); + return true; + } + else + { + return false; + } +} + + +bool NORFLASH_fEraseChip(void) +{ + bool fEraseStatus; //FLASH_BASE_ADDR--> Flash base address. + DWORD dwTimeoutValue,dwIndex; + + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + src(FLASH_CMD1_ADDR) = 0x80; // 0x555 << 1 + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + src(FLASH_CMD1_ADDR) = 0x10; // 0x555 << 1 + + dwTimeoutValue = 6000000; + do + { + uStatusReg.wStatusReg = src(FLASH_CMD1_ADDR); + + dwTimeoutValue--; + if(!dwTimeoutValue) + { + return false; + } + }while (!uStatusReg.sBits.DQ3); // Wait for Sector Erase Timeout + + fEraseStatus = NORFLASH_fPollStatusReg(src(FLASH_CMD1_ADDR)) ; + + if(fEraseStatus) + { + for(dwIndex=0; dwIndex<(DWORD)0xAD000; dwIndex++); + return true; + } + else + { + return false; + } +} + +//----------------------------------------------------------------------------- +// FUNCTION NAME: Write_Flash +//----------------------------------------------------------------------------- +// DESCRIPTION: +// This function is to write flash +//----------------------------------------------------------------------------- + +bool Write_Flash() +{ + uint8_t data,i,block_no; //ch; + uint16_t block_num=0; + uint32_t dwAddress=0, j=0; + uint16_t WData; + volatile uint8_t k=0; + bool fFlashStaus; + /*do + { + ch=Bank23->IN_DATA; + }while(ch==0);*/ + + UART_txString(DEBUG_PORT,"\n\r Enter block number (4 - 132) "); +// UART_txString(DEBUG_PORT,"\n\r Enter block number (4 - 511) "); + + for(i=0;i<3;i++) + { + UART_rxByte(DEBUG_PORT, &block_no); + block_no = block_no - 0x30; + block_num = (block_num * 10) + block_no; + } + while(block_num < 4 || block_num > 132) +// while(block_num < 4 || block_num > 511) + { + UART_txString(DEBUG_PORT,"\n\r The Block is Out of Range or Protected"); + return false; + } + dwAddress = FLASH_BASE_ADDR +( block_num * FLASH_BLOCK_SIZE); + + UART_txString(DEBUG_PORT,"\n\r Enter the Data To Be Written\n\r"); + for(i=0;i<4;i++) + { + UART_rxByte(DEBUG_PORT, &data); + data = Ascii_Hex(data); + WData=(WData*16)+ data; + } + + for(j=0; j<0x10000; j++) + { + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + for(k=0;k<5;k++); + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + for(k=0;k<5;k++); + src(FLASH_CMD1_ADDR) = 0xA0; // 0x555 << 1 + for(k=0;k<5;k++); + src(dwAddress) =WData; + fFlashStaus = NORFLASH_fPollStatusReg(dwAddress); + if(!fFlashStaus) + return false; //Failure + + dwAddress+=2; + } + return true; +} + +uint32_t Read_Flash() +{ + uint16_t wReadData; + uint8_t i,block_no,bIndex; + uint16_t block_num=0; + uint32_t dwAddress=0, Counter; + /*do + { + ch=Bank23->IN_DATA; + }while(ch==0);*/ + +// UART_txString(DEBUG_PORT,"\n\r Enter block number (4 - 132)\n\r "); + NORFLASH_Reset(FLASH_BASE_ADDR); + UART_txString(DEBUG_PORT,"\n\r Enter block number (0 - 511)\n\r "); + for(i=0;i<3;i++) + { + UART_rxByte(DEBUG_PORT, &block_no); + block_no = block_no - 0x30; + block_num = (block_num * 10) + block_no; + + } +// while(block_num < 4 || block_num > 132) + while(block_num > 511) + { + UART_txString(DEBUG_PORT,"\n\r The Block is Out of Range or Protected"); + return false; + } + dwAddress = FLASH_BASE_ADDR +( block_num * FLASH_BLOCK_SIZE); + + UART_txString(DEBUG_PORT,"\n\r Reading the Data From Flash."); + + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + src(FLASH_CMD1_ADDR) = 0xF0; + for (Counter =0; Counter < 0x200; Counter++) + { +// src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 +// src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 +// src(FLASH_CMD1_ADDR) = 0xF0; // 0x555 << 1 + wReadData = src(dwAddress); + for(bIndex=100; bIndex>(uint32_t)0; bIndex--); + UART_txString(DEBUG_PORT,"0x"); + Display_Data(dwAddress); + UART_txString(DEBUG_PORT,"=0x"); + Display_Data(wReadData); + UART_txString(DEBUG_PORT,"\t"); + dwAddress+=2; + } + return (ERR_NO_ERROR); +} + +void Block_Test() +{ + uint8_t block_no; + uint16_t block_num=0; + bool fFlashStaus= true; + uint16_t data2=0; + uint32_t dwAddress1=0, i; +// UART_txString(DEBUG_PORT,"\n\r Enter Block Number to be Written(4 - 132)"); + UART_txString(DEBUG_PORT,"\n\r Enter Block Number to be Written(4 - 511)"); + for(i=0;i<3;i++) + { + UART_rxByte(DEBUG_PORT, &block_no); + block_no = block_no - 0x30; + block_num = (block_num * 10) + block_no;; + } + +// while(block_num < 4 || block_num > 132) + while(block_num < 4 || block_num > 511) + { + UART_txString(DEBUG_PORT,"\n\r The Block is Out of Range or Protected"); + break; + } + + dwAddress1 = FLASH_BASE_ADDR + (block_num * FLASH_BLOCK_SIZE) ; +// for(i=0 ; i<0x8000 ;i++) + for(i=0 ; i<0x10000 ;i++) + { + if(!(Write_Block(dwAddress1))) + { + fFlashStaus = false; + break; + } + dwAddress1 +=2; + } + if(fFlashStaus) + { + UART_txString(DEBUG_PORT,"\n\r The Block is Written successfully"); + } + else + { + UART_txString(DEBUG_PORT,"\n\r Operation Failed"); + } + data2=Read_block(dwAddress1); + if(data2==0x1234) + { + UART_txString(DEBUG_PORT,"\n\r Flash Block test is Successful"); + } + else + { + UART_txString(DEBUG_PORT,"\n\r Flash Block test is unsuccessful"); + } +} + + +uint32_t Read_block(uint32_t dwAddress) +{ + uint16_t wReadData; + uint32_t i; +// for(i=0x7FFF;i>1;i--) + for(i=0xFFFF;i>1;i--) //0x10000 + { + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + src(FLASH_CMD1_ADDR) = 0xF0; // 0x555 << 1 + wReadData = src(dwAddress); + if(wReadData==0x1234) + { + dwAddress -=2; + } + else + { + UART_txString(DEBUG_PORT,"\n\r Flash Block test is unsuccessful"); + return wReadData; + } + } + return wReadData; +} + + +bool Write_Block(uint32_t addr) +{ + bool fFlashStaus; + uint16_t WData = 0x1234; + src(FLASH_CMD1_ADDR) = 0xAA; // 0x555 << 1 + src(FLASH_CMD2_ADDR) = 0x55; // 0x2AA << 1 + src(FLASH_CMD1_ADDR) = 0xA0; // 0x555 << 1 + src(addr) = WData; + + fFlashStaus = NORFLASH_fPollStatusReg(addr); + + if(!fFlashStaus) + return false; //Failure + else + return true; //Success +} + +void FLASH_Test(void) +{ + bool a=0; + uint8_t data=0; + uint32_t ch; + + while(1) + { + UART_txString(DEBUG_PORT,"\n\r--------------------------"); + UART_txString(DEBUG_PORT,"\n\rPress 1 to Erase Block."); + UART_txString(DEBUG_PORT,"\n\rPress 2 to Write Into FLASH."); + UART_txString(DEBUG_PORT,"\n\rPress 3 to Read From FLASH."); + UART_txString(DEBUG_PORT,"\n\rPress 4 to Read Flash IDs "); + UART_txString(DEBUG_PORT,"\n\r--------------------------\n\r"); + + NORFLASH_Reset(FLASH_BASE_ADDR); + if (!(UART_rxByte(DEBUG_PORT, &data)== 'q')) + { + switch(data) + { + case 0x31: + a = NORFLASH_fEraseBlock(); + if(a==true) + { + UART_txString(DEBUG_PORT,"\n\rBlock Erased Successfully"); + NORFLASH_Reset(0x60040000); + } + else + { + UART_txString(DEBUG_PORT,"\n\r Operation Failed"); + } + break; + case 0x32: + a= Write_Flash(); + if(a==true) + { + UART_txString(DEBUG_PORT,"\n\rWrite Operation Successful"); + } + else + { + UART_txString(DEBUG_PORT,"\n\r Operation Failed"); + } + break; + case 0x33: + a = Read_Flash(); + if(a==0) + { + UART_txString(DEBUG_PORT,"\n\rRead Operation Successful"); + } + else + { + UART_txString(DEBUG_PORT,"\n\r Operation Failed"); + } + break; + case 0x34: + NORFLASH_fReadIDs(); + break; + default : + UART_txString(DEBUG_PORT,"\n\r Invalid Data"); + break; + } + } + else + break; + } +} + + Regards, Ramachandra + +Ramchandra, Given that you are able to see the NOR flash contents in the CCS memory browser, I think the NOR writer is working as expected. Can you indicate if you have connected to the device after the boot fails. If you connect using a JTAG To the DSP and provide the Program counter value, we may be able to provide more insight into the issue from ROM perspective. another way to debug ROM status is to run the Gel file from CCS after connecting to DSP and capture snapshot of the SOC and ROM status: 6886.C674x_debug.gel If possible also share your AIS settings by saving the settings to a file and posting it here. Ensure that the AIS configuration clock or EMIFA setting and EMIFB SDRAM timing settings are not violating any spec in the data sheet timings. Regards Rahul + +hai sir, I have tested the gel file the output also i am attaching sir, C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Device Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F C674X_0: GEL Output: DEV_INFO_01 = 0x00000000 C674X_0: GEL Output: DEV_INFO_02 = 0x00000002 C674X_0: GEL Output: DEV_INFO_03 = 0x00000005 C674X_0: GEL Output: DEV_INFO_04 = 0x00000000 C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0 C674X_0: GEL Output: DEV_INFO_06 = 0x00000080 C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-3834709-6-52-22 C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 5,0,0,10554 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_17 = 0x00030003 C674X_0: GEL Output: DEV_INFO_18 = 0x00000000 C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_20 = 0x30303864 C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B C674X_0: GEL Output: DEV_INFO_22 = 0x00000000 C674X_0: GEL Output: DEV_INFO_23 = 0x00000000 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_24 = 0x06016034 C674X_0: GEL Output: DEV_INFO_25 = 0x003A8355 C674X_0: GEL Output: DEV_INFO_06 = 0x00000080 C674X_0: GEL Output: DEV_INFO_26 = 0x52740005 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | BOOTROM Info | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: ROM ID: d800k008 C674X_0: GEL Output: Silicon Revision 2.1 C674X_0: GEL Output: Boot pins: 2 C674X_0: GEL Output: Boot Mode: NOR C674X_0: GEL Output: ROM Status Code: 0x00000005 Description:C674X_0: GEL Output: Peripheral Open Failed C674X_0: GEL Output: Program Counter (PC) = 0x008022B8 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Clock Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLLs configured to utilize crystal. C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2 C674X_0: GEL Output: C674X_0: GEL Output: NOTE: All clock frequencies in following PLL sections are based C674X_0: GEL Output: off OSCIN = 24 MHz. If that value does not match your hardware C674X_0: GEL Output: you should change the #define in the top of the gel file, save it, C674X_0: GEL Output: and then reload. C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PLL0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz C674X_0: GEL Output: PLL0_SYSCLK3 = 25 MHz C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz C674X_0: GEL Output: PLL0_SYSCLK5 = 100 MHz C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz C674X_0: GEL Output: PLL0_SYSCLK7 = 50 MHz C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PLL1 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLL1_SYSCLK1 = 300 MHz C674X_0: GEL Output: PLL1_SYSCLK2 = 150 MHz C674X_0: GEL Output: PLL1_SYSCLK3 = 100 MHz C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 0: EDMA3CC (0) STATE = 0 C674X_0: GEL Output: Module 1: EDMA3 TC0 STATE = 0 C674X_0: GEL Output: Module 2: EDMA3 TC1 STATE = 0 C674X_0: GEL Output: Module 3: EMIFA (BR7) STATE = 3 C674X_0: GEL Output: Module 4: SPI 0 STATE = 3 C674X_0: GEL Output: Module 5: MMC/SD 0 STATE = 0 C674X_0: GEL Output: Module 6: AINTC STATE = 3 C674X_0: GEL Output: Module 7: ARM RAM/ROM STATE = 3 C674X_0: GEL Output: Module 9: UART 0 STATE = 3 C674X_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8) STATE = 3 C674X_0: GEL Output: Module 11: SCR 1 (BR4) STATE = 3 C674X_0: GEL Output: Module 12: SCR 2 (BR3/5/6) STATE = 3 C674X_0: GEL Output: Module 13: PRUSS STATE = 0 C674X_0: GEL Output: Module 14: ARM STATE = 0 C674X_0: GEL Output: Module 15: DSP STATE = 3 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC1 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 0: EDMA3CC (1) STATE = 0 C674X_0: GEL Output: Module 1: USB0 (2.0) STATE = 0 C674X_0: GEL Output: Module 2: USB1 (1.1) STATE = 0 C674X_0: GEL Output: Module 3: GPIO STATE = 3 C674X_0: GEL Output: Module 4: UHPI STATE = 0 C674X_0: GEL Output: Module 5: EMAC STATE = 0 C674X_0: GEL Output: Module 6: DDR2 and SCR F3 STATE = 0 C674X_0: GEL Output: Module 7: MCASP0 + FIFO STATE = 0 C674X_0: GEL Output: Module 8: SATA STATE = 0 C674X_0: GEL Output: Module 9: VPIF STATE = 0 C674X_0: GEL Output: Module 10: SPI 1 STATE = 3 C674X_0: GEL Output: Module 11: I2C 1 STATE = 0 C674X_0: GEL Output: Module 12: UART 1 STATE = 0 C674X_0: GEL Output: Module 13: UART 2 STATE = 0 C674X_0: GEL Output: Module 14: MCBSP0 + FIFO STATE = 0 C674X_0: GEL Output: Module 15: MCBSP1 + FIFO STATE = 0 C674X_0: GEL Output: Module 16: LCDC STATE = 0 C674X_0: GEL Output: Module 17: eHRPWM (all) STATE = 0 C674X_0: GEL Output: Module 18: MMC/SD 1 STATE = 0 C674X_0: GEL Output: Module 19: UPP STATE = 0 C674X_0: GEL Output: Module 20: eCAP (all) STATE = 0 C674X_0: GEL Output: Module 21: EDMA3 TC2 STATE = 0 C674X_0: GEL Output: Module 24: SCR-F0 Br-F0 STATE = 3 C674X_0: GEL Output: Module 25: SCR-F1 Br-F1 STATE = 3 C674X_0: GEL Output: Module 26: SCR-F2 Br-F2 STATE = 3 C674X_0: GEL Output: Module 27: SCR-F6 Br-F3 STATE = 3 C674X_0: GEL Output: Module 28: SCR-F7 Br-F4 STATE = 3 C674X_0: GEL Output: Module 29: SCR-F8 Br-F5 STATE = 3 C674X_0: GEL Output: Module 30: Br-F7 (DDR Contr) STATE = 3 C674X_0: GEL Output: Module 31: L3 RAM, SCR-F4, Br-F6 STATE = 3 thanking you, Regards, Ramachandra + +Ramachandra, If you look at the ROM status in the debug log, it is clear that there is some issue due to which the ROM is not able to talk to the parallel NOR flash that you are using: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | BOOTROM Info | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: ROM ID: d800k008 C674X_0: GEL Output: Silicon Revision 2.1 C674X_0: GEL Output: Boot pins: 2 C674X_0: GEL Output: Boot Mode: NOR C674X_0: GEL Output: ROM Status Code: 0x00000005 Description:C674X_0: GEL Output: Peripheral Open Failed C674X_0: GEL Output: Program Counter (PC) = 0x008022B8 I am little confused with the Program counter value as this memory location corresponds to DSP L2 RAM so it would indicate that the device did boot and pass control to code in DSP L2. Your PLLs are also configured. Can you check if this address is used in your application. Please make sure that when you run this GEL file that you are connecting to DSP with out using any other GEL file used to configure clocks as that can alter the failed boot state that we need to analyze. Regards, Rahul + +hai sir, Actually i am loading after my code sir without anything on power on time i am loaded gelfile. using Load configuration in ccs of ccxml, below data i am attaching you sir. C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Device Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F C674X_0: GEL Output: DEV_INFO_01 = 0x00000000 C674X_0: GEL Output: DEV_INFO_02 = 0x00000002 C674X_0: GEL Output: DEV_INFO_03 = 0x00000005 C674X_0: GEL Output: DEV_INFO_04 = 0x00000000 C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0 C674X_0: GEL Output: DEV_INFO_06 = 0x00000080 C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-3834709-6-52-22 C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 5,0,0,10554 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_17 = 0x00030003 C674X_0: GEL Output: DEV_INFO_18 = 0x00000000 C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_20 = 0x30303864 C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B C674X_0: GEL Output: DEV_INFO_22 = 0x00000000 C674X_0: GEL Output: DEV_INFO_23 = 0x00000000 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_24 = 0x06016034 C674X_0: GEL Output: DEV_INFO_25 = 0x003A8355 C674X_0: GEL Output: DEV_INFO_06 = 0x00000080 C674X_0: GEL Output: DEV_INFO_26 = 0x52740005 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | BOOTROM Info | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: ROM ID: d800k008 C674X_0: GEL Output: Silicon Revision 2.1 C674X_0: GEL Output: Boot pins: 2 C674X_0: GEL Output: Boot Mode: NOR C674X_0: GEL Output: ROM Status Code: 0x00000005 Description:C674X_0: GEL Output: Peripheral Open Failed C674X_0: GEL Output: Program Counter (PC) = 0x00712148 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Clock Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLLs configured to utilize crystal. C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2 C674X_0: GEL Output: C674X_0: GEL Output: NOTE: All clock frequencies in following PLL sections are based C674X_0: GEL Output: off OSCIN = 25 MHz. If that value does not match your hardware C674X_0: GEL Output: you should change the #define in the top of the gel file, save it, C674X_0: GEL Output: and then reload. C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PLL0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLL0_SYSCLK1 = 25 MHz C674X_0: GEL Output: PLL0_SYSCLK2 = 12 MHz C674X_0: GEL Output: PLL0_SYSCLK3 = 8 MHz C674X_0: GEL Output: PLL0_SYSCLK4 = 6 MHz C674X_0: GEL Output: PLL0_SYSCLK5 = 8 MHz C674X_0: GEL Output: PLL0_SYSCLK6 = 25 MHz C674X_0: GEL Output: PLL0_SYSCLK7 = 4 MHz C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PLL1 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLL1_SYSCLK1 = 25 MHz C674X_0: GEL Output: PLL1_SYSCLK2 = 25 MHz C674X_0: GEL Output: PLL1_SYSCLK3 = 25 MHz C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 0: EDMA3CC (0) STATE = 0 C674X_0: GEL Output: Module 1: EDMA3 TC0 STATE = 0 C674X_0: GEL Output: Module 2: EDMA3 TC1 STATE = 0 C674X_0: GEL Output: Module 3: EMIFA (BR7) STATE = 3 C674X_0: GEL Output: Module 4: SPI 0 STATE = 0 C674X_0: GEL Output: Module 5: MMC/SD 0 STATE = 0 C674X_0: GEL Output: Module 6: AINTC STATE = 3 C674X_0: GEL Output: Module 7: ARM RAM/ROM STATE = 3 C674X_0: GEL Output: Module 9: UART 0 STATE = 0 C674X_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8) STATE = 3 C674X_0: GEL Output: Module 11: SCR 1 (BR4) STATE = 3 C674X_0: GEL Output: Module 12: SCR 2 (BR3/5/6) STATE = 3 C674X_0: GEL Output: Module 13: PRUSS STATE = 0 C674X_0: GEL Output: Module 14: ARM STATE = 0 C674X_0: GEL Output: Module 15: DSP STATE = 3 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC1 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 0: EDMA3CC (1) STATE = 0 C674X_0: GEL Output: Module 1: USB0 (2.0) STATE = 0 C674X_0: GEL Output: Module 2: USB1 (1.1) STATE = 0 C674X_0: GEL Output: Module 3: GPIO STATE = 0 C674X_0: GEL Output: Module 4: UHPI STATE = 0 C674X_0: GEL Output: Module 5: EMAC STATE = 0 C674X_0: GEL Output: Module 6: DDR2 and SCR F3 STATE = 0 C674X_0: GEL Output: Module 7: MCASP0 + FIFO STATE = 0 C674X_0: GEL Output: Module 8: SATA STATE = 0 C674X_0: GEL Output: Module 9: VPIF STATE = 0 C674X_0: GEL Output: Module 10: SPI 1 STATE = 0 C674X_0: GEL Output: Module 11: I2C 1 STATE = 0 C674X_0: GEL Output: Module 12: UART 1 STATE = 0 C674X_0: GEL Output: Module 13: UART 2 STATE = 0 C674X_0: GEL Output: Module 14: MCBSP0 + FIFO STATE = 0 C674X_0: GEL Output: Module 15: MCBSP1 + FIFO STATE = 0 C674X_0: GEL Output: Module 16: LCDC STATE = 0 C674X_0: GEL Output: Module 17: eHRPWM (all) STATE = 0 C674X_0: GEL Output: Module 18: MMC/SD 1 STATE = 0 C674X_0: GEL Output: Module 19: UPP STATE = 0 C674X_0: GEL Output: Module 20: eCAP (all) STATE = 0 C674X_0: GEL Output: Module 21: EDMA3 TC2 STATE = 0 C674X_0: GEL Output: Module 24: SCR-F0 Br-F0 STATE = 3 C674X_0: GEL Output: Module 25: SCR-F1 Br-F1 STATE = 3 C674X_0: GEL Output: Module 26: SCR-F2 Br-F2 STATE = 3 C674X_0: GEL Output: Module 27: SCR-F6 Br-F3 STATE = 3 C674X_0: GEL Output: Module 28: SCR-F7 Br-F4 STATE = 3 C674X_0: GEL Output: Module 29: SCR-F8 Br-F5 STATE = 3 C674X_0: GEL Output: Module 30: Br-F7 (DDR Contr) STATE = 3 C674X_0: GEL Output: Module 31: L3 RAM, SCR-F4, Br-F6 STATE = 3 Thanking you, Regards, Ramachandra + +Hai sir, Just now we checked hardware side we handled rst (TPS65006-MR pin) through through switch , Actually when switch press eight second and release (TPS65006-MR pin) booting from nor flash happening, I am using TMS320C6748EZWTD4(1.3V NOM with 456 MHz) how much time requires for PLL init on poweron. Could you give some suggestions for hardware side, how to boot nor flash from power on time. Thanking you, Regards, Ramachandra + +Ramachandra, It should not be taking this long to do PLL init on the device. Can you please check to confirm that the NOR Is connected to the correct Chip select on the SOC. you can also check the CLKOUT pin on the SOC (PLL Observation clock) to see how long it is taking for the PLLs to stabilize. Does this happen during every power on reset or in the following reset the system boots quickly? Regards, Rahul + +Hai sir, I am using 25MHz oscillator clock and CLKOUT pin is generating 697KHz only that also RAMP signal generating. Below figure CLKOUT i am attaching actually first reset switch time only 8sec then after every 280ms sec press switch it will reset happening data occurring on serial port from NOR flash. giveme some suggestions. Thanking you, Regards, Ramachandra + diff --git a/data2/text/range/30001+/886282.txt b/data2/text/range/30001+/886282.txt new file mode 100644 index 0000000000000000000000000000000000000000..57a1daeedbed9c7aaa39ba402ce957e087c122e7 --- /dev/null +++ b/data2/text/range/30001+/886282.txt @@ -0,0 +1,46 @@ +Ticket Name: TIDEP-01017: TIDEP-01017 Software for Real-Time Demo on TIDEP-01012 + +Query Text: +Part Number: TIDEP-01017 Other Parts Discussed in Thread: TIDEP-01012, AWR2243, AWR1243, TDA2 Dear TIDEP-01017 Team, I would like to develop a real-time demo on the TIDEP-01012. Cesar from this thread Is it possible to "install" the TIDEP-01017 Software on the TIDEP-01012? Recording to Cesar it is the same HW but different SW. I would appreciate your help. Thank you, Jens + +Responses: +Hi, I will check with the team & get back Thanks Gaviraju + +Hi, We have tested only AWR1243 cascade radar board, not AWR2243, with TIDEP-01017. Regards, Stanley + +Hi Stanley, the website regarding TIDEP-01012 was updated. Before the update it was the AWR1243, not AWR2243. So we bought the TIDEP-01012 Version with the AWR1243. Please answer the above asked question in the origin post. If it is possible I would appreciate a hint on how to do it. Compling the Processor SDK that is used for TIDEP-01017 and flashing it onto a SD card didn't work for me. Thanks and best regards, Jens + +Hi Jens, If you have AWR1243 on RF board, you can download Radar SDK at below link and run real-time demo. http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/radar-sdk/latest/index_FDS.html Regards, Stanley + +Hi Stanley, I have problems to build the processor_sdk. But once it is built, do I need to flash it onto the SD card for the RF board? Then boot the radar from the sd card? I would appreciate your help. Thanks and best regards, Jens + +Jens, Please follow the user's guide to build once you download the Radar SDK release. ~/vision_sdk/docs/Radar/ProcessorSDKRadar_UserGuide.pdf You should use "MAKECONFIG= tda2xx_cascade_bios_radar" for cascade radar EVM. After the build, please keep following the user's guide for instructions to run real-time demo. Regards, Stanley + +Dear Stanley, thank you for your help. I was able to build the SDK more precisely I finished step 3.2 5) of ~/vision_sdk/docs/Radar/ProcessorSDKRadar_UserGuide.pdf Can you help me, how to continue? The executables are now in /vision_sdk/binaries/apps/$(MAKECONFIG)/vision_sdk/bin/tda3xx-evm Question 1) What do I have to do with them now? I think I have to continue with 3.7. So I take a look at the referred document, section 3.5. The radar still boots from SD card since factory configuration so I go further to 3.6. I decided to go for 3.6.1. My SD card is F32 formatted with sector size 512 and it has only 1 partition that is marked as active recording to pcdisk. I go to step 3.6.3. The generation of the MLO fails with the following output: ============================================================== C:\Users\jeset>cd C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\build C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\build>gmake -s sbl C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/apps/configs/autorules_footer_cfg.mk:67: ipc_PATH does not exist! () # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_qspi_opp_nom: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_QSPI -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=1 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_qspi_opp_od: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_QSPI -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=2 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_qspi_opp_high: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_QSPI -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=3 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_qspi_opp_low: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_QSPI -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=0 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/qspi/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_sd_opp_nom: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_SD -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=1 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_sd_opp_od: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_SD -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=2 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_sd_opp_high: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_SD -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=3 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_sd_opp_low: sbl_tda2xx_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_SD -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=0 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg sbl_tda2xx_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/sd/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_nor_opp_nom: sbl_tda2xx_nor_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_NOR -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=1 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg sbl_tda2xx_nor_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_nom/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_nor_opp_od: sbl_tda2xx_nor_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_NOR -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=2 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg sbl_tda2xx_nor_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_od/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_nor_opp_high: sbl_tda2xx_nor_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_NOR -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=3 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg sbl_tda2xx_nor_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_high/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg] Error 2 # Compiling tda2xx:a15_0:release:csl_init: a15/src/csl_a15_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DSOC_TDA2XX -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -Ia15/src -Ia15 -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages/ti/csl -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg a15/src/csl_a15_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[6]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/ti/csl/arch/obj/tda2xx/a15/release/csl_a15_init.oa15fg] Error 2 gmake[5]: *** [csl_init] Error 2 gmake[4]: *** [a15_0] Error 2 # Compiling tda2xx-cascade-radar:tda2xx:a15_0:release:sbl_nor_opp_low: sbl_tda2xx_nor_init.asm process_begin: CreateProcess(NULL, C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc -c -x assembler-with-cpp -DMAKEFILE_BUILD -Wimplicit -Wall -Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -D__ARMv7 -Werror -O2 -s -DNDEBUG -DBUILD_A15_0 -DBOOTMODE_NOR -DSBL_CONFIG_DISABLE_SAFETY_FEATURES -DSBL_OPT_LEVEL=0 -DSBL_PROD_BUILD -DTRACE_LEVEL=3 -DTDA2XX_EMIF_MODE=0 -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -DOPP_MODE=0 -DFORCE_OPP_MODE=0 -DSOC_TDA2XX -DBOARD_TYPE_TDA2XX_CASCADE_RADAR -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include -I. -IC:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/drivers/pdk_01_10_04_05/packages -I/apps/apps_nonbam/inc -I/ -I/common -o C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg sbl_tda2xx_nor_init.asm, ...) failed. make (e=2): Das System kann die angegebene Datei nicht finden. gmake[4]: *** [C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/sbl/nor/opp_low/obj/tda2xx-cascade-radar/a15_0/release/sbl_tda2xx_nor_init.oa15fg] Error 2 gmake[3]: *** [all] Error 2 gmake[2]: *** [sbl_all_opps] Error 2 gmake[1]: *** [sbl] Error 2 gmake: *** [sbl] Error 2 C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\build> ======================================================================= I try 3.6.4 and it worked. Question 2) Can you help me with the build of MLO? Some files doesn't exist. Question 3) Let's assume the build of MLO worked. So I have to copy the AppImage (not the AppImage_LE or AppImage_BE) and MLO file, so in total 2 files to my prepared SD Card? What is with the SDK executable (Question 1) Thanks for your help. I appreciate it. Best regards, Jens + +The binary should be under \tda2xx_cascade_bios_radar folder, not \tda3xx-evm. For the build error, do you have linaro gcc compiler installed at C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/? Once the build is completed, you should put MLO and AppImage to SD card and boot the board. Regards, Stanley + +Hi Stanley you are right, the binary is under C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\vision_sdk\bin\tda2xx-evm. The linaro gcc compiler is installed at C:/ti_SDK/PROCESSOR_SDK_RADAR_03_08_00_00/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3/. I downloaded the gcc-arm-none-eabi-4_9-2015q3-20150921-win32.exe from launchpad.net/.../4.9-2015-q3-update. In the following the corresponding folder tree: ============================================================================== C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3> tree Auflistung der Ordnerpfade für Volume System C:. └───4.9 2015q3 ├───arm-none-eabi │ ├───bin │ ├───include │ │ ├───bits │ │ ├───c++ │ │ │ └───4.9.3 │ │ │ ├───arm-none-eabi │ │ │ │ ├───armv6-m │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ ├───armv7-ar │ │ │ │ │ └───thumb │ │ │ │ │ ├───bits │ │ │ │ │ ├───ext │ │ │ │ │ ├───fpu │ │ │ │ │ │ ├───bits │ │ │ │ │ │ └───ext │ │ │ │ │ └───softfp │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ ├───armv7-m │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ ├───armv7e-m │ │ │ │ │ ├───bits │ │ │ │ │ ├───ext │ │ │ │ │ ├───fpu │ │ │ │ │ │ ├───bits │ │ │ │ │ │ └───ext │ │ │ │ │ └───softfp │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ ├───bits │ │ │ │ ├───cortex-m7 │ │ │ │ │ ├───bits │ │ │ │ │ ├───ext │ │ │ │ │ ├───fpu │ │ │ │ │ │ ├───fpv5-d16 │ │ │ │ │ │ │ ├───bits │ │ │ │ │ │ │ └───ext │ │ │ │ │ │ └───fpv5-sp-d16 │ │ │ │ │ │ ├───bits │ │ │ │ │ │ └───ext │ │ │ │ │ └───softfp │ │ │ │ │ ├───fpv5-d16 │ │ │ │ │ │ ├───bits │ │ │ │ │ │ └───ext │ │ │ │ │ └───fpv5-sp-d16 │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ ├───ext │ │ │ │ ├───fpu │ │ │ │ │ ├───bits │ │ │ │ │ └───ext │ │ │ │ └───thumb │ │ │ │ ├───bits │ │ │ │ └───ext │ │ │ ├───backward │ │ │ ├───bits │ │ │ ├───debug │ │ │ ├───decimal │ │ │ ├───experimental │ │ │ ├───ext │ │ │ │ └───pb_ds │ │ │ │ └───detail │ │ │ │ ├───binary_heap_ │ │ │ │ ├───binomial_heap_ │ │ │ │ ├───binomial_heap_base_ │ │ │ │ ├───bin_search_tree_ │ │ │ │ ├───branch_policy │ │ │ │ ├───cc_hash_table_map_ │ │ │ │ ├───eq_fn │ │ │ │ ├───gp_hash_table_map_ │ │ │ │ ├───hash_fn │ │ │ │ ├───left_child_next_sibling_heap_ │ │ │ │ ├───list_update_map_ │ │ │ │ ├───list_update_policy │ │ │ │ ├───ov_tree_map_ │ │ │ │ ├───pairing_heap_ │ │ │ │ ├───pat_trie_ │ │ │ │ ├───rb_tree_map_ │ │ │ │ ├───rc_binomial_heap_ │ │ │ │ ├───resize_policy │ │ │ │ ├───splay_tree_ │ │ │ │ ├───thin_heap_ │ │ │ │ ├───tree_policy │ │ │ │ ├───trie_policy │ │ │ │ └───unordered_iterator │ │ │ ├───parallel │ │ │ ├───profile │ │ │ │ └───impl │ │ │ ├───tr1 │ │ │ └───tr2 │ │ ├───machine │ │ ├───newlib-nano │ │ ├───rpc │ │ └───sys │ ├───lib │ │ ├───armv6-m │ │ │ └───cpu-init │ │ ├───armv7-ar │ │ │ └───thumb │ │ │ ├───cpu-init │ │ │ ├───fpu │ │ │ │ └───cpu-init │ │ │ └───softfp │ │ │ └───cpu-init │ │ ├───armv7-m │ │ │ └───cpu-init │ │ ├───armv7e-m │ │ │ ├───cpu-init │ │ │ ├───fpu │ │ │ │ └───cpu-init │ │ │ └───softfp │ │ │ └───cpu-init │ │ ├───cortex-m7 │ │ │ ├───cpu-init │ │ │ ├───fpu │ │ │ │ ├───fpv5-d16 │ │ │ │ │ └───cpu-init │ │ │ │ └───fpv5-sp-d16 │ │ │ │ └───cpu-init │ │ │ └───softfp │ │ │ ├───fpv5-d16 │ │ │ │ └───cpu-init │ │ │ └───fpv5-sp-d16 │ │ │ └───cpu-init │ │ ├───cpu-init │ │ ├───fpu │ │ │ └───cpu-init │ │ ├───ldscripts │ │ └───thumb │ │ └───cpu-init │ └───share │ └───gdb │ ├───python │ │ └───gdb │ │ ├───command │ │ ├───function │ │ └───printer │ ├───syscalls │ └───system-gdbinit ├───bin ├───lib │ └───gcc │ └───arm-none-eabi │ └───4.9.3 │ ├───armv6-m │ ├───armv7-ar │ │ └───thumb │ │ ├───fpu │ │ └───softfp │ ├───armv7-m │ ├───armv7e-m │ │ ├───fpu │ │ └───softfp │ ├───cortex-m7 │ │ ├───fpu │ │ │ ├───fpv5-d16 │ │ │ └───fpv5-sp-d16 │ │ └───softfp │ │ ├───fpv5-d16 │ │ └───fpv5-sp-d16 │ ├───fpu │ ├───include │ ├───include-fixed │ ├───install-tools │ │ └───include │ └───thumb └───share ├───doc │ └───gcc-arm-none-eabi │ ├───html │ │ ├───annotate │ │ ├───as.html │ │ ├───bfd.html │ │ ├───binutils.html │ │ ├───cpp │ │ ├───cppinternals │ │ ├───gcc │ │ ├───gccinstall │ │ ├───gccint │ │ ├───gdb │ │ ├───gprof.html │ │ ├───ld.html │ │ ├───libc │ │ ├───libm │ │ └───stabs │ └───pdf │ ├───etc │ └───gcc └───gcc-arm-none-eabi └───samples ├───ldscripts ├───src │ ├───cpp │ ├───fpin │ ├───fpout │ ├───minimum │ ├───multiram │ ├───qemu │ ├───retarget │ └───semihost └───startup ============================================================================== Just for understanding. The binaries under C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\vision_sdk\bin\tda2xx-evm. are used during building of MLO and AppImage or why are they needed? Thanks for your help! Best regards, Jens + +Hi Stanley, I'm looking to do the same thing as Jens, except I have the version with the AWR2243 chips on board. Am I out of luck for getting a real time demo with this RF board? + +Hi Jake, There is no Radar SDK release planned for AWR2243. Regards, Stanley + +Jens, It is expected to be like the following. ~\ti_components\cg_tools\windows\gcc-arm-none-eabi-4_9-2015q3\ -> /arm-none-eabi /bin /lib /share + +Hi Stanley, the compile error was solved by shifting the files from the folder "4.9 2015q3" to the parent folder "gcc-arm-none-eabi-4_9-2015q3". In the manual in section 2 "System Requirements" it is described to install the A15 Compiler, Linker into “/ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3” If you chose this folder as the destination in the installer of the program it will create the folder "4.9 2015q3" and install everything into this folder. That's how this error came up. After the build process of MLO from section 3.6.3 in the VisionSDK_UserGuid there exist 4 folders under "vision_sdk\binaries\$(MAKEAPPNAME)\$(MAKECONFIG)\sbl\sd" So after the build process there exist 4 MLO files. Question 1) How do they distinguish from each other and which one should I use? In the following the corresponding file tree: PS C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\sbl\sd> tree C:. ├───opp_high │ ├───obj │ │ └───tda2xx-cascade-radar │ │ └───a15_0 │ │ └───release │ │ ├───.deps │ │ └───configuro │ └───tda2xx-cascade-radar ├───opp_low │ ├───obj │ │ └───tda2xx-cascade-radar │ │ └───a15_0 │ │ └───release │ │ ├───.deps │ │ └───configuro │ └───tda2xx-cascade-radar ├───opp_nom │ ├───obj │ │ └───tda2xx-cascade-radar │ │ └───a15_0 │ │ └───release │ │ ├───.deps │ │ └───configuro │ └───tda2xx-cascade-radar └───opp_od ├───obj │ └───tda2xx-cascade-radar │ └───a15_0 │ └───release │ ├───.deps │ └───configuro └───tda2xx-cascade-radar I randomly decided to take the one from "opp_nom" -> "C:\ti_SDK\PROCESSOR_SDK_RADAR_03_08_00_00\vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\sbl\sd\opp_nom\tda2xx-cascade-radar". So that MLO and the AppImage are now on the SD card. I booted the radar from the SD card and followed the section 3.9.1.6 except of flashing the FPGA from section 2.3.2.2. However, the live observation works partly now! Thanks for your help. Question 2) Could you please shortly explain why flashing the FPGA should be done? Can it somehow influence the "detection quality"? Thank you for your help and best regards, Jens + +Hi Jens, "opp" is operating performances point. TDA2 has 4 different OPPs, low/nominal/over drive/high. Please refer to datasheet chapter 5.5 for the specifications. http://www.ti.com/lit/ds/symlink/tda2hg.pdf It is ok to use the binary under "opp_nom". FPGA is pre-programmed by EVM manufacturer so you don't have to do it. It doesn't affect the quality of the detection. It bridges the data from radar to TDA2 so if it is not working correctly, radar processing won't work at all. To get good quality, the radar board requires calibration. Please refer to mmWave Studio user guide for RF calibration steps. Without proper calibration, the result will not look good. http://software-dl.ti.com/ra-processors/esd/MMWAVE-STUDIO/latest/index_FDS.html Regards, Stanley + +Hi Stanley, I followed the calibration guide of "mmwave_studio_cascade_user_guide.pdf" section 8.3.1 and was able to update the "calibrateResults_high.mat". Question 1) How is this matrix related to the "CC.mat" calibration matrix in section 3.9.1.6.1 (page 34 of 42, under the figure) in "ProcessorSDKRadar_UserGuide.pdf"? Question 2) Is there a way to use the "calibrateResults_high.mat" and transform it to a useable .bin file with the "vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect\create_calib_coefs.m" function, that is mentioned in section 3.9.1.6.1 in "ProcessorSDKRadar_UserGuide.pdf"? Question: 3) I boot the radar and press: 1, a, 1, 1, c, "1 1 1 " The Output of the console tells me "Calibration Complete". Where and how can I find the CC.mat file that is sent out over Ethernet to the Matlab tool? Question 4) Is there a more detailed documentation about the SDK functions and their parameters? Question 5) Does there exist a phyton workaround or any other official workaround, such that a matlab licence is not needed? Question 6) My output without proper calibration is shown below. The range scale in the right top corner is an index? not in m. The other plots don't show any obstacle, whereas I use a corner reflector in ~3m distance and with a RCS of 1.3 - 1.8sqm. So the Range Doppler Plot in the left bottom corner doesn't show the reflector, same with the azimuth-range heatmap in the right bottom corner. Is that an issue of calibration? Thanks for your help, I really appreciate it. Best Regards, Jens + +Jens, I am checking with the team member who has experience with calibration to answer your question. Regards, Stanley + +Hi Jens, To help keep this forum more searchable, please open up a new ticket with this second calibration topic. Thank you, -Randy + +Where is the new ticket located? I am interested in Jens' question #5. Users need to be able to use the board without Matlab or mmWave Studio. Is there an answer to this question? + +Hi Thomas, I did not see a separate ticket from Jens on that topic. But I did post a response on a related question yesterday here: https://e2e.ti.com/support/sensors/f/1023/t/898978 Please open up a new ticket if you need more info. Thank you, -Randy + +Thanks Randy! The linked post is in line with what I am looking for. + diff --git a/data2/text/range/30001+/889968.txt b/data2/text/range/30001+/889968.txt new file mode 100644 index 0000000000000000000000000000000000000000..0d7cfdb1b3305000aa3ca74933bd460c2e6c0973 --- /dev/null +++ b/data2/text/range/30001+/889968.txt @@ -0,0 +1,641 @@ +Ticket Name: TDA2EXEVM: TIDL OD detected results are not consistent at TDA2 & import tool result + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I'm test the consistency for the results on PC and on TDA2. But I got different detected results on two platform. Here is the result got from import tool Here is the result got from TDA2 + OV10635 1. Except the camera FOV, I use the same model to test for the same scenes, why these two result are not the same? 2. Are there any way to make it more consistent ? Thank you, Gary + +Responses: +Hi Gary, Do you have TIOP link enabled in the usecase? If so can disable that and check? Thanks, Praveen + +Hi Praveen, Is there a quick way to directly disable TIOP link ? I regenerated a usecase without using TIOP, but the detected results are the same. Thank you, Gary + +Hi Gary, Sorry for the delay. There is no quick way to directly disable TIOP link. Yes, you need to re-genarate the use case without TIOP. It is expected that PC and TDA2 output should match, not sure what is the issue. Could please share the use case log for this case for review? Also, share the model and prototxt to replicate the issue at our end Thanks, Praveen + +Hi Praveen, Here is the run time log. run_time_log.txt [2020-03-24 09:28:29.738] +[2020-03-24 09:28:29.738] TDA2xx SBL Boot +[2020-03-24 09:28:29.738] +[2020-03-24 09:28:29.739] DPLL Configuration Completed +[2020-03-24 09:28:29.739] +[2020-03-24 09:28:29.739] Clock Domain Configuration Completed +[2020-03-24 09:28:29.739] +[2020-03-24 09:28:29.739] Module Enable Configuration Completed +[2020-03-24 09:28:29.739] +[2020-03-24 09:28:29.739] TI EVM PAD Config Completed +[2020-03-24 09:28:29.739] +[2020-03-24 09:28:29.739] DDR Config Completed +[2020-03-24 09:28:29.739] +[2020-03-24 09:28:29.739] App Image Download Begins +[2020-03-24 09:28:29.755] +[2020-03-24 09:28:29.755] SD Boot - file open completed successfully +[2020-03-24 09:28:30.907] +[2020-03-24 09:28:30.907] MPU CPU0 Image Load Completed +[2020-03-24 09:28:32.539] +[2020-03-24 09:28:32.540] IPU1 CPU0 Image Load Completed +[2020-03-24 09:28:32.875] +[2020-03-24 09:28:32.875] IPU1 CPU1 Image Load Completed +[2020-03-24 09:28:32.970] +[2020-03-24 09:28:32.970] IPU2 CPU0 and CPU1 Image Load Completed +[2020-03-24 09:28:34.073] +[2020-03-24 09:28:34.073] DSP1 Image Load Completed +[2020-03-24 09:28:35.179] +[2020-03-24 09:28:35.179] DSP2 Image Load Completed +[2020-03-24 09:28:35.753] +[2020-03-24 09:28:35.753] EVE1 Image Load Completed +[2020-03-24 09:28:36.314] +[2020-03-24 09:28:36.314] EVE2 Image Load Completed +[2020-03-24 09:28:36.889] +[2020-03-24 09:28:36.889] EVE3 Image Load Completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] EVE4 Image Load Completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] App Image Download Completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] Putting MPU CPU1 in Off mode +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] EVE MMU configuration completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] EVE MMU configuration completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] EVE MMU configuration completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] EVE MMU configuration completed +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] ***************************************************************** +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] SBL Initial Config Cycles - 144073 (12.29 ms) +[2020-03-24 09:28:37.548] SOC Init Cycles - 264187 (22.54 ms) +[2020-03-24 09:28:37.548] DDR Config Clock Cycles - 67401 (5.75 ms) +[2020-03-24 09:28:37.548] App Image Load Cycles - 142203732 (12134.71 ms) +[2020-03-24 09:28:37.548] Slave Core Bootup Cycles - 322966 (27.55 ms) +[2020-03-24 09:28:37.548] SBL Boot-up Cycles - 143003704 (12202.98 ms) +[2020-03-24 09:28:37.548] Time at which SBL started IPU1_0 - 269467 (8223.48 ms) +[2020-03-24 09:28:37.548] ***************************************************************** +[2020-03-24 09:28:37.548] +[2020-03-24 09:28:37.548] Jumping to MPU CPU0 App +[2020-03-24 09:28:39.047] [IPU1-0] 8.224699 s: ***** IPU1_0 Firmware build time 17:15:19 Feb 25 2020 +[2020-03-24 09:28:39.047] [IPU1-0] 8.224913 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:39.047] [IPU1-0] 8.966906 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967120 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967211 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967333 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967425 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967547 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967669 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967760 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.967882 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:39.047] [IPU1-0] 8.969682 s: *** UTILS: CPU MHz = 20 Mhz *** +[2020-03-24 09:28:39.047] [IPU1-0] 8.969865 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.984048 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.984170 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.984231 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.986091 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.986183 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990117 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990239 s: SYSTEM: System Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990331 s: SYSTEM: BSP Common Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990422 s: SYSTEM: BSP Common Init Done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990483 s: SYSTEM: BSP Platform Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990666 s: SYSTEM: BSP Platform Init Done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.990849 s: SYSTEM: FVID2 Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.991032 s: SYSTEM: FVID2 Init Done !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.991093 s: SYSTEM: VPS Init in progress !!! +[2020-03-24 09:28:39.049] [IPU1-0] 8.991185 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[2020-03-24 09:28:39.049] [IPU1-0] 8.995455 s: *** VPDMA Firmware Loading... *** +[2020-03-24 09:28:39.052] [IPU1-0] 8.995577 s: VPDMA Firmware Address = 0x9fc9c4c0 +[2020-03-24 09:28:39.052] [IPU1-0] 8.995668 s: VPDMA Load Address = 0x4897d004 +[2020-03-24 09:28:39.052] [IPU1-0] 8.995760 s: VPDMA Firmware Version = 0x4d0001b8 +[2020-03-24 09:28:39.052] [IPU1-0] 8.995912 s: VPDMA List Busy Status = 0x00000000 +[2020-03-24 09:28:39.052] [IPU1-0] 8.996004 s: *** VPDMA Firmware Load Success *** +[2020-03-24 09:28:39.052] [IPU1-0] 8.996400 s: *** VPDMA Firmware Loading... *** +[2020-03-24 09:28:39.052] [IPU1-0] 8.996522 s: VPDMA Firmware Address = 0x9fc9c4c0 +[2020-03-24 09:28:39.052] [IPU1-0] 8.996614 s: VPDMA Load Address = 0x4899d004 +[2020-03-24 09:28:39.052] [IPU1-0] 8.996705 s: VPDMA Firmware Version = 0x4d0001b8 +[2020-03-24 09:28:39.052] [IPU1-0] 8.996980 s: VPDMA List Busy Status = 0x00000000 +[2020-03-24 09:28:39.052] [IPU1-0] 8.997102 s: *** VPDMA Firmware Load Success *** +[2020-03-24 09:28:39.052] [IPU1-0] 8.997620 s: *** VPDMA Firmware Loading... *** +[2020-03-24 09:28:39.052] [IPU1-0] 8.997742 s: VPDMA Firmware Address = 0x9fc9c4c0 +[2020-03-24 09:28:39.052] [IPU1-0] 8.997895 s: VPDMA Load Address = 0x489bd004 +[2020-03-24 09:28:39.052] [IPU1-0] 8.998017 s: VPDMA Firmware Version = 0x4d0001b8 +[2020-03-24 09:28:39.052] [IPU1-0] 8.998108 s: VPDMA List Busy Status = 0x00000000 +[2020-03-24 09:28:39.053] [IPU1-0] 8.998169 s: *** VPDMA Firmware Load Success *** +[2020-03-24 09:28:39.053] [IPU1-0] 8.998596 s: *** VPDMA Firmware Loading... *** +[2020-03-24 09:28:39.053] [IPU1-0] 8.998688 s: VPDMA Firmware Address = 0x9fc9c4c0 +[2020-03-24 09:28:39.053] [IPU1-0] 8.998840 s: VPDMA Load Address = 0x489dd004 +[2020-03-24 09:28:39.053] [IPU1-0] 8.998932 s: VPDMA Firmware Version = 0x4d0001b8 +[2020-03-24 09:28:39.053] [IPU1-0] 8.999023 s: VPDMA List Busy Status = 0x00000000 +[2020-03-24 09:28:39.053] [IPU1-0] 8.999115 s: *** VPDMA Firmware Load Success *** +[2020-03-24 09:28:39.053] [IPU1-0] 9.063289 s: SYSTEM: VPS Init Done !!! +[2020-03-24 09:28:39.053] [IPU1-0] 9.064295 s: UTILS: DMA: HWI Create for INT34 !!! +[2020-03-24 09:28:39.053] [IPU1-0] 9.064539 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:39.053] [IPU1-0] 9.064631 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252328 B (246 KB) +[2020-03-24 09:28:39.053] [IPU1-0] 9.064875 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[2020-03-24 09:28:39.393] [IPU1-0] 9.065058 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[2020-03-24 09:28:39.393] [IPU1-0] 9.065241 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[2020-03-24 09:28:39.393] [IPU1-0] 9.065424 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:39.393] [IPU1-0] 9.333679 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:39.393] [IPU1-0] 9.426828 s: BOARD: Board Init in progress !!! +[2020-03-24 09:28:39.393] [IPU1-0] 9.427225 s: BOARD: Board Init Done !!! +[2020-03-24 09:28:39.393] [IPU1-0] 9.438601 s: +[2020-03-24 09:28:39.393] [IPU1-0] 9.438693 s: Vision SDK Version : [REL_VISION_SDK_03_07_00_00] +[2020-03-24 09:28:39.393] [IPU1-0] 9.438754 s: FVID2 Version : [FVID_02_01_00_01] +[2020-03-24 09:28:39.393] [IPU1-0] 9.438845 s: BSP Version : [PDK_01_10_03_xx] +[2020-03-24 09:28:39.393] [IPU1-0] 9.438906 s: Platform : [EVM] +[2020-03-24 09:28:39.393] [IPU1-0] 9.438967 s: SOC : [TDA2XX] +[2020-03-24 09:28:39.393] [IPU1-0] 9.439028 s: SOC Revision : [ES1.1] +[2020-03-24 09:28:39.393] [IPU1-0] 9.439089 s: Board Detected : [Vision] +[2020-03-24 09:28:39.395] [IPU1-0] 9.445068 s: EEPROM Base Board Name: [5777xCPU] +[2020-03-24 09:28:39.395] [IPU1-0] 9.445129 s: Base Board Revision : [REV E] +[2020-03-24 09:28:39.395] [IPU1-0] 9.446471 s: Daughter Card Revision: [REV D] +[2020-03-24 09:28:39.395] [IPU1-0] 9.446532 s: +[2020-03-24 09:28:39.395] [IPU1-0] 9.450283 s: SYSTEM: UART: INTERRUPT Mode is Selected +[2020-03-24 09:28:39.395] [IPU1-1] 8.236655 s: ***** IPU1_1 Firmware build time 17:11:51 Feb 25 2020 +[2020-03-24 09:28:39.395] [IPU1-1] 8.236869 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:39.395] [IPU1-1] 8.969316 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.969499 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.969621 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.969773 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.969895 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.970048 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:39.395] [IPU1-1] 8.970170 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:39.397] [IPU1-1] 8.970292 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:39.397] [IPU1-1] 8.970383 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:39.397] [IPU1-1] 8.972579 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.973860 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.973952 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.974043 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.975995 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.976117 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.979869 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.979991 s: SYSTEM: System IPU1_1 Init in progress !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.980906 s: UTILS: DMA: HWI Create for INT25 !!! +[2020-03-24 09:28:39.397] [IPU1-1] 8.981150 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:39.397] [IPU1-1] 8.981241 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645688 B (630 KB) +[2020-03-24 09:28:39.397] [IPU1-1] 8.981424 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:39.398] [IPU1-1] 9.097114 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.100103 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.103580 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.106752 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.110138 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.113707 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.117031 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.120752 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.123955 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[2020-03-24 09:28:39.398] [IPU1-1] 9.127554 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[2020-03-24 09:28:39.718] [IPU1-1] 9.130757 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[2020-03-24 09:28:39.718] [IPU1-1] 9.130909 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:39.718] [IPU1-1] 9.131001 s: SYSTEM: System IPU1_1 Init Done !!! +[2020-03-24 09:28:39.718] [HOST ] 8.304733 s: ***** A15_0 Firmware build time 17:13:53 Feb 25 2020 +[2020-03-24 09:28:39.718] [HOST ] 8.304764 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:39.718] [HOST ] 8.967913 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967913 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967943 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967943 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967943 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967943 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967974 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:39.718] [HOST ] 8.967974 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:39.719] [HOST ] 8.967974 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:39.719] [HOST ] 8.970109 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970139 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970139 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970170 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970170 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970566 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970566 s: SYSTEM: System A15 Init in progress !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970597 s: UTILS: DMA: HWI Create for INT66 !!! +[2020-03-24 09:28:39.719] [HOST ] 8.970627 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:39.719] [HOST ] 8.970627 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6246704 B (6100 KB) +[2020-03-24 09:28:39.719] [HOST ] 8.970658 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:39.719] [HOST ] 8.972640 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[2020-03-24 09:28:39.719] [HOST ] 8.972701 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[2020-03-24 09:28:39.721] [HOST ] 8.972762 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[2020-03-24 09:28:39.721] [HOST ] 8.972823 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[2020-03-24 09:28:39.721] [HOST ] 8.972884 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[2020-03-24 09:28:39.721] [HOST ] 8.972945 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973006 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973067 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973128 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973189 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973250 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[2020-03-24 09:28:39.721] [HOST ] 8.973250 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:39.721] [HOST ] 8.973311 s: SYSTEM: System A15 Init Done !!! +[2020-03-24 09:28:39.721] [HOST ] 9.268285 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[2020-03-24 09:28:39.721] [HOST ] 9.268773 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[2020-03-24 09:28:39.721] [DSP1 ] 8.287439 s: ***** DSP1 Firmware build time 09:29:24 Mar 18 2020 +[2020-03-24 09:28:39.721] [DSP1 ] 8.287500 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:39.721] [DSP1 ] 8.971817 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:39.721] [DSP1 ] 8.971878 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:39.721] [DSP1 ] 8.971908 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.971939 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.971939 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.971969 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.972000 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.972030 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.972061 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.097] [DSP1 ] 8.972213 s: *** UTILS: CPU MHz = 20 Mhz *** +[2020-03-24 09:28:40.097] [DSP1 ] 8.972274 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.972457 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.972518 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.972518 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.972671 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.972701 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.973311 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.097] [DSP1 ] 8.973342 s: SYSTEM: System DSP Init in progress !!! +[2020-03-24 09:28:40.099] [DSP1 ] 8.973525 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.099] [DSP1 ] 8.973555 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[2020-03-24 09:28:40.099] [DSP1 ] 8.973616 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[2020-03-24 09:28:40.099] [DSP1 ] 8.973647 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:40.099] [DSP1 ] 8.981211 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:40.099] [DSP1 ] 8.981272 s: lz4CompDecomp Init +[2020-03-24 09:28:40.099] [DSP1 ] 8.981272 s: SYSTEM: System DSP Init Done !!! +[2020-03-24 09:28:40.099] [DSP1 ] 9.348563 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[2020-03-24 09:28:40.099] [DSP1 ] 9.348593 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[2020-03-24 09:28:40.099] [DSP2 ] 8.287439 s: ***** DSP2 Firmware build time 09:30:06 Mar 18 2020 +[2020-03-24 09:28:40.099] [DSP2 ] 8.287531 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:40.099] [DSP2 ] 8.973128 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973220 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973250 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973281 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973311 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973342 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973342 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973372 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973403 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.101] [DSP2 ] 8.973555 s: *** UTILS: CPU MHz = 20 Mhz *** +[2020-03-24 09:28:40.101] [DSP2 ] 8.973586 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.101] [DSP2 ] 8.973769 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.101] [DSP2 ] 8.973799 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.101] [DSP2 ] 8.973830 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.973952 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.973982 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.974531 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.974592 s: SYSTEM: System DSP Init in progress !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.974806 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.102] [DSP2 ] 8.974836 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[2020-03-24 09:28:40.102] [DSP2 ] 8.974897 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[2020-03-24 09:28:40.102] [DSP2 ] 8.974928 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.982370 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:40.102] [DSP2 ] 8.982401 s: lz4CompDecomp Init +[2020-03-24 09:28:40.102] [DSP2 ] 8.982431 s: SYSTEM: System DSP Init Done !!! +[2020-03-24 09:28:40.102] [DSP2 ] 9.350576 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[2020-03-24 09:28:40.443] [DSP2 ] 9.350606 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[2020-03-24 09:28:40.443] [EVE1 ] 8.956353 s: ***** EVE Firmware build time 17:00:11 Feb 25 2020 +[2020-03-24 09:28:40.443] [EVE1 ] 8.958152 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:40.443] [EVE1 ] 8.977368 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.978954 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.980509 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.981974 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.983407 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.984749 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.986122 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.987464 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:40.443] [EVE1 ] 8.988806 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.446] [EVE1 ] 8.991002 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.446] [EVE1 ] 8.993289 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.446] [EVE1 ] 8.994204 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.446] [EVE1 ] 8.995546 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.446] [EVE1 ] 8.997590 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.446] [EVE1 ] 8.998535 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.446] [EVE1 ] 9.013176 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.446] [EVE1 ] 9.014182 s: SYSTEM: System EVE Init in progress !!! +[2020-03-24 09:28:40.446] [EVE1 ] 9.015768 s: UTILS: DMA: HWI Create for INT8 !!! +[2020-03-24 09:28:40.446] [EVE1 ] 9.017019 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.446] [EVE1 ] 9.018361 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[2020-03-24 09:28:40.446] [EVE1 ] 9.020832 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[2020-03-24 09:28:40.446] [EVE1 ] 9.023058 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:40.449] [EVE1 ] 9.116513 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:40.449] [EVE1 ] 9.117550 s: SYSTEM: System EVE Init Done !!! +[2020-03-24 09:28:40.449] [EVE2 ] 8.951717 s: ***** EVE Firmware build time 17:01:38 Feb 25 2020 +[2020-03-24 09:28:40.449] [EVE2 ] 8.953547 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:40.449] [EVE2 ] 8.979533 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.981089 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.982584 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.983926 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.985298 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.986640 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.987982 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.989355 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:40.449] [EVE2 ] 8.990910 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.450] [EVE2 ] 8.993106 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.450] [EVE2 ] 8.995821 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.450] [EVE2 ] 8.996888 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.450] [EVE2 ] 8.997986 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.450] [EVE2 ] 8.999877 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.450] [EVE2 ] 9.000823 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.450] [EVE2 ] 9.015280 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.450] [EVE2 ] 9.016439 s: SYSTEM: System EVE Init in progress !!! +[2020-03-24 09:28:40.450] [EVE2 ] 9.017964 s: UTILS: DMA: HWI Create for INT8 !!! +[2020-03-24 09:28:40.450] [EVE2 ] 9.019154 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.450] [EVE2 ] 9.020557 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[2020-03-24 09:28:40.450] [EVE2 ] 9.022906 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[2020-03-24 09:28:40.789] [EVE2 ] 9.025224 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:40.789] [EVE2 ] 9.118892 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:40.789] [EVE2 ] 9.119898 s: SYSTEM: System EVE Init Done !!! +[2020-03-24 09:28:40.789] [EVE3 ] 8.953577 s: ***** EVE Firmware build time 17:03:04 Feb 25 2020 +[2020-03-24 09:28:40.789] [EVE3 ] 8.955499 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:40.789] [EVE3 ] 8.981730 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.983194 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.984566 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.985939 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.987281 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.988653 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.990026 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:40.789] [EVE3 ] 8.991612 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:40.792] [EVE3 ] 8.993198 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.792] [EVE3 ] 8.995577 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.792] [EVE3 ] 8.998169 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.792] [EVE3 ] 8.999084 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.000213 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.002257 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.003111 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.017385 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.018391 s: SYSTEM: System EVE Init in progress !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.019978 s: UTILS: DMA: HWI Create for INT8 !!! +[2020-03-24 09:28:40.792] [EVE3 ] 9.021167 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.792] [EVE3 ] 9.022448 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[2020-03-24 09:28:40.792] [EVE3 ] 9.024888 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[2020-03-24 09:28:40.794] [EVE3 ] 9.027542 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:40.794] [EVE3 ] 9.120844 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:40.794] [EVE3 ] 9.121850 s: SYSTEM: System EVE Init Done !!! +[2020-03-24 09:28:40.794] [EVE4 ] 8.958579 s: ***** EVE Firmware build time 17:04:32 Feb 25 2020 +[2020-03-24 09:28:40.794] [EVE4 ] 8.960318 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:40.794] [EVE4 ] 8.981730 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.983194 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.984566 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.985939 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.987281 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.988653 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.990026 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:40.794] [EVE4 ] 8.991520 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:40.795] [EVE4 ] 8.993076 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:40.795] [EVE4 ] 8.995485 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:40.795] [EVE4 ] 8.997986 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:40.795] [EVE4 ] 8.998901 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.000091 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.002043 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.002958 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.017171 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.018208 s: SYSTEM: System EVE Init in progress !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.019764 s: UTILS: DMA: HWI Create for INT8 !!! +[2020-03-24 09:28:40.795] [EVE4 ] 9.020984 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:40.795] [EVE4 ] 9.022265 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[2020-03-24 09:28:40.795] [EVE4 ] 9.024675 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[2020-03-24 09:28:41.137] [EVE4 ] 9.027176 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:41.137] [EVE4 ] 9.120600 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:41.137] [EVE4 ] 9.121606 s: SYSTEM: System EVE Init Done !!! +[2020-03-24 09:28:41.137] [IPU2 ] 8.222503 s: ***** IPU2 Firmware build time 17:17:39 Feb 25 2020 +[2020-03-24 09:28:41.137] [IPU2 ] 8.222686 s: *** SYSTEM: CPU Frequency , +[2020-03-24 09:28:41.137] [IPU2 ] 8.970536 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.970719 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.970841 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.970963 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.971085 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.971237 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[2020-03-24 09:28:41.137] [IPU2 ] 8.971359 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[2020-03-24 09:28:41.139] [IPU2 ] 8.971481 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[2020-03-24 09:28:41.139] [IPU2 ] 8.971603 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[2020-03-24 09:28:41.139] [IPU2 ] 8.974470 s: SYSTEM: System Common Init in progress !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.975904 s: UTILS: CIO: Init Done !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.976026 s: SYSTEM: IPC init in progress !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.976117 s: SYSTEM: Notify init done !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.978039 s: SYSTEM: MsgQ init done !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.978161 s: SYSTEM: IPC init DONE !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.983377 s: SYSTEM: System Common Init Done !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.983499 s: SYSTEM: System IPU2 Init in progress !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.984353 s: UTILS: DMA: HWI Create for INT25 !!! +[2020-03-24 09:28:41.139] [IPU2 ] 8.984597 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[2020-03-24 09:28:41.139] [IPU2 ] 8.984719 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252424 B (246 KB) +[2020-03-24 09:28:41.140] [IPU2 ] 8.984932 s: SYSTEM: Initializing Links !!! +[2020-03-24 09:28:41.140] [IPU2 ] 9.095345 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.098212 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.101140 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.104190 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.107332 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.110351 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.113402 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.116574 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.119563 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.122613 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[2020-03-24 09:28:41.140] [IPU2 ] 9.125602 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[2020-03-24 09:28:41.142] [IPU2 ] 9.125754 s: SYSTEM: Initializing Links ... DONE !!! +[2020-03-24 09:28:41.142] [IPU2 ] 9.125876 s: SYSTEM: System IPU2 Init Done !!! +[2020-03-24 09:28:41.142] [IPU1-0] 10.484536 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines +[2020-03-24 09:28:41.142] [IPU1-0] 10.488928 s: QSPI Init Started +[2020-03-24 09:28:41.142] [IPU1-0] 10.489233 s: MID - 1 +[2020-03-24 09:28:41.142] [IPU1-0] 10.489263 s: DID - 18 +[2020-03-24 09:28:41.142] [IPU1-0] 10.489324 s: QSPI Init Completed Sucessfully +[2020-03-24 09:28:41.142] [IPU1-0] 10.502104 s: +[2020-03-24 09:28:41.142] [IPU1-0] 10.502165 s: Current System Settings, +[2020-03-24 09:28:41.142] [IPU1-0] 10.502226 s: ======================== +[2020-03-24 09:28:41.142] [IPU1-0] 10.502287 s: Display Type : HDMI 1920x1080 @ 60fps +[2020-03-24 09:28:41.142] [IPU1-0] 10.502348 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[2020-03-24 09:28:41.142] [IPU1-0] 10.502440 s: My IP address for interface 1 : 0.0.0.0 +[2020-03-24 09:28:41.142] [IPU1-0] 10.502501 s: My IP address for interface 2 : 0.0.0.0 +[2020-03-24 09:28:41.142] [IPU1-0] 10.502562 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[2020-03-24 09:28:41.221] [IPU1-0] 10.502623 s: +[2020-03-24 09:28:41.221] [IPU1-0] 10.502684 s: ============ +[2020-03-24 09:28:41.221] [IPU1-0] 10.502714 s: Usecase Menu +[2020-03-24 09:28:41.221] [IPU1-0] 10.502745 s: ============ +[2020-03-24 09:28:41.221] [IPU1-0] 10.502806 s: +[2020-03-24 09:28:41.221] [IPU1-0] +[2020-03-24 09:28:41.221] [IPU1-0] Vision SDK Usecases, +[2020-03-24 09:28:41.221] [IPU1-0] -------------------- +[2020-03-24 09:28:41.221] [IPU1-0] 1: Single Camera Usecases +[2020-03-24 09:28:41.221] [IPU1-0] 2: Multi-Camera LVDS Usecases +[2020-03-24 09:28:41.221] [IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[2020-03-24 09:28:41.221] [IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[2020-03-24 09:28:41.221] [IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[2020-03-24 09:28:41.221] [IPU1-0] 6: TDA2x Stereo Usecases +[2020-03-24 09:28:41.221] [IPU1-0] 7: Network RX/TX Usecases +[2020-03-24 09:28:41.221] [IPU1-0] 9: RADAR Usecases +[2020-03-24 09:28:41.221] [IPU1-0] a: Miscellaneous test's +[2020-03-24 09:28:41.221] [IPU1-0] f: TIDL Usecase +[2020-03-24 09:28:41.221] [IPU1-0] g: Camera Radar Combo Usecases +[2020-03-24 09:28:41.221] [IPU1-0] +[2020-03-24 09:28:41.221] [IPU1-0] s: System Settings +[2020-03-24 09:28:41.221] [IPU1-0] +[2020-03-24 09:28:41.221] [IPU1-0] x: Exit +[2020-03-24 09:28:41.221] [IPU1-0] +[2020-03-24 09:28:41.221] [IPU1-0] Enter Choice: +[2020-03-24 09:28:41.221] [IPU1-0] +[2020-03-24 09:28:43.258] [HOST ] 13.973159 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[2020-03-24 09:28:43.258] [HOST ] 13.973189 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[2020-03-24 09:28:50.042] [IPU1-0] 20.743122 s: +[2020-03-24 09:28:50.042] [IPU1-0] 20.743274 s: +[2020-03-24 09:28:50.042] [IPU1-0] +[2020-03-24 09:28:50.042] [IPU1-0] TIDL Usecases +[2020-03-24 09:28:50.042] [IPU1-0] --------------- +[2020-03-24 09:28:50.042] [IPU1-0] 1: TIDL File I/O Usecase +[2020-03-24 09:28:50.042] [IPU1-0] 2: Semantic Segmentation Usecase +[2020-03-24 09:28:50.042] [IPU1-0] 3: TIDL OD Usecase +[2020-03-24 09:28:50.042] [IPU1-0] +[2020-03-24 09:28:50.042] [IPU1-0] x: Exit +[2020-03-24 09:28:50.042] [IPU1-0] +[2020-03-24 09:28:50.042] [IPU1-0] Enter Choice: +[2020-03-24 09:28:50.042] [IPU1-0] +[2020-03-24 09:28:51.658] [IPU1-0] 22.392210 s: +[2020-03-24 09:28:51.777] [IPU1-0] 22.422588 s: TIDL Configuration parameters +[2020-03-24 09:28:51.777] [IPU1-0] 22.422680 s: ----------------------------- +[2020-03-24 09:28:51.777] [IPU1-0] 22.422710 s: inputWidth = 1280 +[2020-03-24 09:28:51.777] [IPU1-0] 22.422771 s: inputHeight = 720 +[2020-03-24 09:28:51.777] [IPU1-0] 22.422832 s: inputFile = inData_OD +[2020-03-24 09:28:51.777] [IPU1-0] 22.422893 s: inputFile = inHeader_OD +[2020-03-24 09:28:51.777] [IPU1-0] 22.422954 s: netFileName = tidl_net_1280x720_cfT3_top20.bin +[2020-03-24 09:28:51.777] [IPU1-0] 22.423046 s: paramFileName = tidl_param_1280x720_cfT3_top20.bin +[2020-03-24 09:28:51.777] [IPU1-0] 22.423107 s: inputfps = 30 +[2020-03-24 09:28:51.777] [IPU1-0] 22.423198 s: threshold = 0.000000 +[2020-03-24 09:28:51.777] [IPU1-0] 22.423290 s: ----------------------------- +[2020-03-24 09:28:51.777] [IPU1-0] 22.423351 s: +[2020-03-24 09:28:51.777] [IPU1-0] 22.423473 s: #### EVE CLK = 650.0 Mhz +[2020-03-24 09:28:51.777] [IPU1-0] 22.423595 s: #### DSP CLK = 748.0 Mhz +[2020-03-24 09:28:51.777] [IPU1-0] 22.423717 s: #### IPU CLK = 212.800000 Mhz +[2020-03-24 09:28:51.777] [IPU1-0] 22.423839 s: #### A15 CLK = 1176.0 Mhz +[2020-03-24 09:28:51.777] [IPU1-0] 22.423900 s: +[2020-03-24 09:28:53.840] [IPU1-0] 24.306777 s: CAPTURE: Create in progress !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.307021 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.407521 s: CAPTURE: Create Done !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.407857 s: VPE: Create in progress !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.589458 s: VPE: Loading Down-scaling Co-effs +[2020-03-24 09:28:53.965] [IPU1-0] 24.589672 s: VPE: Co-effs Loading ... DONE !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.589885 s: VPE: Create Done !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.590953 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:28:53.965] [IPU1-0] 24.591349 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:28:53.965] [HOST ] 24.591532 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:28:53.965] [HOST ] 24.591807 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:28:53.965] [HOST ] 24.591959 s: ALGORITHM: Create in progress (algId = 12) !!! +[2020-03-24 09:28:53.965] [HOST ] 24.608704 s: UTILS: DMA: Allocated CH (TCC) = 0 (0) +[2020-03-24 09:28:53.965] [HOST ] 24.608735 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 0 (0x43305600) +[2020-03-24 09:28:53.965] [HOST ] 24.608735 s: ALGORITHM: Create Done (algId = 12) !!! +[2020-03-24 09:28:53.965] [HOST ] 24.608826 s: IPC_OUT_3 : Create in progress !!! +[2020-03-24 09:28:53.966] [HOST ] 24.608857 s: IPC_OUT_3 : Create Done !!! +[2020-03-24 09:28:53.966] [EVE4 ] 24.609131 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:28:53.966] [EVE4 ] 24.609955 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:28:53.966] [EVE4 ] 24.610717 s: ALGORITHM: Create in progress (algId = 14) !!! +[2020-03-24 09:28:55.609] [HOST ] 26.284664 s: IPC_OUT_2 : Create in progress !!! +[2020-03-24 09:28:55.609] [HOST ] 26.284694 s: IPC_OUT_2 : Create Done !!! +[2020-03-24 09:28:55.609] [DSP1 ] 26.283993 s: IPC_IN_3 : Create in progress !!! +[2020-03-24 09:28:55.609] [DSP1 ] 26.284542 s: IPC_IN_3 : Create Done !!! +[2020-03-24 09:28:55.609] [EVE3 ] 26.284969 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:28:55.609] [EVE3 ] 26.285823 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:28:55.609] [EVE3 ] 26.286677 s: ALGORITHM: Create in progress (algId = 14) !!! +[2020-03-24 09:28:55.609] [EVE4 ] 26.282559 s: ALGORITHM: Create Done (algId = 14) !!! +[2020-03-24 09:28:55.609] [EVE4 ] 26.283169 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:28:55.609] [EVE4 ] 26.283596 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:28:57.279] [EVE3 ] 27.960257 s: ALGORITHM: Create Done (algId = 14) !!! +[2020-03-24 09:28:57.279] [EVE3 ] 27.960867 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:28:57.279] [EVE3 ] 27.961294 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:28:57.279] [HOST ] 27.962361 s: IPC_OUT_1 : Create in progress !!! +[2020-03-24 09:28:57.279] [HOST ] 27.962392 s: IPC_OUT_1 : Create Done !!! +[2020-03-24 09:28:57.279] [DSP1 ] 27.961690 s: IPC_IN_2 : Create in progress !!! +[2020-03-24 09:28:57.279] [DSP1 ] 27.962239 s: IPC_IN_2 : Create Done !!! +[2020-03-24 09:28:57.279] [EVE2 ] 27.962666 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:28:57.279] [EVE2 ] 27.963551 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:28:57.279] [EVE2 ] 27.964100 s: ALGORITHM: Create in progress (algId = 14) !!! +[2020-03-24 09:28:58.968] [HOST ] 29.649881 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:28:58.968] [HOST ] 29.649911 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:28:58.968] [DSP1 ] 29.649179 s: IPC_IN_1 : Create in progress !!! +[2020-03-24 09:28:58.968] [DSP1 ] 29.649728 s: IPC_IN_1 : Create Done !!! +[2020-03-24 09:28:58.968] [EVE1 ] 29.650155 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:28:58.968] [EVE1 ] 29.651009 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:28:58.968] [EVE1 ] 29.651772 s: ALGORITHM: Create in progress (algId = 14) !!! +[2020-03-24 09:28:58.968] [EVE2 ] 29.647745 s: ALGORITHM: Create Done (algId = 14) !!! +[2020-03-24 09:28:58.968] [EVE2 ] 29.648356 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:28:58.968] [EVE2 ] 29.648783 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:29:00.610] [DSP1 ] 31.335356 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:29:00.610] [DSP1 ] 31.335783 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:29:00.684] [DSP1 ] 31.336149 s: ALGORITHM: Create in progress (algId = 36) !!! +[2020-03-24 09:29:01.441] [DSP1 ] 31.346794 s: ALGORITHM: Create Done (algId = 36) !!! +[2020-03-24 09:29:01.441] [DSP1 ] 31.346946 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:29:01.441] [DSP1 ] 31.347007 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:29:01.441] [DSP1 ] 31.848624 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.441] [DSP1 ] 31.848654 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 65600 B (64 KB) +[2020-03-24 09:29:01.441] [DSP1 ] 31.848715 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 497720 B (486 KB) +[2020-03-24 09:29:01.441] [DSP2 ] 31.848959 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.441] [DSP2 ] 31.848990 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[2020-03-24 09:29:01.441] [DSP2 ] 31.849020 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) +[2020-03-24 09:29:01.441] [EVE1 ] 31.333740 s: ALGORITHM: Create Done (algId = 14) !!! +[2020-03-24 09:29:01.441] [EVE1 ] 31.334502 s: IPC_OUT_0 : Create in progress !!! +[2020-03-24 09:29:01.444] [EVE1 ] 31.334929 s: IPC_OUT_0 : Create Done !!! +[2020-03-24 09:29:01.444] [EVE1 ] 31.849905 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.444] [EVE1 ] 31.850149 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-03-24 09:29:01.444] [EVE1 ] 31.850637 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[2020-03-24 09:29:01.444] [EVE2 ] 31.852040 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.444] [EVE2 ] 31.852315 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-03-24 09:29:01.444] [EVE2 ] 31.852803 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[2020-03-24 09:29:01.444] [EVE3 ] 31.854023 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.444] [EVE3 ] 31.854267 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-03-24 09:29:01.448] [EVE3 ] 31.854755 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[2020-03-24 09:29:01.448] [EVE4 ] 31.856249 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.448] [EVE4 ] 31.856524 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[2020-03-24 09:29:01.448] [EVE4 ] 31.857012 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 235672 B (230 KB) +[2020-03-24 09:29:01.448] [IPU2 ] 31.857988 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.448] [IPU2 ] 31.858110 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) +[2020-03-24 09:29:01.448] [IPU1-0] 31.347099 s: IPC_IN_0 : Create in progress !!! +[2020-03-24 09:29:01.448] [IPU1-0] 31.348136 s: IPC_IN_0 : Create Done !!! +[2020-03-24 09:29:01.448] [IPU1-0] 31.349203 s: ALGORITHM: Create in progress (algId = 1) !!! +[2020-03-24 09:29:01.448] [IPU1-0] 31.350484 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) +[2020-03-24 09:29:01.448] [IPU1-0] 31.350606 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) +[2020-03-24 09:29:01.450] [IPU1-0] 31.413347 s: ALGORITHM: Create Done (algId = 1) !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.413591 s: DISPLAY: Create in progress !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.414140 s: DISPLAY: Create Done !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.414719 s: GRPXSRC: Create in progress !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.845330 s: GRPXSRC: Create Done !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.845757 s: DISPLAY: Create in progress !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.846275 s: DISPLAY: Create Done !!! +[2020-03-24 09:29:01.450] [IPU1-0] 31.846550 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 +[2020-03-24 09:29:01.450] [IPU1-0] 31.846672 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 243176 B (237 KB) +[2020-03-24 09:29:01.450] [IPU1-0] 31.846855 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[2020-03-24 09:29:01.450] [IPU1-0] 31.846977 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 66025984 B (62 MB) +[2020-03-24 09:29:01.596] [IPU1-0] 31.847160 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[2020-03-24 09:29:01.596] [IPU1-0] 31.858354 s: CHAINS: Sensor create in progress +[2020-03-24 09:29:01.596] [IPU1-0] 31.858994 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 +[2020-03-24 09:29:01.596] [IPU1-0] 31.861953 s: *** UTILS: CPU KHz = 20000 Khz *** +[2020-03-24 09:29:01.596] [IPU1-0] 31.950558 s: VIDEO_SENSOR: VIP 0: DRV ID 1203 (I2C ADDR 0x30): a635:0000:7fa2 +[2020-03-24 09:29:01.596] [IPU1-0] 31.950863 s: CHAINS: Sensor create ... DONE !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.950954 s: DISPLAY: Start in progress !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.951015 s: DISPLAY: Start Done !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.951717 s: DISPLAY: Start in progress !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.951808 s: DISPLAY: Start Done !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.957329 s: CAPTURE: Start in progress !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.959708 s: CAPTURE: Start Done !!! +[2020-03-24 09:29:01.596] [IPU1-0] 31.962209 s: +[2020-03-24 09:29:01.596] [IPU1-0] +[2020-03-24 09:29:01.596] [IPU1-0] ==================== +[2020-03-24 09:29:01.596] [IPU1-0] Chains Run-time Menu +[2020-03-24 09:29:01.596] [IPU1-0] ==================== +[2020-03-24 09:29:01.596] [IPU1-0] +[2020-03-24 09:29:01.596] [IPU1-0] 0: Stop Chain +[2020-03-24 09:29:01.599] [IPU1-0] +[2020-03-24 09:29:01.599] [IPU1-0] 1: Pause Chain +[2020-03-24 09:29:01.599] [IPU1-0] 2: Resume Chain +[2020-03-24 09:29:01.599] [IPU1-0] +[2020-03-24 09:29:01.599] [IPU1-0] p: Print Statistics +[2020-03-24 09:29:01.599] [IPU1-0] +[2020-03-24 09:29:01.599] [IPU1-0] Enter Choice: +[2020-03-24 09:29:01.599] [IPU1-0] +[2020-03-24 09:29:01.599] [IPU1-1] 31.847861 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.599] [IPU1-1] 31.848014 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643368 B (628 KB) +[2020-03-24 09:29:01.599] [HOST ] 31.848410 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[2020-03-24 09:29:01.599] [HOST ] 31.848410 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6234656 B (6088 KB) About the model and prototxt, we have some private issues. Therefore, is there any private way to send the data to you? Or , can I send you through James? Thank you, Gary + +Hi Gary, Yes, you can send through James. Thanks, Praveen + +Hi Praveen, Is there any update? Thank you, Gary + +Hi Gary, Could you please share the input (IMG-4977_1280x720.jpg) used at your end? sampleInData = "D:\Works_on\DL_caffe_jacinto\model_convert\IMG-4977_1280x720.jpg Thanks, Praveen + +Hi Praveen, Here is the testing image. Thank you, Gary + +Hi Gary, Thanks for sharing the input file, I tried your model on the standalone setup to replicate the issue but on the standalone setup the output looks okay. So, I need to work with VSDK experts to replicate the issue in the usecase. Meanwhile can you try this below change and check if it helps ? Could you please set all the quant history parameters to "0" and let us know the results. pAlgCreateParams->quantHistoryParam1 = 0 (changed from 20 to 0) pAlgCreateParams->quantHistoryParam2 = 0 (changed from 5 to 0) pAlgCreateParams->quantMargin = 0 (no change: 0) Thanks, Praveen + +Hi Praveen, I tested with changing parameters as you mentioned above, the problem still remained. Thank you, Gary + +Hi Praveen, Does there any update? Thank you, Gary + +Hi Gary, Could you please use display threshold as 0.3 in the TIDL OD use case config file and check [2020-03-24 09:28:51.777] [IPU1-0] 22.422588 s: TIDL Configuration parameters [2020-03-24 09:28:51.777] [IPU1-0] 22.422680 s: ----------------------------- [2020-03-24 09:28:51.777] [IPU1-0] 22.422710 s: inputWidth = 1280 [2020-03-24 09:28:51.777] [IPU1-0] 22.422771 s: inputHeight = 720 [2020-03-24 09:28:51.777] [IPU1-0] 22.422832 s: inputFile = inData_OD [2020-03-24 09:28:51.777] [IPU1-0] 22.422893 s: inputFile = inHeader_OD [2020-03-24 09:28:51.777] [IPU1-0] 22.422954 s: netFileName = tidl_net_1280x720_cfT3_top20.bin [2020-03-24 09:28:51.777] [IPU1-0] 22.423046 s: paramFileName = tidl_param_1280x720_cfT3_top20.bin [2020-03-24 09:28:51.777] [IPU1-0] 22.423107 s: inputfps = 30 [2020-03-24 09:28:51.777] [IPU1-0] 22.423198 s: threshold = 0.000000 -----> 0.3 [2020-03-24 09:28:51.777] [IPU1-0] 22.423290 s: ----------------------------- Thanks, Praveen + +Hi Praveen, Sorry for the late reply. I have tried change threshold to 0.3. The result still looked the same for me. So, at your side, can you get the same result both on TDA2 and on PC (the evaluating result of import tools)? Thank you, Gary + +Hi Gary, I tried on the PC and getting the correct result, and I am working with VSDK team to replicate the issue on the TDA2 board, but looks like it will take some time to run this on the Board as they don't have access to board because of lock down. We will get back to you as soon as we could run this on the TDA2 board. Meanwhile, could you please get the confidence score for all the detection's in the system to cross check with PC output? Thanks, Praveen + diff --git a/data2/text/range/30001+/891436.txt b/data2/text/range/30001+/891436.txt new file mode 100644 index 0000000000000000000000000000000000000000..2667e6c8025852b2ec4abc4c4bd34f1203bda4b3 --- /dev/null +++ b/data2/text/range/30001+/891436.txt @@ -0,0 +1,723 @@ +Ticket Name: AM5728: EDMA3 driver stand-alone example application build error + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2 I am trying to build the EDMA3 LLD example projects to run on the AM5728 DSP core, but am getting gmake errors. I have followed the steps in the user guide, modifying the specified variables in makerules\env.mk and then running from a cmd prompt: c:\ti\edma3_lld_2_12_05_30E\packages>set ROOTDIR=c:/ti/edma3_lld_2_12_05_30E c:\ti\edma3_lld_2_12_05_30E\packages>set PATH=C:/ti/xdctools_3_55_02_22_core c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=am572x-emv FORMAT=ELF c:/ti/edma3_lld_2_12_05_30E/makerules/env.mk:56: /oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/git/packages/component.mk: No such file or directory gmake: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/git/packages/component.mk'. Stop. + +Responses: +I've made some progress by correcting some additional paths in env.mk and using the PLATFORM from the example in the user guide. The output is now much longer, but still has several errors and doesn't seem to create any binaries. c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=tda2xx-evm FORMAT=ELF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_674_example PLATFORM=tda2xx-evm TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_m3_example PLATFORM=tda2xx-evm TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_a8_example PLATFORM=tda2xx-evm TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_64p_example PLATFORM=tda2xx-evm TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_66_example PLATFORM=tda2xx-evm TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_m4_example PLATFORM=tda2xx-evm TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_a15_example PLATFORM=tda2xx-evm TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_tda2xx-evm_eve_example PLATFORM=tda2xx-evm TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_tda2xx-evm_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_tda2xx-evm_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_tda2xx-evm_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_tda2xx-evm_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_66_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx xdc_configuro PLATFORM=tda2xx-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_66_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx PLATFORM=tda2xx-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_66_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx xdc_configuro PLATFORM=tda2xx-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_66_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx PLATFORM=tda2xx-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_tda2xx-evm_66_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +Access is denied. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:222: xdc_configuro] Error 5 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +\# Making example edma3_drv_tda2xx-evm_66_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +# Making tda2xx-evm:c6xdsp:debug:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/cgt-c6x/include/stdint.h', needed by 'obj/66/debug/edma3_drv_init.oe66'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_66_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +Access is denied. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:222: xdc_configuro] Error 5 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +\# Making example edma3_drv_tda2xx-evm_66_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +# Making tda2xx-evm:c6xdsp:release:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/cgt-c6x/include/stdint.h', needed by 'obj/66/release/edma3_drv_init.oe66'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 xdc_configuro PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF "IPUCORE=1"& echo \# Making example edma3_drv_tda2xx-evm_m4_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF "IPUCORE=1"& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 xdc_configuro PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF "IPUCORE=0"& echo \# Making example edma3_drv_tda2xx-evm_m4_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF "IPUCORE=0"& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 xdc_configuro PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=release FORMAT=ELF "IPUCORE=1"& echo \# Making example edma3_drv_tda2xx-evm_m4_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=release FORMAT=ELF "IPUCORE=1"& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 xdc_configuro PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=release FORMAT=ELF "IPUCORE=0"& echo \# Making example edma3_drv_tda2xx-evm_m4_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4 PLATFORM=tda2xx-evm CORE=m4 PROFILE_m4=release FORMAT=ELF "IPUCORE=0"& +\# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +maketemp_configuro_cmd_m4.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core1_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_1 -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core1_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_m4_c1_st_sample_pem4.xdl obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core1_sample_configuro/linker_mod.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Making example edma3_drv_tda2xx-evm_m4_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Making tda2xx-evm:m4:debug:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/ti-cgt-arm/include/stdint.h', needed by 'obj/m4/debug/edma3_drv_init.oem4'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +maketemp_configuro_cmd_m4.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core0_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_m4_c0_st_sample_pem4.xdl obj/tda2xx-evm/m4/debug/edma3_drv_arm_tda2xx_core0_sample_configuro/linker_mod.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Making example edma3_drv_tda2xx-evm_m4_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Making tda2xx-evm:m4:debug:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/ti-cgt-arm/include/stdint.h', needed by 'obj/m4/debug/edma3_drv_init.oem4'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +maketemp_configuro_cmd_m4.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core1_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_1 -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core1_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_m4_c1_st_sample_pem4.xdl obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core1_sample_configuro/linker_mod.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Making example edma3_drv_tda2xx-evm_m4_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Making tda2xx-evm:m4:release:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/ti-cgt-arm/include/stdint.h', needed by 'obj/m4/release/edma3_drv_init.oem4'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_m4_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +maketemp_configuro_cmd_m4.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core0_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_m4_c0_st_sample_pem4.xdl obj/tda2xx-evm/m4/release/edma3_drv_arm_tda2xx_core0_sample_configuro/linker_mod.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +\# Making example edma3_drv_tda2xx-evm_m4_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +# Making tda2xx-evm:m4:release:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: *** No rule to make target '/oe/bld/build-CORTEX_1/arago-tmp-external-arm-toolchain/work/am57xx_evm-linux-gnueabi/edma3-lld-rtos/2.12.05.30E-r1.1.tisdk-int12/recipe-sysroot-native/usr/share/ti/ti-cgt-arm/include/stdint.h', needed by 'obj/m4/release/edma3_drv_init.oem4'. Stop. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_M4' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_a15_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15 xdc_configuro PLATFORM=tda2xx-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_a15_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15 PLATFORM=tda2xx-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_a15_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15 xdc_configuro PLATFORM=tda2xx-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_a15_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15 PLATFORM=tda2xx-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_tda2xx-evm_a15_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +maketemp_configuro_cmd_a15host.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/tda2xx-evm/a15host/debug/edma3_drv_arm_tda2xx_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmDRA7XX -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/a15host/debug/edma3_drv_arm_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_a15_st_sample_pa15fg.xdl obj/tda2xx-evm/a15host/debug/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +\# Making example edma3_drv_tda2xx-evm_a15_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +# Making tda2xx-evm:a15host:debug:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +# Making tda2xx-evm:a15host:debug:edma3_lld_drv_sample... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample' +# Making tda2xx-evm:a15host:debug:edma3_lld_rm... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm' +# Making tda2xx-evm:a15host:debug:edma3_lld_rm_sample... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample' +# Linking into bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg... +# +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -nostartfiles -static -Wl,--gc-sections -mfloat-abi=hard --specs=nano.specs obj/tda2xx-evm/a15host/debug/common.oa15fg obj/tda2xx-evm/a15host/debug/dma_misc_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_test.oa15fg obj/tda2xx-evm/a15host/debug/qdma_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_chain_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_ping_pong_test.oa15fg obj/tda2xx-evm/a15host/debug/main.oa15fg obj/tda2xx-evm/a15host/debug/dma_link_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_poll_test.oa15fg obj/tda2xx-evm/a15host/debug/qdma_link_test.oa15fg -Wl,-Map,bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg.map C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/lib/a15/debug/edma3_lld_drv.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/a15/debug/edma3_lld_drv_sample.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/lib/tda2xx-evm/a15/debug/edma3_lld_rm.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/lib/tda2xx-evm/a15/debug/edma3_lld_rm_sample.aa15fg -o bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg -Wl,-T,obj/tda2xx-evm/a15host/debug/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libc_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libm.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/librdimon_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libg_nano.a +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -nostartfiles -static -Wl,--gc-sections -mfloat-abi=hard --specs=nano.specs obj/tda2xx-evm/a15host/debug/common.oa15fg obj/tda2xx-evm/a15host/debug/dma_misc_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_test.oa15fg obj/tda2xx-evm/a15host/debug/qdma_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_chain_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_ping_pong_test.oa15fg obj/tda2xx-evm/a15host/debug/main.oa15fg obj/tda2xx-evm/a15host/debug/dma_link_test.oa15fg obj/tda2xx-evm/a15host/debug/dma_poll_test.oa15fg obj/tda2xx-evm/a15host/debug/qdma_link_test.oa15fg -Wl,-Map,bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg.map C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/lib/a15/debug/edma3_lld_drv.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/a15/debug/edma3_lld_drv_sample.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/lib/tda2xx-evm/a15/debug/edma3_lld_rm.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/lib/tda2xx-evm/a15/debug/edma3_lld_rm_sample.aa15fg -o bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg -Wl,-T,obj/tda2xx-evm/a15host/debug/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libc_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libm.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/librdimon_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libg_nano.a, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:143: bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_debug.xa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_a15_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +maketemp_configuro_cmd_a15host.bat: Access is denied. +Successfully processed 0 files; Failed processing 1 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/tda2xx-evm/a15host/release/edma3_drv_arm_tda2xx_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmDRA7XX -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/a15host/release/edma3_drv_arm_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_a15_st_sample_pa15fg.xdl obj/tda2xx-evm/a15host/release/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd +# Configuro done! +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +\# Making example edma3_drv_tda2xx-evm_a15_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +# Making tda2xx-evm:a15host:release:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +# Making tda2xx-evm:a15host:release:edma3_lld_drv_sample... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample' +# Making tda2xx-evm:a15host:release:edma3_lld_rm... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm' +# Making tda2xx-evm:a15host:release:edma3_lld_rm_sample... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample' +gmake[3]: Nothing to be done for 'all'. +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample' +# Linking into bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg... +# +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -nostartfiles -static -Wl,--gc-sections -mfloat-abi=hard --specs=nano.specs -O2 obj/tda2xx-evm/a15host/release/common.oa15fg obj/tda2xx-evm/a15host/release/dma_misc_test.oa15fg obj/tda2xx-evm/a15host/release/dma_test.oa15fg obj/tda2xx-evm/a15host/release/qdma_test.oa15fg obj/tda2xx-evm/a15host/release/dma_chain_test.oa15fg obj/tda2xx-evm/a15host/release/dma_ping_pong_test.oa15fg obj/tda2xx-evm/a15host/release/main.oa15fg obj/tda2xx-evm/a15host/release/dma_link_test.oa15fg obj/tda2xx-evm/a15host/release/dma_poll_test.oa15fg obj/tda2xx-evm/a15host/release/qdma_link_test.oa15fg -Wl,-Map,bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg.map C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/lib/a15/release/edma3_lld_drv.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/a15/release/edma3_lld_drv_sample.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/lib/tda2xx-evm/a15/release/edma3_lld_rm.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/lib/tda2xx-evm/a15/release/edma3_lld_rm_sample.aa15fg -o bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg -Wl,-T,obj/tda2xx-evm/a15host/release/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libc_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libm.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/librdimon_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libg_nano.a +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -nostartfiles -static -Wl,--gc-sections -mfloat-abi=hard --specs=nano.specs -O2 obj/tda2xx-evm/a15host/release/common.oa15fg obj/tda2xx-evm/a15host/release/dma_misc_test.oa15fg obj/tda2xx-evm/a15host/release/dma_test.oa15fg obj/tda2xx-evm/a15host/release/qdma_test.oa15fg obj/tda2xx-evm/a15host/release/dma_chain_test.oa15fg obj/tda2xx-evm/a15host/release/dma_ping_pong_test.oa15fg obj/tda2xx-evm/a15host/release/main.oa15fg obj/tda2xx-evm/a15host/release/dma_link_test.oa15fg obj/tda2xx-evm/a15host/release/dma_poll_test.oa15fg obj/tda2xx-evm/a15host/release/qdma_link_test.oa15fg -Wl,-Map,bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg.map C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/lib/a15/release/edma3_lld_drv.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/lib/tda2xx-evm/a15/release/edma3_lld_drv_sample.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/lib/tda2xx-evm/a15/release/edma3_lld_rm.aa15fg C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/lib/tda2xx-evm/a15/release/edma3_lld_rm_sample.aa15fg -o bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg -Wl,-T,obj/tda2xx-evm/a15host/release/edma3_drv_arm_tda2xx_sample_configuro/linker.cmd C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libc_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libm.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/librdimon_nano.a C:\ti\bios_6_76_02_02/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/hard/libg_nano.a, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:143: bin/tda2xx-evm/edma3_drv_arm_tda2xx_sample_a15host_release.xa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_A15' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_eve_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE xdc_configuro PLATFORM=tda2xx-evm CORE=eve PROFILE_eve=debug FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_eve_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE PLATFORM=tda2xx-evm CORE=eve PROFILE_eve=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_tda2xx-evm_eve_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE xdc_configuro PLATFORM=tda2xx-evm CORE=eve PROFILE_eve=release FORMAT=ELF& echo \# Making example edma3_drv_tda2xx-evm_eve_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE PLATFORM=tda2xx-evm CORE=eve PROFILE_eve=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_tda2xx-evm_eve_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_eve.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_eve.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_EVE>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/eve/debug/edma3_drv_tda2xx_sample_configuro -t ti.targets.arp32.elf.ARP32_far -p ti.platforms.evmDRA7XX:EVE_1 -r debug -c C:/ti/ARP32_1.0.2 -b rtsc_config/custom_config.bld rtsc_config/edma3_drv_bios6_tda2xx_st_sample.cfg +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/eve/debug/edma3_drv_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_st_sample_pearp32f.xdl obj/tda2xx-evm/eve/debug/edma3_drv_tda2xx_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/tda2xx-evm/eve/debug/edma3_drv_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_st_sample_pearp32f.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_arp32.mk:209: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +\# Making example edma3_drv_tda2xx-evm_eve_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +# Making tda2xx-evm:eve:debug:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +# Compiling src/edma3_drv_init.c to obj/arp32/debug/edma3_drv_init.oearp32f ... +C:/ti/ARP32_1.0.2/bin/cl-arp32 -ppd=obj/arp32/debug/.deps/edma3_drv_init.P -v210 -c -qq -pdsw225 --abi=eabi -eo.oearp32f -ea.searp32f --symdebug:dwarf -Dxdc_target_name__=ARP32_far -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_bld__profile_debug -Dxdc_bld__vers_1_0_4_6_1 -D_DEBUG_=1 -IC:/ti/ARP32_1.0.2/include -I. -I../../../.. -Isrc -fr=obj/arp32/debug -fs=obj/arp32/debug -fc src/edma3_drv_init.c +process_begin: CreateProcess(NULL, C:/ti/ARP32_1.0.2/bin/cl-arp32 -ppd=obj/arp32/debug/.deps/edma3_drv_init.P -v210 -c -qq -pdsw225 --abi=eabi -eo.oearp32f -ea.searp32f --symdebug:dwarf -Dxdc_target_name__=ARP32_far -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_bld__profile_debug -Dxdc_bld__vers_1_0_4_6_1 -D_DEBUG_=1 -IC:/ti/ARP32_1.0.2/include -I. -I../../../.. -Isrc -fr=obj/arp32/debug -fs=obj/arp32/debug -fc src/edma3_drv_init.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[3]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_arp32.mk:135: obj/arp32/debug/edma3_drv_init.oearp32f] Error 2 +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +\# Configuring XDC packages for edma3_drv_tda2xx-evm_eve_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_eve.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_eve.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmtda2xx_EVE>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/tda2xx-evm/eve/release/edma3_drv_tda2xx_sample_configuro -t ti.targets.arp32.elf.ARP32_far -p ti.platforms.evmDRA7XX:EVE_1 -r release -c C:/ti/ARP32_1.0.2 -b rtsc_config/custom_config.bld rtsc_config/edma3_drv_bios6_tda2xx_st_sample.cfg +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/tda2xx-evm/eve/release/edma3_drv_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_st_sample_pearp32f.xdl obj/tda2xx-evm/eve/release/edma3_drv_tda2xx_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/tda2xx-evm/eve/release/edma3_drv_tda2xx_sample_configuro/package/cfg/edma3_drv_bios6_tda2xx_st_sample_pearp32f.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_arp32.mk:209: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +\# Making example edma3_drv_tda2xx-evm_eve_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +# Making tda2xx-evm:eve:release:edma3_lld_drv... +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv +gmake[3]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +# Compiling src/edma3_drv_init.c to obj/arp32/release/edma3_drv_init.oearp32f ... +C:/ti/ARP32_1.0.2/bin/cl-arp32 -ppd=obj/arp32/release/.deps/edma3_drv_init.P -v210 -c -qq -pdsw225 --abi=eabi -eo.oearp32f -ea.searp32f --symdebug:dwarf -Dxdc_target_name__=ARP32_far -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_6_1 -D_DEBUG_=0 -o2 -IC:/ti/ARP32_1.0.2/include -I. -I../../../.. -Isrc -fr=obj/arp32/release -fs=obj/arp32/release -fc src/edma3_drv_init.c +process_begin: CreateProcess(NULL, C:/ti/ARP32_1.0.2/bin/cl-arp32 -ppd=obj/arp32/release/.deps/edma3_drv_init.P -v210 -c -qq -pdsw225 --abi=eabi -eo.oearp32f -ea.searp32f --symdebug:dwarf -Dxdc_target_name__=ARP32_far -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_bld__profile_release -Dxdc_bld__vers_1_0_4_6_1 -D_DEBUG_=0 -o2 -IC:/ti/ARP32_1.0.2/include -I. -I../../../.. -Isrc -fr=obj/arp32/release -fs=obj/arp32/release -fc src/edma3_drv_init.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[3]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_arp32.mk:135: obj/arp32/release/edma3_drv_init.oearp32f] Error 2 +gmake[3]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv' +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/common.mk:132: edma3_lld_drv] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmtda2xx_EVE' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +Hi Samuel, It looks like the issue in the second message is related to the missing arp32 compiler, which is used for the EVE core, and does not apply to the AM5728. In your first message the platform is am57x-evm, and you changed to tda2xx-evm. Which one do you have? I am verifying the build works as expected on the am57x-evm platform. If you do actually have a tda2 evm, there is a different SDK download for the tda2 platform and will include the EVE toolchain. Regards, Mike + +I have an AM5728 IDK. The reason I tried the tda2xx-evm platform is when I call it for the am57x platform it says nothing to be done: c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=am572x-emv FORMAT=ELF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_674_example PLATFORM=am572x-emv TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_m3_example PLATFORM=am572x-emv TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_a8_example PLATFORM=am572x-emv TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_64p_example PLATFORM=am572x-emv TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_66_example PLATFORM=am572x-emv TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_m4_example PLATFORM=am572x-emv TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_a15_example PLATFORM=am572x-emv TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-emv_eve_example PLATFORM=am572x-emv TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_66_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_m4_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_a15_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-emv_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +Hi Samuel, Sorry I didn't catch that earlier - you want to use "evmAM572x" as the platform if you have the AM572x EVM. Check the "Board Names" column in the docs for the full list supported: http://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_01_00_08/rtos/index_faq.html#platforms-supported Regards, Mike + +It still says nothing to be done for evmAM572x platform c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=evmAM572x FORMAT=ELF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_674_example PLATFORM=evmAM572x TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_m3_example PLATFORM=evmAM572x TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_a8_example PLATFORM=evmAM572x TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_64p_example PLATFORM=evmAM572x TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_66_example PLATFORM=evmAM572x TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_m4_example PLATFORM=evmAM572x TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_a15_example PLATFORM=evmAM572x TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_evmAM572x_eve_example PLATFORM=evmAM572x TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_66_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_m4_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_a15_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_evmAM572x_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +You have a typo: Samuel Lurie said: c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM= am572x-emv FORMAT=ELF That should be PLATFORM=am572x-evm. + +It seemed at first like that had worked. Unfortunately I didn't save the log from when I executed it the first time. The .oe66 files under the obj folder were generated, but the bin folder is still empty. If I try rerunning the make commands it again says nothing to be done. c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=AM572x-evm FORMAT=ELF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_674_example PLATFORM=AM572x-evm TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_m3_example PLATFORM=AM572x-evm TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_a8_example PLATFORM=AM572x-evm TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_64p_example PLATFORM=AM572x-evm TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_66_example PLATFORM=AM572x-evm TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_m4_example PLATFORM=AM572x-evm TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_a15_example PLATFORM=AM572x-evm TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_eve_example PLATFORM=AM572x-evm TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_66_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_m4_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_a15_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=AM572x-evm FORMAT=COFF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_674_example PLATFORM=AM572x-evm TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_m3_example PLATFORM=AM572x-evm TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_a8_example PLATFORM=AM572x-evm TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_64p_example PLATFORM=AM572x-evm TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_66_example PLATFORM=AM572x-evm TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_m4_example PLATFORM=AM572x-evm TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_a15_example PLATFORM=AM572x-evm TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_AM572x-evm_eve_example PLATFORM=AM572x-evm TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_66_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_m4_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_a15_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_AM572x-evm_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +c:\ti\edma3_lld_2_12_05_30E\packages>dir c:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\obj\am572x-evm\c6xdsp\debug + Volume in drive C is OS + Volume Serial Number is 60AC-F965 + + Directory of c:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\obj\am572x-evm\c6xdsp\debug + +03/26/2020 04:39 PM . +03/26/2020 04:39 PM .. +03/26/2020 04:39 PM .deps +03/26/2020 04:38 PM 219,156 common.oe66 +03/26/2020 04:38 PM 225,444 dma_chain_test.oe66 +03/26/2020 04:39 PM 224,188 dma_link_test.oe66 +03/26/2020 04:38 PM 215,720 dma_misc_test.oe66 +03/26/2020 04:38 PM 229,560 dma_ping_pong_test.oe66 +03/26/2020 04:39 PM 227,484 dma_poll_test.oe66 +03/26/2020 04:38 PM 221,788 dma_test.oe66 +03/26/2020 04:39 PM 148,376 dsp_timer.oe66 +03/26/2020 04:38 PM edma3_drv_am572x_sample_configuro +03/26/2020 04:38 PM 255,660 main.oe66 +03/26/2020 04:39 PM 231,228 qdma_link_test.oe66 +03/26/2020 04:38 PM 223,412 qdma_test.oe66 + 11 File(s) 2,422,016 bytes + 4 Dir(s) 292,154,503,168 bytes free + +c:\ti\edma3_lld_2_12_05_30E\packages>dir c:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\bin\am572x-evm + Volume in drive C is OS + Volume Serial Number is 60AC-F965 + + Directory of c:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\bin\am572x-evm + +03/26/2020 04:38 PM . +03/26/2020 04:38 PM .. + 0 File(s) 0 bytes + 2 Dir(s) 292,154,470,400 bytes free + +c:\ti\edma3_lld_2_12_05_30E\packages> + +Please use PLATFORM=am572x-evm instead of PLATFORM=AM572x-evm. + +c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=am572x-evm FORMAT=ELF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_674_example PLATFORM=am572x-evm TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_m3_example PLATFORM=am572x-evm TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_a8_example PLATFORM=am572x-evm TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_64p_example PLATFORM=am572x-evm TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_66_example PLATFORM=am572x-evm TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_m4_example PLATFORM=am572x-evm TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_a15_example PLATFORM=am572x-evm TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_eve_example PLATFORM=am572x-evm TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_66_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP xdc_configuro PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_66_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_66_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP xdc_configuro PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_66_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_66_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +processed file: C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\maketemp_configuro_cmd_c6xdsp.bat +maketemp_configuro_cmd_c6xdsp.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro -t ti.targets.elf.C66 -p ti.platforms.evmDRA7XX:DSP_1 -r debug -c C: i +ICACLS obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/linker_mod.cmd /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +ICACLS obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:226: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Making example edma3_drv_am572x-evm_66_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[2]: *** No rule to make target 'obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.c', needed by 'obj/am572x-evm/c6xdsp/debug/edma3_drv_bios6_am572x_st_sample_pe66.oe66'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Configuring XDC packages for edma3_drv_am572x-evm_66_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +processed file: C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\maketemp_configuro_cmd_c6xdsp.bat +maketemp_configuro_cmd_c6xdsp.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro -t ti.targets.elf.C66 -p ti.platforms.evmDRA7XX:DSP_1 -r release -c C: i +ICACLS obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/linker_mod.cmd /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +ICACLS obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:226: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Making example edma3_drv_am572x-evm_66_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[2]: *** No rule to make target 'obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.c', needed by 'obj/am572x-evm/c6xdsp/release/edma3_drv_bios6_am572x_st_sample_pe66.oe66'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_m4_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 xdc_configuro PLATFORM=am572x-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_m4_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 PLATFORM=am572x-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_m4_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 xdc_configuro PLATFORM=am572x-evm CORE=m4 PROFILE_m4=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_m4_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 PLATFORM=am572x-evm CORE=m4 PROFILE_m4=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_m4_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_m4.mk:216: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Making example edma3_drv_am572x-evm_m4_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[2]: *** No rule to make target 'obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.c', needed by 'obj/am572x-evm/m4/debug/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.oem4'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Configuring XDC packages for edma3_drv_am572x-evm_m4_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_m4.mk:216: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Making example edma3_drv_am572x-evm_m4_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[2]: *** No rule to make target 'obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.c', needed by 'obj/am572x-evm/m4/release/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.oem4'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_a15_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 xdc_configuro PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_a15_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_a15_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 xdc_configuro PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_a15_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_a15_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmAM572X -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/linker.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:182: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Making example edma3_drv_am572x-evm_a15_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Compiling am572x-evm:a15host:debug:edma3_drv_arm_am572x_sample: ../src/common.c +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/debug/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -D_DEBUG_=1 -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__='obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h' -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/debug/common.oa15fg ../src/common.c +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/debug/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -D_DEBUG_=1 -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__=obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/debug/common.oa15fg ../src/common.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:92: obj/am572x-evm/a15host/debug/common.oa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Configuring XDC packages for edma3_drv_am572x-evm_a15_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmAM572X -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/linker.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:182: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Making example edma3_drv_am572x-evm_a15_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Compiling am572x-evm:a15host:release:edma3_drv_arm_am572x_sample: ../src/common.c +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/release/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -O2 -s -DNDEBUG -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__='obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h' -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/release/common.oa15fg ../src/common.c +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/release/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -O2 -s -DNDEBUG -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__=obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/release/common.oa15fg ../src/common.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:92: obj/am572x-evm/a15host/release/common.oa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +c:\ti\edma3_lld_2_12_05_30E\packages>gmake examples PLATFORM=am572x-evm FORMAT=COFF +gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_674_example PLATFORM=am572x-evm TARGET=674& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_m3_example PLATFORM=am572x-evm TARGET=m3& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_a8_example PLATFORM=am572x-evm TARGET=a8& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_64p_example PLATFORM=am572x-evm TARGET=64p& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_66_example PLATFORM=am572x-evm TARGET=66& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_m4_example PLATFORM=am572x-evm TARGET=m4& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_a15_example PLATFORM=am572x-evm TARGET=a15& gmake -C C:/ti/edma3_lld_2_12_05_30E/packages edma3_drv_am572x-evm_eve_example PLATFORM=am572x-evm TARGET=eve& +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_674_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_m3_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_a8_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_64p_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_66_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP xdc_configuro PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_66_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_66_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP xdc_configuro PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_66_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP PLATFORM=am572x-evm CORE=c6xdsp PROFILE_c6xdsp=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_66_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +processed file: C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\maketemp_configuro_cmd_c6xdsp.bat +maketemp_configuro_cmd_c6xdsp.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro -t ti.targets.elf.C66 -p ti.platforms.evmDRA7XX:DSP_1 -r debug -c C: i +ICACLS obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/linker_mod.cmd /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +ICACLS obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:226: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Making example edma3_drv_am572x-evm_66_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[2]: *** No rule to make target 'obj/am572x-evm/c6xdsp/debug/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.c', needed by 'obj/am572x-evm/c6xdsp/debug/edma3_drv_bios6_am572x_st_sample_pe66.oe66'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Configuring XDC packages for edma3_drv_am572x-evm_66_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +# Invoking configuro... +a+x maketemp_configuro_cmd_c6xdsp.bat +CACLS maketemp_configuro_cmd_c6xdsp.bat /E /P Everyone:F +processed file: C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP\maketemp_configuro_cmd_c6xdsp.bat +maketemp_configuro_cmd_c6xdsp.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_DSP>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro -t ti.targets.elf.C66 -p ti.platforms.evmDRA7XX:DSP_1 -r release -c C: i +ICACLS obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/linker_mod.cmd /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +ICACLS obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl /q /c /grant Everyone:F /T +Successfully processed 0 files; Failed processing 0 files +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_66.mk:226: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +\# Making example edma3_drv_am572x-evm_66_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[2]: *** No rule to make target 'obj/am572x-evm/c6xdsp/release/edma3_drv_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_st_sample_pe66.c', needed by 'obj/am572x-evm/c6xdsp/release/edma3_drv_bios6_am572x_st_sample_pe66.oe66'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_DSP' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_m4_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 xdc_configuro PLATFORM=am572x-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_m4_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 PLATFORM=am572x-evm CORE=m4 PROFILE_m4=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_m4_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 xdc_configuro PLATFORM=am572x-evm CORE=m4 PROFILE_m4=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_m4_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4 PLATFORM=am572x-evm CORE=m4 PROFILE_m4=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_m4_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_m4.mk:216: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Making example edma3_drv_am572x-evm_m4_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[2]: *** No rule to make target 'obj/am572x-evm/m4/debug/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.c', needed by 'obj/am572x-evm/m4/debug/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.oem4'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Configuring XDC packages for edma3_drv_am572x-evm_m4_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_m4.bat /q /c /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_m4.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_M4>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro --generationOnly -o obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro -t ti.targets.arm.elf.M4 -p ti.platforms.evmDRA7XX:IPU_1_0 -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/linker_mod.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_m4.mk:216: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +\# Making example edma3_drv_am572x-evm_m4_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[2]: *** No rule to make target 'obj/am572x-evm/m4/release/edma3_drv_arm_am572x_core0_sample_configuro/package/cfg/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.c', needed by 'obj/am572x-evm/m4/release/edma3_drv_bios6_am572x_m4_c0_st_sample_pem4.oem4'. Stop. +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_M4' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +echo \# Configuring XDC packages for edma3_drv_am572x-evm_a15_example debug FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 xdc_configuro PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_a15_example debug& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=debug FORMAT=ELF& echo \# Configuring XDC packages for edma3_drv_am572x-evm_a15_example release FORMAT=ELF& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 xdc_configuro PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& echo \# Making example edma3_drv_am572x-evm_a15_example release& gmake -C C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15 PLATFORM=am572x-evm CORE=a15host PROFILE_a15host=release FORMAT=ELF& +\# Configuring XDC packages for edma3_drv_am572x-evm_a15_example debug FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmAM572X -r debug -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/linker.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:182: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Making example edma3_drv_am572x-evm_a15_example debug +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Compiling am572x-evm:a15host:debug:edma3_drv_arm_am572x_sample: ../src/common.c +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/debug/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -D_DEBUG_=1 -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__='obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h' -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/debug/common.oa15fg ../src/common.c +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/debug/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -D_DEBUG_=1 -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__=obj/am572x-evm/a15host/debug/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/debug/common.oa15fg ../src/common.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:92: obj/am572x-evm/a15host/debug/common.oa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Configuring XDC packages for edma3_drv_am572x-evm_a15_example release FORMAT=ELF +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Invoking configuro... +ICACLS maketemp_configuro_cmd_a15host.bat /q /c /t /grant Everyone:F /T +Successfully processed 1 files; Failed processing 0 files +maketemp_configuro_cmd_a15host.bat + +C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver\evmAM572x_A15>C: i▄tools_3_55_02_22_core/xs xdc.tools.configuro -o obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro -t gnu.targets.arm.A15F -p ti.platforms.evmAM572X -r release -c C: i +C:/ti/xdctools_3_55_02_22_core/bin/cp obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/linker.cmd +/usr/bin/cp: cannot stat 'obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_pa15fg.xdl': No such file or directory +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:182: xdc_configuro] Error 1 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +\# Making example edma3_drv_am572x-evm_a15_example release +gmake[2]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +# Compiling am572x-evm:a15host:release:edma3_drv_arm_am572x_sample: ../src/common.c +C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/release/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -O2 -s -DNDEBUG -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__='obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h' -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/release/common.oa15fg ../src/common.c +process_begin: CreateProcess(NULL, C:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/bin/arm-none-eabi-gcc -c -MD -MF obj/am572x-evm/a15host/release/common.oa15fg.dep -Wall -Wunknown-pragmas -c -mcpu=cortex-a15 -g -mfpu=neon -mfloat-abi=hard -mabi=aapcs -mapcs-frame -Wswitch -O2 -s -DNDEBUG -Dxdc_target_name__=A15F -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_cfg__header__=obj/am572x-evm/a15host/release/edma3_drv_arm_am572x_sample_configuro/package/cfg/edma3_drv_bios6_am572x_a15_st_sample_xem3.h -DGCC_BUILD -D_LOCAL_CORE_a15host_ -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include -IC:\ti\ccs930\ccs\tools\compiler\ti-cgt-arm_18.12.5.LTS/arm-none-eabi/include/newlib-nano -I../src -IC:\ti\bios_6_76_02_02/packages -IC:\ti\xdctools_3_55_02_22_core/packages -IC:/ti/edma3_lld_2_12_05_30E/packages -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/rm/sample/src -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample -IC:/ti/edma3_lld_2_12_05_30E/packages/ti/sdo/edma3/drv/sample/src -o obj/am572x-evm/a15host/release/common.oa15fg ../src/common.c, ...) failed. +make (e=2): The system cannot find the file specified. +gmake[2]: *** [c:/ti/edma3_lld_2_12_05_30E/makerules/rules_a15.mk:92: obj/am572x-evm/a15host/release/common.oa15fg] Error 2 +gmake[2]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/examples/edma3_driver/evmAM572x_A15' +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Entering directory 'C:/ti/edma3_lld_2_12_05_30E/packages' +gmake[1]: Nothing to be done for 'edma3_drv_am572x-evm_eve_example'. +gmake[1]: Leaving directory 'C:/ti/edma3_lld_2_12_05_30E/packages' + +Hi Samuel, Apologies this has not been smooth for you - here is a set of steps that should get you on track: I recommend starting with a fresh install of the EDMA3 LLD - this will get us on the same baseline. During the install you can select just the EDMA3 LLD. Make a copy of your existing EDMA3 LLD folder so you can pull any config files you've modified (such as env.mk) Take a look at my attached env.mk as an example - if you used the default c:/ti install path, you should be able to use my environment as-is. Copy to c:/ti/edma3_lld_2_12_05_30E/makerules Run the following commands in the terminal: c:\ti\pdk_am57xx_1_0_16\packages\pdksetupenv.bat +cd c:\ti\edma3_lld_2_12_05_30E\packages +set ROOTDIR= c:/ti/edma3_lld_2_12_05_30E +gmake PLATFORM=am572x-evm FORMAT=ELF examples Note: the pdksetupenv batch file will setup your other paths. The example binaries should appear in the C:\ti\edma3_lld_2_12_05_30E\examples\edma3_driver folder. The binaries will be in evmAM572x_A15, evmAM572x_DSP and evmAM572x_M4 /bin/am572x-evm. Regards, Mike 2086.env.mk + diff --git a/data2/text/range/30001+/894902.txt b/data2/text/range/30001+/894902.txt new file mode 100644 index 0000000000000000000000000000000000000000..a33e7baca722f27f2799158ae341e004739279d6 --- /dev/null +++ b/data2/text/range/30001+/894902.txt @@ -0,0 +1,8928 @@ +Ticket Name: TDA2HG: Uboot 2019.01 can not boot normal based on VSDK 03 08 + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: DRA742, TDA2, DRA718 Hello, We use TDA2HG device based on VSDK 03 08. While, the uboot can not boot normal from SD. The version of uboot is 2019.01.Below is the log, could you help us to have a look? Terence Thanks =================================================== U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) DRA752-GP ES2.0 Trying to boot from MMC1 no pinctrl state for default mode Loading Environment from MMC... *** Warning - bad CRC, using default environment U-Boot 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1 GiB NAND: 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment Warning: fastboot.board_rev: unknown board revision Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined Card did not respond to voltage select! Card did not respond to voltage select! Card did not respond to voltage select! switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 ** Unable to read file boot.scr ** 173 bytes read in 4 ms (42 KiB/s) Loaded env from uEnv.txt Importing environment from mmc1 ... Trying to Boot Linux from eMMC ... switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 + +Responses: +Hi Terence, is this custom board or EVM? Can you check those instructions and see if they can give you some directions: Regards, Yordan + +Hi Yordan, We use custom board. It is normal that we use VSDK 03 05. We want to update it to VSDK 03 08. And, the wiki you share, we read it long time ago. From the log, can you find the reason this issue? Thanks Terence boot_fail_from_sd.log [BEGIN] 2020/4/7 16:52:16 +[ 0.001896] Setting up st +U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +Loading Environment from MMC... *** Warning - bad CRC, using default environment + + + +U-Boot 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... *** Warning - bad CRC, using default environment + +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +Card did not respond to voltage select! +Card did not respond to voltage select! +Card did not respond to voltage select! +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +** Unable to read file boot.scr ** +173 bytes read in 4 ms (42 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +Trying to Boot Linux from eMMC ... +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 + +[END] 2020/4/7 16:52:50 + +Hi Terence, I see U-Boot SPL 2019.01-00014-gf454ae0-dirty here. Can you try with default u-boot with commit f454ae0 ? This is tested on all TI-EVMs. What are the modifications done on this commit/ Thanks RamPrasad + +Hi Terence, Clearly it is not able to get the DTB in the failing case. I hope you used the create sd card script to create the SD card. Could you please dump the environment in the failing case using printenv. I believe the 3.05 is booting fine. It will be useful if you can dump the printenv for the successful case as well. Thanks, Keerthy + +Hi RamPrasad, According to VisionSDK_Linux_UserGuide.pdf, we have checkout it to f454ae0 with "git checkout -b uboot_dev f454ae0". The newest commit as below show, =================================== root@ubuntu:/home/xcj/share/vsdk_0308/ti_components/os_tools/linux/u-boot/u-boot# git log . commit f454ae0ae9055e7e4ad822cb141b0a4b8aa09b04 Author: Ramprasad N Date: Wed Nov 6 14:43:25 2019 +0530 remoteproc: Update memory map for vision sdk Memory map for visionSDK is different from PSDKLA, there will be overlap with the load adresses. So new load_address and page_table address need to be used. VisionSDK also requiers lzop decompression of the firmwares to reduce the load time. This is also taken care now. * SPL loads the compressed firmware to load_addr. * Uncompress the lzop from load_addr to a uncomp_addr. * Set the load_addr to uncomp_addr for further use like finding resource table, getting the entry point etc. Signed-off-by: Ramprasad N + +Hi Keerthy， Yes.We try to dump the environment in the failing case using printenv. It named boot_fail_from_sd_vsdk0308.log. Also we dump the the printenv for the successful case. It named boot_success_from_sd_vsdk0305.log. Please find the log in the attachment. Thanks Terence boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/8 9:59:50 +Hit any key to stop autoboot: 2 +U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +Loading Environment from MMC... *** Warning - bad CRC, using default environment + + + +U-Boot 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... *** Warning - bad CRC, using default environment + +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> +=> +=> printenv +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baudrate=115200 +board=dra7xx +board_name=dra7xx +boot_fdt=try +boot_fit=0 +boot_flag=0 +boot_nand=0 +boot_os=0 +bootargs=androidboot.serialno=${serial#} +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;setenv mmcdev 1; run envboot; run emmc_linux_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyS0,115200n8 +cpu=armv7 +dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 +dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 +dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 +dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 +dfu_bufsiz=0x10000 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +emmc_linux_boot=echo Trying to Boot Linux from eMMC ...;setenv mmcdev 1; if test $boot_flag = 1; then setenv bootpart 1:3; else setenv bootpart 1:2; fi; if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +ethaddr=4c:3f:d3:54:b5:32 +fastboot.cpu=DRA752 +fastboot.secure=GP +fdt_addr_r=0x88000000 +fdtaddr=0x88000000 +fdtcontroladdr=bdf11248 +fdtfile=undefined +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=0 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs} +partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved};name=misc,size=128K,uuid=${uuid_gpt_misc};name=recovery,size=40M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=1024M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=userdata,size=-,uuid=${uuid_gpt_userdata} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +serial#=150100160f464b22 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +stderr=serial@4806a000 +stdin=serial@4806a000 +stdout=serial@4806a000 +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=ti +ver=U-Boot 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) +vram=16M + +Environment size: 7400/131067 bytes + +[END] 2020/4/8 10:00:42 + boot_success_from_sd_vsdk0305.log [BEGIN] 2020/4/8 10:28:28 +=> +U-Boot SPL 2016.05 (Apr 02 2020 - 18:13:02) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - bad CRC, using default environment +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - bad CRC, using default environment +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img +U-Boot 2016.05 (Apr 02 2020 - 18:13:02 +0800) +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +*** Warning - bad CRC, using default environment +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +reading boot.scr +** Unable to read file boot.scr ** +reading uEnv.txt +174 bytes read in 2 ms (85 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +3566312 bytes read in 186 ms (18.3 MiB/s) +106255 bytes read in 18 ms (5.6 MiB/s) +Booting from mmc0 ... +Kernel image @ 0x82000000 [ 0x000000 - 0x366ae8 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe3000, end 8fffff0e ... OK +Starting kernel ... +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (xiachunjiang@ecarx-5288-V3) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Thu Apr 2 18:14:18 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9E000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@A1000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@A3000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0xb7c00000 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251712 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=f9a296c2-02 rw rootwait ip=none mem=1024M cma=128M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 386972K/1013760K available (6679K kernel code, 319K rwdata, 2396K rodata, 336K init, 286K bss, 315492K reserved, 311296K cma-reserved, 129024K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e500c (9077 kB) +[ 0.000000] .init : 0xc08e6000 - 0xc093a000 ( 336 kB) +[ 0.000000] .data : 0xc093a000 - 0xc0989e60 ( 320 kB) +[ 0.000000] .bss : 0xc098b000 - 0xc09d2980 ( 287 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000329] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000337] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000780] Console: colour dummy device 80x30 +[ 0.000803] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000817] pid_max: default: 32768 minimum: 301 +[ 0.000914] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000924] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001488] Initializing cgroup subsys io +[ 0.001505] Initializing cgroup subsys memory +[ 0.001531] Initializing cgroup subsys devices +[ 0.001544] Initializing cgroup subsys freezer +[ 0.001555] Initializing cgroup subsys perf_event +[ 0.001567] Initializing cgroup subsys pids +[ 0.001593] CPU: Testing write buffer coherency: ok +[t +U-Boot SPL 2016.05 (Apr 02 2020 - 18:13:02) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - bad CRC, using default environment +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - bad CRC, using default environment +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img +U-Boot 2016.05 (Apr 02 2020 - 18:13:02 +0800) +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +*** Warning - bad CRC, using default environment +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> +=> +=> +=> +=> +=> +=> +=> +U-Boot SPL 2016.05 (Apr 02 2020 - 18:13:02) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +*** Warning - bad CRC, using default environment + +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +*** Warning - bad CRC, using default environment + +reading u-boot.img +reading u-boot.img +reading u-boot.img +reading u-boot.img + + +U-Boot 2016.05 (Apr 02 2020 - 18:13:02 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +*** Warning - bad CRC, using default environment + +Warning: fastboot.board_rev: unknown board revision +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> +=> printenv +arch=arm +args_fit=setenv bootargs console=${console} +args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype} +baudrate=115200 +board=dra7xx +board_name=dra7xx +boot_fdt=try +boot_fit=0 +boot_flag=0 +boot_os=0 +bootargs=androidboot.serialno=${serial#} +bootcmd=if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;setenv mmcdev 1; run envboot; run emmc_linux_boot; +bootdelay=2 +bootdir=/boot +bootenvfile=uEnv.txt +bootfile=zImage +bootm_size=0x10000000 +bootpart=0:2 +bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr} +console=ttyO0,115200n8 +cpu=armv7 +dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1 +dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x100;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1 +dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000 +dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000 +dfu_bufsiz=0x10000 +dofastboot=0 +emmc_android_boot=setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv mmcdev 1; setenv fdt_part 3; setenv boot_part 9; if test $reboot_image = recovery; then setenv boot_part 8; setenv reboot_image boot; saveenv; fi;setenv machid fe6; mmc dev $mmcdev; mmc rescan; part start mmc ${mmcdev} ${fdt_part} fdt_start; part size mmc ${mmcdev} ${fdt_part} fdt_size; part start mmc ${mmcdev} ${boot_part} boot_start; part size mmc ${mmcdev} ${boot_part} boot_size; mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; mmc read ${loadaddr} ${boot_start} ${boot_size}; echo Booting from eMMC ...; bootm $loadaddr $loadaddr $fdtaddr; +emmc_linux_boot=echo Trying to Boot Linux from eMMC ...;setenv mmcdev 1; if test $boot_flag = 1; then setenv bootpart 1:3; else setenv bootpart 1:2; fi; if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi; +ethaddr=4c:3f:d3:54:b5:32 +fastboot.board_rev=unknown +fastboot.cpu=DRA752 +fastboot.secure=GP +fastboot.userdata_size=unknown +fdt_addr_r=0x88000000 +fdtaddr=0x88000000 +fdtcontroladdr=bef0a0f8 +fdtfile=undefined +findfdt=if test $board_name = omap5_uevm; then setenv fdtfile omap5-uevm.dtb; fi; if test $board_name = dra7xx; then setenv fdtfile dra7-evm.dtb; fi;if test $board_name = dra72x-revc; then setenv fdtfile dra72-evm-revc.dtb; fi;if test $board_name = dra72x; then setenv fdtfile dra72-evm.dtb; fi;if test $board_name = dra71x; then setenv fdtfile dra71-evm.dtb; fi;if test $board_name = dra76x; then setenv fdtfile dra76-evm.dtb; fi;if test $board_name = beagle_x15; then setenv fdtfile am57xx-beagle-x15.dtb; fi;if test $board_name = beagle_x15_revb1; then setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;if test $board_name = am57xx_evm; then setenv fdtfile am57xx-evm.dtb; fi;if test $board_name = am57xx_evm_reva3; then setenv fdtfile am57xx-evm-reva3.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = no; then setenv fdtfile am572x-idk.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am572x-idk-lcd-osd.dtb; fi;if test $board_name = am572x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am572x-idk-lcd-osd101t2587.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = no; then setenv fdtfile am571x-idk.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2045; then setenv fdtfile am571x-idk-lcd-osd.dtb; fi;if test $board_name = am571x_idk && test $idk_lcd = osd101t2587; then setenv fdtfile am571x-idk-lcd-osd101t2587.dtb; fi;if test $board_findfdt != undefined; then run board_findfdt; fi;if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; +finduuid=part uuid mmc ${bootpart} uuid +fit_bootfile=fitImage.itb +fit_loadaddr=0x88000000 +importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} +kernel_addr_r=0x82000000 +loadaddr=0x82000000 +loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} +loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfit=run args_fit; bootm ${loadaddr}#${fdtfile}; +loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile} +mmcboot=if mmc dev ${mmcdev}; then setenv devtype mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run loadfdt; echo Booting from mmc${mmcdev} ...; run args_mmc; bootz ${loadaddr} - ${fdtaddr}; fi; fi; fi; +mmcdev=0 +mmcloados=run args_mmc; if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi; +mmcrootfstype=ext4 rootwait +netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp +netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr} +netloadfdt=tftp ${fdtaddr} ${fdtfile} +netloadimage=tftp ${loadaddr} ${bootfile} +nfsopts=nolock +partitions=uuid_disk=${uuid_gpt_disk};name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs} +partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2304K,uuid=${uuid_gpt_bootloader};name=environment,size=256K,uuid=${uuid_gpt_environment};name=misc,size=128K,uuid=${uuid_gpt_misc};name=reserved,size=384K,uuid=${uuid_gpt_reserved};name=efs,size=16M,uuid=${uuid_gpt_efs};name=crypto,size=16K,uuid=${uuid_gpt_crypto};name=recovery,size=30M,uuid=${uuid_gpt_recovery};name=boot,size=10M,uuid=${uuid_gpt_boot};name=system,size=768M,uuid=${uuid_gpt_system};name=vendor,size=256M,uuid=${uuid_gpt_vendor};name=cache,size=256M,uuid=${uuid_gpt_cache};name=ipu1,size=8M,uuid=${uuid_gpt_ipu1};name=ipu2,size=8M,uuid=${uuid_gpt_ipu2};name=dsp1,size=8M,uuid=${uuid_gpt_dsp1};name=dsp2,size=8M,uuid=${uuid_gpt_dsp2};name=userdata,size=-,uuid=${uuid_gpt_userdata} +pxefile_addr_r=0x80100000 +ramdisk_addr_r=0x88080000 +rdaddr=0x88080000 +reboot_image=boot +rootpath=/export/rootfs +scriptaddr=0x80000000 +scsidevs=0 +serial#=150100160f464b22 +soc=omap5 +static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off +stderr=serial@4806a000 +stdin=serial@4806a000 +stdout=serial@4806a000 +update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile} +usbtty=cdc_acm +vendor=ti +ver=U-Boot 2016.05 (Apr 02 2020 - 18:13:02 +0800) +vram=16M + +Environment size: 7859/131067 bytes + +[END] 2020/4/8 10:29:14 + +Hi Terrence, I believe you are using the sd card create script to get the right images on the SD card. In the failing case on the u-boot prompt can you do: env default -a saveenv And the give: boot And send me the output please? Regards, - Keerthy + +Hi Keerthy, According to your suggestion, issue still remain. It still can not boot from SD. Please find the log in the attachment. Terence Thanks 8838.boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/8 11:39:11 +U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +Loading Environment from MMC... OK + + +U-Boot 2019.01-00014-gf454ae0-dirty (Apr 06 2020 - 23:03:11 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... OK +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +=> +=> env default -a +## Resetting to default environment +=> +## Resetting to default environment +=> +## Resetting to default environment +=> saveenv +Saving Environment to MMC... Writing to MMC(1)... OK +=> +=> boot +## Error: "board_findfdt" not defined +Card did not respond to voltage select! +Card did not respond to voltage select! +Card did not respond to voltage select! +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +** Unable to read file boot.scr ** +173 bytes read in 4 ms (42 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +Trying to Boot Linux from eMMC ... +switch to partitions #0, OK +mmc1(part 0) is current device +SD/MMC found on device 1 +3566424 bytes read in 23 ms (147.9 MiB/s) +106255 bytes read in 2 ms (50.7 MiB/s) +Booting from mmc1 ... +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe3000, end 8fffff0e ... OK + + +[END] 2020/4/8 11:40:27 + +Hi Terrence, Success case: Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3566312 bytes read in 186 ms (18.3 MiB/s) 106255 bytes read in 18 ms (5.6 MiB/s) Booting from mmc0 ... Failure case: switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 ** Unable to read file boot.scr ** 173 bytes read in 4 ms (42 KiB/s) Loaded env from uEnv.txt Importing environment from mmc1 ... Trying to Boot Linux from eMMC ... switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 In the success case the boot device is mmc0 and in the failure case it is mmc1. Are you using the same dip switch settings and the same board for both cases? - Keerthy + +Hi Keerthy， We use the same board. From the failure case ,it can not boot from SD card,and then it will boot from EMMC flash.we don't understand why. Thanks Terence + +On the other hand, we think it is not stable to detect the SD card. From the failure case,it said "Card did not respond to voltage select!" ===================================== => boot ## Error: "board_findfdt" not defined Card did not respond to voltage select! Card did not respond to voltage select! Card did not respond to voltage select! switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 ** Unable to read file boot.scr ** 173 bytes read in 4 ms (42 KiB/s) Loaded env from uEnv.txt Importing environment from mmc1 ... Trying to Boot Linux from eMMC ... + +Hi Terrence, There are pre-built images here: http://downloads.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/boot-dra7xx-evm.tar.gz Can you please copy the u-boot.img and MLO to your SD card and try to boot Linux. Also can you try to boot from a different SD card other than the failing one? Regards, Keerthy + +Add the MMC trace log. 2742.boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/8 18:01:47 + +U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 08 2020 - 02:55:34 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +11111111111111111111111 err = 0! +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0xC0FF8000 +2222222222222222222222222 err = 0! +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +Loading Environment from MMC... CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +OK +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000290C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290F + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290F + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002910 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002D7E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000082C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002D7E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002E8C + MMC_RSP_R1,5,6,7 0x00000900 + + +U-Boot 2019.01-00014-gf454ae0-dirty (Apr 08 2020 - 02:55:34 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +OK +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc1(part 0) is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000800 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 1 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000010 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00001E3E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000030 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +** Unable to read file boot.scr ** +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000030 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000025A2 + MMC_RSP_R1,5,6,7 0x00000900 +173 bytes read in 29 ms (4.9 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +Trying to Boot Linux from eMMC ... +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc1(part 0) is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 1 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A180 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0007A182 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A188 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007B0A0 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008AE20 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A189 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A280 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A001 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A002 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A003 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A293 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x005ABFA0 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x005ADAD5 + MMC_RSP_R1,5,6,7 0x00000900 +3566424 bytes read in 145 ms (23.5 MiB/s) +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A285 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x005A9800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x005A98CF + MMC_RSP_R1,5,6,7 0x00000900 +106255 bytes read in 42 ms (2.4 MiB/s) +Booting from mmc1 ... +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe3000, end 8fffff0e ... OK + +Starting kernel ... + + +[END] 2020/4/8 18:02:08 + +Hi Terrence, Could you please try to boot with the pre-built binaries as suggested one reply above and let us know if you face SD boot issue. Ramprasad has tried on SD boot with that and has faced NO issues. Also as suggested could you also try with a different SD card as well? - Keerthy + +Hi Keerthy, Yes. We try the pre-built images you give. But , it can output nothing from the uart on our borad. Also we try different SD card, issue is the same. Thanks Terence + +Hi Terrence, I have booted my TDA2 based board with the pre-built binaries without any issues. It is a slightly different board but that should not really matter. Also the mmc worked fine and i could read the images from mmc card and kernel started booting. If the pre-built binaries are not booting then i suspect something with the board. Did you have any custom modifications on u-boot to bring up your board on 3.05? Please let me know. I am not seeing any issues with 3.08 on my end. Please let us know. I am also attaching the images that i built myself. You can try that one. I could boot from that as well without any issues,built.tar Log below. U-Boot SPL 2019.01-ga0ff74425a (Dec 11 2019 - 13:57:25 +0000 DRA722-GP ES2.0 Trying to boot from MMC1 no pinctrl state for fault mode Loading Environment from MMC... OK U-Boot 2019.01-ga0ff74425a (Dec 11 2019 - 13:57:25 +0000) CPU : DRA722-GP ES2.0 Model: TI DRA718 EVM Board: DRA71x E REV A.2 DRAM: 2 GiB NAND: 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Loading Environment from MMC..OK Net: Warning: ethernet@48484000 using MAC address from ROM eth0:thernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** Unable to read file boot.scr ** Unable to read file uEnv.txt ** switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 4395520 bytes read in 49 ms (85.5 MiB/s) 89858 bytes read in 2 ms (42.8 MiB/s) Bting from mmc0 ... Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe7000, end 8fffff01 ... Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.00000 Linux version 4.19.73-00040-g3d036849ccdc (keerthy@keerthy) (c version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-l-8.36))) #1 SMP PREEMPT Thu Apr 9 11:25:12 IST 200 [ 0.0000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: div instructions availablepatching division code [ 0.000000] CPU: PIPT / VIPT nonaliing data cache, PIPT instruction cache [ 0.000000] OF: fdt: Machine model: TI DRA718 EVM [ 0.000000] Memory licy: Data cache writealloc + +Hi Keerthy, Thank you very much for your support. On customer borad, we have to modify something to adapt the hardware. Can you help to have a look the log in the attachment? It is MMC TRACE log. 7633.boot_success_from_sd_vsdk0305.log [BEGIN] 2020/4/9 18:18:43 + +U-Boot SPL 2016.05 (Apr 09 2020 - 18:13:06) +DRA752-GP ES2.0 +no pinctrl for hs200_1_8v +no pinctrl for ddr_1_8v +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0xC0FF8000 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:13 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -19 +CMD_SEND:55 + ARG 0x00000000 + RET -19 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000800 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +Trying to boot from MMC1 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +reading dra7-ipu2-fw.lzop +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 +spl: error reading image dra7-ipu2-fw.lzop, err - -1 +Error loading remotecore IPU2!,Continuing with boot ... +reading dra7-dsp1-fw.lzop +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 +spl: error reading image dra7-dsp1-fw.lzop, err - -1 +Error loading remotecore DSP1!,Continuing with boot ... +reading dra7-dsp2-fw.lzop +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 +spl: error reading image dra7-dsp2-fw.lzop, err - -1 +Error loading remotecore DSP2!,Continuing with boot ... +reading dra7-ipu1-fw.lzop +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 +spl: error reading image dra7-ipu1-fw.lzop, err - -1 +Error loading remotecore IPU1!,Continuing with boot ... +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +reading u-boot.img +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000289F + MMC_RSP_R1,5,6,7 0x00000900 +reading u-boot.img +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000289F + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000028A2 + MMC_RSP_R1,5,6,7 0x00000900 +reading u-boot.img +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000028A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x000028A3 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002C14 + MMC_RSP_R1,5,6,7 0x00000900 +reading u-boot.img +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002C14 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002C15 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002CB3 + MMC_RSP_R1,5,6,7 0x00000900 + + +U-Boot 2016.05 (Apr 09 2020 - 18:13:06 +0800) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +>>>pdb1_pin_val=0,pdb2_pin_val=0,pdb3_pin_val=0,pdb4_pin_val=0 +***pdb1_pin_val=1,pdb2_pin_val=1,pdb3_pin_val=1,pdb4_pin_val=1 +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -19 +CMD_SEND:55 + ARG 0x00000000 + RET -19 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +Warning: fastboot.board_rev: unknown board revision +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000001 + MMC_RSP_R1,5,6,7 0x00000900 +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid GPT *** +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00E90E7F + MMC_RSP_R1,5,6,7 0x00000900 +GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 +part_get_info_efi: *** ERROR: Invalid Backup GPT *** +ERROR: cannot find partition: 'userdata' + +at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() +Warning: fastboot.userdata_size: unable to calc +SCSI: SATA link 0 timeout. +AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode +flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst +scanning bus for devices... +Found 0 device(s). +Net: +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x41FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0xC1FF8000 +CMD_SEND:11 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000320 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x41FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0xC0FF8000 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:13 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc0 is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0xC0FF8000 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:13 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 0 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +reading boot.scr +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +** Unable to read file boot.scr ** +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +reading uEnv.txt +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002F0A + MMC_RSP_R1,5,6,7 0x00000900 +174 bytes read in 44 ms (2.9 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0xC0FF8000 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:13 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc0 is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x41300000 + MMC_RSP_R3,4 0xC0FF8000 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:13 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CURR STATE:3 +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 0 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00080800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00080802 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00080808 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00082908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008080B + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C80900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90901 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90902 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90903 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008080B + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C80913 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00CC6E08 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00CC893D + MMC_RSP_R1,5,6,7 0x00000900 +3566328 bytes read in 1574 ms (2.2 MiB/s) +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00080800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00080802 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00080808 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00082908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00092908 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008080B + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C80900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C90900 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008080B + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00C80905 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00CC4668 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00CC4737 + MMC_RSP_R1,5,6,7 0x00000900 +106255 bytes read in 600 ms (172.9 KiB/s) +Booting from mmc0 ... +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +Kernel image @ 0x82000000 [ 0x000000 - 0x366af8 ] +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe3000, end 8fffff0e ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (xiachunjiang@ecarx-5288-V3) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #4 SMP PREEMPT Thu Apr 9 11:27:14 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9E000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@A1000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@A3000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0xb7c00000 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef631000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 251712 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 vram=16M root=PARTUUID=4497b904-02 rw rootwait ip=none mem=1024M cma=128M +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +em) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e500c (9077 kB) +[ 0.000000] .init : 0xc08e6000 - 0xc093a000 ( 336 kB) +[ 0.000000] .data : 0xc093a000 - 0xc0989e60 ( 320 kB) +[ 0.000000] .bss : 0xc098b000 - 0xc09d2980 ( 287 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000015] Switching to timer-based delay loop, resolution 162ns +[ 0.000328] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000336] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000779] Console: colour dummy device 80x30 +[ 0.000803] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000817] pid_max: default: 32768 minimum: 301 +[ 0.000911] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000921] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001494] Initializing cgroup subsys io + +[END] 2020/4/9 18:19:30 + 2046.boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/8 18:01:47 + +U-Boot SPL 2019.01-00014-gf454ae0-dirty (Apr 08 2020 - 02:55:34 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + MMC_RSP_R1,5,6,7 0x000001AA +11111111111111111111111 err = 0! +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 + MMC_RSP_R3,4 0xC0FF8000 +2222222222222222222222222 err = 0! +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:7 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x80FFFFF1 + MMC_RSP_R1,5,6,7 0x00000900 +Loading Environment from MMC... CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +OK +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000290C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290F + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290F + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002910 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002D7E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000082C + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002D7E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002E8C + MMC_RSP_R1,5,6,7 0x00000900 + + +U-Boot 2019.01-00014-gf454ae0-dirty (Apr 08 2020 - 02:55:34 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001300 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00001400 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +OK +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 0 +## Error: "board_findfdt" not defined +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + RET -110 +333333333333333333333333333333 err = -110! +Card did not respond to voltage select! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000000 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc1(part 0) is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000800 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 1 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000010 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00001E3E + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000030 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +** Unable to read file boot.scr ** +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000030 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000025A2 + MMC_RSP_R1,5,6,7 0x00000900 +173 bytes read in 29 ms (4.9 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc1 ... +Trying to Boot Linux from eMMC ... +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +switch to partitions #0, OK +mmc1(part 0) is current device +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA + RET -110 +11111111111111111111111 err = -110! +CMD_SEND:55 + ARG 0x00000000 + RET -110 +2222222222222222222222222 err = -110! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +333333333333333333333333333333 err = 0! +CMD_SEND:0 + ARG 0x00000000 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90200 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:21 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:8 + ARG 0x00000000 + MMC_RSP_R1,5,6,7 0x00000900 +SD/MMC found on device 1 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A180 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0007A182 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A188 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007B0A0 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0008AE20 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0007A189 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A280 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A000 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A001 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A002 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0048A003 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A293 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x005ABFA0 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x005ADAD5 + MMC_RSP_R1,5,6,7 0x00000900 +3566424 bytes read in 145 ms (23.5 MiB/s) +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0047A285 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x005A9800 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 + MMC_RSP_R1b 0x00000900 +CMD_SEND:16 + ARG 0x00000200 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x005A98CF + MMC_RSP_R1,5,6,7 0x00000900 +106255 bytes read in 42 ms (2.4 MiB/s) +Booting from mmc1 ... +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe3000, end 8fffff0e ... OK + +Starting kernel ... + + +[END] 2020/4/8 18:02:08 + +Hi Terrence, I am disabling the UHS mode. Can you try the below diff in u-boot and compile the u-boot and try: diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 1c1f4fd46c..56b1c796b1 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -72,9 +72,6 @@ CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y I am also attaching the binaries for your reference. Please try them. I will try to get the MMC Trace log from the MMC expert. It will take some time. Also please share the code diff you are doing on top of default u-boot. It will help us analyse failures. Best Regards, Keerthyno-uhs.tar + +Hi Keerthy, According to your suggestion,try to disable the UHS mode.But it is not work, still boot from mmc1(emmc flash). Please find the log in the attachment. Also the code diff we are doing on top of default u-boot. log_for_ti.rar + +Add log can boot success from sd based on vsdk 03 08. But, it said boot from EMMC flash. 1732.boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/13 15:44:28 + +U-Boot SPL 2019.01-00016-g029bfa6-dirty (Apr 12 2020 - 23:49:09 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc.c,mmc_probe,2847 +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x0, cfg->host_caps:0x30000000 +omap_hsmmc_ofdata_to_platdata end,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +no pinctrl state for default mode +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x1, cfg->host_caps:0x700008e0 +omap_hsmmc_ofdata_to_platdata end,num:0x1, cfg->host_caps:0x700008fc +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x1, cfg->host_caps:0x7000083c +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8000 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:7 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x80FFFFF1 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +Loading Environment from MMC... drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:1,host_caps:0x7000083c! +mmc_get_op_cond, num:1,host_caps:0x7000083c! +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x00FF8080 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90100 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B70600 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x00001300 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x00001400 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +*** Warning - bad CRC, using default environment + +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290B +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000290B +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290E +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x0000290E +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000290F +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002D7C +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00000800 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x000027A2 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000820 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00000826 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002D7C +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x0000082C +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:18 + ARG 0x00002D7D +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +CMD_SEND:16 + ARG 0x00000200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:17 + ARG 0x00002E8A +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 + + +U-Boot 2019.01-00016-g029bfa6-dirty (Apr 12 2020 - 23:49:09 -0700) + +CPU : DRA752-GP ES2.0 +Model: TI DRA742 +Board: DRA74x EVM REV +DRAM: 1 GiB +NAND: 0 MiB +common/board_r.c,initr_mmc,407 +MMC: drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc.c,mmc_probe,2847 +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x0, cfg->host_caps:0x30000000 +omap_hsmmc_ofdata_to_platdata end,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x1, cfg->host_caps:0x700008e0 +omap_hsmmc_ofdata_to_platdata end,num:0x1, cfg->host_caps:0x700008fc +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x1, cfg->host_caps:0x7000083c +OMAP SD/MMC: 0, OMAP SD/MMC: 1 +Loading Environment from MMC... drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:1,host_caps:0x7000083c! +mmc_get_op_cond, num:1,host_caps:0x7000083c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90100 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B70600 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x00001300 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x00001400 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +*** Warning - bad CRC, using default environment + +Warning: fastboot.board_rev: unknown board revision +Net: Could not get PHY for ethernet@48484000: addr 2 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +.; fastboot 0; fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run envboot; run mmcboot;run emmc_linux_boot; run emmc_android_boot; " +Hit any key to stop autoboot: 0 +cmd_call, cmd=test 0 -eq 1 + cmd_call, cmd=test 0 -eq 1 + cmd_call, cmd=run findfdt + cmd_call, cmd=test dra7xx = omap5_uevm + cmd_call, cmd=test dra7xx = dra7xx + cmd_call, cmd=setenv fdtfile dra7-evm.dtb + cmd_call, cmd=test dra7xx = dra72x-revc + cmd_call, cmd=test dra7xx = dra72x + cmd_call, cmd=test dra7xx = dra71x + cmd_call, cmd=test dra7xx = dra71x + cmd_call, cmd=test dra7xx = dra76x_acd + cmd_call, cmd=test dra7xx = beagle_x15 + cmd_call, cmd=test dra7xx = beagle_x15_revb1 + cmd_call, cmd=test dra7xx = beagle_x15_revc + cmd_call, cmd=test dra7xx = am572x_idk + cmd_call, cmd=test dra7xx = am572x_idk + cmd_call, cmd=test dra7xx = am572x_idk + cmd_call, cmd=test dra7xx = am574x_idk + cmd_call, cmd=test dra7xx = am574x_idk + cmd_call, cmd=test dra7xx = am57xx_evm + cmd_call, cmd=test dra7xx = am57xx_evm_reva3 + cmd_call, cmd=test dra7xx = am571x_idk + cmd_call, cmd=test dra7xx = am571x_idk + cmd_call, cmd=test dra7xx = am571x_idk + cmd_call, cmd=test dra7-evm.dtb = undefined + cmd_call, cmd=run envboot + cmd_call, cmd=mmc dev 0 + cmd/mmc.c,do_mmc_dev,475 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +Card did not respond to voltage select! +drivers/mmc/mmc.c,mmc_init,2811 +cmd_call, cmd=mmc rescan + drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +Card did not respond to voltage select! +drivers/mmc/mmc.c,mmc_init,2811 +cmd_call, cmd=run mmcboot + cmd_call, cmd=mmc dev 0 + cmd/mmc.c,do_mmc_dev,475 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +Card did not respond to voltage select! +drivers/mmc/mmc.c,mmc_init,2811 +cmd_call, cmd=setenv devnum 0 + cmd_call, cmd=setenv devtype mmc + cmd_call, cmd=mmc rescan + drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=0: mmc@4809c000.blk, 6, 0 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +Card did not respond to voltage select! +drivers/mmc/mmc.c,mmc_init,2811 +cmd_call, cmd=run emmc_linux_boot + cmd_call, cmd=echo Trying to boot Linux from eMMC ... + Trying to boot Linux from eMMC ... +cmd_call, cmd=setenv mmcdev 1 + cmd_call, cmd=setenv bootpart 1:2 + cmd_call, cmd=setenv mmcroot /dev/mmcblk0p2 rw + cmd_call, cmd=run mmcboot + cmd_call, cmd=mmc dev 1 + cmd/mmc.c,do_mmc_dev,475 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:1,host_caps:0x7000083c! +mmc_get_op_cond, num:1,host_caps:0x7000083c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90100 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B70600 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +switch to partitions #0, OK +mmc1(part 0) is current device +cmd_call, cmd=setenv devnum 1 + cmd_call, cmd=setenv devtype mmc + cmd_call, cmd=mmc rescan + drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +cmd/mmc.c,init_mmc_device,104 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:1,host_caps:0x7000083c! +mmc_get_op_cond, num:1,host_caps:0x7000083c! +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:4 +drivers/mmc/mmc.c,mmc_set_signal_voltage,1619, signal_voltage:2 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90100 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B70600 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +cmd_call, cmd=echo SD/MMC found on device 1 + SD/MMC found on device 1 +cmd_call, cmd=run loadimage + cmd_call, cmd=load mmc 1:2 0x82000000 /boot/zImage + blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0007A180 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x0007A182 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0007A188 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0007B0A0 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0008AE20 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0007A189 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0047A280 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0048A000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0048A001 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0048A002 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0048A003 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0047A293 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x005ABFA0 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x005ADAD5 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +3566424 bytes read in 313 ms (10.9 MiB/s) +cmd_call, cmd=test 0 -eq 1 + cmd_call, cmd=run mmcloados + cmd_call, cmd=run args_mmc + cmd_call, cmd=run finduuid + cmd_call, cmd=part uuid mmc 1:2 uuid + cmd_call, cmd=setenv bootargs console=ttyS0,115200n8 root=PARTUUID=00000000-02 rw rootfstype=ext4 rootwait + cmd_call, cmd=test try = yes + cmd_call, cmd=test try = try + cmd_call, cmd=run loadfdt + cmd_call, cmd=load mmc 1:2 0x88000000 /boot/dra7-evm.dtb + blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0047A287 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x0047A289 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:18 + ARG 0x005A9CE8 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:12 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x005A9DBB +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +108307 bytes read in 115 ms (918.9 KiB/s) +cmd_call, cmd=bootz 0x82000000 - 0x88000000 + ## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe2000, end 8ffff712 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (xiachunjiang@ecarx-5288-V3) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #2 SMP PREEMPT Wed Jan 8 10:45:58 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created CMA memory pool at 0x95800000, size 56 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 64 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9d000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x9f000000, size 8 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 24 MiB at 0xbe000000 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 11 pages/cpu @ef637000 s14912 r8192 d21952 u45056 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 258624 +[ 0.000000] Kernel command line: console=ttyS0,115200n8 root=PARTUUID=00000000-02 rw rootfstype=ext4 rootwait +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +m) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc08e500c (9077 kB) +[ 0.000000] .init : 0xc08e6000 - 0xc093a000 ( 336 kB) +[ 0.000000] .data : 0xc093a000 - 0xc0989e60 ( 320 kB) +[ 0.000000] .bss : 0xc098b000 - 0xc09d2980 ( 287 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000334] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000342] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000794] Console: colour dummy device 80x30 +[ 0.000818] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000831] pid_max: default: 32768 minimum: 301 +[ 0.000926] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000937] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001509] Initializing cgroup subsys io +[ 0.001526] Initializing cgroup subsys memory +[ 0.001552] Initializing cgroup subsys devices +[ 0.001565] Initializing cgroup subsys freezer +[ 0.001576] Initializing cgroup subsys perf_event +[ 0.001587] Initializing cgroup subsys pids +[ 0.001615] CPU: Testing write buffer coherency: ok +[ 0.001838] /cpus/cpu@0 missing clock-frequency property +[ 0.001854] /cpus/cpu@1 missing clock-frequency property +[ 0.001864] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001905] Setting up static identity map for 0x80008340 - 0x800083a0 +[ 0.080108] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080176] Brought up 2 CPUs +[ 0.080188] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080195] CPU: All CPU(s) started in HYP mode. +[ 0.080200] CPU: Virtualization extensions available. +[ 0.081251] devtmpfs: initialized +[ 0.110333] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.111306] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.319260] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.319282] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.323224] pinctrl core: initialized pinctrl subsystem +[ 0.324104] NET: Registered protocol family 16 +[ 0.325036] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350216] cpuidle: using governor ladder +[ 0.380239] cpuidle: using governor menu +[ 0.389179] OMAP GPIO hardware version 0.1 +[ 0.393441] GPIO line 161 (radio_rst) hogged as output/low +[ 0.395857] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.413818] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.413831] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.426137] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.426148] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.426627] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.426637] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.427133] OMAP DMA hardware revision 0.0 +[ 0.471681] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.472913] edma 43300000.edma: memcpy is disabled +[ 0.477678] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.482294] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.482470] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.482630] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.482785] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.483085] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.483276] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.486524] palmas 0-0058: IRQ missing: skipping irq request +[ 0.500707] palmas 0-0058: Muxing GPIO 51, PWM 0, LED 2 +[ 0.562680] pcf857x: probe of 0-0020 failed with error -121 +[ 0.562938] pcf857x: probe of 0-0021 failed with error -121 +[ 0.563103] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.580633] pcf857x: probe of 1-0026 failed with error -121 +[ 0.581245] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz +[ 0.581623] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 2.602319] omap_i2c 4807a000.i2c: controller timed out +[ 2.622346] pcf857x: probe of 3-0021 failed with error -110 +[ 2.622383] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz +[ 2.622606] media: Linux media interface: v0.10 +[ 2.622664] Linux video capture interface: v2.00 +[ 2.622705] pps_core: LinuxPPS API ver. 1 registered +[ 2.622712] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 2.622737] PTP clock support registered +[ 2.622785] EDAC MC: Ver: 3.0.0 +[ 2.623572] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 2.623868] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 2.624226] Advanced Linux Sound Architecture Driver Initialized. +[ 2.625046] clocksource: Switched to clocksource arch_sys_counter +[ 2.635443] NET: Registered protocol family 2 +[ 2.635934] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 2.635998] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 2.636122] TCP: Hash tables configured (established 8192 bind 8192) +[ 2.636178] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 2.636209] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 2.636420] NET: Registered protocol family 1 +[ 2.636695] RPC: Registered named UNIX socket transport module. +[ 2.636704] RPC: Registered udp transport module. +[ 2.636710] RPC: Registered tcp transport module. +[ 2.636716] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 2.637751] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 2.646770] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 2.647402] NFS: Registering the id_resolver key type +[ 2.647429] Key type id_resolver registered +[ 2.647436] Key type id_legacy registered +[ 2.647493] ntfs: driver 2.1.32 [Flags: R/O]. +[ 2.648778] bounce: pool size: 64 pages +[ 2.648926] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 2.648941] io scheduler noop registered +[ 2.648954] io scheduler deadline registered +[ 2.648986] io scheduler cfq registered (default) +[ 2.653981] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 2.657355] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: +[ 2.657368] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] +[ 2.657402] IO 0x20003000..0x20012fff -> 0x00000000 +[ 2.657423] MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 2.687512] dra7-pcie 51000000.pcie_rc: link is not up +[ 2.687685] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 +[ 2.687698] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 2.687708] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 2.687718] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 2.688120] PCI: bus0: Fast back to back transfers disabled +[ 2.688234] PCI: bus1: Fast back to back transfers enabled +[ 2.688316] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] +[ 2.688331] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] +[ 2.688344] pci 0000:00:00.0: PCI bridge to [bus 01] +[ 2.688560] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt +[ 2.748838] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 2.752275] console [ttyS0] disabled +[ 2.752331] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 301, base_baud = 3000000) is a 8250 +[ 3.721051] console [ttyS0] enabled +[ 3.725459] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 302, base_baud = 3000000) is a 8250 +[ 3.735160] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 303, base_baud = 3000000) is a 8250 +[ 3.745304] [drm] Initialized drm 1.1.0 20060810 +[ 3.752237] OMAP DSS rev 6.1 +[ 3.756026] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 3.764465] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 3.773634] dra7evm-tpd12s015 encoder@1: failed to parse CT CP HPD gpio +[ 3.780720] connector-hdmi connector@1: failed to find video source +[ 3.793406] loop: module loaded +[ 3.797047] vmemexp device MAJOR num = 245 +[ 3.801175] vmemexp class registered +[ 3.804890] /dev/vmemexp device registered +[ 3.809022] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 3.814709] nand: No NAND device found +[ 3.818496] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch +[ 3.828391] m25p80 spi32766.0: unrecognized JEDEC id bytes: 00, 0, 0 +[ 3.836088] libphy: Fixed MDIO Bus: probed +[ 3.885077] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 3.891201] davinci_mdio 48485000.mdio: detected phy mask fffffffc +[ 3.901490] libphy: 48485000.mdio: probed +[ 3.905562] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver RTL9000A Gigabit Ethernet +[ 3.915208] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver RTL9000A Gigabit Ethernet +[ 3.925529] cpsw 48484000.ethernet: Detected MACID = 4c:3f:d3:54:b5:32 +[ 3.932170] cpsw 48484000.ethernet: cpts: overflow check period 800 +[ 3.939167] cpsw 48484000.ethernet: cpsw: Detected MACID = 4c:3f:d3:54:b5:33 +[ 3.946849] PPP generic driver version 2.4.2 +[ 3.952368] mousedev: PS/2 mouse device common for all mice +[ 3.958685] i2c /dev entries driver +[ 3.962840] tvp5158 1-0058: Unable to of_probe +[ 3.968235] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 3.975307] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 3.985236] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 3.991821] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 3.996493] vip 48970000.vip: VPDMA firmware loaded +[ 4.002626] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode +[ 4.009050] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode +[ 4.015606] evm_3v3_sw: supplied by sysen1 +[ 4.020244] omap_hsmmc: probe of 480b4000.mmc failed with error -1 +[ 4.149145] ledtrig-cpu: registered to indicate activity on CPUs +[ 4.161890] hwspinlock_user gatemp: requested 20 hwspinlocks +[ 4.168769] evm_3v3_sw: supplied by sysen1 +[ 4.173290] tlv320aic3x-codec 0-0019: Failed to get supply 'IOVDD': -1 +[ 4.179886] tlv320aic3x-codec 0-0019: Failed to request supplies: -1 +[ 4.186386] tlv320aic3x-codec: probe of 0-0019 failed with error -1 +[ 4.192897] evm_3v3_sw: supplied by sysen1 +[ 4.197450] tlv320aic3x-codec 1-0018: Failed to get supply 'IOVDD': -1 +[ 4.204007] tlv320aic3x-codec 1-0018: Failed to request supplies: -1 +[ 4.210509] tlv320aic3x-codec: probe of 1-0018 failed with error -1 +[ 4.217064] evm_3v3_sw: supplied by sysen1 +[ 4.221571] tlv320aic3x-codec 1-0019: Failed to get supply 'IOVDD': -1 +[ 4.228171] tlv320aic3x-codec 1-0019: Failed to request supplies: -1 +[ 4.234633] tlv320aic3x-codec: probe of 1-0019 failed with error -1 +[ 4.241181] evm_3v3_sw: supplied by sysen1 +[ 4.245728] tlv320aic3x-codec 1-001a: Failed to get supply 'IOVDD': -1 +[ 4.252284] tlv320aic3x-codec 1-001a: Failed to request supplies: -1 +[ 4.258826] tlv320aic3x-codec: probe of 1-001a failed with error -1 +[ 4.266207] davinci-mcasp 48464000.mcasp: DAI is shared +[ 4.272278] davinci-mcasp 48474000.mcasp: DAI is shared +[ 4.277793] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 4.284778] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 4.295578] NET: Registered protocol family 10 +[ 4.310875] sit: IPv6 over IPv4 tunneling driver +[ 4.316067] NET: Registered protocol family 17 +[ 4.320772] Key type dns_resolver registered +[ 4.325185] omap_voltage_late_init: Voltage driver support not added +[ 4.332076] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 4.338305] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 4.344994] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 4.351228] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 4.357915] smps123: ramp_delay not set +[ 4.362385] Power Management for TI OMAP4+ devices. +[ 4.367510] Registering SWP/SWPB emulation handler +[ 4.373632] dmm 4e000000.dmm: workaround for errata i878 in use +[ 4.381191] dmm 4e000000.dmm: initialized all PAT entries +[ 4.387727] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 4.394377] dra7evm-tpd12s015 encoder@1: failed to parse CT CP HPD gpio +[ 4.401314] connector-hdmi connector@1: failed to find video source +[ 4.407834] tvp5158 1-0058: Unable to of_probe +[ 4.413063] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 4.419832] hctosys: unable to open rtc device (rtc0) +[ 4.436853] evm_1v8: disabling +[ 4.439928] evm_3v3_sw: disabling +[ 4.443256] aic_dvdd: disabling +[ 4.446432] vmmcwl_fixed: disabling +[ 4.450143] pbias_mmc_omap5: disabling +[ 4.454115] ALSA device list: +[ 4.457115] #1: HDMI 58040000.encoder +[ 4.461849] Waiting for root device PARTUUID=00000000-02... + +[END] 2020/4/13 15:44:54 + +On the other hand, we format the emmc flash，and try again. Please find the log in the attachment. Could you help us to have a look? Terence Thanks 4846.boot_fail_from_sd_vsdk0308.log [BEGIN] 2020/4/13 16:09:10 +=> +U-Boot SPL 2019.01-00016-g029bfa6-dirty (Apr 12 2020 - 23:49:09 -0700) +DRA752-GP ES2.0 +Trying to boot from MMC1 +drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc.c,mmc_probe,2847 +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x0, cfg->host_caps:0x30000000 +omap_hsmmc_ofdata_to_platdata end,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +no pinctrl state for default mode +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x0, cfg->host_caps:0x3000001c +drivers/mmc/mmc-uclass.c,mmc_of_parse,111 +omap_hsmmc_ofdata_to_platdata,num:0x1, cfg->host_caps:0x700008e0 +omap_hsmmc_ofdata_to_platdata end,num:0x1, cfg->host_caps:0x700008fc +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,1972 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_probe,2014,num:0x1, cfg->host_caps:0x7000083c +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:0,host_caps:0x3000001c! +mmc_get_op_cond, num:0,host_caps:0x3000001c! +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x000001AA +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8000 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000120 +CMD_SEND:41 + ARG 0x40300000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8000 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x03534453 + 0x43363447 + 0x802CEF00 + 0x9E012A39 + + DUMPING DATA + 000 - 03 53 44 53 + 004 - 43 36 34 47 + 008 - 80 2C EF 00 + 012 - 9E 01 2A 39 +CMD_SEND:3 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0xAAAA0520 +CMD_SEND:9 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x400E0032 + 0x5B590001 + 0xDBD37F80 + 0x0A4040DF + + DUMPING DATA + 000 - 40 0E 00 32 + 004 - 5B 59 00 01 + 008 - DB D3 7F 80 + 012 - 0A 40 40 DF +CMD_SEND:7 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:55 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:51 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00FFFFF1 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:55 + ARG 0xAAAA0000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x00000002 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000920 +CMD_SEND:6 + ARG 0x80FFFFF1 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +Loading Environment from MMC... drivers/mmc/mmc.c,mmc_initialize,2886 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +drivers/mmc/mmc.c,mmc_init,2806 +drivers/mmc/mmc.c,mmc_start_init,2740 +mmc_start_init, num:1,host_caps:0x7000083c! +mmc_get_op_cond, num:1,host_caps:0x7000083c! +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:8 + ARG 0x000001AA +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:55 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1153 + RET -110 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x00FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x00FF8080 +drivers/mmc/mmc.c,mmc_init,2811 +CMD_SEND:0 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_NONE +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0x40FF8080 +CMD_SEND:1 + ARG 0x40300080 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R3,4 0xC0FF8080 +CMD_SEND:2 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0x45010044 + 0x47343030 + 0x38011D13 + 0x3F0AC5CB + + DUMPING DATA + 000 - 45 01 00 44 + 004 - 47 34 30 30 + 008 - 38 01 1D 13 + 012 - 3F 0A C5 CB +CMD_SEND:3 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000500 +CMD_SEND:9 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R2 0xD00F0032 + 0x8F5903FF + 0xFFFFFFEF + 0x8A404023 + + DUMPING DATA + 000 - D0 0F 00 32 + 004 - 8F 59 03 FF + 008 - FF FF FF EF + 012 - 8A 40 40 23 +CMD_SEND:7 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000700 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CMD_SEND:6 + ARG 0x03B70200 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B90100 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:6 + ARG 0x03B70600 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1b 0x00000800 +CMD_SEND:13 + ARG 0x00010000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +CURR STATE:4 +CMD_SEND:8 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 + ARG 0x00000000 +drivers/mmc/omap_hsmmc.c,omap_hsmmc_send_cmd,1043 + MMC_RSP_R1,5,6,7 0x00000900 +drivers/mmc/mmc-uclass.c,find_mmc_device,178 +blk_find_device: if_type=6, devnum=1: mmc@4809c000.blk, 6, 0 +blk_find_device: if_type=6, devnum=1: mmc@480b4000.blk, 6, 1 +CMD_SEND:17 \ No newline at end of file diff --git a/data2/text/range/30001+/895499.txt b/data2/text/range/30001+/895499.txt new file mode 100644 index 0000000000000000000000000000000000000000..2cf64c545dbfbded5e008dcec24120ee88c8bb14 --- /dev/null +++ b/data2/text/range/30001+/895499.txt @@ -0,0 +1,642 @@ +Ticket Name: TDA2EXEVM: Creating Custom Use Case on TDA2 EVM + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, I am beginning to create a custom use case on TDA2 EVM that eventually will be using along with our own radar antenna board. But for now, I am running it against the 4 cascade 1243 chipset RF board that comes with the bundle. The current use case processing chain is quite simple just to get started. It utilizes the 4 EVEs to perform 2D FFT processing on the 16 ADC channels from the cascade radar which IPU1_0 manages its input/output data. Following 2D FFT is PkDetection which also runs on 1 of the 4 EVEs and DSP1 manages its input/output data. That's all I am trying to do at the moment to get working. Once this is working, more follow on processing will be added. I am currently stuck and need some pointers from the expert to get me moving. Please take a look at the attached boot up log file for more details. Bottom line PkDetect Link failed at line below: status = AlgorithmFxn_RadarPkDetectDoWorkProcess(pObj); Any pointer to get me pass the problem is greatly appreciate it. Thanks, --Khai TDA2-MWDSP-BootLog.txt TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 124307 (10.60 ms) + SOC Init Cycles - 170829 (14.57 ms) + DDR Config Clock Cycles - 58610 (5.0 ms) + App Image Load Cycles - 10561749 (901.26 ms) + Slave Core Bootup Cycles - 208531 (17.79 ms) + SBL Boot-up Cycles - 11125084 (949.34 ms) + Time at which SBL started IPU1_0 - 41704 (1272.70 ms) +***************************************************************** + + Putting MPU in Retention... +[IPU1-0] 1.277496 s: ***** IPU1_0 Firmware build time 19:26:55 Apr 7 2020 +[IPU1-0] 1.277770 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 1.279570 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 1.290520 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 1.290642 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-0] 1.291160 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[IPU1-0] 1.291313 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-0] 1.291435 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[IPU1-0] 1.291526 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-0] 1.291618 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-0] 1.291709 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-0] 1.291801 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-0] 1.291892 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-0] 1.291953 s: SYSTEM: Notify init done !!! +[IPU1-0] 1.293753 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 1.294576 s: SYSTEM: Work Queue init done !!! +[IPU1-0] 1.294668 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 1.299518 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 1.299609 s: SYSTEM: System Init in progress !!! +[IPU1-0] 1.299701 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 1.299762 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 1.299823 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 1.300006 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 1.300067 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 1.300280 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 1.300372 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 1.300463 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 1.303910 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 1.304032 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 1.304123 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 1.304276 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 1.304367 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 1.304459 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 1.304825 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 1.304947 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 1.305038 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 1.305130 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 1.305252 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 1.305343 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 1.305709 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 1.305831 s: VPDMA Firmware Address = 0x9fc8a500 +[IPU1-0] 1.305892 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 1.306014 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 1.306106 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 1.306167 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 1.362624 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 1.364484 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 1.364698 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 1.364789 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261576 B (255 KB) +[IPU1-0] 1.364972 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 1.365125 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 1.365369 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 1.365521 s: SYSTEM: Initializing Links !!! +[IPU1-0] 1.558775 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 1.644146 s: BOARD: Board Init in progress !!! +[IPU1-0] 1.644817 s: BOARD: Board Init Done !!! +[IPU1-0] 1.657475 s: EEPROM Base Board Name: [DRA74CAS] +[IPU1-0] 1.657872 s: +[IPU1-0] 1.657902 s: Vision SDK Version : [REL_VISION_SDK_03_08_00_00] +[IPU1-0] 1.657994 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 1.658055 s: BSP Version : [PDK_01_10_04__xx] +[IPU1-0] 1.658146 s: Platform : [EVM] +[IPU1-0] 1.658207 s: SOC : [TDA2XX] +[IPU1-0] 1.658299 s: SOC Revision : [ES2.0] +[IPU1-0] 1.658390 s: Board Detected : [TDA2XX CASCADE RADAR] +[IPU1-0] 1.658451 s: Base Board Revision : [REV E] +[IPU1-0] 1.658543 s: Daughter Card Revision: [REV A] +[IPU1-0] 1.658604 s: +[IPU1-1] 1.280119 s: ***** IPU1_1 Firmware build time 19:25:57 Apr 7 2020 +[IPU1-1] 1.280363 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 1.284450 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 1.327792 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 1.328158 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 1.328310 s: SYSTEM: IPCLIB init in progress !!! +[IPU1-1] 1.328859 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[IPU1-1] 1.329012 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[IPU1-1] 1.329134 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[IPU1-1] 1.329286 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[IPU1-1] 1.329439 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[IPU1-1] 1.329530 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[IPU1-1] 1.329652 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[IPU1-1] 1.329774 s: SYSTEM: IPCLIB init DONE !!! +[IPU1-1] 1.329866 s: SYSTEM: Notify init done !!! +[IPU1-1] 1.331757 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 1.332641 s: SYSTEM: Work Queue init done !!! +[IPU1-1] 1.332733 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 1.337979 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 1.338101 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 1.338162 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 1.338345 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 637880 B (622 KB) +[IPU1-1] 1.338559 s: SYSTEM: Initializing Links !!! +[IPU1-1] 1.463490 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 1.467516 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 1.471603 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 1.475538 s: UTILS: PRF: ##### Cannot allocate Object for TFDTPRX #### +[IPU1-1] 1.479655 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 1.484170 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 1.488104 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 1.492496 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 1.497132 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 1.501799 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 1.506374 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 1.510827 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 1.510980 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 1.512169 s: SYSTEM: System IPU1_1 Init Done !!! +[DSP1 ] 1.275910 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 1.275940 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 1.276825 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 1.276855 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 1.276916 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 524128 B (511 KB) +[DSP1 ] 1.276947 s: SYSTEM: Initializing Links !!! +[DSP1 ] 1.292624 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 1.292655 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 1.570090 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 1.570151 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 1.275940 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 1.275971 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 1.276825 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 1.276855 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 1.276916 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 524128 B (511 KB) +[DSP2 ] 1.276947 s: SYSTEM: Initializing Links !!! +[DSP2 ] 1.292624 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 1.292655 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 1.572103 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 1.572134 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 1.289696 s: ***** EVE Firmware build time 19:21:45 Apr 7 2020 +[EVE1 ] 1.291587 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 1.294119 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 1.295430 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 1.296407 s: SYSTEM: IPCLIB init in progress !!! +[EVE1 ] 1.299518 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE1 ] 1.300799 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE1 ] 1.302019 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE1 ] 1.303208 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[EVE1 ] 1.304428 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE1 ] 1.305618 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE1 ] 1.306807 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE1 ] 1.307997 s: SYSTEM: IPCLIB init DONE !!! +[EVE1 ] 1.308942 s: SYSTEM: Notify init done !!! +[EVE1 ] 1.310711 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 1.312206 s: SYSTEM: Work Queue init done !!! +[EVE1 ] 1.313151 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 1.330842 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 1.331818 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 1.345055 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 1.346184 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 1.347434 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 1.349722 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE1 ] 1.351918 s: SYSTEM: Initializing Links !!! +[EVE1 ] 1.549594 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 1.550539 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 1.293143 s: ***** EVE Firmware build time 19:22:16 Apr 7 2020 +[EVE2 ] 1.295095 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 1.297596 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 1.298908 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 1.299914 s: SYSTEM: IPCLIB init in progress !!! +[EVE2 ] 1.302934 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE2 ] 1.304245 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE2 ] 1.305465 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE2 ] 1.306655 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[EVE2 ] 1.307844 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE2 ] 1.309034 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE2 ] 1.310254 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE2 ] 1.311474 s: SYSTEM: IPCLIB init DONE !!! +[EVE2 ] 1.312419 s: SYSTEM: Notify init done !!! +[EVE2 ] 1.314280 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 1.315744 s: SYSTEM: Work Queue init done !!! +[EVE2 ] 1.316690 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 1.334411 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 1.335387 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 1.348380 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 1.349508 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 1.350789 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 1.353108 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE2 ] 1.355426 s: SYSTEM: Initializing Links !!! +[EVE2 ] 1.553040 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 1.553986 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 1.296315 s: ***** EVE Firmware build time 19:22:45 Apr 7 2020 +[EVE3 ] 1.298237 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 1.300738 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 1.302049 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 1.302995 s: SYSTEM: IPCLIB init in progress !!! +[EVE3 ] 1.305984 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE3 ] 1.307173 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE3 ] 1.308393 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE3 ] 1.309583 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[EVE3 ] 1.310864 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE3 ] 1.312023 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE3 ] 1.313212 s: SYSTEM: IPCLIB: register to [EVE4] event 15... +[EVE3 ] 1.314554 s: SYSTEM: IPCLIB init DONE !!! +[EVE3 ] 1.315470 s: SYSTEM: Notify init done !!! +[EVE3 ] 1.317239 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 1.318703 s: SYSTEM: Work Queue init done !!! +[EVE3 ] 1.319648 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 1.337278 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 1.338254 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 1.351033 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 1.352193 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 1.353443 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 1.355914 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE3 ] 1.358171 s: SYSTEM: Initializing Links !!! +[EVE3 ] 1.555023 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 1.555969 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 1.299701 s: ***** EVE Firmware build time 19:23:15 Apr 7 2020 +[EVE4 ] 1.301653 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 1.304062 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 1.305374 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 1.306319 s: SYSTEM: IPCLIB init in progress !!! +[EVE4 ] 1.309278 s: SYSTEM: IPCLIB: register to [IPU1-0] event 15... +[EVE4 ] 1.310559 s: SYSTEM: IPCLIB: register to [IPU1-1] event 15... +[EVE4 ] 1.311779 s: SYSTEM: IPCLIB: register to [DSP1] event 15... +[EVE4 ] 1.312938 s: SYSTEM: IPCLIB: register to [DSP2] event 15... +[EVE4 ] 1.314341 s: SYSTEM: IPCLIB: register to [EVE1] event 15... +[EVE4 ] 1.315500 s: SYSTEM: IPCLIB: register to [EVE2] event 15... +[EVE4 ] 1.316690 s: SYSTEM: IPCLIB: register to [EVE3] event 15... +[EVE4 ] 1.317910 s: SYSTEM: IPCLIB init DONE !!! +[EVE4 ] 1.318794 s: SYSTEM: Notify init done !!! +[EVE4 ] 1.320624 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 1.322058 s: SYSTEM: Work Queue init done !!! +[EVE4 ] 1.323003 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 1.340480 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 1.341426 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 1.354206 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 1.355395 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 1.356676 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 1.359055 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261952 B (255 KB) +[EVE4 ] 1.361282 s: SYSTEM: Initializing Links !!! +[EVE4 ] 1.557677 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 1.558622 s: SYSTEM: System EVE Init Done !!! +[IPU1-0] 2.662081 s: QSPI Init Started +[IPU1-0] 2.662508 s: MID - 20 +[IPU1-0] 2.662599 s: DID - 21 +[IPU1-0] 2.662630 s: QSPI Init Completed Sucessfully +[IPU1-0] 2.670042 s: +[IPU1-0] 2.670133 s: Current System Settings, +[IPU1-0] 2.670194 s: ======================== +[IPU1-0] 2.670255 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 2.670347 s: My IP address for interface 1 : 192.168.1.101 +[IPU1-0] 2.670438 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 2.670499 s: +[IPU1-0] 2.670530 s: ============ +[IPU1-0] 2.670591 s: Usecase Menu +[IPU1-0] 2.670621 s: ============ +[IPU1-0] 2.670682 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 3.066217 s: +[IPU1-0] 3.066918 s: +[IPU1-0] 3.066979 s: Current System Settings, +[IPU1-0] 3.067040 s: ======================== +[IPU1-0] 3.067101 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 3.067162 s: My IP address for interface 1 : 192.168.1.101 +[IPU1-0] 3.067223 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 3.067345 s: +[IPU1-0] 3.067376 s: ============ +[IPU1-0] 3.067437 s: Usecase Menu +[IPU1-0] 3.067467 s: ============ +[IPU1-0] 3.067528 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] +[IPU1-0] 1: RADAR Usecases +[IPU1-0] 2: MISC Tests +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 3.683584 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[IPU1-0] 4.481119 s: +[IPU1-0] 4.481272 s: +[IPU1-0] +[IPU1-0] RADAR Usecases +[IPU1-0] --------------- +[IPU1-0] +[IPU1-0] 9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only) +[IPU1-0] a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP) + NetworkTx (TDA2xx Only) +[IPU1-0] c: Metawave's Hybrid Analog Steering + Digital BeamForming + NetworkTx (TDA2xx Only) +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 5.177026 s: +[IPU1-0] 5.177240 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ... +[IPU1-1] 6.511376 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[IPU1-1] 6.511712 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-1] 6.583968 s: NDK: Link Status: 1000Mb/s Full Duplex on PHY 2 +[IPU1-0] 6.777374 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done... +[IPU1-0] 6.777618 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 6.802568 s: !!!No Valid Configuration file is found. Use Default Configurations!!! +[IPU1-0] 6.802690 s: CHAINS: Init AR12xx ... +[IPU1-0] 6.802964 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 6.803361 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 6.803910 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 6.804123 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! +[IPU1-0] 7.030500 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 7.030622 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 7.180991 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 7.213139 s: AR12XX: ES3.0 Device detected!! +[IPU1-0] 7.830933 s: AR12XX: Firmware Download Started : Ftype: META_IMAGE +[IPU1-0] 8.271182 s: AR12XX: Firmware Download Successful : Ftype: META_IMAGE +[IPU1-0] 8.308912 s: AWR12XX: Version Master : 1.10.0.20 +[IPU1-0] 8.309064 s: AWR12XX: Version RF:2.0.0.1 +[IPU1-0] 8.309156 s: AWR12XX: Version mmWaveLink:1.2.0.0 +[IPU1-0] 8.309247 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 8.309369 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 +[IPU1-0] 8.311657 s: CHAINS: Config AR12xx ... +[IPU1-0] 8.311748 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 1 +[IPU1-0] 8.311840 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 2 +[IPU1-0] 8.311962 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 3 +[IPU1-0] 8.312053 s: CHAINS: Configuring the parameters for Normal Frame for Radar Number 4 +[IPU1-0] 8.400262 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 8.400353 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 8.496675 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 8.496766 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 8.593332 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 8.593729 s: AWR12XX: RF Boot Time = 10281 us +[IPU1-0] 8.689471 s: AWR12XX: RF Boot Status = 0x71bfffb +[IPU1-0] 8.689562 s: AWR12XX: RF Boot Time = 10347 us +[IPU1-0] 8.697889 s: retVal: 0 +[IPU1-0] 8.698194 s: CHAINS: Init AR12xx ... DONE !!! +[IPU1-0] 8.698377 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 8.703837 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 8.705941 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 8.707985 s: Parsing radar_test_vector/sensor_master_config.txt +[IPU1-0] 8.710181 s: Chains: NetworkTx Link +[IPU1-0] 8.710272 s: +[IPU1-0] +[IPU1-0] Select Network Mode, +[IPU1-0] -------------------- +[IPU1-0] 1: TFDTP +[IPU1-0] 2: TCP/IP +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 8.710516 s: Chains: Using TFDTP. Ensure using –-usetfdtp with network tools.. +[IPU1-0] 8.710669 s: CAPTURE: Create in progress !!! +[IPU1-0] 8.710943 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 8.757304 s: CAPTURE: VIP1 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 8.803727 s: CAPTURE: VIP2 Slice0 PortA capture mode is [16-bit] !!! +[IPU1-0] 8.850057 s: CAPTURE: VIP2 Slice1 PortA capture mode is [16-bit] !!! +[IPU1-0] 8.896571 s: CAPTURE: Create Done !!! +[IPU1-0] 8.897090 s: SELECT: OUT QUE0: OUT CH0: IN CH0: 2048 x 128, pitch = (4096, 0) +[IPU1-0] 8.897273 s: SELECT: OUT QUE1: OUT CH0: IN CH1: 2048 x 128, pitch = (4096, 0) +[IPU1-0] 8.897486 s: SELECT: OUT QUE2: OUT CH0: IN CH2: 2048 x 128, pitch = (4096, 0) +[IPU1-0] 8.897639 s: SELECT: OUT QUE3: OUT CH0: IN CH3: 2048 x 128, pitch = (4096, 0) +[IPU1-0] 8.897852 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 8.898249 s: AlgorithmLink_radarProcessCreate: ALG: ti.radar.fft +[IPU1-0] 8.898523 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 8.898645 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 8.898767 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 8.898920 s: AlgorithmFxn_RadarFftCreate() - radar[0] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 8.899042 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 8.899164 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 8.899286 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 8.899438 s: AlgorithmFxn_RadarFftCreate() - radar[1] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 8.899591 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 8.899682 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 8.899804 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 8.899957 s: AlgorithmFxn_RadarFftCreate() - radar[2] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 8.900079 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 8.900201 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 8.900323 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 8.900475 s: AlgorithmFxn_RadarFftCreate() - radar[3] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.137924 s: ALG: ti.radar.fft: CH0 BUF0: 0x8b40d000 ( 524288 B ) +[IPU1-0] 9.145915 s: ALG: ti.radar.fft: CH0 BUF1: 0x8b48d200 ( 524288 B ) +[IPU1-0] 9.154181 s: ALG: ti.radar.fft: CH0 BUF2: 0x8b50d400 ( 524288 B ) +[IPU1-0] 9.162416 s: ALG: ti.radar.fft: CH0 BUF3: 0x8b58d600 ( 524288 B ) +[IPU1-0] 9.162782 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 9.163240 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 9.163667 s: AlgorithmLink_radarProcessCreate: ALG: ti.radar.fft +[IPU1-0] 9.163880 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.164002 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.164124 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.164277 s: AlgorithmFxn_RadarFftCreate() - radar[0] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.164429 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.164582 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.164704 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.164856 s: AlgorithmFxn_RadarFftCreate() - radar[1] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.164978 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.165100 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.165222 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.165375 s: AlgorithmFxn_RadarFftCreate() - radar[2] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.165497 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.165619 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.165741 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.165893 s: AlgorithmFxn_RadarFftCreate() - radar[3] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.404074 s: ALG: ti.radar.fft: CH0 BUF0: 0x8b697800 ( 524288 B ) +[IPU1-0] 9.412310 s: ALG: ti.radar.fft: CH0 BUF1: 0x8b717a00 ( 524288 B ) +[IPU1-0] 9.420331 s: ALG: ti.radar.fft: CH0 BUF2: 0x8b797c00 ( 524288 B ) +[IPU1-0] 9.428628 s: ALG: ti.radar.fft: CH0 BUF3: 0x8b817e00 ( 524288 B ) +[IPU1-0] 9.428963 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 9.429421 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 9.429878 s: AlgorithmLink_radarProcessCreate: ALG: ti.radar.fft +[IPU1-0] 9.430061 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.430183 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.430336 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.430519 s: AlgorithmFxn_RadarFftCreate() - radar[0] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.430671 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.430793 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.430915 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.431037 s: AlgorithmFxn_RadarFftCreate() - radar[1] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.431190 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.431281 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.431403 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.431830 s: AlgorithmFxn_RadarFftCreate() - radar[2] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.431983 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.432074 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.432227 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.432349 s: AlgorithmFxn_RadarFftCreate() - radar[3] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.670408 s: ALG: ti.radar.fft: CH0 BUF0: 0x8b922000 ( 524288 B ) +[IPU1-0] 9.678704 s: ALG: ti.radar.fft: CH0 BUF1: 0x8b9a2200 ( 524288 B ) +[IPU1-0] 9.686939 s: ALG: ti.radar.fft: CH0 BUF2: 0x8ba22400 ( 524288 B ) +[IPU1-0] 9.694930 s: ALG: ti.radar.fft: CH0 BUF3: 0x8baa2600 ( 524288 B ) +[IPU1-0] 9.695235 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 9.695784 s: ALGORITHM: Create in progress (algId = 8) !!! +[IPU1-0] 9.696181 s: AlgorithmLink_radarProcessCreate: ALG: ti.radar.fft +[IPU1-0] 9.696394 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.696821 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.696974 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.697126 s: AlgorithmFxn_RadarFftCreate() - radar[0] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.697248 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.697370 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.697523 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.697645 s: AlgorithmFxn_RadarFftCreate() - radar[1] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.697797 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.697889 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.698011 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.698163 s: AlgorithmFxn_RadarFftCreate() - radar[2] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 9.698285 s: AlgorithmFxn_RadarFftCreate() - imgFrameWidth[1024] imgFrameHeight[128] +[IPU1-0] 9.698407 s: AlgorithmFxn_RadarFftCreate() - outputBufferpitch[4096] numBytesPerSample[4] +[IPU1-0] 9.698529 s: AlgorithmFxn_RadarFftCreate() - pOutChInfo->width[1024] pOutChInfo->height[128] pOutChInfo->pitch[4096] +[IPU1-0] 9.698682 s: AlgorithmFxn_RadarFftCreate() - radar[3] -> opParams->outputBufferSize[524288] metaBufSize[140] +[IPU1-0] 10.026352 s: ALG: ti.radar.fft: CH0 BUF0: 0x8bbac800 ( 524288 B ) +[IPU1-0] 10.034648 s: ALG: ti.radar.fft: CH0 BUF1: 0x8bc2ca00 ( 524288 B ) +[IPU1-0] 10.042884 s: ALG: ti.radar.fft: CH0 BUF2: 0x8bcacc00 ( 524288 B ) +[IPU1-0] 10.050905 s: ALG: ti.radar.fft: CH0 BUF3: 0x8bd2ce00 ( 524288 B ) +[IPU1-0] 10.051241 s: ALGORITHM: Create Done (algId = 8) !!! +[IPU1-0] 10.052735 s: IPC_OUT_0 : Create in progress !!! +[IPU1-0] 10.053162 s: IPC_OUT_0 : Create Done !!! +[IPU1-0] 10.086805 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-0] 10.086927 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 162616 B (158 KB) +[IPU1-0] 10.087110 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 10.087262 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 327264256 B (312 MB) +[IPU1-0] 10.087415 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0x00000000, Total size = 0 B (0 MB), Free size = 0 B (0 MB) +[IPU1-0] 10.113981 s: CAPTURE: Start in progress !!! +[IPU1-0] 10.121881 s: CAPTURE: Start Done !!! +[IPU1-0] 10.122277 s: CHAINS: AR12xx Starting Radar Sensor ... +[IPU1-0] 10.127249 s: CHAINS: AR12xx Starting Radar Sensor ... DONE !!! +[IPU1-0] 10.129659 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Chains Run-time Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 0: Stop Chain +[IPU1-0] +[IPU1-0] p: Print Performance Statistics +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-1] 10.084182 s: IPC_IN_0 : Create in progress !!! +[IPU1-1] 10.085280 s: IPC_IN_0 : Create Done !!! +[IPU1-1] 10.086164 s: NETWORK_TX: NETWORK_TX: Server listening (port=29172) !!! +[IPU1-1] 10.087811 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1-1] 10.087964 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 637592 B (622 KB) +[DSP1 ] 10.053406 s: IPC_IN_0 : Create in progress !!! +[DSP1 ] 10.053864 s: IPC_IN_0 : Create Done !!! +[DSP1 ] 10.054230 s: ALGORITHM: Create in progress (algId = 11) !!! +[DSP1 ] 10.054321 s: AlgorithmLink_radarProcessCreate: ALG: ti.radar.pkDetect +[DSP1 ] 10.076252 s: ALG: ti.radar.pkDetect: CH0 BUF0: 0x8c0b3800 ( 143368 B ) +[DSP1 ] 10.076709 s: ALG: ti.radar.pkDetect: CH0 BUF1: 0x8c0d6a00 ( 143368 B ) +[DSP1 ] 10.077228 s: ALG: ti.radar.pkDetect: CH0 BUF2: 0x8c0f9c00 ( 143368 B ) +[DSP1 ] 10.077807 s: ALG: ti.radar.pkDetect: CH0 BUF3: 0x8c11ce00 ( 143368 B ) +[DSP1 ] 10.078295 s: ALG: ti.radar.pkDetect: CH1 BUF0: 0x8c140000 ( 143368 B ) +[DSP1 ] 10.078783 s: ALG: ti.radar.pkDetect: CH1 BUF1: 0x8c163200 ( 143368 B ) +[DSP1 ] 10.079241 s: ALG: ti.radar.pkDetect: CH1 BUF2: 0x8c186400 ( 143368 B ) +[DSP1 ] 10.079820 s: ALG: ti.radar.pkDetect: CH1 BUF3: 0x8c1a9600 ( 143368 B ) +[DSP1 ] 10.080278 s: ALG: ti.radar.pkDetect: CH2 BUF0: 0x8c1cc800 ( 143368 B ) +[DSP1 ] 10.080796 s: ALG: ti.radar.pkDetect: CH2 BUF1: 0x8c1efa00 ( 143368 B ) +[DSP1 ] 10.081254 s: ALG: ti.radar.pkDetect: CH2 BUF2: 0x8c212c00 ( 143368 B ) +[DSP1 ] 10.081711 s: ALG: ti.radar.pkDetect: CH2 BUF3: 0x8c235e00 ( 143368 B ) +[DSP1 ] 10.082199 s: ALG: ti.radar.pkDetect: CH3 BUF0: 0x8c259000 ( 143368 B ) +[DSP1 ] 10.082657 s: ALG: ti.radar.pkDetect: CH3 BUF1: 0x8c27c200 ( 143368 B ) +[DSP1 ] 10.083145 s: ALG: ti.radar.pkDetect: CH3 BUF2: 0x8c29f400 ( 143368 B ) +[DSP1 ] 10.083602 s: ALG: ti.radar.pkDetect: CH3 BUF3: 0x8c2c2600 ( 143368 B ) +[DSP1 ] 10.083694 s: ALGORITHM: Create Done (algId = 11) !!! +[DSP1 ] 10.083877 s: IPC_OUT_0 : Create in progress !!! +[DSP1 ] 10.083968 s: IPC_OUT_0 : Create Done !!! +[DSP1 ] 10.088299 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP1 ] 10.088360 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 10.088421 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 502320 B (490 KB) +[DSP1 ] 10.252272 s: AlgorithmFxn_RadarPkDetectProcess() - Enter... +[DSP1 ] 10.252607 s: AlgorithmFxn_RadarPkDetectProcess() - DONE...status -2045 +[DSP1 ] 10.252638 s: Assertion @ Line: 554 in C:/TI/processor_sdk_radar_03_08_00_00/vision_sdk/apps/src/rtos/radar/src/alg_plugins/radarprocess/radarProcessLink_algPlugin.c: status==SYSTEM_LINK_STATUS_SOK : failed !!! +[DSP2 ] 10.088574 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[DSP2 ] 10.088635 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 10.088665 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 523928 B (511 KB) +[EVE1 ] 10.089092 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE1 ] 10.090312 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 8884 B (8 KB) +[EVE1 ] 10.092417 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261000 B (254 KB) +[EVE2 ] 10.095040 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE2 ] 10.096260 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 18304 B (17 KB) +[EVE2 ] 10.098456 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261408 B (255 KB) +[EVE3 ] 10.100988 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE3 ] 10.102238 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 18304 B (17 KB) +[EVE3 ] 10.104495 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261408 B (255 KB) +[EVE4 ] 10.107057 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[EVE4 ] 10.108277 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 18304 B (17 KB) +[EVE4 ] 10.110473 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 261408 B (255 KB) +[DSP1 ] 26.283779 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.313761 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.316751 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.343774 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.349752 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.373757 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.382754 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.403769 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.415756 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.433752 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.448758 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.463765 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.481760 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.493777 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.514762 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.523760 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.547764 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.553772 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! +[DSP1 ] 26.580766 s: UTILS: MBX: Utils_mbxSendCmd(): Msg Alloc Failed (0)!!! --Khai + +Responses: +I am suspecting the issue here is PkDetect cannot take the output of the Merge Link which aggregates the 4 output Queues from the 4 EVEs (performing 2D-FFT) and performs PkDetect on essentially 4 channels of 2D-FFT data where each channel represents 4 radar cube. Is my understanding correct? If so, can you give advice how to overcome this issue? Thanks, --Khai + +Attached is my chain graph. + +In the log, there is an assertion. You have to check what cause the assertion. [DSP1 ] 10.252638 s: Assertion @ Line: 554 in C:/TI/processor_sdk_radar_03_08_00_00/vision_sdk/apps/src/rtos/radar/src/alg_plugins/radarprocess/radarProcessLink_algPlugin.c: status==SYSTEM_LINK_STATUS_SOK : faild!! Do you have any issue running the out-of-box use case by default? Regards, Stanley + +Hi Stanley, I was trying to locate the failed code that printed out in the log. Can you tell me what the failure referred to? Thanks, Khai + +The status returned from AlgorithmFxn_RadarPkDetectProcess() is NOT OK. Please check what error is returned by RadarPkDetectWork_process() in ~/vision_sdk/apps/src/rtos/radar/src/alg_plugins/alg_fxns/radarpeakdetect/radarPkDetect_work.c. + +Can you assure that PkDetect link is ok with multi channels input as I suspected it couldn't? I know the status code is not OK. I couldn't locate where in the code what the returned status code means. Thanks, Khai + +Sorry. I misunderstood your question. For cascade radar processing, you have to follow the cascade_radar_object_detect or cascade_radar_beam_form. Other use case doesn't work for cascade radar. Regards, Stanley + +Hi Stanley, I understand there are two usecases developed by TI to demonstrate cascade radar. My question is can PkDetect be used which in (NCI + CFAR) is done in one of the 4 TDA2 EVEs instead of doing it in DSP as in the case of the cascade MIMO usecase? What I found out is that performing NCI over a number of virtual channels causes significant processing time. We are looking to reduce the overall processing time thus in the end improve frame rate. For non-cascade where PkDetect can process single sensor RX channels in EVE no problem. Is there a known limitation in PkDetect to process multi-sensor channels in EVEs? Thanks, --Khai + +No. The framework is multi-channel but the PkDetect algorithm plugin is not setup for multi-channel support. Regards, Stanley + +Great. That's what my initial suspicious. Now that you said it's not setup to process multi-channel data, Is this limitation in the EVE code or is it in the caller code that manages the input /output data into/from EVE? Can you suggest how to overcome this limiation? Thanks, --Khai + +You can take FFT algorithm as example. It supports multi-channel. The main thing is the algorithm parameters should be changed to an array for multiple channels, instead of single structure. In the create/process functions, it has to set/use parameters based on channel id. In the use case configurations, it should also set parameters based on channels. Regards, Stanley + +Awesome. Thanks for the tips. I'll look into it and if I am able to make it work, I'll let you know. Thanks, --Khai + +One more question. Are most of the changes at caller level code? I am not at all familiar with EVE code or know how to make changes in it. Thanks, --Khai + +No change is required in the EVE algorithm kernel. + +Hi Stanley, Reading the code and looking into modifying PkDect Alg plugin to function like the radarDspCascadeMimo plugin. I am running into a bit of problem. Now that I want to run PkDetect on EVE where I have the 4 FFT output on 4 EVEs all going into a single PkDetect. I was looking to assign PkDetect to an EVE similar to how FFT was assigned using the pFFTParams->workQcpuId = SYSTEM_PROC_EVE1; However, PkDetect does not have workQcpuId in its parameter data structure - AlgorithmFxn_RadarPkDetectCreateParams. Is this required or by default it will know to run on EVE0? Thanks, --Khai + +Never mind. i found it. + +Problem solved. Thank you. + diff --git a/data2/text/range/30001+/899912.txt b/data2/text/range/30001+/899912.txt new file mode 100644 index 0000000000000000000000000000000000000000..c52cef0f489150f16c52d8a9892cc758191043ee --- /dev/null +++ b/data2/text/range/30001+/899912.txt @@ -0,0 +1,1807 @@ +Ticket Name: DRA756: Cannot change output clock for PHY-less connection + +Query Text: +Part Number: DRA756 Other Parts Discussed in Thread: TDA2 Hi all, There is a customed board with DRA756 chip, each peripheral works fine except for ethernet. After fixing no output clock problem (e2e.ti.com/.../3289760 with help from Santhana, clock of TXC is always 2.5MHz when booting to u-boot or booting to Linux. Below is some details about u-boot and Linux configuration. Booting log of the whole process is here 3808.boot_log_20200424.log + +U-Boot 2018.01-00566-g0f1ad58-dirty (Apr 24 2020 - 15:39:42 +0800) + +CPU : DRA756-GP ES2.0 +Model: TI DRA756 +Board: DRA756 REDRAM: 2 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0 +MMC Device 1 not found +*** Warning - No MMC card found, using default environment + +In: serial@4806a000 +Out: serial@4806a000 +Err: serial@4806a000 +invalid mmc device +Net: Could not get PHY for ethernet@48484000: addr -17123512 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 4 3 2 1 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +** Unable to read file boot.scr ** +232 bytes read in 1 ms (226.6 KiB/s) +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +4014592 bytes read in 177 ms (21.6 MiB/s) +99222 bytes read in 6 ms (15.8 MiB/s) +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe4000, end 8ffff395 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.14.79-g3438de3474 (oe-user@oe-host) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #1 SMP PREEMPT Thu Jan 31 10:19:19 UTC 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: div instructions available: patching division code +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] OF: fdt: Machine model: LM DRA756 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] efi: Getting EFI parameters from FDT: +[ 0.000000] efi: UEFI not found. +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB +[ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB +[ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] OF: reserved mem: initialized node ipu1-memory@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB +[ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0x00000000b0000000 +[ 0.000000] OMAP4: Map 0x00000000fed00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] percpu: Embedded 15 pages/cpu @eed58000 s31372 r8192 d21876 u61440 +[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 517696 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk0p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=128M@0xB0000000 rootfstype=ext4 snd.slots_reserved=1,1 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 1747808K/2077696K available (8192K kernel code, 346K rwdata, 2636K rodata, 2048K init, 282K bss, 34976K reserved, 294912K cma-reserved, 1160192K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc0a00000 (10208 kB) +[ 0.000000] .init : 0xc0e00000 - 0xc1000000 (2048 kB) +[ 0.000000] .data : 0xc1000000 - 0xc1056b58 ( 347 kB) +[ 0.000000] .bss : 0xc1058000 - 0xc109eba0 ( 283 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Tasks RCU enabled. +[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 +[ 0.000000] GIC: Using split EOI/Deactivate mode +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000018] Switching to timer-based delay loop, resolution 162ns +[ 0.000347] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000356] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000803] Console: colour dummy device 80x30 +[ 0.000821] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000829] This ensures that you still see kernel messages. Please +[ 0.000835] update your kernel commandline. +[ 0.000856] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000872] pid_max: default: 32768 minimum: 301 +[ 0.000978] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000992] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001519] CPU: Testing write buffer coherency: ok +[ 0.001557] CPU0: Spectre v2: using ICIALLU workaround +[ 0.001754] /cpus/cpu@0 missing clock-frequency property +[ 0.001772] /cpus/cpu@1 missing clock-frequency property +[ 0.001784] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.039867] Setting up static identity map for 0x80200000 - 0x80200060 +[ 0.059876] Hierarchical SRCU implementation. +[ 0.080063] EFI services will not be available. +[ 0.099935] smp: Bringing up secondary CPUs ... +[ 0.170296] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.170301] CPU1: Spectre v2: using ICIALLU workaround +[ 0.170401] smp: Brought up 1 node, 2 CPUs +[ 0.170412] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.170420] CPU: All CPU(s) started in HYP mode. +[ 0.170427] CPU: Virtualization extensions available. +[ 0.170967] devtmpfs: initialized +[ 0.188637] random: get_random_u32 called from bucket_table_alloc+0x108/0x230 with crng_init=0 +[ 0.188978] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.189172] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.189190] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.194925] pinctrl core: initialized pinctrl subsystem +[ 0.195394] DMI not present or invalid. +[ 0.195647] NET: Registered protocol family 16 +[ 0.196795] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.197693] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.399006] cpuidle: using governor ladder +[ 0.399039] cpuidle: using governor menu +[ 0.407215] OMAP GPIO hardware version 0.1 +[ 0.426473] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_gpmc_pins, deferring probe +[ 0.436211] No ATAGs? +[ 0.436284] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.436298] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.436656] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.436668] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.437203] OMAP DMA hardware revision 0.0 +[ 0.446935] edma 43300000.edma: memcpy is disabled +[ 0.450101] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.456763] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.458022] ps_evm_3v3: supplied by evm_12v0 +[ 0.458338] evm_5v0: supplied by evm_12v0 +[ 0.461290] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.461485] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.461719] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.461958] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.462325] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.462536] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.464367] omap_i2c 48070000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c1_pins, deferring probe +[ 0.464408] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c3_pins, deferring probe +[ 0.464444] omap_i2c 4807c000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c5_pins, deferring probe +[ 0.464600] media: Linux media interface: v0.10 +[ 0.464635] Linux video capture interface: v2.00 +[ 0.464711] pps_core: LinuxPPS API ver. 1 registered +[ 0.464720] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.464738] PTP clock support registered +[ 0.464764] EDAC MC: Ver: 3.0.0 +[ 0.465042] dmi: Firmware registration failed. +[ 0.465425] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.465701] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.466042] Advanced Linux Sound Architecture Driver Initialized. +[ 0.466826] clocksource: Switched to clocksource arch_sys_counter +[ 0.474242] NET: Registered protocol family 2 +[ 0.474752] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.474816] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.474942] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.475008] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.475041] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.475161] NET: Registered protocol family 1 +[ 0.475442] RPC: Registered named UNIX socket transport module. +[ 0.475452] RPC: Registered udp transport module. +[ 0.475460] RPC: Registered tcp transport module. +[ 0.475468] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.476675] hw perfevents: no interrupt-affinity property for /pmu, guessing. +[ 0.476871] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.477922] workingset: timestamp_bits=14 max_order=19 bucket_order=5 +[ 0.481964] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.482455] NFS: Registering the id_resolver key type +[ 0.482477] Key type id_resolver registered +[ 0.482486] Key type id_legacy registered +[ 0.482523] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.483858] bounce: pool size: 64 pages +[ 0.483902] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) +[ 0.483912] io scheduler noop registered (default) +[ 0.483921] io scheduler deadline registered +[ 0.484012] io scheduler cfq registered +[ 0.484021] io scheduler mq-deadline registered +[ 0.484029] io scheduler kyber registered +[ 0.488447] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.489002] ti-iodelay 4844a000.padconf: Invalid Coarse delay count (0) (reg=0x00000000) +[ 0.490736] dra7-pcie 51000000.pcie_ep: Linked as a consumer to phy-4a094000.pciephy.1 +[ 0.536188] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.538858] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 44, base_baud = 3000000) is a 8250 +[ 1.472430] console [ttyS0] enabled +[ 1.476763] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 45, base_baud = 3000000) is a 8250 +[ 1.487389] omap_rng 48090000.rng: Random Number Generator ver. 20 +[ 1.496369] connector-hdmi connector@1: failed to find video source +[ 1.513002] brd: module loaded +[ 1.521492] loop: module loaded +[ 1.528268] m25p80 spi0.0: n25q00 (131072 Kbytes) +[ 1.533069] 10 ofpart partitions found on MTD device spi0.0 +[ 1.538693] Creating 10 MTD partitions on "spi0.0": +[ 1.543596] 0x000000000000-0x000000010000 : "QSPI.SPL" +[ 1.549394] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" +[ 1.555835] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" +[ 1.562298] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" +[ 1.568747] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.574726] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.581350] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.587720] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.594760] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.600770] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.607791] libphy: Fixed MDIO Bus: probed +[ 1.666866] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 +[ 1.674561] davinci_mdio 48485000.mdio: no live phy, scanning all +[ 1.776838] davinci_mdio 48485000.mdio: timed out waiting for user access +[ 1.883733] davinci_mdio 48485000.mdio: timed out waiting for idle +[ 1.889980] davinci_mdio: probe of 48485000.mdio failed with error -5 +[ 1.897262] cpsw 48484000.ethernet: No slave[1] phy_id, phy-handle, or fixed-link property +[ 1.905569] cpsw 48484000.ethernet: Detected MACID = 38:0b:3c:40:ea:52 +[ 1.912203] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 +[ 1.918606] cpsw 48484000.ethernet: ALE Table size 1024 +[ 1.923899] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) +[ 1.931793] cpsw 48484000.ethernet: cpsw: Detected MACID = 00:00:00:00:00:a0 +[ 1.940019] i2c /dev entries driver +[ 1.944040] IR NEC protocol handler initialized +[ 1.948625] IR RC5(x/sz) protocol handler initialized +[ 1.953699] IR RC6 protocol handler initialized +[ 1.958267] IR JVC protocol handler initialized +[ 1.962817] IR Sony protocol handler initialized +[ 1.967470] IR SANYO protocol handler initialized +[ 1.972195] IR Sharp protocol handler initialized +[ 1.976932] IR MCE Keyboard/mouse protocol handler initialized +[ 1.982790] IR XMP protocol handler initialized +[ 1.991365] sdhci: Secure Digital Host Controller Interface driver +[ 1.997599] sdhci: Copyright(c) Pierre Ossman +[ 2.002487] sdhci-pltfm: SDHCI platform and OF driver helper +[ 2.009370] sdhci-omap 4809c000.mmc: failed to set system capabilities +[ 2.016500] sdhci-omap 480b4000.mmc: failed to set system capabilities +[ 2.023815] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.033683] NET: Registered protocol family 10 +[ 2.038977] Segment Routing with IPv6 +[ 2.042707] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver +[ 2.049106] NET: Registered protocol family 17 +[ 2.053743] Key type dns_resolver registered +[ 2.058223] omap_voltage_late_init: Voltage driver support not added +[ 2.064604] Power Management for TI OMAP4+ devices. +[ 2.069770] Registering SWP/SWPB emulation handler +[ 2.086522] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.094160] dmm 4e000000.dmm: initialized all PAT entries +[ 2.100218] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 2.105384] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 2.112809] nand: device found, Manufacturer ID: 0xc2, Chip ID: 0xda +[ 2.119220] nand: Macronix MX30LF2G18AC +[ 2.123075] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 +[ 2.130786] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme +[ 2.136207] 10 ofpart partitions found on MTD device omap2-nand.0 +[ 2.142346] Creating 10 MTD partitions on "omap2-nand.0": +[ 2.147787] 0x000000000000-0x000000020000 : "NAND.SPL" +[ 2.153717] 0x000000020000-0x000000040000 : "NAND.SPL.backup1" +[ 2.160294] 0x000000040000-0x000000060000 : "NAND.SPL.backup2" +[ 2.166874] 0x000000060000-0x000000080000 : "NAND.SPL.backup3" +[ 2.173422] 0x000000080000-0x0000000c0000 : "NAND.u-boot-spl-os" +[ 2.180297] 0x0000000c0000-0x0000001c0000 : "NAND.u-boot" +[ 2.187253] 0x0000001c0000-0x0000001e0000 : "NAND.u-boot-env" +[ 2.193725] 0x0000001e0000-0x000000200000 : "NAND.u-boot-env.backup1" +[ 2.200902] 0x000000200000-0x000000a00000 : "NAND.kernel" +[ 2.214413] 0x000000a00000-0x000010000000 : "NAND.file-system" +[ 2.452878] palmas 0-0058: IRQ missing: skipping irq request +[ 2.487191] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 2.494119] SMPS123: supplied by regulator-dummy +[ 2.501711] SMPS45: supplied by regulator-dummy +[ 2.508275] SMPS6: supplied by regulator-dummy +[ 2.514605] SMPS7: supplied by regulator-dummy +[ 2.521080] SMPS8: supplied by regulator-dummy +[ 2.527429] SMPS9: supplied by regulator-dummy +[ 2.532972] LDO1: supplied by regulator-dummy +[ 2.539399] LDO2: supplied by regulator-dummy +[ 2.545131] random: fast init done +[ 2.549082] LDO3: supplied by regulator-dummy +[ 2.555322] LDO4: supplied by regulator-dummy +[ 2.560528] LDO5: supplied by regulator-dummy +[ 2.565713] LDO6: supplied by regulator-dummy +[ 2.570905] LDO7: supplied by regulator-dummy +[ 2.576076] LDO8: supplied by regulator-dummy +[ 2.581260] LDO9: supplied by regulator-dummy +[ 2.587700] LDOLN: supplied by regulator-dummy +[ 2.594067] LDOUSB: supplied by regulator-dummy +[ 2.603276] GPIO line 508 (CT_CP_HPD) hogged as output/high +[ 2.609021] GPIO line 507 (LS_OE) hogged as output/high +[ 2.614645] pcf857x 0-0020: probed +[ 2.618699] pcf857x 0-0023: probed +[ 2.622176] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 2.657402] tmp102 2-0048: initialized +[ 2.661667] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 2.682135] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 400 kHz +[ 2.688468] DSS: OMAP DSS rev 6.1 +[ 2.692534] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 2.701035] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 2.711893] evm_3v3_sd: supplied by sysen1 +[ 2.776853] mmc0: SDHCI controller on 4809c000.mmc [4809c000.mmc] using ADMA +[ 2.784641] evm_1v8: supplied by smps9 +[ 2.846853] mmc1: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA +[ 2.861574] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.868379] [drm] No driver support for vblank timestamp query. +[ 2.896790] mmc0: host does not support reading read-only switch, assuming write-enable +[ 2.909478] mmc0: new high speed SDHC card at address aaaa +[ 2.915257] mmcblk0: mmc0:aaaa SC16G 14.8 GiB +[ 2.923717] mmcblk0: p1 p2 +[ 3.017563] mmc1: new high speed MMC card at address 0001 +[ 3.023301] mmcblk1: mmc1:0001 DG4064 59.2 GiB +[ 3.028080] mmcblk1boot0: mmc1:0001 DG4064 partition 1 4.00 MiB +[ 3.034272] mmcblk1boot1: mmc1:0001 DG4064 partition 2 4.00 MiB +[ 3.040368] EDID block is all zeroes +[ 3.044252] [drm] Enabling DMM ywrap scrolling +[ 3.053479] mmcblk1rpmb: mmc1:0001 DG4064 partition 3 4.00 MiB +[ 3.073747] Console: switching to colour frame buffer device 128x48 +[ 3.089853] omapdrm omapdrm.0: fb0: omapdrm frame buffer device +[ 3.096760] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0 +[ 3.104677] hctosys: unable to open rtc device (rtc0) +[ 3.110451] vtt_fixed: supplied by evm_3v3_sd +[ 3.115038] ldousb: disabling +[ 3.118292] ALSA device list: +[ 3.121268] No soundcards found. +[ 3.170945] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 3.179124] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 3.195507] devtmpfs: mounted +[ 3.199379] Freeing unused kernel memory: 2048K +[ 3.499116] systemd[1]: System time before build time, advancing clock. +[ 3.540656] systemd[1]: systemd 234 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN default-hierarchy=hybrid) +[ 3.562347] systemd[1]: Detected architecture arm. + +Welcome to Arago 2018.10! + +[ 3.609988] systemd[1]: Set hostname to . +[ 3.923474] random: systemd: uninitialized urandom read (16 bytes read) +[ 3.930279] systemd[1]: Listening on Syslog Socket. +[ OK ] Listening on Syslog Socket. +[ 3.956953] random: systemd: uninitialized urandom read (16 bytes read) +[ 3.965086] systemd[1]: Created slice User and Session Slice. +[ OK ] Created slice User and Session Slice. +[ 3.997136] random: systemd: uninitialized urandom read (16 bytes read) +[ 4.004988] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 4.037314] systemd[1]: Listening on udev Control Socket. +[ OK ] Listening on udev Control Socket. +[ 4.068349] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ 4.097041] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 4.137504] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Listening on Journal Socket. +[ OK ] Listening on Process Core Dump Socket. + Mounting Kernel Debug File System... +[ OK ] Created slice system-getty.slice. +[ 4.295953] EDID block is all zeroes + Starting Remount Root and Kernel File Systems... +[ 4.343659] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Reached target Paths. +[ OK ] Reached target Remote File Systems. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Listening on udev Kernel Socket. +[ OK ] Reached target Slices. + Starting Load Kernel Modules... + [ 4.593279] cmemk: loading out-of-tree module taints kernel. +Starting Journal Service... +[ 4.599927] CMEMK module: reference Linux version 4.14.79 +[ 4.607663] no physical memory specified +[ 4.611629] cmemk initialized +[ 4.622771] cryptodev: driver 1.9 loaded. + Mounting POSIX Message Queue File System... +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Reached target Swap. + Mounting Temporary Directory (/tmp)... +[ OK ] Mounted Kernel Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory (/tmp). +[ OK ] Started Journal Service. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Load Kernel Modules. + Mounting Kernel Configuration File System... + Starting Apply Kernel Variables... + Starting Create System Users... + Starting Rebuild Hardware Database... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted Kernel Configuration File System. +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Create System Users. +[ 5.203712] systemd-journald[90]: Received request to flush runtime journal from PID 1 + Starting Create Static Device Nodes in /dev... +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Reached target Local File Systems (Pre). + Mounting /var/volatile... + Mounting /media/ram... + Starting udev Kernel Device Manager... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... + Starting Rebuild Journal Catalog... + Starting Rebuild Dynamic Linker Cache... +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Volatile Files and Directories. +[ OK ] Started Rebuild Journal Catalog. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ OK ] Started Rebuild Dynamic Linker Cache. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started Rebuild Hardware Database. + Starting udev Coldplug all Devices... + Starting Update is Completed... +[ OK ] Started Update is Completed. +[ OK ] Started Network Time Synchronization. +[ OK ] Reached target System Time Synchronized. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Reached target System Initialization. +[ OK ] Started Daily Cleanup of Temporary Directories. + Starting Network Service... +[ OK ] Listening on dropbear.socket. +[ OK ] Started Daily rotation of log files. +[ OK ] Reached target Timers. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on RPCbind Server Activation Socket. +[ 7.394744] at24 2-0050: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ 7.402557] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.402764] omap-des 480a5000.des: will run requests pump with realtime priority +[ 7.409239] CAN device driver interface +[ OK ] Reached target Sockets. +[ 7.456397] ov1063x: probe of 2-0037 failed with error -121 +[ 7.476018] at24 2-0054: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ 7.492988] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=91) +[ 7.493682] c_can_platform 48480000.can: c_can_platform device registered (regs=fa480000, irq=92) +[ OK ] Reached target Basic System. +[ OK ] Reached target Containers. +[ 7.591538] omap_rtc 48838000.rtc: registered as rtc0 +[ 7.598920] at24 4-0050: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ 7.600127] at24 4-0054: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ OK ] Started Periodic Command Scheduler. +[ OK ] Started Hardware RNG Entropy Gatherer Daemon.[ 7.680831] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin + + Starting Print notice about GPLv3 packages... +[ 7.727067] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 7.733405] SCSI subsystem initialized +[ 7.746718] net eth0: initializing cpsw version 1.15 (0) +[ 7.763998] random: crng init done +[ 7.764002] random: 7 urandom warning(s) missed due to ratelimiting +[ 7.767157] Generic PHY fixed-0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=POLL) +[ 7.827808] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 7.833647] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 7.856901] vip 48970000.vip: VPDMA firmware loaded +[ 7.890463] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 7.895964] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 7.985481] net eth1: initializing cpsw version 1.15 (0) +[ 7.992822] libphy: PHY not found +[ 7.992829] net eth1: phy "" not found on slave 1, err -19 +[ 8.002976] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.033268] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 8.040898] omap-aes 4b500000.aes: will run requests pump with realtime priority +[ 8.103149] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.120067] omap-aes 4b700000.aes: will run requests pump with realtime priority +[ 8.137504] [drm] Initialized pvr 1.14.3699939 20110701 for 56000000.gpu on minor 1 +[ OK ] Started System Logging Service. + Starting TI IPC Daemon... + Starting Login Service... + Starting uim-sysfs.service... +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ 8.337697] ahci 4a140000.sata: forcing port_map 0x0 -> 0x1 +[ 8.381367] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 8.434687] ahci 4a140000.sata: flags: 64bit ncq sntf pm led clo only pmp pio slum part ccc apst +[ OK ] Started Job spooling tools. + Starting RPC Bind Service... +[ OK ] Started D-Bus System Message Bus. +[ 8.567674] scsi host0: ahci +[ 8.600522] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 81 +[ 8.806904] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 8.814860] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 8.864731] extcon-usb-gpio: probe of extcon_usb2 failed with error -16 +[ 8.884273] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 8.958178] ata1: SATA link down (SStatus 0 SControl 300) +[ 8.968261] NET: Registered protocol family 15 +[ OK ] Started Kernel Logging Service. +[ 9.090791] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 9.114555] OF: /sound0/simple-audio-card,cpu: could not get #sound-dai-cells for /ocp/mcasp@48468000 +[ 9.114562] asoc-simple-card sound0: parse error -22 +[ 9.114578] asoc-simple-card: probe of sound0 failed with error -22 +[ OK ] Started Network Service. +[ OK ] Started TI IPC Daemon. +[ OK ] Started RPC Bind Service. +[ OK ] Found device /dev[ 9.256958] omap-hdmi-audio omap-hdmi-audio.0.auto: ASoC: no DMI vendor name! +/ttyS0. +[ 9.272256] Initializing XFRM netlink socket +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. + Starting Enable and configure wl18xx bluetooth stack... + Starting Permit User Sessions... + Starting Lightning Fast Webserver With Light System Requirements... + Starting Network Name Resolution... +[ OK ] Started Permit User Sessions. +[ OK ] Started Login Service. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Enable and configure wl18xx bluetooth stack. +[ OK ] Started Network Name Resolution. +[ 10.695801] usbcore: registered new interface driver usbfs +[ 10.710407] usbcore: registered new interface driver hub +[ 10.725052] usbcore: registered new device driver usb +[ 10.753614] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.761407] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 10.788583] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x02010010 +[ 10.805182] xhci-hcd xhci-hcd.1.auto: irq 180, io mem 0x48890000 +[ 10.825054] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 10.832963] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.847879] usb usb1: Product: xHCI Host Controller +[ 10.852791] usb usb1: Manufacturer: Linux 4.14.79-g3438de3474 xhci-hcd +[ 10.876863] usb usb1: SerialNumber: xhci-hcd.1.auto +[ 10.882242] hub 1-0:1.0: USB hub found +[ 10.886423] hub 1-0:1.0: 1 port detected +[ 10.897235] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.902770] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 10.926863] xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed +[ 10.948104] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 10.965546] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 +[ 10.977634] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.996306] usb usb2: Product: xHCI Host Controller +[ 11.010360] usb usb2: Manufacturer: Linux 4.14.79-g3438de3474 xhci-hcd +[ 11.025039] usb usb2: SerialNumber: xhci-hcd.1.auto +[ 11.037776] hub 2-0:1.0: USB hub found +[ 11.047057] hub 2-0:1.0: 1 port detected +[ OK ] Reached target Sound Card. +[ OK ] Reached target Host and Network Name Lookups. +[ OK ] Started NFS status monitor for NFSv2/3 locking.. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Reached target Login Prompts. + Starting Synchronize System and HW clocks... +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Started uim-sysfs.service. + Starting rc.pvr.service... +[ 11.690792] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ OK ] Started rc.pvr.service. + Starting weston.service... +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages: + autoconf + bash-dev + bash + binutils-dev + binutils + bison-dev + bison + cifs-utils + cpio + cpp-symlinks + cpp + dosfstools + elfutils-dev + elfutils + g++-symlinks + g++ + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gettext + glmark2 + gstreamer1.0-libav + gzip + libasm1 + libcairo-perf-utils + libdw1 + libelf1 + libgdbm-compat4 + libgdbm-dev + libgdbm4 + libgettextlib + libgettextsrc + libgmp10 + libidn11 + libmpc3 + libmpfr4 + libreadline-dev + libreadline7 + libunistring2 + m4-dev + m4 + make + nettle + parted + python3-pycairo + swig-dev + swig + which + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started Print notice about GPLv3 packages. +[ OK ] Started weston.service. + Starting telnetd.service... +[ OK ] Started telnetd.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +[ OK ] Reached target Multi-User System. + Starting Update UTMP about System Runlevel Changes... +[ OK ] Started Update UTMP about System Runlevel Changes. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2018.10 dra7xx-evm ttyS0 + +dra7xx-evm login: and ethtool related probing log is here ethtool_20200424.log root@dra7xx-evm:~# ethtool -S eth0 +NIC statistics: + Good Rx Frames: 0 + Broadcast Rx Frames: 0 + Multicast Rx Frames: 0 + Pause Rx Frames: 0 + Rx CRC Errors: 0 + Rx Align/Code Errors: 0 + Oversize Rx Frames: 0 + Rx Jabbers: 0 + Undersize (Short) Rx Frames: 0 + Rx Fragments: 0 + Rx Octets: 0 + Good Tx Frames: 64 + Broadcast Tx Frames: 27 + Multicast Tx Frames: 37 + Pause Tx Frames: 0 + Deferred Tx Frames: 0 + Collisions: 0 + Single Collision Tx Frames: 0 + Multiple Collision Tx Frames: 0 + Excessive Collisions: 0 + Late Collisions: 0 + Tx Underrun: 0 + Carrier Sense Errors: 0 + Tx Octets: 12656 + Rx + Tx 64 Octet Frames: 0 + Rx + Tx 65-127 Octet Frames: 37 + Rx + Tx 128-255 Octet Frames: 0 + Rx + Tx 256-511 Octet Frames: 27 + Rx + Tx 512-1023 Octet Frames: 0 + Rx + Tx 1024-Up Octet Frames: 0 + Net Octets: 12656 + Rx Start of Frame Overruns: 0 + Rx Middle of Frame Overruns: 0 + Rx DMA Overruns: 0 + Rx DMA chan 0: head_enqueue: 1 + Rx DMA chan 0: tail_enqueue: 127 + Rx DMA chan 0: pad_enqueue: 0 + Rx DMA chan 0: misqueued: 0 + Rx DMA chan 0: desc_alloc_fail: 0 + Rx DMA chan 0: pad_alloc_fail: 0 + Rx DMA chan 0: runt_receive_buf: 0 + Rx DMA chan 0: runt_transmit_bu: 0 + Rx DMA chan 0: empty_dequeue: 0 + Rx DMA chan 0: busy_dequeue: 0 + Rx DMA chan 0: good_dequeue: 0 + Rx DMA chan 0: requeue: 0 + Rx DMA chan 0: teardown_dequeue: 0 + Tx DMA chan 0: head_enqueue: 64 + Tx DMA chan 0: tail_enqueue: 0 + Tx DMA chan 0: pad_enqueue: 0 + Tx DMA chan 0: misqueued: 0 + Tx DMA chan 0: desc_alloc_fail: 0 + Tx DMA chan 0: pad_alloc_fail: 0 + Tx DMA chan 0: runt_receive_buf: 0 + Tx DMA chan 0: runt_transmit_bu: 0 + Tx DMA chan 0: empty_dequeue: 64 + Tx DMA chan 0: busy_dequeue: 0 + Tx DMA chan 0: good_dequeue: 64 + Tx DMA chan 0: requeue: 0 + Tx DMA chan 0: teardown_dequeue: 0 +root@dra7xx-evm:~# ethtool eth0 +Settings for eth0: + Supported ports: [ TP AUI BNC MII FIBRE ] + Supported link modes: 1000baseT/Half 1000baseT/Full + Supported pause frame use: Symmetric Receive-only + Supports auto-negotiation: Yes + Supported FEC modes: Not reported + Advertised link modes: 1000baseT/Half 1000baseT/Full + Advertised pause frame use: No + Advertised auto-negotiation: Yes + Advertised FEC modes: Not reported + Link partner advertised link modes: 1000baseT/Full + Link partner advertised pause frame use: No + Link partner advertised auto-negotiation: No + Link partner advertised FEC modes: Not reported + Speed: 1000Mb/s + Duplex: Full + Port: MII + PHYAD: 0 + Transceiver: internal + Auto-negotiation: on + Supports Wake-on: d + Wake-on: d + Current message level: 0x00000000 (0) + + Link detected: yes +root@dra7xx-evm:~# . And key registers value about mac is here mac_reg_value_20200424.log root@dra7xx-evm:/mnt# ./memread.sh +try to get 0x4A003650 +10000 +try to get 0x4A003654 +10000 +try to get 0x4A003658 +10000 +try to get 0x4A00365C +10000 +try to get 0x4A003660 +10000 +try to get 0x4A003664 +10000 +try to get 0x4A003668 +50000 +try to get 0x4A00366C +50000 +try to get 0x4A003670 +50000 +try to get 0x4A003674 +50000 +try to get 0x4A003678 +50000 +try to get 0x4A00367C +50000 +root@dra7xx-evm:/mnt# omapconf read 0x48485288 +00000000 +omapconf: powerdm_deinit(): cpu not supported!!! +omapconf: clockdm_deinit(): cpu not supported!!! +root@dra7xx-evm:/mnt# omapconf read 0x48484D84 +000000A1 +omapconf: powerdm_deinit(): cpu not supported!!! +omapconf: clockdm_deinit(): cpu not supported!!! +root@dra7xx-evm:/mnt# . For u-boot, mac related configuration is here. mux_data.h is update with new pad configuration and pad IO delay. However, pad IO delay is genrated by TI pin mux tool and not changed. For Linux configuration, mac related dts is shown below Trails below are already been done but clock is still 2.5MHz. change linux dts, phy-mode = "rgmii-id", probing at linux terminal; change linux dts, change fixed-link.speed to 10, 100, 1000, , probing at linux terminal change uboot dts, add fixed-link and remove PHY properties and phy-mode = "rgmii-rxid" , probing at uboot terminal Hope someone share me some insights. Thanks very much. Best Regards, Daniel + +Responses: +Hi Daniel, According to the TRM, the TXC is set to 2.5 MHz for 10 Mbps operation and 25 MHz for 100 Mbps operation. Can you check what is the value of SL_MACCONTROL[15] IFCTL_A bit? Regards, Vishal + +Hi Vishal, Thanks for your answering this post and support. I have noticed your posted figure. But I am curious about the reason why TXC clock is always 2.5MHz, even though 10, 100, 1000MHz fix bit rate have been tried. The value of SL_MACCONTROL[15] IFCTL_A bti is 0, and its register value is 0x00A1. You can find more information by checking mac_reg_value_20200424.log file I posted in the topic. Besides, I am also curious about which registers decide TXC clock frequence. Then I dump clock tree of the customed board with omapconf ctt dump. And printed result is here cct_custom_20200426.log DeviceName DRA75X_SR2.0 +0x4A005100 0x00000110 +0x4A005120 0x00000007 +0x4A00512C 0x00010A04 +0x4A005130 0x00000002 +0x4A00513C 0x00000204 +0x4A005140 0x0000023E +0x4A005144 0x00000005 +0x4A005154 0x00000005 +0x4A005158 0x00000204 +0x4A00515C 0x00000006 +0x4A005160 0x00000007 +0x4A00516C 0x00803200 +0x4A005170 0x00000201 +0x4A00519C 0x00000000 +0x4A0051A0 0x00000007 +0x4A0051AC 0x00010A04 +0x4A0051B0 0x00000002 +0x4A0051DC 0x00000000 +0x4A0051E0 0x00000005 +0x4A0051EC 0x00800000 +0x4A0051F0 0x00000001 +0x4A0051F4 0x00000001 +0x4A005210 0x00000007 +0x4A00521C 0x00010A04 +0x4A005220 0x00000202 +0x4A005228 0x00000208 +0x4A005234 0x00000007 +0x4A005240 0x00004B01 +0x4A005244 0x00000001 +0x4A005248 0x00000003 +0x4A005254 0x00000000 +0x4A005284 0x00000005 +0x4A005290 0x00000000 +0x4A005294 0x00000001 +0x4A0052A4 0x00000000 +0x4A0052A8 0x00000007 +0x4A0052B4 0x0000FA04 +0x4A0052B8 0x00000204 +0x4A0052C0 0x00000228 +0x4A0052C4 0x00000208 +0x4A0052D8 0x00000007 +0x4A0052E4 0x00010A04 +0x4A0052E8 0x00000202 +0x4A005420 0x00070000 +0x4A005520 0x01070000 +0x4A005550 0x00030000 +0x4A005558 0x00030000 +0x4A005560 0x00030000 +0x4A005568 0x00030000 +0x4A005570 0x00030000 +0x4A005578 0x00030000 +0x4A005580 0x00030000 +0x4A005620 0x00070000 +0x4A005660 0x00070000 +0x4A0056A0 0x00070000 +0x4A005744 0x00020002 +0x4A005764 0x00000001 +0x4A008140 0x00000007 +0x4A00814C 0x00006004 +0x4A008150 0x00000804 +0x4A008158 0x00000003 +0x4A00815C 0x00000004 +0x4A008160 0x0000000A +0x4A008164 0x00000002 +0x4A008180 0x00000007 +0x4A00818C 0x0401E009 +0x4A008190 0x00000202 +0x4A008200 0x00000007 +0x4A00820C 0x04004B00 +0x4A008210 0x0000040F +0x4A00821C 0x00000101 +0x4A008728 0x00000001 +0x4A008778 0x00000001 +0x4A008780 0x00000001 +0x4A008920 0x00070000 +0x4A008B30 0x00000001 +0x4A008B38 0x00000001 +0x4A008B40 0x00000000 +0x4A008C00 0x00030000 +0x4A008E20 0x00030000 +0x4A008E28 0x00030000 +0x4A008E40 0x00030000 +0x4A008E50 0x01000001 +0x4A008F20 0x00070000 +0x4A008F28 0x00030000 +0x4A009020 0x00000001 +0x4A009028 0x00070000 +0x4A009030 0x00070000 +0x4A009120 0x00070000 +0x4A009130 0x00070000 +0x4A009220 0x0A000002 +0x4A009328 0x01040002 +0x4A009330 0x01040002 +0x4A009340 0x00040101 +0x4A009348 0x00070000 +0x4A009350 0x00070000 +0x4A009358 0x00070000 +0x4A009388 0x00000102 +0x4A0093B0 0x00040702 +0x4A0093B8 0x00070000 +0x4A0093D0 0x08000002 +0x4A0093E0 0x00000001 +0x4A0093E8 0x00000001 +0x4A0093F0 0x00000101 +0x4A009620 0x00030000 +0x4A009728 0x00030000 +0x4A009730 0x00030000 +0x4A009738 0x00030000 +0x4A009740 0x00030000 +0x4A009748 0x00030000 +0x4A009750 0x00030000 +0x4A009760 0x00030000 +0x4A009768 0x00030000 +0x4A009770 0x00030000 +0x4A009778 0x00030000 +0x4A009780 0x00020001 +0x4A009788 0x00030000 +0x4A009790 0x00030000 +0x4A009798 0x00030000 +0x4A0097A0 0x00020002 +0x4A0097A8 0x00030000 +0x4A0097B0 0x00030000 +0x4A0097B8 0x00030000 +0x4A0097C4 0x00030000 +0x4A0097C8 0x00030000 +0x4A0097D0 0x00030000 +0x4A0097D8 0x00030000 +0x4A0097F0 0x00030000 +0x4A0097F8 0x00030000 +0x4A009800 0x00030000 +0x4A009808 0x00030000 +0x4A009810 0x00020001 +0x4A009818 0x00030000 +0x4A009820 0x00030000 +0x4A009828 0x00030000 +0x4A009830 0x00030000 +0x4A009838 0x01030000 +0x4A009840 0x00010002 +0x4A009848 0x00010002 +0x4A009850 0x00030000 +0x4A009858 0x00030000 +0x4A009860 0x00030000 +0x4A009868 0x00030000 +0x4A009870 0x00030000 +0x4A009878 0x00030000 +0x4A009890 0x00030000 +0x4A009898 0x00030000 +0x4A0098A0 0x00030000 +0x4A0098A8 0x00030000 +0x4A0098B0 0x00030000 +0x4A0098B8 0x00030000 +0x4A0098C0 0x00000001 +0x4A0098C8 0x00030000 +0x4A0098D0 0x00030000 +0x4A0098E0 0x00030000 +0x4A0098E8 0x00030000 +0x4A0098F0 0x00030000 +0x4A0098F8 0x00030000 +0x4A009904 0x00030000 +0x4A009908 0x00030000 +0x4AE06108 0x00000000 +0x4AE0610C 0x00000000 +0x4AE06114 0x00000000 +0x4AE06118 0x00000000 +0x4AE06128 0x00000000 +0x4AE0612C 0x00000000 +0x4AE06130 0x00000000 +0x4AE06134 0x00000000 +0x4AE06138 0x00000000 +0x4AE06144 0x00000000 +0x4AE06148 0x00000000 +0x4AE0614C 0x00000000 +0x4AE06150 0x00000000 +0x4AE06154 0x00000000 +0x4AE06158 0x00000000 +0x4AE06164 0x00000000 +0x4AE06168 0x00000000 +0x4AE0616C 0x00000000 +0x4AE06170 0x00000000 +0x4AE06174 0x00000000 +0x4AE06178 0x00000000 +0x4AE06180 0x00000000 +0x4AE06184 0x00000000 +0x4AE06188 0x00000000 +0x4AE0618C 0x00000000 +0x4AE06190 0x00000000 +0x4AE06194 0x00000000 +0x4AE06198 0x00000000 +0x4AE0619C 0x00000000 +0x4AE061A0 0x00000000 +0x4AE061A4 0x00000000 +0x4AE061A8 0x00000000 +0x4AE061AC 0x00000000 +0x4AE061B0 0x00000000 +0x4AE061B4 0x00000000 +0x4AE061B8 0x00000000 +0x4AE061BC 0x00000000 +0x4AE061C0 0x00000000 +0x4AE061C8 0x00000000 +0x4AE061CC 0x00000000 +0x4AE061D0 0x00000000 +0x4AE061D4 0x00000000 +0x4AE061D8 0x00000000 +0x4AE061E0 0x00000000 +0x4AE07830 0x00030000 +0x4AE07838 0x00000001 +0x4AE07840 0x01000002 +0x4AE07878 0x00030000 +0x4AE07880 0x00030000 +0x4AE07888 0x00030000 + and hope this would help solving the problem. Thanks for your help and hope for your reply. Thanks a lot! Best Regards, Daniel + +Hi Daniel, Sorry, I did not check those files. According to the register value, the interface is in 10 Mbps operation. What was the speed value in dts when this register value was dumped? Regards, Vishal + +Hi Daniel, Noticed that GIG bit (bit 7) is set, indicating gigabit mode. Ignore the previous comment. Regards, Vishal + +Can we do some basic tests on u-boot level? Could you get the value of SL_MACCONTROL register for various speed-mode settings in u-boot dts? (You can read the register value at u-boot console using md command) + +Hi Vishal, Thanks for your reply. Under different speed sed in uboot dts file, results of SL_MACCONTROL are read as 0x00000000. Details are shown below : Hope for your reply and thanks for your support again. Best Regards, Daniel + +Hi Daniel, Is Ethernet functional from u-boot? Regards, Vishal + +Hi Vishal, Thanks for your quick reply. I cannot sure about this and Ethernet maybe not work during uboot. There maybe some missing during porting. Code created in board/ti/ and arch/arm/dts are zip here5873.dra7xx_customed.zip. Could you please help checking these files ? Thanks very much ! And I notice that for mac node in Linux dts file shown below, there is pinctrl node. For uboot dts file, how to offer pinctrl information ? I also notice evm uboot dts file dra7-evm.dts does not include pinctrl for mac node. Shold I need to change uboot code or dts file based on the uploaded zip file? Best Regards,, Daniel + +Hi Daniel, In case of u-boot the pinmux happens in board/ti/dra7xx/evm.c and board/ti/dra7xx/mux_data.h Is Ethernet functional on Linux Kernel? Can you do those experiments I asked for on Kernel instead of u-boot? Regards, Vishal + +Hi Vishal, Thanks for your reply and support. I suppose Ethernet functional on Linux kernel. Mentioned in the topic, no clock output problem has been fixed with adding pinctrl node in Linux dts file. But I am nore whether Ethernet functional rightly on Linux kernel. Hope for your reply and thanks a lot. Best Regards, Daniel + +Hi Daniel, Ideally pinmux should happen in u-boot. Both pinmux settings and IODELAY settings are done in u-boot. For current debug it's OK to continue with pinmux in kernel. Could you get the SL_MACCONTROL register details from kernel for different speed modes (10, 100, 1000)? Regards, Vishal + +Hi Vishal, Thanks for your reply and explanation. Different speed in dts file is set and compiled with make dtbs command. For speed (10, 100, 1000), SL_MACCONTROL value is (0x00040021, 0x00008021, 0x000000A1). Details is shown below. --- Speed is 10Mbps--- ---Speed is 100Mbps--- ---Speed is 1000Mbps--- Thanks for your support and hope for your reply. Best Regards, Daniel + +Hi Daniel, SL_MACCONTROL registers look OK for speed modes selected in dts. Could you also check the register WR_RGMII_CTL (0x48485288) for different speed modes? Regards, Vishal + +Hi Vishal, Thanks for your quick response and support. Register values WR_RGMII_CTL under different speed (10, 100, 1000) are both 0x00000000. Results are listed below. ---Speed is 10Mbps--- ---Speed is 100Mbps--- ---Speed is 1000Mbps--- Thanks for your help and hope for your reply. Best Regards, Daniel + +Hi Daniel, Could you also check the CTRL_CORE_CONTROL_IO_1 (0x4A002554) register values? Regards, Vishal + +Hi Daniel, Could you test with below changes in Kernel and check the behavior? Please also check WR_RGMII_CTL register again after this change. diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 6bfd2db25924..64cc7e0d7d6d 100644 +--- a/drivers/net/ethernet/ti/cpsw.c ++++ b/drivers/net/ethernet/ti/cpsw.c +@@ -1168,6 +1168,8 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave, + else if ((phy->speed == 10) && phy_interface_is_rgmii(phy)) + mac_control |= BIT(18); /* In Band mode */ + ++ mac_control |= BIT(18); ++ + if (priv->rx_pause) + mac_control |= BIT(3); + Regards, Vishal + +Hi Vishal, Thanks for your support and help. Sorry for this lately reply due to International Workers' Day in these days. Before applying your advice for changing kernel code, for CTRL_CONTROL_IO_1(0x4A002554) under varied speed, its value is always 0x0003302. Detailed results are here: ---speed is 10Mbps--- ---speed is 100Mbps--- ---speed is 1000Mbps--- After changing kernel, code is shown below. However, there maybe two problems. At first, WR_RGMII_CTL(0x48485288) is still not change, which is 0x00000000. For second, I doubt whether newly added is executed or not. Because added cpsw_info print content is not found in boot log linux_bootlog_afterkernelchange_20200506.log reboot + Stopping NFS status monitor for NFSv2/3 locking.... +[ OK Stopping Session c1 of user root. +[ OK ] Stopped Daily Cleanup of Temporary Directories. +[ OK ] Stopped target Multi-User System. + Stopping Job spooling tools... + Stopping Hardware RNG Entropy Gatherer Daemon... + Stopping strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf... +[ OK ] Stopped target Login Prompts. + Stopping Serial Getty on ttyS0... + Stopping Getty on tty1... +[ OK ] Stopped target Containers. + Stopping Periodic Command Scheduler... + Stopping System Logging Service... + Stopping thermal-zone-init.service... + Stopping Lightning Fast Webserver With Light System Requirements... + Stopping Kernel Logging Service... + Stopping D-Bus System Message Bus... + Stopping User Manager for UID 0... +[ OK ] Stopped Kernel Logging Service. +[ OK ] Stopped Hardware RNG Entropy Gatherer Daemon. +[ OK ] Stopped D-Bus System Message Bus. +[ OK ] Stopped strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Stopped Job spooling tools. +[ OK ] Stopped System Logging Service. +[ OK ] Stopped TI IPC Daemon. +[ OK ] Stopped Periodic Command Scheduler. +[ OK ] Stopped Lightning Fast Webserver With Light System Requirements. +[ OK ] Stopped NFS status monitor for NFSv2/3 locking.. +[ OK ] Stopped Serial Getty on ttyS0. +[ OK ] Stopped Getty on tty1. +[ OK ] Stopped User Manager for UID 0. +[ OK ] Stopped thermal-zone-init.service. +[ OK ] Stopped Session c1 of user root. + Stopping matrix-gui-2.0.service... +[ OK ] Removed slice User Slice of root. + Stopping Login Service... +[ OK ] Removed slice system-getty.slice. + Stopping Permit User Sessions... +[ OK ] Removed slice system-serial\x2dgetty.slice. +[ OK ] Stopped target Host and Network Name Lookups. + Stopping Network Name Resolution... + Stopping RPC Bind Service... +[ OK ] Stopped Login Service. +[ OK ] Stopped RPC Bind Service. +[ OK ] Stopped Network Name Resolution. +[ OK ] Stopped matrix-gui-2.0.service. +[ OK ] Stopped Permit User Sessions. + Stopping gdbserverproxy.service... +[ OK ] Stopped target Network. + Stopping Network Service... +[ OK ] Stopped gdbserverproxy.service. + Stopping rng-tools.service... +[ OK ] Stopped rng-tools.service. + Stopping thttpd.service... +[ OK ] Stopped Network Service. +[ OK ] Stopped thttpd.service. + Stopping telnetd.service... +[ OK ] Stopped telnetd.service. + Stopping weston.service... +[ OK ] Stopped weston.service. +[ OK ] Stopped target Remote File Systems. + Stopping rc.pvr.service... +[ OK ] Stopped rc.pvr.service. + Stopping uim-sysfs.service... +[ OK ] Stopped uim-sysfs.service. +[ OK ] Stopped target Basic System. +[ OK ] Stopped target Paths. +[ OK ] Stopped Forward Password Requests to Wall Directory Watch. +[ OK ] Stopped Dispatch Password Requests to Console Directory Watch. +[ OK ] Stopped target Sockets. +[ OK ] Closed RPCbind Server Activation Socket. +[ OK ] Closed dropbear.socket. +[ OK ] Closed Syslog Socket. +[ OK ] Closed D-Bus System Message Bus Socket. +[ OK ] Stopped target System Initialization. + Stopping Load/Save Random Seed... + Stopping Network Time Synchronization... +[ OK ] Stopped Apply Kernel Variables. +[ OK ] Stopped Update is Completed. +[ OK ] Stopped Rebuild Dynamic Linker Cache. +[ OK ] Stopped Rebuild Journal Catalog. +[ OK ] Stopped Rebuild Hardware Database. + Stopping Update UTMP about System Boot/Shutdown... +[ OK ] Stopped target Slices. +[ OK ] Removed slice User and Session Slice. +[ OK ] Stopped Network Time Synchronization. +[ OK ] Stopped Load/Save Random Seed. +[ OK ] Stopped Update UTMP about System Boot/Shutdown. +[ OK ] Stopped Create Volatile Files and Directories. +[ OK ] Stopped target Local File Systems. + Unmounting /run/user/0... + Unmounting /media/ram... + Unmounting /var/volatile... + Unmounting /run/media/mmcblk0p1... + Unmounting Temporary Directory (/tmp)... +[ OK ] Unmounted /run/user/0. +[ OK ] Unmounted /media/ram. +[ OK ] Unmounted /var/volatile. +[ OK ] Unmounted /run/media/mmcblk0p1. +[ OK ] Unmounted Temporary Directory (/tmp). +[ OK ] Stopped target Swap. +[ OK ] Reached target Unmount All Filesystems. +[ OK ] Stopped target Local File Systems (Pre). +[ OK ] Stopped Create Static Device Nodes in /dev. +[ OK ] Stopped Create System Users. +[ OK ] Stopped Remount Root and Kernel File Systems. +[ OK ] Reached target Shutdown. +[ 166.639592] watchdog: watchdog0: watchdog did not stop! +[ 166.651251] systemd-shutdow: 22 output lines suppressed due to ratelimiting +[ 166.714986] systemd-shutdown[1]: Sending SIGTERM to remaining processes... +[ 166.730871] systemd-journald[92]: Received SIGTERM from PID 1 (systemd-shutdow). +[ 166.835229] systemd-shutdown[1]: Sending SIGKILL to remaining processes... +[ 166.849052] systemd-shutdown[1]: Hardware watchdog 'OMAP Watchdog', version 0 +[ 166.858458] systemd-shutdown[1]: Unmounting file systems. +[ 166.864246] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 166.902970] EXT4-fs (mmcblk0p2): re-mounted. Opts: data=ordered +[ 166.916011] systemd-shutdown[1]: Remounting '/' read-only with options 'data=ordered'. +[ 166.924024] EXT4-fs (mmcblk0p2): re-mounted. Opts: data=ordered +[ 166.936920] systemd-shutdown[1]: All filesystems unmounted. +[ 166.942522] systemd-shutdown[1]: Deactivating swaps. +[ 166.947699] systemd-shutdown[1]: All swaps deactivated. +[ 166.952951] systemd-shutdown[1]: Detaching loop devices. +[ 167.025621] reboot: Restarting system + +U-Boot SPL 2018.01-00566-g0f1ad58-dirty (Apr 28 2020 - 11:19:56) +DRA756-GP ES2.0 +Trying to boot from MMC1 +no pinctrl state for default mode +MMC Device 1 not found +*** Warning - No MMC card found, using default environment + + + +U-Boot 2018.01-00566-g0f1ad58-dirty (Apr 28 2020 - 11:19:56 +0800) + +CPU : DRA756-GP ES2.0 +Model: TI DRA756 +Board: DRA756 ADAS REDRAM: 2 GiB +NAND: 0 MiB +MMC: OMAP SD/MMC: 0 +MMC Device 1 not found +*** Warning - No MMC card found, using default environment + +In: serial@4806a000 +Out: serial@4806a000 +Err: serial@4806a000 +invalid mmc device +Net: Could not get PHY for ethernet@48484000: addr -17123512 + +Warning: ethernet@48484000 using MAC address from ROM +eth0: ethernet@48484000 +Hit any key to stop autoboot: 4 3 2 1 0 +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +** Unable to read file boot.scr ** +232 bytes read in 0 ms +Loaded env from uEnv.txt +Importing environment from mmc0 ... +switch to partitions #0, OK +mmc0 is current device +SD/MMC found on device 0 +4010496 bytes read in 177 ms (21.6 MiB/s) +99222 bytes read in 5 ms (18.9 MiB/s) +## Flattened Device Tree blob at 88000000 + Booting using the fdt blob at 0x88000000 + Loading Device Tree to 8ffe4000, end 8ffff395 ... OK + +Starting kernel ... + +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.14.79-02515-g3438de3-dirty (leadmove@ubuntu) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #4 SMP PREEMPT Wed May 6 14:03:52 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: div instructions available: patching division code +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] OF: fdt: Machine model: LM DRA756 +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] efi: Getting EFI parameters from FDT: +[ 0.000000] efi: UEFI not found. +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB +[ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB +[ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] OF: reserved mem: initialized node ipu1-memory@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB +[ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0x00000000b0000000 +[ 0.000000] OMAP4: Map 0x00000000fed00000 to fe600000 for dram barrier +[ 0.000000] DRA752 ES2.0 +[ 0.000000] percpu: Embedded 15 pages/cpu @eed58000 s31372 r8192 d21876 u61440 +[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 517696 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=/dev/mmcblk0p2 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=128M@0xB0000000 rootfstype=ext4 snd.slots_reserved=1,1 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 1747808K/2077696K available (8192K kernel code, 346K rwdata, 2552K rodata, 2048K init, 282K bss, 34976K reserved, 294912K cma-reserved, 1160192K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc0a00000 (10208 kB) +[ 0.000000] .init : 0xc0e00000 - 0xc1000000 (2048 kB) +[ 0.000000] .data : 0xc1000000 - 0xc1056b58 ( 347 kB) +[ 0.000000] .bss : 0xc1058000 - 0xc109eba0 ( 283 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Tasks RCU enabled. +[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 +[ 0.000000] GIC: Using split EOI/Deactivate mode +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000017] Switching to timer-based delay loop, resolution 162ns +[ 0.000356] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000365] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000816] Console: colour dummy device 80x30 +[ 0.000835] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.000842] This ensures that you still see kernel messages. Please +[ 0.000849] update your kernel commandline. +[ 0.000871] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.000885] pid_max: default: 32768 minimum: 301 +[ 0.000992] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001005] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001533] CPU: Testing write buffer coherency: ok +[ 0.001570] CPU0: Spectre v2: using ICIALLU workaround +[ 0.001762] /cpus/cpu@0 missing clock-frequency property +[ 0.001780] /cpus/cpu@1 missing clock-frequency property +[ 0.001791] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.039869] Setting up static identity map for 0x80200000 - 0x80200060 +[ 0.059881] Hierarchical SRCU implementation. +[ 0.080072] EFI services will not be available. +[ 0.099946] smp: Bringing up secondary CPUs ... +[ 0.170322] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.170327] CPU1: Spectre v2: using ICIALLU workaround +[ 0.170429] smp: Brought up 1 node, 2 CPUs +[ 0.170440] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.170448] CPU: All CPU(s) started in HYP mode. +[ 0.170455] CPU: Virtualization extensions available. +[ 0.171004] devtmpfs: initialized +[ 0.188926] random: get_random_u32 called from bucket_table_alloc+0x108/0x230 with crng_init=0 +[ 0.189272] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.189465] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.189481] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.195234] pinctrl core: initialized pinctrl subsystem +[ 0.195708] DMI not present or invalid. +[ 0.195961] NET: Registered protocol family 16 +[ 0.197102] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.198005] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.398126] cpuidle: using governor ladder +[ 0.398158] cpuidle: using governor menu +[ 0.406281] OMAP GPIO hardware version 0.1 +[ 0.425356] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_gpmc_pins, deferring probe +[ 0.435051] No ATAGs? +[ 0.435123] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.435136] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.435490] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.435500] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.436031] OMAP DMA hardware revision 0.0 +[ 0.445773] edma 43300000.edma: memcpy is disabled +[ 0.448990] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.455792] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.457047] ps_evm_3v3: supplied by evm_12v0 +[ 0.457366] evm_5v0: supplied by evm_12v0 +[ 0.460332] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.460570] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.460810] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.461050] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.461413] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.461627] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.463335] omap_i2c 48070000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c1_pins, deferring probe +[ 0.463374] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c3_pins, deferring probe +[ 0.463410] omap_i2c 4807c000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2000/pinmux@1400/pinmux_i2c5_pins, deferring probe +[ 0.463553] media: Linux media interface: v0.10 +[ 0.463587] Linux video capture interface: v2.00 +[ 0.463665] pps_core: LinuxPPS API ver. 1 registered +[ 0.463673] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.463691] PTP clock support registered +[ 0.463718] EDAC MC: Ver: 3.0.0 +[ 0.464000] dmi: Firmware registration failed. +[ 0.464378] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.464652] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.464984] Advanced Linux Sound Architecture Driver Initialized. +[ 0.465771] clocksource: Switched to clocksource arch_sys_counter +[ 0.473205] NET: Registered protocol family 2 +[ 0.473723] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.473787] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.473913] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.473980] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.474012] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.474131] NET: Registered protocol family 1 +[ 0.474448] RPC: Registered named UNIX socket transport module. +[ 0.474458] RPC: Registered udp transport module. +[ 0.474466] RPC: Registered tcp transport module. +[ 0.474474] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.475680] hw perfevents: no interrupt-affinity property for /pmu, guessing. +[ 0.475897] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.476921] workingset: timestamp_bits=14 max_order=19 bucket_order=5 +[ 0.480893] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.481371] NFS: Registering the id_resolver key type +[ 0.481398] Key type id_resolver registered +[ 0.481407] Key type id_legacy registered +[ 0.481446] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.482752] bounce: pool size: 64 pages +[ 0.482795] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) +[ 0.482805] io scheduler noop registered (default) +[ 0.482814] io scheduler deadline registered +[ 0.482903] io scheduler cfq registered +[ 0.482913] io scheduler mq-deadline registered +[ 0.482921] io scheduler kyber registered +[ 0.487247] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.487803] ti-iodelay 4844a000.padconf: Invalid Coarse delay count (0) (reg=0x00000000) +[ 0.489549] dra7-pcie 51000000.pcie_ep: Linked as a consumer to phy-4a094000.pciephy.1 +[ 0.535267] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.537926] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 44, base_baud = 3000000) is a 8250 +[ 1.472188] console [ttyS0] enabled +[ 1.476532] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 45, base_baud = 3000000) is a 8250 +[ 1.487145] omap_rng 48090000.rng: Random Number Generator ver. 20 +[ 1.496157] connector-hdmi connector@1: failed to find video source +[ 1.512426] brd: module loaded +[ 1.520919] loop: module loaded +[ 1.527680] m25p80 spi0.0: n25q00 (131072 Kbytes) +[ 1.532484] 10 ofpart partitions found on MTD device spi0.0 +[ 1.538106] Creating 10 MTD partitions on "spi0.0": +[ 1.543008] 0x000000000000-0x000000010000 : "QSPI.SPL" +[ 1.548796] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" +[ 1.555232] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" +[ 1.561706] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" +[ 1.568162] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 1.574146] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 1.580779] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 1.587151] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 1.594186] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 1.600194] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 1.607211] libphy: Fixed MDIO Bus: probed +[ 1.665808] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 +[ 1.673501] davinci_mdio 48485000.mdio: no live phy, scanning all +[ 1.775899] davinci_mdio 48485000.mdio: timed out waiting for user access +[ 1.882794] davinci_mdio 48485000.mdio: timed out waiting for idle +[ 1.889042] davinci_mdio: probe of 48485000.mdio failed with error -5 +[ 1.896318] cpsw 48484000.ethernet: No slave[1] phy_id, phy-handle, or fixed-link property +[ 1.904626] cpsw 48484000.ethernet: Detected MACID = 38:0b:3c:40:ea:52 +[ 1.911259] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 +[ 1.917664] cpsw 48484000.ethernet: ALE Table size 1024 +[ 1.922957] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) +[ 1.930848] cpsw 48484000.ethernet: cpsw: Detected MACID = 00:00:00:00:00:a0 +[ 1.939062] i2c /dev entries driver +[ 1.943081] IR NEC protocol handler initialized +[ 1.947665] IR RC5(x/sz) protocol handler initialized +[ 1.952738] IR RC6 protocol handler initialized +[ 1.957306] IR JVC protocol handler initialized +[ 1.961855] IR Sony protocol handler initialized +[ 1.966507] IR SANYO protocol handler initialized +[ 1.971232] IR Sharp protocol handler initialized +[ 1.975971] IR MCE Keyboard/mouse protocol handler initialized +[ 1.981830] IR XMP protocol handler initialized +[ 1.990638] sdhci: Secure Digital Host Controller Interface driver +[ 1.996869] sdhci: Copyright(c) Pierre Ossman +[ 2.001762] sdhci-pltfm: SDHCI platform and OF driver helper +[ 2.008647] sdhci-omap 4809c000.mmc: failed to set system capabilities +[ 2.015807] sdhci-omap 480b4000.mmc: failed to set system capabilities +[ 2.023102] ledtrig-cpu: registered to indicate activity on CPUs +[ 2.032953] NET: Registered protocol family 10 +[ 2.038259] Segment Routing with IPv6 +[ 2.041987] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver +[ 2.048386] NET: Registered protocol family 17 +[ 2.053025] Key type dns_resolver registered +[ 2.057504] omap_voltage_late_init: Voltage driver support not added +[ 2.063888] Power Management for TI OMAP4+ devices. +[ 2.069052] Registering SWP/SWPB emulation handler +[ 2.085877] dmm 4e000000.dmm: workaround for errata i878 in use +[ 2.093424] dmm 4e000000.dmm: initialized all PAT entries +[ 2.099486] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 2.104652] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 2.112082] nand: device found, Manufacturer ID: 0xc2, Chip ID: 0xda +[ 2.118492] nand: Macronix MX30LF2G18AC +[ 2.122349] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 +[ 2.130061] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme +[ 2.135485] 10 ofpart partitions found on MTD device omap2-nand.0 +[ 2.141622] Creating 10 MTD partitions on "omap2-nand.0": +[ 2.147065] 0x000000000000-0x000000020000 : "NAND.SPL" +[ 2.153001] 0x000000020000-0x000000040000 : "NAND.SPL.backup1" +[ 2.159576] 0x000000040000-0x000000060000 : "NAND.SPL.backup2" +[ 2.166155] 0x000000060000-0x000000080000 : "NAND.SPL.backup3" +[ 2.172699] 0x000000080000-0x0000000c0000 : "NAND.u-boot-spl-os" +[ 2.179570] 0x0000000c0000-0x0000001c0000 : "NAND.u-boot" +[ 2.186535] 0x0000001c0000-0x0000001e0000 : "NAND.u-boot-env" +[ 2.192998] 0x0000001e0000-0x000000200000 : "NAND.u-boot-env.backup1" +[ 2.200173] 0x000000200000-0x000000a00000 : "NAND.kernel" +[ 2.213684] 0x000000a00000-0x000010000000 : "NAND.file-system" +[ 2.452080] palmas 0-0058: IRQ missing: skipping irq request +[ 2.486118] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 2.493026] SMPS123: supplied by regulator-dummy +[ 2.500598] SMPS45: supplied by regulator-dummy +[ 2.507194] SMPS6: supplied by regulator-dummy +[ 2.513531] SMPS7: supplied by regulator-dummy +[ 2.520029] SMPS8: supplied by regulator-dummy +[ 2.526352] SMPS9: supplied by regulator-dummy +[ 2.531901] LDO1: supplied by regulator-dummy +[ 2.538344] LDO2: supplied by regulator-dummy +[ 2.544449] random: fast init done +[ 2.547936] LDO3: supplied by regulator-dummy +[ 2.554195] LDO4: supplied by regulator-dummy +[ 2.559389] LDO5: supplied by regulator-dummy +[ 2.564557] LDO6: supplied by regulator-dummy +[ 2.569774] LDO7: supplied by regulator-dummy +[ 2.574949] LDO8: supplied by regulator-dummy +[ 2.580156] LDO9: supplied by regulator-dummy +[ 2.586612] LDOLN: supplied by regulator-dummy +[ 2.592947] LDOUSB: supplied by regulator-dummy +[ 2.601974] GPIO line 508 (CT_CP_HPD) hogged as output/high +[ 2.607719] GPIO line 507 (LS_OE) hogged as output/high +[ 2.613348] pcf857x 0-0020: probed +[ 2.617378] pcf857x 0-0023: probed +[ 2.620856] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 2.656349] tmp102 2-0048: initialized +[ 2.660613] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 2.680588] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 400 kHz +[ 2.686915] DSS: OMAP DSS rev 6.1 +[ 2.690980] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 2.699480] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 2.710332] evm_3v3_sd: supplied by sysen1 +[ 2.775798] mmc0: SDHCI controller on 4809c000.mmc [4809c000.mmc] using ADMA +[ 2.783589] evm_1v8: supplied by smps9 +[ 2.845796] mmc1: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA +[ 2.860319] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 2.867101] [drm] No driver support for vblank timestamp query. +[ 2.873203] [drm] Cannot find any crtc or sizes +[ 2.881790] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0 +[ 2.889638] hctosys: unable to open rtc device (rtc0) +[ 2.895316] vtt_fixed: supplied by evm_3v3_sd +[ 2.899039] mmc0: host does not support reading read-only switch, assuming write-enable +[ 2.901699] mmc0: new high speed SDHC card at address aaaa +[ 2.901942] mmcblk0: mmc0:aaaa SC16G 14.8 GiB +[ 2.904192] mmcblk0: p1 p2 +[ 2.920733] ldousb: disabling +[ 2.923976] ALSA device list: +[ 2.924399] mmc1: new high speed MMC card at address 0001 +[ 2.924631] mmcblk1: mmc1:0001 DG4064 59.2 GiB +[ 2.932427] mmcblk1boot0: mmc1:0001 DG4064 partition 1 4.00 MiB +[ 2.932533] mmcblk1boot1: mmc1:0001 DG4064 partition 2 4.00 MiB +[ 2.932652] mmcblk1rpmb: mmc1:0001 DG4064 partition 3 4.00 MiB +[ 2.954711] No soundcards found. +[ 2.973979] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 2.982189] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 2.997776] devtmpfs: mounted +[ 3.001614] Freeing unused kernel memory: 2048K +[ 3.301579] systemd[1]: System time before build time, advancing clock. +[ 3.343010] systemd[1]: systemd 234 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN default-hierarchy=hybrid) +[ 3.364528] systemd[1]: Detected architecture arm. + +Welcome to Arago 2018.10! + +[ 3.408926] systemd[1]: Set hostname to . +[ 3.722065] random: systemd: uninitialized urandom read (16 bytes read) +[ 3.729035] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ 3.800079] random: systemd: uninitialized urandom read (16 bytes read) +[ 3.808504] systemd[1]: Created slice System Slice. +[ OK ] Created slice System Slice. +[ 3.836247] random: systemd: uninitialized urandom read (16 bytes read) +[ 3.845307] systemd[1]: Mounting POSIX Message Queue File System... + Mounting POSIX Message Queue File System... +[ 3.876432] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ 3.925893] [drm] Cannot find any crtc or sizes +[ 3.930606] systemd[1]: Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket (/dev/log). +[ 3.975304] systemd[1]: Listening on Process Core Dump Socket. +[ OK ] Listening on Process Core Dump Socket. +[ 4.006709] systemd[1]: Created slice system-serial\x2dgetty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. + Mounting Kernel Debug File System... +[ OK ] Created slice system-getty.slice. +[ OK ] Listening on Syslog Socket. +[ OK ] Created slice User and Session Slice. +[ OK ] Reached target Slices. +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Reached target Remote File Systems. +[ OK ] Listening on udev Control Socket. +[ OK ] Reached target Paths. +[ OK ] Reached target Swap. + Mounting Temporary Directory (/tmp)... +[ OK ] Listening on Journal Socket. + Starting Create list of required st��ce nodes for the current kernel... + Starting Load Kernel Modules... + Starting Remount Root and Kernel File Systems... +[ 4.520080] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) + Starting Journal Service... +[ OK ] Listening on udev Kernel Socket. +[ OK ] Mounted Kernel Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory (/tmp). +[ OK ] Started Journal Service. +[ OK ] Started Create list of required sta��vice nodes for the current kernel. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. + Starting Rebuild Hardware Database... + Starting Create System Users... + Mounting Kernel Configuration File System... + Starting Apply Kernel Variables... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted Kernel Configuration File System. +[ OK ] Started Create System Users. +[ OK ] Started Apply Kernel Variables. +[ 5.084408] systemd-journald[93]: Received request to flush runtime journal from PID 1 + Starting Create Static Device Nodes in /dev... +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Started Create Static Device Nodes in /dev. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /var/volatile. +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. + Starting Load/Save Random Seed... +[ OK ] Reached target Local File Systems. + Starting Rebuild Dynamic Linker Cache... + Starting Rebuild Journal Catalog... + Starting Create Volatile Files and Directories... +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Rebuild Journal Catalog. +[ OK ] Started Rebuild Dynamic Linker Cache. +[ OK ] Started Create Volatile Files and Directories. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ OK ] Started Rebuild Hardware Database. + Starting udev Coldplug all Devices... + Starting Update is Completed... +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started Update is Completed. +[ OK ] Started Network Time Synchronization. +[ OK ] Reached target System Time Synchronized. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Reached target System Initialization. +[ 7.038444] at24 2-0050: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ OK ] Started Daily rotation of log files. +[ 7.072229] ov1063x: probe of 2-0037 failed with error -121 +[ 7.086316] at24 2-0054: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ 7.094713] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.094939] omap-des 480a5000.des: will run requests pump with realtime priority +[ 7.119311] CAN device driver interface +[ 7.123591] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=91) +[ 7.124063] c_can_platform 48480000.can: c_can_platform device registered (regs=fa480000, irq=92) +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on RPCbind Server Activation Socket. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ 7.273579] omap_rtc 48838000.rtc: already running +[ 7.279853] omap_rtc 48838000.rtc: registered as rtc0 + Starting Network Service... +[ 7.289882] at24 4-0050: 256 byte 24c02 EEPROM, writable, 1 bytes/write +[ OK ] Listening on D-Bus System Message Bus Socket.[ 7.322066] at24 4-0054: 256 byte 24c02 EEPROM, writable, 1 bytes/write + +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ 7.389768] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 7.427539] vpe 489d0000.vpe: Device registered as /dev/video0 +[ OK ] Started Periodic Command Scheduler. + Starting TI IPC Daemon... +[ 7.484681] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 7.515845] vip 48970000.vip: VPDMA firmware loaded +[ 7.531200] SCSI subsystem initialized + Starting Print notice about GPLv3 packages... + Starting uim-sysfs.service... + Starting RPC Bind Service... +[ OK ] Started Hardware RNG Entropy Gatherer Daemon. +[ OK ] Reached target Containers. +[ 7.601755] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 7.639107] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ OK ] Started strongSwan IPsec IKEv1/IKEv2 daemon using ipsec.conf. +[ OK ] Started Kernel Logging Service. +[ OK ] Started System Logging Service. +[ 7.709135] random: crng init done +[ 7.712631] random: 7 urandom warning(s) missed due to ratelimiting +[ 7.787818] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 7.798857] omap-aes 4b500000.aes: will run requests pump with realtime priority +[ 7.857987] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 7.861551] omap-aes 4b700000.aes: will run requests pump with realtime priority +[ 7.863031] ahci 4a140000.sata: forcing port_map 0x0 -> 0x1 +[ 7.863065] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.863072] ahci 4a140000.sata: flags: 64bit ncq sntf pm led clo only pmp pio slum part ccc apst +[ 7.946779] scsi host0: ahci +[ 7.946978] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 81 +[ 8.084108] NET: Registered protocol family 15 + Starting Login Service... +[ OK ] Started D-Bus System Message Bus. +[ 8.279149] ata1: SATA link down (SStatus 0 SControl 300) +[ 8.300137] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. +[ 8.479160] Initializing XFRM netlink socket +[ 8.517979] net eth1: initializing cpsw version 1.15 (0) +[ OK ] Started Job spooling tools. +[ 8.556857] libphy: PHY not found +[ 8.560282] net eth1: phy "" not found on slave 1, err -19 +[ OK ] Started Network Service. +[ OK ] Started TI IPC Daemon. +[ OK ] Started RPC Bind Service. +[ OK ] Found device /dev/ttyS0. +[ 8.702317] pvrsrvkm: loading out-of-tree module taints kernel. +[ 8.704825] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 8.732146] net eth0: initializing cpsw version 1.15 (0) +[ 8.753374] extcon-usb-gpio: probe of extcon_usb2 failed with error -16 +[ 8.803514] [drm] Initialized pvr 1.14.3699939 20110701 for 56000000.gpu on minor 1 +[ 8.812571] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 8.812582] omap-hdmi-audio omap-hdmi-audio.0.auto: ASoC: no DMI vendor name! +[ 8.960876] OF: /sound0/simple-audio-card,cpu: could not get #sound-dai-cells for /ocp/mcasp@48468000 +[ 8.960884] asoc-simple-card sound0: parse error -22 +[ 8.960900] asoc-simple-card: probe of sound0 failed with error -22 +[ 9.114283] Generic PHY fixed-0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=fixed-0:00, irq=POLL) +[ 9.233127] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. + Starting Network Name Resolution... + Starting Enable and configure wl18xx bluetooth stack... + Starting Permit User Sessions... + Starting Lightning Fast Webserver With Light System Requirements... +[ OK ] Started Login Service. +[ OK ] Started Permit User Sessions. +[ OK ] Started Lightning Fast Webserver With Light System Requirements. +[ OK ] Started Enable and configure wl18xx bluetooth stack. +[ OK ] Started Network Name Resolution. +[ 10.245855] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control off +[ 10.258308] usbcore: registered new interface driver usbfs +[ 10.258348] usbcore: registered new interface driver hub +[ 10.258484] usbcore: registered new device driver usb +[ 10.292237] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.292258] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 10.341468] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 10.370175] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x02010010 +[ 10.386720] xhci-hcd xhci-hcd.1.auto: irq 180, io mem 0x48890000 +[ 10.399819] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 10.415614] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.433066] usb usb1: Product: xHCI Host Controller +[ 10.438006] usb usb1: Manufacturer: Linux 4.14.79-02515-g3438de3-dirty xhci-hcd +[ 10.463701] usb usb1: SerialNumber: xhci-hcd.1.auto +[ 10.478279] hub 1-0:1.0: USB hub found +[ 10.485099] hub 1-0:1.0: 1 port detected +[ 10.495352] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.509610] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 10.528825] xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed +[ 10.543994] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 10.563706] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 +[ 10.581535] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.597550] usb usb2: Product: xHCI Host Controller +[ 10.602456] usb usb2: Manufacturer: Linux 4.14.79-02515-g3438de3-dirty xhci-hcd +[ 10.626008] usb usb2: SerialNumber: xhci-hcd.1.auto +[ 10.638129] hub 2-0:1.0: USB hub found +[ 10.646613] hub 2-0:1.0: 1 port detected +[ OK ] Reached target Sound Card. +[ OK ] Reached target Host and Network Name Lookups. +[ OK ] Started NFS status monitor for NFSv2/3 locking.. +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Reached target Login Prompts. + Starting Synchronize System and HW clocks... +[ OK ] Started uim-sysfs.service. +[ OK ] Started Synchronize System and HW clocks. + Starting rc.pvr.service... +*************************************************************** +*************************************************************** +NOTICE: This file system contains the following GPLv3 packages[ 11.277800] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +: + autoconf + bash-dev + bash + binutils-dev + binutils + bison-dev + bison + cifs-utils + cpio + cpp-symlinks + cpp + dosfstools + elfutils-dev + elfutils + g++-symlinks + g++ + gawk + gcc-symlinks + gcc + gdb + gdbc6x + gdbserver + gettext + glmark2 + gstreamer1.0-libav + gzip + libasm1 + libcairo-perf-utils + libdw1 + libelf1 + libgdbm-compat4 + libgdbm-dev + libgdbm4 + libgettextlib + libgettextsrc + libgmp10 + libidn11 + libmpc3 + libmpfr4 + libreadline-dev + libreadline7 + libunistring2 + m4-dev + m4 + make + nettle + parted + python3-pycairo + swig-dev + swig + which + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +[ OK ] Started rc.pvr.service. +[ OK ] Started Print notice about GPLv3 packages. + Starting weston.service... +[ OK ] Started weston.service. + Starting telnetd.service... +[ OK ] Started telnetd.service. + Starting thttpd.service... +[ OK ] Started thttpd.service. + Starting rng-tools.service... +[ OK ] Started rng-tools.service. + Starting gdbserverproxy.service... +[ OK ] Started gdbserverproxy.service. + Starting matrix-gui-2.0.service... +[ OK ] Started matrix-gui-2.0.service. + Starting thermal-zone-init.service... +[ OK ] Started thermal-zone-init.service. +[ OK ] Reached target Multi-User System. + Starting Update UTMP about System Runlevel Changes... +[ OK ] Started Update UTMP about System Runlevel Changes. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2018.10 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# omapconf read 0x48485288 +00000000 +omapconf: powerdm_deinit(): cpu not supported!!! +omapconf: clockdm_deinit(): cpu not supported!!! +root@dra7xx-evm:~# or dmsg. The approach I update linux kernel is here, which was verified with adding serial usb device module support. Therefore, I am sure kernel file is compile and updated. * modify makefile under tisdk path to avoid linux/.config file coverred * make linux and make linux_install * delete original linux kernel and lib/module filies, then copy with newly generated ones from install path Hope for your reply and thank very much! Best Regards, Daniel + +Hi Daniel, Your procedure to update is correct. Could you try changing cpsw_info() to pr_err() and check the prints? The CTRL_CONTROL_IO_1 and SL_MACCONTROL register look ok. We need to move the pinmux to u-boot and also add iodelay values in u-boot and check the behavior. You can look at TI EVM example in u-boot (board_ti/dra7xx/evm.c, mux_data.h) Regards, Vishal + +Hi Vishal, Thanks for your reply and guidance. For WR_RGMII_CTL, why the valus of this register under different are both 0x00000000 ? Is there any problem reflected by this ? For iodelay, the files I uploaded before and attached here (7752.dra7xx_customed.zip) again. As you can see, in zip file, mux_data.h and customed.c files contains iodelay related code, which are shown in below figures. The delays values are generated with TI pinmux tool, is there any need to compensate the values and how to do the compensation work ? For checking print in boot log, after changing cpsw_info to pr_err, it works and result is shown below. Thanks for your support and hope for your reply ! Best Regards, Daniel + +Does networking work for you in u-boot? setenv ipaddr 192.168.0.111 => ping 192.168.0.110 link up on port 1, speed 100, full duplex Using ethernet@046000000 device host 192.168.0.110 is alive + +Hi Grygorii, Thanks very much for your advice and help. Some background needs to be declare right here. Below figure is posted in another thread mentioned in the topic. TDA2 is connected to Marvell Switch 88E6321(not 88EA6321) port 2. Switch chip is controlled by a MCU running bare-metal code without IP stack. And this local network is not connect to external network. For controlling switch, only port forwarding is achieved between port 5 and port 6. Due to network issue in TDA2 side, port forwarding function is still being verified between port 2 and port 5. When using ping command in u-boot, no signal can be found in EMAC_TXD0 by probing P2_RXD0 whether switch is enabled by MCU or not. So I suppose network is not working in u-boot. Best Regards, Daniel + +Hi Daniel, Can you stop at u-boot and make sure the SL_MACCONTROL and other registers values for different speed mode? Is the clock still at 2.5 MHz at u-boot also? + +hi Daniel, I've asked about u-boot, because it's usually easier to debug in u-boot, but if you need to load MCU FW or there are init races MCU vs DRA7 then it might be not a good choice. Following information you've provided in this thread, there are seems *no issues* in Kernel - all SW does what it should and CPSW side configured properly. But WR_RGMII_CTL is 0 and RGMII link not established (RGMII vs RGMII). There is one thing I'd like to ask you to try/verify - pull up/down configuration of RGMII pins. Note. DRA7 SW design assume pins have to be configured by u-boot only - not Linux Kernel. + +Hi Vishal, Thanks for your reply. There is no clock output. Under different emac speed, {0x48484D84, 0x48485288, 0x4A002554} are identical and equal to {0x00000000, 0x00000000, 0x00003302}. In before measurement, 2.5MHz clock is caused by the process of booting to Linux kernel and reboot to u-boot phase. So, at this time, I just stop at u-boot without booting to Linux kernel. Besides, swith chip is well configured and port connected to DRA756 chip is also configured. Then, I check pinmux registers at uboot for EVMX777G-01-40-00 (evm board) and the customed board. It seems that emac is not configured during uboot. figure - pinmux reg of the customed board figure - reg value of evm board I think problem maybe located at u-boot. And It hope more advices related to u-boot. Thanks very much ! --- 20200515 progress with whole night locating problem --- For evm board, after executing uboot/driver/net/cpsw.c -> cpsw_gmii_sel_dra7xx -> writel(reg, priv->data.gmii_sel), EMAC[0]_TXC is able to output clock. But for out customed board, there is no clock at all when running over the same location. Then reg and reg write value are compared, which are both {0x4a002554, 3302}. So, could you please share any insights about what leads no clock output ? Thanks again. Best Regards, Daniel + +Hi Grygorii, Glad to see your reply and thankful for your advice. In MCU power on sequence, MCU powers on DRA7 after configuring serial port and switch chip. There should be no races for MCU vs DRA7. However, your reply remind me of the importance about switch clock. In posted content or test result, switch clock is not enable. Then I enable switch input clock and do some tests shown below and found interesting results: * switch port 2 connects to DRA7 Result or confusion I want to share with you. * uboot surely has problem of configuring emac, because there is no clock output when directing booting to uboot instead of rebooting to uboot * when enable input clock for switch, emac output clock is 25MHz after Starting kernels... and then it change to 2.5MHz after init cpsw. However, when disable switch input clock, emac output clock keep at 2.5MHz after Starting kernels... * Should switch to be well configured before powering on DRA7 or before DRA7 configuring CPSW module ? Thanks for your insights and hope for your reply again ! Best Regards, Daniel + +Clock not being set in u-boot is discussed in new ticket https://e2e.ti.com/support/processors/f/791/t/906069 + +Hi Daniel, The u-boot no clock issue was root caused to pin mux not being done in u-boot (calibrate_iodelay API failure) This needs to be root caused as the IO lines will have problems without proper iodelay recalibration. Regards, Vishal + diff --git a/data2/text/range/30001+/900771.txt b/data2/text/range/30001+/900771.txt new file mode 100644 index 0000000000000000000000000000000000000000..ec6038f88ad97d52193ab8122b8b583c637af217 --- /dev/null +++ b/data2/text/range/30001+/900771.txt @@ -0,0 +1,300 @@ +Ticket Name: CCS/TDA2EG-17: TDA2 SSD Sparse model fps slow + +Query Text: +Part Number: TDA2EG-17 Tool/software: Code Composer Studio Hi I convert a SSD self-tranined model which detect eye , and I get 65% zero in sparse model. When i detect from camera,i think sparse model is faster than initial. At least, it is same as model from TI origin. Configuration： - 4 eve 1 dsp - deploy.prototxt： keep_top_k: 20 confidence_threshold: 0.15 - tidl_import_JDetNet.txt # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 25 numParamBits = 8 # 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 inElementType = 0 inputNetFile = "_trained_model\deploy.prototxt" inputParamsFile = "_trained_model\ti-custom-cfg1_ssdJacintoNetV2_iter_100000.caffemodel" outputNetFile = "_output_model\tidl_net_jdetNet_ssd.bin" outputParamsFile = "_output_model\tidl_param_jdetNet_ssd.bin" rawSampleInData = 0 preProcType = 4 sampleInData = "_test_image\test.jpg" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Training Log： traininglog.txt affe Network File : _trained_model\deploy.prototxt +Caffe Model File : _trained_model\ti-custom-cfg1_ssdJacintoNetV2_iter_100000.caffemodel +TIDL Network File : _output_model\tidl_net_jdetNet_ssd.bin +TIDL Model File : _output_model\tidl_param_jdetNet_ssd.bin +Name of the Network : ssdJacintoNetV2_deploy +Num Inputs : 1 +Could not find detection_out Params + Num of Layer Detected : 57 + 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , 0 , + 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , 737280 , + 2, TIDL_ConvolutionLayer , conv1a 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , 147456000 , + 3, TIDL_ConvolutionLayer , conv1b 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 80 , 192 , 141557760 , + 4, TIDL_ConvolutionLayer , res2a_branch2a 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 80 , 192 , 1 , 64 , 80 , 192 , 283115520 , + 5, TIDL_ConvolutionLayer , res2a_branch2b 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 80 , 192 , 1 , 64 , 40 , 96 , 141557760 , + 6, TIDL_ConvolutionLayer , res3a_branch2a 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 40 , 96 , 1 , 128 , 40 , 96 , 283115520 , + 7, TIDL_ConvolutionLayer , res3a_branch2b 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 40 , 96 , 1 , 128 , 40 , 96 , 141557760 , + 8, TIDL_PoolingLayer , pool3 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 40 , 96 , 1 , 128 , 20 , 48 , 491520 , + 9, TIDL_ConvolutionLayer , res4a_branch2a 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 20 , 48 , 1 , 256 , 20 , 48 , 283115520 , + 10, TIDL_ConvolutionLayer , res4a_branch2b 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 20 , 48 , 1 , 256 , 10 , 24 , 141557760 , + 11, TIDL_ConvolutionLayer , res5a_branch2a 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 10 , 24 , 1 , 512 , 10 , 24 , 283115520 , + 12, TIDL_ConvolutionLayer , res5a_branch2b 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 10 , 24 , 1 , 512 , 10 , 24 , 141557760 , + 13, TIDL_PoolingLayer , pool6 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 10 , 24 , 1 , 512 , 5 , 12 , 122880 , + 14, TIDL_PoolingLayer , pool7 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , 5 , 12 , 1 , 512 , 3 , 6 , 36864 , + 15, TIDL_PoolingLayer , pool8 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 3 , 6 , 1 , 512 , 2 , 3 , 12288 , + 16, TIDL_PoolingLayer , pool9 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 2 , 3 , 1 , 512 , 1 , 2 , 4096 , + 17, TIDL_ConvolutionLayer , ctx_output1 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 17 , 1 , 128 , 40 , 96 , 1 , 256 , 40 , 96 , 125829120 , + 18, TIDL_ConvolutionLayer , ctx_output2 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 18 , 1 , 512 , 10 , 24 , 1 , 256 , 10 , 24 , 31457280 , + 19, TIDL_ConvolutionLayer , ctx_output3 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 19 , 1 , 512 , 5 , 12 , 1 , 256 , 5 , 12 , 7864320 , + 20, TIDL_ConvolutionLayer , ctx_output4 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 20 , 1 , 512 , 3 , 6 , 1 , 256 , 3 , 6 , 2359296 , + 21, TIDL_ConvolutionLayer , ctx_output5 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 21 , 1 , 512 , 2 , 3 , 1 , 256 , 2 , 3 , 786432 , + 22, TIDL_ConvolutionLayer , ctx_output6 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 22 , 1 , 512 , 1 , 2 , 1 , 256 , 1 , 2 , 262144 , + 23, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_loc 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 23 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , 15728640 , + 24, TIDL_FlattenLayer , ctx_output1/relu_mbox_loc_perm 2, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 16 , 40 , 96 , 1 , 1 , 1 , 61440 , 1 , + 25, TIDL_ConvolutionLayer , ctx_output1/relu_mbox_conf 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 25 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , 15728640 , + 26, TIDL_FlattenLayer , ctx_output1/relu_mbox_conf_perm 2, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 16 , 40 , 96 , 1 , 1 , 1 , 61440 , 1 , + 28, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_loc 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 28 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , 1474560 , + 29, TIDL_FlattenLayer , ctx_output2/relu_mbox_loc_perm 2, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , 1 , + 30, TIDL_ConvolutionLayer , ctx_output2/relu_mbox_conf 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 30 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , 1474560 , + 31, TIDL_FlattenLayer , ctx_output2/relu_mbox_conf_perm 2, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , 1 , + 33, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_loc 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 33 , 1 , 256 , 5 , 12 , 1 , 24 , 5 , 12 , 368640 , + 34, TIDL_FlattenLayer , ctx_output3/relu_mbox_loc_perm 2, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , 1 , + 35, TIDL_ConvolutionLayer , ctx_output3/relu_mbox_conf 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 35 , 1 , 256 , 5 , 12 , 1 , 24 , 5 , 12 , 368640 , + 36, TIDL_FlattenLayer , ctx_output3/relu_mbox_conf_perm 2, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , 1 , + 38, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_loc 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 38 , 1 , 256 , 3 , 6 , 1 , 24 , 3 , 6 , 110592 , + 39, TIDL_FlattenLayer , ctx_output4/relu_mbox_loc_perm 2, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 24 , 3 , 6 , 1 , 1 , 1 , 432 , 1 , + 40, TIDL_ConvolutionLayer , ctx_output4/relu_mbox_conf 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 40 , 1 , 256 , 3 , 6 , 1 , 24 , 3 , 6 , 110592 , + 41, TIDL_FlattenLayer , ctx_output4/relu_mbox_conf_perm 2, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 24 , 3 , 6 , 1 , 1 , 1 , 432 , 1 , + 43, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_loc 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 43 , 1 , 256 , 2 , 3 , 1 , 16 , 2 , 3 , 24576 , + 44, TIDL_FlattenLayer , ctx_output5/relu_mbox_loc_perm 2, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , 1 , + 45, TIDL_ConvolutionLayer , ctx_output5/relu_mbox_conf 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 45 , 1 , 256 , 2 , 3 , 1 , 16 , 2 , 3 , 24576 , + 46, TIDL_FlattenLayer , ctx_output5/relu_mbox_conf_perm 2, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , 1 , + 48, TIDL_ConvolutionLayer , ctx_output6/relu_mbox_loc 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 48 , 1 , 256 , 1 , 2 , 1 , 16 , 1 , 2 , 8192 , + 49, TIDL_FlattenLayer , ctx_output6/relu_mbox_loc_perm 2, 1 , 1 , 48 , x , x , x , x , x , x , x , 49 , 1 , 16 , 1 , 2 , 1 , 1 , 1 , 32 , 1 , + 50, TIDL_ConvolutionLayer , ctx_output6/relu_mbox_conf 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 50 , 1 , 256 , 1 , 2 , 1 , 16 , 1 , 2 , 8192 , + 51, TIDL_FlattenLayer , ctx_output6/relu_mbox_conf_perm 2, 1 , 1 , 50 , x , x , x , x , x , x , x , 51 , 1 , 16 , 1 , 2 , 1 , 1 , 1 , 32 , 1 , + 53, TIDL_ConcatLayer , mbox_loc 2, 6 , 1 , 24 , 29 , 34 , 39 , 44 , 49 , x , x , 53 , 1 , 1 , 1 , 61440 , 1 , 1 , 1 , 69200 , 1 , + 54, TIDL_ConcatLayer , mbox_conf 2, 6 , 1 , 26 , 31 , 36 , 41 , 46 , 51 , x , x , 54 , 1 , 1 , 1 , 61440 , 1 , 1 , 1 , 69200 , 1 , + 56, TIDL_DetectionOutputLayer , detection_out 2, 2 , 1 , 53 , 54 , x , x , x , x , x , x , 56 , 1 , 1 , 1 , 69200 , 1 , 1 , 1 , 560 , 1 , +Total Giga Macs : 2.1931 +複製了 1 個檔案。 + +Processing config file .\tempDir\qunat_stats_config.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , +0 , 0 , 1 , 3 , 320 , 768 , + 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 80 , 192 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 80 , 192 , 1 , 64 , 80 , 192 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 80 , 192 , 1 , 64 , 40 , 96 , + 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 40 , 96 , 1 , 128 , 40 , 96 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 40 , 96 , 1 , 128 , 40 , 96 , + 8, TIDL_PoolingLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 40 , 96 , 1 , 128 , 20 , 48 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 20 , 48 , 1 , 256 , 20 , 48 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 256 , 20 , 48 , 1 , 256 , 10 , 24 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 10 , 24 , 1 , 512 , 10 , 24 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 512 , 10 , 24 , 1 , 512 , 10 , 24 , + 13, TIDL_PoolingLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 512 , 10 , 24 , 1 , 512 , 5 , 12 , + 14, TIDL_PoolingLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 512 , +5 , 12 , 1 , 512 , 3 , 6 , + 15, TIDL_PoolingLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , +3 , 6 , 1 , 512 , 2 , 3 , + 16, TIDL_PoolingLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , +2 , 3 , 1 , 512 , 1 , 2 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 17 , 1 , 128 , 40 , 96 , 1 , 256 , 40 , 96 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 18 , 1 , 512 , 10 , 24 , 1 , 256 , 10 , 24 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 19 , 1 , 512 , +5 , 12 , 1 , 256 , 5 , 12 , + 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 20 , 1 , 512 , +3 , 6 , 1 , 256 , 3 , 6 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 21 , 1 , 512 , +2 , 3 , 1 , 256 , 2 , 3 , + 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 22 , 1 , 512 , +1 , 2 , 1 , 256 , 1 , 2 , + 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 23 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , + 24, TIDL_FlattenLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 16 , 40 , 96 , 1 , 1 , 1 ,61440 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 25 , 1 , 256 , 40 , 96 , 1 , 16 , 40 , 96 , + 26, TIDL_FlattenLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 16 , 40 , 96 , 1 , 1 , 1 ,61440 , + 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 28 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , + 28, TIDL_FlattenLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , + 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 30 , 1 , 256 , 10 , 24 , 1 , 24 , 10 , 24 , + 30, TIDL_FlattenLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , + 31, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 33 , 1 , 256 , +5 , 12 , 1 , 24 , 5 , 12 , + 32, TIDL_FlattenLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 24 , +5 , 12 , 1 , 1 , 1 , 1440 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 35 , 1 , 256 , +5 , 12 , 1 , 24 , 5 , 12 , + 34, TIDL_FlattenLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 24 , +5 , 12 , 1 , 1 , 1 , 1440 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 38 , 1 , 256 , +3 , 6 , 1 , 24 , 3 , 6 , + 36, TIDL_FlattenLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 24 , +3 , 6 , 1 , 1 , 1 , 432 , + 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 40 , 1 , 256 , +3 , 6 , 1 , 24 , 3 , 6 , + 38, TIDL_FlattenLayer , 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 24 , +3 , 6 , 1 , 1 , 1 , 432 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 43 , 1 , 256 , +2 , 3 , 1 , 16 , 2 , 3 , + 40, TIDL_FlattenLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 16 , +2 , 3 , 1 , 1 , 1 , 96 , + 41, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 45 , 1 , 256 , +2 , 3 , 1 , 16 , 2 , 3 , + 42, TIDL_FlattenLayer , 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 16 , +2 , 3 , 1 , 1 , 1 , 96 , + 43, TIDL_ConvolutionLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 48 , 1 , 256 , +1 , 2 , 1 , 16 , 1 , 2 , + 44, TIDL_FlattenLayer , 1, 1 , 1 , 48 , x , x , x , x , x , x , x , 49 , 1 , 16 , +1 , 2 , 1 , 1 , 1 , 32 , + 45, TIDL_ConvolutionLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 50 , 1 , 256 , +1 , 2 , 1 , 16 , 1 , 2 , + 46, TIDL_FlattenLayer , 1, 1 , 1 , 50 , x , x , x , x , x , x , x , 51 , 1 , 16 , +1 , 2 , 1 , 1 , 1 , 32 , + 47, TIDL_ConcatLayer , 1, 6 , 1 , 24 , 29 , 34 , 39 , 44 , 49 , x , x , 53 , 1 , 1 , +1 ,61440 , 1 , 1 , 1 ,69200 , + 48, TIDL_ConcatLayer , 1, 6 , 1 , 26 , 31 , 36 , 41 , 46 , 51 , x , x , 54 , 1 , 1 , +1 ,61440 , 1 , 1 , 1 ,69200 , + 49, TIDL_DetectionOutputLayer , 1, 2 , 1 , 53 , 54 , x , x , x , x , x , x , 56 , 1 , 1 , +1 ,69200 , 1 , 1 , 1 , 560 , + 50, TIDL_DataLayer , 0, 1 , -1 , 56 , x , x , x , x , x , x , x , 0 , 1 , 1 , +1 , 560 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs + ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 2 72 72 72 32 32 32 3 32 + 3 1 8 1 3 12 5 5184 1024 + 1 + 3 40 34 40 32 32 32 8 8 + 8 4 8 1 2 12 5 1360 1024 + 1 + 4 40 22 40 32 20 32 32 64 + 32 8 8 1 4 6 4 880 640 + 1 + 5 40 22 40 32 20 32 16 16 + 16 8 8 1 2 6 4 880 640 + 1 + 6 40 22 40 32 20 32 64 128 + 64 8 8 1 8 3 2 880 640 + 1 + 7 40 22 40 32 20 32 32 32 + 32 8 8 1 4 3 2 880 640 + 1 + 9 56 22 56 48 20 48 128 256 + 128 7 8 1 19 1 1 1232 960 + 1 + 10 56 22 56 48 20 48 64 64 + 64 7 8 1 10 1 1 1232 960 + 1 + 11 40 12 40 32 10 32 256 512 + 256 8 8 1 32 1 1 480 320 + 1 + 12 40 12 40 32 10 32 128 128 + 128 8 8 1 16 1 1 480 320 + 1 + 17 32 20 32 32 20 32 128 256 + 128 8 8 1 16 3 2 640 640 + 1 + 18 32 10 32 32 10 32 512 256 + 512 8 8 1 64 1 1 320 320 + 1 + 19 16 5 16 16 5 16 512 256 + 512 8 8 1 64 1 1 80 80 + 1 + 20 6 3 6 6 3 6 512 256 + 512 32 32 1 16 1 1 18 18 + 1 + 21 3 2 3 3 2 3 512 256 + 512 32 32 1 16 1 1 6 6 + 1 + 22 2 1 2 2 1 2 512 256 + 512 32 32 1 16 1 1 2 2 + 1 + 23 96 4 96 96 4 96 256 16 + 256 32 8 1 8 1 10 384 384 + 1 + 25 96 4 96 96 4 96 256 16 + 256 32 8 1 8 1 10 384 384 + 1 + 27 24 10 24 24 10 24 256 24 + 256 32 24 1 8 1 1 240 240 + 1 + 29 24 10 24 24 10 24 256 24 + 256 32 24 1 8 1 1 240 240 + 1 + 31 12 5 12 12 5 12 256 24 + 256 32 24 1 8 1 1 60 60 + 1 + 33 12 5 12 12 5 12 256 24 + 256 32 24 1 8 1 1 60 60 + 1 + 35 6 3 6 6 3 6 256 24 + 256 32 24 1 8 1 1 18 18 + 1 + 37 6 3 6 6 3 6 256 24 + 256 32 24 1 8 1 1 18 18 + 1 + 39 3 2 3 3 2 3 256 16 + 256 32 16 1 8 1 1 6 6 + 1 + 41 3 2 3 3 2 3 256 16 + 256 32 16 1 8 1 1 6 6 + 1 + 43 2 1 2 2 1 2 256 16 + 256 32 16 1 8 1 1 2 2 + 1 + 45 2 1 2 2 1 2 256 16 + 256 32 16 1 8 1 1 2 2 + 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 254 , TIDL_BatchNormLayer , PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 2 : Out Q : 5401 , TIDL_ConvolutionLayer, PASSED #MMACs = 147.46, 84.05, Sparsity : 43.00 + Layer 3 : Out Q : 4991 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 47.19, Sparsity : 66.67 + Layer 4 : Out Q : 7339 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 74.53, Sparsity : 73.68 + Layer 5 : Out Q : 4613 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 42.46, Sparsity : 70.01 + Layer 6 : Out Q : 5042 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 48.32, Sparsity : 82.93 + Layer 7 : Out Q : 24908 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 26.85, Sparsity : 81.03 + Layer 8 :TIDL_PoolingLayer, PASSED #MMACs = 0.12, 0.12, Sparsity : 0.00 + Layer 9 : Out Q : 3781 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 4.07, Sparsity : 98.56 + Layer 10 : Out Q : 4237 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 2.05, Sparsity : 98.55 + Layer 11 : Out Q : 6494 , TIDL_ConvolutionLayer, PASSED #MMACs = 283.12, 1.30, Sparsity : 99.54 + Layer 12 : Out Q : 16205 , TIDL_ConvolutionLayer, PASSED #MMACs = 141.56, 0.64, Sparsity : 99.55 + Layer 13 :TIDL_PoolingLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 14 :TIDL_PoolingLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 15 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 16 :TIDL_PoolingLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 17 : Out Q : 12539 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 49.66, Sparsity : 60.53 + Layer 18 : Out Q : 13994 , TIDL_ConvolutionLayer, PASSED #MMACs = 31.46, 1.03, Sparsity : 96.73 + Layer 19 : Out Q : 13587 , TIDL_ConvolutionLayer, PASSED #MMACs = 7.86, 0.08, Sparsity : 99.04 + Layer 20 : Out Q : 121993 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.36, 2.36, Sparsity : 0.00 + Layer 21 : Out Q : 6787132 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.79, 0.79, Sparsity : 0.00 + Layer 22 : Out Q : 6812250 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.26, 0.26, Sparsity : 0.00 + Layer 23 : Out Q : 2013 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.73, 15.73, Sparsity : 0.00 + Layer 24 :TIDL_FlattenLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 25 : Out Q : 2326 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.73, 15.73, Sparsity : 0.00 + Layer 26 :TIDL_FlattenLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 27 : Out Q : 2848 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.47, 1.47, Sparsity : 0.00 + Layer 28 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 29 : Out Q : 3505 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.47, 1.47, Sparsity : 0.00 + Layer 30 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 31 : Out Q : 5687 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 32 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 33 : Out Q : 4071 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.37, 0.37, Sparsity : 0.00 + Layer 34 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 35 : Out Q : 12784 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.11, 0.11, Sparsity : 0.00 + Layer 36 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 37 : Out Q : 6509 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.11, 0.11, Sparsity : 0.00 + Layer 38 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 39 : Out Q : 886003470 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 40 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 41 : Out Q : 949796193 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 42 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 43 : Out Q : 989614478 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 44 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 45 : Out Q : 927051167 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 46 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 47 : Out Q : 2021 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 48 : Out Q : 2335 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 49 : #MMACs = 0.00, 0.00, Sparsity : 0.00 +End of config list found ! + Result： Log： runlog.txt fps 0.27x ======================================= Q1：Are layersGroupId & conv2dKernelType correct ? Q2：I reference link https://e2e.ti.com/support/processors/f/791/t/681674, it is not useful. why ? Q3：anything would cause fps down when training self-model ? Thanks, Ting. + +Responses: +Hi Ting, 1. We need "deploy.prototxt" of your model to confirm layersGroupId & conv2dKernelType correct. 2. You can refer to FAQ 21 and 22 in the TIDL user guide to correctly set and conform the layersGroupId & conv2dKernelType parameters. 3. Yes, setting wrong parameters to layersGroupId & conv2dKernelType can cause fps down. Thanks, Praveen + +Hi Praveen 1. deploy.prototxt： 1263.deploy.7z 2. It is said "only DetectionOutputLayer should run on DSP and rest of the all the layes on EVE in the SSD network", but setting in link is different from it. why ? thanks for replying and helping us to check model from deploy.prototxt. Ting + +Hi Ting, Yes, you can follow those settings suggested in the TIDL user guide because the settings suggested in the user guide are for the latest release. The e2e link referred is based on some old release in which some of the layers are not optimized on EVE core at that time so suggested to run those on DSP core, but in the latest release all the layers are optimized on EVE core except the DetectionOutput layer. Hence in the latest release user guide it is said that "only DetectionOutputLayer should run on DSP and rest of the all the layes on EVE in the SSD network" . Please try with this suggestion and let us know the results. Thanks, Praveen + +Hi Praveen I follow those settings suggested in the TIDL user guide, but i still get low fps ( 0.4x - 0.6x ). In training step, we have three steps, i can get normal fps at initial step, like 18 - 20. But when i train at L1 or sparse, i will get low fps ( 0.4x - 0.6x ). Q：Is it should higher fps in L1 and sparse than initial ? why ? Thanks, Ting + +Hi Ting, Could you please provide import logs in these cases to check the issue Thanks, Praveen + +Hi Praveen 0505_importTool.7z 1. deploy.prototxt 2. converting log 3. running log 4. import.txt above file, if need anything else, please tell me. thanks for replying Ting + +Hi Ting, Thanks for sharing the logs but we did not get much required info from these logs, so could you please the entire training log (all stages) then we can look at the sparsity and get an idea. Regards, Praveen + diff --git a/data2/text/range/30001+/912697.txt b/data2/text/range/30001+/912697.txt new file mode 100644 index 0000000000000000000000000000000000000000..025986a73098adff1f66285188f72246dea562a8 --- /dev/null +++ b/data2/text/range/30001+/912697.txt @@ -0,0 +1,3710 @@ +Ticket Name: Compiler/TDA2PXEVM: How to config RGMII to a switch without MDIO (2PX) + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI C/C++ Compiler Dear support team, Version :PROCESSOR_SDK_VISION_03_07_00_00 --- BIOS --- WIN10; I have a customer board the MCU is TDA2PX , The RGMII connected a switch(sja1105p) directly, as shown as below: I did some modifications as per friendly person's advice in this forums. as shown as below : 1)Enable 'Dual MAC' via uncomment below 3 line in file config.bld("C:\PROCESSOR_SDK_VISION_03_07_00_00\ti_components\networking\nsp_gmacsw_4_16_01_01\packages\ti\nsp\drv") and rebuild NSP according to support document. ' tiDspCommonCopts += " -DDUAL_MAC_MODE "; tiArmCommonCopts += " -DDUAL_MAC_MODE "; gccCommonCopts += " -DDUAL_MAC_MODE "; ' 2)Modifications in file "ndk_nsp_hooks.c" add "pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY;" and "pGMACSWConfig->macInitCfg[i].macConnectionType =MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL;" in function "GMACSW_getConfig()"; 3)Print some register info via uart , please find the file in attachment 4)Davinci config switch : after above all modifications , Client CANOE send arp package to the static IP "192.168.1.100(static IP for TDA2PX)" but can not get response from TDA , I can observed "GOOD_RX_FRAMES" was increasing but "GOOD_TX_FRAMES" kept zero: '' [HOST ] 70.558348 s: network_ctrl_tsk.c line 281 GOOD_TX_FRAMES Reg: 0 HAHAHAHHAHAH [HOST ] 70.558348 s: network_ctrl_tsk.c line 282 GOOD_RX_FRAMES Reg: 4F HAHAHAHHAHAH " I want to confirm are these sufficient for TDA2px to work as RGMII? Is there any direction I should follow to find a solution to resolve this question? I have uploaded the uart info in attachment. Any reply is important for me . Thank you very much. Best regards. Lan. uartInfo.txt network_ctrl_tsk.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/** + ****************************************************************************** + * \file networkCtrl_tsk.c + * + ******************************************************************************* + */ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "network_ctrl_priv.h" +#include + +#define NETWORK_CTRL_TSK_STACK_SIZE (16*KB) +#define NETWORK_CTRL_TSK_PRI (4) + + +/** + ******************************************************************************* + * \brief Stack + ******************************************************************************* + */ +#pragma DATA_ALIGN(gNetworkCtrl_tskStack, 32) +#pragma DATA_SECTION(gNetworkCtrl_tskStack, ".bss:taskStackSection") +UInt8 gNetworkCtrl_tskStack[NETWORK_CTRL_TSK_STACK_SIZE]; + +/** + ******************************************************************************* + * \brief stores all module related information + ******************************************************************************* + */ +NetworkCtrl_Obj gNetworkCtrl_obj; + +Void NetworkCtrl_cmdHandlerUnsupportedCmd(char *cmd, UInt32 prmSize) +{ + UInt8 *pBuf; + Int32 status; + + /* alloc tmp buffer for parameters */ + if(prmSize) + { + pBuf = Utils_memAlloc( UTILS_HEAPID_DDR_CACHED_SR, prmSize, 32); + UTILS_assert(pBuf != NULL); + + /* read parameters */ + NetworkCtrl_readParams(pBuf, prmSize); + + Vps_printf(" NETWORK_CTRL: %s: UNSUPPORTED CMD (prmSize=%d) !!!\n", cmd, prmSize); + + status = Utils_memFree( UTILS_HEAPID_DDR_CACHED_SR, pBuf, prmSize); + UTILS_assert(status==0); + } + + /* send response */ + NetworkCtrl_writeParams(NULL, 0, (UInt32)-1); +} + +Int32 NetworkCtrl_registerHandler(char *cmd, NetworkCtrl_Handler handler) +{ + NetworkCtrl_Obj *pObj = &gNetworkCtrl_obj; + int i; + int firstFreeIdx; + + firstFreeIdx = -1; + + /* check if command is already registered */ + for(i=0; icmdHandler[i].handler) + { + if(strncmp( + pObj->cmdHandler[i].cmd, + cmd, + NETWORK_CTRL_CMD_STRLEN_MAX) + ==0) + { + /* command already register, exit with error */ + return -1; + } + } + else + { + if(firstFreeIdx==-1) + { + firstFreeIdx = i; + } + } + } + + /* no space to register command */ + if(firstFreeIdx==-1) + return -1; + + /* command not registered, register it */ + pObj->cmdHandler[firstFreeIdx].handler = handler; + strcpy(pObj->cmdHandler[firstFreeIdx].cmd, cmd); + + return 0; +} + +Int32 NetworkCtrl_unregisterHandler(char *cmd) +{ + NetworkCtrl_Obj *pObj = &gNetworkCtrl_obj; + int i; + + /* check if command is already registered */ + for(i=0; icmdHandler[i].handler) + { + if(strncmp( + pObj->cmdHandler[i].cmd, + cmd, + NETWORK_CTRL_CMD_STRLEN_MAX) + ==0) + { + /* command found, unregister it */ + pObj->cmdHandler[i].handler = NULL; + pObj->cmdHandler[i].cmd[0] = 0; + } + } + } + + return 0; +} + +Int32 NetworkCtrl_readParams(UInt8 *pPrm, UInt32 prmSize) +{ + NetworkCtrl_Obj *pObj = &gNetworkCtrl_obj; + Int32 status = SYSTEM_LINK_STATUS_SOK; + + if(prmSize) + { + status = Network_read(&pObj->sockObj, pPrm, &prmSize); + + if(status<0) + { + Vps_printf( + " NETWORK_CTRL: Network_read() failed to read parameters (port=%d) !!!\n", + pObj->serverPort); + } + } + + return status; +} + +Int32 NetworkCtrl_writeParams(UInt8 *pPrm, UInt32 prmSize, UInt32 returnStatus) +{ + NetworkCtrl_Obj *pObj = &gNetworkCtrl_obj; + Int32 status; + + pObj->cmdBuf.prmSize = prmSize; + pObj->cmdBuf.returnValue = returnStatus; + pObj->cmdBuf.flags = NETWORK_CTRL_FLAG_ACK; + + status = Network_write(&pObj->sockObj, (UInt8*)&pObj->cmdBuf, sizeof(pObj->cmdBuf)); + + if(status<0) + { + Vps_printf( + " NETWORK_CTRL: Network_write() failed to write response header (port=%d) !!!\n", + pObj->serverPort); + + return status; + } + + if(prmSize) + { + status = Network_write(&pObj->sockObj, pPrm, prmSize); + + if(status<0) + { + Vps_printf( + " NETWORK_CTRL: Network_write() failed to write parameters (port=%d) !!!\n", + pObj->serverPort); + } + } + + return status; +} +#define WR_MEM_32(addr,data) *(volatile unsigned int *)(addr) = (unsigned int)(data) +#define RD_MEM_32(addr) *(volatile unsigned int *)(addr) +Void NetworkCtrl_tskMain(UArg arg0, UArg arg1) +{ + NetworkCtrl_Obj *pObj = (NetworkCtrl_Obj*)arg0; + Int32 status; + volatile UInt32 dataSize; + UInt32 MDIO_CtronlRegValueTemp = 0; + UInt32 CPSW_CONTROLRegValueTemp = 0; + UInt32 CTRL_CORE_SMA_SW_1RegValueTemp = 0; + + + Vps_printf( + " NETWORK_CTRL: Starting Server (port=%d) !!!\n", pObj->serverPort + ); + + Network_sessionOpen(NULL); + + status = Network_open(&pObj->sockObj, pObj->serverPort); + UTILS_assert(status==0); + + Vps_printf( + " NETWORK_CTRL: Starting Server ... DONE (port=%d) !!!\n", pObj->serverPort + ); + + while(!gNetworkCtrl_obj.tskExit) + { + status = Network_waitConnect(&pObj->sockObj, 1000); + + MDIO_CtronlRegValueTemp = RD_MEM_32(0x48485004); + Vps_printf("network_ctrl_tsk.c line 274 MDIO_Control Reg : %X HAHAHAHHAHAH",MDIO_CtronlRegValueTemp);//Lan + Vps_printf("network_ctrl_tsk.c line 275 CTRL_CORE_PAD_RGMII0_RXC Reg : %X HAHAHAHHAHAH",RD_MEM_32(0x4A003668));//Lan + Vps_printf("network_ctrl_tsk.c line 276 CTRL_CORE_PAD_RGMII0_TXC Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4A003650));//Lan + Vps_printf("network_ctrl_tsk.c line 277 CONFIG_REG_2 IODelay Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4844A014));//Lan + Vps_printf("network_ctrl_tsk.c line 278 RX_CRC_ERRORS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484910)); + Vps_printf("network_ctrl_tsk.c line 279 RX_DMA_OVERRUNS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4848498C)); + Vps_printf("network_ctrl_tsk.c line 280 TX_UNDERRUN Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4848495C)); + Vps_printf("network_ctrl_tsk.c line 281 GOOD_TX_FRAMES Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484934)); + Vps_printf("network_ctrl_tsk.c line 282 GOOD_RX_FRAMES Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484900)); + Vps_printf("network_ctrl_tsk.c line 283 CPSW_SOFT_IDLE Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484014)); + CTRL_CORE_SMA_SW_1RegValueTemp = RD_MEM_32(0x4A002534); + Vps_printf("network_ctrl_tsk.c line 285 CTRL_CORE_SMA_SW_1 Reg: %X HAHAHAHHAHAH",CTRL_CORE_SMA_SW_1RegValueTemp); +// if((CTRL_CORE_SMA_SW_1RegValueTemp & 0x06000000) == 0) +// { +// CTRL_CORE_SMA_SW_1RegValueTemp |= 0x06000000; +// WR_MEM_32(0x4A002534,CTRL_CORE_SMA_SW_1RegValueTemp);//enable RGMII port1 and port2 Internal delay +// } + + /*CPSW_CONTROL*/ + CPSW_CONTROLRegValueTemp = RD_MEM_32(0x48484004); + Vps_printf("network_ctrl_tsk.c line 294 CPSW_CONTROL Reg: %X HAHAHAHHAHAH",CPSW_CONTROLRegValueTemp); +// if((CPSW_CONTROLRegValueTemp & 0x01) == 0) +// { +// CPSW_CONTROLRegValueTemp |= 0x01;//FIFO_LOOPBACK +// WR_MEM_32(0x48484004,CPSW_CONTROLRegValueTemp); +// } + + // if((MDIO_CtronlRegValueTemp & (UInt32)0x40000000) != 0) + // { + // MDIO_CtronlRegValueTemp &= 0xBFFFFFFF; + // WR_MEM_32(0x48485004,0x40000000); + // } + Vps_printf("network_ctrl_tsk.c line 305 ALE_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D08)); + Vps_printf("network_ctrl_tsk.c line 306 CPSW_FLOW_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484024)); + Vps_printf("network_ctrl_tsk.c line 307 CPDMA_TX_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484804)); + Vps_printf("network_ctrl_tsk.c line 308 CPDMA_RX_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484814)); + Vps_printf("network_ctrl_tsk.c line 309 CPDMA_DMASTATUS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484824)); + Vps_printf("network_ctrl_tsk.c line 310 ALE_PORTCTL0 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D40)); + Vps_printf("network_ctrl_tsk.c line 311 ALE_PORTCTL1 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D44)); + Vps_printf("network_ctrl_tsk.c line 312 ALE_PORTCTL2 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D48)); + Vps_printf("network_ctrl_tsk.c line 313 ALE_PORTCTL3 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D4C)); + Vps_printf("network_ctrl_tsk.c line 314 ALE_PORTCTL4 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D50)); + Vps_printf("network_ctrl_tsk.c line 315 ALE_PORTCTL5 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484D54)); + Vps_printf("network_ctrl_tsk.c line 316 SL_MACCONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484DC4)); + Vps_printf("network_ctrl_tsk.c line 317 SL_MACSTATUS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484DC8)); + Vps_printf("network_ctrl_tsk.c line 318 MDIO_ALIVE Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48485008)); + Vps_printf("network_ctrl_tsk.c line 319 WR_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48485208)); + Vps_printf("network_ctrl_tsk.c line 320 P0_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484100)); + Vps_printf("network_ctrl_tsk.c line 321 P0_TX_IN_CTL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484110)); + Vps_printf("network_ctrl_tsk.c line 322 P0_PORT_VLAN Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484114)); + Vps_printf("network_ctrl_tsk.c line 323 P1_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484200)); + Vps_printf("network_ctrl_tsk.c line 324 P1_TX_IN_CTL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484210)); + Vps_printf("network_ctrl_tsk.c line 325 P1_PORT_VLAN Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484214)); + Vps_printf("network_ctrl_tsk.c line 326 P2_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484300)); + Vps_printf("network_ctrl_tsk.c line 327 P2_TX_IN_CTL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484310)); + Vps_printf("network_ctrl_tsk.c line 328 P2_PORT_VLAN Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484314)); + Vps_printf("network_ctrl_tsk.c line 329 WR_C0_TX_IMAX Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48485274)); + Vps_printf("network_ctrl_tsk.c line 330 WR_RGMII_CTL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48485288)); + Vps_printf("network_ctrl_tsk.c line 331 WR_STATUS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4848528C)); + Vps_printf("network_ctrl_tsk.c line 332 CPTS_CONTROL Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484C04)); + + UInt32 ALE_PORTCTL1L_RegTemp = RD_MEM_32(0x48484D44); + if((ALE_PORTCTL1L_RegTemp & 0x03) == 0) + { + ALE_PORTCTL1L_RegTemp |= 0x03; + WR_MEM_32(0x48484D44,ALE_PORTCTL1L_RegTemp); + } + // UInt32 ALE_PORTCTL2L_RegTemp = RD_MEM_32(0x48484D48); + // if((ALE_PORTCTL2L_RegTemp & 0x03) == 0) + // { + // ALE_PORTCTL2L_RegTemp |= 0x03; + // WR_MEM_32(0x48484D48,ALE_PORTCTL2L_RegTemp); + // } + + if(status<0) + break; + + if(status==0) + continue; + + Vps_printf("network_ctrl_tsk.c line274 Connected successfulHAHAHAHAHAHHAHAHAHAH "); + dataSize = sizeof(pObj->cmdBuf); + + /* read command header */ + status = Network_read(&pObj->sockObj, (UInt8*)&pObj->cmdBuf, (UInt32*)&dataSize); + + if(status==SYSTEM_LINK_STATUS_SOK && dataSize==sizeof(pObj->cmdBuf)) + { + /* handle command */ + if(pObj->cmdBuf.header != NETWORK_CTRL_HEADER) + { + Vps_printf(" NETWORK_CTRL: Invalid header received (port=%d) !!!\n", pObj->serverPort); + } + else + { + Bool isCmdHandled; + int i; + + isCmdHandled = FALSE; + + /* valid header received */ + for(i=0; icmdHandler[i].cmd, + pObj->cmdBuf.cmd, + NETWORK_CTRL_CMD_STRLEN_MAX) + ==0) + { + /* matched a register command */ + + if(pObj->cmdHandler[i].handler) + { + Vps_printf(" NETWORK_CTRL: Received command [%s], with %d bytes of parameters\n", + pObj->cmdBuf.cmd, + pObj->cmdBuf.prmSize + ); + + pObj->cmdHandler[i].handler( + pObj->cmdBuf.cmd, + pObj->cmdBuf.prmSize + ); + + Vps_printf(" NETWORK_CTRL: Sent response for command [%s], with %d bytes of parameters\n", + pObj->cmdBuf.cmd, + pObj->cmdBuf.prmSize + ); + + isCmdHandled = TRUE; + break; + } + } + } + + if(isCmdHandled == FALSE) + { + /* if command is not handled, then read the params and ACK it with error */ + NetworkCtrl_cmdHandlerUnsupportedCmd( + pObj->cmdBuf.cmd, + pObj->cmdBuf.prmSize + ); + } + } + } + else + { + Vps_printf(" NETWORK_CTRL: recv() failed (port=%d) !!!\n", pObj->serverPort); + } + + /* close socket */ + Network_close(&pObj->sockObj, FALSE); + } + + Vps_printf( + " NETWORK_CTRL: Closing Server (port=%d) !!!\n", pObj->serverPort + ); + + Network_close(&pObj->sockObj, TRUE); + + Network_sessionClose(NULL); + + Vps_printf( + " NETWORK_CTRL: Closing Server ... DONE (port=%d) !!!\n", pObj->serverPort + ); +} + +#ifdef ENABLE_NETWORK_LOG +Int32 NetworkCons_init(); +Int32 NetworkCons_deInit(); +#endif + +Int32 NetworkCtrl_init() +{ + memset(&gNetworkCtrl_obj, 0, sizeof(gNetworkCtrl_obj)); + + gNetworkCtrl_obj.serverPort = NETWORK_CTRL_SERVER_PORT; + + NetworkCtrl_registerHandler("echo", NetworkCtrl_cmdHandlerEcho); + NetworkCtrl_registerHandler("mem_rd", NetworkCtrl_cmdHandlerMemRd); + NetworkCtrl_registerHandler("mem_wr", NetworkCtrl_cmdHandlerMemWr); + NetworkCtrl_registerHandler("mem_save", NetworkCtrl_cmdHandlerMemSave); + NetworkCtrl_registerHandler("qspi_wr", NetworkCtrl_cmdHandlerQspiWrite); + NetworkCtrl_registerHandler("mmc_wr_sbl", NetworkCtrl_cmdHandlerMmcsdWrite_proxy); + NetworkCtrl_registerHandler("mmc_wr_appimage", NetworkCtrl_cmdHandlerMmcsdWrite_proxy); + NetworkCtrl_registerHandler("sys_reset", NetworkCtrl_cmdHandlerSysReset); + NetworkCtrl_registerHandler("dev_ctrl", NetworkCtrl_cmdHandlerdevRequest); +#ifndef RADAR_ONLY + NetworkCtrl_registerHandler("iss_raw_save", NetworkCtrl_cmdHandlerIssRawSave); + NetworkCtrl_registerHandler("iss_yuv_save", NetworkCtrl_cmdHandlerIssYuvSave); + NetworkCtrl_registerHandler("iss_isp_save", NetworkCtrl_cmdHandlerIssIspSave); + NetworkCtrl_registerHandler("iss_send_dcc_file", NetworkCtrl_cmdHandlerIssDccSendFile); + NetworkCtrl_registerHandler("iss_save_dcc_file", NetworkCtrl_cmdHandlerIssSaveDccFile); + NetworkCtrl_registerHandler("iss_clear_dcc_qspi_mem", NetworkCtrl_cmdHandlerIssClearDccQspiMem); + NetworkCtrl_registerHandler("iss_write_sensor_reg", NetworkCtrl_cmdHandleIssWriteSensorReg); + NetworkCtrl_registerHandler("iss_read_sensor_reg", NetworkCtrl_cmdHandleIssReadSensorReg); + NetworkCtrl_registerHandler("iss_read_2a_params", NetworkCtrl_cmdHandleIssRead2AParams); + NetworkCtrl_registerHandler("iss_write_2a_params", NetworkCtrl_cmdHandleIssWrite2AParams); + NetworkCtrl_registerHandler("stereo_calib_image_save", NetworkCtrl_cmdHandlerStereoCalibImageSave); + NetworkCtrl_registerHandler("stereo_calib_lut_to_qspi", NetworkCtrl_cmdHandlerStereoWriteCalibLUTToQSPI); + NetworkCtrl_registerHandler("stereo_set_params", NetworkCtrl_cmdHandlerStereoSetParams); + NetworkCtrl_registerHandler("stereo_set_dynamic_params", NetworkCtrl_cmdHandlerStereoSetDynamicParams); + NetworkCtrl_registerHandler("object_detect_set_dynamic_params", NetworkCtrl_cmdHandlerObjectDetectSetDynamicParams); +#endif + /* + * Create task + */ + gNetworkCtrl_obj.task = BspOsal_taskCreate( + (BspOsal_TaskFuncPtr)NetworkCtrl_tskMain, + "Network Control", + NETWORK_CTRL_TSK_PRI, + gNetworkCtrl_tskStack, + sizeof(gNetworkCtrl_tskStack), + &gNetworkCtrl_obj, + UTILS_TSK_AFFINITY_CORE0 + ); + UTILS_assert(gNetworkCtrl_obj.task != NULL); + + #ifdef ENABLE_NETWORK_LOG + NetworkCons_init(); + #endif + + return SYSTEM_LINK_STATUS_SOK; +} + +Int32 NetworkCtrl_deInit() +{ + #ifdef ENABLE_NETWORK_LOG + NetworkCons_deInit(); + #endif + + gNetworkCtrl_obj.tskExit = TRUE; + + Task_sleep(1); + + BspOsal_taskDelete(&gNetworkCtrl_obj.task); + + NetworkCtrl_unregisterHandler("echo"); + + return SYSTEM_LINK_STATUS_SOK; +} + +Responses: +Hello , After set register 'CPSW_CONTROL -> FIFO_LOOPBACK' ， I can observe the response as shown as below , is it means there were some configuration mistakes for TDA? "[HOST ] 31.614622 s: network_ctrl_tsk.c line 294 CPSW_CONTROL Reg: 1" Another question, should I disable MDIO ,if yes ,where should I disable it properly? Thanks. Best regards. Lan. + +Hi Any update for my query? Thanks. + +Did you make any change to IO Delay in ndk_nsp_hooks.c? + +Hello sir, I didn't did any change about IO Delay in ndk_nsp_hooks.c , attachment is my .c file. could you please look into it, maybe there are something I have missed. and should the IO delay be enabled/disabled in this file? Thanks a lot. 3660.ndk_nsp_hooks.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + ******************************************************************************* + * \file ndk_nsp_hooks.c + * + * \brief Do all necessary board level initialization for NDK. + * + ******************************************************************************* + */ + + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ + +/* NDK Dependencies */ +#include +#include +#include +#include + +/* NSP Dependencies */ +#include +#include + +/* Project dependency headers */ +#include +#include +#include + +#include +#include + +/******************************************************************************* + * Defines + ******************************************************************************* + */ +#define CPDMA_BUFFDESC_DDR_MEM (1) +#define GMACSW_CPDMA_BUF_DESC_COUNT (512U) + +#if (defined(CPDMA_BUFFDESC_DDR_MEM) && defined(BOARD_TYPE_TDA2EX_EVM)) +/*! CPDMA descriptor memory. Make sure this is non-cached region */ +#if defined(__GNUC__) +CPDMA_BuffDesc cpdmaBuffDescMem[GMACSW_CPDMA_BUF_DESC_COUNT]__attribute__(( aligned(128), section(".bss:CPDMA_BUFFDESC") )); +#else +#pragma DATA_ALIGN(cpdmaBuffDescMem, 128); +#pragma DATA_SECTION(cpdmaBuffDescMem, ".bss:CPDMA_BUFFDESC") +CPDMA_BuffDesc cpdmaBuffDescMem[GMACSW_CPDMA_BUF_DESC_COUNT]; +#endif +#endif +#define WR_MEM_32(addr, data) *(volatile unsigned int *)(addr) =(unsigned int)(data) +#define RD_MEM_32(addr) *(volatile unsigned int *)(addr) +#define MDIOBASE_L 0x48485000 +#define MDIOCONTROL_L 0x00000004 +#define NET_IF_IDX (1) + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +/* I/O Delay related registers */ +#define CFG_IO_DELAY_UNLOCK_KEY (0x0000AAAA) +#define CFG_IO_DELAY_LOCK_KEY (0x0000AAAB) + +#define CFG_IO_DELAY_ACCESS_PATTERN (0x00029000) +#define CFG_IO_DELAY_LOCK_MASK (0x400) + +#define CFG_IO_DELAY_BASE (0x4844A000) +#define CFG_IO_DELAY_LOCK (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x02C)) +#define CFG_RGMII0_TXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x74C)) +#define CFG_RGMII0_TXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x758)) +#define CFG_RGMII0_TXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x764)) +#define CFG_RGMII0_TXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x770)) +#define CFG_RGMII0_TXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x77C)) +#define CFG_VIN2A_D13_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA7C)) +#define CFG_VIN2A_D17_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAAC)) +#define CFG_VIN2A_D16_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAA0)) +#define CFG_VIN2A_D15_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA94)) +#define CFG_VIN2A_D14_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA88)) + +/* PAD Configuration Registers */ +#define SYSCFG_PAD_RGMII0_TXCTL (*(volatile uint32_t*)(0x4A003654)) +#define SYSCFG_PAD_RGMII0_TXD3 (*(volatile uint32_t*)(0x4A003658)) +#define SYSCFG_PAD_RGMII0_TXD2 (*(volatile uint32_t*)(0x4A00365C)) +#define SYSCFG_PAD_RGMII0_TXD1 (*(volatile uint32_t*)(0x4A003660)) +#define SYSCFG_PAD_RGMII0_TXD0 (*(volatile uint32_t*)(0x4A003664)) +#define SYSCFG_PAD_VIN2A_D13 (*(volatile uint32_t*)(0x4A00359C)) +#define SYSCFG_PAD_VIN2A_D14 (*(volatile uint32_t*)(0x4A0035A0)) +#define SYSCFG_PAD_VIN2A_D15 (*(volatile uint32_t*)(0x4A0035A4)) +#define SYSCFG_PAD_VIN2A_D16 (*(volatile uint32_t*)(0x4A0035A8)) +#define SYSCFG_PAD_VIN2A_D17 (*(volatile uint32_t*)(0x4A0035AC)) + +#define CTRL_MODULE_CTRL_CORE_SMA_SW_1 (*(volatile uint32_t*) (0x4A002534)) + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TDA2XX_CASCADE_RADAR) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) +/* DP83867IR Register details for delay configuration */ +#define DP83867_CTRL (0x1FU) +#define DP83867_RGMIICTL (0x0032U) +#define DP83867_RGMIIDCTL (0x0086U) +#define DP83867_IO_MUX_CTRL (0x0170U) +/* PHY CTRL bits */ +#define DP83867_SW_RESET (15) +#define DP83867_SW_RESTART (14) +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB (0x00U) +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB (0x01U) +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB (0x02U) +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB (0x03U) +/* RGMIIDCTL internal delay for rx and tx */ +#define DP83867_RGMIIDCTL_250_PS (0x0U) +#define DP83867_RGMIIDCTL_500_PS (0x1U) +#define DP83867_RGMIIDCTL_750_PS (0x2U) +#define DP83867_RGMIIDCTL_1_NS (0x3U) +#define DP83867_RGMIIDCTL_1_25_NS (0x4U) +#define DP83867_RGMIIDCTL_1_50_NS (0x5U) +#define DP83867_RGMIIDCTL_1_75_NS (0x6U) +#define DP83867_RGMIIDCTL_2_00_NS (0x7U) +#define DP83867_RGMIIDCTL_2_25_NS (0x8U) +#define DP83867_RGMIIDCTL_2_50_NS (0x9U) +#define DP83867_RGMIIDCTL_2_75_NS (0xaU) +#define DP83867_RGMIIDCTL_3_00_NS (0xbU) +#define DP83867_RGMIIDCTL_3_25_NS (0xcU) +#define DP83867_RGMIIDCTL_3_50_NS (0xdU) +#define DP83867_RGMIIDCTL_3_75_NS (0xeU) +#define DP83867_RGMIIDCTL_4_00_NS (0xfU) +#endif + +#if defined(TDA2EX_ETHSRV_BOARD) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD (0x0) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY (15) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE (12) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP (10) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR (5) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR (0) + +#define TDA2EX_ETHSRVSWITCH_SMI_DATA (0x01) +#define TDA2EX_ETHSRVSWITCH_SWITCH_ID (0x03) +#define TDA2EX_ETHSRVSWITCH_GLB1 (0x1B) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT (0x00) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITSTATE (15) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITREADY (11) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2 (0x1C) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2_DACHECK (11) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE (8) +#define TDA2EX_ETHSRVSWITCH_GLB2 (0x1C) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL (0x01) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL_RXTIMING (15) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL_TXTIMING (14) + +#define TDA2EX_ETHSRVSWITCH_VLAN_MAP 0x06 +#define TDA2EX_ETHSRVSWITCH_FORCE_MAP 0x800 + +#define WR_MEM_32(addr, data) *(volatile unsigned int *)(addr) =(unsigned int)(data) +#define RD_MEM_32(addr) *(volatile unsigned int *)(addr) +/* + * MDIO base address and register offsets. This is needed for direct access to + * MDIO without NSP + */ +#define MDIOBASE 0x48485000 +#define MDIO_USERACCESS0 0x80 +#define MDIO_USERPHYSEL0 0x84 + +#define USERACCESS_GO 0x80000000 +#define USERACCESS_READ 0x00000000 +#define USERACCESS_WRITE 0x40000000 +#define USERACCESS_DATA 0x0000ffff + +volatile UInt32 gConfiguredSwitchDelays = 0U; +void Tda2Ex_EthSrvConfigureSwitchDelays(uint32_t portNum); +#endif + + +/******************************************************************************* + * Function's + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ); +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy); +void LOCAL_disableRGMIIInternalDelays(void); +void stackInitHookStaticEth1(void *hCfg); +void stackInitHookDynEth1(void *hCfg); + +/******************************************************************************* + * Global's + ******************************************************************************* + */ + +/* This string array corresponds to link state */ +static char *LinkStr[] = { "No Link", + "None", + "10Mb/s Half Duplex", + "10Mb/s Full Duplex", + "100Mb/s Half Duplex", + "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", /*not suported*/ + "1000Mb/s Full Duplex"}; + + +/** + ******************************************************************************* + * \brief HW specific initialization + * + * We changed our CFG file to point call this private init + * function. Here we initialize our board and read in our + * MAC address. + * + ******************************************************************************* + */ +//Lan +void NDK_NSP_Vps_printf(uint32_t dualMacState,uint32_t rxPacketAvailableState) +{ + //Vps_printf("Nsp test Info *** *** *** Dual mac state : %d , RX packet available state : %d *** *** *** Nsp test Info" , dualMacState, rxPacketAvailableState); + Vps_printf("Nsp test Info *** *** *** Dual mac state : %d , RX packet available state : %d *** *** *** Nsp test Info",dualMacState,rxPacketAvailableState); +} +//规定第一二个参数为数字时候用来量数值；规定第一二个参数为字母时用来模拟断点测试程序是否执行到指定位置；anyway 第一二个参数不能重叠 +void NDK_NSP_Vps_printfParameter(uint32_t parameter0,uint32_t parameter1,uint32_t parameter2) +{ + Vps_printf("Nsp test Info *** *** *** parameter0 : %d ,parameter1 : %d , parameter2 : %d *** *** *** Nsp test Info",parameter0,parameter1,parameter2); +} + +void NDK_NSP_Init( void ) +{ +#if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2XX_RVP) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + + uint32_t enableIODelayFlag, regValue; + uint32_t siliconRev = PlatformGetSiliconRev(); + + /* + * We do I/O delay adjustments only if GMAC internal delays are enabled. + * With TDA2xx & TDA2EX PG2.0 the option of disabling internal delays is + * added. SBL will disable the internal delays if siliconRev is PG2.0 so no need + * to adjust I/O delay here. + * NOTE: For TDA2 PG2.0 silicon revision is 2 but for TDA2EX PG2.0 silicon + * revision is 1 so we need to make decision to disbale delays based on + * plaform build + */ +#if (defined (TDA2EX_BUILD)) + if (siliconRev >= 1U) + { + enableIODelayFlag = (uint32_t)FALSE; + } +#elif (defined(TDA2PX_BUILD)) + enableIODelayFlag = (uint32_t)FALSE; +#else + if (siliconRev >= 2U) + { + enableIODelayFlag = (uint32_t)FALSE; +#if !defined(BOARD_TDA2XX_CASCADE_RADAR) + LOCAL_disableRGMIIInternalDelays(); +#endif + } + else + { + enableIODelayFlag = (uint32_t)TRUE; + } +#endif + + if ((uint32_t)FALSE != enableIODelayFlag) + { + uint32_t delta, coarse, fine; + + /* + * Adjust I/O delays on the Tx control and data lines of each MAC port. This is + * a workaround in order to work properly with the DP83865 PHYs on the EVM. In 3COM + * RGMII mode this PHY applies it's own internal clock delay, so we essentially need to + * counteract the DRA7xx internal delay, and we do this by delaying the control and + * data lines. If not using this PHY, you probably don't need to do this stuff! + */ + + /* Global unlock for I/O Delay registers */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; + + /* Tweaks to RGMII0 Tx Control and Data */ + CFG_RGMII0_TXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXCTL = (SYSCFG_PAD_RGMII0_TXCTL & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXCTL_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXCTL_OUT = regValue; + + CFG_RGMII0_TXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD0 = (SYSCFG_PAD_RGMII0_TXD0 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD0_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD0_OUT = regValue; + + CFG_RGMII0_TXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD1 = (SYSCFG_PAD_RGMII0_TXD1 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD1_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD1_OUT = regValue; + + CFG_RGMII0_TXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD2 = (SYSCFG_PAD_RGMII0_TXD2 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD2_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD2_OUT = regValue; + + CFG_RGMII0_TXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD3 = (SYSCFG_PAD_RGMII0_TXD3 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD3_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD3_OUT = regValue; + + /* Tweaks to RGMII1 Tx Control and Data */ + CFG_VIN2A_D13_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D13 = (SYSCFG_PAD_VIN2A_D13 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_VIN2A_D13_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D13_OUT = regValue; + + CFG_VIN2A_D17_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D17 = (SYSCFG_PAD_VIN2A_D17 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; + regValue = CFG_VIN2A_D17_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D17_OUT = regValue; + + CFG_VIN2A_D16_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D16 = (SYSCFG_PAD_VIN2A_D16 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x2; + regValue = CFG_VIN2A_D16_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D16_OUT = regValue; + + CFG_VIN2A_D15_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D15 = (SYSCFG_PAD_VIN2A_D15 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D15_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D15_OUT = regValue; + + CFG_VIN2A_D14_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D14 = (SYSCFG_PAD_VIN2A_D14 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D14_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D14_OUT = regValue; + + /* Global lock */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; + } +#endif + +} + +/** + ******************************************************************************* + * + * \brief Callback to get GMAC HW config + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + * + ******************************************************************************* + */ +GMACSW_Config *GMACSW_getConfig(void) +{ + uint32_t i = 0; + uint8_t macAddr[6]; + uint32_t siliconRev = PlatformGetSiliconRev(); + + /* Get digital loopback starting config */ + GMACSW_Config *pGMACSWConfig = NULL; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); + #if ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) && defined(BOARD_TYPE_TDA2EX_EVM)) + #if CPDMA_BUFFDESC_DDR_MEM + pGMACSWConfig->cpdmaInitCfg.buffDescMemCfg.buffDescCnt = GMACSW_CPDMA_BUF_DESC_COUNT; + pGMACSWConfig->cpdmaInitCfg.buffDescMemCfg.buffDescMem = &(cpdmaBuffDescMem[0]); + #endif + #endif +#endif + + if(NULL != pGMACSWConfig) + { + pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_1; + /* Update default config with the correct MAC addresses */ + for(i=0U; iactiveMACPortMask ) + { + if (0U==i) + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); + } + else + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); + } + + Vps_printf("\nMAC Port %d Address:\n\t%02x-%02x-%02x-%02x-%02x-%02x\n", (int32_t)i, + macAddr[0], macAddr[1], macAddr[2], + macAddr[3], macAddr[4], macAddr[5]); + + /* Copy the correct MAC address into the driver config */ + memcpy( (void *)&(pGMACSWConfig->macInitCfg[i].macAddr[0]), (void *)&macAddr[0], 6U ); + + #if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + /* + * Adjust the PHY mask numbers for the Vayu EVM. The first MAC + * port is connected to a PHY with address = 2, the second MAC + * port is connected to a PHY with address = 3. + */ + #ifndef TDA2EX_BUILD + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(2U + i)); + #else + if (siliconRev >= 1U) + { + /* + * For TDA2EX 2.0 EVM the PHY address is 2 for first PHY and 3 for second + * PHY + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(2U + i)); + #if defined(TDA2EX_ETHSRV_BOARD) + if (i == 0U) + { + Vps_printf(" Network: Set NOPHY Mode for RGMII0 \n"); + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + } + else + { + Vps_printf(" Network: Setting PHY_ADDR=0 for RGMII1\n"); + pGMACSWConfig->macInitCfg[i].phyMask = 1; + } + #endif + } + else + { + /* + * For TDA2EX 1.0 EVM the PHY address is 8 for first PHY and 2 for second + * PHY + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x8 >> (uint32_t)(i*2U)); + } + #endif + #elif defined (BOARD_TYPE_TDA2XX_RVP) + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(1U - i)); + #endif + + #if defined(TDA3XX_FAMILY_BUILD) + #ifdef BOARD_TYPE_TDA3XX_RVP + /* + * Adjust the PHY mask numbers for the TDA3XX RVP. The first MAC + * port is connected to a PHY with address = 12, the second MAC + * port is connected to a PHY with address = 11. + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(12U - i)); + #else + /* + * Adjust the PHY mask numbers for TDA3xx EVM. The first MAC + * port is connected to a PHY with address = 0, the second MAC + * port is connected to a PHY with address = 1. + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)i); + #endif + + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + #endif + + #if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2XX_RVP) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + #ifdef TDA2EX_BUILD + siliconRev = PlatformGetSiliconRev(); + if (siliconRev >= 1U) + { + #if defined(TDA2EX_ETHSRV_BOARD) + /* Force gigabit full duplex because SWITCH doesn't support inband detection. */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; + #else + /* + * TDA2EX REVC EVM has DP83867 which supports inband detection. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + #endif + } + else + { + /* + * National PHY on TDA2EX Rev A/B EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; + } + #else + #if defined (BOARD_TYPE_TDA2PX_EVM) + + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; + //Lan + pGMACSWConfig->aleCfg.alePortCfg[i].portState = ALE_PORT_STATE_FWD; + WR_MEM_32(MDIOBASE_L+MDIOCONTROL_L,0x00000000); + pGMACSWConfig->macInitCfg[0].portVID = 0x64; + // pGMACSWConfig->macInitCfg[1].portVID = 0x65; + //pGMACSWConfig->macInitCfg[0].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)i); + #else + /* + * National PHY on Vayu EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; + //Lan + // pGMACSWConfig->aleCfg.alePortCfg[i].portState = ALE_PORT_STATE_FWD; + // WR_MEM_32(MDIOBASE_L+MDIOCONTROL_L,0x00000000); + // pGMACSWConfig->macInitCfg[0].portVID = 0x65; + // pGMACSWConfig->macInitCfg[1].portVID = 0x65; + #endif + #endif + #endif + } + } + pGMACSWConfig->mdioCfg.phyFoundCallback = &LOCAL_phyFoundCb; + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + } + else + { + /*do nothing, GMACSW_CONFIG_getDefaultConfig returned a NULL*/ + } + /* Return the config */ + return pGMACSWConfig; +} + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TDA2XX_CASCADE_RADAR) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) +/** + ******************************************************************************* + * + * \brief PHY DP83867IR delay config function + * + * This function is used for configuring the receive and transmit delays + * for DP83867IR PHY on TDA2EX PG 2.0 EVM (RevC). + * For PHY configuration, need to configure DP83867’s RGMII Control + * Register (RGMIICTL) for RGMII mode and RGMII Delay Control Register + * (RGMIIDCTL) for 0ns TX delay, 2.25ns RX delay. Set IO Drive Strength + * Register (IO_IMPEDANCE_CTRL) to maximum drive. + * NOTE: Call this function after NSP initialization as it requires GMAC + * handle to call GMAC IOCTL. + * + ******************************************************************************* + */ +void DP83867_configurePhyDelays(GMACSW_DeviceHandle hGMACSW, uint32_t portNum) +{ + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal; + cmd.portNum = portNum; + + /* PHY software reset */ + regVal = (1U << DP83867_SW_RESET); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set RGMII Delay values: Tx delay 0 and Rx delay 2.25ns */ + regVal = 0x08; + cmd.regAddr = DP83867_RGMIIDCTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Enable RGMII and CLK delay bits */ + regVal = 0x0D1; + cmd.regAddr = DP83867_RGMIICTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set Drive Strength bits */ + regVal = 0x61F; + cmd.regAddr = DP83867_IO_MUX_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* software restart */ + regVal = (1U << DP83867_SW_RESTART); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); +} +#endif + +#ifdef TDA3XX_AR12_ALPS +void Tda3x_Alps_Reconfig_Phy_BootStrap(GMACSW_DeviceHandle hGMACSW) +{ + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal, i; + + /* MAC port number */ + for (i = 0; i < MAC_NUM_PORTS; i++) + { + cmd.portNum = i; + + regVal = 0x3100; + cmd.regAddr = 0; /* Hard code + * Phy bootstrap value in PHY control registers + */ + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_PHY_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + } +} +#endif + +/** + ******************************************************************************* + * \brief String to displayed on telnet terminal + ******************************************************************************* + */ +char *VerStr = "\n\n **** Vision SDK **** \n\n"; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + static HANDLE hEcho = 0; + static HANDLE hEchoUdp = 0; + static HANDLE hData = 0; + static HANDLE hNull = 0; + static HANDLE hOob = 0; + +#endif + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) +/** + ******************************************************************************* + * + * \brief IPv6 initialization callback function + * + ******************************************************************************* + */ + +#if defined(NDK_ENABLE_IPV6) +static void IPv6DADStatus(IP6N Address, unsigned short dev_index, + unsigned char Status) +{ + char strIPAddress[40]; + + /* Convert the IP Address to String Format. */ + inet_ntop(AF_INET6, &Address, strIPAddress, 40); + + /* Print the status of the address. */ + Vps_printf(" Network :Address %s on device %d is %s\n", strIPAddress, dev_index, + (Status == 1) ? "UNIQUE" : "DUPLICATE"); + + System_flush(); + + return; +} +#endif +#endif +/** + ******************************************************************************* + * + * \brief Stack init hook function to configure the second mac port + * + ******************************************************************************* + */ +void stackInitHookStaticEth1(void *hCfg) +{ + /*Static IP Address settings for interface 2*/ + const char *ip_addr_2 = "192.168.2.4"; + const char *ip_mask_2 = "255.255.255.0"; + const char *ip_gateway_2 = "192.168.2.1"; + + CI_IPNET ip_net; + CI_ROUTE route; + /*Add IP Address for the interface 2*/ + ip_net.IPAddr = inet_addr(ip_addr_2); + ip_net.IPMask = inet_addr(ip_mask_2); + CfgAddEntry(hCfg, (uint32_t)CFGTAG_IPNET, 2U, 0U, (int32_t)sizeof(CI_IPNET), (UINT8 *)(void *)&ip_net, 0); + + /*Add gateway for interface 2*/ + bzero(&route, sizeof(route)); + route.IPDestAddr = 0; + route.IPDestMask = 0; + route.IPGateAddr = inet_addr(ip_gateway_2); + CfgAddEntry(hCfg, (uint32_t)CFGTAG_ROUTE, 0U, 0U, (int32_t)sizeof(CI_ROUTE), (UINT8 *)(void *)&route, 0); + +} + +void stackInitHookDynEth1(void *hCfg) +{ + /*Add the setup for DHCP for interface 2*/ + CI_SERVICE_DHCPC dhcpc; + static UINT8 DHCP_OPTIONS[] = { DHCPOPT_SUBNET_MASK }; + + bzero(&dhcpc, sizeof(dhcpc)); + dhcpc.cisargs.Mode = 1U; + dhcpc.cisargs.IfIdx = 2U; + dhcpc.param.pOptions = DHCP_OPTIONS; + dhcpc.param.len = 1; + + CfgAddEntry(hCfg, (uint32_t)CFGTAG_SERVICE, (uint32_t)CFGITEM_SERVICE_DHCPCLIENT, 0U, (int32_t)sizeof(dhcpc), (UINT8 *)(void *)&dhcpc, 0); +} +/** + ******************************************************************************* + * + * \brief NDK callback to start DEAMON services + * + ******************************************************************************* + */ +void netOpenHook(void) +{ + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + /* Create our local servers */ + hEcho = DaemonNew( SOCK_STREAMNC, 0, 7, dtask_tcp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hEchoUdp = DaemonNew( SOCK_DGRAM, 0, 7, dtask_udp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 1 ); + hData = DaemonNew( SOCK_STREAM, 0, 1000, dtask_tcp_datasrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hNull = DaemonNew( SOCK_STREAMNC, 0, 1001, dtask_tcp_nullsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hOob = DaemonNew( SOCK_STREAMNC, 0, 999, dtask_tcp_oobsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + + /* NetworkCtrl_init(); */ + +#if defined (NDK_ENABLE_IPV6) + Error_Block eb; + Int32 status; + UInt32 dev_index = 1; + + /* Make sure Error_Block is initialized */ + Error_init(&eb); + + status = IPv6InterfaceInit(dev_index, IPv6DADStatus); + if (status < 0) { + Vps_printf(" Network: Error %d: failed to add IPv6 interface\n", status); + } +#endif +#endif + +} + +/** + ******************************************************************************* + * + * \brief NDK callback to stop DEAMON services + * + ******************************************************************************* + */ +void netCloseHook(void) +{ + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + /* Kill any active console */ + /*ConsoleClose(); */ + /*NetworkCtrl_deInit(); */ + +#if defined (NDK_ENABLE_IPV6) + + Int32 status; + UInt32 dev_index = 1; + /* Enter the kernel Mode. */ + llEnter (); + status = IPv6InterfaceDeInit(dev_index); + llExit (); + + /* Were we able to deinitialize the stack? */ + if (status < 0) + { + Vps_printf( + " Network: Error - Unable to de-initialize the IPv6 stack on device %d\n", + dev_index); + } + else + { + Vps_printf(" Network: IPv6 stack has been deinitialized on %d\n", dev_index); + } +#endif + + DaemonFree(hOob); + DaemonFree(hNull); + DaemonFree(hData); + DaemonFree(hEchoUdp); + DaemonFree(hEcho); + +#endif + +} + +/** + ******************************************************************************* + * + * \brief Print link status + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + * + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + Vps_printf(" NDK: Link Status: %s on PHY %" PRIu32 "\n",LinkStr[linkStatus],phy); +} + +/** + ******************************************************************************* + * + * \brief PHY Found callback + * + * This is a callback from the Ethernet driver. This function + * is called when PHY is found at PHY mask. This can be used for PHY + * specific configuration. + * + ******************************************************************************* + */ +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy) +{ + Vps_printf(" NSP GMAC: PHY %d Found on MAC Port %" PRIu32 "\n",phy, portNum); + +#if ( defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM) || \ + defined(BOARD_TYPE_TDA3XX_RVP) || \ + defined(BOARD_TDA2XX_CASCADE_RADAR) || \ + defined(TDA3XX_AR12_ALPS) ) + /* Configure Rx/Tx delays for DP83867IR (on PG2.0 J6ECO EVM) */ + GMACSW_DeviceHandle hGMACSW = GMACSW_open(NULL); + if (hGMACSW != NULL) + { + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) + +#ifdef BOARD_TYPE_TDA2EX_EVM + /* For TDA2EX only SR2 EVM has DP83867 */ + if (PlatformGetSiliconRev() >= 1U) +#endif + { + /* Configure receive and transmit delays */ + DP83867_configurePhyDelays(hGMACSW, portNum); + } +#endif + +#ifdef TDA3XX_AR12_ALPS + /* Configure the AR8031 Enthernet phy boot mode (on TDA3X Radar ALPS board) */ + Tda3x_Alps_Reconfig_Phy_BootStrap(hGMACSW); +#endif +#if defined (BOARD_TDA2XX_CASCADE_RADAR) + /* Configure receive and transmit delays */ + DP83867_configurePhyDelays(hGMACSW, portNum); +#endif + /* Now close the driver */ + if(0U != GMACSW_close(hGMACSW)) + { + Vps_printf(" NDK: GMACSW Close Returned error" PRIu32 "\n"); + } + } + else + { + Vps_printf(" NDK: GMAC Open Failed \n"); + } +#endif + +#if defined(TDA2EX_ETHSRV_BOARD) + /* Configure switch delays. We can call delay config function here as + * we are using direct PHY access functions and dont use NSP IOCTLS */ + if (0U == gConfiguredSwitchDelays) + { + /* + * HACK: Configure switch here as we need to make sure switch MDIO address is configured + * by bsp_init. + */ + Tda2Ex_EthSrvConfigureSwitchDelays(0); + gConfiguredSwitchDelays = 1U; + } +#endif +} + +/* Disable RGMII Internal delays (RGMIIID). By default it is enabled */ +void LOCAL_disableRGMIIInternalDelays(void) +{ + uint32_t regValue; + /* Disable RGMII half cycle delay for ES2.0 silicon */ + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + /* Disable half cycle delay for RGMII0 */ + regValue |= ((UInt32)0x1U << 25U); + /* Disable half cycle delay for RGMII1 */ + regValue |= ((UInt32)0x1U << 26U); + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; +} + +/** + * \brief Return ID of processor on which networking runs + */ +UInt32 Utils_netGetProcId(void) +{ + UInt32 procId = SYSTEM_PROC_INVALID; + + #ifdef NDK_PROC_TO_USE_IPU1_0 + procId = SYSTEM_PROC_IPU1_0; + #endif + + #ifdef NDK_PROC_TO_USE_IPU1_1 + procId = SYSTEM_PROC_IPU1_1; + #endif + + #ifdef NDK_PROC_TO_USE_IPU2 + procId = SYSTEM_PROC_IPU2; + #endif + + #ifdef NDK_PROC_TO_USE_A15_0 + procId = SYSTEM_PROC_A15_0; + #endif + + return procId; +} + +/** + ******************************************************************************* + * \brief Retrun IP address as a string + * + * If network stack is not initialized correctly 0.0.0.0 IP address + * is returned + * + * \param ipAddrStr [OUT] Assigned IP address as a string + * + ******************************************************************************* + */ +void Utils_ndkGetIpAddrStr(char *ipAddrStr, UInt32 ifIdx) +{ + IPN ipAddr; + + memset(&ipAddr, 0, sizeof(ipAddr)); + + strcpy(ipAddrStr,"none"); + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + NtIfIdx2Ip(ifIdx, &ipAddr); + NtIPN2Str(ipAddr, ipAddrStr); + +#endif + +} + +Int32 Utils_netGetIpAddrStr(char *ipAddr, UInt32 ifIdx) +{ + UInt32 linkId, procId; + Int32 status; + SystemCommon_IpAddr prm; + + prm.ifIdx = ifIdx; + + strcpy(ipAddr, "none" ); + + procId = Utils_netGetProcId(); + + if(procId==SYSTEM_PROC_INVALID) + { + status = SYSTEM_LINK_STATUS_EFAIL; + } + else + { + linkId = SYSTEM_MAKE_LINK_ID(procId, SYSTEM_LINK_ID_PROCK_LINK_ID); + + status = System_linkControl( + linkId, + SYSTEM_COMMON_CMD_GET_IP_ADDR, + &prm, + sizeof(prm), + TRUE + ); + + if(status==SYSTEM_LINK_STATUS_SOK) + { + strcpy(ipAddr, prm.ipAddr); + } + } + + return status; +} + +Bool Utils_netIsNetworkEnabled(void) +{ + Bool status = (Bool)FALSE; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) ) ||\ + ( defined(NDK_PROC_TO_USE_IPU1_1) ) ||\ + ( defined(NDK_PROC_TO_USE_IPU2 ) ) ||\ + ( defined(NDK_PROC_TO_USE_A15_0 ) ) + + status = (Bool)TRUE; + +#endif + + return status; +} + +#if defined(TDA2EX_ETHSRV_BOARD) + +void delay_mdio (uint32_t cnt) +{ + uint32_t i; + for (i = 0; i < cnt; i++); +} + +/* wait for go bit to 0 and ack bit to become 1 */ +void wait_for_user_access () +{ + uint32_t reg; + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x80000000; + while (reg != 0x0) + { + delay_mdio (10000); + delay_mdio (10000); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x80000000; + } + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x20000000; + while (reg != 0x20000000) + { + delay_mdio (10000); + delay_mdio (10000); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x20000000; + } + +} + +uint32_t cpsw_mdio_read (unsigned char phy_reg, uint32_t PHY_ADDR) +{ + uint32_t reg = 0; + reg = + (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) | (PHY_ADDR << 16)); + WR_MEM_32 ((MDIOBASE + MDIO_USERACCESS0), reg); + wait_for_user_access (); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0); + reg = reg & 0x0000ffff; +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf (" Network: PHYREG READ VALUE = %x \n", reg); +#endif + return reg; +} + +void cpsw_mdio_write (unsigned char phy_reg, unsigned short data, uint32_t PHY_ADDR) +{ + uint32_t reg = 0; + reg = + (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) | (PHY_ADDR << 16) | + (data & USERACCESS_DATA)); + WR_MEM_32 ((MDIOBASE + MDIO_USERACCESS0), reg); + wait_for_user_access (); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0); + reg = reg & 0x0000ffff; +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf (" Network: PHYREG WRITE VALUE is = %x \n", reg); +#endif +} + +void Tda2Ex_EthSrvSwitch_reg_write(uint32_t portNum, uint32_t regAddr, uint32_t regVal) +{ +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: REG 0x%02x WRITE 0x%x\n", regAddr, regVal); +#endif + cpsw_mdio_write (regAddr, regVal, 0x3); +} + +void Tda2Ex_EthSrvSwitch_reg_read(uint32_t portNum, uint32_t regAddr, uint32_t *regVal) +{ +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: REG 0x%02x READ 0x%x\n", regAddr, *regVal); +#endif + *regVal = cpsw_mdio_read(regAddr, 0x3); +} + +void Tda2Ex_EthSrvSwitch_wait_for_access(uint32_t portNum, uint32_t *smi_regVal) +{ + do + { + Tda2Ex_EthSrvSwitch_reg_read(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + } while ((*smi_regVal & (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY)) != 0); +} + +void Tda2Ex_EthSrvSwitch_dev_reg_write(uint32_t portNum, uint32_t devAddr, uint32_t regAddr, uint32_t regVal) +{ + uint32_t smi_regVal; + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_DATA, regVal); + + smi_regVal = (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE) + | (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP) + | (devAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR) + | (regAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + smi_regVal |= (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); +} + +void Tda2Ex_EthSrvSwitch_dev_reg_read(uint32_t portNum, uint32_t devAddr, uint32_t regAddr, uint32_t *regVal) +{ + uint32_t smi_regVal; + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + smi_regVal = (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE) + | (2U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP) + | (devAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR) + | (regAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + smi_regVal |= (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + Tda2Ex_EthSrvSwitch_reg_read(portNum, TDA2EX_ETHSRVSWITCH_SMI_DATA, regVal); +} + + +enum Tda2Ex_EthSrvSwitch_ports { + TDA2EX_ETHSRVSWITCH_PORT0 = 0x1, + TDA2EX_ETHSRVSWITCH_PORT1 = 0x2, + TDA2EX_ETHSRVSWITCH_PORT2 = 0x4, + TDA2EX_ETHSRVSWITCH_PORT3 = 0x8, + TDA2EX_ETHSRVSWITCH_PORT4 = 0x10, + TDA2EX_ETHSRVSWITCH_PORT5 = 0x20, + TDA2EX_ETHSRVSWITCH_PORT6 = 0x40, + TDA2EX_ETHSRVSWITCH_PORT7 = 0x80, + TDA2EX_ETHSRVSWITCH_PORT8 = 0x100, +}; + + +void Tda2Ex_EthSrvConfigureSwitchDelays(uint32_t portNum) +{ + uint32_t regVal, regValPrevious; + int dev, reg; + + regVal = 0; + regValPrevious = 0; + + Vps_printf(" Network: Enable RGMII half-cycle-delay for 0, disable for 1\n"); + uint32_t regValue; + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + + /* Enable half cycle delay for RGMII0 connected via MAC-to-MAC */ + regValue |= (0x0 << 25U); + + /* Disable half cycle delay for RGMII1 connected to DP83867 PHY */ + regValue |= (0x1 << 26U); + + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; + + + Vps_printf(" Network: Waiting for switch to initialize..."); + do + { + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT, ®Val); + if (regVal != regValPrevious) + { +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: SWITCH_GLB_STAT: %08x", regVal); +#endif + regValPrevious = regVal; + } + } while ((regVal & (1U << TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITREADY)) == 0); + + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: GLB_CTRL2: %08x", regVal); +#endif + + /* Clear DA Check: Allows ANY RMU packet to be interpretted. TODO: Maybe set this bit and configure device address in ATU? */ + regVal &= ~(1U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_DACHECK); + + /* Set RMUMode to 0x2: Port 7 is RMU port (This allows external PC on J20 to configure switch. Change to 0x3 for port 8 when RMU access support is added) */ + regVal &= ~(3U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE); + regVal |= (2U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE); + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, regVal); + + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: GLB_CTRL2: %08x", regVal); +#endif + + dev = 8; + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, TDA2EX_ETHSRVSWITCH_PHY_CTRL, ®Val); + regVal |= (0U << TDA2EX_ETHSRVSWITCH_PHY_CTRL_RXTIMING); + regVal |= (1U << TDA2EX_ETHSRVSWITCH_PHY_CTRL_TXTIMING); + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, dev, TDA2EX_ETHSRVSWITCH_PHY_CTRL, regVal); + + /* For Ports 1 through 5 (Main + 4 cameras) */ + for (dev = 1; dev <= 5; dev++) { + /* Forward only to these ports */ + regVal = TDA2EX_ETHSRVSWITCH_PORT0 | TDA2EX_ETHSRVSWITCH_PORT6 | TDA2EX_ETHSRVSWITCH_PORT7 | TDA2EX_ETHSRVSWITCH_PORT8; + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, dev, TDA2EX_ETHSRVSWITCH_VLAN_MAP, regVal); + } + + for (dev = 0; dev <= 8; ++dev) { +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: Switch port %d:\n", dev); +#endif + for (reg = 0; reg <= 6; ++reg) { + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, reg, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: reg %d = %08x\n", reg, regVal); +#endif + } + reg = 0x1F; + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, reg, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: reg %d = %08x\n", reg, regVal); +#endif + } + + Vps_printf(" Network: TDA2EX ETHSRV board switch configuration done!\n"); +} +#endif + +Hi Stanley , Do you have any update to me? Thanks. + +My understanding is that when CPSW_CONTROL.FIFO_LOOPBACK=1, it would loop back the packets received in MAC port. Since you see the ARP packet back in CANOE, it seems the packet arrives fine at CPSW MAC port (i.e. no errors such as CRC). Please double check that NIMU/NDK is coming up correctly. I see you have some traces in ndk_nsp_hooks.c, which ones do you see? Consider adding few more in some hook functions such as netOpenHook. Regarding MDIO, no need to disable it. There is no side effect of keeping it enabled if you are in MAC-to-MAC mode. + +Hi Misael, Thanks for your reply. Now I can receive a ARP frame from TDA , also we added some test code in nimu_ndk.c . According to the state and register information , we guess phy and data link layers got packets correctly but the network(stack) layer didn't process those packets or process packets not correct. First ,after power on , we can get the arp announcement the static IP address "192.168.1.200" ,; Then , we tried to Ping this IP via PC , we can not get response message at wireshark window. we can observe register "GOOD_TX_FRAME" kept 1 and the "GOOD_RX_FRAME" increasing. Other error register looks fine . Attachments are uart information and my nsp files , these may be helpful. Could you please give me more direction if possible? Thank you very much. Best Regards. Lan. 4745.ti.rar 3364.ndk_nsp_hooks.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + ******************************************************************************* + * \file ndk_nsp_hooks.c + * + * \brief Do all necessary board level initialization for NDK. + * + ******************************************************************************* + */ + + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ + +/* Standard language headers */ +#include +#include +#include +#include + +/* OS/Posix headers */ + +/* NDK Dependencies */ +#include +#include +#include +#include + +/* NSP Dependencies */ +#include +#include + +/* Project dependency headers */ +#include +#include +#include + +#include +#include + +/******************************************************************************* + * Defines + ******************************************************************************* + */ +#define CPDMA_BUFFDESC_DDR_MEM (1) +#define GMACSW_CPDMA_BUF_DESC_COUNT (512U) + +#if (defined(CPDMA_BUFFDESC_DDR_MEM) && defined(BOARD_TYPE_TDA2EX_EVM)) +/*! CPDMA descriptor memory. Make sure this is non-cached region */ +#if defined(__GNUC__) +CPDMA_BuffDesc cpdmaBuffDescMem[GMACSW_CPDMA_BUF_DESC_COUNT]__attribute__(( aligned(128), section(".bss:CPDMA_BUFFDESC") )); +#else +#pragma DATA_ALIGN(cpdmaBuffDescMem, 128); +#pragma DATA_SECTION(cpdmaBuffDescMem, ".bss:CPDMA_BUFFDESC") +CPDMA_BuffDesc cpdmaBuffDescMem[GMACSW_CPDMA_BUF_DESC_COUNT]; +#endif +#endif +#define WR_MEM_32(addr, data) *(volatile unsigned int *)(addr) =(unsigned int)(data) +#define RD_MEM_32(addr) *(volatile unsigned int *)(addr) +#define MDIOBASE_L 0x48485000 +#define MDIOCONTROL_L 0x00000004 +#define NET_IF_IDX (1) + +/* Ethernet MAC ID registers(Devcice configuration) from EFuse */ +#define MAC_ID0_LO (*(volatile uint32_t*)0x4A002514) +#define MAC_ID0_HI (*(volatile uint32_t*)0x4A002518) +#define MAC_ID1_LO (*(volatile uint32_t*)0x4A00251C) +#define MAC_ID1_HI (*(volatile uint32_t*)0x4A002520) + +/* I/O Delay related registers */ +#define CFG_IO_DELAY_UNLOCK_KEY (0x0000AAAA) +#define CFG_IO_DELAY_LOCK_KEY (0x0000AAAB) + +#define CFG_IO_DELAY_ACCESS_PATTERN (0x00029000) +#define CFG_IO_DELAY_LOCK_MASK (0x400) + +#define CFG_IO_DELAY_BASE (0x4844A000) +#define CFG_IO_DELAY_LOCK (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x02C)) +#define CFG_RGMII0_TXCTL_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x74C)) +#define CFG_RGMII0_TXD0_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x758)) +#define CFG_RGMII0_TXD1_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x764)) +#define CFG_RGMII0_TXD2_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x770)) +#define CFG_RGMII0_TXD3_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0x77C)) +#define CFG_VIN2A_D13_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA7C)) +#define CFG_VIN2A_D17_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAAC)) +#define CFG_VIN2A_D16_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xAA0)) +#define CFG_VIN2A_D15_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA94)) +#define CFG_VIN2A_D14_OUT (*(volatile uint32_t*)(CFG_IO_DELAY_BASE + 0xA88)) + +/* PAD Configuration Registers */ +#define SYSCFG_PAD_RGMII0_TXCTL (*(volatile uint32_t*)(0x4A003654)) +#define SYSCFG_PAD_RGMII0_TXD3 (*(volatile uint32_t*)(0x4A003658)) +#define SYSCFG_PAD_RGMII0_TXD2 (*(volatile uint32_t*)(0x4A00365C)) +#define SYSCFG_PAD_RGMII0_TXD1 (*(volatile uint32_t*)(0x4A003660)) +#define SYSCFG_PAD_RGMII0_TXD0 (*(volatile uint32_t*)(0x4A003664)) +#define SYSCFG_PAD_VIN2A_D13 (*(volatile uint32_t*)(0x4A00359C)) +#define SYSCFG_PAD_VIN2A_D14 (*(volatile uint32_t*)(0x4A0035A0)) +#define SYSCFG_PAD_VIN2A_D15 (*(volatile uint32_t*)(0x4A0035A4)) +#define SYSCFG_PAD_VIN2A_D16 (*(volatile uint32_t*)(0x4A0035A8)) +#define SYSCFG_PAD_VIN2A_D17 (*(volatile uint32_t*)(0x4A0035AC)) + +#define CTRL_MODULE_CTRL_CORE_SMA_SW_1 (*(volatile uint32_t*) (0x4A002534)) + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TDA2XX_CASCADE_RADAR) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) +/* DP83867IR Register details for delay configuration */ +#define DP83867_CTRL (0x1FU) +#define DP83867_RGMIICTL (0x0032U) +#define DP83867_RGMIIDCTL (0x0086U) +#define DP83867_IO_MUX_CTRL (0x0170U) +/* PHY CTRL bits */ +#define DP83867_SW_RESET (15) +#define DP83867_SW_RESTART (14) +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB (0x00U) +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB (0x01U) +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB (0x02U) +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB (0x03U) +/* RGMIIDCTL internal delay for rx and tx */ +#define DP83867_RGMIIDCTL_250_PS (0x0U) +#define DP83867_RGMIIDCTL_500_PS (0x1U) +#define DP83867_RGMIIDCTL_750_PS (0x2U) +#define DP83867_RGMIIDCTL_1_NS (0x3U) +#define DP83867_RGMIIDCTL_1_25_NS (0x4U) +#define DP83867_RGMIIDCTL_1_50_NS (0x5U) +#define DP83867_RGMIIDCTL_1_75_NS (0x6U) +#define DP83867_RGMIIDCTL_2_00_NS (0x7U) +#define DP83867_RGMIIDCTL_2_25_NS (0x8U) +#define DP83867_RGMIIDCTL_2_50_NS (0x9U) +#define DP83867_RGMIIDCTL_2_75_NS (0xaU) +#define DP83867_RGMIIDCTL_3_00_NS (0xbU) +#define DP83867_RGMIIDCTL_3_25_NS (0xcU) +#define DP83867_RGMIIDCTL_3_50_NS (0xdU) +#define DP83867_RGMIIDCTL_3_75_NS (0xeU) +#define DP83867_RGMIIDCTL_4_00_NS (0xfU) +#endif + +#if defined(TDA2EX_ETHSRV_BOARD) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD (0x0) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY (15) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE (12) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP (10) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR (5) +#define TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR (0) + +#define TDA2EX_ETHSRVSWITCH_SMI_DATA (0x01) +#define TDA2EX_ETHSRVSWITCH_SWITCH_ID (0x03) +#define TDA2EX_ETHSRVSWITCH_GLB1 (0x1B) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT (0x00) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITSTATE (15) +#define TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITREADY (11) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2 (0x1C) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2_DACHECK (11) +#define TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE (8) +#define TDA2EX_ETHSRVSWITCH_GLB2 (0x1C) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL (0x01) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL_RXTIMING (15) +#define TDA2EX_ETHSRVSWITCH_PHY_CTRL_TXTIMING (14) + +#define TDA2EX_ETHSRVSWITCH_VLAN_MAP 0x06 +#define TDA2EX_ETHSRVSWITCH_FORCE_MAP 0x800 + +#define WR_MEM_32(addr, data) *(volatile unsigned int *)(addr) =(unsigned int)(data) +#define RD_MEM_32(addr) *(volatile unsigned int *)(addr) +/* + * MDIO base address and register offsets. This is needed for direct access to + * MDIO without NSP + */ +#define MDIOBASE 0x48485000 +#define MDIO_USERACCESS0 0x80 +#define MDIO_USERPHYSEL0 0x84 + +#define USERACCESS_GO 0x80000000 +#define USERACCESS_READ 0x00000000 +#define USERACCESS_WRITE 0x40000000 +#define USERACCESS_DATA 0x0000ffff + +volatile UInt32 gConfiguredSwitchDelays = 0U; +void Tda2Ex_EthSrvConfigureSwitchDelays(uint32_t portNum); +#endif + + +/******************************************************************************* + * Function's + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ); +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy); +void LOCAL_disableRGMIIInternalDelays(void); +void stackInitHookStaticEth1(void *hCfg); +void stackInitHookDynEth1(void *hCfg); + +/******************************************************************************* + * Global's + ******************************************************************************* + */ + +/* This string array corresponds to link state */ +static char *LinkStr[] = { "No Link", + "None", + "10Mb/s Half Duplex", + "10Mb/s Full Duplex", + "100Mb/s Half Duplex", + "100Mb/s Full Duplex", + "1000Mb/s Half Duplex", /*not suported*/ + "1000Mb/s Full Duplex"}; + + +/** + ******************************************************************************* + * \brief HW specific initialization + * + * We changed our CFG file to point call this private init + * function. Here we initialize our board and read in our + * MAC address. + * + ******************************************************************************* + */ +//Lan +void NDK_NSP_Vps_printf(uint32_t dualMacState,uint32_t rxPacketAvailableState) +{ + //Vps_printf("Nsp test Info *** *** *** Dual mac state : %d , RX packet available state : %d *** *** *** Nsp test Info" , dualMacState, rxPacketAvailableState); + Vps_printf("Nsp test Info *** *** *** Dual mac state : %d , RX packet available state : %d *** *** *** Nsp test Info",dualMacState,rxPacketAvailableState); +} +//规定第一二个参数为数字时候用来量数值；规定第一二个参数为字母时用来模拟断点测试程序是否执行到指定位置；anyway 第一二个参数不能重叠 +void NDK_NSP_Vps_printfParameter(uint32_t parameter0,uint32_t parameter1,uint32_t parameter2) +{ + Vps_printf("Nsp test Info *** *** *** parameter0 : %d ,parameter1 : %d , parameter2 : %d *** *** *** Nsp test Info",parameter0,parameter1,parameter2); +} + +void NDK_NSP_Init( void ) +{ +#if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2XX_RVP) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + + uint32_t enableIODelayFlag, regValue; + uint32_t siliconRev = PlatformGetSiliconRev(); + Vps_printf("silicon %d",siliconRev); + /* + * We do I/O delay adjustments only if GMAC internal delays are enabled. + * With TDA2xx & TDA2EX PG2.0 the option of disabling internal delays is + * added. SBL will disable the internal delays if siliconRev is PG2.0 so no need + * to adjust I/O delay here. + * NOTE: For TDA2 PG2.0 silicon revision is 2 but for TDA2EX PG2.0 silicon + * revision is 1 so we need to make decision to disbale delays based on + * plaform build + */ +#if (defined (TDA2EX_BUILD)) + if (siliconRev >= 1U) + { + enableIODelayFlag = (uint32_t)FALSE; + } +#elif (defined(TDA2PX_BUILD)) + enableIODelayFlag = (uint32_t)FALSE; +#else + if (siliconRev >= 2U) + { + enableIODelayFlag = (uint32_t)FALSE; +#if !defined(BOARD_TDA2XX_CASCADE_RADAR) + LOCAL_disableRGMIIInternalDelays(); +#endif + } + else + { + enableIODelayFlag = (uint32_t)TRUE; + } +#endif + if ((uint32_t)FALSE != enableIODelayFlag) + { + uint32_t delta, coarse, fine; + + /* + * Adjust I/O delays on the Tx control and data lines of each MAC port. This is + * a workaround in order to work properly with the DP83865 PHYs on the EVM. In 3COM + * RGMII mode this PHY applies it's own internal clock delay, so we essentially need to + * counteract the DRA7xx internal delay, and we do this by delaying the control and + * data lines. If not using this PHY, you probably don't need to do this stuff! + */ + + /* Global unlock for I/O Delay registers */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_UNLOCK_KEY; + + /* Tweaks to RGMII0 Tx Control and Data */ + CFG_RGMII0_TXCTL_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + Vps_printf("CFG_RGMII0_TXCTL_OUT : %d",CFG_RGMII0_TXCTL_OUT); + SYSCFG_PAD_RGMII0_TXCTL = (SYSCFG_PAD_RGMII0_TXCTL & ~0xF) | 0x0; + Vps_printf("SYSCFG_PAD_RGMII0_TXCTL : %d",SYSCFG_PAD_RGMII0_TXCTL); + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + Vps_printf("delta : %d",delta); + regValue = CFG_RGMII0_TXCTL_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXCTL_OUT = regValue; + Vps_printf("CFG_RGMII0_TXCTL_OUT : %d",CFG_RGMII0_TXCTL_OUT); + + CFG_RGMII0_TXD0_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + Vps_printf("CFG_RGMII0_TXD0_OUT : %d",CFG_RGMII0_TXD0_OUT); + SYSCFG_PAD_RGMII0_TXD0 = (SYSCFG_PAD_RGMII0_TXD0 & ~0xF) | 0x0; + Vps_printf("SYSCFG_PAD_RGMII0_TXD0 : %d",SYSCFG_PAD_RGMII0_TXD0); + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + Vps_printf("delta : %d",delta); + regValue = CFG_RGMII0_TXD0_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD0_OUT = regValue; + Vps_printf("CFG_RGMII0_TXD0_OUT : %d",CFG_RGMII0_TXD0_OUT); + + CFG_RGMII0_TXD1_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD1 = (SYSCFG_PAD_RGMII0_TXD1 & ~0xF) | 0x0; + delta = (0x3 << 5) + 0x2; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD1_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD1_OUT = regValue; + + CFG_RGMII0_TXD2_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD2 = (SYSCFG_PAD_RGMII0_TXD2 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD2_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD2_OUT = regValue; + + CFG_RGMII0_TXD3_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_RGMII0_TXD3 = (SYSCFG_PAD_RGMII0_TXD3 & ~0xF) | 0x0; + delta = (0x4 << 5) + 0x0; /* Delay value to add to calibrated value */ + regValue = CFG_RGMII0_TXD3_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_RGMII0_TXD3_OUT = regValue; + + /* Tweaks to RGMII1 Tx Control and Data */ + CFG_VIN2A_D13_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D13 = (SYSCFG_PAD_VIN2A_D13 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; /* Delay value to add to calibrated value */ + regValue = CFG_VIN2A_D13_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D13_OUT = regValue; + + CFG_VIN2A_D17_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D17 = (SYSCFG_PAD_VIN2A_D17 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x8; + regValue = CFG_VIN2A_D17_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D17_OUT = regValue; + + CFG_VIN2A_D16_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D16 = (SYSCFG_PAD_VIN2A_D16 & ~0xF) | 0x3; + delta = (0x3 << 5) + 0x2; + regValue = CFG_VIN2A_D16_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D16_OUT = regValue; + + CFG_VIN2A_D15_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D15 = (SYSCFG_PAD_VIN2A_D15 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D15_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D15_OUT = regValue; + + CFG_VIN2A_D14_OUT = (CFG_IO_DELAY_ACCESS_PATTERN & ~CFG_IO_DELAY_LOCK_MASK); + SYSCFG_PAD_VIN2A_D14 = (SYSCFG_PAD_VIN2A_D14 & ~0xF) | 0x3; + delta = (0x4 << 5) + 0x0; + regValue = CFG_VIN2A_D14_OUT & ~0xFFFFFC00; + coarse = ((regValue >> 5) & 0x1F) + ((delta >> 5) & 0x1F); + coarse = (coarse > 0x1F) ? (0x1F) : (coarse); + fine = (regValue & 0x1F) + (delta & 0x1F); + fine = (fine > 0x1F) ? (0x1F) : (fine); + regValue = CFG_IO_DELAY_ACCESS_PATTERN | CFG_IO_DELAY_LOCK_MASK | ((coarse << 5) | (fine)); + CFG_VIN2A_D14_OUT = regValue; + + /* Global lock */ + CFG_IO_DELAY_LOCK = CFG_IO_DELAY_LOCK_KEY; + } +#endif + +} + +/** + ******************************************************************************* + * + * \brief Callback to get GMAC HW config + * + * This is a callback from the Ethernet driver. This function + * is used by the driver to an application-specific config structure + * for the GMACSW driver. Typically it will be used to provide the + * MAC address(es) and the link status update callback function. + * + ******************************************************************************* + */ +GMACSW_Config *GMACSW_getConfig(void) +{ + uint32_t i = 0; + uint8_t macAddr[6]; + uint32_t siliconRev = PlatformGetSiliconRev(); + + /* Get digital loopback starting config */ + GMACSW_Config *pGMACSWConfig = NULL; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + pGMACSWConfig = GMACSW_CONFIG_getDefaultConfig(); + #if ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) && defined(BOARD_TYPE_TDA2EX_EVM)) + #if CPDMA_BUFFDESC_DDR_MEM + pGMACSWConfig->cpdmaInitCfg.buffDescMemCfg.buffDescCnt = GMACSW_CPDMA_BUF_DESC_COUNT; + pGMACSWConfig->cpdmaInitCfg.buffDescMemCfg.buffDescMem = &(cpdmaBuffDescMem[0]); + #endif + #endif +#endif + + if(NULL != pGMACSWConfig) + { + pGMACSWConfig->activeMACPortMask = PORT_MASK_MAC_1; + /* Update default config with the correct MAC addresses */ + for(i=0U; iactiveMACPortMask ) + { + if (0U==i) + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID0_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID0_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID0_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID0_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID0_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID0_HI & 0x00FF0000u) >> 16u); + } + else + { + /* Get the MAC Address from control module register space */ + macAddr[5] = (uint8_t)((MAC_ID1_LO & 0x000000FFu) >> 0u ); + macAddr[4] = (uint8_t)((MAC_ID1_LO & 0x0000FF00u) >> 8u ); + macAddr[3] = (uint8_t)((MAC_ID1_LO & 0x00FF0000u) >> 16u); + + macAddr[2] = (uint8_t)((MAC_ID1_HI & 0x000000FFu) >> 0u ); + macAddr[1] = (uint8_t)((MAC_ID1_HI & 0x0000FF00u) >> 8u ); + macAddr[0] = (uint8_t)((MAC_ID1_HI & 0x00FF0000u) >> 16u); + } + + Vps_printf("\nMAC Port %d Address:\n\t%02x-%02x-%02x-%02x-%02x-%02x\n", (int32_t)i, + macAddr[0], macAddr[1], macAddr[2], + macAddr[3], macAddr[4], macAddr[5]); + + /* Copy the correct MAC address into the driver config */ + memcpy( (void *)&(pGMACSWConfig->macInitCfg[i].macAddr[0]), (void *)&macAddr[0], 6U ); + + #if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + /* + * Adjust the PHY mask numbers for the Vayu EVM. The first MAC + * port is connected to a PHY with address = 2, the second MAC + * port is connected to a PHY with address = 3. + */ + #ifndef TDA2EX_BUILD + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(2U + i)); + #else + if (siliconRev >= 1U) + { + /* + * For TDA2EX 2.0 EVM the PHY address is 2 for first PHY and 3 for second + * PHY + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(2U + i)); + #if defined(TDA2EX_ETHSRV_BOARD) + if (i == 0U) + { + Vps_printf(" Network: Set NOPHY Mode for RGMII0 \n"); + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + } + else + { + Vps_printf(" Network: Setting PHY_ADDR=0 for RGMII1\n"); + pGMACSWConfig->macInitCfg[i].phyMask = 1; + } + #endif + } + else + { + /* + * For TDA2EX 1.0 EVM the PHY address is 8 for first PHY and 2 for second + * PHY + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x8 >> (uint32_t)(i*2U)); + } + #endif + #elif defined (BOARD_TYPE_TDA2XX_RVP) + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(1U - i)); + #endif + + #if defined(TDA3XX_FAMILY_BUILD) + #ifdef BOARD_TYPE_TDA3XX_RVP + /* + * Adjust the PHY mask numbers for the TDA3XX RVP. The first MAC + * port is connected to a PHY with address = 12, the second MAC + * port is connected to a PHY with address = 11. + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(12U - i)); + #else + /* + * Adjust the PHY mask numbers for TDA3xx EVM. The first MAC + * port is connected to a PHY with address = 0, the second MAC + * port is connected to a PHY with address = 1. + */ + pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)i); + #endif + + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + #endif + + #if (defined(TDA2XX_FAMILY_BUILD) && \ + (defined(BOARD_TYPE_TDA2XX_EVM) || \ + defined(BOARD_TYPE_TDA2XX_RVP) || \ + defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM))) + #ifdef TDA2EX_BUILD + siliconRev = PlatformGetSiliconRev(); + if (siliconRev >= 1U) + { + #if defined(TDA2EX_ETHSRV_BOARD) + /* Force gigabit full duplex because SWITCH doesn't support inband detection. */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; + #else + /* + * TDA2EX REVC EVM has DP83867 which supports inband detection. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_DETECT_INBAND; + #endif + } + else + { + /* + * National PHY on TDA2EX Rev A/B EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_1000_FULL; + } + #else + #if defined (BOARD_TYPE_TDA2PX_EVM) + + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; + //Lan + pGMACSWConfig->aleCfg.alePortCfg[i].portState = ALE_PORT_STATE_FWD; + WR_MEM_32(MDIOBASE_L+MDIOCONTROL_L,0x00000000); + //pGMACSWConfig->macInitCfg[0].portVID = 0x64; + // pGMACSWConfig->macInitCfg[1].portVID = 0x65; + //pGMACSWConfig->macInitCfg[0].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)i); + #else + /* + * National PHY on Vayu EVM does not work with the default INBAND detection mode. + * It would seem the Rx clock from the PHY is not generated unless the Tx clock + * from the Vayu device is present. So set the mode to force 1Gbps to start. + */ + pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; + pGMACSWConfig->macInitCfg[i].macConnectionType = + MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; + //Lan + // pGMACSWConfig->aleCfg.alePortCfg[i].portState = ALE_PORT_STATE_FWD; + // WR_MEM_32(MDIOBASE_L+MDIOCONTROL_L,0x00000000); + // pGMACSWConfig->macInitCfg[0].portVID = 0x65; + // pGMACSWConfig->macInitCfg[1].portVID = 0x65; + #endif + #endif + #endif + } + } + pGMACSWConfig->mdioCfg.phyFoundCallback = &LOCAL_phyFoundCb; + pGMACSWConfig->linkStatusCallback = &LOCAL_linkStatus; + } + else + { + /*do nothing, GMACSW_CONFIG_getDefaultConfig returned a NULL*/ + } + /* Return the config */ + return pGMACSWConfig; +} + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TDA2XX_CASCADE_RADAR) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) +/** + ******************************************************************************* + * + * \brief PHY DP83867IR delay config function + * + * This function is used for configuring the receive and transmit delays + * for DP83867IR PHY on TDA2EX PG 2.0 EVM (RevC). + * For PHY configuration, need to configure DP83867’s RGMII Control + * Register (RGMIICTL) for RGMII mode and RGMII Delay Control Register + * (RGMIIDCTL) for 0ns TX delay, 2.25ns RX delay. Set IO Drive Strength + * Register (IO_IMPEDANCE_CTRL) to maximum drive. + * NOTE: Call this function after NSP initialization as it requires GMAC + * handle to call GMAC IOCTL. + * + ******************************************************************************* + */ +void DP83867_configurePhyDelays(GMACSW_DeviceHandle hGMACSW, uint32_t portNum) +{ + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal; + cmd.portNum = portNum; + + /* PHY software reset */ + regVal = (1U << DP83867_SW_RESET); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set RGMII Delay values: Tx delay 0 and Rx delay 2.25ns */ + regVal = 0x08; + cmd.regAddr = DP83867_RGMIIDCTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Enable RGMII and CLK delay bits */ + regVal = 0x0D1; + cmd.regAddr = DP83867_RGMIICTL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* Set Drive Strength bits */ + regVal = 0x61F; + cmd.regAddr = DP83867_IO_MUX_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + + /* software restart */ + regVal = (1U << DP83867_SW_RESTART); + cmd.regAddr = DP83867_CTRL; + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_DP83867_PHY_INDIRECT_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); +} +#endif + +#ifdef TDA3XX_AR12_ALPS +void Tda3x_Alps_Reconfig_Phy_BootStrap(GMACSW_DeviceHandle hGMACSW) +{ + MDIO_rdWrphyRegIoctlCmd cmd; + uint32_t regVal, i; + + /* MAC port number */ + for (i = 0; i < MAC_NUM_PORTS; i++) + { + cmd.portNum = i; + + regVal = 0x3100; + cmd.regAddr = 0; /* Hard code + * Phy bootstrap value in PHY control registers + */ + cmd.regVal = ®Val; + GMACSW_ioctl( hGMACSW, + GMACSW_IOCTL_MDIO_WRITE_PHY_REGISTER, + (void *)&cmd, sizeof(MDIO_rdWrphyRegIoctlCmd)); + } +} +#endif + +/** + ******************************************************************************* + * \brief String to displayed on telnet terminal + ******************************************************************************* + */ +char *VerStr = "\n\n **** Vision SDK **** \n\n"; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + static HANDLE hEcho = 0; + static HANDLE hEchoUdp = 0; + static HANDLE hData = 0; + static HANDLE hNull = 0; + static HANDLE hOob = 0; + +#endif + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) +/** + ******************************************************************************* + * + * \brief IPv6 initialization callback function + * + ******************************************************************************* + */ + +#if defined(NDK_ENABLE_IPV6) +static void IPv6DADStatus(IP6N Address, unsigned short dev_index, + unsigned char Status) +{ + char strIPAddress[40]; + + /* Convert the IP Address to String Format. */ + inet_ntop(AF_INET6, &Address, strIPAddress, 40); + + /* Print the status of the address. */ + Vps_printf(" Network :Address %s on device %d is %s\n", strIPAddress, dev_index, + (Status == 1) ? "UNIQUE" : "DUPLICATE"); + + System_flush(); + + return; +} +#endif +#endif +/** + ******************************************************************************* + * + * \brief Stack init hook function to configure the second mac port + * + ******************************************************************************* + */ +void stackInitHookStaticEth1(void *hCfg) +{ + /*Static IP Address settings for interface 2*/ + const char *ip_addr_2 = "192.168.2.4"; + const char *ip_mask_2 = "255.255.255.0"; + const char *ip_gateway_2 = "192.168.2.1"; + + CI_IPNET ip_net; + CI_ROUTE route; + /*Add IP Address for the interface 2*/ + ip_net.IPAddr = inet_addr(ip_addr_2); + ip_net.IPMask = inet_addr(ip_mask_2); + CfgAddEntry(hCfg, (uint32_t)CFGTAG_IPNET, 2U, 0U, (int32_t)sizeof(CI_IPNET), (UINT8 *)(void *)&ip_net, 0); + + /*Add gateway for interface 2*/ + bzero(&route, sizeof(route)); + route.IPDestAddr = 0; + route.IPDestMask = 0; + route.IPGateAddr = inet_addr(ip_gateway_2); + CfgAddEntry(hCfg, (uint32_t)CFGTAG_ROUTE, 0U, 0U, (int32_t)sizeof(CI_ROUTE), (UINT8 *)(void *)&route, 0); + +} + +void stackInitHookDynEth1(void *hCfg) +{ + /*Add the setup for DHCP for interface 2*/ + CI_SERVICE_DHCPC dhcpc; + static UINT8 DHCP_OPTIONS[] = { DHCPOPT_SUBNET_MASK }; + + bzero(&dhcpc, sizeof(dhcpc)); + dhcpc.cisargs.Mode = 1U; + dhcpc.cisargs.IfIdx = 2U; + dhcpc.param.pOptions = DHCP_OPTIONS; + dhcpc.param.len = 1; + + CfgAddEntry(hCfg, (uint32_t)CFGTAG_SERVICE, (uint32_t)CFGITEM_SERVICE_DHCPCLIENT, 0U, (int32_t)sizeof(dhcpc), (UINT8 *)(void *)&dhcpc, 0); +} +/** + ******************************************************************************* + * + * \brief NDK callback to start DEAMON services + * + ******************************************************************************* + */ +void netOpenHook(void) +{ + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + /* Create our local servers */ + hEcho = DaemonNew( SOCK_STREAMNC, 0, 7, dtask_tcp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hEchoUdp = DaemonNew( SOCK_DGRAM, 0, 7, dtask_udp_echo, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 1 ); + hData = DaemonNew( SOCK_STREAM, 0, 1000, dtask_tcp_datasrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hNull = DaemonNew( SOCK_STREAMNC, 0, 1001, dtask_tcp_nullsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + hOob = DaemonNew( SOCK_STREAMNC, 0, 999, dtask_tcp_oobsrv, + OS_TASKPRINORM, OS_TASKSTKNORM, 0, 3 ); + + /* NetworkCtrl_init(); */ + +#if defined (NDK_ENABLE_IPV6) + Error_Block eb; + Int32 status; + UInt32 dev_index = 1; + + /* Make sure Error_Block is initialized */ + Error_init(&eb); + + status = IPv6InterfaceInit(dev_index, IPv6DADStatus); + if (status < 0) { + Vps_printf(" Network: Error %d: failed to add IPv6 interface\n", status); + } +#endif +#endif + +} + +/** + ******************************************************************************* + * + * \brief NDK callback to stop DEAMON services + * + ******************************************************************************* + */ +void netCloseHook(void) +{ + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + /* Kill any active console */ + /*ConsoleClose(); */ + /*NetworkCtrl_deInit(); */ + +#if defined (NDK_ENABLE_IPV6) + + Int32 status; + UInt32 dev_index = 1; + /* Enter the kernel Mode. */ + llEnter (); + status = IPv6InterfaceDeInit(dev_index); + llExit (); + + /* Were we able to deinitialize the stack? */ + if (status < 0) + { + Vps_printf( + " Network: Error - Unable to de-initialize the IPv6 stack on device %d\n", + dev_index); + } + else + { + Vps_printf(" Network: IPv6 stack has been deinitialized on %d\n", dev_index); + } +#endif + + DaemonFree(hOob); + DaemonFree(hNull); + DaemonFree(hData); + DaemonFree(hEchoUdp); + DaemonFree(hEcho); + +#endif + +} + +/** + ******************************************************************************* + * + * \brief Print link status + * + * This is a callback from the Ethernet driver. This function + * is called whenever there is a change in link state. The + * current PHY and current link state are passed as parameters. + * + ******************************************************************************* + */ +static void LOCAL_linkStatus( uint32_t phy, uint32_t linkStatus ) +{ + Vps_printf(" NDK: Link Status: %s on PHY %" PRIu32 "\n",LinkStr[linkStatus],phy); +} + +/** + ******************************************************************************* + * + * \brief PHY Found callback + * + * This is a callback from the Ethernet driver. This function + * is called when PHY is found at PHY mask. This can be used for PHY + * specific configuration. + * + ******************************************************************************* + */ +static void LOCAL_phyFoundCb(uint32_t portNum, uint32_t phy) +{ + Vps_printf(" NSP GMAC: PHY %d Found on MAC Port %" PRIu32 "\n",phy, portNum); + +#if ( defined(BOARD_TYPE_TDA2EX_EVM) || \ + defined(BOARD_TYPE_TDA2PX_EVM) || \ + defined(BOARD_TYPE_TDA3XX_RVP) || \ + defined(BOARD_TDA2XX_CASCADE_RADAR) || \ + defined(TDA3XX_AR12_ALPS) ) + /* Configure Rx/Tx delays for DP83867IR (on PG2.0 J6ECO EVM) */ + GMACSW_DeviceHandle hGMACSW = GMACSW_open(NULL); + if (hGMACSW != NULL) + { + +#if ( defined (BOARD_TYPE_TDA3XX_RVP) || \ + defined (BOARD_TYPE_TDA2PX_EVM) || \ + defined (BOARD_TYPE_TDA2EX_EVM) ) + +#ifdef BOARD_TYPE_TDA2EX_EVM + /* For TDA2EX only SR2 EVM has DP83867 */ + if (PlatformGetSiliconRev() >= 1U) +#endif + { + /* Configure receive and transmit delays */ + DP83867_configurePhyDelays(hGMACSW, portNum); + } +#endif + +#ifdef TDA3XX_AR12_ALPS + /* Configure the AR8031 Enthernet phy boot mode (on TDA3X Radar ALPS board) */ + Tda3x_Alps_Reconfig_Phy_BootStrap(hGMACSW); +#endif +#if defined (BOARD_TDA2XX_CASCADE_RADAR) + /* Configure receive and transmit delays */ + DP83867_configurePhyDelays(hGMACSW, portNum); +#endif + /* Now close the driver */ + if(0U != GMACSW_close(hGMACSW)) + { + Vps_printf(" NDK: GMACSW Close Returned error" PRIu32 "\n"); + } + } + else + { + Vps_printf(" NDK: GMAC Open Failed \n"); + } +#endif + +#if defined(TDA2EX_ETHSRV_BOARD) + /* Configure switch delays. We can call delay config function here as + * we are using direct PHY access functions and dont use NSP IOCTLS */ + if (0U == gConfiguredSwitchDelays) + { + /* + * HACK: Configure switch here as we need to make sure switch MDIO address is configured + * by bsp_init. + */ + Tda2Ex_EthSrvConfigureSwitchDelays(0); + gConfiguredSwitchDelays = 1U; + } +#endif +} + +/* Disable RGMII Internal delays (RGMIIID). By default it is enabled */ +void LOCAL_disableRGMIIInternalDelays(void) +{ + uint32_t regValue; + /* Disable RGMII half cycle delay for ES2.0 silicon */ + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + /* Disable half cycle delay for RGMII0 */ + regValue |= ((UInt32)0x1U << 25U); + /* Disable half cycle delay for RGMII1 */ + regValue |= ((UInt32)0x1U << 26U); + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; +} + +/** + * \brief Return ID of processor on which networking runs + */ +UInt32 Utils_netGetProcId(void) +{ + UInt32 procId = SYSTEM_PROC_INVALID; + + #ifdef NDK_PROC_TO_USE_IPU1_0 + procId = SYSTEM_PROC_IPU1_0; + #endif + + #ifdef NDK_PROC_TO_USE_IPU1_1 + procId = SYSTEM_PROC_IPU1_1; + #endif + + #ifdef NDK_PROC_TO_USE_IPU2 + procId = SYSTEM_PROC_IPU2; + #endif + + #ifdef NDK_PROC_TO_USE_A15_0 + procId = SYSTEM_PROC_A15_0; + #endif + + return procId; +} + +/** + ******************************************************************************* + * \brief Retrun IP address as a string + * + * If network stack is not initialized correctly 0.0.0.0 IP address + * is returned + * + * \param ipAddrStr [OUT] Assigned IP address as a string + * + ******************************************************************************* + */ +void Utils_ndkGetIpAddrStr(char *ipAddrStr, UInt32 ifIdx) +{ + IPN ipAddr; + + memset(&ipAddr, 0, sizeof(ipAddr)); + + strcpy(ipAddrStr,"none"); + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) && defined(BUILD_M4_0) ) || \ + ( defined(NDK_PROC_TO_USE_IPU1_1) && defined(BUILD_M4_1) ) || \ + ( defined(NDK_PROC_TO_USE_IPU2) && defined(BUILD_M4_2) ) || \ + ( defined(NDK_PROC_TO_USE_A15_0) && defined(BUILD_A15) ) + + NtIfIdx2Ip(ifIdx, &ipAddr); + NtIPN2Str(ipAddr, ipAddrStr); + +#endif + +} + +Int32 Utils_netGetIpAddrStr(char *ipAddr, UInt32 ifIdx) +{ + UInt32 linkId, procId; + Int32 status; + SystemCommon_IpAddr prm; + + prm.ifIdx = ifIdx; + + strcpy(ipAddr, "none" ); + + procId = Utils_netGetProcId(); + + if(procId==SYSTEM_PROC_INVALID) + { + status = SYSTEM_LINK_STATUS_EFAIL; + } + else + { + linkId = SYSTEM_MAKE_LINK_ID(procId, SYSTEM_LINK_ID_PROCK_LINK_ID); + + status = System_linkControl( + linkId, + SYSTEM_COMMON_CMD_GET_IP_ADDR, + &prm, + sizeof(prm), + TRUE + ); + + if(status==SYSTEM_LINK_STATUS_SOK) + { + strcpy(ipAddr, prm.ipAddr); + } + } + + return status; +} + +Bool Utils_netIsNetworkEnabled(void) +{ + Bool status = (Bool)FALSE; + +#if ( defined(NDK_PROC_TO_USE_IPU1_0) ) ||\ + ( defined(NDK_PROC_TO_USE_IPU1_1) ) ||\ + ( defined(NDK_PROC_TO_USE_IPU2 ) ) ||\ + ( defined(NDK_PROC_TO_USE_A15_0 ) ) + + status = (Bool)TRUE; + +#endif + + return status; +} + +#if defined(TDA2EX_ETHSRV_BOARD) + +void delay_mdio (uint32_t cnt) +{ + uint32_t i; + for (i = 0; i < cnt; i++); +} + +/* wait for go bit to 0 and ack bit to become 1 */ +void wait_for_user_access () +{ + uint32_t reg; + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x80000000; + while (reg != 0x0) + { + delay_mdio (10000); + delay_mdio (10000); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x80000000; + } + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x20000000; + while (reg != 0x20000000) + { + delay_mdio (10000); + delay_mdio (10000); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0) & 0x20000000; + } + +} + +uint32_t cpsw_mdio_read (unsigned char phy_reg, uint32_t PHY_ADDR) +{ + uint32_t reg = 0; + reg = + (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) | (PHY_ADDR << 16)); + WR_MEM_32 ((MDIOBASE + MDIO_USERACCESS0), reg); + wait_for_user_access (); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0); + reg = reg & 0x0000ffff; +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf (" Network: PHYREG READ VALUE = %x \n", reg); +#endif + return reg; +} + +void cpsw_mdio_write (unsigned char phy_reg, unsigned short data, uint32_t PHY_ADDR) +{ + uint32_t reg = 0; + reg = + (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) | (PHY_ADDR << 16) | + (data & USERACCESS_DATA)); + WR_MEM_32 ((MDIOBASE + MDIO_USERACCESS0), reg); + wait_for_user_access (); + reg = RD_MEM_32 (MDIOBASE + MDIO_USERACCESS0); + reg = reg & 0x0000ffff; +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf (" Network: PHYREG WRITE VALUE is = %x \n", reg); +#endif +} + +void Tda2Ex_EthSrvSwitch_reg_write(uint32_t portNum, uint32_t regAddr, uint32_t regVal) +{ +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: REG 0x%02x WRITE 0x%x\n", regAddr, regVal); +#endif + cpsw_mdio_write (regAddr, regVal, 0x3); +} + +void Tda2Ex_EthSrvSwitch_reg_read(uint32_t portNum, uint32_t regAddr, uint32_t *regVal) +{ +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: REG 0x%02x READ 0x%x\n", regAddr, *regVal); +#endif + *regVal = cpsw_mdio_read(regAddr, 0x3); +} + +void Tda2Ex_EthSrvSwitch_wait_for_access(uint32_t portNum, uint32_t *smi_regVal) +{ + do + { + Tda2Ex_EthSrvSwitch_reg_read(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + } while ((*smi_regVal & (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY)) != 0); +} + +void Tda2Ex_EthSrvSwitch_dev_reg_write(uint32_t portNum, uint32_t devAddr, uint32_t regAddr, uint32_t regVal) +{ + uint32_t smi_regVal; + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_DATA, regVal); + + smi_regVal = (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE) + | (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP) + | (devAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR) + | (regAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + smi_regVal |= (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); +} + +void Tda2Ex_EthSrvSwitch_dev_reg_read(uint32_t portNum, uint32_t devAddr, uint32_t regAddr, uint32_t *regVal) +{ + uint32_t smi_regVal; + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + smi_regVal = (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIMODE) + | (2U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIOP) + | (devAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_DEVADDR) + | (regAddr << TDA2EX_ETHSRVSWITCH_SMI_CMD_REGADDR); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + smi_regVal |= (1U << TDA2EX_ETHSRVSWITCH_SMI_CMD_SMIBUSY); + Tda2Ex_EthSrvSwitch_reg_write(portNum, TDA2EX_ETHSRVSWITCH_SMI_CMD, smi_regVal); + + Tda2Ex_EthSrvSwitch_wait_for_access(portNum, &smi_regVal); + + Tda2Ex_EthSrvSwitch_reg_read(portNum, TDA2EX_ETHSRVSWITCH_SMI_DATA, regVal); +} + + +enum Tda2Ex_EthSrvSwitch_ports { + TDA2EX_ETHSRVSWITCH_PORT0 = 0x1, + TDA2EX_ETHSRVSWITCH_PORT1 = 0x2, + TDA2EX_ETHSRVSWITCH_PORT2 = 0x4, + TDA2EX_ETHSRVSWITCH_PORT3 = 0x8, + TDA2EX_ETHSRVSWITCH_PORT4 = 0x10, + TDA2EX_ETHSRVSWITCH_PORT5 = 0x20, + TDA2EX_ETHSRVSWITCH_PORT6 = 0x40, + TDA2EX_ETHSRVSWITCH_PORT7 = 0x80, + TDA2EX_ETHSRVSWITCH_PORT8 = 0x100, +}; + + +void Tda2Ex_EthSrvConfigureSwitchDelays(uint32_t portNum) +{ + uint32_t regVal, regValPrevious; + int dev, reg; + + regVal = 0; + regValPrevious = 0; + + Vps_printf(" Network: Enable RGMII half-cycle-delay for 0, disable for 1\n"); + uint32_t regValue; + regValue = CTRL_MODULE_CTRL_CORE_SMA_SW_1; + + /* Enable half cycle delay for RGMII0 connected via MAC-to-MAC */ + regValue |= (0x0 << 25U); + + /* Disable half cycle delay for RGMII1 connected to DP83867 PHY */ + regValue |= (0x1 << 26U); + + CTRL_MODULE_CTRL_CORE_SMA_SW_1 = regValue; + + + Vps_printf(" Network: Waiting for switch to initialize..."); + do + { + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT, ®Val); + if (regVal != regValPrevious) + { +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: SWITCH_GLB_STAT: %08x", regVal); +#endif + regValPrevious = regVal; + } + } while ((regVal & (1U << TDA2EX_ETHSRVSWITCH_SWITCH_GLB_STAT_INITREADY)) == 0); + + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: GLB_CTRL2: %08x", regVal); +#endif + + /* Clear DA Check: Allows ANY RMU packet to be interpretted. TODO: Maybe set this bit and configure device address in ATU? */ + regVal &= ~(1U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_DACHECK); + + /* Set RMUMode to 0x2: Port 7 is RMU port (This allows external PC on J20 to configure switch. Change to 0x3 for port 8 when RMU access support is added) */ + regVal &= ~(3U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE); + regVal |= (2U << TDA2EX_ETHSRVSWITCH_GLB_CTRL2_RMUMODE); + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, regVal); + + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, TDA2EX_ETHSRVSWITCH_GLB1, TDA2EX_ETHSRVSWITCH_GLB_CTRL2, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: GLB_CTRL2: %08x", regVal); +#endif + + dev = 8; + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, TDA2EX_ETHSRVSWITCH_PHY_CTRL, ®Val); + regVal |= (0U << TDA2EX_ETHSRVSWITCH_PHY_CTRL_RXTIMING); + regVal |= (1U << TDA2EX_ETHSRVSWITCH_PHY_CTRL_TXTIMING); + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, dev, TDA2EX_ETHSRVSWITCH_PHY_CTRL, regVal); + + /* For Ports 1 through 5 (Main + 4 cameras) */ + for (dev = 1; dev <= 5; dev++) { + /* Forward only to these ports */ + regVal = TDA2EX_ETHSRVSWITCH_PORT0 | TDA2EX_ETHSRVSWITCH_PORT6 | TDA2EX_ETHSRVSWITCH_PORT7 | TDA2EX_ETHSRVSWITCH_PORT8; + Tda2Ex_EthSrvSwitch_dev_reg_write(portNum, dev, TDA2EX_ETHSRVSWITCH_VLAN_MAP, regVal); + } + + for (dev = 0; dev <= 8; ++dev) { +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: Switch port %d:\n", dev); +#endif + for (reg = 0; reg <= 6; ++reg) { + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, reg, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: reg %d = %08x\n", reg, regVal); +#endif + } + reg = 0x1F; + Tda2Ex_EthSrvSwitch_dev_reg_read(portNum, dev, reg, ®Val); +#if defined(DEBUG_TDA2EX_ETHSRVSWITCH_SMI) + Vps_printf(" Network: reg %d = %08x\n", reg, regVal); +#endif + } + + Vps_printf(" Network: TDA2EX ETHSRV board switch configuration done!\n"); +} +#endif + + 3173.uartInfo.txt + +As you pointed out, no packets appeared to be dropped at the GMAC level. Any modifications that may have done in the BIOS config file? The nsp_hooks.c file that you shared had only the NDK settings for the second interface. The ones for first interface should be in your BIOS config file. + +Hello Misael, Thanks for your reply. In file "PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\configs\tda2px_evm_bios_all\cfg.mk" , I have modified "NDK_PROC_TO_USE=ipu1_1" ; In file "PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\links_fw\src\rtos\bios_app_common\tda2px\cfg\NDK_config.cfg" , I have modified "enableStaticIpEth0 = 1"; Could I learn how to set the first interface from you more specify? For some unknown reasons , I can not upload any file here or this page would show message "error" , sorry I can not upload files here currently , and I will keepe trying at the followed reply. Thanks a lot . Best Regards. + +Add attachments. 1004.cfg.mk.txt # +# This file defines the modules included in $(MAKECONFIG) config +# +# Modules are split into, +# - Use-cases specified in uc_cfg.mk +# - Other system config/feature, specified in this file +# +# Any specific overrides are also specified in this file +# Example, for TDA3x SoC EVE2/3/4 are not present and hence force marked as , i.e disabled +# + +# +# Additional config options +# + +# +# CPUs to included in build +# +PROC_IPU1_0_INCLUDE=yes +PROC_IPU1_1_INCLUDE=yes +PROC_IPU2_INCLUDE=yes +PROC_A15_0_INCLUDE=yes +PROC_DSP1_INCLUDE=yes +PROC_DSP2_INCLUDE=yes +PROC_EVE1_INCLUDE=yes +PROC_EVE2_INCLUDE=yes + + +VSDK_BOARD_TYPE=TDA2PX_EVM + +DUAL_A15_SMP_BIOS=no + +# Supported values: DDR_MEM_512M +DDR_MEM=DDR_MEM_512M + +# Supported values: ipu1_0 ipu1_1 a15_0 none +NDK_PROC_TO_USE=ipu1_1 + +#Used to control TFDTP stack (supported values: yes no) +NSP_TFDTP_INCLUDE=no + +#Enable IPv6 Support +NDK_ENABLE_IPV6=no + +# Supported values: ipu1_0 none +FATFS_PROC_TO_USE=ipu1_0 + +# +# Used to control building of algorithm source. +# By default algorithm source not included in Vision SDK +# +BUILD_ALGORITHMS=no + +# +# Applies profile to all cores +# +# Supported profiles: release debug +#PROFILE=debug +PROFILE ?= release + +PROFILE_ipu1_0 ?= $(PROFILE) +PROFILE_ipu1_1 ?= $(PROFILE) +PROFILE_ipu2 ?= $(PROFILE) +PROFILE_c66xdsp_1 ?= $(PROFILE) +PROFILE_c66xdsp_2 ?= $(PROFILE) +PROFILE_arp32_1 ?= $(PROFILE) +PROFILE_arp32_2 ?= $(PROFILE) +PROFILE_a15_0 ?= $(PROFILE) + +# +# For TDA2xx, TDA2Px & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem +# For TDA3xx - We have only IPU1 and hence IPU1 is the only option +# Select IPU primary core from the available IPU1 & IPU2 subsytems +# +# Supported values: ipu1_0 ipu2 +IPU_PRIMARY_CORE=ipu1_0 +IPU_SECONDARY_CORE=ipu2 + +# +# Set A15_TARGET_OS +# A15 can run Linux or Bios +# +# A15_TARGET_OS support +# Platform BIOS Linux +# +# TDA2XX_EVM yes yes +# TDA3XX_EVM yes no +# TDA2EX_EVM yes yes +# TDA2PX_EVM yes yes +# +# Supported values: Bios Linux +A15_TARGET_OS=Bios + +IVAHD_INCLUDE=yes +VPE_INCLUDE=yes +DSS_INCLUDE=yes +CAL_INCLUDE=yes +ISS_INCLUDE=yes + +# +# EMIF ECC and Freedom from Interference (FFI) are clubbed together as they +# involve consolidated memory map changes +# ECC_FFI_INCLUDE=yes is not supported for DDR_MEM_128M +# If ECC_FFI_INCLUDE is set to no - memory map will match older versions. +# Firewall configuration and DSP XMC configuration is enabled/disabled using this +# flag +# Vision SDK does not enable EMIF ECC but expects SBL to enable it. +# Vision SDK sets up ECC error handlers irrespective of value of ECC_FFI_INCLUDE. +# +ECC_FFI_INCLUDE=no + +AVB_INCLUDE=no + +# +# Enable below macro to enable DCAN integration into Vision SDK. +# +DCAN_INCLUDE=no + +# +# Enable below macro to enable OPENVX into Vision SDK +# +OPENVX_INCLUDE=no + +CIO_REDIRECT=yes + +CPU_IDLE_ENABLED=yes + +# +# Enable below macro to view the bandwidth used by different IPs in the device +# as a graphical plot on the display screen. +# +DATA_VIS_INCLUDE=no + +OPENCL_INCLUDE=no +ENABLE_OPENCV=no + +HS_DEVICE=no + +# +# Enable this macro to enable Ultra sonic based initialization +# This is added as the power measurement and Ultra sonic use the same +# pad on the device. Kindly note the Ultrasonic and power measurement +# use the same GPIO6_14/15 pads with different functionalities. Ultrasonic configures +# UART10 on those pads and power measurement configures I2C3. Hence when this +# macro is yes the power measurement functionality is not supported. +# +ULTRASONIC_INCLUDE=no + +# Enable this macro to enable profiling features through system analyzer on CCS +ENABLE_UIA_PROFILING=no + +# +#Flag for task profiling +# +ENABLE_TASK_PROFILE_UTIL=yes + +WORKQ_INCLUDE=yes + +include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk + NDK_config.cfg.txt /******************************************************************************* +* file name: NDK_config.cfg +* This file is included in the core which uses NDK +* +*******************************************************************************/ + +var enableInstrumentation = 0; +var enableStaticIpEth0 = 1; +var enableStaticIpEth1 = 0; +var enableTelnet = 1; + + +/* use modules */ +var BIOS = xdc.useModule("ti.sysbios.BIOS"); +var IntXbar = xdc.useModule('ti.sysbios.family.shared.vayu.IntXbar'); +var NdkProcToUse = java.lang.System.getenv("NDK_PROC_TO_USE"); +var NspTfdtpInclude = java.lang.System.getenv("NSP_TFDTP_INCLUDE"); +var enableIPv6 = java.lang.System.getenv("NDK_ENABLE_IPV6"); +var DualA15_smpbios = java.lang.System.getenv("DUAL_A15_SMP_BIOS"); + +if(NdkProcToUse=="a15_0") +{ + var Hwi = xdc.useModule('ti.sysbios.family.arm.gic.Hwi'); +} +else +{ + var Hwi = xdc.useModule('ti.sysbios.family.arm.m3.Hwi'); +} + +/* NDK modules */ +var NdkConfigGlobal = xdc.useModule('ti.ndk.config.Global'); +var Ip = xdc.useModule('ti.ndk.config.Ip'); +var Tcp = xdc.useModule('ti.ndk.config.Tcp'); +var Udp = xdc.useModule('ti.ndk.config.Udp'); +var Telnet = xdc.useModule('ti.ndk.config.Telnet'); + +if(DualA15_smpbios=="yes") +{ + /* Use semaphore exclusion for SMP environment */ + NdkConfigGlobal.useSemLibs = true; +} + +/* NSP Driver */ +var GMACSW = xdc.useModule('ti.nsp.drv.GMACSW'); + +if (enableInstrumentation) +{ + GMACSW.instrumentedBuild = true; +} +else +{ + GMACSW.instrumentedBuild = false; +} + + +/* Enalbe TFDTP Stack in NSP */ +if (NspTfdtpInclude == "yes") +{ + GMACSW.tfdtpBuild = true; + NdkConfigGlobal.stackBeginHook = '&Utils_tfdtpDmaInit'; + NdkConfigGlobal.networkIPAddrHook = '&Network_ndkIPAddrHookFxn'; +} + +if (java.lang.System.getenv("AVB_INCLUDE") == "yes") +{ + /* AVBTP stack */ + var AVBTP = xdc.useModule('ti.avbtp.AVBTP'); + if (enableInstrumentation) + { + AVBTP.instrumentedBuild = true; + } + else + { + AVBTP.instrumentedBuild = false; + } +} + +/**********************************************************************\ +| Miscellaneous Configuration | +\**********************************************************************/ + +/* Specify startup init function for Bios */ +BIOS.startupFxns = ['&NDK_NSP_Init']; /* call the init function at startup time */ + +var irqOffset = 0; + +if(NdkProcToUse=="a15_0") +{ + irqOffset = 32; +} + +/* GMAC_SW RX_THRESH_PULSE Interrupt */ +IntXbar.connectIRQMeta(57, 334); +var hwi_param_0 = new Hwi.Params; +hwi_param_0.arg = 0; +Hwi.create(57+irqOffset, '&HwIntRxThresh', hwi_param_0); + +/* GMAC_SW RX_PULSE Interrupt */ +IntXbar.connectIRQMeta(58, 335); +var hwi_param_1 = new Hwi.Params; +hwi_param_1.arg = 0; +Hwi.create(58+irqOffset, '&HwIntRx', hwi_param_1); + +/* GMAC_SW TX_PULSE Interrupt */ +IntXbar.connectIRQMeta(59, 336); +var hwi_param_2 = new Hwi.Params; +hwi_param_2.arg = 0; +Hwi.create(59+irqOffset, '&HwIntTx', hwi_param_2); + +/* GMAC_SW MISC_PULSE Interrupt */ +IntXbar.connectIRQMeta(60, 337); +var hwi_param_3 = new Hwi.Params; +hwi_param_3.arg = 0; +Hwi.create(60+irqOffset, '&HwIntMisc', hwi_param_3); + + +/**********************************************************************\ +| NDK configuration | +\**********************************************************************/ + +/* select the stack library we want */ +if (enableIPv6 == "yes") +{ + NdkConfigGlobal.IPv6 = true; +} +else +{ + NdkConfigGlobal.IPv6 = false; +} + +NdkConfigGlobal.stackLibType = NdkConfigGlobal.MIN; +NdkConfigGlobal.netSchedulerPri = NdkConfigGlobal.NC_PRIORITY_HIGH; +NdkConfigGlobal.debugAbortLevel = NdkConfigGlobal.DBG_NONE; +NdkConfigGlobal.debugPrintLevel = NdkConfigGlobal.DBG_NONE; + +/* Assign memory sections and sizes */ +NdkConfigGlobal.pbmDataSection = ".bss:NDK_PACKETMEM"; +NdkConfigGlobal.memDataSection = ".bss:NDK_MMBUFFER"; +NdkConfigGlobal.lowTaskStackSize = 8192; +NdkConfigGlobal.normTaskStackSize = 8192; +NdkConfigGlobal.highTaskStackSize = 8192; +NdkConfigGlobal.ndkThreadStackSize = 8192; +NdkConfigGlobal.pktSizeFrameBuf = 1536; +if (NspTfdtpInclude == "yes") +{ + /* TFDTP stack needs at least 512 NDK Frame buffers */ + NdkConfigGlobal.pktNumFrameBufs = 512; +} +else +{ + NdkConfigGlobal.pktNumFrameBufs = 384; +} +NdkConfigGlobal.memRawPageSize = 3072; +NdkConfigGlobal.memRawPageCount = 16; + +/* Use hook functions available in the ti.ndk.config.Global module to add CGI commands */ +/*Add a stackInitHook function to congifure the second mac port a static or dynamic*/ +if(enableStaticIpEth1) +{ + NdkConfigGlobal.stackInitHook = '&stackInitHookStaticEth1'; +} +else +{ + NdkConfigGlobal.stackInitHook = '&stackInitHookDynEth1'; +} +NdkConfigGlobal.networkOpenHook = '&netOpenHook'; +NdkConfigGlobal.networkCloseHook = '&netCloseHook'; + +/* change the size of our receive buffers */ +Tcp.transmitBufSize = 64*1024; +Tcp.receiveBufSize = 64*1024; +Tcp.receiveBufLimit = 64*1024; +Udp.receiveBufSize = 64*1024; + +/* increase buffer sizes when NDK runs on A15 to get higher throughput */ +if(NdkProcToUse=="a15_0") +{ + NdkConfigGlobal.pktNumFrameBufs = 192*8; + NdkConfigGlobal.memRawPageCount = 16*8; + Tcp.transmitBufSize = 256*1024; + Tcp.receiveBufSize = 256*1024; + Tcp.receiveBufLimit = 256*1024; +} + +if (enableStaticIpEth0) +{ + /* Settings for static IP configuration */ + Ip.address = "192.168.1.200"; + Ip.mask = "255.255.255.0"; + Ip.gatewayIpAddr = "192.168.1.1"; + Ip.ifIdx = 1; +} +else +{ + Ip.dhcpClientMode = Ip.CIS_FLG_IFIDXVALID; +} + +if(enableTelnet) +{ + /* Add a Telnet server */ + var telnetParams = new Telnet.Params(); + telnetParams.callBackFxn = '&ConsoleOpen'; + var telnet = Telnet.create(telnetParams); + + /* Add some user accounts */ + var acct1 = new NdkConfigGlobal.Account(); + acct1.username = "username"; + acct1.password = "password"; + NdkConfigGlobal.addUserAccount(acct1); +} + +Hello sir , I found out a point , at the end of function "NIMU_NDK_init()" ,when called function "NIMURegister (pNETIFDevice)" , it returned -1 . So I think there must be some configuration mistake . Best Regards. Lan. + diff --git a/data2/text/range/30001+/917649.txt b/data2/text/range/30001+/917649.txt new file mode 100644 index 0000000000000000000000000000000000000000..fab8c33fd9089bd6ccad25985603ebc3b483b748 --- /dev/null +++ b/data2/text/range/30001+/917649.txt @@ -0,0 +1,556 @@ +Ticket Name: TDA2EVM5777: Couldn't establish I2C connection with OV10635 + +Query Text: +Part Number: TDA2EVM5777 Hi, I am trying to connect OV10635 camera through 913/914 deserializer-serializer in the Multi-des daughter board of TDA2x EVM. On my trial, I couldn't find the v4l device or i2c device of the camera at the specified address in ARM core. Here are the details of my work: Board : TDA2x EVM5777G-03-40-00 + Daughter board OS: Linux in ARM - yocto 6.00.00.03 built Steps I followed: 1) Connected OV10635 camera in the multi-des board, which was already mounted on vision board Pic 1: Cam connection on multi-des board Pic 2: Camera side connection and pin settings 2) Set the SW3 in the vision board to 01010101, as mentioned in https://processors.wiki.ti.com/index.php/Processor_SDK_Linux_Automotive_Software_Developers_Guide#Capturing_from_OV10635_Vision_board_camera 3) Restarted the board and probed at bus 1, address 0x30 to identify the camera, but device not detected at 0x30 4) Deserializer was identified at bus 1 address 0x60 and I was able to read and write the DES registers #i2cdetect -ry 1 => yielded devices at addresses 0x1b, 0x21, 0x25, 0x27, 0x50, 0x60, 0x61, 0x64, 0x68, 0x69, 0x6c 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- 1b -- -- -- -- 20: -- 21 -- -- -- 25 UU 27 -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: 60 61 -- -- 64 -- -- -- 68 69 -- -- 6c -- -- -- 70: -- -- -- -- -- -- -- -- 5) Configuring DES registers as per the 914 datasheet to communicate with SER, a) Read DES register SER ID (0x06) and found the value 0xb0, which is device id of serializer 913 b) Found the register SER ALIAS (0x07) with default value of 0x00, and set that with 0xb2 value c) Enabled pass-through by setting the value of register I2C CONTROL 1 (0x21) to 0x97 from 0x17 d) I2C read of serializer address failed #omapconf i2c read 1 0x58 0x00 => i2c read failed 6) Ran BIST test by tweaking the BIST CONTROL register(0x24) and found there were no errors on the PARITY ERROR COUNT register (0x25) Kindly help me on how to communicate with the serializer and then with camera. + +Responses: +Subramaniyan, Could you share your you kernel log file? You may also get some information about driver dts configuration in below thread: https://e2e.ti.com/support/processors/f/791/p/896624/3323554?tisearch=e2e-sitesearch&keymatch=ADI%252520HDMI#3323554 regards Jian + +Hi Jian, I have attached the kernel log here for reference. We had a some hardware debugging sessions and we found that there is no proper communication between the EVM board and 913 Serializer via 914 deserializer. Coming to the kernel messages, under the driver ov1063x.ko we get the following error ov1063x: probe of 1-0037 failed with error -121 I am suspecting the error id 121, may come from I2C connection timeout error 121. I am not seeing any V4L device after connecting the camera. Kindly let me know where should I look for DTS configuration. Note: I have initiated another thread on the interface forum about 913/914 https://e2e.ti.com/support/interface/f/138/p/925641/3422624#3422624 3348.KernelLog.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.19.73-g31275c05a1 (oe-user@oe-host) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Mon Jun 1 15:49:46 UTC 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: div instructions available: patching division code +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] OF: fdt: Machine model: TI DRA742 +[ 0.000000] bootconsole [earlycon0] enabled +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] efi: Getting EFI parameters from FDT: +[ 0.000000] efi: UEFI not found. +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB +[ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB +[ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB +[ 0.000000] OF: reserved mem: initialized node ipu1-memory@9d000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009f000000, size 8 MiB +[ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000c0000000, size 256 MiB +[ 0.000000] OF: reserved mem: initialized node gpu-memory@c0000000, compatible id shared-dma-pool +[ 0.000000] cma: Reserved 128 MiB at 0x00000000b0000000 +[ 0.000000] OMAP4: Map 0x000000027fd00000 to (ptrval) for dram barrier +[ 0.000000] On node 0 totalpages: 1043712 +[ 0.000000] DMA zone: 1728 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 196608 pages, LIFO batch:63 +[ 0.000000] HighMem zone: 847104 pages, LIFO batch:63 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] random: get_random_bytes called from start_kernel+0xb4/0x470 with crng_init=0 +[ 0.000000] percpu: Embedded 16 pages/cpu s36492 r8192 d20852 u65536 +[ 0.000000] pcpu-alloc: s36492 r8192 d20852 u65536 alloc=16*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1041984 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 elevator=noop root=PARTUUID=50a68c0f-02 rw rootwait earlyprintk fixrtc omapdrm.num_crtc=2 consoleblank=0 cma=128M@0xB0000000 rootfstype=ext4 snd.slots_reserved=1,1 +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 3562420K/4174848K available (10240K kernel code, 341K rwdata, 2800K rodata, 2048K init, 269K bss, 55372K reserved, 557056K cma-reserved, 2995200K highmem) +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) +[ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0x(ptrval) - 0x(ptrval) (12256 kB) +[ 0.000000] .init : 0x(ptrval) - 0x(ptrval) (2048 kB) +[ 0.000000] .data : 0x(ptrval) - 0x(ptrval) ( 342 kB) +[ 0.000000] .bss : 0x(ptrval) - 0x(ptrval) ( 270 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] rcu: Preemptible hierarchical RCU implementation. +[ 0.000000] Tasks RCU enabled. +[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 +[ 0.000000] GIC: Using split EOI/Deactivate mode +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.008215] Switching to timer-based delay loop, resolution 162ns +[ 0.014732] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.024898] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.030545] Console: colour dummy device 80x30 +[ 0.035110] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' +[ 0.041815] This ensures that you still see kernel messages. Please +[ 0.048238] update your kernel commandline. +[ 0.052560] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) +[ 0.063100] pid_max: default: 32768 minimum: 301 +[ 0.067948] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.074749] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.082525] CPU: Testing write buffer coherency: ok +[ 0.087572] CPU0: Spectre v2: using ICIALLU workaround +[ 0.093043] /cpus/cpu@0 missing clock-frequency property +[ 0.098517] /cpus/cpu@1 missing clock-frequency property +[ 0.103966] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.169920] Setting up static identity map for 0x80200000 - 0x80200060 +[ 0.176727] rcu: Hierarchical SRCU implementation. +[ 0.201863] EFI services will not be available. +[ 0.221734] smp: Bringing up secondary CPUs ... +[ 0.282055] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.282062] CPU1: Spectre v2: using ICIALLU workaround +[ 0.293249] smp: Brought up 1 node, 2 CPUs +[ 0.297450] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.303821] CPU: All CPU(s) started in HYP mode. +[ 0.308553] CPU: Virtualization extensions available. +[ 0.314371] devtmpfs: initialized +[ 0.335076] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.343183] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.353309] futex hash table entries: 512 (order: 3, 32768 bytes) +[ 0.368331] pinctrl core: initialized pinctrl subsystem +[ 0.374225] DMI not present or invalid. +[ 0.378432] NET: Registered protocol family 16 +[ 0.384254] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.392218] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.593117] cpuidle: using governor ladder +[ 0.597345] cpuidle: using governor menu +[ 0.611727] OMAP GPIO hardware version 0.1 +[ 0.643461] No ATAGs? +[ 0.643536] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.654087] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.660565] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.668171] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.676388] OMAP DMA hardware revision 0.0 +[ 0.691902] edma 43300000.edma: memcpy is disabled +[ 0.700074] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.712590] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.723857] evm_3v3: supplied by evm_12v0 +[ 0.728244] evm_5v0: supplied by evm_12v0 +[ 0.732699] evm_3v6: supplied by evm_5v0 +[ 0.739939] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.745928] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.751976] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.758022] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.764189] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.770177] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.776257] iommu: Adding device 58820000.ipu to group 1 +[ 0.781793] iommu: Adding device 55020000.ipu to group 2 +[ 0.787358] iommu: Adding device 40800000.dsp to group 0 +[ 0.793057] iommu: Adding device 41000000.dsp to group 3 +[ 0.799721] SCSI subsystem initialized +[ 0.804805] palmas 0-0058: IRQ missing: skipping irq request +[ 0.833955] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.841008] SMPS123: supplied by regulator-dummy +[ 0.847684] SMPS45: supplied by regulator-dummy +[ 0.854219] SMPS6: supplied by regulator-dummy +[ 0.860546] SMPS7: supplied by regulator-dummy +[ 0.866991] SMPS8: supplied by regulator-dummy +[ 0.873303] SMPS9: supplied by regulator-dummy +[ 0.878863] LDO1: supplied by regulator-dummy +[ 0.894170] LDO2: supplied by regulator-dummy +[ 0.904039] LDO3: supplied by regulator-dummy +[ 0.914048] LDO4: supplied by regulator-dummy +[ 0.918618] random: fast init done +[ 0.922741] LDO5: supplied by regulator-dummy +[ 0.927949] LDO6: supplied by regulator-dummy +[ 0.933139] LDO7: supplied by regulator-dummy +[ 0.938357] LDO8: supplied by regulator-dummy +[ 0.943548] LDO9: supplied by regulator-dummy +[ 0.958709] LDOLN: supplied by regulator-dummy +[ 0.968728] LDOUSB: supplied by regulator-dummy +[ 0.981386] pcf857x 0-0020: probed +[ 0.985439] pcf857x 0-0021: probed +[ 0.989115] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 1.019238] GPIO line 465 (vin6_sel_s0) hogged as output/low +[ 1.025214] pcf857x 1-0026: probed +[ 1.028847] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz +[ 1.034968] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 1.040903] media: Linux media interface: v0.10 +[ 1.045594] videodev: Linux video capture interface: v2.00 +[ 1.051280] pps_core: LinuxPPS API ver. 1 registered +[ 1.056385] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 1.065762] PTP clock support registered +[ 1.069814] EDAC MC: Ver: 3.0.0 +[ 1.073815] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 1.080315] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 1.087088] Advanced Linux Sound Architecture Driver Initialized. +[ 1.094208] clocksource: Switched to clocksource arch_sys_counter +[ 1.109057] NET: Registered protocol family 2 +[ 1.114092] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes) +[ 1.122016] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 1.129319] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 1.136082] TCP: Hash tables configured (established 8192 bind 8192) +[ 1.142660] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 1.148776] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 1.155458] NET: Registered protocol family 1 +[ 1.160357] RPC: Registered named UNIX socket transport module. +[ 1.166454] RPC: Registered udp transport module. +[ 1.171275] RPC: Registered tcp transport module. +[ 1.176113] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 1.182718] PCI: CLS 0 bytes, default 64 +[ 1.184112] hw perfevents: no interrupt-affinity property for /pmu, guessing. +[ 1.191657] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 1.201044] Initialise system trusted keyrings +[ 1.205770] workingset: timestamp_bits=14 max_order=20 bucket_order=6 +[ 1.217319] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 1.223763] NFS: Registering the id_resolver key type +[ 1.229007] Key type id_resolver registered +[ 1.233296] Key type id_legacy registered +[ 1.237498] ntfs: driver 2.1.32 [Flags: R/O]. +[ 1.243640] Key type asymmetric registered +[ 1.247884] Asymmetric key parser 'x509' registered +[ 1.252923] bounce: pool size: 64 pages +[ 1.256901] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) +[ 1.264552] io scheduler noop registered (default) +[ 1.269464] io scheduler deadline registered +[ 1.273927] io scheduler cfq registered +[ 1.277884] io scheduler mq-deadline registered +[ 1.282530] io scheduler kyber registered +[ 1.292465] pinctrl-single 4a003400.pinmux: 282 pins, size 1128 +[ 1.312675] dra7-pcie 51000000.pcie: Linked as a consumer to phy-4a094000.pciephy.1 +[ 1.320791] dra7-pcie 51000000.pcie: WA for Errata i870 not applied +[ 1.327324] dra7-pcie 51000000.pcie: host bridge /ocp/axi@0/pcie@51000000 ranges: +[ 1.335049] dra7-pcie 51000000.pcie: IO 0x20003000..0x20012fff -> 0x00000000 +[ 1.342561] dra7-pcie 51000000.pcie: MEM 0x20013000..0x2fffffff -> 0x20013000 +[ 2.344339] dra7-pcie 51000000.pcie: Phy link never came up +[ 2.350177] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 +[ 2.356636] pci_bus 0000:00: root bus resource [bus 00-ff] +[ 2.362264] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] +[ 2.368619] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] +[ 2.375708] pci 0000:00:00.0: [104c:8888] type 01 class 0x060400 +[ 2.375742] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit] +[ 2.375808] pci 0000:00:00.0: supports D1 +[ 2.375816] pci 0000:00:00.0: PME# supported from D0 D1 D3hot +[ 2.381620] PCI: bus0: Fast back to back transfers disabled +[ 2.392863] PCI: bus1: Fast back to back transfers enabled +[ 2.398538] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff 64bit] +[ 2.406059] pci 0000:00:00.0: PCI bridge to [bus 01-ff] +[ 2.411723] pcieport 0000:00:00.0: Signaling PME with IRQ 181 +[ 2.417758] pcieport 0000:00:00.0: AER enabled with IRQ 181 +[ 2.427739] evm_1v8: supplied by smps9 +[ 2.431858] evm_3v3_sw: supplied by sysen1 +[ 2.436310] aic_dvdd: supplied by evm_3v3_sw +[ 2.440763] vtt_fixed: supplied by sysen2 +[ 2.494142] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled +[ 2.504306] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 45, base_baud = 3000000) is a 8250 +[ 2.513306] console [ttyS0] enabled +[ 2.520400] bootconsole [earlycon0] disabled +[ 2.530002] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 46, base_baud = 3000000) is a 8250 +[ 2.539632] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 47, base_baud = 3000000) is a 8250 +[ 2.550778] omap_rng 48090000.rng: Random Number Generator ver. 20 +[ 2.551041] random: crng init done +[ 2.561296] omapdss_dss 58000000.dss: Linked as a consumer to regulator.25 +[ 2.568353] DSS: OMAP DSS rev 6.1 +[ 2.574681] omapdss_hdmi5 58040000.encoder: Linked as a consumer to regulator.18 +[ 2.582190] omapdss_hdmi5 58040000.encoder: Dropping the link to regulator.18 +[ 2.602588] brd: module loaded +[ 2.611840] loop: module loaded +[ 2.621149] m25p80 spi0.0: s25fl256s1 (32768 Kbytes) +[ 2.626280] 10 fixed-partitions partitions found on MTD device spi0.0 +[ 2.632752] Creating 10 MTD partitions on "spi0.0": +[ 2.637697] 0x000000000000-0x000000010000 : "QSPI.SPL" +[ 2.643542] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" +[ 2.650077] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" +[ 2.656592] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" +[ 2.663068] 0x000000040000-0x000000140000 : "QSPI.u-boot" +[ 2.669164] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" +[ 2.675868] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" +[ 2.682268] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" +[ 2.689414] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" +[ 2.695507] 0x0000009e0000-0x000002000000 : "QSPI.file-system" +[ 2.702582] libphy: Fixed MDIO Bus: probed +[ 2.764249] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 +[ 2.771944] davinci_mdio 48485000.mdio: detected phy mask fffffff3 +[ 2.782372] libphy: 48485000.mdio: probed +[ 2.786427] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 2.794489] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 2.803253] cpsw 48484000.ethernet: Detected MACID = 0c:b2:b7:f7:78:9c +[ 2.809875] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 +[ 2.816281] cpsw 48484000.ethernet: ALE Table size 1024 +[ 2.821568] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) +[ 2.829590] cpsw 48484000.ethernet: cpsw: Detected MACID = 0c:b2:b7:f7:78:9d +[ 2.838273] i2c /dev entries driver +[ 2.847106] cpu cpu0: Linked as a consumer to regulator.10 +[ 2.852692] cpu cpu0: Linked as a consumer to regulator.32 +[ 2.859884] sdhci: Secure Digital Host Controller Interface driver +[ 2.866198] sdhci: Copyright(c) Pierre Ossman +[ 2.871945] sdhci-pltfm: SDHCI platform and OF driver helper +[ 2.878500] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) +[ 2.887582] sdhci-omap 4809c000.mmc: Got CD GPIO +[ 2.892349] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 +[ 2.899400] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 +[ 2.906282] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 +[ 2.913057] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 +[ 2.919942] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 +[ 2.926566] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 +[ 2.933606] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 +[ 2.940383] sdhci-omap 480b4000.mmc: Dropping the link to regulator.2 +[ 2.946933] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 +[ 2.978074] mmc0: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA +[ 2.985908] ti-iodelay 4844a000.padconf: Set reg 0x840 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 2.994866] ti-iodelay 4844a000.padconf: Set reg 0x848 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.003807] ti-iodelay 4844a000.padconf: Set reg 0x84c Delay(a: 307 g: 0), Elements(C=0 F=9)0x29009 +[ 3.012983] ti-iodelay 4844a000.padconf: Set reg 0x850 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.021959] ti-iodelay 4844a000.padconf: Set reg 0x854 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.031034] ti-iodelay 4844a000.padconf: Set reg 0x870 Delay(a: 785 g: 0), Elements(C=1 F=9)0x29029 +[ 3.040253] ti-iodelay 4844a000.padconf: Set reg 0x874 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.049320] ti-iodelay 4844a000.padconf: Set reg 0x878 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.058366] ti-iodelay 4844a000.padconf: Set reg 0x87c Delay(a: 613 g: 0), Elements(C=1 F=4)0x29024 +[ 3.067620] ti-iodelay 4844a000.padconf: Set reg 0x880 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.076668] ti-iodelay 4844a000.padconf: Set reg 0x884 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.085742] ti-iodelay 4844a000.padconf: Set reg 0x888 Delay(a: 683 g: 0), Elements(C=1 F=6)0x29026 +[ 3.094965] ti-iodelay 4844a000.padconf: Set reg 0x88c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.104019] ti-iodelay 4844a000.padconf: Set reg 0x890 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.113091] ti-iodelay 4844a000.padconf: Set reg 0x894 Delay(a: 835 g: 0), Elements(C=1 F=10)0x2902a +[ 3.122324] ti-iodelay 4844a000.padconf: Set reg 0x898 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.131265] ti-iodelay 4844a000.padconf: Set reg 0x89c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.140404] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 +[ 3.147212] sdhci-omap 480d1000.mmc: Dropping the link to regulator.8 +[ 3.153748] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.7 +[ 3.160550] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 +[ 3.216730] ti-iodelay 4844a000.padconf: Set reg 0x190 Delay(a: 274 g: 0), Elements(C=0 F=8)0x29008 +[ 3.225847] ti-iodelay 4844a000.padconf: Set reg 0x194 Delay(a: 162 g: 0), Elements(C=0 F=4)0x29004 +[ 3.234965] ti-iodelay 4844a000.padconf: Set reg 0x1a8 Delay(a: 401 g: 0), Elements(C=0 F=11)0x2900b +[ 3.244145] ti-iodelay 4844a000.padconf: Set reg 0x1ac Delay(a: 73 g: 0), Elements(C=0 F=2)0x29002 +[ 3.253167] ti-iodelay 4844a000.padconf: Set reg 0x1b4 Delay(a: 465 g: 0), Elements(C=0 F=13)0x2900d +[ 3.262378] sdhci-omap 480d1000.mmc: no pinctrl state for sdr104 mode +[ 3.268881] ti-iodelay 4844a000.padconf: Set reg 0x1b8 Delay(a: 115 g: 0), Elements(C=0 F=3)0x29003 +[ 3.277998] ti-iodelay 4844a000.padconf: Set reg 0x1c0 Delay(a: 633 g: 0), Elements(C=1 F=4)0x29024 +[ 3.278007] sdhci-omap 480d1000.mmc: no pinctrl state for ddr50 mode +[ 3.287103] ti-iodelay 4844a000.padconf: Set reg 0x1c4 Delay(a: 47 g: 0), Elements(C=0 F=1)0x29001 +[ 3.293478] sdhci-omap 480d1000.mmc: no pinctrl state for sdr50 mode +[ 3.302488] ti-iodelay 4844a000.padconf: Set reg 0x1d0 Delay(a: 935 g: 280), Elements(C=1 F=18)0x29032 +[ 3.308874] sdhci-omap 480d1000.mmc: no pinctrl state for hs200_1_8v mode +[ 3.318236] ti-iodelay 4844a000.padconf: Set reg 0x1d8 Delay(a: 621 g: 0), Elements(C=1 F=4)0x29024 +[ 3.334154] ti-iodelay 4844a000.padconf: Set reg 0x1dc Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.343085] ti-iodelay 4844a000.padconf: Set reg 0x1e4 Delay(a: 183 g: 0), Elements(C=0 F=5)0x29005 +[ 3.350732] mmc1: SDHCI controller on 480d1000.mmc [480d1000.mmc] using PIO +[ 3.352268] ti-iodelay 4844a000.padconf: Set reg 0x1e8 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.368237] ti-iodelay 4844a000.padconf: Set reg 0x1f0 Delay(a: 467 g: 0), Elements(C=0 F=13)0x2900d +[ 3.377479] ti-iodelay 4844a000.padconf: Set reg 0x1f4 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.386524] ti-iodelay 4844a000.padconf: Set reg 0x1fc Delay(a: 262 g: 0), Elements(C=0 F=7)0x29007 +[ 3.395756] ti-iodelay 4844a000.padconf: Set reg 0x200 Delay(a: 46 g: 0), Elements(C=0 F=1)0x29001 +[ 3.404900] ti-iodelay 4844a000.padconf: Set reg 0x364 Delay(a: 684 g: 0), Elements(C=1 F=6)0x29026 +[ 3.414090] ti-iodelay 4844a000.padconf: Set reg 0x368 Delay(a: 76 g: 0), Elements(C=0 F=2)0x29002 +[ 3.414113] ledtrig-cpu: registered to indicate activity on CPUs +[ 3.427535] mmc0: new HS200 MMC card at address 0001 +[ 3.432240] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.3 +[ 3.441135] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.4 +[ 3.448504] mmcblk0: mmc0:0001 MMC08G 7.25 GiB +[ 3.449532] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 +[ 3.453514] mmcblk0boot0: mmc0:0001 MMC08G partition 1 8.00 MiB +[ 3.460129] NET: Registered protocol family 10 +[ 3.465364] mmcblk0boot1: mmc0:0001 MMC08G partition 2 8.00 MiB +[ 3.475404] mmcblk0rpmb: mmc0:0001 MMC08G partition 3 128 KiB, chardev (243:0) +[ 3.480163] Segment Routing with IPv6 +[ 3.486606] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver +[ 3.493245] NET: Registered protocol family 17 +[ 3.498027] Key type dns_resolver registered +[ 3.502549] Registering SWP/SWPB emulation handler +[ 3.507411] omap_voltage_late_init: Voltage driver support not added +[ 3.513841] Power Management for TI OMAP4+ devices. +[ 3.519601] Loading compiled-in X.509 certificates +[ 3.541647] dmm 4e000000.dmm: workaround for errata i878 in use +[ 3.549221] dmm 4e000000.dmm: initialized all PAT entries +[ 3.556107] omapdss_hdmi5 58040000.encoder: Linked as a consumer to regulator.18 +[ 3.563618] omapdss_hdmi5 58040000.encoder: Dropping the link to regulator.18 +[ 3.572254] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) +[ 3.581119] sdhci-omap 4809c000.mmc: Got CD GPIO +[ 3.585944] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 +[ 3.593014] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 +[ 3.599915] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 +[ 3.606570] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.36 +[ 3.613595] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 +[ 3.620516] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_1_8v mode +[ 3.627193] sdhci-omap 4809c000.mmc: no pinctrl state for ddr_3_3v mode +[ 3.633853] sdhci-omap 4809c000.mmc: no pinctrl state for hs200_1_8v mode +[ 3.667185] mmc2: SDHCI controller on 4809c000.mmc [4809c000.mmc] using ADMA +[ 3.675978] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok +[ 3.683734] asoc-simple-card sound0: ASoC: no DMI vendor name! +[ 3.692470] omapdss_hdmi5 58040000.encoder: Linked as a consumer to regulator.18 +[ 3.700279] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) +[ 3.708290] omapdss_dss 58000000.dss: bound 58040000.encoder (ops hdmi5_component_ops) +[ 3.744469] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). +[ 3.751140] [drm] No driver support for vblank timestamp query. +[ 3.757148] [drm] Cannot find any crtc or sizes +[ 3.762559] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 0 +[ 3.770627] input: gpio_keys as /devices/platform/gpio_keys/input/input0 +[ 3.777571] hctosys: unable to open rtc device (rtc0) +[ 3.783245] aic_dvdd: disabling +[ 3.786600] ldousb: disabling +[ 3.789857] ALSA device list: +[ 3.792836] #0: DRA7xx-EVM +[ 3.796328] Waiting for root device PARTUUID=50a68c0f-02... +[ 3.904773] mmc2: host does not support reading read-only switch, assuming write-enable +[ 3.917595] ti-iodelay 4844a000.padconf: Set reg 0x620 Delay(a: 600 g: 400), Elements(C=1 F=10)0x2902a +[ 3.926973] ti-iodelay 4844a000.padconf: Set reg 0x628 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.935900] ti-iodelay 4844a000.padconf: Set reg 0x62c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.944865] ti-iodelay 4844a000.padconf: Set reg 0x634 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.953781] ti-iodelay 4844a000.padconf: Set reg 0x638 Delay(a: 30 g: 0), Elements(C=0 F=0)0x29000 +[ 3.962796] ti-iodelay 4844a000.padconf: Set reg 0x640 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.971724] ti-iodelay 4844a000.padconf: Set reg 0x644 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.980685] ti-iodelay 4844a000.padconf: Set reg 0x64c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.989617] ti-iodelay 4844a000.padconf: Set reg 0x650 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 3.998546] ti-iodelay 4844a000.padconf: Set reg 0x658 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 4.007508] ti-iodelay 4844a000.padconf: Set reg 0x65c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 +[ 4.021657] mmc2: new ultra high speed SDR104 SDHC card at address aaaa +[ 4.029029] mmcblk2: mmc2:aaaa SC16G 14.8 GiB +[ 4.037859] mmcblk2: p1 p2 +[ 4.372077] EXT4-fs (mmcblk2p2): recovery complete +[ 4.377839] EXT4-fs (mmcblk2p2): mounted filesystem with ordered data mode. Opts: (null) +[ 4.386123] VFS: Mounted root (ext4 filesystem) on device 179:50. +[ 4.400312] devtmpfs: mounted +[ 4.404188] Freeing unused kernel memory: 2048K +[ 4.408871] Run /sbin/init as init process +[ 4.532972] systemd[1]: System time before build time, advancing clock. +[ 4.554795] systemd[1]: systemd 239 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid) +[ 4.576998] systemd[1]: Detected architecture arm. +[ 4.616820] systemd[1]: Set hostname to . +[ 4.731487] systemd[1]: File /lib/systemd/system/systemd-journald.service:36 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. +[ 4.748643] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) +[ 4.834280] [drm] Cannot find any crtc or sizes +[ 4.943620] systemd[1]: Listening on Network Service Netlink Socket. +[ 4.984416] systemd[1]: Reached target Remote File Systems. +[ 5.014891] systemd[1]: Started Forward Password Requests to Wall Directory Watch. +[ 5.054460] systemd[1]: Listening on initctl Compatibility Named Pipe. +[ 5.094747] systemd[1]: Listening on Journal Socket. +[ 5.205393] cmemk: loading out-of-tree module taints kernel. +[ 5.213377] CMEMK module: reference Linux version 4.19.73 +[ 5.219519] no physical memory specified +[ 5.223471] cmemk initialized +[ 5.578612] EXT4-fs (mmcblk2p2): re-mounted. Opts: (null) +[ 6.192225] systemd-journald[116]: Received request to flush runtime journal from PID 1 +[ 6.539201] omap-rproc 58820000.ipu: ignoring dependency for device, assuming no driver +[ 6.594715] omap-rproc 58820000.ipu: ignoring dependency for device, assuming no driver +[ 6.602761] omap-rproc 58820000.ipu: assigned reserved memory node ipu1-memory@9d000000 +[ 6.671145] remoteproc remoteproc0: 58820000.ipu is available +[ 6.712596] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver +[ 6.784717] omap-rproc 55020000.ipu: ignoring dependency for device, assuming no driver +[ 6.807523] remoteproc remoteproc0: powering up 58820000.ipu +[ 6.824573] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 5071844 +[ 6.848910] omap-rproc 55020000.ipu: assigned reserved memory node ipu2-memory@95800000 +[ 6.885028] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 +[ 6.974455] ov1063x: probe of 1-0037 failed with error -121 +[ 6.986676] remoteproc remoteproc1: 55020000.ipu is available +[ 6.996456] Driver for 1-wire Dallas network protocol. +[ 7.003025] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 7.025480] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver +[ 7.048883] remoteproc remoteproc0: registered virtio0 (type 7) +[ 7.071437] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 +[ 7.105811] omap_hdq 480b2000.1w: OMAP HDQ Hardware Rev 0.:. Driver in Interrupt mode +[ 7.134469] remoteproc remoteproc0: remote processor 58820000.ipu is now up +[ 7.146914] omap-rproc 40800000.dsp: ignoring dependency for device, assuming no driver +[ 7.178358] omap-des 480a5000.des: will run requests pump with realtime priority +[ 7.190974] omap_rtc 48838000.rtc: char device (253:0) +[ 7.190987] omap_rtc 48838000.rtc: registered as rtc0 +[ 7.222094] omap-rproc 40800000.dsp: assigned reserved memory node dsp1-memory@99000000 +[ 7.248162] remoteproc remoteproc2: 40800000.dsp is available +[ 7.248168] virtio_rpmsg_bus virtio0: creating channel rpmsg-client-sample addr 0x32 +[ 7.248271] virtio_rpmsg_bus virtio0: creating channel rpmsg-client-sample addr 0x33 +[ 7.272910] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver +[ 7.317213] omap-rproc 41000000.dsp: ignoring dependency for device, assuming no driver +[ 7.333881] w1_master_driver w1_bus_master1: Attaching one wire slave 01.000000000000 crc 3d +[ 7.362368] virtio_rpmsg_bus virtio0: creating channel rpmsg-omx addr 0x3c +[ 7.371485] omap-rproc 41000000.dsp: assigned reserved memory node dsp2-memory@9f000000 +[ 7.381383] remoteproc remoteproc2: powering up 40800000.dsp +[ 7.387875] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 5769704 +[ 7.393086] virtio_rpmsg_bus virtio0: creating channel rpmsg-rpc addr 0x65 +[ 7.415584] remoteproc remoteproc3: 41000000.dsp is available +[ 7.422258] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 7.425157] w1_master_driver w1_bus_master1: Family 1 for 01.000000000000.3d is not registered. +[ 7.428185] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 7.449700] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin +[ 7.500101] net eth1: initializing cpsw version 1.15 (0) +[ 7.517286] remoteproc remoteproc1: powering up 55020000.ipu +[ 7.523011] remoteproc remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3751384 +[ 7.534818] vpe 489d0000.vpe: Device registered as /dev/video0 +[ 7.545469] vip 48970000.vip: loading firmware vpdma-1b8.bin +[ 7.551984] Generic PHY 48485000.mdio:03: attached PHY driver [Generic PHY] (mii_bus:phy_addr=48485000.mdio:03, irq=POLL) +[ 7.570579] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 7.584528] vip 48970000.vip: VPDMA firmware loaded +[ 7.605159] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 7.610721] remoteproc remoteproc2: registered virtio1 (type 7) +[ 7.621337] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x32 +[ 7.635140] remoteproc remoteproc3: powering up 41000000.dsp +[ 7.638466] remoteproc remoteproc2: remote processor 40800000.dsp is now up +[ 7.644852] remoteproc remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 5769828 +[ 7.662885] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready +[ 7.678414] virtio_rpmsg_bus virtio1: creating channel rpmsg-client-sample addr 0x33 +[ 7.694398] phy phy-4a084000.phy.3: Linked as a consumer to regulator.26 +[ 7.712493] virtio_rpmsg_bus virtio1: creating channel rpmsg-omx addr 0x3c +[ 7.712707] libata version 3.00 loaded. +[ 7.722049] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 7.727981] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 7.728609] phy phy-4a085000.phy.4: Linked as a consumer to regulator.26 +[ 7.782529] virtio_rpmsg_bus virtio1: creating channel rpmsg-rpc addr 0x65 +[ 7.782857] ahci 4a140000.sata: controller can't do 64bit DMA, forcing 32bit +[ 7.818040] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 +[ 7.827327] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec +[ 7.837311] net eth0: initializing cpsw version 1.15 (0) +[ 7.842789] ahci 4a140000.sata: forcing port_map 0x0 -> 0x1 +[ 7.859866] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 +[ 7.877042] Generic PHY 48485000.mdio:02: attached PHY driver [Generic PHY] (mii_bus:phy_addr=48485000.mdio:02, irq=POLL) +[ 7.889089] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode +[ 7.898444] omap-aes 4b500000.aes: will run requests pump with realtime priority +[ 7.939587] ahci 4a140000.sata: flags: ncq sntf pm led clo only pmp pio slum part ccc apst +[ 7.961989] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 7.989513] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready +[ 8.006911] remoteproc remoteproc3: registered virtio2 (type 7) +[ 8.022180] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 +[ 8.051982] omap-aes 4b700000.aes: will run requests pump with realtime priority +[ 8.060899] remoteproc remoteproc3: remote processor 41000000.dsp is now up +[ 8.073321] CAN device driver interface +[ 8.116173] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x32 +[ 8.150118] virtio_rpmsg_bus virtio2: creating channel rpmsg-client-sample addr 0x33 +[ 8.159677] virtio_rpmsg_bus virtio2: creating channel rpmsg-omx addr 0x3c +[ 8.196889] virtio_rpmsg_bus virtio2: creating channel rpmsg-rpc addr 0x65 +[ 8.462325] virtio_rpmsg_bus virtio3: rpmsg host is online +[ 8.498101] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=35f57a89, irq=100) +[ 8.501521] scsi host0: ahci +[ 8.501951] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 87 +[ 8.525660] remoteproc remoteproc1: registered virtio3 (type 7) +[ 8.525666] remoteproc remoteproc1: remote processor 55020000.ipu is now up +[ 8.526089] virtio_rpmsg_bus virtio3: creating channel rpmsg-rpc addr 0x65 +[ 8.526205] virtio_rpmsg_bus virtio3: creating channel rpmsg-rpc addr 0x66 +[ 8.613949] pvrsrvkm 56000000.gpu: assigned reserved memory node gpu-memory@c0000000 +[ 8.635474] [drm] Initialized pvr 1.17.4948957 20110701 for 56000000.gpu on minor 1 +[ 8.729790] omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok +[ 8.769919] omap-hdmi-audio omap-hdmi-audio.0.auto: ASoC: no DMI vendor name! +[ 8.836604] ata1: SATA link down (SStatus 0 SControl 300) +[ 10.318483] rpmsg_rpc virtio0.rpmsg-rpc.-1.101: probing service rpc_example_2 with src 1024 dst 101 +[ 10.368225] rpmsg_rpc virtio1.rpmsg-rpc.-1.101: probing service rpc_example_4 with src 1024 dst 101 +[ 10.368674] rpmsg_rpc virtio0.rpmsg-rpc.-1.101: published functions = 8 +[ 10.415609] rpmsg_rpc virtio2.rpmsg-rpc.-1.101: probing service rpc_example_3 with src 1024 dst 101 +[ 10.448179] dwc3 48890000.usb: Failed to get clk 'ref': -2 +[ 10.476137] rpmsg_rpc virtio1.rpmsg-rpc.-1.101: published functions = 8 +[ 10.489779] rpmsg_rpc virtio3.rpmsg-rpc.-1.101: probing service dce-callback with src 1024 dst 101 +[ 10.526671] rpmsg_rpc virtio3.rpmsg-rpc.-1.102: probing service rpmsg-dce with src 1025 dst 102 +[ 10.528068] rpmsg_rpc virtio2.rpmsg-rpc.-1.101: published functions = 8 +[ 10.607608] rpmsg_rpc virtio3.rpmsg-rpc.-1.101: published functions = 4 +[ 10.627207] rpmsg_rpc virtio3.rpmsg-rpc.-1.102: published functions = 9 +[ 10.651106] dwc3 488d0000.usb: Failed to get clk 'ref': -2 +[ 10.656786] dwc3 48890000.usb: changing max_speed on rev 5533202a +[ 10.727200] usbcore: registered new interface driver usbfs +[ 10.743634] usbcore: registered new interface driver hub +[ 10.761840] usbcore: registered new device driver usb +[ 10.808693] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.816434] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 1 +[ 10.827655] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x0000000002010010 +[ 10.838476] xhci-hcd xhci-hcd.1.auto: irq 192, io mem 0x488d0000 +[ 10.848335] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.19 +[ 10.859813] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.872238] usb usb1: Product: xHCI Host Controller +[ 10.880171] usb usb1: Manufacturer: Linux 4.19.73-g31275c05a1 xhci-hcd +[ 10.891350] usb usb1: SerialNumber: xhci-hcd.1.auto +[ 10.897569] hub 1-0:1.0: USB hub found +[ 10.901644] hub 1-0:1.0: 1 port detected +[ 10.908051] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller +[ 10.913928] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 2 +[ 10.922998] xhci-hcd xhci-hcd.1.auto: Host supports USB 3.0 SuperSpeed +[ 10.930596] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. +[ 10.939556] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.19 +[ 10.948585] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 10.956480] usb usb2: Product: xHCI Host Controller +[ 10.966166] usb usb2: Manufacturer: Linux 4.19.73-g31275c05a1 xhci-hcd +[ 10.981705] usb usb2: SerialNumber: xhci-hcd.1.auto +[ 10.996141] hub 2-0:1.0: USB hub found +[ 11.015462] hub 2-0:1.0: 1 port detected +[ 13.842837] PVR_K: UM DDK-(4948957) and KM DDK-(4948957) match. [ OK ] +[ 121.640935] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx +[ 121.648873] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready +[ 127.811032] NET: Registered protocol family 15 +[ 127.875006] Initializing XFRM netlink socket +[ 2090.863222] ov1063x: probe of 1-0037 failed with error -121 + +Subramaniyan, I saw you are focusing on I2C debug on the other thread. I will mark this thread as closed. Please reopen or create a new thread (if the nature of issues is different). regards Jian + +Hi Jian, I would like to reopen the issue, as in the interface forum (), they have suggested that I2C signals, locking of serializer and deserializer is proper and the issue may be with Processor SW. As I mentioned before the I am having Linux OS in ARM of TDA2x5777EVM built from yocto 6.00.00.03. I don't know why I couldn't see the serializer in the I2C bus or OV10635 camera in the /dev/ location. Kindly help me to solve this issue. Regards, Subramaniyan + +Subramaniyan, just to confirm, there was no changes from the OV1063x probing during boot, all logs stays the same? >>> Kindly let me know where should I look for DTS configuration. sdk/board-support/linux-4.19.94+gitAUTOINC+5a23bc00e0-g5a23bc00e0/arch/arm/boot/dts/ti/ you would see files named by board names. for OV device, you need to set both camera driver and associated i2c driver. i will also check with my colleague who are familiar with the device. Jian + diff --git a/data2/text/range/30001+/917914.txt b/data2/text/range/30001+/917914.txt new file mode 100644 index 0000000000000000000000000000000000000000..088336615f7dc428fe5a7eb33e1d1aa900685afb --- /dev/null +++ b/data2/text/range/30001+/917914.txt @@ -0,0 +1,90 @@ +Ticket Name: TDA2EVM5777: TI DeepLearning Library Compiling + +Query Text: +Part Number: TDA2EVM5777 Hello, I am running PROCESSOR_SDK_VISION_03_08_00_00 trying to get TI_DL to compile but I am running into issues. When I navigate to C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test and try to run the command gmake CORE=eve all as noted in the user guide TIDeepLearningLibrary_UserGuide.pdf, I am getting these warnings and an error: OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/%.obj' gmake: *** No rule to make target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/dsp/release/modules/ti_dl/test/../../../common/configparser.obj', needed by `out/dsp_test_dl_algo.out'. Stop. I have looked into the make file to see if this could possibly be a mismatch of forward slash or backslash, but I can’t seem to find the issue. I used to have issues where the forward slash/back slash were causing issues so I made a few modifications to the make file. I can send the modified file if requested. Here is the output of gmake CORE=eve all print if it helps: OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' echo -cr -x --display_error_number --diag_suppress=num=10063 --diag_suppress=num=10068 -l C:/ti/ccsv8/tools/compiler/arp32_1.0.9/lib/rtsarp32_v200.lib -l ./linker_eve_release.cmd -l "../../ti_dl/lib/eve/release/tidl_algo.lib" /datalocal1/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib -cr -x --display_error_number --diag_suppress=num=10063 --diag_suppress=num=10068 -l C:/ti/ccsv8/tools/compiler/arp32_1.0.9/lib/rtsarp32_v200.lib -l ./linker_eve_release.cmd -l ../../ti_dl/lib/eve/release/tidl_algo.lib /datalocal1/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/eve/release/dmautils.lib echo C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj echo ./out/eve_test_dl_algo.out ./out/eve_test_dl_algo.out echo ../../../common/configparser.c ../../../common/ti_draw_utils.c ../../../common/ti_mem_manager.c ../../../common/eve/eve_profile.c ../../../common/eve/curve_fitting.c ../../../common/eve/eve_sctm.c ../../../common/eve/ti_stats_collector.c ../../../common/eve/cred.c ../../../common/eve/boot_arp32.asm ../../../common/configparser.c ../../../common/ti_draw_utils.c ../../../common/ti_mem_manager.c ../../../common/eve/eve_profile.c ../../../common/eve/curve_fitting.c ../../../common/eve/eve_sctm.c ../../../common/eve/ti_stats_collector.c ../../../common/eve/cred.c ../../../common/eve/boot_arp32.asm echo echo @C:/ti/ccsv8/tools/compiler/arp32_1.0.9/bin/ar-arp32 r ./out/eve_test_dl_algo.out C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj @C:/ti/ccsv8/tools/compiler/arp32_1.0.9/bin/ar-arp32 r ./out/eve_test_dl_algo.out C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj Thank you, iFer + +Responses: +Can you please run gmake with SHOW_COMMAD=1 and share the log? + +Hello Kumar! Thank you for your reply, When I run the command, this is the output: C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test>gmake CORE=eve all SHOW_COMMAD=1 OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' gmake: *** No rule to make target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj', needed by `out/eve_test_dl_algo.out'. Stop. C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test> Assuming it may have been typo when you sent the command, I also ran the command gmake CORE=eve all SHOW_COMMAND=1 Here is the output of the command: C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test>gmake CORE=eve all SHOW_COMMAND=1 OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' gmake: *** No rule to make target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj', needed by `out/eve_test_dl_algo.out'. Stop. C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test> It does not seem like the command did anything. I appreciate your help with this issue. Do you have any other suggestions? Thank you, iFer + +Hi iFer, Did you follow all the steps mentioned in section "3.3 Building Sample Test Application" of the TIDL user guide ? Also did you set the environment variables either directly setting by updating the system environment variables or by editing the config.mk file in makerules folder? Please share the updated "config.mk" file? Thanks, Praveen + +Thank you for your reply. I believe I followed the steps correctly. I set the environment variables on my system as shown below. Please let me know if I am missing something. -iFer 3173.config.txt # +# Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ +# +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the +# distribution. +# +# Neither the name of Texas Instruments Incorporated nor the names of +# its contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +DSP_TOOLS ?="/datalocal1/ti_components/cg_tools/windows/ti-cgt-c6000_8.2.4" +ARP32_TOOLS ?="/datalocal1/ti_components/cg_tools/windows/arp32_1.0.7" +TIARM_TOOLS ?="/datalocal1/ti_components/cg_tools/windows/ti-cgt-arm_16.9.2.LTS" +XDAIS_PATH ?="/datalocal1/ti_components/codecs/xdais_7_24_00_04" +UTILS_PATH ?="C:\ti\ccsv5\utils\cygwin" +VXLIB_PATH ?="/datalocal1/ti_components/algorithms/vxlib_c66x_1_1_3_0" +DMAUTILS_PATH ?=/datalocal1/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils +ALGFRAMEWORK_PATH ?="a0393754@bangvideoapps01:/datalocal1/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.02/algframework" +MATHLIB_INSTALL_DIR ?="/datalocal1/ti_components/algorithms/mathlib_c66x_3_1_0_0" +SHOW_COMMANDS ?= 0 +LINUXENV ?= x86 +LINUX_BUILD_TOOLS ?="/home/uid/tools/linaro-2017.11" +# Set TIOVX_HOST_EMU to 1 to generate Linux libraries that are built with gcc for *.c files and that can be linked with other OpenVX libraries +TIOVX_HOST_EMU ?= 0 + +# Default platform +# Supported values: vayu,vme +TARGET_SOC ?= vayu + +# Default CORE is dsp +# Supported values: dsp, eve, arm +CORE ?= dsp + +# Default TI_DEVICE +# Supported values: PC, TI_DEVICE (SIMULATORS or EMULATOR ) +TARGET_PLATFORM ?= TI_DEVICE + +# Default C66 +# Supported C64T, C64P, C64, C66, C674, C67, C67P, m4 +TARGET_CPU ?= C66 + +ifeq ($(CORE),eve) +TARGET_CPU:= +endif + +Hi iFer, This environment variables setting looks okay, can you clean and build once? >> gmake CORE=eve clean >> gmake CORE=eve all Thanks, Praveen + +Hello Praveen, I ran the command gmake CORE=eve clean and this is what gets printed to the screen: OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/Users/user01/AppData/Local/Temp/make13636-1.sh: line 1: syntax error near unexpected token `(' C:/Users/user01/AppData/Local/Temp/make13636-1.sh: line 1: `FOR %%i IN (C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj ) DO echo del %%i >> temp_pps.bat' gmake: [clean] Error 2 (ignored) C:/Users/user01/AppData/Local/Temp/make13636-1.sh: line 1: syntax error near unexpected token `(' C:/Users/user01/AppData/Local/Temp/make13636-1.sh: line 1: `FOR %%i IN ( C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.dep) DO echo del %%i >> temp_pps.bat' gmake: [clean] Error 2 (ignored) process_begin: CreateProcess(C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test\temp_pps.bat, temp_pps.bat, ...) failed. make (e=5): Access is denied. gmake: [clean] Error 5 (ignored) process_begin: CreateProcess(NULL, del temp_pps.bat, ...) failed. make (e=2): The system cannot find the file specified. gmake: [clean] Error 2 (ignored) C:/Users/user01/AppData/Local/Temp/make13636-1.sh: line 1: C:/cygwin64/binrm: No such file or directory gmake: [clean] Error 127 (ignored) After running clean, the gmake CORE=eve all command just prints the same as before. Please let me know if there are anymore make files or logs that I can send you to help debug. Thank you, -iFer + +Hi iFer, Could you try using cygwin from CCS utils as shown below and check? UTILS_PATH ?="C:\ti\ccsv8\utils\cygwin" Thanks, Praveen + +Hello Praveen, I ran the command gmake CORE=eve clean UTILS_PATH=C:/ti/ccsv8/utils/cygwin/ in order to get rid of the cygwin error: C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test>gmake CORE=eve clean UTILS_PATH=C:/ti/ccsv8/utils/cygwin/ OBJDIRS ./out//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve//.gitignore C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:418: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:436: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:455: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:484: warning: overriding commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/makerules/rules.mk:473: warning: ignoring old commands for target `C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/%.obj' C:/Users/user01/AppData/Local/Temp/make2144-1.sh: line 1: syntax error near unexpected token `(' C:/Users/user01/AppData/Local/Temp/make2144-1.sh: line 1: `FOR %%i IN (C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.obj C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/boot_arp32.obj ) DO echo del %%i >> temp_pps.bat' gmake: [clean] Error 2 (ignored) C:/Users/user01/AppData/Local/Temp/make2144-1.sh: line 1: syntax error near unexpected token `(' C:/Users/user01/AppData/Local/Temp/make2144-1.sh: line 1: `FOR %%i IN ( C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/configparser.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_draw_utils.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/ti_mem_manager.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_profile.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/curve_fitting.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/eve_sctm.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/ti_stats_collector.dep C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/out/vayu/eve/release/modules/ti_dl/test/../../../common/eve/cred.dep) DO echo del %%i >> temp_pps.bat' gmake: [clean] Error 2 (ignored) process_begin: CreateProcess(C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl\test\temp_pps.bat, temp_pps.bat, ...) failed. make (e=5): Access is denied. gmake: [clean] Error 5 (ignored) process_begin: CreateProcess(NULL, del temp_pps.bat, ...) failed. make (e=2): The system cannot find the file specified. gmake: [clean] Error 2 (ignored) There was no change to the output of gmake CORE=eve all. I look forward to the next steps to debug. Thank you very much, -iFer + +Hi iFer, Can you make sure you don't have more than one utility having make or rmdir commands in the path variable. What you can try is to remove everything from PATH variable and set only the variables required for TIDL build and see if the issue goes away. Thanks, Praveen + diff --git a/data2/text/range/30001+/918243.txt b/data2/text/range/30001+/918243.txt new file mode 100644 index 0000000000000000000000000000000000000000..817c7efccef8f45933570e24b004afe1b44b4c37 --- /dev/null +++ b/data2/text/range/30001+/918243.txt @@ -0,0 +1,1328 @@ +Ticket Name: TDA2EXEVM: Usecase Semantic Segmenation Input Data + +Query Text: +Part Number: TDA2EXEVM Hi, I run the usecase Semantic Segmenation by using your data from this ref.It works well. Then, i follow the steps and made my own indata\inHeader. Although it could display ,but it seems doesn't achieve the function of segmentation .The video is very stuck，only 2 fps/s [IPU1_0] New data Recv = 2.0 fps [IPU1_0] Release data Recv = 2.0 fps [IPU1_0] Driver/Notify Cb = 35.33 fps My input data is 1024*512 and my display monoitor is 1280*720. Here is the output: So What shold we do to make this run? Best wish! Z.Y Wang + +Responses: +Hi, Can you share the logs with statistics for working case? Can you share the logs with statistics for not working case? & also mention what changes you have done on top of working case Thanks Gaviraju + +Hi I changed some input size parameters and now usecase works. But video stream is still slowly. I modify FPS parameters ,but If SEMSEG_FPS_OPPNOM > (12) ，the usecase will stuck. Weather if each TIDL EVE'upper limit giving performace of only 3 fps? Here is Statistics log. 8105.Statistics.txt [IPU1_0] +[IPU1_0] CPU [IPU1-0 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 11.3% HWI: 1.2%, SWI:0.8%, Low Power: 84.8% +[IPU1_0] +[IPU1_0] LOAD: TSK: SYSTEM : 0.1% +[IPU1_0] LOAD: TSK: DUP0 : 0.1% +[IPU1_0] LOAD: TSK: IPC_IN_0 : 0.1% +[IPU1_0] LOAD: TSK: IPC_OUT_0 : 0.2% +[IPU1_0] LOAD: TSK: IPC_OUT_1 : 0.2% +[IPU1_0] LOAD: TSK: NULL_SRC0 : 2.1% +[IPU1_0] LOAD: TSK: DISPLAY0 : 0.3% +[IPU1_0] LOAD: TSK: DEC0 : 0.3% +[IPU1_0] LOAD: TSK: GrpxSrc0 : 0.2% +[IPU1_0] LOAD: TSK: STAT_COLL : 3.5% +[IPU1_0] LOAD: TSK: DEC_PROCESS_TSK_0 : 0.6% +[IPU1_0] LOAD: TSK: MISC : 1.6% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 160 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 16 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 93 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 93 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 242176 B (236 KB) +[IPU1_0] SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1_0] SYSTEM: Heap = SR_DDR_CACHED @ 0x89d03000, Total size = 366989312 B (349 MB), Free size = 133390336 B (127 MB) +[IPU1_0] SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [IPU1-1 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 1.3% HWI: 0.8%, SWI:0.4%, Low Power: 84.8% +[IPU1_0] +[IPU1_0] LOAD: TSK: MISC : 0.1% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 435 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 38 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 99 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 639224 B (624 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [HOST ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 28.4% HWI: 0.1%, SWI:0.1%, Low Power: 70.6% +[IPU1_0] +[IPU1_0] LOAD: TSK: MISC : 28.2% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 423 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 38 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 87 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6215232 B (6069 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [DSP1 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 0.5% HWI: 0.2%, SWI:0.1%, Low Power: 98.6% +[IPU1_0] +[IPU1_0] LOAD: TSK: MISC : 0.2% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 91 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 99 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 100 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 510440 B (498 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [DSP2 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 0.5% HWI: 0.2%, SWI:0.1%, Low Power: 98.6% +[IPU1_0] +[IPU1_0] LOAD: TSK: MISC : 0.2% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 91 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 99 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 100 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 510440 B (498 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [EVE1 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 97.5% HWI: 0.3%, SWI:0.2%, Low Power: 2.2% +[IPU1_0] +[IPU1_0] LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 96.7% +[IPU1_0] LOAD: TSK: MISC : 0.3% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 92 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 97 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 231528 B (226 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [EVE2 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 98.2% HWI: 0.4%, SWI:0.2%, Low Power: 1.4% +[IPU1_0] +[IPU1_0] LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 97.5% +[IPU1_0] LOAD: TSK: MISC : 0.1% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 92 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 97 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 231528 B (226 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [EVE3 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 97.1% HWI: 0.3%, SWI:0.2%, Low Power: 2.6% +[IPU1_0] +[IPU1_0] LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 96.4% +[IPU1_0] LOAD: TSK: MISC : 0.2% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 92 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 97 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 231528 B (226 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [EVE4 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 98.0% HWI: 0.4%, SWI:0.2%, Low Power: 1.7% +[IPU1_0] +[IPU1_0] LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 97.2% +[IPU1_0] LOAD: TSK: MISC : 0.2% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 449 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 92 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 97 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 1280 B (1 KB) +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 231528 B (226 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] CPU [IPU2 ] Statistics, +[IPU1_0] ************************* +[IPU1_0] +[IPU1_0] LOAD: CPU: 0.9% HWI: 0.5%, SWI:0.3%, Low Power: 96.2% +[IPU1_0] +[IPU1_0] LOAD: TSK: MISC : 0.1% +[IPU1_0] +[IPU1_0] SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 +[IPU1_0] +[IPU1_0] SYSTEM: Sempahores Objects, 442 of 1050 free +[IPU1_0] SYSTEM: Task Objects , 39 of 100 free +[IPU1_0] SYSTEM: Clock Objects , 99 of 100 free +[IPU1_0] SYSTEM: Hwi Objects , 99 of 100 free +[IPU1_0] +[IPU1_0] SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 246000 B (240 KB) +[IPU1_0] +[IPU1_0] +[IPU1_0] UTILS_PRCM_STATS: Current Temperature, +[IPU1_0] +[IPU1_0] Voltage Rail || Curr Temp Min - Max +[IPU1_0] --------------------------------------------------------- +[IPU1_0] PMHAL_PRCM_VD_MPU || [63.600 , 64. 0] +[IPU1_0] PMHAL_PRCM_VD_CORE || [64. 0 , 64.400] +[IPU1_0] PMHAL_PRCM_VD_IVAHD || [64.400 , 64.800] +[IPU1_0] PMHAL_PRCM_VD_DSPEVE || [63.600 , 64. 0] +[IPU1_0] PMHAL_PRCM_VD_GPU || [63.200 , 63.600] +[IPU1_0] +[IPU1_0]============================================================================ +[IPU1_0]Name | Bus (mV) | Res (mOhm) | Shunt (uV) | Current (mA) | Power (mW) +[IPU1_0]---------------------------------------------------------------------------- +[IPU1_0] UTILS_PRCM_STATS: Reading the regulator data failed +[IPU1_0] UTILS_PRCM_STATS: PM INA226 Power Read Failed !! +[IPU1_0] +[IPU1_0] Statistics Collector, +[IPU1_0] +[IPU1_0] STATISTIC Avg Data Peak Data +[IPU1_0] COLLECTOR MB/s MB/s +[IPU1_0] -------------------------------------------------- +[IPU1_0] SCI_EMIF1 RD+WR | 1366.498411 2229.446160 +[IPU1_0] SCI_EMIF2 RD+WR | 0.000000 0.000000 +[IPU1_0] SCI_EMIF1 RD ONLY | 870.669906 1877.536985 +[IPU1_0] SCI_EMIF1 WR ONLY | 496.213209 965.146019 +[IPU1_0] SCI_EMIF2 RD ONLY | 0.000000 0.000000 +[IPU1_0] SCI_EMIF2 WR ONLY | 0.000000 0.000000 +[IPU1_0] SCI_MA_MPU_P1 | 61.442881 457.727796 +[IPU1_0] SCI_MA_MPU_P2 | 0.000000 0.000000 +[IPU1_0] SCI_DSS | 12.115116 13.252804 +[IPU1_0] SCI_IPU1 | 7.238479 28.136885 +[IPU1_0] SCI_VIP1_P1 | 0.000000 0.000000 +[IPU1_0] SCI_VIP1_P2 | 0.000000 0.000000 +[IPU1_0] SCI_VPE_P1 | 0.000000 0.000000 +[IPU1_0] SCI_VPE_P2 | 0.000000 0.000000 +[IPU1_0] SCI_DSP1_MDMA | 3.147211 4.313757 +[IPU1_0] SCI_DSP1_EDMA | 0.000000 0.000000 +[IPU1_0] SCI_DSP2_MDMA | 3.147026 4.313757 +[IPU1_0] SCI_DSP2_EDMA | 0.000000 0.000000 +[IPU1_0] SCI_EVE1_TC0 | 308.457890 1415.089164 +[IPU1_0] SCI_EVE1_TC1 | 562.341696 1304.539961 +[IPU1_0] SCI_EVE2_TC0 | 306.353163 1409.814911 +[IPU1_0] SCI_EVE2_TC1 | 567.109771 1289.219932 +[IPU1_0] SCI_EDMA_TC0_RD | 0.000000 0.000000 +[IPU1_0] SCI_EDMA_TC0_WR | 0.000000 0.000000 +[IPU1_0] SCI_EDMA_TC1_RD | 9.577394 160.169450 +[IPU1_0] SCI_EDMA_TC1_WR | 9.579561 160.169450 +[IPU1_0] SCI_VIP2_P1 | 0.000000 0.000000 +[IPU1_0] SCI_VIP2_P2 | 0.000000 0.000000 +[IPU1_0] SCI_VIP3_P1 | 0.000000 0.000000 +[IPU1_0] SCI_VIP3_P2 | 0.000000 0.000000 +[IPU1_0] SCI_EVE3_TC0 | 305.851167 1451.708916 +[IPU1_0] SCI_EVE3_TC1 | 564.113065 1354.274290 +[IPU1_0] SCI_EVE4_TC0 | 308.140416 1425.485116 +[IPU1_0] SCI_EVE4_TC1 | 563.294643 1339.921158 +[IPU1_0] SCI_IVA | 70.294801 1208.498821 +[IPU1_0] SCI_GPU_P1 | 0.000000 0.000000 +[IPU1_0] SCI_GPU_P2 | 0.000000 0.000000 +[IPU1_0] SCI_GMAC_SW | 0.000000 0.000000 +[IPU1_0] SCI_OCMC_RAM1 | 560.004104 1356.609356 +[IPU1_0] SCI_OCMC_RAM2 | 559.140510 1341.366049 +[IPU1_0] SCI_OCMC_RAM3 | 1120.987499 2106.683726 +[IPU1_0] +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 57], +[IPU1_0] +[IPU1_0] [ NULL_SRC ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632016 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] Get Full Buf Cb = 12.11 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] Driver/Notify Cb = 12.4 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ NULL_SRC ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 82], +[IPU1_0] +[IPU1_0] [ DECODE ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632087 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.11 fps +[IPU1_0] Release data Recv = 12.4 fps +[IPU1_0] Get Full Buf Cb = 24.9 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ DECODE ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6369 us, Min = 4361 us, Max = 9303 us, +[IPU1_0] Source to Link Latency : Avg = 6512 us, Min = 4453 us, Max = 9425 us, +[IPU1_0] +[IPU1_0] CPU [ IPU1-0], LinkID [ 25], Link Statistics not available ! +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 1], +[IPU1_0] +[IPU1_0] [ IPC_OUT_1 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632206 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] Release data Recv = 12.5 fps +[IPU1_0] Driver/Notify Cb = 45.38 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_1 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 122 us, +[IPU1_0] Source to Link Latency : Avg = 6882 us, Min = 4758 us, Max = 9791 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 11], +[IPU1_0] +[IPU1_0] [ IPC_IN_1 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632821 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] Driver/Notify Cb = 45.37 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_1 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 6952 us, Min = 4819 us, Max = 9852 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 49], +[IPU1_0] +[IPU1_0] [ ALG_TIDLPREPROC ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632936 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDLPREPROC ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 473 us, Min = 335 us, Max = 732 us, +[IPU1_0] Source to Link Latency : Avg = 29174 us, Min = 26810 us, Max = 35868 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 3], +[IPU1_0] +[IPU1_0] [ IPC_OUT_3 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1632804 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_3 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 28655 us, Min = 27054 us, Max = 35899 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE4], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1633417 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 5.95 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 43 us, Min = 30 us, Max = 153 us, +[IPU1_0] Source to Link Latency : Avg = 29073 us, Min = 27329 us, Max = 39254 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE4], LinkID [ 49], +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1633529 msec +[IPU1_0] +[IPU1_0] New data Recv = 5.95 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 324024 us, Min = 316690 us, Max = 329104 us, +[IPU1_0] Source to Link Latency : Avg = 353320 us, Min = 345117 us, Max = 365247 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE4], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1633315 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 29 us, Min = 0 us, Max = 275 us, +[IPU1_0] Source to Link Latency : Avg = 353688 us, Min = 345483 us, Max = 365613 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 15], +[IPU1_0] +[IPU1_0] [ IPC_IN_5 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1633930 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_5 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 353818 us, Min = 345605 us, Max = 365735 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 2], +[IPU1_0] +[IPU1_0] [ IPC_OUT_2 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1634440 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_2 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 29787 us, Min = 26871 us, Max = 31630 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE3], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1635054 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 5.93 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 41 us, Min = 30 us, Max = 153 us, +[IPU1_0] Source to Link Latency : Avg = 30912 us, Min = 27145 us, Max = 91045 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE3], LinkID [ 49], +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1635167 msec +[IPU1_0] +[IPU1_0] New data Recv = 5.93 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 321041 us, Min = 315440 us, Max = 325657 us, +[IPU1_0] Source to Link Latency : Avg = 352171 us, Min = 342890 us, Max = 413194 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE3], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1634957 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 29 us, Min = 0 us, Max = 122 us, +[IPU1_0] Source to Link Latency : Avg = 352536 us, Min = 343226 us, Max = 413530 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 14], +[IPU1_0] +[IPU1_0] [ IPC_IN_4 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1635573 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_4 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 352665 us, Min = 343348 us, Max = 413682 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 1], +[IPU1_0] +[IPU1_0] [ IPC_OUT_1 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1636097 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_1 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 2 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 28652 us, Min = 26810 us, Max = 35838 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE2], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1636715 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 5.93 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 43 us, Min = 30 us, Max = 458 us, +[IPU1_0] Source to Link Latency : Avg = 29096 us, Min = 27146 us, Max = 40444 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE2], LinkID [ 49], +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1636831 msec +[IPU1_0] +[IPU1_0] New data Recv = 5.93 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 325015 us, Min = 314219 us, Max = 329988 us, +[IPU1_0] Source to Link Latency : Avg = 354336 us, Min = 341579 us, Max = 365553 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE2], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1636621 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 29 us, Min = 0 us, Max = 152 us, +[IPU1_0] Source to Link Latency : Avg = 354710 us, Min = 341884 us, Max = 365919 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 13], +[IPU1_0] +[IPU1_0] [ IPC_IN_3 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1637236 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_3 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 354843 us, Min = 342006 us, Max = 366041 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1637715 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 29668 us, Min = 26871 us, Max = 31995 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE1], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1638327 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 5.90 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 41 us, Min = 30 us, Max = 183 us, +[IPU1_0] Source to Link Latency : Avg = 31024 us, Min = 27146 us, Max = 92265 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE1], LinkID [ 49], +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1638441 msec +[IPU1_0] +[IPU1_0] New data Recv = 5.91 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDL ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 322423 us, Min = 309766 us, Max = 327243 us, +[IPU1_0] Source to Link Latency : Avg = 353664 us, Min = 338712 us, Max = 417282 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ EVE1], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1638238 msec +[IPU1_0] +[IPU1_0] New data Recv = 3.1 fps +[IPU1_0] Release data Recv = 3.1 fps +[IPU1_0] Driver/Notify Cb = 6.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 29 us, Min = 0 us, Max = 153 us, +[IPU1_0] Source to Link Latency : Avg = 354030 us, Min = 339230 us, Max = 418014 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 12], +[IPU1_0] +[IPU1_0] [ IPC_IN_2 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1638853 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 3.1 fps +[IPU1_0] Driver/Notify Cb = 36.34 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 3. 1 0. 0 0. 0 3. 1 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 3. 1 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_2 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 5 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 354159 us, Min = 339383 us, Max = 418167 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 50], +[IPU1_0] +[IPU1_0] [ ALG_TIDLPOSTPROC ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1638966 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDLPOSTPROC ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 846 us, Min = 793 us, Max = 976 us, +[IPU1_0] Source to Link Latency : Avg = 362280 us, Min = 340237 us, Max = 419051 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 0], +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1639905 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] Release data Recv = 12.5 fps +[IPU1_0] Driver/Notify Cb = 45.37 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 7 us, Min = 0 us, Max = 214 us, +[IPU1_0] Source to Link Latency : Avg = 6733 us, Min = 4636 us, Max = 9608 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1640520 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 24.9 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] Driver/Notify Cb = 45.37 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 6 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 6847 us, Min = 4728 us, Max = 9730 us, +[IPU1_0] +[IPU1_0] CPU [ HOST], LinkID [ 38], Link Statistics not available ! +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 34], +[IPU1_0] +[IPU1_0] [ SYNC_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1640734 msec +[IPU1_0] +[IPU1_0] New data Recv = 54.38 fps +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] Driver/Notify Cb = 30.30 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] 1 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ SYNC_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 177725 us, Min = 0 us, Max = 412921 us, +[IPU1_0] Source to Link Latency : Avg = 362319 us, Min = 340267 us, Max = 419112 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 51], +[IPU1_0] +[IPU1_0] [ ALG_TIDLPOSTPROC ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1640432 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ ALG_TIDLPOSTPROC ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 981 us, Min = 671 us, Max = 22845 us, +[IPU1_0] Source to Link Latency : Avg = 363342 us, Min = 341182 us, Max = 421095 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [ HOST], LinkID [ 4], +[IPU1_0] +[IPU1_0] [ IPC_OUT_4 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1640540 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] Release data Recv = 12.4 fps +[IPU1_0] Driver/Notify Cb = 45.37 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_OUT_4 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 1 us, Min = 0 us, Max = 31 us, +[IPU1_0] Source to Link Latency : Avg = 363361 us, Min = 341213 us, Max = 421095 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 10], +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1641152 msec +[IPU1_0] +[IPU1_0] Get Full Buf Cb = 12.4 fps +[IPU1_0] Put Empty Buf Cb = 12.4 fps +[IPU1_0] Driver/Notify Cb = 45.37 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] Output Statistics, +[IPU1_0] +[IPU1_0] CH | Out | Out | Out Drop | Out User Drop +[IPU1_0] | ID | FPS | FPS | FPS +[IPU1_0] --------------------------------------------- +[IPU1_0] 0 | 0 12. 4 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ IPC_IN_0 ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 29 us, Min = 0 us, Max = 274 us, +[IPU1_0] Source to Link Latency : Avg = 363559 us, Min = 341426 us, Max = 421491 us, +[IPU1_0] +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 73], +[IPU1_0] +[IPU1_0] [ DISPLAY ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1641267 msec +[IPU1_0] +[IPU1_0] New data Recv = 12.4 fps +[IPU1_0] Driver/Notify Cb = 15.38 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 12. 4 0. 0 0. 0 12. 4 +[IPU1_0] +[IPU1_0] [ DISPLAY ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 53 us, Min = 30 us, Max = 305 us, +[IPU1_0] Source to Link Latency : Avg = 363820 us, Min = 341670 us, Max = 421827 us, +[IPU1_0] +[IPU1_0] Display UnderFlow Count = 0 +[IPU1_0] +[IPU1_0] CPU [ IPU1-0], LinkID [ 23], Link Statistics not available ! +[IPU1_0] +[IPU1_0] ### CPU [IPU1-0], LinkID [ 74], +[IPU1_0] +[IPU1_0] [ DISPLAY ] Link Statistics, +[IPU1_0] ****************************** +[IPU1_0] +[IPU1_0] Elapsed time = 1641837 msec +[IPU1_0] +[IPU1_0] Driver/Notify Cb = 15.38 fps +[IPU1_0] +[IPU1_0] Input Statistics, +[IPU1_0] +[IPU1_0] CH | In Recv | In Drop | In User Drop | In Process +[IPU1_0] | FPS | FPS | FPS | FPS +[IPU1_0] -------------------------------------------------- +[IPU1_0] 0 | 0. 0 0. 0 0. 0 0. 0 +[IPU1_0] +[IPU1_0] [ DISPLAY ] LATENCY, +[IPU1_0] ******************** +[IPU1_0] Local Link Latency : Avg = 30 us, Min = 30 us, Max = 30 us, +[IPU1_0] Source to Link Latency : Avg = 323675 us, Min = 323675 us, Max = 323675 us, +[IPU1_0] +[IPU1_0] Display UnderFlow Count = 0 +[IPU1_0] +[IPU1_0] + + ==================== + Chains Run-time Menu + ==================== + + 0: Stop Chain + + 1: Pause Chain + 2: Resume Chain + + 3: Show ALL palettes + 4: Show only ROAD palette + 5: Show only PEDESTRIAN palette + 6: Show only ROAD SIGN palette + 7: Show only VEHICLE palette + + p: Print Statistics + + g: show cpu load info + + Enter Choice: + + Thanks Wang + +Hi, >>Weather if each TIDL EVE'upper limit giving performace of only 3 fps? Yes because it taking 320 ms to process one frame. So FPS = 1000 ms / 320 ms FPS = 3 Total FPS = FPS * Total number of EVE core running parallel Total FPS = 3 * 4 Total FPS = 12 Conclusion: This use-case can support up to 12 FPS only. Thanks Gaviraju + +Thanks for your reply. Best wishes! Wang + diff --git a/data2/text/range/30001+/918497.txt b/data2/text/range/30001+/918497.txt new file mode 100644 index 0000000000000000000000000000000000000000..5136f4e19ec011a4d97ce71db1382ddd023ebb71 --- /dev/null +++ b/data2/text/range/30001+/918497.txt @@ -0,0 +1,523 @@ +Ticket Name: TDA2EVM5777: TI DeepLearning Assertion error + +Query Text: +Part Number: TDA2EVM5777 Hello, I am trying to get the Vision SDK TI Deep Learning (TIDL) example running on the TDA2EVM5777 board. I was able to generate an AppImage and MLO with no issues. I copied the MLO and AppImage to the SD card as well as all of the files in the PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\tools\TIDL_files directory. I booted the board up and was able to follow the instructions from the VisionSDK_UserGuide_TI_DeepLearning.pdf user guide. The steps I took after I was prompted for Vision SDK usecase, was I selected "f" for TIDL usecase. Then I selected "1" for TIDL File I/O usecase. From there, I am prompted with which core I wanted to use. I selected "2" for EVE. For the Use case Mode, I wanted to dump the output to a file. Once I selected that case I got a few error messages: [IPU1-0] 40.147379 s: Assertion @ Line: 103 in /home/user01/PROCESSOR_SDK_ VISION_03_08_00_00/vision_sdk/ apps/src/rtos/usecases/common/ chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! [IPU1-0] 40.148295 s: Assertion @ Line: 103 in /home/user01/PROCESSOR_SDK_ VISION_03_08_00_00/vision_sdk/ apps/src/rtos/usecases/common/ chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! What steps can I take to fix this issue? What can cause this assertion to fail? I double checked that my files didn't get corrupted when they reached the SD card, so I don't really know how to debug from here. Thank you very much for your help, -iFer + +Responses: +Hi, Can you share the complete logs in a text file? also print the value of "readSize" & "sizeof(sTIDL_Network_t)". Thanks Gaviraju + +Hello Gaviraj, I can't find a way to print those values. Can you assist me with the method/syntax to print those values please? Also I have attached the full log including boot prints. Thank you, -iFer AssertionErrorLog.txt + TDA2xx SBL Boot + + DPLL Configuration Completed + + Clock Domain Configuration Completed + + Module Enable Configuration Completed + + TI EVM PAD Config Completed + + DDR Config Completed + + App Image Download Begins + + SD Boot - file open completed successfully + + MPU CPU0 Image Load Completed + + IPU1 CPU0 Image Load Completed + + IPU1 CPU1 Image Load Completed + + IPU2 CPU0 and CPU1 Image Load Completed + + DSP1 Image Load Completed + + DSP2 Image Load Completed + + EVE1 Image Load Completed + + EVE2 Image Load Completed + + EVE3 Image Load Completed + + EVE4 Image Load Completed + + App Image Download Completed + + Putting MPU CPU1 in Off mode + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + + EVE MMU configuration completed + +***************************************************************** + + PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles + + SBL Initial Config Cycles - 143982 (12.28 ms) + SOC Init Cycles - 170928 (14.58 ms) + DDR Config Clock Cycles - 43376 (3.70 ms) + App Image Load Cycles - 44811173 (3823.88 ms) + Slave Core Bootup Cycles - 208154 (17.76 ms) + SBL Boot-up Cycles - 45378675 (3872.31 ms) + Time at which SBL started IPU1_0 - 135962 (4149.23 ms) +***************************************************************** + + Jumping to MPU CPU0 App +[IPU1-0] 4.152687 s: ***** IPU1_0 Firmware build time 13:08:49 Jun 29 2020 +[IPU1-0] 4.152900 s: *** SYSTEM: CPU Frequency , +[IPU1-0] 4.953364 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU1-0] 4.953547 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-0] 4.953669 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-0] 4.953791 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-0] 4.953882 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-0] 4.954004 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-0] 4.954096 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-0] 4.954218 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-0] 4.954340 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-0] 4.956139 s: *** UTILS: CPU MHz = 20 Mhz *** +[IPU1-0] 4.956292 s: SYSTEM: System Common Init in progress !!! +[IPU1-0] 4.970597 s: UTILS: CIO: Init Done !!! +[IPU1-0] 4.970719 s: SYSTEM: IPC init in progress !!! +[IPU1-0] 4.970780 s: SYSTEM: Notify init done !!! +[IPU1-0] 4.972640 s: SYSTEM: MsgQ init done !!! +[IPU1-0] 4.972732 s: SYSTEM: IPC init DONE !!! +[IPU1-0] 4.976605 s: SYSTEM: System Common Init Done !!! +[IPU1-0] 4.976727 s: SYSTEM: System Init in progress !!! +[IPU1-0] 4.976788 s: SYSTEM: BSP Common Init in progress !!! +[IPU1-0] 4.976880 s: SYSTEM: BSP Common Init Done !!! +[IPU1-0] 4.976941 s: SYSTEM: BSP Platform Init in progress !!! +[IPU1-0] 4.977093 s: SYSTEM: BSP Platform Init Done !!! +[IPU1-0] 4.977154 s: SYSTEM: FVID2 Init in progress !!! +[IPU1-0] 4.977307 s: SYSTEM: FVID2 Init Done !!! +[IPU1-0] 4.977490 s: SYSTEM: VPS Init in progress !!! +[IPU1-0] 4.977612 s: SYSTEM: VPDMA Descriptor Memory Address translation ENABLED [0xa0000000 -> 0x80000000] +[IPU1-0] 4.981577 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 4.981730 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 4.981821 s: VPDMA Load Address = 0x4897d004 +[IPU1-0] 4.981943 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 4.982065 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 4.982187 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 4.982828 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 4.982919 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 4.983011 s: VPDMA Load Address = 0x4899d004 +[IPU1-0] 4.983133 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 4.983194 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 4.983285 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 4.983743 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 4.983895 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 4.984017 s: VPDMA Load Address = 0x489bd004 +[IPU1-0] 4.984109 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 4.984200 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 4.984292 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 4.984871 s: *** VPDMA Firmware Loading... *** +[IPU1-0] 4.984993 s: VPDMA Firmware Address = 0x9fc9c4c0 +[IPU1-0] 4.985054 s: VPDMA Load Address = 0x489dd004 +[IPU1-0] 4.985176 s: VPDMA Firmware Version = 0x4d0001b8 +[IPU1-0] 4.985268 s: VPDMA List Busy Status = 0x00000000 +[IPU1-0] 4.985329 s: *** VPDMA Firmware Load Success *** +[IPU1-0] 5.049838 s: SYSTEM: VPS Init Done !!! +[IPU1-0] 5.050814 s: UTILS: DMA: HWI Create for INT34 !!! +[IPU1-0] 5.050997 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-0] 5.051149 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252328 B (246 KB) +[IPU1-0] 5.051302 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) +[IPU1-0] 5.051515 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x8a783000, Total size = 355979264 B (339 MB), Free size = 355979264 B (339 MB) +[IPU1-0] 5.051759 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) +[IPU1-0] 5.051942 s: SYSTEM: Initializing Links !!! +[IPU1-0] 5.319160 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-0] 5.414414 s: BOARD: Board Init in progress !!! +[IPU1-0] 5.414811 s: BOARD: Board Init Done !!! +[IPU1-0] 5.426035 s: +[IPU1-0] 5.426096 s: Vision SDK Version : [REL_VISION_SDK_03_08_00_00] +[IPU1-0] 5.426157 s: FVID2 Version : [FVID_02_01_00_01] +[IPU1-0] 5.426249 s: BSP Version : [PDK_01_10_04__xx] +[IPU1-0] 5.426310 s: Platform : [EVM] +[IPU1-0] 5.426371 s: SOC : [TDA2XX] +[IPU1-0] 5.426462 s: SOC Revision : [ES1.1] +[IPU1-0] 5.426523 s: Board Detected : [Vision] +[IPU1-0] 5.432654 s: EEPROM Base Board Name: [5777xCPU] +[IPU1-0] 5.432745 s: Base Board Revision : [REV E] +[IPU1-0] 5.434057 s: Daughter Card Revision: [REV D] +[IPU1-0] 5.434118 s: +[IPU1-0] 5.437900 s: SYSTEM: UART: INTERRUPT Mode is Selected +[IPU1-1] 4.168883 s: ***** IPU1_1 Firmware build time 13:07:29 Jun 29 2020 +[IPU1-1] 4.169066 s: *** SYSTEM: CPU Frequency , +[IPU1-1] 4.955865 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU1-1] 4.956078 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[IPU1-1] 4.956231 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU1-1] 4.956383 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU1-1] 4.956505 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU1-1] 4.956627 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU1-1] 4.956719 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU1-1] 4.956841 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU1-1] 4.956963 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU1-1] 4.959067 s: SYSTEM: System Common Init in progress !!! +[IPU1-1] 4.960409 s: UTILS: CIO: Init Done !!! +[IPU1-1] 4.960562 s: SYSTEM: IPC init in progress !!! +[IPU1-1] 4.960653 s: SYSTEM: Notify init done !!! +[IPU1-1] 4.962636 s: SYSTEM: MsgQ init done !!! +[IPU1-1] 4.962758 s: SYSTEM: IPC init DONE !!! +[IPU1-1] 4.966510 s: SYSTEM: System Common Init Done !!! +[IPU1-1] 4.966632 s: SYSTEM: System IPU1_1 Init in progress !!! +[IPU1-1] 4.967577 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU1-1] 4.967791 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU1-1] 4.967913 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645688 B (630 KB) +[IPU1-1] 4.968065 s: SYSTEM: Initializing Links !!! +[IPU1-1] 5.083755 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU1-1] 5.087018 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU1-1] 5.090099 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU1-1] 5.093485 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU1-1] 5.096992 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU1-1] 5.100378 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU1-1] 5.103763 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU1-1] 5.107454 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU1-1] 5.110687 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU1-1] 5.114439 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU1-1] 5.117611 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU1-1] 5.117733 s: SYSTEM: Initializing Links ... DONE !!! +[IPU1-1] 5.117824 s: SYSTEM: System IPU1_1 Init Done !!! +[HOST ] 4.238790 s: ***** A15_0 Firmware build time 13:07:06 Jun 29 2020 +[HOST ] 4.238821 s: *** SYSTEM: CPU Frequency , +[HOST ] 4.954401 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[HOST ] 4.954431 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[HOST ] 4.954431 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[HOST ] 4.954462 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[HOST ] 4.954462 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[HOST ] 4.954492 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[HOST ] 4.954492 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[HOST ] 4.954492 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[HOST ] 4.954523 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[HOST ] 4.957176 s: SYSTEM: System Common Init in progress !!! +[HOST ] 4.957237 s: SYSTEM: IPC init in progress !!! +[HOST ] 4.957237 s: SYSTEM: Notify init done !!! +[HOST ] 4.957268 s: SYSTEM: MsgQ init done !!! +[HOST ] 4.957298 s: SYSTEM: IPC init DONE !!! +[HOST ] 4.957847 s: SYSTEM: System Common Init Done !!! +[HOST ] 4.957878 s: SYSTEM: System A15 Init in progress !!! +[HOST ] 4.957908 s: UTILS: DMA: HWI Create for INT66 !!! +[HOST ] 4.957939 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[HOST ] 4.957939 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6246704 B (6100 KB) +[HOST ] 4.957969 s: SYSTEM: Initializing Links !!! +[HOST ] 4.960531 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[HOST ] 4.960623 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[HOST ] 4.960684 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[HOST ] 4.960775 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[HOST ] 4.960836 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[HOST ] 4.960928 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[HOST ] 4.961019 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[HOST ] 4.961080 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[HOST ] 4.961172 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[HOST ] 4.961233 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[HOST ] 4.961324 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[HOST ] 4.961324 s: SYSTEM: Initializing Links ... DONE !!! +[HOST ] 4.961385 s: SYSTEM: System A15 Init Done !!! +[HOST ] 5.254864 s: NSP GMAC: PHY 2 Found on MAC Port 0 +[HOST ] 5.255352 s: NSP GMAC: PHY 3 Found on MAC Port 1 +[DSP1 ] 4.232873 s: ***** DSP1 Firmware build time 13:07:55 Jun 29 2020 +[DSP1 ] 4.232965 s: *** SYSTEM: CPU Frequency , +[DSP1 ] 4.958305 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP1 ] 4.958366 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP1 ] 4.958396 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP1 ] 4.958457 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[DSP1 ] 4.958488 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP1 ] 4.958518 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP1 ] 4.958549 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP1 ] 4.958610 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP1 ] 4.958640 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP1 ] 4.958823 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP1 ] 4.958884 s: SYSTEM: System Common Init in progress !!! +[DSP1 ] 4.959128 s: UTILS: CIO: Init Done !!! +[DSP1 ] 4.959159 s: SYSTEM: IPC init in progress !!! +[DSP1 ] 4.959189 s: SYSTEM: Notify init done !!! +[DSP1 ] 4.959342 s: SYSTEM: MsgQ init done !!! +[DSP1 ] 4.959403 s: SYSTEM: IPC init DONE !!! +[DSP1 ] 4.960135 s: SYSTEM: System Common Init Done !!! +[DSP1 ] 4.960165 s: SYSTEM: System DSP Init in progress !!! +[DSP1 ] 4.960409 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP1 ] 4.960470 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP1 ] 4.960531 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP1 ] 4.960562 s: SYSTEM: Initializing Links !!! +[DSP1 ] 4.969285 s: SYSTEM: Initializing Links ... DONE !!! +[DSP1 ] 4.969346 s: lz4CompDecomp Init +[DSP1 ] 4.969377 s: SYSTEM: System DSP Init Done !!! +[DSP1 ] 5.333312 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP1 ] 5.333374 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[DSP2 ] 4.232812 s: ***** DSP2 Firmware build time 13:07:55 Jun 29 2020 +[DSP2 ] 4.232873 s: *** SYSTEM: CPU Frequency , +[DSP2 ] 4.959769 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[DSP2 ] 4.959830 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[DSP2 ] 4.959891 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[DSP2 ] 4.959921 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[DSP2 ] 4.959952 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[DSP2 ] 4.959982 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[DSP2 ] 4.960043 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[DSP2 ] 4.960074 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[DSP2 ] 4.960104 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[DSP2 ] 4.960318 s: *** UTILS: CPU MHz = 20 Mhz *** +[DSP2 ] 4.960379 s: SYSTEM: System Common Init in progress !!! +[DSP2 ] 4.960592 s: UTILS: CIO: Init Done !!! +[DSP2 ] 4.960623 s: SYSTEM: IPC init in progress !!! +[DSP2 ] 4.960653 s: SYSTEM: Notify init done !!! +[DSP2 ] 4.960836 s: SYSTEM: MsgQ init done !!! +[DSP2 ] 4.960867 s: SYSTEM: IPC init DONE !!! +[DSP2 ] 4.961568 s: SYSTEM: System Common Init Done !!! +[DSP2 ] 4.961629 s: SYSTEM: System DSP Init in progress !!! +[DSP2 ] 4.961843 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[DSP2 ] 4.961873 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) +[DSP2 ] 4.961934 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514784 B (502 KB) +[DSP2 ] 4.961965 s: SYSTEM: Initializing Links !!! +[DSP2 ] 4.970444 s: SYSTEM: Initializing Links ... DONE !!! +[DSP2 ] 4.970505 s: lz4CompDecomp Init +[DSP2 ] 4.970536 s: SYSTEM: System DSP Init Done !!! +[DSP2 ] 5.335326 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after boot !!! +[DSP2 ] 5.335356 s: SYSTEM: CACHE: L1P = 32 KB, L1D = 32 KB, L2 = 32 KB ... after update by APP !!! +[EVE1 ] 4.942566 s: ***** EVE Firmware build time 13:07:18 Jun 29 2020 +[EVE1 ] 4.944366 s: *** SYSTEM: CPU Frequency , +[EVE1 ] 4.964314 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE1 ] 4.965930 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE1 ] 4.967455 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE1 ] 4.968950 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE1 ] 4.970444 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE1 ] 4.971847 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE1 ] 4.973220 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE1 ] 4.974592 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE1 ] 4.975934 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE1 ] 4.978130 s: SYSTEM: System Common Init in progress !!! +[EVE1 ] 4.980509 s: UTILS: CIO: Init Done !!! +[EVE1 ] 4.981455 s: SYSTEM: IPC init in progress !!! +[EVE1 ] 4.982797 s: SYSTEM: Notify init done !!! +[EVE1 ] 4.984780 s: SYSTEM: MsgQ init done !!! +[EVE1 ] 4.985725 s: SYSTEM: IPC init DONE !!! +[EVE1 ] 5.001494 s: SYSTEM: System Common Init Done !!! +[EVE1 ] 5.002470 s: SYSTEM: System EVE Init in progress !!! +[EVE1 ] 5.004026 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE1 ] 5.005276 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE1 ] 5.006588 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE1 ] 5.009028 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE1 ] 5.011285 s: SYSTEM: Initializing Links !!! +[EVE1 ] 5.107972 s: SYSTEM: Initializing Links ... DONE !!! +[EVE1 ] 5.109009 s: SYSTEM: System EVE Init Done !!! +[EVE2 ] 4.920667 s: ***** EVE Firmware build time 13:07:20 Jun 29 2020 +[EVE2 ] 4.922558 s: *** SYSTEM: CPU Frequency , +[EVE2 ] 4.966571 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE2 ] 4.968126 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE2 ] 4.969682 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE2 ] 4.971085 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE2 ] 4.972488 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE2 ] 4.973830 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE2 ] 4.975202 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE2 ] 4.976575 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE2 ] 4.978130 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE2 ] 4.980357 s: SYSTEM: System Common Init in progress !!! +[EVE2 ] 4.983072 s: UTILS: CIO: Init Done !!! +[EVE2 ] 4.984139 s: SYSTEM: IPC init in progress !!! +[EVE2 ] 4.985237 s: SYSTEM: Notify init done !!! +[EVE2 ] 4.987159 s: SYSTEM: MsgQ init done !!! +[EVE2 ] 4.988074 s: SYSTEM: IPC init DONE !!! +[EVE2 ] 5.003721 s: SYSTEM: System Common Init Done !!! +[EVE2 ] 5.004758 s: SYSTEM: System EVE Init in progress !!! +[EVE2 ] 5.006252 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE2 ] 5.007411 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE2 ] 5.008784 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE2 ] 5.011163 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE2 ] 5.013572 s: SYSTEM: Initializing Links !!! +[EVE2 ] 5.110168 s: SYSTEM: Initializing Links ... DONE !!! +[EVE2 ] 5.111175 s: SYSTEM: System EVE Init Done !!! +[EVE3 ] 4.942566 s: ***** EVE Firmware build time 13:07:19 Jun 29 2020 +[EVE3 ] 4.944366 s: *** SYSTEM: CPU Frequency , +[EVE3 ] 4.968797 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE3 ] 4.970292 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE3 ] 4.971695 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE3 ] 4.973098 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE3 ] 4.974440 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE3 ] 4.975812 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE3 ] 4.977185 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE3 ] 4.978740 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[EVE3 ] 4.980296 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE3 ] 4.982675 s: SYSTEM: System Common Init in progress !!! +[EVE3 ] 4.985207 s: UTILS: CIO: Init Done !!! +[EVE3 ] 4.986152 s: SYSTEM: IPC init in progress !!! +[EVE3 ] 4.987250 s: SYSTEM: Notify init done !!! +[EVE3 ] 4.989385 s: SYSTEM: MsgQ init done !!! +[EVE3 ] 4.990331 s: SYSTEM: IPC init DONE !!! +[EVE3 ] 5.005673 s: SYSTEM: System Common Init Done !!! +[EVE3 ] 5.006679 s: SYSTEM: System EVE Init in progress !!! +[EVE3 ] 5.008204 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE3 ] 5.009394 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE3 ] 5.010675 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE3 ] 5.013176 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE3 ] 5.015799 s: SYSTEM: Initializing Links !!! +[EVE3 ] 5.111846 s: SYSTEM: Initializing Links ... DONE !!! +[EVE3 ] 5.112944 s: SYSTEM: System EVE Init Done !!! +[EVE4 ] 4.930763 s: ***** EVE Firmware build time 13:07:19 Jun 29 2020 +[EVE4 ] 4.932654 s: *** SYSTEM: CPU Frequency , +[EVE4 ] 4.968797 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[EVE4 ] 4.970292 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[EVE4 ] 4.971725 s: SYSTEM: Notify register to [IPU2] line 0, event 15... +[EVE4 ] 4.973098 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[EVE4 ] 4.974440 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[EVE4 ] 4.975812 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[EVE4 ] 4.977185 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[EVE4 ] 4.978679 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[EVE4 ] 4.980326 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[EVE4 ] 4.982736 s: SYSTEM: System Common Init in progress !!! +[EVE4 ] 4.985268 s: UTILS: CIO: Init Done !!! +[EVE4 ] 4.986213 s: SYSTEM: IPC init in progress !!! +[EVE4 ] 4.987372 s: SYSTEM: Notify init done !!! +[EVE4 ] 4.989477 s: SYSTEM: MsgQ init done !!! +[EVE4 ] 4.990392 s: SYSTEM: IPC init DONE !!! +[EVE4 ] 5.005734 s: SYSTEM: System Common Init Done !!! +[EVE4 ] 5.006740 s: SYSTEM: System EVE Init in progress !!! +[EVE4 ] 5.008265 s: UTILS: DMA: HWI Create for INT8 !!! +[EVE4 ] 5.009455 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[EVE4 ] 5.010705 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) +[EVE4 ] 5.013206 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252592 B (246 KB) +[EVE4 ] 5.015768 s: SYSTEM: Initializing Links !!! +[EVE4 ] 5.111999 s: SYSTEM: Initializing Links ... DONE !!! +[EVE4 ] 5.113097 s: SYSTEM: System EVE Init Done !!! +[IPU2 ] 4.150491 s: ***** IPU2 Firmware build time 13:08:49 Jun 29 2020 +[IPU2 ] 4.150674 s: *** SYSTEM: CPU Frequency , +[IPU2 ] 4.957115 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... +[IPU2 ] 4.957298 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... +[IPU2 ] 4.957420 s: SYSTEM: Notify register to [DSP1] line 0, event 15... +[IPU2 ] 4.957542 s: SYSTEM: Notify register to [DSP2] line 0, event 15... +[IPU2 ] 4.957634 s: SYSTEM: Notify register to [EVE1] line 0, event 15... +[IPU2 ] 4.957756 s: SYSTEM: Notify register to [EVE2] line 0, event 15... +[IPU2 ] 4.957847 s: SYSTEM: Notify register to [EVE3] line 0, event 15... +[IPU2 ] 4.957969 s: SYSTEM: Notify register to [EVE4] line 0, event 15... +[IPU2 ] 4.958091 s: SYSTEM: Notify register to [HOST] line 0, event 15... +[IPU2 ] 4.961141 s: SYSTEM: System Common Init in progress !!! +[IPU2 ] 4.962575 s: UTILS: CIO: Init Done !!! +[IPU2 ] 4.962697 s: SYSTEM: IPC init in progress !!! +[IPU2 ] 4.962788 s: SYSTEM: Notify init done !!! +[IPU2 ] 4.964741 s: SYSTEM: MsgQ init done !!! +[IPU2 ] 4.964863 s: SYSTEM: IPC init DONE !!! +[IPU2 ] 4.970109 s: SYSTEM: System Common Init Done !!! +[IPU2 ] 4.970231 s: SYSTEM: System IPU2 Init in progress !!! +[IPU2 ] 4.971085 s: UTILS: DMA: HWI Create for INT25 !!! +[IPU2 ] 4.971329 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 +[IPU2 ] 4.971512 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252424 B (246 KB) +[IPU2 ] 4.971695 s: SYSTEM: Initializing Links !!! +[IPU2 ] 5.081894 s: UTILS: PRF: ##### Cannot allocate Object for SYNC1 #### +[IPU2 ] 5.084883 s: UTILS: PRF: ##### Cannot allocate Object for SYNC2 #### +[IPU2 ] 5.087750 s: UTILS: PRF: ##### Cannot allocate Object for SYNC3 #### +[IPU2 ] 5.090739 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM0 #### +[IPU2 ] 5.093912 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM1 #### +[IPU2 ] 5.096962 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM2 #### +[IPU2 ] 5.100012 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM3 #### +[IPU2 ] 5.103214 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM4 #### +[IPU2 ] 5.106295 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM5 #### +[IPU2 ] 5.109467 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM6 #### +[IPU2 ] 5.112609 s: UTILS: PRF: ##### Cannot allocate Object for ALGORITHM7 #### +[IPU2 ] 5.112761 s: SYSTEM: Initializing Links ... DONE !!! +[IPU2 ] 5.112822 s: SYSTEM: System IPU2 Init Done !!! +[IPU1-0] 6.472152 s: UTILS_PRCM_STATS: INA226 Setup Failed. Check if INA226 is connected on I2C3 Lines +[IPU1-0] 6.476483 s: QSPI Init Started +[IPU1-0] 6.476788 s: MID - 1 +[IPU1-0] 6.476819 s: DID - 18 +[IPU1-0] 6.476880 s: QSPI Init Completed Sucessfully +[IPU1-0] 6.489355 s: +[IPU1-0] 6.489446 s: Current System Settings, +[IPU1-0] 6.489507 s: ======================== +[IPU1-0] 6.489568 s: Display Type : HDMI 1920x1080 @ 60fps +[IPU1-0] 6.489629 s: Capture Source : Sensor OV10635 1280x720 @ 30fps - VIP, YUV422 +[IPU1-0] 6.489721 s: My IP address for interface 1 : 0.0.0.0 +[IPU1-0] 6.489782 s: My IP address for interface 2 : 0.0.0.0 +[IPU1-0] 6.489843 s: ISS Settings : LDC=[OFF] VTNF=[OFF] WDR=[OFF] +[IPU1-0] 6.489904 s: +[IPU1-0] 6.489965 s: ============ +[IPU1-0] 6.489995 s: Usecase Menu +[IPU1-0] 6.490026 s: ============ +[IPU1-0] 6.490087 s: +[IPU1-0] +[IPU1-0] Vision SDK Usecases, +[IPU1-0] -------------------- +[IPU1-0] 1: Single Camera Usecases +[IPU1-0] 2: Multi-Camera LVDS Usecases +[IPU1-0] 3: AVB RX Usecases, (TDA2x & TDA2Ex ONLY) +[IPU1-0] 4: Dual Display Usecases, (TDA2x EVM ONLY) +[IPU1-0] 5: ISS Usecases, (TDA3x ONLY) +[IPU1-0] 6: TDA2x Stereo Usecases +[IPU1-0] 7: Network RX/TX Usecases +[IPU1-0] 9: RADAR Usecases +[IPU1-0] a: Miscellaneous test's +[IPU1-0] f: TIDL Usecase +[IPU1-0] g: Camera Radar Combo Usecases +[IPU1-0] +[IPU1-0] s: System Settings +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[HOST ] 9.960714 s: NETWORK_CTRL: Starting Server (port=5000) !!! +[HOST ] 9.960745 s: NETWORK_CTRL: Starting Server ... DONE (port=5000) !!! +[IPU1-0] 13.312511 s: +[IPU1-0] 13.312663 s: +[IPU1-0] +[IPU1-0] TIDL Usecases +[IPU1-0] --------------- +[IPU1-0] 1: TIDL File I/O Usecase +[IPU1-0] 2: Semantic Segmentation Usecase +[IPU1-0] 3: TIDL OD Usecase +[IPU1-0] +[IPU1-0] x: Exit +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 16.023089 s: +[IPU1-0] 16.076435 s: TIDL Configuration parameters +[IPU1-0] 16.076496 s: ----------------------------- +[IPU1-0] 16.076557 s: inputWidth = 1024 +[IPU1-0] 16.076618 s: inputHeight = 512 +[IPU1-0] 16.076709 s: inputFile = IN.RGB +[IPU1-0] 16.076770 s: outputFile = OUT.BIN +[IPU1-0] 16.076831 s: netFileName = NET.BIN +[IPU1-0] 16.076892 s: paramFileName = PRM.BIN +[IPU1-0] 16.076953 s: ----------------------------- +[IPU1-0] 16.077014 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Core Menu +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 1: DSP +[IPU1-0] 2: EVE +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 17.447172 s: +[IPU1-0] +[IPU1-0] ==================== +[IPU1-0] Use case Mode +[IPU1-0] ==================== +[IPU1-0] +[IPU1-0] 1: Dump Output Frames to file +[IPU1-0] 2: Free Run (Output Frames are not dumped) +[IPU1-0] +[IPU1-0] Enter Choice: +[IPU1-0] +[IPU1-0] 19.209723 s: UTILS: DMA: Allocated CH (TCC) = 48 (48) +[IPU1-0] 19.209906 s: UTILS: DMA: 0 of 1: Allocated PaRAM = 48 (0x63304800) +[IPU1-0] 19.397364 s: Assertion @ Line: 103 in /home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! +[IPU1-0] 19.398279 s: Assertion @ Line: 103 in /home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! + +Hello again Gaviraju, I was able to print to the console and generate you the values you were asking about. readSize = 483364 sizeof(sTIDL_Network_t) = 484384 Look forward to your help on the next debugging step to see why it is erroring it out. Thank you, -iFer + +Hi, readSize should equal to sizeof(sTIDL_Network_t). From the above print, readSize is correct & other one is not correct. So have you modified the sTIDL_Network_t structure? Thanks Gaviraju + +Hello Gaviraju, I had not modified the code's functionality. The only time I modified the code was to add the print statements that you had requested. Are you able to replicate this or is there something else I may be missing? Thank you, -iFer + +Hi, Currently I don't have set-up to try out my side, so I will get back next week. Thanks Gaviraju + +Hi, I tried on my set-up & I'm also got the same error because the files in the below directory are not updated. PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\tools\TIDL_files So please use the below-updated files. TIDL_FILES.zip + +User_TIDLCFG.TXT Example_TIDL_Files_LOG.txtHello Gaviraju! Great news. Using the new example files you sent, I was able to run it without problems. I want to be able to input my own data to run through TIDL, what format does my data need to be? I modified the TIDLCFG.TXT file with the correct resolution for my dataset but had issues. I think the format is BGR, but am not sure if that is correct because the output looks off. Does the input need to be a specific resolution? Do I have to train my own net and param files? seg_out1.bin.txt I have attached a log of the run with Example files. I also attached the output file as well as the TIDLCFG file that I modified to run my dataset. I was running 3 images BGR 406*680*3, and seg_out1.bin generated from my dataset was, as I said before, off. I can send seg_out1.bin and input dataset if requested by private message. Thank you, -iFer + +Hi iFer, Yes, the input format is BGR, but you need to import the model using your input to get net and param bin files and use them in the usecase to get the correct output. Thanks, Praveen + diff --git a/data2/text/range/30001+/929364.txt b/data2/text/range/30001+/929364.txt new file mode 100644 index 0000000000000000000000000000000000000000..615cc93bfc4b27bcc55e8e7c68b4b69ec9f83621 --- /dev/null +++ b/data2/text/range/30001+/929364.txt @@ -0,0 +1,1140 @@ +Ticket Name: TDA2SG: The frequency of MPU core exceed the maximum + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: TDA2 Hi， There is a problem that the MPU core is set to exceed the maximum frequency. We want to know why the PMIC model and power supply architecture cause the core to set the MPU frequency unsuccessfully The software uboot defaults to 1G and runs on the old version of the hardware. After the kernel is up, it will be set to 750MHz. But this version of the software is on the new version of the hardware, the kernel setting is unsuccessful, and the MPU kernel will be set to 1000MHz after it is up; The difference between the two versions of the hardware is that the PMIC model and the SOC power supply architecture are different. The old version of the hardware uses 0X87, and the new version of the hardware uses 0X85， and the detailed PN of the PMIC is O9039A385IZWSRQ1 and the detailed PN of the Soc is TDA2SGBRQABCQ1, The maximum frequency of MPU is 750MHz + +Responses: +Hello, I don't understand the question. The PMIC doesn't cause the SoC to run at any particular frequency. It is software responsibility to first set the AVS voltage correctly on the PMIC corresponding to the appropriate OPP (in this case OPP_NOM), and then to set the appropriate frequency for the MPU. Regards, Kyle + +Hi,Kyle We want to know what hardware factors may cause the TDA2 kernel to configure the MPU frequency error？ When the MPU main frequency configuration is incorrect（1000MHz）， print LOG as shown below: When the MPU main frequency configuration is correct（750MHz）, The LOG as shown below: Thanks + +Hi, Please explain a bit more clearly. Are there 2 boards? 1) Failing 2) Passing Please attach the complete log files of passing and failing cases. Also which SDK version are you using to boot linux. Best Regards, Keerthy + +Hi,Keerthy YES ,there are two boards, The main difference in two boards is the power architecture, as shown in the figure below: SDK version ：3.07 Kernel version： 4.4.84 1) Failing Failing LOG.txt +U-Boot SPL 2016.05-g (May 27 2020 - 16:59:09) +DRA752-GP ES2.0 +Trying to boot from SPI +INIT: version 2.88 booting +udev: using cache file /etc/dev.tar.0 +INIT: Entering runlevel: 5 +Loaded PowerVR consumer services. +invo_logger_service ... +start invo_app_spi ... +main system: start invo_app_main ... +systemflag:-1 upgradeflag:-1 cramfsflag:-1 +load qt firmware ... +load qt firmware done +load vision sdk ... +load vision sdk done +mknod: /dev/memcache: File exists +libpng warning: iCCP: known incorrect sRGB profile +InvoQtMessage::run() start. +InvoMessageIf::create(44444) success. +libpng warning: iCCP: known incorrect sRGB profile +libpng warning: iCCP: known incorrect sRGB profile +loaded module : gbm_pvr.so +found valid GBM backend : gbm_pvr.so + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org (none) /dev/ttyS2 + +Arago 2016.12 (none) /dev/ttyS2 + +(none) login: root +login[307]: root login on 'ttyS2' +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# dmesg +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.4.84+ (jenkins@0cd374160375) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Fri Dec 20 12:55:06 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a6000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 261376 +[ 0.000000] free_area_init_node: node 0, pgdat c0650440, node_mem_map ef7b2000 +[ 0.000000] DMA zone: 1536 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 196608 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 12 pages/cpu @ef742000 s17536 r8192 d23424 u49152 +[ 0.000000] pcpu-alloc: s17536 r8192 d23424 u49152 alloc=12*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 259840 +[ 0.000000] Kernel command line: elevator=noop console=ttyS2,115200n8 vram=24M ip=none mem=1024M cma=64M fixrtc lpj=61475 video=vfb:1920x720,1920x2160,18 root=/dev/mtdblock8 rootfstype=cramfs rw rootwait loglevel=0 DTB_version=01.00.000 BLD_version=00.00.000 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 340800K/1045504K available (4694K kernel code, 254K rwdata, 1208K rodata, 280K init, 271K bss, 508096K reserved, 196608K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) + lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc05cbef4 (5904 kB) + .init : 0xc05cc000 - 0xc0612000 ( 280 kB) + .data : 0xc0612000 - 0xc0651b20 ( 255 kB) + .bss : 0xc0653000 - 0xc0696e20 ( 272 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000017] Switching to timer-based delay loop, resolution 162ns +[ 0.000415] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000423] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000902] Calibrating delay loop (skipped) preset value.. 12.29 BogoMIPS (lpj=61475) +[ 0.000916] pid_max: default: 4096 minimum: 301 +[ 0.001014] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001026] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001596] Initializing cgroup subsys freezer +[ 0.001623] CPU: Testing write buffer coherency: ok +[ 0.001827] CPU0: update cpu_capacity 1024 +[ 0.001837] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001854] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080132] CPU1: update cpu_capacity 1024 +[ 0.080138] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080198] Brought up 2 CPUs +[ 0.080212] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080219] CPU: All CPU(s) started in HYP mode. +[ 0.080226] CPU: Virtualization extensions available. +[ 0.080563] devtmpfs: initialized +[ 0.110756] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.111695] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.317877] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.317893] futex hash table entries: 16 (order: -2, 1024 bytes) +[ 0.322027] pinctrl core: initialized pinctrl subsystem +[ 0.322810] NET: Registered protocol family 16 +[ 0.323792] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350195] cpuidle: using governor ladder +[ 0.380226] cpuidle: using governor menu +[ 0.388544] OMAP GPIO hardware version 0.1 +[ 0.395194] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.410279] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.410292] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.418033] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.418044] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.418459] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.418469] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.419038] OMAP DMA hardware revision 0.0 +[ 0.461500] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462652] edma 43300000.edma: memcpy is disabled +[ 0.467684] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471666] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.471844] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.472010] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472171] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472455] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472640] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.474107] SCSI subsystem initialized +[ 0.474330] usbcore: registered new interface driver usbfs +[ 0.474390] usbcore: registered new interface driver hub +[ 0.474475] usbcore: registered new device driver usb +[ 0.475756] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491114] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 +[ 0.562992] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.563392] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.563760] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 100 kHz +[ 0.563945] media: Linux media interface: v0.10 +[ 0.563994] Linux video capture interface: v2.00 +[ 0.564031] pps_core: LinuxPPS API ver. 1 registered +[ 0.564039] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.564059] PTP clock support registered +[ 0.564066] EDAC MC: Ver: 3.0.0 +[ 0.564792] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.565092] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566011] clocksource: Switched to clocksource arch_sys_counter +[ 0.568408] NET: Registered protocol family 2 +[ 0.568906] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568969] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.569093] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.569142] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.569173] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.569303] NET: Registered protocol family 1 +[ 0.569330] PCI: CLS 0 bytes, default 64 +[ 0.570251] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579636] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.579828] exFAT: file-system version 2.2.0-3arter97 +[ 0.580032] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.580255] jffs2: version 2.2. (NAND) \xffffffc2\xffffffa9 2001-2006 Red Hat, Inc. +[ 0.582356] bounce: pool size: 64 pages +[ 0.582497] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.582507] io scheduler noop registered (default) +[ 0.582515] io scheduler deadline registered +[ 0.582543] io scheduler cfq registered +[ 0.587602] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.598497] + vfb_probe: res=[1920x720] virtual=[1920x2160] bpp=[32] line_length=[7680] color=[18-ARGB8888] @ [0xf1a26000:0x00fd2000],base:0xf1a26000! + +[ 0.601635] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.604473] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250 +[ 0.605064] console [ttyS2] disabled +[ 0.605107] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 300, base_baud = 3000000) is a 8250 +[ 0.605451] console [ttyS2] enabled +[ 0.606055] [drm] Initialized drm 1.1.0 20060810 +[ 0.611202] loop: module loaded +[ 0.611265] vmemexp device MAJOR num = 246 +[ 0.611288] vmemexp class registered +[ 0.611412] /dev/vmemexp device registered +[ 0.611420] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 0.614309] m25p80 spi32766.0: s25fl512s (65536 Kbytes) +[ 0.614601] 9 ofpart partitions found on MTD device spi32766.0 +[ 0.614610] Creating 9 MTD partitions on "spi32766.0": +[ 0.614620] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 0.615469] 0x000000040000-0x000000440000 : "QSPI.boot.img" +[ 0.616332] 0x000000440000-0x000000840000 : "QSPI.recovery.img" +[ 0.617134] 0x000000840000-0x000000880000 : "QSIPI.misc" +[ 0.617936] 0x000000880000-0x000001880000 : "QSPI.minifs" +[ 0.618743] 0x000001880000-0x000001980000 : "QSPI.jffs2" +[ 0.619560] 0x000001980000-0x000001a80000 : "QSPI.data" +[ 0.620400] 0x000001a80000-0x000004000000 : "QSPI.app" +[ 0.621218] 0x000001a80000-0x000004000000 : "QSPI.cramfs" +[ 0.666043] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 0.666056] davinci_mdio 48485000.mdio: detected phy mask 0 +[ 0.732307] libphy: 48485000.mdio: probed +[ 0.732322] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver unknown +[ 0.732333] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver unknown +[ 0.732343] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver unknown +[ 0.732352] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver unknown +[ 0.732362] davinci_mdio 48485000.mdio: phy[4]: device 48485000.mdio:04, driver unknown +[ 0.732371] davinci_mdio 48485000.mdio: phy[5]: device 48485000.mdio:05, driver unknown +[ 0.732380] davinci_mdio 48485000.mdio: phy[6]: device 48485000.mdio:06, driver unknown +[ 0.732389] davinci_mdio 48485000.mdio: phy[7]: device 48485000.mdio:07, driver unknown +[ 0.732398] davinci_mdio 48485000.mdio: phy[8]: device 48485000.mdio:08, driver unknown +[ 0.732407] davinci_mdio 48485000.mdio: phy[9]: device 48485000.mdio:09, driver unknown +[ 0.732416] davinci_mdio 48485000.mdio: phy[10]: device 48485000.mdio:0a, driver unknown +[ 0.732425] davinci_mdio 48485000.mdio: phy[11]: device 48485000.mdio:0b, driver unknown +[ 0.732434] davinci_mdio 48485000.mdio: phy[12]: device 48485000.mdio:0c, driver unknown +[ 0.732443] davinci_mdio 48485000.mdio: phy[13]: device 48485000.mdio:0d, driver unknown +[ 0.732453] davinci_mdio 48485000.mdio: phy[14]: device 48485000.mdio:0e, driver unknown +[ 0.732462] davinci_mdio 48485000.mdio: phy[15]: device 48485000.mdio:0f, driver unknown +[ 0.732471] davinci_mdio 48485000.mdio: phy[16]: device 48485000.mdio:10, driver unknown +[ 0.732480] davinci_mdio 48485000.mdio: phy[17]: device 48485000.mdio:11, driver unknown +[ 0.732489] davinci_mdio 48485000.mdio: phy[18]: device 48485000.mdio:12, driver unknown +[ 0.732498] davinci_mdio 48485000.mdio: phy[19]: device 48485000.mdio:13, driver unknown +[ 0.732507] davinci_mdio 48485000.mdio: phy[20]: device 48485000.mdio:14, driver unknown +[ 0.732516] davinci_mdio 48485000.mdio: phy[21]: device 48485000.mdio:15, driver unknown +[ 0.732525] davinci_mdio 48485000.mdio: phy[22]: device 48485000.mdio:16, driver unknown +[ 0.732534] davinci_mdio 48485000.mdio: phy[23]: device 48485000.mdio:17, driver unknown +[ 0.732543] davinci_mdio 48485000.mdio: phy[24]: device 48485000.mdio:18, driver unknown +[ 0.732553] davinci_mdio 48485000.mdio: phy[25]: device 48485000.mdio:19, driver unknown +[ 0.732562] davinci_mdio 48485000.mdio: phy[26]: device 48485000.mdio:1a, driver unknown +[ 0.732571] davinci_mdio 48485000.mdio: phy[27]: device 48485000.mdio:1b, driver unknown +[ 0.732580] davinci_mdio 48485000.mdio: phy[28]: device 48485000.mdio:1c, driver unknown +[ 0.732589] davinci_mdio 48485000.mdio: phy[29]: device 48485000.mdio:1d, driver unknown +[ 0.732598] davinci_mdio 48485000.mdio: phy[30]: device 48485000.mdio:1e, driver unknown +[ 0.732606] davinci_mdio 48485000.mdio: phy[31]: device 48485000.mdio:1f, driver unknown +[ 0.733239] cpsw 48484000.ethernet: Detected MACID = 24:7d:4d:2f:e6:28 +[ 0.733985] cpsw 48484000.ethernet: cpsw: Detected MACID = 24:7d:4d:2f:e6:29 +[ 0.736215] usbcore: registered new interface driver usb-storage +[ 0.736287] i2c /dev entries driver +[ 0.738661] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 0.786948] extcon-usb-gpio extcon_usb1: failed to get gpios +[ 0.787018] extcon-usb-gpio extcon_usb2: failed to get gpios +[ 0.787401] NET: Registered protocol family 17 +[ 0.787573] omap_voltage_late_init: Voltage driver support not added +[ 0.788038] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.788047] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.788096] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 0.788224] Power Management for TI OMAP4+ devices. +[ 0.788446] Registering SWP/SWPB emulation handler +[ 0.789342] dmm 4e000000.dmm: workaround for errata i878 in use +[ 0.791268] dmm 4e000000.dmm: initialized all PAT entries +[ 0.792255] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 0.796295] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.796307] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.796357] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 0.808705] evm_1v8: disabling +[ 0.808719] evm_3v3_sw: disabling +[ 0.808771] aic_dvdd: disabling +[ 0.808780] vmmcwl_fixed: disabling +[ 0.808965] ldousb: disabling +[ 0.811807] VFS: Mounted root (cramfs filesystem) readonly on device 31:8. +[ 0.811857] devtmpfs: mounted +[ 0.812090] Freeing unused kernel memory: 280K +[ 0.812098] This architecture does not have kernel memory protection. +[ 1.356229] udevd[116]: starting version 3.1.5 +[ 1.362073] random: udevd: uninitialized urandom read (16 bytes read, 78 bits of entropy available) +[ 1.362206] random: udevd: uninitialized urandom read (16 bytes read, 78 bits of entropy available) +[ 1.362285] random: udevd: uninitialized urandom read (16 bytes read, 78 bits of entropy available) +[ 1.473578] random: udevd: uninitialized urandom read (16 bytes read, 87 bits of entropy available) +[ 1.486647] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 1.486705] remoteproc0: 55020000.ipu is available +[ 1.486714] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 1.486722] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.489198] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.489209] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.489273] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 1.489501] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 1.489761] remoteproc1: 40800000.dsp is available +[ 1.489805] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 1.489848] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.490505] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 1.490538] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.490548] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.490556] remoteproc2: 41000000.dsp is available +[ 1.490564] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 1.490572] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.490598] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 1.490759] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.490770] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.490827] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 1.620039] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 1.620300] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.620310] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.620372] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 1.845135] random: nonblocking pool is initialized +[ 2.101340] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 2.102508] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.102520] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.102593] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.236079] remoteproc2: registered virtio0 (type 7) +[ 2.291805] remoteproc2: powering up 41000000.dsp +[ 2.295012] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2309392 +[ 2.302425] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 2.302478] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 2.302564] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 2.323591] remoteproc1: powering up 40800000.dsp +[ 2.323612] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2309392 +[ 2.331033] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 2.331077] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 2.331170] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 2.360840] remoteproc2: remote processor 41000000.dsp is now up +[ 2.362757] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 2.363052] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.363065] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.363143] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.385889] remoteproc1: remote processor 40800000.dsp is now up +[ 2.386640] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 2.386676] remoteproc1: registered virtio1 (type 7) +[ 2.386897] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.386907] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.386963] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 2.731438] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 2.974144] remoteproc0: powering up 55020000.ipu +[ 2.974163] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 8656080 +[ 2.974265] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 3.011457] remoteproc0: remote processor 55020000.ipu is now up +[ 3.011880] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 3.011914] remoteproc0: registered virtio2 (type 7) +[ 3.012152] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.012164] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.012223] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.033430] net eth1: initializing cpsw version 1.15 (0) +[ 3.033461] net eth0: initialized cpsw ale version 1.4 +[ 3.033471] net eth0: ALE Table size 1024 +[ 3.036789] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.036799] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.036853] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.040307] net eth1: phy found : id is : 0x0 +[ 3.317371] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 3.321341] NET: Registered protocol family 41 +[ 3.322374] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.322386] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.322447] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.323571] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 3.324140] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.324151] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.324205] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.333466] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 3.334093] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.334104] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.334159] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.614962] input: Sahara Touch-iT213 Serial TouchScreen as /devices/platform/44000000.ocp/4806a000.serial/tty/ttyS0/serio0/input/input0 +[ 3.615933] serio: Serial port ttyS0 +[ 3.616552] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 3.616563] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 3.616626] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 3.740071] DMA: Module install successful, device major num = 243 +[ 3.740084] DRV: Module install successful +[ 4.047801] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 4.047816] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 4.047886] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 4.048919] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 4.048935] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 4.048994] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 4.049810] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 4.049820] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 4.049869] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 +[ 4.224063] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 4.224083] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# +root@(none):~# cat /etc/timestamp +2020052717 +root@(none):~# ------------------------------------------------------------------------------------------------------- 2) Passing Passing LOG.txt [ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.4.84+ (jenkins@0cd374160375) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Fri Dec 20 12:55:06 CST 2019 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a6000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 261376 +[ 0.000000] free_area_init_node: node 0, pgdat c0650440, node_mem_map ef7b2000 +[ 0.000000] DMA zone: 1536 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 196608 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 64768 pages, LIFO batch:15 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 12 pages/cpu @ef742000 s17536 r8192 d23424 u49152 +[ 0.000000] pcpu-alloc: s17536 r8192 d23424 u49152 alloc=12*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 259840 +[ 0.000000] Kernel command line: elevator=noop console=ttyS2,115200n8 vram=24M ip=none mem=1024M cma=64M fixrtc lpj=61475 video=vfb:1920x720,1920x2160,18 root=/dev/mtdblock8 rootfstype=cramfs rw rootwait loglevel=0 DTB_version=01.00.000 BLD_version=00.00.000 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 340800K/1045504K available (4694K kernel code, 254K rwdata, 1208K rodata, 280K init, 271K bss, 508096K reserved, 196608K cma-reserved, 193536K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) + lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc05cbef4 (5904 kB) + .init : 0xc05cc000 - 0xc0612000 ( 280 kB) + .data : 0xc0612000 - 0xc0651b20 ( 255 kB) + .bss : 0xc0653000 - 0xc0696e20 ( 272 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000006] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000021] Switching to timer-based delay loop, resolution 162ns +[ 0.000552] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000563] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.001196] Calibrating delay loop (skipped) preset value.. 12.29 BogoMIPS (lpj=61475) +[ 0.001215] pid_max: default: 4096 minimum: 301 +[ 0.001346] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001360] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.002106] Initializing cgroup subsys freezer +[ 0.002143] CPU: Testing write buffer coherency: ok +[ 0.002406] CPU0: update cpu_capacity 1024 +[ 0.002420] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.002441] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080150] CPU1: update cpu_capacity 1024 +[ 0.080158] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080239] Brought up 2 CPUs +[ 0.080258] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080267] CPU: All CPU(s) started in HYP mode. +[ 0.080275] CPU: Virtualization extensions available. +[ 0.080718] devtmpfs: initialized +[ 0.120944] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.122165] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.369271] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.369291] futex hash table entries: 16 (order: -2, 1024 bytes) +[ 0.374788] pinctrl core: initialized pinctrl subsystem +[ 0.375816] NET: Registered protocol family 16 +[ 0.377113] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.400325] cpuidle: using governor ladder +[ 0.430366] cpuidle: using governor menu +[ 0.441318] OMAP GPIO hardware version 0.1 +[ 0.450206] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.470194] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.470211] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.480557] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.480572] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.481118] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.481131] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.481849] OMAP DMA hardware revision 0.0 +[ 0.525410] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.526906] edma 43300000.edma: memcpy is disabled +[ 0.533669] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.538908] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.539146] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.539367] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.539583] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.539961] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.540206] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.542200] SCSI subsystem initialized +[ 0.542498] usbcore: registered new interface driver usbfs +[ 0.542574] usbcore: registered new interface driver hub +[ 0.542683] usbcore: registered new device driver usb +[ 0.544383] palmas 0-0058: IRQ missing: skipping irq request +[ 0.562245] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 +[ 0.634276] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.634793] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.635271] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 100 kHz +[ 0.635514] media: Linux media interface: v0.10 +[ 0.635578] Linux video capture interface: v2.00 +[ 0.635626] pps_core: LinuxPPS API ver. 1 registered +[ 0.635636] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.635664] PTP clock support registered +[ 0.635672] EDAC MC: Ver: 3.0.0 +[ 0.636647] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.637041] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.638245] clocksource: Switched to clocksource arch_sys_counter +[ 0.641420] NET: Registered protocol family 2 +[ 0.642109] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.642193] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.642359] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.642422] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.642464] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.642633] NET: Registered protocol family 1 +[ 0.642670] PCI: CLS 0 bytes, default 64 +[ 0.643897] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.656369] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.656621] exFAT: file-system version 2.2.0-3arter97 +[ 0.656889] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.657191] jffs2: version 2.2. (NAND) \xffffffc2\xffffffa9 2001-2006 Red Hat, Inc. +[ 0.659977] bounce: pool size: 64 pages +[ 0.660168] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.660181] io scheduler noop registered (default) +[ 0.660192] io scheduler deadline registered +[ 0.660231] io scheduler cfq registered +[ 0.666831] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.682032] + vfb_probe: res=[1920x720] virtual=[1920x2160] bpp=[32] line_length=[7680] color=[18-ARGB8888] @ [0xf1a26000:0x00fd2000],base:0xf1a26000! +  +[ 0.686187] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.690034] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250 +[ 0.690822] console [ttyS2] disabled +[ 0.690878] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 300, base_baud = 3000000) is a 8250 +[ 0.691332] console [ttyS2] enabled +[ 0.692069] [drm] Initialized drm 1.1.0 20060810 +[ 0.699004] loop: module loaded +[ 0.699087] vmemexp device MAJOR num = 246 +[ 0.699116] vmemexp class registered +[ 0.699273] /dev/vmemexp device registered +[ 0.699284] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 0.703070] m25p80 spi32766.0: s25fl512s (65536 Kbytes) +[ 0.703449] 9 ofpart partitions found on MTD device spi32766.0 +[ 0.703460] Creating 9 MTD partitions on "spi32766.0": +[ 0.703475] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 0.704585] 0x000000040000-0x000000440000 : "QSPI.boot.img" +[ 0.705661] 0x000000440000-0x000000840000 : "QSPI.recovery.img" +[ 0.706722] 0x000000840000-0x000000880000 : "QSIPI.misc" +[ 0.707781] 0x000000880000-0x000001880000 : "QSPI.minifs" +[ 0.708930] 0x000001880000-0x000001980000 : "QSPI.jffs2" +[ 0.710009] 0x000001980000-0x000001a80000 : "QSPI.data" +[ 0.711111] 0x000001a80000-0x000004000000 : "QSPI.app" +[ 0.712226] 0x000001a80000-0x000004000000 : "QSPI.cramfs" +[ 0.758294] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 0.758310] davinci_mdio 48485000.mdio: detected phy mask fffffff6 +[ 0.762323] libphy: 48485000.mdio: probed +[ 0.762341] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver RTL9000AA_AN Gigabit Ethernet +[ 0.762356] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver RTL9000AA_AN Gigabit Ethernet +[ 0.763151] cpsw 48484000.ethernet: Detected MACID = 6c:c3:74:2a:08:90 +[ 0.764119] cpsw 48484000.ethernet: cpsw: Detected MACID = 6c:c3:74:2a:08:91 +[ 0.766990] usbcore: registered new interface driver usb-storage +[ 0.767086] i2c /dev entries driver +[ 0.770267] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 0.819450] extcon-usb-gpio extcon_usb1: failed to get gpios +[ 0.819540] extcon-usb-gpio extcon_usb2: failed to get gpios +[ 0.820037] NET: Registered protocol family 17 +[ 0.820261] omap_voltage_late_init: Voltage driver support not added +[ 0.820860] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.820873] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.821483] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.821495] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.822395] Power Management for TI OMAP4+ devices. +[ 0.822663] Registering SWP/SWPB emulation handler +[ 0.823822] dmm 4e000000.dmm: workaround for errata i878 in use +[ 0.826280] dmm 4e000000.dmm: initialized all PAT entries +[ 0.827621] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 0.861195] evm_1v8: disabling +[ 0.861215] evm_3v3_sw: disabling +[ 0.861226] aic_dvdd: disabling +[ 0.861237] vmmcwl_fixed: disabling +[ 0.861474] ldousb: disabling +[ 0.864935] VFS: Mounted root (cramfs filesystem) readonly on device 31:8. +[ 0.865008] devtmpfs: mounted +[ 0.865323] Freeing unused kernel memory: 280K +[ 0.865332] This architecture does not have kernel memory protection. +[ 0.986576] mmc0: host does not support reading read-only switch, assuming write-enable +[ 0.989696] mmc0: new high speed SDHC card at address e624 +[ 0.990293] mmcblk0: mmc0:e624 SL08G 7.40 GiB +[ 0.998070] mmcblk0: p1 p2 +[ 1.507952] udevd[88]: starting version 3.1.5 +[ 1.515355] random: udevd: uninitialized urandom read (16 bytes read, 79 bits of entropy available) +[ 1.515531] random: udevd: uninitialized urandom read (16 bytes read, 79 bits of entropy available) +[ 1.515630] random: udevd: uninitialized urandom read (16 bytes read, 79 bits of entropy available) +[ 1.659001] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 1.659088] remoteproc0: 55020000.ipu is available +[ 1.659100] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 1.659111] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.662610] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 1.662688] remoteproc1: 40800000.dsp is available +[ 1.662700] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 1.662710] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.663219] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 1.663291] remoteproc2: 41000000.dsp is available +[ 1.663302] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 1.663312] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.672154] random: udevd: uninitialized urandom read (16 bytes read, 90 bits of entropy available) +[ 1.928629] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 2.061174] random: nonblocking pool is initialized +[ 2.227344] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 2.627678] remoteproc1: registered virtio0 (type 7) +[ 2.673829] remoteproc2: registered virtio1 (type 7) +[ 2.680231] remoteproc1: powering up 40800000.dsp +[ 2.684177] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2320416 +[ 2.692138] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 2.692201] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 2.692291] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 2.754293] remoteproc1: remote processor 40800000.dsp is now up +[ 2.756326] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 2.758796] remoteproc2: powering up 41000000.dsp +[ 2.762674] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2320416 +[ 2.770565] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 2.770621] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 2.770728] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 2.849143] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 2.882042] remoteproc2: remote processor 41000000.dsp is now up +[ 2.889843] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 3.528484] input: Sahara Touch-iT213 Serial TouchScreen as /devices/platform/44000000.ocp/4806a000.serial/tty/ttyS0/serio0/input/input0 +[ 3.533355] serio: Serial port ttyS0 +[ 3.659134] DMA: Module install successful, device major num = 243 +[ 3.659149] DRV: Module install successful +[ 3.820387] remoteproc0: powering up 55020000.ipu +[ 3.820409] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 8656080 +[ 3.820523] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 3.876318] remoteproc0: remote processor 55020000.ipu is now up +[ 3.877567] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 3.877610] remoteproc0: registered virtio2 (type 7) +[ 4.199788] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 4.204523] NET: Registered protocol family 41 +[ 4.205908] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 +[ 4.215822] virtio_rpmsg_bus virtio1: creating channel rpmsg-proto addr 0x50 +[ 5.481801] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) +[ 5.481828] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) +[ 13.557858] exFAT-fs (mmcblk0[179:0]): trying to mount... +[ 13.557918] exFAT-fs (mmcblk0[179:0]): bogus logical sector size 1 +[ 13.557931] exFAT-fs (mmcblk0[179:0]): failed to recognize fat type +[ 13.557943] exFAT-fs (mmcblk0[179:0]): failed to mount! (-5) +[ 13.840084] tfat: module license 'Commercial. For support email exfat-support@tuxera.com' taints kernel. +[ 13.840099] Disabling lock debugging due to kernel taint +[ 13.841997] Tuxera FAT 12/16/32 driver version 3017.7.24.36 [Flags: R/W MODULE]. +[ 13.842019] Built against headers 4.4.84+ #3 SMP PREEMPT Sat Oct 12 18:29:18 CST 2019 arm +[ 13.842030] Running on kernel 4.4.84+ #1 SMP PREEMPT Fri Dec 20 12:55:06 CST 2019 armv7l +[ 13.844845] tfat: fail_safe is enabled +[ 13.845339] tfat: cluster_heap_lbo 0x1fc400 +[ 13.845351] tfat: 9 blkbits for normal inodes +[ 13.845360] tfat: fat start lbo 0x4000 +[ 13.845369] tfat: 9 blkbits for main FAT32 inode +[ 13.845377] tfat: cluster size 512 +[ 13.870287] tfat info: FAT32 volume name 'boot', version 0.0. +[ 14.015778] tfat info: Exiting online fsck with status 4: completed successfully + +Hi, Thanks for the boot log. Can you also attach the images as attachments instead of pasting. The images are not visible. Thanks, Keerthy + +Hi,Keerthy Sorry, the attached picture is as follows： 1) Failing 2) Passing + +Hi, The error is coming from VDD_MPU but i see that VDD_MPU did not change between the two boards. Is there any change w.r.t kernel code or DT? Best Regards, Keerthy + +Hi, File: drivers/soc/ti/ti-opp-domain.c Code: data->vdd_reg = regulator_get(request_dev, "vdd"); if (IS_ERR(data->vdd_reg)) { ret = PTR_ERR(data->vdd_reg); dev_err(oppdm_dev, "Unable to get vdd regulator:%d\n", ret); goto out_unreg; } The above code is erring out with -517 in the board that is failing: regulator_get --> _regulator_get -->regulator_dev_lookup Can you add debug prints there and check where we are getting -517 i.e -EPROBE_DEFER Best Regards, Keerthy + +Hi，Keerthy We have followed your suggestion and the result is: the red area of the screenshot and the TXT file are returned debug prints. Can you check it? EPROBE_DEFER=517 dmesg(1).txt root@(none):~# dmesg +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 4.4.84+ (invo@ubuntu) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #152 SMP PREEMPT Fri Aug 21 09:33:37 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: TI DRA742 +[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB +[ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a6000000, size 48 MiB +[ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a9000000, size 32 MiB +[ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool +[ 0.000000] Reserved memory: regions without no-map are not yet supported +[ 0.000000] cma: Reserved 128 MiB at 0x00000000d7c00000 +[ 0.000000] Forcing write-allocate cache policy for SMP +[ 0.000000] Memory policy: Data cache writealloc +[ 0.000000] OMAP4: Map 0x00000000dfd00000 to fe600000 for dram barrier +[ 0.000000] On node 0 totalpages: 392448 +[ 0.000000] free_area_init_node: node 0, pgdat c0638440, node_mem_map e5400000 +[ 0.000000] DMA zone: 1512 pages used for memmap +[ 0.000000] DMA zone: 0 pages reserved +[ 0.000000] DMA zone: 193536 pages, LIFO batch:31 +[ 0.000000] HighMem zone: 198912 pages, LIFO batch:31 +[ 0.000000] DRA752 ES2.0 +[ 0.000000] PERCPU: Embedded 12 pages/cpu @ef340000 s17536 r8192 d23424 u49152 +[ 0.000000] pcpu-alloc: s17536 r8192 d23424 u49152 alloc=12*4096 +[ 0.000000] pcpu-alloc: [0] 0 [0] 1 +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 390936 +[ 0.000000] Kernel command line: elevator=noop console=ttyS2,115200n8 vram=24M ip=none mem=1536M cma=128M vmalloc=260M fixrtc lpj=61475 video=vfb:1920x720, +1920x2160,18 root=PARTUUID=9c497653-02 rootfs=ext4 rw rootwait loglevel=0 +[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) +[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Memory: 795656K/1569792K available (4694K kernel code, 254K rwdata, 1116K rodata, 276K init, 271K bss, 511992K reserved, 262144K cma-reserved, +664576K highmem) +[ 0.000000] Virtual kernel memory layout: + vector : 0xffff0000 - 0xffff1000 ( 4 kB) + fixmap : 0xffc00000 - 0xfff00000 (3072 kB) + vmalloc : 0xef800000 - 0xff800000 ( 256 MB) + lowmem : 0xc0000000 - 0xef400000 ( 756 MB) + pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) + modules : 0xbf000000 - 0xbfe00000 ( 14 MB) + .text : 0xc0008000 - 0xc05b4ef4 (5812 kB) + .init : 0xc05b5000 - 0xc05fa000 ( 276 kB) + .data : 0xc05fa000 - 0xc0639b20 ( 255 kB) + .bss : 0xc063b000 - 0xc067ee20 ( 272 kB) +[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 +[ 0.000000] Preemptible hierarchical RCU implementation. +[ 0.000000] Build-time adjustment of leaf fanout to 32. +[ 0.000000] NR_IRQS:16 nr_irqs:16 16 +[ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div +[ 0.000000] OMAP clockevent source: timer1 at 32786 Hz +[ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). +[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns +[ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns +[ 0.000016] Switching to timer-based delay loop, resolution 162ns +[ 0.000417] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns +[ 0.000425] OMAP clocksource: 32k_counter at 32768 Hz +[ 0.000907] Calibrating delay loop (skipped) preset value.. 12.29 BogoMIPS (lpj=61475) +[ 0.000921] pid_max: default: 4096 minimum: 301 +[ 0.001021] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001032] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.001617] Initializing cgroup subsys freezer +[ 0.001645] CPU: Testing write buffer coherency: ok +[ 0.001846] /cpus/cpu@0 missing clock-frequency property +[ 0.001918] missing device node for CPU 1 +[ 0.001928] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 +[ 0.001945] Setting up static identity map for 0x80008380 - 0x800083e0 +[ 0.080167] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 +[ 0.080229] Brought up 2 CPUs +[ 0.080242] SMP: Total of 2 processors activated (24.59 BogoMIPS). +[ 0.080249] CPU: All CPU(s) started in HYP mode. +[ 0.080255] CPU: Virtualization extensions available. +[ 0.080603] devtmpfs: initialized +[ 0.110681] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 +[ 0.111634] omap_hwmod: l3_main_2 using broken dt data from ocp +[ 0.316570] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns +[ 0.316588] futex hash table entries: 16 (order: -2, 1024 bytes) +[ 0.322051] pinctrl core: initialized pinctrl subsystem +[ 0.322852] NET: Registered protocol family 16 +[ 0.323846] DMA: preallocated 256 KiB pool for atomic coherent allocations +[ 0.350230] cpuidle: using governor ladder +[ 0.380265] cpuidle: using governor menu +[ 0.388629] OMAP GPIO hardware version 0.1 +[ 0.395380] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! +[ 0.410584] omap-gpmc 50000000.gpmc: GPMC revision 6.0 +[ 0.410597] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 +[ 0.418424] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. +[ 0.418434] hw-breakpoint: maximum watchpoint size is 8 bytes. +[ 0.418855] omap4_sram_init:Unable to allocate sram needed to handle errata I688 +[ 0.418865] omap4_sram_init:Unable to get sram pool needed to handle errata I688 +[ 0.419439] OMAP DMA hardware revision 0.0 +[ 0.461431] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) +[ 0.462586] edma 43300000.edma: memcpy is disabled +[ 0.467624] edma 43300000.edma: TI EDMA DMA engine driver +[ 0.471646] omap-iommu 40d01000.mmu: 40d01000.mmu registered +[ 0.471827] omap-iommu 40d02000.mmu: 40d02000.mmu registered +[ 0.471995] omap-iommu 58882000.mmu: 58882000.mmu registered +[ 0.472159] omap-iommu 55082000.mmu: 55082000.mmu registered +[ 0.472446] omap-iommu 41501000.mmu: 41501000.mmu registered +[ 0.472631] omap-iommu 41502000.mmu: 41502000.mmu registered +[ 0.474089] SCSI subsystem initialized +[ 0.474319] usbcore: registered new interface driver usbfs +[ 0.474378] usbcore: registered new interface driver hub +[ 0.474465] usbcore: registered new device driver usb +[ 0.475766] palmas 0-0058: IRQ missing: skipping irq request +[ 0.491054] palmas 0-0058: Muxing GPIO 2f, PWM 0, LED 0 +[ 0.562982] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz +[ 0.563375] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz +[ 0.563734] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 100 kHz +[ 0.563923] media: Linux media interface: v0.10 +[ 0.563972] Linux video capture interface: v2.00 +[ 0.564016] pps_core: LinuxPPS API ver. 1 registered +[ 0.564024] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti +[ 0.564046] PTP clock support registered +[ 0.564053] EDAC MC: Ver: 3.0.0 +[ 0.564786] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 +[ 0.565085] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 +[ 0.566006] clocksource: Switched to clocksource arch_sys_counter +[ 0.568411] NET: Registered protocol family 2 +[ 0.568913] TCP established hash table entries: 8192 (order: 3, 32768 bytes) +[ 0.568977] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) +[ 0.569102] TCP: Hash tables configured (established 8192 bind 8192) +[ 0.569152] UDP hash table entries: 512 (order: 2, 16384 bytes) +[ 0.569184] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) +[ 0.569315] NET: Registered protocol family 1 +[ 0.569344] PCI: CLS 0 bytes, default 64 +[ 0.570240] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available +[ 0.579640] squashfs: version 4.0 (2009/01/31) Phillip Lougher +[ 0.579832] exFAT: file-system version 2.2.0-3arter97 +[ 0.580029] ntfs: driver 2.1.32 [Flags: R/O]. +[ 0.580254] jffs2: version 2.2. (NAND) \xffffffc2\xffffffa9 2001-2006 Red Hat, Inc. +[ 0.582370] bounce: pool size: 64 pages +[ 0.582519] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) +[ 0.582529] io scheduler noop registered (default) +[ 0.582537] io scheduler deadline registered +[ 0.582566] io scheduler cfq registered +[ 0.584607] _regulator_get: 11111111111111111111 +[ 0.584616] regulator_dev_lookup: 1111111 devname:phy-4a084000.phy.0 +[ 0.584688] regulator_dev_lookup: 1111111 devname:48070000.i2c:tps659038@58:tps659038_pmic +[ 0.584696] regulator_dev_lookup: 1111111 11111111 +[ 0.584702] regulator_dev_lookup: 222222222 +[ 0.584728] regulator_dev_lookup: 3333333333 +[ 0.585071] _regulator_get: 11111111111111111111 +[ 0.585079] regulator_dev_lookup: 1111111 devname:phy-4a085000.phy.1 +[ 0.585120] regulator_dev_lookup: 1111111 devname:48070000.i2c:tps659038@58:tps659038_pmic +[ 0.585128] regulator_dev_lookup: 1111111 11111111 +[ 0.585133] regulator_dev_lookup: 222222222 +[ 0.585156] regulator_dev_lookup: 3333333333 +[ 0.585844] _regulator_get: 11111111111111111111 +[ 0.585852] regulator_dev_lookup: 1111111 devname:phy-4a096000.phy.2 +[ 0.585860] regulator_dev_lookup: 1111111 11111111 +[ 0.585866] regulator_dev_lookup: 222222222 +[ 0.585888] regulator_dev_lookup: 3333333333 +[ 0.585894] _regulator_get: 2222222222222222222 +[ 0.586501] _regulator_get: 11111111111111111111 +[ 0.586510] regulator_dev_lookup: 1111111 devname:phy-4a094000.pciephy.3 +[ 0.586517] regulator_dev_lookup: 1111111 11111111 +[ 0.586523] regulator_dev_lookup: 222222222 +[ 0.586546] regulator_dev_lookup: 3333333333 +[ 0.586552] _regulator_get: 2222222222222222222 +[ 0.586851] _regulator_get: 11111111111111111111 +[ 0.586858] regulator_dev_lookup: 1111111 devname:phy-4a084400.phy.4 +[ 0.586866] regulator_dev_lookup: 1111111 11111111 +[ 0.586872] regulator_dev_lookup: 222222222 +[ 0.586894] regulator_dev_lookup: 3333333333 +[ 0.586899] _regulator_get: 2222222222222222222 +[ 0.587875] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 +[ 0.599410] + vfb_probe: res=[1920x720] virtual=[1920x2160] bpp=[32] line_length=[7680] color=[18-ARGB8888] @ [0xf0a26000:0x00fd2000],base:0xf0a26000! + +[ 0.602554] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled +[ 0.605408] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250 +[ 0.606048] console [ttyS2] disabled +[ 0.606091] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 300, base_baud = 3000000) is a 8250 +[ 0.606493] console [ttyS2] enabled +[ 0.607078] [drm] Initialized drm 1.1.0 20060810 +[ 0.612226] loop: module loaded +[ 0.612290] vmemexp device MAJOR num = 246 +[ 0.612312] vmemexp class registered +[ 0.612433] /dev/vmemexp device registered +[ 0.612441] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 +[ 0.615354] m25p80 spi32766.0: s25fl512s (65536 Kbytes) +[ 0.615654] 9 ofpart partitions found on MTD device spi32766.0 +[ 0.615664] Creating 9 MTD partitions on "spi32766.0": +[ 0.615674] 0x000000000000-0x000000040000 : "QSPI.SPL" +[ 0.616583] 0x000000040000-0x000000440000 : "QSPI.boot.img" +[ 0.617393] 0x000000440000-0x000000840000 : "QSPI.recovery.img" +[ 0.618194] 0x000000840000-0x000000880000 : "QSIPI.misc" +[ 0.618996] 0x000000880000-0x000001880000 : "QSPI.minifs" +[ 0.619803] 0x000001880000-0x000001980000 : "QSPI.jffs2" +[ 0.620621] 0x000001980000-0x000001a80000 : "QSPI.data" +[ 0.621460] 0x000001a80000-0x000004000000 : "QSPI.app" +[ 0.622282] 0x000001a80000-0x000004000000 : "QSPI.cramfs" +[ 0.666025] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 +[ 0.666038] davinci_mdio 48485000.mdio: detected phy mask fffffff6 +[ 0.669923] libphy: 48485000.mdio: probed +[ 0.669935] davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver RTL9000AA_AN Gigabit Ethernet +[ 0.669946] davinci_mdio 48485000.mdio: phy[3]: device 48485000.mdio:03, driver RTL9000AA_AN Gigabit Ethernet +[ 0.670533] cpsw 48484000.ethernet: Detected MACID = 24:7d:4d:2e:31:0c +[ 0.671273] cpsw 48484000.ethernet: cpsw: Detected MACID = 24:7d:4d:2e:31:0d +[ 0.673434] usbcore: registered new interface driver usb-storage +[ 0.673507] i2c /dev entries driver +[ 0.675888] omap_hsmmc 4809c000.mmc: Got CD GPIO +[ 0.676237] _regulator_get: 11111111111111111111 +[ 0.676245] regulator_dev_lookup: 1111111 devname:4809c000.mmc +[ 0.676346] _regulator_get: 11111111111111111111 +[ 0.676354] regulator_dev_lookup: 1111111 devname:4809c000.mmc +[ 0.676393] regulator_dev_lookup: 1111111 devname:48070000.i2c:tps659038@58:tps659038_pmic +[ 0.676401] regulator_dev_lookup: 1111111 11111111 +[ 0.676407] regulator_dev_lookup: 222222222 +[ 0.676441] regulator_dev_lookup: 3333333333 +[ 0.676654] _regulator_get: 11111111111111111111 +[ 0.676662] regulator_dev_lookup: 1111111 devname:4809c000.mmc +[ 0.726935] extcon-usb-gpio extcon_usb1: failed to get gpios +[ 0.727003] extcon-usb-gpio extcon_usb2: failed to get gpios +[ 0.727387] NET: Registered protocol family 17 +[ 0.727540] omap_voltage_late_init: Voltage driver support not added +[ 0.727993] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.728002] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.728009] _regulator_get: 11111111111111111111 +[ 0.728015] regulator_dev_lookup: 1111111 devname:cpu0 +[ 0.728061] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 0.728068] _regulator_get: 2222222222222222222 +[ 0.728078] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 0.728209] Power Management for TI OMAP4+ devices. +[ 0.728428] Registering SWP/SWPB emulation handler +[ 0.729347] dmm 4e000000.dmm: workaround for errata i878 in use +[ 0.731330] dmm 4e000000.dmm: initialized all PAT entries +[ 0.732343] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 +[ 0.736301] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.736312] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.736319] _regulator_get: 11111111111111111111 +[ 0.736326] regulator_dev_lookup: 1111111 devname:cpu0 +[ 0.736373] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 0.736379] _regulator_get: 2222222222222222222 +[ 0.736390] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 0.748884] evm_1v8: disabling +[ 0.748898] evm_3v3_sw: disabling +[ 0.748906] aic_dvdd: disabling +[ 0.748913] vmmcwl_fixed: disabling +[ 0.749102] ldousb: disabling +[ 0.749977] Waiting for root device PARTUUID=9c497653-02... +[ 0.824235] mmc0: host does not support reading read-only switch, assuming write-enable +[ 0.827055] mmc0: new high speed SDHC card at address e624 +[ 0.837543] mmcblk0: mmc0:e624 SL08G 7.40 GiB +[ 0.838683] mmcblk0: p1 p2 +[ 0.839407] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 0.839417] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 0.839423] _regulator_get: 11111111111111111111 +[ 0.839430] regulator_dev_lookup: 1111111 devname:cpu0 +[ 0.839478] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 0.839485] _regulator_get: 2222222222222222222 +[ 0.839496] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 0.856593] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities +[ 0.856987] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities +[ 0.881589] EXT4-fs (mmcblk0p2): recovery complete +[ 0.882772] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) +[ 0.882809] VFS: Mounted root (ext4 filesystem) on device 179:2. +[ 0.885615] devtmpfs: mounted +[ 0.885850] Freeing unused kernel memory: 276K +[ 0.885857] This architecture does not have kernel memory protection. +[ 1.214543] udevd[86]: starting version 3.1.5 +[ 1.222192] random: udevd: uninitialized urandom read (16 bytes read, 13 bits of entropy available) +[ 1.223003] random: udevd: uninitialized urandom read (16 bytes read, 13 bits of entropy available) +[ 1.223076] random: udevd: uninitialized urandom read (16 bytes read, 13 bits of entropy available) +[ 1.315478] random: udevd: uninitialized urandom read (16 bytes read, 15 bits of entropy available) +[ 1.321205] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 +[ 1.321270] remoteproc0: 55020000.ipu is available +[ 1.321280] remoteproc0: Note: remoteproc is still under development and considered experimental. +[ 1.321290] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.321557] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 +[ 1.321602] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.321614] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.321617] remoteproc1: 40800000.dsp is available +[ 1.321624] remoteproc1: Note: remoteproc is still under development and considered experimental. +[ 1.321629] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.321639] _regulator_get: 11111111111111111111 +[ 1.321646] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.321710] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.321718] _regulator_get: 2222222222222222222 +[ 1.321729] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.321907] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.321916] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.321923] _regulator_get: 11111111111111111111 +[ 1.321929] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.321978] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.321985] _regulator_get: 2222222222222222222 +[ 1.321994] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.322050] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 +[ 1.322108] remoteproc2: 41000000.dsp is available +[ 1.322116] remoteproc2: Note: remoteproc is still under development and considered experimental. +[ 1.322124] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. +[ 1.322320] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.322330] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.322338] _regulator_get: 11111111111111111111 +[ 1.322347] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.322405] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.322411] _regulator_get: 2222222222222222222 +[ 1.322420] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.448400] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 +[ 1.448702] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.448717] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.448726] _regulator_get: 11111111111111111111 +[ 1.448734] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.448795] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.448803] _regulator_get: 2222222222222222222 +[ 1.448816] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.638369] [drm] Initialized pvr 1.14.3699939 20110701 on minor 1 +[ 1.639106] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.639118] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.639126] _regulator_get: 11111111111111111111 +[ 1.639133] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.639190] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.639204] _regulator_get: 2222222222222222222 +[ 1.639215] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.649437] remoteproc1: registered virtio0 (type 7) +[ 1.672727] remoteproc2: registered virtio1 (type 7) +[ 1.702162] remoteproc1: powering up 40800000.dsp +[ 1.705828] remoteproc1: Booting fw image dra7-dsp1-fw.xe66, size 2294928 +[ 1.713240] omap_hwmod: mmu0_dsp1: _wait_target_disable failed +[ 1.713285] omap-iommu 40d01000.mmu: 40d01000.mmu: version 3.0 +[ 1.713388] omap-iommu 40d02000.mmu: 40d02000.mmu: version 3.0 +[ 1.760980] remoteproc1: remote processor 40800000.dsp is now up +[ 1.761724] virtio_rpmsg_bus virtio0: rpmsg host is online +[ 1.761992] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.762003] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.762010] _regulator_get: 11111111111111111111 +[ 1.762016] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.762068] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.762075] _regulator_get: 2222222222222222222 +[ 1.762085] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.762983] remoteproc2: powering up 41000000.dsp +[ 1.766618] remoteproc2: Booting fw image dra7-dsp2-fw.xe66, size 2294928 +[ 1.774018] omap_hwmod: mmu0_dsp2: _wait_target_disable failed +[ 1.774061] omap-iommu 41501000.mmu: 41501000.mmu: version 3.0 +[ 1.774116] omap-iommu 41502000.mmu: 41502000.mmu: version 3.0 +[ 1.814080] remoteproc2: remote processor 41000000.dsp is now up +[ 1.814798] virtio_rpmsg_bus virtio1: rpmsg host is online +[ 1.815062] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 1.815073] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 1.815080] _regulator_get: 11111111111111111111 +[ 1.815087] regulator_dev_lookup: 1111111 devname:cpu0 +[ 1.815142] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 1.815148] _regulator_get: 2222222222222222222 +[ 1.815158] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 1.994467] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] +[ 1.994966] remoteproc0: powering up 55020000.ipu +[ 1.994982] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 8656080 +[ 1.995074] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 +[ 2.036270] remoteproc0: remote processor 55020000.ipu is now up +[ 2.036792] virtio_rpmsg_bus virtio2: rpmsg host is online +[ 2.036828] remoteproc0: registered virtio2 (type 7) +[ 2.037087] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.037099] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.037107] _regulator_get: 11111111111111111111 +[ 2.037114] regulator_dev_lookup: 1111111 devname:cpu0 +[ 2.037169] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 2.037176] _regulator_get: 2222222222222222222 +[ 2.037187] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 2.158507] net eth1: initializing cpsw version 1.15 (0) +[ 2.158536] net eth0: initialized cpsw ale version 1.4 +[ 2.158546] net eth0: ALE Table size 1024 +[ 2.344884] -------------PHY is ready to go.--------------- +[ 2.346969] net eth1: phy found : id is : 0x1ccb00 +[ 2.357818] virtio_rpmsg_bus virtio2: creating channel rpmsg-proto addr 0x50 +[ 2.366429] NET: Registered protocol family 41 +[ 2.366815] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.366828] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.366838] _regulator_get: 11111111111111111111 +[ 2.366846] regulator_dev_lookup: 1111111 devname:cpu0 +[ 2.366918] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 2.366925] _regulator_get: 2222222222222222222 +[ 2.366936] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 2.775948] input: Sahara Touch-iT213 Serial TouchScreen as /devices/platform/44000000.ocp/4806a000.serial/tty/ttyS0/serio0/input/input0 +[ 2.776434] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm +[ 2.776446] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm +[ 2.776454] _regulator_get: 11111111111111111111 +[ 2.776461] regulator_dev_lookup: 1111111 devname:cpu0 +[ 2.776519] regulator_dev_lookup: 1111111 0000000:cpu0 node->name=smps123 node-full-name=/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +[ 2.776527] _regulator_get: 2222222222222222222 +[ 2.776540] ti_oppdm 4a003b20.oppdm: 11 Unable to get vdd regulator:-517 +[ 2.776595] serio: Serial port ttyS0 +[ 2.860168] DMA: Module install successful, device major num = 243 +[ 2.860179] DRV: Module install successful +[ 3.224802] random: invo_app_qt: uninitialized urandom read (4 bytes read, 80 bits of entropy available) +[ 11.930473] random: nonblocking pool is initialized +[ 12.772013] tfat: module license 'Commercial. For support email exfat-support@tuxera.com' taints kernel. +[ 12.772026] Disabling lock debugging due to kernel taint +[ 12.773317] Tuxera FAT 12/16/32 driver version 3017.7.24.36 [Flags: R/W MODULE]. +[ 12.773333] Built against headers 4.4.84+ #3 SMP PREEMPT Sat Oct 12 18:29:18 CST 2019 arm +[ 12.773343] Running on kernel 4.4.84+ #152 SMP PREEMPT Fri Aug 21 09:33:37 CST 2020 armv7l +[ 12.774898] tfat: fail_safe is enabled +[ 12.775332] tfat: cluster_heap_lbo 0x1fc400 +[ 12.775340] tfat: 9 blkbits for normal inodes +[ 12.775347] tfat: fat start lbo 0x4000 +[ 12.775353] tfat: 9 blkbits for main FAT32 inode +[ 12.775359] tfat: cluster size 512 +[ 12.799940] tfat info: FAT32 volume name 'boot', version 0.0. +[ 12.862036] tfat info: Exiting online fsck with status 4: completed successfully +root@(none):~# +root@(none):~# find /sys/ |grep smps123 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/regulator-name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/regulator-always-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/regulator-min-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/regulator-max-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/phandle +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/regulator-boot-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps123/linux,phandle +root@(none):~# find /sys/ |grep smps45 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/regulator-name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/regulator-always-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/regulator-min-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/regulator-max-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/phandle +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/regulator-boot-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps45/linux,phandle +/sys/kernel/debug/regulator/smps45 +/sys/kernel/debug/regulator/smps45/bypass_count +/sys/kernel/debug/regulator/smps45/open_count +/sys/kernel/debug/regulator/smps45/use_count +root@(none):~# find /sys/ |grep smps6 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6 +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/regulator-name +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/regulator-always-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/regulator-min-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/regulator-max-microvolt +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/phandle +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/regulator-boot-on +/sys/firmware/devicetree/base/ocp/i2c@48070000/tps659038@58/tps659038_pmic/regulators/smps6/linux,phandle +/sys/kernel/debug/regulator/smps6 +/sys/kernel/debug/regulator/smps6/bypass_count +/sys/kernel/debug/regulator/smps6/open_count +/sys/kernel/debug/regulator/smps6/use_count + +Hi, I believe on the failing board regulator registration has not happened. Hence the oppdm driver is deferring probe with -517 repeatedly. I see that you device tree nodes are populated fine but can you dump the output of all the sysfs nodes in the regulator class: cat /sys/class/regulator/regulator.*/* All the contents under that. It will be helpful if we can see if the regulator registration is failing on the failing case. It will be very good to check the same on the passing board as well. Best Regards, Keerthy + diff --git a/data2/text/range/30001+/929387.txt b/data2/text/range/30001+/929387.txt new file mode 100644 index 0000000000000000000000000000000000000000..742b6dc1db21cde8ff0b801e41ab8cd2d52c7b91 --- /dev/null +++ b/data2/text/range/30001+/929387.txt @@ -0,0 +1,790 @@ +Ticket Name: PROCESSOR-SDK-AM335X: PROCESSOR-SDK-AM335X: how to disable bootup and shutdown message on the screen + +Query Text: +Part Number: PROCESSOR-SDK-AM335X HI All , I need to disable bootup and shutdown message on the screen , I have tried to disable message in printk.c , but it still print message on the screen when I bootup or shutdown the device. please give me some suggestion . thanks. kernel/printk.c #define DEFAULT_CONSOLE_LOGLEVEL 0 /*默认是7，我改为0*/ static void __call_console_drivers(unsigned start, unsigned end) { struct console *con; for_each_console(con) { if (exclusive_console && con != exclusive_console) continue; // if ((con->flags & CON_ENABLED) && con->write && // (cpu_online(smp_processor_id()) || // (con->flags & CON_ANYTIME))) //chang by changliang con->write(con, &LOG_BUF(start), end - start); } } + +Responses: +#define DEFAULT_CONSOLE_LOGLEVEL 0 /*default is 7，I have changed to 0*/ + +HI, Could you please attach an example of what you are seeing after making the console loglevel change? Thanks. + +Open_u-boot_environment_parameter_console.txt U-Boot SPL 2013.01.01-svn383 (Aug 16 2017 - 16:16:00) +musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) +musb-hdrc: MHDRC RTL version 2.0 +musb-hdrc: setup fifo_mode 4 +musb-hdrc: 28/31 max ep, 16384/16384 memory +USB Peripheral mode controller at 47401000 using PIO, IRQ 0 +musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) +musb-hdrc: MHDRC RTL version 2.0 +musb-hdrc: setup fifo_mode 4 +musb-hdrc: 28/31 max ep, 16384/16384 memory +USB Host mode controller at 47401800 using PIO, IRQ 0 +Boot0: GPIO0_20 = 0 +Boot1: GPIO0_28 = 1 +Boot2: GPIO3_21 = 1 +OMAP SD/MMC: 0 +mmc_send_cmd : timeout: No status update +reading u-boot.img +reading u-boot.img +OMAP SD/MMC: 0 +mmc_send_cmd : timeout: No status update +Card did not respond to voltage select! + + +U-Boot 2013.01.01-gc1f80ab-dirty (Apr 07 2020 - 14:25:20) + +I2C: ready +DRAM: 512 MiB +WARNING: Caches not enabled +LCD_VDD_EN +LCDAINTCConfigure +Configurou interrupcao lcd_init +setup LCD start +Configurou LCD +NAND: No NAND device found!!! +0 MiB +MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 +SF: Detected W25Q32 with page size 4 KiB, total 4 MiB +musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) +musb-hdrc: MHDRC RTL version 2.0 +musb-hdrc: setup fifo_mode 4 +musb-hdrc: 28/31 max ep, 16384/16384 memory +USB Peripheral mode controller at 47401000 using PIO, IRQ 0 +musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn) +musb-hdrc: MHDRC RTL version 2.0 +musb-hdrc: setup fifo_mode 4 +musb-hdrc: 28/31 max ep, 16384/16384 memory +USB Host mode controller at 47401800 using PIO, IRQ 0 +Net: cpsw, usb_ether +get MAC Address from spiflash +SF: Detected W25Q32 with page size 4 KiB, total 4 MiB +booting from MMC1 & no insert SD +Hit any key to stop autoboot: 0 +mmc1(part 0) is current device +mmc_send_cmd : timeout: No status update +SD/MMC found on device 1 +reading uEnv.txt +** Unable to read file uEnv.txt ** +reading uImage +3222264 bytes read in 323 ms (9.5 MiB/s) +Booting from mmc ... +## Booting kernel from Legacy Image at 80007fc0 ... + Image Name: Linux-3.2.0 + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 3222200 Bytes = 3.1 MiB + Load Address: 80008000 + Entry Point: 80008000 + Verifying Checksum ... OK + XIP Kernel Image ... OK +OK +## bootargs = console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait ip=none mac_addr=C4:00:AD:15:E9:54 video_mode=TFC_S9700RTWV35TR_01B + +Starting kernel ... + +Uncompressing Linux... done, booting the kernel. +[ 0.000000] Linux version 3.2.0 (cl@cl-pc) (gcc version 4.7.3 20130226 (prerelease) (crosstool-NG linaro-1.13.1-4.7-2013.03-20130313 - Linaro GCC 2013.03) ) #240 Tue Apr 7 14:22:36 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache +[ 0.000000] Machine: am335xevm +[ 0.000000] Memory policy: ECC disabled, Data cache writeback +[ 0.000000] AM335X ES2.1 (neon ) +[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048 +[ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait ip=none mac_addr=C4:00:AD:15:E9:54 video_mode=TFC_S9700RTWV35TR_01B +[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) +[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) +[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) +[ 0.000000] Memory: 512MB = 512MB total +[ 0.000000] Memory: 512732k/512732k available, 11556k reserved, 0K highmem +[ 0.000000] Virtual kernel memory layout: +[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) +[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) +[ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB) +[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB) +[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) +[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) +[ 0.000000] .text : 0xc0008000 - 0xc05a6000 (5752 kB) +[ 0.000000] .init : 0xc05a6000 - 0xc063d000 ( 604 kB) +[ 0.000000] .data : 0xc063e000 - 0xc06a7470 ( 422 kB) +[ 0.000000] .bss : 0xc06a7494 - 0xc06d922c ( 200 kB) +[ 0.000000] NR_IRQS:396 +[ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts +[ 0.000000] Total of 128 interrupts on 1 active controller +[ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz +[ 0.000000] OMAP clocksource: GPTIMER1 at 24000000 Hz +[ 0.000000] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms +[ 0.000000] Console: colour dummy device 80x30 +[ 0.000159] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736) +[ 0.089337] pid_max: default: 32768 minimum: 301 +[ 0.089430] Security Framework initialized +[ 0.089511] Mount-cache hash table entries: 512 +[ 0.089817] CPU: Testing write buffer coherency: ok +[ 0.109054] omap_hwmod: gfx: failed to hardreset +[ 0.124815] omap_hwmod: pruss: failed to hardreset +[ 0.125525] platform_driver_register start +[ 0.125535] driver_register start +[ 0.125713] print_constraints: dummy: +[ 0.125843] driver_register end ret=0 +[ 0.125850] platform_driver_register end ret=0 +[ 0.126012] NET: Registered protocol family 16 +[ 0.127340] platform_driver_register start +[ 0.127351] driver_register start +[ 0.127630] OMAP GPIO hardware version 0.1 +[ 0.128333] driver_register end ret=0 +[ 0.128342] platform_driver_register end ret=0 +[ 0.129168] driver_register start +[ 0.129261] driver_register end ret=0 +[ 0.129270] platform_driver_register start +[ 0.129276] driver_register start +[ 0.129415] driver_register end ret=0 +[ 0.129422] platform_driver_register end ret=0 +[ 0.129699] omap_mux_init: Add partition: #1: core, flags: 0 +[ 0.129991] omap_i2c.1: alias fck already exists +[ 0.131522] omap2_mcspi.1: alias fck already exists +[ 0.132204] edma.0: alias fck already exists +[ 0.132219] edma.0: alias fck already exists +[ 0.132231] edma.0: alias fck already exists +[ 0.134485] platform_driver_register start +[ 0.134497] driver_register start +[ 0.135289] driver_register end ret=0 +[ 0.135298] platform_driver_register end ret=0 +[ 0.152066] bio: create slab at 0 +[ 0.152351] driver_register start +[ 0.152495] driver_register end ret=0 +[ 0.152626] platform_driver_register start +[ 0.152634] driver_register start +[ 0.152775] driver_register end ret=0 +[ 0.152781] platform_driver_register end ret=0 +[ 0.152787] platform_driver_register start +[ 0.152793] driver_register start +[ 0.152901] driver_register end ret=0 +[ 0.152908] platform_driver_register end ret=0 +[ 0.152914] platform_driver_register start +[ 0.152919] driver_register start +[ 0.153023] driver_register end ret=0 +[ 0.153029] platform_driver_register end ret=0 +[ 0.153135] driver_register start +[ 0.153230] driver_register end ret=0 +[ 0.153237] driver_register start +[ 0.153330] driver_register end ret=0 +[ 0.153337] driver_register start +[ 0.153434] driver_register end ret=0 +[ 0.153988] SCSI subsystem initialized +[ 0.154032] platform_driver_register start +[ 0.154038] driver_register start +[ 0.154473] driver_register end ret=0 +[ 0.154480] platform_driver_register end ret=0 +[ 0.154676] driver_register start +[ 0.154770] driver_register end ret=0 +[ 0.154904] driver_register start +[ 0.155040] driver_register end ret=0 +[ 0.155057] usbcore: registered new interface driver usbfs +[ 0.155169] driver_register start +[ 0.155286] driver_register end ret=0 +[ 0.155299] usbcore: registered new interface driver hub +[ 0.155337] driver_register start +[ 0.155452] driver_register end ret=0 +[ 0.155459] usbcore: registered new device driver usb +[ 0.155467] platform_driver_register start +[ 0.155472] driver_register start +[ 0.155701] registerd cppi-dma Intr @ IRQ 17 +[ 0.155711] Cppi41 Init Done Qmgr-base(e087a000) dma-base(e0878000) +[ 0.155718] Cppi41 Init Done +[ 0.155741] musb-ti81xx musb-ti81xx: musb0, board_mode=0x13, plat_mode=0x3 +[ 0.155961] musb-ti81xx musb-ti81xx: musb1, board_mode=0x13, plat_mode=0x1 +[ 0.156214] driver_register end ret=0 +[ 0.156221] platform_driver_register end ret=0 +[ 0.156227] platform_driver_register start +[ 0.156233] driver_register start +[ 0.156351] driver_register end ret=0 +[ 0.156358] platform_driver_register end ret=0 +[ 0.156736] platform_driver_register start +[ 0.156743] driver_register start +[ 0.156845] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz +[ 0.159617] print_constraints: VRTC: +[ 0.160990] print_constraints: VIO: at 1500 mV +[ 0.163204] print_constraints: VDD1: 600 <--> 1500 mV at 1325 mV normal +[ 0.165401] print_constraints: VDD2: 600 <--> 1500 mV at 1137 mV normal +[ 0.166327] print_constraints: VDD3: 5000 mV +[ 0.167649] print_constraints: VDIG1: at 1800 mV +[ 0.168997] print_constraints: VDIG2: at 1800 mV +[ 0.170328] print_constraints: VPLL: at 1800 mV +[ 0.171673] print_constraints: VDAC: at 1800 mV +[ 0.173011] print_constraints: VAUX1: at 1800 mV +[ 0.174353] print_constraints: VAUX2: at 3300 mV +[ 0.175681] print_constraints: VAUX33: at 3300 mV +[ 0.177017] print_constraints: VMMC: at 3300 mV +[ 0.177696] tps65910 1-002d: No interrupt support, no core IRQ +[ 0.179324] pca953x 1-0022: interrupt support not compiled in +[ 0.187767] driver_register end ret=0 +[ 0.187776] platform_driver_register end ret=0 +[ 0.188488] Advanced Linux Sound Architecture Driver Version 1.0.24. +[ 0.189403] Switching to clocksource gp timer +[ 0.200656] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host) +[ 0.200668] platform_driver_register start +[ 0.200676] driver_register start +[ 0.200813] musb-hdrc musb-hdrc.0: dma type: dma-cppi41 +[ 0.201071] MUSB0 controller's USBSS revision = 4ea20800 +[ 0.201097] musb0: Enabled SW babble control +[ 0.201811] musb-hdrc musb-hdrc.0: USB OTG mode controller at e083c000 using DMA, IRQ 18 +[ 0.201940] musb-hdrc musb-hdrc.1: dma type: dma-cppi41 +[ 0.202178] MUSB1 controller's USBSS revision = 4ea20800 +[ 0.202200] musb1: Enabled SW babble control +[ 0.202524] musb-hdrc musb-hdrc.1: MUSB HDRC host driver +[ 0.202595] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1 +[ 0.202694] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 +[ 0.202704] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 0.202714] usb usb1: Product: MUSB HDRC host driver +[ 0.202722] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd +[ 0.202729] usb usb1: SerialNumber: musb-hdrc.1 +[ 0.203342] hub 1-0:1.0: USB hub found +[ 0.203368] hub 1-0:1.0: 1 port detected +[ 0.203783] musb-hdrc musb-hdrc.1: USB Host mode controller at e083e800 using DMA, IRQ 19 +[ 0.203987] driver_register end ret=0 +[ 0.203994] platform_driver_register end ret=0 +[ 0.204129] NET: Registered protocol family 2 +[ 0.204280] IP route cache hash table entries: 4096 (order: 2, 16384 bytes) +[ 0.204519] TCP established hash table entries: 16384 (order: 5, 131072 bytes) +[ 0.204734] TCP bind hash table entries: 16384 (order: 4, 65536 bytes) +[ 0.204860] TCP: Hash tables configured (established 16384 bind 16384) +[ 0.204869] TCP reno registered +[ 0.204878] UDP hash table entries: 256 (order: 0, 4096 bytes) +[ 0.204895] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) +[ 0.205041] NET: Registered protocol family 1 +[ 0.205239] RPC: Registered named UNIX socket transport module. +[ 0.205250] RPC: Registered udp transport module. +[ 0.205256] RPC: Registered tcp transport module. +[ 0.205262] RPC: Registered tcp NFSv4.1 backchannel transport module. +[ 0.205455] NetWinder Floating Point Emulator V0.97 (double precision) +[ 0.205467] platform_driver_register start +[ 0.205473] driver_register start +[ 0.205788] driver_register end ret=0 +[ 0.205796] platform_driver_register end ret=0 +[ 0.205837] platform_driver_register start +[ 0.205843] driver_register start +[ 0.206162] driver_register end ret=0 +[ 0.206169] platform_driver_register end ret=0 +[ 0.206176] platform_driver_register start +[ 0.206182] driver_register start +[ 0.206496] driver_register end ret=0 +[ 0.206503] platform_driver_register end ret=0 +[ 0.206509] platform_driver_register start +[ 0.206515] driver_register start +[ 0.206933] driver_register end ret=0 +[ 0.206941] platform_driver_register end ret=0 +[ 0.207264] platform_driver_register start +[ 0.207272] driver_register start +[ 0.207408] driver_register end ret=0 +[ 0.207416] platform_driver_register end ret=0 +[ 0.222228] VFS: Disk quotas dquot_6.5.2 +[ 0.222285] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) +[ 0.222689] msgmni has been set to 1001 +[ 0.225142] alg: No test for stdrng (krng) +[ 0.225678] io scheduler noop registered +[ 0.225689] io scheduler deadline registered +[ 0.225739] io scheduler cfq registered (default) +[ 0.225776] platform_driver_register start +[ 0.225783] driver_register start +[ 0.226009] driver_register end ret=0 +[ 0.226017] platform_driver_register end ret=0 +[ 0.226024] platform_driver_register start +[ 0.226028] driver_register start +[ 0.226161] driver_register end ret=0 +[ 0.226168] platform_driver_register end ret=0 +[ 0.226354] platform_driver_register start +[ 0.226362] driver_register start +[ 0.226479] driver_register end ret=0 +[ 0.226486] platform_driver_register end ret=0 +[ 0.226492] driver_register start +[ 0.226614] driver_register end ret=0 +[ 0.226723] platform_driver_register start +[ 0.226730] driver_register start +[ 0.226844] driver_register end ret=0 +[ 0.226851] platform_driver_register end ret=0 +[ 0.226857] ch7055_init +[ 0.226861] driver_register start +[ 0.259469] ch7055: probe of 1-0076 failed with error -121 +[ 0.259648] driver_register end ret=0 +[ 0.259656] i2c-core: driver [ch7055] using legacy suspend method +[ 0.259663] i2c-core: driver [ch7055] using legacy resume method +[ 0.259987] platform_driver_register start +[ 0.259995] driver_register start +[ 0.260139] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0 +[ 1.379295] console [ttyO0] enabled +[ 1.383533] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1 +[ 1.391306] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2 +[ 1.398993] omap_uart.3: ttyO3 at MMIO 0x481a8000 (irq = 45) is a OMAP UART3 +[ 1.406706] omap_uart.4: ttyO4 at MMIO 0x481aa000 (irq = 46) is a OMAP UART4 +[ 1.414465] driver_register end ret=0 +[ 1.418383] platform_driver_register end ret=0 +[ 1.423433] platform_driver_register start +[ 1.427804] driver_register start +[ 1.431644] omap4_rng omap4_rng: OMAP4 Random Number Generator ver. 2.00 +[ 1.438760] driver_register end ret=0 +[ 1.442692] platform_driver_register end ret=0 +[ 1.454191] brd: module loaded +[ 1.460991] loop: module loaded +[ 1.464281] driver_register start +[ 1.467958] driver_register end ret=0 +[ 1.471899] i2c-core: driver [tsl2550] using legacy suspend method +[ 1.478356] i2c-core: driver [tsl2550] using legacy resume method +[ 1.484735] driver_register start +[ 1.488329] at24 1-0057: 4096 byte 24c32 EEPROM, writable, 64 bytes/write +[ 1.495435] Board name: A33515BB +[ 1.498803] Board version: 1.5A +[ 1.502087] SKU: SKU#01 +[ 1.504638] The board is general purpose EVM with DDR3 in profile 0 +[ 1.511517] d_can.0: alias fck already exists +[ 1.516872] mcasp0_init default +[ 1.520180] am335x_register_mcasp start +[ 1.524245] davinci-mcasp.0: alias fck already exists +[ 1.529835] am335x_register_mcasp end pdev=-551248896 dev_name:davinci-mcasp mcasp0 +[ 1.538138] lcdc_init start +[ 1.541282] _omap_mux_get_by_name: Could not find signal gpmc_ad15.lcd_data16 +[ 1.548748] _omap_mux_get_by_name: Could not find signal gpmc_ad14.lcd_data17 +[ 1.556220] _omap_mux_get_by_name: Could not find signal gpmc_ad13.lcd_data18 +[ 1.563691] _omap_mux_get_by_name: Could not find signal gpmc_ad12.lcd_data19 +[ 1.571161] _omap_mux_get_by_name: Could not find signal gpmc_ad11.lcd_data20 +[ 1.578624] _omap_mux_get_by_name: Could not find signal gpmc_ad10.lcd_data21 +[ 1.586095] _omap_mux_get_by_name: Could not find signal gpmc_ad9.lcd_data22 +[ 1.593474] _omap_mux_get_by_name: Could not find signal gpmc_ad8.lcd_data23 +[ 1.601171] lcdc_init evm_id:5 +[ 1.604498] da8xx_lcdc.0: alias fck already exists +[ 1.609935] da8xx_lcdc da8xx_lcdc.0: GLCD: Found TFC_S9700RTWV35TR_01B panel +[ 1.630402] Console: switching to colour frame buffer device 100x30 +[ 1.647717] lcdc_init end +[ 1.650722] omap_hsmmc.0: alias fck already exists +[ 1.656287] omap_hsmmc.1: alias fck already exists +[ 1.662346] i2c1_init start +[ 1.665317] omap_i2c.2: alias fck already exists +[ 1.670537] omap_i2c omap_i2c.2: bus 2 rev2.4.0 at 100 kHz +[ 1.678985] at24 2-0018: 512 byte 24c04 EEPROM, writable, 1 bytes/write +[ 1.686042] driver_register end ret=0 +[ 1.689980] driver_register start +[ 1.693652] driver_register end ret=0 +[ 1.697570] platform_driver_register start +[ 1.701948] driver_register start +[ 1.705668] driver_register end ret=0 +[ 1.709597] platform_driver_register end ret=0 +[ 1.714446] driver_register start +[ 1.718108] driver_register end ret=0 +[ 1.722861] mtdoops: mtd device (mtddev=name/number) must be supplied +[ 1.729623] driver_register start +[ 1.733330] m25p80 spi1.0: w25q32 (4096 Kbytes) +[ 1.738238] Creating 1 MTD partitions on "spi_flash": +[ 1.743554] 0x000000000000-0x000000400000 : "SPL" +[ 1.749651] driver_register end ret=0 +[ 1.753575] platform_driver_register start +[ 1.757941] driver_register start +[ 1.761692] driver_register end ret=0 +[ 1.765609] platform_driver_register end ret=0 +[ 1.770361] omap2-nand driver initializing +[ 1.774639] platform_driver_register start +[ 1.779004] driver_register start +[ 1.782699] driver_register end ret=0 +[ 1.786620] platform_driver_register end ret=0 +[ 1.791374] OneNAND driver initializing +[ 1.795384] platform_driver_register start +[ 1.799764] driver_register start +[ 1.803440] driver_register end ret=0 +[ 1.807355] platform_driver_register end ret=0 +[ 1.812562] driver_register start +[ 1.816415] driver_register end ret=0 +[ 1.820355] spidev register succeed +[ 1.824012] driver_register start +[ 1.827708] driver_register end ret=0 +[ 1.831638] driver_register start +[ 1.835289] driver_register end ret=0 +[ 1.839206] CAN device driver interface +[ 1.843220] CAN bus driver for Bosch D_CAN controller 1.0 +[ 1.848861] platform_driver_register start +[ 1.853234] driver_register start +[ 1.857415] d_can d_can.0: device registered (irq=52, irq_obj=53) +[ 1.863966] driver_register end ret=0 +[ 1.867884] platform_driver_register end ret=0 +[ 1.872629] platform_driver_register start +[ 1.876996] driver_register start +[ 1.880721] driver_register end ret=0 +[ 1.884637] platform_driver_register end ret=0 +[ 1.889371] platform_driver_register start +[ 1.893748] driver_register start +[ 1.897427] driver_register end ret=0 +[ 1.901357] platform_driver_register end ret=0 +[ 1.906087] platform_driver_register start +[ 1.910459] driver_register start +[ 1.959449] davinci_mdio davinci_mdio.0: davinci mdio revision 1.6 +[ 1.965912] davinci_mdio davinci_mdio.0: detected phy mask ffffff7e +[ 1.973519] davinci_mdio.0: probed +[ 1.977076] davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver RTL8211E Gigabit Ethernet +[ 1.986102] davinci_mdio davinci_mdio.0: phy[7]: device 0:07, driver RTL8211E Gigabit Ethernet +[ 1.995213] driver_register end ret=0 +[ 1.999131] platform_driver_register end ret=0 +[ 2.003875] driver_register start +[ 2.007559] driver_register end ret=0 +[ 2.011501] usbcore: registered new interface driver zd1201 +[ 2.017326] driver_register start +[ 2.021061] driver_register end ret=0 +[ 2.024984] usbcore: registered new interface driver cdc_ether +[ 2.031095] driver_register start +[ 2.034753] driver_register end ret=0 +[ 2.038675] usbcore: registered new interface driver cdc_eem +[ 2.044599] driver_register start +[ 2.048253] driver_register end ret=0 +[ 2.052185] usbcore: registered new interface driver dm9601 +[ 2.058045] cdc_ncm: 04-Aug-2011 +[ 2.061422] driver_register start +[ 2.065083] driver_register end ret=0 +[ 2.069010] usbcore: registered new interface driver cdc_ncm +[ 2.074932] Initializing USB Mass Storage driver... +[ 2.080033] driver_register start +[ 2.083748] driver_register end ret=0 +[ 2.087671] usbcore: registered new interface driver usb-storage +[ 2.093960] USB Mass Storage support registered. +[ 2.099136] mousedev: PS/2 mouse device common for all mice +[ 2.104978] platform_driver_register start +[ 2.109345] driver_register start +[ 2.113062] driver_register end ret=0 +[ 2.116978] platform_driver_register end ret=0 +[ 2.121769] driver_register start +[ 2.125470] driver_register end ret=0 +[ 2.129393] platform_driver_register start +[ 2.133775] driver_register start +[ 2.137476] driver_register end ret=0 +[ 2.141407] platform_driver_register end ret=0 +[ 2.146138] driver_register start +[ 2.149820] driver_register end ret=0 +[ 2.153743] driver_register start +[ 2.161041] rtc-s35390a 1-0030: rtc core: registered rtc-s35390a as rtc0 +[ 2.168187] driver_register end ret=0 +[ 2.172135] i2c /dev entries driver +[ 2.176233] Linux video capture interface: v2.00 +[ 2.181177] driver_register start +[ 2.184878] driver_register end ret=0 +[ 2.188804] usbcore: registered new interface driver uvcvideo +[ 2.194820] USB Video Class driver (1.1.1) +[ 2.199096] driver_register start +[ 2.202773] driver_register end ret=0 +[ 2.499436] driver_register start +[ 2.609745] driver_register end ret=0 +[ 2.615552] cpuidle: using governor ladder +[ 2.620257] cpuidle: using governor menu +[ 2.624359] driver_register start +[ 2.628016] driver_register end ret=0 +[ 2.631949] platform_driver_register start +[ 2.636315] driver_register start +[ 2.642978] driver_register end ret=0 +[ 2.646905] platform_driver_register end ret=0 +[ 2.651662] platform_driver_register start +[ 2.656028] driver_register start +[ 2.660004] driver_register end ret=0 +[ 2.663919] platform_driver_register end ret=0 +[ 2.668656] omap4_aes_mod_init: loading AM33X AES driver +[ 2.674219] platform_driver_register start +[ 2.678585] driver_register start +[ 2.682227] omap4-aes omap4-aes: AM33X AES hw accel rev: 3.02 +[ 2.688768] omap4_aes_probe: probe() done +[ 2.694192] driver_register end ret=0 +[ 2.698115] platform_driver_register end ret=0 +[ 2.702863] omap4_sham_mod_init: loading AM33X SHA/MD5 driver +[ 2.708866] platform_driver_register start +[ 2.713239] driver_register start +[ 2.716892] omap4-sham omap4-sham: AM33X SHA/MD5 hw accel rev: 4.03 +[ 2.729785] omap4_sham_probe: probe() done +[ 2.735378] driver_register end ret=0 +[ 2.739295] platform_driver_register end ret=0 +[ 2.744208] driver_register start +[ 2.747908] driver_register end ret=0 +[ 2.751850] driver_register start +[ 2.755759] driver_register end ret=0 +[ 2.759694] driver_register start +[ 2.763351] driver_register end ret=0 +[ 2.767270] driver_register start +[ 2.770953] driver_register end ret=0 +[ 2.774905] driver_register start +[ 2.778561] driver_register end ret=0 +[ 2.782523] driver_register start +[ 2.787180] driver_register end ret=0 +[ 2.791114] driver_register start +[ 2.796767] driver_register end ret=0 +[ 2.800729] driver_register start +[ 2.804385] driver_register end ret=0 +[ 2.808335] driver_register start +[ 2.811996] driver_register end ret=0 +[ 2.815949] driver_register start +[ 2.819657] driver_register end ret=0 +[ 2.823611] driver_register start +[ 2.827265] driver_register end ret=0 +[ 2.831231] driver_register start +[ 2.834921] driver_register end ret=0 +[ 2.838874] driver_register start +[ 2.842563] driver_register end ret=0 +[ 2.846515] driver_register start +[ 2.850210] driver_register end ret=0 +[ 2.854170] usbcore: registered new interface driver usbhid +[ 2.860003] usbhid: USB HID core driver +[ 2.864008] platform_driver_register start +[ 2.868374] driver_register start +[ 2.872102] driver_register end ret=0 +[ 2.876050] platform_driver_register end ret=0 +[ 2.881070] driver_register start +[ 2.884820] driver_register end ret=0 +[ 2.888753] usbcore: registered new interface driver snd-usb-audio +[ 2.895520] platform_driver_register start +[ 2.899918] driver_register start +[ 2.904718] driver_register end ret=0 +[ 2.908641] platform_driver_register end ret=0 +[ 2.913389] platform_driver_register start +[ 2.917756] driver_register start +[ 2.923456] driver_register end ret=0 +[ 2.927385] platform_driver_register end ret=0 +[ 2.932143] driver_register start +[ 2.935939] driver_register end ret=0 +[ 2.939891] platform_driver_register start +[ 2.944263] driver_register start +[ 2.948002] driver_register end ret=0 +[ 2.951934] platform_driver_register end ret=0 +[ 2.956668] davinci_i2s_init start +[ 2.960314] platform_driver_register start +[ 2.964680] driver_register start +[ 2.968364] driver_register end ret=0 +[ 2.972304] platform_driver_register end ret=0 +[ 2.977044] davinci_i2s_init end ret=0 +[ 2.981064] davinci_mcasp_init start +[ 2.984892] platform_driver_register start +[ 2.989265] driver_register start +[ 2.992864] davinci_mcasp_probe start +[ 2.996751] davinci_mcasp_probe channel=8 +[ 3.001233] davinci_mcasp_probe channel=9 +[ 3.005541] davinci_mcasp_probe end +[ 3.009415] driver_register end ret=0 +[ 3.013357] platform_driver_register end ret=0 +[ 3.018514] _regulator_get: 1-001b supply IOVDD not found, using dummy regulator +[ 3.026325] _regulator_get: 1-001b supply DVDD not found, using dummy regulator +[ 3.034001] _regulator_get: 1-001b supply AVDD not found, using dummy regulator +[ 3.041688] _regulator_get: 1-001b supply DRVDD not found, using dummy regulator +[ 3.051622] asoc: tlv320aic3x-hifi <-> davinci-mcasp.0 mapping ok +[ 3.059058] ALSA device list: +[ 3.062196] #0: AM335X EVM +[ 3.065205] oprofile: hardware counters not available +[ 3.070489] oprofile: using timer interrupt. +[ 3.074963] pktgen: Packet Generator for packet performance testing. Version: 2.74 +[ 3.083015] nf_conntrack version 0.5.0 (8011 buckets, 32044 max) +[ 3.089753] ip_tables: (C) 2000-2006 Netfilter Core Team +[ 3.095404] TCP cubic registered +[ 3.098778] NET: Registered protocol family 17 +[ 3.103450] can: controller area network core (rev 20090105 abi 8) +[ 3.109985] NET: Registered protocol family 29 +[ 3.114642] can: raw protocol (rev 20090105) +[ 3.119101] can: broadcast manager protocol (rev 20090105 t) +[ 3.125059] Registering the dns_resolver key type +[ 3.130039] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3 +[ 3.138055] ThumbEE CPU extension supported. +[ 3.142581] mux: Failed to setup hwmod io irq -22 +[ 3.148027] Power Management for AM33XX family +[ 3.152868] Trying to load am335x-pm-firmware.bin (60 secs timeout) +[ 3.159555] Copied the M3 firmware to UMEM +[ 3.163909] Cortex M3 Firmware Version = 0x181 +[ 3.187606] clock: disabling unused clocks to save power +[ 3.198058] mmc1: new high speed MMC card at address 0001 +[ 3.204290] mmcblk0: mmc1:0001 4FPD3R 3.64 GiB +[ 3.209249] mmcblk0boot0: mmc1:0001 4FPD3R partition 1 4.00 MiB +[ 3.215731] mmcblk0boot1: mmc1:0001 4FPD3R partition 2 4.00 MiB +[ 3.223233] mmcblk0: p1 p2 +[ 3.228013] mmcblk0boot1: unknown partition table +[ 3.234680] mmcblk0boot0: unknown partition table +[ 3.243558] platform_driver_register start +[ 3.247943] driver_register start +[ 3.251677] Detected MACID=c4:0:ad:15:e9:54 +[ 3.257078] driver_register end ret=0 +[ 3.261032] platform_driver_register end ret=0 +[ 3.265769] platform_driver_register start +[ 3.270143] driver_register start +[ 3.274920] input: gpio-keys as /devices/platform/gpio-keys/input/input0 +[ 3.282414] driver_register end ret=0 +[ 3.286332] platform_driver_register end ret=0 +[ 3.291954] rtc-s35390a 1-0030: setting system clock to 2000-01-01 00:07:32 UTC (946685252) +[ 3.303569] kjournald starting. Commit interval 5 seconds +[ 3.310001] EXT3-fs (mmcblk0p2): using internal journal +[ 3.315470] EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode +[ 3.322710] VFS: Mounted root (ext3 filesystem) on device 179:2. +[ 3.329610] Freeing init memory: 604K +[ 6.540671] net eth0: CPSW phy found : id is : 0x1cc915 +[ 6.546937] net eth0: CPSW phy found : id is : 0x1cc915 +[ 8.540311] PHY: 0:07 - Link is Up - 0/Half +[ 8.545560] PHY: 0:07 - Link is Down +[ 15.935940] Disabling lock debugging due to kernel taint +[ 15.942184] driver_register start +[ 15.945786] driver_register end ret=0 +[ 16.563015] serio: Serial port ttyO4 +[ 16.567165] input: Touchright Serial TouchScreen as /devices/platform/omap/omap_uart.4/tty/ttyO4/serio0/input/input1 +[ 17.924970] gadget: Mass Storage Function, version: 2009/09/11 +[ 17.931255] gadget: Number of LUNs=1 +[ 17.935087] lun0: LUN: removable file: /dev/mmcblk0p1 +[ 17.940494] gadget: Mass Storage Gadget, version: 2009/09/11 +[ 17.946503] gadget: userspace failed to provide iSerialNumber +[ 17.952624] gadget: g_mass_storage ready +[ 17.956825] musb-hdrc musb-hdrc.0: MUSB HDRC host driver +[ 17.962432] musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 2 +[ 17.970265] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 +[ 17.977361] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 +[ 17.984921] usb usb2: Product: MUSB HDRC host driver +[ 17.990117] usb usb2: Manufacturer: Linux 3.2.0 musb-hcd +[ 17.995668] usb usb2: SerialNumber: musb-hdrc.0 +[ 18.000845] hub 2-0:1.0: USB hub found +[ 18.004774] hub 2-0:1.0: 1 port detected +[ 18.008913] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 18.161360] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 20.159506] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 20.311934] ti81xx_interrupt 1151: VBUS error workaround (delay coming) + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org am335x-adv ttyO0 + +Arago 2013.05 am335x-adv ttyO0 + + + + + + +root@am335x-adv:~# reboot + +Broadcast message from root@am335x-adv (ttyO0) (Sat Jan 1 00:09:42 2000): +The system is going down for reboot NOW! +INIT: Sending processes the TERM signal +root@am335x-adv:~# [ 134.109493] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 134.261927] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 136.259484] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 136.411913] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 138.409506] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 138.561934] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +INIT: Stopping Dropbear SSH server: stopped /usr/sbin/dropbear (pid 1447) +dropbear. +Stopping telnet daemon. +Stopping system message bus: Stopping network benchmark server: netserverstopped /usr/sbin/netserver (pid 1467) +. +Stopping syslogd/klogd: stopped syslogd (pid 1474) +stopped klogd (pid 1475) +done +Stopping thttpd. +ALSA: Storing mixer settings... +Deconfiguring network interfaces... ifdown: interface eth0 not configured +done. +Stopping PVR +[ 140.559519] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +Error: Module bufferclass_ti is not currently loaded +Stopping Lighttpd Web Server: stopped /usr/sbin/lighttpd (pid 1510) +lighttpd. +[ 140.711957] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +##Stopping Appmonitor + 1581 root 56016 S /miniapp/Appmonitor -qws +[ 141.039413] Unable to handle kernel NULL pointer dereference at virtual address 0000000c +[ 141.047884] pgd = de13c000 +[ 141.050707] [0000000c] *pgd=9e0db831, *pte=00000000, *ppte=00000000 +[ 141.057271] Internal error: Oops: 17 [#1] +[ 141.061457] Modules linked in: g_mass_storage(-) wl12xx_sdio(O) +[ 141.067658] CPU: 0 Tainted: G O (3.2.0 #240) +[ 141.073411] PC is at composite_disconnect+0x20/0x58 [g_mass_storage] +[ 141.080055] LR is at composite_disconnect+0x14/0x58 [g_mass_storage] +[ 141.086697] pc : [] lr : [] psr: a00f0093 +[ 141.086701] sp : de153e60 ip : de153e60 fp : de153e74 +[ 141.098699] r10: 600f0013 r9 : df11a0e8 r8 : 00000000 +[ 141.104156] r7 : 00000080 r6 : c06a38e8 r5 : 00000000 r4 : a00f0093 +[ 141.110977] r3 : bf004c6c r2 : 00001108 r1 : 00000000 r0 : 00000000 +[ 141.117800] Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user +[ 141.125348] Control: 10c5387d Table: 9e13c019 DAC: 00000015 +[ 141.131351] Process rmmod (pid: 1827, stack limit = 0xde1522f0) +[ 141.137537] Stack: (0xde153e60 to 0xde154000) +[ 141.142091] 3e60: df11a0e8 e083c400 de153e94 de153e78 c02a8ea8 bf004c78 df11a0e8 e083c400 +[ 141.150642] 3e80: df11b1e0 00000800 de153eb4 de153e98 c02a3eb0 c02a8e14 df11a120 c068b8c0 +[ 141.159193] 3ea0: df11b1e0 00000800 de153eec de153eb8 c02a807c c02a3e58 de42c324 bf00bb74 +[ 141.167743] 3ec0: de153eec df116e00 c068b8c0 de152000 00000800 00000000 de152000 00000013 +[ 141.176293] 3ee0: de153f04 de153ef0 c02b4f78 c02a7e80 bf00bb74 00000000 de153f1c de153f08 +[ 141.184844] 3f00: c02b5024 c02b4eec bf00c130 00000000 de153f2c de153f20 bf0077fc c02b4fc8 +[ 141.193394] 3f20: de153f3c de153f30 bf00a8b0 bf0077e4 de153fa4 de153f40 c006a3d4 bf00a884 +[ 141.201945] 3f40: de0cc540 616d5f67 735f7373 61726f74 de006567 00000000 de153f84 de153f68 +[ 141.210495] 3f60: c00a3ab4 c00a6ac8 00000004 0000000f de0cb400 00000000 de153fa4 00153f88 +[ 141.219045] 3f80: 00021cf8 00000800 00021cf8 00000081 c00148e8 00000000 00000000 de153fa8 +[ 141.227596] 3fa0: c0014740 c006a250 00021cf8 00000800 00021d28 00000800 a0a00000 a0a00000 +[ 141.236146] 3fc0: 00021cf8 00000800 00021cf8 00000081 00000001 bebe8bf8 bebe8e08 00021008 +[ 141.244697] 3fe0: 44baf490 bebe8bb4 4011aa00 44baf49c 80000010 00021d28 00000000 00000000 +[ 141.253242] Backtrace: +[ 141.255823] [] (composite_disconnect+0x0/0x58 [g_mass_storage]) from [] (musb_g_disconnect+0xa0/0x1a8) +[ 141.267368] r5:e083c400 r4:df11a0e8 +[ 141.271113] [] (musb_g_disconnect+0x0/0x1a8) from [] (musb_hnp_stop+0x64/0x16c) +[ 141.280567] r7:00000800 r6:df11b1e0 r5:e083c400 r4:df11a0e8 +[ 141.286500] [] (musb_hnp_stop+0x0/0x16c) from [] (musb_gadget_stop+0x208/0x250) +[ 141.295954] r7:00000800 r6:df11b1e0 r5:c068b8c0 r4:df11a120 +[ 141.301890] [] (musb_gadget_stop+0x0/0x250) from [] (usb_gadget_remove_driver+0x98/0xdc) +[ 141.312168] [] (usb_gadget_remove_driver+0x0/0xdc) from [] (usb_gadget_unregister_driver+0x68/0x8c) +[ 141.323439] r4:00000000 r3:bf00bb74 +[ 141.327191] [] (usb_gadget_unregister_driver+0x0/0x8c) from [] (usb_composite_unregister+0x24/0x30 [g_mass_storage]) +[ 141.340006] r5:00000000 r4:bf00c130 +[ 141.343762] [] (usb_composite_unregister+0x0/0x30 [g_mass_storage]) from [] (msg_cleanup+0x38/0x44 [g_mass_storage]) +[ 141.356593] [] (msg_cleanup+0x0/0x44 [g_mass_storage]) from [] (sys_delete_module+0x190/0x28c) +[ 141.367428] [] (sys_delete_module+0x0/0x28c) from [] (ret_fast_syscall+0x0/0x30) +[ 141.376978] Code: eb486bc0 e1a05000 e10f4000 f10c0080 (e590300c) +[ 141.383569] ---[ end trace 43edd5b046bf7385 ]--- +/etc/rc6.d/K98storage-gadget-init: line 4: 1827 Segmentation fault rmmod g_mass_storage +*************************************************************** +*************************************************************** +NOTICE: This file system contains the followin GPLv3 packages: + binutils-symlinks + binutils + gdbserver + +If you do not wish to distribute GPLv3 components please remove +the above packages prior to distribution. This can be done using +the opkg remove command. i.e.: + opkg remove +Where is the name printed in the list above + +NOTE: If the package is a dependency of another package you + will be notified of the dependent packages. You should + use the --force-removal-of-dependent-packages option to + also remove the dependent packages as well +*************************************************************** +*************************************************************** +Sending all processes the TERM signal... +Error VT_WAITACTIVE failed +: Interrupted system call +[ 142.709455] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 142.861863] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 144.859438] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 145.011861] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +Sending all processes the KILL signal... +Unmounting remote filesystems... +Deactivating swap... +Unmounting local filesystems... +Rebooting... [ 147.009458] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 147.161863] ti81xx_interrupt 1151: VBUS error workaround (delay coming) +[ 148.759491] musb-hdrc musb-hdrc.1: remove, state 1 +[ 148.764532] usb usb1: USB disconnect, device number 1 +[ 148.770305] musb-hdrc musb-hdrc.1: USB bus 1 deregistered +[ 148.776162] Restarting system. +[ 148.779359] ## arch_reset ## +[ 148.782368] ##### lvds uninit #### +[ 148.789597] ## platform backlight release + +HI I added the log file in last post , I tried to set " bootargs = console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait ip=none mac_addr=C4:00:AD:15:E9:54 video_mode=TFC_S9700RTWV35TR_01B " in u-boot environment , it only close the close kernel message when the system booting process. It did not disable and improve the situation " shutdown log message still cover a part of logo" . so if anyone have solution ,please let me know how to disable bootup and shutdown message. Thank you . + +Phil, It seems you are still seeing the systemd output on the console. This may help: You can turn off ForwardToConsole= in journald.conf. In general, systemd in our filesystem will follow open source and any resources you find that deal with systemd logging and handling it by application or process should apply. Thanks. + +HI RonB, we did not find "systemd" and ForwardToConsole message , our sdk version is 06.00.00.00 , kernel version is linux3.2.0 , so I think that this version did not support systemd . if you have any suggestion , please let me know .thanks . + +HI RonB , Did you have any suggestion to us ? Thanks . + +HI RonB , I added two videos as below , you will see some black bar chart on the screen , we guessed that those block bar chart resembled log or message . please let me know what did you think this situation ? it is message , log , or some thing else. thanks . video : https://drive.google.com/file/d/1YO3A-xh0x3N1N_JrG8TTskunQTx5-2Gh/view?usp=sharing https://drive.google.com/file/d/1wSBFfOAMz83iX_IDchcBL2KlQTPsDB8B/view?usp=sharing + +Phil, I'm sorry I can't access Google Drive. Could you attach a couple of pictures directly to a post? Thanks. + +HI RonB , we verified two situation when we enable / disable the console, and we got two different result When we disable console (did not print the message ) , then execute "reboot " , the shutdown logo was covered black block , but boot up logo is normal When we enable the console , then execute "reboot " , the screen appeared bar chart ,resemble Mosaics, although the shutdown logo was not covered wiht black block , the boot up logo was covered with black block , the boot up message as below , [ 3.250235] driver_register start [ 3.255011] input: gpio-keys as /devices/platform/gpio-keys/input/input0 [ 3.262513] driver_register end ret=0 [ 3.266432] platform_driver_register end ret=0 [ 3.272051] rtc-s35390a 1-0030: setting system clock to 2000-01-01 00:00:01 UTC (946684801) [ 3.283983] kjournald starting. Commit interval 5 seconds [ 3.295003] EXT3-fs (mmcblk0p2): using internal journal [ 3.300479] EXT3-fs (mmcblk0p2): recovery complete [ 3.305490] EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode [ 3.312722] VFS: Mounted root (ext3 filesystem) on device 179:2. [ 3.319627] Freeing init memory: 604K [ 6.540078] net eth0: CPSW phy found : id is : 0x1cc915 [ 6.546326] net eth0: CPSW phy found : id is : 0x1cc915 [ 8.540286] PHY: 0:07 - Link is Up - 0/Half [ 8.545533] PHY: 0:07 - Link is Down [ 15.935096] Disabling lock debugging due to kernel taint [ 15.941345] driver_register start [ 15.944942] driver_register end ret=0 [ 16.561612] serio: Serial port ttyO4 <---- In this section ,it could happen that the boot up logo was covered with black block [ 16.565762] input: Touchright Serial TouchScreen as /devices/platform/omap/omap_uart.4/tty/ttyO4/serio0/input/input1 [ 17.987407] gadget: Mass Storage Function, version: 2009/09/11 [ 17.993690] gadget: Number of LUNs=1 [ 17.997525] lun0: LUN: removable file: /dev/mmcblk0p1 [ 18.002930] gadget: Mass Storage Gadget, version: 2009/09/11 [ 18.008942] gadget: userspace failed to provide iSerialNumber [ 18.015067] gadget: g_mass_storage ready [ 18.019270] musb-hdrc musb-hdrc.0: MUSB HDRC host driver [ 18.024885] musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 2 [ 18.032717] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 [ 18.039836] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 18.047386] usb usb2: Product: MUSB HDRC host driver [ 18.052579] usb usb2: Manufacturer: Linux 3.2.0 musb-hcd [ 18.058128] usb usb2: SerialNumber: musb-hdrc.0 [ 18.063320] hub 2-0:1.0: USB hub found [ 18.067255] hub 2-0:1.0: 1 port detected [ 18.071414] ti81xx_interrupt 1151: VBUS error workaround (delay coming) [ 18.223859] ti81xx_interrupt 1151: VBUS error workaround (delay coming) [ 20.219496] ti81xx_interrupt 1151: VBUS error workaround (delay coming) [ 20.371947] ti81xx_interrupt 1151: VBUS error workaround (delay coming) + +HI RonB , Did you have any update for this issue ? thanks . + +Phil, Kernel version 3.2 and AMSDK 6.0 or very old and no longer actively supported. This SDK used sysvinit instead of systemD. It looks to me like there are some sysvinit shutdown scripts that are still trying to print output. You may need to go through those scripts to disable their output. Have you tried setting your console to /dev/null in U-Boot to see what affect that has? I hope this is helpful. + diff --git a/data2/text/range/30001+/931283.txt b/data2/text/range/30001+/931283.txt new file mode 100644 index 0000000000000000000000000000000000000000..790e45388fd9dfbab6609cad54353bdb68c478f8 --- /dev/null +++ b/data2/text/range/30001+/931283.txt @@ -0,0 +1,792 @@ +Ticket Name: TDA2SX: EVE Soft Isp 16 + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 I'm writing some EVE software using the soft_isp16 app as a basis of the project. I'm attempting to string together several kernels and I'm running into an issue of working with the g_stride and ROI offsets not matching the rb_stride when I attempt to pass that data to another kernel. Is there a simple fix for dealing with this issue within the core or do I need to write the output to external memory and then bring it back in? All I'm trying to do at the moment is tie the raw2rgb -> rgb2yuv (UYVY) -> UYVY_to_nv12 and I have the operation working well (at least in the simulator) but the green channel stride and offset is causing significant issues in my image output. Using the sample image, the Red and Blue planes have an output stride of 1280 as expected but the Green plane is output with an offset and a stride of 1283. Given the RGB2YUV kernel isn't aware of the offset or the stride issue that is being output by the raw2rgb kernel and I am unable to figure out how to account for it, I am having a hard time proceeding. Ultimately, I'd like to use a number of the image quality enhancers as well (white balance, gamma correct, sharpening, contract enhancement, etc) so I will be adding some extra kernels in but this particular issue seems to be the hardest to overcome. Thanks, Joe + +Responses: +Hi Joe, We need to look into this and will get back to you in sometime. Regards, Anshu + +Hi Anshu, Any update on this issue? Thanks, Joe + +Hi Joe, Sorry for delay in response. Can you point to exact software/kernel which you are referring here? Regards, Anshu + +Hi Anshu, I created a working version of the ISP using the Bayer2RGB kernel but I would prefer to convert the system to using the raw2rgb kernel instead so I could take advantage of EA demosaicing. The sample application is listed in the title--soft_isp16 and is described in the applets userguide as "Software Image Signal processor (Soft ISP) for Bayer sensor". As described in the applets user guide, the bayer2rgb kernel has both a ROI offset as well as a green stride that differs from the R&B strides making it (seemingly) incompatible with downstream kernels without first writing out the data to external memory--obviously an issue for the TDA2 which has some memory bandwidth shortfalls. Here is my current kernel DB: /** * Kernel Database - used for graph execution */ static BAM_KernelExecFuncDBdef bamKernelExecFuncDB[] = { { &gBAM_TI_dmaAutoIncrementReadKernel, &gBAM_TI_dmaReadAutoIncrementKernelExecFunc, "ti_dma_read_autoincrement", BAM_TI_KERNELID_DMAREAD_AUTOINCREMENT}, { &gBAM_TI_bayer2rgbKernel, &gBAM_TI_bayer2rgbExecFunc, "ti_image_bayer2rgb", BAM_TI_KERNELID_CFA_INTERPOLATION}, #if UYVY_INC_KERNEL { &gBAM_TI_rgb2yuvKernel, &gBAM_TI_rgb2yuvExecFunc, "ti_image_rgb2yuv", BAM_TI_KERNELID_RGB_TO_YUV}, #if NV12_INC_KERNEL { &gBAM_TI_yuv422uyvy_to_420nv12Kernel, &gBAM_TI_yuv422uyvy_to_420nv12ExecFunc, "ti_image_uyvy_to_nv12", BAM_TI_KERNELID_UYVY_TO_NV12}, #endif #endif { &gBAM_TI_dmaAutoIncrementWriteKernel, &gBAM_TI_dmaWriteAutoIncrementKernelExecFunc, "ti_dma_write_autoincrement", BAM_TI_KERNELID_DMAWRITE_AUTOINCREMENT}, }; soft_isp16_graph.c /* +* +* Copyright (c) 2009-2017 Texas Instruments Incorporated +* +* All rights reserved not granted herein. +* +* Limited License. +* +* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive +* license under copyrights and patents it now or hereafter owns or controls to make, +* have made, use, import, offer to sell and sell ("Utilize") this software subject to the +* terms herein. With respect to the foregoing patent license, such license is granted +* solely to the extent that any such patent is necessary to Utilize the software alone. +* The patent license shall not apply to any combinations which include this software, +* other than combinations with devices manufactured by or for TI ("TI Devices"). +* No hardware patent is licensed hereunder. +* +* Redistributions must preserve existing copyright notices and reproduce this license +* (including the above copyright notice and the disclaimer and (if applicable) source +* code license limitations below) in the documentation and/or other materials provided +* with the distribution +* +* Redistribution and use in binary form, without modification, are permitted provided +* that the following conditions are met: +* +* * No reverse engineering, decompilation, or disassembly of this software is +* permitted with respect to any software provided in binary form. +* +* * any redistribution and use are licensed by TI for use only with TI Devices. +* +* * Nothing shall obligate TI to provide you with source code for the software +* licensed and provided to you in object code. +* +* If software source code is provided to you, modification and redistribution of the +* source code are permitted provided that the following conditions are met: +* +* * any redistribution and use of the source code, including any resulting derivative +* works, are licensed by TI for use only with TI Devices. +* +* * any redistribution and use of any object code compiled from the source code +* and any resulting derivative works, are licensed by TI for use only with TI Devices. +* +* Neither the name of Texas Instruments Incorporated nor the names of its suppliers +* +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* DISCLAIMER. +* +* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS +* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED +* OF THE POSSIBILITY OF SUCH DAMAGE. +* +*/ + + +/** @file softIsp16_graph.c + * + * @brief This file implements an applet for channel generation + * + * @author TI + * + * @date 19 Dec 2013 + * + * Description + * This file contains code to perform channel generation + * Contains implementation of SOFT_ISP16_TI_graphCreate() and SOFT_ISP16_TI_TI_execute() + * at the frame level. + */ +#pragma CHECK_MISRA ("none") +#include +#include +#include +#include +#pragma RESET_MISRA ("required") + +#include "soft_isp16_graph_int.h" + +//raw2rgb kernels +//#include "bam_raw2rgb16.h" +//#include "bam_natcRaw2rgb16.h" + +#include "edma_utils.h" + +#include "isoft_isp16_ti.h" + +static void assignDMAautoIncrementParams( + EDMA_UTILS_autoIncrement_transferProperties * param, + uint16_t roiWidth, + uint16_t roiHeight, + uint16_t blkWidth, + uint16_t blkHeight, + uint16_t extBlkIncrementX, + uint16_t extBlkIncrementY, + uint16_t intBlkIncrementX, + uint16_t intBlkIncrementY, + uint32_t roiOffset, + uint16_t blkOffset, + uint8_t *extMemPtr, + uint16_t extMemPtrStride, + uint8_t *interMemPtr, + uint16_t interMemPtrStride, + uint8_t dmaQueNo +); + +#define FIND_BEST_BLOCKDIM + +#ifndef NULL +#define NULL (void *)0 +#endif + +/** + * Kernel Database - used for graph construction + */ +static BAM_KernelHostDBdef bamKernelHostDB[] = +{ + { &gBAM_TI_dmaAutoIncrementReadKernel, &gBAM_TI_dmaReadAutoIncrementKernelHelperFunc, + "ti_dma_read_autoincrement", BAM_TI_KERNELID_DMAREAD_AUTOINCREMENT}, + + { &gBAM_TI_bayer2rgbKernel, &gBAM_TI_bayer2rgbHelperFunc, + "ti_image_bayer2rgb", BAM_TI_KERNELID_CFA_INTERPOLATION}, + +#if UYVY_INC_KERNEL + { &gBAM_TI_rgb2yuvKernel, &gBAM_TI_rgb2yuvHelperFunc, + "ti_image_rgb2yuv", BAM_TI_KERNELID_RGB_TO_YUV}, + +#if NV12_INC_KERNEL + { &gBAM_TI_yuv422uyvy_to_420nv12Kernel, &gBAM_TI_yuv422uyvy_to_420nv12HelperFunc, + "ti_image_uyvy_to_nv12", BAM_TI_KERNELID_UYVY_TO_NV12}, +#endif +#endif + + { &gBAM_TI_dmaAutoIncrementWriteKernel, &gBAM_TI_dmaWriteAutoIncrementKernelHelperFunc, + "ti_dma_write_autoincrement", BAM_TI_KERNELID_DMAWRITE_AUTOINCREMENT}, +}; + +/** + * Kernel Database - used for graph execution + */ +static BAM_KernelExecFuncDBdef bamKernelExecFuncDB[] = +{ + { &gBAM_TI_dmaAutoIncrementReadKernel, &gBAM_TI_dmaReadAutoIncrementKernelExecFunc, + "ti_dma_read_autoincrement", BAM_TI_KERNELID_DMAREAD_AUTOINCREMENT}, + + { &gBAM_TI_bayer2rgbKernel, &gBAM_TI_bayer2rgbExecFunc, + "ti_image_bayer2rgb", BAM_TI_KERNELID_CFA_INTERPOLATION}, +#if UYVY_INC_KERNEL + { &gBAM_TI_rgb2yuvKernel, &gBAM_TI_rgb2yuvExecFunc, + "ti_image_rgb2yuv", BAM_TI_KERNELID_RGB_TO_YUV}, + +#if NV12_INC_KERNEL + { &gBAM_TI_yuv422uyvy_to_420nv12Kernel, &gBAM_TI_yuv422uyvy_to_420nv12ExecFunc, + "ti_image_uyvy_to_nv12", BAM_TI_KERNELID_UYVY_TO_NV12}, +#endif +#endif + + { &gBAM_TI_dmaAutoIncrementWriteKernel, &gBAM_TI_dmaWriteAutoIncrementKernelExecFunc, + "ti_dma_write_autoincrement", BAM_TI_KERNELID_DMAWRITE_AUTOINCREMENT}, +}; + +/* CHECK_MISRA("-8.7") -> Disable rule 8.8 */ +/* Name visibility is too wide */ +/* Deviation is allowed because we use static keyword to make it local to the file */ +static BAM_KernelDBdef gSOFT_ISP16_TI_BAM_kernelDBdef = +{ + sizeof(bamKernelExecFuncDB) / sizeof(bamKernelExecFuncDB[0]), + bamKernelHostDB, + bamKernelExecFuncDB +}; +/*RESET_MISRA("8.7") -> Reset rule 8.7 for GOTO */ + +static int32_t SOFT_ISP16_TI_initArgs(void *initKernelsArgs, BAM_BlockDimParams *blockDimParams); + +typedef enum { + SOURCE_NODE = 0, + CFA_INTERPOLATION_NODE, +#if UYVY_INC_KERNEL + CSC_NODE, +#if NV12_INC_KERNEL + NV12_NODE, +#endif +#endif + SINK_NODE +}nodeList; + +//#define SOURCE_NODE 0U +//#define CFA_INTERPOLATION_NODE (SOURCE_NODE + 1U) +//#define CSC_NODE (CFA_INTERPOLATION_NODE + 1U) +//#define NV12_NODE (CSC_NODE + 1) +//#define SINK_NODE (NV12_NODE + 1U) + +int32_t SOFT_ISP16_TI_getGraphMemReq(BAM_GraphMemReq * memReq) +{ + memReq->graphObjSize = SOFT_ISP16_GRAPH_OBJ_SIZE ; + memReq->graphScratchSize = SOFT_ISP16_GRAPH_SCRATCH_SIZE ; + memReq->graphcontextSize = SOFT_ISP16_GRAPH_CONTEXT_SIZE ; + memReq->graphArgsSize = sizeof(SOFT_ISP16_TI_graphArgs) ; + return 0; +} + + + +int32_t SOFT_ISP16_TI_graphCreate( + const BAM_GraphMem *graphMem, + SOFT_ISP16_TI_graphCreateParams * createParams) +{ + BAM_CreateGraphParams graphCreateParams; + int32_t status = BAM_S_SUCCESS; + + /* initilize the sub-handles inside the main handle */ + SOFT_ISP16_TI_graphArgs * graphArgs = (SOFT_ISP16_TI_graphArgs *)graphMem->graphArgs; + BAM_GraphHandle graphHandle = (BAM_GraphHandle)graphMem->graphObj; + /*------------------------------------------------------------------------------*/ + /* Create NODELIST and EDGE LIST. It should be derived from the algorithm graph */ + /*------------------------------------------------------------------------------*/ + + BAM_NodeParams NODELIST[]={\ + {SOURCE_NODE, BAM_TI_KERNELID_DMAREAD_AUTOINCREMENT , NULL}, + {CFA_INTERPOLATION_NODE, BAM_TI_KERNELID_CFA_INTERPOLATION, NULL}, +#if UYVY_INC_KERNEL + {CSC_NODE, BAM_TI_KERNELID_RGB_TO_YUV, NULL }, +#if NV12_INC_KERNEL + {NV12_NODE, BAM_TI_KERNELID_UYVY_TO_NV12, NULL }, +#endif +#endif + {SINK_NODE, BAM_TI_KERNELID_DMAWRITE_AUTOINCREMENT, NULL}, + {BAM_END_NODE_MARKER, 0, NULL},\ + }; + + BAM_EdgeParams EDGELIST[]= { + {{SOURCE_NODE, BAM_SOURCE_NODE_PORT1}, {CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_INPUT_PORT}}, +#if (!UYVY_INC_KERNEL) //RGB only so go straight to sink + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_R}, {SINK_NODE, BAM_SINK_NODE_PORT1 }}, + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_G}, {SINK_NODE, BAM_SINK_NODE_PORT2 }}, + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_B}, {SINK_NODE, BAM_SINK_NODE_PORT3 }}, +#else //UYVY is included so output the CFA kernel to UYVY + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_R}, {CSC_NODE, BAM_IMAGE_RGB2YUV_INPUT_PORT_R }}, + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_G}, {CSC_NODE, BAM_IMAGE_RGB2YUV_INPUT_PORT_G }}, + {{CFA_INTERPOLATION_NODE, BAM_IMAGE_BAYER2RGB_OUTPUT_PORT_B}, {CSC_NODE, BAM_IMAGE_RGB2YUV_INPUT_PORT_B }}, +#if NV12_INC_KERNEL //if outputting as NV12, pass the CSC node to the NV12 node and the NV12 node passes to sink + {{CSC_NODE, BAM_IMAGE_RGB2YUV_OUTPUT_PORT_YUV}, {NV12_NODE, BAM_YUV_422UYVY_TO_420NV12_INPUT_PORT_IMG }}, + {{NV12_NODE, BAM_YUV_422UYVY_TO_420NV12_OUTPUT_PORT}, {SINK_NODE, BAM_SINK_NODE_PORT1 }}, + {{NV12_NODE, BAM_YUV_422UYVY_TO_420NV12_OUTPUT_PORT}, {SINK_NODE, BAM_SINK_NODE_PORT2 }}, +#else //otherwise, pass the UYVY kernel to sink + {{CSC_NODE, BAM_IMAGE_RGB2YUV_OUTPUT_PORT_YUV}, { SINK_NODE, BAM_SINK_NODE_PORT1 }}, +#endif +#endif + {{BAM_END_NODE_MARKER, 0}, {BAM_END_NODE_MARKER, 0}}, + }; + + NODELIST[SOURCE_NODE].kernelArgs= &graphArgs->dmaReadKernelArgs; + NODELIST[CFA_INTERPOLATION_NODE].kernelArgs= &graphArgs->cfaInterpolationArgs; +#if (UYVY_INC_KERNEL) + NODELIST[CSC_NODE].kernelArgs = &graphArgs->cscArgs; +#if NV12_INC_KERNEL + NODELIST[NV12_NODE].kernelArgs = &graphArgs->nv12Args; +#endif +#endif + NODELIST[SINK_NODE].kernelArgs= &graphArgs->dmaWriteKernelArgs; + + /*---------------------------------------------------------------*/ + /* Initialize Graph creation time parameters */ + /*---------------------------------------------------------------*/ + graphCreateParams.graphMemConsumed = 0; + graphCreateParams.onChipScratchMemConsumed = 0; + graphCreateParams.extMemConsumed = 0; + + /*---------------------------------------------------------------*/ + /* Initialize Graph creation time parameters */ + /*---------------------------------------------------------------*/ + status= BAM_initKernelDB(&gSOFT_ISP16_TI_BAM_kernelDBdef); + + if(status != BAM_S_SUCCESS) + { + goto Exit; + } + + /*---------------------------------------------------------------*/ + /* Initialize Graph creation time parameters */ + /*---------------------------------------------------------------*/ + graphCreateParams.coreType= BAM_EVE; + graphCreateParams.kernelDB= &gSOFT_ISP16_TI_BAM_kernelDBdef; + graphCreateParams.nodeList= (BAM_NodeParams*)NODELIST; + graphCreateParams.edgeList= (BAM_EdgeParams*)EDGELIST; + graphCreateParams.graphMem= graphHandle; /* on the stack */ + graphCreateParams.graphMemSize= SOFT_ISP16_GRAPH_OBJ_SIZE; + graphCreateParams.onChipScratchMem= graphMem->graphScratch; + graphCreateParams.onChipScratchMemSize= SOFT_ISP16_GRAPH_SCRATCH_SIZE; + graphCreateParams.extMem= graphMem->graphcontext; /* passed by the caller, usually in external memory */ + graphCreateParams.extMemSize= SOFT_ISP16_GRAPH_CONTEXT_SIZE; + graphCreateParams.useSmartMemAlloc= 1U; +#ifdef FIND_BEST_BLOCKDIM + graphCreateParams.optimizeBlockDim= 1U; +#else + graphCreateParams.optimizeBlockDim= 0; +#endif + graphArgs->createParams= createParams; + + /*---------------------------------------------------------------*/ + /* Initialize the members related to the kernels init function */ + /*---------------------------------------------------------------*/ + graphCreateParams.initKernelsArgsFunc= &SOFT_ISP16_TI_initArgs; + graphCreateParams.initKernelsArgsParams= (void*)graphArgs; + + /* Initialize the structure graphCreateParams.blockDimParams that lists the processing block + * dimensions as well as the step increment sizes used during the block + * dimension optimization if enabled + */ + graphCreateParams.blockDimParams.blockWidth= SOFT_ISP16_BLK_WIDTH; + graphCreateParams.blockDimParams.blockHeight= SOFT_ISP16_BLK_HEIGHT; + + graphCreateParams.blockDimParams.blockWidthStep= SOFT_ISP16_BLK_WIDTH_STEP; + graphCreateParams.blockDimParams.blockHeightStep= SOFT_ISP16_BLK_HEIGHT_STEP; + + graphCreateParams.blockDimParams.blockWidthDivisorOf= createParams->imgFrameWidth; + graphCreateParams.blockDimParams.blockHeightDivisorOf= createParams->imgFrameHeight; + graphCreateParams.blockDimParams.blockWidthMax = createParams->imgFrameWidth; + graphCreateParams.blockDimParams.blockHeightMax = createParams->imgFrameHeight; + + status = BAM_createGraph(&graphCreateParams, &graphHandle); + + createParams->outputBlockWidth= graphCreateParams.blockDimParams.blockWidth; + createParams->outputBlockHeight= graphCreateParams.blockDimParams.blockHeight; + + if(status != BAM_S_SUCCESS) { + goto Exit; + } + + /*-------------------------------------------------------------------------*/ + /* error message handling and return of error code */ + /*-------------------------------------------------------------------------*/ + + Exit: + if (status== BAM_E_INVALID_MEM_SIZE) { + PRINTF("Graph construction failed!!! graphMemSize must be >= %d, onChipScratchMemSize >= %d and extMemSize must be >= %d\n", graphCreateParams.graphMemConsumed, graphCreateParams.onChipScratchMemConsumed, graphCreateParams.extMemConsumed); + } + else if (status== BAM_E_BLOCK_DIM_TOO_BIG) { + PRINTF("Graph construction failed!!! Decrease the value of BLK_WIDTH or BLK_HEIGHT\n"); + } else if (status != BAM_S_SUCCESS) + { + PRINTF("Graph construction failed!!!\n"); + } + else { + BAM_printMemRec(graphCreateParams.memRec, graphCreateParams.numMemRec); + } + return (status); +} + +/*-------------------------------------------------------------------------*/ +/* Function to assign DMA parameters to EDMA utilitiy */ +/*-------------------------------------------------------------------------*/ +static void assignDMAautoIncrementParams( + EDMA_UTILS_autoIncrement_transferProperties * param, + uint16_t roiWidth, + uint16_t roiHeight, + uint16_t blkWidth, + uint16_t blkHeight, + uint16_t extBlkIncrementX, + uint16_t extBlkIncrementY, + uint16_t intBlkIncrementX, + uint16_t intBlkIncrementY, + uint32_t roiOffset, + uint16_t blkOffset, + uint8_t *extMemPtr, + uint16_t extMemPtrStride, + uint8_t *interMemPtr, + uint16_t interMemPtrStride, + uint8_t dmaQueNo +) +{ + param->roiWidth = roiWidth; + param->roiHeight = roiHeight; + param->blkWidth = blkWidth; + param->blkHeight = blkHeight; + param->extBlkIncrementX = extBlkIncrementX; + param->extBlkIncrementY = extBlkIncrementY; + param->intBlkIncrementX = intBlkIncrementX; + param->intBlkIncrementY = intBlkIncrementY; + param->roiOffset = roiOffset; + param->blkOffset = blkOffset; + param->extMemPtr = extMemPtr; + param->extMemPtrStride = extMemPtrStride ; + param->interMemPtr = interMemPtr ; + param->interMemPtrStride = interMemPtrStride; + param->dmaQueNo = dmaQueNo; +} + +/* SOFT_ISP16_TI_initArgs() is callback function that BAM will call to initialize all the kernes' arguments + * It will be called several times during the search for the best block dimensions + * */ +/* CHECK_MISRA("-16.7") -> Disable rule 16.7 */ +/* Pointer parameter blockDimParams is not used to modify the addressed object but is not declared as a pointer to const */ +/* Deviation is allowed because this function is of type BAM_InitkernelsArgsFunc in order to be passed to structure BAM_CreateGraphParams */ +static int32_t SOFT_ISP16_TI_initArgs(void *initKernelsArgs, BAM_BlockDimParams *blockDimParams) { + /*RESET_MISRA("16.7") -> Reset rule 16.7 */ + int16_t srcBlockWidth, srcBlockHeight; + uint16_t cfaBlkWidth, cfaBlkHeight; + +#if UYVY_INC_KERNEL + uint16_t cscBlkWidth, cscBlkHeight; +#if NV12_INC_KERNEL + uint16_t nv12blkWidth, nv12blkHeight; +#endif +#endif + + uint32_t numBytesPerInput=2; + + SOFT_ISP16_TI_graphArgs *graphArgs= (SOFT_ISP16_TI_graphArgs*)initKernelsArgs; + + int16_t blkWidthFinal = 0; + int16_t blkHeightFinal = 0; + + int32_t status = BAM_S_SUCCESS; + + blkWidthFinal = (int16_t)blockDimParams->blockWidth; + blkHeightFinal = (int16_t)blockDimParams->blockHeight; + + srcBlockWidth = blkWidthFinal+((int16_t)RGB_TI_HORZ_PAD_SIZE); + srcBlockHeight = blkHeightFinal+((int16_t)RGB_TI_VERT_PAD_SIZE); + + cfaBlkWidth = (uint16_t)blkWidthFinal; + cfaBlkHeight = (uint16_t)blkHeightFinal; + + //raw2rgbArgs + graphArgs->cfaInterpolationArgs.blk_width= ALIGN_2SIMD(cfaBlkWidth); + graphArgs->cfaInterpolationArgs.blk_height= cfaBlkHeight; + graphArgs->cfaInterpolationArgs.input_stride= (uint16_t)srcBlockWidth; + graphArgs->cfaInterpolationArgs.output_stride= (uint16_t)((uint32_t)cfaBlkWidth + 16U); //this works for the CFA kernel alone + //graphArgs->cfaInterpolationArgs.output_stride = (uint16_t)((uint32_t)cfaBlkWidth*2U); + //graphArgs->cfaInterpolationArgs.output_stride = (uint16_t)(2U * (uint32_t)blkWidth); + graphArgs->cfaInterpolationArgs.bayerFormat= graphArgs->createParams->bayerPattern; + +#if UYVY_INC_KERNEL + //rgb2yuvArgs + + cscBlkWidth = (uint16_t)graphArgs->cfaInterpolationArgs.blk_width; + cscBlkHeight = (uint16_t)((uint32_t)cfaBlkHeight); + + graphArgs->cscArgs.rgb2yuv_coefs = (void*) graphArgs->createParams->rgb2yuv_coefs; + graphArgs->cscArgs.roundingFactor = (CbCr_CONST << (graphArgs->createParams->inputBitDepth)); + graphArgs->cscArgs.shift_val = (graphArgs->createParams->inputBitDepth); //this appears to be correct for the kernelC version but is wrong for srcC + graphArgs->cscArgs.blk_width = ALIGN_2SIMD(cscBlkWidth); + graphArgs->cscArgs.blk_height = cscBlkHeight; + graphArgs->cscArgs.input_stride = cscBlkWidth+(uint16_t)16U; + graphArgs->cscArgs.output_stride = cscBlkWidth; + graphArgs->cscArgs.outputFormat = RGB2YUV_OUTPUT_UYVY; +#endif +#if NV12_INC_KERNEL + nv12blkWidth = (uint16_t)(ALIGN_SIMD(blkWidthFinal)); + nv12blkHeight = (uint16_t)blkHeightFinal; + + graphArgs->nv12Args.height = nv12blkHeight; + graphArgs->nv12Args.width = nv12blkWidth; + graphArgs->nv12Args.in_stride = 2*nv12blkWidth; + graphArgs->nv12Args.out_stride = nv12blkWidth; +#endif + + graphArgs->createParams->activeImgWidth = (uint16_t)(numBytesPerInput * ((uint32_t)(graphArgs->createParams->imgFrameWidth) + (uint32_t)RGB_TI_HORZ_PAD_SIZE)); + graphArgs->createParams->activeImgHeight = (uint16_t)((uint16_t)graphArgs->createParams->imgFrameHeight + (uint16_t)RGB_TI_VERT_PAD_SIZE); + //imgFrameWidth is the ROI width; activeImgWidth includes the border region required by the CFA kernel + graphArgs->dmaReadKernelArgs.numInTransfers = 1; + graphArgs->dmaReadKernelArgs.transferType = EDMA_UTILS_TRANSFER_IN; + + assignDMAautoIncrementParams( + &graphArgs->dmaReadKernelArgs.transferProp[BAM_SOURCE_NODE_PORT1], + graphArgs->createParams->activeImgWidth, /* roiWidth */ + graphArgs->createParams->activeImgHeight, /* roiHeight */ + (uint16_t)(numBytesPerInput * (uint32_t)srcBlockWidth), /* blkWidth */ + (uint16_t)srcBlockHeight, /* blkHeight */ + (uint16_t)(numBytesPerInput * (uint32_t)blkWidthFinal), /* extBlkIncrementX */ + (uint16_t)blkHeightFinal, /* extBlkIncrementY */ + 0U, /* intBlkIncrementX */ + 0U, /* intBlkIncrementY */ + 0U, /* roiOffset */ + 0U, /* blkOffset */ + (uint8_t*)NULL, /* extMemPtr */ + 0U, /* extMemPtrStride */ + (uint8_t*)NULL, /* interMemPtr */ + (uint16_t)((uint16_t)srcBlockWidth * numBytesPerInput), /* interMemPtrStride */ + 0U); /* dmaQueNo */ + +#if (!UYVY_INC_KERNEL) //RGB output + graphArgs->dmaWriteKernelArgs.numOutTransfers = 3; //R,G,B + graphArgs->dmaWriteKernelArgs.transferType = EDMA_UTILS_TRANSFER_OUT; + + /* First transfer is for outputting R component of image buffer */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT1], + 2U*graphArgs->createParams->imgFrameWidth, /* roiWidth */ + graphArgs->createParams->imgFrameHeight, /* roiHeight */ + (uint16_t)(2U * (uint16_t)blkWidthFinal), /* blkWidth */ + (uint16_t)(blkHeightFinal), /* blkHeight */ + (uint16_t)(2 * (uint16_t)blkWidthFinal), /* extBlkIncrementX */ + (uint16_t)blkHeightFinal, /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + 0, /* blkOffset */ + NULL, /* extMemPtr */ + 0, /* extMemPtrStride */ + NULL, /* interMemPtr */ + (uint16_t)(2 * (graphArgs->cfaInterpolationArgs.output_stride)), /* interMemPtrStride */ + 1U); /* dmaQueNo */ + + /* Second transfer is for outputting G component of image buffer */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT2], + graphArgs->createParams->imgFrameWidth * 2, /* roiWidth */ + graphArgs->createParams->imgFrameHeight, /* roiHeight */ + (uint16_t)(2 * (uint16_t)blkWidthFinal), /* blkWidth */ + (uint16_t)(blkHeightFinal), /* blkHeight */ + (uint16_t)(2 * (uint16_t)blkWidthFinal), /* extBlkIncrementX */ + (uint16_t)blkHeightFinal, /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + 0, /* blkOffset */ + NULL, /* extMemPtr */ + 0, /* extMemPtrStride */ + NULL, /* interMemPtr */ + (uint16_t)(2 * graphArgs->cfaInterpolationArgs.output_stride), /* interMemPtrStride */ + 1U); /* dmaQueNo */ + + /* Third transfer is for outputting B component of image buffer */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT3], + graphArgs->createParams->imgFrameWidth * 2, /* roiWidth */ + graphArgs->createParams->imgFrameHeight, /* roiHeight */ + (uint16_t)(2 * (uint16_t)blkWidthFinal), /* blkWidth */ + (uint16_t)(blkHeightFinal), /* blkHeight */ + (uint16_t)(2 * (uint16_t)blkWidthFinal), /* extBlkIncrementX */ + (uint16_t)blkHeightFinal, /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + 0, /* blkOffset */ + NULL, /* extMemPtr */ + 0, /* extMemPtrStride */ + NULL, /* interMemPtr */ + (uint16_t)(2 * graphArgs->cfaInterpolationArgs.output_stride), /* interMemPtrStride */ + 1U); /* dmaQueNo */ +#else +#if NV12_INC_KERNEL + graphArgs->dmaWriteKernelArgs.numOutTransfers = 2; //Y plane is one transfer, UV plane is the other + graphArgs->dmaWriteKernelArgs.transferType = EDMA_UTILS_TRANSFER_OUT; + + /* First transfer is for outputting Y component of image buffer */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT1], + graphArgs->createParams->imgFrameWidth, /* roiWidth */ + graphArgs->createParams->imgFrameHeight, /* roiHeight */ + (uint16_t)nv12blkWidth, /* blkWidth */ + (uint16_t)(nv12blkHeight), /* blkHeight */ + (uint16_t)nv12blkWidth, /* extBlkIncrementX */ + (uint16_t)nv12blkHeight, /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + 0, /* blkOffset */ + NULL, /* extMemPtr */ + 0, /* extMemPtrStride */ + NULL, /* interMemPtr */ + (uint16_t)(graphArgs->nv12Args.out_stride), /* interMemPtrStride */ + 1U); /* dmaQueNo */ + + /* Second transfer is for outputting UV component of image buffer */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT2], + graphArgs->createParams->imgFrameWidth, /* roiWidth */ + (uint16_t)(((uint32_t)graphArgs->createParams->imgFrameHeight)/2U), /* roiHeight */ + (uint16_t)(nv12blkWidth), /* blkWidth */ + (uint16_t)((uint32_t)nv12blkHeight / 2U), /* blkHeight */ + (uint16_t)(nv12blkWidth), /* extBlkIncrementX */ + (uint16_t)((uint32_t)nv12blkHeight / 2U), /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + nv12blkWidth*nv12blkHeight, /* blkOffset */ + NULL, /* extMemPtr : This will come during process call */ + 0, /* extMemPtrStride : This will be populated during process call using bufDesc */ + NULL, /* DMA node will be populating this field */ + (uint16_t)(graphArgs->nv12Args.out_stride), /* interMemPtrStride */ + 1U /* dmaQueNo */ + ); +#else //this is for UYVY output + graphArgs->dmaWriteKernelArgs.numOutTransfers = 1; //UYVY + graphArgs->dmaWriteKernelArgs.transferType = EDMA_UTILS_TRANSFER_OUT; + + /* UYVY Interlaced Output */ + assignDMAautoIncrementParams(&graphArgs->dmaWriteKernelArgs.transferProp[BAM_SINK_NODE_PORT1], + //(uint16_t)2 * graphArgs->createParams->imgFrameWidth, /* roiWidth */ + //graphArgs->createParams->imgFrameHeight, /* roiHeight */ + graphArgs->createParams->activeImgWidth, /* roiWidth */ + graphArgs->createParams->activeImgHeight, /* roiHeight */ + 2*cscBlkWidth, /* blkWidth */ + cscBlkHeight, /* blkHeight */ + 2*cscBlkWidth, /* extBlkIncrementX */ + cscBlkHeight, /* extBlkIncrementY */ + 0, /* intBlkIncrementX */ + 0, /* intBlkIncrementY */ + 0, /* roiOffset */ + 0, /* blkOffset */ + NULL, /* extMemPtr */ + 0, /* extMemPtrStride */ + NULL, /* interMemPtr */ + (uint16_t)(2*(uint32_t)graphArgs->cscArgs.output_stride), /* interMemPtrStride */ + 1U); /* dmaQueNo */ +#endif +#endif + + return status; +} + +/*-------------------------------------------------------------------------*/ +/* Function to perform actual execution */ +/*-------------------------------------------------------------------------*/ +int32_t SOFT_ISP16_TI_execute( + BAM_GraphMem * graphMem, + const BAM_InArgs *inArgs, + BAM_OutArgs *outArgs) +{ + + BAM_ProcessHints hints; + //BAM_Raw2rgb16_CtlArgs raw2RgbCtlArgs; + BAM_GraphHandle graphHandle = (BAM_GraphHandle)graphMem->graphObj; + int32_t status = BAM_S_SUCCESS; + + /* Specify which processing schedule is the best, unsupported for now */ + hints.priority= BAM_COMPUTE_FIRST; + + BAM_process(graphHandle, inArgs, outArgs, &hints); + + //raw2RgbCtlArgs.ctlCmdId= BAM_RAW2RGB_CMD_GET_ARGS; + //status= (int32_t)(BAM_controlNode(graphHandle, (uint8_t)CFA_INTERPOLATION_NODE, &raw2RgbCtlArgs)); + + return status; + +} + +int32_t SOFT_ISP16_TI_dmaControl(const BAM_GraphMem *graphMem, const SOFT_ISP16_TI_Handle intAlgHandle, const SOFT_ISP16_TI_InArgs * inArgs, const IVISION_BufDesc *inBufDesc[], const IVISION_BufDesc *outBufDesc[]) +{ + EDMA_UTILS_autoIncrement_updateParams autoIncCtlArgs; + + uint32_t numBytesPerInput; + //uint32_t numBytesPerOutput; + uint8_t (*buf)[]; + + const IVISION_BufPlanes * ivisionBufPlane= &inBufDesc[SOFT_ISP16_TI_BUFDESC_IN]->bufPlanes[0]; + int32_t status = BAM_S_SUCCESS; + + /* initilize the sub-handles inside the main handle */ + BAM_GraphHandle graphHandle = (BAM_GraphHandle)graphMem->graphObj; + + buf= (uint8_t (*)[])ivisionBufPlane->buf; + numBytesPerInput= 2U; + //numBytesPerOutput = 1U; + + /* Initialize the control parameters for the SOURCE auto-increment DMA node */ + autoIncCtlArgs.updateMask= EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_EXTMEMPTR | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_EXTMEMPTRSTRIDE | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_ROIWIDTH | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_ROIHEGIHT; + + /* We rewind topLeft.x and topLeft.y by the exact border width and height required to include border pixels necessary for the softIsp16 transform. + * This is to ensure that the pointer for EDMA read points exactly to the upper left corner of the region composed + * by the ROI augmented by the softIsp16 window border. + * */ + + //autoIncCtlArgs.updateParams[0].extMemPtr = &((*buf)[(int32_t)numBytesPerInput * \ + // ((((int32_t)ivisionBufPlane->frameROI.topLeft.y - (int32_t)(((int32_t)SOFT_ISP16_CFA_BORDER - (int32_t)1) / (int32_t)2)) * \ + // (int32_t)ivisionBufPlane->width) + ((int32_t)ivisionBufPlane->frameROI.topLeft.x - \ + // (((int32_t)SOFT_ISP16_CFA_BORDER - (int32_t)1) / (int32_t)2)))]); + autoIncCtlArgs.updateParams[0].extMemPtr = &((*buf)[(int32_t)2 * \ + ((((int32_t)ivisionBufPlane->frameROI.topLeft.y - (int32_t)RGB_TI_TOP_PAD_SIZE) * (int32_t)ivisionBufPlane->width) \ + + (int32_t)ivisionBufPlane->frameROI.topLeft.x - (int32_t)RGB_TI_LEFT_PAD_SIZE)]); + autoIncCtlArgs.updateParams[0].extMemPtrStride = numBytesPerInput * ivisionBufPlane->width; + autoIncCtlArgs.updateParams[0].roiWidth = (uint16_t)(numBytesPerInput * (uint32_t)(((uint32_t)ivisionBufPlane->frameROI.width + (uint32_t)RGB_TI_HORZ_PAD_SIZE))); + autoIncCtlArgs.updateParams[0].roiHeight = (uint16_t)(ivisionBufPlane->frameROI.height + (uint32_t)RGB_TI_VERT_PAD_SIZE); + + status= BAM_controlNode(graphHandle, SOURCE_NODE, &autoIncCtlArgs); + + if (status!= BAM_S_SUCCESS) { + goto Exit; + } + + intAlgHandle->activeImgWidth= autoIncCtlArgs.updateParams[0].roiWidth; + intAlgHandle->activeImgHeight= autoIncCtlArgs.updateParams[0].roiHeight; + + /* Initialize the control parameters for the SINK auto-increment DMA node */ + + autoIncCtlArgs.updateMask= EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_EXTMEMPTR | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_EXTMEMPTRSTRIDE + | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_ROIWIDTH | EDMA_UTILS_AUTOINCREMENT_UPDATE_MASK_ROIHEGIHT; + +#if NV12_INC_KERNEL + /* Initialize pointer to the Y buffer */ + ivisionBufPlane= &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[0]; + buf= (uint8_t (*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[0].extMemPtr = &((*buf)[(ivisionBufPlane->frameROI.topLeft.y * ivisionBufPlane->width + ivisionBufPlane->frameROI.topLeft.x)]); + //memset((void*)autoIncCtlArgs.updateParams[0].extMemPtr, 105, 1280 * 720); + autoIncCtlArgs.updateParams[0].extMemPtrStride = ivisionBufPlane->width; + autoIncCtlArgs.updateParams[0].roiWidth = ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[0].roiHeight = ivisionBufPlane->frameROI.height; + + /* Initialize pointer to the UV buffer */ + ivisionBufPlane = &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[1]; + buf = (uint8_t(*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[1].extMemPtr = &((*buf)[(ivisionBufPlane->frameROI.topLeft.y * ivisionBufPlane->width + ivisionBufPlane->frameROI.topLeft.x)]); + //memset((void*)autoIncCtlArgs.updateParams[1].extMemPtr, 80, 1280 * 720 / 2); + /*RESET_MISRA("17.1") -> Reset rule 17.1 for MISRA.PTR.ARITH */ + autoIncCtlArgs.updateParams[1].extMemPtrStride = ivisionBufPlane->width; + autoIncCtlArgs.updateParams[1].roiWidth = ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[1].roiHeight = ivisionBufPlane->frameROI.height; + +#elif UYVY_INC_KERNEL + /* Initialize pointer to the UYVY buffer */ + ivisionBufPlane = &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[0]; + buf = (uint8_t(*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[0].extMemPtr = &((*buf)[2U*(ivisionBufPlane->frameROI.topLeft.y * ivisionBufPlane->width + ivisionBufPlane->frameROI.topLeft.x)]); + //memset((void*)autoIncCtlArgs.updateParams[0].extMemPtr, 105, 1280 * 720); + autoIncCtlArgs.updateParams[0].extMemPtrStride = 2U*ivisionBufPlane->width; + autoIncCtlArgs.updateParams[0].roiWidth = 2U*ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[0].roiHeight = ivisionBufPlane->frameROI.height; + +#else + /* Initialize pointer to the R buffer */ + ivisionBufPlane = &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[0]; + buf = (uint8_t(*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[0].extMemPtr = &((*buf)[(ivisionBufPlane->frameROI.topLeft.y * (2 * ivisionBufPlane->width) + (2*ivisionBufPlane->frameROI.topLeft.x))]); + memset((void*)buf, 105, 2 * ivisionBufPlane->width * ivisionBufPlane->height); + autoIncCtlArgs.updateParams[0].extMemPtrStride = 2 * ivisionBufPlane->width; + autoIncCtlArgs.updateParams[0].roiWidth = 2 * ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[0].roiHeight = ivisionBufPlane->frameROI.height; + + /* Initialize pointer to the G buffer */ + ivisionBufPlane = &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[1]; + buf = (uint8_t(*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[1].extMemPtr = &((*buf)[(ivisionBufPlane->frameROI.topLeft.y * (2 * ivisionBufPlane->width) + (2*ivisionBufPlane->frameROI.topLeft.x))]); + memset((void*)buf, 105, 2 * ivisionBufPlane->width * ivisionBufPlane->height); + autoIncCtlArgs.updateParams[1].extMemPtrStride = 2 * ivisionBufPlane->width; + autoIncCtlArgs.updateParams[1].roiWidth = 2 * ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[1].roiHeight = ivisionBufPlane->frameROI.height; + + /* Initialize pointer to the B buffer */ + ivisionBufPlane = &outBufDesc[SOFT_ISP16_TI_BUFDESC_OUT]->bufPlanes[2]; + buf = (uint8_t(*)[])ivisionBufPlane->buf; + autoIncCtlArgs.updateParams[2].extMemPtr = &((*buf)[(ivisionBufPlane->frameROI.topLeft.y * (2 * ivisionBufPlane->width) + (2 * ivisionBufPlane->frameROI.topLeft.x))]); + memset((void*)buf, 105, 2 * ivisionBufPlane->width * ivisionBufPlane->height); + autoIncCtlArgs.updateParams[2].extMemPtrStride = 2 * ivisionBufPlane->width; + autoIncCtlArgs.updateParams[2].roiWidth = 2 * ivisionBufPlane->frameROI.width; + autoIncCtlArgs.updateParams[2].roiHeight = ivisionBufPlane->frameROI.height; +#endif + status= (int32_t)(BAM_controlNode(graphHandle, (uint8_t)SINK_NODE, (void*)&autoIncCtlArgs)); + + Exit: + return status; +} + + +int32_t SOFT_ISP16_TI_kernelControl(const BAM_GraphMem *graphMem, const SOFT_ISP16_TI_InArgs * inArgs) +{ + //BAM_Raw2rgb16_CtlArgs raw2RgbCtlArgs; + int32_t status = BAM_S_SUCCESS; + + ///* initilize the sub-handles inside the main handle */ + //BAM_GraphHandle graphHandle = (BAM_GraphHandle)graphMem->graphObj; + + //raw2RgbCtlArgs.ctlCmdId= BAM_RAW2RGB_CMD_SET_ARGS; + + //status= (int32_t)(BAM_controlNode(graphHandle, (uint8_t)CFA_INTERPOLATION_NODE, &raw2RgbCtlArgs)); + + return status; +} + + I'm looking to use raw2rgb in place of bayer2rgb for this system. My graph is attached for your review. Thanks, Joe + +Will this question be receiving additional support? Thanks, Joe + +Hi Joe, Sorry for getting back late on this, we were not able to prioritize your request due to other priorities. At this point of time, we want to understand if the issue still persist and is it still an ongoing development where you need guidance? Thanks, With Regards, pramod + +Hello, I am closing this thread in absence of response from you, please create a new thread if you still have any query With Regards, pramod + diff --git a/data2/text/range/30001+/935771.txt b/data2/text/range/30001+/935771.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c8804383171e43aac0689f90ba605bf193653c8 --- /dev/null +++ b/data2/text/range/30001+/935771.txt @@ -0,0 +1,13 @@ +Ticket Name: TDA2SX: I have some questions about yocto compilation + +Query Text: +Part Number: TDA2SX I followed processors.wiki.ti.com/index.php in the tutorial of building a Yocto file system, compiled with the version of psdk3.4, but there are several errors, it seems These git URLs can't be opened, how can I solve them if I want to ask for help? Another problem is the compilation error and too much printing, which makes it difficult for me to locate the specific error location. I also want to ask for help. Using username "root". Last login: Fri Aug 28 13:52:42 2020 from 10.10.10.11 root@hirain-PowerEdge-R740:~# root@hirain-PowerEdge-R740:~# root@hirain-PowerEdge-R740:~# root@hirain-PowerEdge-R740:~# root@hirain-PowerEdge-R740:~# cd /opt/psdkla_03_04_00_03/yocto-layers/ root@hirain-PowerEdge-R740:/opt/psdkla_03_04_00_03/yocto-layers# export PATH=/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin:$PATH root@hirain-PowerEdge-R740:/opt/psdkla_03_04_00_03/yocto-layers# ./build-core-sdk.sh dra7xx-evm [PSDKLA]> [PSDKLA]> Current Directory is /opt/psdkla_03_04_00_03/yocto-layers [PSDKLA]> PATH is /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/snap/bin [PSDKLA]> Building on hirain-PowerEdge-R740 running Linux hirain-PowerEdge-R740 4.15.0-29-generic #31-Ubuntu SMP Tue Jul 17 15:39:52 UTC 2018 x86_64 x86_64 x86_64 GNU/Linux [PSDKLA]> Starting Yocto build at Fri Aug 28 18:50:49 CST 2020 [PSDKLA]> [PSDKLA]> cd build [PSDKLA]> . conf/setenv [PSDKLA]> cp conf/local.conf conf/local.conf.pristine [PSDKLA]> MACHINE=dra7xx-evm bitbake tisdk-rootfs-image NOTE: Started PRServer with DBfile: /opt/psdkla_03_04_00_03/yocto-layers/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 36487, PID: 28776 Loading cache: 100% |#####################################################################################################################| ETA: 00:00:00 Loaded 2849 entries from dependency cache. NOTE: Resolving any missing task queue dependencies Build Configuration: BB_VERSION = "1.30.0" BUILD_SYS = "x86_64-linux" NATIVELSBSTRING = "Ubuntu-18.04" TARGET_SYS = "arm-linux-gnueabi" MACHINE = "dra7xx-evm" DISTRO = "arago" DISTRO_VERSION = "2016.12" TUNE_FEATURES = "arm armv7a vfp thumb neon callconvention-hard" TARGET_FPU = "hard" meta-glsdk = "HEAD:66cfd8ef55344508d6e7b306259f34c05b828194" meta-arago-distro meta-arago-extras = "HEAD:4c01410ffde8853224567fb6078d7d9f190b942f" meta-qt5 = "HEAD:f8584d7a7c90afc71484a40279aa3df651d0e04f" meta-networking meta-ruby meta-python meta-oe = "HEAD:55c8a76da5dc099a7bc3838495c672140cedb78e" meta-ti = "HEAD:5f3a1169d307fec41626f850f5c700437dedbe93" meta-linaro-toolchain meta-optee = "HEAD:2f51d38048599d9878f149d6d15539fb97603f8f" meta = "HEAD:bfa04fa71c47e8fe9528208848cfcec2e232777d" NOTE: Preparing RunQueue NOTE: Executing SetScene Tasks NOTE: Executing RunQueue Tasks WARNING: opencv-3.1+gitAUTOINC+ffb1eb48af-r3 do_fetch: Failed to fetch URL git://github.com/Itseez/opencv_contrib.git;destsuffix=contrib;name=contrib, attempting MIRRORS if available WARNING: cpuburn-neon-20140626-r0 do_fetch: Failed to fetch URL hardwarebug.org/.../burn.S;name=mru, attempting MIRRORS if available WARNING: stream-5.10-r0.arago1 do_fetch: Failed to fetch URL git://git.ti.com/sitara-linux/stream.git;branch=sdk, attempting MIRRORS if available WARNING: rng-tools-5-r0 do_fetch: Failed to fetch URL heanet.dl.sourceforge.net/.../rng-tools-5.tar.gz, attempting MIRRORS if available ERROR: cpuburn-neon-20140626-r0 do_fetch: Fetcher failure: Fetch command failed with exit code 4, output: wget: unable to resolve host address 'hardwarebug.org' ERROR: cpuburn-neon-20140626-r0 do_fetch: Function failed: Fetcher failure for URL: 'hardwarebug.org/.../burn.S;name=mru'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/cpuburn-neon/20140626-r0/temp/log.do_fetch.28878 ERROR: Task 1742 (/opt/psdkla_03_04_00_03/yocto-layers/sources/meta-openembedded/meta-oe/recipes-benchmark/cpuburn/cpuburn-neon_20140626.bb, do_fetch) failed with exit code '1' ERROR: stream-5.10-r0.arago1 do_fetch: Fetcher failure: Fetch command failed with exit code 128, output: Cloning into bare repository '/opt/psdkla_03_04_00_03/yocto-layers/downloads/git2/git.ti.com.sitara-linux.stream.git'... fatal: remote error: access denied or repository not exported: /sitara-linux/stream.git ERROR: stream-5.10-r0.arago1 do_fetch: Function failed: Fetcher failure for URL: 'git://git.ti.com/sitara-linux/stream.git;branch=sdk'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/stream/5.10-r0.arago1/temp/log.do_fetch.28867 ERROR: Task 3234 (/opt/psdkla_03_04_00_03/yocto-layers/sources/meta-arago/meta-arago-extras/recipes-benchmark/stream/stream_5.10.bb, do_fetch) failed with exit code '1' WARNING: stress-1.0.4-r0 do_fetch: Failed to fetch URL people.seas.harvard.edu/.../stress-1.0.4.tar.gz, attempting MIRRORS if available WARNING: amsdk-av-files-1.4-r1 do_fetch: Failed to fetch URL gforge.ti.com/.../amsdk-av-files_1.4.tar.gz;name=avfilestarball, attempting MIRRORS if available WARNING: point-cloud-viewer-2.0-r0 do_fetch: Failed to fetch URL gforge.ti.com/.../point-cloud-viewer-2.0.tar.gz, attempting MIRRORS if available ERROR: amsdk-av-files-1.4-r1 do_fetch: Fetcher failure: Fetch command failed with exit code 4, output: failed: Connection timed out. failed: Connection timed out. ERROR: amsdk-av-files-1.4-r1 do_fetch: Function failed: Fetcher failure for URL: 'gforge.ti.com/.../amsdk-av-files_1.4.tar.gz;name=avfilestarball'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/dra7xx_evm-linux-gnueabi/amsdk-av-files/1.4-r1/temp/log.do_fetch.28852 ERROR: point-cloud-viewer-2.0-r0 do_fetch: Fetcher failure: Fetch command failed with exit code 4, output: failed: Connection timed out. failed: Connection timed out. ERROR: Task 2964 (/opt/psdkla_03_04_00_03/yocto-layers/sources/meta-arago/meta-arago-extras/recipes-multimedia/amsdk-av-files/amsdk-av-files_1.4.bb, do_fetch) failed with exit code '1' ERROR: point-cloud-viewer-2.0-r0 do_fetch: Function failed: Fetcher failure for URL: 'gforge.ti.com/.../point-cloud-viewer-2.0.tar.gz'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/point-cloud-viewer/2.0-r0/temp/log.do_fetch.28859 ERROR: Task 6013 (/opt/psdkla_03_04_00_03/yocto-layers/sources/meta-arago/meta-arago-extras/recipes-apps/point-cloud-viewer/point-cloud-viewer_2.0.bb, do_fetch) failed with exit code '1' Waiting for 6 running tasks to finish: 0: ti-cgt-arm-native-16.9.2-r0 do_unpack (pid 28821) 1: ti-llvm3.6-3.6-r5 do_compile (pid 28825) 2: opencv-3.1+gitAUTOINC+ffb1eb48af-r3 do_fetch (pid 28826) 3: ti-cgt-pru-native-2.1.4-r0 do_unpack (pid 28847) 4: ti-gc320-tests-5.0.11.p7-r4 do_fetch (pid 28870) 5: ltp-ddt-20160510+gitAUTOINC+ea64df36bc-r10 do_fetch (pid 28873) --------------------------------------------------------------- | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Sema; \ | DD=Sema; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Sema; \ | DD=Sema; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/CodeGen; \ | DD=CodeGen; \ | if [ ! -f $SD/Makefile ]; then \ | SD=CodeGen; \ | DD=CodeGen; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Analysis; \ | DD=Analysis; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Analysis; \ | DD=Analysis; \ | fi; \ （Many similar mistakes...） （Many similar mistakes...） （Many similar mistakes...） | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Frontend; \ | DD=Frontend; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Frontend; \ | DD=Frontend; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Edit' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Edit' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Index' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Index' | make[5]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/ASTMatchers/Dynamic' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Format' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Format' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Tooling' | make[5]: Nothing to be done for 'all'. | make[5]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/ASTMatchers/Dynamic' | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/ASTMatchers' | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/FrontendTool; \ | DD=FrontendTool; \ | if [ ! -f $SD/Makefile ]; then \ | SD=FrontendTool; \ | DD=FrontendTool; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Tooling; \ | DD=Tooling; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Tooling; \ | DD=Tooling; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Driver; \ | DD=Driver; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Driver; \ | DD=Driver; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Format; \ | DD=Format; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Format; \ | DD=Format; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Headers' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Edit; \ | DD=Edit; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Edit; \ | DD=Edit; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Rewrite; \ | DD=Rewrite; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Rewrite; \ | DD=Rewrite; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Serialization; \ | DD=Serialization; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Serialization; \ | DD=Serialization; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Headers' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/Index; \ | DD=Index; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Index; \ | DD=Index; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Basic' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/FrontendTool' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Lex' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Lex' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/ASTMatchers; \ | DD=ASTMatchers; \ | if [ ! -f $SD/Makefile ]; then \ | SD=ASTMatchers; \ | DD=ASTMatchers; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/FrontendTool' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/StaticAnalyzer; \ | DD=StaticAnalyzer; \ | if [ ! -f $SD/Makefile ]; then \ | SD=StaticAnalyzer; \ | DD=StaticAnalyzer; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/StaticAnalyzer' | for dir in Checkers Frontend; do \ | if ([ ! -f $dir/Makefile ] || \ | command test $dir/Makefile -ot /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/StaticAnalyzer/$dir/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $dir; \ | /bin/cp /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/StaticAnalyzer/$dir/Makefile $dir/Makefile; \ | fi; \ | (make -C $dir all ) || exit 1; \ | done | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/ASTMatchers' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/ASTMatchers/Dynamic; \ | DD=Dynamic; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Dynamic; \ | DD=Dynamic; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Rewrite' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Rewrite' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/ARCMigrate; \ | DD=ARCMigrate; \ | if [ ! -f $SD/Makefile ]; then \ | SD=ARCMigrate; \ | DD=ARCMigrate; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Analysis' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/lib/Analysis' | \ | SD=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/tools/clang/lib/StaticAnalyzer/Core; \ | DD=Core; \ | if [ ! -f $SD/Makefile ]; then \ | SD=Core; \ | DD=Core; \ | fi; \ | if ([ ! -f $DD/Makefile ] || \ | command test $DD/Makefile -ot \ | $SD/Makefile ); then \ | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/autoconf/mkinstalldirs $DD; \ | /bin/cp $SD/Makefile $DD/Makefile; \ | fi; \ | make -C $DD all | arm-linux-gnueabihf-g++ -march=armv7-a -marm -mfpu=neon -mfloat-abi=hard --sysroot=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -isystem/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/include -O2 -pipe -g -feliminate-unused-debug-types -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5=/usr/src/debug/ti-llvm3.6/3.6-r5 -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/x86_64-linux= -fdebug-prefix-map=/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/sysroots/dra7xx-evm= -O3 -rdynamic -Wl,-R -Wl,'$ORIGIN/../lib' -L/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib -L/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -L/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-rpath-link,/opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/arm-linux-gnueabihf/lib -Wl,-O1 -Wl,--hash-style=gnu -o /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/bin/clang /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/driver/Release/cc1_main.o /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/driver/Release/cc1as_main.o /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/driver/Release/driver.o -lclangFrontendTool -lclangFrontend -lclangDriver -lclangSerialization -lclangCodeGen -lclangParse -lclangSema -lclangRewriteFrontend -lclangRewrite -lclangStaticAnalyzerFrontend -lclangStaticAnalyzerCheckers -lclangStaticAnalyzerCore -lclangARCMigrate -lclangAnalysis -lclangEdit -lclangAST -lclangLex -lclangBasic \ | -lLLVM-3.6 -lpthread -lffi -ldl -lm | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/libclang' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/libclang' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/c-index-test' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/c-index-test' | make[4]: Entering directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/c-arcmt-test' | make[4]: Nothing to be done for 'all'. | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/c-arcmt-test' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: Can't find .debug_abbrev section. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x6): undefined reference to `.Ldebug_abbrev0' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0xc): undefined reference to `.LASF67135' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. （Many similar mistakes...） | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x59498): undefined reference to `.LASF440' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '6828', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594bf): undefined reference to `.LASF11245' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '27', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594c6): undefined reference to `.LASF11246' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '11776', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594d3): undefined reference to `.LASF665' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594dc): undefined reference to `.LASF11185' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '56577', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594eb): undefined reference to `.LASF11247' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '59392', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594f2): undefined reference to `.LASF11248' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '2560', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x594ff): undefined reference to `.LASF565' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '26', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x59508): undefined reference to `.LASF440' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '44', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x59511): undefined reference to `.LASF11188' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '27', this reader only handles version 2, 3 and 4 information. （Many similar mistakes...） | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6769): undefined reference to `.LASF66772' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6785): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '64', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c67a4): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '24320', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c67eb): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c680a): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c682f): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1888', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c684c): undefined reference to `.LASF52854' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '203', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6858): undefined reference to `.LASF39330' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '16384', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c687e): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c689d): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c68c6): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '24611', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c68e0): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '51979', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c68fa): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '2816', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6927): more undefined references to `.LASF66750' follow | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '19', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6a7f): undefined reference to `.LASF66760' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '84', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6a8c): undefined reference to `.LASF66761' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '6', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6af5): undefined reference to `.LASF1462' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6afe): undefined reference to `.LASF10740' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1888', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6b30): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6b4f): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6b88): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '6', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6c20): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1888', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6ca3): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '34251', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6cc2): more undefined references to `.LASF66750' follow | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '17408', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6d98): undefined reference to `.LASF66754' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6dba): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6dc4): undefined reference to `.LASF66754' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '27393', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6df9): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '2816', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6e57): undefined reference to `.LASF1462' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '6', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6e60): undefined reference to `.LASF10740' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '84', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6e9e): undefined reference to `.LASF1499' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '26', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6f14): undefined reference to `.LASF1462' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6f1d): undefined reference to `.LASF10740' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1891', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6f5b): undefined reference to `.LASF1499' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '21764', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6fd1): undefined reference to `.LASF1462' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '6400', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c6fda): undefined reference to `.LASF10740' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1888', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c7018): undefined reference to `.LASF1499' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '1', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c704f): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '64512', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c706e): undefined reference to `.LASF66750' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '4095', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c70c7): undefined reference to `.LASF1462' | /opt/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/../lib/gcc/arm-linux-gnueabihf/5.3.1/../../../../arm-linux-gnueabihf/bin/ld: Dwarf Error: found dwarf version '0', this reader only handles version 2, 3 and 4 information. | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/lib/libclangCodeGen.a(CodeGenModule.o):(.debug_info+0x1c70d0): undefined reference to `.LASF10740' | collect2: error: ld returned 1 exit status | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/Makefile.rules:1427: recipe for target '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/bin/clang' failed | make[4]: *** [/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/Release/bin/clang] Error 1 | make[4]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools/driver' | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/Makefile.rules:932: recipe for target 'driver/.makeall' failed | make[3]: *** [driver/.makeall] Error 2 | make[3]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang/tools' | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/Makefile.rules:873: recipe for target 'all' failed | make[2]: *** [all] Error 1 | make[2]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools/clang' | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/Makefile.rules:932: recipe for target 'clang/.makeall' failed | make[1]: *** [clang/.makeall] Error 2 | make[1]: Leaving directory '/opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/llvm-3.6.build/tools' | /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/git/Makefile.rules:873: recipe for target 'all' failed | make: *** [all] Error 1 | ERROR: oe_runmake failed | ERROR: Function failed: do_compile (log file is located at /opt/psdkla_03_04_00_03/yocto-layers/build/arago-tmp-external-linaro-toolchain/work/armv7ahf-neon-linux-gnueabi/ti-llvm3.6/3.6-r5/temp/log.do_compile.28825) ERROR: Task 4943 (/opt/psdkla_03_04_00_03/yocto-layers/sources/meta-arago/meta-arago-extras/recipes-core/llvm/ti-llvm3.6_3.6.bb, do_compile) failed with exit code '1' Waiting for 5 running tasks to finish: 0: ti-cgt-arm-native-16.9.2-r0 do_unpack (pid 28821) 1: opencv-3.1+gitAUTOINC+ffb1eb48af-r3 do_fetch (pid 28826) 2: ti-cgt-pru-native-2.1.4-r0 do_unpack (pid 28847) 3: ti-gc320-tests-5.0.11.p7-r4 do_fetch (pid 28870) 4: ltp-ddt-20160510+gitAUTOINC+ea64df36bc-r10 do_fetch (pid 28873) + +Responses: +Hi, The PSDKLA 3.04 is released around Dec 2017. So some of the repositories could have moved and therefore the recipes will need some readjustment to point them to the new path. One quick suggestion is to use the mirror that can help satsify some of the dependencies, please refer to this page: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Overview_Building_the_SDK.html#build-steps Refer to the lines echo "INHERIT += \"own-mirrors\"" >> conf/local.conf +echo "SOURCE_MIRROR_URL = \"software-dl.ti.com/.../\"" >> conf/local.conf Please add this to your build and try to build it, it should help resolve a few errors. For the remaining, I suggest that you can either google search/e2e search for solutions and/or post here we will try to get you further. Regards Karthik + +Hi Karthik Ramanan Thank you for the reply.Your solution is very effective. I downloaded it myself and placed it in the downloads directory, and then manually created the done file to continue compiling. Then I added the -k option to bitbake, but now after unpacking these two tasks, it hasn't ended for about 2 days, and there are no other tasks. log is here. Currently 2 running tasks (7185 of 7418): 0：ti-cgt-arm-native-16.9.2-r0 do_unpack（pid 28821） 1：ti-cgt-pru-native-2.1.4- r0 do_unpack（pid 28847） + +Hi, The details of this post will help you to resolve the issue: https://e2e.ti.com/support/processors/f/791/p/712340/2625408#2625408 Regards Karthik + diff --git a/data2/text/range/30001+/935819.txt b/data2/text/range/30001+/935819.txt new file mode 100644 index 0000000000000000000000000000000000000000..ce5d0dd27ca3fc574d7fde1a66128670f753d0c5 --- /dev/null +++ b/data2/text/range/30001+/935819.txt @@ -0,0 +1,1868 @@ +Ticket Name: TDA2HG: Deviation of color after DSSM2M link + +Query Text: +Part Number: TDA2HG Hi, My visionSDK version: 3.05. Here is my link: qt->weston(rgb)->dssm2m(yuv422)->display I capture picture from weston(which I read from drm device) like this: But after DSSM2M to display link the picture like this: Here is my DSSM2M configure: /* DSS M2M WB link */ + pPrm->enableOut = TRUE; + pPrm->wbInNode = DSSM2MWBLINK_DISPC_WB_IN_NODE_LCD2; + pPrm->numInPipeLines = 1U; + pPrm->inPipelines[0U] = DSSM2MWBLINK_DISPC_PIPE_VID2; + + /* input pipeline parameters */ + pPrm->inTarWidth[0U] = displayWidth; + pPrm->inTarHeight[0U] = displayHeight; + pPrm->inPosX[0U] = 0U; + pPrm->inPosY[0U] = 0U; + + /* The overlay width and height are used only if 'wbInNode' is overlay node */ + pPrm->ovlyWidth = displayWidth; + pPrm->ovlyHeight = displayHeight; + + /* Output parameters */ + /* Input format is ARGB32 and output format is YUV420SP_UV */ + pPrm->outDataFmt = SYSTEM_DF_YUV422I_UYVY; + pPrm->outWidth = displayWidth; So is there any problem that DSSM2M will lost presion when convert RGB to YUV? Thanks! + +Responses: +Hi Tim, There is a CSC module, which will convert first RGB into YUV format and then to YUV422 format. It may be that the CSC coefficients are not matching with the requirement of the source. There is an SW interface to change CSC coefficients, could you please try changing it? Regards, Brijesh + +Hi Brijesh, I captured picture after DSSM2M，it has no deviation. I put below sample picture into DSSM2M link. Then got picture after DSSM2M below: It same as sample picture. But after put it to display link, I got picture below: I put two arrows on picture to point out that red spot. So Is it possible that display link lost presion? Thanks! + +Hi, ok, what is the output interface from display? Are you using YUV422 discrete sync output interface? In this case, we need to configure DSS in RGB565 input format and disable all pixel processing modules.. So could you please pipeline modules? Regards, Brijesh + +Hi, Output interface is vout1. I already pipeline modules use visionsdk. Like said before qt->weston(rgb)->dssm2m(yuv422)->display. Here is usecase below: And using YUV422 discrete sync output interface as rgb565 into display link. + +We only edit these code: Int32 DisplayLink_drvDisplayCreate(DisplayLink_Obj *pObj) +{ +.... + if(dssPrms->inFmt.dataFormat == SYSTEM_DF_YUV422I_UYVY) + { + /* Convert to BGR565 output */ + dssPrms->inFmt.dataFormat = SYSTEM_DF_BGR16_565; + Vps_printf("Andy: treat SYSTEM_DF_YUV422I_UYVY to SYSTEM_DF_BGR16_565 for display out\n "); + } +.... +} Is it need change other place? + +Hi, I got patchs file from FAE, and compared the code, it seems no different. So I think it must have some other place need be configured. patch file: spracg3.zip + +Hi, Please make sure that the input format is RGB565, all pixel processing modules are disabled/bypassed and finally, the TDM module is enabled for an 8bit output format. Without these changes, we cannot get YUV422 over a discrete sync interface. Thanks Gaviraju + +Hi Gaviraju, I checked that already and I think if I missed one of it, there will no display on screen not just some red or green spots on it. Thanks! + +Hi Tim, Can you please take dump of DSS registers and share it? I will check to see if there is something wrong. Rgds, Brijesh + +Hi Brijesh, dump below: root@dra7xx-evm:~# devmem2 0x58000000 +/dev/mem opened. +Memory mapped at address 0xb6f1d000. +Read at address 0x58000000 (0xb6f1d000): 0x00000061 +root@dra7xx-evm:~# devmem2 0x58000014 +/dev/mem opened. +Memory mapped at address 0xb6f38000. +Read at address 0x58000014 (0xb6f38014): 0x00000001 +root@dra7xx-evm:~# devmem2 0x58000040 +/dev/mem opened. +Memory mapped at address 0xb6f5f000. +Read at address 0x58000040 (0xb6f5f040): 0x00010001 +root@dra7xx-evm:~# devmem2 0x5800005c +/dev/mem opened. +Memory mapped at address 0xb6f7e000. +Read at address 0x5800005C (0xb6f7e05c): 0x01408A82 + +Hi, Could you please share register values for below two registers for the VP you are using? DISPC_CONTROL DISPC_CONFIG Rgds, Brijesh + +Hi, Since I use DSS LCD1, I dumped registers below: root@dra7xx-evm:~# devmem2 0x58001044 +/dev/mem opened. +Memory mapped at address 0xb6fc1000. +Read at address 0x58001044 (0xb6fc1044): 0x00000804 +root@dra7xx-evm:~# devmem2 0x58001040 +/dev/mem opened. +Memory mapped at address 0xb6f06000. +Read at address 0x58001040 (0xb6f06040): 0x00900129 +root@dra7xx-evm:~# + +Hi Tim, The register settings are correct, you are selecting 16bit output and then using TDM, you are setting 16 bit pixel on two clock cycle over 8bit interface. can you also please take a dump of DISPC_DATA1_CYCLE1, DISPC_DATA1_CYCLE2 and DISPC_DATA1_CYCLE3 registers? This will tell exactly bits are going out on each clock cycle. Also can you please share the register values of the pipeline you are using? Rgds, Brijesh + +Hi Brijesh, For DISPC_DATA1_CYCLE1, DISPC_DATA1_CYCLE2 and DISPC_DATA1_CYCLE3: root@dra7xx-evm:~# omapconf dump 0x580011D4 0x580011Dc +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x580011D4 | 0x00000008 | +| 0x580011D8 | 0x00000008 | +| 0x580011DC | 0x00000000 | +|----------------------------| For register values of the pipeline, I not sure if it is only vid2 which we use as output. I dump those related registers below: root@dra7xx-evm:~# omapconf dump 0x5800114C 0x580011D0 +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x5800114C | 0xB8A00000 | +| 0x58001150 | 0x00000000 | +| 0x58001154 | 0x00000000 | +| 0x58001158 | 0x02CF077F | +| 0x5800115C | 0x42088810 | +| 0x58001160 | 0x07FF07F8 | +| 0x58001164 | 0x00000800 | +| 0x58001168 | 0x00000001 | +| 0x5800116C | 0x00000001 | +| 0x58001170 | 0x04000400 | +| 0x58001174 | 0x02CF077F | +| 0x58001178 | 0x00000000 | +| 0x5800117C | 0x00000000 | +| 0x58001180 | 0x00000000 | +| 0x58001184 | 0x00000000 | +| 0x58001188 | 0x00000000 | +| 0x5800118C | 0x00000000 | +| 0x58001190 | 0x00000000 | +| 0x58001194 | 0x00000000 | +| 0x58001198 | 0x00000000 | +| 0x5800119C | 0x00000000 | +| 0x580011A0 | 0x00000000 | +| 0x580011A4 | 0x00000000 | +| 0x580011A8 | 0x00000000 | +| 0x580011AC | 0x00000000 | +| 0x580011B0 | 0x00000000 | +| 0x580011B4 | 0x00000000 | +| 0x580011B8 | 0x00000000 | +| 0x580011BC | 0x00000000 | +| 0x580011C0 | 0x00000000 | +| 0x580011C4 | 0x00000000 | +| 0x580011C8 | 0x00000000 | +| 0x580011CC | 0x00000000 | +| 0x580011D0 | 0x00000000 | +|----------------------------| + +root@dra7xx-evm:~# omapconf dump 0x58001200 0x58001204 +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001200 | 0x00000000 | +| 0x58001204 | 0x00000000 | +|----------------------------| + +root@dra7xx-evm:~# omapconf dump 0x580016A8 0x580016F8 +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x580016A8 | 0x04000400 | +| 0x580016AC | 0x00000000 | +| 0x580016B0 | 0x00000000 | +| 0x580016B4 | 0x00000000 | +| 0x580016B8 | 0x00000000 | +| 0x580016BC | 0x00000000 | +| 0x580016C0 | 0x00000000 | +| 0x580016C4 | 0x00000000 | +| 0x580016C8 | 0x00000000 | +| 0x580016CC | 0x00000000 | +| 0x580016D0 | 0x00000000 | +| 0x580016D4 | 0x00000000 | +| 0x580016D8 | 0x00000000 | +| 0x580016DC | 0x00000000 | +| 0x580016E0 | 0x00000000 | +| 0x580016E4 | 0x00000000 | +| 0x580016E8 | 0x00000000 | +| 0x580016EC | 0x00000000 | +| 0x580016F0 | 0x00000000 | +| 0x580016F4 | 0x00000000 | +| 0x580016F8 | 0x00000000 | +|----------------------------| + +Hi Tim, The data cycle is setup correctly. But looks like VID2 is not used, as it is not enabled. Can you please take dump of VID1/2/3_ATTRUBITE register and also GRPX_ATTRIBUTE register? Could you also please tell what is the input format? is it YUYV (Luma in lower byte) or UYVY (U in lower byte)? Regards, Brijesh + +Hi Brijesh, Sorry, Tim is busy with other tasks. The video input format is YUYV, and dumped some registers. For VID1/2/3_ATTRUBITE register: Read at address 0x580010CC (0xb6f950cc): 0x0208880D Read at address 0x5800115C (0xb6f3d15c): 0x42088811 Read at address 0x58001370 (0xb6f80370): 0x00008400 I did not find the GRPX_ATTRIBUTE register you mentioned. This is the DISPC Registers status. REGS_58001000_58001870.log |----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001000 | 0x00000051 | +| 0x58001004 | 0x00000000 | +| 0x58001008 | 0x00000000 | +| 0x5800100C | 0x00000000 | +| 0x58001010 | 0x00002015 | +| 0x58001014 | 0x00000001 | +| 0x58001018 | 0x00000000 | +| 0x5800101C | 0x00004422 | +| 0x58001020 | 0x00000000 | +| 0x58001024 | 0x00000000 | +| 0x58001028 | 0x00000000 | +| 0x5800102C | 0x00000000 | +| 0x58001030 | 0x00000000 | +| 0x58001034 | 0x00000000 | +| 0x58001038 | 0x00000000 | +| 0x5800103C | 0x00000000 | +| 0x58001040 | 0x00900129 | +| 0x58001044 | 0x00000804 | +| 0x58001048 | 0x00000000 | +| 0x5800104C | 0x00000010 | +| 0x58001050 | 0x00000000 | +| 0x58001054 | 0x00000000 | +| 0x58001058 | 0x00000000 | +| 0x5800105C | 0x00000189 | +| 0x58001060 | 0x000002CB | +| 0x58001064 | 0x09F05F7B | +| 0x58001068 | 0x00C00622 | +| 0x5800106C | 0x00007000 | +| 0x58001070 | 0x00010001 | +| 0x58001074 | 0xFFFFFFFF | +| 0x58001078 | 0x00000000 | +| 0x5800107C | 0x02CF077F | +| 0x58001080 | 0x00000000 | +| 0x58001084 | 0x00000000 | +| 0x58001088 | 0x00000000 | +| 0x5800108C | 0x00000000 | +| 0x58001090 | 0x00000000 | +| 0x58001094 | 0x00000000 | +| 0x58001098 | 0x00000000 | +| 0x5800109C | 0x00000000 | +| 0x580010A0 | 0x000000A0 | +| 0x580010A4 | 0x04FF04F8 | +| 0x580010A8 | 0x00000500 | +| 0x580010AC | 0x00000001 | +| 0x580010B0 | 0x00000001 | +| 0x580010B4 | 0x00000000 | +| 0x580010B8 | 0x00000000 | +| 0x580010BC | 0x88E4C000 | +| 0x580010C0 | 0x00000000 | +| 0x580010C4 | 0x00000000 | +| 0x580010C8 | 0x02CF077F | +| 0x580010CC | 0x0208880D | +| 0x580010D0 | 0x07FF07F8 | +| 0x580010D4 | 0x00000800 | +| 0x580010D8 | 0x00000001 | +| 0x580010DC | 0x00000001 | +| 0x580010E0 | 0x04000400 | +| 0x580010E4 | 0x02CF077F | +| 0x580010E8 | 0x00000000 | +| 0x580010EC | 0x00000000 | +| 0x580010F0 | 0x00000000 | +| 0x580010F4 | 0x00000000 | +| 0x580010F8 | 0x00000000 | +| 0x580010FC | 0x00000000 | +| 0x58001100 | 0x00000000 | +| 0x58001104 | 0x00000000 | +| 0x58001108 | 0x00000000 | +| 0x5800110C | 0x00000000 | +| 0x58001110 | 0x00000000 | +| 0x58001114 | 0x00000000 | +| 0x58001118 | 0x00000000 | +| 0x5800111C | 0x00000000 | +| 0x58001120 | 0x00000000 | +| 0x58001124 | 0x00000000 | +| 0x58001128 | 0x00000000 | +| 0x5800112C | 0x00000000 | +| 0x58001130 | 0x00000000 | +| 0x58001134 | 0x00000000 | +| 0x58001138 | 0x00000000 | +| 0x5800113C | 0x00000000 | +| 0x58001140 | 0x00000000 | +| 0x58001144 | 0x00000000 | +| 0x58001148 | 0x00000000 | +| 0x5800114C | 0xB8A00000 | +| 0x58001150 | 0x00000000 | +| 0x58001154 | 0x00000000 | +| 0x58001158 | 0x02CF077F | +| 0x5800115C | 0x42088810 | +| 0x58001160 | 0x07FF07F8 | +| 0x58001164 | 0x00000800 | +| 0x58001168 | 0x00000001 | +| 0x5800116C | 0x00000001 | +| 0x58001170 | 0x04000400 | +| 0x58001174 | 0x02CF077F | +| 0x58001178 | 0x00000000 | +| 0x5800117C | 0x00000000 | +| 0x58001180 | 0x00000000 | +| 0x58001184 | 0x00000000 | +| 0x58001188 | 0x00000000 | +| 0x5800118C | 0x00000000 | +| 0x58001190 | 0x00000000 | +| 0x58001194 | 0x00000000 | +| 0x58001198 | 0x00000000 | +| 0x5800119C | 0x00000000 | +| 0x580011A0 | 0x00000000 | +| 0x580011A4 | 0x00000000 | +| 0x580011A8 | 0x00000000 | +| 0x580011AC | 0x00000000 | +| 0x580011B0 | 0x00000000 | +| 0x580011B4 | 0x00000000 | +| 0x580011B8 | 0x00000000 | +| 0x580011BC | 0x00000000 | +| 0x580011C0 | 0x00000000 | +| 0x580011C4 | 0x00000000 | +| 0x580011C8 | 0x00000000 | +| 0x580011CC | 0x00000000 | +| 0x580011D0 | 0x00000000 | +| 0x580011D4 | 0x00000008 | +| 0x580011D8 | 0x00000008 | +| 0x580011DC | 0x00000000 | +| 0x580011E0 | 0x00000000 | +| 0x580011E4 | 0x00000000 | +| 0x580011E8 | 0x00000000 | +| 0x580011EC | 0x00000000 | +| 0x580011F0 | 0x00000000 | +| 0x580011F4 | 0x00000000 | +| 0x580011F8 | 0x00000000 | +| 0x580011FC | 0x00000000 | +| 0x58001200 | 0x00000000 | +| 0x58001204 | 0x00000000 | +| 0x58001208 | 0x00000000 | +| 0x5800120C | 0x00000000 | +| 0x58001210 | 0x00000000 | +| 0x58001214 | 0x00000000 | +| 0x58001218 | 0x00000000 | +| 0x5800121C | 0x00000000 | +| 0x58001220 | 0x00000000 | +| 0x58001224 | 0x00000000 | +| 0x58001228 | 0x00000000 | +| 0x5800122C | 0x00000100 | +| 0x58001230 | 0x00000100 | +| 0x58001234 | 0x00000100 | +| 0x58001238 | 0x00000300 | +| 0x5800123C | 0x00000000 | +| 0x58001240 | 0x00000000 | +| 0x58001244 | 0x00000000 | +| 0x58001248 | 0x00000000 | +| 0x5800124C | 0x00000000 | +| 0x58001250 | 0x00000000 | +| 0x58001254 | 0x00000000 | +| 0x58001258 | 0x00000000 | +| 0x5800125C | 0x00000000 | +| 0x58001260 | 0x00000000 | +| 0x58001264 | 0x00000000 | +| 0x58001268 | 0x00000000 | +| 0x5800126C | 0x00000000 | +| 0x58001270 | 0x00000000 | +| 0x58001274 | 0x00000000 | +| 0x58001278 | 0x00000000 | +| 0x5800127C | 0x00000000 | +| 0x58001280 | 0x00000000 | +| 0x58001284 | 0x00000000 | +| 0x58001288 | 0x00000000 | +| 0x5800128C | 0x00000000 | +| 0x58001290 | 0x00000000 | +| 0x58001294 | 0x00000000 | +| 0x58001298 | 0x00000000 | +| 0x5800129C | 0x00000000 | +| 0x580012A0 | 0x00000000 | +| 0x580012A4 | 0x00000000 | +| 0x580012A8 | 0x00000000 | +| 0x580012AC | 0x00000000 | +| 0x580012B0 | 0x00000000 | +| 0x580012B4 | 0x00000000 | +| 0x580012B8 | 0x00000000 | +| 0x580012BC | 0x00000000 | +| 0x580012C0 | 0x00000000 | +| 0x580012C4 | 0x00000000 | +| 0x580012C8 | 0x00000000 | +| 0x580012CC | 0x00000000 | +| 0x580012D0 | 0x00000000 | +| 0x580012D4 | 0x00000000 | +| 0x580012D8 | 0x00000000 | +| 0x580012DC | 0x00000000 | +| 0x580012E0 | 0x00000000 | +| 0x580012E4 | 0x00000000 | +| 0x580012E8 | 0x00000000 | +| 0x580012EC | 0x00000000 | +| 0x580012F0 | 0x00000000 | +| 0x580012F4 | 0x00000000 | +| 0x580012F8 | 0x00000000 | +| 0x580012FC | 0x00000000 | +| 0x58001300 | 0x00000000 | +| 0x58001304 | 0x00000000 | +| 0x58001308 | 0x00000000 | +| 0x5800130C | 0x00000000 | +| 0x58001310 | 0x00000000 | +| 0x58001314 | 0x00000000 | +| 0x58001318 | 0x00000000 | +| 0x5800131C | 0x00000000 | +| 0x58001320 | 0x00000000 | +| 0x58001324 | 0x00000000 | +| 0x58001328 | 0x00000000 | +| 0x5800132C | 0x00000000 | +| 0x58001330 | 0x00000000 | +| 0x58001334 | 0x00000000 | +| 0x58001338 | 0x00000000 | +| 0x5800133C | 0x00000000 | +| 0x58001340 | 0x00000000 | +| 0x58001344 | 0x00000000 | +| 0x58001348 | 0x00000000 | +| 0x5800134C | 0x00000000 | +| 0x58001350 | 0x00000000 | +| 0x58001354 | 0x00000000 | +| 0x58001358 | 0x00000000 | +| 0x5800135C | 0x00000000 | +| 0x58001360 | 0x00000000 | +| 0x58001364 | 0x00000000 | +| 0x58001368 | 0x00000000 | +| 0x5800136C | 0x00000000 | +| 0x58001370 | 0x00008400 | +| 0x58001374 | 0x00000000 | +| 0x58001378 | 0x00000000 | +| 0x5800137C | 0x00000000 | +| 0x58001380 | 0x00000000 | +| 0x58001384 | 0x00000000 | +| 0x58001388 | 0x00000800 | +| 0x5800138C | 0x07FF07F8 | +| 0x58001390 | 0x04000400 | +| 0x58001394 | 0x00000000 | +| 0x58001398 | 0x00000001 | +| 0x5800139C | 0x00000000 | +| 0x580013A0 | 0x00000100 | +| 0x580013A4 | 0x00000001 | +| 0x580013A8 | 0x00000000 | +| 0x580013AC | 0x00000000 | +| 0x580013B0 | 0x00000000 | +| 0x580013B4 | 0x00000000 | +| 0x580013B8 | 0x00000000 | +| 0x580013BC | 0x00000000 | +| 0x580013C0 | 0x00000000 | +| 0x580013C4 | 0x00000000 | +| 0x580013C8 | 0x00000000 | +| 0x580013CC | 0x02CF077F | +| 0x580013D0 | 0x00000000 | +| 0x580013D4 | 0x00000000 | +| 0x580013D8 | 0x00000000 | +| 0x580013DC | 0x00000000 | +| 0x580013E0 | 0x00000000 | +| 0x580013E4 | 0x00000000 | +| 0x580013E8 | 0x00000000 | +| 0x580013EC | 0x00000000 | +| 0x580013F0 | 0x00000000 | +| 0x580013F4 | 0x00000000 | +| 0x580013F8 | 0x00000000 | +| 0x580013FC | 0x00000000 | +| 0x58001400 | 0x00000000 | +| 0x58001404 | 0x00000000 | +| 0x58001408 | 0x00000000 | +| 0x5800140C | 0x00040001 | +| 0x58001410 | 0x00000000 | +| 0x58001414 | 0x00000000 | +| 0x58001418 | 0x00000000 | +| 0x5800141C | 0x00000000 | +| 0x58001420 | 0x00000000 | +| 0x58001424 | 0x00000000 | +| 0x58001428 | 0x00000000 | +| 0x5800142C | 0x00000000 | +| 0x58001430 | 0x00000000 | +| 0x58001434 | 0x00000000 | +| 0x58001438 | 0x00000000 | +| 0x5800143C | 0x00000000 | +| 0x58001440 | 0x00000000 | +| 0x58001444 | 0x00000000 | +| 0x58001448 | 0x00000000 | +| 0x5800144C | 0x00000000 | +| 0x58001450 | 0x00000000 | +| 0x58001454 | 0x00000000 | +| 0x58001458 | 0x00000000 | +| 0x5800145C | 0x00000000 | +| 0x58001460 | 0x00000000 | +| 0x58001464 | 0x00000000 | +| 0x58001468 | 0x00000000 | +| 0x5800146C | 0x00000000 | +| 0x58001470 | 0x00000000 | +| 0x58001474 | 0x00000000 | +| 0x58001478 | 0x00000000 | +| 0x5800147C | 0x00000000 | +| 0x58001480 | 0x00000000 | +| 0x58001484 | 0x00000000 | +| 0x58001488 | 0x00000000 | +| 0x5800148C | 0x00000000 | +| 0x58001490 | 0x00000000 | +| 0x58001494 | 0x00000000 | +| 0x58001498 | 0x00000000 | +| 0x5800149C | 0x00000000 | +| 0x580014A0 | 0x00000000 | +| 0x580014A4 | 0x00000000 | +| 0x580014A8 | 0x00000000 | +| 0x580014AC | 0x00000000 | +| 0x580014B0 | 0x00000000 | +| 0x580014B4 | 0x00000000 | +| 0x580014B8 | 0x00000000 | +| 0x580014BC | 0x00000000 | +| 0x580014C0 | 0x00000000 | +| 0x580014C4 | 0x00000000 | +| 0x580014C8 | 0x00000000 | +| 0x580014CC | 0x00000000 | +| 0x580014D0 | 0x00000000 | +| 0x580014D4 | 0x00000000 | +| 0x580014D8 | 0x00000000 | +| 0x580014DC | 0x00000000 | +| 0x580014E0 | 0x00000000 | +| 0x580014E4 | 0x00000000 | +| 0x580014E8 | 0x00000000 | +| 0x580014EC | 0x00000000 | +| 0x580014F0 | 0x00000000 | +| 0x580014F4 | 0x00000000 | +| 0x580014F8 | 0x00000000 | +| 0x580014FC | 0x00000000 | +| 0x58001500 | 0x00000000 | +| 0x58001504 | 0x00000000 | +| 0x58001508 | 0x88E4C000 | +| 0x5800150C | 0x00000000 | +| 0x58001510 | 0x00800000 | +| 0x58001514 | 0x00800000 | +| 0x58001518 | 0x0E7DF601 | +| 0x5800151C | 0x0E7DF6FE | +| 0x58001520 | 0x2172F102 | +| 0x58001524 | 0x2172F1FA | +| 0x58001528 | 0x3762F001 | +| 0x5800152C | 0x3762F0F6 | +| 0x58001530 | 0xF24E4EF2 | +| 0x58001534 | 0xF24E4E00 | +| 0x58001538 | 0xF06237F6 | +| 0x5800153C | 0xF0623701 | +| 0x58001540 | 0xF17221FA | +| 0x58001544 | 0xF1722102 | +| 0x58001548 | 0xF67D0EFE | +| 0x5800154C | 0xF67D0E01 | +| 0x58001550 | 0x00000000 | +| 0x58001554 | 0x0000FE01 | +| 0x58001558 | 0x0000FA02 | +| 0x5800155C | 0x0000F601 | +| 0x58001560 | 0x000000F2 | +| 0x58001564 | 0x000001F6 | +| 0x58001568 | 0x000002FA | +| 0x5800156C | 0x000001FE | +| 0x58001570 | 0x00290A36 | +| 0x58001574 | 0x0096004C | +| 0x58001578 | 0x0080001D | +| 0x5800157C | 0x07EC0795 | +| 0x58001580 | 0x07AC07D5 | +| 0x58001584 | 0x00000080 | +| 0x58001588 | 0x00000800 | +| 0x5800158C | 0x00160008 | +| 0x58001590 | 0x04000400 | +| 0x58001594 | 0x02CF077F | +| 0x58001598 | 0x00000001 | +| 0x5800159C | 0x00000000 | +| 0x580015A0 | 0x00000000 | +| 0x580015A4 | 0x00000001 | +| 0x580015A8 | 0x02CF077F | +| 0x580015AC | 0x00000000 | +| 0x580015B0 | 0x00000000 | +| 0x580015B4 | 0x00000000 | +| 0x580015B8 | 0x00000000 | +| 0x580015BC | 0x00000000 | +| 0x580015C0 | 0x00000000 | +| 0x580015C4 | 0x00000000 | +| 0x580015C8 | 0x00000000 | +| 0x580015CC | 0x00000000 | +| 0x580015D0 | 0x00000000 | +| 0x580015D4 | 0x00000000 | +| 0x580015D8 | 0x00000000 | +| 0x580015DC | 0x00000000 | +| 0x580015E0 | 0x00000000 | +| 0x580015E4 | 0x00000000 | +| 0x580015E8 | 0x00000000 | +| 0x580015EC | 0x00000000 | +| 0x580015F0 | 0x00000000 | +| 0x580015F4 | 0x00000000 | +| 0x580015F8 | 0x00000000 | +| 0x580015FC | 0x00000000 | +| 0x58001600 | 0x00000000 | +| 0x58001604 | 0x00000000 | +| 0x58001608 | 0x00000000 | +| 0x5800160C | 0x00000000 | +| 0x58001610 | 0x00000000 | +| 0x58001614 | 0x00000000 | +| 0x58001618 | 0x00000000 | +| 0x5800161C | 0x00000000 | +| 0x58001620 | 0x00000800 | +| 0x58001624 | 0x00000000 | +| 0x58001628 | 0x00000000 | +| 0x5800162C | 0x00000000 | +| 0x58001630 | 0x00000000 | +| 0x58001634 | 0x00000000 | +| 0x58001638 | 0x00000000 | +| 0x5800163C | 0x04000400 | +| 0x58001640 | 0x00000000 | +| 0x58001644 | 0x00000000 | +| 0x58001648 | 0x00000000 | +| 0x5800164C | 0x00000000 | +| 0x58001650 | 0x00000000 | +| 0x58001654 | 0x00000000 | +| 0x58001658 | 0x00000000 | +| 0x5800165C | 0x00000000 | +| 0x58001660 | 0x00000000 | +| 0x58001664 | 0x00000000 | +| 0x58001668 | 0x00000000 | +| 0x5800166C | 0x00000000 | +| 0x58001670 | 0x00000000 | +| 0x58001674 | 0x00000000 | +| 0x58001678 | 0x00000000 | +| 0x5800167C | 0x00000000 | +| 0x58001680 | 0x00000000 | +| 0x58001684 | 0x00000000 | +| 0x58001688 | 0x00000000 | +| 0x5800168C | 0x00000000 | +| 0x58001690 | 0x00000000 | +| 0x58001694 | 0x00000000 | +| 0x58001698 | 0x00000000 | +| 0x5800169C | 0x00000000 | +| 0x580016A0 | 0x00000000 | +| 0x580016A4 | 0x00000000 | +| 0x580016A8 | 0x04000400 | +| 0x580016AC | 0x00000000 | +| 0x580016B0 | 0x00000000 | +| 0x580016B4 | 0x00000000 | +| 0x580016B8 | 0x00000000 | +| 0x580016BC | 0x00000000 | +| 0x580016C0 | 0x00000000 | +| 0x580016C4 | 0x00000000 | +| 0x580016C8 | 0x00000000 | +| 0x580016CC | 0x00000000 | +| 0x580016D0 | 0x00000000 | +| 0x580016D4 | 0x00000000 | +| 0x580016D8 | 0x00000000 | +| 0x580016DC | 0x00000000 | +| 0x580016E0 | 0x00000000 | +| 0x580016E4 | 0x00000000 | +| 0x580016E8 | 0x00000000 | +| 0x580016EC | 0x00000000 | +| 0x580016F0 | 0x00000000 | +| 0x580016F4 | 0x00000000 | +| 0x580016F8 | 0x00000000 | +| 0x580016FC | 0x00000000 | +| 0x58001700 | 0x00000000 | +|----------------------------| + +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001700 | 0x00000000 | +| 0x58001704 | 0x00000000 | +| 0x58001708 | 0x00000000 | +| 0x5800170C | 0x00000000 | +| 0x58001710 | 0x00000000 | +| 0x58001714 | 0x00000000 | +| 0x58001718 | 0x00000000 | +| 0x5800171C | 0x00000000 | +| 0x58001720 | 0x00000000 | +| 0x58001724 | 0x04000400 | +| 0x58001728 | 0x00000000 | +| 0x5800172C | 0x00000000 | +| 0x58001730 | 0x00000000 | +| 0x58001734 | 0x00000000 | +| 0x58001738 | 0x00000000 | +| 0x5800173C | 0x00000000 | +| 0x58001740 | 0x00000000 | +| 0x58001744 | 0x00000000 | +| 0x58001748 | 0x00000000 | +| 0x5800174C | 0x00000000 | +| 0x58001750 | 0x00000000 | +| 0x58001754 | 0x00000000 | +| 0x58001758 | 0x00000000 | +| 0x5800175C | 0x00000000 | +| 0x58001760 | 0x00000000 | +| 0x58001764 | 0x00000000 | +| 0x58001768 | 0x00000000 | +| 0x5800176C | 0x00000000 | +| 0x58001770 | 0x00000000 | +| 0x58001774 | 0x00000000 | +| 0x58001778 | 0x00000000 | +| 0x5800177C | 0x00000000 | +| 0x58001780 | 0x00000000 | +| 0x58001784 | 0x00000000 | +| 0x58001788 | 0x00000000 | +| 0x5800178C | 0x00000000 | +| 0x58001790 | 0x04000800 | +| 0x58001794 | 0x00000000 | +| 0x58001798 | 0x00000000 | +| 0x5800179C | 0x00000000 | +| 0x580017A0 | 0x00800000 | +| 0x580017A4 | 0x00800000 | +| 0x580017A8 | 0x0E7DF601 | +| 0x580017AC | 0x0E7DF6FE | +| 0x580017B0 | 0x2172F102 | +| 0x580017B4 | 0x2172F1FA | +| 0x580017B8 | 0x3762F001 | +| 0x580017BC | 0x3762F0F6 | +| 0x580017C0 | 0xF24E4EF2 | +| 0x580017C4 | 0xF24E4E00 | +| 0x580017C8 | 0xF06237F6 | +| 0x580017CC | 0xF0623701 | +| 0x580017D0 | 0xF17221FA | +| 0x580017D4 | 0xF1722102 | +| 0x580017D8 | 0xF67D0EFE | +| 0x580017DC | 0xF67D0E01 | +| 0x580017E0 | 0x00000000 | +| 0x580017E4 | 0x0000FE01 | +| 0x580017E8 | 0x0000FA02 | +| 0x580017EC | 0x0000F601 | +| 0x580017F0 | 0x000000F2 | +| 0x580017F4 | 0x000001F6 | +| 0x580017F8 | 0x000002FA | +| 0x580017FC | 0x000001FE | +| 0x58001800 | 0x246D2240 | +| 0x58001804 | 0x00010001 | +| 0x58001808 | 0x00000000 | +| 0x5800180C | 0x00000000 | +| 0x58001810 | 0x00000000 | +| 0x58001814 | 0x00000000 | +| 0x58001818 | 0x00000000 | +| 0x5800181C | 0x00000000 | +| 0x58001820 | 0x00000000 | +| 0x58001824 | 0x00000000 | +| 0x58001828 | 0x00000000 | +| 0x5800182C | 0x00000000 | +| 0x58001830 | 0x00000000 | +| 0x58001834 | 0x00000000 | +| 0x58001838 | 0x00040001 | +| 0x5800183C | 0x00000000 | +| 0x58001840 | 0x00000000 | +| 0x58001844 | 0x00000000 | +| 0x58001848 | 0x00000300 | +| 0x5800184C | 0x00000000 | +| 0x58001850 | 0x00000000 | +| 0x58001854 | 0x00000000 | +| 0x58001858 | 0x00000001 | +| 0x5800185C | 0x00000006 | +| 0x58001860 | 0x00000000 | +| 0x58001864 | 0x00000000 | +| 0x58001868 | 0x00000000 | +| 0x5800186C | 0x00000000 | +| 0x58001870 | 0x00000000 | +|----------------------------| + +Hi Sans, Could you please share me your input YUV order? I mean is Luma stored in lower byte of chroma? In this technique, DSS will send out second byte first, then LSB. So if you are storing Luma in lower byte, then chroma would be sent out first. and if you are storing chroma in lower byte, then luma would be sent out first. Please check your input YUV422 ordering and your expected byte ordering on the receiving end. Regards, Brijesh + +Hi Brijesh, Sorry, can you tell me how to confirm the input YUV order? I try to change the order of yuv format pictures directly by 16 bytes or 32 bytes little-endian to big-endian. The picture color is obviously different. If it is yuv byte misalignment, shouldn't the whole image display abnormally? Thanks. + +Hi Sans, Could you please tell which component are using to get YUV422 output format? is it VPE or DSS WBM2M used to get YUV422 output format? Regards, Brijesh + +Hi Brijesh, We use DSS WBM2M to convert RGB to YUV422. Thanks. + +Hi Sans, Can you please check what is the output formats set in the DSS WBM2M path? You could even try reading WB_ATTRIBUTE register. If Format field in this register is set to 0xB,ie, UYVY format, luma will be sent out on the first clock cycle. But if it is set to 0xA, ie YUYV format, chroma will be sent out on the first clock cycle. So could you please check and format and change according to your receiver requirement? Regards, Brijesh + +Hi Brijesh, The dump register result is as follows: omapconf read 0x58001570 00290A37 FORMAT: 0xF, xRGB15-1555 I think this is because of the modification in the code mentioned earlier: Int32 DisplayLink_drvDisplayCreate(DisplayLink_Obj *pObj) +{ +.... + if(dssPrms->inFmt.dataFormat == SYSTEM_DF_YUV422I_UYVY) + { + /* Convert to BGR565 output */ + dssPrms->inFmt.dataFormat = SYSTEM_DF_BGR16_565; + Vps_printf("Andy: treat SYSTEM_DF_YUV422I_UYVY to SYSTEM_DF_BGR16_565 for display out\n "); + } +.... +} Thanks. + +Hi Sans, Can you read register value at 0x58001570 and share it? Rgds, Brijesh + +Hi Brijesh, The previous omapconf read command can also dump registers. This is the register value dumped: root@dra7xx-evm:~# devmem2 0x58001570 /dev/mem opened. Memory mapped at address 0xb6f56000. Read at address 0x58001570 (0xb6f56570): 0x00290A36 The attachment is the status value of all DISPC registers. DISPC_REGS.log |----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001000 | 0x00000051 | +| 0x58001004 | 0x00000000 | +| 0x58001008 | 0x00000000 | +| 0x5800100C | 0x00000000 | +| 0x58001010 | 0x00002015 | +| 0x58001014 | 0x00000001 | +| 0x58001018 | 0x00000000 | +| 0x5800101C | 0x00004422 | +| 0x58001020 | 0x00000000 | +| 0x58001024 | 0x00000000 | +| 0x58001028 | 0x00000000 | +| 0x5800102C | 0x00000000 | +| 0x58001030 | 0x00000000 | +| 0x58001034 | 0x00000000 | +| 0x58001038 | 0x00000000 | +| 0x5800103C | 0x00000000 | +| 0x58001040 | 0x00900129 | +| 0x58001044 | 0x00000804 | +| 0x58001048 | 0x00000000 | +| 0x5800104C | 0x00000010 | +| 0x58001050 | 0x00000000 | +| 0x58001054 | 0x00000000 | +| 0x58001058 | 0x00000000 | +| 0x5800105C | 0x00000189 | +| 0x58001060 | 0x000002CB | +| 0x58001064 | 0x09F05F7B | +| 0x58001068 | 0x00C00622 | +| 0x5800106C | 0x00007000 | +| 0x58001070 | 0x00010001 | +| 0x58001074 | 0xFFFFFFFF | +| 0x58001078 | 0x00000000 | +| 0x5800107C | 0x02CF077F | +| 0x58001080 | 0x00000000 | +| 0x58001084 | 0x00000000 | +| 0x58001088 | 0x00000000 | +| 0x5800108C | 0x00000000 | +| 0x58001090 | 0x00000000 | +| 0x58001094 | 0x00000000 | +| 0x58001098 | 0x00000000 | +| 0x5800109C | 0x00000000 | +| 0x580010A0 | 0x000000A0 | +| 0x580010A4 | 0x04FF04F8 | +| 0x580010A8 | 0x00000500 | +| 0x580010AC | 0x00000001 | +| 0x580010B0 | 0x00000001 | +| 0x580010B4 | 0x00000000 | +| 0x580010B8 | 0x00000000 | +| 0x580010BC | 0x88E4C000 | +| 0x580010C0 | 0x00000000 | +| 0x580010C4 | 0x00000000 | +| 0x580010C8 | 0x02CF077F | +| 0x580010CC | 0x0208880D | +| 0x580010D0 | 0x07FF07F8 | +| 0x580010D4 | 0x00000800 | +| 0x580010D8 | 0x00000001 | +| 0x580010DC | 0x00000001 | +| 0x580010E0 | 0x04000400 | +| 0x580010E4 | 0x02CF077F | +| 0x580010E8 | 0x00000000 | +| 0x580010EC | 0x00000000 | +| 0x580010F0 | 0x00000000 | +| 0x580010F4 | 0x00000000 | +| 0x580010F8 | 0x00000000 | +| 0x580010FC | 0x00000000 | +| 0x58001100 | 0x00000000 | +| 0x58001104 | 0x00000000 | +| 0x58001108 | 0x00000000 | +| 0x5800110C | 0x00000000 | +| 0x58001110 | 0x00000000 | +| 0x58001114 | 0x00000000 | +| 0x58001118 | 0x00000000 | +| 0x5800111C | 0x00000000 | +| 0x58001120 | 0x00000000 | +| 0x58001124 | 0x00000000 | +| 0x58001128 | 0x00000000 | +| 0x5800112C | 0x00000000 | +| 0x58001130 | 0x00000000 | +| 0x58001134 | 0x00000000 | +| 0x58001138 | 0x00000000 | +| 0x5800113C | 0x00000000 | +| 0x58001140 | 0x00000000 | +| 0x58001144 | 0x00000000 | +| 0x58001148 | 0x00000000 | +| 0x5800114C | 0xB8A00000 | +| 0x58001150 | 0x00000000 | +| 0x58001154 | 0x00000000 | +| 0x58001158 | 0x02CF077F | +| 0x5800115C | 0x42088810 | +| 0x58001160 | 0x07FF07F8 | +| 0x58001164 | 0x00000800 | +| 0x58001168 | 0x00000001 | +| 0x5800116C | 0x00000001 | +| 0x58001170 | 0x04000400 | +| 0x58001174 | 0x02CF077F | +| 0x58001178 | 0x00000000 | +| 0x5800117C | 0x00000000 | +| 0x58001180 | 0x00000000 | +| 0x58001184 | 0x00000000 | +| 0x58001188 | 0x00000000 | +| 0x5800118C | 0x00000000 | +| 0x58001190 | 0x00000000 | +| 0x58001194 | 0x00000000 | +| 0x58001198 | 0x00000000 | +| 0x5800119C | 0x00000000 | +| 0x580011A0 | 0x00000000 | +| 0x580011A4 | 0x00000000 | +| 0x580011A8 | 0x00000000 | +| 0x580011AC | 0x00000000 | +| 0x580011B0 | 0x00000000 | +| 0x580011B4 | 0x00000000 | +| 0x580011B8 | 0x00000000 | +| 0x580011BC | 0x00000000 | +| 0x580011C0 | 0x00000000 | +| 0x580011C4 | 0x00000000 | +| 0x580011C8 | 0x00000000 | +| 0x580011CC | 0x00000000 | +| 0x580011D0 | 0x00000000 | +| 0x580011D4 | 0x00000008 | +| 0x580011D8 | 0x00000008 | +| 0x580011DC | 0x00000000 | +| 0x580011E0 | 0x00000000 | +| 0x580011E4 | 0x00000000 | +| 0x580011E8 | 0x00000000 | +| 0x580011EC | 0x00000000 | +| 0x580011F0 | 0x00000000 | +| 0x580011F4 | 0x00000000 | +| 0x580011F8 | 0x00000000 | +| 0x580011FC | 0x00000000 | +| 0x58001200 | 0x00000000 | +| 0x58001204 | 0x00000000 | +| 0x58001208 | 0x00000000 | +| 0x5800120C | 0x00000000 | +| 0x58001210 | 0x00000000 | +| 0x58001214 | 0x00000000 | +| 0x58001218 | 0x00000000 | +| 0x5800121C | 0x00000000 | +| 0x58001220 | 0x00000000 | +| 0x58001224 | 0x00000000 | +| 0x58001228 | 0x00000000 | +| 0x5800122C | 0x00000100 | +| 0x58001230 | 0x00000100 | +| 0x58001234 | 0x00000100 | +| 0x58001238 | 0x00000300 | +| 0x5800123C | 0x00000000 | +| 0x58001240 | 0x00000000 | +| 0x58001244 | 0x00000000 | +| 0x58001248 | 0x00000000 | +| 0x5800124C | 0x00000000 | +| 0x58001250 | 0x00000000 | +| 0x58001254 | 0x00000000 | +| 0x58001258 | 0x00000000 | +| 0x5800125C | 0x00000000 | +| 0x58001260 | 0x00000000 | +| 0x58001264 | 0x00000000 | +| 0x58001268 | 0x00000000 | +| 0x5800126C | 0x00000000 | +| 0x58001270 | 0x00000000 | +| 0x58001274 | 0x00000000 | +| 0x58001278 | 0x00000000 | +| 0x5800127C | 0x00000000 | +| 0x58001280 | 0x00000000 | +| 0x58001284 | 0x00000000 | +| 0x58001288 | 0x00000000 | +| 0x5800128C | 0x00000000 | +| 0x58001290 | 0x00000000 | +| 0x58001294 | 0x00000000 | +| 0x58001298 | 0x00000000 | +| 0x5800129C | 0x00000000 | +| 0x580012A0 | 0x00000000 | +| 0x580012A4 | 0x00000000 | +| 0x580012A8 | 0x00000000 | +| 0x580012AC | 0x00000000 | +| 0x580012B0 | 0x00000000 | +| 0x580012B4 | 0x00000000 | +| 0x580012B8 | 0x00000000 | +| 0x580012BC | 0x00000000 | +| 0x580012C0 | 0x00000000 | +| 0x580012C4 | 0x00000000 | +| 0x580012C8 | 0x00000000 | +| 0x580012CC | 0x00000000 | +| 0x580012D0 | 0x00000000 | +| 0x580012D4 | 0x00000000 | +| 0x580012D8 | 0x00000000 | +| 0x580012DC | 0x00000000 | +| 0x580012E0 | 0x00000000 | +| 0x580012E4 | 0x00000000 | +| 0x580012E8 | 0x00000000 | +| 0x580012EC | 0x00000000 | +| 0x580012F0 | 0x00000000 | +| 0x580012F4 | 0x00000000 | +| 0x580012F8 | 0x00000000 | +| 0x580012FC | 0x00000000 | +| 0x58001300 | 0x00000000 | +| 0x58001304 | 0x00000000 | +| 0x58001308 | 0x00000000 | +| 0x5800130C | 0x00000000 | +| 0x58001310 | 0x00000000 | +| 0x58001314 | 0x00000000 | +| 0x58001318 | 0x00000000 | +| 0x5800131C | 0x00000000 | +| 0x58001320 | 0x00000000 | +| 0x58001324 | 0x00000000 | +| 0x58001328 | 0x00000000 | +| 0x5800132C | 0x00000000 | +| 0x58001330 | 0x00000000 | +| 0x58001334 | 0x00000000 | +| 0x58001338 | 0x00000000 | +| 0x5800133C | 0x00000000 | +| 0x58001340 | 0x00000000 | +| 0x58001344 | 0x00000000 | +| 0x58001348 | 0x00000000 | +| 0x5800134C | 0x00000000 | +| 0x58001350 | 0x00000000 | +| 0x58001354 | 0x00000000 | +| 0x58001358 | 0x00000000 | +| 0x5800135C | 0x00000000 | +| 0x58001360 | 0x00000000 | +| 0x58001364 | 0x00000000 | +| 0x58001368 | 0x00000000 | +| 0x5800136C | 0x00000000 | +| 0x58001370 | 0x00008400 | +| 0x58001374 | 0x00000000 | +| 0x58001378 | 0x00000000 | +| 0x5800137C | 0x00000000 | +| 0x58001380 | 0x00000000 | +| 0x58001384 | 0x00000000 | +| 0x58001388 | 0x00000800 | +| 0x5800138C | 0x07FF07F8 | +| 0x58001390 | 0x04000400 | +| 0x58001394 | 0x00000000 | +| 0x58001398 | 0x00000001 | +| 0x5800139C | 0x00000000 | +| 0x580013A0 | 0x00000100 | +| 0x580013A4 | 0x00000001 | +| 0x580013A8 | 0x00000000 | +| 0x580013AC | 0x00000000 | +| 0x580013B0 | 0x00000000 | +| 0x580013B4 | 0x00000000 | +| 0x580013B8 | 0x00000000 | +| 0x580013BC | 0x00000000 | +| 0x580013C0 | 0x00000000 | +| 0x580013C4 | 0x00000000 | +| 0x580013C8 | 0x00000000 | +| 0x580013CC | 0x02CF077F | +| 0x580013D0 | 0x00000000 | +| 0x580013D4 | 0x00000000 | +| 0x580013D8 | 0x00000000 | +| 0x580013DC | 0x00000000 | +| 0x580013E0 | 0x00000000 | +| 0x580013E4 | 0x00000000 | +| 0x580013E8 | 0x00000000 | +| 0x580013EC | 0x00000000 | +| 0x580013F0 | 0x00000000 | +| 0x580013F4 | 0x00000000 | +| 0x580013F8 | 0x00000000 | +| 0x580013FC | 0x00000000 | +| 0x58001400 | 0x00000000 | +| 0x58001404 | 0x00000000 | +| 0x58001408 | 0x00000000 | +| 0x5800140C | 0x00040001 | +| 0x58001410 | 0x00000000 | +| 0x58001414 | 0x00000000 | +| 0x58001418 | 0x00000000 | +| 0x5800141C | 0x00000000 | +| 0x58001420 | 0x00000000 | +| 0x58001424 | 0x00000000 | +| 0x58001428 | 0x00000000 | +| 0x5800142C | 0x00000000 | +| 0x58001430 | 0x00000000 | +| 0x58001434 | 0x00000000 | +| 0x58001438 | 0x00000000 | +| 0x5800143C | 0x00000000 | +| 0x58001440 | 0x00000000 | +| 0x58001444 | 0x00000000 | +| 0x58001448 | 0x00000000 | +| 0x5800144C | 0x00000000 | +| 0x58001450 | 0x00000000 | +| 0x58001454 | 0x00000000 | +| 0x58001458 | 0x00000000 | +| 0x5800145C | 0x00000000 | +| 0x58001460 | 0x00000000 | +| 0x58001464 | 0x00000000 | +| 0x58001468 | 0x00000000 | +| 0x5800146C | 0x00000000 | +| 0x58001470 | 0x00000000 | +| 0x58001474 | 0x00000000 | +| 0x58001478 | 0x00000000 | +| 0x5800147C | 0x00000000 | +| 0x58001480 | 0x00000000 | +| 0x58001484 | 0x00000000 | +| 0x58001488 | 0x00000000 | +| 0x5800148C | 0x00000000 | +| 0x58001490 | 0x00000000 | +| 0x58001494 | 0x00000000 | +| 0x58001498 | 0x00000000 | +| 0x5800149C | 0x00000000 | +| 0x580014A0 | 0x00000000 | +| 0x580014A4 | 0x00000000 | +| 0x580014A8 | 0x00000000 | +| 0x580014AC | 0x00000000 | +| 0x580014B0 | 0x00000000 | +| 0x580014B4 | 0x00000000 | +| 0x580014B8 | 0x00000000 | +| 0x580014BC | 0x00000000 | +| 0x580014C0 | 0x00000000 | +| 0x580014C4 | 0x00000000 | +| 0x580014C8 | 0x00000000 | +| 0x580014CC | 0x00000000 | +| 0x580014D0 | 0x00000000 | +| 0x580014D4 | 0x00000000 | +| 0x580014D8 | 0x00000000 | +| 0x580014DC | 0x00000000 | +| 0x580014E0 | 0x00000000 | +| 0x580014E4 | 0x00000000 | +| 0x580014E8 | 0x00000000 | +| 0x580014EC | 0x00000000 | +| 0x580014F0 | 0x00000000 | +| 0x580014F4 | 0x00000000 | +| 0x580014F8 | 0x00000000 | +| 0x580014FC | 0x00000000 | +| 0x58001500 | 0x00000000 | +| 0x58001504 | 0x00000000 | +| 0x58001508 | 0x88E4C000 | +| 0x5800150C | 0x00000000 | +| 0x58001510 | 0x00800000 | +| 0x58001514 | 0x00800000 | +| 0x58001518 | 0x0E7DF601 | +| 0x5800151C | 0x0E7DF6FE | +| 0x58001520 | 0x2172F102 | +| 0x58001524 | 0x2172F1FA | +| 0x58001528 | 0x3762F001 | +| 0x5800152C | 0x3762F0F6 | +| 0x58001530 | 0xF24E4EF2 | +| 0x58001534 | 0xF24E4E00 | +| 0x58001538 | 0xF06237F6 | +| 0x5800153C | 0xF0623701 | +| 0x58001540 | 0xF17221FA | +| 0x58001544 | 0xF1722102 | +| 0x58001548 | 0xF67D0EFE | +| 0x5800154C | 0xF67D0E01 | +| 0x58001550 | 0x00000000 | +| 0x58001554 | 0x0000FE01 | +| 0x58001558 | 0x0000FA02 | +| 0x5800155C | 0x0000F601 | +| 0x58001560 | 0x000000F2 | +| 0x58001564 | 0x000001F6 | +| 0x58001568 | 0x000002FA | +| 0x5800156C | 0x000001FE | +| 0x58001570 | 0x00290A36 | +| 0x58001574 | 0x0096004C | +| 0x58001578 | 0x0080001D | +| 0x5800157C | 0x07EC0795 | +| 0x58001580 | 0x07AC07D5 | +| 0x58001584 | 0x00000080 | +| 0x58001588 | 0x00000800 | +| 0x5800158C | 0x00160008 | +| 0x58001590 | 0x04000400 | +| 0x58001594 | 0x02CF077F | +| 0x58001598 | 0x00000001 | +| 0x5800159C | 0x00000000 | +| 0x580015A0 | 0x00000000 | +| 0x580015A4 | 0x00000001 | +| 0x580015A8 | 0x02CF077F | +| 0x580015AC | 0x00000000 | +| 0x580015B0 | 0x00000000 | +| 0x580015B4 | 0x00000000 | +| 0x580015B8 | 0x00000000 | +| 0x580015BC | 0x00000000 | +| 0x580015C0 | 0x00000000 | +| 0x580015C4 | 0x00000000 | +| 0x580015C8 | 0x00000000 | +| 0x580015CC | 0x00000000 | +| 0x580015D0 | 0x00000000 | +| 0x580015D4 | 0x00000000 | +| 0x580015D8 | 0x00000000 | +| 0x580015DC | 0x00000000 | +| 0x580015E0 | 0x00000000 | +| 0x580015E4 | 0x00000000 | +| 0x580015E8 | 0x00000000 | +| 0x580015EC | 0x00000000 | +| 0x580015F0 | 0x00000000 | +| 0x580015F4 | 0x00000000 | +| 0x580015F8 | 0x00000000 | +| 0x580015FC | 0x00000000 | +| 0x58001600 | 0x00000000 | +| 0x58001604 | 0x00000000 | +| 0x58001608 | 0x00000000 | +| 0x5800160C | 0x00000000 | +| 0x58001610 | 0x00000000 | +| 0x58001614 | 0x00000000 | +| 0x58001618 | 0x00000000 | +| 0x5800161C | 0x00000000 | +| 0x58001620 | 0x00000800 | +| 0x58001624 | 0x00000000 | +| 0x58001628 | 0x00000000 | +| 0x5800162C | 0x00000000 | +| 0x58001630 | 0x00000000 | +| 0x58001634 | 0x00000000 | +| 0x58001638 | 0x00000000 | +| 0x5800163C | 0x04000400 | +| 0x58001640 | 0x00000000 | +| 0x58001644 | 0x00000000 | +| 0x58001648 | 0x00000000 | +| 0x5800164C | 0x00000000 | +| 0x58001650 | 0x00000000 | +| 0x58001654 | 0x00000000 | +| 0x58001658 | 0x00000000 | +| 0x5800165C | 0x00000000 | +| 0x58001660 | 0x00000000 | +| 0x58001664 | 0x00000000 | +| 0x58001668 | 0x00000000 | +| 0x5800166C | 0x00000000 | +| 0x58001670 | 0x00000000 | +| 0x58001674 | 0x00000000 | +| 0x58001678 | 0x00000000 | +| 0x5800167C | 0x00000000 | +| 0x58001680 | 0x00000000 | +| 0x58001684 | 0x00000000 | +| 0x58001688 | 0x00000000 | +| 0x5800168C | 0x00000000 | +| 0x58001690 | 0x00000000 | +| 0x58001694 | 0x00000000 | +| 0x58001698 | 0x00000000 | +| 0x5800169C | 0x00000000 | +| 0x580016A0 | 0x00000000 | +| 0x580016A4 | 0x00000000 | +| 0x580016A8 | 0x04000400 | +| 0x580016AC | 0x00000000 | +| 0x580016B0 | 0x00000000 | +| 0x580016B4 | 0x00000000 | +| 0x580016B8 | 0x00000000 | +| 0x580016BC | 0x00000000 | +| 0x580016C0 | 0x00000000 | +| 0x580016C4 | 0x00000000 | +| 0x580016C8 | 0x00000000 | +| 0x580016CC | 0x00000000 | +| 0x580016D0 | 0x00000000 | +| 0x580016D4 | 0x00000000 | +| 0x580016D8 | 0x00000000 | +| 0x580016DC | 0x00000000 | +| 0x580016E0 | 0x00000000 | +| 0x580016E4 | 0x00000000 | +| 0x580016E8 | 0x00000000 | +| 0x580016EC | 0x00000000 | +| 0x580016F0 | 0x00000000 | +| 0x580016F4 | 0x00000000 | +| 0x580016F8 | 0x00000000 | +| 0x580016FC | 0x00000000 | +| 0x58001700 | 0x00000000 | +|----------------------------| + +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x58001700 | 0x00000000 | +| 0x58001704 | 0x00000000 | +| 0x58001708 | 0x00000000 | +| 0x5800170C | 0x00000000 | +| 0x58001710 | 0x00000000 | +| 0x58001714 | 0x00000000 | +| 0x58001718 | 0x00000000 | +| 0x5800171C | 0x00000000 | +| 0x58001720 | 0x00000000 | +| 0x58001724 | 0x04000400 | +| 0x58001728 | 0x00000000 | +| 0x5800172C | 0x00000000 | +| 0x58001730 | 0x00000000 | +| 0x58001734 | 0x00000000 | +| 0x58001738 | 0x00000000 | +| 0x5800173C | 0x00000000 | +| 0x58001740 | 0x00000000 | +| 0x58001744 | 0x00000000 | +| 0x58001748 | 0x00000000 | +| 0x5800174C | 0x00000000 | +| 0x58001750 | 0x00000000 | +| 0x58001754 | 0x00000000 | +| 0x58001758 | 0x00000000 | +| 0x5800175C | 0x00000000 | +| 0x58001760 | 0x00000000 | +| 0x58001764 | 0x00000000 | +| 0x58001768 | 0x00000000 | +| 0x5800176C | 0x00000000 | +| 0x58001770 | 0x00000000 | +| 0x58001774 | 0x00000000 | +| 0x58001778 | 0x00000000 | +| 0x5800177C | 0x00000000 | +| 0x58001780 | 0x00000000 | +| 0x58001784 | 0x00000000 | +| 0x58001788 | 0x00000000 | +| 0x5800178C | 0x00000000 | +| 0x58001790 | 0x04000800 | +| 0x58001794 | 0x00000000 | +| 0x58001798 | 0x00000000 | +| 0x5800179C | 0x00000000 | +| 0x580017A0 | 0x00800000 | +| 0x580017A4 | 0x00800000 | +| 0x580017A8 | 0x0E7DF601 | +| 0x580017AC | 0x0E7DF6FE | +| 0x580017B0 | 0x2172F102 | +| 0x580017B4 | 0x2172F1FA | +| 0x580017B8 | 0x3762F001 | +| 0x580017BC | 0x3762F0F6 | +| 0x580017C0 | 0xF24E4EF2 | +| 0x580017C4 | 0xF24E4E00 | +| 0x580017C8 | 0xF06237F6 | +| 0x580017CC | 0xF0623701 | +| 0x580017D0 | 0xF17221FA | +| 0x580017D4 | 0xF1722102 | +| 0x580017D8 | 0xF67D0EFE | +| 0x580017DC | 0xF67D0E01 | +| 0x580017E0 | 0x00000000 | +| 0x580017E4 | 0x0000FE01 | +| 0x580017E8 | 0x0000FA02 | +| 0x580017EC | 0x0000F601 | +| 0x580017F0 | 0x000000F2 | +| 0x580017F4 | 0x000001F6 | +| 0x580017F8 | 0x000002FA | +| 0x580017FC | 0x000001FE | +| 0x58001800 | 0x246D2240 | +| 0x58001804 | 0x00010001 | +| 0x58001808 | 0x00000000 | +| 0x5800180C | 0x00000000 | +| 0x58001810 | 0x00000000 | +| 0x58001814 | 0x00000000 | +| 0x58001818 | 0x00000000 | +| 0x5800181C | 0x00000000 | +| 0x58001820 | 0x00000000 | +| 0x58001824 | 0x00000000 | +| 0x58001828 | 0x00000000 | +| 0x5800182C | 0x00000000 | +| 0x58001830 | 0x00000000 | +| 0x58001834 | 0x00000000 | +| 0x58001838 | 0x00040001 | +| 0x5800183C | 0x00000000 | +| 0x58001840 | 0x00000000 | +| 0x58001844 | 0x00000000 | +| 0x58001848 | 0x00000300 | +| 0x5800184C | 0x00000000 | +| 0x58001850 | 0x00000000 | +| 0x58001854 | 0x00000000 | +| 0x58001858 | 0x00000001 | +| 0x5800185C | 0x00000006 | +| 0x58001860 | 0x00000000 | +| 0x58001864 | 0x00000000 | +| 0x58001868 | 0x00000000 | +| 0x5800186C | 0x00000000 | +| 0x58001870 | 0x00000000 | +|----------------------------| + + Thanks. + +Hi Sans, It is set to output in UYVY format, which means DSS will send out luma on the first clock cycle. Is it what is expected by your receiver? Can you try changing output format from DSS WBM2M to value 0xA, by changing output format in DSS M2M driver? Lets say if you are using output format as FVID2_DF_YUV422I_YUYV, then change it to FVID2_DF_YUV422I_UYVY or vice versa... Regards, Brijesh + +Hi Brijesh, After UYVY is converted to YUYV, the image color is abnormal. Sorry, the description of the previous problem is wrong. The color deviation of the previous test picture is because the RGB format of the screenshot software is incorrect. Please ignore the color cast test picture. The output image is like this: The display on the screen is like this, a green halo appears on the white wall. You can see some of the photos, in fact, the halo eyes on the screen can clearly see. Please pay attention to this kind of spots and halos. Thanks. + +Hi Sans, oh ok. I got confused with the color charts that has been shared earlier. I am really doubtful that these artifacts are coming from DSS. DSS does not change pixel values only for part of the frame. Can you please save input to the DSS M2M WB driver and see if that looks correct? I am doubting that the input to the DSS itself has artifacts. so can you please check the input first? Regards, Brijesh + +Hi Brijesh, I saw that Tim’s previous reply has done a similar operation. The images before and after M2M are normal.Currently, only put it to display link display will cause problems. Thanks. + +Hi Sans, But at that time, the doubt was on the color being completely wrong. Since now you have confirmed that color are correct, but there is some artifacts, so i want you to check if the input & output of DSS M2M WB is correct. I really doubt that halo artifacts could be introduced by DSS. Also can you use the gel file from vision_sdk\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\vps\docs\tda2xx\TDA2xx_Dss_RegDump.gel and dump all DSS registers and share it? Could you also share which VP output is used for DSS M2M WB and which for sending out over BT format? Which video pipelines are used in this case? Rgds, Brijesh + +Hi Brijesh , Sorry for late reply. Since now you have confirmed that color are correct, but there is some artifacts, so i want you to check if the input & output of DSS M2M WB is correct. I really doubt that halo artifacts could be introduced by DSS. Sorry Brijesh, I'm don't know how to check input & output of DSS M2M WB is correct. Since I showed pictures on second floor of this thread, I can't see any different. Will halo artifacts happen when DSS out over BT formate? I didn't have CSSStudio, so I can't use TDA2xx_Dss_RegDump.gel to dump register. I use devmem2 to dump it, hope it not hard for you to read. 6735.regDump.txt /dev/mem opened. +Memory mapped at address 0xb6f94000. +Read at address 0x58001010 (0xb6f94010): 0x00002015 +/dev/mem opened. +Memory mapped at address 0xb6ff4000. +Read at address 0x58001014 (0xb6ff4014): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f1b000. +Read at address 0x58001018 (0xb6f1b018): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f67000. +Read at address 0x5800101C (0xb6f6701c): 0x00004422 +/dev/mem opened. +Memory mapped at address 0xb6f49000. +Read at address 0x58001040 (0xb6f49040): 0x00900129 +/dev/mem opened. +Memory mapped at address 0xb6fd3000. +Read at address 0x58001044 (0xb6fd3044): 0x00000804 +/dev/mem opened. +Memory mapped at address 0xb6fed000. +Read at address 0x5800104C (0xb6fed04c): 0x00000010 +/dev/mem opened. +Memory mapped at address 0xb6f29000. +Read at address 0x58001050 (0xb6f29050): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fe8000. +Read at address 0x58001054 (0xb6fe8054): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fb1000. +Read at address 0x58001058 (0xb6fb1058): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fcd000. +Read at address 0x5800105C (0xb6fcd05c): 0x000002C8 +/dev/mem opened. +Memory mapped at address 0xb6fc6000. +Read at address 0x58001060 (0xb6fc6060): 0x000002CB +/dev/mem opened. +Memory mapped at address 0xb6f0e000. +Read at address 0x58001064 (0xb6f0e064): 0x09F05F7B +/dev/mem opened. +Memory mapped at address 0xb6efd000. +Read at address 0x58001068 (0xb6efd068): 0x00C00622 +/dev/mem opened. +Memory mapped at address 0xb6f2e000. +Read at address 0x5800106C (0xb6f2e06c): 0x00007000 +/dev/mem opened. +Memory mapped at address 0xb6f39000. +Read at address 0x58001070 (0xb6f39070): 0x00010001 +/dev/mem opened. +Memory mapped at address 0xb6f9e000. +Read at address 0x58001074 (0xb6f9e074): 0xFFFFFFFF +/dev/mem opened. +Memory mapped at address 0xb6fb3000. +Read at address 0x58001078 (0xb6fb3078): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6faa000. +Read at address 0x5800107C (0xb6faa07c): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f4e000. +Read at address 0x58001080 (0xb6f4e080): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f40000. +Read at address 0x58001084 (0xb6f40084): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f58000. +Read at address 0x58001088 (0xb6f58088): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f1a000. +Read at address 0x5800108C (0xb6f1a08c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f86000. +Read at address 0x580010A0 (0xb6f860a0): 0x000000A0 +/dev/mem opened. +Memory mapped at address 0xb6fcc000. +Read at address 0x580010A4 (0xb6fcc0a4): 0x04FF04F8 +/dev/mem opened. +Memory mapped at address 0xb6f33000. +Read at address 0x580010A8 (0xb6f330a8): 0x00000500 +/dev/mem opened. +Memory mapped at address 0xb6faf000. +Read at address 0x580010AC (0xb6faf0ac): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f16000. +Read at address 0x580010B0 (0xb6f160b0): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f50000. +Read at address 0x580010B8 (0xb6f500b8): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff8000. +Read at address 0x580010BC (0xb6ff80bc): 0x88EB0000 +/dev/mem opened. +Memory mapped at address 0xb6ff5000. +Read at address 0x580010C0 (0xb6ff50c0): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f06000. +Read at address 0x580010C4 (0xb6f060c4): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff1000. +Read at address 0x580010C8 (0xb6ff10c8): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f78000. +Read at address 0x580010CC (0xb6f780cc): 0x0208880D +/dev/mem opened. +Memory mapped at address 0xb6f90000. +Read at address 0x580010D0 (0xb6f900d0): 0x07FF07F8 +/dev/mem opened. +Memory mapped at address 0xb6f7e000. +Read at address 0x580010D4 (0xb6f7e0d4): 0x00000800 +/dev/mem opened. +Memory mapped at address 0xb6f8a000. +Read at address 0x580010D8 (0xb6f8a0d8): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6efe000. +Read at address 0x580010DC (0xb6efe0dc): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6ff0000. +Read at address 0x580010E0 (0xb6ff00e0): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f4b000. +Read at address 0x580010E4 (0xb6f4b0e4): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f57000. +Read at address 0x58001130 (0xb6f57130): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fe9000. +Read at address 0x58001134 (0xb6fe9134): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fb2000. +Read at address 0x58001138 (0xb6fb2138): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f0f000. +Read at address 0x5800113C (0xb6f0f13c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fac000. +Read at address 0x58001140 (0xb6fac140): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f6f000. +Read at address 0x58001154 (0xb6f6f154): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff5000. +Read at address 0x58001158 (0xb6ff5158): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f61000. +Read at address 0x5800115C (0xb6f6115c): 0x42088810 +/dev/mem opened. +Memory mapped at address 0xb6f51000. +Read at address 0x58001160 (0xb6f51160): 0x07FF07F8 +/dev/mem opened. +Memory mapped at address 0xb6fe8000. +Read at address 0x58001164 (0xb6fe8164): 0x00000800 +/dev/mem opened. +Memory mapped at address 0xb6f0d000. +Read at address 0x58001168 (0xb6f0d168): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6fe9000. +Read at address 0x5800116C (0xb6fe916c): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f75000. +Read at address 0x58001170 (0xb6f75170): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f38000. +Read at address 0x58001174 (0xb6f38174): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f3a000. +Read at address 0x580011C0 (0xb6f3a1c0): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f67000. +Read at address 0x580011C4 (0xb6f671c4): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f2e000. +Read at address 0x580011C8 (0xb6f2e1c8): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f49000. +Read at address 0x580011CC (0xb6f491cc): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff2000. +Read at address 0x580011D0 (0xb6ff21d0): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f13000. +Read at address 0x580011D4 (0xb6f131d4): 0x00000008 +/dev/mem opened. +Memory mapped at address 0xb6f73000. +Read at address 0x580011D8 (0xb6f731d8): 0x00000008 +/dev/mem opened. +Memory mapped at address 0xb6f15000. +Read at address 0x580011DC (0xb6f151dc): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fe0000. +Read at address 0x58001220 (0xb6fe0220): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f39000. +Read at address 0x58001224 (0xb6f39224): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f94000. +Read at address 0x58001228 (0xb6f94228): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f61000. +Read at address 0x5800122C (0xb6f6122c): 0x00000100 +/dev/mem opened. +Memory mapped at address 0xb6fcb000. +Read at address 0x58001230 (0xb6fcb230): 0x00000100 +/dev/mem opened. +Memory mapped at address 0xb6f4b000. +Read at address 0x58001234 (0xb6f4b234): 0x00000100 +/dev/mem opened. +Memory mapped at address 0xb6f95000. +Read at address 0x58001238 (0xb6f95238): 0x00000300 +/dev/mem opened. +Memory mapped at address 0xb6fbb000. +Read at address 0x58001240 (0xb6fbb240): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f37000. +Read at address 0x58001244 (0xb6f37244): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff9000. +Read at address 0x58001248 (0xb6ff9248): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f3d000. +Read at address 0x5800124C (0xb6f3d24c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fba000. +Read at address 0x58001370 (0xb6fba370): 0x00008400 +/dev/mem opened. +Memory mapped at address 0xb6f78000. +Read at address 0x58001374 (0xb6f78374): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fe6000. +Read at address 0x58001378 (0xb6fe6378): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f10000. +Read at address 0x5800137C (0xb6f1037c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fbb000. +Read at address 0x58001380 (0xb6fbb380): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fd3000. +Read at address 0x58001384 (0xb6fd3384): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fb0000. +Read at address 0x58001388 (0xb6fb0388): 0x00000800 +/dev/mem opened. +Memory mapped at address 0xb6f1c000. +Read at address 0x5800138C (0xb6f1c38c): 0x07FF07F8 +/dev/mem opened. +Memory mapped at address 0xb6f40000. +Read at address 0x58001390 (0xb6f40390): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f6f000. +Read at address 0x58001394 (0xb6f6f394): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f55000. +Read at address 0x58001398 (0xb6f55398): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6fba000. +Read at address 0x5800139C (0xb6fba39c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fd3000. +Read at address 0x580013A0 (0xb6fd33a0): 0x00000100 +/dev/mem opened. +Memory mapped at address 0xb6f68000. +Read at address 0x580013A4 (0xb6f683a4): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f0d000. +Read at address 0x580013A8 (0xb6f0d3a8): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f79000. +Read at address 0x580013AC (0xb6f793ac): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f90000. +Read at address 0x580013B0 (0xb6f903b0): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f03000. +Read at address 0x580013B4 (0xb6f033b4): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f4d000. +Read at address 0x580013B8 (0xb6f4d3b8): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fcf000. +Read at address 0x580013BC (0xb6fcf3bc): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fb8000. +Read at address 0x580013C0 (0xb6fb83c0): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f4f000. +Read at address 0x580013C4 (0xb6f4f3c4): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f28000. +Read at address 0x580013C8 (0xb6f283c8): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fbe000. +Read at address 0x580013CC (0xb6fbe3cc): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6fb9000. +Read at address 0x58001400 (0xb6fb9400): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f89000. +Read at address 0x58001404 (0xb6f89404): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f72000. +Read at address 0x58001408 (0xb6f72408): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fc3000. +Read at address 0x5800140C (0xb6fc340c): 0x00040001 +/dev/mem opened. +Memory mapped at address 0xb6fcd000. +Read at address 0x58001570 (0xb6fcd570): 0x00290A36 +/dev/mem opened. +Memory mapped at address 0xb6fcf000. +Read at address 0x58001574 (0xb6fcf574): 0x0096004C +/dev/mem opened. +Memory mapped at address 0xb6fdd000. +Read at address 0x58001578 (0xb6fdd578): 0x0080001D +/dev/mem opened. +Memory mapped at address 0xb6f0c000. +Read at address 0x5800157C (0xb6f0c57c): 0x07EC0795 +/dev/mem opened. +Memory mapped at address 0xb6f5c000. +Read at address 0x58001580 (0xb6f5c580): 0x07AC07D5 +/dev/mem opened. +Memory mapped at address 0xb6f08000. +Read at address 0x58001584 (0xb6f08584): 0x00000080 +/dev/mem opened. +Memory mapped at address 0xb6fd1000. +Read at address 0x58001588 (0xb6fd1588): 0x00000800 +/dev/mem opened. +Memory mapped at address 0xb6f83000. +Read at address 0x5800158C (0xb6f8358c): 0x00160008 +/dev/mem opened. +Memory mapped at address 0xb6fb8000. +Read at address 0x58001590 (0xb6fb8590): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f92000. +Read at address 0x58001594 (0xb6f92594): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f3c000. +Read at address 0x58001598 (0xb6f3c598): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6fa1000. +Read at address 0x580015A4 (0xb6fa15a4): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6ff3000. +Read at address 0x580015A8 (0xb6ff35a8): 0x02CF077F +/dev/mem opened. +Memory mapped at address 0xb6f8c000. +Read at address 0x58001600 (0xb6f8c600): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f9d000. +Read at address 0x58001604 (0xb6f9d604): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fcb000. +Read at address 0x58001620 (0xb6fcb620): 0x00000800 +/dev/mem opened. +Memory mapped at address 0xb6f3a000. +Read at address 0x58001624 (0xb6f3a624): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f3e000. +Read at address 0x58001628 (0xb6f3e628): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fc8000. +Read at address 0x5800162C (0xb6fc862c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f78000. +Read at address 0x58001630 (0xb6f78630): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fd9000. +Read at address 0x58001638 (0xb6fd9638): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fef000. +Read at address 0x5800163C (0xb6fef63c): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f87000. +Read at address 0x580016A8 (0xb6f876a8): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6fa4000. +Read at address 0x58001724 (0xb6fa4724): 0x04000400 +/dev/mem opened. +Memory mapped at address 0xb6f5a000. +Read at address 0x58001790 (0xb6f5a790): 0x04000800 +/dev/mem opened. +Memory mapped at address 0xb6fa6000. +Read at address 0x58001800 (0xb6fa6800): 0x246D2240 +/dev/mem opened. +Memory mapped at address 0xb6f8c000. +Read at address 0x58001804 (0xb6f8c804): 0x00010001 +/dev/mem opened. +Memory mapped at address 0xb6f66000. +Read at address 0x58001810 (0xb6f66810): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fe9000. +Read at address 0x58001814 (0xb6fe9814): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f23000. +Read at address 0x58001818 (0xb6f23818): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fa8000. +Read at address 0x5800181C (0xb6fa881c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fdc000. +Read at address 0x58001820 (0xb6fdc820): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f76000. +Read at address 0x58001824 (0xb6f76824): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f11000. +Read at address 0x58001828 (0xb6f11828): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fca000. +Read at address 0x5800182C (0xb6fca82c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fa6000. +Read at address 0x58001830 (0xb6fa6830): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f05000. +Read at address 0x58001834 (0xb6f05834): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff0000. +Read at address 0x58001838 (0xb6ff0838): 0x00040001 +/dev/mem opened. +Memory mapped at address 0xb6f90000. +Read at address 0x5800183C (0xb6f9083c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f9a000. +Read at address 0x58001840 (0xb6f9a840): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6ff3000. +Read at address 0x58001844 (0xb6ff3844): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f9c000. +Read at address 0x58001848 (0xb6f9c848): 0x00000300 +/dev/mem opened. +Memory mapped at address 0xb6ff4000. +Read at address 0x5800184C (0xb6ff484c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f06000. +Read at address 0x58001854 (0xb6f06854): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f11000. +Read at address 0x58001858 (0xb6f11858): 0x00000001 +/dev/mem opened. +Memory mapped at address 0xb6f45000. +Read at address 0x5800185C (0xb6f4585c): 0x00000006 +/dev/mem opened. +Memory mapped at address 0xb6f58000. +Read at address 0x58001860 (0xb6f58860): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f0a000. +Read at address 0x58001864 (0xb6f0a864): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6fbf000. +Read at address 0x58001868 (0xb6fbf868): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f34000. +Read at address 0x5800186C (0xb6f3486c): 0x00000000 +/dev/mem opened. +Memory mapped at address 0xb6f9a000. +Read at address 0x58001870 (0xb6f9a870): 0x00000000 + And I use vout1 for sending out over BT format, and vout2 for DSS M2M WB. Video pipelines is VID1 + +Hi Tim, I see two changes that can potentially change your output on the BT601 format. 1, DISPC_DEFAULT_COLOR0 (0x5800104C) is not set 0x0, please set it to 0x0. 2, I think VID1 is connected to LCD1 and LCD1 is used for the BT601 output format. But z-order is enabled in the vid1. Please disabled z-order in VID1. Regards, Brijesh + +Hi Brijesh, Follow your suggestion, I editored configuration below: 1. root@dra7xx-evm:~# devmem2 0x5800104C /dev/mem opened. Memory mapped at address 0xb6f9a000. Read at address 0x5800104C (0xb6f9a04c): 0x00000000 2. root@dra7xx-evm:~# devmem2 0x580010CC /dev/mem opened. Memory mapped at address 0xb6f3d000. Read at address 0x580010CC (0xb6f3d0cc): 0x0008880D But the problem remain. + +Hi Tim, It would be very difficult to figure out, unless we know how is the input. I checked the registers, it looks fine. So could you try saving the input frame and check the input itself is correct? Regards, Brijesh + +Hi Brijesh, Yes, I'll dump input frame and output frame in receive site. Any discovery I'll share here. Thanks! BR/Tim + +Thank you Tim, i will wait for your reply. + +Hi Brijesh, I dumped input frame and output frame in receive site here: dumprx.rardumptx.rar is input frame and dumprx.rar is output frame. There are two kinds of deviation color dot: 1. more blue dot; 2. block dot; + +add lost attachmentdumptx.rar + +Hi Brijesh, I use 24 colors card to test again and capture one picture of display video: dumppic.rar The difference seems only happened on Y plane and only flip at 5th bit. For example: Tx Y: 0xD0, Rx Y: 0xC0. dumprx1_pic.yuv: receive site after ub964 dumped data. Formate: YUYV422I. 1920x720 dumptx1_pic.yuv: send site before display link dumped data. Formate: UYVY422I. 1920x720 BR/Tim + +Hi Brijesh, Any update? Thanks! BR/Tim + +Hi Tim, The bit can change only because of the below reasons 1, Background color, can you please make sure that the background color is set to 0x0 for the LCD output? 2, Transparency, can you please make sure that the transparency is disabled for the LCD output? 3, pinmux, please make sure that pinmux is setup correctly and is not getting overwritten by other SW component. While display is running, you could read back the pinmux register for all data pins to make sure it is correct and unaffected. Regards, Brijesh + +Hi Brijesh, Thanks for your reply! Sorry, I forget change my background color setting. After that 24 color card much better now, but still have some flip: dump.rar here is my settting: /* Setting other overlay parameters common to both Venc */ + + ovlyPrms->deltaLinesPerPanel = 0; + ovlyPrms->alphaBlenderEnable = 0; + ovlyPrms->backGroundColor = 0; + ovlyPrms->colorKeyEnable = 0; + ovlyPrms->colorKeySel = SYSTEM_DSS_DISPC_TRANS_COLOR_KEY_SRC; + ovlyPrms->ovlyOptimization = SYSTEM_DSS_DISPC_OVLY_FETCH_ALLDATA; + ovlyPrms->transColorKey = DRAW2D_TRANSPARENT_COLOR; + + /* Setting overlay pipe parameters */ + + pipeOvlyPrms[0].pipeLine = SYSTEM_DSS_DISPC_PIPE_VID1; + pipeOvlyPrms[0].globalAlpha = 0xFF; + pipeOvlyPrms[0].preMultiplyAlpha = 0; + pipeOvlyPrms[0].zorderEnable = FALSE; + pipeOvlyPrms[0].zorder = SYSTEM_DSS_DISPC_ZORDER0; + + pipeOvlyPrms[1].pipeLine = SYSTEM_DSS_DISPC_PIPE_VID2; + pipeOvlyPrms[1].globalAlpha = 0xFF; + pipeOvlyPrms[1].preMultiplyAlpha = 0; + pipeOvlyPrms[1].zorderEnable = FALSE; + pipeOvlyPrms[1].zorder = SYSTEM_DSS_DISPC_ZORDER1; + + pipeOvlyPrms[2].pipeLine = SYSTEM_DSS_DISPC_PIPE_VID3; + pipeOvlyPrms[2].globalAlpha = 0xFF; + pipeOvlyPrms[2].preMultiplyAlpha = 0; + pipeOvlyPrms[2].zorderEnable = FALSE; + pipeOvlyPrms[2].zorder = SYSTEM_DSS_DISPC_ZORDER2; + + pipeOvlyPrms[3].pipeLine = SYSTEM_DSS_DISPC_PIPE_GFX1; + pipeOvlyPrms[3].globalAlpha = 0xFF; + pipeOvlyPrms[3].preMultiplyAlpha = 0; + pipeOvlyPrms[3].zorderEnable = FALSE; + pipeOvlyPrms[3].zorder = SYSTEM_DSS_DISPC_ZORDER3; For Transparency, would you please tell me which register should I check? I guess it may be the missed setting. For pinmux, I checked CTRL_CORE_PAD_VOUT1_D* : root@dra7xx-evm:~# omapconf dump 0x4A0035DC 0x4A0035FC +|----------------------------| +| Address (hex) | Data (hex) | +|----------------------------| +| 0x4A0035DC | 0x00090100 | +| 0x4A0035E0 | 0x00090100 | +| 0x4A0035E4 | 0x00090100 | +| 0x4A0035E8 | 0x00090100 | +| 0x4A0035EC | 0x00090100 | +| 0x4A0035F0 | 0x00090100 | +| 0x4A0035F4 | 0x00090100 | +| 0x4A0035F8 | 0x00090100 | +| 0x4A0035FC | 0x00090100 | +|----------------------------| It should be right. Thanks! BR/Tim + +Hi Tim, Can you please check the bit-10 (TCKLCDENABLE) in DISPC_CONFIG register for the LCD output that you are using? Can you also check the background color in the register to confirm if it is set to 0? Check these registers when display is running.. Regards, Brijesh + +Hi Brijesh Tim is away temporarily, I helped him to confirm. We are using LCD1 and I checked the bit-10 (TCKLCDENABLE) in DISPC_CONFIG(0x58001044) value is 0. root@dra7xx-evm:~# omapconf dump 0x58001044 0x58001048 |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0x58001044 | 0x00000804 | | 0x58001048 | 0x00000000 | |----------------------------| The background color register(0x5800104C) setting is also 0. root@dra7xx-evm:~# omapconf dump 0x5800104C 0x58001050 |----------------------------| | Address (hex) | Data (hex) | |----------------------------| | 0x5800104C | 0x00000000 | | 0x58001050 | 0x00000000 | |----------------------------| The register value looks correct. Thanks! + +Hi Sans, Could you also please make sure that the ZORDER bit in the attribute register of the video pipeline you are using to send out the YUV data is set to 0? this will make sure that the blending is also disabled. Please check this register while display is running.. Rgds, Brijesh + +Hi Brijesh, Thanks for your quick reply! Could you also please make sure that the ZORDER bit in the attribute register of the video pipeline you are using to send out the YUV data is set to 0? we use DISPC_VID1_ATTRIBUTES(0x5800 10CC): root@dra7xx-evm:~# devmem2 0x580010CC +/dev/mem opened. +Memory mapped at address 0xb6fdd000. +Read at address 0x580010CC (0xb6fdd0cc): 0x0008880D + but we use DISPC_VID2_ATTRIBUTES(0x5800 115C) as m2mwbLink: root@dra7xx-evm:~# devmem2 0x5800115C +/dev/mem opened. +Memory mapped at address 0xb6f0a000. +Read at address 0x5800115C (0xb6f0a15c): 0x42088810 + Should I chonfigure DISPC_VID2_ATTRIBUTES ZORDER bit also? this will make sure that the blending is also disabled. Is it LCDALPHABLENDERENABLE bit on DISPC_CONFIG(0x58001044) ? San show it " 0x00000804", so it is disabled already. Thanks! BR/Tim + +Hi Tim, Yes, if you are just connecting only one pipeline to the LCD where VID2 is connected, please disable it for VID2 also. Please also set the background color to 0x0 for LCD2. Regards, Brijesh + +Hi Brijesh, I only use VID2 as M2M write back to convert RGB to YUV and use VID1 as display. Anyway, I disabled ZORDER bit in DISPC_VID2_ATTRIBUTES(0x5800 115C) but problem still: root@dra7xx-evm:~# devmem2 0x5800115C +/dev/mem opened. +Memory mapped at address 0xb6f42000. +Read at address 0x5800115C (0xb6f4215c): 0x40088811 + And DISPC_DEFAULT_COLOR2(0x5800 13AC) is also 0: root@dra7xx-evm:~# devmem2 0x580013AC +/dev/mem opened. +Memory mapped at address 0xb6f0a000. +Read at address 0x580013AC (0xb6f0a3ac): 0x00000000 Thanks! BR/Tim + +Hi Tim, Can you please confirm that one bit flip is in the output from DSS WB M2M path? or is it on the display path? Regards, Brijesh + +Hi Brijesh, I quite confirm that one bit flip is on the dispaly path. As I told, I dumped picture after DSS WB M2M and dumped picture after display path, then make those compare and found one bit flip. Picture after display path have deviation problem. Thanks! BR/Tim + +Hi Tim, Do you mean you capture and dumped output from SERDES and then compare it against input? Does DSS WB M2M path output look fine? Let me also again go through the register dump that you have shared earlier. Regards, Brijesh + diff --git a/data2/text/range/30001+/948248.txt b/data2/text/range/30001+/948248.txt new file mode 100644 index 0000000000000000000000000000000000000000..1749eac4b121ef772a96eefff9ce7b12635b42ac --- /dev/null +++ b/data2/text/range/30001+/948248.txt @@ -0,0 +1,1582 @@ +Ticket Name: TDA2SG: tda2x early m4 based chain boot issue + +Query Text: +Part Number: TDA2SG Other Parts Discussed in Thread: PGA460, TDA2, TDA2E Hi, Refer to the VisionSDK_Linux_UserGuide.pdf, I test chapter 3.5 early M4 based chain. My board is D3 tda2xx RVP board. hdmi display connect one ch 933 camera. I follow the steps: 1. patch kernel : do in chapter 3.4: earlyboot-kernel-patches for kernel 2. set EARLY_USECASE_ENABLE=yes 3. After compile, burn to SD card and exec early-boot-update.sh 4. SD boot on RVP board After power on, when kernel initial complete, the hdmi don't display. Then root login and exec apps.out. The system stop. Why can't it enter menu screen? My goal is to make camera video display as soon as possible when power on. Please help to debug. Boot log file attached. BTW, when I only set EARLY_USECASE_ENABLE=yes and don't do any kernel patch. It could display camera image. But it is too long to display. Best regards, Terry + +Responses: +Hi, Can I know the Vision SDK version? You should apply the kernel patches to boot early asap & make sure the HW setup is ready before booting, it requires a 4CH LVDS camera setup Thanks Gaviraju + +Hi Gaviraju, My Vision SDK is 3.07. I had modify the code to suitable my camera and can be used in usecase: lvds_vip_multi_cam_view in RTOS. I only connect one lvds camera. The early boot use the early_capture_late_weston usecase and need one camera. There is no image display and it will stop when exec apps.out attached the boot log. Thanks, early.txt +U-Boot SPL 2016.05 (Oct 13 2020 - 11:22:59) +DRA752-GP ES2.0 +Trying to boot from MMC1 +reading single-stage-boot.dtb +reading uImage +reading uImage +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (terry@ap-server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Oct 13 11:30:13 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: D3 TDA2X FPD8CH +[ 0.000000] bootconsole [earlycon0] enabled +mount: unknown filesystem type 'dev' + +Welcome to Arago 2016.12! + +[ SKIP ] Ordering cycle found, skipping alignment.service +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on udev Kernel Socket. +[ OK ] Created slice User and Session Slice. +[ OK ] Listening on Syslog Socket. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Created slice System Slice. +[ OK ] Reached target Slices. +[ OK ] Created slice system-getty.slice. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Reached target Paths. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Reached target Swap. +[ OK ] Reached target Remote File Systems. +[ OK ] Listening on udev Control Socket. +[ OK ] Listening on Journal Socket. + Starting Create Static Device Nodes in /dev... + Mounting POSIX Message Queue File System... + Mounting Temporary Directory... + Starting Load Kernel Modules... + Starting Setup Virtual Console... + Starting Remount Root and Kernel File Systems... + Starting Journal Service... + Mounting Debug File System... +[ OK ] Mounted Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory. +[ OK ] Started Journal Service. +[ OK ] Started Create Static Device Nodes in /dev. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Remount Root and Kernel File Systems. + Starting Load/Save Random Seed... + Starting udev Coldplug all Devices... + Starting Apply Kernel Variables... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Starting udev Kernel Device Manager... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted /media/ram. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Apply Kernel Variables. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started Create Volatile Files and Directories. +[ OK ] Found device /dev/ttyS0. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started Network Time Synchronization. + Starting Synchronize System and HW clocks... +[ OK ] Reached target System Time Synchronized. +[ OK ] Started Synchronize System and HW clocks. +[ OK ] Reached target System Initialization. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started Kernel Logging Service. + Starting rc.pvr.service... +[ OK ] Started System Logging Service. + Starting Login Service... + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. + Starting Network Service... +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Started Permit User Sessions. +[ OK ] Started Network Service. +[ OK ] Started rc.pvr.service. +[ OK ] Started Login Service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. + Starting weston.service... +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started weston.service. +[ OK ] Started Network Name Resolution. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# insmod cmemk.ko phys_start=0xa9000000 phys_end=0xaafa4000 pools=4x8294400 +root@dra7xx-evm:/opt/vision_sdk# ./vision_sdk_load.sh +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +./disableDssInterruptsOnA15.sh: line 11: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002ADA:: command not found +updated 0x4A002ADA value is 00930000 +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6938000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d38000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3c78000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3cb8000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 + [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 672.203226 s: SYSTEM: System A15 Init in progress !!! + + Terry + +Hi, Have you applied the kernel patch? Thanks Gaviraju + +Hi, Yes, I had apply kernel patch. Thanks, Terry + +Hi, Can you share the O/P of the "git log"? Run this command from the omap directory Share the O/P of make -s showconfig (Run this command from the vision SDK build directory) Are you using the EVM board or custom board? Did you change anything in the code? apart from the user-guide changes? Thanks Gaviraju + +Hi, 1. git log in omap dir. : commit 0af2ab56214366ea1b8c1ea6ca0dae726dba083a (HEAD -> kernel_dev, tag: REL_VISION_SDK_03_07_00_00) Author: Shravan Karthik Date: Tue Jun 4 18:47:56 2019 +0530 ti_config_fragments: Add CONFIG_BLK_DEV_NVME to default config Cascade radar board has a NVME SSD card mounted on the board. Add NVME driver support by default in the kernel config Signed-off-by: Shravan Karthik commit 9e4a96e876ff8cfffe8694f38f27635dfbc18f3f Author: Shravan Karthik Date: Tue Jun 4 18:45:32 2019 +0530 arm: dts: Change board name for cascade radar DTB Signed-off-by: Shravan Karthik commit 12d7cbeff8522722c1981d49b8e07d81fdd887ce --------------------------------------------------------------------------------------------------- 2. make -s showconfig in sdk build directory: # # Build Config is [ tda2xx_rvp_linux_all ] # Build Config file is @ /ssd1/terry/vsdk3.7-rvp/vision_sdk/configs/tda2xx_rvp_linux_all/cfg.mk # Build Config .h file is @ /ssd1/terry/vsdk3.7-rvp/vision_sdk/links_fw/include/config/apps/tda2xx_rvp_linux_all/system_cfg.h # Build CPUs is @ ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=no # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_RVP [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-rvp # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=/ssd1/terry/vsdk3.7-rvp/vision_sdk/../ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # AUTOSAR_APP=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=no # RADAR_STUDIO=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=d3_tda2x_defconfig # DEFAULT_KERNEL_CONFIG=d3_tda2x_defconfig # DEFAULT_DTB=d3-tda2x-fpd8ch.dtb # CMEM_INCLUDE=yes # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=yes # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_autocalibration ALG_dmaSwMs ALG_sparseopticalflow ALG_structurefrommotion ALG_surroundview # # Use-cases included in build, # UC_srv_calibration UC_early_capture_late_weston UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_2mp_3d_srv UC_lvds_vip_multi_cam_3d_adaptive_srv UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_ov490_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_8ch_sgx_display UC_lvds_vip_single_cam_view_sgx_display # # # CPUs that are NOT required but included in config [ tda2xx_rvp_linux_all ], # # # CPUs that are required but not included in config [ tda2xx_rvp_linux_all ], # # ERROR: IPU1_0 MUST be included in application # # Edit /ssd1/terry/vsdk3.7-rvp/vision_sdk/apps/configs/tda2xx_rvp_linux_all/cfg.mk to include or exclude CPUs in an application # ---------------------------------------------------------------------------------------------------------------------------------------- 3. I use the D3 tda2xx rvp evm board, not the TI evm. so I set MAKECONFIG?=tda2xx_rvp_linux_all in Rules.make 4. I change code to use my lvds yuv camera and it work fine in rtos or liunx usecase. Thanks, Terry + +Hi, Please apply the kernel patch file & rebuild the kernel otherwise it won't work cd $(INSTALL_DIR)/ti_components/os_tools/linux/kernel/omap +git am ../linux-kernel-addon/earlyboot-kernel-patches/* +cd $(INSTALL_DIR)/vision_sdk/build +make linux +make linux_install Do the remaining step for SD card preparation & run the early boot update script Thanks Gaviraju + +Hi, I had apply kernel patch and do the steps you said. But it still failed to display. boot log: 6013.early.txt +U-Boot SPL 2016.05-00016-gcc5b418cb929-dirty (Oct 17 2020 - 11:41:58) +DRA752-GP ES2.0 +Trying to boot from MMC1 +reading single-stage-boot.dtb +reading uImage +reading uImage +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (terry@ap-server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Oct 13 11:30:13 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: D3 TDA2X FPD8CH +[ 0.000000] bootconsole [earlycon0] enabled +mount: unknown filesystem type 'dev' + +Welcome to Arago 2016.12! + +[ SKIP ] Ordering cycle found, skipping alignment.service +[ OK ] Listening on udev Control Socket. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Listening on Journal Socket. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Created slice System Slice. +[ OK ] Created slice system-getty.slice. + Starting Remount Root and Kernel File Systems... +[ OK ] Created slice system-serial\x2dgetty.slice. + Mounting Debug File System... + Starting Setup Virtual Console... +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on Syslog Socket. + Mounting Temporary Directory... +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Reached target Remote File Systems. +[ OK ] Reached target Swap. + Starting Load Kernel Modules... +[ OK ] Listening on udev Kernel Socket. + Starting Journal Service... + Starting Create Static Device Nodes in /dev... + Mounting POSIX Message Queue File System... +[ OK ] Created slice User and Session Slice. +[ OK ] Reached target Slices. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Reached target Paths. +[ OK ] Mounted Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. + Starting Apply Kernel Variables... + Starting Rebuild Hardware Database... + Starting Load/Save Random Seed... + Starting Rebuild Dynamic Linker Cache... +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Journal Service. + Starting Flush Journal to Persistent Storage... + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... +[ OK ] Mounted /media/ram. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems. + Starting Rebuild Journal Catalog... + Starting Create Volatile Files and Directories... +[ OK ] Started Create Volatile Files and Directories. + Starting Network Time Synchronization... + Starting Update UTMP about System Boot/Shutdown... + Starting Opkg first boot configure... +[ OK ] Started Network Time Synchronization. +[ OK ] Started Rebuild Journal Catalog. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks... +[ OK ] Started udev Kernel Device Manager. +[FAILED] Failed to start Synchronize System and HW clocks. +See 'systemctl status sync-clocks.service' for details. +[ OK ] Started Rebuild Hardware Database. + Starting udev Coldplug all Devices... +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started Opkg first boot configure. +[ OK ] Started Rebuild Dynamic Linker Cache. + Starting Update is Completed... +[ OK ] Started Update is Completed. +[ OK ] Reached target System Initialization. +[ OK ] Listening on dropbear.socket. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started Kernel Logging Service. + Starting rc.pvr.service... + Starting Permit User Sessions... +[ OK ] Started System Logging Service. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Started D-Bus System Message Bus. + Starting Network Service... + Starting Login Service... +[ OK ] Started rc.pvr.service. +[ OK ] Started Permit User Sessions. +[ OK ] Started Network Service. +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started Getty on tty1. + Starting weston.service... +[ OK ] Started Network Name Resolution. +[ OK ] Started weston.service. +[ OK ] Started Login Service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. +[ TIME ] Timed out waiting for device dev-ttyS0.device. +[DEPEND] Dependency failed for Serial Getty on ttyS0. +[ TIME ] Timed out waiting for device dev-ttyO0.device. +[DEPEND] Dependency failed for Serial Getty on ttyO0. +[ OK ] Reached target Login Prompts. +[ OK ] Reached target Multi-User System. + Starting Update UTMP about System Runlevel Changes... +[ OK ] Started Update UTMP about System Runlevel Changes. + +U-Boot SPL 2016.05-00016-gcc5b418cb929-dirty (Oct 17 2020 - 11:41:58) +DRA752-GP ES2.0 +Trying to boot from MMC1 +reading single-stage-boot.dtb +reading uImage +reading uImage +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (terry@ap-server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Oct 13 11:30:13 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: D3 TDA2X FPD8CH +[ 0.000000] bootconsole [earlycon0] enabled +mount: unknown filesystem type 'dev' + +Welcome to Arago 2016.12! + +[ SKIP ] Ordering cycle found, skipping alignment.service +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Listening on udev Kernel Socket. +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Listening on Journal Socket. +[ OK ] Reached target Remote File Systems. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Listening on Syslog Socket. +[ OK ] Listening on udev Control Socket. +[ OK ] Created slice User and Session Slice. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Created slice System Slice. + Mounting Temporary Directory... + Starting Setup Virtual Console... + Starting Load Kernel Modules... + Mounting POSIX Message Queue File System... + Mounting Debug File System... +[ OK ] Created slice system-serial\x2dgetty.slice. + Starting Remount Root and Kernel File Systems... +[ OK ] Created slice system-getty.slice. +[ OK ] Reached target Slices. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Reached target Paths. + Starting Create Static Device Nodes in /dev... +[ OK ] Reached target Swap. + Starting Journal Service... +[ OK ] Mounted Debug File System. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory. +[ OK ] Started Setup Virtual Console. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Remount Root and Kernel File Systems. +[ OK ] Started Create Static Device Nodes in /dev. +[ OK ] Started Journal Service. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Starting Flush Journal to Persistent Storage... + Starting Load/Save Random Seed... + Starting udev Coldplug all Devices... + Starting Apply Kernel Variables... +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ OK ] Started Create Volatile Files and Directories. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started Network Time Synchronization. +[ OK ] Found device /dev/ttyS0. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks... +[FAILED] Failed to start Synchronize System and HW clocks. +See 'systemctl status sync-clocks.service' for details. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target System Initialization. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. + Starting rc.pvr.service... + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. + Starting Network Service... + Starting Login Service... +[ OK ] Started System Logging Service. +[ OK ] Started Kernel Logging Service. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Started Network Service. +[ OK ] Started rc.pvr.service. +[ OK ] Started Permit User Sessions. +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. + Starting weston.service... +[ OK ] Reached target Network. + Starting Network Name Resolution... +[ OK ] Started weston.service. +[ OK ] Started Login Service. +[ OK ] Started Network Name Resolution. + Starting tiipclad-daemon.service... + Starting telnetd.service... +[ OK ] Started tiipclad-daemon.service. +[ OK ] Started telnetd.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: + Thanks, Terry + +Hi, The logs shared in the previous post is not having enough information so please share the logs after running the apps.out. Thanks Gaviraju + +Hi, sorry for late response. There is no image displayed and still can't boot into apps.out. It stop at "SYSTEM: System A15 Init in progress !!!" How to debug this issue? Please look the log. early1026.txt U-Boot SPL 2016.05-00016-gcc5b418cb929 (Oct 26 2020 - 17:27:06) +DRA752-GP ES2.0 +Trying to boot from MMC1 +reading single-stage-boot.dtb +reading uImage +reading uImage +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Initializing cgroup subsys cpuset +[ 0.000000] Initializing cgroup subsys cpu +[ 0.000000] Initializing cgroup subsys cpuacct +[ 0.000000] Linux version 4.4.84 (terry@ap-server) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Tue Oct 13 11:30:13 CST 2020 +[ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache +[ 0.000000] Machine model: D3 TDA2X FPD8CH +[ 0.000000] bootconsole [earlycon0] enabled +mount: unknown filesystem type 'dev' + +Welcome to Arago 2016.12! + +[ SKIP ] Ordering cycle found, skipping alignment.service +[ OK ] Listening on udev Control Socket. +[ OK ] Listening on Journal Socket. +[ OK ] Listening on udev Kernel Socket. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Reached target Swap. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Created slice System Slice. + Mounting Debug File System... +[ OK ] Created slice system-serial\x2dgetty.slice. + Mounting Temporary Directory... + Starting Create Static Device Nodes in /dev... +[ OK ] Reached target Paths. +[ OK ] Reached target Remote File Systems. +[ OK ] Listening on Syslog Socket. + Starting Journal Service... + Mounting POSIX Message Queue File System... + Starting Load Kernel Modules... +[ OK ] Created slice User and Session Slice. +[ OK ] Listening on Network Service Netlink Socket. +[ OK ] Reached target Slices. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. + Starting Setup Virtual Console... + Starting Remount Root and Kernel File Systems... +[ OK ] Created slice system-getty.slice. +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Debug File System. +[ OK ] Mounted Temporary Directory. +[ OK ] Started Journal Service. +[ OK ] Started Create Static Device Nodes in /dev. +[FAILED] Failed to start Load Kernel Modules. +See 'systemctl status systemd-modules-load.service' for details. +[ OK ] Started Setup Virtual Console. +[ OK ] Started Remount Root and Kernel File Systems. + Starting udev Coldplug all Devices... + Starting Load/Save Random Seed... + Starting Apply Kernel Variables... + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Starting Flush Journal to Persistent Storage... +[ OK ] Mounted /media/ram. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Flush Journal to Persistent Storage. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ OK ] Started Create Volatile Files and Directories. + Starting Update UTMP about System Boot/Shutdown... + Starting Network Time Synchronization... +[ OK ] Started udev Coldplug all Devices. +[ OK ] Started Network Time Synchronization. +[ OK ] Found device /dev/ttyS0. +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Reached target System Time Synchronized. + Starting Synchronize System and HW clocks... +[FAILED] Failed to start Synchronize System and HW clocks. +See 'systemctl status sync-clocks.service' for details. +[ OK ] Reached target System Initialization. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Listening on dropbear.socket. +[ OK ] Reached target Sockets. +[ OK ] Reached target Basic System. +[ OK ] Started System Logging Service. + Starting Permit User Sessions... +[ OK ] Started D-Bus System Message Bus. +[ OK ] Started Kernel Logging Service. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. + Starting rc.pvr.service... + Starting Network Service... + Starting Login Service... +[ OK ] Started Permit User Sessions. +[ OK ] Started rc.pvr.service. +[ OK ] Started Network Service. +[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. +[ OK ] Reached target Network. + Starting Network Name Resolution... + Starting weston.service... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Started Getty on tty1. +[ OK ] Started Network Name Resolution. +[ OK ] Started weston.service. +[ OK ] Started Login Service. + Starting telnetd.service... + Starting tiipclad-daemon.service... +[ OK ] Started telnetd.service. +[ OK ] Started tiipclad-daemon.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 + +dra7xx-evm login: root +root@dra7xx-evm:~# +root@dra7xx-evm:~# +root@dra7xx-evm:~# ls +decode_ipumm.sh init-demo.sh +root@dra7xx-evm:~# ls +decode_ipumm.sh init-demo.sh +root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# source vision_sdk_load.sh +insmod: ERROR: could not load module ./bin/cmemk.ko: No such file or directory +./disableDssInterruptsOnA15.sh: line 11: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 12: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 13: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 14: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 15: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 16: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 17: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 18: @0x4A002ADA:: command not found +./disableDssInterruptsOnA15.sh: line 19: @0x4A002ADA:: command not found +updated 0x4A002ADA value is 00930000 +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb695c000 of size 0x00100000 + [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3d5c000 of size 0x12c00000 + [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa3c9c000 of size 0x00040000 + [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa3cdc000 of size 0x00080000 + [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 + [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 + [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 + [HOST] OSA: DSP2 Remote Log Shared Memory @ 0xa029e280 + [HOST] OSA: EVE1 Remote Log Shared Memory @ 0xa02c5b20 + [HOST] OSA: EVE2 Remote Log Shared Memory @ 0xa02ed3c0 + [HOST] OSA: EVE3 Remote Log Shared Memory @ 0xa0314c60 + [HOST] OSA: EVE4 Remote Log Shared Memory @ 0xa033c500 + [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 + [HOST] [HOST ] 216.729732 s: SYSTEM: System A15 Init in progress !!! + + Thanks, Terry + +Hi, Please build the A15 application (apps.out) in debug mode & run the same application with the GDB to find out where exactly it's blocking Thanks Gaviraju + +Hi, I do what you said and find it is in while loop at System_waitAppInitComplete(). file path: vsdk3.7/vision_sdk/links_fw/src/hlos/system/system_common.c Void System_waitAppInitComplete(void) +{ + UInt32 procId; + UInt32 initDone[SYSTEM_PROC_MAX] = {0,}; + UInt32 allInitDone; + unsigned int state; + + initDone[SYSTEM_PROC_A15_0] = TRUE; + Vps_printf("System_waitAppInitComplete.....\n"); + while (1) + { + for(procId=0; procId> This indicates the early boot is already working in your setup for the null_src_display usecase & you are facing some issue regarding capture for the usecase early_capture_late_weston. So I'm recommending you to try this usecase or any other LVDS camera usecase in the normal setup then you can try in the early boot setup. This is just to make sure the usecase is working or not in the normal setup & it's easy to debug in the normal setup if any issues found. Thanks Gaviraju + +Hi, You are right. Early boot is already working. There are some bugs in my usecase. The issue is solved. Thanks. Terry + diff --git a/data2/text/range/30001+/953605.txt b/data2/text/range/30001+/953605.txt new file mode 100644 index 0000000000000000000000000000000000000000..5d344ca93b78ca15ed5ac24059d1388773a77151 --- /dev/null +++ b/data2/text/range/30001+/953605.txt @@ -0,0 +1,2217 @@ +Ticket Name: TDA2SX: How to use TAS2505 in TDA2XX + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2, TAS2505 Hi, I use SDK03_05 RTOS on the custom board. I need analog audio output to speakers. Sampling Frequency : 48KHZ Is there an example of using TAS2505 on TDA2XX? Can i read *.wav in the sd card to play audio use TAS2505 and speaker? Best regards, YiTing Hi, I use SDK03_05 RTOS on the custom board. I need analog audio output to speakers. Sampling Frequency : 48KHZ Is there an example of using TAS2505 on TDA2XX? Can i read *.wav in the sd card to play audio use TAS2505 and speaker? Best regards, YiTing + +Responses: +YiTing, I checked the TAS2505 device uses standard I2S mono input that is natively supported by the McASP interface on TDA2. You can refer to: https://training.ti.com/mcasp-primer-training-series for hardware interconnect. Use the PDF in the page for quick reference. On software support, let me check with my colleague as I am not familiar with the VidsionSDK components. regards Jian + +Hi, We don’t have McASP driver support in Vision SDK RTOS. Thanks Gaviraju + +Hi, Can I modify csl_mcasp_transmit_app or drv_stw_lld_mcasp_sinetone_app to satisfymy needs? If available, can you give some suggestion? I modified Mac Sp3 -> Mcasp1, pinmux and I2C and added TAS2505 to initialize in the two examples. mcasp_sinetone can hear the speaker sound, but I am not sure if what I hear is consistent with the audio data. mcaspTransmit can not hear speaker sound. 5808.mcaspTransmit.c /* + * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + /** + * \file mcaspTransmit.c + * + * \brief This file contains the McASP application, designed to meet specific + * requirements - + * 1. Showcase bit clock of 10MHz + * 2. Data output on two data lines + * 3. The McASP to output the data on the lines and observe the same on the CRO. + * + */ + +/* ========================================================================== */ +/* Include Files */ +/* ========================================================================== */ +#include "stdint.h" +#include "stdio.h" +#include "string.h" +#include +#include +#include +#include +#include + +#include + + +/* ========================================================================== */ +/* Macros & Typedefs */ +/* ========================================================================== */ +#if 0 +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_DRA75x) || defined (SOC_AM571x) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) +#define SOC_MCASP_CFG_BASE CSL_MPU_MCASP3_CFG_REGS +#define SOC_MCASP_BASE CSL_MPU_MCASP3_REGS +#endif +#if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) +#define SOC_MCASP_CFG_BASE SOC_MCASP3_CFG_BASE +#define SOC_MCASP_BASE SOC_MCASP3_BASE +#endif +#define SOC_MCASP_3_FIFO_REGS (SOC_MCASP_CFG_BASE + 0x1000) +#define MCASP_RX_DMA_XBAR_INST (132U) +#define MCASP_TX_DMA_XBAR_INST (133U) +#else +#define SOC_MCASP_CFG_BASE SOC_MCASP1_CFG_BASE +#define SOC_MCASP_BASE SOC_MCASP1_BASE +#define SOC_MCASP_1_FIFO_REGS (SOC_MCASP_CFG_BASE + 0x1000) +#define MCASP_RX_DMA_XBAR_INST (128U) +#define MCASP_TX_DMA_XBAR_INST (129U) +#endif + +#else +#define SOC_MCASP_CFG_BASE SOC_MCASP1_CFG_BASE +#define SOC_MCASP_BASE SOC_MCASP1_BASE +#define SOC_MCASP_1_FIFO_REGS (SOC_MCASP_CFG_BASE + 0x1000) +#define MCASP_RX_DMA_XBAR_INST (128U) +#define MCASP_TX_DMA_XBAR_INST (129U) +#endif + +/* +** Values which are configurable +*/ +/* Slot size to send/receive data */ +//#define SLOT_SIZE (32U) +#define SLOT_SIZE (16U) + + +/* Word size to send/receive data. Word size <= Slot size */ +#define WORD_SIZE (32U) +//#define WORD_SIZE (16U) + + +/* Number of channels, L & R */ +#define NUM_I2S_CHANNELS (2U) + +/* Number of samples to be used per audio buffer */ +#define NUM_SAMPLES_PER_AUDIO_BUF (2000U) + +/* Number of buffers used per tx/rx */ +#define NUM_BUF (3U) + +/* Number of linked parameter set used per tx/rx */ +#define NUM_PAR (2U) + +/* Specify where the parameter set starting is */ +#define PAR_ID_START (72U) + +/* Number of samples in loop buffer */ +#define NUM_SAMPLES_LOOP_BUF (10U) + +/* McASP Serializer 0 for Transmit */ +#define MCASP_XSER_TX_0 (0U) + +/* McASP Serializer 1 for Transmit */ +#define MCASP_XSER_TX_1 (1U) + +/* +** Below Macros are calculated based on the above inputs +*/ + +#define I2S_SLOTS ((1 << NUM_I2S_CHANNELS) - 1) + +#define BYTES_PER_SAMPLE ((WORD_SIZE >> 3) \ + * NUM_I2S_CHANNELS) + +#define AUDIO_BUF_SIZE (NUM_SAMPLES_PER_AUDIO_BUF \ + * BYTES_PER_SAMPLE) + +#define TX_DMA_INT_ENABLE (EDMA3CC_OPT_TCC_SET \ + (EDMA3_CHA_MCASP_TX) | (1 \ + << \ + EDMA_TPCC_OPT_TCINTEN_SHIFT)) + +#define PAR_TX_START (PAR_ID_START) + +/* +** Definitions which are not configurable +*/ +#define SIZE_PARAMSET (32U) +#define OPT_FIFO_WIDTH (0x02 << 8U) + +/* +** Definitions which are configurable depending on the core to be used(ARM here) +*/ +#define EDMA3_CHA_MCASP_RX (4) +#define EDMA3_CHA_MCASP_TX (5) + +#define EDMA3_CC_REGION_A15 (0U) +#define EDMA3_CC_REGION_M4 (1U) + +#define EDMA3_CC_QUEUE (0U) + +#define EDMA3_CC_XFER_COMPLETION_INT_A15 (12U) +#define EDMA3_CC_XFER_COMPLETION_INT_M4 (34U) + +#if defined (__ARM_ARCH_7A__) +#define EDMA3_CC_XFER_COMPLETION_INT EDMA3_CC_XFER_COMPLETION_INT_A15 +#elif defined (__TI_ARM_V7M4__) +#define EDMA3_CC_XFER_COMPLETION_INT EDMA3_CC_XFER_COMPLETION_INT_M4 +#endif + +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000U) + +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFU) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000U) + +#define EDMA3_MAX_CROSS_BAR_EVENTS_TI814X (230U) + +#define EDMA3_EVENT_MUX_REG_BASE_ADDR (0x4a002c78) + +/* +** Definitions which are configurable depending on the application requirement +*/ +//#define MCASP_ACLKX_CLKXDIV_VALUE (0x2U) +//#define MCASP_ACLKX_CLKXDIV_VALUE (0x6U)//50.39khz +//#define MCASP_ACLKX_CLKXDIV_VALUE (0x7U) //44.09KHZ + +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x5U) //75MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x10U) //25MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x22U) //12.79MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x23U) //12.28MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x24U) //11.88MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x25U) //11.54MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x26U) //11.579MHZ +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x27U) //11.2895MHZ + +#define MCASP_ACLKX_CLKXDIV_VALUE (0x6U) +#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x9U) + + +//#define HSI2C_SLAVE_ADDR (0x26) +#define HSI2C_SLAVE_ADDR (0x18) +#define TAS2505_ADDR (0x18) + + +#if defined (SOC_AM571x) +#define SOC_I2Cx_BASE (CSL_MPU_I2C5_REGS) +#elif defined (SOC_TDA2EX) || defined (SOC_DRA72x) +#define SOC_I2Cx_BASE (SOC_I2C5_BASE) +#elif defined (SOC_AM574x) || defined (SOC_AM572x) +#define SOC_I2Cx_BASE (CSL_MPU_I2C2_REGS) +#else +//#define SOC_I2Cx_BASE (SOC_I2C2_BASE) +#define SOC_I2Cx_BASE (SOC_I2C3_BASE) +#endif + +/* ========================================================================== */ +/* Function prototypes */ +/* ========================================================================== */ +static void I2SDMAParamInit(void); +static void McASPI2SConfigure(void); +static void I2SDataTxActivate(void); +void SetupI2C(uint8_t addr); +void SetupI2CTransmit(void); +void Configure_Edma_xbar(); +void padConfig_prcmEnable(); +void sampleConfigScr(unsigned int eventNum, + unsigned int chanNum); + + +//PSVT +void PSVT_TAS2505_Init(); +//I2C +void PSVT_I2C_Transmit(aeUInt32 vI2C_Base, aeUInt8 *pData, aeUInt32 vNumBytes); +aeUInt8 PSVT_I2C_Read_Base(aeUInt32 vI2C_Base); +aeUInt32 PSVT_I2C_Get(aeUInt32 vBaseAddr, aeUInt8 vControl, aeUInt8 vAddr); +void PSVT_I2C_Set(aeUInt32 vBaseAddr, aeUInt8 vControl, aeUInt8 vAddr, + aeUInt8 vData); +void delay(uint32_t delay); + + + + +/* ========================================================================== */ +/* Global Variables */ +/* ========================================================================== */ + +/* Global counters to keep track of errors. Can be removed before releasing */ +uint32_t complInterruptCounter = 0x00; +uint32_t errInterruptCounter = 0x00; + +uint8_t dataToSlave; +uint8_t dataFromSlave; + +/* +** Transmit buffers. If any new buffer is to be added, define it here and +** update the NUM_BUF. +*/ +static uint8_t txBuf0[AUDIO_BUF_SIZE]; +static uint8_t txBuf1[AUDIO_BUF_SIZE]; +static uint8_t txBuf2[AUDIO_BUF_SIZE]; + +/* +** The offset of the paRAM ID sent, from starting of the paRAM set. +*/ +static volatile uint16_t parOffSent = 0; + +typedef struct { + volatile unsigned int TPCC_EVTMUX[32]; +} IntmuxRegs; + +typedef volatile IntmuxRegs *IntmuxRegsOvly; + +int16_t _sineWavePattern[] = +{ + 0x0000, 0x0000, 0x10b4, 0x10b4, 0x2120, 0x2120, 0x30fb, 0x30fb, 0x3fff, + 0x3fff, 0x4dea, 0x4dea, 0x5a81, 0x5a81, 0x658b, 0x658b, + 0x6ed8, 0x6ed8, 0x763f, 0x763f, 0x7ba1, 0x7ba1, 0x7ee5, 0x7ee5, 0x7ffd, + 0x7ffd, 0x7ee5, 0x7ee5, 0x7ba1, 0x7ba1, 0x76ef, 0x76ef, + 0x6ed8, 0x6ed8, 0x658b, 0x658b, 0x5a81, 0x5a81, 0x4dea, 0x4dea, 0x3fff, + 0x3fff, 0x30fb, 0x30fb, 0x2120, 0x2120, 0x10b4, 0x10b4, + 0x0000, 0x0000, 0xef4c, 0xef4c, 0xdee0, 0xdee0, 0xcf06, 0xcf06, 0xc002, + 0xc002, 0xb216, 0xb216, 0xa57f, 0xa57f, 0x9a75, 0x9a75, + 0x9128, 0x9128, 0x89c1, 0x89c1, 0x845f, 0x845f, 0x811b, 0x811b, 0x8002, + 0x8002, 0x811b, 0x811b, 0x845f, 0x845f, 0x89c1, 0x89c1, + 0x9128, 0x9128, 0x9a76, 0x9a76, 0xa57f, 0xa57f, 0xb216, 0xb216, 0xc002, + 0xc002, 0xcf06, 0xcf06, 0xdee0, 0xdee0, 0xef4c, 0xef4c +}; + +#if 1 +/* Array of transmit buffer pointers */ +static uint32_t const txBufPtr[NUM_BUF] = +{ + (uint32_t) txBuf0, + (uint32_t) txBuf1, + (uint32_t) txBuf2 +}; +#endif + +/* +** Default paRAM for Transmit section. This will be transmitting from +** a loop buffer. +*/ +#if 1 +static EDMA3CCPaRAMEntry const txDefaultPar = +{ + (uint32_t) (OPT_FIFO_WIDTH), /* Opt field */ + (uint32_t) txBuf0, /* source address */ + (uint16_t) (BYTES_PER_SAMPLE), /* aCnt */ + (uint16_t) (NUM_SAMPLES_LOOP_BUF), /* bCnt */ + (uint32_t) (SOC_MCASP_BASE), /* dest address */ + (uint16_t) (BYTES_PER_SAMPLE), /* source bIdx */ + (uint16_t) (0), /* dest bIdx */ + (uint16_t) (PAR_TX_START * SIZE_PARAMSET), /* link address */ + (uint16_t) (0), /* bCnt reload value */ + (uint16_t) (0), /* source cIdx */ + (uint16_t) (0), /* dest cIdx */ + (uint16_t) 1 /* cCnt */ +}; +#endif + +/* ========================================================================== */ +/* Function Definitions */ +/* ========================================================================== */ +void padConfig_prcmEnable() +{ +#if 0 //Modify by Tim 2020/10/28 +#if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x) + /* Power on McASP instance 3 */ + HW_WR_REG32(0x4a009868, 0x02); + while ((HW_RD_REG32(0x4a009868)) != 0x02U) + { + ; + } + /* Pad mux configuration for McASP instance 3 */ + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_MCASP3_ACLKX,0xc0000); + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_XREF_CLK2,0x40003); + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_MCASP3_FSX,0xc0000); + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_MCASP3_AXR0,0xc0000); + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_MCASP3_AXR1,0xc0000); +#elif defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x) + /* Power on McASP instance 3 */ + HW_WR_REG32(0x4a009868, 0x02); + while ((HW_RD_REG32(0x4a009868)) != 0x02U) + { + ; + } + /* Pad mux configuration for McASP instance 3 */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_MCASP3_ACLKX,0xc0000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_XREF_CLK2,0x40003); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_MCASP3_FSX,0xc0000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_MCASP3_AXR0,0xc0000); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_MCASP3_AXR1,0xc0000); +#else + /* Power on McASP instance 1 */ + HW_WR_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL, 0x02); + while ((HW_RD_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL)) !=0x02U) + { + ; + } + /* Pad mux configuration for McASP instance 1 */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_VOUT1_DE,0x00040001); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_VOUT1_FLD,0x00040001); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_VOUT1_D0,0x00040001); + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_VOUT1_D1,0x00040001); +#endif + +#if defined (SOC_AM571x) + /* Pad mux configuration for I2C instance 5 */ + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_MCASP1_AXR0,0x5000A); +#elif defined (SOC_TDA2EX) || defined (SOC_DRA72x) + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_MCASP1_AXR0,0x5000A); +#elif defined (SOC_AM574x) || defined (SOC_AM572x) + /* Pad mux configuration for I2C instance 2 */ + HW_WR_REG32(CSL_MPU_CORE_PAD_IO_REGISTERS_REGS+CSL_CONTROL_CORE_PAD_IO_PAD_I2C2_SDA,0x00); +#elif defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_DRA75x) + /* Pad mux configuration for I2C instance 2 */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_I2C2_SDA,0x00); +#elif defined (SOC_TDA3XX) || defined (SOC_DRA78x) + /* Pad mux configuration for I2C instance 2 */ + HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_I2C2_SDA,0x00); +#endif +#else + /* Power on McASP instance 1 */ + HW_WR_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL, 0x02); + while ((HW_RD_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL)) !=0x02U) + { + ; + } + + //0x4A003694 0x10003 D18 CTRL_CORE_PAD_XREF_CLK0 xref_clk0 mcasp1_ahclkx + /* MCASP1_DEFAULT */ + //0x4A0036A4 0x50000 C14 CTRL_CORE_PAD_MCASP1_ACLKX mcasp1_aclkx mcasp1_aclkx + /* MCASP1_DEFAULT */ + //0x4A0036A8 0xD0000 D14 CTRL_CORE_PAD_MCASP1_FSX mcasp1_fsx mcasp1_fsx + /* MCASP1_DEFAULT */ + //0x4A0036B4 0xD0000 G12 CTRL_CORE_PAD_MCASP1_AXR0 mcasp1_axr0 mcasp1_axr0 + /* MCASP1_DEFAULT */ + //0x4A0036B8 0xD0000 F12 CTRL_CORE_PAD_MCASP1_AXR1 mcasp1_axr1 mcasp1_axr1 + + HW_WR_REG32(0x4A003694, 0x10003); + HW_WR_REG32(0x4A0036A4, 0x50000); + HW_WR_REG32(0x4A0036A8, 0xD0000); + HW_WR_REG32(0x4A0036B4, 0xD0000); + HW_WR_REG32(0x4A0036B8, 0xD0000); + + //0x4A003778 0x50002 AB4 CTRL_CORE_PAD_GPIO6_11 gpio6_11 i2c3_scl + //0x4A003688 0x50009 E21 CTRL_CORE_PAD_GPIO6_14 gpio6_14 i2c3_sda + HW_WR_REG32(0x4A003778, 0x50002); + HW_WR_REG32(0x4A003688, 0x50009); +#endif +} + +void SetupI2C(uint8_t addr) +{ + /* Put i2c in reset/disabled state */ + I2CMasterDisable(SOC_I2Cx_BASE); + + /* Configure i2c bus speed to 100khz */ + I2CMasterInitExpClk(SOC_I2Cx_BASE, 24000000, + 8000000, 100000); + + I2CMasterEnableFreeRun(SOC_I2Cx_BASE); + + /* Set i2c slave address */ + I2CMasterSlaveAddrSet(SOC_I2Cx_BASE, addr); + + /* Bring i2c out of reset */ + I2CMasterEnable(SOC_I2Cx_BASE); +} + +void SetupI2CTransmit(void) +{ + /* Set data count */ + I2CSetDataCount(SOC_I2Cx_BASE, 2); + + /* + ** Configure i2c as master-transmitter and to generate stop condition + */ + I2CMasterControl(SOC_I2Cx_BASE, I2C_CFG_MST_TX); + + /*Enable transmit ready and stop condition interrupt*/ + I2CMasterIntEnableEx(SOC_I2Cx_BASE, + I2C_INT_TRANSMIT_READY | I2C_INT_STOP_CONDITION); + + /*Generate start conndition*/ + I2CMasterStart(SOC_I2Cx_BASE); + + /*Wait for transmit interrupt to occur*/ + while (I2CMasterIntStatusEx(SOC_I2Cx_BASE, I2C_INT_TRANSMIT_READY) != 0x10) ; + + /*Disable transmit ready and stop condition interrupt*/ + I2CMasterIntDisableEx(SOC_I2Cx_BASE, I2C_INT_TRANSMIT_READY); + + I2CMasterIntDisableEx(SOC_I2Cx_BASE, I2C_INT_STOP_CONDITION); + + /* Send first command word and then the data */ + I2CMasterDataPut(SOC_I2Cx_BASE, 0x00); + I2CMasterDataPut(SOC_I2Cx_BASE, 0x00); +} + +#if 1 +/* +** Initializes the DMA parameters. +** The TX basic paRAM set (channel) is 12. +** +** The TX paRAM sets will be initialized to transmit from the loop buffer. +** The size of the loop buffer can be configured. +** The transfer completion interrupt will not be enabled for paRAM set 1; +** paRAM set 1 will be linked to linked paRAM set starting (PAR_TX_START) of TX. +** All other paRAM sets will be linked to itself. +** and further transmission only happens via linked paRAM set. +** For example, if the PAR_TX_START value is 72, and the number of paRAMS is 2, +** So transmission paRAM set linking will be initialized as 1-->72-->73, 73->73. +*/ +static void I2SDMAParamInit(void) +{ + int32_t *temp; + int16_t *sineToneDataPtr = NULL; + + EDMA3CCPaRAMEntry paramSet; + int i = 0; + + /* Initialize TX Buffers + * + * These patterns are seen/output on serializer0 and serializer1 + */ + #if 0 + for (i = 0; i < (AUDIO_BUF_SIZE / 4); i++) + { + if (0 == (i % 2)) + { + int index; + for (index = 0; index < 4; index++) + { + /* '0xF0' data pattern that yields freq of 1.38MHz */ + txBuf0[4 * i + index] = 0xF0U; + txBuf1[4 * i + index] = 0xF0U; + txBuf2[4 * i + index] = 0xF0U; + } + } + else + { + int index; + for (index = 0; index < 4; index++) + { + /* '0xCC' data pattern that yields freq of 2.77MHz */ + txBuf0[4 * i + index] = 0xCCU; + txBuf1[4 * i + index] = 0xCCU; + txBuf2[4 * i + index] = 0xCCU; + } + } + } + #else + /* Initialize TX Buffers + * + * These patterns are seen/output on serializer0 and serializer1 + */ + + sineToneDataPtr = _sineWavePattern; + temp = (int32_t *) txBuf0; + + for (i = 0; i < (AUDIO_BUF_SIZE / 4); i++) + { + *temp = (int32_t) (*sineToneDataPtr); + temp++; + sineToneDataPtr++; + } + temp = (int32_t *) txBuf1; + /*for (i = 0; i < (AUDIO_BUF_SIZE / 4); i++) + { + *temp = (int32_t) (*sineToneDataPtr); + temp++; + sineToneDataPtr++; + } + temp = (int32_t *) txBuf2; + for (i = 0; i < (AUDIO_BUF_SIZE / 4); i++) + { + *temp = (int32_t) (*sineToneDataPtr); + temp++; + sineToneDataPtr++; + } + #endif*/ + + #if 0 + /* Initialize the 1st paRAM set for transmit */ + memcpy(¶mSet, &txDefaultPar, SIZE_PARAMSET - 2); + + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP_TX, ¶mSet); + + memcpy(¶mSet, &txDefaultPar, SIZE_PARAMSET - 2); + /* Enable Intr for Link Channel */ + paramSet.opt |= TX_DMA_INT_ENABLE; + paramSet.srcAddr = txBufPtr[1]; + paramSet.linkAddr = (PAR_TX_START * SIZE_PARAMSET); + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, (PAR_TX_START), ¶mSet); + + memcpy(¶mSet, &txDefaultPar, SIZE_PARAMSET - 2); + paramSet.srcAddr = txBufPtr[2]; + /* Self Link here */ + paramSet.linkAddr = ((PAR_TX_START + 1) * SIZE_PARAMSET); + #endif + + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, (PAR_TX_START + 1), ¶mSet); + + /* Initialize the 1st paRAM set for transmit */ + memcpy(¶mSet, &txDefaultPar, SIZE_PARAMSET - 2); + + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP3_TX, ¶mSet); + + /*Set Link parameters*/ + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, PAR_TX_START, ¶mSet); +} +#endif + +/* +** Configures the McASP Transmit Section in I2S mode. +*/ +static void McASPI2SConfigure(void) +{ + McASPTxReset(SOC_MCASP_CFG_BASE); + + /* Enable the FIFOs for DMA transfer */ + McASPWriteFifoEnable(SOC_MCASP_CFG_BASE, 2, 1); + + /* Set I2S format in the transmitter/receiver format units */ + McASPTxFmtI2SSet(SOC_MCASP_CFG_BASE, WORD_SIZE, SLOT_SIZE, + MCASP_TX_MODE_DMA); + + McASPTxFrameSyncCfg(SOC_MCASP_CFG_BASE, 2, MCASP_TX_FS_WIDTH_WORD, + MCASP_TX_FS_EXT_BEGIN_ON_FALL_EDGE | + MCASP_TX_FS_INTERNAL); + + + /* configure the clock for transmitter */ + McASPTxClkCfg(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_INTERNAL, + ((MCASP_ACLKX_CLKXDIV_VALUE & + MCASP_ACLKXCTL_CLKXDIV_MASK) >> + MCASP_ACLKXCTL_CLKXDIV_SHIFT), + ((MCASP_AHCLKX_HCLKXDIV_VALUE & + MCASP_AHCLKXCTL_HCLKXDIV_MASK) >> + MCASP_AHCLKXCTL_HCLKXDIV_SHIFT)); + + McASPTxClkPolaritySet(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_POL_FALL_EDGE); + + McASPTxClkCheckConfig(SOC_MCASP_CFG_BASE, MCASP_TX_CLKCHCK_DIV32, + 0x00, 0xFF); + + /* Enable the transmitter/receiver slots. I2S uses 2 slots */ + McASPTxTimeSlotSet(SOC_MCASP_CFG_BASE, I2S_SLOTS); + + /* + ** Set the serializers + */ + McASPSerializerTxSet(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_0); + McASPSerializerTxSet(SOC_MCASP_CFG_BASE, MCASP_XSER_TX_1); + + /* + ** Configure the McASP pins + ** Output - Frame Sync, Clock, Serializer Rx and Serializer Tx + ** (Clocks generated internally) + */ + McASPPinMcASPSet(SOC_MCASP_CFG_BASE, (MCASP_PIN_AFSR | + MCASP_PIN_ACLKR | MCASP_PIN_AFSX | + MCASP_PIN_AHCLKX | + MCASP_PIN_ACLKX | + MCASP_PIN_AMUTE | + MCASP_PIN_AXR(MCASP_XSER_TX_0) | + MCASP_PIN_AXR(MCASP_XSER_TX_1))); + + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AFSR); + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_ACLKR); + + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AFSX); + + /* Configure high clock as Output */ + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AHCLKX); + + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_ACLKX); + + /* Both Serializers used to output data out */ + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AXR(MCASP_XSER_TX_0)); + McASPPinDirOutputSet(SOC_MCASP_CFG_BASE, MCASP_PIN_AXR(MCASP_XSER_TX_1)); +} + +/* +** Activates the data transmission/reception +** The DMA parameters shall be ready before calling this function. +*/ +static void I2SDataTxActivate(void) +{ + /* Start the clocks */ + McASPTxClkStart(SOC_MCASP_CFG_BASE, MCASP_TX_CLK_INTERNAL); + + /* Enable EDMA for the transfer */ + EDMA3EnableTransfer(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP_TX, + EDMA3_TRIG_MODE_EVENT); + + /* Activate the serializers */ + McASPTxSerActivate(SOC_MCASP_CFG_BASE); + + /* make sure that the XDATA bit is cleared to zero */ + while (McASPTxStatusGet(SOC_MCASP_CFG_BASE) & MCASP_TX_STAT_DATAREADY) ; + + /* Activate the state machines */ + McASPTxEnable(SOC_MCASP_CFG_BASE); +} + +void sampleConfigScr(unsigned int eventNum, + unsigned int chanNum) +{ + unsigned int scrChanOffset = 0; + unsigned int scrRegOffset = 0; + unsigned int xBarEvtNum = 0; + IntmuxRegsOvly scrEvtMux = + (IntmuxRegsOvly) (EDMA3_EVENT_MUX_REG_BASE_ADDR); + + if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) && + (chanNum < EDMA3_NUM_TCC)) + { + scrRegOffset = chanNum / 2; + scrChanOffset = chanNum - (scrRegOffset * 2); + xBarEvtNum = (eventNum + 1); + + switch (scrChanOffset) + { + case 0: + scrEvtMux->TPCC_EVTMUX[scrRegOffset] &= + ~(INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK); + scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= + (xBarEvtNum & INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK); + break; + case 1: + scrEvtMux->TPCC_EVTMUX[scrRegOffset] &= + ~(INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK); + scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= + ((xBarEvtNum << + INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) & + (INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK)); + break; + default: + break; + } + } +} + +void Configure_Edma_xbar() +{ + sampleConfigScr(MCASP_RX_DMA_XBAR_INST, EDMA3_CHA_MCASP_TX); +} + +void delay(uint32_t delay) +{ + volatile uint32_t i; + for (i = 0; i < (1000 * delay); ++i) ; +} + +void PSVT_I2C_Transmit(aeUInt32 vI2C_Base, aeUInt8 *pData, aeUInt32 vNumBytes) +{ + aeUInt32 i; + + I2CFIFOClear(vI2C_Base, I2C_TX_MODE); + I2CFIFOClear(vI2C_Base, I2C_RX_MODE); + + /*Clear all interrupt status*/ + I2CMasterIntClearEx(vI2C_Base, I2C_INT_ALL); + + /* Set data count */ + I2CSetDataCount(vI2C_Base, vNumBytes); + + /* + ** Configure i2c as master-transmitter and to generate stop condition + */ + I2CMasterControl(vI2C_Base, I2C_CFG_MST_TX); + + /* generate start */ + I2CMasterStart(vI2C_Base); + + /* wait for bus busy */ + while (I2CMasterBusBusy(vI2C_Base) == 0) + { + } + + for (i = 0; i < vNumBytes; i++) + { + /*Wait for transmit interrupt to occur*/ + while (I2CMasterIntRawStatusEx(vI2C_Base, I2C_INT_TRANSMIT_READY) != 0x10) + ; + + /* Send the data */ + I2CMasterDataPut(vI2C_Base, pData[i]); + + /*Disable transmit ready and stop condition interrupt*/ + I2CMasterIntClearEx(vI2C_Base, I2C_INT_TRANSMIT_READY); + } + + /* generate stop when requested */ + I2CMasterStop(vI2C_Base); + + //Task_sleep(2); + delay(50); + + /*Clear data buffer length*/ + I2CSetDataCount(vI2C_Base, 0); +} + +aeUInt8 PSVT_I2C_Read_Base(aeUInt32 vI2C_Base) +{ + aeUInt8 vI2cReadByte; + + /* Set i2cReadByte count */ + //'I2CSetDataCount(vI2C_Base, 2); + I2CSetDataCount(vI2C_Base, 1); //' + + /* + ** Configure i2c as master-Receiver and to generate stop condition + */ + I2CMasterControl(vI2C_Base, I2C_CFG_MST_RX | I2C_CFG_STOP | I2C_CFG_START); + + /* Wait for receive interrupt to occur */ + while (I2CMasterIntRawStatusEx(vI2C_Base, I2C_INT_RECV_READY) + != I2C_INT_RECV_READY) + ; + + /* Disable transmit ready */ + I2CMasterIntClearEx(vI2C_Base, I2C_INT_RECV_READY); + + /* Read i2cReadByte */ + //'i2cReadByte[1] = I2CMasterDataGet(vI2C_Base); + vI2cReadByte = I2CMasterDataGet(vI2C_Base); + + //Task_sleep(1); + delay(1); + + I2CFlushFifo(vI2C_Base); + + /* Clear all interrupt status */ + I2CMasterIntClearEx(vI2C_Base, I2C_INT_ALL); + + /* Clear i2cReadByte buffer length */ + I2CSetDataCount(vI2C_Base, 0); + + return vI2cReadByte; +} + +aeUInt32 PSVT_I2C_Get(aeUInt32 vBaseAddr, aeUInt8 vControl, aeUInt8 vAddr) +{ + aeUInt32 vResult; + I2CMasterSlaveAddrSet(vBaseAddr, vControl); + PSVT_I2C_Transmit(vBaseAddr, &vAddr, 1); + vResult = PSVT_I2C_Read_Base(vBaseAddr); + return vResult; +} + +void PSVT_I2C_Set(aeUInt32 vBaseAddr, aeUInt8 vControl, aeUInt8 vAddr, + aeUInt8 vData) +{ + aeUInt8 pDataToSlave[2]; + pDataToSlave[0] = vAddr; + pDataToSlave[1] = vData; + I2CMasterSlaveAddrSet(vBaseAddr, vControl); + PSVT_I2C_Transmit(vBaseAddr, pDataToSlave, 2); +} + +void PSVT_TAS2505_Init() +{ + uint16_t vIndx, vArrayLength; + + // 4.0.7 Example Register Setup to Play Digital Data Through DAC and Headphone/Speaker Outputs + UInt8 pTAS2505[] = + { + //# Page switch to Page 0 + 0x00, 0x00, + //# Assert Software reset (P0, R1, D0=1) + 0x01, 0x01, + //# Page Switch to Page 1 + 0x00, 0x01, + //# LDO output programmed as 1.8V and Level shifters powered up. (P1, R2, D5-D4=00, D3=0) + 0x02, 0x00, + //Page switch to Page 0 + 0x00, 0x00, + //# PLL_clkin = MCLK, codec_clkin = PLL_CLK, MCLK should be 11.2896MHz (P0, R4, D1-D0=03) + 0x04, 0x03, + //# Power up PLL, set P=1, R=1, (Page-0, Reg-5) + 0x05, 0x91, + //# Set J=4, (Page-0, Reg-6) + 0x06, 0x04, + //# D = 0000, D(13:8) = 0, (Page-0, Reg-7) + 0x07, 0x00, + //# D(7:0) = 0, (Page-0, Reg-8) + 0x08, 0x00, + //# DAC NDAC Powered up, NDAC=4 (P0, R11, D7=1, D6-D0=0000100) + 0x0B, 0x84, + //# DAC MDAC Powered up, MDAC=2 (P0, R12, D7=1, D6-D0=0000010) + 0x0C, 0x82, + //# DAC OSR(9:0)-> DOSR=128 (P0, R12, D1-D0=00) + 0x0D, 0x00, + //# DAC OSR(9:0)-> DOSR=128 (P0, R13, D7-D0=10000000) + 0x0E, 0x80, + //# Codec Interface control Word length = 16bits, BCLK&WCLK inputs, I2S mode. (P0, R27, D7- + //D6=00, D5-D4=00, D3-D2=00) + 0x1B, 0x00, + //# Data slot offset 00 (P0, R28, D7-D0=0000) + 0x1C, 0x00, + //# Dac Instruction programming PRB #2 for Mono routing. Type interpolation (x8) and 3 programmable + //Biquads. (P0, R60, D4-D0=0010) + 0x3C, 0x02, + //# Page Switch to Page 1 + 0x00, 0x01, + //# Master Reference Powered on (P1, R1, D4=1) + 0x01, 0x10, + //# Output common mode for DAC set to 0.9V (default) (P1, R10) + 0x0A, 0x00, + //# Mixer P output is connected to HP Out Mixer (P1, R12, D2=1) + 0x0C, 0x04, + //# HP Voulme, 0dB Gain (P1, R22, D6-D0=0000000) + 0x16, 0x00, + //# No need to enable Mixer M and Mixer P, AINL Voulme, 0dB Gain (P1, R24, D7=1, D6-D0=0000000) + 0x18, 0x00, + //# Power up HP (P1, R9, D5=1) + 0x09, 0x20, + //# Unmute HP with 0dB gain (P1, R16, D4=1) + 0x10, 0x00, + //# SPK attn. Gain =0dB (P1, R46, D6-D0=000000) + 0x2E, 0x00, + //# SPK driver Gain=6.0dB (P1, R48, D6-D4=001) + 0x30, 0x10, + //# SPK powered up (P1, R45, D1=1) + 0x2D, 0x02, + //# Page switch to Page 0 + 0x00, 0x00, + //# DAC powered up, Soft step 1 per Fs. (P0, R63, D7=1, D5-D4=01, D3-D2=00, D1-D0=00) + 0x3F, 0x90, + //# DAC digital gain 0dB (P0, R65, D7-D0=00000000) + 0x41, 0x00, + //# DAC volume not muted. (P0, R64, D3=0, D2=1) + 0x40, 0x04, + }; + + vArrayLength = sizeof(pTAS2505); + + for (vIndx = 0; vIndx < vArrayLength; vIndx += 2) + { + PSVT_I2C_Set(SOC_I2C3_BASE, TAS2505_ADDR, pTAS2505[vIndx], pTAS2505[vIndx + 1]); + //if((PSVT_I2C_Get(SOC_I2C3_BASE, TAS2505_ADDR, pTAS2505[vIndx])) != pTAS2505[vIndx + 1]) + //{ + //Vps_printf("TAS2505[0x%x] error", pTAS2505[vIndx]); + // } + //Task_sleep(20); + delay(50); + } +} + + +/* +** The main function. Application starts here. +*/ +int main(void) +{ + uint32_t loopHere = 1; + + /*pad config and prcm enable*/ + padConfig_prcmEnable(); + + SetupI2C(HSI2C_SLAVE_ADDR); + + /*Clear 6th bit i.e VIN6_SEL_S0 line*/ + SetupI2CTransmit(); + + PSVT_TAS2505_Init(); + +#if defined (__ARM_ARCH_7A__) + EDMAsetRegion(EDMA3_CC_REGION_A15); +#elif defined (__TI_ARM_V7M4__) + EDMAsetRegion(EDMA3_CC_REGION_M4); +#endif + + EDMA3Init(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CC_QUEUE); + + Configure_Edma_xbar(); + + /* Request EDMA channels */ + EDMA3RequestChannel(SOC_EDMA_TPCC_BASE_VIRT, + EDMA3_CHANNEL_TYPE_DMA, + EDMA3_CHA_MCASP_TX, + EDMA3_CHA_MCASP_TX, + EDMA3_CC_QUEUE); + + /* Initialize the DMA parameters */ + I2SDMAParamInit(); + + /* Configure the McASP for I2S */ + McASPI2SConfigure(); + + /* Activate the audio transmission and reception */ + I2SDataTxActivate(); + + /* + ** Loop forever. + */ + while (loopHere) ; + + return 0; +} +/***************************** End Of File ***********************************/ + 8078.mcasp_transmit_tda2xx.c /* + * Copyright (c) Texas Instruments Incorporated 2012-2017 + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file mcaspTransmit.c + * + * This file contains the McASP application to generate sine tone. + * Enable MACRO DEBUG in case for checking I2C read and write values + * + */ + +/****************************************************************************** + * INCLUDE FILES + *******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#if (defined (__ARM_ARCH_7A__) || defined (_TMS320C6X)) +#include +#endif + +#include "audio_codec.h" +/****************************************************************************** +** INTERNAL MACRO DEFINITIONS +******************************************************************************/ +/* Change MACRO DEBUG to 1 in case for checking I2C read and write values */ +#define DEBUG (1) + +#define SOC_MCASP_1_FIFO_REGS (SOC_MCASP1_CFG_BASE + 0x1000) + +/* +** Values which are configurable +*/ +/* Slot size to send/receive data */ +//#define SLOT_SIZE (32U) +#define SLOT_SIZE (16U) + +/* Word size to send/receive data. Word size <= Slot size */ +//#define WORD_SIZE (32U) +#define WORD_SIZE (16U) + +/* Number of channels, L & R */ +#define NUM_I2S_CHANNELS (2U) + +/* Number of serializer */ +#define NUM_OF_SERIALIZER (1U) + +/* Number of samples to be used per audio buffer */ +#define NUM_SAMPLES_PER_AUDIO_BUF (96U) + +/* Specify where the parameter set starting is */ +#define PAR_ID_START (72U) + +/* McASP Serializer 0 for Transmit */ +#define MCASP_XSER_TX_0 (0U) + +/* +** Below Macros are calculated based on the above inputs +*/ +#define I2S_SLOTS ((1 << NUM_I2S_CHANNELS) - 1) + +#define BYTES_PER_SAMPLE ((WORD_SIZE >> 3) \ + * NUM_OF_SERIALIZER) + +#define AUDIO_BUF_SIZE (NUM_SAMPLES_PER_AUDIO_BUF \ + * BYTES_PER_SAMPLE) + +#define PAR_TX_START (PAR_ID_START) + +/* +** EMDA paRAM set size +*/ +#define SIZE_PARAMSET (32U) + +/* +** Definitions which are configurable depending on the application requirement +*/ +//#define MCASP_ACLKX_CLKXDIV_VALUE (0x6U) +//#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x9U) +#define MCASP_ACLKX_CLKXDIV_VALUE (0x6U) +#define MCASP_AHCLKX_HCLKXDIV_VALUE (0x9U) + +/* +** Audio Codec I2C slave address +*/ +#if defined (SOC_TDA2EX) +#define AUDIO_CODEC_SLAVE_ADDR (0x19) +#else +/* + * In case of TDA2xx rev G or higher boards, if SW8 pin 2 is on, the codec + * address will be 0x19 and if SW8 pin 2 is off, the codec address will be 0x18. + * On lower version of boards codec address is fixed at 0x18. + * + * If the 10 Inch LCD is connected then the address 0x18 conflicts with the + * STM touch screen. So on Rev G and above use 0x19 as default address for codec + * + * To determine the address of codec app will probe 0x19 first, if this fails + * probe 0x18 for alternate address assuming 10 inch LCD is not connected. + * + */ +#define AUDIO_CODEC_SLAVE_ADDR (0x19) +#define AUDIO_CODEC_SLAVE_ADDR_1 (0x18) +#endif + +#define GPIO_IO_EXPANDER_SLAVE_ADDR (0x26) + +/* +** EDMA completion interrupt number +*/ +#define EDMA3_CC_XFER_COMPLETION_INT_A15 (12U) +#define EDMA3_CC_XFER_COMPLETION_INT_DSP (38U) + +#ifdef __ARM_ARCH_7A__ +#define EDMA3_CC_XFER_COMPLETION_INT EDMA3_CC_XFER_COMPLETION_INT_A15 +#elif defined _TMS320C6X +#define EDMA3_CC_XFER_COMPLETION_INT EDMA3_CC_XFER_COMPLETION_INT_DSP +#endif + +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK (0x00FF0000U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT (0x00000010U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_RESETVAL (0x00000000U) + +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK (0x000000FFU) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_SHIFT (0x00000000U) +#define INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_RESETVAL (0x00000000U) + +#define EDMA3_MAX_CROSS_BAR_EVENTS_TI814X (230U) + +#define EDMA3_EVENT_MUX_REG_BASE_ADDR (0x4a002c78) + +/* +** Definitions which are configurable depending on the core to be used +*/ +#define EDMA3_CHA_MCASP3_TX (5) + +#define EDMA3_CC_REGION_A15 (0U) +#define EDMA3_CC_REGION_DSP (2U) + +#define EDMA3_CC_QUEUE (0U) + +#define MCASP3_RX_DMA_XBAR_INST (132U) +#define MCASP3_TX_DMA_XBAR_INST (133U) + +#define MCASP1_RX_DMA_XBAR_INST (128U) +#define MCASP1_TX_DMA_XBAR_INST (129U) + + +#define I2S_MODE (2U) + +/****************************************************************************** +** STRUCTURE DEFINITIONS +******************************************************************************/ +typedef struct { + volatile unsigned int TPCC_EVTMUX[32]; +} IntmuxRegs; + +/****************************************************************************** +** INTERNAL FUNCTION PROTOTYPES +******************************************************************************/ +static void EDMA3IntSetup(void); +static void I2SDMAParamInit(void); +static void McASPI2SConfigure(void); +static void I2SDataTxActivate(void); +static void EDMA3CCComplIsr(void *dummy); + +/*I2C Init*/ +void i2c_init(LLD_Hsi2cInstId_t instId); + +/*I2C De-Init*/ +void i2c_deinit(); + +LLD_hsi2cErrorCode_t I2CWrite(uint8_t address, uint8_t data); +LLD_hsi2cErrorCode_t I2CWrite1(uint8_t address, uint8_t data); +LLD_hsi2cErrorCode_t I2C_Read(uint8_t address, uint8_t *data); +LLD_hsi2cErrorCode_t I2CWriteBf(uint8_t regAddr, uint8_t bfPosition, + uint8_t bfSize, + uint8_t bfData); + +/*Dac Init*/ +//static void aic31InitDac(); +static void PSVT_TAS2505_Init(); + + + +/*Codec Init*/ +//static void aic31MdCreateChan(); + +static LLD_hsi2cErrorCode_t updateAudioCodecAddr(void); + +/****************************************************************************** +** INTERNAL VARIABLE DEFINITIONS +******************************************************************************/ + +typedef volatile IntmuxRegs *IntmuxRegsOvly; + +/* I2C transfer buffer */ +uint8_t data_tx[4]; + +/* I2C Receive buffer */ +uint8_t data_rx[4]; + +int16_t _sineWavePattern[] = +{ + 0x0000, 0x0000, 0x10b4, 0x10b4, 0x2120, 0x2120, 0x30fb, 0x30fb, 0x3fff, + 0x3fff, 0x4dea, 0x4dea, 0x5a81, 0x5a81, 0x658b, 0x658b, + 0x6ed8, 0x6ed8, 0x763f, 0x763f, 0x7ba1, 0x7ba1, 0x7ee5, 0x7ee5, 0x7ffd, + 0x7ffd, 0x7ee5, 0x7ee5, 0x7ba1, 0x7ba1, 0x76ef, 0x76ef, + 0x6ed8, 0x6ed8, 0x658b, 0x658b, 0x5a81, 0x5a81, 0x4dea, 0x4dea, 0x3fff, + 0x3fff, 0x30fb, 0x30fb, 0x2120, 0x2120, 0x10b4, 0x10b4, + 0x0000, 0x0000, 0xef4c, 0xef4c, 0xdee0, 0xdee0, 0xcf06, 0xcf06, 0xc002, + 0xc002, 0xb216, 0xb216, 0xa57f, 0xa57f, 0x9a75, 0x9a75, + 0x9128, 0x9128, 0x89c1, 0x89c1, 0x845f, 0x845f, 0x811b, 0x811b, 0x8002, + 0x8002, 0x811b, 0x811b, 0x845f, 0x845f, 0x89c1, 0x89c1, + 0x9128, 0x9128, 0x9a76, 0x9a76, 0xa57f, 0xa57f, 0xb216, 0xb216, 0xc002, + 0xc002, 0xcf06, 0xcf06, 0xdee0, 0xdee0, 0xef4c, 0xef4c +}; + +/* +** McASP transmit buffers. +*/ +static uint8_t txBuf0[AUDIO_BUF_SIZE]; + +/* +** I2C instance zero handle +*/ +hsI2cHandle i2cHandle; + +/* +** I2C instance one handle +*/ +hsI2cHandle i2cHandle1; + +uint8_t audioCodecSlaveAddr = (uint8_t) AUDIO_CODEC_SLAVE_ADDR; +/****************************************************************************** +** INTERNAL CONSTATNT DEFINITIONS +******************************************************************************/ + +/* +** Default paRAM for Transmit section. This will be transmitting from +** a loop buffer. +*/ +static EDMA3CCPaRAMEntry const txDefaultPar = { + (uint32_t) EDMA3CC_OPT_TCC_SET(EDMA3_CHA_MCASP3_TX), + (uint32_t) txBuf0, /* source address */ + (uint16_t) (4), /* aCnt */ + (uint16_t) (AUDIO_BUF_SIZE / 4), /* bCnt */ + (uint32_t) (SOC_MCASP1_BASE), /* dest address */ + (uint16_t) (4), /* source bIdx */ + (uint16_t) (0), /* dest bIdx */ + (uint16_t) (PAR_TX_START * SIZE_PARAMSET), /* link address */ + (uint16_t) (1), /* bCnt reload value */ + (uint16_t) (0), /* source cIdx */ + (uint16_t) (0), /* dest cIdx */ + (uint16_t) (1) /* cCnt */ +}; + +/****************************************************************************** +** FUNCTION DEFINITIONS +******************************************************************************/ + +/* I2C instance Init */ +void i2c_init(LLD_Hsi2cInstId_t instId) +{ + lld_hsi2c_initParam_t initPar; + hsI2cObjHandle i2cObjHandle; + + initPar.opMode = HSI2C_OPMODE_POLLED; + initPar.i2cBusFreq = I2C_NORMAL; + initPar.is10BitAddr = 0; + initPar.isMasterMode = 1; + + lld_i2c_init(&i2cObjHandle, instId, &initPar); + + if (HSI2C_INST_0 == instId) + { + i2cHandle = lld_i2c_open(instId, NULL, NULL); + } +#if (defined (SOC_TDA2XX) || defined (SOC_TDA2PX)) + if (HSI2C_INST_1 == instId) + { + i2cHandle1 = lld_i2c_open(instId, NULL, NULL); + } + else if(HSI2C_INST_2 == instId) + { + i2cHandle = lld_i2c_open(instId, NULL, NULL); + } +#elif (defined (SOC_TDA2EX)) + if (HSI2C_INST_4 == instId) + { + i2cHandle1 = lld_i2c_open(instId, NULL, NULL); + } +#endif +} + +/* I2C close and deinit */ +void i2c_deinit() +{ + lld_i2c_close(&i2cHandle); + + lld_i2c_deinit(HSI2C_INST_0); + + lld_i2c_close(&i2cHandle1); +#if (defined (SOC_TDA2XX) || defined (SOC_TDA2PX)) + lld_i2c_deinit(HSI2C_INST_1); +#elif (defined (SOC_TDA2EX)) + lld_i2c_deinit(HSI2C_INST_4); +#endif +} + +/* I2C write function */ +LLD_hsi2cErrorCode_t I2CWrite(uint8_t address, uint8_t data) +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + lld_hsi2c_datatfr_params_t i2cXferParams; + + i2cXferParams.bufLen = 2; + i2cXferParams.buffer = &data_tx[0]; + + data_tx[0] = address; + data_tx[1] = data; + +#if DEBUG + UARTPuts("\r\n i2c write: address : ", -1); + UARTPutHexNum(data_tx[0]); + UARTPuts(" data : ", -1); + UARTPutHexNum(data_tx[1]); +#endif + + i2cXferParams.flags = LLD_HSI2C_WRITE | LLD_HSI2C_MASTER | LLD_HSI2C_START + | LLD_HSI2C_STOP; + i2cXferParams.slaveAddr = audioCodecSlaveAddr; + i2cXferParams.timeout = 0xFFFFFF; + + retVal = lld_i2c_transfer(i2cHandle, &i2cXferParams); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nI2c write failed ", -1); + } +#if DEBUG + else + { + UARTPuts("\r\nI2c write successful ", -1); + } +#endif + + return retVal; +} + +LLD_hsi2cErrorCode_t I2CWrite1(uint8_t address, uint8_t data) +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + lld_hsi2c_datatfr_params_t i2cXferParams; + hsI2cHandle ioexpi2cHandle; + + i2cXferParams.bufLen = 2; + i2cXferParams.buffer = &data_tx[0]; + + data_tx[0] = address; + data_tx[1] = data; + +#if DEBUG + UARTPuts("\r\n i2c write: address : ", -1); + UARTPutHexNum(data_tx[0]); + UARTPuts(" data : ", -1); + UARTPutHexNum(data_tx[1]); +#endif + + i2cXferParams.flags = LLD_HSI2C_WRITE | LLD_HSI2C_MASTER | LLD_HSI2C_START + | LLD_HSI2C_STOP; + i2cXferParams.slaveAddr = (uint8_t) GPIO_IO_EXPANDER_SLAVE_ADDR; + i2cXferParams.timeout = 0x4000; + +#if defined (SOC_TDA2PX) + /* For TDA2PX both io expander and the codec are on i2c0 */ + ioexpi2cHandle = i2cHandle; +#else + ioexpi2cHandle = i2cHandle1; +#endif + retVal = lld_i2c_transfer(ioexpi2cHandle, &i2cXferParams); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nI2c write failed ", -1); + } +#if DEBUG + else + { + UARTPuts("\r\nI2c write successful ", -1); + } +#endif + + return retVal; +} + +LLD_hsi2cErrorCode_t I2C_Read(uint8_t address, uint8_t *data) +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + lld_hsi2c_datatfr_params_t i2cXferParams; + + i2cXferParams.bufLen = 1; + i2cXferParams.buffer = &data_tx[0]; + + data_tx[0] = address; /*address byte msb*/ + + i2cXferParams.flags = + LLD_HSI2C_WRITE | LLD_HSI2C_MASTER | LLD_HSI2C_START /*| + *LLD_HSI2C_STOP*/; + i2cXferParams.slaveAddr = audioCodecSlaveAddr; + i2cXferParams.timeout = 0xFFFFFF; + + retVal = lld_i2c_transfer(i2cHandle, &i2cXferParams); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nI2c write failed ", -1); + } +#if DEBUG + else + { + UARTPuts("\r\nI2c write successful ", -1); + } +#endif + + i2cXferParams.buffer = &data_rx[0]; + i2cXferParams.flags = LLD_HSI2C_READ | LLD_HSI2C_MASTER | + LLD_HSI2C_START | LLD_HSI2C_STOP | + LLD_HSI2C_IGNORE_BUS_BUSY; + retVal = lld_i2c_transfer(i2cHandle, &i2cXferParams); + +#if DEBUG + UARTPuts("\r\n i2c read : address : ", -1); + UARTPutHexNum(data_tx[0]); + UARTPuts(" data : ", -1); + UARTPutHexNum(data_rx[0]); +#endif + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nI2c read failed ", -1); + } +#if DEBUG + else + { + UARTPuts("\r\nI2c read successful ", -1); + *data = data_rx[0]; + } +#endif + + return retVal; +} + +LLD_hsi2cErrorCode_t I2CWriteBf(uint8_t regAddr, uint8_t bfPosition, + uint8_t bfSize, + uint8_t bfData) +{ + uint8_t regData = 0; /* Temporary Register data */ + uint8_t mask = 0; /* Bit field mask */ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + + /*Read data from regAddr*/ + retVal = I2C_Read(regAddr, ®Data); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nI2c read failed ", -1); + } + + mask = ((1 << bfSize) - 1) << bfPosition; + regData = (regData & (uint8_t) (~(mask))); + regData = (regData | (uint8_t) (bfData << bfPosition)); + + /* Write the modified data back into the register */ + retVal = I2CWrite(regAddr, regData); + + return retVal; +} + +static void PSVT_TAS2505_Init() +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + uint16_t vIndx, vArrayLength; + + // 4.0.7 Example Register Setup to Play Digital Data Through DAC and Headphone/Speaker Outputs + UInt8 pTAS2505[] = + { + //# Page switch to Page 0 + 0x00, 0x00, + //# Assert Software reset (P0, R1, D0=1) + 0x01, 0x01, + //# Page Switch to Page 1 + 0x00, 0x01, + //# LDO output programmed as 1.8V and Level shifters powered up. (P1, R2, D5-D4=00, D3=0) + 0x02, 0x00, + //Page switch to Page 0 + 0x00, 0x00, + //# PLL_clkin = MCLK, codec_clkin = PLL_CLK, MCLK should be 11.2896MHz (P0, R4, D1-D0=03) + 0x04, 0x03, + //# Power up PLL, set P=1, R=1, (Page-0, Reg-5) + 0x05, 0x91, + //# Set J=4, (Page-0, Reg-6) + 0x06, 0x04, + //# D = 0000, D(13:8) = 0, (Page-0, Reg-7) + 0x07, 0x00, + //# D(7:0) = 0, (Page-0, Reg-8) + 0x08, 0x00, + //# DAC NDAC Powered up, NDAC=4 (P0, R11, D7=1, D6-D0=0000100) + 0x0B, 0x84, + //# DAC MDAC Powered up, MDAC=2 (P0, R12, D7=1, D6-D0=0000010) + 0x0C, 0x82, + //# DAC OSR(9:0)-> DOSR=128 (P0, R12, D1-D0=00) + 0x0D, 0x00, + //# DAC OSR(9:0)-> DOSR=128 (P0, R13, D7-D0=10000000) + 0x0E, 0x80, + //# Codec Interface control Word length = 16bits, BCLK&WCLK inputs, I2S mode. (P0, R27, D7- + //D6=00, D5-D4=00, D3-D2=00) + 0x1B, 0x00, + //# Data slot offset 00 (P0, R28, D7-D0=0000) + 0x1C, 0x00, + //# Dac Instruction programming PRB #2 for Mono routing. Type interpolation (x8) and 3 programmable + //Biquads. (P0, R60, D4-D0=0010) + 0x3C, 0x02, + //# Page Switch to Page 1 + 0x00, 0x01, + //# Master Reference Powered on (P1, R1, D4=1) + 0x01, 0x10, + //# Output common mode for DAC set to 0.9V (default) (P1, R10) + 0x0A, 0x00, + //# Mixer P output is connected to HP Out Mixer (P1, R12, D2=1) + 0x0C, 0x04, + //# HP Voulme, 0dB Gain (P1, R22, D6-D0=0000000) + 0x16, 0x00, + //# No need to enable Mixer M and Mixer P, AINL Voulme, 0dB Gain (P1, R24, D7=1, D6-D0=0000000) + 0x18, 0x00, + //# Power up HP (P1, R9, D5=1) + 0x09, 0x20, + //# Unmute HP with 0dB gain (P1, R16, D4=1) + 0x10, 0x00, + //# SPK attn. Gain =0dB (P1, R46, D6-D0=000000) + 0x2E, 0x00, + //# SPK driver Gain=6.0dB (P1, R48, D6-D4=001) + 0x30, 0x10, + //# SPK powered up (P1, R45, D1=1) + 0x2D, 0x02, + //# Page switch to Page 0 + 0x00, 0x00, + //# DAC powered up, Soft step 1 per Fs. (P0, R63, D7=1, D5-D4=01, D3-D2=00, D1-D0=00) + 0x3F, 0x90, + //# DAC digital gain 0dB (P0, R65, D7-D0=00000000) + 0x41, 0x00, + //# DAC volume not muted. (P0, R64, D3=0, D2=1) + 0x40, 0x04, + }; + + vArrayLength = sizeof(pTAS2505); + + for (vIndx = 0; vIndx < vArrayLength; vIndx += 2) + { + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) pTAS2505[vIndx], + (uint8_t) (pTAS2505[vIndx + 1]))); + //Task_sleep(20); + //delay(50); + } +} + +#if 0 +/** + * + * \brief This function writes the initialization values for Aic31 DAC + * registers. This function should be called to initialize the + * registers of the DAC. + * + * \return None + */ +static void aic31InitDac() +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + uint8_t gain = 0x24; + + /* Write the initialization values for the DAC registers */ + retVal = I2CWriteBf((uint8_t) Aic31_P0_REG7, (uint8_t) 1, (uint8_t) 4, + (uint8_t) 5); + + /* power up the left and right DACs */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG37, + (uint8_t) 0xE0)); + + /* select the DAC L1 R1 Paths */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG41, + (uint8_t) 0x02)); + + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG42, + (uint8_t) 0x6C)); + + /* unmute the DAC */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG43, + (uint8_t) 0x00)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG44, + (uint8_t) 0x00)); + + /* DAC L to HPL OUT Is connected */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG47, + (uint8_t) 0x80)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG51, + (uint8_t) 0x09)); + + /* DAC R to HPROUT is connected */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG64, + (uint8_t) 0x80)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG65, + (uint8_t) 0x09)); + + /* DACL1 connected to LINE1 LOUT */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG82, + (uint8_t) 0x80)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG86, + (uint8_t) 0x09)); + + /* DACR1 connected to LINE1 ROUT */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG92, + (uint8_t) 0x80)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG93, + (uint8_t) 0x09)); + + /* Left/Right DAC digital volume gain */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_LEFT_DAC_VOL_CTRL_ADDR, + /*(uint8_t) gain*/ gain)); + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) + Aic31_RIGHT_DAC_VOL_CTRL_ADDR, + /*(uint8_t) gain*/ gain)); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nDAC Initialization failed ", -1); + } + else + { + UARTPuts("\r\nDAC Initialization successful", -1); + } +} + +static void aic31MdCreateChan() +{ + uint8_t tempData = 0; + uint8_t pllPValue = 0; + uint8_t pllRValue = 0; + uint8_t pllJValue = 0; + uint8_t pllDLowValue = 0; + uint8_t pllDHighValue = 0; + uint8_t dualRate = 0; + uint8_t sampleRateDiv = 0; + uint8_t fsRef = 0; + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + + /* Select Register Page 0 of Aic31 */ + retVal = I2CWrite(Aic31_PAGE_SELECT_ADDR, Aic31_PAGE_0); + + /* Reset the Aic31 */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | I2CWrite(Aic31_P0_REG1, (uint8_t) 0x80)); + + /* Configure the audio serial data interface mode */ + tempData = (0U << 6U); + + /* configure the slot width */ + tempData |= (3U << 4U); + + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite(Aic31_SERIAL_INTERFACEB_ADDR, tempData)); + + /* Configure sampleRateDiv and dualRate */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG2, (uint8_t) 0, + (uint8_t) 4, + (uint8_t) + sampleRateDiv)); + + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG7, (uint8_t) 5, + (uint8_t) 1, + (uint8_t) dualRate)); + + /* enable the PLL */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG3, (uint8_t) 7, + (uint8_t) 1, + (uint8_t) 1)); + + /* select the MCLK as the input for the PLL and CLKDIV(N = 16)*/ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG102, + (uint8_t) 4, (uint8_t) 2, + (uint8_t) 0x00)); + + /* select the PLL_IN as codec input */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG101, + (uint8_t) 0, (uint8_t) 1, + (uint8_t) 0x00)); + + /* selec the GPIO to output the divided PLL_IN clock(test purpose)*/ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG98, + (uint8_t) 0x20)); + + /* Write to PLL programming register A */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG3, (uint8_t) 0, + (uint8_t) 3, + pllPValue)); + + /* Write to PLL programming register B */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG4, (uint8_t) 2, + (uint8_t) 6, + pllJValue)); + + /* write the high and low bits of the D value */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | I2CWrite(Aic31_P0_REG5, pllDHighValue)); + + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWrite((uint8_t) Aic31_P0_REG6, + (uint8_t) (pllDLowValue << 2))); + + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG11, + (uint8_t) 0, (uint8_t) 4, + pllRValue)); + + /* Write to codec datapath setup register */ + retVal = + (LLD_hsi2cErrorCode_t) (retVal | + I2CWriteBf((uint8_t) Aic31_P0_REG7, (uint8_t) 7, + (uint8_t) 1, + fsRef)); + + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\n Codec Init failed ", -1); + } + else + { + UARTPuts("\r\n Codec Init successful ", -1); + } + + /* Initialize DAC*/ + aic31InitDac(); +} +#endif + +/* +** Initializes the DMA parameters. +** The TX basic paRAM set (channel) is 12. +** +** The TX paRAM sets will be initialized to transmit from the loop buffer. +** The size of the loop buffer can be configured. +** The transfer completion interrupt will not be enabled for paRAM set 1; +** paRAM set 1 will be linked to linked paRAM set starting (PAR_TX_START) of TX. +** All other paRAM sets will be linked to itself. +** and further transmission only happens via linked paRAM set. +** For example, if the PAR_TX_START value is 72, and the number of paRAMS is 2, +** So transmission paRAM set linking will be initialized as 1-->72-->73, 73->73. +*/ +static void I2SDMAParamInit(void) +{ + int16_t *sineToneDataPtr = NULL; + int32_t *temp; + uint32_t i = 0; + EDMA3CCPaRAMEntry paramSet; + + /* Initialize TX Buffers + * + * These patterns are seen/output on serializer0 and serializer1 + */ + + sineToneDataPtr = _sineWavePattern; + + temp = (int32_t *) txBuf0; + + for (i = 0; i < (AUDIO_BUF_SIZE / 4); i++) + { + *temp = (int32_t) (*sineToneDataPtr); + + temp++; + sineToneDataPtr++; + } + + /* Initialize the 1st paRAM set for transmit */ + memcpy(¶mSet, &txDefaultPar, SIZE_PARAMSET - 2); + + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP3_TX, ¶mSet); + + /*Set Link parameters*/ + EDMA3SetPaRAM(SOC_EDMA_TPCC_BASE_VIRT, PAR_TX_START, ¶mSet); +} + +/* +** Configures the McASP Transmit Section in I2S mode. +*/ +static void McASPI2SConfigure(void) +{ + McASPTxReset(SOC_MCASP1_CFG_BASE); + + /* Enable the FIFOs for DMA transfer */ + McASPWriteFifoEnable(SOC_MCASP_1_FIFO_REGS, 1, 1); + + /* Set the mask assuming integer format for 32 bit word*/ + McASPTxFmtMaskSet(SOC_MCASP1_CFG_BASE, 0xFFFFFFFF); + + /* Set I2S format in the transmitter/receiver format units */ + McASPTxFmtSet(SOC_MCASP1_CFG_BASE, (MCASP_TX_SYNC_DELAY_0BIT | + MCASP_TX_BITSTREAM_MSB_FIRST | + MCASP_TX_SLOTSIZE_32BITS | + MCASP_TX_ROT_RIGHT_20BITS)); + + McASPTxFrameSyncCfg(SOC_MCASP1_CFG_BASE, I2S_MODE, MCASP_TX_FS_WIDTH_WORD, + MCASP_TX_FS_EXT_BEGIN_ON_FALL_EDGE | + MCASP_TX_FS_INTERNAL); + + /* configure the clock for transmitter */ + McASPTxClkCfg(SOC_MCASP1_CFG_BASE, MCASP_TX_CLK_INTERNAL, + ((MCASP_ACLKX_CLKXDIV_VALUE & MCASP_ACLKXCTL_CLKXDIV_MASK) >> + MCASP_ACLKXCTL_CLKXDIV_SHIFT), + ((MCASP_AHCLKX_HCLKXDIV_VALUE & + MCASP_AHCLKXCTL_HCLKXDIV_MASK) >> + MCASP_AHCLKXCTL_HCLKXDIV_SHIFT)); + + McASPTxClkPolaritySet(SOC_MCASP1_CFG_BASE, MCASP_TX_CLK_POL_FALL_EDGE); + + McASPTxClkCheckConfig(SOC_MCASP1_CFG_BASE, MCASP_TX_CLKCHCK_DIV32, 0x00, + 0xFF); + + /* Enable the transmitter/receiver slots. I2S uses 2 slots */ + McASPTxTimeSlotSet(SOC_MCASP1_CFG_BASE, I2S_SLOTS); + + /* + ** Set the serializers + */ + McASPSerializerTxSet(SOC_MCASP1_CFG_BASE, MCASP_XSER_TX_0); + + /* + ** Configure the McASP pins + ** Output - Frame Sync, Clock, Serializer Rx and Serializer Tx + ** (Clocks generated internally) + */ + McASPPinMcASPSet(SOC_MCASP1_CFG_BASE, + (MCASP_PIN_AFSX + | MCASP_PIN_AHCLKX | MCASP_PIN_ACLKX | MCASP_PIN_AMUTE + | MCASP_PIN_AXR(MCASP_XSER_TX_0) + )); + + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_AFSR); + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_ACLKR); + + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_AFSX); + + /* Configure high clock as Output */ + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_AHCLKX); + + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_ACLKX); + + /* Both Serializers used to output data out */ + McASPPinDirOutputSet(SOC_MCASP1_CFG_BASE, MCASP_PIN_AXR(MCASP_XSER_TX_0)); +} + +/* +** Sets up the interrupts for EDMA in AINTC +*/ +static void EDMA3IntSetup(void) +{ + /*Unlock the Crossbar register */ + PlatformUnlockMMR(); + +#ifdef __ARM_ARCH_7A__ + IRQXBARConnect(SOC_IRQ_DMARQ_CROSSBAR_REGISTERS_BASE, CPU_MPUSS, 7, + EDMA_TPCC_IRQ_REGION0); + +#elif defined (_TMS320C6X) + IRQXBARConnect(SOC_IRQ_DMARQ_CROSSBAR_REGISTERS_BASE, CPU_DSP1, 7, + EDMA_TPCC_IRQ_REGION2); +#endif + + /* Enable The EDMA interrupt */ + Intc_Init(); + Intc_IntEnable(0); + + Intc_IntRegister(EDMA3_CC_XFER_COMPLETION_INT, + (IntrFuncPtr) EDMA3CCComplIsr, + NULL); + Intc_IntPrioritySet(EDMA3_CC_XFER_COMPLETION_INT, 1, 0); + Intc_SystemEnable(EDMA3_CC_XFER_COMPLETION_INT); +} + +/* +** Activates the data transmission/reception +** The DMA parameters shall be ready before calling this function. +*/ +static void I2SDataTxActivate(void) +{ + /* Start the clocks */ + McASPTxClkStart(SOC_MCASP1_CFG_BASE, MCASP_TX_CLK_INTERNAL); + + /* Enable EDMA for the transfer */ + EDMA3EnableTransfer(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP3_TX, + EDMA3_TRIG_MODE_EVENT); + + /* Activate the serializers */ + McASPTxSerActivate(SOC_MCASP1_CFG_BASE); + + /* make sure that the XDATA bit is cleared to zero */ + while (McASPTxStatusGet(SOC_MCASP1_CFG_BASE) & MCASP_TX_STAT_DATAREADY) ; + + /* Activate the state machines */ + McASPTxEnable(SOC_MCASP1_CFG_BASE); +} + +void sampleConfigScr(unsigned int eventNum, unsigned int chanNum) { + unsigned int scrChanOffset = 0; + unsigned int scrRegOffset = 0; + unsigned int xBarEvtNum = 0; + IntmuxRegsOvly scrEvtMux = + (IntmuxRegsOvly) (EDMA3_EVENT_MUX_REG_BASE_ADDR); + + if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TI814X) && + (chanNum < EDMA3_NUM_TCC)) + { + scrRegOffset = chanNum / 2; + scrChanOffset = chanNum - (scrRegOffset * 2); + xBarEvtNum = (eventNum + 1); + + switch (scrChanOffset) + { + case 0: + scrEvtMux->TPCC_EVTMUX[scrRegOffset] &= + ~(INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK); + scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= + (xBarEvtNum & INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK); + break; + case 1: + scrEvtMux->TPCC_EVTMUX[scrRegOffset] &= + ~(INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK); + scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= + ((xBarEvtNum << + INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) & + (INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK)); + break; + default: + break; + } + } +} + +/*Configure EDMA Xbar*/ +void Configure_Edma_xbar() +{ + sampleConfigScr(MCASP1_RX_DMA_XBAR_INST, EDMA3_CHA_MCASP3_TX); +} + +/*Pin Mux and Clk config*/ +void pinMuxClkConfig(void) +{ + /*Unlock the Control registers */ + PlatformUnlockMMR(); + + /* Pad mux configuration for McASP instance 2 */ + //PlatformMCASP3SetPinMux(); + + /* Power on McASP instance 2*/ + //PlatformMCASP3PrcmEnable(); +#if (defined (SOC_TDA2XX) || defined (SOC_TDA2PX)) + /* Pad mux configuration for I2C instance 2 */ + //PlatformI2C2SetPinMux(); +#elif (defined (SOC_TDA2EX)) + /* Pad mux configuration for I2C instance 5 */ + //PlatformI2C5SetPinMux(); +#endif + + /* Power on McASP instance 1 */ + HW_WR_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL, 0x02); + while ((HW_RD_REG32(SOC_IPU_CM_CORE_AON_BASE + CM_IPU_MCASP1_CLKCTRL)) !=0x02U) + { + ; + } + //0x4A003694 0x10003 D18 CTRL_CORE_PAD_XREF_CLK0 xref_clk0 mcasp1_ahclkx + /* MCASP1_DEFAULT */ + //0x4A0036A4 0x50000 C14 CTRL_CORE_PAD_MCASP1_ACLKX mcasp1_aclkx mcasp1_aclkx + /* MCASP1_DEFAULT */ + //0x4A0036A8 0xD0000 D14 CTRL_CORE_PAD_MCASP1_FSX mcasp1_fsx mcasp1_fsx + /* MCASP1_DEFAULT */ + //0x4A0036B4 0xD0000 G12 CTRL_CORE_PAD_MCASP1_AXR0 mcasp1_axr0 mcasp1_axr0 + /* MCASP1_DEFAULT */ + //0x4A0036B8 0xD0000 F12 CTRL_CORE_PAD_MCASP1_AXR1 mcasp1_axr1 mcasp1_axr1 + + HW_WR_REG32(0x4A003694, 0x10003); + HW_WR_REG32(0x4A0036A4, 0x50000); + HW_WR_REG32(0x4A0036A8, 0xD0000); + HW_WR_REG32(0x4A0036B4, 0xD0000); + HW_WR_REG32(0x4A0036B8, 0xD0000); + + //0x4A003778 0x50002 AB4 CTRL_CORE_PAD_GPIO6_11 gpio6_11 i2c3_scl + //0x4A003688 0x50009 E21 CTRL_CORE_PAD_GPIO6_14 gpio6_14 i2c3_sda + HW_WR_REG32(0x4A003778, 0x50002); + HW_WR_REG32(0x4A003688, 0x50009); + + PlatformUART1SetPinMux(); + +} + +/*Edma Config*/ +void edmaConfig(void) +{ +#if defined (__ARM_ARCH_7A__) + EDMAsetRegion(EDMA3_CC_REGION_A15); +#elif defined (_TMS320C6X) + EDMAsetRegion(EDMA3_CC_REGION_DSP); +#endif + + EDMA3Init(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CC_QUEUE); + + Configure_Edma_xbar(); + + EDMA3IntSetup(); + + /* Request EDMA channels */ + EDMA3RequestChannel(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHANNEL_TYPE_DMA, + EDMA3_CHA_MCASP3_TX, EDMA3_CHA_MCASP3_TX, + EDMA3_CC_QUEUE); +} + +static LLD_hsi2cErrorCode_t updateAudioCodecAddr(void) +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + + retVal = lld_i2c_probe(i2cHandle, AUDIO_CODEC_SLAVE_ADDR); + if (LLD_HSI2C_SUCCESS != retVal) + { +#ifdef AUDIO_CODEC_SLAVE_ADDR_1 + retVal = lld_i2c_probe(i2cHandle, AUDIO_CODEC_SLAVE_ADDR_1); + if (LLD_HSI2C_SUCCESS != retVal) + { + UARTPuts("\r\nProbe to audio codec failed ", -1); + retVal = LLD_HSI2C_FAIL; + } + else + { + /* Use the Alternate Audio Codec Addr */ + audioCodecSlaveAddr = AUDIO_CODEC_SLAVE_ADDR_1; + } +#else + UARTPuts("\r\nProbe to audio codec failed ", -1); + retVal = LLD_HSI2C_FAIL; + +#endif + } + else + { + /* Use the default Audio Codec Addr */ + audioCodecSlaveAddr = AUDIO_CODEC_SLAVE_ADDR; + } + + return retVal; +} + +/* +** The +** main function. Application starts here. +*/ +int main(void) +{ + LLD_hsi2cErrorCode_t retVal = LLD_HSI2C_SUCCESS; + + /*Pin Mux and Clk config*/ + pinMuxClkConfig(); + + UARTStdioInit(); + + UARTPuts("\r\nMcASP Sinetone application ", -1); + + /*I2C instance 0 init*/ + i2c_init(HSI2C_INST_0); + +#if (defined (SOC_TDA2XX) || defined (SOC_TDA2PX)) + /*I2C instance 1 init*/ + i2c_init(HSI2C_INST_1); +#elif (defined (SOC_TDA2EX)) + /*I2C instance 1 init*/ + i2c_init(HSI2C_INST_4); +#endif + + i2c_init(HSI2C_INST_2); + + retVal = updateAudioCodecAddr(); + if (LLD_HSI2C_SUCCESS != retVal) + { + /* Cannot Probe the audio codec */ + while (1) ; + } + /*Clear 6th bit i.e VIN6_SEL_S0 line of IO Expander*/ + //I2CWrite1(0x00, 0x00); + UARTPuts("\r\nGPIO Expander configured ", -1); + + /*Edma Config*/ + edmaConfig(); + + /*Init Codec and DAC*/ + //aic31MdCreateChan(); + PSVT_TAS2505_Init(); + + /* Initialize the DMA parameters */ + I2SDMAParamInit(); + UARTPuts("\r\nI2S DMA PAram init done ", -1); + + /* Configure the McASP*/ + McASPI2SConfigure(); + UARTPuts("\r\nMcASP Confgiured ", -1); + + /* Activate the audio transmission and reception */ + I2SDataTxActivate(); + UARTPuts("\r\nMcASP Finish ", -1); + + /*De-initialize I2C*/ + //i2c_deinit(); + + /* Data Transfer happens infinitely even though application ends + * here. Removed while loop as compiler issues warning of non + * returnable main function + */ + + return 0; +} + +/* +** EDMA transfer completion ISR +*/ +static void EDMA3CCComplIsr(void *dummy) +{ + /* Check if transmit DMA completed */ + if (EDMA3GetIntrStatus(SOC_EDMA_TPCC_BASE_VIRT) & (1 << EDMA3_CHA_MCASP3_TX)) + { + /* Clear the interrupt status for the first channel */ + EDMA3ClrIntr(SOC_EDMA_TPCC_BASE_VIRT, EDMA3_CHA_MCASP3_TX); + } +} + +/***************************** End Of File ***********************************/ + +Hi, When I need 16bits or 32bits mono, how much MCLK, BCLK, WCLK should be set? I measured MCLK = 11.2895MHZ, WCLK = 44.09KHZ, BCLK = 1.411Mhz from custom board. When i modify the define MCASP_ACLKX_CLKXDIV_VALUE, the WCLK and BCLK will change together. + +Hi, I found that when I set MCASP_TX_ROT_RIGHT_20BITS, I will hear the speaker beep at the same frequency, When I set MCASP_TX_ROT_RIGHT_NONE there is no sound output. But i check https://www.ti.com/lit/ug/slau472/slau472.pdf?ts=1604657423934&ref_url=https%253A%252F%252Fwww.google.com%252F page37 I think MCASP_TX_ROT_RIGHT_NONE is correct, because I2S Mode is aligned to the left, am I correct?? + +Yiting, I saw you created a new ticket: https://e2e.ti.com/support/processors/f/processors-forum/986098/tda2sx-how-to-create-mcasp-i2s-driver-on-rtos if you are okay to use the new thread to follow-up, can we close this one? otherwise, please reopen by simply update the ticket. regards Jian + +Hi jian, you can close this thread. + diff --git a/data2/text/range/30001+/959278.txt b/data2/text/range/30001+/959278.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e7b9c86fdfbe50bebf423aecd89bee4f3d6500f --- /dev/null +++ b/data2/text/range/30001+/959278.txt @@ -0,0 +1,54 @@ +Ticket Name: Linux system deployed on TDA2 platform, but unable to enter the system + +Query Text: +Other Parts Discussed in Thread: DRA742, DRA752, PMP Hi Team, The customer is experiencing below issue and needs your help. Customer refers to VisionSDK_Linux_UserGuide.pdf to compile the linux system and boot from the SD card, but cannot enter the system: Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.19.73 (lewis@ubuntu) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Mon Nov 23 23:20:13 PST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: div instructions available: patching division code [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] OF: fdt: Machine model: TI DRA742 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] OF: reserved mem: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node ipu1-memory@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000b0000000, size 64 MiB [ 0.000000] OF: reserved mem: initialized node gpu-memory@c0000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 [ 0.000000] OMAP4: Map 0x00000000bfd00000 to (ptrval) for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] random: get_random_bytes called from start_kernel+0xb4/0x470 with crng_init=0 [ 0.000000] percpu: Embedded 16 pages/cpu s36492 r8192 d20852 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 251456 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=d6ac753a-02 rw rootwait ip=none mem=1024M cma=64M [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 280708K/1012736K available (10240K kernel code, 341K rwdata, 2804K rodata, 2048K init, 269K bss, 420732K reserved, 311296K cma-reserved, 128000K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0x(ptrval) - 0x(ptrval) (12256 kB) [ 0.000000] .init : 0x(ptrval) - 0x(ptrval) (2048 kB) [ 0.000000] .data : 0x(ptrval) - 0x(ptrval) ( 342 kB) [ 0.000000] .bss : 0x(ptrval) - 0x(ptrval) ( 270 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] Tasks RCU enabled. [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000018] Switching to timer-based delay loop, resolution 162ns [ 0.000295] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000304] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000756] Console: colour dummy device 80x30 [ 0.000776] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000784] This ensures that you still see kernel messages. Please [ 0.000791] update your kernel commandline. [ 0.000823] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000840] pid_max: default: 32768 minimum: 301 [ 0.000966] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000981] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001528] CPU: Testing write buffer coherency: ok [ 0.001567] CPU0: Spectre v2: using ICIALLU workaround [ 0.001781] /cpus/cpu@0 missing clock-frequency property [ 0.001801] /cpus/cpu@1 missing clock-frequency property [ 0.001814] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.059916] Setting up static identity map for 0x80200000 - 0x80200060 [ 0.079928] rcu: Hierarchical SRCU implementation. [ 0.100123] EFI services will not be available. [ 0.119994] smp: Bringing up secondary CPUs ... [ 0.200345] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.200351] CPU1: Spectre v2: using ICIALLU workaround [ 0.200473] smp: Brought up 1 node, 2 CPUs [ 0.200485] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.200493] CPU: All CPU(s) started in HYP mode. [ 0.200501] CPU: Virtualization extensions available. [ 0.200994] devtmpfs: initialized [ 0.219078] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.219341] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.219359] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.224205] pinctrl core: initialized pinctrl subsystem [ 0.224732] DMI not present or invalid. [ 0.225011] NET: Registered protocol family 16 [ 0.226172] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.227096] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.420687] cpuidle: using governor ladder [ 0.420723] cpuidle: using governor menu [ 0.430798] OMAP GPIO hardware version 0.1 [ 0.456510] No ATAGs? [ 0.456586] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.456600] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.457133] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.457145] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.457790] OMAP DMA hardware revision 0.0 [ 0.469401] edma 43300000.edma: memcpy is disabled [ 0.472848] edma 43300000.edma: TI EDMA DMA engine driver [ 0.479985] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.481588] evm_3v3: supplied by evm_12v0 [ 0.481879] evm_5v0: supplied by evm_12v0 [ 0.482182] evm_3v6: supplied by evm_5v0 [ 0.485392] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.485563] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.485813] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.486047] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.486424] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.486603] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.486880] iommu: Adding device 58820000.ipu to group 1 [ 0.486961] iommu: Adding device 55020000.ipu to group 2 [ 0.487088] iommu: Adding device 40800000.dsp to group 0 [ 0.487328] iommu: Adding device 41000000.dsp to group 3 [ 0.488448] SCSI subsystem initialized [ 0.489674] palmas 0-0058: IRQ missing: skipping irq request [ 0.510891] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.512555] SMPS123: supplied by regulator-dummy [ 0.514422] SMPS45: supplied by regulator-dummy [ 0.516265] SMPS6: supplied by regulator-dummy [ 0.517968] SMPS7: supplied by regulator-dummy [ 0.519819] SMPS8: supplied by regulator-dummy [ 0.521522] SMPS9: supplied by regulator-dummy [ 0.522510] LDO1: supplied by regulator-dummy [ 0.531358] LDO2: supplied by regulator-dummy [ 0.541225] LDO3: supplied by regulator-dummy [ 0.551235] LDO4: supplied by regulator-dummy [ 0.551422] random: fast init done [ 0.551972] LDO5: supplied by regulator-dummy [ 0.552698] LDO6: supplied by regulator-dummy [ 0.553410] LDO7: supplied by regulator-dummy [ 0.554135] LDO8: supplied by regulator-dummy [ 0.554856] LDO9: supplied by regulator-dummy [ 0.561271] LDOLN: supplied by regulator-dummy [ 0.571287] LDOUSB: supplied by regulator-dummy [ 0.583501] pcf857x: probe of 0-0020 failed with error -121 [ 0.583753] pcf857x: probe of 0-0021 failed with error -121 [ 0.583918] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.584382] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.584604] media: Linux media interface: v0.10 [ 0.584643] videodev: Linux video capture interface: v2.00 [ 0.584714] pps_core: LinuxPPS API ver. 1 registered [ 0.584723] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.584744] PTP clock support registered [ 0.584775] EDAC MC: Ver: 3.0.0 [ 0.585567] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.585815] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.586324] Advanced Linux Sound Architecture Driver Initialized. [ 0.587140] clocksource: Switched to clocksource arch_sys_counter [ 0.595211] NET: Registered protocol family 2 [ 0.595785] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes) [ 0.595813] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.595877] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.596003] TCP: Hash tables configured (established 8192 bind 8192) [ 0.596072] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.596106] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.596245] NET: Registered protocol family 1 [ 0.616691] RPC: Registered named UNIX socket transport module. [ 0.616702] RPC: Registered udp transport module. [ 0.616710] RPC: Registered tcp transport module. [ 0.616718] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.617809] hw perfevents: no interrupt-affinity property for /pmu, guessing. [ 0.618033] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.619015] Initialise system trusted keyrings [ 0.619146] workingset: timestamp_bits=14 max_order=18 bucket_order=4 [ 0.624023] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.634514] NFS: Registering the id_resolver key type [ 0.634537] Key type id_resolver registered [ 0.634546] Key type id_legacy registered [ 0.634584] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.636156] Key type asymmetric registered [ 0.636169] Asymmetric key parser 'x509' registered [ 0.636223] bounce: pool size: 64 pages [ 0.636257] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) [ 0.636268] io scheduler noop registered [ 0.636276] io scheduler deadline registered [ 0.636371] io scheduler cfq registered (default) [ 0.636382] io scheduler mq-deadline registered [ 0.636391] io scheduler kyber registered [ 0.642226] pinctrl-single 4a003400.pinmux: 282 pins, size 1128 [ 0.646179] dra7-pcie 51000000.pcie: Linked as a consumer to phy-4a094000.pciephy.1 [ 0.646427] dra7-pcie 51000000.pcie: WA for Errata i870 not applied [ 0.646517] dra7-pcie 51000000.pcie: host bridge /ocp/axi@0/pcie@51000000 ranges: [ 0.646558] dra7-pcie 51000000.pcie: IO 0x20003000..0x20012fff -> 0x00000000 [ 0.646586] dra7-pcie 51000000.pcie: MEM 0x20013000..0x2fffffff -> 0x20013000 [ 1.646867] dra7-pcie 51000000.pcie: Phy link never came up [ 1.647001] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 [ 1.647015] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.647027] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 1.647038] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 1.653147] PCI: bus0: Fast back to back transfers disabled [ 1.658743] PCI: bus1: Fast back to back transfers enabled [ 1.658786] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff 64bit] [ 1.658806] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 1.659127] pcieport 0000:00:00.0: Signaling PME with IRQ 176 [ 1.659259] pcieport 0000:00:00.0: AER enabled with IRQ 176 [ 1.663379] evm_1v8: supplied by smps9 [ 1.663633] evm_3v3_sw: supplied by sysen1 [ 1.663872] aic_dvdd: supplied by evm_3v3_sw [ 1.663957] vtt_fixed: supplied by sysen2 [ 1.708692] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled [ 1.712257] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 45, base_baud = 3000000) is a 8250 [ 2.913436] console [ttyS0] enabled [ 2.917863] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 46, base_baud = 3000000) is a 8250 [ 2.927508] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 47, base_baud = 3000000) is a 8250 [ 2.938638] omap_rng 48090000.rng: Random Number Generator ver. 20 [ 2.938960] random: crng init done [ 2.958848] brd: module loaded [ 2.968149] loop: module loaded [ 2.971971] vmemexp device MAJOR num = 244 [ 2.976099] vmemexp class registered [ 2.979821] /dev/vmemexp device registered [ 2.983937] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 3.014881] m25p80 spi0.0: found n25q00, expected s25fl256s1 [ 3.020857] m25p80 spi0.0: n25q00 (131072 Kbytes) [ 3.025673] 10 fixed-partitions partitions found on MTD device spi0.0 [ 3.032163] Creating 10 MTD partitions on "spi0.0": [ 3.037067] 0x000000000000-0x000000010000 : "QSPI.SPL" [ 3.042960] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" [ 3.049514] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" [ 3.056036] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" [ 3.062581] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 3.068689] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 3.075377] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 3.081837] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 3.088988] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 3.095063] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 3.102169] libphy: Fixed MDIO Bus: probed [ 3.167170] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 [ 3.174866] davinci_mdio 48485000.mdio: no live phy, scanning all [ 3.214130] libphy: 48485000.mdio: probed [ 3.218888] cpsw 48484000.ethernet: Detected MACID = b4:52:a9:5d:f6:dc [ 3.225491] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 [ 3.231897] cpsw 48484000.ethernet: ALE Table size 1024 [ 3.237200] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) [ 3.245193] cpsw 48484000.ethernet: cpsw: Detected MACID = b4:52:a9:5d:f6:dd [ 3.253836] i2c /dev entries driver [ 3.262477] cpu cpu0: Linked as a consumer to regulator.10 [ 3.268091] cpu cpu0: Linked as a consumer to regulator.32 [ 3.274964] sdhci: Secure Digital Host Controller Interface driver [ 3.281221] sdhci: Copyright(c) Pierre Ossman [ 3.286527] sdhci-pltfm: SDHCI platform and OF driver helper [ 3.293466] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 3.302347] sdhci-omap 4809c000.mmc: Got CD GPIO [ 3.307188] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 3.314254] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 3.321333] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 3.328225] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 3.335114] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 3.341748] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 3.349121] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 [ 3.355905] sdhci-omap 480b4000.mmc: Dropping the link to regulator.2 [ 3.362463] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 [ 3.395058] mmc0: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA [ 3.402965] ti-iodelay 4844a000.padconf: Set reg 0x840 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.411935] ti-iodelay 4844a000.padconf: Set reg 0x848 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.420936] ti-iodelay 4844a000.padconf: Set reg 0x84c Delay(a: 307 g: 0), Elements(C=0 F=8)0x29008 [ 3.430120] ti-iodelay 4844a000.padconf: Set reg 0x850 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.439081] ti-iodelay 4844a000.padconf: Set reg 0x854 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.448133] ti-iodelay 4844a000.padconf: Set reg 0x870 Delay(a: 785 g: 0), Elements(C=1 F=8)0x29028 [ 3.457332] ti-iodelay 4844a000.padconf: Set reg 0x874 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.466340] ti-iodelay 4844a000.padconf: Set reg 0x878 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.475391] ti-iodelay 4844a000.padconf: Set reg 0x87c Delay(a: 613 g: 0), Elements(C=1 F=3)0x29023 [ 3.484594] ti-iodelay 4844a000.padconf: Set reg 0x880 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.493621] ti-iodelay 4844a000.padconf: Set reg 0x884 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.502669] ti-iodelay 4844a000.padconf: Set reg 0x888 Delay(a: 683 g: 0), Elements(C=1 F=5)0x29025 [ 3.511871] ti-iodelay 4844a000.padconf: Set reg 0x88c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.520914] ti-iodelay 4844a000.padconf: Set reg 0x890 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.529972] ti-iodelay 4844a000.padconf: Set reg 0x894 Delay(a: 835 g: 0), Elements(C=1 F=9)0x29029 [ 3.539114] ti-iodelay 4844a000.padconf: Set reg 0x898 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.548053] ti-iodelay 4844a000.padconf: Set reg 0x89c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.557302] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 [ 3.564087] sdhci-omap 480d1000.mmc: Dropping the link to regulator.8 [ 3.570667] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.7 [ 3.577473] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 [ 3.667175] sdhci-omap 480d1000.mmc: no pinctrl state for sdr104 mode [ 3.673648] sdhci-omap 480d1000.mmc: no pinctrl state for ddr50 mode [ 3.680078] sdhci-omap 480d1000.mmc: no pinctrl state for sdr50 mode [ 3.686466] sdhci-omap 480d1000.mmc: no pinctrl state for hs200_1_8v mode [ 3.718957] mmc1: SDHCI controller on 480d1000.mmc [480d1000.mmc] using PIO [ 3.726862] ledtrig-cpu: registered to indicate activity on CPUs [ 3.737363] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.3 [ 3.744262] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.4 [ 3.752943] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 3.760368] NET: Registered protocol family 10 [ 3.765772] Segment Routing with IPv6 [ 3.769794] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 3.776211] NET: Registered protocol family 17 [ 3.780929] Key type dns_resolver registered [ 3.785388] Registering SWP/SWPB emulation handler [ 3.790276] omap_voltage_late_init: Voltage driver support not added [ 3.796683] Power Management for TI OMAP4+ devices. [ 3.802315] Loading compiled-in X.509 certificates [ 3.832445] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.839161] [drm] No driver support for vblank timestamp query. [ 3.845481] [drm] Initialized vdrm 1.0.0 20191105 for 44000000.ocp:vdrm@0 on minor 0 [ 3.930339] Console: switching to colour frame buffer device 240x67 [ 3.953288] vdrm 44000000.ocp:vdrm@0: fb0: DRM emulated frame buffer device [ 3.960804] dmm 4e000000.dmm: workaround for errata i878 in use [ 3.968404] dmm 4e000000.dmm: initialized all PAT entries [ 3.974687] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 1 [ 3.983111] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 3.991979] sdhci-omap 4809c000.mmc: Got CD GPIO [ 3.996830] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.003968] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.010881] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.017747] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.024646] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.031283] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.039952] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 4.047719] asoc-simple-card sound0: ASoC: no DMI vendor name! [ 4.056278] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 4.065140] sdhci-omap 4809c000.mmc: Got CD GPIO [ 4.069999] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.077083] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.084003] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.090848] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.097765] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.104384] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.112383] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 4.121245] sdhci-omap 4809c000.mmc: Got CD GPIO [ 4.126034] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.133142] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.140063] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.146880] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.153807] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.160437] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.167985] hctosys: unable to open rtc device (rtc0) [ 4.173824] aic_dvdd: disabling [ 4.177174] ldousb: disabling [ 4.180427] pbias_mmc_omap5: disabling [ 4.184232] ALSA device list: [ 4.187263] #0: DRA7xx-EVM [ 4.190962] Waiting for root device PARTUUID=d6ac753a-02... The system commands are as follows: lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/targetfs$ ls $INSTALL_DIR/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot MLO tisdk-rootfs-image-dra7xx-evm.tar.xz u-boot.img uenv.txt lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/targetfs$ cd $INSTALL_DIR/vision_sdk/build lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ sudo ./hlos/scripts/linux/mksdboot.sh --device /dev/sdb --appname apps --makeconfig tda2xx_evm_linux_all -- Main device is: /dev/sda1 ************************************************************ * THIS WILL DELETE ALL THE DATA ON /dev/sdb * * * * WARNING! Make sure your computer does not go * * in to idle mode while this script is * * running. The script will complete, * * but your SD card may be corrupted. * * * * Press to confirm.... * ************************************************************ unmounting device '/dev/sdb1' unmounting device '/dev/sdb2' 1024+0 records in 1024+0 records out 1048576 bytes (1.0 MB) copied, 0.601153 s, 1.7 MB/s Device contains neither a valid DOS partition table, nor Sun, SGI or OSF disklabel Building a new DOS disklabel with disk identifier 0xd6ac753a. Changes will remain in memory only, until you decide to write them. After that, of course, the previous content won't be recoverable. Warning: invalid flag 0x0000 of partition table 4 will be corrected by w(rite) Command (m for help): Partition type: p primary (0 primary, 0 extended, 4 free) e extended Select (default p): Partition number (1-4, default 1): First sector (2048-31116287, default 2048): Using default value 2048 Last sector, +sectors or +size{K,M,G} (2048-31116287, default 31116287): Command (m for help): Partition type: p primary (1 primary, 0 extended, 3 free) e extended Select (default p): Partition number (1-4, default 2): First sector (526336-31116287, default 526336): Using default value 526336 Last sector, +sectors or +size{K,M,G} (526336-31116287, default 31116287): Using default value 31116287 Command (m for help): Partition number (1-4): Hex code (type L to list codes): Changed system type of partition 1 to c (W95 FAT32 (LBA)) Command (m for help): Partition number (1-4): Command (m for help): The partition table has been altered! Calling ioctl() to re-read partition table. WARNING: If you have created or modified any DOS 6.x partitions, please see the fdisk manual page for additional information. Syncing disks. Press enter to continue. ./hlos/scripts/linux/mksdboot.sh: 156: read: arg count Formating /dev/sdb1 ... mkfs.fat 3.0.26 (2014-03-07) mkfs.fat: warning - lowercase labels might not work properly with DOS or Windows mke2fs 1.42.9 (4-Feb-2014) Filesystem label=rootfs OS type: Linux Block size=4096 (log=2) Fragment size=4096 (log=2) Stride=0 blocks, Stripe width=0 blocks 956592 inodes, 3823744 blocks 191187 blocks (5.00%) reserved for the super user First data block=0 Maximum filesystem blocks=3917479936 117 block groups 32768 blocks per group, 32768 fragments per group 8176 inodes per group Superblock backups stored on blocks: 32768, 98304, 163840, 229376, 294912, 819200, 884736, 1605632, 2654208 Allocating group tables: done Writing inode tables: done Creating journal (32768 blocks): done Writing superblocks and filesystem accounting information: done Copying filesystem on /dev/sdb1,/dev/sdb2 Creating card from ../binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot Extracting filesystem on /dev/sdb2 ... unmounting /dev/sdb1,/dev/sdb2 completed! lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ Thanks, Annie + +Responses: +Hi, Is this on TI EVM or customer hardware? If on TI EVM, could they also try pre-built images from SDK or try a different SD card? Regards, Vishal + +Hi Vishal, Customer uses TI EVM: MMWCAS_DSP_EVM. The system that comes with the SD card when purchasing EVM can be started normally. At present, he uses the reference document VisionSDK_Linux_UserGuide.pdf to configure the compilation system by himself-and then make an SD card-and then insert the SD card into the card slot, and it cannot start. The list of resources used is as follows: lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls arm kernel linaro sgx targetfs u-boot xdctools_3_32_01_22_core lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls kernel/omap/ arch Documentation ipc MAINTAINERS scripts virt block drivers Kbuild Makefile security certs firmware Kconfig mm sound COPYING fs kernel net ti_config_fragments CREDITS include lib README tools crypto init LICENSES samples usr lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls u-boot/u-boot/ api Documentation lib spl u-boot-dtb.bin arch drivers Licenses System.map u-boot-dtb.img board dts MAINTAINERS test u-boot.img cmd env Makefile tools u-boot.lds common examples MLO u-boot u-boot.map config.mk fs net u-boot.bin u-boot-nodtb.bin configs include post u-boot.cfg u-boot.srec disk Kbuild README u-boot.cfg.configs u-boot.sym doc Kconfig scripts u-boot.dtb lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls sgx/omap5-sgx-ddk-linux/ eurasia_km lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls kernel/cmem/ludev Android.mk config.status include Makefile products.mak build-aux configure libtool Makefile.am src config.log configure.ac lu.mak Makefile.in lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls targetfs/ bin boot dev etc home include lib linuxrc media mnt opt proc run sbin sys tmp usr var lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ Thanks, Annie lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls arm kernel linaro sgx targetfs u-boot xdctools_3_32_01_22_core lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls kernel/omap/ arch Documentation ipc MAINTAINERS scripts virt block drivers Kbuild Makefile security certs firmware Kconfig mm sound COPYING fs kernel net ti_config_fragments CREDITS include lib README tools crypto init LICENSES samples usr lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls u-boot/u-boot/ api Documentation lib spl u-boot-dtb.bin arch drivers Licenses System.map u-boot-dtb.img board dts MAINTAINERS test u-boot.img cmd env Makefile tools u-boot.lds common examples MLO u-boot u-boot.map config.mk fs net u-boot.bin u-boot-nodtb.bin configs include post u-boot.cfg u-boot.srec disk Kbuild README u-boot.cfg.configs u-boot.sym doc Kconfig scripts u-boot.dtb lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls sgx/omap5-sgx-ddk-linux/ eurasia_km lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls kernel/cmem/ludev Android.mk config.status include Makefile products.mak build-aux configure libtool Makefile.am src config.log configure.ac lu.mak Makefile.in lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ ls targetfs/ bin boot dev etc home include lib linuxrc media mnt opt proc run sbin sys tmp usr var lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux$ Thanks, Annie + +Hi Annie, - Can they try the images they built on the SD card that came with the EVM? or - Can they try the images they built on a different SD card? Regards, Vishal + +Hi Vishal, He tried to use a new SD card to build, or several SD cards (including the SD card that came with it), it was the same phenomenon. At startup, the above log information is displayed. The customer suspects that the resource version he downloaded is wrong? But during the compilation process, no error was reported. Thanks, Annie + +Hi Annie, Could you ask them to share the working logs when they used the SD card that came with the EVM? Regards, Vishal + +Hi Vishal, HI 日志如下： [08:31:33][20201204 08:31:33] [08:31:37] [08:31:37]U-Boot SPL 2016.05-00018-g6bc25a5 (Aug 05 2019 - 14:43:03) [08:31:37]DRA752-GP ES2.0 [08:31:37]no pinctrl for hs200_1_8v [08:31:37]no pinctrl for ddr_1_8v [08:31:38]Card did not respond to voltage select! [08:31:38]*** Warning - MMC init failed, using default environment [08:31:38] [08:31:38]Trying to boot from MMC1 [08:31:38]reading dra7-ipu2-fw.lzop [08:31:38]spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 [08:31:38]spl: error reading image dra7-ipu2-fw.lzop, err - -1 [08:31:38]Error loading remotecore IPU2!,Continuing with boot ... [08:31:38]reading dra7-dsp1-fw.lzop [08:31:38]spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 [08:31:38]spl: error reading image dra7-dsp1-fw.lzop, err - -1 [08:31:38]Error loading remotecore DSP1!,Continuing with boot ... [08:31:38]reading dra7-dsp2-fw.lzop [08:31:38]spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 [08:31:38]spl: error reading image dra7-dsp2-fw.lzop, err - -1 [08:31:38]Error loading remotecore DSP2!,Continuing with boot ... [08:31:38]reading dra7-ipu1-fw.lzop [08:31:38]spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 [08:31:38]spl: error reading image dra7-ipu1-fw.lzop, err - -1 [08:31:38]Error loading remotecore IPU1!,Continuing with boot ... [08:31:38]spl: falcon_args_file not set in environment, falling back to default [08:31:38]reading single-stage-boot.dtb [08:31:38]spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 [08:31:38]reading u-boot.img [08:31:38]reading u-boot.img [08:31:38]reading u-boot.img [08:31:38]reading u-boot.img [08:31:38] [08:31:38] [08:31:38]U-Boot 2016.05-00018-g6bc25a5 (Aug 05 2019 - 14:43:03 +0530) [08:31:38] [08:31:38]CPU : DRA752-GP ES2.0 [08:31:38]Model: TI DRA742 [08:31:38]Board: DRA74x Cascade EVM REV H.4 [08:31:38]DRAM: 4 GiB [08:31:38]MMC: i2c_write: error waiting for data ACK (status=0x116) [08:31:38]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:38]OMAP SD/MMC: 0, OMAP SD/MMC: 1 [08:31:38]Card did not respond to voltage select! [08:31:38]*** Warning - MMC init failed, using default environment [08:31:38] [08:31:38]Card did not respond to voltage select! [08:31:38]ERROR: invalid mmc device [08:31:38] [08:31:38]at arch/arm/cpu/armv7/omap-common/utils.c:193/mmc_get_part_size() [08:31:38]Warning: fastboot.userdata_size: unable to calc [08:31:38]SCSI: SATA link 0 timeout. [08:31:38]AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode [08:31:38]flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst [08:31:38]scanning bus for devices... [08:31:38]Found 0 device(s). [08:31:38]Net: Could not get PHY for ethernet@48484000: addr 2 [08:31:38] [08:31:38]Warning: ethernet@48484000 using MAC address from ROM [08:31:39]eth0: ethernet@48484000 [08:31:41]Hit any key to stop autoboot: 0 [08:31:41]## Error: "board_findfdt" not defined [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]switch to partitions #0, OK [08:31:41]mmc0 is current device [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]SD/MMC found on device 0 [08:31:41]reading boot.scr [08:31:41]** Unable to read file boot.scr ** [08:31:41]reading uEnv.txt [08:31:41]185 bytes read in 3 ms (59.6 KiB/s) [08:31:41]Loaded env from uEnv.txt [08:31:41]Importing environment from mmc0 ... [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]switch to partitions #0, OK [08:31:41]mmc0 is current device [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]i2c_write: error waiting for data ACK (status=0x116) [08:31:41]pcf8575_i2c_write_le16 i2c write failed to addr 21 [08:31:41]SD/MMC found on device 0 [08:31:41]3577032 bytes read in 171 ms (19.9 MiB/s) [08:31:41]107792 bytes read in 24 ms (4.3 MiB/s) [08:31:41]Booting from mmc0 ... [08:31:41]Kernel image @ 0x82000000 [ 0x000000 - 0x3694c8 ] [08:31:41]## Flattened Device Tree blob at 88000000 [08:31:41] Booting using the fdt blob at 0x88000000 [08:31:41] Loading Device Tree to 8ffe2000, end 8ffff50f ... OK [08:31:41] [08:31:41]Starting kernel ... [08:31:41] [08:31:44][ 0.000000] Booting Linux on physical CPU 0x0 [08:31:44][ 0.000000] Initializing cgroup subsys cpuset [08:31:44][ 0.000000] Initializing cgroup subsys cpu [08:31:44][ 0.000000] Initializing cgroup subsys cpuacct [08:31:44][ 0.000000] Linux version 4.4.84-00041-g84382ab (x0284921@bangvideoapps02) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #1 SMP PREEMPT Mon Aug 5 14:52:40 IST 2019 [08:31:44][ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [08:31:44][ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [08:31:44][ 0.000000] Machine model: TI DRA742 Cascade Radar Board [08:31:44][ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [08:31:44][ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [08:31:44][ 0.000000] Reserved memory: regions without no-map are not yet supported [08:31:44][ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [08:31:44][ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [08:31:44][ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [08:31:44][ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [08:31:44][ 0.000000] Reserved memory: regions without no-map are not yet supported [08:31:44][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [08:31:45][ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [08:31:45][ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [08:31:45][ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [08:31:45][ 0.000000] Reserved memory: regions without no-map are not yet supported [08:31:45][ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 64 MiB [08:31:45][ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [08:31:45][ 0.000000] Reserved memory: regions without no-map are not yet supported [08:31:45][ 0.000000] cma: Reserved 64 MiB at 0x00000000bc000000 [08:31:45][ 0.000000] Forcing write-allocate cache policy for SMP [08:31:45][ 0.000000] Memory policy: Data cache writealloc [08:31:45][ 0.000000] OMAP4: Map 0x000000027fd00000 to fe600000 for dram barrier [08:31:45][ 0.000000] DRA752 ES2.0 [08:31:45][ 0.000000] PERCPU: Embedded 11 pages/cpu @f2f1e000 s14912 r8192 d21952 u45056 [08:31:45][ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 1025330 [08:31:45][ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=3cc717e1-02 rw rootwait ip=none cma=64M vmalloc=128M [08:31:45][ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [08:31:45][ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [08:31:45][ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [08:31:45][ 0.000000] Memory: 2439424K/4109312K available (6671K kernel code, 320K rwdata, 2396K rodata, 336K init, 290K bss, 1424128K reserved, 245760K cma-reserved, 2167808K highmem) [08:31:45][ 0.000000] Virtual kernel memory layout: [08:31:45][ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [08:31:45][ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [08:31:45][ 0.000000] vmalloc : 0xf8000000 - 0xff800000 ( 120 MB) [08:31:45][ 0.000000] lowmem : 0xc0000000 - 0xf7800000 ( 888 MB) [08:31:45][ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [08:31:45][ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [08:31:45][ 0.000000] .text : 0xc0008000 - 0xc08e302c (9069 kB) [08:31:45][ 0.000000] .init : 0xc08e4000 - 0xc0938000 ( 336 kB) [08:31:45][ 0.000000] .data : 0xc0938000 - 0xc0988220 ( 321 kB) [08:31:45][ 0.000000] .bss : 0xc098a000 - 0xc09d2880 ( 291 kB) [08:31:45][ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [08:31:45][ 0.000000] Preemptible hierarchical RCU implementation. [08:31:45][ 0.000000] Build-time adjustment of leaf fanout to 32. [08:31:45][ 0.000000] NR_IRQS:16 nr_irqs:16 16 [08:31:45][ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [08:31:45][ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [08:31:45][ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [08:31:45][ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [08:31:45][ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [08:31:45][ 0.000015] Switching to timer-based delay loop, resolution 162ns [08:31:45][ 0.000345] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [08:31:45][ 0.000352] OMAP clocksource: 32k_counter at 32768 Hz [08:31:45][ 0.000805] Console: colour dummy device 80x30 [08:31:45][ 0.000820] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [08:31:45][ 0.000827] This ensures that you still see kernel messages. Please [08:31:45][ 0.000832] update your kernel commandline. [08:31:45][ 0.000846] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [08:31:45][ 0.000860] pid_max: default: 32768 minimum: 301 [08:31:45][ 0.000956] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [08:31:45][ 0.000967] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [08:31:45][ 0.001514] Initializing cgroup subsys io [08:31:45][ 0.001530] Initializing cgroup subsys memory [08:31:45][ 0.001554] Initializing cgroup subsys devices [08:31:45][ 0.001566] Initializing cgroup subsys freezer [08:31:45][ 0.001578] Initializing cgroup subsys perf_event [08:31:45][ 0.001589] Initializing cgroup subsys pids [08:31:45][ 0.001616] CPU: Testing write buffer coherency: ok [08:31:45][ 0.001810] /cpus/cpu@0 missing clock-frequency property [08:31:45][ 0.001827] /cpus/cpu@1 missing clock-frequency property [08:31:45][ 0.001837] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [08:31:45][ 0.001871] Setting up static identity map for 0x80008380 - 0x800083e0 [08:31:45][ 0.080060] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [08:31:45][ 0.080129] Brought up 2 CPUs [08:31:45][ 0.080142] SMP: Total of 2 processors activated (24.59 BogoMIPS). [08:31:45][ 0.080148] CPU: All CPU(s) started in HYP mode. [08:31:45][ 0.080153] CPU: Virtualization extensions available. [08:31:45][ 0.080532] devtmpfs: initialized [08:31:45][ 0.109481] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [08:31:45][ 0.110462] omap_hwmod: l3_main_2 using broken dt data from ocp [08:31:45][ 0.313582] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [08:31:45][ 0.313604] futex hash table entries: 512 (order: 3, 32768 bytes) [08:31:45][ 0.318780] pinctrl core: initialized pinctrl subsystem [08:31:45][ 0.319648] NET: Registered protocol family 16 [08:31:45][ 0.320612] DMA: preallocated 256 KiB pool for atomic coherent allocations [08:31:45][ 0.350234] cpuidle: using governor ladder [08:31:45][ 0.380256] cpuidle: using governor menu [08:31:45][ 0.388776] OMAP GPIO hardware version 0.1 [08:31:45][ 0.392707] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 ! [08:31:45][ 0.408123] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [08:31:45][ 0.408136] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [08:31:45][ 0.417225] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [08:31:45][ 0.417235] hw-breakpoint: maximum watchpoint size is 8 bytes. [08:31:45][ 0.417702] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [08:31:45][ 0.417712] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [08:31:45][ 0.418286] OMAP DMA hardware revision 0.0 [08:31:45][ 0.461509] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [08:31:45][ 0.462641] edma 43300000.edma: memcpy is disabled [08:31:45][ 0.467330] edma 43300000.edma: TI EDMA DMA engine driver [08:31:45][ 0.471384] omap-iommu 40d01000.mmu: 40d01000.mmu registered [08:31:45][ 0.471570] omap-iommu 40d02000.mmu: 40d02000.mmu registered [08:31:45][ 0.471729] omap-iommu 58882000.mmu: 58882000.mmu registered [08:31:45][ 0.471887] omap-iommu 55082000.mmu: 55082000.mmu registered [08:31:45][ 0.472163] omap-iommu 41501000.mmu: 41501000.mmu registered [08:31:45][ 0.472367] omap-iommu 41502000.mmu: 41502000.mmu registered [08:31:45][ 0.475408] palmas 0-0058: IRQ missing: skipping irq request [08:31:45][ 0.490843] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [08:31:45][ 0.552753] pcf857x: probe of 0-0020 failed with error -121 [08:31:45][ 0.553005] pcf857x: probe of 0-0021 failed with error -121 [08:31:45][ 0.553866] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [08:31:45][ 0.554280] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [08:31:45][ 0.554477] media: Linux media interface: v0.10 [08:31:45][ 0.554530] Linux video capture interface: v2.00 [08:31:45][ 0.554572] pps_core: LinuxPPS API ver. 1 registered [08:31:45][ 0.554580] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [08:31:45][ 0.554609] PTP clock support registered [08:31:45][ 0.554659] EDAC MC: Ver: 3.0.0 [08:31:45][ 0.555411] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [08:31:45][ 0.555701] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [08:31:45][ 0.556029] Advanced Linux Sound Architecture Driver Initialized. [08:31:45][ 0.556887] clocksource: Switched to clocksource arch_sys_counter [08:31:45][ 0.567500] NET: Registered protocol family 2 [08:31:45][ 0.568003] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [08:31:45][ 0.568066] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [08:31:45][ 0.568191] TCP: Hash tables configured (established 8192 bind 8192) [08:31:45][ 0.568237] UDP hash table entries: 512 (order: 2, 16384 bytes) [08:31:45][ 0.568269] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [08:31:45][ 0.568412] NET: Registered protocol family 1 [08:31:45][ 0.568714] RPC: Registered named UNIX socket transport module. [08:31:45][ 0.568723] RPC: Registered udp transport module. [08:31:45][ 0.568730] RPC: Registered tcp transport module. [08:31:45][ 0.568736] RPC: Registered tcp NFSv4.1 backchannel transport module. [08:31:45][ 0.569704] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [08:31:45][ 0.579690] squashfs: version 4.0 (2009/01/31) Phillip Lougher [08:31:45][ 0.580333] NFS: Registering the id_resolver key type [08:31:45][ 0.580362] Key type id_resolver registered [08:31:45][ 0.580370] Key type id_legacy registered [08:31:45][ 0.580427] ntfs: driver 2.1.32 [Flags: R/O]. [08:31:45][ 0.581699] bounce: pool size: 64 pages [08:31:45][ 0.581856] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) [08:31:45][ 0.581871] io scheduler noop registered [08:31:45][ 0.581884] io scheduler deadline registered [08:31:45][ 0.581917] io scheduler cfq registered (default) [08:31:45][ 0.587391] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128 [08:31:45][ 0.590901] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [08:31:45][ 0.590914] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [08:31:45][ 0.590947] IO 0x20003000..0x20012fff -> 0x00000000 [08:31:45][ 0.590968] MEM 0x20013000..0x2fffffff -> 0x20013000 [08:31:45][ 0.591174] dra7-pcie 51000000.pcie_rc: CFG 'Bus Master Enable' change [08:31:45][ 0.591184] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618228] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 [08:31:45][ 0.618242] pci_bus 0000:00: root bus resource [bus 00-ff] [08:31:45][ 0.618252] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [08:31:45][ 0.618261] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [08:31:45][ 0.618325] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618342] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618367] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618381] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618404] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618418] dra7-pcie 51000000.pcie_rc: CFG 'Memory Space Enable' change [08:31:45][ 0.618723] PCI: bus0: Fast back to back transfers disabled [08:31:45][ 0.636976] PCI: bus1: Fast back to back transfers disabled [08:31:45][ 0.637102] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff] [08:31:45][ 0.637117] pci 0000:00:00.0: BAR 8: assigned [mem 0x20200000-0x202fffff] [08:31:45][ 0.637127] pci 0000:00:00.0: BAR 1: assigned [mem 0x20020000-0x2002ffff] [08:31:45][ 0.637142] pci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x20203fff 64bit] [08:31:45][ 0.637189] pci 0000:00:00.0: PCI bridge to [bus 01] [08:31:45][ 0.637201] pci 0000:00:00.0: bridge window [mem 0x20200000-0x202fffff] [08:31:45][ 0.637415] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt [08:31:45][ 0.637424] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt [08:31:45][ 0.698950] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [08:31:45][ 0.702333] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 202, base_baud = 3000000) is a 8250 [08:31:45][ 1.802326] console [ttyS0] enabled [08:31:45][ 1.806714] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 203, base_baud = 3000000) is a 8250 [08:31:46][ 1.816421] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 204, base_baud = 3000000) is a 8250 [08:31:46][ 1.826437] [drm] Initialized drm 1.1.0 20060810 [08:31:46][ 1.831996] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [08:31:46][ 1.838683] [drm] No driver support for vblank timestamp query. [08:31:46][ 1.844810] [drm] Initialized vdrm 1.0.0 20110917 on minor 0 [08:31:46][ 1.851958] OMAP DSS rev 6.1 [08:31:46][ 1.855700] omapdss_dss 58000000.dss: bound 58001000.dispc (ops dispc_component_ops) [08:31:46][ 1.871326] loop: module loaded [08:31:46][ 1.874863] vmemexp device MAJOR num = 245 [08:31:46][ 1.879016] vmemexp class registered [08:31:46][ 1.882730] /dev/vmemexp device registered [08:31:46][ 1.886843] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [08:31:46][ 1.892394] nvme 0000:01:00.0: enabling device (0140 -> 0142) [08:31:46][ 1.898814] nand: No NAND device found [08:31:46][ 1.902586] omap2-nand 8000000.nand: scan failed, may be bus-width mismatch [08:31:46][ 1.911683] m25p80 spi32766.0: found n25q00, expected s25fl256s1 [08:31:46][ 1.917807] m25p80 spi32766.0: n25q00 (131072 Kbytes) [08:31:46][ 1.922941] 7 ofpart partitions found on MTD device spi32766.0 [08:31:46][ 1.928822] Creating 7 MTD partitions on "spi32766.0": [08:31:46][ 1.933983] 0x000000000000-0x000000040000 : "QSPI.SPL" [08:31:46][ 1.950138] 0x000000040000-0x000000140000 : "QSPI.u-boot" [08:31:46][ 1.966454] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [08:31:46][ 1.973407] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [08:31:46][ 1.990094] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [08:31:46][ 2.007501] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [08:31:46][ 2.020902] nvme0n1: p1 [08:31:46][ 2.023970] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [08:31:46][ 2.041778] libphy: Fixed MDIO Bus: probed [08:31:46][ 2.096919] davinci_mdio 48485000.mdio: davinci mdio revision 1.6 [08:31:46][ 2.103044] libphy: 48485000.mdio: probed [08:31:46][ 2.120298] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83867 [08:31:46][ 2.129241] cpsw 48484000.ethernet: Detected MACID = b4:52:a9:5d:f6:dc [08:31:46][ 2.135895] cpsw 48484000.ethernet: cpts: overflow check period 800 [08:31:46][ 2.142870] cpsw 48484000.ethernet: cpsw: Detected MACID = b4:52:a9:5d:f6:dd [08:31:46][ 2.151491] mousedev: PS/2 mouse device common for all mice [08:31:46][ 2.157671] i2c /dev entries driver [08:31:46][ 2.166350] omap_hsmmc 4809c000.mmc: Got CD GPIO [08:31:46][ 2.207585] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [08:31:46][ 2.213970] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [08:31:46][ 2.220813] evm_3v3_sw: supplied by sysen1 [08:31:46][ 2.257737] ledtrig-cpu: registered to indicate activity on CPUs [08:31:46][ 2.266163] aic_dvdd: supplied by evm_3v3_sw [08:31:46][ 2.271441] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [08:31:46][ 2.278949] NET: Registered protocol family 10 [08:31:46][ 2.294249] sit: IPv6 over IPv4 tunneling driver [08:31:46][ 2.299471] NET: Registered protocol family 17 [08:31:46][ 2.304164] Key type dns_resolver registered [08:31:46][ 2.308612] omap_voltage_late_init: Voltage driver support not added [08:31:46][ 2.315509] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [08:31:46][ 2.321734] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [08:31:46][ 2.328425] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [08:31:46][ 2.334633] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [08:31:46][ 2.341981] Power Management for TI OMAP4+ devices. [08:31:46][ 2.347118] Registering SWP/SWPB emulation handler [08:31:46][ 2.353267] dmm 4e000000.dmm: workaround for errata i878 in use [08:31:46][ 2.360838] dmm 4e000000.dmm: initialized all PAT entries [08:31:46][ 2.367245] [drm] Initialized omapdrm 1.0.0 20110917 on minor 1 [08:31:46][ 2.395127] hctosys: unable to open rtc device (rtc0) [08:31:46][ 2.412166] evm_1v8: disabling [08:31:46][ 2.415244] aic_dvdd: disabling [08:31:46][ 2.418643] ldousb: disabling [08:31:46][ 2.422109] ALSA device list: [08:31:46][ 2.425091] No soundcards found. [08:31:46][ 2.429409] Waiting for root device PARTUUID=3cc717e1-02... [08:31:46][ 2.437014] mmc0: host does not support reading read-only switch, assuming write-enable [08:31:46][ 2.449658] mmc0: new high speed SDHC card at address aaaa [08:31:46][ 2.455580] mmcblk0: mmc0:aaaa SC16G 14.8 GiB [08:31:46][ 2.463881] mmcblk0: p1 p2 [08:31:46][ 2.539402] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities [08:31:46][ 2.550092] EXT4-fs (mmcblk0p2): couldn't mount as ext2 due to feature incompatibilities [08:31:46][ 2.720742] EXT4-fs (mmcblk0p2): recovery complete [08:31:46][ 2.726717] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null) [08:31:46][ 2.734895] VFS: Mounted root (ext4 filesystem) on device 179:2. [08:31:46][ 2.746588] devtmpfs: mounted [08:31:46][ 2.749805] Freeing unused kernel memory: 336K [08:31:46][ 2.754343] This architecture does not have kernel memory protection. [08:31:47][ 2.960952] systemd[1]: System time before build time, advancing clock. [08:31:47][ 3.005036] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) [08:31:47][ 3.020124] random: systemd: uninitialized urandom read (16 bytes read, 18 bits of entropy available) [08:31:47][ 3.031801] systemd[1]: systemd 229 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT +GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN) [08:31:47][ 3.050445] systemd[1]: Detected architecture arm. [08:31:47] [08:31:47]Welcome to Arago 2016.12! [08:31:47] [08:31:47][ 3.080102] systemd[1]: Set hostname to . [08:31:47][ 3.153120] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [08:31:47][ 3.168263] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [08:31:47][ 3.178614] random: systemd-gpt-aut: uninitialized urandom read (16 bytes read, 19 bits of entropy available) [08:31:47][ 3.191279] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [08:31:47][ 3.207670] random: systemd-sysv-ge: uninitialized urandom read (16 bytes read, 20 bits of entropy available) [08:31:47][ 3.296057] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [08:31:47][ 3.305584] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [08:31:47][ 3.315516] random: systemd: uninitialized urandom read (16 bytes read, 23 bits of entropy available) [08:31:47][ 3.599416] systemd[1]: Configuration file /etc/systemd/system/multi-user.target.wants/vsdk.service is marked executable. Please remove executable permission bits. Proceeding anyway. [08:31:47][ 3.618752] systemd[1]: [/etc/systemd/system/multi-user.target.wants/vsdk.service:3] Failed to add dependency on rc.pvr, ignoring: Invalid argument [08:31:47][ 3.722044] systemd[1]: sysinit.target: Found ordering cycle on sysinit.target/start [08:31:47][ 3.729935] systemd[1]: sysinit.target: Found dependency on alignment.service/start [08:31:47][ 3.737699] systemd[1]: sysinit.target: Found dependency on basic.target/start [08:31:47][ 3.744959] systemd[1]: sysinit.target: Found dependency on sockets.target/start [08:31:47][ 3.752463] systemd[1]: sysinit.target: Found dependency on dbus.socket/start [08:31:47][ 3.759651] systemd[1]: sysinit.target: Found dependency on sysinit.target/start [08:31:47][ 3.767101] systemd[1]: sysinit.target: Breaking ordering cycle by deleting job alignment.service/start [08:31:47][ 3.776543] systemd[1]: alignment.service: Job alignment.service/start deleted to break ordering cycle starting with sysinit.target/start [08:31:47][ SKIP ] Ordering cycle found, skipping alignment.service [08:31:47][ 3.809456] systemd[1]: Listening on Journal Socket (/dev/log). [08:31:47][ OK ] Listening on Journal Socket (/dev/log). [08:31:48][ 3.849747] systemd[1]: Listening on Syslog Socket. [08:31:48][ OK ] Listening on Syslog Socket. [08:31:48][ 3.877369] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. [08:31:48][ OK ] Started Dispatch Password Requests to Console Directory Watch. [08:31:48][ 3.907255] systemd[1]: Started Forward Password Requests to Wall Directory Watch. [08:31:48][ OK ] Started Forward Password Requests to Wall Directory Watch. [08:31:48][ 3.937090] systemd[1]: Reached target Paths. [08:31:48][ OK ] Reached target Paths. [08:31:48][ 3.958550] systemd[1]: Created slice System Slice. [08:31:48][ OK ] Created slice System Slice. [08:31:48][ 3.987339] systemd[1]: Listening on Network Service Netlink Socket. [08:31:48][ OK ] Listening on Network Service Netlink Socket. [08:31:48][ 4.017213] systemd[1]: Listening on Journal Socket. [08:31:48][ OK ] Listening on Journal Socket. [08:31:48][ 4.077316] systemd[1]: Starting Remount Root and Kernel File Systems... [08:31:48] Starting Remount Root and Kernel File Systems... [08:31:48][ 4.100161] systemd[1]: Mounting POSIX Message Queue File System... [08:31:48][ 4.119339] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null) [08:31:48] Mounting POSIX Message Queue File System... [08:31:48][ 4.177107] systemd[1]: Mounting Debug File System... [08:31:48] Mounting Debug File System... [08:31:48][ 4.199594] systemd[1]: Starting Journal Service... [08:31:48] Starting Journal Service... [08:31:48][ 4.218683] systemd[1]: Starting Load Kernel Modules... [08:31:48] Starting Load Kernel Modules... [08:31:48][ 4.235908] systemd[1]: Starting Setup Virtual Console... [08:31:48] Starting Setup Virtual Console... [08:31:48][ 4.259813] systemd[1]: Reached target Remote File Systems. [08:31:48][ OK ] Reached target Remote File Systems. [08:31:48][ 4.317310] systemd[1]: Starting Create list of required static device nodes for the current kernel... [08:31:48] Starting Create list of required st... nodes for the current kernel... [08:31:48][ 4.347270] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. [08:31:48][ OK ] Listening on /dev/initctl Compatibility Named Pipe. [08:31:48][ 4.377893] systemd[1]: Created slice system-serial\x2dgetty.slice. [08:31:48][ OK ] Created slice system-serial\x2dgetty.slice. [08:31:48][ 4.437099] systemd[1]: Mounting Temporary Directory... [08:31:48] Mounting Temporary Directory... [08:31:48][ 4.467374] systemd[1]: Listening on udev Control Socket. [08:31:48][ OK ] Listening on udev Control Socket. [08:31:48][ 4.497999] systemd[1]: Created slice system-getty.slice. [08:31:48][ OK ] Created slice system-getty.slice. [08:31:48][ 4.527726] systemd[1]: Created slice User and Session Slice. [08:31:48][ OK ] Created slice User and Session Slice. [08:31:48][ 4.557121] systemd[1]: Reached target Slices. [08:31:48][ OK ] Reached target Slices. [08:31:48][ 4.577100] systemd[1]: Reached target Swap. [08:31:48][ OK ] Reached target Swap. [08:31:48][ 4.597183] systemd[1]: Listening on udev Kernel Socket. [08:31:48][ OK ] Listening on udev Kernel Socket. [08:31:48][ 4.662348] systemd[1]: Mounted Debug File System. [08:31:48][ OK ] Mounted Debug File System. [08:31:48][ 4.687236] systemd[1]: Mounted POSIX Message Queue File System. [08:31:48][ OK ] Mounted POSIX Message Queue File System. [08:31:48][ 4.717154] systemd[1]: Mounted Temporary Directory. [08:31:48][ OK ] Mounted Temporary Directory. [08:31:48][ 4.747337] systemd[1]: Started Journal Service. [08:31:48][ OK ] Started Journal Service. [08:31:48][ OK ] Started Remount Root and Kernel File Systems. [08:31:48][FAILED] Failed to start Load Kernel Modules. [08:31:48]See 'systemctl status systemd-modules-load.service' for details. [08:31:49][ OK ] Started Setup Virtual Console. [08:31:49][ OK ] Started Create list of required sta...ce nodes for the current kernel. [08:31:49] Starting Create Static Device Nodes in /dev... [08:31:49] Starting Apply Kernel Variables... [08:31:49] Starting udev Coldplug all Devices... [08:31:49] Starting Flush Journal to Persistent Storage... [08:31:49][ OK ] Started Apply Kernel Variables. [08:31:49][ OK ] Started Create Static Device Nodes in /dev. [08:31:49][ 5.480568] systemd-journald[120]: Received request to flush runtime journal from PID 1 [08:31:49][ OK ] Started Flush Journal to Persistent Storage. [08:31:49][ OK ] Reached target Local File Systems (Pre). [08:31:49] Mounting /media/ram... [08:31:49] Mounting /var/volatile... [08:31:49] Starting udev Kernel Device Manager... [08:31:49][ OK ] Mounted /var/volatile. [08:31:49][ OK ] Mounted /media/ram. [08:31:49][ OK ] Started udev Kernel Device Manager. [08:31:50][ OK ] Started udev Coldplug all Devices. [08:31:50][ 6.082447] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000 [08:31:50][ 6.099270] remoteproc0: 55020000.ipu is available [08:31:50][ 6.117028] remoteproc0: Note: remoteproc is still under development and considered experimental. [08:31:50][ 6.151804] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [08:31:50] Starting Load/Save Random Seed... [08:31:50][ 6.183148] omap-rproc 40800000.dsp: assigned reserved memory node dsp1_cma@99000000 [08:31:50][ OK ] Reached target Local File Systems. [08:31:50][ 6.208939] remoteproc1: 40800000.dsp is available [08:31:50][ 6.216510] remoteproc1: Note: remoteproc is still under development and considered experimental. [08:31:50][ 6.237289] remoteproc1: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [08:31:50][ 6.261890] remoteproc1: Direct firmware load for dra7-dsp1-fw.xe66 failed with error -2 [08:31:50][ 6.277545] omap-rproc 41000000.dsp: assigned reserved memory node dsp2_cma@9f000000 [08:31:50][ 6.291101] remoteproc1: failed to load dra7-dsp1-fw.xe66 [08:31:50][ 6.317029] remoteproc2: 41000000.dsp is available [08:31:50] Starting Create Volatile Files and Directories...[ 6.328858] remoteproc2: Note: remoteproc is still under development and considered experimental. [08:31:50] [08:31:50][ 6.362118] remoteproc2: THE BINARY FORMAT IS NOT YET FINALIZED, and backward compatibility isn't yet guaranteed. [08:31:50][ OK ] Started Load/Save Random Seed. [08:31:50][ 6.384607] remoteproc2: Direct firmware load for dra7-dsp2-fw.xe66 failed with error -2 [08:31:50][ 6.432097] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2 [08:31:50][ 6.433120] remoteproc2: failed to load dra7-dsp2-fw.xe66 [08:31:50][ OK ] Started Create Volatile Files and Directories. [08:31:50][ 6.517791] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20 [08:31:50][ 6.565631] remoteproc0: registered virtio0 (type 7) [08:31:50][ OK ] Found device /dev/ttyS0. [08:31:50][ 6.607066] omap_rtc 48838000.rtc: rtc core: registered 48838000.rtc as rtc0 [08:31:51] Starting Update UTMP about System Boot/Shutdown... [08:31:51] Starting Network Time Synchronization... [08:31:51][ 7.052011] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3 [08:31:51][ 7.080170] SCSI subsystem initialized [08:31:51][ 7.084854] CAN device driver interface [08:31:51][ 7.088778] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3 [08:31:51][ 7.092581] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3 [08:31:51][ OK ] Started Network Time Synchronization. [08:31:51][ OK ] Started Update UTMP about System Boot/Shutdown. [08:31:51] Starting Synchronize System and HW clocks... [08:31:51][ OK ] Reached target System Time Synchronized. [08:31:51][ 7.436311] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=254) [08:31:51][ OK ] Started Synchronize System and HW clocks. [08:31:51][ 7.497772] [drm] Initialized pvr 1.14.3699939 20110701 on minor 2 [08:31:51][ 7.504472] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [08:31:51][ 7.522582] EXT4-fs (nvme0n1p1): recovery complete [08:31:51][ 7.537700] ahci 4a140000.sata: Enable 32-bit DMA instead of 64-bit. [08:31:51][ 7.561476] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [08:31:51][ 7.585955] EXT4-fs (nvme0n1p1): mounted filesystem with ordered data mode. Opts: (null) [08:31:51][ 7.601777] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [08:31:51][ 7.649917] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [08:31:51][ 7.750023] scsi host0: ahci [08:31:51][ 7.754301] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 240 [08:31:52][ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [08:31:52][ OK ] Reached target System Initialization. [08:31:52][ OK ] Listening on dropbear.socket. [08:31:52][ OK ] Listening on D-Bus System Message Bus Socket.[ 8.136958] ata1: SATA link down (SStatus 0 SControl 300) [08:31:52] [08:31:52][ OK ] Reached target Sockets. [08:31:52][ OK ] Reached target Basic System. [08:31:52][ OK ] Started D-Bus System Message Bus. [08:31:52][ 8.354883] remoteproc0: powering up 55020000.ipu [08:31:52][ 8.370148] remoteproc0: Booting fw image dra7-ipu2-fw.xem4, size 4396172 [08:31:52][ 8.377230] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1 [08:31:52] Starting Network Service... [08:31:52] Starting Permit User Sessions... [08:31:52][ 8.445388] remoteproc0: remote processor 55020000.ipu is now up [08:31:52][ 8.456618] net eth0: initializing cpsw version 1.15 (0) [08:31:52][ 8.462179] net eth0: initialized cpsw ale version 1.4 [08:31:52][ 8.467660] net eth0: ALE Table size 1024 [08:31:52][ OK ] Started Kernel Logging Service.[ 8.473334] virtio_rpmsg_bus virtio0: rpmsg host is online [08:31:52] [08:31:52][ 8.483981] net eth0: phy found : id is : 0x2000a231 [08:31:52][ 8.496859] virtio_rpmsg_bus virtio0: creating channel rpmsg-proto addr 0x50 [08:31:52][ 8.515005] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [08:31:52][ OK ] Started Launching Vision SDK App. [08:31:52][ OK ] Started Daily Cleanup of Temporary Directories.[ 8.556417] NET: Registered protocol family 41 [08:31:52] [08:31:52][ OK ] Reached target Timers. [08:31:52] Starting Login Service... [08:31:52][ OK ] Started System Logging Service. [08:31:52] Starting rc.pvr.service... [08:31:52][FAILED] Failed to start Network Service. [08:31:52]See 'systemctl status systemd-networkd.service' for details. [08:31:52][ 8.755173] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] [08:31:52][ OK ] Started Permit User Sessions. [08:31:53][ OK ] Started rc.pvr.service. [08:31:53] Starting weston.service... [08:31:53][ OK ] Stopped Network Service. [08:31:53] Starting Network Service... [08:31:53][ OK ] Started Getty on tty1. [08:31:53][ OK ] Started Serial Getty on ttyS0. [08:31:53][ OK ] Started weston.service. [08:31:53][FAILED] Failed to start Network Service. [08:31:53]See 'systemctl status systemd-networkd.service' for details. [08:31:53][ OK ] Started Login Service. [08:31:53][ OK ] Stopped Network Service. [08:31:54] Starting Network Service... [08:31:54] Starting tiipclad-daemon.service... [08:31:54] Starting telnetd.service... [08:31:54][FAILED] Failed to start Network Service. [08:31:54]See 'systemctl status systemd-networkd.service' for details. [08:31:54][ OK ] Started tiipclad-daemon.service. [08:31:54][ OK ] Started telnetd.service. [08:31:54][ OK ] Stopped Network Service. [08:31:54] Starting Network Service... [08:31:54][FAILED] Failed to start Network Service. [08:31:54]See 'systemctl status systemd-networkd.service' for details. [08:31:54][ OK ] Stopped Network Service. [08:31:54] Starting Network Service... [08:31:54][FAILED] Failed to start Network Service. [08:31:54]See 'systemctl status systemd-networkd.service' for details. [08:31:54][ OK ] Stopped Network Service. [08:31:54][FAILED] Failed to listen on Network Service Bus Name. [08:31:54]See 'systemctl status org.freedesktop.network1.busname' for details. [08:31:54][FAILED] Failed to start Network Service. [08:31:54]See 'systemctl status systemd-networkd.service' for details. [08:31:54][ OK ] Reached target Network. [08:31:54] Starting Network Name Resolution... [08:31:54][ OK ] Started Network Name Resolution. [08:31:56][ 12.484484] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [08:31:56][ 12.492406] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [08:31:57][ 13.697551] EXT4-fs (nvme0n1p1): mounted filesystem with ordered data mode. Opts: (null) [08:31:59] [08:31:59] _____ _____ _ _ [08:31:59]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ [08:31:59]| | _| .'| . | . | | __| _| . | | | -_| _| _| [08:31:59]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| [08:31:59] |___| |___| [08:31:59] [08:31:59]Arago Project http://arago-project.org dra7xx-evm ttyS0 [08:31:59] [08:31:59]Arago 2016.12 dra7xx-evm ttyS0 [08:31:59] [08:31:59]dra7xx-evm login: [ 15.736177] DMA: Module install successful, device major num = 241 [08:31:59][ 15.742814] DRV: Module install successful [08:32:00][ 15.998006] omap_l3_noc 44000000.ocp: L3 application error: target 3 mod:2 (unclearable) [08:32:00][ 16.006153] omap_l3_noc 44000000.ocp: L3 debug error: target 3 mod:2 (unclearable) [08:32:14] [08:32:14] _____ _____ _ _ [08:32:14]| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ [08:32:14]| | _| .'| . | . | | __| _| . | | | -_| _| _| [08:32:14]|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| [08:32:14] |___| |___| [08:32:14] [08:32:14]Arago Project http://arago-project.org dra7xx-evm ttyS0 [08:32:14] [08:32:14]Arago 2016.12 dra7xx-evm ttyS0 [08:32:14] Best regards, Annie + +Hi, Can you share the O/P of "make -s showconfig"? Run the above command from the vision SDK build directory. Please share the image of your EVM board. Thanks Gaviraju + +Hi Annie, The test log from the SD card that came with the board is of different SDK version (u-boot 2016.05 and Linux Kernel 4.4) The one they are building is different version (u-boot 2019 and Linux Kernel 4.19) Regards, Vishal + +Hi Vishal, The customer tried to download u-boot2016.05 and kernel4.4.84 to compile today, but there are still problems with the compilation. lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/u-boot/u-boot$ ls configs/dr dra7xx_evm_defconfig dra7xx_evm_nodt_defconfig dra7xx_hs_evm_defconfig draco_defconfig dragonboard410c_defconfig dreamplug_defconfig lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/u-boot/u-boot$ cd - /home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ make linux make -C ./hlos/makerules/linux -f build_uboot.mk uboot make[1]: Entering directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/hlos/makerules/linux' make -fbuild_uboot.mk uboot_build UBOOT_TARGET=dra7xx_evm_vision_config make[2]: Entering directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/hlos/makerules/linux' make -C /home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/../ti_components/os_tools/linux/u-boot/u-boot ARCH=arm CROSS_COMPILE=/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/arm/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf/bin/arm-linux-gnueabihf- dra7xx_evm_vision_config make[3]: Entering directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/u-boot/u-boot' *** *** Can't find default configuration "arch/../configs/dra7xx_evm_vision_defconfig"! *** make[4]: *** [scripts/kconfig/Makefile:114: dra7xx_evm_vision_defconfig] Error 1 make[3]: *** [Makefile:477: dra7xx_evm_vision_config] Error 2 make[3]: Leaving directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/u-boot/u-boot' make[2]: *** [build_uboot.mk:6: uboot_build] Error 2 make[2]: Leaving directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/hlos/makerules/linux' make[1]: *** [build_uboot.mk:13: uboot] Error 2 make[1]: Leaving directory '/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build/hlos/makerules/linux' make: *** [Makefile:450: uboot] Error 2 lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ He checked the configuration file under u-boot, but did not find the following configuration file. configs/dra7xx_evm_vision_defconfig The download page of u-boot is：https://git.ti.com/cgit/glsdk/psdkla-u-boot/refs/tags kenerl's download page is：https://git.ti.com/cgit/glsdk/psdkla-kernel/refs/tags Thanks, Annie + +Hi, Please follow the Vision SDK user-guide & don't clone u-boot & kernel from "https://git.ti.com/cgit/glsdk/psdkla-u-boot/refs/tags", https://git.ti.com/cgit/glsdk/psdkla-kernel/refs/tags because these are all not specific to vision SDK. I'm requesting you to follow the instruction from the user guide, it's having all the information. With the below steps, I'm able to run one of the HLOS use-cases. 1) Download & install the vision SDK 3.8 2) Install package required for the build (chapter 2.2.3 Other mandatory software packages for build) 3) Do the below changes in the vision_sdk/build/Rules.make MAKECONFIG?=tda2xx_evm_linux_all 4) Follow the instruction provided in the user-guide for GIT configuration set-up (chapter 2.4.1 One time PC set up) 5) cd vision_sdk/build/ 6) Run the below script from the build directory, this will clone kernel, u-boot, etc. ./hlos/scripts/linux/setup_linux.sh 7)Follow the instruction provided in the user-guide for target file system set-up(chapter 2.4.2.1.4 Download and untar file system) 8)Follow the instruction provided in the user-guide for A15 compiler set-up (chapter 2.2.1 A15 Compiler, Linker) 9) make linux 10) make linux_install 11) make -s -j depend 12) make -s -j 13) Copy the target file system & boot image, MLO, etc to the SD card & insert the SD into the target SD card slot. 14) Run the below command in the UART console. cd /opt/vision_sdk/ source ./vision_sdk_load.sh ./apps.out 15) You can choose the use-case you want to run from the menu. Thanks Gaviraju + +Hi Gaviraju, Thanks for your supporting. Customers feel that the experience of cloning repositories from git.ti.com is terrible. Download speed is about 10KB. He wanted to know if the speed was so slow because of TI's speed limit? Do you have this experience too? Could you you possible to share a normally downloaded version or link address? lewis@ubuntu:~/ti_software_git$ git clone git://git.ti.com/glsdk/psdkla-kernel.git omap Cloning into 'omap'... remote: Counting objects: 7956674, done. remote: Compressing objects: 100% (1215458/1215458), done. rceiving objects: 0% (2935/7956674), 1.63 MiB | 18.00 KiB/s . Thanks, Annie + +Hi, This is not a TI limitation because we are able to download Mbps. git clone git://git.ti.com/glsdk/psdkla-kernel.git omap Cloning into 'omap'... remote: Counting objects: 7956674, done. remote: Compressing objects: 100% (1215458/1215458), done. Receiving objects: 5% (399321/7956674), 197.18 MiB | 11.76 MiB/s Try again OR try with a different PC Thanks Gaviraju + +Hi Gaviraju, He remade it, but it still failed. He wants to confirm, in the 13th step, is the file system & boot image, MLO, etc. directly copied to the SD card? What format is the file system of the SD card? Here he uses ./hlos/scripts/linux/mksdboot.sh to make it into the SD card, and the boot LOG is as follows: U-Boot 2019.01-00014-gf454ae0-dirty (Dec 09 2020 - 18:04:13 -0800) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x Cascade EVM REV H.4 DRAM: 4 GiB NAND: 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Loading Environment from MMC... Card did not respond to voltage select! *** Warning - No block device, using default environment Card did not respond to voltage select! invalid mmc device Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 i2c_write: error waiting for data ACK (status=0x116) pcf8575_i2c_write_le16 i2c write failed to addr 21 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** Unable to read file boot.scr ** 173 bytes read in 1 ms (168.9 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 4407808 bytes read in 193 ms (21.8 MiB/s) 96488 bytes read in 5 ms (18.4 MiB/s) ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe5000, end 8ffff8e7 ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.19.73-00040-g3d03684-dirty (lewis@ubuntu) (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 SMP PREEMPT Wed Dec 9 18:05:19 PST 2020 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d [ 0.000000] CPU: div instructions available: patching division code [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] OF: fdt: Machine model: TI DRA742 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000040300000, size 3 MiB [ 0.000000] OF: reserved mem: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 80 MiB [ 0.000000] OF: reserved mem: initialized node ipu2-memory@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x000000009e000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node ipu1-memory@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a1000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node dsp1-memory@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000a3000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node dsp2-memory@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a9000000, size 32 MiB [ 0.000000] OF: reserved mem: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000b0000000, size 64 MiB [ 0.000000] OF: reserved mem: initialized node gpu-memory@c0000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 64 MiB at 0x00000000bbc00000 [ 0.000000] OMAP4: Map 0x00000000bfd00000 to (ptrval) for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] random: get_random_bytes called from start_kernel+0xb4/0x470 with crng_init=0 [ 0.000000] percpu: Embedded 16 pages/cpu s36492 r8192 d20852 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 251456 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=PARTUUID=651f4d1c-02 rw rootwait ip=none mem=1024M cma=64M [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 280708K/1012736K available (10240K kernel code, 341K rwdata, 2804K rodata, 2048K init, 269K bss, 420732K reserved, 311296K cma-reserved, 128000K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0x(ptrval) - 0x(ptrval) (12256 kB) [ 0.000000] .init : 0x(ptrval) - 0x(ptrval) (2048 kB) [ 0.000000] .data : 0x(ptrval) - 0x(ptrval) ( 342 kB) [ 0.000000] .bss : 0x(ptrval) - 0x(ptrval) ( 270 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] Tasks RCU enabled. [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] GIC: Using split EOI/Deactivate mode [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000018] Switching to timer-based delay loop, resolution 162ns [ 0.000296] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000305] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000761] Console: colour dummy device 80x30 [ 0.000781] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000789] This ensures that you still see kernel messages. Please [ 0.000797] update your kernel commandline. [ 0.000830] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000847] pid_max: default: 32768 minimum: 301 [ 0.000971] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000987] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001530] CPU: Testing write buffer coherency: ok [ 0.001568] CPU0: Spectre v2: using ICIALLU workaround [ 0.001780] /cpus/cpu@0 missing clock-frequency property [ 0.001799] /cpus/cpu@1 missing clock-frequency property [ 0.001812] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.059917] Setting up static identity map for 0x80200000 - 0x80200060 [ 0.079930] rcu: Hierarchical SRCU implementation. [ 0.100124] EFI services will not be available. [ 0.119991] smp: Bringing up secondary CPUs ... [ 0.200350] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.200356] CPU1: Spectre v2: using ICIALLU workaround [ 0.200479] smp: Brought up 1 node, 2 CPUs [ 0.200492] SMP: Total of 2 processors activated (24.59 BogoMIPS). [ 0.200501] CPU: All CPU(s) started in HYP mode. [ 0.200508] CPU: Virtualization extensions available. [ 0.200994] devtmpfs: initialized [ 0.219259] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.219520] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.219539] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.224374] pinctrl core: initialized pinctrl subsystem [ 0.224902] DMI not present or invalid. [ 0.225182] NET: Registered protocol family 16 [ 0.226374] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.227290] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.421923] cpuidle: using governor ladder [ 0.421958] cpuidle: using governor menu [ 0.432077] OMAP GPIO hardware version 0.1 [ 0.457786] No ATAGs? [ 0.457863] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.457878] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.458399] omap4_sram_init:Unable to allocate sram needed to handle errata I688 [ 0.458411] omap4_sram_init:Unable to get sram pool needed to handle errata I688 [ 0.459054] OMAP DMA hardware revision 0.0 [ 0.470741] edma 43300000.edma: memcpy is disabled [ 0.474139] edma 43300000.edma: TI EDMA DMA engine driver [ 0.481286] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.482863] evm_3v3: supplied by evm_12v0 [ 0.483157] evm_5v0: supplied by evm_12v0 [ 0.483457] evm_3v6: supplied by evm_5v0 [ 0.486656] omap-iommu 40d01000.mmu: 40d01000.mmu registered [ 0.486827] omap-iommu 40d02000.mmu: 40d02000.mmu registered [ 0.487079] omap-iommu 58882000.mmu: 58882000.mmu registered [ 0.487312] omap-iommu 55082000.mmu: 55082000.mmu registered [ 0.487688] omap-iommu 41501000.mmu: 41501000.mmu registered [ 0.487867] omap-iommu 41502000.mmu: 41502000.mmu registered [ 0.488143] iommu: Adding device 58820000.ipu to group 1 [ 0.488223] iommu: Adding device 55020000.ipu to group 2 [ 0.488349] iommu: Adding device 40800000.dsp to group 0 [ 0.488586] iommu: Adding device 41000000.dsp to group 3 [ 0.489698] SCSI subsystem initialized [ 0.490994] palmas 0-0058: IRQ missing: skipping irq request [ 0.520947] palmas 0-0058: Muxing GPIO 2e, PWM 0, LED 0 [ 0.522610] SMPS123: supplied by regulator-dummy [ 0.524488] SMPS45: supplied by regulator-dummy [ 0.526333] SMPS6: supplied by regulator-dummy [ 0.528051] SMPS7: supplied by regulator-dummy [ 0.529892] SMPS8: supplied by regulator-dummy [ 0.531606] SMPS9: supplied by regulator-dummy [ 0.532595] LDO1: supplied by regulator-dummy [ 0.541428] LDO2: supplied by regulator-dummy [ 0.551301] LDO3: supplied by regulator-dummy [ 0.561309] LDO4: supplied by regulator-dummy [ 0.561575] random: fast init done [ 0.562045] LDO5: supplied by regulator-dummy [ 0.562751] LDO6: supplied by regulator-dummy [ 0.563464] LDO7: supplied by regulator-dummy [ 0.564194] LDO8: supplied by regulator-dummy [ 0.564921] LDO9: supplied by regulator-dummy [ 0.571348] LDOLN: supplied by regulator-dummy [ 0.581370] LDOUSB: supplied by regulator-dummy [ 0.593601] pcf857x: probe of 0-0020 failed with error -121 [ 0.593851] pcf857x: probe of 0-0021 failed with error -121 [ 0.594018] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 0.594486] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 0.594707] media: Linux media interface: v0.10 [ 0.594746] videodev: Linux video capture interface: v2.00 [ 0.594818] pps_core: LinuxPPS API ver. 1 registered [ 0.594828] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.594848] PTP clock support registered [ 0.594881] EDAC MC: Ver: 3.0.0 [ 0.595679] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400 [ 0.595923] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400 [ 0.596439] Advanced Linux Sound Architecture Driver Initialized. [ 0.597250] clocksource: Switched to clocksource arch_sys_counter [ 0.605320] NET: Registered protocol family 2 [ 0.605892] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes) [ 0.605921] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.605984] TCP bind hash table entries: 8192 (order: 4, 65536 bytes) [ 0.606110] TCP: Hash tables configured (established 8192 bind 8192) [ 0.606180] UDP hash table entries: 512 (order: 2, 16384 bytes) [ 0.606214] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) [ 0.606353] NET: Registered protocol family 1 [ 0.626793] RPC: Registered named UNIX socket transport module. [ 0.626804] RPC: Registered udp transport module. [ 0.626813] RPC: Registered tcp transport module. [ 0.626821] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.627904] hw perfevents: no interrupt-affinity property for /pmu, guessing. [ 0.628110] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 0.629091] Initialise system trusted keyrings [ 0.629222] workingset: timestamp_bits=14 max_order=18 bucket_order=4 [ 0.634138] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.644634] NFS: Registering the id_resolver key type [ 0.644660] Key type id_resolver registered [ 0.644669] Key type id_legacy registered [ 0.644708] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.646283] Key type asymmetric registered [ 0.646294] Asymmetric key parser 'x509' registered [ 0.646347] bounce: pool size: 64 pages [ 0.646380] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) [ 0.646390] io scheduler noop registered [ 0.646399] io scheduler deadline registered [ 0.646497] io scheduler cfq registered (default) [ 0.646507] io scheduler mq-deadline registered [ 0.646516] io scheduler kyber registered [ 0.652336] pinctrl-single 4a003400.pinmux: 282 pins, size 1128 [ 0.656328] dra7-pcie 51000000.pcie: Linked as a consumer to phy-4a094000.pciephy.1 [ 0.656573] dra7-pcie 51000000.pcie: WA for Errata i870 not applied [ 0.656664] dra7-pcie 51000000.pcie: host bridge /ocp/axi@0/pcie@51000000 ranges: [ 0.656706] dra7-pcie 51000000.pcie: IO 0x20003000..0x20012fff -> 0x00000000 [ 0.656734] dra7-pcie 51000000.pcie: MEM 0x20013000..0x2fffffff -> 0x20013000 [ 1.657017] dra7-pcie 51000000.pcie: Phy link never came up [ 1.657151] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 [ 1.657165] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.657177] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 1.657188] pci_bus 0000:00: root bus resource [mem 0x20013000-0x2fffffff] [ 1.663312] PCI: bus0: Fast back to back transfers disabled [ 1.668921] PCI: bus1: Fast back to back transfers enabled [ 1.668965] pci 0000:00:00.0: BAR 0: assigned [mem 0x20100000-0x201fffff 64bit] [ 1.668984] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 1.669303] pcieport 0000:00:00.0: Signaling PME with IRQ 176 [ 1.669437] pcieport 0000:00:00.0: AER enabled with IRQ 176 [ 1.673580] evm_1v8: supplied by smps9 [ 1.673838] evm_3v3_sw: supplied by sysen1 [ 1.674071] aic_dvdd: supplied by evm_3v3_sw [ 1.674158] vtt_fixed: supplied by sysen2 [ 1.718873] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled [ 1.722434] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 45, base_baud = 3000000) is a 8250 [ 2.925250] console [ttyS0] enabled [ 2.929675] 4806c000.serial: ttyS1 at MMIO 0x4806c000 (irq = 46, base_baud = 3000000) is a 8250 [ 2.939306] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 47, base_baud = 3000000) is a 8250 [ 2.950412] omap_rng 48090000.rng: Random Number Generator ver. 20 [ 2.950741] random: crng init done [ 2.970535] brd: module loaded [ 2.979831] loop: module loaded [ 2.983647] vmemexp device MAJOR num = 244 [ 2.987811] vmemexp class registered [ 2.991500] /dev/vmemexp device registered [ 2.995614] ioctl DBUFIOC_EXPORT_VIRTMEM = -1072899120 [ 3.026544] m25p80 spi0.0: found n25q00, expected s25fl256s1 [ 3.032517] m25p80 spi0.0: n25q00 (131072 Kbytes) [ 3.037356] 10 fixed-partitions partitions found on MTD device spi0.0 [ 3.043827] Creating 10 MTD partitions on "spi0.0": [ 3.048746] 0x000000000000-0x000000010000 : "QSPI.SPL" [ 3.054623] 0x000000010000-0x000000020000 : "QSPI.SPL.backup1" [ 3.061178] 0x000000020000-0x000000030000 : "QSPI.SPL.backup2" [ 3.067728] 0x000000030000-0x000000040000 : "QSPI.SPL.backup3" [ 3.074254] 0x000000040000-0x000000140000 : "QSPI.u-boot" [ 3.080363] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os" [ 3.087056] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env" [ 3.093524] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1" [ 3.100679] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel" [ 3.106754] 0x0000009e0000-0x000002000000 : "QSPI.file-system" [ 3.113871] libphy: Fixed MDIO Bus: probed [ 3.177288] davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000 [ 3.184981] davinci_mdio 48485000.mdio: no live phy, scanning all [ 3.224435] libphy: 48485000.mdio: probed [ 3.229195] cpsw 48484000.ethernet: Detected MACID = b4:52:a9:5d:f6:dc [ 3.235798] cpsw 48484000.ethernet: initialized cpsw ale version 1.4 [ 3.242208] cpsw 48484000.ethernet: ALE Table size 1024 [ 3.247516] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies) [ 3.255510] cpsw 48484000.ethernet: cpsw: Detected MACID = b4:52:a9:5d:f6:dd [ 3.264151] i2c /dev entries driver [ 3.272769] cpu cpu0: Linked as a consumer to regulator.10 [ 3.278385] cpu cpu0: Linked as a consumer to regulator.32 [ 3.285260] sdhci: Secure Digital Host Controller Interface driver [ 3.291522] sdhci: Copyright(c) Pierre Ossman [ 3.296826] sdhci-pltfm: SDHCI platform and OF driver helper [ 3.303765] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 3.312647] sdhci-omap 4809c000.mmc: Got CD GPIO [ 3.317484] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 3.324550] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 3.331582] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 3.338464] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 3.345354] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 3.351988] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 3.359347] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 [ 3.366133] sdhci-omap 480b4000.mmc: Dropping the link to regulator.2 [ 3.372691] sdhci-omap 480b4000.mmc: Linked as a consumer to regulator.2 [ 3.405267] mmc0: SDHCI controller on 480b4000.mmc [480b4000.mmc] using ADMA [ 3.413169] ti-iodelay 4844a000.padconf: Set reg 0x840 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.422135] ti-iodelay 4844a000.padconf: Set reg 0x848 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.431142] ti-iodelay 4844a000.padconf: Set reg 0x84c Delay(a: 307 g: 0), Elements(C=0 F=8)0x29008 [ 3.440325] ti-iodelay 4844a000.padconf: Set reg 0x850 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.449286] ti-iodelay 4844a000.padconf: Set reg 0x854 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.458341] ti-iodelay 4844a000.padconf: Set reg 0x870 Delay(a: 785 g: 0), Elements(C=1 F=8)0x29028 [ 3.467540] ti-iodelay 4844a000.padconf: Set reg 0x874 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.476551] ti-iodelay 4844a000.padconf: Set reg 0x878 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.485600] ti-iodelay 4844a000.padconf: Set reg 0x87c Delay(a: 613 g: 0), Elements(C=1 F=3)0x29023 [ 3.494804] ti-iodelay 4844a000.padconf: Set reg 0x880 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.503828] ti-iodelay 4844a000.padconf: Set reg 0x884 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.512879] ti-iodelay 4844a000.padconf: Set reg 0x888 Delay(a: 683 g: 0), Elements(C=1 F=5)0x29025 [ 3.522082] ti-iodelay 4844a000.padconf: Set reg 0x88c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.531126] ti-iodelay 4844a000.padconf: Set reg 0x890 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.540185] ti-iodelay 4844a000.padconf: Set reg 0x894 Delay(a: 835 g: 0), Elements(C=1 F=9)0x29029 [ 3.549323] ti-iodelay 4844a000.padconf: Set reg 0x898 Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.558256] ti-iodelay 4844a000.padconf: Set reg 0x89c Delay(a: 0 g: 0), Elements(C=0 F=0)0x29000 [ 3.567585] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 [ 3.574372] sdhci-omap 480d1000.mmc: Dropping the link to regulator.8 [ 3.580953] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.7 [ 3.587757] sdhci-omap 480d1000.mmc: Linked as a consumer to regulator.8 [ 3.677302] sdhci-omap 480d1000.mmc: no pinctrl state for sdr104 mode [ 3.683775] sdhci-omap 480d1000.mmc: no pinctrl state for ddr50 mode [ 3.690180] sdhci-omap 480d1000.mmc: no pinctrl state for sdr50 mode [ 3.696567] sdhci-omap 480d1000.mmc: no pinctrl state for hs200_1_8v mode [ 3.729078] mmc1: SDHCI controller on 480d1000.mmc [480d1000.mmc] using PIO [ 3.736982] ledtrig-cpu: registered to indicate activity on CPUs [ 3.747559] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.3 [ 3.754480] tlv320aic3x-codec 0-0019: Linked as a consumer to regulator.4 [ 3.763192] davinci-mcasp 4847c000.mcasp: invalid tdm slots: 0 [ 3.770605] NET: Registered protocol family 10 [ 3.776008] Segment Routing with IPv6 [ 3.779999] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 3.786445] NET: Registered protocol family 17 [ 3.791166] Key type dns_resolver registered [ 3.795637] Registering SWP/SWPB emulation handler [ 3.800506] omap_voltage_late_init: Voltage driver support not added [ 3.806914] Power Management for TI OMAP4+ devices. [ 3.812553] Loading compiled-in X.509 certificates [ 3.842718] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.849434] [drm] No driver support for vblank timestamp query. [ 3.855747] [drm] Initialized vdrm 1.0.0 20191105 for 44000000.ocp:vdrm@0 on minor 0 [ 3.940363] Console: switching to colour frame buffer device 240x67 [ 3.963333] vdrm 44000000.ocp:vdrm@0: fb0: DRM emulated frame buffer device [ 3.970855] dmm 4e000000.dmm: workaround for errata i878 in use [ 3.978460] dmm 4e000000.dmm: initialized all PAT entries [ 3.984743] [drm] Initialized omapdrm 1.0.0 20110917 for omapdrm.0 on minor 1 [ 3.993170] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 4.002038] sdhci-omap 4809c000.mmc: Got CD GPIO [ 4.006891] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.014028] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.020944] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.027808] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.034704] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.041342] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.050022] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 4.057781] asoc-simple-card sound0: ASoC: no DMI vendor name! [ 4.066347] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 4.075207] sdhci-omap 4809c000.mmc: Got CD GPIO [ 4.080066] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.087146] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.094065] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.100915] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.107837] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.114454] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.122454] omap_gpio 4805d000.gpio: Could not set line 27 debounce to 200000 microseconds (-22) [ 4.131316] sdhci-omap 4809c000.mmc: Got CD GPIO [ 4.136109] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.31 [ 4.143220] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.150139] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.156949] sdhci-omap 4809c000.mmc: Linked as a consumer to regulator.16 [ 4.163878] sdhci-omap 4809c000.mmc: Dropping the link to regulator.16 [ 4.170509] sdhci-omap 4809c000.mmc: Dropping the link to regulator.31 [ 4.178051] hctosys: unable to open rtc device (rtc0) [ 4.183879] aic_dvdd: disabling [ 4.187224] ldousb: disabling [ 4.190509] pbias_mmc_omap5: disabling [ 4.194313] ALSA device list: [ 4.197344] #0: DRA7xx-EVM [ 4.201057] Waiting for root device PARTUUID=651f4d1c-02... Check the resources as follows: lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ ./hlos/scripts/linux/setup_linux.sh Linux Build Setup Cloning Kernel fatal: destination path 'omap' already exists and is not an empty directory. fatal: A branch named 'kernel_dev' already exists. Cloning Cmem fatal: destination path 'ludev' already exists and is not an empty directory. fatal: A branch named 'cmem_dev' already exists. Cloning UBoot fatal: destination path 'u-boot' already exists and is not an empty directory. fatal: A branch named 'uboot_dev' already exists. Cloning SGX ddk fatal: destination path 'omap5-sgx-ddk-linux' already exists and is not an empty directory. fatal: A branch named 'sgx_dev' already exists. Basic Linux Setup for 4.19 done Download the filesystem and untar Other files are as follows: (file system and resources) lewis@ubuntu:~/ti_software_linux$ ls gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf.tar.xz PROCESSOR_SDK_VISION_03_08_00_00_setuplinux.bin tisdk-rootfs-image-dra7xx-evm_vsdk_3_8.tar.xz Thanks, Annie + +Hi, Please share the below details. Go to the directory "ti_components/os_tools/linux/kernel/omap" & run the command "git log" then share the O/P of this command. Share the O/P of "make -s showconfig", run this command from the vision SDK build directoty. Yes, we should use the script ./hlos/scripts/linux/mksdboot.sh to prepare the SD card to boot. Thanks Gaviraju + +Hi Gaviraju, lewis@ubuntu:~/ti_software_git/omap$ git log commit 3d036849ccdc09ec79610811620f9805fbccb322 Author: Subhajit Paul Date: Tue May 15 14:14:06 2018 +0530 vdrm:Full rewrite for kernel 4.19 Heavily based on omapdrm Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit ec514ec3605908139cc62b4067b4d0e043805b1c Author: Subhajit Paul Date: Mon Apr 30 12:26:20 2018 +0530 vdrm: added DT node for visionSDK example usecase Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit 8bbd382ee34df3d60c5915b757dfc229cf7dcdf4 Author: Ramprasad N Date: Tue Oct 1 13:14:17 2019 +0530 :...skipping... commit 3d036849ccdc09ec79610811620f9805fbccb322 Author: Subhajit Paul Date: Tue May 15 14:14:06 2018 +0530 vdrm:Full rewrite for kernel 4.19 Heavily based on omapdrm Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit ec514ec3605908139cc62b4067b4d0e043805b1c Author: Subhajit Paul Date: Mon Apr 30 12:26:20 2018 +0530 vdrm: added DT node for visionSDK example usecase Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit 8bbd382ee34df3d60c5915b757dfc229cf7dcdf4 Author: Ramprasad N Date: Tue Oct 1 13:14:17 2019 +0530 ti_config_fragments: Turn off TIDSS configuration TIDSS is for J7 and if it is enabled in visionSDK, it has symbol conflicts with vDRM exposed functions. Signed-off-by: Ramprasad N commit 7dfa5c9d72024520ed0cb388597760bc91673978 Author: Ramprasad N Date: Thu Oct 31 12:14:33 2019 +0530 ti_config_fragments: Add CONFIG_BLK_DEV_NVME to default config Cascade radar board has a NVME SSD card mounted on the board. Add NVME driver support by default in the kernel config Signed-off-by: Shravan Karthik Signed-off-by: Ramprasad N commit 65852b621070dd781a76e5111579f6a550cded6f Author: Ramprasad N Date: Thu Aug 29 15:24:12 2019 +0530 omapdrm: Remove DSS dependencies in omapdrm probe lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ gmake -s showconfig # # Build Config is [ tda2xx_evm_linux_all ] # Build Config file is @ /home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk # Build Config .h file is @ /home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all/system_cfg.h # Build CPUs is @ ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 # # CPUs included in application, # PROC_IPU1_0_INCLUDE=no # PROC_IPU1_1_INCLUDE=no # PROC_IPU2_INCLUDE=yes # PROC_DSP1_INCLUDE=yes # PROC_DSP2_INCLUDE=yes # PROC_EVE1_INCLUDE=yes # PROC_EVE2_INCLUDE=yes # PROC_EVE3_INCLUDE=yes # PROC_EVE4_INCLUDE=yes # PROC_A15_0_INCLUDE=yes # # Platform config, # VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] # PLATFORM=tda2xx-evm # DUAL_A15_SMP_BIOS=no # IPU1_SMP_BIOS=no # DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] # NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] # NSP_TFDTP_INCLUDE=no [options: yes no] # TDA2EX_ETHSRV_BOARD=no [options: yes no] # FATFS_PROC_TO_USE=none [options: ipu1_0 none] # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] # # Build config, # BUILD_OS=Linux [options: Windows_NT Linux] # BUILD_DEPENDENCY_ALWAYS=no # BUILD_ALGORITHMS=no # BUILD_INFOADAS=no # PROFILE=release [options: debug release] # KW_BUILD=no # CPLUSPLUS_BUILD=no # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] # A15_TARGET_OS=Linux [options: Bios Linux Qnx] # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] # # Safety Module config, # RTI_INCLUDE=no # ECC_FFI_INCLUDE=no # DCC_ESM_INCLUDE=no # # Video Module config, # IVAHD_INCLUDE=yes # VPE_INCLUDE=yes # CAL_INCLUDE=no # ISS_INCLUDE=no # ISS_ENABLE_DEBUG_TAPS=no # WDR_LDC_INCLUDE=no # DSS_INCLUDE=yes # # Open Compute config, # OPENCL_INCLUDE=no # TARGET_ROOTDIR=/home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs # ENABLE_OPENCV=no # ENABLE_OPENCV_TESTS=no # OPENVX_INCLUDE=no # # Log config, # ENABLE_UART_LOG=yes # ENABLE_NETWORK_LOG=no # ENABLE_CCS_LOG=no # CIO_REDIRECT=yes # # IPC config, # WORKQ_INCLUDE=no # IPC_LIB_INCLUDE=no # # AUTOSAR_APP=no # # Surround View config, # SRV_FAST_BOOT_INCLUDE=no # # Other Module config, # AVB_INCLUDE=no # DCAN_INCLUDE=no # RADAR_ONLY=no # RADAR_STUDIO=no # CPU_IDLE_ENABLED=yes # FAST_BOOT_INCLUDE=no # DATA_VIS_INCLUDE=no # HS_DEVICE=no # ULTRASONIC_INCLUDE=no # PGA450= # PGA460= # ENABLE_ALL_DEPTH= # # Linux config, # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig # DEFAULT_DTB=dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb # CMEM_INCLUDE=yes # IPUMM_INCLUDE=no # IPU1_EVELOADER_INCLUDE=yes # ROBUST_RVC_INCLUDE=no # BUILD_ADAM_CAR=no # # Alg plugins included in build, # ALG_autocalibration ALG_dmaSwMs ALG_framecopy ALG_sparseopticalflow ALG_structurefrommotion ALG_surroundview # # Use-cases included in build, # UC_srv_calibration UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_2mp_3d_srv UC_lvds_vip_multi_cam_3d_adaptive_srv UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_disp_dist_src_display UC_ov490_vip_multi_cam_3d_srv UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display # # # CPUs that are NOT required but included in config [ tda2xx_evm_linux_all ], # # # CPUs that are required but not included in config [ tda2xx_evm_linux_all ], # # ERROR: IPU1_0 MUST be included in application # # Edit /home/lewis/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk to include or exclude CPUs in an application # lewis@ubuntu:~/ti/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/build$ Thanks, Annie + +Hi, Why the kernel code in this directory(~/ti_software_git/omap)? this should be in the "ti_components/os_tools/linux/kernel/omap" directory. Are you building the Linux kernel from "~/ti_software_git/omap" directory? Thanks Gaviraju + +Hi Gaviraju, Eventually, he will copy ~/ti_software_git/omap to ti_components/os_tools/linux/kernel/omap. lewis@ubuntu:~/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/os_tools/linux/kernel/omap$ git log commit 3d036849ccdc09ec79610811620f9805fbccb322 Author: Subhajit Paul Date: Tue May 15 14:14:06 2018 +0530 vdrm:Full rewrite for kernel 4.19 Heavily based on omapdrm Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit ec514ec3605908139cc62b4067b4d0e043805b1c Author: Subhajit Paul Date: Mon Apr 30 12:26:20 2018 +0530 vdrm: added DT node for visionSDK example usecase Signed-off-by: Subhajit Paul Signed-off-by: Ramprasad N commit 8bbd382ee34df3d60c5915b757dfc229cf7dcdf4 Author: Ramprasad N Date: Tue Oct 1 13:14:17 2019 +0530 Thanks, Annie + +Hi, Please share all the boot image, I will test in my setup. Thanks Gaviraju + +Hi Gaviraju, The file size is 811M. Even the file is compressed, it still exceeds 200M. Is there any way to share you the file? lewis@ubuntu:~/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot$ ll -h total 811M drwxr-xr-x 2 lewis lewis 4.0K Dec 15 18:08 ./ drwxr-xr-x 3 lewis lewis 4.0K Dec 15 17:32 ../ -rwxr-xr-x 1 lewis lewis 181K Dec 15 17:32 MLO* -rw-rw-r-- 1 lewis lewis 810M Dec 15 18:08 tisdk-rootfs-image-dra7xx-evm.tar.xz -rwxr-xr-x 1 lewis lewis 1.2M Dec 15 17:32 u-boot.img* -rwxrwxr-x 1 lewis lewis 173 Dec 15 17:32 uenv.txt* lewis@ubuntu:~/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/hlos/linux/boot$ Annie + +Hi, Share only the boot images(MLO, u-boot, uenv.txt & /boot directory from rootfs Thanks Gaviraju + +Hi Gaviraju, 0435.boot.rar Annie + +Hi, Please share the Kernel Image(This will be in the /boot directory of rootfs). Thanks Gaviraju + +Hi Gaviraju, kernel image.rar Annie + +Hi, I tested your images in my TDA2xx EVM setup, it's working successfully. From the previous post boot log I came to know that you are using the CASCADE TDA2XX EVM board, so Please repeat all the steps with the below config instead of tda2xx_evm_linux_all MAKECONFIG?=tda2xx_cascade_linux_radar (File: vision_sdk/build/Rules.make) Please do the clean build after the above changes. Thanks Gaviraju + diff --git a/data2/text/range/30001+/968370.txt b/data2/text/range/30001+/968370.txt new file mode 100644 index 0000000000000000000000000000000000000000..3b42e740b2b9cdeeb101318f22fed8b87f077a2c --- /dev/null +++ b/data2/text/range/30001+/968370.txt @@ -0,0 +1,309 @@ +Ticket Name: Compiler/TDA2EXEVM: TDA2 with mobileNet model is not working + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler hi Champs: Customer tooks this caffe-Jacinto to train the "mobileNet" on the PC/NB, it is trained and working on the PC/NB However, deploying it onto TDAEX17, it won't works. Customer will post the error log on this thread later, please help. BR Rio + +Responses: +Hi Rio, Sure, we look into it as soon as customer post the error log. Thanks, Praveen + +Hi Praveen, I've trained 'mobiledetnet-1.0' caffe model with using train_mobilenet_object_detection.sh model works well when simulating on PC after using import tool and running on tda2, precision & frame rate become really low import config was set by following TIDL user guide how to modify import tool or config to overcome this issue + +Hi, Kindly refer to this below thread and update prototxt file and then import your model again and check, https://e2e.ti.com/support/processors/f/791/t/689617 Also, follow FAQ in the user guide on "setting “layersGroupId” and “conv2dKernelType” parameters in import config file" and set them properly. Thanks, Praveen + +Hi Praveen, I followed the thread as you mentioned, update below two parameters keep_top_k: 20 confidence_threshold: 0.15 and follow the User Guide setting “layersGroupId” & “conv2dKernelType” but tda2 running situation seems quite the same I wonder why both mAP & frame rate of mobileNet are lower than jacintoNet, and what is the advantage of mobileNet compare to jacintoNet + +Hi, I hope you had imported the model again after the above two parameters. Please confirm. Also, can you please share the import config file used for importing? Thanks, Praveen + +yes I had reimported the model after update parameters frame rate indeed increased from 4 to 6, but still not reach half of jacintoNets frame rate (both model detect with same input image resolution) import config attached below tidl_import_mobNet.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 50 + +numParamBits = 8 +# 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 +inElementType = 0 + +inputNetFile = "_trained_model\deploy.prototxt" +inputParamsFile = "_trained_model\test_mobiledetnet-1.0_iter_3000.caffemodel" +outputNetFile = "_output_model\tidl_net_jdetNet_ssd.bin" +outputParamsFile = "_output_model\tidl_param_jdetNet_ssd.bin" + +rawSampleInData = 0 +preProcType = 4 +sampleInData = "_test_image\test.jpg" +tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" +layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 +#layersGroupId = 0 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 0 +conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +Okay, thanks for confirmation and sharing the import config file, can you please also share the import tool log ? Thanks, Praveen + +Okay, output log file attached below importlog_mob0111.txt Caffe Network File : _trained_model\deploy.prototxt +Caffe Model File : _trained_model\test_mobiledetnet-1.0_iter_3000.caffemodel +TIDL Network File : _output_model\tidl_net_jdetNet_ssd.bin +TIDL Model File : _output_model\tidl_param_jdetNet_ssd.bin +Name of the Network : mobiledetnet-1.0_deploy +Num Inputs : 1 +Could not find detection_out Params + Num of Layer Detected : 71 + 0, TIDL_DataLayer , data 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , 0 , + 1, TIDL_BatchNormLayer , data/bias 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , 737280 , + 2, TIDL_ConvolutionLayer , conv1 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , 53084160 , + 3, TIDL_ConvolutionLayer , conv2_1/dw 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 160 , 384 , 17694720 , + 4, TIDL_ConvolutionLayer , conv2_1/sep 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 160 , 384 , 1 , 64 , 160 , 384 , 125829120 , + 5, TIDL_ConvolutionLayer , conv2_2/dw 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 160 , 384 , 1 , 64 , 80 , 192 , 8847360 , + 6, TIDL_ConvolutionLayer , conv2_2/sep 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 80 , 192 , 1 , 128 , 80 , 192 , 125829120 , + 7, TIDL_ConvolutionLayer , conv3_1/dw 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 80 , 192 , 1 , 128 , 80 , 192 , 17694720 , + 8, TIDL_ConvolutionLayer , conv3_1/sep 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 80 , 192 , 1 , 128 , 80 , 192 , 251658240 , + 9, TIDL_ConvolutionLayer , conv3_2/dw 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 80 , 192 , 1 , 128 , 40 , 96 , 4423680 , + 10, TIDL_ConvolutionLayer , conv3_2/sep 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 128 , 40 , 96 , 1 , 256 , 40 , 96 , 125829120 , + 11, TIDL_ConvolutionLayer , conv4_1/dw 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 40 , 96 , 1 , 256 , 40 , 96 , 8847360 , + 12, TIDL_ConvolutionLayer , conv4_1/sep 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 40 , 96 , 1 , 256 , 40 , 96 , 251658240 , + 13, TIDL_ConvolutionLayer , conv4_2/dw 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 256 , 40 , 96 , 1 , 256 , 20 , 48 , 2211840 , + 14, TIDL_ConvolutionLayer , conv4_2/sep 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 256 , 20 , 48 , 1 , 512 , 20 , 48 , 125829120 , + 15, TIDL_ConvolutionLayer , conv5_1/dw 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 16, TIDL_ConvolutionLayer , conv5_1/sep 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 17, TIDL_ConvolutionLayer , conv5_2/dw 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 18, TIDL_ConvolutionLayer , conv5_2/sep 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 19, TIDL_ConvolutionLayer , conv5_3/dw 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 20, TIDL_ConvolutionLayer , conv5_3/sep 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 21, TIDL_ConvolutionLayer , conv5_4/dw 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 22, TIDL_ConvolutionLayer , conv5_4/sep 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 23, TIDL_ConvolutionLayer , conv5_5/dw 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 24, TIDL_ConvolutionLayer , conv5_5/sep 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 25, TIDL_ConvolutionLayer , conv5_6/dw 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 512 , 20 , 48 , 1 , 512 , 10 , 24 , 1105920 , + 26, TIDL_ConvolutionLayer , conv5_6/sep 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 10 , 24 , 1 , 1024 , 10 , 24 , 125829120 , + 27, TIDL_ConvolutionLayer , conv6/dw 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , 2211840 , + 28, TIDL_ConvolutionLayer , conv6/sep 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , 251658240 , + 29, TIDL_PoolingLayer , pool6 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 1024 , 10 , 24 , 1 , 1024 , 5 , 12 , 245760 , + 30, TIDL_PoolingLayer , pool7 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 1024 , 5 , 12 , 1 , 1024 , 3 , 6 , 73728 , + 31, TIDL_PoolingLayer , pool8 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 1024 , 3 , 6 , 1 , 1024 , 2 , 3 , 24576 , + 32, TIDL_ConvolutionLayer , ctx_output1/dw 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 32 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 4423680 , + 33, TIDL_ConvolutionLayer , ctx_output1/sep 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , 251658240 , + 34, TIDL_ConvolutionLayer , ctx_output2/dw 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 34 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , 2211840 , + 35, TIDL_ConvolutionLayer , ctx_output2/sep 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 1024 , 10 , 24 , 1 , 512 , 10 , 24 , 125829120 , + 36, TIDL_ConvolutionLayer , ctx_output3/dw 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 36 , 1 , 1024 , 5 , 12 , 1 , 1024 , 5 , 12 , 552960 , + 37, TIDL_ConvolutionLayer , ctx_output3/sep 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 1024 , 5 , 12 , 1 , 512 , 5 , 12 , 31457280 , + 38, TIDL_ConvolutionLayer , ctx_output4/dw 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 38 , 1 , 1024 , 3 , 6 , 1 , 1024 , 3 , 6 , 165888 , + 39, TIDL_ConvolutionLayer , ctx_output4/sep 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 1024 , 3 , 6 , 1 , 512 , 3 , 6 , 9437184 , + 40, TIDL_ConvolutionLayer , ctx_output5/dw 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 40 , 1 , 1024 , 2 , 3 , 1 , 1024 , 2 , 3 , 55296 , + 41, TIDL_ConvolutionLayer , ctx_output5/sep 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 1024 , 2 , 3 , 1 , 512 , 2 , 3 , 3145728 , + 42, TIDL_ConvolutionLayer , ctx_output1/sep/relu_mbox_loc 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 42 , 1 , 512 , 20 , 48 , 1 , 24 , 20 , 48 , 11796480 , + 43, TIDL_FlattenLayer , ctx_output1/sep/relu_mbox_loc_perm 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 24 , 20 , 48 , 1 , 1 , 1 , 23040 , 1 , + 44, TIDL_ConvolutionLayer , ctx_output1/sep/relu_mbox_conf 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 44 , 1 , 512 , 20 , 48 , 1 , 30 , 20 , 48 , 14745600 , + 45, TIDL_FlattenLayer , ctx_output1/sep/relu_mbox_conf_perm 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 30 , 20 , 48 , 1 , 1 , 1 , 28800 , 1 , + 47, TIDL_ConvolutionLayer , ctx_output2/sep/relu_mbox_loc 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 47 , 1 , 512 , 10 , 24 , 1 , 24 , 10 , 24 , 2949120 , + 48, TIDL_FlattenLayer , ctx_output2/sep/relu_mbox_loc_perm 1, 1 , 1 , 47 , x , x , x , x , x , x , x , 48 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , 1 , + 49, TIDL_ConvolutionLayer , ctx_output2/sep/relu_mbox_conf 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 49 , 1 , 512 , 10 , 24 , 1 , 30 , 10 , 24 , 3686400 , + 50, TIDL_FlattenLayer , ctx_output2/sep/relu_mbox_conf_perm 1, 1 , 1 , 49 , x , x , x , x , x , x , x , 50 , 1 , 30 , 10 , 24 , 1 , 1 , 1 , 7200 , 1 , + 52, TIDL_ConvolutionLayer , ctx_output3/sep/relu_mbox_loc 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 52 , 1 , 512 , 5 , 12 , 1 , 24 , 5 , 12 , 737280 , + 53, TIDL_FlattenLayer , ctx_output3/sep/relu_mbox_loc_perm 1, 1 , 1 , 52 , x , 1 file(s) copied. + +Processing config file .\tempDir\qunat_stats_config.txt ! + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 320 , 768 , + 1, TIDL_BatchNormLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 320 , 768 , 1 , 3 , 320 , 768 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 320 , 768 , 1 , 32 , 160 , 384 , + 3, TIDL_ConvolutionLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 32 , 160 , 384 , 1 , 32 , 160 , 384 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 32 , 160 , 384 , 1 , 64 , 160 , 384 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 160 , 384 , 1 , 64 , 80 , 192 , + 6, TIDL_ConvolutionLayer , 1, 1 , 1 , 5 , x , x , x , x , x , x , x , 6 , 1 , 64 , 80 , 192 , 1 , 128 , 80 , 192 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 128 , 80 , 192 , 1 , 128 , 80 , 192 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 128 , 80 , 192 , 1 , 128 , 80 , 192 , + 9, TIDL_ConvolutionLayer , 1, 1 , 1 , 8 , x , x , x , x , x , x , x , 9 , 1 , 128 , 80 , 192 , 1 , 128 , 40 , 96 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 128 , 40 , 96 , 1 , 256 , 40 , 96 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 10 , x , x , x , x , x , x , x , 11 , 1 , 256 , 40 , 96 , 1 , 256 , 40 , 96 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 256 , 40 , 96 , 1 , 256 , 40 , 96 , + 13, TIDL_ConvolutionLayer , 1, 1 , 1 , 12 , x , x , x , x , x , x , x , 13 , 1 , 256 , 40 , 96 , 1 , 256 , 20 , 48 , + 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 256 , 20 , 48 , 1 , 512 , 20 , 48 , + 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 16, TIDL_ConvolutionLayer , 1, 1 , 1 , 15 , x , x , x , x , x , x , x , 16 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 17 , x , x , x , x , x , x , x , 18 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 20, TIDL_ConvolutionLayer , 1, 1 , 1 , 19 , x , x , x , x , x , x , x , 20 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 23, TIDL_ConvolutionLayer , 1, 1 , 1 , 22 , x , x , x , x , x , x , x , 23 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 24, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 25 , 1 , 512 , 20 , 48 , 1 , 512 , 10 , 24 , + 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 10 , 24 , 1 , 1024 , 10 , 24 , + 27, TIDL_ConvolutionLayer , 1, 1 , 1 , 26 , x , x , x , x , x , x , x , 27 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , + 28, TIDL_ConvolutionLayer , 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , + 29, TIDL_PoolingLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 1024 , 10 , 24 , 1 , 1024 , 5 , 12 , + 30, TIDL_PoolingLayer , 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 30 , 1 , 1024 , 5 , 12 , 1 , 1024 , 3 , 6 , + 31, TIDL_PoolingLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 1024 , 3 , 6 , 1 , 1024 , 2 , 3 , + 32, TIDL_ConvolutionLayer , 1, 1 , 1 , 24 , x , x , x , x , x , x , x , 32 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 512 , 20 , 48 , 1 , 512 , 20 , 48 , + 34, TIDL_ConvolutionLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 34 , 1 , 1024 , 10 , 24 , 1 , 1024 , 10 , 24 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 1024 , 10 , 24 , 1 , 512 , 10 , 24 , + 36, TIDL_ConvolutionLayer , 1, 1 , 1 , 29 , x , x , x , x , x , x , x , 36 , 1 , 1024 , 5 , 12 , 1 , 1024 , 5 , 12 , + 37, TIDL_ConvolutionLayer , 1, 1 , 1 , 36 , x , x , x , x , x , x , x , 37 , 1 , 1024 , 5 , 12 , 1 , 512 , 5 , 12 , + 38, TIDL_ConvolutionLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 38 , 1 , 1024 , 3 , 6 , 1 , 1024 , 3 , 6 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 1024 , 3 , 6 , 1 , 512 , 3 , 6 , + 40, TIDL_ConvolutionLayer , 1, 1 , 1 , 31 , x , x , x , x , x , x , x , 40 , 1 , 1024 , 2 , 3 , 1 , 1024 , 2 , 3 , + 41, TIDL_ConvolutionLayer , 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 1024 , 2 , 3 , 1 , 512 , 2 , 3 , + 42, TIDL_ConvolutionLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 42 , 1 , 512 , 20 , 48 , 1 , 24 , 20 , 48 , + 43, TIDL_FlattenLayer , 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 24 , 20 , 48 , 1 , 1 , 1 ,23040 , + 44, TIDL_ConvolutionLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 44 , 1 , 512 , 20 , 48 , 1 , 30 , 20 , 48 , + 45, TIDL_FlattenLayer , 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 30 , 20 , 48 , 1 , 1 , 1 ,28800 , + 46, TIDL_ConvolutionLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 47 , 1 , 512 , 10 , 24 , 1 , 24 , 10 , 24 , + 47, TIDL_FlattenLayer , 1, 1 , 1 , 47 , x , x , x , x , x , x , x , 48 , 1 , 24 , 10 , 24 , 1 , 1 , 1 , 5760 , + 48, TIDL_ConvolutionLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 49 , 1 , 512 , 10 , 24 , 1 , 30 , 10 , 24 , + 49, TIDL_FlattenLayer , 1, 1 , 1 , 49 , x , x , x , x , x , x , x , 50 , 1 , 30 , 10 , 24 , 1 , 1 , 1 , 7200 , + 50, TIDL_ConvolutionLayer , 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 52 , 1 , 512 , 5 , 12 , 1 , 24 , 5 , 12 , + 51, TIDL_FlattenLayer , 1, 1 , 1 , 52 , x , x , x , x , x , x , x , 53 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , + 52, TIDL_ConvolutionLayer , 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 54 , 1 , 512 , 5 , 12 , 1 , 30 , 5 , 12 , + 53, TIDL_FlattenLayer , 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 55 , 1 , 30 , 5 , 12 , 1 , 1 , 1 , 1800 , + 54, TIDL_ConvolutionLayer , 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 57 , 1 , 512 , 3 , 6 , 1 , 16 , 3 , 6 , + 55, TIDL_FlattenLayer , 1, 1 , 1 , 57 , x , x , x , x , x , x , x , 58 , 1 , 16 , 3 , 6 , 1 , 1 , 1 , 288 , + 56, TIDL_ConvolutionLayer , 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 59 , 1 , 512 , 3 , 6 , 1 , 20 , 3 , 6 , + 57, TIDL_FlattenLayer , 1, 1 , 1 , 59 , x , x , x , x , x , x , x , 60 , 1 , 20 , 3 , 6 , 1 , 1 , 1 , 360 , + 58, TIDL_ConvolutionLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 62 , 1 , 512 , 2 , 3 , 1 , 16 , 2 , 3 , + 59, TIDL_FlattenLayer , 1, 1 , 1 , 62 , x , x , x , x , x , x , x , 63 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , + 60, TIDL_ConvolutionLayer , 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 64 , 1 , 512 , 2 , 3 , 1 , 20 , 2 , 3 , + 61, TIDL_FlattenLayer , 1, 1 , 1 , 64 , x , x , x , x , x , x , x , 65 , 1 , 20 , 2 , 3 , 1 , 1 , 1 , 120 , + 62, TIDL_ConcatLayer , 1, 5 , 1 , 43 , 48 , 53 , 58 , 63 , x , x , x , 67 , 1 , 1 , 1 ,23040 , 1 , 1 , 1 ,30624 , + 63, TIDL_ConcatLayer , 1, 5 , 1 , 45 , 50 , 55 , 60 , 65 , x , x , x , 68 , 1 , 1 , 1 ,28800 , 1 , 1 , 1 ,38280 , + 64, TIDL_DetectionOutputLayer , 1, 2 , 1 , 67 , 68 , x , x , x , x , x , x , 70 , 1 , 1 , 1 ,30624 , 1 , 1 , 1 , 280 , + 65, TIDL_DataLayer , 0, 1 , -1 , 70 , x , x , x , x , x , x , x , 0 , 1 , 1 , 1 , 280 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 2 72 68 72 32 32 32 3 32 3 1 8 1 3 12 5 4896 1024 1 + 3 40 34 40 32 32 32 1 1 1 1 1 1 1 12 5 1360 1024 1 + 4 32 32 32 32 32 32 32 64 32 7 8 1 5 12 5 1024 1024 1 + 5 72 44 72 32 20 32 1 1 1 1 1 1 1 6 4 3168 640 1 + 6 32 20 32 32 20 32 64 128 64 8 8 1 8 6 4 640 640 1 + 7 40 22 40 32 20 32 1 1 1 1 1 1 1 6 4 880 640 1 + 8 32 20 32 32 20 32 128 128 128 8 8 1 16 6 4 640 640 1 + 9 72 44 72 32 20 32 1 1 1 1 1 1 1 3 2 3168 640 1 + 10 32 20 32 32 20 32 128 256 128 8 8 1 16 3 2 640 640 1 + 11 40 22 40 32 20 32 1 1 1 1 1 1 1 3 2 880 640 1 + 12 32 20 32 32 20 32 256 256 256 8 8 1 32 3 2 640 640 1 + 13 104 44 104 48 20 48 1 1 1 1 1 1 1 1 1 4576 960 1 + 14 48 4 48 48 4 48 256 512 256 32 8 1 8 1 5 192 192 1 + 15 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 16 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 17 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 18 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 19 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 20 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 21 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 22 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 23 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 24 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 25 72 24 72 32 10 32 1 1 1 1 1 1 1 1 1 1728 320 1 + 26 24 10 24 24 10 24 512 1024 512 32 32 1 16 1 1 240 240 1 + 27 26 12 26 24 10 24 1 1 1 1 1 1 1 1 1 312 240 1 + 28 24 10 24 24 10 24 1024 1024 1024 32 32 1 32 1 1 240 240 1 + 32 50 22 50 48 20 48 1 1 1 1 1 1 1 1 1 1100 960 1 + 33 48 4 48 48 4 48 512 512 512 32 16 1 16 1 5 192 192 1 + 34 26 12 26 24 10 24 1 1 1 1 1 1 1 1 1 312 240 1 + 35 24 10 24 24 10 24 1024 512 1024 32 32 1 32 1 1 240 240 1 + 36 14 7 14 12 5 12 1 1 1 1 1 1 1 1 1 98 60 1 + 37 12 5 12 12 5 12 1024 512 1024 32 32 1 32 1 1 60 60 1 + 38 8 5 8 6 3 6 1 1 1 1 1 1 1 1 1 40 18 1 + 39 6 3 6 6 3 6 1024 512 1024 32 32 1 32 1 1 18 18 1 + 40 5 4 5 3 2 3 1 1 1 1 1 1 1 1 1 20 6 1 + 41 3 2 3 3 2 3 1024 512 1024 32 32 1 32 1 1 6 6 1 + 42 48 4 48 48 4 48 512 32 512 32 16 1 16 1 5 192 192 1 + 44 48 4 48 48 4 48 512 32 512 32 16 1 16 1 5 192 192 1 + 46 24 10 24 24 10 24 512 24 512 32 24 1 16 1 1 240 240 1 + 48 24 10 24 24 10 24 512 30 512 32 30 1 16 1 1 240 240 1 + 50 12 5 12 12 5 12 512 24 512 32 24 1 16 1 1 60 60 1 + 52 12 5 12 12 5 12 512 30 512 32 30 1 16 1 1 60 60 1 + 54 6 3 6 6 3 6 512 16 512 32 16 1 16 1 1 18 18 1 + 56 6 3 6 6 3 6 512 20 512 32 20 1 16 1 1 18 18 1 + 58 3 2 3 3 2 3 512 16 512 32 16 1 16 1 1 6 6 1 + 60 3 2 3 3 2 3 512 20 512 32 20 1 16 1 1 6 6 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 254 , TIDL_BatchNormLayer , PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 2 : Out Q : 17307 , TIDL_ConvolutionLayer, PASSED #MMACs = 53.08, 66.11, Sparsity : -24.54 + Layer 3 : Out Q : 7617 , TIDL_ConvolutionLayer, PASSED #MMACs = 17.69, 17.69, Sparsity : 0.00 + Layer 4 : Out Q : 13498 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 141.56, Sparsity : -12.50 + Layer 5 : Out Q : 5489 , TIDL_ConvolutionLayer, PASSED #MMACs = 8.85, 8.85, Sparsity : 0.00 + Layer 6 : Out Q : 16704 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 125.83, Sparsity : 0.00 + Layer 7 : Out Q : 4949 , TIDL_ConvolutionLayer, PASSED #MMACs = 17.69, 17.69, Sparsity : 0.00 + Layer 8 : Out Q : 20619 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 9 : Out Q : 5545 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 10 : Out Q : 27018 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 125.81, Sparsity : 0.01 + Layer 11 : Out Q : 4561 , TIDL_ConvolutionLayer, PASSED #MMACs = 8.85, 8.85, Sparsity : 0.00 + Layer 12 : Out Q : 29035 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.63, Sparsity : 0.01 + Layer 13 : Out Q : 6761 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.21, 2.21, Sparsity : 0.00 + Layer 14 : Out Q : 45549 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 125.83, Sparsity : 0.00 + Layer 15 : Out Q : 7168 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 16 : Out Q : 42625 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 17 : Out Q : 6019 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 18 : Out Q : 67087 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 19 : Out Q : 9130 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 20 : Out Q : 58448 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 21 : Out Q : 8141 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 22 : Out Q : 55531 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 23 : Out Q : 8091 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 24 : Out Q : 56379 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 25 : Out Q : 11226 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.11, 1.11, Sparsity : 0.00 + Layer 26 : Out Q : 78879 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 125.83, Sparsity : 0.00 + Layer 27 : Out Q : 10630 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.21, 2.21, Sparsity : 0.00 + Layer 28 : Out Q : 52849 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 29 :TIDL_PoolingLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 30 :TIDL_PoolingLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 31 :TIDL_PoolingLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 32 : Out Q : 10181 , TIDL_ConvolutionLayer, PASSED #MMACs = 4.42, 4.42, Sparsity : 0.00 + Layer 33 : Out Q : 17244 , TIDL_ConvolutionLayer, PASSED #MMACs = 251.66, 251.66, Sparsity : 0.00 + Layer 34 : Out Q : 11786 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.21, 2.21, Sparsity : 0.00 + Layer 35 : Out Q : 16098 , TIDL_ConvolutionLayer, PASSED #MMACs = 125.83, 125.83, Sparsity : 0.00 + Layer 36 : Out Q : 28318 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.55, 0.55, Sparsity : 0.00 + Layer 37 : Out Q : 21740 , TIDL_ConvolutionLayer, PASSED #MMACs = 31.46, 31.46, Sparsity : 0.00 + Layer 38 : Out Q : 25990 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.17, 0.17, Sparsity : 0.00 + Layer 39 : Out Q : 24629 , TIDL_ConvolutionLayer, PASSED #MMACs = 9.44, 9.44, Sparsity : 0.00 + Layer 40 : Out Q : 26634 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 41 : Out Q : 34531 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.15, 3.15, Sparsity : 0.00 + Layer 42 : Out Q : 2535 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.73, 15.73, Sparsity : 0.00 + Layer 43 :TIDL_FlattenLayer, PASSED #MMACs = 0.02, 0.02, Sparsity : 0.00 + Layer 44 : Out Q : 4091 , TIDL_ConvolutionLayer, PASSED #MMACs = 15.73, 15.73, Sparsity : 0.00 + Layer 45 :TIDL_FlattenLayer, PASSED #MMACs = 0.03, 0.03, Sparsity : 0.00 + Layer 46 : Out Q : 9371 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.95, 2.95, Sparsity : 0.00 + Layer 47 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 48 : Out Q : 5418 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.69, 3.69, Sparsity : 0.00 + Layer 49 :TIDL_FlattenLayer, PASSED #MMACs = 0.01, 0.01, Sparsity : 0.00 + Layer 50 : Out Q : 8851 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.74, 0.74, Sparsity : 0.00 + Layer 51 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 52 : Out Q : 6013 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.92, 0.92, Sparsity : 0.00 + Layer 53 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 54 : Out Q : 7562 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.15, 0.15, Sparsity : 0.00 + Layer 55 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 56 : Out Q : 5387 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.18, 0.18, Sparsity : 0.00 + Layer 57 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 58 : Out Q : 6626 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.05, 0.05, Sparsity : 0.00 + Layer 59 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 60 : Out Q : 7298 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.06, 0.06, Sparsity : 0.00 + Layer 61 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 62 : Out Q : 2545 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 63 : Out Q : 4107 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 64 : #MMACs = 0.00, 0.00, Sparsity : 0.00 +End of config list found ! + x , x , x , x , x , x , 53 , 1 , 24 , 5 , 12 , 1 , 1 , 1 , 1440 , 1 , + 54, TIDL_ConvolutionLayer , ctx_output3/sep/relu_mbox_conf 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 54 , 1 , 512 , 5 , 12 , 1 , 30 , 5 , 12 , 921600 , + 55, TIDL_FlattenLayer , ctx_output3/sep/relu_mbox_conf_perm 1, 1 , 1 , 54 , x , x , x , x , x , x , x , 55 , 1 , 30 , 5 , 12 , 1 , 1 , 1 , 1800 , 1 , + 57, TIDL_ConvolutionLayer , ctx_output4/sep/relu_mbox_loc 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 57 , 1 , 512 , 3 , 6 , 1 , 16 , 3 , 6 , 147456 , + 58, TIDL_FlattenLayer , ctx_output4/sep/relu_mbox_loc_perm 1, 1 , 1 , 57 , x , x , x , x , x , x , x , 58 , 1 , 16 , 3 , 6 , 1 , 1 , 1 , 288 , 1 , + 59, TIDL_ConvolutionLayer , ctx_output4/sep/relu_mbox_conf 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 59 , 1 , 512 , 3 , 6 , 1 , 20 , 3 , 6 , 184320 , + 60, TIDL_FlattenLayer , ctx_output4/sep/relu_mbox_conf_perm 1, 1 , 1 , 59 , x , x , x , x , x , x , x , 60 , 1 , 20 , 3 , 6 , 1 , 1 , 1 , 360 , 1 , + 62, TIDL_ConvolutionLayer , ctx_output5/sep/relu_mbox_loc 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 62 , 1 , 512 , 2 , 3 , 1 , 16 , 2 , 3 , 49152 , + 63, TIDL_FlattenLayer , ctx_output5/sep/relu_mbox_loc_perm 1, 1 , 1 , 62 , x , x , x , x , x , x , x , 63 , 1 , 16 , 2 , 3 , 1 , 1 , 1 , 96 , 1 , + 64, TIDL_ConvolutionLayer , ctx_output5/sep/relu_mbox_conf 1, 1 , 1 , 41 , x , x , x , x , x , x , x , 64 , 1 , 512 , 2 , 3 , 1 , 20 , 2 , 3 , 61440 , + 65, TIDL_FlattenLayer , ctx_output5/sep/relu_mbox_conf_perm 1, 1 , 1 , 64 , x , x , x , x , x , x , x , 65 , 1 , 20 , 2 , 3 , 1 , 1 , 1 , 120 , 1 , + 67, TIDL_ConcatLayer , mbox_loc 1, 5 , 1 , 43 , 48 , 53 , 58 , 63 , x , x , x , 67 , 1 , 1 , 1 , 23040 , 1 , 1 , 1 , 30624 , 1 , + 68, TIDL_ConcatLayer , mbox_conf 1, 5 , 1 , 45 , 50 , 55 , 60 , 65 , x , x , x , 68 , 1 , 1 , 1 , 28800 , 1 , 1 , 1 , 38280 , 1 , + 70, TIDL_DetectionOutputLayer , detection_out 2, 2 , 1 , 67 , 68 , x , x , x , x , x , x , 70 , 1 , 1 , 1 , 30624 , 1 , 1 , 1 , 280 , 1 , +Total Giga Macs : 3.2459 + +Hi, Sorry for late reply. From import log I see that GMAC for this model is "Total Giga Macs : 3.2459", can you compare it with jacintoNets GMAC and I think jacintoNets could be less than the "mobiledetnet" GMAC, so this could be reason as more GMAC gives less fps. Kindly compare GMAC requirement of both the models will give an idea on fps. Thanks, Praveen + diff --git a/data2/text/range/30001+/969809.txt b/data2/text/range/30001+/969809.txt new file mode 100644 index 0000000000000000000000000000000000000000..024a232d1d2aa20ecc76af646ba3c35d98610870 --- /dev/null +++ b/data2/text/range/30001+/969809.txt @@ -0,0 +1,219 @@ +Ticket Name: TDA2E: tda2x + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 I am confused of the sparse model and dense model, I trained an sparse model and import it by TIDL, BUT NOT SPEED UP. 1. import config: # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 50 numParamBits = 8 inElementType = 0 inputNetFile = ".\sparse.prototxt" inputParamsFile = ".\sparse.caffemodel" outputNetFile = ".\sparse_net.bin" outputParamsFile = ".\sparse_param.bin" rawSampleInData = 1 preProcType = 0 numSampleInData = 50 sampleInData = "./500image_for_tidl.y" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" inWidth = 416 inHeight = 416 inNumChannels = 3 2. The input shape of my model is 3*416*416 with resnet-18 backbone, several convolution's input shape(feature map) with H*W<32*32, should I use the layer group to assign them execute on DSP ? + +Responses: +Hi Jiandong Gao, No, you can execute them EVE core but you should set "conv2dKernelType = 1" in the import config for those layers. Please refer to FAQ 21 and 22 in the TIDL user guide for more details. Thanks, Praveen Jiandong Gao + +Hi Praveen: Thanks for your reply, I will try it and feedback results. Thanks, Jiandong Gao + +Hi Praveen, This is my import log in TIDL, quantize_log.txt PS E:\hhq\quantize\importTool> .\tidl_model_import.out.exe .\tidl_import_caffemodel.txt + +=============================== TIDL import - parsing =============================== + +Caffe Network File : .\tf_caffe\10271549_sparse.prototxt +Caffe Model File : .\tf_caffe\10271549_sparse.caffemodel +TIDL Network File : .\10271549_sparse_net.bin +TIDL Model File : .\10271549_sparse_param.bin +Name of the Network : TIDL_deploy +Num Inputs : 1 + + Num of Layer Detected : 47 + 0, TIDL_DataLayer , input_image 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , 0 , + 1, TIDL_ConvolutionLayer , preprocess 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , 519168 , + 2, TIDL_ConvolutionLayer , model/conv0/Conv2D 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , 407027712 , + 3, TIDL_PoolingLayer , model/pool0/MaxPool/MaxPool 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , 6230016 , + 4, TIDL_ConvolutionLayer , model/group0/block0/conv1/Conv2D 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 5, TIDL_ConvolutionLayer , model/group0/block0/conv2/Conv2D 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 6, TIDL_EltWiseLayer , model/group0/block0/add 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , + 7, TIDL_ConvolutionLayer , model/group0/block1/conv1/Conv2D 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 8, TIDL_ConvolutionLayer , model/group0/block1/conv2/Conv2D 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 9, TIDL_EltWiseLayer , model/group0/block1/add 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , + 10, TIDL_ConvolutionLayer , model/group1/block0/convshortcut/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 22151168 , + 11, TIDL_ConvolutionLayer , model/group1/block0/conv1/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 199360512 , + 12, TIDL_ConvolutionLayer , model/group1/block0/conv2/Conv2D 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 13, TIDL_EltWiseLayer , model/group1/block0/add 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , + 14, TIDL_ConvolutionLayer , model/group1/block1/conv1/Conv2D 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 15, TIDL_ConvolutionLayer , model/group1/block1/conv2/Conv2D 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 16, TIDL_EltWiseLayer , model/group1/block1/add 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , + 17, TIDL_ConvolutionLayer , model/group2/block0/convshortcut/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 22151168 , + 18, TIDL_ConvolutionLayer , model/group2/block0/conv1/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 199360512 , + 19, TIDL_ConvolutionLayer , model/group2/block0/conv2/Conv2D 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 20, TIDL_EltWiseLayer , model/group2/block0/add 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , + 21, TIDL_ConvolutionLayer , model/group2/block1/conv1/Conv2D 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 22, TIDL_ConvolutionLayer , model/group2/block1/conv2/Conv2D 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 23, TIDL_EltWiseLayer , model/group2/block1/add 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , + 24, TIDL_ConvolutionLayer , model/group3/block0/convshortcut/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 22151168 , + 25, TIDL_ConvolutionLayer , model/group3/block0/conv1/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 199360512 , + 26, TIDL_ConvolutionLayer , model/group3/block0/conv2/Conv2D 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 27, TIDL_EltWiseLayer , model/group3/block0/add 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , + 28, TIDL_ConvolutionLayer , model/group3/block1/conv1/Conv2D 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 29, TIDL_ConvolutionLayer , model/group3/block1/conv2/Conv2D 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 30, TIDL_EltWiseLayer , model/group3/block1/add 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , + 31, TIDL_Deconv2DLayer , model/P5/upsample/ResizeNearestNeighbor 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , 346112 , + 32, TIDL_ConcatLayer , model/concat 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , 1 , + 33, TIDL_ConvolutionLayer , model/fpn/unet/0/Conv2D 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , 132907008 , + 34, TIDL_ConvolutionLayer , model/fpn/unet/1/Conv2D 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , 199360512 , + 35, TIDL_ConvolutionLayer , model/fpn/unet/2/Conv2D 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , 199360512 , + 36, TIDL_Deconv2DLayer , model/P4/upsample/ResizeNearestNeighbor 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , 692224 , + 37, TIDL_ConcatLayer , model/concat_1 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , 1 , + 38, TIDL_ConvolutionLayer , model/fpn/unet/3/Conv2D 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , 132907008 , + 39, TIDL_ConvolutionLayer , model/fpn/unet/4/Conv2D 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , 199360512 , + 40, TIDL_ConvolutionLayer , model/fpn/unet/5/Conv2D 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , 199360512 , + 41, TIDL_Deconv2DLayer , model/P3/upsample/ResizeNearestNeighbor 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , 1384448 , + 42, TIDL_ConcatLayer , model/concat_2 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , 1 , + 43, TIDL_ConvolutionLayer , model/fpn/unet/6/Conv2D 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , 132907008 , + 44, TIDL_ConvolutionLayer , model/fpn/unet/7/Conv2D 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , 199360512 , + 45, TIDL_ConvolutionLayer , model/fpn/unet/8/Conv2D 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , 199360512 , + 46, TIDL_ConvolutionLayer , model/mask/Conv2D 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , 1384448 , +Total Giga Macs : 7.8630 + +=============================== TIDL import - calibration =============================== + +已复制 1 个文件。 + +Processing config file .\tempDir\qunat_stats_config.txt ! + +Running TIDL simulation for calibration. + + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , + 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , + 3, TIDL_PoolingLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 6, TIDL_EltWiseLayer , 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 9, TIDL_EltWiseLayer , 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 13, TIDL_EltWiseLayer , 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 16, TIDL_EltWiseLayer , 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 20, TIDL_EltWiseLayer , 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 23, TIDL_EltWiseLayer , 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 24, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , + 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 27, TIDL_EltWiseLayer , 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 28, TIDL_ConvolutionLayer , 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 30, TIDL_EltWiseLayer , 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 31, TIDL_Deconv2DLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , + 32, TIDL_ConcatLayer , 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , + 34, TIDL_ConvolutionLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , + 36, TIDL_Deconv2DLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , + 37, TIDL_ConcatLayer , 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , + 38, TIDL_ConvolutionLayer , 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , + 40, TIDL_ConvolutionLayer , 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , + 41, TIDL_Deconv2DLayer , 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , + 42, TIDL_ConcatLayer , 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , + 43, TIDL_ConvolutionLayer , 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , + 44, TIDL_ConvolutionLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , + 45, TIDL_ConvolutionLayer , 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , + 46, TIDL_ConvolutionLayer , 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , + 47, TIDL_DataLayer , 0, 1 , -1 , 46 , x , x , x , x , x , x , x , 0 , 1 , 2 , 104 , 104 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 1 32 32 32 32 32 32 1 1 1 1 1 1 1 13 13 1024 1024 1 + 2 80 64 80 32 26 32 3 64 3 1 8 1 3 7 8 5120 832 1 + 4 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 5 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 7 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 8 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 10 64 52 64 32 26 32 64 128 64 2 8 1 32 2 2 3328 832 1 + 11 72 56 72 32 26 32 64 128 64 2 8 1 32 2 2 4032 832 1 + 12 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 14 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 15 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 17 64 32 64 32 16 32 128 256 128 3 8 1 43 1 2 2048 512 1 + 18 72 20 72 32 8 32 128 256 128 5 8 1 26 1 4 1440 256 1 + 19 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 21 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 22 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 24 32 26 32 16 13 16 256 512 256 8 8 1 32 1 1 832 208 1 + 25 40 30 40 16 13 16 256 512 256 6 8 1 43 1 1 1200 208 1 + 26 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 28 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 29 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 33 32 8 32 32 8 32 768 256 768 8 8 1 96 1 4 256 256 1 + 34 40 28 40 32 26 32 256 128 256 8 8 1 32 1 1 1120 832 1 + 35 40 28 40 32 26 32 128 256 128 8 8 1 16 1 1 1120 832 1 + 38 32 26 32 32 26 32 384 128 384 8 8 1 48 2 2 832 832 1 + 39 40 28 40 32 26 32 128 64 128 8 8 1 16 2 2 1120 832 1 + 40 40 28 40 32 26 32 64 128 64 8 8 1 8 2 2 1120 832 1 + 43 32 26 32 32 26 32 192 64 192 8 8 1 24 4 4 832 832 1 + 44 40 28 40 32 26 32 64 32 64 8 8 1 8 4 4 1120 832 1 + 45 40 28 40 32 26 32 32 64 32 8 8 1 4 4 4 1120 832 1 + 46 32 26 32 32 26 32 64 2 64 8 2 1 8 4 4 832 832 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 12233 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.52, 0.52, Sparsity : 0.00 + Layer 2 : Out Q : 2105 , TIDL_ConvolutionLayer, PASSED #MMACs = 407.03, 130.48, Sparsity : 67.94 + Layer 3 :TIDL_PoolingLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 4 : Out Q : 3287 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.90, Sparsity : 68.67 + Layer 5 : Out Q : 1165 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.21, Sparsity : 68.60 + Layer 6 : Out Q : 2412 , TIDL_EltWiseLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 7 : Out Q : 3261 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.60, Sparsity : 68.75 + Layer 8 : Out Q : 1065 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.42, Sparsity : 68.54 + Layer 9 : Out Q : 2057 , TIDL_EltWiseLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 10 : Out Q : 1613 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 21.70, Sparsity : 2.05 + Layer 11 : Out Q : 4996 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 75.11, Sparsity : 62.33 + Layer 12 : Out Q : 1557 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.81, Sparsity : 68.45 + Layer 13 : Out Q : 3444 , TIDL_EltWiseLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 14 : Out Q : 3646 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.36, Sparsity : 68.56 + Layer 15 : Out Q : 665 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.45, Sparsity : 68.79 + Layer 16 : Out Q : 2331 , TIDL_EltWiseLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 17 : Out Q : 2783 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 17.21, Sparsity : 22.30 + Layer 18 : Out Q : 3917 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 64.82, Sparsity : 67.49 + Layer 19 : Out Q : 1262 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 120.51, Sparsity : 69.78 + Layer 20 : Out Q : 2458 , TIDL_EltWiseLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 21 : Out Q : 4658 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 101.18, Sparsity : 74.62 + Layer 22 : Out Q : 1399 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 91.07, Sparsity : 77.16 + Layer 23 : Out Q : 2639 , TIDL_EltWiseLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 24 : Out Q : 2031 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 6.49, Sparsity : 70.69 + Layer 25 : Out Q : 7882 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 30.46, Sparsity : 84.72 + Layer 26 : Out Q : 1316 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 33.04, Sparsity : 91.71 + Layer 27 : Out Q : 2266 , TIDL_EltWiseLayer, PASSED #MMACs = 0.17, 0.17, Sparsity : 0.00 + Layer 28 : Out Q : 10261 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 28.00, Sparsity : 92.98 + Layer 29 : Out Q : 1381 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 39.61, Sparsity : 90.07 + Layer 30 : Out Q : 2877 , TIDL_EltWiseLayer, PASSED #MMACs = 0.17, 0.17, Sparsity : 0.00 + Layer 31 : Out Q : 1436 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 32 : Out Q : 1324 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 33 : Out Q : 6959 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 33.51, Sparsity : 74.78 + Layer 34 : Out Q : 7919 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 23.97, Sparsity : 87.97 + Layer 35 : Out Q : 3927 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 20.93, Sparsity : 89.50 + Layer 36 : Out Q : 1960 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 37 : Out Q : 1170 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 38 : Out Q : 9640 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 65.79, Sparsity : 50.50 + Layer 39 : Out Q : 7683 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 60.25, Sparsity : 69.78 + Layer 40 : Out Q : 2899 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 41.51, Sparsity : 79.18 + Layer 41 : Out Q : 1447 , TIDL_Deconv2DLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 42 : Out Q : 1032 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 43 : Out Q : 8533 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 63.12, Sparsity : 52.51 + Layer 44 : Out Q : 4481 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 62.00, Sparsity : 68.90 + Layer 45 : Out Q : 2050 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 59.79, Sparsity : 70.01 + Layer 46 : Out Q : 1613 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.38, 1.08, Sparsity : 21.88 =============================== TIDL import - parsing =============================== Caffe Network File : .\tf_caffe\10271549_sparse.prototxt Caffe Model File : .\tf_caffe\10271549_sparse.caffemodel TIDL Network File : .\10271549_sparse_net.bin TIDL Model File : .\10271549_sparse_param.bin Name of the Network : TIDL_deploy Num Inputs : 1 Num of Layer Detected : 47 0, TIDL_DataLayer , input_image 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , 0 , 1, TIDL_ConvolutionLayer , preprocess 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , 519168 , 2, TIDL_ConvolutionLayer , model/conv0/Conv2D 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , 407027712 , 3, TIDL_PoolingLayer , model/pool0/MaxPool/MaxPool 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , 6230016 , 4, TIDL_ConvolutionLayer , model/group0/block0/conv1/Conv2D 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 5, TIDL_ConvolutionLayer , model/group0/block0/conv2/Conv2D 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 6, TIDL_EltWiseLayer , model/group0/block0/add 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , 7, TIDL_ConvolutionLayer , model/group0/block1/conv1/Conv2D 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 8, TIDL_ConvolutionLayer , model/group0/block1/conv2/Conv2D 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 9, TIDL_EltWiseLayer , model/group0/block1/add 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , 10, TIDL_ConvolutionLayer , model/group1/block0/convshortcut/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 22151168 , 11, TIDL_ConvolutionLayer , model/group1/block0/conv1/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 199360512 , 12, TIDL_ConvolutionLayer , model/group1/block0/conv2/Conv2D 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 13, TIDL_EltWiseLayer , model/group1/block0/add 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , 14, TIDL_ConvolutionLayer , model/group1/block1/conv1/Conv2D 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 15, TIDL_ConvolutionLayer , model/group1/block1/conv2/Conv2D 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 16, TIDL_EltWiseLayer , model/group1/block1/add 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , 17, TIDL_ConvolutionLayer , model/group2/block0/convshortcut/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 22151168 , 18, TIDL_ConvolutionLayer , model/group2/block0/conv1/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 199360512 , 19, TIDL_ConvolutionLayer , model/group2/block0/conv2/Conv2D 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 20, TIDL_EltWiseLayer , model/group2/block0/add 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , 21, TIDL_ConvolutionLayer , model/group2/block1/conv1/Conv2D 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 22, TIDL_ConvolutionLayer , model/group2/block1/conv2/Conv2D 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 23, TIDL_EltWiseLayer , model/group2/block1/add 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , 24, TIDL_ConvolutionLayer , model/group3/block0/convshortcut/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 22151168 , 25, TIDL_ConvolutionLayer , model/group3/block0/conv1/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 199360512 , 26, TIDL_ConvolutionLayer , model/group3/block0/conv2/Conv2D 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 27, TIDL_EltWiseLayer , model/group3/block0/add 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , 28, TIDL_ConvolutionLayer , model/group3/block1/conv1/Conv2D 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 29, TIDL_ConvolutionLayer , model/group3/block1/conv2/Conv2D 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 30, TIDL_EltWiseLayer , model/group3/block1/add 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , 31, TIDL_Deconv2DLayer , model/P5/upsample/ResizeNearestNeighbor 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , 346112 , 32, TIDL_ConcatLayer , model/concat 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , 1 , 33, TIDL_ConvolutionLayer , model/fpn/unet/0/Conv2D 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , 132907008 , 34, TIDL_ConvolutionLayer , model/fpn/unet/1/Conv2D 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , 199360512 , 35, TIDL_ConvolutionLayer , model/fpn/unet/2/Conv2D 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , 199360512 , 36, TIDL_Deconv2DLayer , model/P4/upsample/ResizeNearestNeighbor 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , 692224 , 37, TIDL_ConcatLayer , model/concat_1 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , 1 , 38, TIDL_ConvolutionLayer , model/fpn/unet/3/Conv2D 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , 132907008 , 39, TIDL_ConvolutionLayer , model/fpn/unet/4/Conv2D 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , 199360512 , 40, TIDL_ConvolutionLayer , model/fpn/unet/5/Conv2D 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , 199360512 , 41, TIDL_Deconv2DLayer , model/P3/upsample/ResizeNearestNeighbor 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , 1384448 , 42, TIDL_ConcatLayer , model/concat_2 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , 1 , 43, TIDL_ConvolutionLayer , model/fpn/unet/6/Conv2D 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , 132907008 , 44, TIDL_ConvolutionLayer , model/fpn/unet/7/Conv2D 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , 199360512 , 45, TIDL_ConvolutionLayer , model/fpn/unet/8/Conv2D 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , 199360512 , 46, TIDL_ConvolutionLayer , model/mask/Conv2D 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , 1384448 , Total Giga Macs : 7.8630 I set conv2dKernelType in my config: conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 But there are many EltwiseLayer , ConcatLayer and DeconvolutionLayer, How did these layers set in conv2dKernelType? And How should I set the maxpooling layer in conv2dKernelType and layerGroupId? Could the maxpooling run fast on EVE? I run the model on TDA2 but the model set conv2dkernelType run 934ms per image, But the model did not set conv2dKernelType run 715ms. Did the conv2dKernelType set with something WRONG? Thanks, Jiandong Gao + +Did you check FAQ 21 and 22 in the TIDL user guide ? Thanks, Praveen + +Hi Praveen, I checked the FAQ21 in the TIDL user guide, the version is November 2019. I saw that Use dense convolution for Convolution layers with width x height < 64x64, as dense convolution is optimal for small resolutions and this value is ignored for non-conv layers. But when I set the conv2dKernelType , I set the Convolution layers with width x height < 32x32 to 1, but get worse results, Should I change all Convolution layers with width x height < 64x64 to 1 instead of 0? Best regards, Jiandong Gao + +Hi, Yes, set for all Convolution layers with width x height < 64x64 to 1. For non-conv layers this parameter will be ignored. Thanks, Praveen + +Hi Praveen, Where could I find the SSD demo caffemodel and prototxt, I checked the caffe-jacinto-models every branches and didn't find the properly caffemodel and prototxt for TIDL input. IN User guide and your reply, For non-conv layers this parameter will be ignored. Does it mean it don't work whether I set it to 0 or 1, it is only for placeholder? Thanks for your reply. Best Regards, Jiandong Gao + +Hi, Refer to below link for SSD demo model and prototxt, e2e.ti.com/.../689617 Yes, it is only place holder, you can either set to 0 or 1 for non-conv layers and this will not used. Thanks, Praveen + diff --git a/data2/text/range/30001+/970834.txt b/data2/text/range/30001+/970834.txt new file mode 100644 index 0000000000000000000000000000000000000000..6773d1cf367ecb1e3ba1f4debcd06e089bc61efe --- /dev/null +++ b/data2/text/range/30001+/970834.txt @@ -0,0 +1,205 @@ +Ticket Name: TDA2E: tda2x + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 This is my import log in TIDL, 4744.quantize_log.txt PS E:\hhq\quantize\importTool> .\tidl_model_import.out.exe .\tidl_import_caffemodel.txt + +=============================== TIDL import - parsing =============================== + +Caffe Network File : .\tf_caffe\10271549_sparse.prototxt +Caffe Model File : .\tf_caffe\10271549_sparse.caffemodel +TIDL Network File : .\10271549_sparse_net.bin +TIDL Model File : .\10271549_sparse_param.bin +Name of the Network : TIDL_deploy +Num Inputs : 1 + + Num of Layer Detected : 47 + 0, TIDL_DataLayer , input_image 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , 0 , + 1, TIDL_ConvolutionLayer , preprocess 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , 519168 , + 2, TIDL_ConvolutionLayer , model/conv0/Conv2D 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , 407027712 , + 3, TIDL_PoolingLayer , model/pool0/MaxPool/MaxPool 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , 6230016 , + 4, TIDL_ConvolutionLayer , model/group0/block0/conv1/Conv2D 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 5, TIDL_ConvolutionLayer , model/group0/block0/conv2/Conv2D 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 6, TIDL_EltWiseLayer , model/group0/block0/add 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , + 7, TIDL_ConvolutionLayer , model/group0/block1/conv1/Conv2D 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 8, TIDL_ConvolutionLayer , model/group0/block1/conv2/Conv2D 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , + 9, TIDL_EltWiseLayer , model/group0/block1/add 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , + 10, TIDL_ConvolutionLayer , model/group1/block0/convshortcut/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 22151168 , + 11, TIDL_ConvolutionLayer , model/group1/block0/conv1/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 199360512 , + 12, TIDL_ConvolutionLayer , model/group1/block0/conv2/Conv2D 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 13, TIDL_EltWiseLayer , model/group1/block0/add 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , + 14, TIDL_ConvolutionLayer , model/group1/block1/conv1/Conv2D 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 15, TIDL_ConvolutionLayer , model/group1/block1/conv2/Conv2D 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , + 16, TIDL_EltWiseLayer , model/group1/block1/add 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , + 17, TIDL_ConvolutionLayer , model/group2/block0/convshortcut/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 22151168 , + 18, TIDL_ConvolutionLayer , model/group2/block0/conv1/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 199360512 , + 19, TIDL_ConvolutionLayer , model/group2/block0/conv2/Conv2D 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 20, TIDL_EltWiseLayer , model/group2/block0/add 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , + 21, TIDL_ConvolutionLayer , model/group2/block1/conv1/Conv2D 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 22, TIDL_ConvolutionLayer , model/group2/block1/conv2/Conv2D 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , + 23, TIDL_EltWiseLayer , model/group2/block1/add 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , + 24, TIDL_ConvolutionLayer , model/group3/block0/convshortcut/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 22151168 , + 25, TIDL_ConvolutionLayer , model/group3/block0/conv1/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 199360512 , + 26, TIDL_ConvolutionLayer , model/group3/block0/conv2/Conv2D 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 27, TIDL_EltWiseLayer , model/group3/block0/add 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , + 28, TIDL_ConvolutionLayer , model/group3/block1/conv1/Conv2D 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 29, TIDL_ConvolutionLayer , model/group3/block1/conv2/Conv2D 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , + 30, TIDL_EltWiseLayer , model/group3/block1/add 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , + 31, TIDL_Deconv2DLayer , model/P5/upsample/ResizeNearestNeighbor 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , 346112 , + 32, TIDL_ConcatLayer , model/concat 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , 1 , + 33, TIDL_ConvolutionLayer , model/fpn/unet/0/Conv2D 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , 132907008 , + 34, TIDL_ConvolutionLayer , model/fpn/unet/1/Conv2D 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , 199360512 , + 35, TIDL_ConvolutionLayer , model/fpn/unet/2/Conv2D 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , 199360512 , + 36, TIDL_Deconv2DLayer , model/P4/upsample/ResizeNearestNeighbor 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , 692224 , + 37, TIDL_ConcatLayer , model/concat_1 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , 1 , + 38, TIDL_ConvolutionLayer , model/fpn/unet/3/Conv2D 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , 132907008 , + 39, TIDL_ConvolutionLayer , model/fpn/unet/4/Conv2D 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , 199360512 , + 40, TIDL_ConvolutionLayer , model/fpn/unet/5/Conv2D 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , 199360512 , + 41, TIDL_Deconv2DLayer , model/P3/upsample/ResizeNearestNeighbor 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , 1384448 , + 42, TIDL_ConcatLayer , model/concat_2 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , 1 , + 43, TIDL_ConvolutionLayer , model/fpn/unet/6/Conv2D 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , 132907008 , + 44, TIDL_ConvolutionLayer , model/fpn/unet/7/Conv2D 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , 199360512 , + 45, TIDL_ConvolutionLayer , model/fpn/unet/8/Conv2D 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , 199360512 , + 46, TIDL_ConvolutionLayer , model/mask/Conv2D 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , 1384448 , +Total Giga Macs : 7.8630 + +=============================== TIDL import - calibration =============================== + +已复制 1 个文件。 + +Processing config file .\tempDir\qunat_stats_config.txt ! + +Running TIDL simulation for calibration. + + 0, TIDL_DataLayer , 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , + 1, TIDL_ConvolutionLayer , 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , + 2, TIDL_ConvolutionLayer , 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , + 3, TIDL_PoolingLayer , 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , + 4, TIDL_ConvolutionLayer , 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 5, TIDL_ConvolutionLayer , 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 6, TIDL_EltWiseLayer , 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 7, TIDL_ConvolutionLayer , 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 8, TIDL_ConvolutionLayer , 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 9, TIDL_EltWiseLayer , 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , + 10, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , + 11, TIDL_ConvolutionLayer , 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , + 12, TIDL_ConvolutionLayer , 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 13, TIDL_EltWiseLayer , 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 14, TIDL_ConvolutionLayer , 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 15, TIDL_ConvolutionLayer , 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 16, TIDL_EltWiseLayer , 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , + 17, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , + 18, TIDL_ConvolutionLayer , 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , + 19, TIDL_ConvolutionLayer , 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 20, TIDL_EltWiseLayer , 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 21, TIDL_ConvolutionLayer , 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 22, TIDL_ConvolutionLayer , 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 23, TIDL_EltWiseLayer , 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , + 24, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , + 25, TIDL_ConvolutionLayer , 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , + 26, TIDL_ConvolutionLayer , 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 27, TIDL_EltWiseLayer , 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 28, TIDL_ConvolutionLayer , 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 29, TIDL_ConvolutionLayer , 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 30, TIDL_EltWiseLayer , 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , + 31, TIDL_Deconv2DLayer , 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , + 32, TIDL_ConcatLayer , 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , + 33, TIDL_ConvolutionLayer , 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , + 34, TIDL_ConvolutionLayer , 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , + 35, TIDL_ConvolutionLayer , 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , + 36, TIDL_Deconv2DLayer , 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , + 37, TIDL_ConcatLayer , 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , + 38, TIDL_ConvolutionLayer , 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , + 39, TIDL_ConvolutionLayer , 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , + 40, TIDL_ConvolutionLayer , 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , + 41, TIDL_Deconv2DLayer , 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , + 42, TIDL_ConcatLayer , 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , + 43, TIDL_ConvolutionLayer , 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , + 44, TIDL_ConvolutionLayer , 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , + 45, TIDL_ConvolutionLayer , 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , + 46, TIDL_ConvolutionLayer , 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , + 47, TIDL_DataLayer , 0, 1 , -1 , 46 , x , x , x , x , x , x , x , 0 , 1 , 2 , 104 , 104 , 0 , 0 , 0 , 0 , +Layer ID ,inBlkWidth ,inBlkHeight ,inBlkPitch ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs ,numOutChs ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot + 1 32 32 32 32 32 32 1 1 1 1 1 1 1 13 13 1024 1024 1 + 2 80 64 80 32 26 32 3 64 3 1 8 1 3 7 8 5120 832 1 + 4 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 5 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 7 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 8 40 28 40 32 26 32 64 64 64 8 8 1 8 4 4 1120 832 1 + 10 64 52 64 32 26 32 64 128 64 2 8 1 32 2 2 3328 832 1 + 11 72 56 72 32 26 32 64 128 64 2 8 1 32 2 2 4032 832 1 + 12 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 14 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 15 40 28 40 32 26 32 128 128 128 8 8 1 16 2 2 1120 832 1 + 17 64 32 64 32 16 32 128 256 128 3 8 1 43 1 2 2048 512 1 + 18 72 20 72 32 8 32 128 256 128 5 8 1 26 1 4 1440 256 1 + 19 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 21 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 22 40 28 40 32 26 32 256 256 256 8 8 1 32 1 1 1120 832 1 + 24 32 26 32 16 13 16 256 512 256 8 8 1 32 1 1 832 208 1 + 25 40 30 40 16 13 16 256 512 256 6 8 1 43 1 1 1200 208 1 + 26 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 28 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 29 24 15 24 16 13 16 512 512 512 8 8 1 64 1 1 360 208 1 + 33 32 8 32 32 8 32 768 256 768 8 8 1 96 1 4 256 256 1 + 34 40 28 40 32 26 32 256 128 256 8 8 1 32 1 1 1120 832 1 + 35 40 28 40 32 26 32 128 256 128 8 8 1 16 1 1 1120 832 1 + 38 32 26 32 32 26 32 384 128 384 8 8 1 48 2 2 832 832 1 + 39 40 28 40 32 26 32 128 64 128 8 8 1 16 2 2 1120 832 1 + 40 40 28 40 32 26 32 64 128 64 8 8 1 8 2 2 1120 832 1 + 43 32 26 32 32 26 32 192 64 192 8 8 1 24 4 4 832 832 1 + 44 40 28 40 32 26 32 64 32 64 8 8 1 8 4 4 1120 832 1 + 45 40 28 40 32 26 32 32 64 32 8 8 1 4 4 4 1120 832 1 + 46 32 26 32 32 26 32 64 2 64 8 2 1 8 4 4 832 832 1 + +Processing Frame Number : 0 + + Layer 1 : Out Q : 12233 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.52, 0.52, Sparsity : 0.00 + Layer 2 : Out Q : 2105 , TIDL_ConvolutionLayer, PASSED #MMACs = 407.03, 130.48, Sparsity : 67.94 + Layer 3 :TIDL_PoolingLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 4 : Out Q : 3287 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.90, Sparsity : 68.67 + Layer 5 : Out Q : 1165 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.21, Sparsity : 68.60 + Layer 6 : Out Q : 2412 , TIDL_EltWiseLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 7 : Out Q : 3261 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.60, Sparsity : 68.75 + Layer 8 : Out Q : 1065 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.42, Sparsity : 68.54 + Layer 9 : Out Q : 2057 , TIDL_EltWiseLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 10 : Out Q : 1613 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 21.70, Sparsity : 2.05 + Layer 11 : Out Q : 4996 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 75.11, Sparsity : 62.33 + Layer 12 : Out Q : 1557 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.81, Sparsity : 68.45 + Layer 13 : Out Q : 3444 , TIDL_EltWiseLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 14 : Out Q : 3646 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 125.36, Sparsity : 68.56 + Layer 15 : Out Q : 665 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 124.45, Sparsity : 68.79 + Layer 16 : Out Q : 2331 , TIDL_EltWiseLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 17 : Out Q : 2783 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 17.21, Sparsity : 22.30 + Layer 18 : Out Q : 3917 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 64.82, Sparsity : 67.49 + Layer 19 : Out Q : 1262 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 120.51, Sparsity : 69.78 + Layer 20 : Out Q : 2458 , TIDL_EltWiseLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 21 : Out Q : 4658 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 101.18, Sparsity : 74.62 + Layer 22 : Out Q : 1399 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 91.07, Sparsity : 77.16 + Layer 23 : Out Q : 2639 , TIDL_EltWiseLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 24 : Out Q : 2031 , TIDL_ConvolutionLayer, PASSED #MMACs = 22.15, 6.49, Sparsity : 70.69 + Layer 25 : Out Q : 7882 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 30.46, Sparsity : 84.72 + Layer 26 : Out Q : 1316 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 33.04, Sparsity : 91.71 + Layer 27 : Out Q : 2266 , TIDL_EltWiseLayer, PASSED #MMACs = 0.17, 0.17, Sparsity : 0.00 + Layer 28 : Out Q : 10261 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 28.00, Sparsity : 92.98 + Layer 29 : Out Q : 1381 , TIDL_ConvolutionLayer, PASSED #MMACs = 398.72, 39.61, Sparsity : 90.07 + Layer 30 : Out Q : 2877 , TIDL_EltWiseLayer, PASSED #MMACs = 0.17, 0.17, Sparsity : 0.00 + Layer 31 : Out Q : 1436 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.35, 0.35, Sparsity : 0.00 + Layer 32 : Out Q : 1324 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 33 : Out Q : 6959 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 33.51, Sparsity : 74.78 + Layer 34 : Out Q : 7919 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 23.97, Sparsity : 87.97 + Layer 35 : Out Q : 3927 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 20.93, Sparsity : 89.50 + Layer 36 : Out Q : 1960 , TIDL_Deconv2DLayer, PASSED #MMACs = 0.69, 0.69, Sparsity : 0.00 + Layer 37 : Out Q : 1170 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 38 : Out Q : 9640 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 65.79, Sparsity : 50.50 + Layer 39 : Out Q : 7683 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 60.25, Sparsity : 69.78 + Layer 40 : Out Q : 2899 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 41.51, Sparsity : 79.18 + Layer 41 : Out Q : 1447 , TIDL_Deconv2DLayer, PASSED #MMACs = 1.38, 1.38, Sparsity : 0.00 + Layer 42 : Out Q : 1032 , TIDL_ConcatLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : -1.#J + Layer 43 : Out Q : 8533 , TIDL_ConvolutionLayer, PASSED #MMACs = 132.91, 63.12, Sparsity : 52.51 + Layer 44 : Out Q : 4481 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 62.00, Sparsity : 68.90 + Layer 45 : Out Q : 2050 , TIDL_ConvolutionLayer, PASSED #MMACs = 199.36, 59.79, Sparsity : 70.01 + Layer 46 : Out Q : 1613 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.38, 1.08, Sparsity : 21.88 =============================== TIDL import - parsing =============================== Caffe Network File : .\tf_caffe\10271549_sparse.prototxt Caffe Model File : .\tf_caffe\10271549_sparse.caffemodel TIDL Network File : .\10271549_sparse_net.bin TIDL Model File : .\10271549_sparse_param.bin Name of the Network : TIDL_deploy Num Inputs : 1 Num of Layer Detected : 47 0, TIDL_DataLayer , input_image 0, -1 , 1 , x , x , x , x , x , x , x , x , 0 , 0 , 0 , 0 , 0 , 1 , 3 , 416 , 416 , 0 , 1, TIDL_ConvolutionLayer , preprocess 1, 1 , 1 , 0 , x , x , x , x , x , x , x , 1 , 1 , 3 , 416 , 416 , 1 , 3 , 416 , 416 , 519168 , 2, TIDL_ConvolutionLayer , model/conv0/Conv2D 1, 1 , 1 , 1 , x , x , x , x , x , x , x , 2 , 1 , 3 , 416 , 416 , 1 , 64 , 208 , 208 , 407027712 , 3, TIDL_PoolingLayer , model/pool0/MaxPool/MaxPool 1, 1 , 1 , 2 , x , x , x , x , x , x , x , 3 , 1 , 64 , 208 , 208 , 1 , 64 , 104 , 104 , 6230016 , 4, TIDL_ConvolutionLayer , model/group0/block0/conv1/Conv2D 1, 1 , 1 , 3 , x , x , x , x , x , x , x , 4 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 5, TIDL_ConvolutionLayer , model/group0/block0/conv2/Conv2D 1, 1 , 1 , 4 , x , x , x , x , x , x , x , 5 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 6, TIDL_EltWiseLayer , model/group0/block0/add 1, 2 , 1 , 5 , 3 , x , x , x , x , x , x , 6 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , 7, TIDL_ConvolutionLayer , model/group0/block1/conv1/Conv2D 1, 1 , 1 , 6 , x , x , x , x , x , x , x , 7 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 8, TIDL_ConvolutionLayer , model/group0/block1/conv2/Conv2D 1, 1 , 1 , 7 , x , x , x , x , x , x , x , 8 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 398721024 , 9, TIDL_EltWiseLayer , model/group0/block1/add 1, 2 , 1 , 8 , 6 , x , x , x , x , x , x , 9 , 1 , 64 , 104 , 104 , 1 , 64 , 104 , 104 , 692224 , 10, TIDL_ConvolutionLayer , model/group1/block0/convshortcut/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 10 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 22151168 , 11, TIDL_ConvolutionLayer , model/group1/block0/conv1/Conv2D 1, 1 , 1 , 9 , x , x , x , x , x , x , x , 11 , 1 , 64 , 104 , 104 , 1 , 128 , 52 , 52 , 199360512 , 12, TIDL_ConvolutionLayer , model/group1/block0/conv2/Conv2D 1, 1 , 1 , 11 , x , x , x , x , x , x , x , 12 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 13, TIDL_EltWiseLayer , model/group1/block0/add 1, 2 , 1 , 12 , 10 , x , x , x , x , x , x , 13 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , 14, TIDL_ConvolutionLayer , model/group1/block1/conv1/Conv2D 1, 1 , 1 , 13 , x , x , x , x , x , x , x , 14 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 15, TIDL_ConvolutionLayer , model/group1/block1/conv2/Conv2D 1, 1 , 1 , 14 , x , x , x , x , x , x , x , 15 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 398721024 , 16, TIDL_EltWiseLayer , model/group1/block1/add 1, 2 , 1 , 15 , 13 , x , x , x , x , x , x , 16 , 1 , 128 , 52 , 52 , 1 , 128 , 52 , 52 , 346112 , 17, TIDL_ConvolutionLayer , model/group2/block0/convshortcut/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 17 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 22151168 , 18, TIDL_ConvolutionLayer , model/group2/block0/conv1/Conv2D 1, 1 , 1 , 16 , x , x , x , x , x , x , x , 18 , 1 , 128 , 52 , 52 , 1 , 256 , 26 , 26 , 199360512 , 19, TIDL_ConvolutionLayer , model/group2/block0/conv2/Conv2D 1, 1 , 1 , 18 , x , x , x , x , x , x , x , 19 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 20, TIDL_EltWiseLayer , model/group2/block0/add 1, 2 , 1 , 19 , 17 , x , x , x , x , x , x , 20 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , 21, TIDL_ConvolutionLayer , model/group2/block1/conv1/Conv2D 1, 1 , 1 , 20 , x , x , x , x , x , x , x , 21 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 22, TIDL_ConvolutionLayer , model/group2/block1/conv2/Conv2D 1, 1 , 1 , 21 , x , x , x , x , x , x , x , 22 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 398721024 , 23, TIDL_EltWiseLayer , model/group2/block1/add 1, 2 , 1 , 22 , 20 , x , x , x , x , x , x , 23 , 1 , 256 , 26 , 26 , 1 , 256 , 26 , 26 , 173056 , 24, TIDL_ConvolutionLayer , model/group3/block0/convshortcut/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 24 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 22151168 , 25, TIDL_ConvolutionLayer , model/group3/block0/conv1/Conv2D 1, 1 , 1 , 23 , x , x , x , x , x , x , x , 25 , 1 , 256 , 26 , 26 , 1 , 512 , 13 , 13 , 199360512 , 26, TIDL_ConvolutionLayer , model/group3/block0/conv2/Conv2D 1, 1 , 1 , 25 , x , x , x , x , x , x , x , 26 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 27, TIDL_EltWiseLayer , model/group3/block0/add 1, 2 , 1 , 26 , 24 , x , x , x , x , x , x , 27 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , 28, TIDL_ConvolutionLayer , model/group3/block1/conv1/Conv2D 1, 1 , 1 , 27 , x , x , x , x , x , x , x , 28 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 29, TIDL_ConvolutionLayer , model/group3/block1/conv2/Conv2D 1, 1 , 1 , 28 , x , x , x , x , x , x , x , 29 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 398721024 , 30, TIDL_EltWiseLayer , model/group3/block1/add 1, 2 , 1 , 29 , 27 , x , x , x , x , x , x , 30 , 1 , 512 , 13 , 13 , 1 , 512 , 13 , 13 , 86528 , 31, TIDL_Deconv2DLayer , model/P5/upsample/ResizeNearestNeighbor 1, 1 , 1 , 30 , x , x , x , x , x , x , x , 31 , 1 , 512 , 13 , 13 , 1 , 512 , 26 , 26 , 346112 , 32, TIDL_ConcatLayer , model/concat 1, 2 , 1 , 23 , 31 , x , x , x , x , x , x , 32 , 1 , 256 , 26 , 26 , 1 , 768 , 26 , 26 , 1 , 33, TIDL_ConvolutionLayer , model/fpn/unet/0/Conv2D 1, 1 , 1 , 32 , x , x , x , x , x , x , x , 33 , 1 , 768 , 26 , 26 , 1 , 256 , 26 , 26 , 132907008 , 34, TIDL_ConvolutionLayer , model/fpn/unet/1/Conv2D 1, 1 , 1 , 33 , x , x , x , x , x , x , x , 34 , 1 , 256 , 26 , 26 , 1 , 128 , 26 , 26 , 199360512 , 35, TIDL_ConvolutionLayer , model/fpn/unet/2/Conv2D 1, 1 , 1 , 34 , x , x , x , x , x , x , x , 35 , 1 , 128 , 26 , 26 , 1 , 256 , 26 , 26 , 199360512 , 36, TIDL_Deconv2DLayer , model/P4/upsample/ResizeNearestNeighbor 1, 1 , 1 , 35 , x , x , x , x , x , x , x , 36 , 1 , 256 , 26 , 26 , 1 , 256 , 52 , 52 , 692224 , 37, TIDL_ConcatLayer , model/concat_1 1, 2 , 1 , 16 , 36 , x , x , x , x , x , x , 37 , 1 , 128 , 52 , 52 , 1 , 384 , 52 , 52 , 1 , 38, TIDL_ConvolutionLayer , model/fpn/unet/3/Conv2D 1, 1 , 1 , 37 , x , x , x , x , x , x , x , 38 , 1 , 384 , 52 , 52 , 1 , 128 , 52 , 52 , 132907008 , 39, TIDL_ConvolutionLayer , model/fpn/unet/4/Conv2D 1, 1 , 1 , 38 , x , x , x , x , x , x , x , 39 , 1 , 128 , 52 , 52 , 1 , 64 , 52 , 52 , 199360512 , 40, TIDL_ConvolutionLayer , model/fpn/unet/5/Conv2D 1, 1 , 1 , 39 , x , x , x , x , x , x , x , 40 , 1 , 64 , 52 , 52 , 1 , 128 , 52 , 52 , 199360512 , 41, TIDL_Deconv2DLayer , model/P3/upsample/ResizeNearestNeighbor 1, 1 , 1 , 40 , x , x , x , x , x , x , x , 41 , 1 , 128 , 52 , 52 , 1 , 128 , 104 , 104 , 1384448 , 42, TIDL_ConcatLayer , model/concat_2 1, 2 , 1 , 9 , 41 , x , x , x , x , x , x , 42 , 1 , 64 , 104 , 104 , 1 , 192 , 104 , 104 , 1 , 43, TIDL_ConvolutionLayer , model/fpn/unet/6/Conv2D 1, 1 , 1 , 42 , x , x , x , x , x , x , x , 43 , 1 , 192 , 104 , 104 , 1 , 64 , 104 , 104 , 132907008 , 44, TIDL_ConvolutionLayer , model/fpn/unet/7/Conv2D 1, 1 , 1 , 43 , x , x , x , x , x , x , x , 44 , 1 , 64 , 104 , 104 , 1 , 32 , 104 , 104 , 199360512 , 45, TIDL_ConvolutionLayer , model/fpn/unet/8/Conv2D 1, 1 , 1 , 44 , x , x , x , x , x , x , x , 45 , 1 , 32 , 104 , 104 , 1 , 64 , 104 , 104 , 199360512 , 46, TIDL_ConvolutionLayer , model/mask/Conv2D 1, 1 , 1 , 45 , x , x , x , x , x , x , x , 46 , 1 , 64 , 104 , 104 , 1 , 2 , 104 , 104 , 1384448 , Total Giga Macs : 7.8630 I set conv2dKernelType in my config: conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 But there are many EltwiseLayer , ConcatLayer and DeconvolutionLayer, How did these layers set in conv2dKernelType? And How should I set the maxpooling layer in conv2dKernelType and layerGroupId? Could the maxpooling run fast on EVE? I run the model on TDA2 but the model set conv2dkernelType run 934ms per image, But the model did not set conv2dKernelType run 715ms. Did the conv2dKernelType set with something WRONG? Thanks, Jiandong Gao + +Responses: +Hi Jiandong Gao, Please refer to FAQ 21 and 22 in the TIDL user guide for more details on this. Thanks, Praveen + diff --git a/data2/text/range/30001+/972530.txt b/data2/text/range/30001+/972530.txt new file mode 100644 index 0000000000000000000000000000000000000000..299f3b7c5aa014d70870345bedbda1f11d035cca --- /dev/null +++ b/data2/text/range/30001+/972530.txt @@ -0,0 +1,8 @@ +Ticket Name: [FAQ] TDA4VM: Latest FAQs on TDA4 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA4VL, SYSCONFIG, , DRA821, 66AK2H12, TMS320C6657, TMS320C6678, 66AK2E05, 66AK2H14, TDA4VH, PROCESSOR-SDK-J721E, TDA4VL-Q1, J7200XSOMXEVM, , DRA829, TDA4AL-Q1, J784S4XEVM, EDGE-AI-STUDIO, J721EXSOMXEVM, AM69, 66AK2G12, EVMK2GX, PROCESSOR-SDK-C667X, PROCESSOR-SDK-K2H, PROCESSOR-SDK-TDAX, 66AK2H06, EVMK2EX, DRA71XEVM, AM6548, TDA2, DRA829V, DRA722, DRA821U, SYSBIOS, UNIFLASH, PROCESSOR-SDK-AM57X, PROCESSOR-SDK-J7200, AM5729, PROCESSOR-SDK-AM65X, AM5748, TDA2PXEVM, PROCESSOR-SDK-C665X, PROCESSOR-SDK-K2E, TDA2E, TDA2SX This thread will summarize the latest FAQs on TDA4 on a quarterly basis – these are usually the most viewed threads and augment the SDK collateral. To make the navigation easy, we have also added the domain to help you find the FAQs easily. Most update list of FAQs can be found at this link SDK collateral is still the first place to get all the information: RTOS SDK Linux SDK QNX SDK There are other FAQs also present in the SDK collateral itself keep these links handy: RTOS Developer Notes Vision Apps Trouble-shooting guide PDK FAQs TIDL Trouble-shooting TIOVX FAQs TISCI FAQ Firewall FAQ Linux SDK How to Guide and FAQs + +Responses: +2024 FAQs # FAQ Title E2E link Domain SoC 1 ECC Test for SDL_MCU_CPSW0_ECC_AGGR fails on HS device https://e2e.ti.com/f/791/t/1308278 ECC, SDL, CPSW TDA4VL 2 Types of ECC Aggregators, RAM IDs and Error Injection https://e2e.ti.com/f/791/t/1310234 ECC, SDL TDA4x 3 How to validate SysConfig PinMux Tool outputs https://e2e.ti.com/f/791/t/1320266 SYSCONFIG TDA4x 2023 FAQs # FAQ Title E2E link Domain SoC 1 CPSW9G Ethernet switch not working out-of-the box SDK 8.5 onwards https://e2e.ti.com/f/791/t/1183717 Ethernet, CPSW9G TDA4x, DRA82x 2 How to change default timer in FreeRTOS/SafeRTOS https://e2e.ti.com/f/791/t/1183389 FreeRTOS/SafeRTOS TDA4x 3 TDA4VM: K3 ResPart Tool fails to open on SDK 8.5 https://e2e.ti.com/f/791/t/1184455 SysConfig, K3 ResPart Tool TDA4VM/J721E DRA821/J7200, TDA4VL/J721S2 4 EVMK2G: How to run GPIO Examples for DSP core on K2G EVM https://e2e.ti.com/f/791/t/1184200 Getting started Keystone 1/2 5 How to change eDP driver for the different sysclk0 input? https://e2e.ti.com/f/791/t/1185013 DSS TDA4 6 How to create multiple rootfs like partition of emmc ? https://e2e.ti.com/f/791/t/1185543 uboot TDA4 7 C7x compiler status on address beyond +/- 2GB https://e2e.ti.com/f/791/t/1186433 C7x compiler TDA4 8 66AK2H12: "Quick start Guide for K2H - EVM " to enable a quick product development ? https://e2e.ti.com/f/791/t/1188791 Getting started Keystone 1/2 9 TMS320C6657: How to calculate the "DDR3 Interface – Registers" for Keystone I devices and Test/Debug on Keystone I EVM. https://e2e.ti.com/f/791/t/1189685 Getting started Keystone 1/2 10 TMS320C6678: How to rebuild the IBL of Processor SDK 6.3 in Windows Environment? https://e2e.ti.com/f/791/t/1190072 Getting started Keystone 1/2 11 66AK2E05: How to run OOB Demo on K2E / K2H Keystone-II Devices ? https://e2e.ti.com/f/791/t/1191353 Getting started Keystone 1/2 12 66AK2H12: Master List of all the FAQs of Keystone-I and II devices such as C6657, C6678, K2E and K2H. https://e2e.ti.com/f/791/t/1192670 Getting started Keystone 1/2 13 TDA4VM: SBL OSPI boot error: Invalid magic number in Single image header https://e2e.ti.com/f/791/t/1192888 OSPI boot TDA4 14 TDA4VM: SDL LBIST POST Timeout https://e2e.ti.com/f/791/t/1194872 SDL TDA4 15 How to reduce the usage of number of rings in VHWA drivers? https://e2e.ti.com/f/791/t/1195133 VHWA TDA4 16 TMS320C6678: Static IP Configuration using PDK https://e2e.ti.com/f/791/t/1196090 Getting started Keystone 1/2 17 Integrating latest SafeRTOS release with SDK-8.2 https://e2e.ti.com/f/791/t/1198044 SafeRTOS TDA4 18 TDA4 Drive Strength Controls https://e2e.ti.com/f/791/t/1200155 IO TDA4 19 How to enable trace and assert in VHWA drivers? https://e2e.ti.com/f/791/t/1200386 VHWA TDA4 20 TDA4VM: Ability to change boot mode in SW https://e2e.ti.com/f/791/t/1200583 Boot mode TDA4 21 TDA4VM: Does SDK8.5 MCAL CDDIPC supports communication with A72 running Linux ? https://e2e.ti.com/f/791/t/1201356 CDD IPC TDA4VM 22 66AK2H14: I2C Boot Parameter Table correction in datasheet, SPRS866G https://e2e.ti.com/f/791/t/1201776 Getting started Keystone 1/2 23 How to fit the boot images within 4MB of emmc boot partion while flashing using dfu? https://e2e.ti.com/f/791/t/1203212 Emmc Boot TDA4VM 24 How to do a MAC loopback test with CPSW in TDA4/DRA8 devices https://e2e.ti.com/f/791/t/1203408 Ethernet, CPSW TDA4x, DRA82x 25 DSS M2M support on TDA4VH https://e2e.ti.com/f/791/t/1007456 DSS TDA4VH 26 How to print the ALE table for CPSW in TDA4/DRA8 devices https://e2e.ti.com/f/791/t/1204394 Ethernet, CPSW TDA4x, DRA82x 27 TDA4VM: Explain why VRING_BASE_ADDRESS = 0xAA000000 and IPC_VRING_BUFFER_SIZE = 0x1C00000U https://e2e.ti.com/f/791/t/1205711 IPC TDA4VM 28 How to disable serdes from Linux to enable serdes configuration from Ethfw and Enet lld https://e2e.ti.com/f/791/t/1208183 Ethernet, CPSW TDA4x, DRA82x 29 TDA4VM: K3conf: Capabilities with options(help) https://e2e.ti.com/f/791/t/1209211 K3conf TDA4x 30 TDA4VM: How to load sysFw from ROM in SBL boot flow https://e2e.ti.com/f/791/t/1207853 SBL TDA4Vx 31 TDA4VM: How to forward Broadcast frames to HLOS (QNX) running on A72 by default ? https://e2e.ti.com/f/791/t/1210631 Ethernet TDA4VM 32 TDA4VM: Run vision_apps in SBL boot flow with combined_appImage https://e2e.ti.com/f/791/t/1210640 SBL TDA4VM 33 PROCESSOR-SDK-J721E: CDD_IPC_APP_RC_LINUX does not build on Processor SDK RTOS 8.2 for the core MCU 2_1 https://e2e.ti.com/f/791/t/1125865 CDD IPC TDA4VM 34 TDA4VL-Q1: Run vision_apps in SBL boot flow with combined_appImage https://e2e.ti.com/f/791/t/1214665 SBL TDA4VL 35 TDA4AEP: How to enable QoS for DSS in SBL or in SPL bootflow? https://e2e.ti.com/f/791/t/1214683 QoS TDA4VL 36 TDA4: How to interface eDP with the external serializer https://e2e.ti.com/f/791/t/1215555 DSS TDA4 37 How to add/map MAC-only port to A72 (Linux) client in Ethernet Firmware + Linux Use Case? https://e2e.ti.com/f/791/t/1215638 Ethernet TDA4VM 38 How is the EVM(board) to device tree mapped? How are the peripherals organized in a device tree? https://e2e.ti.com/f/791/t/1215934 Device Tree TDA4 39 TDA4VM: How to change the MAC-only port mapped to A72 (Linux) client in Ethernet Firmware + Linux Use Case? https://e2e.ti.com/f/791/t/1216154 Ethernet TDA4VM 40 J7200XSOMXEVM: How do I enable CAN with Linux driver on J7200? https://e2e.ti.com/f/791/t/1216687 Can, Device Tree, Linux J7VCL/J7200 41 How can I analyze a GPU (Graphics Process Unit) driver or hardware issue? https://e2e.ti.com/f/791/t/1218307 GPU, PVR Carbon TDA4x, AM6x (including Sitara) 42 TDA4VM: How do I port an R5F RTOS Ethernet client running on MCU2_1 to other R5F cores (ex: MCU3_0 core) in SoCs with multiple R5F cores? https://e2e.ti.com/f/791/t/1217969 Ethernet TDA4VM 43 TDA4VM: Are there any known bugs and patches that I should use in my GPU driver? https://e2e.ti.com/f/791/t/1218318 GPU TDA4VM 44 SK-TDA4VM: How to use ISP as extra colorconvert module to convert to UYVY format using GStreamer? https://e2e.ti.com/f/791/t/1219317 GStreamer, ISP TDA4VM 45 TDA4VM: How to get CPSW Ethernet Statistics on TDA4/DRA8 devices? https://e2e.ti.com/f/791/t/1220277 Ethernet, CPSW TDA4x, DRA82x 46 TDA4VM: Jacinto︎ 7 processors boot flow - considerations and customizations https://e2e.ti.com/f/791/t/1220614 Boot flow TDA4VM, DRA829 47 TDA4VM: Sample Wayland application of OpenGL to run on TI board https://e2e.ti.com/f/791/t/1214641 GPU, Wayland, Display TDA4x, AM6x 48 TDA4VM: How to identify a GPIO and toggle the same https://e2e.ti.com/f/791/t/1223248 GPIO TDA4VM 49 TDA4xx: How to load sysFw from ROM in SBL boot flow https://e2e.ti.com/f/791/t/1223368 SBL TDA4VM 50 TDA4VL-Q1: How to configure DDR size of 4GB in the J721s2 SDK? https://e2e.ti.com/f/791/t/1224003 DDR TDA4VL 51 TDA4VM: How to boot from the emmc UDA partition in FS mode using SPL boot flow? https://e2e.ti.com/f/791/t/1224038 Emmc TDA4VM 52 TDA4VM: How to flash images to the EMMC Boot 0 partition using tftp? https://e2e.ti.com/f/791/t/1224502 Emmc TDA4VM 53 SK-TDA4VM: How to create Object Classification Reference Design using Edge Impulse platform on TDA4VM-SK https://e2e.ti.com/f/791/t/1226533 Edge Impulse SK-TDA4VM 54 SK-TDA4VM: How to create Object Detection Reference Design using Edge Impulse platform on TDA4VM-SK https://e2e.ti.com/f/791/t/1226588 Edge Impulse SK-TDA4VM 55 SK-TDA4VM: Error while running custom compiled model https://e2e.ti.com/f/791/t/1227571 EdgeAI, Custom Model Inference SK-TDA4VM 56 SK-TDA4VM: How to do inferencing with custom compiled model on target https://e2e.ti.com/f/791/t/1228053 EdgeAI, Custom Model Inference SK-TDA4VM 57 TDA4VM/TDA4VL/TDA4AL/TDA4VH/DRA821: How can we make the Jacinto SDK compatible for device variants? https://e2e.ti.com/f/791/t/1227640 SDK TDA4 58 TDA4VL-Q1: How can we make J721s2 superset SDK compatible for TDA4VL? https://e2e.ti.com/f/791/t/1221081 SDK TDA4VL 59 TDA4AL-Q1: How can we make J721s2 superset SDK compatible for TDA4AL? https://e2e.ti.com/f/791/t/1221162 SDK TDA4AL 60 How to check if device type is HS-SE, HS-FS or GP? https://e2e.ti.com/f/791/t/1228618 SoC TDA4VM/VL/VH/DRA821 61 J784S4XEVM: How to enable second PCIe slot for two SSD cards https://e2e.ti.com/f/791/t/1230896 PCIe J784S4/TDA4VH 62 J7200XSOMXEVM: How to change the console for keywriter https://e2e.ti.com/f/791/t/1231088 Keywriter J7xxx 63 How to enable the matrix GUI 2.0 for AM57x devices in Linux? https://e2e.ti.com/f/791/t/1232377 Getting Started AM57x 64 TDA4VM: TDA4VL : Can you list out the difference of features supported in SDK's for CDD IPC and PDK IPC ? https://e2e.ti.com/f/791/t/1233566 IPC TDA4VM,TDA4VL 65 TDA4VM: How to port MCAL Ethernet Virtual Mac Application supported on MCU2_1 to MCU1_0? https://e2e.ti.com/f/791/t/1233669 MCAL Ethernet TDA4VM 66 TDA4VM: How to inference/benchmark on TDA4VM SoC with precompiled model artifacts using edgeai-benchmark repo ? https://e2e.ti.com/f/791/t/1235203 EdgeAI model benchmarking SK-TDA4VM 67 EDGE-AI-STUDIO: Edge AI Resources for AM6xA SoCs https://e2e.ti.com/f/791/t/1236957 Edge AI Studio AM6x 68 How to use TR for transfers in McSPI, instead of packet descriptors? https://e2e.ti.com/f/791/t/1237073 PDK TDA4VM/VL/VH 69 TDA4VM: How to get EB Tresos studio for MCAL development and customer licence tool? https://e2e.ti.com/f/791/t/1238147 MCAL TDA4VM 70 TMS320C6657: How to run the direct NAND-BOOT example on TI-C6657-EVM without IBL ? https://e2e.ti.com/f/791/t/1238130 Getting started Keystone 1/2 71 TDA4VM: Explain IPC Mailbox allocation ? https://e2e.ti.com/f/791/t/1238685 IPC TDA4VM 72 TDA4VM: How to perform power benchmarking of model inference/run on TDA4VM SoC https://e2e.ti.com/f/791/t/1239352 Power Benchmarking, Model Inference TDA4VM 73 TMS320C6678: How to create a EDMA PING-PONG test-code using the CSL ( Chip support Library ) package and test on C6678 EVM ? https://e2e.ti.com/f/791/t/1242663 Getting started Keystone 1/2 74 TMS320C6678: DDR3 Read write test code (or) How to do DDR3 test on C6678 EVM or K2H EVM board ? https://e2e.ti.com/f/791/t/1244930 Getting started Keystone 1/2 75 RPMsg: How to add multiple endpoints to a remote core running RTOS? https://e2e.ti.com/f/791/t/1245326 IPC TDA4VM 76 TDA4: How to enable blending operation and two input video pipelines in DSS memory to memory path? https://e2e.ti.com/f/791/t/1248720 DSS TDA4 77 TDA4VM: Process OpenVX Graph while simultaneously configuring a camera https://e2e.ti.com/f/791/t/1250032 Imaging TDA4VM 78 How to change input display pipeline in the DSS M2M WB node? https://e2e.ti.com/f/791/t/1251057 DSS TDA4 79 J7200: How to change/generate the “Eth” configuration for MCAL Ethernet Application from one core to other core. https://e2e.ti.com/f/791/t/1251728 MCAL Ethernet J7200/DRA821 80 TDA4VM: OpenVX Host on R5F and node Target on A72 (Linux) https://e2e.ti.com/f/791/t/1256312 OpenVX TDA4VM 81 TDA4VM: How do I enable CAN channels on Gateway/Ethernet Switch/Industrial (GESI) expansion card when using J721E EVM from Linux A72? https://e2e.ti.com//f/791/t/1259301 CAN TDA4VM 82 TDA4VM: How to reduce the EthFW initialization time to avail CPSW H/W Switch functionality as soon as possible after the core boot up in Vision Apps use-case? https://e2e.ti.com/f/791/t/1259311 EthFW In Vision Apps TDA4VM 83 J784S4XEVM: How to enable main domain watchdog? https://e2e.ti.com/f/791/t/1261103 Linux J784S4/TDA4VH 84 J721S2XEVM: How to enable main domain watchdog? https://e2e.ti.com/f/791/t/1261459 Linux J721s2/TDA4VL 85 Where can i find MCAL configurator package and EB Tresos studio for Jacinto devices ? https://e2e.ti.com/f/791/t/1261724 MCUSW TDA4 86 TDA4AL-Q1: CAN Profiling Application failed to operate in Tx only or External Loopback and Polling mode or interrupt mode. https://e2e.ti.com/f/791/t/1264462 CAN TDA4 87 How do I bring/brought up Ethernet interfaces for CPSWnG in Linux from SDK Version 9.0 and above? https://e2e.ti.com/f/791/t/1264445 Linux Ethernet driver TDA4 88 J721EXSOMXEVM: How to work around errata i2086 for PCIe switches and multifunction devices for J721E/TDA4VM/DRA829? https://e2e.ti.com/f/791/t/1264686 PCIe TDA4VM 89 AM69: How can I assign interface ID to CAN modules https://e2e.ti.com/f/791/t/1267036 CAN TDA4, AM6x 90 J784S4XEVM/AM69: 8.6 SDK - GPIO Interrupts are not functional https://e2e.ti.com/f/791/t/1272526 GPIO J784s4/Am69 91 J721EXSOMXEVM: 9.0 SDK make U-Boot build failure https://e2e.ti.com/f/791/t/1273477 9.0 SDK u-boot build J7xxx 92 66AK2G12: How to create "Target configuration" and do "Test connection" on 66AK2G12 EVM https://e2e.ti.com/f/791/t/1132676 Getting started Keystone 1/2 devices 93 TDA4VM: Best practices for version tracking for TI’s SDK https://e2e.ti.com/f/791/t/1133505 Getting Started TDA4 94 EVMK2G: How to run UART Examples for DSP core on K2G EVM https://e2e.ti.com/f/791/t/1135364 Getting started Keystone 1/2 devices 95 66AK2H12: Booting Linux on K2H board using NFS https://e2e.ti.com/f/791/t/1135367 Getting started Keystone 1/2 devices 96 EVMK2GX: How to generate the CCS PDK examples for K2G processor family? https://e2e.ti.com/f/791/t/1135633 Getting started Keystone 1/2 devices 97 EVMK2G: How to run UART Examples for ARM core on K2G EVM https://e2e.ti.com/f/791/t/1135670 Getting started Keystone 1/2 devices 98 66AK2G12: How to load and run the gel file on K2G EVM? https://e2e.ti.com/f/791/t/1136193 Getting started Keystone 1/2 devices 99 66AK2G12: How to run McBSP loop back test on K2G EVM ? https://e2e.ti.com/f/791/t/1136199 Getting started Keystone 1/2 devices 100 66AK2E05: How to re-build the PDK and SDK of PROCESSOR-SDK-RTOS-K2E 6.3 for K2E? https://e2e.ti.com/f/791/t/1137599 Getting started Keystone 1/2 devices 101 66AK2H12: How to create "Target configuration" and do "Test connection" on K2H EVM https://e2e.ti.com/f/791/t/1137984 Getting started Keystone 1/2 devices 102 TDA4VM: PDK Interrupt registration for R5F using OSAL https://e2e.ti.com/f/791/t/1158072 PDK TDA4VM 103 TDA4VH: Reduction in the number of GPIOs from J7ES to J7AHP https://e2e.ti.com/f/791/t/1160537 GPIOs TDA4VH 104 TDA4VM: Starting openVX application automatically at Linux boot https://e2e.ti.com/f/791/t/1165996 systemd service TDA4VM 105 TDA4VM: How to move to Native Linux Driver on SDK 8.4 for J7 and DRA8 Devices https://e2e.ti.com/f/791/t/1166334/ Native Linux driver TDA4VM, TDA4VH, DRA821, Dra829 106 TDA4VM: How to run vision_apps with tisdk-tiny-image https://e2e.ti.com/f/791/t/1166419/ TinyFS/ Vision_apps TDA4VM 107 66AK2E05: Flashing UBI Image https://e2e.ti.com/f/791/t/1166986 Getting started Keystone 1/2 devices 108 TDA4VM: How to read the DDR frequency from Linux https://e2e.ti.com/f/791/t/1169373/ DDR Frequency TDA4VM/J72XX 109 SK-TDA4VM: How to reset the system using main domain watchdog https://e2e.ti.com/f/791/t/1170965/ Watchdog TDA4VM-SK 110 TMS320C6657: How to run the direct SPI-BOOT example on TI-C6657-EVM without IBL ? https://e2e.ti.com/f/791/t/1171336 Getting started Keystone 1/2 devices 111 TDA4VM: Steps for executing linux DSS on SDK https://e2e.ti.com/f/791/t/1173507/ Linux Display TDA4VM 112 TDA4VM: Steps for executing linux CSI on SDK https://e2e.ti.com/f/791/t/1173511/ CSI linux TDA4VM 113 TDA4VM: Run Capture - Display usecase on Linux in SDK https://e2e.ti.com/f/791/t/1173513/ Capture-Display Linux TDA4VM 114 66AK2E05: How to flash U-Boot and Linux kernel using Shell Scripts in Processor SDK Linux https://e2e.ti.com/f/791/t/1173917 Getting started Keystone 1/2 devices 115 TDA4VM: How to browse memory using CCS while running Linux. https://e2e.ti.com/f/791/t/1175628 CCS Linux TDA4VM 116 TDA4VM: Is HSFOSC1 external clock required https://e2e.ti.com/f/791/t/1176475 HFOSC TDA4VM 117 SK-TDA4VM: How do I connect the external debugger Blackhawk USB560v2 (XDS560v2) USB System Trace to the JTAG on the board? https://e2e.ti.com/f/791/t/1178240 Getting Started TDA4VM 118 66AK2H12: How to flash U-Boot and Linux kernel using Shell Scripts in Processor SDK Linux https://e2e.ti.com/f/791/t/1178305 Getting started Keystone 1/2 devices 119 66AK2H12: How to build and run the platform test on K2H EVM ? https://e2e.ti.com/f/791/t/1180070 Getting started Keystone 1/2 devices 120 66AK2E05: How to build and run the platform test on K2E EVM ? https://e2e.ti.com/f/791/t/1180154 Getting started Keystone 1/2 devices 121 TMS320C6678: How to build and run the IPC-SRIO example on C6678 EVM? https://e2e.ti.com/f/791/t/1180856 Getting started Keystone 1/2 devices 122 OSPI FAQ for K3 devices (Sitara/Jacinto) https://e2e.ti.com/f/791/t/1181116 OSPI Flash TDA4VM, DRA821 123 EVMK2GX: How to build, run and test the EMAC example on DSP core of K2G family processor https://e2e.ti.com/f/791/t/1181262 Getting started Keystone 1/2 devices 2022 FAQs # FAQ title E2E Link Domain SoC 1 TDA4VM: How to boot TDA4VM from eMMC UDA partition using SBL in SDK 8.1 https://e2e.ti.com/f/791/t/1067116 PDK, SBL TDA4VM 2 TMS320C6657: How to build and run the IPC-Image processing demo on C6657 ? https://e2e.ti.com/f/791/t/1068379 Getting started Keystone 1/2 devices 3 How to use DDR BIST engine for filling up pattern. https://e2e.ti.com/f/791/t/1065508 DDR TDA4xVM 4 TMS320C6678: How to build and run the IPC-Image processing demo on C6678 ? https://e2e.ti.com/f/791/t/1070386 Getting started Keystone 1/2 devices 5 TMS320C6657: How to build and run the platform test on C6657 EVM ? https://e2e.ti.com/f/791/t/1071275 Getting started Keystone 1/2 devices 6 TMS320C6678: How to build and run the platform test on C6678 EVM ? https://e2e.ti.com/f/791/t/1071286 Getting started Keystone 1/2 devices 7 TDA4VM: How to build C++ application from j721e PDK? Is there a demo example available? https://e2e.ti.com/f/791/t/1071841 PDK, CPP Makefile TDA4VM, DRA821 8 TDA4VM: Measuring power consumption of the device https://e2e.ti.com/f/791/t/1072952 Power measurement TDA4VM 9 TMS320C6678: How to flash the IBL ( Intermediate Boot loader ) into EEPROM and how to flash the application binary into NOR? How to boot the IBL + Application binary? https://e2e.ti.com/f/791/t/1073147 Getting started Keystone 1/2 devices 10 TDA4VM: NEON Support in PSDK QNX https://e2e.ti.com/f/791/t/1075898 QNX, NEON TDA4VM 11 TDA4VM: How to build SBL in debug mode j721e RTOS SDK? https://e2e.ti.com/f/791/t/1076822 SBL TDA4VM 12 Enable eDP display on TDA4VL/J7AEP board https://e2e.ti.com/f/791/t/1076883 Display TDA4VL 13 Adapt the single video camera demo to a multiple graph version https://e2e.ti.com/f/791/t/1078116 OpenVX TDA4VM 14 TMS320C6657: Quick start Guide C6657 and C6657-EVM https://e2e.ti.com/f/791/t/1080748 Getting started Keystone 1/2 devices 15 TMS320C6678: How to re-build the PDK and SDK of PROCESSOR-SDK-C667X 6.3 for C6678? https://e2e.ti.com/f/791/t/1082229 Getting started Keystone 1/2 devices 16 TMS320C6678: How to generate the CCS PDK examples for C6678? https://e2e.ti.com/f/791/t/1082251 Getting started Keystone 1/2 devices 17 TMS320C6678: Quick set up Guide C6678 and C6678-EVM https://e2e.ti.com/f/791/t/1082264 Getting started Keystone 1/2 devices 18 66AK2H14: How to generate the CCS PDK examples for 66AK2H14 - k2H EVM? https://e2e.ti.com/f/791/t/1083353 Getting started Keystone 1/2 devices 19 TDA4VM: What is the difference between SK-TDA4VM and the J721E EVM? https://e2e.ti.com/f/791/t/1083612 Starter Kit TDA4VM 20 TDA4VM: TDA4VM: Questions about UDMAP module register access restrictions https://e2e.ti.com/f/791/t/1084129 UDMAP TDA4VM 21 TMS320C6678: How to run the out-of-box demo in C6678-EVM? https://e2e.ti.com/f/791/t/1084236 Getting started Keystone 1/2 devices 22 Run the multi-cam demo with Dual Graph https://e2e.ti.com/f/791/t/1084620 OpenVX TDA4VM 23 PROCESSOR-SDK-K2H: Updating the firmware in XDS200 On-board debug emulator for EVMK2H https://e2e.ti.com/f/791/t/1084787 Getting started Keystone 1/2 devices 24 66AK2H12: GEL file Loading (DSP and ARM core) in K2H EVM https://e2e.ti.com/f/791/t/1084856 Getting started Keystone 1/2 devices 25 TDA4VM: DRA829/DRA821: How to boot from eMMC boot1 partition https://e2e.ti.com/f/791/t/1084875 U-Boot TDA4VM/J7200 26 66AK2H12: Target configuration in CCS for K2H https://e2e.ti.com/f/791/t/1084886 Getting started Keystone 1/2 devices 27 66AK2H12: UART examples for K2H EVM in DSP core https://e2e.ti.com/f/791/t/1085792 Getting started Keystone 1/2 devices 28 TDA4VM: Booting MCU2_1 application form SBL https://e2e.ti.com/f/791/t/1085821 SBL, MCU2_1 TDA4VM 29 TDA4VM: Maximum pressure or force allowed on package lid of SoC https://e2e.ti.com/f/791/t/1089203 Hardware TDA4VM 30 TDA4VM: Why does my board enter an abort state after running my application for a long time? https://e2e.ti.com/f/791/t/1090755 C7x, Debug TDA4VM 31 TDA4VM: Enabling POK Modules https://e2e.ti.com/f/791/t/1090769 POK TDA4VM 32 66AK2H14: UART ARM PROJECT https://e2e.ti.com/f/791/t/1091537 Getting started Keystone 1/2 devices 33 TDA4VM: Switch the DSS configuration from a configuration file between 720p and 1080p https://e2e.ti.com/f/791/t/1092560 DSS TDA4VM 34 TDA4VM: PVRTune does not work with PSDK 8.x, how can I fix this? https://e2e.ti.com/f/791/t/1094790 GPU TDA4VM 35 TDA4VM: How do I update the GPU driver to a newer version? https://e2e.ti.com/f/791/t/1094811 GPU TDA4VM 36 TDA4VM: Is Fast Mode Plus supported? https://e2e.ti.com/f/791/t/1095190 I2C TDA4Vm 37 66AK2E05: How to calculate the "DDR3 Interface – Registers" for Keystone II devices and Test/Debug on Keystone II EVM https://e2e.ti.com/f/791/t/1096375 Getting started Keystone 1/2 devices 38 PRU: How do I calculate read and write latencies? https://e2e.ti.com/f/791/t/1096933 PRU ICSSG AM57, AM65 39 [FAQ] TDA4VM: Reduce the DRAM (DDR) memory of Linux to 1GB https://e2e.ti.com/f/791/t/1097117 U-Boot TDA4VM 40 Yocto: Building the Linux SDK results in do_package failures for Linux Kernel and U-Boot https://e2e.ti.com/f/791/t/1097720 Yocto TDA4VM, DRA821 41 TMS320C6657: GPIO https://e2e.ti.com/f/791/t/1098858 Getting started Keystone 1/2 devices 42 TDA4VM/VL: How to allocate UDMA channels and other resources using SysConfig? https://e2e.ti.com/f/791/t/1097038 UDMA & Resource Allocation TDA4VM/VL 43 TMS320C6657: How to solve the CSL errors in the Platform test example of PDK in processor SDK 6.3 ? https://e2e.ti.com/f/791/t/1103564 Getting started Keystone 1/2 devices 44 TMS320C6657: How to solve the Cerrno Error in the Platform test example of PDK in processor SDK 6.3 ? https://e2e.ti.com/f/791/t/1103682 Getting started Keystone 1/2 devices 45 TDA4VM: How to add support for new Flash Device in RTOS SDK https://e2e.ti.com/f/791/t/1104992 Flash, Board TDA4VM 46 66AK2E05: How to build u-boot for K2E ? from the package "PROCESSOR-SDK-LINUX-K2E" https://e2e.ti.com/f/791/t/1106109 Getting started Keystone 1/2 devices 47 66AK2E05: How to flash the u-boot into SPI of K2E using PROCESSOR-SDK-LINUX-K2E https://e2e.ti.com/f/791/t/1106187 Getting started Keystone 1/2 devices 48 TDA4VM: SDK8.02/8.01: Keywriter build failure https://e2e.ti.com/f/791/t/1107009 Keywriter TDA4VM 49 TMS320C6657: How to wake the second core by the first core in C6657 ? What is Boot-magic Address / Jump boot address ? https://e2e.ti.com/f/791/t/1107106 Getting started Keystone 1/2 devices 50 TMS320C6657: NIMU EMAC example for C665x processor from TI-RTOS SDK https://e2e.ti.com/f/791/t/1107360 Getting started Keystone 1/2 devices 51 PROCESSOR-SDK-TDAX: How to capture embedded metadata with the data type 0x12 using CSIRX? https://e2e.ti.com/f/791/t/1107616 CSIRX TDA4x 52 PROCESSOR-SDK-J721E: How to enable multiple displays by sending bigger size frames from DSS? https://e2e.ti.com/f/791/t/1107628 DSS TDA4x 53 66AK2E05: How to build Linux for K2E ? from the package "PROCESSOR-SDK-LINUX-K2E" https://e2e.ti.com/f/791/t/1107923 Getting started Keystone 1/2 devices 54 66AK2H12: NIMU EMAC example client for K2H family devices (66AK2H06, 66AK2H12, 66AK2H14 and K2H EVM) https://e2e.ti.com/f/791/t/1108274 Getting started Keystone 1/2 devices 55 66AK2E05: NIMU EMAC Client example on TI-RTOS SDK for K2E family (66AK2E05,66AK202,EVMK2E and EVMK2EX) https://e2e.ti.com/f/791/t/1108596 Getting started Keystone 1/2 devices 56 66AK2E05: How to boot Linux on K2E using NFS from the package "PROCESSOR-SDK-LINUX-K2E" ? https://e2e.ti.com/f/791/t/1108630 Getting started Keystone 1/2 devices 57 66AK2E05: TSIP on K2E DSP https://e2e.ti.com/f/791/t/1109628 Getting started Keystone 1/2 devices 58 TDA4VM: How to boot using WKUP UART? https://e2e.ti.com/f/791/t/1109996 UART Boot TDA4x 59 66AK2E05: DHCP configuration for K2E and K2H family https://e2e.ti.com/f/791/t/1109999 Getting started Keystone 1/2 devices 60 66AK2E05: UART Example project for K2E family devices https://e2e.ti.com/f/791/t/1110355 Getting started Keystone 1/2 devices 61 TDA4VM: How to optimize surround view use case to 2-3 Seconds from power on https://e2e.ti.com/f/791/t/1110814 Early usecases TDA4VM 62 TMS320C6657: UART Example project for C665x family devices https://e2e.ti.com/f/791/t/1111360 Getting started Keystone 1/2 devices 63 TMS320C6678: UART Example project for C667x family devices https://e2e.ti.com/f/791/t/1111572 Getting started Keystone 1/2 devices 64 66AK2H12: UART Example project for K2H family devices https://e2e.ti.com/f/791/t/1111582 Getting started Keystone 1/2 devices 65 66AK2E05: Would you please provide a "Quick start Guide for K2E - EVM " to enable a quick product development ? https://e2e.ti.com/f/791/t/1111676 Getting started Keystone 1/2 devices 66 0TDA4VM: J72E : How to determine if this is a GP or HS device https://e2e.ti.com/f/791/t/1113128 HS Vs GP identification TDA4x 67 TDA4: How LDC LUT can be converted from text to binary format and be used in SDK https://e2e.ti.com/f/791/t/1114821 LDC TDA4 68 66AK2H12: How to flash the SBL ( Secondary Boot loader ) into NOR and how to flash the application binary into NOR? How to boot the SBL + Application binary? https://e2e.ti.com/f/791/t/1115226 Getting started Keystone 1/2 devices 69 TDA4VM: Configuring stack and heap size in FreeRTOS application https://e2e.ti.com/f/791/t/1115792 Linker & compiler TDA4VM 70 TDA4VM: How can I configure the Memory Protection Unit (MPU) for the R5F running FreeRTOS and baremetal case? https://e2e.ti.com/f/791/t/1115797 R5F memory configuration TDA4VM 71 66AK2H12: EVMK2H U-Boot build https://e2e.ti.com/f/791/t/1115842 Getting started Keystone 1/2 devices 72 Compiler Announcement: TI Arm Clang Compiler Tools release version 2.1.0.LTS available https://e2e.ti.com/f/791/t/1116468 Compiler TDA4VM 73 66AK2E05: How to run the Security Accelerator example on Arm core 0 on K2E EVM board ? https://e2e.ti.com/f/791/t/1116802 Getting started Keystone 1/2 devices 74 TMS320C6678: How to utilize the clock ticks to measure the time taken for the code execution? https://e2e.ti.com/f/791/t/1117651 Getting started Keystone 1/2 devices 75 TDA4VM: How to build custom examples https://e2e.ti.com/f/791/t/1120181 Build TDA4 76 TDA4VM: TIOVX Optimization Comparison for J721E and J721S2 https://e2e.ti.com/f/791/t/1106172 OpenVX TDA4VM 77 TDA4VM: Debugging SBL boot in RTOS SDK https://e2e.ti.com/f/791/t/1121933 SBL TDA4VM 78 66AK2E05: How to re-solve the build Errors in the Platform test example of PDK in Processor SDK 6.3 for K2E ? https://e2e.ti.com/f/791/t/1121794 Getting started Keystone 1/2 devices 79 TDA4VM: Enable Frame freeze detection in DSS https://e2e.ti.com/f/791/t/1124527 DSS TDA4VM 80 66AK2H12: U-Boot flash from CCS for K2HK family devices https://e2e.ti.com/f/791/t/1124646 Getting started Keystone 1/2 devices 81 66AK2H12: U-Boot flash for K2HK family devices https://e2e.ti.com/f/791/t/1125007 Getting started Keystone 1/2 devices 82 TDA4VM: How to test serial UART ports on board? https://e2e.ti.com/f/791/t/1125980 UART J72xx 83 CDD_IPC_APP_RP_LINUX does not build on Processor SDK RTOS 8.2 for the core MCU 2_1 https://e2e.ti.com/f/791/t/1125865 CDD IPC TDA4 84 TDA4VM: Using PDK GPIO driver https://e2e.ti.com/f/791/t/1126741 GPIO TDA4 85 66AK2H12: Linux Flashing steps for K2HK family processor https://e2e.ti.com/f/791/t/1129722 Getting started Keystone 1/2 devices 86 66AK2H12: Linux build from Processor Linux SDK https://e2e.ti.com/f/791/t/1129725 Getting started Keystone 1/2 devices 87 TDA4VM: How to use DRU channels for config data in VISS driver https://e2e.ti.com/f/791/t/1130443 VISS TDA4 88 SK-TDA4VM: How do I enable and debug IMX390 + fusion board not working with Edge AI SDK https://e2e.ti.com/f/791/t/1131299 Getting started TDA4 89 SK-TDA4VM: How do I use the CAN bus headers on SK-TDA4VM using Edge AI SDK? https://e2e.ti.com/f/791/t/1132406 CAN TDA4 90 EVMK2GX: U-boot build steps for K2G https://e2e.ti.com/f/791/t/1132609 Getting started Keystone 1/2 devices 91 EVMK2GX: Build Linux for K2G - ARM https://e2e.ti.com/f/791/t/1132624 Getting started Keystone 1/2 devices 92 66AK2G12: How to create "Target configuration" and do "Test connection" on 66AK2G12 EVM https://e2e.ti.com/f/791/t/1132676 Getting started Keystone 1/2 devices 93 TDA4VM: Best practices for version tracking for TI’s SDK https://e2e.ti.com/f/791/t/1133505 Getting Started TDA4 94 EVMK2G: How to run UART Examples for DSP core on K2G EVM https://e2e.ti.com/f/791/t/1135364 Getting started Keystone 1/2 devices 95 66AK2H12: Booting Linux on K2H board using NFS https://e2e.ti.com/f/791/t/1135367 Getting started Keystone 1/2 devices 96 EVMK2GX: How to generate the CCS PDK examples for K2G processor family? https://e2e.ti.com/f/791/t/1135633 Getting started Keystone 1/2 devices 97 EVMK2G: How to run UART Examples for ARM core on K2G EVM https://e2e.ti.com/f/791/t/1135670 Getting started Keystone 1/2 devices 98 66AK2G12: How to load and run the gel file on K2G EVM? https://e2e.ti.com/f/791/t/1136193 Getting started Keystone 1/2 devices 99 66AK2G12: How to run McBSP loop back test on K2G EVM ? https://e2e.ti.com/f/791/t/1136199 Getting started Keystone 1/2 devices 100 66AK2E05: How to re-build the PDK and SDK of PROCESSOR-SDK-RTOS-K2E 6.3 for K2E? https://e2e.ti.com/f/791/t/1137599 Getting started Keystone 1/2 devices 101 66AK2H12: How to create "Target configuration" and do "Test connection" on K2H EVM https://e2e.ti.com/f/791/t/1137984 Getting started Keystone 1/2 devices 102 TDA4VM: PDK Interrupt registration for R5F using OSAL https://e2e.ti.com/f/791/t/1158072 PDK TDA4VM 103 TDA4VH: Reduction in the number of GPIOs from J7ES to J7AHP https://e2e.ti.com/f/791/t/1160537 GPIOs TDA4VH 104 TDA4VM: Starting openVX application automatically at Linux boot https://e2e.ti.com/f/791/t/1165996 systemd service TDA4VM 105 TDA4VM: How to move to Native Linux Driver on SDK 8.4 for J7 and DRA8 Devices https://e2e.ti.com/f/791/t/1166334/ Native linux Driver TDA4VM, TDA4VH, DRA821, Dra829 106 TDA4VM: How to run vision_apps with tisdk-tiny-image https://e2e.ti.com/f/791/t/1166419/ TinyFS/ Vision_apps TDA4VM 107 66AK2E05: Flashing UBI Image https://e2e.ti.com/f/791/t/1166986 Getting started Keystone 1/2 devices 108 TDA4VM: How to read the DDR frequency from Linux https://e2e.ti.com/f/791/t/1169373/ DDR Frequency TDA4VM/J72XX 109 SK-TDA4VM: How to reset the system using main domain watchdog https://e2e.ti.com/f/791/t/1170965/ Watchdog TDA4VM-SK 110 TMS320C6657: How to run the direct SPI-BOOT example on TI-C6657-EVM without IBL ? https://e2e.ti.com/f/791/t/1171336 Getting started Keystone 1/2 devices 111 TDA4VM: Steps for executing linux DSS on SDK https://e2e.ti.com/f/791/t/1173507/ Linux Display TDA4VM 112 TDA4VM: Steps for executing linux CSI on SDK https://e2e.ti.com/f/791/t/1173511/ CSI linux TDA4VM 113 TDA4VM: Run Capture - Display usecase on Linux in SDK https://e2e.ti.com/f/791/t/1173513/ Capture-Display Linux TDA4VM 114 66AK2E05: How to flash U-Boot and Linux kernel using Shell Scripts in Processor SDK Linux https://e2e.ti.com/f/791/t/1173917 Getting started Keystone 1/2 devices 115 TDA4VM: How to browse memory using CCS while running Linux. https://e2e.ti.com/f/791/t/1175628 CCS Linux TDA4VM 116 TDA4VM: Is HSFOSC1 external clock required https://e2e.ti.com/f/791/t/1176475 HFOSC TDA4VM 117 SK-TDA4VM: How do I connect the external debugger Blackhawk USB560v2 (XDS560v2) USB System Trace to the board? https://e2e.ti.com/f/791/t/1178240 Getting Started TDA4VM 118 66AK2H12: How to flash U-Boot and Linux kernel using Shell Scripts in Processor SDK Linux https://e2e.ti.com/f/791/t/1178305 Getting started Keystone 1/2 devices 119 66AK2H12: How to build and run the platform test on K2H EVM ? https://e2e.ti.com/f/791/t/1180070 Getting started Keystone 1/2 devices 120 66AK2E05: How to build and run the platform test on K2E EVM ? https://e2e.ti.com/f/791/t/1180154 Getting started Keystone 1/2 devices 121 TMS320C6678: How to build and run the IPC-SRIO example on C6678 EVM? https://e2e.ti.com/f/791/t/1180856 Getting started Keystone 1/2 devices 122 OSPI FAQ for K3 devices (Sitara/Jacinto) https://e2e.ti.com/f/791/t/1181116 OSPI Flash TDA4VM, DRA821 123 EVMK2GX: How to build, run and test the EMAC example on DSP core of K2G family processor https://e2e.ti.com/f/791/t/1181262 Getting started Keystone 1/2 devices 2021 FAQs # FAQ Title E2E link Domain SoC 1 PC emulation mode failing for TIDL apps https://e2e.ti.com/f/791/t/970994 PC Emulation TDA4 2 DRA71XEVM: RTSP streaming in DRA7xx for the 4.19 Kernel https://e2e.ti.com/f/791/t/985736 GST DRA7xx 3 Am6548: Linux SDK 7.1 fails to boot on PG 1.0 boards https://e2e.ti.com/f/791/t/972828 PSDKLA 7.1 Boot AM654 PG 1.0 4 AM6548: How to add more features to R5 SPL(tiboot3.bin) adhering to maximum size constraint https://e2e.ti.com/f/791/t/979713 u-boot/SPL TDA4/AM6548 5 TDA4VM: Linux DTS DTB FAQs e2e.ti.com/.../979569 Linux/DTS/DTB TDA4/AM6/TDA2/AM57 6 TDA4VM: OSPI0: Boot hang at A72 SPL with OSPI boot https://e2e.ti.com/f/791/t/979967 Linux/Boot/OSPI TDA4 7 [FAQ] TDA4VM: DRA829V: J721E: How to enable EHRPWM on J7 EVM using Linux e2e.ti.com/.../982074 Linux/EHRPWM TDA4/J721e/DRA8 8 DRA722: Steps to add EMMC early boot support in vision SDK 3.8 or PSDKLA 6 https://e2e.ti.com/f/791/t/982181 Vision SDK/PSDKLA/Linux DRA7xx 9 DRA722: Steps to add QSPI early boot support in vision SDK 3.8 or PSDKLA 6 https://e2e.ti.com/f/791/t/982196 Vision SDK/PSDKLA/Linux DRA7xx 10 TDA4VM: How to enable NFS boot? https://e2e.ti.com/f/791/t/984034 PSDKRA/NFS TDA4VM 11 AM654: How to configure 1GB DDR in u-boot? https://e2e.ti.com/f/791/t/984296 PSDKLA DDR AM6548 12 DRA821U: 5 port switch working with linux https://e2e.ti.com/f/791/t/983372 EthFW/CPSW DRA821/DRA829 13 How to change i2c instance for camera in vision apps? https://e2e.ti.com/f/791/t/986493 I2C/Camera TDA4/J721e/DRA8 14 J721e/J7200: How to change console to mcu_uart0 https://e2e.ti.com/f/791/t/988278 Console/UART TDA4/J721e/DRA829, J7200/DRA821 15 Build and Run drv/DSS example using SBL flow and using SPL flow https://e2e.ti.com/f/791/t/989328 DSS/SBL TDA4 16 Does AM65 support Ethernet Switch on Linux/RTOS https://e2e.ti.com/f/791/t/990441 ICSSG Switch AM65 17 Changing the UART port for EthFW https://e2e.ti.com/f/791/t/970699 EthFW TDA4 18 TSN support on CPSW https://e2e.ti.com/f/791/t/976842 CPSW TDA4 19 How to ensure that dependent module drivers are probed before depending driver https://e2e.ti.com/f/791/t/994670 Generic Linux driver probing - taking care of dependency TDA4/TDA2/AM5/AM6 20 TDA4VM: OSPI boot: TISCI config ring fail error with SDK 7.3 https://e2e.ti.com/f/791/t/995032 OSPI Booyt TDA4VM TDA4/J721e/J7200 21 PROCESSOR-SDK-TDAX: The PTK demos are failing in the Processor SDK 7.3 https://e2e.ti.com/f/791/t/995555 PTK Demo TDA4 22 DRA821U: How to change the frequency of A72 and R5F cores and disable one A72 core https://e2e.ti.com/f/791/t/997678 Bootloader DRA821/DRA892 23 How to configure ENET LLD and EthFW (CPSW) for MAC 2 MAC https://e2e.ti.com/f/791/t/998242 Ethernet FW DRA821/DRA829 24 Status of ICSSG on Jacinto devices https://e2e.ti.com/f/791/t/998593 ICSSG DRA821/DRA829 25 Building, linking and running PDK libraries, applications https://e2e.ti.com/f/791/t/998713 PDK DRA821/DRA829/AM65/AM57 26 How to disable unused ARM cores? https://e2e.ti.com/f/791/t/996960 Linux AM65 27 TDA4VM: How to view CPU and Memory Usage in QNX https://e2e.ti.com/f/791/t/1000001 QNX TDA2/3/4, DRA7/8 28 TDA4VM: QNX eMMC boot using SPL / Uboot https://e2e.ti.com/f/791/t/1000519 QNX eMMC TDA2/3/4, DRA7/8 29 AM57xx: Steps to modify DDR/RAM configurations for Custom boards. https://e2e.ti.com/f/791/t/1000823 DDR AM57xx 30 How to move function/API to specific section in RTOS? https://e2e.ti.com/f/791/t/1001673 SYSBIOS TDA4x 31 Modification of board library for customize Pinmux https://e2e.ti.com/f/791/t/1003411 Customer Board, PinMux TDA4x 32 How to change peripheral initialization from remote core firmware using board library? https://e2e.ti.com/f/791/t/1003416 Board lib TDA4x 33 Resolve conflict in resource access between remote core firmware and Linux https://e2e.ti.com/f/791/t/1003415 Customer Board, Integrated use-case, AutoSAR TDA4x 34 How to debug remote core firmware loaded from u-boot/SPL using CCS https://e2e.ti.com/f/791/t/1003421 Integrated use-case TDA4x 35 How to enable power for a module (CAN, ADC, etc..) from remote core firmware https://e2e.ti.com/f/791/t/1003426 Sciclient, Integrated usecase TDA4x 36 UNIFLASH error while flashing https://e2e.ti.com/f/791/t/1003418 UNIFLASH TDA4x 37 MCUSW demo on CAN along side Linux on A72 https://e2e.ti.com/f/791/t/1003429 CAN, Integrated usecase TDA4x 38 TDA4VM: Detailed Step for UART boot https://e2e.ti.com/f/791/t/1003471 UART Boot, U-boot TDA4x 39 TDA4VM: TDA4VM/DRA829V: routing PCIE reference clock externally https://e2e.ti.com/f/791/t/1004565 PCIe TDA4x 40 PROCESSOR-SDK-AM57X: How to boot from QSPI flash on AM57x https://e2e.ti.com/f/791/t/1005148 Boot, QSPI AM57 41 TCP/UDP support on J7 devices https://e2e.ti.com/f/791/t/1005255 TCP/UDP on J7 DRA821/DRA829 42 Unable to see CPSW 5G/9G interface on J7 devices https://e2e.ti.com/f/791/t/1008719 CPSW nG DRA821/DRA829 43 AM6548: Under linux, how to configure the device tree to enable the DPI display interface output of the am6548 chip https://e2e.ti.com/f/791/t/984666 PCIe AM65 44 How to capture different types/formats of camera from the single CSIRX port ? https://e2e.ti.com/f/791/t/1008936 CSIRX J721E 45 TDA4VM: Cddipc between mcu1_0(mcusw) and mcu2_1(vision_apps) based on SDK v7.3 https://e2e.ti.com/f/791/t/1008492 CDD IPC TDA4x 46 TDA4VM: Cddipc between mcu1_0(mcusw) and mcu2_1(mcusw) based on SDK v7.3 https://e2e.ti.com/f/791/t/1008498 CDD IPC TDA4x 47 DRA821U: change app_remoteswitchcfg_server log UART port https://e2e.ti.com/f/791/t/1010150 EthFW J7200 48 J7200XSOMXEVM: How to use the QSGMII expansion board with DRA821 SDK V7.3 https://e2e.ti.com/f/791/t/1010499 Ethernet J7200 49 Support for Panning and Zoom in the display node of OpenVX https://e2e.ti.com/f/791/t/1009550 Display J721E 50 TDA4VM: how to load MAIN core images from eMMC with boot_app https://e2e.ti.com/f/791/t/1010965 Boot app TDA4x 51 CPSW 5G/9G ALE User Guide https://e2e.ti.com/f/791/t/1011237 CPSW nG DRA821/DRA829 52 TDA4VM: Resource table for IPC https://e2e.ti.com/f/791/t/1012138 IPC resource table TDA4VM/DRA821 53 AM57xx-IDK: eMMC booting https://e2e.ti.com/f/791/t/997276 Boot AM57xx 54 How to enable RGMII on DRA821 https://e2e.ti.com/f/791/t/1013590 CPSW 5G DRA821 55 TDA4VM: NVME SSD initialization & commands https://e2e.ti.com/f/791/t/1014951 NVME SSD DRA829/J721e/TDA4VM 56 TDA4VM: IPC_Test on PSDK QNX 7.2 / PSDK QNX 7.3 https://e2e.ti.com/f/791/t/1015234 IPC TDA4VM 57 PROCESSOR-SDK-J7200: how to use SBL and boot system with rootfs on eMMC https://e2e.ti.com/f/791/t/1015344 SBL J7VCL 58 Supporting more than 32bit timestamp in the capture node https://e2e.ti.com/f/791/t/1016702 Capture Node TDA4x 59 How to enable lockstep for mcu_r5f in SPL and SBL? https://e2e.ti.com/f/791/t/1008069 R5F TDA4x 60 Enabling support for more than 1920 input resolution in Display https://e2e.ti.com/f/791/t/1016669 Display TDA4x 61 TDA4VM: How to configure 4266MTS DDR on 7.2 SDK https://e2e.ti.com/f/791/t/1016097 DDR Frequency TDA4VM 62 TDA4VM: How to request an EB Tresos license for MCUSW/MCAL https://e2e.ti.com/f/791/t/1018683 MCUSW TDA4VM, DRA821 63 How to change lane speed and number of lanes for DSI output? https://e2e.ti.com/f/791/t/1019565 DSI Display TDA4xVM 64 AM5729: Wrong address in AM572x_pad_config.gel for SYSCFG_PAD_I2C1_SDA/SCL https://e2e.ti.com/f/791/t/1019906 Boot AM57 65 Can CPSW 5G/9G be enabled under Uboot https://e2e.ti.com/f/791/t/1020853 CPSW 5G/9G, Uboot TDA4VM, DRA821 66 PROCESSOR-SDK-AM65X: How to boot using UART on AM65X? https://e2e.ti.com/f/791/t/1021784 Boot AM65 67 How to use DSS M2M for format conversion? https://e2e.ti.com/f/791/t/1007456 DSS TDA4x 68 AM57X: How to create CCS projects provided by SDK for CUSTOMBOARD. https://e2e.ti.com/f/791/t/1024461 CCS, PDK AM57 69 AM57X: UNIFLASH sequence for different QSPI part number? https://e2e.ti.com/f/791/t/1025270 Uniflash, QSPI AM57 70 TDA4VM: How to boot from QSPI? https://e2e.ti.com/f/791/t/1025985 QSPI Boot - U-boot TDA4 71 TDA4VM: PSDK QNX : Modifying ARM SCR_EL3 EA Bit https://e2e.ti.com/f/791/t/1026657 Boot, QNX TDA4 72 How to update Boot binaries SD card on the fly using UART https://e2e.ti.com/f/791/t/1026741 SD card updation TDA4/AM5/AM6 73 TDA4VM: The windows DFU tool and driver for TDA4 https://e2e.ti.com/f/791/t/1025354 Flashing TDA4/DRA821/DRA829 74 TDA4VM: On 7.3 SDK how to reduce DDR speed to 3733 MTS https://e2e.ti.com/f/791/t/1028163 DDR Speed TDA4 75 DRA821U: DRA829 : Guide to Do Board specific modifications for CPSW 5G/9G https://e2e.ti.com/f/791/t/1030243 CPSW 5G/9G, Board Configuration TDA4x, DRA821 76 TDA4VM: U-Boot Changes in SDK 8.0 Vs 7.3 https://e2e.ti.com/f/791/t/1031148 U-Boot changes in SDK 8.0 TDA4VM 77 How to provide different set of parameters in replicated node, like two look up table for LDC module https://e2e.ti.com/f/791/t/1032039 OpenVX TDA4VM 78 AM6548: CTRLMMR_WKUP_JTAGID register value for SR2.1 https://e2e.ti.com/f/791/t/1032107 JTAG AM65 79 How to move DMPAC to mcu2_0 core? https://e2e.ti.com/f/791/t/1035632 DMPAC TDA4VM 80 eDP firmware responds wrongly to some messages and thus causes display incompatibility. https://e2e.ti.com/f/791/t/1031275 Display TDA4VM 81 66AK2E05: How to generate the CCS PDK examples for K2E? https://e2e.ti.com/f/791/t/1040858 PDK Keystone 1/2 devices 82 TMS320C6657: How to generate the CCS PDK examples for C6657? https://e2e.ti.com/f/791/t/1040872 PDK Keystone 1/2 devices 83 TDA4VM: J721e/J7200: Enabling DFU Boot on 8.0 Linux SDK https://e2e.ti.com/f/791/t/1041155 DFU J7200/J721e 84 AM5748: AM57XX: MPU COUNTER_REALTIME saturates after several hundred days https://e2e.ti.com/f/791/t/1041234 i940 errata workaround implementation AM57xx 85 PRU_ICSSG: How to check and set PRU Core Frequency in CCS? https://e2e.ti.com/f/791/t/1041347 PRU, ICSSG AM65 86 TDA2PXEVM: How to create a mesh LUT for TDA2P/TDA3 LDC https://e2e.ti.com/f/791/t/1042074 LDC TDA2P 87 TMS320C6657: How to run the OOB demo on C6657 EVM? and What does the OOB demo constitutes? https://e2e.ti.com/f/791/t/1041989 PDK Keystone 1/2 devices 88 List of SDK available for the Keystone-I and II devices https://e2e.ti.com/f/791/t/1041987 SDK Keystone 1/2 devices 89 PROCESSOR-SDK-C665X: How to update the firmware of the inbuilt-XDS emulator on C6657 EVM? https://e2e.ti.com/f/791/t/1048033 CCS, Getting started Keystone 1/2 devices 90 PROCESSOR-SDK-C665X: How to re-build the PDK and SDK of PROCESSOR-SDK-C665X 6.3 for C6657? https://e2e.ti.com/f/791/t/1048039 SDK, Getting started Keystone 1/2 devices 91 TDA4VM: Is there a custom board bring up guide? https://e2e.ti.com/f/791/t/1047411 Board bring up guide TDA4/J721e/J7ES 92 PROCESSOR-SDK-K2E: Rootfs Image creation https://e2e.ti.com/f/791/t/1048639 SDK, Getting started Keystone 1/2 devices 93 PROCESSOR-SDK-C665X: IBL Build Steps on Windows 10 https://e2e.ti.com/f/791/t/1048640 SDK, Getting started Keystone 1/2 devices 94 PROCESSOR-SDK-C665X: IBL Build Steps on Linux (Ubuntu) https://e2e.ti.com/f/791/t/1048641 SDK, Getting started Keystone 1/2 devices 95 TDA4VM: How to change Linux kernel page size from default 64K in the SDK to 4K? https://e2e.ti.com/f/791/t/1035291 Linux kernel page size change TDA4/J721e/J7200 96 TDA4VM: Running Gateway Demo https://e2e.ti.com/f/791/t/1050416 Gateway-demos, CCS TDA4VM 97 SK-TDA4VM: Can somebody provide the PCB schematics and layout from sprr438 in Altium format? https://e2e.ti.com/f/791/t/1050931 SK, EVM TDA4-SK 98 TMS320C6678: TSIP on C667x device https://e2e.ti.com/f/791/t/1057046 SDK, Getting started Keystone 1/2 devices 99 TMS320C6657: How to build and run the IPC example on C6657 EVM? https://e2e.ti.com/f/791/t/1057447 SDK, Getting started Keystone 1/2 devices 100 TMS320C6657: How to flash the IBL ( Intermediate Boot loader ) into EEPROM and how to flash the application binary into NOR? How to boot the IBL + Application binary? https://e2e.ti.com/f/791/t/1057566 SDK, Getting started Keystone 1/2 devices 101 66AK2E05: How to run the UART example on the K2E EVM ( ARM core ) https://e2e.ti.com/f/791/t/1058020 SDK, Getting started Keystone 1/2 devices 102 66AK2E05: How to run the GPIO-LED example on the K2E EVM ( ARM core ) ? https://e2e.ti.com/f/791/t/1058015 SDK, Getting started Keystone 1/2 devices 103 PROCESSOR-SDK-TDAX: Flip/Mirror support in the display node https://e2e.ti.com/f/791/t/1058318 DSS TDA4x 104 C665x, C667x, K2E and K2H: IPC build in RTOS Processor SDK https://e2e.ti.com/f/791/t/1058830 SDK, Getting started Keystone 1/2 devices 105 TDA4VM: How to test GPIO Interrupts https://e2e.ti.com/f/791/t/1058595 GPIO TDA4/J721e/J7VCL/J7AEP 106 TDA4VM: How to enable Inline ECC for > 2G https://e2e.ti.com/f/791/t/1058618 DDR TDA4 107 TDA4VM: How to remove codec dependency in Vision Apps https://e2e.ti.com/f/791/t/1029556 PDK TDA4x 108 TDA4VM: How to create a LDC mesh LUT for fisheye distortion correction on TDA4? https://e2e.ti.com/f/791/t/1058565 LDC TDA4x 109 TDA4VM: How to read on-die temperatures on J7 family of SoCs using Linux https://e2e.ti.com/f/791/t/1060764 Linux /VTM/Temperature J7 Family - TDA4VM/J721e/J7200 110 TDA4VM: HS: Building & booting on HS devices on latest Linux SDK https://e2e.ti.com/f/791/t/1061584 Linux, HS J7 Family 111 TDA4VM: GPIO+DMA Trigger in TDA4 and test in SDK7.1 https://e2e.ti.com/f/791/t/1061801 GPIO +DMA TDA4 TDA4vx 112 TMS320C6678: How to run NIMU-EMAC client example on C6678 EVM https://e2e.ti.com/f/791/t/1062580 NIMU EMAC Keystone 1/2 devices 113 TMS320C6678: How to create "Target configuration" and do "Test connection" on C6678 EVM https://e2e.ti.com/f/791/t/1062584 Getting started Keystone 1/2 devices 114 TMS320C6678: How to load and run the gel file on C6678 EVM? https://e2e.ti.com/f/791/t/1062598 Getting started Keystone 1/2 devices 115 TDA4VM: Porting a PDK Driver to an AUTOSAR Environment https://e2e.ti.com/f/791/t/1062771 AutoSAR, PDK TDA4 116 TMS320C6657: How to create "Target configuration" and do "Test connection" on C6657 EVM https://e2e.ti.com/f/791/t/1064425 Getting started Keystone 1/2 devices 117 TMS320C6657: How to load and run the DSP gel file on C6657 EVM https://e2e.ti.com/f/791/t/1064429 Getting started Keystone 1/2 devices 118 66AK2E05: How to create "Target configuration" and do "Test connection" on K2E EVM. https://e2e.ti.com/f/791/t/1064431 Getting started Keystone 1/2 devices 119 66AK2E05: How to load and run the ARM gel file on K2E EVM https://e2e.ti.com/f/791/t/1064437 Getting started Keystone 1/2 devices 120 66AK2E05: How to load and run the DSP gel file on K2E EVM https://e2e.ti.com/f/791/t/1064433 Getting started Keystone 1/2 devices 121 TDA4VM: Not able to receive messages for a particular CAN ID, how to debug? https://e2e.ti.com/f/791/t/1065173 CAN TDA4 122 Large size of tispl.bin after integrating DM firmware https://e2e.ti.com/f/791/t/1065187 u-boot, DM firmware TDA4 2020 FAQs 1 TDA4VM: Different ways to load an RTOS or Baremetal application along with Linux https://e2e.ti.com/f/791/t/915474 R5 Firmware, Integrated usecase TDA4 2 TDA4VM: makefile based project which shows A72, C7x, R5F setup along with IPC and buffer passing between Linux+RTOS https://e2e.ti.com/f/791/t/909695 IPC, Vision Apps TDA4 3 TDA4VM: How do I reduce the size of the Yocto filesystem to meet my needs https://e2e.ti.com/f/791/t/915887 Yocto TDA4 4 TDA4VM/DRA829/AM65xx: Linux: Configuring GPIOs https://e2e.ti.com/f/791/t/918654 GPIO, Linux TDA4 5 TDA4VM: CAN: How is bit-rate calculated for CAN https://e2e.ti.com/f/791/t/920090 CAN, AUTOSAR TDA4 6 TDA4VM: How can I use CAN on Linux https://e2e.ti.com/f/791/t/922168 CAN, Linux TDA4 7 TDA4VM: Routing interrupts via the interrupt router e2e.ti.com/.../931985 Interrupt routers TDA4 8 TDA4VM: How to debug from Linux command line https://e2e.ti.com/f/791/t/935342 Debug TDA4 9 DRA829V/TDA4VM: How can I check if cache is enabled or not for R5F https://e2e.ti.com/f/791/t/949471 Cache, R5F TDA4 10 TDA4VM: How to check if R5F is in lock-step or split mode https://e2e.ti.com/f/791/t/966564 R5F TDA4 11 TDA4VM: How can I load remote core firmware from OSPI https://e2e.ti.com/f/791/t/950919 R5 Firmware, OSPI TDA4 12 TDA4VM: How to modify offsets for boot binaries in eMMC https://e2e.ti.com/f/791/t/950948 eMMC, u-boot TDA4 13 TDA4VM: How can I confirm primary and secondary boot mode on custom board https://e2e.ti.com/f/791/t/950946 Bootmodes TDA4 14 TDA4VM: Application in the PSDKRA runs standalone from SBL but doesn't run alongside Linux https://e2e.ti.com/f/791/t/931992 Integrated usecase TDA4 15 TDA4VM: How to load firmware using R5 SPL from eMMC https://e2e.ti.com/f/791/t/944099 R5 Firmware TDA4 16 TDA4VM: How to read on-die temperature? https://e2e.ti.com/f/791/t/922224 PSDKRA, Thermal support TDA4 17 J6:TDA2x: How to read on-die temperature? https://e2e.ti.com/f/791/t/932988 Vision SDK, Thermal TDA2 18 TDA4VM: Pinmux Guide for Jacinto Processors https://e2e.ti.com/f/791/t/927526 PSDKLA/PSDKRA - Pinmux TDA4 19 TDA4VM: How to view c6x trace buffer from Linux? https://e2e.ti.com/f/791/t/931381 PSDKLA/PSDKRA TDA4 20 TDA4VM: Custom TDA4VM Boot stuck at A72 SPL: "spl: mmc init failed with error: - 110" https://e2e.ti.com/f/791/t/943299 PSDKLA - Boot TDA4 21 TDA4VM: How to use SPI/SPI_DEV on TDA4/J721E? https://e2e.ti.com/f/791/t/947437 PSDKLA SPI TDA4 22 TDA4: How to boot to u-boot using eMMC https://e2e.ti.com/f/791/t/886980 PSDKLA u-boot TDA4 23 TDA4: How do I determine the GPIO number within linux for a pin within the schematic? https://e2e.ti.com/f/791/t/948888 PSDKLA/RA Linux TDA4 24 AM57xx-IDK Supported boot modes https://e2e.ti.com/f/791/t/959283 AM57xx LInux SDK/ Boot AM57 25 TDA4VM: How to enable RTC on Jacinto TDA4x EVM? https://e2e.ti.com/f/791/t/959163 TDA4/RTC TDA4 26 Firewalls in TDA4 (udb0393778.dhcp.ti.com/.../, TIFS - Firewall Module - v6.pptx) https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/firewall_faq.html Firewalls 27 PROCESSOR-SDK-DRA8X-TDA4X: How to use eMMC based filesystem on PSDKQA release? https://e2e.ti.com/f/791/t/922567 QNX, eMMC TDA4 28 TDA4VM: How to do a run time logging of events in an OpenVX application? https://e2e.ti.com/f/791/t/930770 Performace TDA4 29 PROCESSOR-SDK-DRA8X-TDA4X: Multi channel processing in OpenVX https://e2e.ti.com/f/791/t/920477 OpenVx TDA4 30 TMDX654GPEVM: mksdboot.sh of PROCESSOR-SDK-LINUX-AM65X 07_00_00_08 doesn't work https://e2e.ti.com/f/791/t/923047 SDK (AM65) AM65 31 Yocto build error for recipe iso-codes in PSDKLA_07.00.00.04 https://e2e.ti.com/f/791/t/924508 Yocto TDA4 32 PROCESSOR-SDK-DRA8X-TDA4X: OpenVX application hangs with pipelining https://e2e.ti.com/f/791/t/924559 OpenVx TDA4 33 TDA4VM: How to get CPSW9G virtual interface functional on TDA4x/DRA8x SDK versions 7.0 onward? https://e2e.ti.com/f/791/t/929577 CPSW9G TDA4 34 DRA829VXEVM: Is it possible to connect two DRA829 EVMs via SGMII https://e2e.ti.com/f/791/t/936840 SGMII TDA4 35 DRA829V: How do I find documentation for Linux Kernel device tree files https://e2e.ti.com/f/791/t/937619 Platform (Linux) TDA4 36 TDA2x: How To – Modify 512MB Bios Memory map to 1GB Bios Memory map in vision SDK? https://e2e.ti.com/f/791/t/930225 Vision SDK TDA2 37 TDA2x: How can I set the IPU1_0 as the Primary core in Vision SDK? https://e2e.ti.com/f/791/t/929873 Vision SDK TDA2 38 TDA2x: Multi channel support for NullSrc link running on A15 Linux in vision SDK https://e2e.ti.com/f/791/t/930379 Vision SDK TDA2 39 TDA2x: How to flash images to the QSPI memory from the u-boot prompt in vision SDK Linux? https://e2e.ti.com/f/791/t/931314 Vision SDK, QSPI TDA2 40 TDA2x: What are the steps to create our own custom usecase containing custom Algorithm plugin in Vision SDK bios? https://e2e.ti.com/f/791/t/932998 Vision SDK TDA2 41 TDA2E: How to do profiling in the Vision SDK https://e2e.ti.com/f/791/t/942557 Vision SDK TDA2 42 TDA2E: How to link the static library in the Vision SDK bios https://e2e.ti.com/f/791/t/942575 Vision SDK TDA2 43 TDA2E: Failed to request_mem_region(0xa9000000, 0x4000000) in Vision SDK https://e2e.ti.com/f/791/t/942639 Vision SDK TDA2 44 How to detect erroneous input frame in VIP? https://e2e.ti.com/f/791/t/931974 VIP TDA4 45 How to run multi-cam usecase for YUV sensors? https://e2e.ti.com/f/791/t/931988 Multi-cam, YUV TDA4 46 How to configure DSS for BT656 or BT1120 output format? https://e2e.ti.com/f/791/t/931993 DSS, BT656, BT1120 TDA4 47 How to connect CAL to VIP on TDA2Px? https://e2e.ti.com/f/791/t/932390 CAL, VIP TDA2 48 TDA4VM: how to configure C7x DSP frequency to match different TDA4VM variant https://e2e.ti.com/f/791/t/928867 Board TDA4 49 PROCESSOR-SDK-DRA8X-TDA4X: How to use IPC Example Application Echo Test on PSDKQA7.0 https://e2e.ti.com/f/791/t/932825 IPC, QNX TDA4 50 PROCESSOR-SDK-DRA8X-TDA4X: Ethernet LLD replacing CPSW LLD https://e2e.ti.com/f/791/t/935547 CPSW, Ethernet TDA4 51 PROCESSOR-SDK-AM65X: [FAQ] PROCESSOR-SDK-AM65x: Ethernet LLD replacing EMAC LLD https://e2e.ti.com/f/791/t/935569 CPSW, Ethernet AM65 52 How to flash OSPI using CCS & JTAG interface https://e2e.ti.com/f/791/t/942139 OSPI Flashing TDA4 53 How to change display resolution in vision apps https://e2e.ti.com/f/791/t/942679 Display TDA4 54 Getting traces on Lauterbach using DCC https://e2e.ti.com/f/791/t/949218 Lauterbach/DCC TDA4 55 Is there a guide to choosing the right OSPI Flash parts that are supported on Jacinto 7? https://e2e.ti.com/f/791/t/946418 OSPI TDA4 56 How to add new memory section in vision apps https://e2e.ti.com/f/791/t/943406 Vision Apps TDA4 57 How to enable DMA in OSPI and improve OSPI read performance in SBL and BootApp? https://e2e.ti.com/f/791/t/946654 OSPI, SBL, BootApp TDA4 58 TDA2SX: How do I configure the H.264 Encoder Constant Bit Rate (CBR) and Variable Bit Rate (VBR) on IVAHD? https://e2e.ti.com/f/791/t/948856 Codec TDA2 59 TDA4VM: How to resolve Yocto build failure while trying to fetch repository? https://e2e.ti.com/f/791/t/948986 Yocto TDA4 60 How to flip images on TDA2x/TDA3x/TDA4x? https://e2e.ti.com/f/791/t/949154 Display TDA4, TDA3, TDA2 61 How to change output to vout1 in vision apps https://e2e.ti.com/f/791/t/949461 Display TDA4 62 Sometime Gstreamer video is not displaying in monitor when I used waylandsink https://e2e.ti.com/f/791/t/954092 Gstreamer, Display TDA2 63 Sometime Gstreamer video is not displaying in monitor when I used kmssink https://e2e.ti.com/f/791/t/954097 Gstreamer, Display TDA2 64 how to use QT & wayland in VissionApp? https://e2e.ti.com/f/791/t/950630 Display TDA4 65 How to enable third display ie TIVX_TARGET_DISPLAY3 in vision apps? https://e2e.ti.com/f/791/t/954679 Display TDA4 66 How to build spl, uboot for HS device https://e2e.ti.com/f/791/t/958666 uboot-spl TDA4 67 The steps to enable the early-boot late attach use-case in vision SDK 3.7 Linux https://e2e.ti.com/f/791/t/959989 Vision SDK TDA2 68 How to determine if IVAHD can be used for a certain resolution and also how many instances can be supported for that resolution? https://e2e.ti.com/f/791/t/961127 Codec TDA2x, TDA3x, AM57xx 69 The steps to enable the early-boot late attach use-case in vision SDK 3.8 Linux https://e2e.ti.com/f/791/t/961647 Vision SDK TDA2 70 How to build sysfw.itb for HS device https://e2e.ti.com/f/791/t/963964 sysfw TDA4 Excel sheet for better searchability - /cfs-file/__key/communityserver-discussions-components-files/791/4834.e2e_2D00_faqs_2D00_apps.xlsx Last Sync: 10th Jan, 2024 + diff --git a/data2/text/range/5001-10000/1000532.txt b/data2/text/range/5001-10000/1000532.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff8cd5abe30248ae0b1e04924a1555347c0e6c1b --- /dev/null +++ b/data2/text/range/5001-10000/1000532.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EXEVM: Communication with another SPI slave + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi, Can you please give some directions on how to share the TDA2 SPI Master (there are 4 SPI Modules that can be Master where each module has support for 4 Slaves (4 CS))? There is an API in Utils_mcspi.c that I am looking at as a reference. Upon boots, the Radar SDK initializes 4 SPI instances using channel 0 (CS0) to set up SPI communications with the 4 attached AWRs. My questions are as follows: 1. Why is it not necessary to call Utils_mcspiOpen() during AWR Init? 2. Why static Utils_mcspiDeviceCommObj gUtils_mcspiDeviceCommObj[UTILS_MCSPI_NUM_DEVICES]; where UTILS_MCSPI_NUM_DEVICES = 8? I thought there are 4 SPI modules only. 3. In my application where I share SPI Module0 using CS1 to communicate with my slave device, I called the Utils_mcspiOpen() specifying the deviceId = 0, mcSpiDevInstNum = 0, mcSpiChannelNum = 1. This resulted in a crash during boot. Debugged into it said the FIFO has already been in use. 4. The thought in calling Utils_mcspiOpen() was because the SPI 4 instances have already been initialized during AWRs setup. I assume I need to call Open() before calling Utils_mcspiRead()/Write(). Thank you in advance, + +Responses: +Hi, Each McSPI can support up to 4 Master but only 1 Slave. 1. SPI is needed for configuration so as long as it is called before radar configuration step, it is fine. 2. UTILS_MCSPI_NUM_DEVICES is just a number to limit the total number of external devices which can be connected to SPIx, not number of SPI modules. It is just a number we picked. Each McSPI as master can connect up to 4 devices. 3. deviceId is the index of the radar devices, not mcspi instance id. If you already have one radar with CS0 on McSPI1 (mcspi instance 0), this would be deviceId =1. 4. _Init() then _open() to get handle. After that, use the handle to call read/write. Regards, Stanley + +Hi Stanley, Thanks for the clarifications. Got a bit further. We need a bit more clarity to get this working. 1. is mcSpiChannelNum in Utils_mcspiOpen() the same as ChipSelect? If not, don't I need to specify the CS# on the mcSpi module? 2. I now called Utils_mcspiInit(1) and then called Utils_mcspiOpen(1, 0, 1, edmaHandle) to get a valid SPI handle. This resulted in a UTILS_MCSPI: McSPI GIO Create Failed!! on the console. After it crashed. 3. So looks like we still don't completely understand the API usage. Thanks, + +Any Suggestions? + +Hi Asher, I am not sure I follow what you are trying to implement here. Are you using radar driver in SDK? If yes, radar SPI driver is implemented in ~/pdk_xx_xx_xx_xx/packages/ti/drv/vps/src/devices/radar_ar12xx/src/bspdrv_ar12xxMcspiCfgPriv.c. Only Utils_mcspiInit() is called from use case to add the McSPI instace to GIO device and configure crossbar for interrupt. The instance will be opened later by radar SPI driver in PDK. To configure radar, we use radar APIs from rl_sensor.c in ~/mmwave_dfp/ti/control/mmwavelink/src/rl_sensor.c, which has the callback hooked to radar SPI driver. We don't directly call McSPI APIs from use case since SPI protocol is implemented by radar link layer. Regards, Stanley + +In addition, please note that Utils_mcspiInit(UInt32 mcSpiInstNum) where mcSpiInstNum = 0 (McSPI1), 1 (McSPI2), 2... + +Hi Stanley, Sorry for the confusion. Let me start this over again. We would like to use (configure) one of the 4 mcSPI modules on the TDA2 to communicate with a SPI slave device. Please provide steps on how that can be done. We went thru the utils_mcspi.c in radar SDK thinking that that's the API we should be using as awr12xx configuration is using that utils API to configure AWR. We read the TDA2 datasheet and it indicated that each MCSPI module can support 4 slave. Is this not the case? I think you briefly stated that "Each McSPI can support up to 4 Master but only 1 Slave". Does that mean we cannot use SPI to talk to our external device over SPI? If this is true, then case close. SPI is not the solution. If mcSPI module can be used, then please provide instructions on how to add a SPI slave to an mcSPI module using chip select knowing that each mcSPI module is a Master to each slave AWR. Thanks, --Khai + +Khai Trinh said: We read the TDA2 datasheet and it indicated that each MCSPI module can support 4 slave. Is this not the case? What I meant was when McSPI is the master, it can support up to 4 slave devices with 4 CSn. So, yes, each McSPI module as master can connect to 4 slaves. Which external SPI slave device are you connecting to? Radar or something else? If it is radar, why don't you use our radar SPI driver? Regards, Stanley + +Another SPI slave device. Please provide step-by-step instructions on how to configure it. i have tried Uitls_mcSPI.c API. If you go back to my questions below: Thanks for the clarifications. Got a bit further. We need a bit more clarity to get this working. 1. is mcSpiChannelNum in Utils_mcspiOpen() the same as ChipSelect? If not, don't I need to specify the CS# on the mcSpi module? 2. I now called Utils_mcspiInit(1) and then called Utils_mcspiOpen(1, 0, 1, edmaHandle) to get a valid SPI handle. This resulted in a UTILS_MCSPI: McSPI GIO Create Failed!! on the console. After it crashed. 3. So looks like we still don't completely understand the API usage. Thanks, --Khai You gave some hint on i + +Hi Stanley, Just want to follow on this topic. Can you please advice... The current setup in the SDK is each mcSPI module is a Master on processor side with an AWR as a slave. So 4 mcSPI modules pairing with 4 AWR slaves. That part I don't have to do anything. It's all working as is. Now I need to add another SPI slave device to 1 of the 4 Master. So we need to configure a ChipSelect on the Master side. How that can be done thru the Utils_mcSPI.c API is really my question. I have tried a few things I described above without any luck. If you have an answer, please describe it here so I can try it out. For something like this, a conf call can be much more productive. Thanks, + +Hi, Ok. It makes more sense now. 1. You don't have to call Utils_mcspiInit(instId) again because each instance only needs to be initialized once. Since you are using one of the instances which is used by radar, it is already called in ChainsCommon_ar12xxInit(). Make sure you open SPI channel only after ChainsCommon_ar12xxInit(). 2. FIFO mode can be enabled on only one channel per McSPI instance. Utils_mcspiOpen() keeps track of it in its scope. However, Radar driver enables FIFO mode in its own open call outside of Utils_mscpiOpen(). For your use case to work, you have to disable FIFO mode in Utils_mcspiOpen(). You can change the below line in Utils_mcspiOpen() to 1 to disable FIFO mode. static UInt32 fifoEnabled[UTILS_MCSPI_NUM_MCSPI_INST] = {1U, 1U, 1U, 1U}; Please give this a try and see if it works. Regards, Stanley + diff --git a/data2/text/range/5001-10000/1005841.txt b/data2/text/range/5001-10000/1005841.txt new file mode 100644 index 0000000000000000000000000000000000000000..c24a6b0e0f0756576feab36c80d94eca78060afb --- /dev/null +++ b/data2/text/range/5001-10000/1005841.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2PXEVM: TIDL Import Tool and Inference on the TDA2Px EVM + +Query Text: +Part Number: TDA2PXEVM Hello, I am trying to run custom deep learning models on the TDA2Px EVM. As I understand, in order to run Deep Learning models on the board, TIDL library is used. The TIDL import tool generates binary files that represent the network and parameters of the model. What I also understand from this step is that the tool translates the input model from a framework like TensoFlow to a format that can be executed on DSP and EVE cores. When I tried to understand how to use the generated files for inference on the board, I found section 3.3.4 (Building the Test Application Executable through GMAKE) in the TIDL library which discusses how to load the .out files of the sample test application on the DSP and EVE cores using Code Compuser Studio (CCS). I want to understand these points: - What is the link between the TIDL import tool output binary files and building the .out files (dsp_test_dl_algo.out and dsp_test_dl_algo.out) for inference on the board ? The user guide states that for building the sample test application project I should execute the command (gmake CORE=dsp all) for DSP and (gmake CORE=eve all) for EVE. What about a different custom model ? What changes should I make and how to link the translated model by the TIDL import tool in order to build the (dsp_test_dl_algo.out and eve_test_dl_algo.out) files for my custom model? - Is there a way to run the .out files on the board without using CCS ? I want to run the models on the board using only a terminal, is it possible ? - Is there a specific OS that should be installed on an SD card for booting the board to run TIDL applications ? - I am facing some issues for setting a stable workflow for model deployment on TDA2PX EVM. I usually have custom trained deep learning models in TensorFlow and I am trying to deploy those models on the TDA2Px EVM. If there are any documentations or tutorials in addition to the provided user guides, please let me know. Thanks, Ahmed Anwar + +Responses: +Hi Ahmed Anwar, 1. There is no dependency on "TIDL import tool output binary files" for building the .out files, these bin files are input which you need to specify in the infer config file. 2. Yes, you can run TIDL on the board without CCS, for that refer to TIDL OD usecase in the Vision SDK. 3. No, just follow the steps in Vision SDK user guide. 4. Refer to TIDL usecases section in the Vision SDK user guide. Overall, you can run TIDL on the board without CCS by using TIDL usecases, I would recommend to run the existing usecase as is first and once it is working then replace the "params" and "net" binary files in the SD card with your bin files and run. You can also refer to below e2e thread to import and run our pre-trained SSD model in the TIDL OD usecase. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/689617/tda2-how-to-run-ssd-based-tidl-od-use-case-in-vision-sdk-with-pre-trained-model Thanks, Praveen + +Hi Praveen, Thank you for your reply. I would like to understand these points: - What is the usage of the .out files (dsp_test_dl_algo.out and dsp_test_dl_algo.out) ? As I understand, I need only the network and parameters .bin files for running a model on the board using TIDL usecases.Would you please let me know what the usage of the .out files is ? Do I need them or just I need the .bin files ? - In the Vision SDK TIDL User Guide, in section 5 "Build and Run TIDL Object detect use case", these statements are present: "The TIDL Object detect use case is enabled and runs on TDA2XX SoC only." "Build the Vision SDK for TDA2XX BIOS configuration choosing the ‘MAKECONFIG?=tda2xx_evm_bios_all’ in the Rules.make." "Please refer to the ‘VisionSDK_UserGuide_TDA2xx.pdf’ for steps on building and running the Vision SDK." I am using TDA2PX, not TDA2XX. Does this mean that I can not run TIDL models and usecases on TDA2PX ? If TDA2PX supports TIDL usecases, should I follow "VisionSDK_UserGuide_TDA2xx.pdf" as stated or "VisionSDK_UserGuide_TDA2px.pdf’" ? Thanks, Ahmed Anwar + +Hi, >> What is the usage of the .out files (dsp_test_dl_algo.out and dsp_test_dl_algo.out) ? These .out files are required to when you connect the board to CCS and run TIDL on CCS based setup, but if you want to run TIDL without CCS then these .out files are not required. >> I am using TDA2PX, not TDA2XX. Does this mean that I can not run TIDL models and usecases on TDA2PX ? No, you can run TIDL models and usecases on TDA2PX, please refer to "VisionSDK_UserGuide_TDA2px.pdf" file. FYI, many customers were successfully able to run TIDL usecases on TDA2PX, you can search in the e2e for those threads as reference. I have shared few threads https://e2e.ti.com/support/processors-group/processors/f/processors-forum/867915/tidl_od-usecase-on-tda2px?tisearch=e2e-sitesearch&keymatch=TDA2PX# https://e2e.ti.com/support/processors-group/processors/f/processors-forum/714606/linux-tda2pxevm-issue-in-running-vision-sdk-demo-application-on-tda2px?tisearch=e2e-sitesearch&keymatch=TDA2PX# Thanks, Praveen + +Does That mean I Can't Run TIDL use cases on Vision SDK Linux or in other words I must use the "MAKECONFIG?=tda2Px_evm_bios_all" configration but I can't use the "MAKECONFIG?=tda2xx_evm_linux_all" configuration? Thanks, Kirollos Henry + +You can but you have to set OPENVX_INCLUDE=y in ~/vision_sdk/apps/configs/tda2px_evm_linux_all/cfg.mk. + +Thank you so much I was able to Solve that issue Best Regards, Kirollos Henry + diff --git a/data2/text/range/5001-10000/1013431.txt b/data2/text/range/5001-10000/1013431.txt new file mode 100644 index 0000000000000000000000000000000000000000..09ee13fc40ed520b39e6530623dfe1754c9ca427 --- /dev/null +++ b/data2/text/range/5001-10000/1013431.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2PXEVM: roscore run error on my TDA2Px-EVM due to python version + +Query Text: +Part Number: TDA2PXEVM Hi all, I am trying to run ROS on my TDA2Px-EVM so, I have done this clone: git clone git://arago-project.org/git/projects/oe-layersetup.git tisdk Then this configuration and build: ./oe-layertool-setup.sh -f configs/processor-sdk/processor-sdk-06.03.00.106-config.txt cd build . conf/setenv export TOOLCHAIN_PATH_ARMV7=$HOME/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf export TOOLCHAIN_PATH_ARMV8=$HOME/gcc-arm-8.3-2019.03-x86_64-aarch64-linux-gnu MACHINE=dra7xx-evm bitbake arago-base-tisdk-image This Arago project was running just fine. Then I went to the meta-ros layer and created that file in recipes-core/images: require recipes-core/images/arago-base-tisdk-image.bb export IMAGE_BASENAME = "ros-base-image" DESCRIPTION = "An image with packagegroup-ros-world installed" IMAGE_INSTALL = "packagegroup-core-boot ${CORE_IMAGE_EXTRA_INSTALL}" IMAGE_LINGUAS = " " LICENSE = "MIT" inherit core-image IMAGE_ROOTFS_SIZE = "8192" IMAGE_INSTALL += "packagegroup-ros-world" And named that file ros-base-image.bb Then I ran that build command: MACHINE=dra7xx-evm bitbake ros-base-image This build finished with no errors And I also was able to boot the board with no issues When the board Started I exported these variables: export ROS_ROOT=/opt/ros export ROS_DISTRO=indigo export ROS_PACKAGE_PATH=/opt/ros/indigo/share export PATH=$PATH:/opt/ros/indigo/bin export LD_LIBRARY_PATH=/opt/ros/indigo/lib export PYTHONPATH=/opt/ros/indigo/lib/python3.5/site-packages export ROS_MASTER_URI=http://localhost:11311 export CMAKE_PREFIX_PATH=/opt/ros/indigo touch /opt/ros/indigo/.catkin When I try to run roscore I got an error no module named xmlrpc as if it is trying to run for python2 and not python3 although the one installed is python3 I spent a couple of days trying to solve this but I am always having same error. And also I was not able to follow that guide: https://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/wiki/Processor%20SDK%20Linux%20Automotive%20Software%20Developers%20Guide%20-%20Texas%20Instruments%20Wiki.pdf Because my machine is running on ubuntu 18 and this guide required ubuntu 14 host machine Thank you so much. Best regards, Kirollos Henry I have done this clone: git clone git://arago-project.org/git/projects/oe-layersetup.git tisdk Then this configuration and build: ./oe-layertool-setup.sh -f configs/processor-sdk/processor-sdk-06.03.00.106-config.txt cd build . conf/setenv export TOOLCHAIN_PATH_ARMV7=$HOME/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf export TOOLCHAIN_PATH_ARMV8=$HOME/gcc-arm-8.3-2019.03-x86_64-aarch64-linux-gnu MACHINE=dra7xx-evm bitbake arago-base-tisdk-image This Arago project was running just fine. Then I went to the meta-ros layer and created that file in recipes-core/images: require recipes-core/images/arago-base-tisdk-image.bb export IMAGE_BASENAME = "ros-base-image" DESCRIPTION = "An image with packagegroup-ros-world installed" IMAGE_INSTALL = "packagegroup-core-boot ${CORE_IMAGE_EXTRA_INSTALL}" IMAGE_LINGUAS = " " LICENSE = "MIT" inherit core-image IMAGE_ROOTFS_SIZE = "8192" IMAGE_INSTALL += "packagegroup-ros-world" And named that file ros-base-image.bb Then I ran that build command: MACHINE=dra7xx-evm bitbake ros-base-image This build finished with no errors And I also was able to boot the board with no issues When the board Started I exported these variables: export ROS_ROOT=/opt/ros export ROS_DISTRO=indigo export ROS_PACKAGE_PATH=/opt/ros/indigo/share export PATH=$PATH:/opt/ros/indigo/bin export LD_LIBRARY_PATH=/opt/ros/indigo/lib export PYTHONPATH=/opt/ros/indigo/lib/python3.5/site-packages export ROS_MASTER_URI=http://localhost:11311 export CMAKE_PREFIX_PATH=/opt/ros/indigo touch /opt/ros/indigo/.catkin When I try to run roscore I got an error no module named xmlrpc as if it is trying to run for python2 and not python3 although the one installed is python3 I spent a couple of days trying to solve this but I am always having same error. And also I was not able to follow that guide: https://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/wiki/Processor%20SDK%20Linux%20Automotive%20Software%20Developers%20Guide%20-%20Texas%20Instruments%20Wiki.pdf Because my machine is running on ubuntu 18 and this guide required ubuntu 14 host machine Thank you so much. Best regards, Kirollos Henry I have done this clone: git clone git://arago-project.org/git/projects/oe-layersetup.git tisdk Then this configuration and build: ./oe-layertool-setup.sh -f configs/processor-sdk/processor-sdk-06.03.00.106-config.txt cd build . conf/setenv export TOOLCHAIN_PATH_ARMV7=$HOME/gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf export TOOLCHAIN_PATH_ARMV8=$HOME/gcc-arm-8.3-2019.03-x86_64-aarch64-linux-gnu MACHINE=dra7xx-evm bitbake arago-base-tisdk-image This Arago project was running just fine. Then I went to the meta-ros layer and created that file in recipes-core/images: require recipes-core/images/arago-base-tisdk-image.bb export IMAGE_BASENAME = "ros-base-image" DESCRIPTION = "An image with packagegroup-ros-world installed" IMAGE_INSTALL = "packagegroup-core-boot ${CORE_IMAGE_EXTRA_INSTALL}" IMAGE_LINGUAS = " " LICENSE = "MIT" inherit core-image IMAGE_ROOTFS_SIZE = "8192" IMAGE_INSTALL += "packagegroup-ros-world" And named that file ros-base-image.bb Then I ran that build command: MACHINE=dra7xx-evm bitbake ros-base-image This build finished with no errors And I also was able to boot the board with no issues When the board Started I exported these variables: export ROS_ROOT=/opt/ros export ROS_DISTRO=indigo export ROS_PACKAGE_PATH=/opt/ros/indigo/share export PATH=$PATH:/opt/ros/indigo/bin export LD_LIBRARY_PATH=/opt/ros/indigo/lib export PYTHONPATH=/opt/ros/indigo/lib/python3.5/site-packages export ROS_MASTER_URI=http://localhost:11311 export CMAKE_PREFIX_PATH=/opt/ros/indigo touch /opt/ros/indigo/.catkin When I try to run roscore I got an error no module named xmlrpc as if it is trying to run for python2 and not python3 although the one installed is python3 I spent a couple of days trying to solve this but I am always having same error. And also I was not able to follow that guide: https://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/6_00_00_03/exports/wiki/Processor%20SDK%20Linux%20Automotive%20Software%20Developers%20Guide%20-%20Texas%20Instruments%20Wiki.pdf Because my machine is running on ubuntu 18 and this guide required ubuntu 14 host machine Thank you so much. Best regards, Kirollos Henry + +Responses: +Hi Kirollos, We will get back to you in couple of days. Thanks for your patience. Best Regards, Keerthy + +Kirollos, There are two main questions in your post. -1- Issue with running roscore with an updated image "ros-base-image" that you have created - the issue with xmlrpc. Unfortunately, this issue is very custom to your changes and you will have to debug this issue by yourself. Note that ROS integration is not a default on the SDK and we are quite unfamiliar with this error and will need more debug on the specific changes that you have done at your end. -2- And also I was not able to follow that guide: Sorry, what are you not able to follow in this guide? Yes, the SDK is dependent on Ubuntu 14.04 and it is recommended that you use the mentioned version to recreate the SDK successfully. Regards Karthik + +Hello Karthik, I want to know how much disk space is required to build yocto file system using this guide as I started building it by commenting the host check part in the script but I reached only 20% and took about 100GB of my disk space. I want to know how much disk space I have to free for this. Best regards, Kirollos Henry + +Hi Kirollos, 20% competion and 100GB of disk space doesn't sound quite right. But usually a single build needs about 150GB-200GB of disk space for the full build. Regards Karthik + +Hi Karthik, Thank you so much I was able to run roscore after some changes on the board using the steps I have previously done + diff --git a/data2/text/range/5001-10000/1015697.txt b/data2/text/range/5001-10000/1015697.txt new file mode 100644 index 0000000000000000000000000000000000000000..55b30e6350b9bb2c23cd145e7f2181487adb02fe --- /dev/null +++ b/data2/text/range/5001-10000/1015697.txt @@ -0,0 +1,38 @@ +Ticket Name: How to burn the sd card file to emmc Tda2ex-17 (SDK V03.08) + +Query Text: +Other Parts Discussed in Thread: TDA2, SYSBIOS Dear all, I'm just a beginner As shown in the title! Currently only use sd card to boot I’m not sure about the creation process and other settings like uenv-emmc.txt May I ask which document is talking about how to burn the emmc part? I don’t know the first thing to know and what to do at the beginning Although there are many related issues But is there a detailed document for reference? The part about burning into emmc! Can anyone give me some suggestions on the above issues ===================================================================== And how to enter terminal like => root@dra7xx-evm:~# Beacuse I put sd card into board and starting My log starts directly here ------------------------------------------------ TDA2Ex SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed DDR Config Completed App Image Download Begins SD Boot - file open completed successfully MPU CPU0 Image Load Completed IPU1 CPU0 Image Load Completed IPU1 CPU1 Image Load Completed IPU2 CPU0 and CPU1 Image Load Completed .....................etc -------------------------------------------------------------- I’m not sure how to get in root@dra7xx-evm:~# Which paragraph may I have missed The above are some of my questions. Please help me . VERY THANKS!! + +Responses: +Dear all, Please tell me if there is something unclear Thanks! + +Dear all, By the way , when I was in Bulid The different settings are MAKECONFIG=tda2xx_evm_linux_all => MAKECONFIG=tda2ex_evm_bios_all + +Dear all, Is it because we are a custom board? Because some related settings are not done and directly with your EV setting to run, so there is no way to run to => root@dra7xx-evm:~# Is it? What can I do about those related settings? Are there other documents or suggestions? + +Dear all, 【Supplement】 And my VisionSDK_Linux_UserGuide.pdf did 4 .3 steps But the log does not show anything Next However I did VisionSDK_UserGuide_TDA2Ex.pdf +Some later steps gmake -s sbl and gmake -s appimage +Generate MLO and appimage to overwrite the original MLO (without apimage) Have Log ------------------------------------------------ TDA2Ex SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed etc.... --------------------------------------------- But VisionSDK_Linux_UserGuide.pdf did 4 .3 steps Why is there no system log?? Is there a problem? Because we are a custom board, what should I pay attention to and set?   + +If you set MAKECONFIG=tda2ex_evm_bios_all and build "gmake -s sbl", the MLO is for the baremetal bootloader for TI-RTOS (SYSBIOS). For Linux, you should set MAKECONFIG=tda2xx_evm_linux_all. However, sbl build is only for RTOS, not Linux. To build the bootloader (spl/u-boot) for Linux, you have to build from linux u-boot on Ubuntu PC. VisionSDK_Linux_UserGuide.pdf has all the steps documented. You have to follow the steps from the beginning to set up Linux build environment. Regards, Stanley + +Dear Stanley, Step1 !!! I did the steps above in the document (VisionSDK_Linux_UserGuide.pdf) And my MAKECONFIG is tda2ex_evm_linux_all I have done step 4.2,Then burn it into the SD card When I put it in our coustom board, """ there is no log """ =================================================================== Step2 !!! Then I did another thing I will overwrite the MLO and put in appimage built by the window => tda2ex_evm_bios_all (These two files are completed under the window ) But there is a log out Like this ------------------------------------------------ TDA2Ex SBL Boot DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed etc.... --------------------------------------------- ============================================================================== The key problem is!! when I was in step 1!!! Why did I complete 4.2 and put the sd card into our costom board and there is no log display???? Why did I do the second experiment but it works like this(Step2 !!!) ? Is there something wrong?? I have followed VisionSDK_Linux_UserGuide.pdf, but the 4.3 step is still unsuccessful Thanks!!!!! + +One possibility is that Linux u-boot SPL (MLO) got stuck since you were booting the MLO for EVM on the custom board. Do you have JTAG to connect the device and check what is going on with debugger? You can use Lauterbach JTAG with Trace32 or XDS560v2 JTAG with CCS to debug. Regards, Stanley + +Dear, Q1. So it may be the relationship of the custom board? Because it doesn’t match with MLO?? =============================================================== Q2.in addition ,If Q1 is right I want to ask, is it because some need to be set according to our board? Is there any direction to tell me what needs to be modified? ============================================================= I will learn about the debug method and try it out Please tell me these two answers Thanks!! + +Q1: Yes Q2: You have to identify what is different between your board and EVM. For example, if DDR is different, you have to update EMIF configuration or the access to DDR may not work. There are other things like Pin mux, PMIC, and etic. Regards, Stanley + +Thank you!! + +Dear Stanley, I want to check some places Please help me with these problems ================================================================ Q1 : Would like to ask how to determine if MLO has been executed? Q2: Where is the TDA uart port set? I also suspect that the port may be wrong, so I want to check Q3: Where is the MLO log printed? And where is the MLO source code ?? And where it started to run?? Q4: Where is the ROM code??, I want to know how the process of booting to MLO to display log is Q5: Is there any clear information about the boot process (part of the program)? ================================================================= If there is something wrong with the question I asked, please let me know Thank you ! + +Dear Stanley, But the DDR of my RTOS is the same as LINUX DDR RTOS can see log but LINUX does not Just changed MLO, any other suggestions? Thanks! + +Dear Stanley, Can you help me this issue? Thanks! + +Dear Stanley, But the DDR of my RTOS is the same as LINUX DDR RTOS can see log but LINUX does not Just changed MLO, have any other suggestions? and I I opened another thread e2e.ti.com/.../3799935 Thanks! + +Could you download the pre-built binaries from the below link? http://software-dl.ti.com/infotainment/esd/jacinto6/processor-sdk-linux-automotive/latest/index_FDS.html boot-dra7xx-evm.tar.gz will include the MLO and u-boot. Can you try this on your board first? + diff --git a/data2/text/range/5001-10000/1024368.txt b/data2/text/range/5001-10000/1024368.txt new file mode 100644 index 0000000000000000000000000000000000000000..67d925b99ec1bbffc68a75bb3a64a299cd1091ab --- /dev/null +++ b/data2/text/range/5001-10000/1024368.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA2SX: How to use VIP to receive 576I image? + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TVP5158, TVP5154, TDA2 Hi expert, Our company uses a custom board with SDK0305. The requirement is to receive 720*576I 4CH standard images. Q1:How can I make VIP capture receive 25 frame? If possible, Please provide suggestions for modification. Q2:I saw the 1CH TVP5158 driver in the SDK, Can I use TVP5158 driver to receive TVP5154? If possible, can I change it to 4CH? Q3:I am curious about the 25fps or 50field that Capture will receive? + +Responses: +Hi, Wu YiTing said: Q1:How can I make VIP capture receive 25 frame? If possible, Please provide suggestions for modification. fps is controlled by your pixel clock, so as long as pixel clock is correct, VIP would be able to capture 25fps. Wu YiTing said: Q2:I saw the 1CH TVP5158 driver in the SDK, Can I use TVP5158 driver to receive TVP5154? If possible, can I change it to 4CH? Yes, you can, but you would require to bring it up. Wu YiTing said: Q3:I am curious about the 25fps or 50field that Capture will receive? Capture will receive individual fields and so it will also store field and give callbacks on fields capture. Application would have to merge them and create frames out of them. Regards, Brijesh + +fps is controlled by your pixel clock, so as long as pixel clock is correct, VIP would be able to capture 25fps. -> I measured the TVP5154 to be 27MHZ. Is this standard? In fact, we have TP2824 decoder pixcel clock output is 37.125MHZ, can VIP receive it correctly? Yes, you can, but you would require to bring it up. -> I have tried to use TVP5158 driver to receive TVP5154 images but it fails. Can you guide me to achieve it? Capture will receive individual fields and so it will also store field and give callbacks on fields capture. Application would have to merge them and create frames out of them. -> So the Capture driver will merge the fields into Frames, and then send the New data to the Capture link, right? Then I print the Capture link information and see that it should be 25fps, right? + +Wu YiTing said: -> I measured the TVP5154 to be 27MHZ. Is this standard? In fact, we have TP2824 decoder pixcel clock output is 37.125MHZ, can VIP receive it correctly? Yes, it should be fine, as long as HS and VS are correct. Wu YiTing said: -> So the Capture driver will merge the fields into Frames, and then send the New data to the Capture link, right? No, driver or link will not merge the fields. It has to be done in the application. Regards, Brijesh + +No, driver or link will not merge the fields. It has to be done in the application. -> Does TI provide an application for merging? + +I have tried to use TVP5158 driver to receive TVP5154 images but it fails. Do I need to modify some VIP settings in these files? I use PROCESSOR_SDK_VISION_03_05_00_00 The following are my setup steps Step1: Select usecase C:\PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\apps\src\rtos\usecases\vip_single_cam_view Step2: Make sure that Pinmux is configured correctly Step3: Select CHAINS_CAPTURE_SRC_VIDDEC_TVP5158 Step4: captureOutWidth 720, captureOutHeight 576 Step5: Chain_Create Step6: Chain_Start Step7: Initialize TVP5154 7-1// Write to all decoders 0XFE, 0X0F 7-2// write 0x00 to register 0x7F ==> initialize 5154 0X7F, 0X00 vip_single_cam_view.rar + +This is the result of Capture link to Display link and then through HDMI 720P. Camera -> TVP5154 -> TDA2 -> HDMI pixcel clock 27MHZ Display link only received 1fps Camera -> TP2824 -> TDA2 -> HDMI pixcel clock 74.25MHZ Display link received 50fps and image is cropped Camera to monitor The yellow sticker indicates that the image is cropped after passing through TDA2 + +By the way TP2824 hardware: Output BT656. embedded 720*576I + +Hi Brijesh Could you help to update? Thanks for your kindly help Daniel + +Wu YiTing said: -> Does TI provide an application for merging? No, It has to be done in the application. Wu YiTing said: Do I need to modify some VIP settings in these files? No this should work fine. Just make sure to configure VIP in single channel mode, since this use case might be configuring it in multi-channel mode. Wu YiTing said: Camera -> TVP5154 -> TDA2 -> HDMI pixcel clock 27MHZ Display link only received 1fps Are you configuring VIP in embedded sync format or discrete sync? can you first check if VIP is configured correctly by looking into register? Then check if VIP is detecting size correctly. Then check for fps. fps might be low because your link might.be returning frames in time. Regards, Brijesh + +No, It has to be done in the application. -> I found the use case vip_single_rvc_cam_view_crcvpe VPE seems to be able to field merge this can be achieved? Are you configuring VIP in embedded sync format or discrete sync? can you first check if VIP is configured correctly by looking into register? Then check if VIP is detecting size correctly. Then check for fps. fps might be low because your link might.be returning frames in time. -> I use the default setting of TVP5158, which I think is embedded sync format, i will check the VIP size. + +Wu YiTing said: -> I found the use case vip_single_rvc_cam_view_crcvpe VPE seems to be able to field merge this can be achieved? Yes, VPE can be used to convert field to frames, but please note it will make 60field -> 60frames. There is a DeInterlacer module in VPE, which can convert field to frames. Now if you want just 30frames/sec, then you could drop/ignore alternate frames at the output of VPE. Regards, Brijesh + +How can I check if the Filed image is cropped? I think the size of the 576i field should be 720*288. There will be 50 fields per second. Can I check from the image? + +Yes, VPE can be used to convert field to frames, but please note it will make 60field -> 60frames. There is a DeInterlacer module in VPE, which can convert field to frames. Now if you want just 30frames/sec, then you could drop/ignore alternate frames at the output of VPE. -> Have you implemented field merge with VPE? + +Hi Brijesh, Please help me understand pInprms->dataFormat, pOutprms->dataFormat, my VIP input format is YUV422I, but why I have to set the following to see the correct color picture "indata formate = SYSTEM_DF_YUV422P outdata formate = SYSTEM_DF_YUV422I_YUYV" + +Hi Wu YiTing, Wu YiTing said: There will be 50 fields per second. Can I check from the image? You could save image and check it out. I dont see any other way. But before that, can you please check if captured image size reported by VIP is correct? Wu YiTing said: -> Have you implemented field merge with VPE? No, please refer to existing usease Wu YiTing said: Please help me understand pInprms->dataFormat, pOutprms->dataFormat, my VIP input format is YUV422I, but why I have to set the following to see the correct color picture "indata formate = SYSTEM_DF_YUV422P outdata formate = SYSTEM_DF_YUV422I_YUYV" Input data format here means the format that VIP is receiving data. Here, YUV422P means, it is receiving YUV422 data. Output data format is storage format, so data is stored as YUV422 in UYVY format. Regards, Brijesh + diff --git a/data2/text/range/5001-10000/1024518.txt b/data2/text/range/5001-10000/1024518.txt new file mode 100644 index 0000000000000000000000000000000000000000..2b06e6f7e97463ffe2c7dcb9af89d0fa0194c58e --- /dev/null +++ b/data2/text/range/5001-10000/1024518.txt @@ -0,0 +1,31 @@ +Ticket Name: TDA2PXEVM: Mismatch between TIDL host emulation tool and target board TDA2Px EVM File I/O use case + +Query Text: +Part Number: TDA2PXEVM Hi, I used TIDL import tool to convert a TensorFlow model, then I used the host emulation tool to check the output of the model after conversion. I found that the output is acceptable after quantization. Then, I used TIDL file I/O use case to check the output on the board and compare it to the output of the host emulation tool. However, I find a great mismatch between the two outputs. The output from the target is mostly zeros, which is completely different from the host emulation tool output. I searched on the forum, but did not find a systematic way to debug the cause of this difference. I specify the following parameters in the TIDLCFG.TXT file: inputWidth=128 +inputHeight=32 +inputFile=IN.bin +outputFile=OUT.bin +netFileName=NET.bin +paramFileName=PRM.bin Would you please let me know what is the cause of this issue, or how to appropriately debug it ? Thanks, Ahmed Anwar + +Responses: +Hi Ahmed Anwar, In the TIDL file I/O use case, which core did you select to run TIDL? Kindly check with both the cores and isolate if this issue is specific to any core (EVE/DSP) ? Thanks, Praveen + +Hi Praveen, I checked both cores. The problem is the same whether I choose EVE or DSP. The output is completely different from the host emulation tool output, with the majority of zero values. Thanks, Ahmed Anwar + +Hi Praveen, I noticed that the output file size from the File I/O use case on TDA2PX EVM is not equal to the output file size from the host emulation tool. The output file size from the host emulation tool = 96 bytes. This size is correct and was expected, as I have 96 values in the output of my model, and if each value is represented by 1 byte, so the output file size should be 96 bytes. When I read this 96 byte file as int8, the output is reasonable, and I was expecting to find the same output with the same size on target. However, the output file size from the File I/O use case = 4.1 KB, which is not equal to the 96 byte file I get from the host emulation tool. Would you please explain how I get different file sizes from the host emulation tool and File I/O use case, given that I use the same model and input files? And if you have any idea about this mismatch problem in general, please let me know. Thanks, Ahmed Anwar + +Hi Ahmed Anwar, You are getting output file size of 4.1KB (which is 128x32) because FILE I/O usecase dumps output considering it as segmentation application, so it writes output data considering input dimension. If your application is not segmentation, then you may need to provide the output dimension to the usecase and dump the actual output of 96 bytes, for this you need to modify the dump code in the usecase and for this modified code please refer to last post in the below thread. https://e2e.ti.com/support/processors-group/processors/f/processors-forum/874558/tda2-ti-vision-sdk---tidl---verifying-that-inceptionv1-works-with-tidl/3240125#3240125 Thanks, Praveen + +Hi Praveen, Thank you for your reply. I will try to edit the dumping code in the use case based on the post you provided. Until I modify the code, I have this question, by which I try to figure out if the correct 96 bytes are present within the 4096 bytes or not: Does the 4096 byte output (32 * 128) have the actual 96 output ? When the use case dumps 4096 values, does it dump my actual 96 values (Which are the output of the model) and dumps also other values to complete the 4096 bytes ? If this is the case, I need to understand these points: How can I get the actual 96 byte output of the 4096 bytes ? Is there an offset to start extracting the actual output from ? Are the wrongly dumped bytes (other than the correct 96 bytes) all zeros ? If not, how there values are determined, if the actual model has only 96 bytes output ? Would you please answer my question till I modify the code and test the use case after modification ? Thanks, Ahmed Anwar + +Hi Praveen, I changed the use case code based on the post you provided, and rebuilt the SDK. The output file size is now correct. However, the output is not correct and does not match the host emulation tool output. Most of the values are zeros, which is completely different from the host emulation tool output. Would you please help me in identifying the cause of this mismatch ? Thanks, Ahmed Anwar + +Hi Praveen, I also have a question regarding that the File I/O use case is used for segmentation. My application is not segmentation, does this make an issue ? I added the output height and width to the use case code as you said, but the output is not correct. Is it ok to use the File I/O use case with a model which is not used for segmentation ? Thanks, Ahmed Anwar + +Hi Ahemd Anwar, Could you please provide some details about your application. Also, kindly confirm that you had updated "dmaPrm.srcPitch[0]" and "dmaPrm.destPitch[0]" with outWidth as these can effect the offset in output buffer. Thanks, Praveen + +Hi Praveen, My application is classification. I confirm that I updated "dmaPrm.srcPitch[0]" and "dmaPrm.destPitch[0]" with outWidth. Thanks, Ahmed Anwar + +Hi Praveen, Is there a difference between the way of execution of the host emulation tool and the File I/O use case on target ? I need to understand this, as it is supposed to be the same, and it is supposed to get on target the same output that I get using the host emulation tool. I think that getting good results using the host emulation tool means that the conversion and quantization are done in a good way, and that I can go on with deploying the model to the board. I need to understand if there is differences between the source code that runs the host emulation tool and the File I/O use case, as they produce different results. Thanks, Ahmed Anwar + diff --git a/data2/text/range/5001-10000/1038421.txt b/data2/text/range/5001-10000/1038421.txt new file mode 100644 index 0000000000000000000000000000000000000000..89afd7e59f994f36460526f0e283c8e710da1a43 --- /dev/null +++ b/data2/text/range/5001-10000/1038421.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2EVM5777： How to correctly connect SOC and EMMC when resetting TPS659039 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2E, TDA2 Hello, Question 1: We measured that the SOC PORZ port was continuously pulled down, and the system was not powered on normally. We need TI experts to help analyze the cause of the failure? Figure 2 is a schematic diagram of the hardware schematic design. The RTC_PORZ, RTC_ISO, PORZ of the PMIC and the external reset IC are connected together; the PORZ reset of the PMIC passes through the A device and the RSTOUTn of the PMIC passes through the B device, combined into an AND gate circuit, and the gate output Connect the reset port of EMMC. Question 2: When the connection between PMIC PORZ and A device is disconnected, the system is powered on normally. Figure 1. The yellow line is the waveform we measured at the PORZ reset port of the PMIC, and the pink line is the waveform measured at the reset port of the EMMC. As shown by the pink line, there is a 5ms pull-up level before EMMC reset. We are worried that it will affect the startup of EMMC. Is it necessary to eliminate it through the AND gate? Model of PMIC: TPS659039 SOC model: TDA2E + +Responses: +Is the block diagram trying to show customer hardware implementation or TI EVM implementation? The diagram is not correct, as the PMIC does not have PORz, RTC_PORz, RTC_ISO signals. These are signals on the processor, which is NOT identified in the diagram. Also the processor does not have reset out signal, that is on the PMIC. Certainly you can't have a reset output from the processor feeding back into the reset input of the PMIC, as that could create a loop where stuck in reset. TI's EVM correctly implements this reset structure. The PMIC reset output feeds the reset inputs of the processor. The processor's reset output (nRSTOUT) is sourced into the PMICs nWARMRESET input. + +Hi Robert, Robert Eschler said: Is the block diagram trying to show customer hardware implementation or TI EVM implementation? The block diagram is updated as follows，Can you confirm if there is any problem with the design? Robert Eschler said: Certainly you can't have a reset output from the processor feeding back into the reset input of the PMIC, According to the TPS659039 specification, the NRESWARM port of TPS659039 is connected to the RETOUTn of SOC，RETOUTn is the Warm reset output of SOC + +The block diagram still cannot be correct, as SoC does not support a reset out. Should this be from PMIC? If you compare with TI EVM, the RESET OUT of PMIC is AND-gate with reset supervisor. Why not replicate the EVM logic, as it is tested/validated? Also - BufferA does not serve any purpose, as any time SoC is reset, nRSTOUT is asserted. Only BufferB is required to reset eMMC device. + +Robert Eschler said: BufferA does not serve any purpose According to the TDA2 specification, Buffer A is needed. In our block diagram, buffer A and buffer B form an AND gate Robert Eschler said: The block diagram still cannot be correct, as SoC does not support a reset out. Should this be from PMIC? YES,Update as shown below + +Can you please clarify in the TDA2 specification where it states buffer A + buffer B (AND-gate) is required for eMMC Reset? PMIC RESET_OUT should connect directly to SoC's reset input(s). It can be AND-gate with supervisor output, but does not need to be routed through supervisor. + +Robert Eschler said: Can you please clarify in the TDA2 specification where it states buffer A + buffer B (AND-gate) is required for eMMC Reset? Sorry，I don’t understand what you mean. I want to eliminate the waveform measured by the RSTN reset pin of EMMC when it is powered on, as shown in the red box in the figure below： Initially ，we wanted to achieve the reset architecture as shown in the figure below and the red box truth table results, but the current reset architecture design seems to be problematic, the PORZ pin of the SOC has been pulled low, so I want to confirm whether our reset architecture design correct? + +Have you tried a configuration like modified image below? I don't think the issue is with the AND-gate on nRSTOUT. Also - from the waveform, it looks like the logic levels are very low and are just now turning on (with power supplies). Once the power levels and input thresholds are met, the logic starts working as expected. Maybe try an pull-down resistor (or similar) to eliminate the early pulse. + +If the reset pin of EMMC remains in this state after power-on, will there be any hidden dangers? + +The eMMC is getting a valid reset pulse (low then high), and it appears the final high is full scale (1.8V). I don't see any issue with the final reset. I'm still not clear on the smaller pulse, but again - could be from power just reaching valid logic levels. + +I checked the relevant design in the DEMO board, the version is： 516582H_VAYU_EVM_13NOV2015_H As shown in the figure, the DEMO board does not use the AND gate mentioned in the manual, but only uses a buffer. I want to confirm whether the design can also meet the requirements of TDA2? + +The AND-gate you are referring only affects the eMMC (or other peripherals), and does not affect the TDA2. The PORz circuit for the TDA2 should not include RSTOUTn, as it is reset output of TDA2. + diff --git a/data2/text/range/5001-10000/1039081.txt b/data2/text/range/5001-10000/1039081.txt new file mode 100644 index 0000000000000000000000000000000000000000..3696eff0b767eea4717d15d14d5c7095909d0ec3 --- /dev/null +++ b/data2/text/range/5001-10000/1039081.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA4VM: Create 2 framebuffers， But introduced a new problem: splash screen, the screen keeps flickering + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 background: Based on TDA4, SDK7.03, QNX system, to achieve off-screen rendering problem: what I want to do is this: Create 2 framebuffers, let’s call them fb1 and fb2. Render the scene to fb2 normally. Render fb2 to fb1 with one post-processing effect. Render fb1 to the default framebuffer (we’ll call it fb0) with another post-processing effect. This method really works. But introduced a new problem: splash screen, the screen keeps flickering. After verification: changing glFinish to glReadPixels, the flickering phenomenon still exists. But the image saved by glReadPixels is normal. The specific implementation is as follows: + +Responses: +Hello, Thank you for creating a new thread. I will close the other one and let us use this one. For reference: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1033627/tda4vm-off-screen-rendering-problem-0x506-gl_invalid_framebuffer_operation The fact that glReadPixels on the offscreen buffer returns normal expected image, we need to think if the display node is somehow showing the wrong buffer. Do we know if there is a timing involved? Some suggestions and questions: 1. Have you tried glReadPixels on the final FB? Does this look okay? 2. Instead of any post processing, can we do a simple glClear (of different colors) to fb0, fb1 and fb2 And can we switch colors for each to see what is ending up on the display. 3. As a separate experiment, continue with normal rendering processing but do a glClear of alternating colors on fb0 Regards Hemant + +OK, I will start experimenting now, and I will tell you immediately if there is a conclusion, it is expected in three hours. But this is done to verify: the two Buffers are constantly switching or? + +In order to better verify, compare and analyze the result data, FB1 was rendered red by me; FB2 was rendered blue by me; FB0 was finally rendered (including the content on FB1 and FB2 and other textures such as the car model drawn normally) After verification, the image results saved by FB0, FB1, and FB2 are all completely OK. [AVM] FB0 Width=1920, Height=720, Format=0x80e1 (GL_BGRA=0x80e1, GL_BGR=0x80e0), Type=0x1401... [AVM] FB1 Width=560, Height=720, Format=0x80e1 (GL_BGRA=0x80e1, GL_BGR=0x80e0), Type=0x1401... [AVM] FB2 Width=1280, Height=960, Format=0x80e1 (GL_BGRA=0x80e1, GL_BGR=0x80e0), Type=0x1401... FB0 is the default FB of external TDA4: 1920*720 format GL_BGRA (GL_BGRA_EXT), save the image OK FB1 is an FB created internally by myself: 560*720 format GL_BGRA (GL_BGRA_EXT), save the image OK FB2 is another FB created internally by myself: 1280*960 format GL_BGRA (GL_BGRA_EXT), save the image OK The specific video and the results, I will let Fredy forward it to you，Here is just a screenshot + +Let me add the setting parameters of Display Node. Is there a problem with these parameter settings, especially the two parameters opMode and pipeId (Can you explain what is the meaning of setting different values for these two parameters? I will also do verification at the same time, See the impact of these different values): display_params.opMode = TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE; display_params.pipeId = 2; display_params.outWidth = SV_DISPLAY_WIDTH; display_params.outHeight = SV_DISPLAY_HEIGHT; display_params.posX = 0; display_params.posY = 0; obj->disp_config = vxCreateUserDataObject(obj->context, "tivx_display_params_t", sizeof(tivx_display_params_t), &display_params); status = vxGetStatus((vx_reference)obj->disp_config); obj->displayObj.disp_node = tivxDisplayNode(obj->graph, obj->disp_config, obj->out_img); vxSetNodeTarget(obj->displayObj.disp_node, VX_TARGET_STRING, TIVX_TARGET_DISPLAY1); vxSetReferenceName((vx_reference)obj->displayObj.disp_node, "Display_node"); + +Share the latest research information: it has a certain relationship with the screen parameter settings. Change the opMode parameter of the display node from TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE to TIVX_KERNEL_DISPLAY_BUFFER_COPY_MODE, the splash screen problem is solved, but the rendering slows down. In other words: using TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE will render faster, but the screen will flick; using TIVX_KERNEL_DISPLAY_BUFFER_COPY_MODE will not flicker, but the rendering will be slower. But this is not enough, rendering is too slow. TDA2 also uses the TIVX_KERNEL_DISPLAY_ZERO_BUFFER_COPY_MODE parameter, which renders quickly without flickering. I still feel that there is a problem, you can continue to research in this direction, and I will continue to research at the same time. + +Hello, Thank you for confirming that and sorry for not getting back sooner. We of course need the zero copy mode. Because the copy mode is working fine, I tend to agree that it could be the display side of things that could be out of sync. I will check this internally and get back. In the meanwhile, if there are any updates, please let us know. Regards Hemant + +Thanks for the reply. But how to solve this problem? Need help urgently~ Please~ Another more urgent problem is encountered: After AVM is started (GPU rendering), it may cause communication blocking between its own process and the processes of other modules. This is a newly discovered problem. + +Just to rule something out - can you confirm that you have a glFinish at "each" stage of the offscreen and on screen rendering. With three frame buffers, this would mean three glFinish (at least for verifying - ideally, glFinish at the very end should be fine). I am trying to replicate this behavior here on Linux and also discussing with display experts. Regards Hemant + +I confirm that there is glFinish in "every" phase. This problem of off-screen rendering causing splash screen is one of the problems; Another newly discovered problem is that after AVM rendering, it will affect the IPC process communication. This is also explained in another e2e post of mine. Please help and solve it. Thank you, and look forward to your prompt reply. + +Hello, is there any progress now? It's anxious, please. Thanks~ + diff --git a/data2/text/range/5001-10000/1077619.txt b/data2/text/range/5001-10000/1077619.txt new file mode 100644 index 0000000000000000000000000000000000000000..990ca4762936c44a477982513c05d24ef47c8bb8 --- /dev/null +++ b/data2/text/range/5001-10000/1077619.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA4VM: Mcspi4 is slave in A72 Linux Unable to send and receive data + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 HI. sdk:ti-processor-sdk-linux-j7-evm-07_03_00_05 mcu_ Mcspi2 (Master) and mcspi4 (main domain mcu2-0) can send and receive. If mcspi4 does a slave on A72, it cannot be sent or received. e2e.ti.com/.../tda4vm-slave-mode-tda4vm-mcspi devicetree: main_spi4 { pinctrl-names = "default"; compatible = "ti,am654-mcspi","ti,omap4-mcspi"; reg = <0x0 0x2140000 0x0 0x400>; interrupts = ; clocks = <&k3_clks 270 1>; power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; status="okay"; dmas = <&main_udmap 0xc624>, <&main_udmap 0x4624>; dma-names = "tx0", "rx0"; spi-slave; slave@0 { spi-max-frequency = <24000000>; reg = <0>; compatible = "linux,spidev"; }; Device node generated. root@j7-evm:/# ls /dev/spidev4.0 -l crw------- 1 root root 153, 0 Aug 20 13:44 /dev/spidev4.0 A72 Linux reads some register values of mcspi4： Read at address 0x02140000 : 0x40301A0B Read at address 0x02140004 : 0x00000009 Read at address 0x02140010 : 0x00000008 Read at address 0x02140110 : 0x00000015 Read at address 0x02140114 : 0x00000001 Read at address 0x02140118 : 0x00010001 Read at address 0x0214011C : 0x00020000 Read at address 0x02140120 : 0x00000001 Read at address 0x02140124 : 0x00000000 Read at address 0x02140128 : 0x00000004 Read at address 0x0214012C : 0x3811C3BC Read at address 0x02140130 : 0x0000002A Read at address 0x02140134 : 0x00000501 Read at address 0x02140138 : 0x00000000 Read at address 0x0214013C : 0x00000000 Can mcspi4 send and receive data by interrupt as a slave？ + +Responses: +Hi gj y, I really doubt the Linux supports McSPI in slave mode. So not a limitation from McSPI module, but i think driver is not supported on Linux. Can you check it on RTOS? RTOS driver supports McSPI in slave mode. Regards, Brijesh + +Hi Brijesh Mcspi slave mode polling is supported in RTOS, and the interrupt mode cannot be sent or received. About driver is not supported on Linux, The mcspi slave of tda2 is supported on Linux. + +Hi gj y, Even McSPI slave mode in interrupt mode can be supported in RTOS. Do you see any issue in enabling it? Regards, Brijesh + +Hi.Brijesh static void SPI_InitConfig(uint32_t instance, uint32_t chn) { SPI_HWAttrs spi_cfg; /* Get the default SPI init configurations */ SPI_socGetInitCfg(instance, &spi_cfg); /* Set the default SPI init configurations */ SPI_InitConfigDefault(&spi_cfg, chn); /* interrupt enabled */ spi_cfg.enableIntr = true; spi_cfg.edmaHandle = NULL; spi_cfg.dmaMode = FALSE; /* Transmit/Receive mode */ spi_cfg.chnCfg[chn].trMode = MCSPI_TX_RX_MODE; /* Set Pin direction */ spi_cfg.chnCfg[chn].dataLineCommMode = MCSPI_DATA_LINE_COMM_MODE_1; /* Set the SPI init configurations */ SPI_socSetInitCfg(instance, &spi_cfg); } /* interrupt enabled */ spi_cfg.enableIntr = true; if interrupt enabled spi_cfg.enableIntr = true; Can not send or receive . If spi_cfg.enableIntr =FALSE; Data can be received and sent. + +Hi gj y, I think for the interrupt mode to work for McSPI4 on main domain R5F, we would need to configure R5F Interrupt router. In TRM, i see that McSPI4 interrupt is connected to Interrupt 196 of the interrupt router input. Can you select one irq number for R5F, configure it in the output irq in interrupt router and use it in the driver? Regards, Brijesh + +HI. Brijesh The interrupt configuration is as follows: #define CSLR_MCU_R5FSS0_CORE1_INTR_MAIN2MCU_LVL_INTRTR0_OUTL_36 (196U) Mcspi 4 can't send and receive data. Read McSPI4 reg: Read at address 0x02140000 value: 0x40301A0B Read at address 0x02140004 value: 0x00000009 Read at address 0x02140010 value: 0x00000004 Read at address 0x02140110 value: 0x00000308 Read at address 0x02140114 value: 0x00000001 Read at address 0x02140118 value: 0x0001000E Read at address 0x0214011C value: 0x00000000 Read at address 0x02140120 value: 0x00000001 Read at address 0x02140124 value: 0x00000000 Read at address 0x02140128 value: 0x00000004 Read at address 0x0214012C value: 0x380103C0 Read at address 0x02140130 value: 0x0000004F Read at address 0x02140134 value: 0x00000001 Read at address 0x02140138 value: 0x00000000 Read at address 0x0214013C value: 0x00000013 Read at address 0x0214017C value: 0x00141313 Read at address 0x02140180 value: 0x00000000 Read at address 0x021401A0 value: 0x00000000 MCSPI_IRQSTATUS Register(0x02140118) value 0x0001000E. + +Hi gj y, On which R5F core are you trying to enable interrupt for McSPI4 instance? This macro is for main2mcu domain interrupt router.. Regards, Brijesh + +Hi.Brijesh main domain mcu2-1 core to enable interrupt for McSPI4 #define CSLR_R5FSS1_INTROUTER0_IN_MCSPI4_INTR_SPI_0 (197U) Mcspi 4 can't send and receive data. + +Hi gj y, I am bit confused here. Are you trying to access mcspi4 from Linux (A72) or RTOS(R5F)? I think Linux does not support mcspi in slave mode, so suggestion was to use R5F ie PDK based RTOS driver for mcspi4. Regards, Brijesh + diff --git a/data2/text/range/5001-10000/1096683.txt b/data2/text/range/5001-10000/1096683.txt new file mode 100644 index 0000000000000000000000000000000000000000..c4f2b53e0722c9882f496e25f88ab245ab42b65a --- /dev/null +++ b/data2/text/range/5001-10000/1096683.txt @@ -0,0 +1,53 @@ +Ticket Name: TDA2SA: HDMI output to 1280x320 resolution LCD panel + +Query Text: +Part Number: TDA2SA Other Parts Discussed in Thread: TDA2, TFP410, TFP401 Hi, I use my tda2xx custom board running vsdk3.07. Refer to the thread https://e2e.ti.com/support/processors-group/processors/f/processors-forum/726664/rtos-dra71-how-to-config-the-hdmi-resolution-1920-720 I have tested my HDMI output to 1920x720 panel, it display well. Now, I get a 1280x320 hdmi panel and want to use on my tda2 board. The panel module component is TFP401AP+LVDS83B+LCD, so i use hdmi cable connect it. After set the related clock,hsync,vsync, the panel display nothing but flickering. I afraid the parameters is wrong, I also validate the panel on the D3 tda3 rvp platform. On tda3 hdmi output, it can display. I know tda2 use the inside HDMI module and tda3 rvp use TFP410 output. Could you help me where might be wrong on tda2 board ? Thanks. Terry + +Responses: +Hi Terry, Can you please make sure that timing parameter, sync polarity and pixel clock are matching as per the LCD's requirement? Yes, TDA2x has internal HDMI and since this is custom resolution, there isn't much change required.. If you don't start VENC, do you see anything on the LCD? Regards, Brijesh + +Hi Brijesh, The settings are follow the LCD doc, I will check the signal later. Can you figure out where I can disable VENC if I use rtos or linux ? Terry + +Hi Terry, VENC will be enabled on calling DISPLAYCTRL_LINK_CMD_SET_CONFIG control command in vision_sdk/apps/src/rtos/usecases/common/chains_common.c file. Regards, Brijesh + +Hi Brijesh, 1. When I check the timing on TFP401, there is no hsync output, but pixel clock and vsync have. here is my setting in rtos: else if(displayType == CHAINS_DISPLAY_TYPE_HDMI_1280x320) + { + pPrm->deviceId = DISPLAYCTRL_LINK_USE_HDMI; + pVInfo->vencId = SYSTEM_DCTRL_DSS_VENC_HDMI; + pVInfo->outputPort = SYSTEM_DCTRL_DSS_HDMI_OUTPUT; + pVInfo->vencOutputInfo.vsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.hsPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + + /* Below are of dont care for EVM LCD */ + pVInfo->vencOutputInfo.fidPolarity = SYSTEM_DCTRL_POLARITY_ACT_LOW; + pVInfo->vencOutputInfo.actVidPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + + pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_RGB24_888; + pVInfo->vencOutputInfo.dvoFormat = + SYSTEM_DCTRL_DVOFMT_GENERIC_DISCSYNC; + pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_24BIT; + + pVInfo->vencOutputInfo.pixelClkPolarity = SYSTEM_DCTRL_POLARITY_ACT_HIGH; + pVInfo->vencOutputInfo.aFmt = SYSTEM_DCTRL_A_OUTPUT_MAX; + + /* Configure overlay params */ + ovlyPrms->vencId = SYSTEM_DCTRL_DSS_VENC_HDMI; + + pVInfo->mInfo.standard = SYSTEM_STD_CUSTOM; + pVInfo->mInfo.width = 1280; + pVInfo->mInfo.height = 320; + pVInfo->mInfo.scanFormat = SYSTEM_SF_PROGRESSIVE; + pVInfo->mInfo.fps = 60U; + pVInfo->mInfo.pixelClock = 31000U; + pVInfo->mInfo.hFrontPorch = 72U; + pVInfo->mInfo.hBackPorch = 87U; + pVInfo->mInfo.hSyncLen = 1U; + pVInfo->mInfo.vBackPorch = 22U; + pVInfo->mInfo.vFrontPorch = 15U; + pVInfo->mInfo.vSyncLen = 1U; + pVInfo->vencDivisorInfo.divisorLCD = 1; + pVInfo->vencDivisorInfo.divisorPCD = 1; + } 2. if I disable DISPLAYCTRL_LINK_CMD_SET_CONFIG in chains_common.c like this, // status = System_linkControl(gChains_commonObj.displayCtrlLinkId, // DISPLAYCTRL_LINK_CMD_SET_CONFIG, // &gChains_commonObj.dctrlCfgPrms, // sizeof(DisplayCtrlLink_ConfigParams), // TRUE); // UTILS_assert(status == SYSTEM_LINK_STATUS_SOK); program will stop. [IPU1-0] 82.322454 s: dispcore/src/vpscore_dss.c @ Line 476: [IPU1-0] 82.322576 s: Display Controller registration failed for dss core instance 0 [IPU1-0] 82.322729 s: dispdrv/src/vpsdrv_displayCore.c @ Line 411: [IPU1-0] 82.322820 s: Dss core open failed!! [IPU1-0] 82.322881 s: dispdrv/src/vpsdrv_displayApi.c @ Line 348: [IPU1-0] 82.322973 s: Core open failed!! [IPU1-0] 82.323034 s: Assertion @ Line: 386 in displayLink_drv.c: pObj->displayHndl != NULL : failed !!! [IPU1-0] 82.323491 s: Assertion @ Line: 386 in displayLink_drv.c: pObj->displayHndl != NULL : failed !!! Regards, Terry + +Hi Terry, Can you please update latest status on this thread? Please note HSync and VSync will only be enabled if VENC is running, ie calling DISPLAYCTRL_LINK_CMD_SET_CONFIG ioctl.. If we dont call this ioctl, we will not see HSync and Vsync toggling. Also we should not run the usecase in this case, because if VENC is not running, we cannot start the video pipeline.. Regards, Brijesh + diff --git a/data2/text/range/5001-10000/1097491.txt b/data2/text/range/5001-10000/1097491.txt new file mode 100644 index 0000000000000000000000000000000000000000..d8fbf4a19cf92a31016809272fde9cff4a6d3a6d --- /dev/null +++ b/data2/text/range/5001-10000/1097491.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA3MD: TIDL import tool failed + +Query Text: +Part Number: TDA3MD Other Parts Discussed in Thread: TDA2 VSDK version: 3.8 TIDL version: 01.02 Hello! I'm trying to import a simple ONNX model and I'm running into the following problem: =============================== TIDL import - parsing =============================== ONNX Model (Proto) File: test_import/conv1_3chanel_pth.onnx TIDL Network File : test_import/conv1_model.bin TIDL Params File : test_import/tidl_io_conv1_model_.bin Num of Layer Detected : 2 -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Num|TIDL Layer Name |Out Data Name |Group |#Ins |#Outs |Inbuf Ids |Outbuf Id |In NCHW |Out NCHW |MACS | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 0|TIDL_DataLayer |input.1 | 0| -1| 1| x x x x x x x x | 0 | 0 0 0 0 | 1 3 128 64 | 0 | 1|TIDL_ConvolutionLayer |4 | 1| 1| 1| 0 x x x x x x x | 1 | 1 3 128 64 | 1 32 126 62 | 6999552 | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Total Giga Macs : 0.0070 -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- =============================== TIDL import - calibration =============================== Processing config file .\tempDir\qunat_stats_config.txt ! Running TIDL simulation for calibration. Could Not Open Files .\tempDir\temp_net.bin Processing Frame Number : 0 Max values is -128 at index 0, width = 0, height = 0 Could Not Open Files .\tempDir\temp_net.bin End of config list found ! The temp_net.bin file is simply missing and it is not clear how to get it. My import cfg.txt: modelType = 2 numParamBits = 12 quantizationStyle = 0 inputNetFile = "test_import/conv1_3chanel_pth.onnx" outputNetFile = "test_import/conv1_model.bin" outputParamsFile = "test_import/tidl_io_conv1_model_.bin" inDataNorm = 1 inMean = 128 inScale = 0.0078125 inWidth = 64 inHeight = 128 inNumChannels = 3 sampleInData = "test_import/test_img.jpg" tidlStatsTool = "C:/PROCESSOR_SDK_VISION_03_08_00_00/ti_components/algorithms/REL.TIDL.01.02.00.00/modules/ti_dl/utils/quantStatsTool/eve_test_dl_algo.out.exe" postProcType = 0 + +Responses: +Hi, Could you please let me know how you are importing the model ? I mean steps/commands used for importing ? Thanks, Praveen + +Hi, I run on command line: tidl_model_import.out.exe cfg.txt it says so in your UserGuide. Also i tried to Build TIDL reference executable using the command: make TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve RUN_REF_FOR_STATS=1 all and this is what i get: C:\PROCESSOR_SDK_VISION_03_08_00_00\ti_components\algorithms\REL.TIDL.01.02.00.00\modules\ti_dl>make TARGET_PLATFORM=PC TARGET_BUILD=release CORE=eve RUN_REF_FOR_STATS=1 all . ======== tidl ALGO ================= gmake -C ./algo -f makefile process_begin: CreateProcess(NULL, gmake -C ./algo -f makefile, ...) failed. make (e=2): The specified file cannot be found. + +Hi, It looks like "tempDir" is created while importing, could you please use "importTestCases.bat" to for importing and check if it works. Regarding building TIDL reference executable, you no need to build it and you can use the executable from the release, and also you will not able to build as the TIDL source code build is not available publicly. Thanks, Praveen + +"importTestCases.bat" creates directories including "tempDir". But "tempDir" is empty, and the rest is a text file, where the following is written Couldn't open inputNetFile file: ..\..\test\testvecs\config\caffe_models\dense_examples\ti_dl_dense_1x1.prototxt + +Would it be possible for you to share details on your Project and requirements? Wanted to make sure, your target application can be supported on TDA3x or will it be better to try TDA4x devices If it helps, can you consider trying your model with our TDA4x based tools available here https://github.com/TexasInstruments/edgeai-tidl-tools + +Hi Kymar! We were inspired by the «TDA3x SoC processor delivers cost effective ADAS solutions» and decided to create an ADAS system based on TDA3. The neural network component is supposed to be used for a small part of the image. In terms of technical characteristics, TDA3 completely satisfies us and we wouldn’t want to use TDA4, which has larger sizes and power consumption. However, the TDA4 impressed us with its performance. Is it worth waiting for a smaller version of TDA4 in the near future, like TDA3 became a smaller version of TDA2 before that? + +We do have parts from TI sitara processor family AM62 with Analytics capability ( recently launched) and we do have road-map to provide parts with higher analytics capability available this year with dedicated accelerators for ML and request to get in touch with Field for more details www.ti.com/.../SK-AM62 + +Thanks for the info, we'll look into this later. But at the moment we would like to embed a neural network on TDA3, it is ideal for our task. Based on the material "Deep Learning Inference For Embedded Applications Reference Design" one DSP and one EVE suits us completely. However, when trying to embed a neural network, we ran into a problem. To check the conversion of the ONNX model to the TIDL format, a simple model was created with one convolutional layer and a non-linear ReLU activation function. After running the conversion script, we got an error about missing files: Processing config file .\tempDir\qunat_stats_config.txt ! Running TIDL simulation for calibration. Could Not Open Files .\tempDir\temp_net.bin Processing Frame Number : 0 Max values is -128 at index 0, width = 0, height = 0 Could Not Open Files .\tempDir\temp_net.bin End of config list found ! The temp_net.bin file is simply missing and it is not clear how to get it. Our actions are described in more detail in previous messages. On your advice, we used "importTestCases.bat" to check the creation of the TempDir directory, in which the files necessary for the conversion should be generated. However, after running "importTestCases.bat", an empty TempDir directory is created. Can you please tell me how to solve the problem with converting the model for TIDL? + diff --git a/data2/text/range/5001-10000/1112849.txt b/data2/text/range/5001-10000/1112849.txt new file mode 100644 index 0000000000000000000000000000000000000000..43fe0045ff1892b85f8caac405841ae91a3db08f --- /dev/null +++ b/data2/text/range/5001-10000/1112849.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA3MV: BT.656 output on LCD1 display + +Query Text: +Part Number: TDA3MV Other Parts Discussed in Thread: TDA2, TDA2SG Dear Champs, My customer tried to output BT.656 on LCD1 display but failed to implement BT.656. They set dss format as below, in \PROCESSOR_SDK_VISION_03_08_00_00\vision_sdk\apps\src\rtos\usecases\common\chains_common.c pVInfo->vencOutputInfo.dataFormat = SYSTEM_DF_YUV422I_YUYV; pVInfo->vencOutputInfo.dvoFormat = SYSTEM_DCTRL_DVOFMT_BT656_EMBSYNC; pVInfo->vencOutputInfo.videoIfWidth = SYSTEM_VIFW_8BIT; They faced below error with 'SYSTEM_VIFW_8BIT'. When they changed 'SYSTEM_VIFW_12BIT', this error was resolved, but there was no display in customer's BT656 monitor connected to LCD of TDA3. When customer checked 'DISPC_VP1_CONFIG' register, they find BT656enable field is set to '1'. Could you please let me know your guide how they can check it further if BT656 signal was output in LCD of TDA3? Thanks and Best Regards, SI. + +Responses: +Hi SI, Once we say BT656, videoIfWidth is not really used. But since there is a check inside the driver, which allows only valid videoIfWidth, it fails. Please use 12bit as videoIfWidth, it should be fine. Regarding BT656 output, please note that DSS outputs 10bit data on D0-D9 data lines for BT656 output format. So if you receiver is using 8bit data, please make sure to use upper 8bit data lines. Also please note that there is a hsync size limitation. I think DSS can support only update 256 clock cycle for the hsync. Please see if these conditions are taken care. Regards, Brijesh + +Hi Brijesh, Except Hsync limitation, we have checked all these with customers already. Do you have any idea how customer can check if their BT656 signal output in DSS is correct? Thanks and Best Regards, SI. + +Hi SI, Bit difficult, since embedded syncs. Can we atleast probe the data lines and see if they are toggling? Also please check if pinmux for the data lines are setup.. Regards, Brijesh + +Hi Brijesh, Brijesh Jadav said: I think DSS can support only update 256 clock cycle for the hsync. Please see if these conditions Could you please explain this with more details? Their resolution is 640x480. Do you mean only 256, 512, 768 pixels can be supported for horizontal? Brijesh Jadav said: Can we atleast probe the data lines and see if they are toggling? Also please check if pinmux for the data lines are setup.. Thanks for the response. I'll check it with customers and let me update soon. Thanks and Best Regards, SI. + +Hi SI, The size of the field in the register, where we specify hsync length in clock cycles, is just 8bits, so we can have only 256 clock cycles of hsync. This is not sufficient for the 480i, 576i resolution over 8bit interface.. Regards, Brijesh + +Brijesh, Thanks for the confirm. Yes. it should be an issue. Could you please provide more details on this? where can I check it in TDA3 TRM? I checked 9.2.4.13.4. DISPC VP1 BT.656 and BT.1120 Modes and 9.2.4.13.7 DISPC VP1 Timing Generator and Panel Settings, but could not find any limitation for hsync length. I found only 'DISPC_VP1_SIZE_SCREEN[27:16] LPP bit field' which has range from 1 to 4096. It would be helpful to make customer understand if there is any description for this limitation in the TRM. And, what is the PCLK of BT656 output in TDA3 LCD1? BT656 standard present 480i, 576i with 27Mhz PCLK as you know, but I'm curious if PCLK is still 27Mhz. Thanks and Best Regards, SI. + +Hi SI, Please check HSW field in the DISPC_VP1_TIMING_H register. This field is just 8bits. I think this limitation is also mentioned in the errata document. Yes, pixel clock for 480i and 576i is 27MHz. Regards, Brijesh + +Brijesh, I could not find this limitation in the errata, and I found below CAUTION in the TDA2 TRM. Is there any way to output BT656 640x480 resolution with embedded sync in LCD1? I found there is someone implement BT656 1920x720 in TDA2SG in below e2e. Can you guess how they can implement it? https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1038316/tda2sg-bt656-output-resolution/3841312?tisearch=e2e-sitesearch&keymatch=bt656%2525252520AND%2525252520dss#3841312 Thanks and Best Regards, SI. + +Hi SI, Sung-IL said: I could not find this limitation in the errata, and I found below CAUTION in the TDA2 TRM. Yes, this is the one i was talking about. Sung-IL said: Is there any way to output BT656 640x480 resolution with embedded sync in LCD1? Well, as long as HS width is less 256 clock cycle, it is possible to output this resolution. Regards, Brijesh + +Brijesh, 256 clock cycle means 256 pixels, right? Thanks and Best Regards, SI. + +Hi SI, No, this field is in terms of clock cycles, so if we are using BT656, it would be 2 clock cycles per pixel, so 256 pixels would require 512 clock cycles, which is not possible. Regards, Brijesh + +Brijesh, I'm still confused on this. I found below picture in the TDA3/TDA2 TRM and it seems PPL is a pixel number per each line. As PPL support 12bits(11:0), the maximum pixels per line should be 2048. I think the limitation of HSW is only applied to BLANKING period. Could you please double check this again? As you mentioned, if the horizontal pixel size is limited to 256 clocks(128pixels), even QVGA(320x240) can not be displayed in this case. Thanks and Best Regards, SI. + +Hi SI, Yes, HSW is horizontal sync width, which is part of the horizontal blanking period. Regards, Brijesh + +Hi Brijesh, Can you check below register values for BT656 output(640x480) and let me know your opinion on this? Thanks and Best Regards, SI. + +Hi SI, Configuration seems to be correct, - BT656 output is enabled - Color Space conversion is enabled - HSW set to 0xFF - Vertical blanking is set to 0 - VP enabled - VPPROGLINENUMBERMODULO is set, as not required - Go bit is set Although, line interrupt is set, i dont see anything in the Line status register. Are you getting anything in the output? Also is the pixel clock running fine for this VP? Do you see Vsync interrupt? Regards, Brijesh + diff --git a/data2/text/range/5001-10000/1173377.txt b/data2/text/range/5001-10000/1173377.txt new file mode 100644 index 0000000000000000000000000000000000000000..4aed7df1b0fc3a6426422f4368d2bc135e6b9659 --- /dev/null +++ b/data2/text/range/5001-10000/1173377.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA4VM: [tda4vl] facing IPC init issues while integrating vision app TIDL code to custom frame work + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA4VL, TDA2, SYSBIOS part number :J721S2_SW Reference: vision_app EVM _ TDA4VL A72 os -- Linux C7x -- FreeRtos I am trying to integrate the TIDL code to our frame work , just to ensure all libs related to TIDL are working fine with our basic frame work, but while running the code I am getting an error like below after the rpmsg_char_init(NULL) call. _rpmsg_char_find_ctrldev: could not find the matching rpmsg_ctrl device for virtio0.rpmsg_chrdev.-1.13 _rpmsg_char_find_ctrldev: could not find the matching rpmsg_ctrl device for virtio1.rpmsg_chrdev.-1.13 then TX channels for CPU creation for c7x_1 and c7x_2 are failing. I would like to know what is this error happening while calling rpmsg_char_init() and why its happening. Regards, Remesh + +Responses: +Hi any update on this ? Regards, Remesh + +Hi Remesh, It appears that your firmwares are not running properly. Please check the output of the following command on the target, and ensure that the rpmsg_chrdev device with the appropriate end-point is published to the Linux-side from your firmware. Each of the published rpmsg_chrdev device will have probed the rpmsg_char driver and should have created a rpmsg_ctrl device. $ ls -l /sys/bus/rpmsg/devices $ ls -l /sys/class/rpmsg regards Suman + +Hi Suman, please find the output of those commands oot@j721s2-evm:/# ls -l /sys/bus/rpmsg/devices total 0 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio0.rpmsg_chrdev.-1.10 -> ../../../devices/platform/bus@100000/64800000.dsp/remoteproc/remoteproc0/remoteproc0#vdev0buffer/virtio0/virtio0.rpmsg_chrdev.-1.10 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio0.rpmsg_chrdev.-1.20 -> ../../../devices/platform/bus@100000/64800000.dsp/remoteproc/remoteproc0/remoteproc0#vdev0buffer/virtio0/virtio0.rpmsg_chrdev.-1.20 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio1.rpmsg_chrdev.-1.10 -> ../../../devices/platform/bus@100000/65800000.dsp/remoteproc/remoteproc2/remoteproc2#vdev0buffer/virtio1/virtio1.rpmsg_chrdev.-1.10 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio1.rpmsg_chrdev.-1.20 -> ../../../devices/platform/bus@100000/65800000.dsp/remoteproc/remoteproc2/remoteproc2#vdev0buffer/virtio1/virtio1.rpmsg_chrdev.-1.20 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio2.rpmsg_chrdev.-1.14 -> ../../../devices/platform/bus@100000/bus@100000:bus@28380000/bus@100000:bus@28380000:r5fss@41000000/41000000.r5f/remoteproc/remoteproc1/remoteproc1#vdev0buffer/virtio2/virtio2.rpmsg_chrdev.-1.14 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio2.ti.ipc4.ping-pong.-1.13 -> ../../../devices/platform/bus@100000/bus@100000:bus@28380000/bus@100000:bus@28380000:r5fss@41000000/41000000.r5f/remoteproc/remoteproc1/remoteproc1#vdev0buffer/virtio2/virtio2.ti.ipc4.ping-pong.-1.13 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio3.rpmsg_chrdev.-1.10 -> ../../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5c00000.r5f/remoteproc/remoteproc3/remoteproc3#vdev0buffer/virtio3/virtio3.rpmsg_chrdev.-1.10 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio3.rpmsg_chrdev.-1.20 -> ../../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5c00000.r5f/remoteproc/remoteproc3/remoteproc3#vdev0buffer/virtio3/virtio3.rpmsg_chrdev.-1.20 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio4.rpmsg_chrdev.-1.10 -> ../../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5d00000.r5f/remoteproc/remoteproc4/remoteproc4#vdev0buffer/virtio4/virtio4.rpmsg_chrdev.-1.10 lrwxrwxrwx 1 root root 0 Aug 30 12:50 virtio4.rpmsg_chrdev.-1.20 -> ../../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5d00000.r5f/remoteproc/remoteproc4/remoteproc4#vdev0buffer/virtio4/virtio4.rpmsg_chrdev.-1.20 root@j721s2-evm:/# root@j721s2-evm:/# ls -l /sys/class/rpmsg total 0 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl0 -> ../../devices/platform/bus@100000/64800000.dsp/remoteproc/remoteproc0/remoteproc0#vdev0buffer/virtio0/virtio0.rpmsg_chrdev.-1.20/rpmsg/rpmsg_ctrl0 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl1 -> ../../devices/platform/bus@100000/64800000.dsp/remoteproc/remoteproc0/remoteproc0#vdev0buffer/virtio0/virtio0.rpmsg_chrdev.-1.10/rpmsg/rpmsg_ctrl1 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl2 -> ../../devices/platform/bus@100000/65800000.dsp/remoteproc/remoteproc2/remoteproc2#vdev0buffer/virtio1/virtio1.rpmsg_chrdev.-1.20/rpmsg/rpmsg_ctrl2 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl3 -> ../../devices/platform/bus@100000/65800000.dsp/remoteproc/remoteproc2/remoteproc2#vdev0buffer/virtio1/virtio1.rpmsg_chrdev.-1.10/rpmsg/rpmsg_ctrl3 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl4 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/bus@100000:bus@28380000:r5fss@41000000/41000000.r5f/remoteproc/remoteproc1/remoteproc1#vdev0buffer/virtio2/virtio2.rpmsg_chrdev.-1.14/rpmsg/rpmsg_ctrl4 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl5 -> ../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5c00000.r5f/remoteproc/remoteproc3/remoteproc3#vdev0buffer/virtio3/virtio3.rpmsg_chrdev.-1.20/rpmsg/rpmsg_ctrl5 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl6 -> ../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5c00000.r5f/remoteproc/remoteproc3/remoteproc3#vdev0buffer/virtio3/virtio3.rpmsg_chrdev.-1.10/rpmsg/rpmsg_ctrl6 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl7 -> ../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5d00000.r5f/remoteproc/remoteproc4/remoteproc4#vdev0buffer/virtio4/virtio4.rpmsg_chrdev.-1.20/rpmsg/rpmsg_ctrl7 lrwxrwxrwx 1 root root 0 Aug 30 12:54 rpmsg_ctrl8 -> ../../devices/platform/bus@100000/bus@100000:r5fss@5c00000/5d00000.r5f/remoteproc/remoteproc4/remoteproc4#vdev0buffer/virtio4/virtio4.rpmsg_chrdev.-1.10/rpmsg/rpmsg_ctrl8 root@j721s2-evm:/# I am using rpmsg_char_init(NULL); from the application (like in the example), but how it will get the soc name/ family name while executing this api ? Regards, Remesh + +Hi Suman, could you please guide me to resolve this issue, I am blocked now. Regards, Remesh + +Hi Remesh, Remesh Neelamana said: _rpmsg_char_find_ctrldev: could not find the matching rpmsg_ctrl device for virtio0.rpmsg_chrdev.-1.13 _rpmsg_char_find_ctrldev: could not find the matching rpmsg_ctrl device for virtio1.rpmsg_chrdev.-1.13 These traces are not from the rpmsg_char_init() call, but they are from the rpmsg_char_open() call instead. You are trying to open the rpmsg_chrdev at endpoint #13 for each of the C7x cores. I do not see the rpmsg devices published at endpoint 13 from your C7x firmwares. I see 2 devices at endpoints 10 and 20. Either you are missing publishing a device at end-point 13, or you are trying to open the wrong device/not passing in the correct arguments to rpmsg_char_open(). Please see git.ti.com/gitweb Remesh Neelamana said: I am using rpmsg_char_init( NULL); from the application (like in the example), but how it will get the soc name/ family name while executing this api ? The API relies on kernel sysfs to look-up the SoC and configure itself. Please look through the source code of the ti-rpmsg-char library for details. https://git.ti.com/gitweb?p=rpmsg/ti-rpmsg-char.git;a=blob;f=src/soc.c;h=b9bb70be44592781f0d9a42feaea0000177323c9;hb=refs/heads/master#l162 regards Suman + +Hi Suman, Thanks for the detailed reply , up to now I worked with TDA2 series and sysbios , so some of the terms I am not getting properly . Like "rpmsg devices published at endpoint 13 from your C7x firmwares. I see 2 devices at endpoints 10 and 20. Either you are missing publishing a device at end-point 13" --> hope this "C7x firmwares" is the application in C7x and how to check / where to check in code are we publishing the device at respective end points , could you please show me the line in the sample code ? My code is similar to the example "ti-processor-sdk-rtos-j721s2-evm-08_04_00_06\vision_apps\apps\dl_demos\app_tidl" here and there few changes are there. when I compiled and loaded this example its working , but when I copied most the thing from this example and made my own project its not working . I am not able to understand what exactly I missed. regards, Remesh + diff --git a/data2/text/range/5001-10000/1177638.txt b/data2/text/range/5001-10000/1177638.txt new file mode 100644 index 0000000000000000000000000000000000000000..25d17685662cbd93246ca3b31377da667e35e0d0 --- /dev/null +++ b/data2/text/range/5001-10000/1177638.txt @@ -0,0 +1,10 @@ +Ticket Name: TDA2SX: When I run the our app, this interrupt occurs in the IPC initialization phase( ASSERT (system_ipc.c|System_ipcInit|119)), and this print tells us:SYSTEM: IPC: [IPU1-0] socket bind failed (Invalid argument, 22) !!! + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Problem description: In the TDA2 application initialization phase, when IPU1 or IPU2 (currently only catching the problem of these two processors) fails to start, the following error printing occurs during the initialization of IPC Error Print 1: The error log is printed as follows: the left side is the failure log: Interrupt here, point to the IPC initialization void (status = System_ipcNotifyInit();) under the hlos, and return an error value to cause the interrupt The corresponding codes are as follows: Int32 System_ipcInit(void) { Int32 status; Vps_printf(" SYSTEM: IPC: Init in progress !!!\n"); gSystem_ipcSharedMemObj = (System_IpcSharedMemObj*) OSA_memPhys2Virt( SYSTEM_IPC_SHM_MEM_ADDR, OSA_MEM_REGION_TYPE_SYSTEM_IPC ); OSA_assert(gSystem_ipcSharedMemObj!=NULL); status = System_ipcNotifyInit(); OSA_assertSuccess(status); status = System_ipcMsgQInit(); OSA_assertSuccess(status); Vps_printf(" SYSTEM: IPC: Init DONE !!!\n"); return SYSTEM_LINK_STATUS_SOK; } System_ ipcNotifyInit(); The function code is as follows: At the same time, we found the corresponding failed print in the error print, as follows: Error Print 2: as follows Found here 1. No Connection established with HLOS, calling rpmsgInit 2. No DMM_ PEG_ Setting and printing of PRIO 3. The socket connection with IPU2 is incorrect, and the help is not in the error log There is no Connection established with HLOS, calling rpmsgInit printing, and the corresponding code is as follows: Void System_ipcConnectToHLOSThread(void) { UInt32 retryCnt=0; UInt32 retval; Vps_printf("RpmsgInit in progress...\n"); while(1) { retval = Resource_getVdevStatus(RPMSG_LATE_ATTACH_A15_VDEV_ID); if(retval != RPMSG_LATE_ATTACH_A15_VDEV_ID) { BspOsal_sleep(10); retryCnt++; if(retryCnt%10==0) { Vps_printf("System_ipcConnectToHLOSThread",retryCnt) } } else { Vps_printf("Connection established with HLOS, calling rpmsgInit\n"); break; } } When we find a problem, Resource_ GetVdevStatus failed to return the correct value, resulting in failure to break. After adding the log, the code is found in the System_ The while (1) loop in the ipcConnectToHLOSThread function may end with a Resource_ The getVdevStatus is blocked, causing this exception. The log is as follows: [HOST] [IPU1-0] 1.440309 s: CHAINS: Application Started!!! [HOST] [IPU1-0] 1.453547 s: BOARD: Board Init in progress !!! [HOST] [IPU1-0] 1.454004 s: BOARD: Board Init Done !!! [HOST] [IPU1-0] 1.462026 s: [HOST] [IPU1-0] 1.493320 s: System_ipcConnectToHLOSThread---50 [HOST] [IPU1-0] 1.593332 s: System_ipcConnectToHLOSThread---60 [HOST] [IPU1-0] 1.693314 s: System_ipcConnectToHLOSThread---70 [HOST] [IPU1-0] 1.793326 s: System_ipcConnectToHLOSThread---80 [HOST] [IPU1-0] 1.893338 s: System_ipcConnectToHLOSThread---90 [HOST] [IPU1-0] 1.993350 s: System_ipcConnectToHLOSThread---100 [HOST] [IPU1-0] 2.093332 s: System_ipcConnectToHLOSThread---110 [HOST] [IPU1-0] 2.193344 s: System_ipcConnectToHLOSThread---120 [HOST] [IPU1-0] 2.293356 s: System_ipcConnectToHLOSThread---130 [HOST] [IPU1-0] 2.393338 s: System_ipcConnectToHLOSThread---140 [HOST] [IPU1-0] 2.493350 s: System_ipcConnectToHLOSThread---150 [HOST] [IPU1-0] 2.593363 s: System_ipcConnectToHLOSThread---160 [HOST] [IPU1-0] 2.693344 s: System_ipcConnectToHLOSThread---170 [HOST] [HOST ] 3.267217 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 3.267278 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 3.267370 s: SYSTEM: IPC: [IPU1-0] socket bind failed (Invalidargument, 22) !!! [HOST] [HOST ] 3.267370 s: SYSTEM: IPC: [IPU1-0] Notify RX channel create failed (endpoint = 81) !!! [HOST] [DSP1 ] 0.724547 s: ***** DSP1 Firmware build time 20:28:30 Dec 5 2022 [HOST] [DSP1 ] 0.724638 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 0.725096 s: UTILS: CIO: Init Done !!! [HOST] [DSP1 ] 0.725126 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 0.725157 s: SYSTEM: Attaching to [IPU1-0] ... [HOST] [DSP1 ] 0.899865 s: SYSTEM: Attaching to [IPU1-0] ... SUCCESS !!! [HOST] [DSP1 ] 0.901787 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 0.906789 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! Suspicions: 1. Caused by memory conflict Map data of IPU: resource_ Address and L2 of table_ ROM coincidence. Suspected abnormal The normal address of IPU2 or DSP1/DSP2: resource_ Table address and IPU2_ CODE_ MEM address is consistent 2. Loading file caused an exception It is found that the *. rsc file is deleted and the same error is reported in the log. Open the *. rsc file and find the resource_ The table is inside. It is suspected that the initialization problem is caused by the abnormal loading of the rsc file. + +Responses: +Hi Kong, Sorry for the delay, but is this issue still open for you? regards Suman + +Yes。 It has always existed and has not been resolved。 + diff --git a/data2/text/range/5001-10000/1220181.txt b/data2/text/range/5001-10000/1220181.txt new file mode 100644 index 0000000000000000000000000000000000000000..4f1432a4f2b60d0b272c8b92ecef829ec516c164 --- /dev/null +++ b/data2/text/range/5001-10000/1220181.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2SX: related issue + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 HI this customer is very important for us, could help on this question? （Based on the（PROCESSOR_SDK_RADAR_03_08_00_00）framework） I initialized McSPI in the IPU1_0 kernel， I use the API in the file utils_mcspi.c， and it worked properly.When I calling the same code on IPU1_1, code compilation passed normally, but there was an exception during startup, The code startup phase stops after the log “Putting MPU in Retention...” 。 I tried the following modifications （1）add utils_mcspi.c \ into SRCS_ipu1_1 in file vision_sdk\links_fw\src\rtos\utils_common\src\SRC_FILES.MK （2）add ipu1_1 into bsp_mcspi_default_SOCLIST in file ti_components\drivers\pdk_01_10_04_05\packages\ti\drv\bsp_lld\mcspi\bsp_mcspi_component.mk But neither operation works. So how can I use McSPI in the IPU1_1 kernel? Could you please give me some guidance and suggestions. Thank you. + +Responses: +The driver has only been tested on IPU1_0. We don't support the driver to run on IPU1_1. + +Hi team, The customer is using TDA2's Ethernet feature, originally PROCESS_radar_SDK default NDK is running on IPU1_1 and now needs to use TCP to transfer large data to PC, so customer defines NDK to run in core of A15_0. Network 1000 Mbps rate negotiation is normal, TCP connection is normal, but the throughput rate is too slow, and it is discovered after the packet is captured with wireShake. When 4MB of data is sent, successive frames are lost between 90kB and 100kB of data, resulting in continuous retransmission of these frames. Except for the loss of these frames, the rest of the data is transmitted normally. They mainly made the following changes: 1. In the cfg.mk file in the tda2xx_cascade_BIOS_radar directory, set NDK_PROC_to_use=A15_0 2. Regenerate the associated privi.c and priv.h files in usecases, mainly modifying NetworkTx (IPU1_1) to NetworkTx (A15) 3. Adjust NDK_data_size and A15_0_data_size as appropriate in the file mem_segment_definition_BIOS.xs as follows: /* * ======== mem_segment_definition.xs ======== * ======== Single file for the memory map configuration of all cores ========= */ function getMemSegmentDefinition_external(core) { KB=1024; MB=KB*KB; DDR3_ADDR = 0x80000000; DDR3_SIZE = 512*MB; /* * In case of ECC_FFI_INCLUDE, DDR3_BASE_ADDR_1 and DDR3_BASE_SIZE_1 * are hard-coded in as values of gIpcNonCachedDataAddr and * gIpcNonCachedDataSize in Ipu1_0.cfg * If this DDR3_BASE_SIZE_0 is changed, update Ipu1_0.cfg */ DDR3_BASE_ADDR_0 = DDR3_ADDR; DDR3_BASE_SIZE_0 = 507*MB; /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE * to map SR0, REMOTE_LOG_MEM sections. * tlb_config_eveX.c need to be modified otherwise */ DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_0 + DDR3_BASE_SIZE_0; DDR3_BASE_SIZE_1 = DDR3_SIZE - DDR3_BASE_SIZE_0; //if(core=="ipu1_1" || core=="ipu1_0" || core=="ipu2" || core=="a15_0") //{ /* for ipu1_0, ipu1_1, ipu2 DDR3_BASE_ADDR_1 should be * in non-cached virtual address of * DDR3_BASE_ADDR_1 + 512*MB */ DDR3_BASE_ADDR_1 = DDR3_BASE_ADDR_1+512*MB; //} DSP1_L2_SRAM_ADDR = 0x40800000; DSP1_L2_SRAM_SIZE = 288*KB; DSP2_L2_SRAM_ADDR = 0x41000000; DSP2_L2_SRAM_SIZE = 288*KB; EVE1_SRAM_ADDR = 0x42000000; EVE1_SRAM_SIZE = 1*MB; EVE2_SRAM_ADDR = 0x42100000; EVE2_SRAM_SIZE = 1*MB; EVE3_SRAM_ADDR = 0x42200000; EVE3_SRAM_SIZE = 1*MB; EVE4_SRAM_ADDR = 0x42300000; EVE4_SRAM_SIZE = 1*MB; TOTAL_MEM_SIZE = (DDR3_SIZE); /* First 512 MB - cached */ /* EVE vecs space should be align with 16MB boundary, and if possible try to fit * the entire vecs+code+data in 16MB section. In this case a single TLB map would * be enough to map vecs+code+data of an EVE. * tlb_config_eveX.c need to be modified if any of these EVE memory sections or * SR1_FRAME_BUFFER_MEM section is modified. */ /* EVE self-branch instruction block - EVE1_VECS * In SBL, EVE self-branch instruction is inserted @ 0x80000000 if no AppImage for EVE. * This could overwrites the code/data loaded at 0x80000000. * So Reserving a small memory block in the beginning of the DDR @0x8000 0000 for * EVE self-branch instruction if no AppImage for EVE. * If EVE enabled, then the EVE VECS/DATA/CODE is placed @0x8000 0000, * and hence we did not observe any issue. * If EVE is disabled, then also DO NOT remove this EVE1_VECS section @0x80000000, * if no AppImage for EVE. This could overwrites the code/data loaded at 0x80000000 */ EVE1_VECS_SIZE = 0.5*MB; EVE1_CODE_SIZE = 2*MB; EVE1_DATA_SIZE =13.5*MB; EVE2_VECS_SIZE = 0.5*MB; EVE2_CODE_SIZE = 2*MB; EVE2_DATA_SIZE =13.5*MB; EVE3_VECS_SIZE = 0.5*MB; EVE3_CODE_SIZE = 2*MB; EVE3_DATA_SIZE =13.5*MB; EVE4_VECS_SIZE = 0.5*MB; EVE4_CODE_SIZE = 2*MB; EVE4_DATA_SIZE =13.5*MB; NDK_DATA_SIZE = 8*MB; if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") { IPU1_1_CODE_SIZE = 2.5*MB; IPU1_1_DATA_SIZE = 12.5*MB; IPU1_0_CODE_SIZE = 6*MB; IPU1_0_DATA_SIZE = 12*MB; } else { IPU1_1_CODE_SIZE = 2.5*MB; IPU1_1_DATA_SIZE = 12.5*MB; IPU1_0_CODE_SIZE = 6*MB; IPU1_0_DATA_SIZE = 16*MB; } IPU2_CODE_SIZE = 2*MB; IPU2_DATA_SIZE = 7*MB; DSP1_CODE_SIZE = 6*MB; DSP1_DATA_SIZE = 14*MB; DSP1_DATA_SIZE_2 = 1*MB; DSP2_CODE_SIZE = 4*MB; DSP2_DATA_SIZE = 14*MB; DSP2_DATA_SIZE_2 = 1*MB; /* A15_0_CODE_SIZE reduced since it is not used in .bld file. * Check .bld for details. Originally 2 + 14 MB. */ A15_0_DATA_SIZE = 43.5*MB; if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { A15_0_DATA_SIZE_INC = 101*MB /* in MB */ A15_0_DATA_SIZE = (A15_0_DATA_SIZE + A15_0_DATA_SIZE_INC); } if(java.lang.System.getenv("ECC_FFI_INCLUDE")=="yes") { /* Ensure ECC regions are 64kB aligned */ SR1_FRAME_BUFFER_SIZE = 297.5*MB; SR1_BUFF_ECC_ASIL_SIZE = 1*MB; SR1_BUFF_ECC_QM_SIZE = 40*MB; SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; } else { SR1_BUFF_ECC_ASIL_SIZE = 4*KB; SR1_BUFF_ECC_QM_SIZE = 4*KB; SR1_BUFF_NON_ECC_ASIL_SIZE = 4*KB; SR1_FRAME_BUFFER_SIZE = 305.5*MB - (SR1_BUFF_ECC_ASIL_SIZE + SR1_BUFF_ECC_QM_SIZE + SR1_BUFF_NON_ECC_ASIL_SIZE); if(java.lang.System.getenv("OPENCL_INCLUDE") == "yes") { SR1_FRAME_BUFFER_SIZE = SR1_FRAME_BUFFER_SIZE - A15_0_DATA_SIZE_INC; } } /* Second 512 MB - non-cached */ /* The start address of the second mem section should be 16MB aligned. * This alignment is a must as a single 16MB mapping is used for EVE * to map SR0, REMOTE_LOG_MEM sections. * tlb_config_eveX.c need to be modified otherwise */ REMOTE_LOG_SIZE = 160*KB; SYSTEM_IPC_SHM_SIZE = 480*KB; SYSTEM_AUTOSAR_IPC_SHM_SIZE = 512*KB; LINK_STATS_SIZE = 256*KB; HDVPSS_DESC_SIZE = 1024*KB; SR0_SIZE = 128*KB; OPENVX_SHM_SIZE = 1984*KB; EEPROM_PARAM_SIZE = 64*KB; if((java.lang.System.getenv("OPENCL_INCLUDE") == "yes")) { /* when OpenCL is enabled we need more SR0 space */ SR0_SIZE = 2*MB; } 4. MAC0 is used and static IP is set. Issue: if the NDK is configured to run in IPU1_1, Gigabit network communication is normal, 1MB of data per frame, and consecutive transmission does not result in missing frames. However, if the NDK is configured to run in the A15 kernel with the above configuration, the Gigabit network will be able to connect properly. However, if 4 frames are transmitted consecutively, 1 MB per frame, each time a frame is lost between 90 KB and 100 KB at 1 MB of the first frame is transmitted, the frames lost are eventually retransmitted through the TCP underlying retransmission mechanism. But this results in a throughput rate drop. The wireshake packet information is as follows: 192.168.31.100 is the PC. So the customer would like to know what should be aware of when configuring NDK to A15_0? Or is there anything wrong in the above configuration? Thanks. + +Customer can refer to below document to debug the issue. ~[SDK]/ti_components/networking/nsp_gmacsw_4_16_01_01/docs/NSP_GMACSW_Design.pdf ~[SDK]/ti_components/networking/nsp_gmacsw_4_16_01_01/docs/gmacsw/html/index.html Regards, Stanley + diff --git a/data2/text/range/5001-10000/1272443.txt b/data2/text/range/5001-10000/1272443.txt new file mode 100644 index 0000000000000000000000000000000000000000..8b1df4881e638680060681c26c2b0fa586a538cb --- /dev/null +++ b/data2/text/range/5001-10000/1272443.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA4VM: Debug A72-Linux on TDA4 using OS awareness in T32 + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: DRA829, , TDA2 Hello, Till now I was debugging some applications in Linux using GDB. But now I would like debug kernel and modules in our development, that runs on J721E EVM (in A72 core). I already now that as a must we should use vmlinux file to load all related symbols, but, I have tried to create proper cmm to run but I did not have clear results. In t32 intallation I don't see any related with TDA4 architecture: Do you have any cmm script to do so? BR + +Responses: +Hello Pablo, In scripts I've shared before you can find TRACE32 stop mode debug examples at ./cmm-tda4_dra829/mpu-a72/onchip_trace/processor_trace/, ex: dra829-evm-linux.cmm. These work well for kernel drivers and modules. You will need to make sure your vmlinux is compiled with flags CONFIG_PID_IN_CONTEXTIDR=y and CONFIG_DEBUG_INFO=y. You should be able to get these by changing a config fragments in the build area. The resulting vmlinux will go from ~20MB to 100MB+. The end image code does not change but a lot of code and struct information is included in the object file which the debugger needs. If you want to do run mode debugging (using TRACE32's GUI to talk to gdbserver) you can do that also. Using kernel assisted debug is more natural for some things compared to stop mode debugging. It is possible to use both stop and run mode together. The PDF set tells how to do this. For run mode debugging you give an IP address and port to connect to. The LB distro does come with a working gdbserver binary you can use on the target. I've found for some distros and versions of GDB it could be hard to find a working build, in those cases the LB binary worked where other paths failed. If you want to use offchip trace with the Linux kernel on the TDA4VM EVM, you also will need to ensure the signals are routed through the FET mux to the MIPI-60. Linux by default sets the signal routing to a daughter card. A DT update will allow it to route properly. a/k3-j721e-common-proc-board.dts b/k3-j721e-common-proc-board.dts --- a/k3-j721e-common-proc-board.dts 2021-01-28 14:54:52.415495991 -0800 +++ b/k3-j721e-common-proc-board.dts 2021-01-28 14:53:39.463212359 -0800 @@ -611,7 +611,7 @@ /* P12 - MCASP/TRACE_MUX_S1 */ gpio-hog; gpios = <10 GPIO_ACTIVE_HIGH>; - output-low; + output-high; line-name = "MCASP/TRACE_MUX_S1"; }; }; It can be useful to set up to stop just at the kernel entry to setup driver breakpoints. I'd suggest using the dra829-evm-linux-early-breakpoint-insertion.cmm example for that. It works well with SD card booting. If you are debugging modules, then using the awareness pull down at insmod time should work well enough. Some useful links might be: https://www2.lauterbach.com/pdf/rtos_linux_stop.pdf https://www2.lauterbach.com/pdf/rtos_linux_run.pdf https://www2.lauterbach.com/pdf/hypervisor_user.pdf https://repo.lauterbach.com/publications/integrated_run_and_stop_mode_debugging_for_embedded_linux.pdf https://repo.lauterbach.com/linux_flyer_web.pdf https://www2.lauterbach.com/pdf/training_rtos_linux.pdf https://repo.lauterbach.com/video/tut-e_linux-debug_slides.pdf Regards, Richard W. + +Richard Woodruff said: In scripts I've shared before you can find TRACE32 stop mode debug examples at ./cmm-tda4_dra829/mpu-a72/onchip_trace/processor_trace/, ex: dra829-evm-linux.cmm. These work well for kernel drivers and modules. You will need to make sure your vmlinux is compiled with flags CONFIG_PID_IN_CONTEXTIDR=y and CONFIG_DEBUG_INFO=y. You should be able to get these by changing a config fragments in the build area. The resulting vmlinux will go from ~20MB to 100MB+. The end image code does not change but a lot of code and struct information is included in the object file which the debugger needs. Hello Richard. I have compiled with those flags activated. Then I will check, but size is much more big that you said... Thanks a lot for trace problem, this was in past already considered in: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1192456/j721excpxevm-trace-lines-multuiplexed-with-deserializer-in-jacinto7-j721e-dra829-tda4vm-evaluation-module.f Thanks a lot for list of documentation. I have asked to spanish Lauterbach provider if license is needed to have run&stop mode. I will inform as soon as I have results. Many thanks + +Hello Pablo, Yes, your vmlinux was much bigger than I was guessing. In my local usages it normally goes from like 20MB to ~120MB. I suppose it depends on what all is in the build. Probably your custom system is packed with devices. Or maybe you are doing something like using LLVM and I'm only used GCC. You should not need any different licenses to use HLOS debug features. The typical needed are arch + trace + multi-core. If your cable has a couple core types you will not need multi-core as its inferred. Your LB provider will know the details for sure, I'm just commenting on my understanding. Regards, Richard W. + +I am in conversations with LB provider to prepare fully run&stop mode. Thanks for your support + +Hello Pablo, That will enable a lot of debug possibilities. Different usage scenarios will have different effort levels. Kernel driver debugging in a single address space is straight forward, working with kernel modules is a bit more work. There is sometimes a desire to get good user space timing information and effort will scale. The debugger handles the tricky part with multiple address spaces and associations, but it can be a bit of work to get all the debug friendly objects for all processes/threads and their dynamic/shared libraries. In a really big system focus is required as it all can't be gotten, so you need to use different native tools to locate hot spots, then zoom in and focus using the debugger. On TDA4 recently I've done more low level then Linux level so I checked what our current devs are doing. They were recommending a few more options past what is in the Lauterbach pdf files (normal debug_info and nokaslr) our team was saying CONFIG_CORESIGHT=n and ARM_CORESIGT_PMU_ARCH_SYSTEM_PMU=n also helps in current kernel. Regards, Richard W. + +Hello, Richard. As per our LB provider explanation, it is needed aditional license for Run mode with no limitation, for what we need is running T32 with "PBI=GDB". This is useless at all, as we can use GDB from other IDEs for free. For Stop mode (that would allow debugging Kernel and drivers), it is not needed aditional. I asked for RUN&STOP that would not need aditional license, and It could be very useful for debug processes User Space with kernel running and for drivers debugging in same instance. LB is describing this "dual" mode in its documentation (https://repo.lauterbach.com/publications/integrated_run_and_stop_mode_debugging_for_embedded_linux.pdf, https://www2.lauterbach.com/pdf/rtos_linux_run.pdf), but as I found many problems to run it, after asking them, they (provider) confirmed this mode is not available. Did you experiment with it?. Or do you open different instances for GDB and STOP mode? Many thanks + +Hello Pablo, I noticed a reply was missed to your last question. Seems it came in when I was OOO. I had used GDB+Stop last while working a complex issue on TDA2 (armv7). I've not had the need to do the same on TDA4 (armv8) for the issues I looked into. For some complex issues which are important to solve, I do find exporting a system to LB is a way to work through any tool side issues. Regards, Richard W. + diff --git a/data2/text/range/5001-10000/1323866.txt b/data2/text/range/5001-10000/1323866.txt new file mode 100644 index 0000000000000000000000000000000000000000..39ad55bc07594e7e6dc2e83518c171b9f9a622f5 --- /dev/null +++ b/data2/text/range/5001-10000/1323866.txt @@ -0,0 +1,62 @@ +Ticket Name: SK-AM62A-LP: Watch OSPI NAND flash content in CCS + +Query Text: +Part Number: SK-AM62A-LP Other Parts Discussed in Thread: TDA2E, TDA2 Hello. In order to check content on OSPI NAND I would like to have proper configuration to see it in Memory Watcher in Code Composer. In other TI microcontrollers (such us TDA3 and TDA2A) wich we used in past, we had that choice. Just configuring to memory map, minor register changes where needed Could you provide configuratio, if possible, to have same for AM62A? Thanks + +Responses: +Hello, May I ask what OS are you using- MCU+/RTOS or Linux? Additionally, what SDK version and Code Composer Studio version are you using? This way I can best refer you to the right expert for your inquiry. -Daolin + +Hello, Currently I am using MCU but next steps will be also with Linux. The SDK is _09_01_00_39 and CCS 12.06 BR + +Hello, Ok, I have assigned you to our MCU+ expert on OSPI. Once they help you on the MCU+ side, if you still need help on the Linux side, feel free to submit another E2E inquiry. -Daolin + +Hello Pablo, I am assuming by memory watcher you are referring to memory browser. Can you explain more about what do you mean by watch OSPI nand flash content ? You can also point me to a thread where you got a chance to work on this as I saw you were talking about other TI Microcontrollers. Looking forward to your response. Regards, Vaibhav + +Hello, Vaibhav Kumar said: I am assuming by memory watcher you are referring to memory browser. Yes, sorry Vaibhav Kumar said: Can you explain more about what do you mean by watch OSPI nand flash content ? Set memory browser to address memory layout of OSPI nand flash and see its content. TDA3 or TDA2E, configuring QSPI peripheral, system performed read operations automatically and I was able to see flash content I have searched for a while about any communication that I could have had with TI about that in TDA2E/TDA3, but I did not find. Let me share configurations needed in TDA2E/TDA3 to achive that (in this case is preparing in Lauterbach with commands). QSPI_SPI_SETUP0_REG = 0012376C (PER.Set.simple D:0x4B300054 %Long 0x0012376C) QSPI_SPI_SWITCH_REG = 00000001 (PER.Set.simple D:0x4B300064 %Long 1) CTRL_CORE_CONTROL_IO_2 = 00000101 --> (PER.Set.simple D:0x4A002558 %Long 0x101) I think is related with access in memory map and/OR SFI: (from datasheet, chapter 24.5.4.1) I don't know if something similar could be used in AM62A. BR + +Hello Pablo, So lets consider a flow as follows. Lets suppose we have some content ready to be flashed to the OSPI NAND flash part. Now from your explanation above, I think you are asking how one can see the contents once its flashed to the part ? So basically wanting to see from OSPI flash part itself. Please correct my understanding if I am incorrect. Looking forward to your response. Regards, Vaibhav + +Correct, your understanding is correct Vaibhav Kumar said: So basically wanting to see from OSPI flash part itself. I want to see flash memory in CCS memory browser. BR + +Hi Pablo, I think this use case is covered. Let me check this in context of the ospi_flash_io SDK example. Here we are performing flash write and read operation to a certain flash offset. Please allow me sometime to comment on this. Regards, Vaibhav + +Thanks.let me know as soon as you receive info. + +Hi Pablo, Yes I will put out a response here once I have it working. Regards, Vaibhav + +Hello. I am a little bit confused.... You said Vaibhav Kumar said: I think this use case is covered. Let me check this in context of the ospi_flash_io SDK example. Here we are performing flash write and read operation to a certain flash offset. Please allow me sometime to comment on this. With this comment I understood you were looking for information Vaibhav Kumar said: Yes I will put out a response here once I have it working. With this comment, I understand that this feature is not available and it will.... Please, I would appreciate you clarify better. Thanks + +Hi Pablo, So we have a sample SDK example called ospi_flash_io, where we flash write some data to 0x200000 flash offset, and then read it back from the same offset that is 0x200000. After this we compare the data and check if written == read data So I meant to say that I am going to leverage this example and see if I can find a way to see flash contents from CCS memory browser. I hope this clarifies. Regards, Vaibhav + +Vaibhav Kumar said: So we have a sample SDK example called ospi_flash_io, where we flash write some data to 0x200000 flash offset, and then read it back from the same offset that is 0x200000. Yes. I have worked with it. It is working. The required feature does not depends on which applicaition is running. If SOC is booting from flash, we could see with this feature WHOLE content on flash using CCS. Please point to the feature that I am asking. BR + +Hello Pablo, Please expect responses by next week. Best Regards, Vaibhav + +Hello Pablo, If DAC mode is used, and lets say you are flashing to a certain offset in the flash. From CCS memory browser you should be able to see the flash contents from 0x60000000 onwards. I have been able to do this successfully. Please find the attached screenshot of when the write to flash is performed. Note: 0x60000000 is not the address of the TX Buffer. Looking forward to your response. Regards, Vaibhav + +Thanks. Yes I have confirmed that with that example, the address shows the content of OSPI AFTER execution. When you say: Vaibhav Kumar said: Note: 0x60000000 is not the address of the TX Buffer. I understand that is a remapping and is not an effective flash . It is needed to perform a SW read to see the content in FSS In TDA2/TDA3 that I worked before, in QSPI with SFI translator, QSPI commands are done properly to fill Memory browser in CCS with Flash effective content. There is no need to run Flash read from SW running in core. Imagine that I want to reset the core, set a BP iin main and before making any erase/write operation I like to see the content. What could I do that? With your solution I see 0's because (I guess) is RAM initialized/BSS what I am seeing in 0x60000000. Is there any mechanism to see the content of flash in that way? + +Hello Pablo, I understand your use case of being able to see flash contents from CCS memory browser, BEFORE writing to the flash. So, it translates to seeing the initial value in the flash. I am working on this. You can expect updates by today. Regards, Vaibhav + +Hello. I have never said that the use case is to see flash content AFTER or BEFORE writing to the flash Pablo Varela said: Set memory browser to address memory layout of OSPI nand flash and see its content. TDA3 or TDA2E, configuring QSPI peripheral, system performed read operations automatically and I was able to see flash content Pablo Varela said: I want to see flash memory in CCS memory browser. Pablo Varela said: In order to check content on OSPI NAND I would like to have proper configuration to see it in Memory Watcher in Code Composer. In my last comment, I showed you one use case that is not covered by your suggestion. Pablo Varela said: Imagine that I want to reset the core, set a BP iin main and before making any erase/write operation I like to see the content. What could I do that? With your solution I see 0's because (I guess) is RAM initialized/BSS what I am seeing in 0x60000000. Sorry if I was not clear. We want to see Flash content with no specific firmware running in any core. Just running proper GEL/cmm file would be enough. Is this possible with OSPI_NAND-FSS-AM62A? + +Pablo Varela said: We want to see Flash content with no specific firmware running in any core. Just running proper GEL/cmm file would be enough. Or maybe any CCS Script? + +Hi Pablo, Pablo Varela said: We want to see Flash content with no specific firmware running in any core. I understand this. Please allow me sometime to check the possibility of this. Regards, Vaibhav + +ok, thanks + +Hello Pablo, Please expect responses by today. Regards, Vaibhav + +Good to know. Thanks + +Hi Pablo, Can you tell me about the exact flash part. I am assuming you are using W35N01JW. Please correct my assumption. Regards, Vaibhav + +Please, Vaibhav, look at the title of this long chain of ping-pong. I was asking for one OPSI mounted in one Starter Kit provided by Texas Instruments. Are you going to provide a solution just for one specific device???I guess, the solution should be general for FSS and OSPI. Anyway, yes this is the device that is mounted in SK and what I am working on. + +Hello Pablo, I have checked this internally. Pablo Varela said: We want to see Flash content with no specific firmware running in any core. This is not possible as direct memory mapping is missing. Alternatively, page by page read operation can be possible, but that too by connecting onto the R cores. We would need to write an application in this scenario. As far as Lauterbach is concerned we do not support it. Regards, Vaibhav + +Thanks + +Hi Pablo, Vaibhav Kumar said: Alternatively, page by page read operation can be possible, but that too by connecting onto the R cores. We would need to write an application in this scenario. Please let us know if you need this, so that we can start working on it. But it comes at the cost of loading firmware to the R cores. Regards, Vaibhav + diff --git a/data2/text/range/5001-10000/1330240.txt b/data2/text/range/5001-10000/1330240.txt new file mode 100644 index 0000000000000000000000000000000000000000..40cb903c955b7ec8235d93862b6f12a471030139 --- /dev/null +++ b/data2/text/range/5001-10000/1330240.txt @@ -0,0 +1,84 @@ +Ticket Name: TDA2SX: Interfacing ADV7393 with TDA2x DSS + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: TDA2 Hi, I want to use ADV7393 to get PAL output at my video output port from TDA2x DSS. I have made the schematics. I just want to get a review of this schematic. I have connected D0 to D15 to P0 to P15 of the encoder. The reset I am using is generated by a programmable delay IC. HS is directly from VOUT1 to HS of ADV. As far as VS is concerned, I have added the D-FLIP FLOPs (to delay FLD) as suggested by appnote and connected the output to VS of ADV. Kindly review my schematics (I have attached) and suggest any change (if any) so that I could finalize my design. + +Responses: +Could you clarify which application note you are referring (for delayed FLD)? + +DSS BT656 Workaround for TDA2x https://www.ti.com/lit/pdf/sprac23 + +Are you using RGB565? Need to verify the data bits assignments are aligned. For the processor I believe organization is: For transceiver: + +Ad App note suggests, use RGB565 with R on 0 to 4, G on 5 to 10 and B on 11:15 on Adv7393 side. On Tda2x DSS side, I will send BGR16_565. The format will be interlaced. + +On the ADV device R is 0 to 4, on the TI side R is 11 to 15. So D0 will not connect to D0. Does your schematic account for this? + +As you see app note says connect lower 16 lines for RGB565. Now as far as DSS is concerned, I'll send BGR565. BGR565 means R is on 0 to 4. + +This is the table I'm referring to in the TDA2 TRM: + +That's exactly I'm saying that's for RGB, for BGR it would be reverse. When you send BGR it should be R on 0 to 4, G on 5 to 10, and B on 11 to 15. I'm intending to send BGR16_565 from DSS inside my chains_common.c + +Hi Assad, I think since the bit size is same, it does not matter as long as RGB data lines are correctly connected to the expected data lines of ADV, isn't it? Regards, Brijesh + +I'm confused on some points. Let's dicsuss one by one: 1. DSS workaround for tda2x says that send RGB565 over the DSS. Now RGB565 configuration is B[0:4], G[5:10], R[11:15]. On Adv7393 side, it says send R on 0 to 4, G on 5 to 10 and B on 11 to 15. Now what should I do, should I connect it like this? DSS - > Adv7393 D0:4 -> P11:15 D5:10 -> P5:10 D11:15 - > P0:4 Or should I connect D0:15 to P0:15 one to one and send BGR16_565 from DSS. Can I do that from DSS Point of view? Pls answer regarding both situations? I'm finalizing after your input. + +Hi, You should do connection based on the correct component ordering, which i think is #1 above. DSS - > Adv7393 D0:4 -> P11:15 D5:10 -> P5:10 D11:15 - > P0:4 Regards, Brijesh + +Thanks, I will modify it. 2. The delay circuit which I have used to delay FLD signals. Is this routed correctly. As app note says the delay cct is for adv7343 but we're using adv7393. So it will work in the same scheme as adv7343 right? + +Assad Sultan said: 2. The delay circuit which I have used to delay FLD signals. Is this routed correctly. As app note says the delay cct is for adv7343 but we're using adv7393. So it will work in the same scheme as adv7343 right? I think so. If i remember, we checked it sometimes back and even ADV7343 requires slight delay. Regards, Brijesh + +Thanks. I'm left with configuration in vision sdk. I am trying to test pipeline on EVM just to see if there's no error thrown (I'll bypass the i2c part) when I run the application ( I know there will be no output as EVM doesn't have this IC). I'll report back here tomorrow. 3) I'll use the following setting: (chains_common.c) Data format: RGb16_565 IF width: 16 bit Interlaced and standard PAL Sync: Discrete Sync (Is there any additional setting required?) 4) But I have a confusion. Where can I set tftdatalines (in register programming - appnote) inside vision sdk. I can't find the relevant section of code. Can you tell me where I need to modify the disp control register and which setting exactly to cater TFtDatalines and colorenvenable? + +Assad Sultan said: Sync: Discrete Sync (Is there any additional setting required?) Yes, because output interface is discrete sync interface with RGB565, isn't it? Assad Sultan said: 4) But I have a confusion. Where can I set tftdatalines (in register programming - appnote) inside vision sdk. I can't find the relevant section of code. Can you tell me where I need to modify the disp control register and which setting exactly to cater TFtDatalines and colorenvenable? I think this is somewhere in the chains_common.c file, where display controller is configured. There should be an ioctl for overlay manager to allow configuring tdm mode. Regards, Brijesh + +As far as TDM configuration is concerned it's inside displayCtrlLink_drv.c file where it can be set. But I'm confused about tftdatalines. I can't find any trace to set it. Do I have to set it manually to 0x1 (As app note says it). Or is it somewhere set on a higher level and catered by driver itself? See attachment: + +You can directly write to register or use driver ioctl interface to write in this file. Regards, Brijesh + +How can I directly write? WHERE is that source file located? I tried, I couldn't find. + +I think the application note also provides the driver example setting. Plese use this in chains_main.c or displayctrl_link.c file to enable TDM mode. Regards, Brijesh + +Hi Brijesh? As I said that I know the place where I could enable Tdm mode. But in section 2.1.3.1 Register Programming, it's asking for tftdatalines to set 0x1. But displayCtrlLink_drv.c doesn't have such thing as said in appnote. + +Hi, The API DisplayCtrlLink_drvSetConfig in the displayCtrl_drv.c file can be used for this purpose. This API calls both the ioctls, IOCTL_VPS_DCTRL_SET_VENC_OUTPUT, where we can set the output information and IOCTL_VPS_DCTRL_DSS_SET_ADV_VENC_TDM_PARAMS, where we can enable TDM. Regards, Brijesh + +Sorry if I'm not conveying what I want to say. I know where I can enable Tdm. There's another thing which is TFtdatalines which is to be set to 0x1. It's not in driver file. I'm asking about that. As you can see the register programing section below. I am asking about the first two lines. Where I can set them? DISP_CONFIG1.TFTDATALINES = 0x1; DISP_CONFIG1.COLORENVENABLWE=0x0; These two. + +Hi, Tftdatalines is set to 1 when VideoIfWidth is set to 16bit in the output information structure. Regards, Brijesh + +Okay. This section of register programming isn't applicable. I just have to change driver related setting related to IFwidth and tdm setting. Right? + +Hi, Yep that's correct. Please use driver interface, then you dont need to write directly to register(s). Regards, Brijesh + +I'll test the application flow on Evm and report back. + +Sure thanks, i will move this ticket to waiting state. To reopen, simply reply on the ticket. + +Hi Brijesh! My next question is: Inside chains_common.c where we set the parameters. Now my data scan format is set to interlaced and I'm using custom standard. clock is 27 mhz and width height is 720x576. Mode is RGB16_565. But I'm confused regrading these parameters that how can I set these values? fps = 30U; hFrontPorch = 40u; hBackPorch = 40u; hSyncLen = 48u; vFrontPorch = 13u; vBackPorch = 29u; vSyncLen = 3u; Note : These values are just take from LCD7 inch setting. + +Hi, Please refer to blanking timing in LCD specs and set the same in these fields. Regards, Brijesh + +Which LCD? Sorry I didn't understand. Do you mean copy the values from lcd7 inch code? + +Assad Sultan said: Note : These values are just take from LCD7 inch setting. Please refer to the specs of this LCD. it should have timing in it and that you need to use configure here. Regards, Brijesh + +But I'm not using that lcd, I'm configuring it for adv7393. Will it work? + +Well these are configurable parameters and please check with your receiver device, what's its requirement. I can't tell what needs to be configured, so can't help you further in this case. Regards, Brijesh + +I always study the background and then ask here. As there are some confusion points I wanted to clear. I'll set these parameters by hit and trial as adv7393 datasheet doesn't have any information regarding those. There's one more thing I need your input. As the app note says use timing mode 1 and delay Fid signal. I studied this thing and consulted with the vendor for register setting of adv7393. I have attched the table of setting for SD input mode with RGb16 input. It says Set timing mode to 2 where HSync and Vsync are used but app note says otherwise (using delayed fid and timing mode 1). So is thing tested with rgb input and timing mode 1? pls guide. + +I would suggest to go by what ADV says. Regards, Brijesh + +Hi Brijesh! Thanks for getting back. If I use mode 2, there's the confusion. Mode 2 uses HSync and Vsync while mode 1 uses hsync and fid. So in mode 2 case, delay of fid and then using it on vsync would not work. In that case, I need to delay Vsync signal coming from DSS. What do you say? + +Hi, But HS and VS output is not compatible with the requirement. DSS cannot generate the VS as required for the interlaced output. So please use mode-1 only, where ADV uses HS and FID input signal. Regards, Brijesh + +I'll take a note of it. I'll use HS from DSS directly and fid delayed to vs. And try to set the register to mode 1. I'll see if I get the output. Pls confirm that Hs will be tied directly to Hs right? that's all for now. When I get my HW ready, I'll open a thread then. Thanks + +Yep, HS should be directly connected. Regards, Brijesh + diff --git a/data2/text/range/5001-10000/430110.txt b/data2/text/range/5001-10000/430110.txt new file mode 100644 index 0000000000000000000000000000000000000000..03d0992be1e34843bc1e13b6097bde5b54fe7710 --- /dev/null +++ b/data2/text/range/5001-10000/430110.txt @@ -0,0 +1,29 @@ +Ticket Name: Issue of network on GLSDK + +Query Text: +Hello. Im working with GLSDK on Jacinto 6 Recently I applied SPL boot as to below. Accurately, It is qspi boot working without u-boot stage(only work SPL and kernel) http://processors.wiki.ti.com/index.php/DRA7xx_GLSDK_Software_Developers_Guide#Using_the_Late_attach_functionality After apply it, I couldn't access SSH server of host side(jacinto6). I guessing it because of no u-boot stage. The reason I think this is, I saw same situation when I remove all network feature in config file in u-boot. Please help me. How can I alive network again? below is log INIT: version 2.88 booting Starting Bootlog daemon: bootlogd: cannot allocate pseudo tty: No such file or directory bootlogd. INIT: Entering runlevel: 5 Starting tiipclad daemon Opened log file: lad.txt Spawned daemon: /usr/bin/lad_dra7xx Sending discover... Sending discover... Sending discover... No lease, forking to background done. Starting Dropbear SSH server: dropbear. root@dra7xx-evm:~# ifconfig eth0 Link encap:Ethernet HWaddr C6:8C:87:D2:FD:9A UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:7019 errors:0 dropped:0 overruns:0 frame:0 TX packets:59 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:543887 (531.1 KiB) TX bytes:20178 (19.7 KiB) Interrupt:78 lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:0 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) root@dra7xx-evm:~# + +Responses: +Hello Yangwoo, Let's start with the definition of Late attach functionality: To satisfy the startup time requirements of specific use cases, one would need a remote core booted up early at the boot loader before the Linux kernel is booted. The kernel then attaches with the already booted remote core for further communication. We refer to this feature as the "Early Boot - Late Attach" functionality. Could you check the functionality of late_attach: target # dmesg | grep late_attach +[ 13.387830] remoteproc1: late_attach is 1 My suggestion is to take a detail look on a similar thread - https://e2e.ti.com/support/omap/f/885/t/391870 You can try using new u-boot image - 3755.u-boot.zip Best regards, Yanko + +Thank you for answer Yanko But I don't know your suggestion is good approach or not. because my question was about network is not available in QSPI spl boot. except network problem, everything is working including remoteprc test(IPU1,2 DSP1,2) Why you suggest late attach ? Anyway I applied late attach for you in short time. but I saw another problem in late attach... there was no attached message root@dra7xx-evm:~# dmesg | grep late_attach [ 6.139856] remoteproc3: late_attach is 0 [ 6.382567] remoteproc2: late_attach is 0 [ 6.733915] remoteproc0: late_attach is 0 [ 6.766229] remoteproc1: late_attach is 0 below is log about error with late attach. + +Sorry I had small misunderstood about your suggestion. Anyway below my late attach result of qspi spl boot root@dra7xx-evm:~# dmesg | grep late_attach [ 2.831971] remoteproc3: late_attach is 0 [ 2.962444] remoteproc2: late_attach is 0 [ 3.614248] remoteproc0: late_attach is 0 [ 3.636176] remoteproc1: late_attach is 1 + +Hello Yanko.Really this system has some dependency with u-boot and kernel. Related to this issue, network initialization has same relation. If I set network feature in u-boot, like below, network is working also in kernel. But when I remove below configuration in u-boot(include/configs/dra7xx_evm.h), network is also not working in kernel. Really it has dependency in this system. for example, I guessing, kernel has insufficient initialization for network because without uboot network initialize, kernel network also not work. Please fix this issue, and give some patch of kernel. /* CPSW Ethernet */ #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */#define CONFIG_CMD_DHCP #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2#define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY#define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10#define CONFIG_CMD_PING #define CONFIG_CMD_MII#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ #define CONFIG_MII /* Required in net/eth.c */ #define CONFIG_PHY_GIGE /* per-board part of CPSW */#define CONFIG_PHYLIB + +It solved by ethaddr of bootenv. The problem caused by no ethaddr bootenv. For example if I bootup with network feature of u-boot, ethaddr bootenv is automatically applied. Without u-boot network initialize, kernel can't find ethaddr bootenv. So I added fixed "ethaddr=??:??:??:??:??:??\0" to ti_omap5_common.h. Now network is working without u-boot network config. + +Hello Yangwoo, I am glad to hear that. For your information, you can take a look on following threads: processors.wiki.ti.com/.../AM335x_U-Boot_User's_Guide#U-Boot_Network_configuration lists.denx.de/.../149291.html processors.wiki.ti.com/.../Linux_Core_U-Boot_User's_Guide https://e2e.ti.com/support/embedded/linux/f/354/t/141507 Best regards, Yanko + +Sorry It was not solution. I confused with mmc partion 1 and 2. It still not working without u-boot initialization + +Finally I add " #defineCONFIG_DRIVER_TI_CPSW" in u-boot with "ethaddr=??:?:??:??" of bootenv. after then it working now. Anyway still I need kernel patch to activate kernel network without u-boot dependency. because uboot spl will not excute any network feature. + +Yangwoo, CONFIG_DRIVER_TI_CPSW is defined in u-boot/board/ti/dra7xx/evm.c: #ifdef CONFIG_DRIVER_TI_CPSW #include #endif #ifdef CONFIG_DRIVER_TI_CPSW /* Delay value to add to calibrated value */ #define RGMII0_TXCTL_DLY_VAL ((0x3 << 5) + 0x8) #define RGMII0_TXD0_DLY_VAL ((0x3 << 5) + 0x8) #define RGMII0_TXD1_DLY_VAL ((0x3 << 5) + 0x2) #define RGMII0_TXD2_DLY_VAL ((0x4 << 5) + 0x0) #define RGMII0_TXD3_DLY_VAL ((0x4 << 5) + 0x0) #define VIN2A_D13_DLY_VAL ((0x3 << 5) + 0x8) #define VIN2A_D17_DLY_VAL ((0x3 << 5) + 0x8) #define VIN2A_D16_DLY_VAL ((0x3 << 5) + 0x2) #define VIN2A_D15_DLY_VAL ((0x4 << 5) + 0x0) #define VIN2A_D14_DLY_VAL ((0x4 << 5) + 0x0) Take a look on this patch set: comments.gmane.org/.../165201 Best regards, Yanko + +Below updated modification. Please check condition. It looks related with dpll clock setting. Can you check kernel dpll clock setting for gmac? I expect that kernel dpll for gmac is not perfect. + +I remove " CONFIG_DRIVER_TI_CPSW" and only remain below code in arch/arm/cpu/armv7/omap-common/clocks-common.c params = get_gmac_dpll_params(*dplls_data); do_setup_dpll((*prcm)->cm_clkmode_dpll_gmac, params, DPLL_LOCK, "gmac"); + diff --git a/data2/text/range/5001-10000/530614.txt b/data2/text/range/5001-10000/530614.txt new file mode 100644 index 0000000000000000000000000000000000000000..410660a506602154a74654a3561026a324e9e67c --- /dev/null +++ b/data2/text/range/5001-10000/530614.txt @@ -0,0 +1,18 @@ +Ticket Name: Processor Capable to decode MJPEG/H.264 for 4 Ethernet HD Camera Input + +Query Text: +Other Parts Discussed in Thread: TDA2, TDA2E Hi, We have project on having 3 or 4 HD Ethernet connection camera for Automotive and need to be display on LCD screen. Format output from HD Camera will be MJPEG or H.264 in AVB packet ot RTP packet. Frame size are 1080 x 720 with 30fps (can be adjust base on requirement. All the camera will input to a 4 port switch and having 1 output RGMII to CPU and display on the screen. The project are similar to Arround View Monitor, however on the LCD will have 3 section to display individual camera picture. The main task of the processor will be received the packet -> reconstruct the packet become a valid frame -> decode the frame -> rescale to LCD section size -> convert to RGB and display on LCD. 1) Did TDA2 or TDA2e are capable on handling the processing of the MJPEG and H.264 for 4 camera with no frame drop problem? 2) Any parts that can be recommend to me? 3) For TDA2 or TDA2e, what will be the OS using? 4) What is the bundle of the whole Evaluation Kit + Software part number sot that I can get quote from Avnet Supplier? 5) Any tranining material that I can refer to for the TDA2 or TDA2e, so that I can get more understand of the product. Thanks KJ Lee + +Responses: +Hello KJ Lee, TDA2 is capable of handling the 4-MJPEG streams through Ethernet. We do have lightweight AVB stack which handles network receive for MJPEG frames. For TDA2 devices we have Vision SDK software stack which has demos for network application similar one you are trying to do. The Vision SDK is based on TI RTOS. You can go through below for understanding more about TDA2 & TI Vision SDK. http://www.ti.com/lit/wp/spry260/spry260.pdf http://www.ti.com/lsds/ti/processors/dsp/automotive_processors/tdax_adas_socs/overview.page For part no & training videos I will get back to you once consult with my team members. If you have queries please let me know. Thanks. Regards, Prasad + +Hi Here is my comments, 1) Did TDA2 or TDA2e are capable on handling the processing of the MJPEG and H.264 for 4 camera with no frame drop problem? [Shiju] yes, you can use either TDA2x or TDA2ex for 4ch (1280x720 30fps) AVB capture + MJPEG/H264 decode + processing + display. 2) Any parts that can be recommend to me? [Shiju] Try with TDA2xx EVM, you can order the same from spectrum digital, or contact TI fields/sales 3) For TDA2 or TDA2e, what will be the OS using? [Shiju] on A15 you can use either Bios (TI RTOS) or any HLOS like Linux. Bios can be run on other cores (M4, DSP). 4) What is the bundle of the whole Evaluation Kit + Software part number sot that I can get quote from Avnet Supplier? [Shiju] You might Get the TDA2xx EVM + LCD display & Code Compose Studio as development/debugging platform. For debugging/connecting-to-target you need to use XDS560, same can be ordered from spectrum digital 5) Any tranining material that I can refer to for the TDA2 or TDA2e, so that I can get more understand of the product. [Shiju] search for TI automotive offerings, for details on TDA2xx devices. You can also download the TI automotive SW package “vision SDK” from CDDS, where we do have an example use case for 4ch (1280x720 30fps) AVB capture + MJPEG decode +.mosaic display. Regards, Shiju + +Hi Lee Added "vision SDK" SW download links - Vision SDK v02.10.00.00 Release Notes : cdds.ext.ti.com/.../emxNavigator.jsp Vision SDK v02.10.00.00 Release package - Linux Installer : cdds.ext.ti.com/.../emxNavigator.jsp Vision SDK v02.10.00.00 Release package - Windows Installer : cdds.ext.ti.com/.../emxNavigator.jsp regards, Shiju + +Hi Prasad, As I walk through the website, TDA2x development for the software only need CCS (TI-RTOS) and SDK. Correct if I'm wrong. 1) I'm waiting the part number of TDA2x processor + Evaluation kit part number so that I can request price from Avnet and plan for the project budget. 2) Which of TDA2x series that I can choose to use as I can't any information from the website? 3) Did TI-RTOS need to purchase or it come with Code Composer Studio (CCS) IDE? 4) Can I said that CCS mainly used with TI-RTOS for controlling the processor and communication to outside like CAN, Ethernet... etc? 5) Can I said that Vision SDK are using together with CCS IDE? 6) I need to buy the Vision SDK? 7) Any advantage of using TI-RTOS compare to HLOS like Linux? 8) for the CCS IDE are one time purchase? 9) Do I need to purchase library stack for MJPEG, Ethernet (AVB) , H.264... etc? Or are included in Vision SDK? Thanks KJ Lee + +Hi KJ Lee, Vision SDK is comprehensive SW package which can help you get started with what you need. There is no separate cost for it but you need to get NDA signed for it, otherwise its not available. All the SW stacks like mjpeg, AVB, etc are included in the SDK. There is also example demo showing AVB capture - display. CCS IDE provides debugging and development environment for Vision SDK. I will try to get a local sales representative contact you. regards Yashwant + +Hi Yashwant, We had done NDA signed between us, Avnet, and TI for the ADAS aplication. Currently we are looking for the suitable processor and estimate the project cost as for start. Is that license charge when using Vision SDK and commercial the product? Other than Evaluation board, emulator (purchase from 3rd party), CCS IDE need to purchase from TI, any other cost like license we need to pay as well? Thanks. KJ Lee + diff --git a/data2/text/range/5001-10000/536419.txt b/data2/text/range/5001-10000/536419.txt new file mode 100644 index 0000000000000000000000000000000000000000..8bfd4358320c9bbc396810cf0552e3a057a5a331 --- /dev/null +++ b/data2/text/range/5001-10000/536419.txt @@ -0,0 +1,52 @@ +Ticket Name: Enable channel 5 on TDA2xx + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, I want to enable 6 channels on TDA2xx. My Vision SDK version is v2.08 and running Linux on A15. Now, channel 1, 2, 3, 4, 6 are enabled. But channel 5 still can not work. I did following steps to enable channel 5: 1. Disable NDK in Rules.make 2. Set VIDEO_SENSOR_NUM_LVDS_CAMERAS as 6 in "vision_sdk\examples\tda2xx\include\video_sensor.h" 3. Set pinmux as following: Signal Name from CAMERA Signal used on TDA2 CAM5_D[2] VIN4B_D0 (U4) CAM5_D[3] VIN4B_D1 (V2) CAM5_D[4] VIN4B_D2 (Y1) CAM5_D[5] VIN4B_D3 (W9) CAM5_D[6] VIN4B_D4 (V9) CAM5_D[7] VIN4B_D5 (U5) CAM5_D[8] VIN4B_D6 (V5) CAM5_D[9] VIN4B_D7 (V4) CAM5_HSYNC VIN4B_HSYNC1 (U7) CAM5_VSYNC VIN4B_VSYNC1 (V6) CAM5_PCLK VIN4B_CLK1(V1) Is there anything I missed to enable the 5th VIP port? Thanks, Kevin + +Responses: +Hi Kevin, Your question has been forwarded to Vision SDK experts. They will comment here directly. thanks Alex + +Hi, Any update? Kevin + +Hi Kevin, I have sent a reminder, team will comment here directly. thanks, Alex + +Hi Kevin you need some kernel patches as well, FYI, I have attached both Kernel side and SDK side patches to enable 6ch capture. Please refer the patches, sometime these may not apply automatically on v2.8 version, if fails tray manually regards, Shiju6ch builld.zip + +Hi Shiju, Thanks for your patches. I still have two questions: 1. Should I exclude all EVE cores to enable 6 channels? May I include EVE1 & EVE2 for algorithm links? 2. It seems that my dts files are different from yours. I have no idea how to modify them based on your patch. Would you please check the files for me? ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm-infoadas.dts ti_components/os_tools/linux/kernel/omap/arch/arm/boot/dts/dra7-evm-vision.dts 1108.dts.tar.gz Thanks, Kevin + +Hi Shiju, Based on your patch, I have to modify line 444 in "dra7-evm-vision.dts". But there are only 128 lines in my "dra7-evm-vision.dts". I never changed dts files after I installed SDK. So that I am getting confused. I also got the same problem when I modify "/dra7-evm-infoadas.dts". If you have any suggestion about it, please tell me. Thanks, Kevin + +Kevin seems like some versioning compatibility issue. i will check your file & get back to you regards, Shiju + +rel2.10-uboot_kenel-patch-for6ch.zipKevin If possible can you migrate to 2.10 release, I have a patch (for both uboot & kernel) to support 6ch capture. PFA the same. BTW, i havn't tested this, please let me know if you face any issues regards, Shiju + +Hi Shiju, Thanks for your new patch. Building v2.10 environment and merging code may take several days for us. I will reach you when I am ready. Thanks, Kevin + +Kevin Just check if these paches can be manually apply on 2.8 version? regards, Shiju + +Hi Shiju, There are only 583 lines in my "mux_data.h", the same issue. mux_data.tar.gz Kevin + +mux_data-with-vin4b.hKevin Try use the attched file, I ahve applied the uboot patch on 2.8 version regards, Shiju + +From SDK side, modify /linux/examples/tda2xx/src/common/chains_main.c + gChains_usecaseCfg.numLvdsCh = 6; regards, Shiju + +As my first post, I have set pinmux by Starterware SDK. This time, I replace mux_data.h with your attached file. But whether I enable/disable my pinmux setting, channel 5 still does not output any frame. Maybe pinmux is not the main problem. I will try to migrate to v2.10. But if you have any other suggestion about v2.08, please let me know. Thanks again for your help. Kevin + +Kevin In TDA2X EVM, 5th camera is muxed with Ethernet, it’s a board level Mux issue. so if you enable Ethernet then 5th Cam will not work. i guess in one of the kernel patch I have disabled the Ethernet. BTW, I haven’t tried @ my end. I will check and let you know Regards, Shiju + +Hi Shiju, Because of versioning compatibility issue, I cannot use some of your patches. Our commercial agent suggested me setting NDK_PROC_TO_USE as none in vision_sdk/Rules.make to disable Ethernet. So I did. But now I see following messages when booting EVM: [ 7.154053] cpsw 48484000.ethernet: Detected MACID = a0:f6:fd:b3:4a:2e [ 7.161616] cpsw 48484000.ethernet: cpsw: Detected MACID = a0:f6:fd:b3:4a:2f ...... [ 10.200474] using random self ethernet address [ 10.204939] using random host ethernet address I think I have to disable Ethernet in another way. Do you have any suggestion about this? Kevin + +Kevin I just did a quick try, I too seeing the 5th channel issue. debuging. BTW, if you are not very paricular on Linux, then try with Bios only build (disable A15 or run Bios on A15) where you can get 6ch LVDS capture working by just set NDK_PROC_TO_USE=none and in chains_main_bios.c set gChains_usecaseCfg.numLvdsCh = 6; //VIDEO_SENSOR_NUM_LVDS_CAMERAS; for "4CH VIP Capture + Mosaic Display" usecase regards, Shiju + +Hi Shiju, We need to run OpenGL on Linux. Wait for your good news. Thanks, Kevin + +Kevin I could get all 6ch working with VSDK 2.10, Please apply the patch (6CAM_Patch.zip) attached on top of VSDK 2.10 and build/test again regards, Shiju 6CAM_Patch.zip + +Hi Shiju, An error occured when I compile chains_main.c with VSDK 2.10. "fatal error: include/config/system_cfg.h: No such file or directory" And I cannot find any file named system_cfg.h under vision_sdk. BTW, readme.txt mentions about Rules.make. But it is not included in the zip file. Can you help me to solve those problems? Thanks, Kevin + +Kevin pick only below change for chain_main.c. gChains_usecaseCfg.numLvdsCh = 6; You only need to apply below patches 1. 0001-dra7xx-mux_data-Add-pinmux-iodelay-for-VIN4B 2. dra7-evm-infoadas 3. dra7-evm-vision 4. chains_main - only change is gChains_usecaseCfg.numLvdsCh = 6; for LVDS capture + mosaic display usecase regards, Shiju regards, Shiju + +Hi Shiju, I try the four steps on v2.10. And channel 5th works now. Thanks for your help. Kevin + +Hi Kevin Thanks for the confirmation:) regards, Shiju + diff --git a/data2/text/range/5001-10000/547591.txt b/data2/text/range/5001-10000/547591.txt new file mode 100644 index 0000000000000000000000000000000000000000..0110d6520faa9d7cdf5154998054bc98a0e006cc --- /dev/null +++ b/data2/text/range/5001-10000/547591.txt @@ -0,0 +1,244 @@ +Ticket Name: Integrating Vision Algorithm on Vision SDK TDA3 + +Query Text: +Other Parts Discussed in Thread: TDA2 In our project, we have algorithm for vision algorithm for adas camera monitoring system using in c. Which is already working in TDA2 EVM board. I need to integrated with framework which is based on Vision SDK provided by Texas Intruments. To under stand Vision SDK completely,i would like to do Image Negative. I have attached the image which was generated by VSDK user case generation Using user case generation, i have generated file adasens_issImageNegative_priv.c adasens_issImageNegative_priv.h My image negative input, output structure and function prototype are below. typedef struct { unsigned char *ptImageInput; //Input Image to unsigned int uiNoRows; unsigned int uiNoCols; }stImageNegativeInput; chains_vipSingleCameraEdgeDetection.c /* + ******************************************************************************* + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * ALL RIGHTS RESERVED + * + ******************************************************************************* + */ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include "chains_vipSingleCameraEdgeDetection_priv.h" +#include + + +#define CAPTURE_SENSOR_WIDTH (1280) +#define CAPTURE_SENSOR_HEIGHT (720) + +/** + ******************************************************************************* + * + * \brief SingleCameraEdgeDetectionObject + * + * This structure contains all the LinksId's and create Params. + * The same is passed to all create, start, stop functions. + * + ******************************************************************************* +*/ +typedef struct { + + chains_vipSingleCameraEdgeDetectionObj ucObj; + + UInt32 captureOutWidth; + UInt32 captureOutHeight; + UInt32 displayWidth; + UInt32 displayHeight; + + Chains_Ctrl *chainsCfg; + +} Chains_VipSingleCameraEdgeDetectionAppObj; + +/** + ******************************************************************************* + * + * \brief Set Edge Detection Alg parameters + * + * It is called in Create function. + * In this function alg link params are set + * The algorithm which is to run on core is set to + * baseClassCreate.algId. The input whdth and height to alg are set. + * Number of input buffers required by alg are also set here. + * + * + * \param pPrm [IN] AlgorithmLink_EdgeDetectionCreateParams + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void chains_vipSingleCameraEdgeDetection_SetEdgeDetectionAlgPrms( + AlgorithmLink_EdgeDetectionCreateParams *pPrm, + Chains_Ctrl *chainsCfg) { + pPrm->maxWidth = CAPTURE_SENSOR_WIDTH; + pPrm->maxHeight = CAPTURE_SENSOR_HEIGHT; + + pPrm->numOutputFrames = 3; +} + + +/** + ******************************************************************************* + * + * \brief Set link Parameters + * + * It is called in Create function of the auto generated use-case file. + * + * \param pUcObj [IN] Auto-generated usecase object + * \param appObj [IN] Application specific object + * + ******************************************************************************* +*/ +Void chains_vipSingleCameraEdgeDetection_SetAppPrms(chains_vipSingleCameraEdgeDetectionObj *pUcObj, + Void *appObj) { + Chains_VipSingleCameraEdgeDetectionAppObj *pObj + = (Chains_VipSingleCameraEdgeDetectionAppObj *)appObj; + + pObj->captureOutWidth = CAPTURE_SENSOR_WIDTH; + pObj->captureOutHeight = CAPTURE_SENSOR_HEIGHT; + ChainsCommon_GetDisplayWidthHeight( + pObj->chainsCfg->displayType, + &pObj->displayWidth, + &pObj->displayHeight + ); + + ChainsCommon_SingleCam_SetCapturePrms(&(pUcObj->CapturePrm), + CAPTURE_SENSOR_WIDTH, + CAPTURE_SENSOR_HEIGHT, + pObj->captureOutWidth, + pObj->captureOutHeight, + pObj->chainsCfg->captureSrc + ); + + ChainsCommon_SetGrpxSrcPrms(&pUcObj->GrpxSrcPrm, + pObj->displayWidth, + pObj->displayHeight + ); + + + ChainsCommon_SetDisplayPrms(&pUcObj->Display_VideoPrm, + &pUcObj->Display_GrpxPrm, + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); + + ChainsCommon_StartDisplayCtrl( + pObj->chainsCfg->displayType, + pObj->displayWidth, + pObj->displayHeight + ); + + chains_vipSingleCameraEdgeDetection_SetEdgeDetectionAlgPrms + (&pUcObj->Alg_EdgeDetectPrm, + pObj->chainsCfg); +} + +/** + ******************************************************************************* + * + * \brief Start the capture display Links + * + * Function sends a control command to capture and display link to + * to Start all the required links . Links are started in reverce + * order as information of next link is required to connect. + * System_linkStart is called with LinkId to start the links. + * + * \param pObj [IN] Chains_VipSingleCameraEdgeDetectionAppObj + * + * \return SYSTEM_LINK_STATUS_SOK on success + * + ******************************************************************************* +*/ +Void chains_vipSingleCameraEdgeDetection_StartApp(Chains_VipSingleCameraEdgeDetectionAppObj *pObj) { + Chains_memPrintHeapStatus(); + + ChainsCommon_StartDisplayDevice(pObj->chainsCfg->displayType); + + ChainsCommon_StartCaptureDevice( + pObj->chainsCfg->captureSrc, + pObj->captureOutWidth, + pObj->captureOutHeight,1 + ); + + chains_vipSingleCameraEdgeDetection_Start(&pObj->ucObj); + + Chains_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +/** + ******************************************************************************* + * + * \brief Delete the capture display Links + * + * Function sends a control command to capture and display link to + * to delete all the prior created links + * System_linkDelete is called with LinkId to delete the links. + * + * \param pObj [IN] Chains_VipSingleCameraEdgeDetectionAppObj + * + ******************************************************************************* +*/ +Void chains_vipSingleCameraEdgeDetection_StopAndDeleteApp(Chains_VipSingleCameraEdgeDetectionAppObj + *pObj) { + chains_vipSingleCameraEdgeDetection_Stop(&pObj->ucObj); + chains_vipSingleCameraEdgeDetection_Delete(&pObj->ucObj); + + ChainsCommon_StopDisplayCtrl(); + ChainsCommon_StopCaptureDevice(pObj->chainsCfg->captureSrc); + ChainsCommon_StopDisplayDevice(pObj->chainsCfg->displayType); + + /* Print the HWI, SWI and all tasks load */ + /* Reset the accumulated timer ticks */ + Chains_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} + +/** + ******************************************************************************* + * + * \brief Single Channel Capture Display usecase function + * + * This functions executes the create, start functions + * + * Further in a while loop displays run time menu and waits + * for user inputs to print the statistics or to end the demo. + * + * Once the user inputs end of demo stop and delete + * functions are executed. + * + * \param chainsCfg [IN] Chains_Ctrl + * + ******************************************************************************* +*/ +Void Chains_vipSingleCameraEdgeDetection(Chains_Ctrl *chainsCfg) { + char ch; + UInt32 done = FALSE; + Chains_VipSingleCameraEdgeDetectionAppObj chainsObj; + + chainsObj.chainsCfg = chainsCfg; + + chains_vipSingleCameraEdgeDetection_Create(&chainsObj.ucObj, &chainsObj); + + chains_vipSingleCameraEdgeDetection_StartApp(&chainsObj); + + while(!done) { + ch = Chains_menuRunTime(); + + switch(ch) { + case '0': + done = TRUE; + break; + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + chains_vipSingleCameraEdgeDetection_printStatistics(&chainsObj.ucObj); + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", ch); + break; + } + } + + chains_vipSingleCameraEdgeDetection_StopAndDeleteApp(&chainsObj); + +} + + typedef struct { unsigned char *ptImageOutput; }stImageNegativeOutput; void ImageNegative(&stImageNegatvieInput,&stImageNegativeOutput); Assume that, chains_vipSingleCameraEdgeDetection.c(attched with this) is performing image negative. I have to call the ImageNegative for each frame. Can you please tell me, where i have to exactly call my ImageNegative fuctions and initialize the input and output structures. + +Responses: +Hi, Algorithm is integrated into Algorithm Link in Vision SDK. You have to create an algorithm link plug-in for your algorithm. Please refer to Chapter 4 in Vision SDK Development Guide. For example, you can refer to ~\VISION_SDK_02_xx_xx_xx\vision_sdk\examples\tda2xx\src\alg_plugins\edgedetection. + diff --git a/data2/text/range/5001-10000/565132.txt b/data2/text/range/5001-10000/565132.txt new file mode 100644 index 0000000000000000000000000000000000000000..96031cb670673dbb098efc2d6f18471fa8cf2e07 --- /dev/null +++ b/data2/text/range/5001-10000/565132.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2EVM5777: Pedestrian Detection with Network File source + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hi, I want to run the "vip_single_cam_object_detection2" pedestrian detection usecase on Vayu EVM with network file source instead of camera capture. In this usecase, I replaced the "Capture" Link with "NullSource" Link with network file read with the help of "chains_networkRxDisplay" usecase. While running I am giving my raw NV12 format YUV video through the "network_tx.exe" network tool that came with Vision SDK. Problem is: if I give only a single frame of this raw video as input, it is able to detect pedestrians properly in that frame. But when I give the raw video (multiple frames) as input, it is not able to detect any pedestrian in any frame. I am able to play the video on 10" LCD. I tried to change frame rate in my .c file to 30, 1, 0.5, 0.2 FPS by setting the NullSource Param "timerPeriodMilliSecs" to corresponding time in millisec. Following is my setup: Vayu EVM (DRA74x) Rev G3 with 10" LCD without Vision Application Board. Vision SDK 2.11.00.00 with tda2xx_evm_bios_all configuration NDK_PROC_TO_USE=ipu1_0 I am sensing there is some timing related issue between the links. Can you suggest what could be the problem? Regards, Abhishek Gupta + +Responses: +Hi, Abhishek, Your query has been forwarded to an expert. Regards, Mariya + +Do you see output video with no pedestrains marked ? OR You do not see any video on the display ? regards Kedar + +Hi Kedar, I am able to see the output video on display with no pedestrian marked. Regards Abhishek + +Can you send the use-case file that you modified ? Also what is the test input you are using ? It is possible to send few frames of the test input so that we can check at our end. The pedestrian detection algorithm has some notion of history so it shows a pedestrian only if it is detected few times in a sequence of frames. Also the pedestrian detection algorithm is just demo and may not work so well on arbitrary input streams. regards Kedar + +PD_e2e_post_files.zip I have attached the use-case file and 15 frames of input video that I am using. I have created the video from 15 consecutive images from the Caltech dataset which is widely used for training and testing pedestrian detection algorithms. Regards, Abhishek + +hi Abhishek, We are able to recreate the issue at our end. We will get back to you on the solution. regards Kedar + +I looked at the video that you shared - it is mostly a collection of random frames and not a continuous video. Since the object tracking looks at continuity for several frames, it won't be able to output a stable object location. If you don't have a proper video to give as input, you can create one from the following sequence: https://data.vision.ee.ethz.ch/cvl/aess/cvpr2008/seq03-img-left.tar.gz There are several such sequences in the following page: data.vision.ee.ethz.ch/.../ Let us know how it goes. Best regards, Manu. + +Hi Manu, Thanks for your response. It was able to detect pedestrians in the sequences from the data-vision link you shared. There are some places where it is not able to detect some person or some false positives, but since these is a demo algorithm, I am ok with that. Can you tell me on which technical paper is the algorithm based on? And on what dataset it is trained on? Another thing which I could see is that if I run at more than 5 FPS, the application gets stuck after a few frames. There may be an issue with my network connection which can't support such high rates of data transfer (for 640x480@5fps, it takes ~2.3MBps). Lesser than 5 FPS, it plays fine. Regards, Abhishek + +Hi Abhishek, The ACF detector is a popular pedestrian detection algorithm. You can check it out at the following link. You can also find literature references there. pdollar.github.io/.../ I am not competent enough to comment about the frame freeze - Kedar can probably help there. Btw, do you mind describing details of the application that you are targetting? Best regards, Manu. + +Abhishek, Currently networkRxDisplay use case is configured to run at very low frame rate so as to work on core like M4 as well. For enabling higher frame rate in the use case application file change below to Frame rate you desire. As you are running this use-case on TDA2 A15 you should be able to set it upto 30fps Change this pPrm->timerPeriodMilliSecs = 1000; to pPrm->timerPeriodMilliSecs = 1000/30; + +Hi Abhishek, we are also trying to send video through network port could you please tell me how you have linked "chains_networkRxDisplay" usecase with "vip_single_cam_object_detection2" usecase Thanks, Swati + +Hi Swati, Make a copy of vip_single_cam_object_detection2 folder in /vision_sdk/examples/tda2xx/src/usecases/vip_single_cam_object_detection2". Then follow the following steps: 1. Replace "Capture" in chains_vipSingleCameraObjectDetect2Tda3xx.txt to "NullSource" 2. In the chains_vipSingleCameraObjectDetect2Tda3xx.c, you will have to replace all the CapturePrms with NullSrcPrms from chains_networkRxDisplay usecase. This involves adding the function chains_myObjDetect_SetNullSrcPrms instead of ChainsCommon_SingleCam_SetCapturePrms. 3. If you are using NDK_PROC_TO_USE=a15_0 (and not ipu1_0) in /vision_sdk/configs/tda2xx_evm_bios_all/cfg.mk (depending on what board and config you are using) then you need to add that dependency in your usecase folder's cfg.mk Follow the build procedure as mentioned in the vision sdk developer's guide. Hope it helps. + +Hi Abhishek, Thank you for the help. I have one query have you tried running the usecase for FCW which is in "C:\VISION_SDK_02_12_00_00\ti_components\algorithms_codecs\REL.200.V.SFM.C66X.00.01.00.00\200.V.SFM.C66X.00.01\modules\ti_forward_collision_warning\test\src" following path through network port. if yes ,can you suggest how to provide video streams as input to the above sample usecase. + +Hi Swati, I have not tried to build or run the FCW algo. But I think providing video streams over network would be same as the chains_networkRxDisplay usecase. You will have to use the network_tx.exe on windows provided in Vision sdk to transfer the file. The command and details are mentioned in the Vision sdk developer's guide. Regards, Abhishek + diff --git a/data2/text/range/5001-10000/614700.txt b/data2/text/range/5001-10000/614700.txt new file mode 100644 index 0000000000000000000000000000000000000000..7fbcbf59139c4a26c3ffa52aac8d891d87e66f37 --- /dev/null +++ b/data2/text/range/5001-10000/614700.txt @@ -0,0 +1,36 @@ +Ticket Name: Linux/TDA2EVM5777: JTAG debugging and Linux running? + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello! My name is Marco and I'm trying to develop a TDA2 based project in the following constellation: My development platform is the XC5777X CPU Board with TDA2. I'm using latest visual SDK, latest CCS and a XDS200 debugger (Firmware upgrade done). On both A15 linux is running, the other cores have to be programmed bare metal and, of course, have to be debugged over JTAG. So my first question: If I have Linux running, how can I connect the other cores over JTAG chain? I can not start any GEL-Script, or other CCS-Stuff on the "Linuxed" CPU, but I can connect it. I have to release the cores (M4 and C66x) and make them able to be connected using CCS with the XDS200 debugger... and don't know how to do this. Maybe anybody can help me? Second question: I've downloaded the "visual SDK" and was a little bit suprised: Everything works fine, until you are in the use case of pre-developed TI-Stuff. But we have to use the last bit of performance out of M4 and DSP, so this one have to be coded bare metal. There's not really a way shown, how to use a gnu-compiler and build a startupcode for each internal CPU from scratch. The only way shown is using TI-BIOS, RTOS and the buildsystem based on "use cases", "algorithm"... which do not fit our requirements. Are there any other SDK or examples available, which shows a point of start for bare metal programming the TDA2+? (M4, DSP, PRUs, etc... bare metal, Linux almost works great on A15.) TNX - Marco. + +Responses: +Hi Marco, Which version of VisionSDK you have? Regards, Yordan + +I have vision SDK on BIOS 2.12.02.... + +Hi Marco, for your second question you can check if Starterware works for you. It is a software development package that provides no-OS platform support for ARM and DSP processors. It is located in "...\VisionSDK_2_12\ti_components\drivers\starterware_01_07_01_20\" directory and has comprehensive docs and examples. For the JTAG question I will ping an expert to comment. Regards, Yordan + +Thank you very much: I will take a look and give it a try. Marco + +Marco Reppenhagen Marco Reppenhagen said: If I have Linux running, how can I connect the other cores over JTAG chain? You will need to install the TDA2x device support(located in the auto dev package) on your CCS. See here Then you will need to target connect to A15. When connected successfully you will have to run TDA2xx_MULTICORE_EnableAllCores() gel from the gel menu. If gel is executed successfully, you will now be able to target connect to M4 and DSP. Thanks, Alex + +Alex Bashkov : Of course I have installed the TDA2x support. I'm also able to connect A15 with CCS over XDS200 and I can run M4 code and DSP code after calling the GEL script. That is not what I'm looking for, because if Linux runs on the A15 cores, I'm not able to run any gel script on it... So my question is, how can I connect the cores over JTAG when Linux uses both A15 cores? I have to debug my code in the running system, this will be linux on the main cores and bare metal code on the subcores. I can not "connect" the cores in CCS JTAG chain, even though they are almost running (firmware successfully loaded via remoteproc in Linux). I can not run any gel script, after linux have been bootet on A15 cores. I have sadly no idea how to fix this... + +Marco Reppenhagen, Why are you not able to run any gel script on AM15 cores? Do you receive an error if you try to run the DSP enable gel or you just don't want to disturb Linux? Basically as far as I know, for a standalone DSP app you will need to use ARM-based CCS GEL scripts to take the DSP out of reset, and to do this you need to connect to the ARM, but if you don't want to disturb Linux then you will need to disable the ARM-based GEL scripts from performing "on target connect" functionality. Basically, you don't want the ARM running any GEL scripts *except* the one to take the DSP out of reset. Once the DSP is out of reset, you can connect to the DSP and load/run/debug your app. Thanks, Alex + +Thank you: I will try to disable "on target connect" functionality and be back for a report, tomorrow. + +Hello! I'm back again after I've tried many approaches, but I'm still not able to connect to M4 Subcore during Linux is running. I can not execute the GEL-Script, which will bring up the M4 cores; Following Error occoured: IPU1SSClkEnable_API() cannot be evaluated. Target failed to read 0x4AE06514 at (*((unsigned int *) ((cpu_num==1) ? (((0x4AE00000+0x6000)+0x500)+0x14) : (((0x4AE00000+0x6000)+0x700)+0x214)))&0x4) [TDA2xx_multicore_reset.gel:373] at IPUSSClkEnable(1) [TDA2xx_multicore_reset.gel:311] at IPU1SSClkEnable_API() If I bring up the M4 (IPU1@58820000) in the Linux via "remoteproc" (loading a pre-compiled xem4 as "dra7-ipu1-fw.xem4") dmesg shows me: [ 2162.133520] remoteproc0: releasing 58820000.ipu [ 2165.749631] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000 [ 2165.749686] remoteproc0: 58820000.ipu is available [ 2165.749694] remoteproc0: Note: remoteproc is still under development and considere. [ 2165.749702] remoteproc0: THE BINARY FORMAT IS NOT YET FINALIZED, and backward comp. [ 2165.882920] remoteproc0: powering up 58820000.ipu [ 2165.882937] remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 4870616 [ 2165.883060] omap-iommu 58882000.mmu: 58882000.mmu: version 2.1 [ 2165.889434] remoteproc0: remote processor 58820000.ipu is now up [ 2165.889784] virtio_rpmsg_bus virtio0: rpmsg host is online [ 2165.890812] remoteproc0: registered virtio0 (type 7) I think, the IPU should be connectable over JTAG now... I tried IPU1/0 IPU1/1.. other m4 IPU2/0... second core: IPU2/1... with the following result: As mentioned: IPU2 (both cores) are still hold in reset. This is OK... because it have not been touched. BUT -> IPU1 (tried out both cores): This IPU1 core I've just started is not connectable in JTAG chain: "Can not access to DAP"... Why? It should be running... being out of reset, setup... a programm should run...? (I've no other processor in development, which cores can't be connected, if they have been setup successfully, and are successfully running, i can connect them over JTAG chain... there must be something missing here....) OK - I tried out to override the linux-stuff on M4 and started a new debug session on CSS. In detail I got the following error message: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.48.0) Do you have any suggestions, how to cope with this problem? THANK YOU - Marco. + +Hello again Marco Reppenhagen , Let me investigate your results thoroughly and try something out on my side. Will get back to you soon. Thanks Alex + +Thank you... I stand by for any kind of suggestions :-) + +As posted in another ticket: I've got another problem using "remoteproc" to use firmware in the sub-cores: The linux used in the latest (?) vision-sdk is quite old an do not support the control stuff... more precisely: It do not generate the "/sys/class/remoteproc/" directory. I installed the lates mainline kernel which generates this interface, but of course without any entry: The dra7xx dts do not deal with subcores. A15 Main CPU works fine, but I sadly do not found any support for ipu and/or dsp. My idea was to control the cores with linux and be shure they are running while I try to connect with JTAG chain as mentioned above in this thread. But this is temporary not possbile... Either I have to backport the mainline-kernel remoteproc code to the old 4.4. kernel used in SDK, or I have to implement the support of ipu and dsp into the mainline kernel. Before I try this on my own, I would like to ask you, if theres is any kernel ready to use with TDA2 subcore AND fully functional remoteproc interface available... Thank you: Marco + +OK... I found a solution: patchwork.kernel.org/.../ After patching I've got what I need. + +OK... Something new -> Short, FYI: I'm now able to build "something" like a firmware, which I can load into the M4 core. At this moment the startup-code is not working properly, the small programm is not running... but the Core change its state from "offline" to "running" after loading the ELF into the M4 via remoteproc... and after doing this, I'm able to connect the core over XDS200 using the CCS and a standard-ccxml Target confguration. (Later I will try to use this to "upload" some code via JTAG into the M4... (lack of time at the moment...) ) CU Marco. + +Now I've got a solution. Something went wrong building the ELF... placing the IVT by the " #pragma" which I had to replace using some "__XXX__" GCC instructions. Now I am able to build Cortex M4 code using arm-linux-gnueabi-xxx toolchain in a very small build environment and loading this as a firmware up to the M4s of the TDA2... it's running fine! Thank you for your support. + diff --git a/data2/text/range/5001-10000/638534.txt b/data2/text/range/5001-10000/638534.txt new file mode 100644 index 0000000000000000000000000000000000000000..3cf5db3b90b0fa0ce060d6cfe622c743aa2ede24 --- /dev/null +++ b/data2/text/range/5001-10000/638534.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2HG: Using GPIO pins as SPI chip select pins + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi All , We are using TDA2HG in one of our designs for video processing. I have 2 queries regarding the SPI and I2C interface: 1. We need to interface multiple camera companion chip sets through SPI interface for Booting of the companion chip set. we are running out of SPI controller chip select pins.Can we use GPIO pins as chip select pins ?, in that case do the IOSET timings will be preserved? 2. Controlling of Companion chip sets were implemented through I2C interface. Whether sharing the I2C bus between 2 companion chipsets affect the image quality or video processing ability? Thanks in advance , Dhanasekar.c + +Responses: +Hi Dhanasekar, I have forwarded your question to an expert for comment. Regards, Yordan + +Thanks Yordon + +Hi Dhanasekar, 1. No I don't think you can use a GPIO, MCSPI has an internal state machine that drives the CS pins. This allows also to use different settings for each CS to support different types of SPI peripherals on the same bus. There are 4 MSPIs x 4 CS each = 16 CSs in TDA2. They can be less however due the top-level muxing. How much do you have with your muxing configuration? 2. This will depend on your use case. If you need i2c transactions to the two sensors on same time, you will need two I2Cs (TDA2x has 4) . If I2C transactions can be subsequent obviously one I2C is enough. Particularly, the I2C speed will be also a driving factor (e.g. 100k, 400k, 1M or faster) and the sensor should support that speed. Regards, Stan + +Dear Stan , Thank you very much for your Prompt reply. Regarding SPI interface , we have already used 2 (SPI2 and SPI3) for Host MCU interfaces(Generic control interface and Lane sensing). Remaining 2 SPI ports were used for companion chipsets(SPI1 for controlling 4 chipsets and SPI4 for controlling two remaining companion chipsets). So we have used all the SPI ports. Can we Keep data and clock common for all camera companion chipsets , and have chip select signals from 2 different SPI ports, Say an example , Common Data and Common clock and 4 chipselect lines from SPI1 port and only 2 chipselect lines from SPI4 .Whether this type of connection is feasible and whether the timings will be preserved? Thanks in advance , Dhanasekar.c + +Sounds feasible to me. Most important point is to make sure the one MCSPI is not driving data out and clock while the other MCSPI is driving the bus. I.e. to avoid data out or clock contention if both MCSPIs attempt to drive the bus. Regards, Stan + +Dear Stan , Thank you very much for the guidance. Regards , Dhanasekar.c + +Dear Stan , Thank you very much for your guidance. I have query regarding the drive strength of SPI lines. We are accessing 6 Companion chip sets in single instant of time: We are using 3.3V logic SPI interface for interfacing SOC to the camera companion chipsets. Datasheet of TDA2HGH does not provide information regarding DC electrical charcteristsics for SPI interface. Can we use Dual voltage LVCMOS characteristics on page no. 166 of SOC datasheet for SPI electrical characterisstics? If yes , then can the output drive current range would be 6mA(minimum) to 3.3V/40 ohms = 82.5mA (Nominal) for each SPI interface pins? 6mA is minimum output drive current as per datasheet for 3.3V Dual voltage LVCMOS interface. 40 ohms is nominal impedance for 3.3V Dual voltage LVCMOS interface as per datasheet. Kindly let me know your suggestions on this. Thanks in advance , Dhanasekar.c + +Dear Stan , Thank you very much for your guidance. I have query regarding the drive strength of SPI lines. We are accessing 6 Companion chip sets in single instant of time: We are using 3.3V logic SPI interface for interfacing SOC to the camera companion chipsets. Datasheet of TDA2HGH does not provide information regarding DC electrical charcteristsics for SPI interface. Can we use Dual voltage LVCMOS characteristics on page no. 166 of SOC datasheet for SPI electrical characterisstics? If yes , then can the output drive current range would be 6mA(minimum) to 3.3V/40 ohms = 82.5mA (Nominal) for each SPI interface pins? 6mA is minimum output drive current as per datasheet for 3.3V Dual voltage LVCMOS interface. 40 ohms is nominal output drive impedance for 3.3V Dual voltage LVCMOS interface as per datasheet. I have attached the snap shot of the datasheet. Kindly let me know your suggestions on this. Thanks in advance , Dhanasekar.c + +Dhanasekar, Only now I understand you want to transmit data simultaneously to 4 slaves. This is not SPI was intended for, I presume you know it? Is this only a one-way transmission in your use-case?, i.e. SoC to slaves only? Can you draw some sort of schematic diagram so it will be easier to understand the concept? Regarding the pin drive strength, it is 6mA. You cannot source more than 6mA. Regards, Stan + +Dear Stan , Thank you very much for your reply on drive current for SPI bus. SPI communication between the SOC and slave devices is as follows: 1. Yes it is a two way communication. 2. We need to drive 6 slaves at a time. 3. SOC (Master) will broadcast the data to all slaves at the same time through MOSI line. 4. Slaves will acknowledge individually to the master through the MISO line. We have used 4 chipselect lines for 4 slaves from SPI1 Port of the SOC and 2 chipselect lines will be used either from SPI3 or SPI2 ports of SOC. We are taking data and clock only from SPI1 port. Data and clock lines of SPI3 or SPI4 port will not be used. As per the datasheet details the chipselect lines were also muxed with GPIO pins. In that scenario can we configure chip select lines as GPIO lines to enable the slave device? Please advice. I have attached a rough sketch of connection details. Regards , Dhanasekar.c + +Hi Dhanasekar, My answers inline. 1. Yes it is a two way communication. 2. We need to drive 6 slaves at a time. 3. SOC (Master) will broadcast the data to all slaves at the same time through MOSI line. [Broadcasting is not possible in SPI, you can only access one slave at a time] 4. Slaves will acknowledge individually to the master through the MISO line. [This is fine if you follow my comment for 3.] We have used 4 chipselect lines for 4 slaves from SPI1 Port of the SOC and 2 chipselect lines will be used either from SPI3 or SPI2 ports of SOC. We are taking data and clock only from SPI1 port. Data and clock lines of SPI3 or SPI4 port will not be used. As per the datasheet details the chipselect lines were also muxed with GPIO pins. In that scenario can we configure chip select lines as GPIO lines to enable the slave device? Please advice. [TI An SPI hardware 'knows' that it has only 4 CS-es. I'm thinking of one trick to overcome that: - You can use first 3 CS-es as usual [CS0-CS2] - You must disconnect CS3 from any external hardware (on PCB or via SoC pinmux). In your particular case you can switch (mux) CS3 to a GPIO. - SPI hardware will continue to think of its CS3 as of single device, but you (SW) will do the CS3-CS5 assertions artificially via 3x GPIOs. That is, when you need to access devices CS3-CS5, you need to assert the proper GPIO pin, and then, issue a transfer to CS3 of SPI1. Those above are only thoughts, I cannot guarantee it will work, nor I do know how the slaves work and their requirements to SPI modes and timing.] Best regards, Stan + diff --git a/data2/text/range/5001-10000/640064.txt b/data2/text/range/5001-10000/640064.txt new file mode 100644 index 0000000000000000000000000000000000000000..b4074f71c2c3170244e1df9d64e1c496298cad8f --- /dev/null +++ b/data2/text/range/5001-10000/640064.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/TDA2HA-17: Problems producing code for DSP outside TI-SDK + +Query Text: +Part Number: TDA2HA-17 Tool/software: Linux Team, Could you please answer the question from my customer. Please find below his questions. I’m not able to boot the DSPs of the TDA2+ outside SDK without using proprietary stuff. The only two questions I have to ask: What do I need to do so and where do I find the necessary code, like start-up snipped? Are you able to give me a simple example? The requirements I have to deal with: 1. Using cl6x toolchain is absolutely OK. 2. Build have to be embedded in a linux “Makefile” build environment, WITHOUT usage of XDC. 3. The Test-Chains of QM do not allow IDEs, such as CCS, so: 4. … Code must be compiled (assembled) ONLY in a Makefile environment 5. To handle Boot and Update processes: Linux runs on A15 core and will provide ALL SUBCORE STUFF using REMOTEPROC. Goals: Using only code which is REALLY necessary, so: Every line of code is desired and can be handled easy, managed in a simple boot-process. SHORT: So absolutely bare-metal code have to meet linux remoteproc I need: Startup-code Custom-Resource-table With a proper Linker-cmd file And of course: cl6x call -> How do I tell the compiler to create the “dra7-dsp1-fw.xe66” out of the just compiled obj linked together. Thank you. -Needhu + +Responses: +Hi Needhu, I have forwarded your question to an expert for comment. Regards, Yordan + +Hi Yordan, Thank you very much. Best, Needhu + +Hi Needhu, You should be able to start off with this by looking at the examples in ti_components\drivers\pdk_XX_XX_XX_XX\packages\ti\csl. These are pure makefile based examples including examples for C66x DSP. For instance, you can have a look at the csl\example\uart\uart_test. This will have the code after main. For the initialization code before main, you can have a look at csl\arch\c66x\src interrupt.c file. You can download the latest processor SDK Vision from http://www.ti.com/tool/processor-sdk-vision Thanks and Regards, Piyali + +Hi Piyali, Thank you very much for the info. As a reference for other customers, please find below further information that I received offline. Please have a look at SYS/BIOS code for the AMMU and BIOS startup code. The main code is in C files, so it should be possible to convert that to a bare-metal C code just as well. https://github.com/n-aizu/freertos-multicore/tree/master/FreeRTOS-Plus/BSP/OMAP4_CM3_GCC Following is another project that is using Makefiles and baremetal code, but it is associated with a different kind of remote processor: a PRU. http://git.ti.com/gitweb/?p=pru-software-support-package/pru-software-support-package.git;a=shortlog;h=refs/heads/master The folders to look at (lib/src/rpmsg_lib for the Virtio rpmsg transport code (need to replace pru_virtqueue_kick) (equivalent of http://git.ti.com/gitweb/?p=ipc/ipcdev.git;a=tree;f=packages/ti/ipc/rpmsg;h=4c40631361d0d0f697ab525f9e0a3288df19c118;hb=refs/heads/3.47) and examples/am572x/PRU_RPMsg_Echo_Interrupt1_0 Regarding your questions, 1 . Makefile usage is fairly standard, the only difference is that you are using the C66x compiler and different ISAs, but if one knows how to write standard Makefiles for a project, then there is nothing different required for DSPs. Example from the M3 project: https://github.com/n-aizu/freertos-multicore/blob/master/FreeRTOS/Demo/CORTEX_M3_PANDA/rpmsg-client-sample/Makefile 2. Linker file: Again this is standard. I would say to look at the regions defined in evmDRA7XX_ExtMemMapDsp in the following file http://git.ti.com/gitweb/?p=ipc/ipcdev.git;a=blob;f=packages/ti/ipc/tests/package.bld;h=6b2a9decc53465685cb57ce45a305d2df5d8c3d6;hb=refs/heads/3.47 and convert it to a standard linker .ld file. Example from the M3 project: https://github.com/n-aizu/freertos-multicore/blob/master/FreeRTOS-Plus/BSP/OMAP4_CM3_GCC/base/omap4_cm3.ld 3. Resource Table There is nothing fancy about this, it is just a structure and a properly filled structure and is simply a header file at the end of the day. You can look up the references in either the above IPC packages/ti/ipc/tests folder or the PRU examples project3. dra7-dsp1-fw.xe66 is just the name of the executable in your file system. Only requirement for it is that it should be an ELF file a “.resource_table” section. So, as long as the Makefile generates an ELF file with the appropriate .resource_table section, you can just rename whatever is the generated output image file (*.out or *.elf etc). Xe66 is just the extension created with SYS/BIOS and XDC and DSP CGT, but it is still an ELF file. Thank you. Best, Needhu + +Team, Where can I find the EVE simulator tools for TDA2+? Could you also provide me a few examples or application notes on this. I would also appreciate simple bare metal codes examples for EVE - subsystem. Thanks, Needhu + +Hi Needhu, you can find Vayu Subsystem Simulator here: cdds.ext.ti.com/.../emxNavigator.jsp (you can check the "vayu_simulator_user_guide.pdf" for supported features) Unfortunately simulators are not supported for CCS past v5: e2e.ti.com/.../2179980 Hope this helps. Regards, Yordan + diff --git a/data2/text/range/5001-10000/663469.txt b/data2/text/range/5001-10000/663469.txt new file mode 100644 index 0000000000000000000000000000000000000000..9cb4fe149baed0f6a2bf35ef684fb2eb8712c391 --- /dev/null +++ b/data2/text/range/5001-10000/663469.txt @@ -0,0 +1,246 @@ +Ticket Name: RTOS: Tda2xx uart can't output print message + +Query Text: +Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS 1). When I use ccs6 debug tda2xx board, ccs console can't output print message. file_path: vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/a15_0/src/main_common_a15_0.c In Int32 main_common(void) I put UARTConsoleInit(UART3_INST); UARTprintf(" \r\n***** A15_0 Firmware build time"); after compiling successfully and download it into board through simulation tool, nothing print out on serial port tool when I run it. attach is source file. 2021.main_common_a15_0.c /* +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/** + ******************************************************************************* + * + * \file main_a15_01.c + * + * \brief This file implements the A15_0 main() + * + * This file has the A15_0 main(), the entry point to the core. + * Set the A15 clock and call System_start() & BIOS_start() + * + * \version 0.0 (Jul 2013) : [SS] First version + * + ******************************************************************************* +*/ + +/******************************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include +#include +#include +#include +#include "detector.h" +#include "/usr/local/PROCESSOR_SDK_VISION_03_01_00_00/ti_components/drivers/pdk_01_08_00_16/packages/ti/drv/stw_lld/uartconsole/uartConsole.h" +#include "/usr/local/PROCESSOR_SDK_VISION_03_01_00_00/ti_components/drivers/pdk_01_08_00_16/packages/ti/drv/stw_lld/uartconsole/uartStdio.h" + +/******************************************************************************* + * Function prototypes + ******************************************************************************* + */ +Int32 System_start(Task_FuncPtr chainsMainFunc); +Int32 StartupEmulatorWaitFxn (void); +Void A15_main(UArg arg0, UArg arg1); +void mainA15TimerTick(UArg arg); + +/** + ******************************************************************************* + * + * \brief This function implements the wait loop of A15. + * + * This function would get called if the A15_0 doesn't run the demo + * or application. It is not used if A15_0 runs the app. Do not + * remove this function, required when App is moved out of A15 + * + * \param arg0 [IN] + * \param arg1 [IN] + * + * \return void + * + ******************************************************************************* + */ +Void A15_main(UArg arg0, UArg arg1) +{ + UInt32 state; + //UInt32 coreId = System_getSelfProcId(); + + while (1) + { + BspOsal_sleep(100U); + //Utils_getAppInitState(coreId, &state); + //if (state == CORE_APP_INITSTATUS_DO_EXIT) + //{ + // break; + //} + test_main(); + } +} + +/** + ******************************************************************************* + * + * \brief This is the main() implementation of A15. + * + * This is the first function and entry point to A15, does + * - Set the correct/required CPU frequency + * - Call the System_start with A15_main() and loops there + * + * \return SYSTEM_LINK_STATUS_SOK + * + ******************************************************************************* + */ +Int32 main_common(void) +{ + /* This is for debug purpose- see the description of function header */ + StartupEmulatorWaitFxn(); + + /* This should the first call for initializing the remote debug server + */ + RemoteLog_init(); + Vps_printf(" ***** A15_0 Firmware build time %s %s \n", + __TIME__,__DATE__); + + + { + UInt32 clkHz; + + clkHz = Utils_getClkHz(UTILS_CLK_ID_A15); + + if(clkHz==0U) + { + clkHz = SYSTEM_A15_FREQ; + } + + Utils_setCpuFrequency(clkHz); + } + + //Utils_idlePrepare(); + UARTConsoleInit(UART3_INST); + //BOARDConfigModulePinMux(DEVICE_ID_UART, DEVICE_UART_INST_ID_3,BOARD_MODE_DEFAULT); + //BOARDSelectDevice(DEVICE_ID_UART, DEVICE_UART_INST_ID_3); + //PlatformUART3SetPinMux(); + //UARTStdioInit(); + + //UARTConsoleInit(UART2_INST); + //UARTPuts("\r\nUart Init Done \r\n", -1); + //UART_Init(UART3_INST); + UARTprintf(" \r\n***** A15_0 Firmware build time"); + //UARTPuts("\r\nUart Init Done \r\n", -1); + + System_start(A15_main); + + BIOS_start(); + + /* test sourcode */ + + + return (SYSTEM_LINK_STATUS_SOK); +} + +/** + ******************************************************************************* + * + * \brief This function enables the A15 debug option + * + * This function enables the A15 debug option from main() onwards + * - Set the volatile variable enableDebug = 1 to enable debug + * - rebuild the code with enableDebug = 1 + * - Once enableDebug is set to 1, the control waits in this + * function even after the free-run + * - Can connect to core A15via CCS and J-Tag to debug + * - Once CCS is connected, reset enableDebug = 0 to come out of + * this function and proceeds with further debug + * + * \return SYSTEM_LINK_STATUS_SOK + * + ******************************************************************************* + */ +Int32 StartupEmulatorWaitFxn (void) +{ + volatile Int32 enableDebug = 0; + do + { + }while (enableDebug); + return SYSTEM_LINK_STATUS_SOK; +} + +/** + ******************************************************************************* + * + * \brief This function enables the A15 Timer Ticks + * + * \param arg [IN] + * + ******************************************************************************* + */ +void mainA15TimerTick(UArg arg) +{ + Clock_tick(); +} + +/* Nothing beyond this point */ + +Responses: +Hi, I have forwarded your question to an expert for comment. Regards, Yordan + +when will expertt contact me ? does the expert contact me by this forum or by email ? + +Hi Xiangtong, Are you using the TI EVM for this test? The TDA2xx TI EVM does not have UART3 populated. If your board does have UART3 populated, you can check on the following aspects: 1. Has the UART3 IP PRCM been enabled? (Clocks enabled for the IP) 2. The pin muxing has been done properly for the UART3 lines to be sent out the TDA2 device based on your board schematics. Thanks and Regards, Piyali + +Hi Xiangtong, We haven't heard back from you on this one.. Is this resolved? Thanks and Regards, Piyali + diff --git a/data2/text/range/5001-10000/678523.txt b/data2/text/range/5001-10000/678523.txt new file mode 100644 index 0000000000000000000000000000000000000000..f4f5f5470bad217acd245389b70de486d73393de --- /dev/null +++ b/data2/text/range/5001-10000/678523.txt @@ -0,0 +1,30 @@ +Ticket Name: CCS/TDA2: new tda2x EVM , Blackhawk XDS560v2-USB test connection failed + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio a new tda2x EVM , Blackhawk XDS560v2-USB System Trace Emulator (this have connect to tda3x evm successful ,now i just change to tda2x evm ) i see the pdf the power supply is 12V 7 A ,But I use 12v 2.5A replace; if i launch the target configuring ,it stop much time like follow + +Responses: +Hi Shuai, Have you tried the Test Connection option in the ccxml file to check if the JTAG scan chain path is okay? This should give you an idea if the basic connection is fine. If the Test Connection also fails, I would suggest you to update your power supply to the recommended EVM power supply and then give it another try. Thanks and Regards, Piyali + +Hi :Piyali Have you tried the Test Connection option in the ccxml file to check if the JTAG scan chain path is okay? I uploaded 3 pictures, the one in the middle is try to test connection , then it stop there like the picture along time. i think it doesnot finished, then i close the test connection window , CCS is hanging out. BESTWISHES SHUAI + +Hi SHUAI Thanks for confirming! Can you please try with a different EVM power supply (7A)? Thanks and Regards, Piyali + +Another thing to try is to reduce the TCK clock frequency and check if the issue is resolved for you. You can get the TCK clock frequency in the ccxml file, when you click on "Blackhawk XDS560v2 USB System Trace Emulator 0" (First line in the advanced tab) Thanks and Regards, Piyali + +Hi :Piyali i try EVM power supply (7A) , but it also cannot connect. BEST wishes + +Hi Shuai, Thank you for trying the experiment! Have you been able to try the Lowering of TCK clock? From the picture of your evm I could not quite read the sysboot pin settings. Can you also please make sure the sysboot pin settings are SYSBOOT(SW2)[1:16] = 00000000 10000001 ? Thanks and Regards, Piyali + +Hi Piyali SYSBOOT(SW2)[1:16] = 00000000 10000001 ? sysboot pin settings are right try the Lowering of TCK clock? i donot know how to do this , follow is the ccxml file + +Hi Piyali JTAG TCLK frequency i try legacy 10.368MHZ limit and faster 35.0 Mhz limit . both the same ,even JTAG no conect with evm is the same + +Hi Piyali I try to I installed CCS in the virtual machine and tried to connect ，，follow is the result! [Start: Blackhawk XDS560v2-USB System Trace Emulator_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/hancan/.ti/ccs740/0/0/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 560/2xx-class product. This utility will load the program 'libbh560v2u.out'. E_RPCENV_IO_ERROR(-6) No connection: open failed: code 19 Download failed for file /home/hancan/ti/ccs740/ccsv7/ccs_base/common/uscif/./././././xds560v2.out An error occurred while soft opening the controller. -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-250' (0xffffff06). The title is 'SC_ERR_ECOM_EMUNAME'. The explanation is: An attempt to access the debug probe via USCIF ECOM has failed. [End: Blackhawk XDS560v2-USB System Trace Emulator_0] + +I don't think you SYSBOOT is configured correctly either. Can you make sure it boots fine from an MMC, then remove the card and try the JTAG connection again? You can just quickly try to mimic the SYSBOOT from TDA3x that works for you. Thanks Alex + +Hi Alex Can you make sure it boots fine from an MMC . How to do? SYSBOOT(SW2)[1:16] = 00000000 10000001 ? is set right . anyother to do ?? could your Describe the operation steps！ BEST WISHES + +JTAG TCLK frequency i try legacy 10.368MHZ limit and faster 35.0 Mhz limit . + diff --git a/data2/text/range/5001-10000/679186.txt b/data2/text/range/5001-10000/679186.txt new file mode 100644 index 0000000000000000000000000000000000000000..8de2812ef2a7b1a285cf0142aea76d59dc3f3ac8 --- /dev/null +++ b/data2/text/range/5001-10000/679186.txt @@ -0,0 +1,138 @@ +Ticket Name: TDA2: TIDL-1.1 SSD model test application output + +Query Text: +Part Number: TDA2 Hi , I changed config_list.txt to "1 C:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDL.01.01.00.00\modules\ti_dl\test\testvecs\config\infer\tidl_config_jdetnet.txt" so that it can run the SSD model and look at the profile output and the output result. The result bin file contains 560 values for 768X320 image. How to make sense of this output bin file? Can we extract bounding boxes from this data? + +Responses: +Refer Line number for 327 for output for of SSD object detection layer for output format. github.com/.../detection_output_layer.cpp It is 20 bounding box parameter each 7 float values (20x7x4). Please refer vision SDK OD use case example code for more details. This network is optimal when split between EVE and DSP (Tail end layers are best optimal on DSP). Set runFullNet = 0 in the infer config file for EVE profile numbers only. We would recommend the Vision SDK profile log for better understanding SSD performance. + +Hi Kumar, Thank you for the reply. Now I'm able to make sense of the output and the profile numbers are accurate. I have few more questions: 1) How many classifications are possible. In the given test input I see pedestrian, road sign and one another. 2)How many layers run on EVE and how many on DSP? 3)I'm attaching the output bin file(changed the extension to .lib). One of the bounding boxes values is wrong. It's ymax is less than ymin and Is classified as 3 with a confidence of 0.7. it is marked as blue in the image attached. Can you please confirm whether the output is correct. Because I do not have a reference bin file for this. stats_tool_out_eve.lib + +1. The model that is used in demo was trained with 4 classes. increasing the number of classes (We have tested with 21, we can increase further as well) will have minimal imapact on EVE performace and will have considerable impact on DSP performace . 2. layers with layersGroupId == 1 are running on EVE and and layers with layersGroupId == 2 are running on DSP 3.The vehicle (atleaste three) in the images also needs to be detected. Can you run the model with "runFullNet = 1" on EVE and check whether you observe the Bbox for vehicle. Because of cahce coherency issues in the stanalone test bench, the output may be wrong some time in the DSP + +I had run it with runFullNet = 1 and on an EVE simulator... + +Could you please try on target (EVE), We have not tried recently on EVE simulator. + +I tried it on the target. The results still remain the same. + +Hi, The output (stats_tool_out_eve.lib) you attached in previous post looks correct and I used the same for visualisation. See below screenshot for your reference. So, looks like there is some problem in your visualisation tool. Please check. Thanks, Praveen + +Hi Praveen, I'm attaching my c code to read the bin file and draw the BB on the image. Let me know whether its the right way to read values from the bin file. markBox.c #include +#include + +int main() +{ + FILE *fi, *fb, *fout; + float data[4]; + float label; + float dummy; + uint8_t orig[768*320]; + uint8_t result[768*320*3]; + int x1, x2; + uint16_t xmin, ymin, xmax, ymax; + uint8_t value; + uint8_t Red, Green, Blue; + + fi = fopen("trace_dump_0_768x320.raw", "r"); + fb = fopen("stats_tool_out_eve.bin", "r"); + fout = fopen("markedBoxes.ppm", "w"); + + fread(&orig[0], 768 * 320, sizeof(uint8_t), fi); + + for(x1 = 0; x1 < 320; x1 ++) + { + for(x2 = 0; x2 < 768; x2 ++) + { + value = orig[(x1 * 768) + x2]; + result[(x1 * 768 * 3) + (x2 * 3)]= value; + result[(x1 * 768 * 3) + (x2 * 3) + 1] = value; + result[(x1 * 768 * 3) + (x2 * 3) + 2] = value; + } + } + + for(x2 = 0; x2 < 20; x2 ++) + { + fread(&dummy, 1, sizeof(float), fb); + + fread(&label, 1, sizeof(float), fb); + + fread(&dummy, 1, sizeof(float), fb); + + fread(&data[0], 4, sizeof(float), fb); + + xmin = (uint16_t)(data[0] * 768); + ymin = (uint16_t)(data[1] * 320); + xmax = (uint16_t)(data[2] * 768); + ymax = (uint16_t)(data[3] * 320); + + // printf("data[3] = %f, ymax = %d\n", data[3], ymax); + + // printf("%f - (%f, %f) (%f, %f) - %f\n", label, data[0], data[1], data[2], data[3], dummy); + printf("%d - (%d, %d) (%d, %d) - %f\n\n", (uint8_t)label, xmin, ymin, xmax, ymax, dummy); + + if(label == 1) + { + Red = 255; + Green = 0; + Blue = 0; + } + + if(label == 2) + { + Red = 0; + Green = 255; + Blue = 0; + } + + if(label == 3) + { + Red = 0; + Green = 0; + Blue = 255; + } + + for(x1 = xmin; x1 <= xmax; x1 ++) + { + result[(ymin * 768 * 3) + (x1 * 3)] = Red; + result[(ymin * 768 * 3) + (x1 * 3) + 1] = Green; + result[(ymin * 768 * 3) + (x1 * 3) + 2] = Blue; + } + + for(x1 = xmin; x1 <= xmax; x1 ++) + { + result[(ymax * 768 * 3) + (x1 * 3)] = Red; + result[(ymax * 768 * 3) + (x1 * 3) + 1] = Green; + result[(ymax * 768 * 3) + (x1 * 3) + 2] = Blue; + } + + for(x1 = ymin; x1 <= ymax ; x1 ++) + { + result[(x1 * 768 * 3) + (xmin * 3)] = Red; + result[(x1 * 768 * 3) + (xmin * 3) + 1] = Green; + result[(x1 * 768 * 3) + (xmin * 3) + 2] = Blue; + } + + for(x1 = ymin; x1 <= ymax ; x1 ++) + { + result[(x1 * 768 * 3) + (xmax * 3)] = Red; + result[(x1 * 768 * 3) + (xmax * 3) + 1] = Green; + result[(x1 * 768 * 3) + (xmax * 3) + 2] = Blue; + } + } + + fprintf(fout, "P3 768 320 255 "); + for(x1 = 0; x1 < 768 * 320 * 3; x1 ++) + fprintf(fout, "%d ", result[x1]); + + fclose(fi); + fclose(fb); + fclose(fout); + + return 1; +} I feel its right because it works for all others except for vehicle detection values. + +Hi Praveen, I fixed it. I was reading the bin file in text mode on windows, hence it was hitting a early EOF. I opened it in binary mode and now it runs fine. Thank you + +Hi, Thanks for the update. Glad to hear that. Regards, Praveen + diff --git a/data2/text/range/5001-10000/679535.txt b/data2/text/range/5001-10000/679535.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c32a4aa3a306585069527795332a47b22d8f977 --- /dev/null +++ b/data2/text/range/5001-10000/679535.txt @@ -0,0 +1,8 @@ +Ticket Name: TDA2: EVE frequency only half? + +Query Text: +Part Number: TDA2 Hi: I am using the TDA2SX.In the datasheet,I see the EVE frequency is 650M max.But In the SBL Boot print log,I see the EVE Frequency is only 325MHz Max,is only half. Is there something wrong? The SBL Boot print log is follow: "[EVE1 ] 8.848959 s: ***** EVE Firmware build time 09:59:46 Apr 9 2018 [EVE1 ] 8.850545 s: *** SYSTEM: CPU Frequency , [EVE1 ] 8.876776 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE1 ] 8.878393 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE1 ] 8.879979 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE1 ] 8.881473 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE1 ] 8.882968 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE1 ] 8.884462 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [EVE1 ] 8.885926 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [EVE1 ] 8.887268 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE1 ] 8.888641 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE1 ] 8.890837 s: SYSTEM: System Common Init in progress !!! [EVE1 ] 8.893247 s: UTILS: CIO: Init Done !!! [EVE1 ] 8.894192 s: SYSTEM: IPC init in progress !!! [EVE1 ] 8.895626 s: SYSTEM: Notify init done !!! [EVE1 ] 8.897547 s: SYSTEM: MsgQ init done !!! [EVE1 ] 8.898462 s: SYSTEM: IPC init DONE !!! [EVE1 ] 8.912554 s: SYSTEM: Initializing TIOVX ... [EVE1 ] 8.914079 s: VX_ZONE_INIT:Enabled [EVE1 ] 8.915695 s: VX_ZONE_ERROR:Enabled [EVE1 ] 8.917251 s: VX_ZONE_WARNING:Enabled [EVE1 ] 8.921399 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [EVE1 ] 8.922680 s: SYSTEM: Initializing TIOVX ... Done !!! [EVE1 ] 8.923930 s: SYSTEM: System Common Init Done !!! [EVE1 ] 8.925486 s: SYSTEM: System EVE Init in progress !!! [EVE1 ] 8.926950 s: UTILS: DMA: HWI Create for INT8 !!! [EVE1 ] 8.928140 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE1 ] 8.929421 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE1 ] 8.931739 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) [EVE1 ] 8.933874 s: SYSTEM: Initializing Links !!! [EVE1 ] 9.027420 s: SYSTEM: Initializing Links ... DONE !!! [EVE1 ] 9.028457 s: SYSTEM: System EVE Init Done !!! [EVE2 ] 8.857652 s: ***** EVE Firmware build time 09:59:44 Apr 9 2018 [EVE2 ] 8.859452 s: *** SYSTEM: CPU Frequency , [EVE2 ] 8.879064 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE2 ] 8.880650 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE2 ] 8.882114 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE2 ] 8.883608 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE2 ] 8.885133 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE2 ] 8.886536 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [EVE2 ] 8.887878 s: SYSTEM: Notify register to [EVE3] line 0, event 15... [EVE2 ] 8.889251 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE2 ] 8.890776 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE2 ] 8.892911 s: SYSTEM: System Common Init in progress !!! [EVE2 ] 8.895656 s: UTILS: CIO: Init Done !!! [EVE2 ] 8.896602 s: SYSTEM: IPC init in progress !!! [EVE2 ] 8.897761 s: SYSTEM: Notify init done !!! [EVE2 ] 8.899591 s: SYSTEM: MsgQ init done !!! [EVE2 ] 8.900475 s: SYSTEM: IPC init DONE !!! [EVE2 ] 8.914506 s: SYSTEM: Initializing TIOVX ... [EVE2 ] 8.916183 s: VX_ZONE_INIT:Enabled [EVE2 ] 8.917708 s: VX_ZONE_ERROR:Enabled [EVE2 ] 8.919721 s: VX_ZONE_WARNING:Enabled [EVE2 ] 8.924571 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [EVE2 ] 8.926035 s: SYSTEM: Initializing TIOVX ... Done !!! [EVE2 ] 8.927011 s: SYSTEM: System Common Init Done !!! [EVE2 ] 8.927987 s: SYSTEM: System EVE Init in progress !!! [EVE2 ] 8.929482 s: UTILS: DMA: HWI Create for INT8 !!! [EVE2 ] 8.930671 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE2 ] 8.932013 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE2 ] 8.934270 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) [EVE2 ] 8.936588 s: SYSTEM: Initializing Links !!! [EVE2 ] 9.029738 s: SYSTEM: Initializing Links ... DONE !!! [EVE2 ] 9.030683 s: SYSTEM: System EVE Init Done !!! [EVE3 ] 8.857317 s: ***** EVE Firmware build time 09:59:43 Apr 9 2018 [EVE3 ] 8.859177 s: *** SYSTEM: CPU Frequency , [EVE3 ] 8.881260 s: SYSTEM: Notify register to [IPU1-0] line 0, event 15... [EVE3 ] 8.882785 s: SYSTEM: Notify register to [IPU1-1] line 0, event 15... [EVE3 ] 8.884310 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [EVE3 ] 8.885774 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [EVE3 ] 8.887146 s: SYSTEM: Notify register to [DSP2] line 0, event 15... [EVE3 ] 8.888519 s: SYSTEM: Notify register to [EVE1] line 0, event 15... [EVE3 ] 8.889861 s: SYSTEM: Notify register to [EVE2] line 0, event 15... [EVE3 ] 8.891447 s: SYSTEM: Notify register to [EVE4] line 0, event 15... [EVE3 ] 8.892972 s: SYSTEM: Notify register to [HOST] line 0, event 15... [EVE3 ] 8.895412 s: SYSTEM: System Common Init in progress !!! [EVE3 ] 8.897974 s: UTILS: CIO: Init Done !!! [EVE3 ] 8.898889 s: SYSTEM: IPC init in progress !!! [EVE3 ] 8.899987 s: SYSTEM: Notify init done !!! [EVE3 ] 8.902031 s: SYSTEM: MsgQ init done !!! [EVE3 ] 8.902915 s: SYSTEM: IPC init DONE !!! [EVE3 ] 8.916580 s: SYSTEM: Initializing TIOVX ... [EVE3 ] 8.918135 s: VX_ZONE_INIT:Enabled [EVE3 ] 8.920118 s: VX_ZONE_ERROR:Enabled [EVE3 ] 8.921948 s: VX_ZONE_WARNING:Enabled [EVE3 ] 8.926645 s: VX_ZONE_INIT:[tivxInit:48] Initialization Done !!! [EVE3 ] 8.927743 s: SYSTEM: Initializing TIOVX ... Done !!! [EVE3 ] 8.928750 s: SYSTEM: System Common Init Done !!! [EVE3 ] 8.929726 s: SYSTEM: System EVE Init in progress !!! [EVE3 ] 8.931251 s: UTILS: DMA: HWI Create for INT8 !!! [EVE3 ] 8.932440 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [EVE3 ] 8.933691 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE3 ] 8.936161 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252552 B (246 KB) [EVE3 ] 8.938510 s: SYSTEM: Initializing Links !!! [EVE3 ] 9.030561 s: SYSTEM: Initializing Links ... DONE !!! [EVE3 ] 9.031568 s: SYSTEM: System EVE Init Done !!! [EVE4 ] 8.858567 s: ***** EVE Firmware build time 09:59:44 Apr 9 2018 [EVE4 ] 8.860336 s: *** SYSTEM: CPU Frequency , " Regards + +Responses: +Hi This is showing the ARP32 CPU frequency. This is half of EVE frequency in the design. Thanks and Regards, Piyali + diff --git a/data2/text/range/5001-10000/680154.txt b/data2/text/range/5001-10000/680154.txt new file mode 100644 index 0000000000000000000000000000000000000000..6f5607e5f4768130c18afa78c2552c2b1e7b1cc6 --- /dev/null +++ b/data2/text/range/5001-10000/680154.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: Can't start weston + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I cant seem to start the weston with drm backend VISION_SDK version : 03_02_00_00 log: root@dra7xx-evm:/opt/vision_sdk# weston --backend=drm-backend.so --tty=1 Date: 2018-04-11 UTC [16:07:06.542] weston 1.9.0 http://wayland.freedesktop.org Bug reports to: bugs.freedesktop.org/enter_bug.cgi Build: 1.8.93-2-gb05cdb8 configure.ac: bump to version 1.9.0 for the official release (2015-09-21 18:11:26 -0700) [16:07:06.542] OS: Linux, 4.4.84, #1 SMP PREEMPT Thu Apr 5 12:50:59 CEST 2018, armv7l [16:07:06.542] Using config file '/etc//weston.ini' [16:07:06.542] Loading module '/usr/lib/weston/drm-backend.so' [16:07:06.546] Output repaint window is 7 ms maximum. [16:07:06.546] initializing drm backend [16:07:06.548] using /dev/dri/card0 [16:07:06.548] Loading module '/usr/lib/weston/gl-renderer.so' failed to load module: /usr/lib/gbm/gbm_dri.so: cannot open shared object file: No such file or directory failed to load module: /usr/lib/gbm/gbm_gallium_drm.so: cannot open shared object file: No such file or directory loaded module : gbm_pvr.so found valid GBM backend : gbm_pvr.so [16:07:06.554] warning: either no EGL_EXT_platform_base support or specific platform support; falling back to eglGetDisplay. [16:07:06.562] warning: EGL_EXT_buffer_age not supported. Performance could be affected. [16:07:06.562] Retrieving EGL client extension string failed. [16:07:06.563] warning: no input devices found, but none required as per configuration. [16:07:06.563] No currently active connector found. [16:07:06.563] failed to create output for /sys/devices/platform/omapdrm.0/drm/card0 [16:07:06.617] fatal: failed to create compositor backend root@dra7xx-evm:/opt/vision_sdk# modetest trying to open device 'i915'...failed trying to open device 'radeon'...failed trying to open device 'nouveau'...failed trying to open device 'vmwgfx'...failed trying to open device 'omapdrm'...done Encoders: id crtc type possible crtcs possible clones Connectors: id encoder status name size (mm) modes encoders CRTCs: id fb pos size 32 0 (0,0) (0x0) 0 0 0 0 0 0 0 0 0 flags: ; type: props: 27 trans-key-mode: flags: enum enums: disable=0 gfx-dst=1 vid-src=2 value: 0 28 trans-key: flags: range values: 0 16777215 value: 0 29 background: flags: range values: 0 16777215 value: 0 30 alpha_blender: flags: range values: 0 1 value: 0 21 GAMMA_LUT: flags: blob blobs: value: 22 GAMMA_LUT_SIZE: flags: immutable range values: 0 4294967295 value: 256 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 0 34 0 (0,0) (0x0) 0 0 0 0 0 0 0 0 0 flags: ; type: props: 27 trans-key-mode: flags: enum enums: disable=0 gfx-dst=1 vid-src=2 value: 0 28 trans-key: flags: range values: 0 16777215 value: 0 29 background: flags: range values: 0 16777215 value: 0 30 alpha_blender: flags: range values: 0 1 value: 0 21 GAMMA_LUT: flags: blob blobs: value: 22 GAMMA_LUT_SIZE: flags: immutable range values: 0 4294967295 value: 256 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 0 Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs 31 0 0 0,0 0,0 0 0x00000001 formats: RG16 RX12 XR12 RA12 AR12 XR15 AR15 RG24 RX24 XR24 RA24 AR24 props: 5 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 1 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 0 25 global_alpha: flags: range values: 0 255 value: 255 26 pre_mult_alpha: flags: range values: 0 1 value: 0 33 0 0 0,0 0,0 0 0x00000002 formats: RG16 RX12 XR12 RA12 AR12 XR15 AR15 RG24 RX24 XR24 RA24 AR24 NV12 YUYV UYVY props: 5 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 1 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 0 25 global_alpha: flags: range values: 0 255 value: 255 26 pre_mult_alpha: flags: range values: 0 1 value: 0 35 0 0 0,0 0,0 0 0x00000003 formats: RG16 RX12 XR12 RA12 AR12 XR15 AR15 RG24 RX24 XR24 RA24 AR24 NV12 YUYV UYVY props: 5 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 0 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 2 25 global_alpha: flags: range values: 0 255 value: 255 26 pre_mult_alpha: flags: range values: 0 1 value: 0 36 0 0 0,0 0,0 0 0x00000003 formats: RG16 RX12 XR12 RA12 AR12 XR15 AR15 RG24 RX24 XR24 RA24 AR24 NV12 YUYV UYVY props: 5 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 0 23 rotation: flags: bitmask values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20 value: 1 24 zorder: flags: range values: 0 3 value: 3 25 global_alpha: flags: range values: 0 255 value: 255 26 pre_mult_alpha: flags: range values: 0 1 value: 0 Frame buffers: id size pitch + +Responses: +Hi Stefan, modetest is not showing any connectors . Connectors: id encoder status name size (mm) modes encoders should have details of the connectors and their supported modes. What type of LCD is connected to your board? Ramprasad + +Hi Ramprasad, Were using an HDMI output that is connected to a HD-TV Kind Regards, Stefan + +HI Stefan, Can you try to run drmclone application on your target? . It is not clear why mode is not shown for your HDMI TV. Can you also share which dtb file is set in uEnv.txt + diff --git a/data2/text/range/5001-10000/684437.txt b/data2/text/range/5001-10000/684437.txt new file mode 100644 index 0000000000000000000000000000000000000000..c3faba0fa64523443b9d03d41ad7c6ccb4d5c2fc --- /dev/null +++ b/data2/text/range/5001-10000/684437.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Cannot boot by SD card with linux kernel + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PMP Tool/software: Linux hi all, I want to boot TDA2 EVM with SD card, and got some problem, following is log: U-Boot SPL 2016.05-00002-g68a4cab-dirty (Apr 18 2018 - 03:14:38) DRA752-GP ES2.0 find_mmc_device(): MMC Device 1 not found *** Warning - No MMC card found, using default environment Trying to boot from MMC1 find_mmc_device(): MMC Device 1 not found *** Warning - No MMC card found, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00002-g68a4cab-dirty (Apr 18 2018 - 03:14:38 +0800) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1.5 GiB MMC: OMAP SD/MMC: 0 find_mmc_device(): MMC Device 1 not found *** Warning - No MMC card found, using default environment Warning: fastboot.board_rev: unknown board revision find_mmc_device(): MMC Device 1 not found ERROR: invalid mmc device at arch/arm/cpu/armv7/omap-common/utils.c:189/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear find_mmc_device(): MMC Device 1 not found no mmc device at slot 1 omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear omap_hsmmc_send_cmd: timedout waiting on cmd inhibit to clear find_mmc_device(): MMC Device 1 not found ** Bad device mmc 1 ** find_mmc_device(): MMC Device 1 not found ** Bad device mmc 1 ** find_mmc_device(): MMC Device 1 not found ** Bad device mmc 1 ** find_mmc_device(): MMC Device 1 not found ** Bad device mmc 1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! and my environment is ubuntu14.04 64bit, vision SDK v3.0.0. how can i fix this problem? Thanks. + +Responses: +Hello , Is your SD card created without errors , Can you verify the boot pin settings and the re create the SD card and ensure no error. Refer linux user guide to create SD card Regards Chetan.M + +Hi, Chetan, when i create the SD card, there are no errors appear boot pin setting is chencked, it is the same as user guide re create the SD card, this problem still exists thanks. + +Hi , The error read Wrong Image Format for bootm command ERROR: can't get kernel image! *** Warning - No MMC card found, using default environment Warning: fastboot.board_rev: unknown board revision find_mmc_device(): MMC Device 1 not found ERROR: invalid mmc device which revision of board are you using . Can you give a try with different revision evm Regards Chetan.M + +Hi , Any updates on the thread Regards Chetan.M + diff --git a/data2/text/range/5001-10000/686052.txt b/data2/text/range/5001-10000/686052.txt new file mode 100644 index 0000000000000000000000000000000000000000..1c07c2e143d8b9467ff622f8750468f3d0b50df8 --- /dev/null +++ b/data2/text/range/5001-10000/686052.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2: /linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found + +Query Text: +Part Number: TDA2 Hi, when i build vision sdk with settings MAKEAPPNAME?=apps MAKECONFIG?=tda2xx_evm_linux_opencx other configurations are default. make[6]: Entering directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy' make -B -Ckernel make[7]: Entering directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy/kernel' echo Compiling OpenCL file copy.cl Compiling OpenCL file copy.cl /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl -t copy.cl make[7]: /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found ifeq ($(A15_TARGET_OS), Linux) CLOCL = $(LINUX_TARGETFS)/usr/share/ti/opencl/bin/x86/clocl There is nothing in this directory Thank you in advance BR HUI + +Responses: +Hi Hui, For OpenCL to build , you need to apply file system patch & clone few more components Follow TDA2x Linux User Guide Regrads Suryamani Jena + +Hi Suryamani, still some errors after applying file system patch & clone few more components. make[6]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/opencvopencldilation' make -fMAKEFILE.MK -C/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy MODNAME=apps opencl_build make[6]: Entering directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy' make -B -Ckernel make[7]: Entering directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy/kernel' echo Compiling OpenCL file copy.cl Compiling OpenCL file copy.cl /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl -t copy.cl >> WARNING: invalid compiler option --bc_file=copy.bc (ignored) "/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 9: error #10022-D: invalid option: --single_data_segment "/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/dsp.syms", line 10: error #10022-D: invalid option: --no_entry_point warning #10247-D: creating output section ".stack" without a SECTIONS specification warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size undefined first referenced symbol in file --------- ---------------- main /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/lib/rts6600_elf.lib error #10234-D: unresolved symbols remain error #10010: errors encountered during linking; "copy.out" not built >> Compilation failure Makefile:5: recipe for target 'copy.dsp_h' failed make[7]: *** [copy.dsp_h] Error 255 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 make[7]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy/kernel' MAKEFILE.MK:14: recipe for target 'opencl_build' failed make[6]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos/adas/src/alg_plugins/openclframecopy' MAKEFILE_adas.MK:14: recipe for target 'vision_sdk_linux_demo' failed make[5]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos' MAKEFILE_adas.MK:5: recipe for target 'apps' failed make[4]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/src/hlos' Makefile:211: recipe for target 'apps_exe_hlos' failed make[3]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:84: recipe for target 'apps_hlos' failed make[2]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:49: recipe for target 'apps' failed make[1]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:12: recipe for target 'vision_sdk' failed + +Hi Hui, ti-cgt-c6000_8.1.0 is not part of release package You need to download & place it under /ti_components/cg_tools/linux & add dsp compiler bin path to PATH variable & build export PATH=/bin:$PATH Regards Surya + +Hi Surya, still one error after doing the above procedure. cp /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/scripts/linux/vision_sdk_ov490_pinmux.sh /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk cp /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/vision_sdk/bin/tda2xx-evm/apps.out /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk cd /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod; \ cp /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod/debugss_kmodule.ko /home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/opt/vision_sdk cp: cannot stat '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/../ti_components/os_tools/linux/kernel/dsptop/debugss_module/debugss-mod/debugss_kmodule.ko': No such file or directory make[4]: *** [linux_app_install] Error 1 build_kernel.mk:82: recipe for target 'linux_app_install' failed make[3]: *** [app_linux_install] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 make[4]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build/hlos/makerules/linux' Makefile:498: recipe for target 'app_linux_install' failed make[3]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:84: recipe for target 'apps_hlos' failed make[2]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:49: recipe for target 'apps' failed make[1]: Leaving directory '/home/richard/sambashare/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/build' Makefile:12: recipe for target 'vision_sdk' failed + +Hi Hui, It is looking like debugss_kmodule.ko not build properly Could you clean & build ? Run below commands make linux_clean make linux make linux_install make -s -j depend make -s -j opencx Regrads Surya + +Hi ti-cgt-c6000_8.1.0 where to down load?? + +Hi Shuai, You can download from below link www.ti.com/.../8.1.0 Regards Surya + +Hi Surya, i have meet the same problem, can you talk about it in detail about (add dsp compiler bin path to PATH variable & build export PATH=/bin:$PATH)? i do it like this : PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0 export PATH=/bin:$PATH but it failed: bash: /bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0: No such file or directory What should I do? Regards Xie Baojian + +Hi Xie Baojian, The angualr bracket you need to remove while exporting Follow below steps 1. Open shell 2. echo $PATH 3. export PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:$PATH 4. echo $PATH & confirm dsp compiler path added to system path variable Regards Surya + +Hi Surya, I have solved this problem, thank you very much. Regards Xie Baojian + diff --git a/data2/text/range/5001-10000/686137.txt b/data2/text/range/5001-10000/686137.txt new file mode 100644 index 0000000000000000000000000000000000000000..3f15e0f0197bdc01e40b1f7ab50441dcd84a2cd9 --- /dev/null +++ b/data2/text/range/5001-10000/686137.txt @@ -0,0 +1,12 @@ +Ticket Name: TDA2: how dsp and ipu object file are loaded + +Query Text: +Part Number: TDA2 Hi , When i run sample_app.out in linux A15, i find dsp and ipu also start to run after A15. I read the source code, and do not find any code to load the DSP and IPU object files which are located in /lib/firmware of linux file system. Could you explain how linux part load other core object files? Thank you in advance. Currently, working on PROCESSOR_SDK_VISION_03_02_00_00 version. root@dra7xx-evm:/opt/vision_sdk# ./sample_app.out [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6947000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa1f47000 of size 0x14a00000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xa1e87000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xa1ec7000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000 [HOST] OSA: HOST Remote Log Shared Memory @ 0xa024f140 [HOST] OSA: DSP1 Remote Log Shared Memory @ 0xa02769e0 [HOST] OSA: IPU2 Remote Log Shared Memory @ 0xa0363da0 [HOST] [HOST ] 2569.602208 s: SYSTEM: System A15 Init in progress !!! [HOST] [HOST ] 2569.602330 s: SYSTEM: IPC: Init in progress !!! [HOST] [HOST ] 2569.602330 s: SYSTEM: IPC: Notify init in progress !!! [HOST] [HOST ] 2569.602665 s: SYSTEM: IPC: [IPU2] socket bind success !!! (dst vproc = 1, endpt = 81) [HOST] [HOST ] 2569.602665 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 2569.602696 s: SYSTEM: IPC: [IPU2] socket connect success !!! (dst vproc = 1, endpt = 80) [HOST] [HOST ] 2569.602726 s: SYSTEM: IPC: [IPU2] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 2569.602970 s: SYSTEM: IPC: [DSP1] socket bind success !!! (dst vproc = 2, endpt = 81) [HOST] [HOST ] 2569.603001 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 81) !!! [HOST] [HOST ] 2569.603031 s: SYSTEM: IPC: [DSP1] socket connect success !!! (dst vproc = 2, endpt = 80) [HOST] [HOST ] 2569.603031 s: SYSTEM: IPC: [DSP1] socket info (family = 41, dst proc id = -1, endpt = 1024) !!! [HOST] [HOST ] 2569.603153 s: SYSTEM: IPC: Notify init DONE !!! [HOST] [HOST ] 2569.603184 s: SYSTEM: MSGQ: MsgQ init in progress !!! [HOST] [HOST ] 2569.603275 s: SYSTEM: MSGQ: MsgQ init DONE !!! [HOST] [HOST ] 2569.603275 s: SYSTEM: IPC: Init DONE !!! [HOST] [HOST ] 2569.603275 s: SYSTEM: Initializing A15 Links !!! [HOST] [DSP1 ] 2412.027084 s: ***** DSP1 Firmware build time 17:52:46 Apr 28 2018 [HOST] [DSP1 ] 2412.027145 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 2412.027389 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 2412.027572 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 2412.027603 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 2413.027999 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 2413.141157 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 2413.141218 s: SYSTEM: Notify register to [IPU2] line 0, event 15... [HOST] [DSP1 ] 2413.141279 s: SYSTEM: Notify init done !!! [HOST] [DSP1 ] 2413.141432 s: SYSTEM: MsgQ init done !!! [HOST] [DSP1 ] 2413.141523 s: RpmsgInit in progress... [HOST] [DSP1 ] 2413.141554 s: Connection established with HLOS, calling rpmsgInit [HOST] [DSP1 ] 2413.141737 s: SYSTEM: IPC init DONE !!! [HOST] [DSP1 ] 2413.142408 s: SYSTEM: System Common Init Done !!! [HOST] [DSP1 ] 2413.142438 s: SYSTEM: System DSP Init in progress !!! [HOST] [DSP1 ] 2413.142682 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1024 [HOST] [DSP1 ] 2413.142713 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 2413.142743 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 521792 B (509 KB) [HOST] [DSP1 ] 2413.142804 s: SYSTEM: Initializing Links !!! [HOST] [DSP1 ] 2413.151436 s: SYSTEM: Initializing Links ... DONE !!! [HOST] [IPU2 ] 2413.126456 s: ***** IPU2 Firmware build time 17:54:42 Apr 28 2018 [HOST] [IPU2 ] 2413.126639 s: *** SYSTEM: CPU Frequency , [HOST] [IPU2 ] 2413.129536 s: SYSTEM: System Common Init in progress !!! [HOST] [IPU2 ] 2413.138717 s: SYSTEM: IPC init in progress !!! [HOST] [IPU2 ] 2413.138809 s: SYSTEM: Attaching to [DSP1] ... [HOST] [IPU2 ] 2413.141157 s: SYSTEM: Attaching to [DSP1] ... SUCCESS !!! [HOST] [IPU2 ] 2413.141279 s: SYSTEM: Notify register to [DSP1] line 0, event 15... [HOST] [IPU2 ] 2413.141401 s: SYSTEM: Notify init done !!! [HOST] [IPU2 ] 2413.143140 s: SYSTEM: MsgQ init done !!! [HOST] [IPU2 ] 2413.144085 s: RpmsgInit in progress... [HOST] [IPU2 ] 2413.144177 s: Connection established with HLOS, calling rpmsgInit [HOST] [IPU2 ] 2413.144787 s: SYSTEM: IPC init DONE !!! [HOST] [IPU2 ] 2413.149942 s: SYSTEM: System Common Init Done !!! Best regards HUI + +Responses: +Hi , Linux kernel takes care of loading the ipu and dsp firmware , only application binare i.e apps.out is run from the root prompt. Regards Chetan.M + +But why the ipu and dsp start information (ex: above print info) is after the app.out running. If it is taken care by kernel, without running apps.out, the dsp and ipu start info should be there as well. + +It would be waiting on attach of remote core ( HLOS) once the hlos is started the ipu and dsp prints start up . If you look at the logs before the root prompt you will see loaded firmware success message. Regards Chetan.M + diff --git a/data2/text/range/5001-10000/688624.txt b/data2/text/range/5001-10000/688624.txt new file mode 100644 index 0000000000000000000000000000000000000000..36db7392960e3f265085f8ba073e5bc279bcb0aa --- /dev/null +++ b/data2/text/range/5001-10000/688624.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: Running caffe-jacinto object detection using Vision SDK 3.03 TIDL_OD usecase + +Query Text: +Part Number: TDA2 Hi, I am trying to run the caffe jacinto object detection usecase from github on TDA2X, using TIDL_OD usecase in Vision_SDK_03_03_00_00. I have generated the NET.BIN and PRM.BIN using the import tool in TIDL. Created inHeader_OD and inData_OD for resolution 512x512(verified by running another model which takes same input resolution) and copied these four files to SD card. In the chains_tidlOD.c I have modified some parameters as follows. #define TIDL_OD_INPUT_WIDTH (512) #define TIDL_OD_INPUT_HEIGHT (512) #define DEC_OUT_WIDTH (512) #define DEC_OUT_HEIGHT (512) For display resolution, I am maintaining the same as for default model 768x320(scaled by 2 for display). #define TIDL_OD_DISPLAY_WIDTH (1536) #define TIDL_OD_DISPLAY_HEIGHT (640) #define TIDL_OD_FPS_OPPNOM (1) #define SYNC_THRESHOLD (12000) When I run the usecase I am getting no errors. The video stream is black. I have faced similar issue before as in https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/688490 By reducing the FPS, I was able to get it working. Now I have reduced the FPS to minimum, and tried initial model as well as sparse model. During import, total GMACS is shown as 3.36 GMACS. Is it because of the high GMACS the model is not able to run? Thanks in advance, Navinprashath.R.R + +Responses: +Hi Navin, Inside the deploy.prototxt, Did you set the "keep_top_k" parameter to 20 , and "confidence_threshold" to 0.15? It seems that these two parameters influence the real time MAC and the performance. Best Regards, Eric Lai + +Hi Eric, Thanks for the inputs. After setting "keep_top_k" to 20 and "confidence threshold" to 0.15, I am able to run both the initial and sparse model at 3fps. When I tried to change the FPS of sparse model to 6, again there is no stream(doesn't work for 5fps also). In the caffe jacinto github, it is mentioned that sparse model achieves 2.5x speedup, so I thought sparse model should run at least 2x as initial model. Kindly let me know your inputs on this. Regards, Navinprashath.R.R + +Hi Navin, Please refer to this thread: e2e.ti.com/support/arm/automotive_processors/f/1021/t/681674 The 512x512 model from the caffe-jacinto should run faster than 10 fps. I hope this helps you. Best Regards, Eric Lai + +Hi Eric, Thanks for the link. I saw this thread earlier. When running in FILE IO Mode, either EVE or DSP is selected (Also in TIDL OD usecase the whole model is configured to run only on 4 EVE cores). So how these changes on setting layersGroupId for extra layers will take effect? Do these layers run on DSP, when layersGroupid configured as 2 irrespective of EVE or DSP being selected in usecase? Regards, Navinprashath.R.R + +Hi Navin, I am not sure I am correct. I read some of the TIDL source. Most of the layer implemented by TI can run both on the EVE and DSP. But the performance may be very different. For example, the floating point operation should run on DSP for better performance. So yes for OD usecase , if you set the layergroup to 2,it will run on the DSP. (i think the layer group parameter may stored in the NET.BIN and in the usecase it will connected to the TIDL library and run on specific core) If there is any mistake , please correct me. Best Regards, Eric Lai + +Hi Eric, Thanks for the inputs. For which usecase did you get 10 fps,Object detection using FILEIO usecase or TIDL OD usecase? Regards, Navinprashath.R.R + +Hi Navin, I run the OD usecase with the caffe-jacinto 512x512 model. Best Regards, Eric Lai + +Hi Eric, I replaced layersGroupId and conv2Dkerneltype with the one shared on the thread you have shared. But I'm getting error when importing. The import tool crashes. Here is my import file: # Default - 0 randParams = 0 # 0: Caffe, 1: TensorFlow, Default - 0 modelType = 0 # 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 quantizationStyle = 1 # quantRoundAdd/100 will be added while rounding to integer, Default - 50 quantRoundAdd = 25 numParamBits = 8 # 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 inElementType = 0 inputNetFile = "..\..\test\testvecs\config\caffe_jacinto_models\trained\object_detection\voc0712\JDetNet\sparse\deploy.prototxt inputParamsFile = "..\..\test\testvecs\config\caffe_jacinto_models\trained\object_detection\voc0712\JDetNet\sparse\voc0712_ssd.caffemodel" outputNetFile = "..\..\test\testvecs\config\tidl_models\sparse\NET_OD.BIN" outputParamsFile = "..\..\test\testvecs\config\tidl_models\sparse\PRM_OD.BIN" rawSampleInData = 1 preProcType = 4 sampleInData = "..\..\test\testvecs\input\tsr_512_512.y" tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 2 0 conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Regards, Navinprashath.R.R + +Hi Navin, How it crash? I think you should ask TI expert about this part. Maybe the number of class is too many? For me, my model is to detect 4 classes. and the import is okay. How about just replace the layersGroupId and conv2dKernelType with your own model? Best Regards, Eric Lai + +Hi Eric Lai, Thanks for your help here.. Regards, Praveen + +Hi Navin, Please refer to this new post explains the steps to run TIDL OD use case in VSDK. e2e.ti.com/.../689617 If you still see issues in running OD use case please post here Thanks, Praveen + diff --git a/data2/text/range/5001-10000/689655.txt b/data2/text/range/5001-10000/689655.txt new file mode 100644 index 0000000000000000000000000000000000000000..4a0139f057a2a26286d23410e232b44e00879770 --- /dev/null +++ b/data2/text/range/5001-10000/689655.txt @@ -0,0 +1,32 @@ +Ticket Name: RTOS/TDA2: How to create an use case? + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I want create our use case contained Lane Departure warning (LDW)、 Traffic Sign Detection and Recognition (TSR) using TIDL algorithm、 FCW and PDW using TIDL algorithm and SFM algorithm The EUNCAP use case is contained LDW、TSR、FCW、PDW but not using caffe-jacinto based SSD Network. Now we want to create an use case is contained LDW、TSR、FCW、PDW and using caffe-jacinto based SSD Network. Q1: Fig.1 is an TI’s use case is contained LDW、TSR、FCW、PDW and using caffe-jacinto based SSD Network what we supposed If TI’s architecture is not like above diagram, can you provide your architecture for our reference? Fig. 1 Q2: Fig. 2 is our use case contained LDW、TSR、FCW、PDW and using caffe-jacinto based SSD Network what we supposed on TDA2. Q2-1: How can we implement our use case? Q2-2: Is the hardware settings(A15、DSP、EVE…) above diagram right? If not, can you tell us where is wrong and what hardware setting you prefer? Fig. 2 Q2-3: Can we replace the algorithm like Lane Detect algorithm and TIDL_OD algorithm by our customized algorithm? If yes, how do we do? Can you provide guide for our reference? Are there any Limit conditions? If no, how can we use TI’s algorithm library? Can you provide open source code and design guide for our reference? Q2-4: Can we detect distance of an object from TIDL_OD algorithm by SFM algorithm? If yes, how do we do? Can you provide guide for our reference? If no, is any method to detect the distance of an object from TIDL_OD algorithm? Q2-5: How can we show what kinds of traffic signs were detected by TIDL_OD algorithm on HDMI monitor? It look only box drawing If yes, how do we do? Can you provide guide for our reference? If no, anything method to show what kinds of traffic signs were detected by TIDL_OD algorithm on HDMI monitor? + +Responses: +Has any update? We have not received a response for two days + +Hello we need a bit more time to respond as it contains a lot for questions. I will respond by early next week regards, Shiju + +Hi Have any update? + +Hello, I guess you are using vision SDK 3.3 release, If not, please download the same from ti.com ( www.ti.com/.../processor-sdk-vision) and use it. We do have an object detect UC using TIDL supported in this release. Q1: Fig.1 is an TI’s use case is contained LDW、TSR、FCW、PDW and using caffe-jacinto based SSD Network what we supposed TI The EUNCAP use case under \vision_sdk\apps\src\rtos\usecases\vip_single_cam_analytics2 is not based on caffe-jacinto based SSD Network. Q2: Fig. 2 is our use case contained LDW、TSR、FCW、PDW and using caffe-jacinto based SSD Network what we supposed on TDA2. Q2-1: How can we implement our use case? TI object detect UC using TIDL (using caffe-jacinto based SSD Network ) is under \vision_sdk\apps\src\rtos\usecases\tidl_OD. Please refer the same to implement your UC Please refer below doc to – build and run TIDL UCs \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_TI_DeepLearning.pdf Q2-2: Is the hardware settings(A15、DSP、EVE…) above diagram right? It’s purely depends on the Algos and where it run (DSP/EVE/A15) Q2-3: Can we replace the algorithm like Lane Detect algorithm and TIDL_OD algorithm by our customized algorithm? Yes, you can. You may need to modify the Algi plugin of respective Algos to properly work with your Algorithms (if any interface changes etc.) Q2-4: Can we detect distance of an object from TIDL_OD algorithm by SFM algorithm? Yes, SFM can be used to calculate the distance between object and the camera Q2-5: How can we show what kinds of traffic signs were detected by TIDL_OD algorithm on HDMI monitor? It look only box drawing Please run the TI OB demo to check this Regards, Shiju + +Kumar Please add your comments as required? regards, Shiju + +Hi Q2-1 I try create an new UC same as TIDL_OD UC,but it does not show the distance How do we do that can calculate the distance between object and the camera? Q2-3 Does it has any guide for us to how replace the algorithm like Lane Detect algorithm? Q2-4 How do we using SFM algorithm that can calculate the distance between object of TIDL_OD and the camera? Have any user guide? BR Allen + +Hi Q2-3 we do not have any documentation on how to replace the algorithm but you can refer the below section of VisionSDK_DevelopmentGuide.pdf (under \vision_sdk\docs\FeatureSpecificUserGuides) 4 Algorithm Link Development ...................................................................... Kumar, can you answer this one Q2-4 How do we using SFM algorithm that can calculate the distance between object of TIDL_OD and the camera? regards, Shiju + +Hi Kumar, can you answer this question? Q2-4 How do we using SFM algorithm that can calculate the distance between object of TIDL_OD and the camera? BR Allen + +Hi Allen, We do not have the SFM algorithm integrated with TIDL_OD in the demo. The current demo is SSD based object detection only. Thanks and Regards, Kumar.D + +Hi Kumar, well. But can we create an new use case have the SFM algorithm integrated with TIDL_OD? if yes, how to implement this use case? BR Allen + +Yes. You can implement this. Please work with your sofware architect to design the data flow. Refer the VSDK documents o create uses cases with multiple algorithms. If you have any specific question on any software coment in VSDKI , start a new thred with detaisled desrciption on the issue + +Well, we are also interesting in this question. How about the progress for this question? + +Since there is no reposne for longtime, closing the thread + diff --git a/data2/text/range/5001-10000/689940.txt b/data2/text/range/5001-10000/689940.txt new file mode 100644 index 0000000000000000000000000000000000000000..b28411858c7e53e472adfabfcf3a2d0656cce830 --- /dev/null +++ b/data2/text/range/5001-10000/689940.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2: The same algorithm runs slower on the DSP(c66x) of TDA2X than on the DSP(c674x) of DM8148 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Hi We have two self-designed boards, one using DM8148 (DSP is C674X) and the other using TDA2X (DSP is C66X). We run the same algorithm on the two board's DSP, and find C674X faster than C66X. Both of the two bord DDR frequency are 533 and the DSP frequency are 750. We use the sam compiler option -c -qq -pdsw225 -mv6600 --abi=elfabi -mo -eo.oe66 -ea.se66 -ms --embed_inline_assembly --symdebug:dwarf -O3 --keep_asm. What is the reason for this? here is our testing code: #define MAXV(a,b)((a>b)?(a):(b)) #define MINV(a,b)((a cookie = Hwi_disable(); < Critical Section > Hwi_restore(cookie); Thanks and Regards, Piyali + +Hi Piyali Goswami Thank your for your help,we disallow interrupts/task switches but the test result is still the same.We run the same algorithm on C6678,1GHZ -O3 optimize ,code in L2, data in L3 RAM and the algorithm consumes 12.6ms. But the same algorithm runs on dm8148's dsp which is 750MHZ it only consumes 14ms.It shows that the c674x has better proformance than c66x if running on the same frequence. Coud you give us some advise on how to get the reason for this? Is there something wrong with my config? Below is our test record: 1 [C6678, 1000MHZ，-O3，code L2 RAM,data L3 RAM]: 12.6ms 2 [TDA2X-C66x，750MHZ，-O3，code L2 RAM,data DDR-533MHZ]: 17.5ms 3 [TDA2X-C66x，600MHZ，-O3，code L2 RAM,data DDR-533MHZ]: 21.8ms 4 [DM8148-C674X,750MHZ，-O3，code DDR-533MHZ,data DDR-533MHZ]:14ms Thanks and Regards, Liuke + +Hi, Both DSPs instruction set is slightly different. So it is not guaranteed to produce identical machine code by compiler for both DSP versions. As a first doubt can you please check/compare the software pipeline information (generated by compiler) of inner most loop of your test code? That will tell whether core loop is scheduled identically or differently. Regards Deepak Poddar + +Hi Deepak Poddar: Thanks for your help. We have compared the.se66 files and se674 files generated by the compiler. The pipeline information of the software is found to be the same. We found that the instructions were different, but we didn't know much about them. Because of the algorithm code provided by our customers, we can not optimize it by changing the code structure. Can you give us some suggestions to find out the reasons? In some specific code, the performance of C66X is worse than that of C674X? + +Hi, It is difficult to tell the exact reason unless we compile the code and run the code to analyze each portion carefully. At this juncture what can be suggested is that there could be two reasons for this mismatch 1) compiler code generated for both platform itself are different. 2) cache, or other peripheral is making code to run on C66x based soc. you need to first nail down the reason between #1, and #2. For #1 -- > you can generate assembly file for both the platform, and calculate the estimated cycle to be consumed for both the DSP on paper. assembly file gives the scheduled cycle estimate for each software pipelined loop. Most of the cycle in general is consumed in loops. So roughly cycle can be calculated on paper by just looking generated assembly file. No need to run the code for this analysis. If you find that there is mismatch in calculated cycle for both DSP then we have to analyze the assembly code of each loop. In this case please share the generated assembly file if the estimated cycles are different for both DSP. we can do analysis of assembly file if you are not able to find the reason. For #2 --> if you find that estimated cycles for both DSP is same by #1 experiment. Then you can run the code by keeping all the input and output data in L1D/L2D/DDR and analyze the consumed cycle for both the DSPs. By keeping the input and output in L1D, cache related penalties are skipped and you should see same cycle consumption for both the DSPs, and it should be close to theoretical estimate number as it was estimated in #1 exercise. Then you can try getting cycle consumed by keeping all data in L2D/DDR, and then if you see that cycle consumed are different then its cache/peripheral level setting which is making both of the DSP behave differently. if you are nail down to some closer reason (#1 or #2) then we can investigate further from there. Thanks Deepak Poddar + +Hi Deepak Poddar: Thank you very much for your help. We are very sorry that we do not quite understand the assembly files.We try our best to calculate the number of cycles in the loops.We found that between L2 to L6 lable there is 47 cycles in se66 asm file, but 33 cycles in se674 asm file. Could you help us to find the problem, thanks a lot ! The attachment is the c source file and assemble file of c66x and c674x.df-algo.zip + +Hi, Looks like for both DSP, software scheduling is same. which is "Total cycles (est.) : 8 + trip_cnt * 4 ". Please check for "SOFTWARE PIPELINE INFORMATION" in attached file. So on flat memory loop is expected to take equal cycle for both the DSP. So this indicates that you have to do exp #2 as suggested in previous post, to nail down peripheral related difference. You may go though various tutorial available for C6x DSP, such as www.ti.com/.../sprui04b.pdf Now as a general observation, this loop can be further optimized for better cycle consumption. And those optimization is applicable for both DSPs. Regarding current observation of higher cycle on C66x, can you please check the cycles consumed by keeping input and output in L1D. Deepak + +Hi Luike, We have not heard back from you on this one. I assume you have been able to proceed. If you continue to face issue, kindly let us know. Thanks and Regards, Piyali + +Hi Piyali Sorry for the delays. Thank you very much for your help. Our leader decided to put the project on hold because we failed to complete the task within the deadline of the customer. Anyway, we would like to thank you for your help. + diff --git a/data2/text/range/5001-10000/693214.txt b/data2/text/range/5001-10000/693214.txt new file mode 100644 index 0000000000000000000000000000000000000000..ac4d87ce06b4d763eff057d48ee0d1513f47f06b --- /dev/null +++ b/data2/text/range/5001-10000/693214.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: null_src_decode_display run error + +Query Text: +Part Number: TDA2 Tool/software: Linux i run null_src_decode_display usecase .h264 .hdr is myself but have some problem! i use another .h264 and .hdr is ok! generate .hdr file from .h264 file is the same step Required software: FFmpeg ----------------------------------------- Creating index file from input src file ----------------------------------------- Create index file ffprobe.exe -show_packets input.h264 > index.idx On Linux machine: Extract just "Size" from above generated index file with sed command. PAT=size sed -n "/$PAT/p" index.idx | cut -d' ' -f3 >> size_extracted.txt Now generate binary file from size extracted file, with below command. Please note that " size_extracted.txt should not contain any string just numbers i.e size of frame " cat size_extracted.txt | perl -n -e 'printf("%08x\n",$_)' | sed 's/\(..\)\(..\)\(..\)\(..\)/0x\4\n0x\3\n0x\2\n0x\1/' | xxd -r -p > Size_test.bin && du -b Size_test.bin Rename Size_test.bin as input.hdr and use it as index file follow is the printinf i dont know what is the problem! LGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.413957 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.414079 s: DEC_LINK: Sequence called number 886 [HOST] [IPU2 ] 1795.446349 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.446501 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.446623 s: DEC_LINK: Sequence called number 887 [HOST] [IPU2 ] 1795.479808 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.479930 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.480052 s: DEC_LINK: Sequence called number 888 [HOST] [IPU2 ] 1795.512383 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.512535 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.512627 s: DEC_LINK: Sequence called number 889 [HOST] [IPU2 ] 1795.545812 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.545934 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.546056 s: DEC_LINK: Sequence called number 890 [HOST] [IPU2 ] 1795.578387 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.578570 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.578661 s: DEC_LINK: Sequence called number 891 [HOST] [IPU2 ] 1795.611816 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.611938 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.612060 s: DEC_LINK: Sequence called number 892 [HOST] [IPU2 ] 1795.644360 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00000401) !!! [HOST] [IPU2 ] 1795.644512 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 [HOST] [IPU2 ] 1795.644634 s: DEC_LINK: Sequence called number 893 PU2 ] 1795.182425 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x401 + +Responses: +Hi Shuai, Could you confirm the ENCDEC_MAX_FRAME_WIDTH & ENCDEC_MAX_FRAME_HEIGHT set in UC match with the input file ? If not could you please build UC with proper values set ? Regards Suryamani Jena + +#define ENCDEC_MAX_FRAME_WIDTH (1280) #define ENCDEC_MAX_FRAME_HEIGHT (720) is right [HOST] [IPU2 ] 3252.135179 s: DEC_LINK: Sequence called number 344 [HOST] [IPU2 ] 3252.168669 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.168822 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.168913 s: DEC_LINK: Sequence called number 345 [HOST] [IPU2 ] 3252.201091 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.201183 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.201305 s: DEC_LINK: Sequence called number 346 [HOST] [IPU2 ] 3252.233941 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.234063 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.234185 s: DEC_LINK: Sequence called number 347 [HOST] [IPU2 ] 3252.266943 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.267034 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.267156 s: DEC_LINK: Sequence called number 348 [HOST] [IPU2 ] 3252.300585 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.300738 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.300860 s: DEC_LINK: Sequence called number 349 [HOST] [IPU2 ] 3252.333007 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.333129 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.333251 s: DEC_LINK: Sequence called number 350 [HOST] [IPU2 ] 3252.365948 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.366070 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.366192 s: DEC_LINK: Sequence called number 351 [HOST] [IPU2 ] 3252.398920 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.399042 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.399164 s: DEC_LINK: Sequence called number 352 [HOST] [IPU2 ] 3252.432562 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.432684 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.432837 s: DEC_LINK: Sequence called number 353 [HOST] [IPU2 ] 3252.465015 s: DECODE: ERROR: ALGPROCESS FAILED (status=0x00001421) !!! [HOST] [IPU2 ] 3252.465137 s: DEC_LINK: outArgs->viddec3OutArgs.extendedError for channel 0 Error: 0x1421 [HOST] [IPU2 ] 3252.465259 s: DEC_LINK: Sequence called number 354 + +Streams1280x720.zipHi Shuai, Attaching the 1280x720 streams Could run UC with these files & check working or not ? Regards Suryamani Jena + diff --git a/data2/text/range/5001-10000/694951.txt b/data2/text/range/5001-10000/694951.txt new file mode 100644 index 0000000000000000000000000000000000000000..cb5a054064145df69765d337cd2c0ee61e9a8a69 --- /dev/null +++ b/data2/text/range/5001-10000/694951.txt @@ -0,0 +1,28 @@ +Ticket Name: Linux/TDA2: TDA2xx compile tda2xx_evm_linux_opencl mode + +Query Text: +Part Number: TDA2 Tool/software: Linux i want to run the vip_single_cam_openclframe_copy usecase. I modified it in the configuration file ：MAKECONFIG?= tda2xx_evm_linux_opencl and i have download opencl_fs_patches folder put in the path :/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs then i make linux->make linux_install -> make -s -j depend ->make -s -j But Compile failure. Is there anything else I need to set up? the document VisionSDK_UserGuide_opencx.pdf is not very detailed. + +Responses: +the compile error information is: # Linking into /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66... # Linking into /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66... undefined first referenced symbol in file --------- ---------------- EDMA3_semCreate /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 EDMA3_semDelete /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/c66xdsp_1/release/utils_common.ae66 edma3OsProtectEntry /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsProtectExit /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemGive /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 edma3OsSemTake /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/66/release/edma3lld_drv.ae66 rtos_init_ocl_dsp_monitor /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/lib/tda2xx-evm/c66xdsp_1/release/links_common_system.ae66 error: unresolved symbols remain error: errors encountered during linking; "/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2 xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.x e66" not built make[7]: *** [/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_1_release.xe66] Error 1 make[6]: *** [c66xdsp_1] Error 2 make[5]: *** [apps_dsp1] Error 2 make[5]: *** Waiting for unfinished jobs.... # # /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 created. # Creating /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_opencl/vision_sdk/bin/tda2xx-evm/vision_sdk_c66xdsp_2_release.xe66 make[4]: *** [apps] Error 2 make[3]: *** [apps] Error 2 make[2]: *** [apps_exe] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 + +Hi Xie, As advised earlier can you try doing "make -s depend" and "make -s" and see if the build passes. Regards, Rishabh + +Hi， i try that，it still compile failed， # links_a15_sync: tda2xx-evm: Creating archive links_a15_sync.a # system: tda2xx-evm: Creating archive system.a # links_a15_nullSrc: tda2xx-evm: Creating archive links_a15_nullSrc.a # osa: tda2xx-evm: Creating archive osa.a Compiling OpenCL file copy.cl The C6000 compiler installation specified by TI_OCL_CGT_INSTALL does not exist: /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0 make[7]: *** [copy.dsp_h] Error 1 make[6]: *** [opencl_build] Error 2 make[5]: *** [vision_sdk_linux_demo] Error 2 make[4]: *** [apps] Error 2 make[3]: *** [apps_exe_hlos] Error 2 make[2]: *** [apps_hlos] Error 2 make[1]: *** [apps] Error 2 make: *** [vision_sdk] Error 2 it seems i miss ti-cgt-c6000_8.1.0， do you know where can i get it? thanks Regards, Xie Baojian + +Hi, You can get it from www.ti.com/.../8.1.0. Regards, Rishabh + +Hi, Thanks,i have get the ti-cgt-c6000_8.1.0. Regards, Xie Baojian + +Hi Rishabh, can you talk about it in detail about (add dsp compiler bin path to PATH variable & build export PATH=/bin:$PATH)? i do it like this : PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0 export PATH=/bin:$PATH but it failed: bash: /bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0: No such file or directory What should I do? Regards Xie Baojian + +Hi Xie, Can you run the following command and let me know the result "cd /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin". Regards, Rishabh + +Hi Rishabh, I have solved this problem,thank you very much. Regards, Xie Baojian + +Hi Xie, Glad to know that your issue is resolved. Can you please share the resolution so that others can benefit from it in future. Regards, Rishabh + +Hi Regards, sure, I follow the steps below： 1、vi ~/.bashrc 2、add ：export PATH=/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0/bin:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/cg_tools/linux/ti-cgt-c6000_8.1.0:$PATH and run make linux_clean make linux make linux_install make -s -j depend make -s -j opencx Regards, Xie Baojian + +Hi Xie, Thanks for sharing resolution. I am closing this thread. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/695069.txt b/data2/text/range/5001-10000/695069.txt new file mode 100644 index 0000000000000000000000000000000000000000..8c4d1201b646144c9a72d6de7fa2621335cf68f8 --- /dev/null +++ b/data2/text/range/5001-10000/695069.txt @@ -0,0 +1,22 @@ +Ticket Name: Linux/TDA2PXEVM: Ethernet PHY1 not working on TDA2Px board + +Query Text: +Part Number: TDA2PXEVM Tool/software: Linux Dear TI, I am trying to get ETH1 (ETH0 works fine) phy to work on TDA2Px eva board. The link starts but I can not get IP from the network. The relevant part of the device tree looks like this: &cpsw_emac0 { phy_id = <&davinci_mdio>, <2>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy_id = <&davinci_mdio>, <3>; phy-mode = "rgmii-id"; dual_emac_res_vlan = <2>; }; &davinci_mdio { dp83867_0: ethernet-phy@2 { reg = <2>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; ti,min-output-impedance; ti,dp83867-rxctrl-strap-quirk; }; dp83867_1: ethernet-phy@3 { reg = <3>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; ti,min-output-impedance; ti,dp83867-rxctrl-strap-quirk; }; }; I have checked the PHY addresses on the schematic and the actual board and they are set corretly. However, the register handling the rgmii1_rxd0 (CTRL_CORE_PAD_VIN2A_D23) is set to the wrong value - devmem2 0x4A00 35C4 0x0004 0005. After I set this to 0x0005 0103, I still cant get IP. This means there are more registers wrongly set. Here is ifconfig output after I plug in the ethernet cable to PHY1: root@dra7xx-evm:~# ifconfig eth0 Link encap:Ethernet HWaddr 0C:B2:B7:94:1C:3C UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:58 eth1 Link encap:Ethernet HWaddr 0C:B2:B7:94:1C:3D inet6 addr: fe80::eb2:b7ff:fe94:1c3d%132400/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:62 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:11779 (11.5 KiB) lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1%132400/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:172 errors:0 dropped:0 overruns:0 frame:0 TX packets:172 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1 RX bytes:13408 (13.0 KiB) TX bytes:13408 (13.0 KiB) ..................................................................... root@dra7xx-evm:~# ethtool eth1 Settings for eth1: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Supported pause frame use: No Supports auto-negotiation: Yes Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Advertised pause frame use: No Advertised auto-negotiation: Yes Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full Link partner advertised pause frame use: No Link partner advertised auto-negotiation: Yes Speed: 100Mb/s Duplex: Full Port: MII PHYAD: 3 Transceiver: external Auto-negotiation: on Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: yes .............................................................................. root@dra7xx-evm:~# ethtool eth0 Settings for eth0: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Supported pause frame use: No Supports auto-negotiation: Yes Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full Advertised pause frame use: No Advertised auto-negotiation: Yes Speed: 10Mb/s Duplex: Half Port: MII PHYAD: 2 Transceiver: external Auto-negotiation: on Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: no After I run systemctl status networking, systemctl unmask networking, systemctl enable networking, systemctl start networking and systemctl restart networking, i get: root@dra7xx-evm:~# systemctl restart networking [ 616.666154] net eth0: initializing cpsw version 1.15 (0) [ 616.721462] net eth0: phy found : id is : 0x2000a231 [ 616.730910] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready Meaning... Only eth0 is being detected. Have you encountered this problem and how did you solve it? Regards, Stefan. + +Responses: +Stefan Based on your description, it seems you have already cross checked that the PHY address is correct From the logs, above only eth1 shows link status up - may be it is intentional as you are only checking eth1 and eth0 cable is disconnected As you had pointed out, if pin mux configuration is not correct(owing to a conflict for the default use case), we need to review and address this The default init scripts will try and initialize network functionality over eth0. You can retrigger udhcp explicitly over eth1 #udhcpc -i eth1 + +Hi Sriram, running this command fails to assign IP address. root@dra7xx-evm:~# udhcpc -i eth1 udhcpc (v1.24.1) started Sending discover... Sending discover... Seems like this pinmux has more issues that need to be handled. Do you have any other propositions? Regards, Stefan. + +Stefan Yes, would suspect the pin mux configuration for the ethernet data lines in that case. Have you reviewed Can you provide details on the SW code base you are using and if you had carried out any additional changes with respect to the pin mux configuration from SW + +Stefan Is the issue resolved, can you revert back with details if it is still a concern + +Stefan Will close this thread, we can resume if the issue is still open at your end + +Hi Srirama, Stefan is currently on a vacation. We do still have the issue, but unfortunately, I cannot provide you more details. Regarding the SW code base, we are using PROCESSOR SDK 3.2, and Ethernet stack on Linux on A15. Regards, Milena + +Hi we need to confirm if there were changes carried out for the pin mux configuration and review those changes. The pin mux configuration when Linux is used is carried out from the uboot first stage bootloader - please review for ethernet related pin configuration (MDIO, RGMII) + +Hi Srirama, we have managed to solve this issue on our custom TDA2P board and we have both ETH PHY running. We are now working on enabling daisy chain ethernet functionality between two SOCs in linux. Thank you for your help. Regards, Stefan. + diff --git a/data2/text/range/5001-10000/695743.txt b/data2/text/range/5001-10000/695743.txt new file mode 100644 index 0000000000000000000000000000000000000000..b2f995c08bf774eabd1618272d7a6cc7cadbbbba --- /dev/null +++ b/data2/text/range/5001-10000/695743.txt @@ -0,0 +1,8 @@ +Ticket Name: RTOS/TDA2: A15 SMP feature conflict with OpenCX + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hi, I use tda2xx_evm_bios_opencx as default MAKECONFIG. Then I set the config of DUAL_A15_SMP_BIOS to yes(DUAL_A15_SMP_BIOS=yes) in cfg.mk. I got a build error as below: # Compiling generated /home/user03/sil-ti-visionsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_opencx/obj/vision_sdk/tda2xx-evm/a15_0/release/vision_sdk_configuro/package/cfg/MAIN_APP_a1 5_0_pa15fg.c to /home/user03/sil-ti-visionsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_opencx/obj/vision_sdk/tda2xx-evm/a15_0/release/MAIN_APP_a15_0_pa15fg.oa15fg ... # Linking into /home/user03/sil-ti-visionsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg... # /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(shmem_rw_policy_rtos.cpp.obj): In function `ReadWritePoli cyRTOS::CacheWbInvAll()': shmem_rw_policy_rtos.cpp:(.text+0x23c): undefined reference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(memory_provider_rtos.cpp.obj): In function `tiocl::RTOSMe m::CacheInv(void*, unsigned int) const': memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE8CacheInvEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE8CacheInvEPvj]+0x24): undefined referenc e to `ti_sysbios_family_arm_a15_Cache_inv__E' memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE8CacheInvEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE8CacheInvEPvj]+0x38): undefined referenc e to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(memory_provider_rtos.cpp.obj): In function `tiocl::RTOSMe m::CacheWb(void*, unsigned int) const': memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE7CacheWbEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE7CacheWbEPvj]+0x24): undefined reference to `ti_sysbios_family_arm_a15_Cache_wb__E' memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE7CacheWbEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE7CacheWbEPvj]+0x38): undefined reference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(memory_provider_rtos.cpp.obj): In function `tiocl::RTOSMe m::CacheWbInv(void*, unsigned int) const': memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE10CacheWbInvEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE10CacheWbInvEPvj]+0x24): undefined re ference to `ti_sysbios_family_arm_a15_Cache_wbInv__E' memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE10CacheWbInvEPvj[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE10CacheWbInvEPvj]+0x38): undefined re ference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(memory_provider_rtos.cpp.obj): In function `tiocl::RTOSMe m::UnmapFromHostAddressSpace(void*, unsigned int, bool) const': memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE25UnmapFromHostAddressSpaceEPvjb[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE25UnmapFromHostAddres sSpaceEPvjb]+0x5c): undefined reference to `ti_sysbios_family_arm_a15_Cache_wb__E' memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE25UnmapFromHostAddressSpaceEPvjb[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE25UnmapFromHostAddres sSpaceEPvjb]+0x6c): undefined reference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' /home/user03/sil-ti-visionsdk/ti_components/open_compute/opencl_rtos_am57xx_01_01_10_00/packages/ti/opencl/usr/lib/libOpenCL.a(memory_provider_rtos.cpp.obj): In function `tiocl::RTOSMe m::MapToHostAddressSpace(unsigned long long, unsigned int, bool) const': memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE21MapToHostAddressSpaceEyjb[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE21MapToHostAddressSpaceEyj b]+0xec): undefined reference to `ti_sysbios_family_arm_a15_Cache_inv__E' memory_provider_rtos.cpp:(.text._ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE21MapToHostAddressSpaceEyjb[_ZNK5tiocl7RTOSMemINS_26RTOSMemMapPolicyPersistentEE21MapToHostAddressSpaceEyj b]+0xf4): undefined reference to `ti_sysbios_family_arm_a15_Cache_wbInvAll__E' make[7]: *** [/home/user03/sil-ti-visionsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_opencx/vision_sdk/bin/tda2xx-evm/vision_sdk_a15_0_release.xa15fg] Error Can i both use OpenCX and A15 SMP feature on BIOS? Is there any method to solve this build problem? Best Regards, Junli,Chen + +Responses: +Hi Currently both OpenCX and A15 SMP feature not supported on Vision SDK BIOS ? Regards Surya + diff --git a/data2/text/range/5001-10000/695750.txt b/data2/text/range/5001-10000/695750.txt new file mode 100644 index 0000000000000000000000000000000000000000..faa5015872f051b54b682b3eca3b43da8450df25 --- /dev/null +++ b/data2/text/range/5001-10000/695750.txt @@ -0,0 +1,36 @@ +Ticket Name: Linux/TDA2: TDA2xx/linux CMEM Error + +Query Text: +Part Number: TDA2 Tool/software: Linux i run a opencl usecase, my MAKECONFIG?= tda2xx_evm_linux_opencx，The following error occurred: CMEM Error: init: Failed to open /dev/cmem: 'No such file or directory' TIOCL FATAL: The cmemk kernel module is not installed I noticed that when my MAKECONFIG?= tda2xx_evm_linux_opencx ，there is no file generated in /vision_sdk/binaries/apps/tda2xx_evm_linux_opencx/hlos/linux/boot. Is this CMEM Error caused by this reason? + +Responses: +Hi, did you followed "vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_opencx.pdf"? There is a chapter about installing cmem module. Regards, Yordan + +Hi Yordan, I follow the documentation， “In the above wiki, refer to the ‘Build Environment Setup’ and ‘Building Test Binaries’ sections to set up the build environment to build cmem user and kernel modules.” I follow the link processors.wiki.ti.com/.../CMEM_Overview ， and i have down the linuxutils_4_00_01_08.tar.gz . and i cd linuxutils_4_00_01_08/src/cmem/module； and make . An error occurred： Making module release... make -C /db/atree/rt/git/linux-davinci M=`pwd` ARCH= CROSS_COMPILE=/cs/arm/arm-2010q1/bin/arm-none-linux-gnueabi- \ EXTRA_CFLAGS="-I /home/hancan/linuxutils_4_00_01_08/include" modules make: *** /db/atree/rt/git/linux-davinci: No such file or directory. Stop. make: *** [release] Error 2 Is my procedure correct? thanks， Xie Baojian + +Hi Xie Baojian, Please check chapter "2.4.2.1.1 Clone kernel" in vision_sdk/docs/Linux/VisionSDK_Linux_UserGuide.pdf for instructions how to clone cmem and which tag to checkout. For the error I suspect you didn't export KERNEL_INSTALL_DIR variable which should point to your kernel tree. Regards, Yordan + +Hi Yordan, I have done the chapter 2.4.2.1.1, and what should i do to export KERNEL_INSTALL_DIR variable point to my kernel tree? Regards, Xie Baojian + +Hi Xie Baojian, before running make command can you run this command: export KERNEL_INSTALL_DIR="$INSTALL_DIR/ti_components/os_tools/linux/kernel" Regards, Yordan + +Hi Yordan, I have done export KERNEL_INSTALL_DIR="$INSTALL_DIR/ti_components/os_tools/linux/kernel". and i cd /home/hancan/linuxutils_4_00_01_08/src/cmem/module to run make; But it still can not compile success. the info is: hancan@hancan-virtual-machine:~/linuxutils_4_00_01_08/src/cmem/module$ make Making module release... make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel M=`pwd` ARCH= CROSS_COMPILE=/cs/arm/arm-2010q1/bin/arm-none-linux-gnueabi- \ EXTRA_CFLAGS="-I /home/hancan/linuxutils_4_00_01_08/include" modules make[1]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel' make[1]: *** No rule to make target `modules'. Stop. make[1]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel' make: *** [release] Error 2 Do I have other needs to do? Regards, Xie Baojian + +Hi Xie Baujian, My bad - the kernel is in "omap" subdirectory. Can you try with: export KERNEL_INSTALL_DIR="$INSTALL_DIR/ti_components/os_tools/linux/kernel/omap" Regards, Yordan + +Hi Yordan, I have done export KERNEL_INSTALL_DIR="$INSTALL_DIR/ti_components/os_tools/linux/kernel/omap". the info is: hancan@hancan-virtual-machine:~/linuxutils_4_00_01_08/src/cmem/module$ make Making module release... make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap M=`pwd` ARCH=arm CROSS_COMPILE=/cs/arm/arm-2010q1/bin/arm-none-linux-gnueabi- \ EXTRA_CFLAGS="-I /home/hancan/linuxutils_4_00_01_08/include" modules make[1]: /cs/arm/arm-2010q1/bin/arm-none-linux-gnueabi-gcc: Command not found make[1]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' CC [M] /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.o /bin/sh: 1: /cs/arm/arm-2010q1/bin/arm-none-linux-gnueabi-gcc: not found make[2]: *** [/home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.o] Error 127 make[1]: *** [_module_/home/hancan/linuxutils_4_00_01_08/src/cmem/module] Error 2 make[1]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' make: *** [release] Error 2 Regards, Xie Baojian + +Hi Xie Baojian, can you also export: export TOOLCHAIN_PREFIX=arm-linux-gnueabihf- export PATH="$PATH:$INSTALL_DIR/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin" Regards, Yordan + +Hi Yordan, I have try that, but it seems i do not have /arch//Makefile file. the info is : hancan@hancan-virtual-machine:~/linuxutils_4_00_01_08/src/cmem/module$ make Making module release... make -C /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap M=`pwd` ARCH= CROSS_COMPILE=arm-linux-gnueabihf- \ EXTRA_CFLAGS="-I /home/hancan/linuxutils_4_00_01_08/include" modules make[1]: Entering directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' Makefile:617: arch//Makefile: No such file or directory make[1]: *** No rule to make target `arch//Makefile'. Stop. make[1]: Leaving directory `/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/kernel/omap' make: *** [release] Error 2 Thanks, Xie Baojian + +Hi Xie Baojian, can you also export: export ARCH=arm Regards, Yordan + +Hi Yordan, I have the last question. the compile error info is: CC [M] /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.o /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.c: In function 'cmem_seq_show': /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.c:988:5: error: void value not ignored as it ought to be rv = seq_printf(s, "id %d: phys addr %#llx\n", entry->id, ^ /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.c: In function 'ioctl': /home/hancan/linuxutils_4_00_01_08/src/cmem/module/cmemk.c:1425:8: error: implicit declaration of function 'dmac_map_area' [-Werror=implicit-function-declaration] dmac_map_area(virtp, size, DMA_FROM_DEVICE); ^ When I commented the function seq_printf and dmac_map_area, it can compile successfully. Is the version I downloaded wrong? Or other issues. My version is linuxutils_4_00_01_08. Regards, Xie Baojian + +Hi Xie Baojian, you need to clone cmem from git and checkout a particular tag (VisionSDK_Linux_UserGuide.pdf - "2.4.2.1.1 Clone kernel"): cd $INSTALL_DIR/ti_components/os_tools/linux/kernel/cmem git clone git://git.ti.com/ipc/ludev.git cd ludev/ git checkout -b cmem_dev d6d3e84 Or git checkout tags/4.12.00.00 Regards, Yordan + +HI Yordan, I've done above before, Another method, Can you help me compile this source code in your linux environment? and Give me a successful target code of cmem.ko. linuxutils_4_00_01_08.tar.gz Regards, Xie Baojian + +Hi Xie Baojian, this version of cmem look older and probably will not work with the VisionSDK. Please download cmem from git and checkout the appropriate version as described in the User Guide. Regards, Yordan + diff --git a/data2/text/range/5001-10000/701513.txt b/data2/text/range/5001-10000/701513.txt new file mode 100644 index 0000000000000000000000000000000000000000..1dbaf79f26d5ef81ec085d065c89a2650fc44e98 --- /dev/null +++ b/data2/text/range/5001-10000/701513.txt @@ -0,0 +1,44 @@ +Ticket Name: Linux/TDA2: sample_app nullSrc_display how to change ? + +Query Text: +Part Number: TDA2 Tool/software: Linux i build SDK_VISION_03_02_00_00 sample_app , there is a nullSrc_display link use DSP copy data. vision_sdk\sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c i change code of this rebuild but when i run it not change i move away this print , but it also have this print inf Vps_printf(" ALG_FRAMECOPY: DMA: Allocated CH (TCC) = %d (%d)\n", pAlgHandle->edmaChId, pAlgHandle->tccId); edma3Result = EDMA3_DRV_clearErrorBits( pAlgHandle->hEdma, pAlgHandle->edmaChId ); i add Vps_printf but it doesnot take effect! i dont know why? + +Responses: +Hi Shuai What i understand is you are trying to modify frame copy algo running on DSP , you have deleted the print but still you see the prints appearing when running the usecase . Please verify if you have built the libs and run the correct binary , Also try a clean build. Add a # error in the file and verify that the file is compiled and changes you are doing are in correct file. Regards Chetan.M + +Hi Chetan.M: this is my step 1、move away this obj (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66$) 2、move away this lib (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/lib/tda2xx-evm/66$) 3、change code （PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/sample_app/src/rtos/alg_plugins/framecopy$/frameCopyAlgoLocalDma.c） add Vps_printf(" wordWidth: DMA: height CH (TCC) = %d (%d)\n", pAlgHandle->frameCopyObj.maxWidth,pAlgHandle->frameCopyObj.maxHeight ); dell follow print if (edma3Result == EDMA3_DRV_SOK) { Vps_printf(" ALG_FRAMECOPY: DMA: Allocated CH (TCC) = %d (%d)\n", pAlgHandle->edmaChId, pAlgHandle->tccId); edma3Result = EDMA3_DRV_clearErrorBits( pAlgHandle->hEdma, pAlgHandle->edmaChId ); } else { Vps_printf(" ALG_FRAMECOPY: DMA: ERROR in EDMA CH allocation\n"); } 4、make -s -j depend 5、make -s -j 6、make sure PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/opt/vision_sdk/sample_app.out is renew. 7、run sample_app.out i think it should make some print change , but it no change , [HOST] [HOST ] 1850.496065 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [HOST] [HOST ] 1850.520161 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 1850.520252 s: IPC_OUT_0 : Create Done !!! [HOST] [DSP1 ] 1850.520344 s: IPC_IN_0 : Create in progress !!! [HOST] [DSP1 ] 1850.520740 s: IPC_IN_0 : Create Done !!! [HOST] [DSP1 ] 1850.520954 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [DSP1 ] 1850.521076 s: ALG_FRAMECOPY: DMA: Allocated CH (TCC) = 0 (0) [HOST] [DSP1 ] 1850.571463 s: ALGORITHM: Create Done (algId = 0) !!! [HOST] [DSP1 ] 1850.571707 s: IPC_OUT_0 : Create in progress !!! [HOST] [DSP1 ] 1850.571829 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 1850.572073 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 1850.573171 s: IPC_IN_0 : Create Done !!! + +I don't know why. i think obj lib and sample_app.out is renew! If I modify the code make some mistake, compile will also prompt. so i think the code was compiled! + +Are you booting from SD / nfs , I suspect the booting is happening from different location and build binary is different , Try md5sum check on both binaries and ensure running binary and built are same Regards Chetan.M + +Hi Chetan.M i am booting from NFS , I ADD print in (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/sample_app/src/hlos/chains_common/chains_main.c) it have reaction! but change in (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/sample_app/src/rtos/alg_plugins/framecopy/frameCopyAlgoLocalDma.c) no reaction! BESTWISHES SHUAI + +Shuai , You are running frame copy on A15 or DSP .. ? Regards Chetan.M + +can you build it as BUILD_ALGORITHMS=yes from the \apps\configs\\cfg.mk Regards Chetan.M + +ok！ let me thy , i running frame copy on DSP! BESTWISHESH SHUAI + +Thanks Shuai , Please let me know if it solved the issue Regards Chetan.M + +Hi Chetan.M BUILD_ALGORITHMS=yes then make -s -j failed make: *** /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/algorithms: No such file or directory. Stop. make[3]: *** [algorithmslib] Error 2 + +Hi Shuai , Not all algo src is released , hence you are getting the error Regards Chetan.M + +Hi : Chetan.M in PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/ have apps sample_app binaries build docs links_fw no algorithms so how to solve this problem? make: *** /home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/algorithms: No such file or directory. Stop. make[3]: *** [algorithmslib] Error 2 i think set BUILD_ALGORITHMS=no PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/sample_app/src/rtos/alg_plugins/framecopy$/frameCopyAlgoLocalDma.c is builded ,as i move obj of frameCopyAlgoLocalDma.c , rebulid creat PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release$/frameCopyAlgoLocalDma.se66 and frameCopyAlgoLocalDma.oe66 . + +Hi Shuai , i am not able to understand your problem Regards Chetan.M + +Hi Chetan.M: this is my step 1、move away this obj (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66$) 2、move away this lib (PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/lib/tda2xx-evm/66$) 3、change code （PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/sample_app/src/rtos/alg_plugins/framecopy$/frameCopyAlgoLocalDma.c） add Vps_printf(" wordWidth: DMA: height CH (TCC) = %d (%d)\n", pAlgHandle->frameCopyObj.maxWidth,pAlgHandle->frameCopyObj.maxHeight ); dell follow print if (edma3Result == EDMA3_DRV_SOK) { Vps_printf(" ALG_FRAMECOPY: DMA: Allocated CH (TCC) = %d (%d)\n", pAlgHandle->edmaChId, pAlgHandle->tccId); edma3Result = EDMA3_DRV_clearErrorBits( pAlgHandle->hEdma, pAlgHandle->edmaChId ); } else { Vps_printf(" ALG_FRAMECOPY: DMA: ERROR in EDMA CH allocation\n"); } 4、make -s -j depend 5、make -s -j 6、make sure PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs/opt/vision_sdk/sample_app.out is renew. 7、run sample_app.out i think it should make some print change , but it no change , [HOST] [HOST ] 1850.496065 s: #### ENTERING SAMPLE_APP:NULL SOURCE -> DISPLAY USE CASE #### [HOST] [HOST ] 1850.520161 s: IPC_OUT_0 : Create in progress !!! [HOST] [HOST ] 1850.520252 s: IPC_OUT_0 : Create Done !!! [HOST] [DSP1 ] 1850.520344 s: IPC_IN_0 : Create in progress !!! [HOST] [DSP1 ] 1850.520740 s: IPC_IN_0 : Create Done !!! [HOST] [DSP1 ] 1850.520954 s: ALGORITHM: Create in progress (algId = 0) !!! [HOST] [DSP1 ] 1850.521076 s: ALG_FRAMECOPY: DMA: Allocated CH (TCC) = 0 (0) [HOST] [DSP1 ] 1850.571463 s: ALGORITHM: Create Done (algId = 0) !!! [HOST] [DSP1 ] 1850.571707 s: IPC_OUT_0 : Create in progress !!! [HOST] [DSP1 ] 1850.571829 s: IPC_OUT_0 : Create Done !!! [HOST] [IPU2 ] 1850.572073 s: IPC_IN_0 : Create in progress !!! [HOST] [IPU2 ] 1850.573171 s: IPC_IN_0 : Create Done !!! + +Please add a while 1 loop and halt and debug further. Regards Chetan.M + +Hi Chetan.M i am bootint nsf to my virtual machine/virtual-machine:~/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs$ ， not from SD card . also virtual-machine:~/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs$ is copy in sd card the first time . now i rebuild and copy virtual-machine:~/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs$ in SD card again! then the print come out! but if i change RTOS alg_plugins rebuild then i have to copy ~/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs in SD card , It takes too much time ， so is there any convenient way ？？ BESTWISHES shuai + +Hi Shuai , Check your env.txt is it pointing to nfs boot , Also the initial logs while booting prints the boot environment please check it . To ensure the binaries are picked form nfs disconnect the Ethernet and try it should not boot. Regards Chetan.M + +Hi Chetan.M this is my step boot key root then ifconfig eth0 172.17.218.88 netmask 255.255.224.0 mount -t nfs -o nolock,nfsvers=3,vers=3 172.17.218.87:/home/hancan/PROCESSOR_SDK_VISION_03_02_00_00/ti_components/os_tools/linux/targetfs /mnt cd /mnt/opt/vision_sdk/ source ./vision_sdk_load.sh ./sample_app.out ~ if i change A15 code just rebuild and reboot but if i chage C66 code i have to cp dra7-dsp1-fw.xe66 /media/hancan/rootfs/lib/firmware/ BESTWISHES shuai + +No , Please refer linux user guide for NFS boot Regards Chetan.M + diff --git a/data2/text/range/5001-10000/702337.txt b/data2/text/range/5001-10000/702337.txt new file mode 100644 index 0000000000000000000000000000000000000000..7f6db15ec0c12e3fe269e52bceccfc2172515a68 --- /dev/null +++ b/data2/text/range/5001-10000/702337.txt @@ -0,0 +1,12 @@ +Ticket Name: 컴파일러 / TDA2 : TIDL modules compile error / TDA2 + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: MATHLIB, Tool/software: TI C/C++ Compiler Hello All I installed the development environment such as Vsion SDK(3.3.0.0), CCS(v8), XDC Tools(4_9-2015q3) by reference to the Vision SDK_UserGuide_TDA2xx.pdf. Then I tried building application by commend (gmake -s -j depend and gmake -s -j ) and successful compiled it. but I can't see updated the latest .out file in the folder(c:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDL.01.01.00.00\modules\ti_dl\test\out\) Here is my question 1. How can I build the source(ti_dl\test) ? while using gmake -s -j 2. I tried installation to do building the folder by reference to the TIDeepLearningLibrary_UserGuide.pdf But these packages needed in the document were already installed as below according to config.mk (c:\PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDL.01.01.00.00\makerules\) It turn out that these packages does not need to be installed and set environment variables. DSP_TOOLS ?="c:\ti\ti-cgt-c6000_8.2.3" ARP32_TOOLS ?="/datalocal1/ti_components/cg_tools/windows/C6000_7.4.2" TIARM_TOOLS ?="/datalocal1/ti_components/cg_tools/linux/ti-cgt-arm_5.2.5" XDAIS_PATH ?="/datalocal1/ti_components/codecs/xdais_7_24_00_04" UTILS_PATH ?="C:\ti\ccsv5\utils\cygwin" VXLIB_PATH ?="/datalocal1/ti_components/algorithms/vxlib_c66x_1_1_1_0" DMAUTILS_PATH ?=/datalocal1/ti_components/algorithms/REL.DMAUTILS.00.08.00.02/dmautils ALGFRAMEWORK_PATH ?=a0393754@bangvideoapps01:/datalocal1/ti_components/algorithms/REL.ALGFRAMEWORK.02.08.00.00/algframework MATHLIB_INSTALL_DIR ?="/datalocal1/ti_components/algorithms/mathlib_c66x_3_1_0_0" Should I install these packages again? 3. When I build with command " gmake CORE=DSP" or "CORE-EVE " in path(PROCESSOR_SDK_VISION_03_03_00_00\ti_components\algorithms\REL.TIDL.01.01.00.00\modules\ti_dl\test\), there was a error message "The specified path can not be found. I tried it after #1 and tried it after installation of new package. My development environment is as below PC : Intel i7-6500 CPU 2.5GHz, windows7 64bit, RAM 16GB Target : TDA2X, sys-bios Thank you in advance + +Responses: +Hi Khethan, Please follow section 3.3 Building Sample Test Application in the TIDeepLearningLibrary_UserGuide.pdf document. Regarding your questions 1. Don't use -j option, please use gmake CORE=dsp or gmake CORE=eve as shown in build steps 2. Yes, you need to install and set all the tools paths with exact versions shown in the document.. also copied them here for your reference.. DSP_TOOLS ?="C:\ti\ccsv5\tools\compiler\c6000_7.4.2" ARP32_TOOLS ?="C:\ti\ccsv5\tools\compiler\arp32_1.0.7" TIARM_TOOLS ?="C:\ti\ccsv5\tools\compiler\arm_5.0.4" XDAIS_PATH ?="C:\ti\xdais_7_22_00_03" DMAUTILS_PATH ?="C:\ti\dmautils_08_00_02\REL.DMAUTILS.00.08.00.02\dmautils" 3. Use build commands shown in senction 3.3.5 of the TIDeepLearningLibrary_UserGuide.pdf . Thanks, Praveen + +Hi Praveen, I succeeded in creating the file(eve_test_dl_algo.out) by referring to the document. By the way, The TDA2 EVM is not available and I have not tried the next step, and I am trying to host emulation function by referring to chapter 3.5. I downloaded vision SDK source release version(3.01) for host emulation and installed VS 2017 When executing the command(gmake CORE=eve TARGET_BUILD=debug TARGET_PLATFORM=PC) in Chapter 3.5.2, an error occurred as follows. What seems to be the problem? c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.0 0\modules\ti_dl\test>gmake CORE=eve "C:/ti/ccsv8/utils/cygwin/"\mkdir -p "./out" || cd "./out" if exist .\out\eve_test_dl_algo.out.exe del .\out\eve_test_dl_algo.out.exe LINK /NODEFAULTLIB:msvcrtd.lib "C:/PROCESSOR_SDK_VISION_03_01_00_00/ti_component s/algorithms/REL.DMAUTILS.00.08.00.02/dmautils/libs/PC/eve/debug/dmautils.lib "" ../../ti_dl"/lib/PC/eve/debug/tidl_algo.lib" /DEBUG /nologo /MACHINE:X86 /OUT :.\out\eve_test_dl_algo.out.exe c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_componen ts\algorithms\REL.TIDL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\.\src\rep ort_utils.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.T IDL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\.\src\tidl_config.obj c:\PRO CESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.00\out\ PC\eve\debug\modules\ti_dl\test\.\src\tidl_image_preproc.obj c:\PROCESSOR_SDK_VI SION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.00.00\out\PC\eve\debug\ modules\ti_dl\test\.\src\tidl_tb.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_comp onents\algorithms\REL.TIDL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\..\.. \..\common\configparser.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\al gorithms\REL.TIDL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\commo n\ti_draw_utils.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms \REL.TIDL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\common\ti_mem _manager.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TI DL.00.08.00.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\common\eve\eve_profi le.obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00. 08.00.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\common\eve\curve_fitting.o bj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08.0 0.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\common\eve\ti_stats_collector. obj c:\PROCESSOR_SDK_VISION_03_01_00_00\ti_components\algorithms\REL.TIDL.00.08. 00.00\out\PC\eve\debug\modules\ti_dl\test\..\..\..\common\eve\cred.obj Microsoft (R) Incremental Linker Version 14.14.26431.0 Copyright (C) Microsoft Corporation. All rights reserved. LINK : fatal error LNK1181: '.obj' 입력 파일을 열 수 없습니다. gmake: *** [outfile] Error 1181 Thanks, khethan + +Hi Khethan, It looks like you using older version of Vision SDK and TIDL releases. Can you please use latest release of VSDK 3.3 and TIDL 01.01 releases. Thanks, Praveen + diff --git a/data2/text/range/5001-10000/702428.txt b/data2/text/range/5001-10000/702428.txt new file mode 100644 index 0000000000000000000000000000000000000000..c7cf8a7c64b99e575d2427f7266eb3513fa17252 --- /dev/null +++ b/data2/text/range/5001-10000/702428.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: how to add a algplugin use opencv? + +Query Text: +Part Number: TDA2 Tool/software: Linux when i write a algplugin use opencv on a15 (linux ), complie is ok ,but linking is error . i don't know why ？？　 the example i refered is opencvcanny # apps: tda2px-evm: Creating archive apps.a # apps: tda2px-evm: Compiling chains_vipSingleCamOpenCVOpenCLDilationSgxDisplay.c # apps: tda2px-evm: Compiling chains_vipSingleCamOpenCVOpenCLDilationSgxDisplay_priv.c # apps: tda2px-evm: Creating archive apps.a # apps: tda2px-evm: Compiling opencvOpenCLDilationAlgo.c # apps: tda2px-evm: Compiling opencvOpenCLDilationLink_algPlugin.c # apps: tda2px-evm: Compiling openclDilation.cpp # apps: tda2px-evm: Creating archive apps.a # apps: tda2px-evm: Linking /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `int cv::ocl::getStringInfo(int (*)(_cl_device_id*, unsigned int, unsigned int, void*, unsigned int*), _cl_device_id*, unsigned int, std::__cxx11::basic_string, std::allocator >&) [clone .constprop.320]': ocl.cpp:(.text._ZN2cv3ocl13getStringInfoIPFiP13_cl_device_idjjPvPjES3_EEiT_T0_jRNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE.constprop.320[_ZN2cv3ocl7Context4Impl10setDefaultEv]+0x26): undefined reference to `clGetPlatformInfo' ocl.cpp:(.text._ZN2cv3ocl13getStringInfoIPFiP13_cl_device_idjjPvPjES3_EEiT_T0_jRNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE.constprop.320[_ZN2cv3ocl7Context4Impl10setDefaultEv]+0x5e): undefined reference to `clGetPlatformInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::OpenCLBufferPoolBaseImpl::freeAllReservedBuffers()': ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE22freeAllReservedBuffersEv[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE22freeAllReservedBuffersEv]+0x4a): undefined reference to `clReleaseMemObject' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::OpenCLBufferPoolBaseImpl::setMaxReservedSize(unsigned int)': ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE18setMaxReservedSizeEj[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE18setMaxReservedSizeEj]+0x80): undefined reference to `clReleaseMemObject' ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE18setMaxReservedSizeEj[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE18setMaxReservedSizeEj]+0x18e): undefined reference to `clReleaseMemObject' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::OpenCLBufferPoolBaseImpl::~OpenCLBufferPoolBaseImpl()': ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memED2Ev[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memED5Ev]+0x5a): undefined reference to `clReleaseMemObject' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::Device::Impl::getStrProp(unsigned int) const [clone .isra.50]': ocl.cpp:(.text._ZNK2cv3ocl6Device4Impl10getStrPropEj.isra.50+0x2c): undefined reference to `clGetDeviceInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::PlatformInfo::Impl::getStrProp(unsigned int) const [clone .isra.55]': ocl.cpp:(.text._ZNK2cv3ocl12PlatformInfo4Impl10getStrPropEj.isra.55+0x2c): undefined reference to `clGetPlatformInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::OpenCLBufferPoolBaseImpl::release(_cl_mem*)': ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE7releaseES5_[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE7releaseES5_]+0x68): undefined reference to `clReleaseMemObject' ocl.cpp:(.text._ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE7releaseES5_[_ZN2cv3ocl24OpenCLBufferPoolBaseImplINS0_20OpenCLBufferPoolImplENS0_13CLBufferEntryEP7_cl_memE7releaseES5_]+0x106): undefined reference to `clReleaseMemObject' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::get_platform_name(_cl_platform_id*, cv::String&) [clone .constprop.314]': ocl.cpp:(.text._ZN2cv3oclL17get_platform_nameEP15_cl_platform_idRNS_6StringE.constprop.314+0x2a): undefined reference to `clGetPlatformInfo' ocl.cpp:(.text._ZN2cv3oclL17get_platform_nameEP15_cl_platform_idRNS_6StringE.constprop.314+0x58): undefined reference to `clGetPlatformInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::haveOpenCL()': ocl.cpp:(.text._ZN2cv3ocl10haveOpenCLEv+0x20): undefined reference to `clGetPlatformIDs' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::Platform::Impl::init()': ocl.cpp:(.text._ZN2cv3ocl8Platform4Impl4initEv[_ZN2cv3ocl8Platform4Impl4initEv]+0x26): undefined reference to `clGetPlatformIDs' ocl.cpp:(.text._ZN2cv3ocl8Platform4Impl4initEv[_ZN2cv3ocl8Platform4Impl4initEv]+0x50): undefined reference to `clGetPlatformInfo' ocl.cpp:(.text._ZN2cv3ocl8Platform4Impl4initEv[_ZN2cv3ocl8Platform4Impl4initEv]+0xa8): undefined reference to `clGetPlatformInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::Device::set(void*)': ocl.cpp:(.text._ZN2cv3ocl6Device3setEPv+0x11e): undefined reference to `clGetDeviceInfo' ocl.cpp:(.text._ZN2cv3ocl6Device3setEPv+0x14c): undefined reference to `clGetDeviceInfo' ocl.cpp:(.text._ZN2cv3ocl6Device3setEPv+0x17c): undefined reference to `clGetDeviceInfo' ocl.cpp:(.text._ZN2cv3ocl6Device3setEPv+0x1aa): undefined reference to `clGetDeviceInfo' ocl.cpp:(.text._ZN2cv3ocl6Device3setEPv+0x1e2): undefined reference to `clGetDeviceInfo' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o):ocl.cpp:(.text._ZNK2cv3ocl6Device11addressBitsEv+0x22): more undefined references to `clGetDeviceInfo' follow /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core.a(ocl.cpp.o): In function `cv::ocl::Queue::operator=(cv::ocl::Queue const&)': ocl.cpp:(.text._ZN2cv3ocl5QueueaSERKS1_+0x64): undefined reference to `clFinish' ocl.cpp:(.text._ZN2cv3ocl5QueueaSERKS1_+0x6a): undefined reference to `clReleaseCommandQueue' /home/disk4/install_dir/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_core + +Responses: +Hi What is the vision SDK version you use? Which OS on A15, Linux or Bios? regards, Shiju + +visionsdk version is 3.3 , run linux on A15 + +I could see a lot of undefined reference to some symbols, i guess these are from your new Algorithms, Please include the Alg lib in \vision_sdk\apps\MAKEFILE.MK See how other OPENVX_A15_LIBS are included as reference Another option is to compile your files along with Alg plug-in files regards, Shiju + diff --git a/data2/text/range/5001-10000/704430.txt b/data2/text/range/5001-10000/704430.txt new file mode 100644 index 0000000000000000000000000000000000000000..349c1e56e21807b9975464ebef2281e219ebbfcb --- /dev/null +++ b/data2/text/range/5001-10000/704430.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EVM5777: Linux Boot Halt Issue + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hello, I am running PROCESSOR_SDK_VISION_03_01_00_00 Linux on the tda2evm5777 and I am having an issue when I try to run it on another hardware (Part 1 below). I also tried to recreate the issue on the tda2evm5777 hardwaren(see part 2). Part 1 Linux starts to boot but will stop after these print statements: [ 2.653974] dmm 4e000000.dmm: initialized all PAT entries [ 2.661366] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 2.668038] [drm] No driver support for vblank timestamp query. [ 2.674367] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0 [ 2.693383] pcf857x: probe of 0-0020 failed with error -121 [ 2.699149] pcf857x: probe of 0-0021 failed with error -121 [ 2.705199] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.824026] asoc-simple-card sound0: tlv320aic3x-hifi <-> 48468000.mcasp mapping ok [ 2.846947] omap_hsmmc 480d1000.mmc: card claims to support voltages below defined range [ 2.856117] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.861575] hctosys: unable to open rtc device (rtc0) [ 2.875008] evm_1v8: disabling [ 2.878099] aic_dvdd: disabling [ 2.881432] ldousb: disabling [ 2.884702] pbias_mmc_omap5: disabling [ 2.888628] ALSA device list: [ 2.891624] #0: DRA7xx-EVM [ 2.895222] Waiting for root device PARTUUID=adadfbee-02... [ 2.906404] mmc1: queuing unknown CIS tuple 0x91 (3 bytes) [ 2.912637] mmc1: new high speed SDIO card at address 0001 Part 2 I tried to recreate the issue on the evaluation board (tda2evm5777) by disabling i2c1 in the dra7-evm-common.dts file. we can create a similar boot up halt. Here are the ending print statements for that: [ 2.261911] Power Management for TI OMAP4+ devices. [ 2.267080] Registering SWP/SWPB emulation handler [ 2.274549] dmm 4e000000.dmm: initialized all PAT entries [ 2.295529] omapdss_dss 58000000.dss: master bind failed: -517 [ 2.302038] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.307889] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.314316] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.433424] Adding alias for supply vdd,cpu0 -> vdd,4a003b20.oppdm [ 2.439631] Adding alias for supply vbb,cpu0 -> vbb,4a003b20.oppdm [ 2.445917] ti_oppdm 4a003b20.oppdm: Unable to get vdd regulator:-517 [ 2.453691] omapdss_dss 58000000.dss: master bind failed: -517 [ 2.461362] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.469302] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr25 mode [ 2.475754] omap_hsmmc 480b4000.mmc: no pinctrl state for sdr12 mode [ 2.483051] hctosys: unable to open rtc device (rtc0) [ 2.501201] evm_1v8: disabling [ 2.504305] evm_3v3_sw: disabling [ 2.507636] aic_dvdd: disabling [ 2.510794] pbias_mmc_omap5: disabling [ 2.514580] vmmcwl_fixed: disabling [ 2.518280] ALSA device list: [ 2.521259] No soundcards found. [ 2.525593] Waiting for root device PARTUUID=adadfbee-02... Questions What is Linux trying to do or waiting on that would make it pause at this point in the bootup sequence? Does Linux require ECC DDR? Why would disabling I2C1 on a Vayu result in a similar boot halt? Please let me know if you need any information. I can also provide more boot print statements if it helps. Thank you in advance! -iFer + +Responses: +Hi Have you reviewed the HW differences between the TI EVM and other HW - you will need to make appropriate changes to enable/ disable device nodes in the Linux Device tree file that describes your platform HW Does Linux require ECC DDR? No, Linux does not require ECC for DDR you can review your complete boot log - typically the boot flow includes probing of connecting devices and driver modules registered with the kernel. Following this the initialization scripts from the root FS are executed for configuring rest of your system.If either the device probe is stuck or you have some unfulfilled dependencies , you might see behavior similar to the one above You will need to carefully analyse the HW differences and make appropriate changes From the logs above, in both places the init seems to be stuck after initial MMC driver probe. Before disabling the I2C instance also review for devices connected to the I2C1 bus and ensure that the driver/software doesnt depend on that I2c instance anymore + +Hi, I2C1 is where TPS659039(PMIC) is connected. MMC requires ldo1 regulator which is on TPS659039 PMIC. Hence you see the boot hang when you disable I2C1. - Keerthy + +Hello, Thank you for your help. I have several differences between Vayu EVM and the other hardware. For more specifics on the other hardware, I have successfully booted Starterware and RTOS applications fine on the other hardware. Specifics about other hardware: 1) Boot device is MMC1. 2) EMMC is not present. 3) MMC regulator is always enabled. 4) SYS_BOOT is configured for sd boot. What I do not know, is what components on the Vayu board (and dtsi entries) does the default Vision SDK Linux kernel require to be there/enabled by default for Linux to not halt. That will help me narrow it down, as there are various differences. For example, on the Vayu board, the gpio expander is used for the vayu mmc reg enable, but on the other hardware, it is hard wired on. Would this cause the default Linux kernel to halt booting? If so, what DTSI entries do I disable/modify? What are the other components/dtsi entries that the default Vision SDK Linux kernel require to boot that RTOS/Starterware do not require to boot? Thank you for your help! -iFer + +Hi With Linux, your device tree file describes your board/hardware configuration. The default from our release would have enabled all the peripherals that need to be controlled from Linux - typically the video capture(and possibly display) related peripherals are controlled from RTOS side. depending on your case requirements, you need to finalize the peripherals that need to be controlled from Linux - for purpose of debugging you can mark a device node in the DT file as being disabled if you do not want to enable access to that from the Linux side. typical (but not complete - refer standard device tree file again) list of peripherals handled by linux include uart, usb, ethernet, mmc, i2c instances for interacting with PMIC, audio codec, video display output devices etc + diff --git a/data2/text/range/5001-10000/705552.txt b/data2/text/range/5001-10000/705552.txt new file mode 100644 index 0000000000000000000000000000000000000000..94c6ad4d4f789864e2143d3bfddd85316525b060 --- /dev/null +++ b/data2/text/range/5001-10000/705552.txt @@ -0,0 +1,8 @@ +Ticket Name: Linux/TDA2: c66 alg_plugins structures contain each other compilation problem + +Query Text: +Part Number: TDA2 Tool/software: Linux i add a new in vision_sdk\apps\src\rtos\alg_plugins ,but compil failed in linux ,follow is the log "framecopy/Arcsoft_AHD_Utils.h", line 172: warning: declaration is not visible outside of function "framecopy/Arcsoft_AHD_Layer.h", line 42: warning: typedef name has already been declared (with same type) "framecopy/Arcsoft_AHD_Net.c", line 157: error: argument of type "Network *" is incompatible with parameter of type "struct __tag_network *" "framecopy/Arcsoft_AHD_Net.c", line 157: error: argument of type "AHDGlobalHandle *" is incompatible with parameter of type "struct AHDGlobalHandle *" "framecopy/Arcsoft_AHD_Net.c", line 184: error: argument of type "Network *" is incompatible with parameter of type "struct __tag_network *" "framecopy/Arcsoft_AHD_Net.c", line 184: error: argument of type "AHDGlobalHandle *" is incompatible with parameter of type "struct AHDGlobalHandle *" "framecopy/Arcsoft_AHD_Net.c", line 220: error: argument of type "Network *" is incompatible with parameter of type "struct __tag_network *" "framecopy/Arcsoft_AHD_Net.c", line 220: error: argument of type "AHDGlobalHandle *" is incompatible with parameter of type "struct AHDGlobalHandle *" is calling MVoid forward_convolutional_layer(MCONV_LAYER *l,Network *net,AHDGlobalHandle *pHandle) structures contain each other typedef struct __tag_layer{ LAYER_TYPE type; ACTIVATION activation; COST_TYPE cost_type; MVoid(*forward) (struct __tag_layer *, struct __tag_network *, struct AHDGlobalHandle *); //MVoid(*forward) (struct __tag_layer *, Network *, AHDGlobalHandle *); MInt32 i32Batch_normalize; MInt32 i32Shortcut; MInt32 i32Batch; MInt32 i32Flipped; MInt32 i32Inputs; MInt32 i32Outputs; MInt32 i32Truths; MInt32 i32h, i32w, i32c; MInt32 i32out_h, i32out_w, i32out_c; MInt32 i32N; MInt32 i32Max_boxes; MInt32 i32Groups; MInt32 i32Size; MInt32 i32Stride; MInt32 i32Reverse; MInt32 i32Pad; MInt32 i32Sqrt; MInt32 i32Index; MFloat fDot; MFloat fJitter; MInt32 i32Softmax; MInt32 i32Classes; MInt32 i32Coords; MInt32 i32Background; MInt32 i32Rescore; MInt32 i32Log; //*** adam param MInt32 i32Adam; MFloat fB1; MFloat fB2; MFloat fEps; MFloat * pfm; MFloat * pfv; //*** normalization_layer param MFloat fAlpha; MFloat fBeta; MFloat fKappa; MFloat fCoord_scale; MFloat fObject_scale; MFloat fNoobject_scale; MFloat fClass_scale; MInt32 i32Bias_match; MInt32 i32Random; MFloat fThresh; MInt32 i32Classfix; MInt32 i32Absolute; MInt32 i32Dontload; MInt32 i32Dontloadscales; MFloat fTemperature; MInt32 * pi32Indexes; // max-pool param MInt16 * pi16Biases; MFloat * pfBiases; MFloat * pfScales; MInt16 * pi16Weights; MFloat * pfWeights; //*** local layer param MFloat * pfCol_image; MInt32 * pi32Input_layers; MInt32 * pi32Input_sizes; MInt16 * pi16Output; MFloat * pfOutput; MFloat * pfSquared; MFloat * pfNorms; //*** batch_norm param MFloat * pfSpatial_mean; MFloat * pfMean; MFloat * pfVariance; MFloat * pfRolling_mean; MFloat * pfRolling_variance; MFloat * pfX; MFloat * pfX_norm; MInt32 i32Workspace_size; //*** for dsp MInt16 *conv_buffer; }MLAYER,*PMLAYER; typedef struct __tag_network { MInt32 i32N; MInt32 i32Batch; MInt32 *pi32Seen; MInt32 i32Subdivisions; MFloat fMomentum; MFloat fDecay; MLAYER *psLayers; MInt32 i32Outputs; MFloat *pfOutput; LEARNING_RATE_POLICY ePolicy; MFloat fLearning_rate; MFloat fGamma; MFloat fScale; MFloat fPower; MInt32 i32Time_steps; MInt32 i32Step; MInt32 i32Max_batches; MFloat *pfScales; MInt32 *pi32Steps; MInt32 i32Num_steps; MInt32 i32Burn_in; MInt32 i32Adam; MFloat fB1; MFloat fB2; MFloat fEps; MInt32 i32Inputs; MInt32 i32h, i32w, i32c; MInt32 i32Max_crop; MInt32 i32Min_crop; MFloat fAngle; MFloat fAspect; MFloat fExposure; MFloat fSaturation; MFloat fHue; //*** net-net param MFloat *pfTruth; MInt16 *pi16Input; MFloat *pfInput; MFloat *pfWorkspace; MInt32 i32Index; }Network,*PNetwork; typedef struct AHDGlobalHandle { MHandle hMemMgr; // memory handle of global handle MUInt64 nFrameNum; MInt32 i32Width; // video width MInt32 i32Height; // video height MUInt32 u32PixelArrayFormat; // video pixel array format AHD_ENUM_MODEL eModel; MInt32 i32Roll; MInt32 i32SignMaxNum; // max number of hands to be detected MImageStore sImgStore; // skip frame Network sNet; MFloat fThresh; MBOX *psBoxes; MFloat **pfProbs; AHD_SIGNS *psHandsInner; // internal hands detected result MLong *plTmpBuf; // image resize buffer MUInt32 u32BufSize; // buffer size ASVLIMAGE sImgGray; MHandle hmcvParallelMonitor; // convolution multi thread MHandle hmcvParallelMonitor2; // detect multi thread MInt32 i32taskId; }AHDGlobalHandle; + +Responses: +Hi Shuai, I am not sure that I completely understand the code, but in the declaration of "struct __tag_layer" there is: MVoid(*forward) (struct __tag_layer *, struct __tag_network *, struct AHDGlobalHandle *); //MVoid(*forward) (struct __tag_layer *, Network *, AHDGlobalHandle *); the commented function expects second argument of type "Network *" which matches the function "forward_convolutional_layer()" and also what is passed as paraeter on line 157. What is the result when you use the second definition of MVoid(*forward)() in the "struct __tag_layer"? Regards, Yoradn + diff --git a/data2/text/range/5001-10000/709450.txt b/data2/text/range/5001-10000/709450.txt new file mode 100644 index 0000000000000000000000000000000000000000..1e162a2255b4a18045e79a16ae7f453dc145ed98 --- /dev/null +++ b/data2/text/range/5001-10000/709450.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Do not boot the board using vsdk 3.04 linux + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: DRA742, PMP Tool/software: Linux I built the vsdk 3.04 linux version and ran it on the tda2x evm board. However, the following log is displayed and it does not boot. What should I do? U-Boot SPL 2016.05-00010-g9551b3d-dirty (Jul 16 2018 - 21:55:52) DRA752-GP ES1.1 no pinctrl for ddr_1_8v ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment Trying to boot from MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... *** Warning - bad CRC, using default environment reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d-dirty (Jul 16 2018 - 21:55:52 -0400) CPU : DRA752-GP ES1.1 Model: TI DRA742 Board: DRA74x EVM REV E.0 DRAM: 1.5 GiB MMC: mmc@4809c000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr25-rev11 mode FDT_ERR_NOTFOUND mmc@4809c000: fail to find sdr12-rev11 mode FDT_ERR_NOTFOUND mmc@480b4000: fail to find hs-rev11 mode FDT_ERR_NOTFOUND OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** *** Warning - bad CRC, using default environment GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 ## Error: "board_findfdt" not defined switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt ** Unable to read file uEnv.txt ** switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** File not found /boot/zImage ** ** First descriptor is NOT a primary desc on 1:1 ** switch to partitions #0, OK mmc1(part 0) is current device ** First descriptor is NOT a primary desc on 1:1 ** mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev boot_ack boot_partition partition_access - Change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => + +Responses: +Hi, can you check chapter "4.2 Preparing SD card & Boot" in VisionSDK_Linux_UserGuide.pdf and make sure your SD card was created without errors and also your SYSBOOT settings are correct? Regards, Yordan + +I used mksdboot.sh. it does not occur any error. + +Hi, have you downloaded the right sources and checkout the right tags (chapter "2.4.2 Install Linux Components" in user guide)? Did everything build without errors? Regards, Yordan + +I have worked at ubuntu 18.04 machine. It is the problem. It works well on ubuntu 16.04. thanks for your help + diff --git a/data2/text/range/5001-10000/712394.txt b/data2/text/range/5001-10000/712394.txt new file mode 100644 index 0000000000000000000000000000000000000000..77309166e214c1b7a981525e01d8395f58ac525a --- /dev/null +++ b/data2/text/range/5001-10000/712394.txt @@ -0,0 +1,46 @@ +Ticket Name: Downscaled image looks not proper when compared with original image + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi All, We have down-scaled a picture of lines in VID2 pipeline of DSS from 1280*720 to 1120*630.But we see the down-scaled picture looks distorted than the original image. The original image format is ARGB. In original picture lines are smooth but in the downscaled image ,the lines look discontinuous with some minor breaks at some interval. Following are the registers configured in DSS. reg_write(DISPC_VID2_FIR, 0x04920492);//downscaling ratio FIR_Coefficients : 5 taps reg_write(DISPC_VID2_FIR_COEF_H_0, 0xA720AFD); reg_write(DISPC_VID2_FIR_COEF_H_1, 0x186F00FF); reg_write(DISPC_VID2_FIR_COEF_H_2, 0x2867F900); reg_write(DISPC_VID2_FIR_COEF_H_3, 0x3A5BF501); reg_write(DISPC_VID2_FIR_COEF_H_4, 0xF44C4CF4); reg_write(DISPC_VID2_FIR_COEF_H_5, 0xF55B3AF5); reg_write(DISPC_VID2_FIR_COEF_H_6, 0xF96728F8); reg_write(DISPC_VID2_FIR_COEF_H_7, 0x6F18FA); reg_mod(DISPC_VID2_FIR_COEF_HV_0, 0xA720AFD, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_1, 0x186F00FA, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_2, 0x2867F9F8, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_3, 0x3A5BF5F5, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_4, 0xF44C4C00, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_5, 0xF55B3A01, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_6, 0xF9672800, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_7, 0x6F18FF, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_V_0, 0xFDFD, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_1, 0xFAFF, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_2, 0xF800, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_3, 0xF501, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_4, 0xF4, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_5, 0x1F5, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_6, 0xF8, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_7, 0xFFFA, 15, 0); reg_mod(DISPC_VID2_ATTRIBUTES, 0x1, 21, 21); // 5 -vertical taps reg_mod(DISPC_VID2_ATTRIBUTES, 0x3, 6, 5); // resize both horizontal & vertical Please find attached the original and the down-scaled images attached. Can you let us know what could be the issue. Is all the configuration Ok or else any other additional configuration also needed to be done? With regards, Jeyaseelan + +Responses: +Hi Jeyaseelan, What is the SoC you are using: TDA2 or TDA3? Regards, Rishabh + +Hi Rishabh, We use DRA74xx SoC only. It is for back camera(reverse gear) application. With regards, Jeyaseelan + +Hi Jeyaseelan, Ok. Have you tried using the same coefficients that you were using earlier: e2e.ti.com/.../704763 Sometime back I had faced same issue during driver development on a different SoC. It was an issue with coefficients and I got proper output with correct coefficients. Regards, Rishabh + +Hi Jeyaseelan, You might also want to check if you have set input and output height and width appropriately. Regards, Rishabh + +FIR_Calculation.zipHi Rishabh, For FIR co-efficients we have used the file referred by you on the processor_sdk only . coeff = halDssVidGetScalarCoeff(1280,1120); v_coeff = halDssVidGetScalarCoeff(720,630); It returns the table {9, 9, coefM9 }, for the downscaling ratio of 1280->1120 and 720->630 static const VpsHal_DssScCoeff coefM9[8] = { {-((Int16) 3), 10, 114, 10, -((Int16) 3)}, {-((Int16) 6), 24, 111, 0, -((Int16) 1)}, {-((Int16) 8), 40, 103, -((Int16) 7), 0}, {-((Int16) 11), 58, 91, -((Int16) 11), 1}, {0, -((Int16) 12), 76, 76, -((Int16) 12)}, {1, -((Int16) 11), 91, 58, -((Int16) 11)}, {0, -((Int16) 7), 103, 40, -((Int16) 8)}, {-((Int16) 1), 0, 111, 24, -((Int16) 6)}, }; Using the above table only coefficients are calculated.Have attached the test files used.Can you confirm if the calculation is fine? With regards, Jeyaseelan + +Hi Jeyaseelan, Kindly ignore my previous reply (I have deleted it to avoid confusion). I have a simple suggestion. Can you use the TI DSS driver and see if you get the correct output. You should run the TI driver and take DSS register dump and compare with dump of custom driver. You can easily check if you have a driver issue from the comparison of two dumps. The turnaround time will be very low with this approach. If you see the wrong output even with TI driver kindly post a reply here. Regards, Rishabh + +Hi Rishabh, TI DSS driver ,you mean running file "vpshal_dssDispcVid.c"directly? If so i will try to do run this and feedback in a couple of days. With regards, Jeyaseelan + +Hi, Display example is present here: PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\drv\vps\examples\dss\displayDss. This example works on TI EVM. You can modify this example to use the custom input parameters. You can run this to get the register dump. Regards, Rishabh + +Hi Rishabh, I am trying to set up for CCS for building the above source.Once done ,i will share the updates. With regards, Jeyaseelan + +Hi Jeyaseelan, To build the source you don't need CCS. This example is makefile based. Regards, Rishabh + +Hi Rishabh, I am trying to install vision sdk (PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin)in linux systems.But it says unsupported file type.Please find the attached screen shot of installing.Can you let know to do installation in Linux side With regards, Jeyaseelan + +Hi, Can you try "sudo chmod +x ./PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin" and then "sudo ./PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin". Regards, Rishabh + +Hi Jeyaseelan, Are you able to get the proper image using Vision SDK? Regards, Rishabh + +Hi Rishabh, Now i can able to install with the steps you told above and make the vision sdk example -displayDss with default settings. It generated the below file vps_examples_displayDss_ipu1_0_release.xem4 Have the below questions. 1. Now i have to customize this for SoC DRA7xx and for custom board. Do you have any suggestion which files needed to be changed for this change 2. The bin file generated is in .xem4 extension. But we have it to be .out file for flashing.Can i directly rename it into .out file With regards, Jeyaseelan + +Hi Jeyaseelan, The answers are given below: 1. Can you check if this binary is under tda2xx folder. If yes then you don't need to customize it for SoC. The idea is that you should use this binary on TDA2xx EVM. Customizing the example for board requires a tangible effort and will not be useful to you. You can modify one of the test cases of this example depending on the display setup you have to exactly match the input and output height/width. 2. .xem4 is same as .out. You can use CCS to load and run this binary. Regards, Rishabh + +Hi Rishabh, Thanks for your reply. Currently in our board JTAG port is disabled and do not have access to CCS as well.Normally we flash the .out file and during u-boot time(A15) ,m4-IPU1 reset line is released after image is copied from flash to ram. So i changed the extension from .xem4 to .out and did our regular type of flashing and IPU1 run. But when tried to take register dump of DSS FIR co-efficient registers, all looks not initialized. => md.size 0x580010F0 580010f0: 00000000 00000000 00000000 00000000 ................ 58001100: 00000000 00000000 00000000 00000000 ................ 58001110: 00000000 00000000 00000000 00000000 ................ 58001120: 00000000 00000000 00000000 00000000 ................ 58001130: 00000000 00000000 00000000 00000000 ................ 58001140: 00000000 00000000 00000000 00000000 ................ 58001150: 00000000 00000000 00000000 00008400 ................ 58001160: 07ff07f8 00000800 00000001 00000001 ................ 58001170: 04000400 00000000 00000000 00000000 ................ 58001180: 00000000 00000000 00000000 00000000 ................ 58001190: 00000000 00000000 00000000 00000000 ................ 580011a0: 00000000 00000000 00000000 00000000 ................ 580011b0: 00000000 00000000 00000000 00000000 ................ 580011c0: 00000000 00000000 00000000 00000000 ................ 580011d0: 00000000 00000000 00000000 00000000 ................ 580011e0: 00000000 00000000 00000000 00000000 So i have a doubt if this binary is running. I will try to debug further and keep you updated. With regards, Jeyaseelan + +Hi Jeyaseelan, You can run this binary using SBL MLO (not uboot). Can you check Vision SDK documentation for details on how to create app image and run using SBL. Regards, Rishabh + +Hi, Can we close this thread if the issue is resolved. Regards, Rishabh + +Hi Rishabh, I am yet to validate the solution with SDK example . Still we can close this thread with the resolution "FIR Coefficient".If needed i will open a new thread in continuation when try to run the Vision example. With regards, Jeyaseelan + +Hi Jeyaseelan, Ok thanks for the update. Let me know if you face any issues with Vision example. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/712620.txt b/data2/text/range/5001-10000/712620.txt new file mode 100644 index 0000000000000000000000000000000000000000..88630d470eb9384ae2c68a326f335887b873c498 --- /dev/null +++ b/data2/text/range/5001-10000/712620.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2EVM5777: OpenCV VideoCapture RTSP stream + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hello, I am running PROCESSOR_SDK_VISION_03_1_00_00 Linux and I am trying to use the OpenCV libraries that are pre-installed in the rootfs in my own C++ code application (not within the Vision SDK framework). In my attempt to run cv::VideoCapture capture(rtsp://UserName:Password@ip_address); in my c++ code, I can compile without errors. When running the executable, once I get to the point where I attempt to open the stream, I get these errors: MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4 I checked the kernel and it looks like I do have RPMSG enabled in the kernel: root@dra7xx-evm:/tmp# cat config | grep RPMSG CONFIG_RPMSG=m CONFIG_RPMSG_RPC=m CONFIG_RPMSG_PRU=m Is there anyway to fix these errors so that I can grab from the rtsp stream? Am I using the correct C++ OpenCV call to grab from the rtsp stream? Do I have to enable anything in the kernel to use the OpenCV call? Please let me know if you need anymore information and thank you in advance for your assistance. Thank you, -iFer + +Responses: +Hi iFer, MmRpc_create: Error: open failed, name=/dev/rpmsg-dce indicates that the ipumm firmware which is for multimedia decode/encode is not loaded. Can you check if the rootfs has /lib/firmware/dra7-ipu2-fw.xem4 and is linked to dra7-ipu2-fw.xem4.ipumm-fw ? + +Hello, I looked at the /lib/firmware directory and here is the output: root@dra7xx-evm:~# ls -lF /lib/firmware/ lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru1_0-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt1_0.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru1_1-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt1_1.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru2_0-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt2_0.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru2_1-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt2_1.out -rwxr-xr-x 1 root root 9941039 Jun 27 00:37 dra7-dsp1-fw-radio.xe66* -rw-r--r-- 1 root root 7438272 Jun 27 00:37 dra7-dsp1-fw.xe66 -rw-r--r-- 1 root root 889276 Jun 27 00:37 dra7-dsp1-fw.xe66.dspdce-fw -rw-r--r-- 1 root root 21810444 Jun 27 00:37 dra7-dsp1-fw.xe66.opencl-monitor -rw-r--r-- 1 root root 7438272 Jun 27 00:37 dra7-dsp2-fw.xe66 -rw-r--r-- 1 root root 21810444 Jun 27 00:37 dra7-dsp2-fw.xe66.opencl-monitor -rw-r--r-- 1 root root 9499744 Jun 27 00:37 dra7-ipu2-fw.xem4 -rw-r--r-- 1 root root 3743108 Jun 27 00:37 dra7-ipu2-fw.xem4.ipumm-fw -rw-r--r-- 1 root root 576565 Jun 27 00:37 dra7-ipu2-fw.xem4.map -rw-r--r-- 1 root root 186 Jun 27 00:37 goodix_9271_cfg.bin drwxr-xr-x 6 root root 4096 Jun 27 00:37 ipc/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 pru/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 ti-connectivity/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 tigon/ -rw-r--r-- 1 root root 4002 Jun 27 00:37 vpdma-1b8.bin The files you were referencing do exist, but it seems that they are not linked. How do I proceed from here? Thank you!, -iFer + +Hi iFer, Please refer this link to link processors.wiki.ti.com/index.php to dynamically link multimedia ipumm firmware to IPU2 and check if it works. Note: OpenCV rtsc capture is not a tested usecase in vision-sdk. Thanks Ramprasad + +Hello, Thank you for your help! I attempted to follow the instructions to link firmware correctly by running these commands: cd /sys/bus/platform/drivers/omap-rproc/ echo 55020000.ipu > unbind rm /lib/firmware/dra7-ipu2-fw.xem4 ln -s /lib/firmware/dra7-ipu2-fw.xem4.ipumm-fw /lib/firmware/dra7-ipu2-fw.xem4 echo 55020000.ipu > bind I rebooted linux and double checked to see if the link stayed and that 55020000.ipu is still bounded and they were. I then attempted to rerun my code to open up an RTSP stream, but it still gives me these error messages: MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4MmRpc_create: Error: open failed, name=/dev/rpmsg-dce ../git/libdce.c:416: dce_ipc_init ERROR: Failed eError == DCE_EOK error val -4../git/libdce.c:479: Engine_open ERROR: Failed dce_ipc_init(coreIdx) == DCE_EOK error val -4 Here is the output of ls -lF in the /lib/firmware directory: root@dra7xx-evm:/lib/firmware# ls -lF lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru1_0-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt1_0.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru1_1-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt1_1.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru2_0-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt2_0.out lrwxrwxrwx 1 root root 49 Jun 27 00:37 am57xx-pru2_1-fw -> /lib/firmware/pru/PRU_RPMsg_Echo_Interrupt2_1.out -rwxr-xr-x 1 root root 9941039 Jun 27 00:37 dra7-dsp1-fw-radio.xe66* -rw-r--r-- 1 root root 7438272 Jun 27 00:37 dra7-dsp1-fw.xe66 -rw-r--r-- 1 root root 889276 Jun 27 00:37 dra7-dsp1-fw.xe66.dspdce-fw -rw-r--r-- 1 root root 21810444 Jun 27 00:37 dra7-dsp1-fw.xe66.opencl-monitor -rw-r--r-- 1 root root 7438272 Jun 27 00:37 dra7-dsp2-fw.xe66 -rw-r--r-- 1 root root 21810444 Jun 27 00:37 dra7-dsp2-fw.xe66.opencl-monitor lrwxrwxrwx 1 root root 26 Jul 24 20:19 dra7-ipu2-fw.xem4 -> dra7-ipu2-fw.xem4.ipumm-fw -rw-r--r-- 1 root root 3743108 Jun 27 00:37 dra7-ipu2-fw.xem4.ipumm-fw -rw-r--r-- 1 root root 576565 Jun 27 00:37 dra7-ipu2-fw.xem4.map -rw-r--r-- 1 root root 186 Jun 27 00:37 goodix_9271_cfg.bin drwxr-xr-x 6 root root 4096 Jun 27 00:37 ipc/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 pru/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 ti-connectivity/ drwxr-xr-x 2 root root 4096 Jun 27 00:37 tigon/ -rw-r--r-- 1 root root 4002 Jun 27 00:37 vpdma-1b8.bin Here is the output of ls -lF in the /sys/bus/platform/drivers/omap-rproc directory root@dra7xx-evm:/sys/bus/platform/drivers/omap-rproc# ls -lF lrwxrwxrwx 1 root root 0 Jul 24 19:50 40800000.dsp -> ../../../../devices/platform/44000000.ocp/40800000.dsp/ lrwxrwxrwx 1 root root 0 Jul 24 19:50 41000000.dsp -> ../../../../devices/platform/44000000.ocp/41000000.dsp/ lrwxrwxrwx 1 root root 0 Jul 24 19:53 55020000.ipu -> ../../../../devices/platform/44000000.ocp/55020000.ipu/ --w------- 1 root root 4096 Jul 24 19:53 bind lrwxrwxrwx 1 root root 0 Jul 24 19:50 module -> ../../../../module/omap_remoteproc/ --w------- 1 root root 4096 Jul 24 19:50 uevent --w------- 1 root root 4096 Jul 24 19:53 unbind I need to open up an RTSP stream from an IP camera. Is there anyway for me to do that? If not, then is there a way for me to grab a frame from the IP camera using C++ code with the OpenCV libraries already on the visionSDK linux? Thank you!, -iFer + diff --git a/data2/text/range/5001-10000/712818.txt b/data2/text/range/5001-10000/712818.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5bd7ba26633c0bb211b9a6632d752b86d013951 --- /dev/null +++ b/data2/text/range/5001-10000/712818.txt @@ -0,0 +1,56 @@ +Ticket Name: TDA2: Tda2x VisionSDK + +Query Text: +Part Number: TDA2 Dear TI officer: We are developing the DMS (driver monitor system ) on TI tda2x ADAS SDK. and I am working on PROCESSOR_SDK_VISION_03_04_00_00, For our use case, beside openCV, we also need to have dlib, caffe and rppg libs. Can you guide us how to integrate these libs into TI tda2x VisionSDK? Is there pre-build and ready libs for us to direct integrate on the TI tda2x platform? Thanks and best regards He Wei Team leader for System architectures and deep learning Liteon Singapore + +Responses: +Hello Thanks for picking TI TDA2x and vision SDK for your DMS program. With respect to OpenCV, please note that you will have to use the pre-built library of openCV along with VSDK. It will not be possible to support you on how to build, adding new libs etc. to it, because the openCV support infrastructure is deprecated. I would suggest you to use the native "Links and Chain" architecture of Vision SDK rather than OpenCV to build your DMS application. Kumar, Kindly answer the queries related to dlib, caffe and rppg libs etc.? Regards, Shiju + +Dear officer, Any updated on dlib, caffe and rppg? Any pre-build libs? Is there any restriction on bios or linux? Thanks and best regards He Wei Team leader for System architectures and deep learning Liteon Singapore + +We do not support direect caffe library linking. Please refer below for TI's deep learning software offering. www.ti.com/.../spry314.pdf Also refer the user guide in the TIDL SW package (Available part of PROCESSOR_SDK_VISION_03_04_00_00 + +Dear Kumar, So "caffe is not linking directly" but its funcationality can be achieved by TIDL and TIDL is part of standard SDK release,e .g . PROCESSOR_SDK_VISION_03_04_00_00? Am I correct? Thanks and best regards He Wei Team leader for System architectures and deep learning Liteon Singapore + +Yes. you are right + +Dear Kumar, Firstly we are trying to use the OpenCV, based on the report from \ti_components\open_compute\opencv\opencv-3.1.0\docs , it shows some test cases are failure or not supported by bios, e.g. objdetect is not showing in bios, So Can i say Linux openCV provide better support/features than bios? And Can I direct build Linux openCV in windows environment by gmake? e.g. set the below in windows environment: MAKECONFIG=tda2xx_evm_linux_opencx I got complilation error when doing this. So To build linux opencv app, I must build it in native Linux host? i.e. I need to do : MAKECONFIG=tda2xx_evm_linux_opencx In native Linux host only? Thanks and best regards He Wei + +Hello If you use vision SDK Linux, then only Linux build environment is supported VSDK Bios can be built with either windows or Linux PC regards, Shiju + +Dear Shiju, Ok. I got question regarding on Linux build on PROCESSOR_SDK_VISION_03_04_00_00 by following VisionSDK_Linux_UserGuide.pdf: 1. Based on default configuration: MAKECONFIG=tda2xx_evm_linux_all The build is successfully and the corresponding 2 partition is generated in SD Card: a. boot: MLO u-boot.img uenv.txt b. rootfs: bin etc lib mnt opt sbin usr boot home lost+found opencl_fs_patches proc sys var dev include media opencl_fs_patches.tar.gz run tmp But when running from tdax2 board, it shows error: Booting from eMMC ... Wrong Image Format for bootm command ERROR: can't get kernel image! => Any advise on the error? Take note that: I am using "make" to build the sdk in my Linux host instead of "gmake" as indicated in user guild, is this typo in Linux user guild? Or I should install gmake in Linux? 2. Then If I change the build configure as: MAKECONFIG=tda2xx_evm_linux_opencx, Then I got build error: /home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found Makefile:5: recipe for target 'copy.dsp_h' failed make[7]: *** [copy.dsp_h] Error 127 Do I miss some things? Thanks and best regards He Wei + +Hello for building & testing VSDK Linux on TI EVM, kindly refer \vision_sdk\docs\Linux\VisionSDK_Linux_UserGuide.pdf for building and running OpenCV usecases refer \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_opencx.pdf regards, Shiju + +Dear Shiju Tks and few questions: 1. In \vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_opencx.pdf, it means to build the openCV source code, (section 1.4), I thought the OpenCV is pre-build in the SDK already and no need to re-build from the source code, am I right? 2. Must to rebuild the cmem too? 3. In my build case, I set: MAKECONFIG=tda2xx_evm_linux_opencx, The error is that it can find the clocl cmd in the below path: home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found Should I install the "clocl" cmd in that path and build? Thanks and best regards He Wei + +Typo: The error is that it can not find the clocl cmd in the below path: home/hewei/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs/usr/share/ti/opencl/bin/x86/clocl: Command not found Should I install the "clocl" cmd in that path and build? + +Please make sure you untar the open CL tarball into the file system. Follow the steps in VisionSDK_Linux_UserGuide.pdf 2.4.2.2.4 Opencl supported package regards, Shiju + +Please make sure you untar the open CL tarball into the file system. Follow the steps in VisionSDK_Linux_UserGuide.pdf 2.4.2.2.4 Opencl supported package regards, Shiju + +Dear Shiju, We had done this 2.4.2.2.4 already. and Can I confirm if the "object detection" is supported by this Linux openCV build? (We understood the object detection is not supported in BIOS openCV, this is the reason we want to build in this Linux build.) Thanks and best regards He Wei + +Hello object detection is not supported in OpenCV build, neither Bios nor Linux build regards, Shiju + +Dear Shiju, So we won't get any additional openCV features support if switching from TI Bios build to TI Linux build, am I right? Based on the test report from ti_components\open_compute\opencv\opencv-3.1.0\docs: there is one sheet "objdetect" in vayu_arm_linux_opencv_test_report.xlsx but this sheet is not shown in vayu_arm_bios_opencv_test_report.xlsx. Actually this is the reason we thought objection detection is supported in Linux build . So this is not the case? Thanks and best regards He Wei + +He Wei You are right, there is an OD present in opencv\opencv-3.1.0 lib, but not tested with vision SDK. VSDK have OD usecase without OpenCV in Bios build, just see if you can use this \vision_sdk\apps\src\rtos\usecases\vip_single_cam_object_detection2 The same UC can be ported to VSDK Linux also (with out OpenCV) Regards, Shiju + +Dear Shiju, More clear now. Normally OD is a standard feature/package in OpenCV, any reason why it is not in the TI SDK OpenCV pre-build? Any constraint? (I am asking to check if it is worth for us to do the cross-compile to add OD in). Or there is already a alternate away as you mentioned to preform the OD already hence there is no need for OpenCV OD? Further, what is the exact list of supported OpenCV features in ths VSDK ? e.g. Feature2D, imgproc, etc. - by knowing this, we could know what we can use and we can't use for the TI VSDK prebuild OpenCV. Thanks and best regards He Wei + +Dear Shiju, In addition, I notice in: \vision_sdk\apps\src\rtos\usecases\vip_single_cam_object_detection2 It is based on TDA3xx, actually we are workin gon TDA2xx board, hence this UC will not be usefully for us? Any OD UC is based on TDA2xx? Thanks and best regards He Wei + +Hi He Wei No, we do not support any of this features (OD, Feature2D, imgproc, etc.) in recompiled open CV lib. Very basic kernel/functions like cannyedge & dilation are only supported. Please use pre-built library of openCV. It will not be possible to support you to add new libs and on how to build it etc. because the openCV support infrastructure with VSDK is deprecated. regards, Shiju + +Hello He Wei \vision_sdk\apps\src\rtos\usecases\vip_single_cam_object_detection2 is supported on both TDA2x and TDA3x regards, Shiju + +Dear Shiju Noticed and Can I ask what is detail kernel/functions for TI VSDK pre-build OpenCV supported? (The reason I am asking is because we have some algo./function developed in Windows based on OpenCV, now we need to re-design/re-implement rather than direct porting as thought before, but we need to know what is exactly the TI SDK pre-build OpenCV can support..) Thanks and best regards He Wei + +This seems like a duplication , thread we are discussing same issue in another thread e2e.ti.com/.../2635980 So closing this thread + +Dear Shiju, I noticed that in PROCESSOR_SDK_VISION_03_04_00_00\ti_components\open_compute\opencv\opencv-3.1.0, it contains both openCV ibs_bios and libs_linux, So does it means TI has done the OpenCV cross-compile for both ARM bios and Linux? If this is the case, Can I just include these lib (+header files) into SDK then I can have entire set of OpenCV? Thanks and best regards He Wei + +Hi He Wei Yes, VSDK support openCV on A15 Bios and Linux, But only very basic features with limited testing. Please note that, VSDK release note stated as "For OpenCV, OpenCL & OpenVX, this is a preliminary release with limited testing (Alpha Quality)" VSDK OpenCV support infrastructure is deprecated and we would't be able to support you if any issues you face later when adding new libs or rebuilding the libs Regards, Shiju + diff --git a/data2/text/range/5001-10000/713169.txt b/data2/text/range/5001-10000/713169.txt new file mode 100644 index 0000000000000000000000000000000000000000..8a150c824ead70db8970326bd8383ae0385ed41a --- /dev/null +++ b/data2/text/range/5001-10000/713169.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: how to get DSP algorithm use time + +Query Text: +Part Number: TDA2 Tool/software: Linux how to getting the actual time consuming of the DSP algorithm? i have use WH_time[0] = _itoll(TSCH, TSCL); to get the circles of fuctions ,but i donot know how to get the actual time! BESTWISHES shuai + +Responses: +follow is the log , i use _itoll(TSCH, TSCL) and get the time is about 104ms , but i sub 80.123833 s: AHD_Detect_times2 = 104.159703 ms - [HOST] [DSP1 ] 79.984444 s: AHD_Detect_times2 = 104.099196 ms is about 140 ms, so is there anyway to get the fuction actual time not circles. [HOST] [DSP1 ] 79.845604 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 79.845635 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 79.846489 s: Af▒ [HOST] [DSP1 ] 79.984444 s: AHD_Detect_times2 = 104.099196 ms [HOST] [DSP1 ] 79.984505 s: i32SignNumber: DMA: height5 CH (TCC) = 1 (576) [HOST] [DSP1 ] 79.984536 s: 2 593 714 335 520 [HOST] [DSP1 ] 79.984810 s: inPitch[0]: DMA: outPitch[0] CH (TCC) = 768 (4096) [HOST] [DSP1 ] 79.984841 s: wordWidth2: DMA: height2 CH (TCC) = 768 (576) [HOST] [DSP1 ] 79.984871 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 79.984902 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 79.985756 s: Af▒ [HOST] [DSP1 ] 80.123833 s: AHD_Detect_times2 = 104.159703 ms [HOST] [DSP1 ] 80.123863 s: i32SignNumber: DMA: height5 CH (TCC) = 1 (576) [HOST] [DSP1 ] 80.123924 s: 2 593 714 335 520 [HOST] [DSP1 ] 80.124229 s: inPitch[0]: DMA: outPitch[0] CH (TCC) = 768 (4096) [HOST] [DSP1 ] 80.124260 s: wordWidth2: DMA: height2 CH (TCC) = 768 (576) [HOST] [DSP1 ] 80.124290 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 80.124290 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 80.125175 s: Af▒ [HOST] [DSP1 ] 80.263039 s: AHD_Detect_times2 = 104.039445 ms [HOST] [DSP1 ] 80.263100 s: i32SignNumber: DMA: height5 CH (TCC) = 1 (576) [HOST] [DSP1 ] 80.263130 s: 2 593 714 335 520 [HOST] [DSP1 ] 80.263405 s: inPitch[0]: DMA: outPitch[0] CH (TCC) = 768 (4096) [HOST] [DSP1 ] 80.263435 s: wordWidth2: DMA: height2 CH (TCC) = 768 (576) [HOST] [DSP1 ] 80.263435 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 80.263466 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 80.264350 s: Af▒ [HOST] [DSP1 ] 80.402488 s: AHD_Detect_times2 = 104.230851 ms [HOST] [DSP1 ] 80.402519 s: i32SignNumber: DMA: height5 CH (TCC) = 1 (576) [HOST] [DSP1 ] 80.402549 s: 2 593 714 335 520 [HOST] [DSP1 ] 80.402854 s: inPitch[0]: DMA: outPitch[0] CH (TCC) = 768 (4096) [HOST] [DSP1 ] 80.402915 s: wordWidth2: DMA: height2 CH (TCC) = 768 (576) [HOST] [DSP1 ] 80.402946 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 80.402976 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 80.403800 s: Af▒ [HOST] [DSP1 ] 80.541725 s: AHD_Detect_times2 = 104.039919 ms + +Using TSCH/TSCL we can get the DSP cycles across a function. But to get the time you will have to divide by CPU frequency t0 = _itoll(TSCH, TSCL); funcABC(); t1 = _itoll(TSCH, TSCL); cycles = t1 - t0; time = (cycles / CPU_frequency) * 1000 Eg. lets cycles = 20,000,000 and CPU freq = 600,000,000 So time - (20,000,000 / 600,000,000) * 1000 = 33ms Regards, Shyam + +Hi Shyam question1 from this boot inf my cpu Frequency is 750000000 Hz?? [HOST] [HOST ] 30.213292 s: SYNC_2 : Init done - linkid-0x0 [HOST] [HOST ] 30.213444 s: SYNC_3 : Init done - linkid-0x0 [HOST] [HOST ] 30.216403 s: MERGE_0 : Init done - linkid-0x0 [HOST] [HOST ] 30.216555 s: MERGE_1 : Init done - linkid-0x0 [HOST] [HOST ] 30.216708 s: MERGE_2 : Init done - linkid-0x0 [HOST] [HOST ] 30.216860 s: MERGE_3 : Init done - linkid-0x0 [HOST] [HOST ] 30.219849 s: MERGE_4 : Init done - linkid-0x0 [HOST] [HOST ] 30.220002 s: SELECT_0 : Init done - linkid-0x0 [HOST] [HOST ] 30.220124 s: SELECT_1 : Init done - linkid-0x0 [HOST] [HOST ] 30.220215 s: GATE_0 : Init done - linkid-0x0 [HOST] [HOST ] 30.220276 s: GATE_1 : Init done - linkid-0x0 [HOST] [HOST ] 30.220368 s: GATE_2 : Init done - linkid-0x0 [HOST] [HOST ] 30.220490 s: GATE_3 : Init done - linkid-0x0 [HOST] [HOST ] 30.220581 s: SGXFRMCPY_0 : Init done - linkid-0x2000040 [HOST] [HOST ] 30.220612 s: SYSTEM: Initializing A15 Links ... DONE !!! [HOST] [HOST ] 30.220978 s: OSA: Adjusting global time, timeH by 0 units!!! [HOST] [HOST ] 30.221008 s: SYSTEM: System A15 Init Done !!! [HOST] [DSP1 ] 16.392423 s: ***** DSP1 Firmware build time 17:35:58 Jul 26 2018 [HOST] [DSP1 ] 16.392484 s: *** SYSTEM: CPU Frequency , [HOST] [DSP1 ] 16.392728 s: SYSTEM: System Common Init in progress !!! [HOST] [DSP1 ] 16.392911 s: SYSTEM: IPC init in progress !!! [HOST] [DSP1 ] 16.392942 s: SYSTEM: Attaching to [IPU2] ... [HOST] [DSP1 ] 16.675959 s: SYSTEM: Attaching to [IPU2] ... SUCCESS !!! [HOST] [DSP1 ] 16.725645 s: SYSTEM: Attaching to [DSP2] ... SUCCESS !!! [HOST] [DSP1 ] 16.750106 s: SYSTEM: Attaching to [EVE1] ... SUCCESS !!! [HOST] [DSP1 ] 16.770054 s: SYSTEM: Attaching to [EVE2] ... SUCCESS !!! [HOST] [DSP1 ] 16.790154 s: SYSTEM: Attaching to [EVE3] ... SUCCESS !!! [HOST] [DSP1 ] 16.810101 s: SYSTEM: Attaching to [EVE4] ... SUCCESS !!! [HOST] [DSP1 ] 16.810162 s: SYSTEM: Notify register to [IPU2] line 0, question2 from follow inf i sub 80.123833 s-79.984444 s=140ms ([HOST] [DSP1 ] 79.984444 s: AHD_Detect_times2 = 104.099196 ms [HOST] [DSP1 ] 80.123833 s: AHD_Detect_times2 = 104.159703 ms ) so i think AHD_Detect_times2 is small than 140ms?? right ? HOST] [DSP1 ] 79.845604 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 79.845635 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 79.846489 s: Af▒ [HOST] [DSP1 ] 79.984444 s: AHD_Detect_times2 = 104.099196 ms [HOST] [DSP1 ] 79.984505 s: i32SignNumber: DMA: height5 CH (TCC) = 1 (576) [HOST] [DSP1 ] 79.984536 s: 2 593 714 335 520 [HOST] [DSP1 ] 79.984810 s: inPitch[0]: DMA: outPitch[0] CH (TCC) = 768 (4096) [HOST] [DSP1 ] 79.984841 s: wordWidth2: DMA: height2 CH (TCC) = 768 (576) [HOST] [DSP1 ] 79.984871 s: g_sImage.pi32Pitch[0]: DMA: width CH (TCC) = 768 (768) [HOST] [DSP1 ] 79.984902 s: wordWidth42: DMA: height42 CH (TCC) = 107 (107) [HOST] [DSP1 ] 79.985756 s: Af▒ [HOST] [DSP1 ] 80.123833 s: AHD_Detect_times2 = 104.159703 ms BESTWISHES SHUAI + +Hi Shuai, 1. Yes 2. Yes Regards, Shyam + diff --git a/data2/text/range/5001-10000/713226.txt b/data2/text/range/5001-10000/713226.txt new file mode 100644 index 0000000000000000000000000000000000000000..87d725e0c9a7d5083df1a34d4627bc79bb50fc50 --- /dev/null +++ b/data2/text/range/5001-10000/713226.txt @@ -0,0 +1,191 @@ +Ticket Name: RTOS/TDA2: Unable to compile opencv + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Dear TI I am try to compile the VisionSDK with the the opencv that i can see the canny function. below is the setting under Rules.mk MAKECONFIG=tda2xx_evm_bios_all The attach is the cfg.mk which i had set.. After compile i have the error 4743.cfg.txt # +# This file defines the modules included in $(MAKECONFIG) config +# +# Modules are split into, +# - Use-cases specified in uc_cfg.mk +# - Other system config/feature, specified in this file +# +# Any specific overrides are also specified in this file +# Example, for TDA3x SoC EVE2/3/4 are not present and hence force marked as , i.e disabled +# + +# +# Additional config options +# + +# +# CPUs to included in build +# +PROC_IPU1_0_INCLUDE=yes +PROC_IPU1_1_INCLUDE=yes +PROC_IPU2_INCLUDE=yes +PROC_A15_0_INCLUDE=yes +PROC_DSP1_INCLUDE=yes +PROC_DSP2_INCLUDE=yes +PROC_EVE1_INCLUDE=yes +PROC_EVE2_INCLUDE=yes +PROC_EVE3_INCLUDE=yes +PROC_EVE4_INCLUDE=yes + + +VSDK_BOARD_TYPE=TDA2XX_EVM + +DUAL_A15_SMP_BIOS=no + +# Supported values: DDR_MEM_512M +DDR_MEM=DDR_MEM_512M + +# Supported values: ipu1_0 ipu1_1 a15_0 none +NDK_PROC_TO_USE=a15_0 + +#Used to control TFDTP stack (supported only when NDK_PROC_TO_USE = ipu1_1) +NSP_TFDTP_INCLUDE=no + +# Supported values: ipu1_0 none +FATFS_PROC_TO_USE=ipu1_0 + +# +# Used to control building of algorithm source. +# By default algorithm source not included in Vision SDK +# +BUILD_ALGORITHMS=no + +# +# Applies profile to all cores +# +# Supported profiles: release debug +#PROFILE=debug +PROFILE ?= release + +PROFILE_ipu1_0 ?= $(PROFILE) +PROFILE_ipu1_1 ?= $(PROFILE) +PROFILE_ipu2 ?= $(PROFILE) +PROFILE_c66xdsp_1 ?= $(PROFILE) +PROFILE_c66xdsp_2 ?= $(PROFILE) +PROFILE_arp32_1 ?= $(PROFILE) +PROFILE_arp32_2 ?= $(PROFILE) +PROFILE_arp32_3 ?= $(PROFILE) +PROFILE_arp32_4 ?= $(PROFILE) +PROFILE_a15_0 ?= $(PROFILE) + +# +# For TDA2xx & TDA2Ex - vision SDK can run on either IPU1 or IPU2 subsystem +# For TDA3xx - We have only IPU1 and hence IPU1 is the only option +# Select IPU primary core from the available IPU1 & IPU2 subsytems +# +# Supported values: ipu1_0 ipu2 +IPU_PRIMARY_CORE=ipu1_0 +IPU_SECONDARY_CORE=ipu2 + +# +# Set A15_TARGET_OS +# A15 can run Linux or Bios +# +# A15_TARGET_OS support +# Platform BIOS Linux +# +# TDA2XX_EVM yes yes +# TDA3XX_EVM yes no +# TDA2EX_EVM yes yes +# +# Supported values: Bios Linux +A15_TARGET_OS=Bios + +IVAHD_INCLUDE=yes +VPE_INCLUDE=yes +DSS_INCLUDE=yes + +# +# EMIF ECC and Freedom from Interference (FFI) are clubbed together as they +# involve consolidated memory map changes +# ECC_FFI_INCLUDE=yes is not supported for DDR_MEM_128M +# If ECC_FFI_INCLUDE is set to no - memory map will match older versions. +# Firewall configuration and DSP XMC configuration is enabled/disabled using this +# flag +# Vision SDK does not enable EMIF ECC but expects SBL to enable it. +# Vision SDK sets up ECC error handlers irrespective of value of ECC_FFI_INCLUDE. +# +ECC_FFI_INCLUDE=no + +AVB_INCLUDE=no + +# +# Enable below macro to enable DCAN integration into Vision SDK. +# +DCAN_INCLUDE=no + +# +# Enable below macro to enable Radar integration into Vision SDK +# +RADAR_INCLUDE=no + +# +# Enable below macro to enable OPENVX into Vision SDK +# +OPENVX_INCLUDE=yes + +CIO_REDIRECT=yes + +CPU_IDLE_ENABLED=yes + +# +# Enable below macro to view the bandwidth used by different IPs in the device +# as a graphical plot on the display screen. +# +DATA_VIS_INCLUDE=no + +OPENCL_INCLUDE=yes +ENABLE_OPENCV=yes + +HS_DEVICE=no + +# +# Enable this macro to enable Ultra sonic based initialization +# This is added as the power measurement and Ultra sonic use the same +# pad on the device. Kindly note the Ultrasonic and power measurement +# use the same GPIO6_14/15 pads with different functionalities. Ultrasonic configures +# UART10 on those pads and power measurement configures I2C3. Hence when this +# macro is yes the power measurement functionality is not supported. +# +ULTRASONIC_INCLUDE=no + +# Enable this macro to enable profiling features through system analyzer on CCS +ENABLE_UIA_PROFILING=no + +# +#Flag for task profiling +# +ENABLE_TASK_PROFILE_UTIL=yes + +include $($(MAKEAPPNAME)_PATH)/configs/$(MAKECONFIG)/uc_cfg.mk + +Responses: +Hi Wilson, Please use MAKECONFIG=tda2xx_evm_bios_opencx under Rules.make for OpenCV Regards Surya + +Dear Surya I also have a feel its that but i have try to compile and run and got these message + +Hi Wilson, Did you install all the components while installing vision sdk release ? Looking like "highgui.h" file is missing which is part of openCV release lib Could you please confirm "highgui.h" file is present under \ti_components\open_compute\opencv\opencv-3.1.0\include\opencv Regards Surya + +Dear Surya I had install the it already when i compile this + +Dear Surya I try to do a gmake -s -j showconfig and notice this is. please see pic. could this be a problem? + +Hi Wilson, No, this is nothing to do with TARGET_ROOTDIR I misinterpreted the issue, This is looking like windows 8191 characters limitation issue & is documented in TDA2xx UserGuide section 3.2 Please refer below statement IMPORTANT NOTE: If the installation folder depth is high then windows cmd prompt fails with error that it cannot find a file, even in file is present in mentioned path, this is because Windows has a limitation of 8191 characters for the commands that can execute. In such a situation as a workaround either restrict the folder depth to d:/ or if it cannot be restricted use git bash to build. Refer support.microsoft.com/.../830473 for more details. Git version used for testing is 2.13 (Always point to xdc path gmake only) Regards Surya + +Dear Surya Can you advise how to do build it using git bash + +Hi wilson, Same gmake command you can use to build gmake -s -j depend gmake -s -j Regards Surya + +Dear Surya I am still have the same error + +Hi Wilson, Try a clean build Also please run "where gmake" or "which gmake" & confirm it is pointed to xdc tool remove below folders before building 1. vision_sdk\binaries 2. vision_sdk\links_fw\include\config then run below commands gmake clean gmake -s -j depend gmake -s -j Regards Surya + +Dear Surya after following what you mention. it still the same error. I have try it on git bash and git cmd the error is the same. + +Hi Wilson, Can you try building without -j option ? I tried with both (with and without -j option, it built successfully) Regards Surya + +Dear Surya Not sure why. i have create new visionsdk after setting some of the parameter i has no error. + diff --git a/data2/text/range/5001-10000/714062.txt b/data2/text/range/5001-10000/714062.txt new file mode 100644 index 0000000000000000000000000000000000000000..ecd5dbecf1de8c15f50828e66c37d1d667727961 --- /dev/null +++ b/data2/text/range/5001-10000/714062.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: float data exp optimization + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: MATHLIB Tool/software: Linux i have a func have to do many exp , how can i optimization it make it fast! + +Responses: +i use expsp_i in SDK_VISION_03_02_00_00\ti_components\algorithms\mathlib_c66x_3_1_0_0\packages\ti\mathlib\src\expsp replace exp，but i think result is not similar . + +Hi Shuai, I am not familiar with that, but I see there are also "expsp" and "expsp_c" functions, can you try with them? Regards, Yordan + +Hi：Yordan exp2sp is similar with exp ,,expsp and exp have big diffrence! what is expsp and exp2sp mean? BESTWISHES shuai + +Hi Shuai, exp2sp(a) calculates 2 raised to the power a, expsp(a) calculates number 'e' raised to power a. Regards, Yordan + +Hi Yordan i compare expsp(a) and exp(a) , have some problem , some time is right but for negative is error. follow is the print x2 x3 is input ahi and alo is expsp(x2 ) expsp(x3) ahi1 and alo1 is exp(x2) exp(x3) . x2 = -0.013672, x3 = 0.005859, ahi = 0.986421, alo = 1.005877, ahi1 = 0.986421, alo1 = 1.005877 x2 = -0.423828, x3 = -0.275391, ahi = 0.574765, alo = 0.585481, ahi1 = 0.654536, alo1 = 0.759275 x2 = 0.112305, x3 = -0.017578, ahi = 1.118854, alo = 0.982575, ahi1 = 1.118854, alo1 = 0.982575 x2 = 0.125000, x3 = 0.017578, ahi = 1.133148, alo = 1.017734, ahi1 = 1.133148, alo1 = 1.017734 x2 = 0.107422, x3 = -0.223633, ahi = 1.113404, alo = 0.616583, ahi1 = 1.113404, alo1 = 0.799609 x2 = 0.026367, x3 = -0.041016, ahi = 1.026718, alo = 0.649917, ahi1 = 1.026718, alo1 = 0.959814 x2 = -0.368164, x3 = -0.253906, ahi = 0.533608, alo = 0.598196, ahi1 = 0.692004, alo1 = 0.775765 x2 = 0.138672, x3 = -0.015625, ahi = 1.148747, alo = 0.984496, ahi1 = 1.148747, alo1 = 0.984496 x2 = 0.125000, x3 = -0.011719, ahi = 1.133148, alo = 0.988350, ahi1 = 1.133148, alo1 = 0.988350 x2 = 0.099609, x3 = -0.235352, ahi = 1.104739, alo = 0.609399, ahi1 = 1.104739, alo1 = 0.790293 x2 = 0.056641, x3 = -0.033203, ahi = 1.058275, alo = 0.655014, ahi1 = 1.058275, alo1 = 0.967342 x2 = -0.150391, x3 = -0.248047, ahi = 0.582582, alo = 0.601712, ahi1 = 0.860372, alo1 = 0.780323 x2 = 0.133789, x3 = -0.013672, ahi = 1.143152, alo = 0.986421, ahi1 = 1.143152, alo1 = 0.986421 x2 = 0.091797, x3 = 0.013672, ahi = 1.096142, alo = 1.013766, ahi1 = 1.096142, alo1 = 1.013766 x2 = 0.057617, x3 = -0.174805, ahi = 1.059309, alo = 0.568531, ahi1 = 1.059309, alo1 = 0.839621 x2 = 0.162109, x3 = -0.076172, ahi = 1.032666, alo = 0.627465, ahi1 = 1.175989, alo1 = 0.926657 x2 = -0.052734, x3 = -0.372070, ahi = 0.642345, alo = 0.605297, ahi1 = 0.948632, alo1 = 0.689306 x2 = 0.110352, x3 = -0.056641, ahi = 1.116671, alo = 0.639841, ahi1 = 1.116671, alo1 = 0.944934 x2 = 0.087891, x3 = 0.039063, ahi = 1.091869, alo = 1.039835, ahi1 = 1.091869, alo1 = 1.039835 x2 = -0.005859, x3 = -0.186523, ahi = 0.994158, alo = 0.561907, ahi1 = 0.994158, alo1 = 0.829839 x2 = 0.176758, x3 = -0.078125, ahi = 1.047905, alo = 0.626241, ahi1 = 1.193342, alo1 = 0.924849 x2 = -0.077148, x3 = -0.339844, ahi = 0.626853, alo = 0.548936, ahi1 = 0.925752, alo1 = 0.711882 x2 = 0.157227, x3 = -0.104492, ahi = 1.027636, alo = 0.609944, ahi1 = 1.170261, alo1 = 0.900782 x2 = 0.101563, x3 = 0.013672, ahi = 1.106899, alo = 1.013766, ahi1 = 1.106899, alo1 = 1.013766 x2 = 0.108398, x3 = -0.165039, ahi = 1.114492, alo = 0.574110, ahi1 = 1.114492, alo1 = 0.847861 x2 = 0.120117, x3 = -0.087891, ahi = 1.127629, alo = 0.620155, ahi1 = 1.127629, alo1 = 0.915861 x2 = -0.093750, x3 = -0.291016, ahi = 0.616532, alo = 0.576404, ahi1 = 0.910510, alo1 = 0.747504 x2 = 0.135742, x3 = -0.132813, ahi = 1.145386, alo = 0.592913, ahi1 = 1.145387, alo1 = 0.875629 x2 = 0.101563, x3 = 0.011719, ahi = 1.106899, alo = 1.011788, ahi1 = 1.106899, alo1 = 1.011788 x2 = 0.182617, x3 = -0.096680, ahi = 1.054063, alo = 0.614728, ahi1 = 1.200355, alo1 = 0.907847 x2 = 0.114258, x3 = -0.059570, ahi = 1.121041, alo = 0.637969, ahi1 = 1.121041, alo1 = 0.942169 x2 = -0.082031, x3 = -0.249023, ahi = 0.623799, alo = 0.601124, ahi1 = 0.921243, alo1 = 0.779562 x2 = 0.140625, x3 = -0.090820, ahi = 1.150993, alo = 0.618341, ahi1 = 1.150993, alo1 = 0.913182 x2 = 0.095703, x3 = 0.008789, ahi = 1.100432, alo = 1.008828, ahi1 = 1.100432, alo1 = 1.008828 x2 = 0.138672, x3 = -0.102539, ahi = 1.148747, alo = 0.611137, ahi1 = 1.148747, alo1 = 0.902543 x2 = 0.101563, x3 = -0.064453, ahi = 1.106899, alo = 0.634862, ahi1 = 1.106899, alo1 = 0.937580 x2 = -0.080078, x3 = -0.192383, ahi = 0.625019, alo = 0.558624, ahi1 = 0.923044, alo1 = 0.824991 x2 = 0.166016, x3 = -0.053711, ahi = 1.036708, alo = 0.641718, ahi1 = 1.180592, alo1 = 0.947706 x2 = 0.085938, x3 = 0.007813, ahi = 1.089738, alo = 1.007843, ahi1 = 1.089738, alo1 = 1.007843 x2 = 0.104492, x3 = -0.099609, ahi = 1.110147, alo = 0.612930, ahi1 = 1.110147, alo1 = 0.905191 x2 = 0.116211, x3 = -0.053711, ahi = 1.123233, alo = 0.641718, ahi1 = 1.123233, alo1 = 0.947706 x2 = -0.046875, x3 = -0.181641, ahi = 0.646120, alo = 0.564658, ahi1 = 0.954207, alo1 = 0.833901 x2 = 0.145508, x3 = -0.041016, ahi = 1.156627, alo = 0.649917, ahi1 = 1.156627, alo1 = 0.959814 x2 = 0.079102, x3 = 0.028320, ahi = 1.082314, alo = 1.028725, ahi1 = 1.082314, alo1 = 1.028725 x2 = 0.079102, x3 = -0.081055, ahi = 1.082314, alo = 0.624409, ahi1 = 1.082314, alo1 = 0.922143 x2 = 0.160156, x3 = -0.060547, ahi = 1.030651, alo = 0.637346, ahi1 = 1.173694, alo1 = 0.941250 x2 = 0.015625, x3 = -0.269531, ahi = 1.015748, alo = 0.588922, ahi1 = 1.015748, alo1 = 0.763737 x2 = 0.179688, x3 = -0.074219, ahi = 1.050979, alo = 0.628692, ahi1 = 1.196843, alo1 = 0.928469 x2 = 0.122070, x3 = 0.019531, ahi = 1.129833, alo = 1.019723, ahi1 = 1.129834, alo1 = 1.019723 x2 = 0.087891, x3 = -0.110352, ahi = 1.091869, alo = 0.606381, ahi1 = 1.091869, alo1 = 0.895519 x2 = 0.185547, x3 = -0.065430, ahi = 1.057155, alo = 0.634242, ahi1 = 1.203877, alo1 = 0.936665 x2 = 0.039063, x3 = -0.328125, ahi = 1.039835, alo = 0.555406, ahi1 = 1.039835, alo1 = 0.720273 x2 = 0.228516, x3 = -0.111328, ahi = 1.103570, alo = 0.605789, ahi1 = 1.256733, alo1 = 0.894645 x2 = 0.158203, x3 = 0.007813, ahi = 1.028641, alo = 1.007843, ahi1 = 1.171404, alo1 = 1.007843 x2 = 0.106445, x3 = -0.157227, ahi = 1.112317, alo = 0.578613, ahi1 = 1.112317, alo1 = 0.854510 x2 = 0.168945, x3 = -0.075195, ahi = 1.039750, alo = 0.628078, ahi1 = 1.184055, alo1 = 0.927562 x2 = 0.006836, x3 = -0.348633, ahi = 1.006859, alo = 0.544132, ahi1 = 1.006859, alo1 = 0.705652 x2 = 0.213867, x3 = -0.116211, ahi = 1.087522, alo = 0.602838, ahi1 = 1.238458, alo1 = 0.890287 BESTWISHES SHUAI + +Hi Shuai, I am not familiar with mathlib, I will try to find someone who can help. Regards, Yordan + +Hi Yordan i make some mistake! it is ok now! thanks! shuai + diff --git a/data2/text/range/5001-10000/714772.txt b/data2/text/range/5001-10000/714772.txt new file mode 100644 index 0000000000000000000000000000000000000000..71aad31400925f932cae78576053259231317e9d --- /dev/null +++ b/data2/text/range/5001-10000/714772.txt @@ -0,0 +1,131 @@ +Ticket Name: Linux/TDA2: Usecase problem with logs over network + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi everyone, I am working to enable sending execution logs via network instead of uart. This is implemented on RTOS, so I created files for linux which are as on RTOS (network_cons_ipc.c and network_cons_tsk.c). While I managed to get logs over network, now I am unable to run any of usecases. When I start any of usecases, log just freeze and I can't do anything. I tried usecases with cameras and with network links and always same is happening. Does anyone knows what could cause this problem? P.S. I am using Processor SDK 3.03. Thanks in advance, Sasa + +Responses: +Hello Sasa, Are you getting logs continueously or it also freezes? When you disconnect PC console tool, does application recovers? Do you have way to get logs via UART? Also please share output of gmake -s -j showconfig. + +Hello Prasad, while I am going through the usecase menu and submenus, I am getting logs continueously. It freezes when I start some usecase, when it needs to print informations about creating links. If I disconnect PC console tool then I am unable to se if application recovers as it is only way to get logs in that moment. Getting logs over UART is possible and it works fine. I read in documentation that there can be only one way to get logs at one time, so if network is chosen, logs can't be obtained via UART. I am sending output of gmake -s -j showconfig in attachment. Best regards, Sasa showconfig_log.txt # +# Build Config is [ tda2xx_evm_linux_all ] +# Build Config file is @ /home/rtrk/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk +# Build Config .h file is @ /home/rtrk/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all/system_cfg.h +# Build CPUs is @ ipu2 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=no +# PROC_IPU1_1_INCLUDE=no +# PROC_IPU2_INCLUDE=yes +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=yes +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=yes +# PROC_EVE3_INCLUDE=yes +# PROC_EVE4_INCLUDE=yes +# PROC_A15_0_INCLUDE=yes +# +# Platform config, +# VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda2xx-evm +# DUAL_A15_SMP_BIOS=no +# DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=no [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=none [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Linux [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=release [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Linux [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=yes +# VPE_INCLUDE=yes +# CAL_INCLUDE=no +# ISS_INCLUDE=no +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=no +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=/home/rtrk/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=yes +# +# Log config, +# ENABLE_UART_LOG=no +# ENABLE_NETWORK_LOG=yes +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=yes +# +# IPC config, +# WORKQ_INCLUDE=no +# IPC_LIB_INCLUDE=no +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=no +# RADAR_INCLUDE=no +# CPU_IDLE_ENABLED=yes +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb alpha_amv_board.dtb +# CMEM_INCLUDE=yes +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=yes +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_autocalibration ALG_dmaSwMs ALG_framecopy ALG_sparseopticalflow ALG_structurefrommotion ALG_surroundview +# +# Use-cases included in build, +# UC_srv_calibration UC_null_src_display UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_2mp_3d_srv UC_lvds_vip_multi_cam_3d_adaptive_srv UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_ov490_vip_multi_cam_3d_srv UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display UC_vip_single_cam_ffn_amv UC_pcie_link_rcv UC_pcie_link_send UC_null_src_display UC_nullSrc_null UC_multi_cam_view_alpha_amv UC_capture_null +# +# +# CPUs that are NOT required but included in config [ tda2xx_evm_linux_all ], +# +# +# CPUs that are required but not included in config [ tda2xx_evm_linux_all ], +# +# ERROR: IPU1_0 MUST be included in application +# +# Edit /home/rtrk/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/configs/tda2xx_evm_linux_all/cfg.mk to include or exclude CPUs in an application +# + +Hello Sasa, From the showconfig logs, it looks you are running network stack on Linux and not BIOS? Is that true? >>NDK_PROC_TO_USE=none If yes, have you ported the network console application on linux? Have you taken care of priorities of task (NETWORK_CONS_TX_TSK_PRI)? + +More details put in another thread ( e2e.ti.com/.../2638291 and my reply there to keep single thread. >> Thanks for providing all details, this is useful for debug. I will check and let you know if any issues in porting the console tool. Meanwhile can you please try reducing priority of console threads instead of OSA_THR_PRI_DEFAULT? + +Hi Prasad, As you suggested, I have tryed to reduce priority of console threads, so instead of OSA_THR_PRI_DEFAULT I tryed to use OSA_THR_PRI_MIN, but behavior is still the same - I can navigate throught menu, but after some of use-cases is selected to run everything freezes. This is what happens in most of the cases, but if once Use-Case is started successfully - it is possible to stop it, run some other use cases without any problems... Problem apears again after the board is powered off and powered on... Best regards, Nebojsa + +Hello Nebojsa, Could you connect JTAG and see where IPU2 is when stuck happens? You can use ROV feature of CCS to get each tasks state, please check the priorities and states of each task along with network console task. + +Hello Nebojsa, Closing this thread due to inactivity. Please reply below or start new thread if locked. Thanks. + diff --git a/data2/text/range/5001-10000/715954.txt b/data2/text/range/5001-10000/715954.txt new file mode 100644 index 0000000000000000000000000000000000000000..14f7f8f426a2028f65ee1d5310e7010e622ed8fc --- /dev/null +++ b/data2/text/range/5001-10000/715954.txt @@ -0,0 +1,30 @@ +Ticket Name: RTOS/TDA2: opencv cross compile , missing bios cmake. + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS I would like to cross-compile opencv for TDA2x. I follow TI cross compile document. 1) git clone git://git.ti.com/opencv/tiopencv.git 2) git checkout -b opencv_3.1 remotes/origin/tiopencvrelease_3.1 I cannot get cmake file - arm-gnueabi_bios.toolchain.cmake Can you upload the file to here? Thank you + +Responses: +Hi Chee Peng, PFA cmake file Please remember to modify components paths to point before build arm-gnueabi_bios.toolchain.zip Regards Surya + +Hi Surya, Thanks for the file. I edited the path. But when run, it stuck at endiness test. Detected version of GNU GCC: 72 (702) Check if the system is big endian Searching 16 bit integer CMake Error at /usr/share/cmake-2.8/Modules/TestBigEndian.cmake:44 (message): no suitable type found Call Stack (most recent call first): CMakeLists.txt:527 (test_big_endian) I read the cross compile document. It seems TI have some patch. 7. Edit the cmakelists.txt if necessary (optional, not required, taken care in the patch) a. Opencv performs tests to identify if the endianness is big endian. However, this test doesn’t run b. So, similar to setting endianness to IOS and not performing test add the following line (search for BIGENDIAN) i. If (IOS)…. Elseif(GENERIC) set(WORDS_BIGENDIAN 0)  (this is because A15 view memory in little endian fashion in TDA2xx) Could you upload the patch? + +Hi Chee Peng, PFA patch 0001-set-WORDS_BIGENDIAN-to-0-for-TDA2xx-platform.zip Regards Surya + +Hi Chee Peng, Any progress on this Are you able to run ? Regards Surya + +Hi Surya, The patch is working! I can configure and generate cmake now! However, when i try to crosscompile opencv i stuck at In file included from /home/cheepeng/ti/ccsv8/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/dirent.h:7:0, from /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:134: /home/cheepeng/ti/ccsv8/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/sys/dirent.h:10:2: error: #error " not supported" #error " not supported" ^~~~~ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:140:43: error: 'DIR' has not been declared static bool isDir(const cv::String& path, DIR* dir) What do you think? regards Chee Peng + +Hi Chee Peng, Could you please try with tool chain "gcc-arm-none-eabi-4_9-2015q3" ? Regards Surya + +Hi Chee Peng, Are you able to compile with "gcc-arm-none-eabi-4_9-2015q3" ? Regards Surya + +Hi Surya, Thank you for suggestion I using gcc-arm-none-eabi-4_9-2015q3, but still stuck at dirent,h What do you think? Best regards CHee Peng [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/split.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/downhill_simplex.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/tables.cpp.obj [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/glob.cpp.obj In file included from /home/cheepeng/ti/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include/dirent.h:6:0, from /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:134: /home/cheepeng/ti/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include/sys/dirent.h:10:2: error: #error " not supported" #error " not supported" ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:140:43: error: 'DIR' has not been declared static bool isDir(const cv::String& path, DIR* dir) ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp: In function 'void glob_rec(const cv::String&, const cv::String&, std::vector&, bool)': /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:222:5: error: 'DIR' was not declared in this scope DIR *dir; ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:222:10: error: 'dir' was not declared in this scope DIR *dir; ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:225:42: error: 'opendir' was not declared in this scope if ((dir = opendir (directory.c_str())) != 0) ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:230:39: error: 'readdir' was not declared in this scope while ((ent = readdir (dir)) != 0) ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:232:39: error: invalid use of incomplete type 'struct glob_rec(const cv::String&, const cv::String&, std::vector&, bool)::dirent' const char* name = ent->d_name; ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:223:12: error: forward declaration of 'struct glob_rec(const cv::String&, const cv::String&, std::vector&, bool)::dirent' struct dirent *ent; ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:252:25: error: 'closedir' was not declared in this scope closedir(dir); ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:255:21: error: 'closedir' was not declared in this scope closedir(dir); ^ make[2]: *** [modules/core/CMakeFiles/opencv_core.dir/src/glob.cpp.obj] Error 1 make[1]: *** [modules/core/CMakeFiles/opencv_core.dir/all] Error 2 + +Hi Surya, In my opinion gcc-arm-none-eabi-4_9-2015q3 is bare-metal without os. Dirent,h operation is based on OS which is TI-RTOS. I review document and found need Bios 6.45.01.29 (fail with 6.46.000.23) May I know where can i find Bios 6.45.01.29? + +Hi Chee Peng, You can download Bios 6.45.01.29 from below TI link software-dl.ti.com/.../index_FDS.html Regards Surya + +Hi Surya, Tried Bios 6.45.01.29. Same error [ 16%] Building CXX object modules/core/CMakeFiles/opencv_core.dir/src/glob.cpp.obj In file included from /home/cheepeng/ti/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include/dirent.h:6:0, from /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:134: /home/cheepeng/ti/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include/sys/dirent.h:10:2: error: #error " not supported" #error " not supported" ^ /home/cheepeng/ti/opencv/tiopencv/modules/core/src/glob.cpp:140:43: error: 'DIR' has not been declared static bool isDir(const cv::String& path, DIR* dir) The file at /home/cheepeng/ti/gcc-arm-none-eabi-4_9-2015q3/arm-none-eabi/include/sys/dirent.h have some comment /* includes , which is this file. On a system which supports , this file is overridden by dirent.h in the libc/sys/.../sys directory. On a system which does not support , we will get this file which uses #error to force an error. */ Gcc-arm-none-eabi-4_9-2015q3 is bare-metal. Dirent.h operation should be supplied by bios..... What do you think? regards cheepeng + +Hi Sorry for late reply Yes you are right "gcc-arm-none-eabi-4_9-2015q3 is bare-metal" You should use linaro tool chain instead Please refer the Linux User guide to install linaro tool chain (the supported one) & then try building Regards Surya + diff --git a/data2/text/range/5001-10000/716010.txt b/data2/text/range/5001-10000/716010.txt new file mode 100644 index 0000000000000000000000000000000000000000..231d0c3afe7c0e8cc4377329dd7372bbc52e528c --- /dev/null +++ b/data2/text/range/5001-10000/716010.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2P-ACD: NAND Flash Configiration in U-boot for TDA2p device + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello, We have a custom board with TDA2P SoC and running Linux on A15. There is NAND flash( MX30LF1G18A) connected to TDA and want to access it from U-boot. We have configured the NAND driver in U-boot and also added the gpmc node to the dts file and enabled the pinmux config. When we run the code we see U-Boot log and code hangs at NAND probing. Here is the Uboot log : U-Boot SPL 2016.05-00010-g9551b3d-dirty (Aug 06 2018 - 12:42:11) DRA762-GP ES1.0 board_init ********spl_boot_device******no pinctrl for hs200_1_8v no pinctrl for ddr_1_8v *** Warning - MMC init failed, using default environment i2c_write: error waiting for data ACK (status=0x116) i2c_write: error waiting for data ACK (status=0x116) ********spl_boot_device******Trying to boot from spl MMC1 reading dra7-ipu2-fw.lzop spl_load_file_fat: error reading file dra7-ipu2-fw.lzop, err - -1 spl: error reading image dra7-ipu2-fw.lzop, err - -1 Error loading remotecore IPU2!,Continuing with boot ... reading dra7-dsp1-fw.lzop spl_load_file_fat: error reading file dra7-dsp1-fw.lzop, err - -1 spl: error reading image dra7-dsp1-fw.lzop, err - -1 Error loading remotecore DSP1!,Continuing with boot ... reading dra7-dsp2-fw.lzop spl_load_file_fat: error reading file dra7-dsp2-fw.lzop, err - -1 spl: error reading image dra7-dsp2-fw.lzop, err - -1 Error loading remotecore DSP2!,Continuing with boot ... reading dra7-ipu1-fw.lzop spl_load_file_fat: error reading file dra7-ipu1-fw.lzop, err - -1 spl: error reading image dra7-ipu1-fw.lzop, err - -1 Error loading remotecore IPU1!,Continuing with boot ... spl: falcon_args_file not set in environment, falling back to default reading single-stage-boot.dtb spl_load_image_fat_os: error reading image single-stage-boot.dtb, err - -1 reading u-boot.img reading u-boot.img reading u-boot.img reading u-boot.img U-Boot 2016.05-00010-g9551b3d-dirty (Aug 06 2018 - 12:42:11 +0530) CPU : DRA762-GP ES1.0 Model: TI DRA762 EVM Board: DRA74x EVM REV DRAM: 512 MiB NAND: DTS config for GPMC: &gpmc { /* * For the existing IOdelay configuration via U-Boot we don't * support NAND on dra72-evm. Keep it disabled. Enabling it * requires a different configuration by U-Boot. */ status = "okay"; ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */ nand@0,0 { /* To use NAND, DIP switch SW5 must be set like so: * SW5.1 (NAND_SELn) = ON (LOW) * SW5.9 (GPMC_WPN) = OFF (HIGH) */ compatible = "ti,am3352-gpmc"; reg = <0 0 4>; /* device IO registers */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ /* device IO registers */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <8>; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <80>; gpmc,cs-wr-off-ns = <80>; gpmc,adv-on-ns = <6>; gpmc,adv-rd-off-ns = <60>; gpmc,adv-wr-off-ns = <60>; gpmc,we-on-ns = <10>; gpmc,we-off-ns = <50>; gpmc,oe-on-ns = <4>; gpmc,oe-off-ns = <54>; gpmc,access-ns = <40>; gpmc,wr-access-ns = <80>; gpmc,rd-cycle-ns = <80>; gpmc,wr-cycle-ns = <80>; gpmc,wait-on-read = "true"; gpmc,wait-on-write = "true"; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wait-monitoring-ns = <0>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x000020000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00020000 0x00020000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00040000 0x00020000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x00060000 0x00020000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00080000 0x00040000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x000c0000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x001c0000 0x00020000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x001e0000 0x00020000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00200000 0x00800000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00a00000 0x0f600000>; }; }; }; Please let us know if we are missing anything. Regards, SwapniL B + +Responses: +Swapnil We have a similar post for NAND support on DRA7/TDA2 - e2e.ti.com/.../2481352 In essence, we validate boot from QSPI, eMMC/SD as part of our regular releases - we used to support NAND in the past, but most customers ended up choosing QSPI flash for boot media instead. we also had to contend with pin mux conflicts (in enabling NAND pins) on the TI EVM: hence we dropped support for NAND in our SDK releases Is there a strong reason for choosing NAND over eMMC + +Hi Srirama, We are working on board bring up activity for customer board. So we need support to enable the Nand flash. Regards, Swapnil + +Swapnil Does NAND support need to be enabled both in uboot(especially if it is your boot media) and also from the kernel(root filesystem from NAND - UBIFS based) We had enabled NAND boot support on DRA71x - and you can refer to patches in uboot, kenel as a reference + +Hi Sriram, Thanks for providing the patches. We have successfully enable the Nand flash from uboot. Regards, Swapnil + diff --git a/data2/text/range/5001-10000/717514.txt b/data2/text/range/5001-10000/717514.txt new file mode 100644 index 0000000000000000000000000000000000000000..60fc353dacd008452df9b893c41cc4f32b204100 --- /dev/null +++ b/data2/text/range/5001-10000/717514.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2: Configuring MPU MMU + +Query Text: +Part Number: TDA2 Hello, With starterware we are using both MPU A15 cores and want to configure the MPU_MMU to use cache but still retain the ability to use inter-core variables with DSP and IPU cores. We also want to have both A15 cores with MMU enabled running concurently. It seems like this would be possible by programming the MMU with specific tables/descriptors. To start we used the starterware example tables for MMU as a reference (found in mmu_a15_data_validation_app): /* Set level one descriptor attributes */ gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_BLOCK; gAttrs.attrIndx = MMU_A15_ATTR_INDEX_2; gAttrs.nonSecure = MMU_A15_NON_SECURE_ENABLE; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_ANY_PL; /*Read Write at any PL*/ /* Set level one descriptor */ virtualAddr = 0x0, phyAddr = 0x0; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); virtualAddr = 0x40000000, phyAddr = 0x40000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); virtualAddr = 0x80000000, phyAddr = 0x80000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); virtualAddr = 0xc0000000, phyAddr = 0x80000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); With the values above if you attempt to print while MMU is enabled nothing gets printed. Similarly any attempt to use mailbox functions while MMU is enabled will fail. We can get both those to work by changing the 0x40000000 entry to MMU_A15_ATTR_INDEX_1. 1. Is it correct in that chaging to MMU_A15_ATR_INDEX_1 it is just disabling cache for this address block? 2. Would this be the recommended way for retaining access to UART, Mailbox, DMA,...? When MMU is enabled we've observed inter-core variables that exist in external DDR mismatch between cores. An example is writing to a variable in DDR space on an A15 with MMU enabled and having an IPU core check the value. When MMU is enabled the IPU core does not read back what A15 just wrote but if MMU is disabled then IPU core reads back the correct value every time. 3. Is the mismatch due to A15 using cache and not actually writing it back to DDR? 4. Is there a way to make sure what A15 writes while MMU is enabled gets written to DDR? 5. What is the correct way to create a 16MiB section in DDR that would have its own table entry and use MMU_A15_ATR_INDEX_1? Couldn't find how to change sizes in the function MMUA15SetFirstLevelDesc(). Thank you, JMG + +Responses: +Hi, What are the values for ATTR_INDEX_1? Can you check the A15 MMU large descriptor documentation for details on page size. Regards, Rishabh + +Hello Rishabh, Not sure I understand your question. The value for ATTR_INDEX_1 is defined as 1 inside the file mmu_a15.h, though it's called MMU_A15_ATTR_INDEX_1. The struct that ATTR_INDEX_1 gets used in is called mmuA15DescriptorAttrs_t and the specific field is attrIndx. That struct field has the following description which I don't really understand. uint32_t attrIndx; /**< Bits[4:2] * Memory Attributes field, for Memory Attriute Indirection Register MAIR * Bit[4]:0 Use MAIR0, 1:Use MAIR1 * AttrIndx[2:0] gives the value of m in Attrm * Attrm[7:4] 0100 Normal memory, outer non-cacheable * 1011 Normal memory, outer write through cacheable * 1111 Normal memory, outer write back cacheable * Attrm[3:0] 0100 Normal memory, inner non-cacheable * 1011 Normal memory, inner write through cacheable * 1111 Normal memory, inner write back cacheable */ If ATTR_INDEX_1 is define as 1 then what does attrIndx=1 mean? I've reviewed the available information for MMU in the TDA2 TRM as well as reviewed MAIR register information provided on ARM's TRM website but I still don't understand how this value affects page size. Is there any chapter and section that you specifically recommend? Thanks, JMG + +Hi, You need to check chapter B3.6 Long-descriptor translation table format of ARM Architecture Reference Manual for A15. TI software supports two level tables. So this means you can either have 1 GB region or 2 MB memory region. For 16 MB you need to map 8 second level entries. Application needs to take care of handling cache operation correctly. One point to keep in mind is that on A15 cache invalidate behaves similar to cache write back invalidate. This can have serious implications as valid data might get overwritten by stale data from cache. Regarding my question on ATTR_INDEX_1, you can use it to set inner and outer cacheable property of A15 cache. You can choose to set any value for index 1 using MMUA15SetMAIR API (like 0xFF is set for index 2 in example). The same should be set while setting mmuA15DescriptorAttrs_t.attrIndx. Regards, Rishabh + +Hi, Is there any update on this? Regards, Rishabh + +Hello Rishabh, Sorry for the delay, I was able to get back on this project and unfortunately I'm still not sure how I need to configure the MMU to accomplish my goal. More specifically, I'm not sure how to program the MMU using the functions provided as part of Starterware. Using the function MMUA15SetMAIR() I've tried to configure the attr[7:0] fields so that only the memory range from 0x8000.0000-0xC000.0000 is cacheable but I don't think I'm configuring it correctly. When I use MMUA15SetMAIR(&gMmuTable, MMU_A15_ATTR_INDEX_2, 0xFF); I see a noticeable increase in speed but I also lose the ability to use some functions, i.e. mailboxsend, uartprint, etc... Changing the third field to anything other than 0xFF, like 0xBB instead, makes it so I don't lose the utility of those functions but I also don't see any speed difference from when MMU is disabled. Since 0xBB would configure it as cacheable but write-through that makes sense that it would be as slow as if no MMU. At least that's how I understand it; is that correct? I've tried programming more than one ATTR_INDEX_# each with their own memory range and specific settings for that range but nothings has worked so far. If write-back settings (0xFF) are the only way I can see an increase in speed then is there a way to force a sync between what's in cache and what's in main memory? It may be that my inability to use the functions when 0xFF is used is only because of the differences between main memory and cached memory. The example provided in starterware (mmu_a15_data_validation_app_main.c) also disable MMU when it uses UART so I'm wondering, is my goal even achievable? Can I have MMU and cache capability enabled and still maintain the ability to use mailbox and uartprint functions? To recap my goal, I want to configure my DDR space as cacheable but still have the ability to use mailbox functions and UART print statements. Additional to that, if possible I'd like to have the same MMU configuration on both A15 cores, A15_0 and A15_1 so that each can operate independently. Can can you confirm that desired is goal is achievable? Also, if it is achievable are there any other examples that help demonstrate the different ways to configure MMU within starterware? Thank you. + +Hi, In order to get performance improvement you should set the policy to write back. You should use the cache write-back/invalidate APIs to make sure the main memory is coherent with cache in case of any critical data access. Please note that the invalidate instruction is treated by A15 as a clean/invalidate instruction. Therefore, calls to Cache_inv()/Cache_invAll() will behave like Cache_wbInv()/Cache_wbInvAll() on A15. Also A15 has different L1D/L1P cache per core and an unified L2 cache. Ideally you should not be facing any issues with Mailbox or UART APIs with cache/MMU enabled. Can you elaborate on the issues you are facing? Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/5001-10000/717746.txt b/data2/text/range/5001-10000/717746.txt new file mode 100644 index 0000000000000000000000000000000000000000..5c949933c4f4fa46a5835b94ed8d517fed98902f --- /dev/null +++ b/data2/text/range/5001-10000/717746.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux/TDA2: [VISION SDK] Running a TIDL usecase in LINUX+BIOS mode. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I am trying to make very much the same thing like guys in main thread ... First, to avoid porting of tidl_preproc alg on A15, I want to run it on IPU until I have TIDL UC functional and then to port it on A15.. I am using PROCESSOR_SDK_VISON_03_03_00_00 and I am working on custom board that has TDA2xx chips on it (RT-RK Alpha board) UC that I am trying to make looks like this: UseCase: chains_tidlDsp NullSource (A15) -> Alg_tidlpreproc (IPU1_0) Alg_tidlpreproc (IPU1_0) -> Alg_tidl_1 (DSP1) Alg_tidl_1 (DSP1) -> Merge (IPU1_0) Merge (IPU1_0) -> Null (A15) So, here are steps I have made: - Generated UC that runs preproc alg on IPU - TIDL UC files are placed in PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/adas/src/usecases/tidl (and corresponding MAKEFILE.MK is placed here) - chains_main_linux_tidl.c placed in PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/adas/src/common/ (menu and call for Chains_tidl(&gChains_usecaseCfg) ) - Void Chains_tidl(Chains_Ctrl *chainsCfg) function declared in PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/adas/include/chains.h - includes for tidl alg plug added in /PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/common/chains_common.h #include #include - in PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/*MAKEFILE_adas.MK* added lines: ifeq ($(UC_tidl),yes) $(MAKE) -fMAKEFILE.MK -C$($(MAKEAPPNAME)_PATH)/src/hlos/adas/src/usecases/tidl MODNAME=$(MAKEAPPNAME) CORE=a15_0 $(TARGET) endif - in PROCESSOR_SDK_VISION_03_02_00_00/vision_sdk/apps/configs/tda2xx_evm_linux_all/*uc_cfg.mk* added line: UC_tidl=yes - File chains_common_tidl.c copied in: PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/hlos/common/ and following line added in it: #include - run: make -s makeconfig make linux make linux_install make -s -j -k depend make -s -j -k Error that stil appears after make -s -j -k is: osa: tda2xx-evm: Creating archive osa.a In file included from chains_common_tidl.c:69:0: /home/rtrk/SAVA/tidl_uc/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/apps/src/include/chains_common_tidl.h:89:22: fatal error: itidl_ti.h: No such file or directory compilation terminated. /home/rtrk/SAVA/tidl_uc/sava/PROCESSOR_SDK_VISION_03_03_00_00/vision_sdk/build/hlos/makerules/linux/common_footer_a15.mk:81: recipe for target 'depend' failed make6: *** [depend] Error 1 So, could you please help me about this issue? I saw for bios it is solved in env.mk for those files to be visible, but I am not sure how to do it properly when I'm using Linux+BIOS Thx in advance, regards, Nebojsa + +Responses: +Hi, Please follow the section 6.2 of the below doc vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf Regards, Anuj + +Hi, Thx for your answer. This was usefull to read again to see that I should generate UC which use Preproc on IPU2 instead of IPU1_0 ... but issu I have appears before this, but I didn't find what I needed... I am using existing Algorithm (TIDL)... only change i am making here is that - I'm trying to make TIDL UC to be functional when I'm using Linux+BIOS I think I did everything that are standard steps for this to work, but still having issue that I mentioned in previous post ... It is posible maybe to solve it if i put following: INCLUDE+= -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00 -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00/modules INCLUDE+= -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00/modules -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00/modules/ti_dl INCLUDE+= -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00/modules/ti_dl/inc -I$(vision_sdk_PATH)/../ti_components/algorithms/REL.TIDL.01.01.00.00/common INCLUDE+= -I$(vision_sdk_PATH)/../ti_components/codecs/xdais_7_24_00_04/packages -I$(vision_sdk_PATH)/../ti_components/codecs/xdais_7_24_00_04/packages/ti in MAKEFILE.MK in use-case, but then i have more similar errors - so I assume it is not the right way to do this... If you have idea what I should do it would be very helpfull Thx in advance, Nebojsa + +Hi, If you have followed the doc then from where you got chains_main_linux_tidl.c file as this is not mentioned in doc. You have to call your usecase funtion from \vision_sdk\apps\src\hlos\adas\src\common\chains_main.c file. Can you tell what all steps you have followed as per steps and what all you have done extra. Regards, Anuj + +Hi, Is the issue resolved. If yes, then please close the thread as there is no activity since along time. Regards, Anuj + +Hello, Sorry, I was not able to work on this for some time, so I was not active here ... Problem I mentioned above has been solved when files that was not visible to the UC are copied into UC folder. Those are following files: - ialg.h, ires.h, ires_common.h, itidl_ti.h, ivision.h, xdais_types.h, xdais.h Not good solution, but it solved my issue... TIDL UC still does not work on hlos (dma functions and some others has to be replaced with corresponding functions for the hlos, but it is no the same issue any more) By the way, chains_main_linux_tidl.c is simple file with UC menu (this is menu where you can choose tidl, semSeg or tidlOD usecase to run - not so much important here, so maybe I should not menition it above) Thx and Regards, Nebojsa + diff --git a/data2/text/range/5001-10000/718036.txt b/data2/text/range/5001-10000/718036.txt new file mode 100644 index 0000000000000000000000000000000000000000..d9f5c997925f5345a7861193b7ecbb29325a2457 --- /dev/null +++ b/data2/text/range/5001-10000/718036.txt @@ -0,0 +1,56 @@ +Ticket Name: TDA2: Lens displacement in Linux but normal in RTOS + +Query Text: +Part Number: TDA2 Hi， I built for tda2x-rvp-linux-all and tda2x-rvp-bios-all by using TI's original Vision SDK(PROCESSOR_SDK_VISION_03_04_00_00). They can work. Howerver, the cameras seem to point to different place. As shown in photos, the first one comes from RTOS system, the second one comes from Linux system. I did change angle and position of any camera, but the display indicates that the angle of camera has decreased. Not just this usecase, but all other usecases ( in tda2x-rvp-linux-all ver. 3.04) are the same. I wonder how I can solve this issue? Regards, Daniel + +Responses: +Hi User5227399, Can you please check the configuration parameters provided to VPE and Alg_DmaSwMs links? Regards, Sujith + +Hi Sujith, Which file should I check? Regards, Daniel + +Hi Daniel, In case of RTOS file \apps\src\rtos\usecases\srv_calibration\chains_srvCalibration_Display.c and function chains_srvCalibration_vip_SetAppPrms /setVpeLinkParams () is used to configure VPE params In case of HLOS file \apps\src\hlos\adas\src\usecases\srv_calibration\chains_srvCalibration_Display.c and function chains_srvCalibration_vip_SetAppPrms /setVpeLinkParams () is used to configure VPE params please check the chPrms->outParams[outId].width, height, chPrms->scCropCfg.cropWidth and Height. Regards, Sujith + +Hi Daniel, Hope the issue was resolved or you have the steps to resolve. Regards, Sujith + +Hi Sujith, Sorry for the late reply. I couldn't verify that your answer will solve my issue because I have to go on a business trip a few days ago. Now I will follow your suggestions and give you feedback as soon as possible. Thank you. Regards, Daniel + +Thanks for the update Daniel. Regards, Sujith + +Hi Daniel, Is this issue resolved? Regards, Sujith + +Hi Sujith, Sorry to keep you waiting. I checked params you mentioned. Params chPrms->outParams[outId].width and height were assigned by OutWith and OutHeight. Then OutWidth and OutHeight were assigned by swMsWinWidth and swMsWinHeight. There is no difference between HLOS and RTOS for everything above. Finally swMsWinWidth and swMsWinHeight were assigned by pObj->displayHeight/2 and pObj->displayWidth/2. It's hard to find the exact value of pObj->displayHeight and pObj->displayWidth, so I'm not sure if that's the problem. Params chPrms->scCropCfg.cropWidth and Height were assigned by inCropWidth and inCropHeight. Then inCropWidth and inCropHeight were assigned by pObj->calibrationPrm.captureOutWidth and pObj->calibrationPrm.captureOutHeight. Params pObj->calibrationPrm.captureOutWidth and pObj->calibrationPrm.captureOutHeight were assigned by SRV_CAPT_SENSOR_OV10640_WIDTH(HEIGHT) and pUcObj->IssCapturePrm.outParams[0U].width(height). There is no difference between HLOS and RTOS for SRV_CAPT_SENSOR_OV10640_WIDTH(HEIGHT). It's also hard to find the exact value of pUcObj->IssCapturePrm.outParams[0U].width(height). Can you give me more directions? Thank you. Regards, Daniel + +Hi Daniel, Can you add prints and figure out the size? Regards, Sujith + +Hi Sujith, I will try it. It may take some time to modify codes and re-compile. I will give you feedback as soon as possible. Regards, Daniel + +Okay Regards, Sujith + +Hi Sujith, I added Vps_printf("OutWidth, OutHeight", OutWidth, OutHeight) and Vps_printf("inCropWidth, inCropHeight", inCropWidth, inCropHeight) in function setVpeLinkParams. I only got "OutWidth, OutHeight" and " inCropWidth, inCropHeight" four times after executed srv calibration, no any other values. Then I changed to Vps_printf("swMsWinWidth, swMsWinHeight", swMsWinWidth, swMsWinHeight) and Vps_printf("pObj->calibrationPrm.captureOutWidth, pObj->calibrationPrm.captureOutHeight", pObj->calibrationPrm.captureOutWidth, pObj->calibrationPrm.captureOutHeight). I still only got "swMsWinWidth, swMsWinHeight" and "pObj->calibrationPrm.captureOutWidth, pObj->calibrationPrm.captureOutHeight" after executed srv calibration, no any other values. Can you give me more directions? Thank you. Regards, Daniel + +Hi Daniel, I am not sure i understand. Did the values match in both the usecases? Regards, Sujith + +Hi Sujith, I only added code in RTOS usecase for test. The values of OutWidth, OutHeight, etc. are not shown in terminal. Only these characters ( "OutWidth, OutHeight" etc. )are displayed. I don't know the reason. Regards, Daniel + +Hi Daniel, These variables might be optimized out, can you print the values from the VPE structure directly? Regards, Sujith + +Hi Sujith, You mean not in function setVpeLinkParams but in function chains_srvCalibration_vip_SetAppPrms? Regards, Daniel + +You could do that or in startCalibUseCase () Regards, Sujith + +Hi Sujith, I added codes in function chains_srvCalibration_vip_SetAppPrms() and startCalibUseCase (), I still couldn't get any values of OutWidth, OutHeight, etc. so I guess that won't work. Then I tried to adjust cropping image parameters. I changed chPrms->scCropCfg.cropStartY in function setVpeLinkParams() and setVpeSv_CscPrm(). But no any obvious change. What does chPrms->scCropCfg.cropStartY do? I found this problem was not present in the 3.02 hlos version of the SDK. So I want to know what's the difference between 3.02 and 3.04 in hlos? Thank you. Regards, Daniel + +Hi Daniel, I will have to check on this and get back to you. Regards, Sujith + +Hi Sujith, Thank you, I will wait for your response. Regards, Daniel + +Hi Sujith, Do you have any update about this problem? Regards, Daniel + +Daniel, The difference is due to different cropping parameters. The camera outputs a 1280x1080 image. The BIOS sw is cropping the central 1280x720 portion of the 1280x1080 input image, the Linux version appears to be taking the top 1280x720 portion. The code that is doing this is if (pObj->chainsCfg->captureSrc == CHAINS_CAPTURE_SRC_OV490) { ChainsCommon_MultiCam_SetCroppingPrms(&pUcObj->CapturePrm, SRV_OV490_SENSOR_WIDTH, SRV_OV490_SENSOR_HEIGHT, SRV_LVDS_CAPTURE_WIDTH, SRV_LVDS_CAPTURE_HEIGHT ); } located on line 307 of vision_sdk/apps/src/rtos/usecases/lvds_vip_sv_standalone/chains_lvdsVipSurroundViewStandalone.c Cheers, Ben + +Hi Ben, Thank you, please give me some time to check it. Regards, Daniel + +Hi Daniel, Could you please let us know the status ? Regards Surya + +Hi Daniel, For the time being, I am closing this thread If the issue still exist after trying the changes suggested by Ben, Please re-open a new thread Regards Surya + diff --git a/data2/text/range/5001-10000/718825.txt b/data2/text/range/5001-10000/718825.txt new file mode 100644 index 0000000000000000000000000000000000000000..e949b3522e5baae38834b586c16d0c9cd339628f --- /dev/null +++ b/data2/text/range/5001-10000/718825.txt @@ -0,0 +1,62 @@ +Ticket Name: Linux/DRA76P: Usage of Mailbox Framework in own driver... + +Query Text: +Part Number: DRA76P Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hello! Today I've got a quite simple question, because I got a knowledge gap with the flattened device tree: I would like to write a simple Linux driver, which handles the HW-Mailbox of the TDA2+ device. (We are not able to use the TI-SDK and its "IPC" over RPMSG. So: NO sdk is used!) We have to adapt in-house-software to this new SoC and I stuck on the following, may be very simple problem: How to setup device tree to fulfill the needs of the omap-mbox and mailbox framework inside the linux? I want to write a driver which handles Mailboxes - the mbox Framework on one side, a userland-API on the other. Driver is setup as following: probe....{ +... +tdev->tx_channel = mbox_sms_request_channel(pdev, "tx"); +tdev->rx_channel = mbox_sms_request_channel(pdev, "rx"); +if (!tdev->tx_channel && !tdev->rx_channel) +return -EPROBE_DEFER; +tdev->dev = &pdev->dev; +platform_set_drvdata(pdev, tdev); + +... + +} + +static const struct of_device_id mbox_sms_match[] = { + { .compatible = "sms-icc-mbox" }, + {}, +}; + +static struct platform_driver mbox_sms_driver = { + .driver = { + .name = "mailbox-sms-icc", + .of_match_table = mbox_sms_match, + }, + .probe = mbox_sms_probe, + .remove = mbox_sms_remove, +}; + And in the DTS File (I do not change anything in the "dtsi") I would like to use the "free" mailbox No. 10 of the TDAX and try to set it up like this: Contend of the "mygadget.dts" (relating lines): \{ +... + mailboxsms { + compatible = "sms-icc-mbox"; + #mbox-cells = <1>; + mboxes = <&mailbox10 &mbox_sms>; + mbox-names = "rx", "tx"; + status = "okay"; + }; +... +} + +... +&mailbox10 { + #mbox-cells = <1>; + status = "okay"; + mbox_sms: mbox_sms { + ti,mbox-tx = <10 0 0>; + ti,mbox-rx = <10 1 0>; + status = "okay"; + }; +}; + This do not work... the driver runs into the probing function (fine!), but is not able to request the channels. I got the following error message: mbox_request_channel: can't parse "mboxes" property after: could not get #mbox-cells for /ocp/mailbox@48860000/mbox_sms Please tell me how I have to set and bind: mboxes #mbox-cells mbox-names (something forgotten?) The Documentation in the Kernel wasn't helpful for me and I didn't found any information about how to handle the mbox framework in the net. Thank you for your help... Marco. + +Responses: +Hi Marco, There is a slight difference between Mailbox Controller and Consumer. The OMAP Mailbox driver is the controller (drivers/mailbox/omap-mailbox.c) and you (mailbox_sms_icc) are the mailbox client/consumer driver in this case. The API to use is provided by the mailbox core. See include/linux/mailbox_client.h for the API provided by the Mailbox core. The OMAP Mailbox usage details are explained in the OMAP Mailbox binding. Please look into your kernel's Documentation/devicetree/bindings/mailbox/omap-mailbox.txt file. The following is a quick reference to the binding on our 4.4 kernel feature branch. git.ti.com/.../ Here are the issues with your code snippet, 1. You have the mbox_sms added in the right place, but you are using the same first-cell value of 10 in ti,mbox-rx and ti,mbox-tx properties. Unless this is a MPU loopback device, this is wrong. We expect the fifo ids to be different if you are talking between two different processors. 2. The #mbox-cells property needs to be added only in controller nodes. The mailboxsms is a client/user, so you shouldn't have the #mbox-cells. 3. You have two mbox-names while you only have one mbox device used in the mboxes property. The mbox_sms is a duplex communication device, so you only need to use one mbox-names value in your mailboxsms node. 4. Use the Mailbox framework provided API, mbox_request_channel() or mbox_request_channel_byname() instead of your mbox_sms_request_channel() API in your probe. You only need to use a single call. You can use the returned handle to send messages using mbox_send_message() API. Any messages you receive will be provided to you through the callback you supplied in mbox_request_channel() Please look at the drivers/remoteproc/omap_remoteproc.c to see example usage of the OMAP Mailboxes. This is the kernel-side interface. Providing an interface to userspace has to be done within your driver. For your reference, there is an example test driver, drivers/mailbox/mailbox-test.c, in the kernel that uses simplex communication devices and debugfs interface to userspace for reading and writing to mailboxes, but this needs some changes to use with OMAP Mailboxes since all OMAP sub-mailboxes are duplex devices. regards Suman + +Thank you for quick response. Some question are open: (1) Would you please explain, what is the meaning/functionality of the three values "ti,mbox-XX"? As far as I understood, the first value is the "mailbox" number, and our usecase is the following: We only use one mailbox for RX and TX. (Requirement is given...) And RX/TX will use two different channels of the mailbox. Communication will be between ARM and M4 Core. (2) I will fix this and have a try again. (3) I took the file "mailbox-test.c" out of the driver/mailbox directory as a skeleton of my own driver; mbox_request_channel_byname is called in mbox_sms_request_channel.... again some Questions: (a) Easier to use mbox_request_channel_byname without the strings? (b) In the example " drivers/mailbox/mailbox-test.c" There is a channel for rx, another for tx - Thre are two calls of mbox_request_channel_byname, you told me only to use one... What I thought: I need two channels - One for TX and another for RX... how this schould work calling a request_channel only once? Thank you for your efforts... Marco. + +Hi Marco, Responses to your questions: (1) I think there is some confusion on the terms. We refer to the term "mailbox" as the name for the IP instance. There are 12 instances on the DRA7x family. Each IP instance has a number (16 on most) of unidirectional hardware fifos. Each Mailbox IP has 4 interrupt outputs, with each interrupt output used by a processor core (called a User, partitioning defined through software, so totally flexible). For example, if you are communicating between ARM and DSP1 and using Mailbox 10 IP instance, you can assign ARM as User 0 and DSP1 and User 1. You could have communications to a DSP2 using User 2, and using different FIFO pairs between all three processors. Please look through the Mailbox chapter in the TRM for additional details. The three cells are explained well in the binding - first cell is the FIFO number, second cell is index of the interrupt to be used by MPU (from the interrupts property, so this will typically be same between ti,mbox-rx and ti,mbox-tx) and the third cell is the User id (I expect second cell and third cells to typically match value as the interrupts are listed in the same order as the 4 User interrupt outputs). Note that these assignments only define the Rx and Tx from MPU perspective. The exceptions to the typical usage is if you assign multiple User interrupts towards MPU and separate them out between Rx and Tx. (3).(a) I am not quite sure I understand your question. mbox_request_channel_byname() is designed to be able to request a mailbox channel when your client DTS node has multiple mboxes defined in the "mboxes" property. The name you pass in should match one of the names used in the "mbox-names" property. The other API is by index into your "mboxes" property. If you will only have one mbox channel in your client, you can simply drop the "mbox-names" property and just use mbox_request_channel with index 0. (3).(b) The mbox_channel is the name used by mailbox core to represent a communication channel registered by mailbox controllers/providers with the mailbox core. Each such channel can be uni-directional (requiring you to request two channels - one for Rx or Tx), or simply a duplex channel (requiring you to request only one channel which includes both Rx and Tx). The OMAP Mailbox channels follow the latter convention, and the driver actually doesn't support defining simplex channels. Your mbox_sms node under mailbox10 defines a duplex channel. The "ti,mbox-rx" and the "ti,mbox-tx" dictate your Rx and Tx FIFOs respectively from Linux-side. regards Suman + +Now I see much clearer! I will try to get on and open another Thread if I have any further questions. Thank you for explaining these "basics" and help me delve into the topic. Marco. + diff --git a/data2/text/range/5001-10000/719853.txt b/data2/text/range/5001-10000/719853.txt new file mode 100644 index 0000000000000000000000000000000000000000..31e46ca4fe53853c76889ca411d0b10801a6531c --- /dev/null +++ b/data2/text/range/5001-10000/719853.txt @@ -0,0 +1,42 @@ +Ticket Name: RTOS/TDA2: Running DDR test on 3GB + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello all, I am trying to configure Vision SDK 3.03 DDR test example to run with 3GB of RAM on TDA2p. 2GB are connected to EMIF1 and 1GB is connected to EMIF2. Changes that I have made are: - (Vision_PATH)/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg (line 165. Mmu.setSecondLevelDescMeta(i, i, attrs2)) - (Vision_PATH)/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ammu1_bios.cfg (line 207. entry.translatedAddress = 0xA0000000) - (Vision_PATH)/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/ipu2/Ammu2_bios.cfg (line 207. entry.translatedAddress = 0xA0000000) - (Vision_PATH)/vision_sdk/links_fw/src/rtos/bios_app_common/tda2px/eve_common/tlb_config_eve_common.c (line 100. #define SIZE_3G (0xC0000000U), line 134. instead of SIZE_1GB, set SIZE_3GB) - (Vision_PATH)/vision_sdk/apps/configs/build_makeconfig.mk (line 106. $(ECHO) \# DDR_MEM=$(DDR_MEM) [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M DDR_MEM_3G]) - (Vision_PATH)/vision_sdk/apps/configs/defaults.mk (line 16. DDR_MEM=DDR_MEM_3G) - (Vision_PATH)/vision_sdk/apps/configs/tda2px_evm_bios_all/cfg.mk (DDR_MEM=DDR_MEM_3G) - (Vision_PATH)/vision_sdk/build/rtos/makerules/component.mk (after ifeq($(DDR_MEM),DDR_MEM_512MB vision_sdk_CFLAGS += -DTDA2XX_512MB_DDR endif added ifeq ($(DDR_MEM),DDR_MEM_3G) vision_sdk_CFLAGS += -DTDA2XX_3GB_DDR endif -(Vision_PATH)/vision_sdk/links_fw/src/rtos/utils_common/include/utils_mem_cfg.h (after #ifdef TDA2XX_512MB_DDR block added #ifdef TDA2XX_3GB_DDR #ifdef ECC_FFI_INCLUDE #define UTILS_MEM_HEAP_DDR_CACHED_SIZE (309*1024*1024) #else #ifdef OPENCL_INCLUDE #define UTILS_MEM_HEAP_DDR_CACHED_SIZE (249*1024*1024) #else #define UTILS_MEM_HEAP_DDR_CACHED_SIZE (700*1024*1024) #endif #endif #endif After all this, I made mem_segment_definition_3gb_bios.xs file based on mem_segment_definition_bios.xs file and placed it in (Vision_PATH)/vision_sdk/apps/build/tda2px/. Changes that I made were DDR3_SIZE = (1024+2048)*MB and DDR3_BASE_SIZE_0 = 1008*MB. Later, I included mem_segment_definition_3gb_bios.xs in files config_a15.bld, config_arp32.bld, config_c66.bld, config_m4.bld. Add if (platformMem == "DDR_MEM_3G") { var MemSegDefine = xdc.loadCapsule("mem_segment_definition_1_5gb_bios.xs"); } after if (platformMem == "DDR_MEM_512M") { var MemSegDefine = xdc.loadCapsule("mem_segment_definition_bios.xs"); } After that, I set the SBL like this: -(Vision_PATH)/vision_sdk/build/rtos/makerules (line 127. PDK_SBL_BUILD_OPTIONS = $(PDK_BUILD_OPTIONS) EMIFMODE=DUAL_EMIF_3GB) -(Vision_PATH)/ti_components/drivers/pdk_01_09_00_17/packages/ti/boot/sbl_auto/sbl_lib/src/tda2xx/sbl_lib_config_tda2xx.h (line 63. TDA2XX_EMIF_MODE is set to (SBLLIB_DUAL_EMIF_3GB)) -(Vision_PATH)/ti_components/drivers/pdk_01_09_00_17/packages/ti/boot/sbl_auto/sbl_utils/src/tda2xx/sbl_utils_tda2px_ddr_config.c after #if (TDA2XX_EMIF_MODE == SBLLIB_SINGLE_EMIF_512MB) block I put #if (TDA2XX_EMIF_MODE == SBLLIB_DUAL_EMIF_3GB)     {         SBLLibPrintf(SBLLIB_TRACE_LEVEL_DEBUG,                      "       Two EMIFs in non interleaved mode (3GB total)\n");         /* MA_LISA_MAP_i */         HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_0, 0x80700100U);         HW_WR_REG32(SOC_MA_MPU_CONF_REGS_BASE + LISA_MAP_1, 0xC0600200U);         /* DMM_LISA_MAP_i */         HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_0, 0x80700100U);         HW_WR_REG32(SOC_DMM_CONF_REGS_BASE + LISA_MAP_1, 0xC0600100U);     } #endif. I changed a little the DDR test, in main.c defined DDR_SIZE_EMIF1 to 0x7FFFFFFF, and DDR_SIZE_EMIF2 to 0x3FFFFFFF, also I defined EMIF1_DDR_BASE_ADDRESS to 0x80000000 and EMIF2_DDR_BASE_ADDRESS to 0xC0000000. The problem is when I run the test, and try to run full memory read/write test, the message I get on terminal is Size of DDR is 0x0. Do you maybe know why that happens? Best regards, Bosko + +Responses: +Hi Bosko, I see one mistake in LISA mapping. Can you set LISA_MAP_1 to 0xC0600200U at both places. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hello Rishabh, Sorry for the late response. I changed LISA_MAP_1 to 0xC0600200U but I still have the same output. First DDR test case is just skipped. The only thing I get on UART is Size of DDR is 0x0. Best regards, Bosko + +Hi Bosko, In your original question you have mentioned this "EMIF1_DDR_BASE_ADDRESS to 0x80000000 and EMIF2_DDR_BASE_ADDRESS to 0xC0000000". Can you set the base addresses correctly as currently you have overlapping addresses. Regards, Rishabh + +Hello Rishabh, I changed the starting address but that did not help. I also tried with decreasing memory size from 2GB to 1GB on EMIF1, but no progress. Best regards, Bosko + +Hi Bosko, Can you remove all your changes and check if the app is working for you. Regards, Rishabh + +Hello Rishabh Before any changes were made, I run the test for 512MB and worked fine. I thought maybe to try to configure the test to work with 2GB on EMIF1 first, and later add EMIF2. Best regards, Bosko + +Hi Bosko, Are you running DDR test using SBL or Gels? Can you first try only 1 GB on EMIF1. Regards, Rishabh + +Hi Rishabh, I am using SBL. No problem, I will try to run 1 GB first and post results here. Regards, Bosko + +Hi Rishabh, I managed to get test to work separately for 2 GB on EMIF1 and 1 GB on EMIF2, but I still have no idea why it does not work when I merge together EMIF1 and EMIF2. Best regards, Bosko + +Hi Bosko, This is a very useful result. From 0x8000_0000 onwards you have only 2 GB till 0xFFFF_FFFF. To test 3 GB at a time you will need to configure MMU. Is there a particular requirement that you want to test all DDR at once? Regards, Rishabh + +Hi Rishabh, Problem is that our system has 3GB of RAM. 2GB on EMIF1 and 1GB on EMIF2. They can work separately, at the time we can see that 2GB on EMIF1 and 1GB on EMIF2, but when we configure both EMIFs to work together we only see 2GB under Linux. Do you maybe have any idea why that is? Best regards, Bosko + +Hi Bosko, Can you check this link: opbuwiki.dal.design.ti.com/.../DRA7x_4GB_DDR_SUPPORT Regards, Rishabh + +Hi Rishabh, Can you send me the link again? I can't open this one. Regards, Bosko + +Hi Bosko, That document needs NDA. Can you please ask your TI representative to provide this document. Regards, Rishabh + +Hello Rishabh, Is there any document on how to change MMU in order to make DDR test to test full 3GB or more? Best regards, Bosko + +Hi Bosko, We will make an official release by end of first week of October. Can you wait till that time and pick the release itself. Regards, Rishabh + +Hi Bosko, We have made release with support for more than 2 GB DDR. You can pick the release from: software-dl.ti.com/.../index_FDS.html Regards, Rishabh + diff --git a/data2/text/range/5001-10000/721522.txt b/data2/text/range/5001-10000/721522.txt new file mode 100644 index 0000000000000000000000000000000000000000..9cf18c2b98ef9e364a8a3943f8c89d82fbad1f53 --- /dev/null +++ b/data2/text/range/5001-10000/721522.txt @@ -0,0 +1,46 @@ +Ticket Name: TDA2: Camera raw data input to TDA2X is supported? + +Query Text: +Part Number: TDA2 Dear TI: Does TI TDA2x support Camera raw data input? (We have one NIR camera module which only has the senor output but without ISP, and we need to connect it to TDA2x. Can this be supported?) Thanks and best regards He Wei + +Responses: +Hi He Wei, Yes, we could capture using the VIP port of TDA2x. Can you provided more details on the camera interface (details such as number of data-lines, pixel clock speed, supported sync signals (hSync, vSync, DE (Data enable)) etc...) Also, what is the data format of video being streamed by sensor and which data format would be required? Regards, Sujith + +Hi Sujith, I work with He Wei. Our camera is a standalone camera, means it will send video output thru DVP parallel port once power up. So no I2C setup required for the camera. Can you guide us or show some example on how to setup TDA2x to receive the RAW data and display on HDMI? For your information, data transferred is - 1280x800, - 12bit raw data - hsync, vsync, pclk (75Mhz) - 30 fps Your support is much appreciated Thank you Chee Peng + +Hi chee Peng, Yes, it is possible to capture this stream over VIP. We have a similar example to capture 12bit raw data on VIP using AR0132 sensor in PDK drivers. You could refer to this example to get the idea about how to configure VIP. Regards, Brijesh + +Hi, Can you please refer the VIP Capture demo application for the VIP configurations. It's available at \ti_components\drivers\pdk\packages\ti\drv\vps\examples\vip\captureVip\src\CaptureVip_main.h Refer the configurations used for "Aptina AR0132->VIP1_S1_PORTA SCH 12-bit Discrete Sync (HSYNC/VSYNC)" Please note that depending on your board/schematics, you might have to update the instance of VIP that can be used. Regards, Sujith + +Hi Sujith, This looks useful. Let me try, i shall get back to you. + +Hi Sujith, I updated to 16bit raw as following, But I still faced following error. Any idea? What do you think? [IPU1-0] 23.916031 s: CAPTURE: Create in progress !!! [IPU1-0] 23.916244 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! [IPU1-0] 24.075764 s: CAPTURE: Create Done !!! [IPU1-0] 24.077258 s: ALGORITHM: Create in progress (algId = 12) !!! [IPU1-0] 24.077441 s: Assertion @ Line: 308 in vpeSwMs/vpeSwMsLink_algPlugin.c: 0 : failed !!! [IPU1-0] 24.077899 s: Assertion @ Line: 308 in vpeSwMs/vpeSwMsLink_algPlugin.c: 0 : failed !!! + +Hi Chee Peng, From the log, it seems like capture creation is completed successfully. It's the SWMS link which is creating a problem. The SWMS will not support RAW 12 data format. You would require s/w module to convert RAW12 to YUV data format. As an experiment, In function AlgorithmLink_dmaSwMsCreate () in file \apps\src\rtos\alg_plugins\dmaSwMs\dmaSwMsLink_algPlugin.c change line pDmaSwMsObj->dataFormat = System_Link_Ch_Info_Get_Flag_Data_Format(pDmaSwMsObj->prevLinkQueInfo.chInfo[0].flags); to pDmaSwMsObj->dataFormat = SYSTEM_DF_YUV422I_UYVY; Regards, Sujith + +Hi Sujith, Thank you for suggestion. The error at vpeSwMs/vpeSwMsLink_algPlugin.c Adjust \apps\src\rtos\alg_plugins\dmaSwMs\dmaSwMsLink_algPlugin.c will not affect. Anyway, I adjusted at vpeSwMs/vpeSwMsLink_algPlugin.c It gave more error as following I tried traced it, the error deep at Ti component..... What do you think? + +Hi Chee Peng, It seems like the data type is not overridden. As the very first error that you are seeing is being reported by VPE for wrong data-type. Can you please debug on this front? Regards, Sujith + +Hi Sujith, Thank you for suggest. It is deep in TI component driver. I have unclear how to debug. In fact, I have TDA2x and AR0132 headboard. May I suggest you try stream AR0132 on TDA2x? What do you think? regards cheepeng + +Hi Cheepeng, I don't have AR0132 board with me to try it out. Another method would be to hardcode the data-type in Capture Link itself. I will send you the details in few minutes. Regards, Sujith + +Please try In file \vision_sdk\links_fw\src\rtos\links_ipu\iss_capture\issCaptureLink_drv.c and function IssCaptureLink_drvCreate () Update pQueChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pQueChInfo->flags, pObj->createArgs.outParams[chIdx].dataFormat); pQueChInfo->flags = System_Link_Ch_Info_Set_Flag_Data_Format(pQueChInfo->flags, SYSTEM_DF_YUV422I_UYVY); Regards, Sujith + +Dear Sujith, Still same result... [IPU1-0] 23.916031 s: CAPTURE: Create in progress !!! [IPU1-0] 23.916244 s: CAPTURE: VIP1 Slice0 PortA capture mode is [16-bit] !!! [IPU1-0] 24.075764 s: CAPTURE: Create Done !!! [IPU1-0] 24.077258 s: ALGORITHM: Create in progress (algId = 12) !!! [IPU1-0] 24.077441 s: Assertion @ Line: 308 in vpeSwMs/vpeSwMsLink_algPlugin.c: 0 : failed !!! [IPU1-0] 24.077899 s: Assertion @ Line: 308 in vpeSwMs/vpeSwMsLink_algPlugin.c: 0 : failed !!! + +Dear Sujith, Seems we stuck here, based on the TDA2x, there is "NO ISP on chip" so Can we say it is not possible for TDA2X to support camera module without ISP? Or otherwise we need to implement a software ISP on chip for it to work? Thanks and best regards He Wei + +Hi He Wei, Yes, you are right. TDA2Px/TDA3x comes in with built in ISP. Please check if these devices can meet your needs. Regards, Sujith + +Dear Sujith, Thanks for the confirmation, another question is if TI has the some kind daughter board like FPD-LINK III Deserializer board with integrated the ISP module? I am asking this question because we have few TDA2X boards on hand and need to find a way for it to work with our NIR raw camera.. Thanks and best regards He Wei + +Hi He Wei, I am not aware of any add-on board with this capability. What is expected from the ISP? Regards, Sujith + +Dear Sujith, The concern is that if the NIR camera with the raw data output can't support on TDA2x directly (seems we still didn't get it successfully after trying so far), we may need to have extra ISP to perform the raw data to YUV conversion first then we can use on TDA2x?? Thanks and best regards He Wei + +Hi He Wei, Yes, that correct on the ISP. We should be able to get the capture working though. Regards, Sujith + +Hi He Wei, Chee Peng, Is your query answered? Regards, Sujith + diff --git a/data2/text/range/5001-10000/721564.txt b/data2/text/range/5001-10000/721564.txt new file mode 100644 index 0000000000000000000000000000000000000000..4bf6a2377bd8d242abbd6c1f9250add2fd41ce6b --- /dev/null +++ b/data2/text/range/5001-10000/721564.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: Vision SDK 3.04 framework and examples build fail + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi, I am trying to build frameworks and apps using vision sdk 3.04 version but its failing with below error: # Linking into /u/VISION_SDK_BUILD_03_04/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4... # # # /u/VISION_SDK_BUILD_03_04/vision_sdk/binaries/apps/tda2xx_evm_linux_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # ‘/u/VISION_SDK_BUILD_03_04/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/ipu2/release/vision_sdk_configuro/osa_mem_map.h’ -> ‘/u/VISION_SDK_BUILD_03_04/vision_sdk/links_fw/src/hlos/osa/include/osa_mem_map.h’ dispDistSrcLink_tsk.c:81:45: fatal error: vdrm_controller/v_controller_if.h: No such file or directory compilation terminated. make[6]: *** [depend] Error 1 make[5]: *** [links_a15_dispDistSrc] Error 2 I have followed instruction provided with VisionSDK_linux_UserGuide.pdf and to branchout referred https://e2e.ti.com/support/arm/automotive_processors/f/1021/t/708731 Please help me regarding same. there had been some dts related errors too with Linux build which I solved by copying those files from earlier version but this perticular header file is still missing and I am not able to find it in what ever source is downloaded with me. BR, Alap~ + +Responses: +Hi Alap, Could you please confirm you downloaded the file system released with VSDK 3.4 release & using same to build tda2xx config ? Regards Surya + +Hi Surya, I have downloaded tisdk-rootfs-image-dra7xx-evm_vsdk_3_4.tar.xz from software-dl.ti.com/.../index_FDS.html Is it the same you are asking about? Also while building linux I faced issues with missing dts files which I copied from 3.02. Those are dra7-evm-infoadas.dts/dra7-evm-infoadas.dtb and dra7-evm-infoadas-lcd-lg.dtsi. by copying those files my linux build was through. But after that I am facing this issue in framework and examples build (make -s -j) BR, Alap + +Hi Alap, There is no need to copy dts file from old release (It is part of kernel, when you clone you will get it) Could you please share the commit IDs for kernel,u-boot & sgx ? Regards Surya + +Hi Surya, kernel oneline: 742f844 media: i2c: ov490: Force sensor phy reset by toggling MIPI-TX u-boot oneline: ac1d50f spl: dra7xx: early boot: Match timer configuration with dra7xx-infoadas DT sgx oneline: fd47e44 Revert "km: build: remove dependency on user-mode builds" BR, Alap + +Hi Alap, Looks like very old kernel & u-boot Follow the below steps 1. Remove omap folder under ti_components\os_tools\linux\kernel 2. Follow user guide to clone & checkout 3.4 rel tag 3. Remove u-boot folder under ti_components\os_tools\linux\u-boot 4. Follow user guide to clone & checkout 3.4 rel tag 5. Then try to do a clean build Regards Surya + +Hi Surya, Can you share me command to checkout the latest rel tag since, what ever commit list I have shared is after referring user guide to clone and post I have checked out using "git rebase origin/infoadas-on-psdkla3.04". BR, Alap~ + +Hi Alap, You can refer section 2.4.2.1.1 & 2.4.2.1.2 of VisionSDK_Linux_Userguide of 3.4 release However attaching the commands below Clone kernel $> cd $INSTALL_DIR/ti_components/os_tools/linux/kernel $> git clone git://git.ti.com/glsdk/infoadas-kernel.git omap $> cd omap/ $> git checkout -b kernel_dev tags/REL_VISION_SDK_03_04_00_00 Clone u-boot $> cd $INSTALL_DIR/ti_components/os_tools/linux/u-boot $> git clone git://git.ti.com/glsdk/infoadas-u-boot.git u-boot $> cd u-boot/ $> git checkout -b uboot_dev tags/REL_VISION_SDK_03_04_00_00 Regards Surya + +Hi Surya, There is no tag by name REL_VISION_SDK_03_04_00_00. I am getting error fatal: Cannot update paths and switch to branch 'uboot_dev' at the same time. Did you intend to checkout 'tags/REL_VISION_SDK_03_04_00_00' which can not be resolved as commit? Instead in omap directory I have below REL tags REL_VISION_SDK_03_01_00_00 REL_VISION_SDK_03_01_00_00_RC3 REL_VISION_SDK_03_02_00_00 REL_VISION_SDK_03_03_00_00 and in u-boot I have REL_VISION_SDK_03_01_00_00 REL_VISION_SDK_03_01_00_00_RC3 REL_VISION_SDK_03_02_00_00 BR, Alap~ + +Hi Alap, This is strange, I am able to see the release tag "REL_VISION_SDK_03_04_00_00" Could you please confirm did you remove the folders & clone again & then checkout ? or did you just fetch & rebase without cloning ? FYI, I tried both ways 1. clone & checkout: ----------------------------- I followed all the above steps mentioned earlier to clone & checkout & I am able to checkout release tag "REL_VISION_SDK_03_04_00_00" without any error 2. fetch & rebase without cloning --------------------------------------------- Fetch & Rebase using below command, I am able to checkout to latest git fetch (able to see the release tag) git rebase origin/infoadas-on-psdkla3.04 Regards Surya + +Hi Alap, Is there any progress on this issue ? Are you able to clone from vision sdk release tag for 3.4 release (REL_VISION_SDK_03_04_00_00) or not ? regards Surya + diff --git a/data2/text/range/5001-10000/721909.txt b/data2/text/range/5001-10000/721909.txt new file mode 100644 index 0000000000000000000000000000000000000000..e59dadbc2fe0ae42ff29f73f0952a1b5fd5816ce --- /dev/null +++ b/data2/text/range/5001-10000/721909.txt @@ -0,0 +1,50 @@ +Ticket Name: Compiler/TDA2: vision sdk xdc_configure Error + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi, I install vision sdk 3.4 and try to compile example from UserGuides for TDA2x. When i try compile gmake -s -j4, the compilation error is gmake[6]: *** [xdc_configuro] Error 1789. Previous steps was without any errors. I try do this on windows 10 and windows 7. # Compiling tda2xx-evm:ipu1_0:release:app_libs: c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/common_srv/chains_lens.c # # Archiving tda2xx-evm:ipu1_0:release:app_libs # # # Archiving tda2xx-evm:ipu1_0:release:video_sensor_libs # # Invoking configuro... The trust reletionship between this workstation and the primary domain faild gmake[6]: *** [xdc_configuro] Error 1789 gmake[5]: *** [apps_eve1] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 + +Responses: +Hi, Did you try to build without -j4? Regards, Rishabh + +Hi Danil Can you remove "-j" & try to build Regards Surya + +Hi, I did + +Yes, I did. + +Hi, I remove "-j4", and use next sequence: gmake -s clean, gmake -s depend, gmake -s. The result is the same. + +I itried use gmake without "-j". Result is same. + +Hi Danil, Can you share the log file. Regards, Rishabh + +Hi Rishabh, I don't understand what file I should share. I can't find anything that looks like log file. Could you help me? + +Hi Danil, You can redirect build output using command "make -s > build.log" and attach. Kindly make sure you do a clean build and run make -s depend before running above command. Regards, Rishabh + +Rishabh Garg said: Hi Danil, You can redirect build output using command "make -s > build.log" and attach. Kindly make sure you do a clean build and run make -s depend before running above command. Regards, Rishabh Hi Rishabh, I did as you said. I attach files for "gmake -s depend > dependBuild.log" and "gmake -s > Build.log" throw DropMeFiles, link https://dropmefiles.com/0DEEk . It was executed under windows 10. last in cmd gmake[6]: *** [xdc_configuro] Error 1789 gmake[5]: *** [apps_eve1] Error 2 gmake[4]: *** [apps] Error 2 gmake[3]: *** [apps] Error 2 gmake[2]: *** [apps_exe] Error 2 gmake[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 + +Hi Rishabh, Could be any problems if my Windows system language is russian? When gmake > "Build.log" is used, the last logs was --------------------------------- # Invoking configuro... c:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/mkdir -p c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all CACLS c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/maketemp_configuro_cmd_arp32_1.bat /E /P ‚бҐ:F gmake[6]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1' gmake[5]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' gmake[4]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/src/rtos' gmake[3]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps' gmake[2]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' gmake[1]: Leaving directory `c:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build' -------------------------------- Where in command CACLS " ‚бҐ" is "Все" ("All" in english) in windows cmd prompt. If problem is in lenguage, how could I resolve it? I can't change system language + +Hi Danil, Can you attach the log to this thread. Please use "Insert code, attach file and more" option that you can see after clicking reply on this post. Regards, Rishabh + +The log file, it was executed under windows 7. 5700.Build.log + +Hi, I cannot see anything wrong from the log. Can you try changing the windows language. You can search internet on how to change windows language. Regards, Rishabh + +Hi Danil, Can you also check the gmake you are using. You need to make sure that you are using gmake from xdc tools. Regards, Rishabh + +Hi Rishabh, I'm sure that I'm using gmake from xdc tools. And unfortunately I can't change system language. So I install SDK on Ubuntu, it works without any problems. P.S. I found one more Windows 7 machine with Russian System language, and it works normal on this machine. So I havn't idea what it can be. + +Hi Danil, We also had one machine where we faced this exact issue. There issue was using a different gmake. Regards, Rishabh + +Hi Rishabh, In command promt shows next Is it all ok? + +Hi Danil, Path is ok. Can you try re-installation on the machine where build is not working. Regards, Rishabh + +Hi Rishabh, The re-installation doesn't help. + +Hi Danil, It is strange that you are able to build on one machine and not on the other. Can you check the PATH in both machines? Are you using same build environment (bash, command prompt, etc.)? Regards, Rishabh + +Hi Danil, Are you able to make any progress on this issue? If this issue is resolved can we close the thread. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/723744.txt b/data2/text/range/5001-10000/723744.txt new file mode 100644 index 0000000000000000000000000000000000000000..59d7e36176c12e1159533bebf469d0ad1e38a306 --- /dev/null +++ b/data2/text/range/5001-10000/723744.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: why are there errors for "make linux" ? + +Query Text: +Part Number: TDA2 Tool/software: Linux I have got exactly the same questions. + +Responses: +Hi, Could you please share the logs ? What all errors are you getting? Regards Surya + +liugan@localhost:~/work/vsdk/vision_sdk/build$ make kernel make -C ./hlos/makerules/linux -f build_kernel.mk kernel make[1]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' cd /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ;\ ./ti_config_fragments/defconfig_builder.sh -t ti_sdk_dra7x_release Creating defconfig file /home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap/arch/arm/configs/ti_sdk_dra7x_release_defconfig cd /home/liugan/work/vsdk/vision_sdk ;\ make -C /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm ti_sdk_dra7x_release_defconfig make[2]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' # # configuration written to .config # make[2]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make -fbuild_kernel.mk dtb make[2]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make -fbuild_kernel.mk kernel_build KERNEL_TARGET="dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb" make[3]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make -C /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm CROSS_COMPILE=/home/liugan/work/vsdk/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb make[4]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' scripts/kconfig/conf --silentoldconfig Kconfig make[4]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make[4]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' DTC arch/arm/boot/dts/dra7-evm-infoadas.dtb In file included from arch/arm/boot/dts/dra74x.dtsi:10:0, from arch/arm/boot/dts/dra7-evm.dts:10, from arch/arm/boot/dts/dra7-evm-infoadas.dts:8: arch/arm/boot/dts/dra7.dtsi:10:54: fatal error: dt-bindings/interrupt-controller/arm-gic.h: No such file or directory compilation terminated. make[5]: *** [arch/arm/boot/dts/dra7-evm-infoadas.dtb] 错误 1 make[4]: *** [dra7-evm-infoadas.dtb] 错误 2 make[4]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make[3]: *** [kernel_build] 错误 2 make[3]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make[2]: *** [dtb] 错误 2 make[2]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make[1]: *** [kernel] 错误 2 make[1]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make: *** [kernel] 错误 2 liugan@localhost:~/work/vsdk/vision_sdk/build$ And then i try to fix above errors following the original question post： modify omap/scripts/Makefile.lib to : dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \ + -I$(srctree)/include \ -I$(srctree)/arch/$(SRCARCH)/boot/dts \ -I$(srctree)/arch/$(SRCARCH)/boot/dts/include \ -I$(srctree)/drivers/of/testcase-data \ also i get another question just as the original post: liugan@localhost:~/work/vsdk/vision_sdk/build$ make kernel make -C ./hlos/makerules/linux -f build_kernel.mk kernel make[1]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' cd /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ;\ ./ti_config_fragments/defconfig_builder.sh -t ti_sdk_dra7x_release Creating defconfig file /home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap/arch/arm/configs/ti_sdk_dra7x_release_defconfig cd /home/liugan/work/vsdk/vision_sdk ;\ make -C /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm ti_sdk_dra7x_release_defconfig make[2]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' # # configuration written to .config # make[2]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make -fbuild_kernel.mk dtb make[2]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make -fbuild_kernel.mk kernel_build KERNEL_TARGET="dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb" make[3]: 正在进入目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make -C /home/liugan/work/vsdk/vision_sdk/../ti_components/os_tools/linux/kernel/omap ARCH=arm CROSS_COMPILE=/home/liugan/work/vsdk/ti_components/os_tools/linux/linaro/gcc-linaro-5.3-2016.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb make[4]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' scripts/kconfig/conf --silentoldconfig Kconfig make[4]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make[4]: 正在进入目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' DTC arch/arm/boot/dts/dra7-evm-infoadas.dtb Error: ./include/dt-bindings/input/linux-event-codes.h:1.1-3 syntax error FATAL ERROR: Unable to parse input tree make[5]: *** [arch/arm/boot/dts/dra7-evm-infoadas.dtb] 错误 1 make[4]: *** [dra7-evm-infoadas.dtb] 错误 2 make[4]:正在离开目录 `/home/liugan/work/vsdk/ti_components/os_tools/linux/kernel/omap' make[3]: *** [kernel_build] 错误 2 make[3]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make[2]: *** [dtb] 错误 2 make[2]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make[1]: *** [kernel] 错误 2 make[1]:正在离开目录 `/home/liugan/work/vsdk/vision_sdk/build/hlos/makerules/linux' make: *** [kernel] 错误 2 liugan@localhost:~/work/vsdk/vision_sdk/build$ so , i had to modify the file /include/dt-bindings/input/linux-event-codes.h as following: #include "../../uapi/linux/input-event-codes.h" finally the kernel was built successfully! + diff --git a/data2/text/range/5001-10000/725117.txt b/data2/text/range/5001-10000/725117.txt new file mode 100644 index 0000000000000000000000000000000000000000..1b59e9bc7e228f4d5089a808e40f53cbf19dd2d8 --- /dev/null +++ b/data2/text/range/5001-10000/725117.txt @@ -0,0 +1,40 @@ +Ticket Name: CCS/TDA2: use of vcop_median3x3_kernel.c and vcop_median3x3_kernel.k + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio in SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3 have vcop_median3x3_kernel.c and vcop_median3x3_kernel.k what is the diffrent of them? + +Responses: +Shuai, vcop_median3x3_kernel.k is the actual kernel code which user write which can run on VCOP on the other hand vcop_median3x3_kernel.c is the compiler generated file which gets generated when you compile the kernel code with -kv option. This is an optional file and you need not generate it. You will only need to include vcop_median3x3_kernel.h file in your code and call the functions implemented in it for calling the VCOP code from ARP32. Please refer any of the kernel as part of EVESW repo to understand it. Regards, Anshu + +Hi Anshu Great ! i donot know you work daytime or night! you mean i just turn a c function to vcop_.k file (Using vector to implement C function) But in ccs project i use vcop_median3x3_kernel.k is failed! vcop_median3x3_kernel.c is OK. in vc project vcop_median3x3_kernel.k is ok. BESTWISHES shuai + +Shuai, Can you share the full log along with the compile options of what is failing when you compile vcop_median3x3_kernel.k Regards, anshu + +Hi anshu #if VCOP_HOST_EMULATION #include "../src_kernelC/vcop_median3x3_kernel.k" // kernel source #else #include "vcop_median3x3_kernel.h" #endif in ccs project use vcop_median3x3_kernel.k i move vcop_median3x3_kernel.h and vcop_median3x3_kernel.c then can not find vcop_median3x3_kernel.h. BESTWISHES shuai + +Can you share the compile option used when you compiled vcop_median3x3_kernel.k. It should have -kh option to generate the vcop_median3x3_kernel.h file. Regards, Anshu + +Hi Anshu compile option is -v210 -O3 -g --diag_warning=225 --display_error_number --diag_wrap=off -z -m"eve_exmple1.map" -i"D:/ti_ccsv7/ccsv7/tools/compiler/arp32_1.0.9/lib" -i"D:/ti_ccsv7/ccsv7/tools/compiler/arp32_1.0.9/include" --reread_libs --warn_sections --xml_link_info="eve_exmple1_linkInfo.xml" --rom_model BESTWISHES shuai + +Hi Anshu i use vcop_median3x3_kernel.k and vcop_median3x3_kernel.h is ok in debug list generate vcop_median3x3_kernel.h and vcop_median3x3_kernel.c but first must have vcop_median3x3_kernel.h or could not open source file "vcop_median3x3_kernel.h" vcop_median3x3_tb.c /eve_exmple1 line 82 C/C++ Problem BESTWISHES shuai + +please add -kh -kv option to your compile option and see if you are able to generate "vcop_median3x3_kernel.h" and "vcop_median3x3_kernel.c" Regards, Anshu + +Hi Anshu so how to add -kh -kv? i think makefile of CCS is generate . BESTWISHES shuai + +Shuai, I myself have never used CCS projects, but I am sure there should be a way to provide arguments in the CCS interface. Please explore the options in your project ( search in the location where you have provided include directory and libraries to be linked). Regards, Anshu + +thanks Anshu! shuai + +Hi:Anshu i cannot find where to add -kh -kv options! could you help me ! thanks shuai + +Shuai, You need to add it in the compiler options for the .k file. As mentioned I have not myself used CCS project so you might need to explore the options where you can add extra compiler option. Regards, Anshu + +Hi :Anshu i am try to build D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test i think gmake is for VCOP_HOST_EMULATION build vcop_median3x3_kernel.k creat vcop_median3x3_kernel.c and vcop_median3x3_kernel.h but gmake is failed . follow is the log D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test>gmake D:\ti_ccsv7\ccsv7\utils\cygwin\mkdir -p ".\elf_out" || cd ".\elf_out" "g++" -g -fpermissive -I"D:\ti_SDK_VISION_03_02_00_00\ti_components\cg_tools\windows\arp32_1.0.7"\include\vcop -I"..\..\..\..\common" -I"..\..\..\common" -DVCOP_HOST_EMULATION -o ".\elf_out"\a.exe -I"..\inc" vcop_median3x3_config.c vcop_median3x3_tb.c "..\..\..\..\common\eve_profile.c" "..\..\..\..\common\curve_fitting.c" "..\..\..\..\common\configparser.c" '"g++"' 不是内部或外部命令，也不是可运行的程序 或批处理文件。 gmake: *** [a.out] Error 1 gmake target is ok but i think vcop_median3x3_kernel.h is creat by gmake VCOP_HOST_EMULATION mode. thanks shuai + +Shuai, First of all host emulation build will not generate vcop_median3x3_kernel.c and vcop_median3x3_kernel.h. These files are only generated if you compile using ARP32 compiler. Secondly host emulation build is only supported with Microsoft Visual Studio compiler (MSVC). The command to build using MSVC compiler is gmake msvc. You are suppose to setup all visual studio environment variable before invoking the gmake msvc command. You can use the following script provided by MSVC to setup the environment variable {Microsoft Visual Studio 11.0\VC\vcvarsall.bat} Regards, Anshu + +Hi Anshu I need to generate vcop_median3x3_kernel.c and vcop_median3x3_kernel.h. from vcop_median3x3_kernel.k but in CCS only generate vcop_median3x3_kernel.c ,problem is i dont knon how to add -kh -kv options! so i give up CCS , i am try to build D:\ti_SDK_VISION_03_02_00_00\ti_components\algorithms\eve_sw_01_18_00_00\kernels\imgsiglib\vcop_median3x3\test use gmake . i think in this sample contain vcop_median3x3_kernel.k . BESTWISHES shuai + +Hi Shuai, As you are now using make based build, can we close this thread? Regards, Anshu + diff --git a/data2/text/range/5001-10000/727731.txt b/data2/text/range/5001-10000/727731.txt new file mode 100644 index 0000000000000000000000000000000000000000..601299fb580fea4c6eaf23a2ea6370e65202876d --- /dev/null +++ b/data2/text/range/5001-10000/727731.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Link to libopencv_objdetect.a fail! + +Query Text: +Part Number: TDA2 Tool/software: Linux Dear TI: In VSDK Linux build environment, I add in OPENCV_LIBS += $(OpenCV_PREBUILD_PATH)/libs_linux/libopencv_objdetect.a in common_footer_a15.mk to enable the object detection. but always get error when calling the object detection API: cvHaarDetectObjects /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(haar.cpp.o): In function `cvHaarDetectObjectsForROC(void const*, CvHaarClassifierCascade*, CvMemStorage*, std::vector >&, std::vector >&, double, int, int, CvSize, CvSize, bool)': haar.cpp:(.text._Z25cvHaarDetectObjectsForROCPKvP23CvHaarClassifierCascadeP12CvMemStorageRSt6vectorIiSaIiEERS5_IdSaIdEEdii6CvSizeSC_b+0x4ca): undefined reference to `cvResize' haar.cpp:(.text._Z25cvHaarDetectObjectsForROCPKvP23CvHaarClassifierCascadeP12CvMemStorageRSt6vectorIiSaIiEERS5_IdSaIdEEdii6CvSizeSC_b+0x1506): undefined reference to `cvCanny' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o): In function `cv::BaseCascadeClassifier::~BaseCascadeClassifier()': cascadedetect.cpp:(.text._ZN2cv21BaseCascadeClassifierD2Ev+0x14): undefined reference to `cv::Algorithm::~Algorithm()' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o): In function `cv::CascadeClassifierImpl::CascadeClassifierImpl()': cascadedetect.cpp:(.text._ZN2cv21CascadeClassifierImplC2Ev+0x26): undefined reference to `cv::Algorithm::Algorithm()' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o): In function `cv::FeatureEvaluator::setImage(cv::_InputArray const&, std::vector > const&)': cascadedetect.cpp:(.text._ZN2cv16FeatureEvaluator8setImageERKNS_11_InputArrayERKSt6vectorIfSaIfEE+0x206): undefined reference to `cv::resize(cv::_InputArray const&, cv::_OutputArray const&, cv::Size_, double, double, int)' cascadedetect.cpp:(.text._ZN2cv16FeatureEvaluator8setImageERKNS_11_InputArrayERKSt6vectorIfSaIfEE+0x4bc): undefined reference to `cv::resize(cv::_InputArray const&, cv::_OutputArray const&, cv::Size_, double, double, int)' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o):(.data.rel.ro._ZTVN2cv21CascadeClassifierImplE+0x20): undefined reference to `cv::Algorithm::save(cv::String const&) const' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o):(.data.rel.ro._ZTVN2cv21CascadeClassifierImplE+0x24): undefined reference to `cv::Algorithm::getDefaultName() const' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o):(.data.rel.ro._ZTIN2cv21BaseCascadeClassifierE+0x8): undefined reference to `typeinfo for cv::Algorithm' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o):(.data.rel.ro._ZTVN2cv21BaseCascadeClassifierE+0x20): undefined reference to `cv::Algorithm::save(cv::String const&) const' /home/cheepeng/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/open_compute/opencv/opencv-3.1.0/libs_linux/libopencv_objdetect.a(cascadedetect.cpp.o):(.data.rel.ro._ZTVN2cv21BaseCascadeClassifierE+0x24): undefined reference to `cv::Algorithm::getDefaultName() const' collect2: error: ld returned 1 exit status Please advise. Thanks and best regards He Wei + +Responses: +Hi He Wei, Could you please build without -s -j option & share the full log ? Need to check if it is including the lib or not ? Regards Surya + +Dear Surya, The entire log is attached. I notice the libopencv_objdetect.a is linked, (If I didn't include it in makefie, I will get another API error) and actually I have included all the pre-build OpenCV lib to avoid any dependency issue. Please advise. Thanks and best regards He Wei build_log.txt.tar.gz + +Dear Surya, Any update? I google and notice the order to add in each static opencv lib could be matter. But I don't the correct order to add in. I understood TI has done the cross-compile and run the OpenCV test, Can I know during the OpenCV test, what is the order in the test application when linking to these opencv static libs? Especially how to add the object detection lib? Thanks and best regards He Wei + +Hi He Wei, When OpenCV_test is enabled ,This is the order on which libs are linked to test application Please check if that helps you ifeq ($(ENABLE_OPENCV_TESTS),yes) _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_calib3d.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_core.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_features2d.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_imgcodecs.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_imgproc.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_objdetect.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_photo.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_stitching.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_superres.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_video.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_perf_videoio.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_calib3d.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_core.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_features2d.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_flann.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_highgui.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_imgcodecs.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_imgproc.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_ml.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_objdetect.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_photo.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_shape.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_stitching.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_superres.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_video.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_test_videoio.a _OPENCVAPP_LIBS_a15_0 +=$(OpenCV_PATH)/libopencv_ts.a endif Regards Surya + diff --git a/data2/text/range/5001-10000/729926.txt b/data2/text/range/5001-10000/729926.txt new file mode 100644 index 0000000000000000000000000000000000000000..38ee65946ab61065a81f95afc44ca99ccc425032 --- /dev/null +++ b/data2/text/range/5001-10000/729926.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/TDA2: Cannot write to SSD from OSA_memAllocSR() buffers with O_DIRECT flag + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I'm using Processor SDK 3.03, building for custom board with TDA2 chip. The usecase that we have fills 4 input buffers in NullSrc link from a file on SD card and forwards them to a link that we are using to write those buffers to an SSD. We have successfully written to 4 files opened without O_DIRECT flag using write() API. However, the CPU load is very high which is resulting in frame drops and we attributed that to heavy file system caching we suspect is being done in the background. The next thing we did was try to open files with O_DIRECT flag on but there was nothing written to the files and the "dstat" shows no disk activity. We looked into it and found out that the write() is not being done at all, returning -1 instead. The errno error was "Bad address". We know that O_DIRECT usage requires proper buffer alignment but we made sure that they are aligned in several ways (printing the address to console as well as using this nifty trick here: http://www.titov.net/2006/01/02/using-o_largefile-or-o_direct-on-linux ) but to no avail, it keeps returning -1. I just stumbled upon this post: https://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/242361#pi320098=3. It has something to do with the SR buffers being allocated in CMEM pool that the kernel cannot see or something like that. Is there any way to overlap a CMEM pool and the memory that kernel can see? Or is there something else entirely? Thank you in advance. Regards, Nick + +Responses: +Hi Nick, Is the write going through without O_DIRECT? Regards Shravan + +Hi Shravan, Yes, I mentioned it in the original post. Regards, Nick + +Hi Nick, Can you try the below changes and let me know if it works. 1. Update the following entries in apps/build/tda2px/mem_segment_definition_linux.xs in VSDK SR1_BUFF_ECC_ASIL_SIZE = 1*MB; SR1_BUFF_ECC_QM_SIZE = 1*MB; SR1_BUFF_NON_ECC_ASIL_SIZE = 1*MB; 2. Add the below line to links_fw/src/hlos/osa/src/osa_mem.c in VSDK "#define OSA_BEBUG_MEM" 3. When you're writing to the file using o_direct, please print the physical and virtual address of the buffer being written. Once all these changes are made, please perform a clean build, and send over the logs. Regards Shravan + +Hi Shravan, Unfortunately it did not work. Please find the log in the attachment. Buffer addresses are: [HOST] [HOST ] 261.854328 s: Buffer 0 virtual address = 0xa1fb3000 [HOST] [HOST ] 261.854328 s: Buffer 0 physical address = 0x84500000 [HOST] [HOST ] 261.857561 s: Buffer 1 virtual address = 0xa21ae000 [HOST] [HOST ] 261.857561 s: Buffer 1 physical address = 0x846fb000 [HOST] [HOST ] 261.860855 s: Buffer 2 virtual address = 0xa23a9000 [HOST] [HOST ] 261.860855 s: Buffer 2 physical address = 0x848f6000 [HOST] [HOST ] 261.864149 s: Buffer 3 virtual address = 0xa25a4000 [HOST] [HOST ] 261.864149 s: Buffer 3 physical address = 0x84af1000 I obtained the physical addresses using OSA_memVirt2Phys() API. Regards, Nick log.log + +Hi Nick, Instead of using O_DIRECT, can you write to a pre-allocated file using fallocate. Allocate a file (of less than 2GB) using fallocate and try to write to the file without the O_DIRECT flag. You should see a performance bump (throughput should increase, CPU load must come down too). root# rm -rf test1.yuv root# fallocate -l 1G test1.yuv Can you please try this and let us know your observations? Writing using O_DIRECT from SR-1 isn't feasible (even though we mmap the region, and mark it as shared). SR-1 is analogous to I/O memory and providing this access to kernel mapped pages is a hack, and shouldn't be allowed. Regards Shravan + +Hi Shravan, We have tried what you suggested and the load is still very high (~90%) and there are frame drops. What we would like to know is where does dma_alloc_coherent() allocate memory from. We have not been able to write to SSD with O_DIRECT flag from a buffer allocated via that API, too. Is that memory allocated from the same segment from which OSA_memAllocSR() allocates memory? Regards, Nick + +Hi Nick, The dma_alloc_coherent memory allocates memory from the CMA pool if no device is specified. The OSA_memAllocSR sends a call from Linux to TI-RTOS (running on M4) to allocate memory from SR. TI-RTOS allocates memory and passes a physical address to Linux and the underlying drivers convert the physical address to a file-descriptor / virtual address. So when OSA_memAllocSR is called the allocation happens from TI-RTOS and not from Linux. The reason why both of these fail when writing with O_DIRECT is because, both are I/O memory. These memory regions are marked as reserved which prevents the kernel from using these memory regions. So there has to be a copy from user-space (where there is an explicit call to map the reserved region) to kernel space, and this is what increases the load. To enable O_DIRECT with I/O memory will involve I/O mem directly writing to kernel space, which is a security flaw. Regards Shravan + diff --git a/data2/text/range/5001-10000/730503.txt b/data2/text/range/5001-10000/730503.txt new file mode 100644 index 0000000000000000000000000000000000000000..706e47241660f2a802b076b170e44eeab3d83a52 --- /dev/null +++ b/data2/text/range/5001-10000/730503.txt @@ -0,0 +1,12 @@ +Ticket Name: Linux/TDA2: how to use the malloc() & OSA_memAllocSR to apply the mem on tda2px ?? + +Query Text: +Part Number: TDA2 Tool/software: Linux i use our pcb board . total mem size is 512MB . run hlos on A15 , linux used 64MB mem. & OSA_HEAPID_DDR_CACHED_SR1 used 205 MB proble 1. : on linux , i excute the cmd "free" i found the mem info as follow, why the total mem is 250M ??? OSA_HEAPID_DDR_CACHED_SR1 this mem area can be found on linux ?? total used free shared buffers cached Mem: 250752 142764 107988 4636 4336 47188 -/+ buffers/cache: 91240 159512 Swap: 0 0 0 proble 2: i run my usecase isscapture > isp > my alg (A15) >enc > rtsp server(A15) ; when i run the usecase , error "virtio_rpmsg_bus virtio2: msg received with no recipient" encountered . it seems like mem malloc is not used correctly . how to use malloc() & OSA_memAllocSR ? because i use some opensource code , there must mem malloc is use malloc or new in thems . if i malloc() a big size mem area , is it conflict with OSA_memAllocSR ??? or other mem area will be used ? + +Responses: +Hi, Entries which lie in the 'reserved-memory' entry of the device tree, are carved out from the memory accessible to Linux. Thus the 205MB which is allocated for shared-region is mapped in Linux, but isn't available for generic applications to use. Applications like Vision-SDK (apps.out), which rely on M4 to allocate the buffers, are capable of accessing these regions through the use of memcache module. You can find more information here: www.kernel.org/.../reserved-memory.txt We recommend using OSA_memAllocSR for all memory allocations which are shared across cores. The malloc call doesn't allocate memory from the SR region, instead it allocates from the Linux kernel's high-mem. Regards Shravan + +hi Shravan there is some log of my usecase , i want you help me check if the mem is ok ? because before i change malloc to OSA_memAllocSR, more my usecase can not run , and after that ,some usecase can run , and some also can not run . thanks . [HOST] [HOST ] 72.553772 s: NULL Link: Create in progress !!! [HOST] [HOST ] 72.553803 s: RTSP Link: Create done !!! [HOST] [HOST ] 72.555419 s: guoqiang Entered chains_issSimpleIsp_Display_StartApp [HOST] [DSP1 ] 72.553894 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP1 ] 72.553925 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP1 ] 72.553955 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 520464 B (508 KB) [HOST] [DSP2 ] 72.554169 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [DSP2 ] 72.554199 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [HOST] [DSP2 ] 72.554260 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 520464 B (508 KB) [HOST] [IPU2 ] 72.550661 s: ENCODE: CH0: H264EncCreated:H264ENC_TI DEV.500.V.H264AVC.E.IVAHD.02.01.09.01 [HOST] [IPU2 ] 72.550936 s: ENCODE: All CH Create ... DONE !!! [HOST] [IPU2 ] 72.552339 s: ENCODE: Create ... DONE !!! [HOST] [IPU2 ] 72.552796 s: IPC_OUT_1 : Create in progress !!! [HOST] [IPU2 ] 72.553132 s: IPC_OUT_1 : Create Done !!! [HOST] [IPU2 ] 72.554535 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 72.554657 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252096 B (246 KB) [HOST] [IPU2 ] 72.554809 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 72.554962 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 214958080 B (205 MB), Free size = 171809792 B (163 MB) [HOST] [IPU2 ] 72.555145 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 1046912 B (0 MB), Free size = 1019264 B (0 MB) [HOST] [IPU2 ] 72.555572 s: *** UTILS: CPU KHz = 20000 Khz *** [HOST] [IPU2 ] 72.855426 s: Setting Camera Power to 3!!! [HOST] [IPU2 ] 72.855517 s: Waiting for 500 milliseconds!!! [HOST] [IPU2 ] 73.355456 s: Serilaizer # 0 has I2CAddr 74 !!! [HOST] [IPU2 ] 73.856463 s: AR0144_Start :read some reg i2cinstid = 4 , i2c addr = 40 [HOST] [IPU2 ] 73.857317 s: AR0144_Start :read the regAddr 0x3000 regValue: 1356 [HOST] [IPU2 ] 73.857378 s: AR0144_Start :start write default reg [HOST] [HOST ] 74.917373 s: guoqiang 11 Entered chains_issSimpleIsp_Display_StartApp [HOST] [HOST ] 74.918959 s: guoqiang 55 Entered chains_issSimpleIsp_Display_StartApp [HOST] [HOST ] 74.919477 s: [HOST] [HOST ] [HOST] [HOST ] ==================== [HOST] [HOST ] Chains Run-time Menu [HOST] [HOST ] ==================== [HOST] [HOST ] [HOST] [HOST ] 0: Stop Chain [HOST] [HOST ] [HOST] [HOST ] p: Print Performance Statistics [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [ 68.639840] omap_l3_noc 44000000.ocp: L3 application error: target 5 mod:1 (unclearable) [HOST] [IPU2 ] 74.915634 s: AR0144_Start :end write defa[ 68.650614] omap_l3_noc 44000000.ocp: L3 debug error: target 5 mod:1 (unclearable) ult reg [HOST] [IPU2 ] 74.917037 s: AR0144_Start :read the regAddr 0x3270 regValue: 100 [HOST] [IPU2 ] 74.917129 s: #### Sensor Config time = 2361 msec #### [HOST] [IPU2 ] 74.918593 s: ISSCAPTURE: Start in progress !!! [HOST] [IPU2 ] 74.918776 s: ISSCAPTURE: Start Done !!! [HOST] [HOST ] 74.970444 s: the detect face num is : 0 the pitch(1280, 1280) use 3 ms [HOST] [HOST ] 75.004758 s: the detect face num is : 0 the pitch(1280, 1280) use 3 ms [HOST] [HOST ] 75.037180 s: the detect face num is : 0 the pitch(1280, 1280) use 4 ms + +Hi, malloc will allocate from the memory available to the Linux kernel (in your cases its 512MB - reserved mem regions). As indicated in the previous posts, if you want IPU and DSP to access memory you need to allocate using Osa_memAllocSR. If its local to a process in Linux, you can use malloc. You can use the information from the below command to see the amount of memory available to Linux. cat /proc/meminfo If you notice your available memory on linux is low, you can reduce your SR-1 region size, by updating the kernel device tree entry and accordingly update the linux memory map file found in apps/build/tda2px/mem_segment_definition_linux.xs in VSDK and perform a clean build. Regards Shravan + diff --git a/data2/text/range/5001-10000/736438.txt b/data2/text/range/5001-10000/736438.txt new file mode 100644 index 0000000000000000000000000000000000000000..fb678a80049f3ad253699b878e8e3eeb1fddf429 --- /dev/null +++ b/data2/text/range/5001-10000/736438.txt @@ -0,0 +1,58 @@ +Ticket Name: Compiler/TDA2: When will the visionSDK3 's cgtc6000 compiler upgrade to v8.x.x ? + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: TI C/C++ Compiler The cgtc6000 comiler v7.4.2 is used in the latest visionSDK3.05. The v7.4.2 comiler is not enough for our project, the v8.x.x is OK. In below thread, e2e.ti.com/.../715156 Rishabh Garg told me that the visionSDK3.05 will upgrade cgtc6000 comiler to v8.x.x two month ago. But visionSDK 3.05 still use v7.4.2 when it was released. So when will visionSDK upgrade cgtc6000 compiler to v8.x.x? + +Responses: +Hi Bao, CGT change was planned for the 03.05 release. I will get back to you with details. Regards, Rishabh + +Hi Bao, There were some issues due to which we could not change the compiler to 8.x. You can compile your algorithm with 8.x compiler and link the library with Vision SDK which is built using 7.4.2. Regards, Rishabh + +Dear Rishabh, Thanks for your reply. We tried use v8.1.3 comiler compile our algorithm and link the library with vision SDK which is built using v7.4.2. We got the binary file. But the DSP2 program was crashed when the system is startup before main() function was called. The detail of this issue was descriped in the orignal thread. + +Hi Bao, The original question mentions that you have build SDK also with v8.1.3 compiler. Also we are trying to upgrade to 8.2.4 compiler. With this version we have not seen any crash. As an experiment can you try this version. Regards, Rishabh + +OK, I will try it later。 + +Hi Bao, Do let me know in case you face any issues. Regards, Rishabh + +Hi Rishabh, As your suggestion, I comile our algorithm by v8.2.4 comiler and link the library with Vision SDK which is built using 7.4.2. The issue still exist. The system can't startup properly. Our algorithm refer comlex c++ . I debug it , the dsp program crashed in __c_init00, which do some initialization for the program. If I comment off the c++ related function calls from our algorithm, the system startup properly. + +Hi Bao, Can you please debug it further and see what are the exact instructions that are causing DSP to crash. It might be an issue with some compiler options. Regards, Rishabh + +Hi Rishabh, When I debug it: (1) I set a break point at "_c_int00" for DSP2. (2) I load the DSP2 exectable file "vision_sdk_c66xdsp_2_release.xe66". The CCS show : Can't find a source file at "/db/ztree/library/trees/xdctargets/xdctargets-l07/src/ti/targets/rts6000/boot.c" I locate the path as "PROCESSOR_SDK_VISION_03_05_00_00\ti_components\os_tools\bios_6_46_04_53\packages\ti\targets\rts6000" (3) Then debug step by step to fuction "_auto_init_elf", I just see the program crashed at below code seciotns, and crashed at function "memcpy" : if (!(&__TI_Handler_Table_Base >= &__TI_Handler_Table_Limit)) { table_ptr = (unsigned char**) &__TI_CINIT_Base; table_limit = (unsigned char**) &__TI_CINIT_Limit; while (table_ptr < table_limit) { unsigned char* load_addr = *table_ptr++; unsigned char* run_addr = *table_ptr++; unsigned char handler_idx = *load_addr++; handler_fptr handler = (handler_fptr)(&HANDLER_TABLE)[handler_idx]; (*handler)((const unsigned char*)load_addr, run_addr); } } Exception at 0x857ad40c 857ad380 000000a0 rts6600_elf.lib : memcpy64.obj (.text:memcpy) 857ad420 000000a0 : modf.obj (.text:modf) (4) Once time , I see the program crashed after execute " table_limit = (unsigned char**) &__TI_CINIT_Limit;", maybe due to the symbol not match. (5) I attach the AppImage and vision_sdk_c66xdsp_2_release.xe66. You could try on your board, the DDR size is 1G. executable file.rar + +Hi Bao, Unfortunately the person who is working on CGT migration is out of office this week. Kindly expect a slight delay in response. Regards, Rishabh + +Hi, First you have to try to build your algorithm with CGT 7.4.2 and check whether it works with that or not. Before trying the above thing we are not sure whether your algorithm is causing crash or the new CGT. TI has tested VLIB and VXLIB with CGT 8.2.4 and the rest of the VSDK with CGT 7.4.2 and that works fine in VSDK 3.5 release. Regards, Anuj + +Hi Anuj, We compile our algorithm failed use CGT 7.4.2. There are so many errors that we can't resolve them. But we compile it success use CGT 8.1.3 and 8.2.4, didn't need to modify anything. We comile our algorithm use CGT8.1.3 and link it with CGT8.1.3 in visionSDK2.10 which use CGT7.4.2 as default comiler. We use linux as the OS for the emmbedded system. The whole system could run properly. On the visionSDK 3.03 and 3.05, I try to use CGT8.1.3 and 8.2.4, we use sysbios as the embedded system. The DSP2 crashed during the program initialization stage. Which contains our algorithm. I think the difference between the boot program on the linux and sysbios. Linux 's boot program load all the data the DSP initial program needed, the Sysbios 's boot program not load all the data the DSP initial program needed. So the DSP program crashed during the initial stage after the Sysbios 's boot program load the DSP 's data into the DDR, and let it to run. + +Hi Bao, Can you check differences for DSP makreules between VSDK 2.10 and VSDK 3.05? There is a gap of around two years amongst the two releases. Can you share both these files as an attachment here. It is possible that the compression format for cinit section has changed between the two which is creating issues. Regards, Rishabh + +Hi Rishabh, The makerules of v2.10 and v3.05 attached.makerules.rar + +Hi, Are you able to boot using sysbios as OS using VSDK v2.12 with your algo compiled using 8.x.x? Regards, Anuj + +Hi Anuj, We never try it. + +Hi, Can you please try that. And also try to run any openvx related usecase and check whether that runs? Regards, Anuj + +Hi Bao, The RTS library that was used for linking in 2.10 is different as compared to 3.05 which could be leading to crash. Can you try to change RTS lib and see if it works. Another experiment could be using 2.10 DSP makerules (i.e. rules_66.mk. Again please keep in mind that VSDK 3.05 might not work at all if compiled using older DSP makerules. Regards, Rishabh + +Hi Rishabh, I have tried replace the 3.05's RTS lib with 2/10's, the crash still exist. I just replace the "PROCESSOR_SDK_VISION_03_05_00_00\ti_components\os_tools\bios_6_46_04_53\packages\ti\targets" folder with 2.10's. Due to the lib names and path are different in 2.10 and 3.05 's makerules, I can't replace it. I wan't to debug more detail in boot.ae66, which include autoinit.c and boot.c 's obj. But I don't know how to build the two source file to boot.ae66, I just get boot.lib with "-g" option, and rename it to boot.ae66. I use cgt 8.2.4， and replace it with 3.05 orignal. Then I can't connect the DSP by debugger, the DSP program didn't get into _c_int00. I think it failed during the parse stage. I have browse the initialization part of the compiler doc, I wan't to know the more detail of the crash reason. So, could you help me compile autoinit.c and boot.c to boot.ae66 by 8.2.4 with "-g" option, and attach these three files to me ? These two files are under "PROCESSOR_SDK_VISION_03_05_00_00\ti_components\os_tools\bios_6_46_04_53\packages\ti\targets\rts6000". + +Hi, Which profile are you using? debug or release. Please use debug mode and build the entire VSDK along with your algo with CGT 8.2.4. Regards, Anuj + +Hi Anuj, I use debug profile. And use command "make -s -j depend", then "make -s -j", then "make -s -j appimage". I found that the libs under "PROCESSOR_SDK_VISION_03_05_00_00\ti_components\os_tools\bios_6_46_04_53\packages\ti\targets\rts6000\lib" were not rebuilt, they keep the status from ti release. And they are in release mode. When I debug boot.ae66 in CCS step by step , the source code can't match the executable exactly. + +Hi, We do not rebuild the bios and we use only prebuild lib of it which is in release mode. So if you single step then you can find some mismatch as its in release mode. And it should work with CGT 8.2.4 in debug mode, if its not happening then definitely there is some issue in your algo. Regards, Anuj + +Hi Anuj, I see under visionSDK2.10 , in the DSP 's map file: .cinit 0 91300000 00000000 UNINITIALIZED But under visionSDK3.05 , in the DSP 's map file: .cinit 0 883bf618 0000b068 883bf618 0000b015 (.cinit..fardata.load) [load image, compression = rle] 883ca62d 00000003 --HOLE-- [fill = 0] 883ca630 00000022 (.cinit..neardata.load) [load image, compression = rle] 883ca652 00000002 --HOLE-- [fill = 0] 883ca654 0000000a (.cinit..rodata.load) [load image, compression = rle] 883ca65e 00000002 --HOLE-- [fill = 0] 883ca660 00000008 (__TI_handler_table) 883ca668 00000018 (__TI_cinit_table) I think this is the reason of my issue. How could I get the .cinit like 2.10 in 3.05 ? Any linker or compiler options needed? + +Hi, Can you please share the resolution for this issue. Regards, Rishabh + +Hi Rishabh, Our algorithm allocate huge memory in static structures, I removed them and use malloc. + +Hi Bao, Ok. Thanks for the confirmation. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/740210.txt b/data2/text/range/5001-10000/740210.txt new file mode 100644 index 0000000000000000000000000000000000000000..25a993c8dba07100724fd0a9b68ed85560ed18b0 --- /dev/null +++ b/data2/text/range/5001-10000/740210.txt @@ -0,0 +1,65 @@ +Ticket Name: RTOS/TDA2: How to use UIA Profile (System Analyzer) for EVE in Vision SDK + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hi, I try use System Analyzer -> Context Aware Profile for EVE core in vision SDK 3.04. I follow System Analyzer User's Guide (4.15.3 Profiling Functions Using Enter and Exit Hook Functions), In rules_arp32.mk next options is added to CFLAGS_INTERNAl: --entry_hook=functionEntryHook --entry_parm=address --exit_hook=functionExitHook --exit_parm=address try use uia_2_00_05_50 and uia_2_30_01_02, but get error: Undefined referance symbols: ti_uia_events_UIAProfile_enterFunctionAdrs__C ti_uia_events_UIAProfile_exitFunctionAdrs__C They are defined as extern variables in , but I can't find difinition throw vision SDK packeges. Is there any way to use Context Aware Profile for EVE core in vision SDK 3.04 ? Thank you for answers. + +Responses: +Hi, I think trouble may be in BIOS_common.cfg, I modified part for profiling next way if (enableProfiling == "yes") { var UIAProfile = xdc.useModule('ti.uia.events.UIAProfile'); //added UIAProfile.enable = true; //added UIAProfile.UIAProfile_enterFunctionAdrs var Loger = xdc.useModule('xdc.runtime.Log'); //added BIOS.logsEnabled = true; var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup'); LoggingSetup.sysbiosSwiLogging = true; LoggingSetup.sysbiosHwiLogging = true; LoggingSetup.sysbiosSemaphoreLogging = true; LoggingSetup.loadLogging = true; LoggingSetup.benchmarkLogging = true; LoggingSetup.mainLoggingRuntimeControl = true; LoggingSetup.loadTaskLogging = true; LoggingSetup.loadSwiLogging = true; LoggingSetup.loadHwiLogging = true; LoggingSetup.loadLoggerSize = 262144; LoggingSetup.sysbiosLoggerSize = 524288; LoggingSetup.mainLoggerSize = 262144; LoggingSetup.enableContextAwareFunctionProfiler = true; //added var UIAMetaData = xdc.useModule('ti.uia.runtime.UIAMetaData'); UIAMetaData.overrideTimestampFreq = true; UIAMetaData.timestampFreq.lo = 20000000; } Could you help me with right configuretion? + +Hi Danil, I made the following changes in the vision_sdk to get my compilation working with UIA on EVE. Can you please check if you are making the same changes: diff --git a/apps/configs/tda2xx_evm_bios_all/cfg.mk b/apps/configs/tda2xx_evm_bios_all/cfg.mk +index e769db0..224a2ed 100755 +--- a/apps/configs/tda2xx_evm_bios_all/cfg.mk ++++ b/apps/configs/tda2xx_evm_bios_all/cfg.mk +@@ -150,7 +150,7 @@ HS_DEVICE=no + ULTRASONIC_INCLUDE=no + + # Enable this macro to enable profiling features through system analyzer on CCS +-ENABLE_UIA_PROFILING=no ++ENABLE_UIA_PROFILING=yes + + # + #Flag for task profiling +diff --git a/build/rtos/makerules/rules_arp32.mk b/build/rtos/makerules/rules_arp32.mk +index 727cfcf5..c56fbae 100755 +--- a/build/rtos/makerules/rules_arp32.mk ++++ b/build/rtos/makerules/rules_arp32.mk +@@ -197,6 +197,8 @@ endif + # Assemble CFLAGS from all other CFLAGS definitions + _CFLAGS = $(CFLAGS_INTERNAL) $(CFLAGS_GLOBAL_$(CORE)) $(CFLAGS_XDCINTERNAL) $(CFLAGS_LOCAL_COMMON) $(CFLAGS_LOCAL_$(CORE)) $(CFLAGS_LOCAL_$(PLATFORM)) $(CFLAGS_LOCAL_$(SOCFAMILY)) $(CFLAGS_LOCAL_$(SOC)) $(CFLAGS_APP_DEFINES) $(CFLAGS_C + ++_CFLAGS += --entry_hook=ti_uia_events_UIAProfile_functionEntryHook --entry_parm=name --exit_hook=ti_uia_events_UIAProfile_functionExitHook --exit_parm=name ++ + + INCLUDE_EXTERNAL = $(foreach INCL,$(INCLUDE_EXTERNAL_INTERFACES),$($(INCL)_INCLUDE)) + INCLUDE_UIA = $(uia_INCLUDE) +diff --git a/links_fw/src/rtos/bios_app_common/tda2xx/cfg/BIOS_common.cfg b/links_fw/src/rtos/bios_app_common/tda2xx/cfg/BIOS_common.cfg +index a9c0d41..9465569 100644 +--- a/links_fw/src/rtos/bios_app_common/tda2xx/cfg/BIOS_common.cfg ++++ b/links_fw/src/rtos/bios_app_common/tda2xx/cfg/BIOS_common.cfg +@@ -151,6 +151,10 @@ if (enableProfiling == "yes") + var UIAMetaData = xdc.useModule('ti.uia.runtime.UIAMetaData'); + UIAMetaData.overrideTimestampFreq = true; + UIAMetaData.timestampFreq.lo = 20000000; ++ var UIAProfile = xdc.useModule('ti.uia.events.UIAProfile'); ++ UIAProfile.runtimeControl = true; ++ UIAProfile.enable = false; ++ + } + else + { + Thanks and Regards, Piyali + +Hi, thank you for answer. I followed instrunction, projecte was compiled. But when I add Context Aware Profiling in EVE .c file (from Sstem Analyzer User's Guide 4.15.3): #include "xdc/runtime/Log.h" #include "ti/uia/events/UIAProfile.h" .... void functionEntryHook( void (*addr)()) { Log_write2(UIAProfile_enterFunctionAdrs, (IArg)0, (IArg)addr); } void functionExitHook( void (*addr)()) { Log_write2(UIAProfile_exitFunctionAdrs, (IArg)0, (IArg)addr); } I get the same error: Undefined referance symbols: ti_uia_events_UIAProfile_enterFunctionAdrs__C ti_uia_events_UIAProfile_exitFunctionAdrs__C + +Hi Can you please share the full list of changes you have made? Thanks and Regards, Piyali + +Hi, changes In cfg.mk ENABLE_UIA_PROFILING=yes in BIOS_common.cfg if (enableProfiling == "yes") { BIOS.logsEnabled = true; var LoggingSetup = xdc.useModule('ti.uia.sysbios.LoggingSetup'); LoggingSetup.sysbiosSwiLogging = true; LoggingSetup.sysbiosHwiLogging = true; LoggingSetup.sysbiosSemaphoreLogging = true; LoggingSetup.loadLogging = true; LoggingSetup.benchmarkLogging = true; LoggingSetup.mainLoggingRuntimeControl = true; LoggingSetup.loadTaskLogging = true; LoggingSetup.loadSwiLogging = true; LoggingSetup.loadHwiLogging = true; LoggingSetup.loadLoggerSize = 262144; LoggingSetup.sysbiosLoggerSize = 524288; LoggingSetup.mainLoggerSize = 262144; LoggingSetup.enableContextAwareFunctionProfiler = true; //added var UIAMetaData = xdc.useModule('ti.uia.runtime.UIAMetaData'); UIAMetaData.overrideTimestampFreq = true; UIAMetaData.timestampFreq.lo = 20000000; var UIAProfile = xdc.useModule('ti.uia.events.UIAProfile'); UIAProfile.runtimeControl = true; UIAProfile.enable = true; var Loger = xdc.useModule('xdc.runtime.Log'); } In arp_32.mk ifeq ($(ENABLE_UIA_PROFILING), yes) CFLAGS_INTERNAL += --entry_hook=ti_uia_events_UIAProfile_functionEntryHook --entry_parm=name --exit_hook=ti_uia_events_UIAProfile_functionExitHook --exit_parm=name endif In .c file #include "xdc/runtime/Log.h" #include "ti/uia/events/UIAProfile.h" .... void functionEntryHook( void (*addr)()) { Log_write2(UIAProfile_enterFunctionAdrs, (IArg)0, (IArg)addr); } void functionExitHook( void (*addr)()) { Log_write2(UIAProfile_exitFunctionAdrs, (IArg)0, (IArg)addr); } Elso I try use ti_uia_events_UIAProfile_functionEntryHook(const char*) and ti_uia_events_UIAProfile_functionExitHook(const char*), but compiler cant find symbols in .oearp32F: ti_uia_events_UIAProfile_functionEntryHook ti_uia_events_UIAProfile_functionExitHook What library should I add to define the functions? Thank you for help + +Danil, When you changed the ENABLE_UIA_PROFILING did you perform a "make -s depend" and then "make -s". Can you please try a clean build by first deleting the binaries and then performing the build? The two ti_uia_events_UIAProfile_functionEntryHook ti_uia_events_UIAProfile_functionExitHook are generated by the XDC configuro. So you should see the symbols in vision_sdk\binaries\apps\tda2xx_cascade_bios_radar\obj\vision_sdk\tda2xx-evm\arp32_1\release\vision_sdk_configuro\package\cfg\MAIN_APP_eve1_pearp32F.c Thanks and Regards, Piyali + +Piyali, Yes, I do gmake clean, gmake -s -j depend, gmake -s -j. I can't find two ti_uia_events_UIAProfile_functionEntryHook ti_uia_events_UIAProfile_functionExitHook in MAIN_APP_eve1_pearp32F.c. But I find some UIA functions like ti_uia_events_UIAErr_Module__startupDone__S + +Piyali, Could be any problems, if i use xdctools_3_32_01_22_core? + +Hi Piyali, I changed BIOS_common.cfg for wrong platform, your variant is compiled correctly, thank you for help! + diff --git a/data2/text/range/5001-10000/740212.txt b/data2/text/range/5001-10000/740212.txt new file mode 100644 index 0000000000000000000000000000000000000000..02105680a9628ed502a13e12b82fcd7400025817 --- /dev/null +++ b/data2/text/range/5001-10000/740212.txt @@ -0,0 +1,26 @@ +Ticket Name: Linux/TDA2: [VISION SDK] Running a TIDL usecase in LINUX+BIOS mode. + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi Shiju, OK, I solved last problem, but since next one is still related to TIDL uc I'll continue to write here? I'll add Modified Null Src as attachment. Problem that appears now is that the UC usually does not write correct data to the SD card. It always writes correct amount of data to the card, but just sometimes correct data are written ... Usually it writes all null(creates empty output) and once in 20 times output is as expected... When we tryed to debug it using printf-s (Vps_printf ) the output has changed .... Now there is not empty file with some trash data, but also correct output appears sometimes. I am not really shore where to lock for problems - is it some timing or it could be memory related somehow ... or something else? On rtos UC there is init of OCMC in static Void tidlInit(chains tidlApp *pObj) function /* Init all the 3 instances of the OCMC */ Utils_cbufOcmcInit(UTILS_OCMC_RAM1); #if defined(TDA2XX_BUILD) || defined(TDA2PX_BUILD) Utils_cbufOcmcInit(UTILS_OCMC_RAM2); Utils_cbufOcmcInit(UTILS_OCMC_RAM3); #endif Since UC runs on hlos, this part of the code I have placed in tidl_preproc alg plugin (not shore could this part make some problems or not) Any suggestion you can give me is valuable. Tnx in advance, Nebojsa + +Responses: +Hi Markovic I guess you have many 2 issues <1> related to SD card data write. I guess you does this on A15 Linux. I suspect Cache coherency issues here, try with proper cache APIs like OSA_cacheInv() and OSA_cacheWb() <2> OCMC initlization Moving this to any IPU side code would be fine, but make sure this get executed in create phase Regards, Shiju + +Hi, regarding TIDL on Linux, I would like to ask some additional questions. Network parameters are read from input file on A15 core and pointers to buffers with those parameters are stored in Network structure. However, when this structure is used on DSP core, it appear that some of those pointers are set to 0. It is not same pointer every time but with every execution it could be any pointer. If someone knows what could be causing this, I would be thankful. Regards, Sasa + +Sasa On Linux side you will usually get the virtual address/pointers, you need to get the physical address of the same to pass to DSP as all Bios cores need physical address/pointers. VSDK has the API available to obtain physical address from virtual pointers regards, Shiju + +Hi Shiju, as far as I can see, IPC_Out link will do that, because it follows NullSource link on A15. Am I correct? Regards, Sasa + +Hi Sasa only the video buffers (data path) is connected via IPC links, any other create/run time parameters are passed via IPC MSGQs and any element(pointers) inside these structures are not translated regards, Shiju + +Hi Shiju, Pointers which are problem for me are already in shared memory region. I have to retrieve virtual address of neural network structure to assign those pointers. Something like this: unsigned int virt_addr; virt_addr = OSA_memPhys2Virt((unsigned int)net, OSA_MEM_REGION_TYPE_AUTO); net = (sTIDL_Network_t*)virt_addr; Then, when allocating memory I have something likethis: sTIDL_ConvParams_t *conv2dPrms = &net->TIDLLayers[i].layerParams.convParams; conv2dPrms->weights.bufSize = \ net->weightsElementSize * (conv2dPrms->kernelW * conv2dPrms->kernelH *\ conv2dPrms->numInChannels * conv2dPrms->numOutChannels)/conv2dPrms->numGroups; conv2dPrms->weights.ptr = ChainsCommon_Osal_memAlloc(conv2dPrms->weights.bufSize, 32); And then when reading, I have this: ChainsCommon_Osal_fileRead( fp, (UInt8*)ChainsCommon_Osal_getVirtAddr((UInt32)conv2dPrms->weights.ptr), dataSize, &readSize); UTILS_assert(readSize == dataSize); This structure is available to DSP and only pointers for several layers are reset to 0 and it isn't same pointer every execution. In first run it can be layer 2, then in next run layer 7, after that some other layer and so on. Can you spot any problem from this above? Regards, Sasa + +Hi Sasa I guess you have use OSA_memVirt2Phys () to get the physical address of each and every virtual pointer you get on A15 Linux, which you want to pass to DSP. on A15 side all the pointers to get are by default virtual pointers, when you pass those to DSP or IPU, just get the physical pointer and pass. This physical pointer would works on DSP/IPU Bios. If things are correct occasionally, then cache coherency could be another suspect. regards, Shiju + +Hi Shiju, I use OSA_memPhys2Virt() to get virtual address from physical as createParams memory is allocated dynamically. Inside those createParams is net structure which represents neural network. After filling net structure with values, function OSA_memCacheWb is called with net as it's argument. On DSP, this sturcture is invalidated. Is this procedure enough to make cache coherency or something more can be done? Regards, Sasa + +Hi Sasa Your cache API sequence are correct. I am a bit confused WRT your address translations, on A15 side why do you use OSA_memPhys2Virt()? on A15 Linux side all your address are already Virtual pointers. I guess you only need Virtual to physical conversion to pass Physical pointers to DSP. DSP can only work with Physical pointers FYI, we are planning to port TIDL OD usecase to A15 Linux in our next release regards, Shiju + +Hi Shiju, problem is solved. Cache writeback had to be done over one structure for usecase to work correct. Thank you for your effort. Best regards, Sasa + diff --git a/data2/text/range/5001-10000/741713.txt b/data2/text/range/5001-10000/741713.txt new file mode 100644 index 0000000000000000000000000000000000000000..df23daca2430f8055f7a475c3014b0fea71b9f93 --- /dev/null +++ b/data2/text/range/5001-10000/741713.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: Communication between threads + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, Run the following two threads at the same time 1. Capture -> Alg_FrameCopy (A15) -> Display_Video 2. DCAN model "D:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\src\rtos\modules\dcan" I want to superimpose the radar data collected by DCAN in this link(Alg_FrameCopy (A15). How to get data received from DCAN to Alg_FrameCopy? Thanks! + +Responses: +Hi Yuling Ma, Once the Can message is received, you could issue a system command to the FrameCopy link. Please note that this would should be a custom command update FrameCopyLink will have to be updated to service this command. (System_linkControl()) You could refer "GRPX_SRC_LINK_CMD_PRINT_STRING" for implementing a system command. Regards, Sujith System_linkControl + +Hi， Thank you very much for your reply. I still have a question: I am using the DCAN port to receive CAN data from other boards. After receiving a few hundred frames, I will enter an infinite waiting program. Changed some initialization parameters： #define SYSTEM_DCAN_TX_PRD_MS (40)//10000//50 #define SYSTEM_DCAN_TX_TSK_PRI 15//(13) #define SYSTEM_DCAN_RX_TSK_PRI 15//(13) // TDA2XX RVP uses interrupt ID 28 for VIP2 #if defined (BOARD_TYPE_TDA2XX_RVP) #define SYSTEM_DCAN_INTR_ID (24) #else #define SYSTEM_DCAN_INTR_ID 77//(28) #endif /** \brief DCAN input clock - 20MHz */ #define SYSTEM_DCAN_INPUT_CLK (20000000U) /** \brief DCAN output bit rate - 1MHz */ //#define SYSTEM_DCAN_BIT_RATE (1000000U) #define SYSTEM_DCAN_BIT_RATE (500000U) /** \brief Used for enabling board-to-board DCAN */ #define ENABLE_B2B_DCAN_TEST (1U) Printed as follows(The speed of DCAN transmission is fps = 500/s)： 47.329866 s: DCAN MSG Received:Id [IPU1-1] 47.329927 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.330110 s: ## 3 ## [IPU1-1] 47.330140 s: ## 4 ## [IPU1-1] 47.330476 s: ## 5 ## [IPU1-1] 47.330537 s: ## 6 ## [IPU1-1] 47.330628 s: ## 7 ## [IPU1-1] 47.331879 s: ## 1 ## [IPU1-1] 47.331940 s: ## 2 ## [IPU1-1] 47.331970 s: DCAN MSG Received:Id [IPU1-1] 47.332031 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.332214 s: ## 3 ## [IPU1-1] 47.332275 s: ## 4 ## [IPU1-1] 47.332611 s: ## 5 ## [IPU1-1] 47.332672 s: ## 6 ## [IPU1-1] 47.332733 s: ## 7 ## [IPU1-1] 47.333770 s: ## 1 ## [IPU1-1] 47.333831 s: ## 2 ## [IPU1-1] 47.333892 s: DCAN MSG Received:Id [IPU1-1] 47.333953 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.334136 s: ## 3 ## [IPU1-1] 47.334167 s: ## 4 ## [IPU1-1] 47.334502 s: ## 5 ## [IPU1-1] 47.334563 s: ## 6 ## [IPU1-1] 47.334655 s: ## 7 ## [IPU1-1] 47.335814 s: ## 1 ## [IPU1-1] 47.335875 s: ## 2 ## [IPU1-1] 47.335936 s: DCAN MSG Received:Id [IPU1-1] 47.335966 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.336180 s: ## 3 ## [IPU1-1] 47.336210 s: ## 4 ## [IPU1-1] 47.336546 s: ## 5 ## [IPU1-1] 47.336607 s: ## 6 ## [IPU1-1] 47.336668 s: ## 7 ## [IPU1-1] 47.337796 s: ## 1 ## [IPU1-1] 47.337857 s: ## 2 ## [IPU1-1] 47.337888 s: DCAN MSG Received:Id [IPU1-1] 47.337949 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.338132 s: ## 3 ## [IPU1-1] 47.338193 s: ## 4 ## [IPU1-1] 47.338528 s: ## 5 ## [IPU1-1] 47.338589 s: ## 6 ## [IPU1-1] 47.338681 s: ## 7 ## [IPU1-1] 47.339809 s: ## 1 ## [IPU1-1] 47.339870 s: ## 2 ## [IPU1-1] 47.339931 s: DCAN MSG Received:Id [IPU1-1] 47.339992 s: DCAN MSG Received:Id[0xC1] , Length : [8], Data [0 .. 7]0x00, 0x56, 0x34, 0x03, 0x04, 0x05, 0x06, 0x07 [IPU1-1] 47.340175 s: ## 3 ## [IPU1-1] 47.340206 s: ## 4 ## [IPU1-1] 47.340572 s: ## 5 ## [IPU1-1] 47.340633 s: ## 6 ## [IPU1-1] 47.340694 s: ## 7 ## [IPU1-1] 47.341761 s: ## 1 ## [IPU1-1] 47.341822 s: ## 2 ## [IPU1-1] 47.341853 s: DCAN MSG Received:Id [IPU1-1] 47.342066 s: ## 3 ## [IPU1-1] 47.342097 s: ## 4 ## [IPU1-1] 47.342493 s: ## 5 ## [IPU1-1] 47.345787 s: ## 1 ## [IPU1-1] 47.348410 s: ## 5 ## [IPU1-1] 47.351826 s: ## 1 ## [IPU1-1] 47.354572 s: ## 5 ## [IPU1-1] 47.357835 s: ## 1 ## [IPU1-1] 47.360580 s: ## 7 ## [IPU1-1] 47.363813 s: ## 1 ## [IPU1-1] 47.363905 s: ## 2 ## [IPU1-1] 47.363935 s: DCAN MSG Received:Id [IPU1-1] 47.364149 s: ## 3 ## [IPU1-1] 47.364179 s: ## 4 ## [IPU1-1] 47.377844 s: ## 1 ## [IPU1-1] 47.379826 s: ## 1 ## [IPU1-1] 47.382114 s: ## 4 ## [IPU1-1] 47.385835 s: ## 1 ## [IPU1-1] 47.388458 s: ## 5 ## [IPU1-1] 47.391813 s: ## 1 ## [IPU1-1] 47.394497 s: ## 5 ## [IPU1-1] 47.397822 s: ## 1 ## [IPU1-1] 47.400567 s: ## 6 ## [IPU1-1] 47.400628 s: ## 7 ## [IPU1-1] 47.401848 s: ## 1 ## [IPU1-1] 47.401909 s: ## 2 ## [IPU1-1] 47.401939 s: DCAN MSG Received:Id [IPU1-1] 47.414506 s: ## 5 ## [IPU1-1] 47.415939 s: ## 2 ## [IPU1-1] 47.419904 s: ## 1 ## [IPU1-1] 47.422100 s: ## 3 ## [IPU1-1] 47.425852 s: ## 1 ## [IPU1-1] 47.428506 s: ## 5 ## [IPU1-1] 47.431891 s: ## 1 ## [IPU1-1] 47.434514 s: ## 5 ## [IPU1-1] 47.437808 s: ## 1 ## [IPU1-1] 47.437869 s: ## 2 ## [IPU1-1] 47.437900 s: DCAN MSG Received:Id [IPU1-1] 47.438113 s: ## 3 ## [IPU1-1] 47.451900 s: ## 1 ## [IPU1-1] 47.453821 s: ## 1 ## [IPU1-1] 47.455926 s: DCAN MSG Received:Id [IPU1-1] 47.459891 s: ## 1 ## [IPU1-1] 47.462056 s: ## 3 ## [IPU1-1] 47.465869 s: ## 1 ## [IPU1-1] 47.468126 s: ## 3 ## [IPU1-1] 47.471908 s: ## 1 ## [IPU1-1] 47.474501 s: ## 5 ## [IPU1-1] 47.474592 s: ## 6 ## [IPU1-1] 47.474653 s: ## 7 ## [IPU1-1] 47.475904 s: ## 1 ## [IPU1-1] 47.475934 s: ## 2 ## [IPU1-1] 47.488501 s: ## 5 ## [IPU1-1] 47.489873 s: ## 1 ## [IPU1-1] 47.493838 s: ## 1 ## [IPU1-1] 47.495851 s: ## 1 ## [IPU1-1] 47.499847 s: ## 1 ## [IPU1-1] 47.502104 s: ## 3 ## [IPU1-1] 47.505856 s: ## 1 ## [IPU1-1] 47.508143 s: ## 3 ## [IPU1-1] 47.508204 s: ## 4 ## [IPU1-1] 47.511925 s: ## 1 ## [IPU1-1] 47.511986 s: ## 2 ## [IPU1-1] 47.512017 s: DCAN MSG Received:Id [IPU1-1] 47.512230 s: ## 3 ## [IPU1-1] 47.525864 s: ## 1 ## [IPU1-1] 47.526627 s: ## 7 ## [IPU1-1] 47.529860 s: ## 1 ## [IPU1-1] 47.533794 s: ## 1 ## [IPU1-1] 47.535838 s: ## 1 ## [IPU1-1] 47.539864 s: ## 1 ## [IPU1-1] 47.541877 s: ## 2 ## [IPU1-1] 47.545842 s: ## 1 ## [IPU1-1] 47.548069 s: ## 3 ## [IPU1-1] 47.548130 s: ## 4 ## [IPU1-1] 47.548496 s: ## 5 ## [IPU1-1] 47.548557 s: ## 6 ## [IPU1-1] 47.548648 s: ## 7 ## [IPU1-1] 47.561947 s: DCAN MSG Received:Id [IPU1-1] 47.563929 s: ## 1 ## [IPU1-1] 47.567894 s: ## 1 ## [IPU1-1] 47.569877 s: ## 1 ## [IPU1-1] 47.573872 s: ## 1 ## [IPU1-1] 47.575916 s: ## 1 ## [IPU1-1] 47.579912 s: ## 1 ## [IPU1-1] 47.581803 s: ## 1 ## [IPU1-1] 47.585859 s: ## 1 ## [IPU1-1] 47.585920 s: ## 2 ## [IPU1-1] 47.585981 s: DCAN MSG Received:Id [IPU1-1] 47.586164 s: ## 3 ## [IPU1-1] 47.586225 s: ## 4 ## [IPU1-1] 47.599829 s: ## 1 ## [IPU1-1] 47.600530 s: ## 5 ## [IPU1-1] 47.603855 s: ## 1 ## [IPU1-1] 47.606569 s: ## 7 ## [IPU1-1] 47.609833 s: ## 1 ## [IPU1-1] 47.612609 s: ## 7 ## [IPU1-1] 47.615842 s: ## 1 ## [IPU1-1] 47.619837 s: ## 1 ## [IPU1-1] 47.621881 s: ## 1 ## [IPU1-1] 47.621942 s: ## 2 ## [IPU1-1] 47.622003 s: DCAN MSG Received:Id [IPU1-1] 47.622186 s: ## 3 ## [IPU1-1] 47.635881 s: ## 1 ## [IPU1-1] 47.637955 s: ## 1 ## [IPU1-1] 47.640486 s: ## 5 ## [IPU1-1] 47.643872 s: ## 1 ## [IPU1-1] 47.646495 s: ## 5 ## [IPU1-1] 47.649789 s: ## 1 ## [IPU1-1] 47.653785 s: ## 1 ## [IPU1-1] 47.655859 s: ## 1 ## [IPU1-1] 47.655920 s: ## 2 ## [IPU1-1] 47.659854 s: ## 1 ## [IPU1-1] 47.659915 s: ## 2 ## [IPU1-1] 47.659976 s: DCAN MSG Received:Id [IPU1-1] 47.660159 s: ## 3 ## [IPU1-1] 47.672787 s: ## 1 ## [IPU1-1] 47.674800 s: ## 1 ## [IPU1-1] 47.677392 s: ## 5 ## [IPU1-1] 47.680778 s: ## 1 ## [IPU1-1] 47.683492 s: ## 5 ## [IPU1-1] 47.686787 s: ## 1 ## [IPU1-1] 47.689532 s: ## 6 ## [IPU1-1] 47.692795 s: ## 1 ## [IPU1-1] 47.692856 s: ## 2 ## [IPU1-1] 47.696852 s: ## 1 ## [IPU1-1] 47.696943 s: ## 2 ## [IPU1-1] 47.696974 s: DCAN MSG Received:Id [IPU1-1] 47.697157 s: ## 3 ## [IPU1-1] 47.710882 s: No longer print any information, I guess it is entering infinite waiting. Execute the code below： static Void Utils_dcanRxProcessMailbox(dcanRxMsgObj_t * dcanRxMsg, UInt postedEvents) { Int i; dcanMsg_t *rxMsg = NULL; struct dcanQueMsgs_s * queMsg = NULL; for (i = 0; i < UTILS_ARRAYSIZE(dcanRxMbxId) ; i++) { //Vps_printf("for (i = 0; i < UTILS_ARRAYSIZE(dcanRxMbxId)"); if (postedEvents & (0x1U << i)) { //Vps_printf("if (postedEvents & (0x1U << i))"); while (Utils_queGetQueuedCount(&dcanRxMsg->rxMsgQ[i].handle)) { //Vps_printf("while (Utils_queGetQueuedCount(&dcanRxMsg->rxMsgQ[i].handle))"); Utils_dcanQueGet(&dcanRxMsg->rxMsgQ[i].handle, &queMsg, &rxMsg, DCAN_MSG_STATE_IN_RX_QUE, DCAN_MSG_STATE_MSG_RX); Vps_printf("## 1 ##"); dcanRxMsg->state = DCAN_RX_TSK_STATE_RXMSGCALLBACK; Vps_printf("## 2 ##"); Utils_dcanRxMsgProcess(rxMsg); //Utils_dcanRxMsgSave(rxMsg); Vps_printf("## 3 ##"); dcanRxMsg->state = DCAN_RX_TSK_STATE_RXACK; Vps_printf("## 4 ##"); Utils_dcanRxSendAckMsg(rxMsg); Vps_printf("## 5 ##"); Utils_dcanQuePut(&dcanRxMsg->freeQ.handle, queMsg, DCAN_MSG_STATE_IN_FREEQ); Vps_printf("## 6 ##"); Utils_dcanConfigRxMsgObj(dcanRxMbxId[i]); Vps_printf("## 7 ##"); } } } } thanks! Mary + +Hi Mary, Sorry, i lost this thread. Is this issue resolved? Regards, Sujith + +Hi， Yes，I already solved this！ Thanks，again！ + diff --git a/data2/text/range/5001-10000/744428.txt b/data2/text/range/5001-10000/744428.txt new file mode 100644 index 0000000000000000000000000000000000000000..20c4f40c1677427e1b8d671ff0a1376f6dddea57 --- /dev/null +++ b/data2/text/range/5001-10000/744428.txt @@ -0,0 +1,28 @@ +Ticket Name: TDA2: EVE DMA halts on release build, but works on debug build. + +Query Text: +Part Number: TDA2 Dears, In EVE startware there is an EDMA utility function called EDMA_UTILS_memcpy2D() and our program uses DMA_UTILS_memcpy2D() to perform DMA between DDR memory and EVE's internal RAM (IBUFA, IBUFB, and WBUF). When we run our debug-built program, EDMA_UTILS_memcpy2D() works smoothly. Buf if we run our release-built program, EDMA_UTILS_memcpy2D() blocks at the point of the following function call. QDMA_WAIT(gEdmaCc , waitWord); We trace into the function QDMA_WAIT() and find out the program can't escape from the following while-loop: while ((edmaCc->IPR & (wait_word)) != (wait_word)) {} It seems that EDMA is never triggered and edmaCc->IPR will be always 0x0 in our release-built program. (The value of wait_word is 0x00008000 and edmaCc->IPR will become 0x00008000 when running our debug-build) Supposely EDMA_UTILS_memcpy2D() is a stand alone utility function and it doesn't need any initialization and can be called from anywhere. Why DMA doesn't work in our release-built case? Are there any EDMA control registers which can provide more information about what happens after calling EDMA_UTILS_memcpy2D()? Mark Kang. + +Responses: +Hi Mark, That's indeed quiet odd that the release version doesn't work. Can you verify if the transfer happened ? Did any value get written into the memory ? regards, Victor + +Hi victor, There is no any value written into the memory after triggering DMA in our release-build. Here is our test code snippet: dst = 0x40041000; // 0x4004_1000 is WBUF of EVE KK_dst_ptr = dst; // KK_dst_ptr is global variable memset(dst, 0x0, 8); EDMA_UTILS_memcpy2D(dst, src, width, height, dstStride, srcStride); EDMA_UTILS_memcpy2D() will call QDMA_WAIT() finally, and we modify the function QDMA_WAIT() as the following void QDMA_WAIT(CSL_EdmaccRegsOvly edmaCc , uint32_t wait_word) { unsigned int cnt = 0; while ((edmaCc->IPR & (wait_word)) != (wait_word)) { cnt++; if (16777216 == cnt) { Vps_printf("in-while-loop: CCERR = 0x%08x, EEVAL = 0x%08x, CCSTAT = 0x%08x \r\n", edmaCc->CCERR, edmaCc->EEVAL, edmaCc->CCSTAT); Vps_printf("KK_dst_ptr[] = [0x%02x, 0x%02x, 0x%02x, 0x%02x], [0x%02x, 0x%02x, 0x%02x, 0x%02x] \r\n", KK_dst_ptr[0], KK_dst_ptr[1], KK_dst_ptr[2], KK_dst_ptr[3], KK_dst_ptr[4], KK_dst_ptr[5], KK_dst_ptr[6], KK_dst_ptr[7]); cnt = 0; } } Vps_printf("leave while-loop: CCERR = 0x%08x, EEVAL = 0x%08x, CCSTAT = 0x%08x \r\n", edmaCc->CCERR, edmaCc->EEVAL, edmaCc->CCSTAT); Vps_printf("KK_dst_ptr[] = [0x%02x, 0x%02x, 0x%02x, 0x%02x], [0x%02x, 0x%02x, 0x%02x, 0x%02x] \r\n", KK_dst_ptr[0], KK_dst_ptr[1], KK_dst_ptr[2], KK_dst_ptr[3], KK_dst_ptr[4], KK_dst_ptr[5], KK_dst_ptr[6], KK_dst_ptr[7]); edmaCc->ICR = wait_word; // to clear corresponding bits in IPR register by writing 1 on the same bit of ICR register } Here is the test output: [EVE1 ] 45.124900 s: leave while-loop: CCERR = 0x00000000, EEVAL = 0x00000000, CCSTAT = 0x00000000 [EVE1 ] 45.126303 s: KK_dst_ptr[] = [0x16, 0x0a, 0x15, 0x0b], [0x16, 0x0b, 0x15, 0x0a] [EVE1 ] 16.828188 s: in while-loop: CCERR = 0x00000000, EEVAL = 0x00000000, CCSTAT = 0x00000110 [EVE1 ] 16.829561 s: KK_dst_ptr[] = [0x00, 0x00, 0x00, 0x00], [0x00, 0x00, 0x00, 0x00] [EVE1 ] 17.986671 s: in while-loop: CCERR = 0x00000000, EEVAL = 0x00000000, CCSTAT = 0x00000110 [EVE1 ] 17.988348 s: KK_dst_ptr[] = [0x00, 0x00, 0x00, 0x00], [0x00, 0x00, 0x00, 0x00] [EVE1 ] 19.145031 s: in while-loop: CCERR = 0x00000000, EEVAL = 0x00000000, CCSTAT = 0x00000110 [EVE1 ] 19.146403 s: KK_dst_ptr[] = [0x00, 0x00, 0x00, 0x00], [0x00, 0x00, 0x00, 0x00] ...... (in while-loop forever) ..... Mark Kang. + +Hi Mark, Can you call these functions at initialization time: EDMA_UTILS_globalReset(); VCOP_SET_MEM_VIEW (ALIAS_128K_VIEW); VCOP_BUF_SWITCH_SET (WBUF_SYST, IBUFHB_SYST, IBUFLB_SYST, IBUFHA_SYST, IBUFLA_SYST); Also we have example code that exercises EDMA and EVE in a more efficient manner in the folder apps/apps_nonbam of the EVE software release. We use EDMA_UTILS_autoIncrement functions instead of EDMA_AUTILS_memcpy2D(). For more details, you can refer to the following e2e thread, which has a presentation attached: e2e.ti.com/.../734522 regards, Victor + +Hi Victor, I use the following code in release-build and EDMA_UTILS_memcpy2D still blocks. Nothing changed. EDMA_UTILS_globalReset(); VCOP_SET_MEM_VIEW(FLAT_MEM_VIEW); VCOP_BUF_SWITCH_SET(WBUF_SYST, IBUFHB_SYST, IBUFLB_SYST, IBUFHA_SYST, IBUFLA_SYST); dst = 0x40041000; // 0x4004_1000 is WBUF of EVE EDMA_UTILS_memcpy2D(dst, src, width, line_cnt, width, line_pitch); We know EDMA_UTILS_autoIncrement() have more efficient way than EDMA_UTILS_memcpy2D() to trigger EVE DMA and we already use TIDL which calls EDMA_UTILS_autoIncrement(). But still, in our release-build program EDMA_UTILS_autoIncrement() doesn't work, either. Mark Kang. + +Hi Mark, I am sorry that it still doesn't work. Would you be able to share your code so we can reproduce the issue here ? regards, Victor + +Hi Mark, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +Hi Victor, It's difficult to provide the simple test code to reproduce this issue because it involves entire our modified vision_sdk environment, so we change the way to find out the root cause. Since debug-built runs OK but release-built fails, we try to link some debug-built libraries in firmware release-built to identify which release-built library causes this issue. Currently we identify that only one release-build library, named arp32_1\release\vision_sdk_lib.aearp32F , causes release-built firmware fail to run EVE DMA. Furthermore, we hope to identify which release-built object code cause EVE DMA failed. Thus we may find out the root cause. Mark. + +Hi Victor, After narrowing down this issue, we find out what's different between debug-built and release-built and it involves 2 undocumented EVE DMA TC registers whose addresses are (0x40086000 + 0x10) and (0x40087000 + 0x10). In vision_sdk\src\utils_common\src\utils_idle_arp32.c, there are 2 suspicious functions causing our EVE DMA failed. We list those two functions below: Void Utils_idleEnableEveDMA(void) { #ifdef CPU_IDLE_ENABLED /* Enable DMA before ALG Process. Put the TPTC to * Smart Standby and Smart Idle */ HW_WR_REG32(0x40086000 + 0x10, 0x28); HW_WR_REG32(0x40087000 + 0x10, 0x28); #endif } Void Utils_idleDisableEveDMA(void) { #ifdef CPU_IDLE_ENABLED /* If the DMA is freed then disable the DMA by setting * Force standby and Force Idle. Check the CCSTAT register to check if any * events are queued in the Transfer controllers. */ UInt32 regVal = HW_RD_REG32(0x400A0640) & 0xFFFF0000U; if (0U == regVal) { HW_WR_REG32(0x40086000 + 0x10, 0); HW_WR_REG32(0x40087000 + 0x10, 0); } #endif } We find out that "CPU_IDLE_ENABLED" is defined in release-built and is not defined in debug-built (in file vision_sdk/Rules.make). When we add "#undef CPU_IDLE_ENABLED" in the beginning of file vision_sdk\src\utils_common\src\utils_idle_arp32.c and re-built it, our EVE DMA works in release-built. Since it involves Vision SDK, we want to know why it causes EVE DMA failed in release-built. Mark. + +Hi Mark, Can you please confirm the value of 0x40086000 + 0x10 and 0x40087000 + 0x10 when your application is hanging? These 2 registers are used to program the EDMA TCs to go into IDLE and standby to allow the EVE to go into a power saving clock gated state. The idea is every time you start the processing on the EVE, you would need to enable the TCs and then disable the TCs after processing to allow the EVE to go to low power mode. Thanks and Regards, Piyali + +Also, does your algorithm get called from AlgorithmLink_tskMain ? Thanks and Regards, Piyali + +Hi Piyali, When running our release-built and at the time that EVE DMA hanged, the content of register (0x40086000 + 0x10) and (0x40087000 + 0x10) are both 0x0. When running our debug-built and at the time that EVE DMA worked, the content of register (0x40086000 + 0x10) and (0x40087000 + 0x10) are both 0x28. This issue is fixed after our engineers reviewed all task related codes, especially on EVE related tasks. Mark. + diff --git a/data2/text/range/5001-10000/744775.txt b/data2/text/range/5001-10000/744775.txt new file mode 100644 index 0000000000000000000000000000000000000000..709d8e9beef717facd59e667318cc9eaf9692eb8 --- /dev/null +++ b/data2/text/range/5001-10000/744775.txt @@ -0,0 +1,52 @@ +Ticket Name: TDA2X / RTC 32.768 clock doesn't work + +Query Text: +Other Parts Discussed in Thread: TPS65917-Q1, TDA2 Dear Mr, or Miss, I meet a problem , When I used PMIC (TPS659039Q1) PO9039A387IZWSRQ1+ TDA2SXBTQABCRQ1 (BGA760) design , the pin of TDA2X AE14,AD14 ( EXTERNAL 32.768 oscillator) is woriking , it has the RTC clock. The rtc clock can be detected when powered up even without firmware in TF CARD. But ,the next HW version we use PMIC(TPS65917) O917A133TRGZRQ1 instead of tps659039. These RTC CLOCK pins doesn't work , there is no 32.768 clock. please suggest what's the possible problem? By the way, I found the RTC_OSC_REG is related the settign , but I am not sure that the tp659039 can set the enable Initialization , but the tps65917 can't set Initialization.?? thanks in advance! + +Responses: +Hi, Can you clarify which clock you are referring to? Is this the PMIC of processor clock? Here is our user guide that details how to connect the TPS65917-Q1 to the TDA2x processor: www.ti.com/.../slvuaj1 Thanks, Nastasha + +We have connnected three cristal oscillator osc 20MHz， osc1 22.5792Mhz， RTC 32.768. We designed the first version based on 516582H_VAYU_EVM_13NOV2015_H。 The second version just used TPS65917 instead of TPS659039, modified based on the TPS65917 user guide power supply。 The difference is that RTC clck 32.768 doesn't work We wang to find out the reason, or how can I debug the problem. + +Hi, Can you share the schematic of the PMIC? Thanks, Nastasha + + + +Hi, How are you supplying VIO_IN? Also why is VRTC connected to SMPS4 (is this from the LDOVRTC?)? Thanks, Nastasha + +Also, how are you turning on the PMIC? Are you using PWRON or POWERHOLD (GPIO_5)? Thanks, Nastasha + +1) VIO IN is connected to EVM_3V3 2) VRTC_OUT IS CONNECTED TO smp4(vdds1.8) basd on TPS65917 usrer guide. it's not from LDOVRTC. 3) GPIO_5 is push up to the PS_EVM_3V3 to turn on the pmic. + +Hi, Thanks for the clarification and diagrams. Can you share the full part number you are using (O917A1.....Q1)? Also, are you measuring at the SYNCCLKOUT pin? Thanks, Nastasha + +Hi, The full part number of TPS65917 sample is 0917A133TRGZRQ1, and , I also measured the SYNCCLKOUT PIN ,that frequency is 2.135Mhz square wave, but the pin is not connected to the TDA2X , it is floated. any suggestion to where need to be tested or information from us? thanks and best regards Richard + +Richard, Can you tell me where you are trying to measure the 32kHz clock? Thanks, Nastasha + +We tested the oscillator of 32.768 , e.g. the pins AE14,AD14 of TDA2x. it doesn't have the wave. There is the schematic pictuire in above email. Thanks! + +Hi, I don't see those pins being connected to the PMIC. I am looping in the processor team to help support. Thanks, Nastasha + +Hi， Nastasha， Any update information about the RTC 32.768 clock problem？ thanks！ + +Hi, I have re-notified the processor team to look at this. The response may be delayed with people out for the holidays, but we will have someone look into this question further. Thanks, Nastasha + +Richard, If there is no activity on the crystal connections, then likely there is a power issue. Have you confirmed all the voltage rails connected to SoC are powered and at correct voltage? Robert + +Hi, If power supplies are good, then else you can check if it is due to Errata i856 32k Oscillator Fails to Start-Up at POR. Shortly, 32-k oscillator will not start without software intervention due to a bug: "Startup of 32k depends on user software writing to RTCSS GZ bit and only RTCSS can use the 32k clock (after writing GZ bit to 0), all other FUNC_32K_CLK targets (e.g. timers, mmc and gpio de-bounce) can only use SYSCLK1. Full features of RTC mode are still functional after the 32k software enables the oscillator." Regards, Stan + +Hi @user4941012, We haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Yordan + +Hi Mr, I don't understand what's meaning. When we didn't insert TF card with firmware , Just power on , The first version HW can have the 32K clock internal with tps659039 pmic. Just ,the second version HW can't have with tps65919 pmic . If RTCSS GZ bit is writen by TP659039 OTP firmware?. If the tda2x ic has the bug , why the result is different between using TPS659039 an TPS65917? Sorry to ask again! + +Hi, I'm not sure. Can you check the silicon revision of TDA2 on both designs? Are they the same? Also, I may be missed, but does 32-k clock run with TF card inserted (and SBL loaded)? Regards, Stan + +Hi The sample versions of two version designs are the same. I am confirmed that the 32K-CLOCK runs up ,even no TF card inserted status. So , I am confused whether the TPS659039 and The TPS65917 have the different influence on TDA2X start. especilly on the 32K clock. thanks! + +Richard, Nastasha, Any update on this item? Is this issue resolved? Thanks. Robert + +Hi, Robert, This problem hasn't been resolved yet. I don't know which direction I can check ? Any suggestion ? and Did I express my problem clearly? Thanks! + +As previously mentioned, the TDA2x errata states the oscillator fails to start-up after release of power-on-reset input. I understand the oscillator runs in one of your test configurations, and doesn't start in the other test configuration. However - it cannot be counted on operate in either configuration, as stated in the errata. There are differences between the two PMICs and how they are connected to the TDA2x device. Specifically, the 039 PMIC has dedicated power resources for the RTC domain, while the 917 PMIC does not. Thus - how the TDA2x RTC resources are connected between the two designs should be different. This might cause the different measure behavior. But in both configurations,the 32K oscillator errata still remains. + diff --git a/data2/text/range/5001-10000/744840.txt b/data2/text/range/5001-10000/744840.txt new file mode 100644 index 0000000000000000000000000000000000000000..adb7ee5f7768a971a15dffec74e0e819bf4c02f3 --- /dev/null +++ b/data2/text/range/5001-10000/744840.txt @@ -0,0 +1,55 @@ +Ticket Name: RTOS/TDA2: TI-RTOS/XDC/TDA2: Timestamp not synchronized with multiple LoggerBuf + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: SYSBIOS Tool/software: TI-RTOS Hi Team, I am trying to enable Task and Semaphore event logging on the C66x DSP core of the TDA2x. I have added the following lines to my cfg file. /* set default diags mask */ +var Diags = xdc.useModule('xdc.runtime.Diags'); +var Task = xdc.useModule('ti.sysbios.knl.Task'); +Task.common$.diags_ENTRY = Diags.ALWAYS_ON; +Task.common$.diags_EXIT = Diags.ALWAYS_ON; +Task.common$.diags_LIFECYCLE = Diags.ALWAYS_ON; +Task.common$.diags_USER1 = Diags.ALWAYS_ON; +Task.common$.diags_USER2 = Diags.ALWAYS_ON; +Task.common$.diags_USER3 = Diags.ALWAYS_ON; +var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore'); +Semaphore.common$.diags_ENTRY = Diags.ALWAYS_ON; +Semaphore.common$.diags_EXIT = Diags.ALWAYS_ON; +Semaphore.common$.diags_LIFECYCLE = Diags.ALWAYS_ON; +Semaphore.common$.diags_USER1 = Diags.ALWAYS_ON; +Semaphore.common$.diags_USER2 = Diags.ALWAYS_ON; +Semaphore.common$.diags_USER3 = Diags.ALWAYS_ON; +/* override diags mask for selected modules */ +xdc.useModule('xdc.runtime.Main'); +Diags.setMaskMeta( + "xdc.runtime.Main", + Diags.ENTRY | Diags.EXIT | Diags.INFO, + Diags.RUNTIME_ON +); +var Registry = xdc.useModule('xdc.runtime.Registry'); +Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF; +Registry.common$.diags_EXIT = Diags.RUNTIME_OFF; +Registry.common$.diags_INFO = Diags.RUNTIME_OFF; +Registry.common$.diags_USER1 = Diags.RUNTIME_OFF; +/* create a logger instance */ +var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf'); +LoggerBuf.TimestampProxy = DMTimestampProvider; +var loggerBufP = new LoggerBuf.Params(); +loggerBufP.numEntries = 1024; /* 256 entries = 8 KB of memory */ +loggerBufP.bufType = LoggerBuf.BufType_CIRCULAR; +var appLogger = LoggerBuf.create(loggerBufP); +appLogger.instance.name = "TaskLogBuf"; +Task.common$.logger = appLogger; +var appLogger2 = LoggerBuf.create(loggerBufP); +appLogger2.instance.name = "SemLogBuf"; +Semaphore.common$.logger = appLogger2; + In the CCS ROV classic viewer I am able to see the contents of the TaskLogBuf and the SemLogBuf. However, the timestampRaw field in the output of these two buffers are not in sync. For example, the time stamp of the TaskLogBuf shows the timestampraw as starting from 1267096108 (as shown below) 57202 1267096108 ti.sysbios.knl.Task LD_ready: tsk: 0x87293264 func: 0x852335a0 57203 1267096150 ti.sysbios.knl.Task LM_switch: oldtsk: 0x872ca0c8 oldfunc: 0x85249720 57204 1267096192 ti.sysbios.knl.Task LD_block: tsk: 0x87293264 func: 0x852335a0 57206 1267096237 ti.sysbios.knl.Task LM_switch: oldtsk: 0x87293264 oldfunc: 0x852335a0 57207 1267116103 ti.sysbios.knl.Task LD_ready: tsk: 0x87293264 func: 0x852335a0 57208 1267116145 ti.sysbios.knl.Task LM_switch: oldtsk: 0x872ca0c8 oldfunc: 0x85249720 and the SemLogBuf shows a completely different time window: 16762 2548036642 ti.sysbios.knl.Semaphore LM_post: sem: 0x8726449c count: 1 6324 ti.sysbios.knl.Semaphore.LM_post 16763 2548616494 ti.sysbios.knl.Semaphore LM_post: sem: 0x87265ea0 count: 1 6324 ti.sysbios.knl.Semaphore.LM_post 16764 2548616560 ti.sysbios.knl.Semaphore LM_post: sem: 0x872644c0 count: 1 6324 ti.sysbios.knl.Semaphore.LM_post 16765 2548616581 ti.sysbios.knl.Semaphore LM_post: sem: 0x8726449c count: 1 6324 ti.sysbios.knl.Semaphore.LM_post 16766 2548636531 ti.sysbios.knl.Semaphore LM_post: sem: 0x87265090 count: 1 6324 ti.sysbios.knl.Semaphore.LM_post 16767 2548636609 ti.sysbios.knl.Semaphore LM_post: sem: 0x872644c0 count: 1 6324 ti.sysbios.knl.Semaphore.LM_post My goal is to have a single time base view of all the task and semaphore events. I am not using default because I have a lot of HWI, clock tick events which drown the task and semaphore events. However, if there is a way to either synchronize the loggerBuf timestamps or allow both logging to happen in the same buffer, kindly let me know. Thanks and Regards, Piyali + +Responses: +Hi Piyali, I have a few questions for you. 1. What version of SYS/BIOS/XDCtools are you using? 2. Can you try using the default timestamp provider? So basically just comment out LoggerBuf.TimestampProxy = DMTimestampProvider; in the .cfg file 3. Can you use the same logger instance for both Semaphores and Task? So loggerBufP.numEntries = 2048; /* 512 entries = 16 KB of memory */ +loggerBufP.bufType = LoggerBuf.BufType_CIRCULAR; +var appLogger = LoggerBuf.create(loggerBufP); +appLogger.instance.name = "TaskSemLogBuf"; +Task.common$.logger = appLogger; +Semaphore.common$.logger = appLogger; You can use the Diags_setMask to enable/disable logging at runtime. The granularity is very fine. Note, you need to have runtime support enable, so the places you use Diags.ALWAYS_ON, you'll need to use Diags.RUNTIME_ON or Diags.RUNTIME_OFF, depending on what initial state you want. Todd + +Hi Todd, I did some more experiments today and realized why I was seeing the time base for Semaphore and Tasks are off. The Semaphores are firing more often than the Tasks. When I set the buffer type to FIXED, then I start seeing the time bases to match. This works with 2 buffers. I dumped out the 2 buffers and then did a sort of the timestamp and I go the interleaved output I was looking for. When I redirect both to the same buffer, even then the logs are interleaved. 1109469844 ti.sysbios.knl.Task LD_ready: tsk: 0x872a3264 func: 0x852335a0 pri: 1 6615 ti.sysbios.knl.Task.LD_ready 1109469901 ti.sysbios.knl.Task <-- construct: @872a3264('System main') 5853 xdc.runtime.Log.L_construct -2027277724 -2026877459 1109470255 ti.sysbios.knl.Task LM_switch: oldtsk: 0x0 oldfunc: 0x0 newtsk: 0x872a3264 newfunc: 0x852335a0 6502 1109472700 ti.sysbios.knl.Semaphore <-- construct: @87283eb4('(null)') 5853 xdc.runtime.Log.L_construct -2027405644 0 1109475739 ti.sysbios.knl.Semaphore <-- construct: @87283ed8('(null)') 5853 xdc.runtime.Log.L_construct -2027405608 0 1109476546 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109476678 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109477311 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109477353 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109477941 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109477977 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109478559 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109478598 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109479174 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109479210 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109479780 ti.sysbios.knl.Semaphore LM_pend: sem: 0x87283ed8 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109479810 ti.sysbios.knl.Semaphore LM_post: sem: 0x87283ed8 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027405608 1109480728 ti.sysbios.knl.Semaphore <-- construct: @87283efc('(null)') 5853 xdc.runtime.Log.L_construct -2027405572 0 1109480797 ti.sysbios.knl.Semaphore <-- construct: @87283f20('(null)') 5853 xdc.runtime.Log.L_construct -2027405536 0 1109480878 ti.sysbios.knl.Semaphore <-- construct: @87283f44('(null)') 5853 xdc.runtime.Log.L_construct -2027405500 0 1109480944 ti.sysbios.knl.Semaphore <-- construct: @87283f68('(null)') 5853 xdc.runtime.Log.L_construct -2027405464 0 1109481166 ti.sysbios.knl.Semaphore LM_pend: sem: 0x872d8008 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109481274 ti.sysbios.knl.Semaphore LM_post: sem: 0x872d8008 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027061240 1109482477 ti.sysbios.knl.Semaphore LM_pend: sem: 0x872d8008 count: 1 timeout: -1 6354 ti.sysbios.knl.Semaphore.LM_pend 1109482558 ti.sysbios.knl.Semaphore LM_post: sem: 0x872d8008 count: 0 6324 ti.sysbios.knl.Semaphore.LM_post -2027061240 1109482672 ti.sysbios.knl.Task LD_ready: tsk: 0x872a32b8 func: 0x85227820 pri: 13 6615 ti.sysbios.knl.Task.LD_ready 1109482777 ti.sysbios.knl.Task LM_switch: oldtsk: 0x872a3264 oldfunc: 0x852335a0 newtsk: 0x872a32b8 newfunc: 0x85227820 6502 Thanks so much for the help and the debug directions! Thanks and Regards, Piyali + diff --git a/data2/text/range/5001-10000/745438.txt b/data2/text/range/5001-10000/745438.txt new file mode 100644 index 0000000000000000000000000000000000000000..ba9775de981013945a877b232b6e9c963cd6594d --- /dev/null +++ b/data2/text/range/5001-10000/745438.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2: Configuring First and Second Level MMU Tables + +Query Text: +Part Number: TDA2 Hello, We're working with the TDA2x and currently using starterware_01_05_xx_xx. We want to configure the two A15 MMUs to manage different sections of DDR with different rules. Our goal is to have both A15 cores run in parallel and use cache for their instructions but not use cache for data. Both A15 cores can access each other's data space and so we want to disable cache for data spaces so that all updates are made directly to DDR. We understand this is achievable through the use of MMU descriptor tables. If that's correct then we'd like to configure the MMU to place all instructions into one section of DDR and place all variables in other sections of DDR. We have examples available to us both in the latest PDK and older starterware examples but these examples only cover First-Level descriptor tables. Since these tables span a large range they don't provide the granularity to do what we need. Second-level descriptor tables seem to be what we need but we can't find any examples on how to program them using starterware or PDK functions. Can you provide any examples on how to achieve the following layout assignment for DDR? 0x8000.0000 - 0x85FF.FFFF - Instructions 1 for A15_0 0x8600.0000 - 0x86FF.FFFF - variable section 1 for A15_0 0x8700.0000 - 0x8AFF.FFFF - Instructions 2 for A15_1 0x8B00.0000 - 0x8FFF.FFFF - variable section 2 for A15_1 We're primarily working with starterware_01_05_xx_xx package and would prefer examples that use the functions available to that package. Any examples would be greatly appreciated. Thank you. + +Responses: +Hi, A15 has separate I-cache at L1 level (called L1P). L2 is a unified cache and there is L1D cache also. So you can enable only Instruction/Program Cache. Regards, Rishabh + +Hello Rishabh, Thank you for your reply. I'd like to run the software setup by you using the provided starteware_01_05_xx_xx MMU A15 example as a reference. In that example it immediately checks if cache is enabled and if not then it first invalidates all L1D and L1I space and then enables all cache types. So we would just need to change this to enable L1I instead? Example below. /* In case cache is disabled, invalidate and enable it */ if (CACHE_A15_TYPE_ALL != cacheEnabled) { CACHEA15InvalidateL1DAll(); CACHEA15InvalidateL1IAll(); CACHEA15Enable(CACHE_A15_TYPE_L1I); } In software we would then configure and enable MMU just like in the example with the difference being that we will not disable it until power-off. Is the code change above all we need to do to follow your suggestion to ensure the data is not cached and only a15 instruction is cached into L1D? When we ultimately run this example on two A15 cores at same time, what changes if any need to be made to the example software w.r.t cache/mmu? I believe it's just the MAIR Attr Index value should be 0-3 for one A15 core and 4-7 for the second A15 core. Is that correct or are there other field to modify as well? We also modify the example to include mailbox messages to synchronize accessing shared data in DDR between two A15s. Can you share the difference between L1I and L2I? I see there's also the option to enable All I-cache (CACHE_A15_TYPE_ALLI) but it groups L1I and L2I. It doesn't look to include any D-cache. Thank you. + +Hello Rishabh, We tried the above and only enabled CACHE_A15_TYPE_L1I. When doing that software takes as long to execute as when no cache is enabled. However enabling CACHE_A15_TYPE_ALLI, which per comments includes L1I and L2I, we see software execute as fast as when all I-cache and D-cache is enabled but we also see memory coherency issues. So it seems not just instructions are being cached. Is there anything else then that needs to be done when enabling I-cache only? Thank you. + +Hi, The statement "I believe it's just the MAIR Attr Index value should be 0-3 for one A15 core and 4-7 for the second A15 core" is not true. You don't need to do anything to L1D or L2 cache. I would suggest you to go through ARM documentation to understand A15 cache architecture. Regards, Rishabh + +Hello Rishabh, Thank you for your suggestion, I am trying to go through the A15 documentation but there's quite a lot of it. Any help narrowing down what to look for would be greatly appreciated. Regarding: "The statement "I believe it's just the MAIR Attr Index value should be 0-3 for one A15 core and 4-7 for the second A15 core" is not true." The intent was to use MAIR0 for one a15 core and MAIR1 for the other a15 core. If I misunderstood how to use the two Memory Attribute Indirection Registers could you provide an example of how to configure MMU on both A15 cores so that they work with the L1 I-cache? The starterware provided function (MMUA15Enable(&gMmuTable); ) seems to enable the single MPU_MMU so what if any coordination needs to occur between the two cores prior to one enabling the MPU_MMU? It didn't seem that both cores should run that enable function or do they need to? You mention not using L1D or L2. As I stated in my followup post, when only enabling L1I the software executes at about the same speed as when no cache is enabled. So am I missing any steps for enabling just L1I? I am using the following functions: // CACHEA15InvalidateL1DAll(); //// needed? have ran tests with and without, same results. CACHEA15InvalidateL1IAll(); CACHEA15Enable(CACHE_A15_TYPE_L1I); // Initialize MMU module MMUA15Init(); // Set MAIR to inner and outer cacheable MMUA15SetMAIR(&gMmuTable, MMU_A15_ATTR_INDEX_2, 0xFF); // Initialize descriptor attributes MMUA15InitDescAttrs(&gAttrs); // Set level one descriptor attributes gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_BLOCK; gAttrs.attrIndx = MMU_A15_ATTR_INDEX_2; gAttrs.nonSecure = MMU_A15_NON_SECURE_ENABLE; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_ANY_PL; // Read Write at any PL // Set level one descriptor virtualAddr = 0x80000000, phyAddr = 0x80000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); virtualAddr = 0xc0000000, phyAddr = 0x80000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); // Set level one descriptor attributes MMUA15SetMAIR(&gMmuTable, MMU_A15_ATTR_INDEX_3, 0x00); gAttrs.descriptorType = MMU_A15_DESCRIPTOR_TYPE_BLOCK; gAttrs.attrIndx = MMU_A15_ATTR_INDEX_3; gAttrs.nonSecure = MMU_A15_NON_SECURE_ENABLE; gAttrs.accPerm = MMU_A15_ACC_PERM_RW_ANY_PL; // Read Write at any PL virtualAddr = 0x0, phyAddr = 0x0; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); virtualAddr = 0x40000000, phyAddr = 0x40000000; MMUA15SetFirstLevelDesc(&gMmuTable, virtualAddr, phyAddr, &gAttrs); MMUA15Enable(&gMmuTable); BTW the reason I asked about L2I was because I saw in the TRM that "the processor cores can be kept cache-coherent with each other and with the L2 cache." This seems like a useful feature but I haven't seen any details on how to do that. Thank you. + +Hi, You should read "Chapter B3 Virtual Memory System Architecture (VMSA)" of armv7-a-r-manual.pdf. RBL already enables I-cache. I will get back to you with details on what exactly you need to do. Regards, Rishabh + +Hi, RBL already enable I cache for A15 core 0. So all you need to do is enable I cache for A15 Core 1. You can call the API CACHEA15Enable(CACHE_A15_TYPE_L1I) from A15 Core 1. You don't need to call any other cache APIs. You can set MMU as per your requirements. Regards, Rishabh + +Thanks Rishabh. I had done this earlier but didn't see any performance difference from when I don't enable I-cache only. Thank you. + +Hi, I guess you are not able to see as I cache is already enabled on Core 0. Just run the same code with I cache disabled and you will see lot of performance deterioration. I had validated the performance improvement using same MMU example. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/746402.txt b/data2/text/range/5001-10000/746402.txt new file mode 100644 index 0000000000000000000000000000000000000000..3474e8bebbd7fa9123e437a5bda9cd51bbf903e2 --- /dev/null +++ b/data2/text/range/5001-10000/746402.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: Unable to mount root fs via NFS, + +Query Text: +Part Number: TDA2 Other Parts Discussed in Thread: PMP, DRA742, DRA752 Tool/software: Linux i am useing SDK_VISION_03_04_00_00 , uenv.txt is like this console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.25:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M when i reboot sometimes failed , log is follow. OMAP SD/MMC: 0, OMAP SD/MMC: 1 ** First descriptor is NOT a primary desc on 1:1 ** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 part_get_info_efi: *** ERROR: Invalid Backup GPT *** ERROR: cannot find partition: 'userdata' at arch/arm/cpu/armv7/omap-common/utils.c:199/mmc_get_part_size() Warning: fastboot.userdata_size: unable to calc SCSI: SATA link 0 timeout. AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst scanning bus for devices... Found 0 device(s). Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 reading boot.scr ** Unable to read file boot.scr ** reading uEnv.txt 239 bytes read in 2 ms (116.2 KiB/s) Loaded env from uEnv.txt Importing environment from mmc0 ... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3560088 bytes read in 109 ms (31.1 MiB/s) 106875 bytes read in 15 ms (6.8 MiB/s) Booting from mmc0 ... Kernel image @ 0x82000000 [ 0x000000 - 0x365298 ] ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8ffe2000, end 8ffff17a ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Initializing cgroup subsys cpuset [ 0.000000] Initializing cgroup subsys cpu [ 0.000000] Initializing cgroup subsys cpuacct [ 0.000000] Linux version 4.4.84-00027-g018eb62 (hancan@hancan-virtual-machine) (gcc version 5.4.1 20170404 (Linaro GCC 5.4-2017.05) ) #2 SMP PREEMPT Sun Sep 30 10:05:17 CST 2018 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] Machine model: TI DRA742 [ 0.000000] Ignoring memory block 0x200000000 - 0x280000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x40300000, size 3 MiB [ 0.000000] Reserved memory: initialized node cmem@40300000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0x99000000, size 80 MiB [ 0.000000] Reserved memory: initialized node ipu2_cma@95800000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0x9e000000, size 32 MiB [ 0.000000] Reserved memory: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created CMA memory pool at 0xa1000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp1_cma@99000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: created CMA memory pool at 0xa3000000, size 32 MiB [ 0.000000] Reserved memory: initialized node dsp2_cma@9f000000, compatible id shared-dma-pool [ 0.000000] Reserved memory: regions without no-map are not yet supported [ 0.000000] Reserved memory: created DMA memory pool at 0xa9000000, size 64 MiB [ 0.000000] Reserved memory: initialized node cmem@A9000000, compatible id shared-dma-pool [ 0.000000] cma: Reserved 24 MiB at 0xbe400000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0xbfe00000 to fe600000 for dram barrier [ 0.000000] DRA752 ES2.0 [ 0.000000] PERCPU: Embedded 11 pages/cpu @ef630000 s14912 r8192 d21952 u45056 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 243520 [ 0.000000] Kernel command line: console=ttyO0,115200n8 vram=16M root=/dev/nfs rw nfsroot=172.17.218.25:/home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs rootwait ip=dhcp mem=1024M [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 411856K/980992K available (6663K kernel code, 318K rwdata, 2392K rodata, 332K init, 286K bss, 364336K reserved, 204800K cma-reserved, 235520K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc08e000c (9057 kB) [ 0.000000] .init : 0xc08e1000 - 0xc0934000 ( 332 kB) [ 0.000000] .data : 0xc0934000 - 0xc09839e0 ( 319 kB) [ 0.000000] .bss : 0xc0985000 - 0xc09cc980 ( 287 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] ti_dt_clocks_register: failed to lookup clock node gmac_gmii_ref_clk_div [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [ 0.000000] Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [ 0.000004] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns [ 0.000016] Switching to timer-based delay loop, resolution 162ns [ 0.000342] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.000351] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000798] Console: colour dummy device 80x30 [ 0.000814] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000820] This ensures that you still see kernel messages. Please [ 0.000826] update your kernel commandline. [ 0.000839] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475) [ 0.000851] pid_max: default: 32768 minimum: 301 [ 0.000948] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000958] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.001497] Initializing cgroup subsys io [ 0.001513] Initializing cgroup subsys memory [ 0.001537] Initializing cgroup subsys devices [ 0.001550] Initializing cgroup subsys freezer [ 0.001561] Initializing cgroup subsys perf_event [ 0.001572] Initializing cgroup subsys pids [ 0.001598] CPU: Testing write buffer coherency: ok so i donot know what is the problem? thanks! + +Responses: +Hi Shuai, did you export your rootfs in the "/etc/exports" of your host (as mentioned in chapter "3.1.1 NFS + SD boot" of VisionSDK_Linux_UserGuide.pdf). You should add following line: /home/hancan/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/linux/targetfs *(rw,nohide,insecure,no_subtree_check,async,no_root_squash) you may need to run following commands: sudo /etc/init.d/nfs-kernel-server stop + +sudo /etc/init.d/nfs-kernel-server start after modifying "/etc/exports". Regards, Yordan + diff --git a/data2/text/range/5001-10000/747611.txt b/data2/text/range/5001-10000/747611.txt new file mode 100644 index 0000000000000000000000000000000000000000..5326867945e7539363d0536a1197416fdfc8be34 --- /dev/null +++ b/data2/text/range/5001-10000/747611.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2: TDA2x visionSDK compile error + +Query Text: +Part Number: TDA2 Tool/software: TI C/C++ Compiler Hi there, I have installed vision sdk using PROCESSOR_SDK_VISION_03_00_00_00_setuplinux.bin. My compile host machine is win10. I compiled visionSDK follow "visionsdk userguide tda2xx.pdf": MAKECONFIG=tda2xx_evm_rtos_all make -s depend; make -s; They all run successfully. And then I want to compile the other compents of visionSDK, so i execute : make -s all, the i get these errors: $ gmake -s all process_begin: CreateProcess(NULL, s gmake -fMAKEFILE.MK -CE:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/apps/src/rtos/alg_plugins clean, ...) failed. make (e=2): ϵͳ▒Ҳ▒▒▒ָ▒▒▒▒▒ļ▒▒▒ /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l /cygdrive/e/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/cat: E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/l # Compiling tda2xx-evm:ipu1_0:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:ipu1_0:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: cannot open source file "system_cfg.h" 1 catastrophic error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/ipu1_0/release/algorithmLink_cfg.oem4] Error 1 gmake[6]: *** [ipu1_0] Error 2 # Compiling tda2xx-evm:ipu1_1:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:ipu1_1:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: cannot open source file "system_cfg.h" 1 catastrophic error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/ipu1_1/release/algorithmLink_cfg.oem4] Error 1 gmake[6]: *** [ipu1_1] Error 2 # Compiling tda2xx-evm:ipu2:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:ipu2:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: cannot open source file "system_cfg.h" 1 catastrophic error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/ipu2/release/algorithmLink_cfg.oem4] Error 1 gmake[6]: *** [ipu2] Error 2 # Compiling tda2xx-evm:a15_0:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:a15_0:release:links_common_algorithm: algorithmLink_cfg.c algorithmLink_cfg.c:79:24: fatal error: system_cfg.h: No such file or directory #include ^ compilation terminated. gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/a15_0/release/algorithmLink_cfg.oa15fg] Error 1 gmake[6]: *** [a15_0] Error 2 # Compiling tda2xx-evm:c66xdsp_1:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:c66xdsp_1:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/c66xdsp_1/release/algorithmLink_cfg.oe66] Error 1 gmake[6]: *** [c66xdsp_1] Error 2 # Compiling tda2xx-evm:c66xdsp_2:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:c66xdsp_2:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/c66xdsp_2/release/algorithmLink_cfg.oe66] Error 1 gmake[6]: *** [c66xdsp_2] Error 2 # Compiling tda2xx-evm:arp32_1:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:arp32_1:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/arp32_1/release/algorithmLink_cfg.oearp32F] Error 1 gmake[6]: *** [arp32_1] Error 2 # Compiling tda2xx-evm:arp32_2:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:arp32_2:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/arp32_2/release/algorithmLink_cfg.oearp32F] Error 1 gmake[6]: *** [arp32_2] Error 2 # Compiling tda2xx-evm:arp32_3:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:arp32_3:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/arp32_3/release/algorithmLink_cfg.oearp32F] Error 1 gmake[6]: *** [arp32_3] Error 2 # Compiling tda2xx-evm:arp32_4:release:links_common_algorithm: algorithmLink_algPluginSupport.c # Compiling tda2xx-evm:arp32_4:release:links_common_algorithm: algorithmLink_cfg.c "algorithmLink_cfg.c", line 79: fatal error: could not open source file "system_cfg.h" 1 fatal error detected in the compilation of "algorithmLink_cfg.c". Compilation terminated. >> Compilation failure gmake[7]: *** [E:/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/links_common_algorithm/tda2xx-evm/arp32_4/release/algorithmLink_cfg.oearp32F] Error 1 gmake[6]: *** [arp32_4] Error 2 gmake[5]: *** [links_common_algorithm] Error 2 gmake[4]: *** [libs] Error 2 gmake[3]: *** [links_fw_libs] Error 2 gmake[2]: *** [apps] Error 2 gmake[1]: *** [vision_sdk] Error 2 gmake: *** [all] Error 2 so, what can i do to fix this?\ Thanks! + +Responses: +Hi, What component exactly do you want to compile? In case you want to compile Vision SDK for a different configuration/platform, you should change MAKECONFIG. Regards, Rishabh + +Hi Rishabh, Among those components, which were not compiled by run "gmake -s", I just need "sbl" for SD boot. I can get sbl component by just run "gmake sbl" successfully. The error above i pose occurs when compile alg link, so which file should i modify to compile it. I do not neet it for now though. Sorry for my poor English. Thanks! + +Hi, Vision SDK compile will compile all applicable links. In my opinion compiling a particular link as a standalone is not very useful unless you have a specific requirement. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/754646.txt b/data2/text/range/5001-10000/754646.txt new file mode 100644 index 0000000000000000000000000000000000000000..8be5899b57969f7641ec8cf2d75e28597fed370c --- /dev/null +++ b/data2/text/range/5001-10000/754646.txt @@ -0,0 +1,48 @@ +Ticket Name: Linux/TDA2: On-Chip Shared Memory (RAM) 512KB + +Query Text: +Part Number: TDA2 Tool/software: Linux i am useing tda2 evm , i am run a cnn on c66 , how can i use On-Chip Shared Memory (RAM) pMemMgr_FR.L2.pMem = Utils_memAlloc(UTILS_HEAPID_L2_LOCAL, L2SRAM_SIZE, 32); by this way pMemMgr_FR.L2.pMem is get from On-Chip Shared Memory? thanks shuai + +Responses: +Hi, Please use UTILS_HEAPID_OCMC_SR instead of UTILS_HEAPID_L2_LOCAL. Regards, Anuj + +Hi Anuj UTILS_HEAPID_OCMC_SR and UTILS_HEAPID_L2_LOCAL which is fastter? omapconf show opp not show clock of them. Regards, shuai + +Hi Anuj Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR, FR_MODEL_SIZE, 32); is get mem from LP-DDR2 ? Regards, shuai + +Hi, Utils_memAlloc(UTILS_HEAPID_DDR_CACHED_SR, FR_MODEL_SIZE, 32); is get mem from LP-DDR2 ? It is from DDR3. UTILS_HEAPID_OCMC_SR and UTILS_HEAPID_L2_LOCAL which is fastter? UTILS_HEAPID_OCMC_SR is faster. Regards, Anuj + +Hi Anuj pMemMgr.L2.pMem = Utils_memAlloc(UTILS_HEAPID_OCMC_SR,L2SRAM_SIZE,32); is failed pMemMgr.L2.pMem=null L2SRAM_SIZE =32*1024; the code is used at sample_app\src\rtos\alg_plugins\framecopy\frameCopyAlgoLocalDma.c\Alg_FrameCopy_Create pMemMgr.L2.pMem = Utils_memAlloc(UTILS_HEAPID_L2_LOCAL,L2SRAM_SIZE,32); is ok! Regards, shuai + +Hi, Can you please check the vlue of all member variable of the below structure. gUtils_memHeapObj[2]. Regards, Anuj + +Hi Anuj you mean Vps_printf("gUtils_memHeapObj[0]=%d,gUtils_memHeapObj[1]=%d \n" gUtils_memHeapObj[0],gUtils_memHeapObj[1]); ? where should i add this code ? Regards, shuai + +Hi Anuj UTILS_HEAPID_OCMC_SR and UTILS_HEAPID_L2_LOCAL which is fastter? Regards, shuai + +Hi, I have already told in previous post that OCMC is faster. But allocating memory from that region is not supported. So you can find the ocmc address from the TRM and use that address directly as your buffer pointer. Regards, Anuj + +HI Anuj OCMC_RAM1 0x4030_0000 0x4037_FFFF 512KiB 32bit Ex OCMC_RAM2 0x4040_0000 0x404F_FFFF 1MiB 32bit Ex OCMC_RAM3 0x4050_0000 0x405F_FFFF 1MiB 32bit SO I can use 0x4030_0000 address as ocmc buf , Regards, Anuj + +HI Anuj sorry i donot know how to do , could you help me . Regards, shuai + +Hi, pMemMgr.L2.pMem = 0x40300000; And then use it. Regards, Anuj + +HI Anuj ocmc_buf=0x4030_0000 is failed i cannot EMDA data to that buf. Regards, shuai + +Hi, I did not understand your problem. Can you explain in detail. Regards, Anuj + +HI Anuj pMemMgr.L2.pMem = 0x40300000; then i use EDMA copy data from ddr to pMemMgr.L2.pMem, it have some crash , DSP core is crash. i use pMemMgr_FR.L2.pMem = Utils_memAlloc(UTILS_HEAPID_L2_LOCAL, L2SRAM_SIZE, 32); program run normal. so hoe can i use ocmc . Regards, shuai + +HI Anuj follow is the log [HOST] [HOST ] 0: Stop Chain [HOST] [HOST ] [HOST] [HOST ] p: Print Performance Statistics [HOST] [HOST ] [HOST] [HOST ] Enter Choice: [HOST] [HOST ] [HOST] [EVE3 ] 81.621362 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE3 ] 81.621667 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE3 ] 81.622216 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [EVE4 ] 81.623406 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [EVE4 ] 81.623711 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [HOST] [EVE4 ] 81.624260 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254176 B (248 KB) [HOST] [IPU2 ] 81.625083 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST] [IPU2 ] 81.625266 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248552 B (242 KB) [HOST] [IPU2 ] 81.625419 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [HOST] [IPU2 ] 81.625571 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 346030080 B (330 MB), Free size = 308248576 B (293 MB) [HOST] [IPU2 ] 81.625785 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1045376 B (0 MB), Free size = 851840 B (0 MB) [HOST] [IPU2 ] 81.626242 s: DISPLAY: Start in progress !!! [HOST] [IPU2 ] 81.626303 s: DISPLAY: Start Done !!! ] omap-iommu 40d01000.mmu: iommu fault: da 0x3f000000 flags 0x0 [ 75.236604] remoteproc1: crash detected in 40800000.dsp: type mmufault [ 75.243256] omap-iommu 40d01000.mmu: 40d01000.mmu: errs:0x00000002 da:0x3f000000 pgd:0xed13cfc0 *pgd:px00000000 [ 75.253651] remoteproc1: handling crash #1 in 40800000.dsp [ 75.259300] remoteproc1: recovering 40800000.dsp [HO ST] [HOST ] 82.019154 s: SYSTEM: IPC: [DSP1] Notify recfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019185 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019185 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019215 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019215 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019215 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019246 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019246 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019276 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019276 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019276 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019307 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019307 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019307 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019337 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019337 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019368 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019368 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019368 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019398 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! [HOST] [HOST ] 82.019398 s: SYSTEM: IPC: [DSP1] Notify recvfrom failed (Link has been severed, 67) !!! Regards, shuai + +Hi, Can you try with other OCMC(2&3) address. Please make sure no one is touching that ocmc address. Regards, Anuj + +Hi, Its been long time since any update on this thread. Is the issue resolved? Regards, Anuj + +Hi： Anuj I have thy OCMC(2&3) address ,also failed! Regards! Shuai + +Hi, Instead of doing EDMA copy can you try with simple memcpy and share your observations? Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. Regards, Anuj + diff --git a/data2/text/range/5001-10000/757385.txt b/data2/text/range/5001-10000/757385.txt new file mode 100644 index 0000000000000000000000000000000000000000..d619975cf084cc623bf5eb02bcf2fba4407fffa8 --- /dev/null +++ b/data2/text/range/5001-10000/757385.txt @@ -0,0 +1,40 @@ +Ticket Name: TDA2: Repetitive noise pattern in kernel output + +Query Text: +Part Number: TDA2 Hi, We have written and added a Canny edge detector kernel into the VisionSDK framework. And we are running it on TDA2x board. But I see a repetitive noise pattern in the output. Attaching the input and output image of the same. I do not observe this issue when I run the same code on CCSv5 simulator. The only difference between the simulator and emulator setup is that the emulator uses BAM and iVision for processing. The simulator processes on the full image at a time. 1. Is there any configuration of EDMA or BAM that I might be missing? 2. Has anyone faced such issue before? Any idea what can be triggering this issue? 3. Does this look like BAM issue or kernel processing issue? Regards, Shruti + +Responses: +Hi Shruti, This looks like that you the jump across the blocks is not correct. Can you check if the horizontal and vertical lines are coming at same location as block dimension. I didn't understand the part about the difference between simulator and emulator. What do you mean by simulator processes the full image? Regards, Anshu + +Hi Anshu, Yes, the horizontal lines are at the block boundry, specifically the upper horizontal boundry of each block. When I pass full black input to the kernel, the output is showing these horizontal lines. I am configuring the EDMA with input and output buffer pointers, block width and height, the input and output buffer stride. Is there any other configurations necessary? I am using CCSv5 simulator for EVE. Due to memory restrictions, I cannot run BAM with it. So, it runs the full kernel code without BAM. That is why full image is processed at a time. But on board, I run with BAM, so the input image is fed to the kernel block by block. This is the difference that I was talking about. Regards, Shruti + +Shruti, Are you observing these lines with the canny edge detection code which is part of EVESW offering? Or is it modified code? Your DMA seems to be not programmed correctly. Kindly check the DMA parameter to make sure you have accounted the data overlap across the blocks. Canny edge detection uses 3x3 sobel kernel so there will be a overlap of 2 pixels across each block. Make sure your DMA increments by the correct amount. EVE simulator has same memory restriction as the emulator. There is no issue in running BAM on simulator. So I am still not sure why you say that because its EVE simulator you cannot run BAM. Regards, Anshu + +Hi Anshu, No it is not the part of EVESW offering, the one I am using is the one which we ported. In the modified code, we are using sobel as two 1-D kernels (one vertical and one horizontal), and not a single 3x3 kernel. I will check the DMA configurations once again. Also, while debugging this, I observed one more issue. I have taken one output buffer in BAM, and I am not writing any data onto it, then if I dump this into a file, I see a random pattern in output. 1. Does BAM not clear a buffer before allocating /reallocating a buffer? Or is there any configuration for the same? 2. Is there a way to clear the buffers manually before filling them? Regards, Shruti + +Shruti, Which buffers are you talking about, are these the internal buffers allocated by BAM? Are these buffers allocated by BAM? Btw BAM does not clear any buffer after allocation. Regards, Anshu + +Hi Anshu, Yes, I am talking about the internal as well as output buffers allocated by BAM, for each kernel processing. Is there a way to clear them? Or it should be handled through code? Regards, Shruti + +Shruti, If I understand correctly you want to initialize one of the output buffer of a BAM node with certain values (I am not very clear on why you need this). You can do this in the _init function of the BAM node at which this buffer is allocated. Regards, Anshu + +Dear Anshu Feroz here. Just to be very clear: The team is not working on the EVE simulator on VC++ environment. They are just using the EVE core simulator on the CCS. I do not believe either that we need to reset/zero the buffers before process. I'd assume that the process will overwrite the full buffer anyway. IS there a note / section on the DMA configuration that the team can follow? Can you please share that? Would you think there could be a caching issue? perhaps missed write backs or the like? I suggested we could disable caches for debug. Other thing that I can think of is the algorithm logic itself. So it would be one way to dump the o/p buffers across the chain and narrow down the faulty link. We should also retry with a smaller image say 320X240 or VGA to see if its to do with any real time mismatch or synchronization issue. Best Regards Feroz + +Hi Feroz, I was talking about EVE simulator which you use via CCS. It's behavior is very close to the actual emulator and there is no problem in running BAM on it. I would suggest to look into current edge detector ( canny) to see the dma configuration. I think it should be very similar for what you guys are trying to do. EVE doesn't have any data cache so it doesn't even come into picture. Regards, Anshu + +Many Thanks Anshu for clarifying! We will look into this and update. Best Regards Feroz + +Hi Feroz, I hope your team were able to make progress on this. If not then let us know. Regards, Anshu + +Hi Anshu, Sorry for the delayed response. We are still not able to resolve this issue. We tried seeing the DMA configurations and they are correct. Currently, one of our kernels from the graph is running on ARP32 and rest all kernels are running on EVE. So, we are suspecting that there might be some data corruption between the context switching between ARP32 and VCOP. As of now, we are debugging the same. Can you give us some pointers regarding this? Regards, Shruti + +Shruti, I think you already have another thread in which Victor is responding. Lets continue the discussion there instead of in this thread. Regards, Anshu + +Sure Anshu. We can continue this in the other thread. Regards, Shruti + +Thanks a lot Anshu! Yes the issue is being addressed/handled at https://e2e.ti.com/support/processors/f/791/t/759778?tisearch=e2e-sitesearch Seems like a address memory map issue. I hope resolving that issue will resolve these macro block boundary level artefacts. BTW, we also observe the artefacts for a plain black image too. + +Hi Feroz, Can we close this thread as this issue is being discussed in another thread? If later it is required to be open then you can re-open again. Regards, Anshu + +Dear Anshu Yes sir. please lets close this. Appreciate your support Best Regards Feroz + diff --git a/data2/text/range/5001-10000/757723.txt b/data2/text/range/5001-10000/757723.txt new file mode 100644 index 0000000000000000000000000000000000000000..6da69c5ba2d3e77c2477832bd3d028d94bf603a3 --- /dev/null +++ b/data2/text/range/5001-10000/757723.txt @@ -0,0 +1,50 @@ +Ticket Name: RTOS/TDA2: Build eve host emulation failed + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi, I met error when I build eve host emulation with command "gmake TARGET_BUILD=PC". The error information is as below, ... --> error: cannot open archive: 'lib/PC/libeveprivkernels.eve.lib' .. I build successfully when I build target version with command "gmake TARGET_BUILD=debug". If anyone can help? Thanks! BRs Yang Derek + +Responses: +Hi For host emulation you have to build using following command : gmake TARGET_PLATFORM=PC Regards, Anshu + +Hi Anshu, Sorry for making you confused. I built with the command "gmake TARGET_PLATFORM=PC". It was typo error in the question. Thanks! Best Regards, Derek Yang + +Hi Derek, Are you trying to build EVE SW delivered by TI or have you made any modifications. The host emulation libraries are available at following location : \kernels\lib\release\libevekernels.eve.lib_pc.lib But the error message you are sharing a different path: 'lib/PC/libeveprivkernels.eve.lib Can you check why it is looking at different path? Regards, Anshu + +Hi Derek, Were you able to make progress on this? If not then do let us know. Regards, Anshu + +Hi Anshu, Thanks for your reply. I still don't enable the emulation successfully. When I build with "gmake TARGET_PLATFORM=PC" in my windows laptop, I meet error "LINK : fatal error LNK1104: cannot open file 'D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils/libs/PC/eve/debug/dmautils.lib'". I checked my installing dir. There is no this dir. Would you please help to share the "PC/eve/debug/dmautils.lib'"? Thanks! BRs Yang Derek + +Hi Anshu, The error happens when I build in my Linux develop machine. I build under directory "ti_components\algorithms\eve_sw_01_19_00_00". I only change a filter kernel. And don't change others. If the emulation is only supported in Windows? Thanks! BRs Yang Derek + +Hi Anshu, Actually, I want to check what is the output when I compare two vectors. For example, if I set vector a = [0xfff0, 0xfff1, 0xfff2, 0xfff3, 0xfff4, 0xfff5, 0xfff6, 0xfff7]; vector b = [0xfff1, 0xff01, 0xff02, 0xffff, 0xff01, 0xff02, 0xffff, 0xffff ], what is the result c = a > b ? If it is [0, 1, 1,0, 1, 1, 0, 0 ] ? Thanks a lot! BRs Yang Derek + +Hi Derek, I am a bit confused whether you are facing issue in windows build or linux build. In previous response you mentioned that you are building in windows and getting following error : D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils/libs/PC/eve/debug/dmautils.lib'". I checked my installing dir. There is no this dir. Would you please help to share the "PC/eve/debug/dmautils.lib'"? If the above library is not already present then you might have to re-build it. For host emulation you will need to build DMA Utils in host emulation using Visual Studio compiler. Please refer docs/DMAUtilsLibrary_UserGuide section 3.3.3 for the same. Currently we don't support host emulation build on Linux. Regards, Anshu + +Hi Derek, Please create new threads for different queries. Comparison operation does an element wise comparison of all the 8 elements of the vectors and returns a vector holding the comparison for each elements of the vector. Regards, ANshu + +Hi Anshu, Thanks for your reply. I tried in Linux first and failed. In eve guide, I find guide eve_sw_getting_started mentions the emulation is supported with Visual Studio. Then I tried it in Windows. I will try to rebuild DMA Utils. Thanks! Best Regards, Derek Yang + +Hi Anshu, Thanks for your reply. I have created a new question to follow the compare question. Best Regards, Derek Yang + +Hi Anshu, I rebuild DMA Utils and algframework. The build comes to next step. There is one test app build successfully, apps/morphology/test. But the other apps build fail. The error information is as following. ... ======== Integral Image TEST ================= gmake -C ./integralImage/test -f makefile gmake[2]: Entering directory `D:/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/algorithms/eve_sw_01_19_00_00/apps/integralImage/test' algframework.lib(bam_utils.obj) : error LNK2038: mismatch detected for 'RuntimeLibrary': value 'MTd_StaticDebug' doesn't match value 'MDd_DynamicDebug' in integral_image_test.obj algframework.lib(bam_utils.obj) : error LNK2005: "public: __thiscall std::_Container_base12::_Container_base12(void)" (??0_Container_base12@std@@QAE@XZ) already defined in msvcprtd.lib(MSVCP110D.dll) algframework.lib(bam_utils.obj) : error LNK2005: "public: __thiscall std::_Container_base12::~_Container_base12(void)" (??1_Container_base12@std@@QAE@XZ) already defined in msvcprtd.lib(MSVCP110D.dll) ... Here is the path configure of my algframework. ... DSP_TOOLS ?="D:\ti\ccsv5\tools\compiler\c6000_7.4.4" ARP32_TOOLS ?="D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\cg_tools\windows\arp32_1.0.7" TIARM_TOOLS ?="D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\cg_tools\windows\ti-cgt-arm_16.9.2.LTS" XDAIS_PATH ?="D:\ti\xdais_7_21_01_07" UTILS_PATH ?="D:\ti\ccsv5\utils\cygwin" VXLIB_PATH ?="D:\work\DSP\vxlib" DMAUTILS_PATH ?=$(ALGBASE_PATH)/dmautils ALGFRAMEWORK_PATH ?=$(ALGBASE_PATH)/algframework ... Path configure of eve. ... ARP32_TOOLS ?= "D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\cg_tools\windows\arp32_1.0.7" xdais_PATH ?= "D:\ti\xdais_7_21_01_07" DMAUTILS_PATH ?= "D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\REL.DMAUTILS.00.08.00.02\dmautils" ... Do you have any suggestion? Best Regards, Yang Derek + +Derek, Which version of visual studio you are using? Building host emulation for these modules requires Microsoft Visual Studio 11.0 (2012). Regards, Anshu + +Hi Anshu, I use "Microsoft Team Explorer for Visual Studio 2012". In my installing directory, PROCESSOR_SDK_VISION_03_05_00_00, there are three tools, arp32_1.0.7, C6000_7.4.2, ti-cgt-arm_16.9.2.LTS in D:\PROCESSOR_SDK_VISION_03_05_00_00\ti_components\cg_tools\windows. There other tools, XDAIS_PATH, UTILS_PATH, are installed separately. Do you have any other suggestion? Best Regards, Derek Yang + +Derek, As asked earlier, can you tell which version of Microsoft visual studio compiler you are using? Regards, Anshu + +Derek, Can you share the following file present inside algframework : (makesrules/rules.mk)? Regards, Anshu + +Hi Anshu, I use "Microsoft Visual Studio Express 2012 for Windows Desktop version 11.0.50727.42" + +Hi Anshu, Here is the rules.mk under algframework directory. Thanks! BRs Derek Yangrules.mk.123 + +Hi Derek, What is the version of algframework which you are using? For now can you just change the following two lines in algframework and rebuild it again? Change Line 156 : COMPILER_FLAGS += /EHsc /TP /W0 /DHOST_EMULATION /c /nologo /Ox /D_NDEBUG /MT /Gm /Zi /D_HOST_BUILD /D_HAS_ITERATOR_DEBUGGING=0 /D_ITERATOR_DEBUG_LEVEL=0 to COMPILER_FLAGS += /EHsc /TP /W0 /DHOST_EMULATION /c /nologo /Ox /D_NDEBUG /MD /Gm /Zi /D_HOST_BUILD /D_HAS_ITERATOR_DEBUGGING=0 /D_ITERATOR_DEBUG_LEVEL=0 Change Line 160 : COMPILER_FLAGS += /EHsc /TP /W0 /DHOST_EMULATION /c /nologo /Od /D_DEBUG /MTd /Gm /Zi /RTC1 /D_HOST_BUILD to COMPILER_FLAGS += /EHsc /TP /W0 /DHOST_EMULATION /c /nologo /Od /D_DEBUG /MDd /Gm /Zi /RTC1 /D_HOST_BUILD Regards, Anshu + +Hi Anshu, My algframework is "REL.ALGFRAMEWORK.02.08.00.00". It is installed when I install sdk "PROCESSOR_SDK_VISION_03_05_00_00". I will try your suggestion later. Thanks! Best Regards, Derek Yang + +Hi Anshu, I build successfully after changing rules.mk according to your suggestion. Why change this? Thanks a lot! Best Regards, Derek Yang + +Hi Derek, The release number of algframework which you mentioned is expected to use /Md and /MDd flags. The change to /MT flag was done in a later release. So I need to check the two are different. Regards, Anshu + diff --git a/data2/text/range/5001-10000/759229.txt b/data2/text/range/5001-10000/759229.txt new file mode 100644 index 0000000000000000000000000000000000000000..ea307540b363b9ed8f752b88442ac24be120a0b3 --- /dev/null +++ b/data2/text/range/5001-10000/759229.txt @@ -0,0 +1,90 @@ +Ticket Name: TDA2: EVE: Issues in transfer of data between different kernels + +Query Text: +Part Number: TDA2 Hi, I have created an application in EVE which uses 6 kernels for the processing. The application is written using iVision and BAM interfaces. So, BAM creates a graph for the execution flow through all 6 kernels. There are two buffers output from kernel2 which are passed as input to kernel3. But I observe a peculiar behavior in this data transfer. I have filled the output buffers with zero in the kernel2 execution function. But when the control comes in kernel3 execution function, if I check the value of the buffers, one out of the two buffers is non-zero. I tried changing the memory region of the buffers, but that does not help. I also swapped the two buffer addresses. But every time the same output buffer is affected, whether I swap it or change its memory location. Can anyone help me with this problem? Regards, Shruti + +Responses: +Hi Shruti, Can you share the NODELIST and EDGELIST of your BAM graph? Regards, Anshu + +Hi Shruti, We haven't heard back from you on this? Were you able to make progress? Regards, Anshu + +Hi Anshu, I found a workaround to run the usecase. But for the workaround I replicated the output buffers of one kernel, and passed it to the other kernels as an input. The buffers are not shared. This removed the noise which I was getting in the ouput. But the kernel overhead increased as it had to copy the same output data into different kernels. Is this a limitation of BAM? Is it mentioned in any document? Are there any other limitations of BAM, which may cause such issues? Regards, Shruti + +Hi Shruti, As requested earlier, can you share the NODELIST and EDGELIST of your BAM graph? Regards, Anshu + +Hi Anshu, The Node and edge list: BAM_NodeParams NODELIST[]={\ + {SOURCE_NODE, BAM_TI_KERNELID_DMAREAD_AUTOINCREMENT , NULL}, + {GAUSSIAN_NODE, BAM_TI_KERNELID_GAUSSIAN_BLUR , NULL}, + {DERIVATIVE_NODE, BAM_TI_KERNELID_DERIVATIVE_XY , NULL}, + {DIVISION_NODE, BAM_TI_KERNELID_DIVISION , NULL}, + {MAGNITUDE_NODE, BAM_TI_KERNELID_MAGNITUDE_XY , NULL}, + {NON_MAX_SUPP_NODE,BAM_TI_KERNELID_NON_MAX_SUPP , NULL}, + {HYSTERESIS_NODE, BAM_TI_KERNELID_HYSTERESIS , NULL}, + {SINK_NODE, BAM_TI_KERNELID_DMAWRITE_AUTOINCREMENT, NULL}, + {BAM_END_NODE_MARKER, 0, NULL},\ + }; + + NODELIST[SOURCE_NODE].kernelArgs = (void *)&graphArgs->dmaReadKernelArgs; + NODELIST[GAUSSIAN_NODE].kernelArgs = (void *)&graphArgs->guassianArgs; + NODELIST[DERIVATIVE_NODE].kernelArgs = (void *)&graphArgs->derivativeXyArgs; + NODELIST[DIVISION_NODE].kernelArgs = (void *)&graphArgs->divisionArgs; + NODELIST[MAGNITUDE_NODE].kernelArgs = (void *)&graphArgs->magnitudeXyArgs; + NODELIST[NON_MAX_SUPP_NODE].kernelArgs = (void *)&graphArgs->nmsArgs; + NODELIST[HYSTERESIS_NODE].kernelArgs = (void *)&graphArgs->hysteresisArgs; + NODELIST[SINK_NODE].kernelArgs = (void *)&graphArgs->dmaWriteKernelArgs; + + BAM_EdgeParams EDGELIST[]= { + {{SOURCE_NODE, BAM_SOURCE_NODE_PORT1}, + {GAUSSIAN_NODE, BAM_GAUSSIAN_INPUT_PORT}},\ + + {{GAUSSIAN_NODE, BAM_GAUSSIAN_OUTPUT_PORT}, + {DERIVATIVE_NODE, BAM_DERIVATIVEXY_SMOOTHIMG_INPUT_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADX_OUTPUT_PORT}, + {DIVISION_NODE, BAM_DIVISION_GRADX_INPUT_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADX_OUTPUT_PORT}, + {MAGNITUDE_NODE, BAM_MAGNITUDEXY_GRADX_INPUT_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADX_OUTPUT_PORT}, + {NON_MAX_SUPP_NODE, BAM_CANNY_NON_MAX_SUPP_GRAD_X_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADY_OUTPUT_PORT}, + {DIVISION_NODE, BAM_DIVISION_GRADY_INPUT_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADY_OUTPUT_PORT}, + {MAGNITUDE_NODE, BAM_MAGNITUDEXY_GRADY_INPUT_PORT}},\ + + {{DERIVATIVE_NODE, BAM_DERIVATIVEXY_GRADY_OUTPUT_PORT}, + {NON_MAX_SUPP_NODE, BAM_CANNY_NON_MAX_SUPP_GRAD_Y_PORT}},\ + + {{DIVISION_NODE, BAM_DIVISION_OUTPUT_PORT}, + {NON_MAX_SUPP_NODE, BAM_CANNY_NON_MAX_SUPP_GRAD_DIR_PORT}},\ + + {{MAGNITUDE_NODE, BAM_MAGNITUDEXY_OUTPUT_PORT}, + {NON_MAX_SUPP_NODE, BAM_CANNY_NON_MAX_SUPP_GRAD_MAG_PORT}},\ + + {{NON_MAX_SUPP_NODE, BAM_CANNY_NON_MAX_SUPP_EDGE_OUT_PORT}, + {HYSTERESIS_NODE, BAM_CANNY_HYSTERESIS_NMS_OUT_PORT}},\ + + {{HYSTERESIS_NODE, BAM_CANNY_HYSTERESIS_EDGE_OUT_PORT}, + {SINK_NODE, BAM_SINK_NODE_PORT1}},\ + + {{BAM_END_NODE_MARKER, 0}, + {BAM_END_NODE_MARKER, 0}},\ + }; Regards, Shruti + +Hi Shruti, Sorry for delay in response. Can you tell which kernel is kernel 2 and kernel 3 which you are mentioning? Also is any of these kernel node is an ARP32 node? Regards, Anshu + +Hi Anshu, kernel 2 is DERIVATIVE_NODE and Kernel3 is MAGNITUDE_NODE. Yes, DIVISION_NODE is an ARP32 node. This also has the same input from kernel2. Regards, Shruti + +Shruti, What is the value of the following : DERIVATIVE_NODE DIVISION_NODE MAGNITUDE_NODE Regards, anshu + +Hi Anshu, The values are below: #define SOURCE_NODE 0 #define GAUSSIAN_NODE 1 #define DERIVATIVE_NODE 2 #define DIVISION_NODE 3 #define MAGNITUDE_NODE 4 #define NON_MAX_SUPP_NODE 5 #define HYSTERESIS_NODE 6 #define SINK_NODE 7 Regards, Shruti + +Shruti, As per this order the execution order will be kernel2 -> divisionNode -> kernel3. So between kernel2 and kernel3 division node is getting called and I am suspecting this is the node which is over writing the zero values which you have filled in kernel 2. Regards, Anshu + +Shurti, Did you get a chance to look on above comment? Regards, Anshu + +Shruti, I am closing this thread as we haven't heard back from you. Please reopen it whenever you start looking into this. Regards, Anshu + diff --git a/data2/text/range/5001-10000/759238.txt b/data2/text/range/5001-10000/759238.txt new file mode 100644 index 0000000000000000000000000000000000000000..46bd13d15aaf77fce946df394e32c9646ca96c9a --- /dev/null +++ b/data2/text/range/5001-10000/759238.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2EVM5777: Questions about IPC 3.45 & it's usage in processor_sdk_vision_03_05_00_00 + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, Tool/software: TI-RTOS Dear TI I am new in the TI products. By learning processor vision sdk, i have some questions about how to use ipc APIs to achieve efficient data transport inter processors or links. In which, data transport , i means data stuctures userdefined other than video frames. Questions: 1. ti_components/os_tools/ipc_3_45_00_00 provides ti ipc libraries support for different ti devices. I need not cared about the details of the ipc modules or utils, such as HeapBufMP HeapMemMP, HeapMultiBufMP, MessageQ, ListMP etc. Am i right? 2. I have tested ipc send by just call System_linkControl api，and i can receive the data in the other link running on the remote core. I followed the System_linkControl function code in vision SDK， shows it's implemented by ipc msgQ module. In the document VisionSDK_SW_Architecture_Overview.pdf, i found the description below: • Message queue will be used to send control commands to the individual links. • This will be used for low frequency (once per 1sec kind of rate) control commands. What troubles me is that the constrain described above is for apis implemented in system_ipc_msgq.c or MessageQ moduel in IPC 3.45. Can i use System_linkControl for efficient data transfer？ If not，how should i do? 3. While fullfillment ipc functions in vision sdk, should i create several msgqs according to my application or just call api，System_linkControl for example，whenever ipc is needed. By asking all of the above questions, what i want to do is front view based ADAS application in TDA2 platform. I found two usecases, which may be reference, in the vision_sdk/apps/: vip_single_cam_object_detection2 and tidl_od. But i have not deep dive into these two usecases for now. I learned all the ipc code/document is just for transfer data such as object_list, which can be genetated by algs like tidl. So, which usecase should i pay more attation to? Which link in the chains fullfill the alg result transfer? How does the format of the TIDL_OD alg result look like, video frames/meta data or user defined structure? Which source file can i find the related code in? Does the TDA2EVM5777 support vip_single_cam_object_detection2 usecase？ Thanks！ Additional，i am not sure which Part number i should select when post questions on this forum. Where could i find the requirement？ + +Responses: +Hi <1> If you use the IPC links of vision SDK, or the System_linkControl API, you do not need to deal with ipc modules or utils, such as HeapBufMP HeapMemMP, HeapMultiBufMP, MessageQ, ListMP etc. <2> System_linkControl api of VSDK is meant for sending the control/configuration command, which is not usually per frame vise. For per frame data transport we use IPC links which uses the Queue architecture and IPC notify, which is the least latency approach. In IPC messageQ, there is copy involves and hence for any big data structure or video frames its not very efficient In data path we use System_sendLinkCmd API to notify the next link instead of System_linkControl. System_sendLinkCmd uses IPC notify internally when it is called across core boundaries <3> You do not need to create any IPC APIs or interface by your own, all required interface is already available in VSDK. Use them accodingly IF you want to use the object detection based on TIDL, then refer \vision_sdk\apps\src\rtos\usecases\tidl_OD IT has algorithms running on differnt cores and exporting data across cores using IPC Links. All create/config are done via System_linkControl API regards, Shiju + +hi, Shiju Thanks for your reply. <1> Why IPC links can achieve least latency? To my understanding, IPC out link do frame copy from systemBuffer of core1 to IPCSharedBuffer, and then IPC in link do frame copy from IPCSharedBuffer to systemBuffer of core2. The systemBuffer is not shared between cores. All queues between ipc link pair are used to manage available buffers. As for IPC messageQ, notify API is also involves. And the data copy to ipcMsgQ shm is needed of course. So if i am right, What's the difference between IPC link frame exchange and IPC messageQ. They all need data copy at last. <2> I noticed ti provides IPC latency test result in "VisionSDk_DataSheet.pdf". But i cannot find out related usecases in the processor_SDK_vision release. So what can i do to reproduce the test, beyond which, i may do some modification to do some further study. regards, LiuGan + +Dear Shiju, Any update? regards, Liu Gan + +Hello Our IPC is based on shared memory architecture and no frame buffer copy involves here, we are only sending address of the buffer which is nothing but a 32 bit value/pointer. copy of this 32 value is not a concern. please refer the data sheet ob VSDK for the IPC link latency numbers across various cores regards, Shiju + +Hello, Ok, we do not have any dedicated UC to measure the IPC latency, but you can use any demos and after running the demo, press "p" to get the run time status, this log shows IPC latency We do not use messageQ in data patch, and this is because msgQ involves copy, MSGQ is used only in control/comfig commands IPC links uses notify instead of MSGQ to reduce the copy and hence low lastecy regards, Shiju + diff --git a/data2/text/range/5001-10000/759778.txt b/data2/text/range/5001-10000/759778.txt new file mode 100644 index 0000000000000000000000000000000000000000..c6293f67e40d6eef5c8c9a4d0a3a53c1699420d4 --- /dev/null +++ b/data2/text/range/5001-10000/759778.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2: ARP32 refers DDR memory address where it should not. + +Query Text: +Part Number: TDA2 Hi, I work in a project in which I use VCOP and ARP32 together. The codeflow is as follows : Kernel 1 ( VCOP / KernelC) -> Kernel 2 (ARP32 / Natural C) -> Kernel 3 ( VCOP / KernelC). I need to use the output buffer of K1 as input buffer in K2. Issue: The output buffer of K1 is in on-chip memory of EVE. (0x400402E0) But, the input buffer in K2 is refering the DDR memory address (0x80000120) , even though the expectation is both the buffers should refer the same on-chip memory address. It is not happening. Question: 1. Can you please let us know, why the input buffer of K2 changed into DDR instead of refering on-chip memory? 2. Can you suggest methods to make ARP32 to read data from on-chip memory only? Regards, Surbhi + +Responses: +Hi Surbhi, How are you exchanging the buffer addresses? Regards, Rishabh + +Hi, //How are you exchanging the buffer addresses? I am not exchanging the buffer addresses across kernels. Actually, I want to know how the addresses are changed from on-chip memory address to DDR memory address between kernels. Regard, Surbhi + +Surbhi, Regarding the following : The codeflow is as follows : Kernel 1 ( VCOP / KernelC) -> Kernel 2 (ARP32 / Natural C) -> Kernel 3 ( VCOP / KernelC). I need to use the output buffer of K1 as input buffer in K2. It is important to note that VCOP can only write to only the internal buffers IBUF, WBUF of EVE. It cannot access DDR/DMEM. Assuming that WBUF is always owned by VCOP, kernel1 would be writing to IBUFL or IBUFH. Now if kernel 2 wants to access these buffer you first need to switch the ownership of the buffer before ARP32 can access it. I hope you have accounted for that in your design. Now regarding kernel2 using an external buffer, can you tell how are you running kernel 2, is it a BAM node in the graph with core type set as BAM_EVE_ARP32? Regards, Anshu + +Hi, Thanks for the reply. //It is important to note that VCOP can only write to only the internal buffers IBUF, WBUF of EVE. It cannot access DDR/DMEM. Assuming that WBUF is always owned by VCOP, kernel1 would be writing to IBUFL or IBUFH. Just for clarification, the K1 writes in WBUF ONLY. And not in IBUFL/IBUFH. //Now if kernel 2 wants to access these buffer you first need to switch the ownership of the buffer before ARP32 can access it. So, your idea is that the same output buffer presents in WBUF can be accessed by K2 (ARP32). Can you please let us know, how to switch the ownership of the buffer before ARP32 can access it. //Now regarding kernel2 using an external buffer, can you tell how are you running kernel 2, is it a BAM node in the graph with core type set as BAM_EVE_ARP32? Yes, I use BAM_EVE_ARP32 as the core type. Regards, Surbhi + +Updated :: //Now regarding kernel2 using an external buffer, can you tell how are you running kernel 2, is it a BAM node in the graph with core type set as BAM_EVE_ARP32? Yes, I use BAM_EVE_ARP32 as the core type. Regards, Surbhi + +Hi, //It is important to note that VCOP can only write to only the internal buffers IBUF, WBUF of EVE. It cannot access DDR/DMEM. For clarification, the Kernel1 which is running in VCOP writes the output data in WBUF only. //Assuming that WBUF is always owned by VCOP, kernel1 would be writing to IBUFL or IBUFH. Can you please let me know how can we ensure that WBUF is always owned by VCOP? //Now if kernel 2 wants to access these buffer you first need to switch the ownership of the buffer before ARP32 can access it. Can you please let me know, how to switch the ownership of the buffer before ARP32 can access it. //Now regarding kernel2 using an external buffer, can you tell how are you running kernel 2, is it a BAM node in the graph with core type set as BAM_EVE_ARP32? Yes, we use BAM node in the graph with core type set as BAM_EVE_ARP32. Regards, Surbhi + +Surbhi, Does kernel 2 uses the data output generated by kernel 1? You can use VCOP_BUF_SWITCH_SET macro to set the ownership of the EVE's internal buffers. An example is as follows : VCOP_BUF_SWITCH_SET(WBUF_VCOP, IBUFHB_VCOP, IBUFLB_VCOP, IBUFHA_SYST, IBUFLA_SYST); This set WBUF, IBUFHB and IBUFLB ownership to VCOP and IBUFHA, IBUFLA to system. I will get back to you on usage of BAM_EVE_ARP32. Regards, Anshu + +Hi, 1. //Does kernel 2 uses the data output generated by kernel 1? Yes, I want the Kernel2 needs to use the data output generated by Kernel1. Let us say, that Kernel 1 writes the output data at WBUF. Then, I want the Kernel2 needs to take that WBUF buffer for its processing. For that purpose. shall I use the command as follows after Kernel1 processing completed? VCOP_BUF_SWITCH_SET(WBUF_SYST, IBUFHB_VCOP, IBUFLB_VCOP, IBUFHA_SYST, IBUFLA_SYST); And, at the end of Kernel 2 proceesing, I return back the ownership of buffers as, VCOP_BUF_SWITCH_SET(WBUF_VCOP, IBUFHB_VCOP, IBUFLB_VCOP, IBUFHA_SYST, IBUFLA_SYST); 2. In my code, Kernel2 takes the input data from DDR. If I use the switch command as I mentioned, will Kernel2 stop using DDR and use only WBUF? 3. One more doubt. Kernel2 is set to execute in ARP32. Can you please tell me that why Kernel2 uses DDR instead of on chip memory? Regards, Surbhi + +Hi Surbhi, You don't have to return back the ownership of the buffers as the framework automatically does so. See line 1052 and 1062 in function BAM_ARP32_computeWrapper() of bam_execute.c . Regarding the 2) and 3), the memory should never be allocated in DDR so it is strange you are getting this behaviour. What is the value of the outBlock[].space you set for K1 output ?I guess you must have set it to BAM_MEMSPACE_WBUF. Also which version of EVE sw release you are using ? regards, Victor + +Hi Victor, //I guess you must have set it to BAM_MEMSPACE_WBUF. -->yes, for all the kernels the outblock[].space is set to BAM_MEMSPACE_WBUF. //Also which version of EVE sw release you are using ? --> eve_sw_01_18_01_00 & processor sdk version PROCESSOR_SDK_VISION_03_03_00_00 //Assuming that WBUF is always owned by VCOP, kernel1 would be writing to IBUFL or IBUFH. [Jan 3, 2019 1:00 PM] Can you please let me know how can we ensure that WBUF is always owned by VCOP? Regards Surbhi + +Hi Surbhi, WBUF is always owned by VCOP by default. It is never owned by SYS=ARP32/EDMA, unless you explicitly call VCOP_BUF_SWITCH_SET(). So that's why if you have kernel that operates on ARP32, you need to call VCOP_BUF_SWITCH_SET() to switch the ownership of WBUF back to SYS in order for ARP32 to operate on it. Regarding the issue of the memory allocated in DDR, instead of WBUF, I think it needs deeper investigation. Can you share with TI some code so we can reproduce the issue ? regards, Victor + +Hi Victor, The following are the Demo code tasks and my observations. 1. In the first case, I created an app as Gaussian (Kernel1)(VCOP) -> Image Inversion (Kernel2)(ARP32). The output buffer of Kernel1 is passed as an input to Kernel2. Observation: The input buffer address at Kernel2 is in on-chip memory. 2. In the second case, I created an app as input kernel (Kernel1)(VCOP) -> Negative (Kernel2)(ARP32) input kernel (Kernel1)(VCOP) -> Erosion (Kernel3)(VCOP) Image Inversion (Kernel2)(ARP32) + Erosion (Kernel3)(VCOP) -> Merge (Kernel4)(VCOP) -> sink node. Observation: a. The input buffer for Kernel which runs in ARP32 is changing into DDR as follows. 0x40054000 input copy 0x40054000 erode 0x40055000 merge 0x80000120 negative b. The order of execution is as per the following execution log. algProcess start calling input copy in execute funs width : 64 height: 32 calling erode in BAM_Erode_initFrame execute funs width : 64 height: 32 calling Merge in execute funs width : 64 height: 32 calling negative in execute funs width : 64 height: 32 But, the expected code flow is from input copy the data is shared between negative kernel and erosion kernel. Then the outputs of negative kernel and erosion kernel are merged in merge kernel and moved to sink node. c. If we branch the data output from one kernel to more than one kernels and in which one of them is executed in ARP32, then the input buffer address for ARP32 kernel turns into DDR memory. Regards, Surbhi + +Hi Victor, any updates? Regards, Surbhi + +Hi Surbhi, There is a constrain listed in Chapter 5 'Current limitations' of BAM user's guide: Specifications of edge list. If one single port of an upstream node has more than one connection, which happens in case of a fork in the graph, then all these connections must be clustered together. For instance in the below image pyramid graph, every DS_NODE’s output port BAM_BLOCKAVERAGE2x2_OUTPUT_PORT has two connections: one to the next DS_NODE and one to SINK_NODE. These connections must appear one afte the other in edge list. If there is a connection involving another node or another port between them then graph creation would be incorrect. The chapter has some example of a valid and invalid edge list. Can you double-check if your code follows the directive ? Thanks. regards, Victor + diff --git a/data2/text/range/5001-10000/759819.txt b/data2/text/range/5001-10000/759819.txt new file mode 100644 index 0000000000000000000000000000000000000000..0ccfbbd02420a70b006b67b80df1586397981cf4 --- /dev/null +++ b/data2/text/range/5001-10000/759819.txt @@ -0,0 +1,54 @@ +Ticket Name: RTOS/TDA2: DSP: DDR and L2SRAM communication using edma + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I am using Processor SDK 3.0 . I want to transfer data to L2SRAM from DDR and vice versa using edma on DSP. For configuring EDMA, I'm referring framecopy link ( frameCopyAlgoLocalDma.c file) While transferring data from DDR, dst address will be L2SRAM ( that is 0x40800000 ), so I have configured edma as, ------- #define DSP1_L2SRAM_ADDR 0x40800000 . . //configuration for write data to l2sram pAlgHandle->pParamSet->destAddr = DSP1_L2SRAM_ADDR; pAlgHandle->pParamSet->srcAddr = (UInt32)inPtr[0]; pAlgHandle->pParamSet->srcBIdx = inPitch[0]; pAlgHandle->pParamSet->destBIdx = inPitch[0]; pAlgHandle->pParamSet->srcCIdx = 0; pAlgHandle->pParamSet->destCIdx = 0; pAlgHandle->pParamSet->aCnt = lineSizeInBytes; pAlgHandle->pParamSet->bCnt = height/NUM_OF_SLICE; pAlgHandle->pParamSet->cCnt = 1; //no. of frames pAlgHandle->pParamSet->bCntReload = height/NUM_OF_SLICE; pAlgHandle->pParamSet->opt = opt; pAlgHandle->pParamSet->linkAddr = 0xFFFF; //configuration for write data back to ddr pAlgHandle->pParamSet->destAddr = (UInt32)outPtr[0]; pAlgHandle->pParamSet->srcAddr = DSP1_L2SRAM_ADDR; pAlgHandle->pParamSet->srcBIdx = outPitch[0]; pAlgHandle->pParamSet->destBIdx = outPitch[0]; pAlgHandle->pParamSet->srcCIdx = 0; pAlgHandle->pParamSet->destCIdx = 0; pAlgHandle->pParamSet->aCnt = lineSizeInBytes; pAlgHandle->pParamSet->bCnt = height/NUM_OF_SLICE; pAlgHandle->pParamSet->cCnt = 1; pAlgHandle->pParamSet->bCntReload = height/NUM_OF_SLICE; pAlgHandle->pParamSet->opt = opt; pAlgHandle->pParamSet->linkAddr = 0xFFFF; --------- Issue is, There is no transfer happening between DDR and L2SRAM ( no data display on output screen). I don't get any compile time errors also at rum time. I checked statistics, SCI_DSP1_EDMA not consuming not even L2SRAM is used. What else I need to do to get this working? What is this >> SCI_DSP1_EDMA ? Regards, Kajal + +Responses: +Hi Kajal, SCI_DSP1_EDMA refers to DSP's EDMA. Each DSP has it's own EDMA which can also be used instead of EDMA. Please see TRM for more details on DSP's EDMA. The L2 memory can be split into L2 RAM (normal addressable on-chip memory) and L2-cache. Can you check what is L2CFG to see if you have indeed set L2MODE to 0? Regards, Rishabh + +Hello Rishabh, Where I will get this TRM for DSP's EDMA ? Can you check what is L2CFG to see if you have indeed set L2MODE to 0? >> In which file L2CFG or L2MODE is defined? I got "L2MODE" term in >> vision_sdk/build/rtos/tda2xx/config_c66.bld:78: l2Mode: "32k", did you mean this file ? Regards, Kajal + +Hi Kajal, You can see TDA2 TRM. L2CFG is a DSP register. Please see CorePac DSP spec (link is given in TDA2 TRM DSP chapter). Regards, Rishabh + +Hello Rishabh, Can you please point me at specific TRM for DSP's EDMA ? What about , >> In which file L2CFG or L2MODE is defined? I got "L2MODE" term in >> vision_sdk/build/rtos/tda2xx/config_c66.bld:78: l2Mode: "32k", did you mean this file ? Where to check L2MODE is set to 0 or not ?? Regards, Kajal + +Hi Kajal, TDA2 TRM is here: www.ti.com/.../sprui29f.pdf You should read chapter 5 to find MMRs. Regards, Rishabh + +Hello Rishabh, setting l2Mode: "0" , doesn't get any data transmission. Note :- I have changed in vision_sdk/build/rtos/tda2xx/config_c66.bld file for DSP1 . Can you please suggest more, what need to do? Regards, Kajal + +At vision sdk level, can I see value of L2CFG register ? ( with out debugging though CCS) Regards, Kajal + +Any Update?? Regards, Kajal + +Hi Kajal, What is the API you are using to do the transfer? System EDMA and local EDMA both are integrated in Vision SDK. Please see PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\links_fw\src\rtos\utils_common\src\utils_dma.c and PROCESSOR_SDK_VISION_03_05_00_00\vision_sdk\links_fw\src\rtos\utils_common\src\dma_cfg\utils_dma_cfg_dsp1.c. Regards, Rishabh + +Hi Rishabh, I want to local EDMA API for DSP. I'm referring frameCopy link for transferring. What's difference between that APIs and suggested by you? Which one shall I use? Regards, Kajal + +Hi Kajal, I would suggest you to use Utils API. Regards, Rishabh + +Hi Rishabh, Utils APIs are the wrappers , internally it calls EDMA3LLD APIs. (correct me if I'm wrong) Do you have any concern to suggest utils API? In my case, I'm calling directly EDMA APIs, but still data transfer is not happening. ---------------- One more thing I noticed while debugging is, 1. When I use dst address as DSP2's L2SRAM i.e. 0x41000000, data transfer happens ( Execution is on DSP1 only). 2. and vice versa. How is this possible ? Regards, Kajal + +Hi Kajal, It seems that each DSP can access it's L2SRAM using the local address and not via the L3. Hence you can access DSP2's SRAM from DSP1 using L3 and vice versa. A simple experiment to confirm this would be trying to access DSP1's RAM from DSP1 using memory browser. You should be able to access via internal view and not L3. Regards, Rishabh + +Hi Rishabh, DSP1' SRAM :- 0x40800000 DSP2's SRAM :- 0x41000000 Are above local addresses correct? ( these addresses i referred from map file >> mem_segment_definition_bios.xs) If not can you point me place where I will get map for local addresses. Regards, Kajal. + +Hi Kajal, 0x40800000 and 0x41000000 are L3 addresses. For DSP the local address is 0x0080_0000. You can see chapter DSP Memory Map in TDA2 TRM. Regards, Rishabh + +Hi Kajal, There is another way to do the EDMA. You can use DSPx EDMA (each DSP has it's own) and give the local address (0x0080_0000). Regards, Rishabh + +Hello Rishabh, Regarding your second last post, 0x40800000 and 0x41000000 are L3 addresses. For DSP the local address is 0x0080_0000. You can see chapter DSP Memory Map in TDA2 TRM. >> what if both DSPs want to access the same l2 sram address at the same time? Regards, Kajal + +Kajal, Using local address you will be able to access only local DSP's L2 SRAM. To access the other DSP's ram you need to use L3 address. Regards, Rishabh + +Yes, but both DSPs are having their local memory, so there will be two different local addresses, right? ( please correct if I'm wrong) In TRM, for each one's local memory, i haven't found their addresses. Regards, Kajal + +Hi Kajal, Local address is same for both DSPs. If you access 0x0080_0000 from DSP1 you will be accessing DSP1's memory and vice versa for DSP2. Local accesses don't go to interconnect hence there is no issue with same address. Regards, Rishabh + +Hi Kajal, As this issue is resolved kindly mark the relevant posts as "This resolved my issue" and close the thread. Regards, Rishabh + +Hello Rishabh , I have one more doubt, Can you check what is L2CFG to see if you have indeed set L2MODE to 0? >> where can I get these registers values for L1 and L2 configuration? Only the CCS, register view is way to see? If want to set bits for them, how will I do this? Regards, Kajal + +Hi Kajal, Can you grep for L2CFG in csl folder. There are APIs defined in \packages\ti\csl\arch\c66x\dsp_icfg.h for L2 registers. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/5001-10000/760039.txt b/data2/text/range/5001-10000/760039.txt new file mode 100644 index 0000000000000000000000000000000000000000..6974e349315928c15b85b79d4fbb1f00c565948c --- /dev/null +++ b/data2/text/range/5001-10000/760039.txt @@ -0,0 +1,16 @@ +Ticket Name: CCS/TDA2: vcop_malloc return 00000000 + +Query Text: +Part Number: TDA2 Tool/software: Code Composer Studio Hi， I use ccs to build and debug the vcop_sobel_xy(PROCESSOR_SDK_VISION_03_05_00_00\ti_components\algorithms\eve_sw_01_19_00_00\kernels\imgsiglib\vcop_sobel_xy\test) project。 in line "inputData = (uint8_t *)vcop_malloc(VCOP_IBUFLA, ALIGN_2SIMD(testcaseParams->inputPitch) * testcaseParams->blockHeight * sizeof(uint8_t));" inputData point to 00000000 How can I solve this problem? + +Responses: +Hi, What is the value of ALIGN_2SIMD(testcaseParams->inputPitch) * testcaseParams->blockHeight * sizeof(uint8_t)? Regards, Anshu + +Hi, Anshu Jain! thanks for the reply! testcaseParams->inputPitch=66 testcaseParams->blockHeight=66 ALIGN_2SIMD(testcaseParams->inputPitch) * testcaseParams->blockHeight * sizeof(uint8_t) = 6336 build warning warning #10247-D: creating output section ".imemha" without a SECTIONS specification warning #10247-D: creating output section ".imemhb" without a SECTIONS specification warning #10247-D: creating output section ".imemla" without a SECTIONS specification warning #10247-D: creating output section ".imemlb" without a SECTIONS specification warning #10247-D: creating output section ".wmem" without a SECTIONS specification warning #10063-D: entry-point symbol other than "_c_int00" specified: "_reset_handler" 'Finished building target: "sobel_kernel.out"' linker.cmd content -e _reset_handler -heap 0x100000 /* For EXTDMEM heap allocation. .sysmem is in EXTDMEM */ -stack 0x3000 MEMORY { PAGE 0: VECMEM : origin = 0x80000000, length = 0x0100 CMDMEM : origin = 0x80000100, length = 0x1000 EXTMEM : origin = 0x80001100, length = 0x20000 PAGE 1: DATMEM : origin = 0x40020000 length = 0x8000 WMEM : origin = 0x40040000 length = 0x7E00 IMEMLA : origin = 0x40050000 length = 0x4000 IMEMHA : origin = 0x40054000 length = 0x4000 IMEMLB : origin = 0x40070000 length = 0x4000 IMEMHB : origin = 0x40074000 length = 0x4000 GEM0_L2_MEM: origin = 0x40800000 length = 0x8000 EXTDMEM : origin = 0x80030000 length = 0x2000000 L3MEM : origin = 0x40300000, length = 0x100000 } #ifdef VCOP_CAMA /*---------------------------------------------------------------------------*/ /* VCOP Compiler Assisted Memory Allocation */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* Define VCOP heap sizes. These can be smaller than the actual memory region*/ /*---------------------------------------------------------------------------*/ IMEML_SIZE = 0x4000; IMEMH_SIZE = 0x4000; WMEM_SIZE = 0x6000; /*--------------------------------------------------------------------------*/ /* Define VCOP heap locations and ensure heaps span the appropriate size */ /*--------------------------------------------------------------------------*/ SECTIONS { .imemla: { *(.imemla) . += (IMEML_SIZE - 8); } > IMEMLA PAGE 1 .imemha: { *(.imemha) . += (IMEMH_SIZE - 8); } > IMEMHA PAGE 1 .imemlb: { *(.imemlb) . += (IMEML_SIZE - 8); } > IMEMLB PAGE 1 .imemhb: { *(.imemhb) . += (IMEMH_SIZE - 8); } > IMEMHB PAGE 1 .wmem : { *(.wmem) . += (WMEM_SIZE - 8); } > WMEM PAGE 1 } #else /*-----------------------------------------------------------------------------*/ /* Disable VCOP Compiler Assisted Memory Allocation by setting heapsize to zero*/ /*-----------------------------------------------------------------------------*/ IMEML_SIZE = 0x0; IMEMH_SIZE = 0x0; WMEM_SIZE = 0x0; #endif /*---------------------------------------------------------------------------*/ /* VCOP Manual Allocation */ /*---------------------------------------------------------------------------*/ SECTIONS { .const > EXTDMEM PAGE 1 //moving to extmem due to dmem space constraint Adata > IMEMLA PAGE 1 Bdata > IMEMHA PAGE 1 Cdata > WMEM PAGE 1 EOutdata > DATMEM PAGE 1 Sdata > DATMEM PAGE 1 Udata > WMEM PAGE 1 Vdata > WMEM PAGE 1 Ydata > WMEM PAGE 1 .cint > DATMEM PAGE 1 .stack > DATMEM PAGE 1 .sysmem > EXTDMEM PAGE 1 .cinit > DATMEM PAGE 1 .cio > DATMEM PAGE 1 .far > EXTDMEM PAGE 1 .fardata > EXTDMEM PAGE 1 .init_array > DATMEM PAGE 1 .vcop_parameter_block > WMEM PAGE 1 } SECTIONS { .intvecs > VECMEM PAGE 0 .inthandler > CMDMEM PAGE 0 .exitlocation > CMDMEM PAGE 0 .text > EXTMEM PAGE 0 { *(.text) } GROUP { .bss /* This order facilitates a single segment for */ .data /* GDP-relative addressing */ .rodata }>DATMEM PAGE 1 SRC_MEM > EXTDMEM PAGE 1 DDR_MEM > EXTDMEM PAGE 1 DST_MEM > EXTDMEM PAGE 1 IBUFLA > IMEMLA PAGE 1 IBUFHA > IMEMHA PAGE 1 IBUFLB > IMEMLB PAGE 1 IBUFHB > IMEMHB PAGE 1 WBUF > WMEM PAGE 1 } + +Hi, Anshu Jain! thanks for the reply! ALIGN_2SIMD(testcaseParams->inputPitch) * testcaseParams->blockHeight * sizeof(uint8_t) = 6336 build warning warning #10247-D: creating output section ".imemha" without a SECTIONS specification warning #10247-D: creating output section ".imemhb" without a SECTIONS specification warning #10247-D: creating output section ".imemla" without a SECTIONS specification warning #10247-D: creating output section ".imemlb" without a SECTIONS specification warning #10247-D: creating output section ".wmem" without a SECTIONS specification warning #10063-D: entry-point symbol other than "_c_int00" specified: "_reset_handler" 'Finished building target: "sobel_kernel.out"' linker.cmd content -e _reset_handler -heap 0x100000 /* For EXTDMEM heap allocation. .sysmem is in EXTDMEM */ -stack 0x3000 MEMORY { PAGE 0: VECMEM : origin = 0x80000000, length = 0x0100 CMDMEM : origin = 0x80000100, length = 0x1000 EXTMEM : origin = 0x80001100, length = 0x20000 PAGE 1: DATMEM : origin = 0x40020000 length = 0x8000 WMEM : origin = 0x40040000 length = 0x7E00 IMEMLA : origin = 0x40050000 length = 0x4000 IMEMHA : origin = 0x40054000 length = 0x4000 IMEMLB : origin = 0x40070000 length = 0x4000 IMEMHB : origin = 0x40074000 length = 0x4000 GEM0_L2_MEM: origin = 0x40800000 length = 0x8000 EXTDMEM : origin = 0x80030000 length = 0x2000000 L3MEM : origin = 0x40300000, length = 0x100000 } #ifdef VCOP_CAMA /*---------------------------------------------------------------------------*/ /* VCOP Compiler Assisted Memory Allocation */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* Define VCOP heap sizes. These can be smaller than the actual memory region*/ /*---------------------------------------------------------------------------*/ IMEML_SIZE = 0x4000; IMEMH_SIZE = 0x4000; WMEM_SIZE = 0x6000; /*--------------------------------------------------------------------------*/ /* Define VCOP heap locations and ensure heaps span the appropriate size */ /*--------------------------------------------------------------------------*/ SECTIONS { .imemla: { *(.imemla) . += (IMEML_SIZE - 8); } > IMEMLA PAGE 1 .imemha: { *(.imemha) . += (IMEMH_SIZE - 8); } > IMEMHA PAGE 1 .imemlb: { *(.imemlb) . += (IMEML_SIZE - 8); } > IMEMLB PAGE 1 .imemhb: { *(.imemhb) . += (IMEMH_SIZE - 8); } > IMEMHB PAGE 1 .wmem : { *(.wmem) . += (WMEM_SIZE - 8); } > WMEM PAGE 1 } #else /*-----------------------------------------------------------------------------*/ /* Disable VCOP Compiler Assisted Memory Allocation by setting heapsize to zero*/ /*-----------------------------------------------------------------------------*/ IMEML_SIZE = 0x0; IMEMH_SIZE = 0x0; WMEM_SIZE = 0x0; #endif /*---------------------------------------------------------------------------*/ /* VCOP Manual Allocation */ /*---------------------------------------------------------------------------*/ SECTIONS { .const > EXTDMEM PAGE 1 //moving to extmem due to dmem space constraint Adata > IMEMLA PAGE 1 Bdata > IMEMHA PAGE 1 Cdata > WMEM PAGE 1 EOutdata > DATMEM PAGE 1 Sdata > DATMEM PAGE 1 Udata > WMEM PAGE 1 Vdata > WMEM PAGE 1 Ydata > WMEM PAGE 1 .cint > DATMEM PAGE 1 .stack > DATMEM PAGE 1 .sysmem > EXTDMEM PAGE 1 .cinit > DATMEM PAGE 1 .cio > DATMEM PAGE 1 .far > EXTDMEM PAGE 1 .fardata > EXTDMEM PAGE 1 .init_array > DATMEM PAGE 1 .vcop_parameter_block > WMEM PAGE 1 } SECTIONS { .intvecs > VECMEM PAGE 0 .inthandler > CMDMEM PAGE 0 .exitlocation > CMDMEM PAGE 0 .text > EXTMEM PAGE 0 { *(.text) } GROUP { .bss /* This order facilitates a single segment for */ .data /* GDP-relative addressing */ .rodata }>DATMEM PAGE 1 SRC_MEM > EXTDMEM PAGE 1 DDR_MEM > EXTDMEM PAGE 1 DST_MEM > EXTDMEM PAGE 1 IBUFLA > IMEMLA PAGE 1 IBUFHA > IMEMHA PAGE 1 IBUFLB > IMEMLB PAGE 1 IBUFHB > IMEMHB PAGE 1 WBUF > WMEM PAGE 1 } + +Hi, Have you added --define VCOP_CAMA to your build options? You need to define VCOP_CAMA during the linking stage of compilation. Regards, Anshu + +Hi, Can you update us whether the above suggestion fixed the issue? Regards, Anshu + diff --git a/data2/text/range/5001-10000/761804.txt b/data2/text/range/5001-10000/761804.txt new file mode 100644 index 0000000000000000000000000000000000000000..c0c54c826ce5b9a7cf3d33a0e1f45247cf929dd0 --- /dev/null +++ b/data2/text/range/5001-10000/761804.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/TDA2: Using vlib for resizing a image effficiently + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hello, I am using existing vlib for resizing a image (i.e. ti_components/algorithms/vlib_c66x_3_3_0_3/packages/ti/vlib/src/VLIB_image_rescale). This library works fine, meaning gives me resized image. Currently it gives around 48 output fps and DSP is utilizing 87%. I want this library results in 60 or more than 60 fps. Until now, as part of optimization i did following things, 1. transferred chunk of data from DDR to internal memory of DSP using edma and processing inside SRAM only. 2. data transfer and processing in ping pong fashion. -------------- I have below doubts/query, 1. At what rate VLIB_image_rescale() can execute? 2. What else I need to do to get min. 60 fps ? Regards, Kajal + +Responses: +What is the input and output resolution and image format? Is it possible you are hitting the limit of the DDR bandwidth? Is there anything else being transferred in the system that would contribute to DDR being maxed out in the use case? + +Hello Jesse, Input resolution : 1920x1080 Output resolution : 960x540 ( resized one) Data format :- SYSTEM_DF_YUV420SP_UV there is nothing transfered in system except output frames( count is 15) . How will I know weather DDR bandwidth ? Because at compile or run time it doesn't give me any error or warning kind of. Regards, Kajal + +Any update? regards, Kajal + +Kajal, Based on the information you have given, the DDR requirement for this transfer is about 222 Mbytes/sec, which is well within the range of DDR throughput limitation, so that should not be the problem. (By the way, if you hit DDR limit, there will be know way for compiler or run-time to know. It is software architect for application development to understand what the limitations of the hardware throughput are when constructing the use case. You simply add up all the reads and writes of data from/to DDR to the chip and make sure that they are within the limits described in the system documentation). Some more questions: 1. Which RAM are you transferring to, L1 or L2? 2. What are the dimensions of the input blocks you are transferring to the SRAM? If they are too small, too much time may be spent on DMA reconfiguration. 3. Are you also writing output to SRAM and transferring to DDR using EDMA, or just writing output of vlib to DDR directly through cache? 4. You said the color format is SYSTEM_DF_YUV420SP_UV. This format is not fully supported by the VLIB_image_rescale function. The rescale function can work on just the luma channel. What is the value of color_format you are using on luma and chroma planes? 5. Since you are doing a half scale in each direction, have you considered the VXLIB_halfScaleGaussian_5x5_i8u_o8u function from VXLIB. It does a gaussian blur followed by a half scale in each direction. It may be faster since it assumes half scale and not arbitrary one. VXLIB is another library which is the kernel library for OpenVX. Jesse + +Hello Jesse, Please find my answers, 1. Which RAM are you transferring to, L1 or L2? >> transferring chunk of data to L2 SRAM from DDR. 2. What are the dimensions of the input blocks you are transferring to the SRAM? If they are too small, too much time may be spent on DMA reconfiguration. >> 12 lines of 1920 width i.e. 1920x12 size of block is transferring into L2SRAM. Also transferring small block of size 1920x4 gives difference of 1ms compare to 1920x12 block, ultimately not much difference in fps. 3. Are you also writing output to SRAM and transferring to DDR using EDMA, or just writing output of vlib to DDR directly through cache? >> processed output is written in L2SRAM only and then that buffer transferred back to DDR using EDMA.. 4. You said the color format is SYSTEM_DF_YUV420SP_UV. This format is not fully supported by the VLIB_image_rescale function. The rescale function can work on just the luma channel. What is the value of color_format you are using on luma and chroma planes? >>I mean SYSTEM_DF_YUV420SP_UV data format is of incoming frame. For VLIB_image_rescale function only luma plane is given for processing i.e. color_format = 3. Regards, kajal. + +Kajal, When I looked closer at this code for LUMA format, the optimized code is the same as the natural C, which operates at 17 cycles per input pixel, which is very poor performance. I suggest you use VXLIB. I personally wrote the optimizations for VXLIB, and it is much better. For example, the halfscalegaussian that I suggested operates at roughly 4.6 cycles per pixel when operating from L2SRAM. If you don't want half scale, then there is also scaleImage functions which give different scale ratios. Please let me know if you can try this instead of VLIB image_rescale. Jesse + +Hello Jesse, I am trying use to vxlib >> VXLIB_halfScaleGaussian_5x5_i8u_o8u instead of vlib. But I'm not getting resized frame. I have set below params, please have a look and let me know if anything I'm missing. srcParam.data_type = VXLIB_UINT8; srcParam.dim_x = pInputChInfo->width; //1920 srcParam.dim_y = pInputChInfo->height; //1080 srcParam.stride_y = pInputChInfo->height; //1080 dstParam.data_type = VXLIB_UINT8; dstParam.dim_x = pOutputChInfo->width; //960 dstParam.dim_y = (pOutputChInfo->height); //540 dstParam.stride_y = pOutputChInfo->height; //540 After checking params( using VXLIB_halfScaleGaussian_5x5_i8u_o8u_checkParams()) results in VXLIB_ERR_INVALID_DIMENSION status. I checked params and changed srcParam.dim_y to (1080 + 4). Though getting same status and not resized frame. Is all params correct?? Regards, Kajal + +Hi Jesse, I'm able to make progress. Issue was with stride_y of both src and dst params. Comments/guidelines given in VXLIB_bufParams.h file for VXLIB_bufParams2D_t structure, it says /*!< \brief Stride in Y dimension in bytes. */ That's why giving stride_y param value incorrect. ---------------------------- Anyways, so now params as, srcParam.data_type = VXLIB_UINT8; srcParam.dim_x = 1920; srcParam.dim_y = 1080; srcParam.stride_y = 1920; dstParam.data_type = VXLIB_UINT8; dstParam.dim_x = 960; dstParam.dim_y = 540; dstParam.stride_y = 960; Are above params are okay? Because might be last two rows and columns are having some garbage data. Kindly suggest for the same. Regards, Kajal. + +From the API header: * @par Assumptions: * - I/O buffer pointers are assumed to be not aliased. * - Input width should be >= (Output width + 2) * 2 * - Input height should be == (Output height + 2) * 2 * - When breaking input image processing into blocks, be sure to fetch enough overlap pixels from the input * for interior edges for the rescale, or else the function may put a false border within the block edge of * of the output image. For each dimension, the required fetch amount should be: * - input block width to fetch = (output block width + 2) * 2 * - input block height to fetch = (output block height + 2) * 2 * * And the amount of left/top overlap to refetch should be: * - left edge overlap = 2 * - top edge overlap = 2 Since this function is using prefiltering (gaussian), this function does not do border replicate or assuming some value, meaning all output pixels are produced from true input pixels, meaning that the output is smaller. This gives the best performance if it is acceptable to have 1 line of border on the output which is not written to (assuming that you center the output. So, assuming you have the full buffer you asked for in the output, you can set the output params to: dstParam.data_type = VXLIB_UINT8; dstParam.dim_x = 960; dstParam.dim_y = 540-2; dstParam.stride_y = 960; If you give the pointer to top of full buffer, then the last 2 lines will not be written to. Alternatively, you can give pointer to beginning of second line to have centered output (top line does not get written to, and last line does not get written to). Also, 2 border pixels per row will be garbage. If you want to avoid the reduction in size of image, you can use the VXLIB_scaleImageNearest_i8u_o8u (which doesn't give preprocessing and may lead to aliasing artifacts). Alternatively, you can use VXLIB_scaleImageBilinear_br_i8u_o8u, which uses interpolation as part of arbitrary scale, and replicates the border. This additional functionality costs extra cycles per pixel. It is about 9-10 cycles per pixel. So if that is still within your budget, it offers the most flexibility. Finally, another option is to use the VXLIB_halfScaleGaussian_5x5_br_i8u_o8u_o8u. It does a half scale with handling of border. However, it gives a second "full sized" output for a special OpenVX case. However, you can try to change the code to remove the writes to dstFull buffer to see if the performance improves, but this may require some more work and testing. Hope this helps. Jesse + +Hello Jesse, Adding 2 in both dim_x and dim_y of dstParams solved my problem For now I'm closing this thread, will come back to you if any issues facing while doing same thing in slices with edma. Regards, Kajal. + diff --git a/data2/text/range/5001-10000/762106.txt b/data2/text/range/5001-10000/762106.txt new file mode 100644 index 0000000000000000000000000000000000000000..0f602a01ae5008ca6ac86bb7a275e5bd345d8862 --- /dev/null +++ b/data2/text/range/5001-10000/762106.txt @@ -0,0 +1,14 @@ +Ticket Name: RTOS/TDA2: SBL halt + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS Hi Expert, I'm running PROCESSOR SDK VISION v03.04.00 rtos on tda2eg custom board. It's OK to work. However, when OSC1 Crystal(AC13/15) is removed, the following halt problem occurs. Could you please give me some advise? Thanks in advance. + +Responses: +Hi, You should set the board to a reserved boot mode and load SBL using CCS. After that do a single step to see where exactly the failure is occurring. Regards, Rishabh + +Hi, I'm try load using CCS run binaries, but no any print. CCS log is below: IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset. IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset. IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset. IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset. IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset. CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.9 GHZs <<<--- CS_DAP_DebugSS: GEL Output: > Setup DebugSS 1.9GHz in progress... CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS PLL Clocking 1.9GHz CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS ATB Clocking 380MHz CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<---- CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> --- CS_DAP_DebugSS: GEL Output: --->>> Mapping TIMER supsend sources to default cores <<<<<<---- CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do. CortexA15_0: GEL Output: --->>> TDA2Ex Target Connect Sequence Begins ... <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex PG2.0 GP device <<<--- CortexA15_0: GEL Output: --->>> The core is in non-SECURE state. <<<--- CortexA15_0: GEL Output: --->>> PRCM Clock Configuration for OPPNOM in progress... <<<--- CortexA15_0: GEL Output: Cortex A15 DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: Cortex A15 DPLL is already locked, now unlocking... CortexA15_0: GEL Output: Cortex A15 DPLL OPP 0 is DONE! CortexA15_0: GEL Output: IVA DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: IVA DPLL OPP 0 is DONE! CortexA15_0: GEL Output: PER DPLL OPP 0 clock config in progress... CortexA15_0: GEL Output: PER DPLL already locked, now unlocking CortexA15_0: GEL Output: PER DPLL OPP 0 is DONE! CortexA15_0: GEL Output: CORE DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: CORE DPLL OPP already locked, now unlocking.... CortexA15_0: GEL Output: CORE DPLL OPP 0 is DONE! CortexA15_0: GEL Output: ABE DPLL OPP 0 clock config in progress... CortexA15_0: GEL Output: ABE DPLL OPP 0 is DONE! CortexA15_0: GEL Output: GMAC DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: GMAC DPLL OPP 0 is DONE! CortexA15_0: GEL Output: GPU DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: GPU DPLL OPP 0 is DONE! CortexA15_0: GEL Output: DSP DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: DSP DPLL already locked, now unlocking.... CortexA15_0: GEL Output: DSP DPLL OPP 0 is DONE! CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 clock config is in progress... CortexA15_0: GEL Output: PCIE_REF DPLL OPP 0 is DONE! CortexA15_0: GEL Output: --->>> PRCM Clock Configuration for OPP 0 is DONE! <<<--- CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules in progress... <<<--- CortexA15_0: GEL Output: module_base: 0x4A009700 CortexA15_0: GEL Output: module_offset: 0x000000C8 CortexA15_0: GEL Output: TIMEOUT CortexA15_0: GEL Output: module_base: 0x4A009700 CortexA15_0: GEL Output: module_offset: 0x000000D0 CortexA15_0: GEL Output: TIMEOUT CortexA15_0: GEL Output: module_base: 0x4A009700 CortexA15_0: GEL Output: module_offset: 0x000000D8 CortexA15_0: GEL Output: TIMEOUT CortexA15_0: GEL Output: module_base: 0x4A009700 CortexA15_0: GEL Output: module_offset: 0x00000130 CortexA15_0: GEL Output: TIMEOUT CortexA15_0: GEL Output: --->>> PRCM Configuration for all modules is DONE! <<<--- CortexA15_0: GEL Output: --->>> DDR3 Initialization is in progress ... <<<--- CortexA15_0: GEL Output: DDR DPLL clock config for 666MHz is in progress... CortexA15_0: GEL Output: DDR DPLL already locked, now unlocking.... CortexA15_0: GEL Output: DDR DPLL clock config for 666MHz is in DONE! CortexA15_0: GEL Output: Launch full leveling CortexA15_0: GEL Output: Updating slave ratios in PHY_STATUSx registers CortexA15_0: GEL Output: as per HW leveling output CortexA15_0: GEL Output: HW leveling is now disabled. Using slave ratios from CortexA15_0: GEL Output: PHY_STATUSx registers CortexA15_0: GEL Output: --->>> DDR3 Initialization is DONE! <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Begin All Pad Configuration for Vision Platform <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Begin All Pad Configuration for RGMII usage on EVM Platform <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Begin GMAC_SW MDIO Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex End GMAC_SW MDIO Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Begin GMAC_SW RGMII0 Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex End GMAC_SW RGMII0 Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Begin GMAC_SW RGMII1 Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex End GMAC_SW RGMII1 Pad Configuration <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex End All Pad Configuration for RGMII usage on EVM Platform <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex End All Pad Configuration for Vision Platform <<<--- CortexA15_0: GEL Output: --->>> TDA2Ex Target Connect Sequence DONE !!!!! <<<--- CortexA15_0: GEL Output: --->>> IPU1SS Initialization is in progress ... <<<--- CortexA15_0: GEL Output: --->>> IPU1SS Initialization is DONE! <<<--- CortexA15_0: GEL Output: --->>> IPU2SS Initialization is in progress ... <<<--- CortexA15_0: GEL Output: --->>> IPU2SS Initialization is DONE! <<<--- CortexA15_0: GEL Output: --->>> DSP1SS Initialization is in progress ... <<<--- CortexA15_0: GEL Output: DEBUG: Clock is active ... CortexA15_0: GEL Output: DEBUG: Checking for data integrity in DSPSS L2RAM ... CortexA15_0: GEL Output: DEBUG: Data integrity check in GEM L2RAM is sucessful! CortexA15_0: GEL Output: --->>> DSP1SS Initialization is DONE! <<<--- CortexA15_0: GEL Output: --->>> IVAHD Initialization is in progress ... <<<--- CortexA15_0: GEL Output: DEBUG: Clock is active ... CortexA15_0: GEL Output: --->>> IVAHD Initialization is DONE! ... <<<--- CortexA15_0: GEL Output: --->>> PRUSS 1 and 2 Initialization is in progress ... <<<--- CortexA15_0: GEL Output: --->>> PRUSS 1 and 2 Initialization is in complete ... <<<--- Thanks in advance. + +Hi, You need to remove gel files from target configuration before doing this. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/5001-10000/765662.txt b/data2/text/range/5001-10000/765662.txt new file mode 100644 index 0000000000000000000000000000000000000000..433b1a9b9ba2bc2ec1939ce2bd584abeb2ef84a1 --- /dev/null +++ b/data2/text/range/5001-10000/765662.txt @@ -0,0 +1,56 @@ +Ticket Name: Compiler/TDA2PXEVM: Facing linker issues while compiling Sources for A15 BIOS + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler 7522.Compiling_Module_file_for_a15.txt diff --git a/apps/MAKEFILE.MK b/apps/MAKEFILE.MK +index f9b9aae..ff87432 100755 +--- a/apps/MAKEFILE.MK ++++ b/apps/MAKEFILE.MK +@@ -7,8 +7,9 @@ APP_LIBS_$(IPU_PRIMARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_PRIMARY_CORE) + APP_LIBS_ipu1_1 = $(DEST_ROOT)/lib/$(PLATFORM)/m4/$(PROFILE_ipu1_1)/app_alg_plugins.aem4 + APP_LIBS_$(IPU_SECONDARY_CORE) = $(DEST_ROOT)/lib/$(PLATFORM)/m4/$(PROFILE_$(IPU_SECONDARY_CORE))/app_alg_plugins.aem4 + ifeq ($(AUTOSAR_APP), yes) +-APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 ++APP_LIBS_$(IPU_SECONDARY_CORE) += $(DEST_ROOT)/lib/$(PLATFORM)/$(IPU_SECONDARY_CORE)/$(PROFILE_a15_0)/app_libs.aa15fg + endif ++APP_LIBS_a15_0 += $(DEST_ROOT)/lib/$(PLATFORM)/a15/$(PROFILE_$(IPU_SECONDARY_CORE))/app_libs.aem4 + APP_LIBS_c66xdsp_1 = $(DEST_ROOT)/lib/$(PLATFORM)/66/$(PROFILE_c66xdsp_1)/app_alg_plugins.ae66 + APP_LIBS_c66xdsp_2 = $(DEST_ROOT)/lib/$(PLATFORM)/66/$(PROFILE_c66xdsp_2)/app_alg_plugins.ae66 + APP_LIBS_arp32_1 = $(DEST_ROOT)/lib/$(PLATFORM)/arp32/$(PROFILE_arp32_1)/app_alg_plugins.aearp32F +@@ -295,6 +296,14 @@ endif + endif + endif + ++ifeq ($(PROC_A15_0_BUILD_INCLUDE),yes) ++ifeq ($(PROC_A15_0_INCLUDE),yes) ++ifeq ($(A15_TARGET_OS),Bios) ++ $(MAKE) -C $($(MAKEAPPNAME)_PATH) CORE=a15_0 $(TARGET) ++endif ++endif ++endif ++ + apps: + $(MAKE) -fMAKEFILE.MK -C $(vision_sdk_PATH)/links_fw/src/rtos apps + +diff --git a/apps/Makefile b/apps/Makefile +index 033b932..04edb0f 100755 +--- a/apps/Makefile ++++ b/apps/Makefile +@@ -42,6 +42,7 @@ endif + -include $(MODULE_SRC_BASE_PATH)/rtos/common/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/board/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/grpxSrc/SRC_FILES.MK ++-include $(MODULE_SRC_BASE_PATH)/rtos/modules/abc/SRC_FILES.MK + ifeq ($(AUTOSAR_APP), yes) + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/autosar_ipcOut/SRC_FILES.MK + -include $(MODULE_SRC_BASE_PATH)/rtos/modules/autosar_ipcIn/SRC_FILES.MK + Hi Anuj, Recently you have provided us a patch for compiling sources for A15 core which runs on BIOS. The usecase with basic pthread in place gets compiled without any issues. Post including "src/include/chains_common.h" (were in function prototype is being added under chains_common.h) it results in following compiler errors. Cannot include "itidl_ti.h" from chains_common.h, so we managed to add those Include directory paths in usescase SRC_FILES.MK file(provided the copy of SRC_FILES.MK) SRCDIR += $($(MAKEAPPNAME)_PATH)/src/rtos/usecases/libdlt_test_sample INCDIR += /opt/V_SDK/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/algorithms/REL.TIDL.01.01.00.00/modules INCDIR += /opt/V_SDK/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/algorithms/REL.TIDL.01.01.00.00/common SRCS_a15_0 += \ chains_libdlt_test_sample.c \ chains_libdlt_test_sample_priv.c With above changes in place the compiler errors are resolved but it resulted in below mentioned linker errors. could you please help us to resolve these issues.. undefined first referenced symbol in file --------- ---------------- libdlt_test_sample /opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/harman_proto_A_bios/lib/harman_tda2px-proto_A/ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/h arman_proto_A_bios/vision_sdk/bin/harman_tda2px-proto_A/vision_sdk_ipu1_0_re lease.xem4" not built make[7]: *** [/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/binaries/apps/harman_proto_A_bios/vision_sdk/bin/harman_tda2px-proto_A/vision_sdk_ipu1_0_release.xem4] Error 1 make[7]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0' make[6]: *** [ipu1_0] Error 2 make[6]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0' make[5]: *** [apps_ipu1_0] Error 2 make[5]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos' make[4]: *** [apps] Error 2 make[4]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/links_fw/src/rtos' make[3]: *** [apps] Error 2 make[3]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/apps' make[2]: *** [apps_exe] Error 2 make[2]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build' make[1]: *** [apps] Error 2 make[1]: Leaving directory `/opt/V_SDK/FFC/FFC_WORKSPACE/source/vision/platform/ti/tda2/build' gmake: *** [vision_sdk] Error 2 + +Responses: +Hi, As you can see this is a linking error which means some how your library is not getting link properly. So how you are linking your library? Have you gone through the below doc vision_sdk\docs\FeatureSpecificUserGuides\VisionSDK_UserGuide_BuildSystem.pdf Regards, Anuj + +Hi Anuj, Is chains_main_bios_iss.oem4 library are you speaking about. I was facing this issue while building the usecase for A15 core. It wasn't the case with IPU_PRIMARY_CORE(IPU1) Do we need to add this as dependency while building for A15 core. I will have a re look at VisionSDK_UserGuide_BuildSystem.pdf. + +Hi, As you can see you are getting undefined symbol for libdlt_test_sample. So where is this symbol defined? As this is not an VSDK symbol. Please link that library. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope you are able to resolve your query. Regards, Anuj + diff --git a/data2/text/range/5001-10000/765707.txt b/data2/text/range/5001-10000/765707.txt new file mode 100644 index 0000000000000000000000000000000000000000..f9b8480534f0fbc599e4d5002bcfc94eac66e84f --- /dev/null +++ b/data2/text/range/5001-10000/765707.txt @@ -0,0 +1,10 @@ +Ticket Name: Linux/TDA2: SDK_VISION_03_06_00_00 Compile failed + +Query Text: +Part Number: TDA2 Tool/software: Linux i am using tda2 evm , i have attempt SDK_VISION_03_04_00_00 and run some case in sdk sccessful ! now i am try SDK_VISION_03_06_00_00 , i build the SDK make linux make linux_install make -s -j dempend sccessful ,but last step make -s -j is failed! follow is the log! # Compiling generated MAIN_APP_c6xdsp1_pe66.oe66 "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 38074: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 38443: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 38641: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 38074: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 38855: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 38443: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 39158: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 39340: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 38641: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 38855: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 39158: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 39522: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 39721: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 39919: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 39340: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 39522: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_1/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp1_pe66.c", line 39721: error: statement is unreachable "/home/hancan/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/binaries/sample_app/tda2xx_evm_linux_all/obj/vision_sdk/tda2xx-evm/c66xdsp_2/release/vision_sdk_configuro/package/cfg/MAIN_APP_c6xdsp2_pe66.c", line 40132: error: statement is unreachable i donot know what is the problem! can you help me ! Shuai! + +Responses: +Hi Shuai, Are there any changes ? If so, could you please Look at your changes Are you hitting any while loop & exit properly or not ? Regards Surya + +Hi: Surya CODEGEN_PATH_DSP ?= $(TI_SW_ROOT)/cg_tools/linux/ti-cgt-c6000_8.2.4 i using ti-cgt-c6000_8.3.0 caused the problem. change back to ti-cgt-c6000_8.2.4 is ok ! but in SDK_VISION_03_02_00_00 SDK_VISION_03_04_00_00 i try ti-cgt-c6000_8.3.0 is ok ! Regards Shuai + diff --git a/data2/text/range/5001-10000/770229.txt b/data2/text/range/5001-10000/770229.txt new file mode 100644 index 0000000000000000000000000000000000000000..661be31a1876fbb3629fe27cb0eec75f1d77b477 --- /dev/null +++ b/data2/text/range/5001-10000/770229.txt @@ -0,0 +1,14 @@ +Ticket Name: Linux/TDA2: Error while executing vision_sdk_load.sh + +Query Text: +Part Number: TDA2 Tool/software: Linux Hi All, We are using TDA2xx board with linux. While running the script vision_sdk_load.sh we are getting the following error [ 79.035426] DMA: Module install successful, device major num = 242 [ 79.041932] DRV: Module install successful [ 79.046048] DRV: Module built on Jun 3 2016 11:43:16 omapconf: powerdm_deinit(): cpu not supported!!![ 79.088993] Alignment trap: omapconf (1957) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6ebfac e FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! [ 79.098868] Alignment trap: omapconf (1957) PC=0x000bfb80 Instr=0x07834005 Address=0xb6ebface FSR 0x811 [ 79.112970] Alignment trap: omapconf (1957) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6ebface FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!! [ 79.126653] Alignment trap: omapconf (1959) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e14ace FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDssIn[ 79.136562] Alignment trap: omapconf (1959) PC=0x000bfb80 Instr=0x07834005 Address=0xb6e14ace FSR 0x811 terruptsOnA15.sh: line 11: @0x4A002ACE:: command not found [ 79.151593] Alignment trap: omapconf (1959) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e14ace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!![ 79.170293] Alignment trap: omapconf (1961) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e1bac e FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDss[ 79.180200] Alignment trap: omapconf (1961) PC=0x000bfb80 Instr=0x07834005 Address=0xb6e1bace FSR 0x811 InterruptsOnA15.sh: line 12: @0x4A002ACE:: command not found [ 79.195191] Alignment trap: omapconf (1961) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e1bace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!! [ 79.213902] Alignment trap: omapconf (1963) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eb6ace FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDssIn[ 79.224129] Alignment trap: omapconf (1963) PC=0x000bfb80 Instr=0x07834005 Address=0xb6eb6ace FSR 0x811 terruptsOnA15.sh: line 13: @0x4A002ACE:: command not found [ 79.239083] Alignment trap: omapconf (1963) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eb6ace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!![ 79.257620] Alignment trap: omapconf (1965) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eb5ac e FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDss[ 79.267647] Alignment trap: omapconf (1965) PC=0x000bfb80 Instr=0x07834005 Address=0xb6eb5ace FSR 0x811 InterruptsOnA15.sh: line 14: @0x4A002ACE:: command not found [ 79.282648] Alignment trap: omapconf (1965) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eb5ace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!! [ 79.301368] Alignment trap: omapconf (1967) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eedace FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDssIn[ 79.311522] Alignment trap: omapconf (1967) PC=0x000bfb80 Instr=0x07834005 Address=0xb6eedace FSR 0x811 terruptsOnA15.sh: line 15: @0x4A002ACE:: command not found [ 79.326551] Alignment trap: omapconf (1967) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eedace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!![ 79.345047] Alignment trap: omapconf (1969) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e90ac e FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDss[ 79.355130] Alignment trap: omapconf (1969) PC=0x000bfb80 Instr=0x07834005 Address=0xb6e90ace FSR 0x811 InterruptsOnA15.sh: line 16: @0x4A002ACE:: command not found [ 79.370156] Alignment trap: omapconf (1969) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e90ace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!! [ 79.388855] Alignment trap: omapconf (1971) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eccace FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDssIn[ 79.398966] Alignment trap: omapconf (1971) PC=0x000bfb80 Instr=0x07834005 Address=0xb6eccace FSR 0x811 terruptsOnA15.sh: line 17: @0x4A002ACE:: command not found [ 79.414002] Alignment trap: omapconf (1971) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6eccace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!![ 79.432551] Alignment trap: omapconf (1973) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e43ac e FSR 0x011 omapconf: clockdm_deinit(): cpu not supported!!! ./disableDss[ 79.442611] Alignment trap: omapconf (1973) PC=0x000bfb80 Instr=0x07834005 Address=0xb6e43ace FSR 0x811 InterruptsOnA15.sh: line 18: @0x4A002ACE:: command not found [ 79.457603] Alignment trap: omapconf (1973) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e43ace FSR 0x011 omapconf: powerdm_deinit(): cpu not supported!!! omapconf: clockdm_deinit(): cpu not supported!!! ./disableDssIn[ 79.477007] Alignment trap: omapconf (1976) PC=0x000bfb1c Instr=0xe7933004 Address=0xb6e8aace FSR 0x011 terruptsOnA15.sh: line 19: @0x4A002ACE:: command not found updated 0x4A002ACE value is 00930000 omapconf: powerdm_deinit(): cpu not supported!!! omapconf: clockdm_deinit(): cpu not supported!!! There is some illegal memory access. Can anyone please let me know how to resolve this. Regards, Deepika + +Responses: +Hi Deepika, Can you please run the ./apps.out binary and see if the application launches? Some of these logs are warnings and can be ignored (in later versions of Vision-SDK, A15 doesn't have access to DSS, hence some of these warnings). Regards Shravan + +Hi Shravan, Thanks for you reply. Actually we are working on VSDK 2.10 and we are facing this issue. Can this be a factor that the surround view is not running. We have TDA2XX EVM board connected with the Fusion Board and the SAT0089 Daughter cards having 6 camera ports. We have connected the cameras.The use case runs without error,it detects the cameras,bur we do not see any output on the display. The cores of the TDA2XX are showing no usage. Regards, Deepika + +Hi Deepika, Can you please post the logs observed? Can you also run the print-stats option in the Vision-SDK menu. Regards Shravan + +Hi Deepika, Any updates here? Regards Shravan + diff --git a/data2/text/range/5001-10000/770984.txt b/data2/text/range/5001-10000/770984.txt new file mode 100644 index 0000000000000000000000000000000000000000..107be10e439afbaf863ad8c780be15738901d698 --- /dev/null +++ b/data2/text/range/5001-10000/770984.txt @@ -0,0 +1,18 @@ +Ticket Name: RTOS/TDA2: I2C error using SAT0089 daughter board after connecting ov10635 camera module + +Query Text: +Part Number: TDA2 Tool/software: TI-RTOS HI, We have connected a SAT0089 daughter board with one OV10635 camera to TDA2xx EVM. And tried to run the single camera capture display usecase (1CH VIP capture + Display) present in the vision sdk. But we are observing following issue :- [IPU1-0] 51.083236 s: [IPU1-0] 51.190355 s: CAPTURE: Create in progress !!! [IPU1-0] 51.190569 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! [IPU1-0] 51.191545 s: CAPTURE: Create Done !!! [IPU1-0] 51.191880 s: DISPLAY: Create in progress !!! [IPU1-0] 51.192460 s: DISPLAY: Create Done !!! [IPU1-0] 51.192643 s: GRPXSRC: Create in progress !!! [IPU1-0] 52.901451 s: GRPXSRC: Create Done !!! [IPU1-0] 52.901848 s: DISPLAY: Create in progress !!! [IPU1-0] 52.902366 s: DISPLAY: Create Done !!! [IPU1-0] 52.902580 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 [IPU1-0] 52.902702 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 246808 B (241 KB) [IPU1-0] 52.902854 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) [IPU1-0] 52.903037 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x89c03000, Total size = 368037888 B (350 MB), Free size = 356978688 B (340 MB ) [IPU1-0] 52.903251 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfb00000, Total size = 127360 B (0 MB), Free size = 92800 B (0 MB) [IPU1-0] 52.914811 s: CHAINS: Sensor create in progress [IPU1-0] 52.915421 s: VIDEO_SENSOR: INST0 : I2C1 : I2C Addr = 0x30 [IPU1-0] 52.916244 s: [IPU1-0] 52.916549 s: i2cMdSubmitChan: i2c1 transfer to slave address 0x30 failed [IPU1-0] 52.916641 s: src/bsp_deviceI2c.c @ Line 765: [IPU1-0] 52.916732 s: I2C1: DEV 0x30: RD 0x300a ... ERROR !!! [IPU1-0] 52.916824 s: src/bsp_deviceI2c.c @ Line 836: [IPU1-0] 52.916915 s: I2C1: Error timeout 1 ms!!! [IPU1-0] 52.917342 s: Assertion @ Line: 510 in /home/user/PSDK_3_5/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYST EM_LINK_STATUS_SOK : failed !!! [IPU1-0] 52.918135 s: Assertion @ Line: 510 in /home/user/PSDK_3_5/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYST EM_LINK_STATUS_SOK : failed !!! [IPU1-0] 52.920423 s: *** UTILS: CPU KHz = 20000 Khz *** [IPU1-1] 52.903891 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU1-1] 52.904074 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 643368 B (628 KB) [HOST ] 52.904471 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [HOST ] 52.904501 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6247680 B (6101 KB) [DSP1 ] 52.904715 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP1 ] 52.904776 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP1 ] 52.904806 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) [DSP2 ] 52.905081 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [DSP2 ] 52.905142 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) [DSP2 ] 52.905172 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 514584 B (502 KB) [EVE1 ] 52.905874 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE1 ] 52.906148 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE1 ] 52.906697 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [EVE2 ] 52.907948 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE2 ] 52.908345 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE2 ] 52.908894 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [EVE3 ] 52.910144 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE3 ] 52.910419 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE3 ] 52.910968 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [EVE4 ] 52.912432 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [EVE4 ] 52.912737 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) [EVE4 ] 52.913255 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252432 B (246 KB) [IPU2 ] 52.914292 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 [IPU2 ] 52.914414 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250104 B (244 KB) Could you please suggest me what can be done ? Regards, Amol + +Responses: +Hi All, Can anyone help us on this issue. We have used the switch settings for LVDS in the Vision Application Board connected to TDA2XX board. Regards, Deepika + +Hi Deepika, I think SAT89 is not supported in the VSDK release, so it might require it working. could you please first check if the lock is detected in the deserializer? Rgds, Brijesh + +Hi Brijesh, Thanks for the reply. I will check regarding deserializer lock. I was going through this. Is it not possible to connect a single camera using SAT0089 board. Thanks Deepika + +Deepika, Even if single camera is connected, it should lock to serializer first, then we would be able to configure and would be able to capture .. Rgds, Brijesh + +Ok Brijesh, We will check this and come back to you. Thanks, Deepika + +Hi Brijesh, There was I2C connectivity issues.We were able to connect the cameras. Thanks Deepika + diff --git a/data2/text/range/5001-10000/771858.txt b/data2/text/range/5001-10000/771858.txt new file mode 100644 index 0000000000000000000000000000000000000000..489c8fe60575b892aca9c9ad923b7cecbcc6b918 --- /dev/null +++ b/data2/text/range/5001-10000/771858.txt @@ -0,0 +1,97 @@ +Ticket Name: Linux/TDA2EVM5777: Error while accessing TI Git repos + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Linux Hello, I am following Linux User Guide from Vision SDK 03.06.00.00, and I am getting the following error while replicating commands from section 2.4.2. sagar@Sagar:~/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/build$ ./hlos/scripts/linux/setup_linux.sh +Linux Build Setup +Cloning Kernel +Cloning into 'omap'... +fatal: unable to connect to git.ti.com: +git.ti.com[0: 198.47.28.208]: errno=Connection timed out + +./hlos/scripts/linux/setup_linux.sh: line 12: cd: omap/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning Cmem +Cloning into 'ludev'... +fatal: unable to connect to git.ti.com: +git.ti.com[0: 198.47.28.208]: errno=Connection timed out + +./hlos/scripts/linux/setup_linux.sh: line 20: cd: ludev/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning UBoot +Cloning into 'u-boot'... +fatal: unable to connect to git.ti.com: +git.ti.com[0: 198.47.28.207]: errno=Connection timed out + +./hlos/scripts/linux/setup_linux.sh: line 28: cd: u-boot/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning SGX ddk +Cloning into 'omap5-sgx-ddk-linux'... +fatal: unable to connect to git.ti.com: +git.ti.com[0: 198.47.28.208]: errno=Connection timed out + +./hlos/scripts/linux/setup_linux.sh: line 36: cd: omap5-sgx-ddk-linux/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Basic Linux Setup for 4.4 done +Download the filesystem and untar + Running "git config --list" returns the following: sagar@Sagar:~/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/build$ git config --list +core.gitproxy=none +core.gitproxy=/home/sagar/git-proxy.sh +http.sslverify=false + I require to access the repos to set up Linux components. Please help me. Thank you. + +Responses: +Hi, can you make sure that corkscrew is called with correct address and port in your git-proxy.sh (the one in VisionSDK_Linux_UserGuide.pdf is given just as example)? Also can you check if commenting out "gitproxy = none" in your /home//.gitconfig can change the behavior? Regards, Yordan + +Hello, I tried commenting out the "gitproxy=none" in my .gitconfig file. My error message changed to: sagar@Sagar:~/PROCESSOR_SDK_VISION_03_06_00_00/vision_sdk/build$ ./hlos/scripts/linux/setup_linux.sh + Linux Build Setup +Cloning Kernel +Cloning into 'omap'... +Couldn't establish connection to proxy: Network is unreachable +fatal: Could not read from remote repository. + +Please make sure you have the correct access rights +and the repository exists. +./hlos/scripts/linux/setup_linux.sh: line 12: cd: omap/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning Cmem +Cloning into 'ludev'... +Couldn't establish connection to proxy: Network is unreachable +fatal: Could not read from remote repository. + +Please make sure you have the correct access rights +and the repository exists. +./hlos/scripts/linux/setup_linux.sh: line 20: cd: ludev/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning UBoot +Cloning into 'u-boot'... +Couldn't establish connection to proxy: Network is unreachable +fatal: Could not read from remote repository. + +Please make sure you have the correct access rights +and the repository exists. +./hlos/scripts/linux/setup_linux.sh: line 28: cd: u-boot/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Cloning SGX ddk +Cloning into 'omap5-sgx-ddk-linux'... +Couldn't establish connection to proxy: Network is unreachable +fatal: Could not read from remote repository. + +Please make sure you have the correct access rights +and the repository exists. +./hlos/scripts/linux/setup_linux.sh: line 36: cd: omap5-sgx-ddk-linux/: No such file or directory +fatal: Not a git repository (or any parent up to mount point /home) +Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS_FILESYSTEM not set). +Basic Linux Setup for 4.4 done +Download the filesystem and untar My git-proxy.sh file has a single line: exec /usr/bin/corkscrew proxyle01.ext.ti.com 80 $* Based on your response, it sounds that this proxy setting I copied from the User Guide is incorrect, and instead I need to use the proxy settings applicable for my corporate network. Is this right? Thank you. + +That's correct - instead of "proxyle01.ext.ti.com 80" you should use your network's proxy and port. Regards, Yordan + +My problem is resolved. It was caused due to the corporate firewall blocking traffic from git.ti.com. Thank you for your support. + diff --git a/data2/text/range/5001-10000/773346.txt b/data2/text/range/5001-10000/773346.txt new file mode 100644 index 0000000000000000000000000000000000000000..39c7de9120e105e3d89e931b6e1e72320d512467 --- /dev/null +++ b/data2/text/range/5001-10000/773346.txt @@ -0,0 +1,42 @@ +Ticket Name: RTOS/TDA2EVM5777: QSPI Flash based SBL & APP images fail to boot as expected + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2, TDA2E Tool/software: TI-RTOS Hi, http://processors.wiki.ti.com/images/b/b7/TDA_SBL_UserGuide.pdf By following above guide and with the use of TDA2XX board, we try to generate and flash SBL & Application images into QSPI flash. In the end there is NO complete application loading. This is the snapshot of Terminal prints after SBL TIIMAGE file is loaded. - can you point out why "SBL Initial Config Failed" comes and how to overcome this? Below are the prints in Terminal window after loading the APP muticore image binary - FYI, MPU_CPU1_ID (value = 1) was used to generated this. <<<<<< DRA72x SBL Boot SBL Initial Config Failed DPLL Configuration Completed Clock Domain Configuration Completed Module Enable Configuration Completed TI EVM PAD Config Completed DDR Config Completed App Image Download Begins Manufacturer ID - 0x1 Device ID - 0x18 WARNING: Device Id Does not Match Trying to boot App Image with header version 1 WARNING: Device Id Does not Match MPU CPU0 Image Load Completed App Image Download Completed ***************************************************************** PMCCNTR counts once every 64 clock cycles, multiple by 64 to get actual CPU cycles SBL Initial Config Cycles - 69304 (5.54 ms) SOC Init Cycles - 217592 (17.40 ms) DDR Config Clock Cycles - 57379 (4.59 ms) App Image Load Cycles - 505157 (40.41 ms) Slave Core Bootup Cycles - 17950 (1.43 ms) SBL Boot-up Cycles - 868601 (69.48 ms) Time at which SBL started IPU1_0 - 71878497 (5750.27 ms) **************************************************************** Jumping to MPU CPU0 App <<<<<< There is no output prints as expected for the "Hello World" print - either in Console or in Terminal window. It's bit urgent so kind attention & inputs are needed soon to resolve... kindly let me know if any additional info. needed. Thanks & Regards, Sathiyan + +Responses: +Hi, You can follow the below sequence to debug: 1. Can you set the board in debug mode as per the user guide. 2. Use CCS to load SBL (built in debug mode) and single step to identify the failure. Regards, Rishabh + +Hi, Thanks for quick input. Yes debug mode was mode in SW2 as per user guide. Do you mean to debug SBL execution and see why "Init Config Failed" error happens? Let me try. But before to that I doubt the options used while creating SBL & APP images. If there is any input in that angle, that would help. Thanks, Sathiyan + +Hi, Did you change anything in default options? Are you using custom board or EVM? Regards, Rishabh + +Hi, It's a EVM board only. Which "default options" you point out? By options in my previous comment, I meant the build options that should be input to generate the SBL (via gmake) and APP (via CCS tool followed by RPRC conversion & then Multicore image generation tool). Thanks, Sathiyan + +Hi, The build command is given in section 4 of SBL user guide. I meant that you need to set debug mode in SYSBOOT and then load the SBL using CCS. Regards, Rishabh + +Hi, One more point. You need to set SW2 for QSPI as per SBL user guide and not debug when you are trying QSPI SBL boot. Regards, Rishabh + +Hi, Yes your above two comments based steps were already taken care... I believe because of this only such Terminal prints (one after SBL alone loaded stage and next after App image loading) are shown in boot sequence. My queries : 1) is the "SBL init config failed" [gets printed as part of the SBL boot sequence] an issue for an incomplete App boot-up ? 2) is there any application note or any other older post in forum or any other document available - which throws light on the command options used in SBL generation (.xa15fg and .tiimage files) & then the APP Image generation (,.rprc and .bin files) ? Thanks in advance, - Sathiyan + +Hi, I will once look at sbl code and get back to you on 1. For 2 I am not sure what is not clear. It’s explained very well in SBL userguide. Regards, Rishabh + +Hi, Thanks for your plan on 1. I wait. Also do you need any generated file to be attached here, so that you can refer the values and henceforth, go through the SBL code? I think 2 is related to the issue pointed in 1. As there are variables (like build options, target configurations, boot modes, etc.,) while generating SBL & APP (as per the SBL user guide), we had to logically pick the values for almost all variables but for some there was trial & error based input involved. I doubt the "SBL init config failed" pointed in 1 is due to some missing details which I intend to get clarified by 2 To name a few of the missing details : - M4 is master or A15 is master? - Core ID / Device ID configuration for the Target and the corresponding value usage while building the APP multicore image ? - QSPI flash writer loading into M4 or A15? (FYI, am always unable to load into M4 as the guide says) - SBL ELF and SBL TIIMAGE loading order ? and loaded into which target? May be when you get back on 1 [ on what all cases "SBL init config failed" is hit ], we can narrow down things w.r.t 2 and proceed further. Thanks in advance, Sathiyan + +Hi, You have misinterpreted my comment. I would like to re-iterate that all the information you need for SBL is already there in user guide. It seems that you are trying to run TDA2E SBL on TDA2 board in above case. Same is mentioned in SBL user guide chapter 2. My suggestion to you would be to go through PDK getting started videos for basics: training.ti.com/getting-started-adas-platform-development-kit-pdk After that go through SBL user guide. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +Hi, No the option (as per Chapter 2) to select for "evmDRA72x or TDA2xx" is yet to be tried and whole steps are yet to be checked. Thanks for trying to know the conclusion, but kindly wait until another 4-5 hours by which I can get back to you whether the issue is resolved completely or not. Meanwhile, is it possible to enable more debug prints in the SBL - because "SBL Initial Config failed" lacks more information rather if the debug logs point out the problematic configuration or (combination of configurations), then it would be much helpful & effective. Hope you agree ! Thanks, Sathiyan + +Hi, Also FYI, the time delay incurred (to verify your suggested steps) is because we are currently working to complete our customised application (which we can directly build with CCS) and test with these SBL user guide steps directly. Thanks for understanding ! - Sathiyan + +Can we get more debug prints or logs in SBL (that can be seen in UART terminal) to ourselves get clarified on these doubts :- - M4 is master or A15 is master? - Core ID / Device ID configuration for the Target and the corresponding value usage while building the APP multicore image ? - QSPI flash writer loading into M4 or A15? (FYI, am always unable to load into M4 as the guide says) - SBL ELF and SBL TIIMAGE loading order ? and loaded into which target? + +Hi, I would strongly recommend you to go through basic training material first whenever you are done with custom application. A15 is master for TDA2x device and flash writer should be run from M4 as given in user guide. SBL elf is not loaded. It is converted to tiimage which is loaded by SBL. Device/Core Id configuration and usage is documented in SBL user guide. You can also see various scripts under \packages\ti\boot\sbl_auto\tools folder. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +>> reply on Feb 18, 2019 2:56 PM >> To name a few of the missing details : >> - M4 is master or A15 is master? >> - Core ID / Device ID configuration for the Target and the corresponding value usage while building the APP multicore image ? >> - QSPI flash writer loading into M4 or A15? (FYI, am always unable to load into M4 as the guide says) >> - SBL ELF and SBL TIIMAGE loading order ? and loaded into which target? >> reply on Feb 20, 2019 7:27 AM >> Can we get more debug prints or logs in SBL (that can be seen in UART terminal) to ourselves get clarified on these doubts :- >> - M4 is master or A15 is master? >> - Core ID / Device ID configuration for the Target and the corresponding value usage while building the APP multicore image ? >> - QSPI flash writer loading into M4 or A15? (FYI, am always unable to load into M4 as the guide says) >> - SBL ELF and SBL TIIMAGE loading order ? and loaded into which target? Hi Rishabh, Though the above two replies/queries are still open (in our perspective), for now we are able to flash & boot the Mailbox Multicore Example Application.. based on some of the inputs from you. So this thread can be closed and for any queries related to above two reply posts, we shall open new post, particularly based on our own customized application boot/flash status. Thanks for the support rendered ! Regards, Sathiyan + +Hi, I would suggest you to go through my last reply and the training material to be clear on the basics. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/773382.txt b/data2/text/range/5001-10000/773382.txt new file mode 100644 index 0000000000000000000000000000000000000000..0cab5e96080f493b8772932ae5639998c21760b1 --- /dev/null +++ b/data2/text/range/5001-10000/773382.txt @@ -0,0 +1,69 @@ +Ticket Name: Linux/TDA2: pci_endpoint_test not registering device in /dev + +Query Text: +Part Number: TDA2 Tool/software: Linux Hello, I am trying to test a PCIe connection between a PC running Ubuntu 16.04 with kernel 4.16.7 and a TDA2p's ARM running kernel 4.4.84. I have followed the instructions from this link: http://processors.wiki.ti.com/index.php/Linux_Core_PCIe_EP_User%27s_Guide and managed to run the TDA2p's PCIe controller in EP mode. I can verify this because the PC enumerated it as an Endpoint (this info obtained from lspci output on PC). When inserting pci_endpoint_test module on PC there are no errors present in dmesg output but the pcitest.sh does not work, says that there is no endpoint test device registered. Upon futher inspection, I've seen that the pci_endpoint_test module is supposed to register a misc device that is to be bound to the endpoint test. However, there is not any device like this in /dev. Thank you for the help in advance. Regards, Nick + +Responses: +Hi Nick, Can you please describe the sequence of operations being followed? Are you powering the TDA2P board after the PC is powered up? If this is the case you may need to rescan the bus after inserting the PCIe? You can also try to remove the parent PCIe bridge before running the rescan of the bus (The below example assumes the parent bridge is 0000\:00\:1d.0. To get the bridge run lspci -tvv) echo 1 > /sys/bus/pci/devices/0000\:00\:1d.0/remove echo 1 > /sys/bus/pci/rescan Regards Shravan + +Hi Shravan, This is not giving me trouble, PC correctly enumerates the TDA2p. The question is related to pci_endpoint_test module that is to be inserted on RC side. I've looked into the code and it is supposed to create an endpoint test device but there were no errors while modprobing so I am not sure what the problem is. Regards, Nick + +Hi Nick, Can you please attach the output of lscpi -vv run on your PC? It could be the endpoint test driver isn't bound to the TDA2P device. Also can you attach the dmesg logs from your PC? Regards Shravan + +Hi Shravan, I have attached two files with this post, 'lspci_log.txt' is a lspci output of the TDA2p device on PCIe bus and the 'dmesg_log.txt' is a dmesg output after executing 'sudo modprobe pci_endpoint_test' and that module is present in lsmod output. lspci_log.txt 06:00.0 Unassigned class [ff00]: Texas Instruments Device ffff + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- (32-bit, prefetchable) + Capabilities: [40] Power Management version 3 + Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) + Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- + Capabilities: [50] MSI: Enable- Count=1/16 Maskable- 64bit- + Address: 00000000 Data: 0000 + Capabilities: [70] Express (v2) Endpoint, MSI 00 + DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us + ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- + DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- + RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ + MaxPayload 128 bytes, MaxReadReq 512 bytes + DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- + LnkCap: Port #0, Speed 5GT/s, Width x2, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us + ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+ + LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk- + ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- + LnkSta: Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- + DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled + LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- + Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- + Compliance De-emphasis: -6dB + LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- + EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- + Capabilities: [100 v2] Advanced Error Reporting + UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- + UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- + CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- + CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ + AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- + + + 2133.dmesg_log.txt Regards, Nick + +Hi Nick, Thank you for the logs. From your logs its clear that the endpoint-test driver isn't bound to the endpoint device. Which kernel version are you using? If you're using kernel 4.4 please set the vendor_id and MSI interrupt count as per the instructions mentioned in the PCIe EP User guide. If you're using the kernel 4.9 and beyond please set the device_id in addition to the vendor_id and MSI count. Regards Shravan + +Hi Shravan, I use kernel 4.4.84 and I'm executing the following script on my TDA2p before I power up the PC and insert the pci_endpoint_test module. #!/bin/sh modprobe pci_epf_test mount -t configfs none /sys/kernel/config cd /sys/kernel/config/pci_ep/ mkdir pci_epf_test.0 cd pci_epf_test.0 echo 0x104c > vendorid echo 16 > msi_interrupts echo "51000000.pcie_ep" > epc I think that everything here is done according to the instructions. Regards, Nick + +Hi Nick, Can you set CONFIG_PCI_EPF_TEST=y instead of building it as a module and see if the issue is still observed? I would assume CONFIG_PCI_ENDPOINT and CONFIG_PCI_DRA7XX_EP are inbuilt. Regards Shravan + +Hi Nick, As an additional step, can you also set the device id (as indicated in the instruction for the 4.9 kernel, this is in addition to the vendor-id and msi count). If it still fails, can you add prints in the probe of the pci_endpoint_test and let us know where the probe fails. Regards Shravan + +Hi Shravan, It seems that something is wrong with the PCIe slot (or something else) of my PC. I tried the test on another one and it worked. Sorry for the inconvenience and thank you for your help so far. Regards, Nick + +Hi Nick, No issues. Thank you for the update. I will close this thread now. Regards Shravan + diff --git a/data2/text/range/5001-10000/774466.txt b/data2/text/range/5001-10000/774466.txt new file mode 100644 index 0000000000000000000000000000000000000000..63ef80b02dd6579859761aee6635da910120692d --- /dev/null +++ b/data2/text/range/5001-10000/774466.txt @@ -0,0 +1,86 @@ +Ticket Name: TDA2: The difference between TDA2HVBRQABC(R)Q1 and TDA2SXBTQABC(R)Q1 + +Query Text: +Part Number: TDA2 Hello I have made two types of the H/W with a slightly different name of TDA Soc At first, everything looks fine including display like a picture #1 when I use TDA2HVBRQABC(R)Q1 on the H/W However, I have been facing an uncertain problem that display image comes out with little green chroma like a below attached picture#2 if I use TDA(TDA2SXBTQABC(R)Q1) Soc The vision SDK software is used with original released version from TI and used same S/W on both side.. we have measured there is 2bits missing on the image data like an attached picture #3 picture #4 is the information of measuring point My question is that the two types of the TDA soc is 100% compatible with same vision SDK software including BSP specifically video input part? So there is no chance the possibility coming different output because of the S/W? or should I have different perpective? Thank you + +Responses: +Hi, you can check the difference between TDA2HV and TDA2SX in "Table 3-1. Device Comparison" in device's Datasheet: www.ti.com/.../tda2sx.pdf (I have pinged the SW experts to comment on the problem you observe) Regards, Yordan + +Thank you I am looking forward to hear the opinion soon + +Hi, By any chance, is it possible that the luma and chroma are swapped? May be, can you dump one of the image and offline analyze it, in one of the YUV viewer? Regards, Brijesh + +I've already checked the display with another grabber deivce and have triple checked the swap possibility. so do you think it should be same whether using TDA2HVBRQABC(R)Q1 or TDA2SXBTQABC(R)Q1 if I use same vision SDK s/w? + +Hi, Are you testing it out with some fixed input pattern? Rgds, Brijesh + +Hi Yes, the color pixed pattern(white,yellow,red,blue,black bar) from the camera is being used for this debugging + +Strange, is it possible to probe the vip input lines and check all bits lines are toggling.. Rgds, Brijesh + +Yes, that is also checked by an oscilloscope. every data bits and clock are toggling + +ok, what processing is enabled in VIP? do you do any scaling, chroma conversion etc.. in VIP path? Rgds, Brijesh + +Crop is enabled but the same software works fine in another H/W using a TDA2HVBRQABC(R)Q1 + +ok, i see you are probing at IPC_in on A15, can you first probe at the capture output, then dup, then select and see if where bits are getting missed. Also i am assuming pinmux is setup correctly for the VIP input in both the cases.. Rgds, Brijesh + +Hello , I am assuming that you are probing the image data at the IPC In on A15, could you please confirm the same? Rgds, Brijesh + +That is correct . I'm probing the image at the IPC in on A15 with image analyzer in ccs v8 and display the monitor as well . You mean i can probe right behind of VIP in IPU1-0? If that so, Can you please tell me the file name and buffer on vision sdk? I thought that source part is generated automatically so i didnt take care much for this debugging reason Thank you + +Hi, Yes, you could buffer at the each link's output and see where is the problem. For the capture, put break point on the capture callback and once it calls Fvid2_Dequeue API, you could get the buffer address from the Fvid2_FrameList.frames[0].addr[0][0].. Take buffer address from this variable and then dump buffer from the CCS memory window. Rgds, Brijesh + +Ok i will try to probe at those points thank you + +Hi Just to double check, do you mean that the file name is fvid2_drvMgr.c in /ti_component/drivers/pdk_01_08_00_16/packages/ti/drv/vps/src/fvid2/src path ? If there is no different output coming out with probing the point on A15, Can I make sure the vision SDK s/w is absolutly compatible with both SOCs ? which means no need to change anything on S/W(VIP part) to apply both sides ? Thank you + +No, if you are using VIP capture link, then you could put breakpoint on CaptureLink_drvProcessData function. After it calls Fvid2_Dequeue, at around line 744, you could get the address of the captured frame in frameList.frames[0]->addr[0][0]. Rgds, Brijesh + +I've just probed the point which you have mentioned above, however it does same. it comes up exact same address value where on A15 Thank you + +You mean, the input buffer containing YUV still have missing 2 bits?? Rgds, Brijesh + +I mean the image from memory dump still looks green But more strange thing is that the data signal on h/w comes in to the TDA2X + +Can you please share the image you captured? + +Also can you please help me understand how sensor is connected to VIP?? + +sure, + +Hi MB, I was asking if you could dump this memory, from the address 0x8b187e00 and size 1280*2*720 and share it here. You could dump the memory from the CCS memory windows. Just right click on CCS memory window and select save memory option, it will ask for the start address, size and format, save it in binary format.. Rgds, Brijesh + +Hi As you said, I've attached the binary file Thank you memory dump.dat + + + +Hi MB, From the dump, it looks like the data is 12bit, not really 8bit per component. I dont really see any msb 4 bits set. could you please check if the YUV input is 12bit or 8bit per component? Rgds, Brijesh + +Hi The yuv data is 16bit from a camera that is composed of 8bit per Y and another 8bit per U and V My final guess is 4bit missing on UV TDA2X_mb.pptx I've attached the block diagram with the result of mesuring. can you please check it out which is possible to force to miss 4bit on S/W side? Thank you p.s : Blue display : 0xEB43 correct Green display : 0x0B03 wrong + +Hi MB, I have one question, i see that you are using vin2a in 16bit input mode, but these pins are muxed with the vout2 pins. Is it possible that when you are overwriting pinmux setting of vin2a when you set pinmux for vout2? vin6a is also muxed with the mcasp and other modules. Essentially when it is running, could you please recheck pinmux settings for the ports where you are seeing issue? Rgds, Brijesh + +Hi Can you please point out the points what i need to see for configuring pinmux for those you mentioned above? Furthermore, An another H/W using TDA2HVBRQABC(R)Q1 is working as with those setup Thank you + +Hi MB, In both the HW, SW is same? Absolutely no change in SW? When the usecease is running, you could open CCS memory window and check PAD IO registers for the VIP input ports.. Rgds, Brijesh + +Yes absolutely same. I use a sd card to run the s/w . So there is no chance to put different one Thank you + +Hi MB, You could check the difference between these two devices at below link. www.ti.com/.../sprs951e.pdf I don't any difference in VIP and DSS between these two device.. Are you sure the other HW components (Serializer/Deserializer, their configuration etc..) are also same between them? Rgds, brijehs + +Yes 100% same except DDR memory size(512mb and 1G) and the soc Is there any chance the TDA2SX is malfunctioning? I have heard the TDA2SX we have that is ES sample version + +ok, lets start with the pinmux register, can you dump pinmux registers for vin2a and vin6a and share it? Dump from CCS memory window when usecase is already running.. Rgds, Brijesh + +Sure i will share it when it is ready Thank you + +register.txtHi I've attached the register dump file from CCS Thank you + +Hi MB, It looks like you have shared DSP registers. I was actually asking for the Pinmux registers for VIN2A and VIN6A. The pinmux registers are part of the control module. Rgds, Brijesh + +Hi I've checked all register box as like attached picture Is there other way to get the information for pinmux register? Thank you + +Hi we've solved the problem with replacing an another MP version chip As I said above, the chip we've used is ES sample version. however, when we replace the ES with MP version, the problem is solved we dont know yet whether the ES sample has broken or some other reasons. and we have reported this issue to the distributer Thank you for your great effort + diff --git a/data2/text/range/5001-10000/778882.txt b/data2/text/range/5001-10000/778882.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f1199cf053cc3b77c7490827a09c33b21fcfda4 --- /dev/null +++ b/data2/text/range/5001-10000/778882.txt @@ -0,0 +1,16 @@ +Ticket Name: RTOS/TDA2PXEVM: Inserting data to MessageQ results in application to hang or unrecovery state. + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hello Everyone, Using MessageQ_put makes my application to hangs and results in unrecovery state. Created a MessageQ with below configurations in NetworkCtrl Module which is part of NDK which runs of A15. Changes in NetworkCtrl module... My structure being.. typedef struct MyMsg { MessageQ_MsgHeader header; uint32_t datasize; } MyMsg; #define HEAP_NAME "myHeapBuf" #define HEAPID 1 #define NUMLOOPS 10 MessageQ_Handle messageQ; MessageQ_Params messageQParams; SyncSem_Handle syncSemHandle; HeapBufMP_Handle heapHandle; HeapBufMP_Params heapBufParams; MyMsg *my_msg; syncSemHandle = SyncSem_create(NULL, NULL); MessageQ_Params_init(&messageQParams); messageQParams.synchronizer = SyncSem_Handle_upCast(syncSemHandle); HeapBufMP_Params_init(&heapBufParams); heapBufParams.regionId = 0; heapBufParams.name = HEAP_NAME; heapBufParams.numBlocks = 1; heapBufParams.blockSize = sizeof(MyMsg); heapHandle = HeapBufMP_create(&heapBufParams); if (heapHandle == NULL) { Vps_printf("HeapBufMP_create failed\n" ); } /* Register this heap with MessageQ */ MessageQ_registerHeap((IHeap_Handle)heapHandle, HEAPID); messageQ = MessageQ_create(MESSAGEQNAME, &messageQParams); Creation of MessageQ was successfull and the same MessageQ ID is being generated/obtained during Open call. Chages in my own module which is been compiled for IPU1-0 core. MessageQ_Msg msgQ = NULL; Vps_printf("Opening the Heap memory \n"); do { status = HeapBufMP_open(HEAP_NAME, &heapHandle); if (status < 0) { Task_sleep(1); } } while (status < 0); Vps_printf(" Registering the Heap with HeapID \n "); MessageQ_registerHeap((IHeap_Handle)heapHandle, HEAPID); do { status = MessageQ_open(MESSAGEQNAME, &remoteQueueId); Task_sleep(10); }while (status < 0); Vps_printf("MessagQ ID obtained through Init %d !!!!! \n",remoteQueueId); msgQ = MessageQ_alloc(HEAPID, sizeof(MessageQ_MsgHeader)); if (msgQ == NULL) { Vps_printf("MessageQ_alloc failed\n" ); } //Intializing the MyMsg Structure memebers ((MyMsg*)msgQ)->datasize = msg.datasize + msg.headersize-sizeof(StorageHeader); Vps_printf(" Mymsg data size is %d !!!!!!!!\n",((MyMsg*)msgQ)->datasize); It works fine till this part post to which I use MessageQ_Put to insert data to MessagQ which makes my application to hangs/crash. /*status = MessageQ_put(remoteQueueId,msgQ); if (status < 0) { Vps_printf("MessageQ_put was not successful with ID being %d!!!!!n", status); }*/ .cfg file changes source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/ipu1_0/Ipu1_0.cfg and source/vision/platform/ti/tda2/links_fw/src/rtos/bios_app_common/tda2px/a15_0/a15_0.cfg var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ'); var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP'); // Maximum length of MessageQ names MessageQ.maxNameLen = 32; Can you guys let me know what would be problem and what makes application to hang or unrecovery state. Please let me know if any further information is needed. + +Responses: +Does the core go into a hang state such that you cannot connect to CCS or do you get an exception or abort? Thanks and Regards, Piyali + +I believe the core went in to hang state, but I haven't tried out with CCS, I didn't get exception but the only to come out is to do hard reset(Restart) + +Can you please connect via CCS and run the code? If there is an exception due to a bad access, you would see some logs on the CCS console output which would give more clues for the issue. Thanks and Regards, Piyali + +I think it may take time for me, as I don't have the setup handy right now, and I would like to mention that inserting the data to MessageQ in the Networkctrl module were the MessageQ creation was happened was successful. Inserting the data from other core was not successful. I was suspecting issue with my TransPortProxy setting for MessageQ in .cfg file. But having these TransportMsg configuration in .cfg file results in linker issues. a_15.cfg and IPU1_0.cfg file var VirtioSetup = xdc.useModule('ti.ipc.transports.TransportRpmsgSetup'); var MessageQ = xdc.useModule('ti.sdo.ipc.MessageQ'); MessageQ.SetupTransportProxy = VirtioSetup; These are the errors reported.. ------------------------ /opt/vision_sdk/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/ipc_3_45_00_00/packages/ti/ipc/rpmsg/RPMessage.c:112:2: error: #error unknown processor! #error unknown processor! ^ /opt/vision_sdk/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/ipc_3_45_00_00/packages/ti/ipc/rpmsg/RPMessage.c:166:5: error: unknown type name 'VirtQueue_Handle' VirtQueue_Handle virtQueue_toHost; ^ /opt/vision_sdk/FFC/FFC_WORKSPACE/sdk/ti/PROCESSOR_SDK_VISION_03_03_00_00/ti_components/os_tools/ipc_3_45_00_00/packages/ti/ipc/rpmsg/RPMessage.c:167:5: error: unknown type name 'VirtQueue_Handle' VirtQueue_Handle virtQueue_fromHost; ^ + +This may be because the macro VAYU is not defined as per the makefiles. Can you please try adding this to the makefile defines -DVAYU and then give the build a try. Did you get a chance to connect to the core via CCS to see which core is crashing and what is the status of the crash? THanks and Regards, Piyali + diff --git a/data2/text/range/5001-10000/780672.txt b/data2/text/range/5001-10000/780672.txt new file mode 100644 index 0000000000000000000000000000000000000000..3ed59e92a129d9945b1dd86052ed35ea14da3ef1 --- /dev/null +++ b/data2/text/range/5001-10000/780672.txt @@ -0,0 +1,68 @@ +Ticket Name: Linux/TDA2EXEVM: [External ] AVB camera packet be dropped by Sequence number broken + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Linux Hi, We executed the usercase of 1: 4CH AVB Capture + Decode + SGX MOSAIC + DISPLAY on TDA2X board. But it couldn't preview the video image on HDMI TV, then enable debug message in the AVB Sequence checking in AVBTP_processRxPackets() function. Due to the broken sequence of packet be dropped, it resulted in the failure of DECODE. The system image was build by Vision SDK v3.5, The u-boot info: U-Boot 2016.05 (Feb 27 2019 - 21:47:31 +0800) arm-linux-gnueabihf-gcc (Linaro GCC 5.3-2016.02) 5.3.1 20160113 GNU ld (GNU Binutils) 2.25.0 Linaro 2015_10 And the kernel info: 4.4.84-00032-g0f6b93d-dirty BTW, the captured AVB packets & the message log as the attached. Could you teach us how to solve the issue of AVB broken sequence number? Thanks. BR, Sam Hsieh 1854.avb_phy_log.txt AVB_captured.rar + +Responses: +Hi Are you using AVB cameras or AVB talker as input data source? Can you use all the tools (versions) and Linux Kernel, uboot as specified by VSDK user guide - \vision_sdk\docs\Linux\VisionSDK_Linux_UserGuide.pdf. Any deviation from this is untested and may result in demo application failure. This user guide has a section, explains - how to build and run AVB on VSDK Linux, please follow the same regards, Shiju + +Hi Shiju, Thank you for your feedback. We used 4 CH AVB camera as the input data source, and confirmed that the User guide described, the AVB talker works fine. We observed that the comments of AVBTP_processRxPackets() [ \avbtp_0_10_00_00\packages\ti\avbtp\avbtp.c] /* we only care about broken sequences after we find the JPEG SOI marker. * If this packet happens to contain it, then don't drop it */ /* * TODO: In the future, we may have to deal with SOI flags that do not * appear at the start of the payload. */ Could you help let me know how to handle the packet without SOI flag? Thanks. BR, Sam Hsieh. + +Hi Sam Ok, thanks for confirming that the UC works with AVB talker. WRT your query on SOI flag, will check and get back to you regards, Shiju + +Hi Shiju, Is there any updates on it? As the avbtp_0_10_00_00_user_guide described: I observed that TDA2 default enable JPEG Restart marker detection flag to lower the system latency during AVBRX initialization. If there is no JPEG marker in the payload, how avbtp_task(avb_handle) notify client Restart JPEG? Otherwise all AVB packets will be dropped by broken equence number. Is it possible caused by CPDMA buffer is not enough? I ever have tried to increase the AVB2NSP_RX_PACKETS (64-> 128), but it results in the memory fauts. It seems that there is some dependencies among AVBTP library, GWMAC and CPDMA modules. Could you teach me how to increase listener the count of AVB2NSP_RX_PACKETS? Thanks. regards, Sam Hsieh + +Hi Shiju, Could you help update the SOI flag? Thanks. BTW, we tested some scenarios with various combinations: AVB[#1]: normal AVB(8081), send one packet frame per 2ms. AVB[#2]: Fast AVB(8061), send one packet frame per 0.7ms OK: It means that no broken sequence occurred; NG: it means that broken sequence occurred often case combinations result 1 4 CH AVB[#1] OK 2 4 CH AVB[#2] NG 3 3 CH AVB[#1] & 1 CH AVB[#2] NG 4 1 CH AVB[#2] OK We also tried to increase the quantity of buffer (AVB_RX_LINK_BUFS_PER_TALKER_DEFAULT, 6 -->16), But the issue broken Sequence occurred often. Could you help teach us how to look into the issue of broken sequence? Thanks. regards, Sam Hsieh + +Hello Sam, For broken sequence, what is CPU load? Also did you check AVB statistics to see if there was buffer underflow encountered? Regards, Prasad + +Hi Prasad, As we observed that the CPU (M4) System load is around 45~50%, didn't see the buffer underflow phenomenon occurred. I tried to change the CPDMA configuration of rxInterruptsPerMsec = 1 (per 1ms). but it is not helpful for the sequence broken. Could you teach me how to identify the all AVB Sequence packets are received in nsp_gmacsw driver module? Thanks. BR, Sam Hsieh + +Hello Sam, AVB module maintains statistics of all drop count etc. in avb2NspStats structure. If you have CCS connection, just put this variable into the "expressions window" and observe which count increases. Hopefully this will give some idea where drop happens and why. To enable statistics, set below to true in your config file. AVBTP.instrumentedBuild = true; typedef struct AVB2NSP_STATS_ +{ + AVB2NSP_PacketTaskStats rxStats; + AVB2NSP_PacketTaskStats txStats; + AVB2NSP_ProcessingStats procStats; +#if defined(AVBTP_INSTRUMENTATION_ENABLED) + uint32_t rxReadyAVBTPPacketEnqueue; + uint32_t rxReadyAVBTPPacketDequeue; + uint32_t rxFreeAVBTPPacketEnqueue; + uint32_t rxFreeAVBTPPacketDequeue; + + uint32_t txReadyAVBTPPacketEnqueue; + uint32_t txReadyAVBTPPacketDequeue; + uint32_t txFreeCPDMAPacketEnqueue; + uint32_t txFreeCPDMAPacketDequeue; + + uint32_t etherTypeError; + uint32_t controlDataPacketCount; + uint32_t streamIDValidFlagError; + uint32_t avbSubTypeError; + uint32_t invalidStreamIDError; + uint32_t invalidPacketSizeError; + uint32_t noBuffersAvailable; + uint32_t outOfSequenceError; + uint32_t insufficientSizeError; +#endif + uint32_t txFreeCPDMAPacketUnderflow; + uint32_t txDroppedPacketCount; + uint32_t txFreeAVBPacketQueueUnderflow; +} +AVB2NSP_Stats; Regards, Prasad + +Hi Prasad, Thank you for your feedback. Yes, I configured the "AVBTP.instrumentedBuild = true", but I have no experience in the CCS tools on the TDA2XX board. Could you help teach me How to setup the connection between DUT and PC (Linux)? Thanks. BR, Sam. + +Hello Sam, Sorry for late reply. Below is app note for CCS information. Please let us know if any clarification. http://www.ti.com/lit/an/sprac17b/sprac17b.pdf Regards, Prasad + +I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). + +Hi Prasad, I still stock in the issue which result from the bandwidth limitation of TDA2X and SWITCH. I estimate the bandwidth requirement per channel AVB camera (100BASET) without Image distortion about 50Mbps. Even though the Ethernet MAC could support 1Gbps, because Both TDA2X and AVB camera don't support Stream Reservation Protocol (SRP), it means that A data stream associated with a stream reservation guaranteed latency &Bandwidth. It results in the AVB packet could be dropped. Could you help teach me how to solve the issue ? Thanks. regards, Sam Hsieh + +Hello Sam, Can you please let me know the contents of statistics registers? (address 0x4848-4900 to 0x4848-4990) Regards, Prasad + +Any update? + +Hi Jondhale, Sorry reply for late. The issue doesn't be fully solved, the root cause could not be identified yet, perhaps be related to the bandwidth of SWITCH. Because I am not familiar with the CCS tools, Could you help teach me how to get statistics registers? (address 0x4848-4900 to 0x4848-4990)? Thanks. Thank you for your support. regards, Sam Hsieh + +For steps on how to debug using CCS please refer to : www.ti.com/.../sprac17b.pdf + diff --git a/data2/text/range/5001-10000/781965.txt b/data2/text/range/5001-10000/781965.txt new file mode 100644 index 0000000000000000000000000000000000000000..26a4f8da9071266c38c224aa0170bf799dc051d5 --- /dev/null +++ b/data2/text/range/5001-10000/781965.txt @@ -0,0 +1,46 @@ +Ticket Name: CCS/TDA2EVM5777: TDA2x Vision EVM Kit – Spectrum Digital (Includes CPU Board and Vision Application Board) + +Query Text: +Part Number: TDA2EVM5777 Tool/software: Code Composer Studio Hello People, We have recently purchased the TDA2x Vision EVM Kit , and a Blackhawk USB560v2 System Trace Emulator from Spectrum digital. I as a beginner tried to work around the EVM by following the steps as 1. Powered the Kit with Supply provided to the CPU board. 2.Created a new target connection for TDA2x processor with Blackhawk USB560v2 System Trace Emulator. 3. Launched the target which is successful. 4. As its a multi core kit, I should be able to connect any one core as a target. 5. It gives me error "that board is held in rest" even though i pressed the reset before connecting,the error stays same. Can you please help me out here,why i am not able to connect to the board.? Also one more question, as the EVM comes with a bottom CPU board and a mounted Vision Application Board. Does powering up CPU board powers up the Vision Application Board too. Regards Sajad + +Responses: +Hi Sajad, Please follow user guide to understand how to connect, load and run the usecase.. Rgds, Brijesh + +Hi Sajad, Are you able to connect to A15 core? Regards, Rishabh + +Hello, As others have mentioned here, follow the user guides. The quick step through to connect to a core successfully is basically: - Download the Vision SDK, you will probably need it for your further development anyway: - Follow the user guide found in the installation folder, everything is in there to get you started. \vision_sdk\docs\UserGuides\VisionSDK_UserGuide_TDA2xx.pdf. In particular, see section "Load using CCS". It explains exactly what you ask, how to install device support and initialization gel scripts. how to connect to target and bring the board up, etc. Hope it helps, thanks, Alex + +Dear Guys, Thanks for all the help, I have downloaded the user guide and VISION SDK is also installed. Is it needed to built and compile the code for user cases through Command prompt, i mean we should be able to do same using CCS, if the same project can be Imported into CCS window and then builded up and uploaded to EVM. Also I have the following queries 1. I have two SDK vision Guides, Vision SDK TDA2xx (v03.06.00) & Vision SDK TDA2xx v02.09.00, Everthing is same in both except the later uses some other method to build the user cases, Why is that and which guide should i follow? 2. Are there any Prebuild user cases within SDK, which can be directly ported onto the hardware without building? 3. Is there any demo based on surround view also which is already Prebuilded? Regards Sajad + +Hi Sajad, Can you refer to Vision SDK Training series. training.ti.com/tda2-and-tda3-processors-training-series training.ti.com/introduction-processor-sdk-vision Regards, Rishabh + +Also make sure to use the latest Vision SDK i.e. 03.06 release. Regards, Rishabh + +Hello Rishabh, I have gone through the video series, TDA2x Video Part3 is not opening,there is some problem in website in running the demo. Also the videos skip the most of the parts. Could you help me in providing a prebuild binary for the board or if it comes with SDK vision , which can be directly loaded on the board using ccs. Also please confirm if i can import the user cases in CCS and build in CCS without going into CMD based build option? Regards Sajad + +Hi, Prebuilt binaries are also present in the release page: software-dl.ti.com/.../index_FDS.html. Also we don't support CCS based projects, only makefile build is supported. Regards, Rishabh + +Dear Rishabh, I have tried with make file build option and followed the steps as per the user guide, My cmd is still building it but it shows compilation failure with some cases. PIc Attached.. Normally how much time it takes to build the binaries. Regards sajad + +Dear Rishabh, In cmd , following commands are to be run >gmake -s -j depend > gmake -s -j --user guide mentions that if not sure about the number of CPU's, not to use "-j". --will it run fine As the guide v03.06.00 Suggests in section 3.3 step 2 that set required config MAKECONFIG = tda2xxevm_bios_all And when i open the file Rules.make ,the line is there as MAKECONFIG ?= tda2xxevm_bios_all Do i have to remove that '?' symbol. + +Hi Sajad, "-j" is to invoke multiple builds in parallel. Depending upon the machine you are using you can choose to build using '-jx' where x is num of CPUs or without '-j' option. Wrt questions like the one for '?' symbol mentioned above, I would suggest you to try and see. Regards, Rishabh + +Hi Rishabh, I have followed the whole process, using Make Setup, It gives me errors as in image attached. Also please can you tell me where and which location of Vision SDK those files get generated, On ARP32_EVE_4, load the binary, “vision_sdk_arp32_4_release.xearp32F”. On ARP32_EVE_3, load the binary, “vision_sdk_arp32_3_release.xearp32F”. On ARP32_EVE_2, load the binary, “vision_sdk_arp32_2_release.xearp32F”. On ARP32_EVE_1, load the binary, “vision_sdk_arp32_1_release.xearp32F”. On C66xx_DSP2, load the binary, “vision_sdk_c66xdsp_2_release.xe66”. On C66xx_DSP1, load the binary, “vision_sdk_c66xdsp_1_release.xe66”. On Cortex_M4_IPU1_C0, load the binary, “vision_sdk_ipu1_0_release.xem4”. On Cortex_M4_IPU1_C1, load the binary, “vision_sdk_ipu1_1_release.xem4”. On CortexA15_0, load the binary, "vision_sdk_a15_0_debug.xa15fg” + +Hi, You need to install A15 compiler. Please refer to user guide. You should search for the error messages on e2e forum. Most likely the question would have already been answered in the past. Regards, Rishabh + +Dear Rishabh, As the user guide gives the link for ARM compilier as i have already installed it and it is in the location as per the user guide steps. STEP 1. STEP 2. installed in location C:\ti\PROCESSOR_SDK_VISION_03_06_00_00\ti_components\cg_tools\windows Can you Please Verify the path Regards Sajad + +Hi Sajad, Did you search this error on forum? Your path in Rules.make must be different from installation path. Regards, Rishabh + +Hey Rishabh, Thank You for all the help. I was able to find out the issue which was that by default the ARM 15 compiler installs in directoey as /ti_components\cg_tools\windows\4.9 2015q3 & we have to replace it as ti_components/cg_tools/windows/gcc-arm-none-eabi-4_9-2015q3. It is compiling till now without any isssues. But still it would be great if i could do all this using CCS alone, any docs for same? Regards Sajad + +Hi, Glad that the issue is resolved. Please mark the posts that helped you as "This resolved my issue" and close the thread. As I have already mentioned previously, SDK cannot be built as a CCS project. It has too many components and multiple dependencies. Regards, Rishabh + +Hey Rishabh, Does that mean , if i have to edit anything as per my needs, I have to edit all the required dependencies and build it again using same procedure to view the results. Regards Sajad + +Hi Sajad, BIOS only build involves only two commands i.e. "make -s depend" and "make -s". If you are changing anything in dependent components say PDK, then you need to build "depend" as well as SDK otherwise "make -s" is sufficient for SDK only changes. Also please note that builds will be incremental in nature. Make system will identify the changed files and build only those files. In case you add new headers or make more involved changes wrt makefiles you might need a clean build. Regards, Rishabh + +Hi Rishabh, Thank you for all the info provided. Really Appreciated. Regards Sajad + diff --git a/data2/text/range/5001-10000/782460.txt b/data2/text/range/5001-10000/782460.txt new file mode 100644 index 0000000000000000000000000000000000000000..27606260974059528343d5e2a35524ca74fa704f --- /dev/null +++ b/data2/text/range/5001-10000/782460.txt @@ -0,0 +1,34 @@ +Ticket Name: Linux/TDA3: Camera tests throwing failed assertion "status == SYSTEM_LINK_STATUS_SOK" error + +Query Text: +Part Number: TDA3 Tool/software: Linux Whenever I try to run any of the tda3xx_RVP demos, I get the following error: [IPU1-0] 20.146220 s: Assertion @ Line: 574 in /srv/jenkins/workspace/Vision_SDK/D3_Platform/Vision_SDK_3.02.00.00/sdk_manager/staging/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! I'm not sure if I'm running a demo for the tda2 when I shouldn't be, or if there is something else going on. This is the full terminal log: I also tried to change the camera model, but got a different error: 13.274629 s: Assertion @ Line: 548 in captureLink_drv.c: pInst->captureVipHandle != NULL : failed !!! + +Responses: +Hi Adam, You should set MAKECONFIG to tda3xx_rvp_bios_all. Can you share the Rules.make. Regards, Rishabh + +Which usecase are you trying to run? From the assertion, it looks like you are trying some VIP based usecase, could you please make sure that the Ov10635 sensor is connected? Rgds, Brijesh + +Here is the Rules.make # file name: Rules.make # set up the build environment ifeq ($(vision_sdk_PATH), ) # # Application to build for # # Supported Applications are: # sample_app # apps MAKEAPPNAME?=apps # # Config to use # # Selecting a config selects the system config and modules to include # in the build # # Edit the detailed config in file # $(vision_sdk_PATH)/$(MAKEAPPNAME)/configs/$(MAKECONFIG)/cfg.mk # # Supported "out of box" configs are listed below # - TDA2x Configs, # tda2xx_evm_bios_all # tda2xx_rvp_bios_all # tda2xx_evm_bios_opencx # tda2xx_evm_bios_radar # tda2xx_evm_linux_all # tda2xx_rvp_linux_all # tda2xx_evm_linux_infoadas # tda2xx_evm_linux_opencl # tda2xx_evm_linux_opencx # tda2xx_evm_robust_rvc # # - TDA3x Configs, # tda3xx_alps_bios_radar # tda3xx_evm_bios_all # tda3xx_evm_bios_radar # tda3xx_rvp_bios_all # tda3xx_evm_bios_iss # tda3xx_rvp_bios_iss # # - TDA2Ex Configs, # tda2ex_17x17_evm_linux_all # tda2ex_evm_bios_all # tda2ex_evm_linux_all # tda2ex_evm_linux_infoadas # tda2ex_evm_robust_rvc # # - TDA2Px Configs, # tda2px_evm_bios_all # tda2px_evm_bios_radar # tda2px_evm_linux_all # tda2px_evm_linux_infoadas # tda2px_evm_bios_iss # # MAKECONFIG?=tda3xx_rvp_bios_all # Default build environment # Options: Windows_NT or Linux BUILD_OS ?= Linux ifeq ($(OS),Windows_NT) BUILD_OS=Windows_NT endif # # Set BUILD_MACHINE to 32BIT as required, this is needed only # if A15_TARGET_OS is going to be Linux # # Options: 32BIT or 64BIT BUILD_MACHINE ?= 64BIT vision_sdk_RELPATH = vision_sdk vision_sdk_PATH := $(abspath ..) # Application paths $(MAKEAPPNAME)_PATH := $(vision_sdk_PATH)/$(MAKEAPPNAME) include $($(MAKEAPPNAME)_PATH)/configs/defaults.mk include $($(MAKEAPPNAME)_PATH)/configs/cfg.mk include $($(MAKEAPPNAME)_PATH)/configs/autorules_header_cfg.mk include $(vision_sdk_PATH)/build/tools_path.mk include $($(MAKEAPPNAME)_PATH)/configs/autorules_footer_cfg.mk endif include $(MAKERULEDIR)/build_config.mk include $(MAKERULEDIR)/platform.mk include $(MAKERULEDIR)/env.mk include $(MAKERULEDIR)/component.mk export MAKEAPPNAME export $(MAKEAPPNAME)_PATH export MAKECONFIG I think I had it set up to build for tda3xx_rvp_bios_all, but in addition to the build for tda3xx_rvp I also built an AppImage for tda3xx_evm on accident so maybe I got them confused and put the evm one on my SD card. Would running the AppImage generated from the wrong MAKECONFIG produce the error I keep seeing? + +I'm trying to run Single Camera Usecases --> 1CH VIP capture + Display. The camera is connected, but its an ov10640 sensor not an ov10635. + +Hi Adam, You can try the clean build in order to make sure that you are using the correct AppImage. But OV10640 will not work for OV10635 use case. Can you try with OV10635. Regards, Rishabh + +I rebuilt the AppImage but I'm still getting the error. Is the Single Camera use case for OV10635 only? If so which use case should I be running just to test if the OV10640 is working? + +Hi Adam, Assuming the following A. Camera module is connected to RVP via FPD Link III (Refer VisionSDK_UserGuide_TDA3xx_RVP.pdf Section "ISS Multiple Channel (SRV) Use-case Hardware Setup") Note that casing for RVP is removed in this picture. B. Camera module is IMI (i.e. OV10640 with UB913 Serializer) Please check on the following 0. Connect the camera module to one of connector on the edge (i.e. connector on the boundary) 1. Ensure it's built as described in section "Building the application" of VisionSDK_UserGuide_TDA3xx_RVP.pdf 2. Choose OV10640 as described in section "Run the demo" of VisionSDK_UserGuide_TDA3xx_RVP.pdf 3. Choose "5: ISS Usecases, (TDA3x ONLY)"" 4. Choose "1: 1CH ISS capture + ISS ISP + ISS LDC+VTNF + Display" If you still see failure, connect the camera to 0. Connect the camera to other edge connector and repeat above steps (1 to 4) Regards, Sujith + +I tried the steps you provided and the TDA threw the following error when the camera was plugged in to both edge connectors: [IPU1-0] 18.715945 s: I2C0: Error timeout 1 ms!!! [IPU1-0] 18.716006 s: Assertion @ Line: 384 in /srv/jenkins/workspace/Vision_SDK/D3_Platform/Vision_SDK_3.02.00.00/sdk_manager/staging/vision_sdk/apps/src/rtos/iss/src/common/app_util_iss.c: 0 == status : failed !!! + +It's quite strange. Can you check if the initial configuration is going through or the very first write is failing? also, would be possible to attach the camera module picture that you are using? Regards, Sujith + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + +The initial configuration goes through. It seems like the tda3 is timing out when it tries to connect to i2c devices during start up. Also here are some pictures of the camera module: + +The Camera module seems okay, let me check with others. Regards, Sujith + +It looks like you are running VIP capture instead of ISS capture. The camera you are is OV10640, the right sequence of commands should be: s2a51 If that does not work, please attach the complete log including the menu options you are selecting. + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/5001-10000/786820.txt b/data2/text/range/5001-10000/786820.txt new file mode 100644 index 0000000000000000000000000000000000000000..b6624dbea3bfe65d8f9c3e8ddab41a630a599697 --- /dev/null +++ b/data2/text/range/5001-10000/786820.txt @@ -0,0 +1,66 @@ +Ticket Name: Compiler/TDA2-17: vision sdk compile error can't find a JVM + +Query Text: +Part Number: TDA2-17 Tool/software: TI C/C++ Compiler Dear TI， I have two Ubuntu machinces. 1. I compiled visionSDK successful in machine one. 2. And then i execute make clean before i commint all the released code to svn. 3. I checked out the code into the second machine and compile it as： make clean; make allclean; make linux_clean make linux make linux_install make -s -j depend make -s -j 4. Got the compile errors when i try to `make -s -j` /home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule. +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule. +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignLUT_tda2xx.oe66' given more than once in the same rule. +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build/rtos/makerules/rules_66.mk:185: target `/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/binaries/apps/tda2xx_evm_linux_all/obj/app_alg_plugins/tda2xx-evm/66/release/GAlignExt_tda2xx.oe66' given more than once in the same rule. +XDC_CFG_FILE: +# Invoking configuro... +# Invoking configuro... +XDC_CFG_FILE: +XDC_CFG_FILE: +# Invoking configuro... +# Invoking configuro... +# Invoking configuro... +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: make[6]: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +*** [xdc_configuro] Error 1 +XDC_CFG_FILE: +make[5]: *** [apps_eve3] Error 2 +make[5]: *** Waiting for unfinished jobs.... +make[6]: *** [xdc_configuro] Error 1 +make[5]: *** [apps_dsp2] Error 2 +# Invoking configuro... +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +make[6]: *** [xdc_configuro] Error 1 +make[5]: *** [apps_eve2] Error 2 +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +make[6]: *** [xdc_configuro] Error 1 +make[5]: *** [apps_eve4] Error 2 +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +make[6]: *** [xdc_configuro] Error 1 +make[5]: *** [apps_dsp1] Error 2 +/home/gan.liu/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/xs.x86_64U: error: can't create session manager: can't find a JVM; try setting the environment variable 'XDCTOOLS_JAVA_HOME' to the absolute path of any directory containing a 64-bit Java Runtime Environment (1.7 or greater); e.g., '/usr/lib/jvm/java-7-openjdk-amd64'. +make[6]: *** [xdc_configuro] Error 1 +make[5]: *** [apps_eve1] Error 2 +make[4]: *** [apps] Error 2 +make[3]: *** [apps] Error 2 +make[2]: *** [apps_exe] Error 2 +make[1]: *** [apps] Error 2 +make: *** [vision_sdk] Error 2 +gan.liu@ubuntu:~/server/PROCESSOR_SDK_VISION_03_05_00_00/vision_sdk/build$ + make config : tda2xx_evm_linux_all So , what can i do to solve this problem? Regards, Liu Gan + +Responses: +Hi, Can you check below threads: e2e.ti.com/.../1904682 e2e.ti.com/.../907733 Regards, Rishabh + +Hi Rishabh, I have checked the threads you post, but they are not help for my problem. add to check out Machine 1 -------------------> svn --------------------------> Machine 2 compile success compile failed Regards, Liu Gan + +Hi Liu, Can you confirm if Java is installed on 'Machine-2' Ubuntu PC? You may find the below link useful. https://stackoverflow.com/questions/22539779/how-to-tell-if-jre-or-jdk-is-installed Once this is done, you can export the XDCTOOLS_JAVA_HOME variable to the jdk path, and it should build. Regards Shravan + +Hi Shravan， I'm sorry I missed an important message. I didn't get any error if i reinstall VisionSDK on 'Machine-2'. In addition, why should i export XDCTOOLS_JAVA_HOME variable manually? snippet from ti_components/os_toos/linux/xdctools_3_32_01_22_core/packages/xdc/bld/xdc_rules.mak: XDCTOOLS_JAVA_HOME ?= $(XDCROOT)/jre my jre directory : gan.liu@ubuntu:~/server/PROCESSOR_SDK_VISION_03_05_00_00/ti_components/os_tools/linux/xdctools_3_32_01_22_core/jre$ ls +bin lib man README THIRDPARTYLICENSEREADME-JAVAFX.txt Welcome.html +COPYRIGHT LICENSE plugin release THIRDPARTYLICENSEREADME.txt + So I think the variable ‘XDCTOOLS_JAVA_HOME ’ should be set automatically by Makefile，am i right? BTW, my workmates need use the code from svn for their own jobs. That's why i must solve the problem. Regards， Liu Gan + +Hi Liu, Whenever you build on another machine, its recommended you build perform a clean build. Does make clean, make depend etc. work and its failing only during 'make -s -j'? If this is the case, what are the changes you're committing to your SVN? It could be that you're modifying some of the make files which is updating the build path for some tools preventing the make from executing. Regards Shravan + +Hi Shravan， Yes, you are right. Only 'make -s -j' reported the error. I executed 'make clean' and 'rm -rf vision_sdk/binary/' before I committed the code to SVN. I compared the vision_sdk/build/tools_path.mk files from the check out code and newly installed, they are all the same... So, can you provide some other makefiles for me to review? Regards， Liu Gan + +Hi Liu, Can you please review the changes you're committing to SVN. Also it is recommended you have separate repository for Vision-SDK alone (not bundle everything into one component). Also can you follow the suggestion here in this post and see if it helps (Ensure you aren't running using sudo). e2e.ti.com/.../512844 Regards Shravan + +Hi Shravan, Thanks for your help. I solved this by accident. It is a stupid mistake. I found that all .so/.a files are missed in the checked out code. May be i executed command like 'find . -name --delete', before i committed the code to svn. It was about two monthed ago, I can't remember exactly...... Regards, Liu Gan + +Hi Shravan It's the svn "global-ignores" feature that cause this problem. When i try to commit all the files to svn, it ommits the following filse types by default. Regards, Liu Gan + diff --git a/data2/text/range/5001-10000/787931.txt b/data2/text/range/5001-10000/787931.txt new file mode 100644 index 0000000000000000000000000000000000000000..05b88514525f95348e26d0e8dd967040186a3c85 --- /dev/null +++ b/data2/text/range/5001-10000/787931.txt @@ -0,0 +1,50 @@ +Ticket Name: TDA2SX: TIDL limitations + +Query Text: +Part Number: TDA2SX Hi everyone, I have model trained in Caffe framework and want to convert it using TIDL converter. From TIDL documentation I read that dense convolution flow is supported for only 1x1 and 3x3 kernels with stride = 1 and dilation =1. Also I read about conv2DKernelType parameter for conversion process: conv2DKernelType can be either 0 or 1 for each layer. Default value is 0 for all the layers. Set it to 0 to use sparse convolution, otherwise, set it to 1 to use dense convolution. In prototxt file of my model, I noticed that stride is set to 2. So, if conv2DKernelType is by default 0, sparse convolution is used for all layers, there shouldn't be any limitations regarding above mentioned, right? I also tested version where I set conv2DKernelType values for layers to 1, to use dense convolution, which is clearly not supported and I got the same output like for sparse convolution. So my question is, can we influence type of convolution with conv2DKernelType parameter? Another thing I noticed is that when processing sample frame some negative values could be seen for sparsity attribute. Can someone explain what this attribute mean and why there are negative values? Layer 1 : Out Q : 28 , TIDL_ConvolutionLayer, PASSED #MMACs = 19.44, 12.87, Sparsity : 33.80 + Layer 2 : Out Q : 11 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.48, 6.48, Sparsity : 0.00 + Layer 3 : Out Q : 3 , TIDL_ConvolutionLayer, PASSED #MMACs = 46.08, 27.54, Sparsity : 40.23 + Layer 4 : Out Q : 9 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.24, 3.24, Sparsity : 0.00 + Layer 5 : Out Q : 4 , TIDL_ConvolutionLayer, PASSED #MMACs = 46.08, 49.81, Sparsity : -8.11 + Layer 6 : Out Q : 17 , TIDL_ConvolutionLayer, PASSED #MMACs = 6.48, 6.48, Sparsity : 0.00 + Layer 7 : Out Q : 27 , TIDL_ConvolutionLayer, PASSED #MMACs = 92.16, 100.10, Sparsity : -8.62 + Layer 8 : Out Q : 53 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 9 : Out Q : 51 , TIDL_ConvolutionLayer, PASSED #MMACs = 47.32, 53.86, Sparsity : -13.82 + Layer 10 : Out Q : 62 , TIDL_ConvolutionLayer, PASSED #MMACs = 3.33, 3.33, Sparsity : 0.00 + Layer 11 : Out Q : 87 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 106.89, Sparsity : -12.95 + Layer 12 : Out Q : 74 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.83, 0.83, Sparsity : 0.00 + Layer 13 : Out Q : 126 , TIDL_ConvolutionLayer, PASSED #MMACs = 47.32, 47.28, Sparsity : 0.07 + Layer 14 : Out Q : 136 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 15 : Out Q : 195 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 94.55, Sparsity : 0.09 + Layer 16 : Out Q : 39 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 17 : Out Q : 278 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 94.47, Sparsity : 0.18 + Layer 18 : Out Q : 333 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 19 : Out Q : 399 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 94.26, Sparsity : 0.40 + Layer 20 : Out Q : 527 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 21 : Out Q : 473 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 94.39, Sparsity : 0.25 + Layer 22 : Out Q : 392 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.66, 1.66, Sparsity : 0.00 + Layer 23 : Out Q : 604 , TIDL_ConvolutionLayer, PASSED #MMACs = 94.63, 93.11, Sparsity : 1.61 + Layer 24 : Out Q : 368 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.46, 0.46, Sparsity : 0.00 + Layer 25 : Out Q : 1064 , TIDL_ConvolutionLayer, PASSED #MMACs = 52.43, 51.40, Sparsity : 1.96 + Layer 26 : Out Q : 980 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.92, 0.92, Sparsity : 0.00 + Layer 27 : Out Q : 898 , TIDL_ConvolutionLayer, PASSED #MMACs = 104.86, 96.04, Sparsity : 8.41 + Layer 28 : Out Q : 2131 , TIDL_ConvolutionLayer, PASSED #MMACs = 26.21, 23.14, Sparsity : 11.72 + Layer 29 : Out Q : 2516 , TIDL_ConvolutionLayer, PASSED #MMACs = 29.49, 21.24, Sparsity : 27.97 + Layer 30 : Out Q : 6026 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.64, 1.64, Sparsity : 0.05 + Layer 31 : Out Q : 3333 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.65, 2.52, Sparsity : 5.17 + Layer 32 : Out Q : 6666 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.29, 0.29, Sparsity : 1.09 + Layer 33 : Out Q : 5288 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.18, 0.90, Sparsity : 23.39 + Layer 34 : Out Q : 6182 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.07, 0.07, Sparsity : 0.27 + Layer 35 : Out Q : 5659 , TIDL_ConvolutionLayer, PASSED #MMACs = 0.07, 0.03, Sparsity : 58.08 + Layer 36 : Out Q : 274 , TIDL_ConvolutionLayer, PASSED #MMACs = 2.22, 2.79, Sparsity : -25.91 + Layer 37 :TIDL_FlattenLayer, PASSED #MMACs = 0.00, 0.00, Sparsity : 0.00 + Layer 38 : Out Q : 771 , TIDL_ConvolutionLayer, PASSED #MMACs = 1.11, 1.11, Sparsity : 0.00 + Thanks in advanse, Sasa + +Responses: +Yes , Stride by 2 is suported for sparse kernels. conv2DKernelType can be set for each layer seperaetly For other question refer below e2e.ti.com/.../2574510 + +Thank you for your reply. I refer to this link you sent and I noticed this regarding sparcity: For those layers may be dense convolutions are used, then these numbers are not relevant for those layers. If I put zeros for all layers in conv2dKernelType parameter, how can I get negative sparsity. Does it mean anything? Regards, Sasa + +Negative sparsity means we are processing more MACs than whats is actaully need (Over head on sparse processing) + diff --git a/data2/text/range/5001-10000/791506.txt b/data2/text/range/5001-10000/791506.txt new file mode 100644 index 0000000000000000000000000000000000000000..3198017f0e9b726e27674df3e4cc8710c7f3d2d7 --- /dev/null +++ b/data2/text/range/5001-10000/791506.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux: How can i build CMEM. + +Query Text: +Tool/software: Linux Hi, I'm trying to build CMEM on TI TDA2x board. i succeed to boot the board but there are not /proc/cmem. (makeconfig: tda2xx_evm_linux_all) So, i tried to build CMEM following your OpenCL guide document. First, i used command line to install cmemk.ko using ./load_ocl_kos.sh file. However, it returns this error message. -------------------------------------------------------------------------------------------------------------------------------------------- Opened log file: lad.txt numProcessors = 5 id = 0 baseId = 0 [ 954.833540] CMEMK module: reference Linux version 4.4.84 Spawned daemon: /usr/bin/lad_dra7xx [ 954.841886] CMEMK Error: Failed to request_mem_region(0xa9000000, 0x4000000) insmod: ERROR: could not insert module /opt/vision_sdk/cmemk.ko: Bad address insmod: ERROR: could not load module /opt/vision_sdk/debugss_kmodule.ko: No such file or directory insmod: ERROR: could not load module /opt/vision_sdk/gdbserverproxy.ko: No such file or directory -------------------------------------------------------------------------------------------------------------------------------------------- Second, i typed command maually not using shell script file. The command is below. $ /sbin/insmod cmemk.ko pools=4x30000,2x500000 phys_start=0x0 phys_end=0x3000000 However, it also returns another error message. -------------------------------------------------------------------------------------------------------------------------------------------- [ 1122.801825] CMEMK module: reference Linux version 4.4.84 [ 1122.807984] CMEMK Error: pools specified: must specify both phys_start and phys_end, exiting... insmod: ERROR: could not insert module cmemk.ko: Invalid parameters -------------------------------------------------------------------------------------------------------------------------------------------- Third, i tried to modify the device tree following guide. However, there isn't am57xx-evm-cmem.dtsi file. So, i created that file and included into am57xx-evm.dts and build all again. However, the /proc/cmem was also not shown. Please let me know if there are any points that i missed. Thanks in advance. + +Responses: +Hi, Please include the below entry in your kernel DTB. &reserved_mem { cmem_shared_region: cmem-memories@ac000000 { compatible="shared-dma-pool"; reg = <0x00 0x9c000000 0x00 0x1000000>; // modify this address and size depending on your requirements. This examples allocates 16MB block from 0x9c000000 - 0x9d000000 no-map; status="okay"; }; }; / { cmem { compatible = "ti,cmem"; #address-cells = <1>; #size-cells = <0>; status = "okay"; cmem_block_0: cmem_block@0 { reg = <0>; memory-region = <&cmem_shared_region>; }; }; }; After rebuilding the DTB you need to run insmod cmem.ko and it should work. Regards Shravan + +Hi, Thanks for answering. As your reply, i checked my board uses dra7-evm-infoadas.dtb file and included that entry. Now, the command $ insmod cmemk.ko is executed normally and it showed this normal message. -------------------------------------------------------------------------------------------------------------------------------- [ 798.131706] CMEMK module: reference Linux version 4.4.84 [ 798.138752] allocated heap buffer 0xa9000000 of size 0x3000000 [ 798.144659] cmemk initialized -------------------------------------------------------------------------------------------------------------------------------- However, i couldn't see the cmem information when i put this command $ cat /proc/cmem. That command shows nothing and if i execute a program which it uses cmem, it returns this error message. -------------------------------------------------------------------------------------------------------------------------------- [ 933.270113] CMEMK Error: ALLOCCACHED: invalid pool (0) passed. CMEM Error: allocPool: ioctl CMEM_IOCALLOCCACHED failed from pool 0: -1 TIOCL FATAL: Failed to allocate 0x3000000 from CMEM block 0, allocated 0x0 -------------------------------------------------------------------------------------------------------------------------------- Please let me know what causes this problem. I'm using board dra7xx. Thank you again. Yoo + +Hi Yoo, Edited the previous post with the change needed (Typo, it should be reserved_mem and not reserved_memory). Regards Shravan + +Hi Sharavan, Yes, i corrected that and could see 'insmod cmemk.ko' operate normally. But, i faced another problem. $ cat /proc/cmem dosen't show any information about cmem. Does it indicates cmem is not actually allocated? The below is my dts file. -------------------------------------------------------------------------------------------------- #include "dra7-evm.dts" #define DISABLE_PRCM(label) &label { ti,no-idle; ti,no-reset-on-init; } #define DISABLE_COMPLETE(label) &label { status = "disabled"; ti,no-idle; ti,no-reset-on-init; } #define LATE_ATTACH(label) &label { ti,late-attach; ti,no-idle; ti,no-reset-on-init; } /* modules used by BIOS, disable from Linux */ DISABLE_COMPLETE(vip1); DISABLE_COMPLETE(vip2); DISABLE_COMPLETE(vip3); DISABLE_COMPLETE(i2c2); DISABLE_COMPLETE(wdt2); DISABLE_COMPLETE(vpe); DISABLE_COMPLETE(ocmcram1); DISABLE_COMPLETE(hdmi); DISABLE_COMPLETE(hdmi0); DISABLE_COMPLETE(dss); DISABLE_COMPLETE(dispc); /* modules shared between BIOS and Linux, Do not reset or cutoff clks */ DISABLE_PRCM(gpio1); DISABLE_PRCM(gpio2); DISABLE_PRCM(gpio4); DISABLE_PRCM(gpio6); /* Linux uses first 32 channels, BIOS uses last 32 */ &edma { dma-requests = <32>; }; /* Update the CMA regions for Vision SDK binaries */ &ipu2_cma_pool { reg = <0x0 0x99000000 0x0 0x5000000>; }; &dsp1_cma_pool { reg = <0x0 0xa1000000 0x0 0x2000000>; }; &ipu1_cma_pool { reg = <0x0 0x9e000000 0x0 0x2000000>; }; &dsp2_cma_pool { reg = <0x0 0xa3000000 0x0 0x2000000>; }; /* Additional memory regions required for Vision SDK * Keep this in sync with VSDK apps/build/tda2xx/mem_segment_definition_linux.xs */ &reserved_mem { cmem_ocmc: cmem@40300000 { compatible = "shared-dma-pool"; reg = <0x0 0x40300000 0x0 0x300000>; sram = <&ocmcram1>; no-map; status = "okay"; }; cmem_pool: cmem@A9000000 { compatible = "shared-dma-pool"; reg = <0x0 0xA9000000 0x0 0x2000000>; no-map; status = "okay"; }; vsdk_sr1_mem: vsdk_sr1_mem@84000000 { compatible = "shared-dma-pool"; reg = <0x0 0x84000000 0x0 0x13000000>; status = "okay"; }; vsdk_sr0_mem: vsdk_sr0_mem@A0000000 { compatible = "shared-dma-pool"; reg = <0x0 0xA0000000 0x0 0x1000000>; status = "okay"; }; vsdk_eve_mem: vsdk_eve_mem@A5000000 { compatible = "shared-dma-pool"; reg = <0x0 0xA5000000 0x0 0x4000000>; status = "okay"; }; cmem_shared_region: cmem-memories@ac000000 { compatible="shared-dma-pool"; reg = <0x00 0xA9000000 0x00 0x3000000>; // modify this address and size depending on your requirements. This examples allocates 16MB block from 0x9c000000 - 0x9d000000 no-map; status="okay"; }; }; / { cmem { compatible = "ti,cmem"; #address-cells = <1>; #size-cells = <0>; status = "okay"; cmem_block_0: cmem_block@0 { reg = <0>; memory-region = <&cmem_shared_region>; }; }; }; &ipu1 { /delete-property/ watchdog-timers; }; &ipu2 { /delete-property/ watchdog-timers; timers= <&timer9> , <&timer11>; }; &dsp1 { /delete-property/ watchdog-timers; }; &dsp2 { /delete-property/ watchdog-timers; }; -------------------------------------------------------------------------------------------------- Thank you. Yoo + +Hi Yoo, To check if cmem is correctly loaded you would need to run lsmod and check if cmem is listed as a module. If it is, you can assume the cmem module has successfully been inserted with pools/heaps reserved. Regards Shravan + diff --git a/data2/text/range/5001-10000/798042.txt b/data2/text/range/5001-10000/798042.txt new file mode 100644 index 0000000000000000000000000000000000000000..f03a1a3b1fb2075c2519405d7c4ffca6a0d56289 --- /dev/null +++ b/data2/text/range/5001-10000/798042.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2EVM5777: Vision SDK sample_app build configuration + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello, I am attempting to build the sample_app provided with PROCESSOR_SDK_VISION_03_06_00_00 for TDA2 EVM with RTOS (config: tda2xx_evm_bios_all). My Vision SDK is located in the path C:\PROCESSOR_SDK_VISION_03_06_00_00, while my 'build', 'links_fw', and 'sample_app' folders are located in the path D:\TEST. Following build steps from the TDA2xx Vision SDK User Guide and with a few modifications to the makefiles, I was able to build the sample_app. The issue is, my binaries are getting generated in the path C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\binaries. How can I modify the make configuration so that my binaries are generated in the path D:\TEST\binaries? Thank you. + +Responses: +Hi, You need to change DEST_ROOT in PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\build\rtos\makerules\env.mk. Regards, Rishabh + +Hello, My objective is to separate the application from the TI toolchain and other VSDK dependencies. Thus, my folder structures are as shown below. C:\PROCESSOR_SDK_VISION_03_06_00_00 |___ti_components |___vision_sdk |___apps |___build |___docs |___links_fw |___sample_app D:\TEST |___binaries |___build |___links_fw |___sample_app I also performed the following steps: (1) All content under C:\PROCESSOR_SDK_VISION_03_06_00_00 is unchanged from its default state (2) Edited line #13 of D:\TEST\build\Rules.make to build 'sample_app' instead of 'apps' (3) Edited line #2 of D:\TEST\build\tools_path.mk to point to C:\PROCESSOR_SDK_VISION_03_06_00_00\ti_components (4) Edited line #11 of D:\TEST\build\rtos\makerules\env.mk to point to D:\TEST\binaries I had expected that these steps will create the executables as I wanted. But the executables are still getting created under C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\binaries. It appears that the build configuration from D:\TEST does not override the configuration from C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\build. What are the proper steps to achieve this? Thank you. + +Hi, I see binaries folder inside D:/Test as well as shared in the above folder. Are you initiating build from D:/Test/build folder? Are you seeing few folders in C:\PROCESSOR_SDK_VISION_03_06_00_00\ and others in D:\Test or everything is under C:\PROCESSOR_SDK_VISION_03_06_00_00\. Regards, Rishabh + +Hello, Rishabh Garg said: I see binaries folder inside D:/Test as well as shared in the above folder. In the folder structure that I have depicted, I have shown the binaries folder under D:\TEST only, because that is how I want it. Rishabh Garg said: Are you initiating build from D:/Test/build folder? Yes. Rishabh Garg said: Are you seeing few folders in C:\PROCESSOR_SDK_VISION_03_06_00_00\ and others in D:\Test or everything is under C:\PROCESSOR_SDK_VISION_03_06_00_00\. I am seeing everything under C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\. Thank you. + +Hi, Just to confirm, the build folder (D:\Test\build) from where you are trying to build, Did you copied it from "C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk" folder ? And also looking like you are modifying wrong "env.mk" file (4) Edited line #11 of D:\ADAS_PRK_I\build\rtos\makerules\env.mk to point to D:\TEST\binaries Either you should edit the file under C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\build\rtos\makerules\env.mk to point to D:\TEST\binaries or edit the file under D:\Test\build\rtos\makerules\env.mk to point to D:\TEST\binaries Regards Surya + +Hello, Suryamani Jena said: Just to confirm, the build folder (D:\Test\build) from where you are trying to build, Did you copied it from "C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk" folder ? Yes. Suryamani Jena said: And also looking like you are modifying wrong "env.mk" file (4) Edited line #11 of D:\ADAS_PRK_I\build\rtos\makerules\env.mk to point to D:\TEST\binaries Either you should edit the file under C:\PROCESSOR_SDK_VISION_03_06_00_00\vision_sdk\build\rtos\makerules\env.mk to point to D:\TEST\binaries or edit the file under D:\Test\build\rtos\makerules\env.mk to point to D:\TEST\binaries I did NOT edit D:\ADAS_PRK_I\build\rtos\makerules\env.mk. By mistake, I specified the wrong path here; I have corrected step (4) in my earlier post. I edited D:\TEST\build\rtos\makerules\env.mk to point to D:\TEST\binaries, which is as per your suggestion. Thank you. + +Hi, 1. Instead of changing DEST_ROOT in file D:\Test\build\rtos\makerules\env.mk, you can modify "vision_sdk_PATH " in file "Rules.mk" & then try building from D:\TEST\build folder vision_sdk_PATH := $(abspath ..) to vision_sdk_PATH := D:\TEST 2. Rename "vision_sdk" folder inside the "PROCESSOR_SDK_VISION_03_06_00_00" package to "__vision_sdk" & then try building from D:\TEST\build folder Regards Surya + +Hello, Your suggestion worked nicely. The binaries were generated under D:\TEST, as required. Thank you very much for your help. + +Hi Sagar, Thanks for the update and confirmation. Regards, Rishabh + diff --git a/data2/text/range/5001-10000/802987.txt b/data2/text/range/5001-10000/802987.txt new file mode 100644 index 0000000000000000000000000000000000000000..11a0e6f910093fb56df14fc4d2cad54b864ee5da --- /dev/null +++ b/data2/text/range/5001-10000/802987.txt @@ -0,0 +1,20 @@ +Ticket Name: Linux/DRA72XEVM: Video quality issue when using 4 channels input for H264 decode + display + +Query Text: +Part Number: DRA72XEVM Tool/software: Linux Hi TI, We are using PVSDK_03_04 SDK in DRA72XEVM board. The usecase being executed is NullSrc + Decode + Display Below is the usecase diagram: NullSource (A15) -> Decode -> VPE -> Merge -> Sync -> Alg_DmaSwMs -> Merge_1 DispDistSrc_weston -> Merge_1 Merge_1 -> Display The video display is slow as we are using 4 channels as input. So to fix this reduced the number of buffers from 6 to 2 for nullSrc as below: pPrm->channelParams[chId].numBuffers = 2; Video performance is improved, but could see flickers oftenly every 8-10 seconds of video playback. And also if there is any object/person moving, the same is not been displayed properly, macroblocks seems to get distorted during reconstruction. FYI, the input is H.264 encoded video (VGA resolution, 4 channels so 4 x VGA @ 30fps). Is the IVA H264 decoder capable of decoding 4 VGA resolution encoded video @ 30fps? [Datasheet says decoder performance is 2x1080 @ 30fps) We are using HDMI display displayType == CHAINS_DISPLAY_TYPE_HDMI_1080P(chains_common.c). However, final product will be HDMI VGA. Hence after decoding we are scaling video from VGA to QVGA to fit 4 channels into Mosaic display. (Using VPE here to scale video) Could you please provide inputs to resolve these issues?? Note: Without Merge video us not played, hence Merge has to be present in usecase because Merge fwds single buffer corresponding to each CH ID VPE is necessar in our usecase, because we need to scale video from VGA to QVGA resolution, as the output HDMI display unit is VGA size Regards, Sudhi + +Responses: +Hi Ti, Below is additional information for this video quality issue. decPrm->dpbBufSizeInFrames = DEC_LINK_DPB_SIZE_IN_FRAMES_DEFAULT; decPrm->algCreateStatus = DEC_LINK_ALG_CREATE_STATUS_CREATE; decPrm->decodeFrameType = DEC_LINK_DECODE_ALL; decPrm->processCallLevel = DEC_LINK_FRAMELEVELPROCESSCALL; decPrm->targetMaxWidth = ENCDEC_MAX_FRAME_WIDTH; decPrm->targetMaxHeight = ENCDEC_MAX_FRAME_HEIGHT; decPrm->numBufPerCh = 6; decPrm->defaultDynamicParams.targetBitRate = 1*1000*1000; decPrm->defaultDynamicParams.targetFrameRate = 30; decPrm->fieldMergeDecodeEnable = FALSE; switch (pObj->codecType) { case '1': /* H264 */ decPrm->format = SYSTEM_IVIDEO_H264BP; decPrm->profile = 0;; decPrm->displayDelay = 0; break; } I have attached the sample video for depicting the issue (Flicker and macrblock distortion) + +Hi, Just for debugging purpose, can you remove the weston link. You can directly feed alg_dmaswms output to display and check. I hope nullSrc is reading all 4 channel then you do not need merge link. You can directly connect vpe with sync link. Please share the usecase log after pressing p after 1 min to check is there any frame drop. Please make sure your threshold for sync link is sufficient. Regards, Anuj + +Hi Anuj, Thanks for the information. As suggested, have removed both the Weston and Merge links. [ nullSrc is reading all 4 channels hence it worked by removing Merge Link] We have directly connect vpe with sync link. Threshold for Sync Link is set as below: (pObj->SyncPrm).syncThreshold = 10000/*SYNC_DROP_THRESHOLD_IN_MSEC*/; (pObj->SyncPrm).syncDelta = 1000; I have attached the Usecase log, which contains framework statistics (pressing p) in interval of 30 secs, 60 seconds, 90 seconds, etc. Could you also pls suggest an optimum values for syncThreshold & syncDelta. Regards, Sudhi TI_NoWestonMerge_Log1.txt + +Hi Anuj, Thanks for the information. As suggested, have removed both the Weston and Merge links. [ nullSrc is reading all 4 channels hence it worked by removing Merge Link] We have directly connect vpe with sync link. Threshold for Sync Link is set as below: (pObj->SyncPrm).syncThreshold = 10000/*SYNC_DROP_THRESHOLD_IN_MSEC*/; (pObj->SyncPrm).syncDelta = 1000; I have attached the Usecase log, which contains framework statistics (pressing p) in interval of 30 secs, 60 seconds, 90 seconds, etc. Could you also pls suggest an optimum values for syncThreshold & syncDelta. Regards, Sudhi 3247.TI_NoWestonMerge_Log1.txt + +Hi Anuj, Thanks for the information. As suggested, have removed both the Weston and Merge links. [ nullSrc is reading all 4 channels hence it worked by removing Merge Link] We have directly connect vpe with sync link. Without Weston Flickering is not seen. But could you pls help to rectify flickering with Weston because we need Weston to have QT app running on top of video layer. As suggested by you, after removing Westin and Merge, the video quality is still not improved, distortions in the macroblock reconstruction is still seen. Threshold for Sync Link is set as below: (pObj->SyncPrm).syncThreshold = 10000/*SYNC_DROP_THRESHOLD_IN_MSEC*/; (pObj->SyncPrm).syncDelta = 1000; I have attached the Usecase log, which contains framework statistics (pressing p) in interval of 30 secs, 60 seconds, 90 seconds, etc. Could you also pls suggest an optimum values for syncThreshold & syncDelta. Regards, Sudhi 2330.TI_NoWestonMerge_Log1.txt + +Hi, Delta should be same as frame interval and threshold should be twice of frame interval. Regards, Anuj + +Hi, Its been long since any update on this thread, I hope the issue is resolved, if not then please reply below or create anew thread for different queries. Regards, Anuj + diff --git a/data2/text/range/5001-10000/803582.txt b/data2/text/range/5001-10000/803582.txt new file mode 100644 index 0000000000000000000000000000000000000000..9f9ceff6e95d773041d9fface4cd018247200f8f --- /dev/null +++ b/data2/text/range/5001-10000/803582.txt @@ -0,0 +1,22 @@ +Ticket Name: RTOS: I could not understand how each LAYER works in TIDL OD Usecase. + +Query Text: +Tool/software: TI-RTOS Hi, In JDetNet example, the layersGroupId is set as 0 1 1 1 1 (all 1s) 1 1 1 1 2 0. In this case, EVE creates 1 input buffer and 2 output buffers. And DSP creates 2 input buffers and 1 output buffe as following the model architecture. However, if the layersGroupId is set as 0 1 1 1 (all 1s) 2 1 1 1 2 0 (there are two layers which works on DSP), EVE/DSP creates input/output buffers corresponding the model architecture. What i couldn't understand, if that case, how EVE waits to get the result of middle layer that is working on DSP? In TIDL OD data flow, Alg_tidl_EVEx works first and Alg_tidl_Dsp works after that. However, if there is a layer assigned to the DSP in the middle of the model structure, should not the next layer assigned to EVE wait to receive the result of the DSP layer as input? If the tidl od case is executed as data flow, I think this process is impossible. But, when i execute that model, the usecase goes well. How is it possible? Regards, Yoo. + +Responses: +Hi, I read TIDeepLearningLibrary_UserGuide.pdf again. In FAQ21, it refered 'Condition : Only DectectionOutputLayer should run on DSP and rest of the all the layers on EVE in the SSD network.' . And when i test the model which have dsp in the middle layer of Network, the model couldn't detect object normally. I have determined that if the middle layer belongs to dsp, there is a problem in the buffer transfer process. When using the SSD model, should layers always be allocated to EVE except detectionoutputlayer, data layer and output layer? Thanks in advance. Regards, Yoo + +Hi Yoo, It is recommended to run only DetectionOutput layer on DSP and rest all the other layers on EVE. This is because the DetectionOutput layer is better optimized on DSP and all the other layers are better optimized on EVE. So, the same is tested in VSDK use case also. Thanks, Praveen + +Hi, Does that mean that the sequence of EVE and DSP layers does not matter? However, when I changed one middle layer of the successive layers in EVE to the DSP, the model almost lost performance. The below is before i changed. layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 And this is after i changed. layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2(here) 1 1 1 1 1 1 1 1 1 2 0 If this change will not be a problem, Could you describe the process of their buffer exchange? According to the link sequence in tidl_od.jpg, Alg_tidl_dsp will be executed after Alg_tidl_eve, so how do the eve layer immediately behind the intermediate DSP layer receive the input buffer? + +Hi, The sequence of EVE and DSP layers does matter for performance, as explained in the previous post all the initial layers except the last detection output layer are better optimized on EVE and only the last layer (detection output layer) is better optimized on DSP. So, if you change any middle layer to DSP from EVE will result in performance degradation. Also, the current tidl_od use case is also designed to run all the initial layers on EVE and last detection output layer on DSP. Thanks, Praveen + +Hi, Thank you for answering. BTW, i have two more questions. 1) The performance degradation you referred, does it mean processing time and accuracy both? Actually, when i change a middle layer to DSP, The model detected the wrong place as an object. 2) Could you explain what is OCMC? In setting APP parameters, the EVEs have ocmcAddr. How they used by EVE? I refered the source code, and saw the EVEs init their own L1, L2 cache size. Is that for storing Network parameter? Or could you where the document about this question? Best Regards, Yoo. + +Hi, 1. The degradation is only in processing time as DSP consume more cycles than EVE , for processing for all layers except detection output layer. The wrong detection's could be because of some problem in your use case. 2. This OCMC is Level 3 (L3) memory. Yes, it is used for storing the parameters in TIDL. We don't have any detail document on this. Thanks, Praveen + +Hi, Thanks for answering. It really helps me. I have a last question about this thread. If all layers except the detection output layer are operating on eve, is there a way to see what the output of the last eve layer looks like? I mean I want to know the data format of the input and output of the detection output layer. Could you please let me know if there is any document or simple method? Thanks again. Best regards, Yoo. + +Hi, For the output format of the detection layer, you can see Draw Boxes (not exact function name, check similar) function where the detection output layer output is consumed to draw the output boxes. You can also refer to this below thread to understand output format of detection output layer (but this output is from standalone TIDL run not in the use case). e2e.ti.com/.../679186 The input format is.. from delpoy.prototxt.. layer { name: "detection_out" type: "DetectionOutput" bottom: "mbox_loc" bottom: "mbox_conf_flatten" bottom: "mbox_priorbox" top: "detection_out" include { phase: TEST } There are 2 inputs to the detection output layer, first input is locations buffer (flattened and concatenated from all the heads) and second one is conf scores buffer ( flattened and concatenated from all the heads but without reshape and softmax as these will be done in detection output layer it self). The prior boxes are calculated in the import time it self and stored in the parameters in the import tool. Hope this clarifies. Thanks, Praveen + diff --git a/data2/text/range/5001-10000/803746.txt b/data2/text/range/5001-10000/803746.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff008adb36a26bbe168f7d26b9c0de6e7f6abc0c --- /dev/null +++ b/data2/text/range/5001-10000/803746.txt @@ -0,0 +1,153 @@ +Ticket Name: TDA2EVM5777: EVE accessing A15 Memory + +Query Text: +Part Number: TDA2EVM5777 Hello, I am currently running eve_sw_01_19_00_00 starterware examples under PROCESSOR_SDK_VISION_03_06_00_00. My application is a dual core appImage (a150 and eve1). The a15 allocates an input array that needs processing by the EVE. The a15 also allocates an output array which is to where the EVE needs to write its output. The a15 sends the pointer of the input array (declared as a global array and located on DDR RAM) over to the EVE, and I want the EVE to access the data that the pointer points to. I have verified that the pointer was successfully sent, but when the EVE tries to access the data from that pointer, the EVE program halts. How do I make it so that the EVE can read and write to memory addresses (specifically DDR RAM) allocated by the A15? + +Responses: +Hi iFer, Have you configured the EVE MMU for particular DDR address? Regards, Rishabh + +1727.linker.txt /* +* +* Copyright (c) 2009-2017 Texas Instruments Incorporated +* +* All rights reserved not granted herein. +* +* Limited License. +* +* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive +* license under copyrights and patents it now or hereafter owns or controls to make, +* have made, use, import, offer to sell and sell ("Utilize") this software subject to the +* terms herein. With respect to the foregoing patent license, such license is granted +* solely to the extent that any such patent is necessary to Utilize the software alone. +* The patent license shall not apply to any combinations which include this software, +* other than combinations with devices manufactured by or for TI ("TI Devices"). +* No hardware patent is licensed hereunder. +* +* Redistributions must preserve existing copyright notices and reproduce this license +* (including the above copyright notice and the disclaimer and (if applicable) source +* code license limitations below) in the documentation and/or other materials provided +* with the distribution +* +* Redistribution and use in binary form, without modification, are permitted provided +* that the following conditions are met: +* +* * No reverse engineering, decompilation, or disassembly of this software is +* permitted with respect to any software provided in binary form. +* +* * any redistribution and use are licensed by TI for use only with TI Devices. +* +* * Nothing shall obligate TI to provide you with source code for the software +* licensed and provided to you in object code. +* +* If software source code is provided to you, modification and redistribution of the +* source code are permitted provided that the following conditions are met: +* +* * any redistribution and use of the source code, including any resulting derivative +* works, are licensed by TI for use only with TI Devices. +* +* * any redistribution and use of any object code compiled from the source code +* and any resulting derivative works, are licensed by TI for use only with TI Devices. +* +* Neither the name of Texas Instruments Incorporated nor the names of its suppliers +* +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* DISCLAIMER. +* +* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS +* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED +* OF THE POSSIBILITY OF SUCH DAMAGE. +* +*/ + +-e _reset_handler +-w +-stack 0x1000 +--heap_size=0x800 + +MEMORY +{ + PAGE 0: + VECMEM: origin = 0x80000000, length = 0x0100 + CMDMEM: origin = 0x80000100, length = 0x0e00 + DDR_CODE: origin = 0x80001000, length = 0x7000 + PAGE 1: + DATMEM_CHECK: origin = 0x40020000, length = 0x0100 + DMEM_DATA: origin = 0x40020100, length = 0x0e00 + RES_SET_LOC : origin = 0x40026000, length = 0x0200 + DATMEM: origin = 0x40021000, length = 0x4000 + STACKS: origin = 0x40027000, length = 0x1000 + IMEML : origin = 0x40050000, length = 0x4000 + IMEMH : origin = 0x40054000, length = 0x4000 + WMEM : origin = 0x40040000, length = 0x8000 + OCMCRAM: origin = 0x40300000, length = 0x0007fe00 + GEM1L2: origin = 0x40810000, length = 0x00010000 + SYNC_AREA: origin = 0x4037fe00, length = 0x00000100 + DDR: origin = 0x80030000, length = 0x00100000 +} + + + +SECTIONS +{ + .intvecs > VECMEM PAGE 0 + .inthandler > CMDMEM PAGE 0 + .exitlocation > CMDMEM PAGE 0 + .text: > DDR_CODE PAGE 0 + { + rtsarp32_v200.lib(.text) + rtsarp32_v200.lib(.text) + rtsarp32_v200.lib (.text) + rtsarp32_v200.lib (.text) + rtsarp32_v200.lib (.text) + rtsarp32_v200.lib<_lock.obj> (.text) + rtsarp32_v200.lib (.text) + *.obj(.text) + } + + GROUP + { + .bss /* This order facilitates a single segment for */ + .data /* GDP-relative addressing */ + .rodata + }>DATMEM PAGE 1 + + .far > DATMEM PAGE 1 + .fardata > DATMEM PAGE 1 + .cinit > DATMEM PAGE 1 + .cio > DATMEM PAGE 1 + .dmem_int_sec > DATMEM PAGE 1 + + Adata: load = IMEML PAGE 1 + Bdata: load = IMEML PAGE 1 + Cdata: load = IMEMH PAGE 1 + Pdata: load = WMEM PAGE 1 + Sdata: > DATMEM_CHECK PAGE 1 + EOutdata: > DATMEM PAGE 1 + res_set_sect: > RES_SET_LOC PAGE 1 + .cint: > DATMEM PAGE 1 + .bss : > DATMEM PAGE 1 + .const: > DATMEM PAGE 1 + .data: > DATMEM PAGE 1 + .sysmem: > DATMEM PAGE 1 + .stack: > STACKS PAGE 1 + SectionSync: load = SYNC_AREA PAGE 1 + DDRData: > DDR PAGE 1 + OCMCRam_data: > OCMCRAM PAGE 1 + GEM1L2_data: > GEM1L2 PAGE 1 +} + + Hi Rishabh, Thank you for your help. I am currently running a slightly modfied example ARP32 code from this directory: starterware/examples/mailbox_eve1_to_dsp1/eve1/src/ I didn't change anything in the code or the linker cmd file with respect to the MMU. (I did not see any MMU Init in the base example) The base example is using the default linker cmd file (please see attached). Does the base example mentioned have the necessary software to configure the MMU correctly? If not, can you provide information on where to find that example MMU init for EVE? So far I have confirmed we can access elements in OCM L3 space but not DDR space. Would the MMU be the only reason why? Thank you, -iFer + +Hi, Can you use API SblLibEVEMMUConfig to map the DDR space you are accessing. This API is defined in PROCESSOR_SDK_VISION_03_06_00_00\ti_components\drivers\pdk_01_10_02_07\packages\ti\boot\sbl_auto\sbl_lib\src\tda2xx\sbl_lib_tda2xx_platform.c. Regards, Rishabh + +Hi, I haven't heard back from you, I'm assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out). Regards, Rishabh + diff --git a/data2/text/range/5001-10000/804800.txt b/data2/text/range/5001-10000/804800.txt new file mode 100644 index 0000000000000000000000000000000000000000..e48ed9f5b5c6f1dc1f68e35973753e9a0101eb2a --- /dev/null +++ b/data2/text/range/5001-10000/804800.txt @@ -0,0 +1,152 @@ +Ticket Name: RTOS/TDA2P-ACD: Is there any demo available in sdk v3.6 in TDA2PX? + +Query Text: +Part Number: TDA2P-ACD Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS Hi, I got this hardware below,I would like to capture image from ov2775,But I cannot find the correct usecase. I try the ISS Usecases, (TDA3x ONLY) but its for tda3x only.So which usecase should I use? a. TDA2Px EVM x 1 b. Fusion Card/EVM x 1 c. TIDA OV2775 cameras (with Fakra cables) x 1 Thanks! + +Responses: +Hi, I think single channel usecase works also on TDA2Px, can you try it? Rgds, Brijesh + +Hi Brijesh, I‘ve tried single channel usecase before,but it didn't work.It captures signal from vip but csi2.And the fusion board is csi2 port Here is the log. Thank you for your help. [IPU1-0] Single Camera Usecases + +[IPU1-0] ------------------------ + +[IPU1-0] 1: 1CH VIP capture + Display + +[IPU1-0] 2: 1CH VIP capture + Alg Frame Copy (DSP1) + Display + +[IPU1-0] 3: 1CH VIP capture + Alg Frame Copy (EVE1) + Display + +[IPU1-0] 4: 1CH VIP capture + Alg Frame Copy (A15) + Display + +[IPU1-0] 5: 1CH VIP capture + Edge Detect (EVE1) + Display + +[IPU1-0] 7: 1CH VIP capture (HDMI) + Sparse Optical Flow (EVE1) + Display + +[IPU1-0] 8: 1CH VIP capture + Alg Subframe Copy (EVE1) + Display + +[IPU1-0] a: 1CH VIP capture + ENC + DEC + VPE + Display + +[IPU1-0] b: 1CH VIP capture (HDMI) + Lane Detect (DSP1 + EVE1) + Display + +[IPU1-0] c: 1CH VIP capture (HDMI) + SOF (EVE1) + SFM (DSP1) + Display + +[IPU1-0] d: 1CH VIP capture (HDMI) + Traffic Light Recognition (TLR) (DSP1) + Display + +[IPU1-0] e: 1CH VIP capture (HDMI) + Pedestrian, Traffic Sign, Vehicle Detect 2 (EVE1 + DSP1) + Display + +[IPU1-0] f: 1CH VIP capture (HDMI) + FrontCam Analytics 2 (PD+TSR+VD+LD+TLR+SFM) (DSPx, EVEx) + Display (HDMI) + +[IPU1-0] g: 1CH VIP capture + QM Alg Frame Copy with FFI (DSP1) + Display + +[IPU1-0] h: 1CH VIP capture + QM Alg Frame Copy with FFI (EVE1) + Display (TDA3x only) + +[IPU1-0] i: 1CH VIP capture + Safe Frame Copy (A15) + Display + +[IPU1-0] n: NullSrc (File IO) + Decode + Display + +[IPU1-0] + +[IPU1-0] x: Exit + +[IPU1-0] + +[IPU1-0] Enter Choice: + +[IPU1-0] + +[IPU1-0] 28.483011 s: + +[IPU1-0] 28.588391 s: CAPTURE: Create in progress !!! + +[IPU1-0] 28.588604 s: CAPTURE: VIP1 Slice0 PortA capture mode is [ 8-bit] !!! + +[IPU1-0] 28.589550 s: CAPTURE: Create Done !!! + +[IPU1-0] 28.589885 s: DISPLAY: Create in progress !!! + +[IPU1-0] 28.590465 s: DISPLAY: Create Done !!! + +[IPU1-0] 28.590617 s: GRPXSRC: Create in progress !!! + +[IPU1-0] 30.263618 s: GRPXSRC: Create Done !!! + +[IPU1-0] 30.264228 s: DISPLAY: Create in progress !!! + +[IPU1-0] 30.264716 s: DISPLAY: Create Done !!! + +[IPU1-0] 30.264930 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1022 + +[IPU1-0] 30.265113 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 248224 B (242 KB) + +[IPU1-0] 30.265265 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + +[IPU1-0] 30.265418 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x88503000, Total size = 368037888 B (350 MB), Free size = 356978688 B (340 MB) + +[IPU1-0] 30.265601 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xbfc00000, Total size = 127872 B (0 MB), Free size = 106368 B (0 MB) + +[IPU1-0] 30.272799 s: CHAINS: Sensor create in progress + +[IPU1-0] 30.273439 s: VIDEO_SENSOR: INST0 : I2C4 : I2C Addr = 0x30 + +[IPU1-0] 30.274324 s: + +[IPU1-0] 30.274629 s: i2cMdSubmitChan: i2c4 transfer to slave address 0x30 failed + +[IPU1-0] 30.274720 s: src/bsp_deviceI2c.c @ Line 765: + +[IPU1-0] 30.274812 s: I2C4: DEV 0x30: RD 0x300a ... ERROR !!! + +[IPU1-0] 30.274903 s: src/bsp_deviceI2c.c @ Line 836: + +[IPU1-0] 30.275025 s: I2C4: Error timeout 1 ms!!! + +[IPU1-0] 30.275483 s: Assertion @ Line: 510 in /home/lyp/hd2/tda2/sdk/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +[IPU1-0] 30.276276 s: Assertion @ Line: 510 in /home/lyp/hd2/tda2/sdk/vision_sdk/apps/src/rtos/video_sensor/src/vid_sensor.c: status == SYSTEM_LINK_STATUS_SOK : failed !!! + +[IPU1-0] 30.277801 s: *** UTILS: CPU KHz = 20000 Khz *** + +[IPU1-1] 30.266302 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[IPU1-1] 30.266424 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 655360 B (640 KB), Free size = 645240 B (630 KB) + +[HOST ] 30.266821 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[HOST ] 30.266821 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 6291456 B (6144 KB), Free size = 6246760 B (6100 KB) + +[DSP1 ] 30.267095 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[DSP1 ] 30.267126 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + +[DSP1 ] 30.267156 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516376 B (504 KB) + +[DSP2 ] 30.267431 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[DSP2 ] 30.267461 s: SYSTEM: Heap = LOCAL_L2 @ 0x00800000, Total size = 227264 B (221 KB), Free size = 227264 B (221 KB) + +[DSP2 ] 30.267492 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 524288 B (512 KB), Free size = 516376 B (504 KB) + +[EVE1 ] 30.268163 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[EVE1 ] 30.268468 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + +[EVE1 ] 30.269017 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254208 B (248 KB) + +[EVE2 ] 30.270450 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[EVE2 ] 30.270725 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + +[EVE2 ] 30.271274 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 254208 B (248 KB) + +[IPU2 ] 30.272280 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + +[IPU2 ] 30.272402 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 252016 B (246 KB) + +Hi, You should select 1 ch capture display UC under ISS Usecases [IPU1-0] ISS Usecases (TDA3x ONLY) [IPU1-0] --------------------------- [IPU1-0] 1: 1CH ISS capture + ISS ISP + ISS LDC+VTNF + Display [IPU1-0] 2: 4CH ISS capture + ISS ISP + Simcop + Surround View (DSP1) + Display [IPU1-0] 4: 3D SRV 4CH ISS capture + ISS ISP + DeWarp + Synthesis (DSP1) + Display [IPU1-0] 5: Surround View Calibration [IPU1-0] 6: 3D + 2D SRV 4CH ISS capture + ISS ISP + DeWarp + Synthesis (DSP1) + Display [IPU1-0] c: 4 Channel (2 ch per CSI2 Inst) ISS Capture (OV2775 Sensor) Display [IPU1-0] [IPU1-0] x: Exit [IPU1-0] [IPU1-0] Enter Choice: But please make sure you select the capture source as TIDA OV2775 under capture settings before running UC From Main menu: s -> 2 -> e Regards Surya + +Hi Surya I've set TIDA OV2775 as capture source.But it still doesn't work .It seems cannot access the slave address.Here's the log. [IPU1-0] 44.529280 s: CHAINS: Using DCC Profile from Driver [IPU1-0] 44.540078 s: *** UTILS: CPU KHz = 20000 Khz *** [IPU1-0] 44.540291 s: [IPU1-0] 44.540566 s: i2cMdSubmitChan: i2c4 transfer to slave address 0x3d failed [IPU1-0] 44.540718 s: src/bsp_deviceI2c.c @ Line 580: [IPU1-0] 44.540810 s: I2C4: DEV 0x3d: WR 0x0c = 0x0f ... ERROR !!! [IPU1-0] 44.540932 s: src/bsp_deviceI2c.c @ Line 602: [IPU1-0] 44.540993 s: I2C4: Error timeout 1 ms!!! [IPU1-0] 44.541054 s: Could not configure deserializer !!! [IPU1-0] 44.541115 s: configDeserializer failed!!! [IPU1-0] 44.541176 s: Power ON failed!!! [IPU1-0] 44.541237 s: Assertion @ Line: 388 in /home/lyp/hd2/tda2/sdk/vision_sdk/apps/src/rtos/iss/src/common/app_util_iss.c: status == 0 : failed !!! [IPU1-0] 44.541877 s: Assertion @ Line: 388 in /home/lyp/hd2/tda2/sdk/vision_sdk/apps/src/rtos/iss/src/common/app_util_iss.c: status == 0 : failed !!! [IPU1-1] 44.520527 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 Regards lyp + +Hi, From logs, looking like deserializer configuration is failed [IPU1-0] 44.541115 s: configDeserializer failed!!! [IPU1-0] 44.541176 s: Power ON failed!!! Could you please check your fusion board has powered on or not ? Regards Surya + +Hi, Thank you for your help. I resoved my issue.The ds90ub60 jumper(s4,s5) is not right.I download the schematic of fusion board and turn it correct and it can capture the image now. Regards lyp + diff --git a/data2/text/range/5001-10000/805338.txt b/data2/text/range/5001-10000/805338.txt new file mode 100644 index 0000000000000000000000000000000000000000..b51aee7bc804cde968298afa622a023786bef628 --- /dev/null +++ b/data2/text/range/5001-10000/805338.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux: VPE Link drops too many frames in TIDL OD Usecase in Linux + +Query Text: +Tool/software: Linux Hi, I converted TIDL OD Usecase from RTOS to Linux. The links of usecase are created normally and started. However, Only full green screen was showed in display. When i printed statistics of each link, from NullSrc to Decode link, the 30 FPS was showed both input fps and output fps. However, from VPE link, Out Drop FPS increased to about 29 FPS like below capture image. VPE link is executed on IPU1_0. Could you suggest any solution? Thanks in advance. Regards, Yoo. + +Responses: +Hi Yoo, it seems that the VPE link do not receive enough output buffers, can you check if the link after VPE link is holding buffers for longer period of time. Regards, Yordan + +Hi, Thanks for answering. Could you explain the way how to check which link after VPE link is holding buffers for longer period of time? Is that showed when i print link statistics? Then, could you let me know which element indicates that time? Thanks again. Best regards, Yoo. + +Hi, could you post the complete statistics log (you can attach it as a text file). Regards, Yordan + +Hi, I attached statistics log file. log_tidl_linux.txt Thank you. Regards, Yoo. + +Any updates here? I checked FPS in a case that has only NullSrc(A15) -> IPCOUT/IN(A15->IPU1_0) -> Decode(IPU1_0) -> VPE(IPU1_0) -> Display(IPU1_0). The FPS was showed normally in VPE link. However, after i add Dup link, VPE drops almost every frames. Then, should i edit Dup link? If that, could you suggest any solution? Thank you again. Regards, Yoo. + +Hi, I see "Local Link Latency" is quite high for tidl link, but I am not sure if it is higher than expected or normal. Let me ping VisionSDK experts to provide more help. Regards, Yordan + +Hi, As Yordan suggested the link latemcy for TIDL link is very high so its keeping the buffer and causes an unavailability of buffer in VPE link which cause a drop. Even you are running it in 30FPS which is not possible in any scenario. Please check the datasheet of vision sdk. If you are running with release profile with all 4 EVE core enabled and running a OPP_HIGH MLO the you can get around 20-22 FPS with TI provided network and params files. Regards, Anuj + +Could you let me know where should i set to run OPP_HIGH MLO? I really appreciate to both to you guys. Regards, Yoo. + +I attached the link statistics of TIDL BIOS. It executed normally. RTOS_TIDL.txt And i checked Local Latency of TIDL link. However, i think the difference of Local Latency of TIDL link is not very much? And i rebuild as release mode after editing APP/configs/tda2xx-evm-linux-all/cfg.mk. The fps of VPE was a little increased. However, from SYNC link, there aren't any number in output statistics. The below is log. [HOST] [IPU2 ] 60.651131 s: [ SYNC_LINK_0 ] Link Statistics, [HOST] [IPU2 ] 60.651192 s: ****************************** [HOST] [IPU2 ] 60.651253 s: [HOST] [IPU2 ] 60.651314 s: Elapsed time = 14139 msec [HOST] [IPU2 ] 60.651375 s: [HOST] [IPU2 ] 60.651467 s: New data Recv = 34.58 fps [HOST] [IPU2 ] 60.651558 s: Driver/Notify Cb = 30.27 fps [HOST] [IPU2 ] 60.651619 s: [HOST] [IPU2 ] 60.651680 s: Input Statistics, [HOST] [IPU2 ] 60.651741 s: [HOST] [IPU2 ] 60.651772 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 60.651863 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 60.651955 s: -------------------------------------------------- [HOST] [IPU2 ] 60.652046 s: 0 | 4.24 3.74 0. 0 0. 0 [HOST] [IPU2 ] 60.652168 s: [HOST] [IPU2 ] 60.652229 s: Output Statistics, [HOST] [IPU2 ] 60.652260 s: [HOST] [IPU2 ] 60.652321 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 60.652382 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 60.652504 s: --------------------------------------------- [HOST] [IPU2 ] 60.652626 s: [HOST] [IPU2 ] 60.652656 s: [ SYNC_LINK_0 ] LATENCY, [HOST] [IPU2 ] 60.652717 s: ******************** [HOST] [IPU2 ] 60.652778 s: [HOST] [IPU2 ] 60.656194 s: [HOST] [IPU2 ] 60.656255 s: [ IPC_OUT_4 ] Link Statistics, [HOST] [IPU2 ] 60.656316 s: ****************************** [HOST] [IPU2 ] 60.656377 s: [HOST] [IPU2 ] 60.656469 s: Elapsed time = 14375 msec [HOST] [IPU2 ] 60.656530 s: [HOST] [IPU2 ] 60.656591 s: Driver/Notify Cb = 32.83 fps [HOST] [IPU2 ] 60.656682 s: [HOST] [IPU2 ] 60.656713 s: Input Statistics, [HOST] [IPU2 ] 60.656774 s: [HOST] [IPU2 ] 60.656835 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 60.656926 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 60.656987 s: -------------------------------------------------- [HOST] [IPU2 ] 60.657109 s: [HOST] [IPU2 ] 60.657140 s: Output Statistics, [HOST] [IPU2 ] 60.657201 s: [HOST] [IPU2 ] 60.657231 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 60.657323 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 60.657414 s: --------------------------------------------- [HOST] [IPU2 ] 60.657658 s: [HOST] [IPU2 ] 60.657719 s: [ IPC_OUT_4 ] LATENCY, [HOST] [IPU2 ] 60.657780 s: ******************** [HOST] [IPU2 ] 60.657841 s: [HOST] [IPU2 ] 60.666931 s: [HOST] [IPU2 ] 60.666992 s: [ IPC_IN_1 ] Link Statistics, [HOST] [IPU2 ] 60.667083 s: ****************************** [HOST] [IPU2 ] 60.667144 s: [HOST] [IPU2 ] 60.667175 s: Elapsed time = 14369 msec [HOST] [IPU2 ] 60.667266 s: [HOST] [IPU2 ] 60.667297 s: Driver/Notify Cb = 32.91 fps [HOST] [IPU2 ] 60.667388 s: [HOST] [IPU2 ] 60.667480 s: Input Statistics, [HOST] [IPU2 ] 60.667541 s: [HOST] [IPU2 ] 60.667571 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 60.667663 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 60.667754 s: -------------------------------------------------- [HOST] [IPU2 ] 60.667846 s: [HOST] [IPU2 ] 60.667907 s: Output Statistics, [HOST] [IPU2 ] 60.667968 s: [HOST] [IPU2 ] 60.667998 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 60.668090 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 60.668151 s: --------------------------------------------- [HOST] [IPU2 ] 60.668395 s: [HOST] [IPU2 ] 60.668486 s: [ IPC_IN_1 ] LATENCY, [HOST] [IPU2 ] 60.668547 s: ******************** [HOST] [IPU2 ] 60.668608 s: [HOST] [IPU2 ] 60.668669 s: [ IPC_IN_1 ] Detailed IPC Latency Statistics [ DSP1 -> IPU2 ] , [HOST] [IPU2 ] 60.668761 s: *************************************************************** [HOST] [IPU2 ] 60.673580 s: [HOST] [IPU2 ] 60.673671 s: [ ALG_OBJECT_DRAW ] Link Statistics, [HOST] [IPU2 ] 60.673763 s: ****************************** [HOST] [IPU2 ] 60.673824 s: [HOST] [IPU2 ] 60.673854 s: Elapsed time = 14352 msec [HOST] [IPU2 ] 60.673946 s: [HOST] [IPU2 ] 60.673976 s: [HOST] [IPU2 ] 60.674037 s: Input Statistics, [HOST] [IPU2 ] 60.674098 s: [HOST] [IPU2 ] 60.674129 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 60.674220 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 60.674983 s: -------------------------------------------------- [HOST] [IPU2 ] 60.675105 s: [HOST] [IPU2 ] 60.675135 s: Output Statistics, [HOST] [IPU2 ] 60.675196 s: [HOST] [IPU2 ] 60.675257 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 60.675318 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 60.675410 s: --------------------------------------------- [HOST] [IPU2 ] 60.675715 s: [HOST] [IPU2 ] 60.675745 s: [ ALG_OBJECT_DRAW ] LATENCY, [HOST] [IPU2 ] 60.675806 s: ******************** [HOST] [IPU2 ] 60.675867 s: [HOST] [IPU2 ] 60.679344 s: [HOST] [IPU2 ] 60.679405 s: [ DISPLAY ] Link Statistics, [HOST] [IPU2 ] 60.679527 s: ****************************** [HOST] [IPU2 ] 60.679588 s: [HOST] [IPU2 ] 60.679649 s: Elapsed time = 14351 msec [HOST] [IPU2 ] 60.679710 s: [HOST] [IPU2 ] 60.679771 s: [HOST] [IPU2 ] 60.679802 s: Input Statistics, [HOST] [IPU2 ] 60.679863 s: [HOST] [IPU2 ] 60.679893 s: CH | In Recv | In Drop | In User Drop | In Process [HOST] [IPU2 ] 60.679985 s: | FPS | FPS | FPS | FPS [HOST] [IPU2 ] 60.680076 s: -------------------------------------------------- [HOST] [IPU2 ] 60.680168 s: [HOST] [IPU2 ] 60.680229 s: Output Statistics, [HOST] [IPU2 ] 60.680259 s: [HOST] [IPU2 ] 60.680320 s: CH | Out | Out | Out Drop | Out User Drop [HOST] [IPU2 ] 60.680381 s: | ID | FPS | FPS | FPS [HOST] [IPU2 ] 60.680503 s: --------------------------------------------- [HOST] [IPU2 ] 60.680747 s: [HOST] [IPU2 ] 60.680808 s: [ DISPLAY ] LATENCY, [HOST] [IPU2 ] 60.680869 s: ******************** [HOST] [IPU2 ] 60.680930 s: [HOST] [IPU2 ] 60.680991 s: [HOST] [IPU2 ] 60.681052 s: [ DISPLAY VID1 ] Additional Statistics, [HOST] [IPU2 ] 60.681113 s: ************************************ [HOST] [IPU2 ] 60.681205 s: Driver Queued = 0 frames [HOST] [IPU2 ] 60.681266 s: Driver De-Queued = 0 frames [HOST] [IPU2 ] 60.681357 s: Driver Displayed = 0 frames [HOST] [IPU2 ] 60.681418 s: Driver Repeated = 0 frames [HOST] [IPU2 ] 60.681510 s: [HOST] [IPU2 ] 60.681571 s: ##### DSS DISPC Underflow Count = 0 ##### Could you suggest the way how i check which link doesn't return buffers? Thanks again. Regards, Yoo. + +Hi, I edited OPPMODE from opp_nom to opp_high in sbl_auto_component.mk file. However, i'm not sure this change what you did suggested. Besides, does OPP_HIGH works in linux enviroment? Thanks again. Regards, Yoo. + +Hi, You do not need to modify any files. After building SBL you have to pick MLO from opp_high folder instead of opp-nom folder. Regards, Anuj + +Hi, Its been long since any updates on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for a different query Regards, Anuj + diff --git a/data2/text/range/5001-10000/806484.txt b/data2/text/range/5001-10000/806484.txt new file mode 100644 index 0000000000000000000000000000000000000000..e01059a3f071c58734c96bbd67ffa3a26e24747b --- /dev/null +++ b/data2/text/range/5001-10000/806484.txt @@ -0,0 +1,16 @@ +Ticket Name: Linux: VPE link of TIDL OD Usecase in Linux drops too many frames. + +Query Text: +Tool/software: Linux Hi, I'm trying to port TIDL OD Usecase from BIOS to Linux. The usecase created and executed. However, the FPS is too slow. The below is usecase flow. (IPC IN/OUT links were contained, but skip here) NullSrc (A15) --> Decode (IPU1_0) --> VPE (IPU1_0) -->DUP (IPU1_0) --> TIDL_PREPROC(IPU1_0) --> TIDL (EVE1~4) --> MERGE_OD (DSP1) --> TIDL (DSP) ---I -----------------------------------------------------------------------------------------------------------------------------I MERGE(IPU1_0) --> SYNC(IPU1_0) -> TIOP(DSP) --> OBJ DRAW (IPU1_0) --> DISPLAY (IPU1_0) And from NullSrc to DECODE link, the FPS is keeped as 30FPS. However, in VPE, it drops 25FPS and after that it decreased more, the display link shows 1.x fps. Is there any suggestion? Should i modify something if i want to use EVE/DSP in Linux environment? Or should i add something to synchronize each core in Linux? Please help me. Thanks in advance. Regards, Yoo. + +Responses: +These are logs both of Linux and BIOS. 1. Linux [HOST] [IPU2 ] 141.917830 s: #### EVE CLK = 535.0 Mhz [HOST] [IPU2 ] 141.918013 s: #### DSP CLK = 750.0 Mhz [HOST] [IPU2 ] 141.918166 s: #### IPU CLK = 212.800000 Mhz [HOST] [IPU2 ] 141.918288 s: #### A15 CLK = 1000.0 Mhz [HOST] [EVE1 ] 141.505795 s: LOAD: CPU: 26.1% HWI: 0.2%, SWI:0.2% [HOST] [EVE1 ] 141.506100 s: [HOST] [EVE1 ] 141.506283 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 25.4% [HOST] [EVE1 ] 141.506588 s: LOAD: TSK: MISC : 0.3% [HOST] [EVE1 ] 141.506832 s: [HOST] [EVE2 ] 141.608918 s: [HOST] [EVE2 ] 141.609070 s: LOAD: CPU: 26.2% HWI: 0.2%, SWI:0.2% [HOST] [EVE2 ] 141.609375 s: [HOST] [EVE2 ] 141.609558 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 25.6% [HOST] [EVE2 ] 141.609863 s: LOAD: TSK: MISC : 0.2% [HOST] [EVE2 ] 141.610107 s: [HOST] [EVE3 ] 141.712011 s: [HOST] [EVE3 ] 141.712194 s: LOAD: CPU: 26.0% HWI: 0.2%, SWI:0.2% [HOST] [EVE3 ] 141.712468 s: [HOST] [EVE3 ] 141.712651 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 25.4% [HOST] [EVE3 ] 141.712956 s: LOAD: TSK: MISC : 0.2% [HOST] [EVE3 ] 141.713200 s: [HOST] [EVE4 ] 141.815134 s: [HOST] [EVE4 ] 141.815287 s: LOAD: CPU: 26.0% HWI: 0.2%, SWI:0.2% [HOST] [EVE4 ] 141.815592 s: [HOST] [EVE4 ] 141.815775 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 25.4% [HOST] [EVE4 ] 141.816080 s: LOAD: TSK: MISC : 0.2% 2. BIOS [IPU1-0] 35.658512 s: #### EVE CLK = 535.0 Mhz [IPU1-0] 35.658634 s: #### DSP CLK = 600.0 Mhz [IPU1-0] 35.658756 s: #### IPU CLK = 212.800000 Mhz [IPU1-0] 35.658848 s: #### A15 CLK = 750.0 Mhz [IPU1-1] 35.760446 s: [IPU1-1] 35.760507 s: LOAD: CPU: 1.2% HWI: 0.6%, SWI:0.4% [IPU1-1] 35.760629 s: [IPU1-1] 35.760721 s: LOAD: TSK: MISC : 0.2% [IPU1-1] 35.760782 s: [HOST ] 35.861343 s: [HOST ] 35.861343 s: LOAD: CPU: 11.9% HWI: 0.1%, SWI:0.1% [HOST ] 35.861373 s: [HOST ] 35.861373 s: LOAD: TSK: MISC : 11.7% [HOST ] 35.861373 s: [DSP1 ] 35.961202 s: [DSP1 ] 35.961233 s: LOAD: CPU: 18.2% HWI: 0.2%, SWI:0.1% [DSP1 ] 35.961263 s: [DSP1 ] 35.961263 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 17.6% [DSP1 ] 35.961294 s: LOAD: TSK: MISC : 0.3% [DSP1 ] 35.961324 s: [DSP2 ] 36.061245 s: [DSP2 ] 36.061245 s: LOAD: CPU: 0.2% HWI: 0.1%, SWI:0.0% [DSP2 ] 36.061276 s: [DSP2 ] 36.061306 s: LOAD: TSK: MISC : 0.1% [DSP2 ] 36.061337 s: [EVE1 ] 36.161715 s: [EVE1 ] 36.161867 s: LOAD: CPU: 90.7% HWI: 0.3%, SWI:0.2% [EVE1 ] 36.162172 s: [EVE1 ] 36.162355 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 90.0% [EVE1 ] 36.162660 s: LOAD: TSK: MISC : 0.2% [EVE1 ] 36.162874 s: [EVE2 ] 36.264137 s: [EVE2 ] 36.264289 s: LOAD: CPU: 83.8% HWI: 0.3%, SWI:0.2% [EVE2 ] 36.264594 s: [EVE2 ] 36.264777 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 83.1% [EVE2 ] 36.265143 s: LOAD: TSK: MISC : 0.2% [EVE2 ] 36.265387 s: [EVE3 ] 36.366131 s: [EVE3 ] 36.366314 s: LOAD: CPU: 84.2% HWI: 0.3%, SWI:0.2% [EVE3 ] 36.366589 s: [EVE3 ] 36.366772 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 83.5% [EVE3 ] 36.367077 s: LOAD: TSK: MISC : 0.2% [EVE3 ] 36.367321 s: [EVE4 ] 36.467974 s: [EVE4 ] 36.468126 s: LOAD: CPU: 78.8% HWI: 0.3%, SWI:0.2% [EVE4 ] 36.468431 s: [EVE4 ] 36.468614 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 78.1% [EVE4 ] 36.468919 s: LOAD: TSK: MISC : 0.2% [EVE4 ] 36.469133 s: [IPU2 ] 36.569755 s: [IPU2 ] 36.569785 s: LOAD: CPU: 0.9% HWI: 0.4%, SWI:0.3% [IPU2 ] 36.569907 s: [IPU2 ] 36.569999 s: LOAD: TSK: MISC : 0.2% + +Hi, Can you share the complete log and check the local latency of TIDL link running on EVE. It should be around 170-190ms. Regards, Anuj + +Hi, I checked local latency of each TIDL EVE in Linux. That was recorded as about 207 ms. In BIOS, as you say each EVE TIDL local latency was about 185 ms. How can i optimize to linux? I didn't change anything in TIDL link of EVE. Is this problem about reading network parameter or other something? Could you suggest? Thanks again. Regards, Yoo. + +Hi, Please share the log first. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for a different issue. Regards, Anuj + diff --git a/data2/text/range/5001-10000/808654.txt b/data2/text/range/5001-10000/808654.txt new file mode 100644 index 0000000000000000000000000000000000000000..ad07e26d7208c74ef01c96f8191eaf507cbc282b --- /dev/null +++ b/data2/text/range/5001-10000/808654.txt @@ -0,0 +1,48 @@ +Ticket Name: TDA2EVM5777: how to modify input file for TDA2 evm on SDcard + +Query Text: +Part Number: TDA2EVM5777 Hi everybody , please about the input video file to be placed together with the final files on the SD card of the board. The video provided from TI ( inputdata ) , that is also used in the segmatic demo, is in a binary format and it is not possible to convert it to a standard video file. I would like to know how to change the input video , and how to create it froma a standard video format . best regards Carlo + +Responses: +Hi, Can you tell me which usecase are you trying? Regards, Anuj + +Hi Anuj, We were using the Semantic segmentation usecase. Regards, Aleksander + +Please refer below thread for input video generation https://e2e.ti.com/support/processors/f/791/t/660676?tisearch=e2e-sitesearch&keymatch=indata%20inheader + +I tried to convert the video using the ffmpeg tool as described in the other thread. The video is resized to 1024x512 as required by the input of segmentation use case. After substituting the demo video with the converted one, the output from the board is noisy and the image is not clear. The converted video is fine when I visualize it on VLC on PC. I attached a picture of the output video as well as the output of the serial terminal. + +Hi, There is some issue with the input file. Have you changed inHeader_semSeg file accordingly? Regards, Anuj + +Hi, No, in this case I only substituted the video file of the demo. In the demo there was no header file + +Hi, When you change the input video file then you have to change the input header file also. Otherwise it will read wrong size of frame. Please generate header file with new input video file. Regards, Anuj + +Hi Anuj, I generated the header file. Now the frames are displayed correctly, but the video is not fluid. It seems that before proceeding to the next frame it goes back for some frames than it moves forward. I uploaded a video of the output. + +the zip file contains the generated header and the video. nydrive_resized_bck.zip + +Hi, In VSDK we rewind the file when it reaches EOF. So it seems like you are reading versy small video with very less frames. Can you try with greater no of frames video. Regards, Anuj + +Hi Anuj, The video is long enough. During conversion I used a big number of frames. If you notice from the recording, the video goes some frames back than proceeds the next frames. Regards, Alex + +Hi, From the video it seems like it is running in a loop. I hope you are reading encoded file and has not done any modification in usecase except using your own file instead ti provided one. Regards, Anuj + +Hi, I confirm, I did not do any modification in the use case. Only converted the video and generated the header file. In the thread above I also included the video and the header. Regards Alex + +Hi, You have to use a null link to dump the the file which is going to decoder or the next link and find out where the frames are getting repeated. As from the video is not coming back. It just running 5-6 frame sin a loop. Regards, Anuj + +Hi, Its been very long since any update on this thread. I hope the issue is resolved. If not the please reply below or create a new thread for a different issue. Regards, Anuj + +Hi, Sorry, but I missed the email notifying me about your post on this thread. How to create a null link which dumps the file? Can you please write a detailed guide on how to do this? Regards, Alex + +Hi, We already have a null link, You just need to add that link in your usecase txt file and regenerate usecase. Please refer VisionSDK_ApiGuide doc available in doc folder and look for Null link. You can also refer below usecase for null link params vision_sdk\apps\src\rtos\usecases\null_src_dec_display Regards, Anuj + +So you mean, it is enough that I add the keyword "NullSource" in the file chains_semSeg.txt? If so, the NullSource link is already present the in the usecase before the Decode link. + +Hi, I have asked you to add null link not nullSource link. i have provide the reference usecase also. I have told, you have to add this null link after decoder link using a dup link. The apiguide is also available in doc folder in case of any issue with the param setting of null link. Regards, Anuj + +Hi, I'm sorry, maybe for you it is very clear what you are asking, but for me it is not as I'm not an expert on TI framework. U asked me to take as a reference vision_sdk\apps\src\rtos\usecases\null_src_dec_display. And so did I, in particular I'm referring to the txt file that generates the c files. Here is the content of this file: UseCase: chains_nullSrcDecDisplay NullSource (IPU1_0) -> Dup Dup -> Decode -> VPE -> Display Dup -> Null So referring to this file, I see only NullSource, so I have no idea what you mean by "null link and not nullSource". Here is the segmentation usecase: UseCase: chains_semSeg NullSource -> Decode -> Dup Dup -> Merge (A15) Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidlpreproc (A15) -> Alg_tidl_Eve3 (EVE3) Alg_tidlpreproc (A15) -> Alg_tidl_Eve4 (EVE4) Alg_tidl_Eve1 (EVE1) -> Alg_tidlpostproc (A15) Alg_tidl_Eve2 (EVE2) -> Alg_tidlpostproc (A15) Alg_tidl_Eve3 (EVE3) -> Alg_tidlpostproc (A15) Alg_tidl_Eve4 (EVE4) -> Alg_tidlpostproc (A15) Alg_tidlpostproc (A15) -> Merge (A15) Merge (A15) -> Sync (A15) -> Alg_tidlpostproc_cpy (A15) Alg_tidlpostproc_cpy (A15) -> Display GrpxSrc -> Display_Grpx What am I supposed to modify and how? After modifying this, should I modify also the chains_semSeg.c file? If yes, how? As far as I'm concerned, instructions on how to modify the c file are not included in docs. I have same problem if I want to modify the usecase later to take input from camera. Thank you Regards + +Hi, If you do not have much idea on TI framework then i would first advice you to go through training videos. link are available with vision_sdk\docs\Index.htm. Go through the Api guide also as it will tell about the params of all link. Yes after modifying the the txt file you can generate the usecase file but you need to modify semseg,c file, its been not been mentioned in docs as there could be thousands number of usecase which we can not explain in docs. That is why i asked you to take a reference of other usecase file where params for null and dup link is set. Until you wont have much idea on our framework it will be difficult for us to answer and difficult for you as well to understand our answer. So i will suggest you to take some time and go through the docs and training videos. Run some sample usecase link single camera display, null source decode display etc and modify them and run it again. I hope i have made it clear myself, incase of any issue with the getting started with VSDK please post a new query. And close this one. If in future, you still face this isue afer going through all docs and the pointer shared in this thread, please raise a thread and we will help you. Regards, Anuj + diff --git a/data2/text/range/5001-10000/816548.txt b/data2/text/range/5001-10000/816548.txt new file mode 100644 index 0000000000000000000000000000000000000000..9d98f1b364d74ca64e5e29635e01a93997aff074 --- /dev/null +++ b/data2/text/range/5001-10000/816548.txt @@ -0,0 +1,30 @@ +Ticket Name: Linux/DRA76P: load visionSDK IPU firmware by bootloader, but IPU frequency setting is not correct + +Query Text: +Part Number: DRA76P Other Parts Discussed in Thread: TDA2 Tool/software: Linux hi all, i load visionSDK IPU2 firmware by bootloader from EMMC, it can run. but i get the IPU log as following show that the frequency is so low: [HOST] [IPU2 ] 3.670530 s: ***** IPU2 Firmware build time 16:37:06 Jul 2 2019 [HOST] [IPU2 ] 3.670743 s: ------ (1) clkHz = 16393 HZ [HOST] [IPU2 ] 3.670804 s: ------ (2) clkHz = 16393 HZ [HOST] [IPU2 ] 3.670865 s: *** SYSTEM: CPU Frequency , if i load the firmware by remoteproc kernel module, the frequency setting is correct. then i follow the code, i found the API "Utils_getClkHz(UTILS_CLK_ID_IPU);" return value is 16393. so the IPU2 frequency be set to it. why get the clock from PRCM is so low? can i change the frequency in uboot? how do it? best regards! + +Responses: +Hi Fanok, Can you please run the command Utils_getClkHz() from M4 after Linux is initialized and let us know if the issue is still observed? Regards Shravan + +hi Shravan, after linux kernel start, i get the clock frequency is normal, the log as following: [HOST] [IPU2 ] 5.979594 s: ------ (3) clkHz = 16393 HZ [HOST] [IPU2 ] 6.172543 s: startX = 0, startY = 0, width = 960, height = 540, srcPitch = 3840; destPitch = 7680, iconID = 1!!! [HOST] [IPU2 ] 6.173702 s: DMA copy take 934 us... [HOST] [IPU2 ] 6.173915 s: DISPLAY: 0 receive first frame!! [HOST] [IPU2 ] 6.174159 s: ------ Fill Grpx src buffer finish------ [HOST] [IPU2 ] 6.174251 s: ++++++++ switch grpxsrc icon id: 1!!! [HOST] [IPU2 ] 6.979564 s: ------ (3) clkHz = 212800000 HZ [HOST] [IPU2 ] 7.109589 s: startX = 0, startY = 0, width = 960, height = 540, srcPitch = 3840; destPitch = 7680, iconID = 2!!! [HOST] [IPU2 ] 7.110626 s: DMA copy take 836 us... [HOST] [IPU2 ] 7.110809 s: ------ Fill Grpx src buffer finish------ [HOST] [IPU2 ] 7.110870 s: ++++++++ switch grpxsrc icon id: 2!!! [HOST] [IPU2 ] 7.979594 s: ------ (3) clkHz = 212800000 HZ [HOST] [IPU2 ] 8.109223 s: startX = 0, startY = 0, width = 960, height = 540, srcPitch = 3840; destPitch = 7680, iconID = 1!!! [HOST] [IPU2 ] 8.110199 s: DMA copy take 776 us... [HOST] [IPU2 ] 8.110382 s: ------ Fill Grpx src buffer finish------ [HOST] [IPU2 ] 8.110473 s: ++++++++ switch grpxsrc icon id: 1!!! [HOST] [IPU2 ] 8.979625 s: ------ (3) clkHz = 212800000 HZ could you please hlep me figure out the issue? best regards! + +hi Shravan, when boot the IPU firmware by bootloader, how to set the correct the cpu frequency? why get the cpu frequency is so low? best regards! + +Hi Fanok, Can you please enable prcm for timer-9 in the function Utils_prcmTimerInitForIpu defined in links_fw/src/rtos/utils_common/src/tda2px/utils_prcm.c. This should set the frequency as expected. Regards Shravan + +hi Shravan, thanks for your help, i add timer9 in this function: Void Utils_prcmTimerInitForIpu(void) { /* PRCM enable for Timers 3 and 11 for IPU access */ prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER3_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER9_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER11_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); } but not work, Utils_prcmTimerInitForIpu() already be called in somewhere? or i need call it in my code? best regards! + +hi Shravan, i add the following code in Utils_prcmInit(), Utils_prcmInit() is called in IPU_primary_core_init(): prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER3_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER9_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); prcm_set_module_mode(L4PER_CM_CORE, L4PER_CM_CORE__CM_L4PER_TIMER11_CLKCTRL, MODE_ENABLED, 0x00000000, 0x00000000 ); but did not work too. best regards! + +Hi Fanok, I use TDA2 and load IPU2 firmware by MLO, has the same issue. I checked the PMlib fined this issue is IPU1 DPLL setting error. Maybe you can try to turn IPU1 clock before IPU2. Best Regards + +hi jay chiang, thanks for your reply, can you tell me which file or function i need to modify? best regards! + +Hi, Fanok, Please modify and try board/ti/dra7xx/lateattach.c u32 spl_boot_core(u32 core_id) int tablesz; u32 decomp_len, inp_len; + struct rproc *ipu1_cfg = rproc_cfg_arr[IPU1]; + + if (IPU2 == core_id) { + if (ipu1_cfg->start_clocks) + ipu1_cfg->start_clocks(IPU1, ipu1_cfg); + } Best Regards. + +hi jay chiang， Thanks for your help, this solved my problem. best regards! + +hi jay chiang, now i encounter one another issue, a15 can not communicate with IPU by rpmsg. i follow the code, i found that IPU was blocked in the following code (can not get VDEV): while(1) { retval = Resource_getVdevStatus(RPMSG_LATE_ATTACH_A15_VDEV_ID); if(retval != RPMSG_LATE_ATTACH_A15_VDEV_ID) { BspOsal_sleep(10); retryCnt++; } else { Vps_printf("Connection established with HLOS, calling rpmsgInit\n"); break; } } IpcMgr_rpmsgStartup(); so IpcMgr_rpmsgStartup() will not be called. do you have the same issue? best regards! + +hi jay chiang, I found a problem, i think my problem is solved, but it is not exactly. even though i can get the correct frequency, but the animation i play is very slow like before. Do you have the same issue? *** SYSTEM: CPU Frequency , best regards! + diff --git a/data2/text/range/5001-10000/817803.txt b/data2/text/range/5001-10000/817803.txt new file mode 100644 index 0000000000000000000000000000000000000000..fbeda5bce3e4cc69d985b30a1131a0455f6c641e --- /dev/null +++ b/data2/text/range/5001-10000/817803.txt @@ -0,0 +1,18 @@ +Ticket Name: Linux/DRA756: dra756 custom board, Card did not respond to voltage select, MMC: no card present + +Query Text: +Part Number: DRA756 Other Parts Discussed in Thread: PCF8575, DRA742 Tool/software: Linux Hi, recently, i encounter a problem about starting u-boot from SD card. SDK: ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01 CPU: DRA756 u-boot: git://git.ti.com/ti-u-boot/ti-u-boot.git connection: /* MMC1_PINS_SDR12 */ 0x1754 0x60000 W6 CTRL_CORE_PAD_MMC1_CLK mmc1_clk mmc1_clk 0x1758 0x60000 Y6 CTRL_CORE_PAD_MMC1_CMD mmc1_cmd mmc1_cmd 0x175C 0x60000 AA6 CTRL_CORE_PAD_MMC1_DAT0 mmc1_dat0 mmc1_dat0 0x1760 0x60000 Y4 CTRL_CORE_PAD_MMC1_DAT1 mmc1_dat1 mmc1_dat1 0x1764 0x60000 AA5 CTRL_CORE_PAD_MMC1_DAT2 mmc1_dat2 mmc1_dat2 0x1768 0x60000 Y3 CTRL_CORE_PAD_MMC1_DAT3 mmc1_dat3 mmc1_dat3 0x176C 0xE0000 W7 CTRL_CORE_PAD_MMC1_SDCD mmc1_sdcd mmc1_sdcd 0x1770 0xD0000 Y9 CTRL_CORE_PAD_MMC1_SDWP mmc1_sdwp mmc1_sdwp VDD is connected to 3.3v power directly instead of control by PCF8575. Now, i have no idea to fix the problem and i hope you guys give me some suggestion.I would be very grateful. the following log is that the u-boot output. ==================================================================== U-Boot SPL 2019.04-rc1-00239-gb89074f-dirty (Jul 05 2019 - 17:36:32 +0800) DRA752-GP ES2.0 Trying to boot from MMC1 no pinctrl state for default mode unable to get I2C bus. ret -19 tps65903x: could not set LDO1 voltage. clock is enabled (400000Hz) clock is enabled (25000000Hz) Loading Environment from FAT... *** Warning - bad CRC, using default environment Loading Environment from MMC... clock is enabled (400000Hz) Card did not respond to voltage select! *** Warning - No block device, using default environment U-Boot 2019.04-rc1-00239-gb89074f-dirty (Jul 05 2019 - 17:36:32 +0800) CPU : DRA752-GP ES2.0 Model: TI DRA742 Board: DRA74x EVM REV DRAM: 1.5 GiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Loading Environment from FAT... MMC: no card present Loading Environment from MMC... clock is enabled (400000Hz) Card did not respond to voltage select! *** Warning - No block device, using default environment Warning: fastboot.board_rev: unknown board revision clock is enabled (400000Hz) Card did not respond to voltage select! invalid mmc device Net: Could not get PHY for ethernet@48484000: addr 2 Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 MMC: no card present MMC: no card present MMC: no card present MMC: no card present Trying to boot Linux from eMMC ... clock is enabled (400000Hz) Card did not respond to voltage select! MMC: no card present Trying to boot Android from eMMC ... clock is enabled (400000Hz) Card did not respond to voltage select! MMC: no card present clock is enabled (400000Hz) Card did not respond to voltage select! clock is enabled (400000Hz) Card did not respond to voltage select! mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev [boot_ack boot_partition partition_access] - Show or change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Wrong Image Format for bootm command ERROR: can't get kernel image! => mmc info MMC: no card present => + +Responses: +Hi, The u-boot version does not look correct for ti-processor-sdk-linux-automotive-dra7xx-evm-5_00_00_01. Version should be 2018.01+, your log is sowing 2019.04+. Regards, Vishal + +You are right, i also tried the u-boot version(dra7xx-evm_05_00_00_01.xml, commit:eac41e26ac56fcabf9826b21377931c7b8e646f2). The results are same. Not sure if it is right because i download it manually. I will make sure the version is correct first. Thanks for your suggestion. + +Hi, I downloaded all the source code through setup.sh and burn a image into SD card. the following is the log: ======================================================= U-Boot SPL 2018.01-00556-geac41e2 (Jul 07 2019 - 23:30:58) DRA752-GP ES2.0 Trying to boot from MMC1 no pinctrl state for default mode MMC: no card present spl: mmc init failed with error: -123 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### ======================================================= + +Hello, i fixed it finally. the following is the change i made. Actually, i don't understand what it means, and i just try again and again. So if you guys know what it means, please let me know. I want to understand the essential reason. ============================================================= diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts index aa426da..d55a144 100644 --- a/arch/arm/dts/dra7-evm.dts +++ b/arch/arm/dts/dra7-evm.dts @@ -334,7 +334,7 @@ * SDCD signal is not being used here - using the fact that GPIO mode * is always hardwired. */ - cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; + /* cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; */ pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; ============================================================= + +Hi, This is the property used to describe card-detect gpio. On TI EVM this GPIO is used to detect when SD card is inserted and removed. More information on this property can be found here --> https://www.kernel.org/doc/Documentation/devicetree/bindings/mmc/mmc.txt Regards, Vishal + +Thank you, Vishal. + diff --git a/data2/text/range/5001-10000/820371.txt b/data2/text/range/5001-10000/820371.txt new file mode 100644 index 0000000000000000000000000000000000000000..ad7e192a0f680aee9a950b469f3621ee574809e3 --- /dev/null +++ b/data2/text/range/5001-10000/820371.txt @@ -0,0 +1,26 @@ +Ticket Name: RTOS/PROCESSOR-SDK-TDAX: How to set Ethernet Port with External Ethernet Switch? + +Query Text: +Part Number: PROCESSOR-SDK-TDAX Other Parts Discussed in Thread: TDA2 Tool/software: TI-RTOS I am working on project using TDA2xx(X5777A7XGABC) in Custom board. I am developing with vision sdk 03.06 & ndk_2_24_02_31 & nsp_gmacsw_4_16_00_00. My system is as follows. * TDA2 RGMII-0 <--> Another System * TDA2 RGMII-1 <--> External Ethernet Switch(NXP SJA1105) <--> Port1/2/3/4/5 I rebuild nsp as dual emac mode. NSP is executed in a15(RTOS). External Ethernet Switch don't have MDIO. It is seperately initialized by SPI. It is controlled correctly. vision_sdk\links_fw\src\rtos\utils_common\ndk\ndk_nsp_hooks.c GMACSW_Config *GMACSW_getConfig(void) { ...... pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; ...... pGMACSWConfig->macInitCfg[i].macConnectionType = MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; ...... pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(0)); ...... } I sure that TXC(25Mhz)/RXC(25Mhz) each is output. I confirmed MAC Address in console log. I assigned static IP Address. [HOST ] MAC Port 0 Address: [HOST ] 6c-c3-74-1e-23-1e [HOST ] MAC Port 1 Address: [HOST ] 6c-c3-74-1e-23-1f [IPU1-0] 3097.101171 s: My IP address for interface 1 : 169.254.252.100 [IPU1-0] 3097.101262 s: My IP address for interface 2 : 169.254.253.101 How do I modify RGMII-1? Please let me know if it's wrong or if there are additional edit points. + +Responses: +Hi Jongyoun, Help me understand you query better. So you want to connect 1. RGMII0 (MAC Port 0) to a different system(I believe you mean PC by system, in that case you are configuring it in normal mode, i.e not PHY-less) 2. RGMII1 (MAC Port 1) to a switch, in which you need a MAC 2 MAC connection. If this is the case, you have rightly re-built the NSP in dual mac mode. You static IP assignment also looks good to me. Only place where it looks fishy is you're assigning NO_PHY mode and PhyMask to both the interfaces. In your case, shouldn't you be configuring RGMII1 as NO_PHY and the other one differently? Regards, Anand + +Hi Anand. Thanks for the answer. I will explain more about the system. 1. RGMII0 (MAC to MAC) : Another System(TDA2 direct without PHY) 2. RGMII1 (MAC to MAC) : The Other System(TDA2 with External Ethernet Switch) Both ports are connected as MAC to MAC. I guess I'll set it up together. 1. How do I set this up? 2. And how do I PING test it in the RTOS? 3. Do I need to set up additional pinmux and interrupts? Regards, Jongyoun + +Hi Anand. RGMII0/1 are not working. All ports don't have any Data Signal. But TX Clock output when Rx Clock is received. After building sdk, when you see the generated file in the binaries folder at the following location, there is ti_ndk_config_ip_init function. * vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/a15_0/release/vision_sdk_configuro/package/cfg/MAIN_APP_a15_0_pa15fg.c Void ti_ndk_config_ip_init(HANDLE hCfg) { /* Add our global hostname to hCfg (to be claimed in all connected domains) */ CfgAddEntry(hCfg, CFGTAG_SYSINFO, CFGITEM_DHCP_HOSTNAME, 0, strlen(ti_ndk_config_Global_HostName), (UINT8 *)ti_ndk_config_Global_HostName, 0); /* Configure IP address manually on interface 1 */ { CI_IPNET NA; CI_ROUTE RT; /* Setup manual IP address */ bzero(&NA, sizeof(NA)); NA.IPAddr = inet_addr(LocalIPAddr); NA.IPMask = inet_addr(LocalIPMask); strcpy(NA.Domain, DomainName); NA.NetType = 0; CfgAddEntry(hCfg, CFGTAG_IPNET, 1, 0, sizeof(CI_IPNET), (UINT8 *)&NA, 0); /* * Add the default gateway. Since it is the default, the * destination address and mask are both zero (we go ahead * and show the assignment for clarity). */ bzero(&RT, sizeof(RT)); RT.IPDestAddr = 0; RT.IPDestMask = 0; RT.IPGateAddr = inet_addr(GatewayIP); CfgAddEntry(hCfg, CFGTAG_ROUTE, 0, 0, sizeof(CI_ROUTE), (UINT8 *)&RT, 0); } } Is it OK to set only interface1 when setting to dual mac? NC_NetStart(ndk\netctrl\netctrl.c) --> NS_BootTask(ndk\netctrl\netnetsrv.c) -> SPIpNet(ndk\netctrl\netnetsrv.c) --> NtAddNetwork(ndk\nettools\ipaddr\ipaddr.c) It seems that the NtAddNetwork is run with the following path by that setting And the dual mac is not considered. Is it unrelated? please answer about my question. Regards, Jongyoun + +Hi Jongyoun, Don't worry about the configuration of the second interface not being added in NDK. That's taken care in the ndk_nsp_hooks.c file in vision sdk. How did you ping to the interfaces? If you used two different PCs, do both of them have static IPs in the matching subnet? I mean, are the static IPs of your PCs something like 169.254.252.x and 169.254.253.x ? Regards, Anand + +Hi Anand, I modified it as follows. 1. I applied patch (vision_sdk\docs\Patches\0001-PAD-Mux-changes-to-enable-Dual-MAC.patch) 2. ti_components/networking/nsp_gmacsw_4_16_00_00/packages/ti/nsp/drv/config.bld (Line84 ~ 86) 3. vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/NDK_config.cfg (enableStaticIpEth0 = 0 -> 1, enableStaticIpEth1 = 0->1) if(NdkProcToUse=="a15_0") if (enableStaticIpEth0) { /* Settings for static IP configuration */ Ip.address = "169.254.252.100"; Ip.mask = "255.255.255.0"; Ip.gatewayIpAddr = "169.254.252.1"; Ip.ifIdx = 1; } 4. vision_sdk/links_fw/src/rtos/utils_common/src/ndk/ndk_nsp_hooks.c GMACSW_Config *GMACSW_getConfig(void) { ...... pGMACSWConfig->macInitCfg[i].mdioModeFlags = MDIO_MODEFLG_NOPHY; ...... pGMACSWConfig->macInitCfg[i].macConnectionType = MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL; ...... pGMACSWConfig->macInitCfg[i].phyMask = (uint32_t)((uint32_t)0x1 << (uint32_t)(0)); ...... } void stackInitHookStaticEth1(void *hCfg) { /*Static IP Address settings for interface 2*/ const char *ip_addr_2 = "169.254.253.101"; const char *ip_mask_2 = "255.255.255.0"; const char *ip_gateway_2 = "169.254.253.1"; ................. ................. } 5. NDK rebuild Is it OK? And I tested it as follows. * RGMII0(169.254.252.100 / TI-RTOS) -> I don't try to test yet. * RGMII1(169.254.253.101 / TI-RTOS) --> Ethernet Swtich --> TDA2(static IP 169.254.253.105 / Linux) or PC(static IP 169.254.253.50 / Windows) : I don't try to test yet. * RGMII1(169.254.253.101 / TI-RTOS) <-- Ethernet Swtich <-- TDA2(static IP 169.254.253.105 / Linux) or PC(static IP 169.254.253.50 / Windows) : RGMII1 is not working * TDA2(static IP 169.254.253.105 / Linux) --> Ethernet Swtich --> PC(static IP 169.254.253.50 / Windows) : Ping test complete. * PC(static IP 169.254.253.50 / Windows) --> Ethernet Swtich --> TDA2(static IP 169.254.253.105 / Linux) : Ping test complete. Regards, Jongyoun + +Hi Anand, I'm currently continuing the test. vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/cfg/NDK_config.cfg enableStaticIpEth0 = 1 enableStaticIpEth1 = 1 The value is set as above. On booting time, LLIGenArpPacket is called(eth1), LLITxIpPacket is called(eth0). Function is located in ndk_2_24_02_31\packages\ti\ndk\stack\lli\lliout.c When I change the value of either enableStaticIpEth0 or enableStaticIpEth1 to 0, LLITxIpPacket is called(eth0) periodically after booting is completed. Do you have any reason to guess? Regards, Jongyoun + +Hi Anand, I'm currently checking NDK/NSP source code. NIMU_NDK_start function is called twice when I enable DUAL_MAC.(eth0, eth1) However, there is one question during source code checking. * nsp_gmacsw_4_16_00_00/packages/ti/nsp/drv/ndk2nsp/ndk2nsp.h typedef struct NDK2NSP_OBJECT_ { ............. uint8_t bMacAddr[MAC_NUM_PORTS][6]; ............ }NDK2NSP_Object, *NDK2NSP_Handle; * nsp_gmacsw_4_16_00_00/packages/ti/nsp/drv/ndk2nsp/nimu_ndk.c static int NIMU_NDK_start(NETIF_DEVICE *pNETIFDevice) { /*This variable tells us if we are dealing with interface 1 or 2*/ uint32_t devIdx = pNETIFDevice->index-1U; ................... /* Open the translation layer, which itself opens the hardware driver */ hNDK2NSP = NDK2NSP_open((STKEVENT_Handle)pNETIFDevice->pvt_data); if (NULL != hNDK2NSP) { ................. /* Copy the MAC Address into the network interface object here. */ mmCopy(&pNETIFDevice->mac_address[0], &hNDK2NSP->bMacAddr[0], (uint)6U); /* Set the 'initial' Receive Filter */ hNDK2NSP->Filter = ETH_PKTFLT_ALL; if(0U == devIdx) { NDK2NSP_setRx(hNDK2NSP); } ......... } } When copying the value of bMacAddr, why not refer to devIdx? Regards, Jongyoun + +Hi Jongyoun, It is an issue, and I can give you a patch for this. It is a book keeping structure which is used by the stack. This doesn't functionally affect the data flow, unless you try to send/recv data to/from eth1 and eth0 interfaces from the same physical port (which is not expected from the current implementation, as dual mac and switch mode of the GMACSW is not supported together now). There is an internal SW filter which forwards the packets depending on port. This should take care of the issue. But looking at your setup, I believe this should not affect you as you are trying to communicate with eth1 from the RGMII1, which should work fine. Are you unable to receive data in the devices connected to your switch? Regards, Anand + +Hi Jongyoun, Any updates on this? Regards, Anand + +Hi Jongyoun, Any updates on this yet? Shall I assume you were able to get past the issue? Regards, Anand + diff --git a/data2/text/range/5001-10000/820770.txt b/data2/text/range/5001-10000/820770.txt new file mode 100644 index 0000000000000000000000000000000000000000..55628ca0d2a6f928abfe114cfc79cad971e13b25 --- /dev/null +++ b/data2/text/range/5001-10000/820770.txt @@ -0,0 +1,20 @@ +Ticket Name: TDA2PXEVM: Output of semseg pixels values at the tidl_postproclink_algplugin.c + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi TI team, I have successfully deployed my trained model on tda2. Now I want to apply image processing further which could help me generating the required output. I have two questions about it and detailed answers will be highly appreciated. 1. How can I see the pixel values of each classes at the tidl_postproclink, I added some part of the code but I can't understand the output it is generating. What I need is the pixel value of each classes of my segmented objects. So far, I have only two objects. Here is the picture below of my code: 2. Adding this for loop and print function also disturbs my output on the display and make it completely black. How to deal with issue also, do I need to allocate any memory before doing any such thing, if yes, can you give me some hint on it? Kindly respond me asap. Thank you. With best regards, H.M. Owais + +Responses: +Hi, Printing such a large array in short time is not possible, so you are getting improper display. You can add a dup link after tidlpostproc and add a null link on IPU1_0 core to dump that output and check. Regards, Anuj + +Hi Anuj, Thank you for your response. I tried to add the dup link in the txt file to generate the code but it gave me error. Error: Link [Dup] must have one and only one incoming link Following is my txt I used to add dup and null into my semseg: UseCase: chains_semSeg NullSource -> Decode -> Dup Dup -> Merge (A15) Dup -> Alg_tidlpreproc (A15) Alg_tidlpreproc (A15) -> Alg_tidl_Eve1 (EVE1) Alg_tidlpreproc (A15) -> Alg_tidl_Eve2 (EVE2) Alg_tidl_Eve1 (EVE1) -> Alg_tidlpostproc (A15) Alg_tidl_Eve2 (EVE2) -> Alg_tidlpostproc (A15) Alg_tidlpostproc (A15) -> Dup -> Null Alg_tidlpostproc (A15) -> Merge (A15) Merge (A15) -> Sync (A15) -> Alg_tidlpostproc_cpy (A15) Alg_tidlpostproc_cpy (A15) -> Display GrpxSrc -> Display_Grpx seems like I shouldn't add Alg_tidlpostproc(A15) as an input. Moreover, Is there any documents which explains about Links. Thank you. With best regards, H.M.Owais + +Hi, Dup link is a link which can have single input and multiple output. As there is already a dup in your usecase so the 2nd dup will have some different name like "DUP_1". Regards, Anuj + +Hi Anuj, Thank you for your reply. I followed your advice and did exactly as you suggested. I added the dup link at the output of the tidl_postproc and then added the Null link to dump the files. Something like this: tidl_postproc-> dup_1 dup_1-> Null. When I ran the usecase to check the frames at the print. I received this error Assertion @ Line: 231 in ipcOutLink_drv.c: pObj->createArgs.inQueParams.prevLinkQueId < pObj->prevLinkInfo.numQue :! can you tell me why is it happening.? Moreover, do I need to access the output of the null link to dump the files? I am bit confused with the structure of these usecases. What parameters should I set and how to get the values of it. It will be of great help if you could give some useful hints on it. Thank you. With best regards, H.M. Owais I added the dup link at the output of the tidl_postproc and then added the Null link to dump the files. Something like this: tidl_postproc-> dup_1 dup_1-> Null. When I ran the usecase to check the frames at the print. I received this error Assertion @ Line: 231 in ipcOutLink_drv.c: pObj->createArgs.inQueParams.prevLinkQueId < pObj->prevLinkInfo.numQue :! can you tell me why is it happening.? Moreover, do I need to access the output of the null link to dump the files? I am bit confused with the structure of these usecases. What parameters should I set and how to get the values of it. It will be of great help if you could give some useful hints on it. Thank you. With best regards, H.M. Owais + +Hi Anuj, Thank you for your reply. I followed your advice and did exactly as you suggested. I added the dup link at the output of the tidl_postproc and then added the Null link to dump the files. Something like this: tidl_postproc-> dup_1 dup_1-> Null. When I ran the usecase to check the frames at the print. I received this error Assertion @ Line: 231 in ipcOutLink_drv.c: pObj->createArgs.inQueParams.prevLinkQueId < pObj->prevLinkInfo.numQue :! can you tell me why is it happening.? Moreover, do I need to access the output of the null link to dump the files? I am bit confused with the structure of these usecases. What parameters should I set and how to get the values of it. It will be of great help if you could give some useful hints on it. Thank you. With best regards, + +Hi Anuj, Thank you for your reply. I followed your advice and did exactly as you suggested. I added the dup link at the output of the tidl_postproc and then added the Null link to dump the files. Something like this: tidl_postproc-> dup_1 dup_1-> Null. When I ran the usecase to check the frames at the print. I received this error Assertion @ Line: 231 in ipcOutLink_drv.c: pObj->createArgs.inQueParams.prevLinkQueId < pObj->prevLinkInfo.numQue :! can you tell me why is it happening.? Moreover, do I need to access the output of the null link to dump the files? I am bit confused with the structure of these usecases. What parameters should I set and how to get the values of it. It will be of great help if you could give some useful hints on it. Thank you. With best regards, + +Hi, If i have clearly understand your usecase then you want to check the output of tidlpostproc link. In order to do that you have to dump that data in sd card as printing those data is not possible. you can dump that data using null and dup link. replace below line from usecase txt file Alg_tidlpostproc (A15) -> Merge (A15) and add below lines Alg_tidlpostproc (A15) -> dup_1 (A15) dup_1 (A15) -> Null. dup_1 (A15) -> Merge (A15) And set dup and null link params correctly. For these params you can take reference from other usecase where these links has been used. Regards, Anuj + diff --git a/data2/text/range/5001-10000/821186.txt b/data2/text/range/5001-10000/821186.txt new file mode 100644 index 0000000000000000000000000000000000000000..edb1596ce631107951f8e0d5e796e7121678a1b4 --- /dev/null +++ b/data2/text/range/5001-10000/821186.txt @@ -0,0 +1,118 @@ +Ticket Name: Linux/TDA2E: vision SDK 3.02 DRA72x use kernel_menuconfig set A15 freqency + +Query Text: +Other Parts Discussed in Thread: TDA2E art Number: TDA2E Tool/software: Linux Hi I try to use make kernel_menuconfig to set governors is Performance. But I use omapconf show opp to check freqency is still 1000HZ. System also show can not find scaling_governor file message. Did I less some procedure or DRA72x can not use kernel_menuconfig set A15 freqency? thanks Yumei + +Responses: +Hi Yumei Hang, Selecting cpufreq governor from menuconfig should work. Could you share the full Kernel boot log and your kernel ".config" file (after you have built Kernel)? Regards, Vishal + +Hi Vishal There are my .config file and procedure message when I run sd card. Is MPU max freqency 800? Because I see tda2ex file table is show 800,but mpu default freqency is 1000. thanks Yumei 6013.kernel_boot.txt +U-Boot SPL 2016.05-00008-g1fbee98-dirty (Jul 18 2019 - 10:37:17) +DRA722-GP ES2.0 +*** Warning - bad CRC, using default environment + +Trying to boot from MMC1 +reading dra7-ipu2-fw.lzop +reading dra7-dsp1-fw.lzop +spl: falcon_args_file not set in environment, falling back to default +reading single-stage-boot.dtb +reading uImage +reading uImage +[ 0.000000] Booting Linux on physical CPU 0x0 + [ 0.000000] Initializing cgroup subsys cpuset + [ 0.000000] Initializing cgroup subsys cpu + [ 0.000000] Initializing cgroup subsys cpuacct + [ 0.000000] Linux version 4.4.84-00018-gd326d64-dirty (autorad@autorad-VirtualBox) (gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) ) #9 SMP PREEMPT Thu Aug 2 15:33:26 CST 2018 + [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d + [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache + [ 0.000000] Machine model: TI DRA722 Rev C EVM + [ 0.000000] bootconsole [earlycon0] enabled + +Welcome to Arago 2016.12! + +[ OK ] Listening on udev Kernel Socket. +[ OK ] Started Dispatch Password Requests to Console Directory Watch. +[ OK ] Created slice System Slice. +[ OK ] Started Forward Password Requests to Wall Directory Watch. +[ OK ] Reached target Paths. +[ OK ] Listening on Journal Socket (/dev/log). +[ OK ] Listening on Journal Socket. + Starting Journal Service... + Starting Create list of required st... nodes for the current kernel... � Starting Remount Root and Kernel File Systems... + Starting Load Kernel Modules... + Mounting Temporary Directory... + Mounting POSIX Message Queue File System... +[ OK ] Created slice User and Session Slice. +[ OK ] Reached target Slices. +[ OK ] Listening on /dev/initctl Compatibility Named Pipe. +[ OK ] Reached target Swap. +[ OK ] Created slice system-serial\x2dgetty.slice. +[ OK ] Listening on udev Control Socket. + Starting Setup Virtual Console... +[ OK ] Mounted POSIX Message Queue File System. +[ OK ] Mounted Temporary Directory. +[ OK ] Started Journal Service. +[ OK ] Started Create list of required sta...ce nodes for the current kernel. +[ OK ] Started Remount Root and Kernel File Systems. +[FAILED] Failed to start Load Kernel Modules. + +See 'systemctl status systemd-modules-load.service' for details. + [ OK ] Started Setup Virtual Console. Starting Apply Kernel Variables... Starting udev Coldplug all Devices... Starting Load/Save Random Seed... + Starting Create Static Device Nodes in /dev... + Starting Flush Journal to Persistent Storage... +[ OK ] Started Apply Kernel Variables. +[ OK ] Started Load/Save Random Seed. +[ OK ] Started Create Static Device Nodes in /dev. +� [ OK ] Started Flush Journal to Persistent Storage. + Starting udev Kernel Device Manager... +[ OK ] Reached target Local File Systems (Pre). + Mounting /media/ram... + Mounting /var/volatile... +[ OK ] Mounted /media/ram. +[ OK ] Mounted /var/volatile. +[ OK ] Started udev Kernel Device Manager. +[ OK ] Reached target Local File Systems. + Starting Create Volatile Files and Directories... +[ OK ] Started Create Volatile Files and Directories. + Starting Update UTMP about System Boot/Shutdown... +[ OK ] Started Update UTMP about System Boot/Shutdown. +[ OK ] Started udev Coldplug all Devices. +[ OK ] Found device /dev/ttyS0. +[ OK ] Reached target System Initialization. +[ OK ] Listening on D-Bus System Message Bus Socket. +[ OK ] Reached target Sockets. +[ OK ] Started Daily Cleanup of Temporary Directories. +[ OK ] Reached target Timers. +[ OK ] Reached target Basic System. + Starting rc.pvr.service... + Starting Permit User Sessions... + Starting Login Service... + Starting avm service... +[ OK ] Started D-Bus System Message Bus. +[ OK ] Started Permit User Sessions. +[ OK ] Started rc.pvr.service. +[ OK ] Started Login Service. + + Starting weston.service... +[ OK ] Started Serial Getty on ttyS0. +[ OK ] Reached target Login Prompts. +[ OK ] Started weston.service. + + _____ _____ _ _ +| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ +| | _| .'| . | . | | __| _| . | | | -_| _| _| +|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| + |___| |___| + +Arago Project http://arago-project.org dra7xx-evm ttyS0 + +Arago 2016.12 dra7xx-evm ttyS0 5775.config.txt + +Hi, The Linux Kernel by default has 1000 MHz as the value for OPP_NOM. Regards, Vishal + +Below e2e posts shows examples on how to update u-boot and Kernel to change the OPP_NOM values. (Below examples are for 600 MHz, but similar change can be done for 800 MHz) u-boot change: https://e2e.ti.com/support/processors/f/791/p/619772/2286496#2286496 Kernel change: https://e2e.ti.com/support/processors/f/791/p/619772/2283850#2283850 Regards, Vishal + +Hi Vishal I use u-boot change freqency successfully. Can I chane OPP_NOW to OPP_OD or OPP_HIGH? Has default OPP_NOW 1000 MHz to belong overclocking condition? So I use Kernel change freqency unsuccessfully Because DRA72x is just one OPP? thanks Yumei + +Hi Yumei Recommend you to remain with OPP_NOM for TDA2Ex and 800 MHz as per the datasheet to avoid having higher leakage power than necessary. http://www.ti.com/document-viewer/TDA2E/datasheet/voltage-and-core-clock-specifications-voltage-core-clock-specs#SPRT637-1342 The 1000 MHz is for DRA72x device which is very similar to TDA2ex but supports different frequencies/OPPs: Kindly refer: http://www.ti.com/document-viewer/DRA726/datasheet/voltage-and-core-clock-specifications-voltage-core-clock-specs#SPRT637-1342 Thanks and Regards, Piyali + diff --git a/data2/text/range/5001-10000/831055.txt b/data2/text/range/5001-10000/831055.txt new file mode 100644 index 0000000000000000000000000000000000000000..5e68479eaa04523d0d1cd00775201170fdfb3d94 --- /dev/null +++ b/data2/text/range/5001-10000/831055.txt @@ -0,0 +1,38 @@ +Ticket Name: [TDA4M] Questions about PSDK SPI Test on TDA4M EVM Board + +Query Text: +Other Parts Discussed in Thread: TDA2 Dear Ti members, I would like to test the SPI communication between the MCU and Main domain using PSDK 0.9 SW on the TDA4M EVM board. I have some questions about this as below. 1. According to the mcusw release document, SPI communication test between MCU and Main domain A72 is completed through MCUSS Demo App based on RTOS. Is the psdk 0.9 version of the SPI communication test complete? Error occurs due to header file when building ipc_spi_slave code of MCUSS Demo App. The problem is caused by an invalid header file which is not for TDA4M. ( in ipc_spi_slave_app.c ) Build error reason ==> #include Modify ==> #include As there is no code of am65xx, it is impossible to check the comparison, so I request reconfirmation upon completion of SPI communication test. 2. According to the mcusw release document, SPI communication test between MCU and Main domain A72 is completed through MCUSS Demo App based on RTOS. However, in PSDK 0.9, we know that the Main domain A72 is only Linux supported. I tried to modify the makefile for ipc_spi_slave_app to test on MCU2_0 or MCU2_1, but it does not build due to linker script( *.lds ) problem. Later I checked in the 0.9 release document that McSPI only supports MPU1_0 and MCU1_0. In version 0.9, is ipc_spi_slave_app test completely impossible on MCU2 and MCU3 in the main domain? Is it possible in version 1.0 3. I downloaded the kernel code from PSDK 0.9 Linux version and confirmed that the SPI Slave Driver code ( spi_omap2_mcspi.c ) exists. 1) I need to add and to modify code to use this driver ( the driver is not included now ), so I will be working on it. Can you give me a guide on how to modify and build for using this driver? ( I have no experience with Yocto base. ) 2) There are two SPI test examples in the "tools/spi" path. Are there any additional examples? And is it possible to slave test with SPIdev_test.c file? ( I will test by connecting MCU as Master and Main domain as slave. ) Please let me know your opinion. Thank you. + +Responses: +Hi Junny, Regarding your 1st question, please find my reply below. Please comment the include file portion #include as it is a bug and will be fixed in next release. After commenting, build should go fine. Regarding your 2nd question, please find my reply below. I agree with your point, right now ipc_spi_slave_app is tested on A72 only. In the next release ipc_spi_slave_app will be ported to MCU2 or MCU3 core. For 3rd question, I will forward this query to Linux expert. + +As of now, the SPI is not supported in the kernel. You need to describe the SPI device in device tree and enable the driver config for the this to work. Note that this has not been tried so far on Linux Nikhil D + +Dear Nikhil D Thank you for your answer. If so, will the next version of Linux(version 1.0) be released with the spi code fully included? Please let me know. Thank you. Best Regards. + +Dear Sunil Thank you for your answer. If possible, can I get the code for MCU2 or MCU3 before the next release? ( If there aren't many points to fix against 0.9 ) Please let me know. Thanks and Regards. + +Hi Junny, As this is a new requirement, need to get approval from the management and then needs to be implemented. I will inform you earliest after implementation or when it can be provided. Regards, Sunil Kumar M S + +HI Junny, Can we close this thread? Regards, Sunil Kumar M S + +Dear Sunil, I have not received an answer of additional linux question yet. After receiving the answer, I will close this thread if there are no further questions. Thanks and Regards, Junny. + +Dear Sunil, I have not received an answer of my additional linux question yet. After receiving the answer, I will close this thread if there are no further questions. Thanks and Regards, Junny. + +HI junny, What is the additional question you are referring to? Regards, NIkhil D + +Dear NIkhil D, As asked in my reply, will the next release version of Linux(version 1.0) be released with the spi code fully included? Additionally, Are you currently working on device tree and congifuration of SPI on Linux? If possible, can you share me device tree and configuration working guide for now? Please let me know your answer. Thanks & Regards, Junny. + +Hi Junny, As this SPI is not a standard SPI bus connected to a SPI device, it is rather difficult to verify the Linux driver standlaone. As mentioned, this will be new requirement that needs to be approved and implemented. Unfortunately, I do not have any code / DT changes to share with you. Regards, Nikhil D + +Dear Nikhil D, "As this SPI is not a standard SPI bus connected to a SPI device" ==> What does this mean? Is the SPI IP included in TDA4 completely different from the SPI IP included in the TDA2 family or other chips? Comparing the TRM documents seems to use the same SPI IP, isn't it? Please let me know. Thanks and Regards, Junny + +Hi Junny, The IP is same, but there is no realy SPI device connected to it, that's why I said it is hard to test in standalone Linux environment, You cannot write a SPI slave driver, because there is none. Nikhil D + +Dear Nikhil D, 1. According to the TRM document, MCU_SPI2 and Main_SPI4 are connected internally without pinout. So, I do not understand your comment that there is no realy SPI device connected to it. 2. Currently I have downloaded the 0.9 version of Linux code. 3. I checked the 0.9 Linux code, it seems that the SPI slave driver is included. However, as you said, it requires additional work except SPI driver (DTS, Config ... etc). 4. So, after completing the additional work, I'll try to test by setting MCU_SPI2 as Master (Running RTOS) and Main_SPI4 as Slave (Running Linux). If I do additional work on Linux, such as DTS, Config, etc. I think SPI communication test is possible. Is it wrong? Am I misunderstanding? Please let me know your opinion. Thanks and Regards, Junny + +Hi Junny, Yes your understanding is correct and the approach is correct. You just need to program the SPI device in slave mode. There are no pinmux to be set. You can try this out yourself. Regards, NIkhil D + +Dear NIkhil D, Thanks for your answer. I will try and If I have further questions, I will contact E2E again. And I will resolve this thread. Best Regards, Junny. + diff --git a/data2/text/range/5001-10000/833046.txt b/data2/text/range/5001-10000/833046.txt new file mode 100644 index 0000000000000000000000000000000000000000..c2e2d4fca72c757362104127c22759d7f38ba103 --- /dev/null +++ b/data2/text/range/5001-10000/833046.txt @@ -0,0 +1,170 @@ +Ticket Name: TDA2EXEVM: TDA2: Error of create an new use case + +Query Text: +Part Number: TDA2EXEVM hi, I want to create a new use case ,and I get the same mistake as Allen Cheng had in https://e2e.ti.com/support/processors/f/791/t/690852?tisearch=e2e-sitesearch&keymatch=new%25252525252525252520use-case#pi320966filter=all&pi320966scroll=false I followed the user guide and declared the function in "vision_sdk/apps/src/include/chains.h" too, how can I deal with this problem? Thanks + +Responses: +Hi Anyong, Have you done a clean build after declaring the function in chains.h. Can you describe what exactly you have done and the error message. Regards, Rishabh + +hi Rishabh, I create a new use-case "tidl_OD_test" referring to "tidl_OD" use-case, and I follow the steps in "6.1 Adding new use-cases to build (BIOS ONLY mode) " of VisionSDK_UserGuide_BuildSystem.pdf, "chains_tidlODtest" is the usecase entry point , this function is called in chains_main_bios_tidl.c and also defined in chains.h, before building I have cleaned the build using "gmake -s clean " command. Then"gmake -s -j depend " and "gmake -s -j ". During the building , error occured as below: "D:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/common/chains_main_bios_tidl.c", line 140: error: function "chains_tidlODtest" declared implicitly 1 error detected in the compilation of "D:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/common/chains_main_bios_tidl.c". >> Compilation failure + +Hi, Can you share the updated chains.h and chains_main_bios_tidl.c as an attachment. Regards, Rishabh + +hi Rishabh, Below files are the updated chains.h and chains_main_bios_tidl.c. Thanks chains.h chains_main_bios_tidl.c /****************************************************************************** +Copyright (c) [2012 - 2017] Texas Instruments Incorporated + +All rights reserved not granted herein. + +Limited License. + + Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive + license under copyrights and patents it now or hereafter owns or controls to + make, have made, use, import, offer to sell and sell ("Utilize") this software + subject to the terms herein. With respect to the foregoing patent license, + such license is granted solely to the extent that any such patent is necessary + to Utilize the software alone. The patent license shall not apply to any + combinations which include this software, other than combinations with devices + manufactured by or for TI ("TI Devices"). No hardware patent is licensed + hereunder. + + Redistributions must preserve existing copyright notices and reproduce this + license (including the above copyright notice and the disclaimer and + (if applicable) source code license limitations below) in the documentation + and/or other materials provided with the distribution + + Redistribution and use in binary form, without modification, are permitted + provided that the following conditions are met: + + * No reverse engineering, decompilation, or disassembly of this software + is permitted with respect to any software provided in binary form. + + * Any redistribution and use are licensed by TI for use only with TI Devices. + + * Nothing shall obligate TI to provide you with source code for the software + licensed and provided to you in object code. + + If software source code is provided to you, modification and redistribution of + the source code are permitted provided that the following conditions are met: + + * Any redistribution and use of the source code, including any resulting + derivative works, are licensed by TI for use only with TI Devices. + + * Any redistribution and use of any object code compiled from the source code + and any resulting derivative works, are licensed by TI for use only with TI + Devices. + + Neither the name of Texas Instruments Incorporated nor the names of its + suppliers may be used to endorse or promote products derived from this software + without specific prior written permission. + + DISCLAIMER. + + THIS SOFTWARE IS PROVIDED BY TI AND TI�S LICENSORS "AS IS" AND ANY EXPRESS OR + IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL TI AND TI�S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +******************************************************************************/ + +/****************** ************************************************************* + * INCLUDE FILES + ******************************************************************************* + */ +#include +#include + +char gChains_menuTIDLUsecases[] = { + "\r\n " + "\r\n TIDL Usecases" + "\r\n ---------------" + #ifdef UC_tidl + "\r\n 1: TIDL File I/O Usecase" + #endif + #ifdef UC_semSeg + "\r\n 2: Semantic Segmentation Usecase" + #endif + #ifdef UC_tidl_OD + "\r\n 3: TIDL OD Usecase" + #endif + #ifdef UC_tidl_OD_test + "\r\n 4: tidl_OD_test Usecase" + #endif + "\r\n " + "\r\n x: Exit " + "\r\n " + "\r\n Enter Choice: " + "\r\n " +}; + +/** + ******************************************************************************* + * + * \brief Function to select demo depending on user input + * Accepts user input as ch and switches to corrosponding usecase + * + * \param ch [IN] Input choise for user + * + ******************************************************************************* +*/ + +Void Chains_menuTIDLRun() +{ + char ch; + Bool done = FALSE; + + while(!done) + { + Chains_statCollectorReset(); + + Vps_printf(gChains_menuTIDLUsecases); + + ch = Chains_readChar(); + Vps_printf(" \r\n"); + + switch(ch) + { + #ifdef UC_tidl + case '1': + Chains_tidl(&gChains_usecaseCfg); + break; + #endif + + #ifdef UC_semSeg + case '2': + Chains_semSeg(&gChains_usecaseCfg); + break; + #endif + + #ifdef UC_tidl_OD + case '3': + Chains_tidlOD(&gChains_usecaseCfg); + break; + #endif + + #ifdef UC_tidl_OD_test + case '4': + chains_tidlODtest(&gChains_usecaseCfg); + break; + #endif + + case 'x': + case 'X': + done = TRUE; + break; + + default: + Vps_printf(" Unsupported option '%c'. Please try again\n", ch); + break; + } + } +} + +Hi, The API declaration is "Chains_tidlODtest" and API call is "chains_tidlODtest", there is difference in case 'C' vs 'c'. Please update the call to "Chains_tidlODtest" and retry the build. Regards, Rishabh + +hi Rishabh, I have built the application, and it's ok. Thank you very much for your quick reply. :) BR + diff --git a/data2/text/range/5001-10000/840142.txt b/data2/text/range/5001-10000/840142.txt new file mode 100644 index 0000000000000000000000000000000000000000..7ed84eb49a9c1177b8c061ddf320f9ba2c11ec6e --- /dev/null +++ b/data2/text/range/5001-10000/840142.txt @@ -0,0 +1,16 @@ +Ticket Name: TDA2E: TDA2 network_rx issue + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, I am using the TDA2 board with PROCESSOR_SDK_RADAR_03_07_00_00 and running the usecase for TI Cascade Radar. Using this use case i want to send the FFT2D samples, The size of the FFT2D samples are x*y*16*2(Int32 words) now when i run the network_rx.exe i saw following error. To check when this error comes i debug the IPU1_1 code and saw following things in NetworkTxLink_drvSendData: 1 . dataFormat is showing as SYSTEM_DF_BAYER_BGGR (Not sure what this means) 2 . The cmdHeader looks ok, Here the data size is correct x*y*16(Rx Channels)*8(Real & Imag of each 32 bits) cmdHeader struct {numBuf=1,header=0,payloadType=8,chNum=0,dataSize=16777216...} 0x8621C8F0 numBuf unsigned int 1 0x8621C8F0 header unsigned int 0 0x8621C8F4 payloadType unsigned int 8 0x8621C8F8 chNum unsigned int 0 0x8621C8FC dataSize unsigned int x*y*16*4*2 0x8621C900 width unsigned int 2048 0x8621C904 height unsigned int 256 0x8621C908 pitch unsigned int[2] [16384,16384] 0x8621C90C [0] unsigned int 16384 0x8621C90C [1] unsigned int 16384 0x8621C910 3 . Than in NetworkTxLink_drvWriteHeader when we tries to write Network_write in line number 207 than network_rx.exe throws the above mentioned error. 4. Afterwards in the NetworkTxLink_drvSendData line 532 i saw ack = 255 and than status was set to SYSTEM_LINK_STATUS_EFAIL in line 534. I guess the network_rx.exe cannot handle the packet where the header says packet size is more than 1920*1080*2. So i tried to compile a new network_rx.exe and followed the steps mentioned in section 1.1 of VisionSDK_UserGuide_NetworkTools.docx and then run "gmake Makefile all" and it crashes c:/CodeBlocks/MinGW/bin/gcc -c -Wall -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages network_cons_main.c network_cons_thr_win32.c -M > MAKEFILE.DEPEND make[4]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/network_cons/src' make[3]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' make[2]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' "C:/Program Files (x86)/GnuWin32/bin/make.exe" libs make[2]: Entering directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' "C:/Program Files (x86)/GnuWin32/bin/make.exe" -fMAKEFILE.MK -CC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common make[3]: Entering directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/common/src' common: Compiling network_api.c c:/CodeBlocks/MinGW/bin/gcc -c -Wall -O3 -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -oC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common//network_api.o network_api.c make[3]: *** [network_api.o] Error 1 make[3]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/common/src' make[2]: *** [libs] Error 2 make[2]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' make[1]: *** [exe] Error 2 make[1]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' gmake: *** [Makefile:27: all] Error 2 Also i see one popup coming up Can someone tell if my assumption with network_rx.exe is correct and how to compile this exe + +Responses: +Hi Deepak, If you have made the changes as per mentioned in the UserGuide to the .mk files, the build should pass through, unless you have a compile error, which I don't see in your log. I am also not able to see the image files you have attached. I have only tried the network tools build in Linux. I see that you are using windows. Can you try with the gmake that comes with the XDC package anyways? Instead of the GnuWin32 one you have used. You should be able to find it under /ti_components/os_tools/windows/xdctools*/gmake Regards, Anand + +Hello Anand, I change the Gmake to the one in xdctools and still sees the same issue. point to be noted is i don't have changed any code till now. gmake[4]: Entering directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/network_cons/src' network_cons: Making Directories, if not already created mkdir -p C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../lib// mkdir -p C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/network_cons/ mkdir -p C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../bin/ network_cons: Building dependancies c:/CodeBlocks/MinGW/bin/gcc -c -Wall -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages network_cons_main.c network_cons_thr_win32.c -M > MAKEFILE.DEPEND gmake[4]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/network_cons/src' gmake[3]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' gmake[2]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' "C:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/gmake.exe" libs gmake[2]: Entering directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' "C:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/gmake.exe" -fMAKEFILE.MK -CC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/src MODULE=common gmake[3]: Entering directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/common/src' common: Compiling network_api.c c:/CodeBlocks/MinGW/bin/gcc -c -Wall -O3 -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../common/inc -I../inc -I../priv -I. -IC:/PROCESSOR_SDK_RADAR_03_07_00_00/ti_components/networking/nsp_gmacsw_4_16_01_01/packages -oC:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build/../lib/obj/common//network_api.o network_api.c gmake[3]: *** [network_api.o] Error 1 gmake[3]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/common/src' gmake[2]: *** [libs] Error 2 gmake[2]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' gmake[1]: *** [exe] Error 2 gmake[1]: Leaving directory `C:/PROCESSOR_SDK_RADAR_03_07_00_00/vision_sdk/apps/tools/network_tools/build' gmake: *** [Makefile:27: all] Error 2 Is it possible can you give me new network_rx.exe compiled at yours end by increasing the MAX_BUF_SIZE to some big value as i expect the data to be x*y*16*2 (int 32 words) where current limit is around 2*1920*1080 Thanks Deepak Joshi + +Hello, The TI documentation is not complete, after lot of digging was able to figure out you need a particular version of CodeBlock and in all other version it will not work. and now have a stream of data + +Hi Deepak, I ran into data offset overflow error in network_rx. I rebuilt this code in Ubuntu tool chain but is not working. What CodeBlock version exactly have you use to rebuilt network_rx that made it work? My problem was it streams for a while and then ran into overflown problem. Thanks for the help. Regards, --Khai + +Hello Khai, you need codeblock version 13.12 and there it works for me. Regards Deepak Joshi + diff --git a/data2/text/range/5001-10000/841928.txt b/data2/text/range/5001-10000/841928.txt new file mode 100644 index 0000000000000000000000000000000000000000..a80fe3a95d46433c230fbb009946956c99392a5b --- /dev/null +++ b/data2/text/range/5001-10000/841928.txt @@ -0,0 +1,42 @@ +Ticket Name: SYSBIOS: f_mkdir() api issue with with psdk3_05 + +Query Text: +Part Number: SYSBIOS Hey, I am running into trouble with f_mkdir() with sd card. See the following thread for detailed information of the issue. Do you have any ideas on this? best regards, Nicolas Rausch + +Responses: +Btw I am using bios_6_46_04_53 + +Nicolas, Can you provide a small exported project that reproduces the problem? Also, can you reproduce this on different SD cards? Todd + +Nicolas, SYSBIOS 6.46.04 has no built-in support for FatFs. Do you have any ideas what is being used as your media access interface--what performs the IO operations to the SD card? Derrick + +Hey Derrick, so the driver is within pdk_01_10_01_06. It is the stw_lld/fatlib/fatfs/ff.c file where the f_mkdir is declared. Does that answer your question? Best regards, Nicolas Rausch + +Hi Nicolas, It appears you have shared the location of where the third party FatFs software is provided in the SDK. In addition to this, the PSDK provides a media access layer which ports basic IO functions to enable reads/writes to the physical interface. Any ideas about what is being used for this? To better assist you, could provide a small exported project or a source file that shows your API usage? Since FatFs is an open source third party software, I recommend checking all API returns for errors--namely f_mkdir(). Additionally, you can ensure FatFs is configured sufficiently for your use case. Here is a link to the FatFs configuration documentation. Some interesting items to check would be: FF_LFN_BUF, FF_SFN_BUF FF_STR_VOLUME_ID If you choose to change any of these settings (in the ffconf.h), you will need to rebuild the FatFs library included in the PSDK. Derrick + +Hey Derrick, thank you for help! Regarding the media access layer I don´t know what is being used for this. About the api usage, did you check my original post I linked above? There is a code example of how I use the api, that shows all of my code that uses the api for my approach. Sharing the project is not really possible, sorry for that! I will take a look at the documentation to see if I find any clues. best regards, nico + +Hi Nico, In the previous thread, I saw your code. It looks like you're wrapping FatFs APIs--with the ChainsCommon and File namespaces. Are you able to share the implementation of each of these functions? I deem it unlikely there is a bug in the f_mkdir() API--however, I would encourage you to engage with the FatFs community by posting on the FatFs User Forum. I think it more likely there may be a use care error or media access interface error. If we determine what's driving the media access interface, you will be able to observe the data bus for correct behavior. Derrick + +Hey Derrick, a little update from my side. So I figured that by default in PSDK_3_5 the mode for LFN mode is set to 1. See code below: Here I changed it to two for testing, both modes 1 and 2 result in the problem. If I change it to 0 and set the folder and filename to fit the 8.3 format everything works fine, but with modes 1 or 2 even with shorter names the issues appear. I am now implementing option 3 to test if this might work. This looks like the media access interface is not the probleme here, since it should create the problems in every mode of those. I will add the code for chainscommon and file namespaces. best regards nico + +Hi Nico, One other configuration option to try is the FF_FS_REENTRANT configuration. Are you performing FatFs operations from multiple threads? + +Did this get resolved? [10/7 Update: Marking this as TI Thinks Resolved due to no response from original poster.] + +Hey, no the issue is not resolved. Trying the reentrance didn´t help either. So far I don´t know what else to try. best regards, Nico + +Nico, From what context are you calling the FatFs APIs? Such as Thread/Task, Hardware Interrupt (Hwi), Software Interrupt (Swi).. Are multiple concurrent calls to FatFs APIs occurring anywhere in your application? + +Hey Derrick, I am calling this from within a task, right at the start of the creation of my usecase. There are no multiple concurrenct calls to FatFs in my application. If the reason for this problem is because of from where I call the api, shouldn´t the issue also appear when I change the mode to 8.3 format? With 8.3 format the file creation works without problems. Thank you! best regards, nico + +Nico, Is using SFN an acceptable work-around for your use case or do you require LFN? Derrick + +For now I am not using directories and just add prefix to the filenames as a workaround. In this case everything works fine, even with LFN. SFN is not really an option, but for now I will stick to not using directories. best regards, nico + +Nico, The APIs you're using seem to be provided by the PSDK. I think if we understand how the APIs are wrapping the FatFs APIs, we may better understand what's causing the issue with LFN. Namely, there may be an issue with how File_mkdir() creates the directories and how ChainsCommon_Osal_fileChDir() is utilized. I will check with someone more familiar with these API implementations. Derrick + +Thank you Derrick! I Have been debugging the ff.c file to check if all the the conversions for LFN work properly and to see if I find any clues on where the issue is appearing. The name conversion works fine, but in the dir_find and dir_register functions I think something is going wrong with the Volume names, I´d expect the volume to be the same, since it is only one Volume it is supposed to write to, but at some point the name of the volume changes to something like SYSTEM~1, which is also the name of the file that gets generated when the sd_card gets corrupted. Unfortunately I couldn´t find out more about this. If it is possible for you I´d suggest you setup a simple usecase that just generates directories, so you could step through the functions as well. Looking forward to hear back from you! best regards, Nico + +Nico, Sorry for the delayed response. I spoke with some of the Processor SDK support and they're unable to support this thread further since FatFs is a third party software. I do encourage you to engage in the FatFs forum as it may be an issue with the FatFs API usage. I apologize for any inconvenience, Derrick + diff --git a/data2/text/range/5001-10000/847340.txt b/data2/text/range/5001-10000/847340.txt new file mode 100644 index 0000000000000000000000000000000000000000..95c69711ed83762f317c820a592f0bd54eef92df --- /dev/null +++ b/data2/text/range/5001-10000/847340.txt @@ -0,0 +1,78 @@ +Ticket Name: AM5728: All frames are dropped when running TIDL usecase with camera + +Query Text: +Part Number: AM5728 Other Parts Discussed in Thread: TDA2 Hi sir, As my previous question ( ), I'm still working on this issue. I used my own trained model, which was fine tuning from JDetNet, to do object detection. I tested the model worked fine on PC, but didn't work on TDA2x. When running my model on TDA2x, I found that VPE process dropped 60% of frames, and rest frames were dropped in the ALG_TIDLPREPROC process. statistic_log.txt Here are my questions, 1. Does this mean no frames go into EVEs, so there are nothing to display? 2. Is there something wrong with my model? 3. How to avoid frames being dropped? 4. Can you point me out where is the main code of ALG_TIDLPREPROC. I tested on TDA2x CPU board ( ES1.1) + Vision Application Board + OV10635 Image Sensor with VSDK 3.7. Thank you, Gary + +Responses: +Hi Gary, >> I tested the model worked fine on PC, but didn't work on TDA2x. Can you check if you get proper output from TIDL import tool itself. FYI, the import tool also runs TIDL inference on PC and will give output detection's, so first check are you getting proper output in the import itself then you can run the model on TDA2x. Thanks, Praveen + +Hi Praveen, >> ...check if you get proper output from TIDL import tool itself. >> the import tool also runs TIDL inference on PC and will give output detection's... How to check from TIDL import tool itself? Are there any reference documents? Thank you, Gary + +Hi Gary, The import tool will dump the final output in "stats_tool_out.bin" file along with layer level traces (outputs) for each layer. Please use markBox.c file from below e2e thread to visualize the import tool output and if you get correct output here then you can run your model on VSDK. https://e2e.ti.com/support/processors/f/791/t/679186 Thanks, Praveen + +Hi Praveen, I used jpeg image as a input of markBox.c. However, the output PPM file looks like noise, which as attachment shows. So my questions are, 1. How to use jpeg format image file as an input of markBox.c? Should I convert the jpeg file to .y format? If so, how can I generate a '.y' file thank you, Gary + +Hi Gary, You need to use ".y" file as an input in the markBox.c file. You will get this "y" file as part of pre-processing in the import tool and it will be dumped as "trace_dump_0_768x320.y" in the import tool traces. This is nothing but the ".y" conversion of the input jpeg image, so use this "trace_dump_0_768x320.y" file in the markBox.c file. Thanks, Praveen + +Hi Praveen, I used the dump .y file "trace_dump_0_512x512.y" in the markBox.c, but the result is the same. So here I list my steps to make sure there is no misunderstanding. My jpg file name is 000019.jpg, which is a color image. 1. I changed the "sampleInData" field in import tool setting file to "\path\to\000019.jpg" 2. Running import tool, I got dump files. One of these is "trace_dump_0_512x512.y" 3. I used "trace_dump_0_512x512.y" in the markBox.c to get PPM file Are there any problems for these steps? Thank you, Gary + +Hi Gary, Can confirm that you are taken care on below points, (1) Did you update the markBox.c file for your image resolution ? (2) Are you reading the "tats_tool_out_eve.bin" file in binary mode? as there is an issue in opening this file in the markBox.c as explained in the thread fb = fopen("stats_tool_out_eve.bin", "rb"); (3) Did you visualize the "trace_dump_0_512x512.y" file ? it should look similar to the input jpeg file. After checking all the above points still if you see the issue, please attach your import config file for review. Thanks, Praveen + +Hi Praveen, >>(1) Did you update the markBox.c file for your image resolution ? I changed orig size as my image size. >> (2) Are you reading the "tats_tool_out_eve.bin" file in binary mode? as there is an issue in opening this file in the markBox.c as explained in the thread I don't have "stats_tool_out_eve.bin", so I used "stats_tool_out.bin" instead. I have tried the parameter "r" & "rb", the results are the same. >>(3) Did you visualize the "trace_dump_0_512x512.y" file ? it should look similar to the input jpeg file. Yes, it is same as my original input image. So here are my import files, thank your for your help. Gary 8561.importFiles.zip + +Hi Gary, From the attached files, I see that you have not taken care of 1 and 3. >> (1) I changed orig size as my image size. You should replace all the values (768 and 320) with 512 accordingly >> (3) Yes, it is same as my original input image. I see that "trace_dump_0_512x512.y" file is some corrupted, this may because of "rawSampleInData = 1" in import config file, but your input is not raw data, so change this value "rawSampleInData = 0" and then try importing Thanks, Praveen + +Hi Praveen , 1. After changing "rawSampleInData = 0", the result is still not correct. 2. I have also tested another image for comparing the detected results between original trained model and model transferred by import tool. The results are listing below. OD model (Original) OD model (import tool) It looks like something wrong after transferring by import tool. My import file is same as previous one. Are there anything wrong with my import settings? Can you suggest me how to solve this problem? Thank you, Gary + +Hi Gary, >>> OD model (import tool) >> It looks like something wrong after transferring by import tool. Is this output with TI model or with your own model ? Thanks, Praveen + +Hi Praveen, >>Is this output with TI model or with your own model ? Both two results are coming from my own model. Thanks, Gary + +Hi Gary, I tried importing your model shared in the previous post. I see that in your model, for some of the layers weights are not normalized in the training. These weights are causing issue in the import process. Can you try to do L1 and L2 regularization on both BatchNorm and conv layers in your model while training. Thanks, Praveen + +Hi Praveen, >> Can you try to do L1 and L2 regularization on both BatchNorm and conv layers in your model... I checked my solver file and I have already set the regularization_type = "L1". Is this same as above which you suggest me to do? If not, can you give me some hints how to do this? I have no idea how to add regularization in both BatchNorm and conv layers. Here is my solver file solver_jdetnet.prototxt.txt train_net:"models/VGGNet/jdetnet/train_jdetnet.prototxt" +test_net: "models/VGGNet/jdetnet/test_jdetnet.prototxt" +test_iter: 2 +test_interval: 10 +base_lr: 0.001 +display: 100 +max_iter: 500 +lr_policy: "poly" +gamma: 0.1 +power: 4.0 +momentum: 0.9 +weight_decay: 1e-05 +snapshot: 2000 +snapshot_prefix: "models/VGGNet/jdetnet/jdetnet" +solver_mode: GPU +device_id: 0 +random_seed: 33 +debug_info: false +snapshot_after_train: true +regularization_type: "L1" +test_initialization: true +average_loss: 10 +stepvalue: 30000 +stepvalue: 45000 +iter_size: 4 +type: "SGD" +display_sparsity: 2000 +sparse_mode: SPARSE_UPDATE +sparsity_target: 0.7 +sparsity_step_factor: 0.05 +sparsity_step_iter: 2000 +sparsity_start_iter: 0 +sparsity_start_factor: 0.25 +sparsity_threshold_maxratio: 0.2 +sparsity_itr_increment_bfr_applying: true +sparsity_threshold_value_max: 0.2 +eval_type: "detection" +ap_version: "11point" +show_per_class_result: true + + Thank you, Gary + +Hi Praveen, Have you tried to convert the object detection model from caffe-jacinto-models-caffe-0.16 through import tool? Does the test result correct on your side? I did two tests by using the raw object detection model from caffe-jacinto-models-caffe-0.16. The tested models are l1reg and sparse located in "/JDetNet/ssd512x512_ds_PSP_dsFac_32_fc_0_hdDS8_1_kerMbox_3_1stHdSameOpCh_1/". The first one is tested on host emulation by using trace_dump_0_768x320.y.txt . I ran the steps you mentioned in the thread and visualized through markBox.c. The result is as follow. markedBoxes.ppm.txt The other test is running on TDA2 with a video clip. However, the result is same as using my own trained model which is mentioned in my previous post ( https://e2e.ti.com/support/processors/f/791/t/839810 ). Here are my questions, 1. If you have tried the raw model and tested it successfully, can you provide or point me out the related files? Files such as, deploy.proto, caffemodel, tidl_import_XXX.txt, etc. 2. In this thread( https://e2e.ti.com/support/processors/f/791/t/679186 ), I can't get the same result as you do. So, I would like to know which model do you use? Can you also share the related files or are there any documents for reference? Thank you, Gary + +Hi Gary, Use the model and prototxt from below link to get the correct the result for object detection, https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/object_detection/voc0712/JDetNet/ssd768x320_ds_PSP_dsFac_32_hdDS8_0/sparse And use below link for more steps on how run this model, https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen + diff --git a/data2/text/range/5001-10000/849233.txt b/data2/text/range/5001-10000/849233.txt new file mode 100644 index 0000000000000000000000000000000000000000..94a3cac034f7fdeea800a80e4aacad0b3c4ff86d --- /dev/null +++ b/data2/text/range/5001-10000/849233.txt @@ -0,0 +1,26 @@ +Ticket Name: TDA2EXEVM: Frame drop in VIP link . + +Query Text: +Part Number: TDA2EXEVM Hi, The below is my use-case, Capture -> VPE_D1 -> Merge -> Display (6ch channels) We are configuring capture link to output 50fps. But, after that in VPE link some frames are getting dropped. I have placed "Null" link after capture link that there is no frame drop. but when adding VPE link drops frames. To make sure merge giving enough buffers to VPE link, i have kept null link after VPE. i.e., Capture -> VPE -> Null still dropping some frames. Since VPE internally uses same ISP(Image Signal Processor) HW to process frames. I think if VPE gets interleaved with the ISP operation,it will dropping frames. We are using same resolution for all the 6 channels. The below are the parameters setting for VPE link, ******************************************************** chPrms = &pPrm->chParams[chId]; chPrms->outParams[outId].numBufsPerCh = 15;//VPE_LINK_NUM_BUFS_PER_CH_DEFAULT; chPrms->outParams[outId].inputFrameRate = 50; chPrms->outParams[outId].outputFrameRate = 50; chPrms->outParams[outId].width = captureInWidth; chPrms->outParams[outId].height = captureInHeight; chPrms->outParams[outId].dataFormat = SYSTEM_DF_YUV420SP_UV; chPrms->deiCfg.bypass = FALSE; //chPrms->deiCfg.bypass = TRUE; chPrms->deiCfg.inpMode = VPE_DEI_EDIMODE_LUMA_CHROMA; chPrms->deiCfg.tempInpEnable = TRUE; chPrms->deiCfg.tempInpChromaEnable = TRUE; chPrms->deiCfg.spatMaxBypass = TRUE; chPrms->deiCfg.tempMaxBypass = TRUE; chPrms->scCfg.bypass = TRUE; chPrms->scCfg.nonLinear = FALSE; chPrms->scCfg.stripSize = 0; chPrms->scCropCfg.cropStartX = 0; chPrms->scCropCfg.cropStartY = 0; chPrms->scCropCfg.cropWidth = 0; chPrms->scCropCfg.cropHeight = 0; ******************************************************************** The print statistics logs for reference, cap_log_vpe_debug.txt Need some suggestions to resolve this issue. Rgds, Balaji T + +Responses: +Hi, I have also enabled print statistics in VPE link, the log file follows. vpe_enable_printlog.txt Rgds, Balaji T + +Hi there, It would be very helpful. if someone update on this. Rgds, Balaji T + +Hi Balaji, Why are you setting crop size to 0? Crop size must not be 0. Also what is the resolution you are using in VPE? what is fps? VPE can processing some ~160MP/sec. is your processing within this limit? Rgds, Brijesh + +Hi Brijesh, We referred lvds_vip_multi_cam_vpe_enc_null use-case the VPE configuration.? In addition to that, we have added dei configuration. Please correct the configuration which results in minimal frame drop/No frame drop. Rgds, Balaji T + +Hi Balaji, I could not understand below statement. "Since VPE internally uses same ISP(Image Signal Processor) HW to process frames. I think if VPE gets interleaved with the ISP operation" VPE on TDA2Ex is VPE only. There is no inbuild ISP for VPE on TDA2Ex.. Does it work fine without DEI enabled? Can you try disabling DEI? Rgds, Brijesh + +Brijesh, Yes i have validated disabling DEI there is no frame drop. If we set the below value for TRUE there is no frame drop. chPrms->deiCfg.bypass = TRUE; Rgds, Balaji T + +Balaji, This essentially means frame drops comes due to DEI enable. Are you sure you are providing correct field id in the frame? Please note that you need to provide correct field id in order for the DEI to work correctly. Otherwise, it could potentially drop frames. Rgds, Brijesh + +Brijesh, Will you please help me to validate that i am providing correct field-Id in the frame. Expect the parameters that i have mentioned above, i am not configuring any parameters. Rgds, Balaji T + +Hi Balaji, That should come from your capture source. Capture source should put in correct field id in fvid2_frame/system_buffer data structure.. Rgds, Brijesh + +Brijesh, It is possible to scale (up/down) the fields..? In my usecase, we are using the VPE with the above mentioned params to convert fields into frames. But, whatever the resolution we are setting to capture link the same is to given to VPE to convert as frames. If there is a need to scale(up/down) that frames, We are again using another VPE_1, for that we are getting an assert. Will you please suggest the links that captures fields and output frames are scalable. For example, look at the below use-case, Capture -> VPE -> VPE_D1 -> Encode -> IPCIn(A15) -> Link (A15) We are getting the following assert. [HOST] [IPU2 ] 33.500427 s: Bj No of channels for encoder 6 [HOST] [IPU2 ] 33.500518 s: ENCODE: DEBUG enclink_populate_outbuf_pool_size_info resClassChInfo.numActiveResClass = 2 [HOST] [IPU2 ] 33.501494 s: ENCODE: DEBUG EncLink_codecCreateOutObj pOutObj->numAllocPools = 1 [HOST] [IPU2 ] 33.510736 s: ENCODE: DEBUG EncLink_codecCreateOutObj pOutObj->outBufs[0] = 99d26090 [HOST] [IPU2 ] 33.519978 s: ENCODE: DEBUG EncLink_codecCreateOutObj pOutObj->outBufs[1] = 99d260b8 [HOST] [IPU2 ] 33.529311 s: ENCODE: DEBUG EncLink_codecCreateOutObj pOutObj->outBufs[2] = 99d260e0 [HOST] [IPU2 ] 33.538583 s: ENCODE: DEBUG EncLink_codecCreateOutObj pOutObj->outBufs[3] = 99d26108 [HOST] [IPU2 ] 33.539559 s: ENCODE: Creating CH0 of 640 x 480, pitch = (640, 640) [1] [0], bitrate = 2097 Kbps ... [HOST] [IPU2 ] 33.567162 s: ENCODE: CH0: H264EncCreated:H264ENC_TI DEV.500.V.H264AVC.E.IVAHD.02.00.09.01 [HOST] [IPU2 ] 33.567528 s: ENCODE: Creating CH1 of 1280 x 720, pitch = (2560, 2560) [1] [0], bitrate = 2097 Kbps ... [HOST] [IPU2 ] 33.568047 s: Assertion @ Line: 808 in iva_enc/encLink_common.c: pChAlgCreatePrm->inputChromaFormat == XDM_YUV_420SP : failed !!! We need to know, how to scale to fields.? Rgds, Balaji T + diff --git a/data2/text/range/5001-10000/849798.txt b/data2/text/range/5001-10000/849798.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff7ac71dd61c0613083a0e8fa52fc34f9564709f --- /dev/null +++ b/data2/text/range/5001-10000/849798.txt @@ -0,0 +1,66 @@ +Ticket Name: TDA2EXEVM: How to run a TIDL OD model in a different resolution? + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2 Hi sir, I followed this thread (https://e2e.ti.com/support/processors/f/791/t/689617) and ran TI jdetnet OD model successfully on TDA2. The input video resolution is 768x320. I used the same video and resized resolution to 512x512, and followed the same steps. But the there were nothing detected. The result is as follow. I also tested on host emulation, the result displayed correctly. Here are my testing files, can you please verified if they are correct? 512x512.rar If I would like to test in other resolution, should I training a new model for it? Are there any way to modify a exist model/setting so that it can suitable for other resolution without training a new model? Thank you, Gary + +Responses: +Hi Gary, >> But the there were nothing detected. The result is as follow Can you attach this again as I am unable to see the image? >> I also tested on host emulation, the result displayed correctly. Can you attach this again as I am unable to see the image? Thanks, Praveen + +Hi Praveen, I re-uploaded the missing pictures. Thank you for your help, Gary + +Hi Gary, The modified files for 512x512 size looks fine. Did you get proper output from import tool with 512x512 size? Thanks, Praveen + +Hi Praveen, I just tried, the output from import tool was correct. Will assign layersGroupId in import setting file relate to this issue? I checked import file for 768x320, it set some layers to DSP. But I'm not sure which layer should be set to DSP. Are there any other way to test? Thank you, Gary + +Hi Gary, Run only last layer (Detection output layer) in DSP and rest all the layers on EVE. Thanks, Praveen + +Hi Praveen, >> Run only last layer (Detection output layer) in DSP and rest all the layers on EVE. This is the setting I used for all above results. My layersGroupId setting: layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 Thank you, Gary + +Hi Gary, Can you try with this below setting for layersGroupId ? layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 Thanks, Praveen + +Hi Praveen, After changing the layersGroupId , the screen becomes black. Nothing shows up. Thank you, Gary + +Hi Gary, Is this with 521x512 size? Does the default size 768x320 worked for you on TDA2x? Thanks, Praveen + +Hi Praveen, >> Is this with 521x512 size? Yes. >>Does the default size 768x320 worked for you on TDA2x? Yes. Thank you, Gary + +What modifications you did in the use case for 512x512 size? Thanks, Praveen + +Hi Praveen, All modified files are copy from raw TI caffe-jacinto model ( ../ssd512x512_ds_PSP_dsFac_32_fc_0_hdDS8_1_kerMbox_3_1stHdSameOpCh_1/sparse/ ) I list modified parts in below. deploy.proto 1. Changing keep_top_k and confidence_threshold to 20 and 0.15 in DetectionOutput layer, respectively. caffemodel Nothing changes here, I used raw TI sparse 512x512 model located in above path. TIDL_SSD_CFG.txt (in SD card) 1. Changing input height/width from 768x320 to 512x512 2. Changing net/param file names to fit the bin file names generated from import tool. 3. Setting fps and threshold to [10, 0.15], respectively. chains_tidlOD.c 1. Changing GRAPHICS_HEIGHT value from (1080-64) to (1080 - 10). 2. Changing pUcObj->DisplayPrm.rtParams.posY value from 64 to 10. Note: The recompiled MLO and AppImage work fine with resolution 768x320. import setting file 8838.tidl_import_jdetnet_512x512.txt # Default - 0 +randParams = 0 + +# 0: Caffe, 1: TensorFlow, Default - 0 +modelType = 0 + +# 0: Fixed quantization By tarininng Framework, 1: Dyanamic quantization by TIDL, Default - 1 +quantizationStyle = 1 + +# quantRoundAdd/100 will be added while rounding to integer, Default - 50 +quantRoundAdd = 25 + +numParamBits = 8 +# 0 : 8bit Unsigned, 1 : 8bit Signed Default - 1 +inElementType = 0 + +inputNetFile = "D:\Download\19Oct14-18\import_tool_test_clean\deploy_512x512_sparse.prototxt +inputParamsFile = "D:\Download\19Oct14-18\import_tool_test_clean\voc0712_ssdJacintoNetV2_iter_104000_sparse_512x512.caffemodel +outputNetFile = "D:\Download\19Oct14-18\import_tool_test_clean\tidl_net_ssdJacintoNetV2_sparse_512x512.bin" +outputParamsFile = "D:\Download\19Oct14-18\import_tool_test_clean\tidl_param_ssdJacintoNetV2_sparse_512x512.bin" + +rawSampleInData = 1 +preProcType = 4 +sampleInData = "D:\Download\19Oct14-18\import_tool_test_clean\512x512.y" +tidlStatsTool = "..\quantStatsTool\eve_test_dl_algo.out.exe" +layersGroupId = 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 0 +conv2dKernelType = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + + + + 1. Changing input & output path. Here I attach related files I used. import_tool_test_512x512.rar Thank you Gary + +Hi Gary, Thanks for sharing the files, I will get it checked by VSDK experts and come back. Please expect delays in the response as many people are on leave this week because of local holidays here. Regards, Praveen + +Hi Gary, Can you press p after running the usecase for 1 min. Please share entire log of this experiment. Regards, Anuj + +Hi, Its been long since any update on this thread. I hope the issue is resolved. If not then please reply below or create a new thread for different type of query. Regards, Anuj + diff --git a/data2/text/range/5001-10000/851113.txt b/data2/text/range/5001-10000/851113.txt new file mode 100644 index 0000000000000000000000000000000000000000..63f9b37b86ba6ea6f1fdd3f6aa293120e976d5d4 --- /dev/null +++ b/data2/text/range/5001-10000/851113.txt @@ -0,0 +1,34 @@ +Ticket Name: CCS/TDA3LA: Buffer management problem with SDIO interface + +Query Text: +Part Number: TDA3LA Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi I have a problem with SDIO exchanging data. When I read data from SD card it goes normally. Before reading transaction I'm waiting for BRR flag of MMC_STAT and when it sets to 1 I make a reading, But when I try to write some data into block of SD card it has a problem. When I'm waiting for BWR it doesn't set to 1. It's equal to 0 always. What's wrong? + +Responses: +In addition to question. Needed bits in PSTATE register WTA (write transfer active) and BWE (buffer write enable) are in High state. They indicate that the buffer is ready to transfer + +Hi Ivan, If I understood correctly, you are testing an SD memory card? If this is the case, please note that in TDA3x, the MMC module's capability was limited to SDIO cards/interfaces only. SD/MMC memory cards are not supported. Regards, Stan + +Hi, Stan Are you sure? Because now I see in datasheet, that TDA3x supports MMC/SD/SDIO + +Ivan, I'm pretty sure. MMC module in TDA3 was restricted to SDIO from the very beginning. Actually, this is the MMC4 module known as a SDIO interface in earlier SoCs like TDA2 and DRA75x. MMC1 which is for eMMC and MMC2 dedicated to MMC/SD cards are not supported entirely. You are right - datasheet is showing SD and MMC cards Will check this internally with team. Most probably this is an document error. Actually SDIO cards use the same protocol (correct me if I'm wrong) as SD cards, therefore it could be possible SD card to work. One of the problems to solve will be handling of Write Protect and Card Detect pins which are missing on TDA3 (for example via GPIO). Currently, in your case, the SW driver may 'think' that SD card is write protected. However, please be aware TI will not be able to assist you further since SD card on TDA3 wasn't tested and validated. Regards, Stan + +Stan, Okay) But... A few days ago I managed it. I made simple block write operations (not Write Protect). So how do you expalin it? According to those facts it's so strange. Well, I'll try to do Write Protect operations + +Ivan, It was only my supposition. It was because you were waiting for write operation to complete and this never happened (your initial post) . I can't really say what could be the exact issue. + +Hi, Stan I'll try to describe how I wrote a data to SD card occasionally (before I asked about this problem on this thread) Procedure of writing consist of some steps (generally): (1) preparing BWR bits in MMC_IE register -> (2) sending command with CMD line -> (3) waiting for BWE in MMC_STAT register -> (4) sending data. So, this function hasn't worked, but... When I've set a breakpoint between steps (1) and (2) it has worked. After this actions I repeated this function without breakpoint and it still worked. When I restarted the TDA3 device then, I needed to repeat the operation with breakpoint. Then I decided to make reading function. I tested it and then my writing function started to work incorrectly (and it's not working now) How can the breakpoint actions affect the writing function? + +I've just tried to do a write protect operations So, as I see in SD Spec Part1, both SDHC and SDXC cards don't support Write Protect operations. In accroding to these words I've just checked Write Prot. operations and SD card doesn't respond to these commands + +> How can the breakpoint actions affect the writing function? This is often because a hardware (SDIO controller) is needing some time to complete a certain function but software proceeds to next function too early (e.g. SW is not polling for a register bit to toggle). If you insert a breakpoint in your code, then the software is paused, leaving to hardware a very long timeframe to complete its task before you decide to click to continue execution. + +Stan, I still don't understand something. You said: SD/MMC memory cards are not supported. But sometimes writing operations ended successfully after breakponits, but SW polled all needed flags in status register Where is the mistake... In addition to this - write protect operations aren't supported by SDHC and SDXC cards Well, I've searched some examples in PDK driver and CSL, so... mostly my SW consist of functions from those libraries and patterns. + +Hi, Stan I work with evaluation board (I've forgot to notice that, maybe it's famous) But I've found the mistake! As you see on the picture I need to poll BWR bit in MMC_STAT register to write data into the buffer. But this bit is always zero after preparing BWR bit in MMC_IE register and sending CMD. In according to reference manual, after I sent CMD, both WTA bit and BWE bit became 1 in MMC_PSTATE But BWR bit in MMC_STAT is still 0. When I learnt the examples from PDK driver I saw that SW polls the BWR bit MMC_STAT too. So, I decided to poll BWE bit in MMC_PSTATE (instead of BWR bit in MMC_STAT) and it started to work. It really works! Is there a mistake in reference manual or/and in PDK? + +Hi Ivan, Glad to hear you made writes working! The reason you are seeing BWR always 0 could be bacause the controller is being configured to DMA mode. See the following note in the TRM: Buffer write ready Note: If the DMA transmit mode is enabled, this bit is never set; instead, a DMA transmit request to the main DMA controller of the system is generated. Typically, such peripherals are being used in DMA mode, therefore it could be, the MMC driver has configured the SDIO module to DMA, during init. Regards, Stan + +Stan, I've just checked the configuration of SDIO controller. So, SDIO controller isn't in DMA mode. Maybe I could miss something, but I didn't configure DMA mode in SDIO controller, and all the bits in SDIO controller registers which related to DMA mode are zeros. Have you ever had any issues like this? I ask you because I haven't found it before. + +Hi Ivan, It is quite possible this is a documentation error in the flow diagram. Perhaps because polling method is rarely used, no one had noticed. I will work with TRM team to see how to fix this. thanks, Stan + diff --git a/data2/text/range/5001-10000/851529.txt b/data2/text/range/5001-10000/851529.txt new file mode 100644 index 0000000000000000000000000000000000000000..f1a31d060f8c59fcdeebbd5cf3ec9fec44c56c41 --- /dev/null +++ b/data2/text/range/5001-10000/851529.txt @@ -0,0 +1,112 @@ +Ticket Name: DRA71XEVM: UART2 configuration + +Query Text: +Part Number: DRA71XEVM UART2 fifo can't receive data but can send data, the register configuration are as follows: 0x4806C000 (0xb6f5a000): 0x000000FD 0x4806C004 (0xb6f05004): 0x00000005 0x4806C008 (0xb6f0f008): 0x000000C1 0x4806C00C (0xb6f2600c): 0x0000001B 0x4806C010 (0xb6f25010): 0x00000000 0x4806C014 (0xb6fd3014): 0x00000060 0x4806C018 (0xb6f80018): 0x00000022 0x4806C01C (0xb6f9601c): 0x00000000 0x4806C020 (0xb6f9a020): 0x00000000 0x4806C024 (0xb6f7e024): 0x00000000 0x4806C028 (0xb6fbf028): 0x00000000 0x4806C02C (0xb6f2802c): 0x00000000 0x4806C030 (0xb6fd7030): 0x00000043 0x4806C034 (0xb6fc6034): 0x0000000E 0x4806C038 (0xb6feb038): 0x00000040 0x4806C03C (0xb6fc203c): 0x00000000 0x4806C040 (0xb6fec040): 0x000000C1 0x4806C044 (0xb6fad044): 0x00000004 0x4806C04C (0xb6fd204c): 0x00000000 0x4806C048 (0xb6fc8048): 0x00000000 0x4806C050 (0xb6efd050): 0x50412E03 0x4806C054 (0xb6f26054): 0x00000000 0x4806C058 (0xb6fce058): 0x00000001 0x4806C05C (0xb6f6405c): 0x000000FF 0x4806C060 (0xb6feb060): 0x00000069 0x4806C064 (0xb6ff0064): 0x00000000 0x4806C068 (0xb6fb0068): 0x00000000 0x4806C06C (0xb6fea06c): 0x00000000 0x4806C070 (0xb6f9c070): 0x00000003 0x4806C074 (0xb6fbc074): 0x0000001A 0x4806C078 (0xb6f2d078): 0x00000000 0x4806C07C (0xb6f9d07c): 0x00000000 0x4806C080 (0xb6f50080): 0x00000000 0x4806C084 (0xb6f01084): 0x00000000 hope for your suggestions. thanks. + +Responses: +Hello, Can you provide details on what SDK and version you're using, as well as a full boot log? Thanks, David + +Hello, We use vsdk3.6 on tda2ex-17x17, and config uart2 for M4, IPU2, with the boot log in the file. Tx fifo of uart2 can put the data out, but the Rx can't get data and the fifo is always empty. thanks6082.bootlog.txt + +Hello, To start with, can you fix the memory overlap issue between ipu1_cma and cmem? If that isn't the cause, do you know if any changes were made to the UART pinmuxing? Also, just making sure, you are sure there is something being put on the RX line for IPU2 to retrieve right? Are you able to test it in loopback mode? Thanks, David + +Hello, I'm sorry to have expressed inaccurately. Specifically, VP receive data from IP, and then send data from VP to IP. We are sure that IP have sent data out (through Oscilloscope) and the RX fifo of VP(IPU2) hasn't recive data (through adding 'printf'). Then we set data to TX fifo manually and IP can receive data under this condition. As for UART2 pinmux, we set 0x44(the UART2 crossbar) to IPU2_IRQ_60, and set 0x000e0000 to PAD_UART2_RXD and PAD_UART2_TXD. There is another question that how we confirm the RX and TX have been enabled through the register. Thanks + +Hi, David: Here is the register dump of UART2 and UART3. UART2 is from the current platform: TDA2E-17, and RX doesn't work. UART3 is from previous project, TDA2S, which both RX/TX work. uart2_rxerr_cmp.txt 0x4806C000 (0xb6f5a000): 0x000000FD +0x4806C004 (0xb6f05004): 0x00000005 +0x4806C008 (0xb6f0f008): 0x000000C1 +0x4806C00C (0xb6f2600c): 0x0000001B + + +0x4806C010 (0xb6f25010): 0x00000000 +0x4806C014 (0xb6fd3014): 0x00000060 +0x4806C018 (0xb6f80018): 0x00000020 +0x4806C01C (0xb6f9601c): 0x00000000 + + +0x4806C020 (0xb6f9a020): 0x00000000 +0x4806C024 (0xb6f7e024): 0x00000000 +0x4806C028 (0xb6fbf028): 0x00000000 +0x4806C02C (0xb6f2802c): 0x00000000 + + +0x4806C030 (0xb6fd7030): 0x00000043 +0x4806C034 (0xb6fc6034): 0x0000000E +0x4806C038 (0xb6feb038): 0x00000040 +0x4806C03C (0xb6fc203c): 0x00000000 + + +0x4806C040 (0xb6fec040): 0x000000C1 +0x4806C044 (0xb6fad044): 0x00000004 +0x4806C04C (0xb6fd204c): 0x00000000 +0x4806C048 (0xb6fc8048): 0x00000000 + + +0x4806C050 (0xb6efd050): 0x50412E03 +0x4806C054 (0xb6f26054): 0x00000000 +0x4806C058 (0xb6fce058): 0x00000001 +0x4806C05C (0xb6f6405c): 0x000000FF + + + + +0x4806C060 (0xb6feb060): 0x00000069 +0x4806C064 (0xb6ff0064): 0x00000000 +0x4806C068 (0xb6fb0068): 0x00000000 +0x4806C06C (0xb6fea06c): 0x00000000 + +0x4806C070 (0xb6f9c070): 0x00000003 +0x4806C074 (0xb6fbc074): 0x0000001A +0x4806C078 (0xb6f2d078): 0x00000000 +0x4806C07C (0xb6f9d07c): 0x00000000 + +0x4806C080 (0xb6f50080): 0x00000000 +0x4806C084 (0xb6f01084): 0x00000000 uart3_good_cmp.txt 0x48020000 (0xb6f0d000): 0x00000080 ([0:7] keep changing) +0x48020004 (0xb6fd5004): 0x00000005 +0x48020008 (0xb6fd9008): 0x000000C1 +0x4802000C (0xb6f8100c): 0x0000001B + +0x48020010 (0xb6f50010): 0x00000000 +0x48020014 (0xb6efe014): 0x00000060 +0x48020018 (0xb6fb9018): 0x00000022 +0x4802001C (0xb6ff001c): 0x00000000 + +0x48020020 (0xb6fcd020): 0x00000000 +0x48020024 (0xb6f02024): 0x00000000 +0x48020028 (0xb6fcd028): 0x00000000 +0x4802002C (0xb6fda02c): 0x00000000 + +0x48020030 (0xb6f16030): 0x00000008 +0x48020034 (0xb6f28034): 0x00000000 +0x48020038 (0xb6fbb038): 0x00000040 +0x4802003C (0xb6fbd03c): 0x00000000 + +0x48020040 (0xb6ff5040): 0x000000C1 +0x48020044 (0xb6fc4044): 0x00000004 +0x48020048 (0xb6f0c048): 0x00000000 +0x4802004C (0xb6f6704c): 0x00000000 + +0x48020050 (0xb6f3f050): 0x50412E03 +0x48020054 (0xb6fac054): 0x00000000 +0x48020058 (0xb6f4d058): 0x00000001 +0x4802005C (0xb6f6a05c): 0x000000FF + +0x48020060 (0xb6f62060): 0x00000069 +0x48020064 (0xb6f34064): 0x00000000 +0x48020068 (0xb6f37068): 0x00000000 +0x4802006C (0xb6f6a06c): 0x00000000 + +0x48020070 (0xb6f01070): 0x00000003 +0x48020074 (0xb6f10074): 0x0000001A +0x48020078 (0xb6f14078): 0x00000000 +0x4802007C (0xb6ff007c): 0x00000000 + +0x48020080 (0xb6f98080): 0x00000000 +0x48020084 (0xb6f0d084): 0x00000000 + +Hi Peter, Can you resolve the memory overlap issue between ipu1_cma and cmem and try to see if that helps, as well as test UART2 in loopback mode? In the meantime I'll look through the registers you've provided. Thanks, David + +Hi, David: Problem solved. Here is the summary: CTRL_CORE_PAD_UART2_RXD : according to errata i849: UART2_RXD Is Not Working for MUXMODE=0 (http://www.ti.com/lit/er/sprz397i/sprz397i.pdf) , the MUXMODE should be set 4 Baud-rate should match between the two terminals (TDA2E-17 UART2 and MCU UART) Many thanks for your support! + +Hi Peter, Glad you found that, I had just found that myself. Can I ask user6143399 to mark your answer as resolved? Thanks, David + diff --git a/data2/text/range/5001-10000/854252.txt b/data2/text/range/5001-10000/854252.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c343f3b67ff34914bcb33513dbe7c7e5707e0d6 --- /dev/null +++ b/data2/text/range/5001-10000/854252.txt @@ -0,0 +1,55 @@ +Ticket Name: AM5728: I can't train ssd768x320 for objection detection on the Caffe-jacinto-models-0.17? + +Query Text: +Part Number: AM5728 I train ssd model by ./train_image_object_detection.sh in the Caffe-jacinto-models-0.17.I choose dataset=ti-custom-cfg1 to train my own dataset，it cannot work.Here is the log: I1106 16:38:10.926060 13633 net.cpp:412] Parameters memory (TEST) required for data: 11946688 diff: 11946688 I1106 16:38:10.926062 13633 net.cpp:415] Parameters shared memory (TEST) by data: 0 diff: 0 I1106 16:38:10.926064 13633 net.cpp:421] Network initialization done. F1106 16:38:10.926213 13633 io.cpp:55] Check failed: fd != -1 (-1 vs. -1) File not found: training/ti-custom-cfg1/JDetNet/20191106_16-37_ds_PSP_dsFac_32_hdDS8_1/sparse/ti-custom-cfg1_ssdJacintoNetV2_iter_120000.caffemodel *** Check failure stack trace: *** @ 0x7f69c02ae5cd google::LogMessage::Fail() @ 0x7f69c02b0433 google::LogMessage::SendToLog() @ 0x7f69c02ae15b google::LogMessage::Flush() @ 0x7f69c02b0e1e google::LogMessageFatal::~LogMessageFatal() @ 0x7f69c12bc6dc caffe::ReadProtoFromBinaryFile() @ 0x7f69c1334f56 caffe::ReadNetParamsFromBinaryFileOrDie() @ 0x7f69c0e6b88a caffe::Net::CopyTrainedLayersFromBinaryProto() @ 0x7f69c0e6b92e caffe::Net::CopyTrainedLayersFrom() @ 0x41204c test_detection() @ 0x40d1f0 main @ 0x7f69bea30830 __libc_start_main @ 0x40de89 _start @ (nil) (unknown) But when i replaced dataset=ti-custom-cfg2 ，it's ok. So why？ + +Responses: +Hi Wang, One big difference between them is Cfg2 is for 512x256 where as cfg1 was for 768x320. So the issue could be because of memory requirement, may try reducing batch size. Could you pls share the full training log if the above suggestion also does not work? Thanks, Praveen + +Hi Praveen, The detailed training log is blow: train-log_20191106_16-37.txt 512*512 512*256 are available on my PC.I tried to reduce batch size to minimum1.It still cannot. Does it have something to do with the GPU？I put gpu info below: +-----------------------------------------------------------------------------+ | NVIDIA-SMI 418.74 Driver Version: 418.74 CUDA Version: 10.1 | |-------------------------------+----------------------+----------------------+ | GPU Name Persistence-M| Bus-Id Disp.A | Volatile Uncorr. ECC | | Fan Temp Perf Pwr:Usage/Cap| Memory-Usage | GPU-Util Compute M. | |===============================+======================+======================| | 0 GeForce GTX 166... Off | 00000000:01:00.0 On | N/A | | 63% 57C P2 94W / 120W | 2728MiB / 5906MiB | 71% Default | +-------------------------------+----------------------+----------------------+ +-----------------------------------------------------------------------------+ | Processes: GPU Memory | | GPU PID Type Process name Usage | |=============================================================================| | 0 1162 G /usr/lib/xorg/Xorg 253MiB | | 0 19230 C ...uan/caffe-jacinto/build/tools/caffe.bin 2463MiB | +-----------------------------------------------------------------------------+ Thank you, Wang + +Hi Wang, We looked at the log it is not memory issue, we will have to run it our end to see what is going wrong.The setup will take some time, we will check and come back next week. BTW, are you still facing this issue? or you got some work around or fix for this issue? Thanks, Praveen + +Hi Praveen, Yes，It still puzzles me. I changed 'ssd_size':'512x512' into '300x300.' But it didn't work. At first I thought it was something wrong with my computer configuration，but the other one faced the same problem. Could it be that CUDA version caused this ? Thanks, Wang + +Looks like, the following not multiple of 2 is causing issue. It is supposed to be handled by the code somehow it is failing at your end. We are looking into it. resize_height=320 crop_height=320 Will it be possible to change it to 512 and give it a try? + +I saw some parameters in the log different from if just the following flag was toggled to ti-custom-cfg1. dataset=voc0712 #voc0712,ti-custom-cfg1,ti-custom-cfg2 I am observing reg_head_at_ds8':0 in teh log but it was set to 1 in the original script. Just to reproduce problem at our end can you pls send your modified scripts\train_image_object_detection.sh Also can you pls confirm you have not changed any other files? + +Hi,Soyeb I tried,it doesn't work. + +Hi， Yes,I did some changes.Cause i using original script and it just faced the same question. Actually "ti-custom-cfg2" from original script works,but i can't using template "ti-custom-cfg1" anyway.Compared this two,there are only these differences: cfg1 cfg2 +use_difficult_gt=0 use_difficult_gt=1 +chop_num_heads=1 +min_dim=368 min_dim=256 +resize_width=768 resize_width=512 +resize_height=320 resize_height=256 +crop_width=768 crop_width=512 +crop_height=320 crop_height=256 +small_objs=1 small_objs=0 + ssd_size='512x512' +use_batchnorm_mbox=0 use_batchnorm_mbox=1 +power=4.0 power=1.0 Which parameter could casues break off or it‘s barely buffer overruns. Thanks, Wang + +You need to use same setting as either ti-custom-cfg2 or ti-custom-cfg1. But I see your log shows reg_head_at_ds8 to be set as 0. Whereas original script sets it as 1. We are not able to see the problem you are facing. If we can't recreate at our end then we will be unable to have any suggestion. So pls run ti-custom-cfg1 as it is with the same LMDB as VOC0712 (e.g. shown below) and share us back the log. train_data="../../caffe-jacinto/examples/VOC0712/VOC0712_trainval_lmdb" test_data="../../caffe-jacinto/examples/VOC0712/VOC0712_test_lmdb" name_size_file="../../caffe-jacinto/data/VOC0712/test_name_size.txt" label_map_file="../../caffe-jacinto/data/VOC0712/labelmap_voc.prototxt" num_test_image=4952 num_classes=21 + +Thakn you for your suggestions,i will try it. + +Can you pls try new version? We have made small fix. + +Ok,i just see your new release. I will give feedback after tring. + +Hi, I failed to run neither custom-cfg1 and custom-cfg2. Here is the log.train-log_20191219_17-41.txttrain-log_20191219_17-37.txt I did nothing but chang trainval and test data.But problem stil remains.Please help. Thank you so much! Regards, Wang + +Can you pls hold on for some more time? It is still not fixed. We will ping you once it is done. + +Ok,I'm waiting for you. + +Can you pls try now? Your log says, Check failed: error == cudaSuccess (101 vs. 0) invalid device ordinal Does gpus specified match with what you have in your m/c? + +Hi, I'm sorry for my careless. custom-cfg2 works now. But there is CUDA memory allocation problem with custom-cfg1. Maybe i should run it on The server.Could you optimize and reduce memory requirements? + +Which graphics card are you using? We have tested on GTX1080Ti. You may reduce batch size if GPU memory is not sufficient. + +Thank you so much!I reduce the bachsize and it runs normally. Could you tell me what went wrong with the last caffe-jacinto version？ Bty,i see your release list,are you goning to release pytorch? Tanks again,this problem puzzles me for almost 3 months. + diff --git a/data2/text/range/5001-10000/858178.txt b/data2/text/range/5001-10000/858178.txt new file mode 100644 index 0000000000000000000000000000000000000000..f78e70212c3eaa8a16a05de30cf91cc809ddc44a --- /dev/null +++ b/data2/text/range/5001-10000/858178.txt @@ -0,0 +1,44 @@ +Ticket Name: [TDA4EVM] How to debug TIDL model in TDA4 + +Query Text: +Other Parts Discussed in Thread: TDA2 Hi, We have import a caffe model by tidl_j7_01_00_00_00. The DL model output result, which is processed by import tool, looks correct. When I integrate the model to TDA4 demo app: app_tidl_avp2, the PC build also output correct results. However, when I build j7 code and execute in TDA4EVM, it take couple minutes to process three images. This DL model has been verified in TDA2 and can process less than 100 ms. What I want to know is: "How can I debug this issue ?". Thanks, Charles + +Responses: +Hi Charles, Have you tried running it on TIDL standalone. Please see psdk_rtos_auto_j7_06_01_00_15/tidl_j7_01_00_00_00/ti_dl/docs/user_guide_html/md_tidl_fsg_steps_to_debug_mismatch.html Regards, Rishabh + +Hi, When I use standalone test, the process is stocked at 1st "Deconvolution Layer". I know the document said "Recommend to use Resize/Upsample to get better performance. Only 4x4 kernel with 2x2 stride is supported". But is the "Deconvolution Layer" verified? Chares + +Hi Charles, What are the parameters of Deconvolution layer present in your network? Regards, Rishabh + +Hi, The parameters: param { lr_mult: 0.0 decay_mult: 0.0 } convolution_param { num_output: 48 bias_term: false pad: 1 kernel_size: 4 group: 48 stride: 2 weight_filler { type: "bilinear" } } + +Hi Charles, This particular deconvolution layer should have worked, we have verified this for a few networks. We will try to reproduce this at our end and get back to you. Regards, Rishabh + +Hi, For your reference. After processing for a long time, it finished. However the two results between PC and TDA4 are not the same. Input: PC: TDA4_EVM: Charles + +Charles, There is an issue with deconvolution that can cause mismatches between PC and TDA4x. We are in the process of fixing it and will let you know once the release is available. regards, Victor + +Hi Victor, Are you also verifying the execution time issue as Rishabh said ? Do you have a target date to release? Charles + +Hi Charles, The release will be available in the beginning of Jan 2020. It will fix some performance issue we have been seeing with deconvolution. However you are observing processing time of couple of minutes for 3 images, which is a long time. We have not encountered for any model such a long processing time on our end. Can you enable trace in the inference config file by setting: enableLayerPerfTraces = 1 debugTraceLevel = 1 Please refer to the section 'Steps to Analyze Performance' in the TIDL's user's guide 'Steps to Debug' chapter. You can share the performance log with us so we can see which layers take a long time to execute. regards, Victor + +Hi, The standalone test log is as follow. Layer 32, 37, 39 are Deconvolutional layers. Looks like layer 32 and 37 take a longer time. The overall TSC Mega Cycles is 315097 Mega. The TSC Mega Cycles of the same model test in TDA2x is ~26 Mega. The graphs generated by tidlModelGraphviz are as follow: + +Hi Charles, Yes I can see that the deconvolution layer takes a long time. Can you try to rerun the test with the attached library ? Thanks. regards, Victortidl_algo.lib + +Hi Victor, Please see the following table. Total Megacycles is 2/3 of previous test. The values in "LayerSetupCycles" field are reduced a lot. The others have no big difference. Charles + +Hi Charles, Please ignore the setup column as I modified the code to measure something else for my own debugging. We are still improving the deconvolution layer so the final release may be faster. However you reported execution time in the order of "minutes". I suspect it is because you have trace enabled. Can you try to run after disabling trace in the config file ? regards, Victor + +Hi, Here is my config setting: inFileFormat = 2 postProcType = 3 numFrames = 1 padInBuffInTB = 1 netBinFile = "testvecs/config/tidl_models/caffe/tidl_net_FS.bin" ioConfigFile = "testvecs/config/tidl_models/caffe/tidl_io_FS.bin" totNumClasses = 8 outData = testvecs/output/FreeSpace.bin inData = testvecs/config/test.txt debugTraceLevel = 0 writeTraceLevel = 0 enableLayerPerfTraces = 0 And the process time for single image in standalone test is around 3.5 mins. The "tidl_infer_adjsegNet" model is also test, the process time is very short. Charles + +Here is the console output of my test. + +Hi Charles, Would it be possible for you to make a dummy network that only includes layers 32 to 37 and share it with TI so we can reproduce the issue on your side ? regards, Victor + +Hi Victor, Will update to you once prepared. Charles + +Hi Charles, We found the root cause of the issue. There is a bug when the input feature map's width is smaller than 64 and when the number of input channels is also smaller than 64: some internal counters become negative and produce large iteration counts. Please try with a larger image, the issue should disappear. We'll fix for small images in the next release. regards, Victor + +Hi Victor, Thanks. Is this bug affect to Deconvolutional Layer only ? Charles + diff --git a/data2/text/range/5001-10000/858873.txt b/data2/text/range/5001-10000/858873.txt new file mode 100644 index 0000000000000000000000000000000000000000..5fb89c807a9b0be784c8d5de9cf4443dc3b3a6ca --- /dev/null +++ b/data2/text/range/5001-10000/858873.txt @@ -0,0 +1,46 @@ +Ticket Name: TDA2EXEVM: Algo SW_mosaic display actual frame is not displying + +Query Text: +Part Number: TDA2EXEVM Other Parts Discussed in Thread: TDA2SX Hi, We are developing an automotive DVR Software using TDA2Sx processor leveraging upon Vision SDK. We designed the use-case with three functionalities namely recording of .mp4 files, single channel display and Quad display. Totally we are using six analog (CVBS) cameras. The below is the use-case. Capture -> VPE -> Dup -> Encode -> IPCIn(A15) -> DefLink_vsdkbuf (A15) Dup -> Merge -> Display Dup -> Sync -> Alg_DmaSwMs -> VPE_D2 -> Merge -> Display We are using Algorithm SW_mosaic for multiple channels(4-channels) in a single frame and then display it. Run time switching between single channel display and quad display are fine. But in Algo SW_mosaic display actual frame is not displying, actual frame is getting cropped in quad display. But in single channel display it fine. It would be very helpful if you could help us, having respective TI support team in providing us with inputs to resolve this issue. Rgds, Balaji T + +Responses: +For reference i have also given the small video clip, that differentiate the actual frame and frame displayed in quad view. Rgds, Balaji T + +Hi, Please share you usecase stats. I hope your sync link is getting 6 channel input. Can you please modify tour alg_dmaSwMs link to display all 6channel. Regards, Anuj + +Hi Anuj, We enabled all the six channel in quad display. All the channels are getting the data frames. Instead of downscaling the video frame it is cropping it and displaying. Sync link is getting all the 6-channel frames.The log file for reference is given below. nov22_quad_display.txt Rgds, Balaji T + +Hi Anuj, Is there any update on this.? Rgds Balaji T + +Hi, Why your log only shows stats of capture vpe and sync link only. Where are the other links. Those stats are not available. Have you tried to provide display all6 channels to alg_swms link? Regards, Anuj + +Hi Anuj, For debugging we have disabled stats for all other links. Yes, we have tried providing display link all the 6 channels via Alg_SwMosaic link. still the behaviour is the same. We are debugging using the Alg_SwMosaic source file(/vision_sdk/apps/src/rtos/alg_plugins/dmaSwMs) Incoming frame width and height are greater than the actual window size. UInt32 width; /**< Window width, * if window width < input width, cropped input is copied * if window width > input width, rest of window is filled with blank data */ UInt32 height; /**< Window height, * if window height < input height, cropped input is copied * if window height > input height, rest of window is filled with blank * data */ (./apps/include/alglink_api/algorithmLink_dmaSwMs.h) I think we need to downscale the incoming frames. please correct me if i am wrong. Rgds, Balaji T + +Hi Anuj, Can we try using vpeSwMs in place of Alg_SwMosaic.? Rgds, Balaji T + +Hi, Yes you can try with vpeSwMs also. With Alg_dmaswms can you add avpe link before that and make sure all 6 channel is scaled to proper resolution as per swms window size. Regards, Anuj + +Anuj, Is that really necessary to downscale the frame size before Alg_SwMosaic.? Alg_SwMosaic don't have this property to downscale the incoming frames according to window size.? What is the dofference between Dma_swMosaic and Vpe_SwMosaic.? i have tried designing a use-case with Vpe_SwMosaic but its throwing an compile time error.4135.vpe_enable_printlog.txt Please, provide solution based on the above. Rgds, Balaji T + +Hi Please share a compact log. And you have messed up with VSDK stats collector. Its showing wrong data. With such kind of log we will not be able to help you. There are multiple usecase are available who is using these swms links. You just have to refer that. And if you did not have messed around inside links_fw and alg_plugins folder. it should work straight forward. From next time please do not add your debug log, and stats log should should stats of all links. Regards, Anuj + +Anuj, We just disabled VSDK stats collector to run other applications. Here is the log after enabled all the stats collector, FS_debug_quadview_nov29.txt Regards & Thanks, Balaji T + +Anuj, Was the above provided log helpfull for you..? Rgds, Balaji T + +Hi Anuj, For give it a trial, we have tried use-case only for single channel and quad channel display, The above is the output for quad display. Will you please help me to resolve this error. Rgds, Balaji T + +Hi there, It would be really helpful, if there is any update on this.! Rgds, Balaji T + +Hi, As you are facing issue relate to swms link. Can you create a simple usecasec and check. It will be easy to debug. camera(6 ch) -> sync -> swms -> display. Use 3x2 grid for swms. Regards, Anuj + +Hi Anuj, Thank you for yours guidance and support. I think we are near to resolve this issue, please have a look on the below observation and comment on this. We have validated seperate usecases for single channel display and quad display. Use-case for single channel display. Capture -> Merge -> Display (the corresponding images are given in attached tar file, named camera(number)_singleview.jpg) Use-case for quad display. Capture -> Sync -> Alg_DmaSwMs -> Display (for quad display, the snap is provided in tar file named, mosaic_view2*2.jpeg) If we observe the all the images in the tar file, all the frames from single channel is expected to fit into the quad display. But, only half of the image is displaying in the quad display. i.e., if the actual frame is 640*480, Quad display gets only 320*480 for all the channels. How to configure that complete 640*480 fits to quad display window? Now, if we combine this usecase as shown below, Capture -> Dup-> Merge -> Display Dup -> Sync -> Alg_DmaSwMs -> Display What ever the output which is configured first is displaying properly, and next configured channel is having flickering issue in runtime switching. How to avoid this flickering issue? Rgds & thanks, Balaji T + +Hi there, Is there any update on this..? Rgds, Balaji T + +Hi, There are multiple usecase which uses Alg_dmaswms link. Can you refer to that usecase and check its params and use in same way. Try below usecase only Capture -> Sync -> Alg_DmaSwMs -> Display Regards, Anuj + +Anuj, My reply on Dec 06,2019, We have clearly mentioned that we have tried the single usecase (to validate functionalities individually) and results of them. For the below use-case, we have used the same params as referenced in the ti-usecases. Still we cannot achieve proper display in Quad view. Capture -> Sync -> Alg_DmaSwMs -> Display Rgds, Balaji T + +Hi, I hope after our call, you will be able to resolve your issue. So closing this thread. Regards, Anuj + diff --git a/data2/text/range/5001-10000/864079.txt b/data2/text/range/5001-10000/864079.txt new file mode 100644 index 0000000000000000000000000000000000000000..fa686fdca99f0faa45fc62ed8f6ec4000f114f95 --- /dev/null +++ b/data2/text/range/5001-10000/864079.txt @@ -0,0 +1,10 @@ +Ticket Name: Compiler/D3-3P-TDA2X-DK: TDA2x:program will not fit into available memory. placement with alignment fails + +Query Text: +Part Number: D3-3P-TDA2X-DK Tool/software: TI C/C++ Compiler Hi,i met some problem when creeating Usecase on TDA2x.And here is the log: /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/linker_mod.cmd", line 268: error: program will not fit into available memory. placement with alignment fails for section ".text" size 0x29995d . Available memory ranges: IPU1_0_CODE_MEM size: 0xa00000 unused: 0x1c5 max hole: 0x4 # # /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu2_release.xem4 created. # undefined first referenced symbol in file --------- ---------------- AlgorithmLink_issAewb1_initPlugin /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/app_init_ipu_primary.oem4 ChainsBoard_SetBoardMux /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 ChainsPlatform_SetPinMux /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 IssUtils_InitSimcopConfig /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appCreateISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appDeleteISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssAewbParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssCaptParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssIspParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appSetDefaultIspParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appSetIspParamsFromDCC /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appStartIssSensorSerDes /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appStopISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision _sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4" not built /home/liuyuyuan/TI/vsdk/vision_sdk/build/rtos/makerules/rules_m4.mk:312: recipe for target '/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4' failed make[7]: *** [/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error 1 /home/liuyuyuan/TI/vsdk/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu1_0' failed make[6]: *** [ipu1_0] Error 2 MAKEFILE.MK:151: recipe for target 'apps_ipu1_0' failed make[5]: *** [apps_ipu1_0] Error 2 MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:299: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:175: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:38: recipe for target 'apps' failed make[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 At first,i created a usecase and it sucessfully compiled.Then i created another usecase with these problems occured.I think maybe too much usecases causes out of memory,so i delete the second usecase,but the problem still remains,why?Plz help. Thanks, ZY Wang + +Responses: +Hi, Please delete binary folder and do a clean build. Please disable unwanted usecase from uc_cfg.mk file. Regards, Anuj + +Hi Anuj, I did it follow your advices,but it seems the problem still exist,here is the log: /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/vision_sdk_configuro/linker_mod.cmd", line 268: error: program will not fit into available memory. placement with alignment fails for section ".text" size 0x29608e . Available memory ranges: IPU1_0_CODE_MEM size: 0xa00000 unused: 0x1cc max hole: 0x4 undefined first referenced symbol in file --------- ---------------- AlgorithmLink_issAewb1_initPlugin /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/obj/vision_sdk/tda2xx-evm/ipu1_0/release/app_init_ipu_primary.oem4 ChainsBoard_SetBoardMux /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 ChainsPlatform_SetPinMux /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 IssUtils_InitSimcopConfig /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appCreateISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appDeleteISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssAewbParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssCaptParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appInitIssIspParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appSetDefaultIspParams /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appSetIspParamsFromDCC /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appStartIssSensorSerDes /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 appStopISSSensor /home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/lib/tda2xx-evm/ipu1_0/release/app_libs.aem4 error: unresolved symbols remain error: errors encountered during linking; "/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision _sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4" not built /home/liuyuyuan/TI/vsdk/vision_sdk/build/rtos/makerules/rules_m4.mk:312: recipe for target '/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4' failed make[7]: *** [/home/liuyuyuan/TI/vsdk/vision_sdk/binaries/apps/tda2xx_evm_bios_all/vision_sdk/bin/tda2xx-evm/vision_sdk_ipu1_0_release.xem4] Error 1 /home/liuyuyuan/TI/vsdk/vision_sdk/build/rtos/makerules/common.mk:271: recipe for target 'ipu1_0' failed make[6]: *** [ipu1_0] Error 2 MAKEFILE.MK:151: recipe for target 'apps_ipu1_0' failed make[5]: *** [apps_ipu1_0] Error 2 MAKEFILE.MK:31: recipe for target 'apps' failed make[4]: *** [apps] Error 2 MAKEFILE.MK:299: recipe for target 'apps' failed make[3]: *** [apps] Error 2 Makefile:175: recipe for target 'apps_exe' failed make[2]: *** [apps_exe] Error 2 Makefile:38: recipe for target 'apps' failed make[1]: *** [apps] Error 2 gmake: *** [vision_sdk] Error 2 I have cleared the usecase and disabled unwangted UC name.Is there any other problem? Thanks, Wang + diff --git a/data2/text/range/5001-10000/864416.txt b/data2/text/range/5001-10000/864416.txt new file mode 100644 index 0000000000000000000000000000000000000000..c998e442f3fc1cfb11838ca3154689d1b8e73bdd --- /dev/null +++ b/data2/text/range/5001-10000/864416.txt @@ -0,0 +1,20 @@ +Ticket Name: CCS/TIDEP-01017: Boot TDA2 via CCS and Step through Code + +Query Text: +Part Number: TIDEP-01017 Other Parts Discussed in Thread: TDA2, Tool/software: Code Composer Studio Hi, I am trying to boot up TIDEP-01017 TDA2 via CCS and am following the steps provided in the Application Report SPRAC17B. I set the boot mode on SW4 to 6'b000000 as per the Technical Reference Manual SPRUI29F The tda2xx_cascade_bios_radar build that is provided in the processor sdk package does not use A15 has the host processor, so I bypassed it in the ccxml launch file. When I try to connect Cortex_M4_IPU1_C0, I get an error as below: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). However, when I add back A15 as the host processor and connect to it first, then enable all cores from Scripts > TDA2xx_MULTICORE_Initialization > TDA2xx_MULTICORE_EnableAllCores and then connect to Cortex_M4_IPU1_C0, it is able to connect. I subsequently connect to all the remaining processors and load corresponding binaries. However, since A15 binary was not compiled, I do not load it. Is this ok? Also, once this is done I hit Resume on each of the processors and I see the below prints on the console: [Cortex_M4_IPU1_C1] MAC Port 0 Address: b4-52-a9-63-38-7a MAC Port 1 Address: b4-52-a9-63-38-7b Network Added: If-1:192.168.1.200 Service Status: Telnet : Enabled : : 000 [Cortex_M4_IPU1_C0] IPU1-0 Remote Log Shared Memory @ 0xbfb200a0 IPU1-1 Remote Log Shared Memory @ 0xbfb2e8a0 HOST Remote Log Shared Memory @ 0xbfb310a0 DSP1 Remote Log Shared Memory @ 0xbfb360a0 DSP2 Remote Log Shared Memory @ 0xbfb388a0 EVE1 Remote Log Shared Memory @ 0xbfb3b0a0 EVE2 Remote Log Shared Memory @ 0xbfb3d8a0 EVE3 Remote Log Shared Memory @ 0xbfb400a0 EVE4 Remote Log Shared Memory @ 0xbfb428a0 IPU2 Remote Log Shared Memory @ 0xbfb450a0 However, I still do not see the TDA2 boot up via UART terminal. Is there any step I am missing? How do I step through the code once boot up is done? Thanks, Siddharth + +Responses: +Hello, Siddharth Advani said: I subsequently connect to all the remaining processors and load corresponding binaries. However, since A15 binary was not compiled, I do not load it. Is this ok? Yes, it should be fine. The initialization scripts are ran on A15, that's why it's needs to connect there first and initialize the main processor. After which, you can do a IPUClkEnable_API if you are power conservative instead of initializing all cores. I was able to manage this, see screenshot: Siddharth Advani said: However, I still do not see the TDA2 boot up via UART terminal. I am not sure since I do not use/print on UART, have you tried enabling the UART module first from the same menu where the scripts are located (that is, PRCM_Module_AllEnable_Config)? Siddharth Advani said: How do I step through the code once boot up is done? I don't have the SDK project set up currently, but as far as I know, if you set breakpoints this should enable the breaking while at debug session, then in the code view you should be able to step through/into/over. Hope it helps, thanks, Alex + +Hi Alex, Thanks for your response. My app requires Cortex_M4_IPU1_C0, Cortex_M4_IPU1_C1, C66xx_DSP1, ARP32_EVE_1, ARP32_EVE_2, ARP32_EVE_3 and ARP32_EVE_4 so I enable them while bypassing the remaining (accept Cortex_A15_0). Once all the binaries are loaded and the cores are running, I did step through the code and I find that the IPU is in idle mode, in pmlib_cpuidle_utils_m4.asm probably waiting for user event (via UART) PmlibDoWFI: stmfd sp!, {lr} ; /* ; * Execute an ISB instruction to ensure that all of the ; * CP15 register changes have been committed. ; */ isb ; /* ; * Execute a barrier instruction to ensure that all cache, ; * TLB and branch predictor maintenance operations issued ; * by any CPU in the cluster have completed. ; */ dsb dmb ; /* ; * Execute a WFI instruction and wait until there is a wakeup event ; */ wfi ;@ Wait For Event nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop ldmfd sp!, {pc} As per your suggestion, I tried to run PRCM_Module_AllEnable_Config to enable the UART, but that did not help. I notice that you are using Blackhawk USB560 as your debug tool. I am using XDS200 with a MIPI60 adaptor connected to the TDA2. Hope that does not matter too much (apart from data transfer bandwidth). Appreciate if you could help me get the UART online to see the TDA2 bootup sequence via CCS. Thanks, Siddharth + +Let us ask the SDK team since I am not aware really what can be wrong. They will reply here soon. The good thing is that you are now able to connect. thanks, Alex + +Hi Siddharth In the GEL files are you making sure you are setting the below to 1: GEL File: TDA2xx_multicore_reset.gel #define VISION_SDK_CONFIG 0 --> 1 The behavior you are seeing is typically when the IPC Sync between all the cores is stuck. This happens when any one of the cores has crashed or is not loaded or the MMU settings are not correct for the IPC to work correctly. Thanks and Regards Piyali + +Hi Piyali, I set VISION_SDK_CONFIG to 1, but that did not help the TDA2 to boot-up. I noticed that after compilation, a .xa15g gets created in the same folder as the MLO file. I loaded that for the A15 processor in CCS and now I am able to step through sbl_td2xx_main.c until the TDA2 boots up. However I am facing two issues: (i) The bootup occurs only if the SD card with the AppImage is inserted into the TDA2. (ii) If I set breakpoints in parts of the code subsequent to the boot-up, for example in chains_radar_main.c, the control does not return to CCS I am not sure how to proceed since the main goal of using CCS was to be able to step through relevant parts of the radar processing pipeline. Any suggestions? Thanks, Siddharth + +Siddharth You are mixing 2 flows: Flow 1: Load SBL on A15 and keep the application image in an SD card and then run the SBL via CCS. If your intention is to use SBL to load the images, you need not load the SBL through CCS. You could load the MLO and the Appimage in the SD card, boot from the SD card (You would need to set the right SYSBOOT pins on the board for the SD card to boot) and then once the system is booted, you can connect to the CCS core you wish to debug and then load only the symbols from the .xem4, or .xe66. You would be able to set the breakpoints only when you have the symbols loaded. Also note, if you are going the SBL routed please do not load the other executables via CCS. Also, make sure you do not run GEL files as this would re-initialize the system from what the SBL has already initialized. GELs should not be run before running SBL as well in a single power cycle. Flow 2: Load the executables via CCS directly. Here you would need to make sure you load all the executables corresponding to the CFG file. The default for cascade radar bios configuration is as below: PROC_IPU1_0_INCLUDE=yes PROC_IPU1_1_INCLUDE=yes PROC_IPU2_INCLUDE=no PROC_A15_0_INCLUDE=no PROC_DSP1_INCLUDE=yes PROC_DSP2_INCLUDE=no PROC_EVE1_INCLUDE=yes PROC_EVE2_INCLUDE=yes PROC_EVE3_INCLUDE=yes PROC_EVE4_INCLUDE=yes I see in your snapshot EVE cores are at 0x0. They should be at main if loaded correctly. Once you see all the cores with yes marked for them, is loaded and reached main, you would need to run the cores. You can leave the A15 connected. Note the counter32K has a debug dependency on the A15 CCS halt state, in order to get the correct time stamps, you would eventually need to keep the A15 running. The IPC between all the cores should complete for you to see the UART logs in the console. Even if one core is stuck or not run correctly the IPC Sync between all cores would not go through and the UART initialization code would not be reached on the IPU. Thanks and Regards Piyali + +Thanks for the clarification Piyali. We decided to focus on Flow #2 and realized that when debugging on Windows 10 platform, the EVE processors would start running immediately after loading the binary rather than breaking at main. We moved to a Linux setup, connected to the A15 (without loading any binary for it), loaded all the binaries and the TDA2 boots up as expected. We are also able to place breakpoints after bootup and are able to use the debug environment. Thanks for the assistance. + diff --git a/data2/text/range/5001-10000/868752.txt b/data2/text/range/5001-10000/868752.txt new file mode 100644 index 0000000000000000000000000000000000000000..3c326480522d794617aaab3a10443738828b11d8 --- /dev/null +++ b/data2/text/range/5001-10000/868752.txt @@ -0,0 +1,186 @@ +Ticket Name: D3-3P-TDA2X-DK: How does the TDA2X UART configure GIO_read() as a non-blocking function + +Query Text: +Part Number: D3-3P-TDA2X-DK Engineers of TI: Now I have a tricky problem. I configure UART3 using the function in the "utils_uart.c" file and then use the GIO_read() function to read the data received by serial port 3. I configured the serial port 3 as "interrupt mode". During the use, I found that GIO_read() was a blocking function. If the program did not receive the data, it would be blocking in the GIO_read function. My thread needs to process other information as well, so I want to adapt GIO_read() to a non-blocking state, receiving data as it comes in, and continuing to run the rest of the program without it. Then, I configured "ioparams.timeout = 10000;" , configure UART3 to abort the read operation after waiting for 10ms without data. The benefit of this configuration is that GIO_read is not blocked by no serial port data, and my uart_link can go on to do other things. However, there is a problem, the program will run for a period of time will die. ERROR message: "XDC ASSERT - ERROR CALLBACK START". I am now suffering from the inability to use GIO_read() according to my requirements, so I have come to ask the engineers at TI how to configure GIO_read() to be non-blocking, so that my uart_link can do other things when there is no data in the serial port. My code is attached: Private_uart3Init() configures UART3. Void Private_uart3Init() +{ + Uart_ChanParams chanParams; + Error_Block eb; + GIO_Params ioParams; + static char uartName[16]; /* device name MUST be global or static variable */ + static DEV_Struct uartDevObj; + static GIO_Struct uartTxObj; + static GIO_Struct uartRxObj; + static SyncSem_Struct uartTxSyncSemObj; + static SyncSem_Struct uartRxSyncSemObj; + static Semaphore_Struct uartTxSemObj; + static Semaphore_Struct uartRxSemObj; + static IOM_Packet uartTxIomObj[UART_ASYNC_IOM_PACKET_MAX]; + static IOM_Packet uartRxIomObj[UART_ASYNC_IOM_PACKET_MAX]; + DEV_Params devParams; + Uart_Params uartParams; + SyncSem_Params syncSemParams; + Semaphore_Params semParams; + + Int32 devId; + + Error_init(&eb); + + /* + * Initialize channel attributes. + */ + GIO_Params_init(&ioParams); + + Uart_init(); + + if(Bsp_platformIsTda2xxFamilyBuild()) + { + strcpy(uartName, "/uart2"); + devId = 2; + } + else + { + Vps_printf("NOT TDA2XX!! PLEASE CHECK YOUR HARDWARE!!\n"); + } + + uartParams = Uart_PARAMS; + uartParams.opMode = UART_OPMODE_INTERRUPT; //UART_OPMODE_POLLED; UART_OPMODE_DMAINTERRUPT UART_OPMODE_INTERRUPT + uartParams.hwiNumber = 8u; + uartParams.rxThreshold = UART_RXTRIGLVL_8; + uartParams.txThreshold = UART_TXTRIGLVL_56; + uartParams.baudRate = UART_BAUDRATE_115_2K; + uartParams.prcmDevId = 0; + /* INVARIANT_CONDITION.UNREACH + * MISRAC_2004_Rule_13.7 + * MISRAC_WAIVER: + * Code is currently unreachable. + * This is kept to ensure future updates to modes. + */ + if(uartParams.opMode == UART_OPMODE_POLLED) + { + printf(" SYSTEM: UART: POLLED Mode is Selected \n"); + } + else if(uartParams.opMode == UART_OPMODE_INTERRUPT) + { + printf(" SYSTEM: UART: INTERRUPT Mode is Selected \n"); + } + else + { + /* MISRA WARNING */ + } + uartParams.enableCache = (Bool)FALSE; + + /* initialise the edma library and get the EDMA handle */ + chanParams.hEdma = NULL; + + /* If cross bar events are being used then make isCrossBarIntEn = TRUE and + * choose appropriate interrupt number to be mapped (assign it to + * intNumToBeMapped) + */ + chanParams.crossBarEvtParam.isCrossBarIntEn = (Bool)FALSE; + + chanParams.crossBarEvtParam.intNumToBeMapped = 0xFFU; + + ioParams.chanParams = (Ptr)&chanParams; + + DEV_Params_init(&devParams); + devParams.deviceParams = &uartParams; + devParams.initFxn = NULL; + devParams.devid = devId; + +/* MISRA.CAST.CONST + * MISRAC_2004 Rule_11.5 + * MISRAC_WAIVER: + * External package errors like bios which are not + * part of VSDK package can't be fixed + */ + DEV_construct(&uartDevObj, uartName, (Ptr)&Uart_IOMFXNS, &devParams, &eb); + + SyncSem_Params_init(&syncSemParams); + + Semaphore_Params_init(&semParams); + semParams.mode = Semaphore_Mode_BINARY; + + Semaphore_construct(&uartTxSemObj, 0, &semParams); + + syncSemParams.sem = Semaphore_handle(&uartTxSemObj); + + SyncSem_construct(&uartTxSyncSemObj, &syncSemParams, &eb); + + ioParams.sync = + SyncSem_Handle_upCast( + SyncSem_handle( + &uartTxSyncSemObj + ) + ) + ; + + if(ioParams.numPackets > UART_ASYNC_IOM_PACKET_MAX) + { + UTILS_assert(ioParams.numPackets <= UART_ASYNC_IOM_PACKET_MAX); + } + memset(&uartTxIomObj[0], 0, ioParams.numPackets * sizeof (IOM_Packet)); + ioParams.packets = &uartTxIomObj[0]; + + /* create the required channels(TX/RX) for the UART demo */ + GIO_construct(&uartTxObj, uartName, (UInt32)GIO_OUTPUT, &ioParams, &eb); + + SyncSem_Params_init(&syncSemParams); + + Semaphore_Params_init(&semParams); + semParams.mode = Semaphore_Mode_BINARY; + + Semaphore_construct(&uartRxSemObj, 0, &semParams); + + syncSemParams.sem = Semaphore_handle(&uartRxSemObj); + + SyncSem_construct(&uartRxSyncSemObj, &syncSemParams, &eb); + + ioParams.sync = + SyncSem_Handle_upCast( + SyncSem_handle( + &uartRxSyncSemObj + ) + ) + ; + // ioParams.timeout = 10000; + memset(&uartRxIomObj[0], 0, ioParams.numPackets * sizeof (IOM_Packet)); + ioParams.packets = &uartRxIomObj[0]; + + GIO_construct(&uartRxObj, uartName, (UInt32)GIO_INPUT, &ioParams, &eb); + + uartTxHandle2 = GIO_handle(&uartTxObj); + uartRxHandle2 = GIO_handle(&uartRxObj); + /* INVARIANT_CONDITION.UNREACH + * MISRAC_2004_Rule_13.7 + * MISRAC_WAIVER: + * Code is currently unreachable. + * This is kept to ensure future updates by the called function. + */ + if ((NULL == uartRxHandle2) || (NULL == uartTxHandle2)) + { + printf(" SYSTEM: UART: ERROR: GIO_create(%s) Failed !!!\n", uartName); + } + else + { + InitDone3 = (Bool)TRUE; + } +} uartRead3(Int8 *pOption) accepts serial port data. Void uartRead3(Int8 *pOption) +{ + Int32 nStatus = IOM_COMPLETED; + size_t nLen = 1u; + nStatus = GIO_read(uartRxHandle2, &uartReadBuffer2, &nLen); + if (IOM_COMPLETED != nStatus) + { + printf(" SYSTEM: UART: ERROR: GIO_read failed (status = %d) !!! \n",nStatus); + } + /* copy only one char */ + *pOption = (Int8)uartReadBuffer2[nLen - 1U]; +} + +Responses: +Hi, In case of the interrupt mode, looks like the current driver is not handling the timeout. When GIO_read() returns with the timeout, you can call the ioctl "IOCTL_UART_CANCEL_CURRENT_IO" before initiating the next read command. Can you check with this? In case of polled mode the timeout is handled properly, and it is used in the PDK drivers. you may refer the BspUtils_uartGetStr() with the timeout. Regards, Prasad + +Thanks for your reply. I forgot my password, so I re-registered my account. I used interrupt mode to configure the serial port "uart2", but I did not understand your reply. In case of the interrupt mode,, how do I configure the "GIO_read" function to use timeout attribute correctly? I configured it before with "ioParams.timeout = 10000;", but the program kept reporting errors. I don't know how to configure GIO_read without blocking. Please tall me more detailed and let me use UART well. I know Christmas is over, but I still want to say merry Christmas to you. Best Regards. + +Hi, In case the GIO_read returns an error with timeout, and when the UART is configured in interrupt mode, the driver doesnot cancel the current transaction, so you will have to call the ioctl GIO_control with IOCTL_UART_CANCEL_CURRENT_IO. Also the GIO_read will anyway be a blocking call even with UART in interrupt mode of operation and will wait for 10 sec in your case. If you donot receive any input in that time the GIO_read will return with a timeout error. The interrupt mode will only make the underlying UART driver to be scheduled to run only when the data is received in UART, and polled mode will poll on the UART register to get the data. However from application point of view the GIO_read will still block till it receives data/timeout happens. Even in polling mode the Task_sleep for 1 ms is called when checking for the status from UART register which will enable other tasks to be executed. May be you can use the polling mode instead as mentioned in previous reply if you need the timeout. If you are looking for processing other data from same task that is calling GIO_read for UART it will not be possible. May be you can create a task which reads from UART and gives it to other task which can process this as you receive it. Regards, Prasad + diff --git a/data2/text/range/5001-10000/869825.txt b/data2/text/range/5001-10000/869825.txt new file mode 100644 index 0000000000000000000000000000000000000000..78821beb97d6c0e272e3a2a141e9eeeda73b74e7 --- /dev/null +++ b/data2/text/range/5001-10000/869825.txt @@ -0,0 +1,20 @@ +Ticket Name: TIDEP-01017: AWR1243 Cascade: MIPI CSI-2 Interface signal integrity + +Query Text: +Part Number: TIDEP-01017 Other Parts Discussed in Thread: TDA2, MMWCAS-DSP-EVM, AWR1243 Hi, We are trying to bring up one of our custom boards that uses two AWR1243 in cascade mode. This is interfaced with a TDA2 board (MMWCAS-DSP-EVM). Our initial tests with mmWave Studio 02.01.00.00 have all been successful. We are now wanting to move to an online data acquisition / data processing pipeline. We are using Processor SDK 3.7 Radar package for this purpose. We use one of the sample use cases provided as our starting point and customized it to enable our 2-chip cascade setup. However we are observing that data from one of the chips (slave device) is not entering the data processing chain. We probed the CSI-2 lanes on both the devices and identified that the 300 MHz CSI-2 clock signal on the slave device is skewed when compared to the master device. More specifically, the rise time is observed to be ~1.3 ns on the slave device compared to ~450 ps on the master device. The same experiments when using mmWave Studio produce very similar CSI-2 clocks (rise time of ~440-500 ps) on both master and slave devices, which leads us to believe that some configuration in the Radar SDK is causing this issue. Please see below screenshots of the measurements captured. Could you please advice as to what could be causing this discrepancy when we switch software frameworks? Thanks, Siddharth + +Responses: +Hi Siddharth, In Radar SDK implementation, it checks the cascade RF board revision to determine SPI port assignment. If it doesn't find the EEPROM for board revision, it will assume the McSPI1 (instance 0) / channel 0 is for Master and McSPI1 / channel 1 is for Slave1. Otherwise, it assign McSPI1/ch0 for Master and McSPI2/ch0 for Slave1. Could you first make sure you have the McSPI assignment set correctly for the custom board? Regards, Stanley + +Hi Stanley, Thanks for your reply. We checked the McSPI initialization and confirmed that device 0 (master) is using McSPI1 / channel 0 and device 1 (slave) is using McSPI2 / channel 0 We also checked that the firmware is loaded correctly on both devices (confirming SPI setup is correct). Below is a log of our boot up sequence. [IPU1-0] 9.026993 s: CHAINS: Init AR12xx ... [IPU1-0] 9.027084 s: Device 0 uses McSPI1->0,0 ... [IPU1-0] 9.027359 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! [IPU1-0] 9.027786 s: Device 1 with board rev 5 uses McSPI2->1,0 ... [IPU1-0] 9.027938 s: UTILS_MCSPI: McSPI is configured in interrupt mode!! Device 0 [IPU1-0] 16.858781 s: AWR12XX: Version Master : 1.10.0.20 [IPU1-0] 16.858872 s: AWR12XX: Version RF:2.0.0.1 [IPU1-0] 16.858994 s: AWR12XX: Version mmWaveLink:1.2.0.0 [IPU1-0] 16.859116 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 [IPU1-0] 16.859269 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 Device 1 [IPU1-0] 16.861068 s: AWR12XX: Version Master : 1.10.0.20 [IPU1-0] 16.861251 s: AWR12XX: Version RF:2.0.0.1 [IPU1-0] 16.861343 s: AWR12XX: Version mmWaveLink:1.2.0.0 [IPU1-0] 16.861434 s: AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18 [IPU1-0] 16.861556 s: AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18 Is there anything else that could be affecting the CSI2-data when moving from mmWave Studio to Radar SDK Thanks, Siddharth + +Hi Siddharth, Could you double check the waveform for Slave1 again and make sure the probe has proper ground connection? Poor/unstable ground connection could also cause the waveform to look like what you have captured. Regards, Stanley + +Hi Siddharth, I would also recommend you to use Processor SDK 3.8 release, instead of 3.7. There are 2 configuration issues fixed in 3.8 release. Those 2 issues are probably not be related to your current problem but will be an issue with radar data integrity once data is received and being processed. Regards, Stanley + +Hi Stanley, We were able to capture the CSI-2 data using both mmWave Studio and Processor SDK and we observe a similar pattern. That is when using mmWave Studio, the data on lane 0 for both master and slave looks similar. But when we switch to Processor SDK the data from the slave appears noisy and Vpp is almost double that of the master. Please see below snapshot. We are pretty confident that the differential probe we are using is well connected to the test points of our board when conducting these experiments. Thanks, Siddharth + +Could you use the same configuration on TI 4-chip Cascade RF board and see if you notice the same behavior? + +Hi Stanley, We were able to resolve the issue. Basically, in the SDK the FPGA numbering is a function of numRadars which we changed to 2 to support our board. However, within ChainsCommon_fpgaStart, the ordering is FPGA1,2,3,0 so for our case the concerned FPGA was not turning on. We modified the code, and also mapped the VIP ports/slices correctly and we are now able to see end to end data flow for our use case. We also measured the clk again on the slave device and it looks similar to the master device which confirms the hypothesis regarding the FPGA not being enabled. Thanks, Siddharth + diff --git a/data2/text/range/5001-10000/870482.txt b/data2/text/range/5001-10000/870482.txt new file mode 100644 index 0000000000000000000000000000000000000000..cc32314d41efa49c7a120588bae570f1cc61b809 --- /dev/null +++ b/data2/text/range/5001-10000/870482.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA2SX: How to start TDA2Sx+AWR1243P cascade radar development + +Query Text: +Part Number: TDA2SX Other Parts Discussed in Thread: AWR1243, TDA2, Hello, experts! Background: we are currently developing the TDA2xx+AWR1243 vehicle mounted radar. Please refer to the document "processorsdkradar_userguide.pdf" section 3.9.1.6.1 as shown below: The demo board is just bought and has not been loaded yet. After power up, it can enter into the root@dra7xx-evm: interface, and then I want to run cascade_radar_demo() in matlab, but the run is wrong, because I didn't follow the above selection. The question is: 1. How to start the menu option? How to see the menu option and select "a"? 2. Is it because the demo routine is not loaded? I understand whether the new board has its own demo?Or do you need to recompile the download?Do you have any specific operating instructions? 3. Does the FPGA bit file downloaded by the demo board also come with it, so it does not need to be reloaded? Thank you very much! + +Responses: +Hi, There are 2 variants of SDK which run on TDA2+AWR1243 cascade radar board. The image you are running is Processor SDK Linux which is used for radar data acquisition with mmWave Studio on PC. It doesn't include the application mentioned in the processor sdk radar user guide. To see the above start menu, you have to download Processor SDK Radar from ti.com and follow the user guide to build the SDK. Regards, Stanley + +Hi, experts! Thank you for your reply. I have found the options in the start menu in the SDK use case, but I still have a question: 1. Is there any FPGA bit file on the TDA2SX+AWR1243P cascade demo board that is powered to run, or do we need to use the loader to download the bit file again, because the FPGA loader we bought has not come back yet? Is there any way to make sure that the FPGA is working when the power is on the demo board? 2. When using the above demo board for cascade radar development, the A15 above TDA2SX can run Linux or RTOS system. What is the difference between the two? Which is better? Thanks! + +1. FPGA is already programmed out of factory. Please refer to 2.3.2.2 Lattice FPGA Flashing Steps in user guide for the location of binary file if you want to update the binary. When you run the cascade demo, you should see log indicating FGPA is ready. 2. Linux on A15 is for data acquisition use case only to capture raw data with mmWave Studio. TDA2 doesn't do any processing. Only RTOS version supports radar data processing (FFT/Peak detect) and generates radar point cloud. If you plan to use this cascade radar EVM for data acquisition and process the data on PC, you should use the Linux on TDA2 with mmWave Studio on PC. If you plan to have radar processing on TDA2 for object detection, you should use RTOS version. Regards, Stanley + +Hi, Stanley! Thank you very much for your reply! Another question I'd like to ask you: According to the operation steps of the TDA2x User Guide document, the demo board can be successfully connected and downloaded. In addition to EVE, the connection results are as follows: The question is: 1. Why is there no address assignment after only EVE connection? 2. How does the IPU1-0 interface in 3.9.1.6 in the document processorsdkradar_userguide. PDF start?As shown in the figure above: Thanks! + +In addition, as shown in the figure below, it is the configuration introduced in the TDA2x user guide document. Is eve's lack of address assignment related to this?Should it be set to 1 to get an address assignment?What's normal? Thanks! + +Hi, Stanley! It should be noted that the above problems have been solved by reading the manual in detail! But there's a new problem: After downloading the demo routine, the IP could not ping, and the matlab program failed (failed to open the port).Is there any way to solve this problem? PS: C:\PROCESSOR_SDK_VISION_03_07_00_00\vision_sdk\apps\configs\tda2xx_cascade_bios_radar\cfg.mk NDK_PROC_TO_USE=ipu1_1, NSP_TFDTP_INCLUDE=yes Looking forward to reply! Thanks! + +\vision_sdk\links_fw\src\rtos\bios_app_common\tda2xx\cfg\NDK_config.cfg set var enableStaticIpEth0=1 reboot again + +In the main menu, please check the IP address of the board. You need to hit "enter" to refresh the main menu since it takes a minute for IP address to get assigned. By default, DHCP is enabled so you have to connect the board to router with DHCP server so the board can obtain IP address. + +Hi, jim jim3 & Stanley Liu Thank you very much for your reply! The following is my configuration ,And IP 192.168.1.200 assigned by demo, but still can not ping;In addition, the DHCP service is enabled, as shown below. Don't know where or have a problem?Can you help us? Thank you very much! + +If you enable static IP, you don't need to have DHCP server. IP address is statically assigned. With static IP, you can connect both PC and cascade board to a switch, not router. In matlab, you should update the target IP address to match the board and host IP address to match the PC. + +Thank you for your reply! Yes, I stopped the DHCP server and connected the cascade board and PC directly with the network cable, but the IP(192.168.1.200) was still not pinging, I don't know where is still wrong? Looking forward to reply! Thanks! + +Thank you for your reply! Yes, I stopped the DHCP server and connected the cascade board and PC directly with the network cable, but the IP(192.168.1.200) was still not pinging, I don't know where is still wrong? In addition, I download is IPU1_0 / IPU1_1 / DSP1 / EVE1 / EVE2 / EVE3 / EVE4 demo routines, is PROCESSOR_SDK_VISION_03_07_00_00 use version, MAKECONFIG?=tda2xx_cascade_bios_radar Looking forward to reply Thanks! + +I am not sure what's wrong in your setup. Could you try using Dynamic IP instead of static IP? Connect to a router with DHCP. Regards, Stanley + +Hi Stanley! Thank you very much for your reply. My problems have been solved, including cascade radar demo and radar cascade bf demo! However, it is not clear why radar works after CCS download, but static IP cannot be pinging, and dynamic IP is not used because there is no router. Thanks! + +One issue could impact you as well. Please refer to the below E2E and apply the workaround. https://e2e.ti.com/support/processors/f/791/t/866370 + diff --git a/data2/text/range/5001-10000/875530.txt b/data2/text/range/5001-10000/875530.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e764ad9fd16e72e7c141a0e14b044fed27cba38 --- /dev/null +++ b/data2/text/range/5001-10000/875530.txt @@ -0,0 +1,34 @@ +Ticket Name: D3-3P-TDA3X-SK: DCAN Module in TDA3x + +Query Text: +Part Number: D3-3P-TDA3X-SK How will I be able to initialize and use the flags CFLAG BUILD_M4 or BUILD_DSP (in component.mk) in my usecase.I need to use a locally defined variable related to lane detection(infoFlag) in BUILD_DSP to reflect its value on core IPU1-1 's DCAN module(DCANTxTsk) Regards Akshatha + +Responses: +Hi Question is not clear can you please explain properly? Thanks Gaviraju + +I am developing a usecase that needs DCAN module. In the use case I am declaring a variable that needs to be sent to the other board via CAN. I have seen the below forum https://e2e.ti.com/support/processors/f/791/t/842250?tisearch=e2e-quicksearch&keymatch=dcan%20in and want to make use of CFLAGS. How can I use it and achieve to send the data through CAN. Regards Akshatha + +Hi If you want to use Dcan module please do the below changes in cfg.mk DCAN_INCLUDE=yes Using CFLAGS you cannot send any data to other boards using CAN because CFLAGS is used during build time & it is user-defined macros and others. If you want to send data to other board using CAN, you should use some API defined in the DCAN module vision_sdk/apps/src/rtos/modules/dcan/ Currently, Dcan source code is compiled for IPU core only. DCAN_SRCS = \ utils_dcan.c \ system_dcan.c SRCS_ipu1_0 += $(DCAN_SRCS) So you should use DCAN API in IPU core only & if you are using in other core then you will get a compile-time error. Thanks Gaviraju + +Hi In dcan/SRC_FILES.MK, I have added the following line SRCS_c66xdsp_1 += $(DCAN_SRCS) and trying to call DCAN in dsp1 core, it is compiling successfully. I declared a function (say, Temp(UInt8 x)) in Utils_Dcan.c which is called in the algorithm that is running in DSP_1. The parameter 'x' changes the DcanMsg data inside Temp() function but outside the function I am observing that x and DcanMsg data value being reset to 0. So how can I retain the changed value of DcanMsg data in other API's. Regards Akshatha + +Hi Currently, DCAN is supported on IPU core only it's not ported to other core. Thanks Gaviaju + +okay, then what should I do to send a message through dcan whose value is present in DSP core. Regards Akshatha + +Hi I have a variable declared in DSP_1 core and want to access it in IPU_1 core where DCAN is running. I tried PRAGMA DATA_MEM_BANK for sharing that variable between the cores but failed to compile by showing the "Unrecognised PRAGMA" error. How can I achieve the same. Regards Akshatha + +Hi As you said I am running DCAN from IPU core only and transmission is working as expected. If I want to receive the data through CAN from the other board at the same time the use case is hanging and stopped suddenly without any error. Sometimes it is showing XDC bad content error at line 407 (i.e; status = Utils_queGet(handle,(Ptr *)msgPtr,1, BIOS_NO_WAIT);) which is present in Utils_dcanQueGet() API. How to solve the issue such that DCAN should be able to recieve and send the data simultaneously. Regards Akshatha + +Hi which external module are you using to send & receive data from vision SDK? Are you sending data continuously? Send only one message then put a breakpoint in the function(Utils_dcanQueGet). & do step in line by line using CCS Thanks Gaviraju + +Hi I am not having a debugger to step through the code using CCS. Is there any other way yo see where the code is stopped. Also I am able to transmit the data through DCAN for long time but there is issue with receiver. So clearly it is the problem with the DCAN receiver. Is transmission and reception possible at the same time? Thanks Akshatha + +Hi Can you put a print statement & see the return value of the function? & add this statement before where you are getting the error. Thanks Gaviraju + +Hi In the code for transmission, periodic time (SYSTEM_DCAN_TX_PRD_MS (100)) is set, similarly for reception is it not set. Also I have a doubt whether transmission and reception is possible at the same time, because I want to transmit also want to receive at the same time. When both are enabled, DCAN reception is causing the usecase to go to hang state. How to resolve this issue. If you have developed any sample use case for DCAN can you attach that here. Regards Akshatha + +Hi Akshatha, DCAN is a serial interface, so either transmission or reception is possible at a given time. Both cannot happen simultaneously. If both nodes i.e. TDA3 and external CAN transmitter initiates transmission at the same time, the message with lower ID (i.e.higher priority) will go on the bus first. So from the DCAN perspective, it could be either in transmission or reception mode. You can enable both i.e. transmission as well as a reception in the DCAN use-case but both won't happen simultaneously. I think you have to put prints at various locations and look at them. Figure out where exactly it is failing and in next run print additional information needed for debugging like the status of the queue etc. at the same location. We do not have any sample use-case for DCAN except the existing one which I think you are already using. Thanks & Regards, Vivek Dhande. Texas Instruments (India) Pvt Ltd + +Thank you Vivek for the reply. As you said I will put prints at various locations and will see the function where it is failing. Will get back to you soon. Regards Akshatha + diff --git a/data2/text/range/5001-10000/875571.txt b/data2/text/range/5001-10000/875571.txt new file mode 100644 index 0000000000000000000000000000000000000000..c1b59bb258e2626a56967b8ec71750dfbd4f996d --- /dev/null +++ b/data2/text/range/5001-10000/875571.txt @@ -0,0 +1,58 @@ +Ticket Name: TDA2PXEVM: [PDK SW]How to calculate Mesh LDC parameters + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hello TI-san, I'm trying to create a Mesh LDC table from a one-to-one coordinate transformation table. (Not from camera parameters) I know how to calculate table data, but I don't know how to calculate some parameters of Mesh LDC. Could you tell me how to calculate the following Mesh LDC parameters? Physical Address0x4222 0134:LDC_BLOCK [7:0] OBW Output block width [15:8] OBH Output block height [19:16] PIXPAD Pixel pad Best regards, Yudai ISHIBASHI Physical Address0x4222 0134:LDC_BLOCK [7:0] OBW Output block width [15:8] OBH Output block height [19:16] PIXPAD Pixel pad + +Responses: +Hello Yudai, If you just one to one mapping, then you just need to fill entire table to 0x0. In this case, you could keep the output block size to be highest possible, lets say, 64x64 and pixel pad to be 0. Regards, Brijesh + +Hello Brijesh-san, I 'd like to use the mesh table downsampling factor with 8 or 16. Also, the original one-to-one table is a table for performing image transformation.(It is not a through output table.) Could you tell me how to calculate the three parameters (OBW, OBH, PIXPAD) in this case? Regards, Yudai + +Hello Yudai, output block size and pixel mapping really depends on the lookup table and based on the lookup table and input and output block ratio in the lookup table, these parameters need to be calculated. Regards, Brijesh + +Hello Brijesh-san, Could you tell me in detail how to calculate these three parameters from the lookup table? Regards, Yudai + +Hello Yudai-san, You could provide lookup table to DCC tool and tool will calculate optimal LDC parameters for the given LUT. Rgds, Brijesh + +Hello Brijesh-san, Where is the DCC tool located for Vision SDK 3.7? Regards, Yudai + +Hello Yudai, No, DCC tool is separately released on CDDS. Please contact your local TI FAE to get access. Regards, Brijesh + +Hello Yudai, Also i would suggest to try with 32x32 block size and 1 pixel pad to see if this works fine.. Rgds, Brijesh + +Hello Brijesh-san, I'm trying to use the DCC tool, but I have some questions, so please let me know: (1) Which is the unit of "Mesh table width" and "Mesh table height" in the “Advanced params” tab menu the number of bytes or the number of pixels? Table 1 of Mesh LDC plugin guide.pdf does not include these descriptions. (2) What kind of format should I prepare for LDC LUT file? Mesh LDC plugin guide.pdf only mentions "LDC LUT file", so I don't know the format details. Could you provide a sample of LDC LUT file? Additional question is below: (3) In DDC (Plugin is LDC), is it possible to arbitrarily change the values of "OBW Factors Checked" and "OBH Factors Checked" in Tuning method = "Semi-Automatic"? The values of "OBW Factors Checked" and "OBH Factors Checked" seem to be limited to 32, 64, 96, 128, 160, 192, 224 and 256. Regards, Yudai + +HI Yudai, For mesh generation, you may refer to this post: https://e2e.ti.com/support/processors/f/791/p/662696/2435557?tisearch=e2e-sitesearch&keymatch=LDC (TDA3 TRM: http://www.ti.com/lit/ug/spruie7d/spruie7d.pdf). For TDA2/TDA3 LDC, the mesh size is the same as the input image size (see LDC_INPUT_FRAME_SIZE in TRM). In "semi-auto" mode, the tool only searches some (not all) possible values. There are some constraints about the block size (please refer to TRM for details). You may fill in your desired size in "manual" mode and click "process" button to see if the size works without any error feedback. Best, Gang + +Hello Gang-san, My question (1) and (2) are resolved. For my question (3), I'd like to change the values of "OBW Factors Checked" and "OBH Factors Checked" within the hardware constraints. For example, even if OBW and OBH can be set to 8 or 16 in hardware, can't DCC tool include those values in semi-auto mode search? Regards, Yudai + +Hi Yudai, The tool tries to find largest block size for best performance. I am not sure how the tool searches exactly, but in general it tries to search all 16x values so that the search time is not too long. Typically the block size shall be no less than 32x32 (otherwise LDC performance is very bad). – OBW: 8x for YUV422; 16x for YUV420; 0 < OBW < 256 – OBH: 2, 4, 6, …, 254 – PIXPAD: 2, 3, 4, …, 15 Once you get the best 5 block sizes from the tool, you may try near by once manually with the above constraints if you want to further optimize the performance. Best, Gang + +Hello Gang-san, I understand that DCC tools only search for values above 32, because values below 32 can be very bad for performance. Thank you, Yudai + +Hi Yudai-san, I understand that you are seeing noise, can you please confirm. Regards, Sujith + +Hi Yudai-san, If you facing noise issue still, can you please provide the Mesh table, sample image and LDC configuration that you are using? Regards, Sujith + +Hello Sujith-san, Since the noise issue has not been solved yet, I attach the data for analysis. Please refer to ReleaseNote_20200226.txt for the contents. In this issue, MeshLDC output image is noisy when using the recommended parameter values of DCC tool in semi-auto mode search. (Ex. OBW=32,OBH=32) MeshLDC output image is not noisy when lower valued parameters are set manually, but the processing time increases significantly. (Ex. OBW=32,OBH=8) Since the noise is not reproduced by the DCC tool, we need to set the parameters manually and actually run the program on EVM. We'd like to more easily search parameters that is noise-free and does not degrade the performance. Is there any good way? Reards, YudaiLDCdata_for_analysis.zip + +Hi Yudai, My apologies! Once I got the request in my email, I confused this TDA2P case with TDA4. Please ignore my previous post which is assuming TDA4 LDC. Here is my TDA3 DCC tuning tool output screen capture for your LDC configuration and mesh LUT. You will need to use 16x16 with pixel pad 3 to avoid any output image artifacts. I am not sure if I misled you to use TDA4 version of DCC tuning tool. Please make sure you use TDA3 version. In your case, your output image scale down a lot from your input image, which reduces LDC performance. You may consider scaling down (e.g., 2x down) your input image first (e.g, using ISP resizer) and then use LDC. That way, you will have much better LDC performance with larger LDC block size. Best, Gang + +Hi Yudai, A few extra points about using TDA2P LDC H/W. In you example, only about 960x320 out of the output is useful. You may set the output image size to 960x320 with starting point at 480x530 (In TDA3 TRM, you may find register "LDC_FRAME_SIZE" and "LDC_INITXY" for them). In this way, LDC will only generate 960x320 output (which saves LDC time and bandwidth. You may use block size 32x10 with pixel pad = 3 for best LDC performance. An alternative is to prepare your mesh LUT so that the interested region is at the top left corner and you may use starting point 0x0 with 960x320 output image size. Unfortunately, the mesh size is decided by the input image size and you have to create a mesh LUT with the same size as input image rather than output image. This way may be easier for you S/W programming. For TDA3 LDC, there are constraints about LDC block size. OBW: 8x for YUV422; 16x for YUV420; 0 < OBW < 256 OBH: 2, 4, 6, …, 254 PIXPAD: 2, 3, 4, …, 15 Also, the output image size must be multiple of the block size. Best, Gang + +Hello Gang-san, I used TDA4 DCC, so I would like to get TDA3 DCC from local FAE. When I get TDA3 DCC, I will try to use it. By the way,I ran the sample code with your best parameters(OBW=16,OBH=16,PIXPAD=3) on TDA2Px-EVM, but hanged up with the message below: --- SIMCOP_APP: Error Submitting request --- As with the noise issue, it is very difficult for us to evaluate MeshLDC because DCC simulation works well but EVM does not. Is there any easier way to evaluate MeshLDC with TDA2Px-EVM? Regards, Yudai + +Hello Yudai, Do you see any other error message from driver? Looks like some error check if failing. Could you please share complete LDC configuration? Rgds, Brijesh + +Hello Brijesh-san, I attach the data for analysis (Captured image for CCS window when displaying error and the source code when ran). Regards, Yudai LDCdata_for_analysis_20200227.zip + +Hi Yudai, Your local support will provide the correct version, tools, and extra information related to your TDA3 test case. Best, Gang + +Hi Yudai, Can you try changing mode to VPS_ISS_SIMCOP_LDC on below line? I am suspecting some VTNF configuration is causing issue. LDC config looks fine.. pAppObj->simcopCoreOpenParams.mode = VPS_ISS_SIMCOP_LDC_VTNF; Regards, Brijesh + +Hi Yudai, I have tried this example with LDC only mode. It works fine. Could you please change mode to LDC and then test it out with LUT? Rgds, Brijesh + +Hello Brijesh-san, After changing the source code to LDC only mode, I ran the sample code with recomended parameters(OBW=16,OBH=16,PIXPAD=3) on TDA2Px-EVM. It worked fine. After this, I will use TDA3 DCC and try some of your suggestions. Regards, Yudai + +Thanks Yudai-san. I am closing this thread. + diff --git a/data2/text/range/5001-10000/877174.txt b/data2/text/range/5001-10000/877174.txt new file mode 100644 index 0000000000000000000000000000000000000000..d903ce04ebf9bf162ae480c9732a62b70464d218 --- /dev/null +++ b/data2/text/range/5001-10000/877174.txt @@ -0,0 +1,50 @@ +Ticket Name: DRA78XEVM: GEL file to initialize all cores in SoC DRA78x + +Query Text: +Part Number: DRA78XEVM Which GEL file is best to initialize all cores for the SoC DRA78x ? Or Do I have to select a GEL file for each core and which GEL files then ? + +Responses: +If you have the latest device support package installed ( https://software-dl.ti.com/ccs/esd/documents/ccs_device_support_files.html?keyMatch=Automotive%2520device%2520support&tisearch=Search-EN ) when you create a target configuration and start a debug session it will automatically call the gel files for you. Then when you connect to each core, it will call the respective core initialization gels. There is no best file as they all do their part. If you are asking for a goot place to start it all, it's probably the "_startup_common.gel". + +Hi Alex. The page you provided has many links for download. are these below the required links for the DRA78x ? Automotive Automotive v1.1.6 The Shared support package 1.1.4 is also required. + +Hello, Yes, that is correct. Download and install Automotive and shared support packages. Thanks, Alex + +Hi Alex, I am using DRA78x. Shall I use the gel files in this path \TI\ccs910\ccs\ccs_base\emulation\gel\TDA3x ? But here I can not see any GEL file for C66xx_DSP for Cortex_M4_IPU1_C I can see GEL file TDA3xx_IPU1_startup.gel and TDA3xx_cortexM4_common.gel and TDA3xx_IPU1_startup.gel Which is one I use to initialize Cortex_M4_IPU_1 ? from the above two images which is which used for initialization ? Also where I can find info about using each GEL file in this folder: \TI\ccs910\ccs\ccs_base\emulation\gel\TDA3x ? Regards Hatem + +Correct, the DRA78x device is pointing to the TDA3x gel folder (shared b/w the 2 sibling devices). If you actually click on each core you will see the default gel that was set by the SDK team in the device target configuration file. So look like you should use the TDA3xx_IPU1_startup.gel gel actually. Again, when you connect this should be all done in the background, is there a reason you need to play with these? If so, there is always the scripts menu to experiment with. I don't have a precise guide to use these gels. If you have vision SDK, after you download and install it, there is a folder and a TDA3x doc that you can refer to which mentions how to connect to target and how each gel is called. vision_sdk\docs\UserGuides\VisionSDK_UserGuide_TDA3xx.pdf + +Hi Alex, One final question which GEL file I need to use for the C66xx_DSP ? Thank you. + +For DSP (in fact to enable all cores) the "multicore_reset" gel is doing the trick. See section "3.7 Load using CCS" in the attached doc: 4760.VisionSDK_UserGuide_TDA3xx.pdf Hope it helps and it's clear now. thanks, Alex + +Hi Alex, I am getting there. I build an example and tried to debug it. But I got: Error connecting to the target: (Error -6305) PRSC module failed to write to a router register. (Emulation package 8.3.0.00003) Any clues ? Regards + +So, you have installed the package (i.e. unzipped the files in the folder as stated on the wiki page). Then do you start a debug session and connect to M4 first, leaving gels to execute? + +Installed the package as wiki page says Then I tried to start a debug session and connect to DSP1 first as I want to run my example code on the DSP1. Then I got the error message: + +Try this, connect to M4 first. Then go to Scripts menu -> TDA3x multicore initialization -> EnableAllCores. Let us know the result. thanks, Alex + +The very first time I tried to start debug it asked me to which DSP1 or DSP2 I want to connect. Then I do not see it anymore From which menu I can connect to M4 first ? in my Scripts menu it says:: No scripts available + +Create a new target configuration file -> File -> New -> Target configuration Select your platform and click save. Launch debug session and right-click on M4 and click connect. Now you should see the scripts menu populated. + +This is what I did: File -> New -> Target configuration Selected DRA78x Initialization Script point to TDA3xx_multicore_reset.gel for every core Then From RUN menu Run -> Debug I am still getting the same error Moreover I do not see the various cores list in the Debug Perspective. WHY ? + +When I launch the debug I get: But I do not see the M4 nor the EVE cores. WHY ? + +I solved the above. Should I first connect to M4 then load the my project to DSP1 ? Not Sure. Please help + +When I try to connect to M4 I get this error : ortex_M4_IPU1_C0: Error connecting to the target: (Error -275 @ 0x0) The attempt to poll a target device exceeded its timeout limit. The utility or debugger has requested that a target device be repeatedly accessed for a specific data or status value. This has failed because the built-in limit for the maximum number of attempts when polling the JTAG scan-path has been exceeded. (Emulation package 8.3.0.00003) Any clues ? + +I solved the above: What I want now is to boot the DSP from the SD card Do I need to write a bootloader code and save it to the SD card and then boot the M4 from the SD card and then M4 boots and loads the DSP I am not sure about the sequence. Can please help ? + +You can't connect via JTAG when booting from SD card. You can load the compiled SDK binary on DSP to execute. + +Yes. I do not want to connect to the JTAG, I want to store my binary in the SD card and when I apply power, the DSP will boot and load the binary from the SD card. So I need a bootloader to boot the M4. Then the the M4 will boot the DSP and load the binary from the SD card to the DSP and run it Is this sequence correct ? Please clarify ? + +Can you open a new thread? We will assign the corresponding experts there. Your original issue with gels is resolved, so please mark this resolved. + +Thank you + diff --git a/data2/text/range/5001-10000/881590.txt b/data2/text/range/5001-10000/881590.txt new file mode 100644 index 0000000000000000000000000000000000000000..54cb552bad62993e706d60538a954ba8edff31d5 --- /dev/null +++ b/data2/text/range/5001-10000/881590.txt @@ -0,0 +1,30 @@ +Ticket Name: TDA2E: SPI synchronisation as a SPI slave. + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 I am useing the TDA2X MC SPI peripheral as SPI slave. The external master on the SPI bus is sending 64 byte packets and keeps the CS active during the 64 bytes. As far as I understood from the TDA2 datasheet I have to use 3 pin mode for SPI, becasue CS stays active for longer then the configured word length (32bit). Transmission and reception works fine so far but now I am having a problem is there is a glitch on the clock line then the transmitted message is shifted by one bit. The received messages is still OK. I tried to read back SPI status registers to detect this shift, but I could not find any register which could be used for detection. Could you recommend any mechanims to detect this issue? Alternatively it probably also would work if after each 64byte packet the SPI peripheral would be reset that we start counting at the first clock pulse again. However, I don't want to reset periodically, but maybe there is any quicker mechanism to resync? If I could clear the Tx shift register and write a new value or if there would be any SPI register to rescnchronise (to start counting with CLK pulse 0 again) this probably would fix the problem. From the datasheet I could not find any way to clear the Tx shift register. Please let me know what you think. Best regards Erwin + +Responses: +Hi, What software/version are you using? McSPI slave doesnot control the clock line, it works with the clock sent by the external master. When there is a glitch in clock line, is the read data shifted by one bit? You need to read the McSPI_Rx register to read the data received, but it will not know if the data is shifted because of glitch There is no error checking for transmission supported by the SPI protocol, so this has to be implemented by software as a higher level protocol. Regards, Prasad + +Hi Prasad, Many thanks for your quick response. I am using my own SPI driver on the TDA2X. It is correct, the external SPI master is generating the clock; my problem is that there is a clock transition from low to high which only affects the Tx shift register but not the Rx shift register (I think this is shifted by the opposite transition). Therefore the received message is correct; and the transmitted message is shifted, so I am looking for a mechanism to reset the Tx shift register (or the clock counter). Thanks Erwin + +Hi Prasad, In 3 pin mode I could setup a GPIO interrupt which comes on each raising edge of the CS signal. In this ISR I would need to reset the SPI peripheral. However, as discussed above I don't want to do a full reset; just the shift register needs to get emptied. Please let me know if you have any ideas how this can be done. I think it must be a common problem in 3 pin mode as a slave to be able to guarantee to stay synchronised. Thanks Erwin + +Hi, What is the edge on which the external master is sending the data and what edge is slave configured to send the data? I am not clear when you say only Tx register is affected not the Rx as the same SPI clock line is used for both. Can you clarify the Tx and Rx you mentioned is from master or slave? Do you currently using/require a full duplex communication or half duplex? clock glitch you mentioned is on the external SPI clock line right? Have you measured the glitch you are seeing? is it in the order of the SPI clock? Regards, Prasad + +Hi Prasad, Many thanks for your response. As far as I understand the master is sending data on the falling clock edge and the slave (TDA2) on the raising clock edge. So if there is a raising edge at the beginning the slave (TDA2) Tx shift register gets affected. In my previous message I meant slave Tx and slave Rx. It is an automotive project and safety critical data are transferred via SPI, so I have to make sure we are resistant against disruptions. For the raising edge I mentioned above I would be able to find a workaround but it would not fix the main problem to make the SPI slave resistant against glitches on the clock. I require full duplex communication; the master is transferring every 10ms a 64byte packet; most of the packets are filled with zeros, so the TDA2 is able to send responses during these packets. Every 100ms (10th packet) the master is sending a command. However, this might change later. Yes, I could see a transition from low to high on the clock line; I captured it with the logic analyser. I think for this transition I can find a workaround, but my main concern is that we need to be able to recover from this situation when this happens in the car; so I have to find a mechanism to resynchronise. A full SPI reset after each 64 byte packet would solve the problem; but I am looking for a more proper solution. Best regards Erwin + +Hi, Can you share the clock glitch that you have captured which resulted in only Tx shift but not Rx in SPI slave? This ideally should not happen because if the glitch is considered as a SPI clock pulse both Tx and Rx register should be sifted. You are able to see the shifted data at the master Rx right? Regards, Prasad + +Hi Prasad, In the first pic you can see the transition of the clock which causes the problem. I have no access to the master, but I can see on the logic analyser that the transmitted data from the TDA2 are shifted. When this happens the received data on the TDA2 are all fine, otherwise I would be able to detect a problem on TDA2 firmware protocol level, but on TDA2 Rx everything was OK. However, I would like to be resistent against glitches which would affect Rx as well. In the second pic I captured just a good case of a typcial SPI message on the bus. Best regards Erwin + +Hi, The issue seems to be happening as the clock state initially is low and the may be the SPI slave was initialized during this time. Can you make sure that the SPI clock line is held at the default state at the power on or make sure to do the SPI slave initialization after that SPI clock is at default state. To confirm this you cay check the clock signal value when you do the SPI slave initialization in working and non working cases? Any glitch in between should afftect both Tx and Rx. If it is interpreted as proper clock signal both Tx and Rx will be shifted by 1 bit. This will cause data integrety issue. Since the SPI protocol doesnot handle error scenarios, you can have a high level protocol and detect this. Regards, Prasad + +Hi Prasad, Many thanks for your response. I can confirm that I can get this szenario working when initializing the slave after the clock change from low to high. However, my question is still how can I recover if I get invalid data? With the shift on Rx and Tx as you described it will be possible to detect the shift on protocol level. When the protocol detect this kind of error the best would be to empty the shift register and start counting from clock 0. What is the best way to do this? Is there any register for reset the shift register? If possible I would like to avoid a full SPI reset. Best regards Erwin + +Hi Prasad, I am trying sice one month to explain my problem and a solution; unfortunately there was no helpful support yet. I think for somebody who know the SPI peripheral in detail it should be very quick to solve my problem. I also think this is not only a problem on my system; this is a general issue any maybe more people who are using SPI as a slave should have this issue. Could you please give me some feedback how to go ahead; are there maybe more people at TI we could ask for help? Best regards Erwin + +Hi, You can stop the channel and start it again by toggeling the MCSPI_CHxCTRL[0]. This should be sufficient to start fresh transfer again. Regards, Prasad + +Hi Prasad, Many thanks for your feedback; this is very helpful! I will try it out and let you know how it works. Many thanks and best regards Erwin + diff --git a/data2/text/range/5001-10000/887354.txt b/data2/text/range/5001-10000/887354.txt new file mode 100644 index 0000000000000000000000000000000000000000..9613f79aac0cd1d3ecc28fd5ba908f3c71b0174d --- /dev/null +++ b/data2/text/range/5001-10000/887354.txt @@ -0,0 +1,78 @@ +Ticket Name: Semaphore: ERROR of running ex02_messageq sample on Linux system in TDA2-evm board + +Query Text: +Hi , I was trying to run a sample for DSP program in TDA2-evm board(XC5777X CPU board). My host environment as follows: 1. OS: Ubuntu 16.04 2. Vision SDK: PROCESSOR_SDK_VISION_03_07 I built IPC module and example successfully on $(VSDK)/ti_components/os_tools/ipc_3_45_00_00 and $(VSDK)ti_components/os_tools/ipc_3_45_00_00/examples/DRA7XX_linux_elf/ex02_messageq/ex02_messageq, and I added some message output before calling MessageQ API. Then I put App_Host and server_dsp1.xe66 to target board as /lib/firmware/App_Host & /lib/firmware/dra7-dsp1-fw.xe66 I typed '/lib/firmware/App_Host DSP1' to run App_Host in target board terminal, the terminal returned: root@dra7xx-evm:/sys/kernel/debug/remoteproc# /lib/firmware/app_host DSP1 +--> main: +--> Main_main: +--> App_create: +Msg Param init! +MsgQ create... +MsgQ Open[DSP1:MsgQ:01]... + and the terminal was stuck on the message.(it can use Ctrl+C to exit program) However, I tested the program on CPU core(/lib/firmware/App_Host HOST), and the result seem to be normal. root@dra7xx-evm:/sys/kernel/debug/remoteproc# /lib/firmware/app_host HOST +--> main: +--> Main_main: +--> App_create: +Msg Param init! +MsgQ create... +MsgQ Open[HOST:MsgQ:01]... +App_create: Host is ready +<-- App_create: +--> App_exec: +App_exec: sending message 1 +App_exec: sending message 2 +App_exec: sending message 3 +App_exec: message received, sending message 4 +App_exec: message received, sending message 5 +App_exec: message received, sending message 6 +App_exec: message received, sending message 7 +App_exec: message received, sending message 8 +App_exec: message received, sending message 9 +App_exec: message received, sending message 10 +App_exec: message received, sending message 11 +App_exec: message received, sending message 12 +App_exec: message received, sending message 13 +App_exec: message received, sending message 14 +App_exec: message received, sending message 15 +App_exec: message received +App_exec: message received +App_exec: message received +<-- App_exec: 0 +--> App_delete: +<-- App_delete: +<-- Main_main: +<-- main: + Then, I checked the debug message on '/sys/kernel/debug/remoteproc/remoteproc2/trace0' in target board, and it showed following message: root@dra7xx-evm:/sys/kernel/debug/remoteproc# cat /sys/kernel/debug/remoteproc/remoteproc2/trace0 +[ 0.000] Watchdog disabled: TimerBase = 0x48086000 ClkCtrl = 0x4a009728 +[ 0.000] 17 Resource entries at 0x95000000 +[ 0.000] [t=0x0005f63c] xdc.runtime.Main: --> main: +[ 0.000] [t=0x00072a35] xdc.runtime.Main: --> main_Dsp1 entry point +[ 0.000] [t=0x0008b002] xdc.runtime.Main: --> main_Dsp1 Task init +[ 0.000] [t=0x000a3191] xdc.runtime.Main: --> main_Dsp1 Task create +[ 0.000] [t=0x000d2cc3] xdc.runtime.Main: --> main_Dsp1 BIOS start +[ 0.000] [t=0x000eec81] ti.ipc.rpmsg.RPMessage: --> RPMessage_init: (remoteProcId=0) +[ 0.000] [t=0x001187ce] ti.ipc.family.vayu.VirtQueue: vring: 0 0x0 (0x3000) +[ 0.000] +[ 0.000] [t=0x0013a4d3] ti.ipc.family.vayu.VirtQueue: vring: 1 0x0 (0x3000) +[ 0.000] +[ 0.000] [t=0x00159147] ti.ipc.family.vayu.VirtQueue: VirtQueue_startup: VDEV status: 0x3 +[ 0.000] +[ 0.000] [t=0x0017b8f6] ti.ipc.family.vayu.VirtQueue: VirtQueue_startup: Polling VDEV status... +[ 0.000] +[ 0.000] [t=0x0039a515] ti.ipc.family.vayu.VirtQueue: VirtQueue_startup: VDEV status: 0x7 +[ 0.000] +[ 0.000] [t=0x003c259f] ti.ipc.family.vayu.VirtQueue: Passed VirtQueue_startup +[ 0.000] +[ 0.000] [t=0x003e5773] ti.ipc.rpmsg.RPMessage: <-- RPMessage_init +[ 0.000] registering rpmsg-proto:rpmsg-proto service on 61 with HOST +[ 0.000] [t=0x004156fe] xdc.runtime.Main: NameMap_sendMessage: HOST 53, port=61 +[ 0.000] [t=0x00433764] ti.ipc.rpmsg.RPMessage: --> RPMessage_send: (dstProc=0, dstEndpt=53, srcEndpt=61, data=0x95171014, len=72 +[ 0.000] [t=0x00465c9f] ti.ipc.family.vayu.VirtQueue: getAvailBuf vq: 0x95161380 0 38166 256 0x95161390 0x1000 +[ 0.000] +[ 0.000] [t=0x00491841] ti.sysbios.knl.Semaphore: ERROR: line 202: assertion failure: A_badContext: bad calling context. Must be called from a Task. +[ 0.000] ti.sysbios.knl.Semaphore: line 202: assertion failure: A_badContext: bad calling context. Must be called from a Task. +[ 0.000] xdc.runtime.Error.raise: terminating execution + So, few question as below: 1. Do Semaphore: ERROR cause program stuck? 2. if yes, how to resolve Semaphore: ERROR? 3. if no, how to run DSP program normally on IPC module? Best / Regard Wxchen + +Responses: +Hi, Are you using the ex02_messageq as-is without modification? Your traces indicate that there may be some issue with getting the virtual address of the vring. The ex02_messageq example uses the default resource table provided in the IPC source code: packages/ti/ipc/remoteproc/rsc_table_vayu_dsp.h The address of the VRING in this table may not be matching with what is present in your environment. If the CMA region is different from what is in the default resource table, then to use the example, you will need to update the example to provide a custom resource table. Can you check the address in the Linux dts file address for the DSP CMA carveout? For example: dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0x99000000 0x0 0x4000000>; reusable; status = "okay"; }; The default resource table in the IPC is using the same address of 0x99000000 for the VRING address. If yours is different, you will need to provide a custom resource table with the correct address for your setup: https://processors.wiki.ti.com/index.php/IPC_Resource_customTable To answer your other questions: user6065254 said: 1. Do Semaphore: ERROR cause program stuck? Yes, this error is printed from an assert. Upon assert, the program terminates. user6065254 said: 2. if yes, how to resolve Semaphore: ERROR? 3. if no, how to run DSP program normally on IPC module? For these, please check the resource table and make sure that the VRING address is aligned with the CMA pool for that core, as mentioned above, and let us know the results. Thanks, Angela + diff --git a/data2/text/range/5001-10000/891905.txt b/data2/text/range/5001-10000/891905.txt new file mode 100644 index 0000000000000000000000000000000000000000..702577ea456c6bab3d3213b6e332f68f17ac629c --- /dev/null +++ b/data2/text/range/5001-10000/891905.txt @@ -0,0 +1,24 @@ +Ticket Name: TDA2E: How to realize TIDL model switching without reloading the whole Chain? + +Query Text: +Part Number: TDA2E Hi, I need to run two (OD and SemSeg) TIDL models alternatively. However, it takes too long to reload the whole chain. Besides, I found the 'ALGORITHM_LINK_OBJ_MAX' parameter. Does that mean I can load two models on one EVE, and switch while the chain running? + +Responses: +As long as you have enough resource to allocate for both chains, you can create them statically and feed data to one of the chains at a time. Regards, Stanley + +Thanks, i will verify the feasibility. + +Hi Stanley I'm trying to restart tidl_OD usecase without create & delete repeatedly. However, the chain can be started (chains_tidlEVE_StartAPP) and then stop (chain_tidlEVE_StopAPP) correctly, but can not be restarted again by chains_tidlEVE_StartAPP. Corresponding code and log are shown below. Void chains_tidlEVE_StartAPP(chains_tidlODAppObj *pObj) +{ +chains_tidlEVE_Start(&pObj->ucObj); +Chains_prfLoadCalcEnable(TRUE, FALSE, FALSE); +} + +Void chains_tidlEVE_StopAPP(chains_tidlODAppObj *pObj) +{ + chains_tidlEVE_Stop(&pObj->ucObj); + Chains_prfLoadCalcEnable(FALSE, TRUE, TRUE); +} log: [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: DeInit Chain [IPU1-0] [IPU1-0] 1: Stop Chain [IPU1-0] 2: Start Chain [IPU1-0] [IPU1-0] p: printStatistics [IPU1-0] [IPU1-0] c: PRINT_CORE_PRF_LOAD [IPU1-0] [IPU1-0] b: printBufferStatistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 32.902580 s: [IPU1-0] 32.902671 s: DISPLAY: Start in progress !!! [IPU1-0] 32.902732 s: DISPLAY: Start Done !!! [IPU1-0] 32.908711 s: DISPLAY: Start in progress !!! [IPU1-0] 32.908802 s: DISPLAY: Start Done !!! [IPU1-0] 32.916519 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: DeInit Chain [IPU1-0] [IPU1-0] 1: Stop Chain [IPU1-0] 2: Start Chain [IPU1-0] [IPU1-0] p: printStatistics [IPU1-0] [IPU1-0] c: PRINT_CORE_PRF_LOAD [IPU1-0] [IPU1-0] b: printBufferStatistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 45.250960 s: [IPU1-0] 45.251082 s: DISPLAY: Stop in progress !!! [IPU1-0] 45.251174 s: DISPLAY: Stop Done !!! [IPU1-0] 45.254803 s: DISPLAY: Stop in progress !!! [IPU1-0] 45.254925 s: DISPLAY: Stop Done !!! [IPU1-0] 45.255047 s: ALGORITHM: Stop in progress (algId = 1) !!! [IPU1-0] 45.255139 s: ALGORITHM: Stop Done (algId = 1) !!! [IPU1-0] 45.255261 s: IPC_IN_1 : Stop Done !!! [IPU1-0] 45.256054 s: IPC_OUT_1 : Stop Done !!! [IPU1-0] 45.256298 s: IPC_IN_0 : Stop Done !!! [HOST ] 45.255413 s: IPC_OUT_3 : Stop Done !!! [HOST ] 45.255505 s: ALGORITHM: Stop in progress (algId = 16) !!! [HOST ] 45.255505 s: ALGORITHM: Stop Done (algId = 16) !!! [HOST ] 45.255566 s: IPC_IN_1 : Stop Done !!! [HOST ] 45.282742 s: IPC_OUT_0 : Stop Done !!! [DSP1 ] 45.255657 s: IPC_OUT_1 : Stop Done !!! [DSP1 ] 45.255840 s: ALGORITHM: Stop in progress (algId = 39) !!! [DSP1 ] 45.255840 s: ALGORITHM: Stop Done (algId = 39) !!! [DSP1 ] 45.255962 s: IPC_IN_3 : Stop Done !!! [DSP1 ] 45.256450 s: IPC_OUT_0 : Stop Done !!! [DSP1 ] 45.256572 s: ALGORITHM: Stop in progress (algId = 36) !!! [DSP1 ] 45.256603 s: ALGORITHM: Stop Done (algId = 36) !!! [DSP1 ] 45.256999 s: IPC_IN_0 : Stop Done !!! [DSP1 ] 45.282834 s: IPC_IN_1 : Stop Done !!! [EVE1 ] 45.280912 s: IPC_OUT_0 : Stop Done !!! [EVE1 ] 45.281492 s: ALGORITHM: Stop in progress (algId = 14) !!! [EVE1 ] 45.281736 s: ALGORITHM: Stop Done (algId = 14) !!! [EVE1 ] 45.282407 s: IPC_IN_0 : Stop Done !!! [EVE2 ] 45.379765 s: IPC_OUT_0 : Stop Done !!! [EVE2 ] 45.380558 s: ALGORITHM: Stop in progress (algId = 14) !!! [EVE2 ] 45.380802 s: ALGORITHM: Stop Done (algId = 14) !!! [EVE2 ] 45.381351 s: IPC_IN_0 : Stop Done !!! [HOST ] 45.381687 s: IPC_OUT_1 : Stop Done !!! [DSP1 ] 45.381961 s: IPC_IN_2 : Stop Done !!! [IPU1-0] 45.480265 s: IPC_OUT_0 : Stop Done !!! [IPU1-0] 45.480448 s: VPE: Stop in progress !!! [IPU1-0] 45.480540 s: VPE: Stop Done !!! [IPU1-0] 45.480631 s: DECODE: Stop in progress !!! [IPU1-0] 45.480814 s: DECODE: Stop Done !!! [IPU1-0] 45.481058 s: [IPU1-0] 45.481180 s: #### EVE CLK = 650.0 Mhz [IPU1-0] 45.481302 s: #### DSP CLK = 748.0 Mhz [IPU1-0] 45.481424 s: #### IPU CLK = 212.800000 Mhz [IPU1-0] 45.481547 s: #### A15 CLK = 1176.0 Mhz [IPU1-0] 45.481608 s: [IPU1-0] 45.481638 s: [IPU1-0] 45.481699 s: LOAD: CPU: 14.5% HWI: 1.8%, SWI:0.8% [IPU1-0] 45.482035 s: [IPU1-0] 45.482096 s: LOAD: TSK: IPC_IN_0 : 0.1% [IPU1-0] 45.482187 s: LOAD: TSK: IPC_IN_1 : 0.1% [IPU1-0] 45.482279 s: LOAD: TSK: IPC_OUT_0 : 0.1% [IPU1-0] 45.482370 s: LOAD: TSK: IPC_OUT_1 : 0.2% [IPU1-0] 45.482462 s: LOAD: TSK: NULL_SRC0 : 2.6% [IPU1-0] 45.482553 s: LOAD: TSK: SYNC0 : 0.3% [IPU1-0] 45.482645 s: LOAD: TSK: DISPLAY0 : 0.1% [IPU1-0] 45.482767 s: LOAD: TSK: DEC0 : 0.2% [IPU1-0] 45.482858 s: LOAD: TSK: VPE0 : 0.3% [IPU1-0] 45.482950 s: LOAD: TSK: ALGORITHM0 : 1.7% [IPU1-0] 45.483041 s: LOAD: TSK: GrpxSrc0 : 0.2% [IPU1-0] 45.483133 s: LOAD: TSK: STAT_COLL : 3.5% [IPU1-0] 45.483224 s: LOAD: TSK: DEC_PROCESS_TSK_0 : 0.4% [IPU1-0] 45.483316 s: LOAD: TSK: MISC : 2.1% [IPU1-0] 45.483377 s: [IPU1-1] 45.583267 s: [IPU1-1] 45.583358 s: LOAD: CPU: 1.1% HWI: 0.7%, SWI:0.3% [IPU1-1] 45.583450 s: [IPU1-1] 45.583541 s: LOAD: TSK: MISC : 0.1% [IPU1-1] 45.583633 s: [HOST ] 45.480082 s: IPC_OUT_2 : Stop Done !!! [HOST ] 45.480143 s: ALGORITHM: Stop in progress (algId = 12) !!! [HOST ] 45.480143 s: ALGORITHM: Stop Done (algId = 12) !!! [HOST ] 45.480204 s: IPC_IN_0 : Stop Done !!! [EVE3 ] 45.478374 s: IPC_OUT_0 : Stop Done !!! [EVE3 ] 45.478984 s: ALGORITHM: Stop in progress (algId = 14) !!! [EVE3 ] 45.479198 s: ALGORITHM: Stop Done (algId = 14) !!! [EVE3 ] 45.479747 s: IPC_IN_0 : Stop Done !!! [HOST ] 45.684133 s: [HOST ] 45.684133 s: LOAD: CPU: 26.3% HWI: 0.1%, SWI:0.0% [HOST ] 45.684133 s: [HOST ] 45.684133 s: LOAD: TSK: MISC : 26.2% [HOST ] 45.684163 s: [DSP1 ] 45.783962 s: [DSP1 ] 45.783993 s: LOAD: CPU: 15.0% HWI: 0.2%, SWI:0.1% [DSP1 ] 45.783993 s: [DSP1 ] 45.784023 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 14.5% [DSP1 ] 45.784023 s: LOAD: TSK: MISC : 0.2% [DSP1 ] 45.784054 s: [DSP2 ] 45.883974 s: [DSP2 ] 45.884005 s: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0% [DSP2 ] 45.884035 s: [DSP2 ] 45.884035 s: LOAD: TSK: MISC : 0.2% [DSP2 ] 45.884066 s: [EVE1 ] 45.984444 s: [EVE1 ] 45.984597 s: LOAD: CPU: 75.7% HWI: 0.3%, SWI:0.2% [EVE1 ] 45.984841 s: [EVE1 ] 45.984993 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 75.0% [EVE1 ] 45.985268 s: LOAD: TSK: MISC : 0.2% [EVE1 ] 45.985481 s: [EVE2 ] 46.086744 s: [EVE2 ] 46.086866 s: LOAD: CPU: 72.9% HWI: 0.3%, SWI:0.2% [EVE2 ] 46.087140 s: [EVE2 ] 46.087293 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 72.3% [EVE2 ] 46.087537 s: LOAD: TSK: MISC : 0.1% [EVE2 ] 46.087750 s: [EVE3 ] 46.188800 s: [EVE3 ] 46.188952 s: LOAD: CPU: 73.2% HWI: 0.3%, SWI:0.1% [EVE3 ] 46.189227 s: [EVE3 ] 46.189379 s: LOAD: TSK: SYSTEM_TSK_MULTI_MBX: 72.5% [EVE3 ] 46.189654 s: LOAD: TSK: MISC : 0.3% [EVE3 ] 46.189867 s: [EVE4 ] 46.290703 s: [EVE4 ] 46.290855 s: LOAD: CPU: 0.5% HWI: 0.2%, SWI:0.1% [EVE4 ] 46.291099 s: [EVE4 ] 46.291282 s: LOAD: TSK: MISC : 0.2% [EVE4 ] 46.291496 s: [IPU2 ] 46.392515 s: [IPU2 ] 46.392576 s: LOAD: CPU: 0.8% HWI: 0.4%, SWI:0.3% [IPU2 ] 46.392698 s: [IPU2 ] 46.392789 s: LOAD: TSK: MISC : 0.1% [IPU2 ] 46.392881 s: [IPU1-0] 46.492984 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: DeInit Chain [IPU1-0] [IPU1-0] 1: Stop Chain [IPU1-0] 2: Start Chain [IPU1-0] [IPU1-0] p: printStatistics [IPU1-0] [IPU1-0] c: PRINT_CORE_PRF_LOAD [IPU1-0] [IPU1-0] b: printBufferStatistics [IPU1-0] [IPU1-0] Enter Choice: [IPU1-0] [IPU1-0] 51.303178 s: [IPU1-0] 51.303269 s: DISPLAY: Start in progress !!! [IPU1-0] 51.303330 s: DISPLAY: Start Done !!! [IPU1-0] 51.304977 s: DISPLAY: Start in progress !!! [IPU1-0] 51.305038 s: DISPLAY: Start Done !!! [IPU1-0] 51.311840 s: [IPU1-0] [IPU1-0] ==================== [IPU1-0] Chains Run-time Menu [IPU1-0] ==================== [IPU1-0] [IPU1-0] 0: DeInit Chain [IPU1-0] [IPU1-0] 1: Stop Chain [IPU1-0] 2: Start Chain [IPU1-0] [IPU1-0] p: printStatistics [IPU1-0] [IPU1-0] c: PRINT_CORE_PRF_LOAD [IPU1-0] [IPU1-0] b: printBufferStatistics [IPU1-0] [IPU1-0] Enter Choice: + +The chain doesn't support "restart" from STOP state. Once in STOP state, it has to go to "Delete" next. After "Delete", you can start the chain again by "Create" and "Start". Regards, Stanley + diff --git a/data2/text/range/5001-10000/892629.txt b/data2/text/range/5001-10000/892629.txt new file mode 100644 index 0000000000000000000000000000000000000000..3ba5c5b5c4d2760d5c3ed0a17a91b2885f48927e --- /dev/null +++ b/data2/text/range/5001-10000/892629.txt @@ -0,0 +1,44 @@ +Ticket Name: TDA2PXEVM: XDS110 Debugger Error + +Query Text: +Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Hi, I tried to begin debugging thee TDA2 Cascade EVM with XDS110. I got the below error. Please advice how to proceed. Thanks, --Khai -----[Print the board config pathname(s)]------------------------------------ C:\Users\khai.trinh\AppData\Local\Texas Instruments\ CCS\TI\0\2\BrdDat\testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100- or 510-class product. This utility will load the adapter 'jioxds110.dll'. The library build date was 'May 30 2018'. The library build time was '23:03:35'. The library package version is '8.0.27.9'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[An error has occurred and this utility has aborted]-------------------- This error is generated by TI's USCIF driver or utilities. The value is '-233' (0xffffff17). The title is 'SC_ERR_PATH_BROKEN'. The explanation is: The JTAG IR and DR scan-paths cannot circulate bits, they may be broken. An attempt to scan the JTAG scan-path has failed. The target's JTAG scan-path appears to be broken with a stuck-at-ones or stuck-at-zero fault. [End: Texas Instruments XDS110 USB Debug Probe_0] + +Responses: +Hi, I skipped the connection test and launched the Target Configuration file. It went further. But when I tried to connect to the DSP1 (right click->Connect Target), I got the attached failure. Thanks, --Khai + +Hi Khai, can you check if this can help you: Regards, Yordan + +In addition, this looks like a HW issue to me. Try disassembling the EVM and putting it back together with all parts properly fasten. Then create a new target configuration and try again. + +My TDA2 Processor board is working fine. I am running radar use case on it and it works. Just now i need to debug it with debugger that failed to connect. It could be the debugger problem. Thanks, --Khai + +If you are booting an OS, that can also prevent it from initializing the JTAG. Are you trying to connect to a bare metal EVM (just initialized after ROM code)? + +I am running TI rtos. If that's a problem, how do I just run rom code. What's the step? Right now, I am running off a SIM card that contains the processor sdk appimage and trying to debug am offline algorithm by loading the application on to the c66. If that's not the proper step, please advice... Thanks, Khai + +Right, if you want JTAG, you shouldn't be booting software/OS from MMC/flash/another unit because it's messing with JTAG settings, and probably disabling it. If you want to debug the RTOS, the source/binary should be loaded via CCS when you connect to target. See device "Initialization" chapter in the TRM on how to not boot from external media but from ROM only. + +Please provide the doc. Does that mean for the processor board, I simply apply power without inserting the SIM card? Thanks, Khai + +Khai Trinh said: Please provide the doc. Here is the TRM for details: Khai Trinh said: Does that mean for the processor board, I simply apply power without inserting the SIM card? Generally speaking yes, but double-check your SYS_BOOT pins. Try it and let us know if you can connect to the device without booting anything first. thanks, Alex + +Hi Alex, No, Same thing. Removed the appimage SIM and power up the board, run the target config test, same error. Click reset button on the board, rerun target config test, same result. Can we schedule a debug session? Thanks, --Khai + +Hello Khai, Wait, I know it says EVM, but I don't see a SIM slot depicted in the general EVM documentation. Is this a custom board you are using? If so could be a problem with JTAG schematics. Another way is to play with the DIP switch to try different boot modes. thanks, Alex + +Hi Alex, Yes this is the factory TDA2 EVM Processor Board. See attached pic. + +OK this still looks like a HW issues to me. Assuming your JTAG is tested good with other boards, can you give us the EVM serial numbers and we will check with the manufacturer. thanks, Alex + +Khai Did you make sure the SYSBOOT pins are set correctly? Thanks and Regards Piyali + +HI Piyali, When you guys give instruction to the solution, can you be not assume that the person who asked the question knows or understand what you are referring to? The more specific you are, the shorter the thread it will be. This will save a hec lot of both your time and ours. We didn't design the HW/SW. So when you say SYSBOOT pin, you assume that I know exactly what you are referring to. Please supplement you answer with specific pic or doc that show me where to set this pin on the board would be greatly helpful and this thread can be closed. Now I have to hunt for the Doc that describe where the hec on the board this pin is and so far I have no luck in hunting it down and thus the thread continues on for yet another couple of back and forth. Just my take on most of the responses from your team. You support forum is great but you guys didn't take the time to raise the quality of the responses to cut it short. The goal of your support team should be to lessen your burden in spending a lot of time in support by addressing the questions to bring them to the bottom of it. Thanks + +SO i found the doc that given to me by Alex that described SYSBOOT in 31.2.4 Sysboot Configuration. So looks like there are two main booting type - Peripheral or MEM booting. I assume I need it to be in Peripheral mode. But then how to set the board to be in USB booting mode? Is there a dip switch taken out to the board level to set this boot mode? Thanks, --Khai + +Hello Khai, Apologize if we've been vague, but we also expect the from the user to be familiar with documentation first. When we post a reply, we assume that's already been done and they have read the docs (at least the important stuff like booting the device (like I said found in the initialization chapter in the technical reference manual)). We cannot possibly describe all things documentation explains here. So, you should be familiar and know where to look for information first before asking a question here. For example, get to know the SDK docs (found in the docs folder of the SDK for the device), and TRM (Technical reference manual) and DM (Data Manul) found on ti.com product page (for your processor: https://www.ti.com/product/TDA2P-ACD/technicaldocuments). On that product page, there are also many other custom docs for specific topics that may be needed one time or another. Now on to the last question. What we suggest is to set your pins in debug mode and see if you can finally connect. Here is an excerpt from VisionSDK_UserGuide_TDA2px.pdf found in "VisionSDK\vision_sdk\docs\UserGuides" folder. Let us know the results please, thanks! Alex + +Hi Alex, The XDS100 debugger i used was aml-function. I just purchased the 560v2 and it worked like a charm. With the 560v2, I ran the code with the SIM card that has the entire use case application and running, then run the debugger and tapped into the DSP device that I would like to debug on, load the debug symbol for the DSP, inserted some break point and resume the DSP and off I am running. So thanks for the help. I guess boot mode setting isn't necessary. It might be necessary if running without SIM. But I need to run with SIM to debug along with the whole application Regards, --Khai + +Hello Khai, Great to hear! So a broken JTAG then. Thanks for sharing your finds as well for others with similar issues to see. Closing this thread. thanks, Alex + diff --git a/data2/text/range/5001-10000/898080.txt b/data2/text/range/5001-10000/898080.txt new file mode 100644 index 0000000000000000000000000000000000000000..2bdfcf42f606d4c7be3e5c802c424b264f824bf6 --- /dev/null +++ b/data2/text/range/5001-10000/898080.txt @@ -0,0 +1,32 @@ +Ticket Name: TDA2E: Different SSD models & some TDA4 questions + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hello, I've several questions regarding caffe ssd implementations: 1. I understand the resize_width & resize_height, but what does the ssd_size referring to? Does it refer to the feature map size output by the base network (right after feature extraction)? 2. I've a relatively simpler detection task than ADAS, and I discovered that aside from ssdJacintoNetV2, in the code we also have jdetnet21_fpn, jdetnet21_s8, jdetnet21. Speed is also important to my application, does the remaining 3 networks offer any speed boost over ssdJacintoNetV2? 3. My boss has been considering to use TDA4, and I see one of the TI engineer mentioned the caffe trained networks are expected to work on TDA4. Does the conversion tool and usecase are provided already for TDA4 to run caffe models with hardware acceleration? If not, when would it be ready? 4. A TI engineer also mentioned, L1 & sparse training offer no speed boost on TDA4, would you please kindly to share some benchmark stats? How come including zeros to models to speed up calculation doesn't end up making much difference on TDA4? Would you please kindly explain the reason? Thank you, Wei Chih + +Responses: +1. Are you referring to import config "resize_width & resize_height" if yes, this not mandatory config. This is required only for classification networks 2. Please use to performance simulation on these networks - "http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tidl_j7_01_01_00_10/ti_dl/docs/user_guide_html/md_tidl_naps_executioninfo.html" 3. Yes, user can run the Caffe-based SSD network on TDA4 refer below for a list of validated nets http://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/tidl_j7_01_01_00_10/ti_dl/docs/user_guide_html/md_tidl_models_info.html 4. Optimization of Sparse models are not supported in TDA4 + +kumar.desappan said: 4. Optimization of Sparse models are not supported in TDA4 Isn't the sparse optimization done during training rather than run time, or is it? If I had a sparsed model, does it have no speed improvement at all or simply TDA4 cannot run sparsed SSD model? Thank you. + +TDA4 can run sparsed mode, But speed improvement is not expected. + +Hi Kumar, Another question is that, quantization optimization is done during runtime when running the model on the TDA2x board right? If so, does the given infer_video_object.py uses quantization when perform detection? Thanks. + +infer_video_object.py does not use quantization when performing detection. But when you run it on TDA2, quantization will be performed. You can read more about Deep Learning training software that we provide for TDA4 here: https://github.com/TexasInstruments/jacinto-ai-devkit Best regards, Manu + +Quantization is done for the purpose of speed, but it kind of downgrading my model's mAP quite a lot. Is the impact inevitable? Or any way to reduce the impact? I noticed that Pytorch implementation used quantization aware training, does this allows lower performance impact than TDA2's runtime quantization? + +Hi, Quantization scheme in TIDL for TDA2 is rather simple - so certain networks can have accuracy degradation. The accuracy degradation may be more pronounced for networks that use Depthwise convolution layers. So its better to avoid it if you are using TIDL for TDA2. Most of the development effort is now focused on TDA4 these days. As you noticed tools for QAT are provided in PyTorch jacinto-ai-devkit for TDA4. Also TIDL for TDA4 will have Advanced calibration options in the next release that should help to reduce much of quantization accuracy loss even without using QAT. So, since most of our development is now focused on TDA4, you have more options and support available on TDA4. So if you are considering TDA4, I would certainly encouraging it. Introduction: https://www.ti.com/product/TDA4VM If you read the datasheet: https://www.ti.com/lit/ds/symlink/tda4vm.pdf It says, it has 8 TOPS (8 Tera Operations per second, 8bit) for Deep Learning. That is much much more compared to TDA2. Best regards, + +Hi, Thanks for the thorough replies, Manu and Kumar. It's been really helpful. Best regards, Wei Chih + +kumar.desappan said: 1. Are you referring to import config "resize_width & resize_height" if yes, this not mandatory config. This is required only for classification networks After tweaking a bit, I discovered some issues when training SSD for detection: 1. Changing ssd_size from '768x320' to '300x300' has no impact on '...../initial/deploy.prototxt', input_shape in deploy.prototxt still shows: input_shape { dim: 1 dim: 3 dim: 768 dim: 320 } and ssd_size '768x320' & '300x300' took same amount of GPU memory with same batch size during training process. 2. setting forced_color=0 also has no impact on ....../initial//deploy.prototxt. input_shape still shows input as 3 channels images: input_shape { dim: 1 dim: 3 // forced_color=0 dim: 768 dim: 320 } Do we need to manually convert all our training/testing/validation data to grayscale? Thank you, Wei Chih + +I have just assigned this thread to the expert. + +Can you pls tell me where are you making changes to change the input resolution? Also can you pls share your training log file? Meaning of force_color=True is when during training it encounters gray scale image it will convert to color so you don't need to do anything extra. + +Hello Najori, 1. In the 'train_image_object_detection.sh', there are parameters such as ssd_size & resize_width & resize_height: I set, dataset=ti-custom-cfg1 ssd_size='512x512' #this doesn't change input_shape in generated /initial/deploy.prototxt elif [ $dataset = "ti-custom-cfg1" ] then resize_width=768 # these will change input_shape in generated /initial/deploy.prototxt resize_height=320 # these will change input_shape in generated /initial/deploy.prototxt crop_width=768 crop_height=320 Training log file (I've git clone caffe-jacinto-models again, ssd_size still have no control on input_shape in deploy.prototxt): 8484.run.log + +This is expected behavior. To actually change network input size the followings need to be set appropriately. resize_width=768 resize_height=320 crop_width=768 crop_height=320 ssd_size is used for something else. May be it should have been named differently. + diff --git a/data2/text/range/5001-10000/910207.txt b/data2/text/range/5001-10000/910207.txt new file mode 100644 index 0000000000000000000000000000000000000000..3ca65056a76b4a4f1691bb837d6b78afa61233cc --- /dev/null +++ b/data2/text/range/5001-10000/910207.txt @@ -0,0 +1,12 @@ +Ticket Name: Compiler/TDA2PXEVM: Ethernet RGMII without MDIO --- connected to switch directly + +Query Text: +Part Number: TDA2PXEVM Tool/software: TI C/C++ Compiler Dear all, we got a customer board , it connected RGMII[0] to a switch(SJA1105P) port[5] , I did code modify as follows: 1.add 'pGMACSWConfig->macInitCfg[0].mdioModeFlags = MDIO_MODEFLG_NOPHY;' in file 'ndk_nsp_hooks,c' and set 'pGMACSWConfig->macInitCfg[i].macConnectionType = MAC_CONNECTION_TYPE_RGMII_FORCE_100_FULL;' 2.disable MDIO in file 'network_ctrl_tsk.c' as shown as below " status = Network_waitConnect(&pObj->sockObj, 1000); MDIO_CtronlRegValueTemp = RD_MEM_32(0x48485004); Vps_printf("network_ctrl_tsk.c line 272 MDIO_Control Reg : %X HAHAHAHHAHAH",MDIO_CtronlRegValueTemp);//read MDIO status Vps_printf("network_ctrl_tsk.c line 273 CTRL_CORE_PAD_RGMII0_RXC Reg : %X HAHAHAHHAHAH",RD_MEM_32(0x4A003668));//read CTRL_CORE_PAD_RGMII0_RXC Vps_printf("network_ctrl_tsk.c line 274 CTRL_CORE_PAD_RGMII0_TXC Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4A003650));//read CTRL_CORE_PAD_RGMII0_TXC Vps_printf("network_ctrl_tsk.c line 274 CONFIG_REG_2 IODelay Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4844A014));//read IO delay if(MDIO_CtronlRegValueTemp != (UInt32)0x00100000) { WR_MEM_32(0x48485004,0x00100000); } " according to modification as above , I got data as follows: " [HOST ] 2083.594766 s: network_ctrl_tsk.c line 272 MDIO_Control Reg : 1100000 HAHAHAHHAHAH [HOST ] 2083.594766 s: network_ctrl_tsk.c line 273 CTRL_CORE_PAD_RGMII0_RXC Reg : 40100 HAHAHAHHAHAH [HOST ] 2083.594796 s: network_ctrl_tsk.c line 274 CTRL_CORE_PAD_RGMII0_TXC Reg: 100 HAHAHAHHAHAH [HOST ] 2083.594796 s: network_ctrl_tsk.c line 274 CONFIG_REG_2 IODelay Reg: 5DE HAHAHAHHAHAH " After send arp package through CANOE I can't got response from TDA. Is there anybody can help me to confirm those modifications are sufficient for TDA? Thanks a lot. + +Responses: +Hello. To confirm, you are enabling MAC-to-MAC communication, starting with the NSP driver, correct? The MDIO flags and MAC connection type are correct for MAC-to-MAC. It’s not quite clear why only TXC, RXC and just one IOdelay register are printed in the shared code snippet. RGMII iodelay settings have to be done as per the data manual, i.e. for RGMII see section 5.10.6.18.3 of DM. Please do confirm that you are following the procedure outlined. Assuming this is correct, then we will want to check is if packets are being dropped in the GMAC. This can be checked in the GMAC STATS registers, see section 26.11.6.5 in TRM for details. Besure to check the STATS registers both before and after the CANOE test: • RX_CRC_ERRORS must be 0 • RX_DMA_OVERRUNS must be 0 • TX_UNDERRUN must be 0 • GOOD_TX_FRAMES and GOOD_RX_FRAMES counter should have increased after the CANOE test Also, you may want to check if the RGMII internal delay is enabled in bits 25 or 26 of CTRL_CORE_SMA_SW_1 register (0x4A002534). Best regards, Dave + +Hello Dave, Thanks for your reply very much. All of your advices are very useful. 1. I am not sure if it's MAC-to MAC with NSP, could you tell me how to confirm it? 2.I did some test code to read register which I want to watch , as shows as below : " Vps_printf("network_ctrl_tsk.c line 272 MDIO_Control Reg : %X HAHAHAHHAHAH",MDIO_CtronlRegValueTemp);//Lan Vps_printf("network_ctrl_tsk.c line 273 CTRL_CORE_PAD_RGMII0_RXC Reg : %X HAHAHAHHAHAH",RD_MEM_32(0x4A003668));//Lan Vps_printf("network_ctrl_tsk.c line 274 CTRL_CORE_PAD_RGMII0_TXC Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4A003650));//Lan Vps_printf("network_ctrl_tsk.c line 275 CONFIG_REG_2 IODelay Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4844A014));//Lan Vps_printf("network_ctrl_tsk.c line 276 RX_CRC_ERRORS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484910)); Vps_printf("network_ctrl_tsk.c line 277 RX_DMA_OVERRUNS Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4848498C)); Vps_printf("network_ctrl_tsk.c line 278 TX_UNDERRUN Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4848495C)); Vps_printf("network_ctrl_tsk.c line 279 GOOD_TX_FRAMES Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484934)); Vps_printf("network_ctrl_tsk.c line 280 GOOD_RX_FRAMES Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x48484900)); Vps_printf("network_ctrl_tsk.c line 281 CTRL_CORE_SMA_SW_1 Reg: %X HAHAHAHHAHAH",RD_MEM_32(0x4A002534)); " 3.I got those register's data as shown as below: " [HOST ] 200.166290 s: network_ctrl_tsk.c line 272 MDIO_Control Reg : 1100000 HAHAHAHHAHAH [HOST ] 200.166290 s: network_ctrl_tsk.c line 273 CTRL_CORE_PAD_RGMII0_RXC Reg : 40100 HAHAHAHHAHAH [HOST ] 200.166320 s: network_ctrl_tsk.c line 274 CTRL_CORE_PAD_RGMII0_TXC Reg: 100 HAHAHAHHAHAH [HOST ] 200.166320 s: network_ctrl_tsk.c line 275 CONFIG_REG_2 IODelay Reg: 5DE HAHAHAHHAHAH [HOST ] 200.166320 s: network_ctrl_tsk.c line 276 RX_CRC_ERRORS Reg: 0 HAHAHAHHAHAH [HOST ] 200.166320 s: network_ctrl_tsk.c line 277 RX_DMA_OVERRUNS Reg: 0 HAHAHAHHAHAH [HOST ] 200.166320 s: network_ctrl_tsk.c line 278 TX_UNDERRUN Reg: 0 HAHAHAHHAHAH [HOST ] 200.166351 s: network_ctrl_tsk.c line 279 GOOD_TX_FRAMES Reg: 0 HAHAHAHHAHAH [HOST ] 200.166351 s: network_ctrl_tsk.c line 279 GOOD_RX_FRAMES Reg: 28 HAHAHAHHAHAH [HOST ] 200.166351 s: network_ctrl_tsk.c line 279 CTRL_CORE_SMA_SW_1 Reg: 0 HAHAHAHHAHAH " the 'GOOD_RX_FRAMES' increase every time while running CANOE test, Should I think those configuration are OK? I have tried to set CPSW_CONTROL as "FIFO_LOOPBACK" then I can watch echo data in CANOE. is it means driver configuration right? Thanks for your help. Best regards, Lan + +Lan, For #1 I was confirming that your original information looks correct for this configuration, and asking intent. I think this is fine. For #2, I see from CTRL_CORE_SMA_SW_1 == 0 that the internal delay is enabled. Thanks for confirming this. GOOD_RX_FRAMES increasing during test should mean this configuration is good. Once you enable loopback you'll hopefully see the TX as well. Best regards, Dave + diff --git a/data2/text/range/5001-10000/915186.txt b/data2/text/range/5001-10000/915186.txt new file mode 100644 index 0000000000000000000000000000000000000000..2d95585406e679573dbe0e78293a8af9e40decef --- /dev/null +++ b/data2/text/range/5001-10000/915186.txt @@ -0,0 +1,18 @@ +Ticket Name: TDA2SX: eMMC boot failed as second boot device + +Query Text: +Part Number: TDA2SX Hello Sir/Madam, We got two cases of product failure reports (APA application, TDA2SX as video processor, failed to boot up) from our customers. When finished end of line calibration and write calibration data back to eMMC, and rebooted the system, the system can not boot up. TDA2SX boot mode is configured as bootmode[5:0] : 10 0010, SD card (1st device), eMMC (2nd device, for production), USB (3rd device). Our original purpose is to use eMMC as the only memory for production (SD card not inserted), SD card used in debug, USB is expected to be for upgradation. The system is working ok before calibration, which means eMMC (all code and data in eMMC) boots up correctly as the only boot memory. We did the below checks on the failed boards. 1. Insert SD card as first boot memory without changing boot mode configuration, the board can boot up correctly. When the system boots up using SD card, we copied the contents of eMMC and burn it into a new SD card, and the system boots OK with this new burned SD card. We also checked the CTRL_CORE_BOOTSTRAP register value using the SD card boot, it matches what our hardware sets, 10 0010 . 2. Inserted an SD card with u-boot configured booting Kernel from eMMC, both u-boot and kernel works OK. 3. We changed the boot mode (10 0000) to make eMMC as the first boot device, it can boot up correctly, we did not change the eMMC contents on the failed boards. 4. Inserted an empty SD card and tried to boot the system, failed. 5. We burned one board eMMC, it now can boot up ok. Currently, I have no further idea to continue on this issue. Please feel free to give your suggestion on which points I should check. thanks. Jeffrey Yu + +Responses: +Hi Jeffrey, I'm likely to need additional data to follow up further here - I will summarize shortly on what we need. In the meanwhile, I will take a look at your problem description and come back with some further thoughts. Regards Karthik + +Jeffrey, To make sure I understand your issue: You booted up in eMMC; ran calibration; re-wrote data in eMMC based on calibration results; rebooted the system; and the system could no longer boot. Is this correct? A few questions: What is the end-of-line calibration you are running? Where are you re-writing these data in eMMC, could it have corrupted the filesystem? Did you get stuck in uboot or kernel on the reboot attempt? Do you have SD card inserted in the slot, or are you only expecting to boot from eMMC? What speed mode are you working at? If both MMC1 and MMC2 are used, please provide the speed for both modules. For the failure board checkouts, are you suggesting if you change out the boot-modes after failure occurred to eMMC-only or SD-only (where SD card content was flashed by the eMMC), the failed system then boot up successfully? Please confirm once SD-only boot and eMMC-only boot succeeded, you went back to the failure boot mode (SYSBOOT[5:0] = 10 0010) and confirmed the failure persisted. How many boards have you tested this on, and how many boards showed failure? Best Regards, Shiou Mei + +Hello Shiou, Please see my feedback in bold blue below. To make sure I understand your issue: You booted up in eMMC; ran calibration; re-wrote data in eMMC based on calibration results; rebooted the system; and the system could no longer boot. Is this correct? --- Yes, your understanding is correct. A few questions: What is the end-of-line calibration you are running? -- It's AVM camera pose calibration data. Where are you re-writing these data in eMMC, could it have corrupted the filesystem? -- the data wrote in filesystem, we don't think the filesystem is corrupted since we chanced the boot mode to eMMC as first boot device, uboot, kernel and application are all working OK. Did you get stuck in uboot or kernel on the reboot attempt? -- if boot mode is 10 0010, eMMC as only boot memory, without SD card present, there isn't any message shown on the UART console window. I think uboot is not booted up yet. Do you have SD card inserted in the slot, or are you only expecting to boot from eMMC? -- For production, we only use eMMC as code and data memory. SD card is only for bench debug or sw development purpose. The failed boards does not have any SD cards inserted. What speed mode are you working at? If both MMC1 and MMC2 are used, please provide the speed for both modules. -- I am not sure whether the booting speed mode is decided by the SOC ROM code or not, we can not even see the uboot message, means ROM code does not load the SBL or uboot data correctly. For the failure board checkouts, are you suggesting if you change out the boot-modes after failure occurred to eMMC-only or SD-only (where SD card content was flashed by the eMMC), the failed system then boot up successfully? Please confirm once SD-only boot and eMMC-only boot succeeded, you went back to the failure boot mode (SYSBOOT[5:0] = 10 0010) and confirmed the failure persisted. -- Let me make clear. 1. We have no issue with SD card booting. 2. We tried to change the original boot mode from 10 0010 to 10 0000, to make the eMMC as the first boot device, the system can boot up correctly, also we did not change the content of eMMC on this failure board, but if we changed the boot mode to original 10 0010, eMMC failed to boot up. 3. boot mode 10 0010, We use additional SD card boot up the system, access to the eMMC, copy the eMMC contents and make a new SD card with that contents, and using this new SD card to boot the system, it's working. How many boards have you tested this on, and how many boards showed failure? -- We have two failed boards, till now, we have not found any other boards booting up failure with eMMC as only boot memory and boot mode 10 0010. Jeffrey Yu + +Additional test: boot mode 10 0010, copy the eMMC contents of the failure board to another board eMMC, it can boot up. + +Jeffrey, Chongbo, Thank you for all the test results! Please let me know the following information: 1. Which filesystem are you running? What is the revision? 2. What voltage and temperature do you see failure at? Please provide an approximate value if run at nom Would you be able to run the following experiments? Since u-boot did not even bootup, these data points will be extremely beneficial. 1. Run 20~50 PORz with boot mode 10 0010, are there any successes? 2. Probe the signal pins (CLK, CMD, DAT0) so we can see if MMC boot ran at all 3. Connect a debugger and dump the PC register and Tracing data (0x4037 F040 ~ 0x4037 F060) during failure Best Regards, Shiou Mei + +Jeffrey, Chongbo, It would also be beneficial if you loop in the flash vendor into these debug discussions. In either case, signal trace captures and registers dump would beneficial in isolating what the failures are. Best Regards, Shiou Mei + diff --git a/data2/text/range/5001-10000/919278.txt b/data2/text/range/5001-10000/919278.txt new file mode 100644 index 0000000000000000000000000000000000000000..44a3d6e06103255c866e0756e2643f066952f3ab --- /dev/null +++ b/data2/text/range/5001-10000/919278.txt @@ -0,0 +1,138 @@ +Ticket Name: TDA2EVM5777: VISION_SDK TIDL apps Demo error + +Query Text: +Part Number: TDA2EVM5777 Hello, I am running PROCESSOR_SDK_VISION_03_08_00_00 vision SDK linux on the TDA2EVM5777 board. I successfully compiled and created a bootable SD card. When I run the SD card, follow 4.3 of the VisionSDK_Linux_UserGuide.pdf user guide and run the command ./apps.out to run the demo I get errors. I attached a log of the entire process that I took from bootup. The print statements never end so I cancel it and I get errors. I can not figure out why the IPU is not responding to system attachment. My main goal is to run the TIDL demo which I believe running this executable would be the first step. How can I debug from here in order to run the TIDL demo? Thank you, -iFer + +Responses: +Hi, Can you send the log attachment? also share the output of "make -s showconfig" Thanks Gaviraju + +Hello Gaviraju, I just realized I hadn't attached the log in my previous reply. I will attach here. Also, here is the output you requested. Thank you, -iFer5126.Linux Boot Logs.txt 0207.showconfig.txt # +# Build Config is [ tda2xx_evm_linux_all ] +# Build Config file is @ /home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk +# Build Config .h file is @ /home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/links_fw/include/config/apps/tda2xx_evm_linux_all/system_cfg.h +# Build CPUs is @ ipu1_0 a15_0 dsp1 dsp2 eve1 eve2 eve3 eve4 +# +# CPUs included in application, +# PROC_IPU1_0_INCLUDE=yes +# PROC_IPU1_1_INCLUDE=no +# PROC_IPU2_INCLUDE=no +# PROC_DSP1_INCLUDE=yes +# PROC_DSP2_INCLUDE=yes +# PROC_EVE1_INCLUDE=yes +# PROC_EVE2_INCLUDE=yes +# PROC_EVE3_INCLUDE=yes +# PROC_EVE4_INCLUDE=yes +# PROC_A15_0_INCLUDE=yes +# +# Platform config, +# VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP] +# PLATFORM=tda2xx-evm +# DUAL_A15_SMP_BIOS=no +# IPU1_SMP_BIOS=no +# DDR_MEM=DDR_MEM_1024M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M] +# EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk] +# NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none] +# NSP_TFDTP_INCLUDE=no [options: yes no] +# TDA2EX_ETHSRV_BOARD=no [options: yes no] +# FATFS_PROC_TO_USE=none [options: ipu1_0 none] +# RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none] +# +# Build config, +# BUILD_OS=Linux [options: Windows_NT Linux] +# BUILD_DEPENDENCY_ALWAYS=no +# BUILD_ALGORITHMS=no +# BUILD_INFOADAS=no +# PROFILE=release [options: debug release] +# KW_BUILD=no +# CPLUSPLUS_BUILD=no +# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2] +# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2] +# A15_TARGET_OS=Linux [options: Bios Linux Qnx] +# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe] +# +# Safety Module config, +# RTI_INCLUDE=no +# ECC_FFI_INCLUDE=no +# DCC_ESM_INCLUDE=no +# +# Video Module config, +# IVAHD_INCLUDE=yes +# VPE_INCLUDE=yes +# CAL_INCLUDE=no +# ISS_INCLUDE=no +# ISS_ENABLE_DEBUG_TAPS=no +# WDR_LDC_INCLUDE=no +# DSS_INCLUDE=yes +# +# Open Compute config, +# OPENCL_INCLUDE=no +# TARGET_ROOTDIR=/home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/../ti_components/os_tools/linux/targetfs +# ENABLE_OPENCV=no +# ENABLE_OPENCV_TESTS=no +# OPENVX_INCLUDE=no +# +# Log config, +# ENABLE_UART_LOG=yes +# ENABLE_NETWORK_LOG=no +# ENABLE_CCS_LOG=no +# CIO_REDIRECT=yes +# +# IPC config, +# WORKQ_INCLUDE=no +# IPC_LIB_INCLUDE=no +# +# AUTOSAR_APP=no +# +# Surround View config, +# SRV_FAST_BOOT_INCLUDE=no +# +# Other Module config, +# AVB_INCLUDE=no +# DCAN_INCLUDE=no +# RADAR_ONLY=no +# RADAR_STUDIO=no +# CPU_IDLE_ENABLED=yes +# FAST_BOOT_INCLUDE=no +# DATA_VIS_INCLUDE=no +# HS_DEVICE=no +# ULTRASONIC_INCLUDE=no +# PGA450= +# PGA460= +# ENABLE_ALL_DEPTH= +# +# Linux config, +# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config +# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig +# DEFAULT_DTB=dra7-evm-infoadas.dtb dra7-evm-infoadas-lcd-lg.dtb +# CMEM_INCLUDE=yes +# IPUMM_INCLUDE=no +# IPU1_EVELOADER_INCLUDE=yes +# ROBUST_RVC_INCLUDE=no +# BUILD_ADAM_CAR=no +# +# Alg plugins included in build, +# ALG_autocalibration ALG_dmaSwMs ALG_framecopy ALG_sparseopticalflow ALG_structurefrommotion ALG_surroundview +# +# Use-cases included in build, +# UC_srv_calibration UC_lvds_vip_multi_cam_3d_perception UC_lvds_vip_multi_cam_3d_srv UC_lvds_vip_multi_cam_2mp_3d_srv UC_lvds_vip_multi_cam_3d_adaptive_srv UC_lvds_vip_multi_cam_view_sgx_display UC_lvds_vip_multi_cam_vpe_enc_null UC_null_src_decode_display UC_disp_dist_src_display UC_ov490_vip_multi_cam_3d_srv UC_vip_single_cam_connectorLinksA15_sgx_display UC_vip_single_cam_enc_dec_sgx_display UC_vip_single_cam_framecopy_sgx_display UC_vip_single_cam_framecopyEve_sgx_display UC_vip_single_cam_sgx_display +# +# +# CPUs that are NOT required but included in config [ tda2xx_evm_linux_all ], +# +# +# CPUs that are required but not included in config [ tda2xx_evm_linux_all ], +# +# +# Edit /home/user01/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk to include or exclude CPUs in an application +# + +Hi, Do below changes & clean build the code by deleting binary directory. file: vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk # PROC_IPU1_0_INCLUDE=no # PROC_IPU2_INCLUDE=yes # IPU_PRIMARY_CORE=ipu2 [options: ipu1_0 ipu2] # IPU_SECONDARY_CORE=ipu1_0 [options: ipu1_0 ipu2] Thanks Gaviraju + +Hello Gaviraju, I was not able to find the cfg.mk file in vision_sdk/configs/ tda2xx_evm_linux_all because the configs directory under vision_sdk does not exist. I modified the cfg.mk file under PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/apps/configs/tda2xx_evm_linux_all/cfg.mk Attached is the log of the run. I eagerly await for the next steps to take to debug. Thank you, -iFerBootLogOfSoftwareBug.txt + +Hi, Have you done clean build after changing the above config file? Thanks Gaviraju + +Hello Gaviraju, Thank you for your reply. I realized that I didn't delete the binaries folder before recompiling and rerunning. I have fixed this mistake in this new run. This new run has effectively the same bug as before, but I noticed that the SYSTEM attachment print statements are different. I have attached it to this reply. I look forward to the next steps in debugging this issue. Thank you, -iFer BootLogOfSoftwareBug2.txt + +Hi, The below steps I followed & I'm able to run one of the HLOS use-cases. 1) Download the vision SDK http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html 2) Do the below changes in the vision_sdk/build/Rules.make MAKECONFIG?=tda2xx_evm_linux_all 3) Follow the instruction provided in the user-guide for GIT configuration set-up (chapter 2.4.1 One time PC set up) 4) cd vision_sdk/build/ 5) Run the below script from the build directory, this will clone kernel, u-boot, etc. ./hlos/scripts/linux/setup_linux.sh 6)Follow the instruction provided in the user-guide for target file system set-up(chapter 2.4.2.1.4 Download and untar file system) 7)Follow the instruction provided in the user-guide for A15 compiler set-up (chapter 2.2.1 A15 Compiler, Linker) 8) make linux 9) make linux_install 10) make -s -j depend 11) make -s -j 12) Copy the target file system & boot image, MLO, etc to the SD card & insert the SD into the target SD card slot. 13) Run the below command in the UART console. cd /opt/vision_sdk/ source ./vision_sdk_load.sh ./apps.out 14) You can choose the use-case you want to run from the menu. I'm recommending to do the above steps & make sure one of the existing use-cases is working then you port TIDL use-case from RTOS to Linux.(For porting use-case no need any changes in the vision_sdk/configs/tda2xx_evm_linux_all/cfg.mk file ) Thanks Gaviraju + diff --git a/data2/text/range/5001-10000/922199.txt b/data2/text/range/5001-10000/922199.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf9224b96dfaa2cc9d1d59480231c0d7b65e1eb5 --- /dev/null +++ b/data2/text/range/5001-10000/922199.txt @@ -0,0 +1,32 @@ +Ticket Name: Compiler/TDA2EVM5777: The result display delay when run default TIDL module in VSDK3.07 version + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Tool/software: TI C/C++ Compiler HI all, Reproduce Step: based on TDA2 EVM, and VSDK3.07 Linux all system, download the TIDL module and prototxt in https://github.com/tidsp/caffe-jacinto-models/tree/caffe-0.16/trained/object_detection/voc0712/JDetNet/ssd768x320_ds_PSP_dsFac_32_hdDS8_0/sparse. import tools tidl_model_import.out.exe provided in VSDK\ti_components\algorithms\REL.TIDL.01.01.03.00\modules\ti_dl\utils\importTool to genrate net.bin and param.bin. copy above file to SD card. Result: At the beginning of the video (about 30s), there is no object detected. But after 30s, the thing goes right Could you pls help to give some advice for this? Thanks a lot. Best regard, Neo + +Responses: +Hi Neo, May be, it is reading frames from the SD card initially and after 30s, all requires frames are available so it becomes faster.. Regards, Brijesh + +Hi Brijesh, Thanks for your reply. I think the NullSRC -> TIDL is read and process the frame one by one, in before 30s, the display is normal and I can see the video, but dont have the object detection function, just like the TIDL node doen't work, but I'm sure the TIDL is running because I add the log in the TIDL and it print normally. by the way, use the same video source, then replace the TIDL module with the default one in the SDK, instead of download from the Web, all the things is normal. Best regard, Neo + +Hi Neo, When you download from model from web then you need to update below parameters in the “deploy.prototxt” before importing the model, keep_top_k: 20 confidence_threshold: 0.15 Refer to below e2e thread for more details: https://e2e.ti.com/support/processors/f/791/t/689617 Thanks, Praveen + +Hi Praveen, I think I have already done this and this step can be work normally in VSDK_bios_only, but it will appear this issue when I use same step in VSDK_Linux_all. best regard, Neo + +Hi, Can you share with me the Generated model files? I will check behavior in the Bios TIDL use-case. Thanks Gaviraju + +Hi Gaviraju, thanks Gaviraju, pls find my binary as attachment, the solution is 768x320. best regard, Neo binary.7z + +Hi, I'm getting an error when I'm using your model file. The error is [IPU1-0] 19.501128 s: Assertion @ Line: 103 in /adasuser/surya/vsdk_3_8_6/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! [IPU1-0] 19.502165 s: Assertion @ Line: 103 in /adasuser/surya/vsdk_3_8_6/vision_sdk/apps/src/rtos/usecases/common/chains_common_tidl.c: readSize == sizeof(sTIDL_Network_t) : failed !!! The reason for this failure is: number of bytes from your "net_jdetNet0.16_sparse_768x320_113Tool_myLayersGroup.bin" file is not matching sizeof(sTIDL_Network_t) The file "net_jdetNet0.16_sparse_768x320_113Tool_myLayersGroup" contains 483,364 bytes data & this should be 484384 bytes of data The file that I'm using contains 484384 bytes of data. Thanks Gaviraju + +Hi Gaviraju, Sorry for the lately reply, onsite deay. So I understand that this caused by the size, right? and this binary is trans by our import tools, is it possible that this is caused by our import tools? Best regard, Neo + +Hi Neo, Please use latest Vision SDK release 3.8 and TIDL release 01.02 to generate the model files and check? Thanks, Praveen + +Hi Praveen, I am working with Neo dealing with this issue, and I tried to use version 01.02 TIDL tool in VSDK 3.8to generate the model files. However, there is an error happend when running the vision sdk app: /opt/vision_sdk/start_vision_app.sh: line 16: 301 Floating point exception vision_sdk_linux_demo.out. When I use version 01.01.13 tool in VSDK 3.7, this error doesn't come up. Could you have any idea about what the error means? ***By the way, there are some additional remarks for the original issue: At the beginning of the video (about 30s), when I print the score of bounding boxes from tidl_dsp, the value seens really *** (.e.g score = 60015513389750170707702636.718750). Actually this value should be less than 1. Also for the size of the bounding box, the size could be 764x316 when my input image is 768x320 within this 30s, which is totally wrong. Could you tell me some possible reasons for this phenomenon? Thank you, Johnny + +Hi Johnny, Before running the generated model files from import tool in the usecase, could you first check import tool output itself is correct or not ? Import tool also outputs the detected objects in "stats_tool_out.bin" file, please refer to below e2e thread on how to read this output file for visualization .. https://e2e.ti.com/support/processors/f/791/p/679186/2502331#2502331 Thanks, Praveen + +Hi Praveen, Thank you for your suggestion. I have referred to the thread and read the output file for visualization. The output is fine which contains 560 values since the value of top_k I choose is 20. Is there any other possible reason? Thanks, Johhny + +Hi Johhny, You mean to say import tool output is fine but the generated model files (param and net bin file) are not working in the usecase ? If so can you share the model files so that Gaviraju can replicate the issue at our end. Thanks, Praveen + diff --git a/data2/text/range/5001-10000/926449.txt b/data2/text/range/5001-10000/926449.txt new file mode 100644 index 0000000000000000000000000000000000000000..5124b692527abac0d73f8598014bbfd749255edb --- /dev/null +++ b/data2/text/range/5001-10000/926449.txt @@ -0,0 +1,159 @@ +Ticket Name: TDA2PXEVM: Running the script causes increase in tmp directory + +Query Text: +Part Number: TDA2PXEVM Hi Team, I am working on vsionSDK v3.07 and have been running the apps.out from a script, as follows, cd /opt/vision_sdk +./vision_sdk_load.sh > log.txt +./apps.out > log.txt But the above approach caused a lot of distortion in the video we were running the usecase Please Note: Manual running of usecase did'nt cause that distortion But I got it resolved on implementing the script from the link, https://e2e.ti.com/support/processors/f/791/t/718464?Linux-TDA2-How-to-run-demo-program-apps-out-automatically-after-boot-up- as follows, echo "Inside the script" > /tmp/vsdk.log +cd /opt/vision_sdk +./vision_sdk_load.sh >> /tmp/vsdk.log +./apps.out >> /tmp/vsdk.log But the main thing to note is, in the long run of the apps.out, the tmp directory size increases drastically.Shouldnt that be causing a lot of memory taken up by it ?? What can we do about it ? Regards, Padmesh + +Responses: +Hi Padmesh, Is your apps.out continuously printing messages? Typically in vision sdk, messages are printed when you press 'p' on the console. Otherwise there are no prints, once the usecase starts.. Yes, if you are continuously printing messages and saving into a file, it will eventually run out of memory and will exit. Rgds, Brijesh + +Hi Brijesh, Yes the only log that we see when apps.out run is this, done = FALSE; + while (!done) + { + ch = '1'; + ch = Chains_menuRunTime(); + switch (ch) + { + case '0': + done = TRUE; + break; + + case 'p': + case 'P': + ChainsCommon_PrintStatistics(); + CustomAPP_printStatistics(&chainsObj.ucObj); + break; + default: + Vps_printf("\nUnsupported option '%c'. Please try again\n", ch); + break; + } + } + + CustomAPP_StopAndDeleteApp(&chainsObj); That is when the apps.out is run manually, the prompt stops and displays the above print only once, waiting for an input so that it can either stop the chain or print statistics. as below, [HOST] [EVE1 ] 6.426737 s: SYSTEM: Heap = LOCAL_L2 @ 0x40020000, Total size = 22528 B (22 KB), Free size = 22528 B (22 KB) + [HOST] [EVE1 ] 6.427316 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 258632 B (252) + [HOST] [IPU2 ] 6.428109 s: SYSTEM: SW Message Box Msg Pool, Free Msg Count = 1023 + [HOST] [IPU2 ] 6.428231 s: SYSTEM: Heap = LOCAL_DDR @ 0x00000000, Total size = 262144 B (256 KB), Free size = 250496 B (244) + [HOST] [IPU2 ] 6.428384 s: SYSTEM: Heap = SR_OCMC @ 0x00000000, Total size = 0 B (0 KB), Free size = 0 B (0 KB) + [HOST] [IPU2 ] 6.428567 s: SYSTEM: Heap = SR_DDR_CACHED @ 0x84203000, Total size = 264241152 B (252 MB), Free size = 76151808 B) + [HOST] [IPU2 ] 6.428750 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1046912 B (0 MB), Free size = 1019264 B (0 M) + [HOST] [IPU2 ] 6.429146 s: DISPLAY: Start in progress !!! + [HOST] [IPU2 ] 6.429207 s: DISPLAY: Start Done !!! + [HOST] [HOST ] 6.436954 s: SGXFRMCPY: Start in progress !!! + [HOST] [HOST ] 6.436954 s: SGXFRMCPY: Start Done !!! + [HOST] [HOST ] 6.438998 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: But when the service is started and prints are pointed to ./apps.out >> /tmp/vsdk.log, shouldnt is necessarily stop at the log but we get it continuously as follows, [HOST] [IPU2 ] 6.428750 s: SYSTEM: Heap = SR_DDR_NON_CACHED @ 0xa0100000, Total size = 1046912 B (0 MB), Free size = 1019264 B (0 M) + [HOST] [IPU2 ] 6.429146 s: DISPLAY: Start in progress !!! + [HOST] [IPU2 ] 6.429207 s: DISPLAY: Start Done !!! + [HOST] [HOST ] 6.436954 s: SGXFRMCPY: Start in progress !!! + [HOST] [HOST ] 6.436954 s: SGXFRMCPY: Start Done !!! + [HOST] [HOST ] 6.438998 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439028 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439028 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439028 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439059 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== + [HOST] [HOST ] + [HOST] [HOST ] 0: Stop Chain + [HOST] [HOST ] + [HOST] [HOST ] p: Print Performance Statistics + [HOST] [HOST ] + [HOST] [HOST ] Enter Choice: + [HOST] [HOST ] + [HOST] [HOST ] 6.439089 s: + [HOST] [HOST ] Unsupported option ' + [HOST] [HOST ] '. Please try again + [HOST] [HOST ] 6.439089 s: + [HOST] [HOST ] + [HOST] [HOST ] ==================== + [HOST] [HOST ] Chains Run-time Menu + [HOST] [HOST ] ==================== Regards, Padmesh + +Padmesh, getChar should not be redirected to a file. What is the purpose of saving logs in the file? If you want to save into a file, you could remove getchar.. Rgds, Brijesh + diff --git a/data2/text/range/5001-10000/932257.txt b/data2/text/range/5001-10000/932257.txt new file mode 100644 index 0000000000000000000000000000000000000000..3347ace686a8feb0f915443ed1dbfcce7f6ee68f --- /dev/null +++ b/data2/text/range/5001-10000/932257.txt @@ -0,0 +1,278 @@ +Ticket Name: TDA2EX17EVM: about reducing power consumption + +Query Text: +Part Number: TDA2EX17EVM Hi, Our PCBAs heating is serious, how can we reduce power consumption of PCBAs? In addition, how to check and modify the frequency of GPU and CPU. thanks + +Responses: +Hello. Please refer to https://www.ti.com/lit/pdf/sprac22 for a description of power management on the TDA2. In-depth detail on the architecture support is in section 3 of the TRM as well. The key to minimizing power is to tune the clocking and power domains on the device for your usage. Best regards, Dave + +Hi, kzy: to check GPU and CPU frequencies, omapconf can be used. This is what I get from TDA2x EVM: root@dra7xx-evm:~# omapconf show opp +OMAPCONF (rev v1.73-17-g578778b built Thu Dec 28 05:15:12 IST 2017) + +HW Platform: + Generic DRA74X (Flattened Device Tree) + DRA75X ES2.0 GP Device (STANDARD performance (1.5GHz)) + TPS659038 ES2.2 + +SW Build Details: + Build: + Version: _____ _____ _ _ + Kernel: + Version: 4.4.84-g742f84423d + Author: tiiappadmin@swubn03 + Toolchain: gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02) + Type: #1 SMP PREEMPT + Date: Thu Dec 28 05:05:59 IST 2017 + +|-----------------------------------------------------------------------------------| +| | Temperature | Voltage | Frequency | OPerating Point | +|-----------------------------------------------------------------------------------| +| VDD_CORE / VDD_CORE0 | 38C / 100F | 1.050 V | | NOM | +| L3 | | | 266 MHz | | +| DMM | | | 266 MHz | | +| EMIF1 | | | 266 MHz | | +| EMIF2 | | | 266 MHz | | +| LP-DDR2 | | | 532 MHz | | +| L4 | | | 266 MHz | | +| IPU1 | | | (2128 MHz) (1) | | +| Cortex-M4 Cores | | | (1064 MHz) (1) | | +| IPU2 | | | (2128 MHz) (1) | | +| Cortex-M4 Cores | | | (1064 MHz) (1) | | +| DSS | | | (768 MHz) (1) | | +| BB2D | | | (2128 MHz) (1) | | +| | | | | | +| VDD_MPU / VDD_CORE1 | 38C / 100F | 1.070 V | | NOM | +| MPU (CPU1 ON) | | | 1000 MHz | | +| | | | | | +| VDD_GPU / VDD_CORE2 | 39C / 102F | 1.080 V | | HIGH | +| GPU | | | 532 MHz | | +| | | | | | +| VDD_DSPEVE / VDD_CORE3 | 38C / 100F | 1.080 V | | HIGH | +| DSP1 | | | (750 MHz) (1) | | +| DSP2 | | | (750 MHz) (1) | | +| EVE1 | | | (0 MHz) (1) | | +| EVE2 | | | (0 MHz) (1) | | +| | | | | | +| VDD_IVA / VDD_CORE4 | 40C / 104F | 1.100 V | | HIGH | +| IVA | | | 532 MHz | | +| | | | | | +|-----------------------------------------------------------------------------------| + +Notes: + (1) Module is disabled, rate may not be relevant. + +root@dra7xx-evm:~# + +Hi,peter: This is what I get from TDA2Ex17: root@dra7xx-evm:/opt/vision_sdk# omapconf show opp Warning: chip not recognized, running in safe mode (only platform-generic functions allowed). Function disabled in safe mode, sorry ... root@dra7xx-evm:/opt/vision_sdk# + +Hi, kzy: Here is another way to get SOC clock tree information. Firstly, please download clock tree tool from : https://www.ti.com/tool/CLOCKTREETOOL After installation, you can find GEL files from the Script folder of the clock-tree-tool installation folder. For TDA2E-17, we can use CTT-TDA2Ex_17mm_SR2.1_SR2.0-REG_DUMP.gel. About how to run GEL files from Code-Composer-Studio, please refer to : https://processors.wiki.ti.com/index.php/GEL please be noted: 1. don't run startup script in the target configuration 2. for TDA2E-17 devices, please use GEL script with M4 core After running the GEL script, we will get clock-tree-information from CCS console prints. Then we can copy the prints and save it to an file with .rd1 extension. please remove unneeded characters, make it similar as below: DeviceName DRA71x_SR2.1_SR2.0 +0x4A005560 0x00000002 +0x4AE06118 0x00000001 +0x4A008920 0x00000001 +0x4AE06190 0x00000000 +0x4A0052E4 0x0004FD13 +0x4AE061C8 0x00000000 +0x4AE06174 0x00000000 +0x4A009848 0x00030000 +0x4AE07888 0x00030000 +0x4A005228 0x00000208 +0x4A002360 0x00000000 +0x4A0051EC 0x00800800 +0x4A009770 0x00020001 +0x4A009908 0x00030000 +0x4A005254 0x00000000 +0x4A009858 0x00030000 +0x4A00521C 0x00014D04 +0x4AE061BC 0x00000000 +0x4A009750 0x00020002 +0x4A009780 0x00020001 +0x4A0097A8 0x00020002 +0x4A008778 0x00000001 +0x4A009328 0x01040002 +0x4A005234 0x00000007 +0x4A005244 0x00000201 +0x4A0052B8 0x00000204 +0x4A005130 0x00000002 +0x4A005154 0x00000205 +0x4A0098E8 0x00030000 +0x4A008E40 0x00030000 +0x4A005550 0x00030000 +0x4A0093E8 0x00000001 +0x4AE07830 0x00000002 +0x4A00516C 0x0081F409 +0x4A009620 0x00030000 +0x4AE06134 0x00000000 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it into clock tree tool to check the SOC clock information. Please let me know if you have any questions. + diff --git a/data2/text/range/5001-10000/939145.txt b/data2/text/range/5001-10000/939145.txt new file mode 100644 index 0000000000000000000000000000000000000000..4053c32d5386404d8f67cc054dfdf4edc6f19b24 --- /dev/null +++ b/data2/text/range/5001-10000/939145.txt @@ -0,0 +1,107 @@ +Ticket Name: PROCESSOR-SDK-AM57X: AM571x AM570x + +Query Text: +Part Number: PROCESSOR-SDK-AM57X Other Parts Discussed in Thread: AM5718, TPS65916, AM5708, TDA2 Hi, which processor / pmic combinations are currently / will be supported in processor sdk rtos for AM57x devices? Digging through the power management code (pm driver) it seems that for example the TPS65916 / AM5708 / AM5718 combinations are currently not supported, although seen from the hardware side the TPS65916 is required for an AM5708. I'm asking because the TPS65916 allows a higher junction temperature which might be a better pmic for an AM5718 or AM5708. Can you comment on this please? Best regards, Flux. + +Responses: +For PMIC seleciton, please refer to the below appnote. https://www.ti.com/lit/pdf/sprack1 SDK includes the PMIC driver for TPS65917 which has the same register set as TPS65916. It is not being built for AM57xx but you can use it for your project. + +Hello Stanley, does that mean the SDK’s PM driver will directly recognize a TPS65916 as a valid regulator for AM5708 or AM5718 without any code changes to the PM65817-files? I’m asking because of all the OTP registers that might be differently configured like product id registers, etc. Best regards, Flux. + +Unlocking thread + +Hi Flux, Yes you are right. Though the register layouts are the same the regulators that feed the individual voltage domains will be different. If you are using Linux SDK it would mean that you might need to do some device tree changes. If you looks at: arch/arm/boot/dts/am57xx-idk-common.dtsi regulators { + smps12_reg: smps12 { + /* VDD_MPU */ + regulator-name = "smps12"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + smps3_reg: smps3 { + /* VDD_DDR EMIF1 EMIF2 */ + regulator-name = "smps3"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45_reg: smps45 { + /* VDD_DSPEVE on AM572 */ + /* VDD_IVA + VDD_DSP on AM571 */ + regulator-name = "smps45"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + smps6_reg: smps6 { + /* VDD_GPU */ + regulator-name = "smps6"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + smps7_reg: smps7 { + /* VDD_CORE */ + regulator-name = "smps7"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1150000>; + regulator-always-on; + regulator-boot-on; + }; + The mapping of smps to VDD will change and requires DTS changes. TPS65917/6 will have some layout like this: arch/arm/boot/dts/dra72-evm-tps65917.dtsi tps65917_regulators: regulators { + smps1_reg: smps1 { + /* VDD_MPU */ + regulator-name = "smps1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + smps2_reg: smps2 { + /* VDD_CORE */ + regulator-name = "smps2"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + smps3_reg: smps3 { + /* VDD_GPU IVA DSPEVE */ + regulator-name = "smps3"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + + smps4_reg: smps4 { + /* VDDS1V8 */ + regulator-name = "smps4"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + smps5_reg: smps5 { + /* VDD_DDR */ + regulator-name = "smps5"; + Hope this clarifies your question. Best Regards, Keerthy + +Hello Keerthy, thanks for the feedback. But, actually we’re using RTOS. And to be honest, I’m a bit confused by all the different industrial and automotive versions of the PMICs and processors, which under the hood are all almost the same, but differently configured, qualified and labeled. It’s easy to miss a detail here. So, the question is: Is it possible to use an AM5718 and TPS659162 in combination with RTOS? Will that work out of the box using the TPS65917 RTOS driver? Best regards, Flux. + +Hi, Unfortunately, in AM5718 SDK, TPS65917 PMIC driver is not used by default since it is not what is on AM57x EVM. We have not tested RTOS/baremetal TPS65917 PMIC driver in PDK on AM5718 with TPS65916. However, you should be able to reuse most of code if not all. Difference in OTP registers would not impact the driver implementation. Regards, Stanley + +Hi Stanley, thank you. What processor / pmic combinations have been used to test the RTOS-TPS65917 driver ? As a reference that would be helpful to know. Best regards, Flux. + +Hi The PMIC driver is used on TDA2 and DRA7 EVMs. Regards, Stanley + diff --git a/data2/text/range/5001-10000/940607.txt b/data2/text/range/5001-10000/940607.txt new file mode 100644 index 0000000000000000000000000000000000000000..9afa7eb5c54c1d82e40cacc3944f3ccf44149c4b --- /dev/null +++ b/data2/text/range/5001-10000/940607.txt @@ -0,0 +1,34 @@ +Ticket Name: TDA2HG: Upgraded SDK uImage has increased significantly + +Query Text: +Part Number: TDA2HG Other Parts Discussed in Thread: TDA2 Hi We recently updated sdk3.5 to 3.8. After the upgrade, uImage increased from 3.4M to 4.2M, and the kernel decompression and initialization time increased by 1.8s. Can you help me reduce the kernel img size? Thanks a lot. + +Responses: +Hi, I found a problem in the kernel log. VSDK3.5: [08/04 18:08:42.553] [ 1.067194] PCI host bridge /ocp/axi@0/pcie_rc@51000000 ranges: [08/04 18:08:42.563] [ 1.073357] No bus range found for /ocp/axi@0/pcie_rc@51000000, using [bus 00-ff] [08/04 18:08:42.577] [ 1.081361] IO 0x20003000..0x20012fff -> 0x00000000 [08/04 18:08:42.577] [ 1.086755] MEM 0x20013000..0x2fffffff -> 0x20013000 [08/04 18:08:42.609] [ 1.125653] dra7-pcie 51000000.pcie_rc: link is not up [08/04 18:08:42.621] [ 1.131174] dra7-pcie 51000000.pcie_rc: PCI host bridge to bus 0000:00 VSDK3.8: [09/12 17:09:36.947] [ 1.158135] dra7-pcie 51000000.pcie: Linked as a consumer to phy-4a094000.pciephy.1 [09/12 17:09:36.959] [ 1.166231] dra7-pcie 51000000.pcie: WA for Errata i870 not applied [09/12 17:09:36.959] [ 1.172753] dra7-pcie 51000000.pcie: host bridge /ocp/axi@0/pcie@51000000 ranges: [09/12 17:09:36.968] [ 1.180478] dra7-pcie 51000000.pcie: IO 0x20003000..0x20012fff -> 0x00000000 [09/12 17:09:36.984] [ 1.188014] dra7-pcie 51000000.pcie: MEM 0x20013000..0x2fffffff -> 0x20013000 [09/12 17:09:38.009] [ 2.195767] dra7-pcie 51000000.pcie: Phy link never came up [09/12 17:09:38.009] [ 2.201717] dra7-pcie 51000000.pcie: PCI host bridge to bus 0000:00 The dra7-pcie initialized delay for 1 second. Is there any change in pcie for sdk3.8? Or my changes cause an exception? I tried to disable pcie by referring to boot_opt.cfg, but cmemk cannot be loaded: insmod ./bin/cmemk.ko phys_start=0xa9000000 phys_end=0xaaffffff insmod: ERROR: could not insert module ./bin/memcache.ko: Invalid module format Please help me check the pcie configuration, thanks. + +Hi, insmod: ERROR: could not insert module ./bin/memcache.ko: Invalid module format. It is because memcache.ko is not copied to the board after recompilation. I am referencing boot_opt.cfg to reduce the kernel size. + +Hi, These are the two SDK startup logs I saved here. There is an obvious delay in the kernel startup on 3.8: [09/16 17:09:59.946] [ 0.000000] GIC: Using split EOI/Deactivate mode [09/16 17:09:0.552] [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz I did not see this obvious delay on SDK3.5. Can you explain why these two logs have been stuck for so long? Thanks! 3.5boottime.log3.8boottime.log + +Hi, 3.8 SDK i am seeing that modules are not really matching the kernel version hence they are not getting loaded. "[09/16 17:09:3.201] [ 2.642856] pvrsrvkm: disagrees about version of symbol _dev_err" There are multiple such messages like that. Can you please make sure that modules are matching the kernel version. [09/16 17:09:59.946] [ 0.000000] GIC: Using split EOI/Deactivate mode [09/16 17:09:0.552] [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz I am not understanding the time difference here why is it negative? Best Regards, Keerthy + +Hi, Yes, the symbol error is because the kernel config configuration is changed but the ko file is not updated. Sorry, the time is a negative number because the configuration of xshell logging is incorrect, and there is no update in minutes. I have tried repeatedly to start it many times, and it will be stuck here for more than 0.5 seconds, like this: [09/18 14:09:50.630] [ 0.000000] GIC: Using split EOI/Deactivate mode [09/18 14:09:51.237] [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz I'm not sure if the cpu did a lot of things and didn't print or got stuck between these two logs. 0308boot.log Thanks. + +Hi, I will get back to you on this in couple of days. Best Regards, Keerthy + +Hi, Ok thanks. + +Hi, We do not see the behavior on TDA2 on 3.8 vsdk on TI EVM. [2020-09-30 14:07:38.660] [ 0.000000] OMAP clockevent source: timer1 at 32786 Hz [2020-09-30 14:07:38.660] [ 0.000000] arch_timer: cp15 timer(s) running at 6.14MHz (phys). [2020-09-30 14:07:38.665] [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns [2020-09-30 14:07:38.673] [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns Attaching the full log for your reference. Best Regards, Keerthy 3.8-tda2-log.txt + +Hi, Comparing the logs found that the biggest difference is earlyboot. I used the code before optimizing the startup time and found that there is no such delay. noearlyboot_c3_2020-10-06_14_36_58.logearlyboot_c3_2020-10-06_14_49_17.log Can you apply the ti_components/os_tools/linux/kernel/linux-kernel-addon/earlyboot-lateattach-patches patch and try again? Thanks a lot. + +Hi, Before we get down to the differences have you followed the procedure mentioned here: file:///C:/PROCESSOR_SDK_VISION_03_08_00_00/vision_sdk/docs/Linux/VisionSDK_Linux_UserGuide.pdf ( Chapter 3.4 Build Linux Vision SDK for fast boot (Early boot and late attach of remote cores) Please follow the Linux user guide steps for early boot & let us know if the delta is seen. Best Regards, Keerthy + +Hi, Today I rolled back the code to before earlyboot, there was no delay in the boot process of compiled uboot&kernel. Then refer to VisionSDK_Linux_UserGuide.pdf (Chapter 3.4 Build Linux Vision SDK for fast boot (Early boot and late attach of remote cores)), Apply the earlyboot-lateattach-patches for kernel and u-boot, add the following debug log: omap/init/main.c @@ -375,6 +375,7 @@ u32 rest_init_time; u32 init_call_time; u32 cust_machine_dur; u32 root_wait_time; +u32 timer_init_time; /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter @@ -672,7 +673,10 @@ asmlinkage __visible void __init start_kernel(void) hrtimers_init(); softirq_init(); timekeeping_init(); + timer_init_time = read_fast_counter(); time_init(); + timer_init_time = read_fast_counter() - timer_init_time; + pr_info("%s timer_init_dur = %d ticks\n", __func__, timer_init_time); Kernel log: [ 0.000302] OMAP clocksource: 32k_counter at 32768 Hz [ 0.000690] start_kernel timer_init_dur = 19133 ticks It can be seen from the patch that read_fast_counter reads the 32K clock, 19133 /32768=0.58s. I didn't change any code except using patch and adding debug log. From the log, the timer initialization time has become longer. Please try the patch to see if it is the same. Is it because the timer initialization was done in uboot before and is now moved to the kernel? Thanks. + +Hi, The early boot late attach design changed from 3.4 to 3.8 VSDK. So yes there will be some differences. We might not be able to optimize this further. Thanks for isolating the function that is taking time. What is the target time that is to achieved? Best Regards, Keerthy + +Hi, Our goal is to display the ring shape normally within 6 seconds of power-on. The real car test requires 9s to produce the picture. Now the desktop test uboot+kernel takes about 2.6s, and rc.pvr+remoteproc+weston takes about 0.4 seconds. I'm trying to reduce the startup time of the kernel, and the app is partially optimized by others. Now I just see this problem, the initial timer delay is 0.6s and I don't know the specific reason. Can you reproduce this phenomenon? Do you have any suggestions for this problem? Thank you so much. + +Hi, time init & device tree parsing are generic Linux functions & they have been introduced as part of the feature redesign for 4.19 kernel. I believe not many optimization is possible without actually changing a lot of things. Best Regards, Keerthy + diff --git a/data2/text/range/5001-10000/942555.txt b/data2/text/range/5001-10000/942555.txt new file mode 100644 index 0000000000000000000000000000000000000000..2394f2e52132823eb3d8b97365f99565053033a9 --- /dev/null +++ b/data2/text/range/5001-10000/942555.txt @@ -0,0 +1,36 @@ +Ticket Name: TDA2EVM5777: kmscube error:display 0 failed to set mode: Permission denied + +Query Text: +Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 The development board I use is TDA2EVM5777, the HDMI monitor is connected, and the software version is PROCESSOR_SDK_VISION_03_08_00_00_setuplinux. I ran the OpenGL example on this basis, and the result was that the HDMI monitor did not display anything. The debug information is as follows: root@dra7xx-evm:~/test# ./kmscube ### Display [0]: CRTC = 31, Connector = 29, format = 0x34325258 Mode chosen [1920x1080] : Clock => 128480, Vertical refresh => 60, Type => 72 Horizontal => 1920, 1939, 1943, 1952, 0 Vertical => 1080, 1090, 1092, 1097, 0 ### Primary display => ConnectorId = 29, Resolution = 1920x1080 Using display 0x1 with EGL version 1.4 EGL Version "1.4 build 1.17@4948957" EGL Vendor "Imagination Technologies" EGL Extensions "EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import" display 0 failed to set mode: Permission denied What is the reason why HDMI cannot be displayed? How can i solve this problem? + +Responses: +Thanks Gaviraju + +I followed the suggestions in the link you gave, and the HDMI monitor did not display anything as before, and the debug information did not change. root@dra7xx-evm:~# /etc/init.d/weston stop Stopping Weston Terminated root@dra7xx-evm:~# root@dra7xx-evm:~# cd test/ root@dra7xx-evm:~/test# ./ kmscube openglunderqml root@dra7xx-evm:~/test# ./kmscube ### Display [0]: CRTC = 31, Connector = 29, format = 0x34325258 Mode chosen [1920x1080] : Clock => 128480, Vertical refresh => 60, Type => 72 Horizontal => 1920, 1939, 1943, 1952, 0 Vertical => 1080, 1090, 1092, 1097, 0 ### Primary display => ConnectorId = 29, Resolution = 1920x1080 Using display 0x1 with EGL version 1.4 EGL Version "1.4 build 1.17@4948957" EGL Vendor "Imagination Technologies" EGL Extensions "EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import" display 0 failed to set mode: Permission denied root@dra7xx-evm:~/test# + +Hi, Two questions: Can you please run modetest and share the output? Does the default kmscube work? It will be present in /usr/bin/kmscube Regards Karthik + +1.Can you please run modetest and share the output? root@dra7xx-evm:~# modetest trying to open device 'i915'...failed trying to open device 'amdgpu'...failed trying to open device 'radeon'...failed trying to open device 'nouveau'...failed trying to open device 'vmwgfx'...failed trying to open device 'omapdrm'...done Encoders: id crtc type possible crtcs possible clones Connectors: id encoder status name size (mm) modes encoders CRTCs: id fb pos size Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs Frame buffers: id size pitch root@dra7xx-evm:~# 2.Does the default kmscube work? It will be present in /usr/bin/kmscube root@dra7xx-evm:~# ps |grep kmscube 881 root 2360 S grep kmscub root@dra7xx-evm:~# kmscube -a ### Enabling all displays ### Display [0]: CRTC = 31, Connector = 29, format = 0x34325258 Mode chosen [1920x1080] : Clock => 128480, Vertical refresh => 60, Type => 72 Horizontal => 1920, 1939, 1943, 1952, 0 Vertical => 1080, 1090, 1092, 1097, 0 ### Primary display => ConnectorId = 29, Resolution = 1920x1080 Using display 0x1 with EGL version 1.4 EGL Version "1.4 build 1.17@4948957" EGL Vendor "Imagination Technologies" EGL Extensions "EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import" display 0 failed to set mode: Permission denied + +Hi, I have a new problem: the above kmscube error is caused by egl cannot be initialized: root@dra7xx-evm:~# eglinfo PVR:(Error): WSEGL_InitialiseDisplay: Failed to create output [0, ] Unable to initialise egl egl error 'EGL_NOT_INITIALIZED' (0x3001) The reason why egl has this error is still unknown. I am a little doubtful whether the driver version of sgx does not match or is caused by other reasons. Running pvrsrvctl will also report some error messages: root@dra7xx-evm:~# pvrsrvctl --start --no-module [ 2228.453790] PVR_K: UM DDK-(4948957) and KM DDK-(4948957) match. [ OK ] PVR:(Error): SrvInit: PVRSRVInitSrvConnect failed (129) [0, ] pvrsrvctl: SrvInit failed (already initialized?) (err=PVRSRV_ERROR_SRV_CONNECT_FAILED) root@dra7xx-evm:~# cat /proc/pvr/version Version SGX_DDK_Linux_XOrg sgxddk 1.17@4948957 (release) omap_linux System Version String: SGX revision = 116 root@dra7xx-evm:~# uname -a Linux dra7xx-evm 4.19.73 #3 SMP PREEMPT Tue Sep 15 10:54:39 CST 2020 armv7l GNU/Linux root@dra7xx-evm:~# gles1test1 PVR:(Error): WSEGL_InitialiseDisplay: Failed to create output [0, ] 'eglInitialize' returned egl error 'EGL_NOT_INITIALIZED' (0x3001) root@dra7xx-evm:~# Now I don’t know what to do. I’m contacting the TDA2 platform for the first time, and I also hope that God will give some advice. + +Hi, By default, weston application is automatically launched when the power on the board. In order to run the kmscube application, we need to stop the weston application. The step to stop weston application is /etc/init.d/weston stop Unfortunately, the above step is not working in the Vision SDK. So I followed the below steps to stop the weston application. root@dra7xx-evm:~# ps | grep weston + 1125 root 66052 S weston --idle-time=0 + 1132 root 10000 S /usr/libexec/weston-keyboard + 1133 root 17780 S /usr/libexec/weston-desktop-shell + + +root@dra7xx-evm:~# kill 1125 + launch the kmscube application root@dra7xx-evm:~# kmscube & Follow the below steps to view the o/p on the display root@dra7xx-evm:~# cd /opt/vision_sdk/ +root@dra7xx-evm:/opt/vision_sdk# ./vision_sdk_load.sh +root@dra7xx-evm:/opt/vision_sdk# ./apps.out + Choose the option 1 & 8 from the menu, now you can see the o/p on the display Thanks Gaviraju + +Hi, This can indeed make HDMI display the picture output by apps.out, but my ultimate goal is to make HDMI display the OpenGL picture I wrote myself, such as running kmscube -a, there should be gl rendering output, but HDMI does not have any Output. root@dra7xx-evm:~# /etc/init.d/weston stop Stopping Weston Terminated root@dra7xx-evm:~# ps | grep weston 847 root 66056 S weston --idle-time=0 856 root 9984 S /usr/libexec/weston-keyboard 857 root 17768 S /usr/libexec/weston-desktop-shell 872 root 2360 S grep weston root@dra7xx-evm:~# kill 847 root@dra7xx-evm:~# root@dra7xx-evm:~# kmscube -a & [1] 873 root@dra7xx-evm:~# ### Enabling all displays ### Display [0]: CRTC = 31, Connector = 29, format = 0x34325258 Mode chosen [1920x1080] : Clock => 128480, Vertical refresh => 60, Type => 72 Horizontal => 1920, 1939, 1943, 1952, 0 Vertical => 1080, 1090, 1092, 1097, 0 ### Primary display => ConnectorId = 29, Resolution = 1920x1080 Using display 0x1 with EGL version 1.4 EGL Version "1.4 build 1.17@4948957" EGL Vendor "Imagination Technologies" EGL Extensions "EGL_KHR_image EGL_KHR_image_base EGL_KHR_gl_texture_2D_image EGL_KHR_gl_texture_cubemap_image EGL_KHR_gl_renderbuffer_image EGL_IMG_cl_image EGL_KHR_fence_sync EGL_IMG_context_priority EGL_IMG_hibernate_process EGL_IMG_image_plane_attribs EGL_KHR_surfaceless_context EGL_KHR_wait_sync EGL_KHR_create_context EGL_WL_bind_wayland_display EGL_EXT_image_dma_buf_import" root@dra7xx-evm:~# + +Hi, You should run the apps.out in the Vision SDK in order to view the OpenGL o/p on the Display because the Display module is controlled by IPU core & VDRM will pass the rendered o/p buffer from Linux to the Display link running on the IPU. Please follow the steps mentioned in my previous post, you will see the kmscube o/p on the display. or You can go with PSDKLA 6.03 instead of Vision SDK, here all the HW module is controlled by Linux including Display. When you launch the kmscube application in the PSDKLA then you will see the O/P on the display. Thanks Gaviraju + +Thanks for your reply, but I'm still confused. Can PSDKLA 6.03 support my development board? I think the official information supports AM57x. + +Hi, I already tried on the TDA2x EVM & it's working successfully. We need to choose the appropriate DTB file according to our board. I used dra7-evm.dtb for tda2x platform & it's available in the /boot/ directory. Thanks Gaviraju + diff --git a/data2/text/range/5001-10000/949954.txt b/data2/text/range/5001-10000/949954.txt new file mode 100644 index 0000000000000000000000000000000000000000..30f5f407739acfef77224cd0d345890aa80dfa3b --- /dev/null +++ b/data2/text/range/5001-10000/949954.txt @@ -0,0 +1,31 @@ +Ticket Name: TDA4VM: Where to apply PinMux settings + +Query Text: +Part Number: TDA4VM Other Parts Discussed in Thread: TDA2 Hi, I have a question regarding the PinMux settings on TDA4. Following scenario: I run a linux and load and start firmware for the other DSPs/R5-Cores via remoteproc from linux. Where do I need to apply the PinMux settings? 1. SPL for R5? 2. SPL for A72? 3. U-Boot for A72? 4. Linux-Kernel ? 5. PDK for the DSPs/R5 firmware? Is there any way in Linux to verfiy, that my PinMux configuration was applied? Best regards, Thomas + +Responses: +Hi Thomas, The pinmux is applied in SPL for R5. We have a very good guide to help you understand this: e2e.ti.com/.../927526 I hope you have taken a look at this guide on how to use pinmux tool and verify that too. Regards Karthik + +Hi Karthik, thank you for the link, I am aware of this post. I know how to configure and generate the PinMux related files. But I'm not 100% sure, in which situations I need to apply these to SPL/U-Boot/Kernel/PDK. This is what I assume. It would be great if you could confirm or decline my assumptions: 1. I need to apply at least the PinMux-Config for the SPL R5, to be able to access the data storage for loading SYSFW, A72 ATF/OPTEE and depending hardware. (For example OSPI/UFS) 2. I need to apply at least the PinMux-Config for the U-Boot, to be able to access the kernel, dtb and rootfs. For example ethernet for booting over ethernet. 3. In the case that the firmware for MAIN_R5_0_0 requires SPI Port, the required PinMux configuration should be applied by linux kernel, and should not changed by firmware itself via boardCfg = (BOARD_INIT_PINMUX_CONFIG) boardReturn = Board_init(boardCfg); because changing PinMux configuration after linux booted is not supported. Q1: Based on these assumptions, could I just apply the whole PinMux configuration on SPL R5, SPL A72 and U-Boot and Linux? Just for simplification of the build process. Q2: Is it wrong or could it lead to problems, if I apply the whole PinMux configuration on Linux, and also configure within my firmware the identical PinMux configuration after firmware start? Q3: Do I even need to apply the PinMux Configuration to the PSDK and rebuild the PDK for my firmware, when the whole PinMux configuration is done by Linux? Best regards, Thomas + +Thomas, Thomas Dorsch said: 1. I need to apply at least the PinMux-Config for the SPL R5, to be able to access the data storage for loading SYSFW, A72 ATF/OPTEE and depending hardware. (For example OSPI/UFS) 2. I need to apply at least the PinMux-Config for the U-Boot, to be able to access the kernel, dtb and rootfs. For example ethernet for booting over ethernet. 3. In the case that the firmware for MAIN_R5_0_0 requires SPI Port, the required PinMux configuration should be applied by linux kernel, and should not changed by firmware itself via boardCfg = (BOARD_INIT_PINMUX_CONFIG) boardReturn = Board_init(boardCfg); because changing PinMux configuration after linux booted is not supported. That is right. We configure the pins of the modules that are exercised/used by the R5 SPL, A72 SPL, A72 u-boot, Linux kernel in the corresponding places. That said doing all the pinmux in the Linux side will have some challenges: 1) The firmwares for R5f get loaded at R5 SPL stage really early. That means you need to be aware of which stage your firmware is loaded so that correspondingly the SPL or u-boot or Linux have to configure pinmux upfront for you. This is still doable but the bigger problem is as below. 2) The SPL/u-boot configures pinmuxes as and when needed. For example: We need to change the voltage of a PMIC that is connected to i2c0. Only when the pmic driver is probed the corresponding i2c pinmux is configured. Ex; wkup_i2c0_pins_default in "arch/arm/dts/k3-j721e-r5-common-proc-board.dts". Is setup when the tps659413 is probed: &wkup_i2c0 { + u-boot,dm-spl; + tps659413a: tps659413a@48 { + reg = <0x48>; + compatible = "ti,tps659413"; + u-boot,dm-spl; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + clock-frequency = <400000>; + The pinmux are configured only when you have their phandles are populated in the nodes that use them. Like pinctrl-0 = <&wkup_i2c0_pins_default>; is used by tps659413a. So when you cannot initialize some pinmux for modules that are not probed by SPL/U-boot you better use the firmware to set your pinmux. My suggestion is to configure pinmux where the modules are needed. Otherwise it will be a hack & you will end up debugging u-boot/SPL/Linux when firmware are not functional. Hope you got my perspective. Best Regards, Keerthy + +Thank you very much Keerthy, I think its almost clear to me now. One last question: "My suggestion is to configure pinmux where the modules are needed". I understand this, but does this conflict with my third assumption? Lets examine your example with changing the voltage of a PMIC via i2c0. This is done via firmware of MAIN_R5_0_0. Firmware of MAIN_R5_0_0 is loaded and startet by Linux/remoteproc. So first of all the R5 SPL, A72 SPL, A72 u-boot and Linux kernel will change the default PinMux configuration of the SoC. After linux has boot and MAIN_R5_0-0 firmware has been loaded and started, the PinMux configuration is changed again for usage of i2c0. Isn't this, technically spoken, a change of PinMux configuration after linux has booted? I've read somehwere in e2e forum, that this is offical not supported. Best regards, Thomas + +Thomas Dorsch said: So first of all the R5 SPL, A72 SPL, A72 u-boot and Linux kernel will change the default PinMux configuration of the SoC. After linux has boot and MAIN_R5_0-0 firmware has been loaded and started, the PinMux configuration is changed again for usage of i2c0. This is not right. R5 SPL loads MAIN_R5_0-0 firmware & firmware does pinmux settings needed for the functionality it intends to do. You should make sure that the same pin configuration is not overwritten by other entities. Thomas Dorsch said: Isn't this, technically spoken, a change of PinMux configuration after linux has booted? I've read somehwere in e2e forum, that this is offical not supported. This is true for TDA2. The pinmux configuration is all done one time at u-boot due to IODelay. For the TDA4 that can be done in any place SPL/U-boot/Kernel or even firmware. Hope this answers all your questions." Please resolve if i have answered all your questions. Best Regards, Keerthy + +Hi Keerthy, "This is not right. R5 SPL loads MAIN_R5_0-0 firmware & firmware does pinmux settings needed for the functionality it intends to do. You should make sure that the same pin configuration is not overwritten by other entities." Sorry, I think we have a misunderstanding here: In my hypothetical scenario, linux would load and start a custom firmware on MAIN_R5_0_0 via remoteproc. (Pretty late, after linux has booted) This custom firmware needs to access i2c0. Where should I put the PinMux configuration for i2c0 for that case? This was the post which made me thinking not changing PinMux configuration after linux has boot: "1) No runtime changing of pinmux." Sorry for asking all these questions. Very best regards, Thomas + +Hi Thomas, Thomas Dorsch said: Sorry, I think we have a misunderstanding here: In my hypothetical scenario, linux would load and start a custom firmware on MAIN_R5_0_0 via remoteproc. (Pretty late, after linux has booted) This custom firmware needs to access i2c0. Where should I put the PinMux configuration for i2c0 for that case? Since the firmware is the one that uses the i2c it should be part of that. Like you mentioned via boardCfg = (BOARD_INIT_PINMUX_CONFIG) boardReturn = Board_init(boardCfg); Linux does not plan to use I2C as per your hypothetical scenario so we should not configure from Linux. Thomas Dorsch said: "1) No runtime changing of pinmux." That means only to say that device tree at boot time will configure the pinmux neded for Linux & does not happen runtime. That does not mean other entities like firmware cannot. So your firmware that runs on a remotecore can configure I2c pinmux when it runs after Linux boots up. FYI: Most firmware today are loaded by either SPL or u-boot. Linux only attaches to the already running remotecore. Early boot by SPL/U-boot and Latea attach by Linux. Best Regards, Keerthy + +Thank you very much Keerthy, that answers all my questions. Best Regards, Thomas + diff --git a/data2/text/range/5001-10000/970164.txt b/data2/text/range/5001-10000/970164.txt new file mode 100644 index 0000000000000000000000000000000000000000..d72b4245d6e21783407c37c0982f5a7a8607b97d --- /dev/null +++ b/data2/text/range/5001-10000/970164.txt @@ -0,0 +1,42 @@ +Ticket Name: TDA2E: Change Input Format + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2 Hi, I have some questions I want to ask, I want to change the input format of TDA2. Where do I need to change it? For example, I want to change YUV422SP to RGB888 + +Responses: +Hi, what do you mean by input format? Do you mean input input to VIP? Yes, VIP supports RGB24 as input format, provided pins are available. Rgds, Brijesh + +Hi, Yes, it is the VIP input. At present, the default input I know is YUV422, but I want to change this default value. In addition, the Sensor I use is to output grayscale data(only Y value), but I found format on TDA2 There will be shift phenomenon. + +Hi, How can I make TDA2 receive Raw data? + +Hi, Yes, you could receive raw data via VIP, but no hw module to process them. What is the size of the raw data? If it is less than 16bits, you could just treat them as YUV422 over 16bit interface and store it as YUV422 data. Regards, Brijesh + +Hi, The sensor I used is AR0144, the size is 1280*720, 8-bits output, and the buffer sorting is 55 00 5A 00 55 00 5A 00.....(only 55 & 5A are useful) Which input format can I make TDA2 use to receive these data? Regards, Michael + +Hi Michael, What is input interface on which sensor AR0144 is connected to VIP? is it over 8bit interface or 16bit interface? In both the cases, input format is YUV422 and so is output format. In 16bit input interface, we can 55 5A 55 5A data in memory, but in 8bit interface, data save in memory will also be 55 00 5a 00 55 and so on. Regards, Brijesh + +Hi Brijesh, Can I change the VIP input format from YUV422 to Raw data format and change VIP output format? Our sensor should be input to VIP through 16bit interface. Regards, Michael + +Hi Michael, VIP does not have RAW data format support. It cannot convert RAW format into YUV or viewable format. It can just capture this data into memory by treating it as YUV422. How do you want to store it in memory? Regards, Brijesh + +HI Brijesh, So you mean that VIP input in TDA2 only supports YUV422 format? Because I found that after the sensor is processed by TDA2 VIP, the data will be shifted by 2 bits to the right. In this code pInprms->dataFormat = SYSTEM_DF_YUV422P Can i change to SYSTEM_DF_RGB24_888? Does this code set the input format of the VIP? If yes, which code is the output format set? And output format can change RGB24_888 not YUV420? Regards, Michael + +Hi Michael, No, VIP supports both YUV422 and RGB888 input format. You could capture YUV422 over 8bit and 16bit interface, whereas RGB888 can be captured over 24bit interface. VIP cannot shift the data, it has no way to shift data by 2 bits. Yes, this will change input format to RGB888. There should be outPrms where we can set the output format. Regards, Brijesh + +Hi Brijesh, It is currently confirmed that the sensor is input to VIP through the 8Bit interface. Can I still use the RGB888 format as the input format? Are the input and output format settings set in the captrueLink.h file? Regards, Michael + +Hi Michael, Yes, but why do you want to use RGB24 as input format? i did not get the idea. Yes, input and output format settings are in captureLink.h header file. Regards, Brijesh + +Hi Brijesh Because the data of AR0144 is RAW data, but after input to VIP, RAW data will be allocated but the allocation is wrong (input format is YUV422, output format is YUV420). My idea is that I use RGB to assign this Y value, and fill in the same value for R channel, G channel and B channel, so that it should be the grayscale image I want. The sorted Data is output through RGB, but I don’t know if my approach is correct? Regards, Michael + +Hi Michael, But how will you fill data in other two channels? Is this going to be done by SW or sensor AR0144? Even if you treat input data as YUV422 over 16bit and just capture Y component, it would be grey scale image only. Regards, Brijesh + +Hi Brijesh, As for the UV channel, it uses the difference compensation method for data filling It may be an error in the sorting of the data, so I never came up with the idea of the previous answer. for(i = 0; i < Maxrow; i++) { for(j = 0; j < Maxcol; j++) { pFrame1[1280*(2*i)+ 2*j] = pFrame2[1280*(2*i)+ 640+j]; pFrame1[1280*(2*i)+ 2*j+1] = pFrame2[1280*i + j]; // pixel U pFrame1[1280*(2*i+1)+ 2*j] = pFrame2[1280*(2*i+1)+ 640+j]; pFrame1[1280*(2*i+1)+ 2*j+1] = pFrame2[1280*i + j]; // pixel V } } This is the current method of filling data Regards, Michael + +Hi Michael, Sorry, I did not get the issue. Do you mean to fill up the UV data in the code, after frame is captured in the memory? If we know the input sequence and output data format, we can definitely get the exact position of the Y and UV components. Regards, Brijesh + +Hi Brijesh, What I mean is that the output data of AR0144 is RAW8 data, and the receiving format of TDA2 is YUV422, and the output format is YUV420, and my idea is that I change the input format and output format of TDA2 to RGB888 format, and I manually sort the data, assign a data to the three channels of R, G, and B respectively, so that I should get the result I want? (Grayscale image) In addition, I want to ask what is the subframe in the capture link? Regards, Michael + +Michael, VIP cannot convert it into grey scale image, so i am not sure how by changing just the data format to RGB, you would get the grey scale image from RAW8 input. My idea is to treat the data as YUV422 over 16biit interface, then luma is expected to come over 8bit and chroma is expected to come over other 8bit inputs. You could just connect your 8bit RAW8 input to where luma is expected to come. Then store the output as YUV420, in YUV420 format, luma and chroma plane are stored in the separate plane, so you could get your RAW8 data on the luma plane.. Regards, Brijesh + diff --git a/data2/text/range/5001-10000/970479.txt b/data2/text/range/5001-10000/970479.txt new file mode 100644 index 0000000000000000000000000000000000000000..aec48e161fb91f4ebc369b9eabc703814d36c462 --- /dev/null +++ b/data2/text/range/5001-10000/970479.txt @@ -0,0 +1,22 @@ +Ticket Name: TDA2E：TDA2eco mipicsi can't read data from ds90ub960, the ds90ub960 mode is Line-Interleaved CSI-2 Forwarding. + +Query Text: +Part Number: TDA2E Other Parts Discussed in Thread: TDA2, Hi, The processor we use is TDA2 ECO 23*23. There are 4 cameras in our system. The interface connected to the deserializer (DS90UB960) is the mipicsi interface. When I use the Basic Synchronized Format of ds90ub960, I can get images. When I use the Line-Interleaved CSI-2 Forwarding of ds90ub960,I can't get images,and I check the status of ds90ub960 is normal，I dumped the registers of ds90ub960 and tda2 CAL_CSI2_COMPLEXIO_CFG_l as follows: Question： When 960 works in Line-Interleaved CSI-2 Forwarding , how should I set isscaputer? + +Responses: +Register dump data TDA2 CAL_CSI2_COMPLEXIO_CFG_l : Read at address 0x4845B304 (0xb6f0f304): 0x6A09ABDC 960 Register： read port0 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 60 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b9 77 ff `.?@??.???zz??w. 10: 00 91 00 00 00 00 00 00 31 15 b3 c3 50 00 04 02 .?......1???P.?? 20: 00 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 .(.............. 30: 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 00 ..??.?.......... 40: 00 a9 71 01 00 00 20 00 00 00 00 12 01 03 04 64 .?q?.. ....????d 50: 00 00 00 04 00 00 00 00 5e 00 00 30 b0 00 00 00 ...?....^..0?... 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7c a0 88 .............|?? 70: 1e 2c e4 05 00 0a 00 c5 00 01 00 00 c1 00 00 00 ?,??.?.?.?..?... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 04 00 03 19 34 00 01 00 00 00 00 00 00 00 00 .?.??4.?........ a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00 .....?.......... b0: 1c 3a 14 08 25 00 18 00 88 33 83 74 80 00 00 00 ?:??%.?.?3?t?... c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 43 94 03 60 f2 00 02 00 00 00 00 00 00 00 00 .C??`?.?........ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00 _UB960.......... read port1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 60 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b9 75 ff `.?@??.???zz??u. 10: 00 91 00 00 00 00 00 00 31 15 b3 c3 50 00 04 02 .?......1???P.?? 20: 00 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 .(.............. 30: 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 00 ..??.?.......... 40: 00 a9 71 01 00 00 20 00 00 00 00 12 12 43 04 64 .?q?.. ....??C?d 50: 00 00 00 04 00 00 00 00 5e 00 00 30 b2 00 00 00 ...?....^..0?... 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7c a0 88 .............|?? 70: 1e 6c e4 05 00 0a 00 c5 00 01 00 00 c1 00 00 00 ?l??.?.?.?..?... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 04 00 03 19 00 00 01 00 00 00 00 00 00 00 00 .?.??..?........ a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00 .....?.......... b0: 1c 3a 14 08 25 00 18 00 88 33 83 74 80 00 00 00 ?:??%.?.?3?t?... c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 43 94 03 60 f2 00 02 00 00 00 00 00 00 00 00 .C??`?.?........ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00 _UB960.......... read port2 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 60 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b9 75 ff `.?@??.???zz??u. 10: 00 91 00 00 00 00 00 00 31 15 b3 c3 50 00 04 02 .?......1???P.?? 20: 00 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 .(.............. 30: 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 00 ..??.?.......... 40: 00 a9 71 01 00 00 20 00 00 00 00 12 24 83 04 64 .?q?.. ....?$??d 50: 00 00 00 04 00 00 00 00 5e 00 00 30 b4 00 00 00 ...?....^..0?... 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7c a0 88 .............|?? 70: 1e ac e4 05 00 0a 00 c5 00 01 00 00 c1 00 00 00 ????.?.?.?..?... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 08 00 06 21 c8 00 02 00 00 00 00 00 00 00 00 .?.?!?.?........ a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00 .....?.......... b0: 1c 3a 14 08 25 00 18 00 88 33 83 74 80 00 00 00 ?:??%.?.?3?t?... c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 43 94 04 60 f2 00 02 00 00 00 00 00 00 00 00 .C??`?.?........ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00 _UB960.......... read port3 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 60 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b9 75 ff `.?@??.???zz??u. 10: 00 91 00 00 00 00 00 00 31 15 b3 c3 50 00 04 02 .?......1???P.?? 20: 00 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 .(.............. 30: 00 00 01 01 00 01 00 00 00 00 00 00 00 00 00 00 ..??.?.......... 40: 00 a9 71 01 00 00 20 00 00 00 00 12 38 c3 14 64 .?q?.. ....?8??d 50: 00 00 00 04 00 00 00 00 5e 00 00 30 b6 00 00 00 ...?....^..0?... 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 7c a0 88 .............|?? 70: 1e ec e4 05 00 0a 00 c5 00 01 00 00 c1 00 00 00 ????.?.?.?..?... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 08 00 06 23 d4 00 01 00 00 00 00 00 00 00 00 .?.?#?.?........ a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00 .....?.......... b0: 1c 3a 14 08 25 00 18 00 88 33 83 74 80 00 00 00 ?:??%.?.?3?t?... c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 43 94 03 60 f2 00 02 00 00 00 10 00 00 00 00 .C??`?.?...?.... e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00 _UB960.......... /dev/mem opened. Memory mapped at address 0xb6f5b000. Read at address 0x4845B304 (0xb6f5b304): 0x6A09ABDC + +Hi, Mayank Mangla: We did some debug on this issue. The SDK is vision SDK 3.06. We find that TDA2E can get the first frame (we set breakpoint at the vcoreCaptDmaStartCb function in PDK, but the ISSCapture Link doesn't get data, we are still looking into it), and we read CAL_CSI2_STATUS0_l(0x4845 b350) several times, the register value is 1, and it will not increase. we checked the CSI signals, it seems the camera data keep coming, but the CAL_CSI2_STATUS0_l won't increase, and we cannot get more vcoreCaptDmaStartCb. The CSI signal capture (data keeps coming in): For now, we don't know which direction we can continue debug. Please kindly share some guidance. Any questions or comments are welcome! Appreciate! + +Can you please check the value in following registers 1. CSI2 PHY Reg 0 2. CSI2 PHY Reg 1 3. CSI2 PHY Reg 2 4. CAL_HL_IRQSTATUS_RAW 5. CAL_HL_IRQSTATUS 6. CAL_CSI2_COMPLEXIO_CFG 7. CAL_CSI2_COMPLEXIO_IRQSTATUS + +csi reg0 /dev/mem opened. Memory mapped at address 0xb6f7d000. Read at address 0x4845B800 (0xb6f7d800): 0x00001058 csi reg1 /dev/mem opened. Memory mapped at address 0xb6f9f000. Read at address 0x4845B804 (0xb6f9f804): 0xE002E116 csi reg2 /dev/mem opened. Memory mapped at address 0xb6f4a000. Read at address 0x4845B808 (0xb6f4a808): 0x000000FF CAL_HL_IRQSTATUS_RAW 0 /dev/mem opened. Memory mapped at address 0xb6f26000. Read at address 0x4845B020 (0xb6f26020): 0x00000000 CAL_HL_IRQSTATUS 0 /dev/mem opened. Memory mapped at address 0xb6f54000. Read at address 0x4845B024 (0xb6f54024): 0x00000000 CAL_CSI2_COMPLEXIO_CFG 0 /dev/mem opened. Memory mapped at address 0xb6fd4000. Read at address 0x4845B304 (0xb6fd4304): 0x6A09ABDC CAL_CSI2_COMPLEXIO_IRQSTATUS 0 /dev/mem opened. Memory mapped at address 0xb6fc5000. Read at address 0x4845B308 (0xb6fc5308): 0x00000000 + +Thanks. I couldn't find anything wrong with the register settings. I would suggest checking a few things: 1. Please double-check that UB960 Tx and CSI2 Rx are using same number of lanes. I believe you are configuring TDA2Eco for 4-lane mode. Please make sure UB960 is also configured in the same mode. 2. Please ensure that UB960 starts streaming only after TDA2Eco CSI2 is out of reset. This can be done by probing RESET_DONE bit of CSI2 Phy register. 3. It might help to dump the registers for working case and compare with non working case. Please see if you can share that information with us. Regards, Mayank + +hi Mayank Correction information: The UB960 that can capture the picture is working in Best-Effort Round Robin CSI-2 Forwarding, not Synchronized CSI-2 Forwarding，I have tried Basic Synchronized and it doesn't work. + +Hello Yongzheng, Are the 4 sensors going to each hub synchronized? The sensors need to all have the exact same video parameters and be synchronized to within ~1 video line period for synchronized forwarding to work. You can verify the synchronization by mapping the line valid and frame valid signals from each incoming video port out to GPIO on the 960 (see the datasheet for details), that way you can check the synchronization if you are unsure Best Regards, Casey + +add comments from Jiashow for debug check ------------------------------------------------------------------------------------------------ I have some questions I’d like clarifications on: - Is RR working for you even though you’re seeing buffer error? - What’s the CSI input rate to each camera? A couple comments from your initialization code for the interleaving case: - For 953 serializers, the VC-ID is set in reg 0x72, not reg 0x70. Make sure to set all VC-IDs to 0 for all RX ports. Reg 0x70 is used for DVP mode, remove it from the code since it’s not applicable - Reg 0x7C[7:6] shouldn’t be used - Framesync signal looks correct. Do you only want to generate a single framesync pulse? Usually the framesync signal is set continuously (reg 0x18 = 0x01 instead of reg 0x18 = 0x31) - Check if the cameras are actually synchronized. If the CSI output is synchronized, it should indicate on reg 0x35. --------------------------------------------------------------------------------------------------------------- + diff --git a/data2/text/range/5001-10000/986893.txt b/data2/text/range/5001-10000/986893.txt new file mode 100644 index 0000000000000000000000000000000000000000..546604f28dc5e27ab0f834cc7fa9e9b9bc851a01 --- /dev/null +++ b/data2/text/range/5001-10000/986893.txt @@ -0,0 +1,26 @@ +Ticket Name: DRA72XEVM: PROCESSOR_SDK_VISION_03_08_00_00: SD booting failure + +Query Text: +Part Number: DRA72XEVM Hi, I'm trying to boot up DRA72XEVM with SD boot mode. I followed all the steps in VisionSDK Linux user guide but it failed to get kernel image. Could you let me know what could be wrong here? Booting log attached: U-Boot SPL 2019.01-00014-gf454ae0ae9 (Mar 18 2021 - 11:36:13 +0900) DRA722-GP ES1.0 Trying to boot from MMC1 no pinctrl state for default mode no pinctrl state for default mode Loading Environment from MMC... OK U-Boot 2019.01-00014-gf454ae0ae9 (Mar 18 2021 - 11:36:13 +0900) CPU : DRA722-GP ES1.0 Model: TI DRA722 Board: DRA72x EVM REV DRAM: 1 GiB NAND: 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Loading Environment from MMC... OK Warning: fastboot.board_rev: unknown board revision Net: Warning: ethernet@48484000 using MAC address from ROM eth0: ethernet@48484000 Hit any key to stop autoboot: 0 Trying to boot Linux from eMMC ... switch to partitions #0, OK mmc1(part 0) is current device SD/MMC found on device 1 ** No partition table - mmc 1 ** ** No partition table - mmc 1 ** Trying to boot Android from eMMC ... switch to partitions #0, OK mmc1(part 0) is current device mmc - MMC sub system Usage: mmc info - display info of the current MMC device mmc read addr blk# cnt mmc write addr blk# cnt mmc erase blk# cnt mmc rescan mmc part - lists available partition on current mmc device mmc dev [dev] [part] - show or set current mmc device [partition] mmc list - lists available devices mmc hwpartition [args...] - does hardware partitioning arguments (sizes in 512-byte blocks): [user [enh start cnt] [wrrel {on|off}]] - sets user data area attributes [gp1|gp2|gp3|gp4 cnt [enh] [wrrel {on|off}]] - general purpose partition [check|set|complete] - mode, complete set partitioning completed WARNING: Partitioning is a write-once setting once it is set to complete. Power cycling is required to initialize partitions after set to complete. mmc bootbus dev boot_bus_width reset_boot_bus_width boot_mode - Set the BOOT_BUS_WIDTH field of the specified device mmc bootpart-resize - Change sizes of boot and RPMB partitions of specified device mmc partconf dev [boot_ack boot_partition partition_access] - Show or change the bits of the PARTITION_CONFIG field of the specified device mmc rst-function dev value - Change the RST_n_FUNCTION field of the specified device WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values. mmc setdsr - set DSR register value Wrong Image Format for bootm command ERROR: can't get kernel image! => Regards, James + +Responses: +Hi, Any feedback? It seems SD partition is not recognized properly in uboot - 'mmc part' doesn't give anything for dev 0. => mmc list OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) => mmc dev 0 => mmc part ## Unknown partition table type 0 => mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device => mmc part ## Unknown partition table type 0 => I prepared a SD with the script (./hlos/scripts/linux/mksdboot.sh) provided from SDK 3.08 on Ubuntu 14.04 machine but I don't know why the SD partition is not recognized by uboot. Regards, James + +Hi James, Could you please follow: $(INSTALL_DIR)/vision_sdk/docs/UserGuides/VisionSDK_UserGuide_TDA2xx.pdf for building and running. Best Regards, Keerthy + +Hi Keerthy, I followed all the steps in /vision_sdk/docs/Linux/VisionSDK_Linux_UserGuide.pdf to setup build environment and: 1) make linux 2) make linux_install 3) make s -j depend 4) make -s -j and tar the Linux file system and copied it to $INSTALL_DIR/vision_sdk/binaries/$(MAKEAPPNAME)//hlos/linux/boot. After that I format a SD card using the script mksdboot.sh and could see all the file systems are in rootfs(ext4) partitions. But the problem is that uboot cannot recognize partition table as you can see in my previous post. I think it's something related to SD card formatting but I don't know why since I used the mksdboot.sh in VSDK3.08 on Ubuntu 14.04 machine as described in the user guide. Regards, James + +Hi James, Can you halt at u-boot prompt & give the following commands below: env default -a saveenv Best Regards, Keerthy + +Hi Keerthy, Yes, I also tried that already but no difference. Regards, James + +Hi James, Are you able to see the EXT4 partition? What are the contents in boot partition? - Keerthy + +Hi Keerthy, In boot partition of the SD card I have MLO, uboot, and uenv. And in rootfs partition (EXT4) it has Linux file system. Problem is that uboot comes normally but it cannot access the partitions when booting from DRA72 EVM. As you can see in my previous post no partition table information can be seen from uboot. => mmc list OMAP SD/MMC: 0 OMAP SD/MMC: 1 (eMMC) => mmc dev 0 => mmc part ## Unknown partition table type 0 => mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device => mmc part ## Unknown partition table type 0 => Regards, James + +Hi James, I believe you are trying to boot to Linux using SD card? Can you try with a different SD card? uEnv.txt should be correctly pointing to the right bootargs. Can you try with a different SD card just to be doubly sure if that is not a card specific issue? - Keerthy + +Hi Keerthy, Yes, I'm trying to boot to Linux using SD card. And it's my uEnv.txt: fdtfile=dra72-evm-infoadas.dtb args_mmc=part uuid mmc 0:2 uuid; setenv bootargs "console=ttyO0,115200n8 vram=16M root=PARTUUID=${uuid} rw rootwait ip=none mem=1024M cma=64M" I tried several SD cards but not no differences. I tried with Sandisk 4/8/32/64GB which I'm using on TDA4 EVM without problems. Regards, James + +Hi James, Do you have a different TDA2x EVM to try? I don't see any problem with TDA2 or TDA2P EVM but I don't have TDA2Ex. In addition, could you also try the pre-built binary? Regards, Stanley +